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asoc: codecs: tlv320aic3x: rename probe function
|
renamed function to have it free for generic probe.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
tlv320aic3x add spi support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ', 'soc codecs']
|
['c']
| 1
| 2
| 2
|
--- diff --git a/sound/soc/codecs/tlv320aic3x.c b/sound/soc/codecs/tlv320aic3x.c --- a/sound/soc/codecs/tlv320aic3x.c +++ b/sound/soc/codecs/tlv320aic3x.c -static int aic3x_probe(struct snd_soc_component *component) +static int aic3x_component_probe(struct snd_soc_component *component) - .probe = aic3x_probe, + .probe = aic3x_component_probe,
|
Audio
|
b015df6ac03ee81b259dcb2f1a6faf4cf04ace5a
|
jiri prchal
|
sound
|
soc
|
codecs
|
asoc: codecs: tlv320aic3x: move i2c to separated file
|
moved i2c related staff to separated source file.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
tlv320aic3x add spi support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ', 'soc codecs']
|
['h', 'kconfig', 'c', 'makefile']
| 5
| 112
| 76
|
--- diff --git a/sound/soc/codecs/kconfig b/sound/soc/codecs/kconfig --- a/sound/soc/codecs/kconfig +++ b/sound/soc/codecs/kconfig - imply snd_soc_tlv320aic3x + imply snd_soc_tlv320aic3x_i2c - tristate "texas instruments tlv320aic3x codecs" + tristate + +config snd_soc_tlv320aic3x_i2c + tristate "texas instruments tlv320aic3x audio codecs - i2c" + select snd_soc_tlv320aic3x + select regmap_i2c diff --git a/sound/soc/codecs/makefile b/sound/soc/codecs/makefile --- a/sound/soc/codecs/makefile +++ b/sound/soc/codecs/makefile +snd-soc-tlv320aic3x-i2c-objs := tlv320aic3x-i2c.o +obj-$(config_snd_soc_tlv320aic3x_i2c) += snd-soc-tlv320aic3x-i2c.o diff --git a/sound/soc/codecs/tlv320aic3x-i2c.c b/sound/soc/codecs/tlv320aic3x-i2c.c --- /dev/null +++ b/sound/soc/codecs/tlv320aic3x-i2c.c +/* spdx-license-identifier: gpl-2.0-only + * + * alsa soc tlv320aic3x codec driver i2c interface + * + * author: arun ks, <arunks@mistralsolutions.com> + * copyright: (c) 2008 mistral solutions pvt ltd., + * + * based on sound/soc/codecs/wm8731.c by richard purdie + * + */ + +#include <linux/i2c.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/regmap.h> +#include <sound/soc.h> + +#include "tlv320aic3x.h" + +static int aic3x_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id) +{ + struct regmap *regmap; + struct regmap_config config; + + config = aic3x_regmap; + config.reg_bits = 8; + config.val_bits = 8; + + regmap = devm_regmap_init_i2c(i2c, &config); + return aic3x_probe(&i2c->dev, regmap, id->driver_data); +} + +static int aic3x_i2c_remove(struct i2c_client *i2c) +{ + return aic3x_remove(&i2c->dev); +} + +static const struct i2c_device_id aic3x_i2c_id[] = { + { "tlv320aic3x", aic3x_model_3x }, + { "tlv320aic33", aic3x_model_33 }, + { "tlv320aic3007", aic3x_model_3007 }, + { "tlv320aic3104", aic3x_model_3104 }, + { } +}; +module_device_table(i2c, aic3x_i2c_id); + +static const struct of_device_id aic3x_of_id[] = { + { .compatible = "ti,tlv320aic3x", }, + { .compatible = "ti,tlv320aic33" }, + { .compatible = "ti,tlv320aic3007" }, + { .compatible = "ti,tlv320aic3104" }, + {}, +}; +module_device_table(of, aic3x_of_id); + +static struct i2c_driver aic3x_i2c_driver = { + .driver = { + .name = "tlv320aic3x", + .of_match_table = aic3x_of_id, + }, + .probe = aic3x_i2c_probe, + .remove = aic3x_i2c_remove, + .id_table = aic3x_i2c_id, +}; + +module_i2c_driver(aic3x_i2c_driver); + +module_description("asoc tlv320aic3x codec driver i2c"); +module_author("arun ks <arunks@mistralsolutions.com>"); +module_license("gpl"); diff --git a/sound/soc/codecs/tlv320aic3x.c b/sound/soc/codecs/tlv320aic3x.c --- a/sound/soc/codecs/tlv320aic3x.c +++ b/sound/soc/codecs/tlv320aic3x.c -/* - * alsa soc tlv320aic3x codec driver +/* alsa soc tlv320aic3x codec driver -static const struct regmap_config aic3x_regmap = { - .reg_bits = 8, - .val_bits = 8, - +const struct regmap_config aic3x_regmap = { +export_symbol_gpl(aic3x_regmap); -static void aic3x_configure_ocmv(struct i2c_client *client) +static void aic3x_configure_ocmv(struct device *dev, struct aic3x_priv *aic3x) - struct device_node *np = client->dev.of_node; - struct aic3x_priv *aic3x = i2c_get_clientdata(client); + struct device_node *np = dev->of_node; - dev_warn(&client->dev, + dev_warn(dev, - dev_warn(&client->dev, + dev_warn(dev, -/* - * aic3x 2 wire address can be up to 4 devices with device addresses - * 0x18, 0x19, 0x1a, 0x1b - */ - -static const struct i2c_device_id aic3x_i2c_id[] = { - { "tlv320aic3x", aic3x_model_3x }, - { "tlv320aic33", aic3x_model_33 }, - { "tlv320aic3007", aic3x_model_3007 }, - { "tlv320aic3106", aic3x_model_3x }, - { "tlv320aic3104", aic3x_model_3104 }, - { } -}; -module_device_table(i2c, aic3x_i2c_id); -/* - * if the i2c layer weren't so broken, we could pass this kind of data - * around - */ -static int aic3x_i2c_probe(struct i2c_client *i2c, - const struct i2c_device_id *id) +int aic3x_probe(struct device *dev, struct regmap *regmap, kernel_ulong_t driver_data) - struct aic3x_pdata *pdata = i2c->dev.platform_data; + struct aic3x_pdata *pdata = dev->platform_data; - struct device_node *np = i2c->dev.of_node; + struct device_node *np = dev->of_node; - aic3x = devm_kzalloc(&i2c->dev, sizeof(struct aic3x_priv), gfp_kernel); + aic3x = devm_kzalloc(dev, sizeof(struct aic3x_priv), gfp_kernel); - aic3x->regmap = devm_regmap_init_i2c(i2c, &aic3x_regmap); + aic3x->regmap = regmap; - i2c_set_clientdata(i2c, aic3x); + dev_set_drvdata(dev, aic3x); - ai3x_setup = devm_kzalloc(&i2c->dev, sizeof(*ai3x_setup), - gfp_kernel); + ai3x_setup = devm_kzalloc(dev, sizeof(*ai3x_setup), gfp_kernel); - dev_warn(&i2c->dev, "using deprecated property "gpio-reset", please update your dt"); + dev_warn(dev, "using deprecated property "gpio-reset", please update your dt"); - dev_err(&i2c->dev, "unsuitable micbias voltage " + dev_err(dev, "unsuitable micbias voltage " - aic3x->model = id->driver_data; + aic3x->model = driver_data; - ret = devm_regulator_bulk_get(&i2c->dev, array_size(aic3x->supplies), + ret = devm_regulator_bulk_get(dev, array_size(aic3x->supplies), - dev_err(&i2c->dev, "failed to request supplies: %d ", ret); + dev_err(dev, "failed to request supplies: %d ", ret); - aic3x_configure_ocmv(i2c); + aic3x_configure_ocmv(dev, aic3x); - dev_err(&i2c->dev, "failed to init class d: %d ", + dev_err(dev, "failed to init class d: %d ", - ret = devm_snd_soc_register_component(&i2c->dev, - &soc_component_dev_aic3x, &aic3x_dai, 1); + ret = devm_snd_soc_register_component(dev, &soc_component_dev_aic3x, &aic3x_dai, 1); +export_symbol(aic3x_probe); -static int aic3x_i2c_remove(struct i2c_client *client) +int aic3x_remove(struct device *dev) - struct aic3x_priv *aic3x = i2c_get_clientdata(client); + struct aic3x_priv *aic3x = dev_get_drvdata(dev); - -#if defined(config_of) -static const struct of_device_id tlv320aic3x_of_match[] = { - { .compatible = "ti,tlv320aic3x", }, - { .compatible = "ti,tlv320aic33" }, - { .compatible = "ti,tlv320aic3007" }, - { .compatible = "ti,tlv320aic3106" }, - { .compatible = "ti,tlv320aic3104" }, - {}, -}; -module_device_table(of, tlv320aic3x_of_match); -#endif - -/* machine i2c codec control layer */ -static struct i2c_driver aic3x_i2c_driver = { - .driver = { - .name = "tlv320aic3x-codec", - .of_match_table = of_match_ptr(tlv320aic3x_of_match), - }, - .probe = aic3x_i2c_probe, - .remove = aic3x_i2c_remove, - .id_table = aic3x_i2c_id, -}; - -module_i2c_driver(aic3x_i2c_driver); +export_symbol(aic3x_remove); diff --git a/sound/soc/codecs/tlv320aic3x.h b/sound/soc/codecs/tlv320aic3x.h --- a/sound/soc/codecs/tlv320aic3x.h +++ b/sound/soc/codecs/tlv320aic3x.h +struct device; +struct regmap_config; + +extern const struct regmap_config aic3x_regmap; +int aic3x_probe(struct device *dev, struct regmap *regmap, kernel_ulong_t driver_data); +int aic3x_remove(struct device *dev); +
|
Audio
|
a96d2ba2d8248d5e8170f2f44f98d4a33329b08a
|
jiri prchal
|
sound
|
soc
|
codecs
|
asoc: codecs: tlv320aic3x: add spi support
|
added spi support.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
tlv320aic3x add spi support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ', 'soc codecs']
|
['kconfig', 'c', 'makefile']
| 3
| 85
| 0
|
--- diff --git a/sound/soc/codecs/kconfig b/sound/soc/codecs/kconfig --- a/sound/soc/codecs/kconfig +++ b/sound/soc/codecs/kconfig + imply snd_soc_tlv320aic3x_spi +config snd_soc_tlv320aic3x_spi + tristate "texas instruments tlv320aic3x audio codecs - spi" + depends on spi_master + select snd_soc_tlv320aic3x + select regmap_spi + diff --git a/sound/soc/codecs/makefile b/sound/soc/codecs/makefile --- a/sound/soc/codecs/makefile +++ b/sound/soc/codecs/makefile +snd-soc-tlv320aic3x-spi-objs := tlv320aic3x-spi.o +obj-$(config_snd_soc_tlv320aic3x_spi) += snd-soc-tlv320aic3x-spi.o diff --git a/sound/soc/codecs/tlv320aic3x-spi.c b/sound/soc/codecs/tlv320aic3x-spi.c --- /dev/null +++ b/sound/soc/codecs/tlv320aic3x-spi.c +/* spdx-license-identifier: gpl-2.0 + * + * alsa soc tlv320aic3x codec driver spi interface + * + * author: arun ks, <arunks@mistralsolutions.com> + * copyright: (c) 2008 mistral solutions pvt ltd., + * + * based on sound/soc/codecs/wm8731.c by richard purdie + * + */ + +#include <linux/spi/spi.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/regmap.h> +#include <sound/soc.h> + +#include "tlv320aic3x.h" + +static int aic3x_spi_probe(struct spi_device *spi) +{ + struct regmap *regmap; + struct regmap_config config; + const struct spi_device_id *id = spi_get_device_id(spi); + + config = aic3x_regmap; + config.reg_bits = 7; + config.pad_bits = 1; + config.val_bits = 8; + config.read_flag_mask = 0x01; + + dev_dbg(&spi->dev, "probing tlv320aic3x spi device "); + + regmap = devm_regmap_init_spi(spi, &config); + return aic3x_probe(&spi->dev, regmap, id->driver_data); +} + +static int aic3x_spi_remove(struct spi_device *spi) +{ + return aic3x_remove(&spi->dev); +} + +static const struct spi_device_id aic3x_spi_id[] = { + { "tlv320aic3x", aic3x_model_3x }, + { "tlv320aic33", aic3x_model_33 }, + { "tlv320aic3007", aic3x_model_3007 }, + { "tlv320aic3104", aic3x_model_3104 }, + { } +}; +module_device_table(spi, aic3x_spi_id); + +static const struct of_device_id aic3x_of_id[] = { + { .compatible = "ti,tlv320aic3x", }, + { .compatible = "ti,tlv320aic33" }, + { .compatible = "ti,tlv320aic3007" }, + { .compatible = "ti,tlv320aic3104" }, + {}, +}; +module_device_table(of, aic3x_of_id); + +static struct spi_driver aic3x_spi_driver = { + .driver = { + .name = "tlv320aic3x", + .owner = this_module, + .of_match_table = aic3x_of_id, + }, + .probe = aic3x_spi_probe, + .remove = aic3x_spi_remove, + .id_table = aic3x_spi_id, +}; + +module_spi_driver(aic3x_spi_driver); + +module_description("asoc tlv320aic3x codec driver spi"); +module_author("arun ks <arunks@mistralsolutions.com>"); +module_license("gpl");
|
Audio
|
fd4daab3b139a24e71cae5de4f0ca715dbb6634a
|
jiri prchal
|
sound
|
soc
|
codecs
|
asoc: codecs: tlv320aic3x: add aic3106
|
in dt binding is mentioned that this driver is compatible with 3106. so added compatibility string and model number.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add aic3106
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ', 'codecs', 'tlv320aic3x']
|
['h', 'c']
| 4
| 8
| 0
|
--- diff --git a/sound/soc/codecs/tlv320aic3x-i2c.c b/sound/soc/codecs/tlv320aic3x-i2c.c --- a/sound/soc/codecs/tlv320aic3x-i2c.c +++ b/sound/soc/codecs/tlv320aic3x-i2c.c + { "tlv320aic3106", aic3x_model_3106 }, + { .compatible = "ti,tlv320aic3106" }, diff --git a/sound/soc/codecs/tlv320aic3x-spi.c b/sound/soc/codecs/tlv320aic3x-spi.c --- a/sound/soc/codecs/tlv320aic3x-spi.c +++ b/sound/soc/codecs/tlv320aic3x-spi.c + { "tlv320aic3106", aic3x_model_3106 }, + { .compatible = "ti,tlv320aic3106" }, diff --git a/sound/soc/codecs/tlv320aic3x.c b/sound/soc/codecs/tlv320aic3x.c --- a/sound/soc/codecs/tlv320aic3x.c +++ b/sound/soc/codecs/tlv320aic3x.c + case aic3x_model_3106: + case aic3x_model_3106: + case aic3x_model_3106: diff --git a/sound/soc/codecs/tlv320aic3x.h b/sound/soc/codecs/tlv320aic3x.h --- a/sound/soc/codecs/tlv320aic3x.h +++ b/sound/soc/codecs/tlv320aic3x.h +#define aic3x_model_3106 4
|
Audio
|
a0bc855ffdb55cbb9fbf7fa9611d17f19db889a8
|
jiri prchal
|
sound
|
soc
|
codecs
|
asoc: cs42l42: add capture support
|
add support for capture path on headseat pins
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
report jack and button detection + capture support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ', 'cs42l42']
|
['h', 'c']
| 2
| 51
| 0
|
--- diff --git a/sound/soc/codecs/cs42l42.c b/sound/soc/codecs/cs42l42.c --- a/sound/soc/codecs/cs42l42.c +++ b/sound/soc/codecs/cs42l42.c + + /* capture path */ + snd_soc_dapm_input("hs"), + snd_soc_dapm_adc("adc", null, cs42l42_pwr_ctl1, cs42l42_adc_pdn_shift, 1), + snd_soc_dapm_aif_out("sdout1", null, 0, cs42l42_asp_tx_ch_en, cs42l42_asp_tx0_ch1_shift, 0), + snd_soc_dapm_aif_out("sdout2", null, 1, cs42l42_asp_tx_ch_en, cs42l42_asp_tx0_ch2_shift, 0), + + /* capture requirements */ + snd_soc_dapm_supply("asp dao0", cs42l42_pwr_ctl1, cs42l42_asp_dao_pdn_shift, 1, null, 0), + snd_soc_dapm_supply("asp tx en", cs42l42_asp_tx_sz_en, cs42l42_asp_tx_en_shift, 0, null, 0), + + /* playback/capture requirements */ + + /* capture path */ + {"adc", null, "hs"}, + { "sdout1", null, "adc" }, + { "sdout2", null, "adc" }, + { "capture", null, "sdout1" }, + { "capture", null, "sdout2" }, + + /* capture requirements */ + { "sdout1", null, "asp dao0" }, + { "sdout2", null, "asp dao0" }, + { "sdout1", null, "sclk" }, + { "sdout2", null, "sclk" }, + { "sdout1", null, "asp tx en" }, + { "sdout2", null, "asp tx en" }, + unsigned int channels = params_channels(params); + case sndrv_pcm_stream_capture: + if (channels == 2) { + val |= cs42l42_asp_tx_ch2_ap_mask; + val |= width << cs42l42_asp_tx_ch2_res_shift; + } + val |= width << cs42l42_asp_tx_ch1_res_shift; + + snd_soc_component_update_bits(component, cs42l42_asp_tx_ch_ap_res, + cs42l42_asp_tx_ch1_ap_mask | cs42l42_asp_tx_ch2_ap_mask | + cs42l42_asp_tx_ch2_res_mask | cs42l42_asp_tx_ch1_res_mask, val); + break; diff --git a/sound/soc/codecs/cs42l42.h b/sound/soc/codecs/cs42l42.h --- a/sound/soc/codecs/cs42l42.h +++ b/sound/soc/codecs/cs42l42.h +#define cs42l42_asp_tx_en_shift 0 +#define cs42l42_asp_tx0_ch2_shift 1 +#define cs42l42_asp_tx0_ch1_shift 0 + +#define cs42l42_asp_tx_ch1_ap_shift 7 +#define cs42l42_asp_tx_ch1_ap_mask (1 << cs42l42_asp_tx_ch1_ap_shift) +#define cs42l42_asp_tx_ch2_ap_shift 6 +#define cs42l42_asp_tx_ch2_ap_mask (1 << cs42l42_asp_tx_ch2_ap_shift) +#define cs42l42_asp_tx_ch2_res_shift 2 +#define cs42l42_asp_tx_ch2_res_mask (3 << cs42l42_asp_tx_ch2_res_shift) +#define cs42l42_asp_tx_ch1_res_shift 0 +#define cs42l42_asp_tx_ch1_res_mask (3 << cs42l42_asp_tx_ch1_res_shift)
|
Audio
|
585e7079de0eac555bcdfe6284e439ee05fb18cb
|
lucas tanure
|
sound
|
soc
|
codecs
|
asoc: cs42l42: report jack and button detection
|
report the jack events to the user space through alsa. also moves request_threaded_irq() to component_probe so it don't get interrupts before the initialization the struct snd_soc_jack.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
report jack and button detection + capture support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ', 'cs42l42']
|
['h', 'c']
| 2
| 59
| 14
|
--- diff --git a/sound/soc/codecs/cs42l42.c b/sound/soc/codecs/cs42l42.c --- a/sound/soc/codecs/cs42l42.c +++ b/sound/soc/codecs/cs42l42.c + struct snd_soc_card *crd = component->card; + int ret = 0; - return 0; + ret = snd_soc_card_jack_new(crd, "cs42l42 headset", snd_jack_headset | snd_jack_btn_0 | + snd_jack_btn_1 | snd_jack_btn_2 | snd_jack_btn_3, + &cs42l42->jack, null, 0); + if (ret < 0) + dev_err(component->dev, "cannot create cs42l42 headset: %d ", ret); + + return ret; -static void cs42l42_handle_button_press(struct cs42l42_private *cs42l42) +static int cs42l42_handle_button_press(struct cs42l42_private *cs42l42) + bias_level = snd_jack_btn_2; + bias_level = snd_jack_btn_1; + bias_level = snd_jack_btn_3; + bias_level = snd_jack_btn_0; + default: + bias_level = 0; + break; + + return bias_level; + int report = 0; + - dev_dbg(component->dev, - "auto detect done (%d) ", - cs42l42->hs_type); + switch(cs42l42->hs_type){ + case cs42l42_plug_ctia: + case cs42l42_plug_omtp: + snd_soc_jack_report(&cs42l42->jack, snd_jack_headset, + snd_jack_headset); + break; + case cs42l42_plug_headphone: + snd_soc_jack_report(&cs42l42->jack, snd_jack_headphone, + snd_jack_headphone); + break; + default: + break; + } + dev_dbg(component->dev, "auto detect done (%d) ", cs42l42->hs_type); - dev_dbg(component->dev, - "unplug event "); + + switch(cs42l42->hs_type){ + case cs42l42_plug_ctia: + case cs42l42_plug_omtp: + snd_soc_jack_report(&cs42l42->jack, 0, snd_jack_headset); + break; + case cs42l42_plug_headphone: + snd_soc_jack_report(&cs42l42->jack, 0, snd_jack_headphone); + break; + default: + break; + } + dev_dbg(component->dev, "unplug event "); - if (current_button_status & - cs42l42_m_detect_tf_mask) { - dev_dbg(component->dev, - "button released "); - } else if (current_button_status & - cs42l42_m_detect_ft_mask) { - cs42l42_handle_button_press(cs42l42); + if (current_button_status & cs42l42_m_detect_tf_mask) { + dev_dbg(component->dev, "button released "); + report = 0; + } else if (current_button_status & cs42l42_m_detect_ft_mask) { + report = cs42l42_handle_button_press(cs42l42); + + snd_soc_jack_report(&cs42l42->jack, report, snd_jack_btn_0 | snd_jack_btn_1 | + snd_jack_btn_2 | snd_jack_btn_3); diff --git a/sound/soc/codecs/cs42l42.h b/sound/soc/codecs/cs42l42.h --- a/sound/soc/codecs/cs42l42.h +++ b/sound/soc/codecs/cs42l42.h +#include <sound/jack.h> + + struct snd_soc_jack jack;
|
Audio
|
c5b8ee0879bcdc5082d42fe92d3c235b74feef37
|
lucas tanure
|
sound
|
soc
|
codecs
|
asoc: fsl-asoc-card: add support for wm8958 codec
|
wm8958 codec is used on some i.mx based platform. so add it support in this generic driver.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add support for wm8958 codec
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ', 'fsl-asoc-card']
|
['kconfig', 'c']
| 2
| 17
| 2
|
--- diff --git a/sound/soc/fsl/kconfig b/sound/soc/fsl/kconfig --- a/sound/soc/fsl/kconfig +++ b/sound/soc/fsl/kconfig + select snd_soc_wm8994 + select mfd_wm8994 diff --git a/sound/soc/fsl/fsl-asoc-card.c b/sound/soc/fsl/fsl-asoc-card.c --- a/sound/soc/fsl/fsl-asoc-card.c +++ b/sound/soc/fsl/fsl-asoc-card.c +#include "../codecs/wm8994.h" + * @free_freq: clock rate of mclk for hw_free() + unsigned long free_freq; - /* force freq to be 0 to avoid error message in codec */ + /* force freq to be free_freq to avoid error message in codec */ - 0, + codec_priv->free_freq, + } else if (of_device_is_compatible(np, "fsl,imx-audio-wm8958")) { + codec_dai_name = "wm8994-aif1"; + priv->dai_fmt |= snd_soc_daifmt_cbm_cfm; + priv->codec_priv.mclk_id = wm8994_fll_src_mclk1; + priv->codec_priv.fll_id = wm8994_sysclk_fll1; + priv->codec_priv.pll_id = wm8994_fll1; + priv->codec_priv.free_freq = priv->codec_priv.mclk_freq; + priv->card.dapm_routes = null; + priv->card.num_dapm_routes = 0; + { .compatible = "fsl,imx-audio-wm8958", },
|
Audio
|
efd0b1660829a987354cea6a446179c7ac7cd0e6
|
shengjiu wang
|
sound
|
soc
|
fsl
|
asoc: fsl_sai: add pm qos cpu latency support
|
on socs such as i.mx7ulp, cpuidle has some levels which may disable system/bus clocks, so need to add pm_qos to prevent cpuidle from entering low level idles and make sure system/bus clocks are enabled when sai is active.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add pm qos cpu latency support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ', 'fsl_sai']
|
['h', 'c']
| 2
| 16
| 0
|
--- diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c --- a/sound/soc/fsl/fsl_sai.c +++ b/sound/soc/fsl/fsl_sai.c +#include <linux/pm_qos.h> + .flags = 0, + .flags = 0, + .flags = pmqos_cpu_latency, + .flags = 0, + .flags = 0, + if (sai->soc_data->flags & pmqos_cpu_latency) + cpu_latency_qos_remove_request(&sai->pm_qos_req); + + if (sai->soc_data->flags & pmqos_cpu_latency) + cpu_latency_qos_add_request(&sai->pm_qos_req, 0); + diff --git a/sound/soc/fsl/fsl_sai.h b/sound/soc/fsl/fsl_sai.h --- a/sound/soc/fsl/fsl_sai.h +++ b/sound/soc/fsl/fsl_sai.h +#define pmqos_cpu_latency bit(0) + + unsigned int flags; + struct pm_qos_request pm_qos_req;
|
Audio
|
907e0cdebc1f36623ca8ce6a6376abb1ad56e93d
|
shengjiu wang
|
sound
|
soc
|
fsl
|
asoc: soc-component: add snd_soc_pcm_component_ack
|
add snd_soc_pcm_component_ack back, which can be used to get an updated buffer pointer in the platform driver. on asymmetric multiprocessor, this pointer can be sent to cortex-m core for audio processing.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add audio driver base on rpmsg on i.mx platform
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ']
|
['h', 'c']
| 3
| 19
| 0
|
--- diff --git a/include/sound/soc-component.h b/include/sound/soc-component.h --- a/include/sound/soc-component.h +++ b/include/sound/soc-component.h + int (*ack)(struct snd_soc_component *component, + struct snd_pcm_substream *substream); +int snd_soc_pcm_component_ack(struct snd_pcm_substream *substream); diff --git a/sound/soc/soc-component.c b/sound/soc/soc-component.c --- a/sound/soc/soc-component.c +++ b/sound/soc/soc-component.c + +int snd_soc_pcm_component_ack(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); + struct snd_soc_component *component; + int i; + + /* fixme: use 1st pointer */ + for_each_rtd_components(rtd, i, component) + if (component->driver->ack) + return component->driver->ack(component, substream); + + return 0; +} diff --git a/sound/soc/soc-pcm.c b/sound/soc/soc-pcm.c --- a/sound/soc/soc-pcm.c +++ b/sound/soc/soc-pcm.c + if (drv->ack) + rtd->ops.ack = snd_soc_pcm_component_ack;
|
Audio
|
8bdfc0455e3a59e2c1207a56be22e910fae0e0d5
|
shengjiu wang
|
sound
|
soc
| |
asoc: fsl_rpmsg: add cpu dai driver for audio base on rpmsg
|
this is a cpu dai driver for rpmsg audio use case, which is mainly used for getting the user's configuration from devicetree and configure the clocks which is used by cortex-m core.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add audio driver base on rpmsg on i.mx platform
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ']
|
['h', 'kconfig', 'c', 'makefile']
| 4
| 326
| 0
|
--- diff --git a/sound/soc/fsl/kconfig b/sound/soc/fsl/kconfig --- a/sound/soc/fsl/kconfig +++ b/sound/soc/fsl/kconfig +config snd_soc_fsl_rpmsg + tristate "nxp audio base on rpmsg support" + depends on common_clk + depends on rpmsg + select snd_soc_imx_rpmsg if snd_imx_soc != n + help + say y if you want to add rpmsg audio support for the freescale cpus. + this option is only useful for out-of-tree drivers since + in-tree drivers select it automatically. + diff --git a/sound/soc/fsl/makefile b/sound/soc/fsl/makefile --- a/sound/soc/fsl/makefile +++ b/sound/soc/fsl/makefile +snd-soc-fsl-rpmsg-objs := fsl_rpmsg.o +obj-$(config_snd_soc_fsl_rpmsg) += snd-soc-fsl-rpmsg.o diff --git a/sound/soc/fsl/fsl_rpmsg.c b/sound/soc/fsl/fsl_rpmsg.c --- /dev/null +++ b/sound/soc/fsl/fsl_rpmsg.c +// spdx-license-identifier: gpl-2.0+ +// copyright 2018-2021 nxp + +#include <linux/clk.h> +#include <linux/clk-provider.h> +#include <linux/delay.h> +#include <linux/dmaengine.h> +#include <linux/module.h> +#include <linux/of_device.h> +#include <linux/of_address.h> +#include <linux/pm_runtime.h> +#include <linux/rpmsg.h> +#include <linux/slab.h> +#include <sound/core.h> +#include <sound/dmaengine_pcm.h> +#include <sound/pcm_params.h> + +#include "fsl_rpmsg.h" +#include "imx-pcm.h" + +#define fsl_rpmsg_rates (sndrv_pcm_rate_8000 | \ + sndrv_pcm_rate_16000 | \ + sndrv_pcm_rate_48000) +#define fsl_rpmsg_formats sndrv_pcm_fmtbit_s16_le + +/* 192khz/32bit/2ch/60s size is 0x574e00 */ +#define lpa_large_buffer_size (0x6000000) + +static const unsigned int fsl_rpmsg_rates[] = { + 8000, 11025, 16000, 22050, 44100, + 32000, 48000, 96000, 88200, 176400, 192000, + 352800, 384000, 705600, 768000, 1411200, 2822400, +}; + +static const struct snd_pcm_hw_constraint_list fsl_rpmsg_rate_constraints = { + .count = array_size(fsl_rpmsg_rates), + .list = fsl_rpmsg_rates, +}; + +static int fsl_rpmsg_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct fsl_rpmsg *rpmsg = snd_soc_dai_get_drvdata(dai); + struct clk *p = rpmsg->mclk, *pll = 0, *npll = 0; + u64 rate = params_rate(params); + int ret = 0; + + /* get current pll parent */ + while (p && rpmsg->pll8k && rpmsg->pll11k) { + struct clk *pp = clk_get_parent(p); + + if (clk_is_match(pp, rpmsg->pll8k) || + clk_is_match(pp, rpmsg->pll11k)) { + pll = pp; + break; + } + p = pp; + } + + /* switch to another pll parent if needed. */ + if (pll) { + npll = (do_div(rate, 8000) ? rpmsg->pll11k : rpmsg->pll8k); + if (!clk_is_match(pll, npll)) { + ret = clk_set_parent(p, npll); + if (ret < 0) + dev_warn(dai->dev, "failed to set parent %s: %d ", + __clk_get_name(npll), ret); + } + } + + if (!(rpmsg->mclk_streams & bit(substream->stream))) { + ret = clk_prepare_enable(rpmsg->mclk); + if (ret) { + dev_err(dai->dev, "failed to enable mclk: %d ", ret); + return ret; + } + + rpmsg->mclk_streams |= bit(substream->stream); + } + + return ret; +} + +static int fsl_rpmsg_hw_free(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct fsl_rpmsg *rpmsg = snd_soc_dai_get_drvdata(dai); + + if (rpmsg->mclk_streams & bit(substream->stream)) { + clk_disable_unprepare(rpmsg->mclk); + rpmsg->mclk_streams &= ~bit(substream->stream); + } + + return 0; +} + +static int fsl_rpmsg_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *cpu_dai) +{ + int ret; + + ret = snd_pcm_hw_constraint_list(substream->runtime, 0, + sndrv_pcm_hw_param_rate, + &fsl_rpmsg_rate_constraints); + + return ret; +} + +static const struct snd_soc_dai_ops fsl_rpmsg_dai_ops = { + .startup = fsl_rpmsg_startup, + .hw_params = fsl_rpmsg_hw_params, + .hw_free = fsl_rpmsg_hw_free, +}; + +static struct snd_soc_dai_driver fsl_rpmsg_dai = { + .playback = { + .stream_name = "cpu-playback", + .channels_min = 2, + .channels_max = 2, + .rates = sndrv_pcm_rate_knot, + .formats = fsl_rpmsg_formats, + }, + .capture = { + .stream_name = "cpu-capture", + .channels_min = 2, + .channels_max = 2, + .rates = sndrv_pcm_rate_knot, + .formats = fsl_rpmsg_formats, + }, + .symmetric_rate = 1, + .symmetric_channels = 1, + .symmetric_sample_bits = 1, + .ops = &fsl_rpmsg_dai_ops, +}; + +static const struct snd_soc_component_driver fsl_component = { + .name = "fsl-rpmsg", +}; + +static const struct of_device_id fsl_rpmsg_ids[] = { + { .compatible = "fsl,imx7ulp-rpmsg-audio"}, + { .compatible = "fsl,imx8mm-rpmsg-audio"}, + { .compatible = "fsl,imx8mn-rpmsg-audio"}, + { .compatible = "fsl,imx8mp-rpmsg-audio"}, + { /* sentinel */ } +}; +module_device_table(of, fsl_rpmsg_ids); + +static int fsl_rpmsg_probe(struct platform_device *pdev) +{ + struct device_node *np = pdev->dev.of_node; + struct fsl_rpmsg *rpmsg; + int ret; + + rpmsg = devm_kzalloc(&pdev->dev, sizeof(struct fsl_rpmsg), gfp_kernel); + if (!rpmsg) + return -enomem; + + if (of_property_read_bool(np, "fsl,enable-lpa")) { + rpmsg->enable_lpa = 1; + rpmsg->buffer_size = lpa_large_buffer_size; + } else { + rpmsg->buffer_size = imx_default_dmabuf_size; + } + + /* get the optional clocks */ + rpmsg->ipg = devm_clk_get(&pdev->dev, "ipg"); + if (is_err(rpmsg->ipg)) + rpmsg->ipg = null; + + rpmsg->mclk = devm_clk_get(&pdev->dev, "mclk"); + if (is_err(rpmsg->mclk)) + rpmsg->mclk = null; + + rpmsg->dma = devm_clk_get(&pdev->dev, "dma"); + if (is_err(rpmsg->dma)) + rpmsg->dma = null; + + rpmsg->pll8k = devm_clk_get(&pdev->dev, "pll8k"); + if (is_err(rpmsg->pll8k)) + rpmsg->pll8k = null; + + rpmsg->pll11k = devm_clk_get(&pdev->dev, "pll11k"); + if (is_err(rpmsg->pll11k)) + rpmsg->pll11k = null; + + platform_set_drvdata(pdev, rpmsg); + pm_runtime_enable(&pdev->dev); + + ret = devm_snd_soc_register_component(&pdev->dev, &fsl_component, + &fsl_rpmsg_dai, 1); + if (ret) + return ret; + + rpmsg->card_pdev = platform_device_register_data(&pdev->dev, + "imx-audio-rpmsg", + platform_devid_none, + null, + 0); + if (is_err(rpmsg->card_pdev)) { + dev_err(&pdev->dev, "failed to register rpmsg card "); + ret = ptr_err(rpmsg->card_pdev); + return ret; + } + + return 0; +} + +static int fsl_rpmsg_remove(struct platform_device *pdev) +{ + struct fsl_rpmsg *rpmsg = platform_get_drvdata(pdev); + + if (rpmsg->card_pdev) + platform_device_unregister(rpmsg->card_pdev); + + return 0; +} + +#ifdef config_pm +static int fsl_rpmsg_runtime_resume(struct device *dev) +{ + struct fsl_rpmsg *rpmsg = dev_get_drvdata(dev); + int ret; + + ret = clk_prepare_enable(rpmsg->ipg); + if (ret) { + dev_err(dev, "failed to enable ipg clock: %d ", ret); + goto ipg_err; + } + + ret = clk_prepare_enable(rpmsg->dma); + if (ret) { + dev_err(dev, "failed to enable dma clock %d ", ret); + goto dma_err; + } + + return 0; + +dma_err: + clk_disable_unprepare(rpmsg->ipg); +ipg_err: + return ret; +} + +static int fsl_rpmsg_runtime_suspend(struct device *dev) +{ + struct fsl_rpmsg *rpmsg = dev_get_drvdata(dev); + + clk_disable_unprepare(rpmsg->dma); + clk_disable_unprepare(rpmsg->ipg); + + return 0; +} +#endif + +static const struct dev_pm_ops fsl_rpmsg_pm_ops = { + set_runtime_pm_ops(fsl_rpmsg_runtime_suspend, + fsl_rpmsg_runtime_resume, + null) + set_system_sleep_pm_ops(pm_runtime_force_suspend, + pm_runtime_force_resume) +}; + +static struct platform_driver fsl_rpmsg_driver = { + .probe = fsl_rpmsg_probe, + .remove = fsl_rpmsg_remove, + .driver = { + .name = "fsl_rpmsg", + .pm = &fsl_rpmsg_pm_ops, + .of_match_table = fsl_rpmsg_ids, + }, +}; +module_platform_driver(fsl_rpmsg_driver); + +module_description("freescale soc audio prmsg cpu interface"); +module_author("shengjiu wang <shengjiu.wang@nxp.com>"); +module_alias("platform:fsl_rpmsg"); +module_license("gpl"); diff --git a/sound/soc/fsl/fsl_rpmsg.h b/sound/soc/fsl/fsl_rpmsg.h --- /dev/null +++ b/sound/soc/fsl/fsl_rpmsg.h +/* spdx-license-identifier: gpl-2.0 */ +/* + * copyright 2017-2021 nxp + */ + +#ifndef __fsl_rpmsg_h +#define __fsl_rpmsg_h + +/* + * struct fsl_rpmsg - rpmsg private data + * + * @ipg: ipg clock for cpu dai (sai) + * @mclk: master clock for cpu dai (sai) + * @dma: clock for dma device + * @pll8k: parent clock for multiple of 8khz frequency + * @pll11k: parent clock for multiple of 11khz frequency + * @card_pdev: platform_device pointer to register a sound card + * @mclk_streams: active streams that are using baudclk + * @force_lpa: force enable low power audio routine if condition satisfy + * @enable_lpa: enable low power audio routine according to dts setting + * @buffer_size: pre allocated dma buffer size + */ +struct fsl_rpmsg { + struct clk *ipg; + struct clk *mclk; + struct clk *dma; + struct clk *pll8k; + struct clk *pll11k; + struct platform_device *card_pdev; + unsigned int mclk_streams; + int force_lpa; + int enable_lpa; + int buffer_size; +}; +#endif /* __fsl_rpmsg_h */
|
Audio
|
b73d9e6225e86492f6a901223a34ecfa7b55c178
|
shengjiu wang
|
sound
|
soc
|
fsl
|
asoc: dt-bindings: fsl_rpmsg: add binding doc for rpmsg audio device
|
fsl_rpmsg is a virtual audio device. mapping to real hardware devices are sai, dma controlled by cortex m core. what we see from linux side is a device which provides audio service by rpmsg channel.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add audio driver base on rpmsg on i.mx platform
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ']
|
['yaml']
| 1
| 108
| 0
|
--- diff --git a/documentation/devicetree/bindings/sound/fsl,rpmsg.yaml b/documentation/devicetree/bindings/sound/fsl,rpmsg.yaml --- /dev/null +++ b/documentation/devicetree/bindings/sound/fsl,rpmsg.yaml +# spdx-license-identifier: (gpl-2.0-only or bsd-2-clause) +%yaml 1.2 +--- +$id: http://devicetree.org/schemas/sound/fsl,rpmsg.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: nxp audio rpmsg cpu dai controller + +maintainers: + - shengjiu wang <shengjiu.wang@nxp.com> + +description: | + fsl_rpmsg is a virtual audio device. mapping to real hardware devices + are sai, dma controlled by cortex m core. what we see from linux + side is a device which provides audio service by rpmsg channel. + +properties: + compatible: + enum: + - fsl,imx7ulp-rpmsg-audio + - fsl,imx8mn-rpmsg-audio + - fsl,imx8mm-rpmsg-audio + - fsl,imx8mp-rpmsg-audio + + model: + $ref: /schemas/types.yaml#/definitions/string + description: user specified audio sound card name + + clocks: + items: + - description: peripheral clock for register access + - description: master clock + - description: dma clock for dma register access + - description: parent clock for multiple of 8khz sample rates + - description: parent clock for multiple of 11khz sample rates + + clock-names: + items: + - const: ipg + - const: mclk + - const: dma + - const: pll8k + - const: pll11k + + power-domains: + description: + list of phandle and pm domain specifier as documented in + documentation/devicetree/bindings/power/power_domain.txt + maxitems: 1 + + memory-region: + $ref: /schemas/types.yaml#/definitions/phandle + description: + phandle to a node describing reserved memory (system ram memory) + the m core can't access all the ddr memory space on some platform, + so reserved a specific memory for dma buffer which m core can + access. + (see bindings/reserved-memory/reserved-memory.txt) + + audio-codec: + $ref: /schemas/types.yaml#/definitions/phandle + description: the phandle to a node of audio codec + + audio-routing: + $ref: /schemas/types.yaml#/definitions/non-unique-string-array + description: | + a list of the connections between audio components. each entry is a + pair of strings, the first being the connection's sink, the second + being the connection's source. + + fsl,enable-lpa: + $ref: /schemas/types.yaml#/definitions/flag + description: enable low power audio path. + + fsl,rpmsg-out: + $ref: /schemas/types.yaml#/definitions/flag + description: | + this is a boolean property. if present, the transmitting function + will be enabled. + + fsl,rpmsg-in: + $ref: /schemas/types.yaml#/definitions/flag + description: | + this is a boolean property. if present, the receiving function + will be enabled. + +required: + - compatible + - model + +additionalproperties: false + +examples: + - | + #include <dt-bindings/clock/imx8mn-clock.h> + + rpmsg_audio: rpmsg_audio { + compatible = "fsl,imx8mn-rpmsg-audio"; + model = "wm8524-audio"; + fsl,enable-lpa; + fsl,rpmsg-out; + clocks = <&clk imx8mn_clk_sai3_ipg>, + <&clk imx8mn_clk_sai3_root>, + <&clk imx8mn_clk_sdma3_root>, + <&clk imx8mn_audio_pll1_out>, + <&clk imx8mn_audio_pll2_out>; + clock-names = "ipg", "mclk", "dma", "pll8k", "pll11k"; + };
|
Audio
|
49c6bf62498344fa8f8af2314231f3eb37e0e150
|
shengjiu wang
|
documentation
|
devicetree
|
bindings, sound
|
asoc: imx-audio-rpmsg: add rpmsg_driver for audio channel
|
this driver is used to accept the message from rpmsg audio channel, and if this driver is probed, it will help to register the platform driver, the platform driver will use this audio channel to send and receive messages to and from cortex-m core.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add audio driver base on rpmsg on i.mx platform
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ']
|
['kconfig', 'c', 'makefile']
| 3
| 145
| 0
|
--- diff --git a/sound/soc/fsl/kconfig b/sound/soc/fsl/kconfig --- a/sound/soc/fsl/kconfig +++ b/sound/soc/fsl/kconfig +config snd_soc_imx_audio_rpmsg + tristate + depends on rpmsg + diff --git a/sound/soc/fsl/makefile b/sound/soc/fsl/makefile --- a/sound/soc/fsl/makefile +++ b/sound/soc/fsl/makefile +obj-$(config_snd_soc_imx_audio_rpmsg) += imx-audio-rpmsg.o diff --git a/sound/soc/fsl/imx-audio-rpmsg.c b/sound/soc/fsl/imx-audio-rpmsg.c --- /dev/null +++ b/sound/soc/fsl/imx-audio-rpmsg.c +// spdx-license-identifier: gpl-2.0+ +// copyright 2017-2020 nxp + +#include <linux/module.h> +#include <linux/rpmsg.h> +#include "imx-pcm-rpmsg.h" + +/* + * struct imx_audio_rpmsg: private data + * + * @rpmsg_pdev: pointer of platform device + */ +struct imx_audio_rpmsg { + struct platform_device *rpmsg_pdev; +}; + +static int imx_audio_rpmsg_cb(struct rpmsg_device *rpdev, void *data, int len, + void *priv, u32 src) +{ + struct imx_audio_rpmsg *rpmsg = dev_get_drvdata(&rpdev->dev); + struct rpmsg_r_msg *r_msg = (struct rpmsg_r_msg *)data; + struct rpmsg_info *info; + struct rpmsg_msg *msg; + unsigned long flags; + + if (!rpmsg->rpmsg_pdev) + return 0; + + info = platform_get_drvdata(rpmsg->rpmsg_pdev); + + dev_dbg(&rpdev->dev, "get from%d: cmd:%d. %d ", + src, r_msg->header.cmd, r_msg->param.resp); + + switch (r_msg->header.type) { + case msg_type_c: + /* type c is notification from m core */ + switch (r_msg->header.cmd) { + case tx_period_done: + spin_lock_irqsave(&info->lock[tx], flags); + msg = &info->msg[tx_period_done + msg_type_a_num]; + msg->r_msg.param.buffer_tail = + r_msg->param.buffer_tail; + msg->r_msg.param.buffer_tail %= info->num_period[tx]; + spin_unlock_irqrestore(&info->lock[tx], flags); + info->callback[tx](info->callback_param[tx]); + break; + case rx_period_done: + spin_lock_irqsave(&info->lock[rx], flags); + msg = &info->msg[rx_period_done + msg_type_a_num]; + msg->r_msg.param.buffer_tail = + r_msg->param.buffer_tail; + msg->r_msg.param.buffer_tail %= info->num_period[1]; + spin_unlock_irqrestore(&info->lock[rx], flags); + info->callback[rx](info->callback_param[rx]); + break; + default: + dev_warn(&rpdev->dev, "unknown msg command "); + break; + } + break; + case msg_type_b: + /* type b is response msg */ + memcpy(&info->r_msg, r_msg, sizeof(struct rpmsg_r_msg)); + complete(&info->cmd_complete); + break; + default: + dev_warn(&rpdev->dev, "unknown msg type "); + break; + } + + return 0; +} + +static int imx_audio_rpmsg_probe(struct rpmsg_device *rpdev) +{ + struct imx_audio_rpmsg *data; + int ret = 0; + + dev_info(&rpdev->dev, "new channel: 0x%x -> 0x%x! ", + rpdev->src, rpdev->dst); + + data = devm_kzalloc(&rpdev->dev, sizeof(*data), gfp_kernel); + if (!data) + return -enomem; + + dev_set_drvdata(&rpdev->dev, data); + + /* register platform driver for rpmsg routine */ + data->rpmsg_pdev = platform_device_register_data(&rpdev->dev, + imx_pcm_drv_name, + platform_devid_none, + null, 0); + if (is_err(data->rpmsg_pdev)) { + dev_err(&rpdev->dev, "failed to register rpmsg platform. "); + ret = ptr_err(data->rpmsg_pdev); + } + + return ret; +} + +static void imx_audio_rpmsg_remove(struct rpmsg_device *rpdev) +{ + struct imx_audio_rpmsg *data = dev_get_drvdata(&rpdev->dev); + + if (data->rpmsg_pdev) + platform_device_unregister(data->rpmsg_pdev); + + dev_info(&rpdev->dev, "audio rpmsg driver is removed "); +} + +static struct rpmsg_device_id imx_audio_rpmsg_id_table[] = { + { .name = "rpmsg-audio-channel" }, + { }, +}; + +static struct rpmsg_driver imx_audio_rpmsg_driver = { + .drv.name = "imx_audio_rpmsg", + .drv.owner = this_module, + .id_table = imx_audio_rpmsg_id_table, + .probe = imx_audio_rpmsg_probe, + .callback = imx_audio_rpmsg_cb, + .remove = imx_audio_rpmsg_remove, +}; + +static int __init imx_audio_rpmsg_init(void) +{ + return register_rpmsg_driver(&imx_audio_rpmsg_driver); +} + +static void __exit imx_audio_rpmsg_exit(void) +{ + unregister_rpmsg_driver(&imx_audio_rpmsg_driver); +} +module_init(imx_audio_rpmsg_init); +module_exit(imx_audio_rpmsg_exit); + +module_description("freescale soc audio rpmsg interface"); +module_author("shengjiu wang <shengjiu.wang@nxp.com>"); +module_alias("platform:imx_audio_rpmsg"); +module_license("gpl v2");
|
Audio
|
1935050de0b6c6c961e9de51d5b5d05642f861f1
|
shengjiu wang
|
sound
|
soc
|
fsl
|
asoc: imx-pcm-rpmsg: add platform driver for audio base on rpmsg
|
platform driver based on rpmsg is the interface for sending and receiving rpmsg to and from m core. it will tell the cortex-m core sound format/rate/channel, where is the data buffer, where is the period size, when to start, when to stop and when suspend or resume happen, each this behavior there is defined rpmsg command.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add audio driver base on rpmsg on i.mx platform
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ']
|
['h', 'kconfig', 'c', 'makefile']
| 4
| 1,436
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--- diff --git a/sound/soc/fsl/kconfig b/sound/soc/fsl/kconfig --- a/sound/soc/fsl/kconfig +++ b/sound/soc/fsl/kconfig +config snd_soc_imx_pcm_rpmsg + tristate + depends on snd_soc_imx_audio_rpmsg + select snd_soc_generic_dmaengine_pcm + diff --git a/sound/soc/fsl/makefile b/sound/soc/fsl/makefile --- a/sound/soc/fsl/makefile +++ b/sound/soc/fsl/makefile +obj-$(config_snd_soc_imx_pcm_rpmsg) += imx-pcm-rpmsg.o diff --git a/sound/soc/fsl/imx-pcm-rpmsg.c b/sound/soc/fsl/imx-pcm-rpmsg.c --- /dev/null +++ b/sound/soc/fsl/imx-pcm-rpmsg.c +// spdx-license-identifier: gpl-2.0+ +// copyright 2017-2021 nxp + +#include <linux/dma-mapping.h> +#include <linux/slab.h> +#include <linux/module.h> +#include <linux/delay.h> +#include <linux/rpmsg.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/dmaengine_pcm.h> +#include <sound/soc.h> + +#include "imx-pcm.h" +#include "fsl_rpmsg.h" +#include "imx-pcm-rpmsg.h" + +static struct snd_pcm_hardware imx_rpmsg_pcm_hardware = { + .info = sndrv_pcm_info_interleaved | + sndrv_pcm_info_block_transfer | + sndrv_pcm_info_mmap | + sndrv_pcm_info_mmap_valid | + sndrv_pcm_info_no_period_wakeup | + sndrv_pcm_info_pause | + sndrv_pcm_info_resume, + .buffer_bytes_max = imx_default_dmabuf_size, + .period_bytes_min = 512, + .period_bytes_max = 65536, + .periods_min = 2, + .periods_max = 6000, + .fifo_size = 0, +}; + +static int imx_rpmsg_pcm_send_message(struct rpmsg_msg *msg, + struct rpmsg_info *info) +{ + struct rpmsg_device *rpdev = info->rpdev; + int ret = 0; + + mutex_lock(&info->msg_lock); + if (!rpdev) { + dev_err(info->dev, "rpmsg channel not ready "); + mutex_unlock(&info->msg_lock); + return -einval; + } + + dev_dbg(&rpdev->dev, "send cmd %d ", msg->s_msg.header.cmd); + + if (!(msg->s_msg.header.type == msg_type_c)) + reinit_completion(&info->cmd_complete); + + ret = rpmsg_send(rpdev->ept, (void *)&msg->s_msg, + sizeof(struct rpmsg_s_msg)); + if (ret) { + dev_err(&rpdev->dev, "rpmsg_send failed: %d ", ret); + mutex_unlock(&info->msg_lock); + return ret; + } + + /* no receive msg for type_c command */ + if (msg->s_msg.header.type == msg_type_c) { + mutex_unlock(&info->msg_lock); + return 0; + } + + /* wait response from rpmsg */ + ret = wait_for_completion_timeout(&info->cmd_complete, + msecs_to_jiffies(rpmsg_timeout)); + if (!ret) { + dev_err(&rpdev->dev, "rpmsg_send cmd %d timeout! ", + msg->s_msg.header.cmd); + mutex_unlock(&info->msg_lock); + return -etimedout; + } + + memcpy(&msg->r_msg, &info->r_msg, sizeof(struct rpmsg_r_msg)); + memcpy(&info->msg[msg->r_msg.header.cmd].r_msg, + &msg->r_msg, sizeof(struct rpmsg_r_msg)); + + /* + * reset the buffer pointer to be zero, actully we have + * set the buffer pointer to be zero in imx_rpmsg_terminate_all + * but if there is timer task queued in queue, after it is + * executed the buffer pointer will be changed, so need to + * reset it again with terminate command. + */ + switch (msg->s_msg.header.cmd) { + case tx_terminate: + info->msg[tx_pointer].r_msg.param.buffer_offset = 0; + break; + case rx_terminate: + info->msg[rx_pointer].r_msg.param.buffer_offset = 0; + break; + default: + break; + } + + dev_dbg(&rpdev->dev, "cmd:%d, resp %d ", msg->s_msg.header.cmd, + info->r_msg.param.resp); + + mutex_unlock(&info->msg_lock); + + return 0; +} + +static int imx_rpmsg_insert_workqueue(struct snd_pcm_substream *substream, + struct rpmsg_msg *msg, + struct rpmsg_info *info) +{ + unsigned long flags; + int ret = 0; + + /* + * queue the work to workqueue. + * if the queue is full, drop the message. + */ + spin_lock_irqsave(&info->wq_lock, flags); + if (info->work_write_index != info->work_read_index) { + int index = info->work_write_index; + + memcpy(&info->work_list[index].msg, msg, + sizeof(struct rpmsg_s_msg)); + + queue_work(info->rpmsg_wq, &info->work_list[index].work); + info->work_write_index++; + info->work_write_index %= work_max_num; + } else { + info->msg_drop_count[substream->stream]++; + ret = -epipe; + } + spin_unlock_irqrestore(&info->wq_lock, flags); + + return ret; +} + +static int imx_rpmsg_pcm_hw_params(struct snd_soc_component *component, + struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct rpmsg_info *info = dev_get_drvdata(component->dev); + struct snd_pcm_runtime *runtime = substream->runtime; + struct rpmsg_msg *msg; + int ret = 0; + + if (substream->stream == sndrv_pcm_stream_playback) { + msg = &info->msg[tx_hw_param]; + msg->s_msg.header.cmd = tx_hw_param; + } else { + msg = &info->msg[rx_hw_param]; + msg->s_msg.header.cmd = rx_hw_param; + } + + msg->s_msg.param.rate = params_rate(params); + + switch (params_format(params)) { + case sndrv_pcm_format_s16_le: + msg->s_msg.param.format = rpmsg_s16_le; + break; + case sndrv_pcm_format_s24_le: + msg->s_msg.param.format = rpmsg_s24_le; + break; + case sndrv_pcm_format_dsd_u16_le: + msg->s_msg.param.format = sndrv_pcm_format_dsd_u16_le; + break; + case sndrv_pcm_format_dsd_u32_le: + msg->s_msg.param.format = sndrv_pcm_format_dsd_u32_le; + break; + default: + msg->s_msg.param.format = rpmsg_s32_le; + break; + } + + switch (params_channels(params)) { + case 1: + msg->s_msg.param.channels = rpmsg_ch_left; + break; + case 2: + msg->s_msg.param.channels = rpmsg_ch_stereo; + break; + default: + ret = -einval; + break; + } + + snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer); + runtime->dma_bytes = params_buffer_bytes(params); + + info->send_message(msg, info); + + return ret; +} + +static int imx_rpmsg_pcm_hw_free(struct snd_soc_component *component, + struct snd_pcm_substream *substream) +{ + snd_pcm_set_runtime_buffer(substream, null); + return 0; +} + +static snd_pcm_uframes_t imx_rpmsg_pcm_pointer(struct snd_soc_component *component, + struct snd_pcm_substream *substream) +{ + struct rpmsg_info *info = dev_get_drvdata(component->dev); + struct rpmsg_msg *msg; + unsigned int pos = 0; + int buffer_tail = 0; + + if (substream->stream == sndrv_pcm_stream_playback) + msg = &info->msg[tx_period_done + msg_type_a_num]; + else + msg = &info->msg[rx_period_done + msg_type_a_num]; + + buffer_tail = msg->r_msg.param.buffer_tail; + pos = buffer_tail * snd_pcm_lib_period_bytes(substream); + + return bytes_to_frames(substream->runtime, pos); +} + +static void imx_rpmsg_timer_callback(struct timer_list *t) +{ + struct stream_timer *stream_timer = + from_timer(stream_timer, t, timer); + struct snd_pcm_substream *substream = stream_timer->substream; + struct rpmsg_info *info = stream_timer->info; + struct rpmsg_msg *msg; + + if (substream->stream == sndrv_pcm_stream_playback) { + msg = &info->msg[tx_period_done + msg_type_a_num]; + msg->s_msg.header.cmd = tx_period_done; + } else { + msg = &info->msg[rx_period_done + msg_type_a_num]; + msg->s_msg.header.cmd = rx_period_done; + } + + imx_rpmsg_insert_workqueue(substream, msg, info); +} + +static int imx_rpmsg_pcm_open(struct snd_soc_component *component, + struct snd_pcm_substream *substream) +{ + struct rpmsg_info *info = dev_get_drvdata(component->dev); + struct rpmsg_msg *msg; + int ret = 0; + int cmd; + + if (substream->stream == sndrv_pcm_stream_playback) { + msg = &info->msg[tx_open]; + msg->s_msg.header.cmd = tx_open; + + /* reinitialize buffer counter*/ + cmd = tx_period_done + msg_type_a_num; + info->msg[cmd].s_msg.param.buffer_tail = 0; + info->msg[cmd].r_msg.param.buffer_tail = 0; + info->msg[tx_pointer].r_msg.param.buffer_offset = 0; + + } else { + msg = &info->msg[rx_open]; + msg->s_msg.header.cmd = rx_open; + + /* reinitialize buffer counter*/ + cmd = rx_period_done + msg_type_a_num; + info->msg[cmd].s_msg.param.buffer_tail = 0; + info->msg[cmd].r_msg.param.buffer_tail = 0; + info->msg[rx_pointer].r_msg.param.buffer_offset = 0; + } + + info->send_message(msg, info); + + imx_rpmsg_pcm_hardware.period_bytes_max = + imx_rpmsg_pcm_hardware.buffer_bytes_max / 2; + + snd_soc_set_runtime_hwparams(substream, &imx_rpmsg_pcm_hardware); + + ret = snd_pcm_hw_constraint_integer(substream->runtime, + sndrv_pcm_hw_param_periods); + if (ret < 0) + return ret; + + info->msg_drop_count[substream->stream] = 0; + + /* create timer*/ + info->stream_timer[substream->stream].info = info; + info->stream_timer[substream->stream].substream = substream; + timer_setup(&info->stream_timer[substream->stream].timer, + imx_rpmsg_timer_callback, 0); + return ret; +} + +static int imx_rpmsg_pcm_close(struct snd_soc_component *component, + struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); + struct rpmsg_info *info = dev_get_drvdata(component->dev); + struct rpmsg_msg *msg; + int ret = 0; + + /* flush work in workqueue to make tx_close is the last message */ + flush_workqueue(info->rpmsg_wq); + + if (substream->stream == sndrv_pcm_stream_playback) { + msg = &info->msg[tx_close]; + msg->s_msg.header.cmd = tx_close; + } else { + msg = &info->msg[rx_close]; + msg->s_msg.header.cmd = rx_close; + } + + info->send_message(msg, info); + + del_timer(&info->stream_timer[substream->stream].timer); + + rtd->dai_link->ignore_suspend = 0; + + if (info->msg_drop_count[substream->stream]) + dev_warn(rtd->dev, "msg is dropped!, number is %d ", + info->msg_drop_count[substream->stream]); + + return ret; +} + +static int imx_rpmsg_pcm_prepare(struct snd_soc_component *component, + struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0); + struct fsl_rpmsg *rpmsg = dev_get_drvdata(cpu_dai->dev); + + /* + * non-mmap mode, nonblock, version 2, enable lpa in dts + * four conditions to determine the lpa is enabled. + */ + if ((runtime->access == sndrv_pcm_access_rw_interleaved || + runtime->access == sndrv_pcm_access_rw_noninterleaved) && + rpmsg->enable_lpa) { + /* + * ignore suspend operation in low power mode + * m core will continue playback music on a core suspend. + */ + rtd->dai_link->ignore_suspend = 1; + rpmsg->force_lpa = 1; + } else { + rpmsg->force_lpa = 0; + } + + return 0; +} + +static int imx_rpmsg_pcm_mmap(struct snd_soc_component *component, + struct snd_pcm_substream *substream, + struct vm_area_struct *vma) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + + return dma_mmap_wc(substream->pcm->card->dev, vma, + runtime->dma_area, + runtime->dma_addr, + runtime->dma_bytes); +} + +static void imx_rpmsg_pcm_dma_complete(void *arg) +{ + struct snd_pcm_substream *substream = arg; + + snd_pcm_period_elapsed(substream); +} + +static int imx_rpmsg_prepare_and_submit(struct snd_soc_component *component, + struct snd_pcm_substream *substream) +{ + struct rpmsg_info *info = dev_get_drvdata(component->dev); + struct rpmsg_msg *msg; + + if (substream->stream == sndrv_pcm_stream_playback) { + msg = &info->msg[tx_buffer]; + msg->s_msg.header.cmd = tx_buffer; + } else { + msg = &info->msg[rx_buffer]; + msg->s_msg.header.cmd = rx_buffer; + } + + /* send buffer address and buffer size */ + msg->s_msg.param.buffer_addr = substream->runtime->dma_addr; + msg->s_msg.param.buffer_size = snd_pcm_lib_buffer_bytes(substream); + msg->s_msg.param.period_size = snd_pcm_lib_period_bytes(substream); + msg->s_msg.param.buffer_tail = 0; + + info->num_period[substream->stream] = msg->s_msg.param.buffer_size / + msg->s_msg.param.period_size; + + info->callback[substream->stream] = imx_rpmsg_pcm_dma_complete; + info->callback_param[substream->stream] = substream; + + return imx_rpmsg_insert_workqueue(substream, msg, info); +} + +static int imx_rpmsg_async_issue_pending(struct snd_soc_component *component, + struct snd_pcm_substream *substream) +{ + struct rpmsg_info *info = dev_get_drvdata(component->dev); + struct rpmsg_msg *msg; + + if (substream->stream == sndrv_pcm_stream_playback) { + msg = &info->msg[tx_start]; + msg->s_msg.header.cmd = tx_start; + } else { + msg = &info->msg[rx_start]; + msg->s_msg.header.cmd = rx_start; + } + + return imx_rpmsg_insert_workqueue(substream, msg, info); +} + +static int imx_rpmsg_restart(struct snd_soc_component *component, + struct snd_pcm_substream *substream) +{ + struct rpmsg_info *info = dev_get_drvdata(component->dev); + struct rpmsg_msg *msg; + + if (substream->stream == sndrv_pcm_stream_playback) { + msg = &info->msg[tx_restart]; + msg->s_msg.header.cmd = tx_restart; + } else { + msg = &info->msg[rx_restart]; + msg->s_msg.header.cmd = rx_restart; + } + + return imx_rpmsg_insert_workqueue(substream, msg, info); +} + +static int imx_rpmsg_pause(struct snd_soc_component *component, + struct snd_pcm_substream *substream) +{ + struct rpmsg_info *info = dev_get_drvdata(component->dev); + struct rpmsg_msg *msg; + + if (substream->stream == sndrv_pcm_stream_playback) { + msg = &info->msg[tx_pause]; + msg->s_msg.header.cmd = tx_pause; + } else { + msg = &info->msg[rx_pause]; + msg->s_msg.header.cmd = rx_pause; + } + + return imx_rpmsg_insert_workqueue(substream, msg, info); +} + +static int imx_rpmsg_terminate_all(struct snd_soc_component *component, + struct snd_pcm_substream *substream) +{ + struct rpmsg_info *info = dev_get_drvdata(component->dev); + struct rpmsg_msg *msg; + int cmd; + + if (substream->stream == sndrv_pcm_stream_playback) { + msg = &info->msg[tx_terminate]; + msg->s_msg.header.cmd = tx_terminate; + /* clear buffer count*/ + cmd = tx_period_done + msg_type_a_num; + info->msg[cmd].s_msg.param.buffer_tail = 0; + info->msg[cmd].r_msg.param.buffer_tail = 0; + info->msg[tx_pointer].r_msg.param.buffer_offset = 0; + } else { + msg = &info->msg[rx_terminate]; + msg->s_msg.header.cmd = rx_terminate; + /* clear buffer count*/ + cmd = rx_period_done + msg_type_a_num; + info->msg[cmd].s_msg.param.buffer_tail = 0; + info->msg[cmd].r_msg.param.buffer_tail = 0; + info->msg[rx_pointer].r_msg.param.buffer_offset = 0; + } + + del_timer(&info->stream_timer[substream->stream].timer); + + return imx_rpmsg_insert_workqueue(substream, msg, info); +} + +static int imx_rpmsg_pcm_trigger(struct snd_soc_component *component, + struct snd_pcm_substream *substream, int cmd) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0); + struct fsl_rpmsg *rpmsg = dev_get_drvdata(cpu_dai->dev); + int ret = 0; + + switch (cmd) { + case sndrv_pcm_trigger_start: + ret = imx_rpmsg_prepare_and_submit(component, substream); + if (ret) + return ret; + ret = imx_rpmsg_async_issue_pending(component, substream); + break; + case sndrv_pcm_trigger_resume: + if (rpmsg->force_lpa) + break; + fallthrough; + case sndrv_pcm_trigger_pause_release: + ret = imx_rpmsg_restart(component, substream); + break; + case sndrv_pcm_trigger_suspend: + if (!rpmsg->force_lpa) { + if (runtime->info & sndrv_pcm_info_pause) + ret = imx_rpmsg_pause(component, substream); + else + ret = imx_rpmsg_terminate_all(component, substream); + } + break; + case sndrv_pcm_trigger_pause_push: + ret = imx_rpmsg_pause(component, substream); + break; + case sndrv_pcm_trigger_stop: + ret = imx_rpmsg_terminate_all(component, substream); + break; + default: + return -einval; + } + + if (ret) + return ret; + + return 0; +} + +/* + * imx_rpmsg_pcm_ack + * + * send the period index to m core through rpmsg, but not send + * all the period index to m core, reduce some unnessesary msg + * to reduce the pressure of rpmsg bandwidth. + */ +static int imx_rpmsg_pcm_ack(struct snd_soc_component *component, + struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0); + struct fsl_rpmsg *rpmsg = dev_get_drvdata(cpu_dai->dev); + struct rpmsg_info *info = dev_get_drvdata(component->dev); + snd_pcm_uframes_t period_size = runtime->period_size; + snd_pcm_sframes_t avail; + struct timer_list *timer; + struct rpmsg_msg *msg; + unsigned long flags; + int buffer_tail = 0; + int written_num = 0; + + if (!rpmsg->force_lpa) + return 0; + + if (substream->stream == sndrv_pcm_stream_playback) { + msg = &info->msg[tx_period_done + msg_type_a_num]; + msg->s_msg.header.cmd = tx_period_done; + } else { + msg = &info->msg[rx_period_done + msg_type_a_num]; + msg->s_msg.header.cmd = rx_period_done; + } + + msg->s_msg.header.type = msg_type_c; + + buffer_tail = (frames_to_bytes(runtime, runtime->control->appl_ptr) % + snd_pcm_lib_buffer_bytes(substream)); + buffer_tail = buffer_tail / snd_pcm_lib_period_bytes(substream); + + /* there is update for period index */ + if (buffer_tail != msg->s_msg.param.buffer_tail) { + written_num = buffer_tail - msg->s_msg.param.buffer_tail; + if (written_num < 0) + written_num += runtime->periods; + + msg->s_msg.param.buffer_tail = buffer_tail; + + /* the notification message is updated to latest */ + spin_lock_irqsave(&info->lock[substream->stream], flags); + memcpy(&info->notify[substream->stream], msg, + sizeof(struct rpmsg_s_msg)); + info->notify_updated[substream->stream] = true; + spin_unlock_irqrestore(&info->lock[substream->stream], flags); + + if (substream->stream == sndrv_pcm_stream_playback) + avail = snd_pcm_playback_hw_avail(runtime); + else + avail = snd_pcm_capture_hw_avail(runtime); + + timer = &info->stream_timer[substream->stream].timer; + /* + * if the data in the buffer is less than one period before + * this fill, which means the data may not enough on m + * core side, we need to send message immediately to let + * m core know the pointer is updated. + * if there is more than one period data in the buffer before + * this fill, which means the data is enough on m core side, + * we can delay one period (using timer) to send the message + * for reduce the message number in workqueue, because the + * pointer may be updated by ack function later, we can + * send latest pointer to m core side. + */ + if ((avail - written_num * period_size) <= period_size) { + imx_rpmsg_insert_workqueue(substream, msg, info); + } else if (rpmsg->force_lpa && !timer_pending(timer)) { + int time_msec; + + time_msec = (int)(runtime->period_size * 1000 / runtime->rate); + mod_timer(timer, jiffies + msecs_to_jiffies(time_msec)); + } + } + + return 0; +} + +static int imx_rpmsg_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, + int stream, int size) +{ + struct snd_pcm_substream *substream = pcm->streams[stream].substream; + struct snd_dma_buffer *buf = &substream->dma_buffer; + + buf->dev.type = sndrv_dma_type_dev; + buf->dev.dev = pcm->card->dev; + buf->private_data = null; + buf->area = dma_alloc_wc(pcm->card->dev, size, + &buf->addr, gfp_kernel); + if (!buf->area) + return -enomem; + + buf->bytes = size; + return 0; +} + +static void imx_rpmsg_pcm_free_dma_buffers(struct snd_soc_component *component, + struct snd_pcm *pcm) +{ + struct snd_pcm_substream *substream; + struct snd_dma_buffer *buf; + int stream; + + for (stream = sndrv_pcm_stream_playback; + stream < sndrv_pcm_stream_last; stream++) { + substream = pcm->streams[stream].substream; + if (!substream) + continue; + + buf = &substream->dma_buffer; + if (!buf->area) + continue; + + dma_free_wc(pcm->card->dev, buf->bytes, + buf->area, buf->addr); + buf->area = null; + } +} + +static int imx_rpmsg_pcm_new(struct snd_soc_component *component, + struct snd_soc_pcm_runtime *rtd) +{ + struct snd_card *card = rtd->card->snd_card; + struct snd_pcm *pcm = rtd->pcm; + struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0); + struct fsl_rpmsg *rpmsg = dev_get_drvdata(cpu_dai->dev); + int ret; + + ret = dma_coerce_mask_and_coherent(card->dev, dma_bit_mask(32)); + if (ret) + return ret; + + if (pcm->streams[sndrv_pcm_stream_playback].substream) { + ret = imx_rpmsg_pcm_preallocate_dma_buffer(pcm, sndrv_pcm_stream_playback, + rpmsg->buffer_size); + if (ret) + goto out; + } + + if (pcm->streams[sndrv_pcm_stream_capture].substream) { + ret = imx_rpmsg_pcm_preallocate_dma_buffer(pcm, sndrv_pcm_stream_capture, + rpmsg->buffer_size); + if (ret) + goto out; + } + + imx_rpmsg_pcm_hardware.buffer_bytes_max = rpmsg->buffer_size; +out: + /* free preallocated buffers in case of error */ + if (ret) + imx_rpmsg_pcm_free_dma_buffers(component, pcm); + + return ret; +} + +static const struct snd_soc_component_driver imx_rpmsg_soc_component = { + .name = imx_pcm_drv_name, + .pcm_construct = imx_rpmsg_pcm_new, + .pcm_destruct = imx_rpmsg_pcm_free_dma_buffers, + .open = imx_rpmsg_pcm_open, + .close = imx_rpmsg_pcm_close, + .hw_params = imx_rpmsg_pcm_hw_params, + .hw_free = imx_rpmsg_pcm_hw_free, + .trigger = imx_rpmsg_pcm_trigger, + .pointer = imx_rpmsg_pcm_pointer, + .mmap = imx_rpmsg_pcm_mmap, + .ack = imx_rpmsg_pcm_ack, + .prepare = imx_rpmsg_pcm_prepare, +}; + +static void imx_rpmsg_pcm_work(struct work_struct *work) +{ + struct work_of_rpmsg *work_of_rpmsg; + bool is_notification = false; + struct rpmsg_info *info; + struct rpmsg_msg msg; + unsigned long flags; + + work_of_rpmsg = container_of(work, struct work_of_rpmsg, work); + info = work_of_rpmsg->info; + + /* + * every work in the work queue, first we check if there + * is update for period is filled, because there may be not + * enough data in m core side, need to let m core know + * data is updated immediately. + */ + spin_lock_irqsave(&info->lock[tx], flags); + if (info->notify_updated[tx]) { + memcpy(&msg, &info->notify[tx], sizeof(struct rpmsg_s_msg)); + info->notify_updated[tx] = false; + spin_unlock_irqrestore(&info->lock[tx], flags); + info->send_message(&msg, info); + } else { + spin_unlock_irqrestore(&info->lock[tx], flags); + } + + spin_lock_irqsave(&info->lock[rx], flags); + if (info->notify_updated[rx]) { + memcpy(&msg, &info->notify[rx], sizeof(struct rpmsg_s_msg)); + info->notify_updated[rx] = false; + spin_unlock_irqrestore(&info->lock[rx], flags); + info->send_message(&msg, info); + } else { + spin_unlock_irqrestore(&info->lock[rx], flags); + } + + /* skip the notification message for it has been processed above */ + if (work_of_rpmsg->msg.s_msg.header.type == msg_type_c && + (work_of_rpmsg->msg.s_msg.header.cmd == tx_period_done || + work_of_rpmsg->msg.s_msg.header.cmd == rx_period_done)) + is_notification = true; + + if (!is_notification) + info->send_message(&work_of_rpmsg->msg, info); + + /* update read index */ + spin_lock_irqsave(&info->wq_lock, flags); + info->work_read_index++; + info->work_read_index %= work_max_num; + spin_unlock_irqrestore(&info->wq_lock, flags); +} + +static int imx_rpmsg_pcm_probe(struct platform_device *pdev) +{ + struct snd_soc_component *component; + struct rpmsg_info *info; + int ret, i; + + info = devm_kzalloc(&pdev->dev, sizeof(*info), gfp_kernel); + if (!info) + return -enomem; + + platform_set_drvdata(pdev, info); + + info->rpdev = container_of(pdev->dev.parent, struct rpmsg_device, dev); + info->dev = &pdev->dev; + /* setup work queue */ + info->rpmsg_wq = alloc_ordered_workqueue("rpmsg_audio", + wq_highpri | + wq_unbound | + wq_freezable); + if (!info->rpmsg_wq) { + dev_err(&pdev->dev, "workqueue create failed "); + return -enomem; + } + + /* write index initialize 1, make it differ with the read index */ + info->work_write_index = 1; + info->send_message = imx_rpmsg_pcm_send_message; + + for (i = 0; i < work_max_num; i++) { + init_work(&info->work_list[i].work, imx_rpmsg_pcm_work); + info->work_list[i].info = info; + } + + /* initialize msg */ + for (i = 0; i < msg_max_num; i++) { + info->msg[i].s_msg.header.cate = imx_rpmsg_audio; + info->msg[i].s_msg.header.major = imx_rmpsg_major; + info->msg[i].s_msg.header.minor = imx_rmpsg_minor; + info->msg[i].s_msg.header.type = msg_type_a; + info->msg[i].s_msg.param.audioindex = 0; + } + + init_completion(&info->cmd_complete); + mutex_init(&info->msg_lock); + spin_lock_init(&info->lock[tx]); + spin_lock_init(&info->lock[rx]); + spin_lock_init(&info->wq_lock); + + ret = devm_snd_soc_register_component(&pdev->dev, + &imx_rpmsg_soc_component, + null, 0); + if (ret) + goto fail; + + component = snd_soc_lookup_component(&pdev->dev, imx_pcm_drv_name); + if (!component) { + ret = -einval; + goto fail; + } +#ifdef config_debug_fs + component->debugfs_prefix = "rpmsg"; +#endif + + return 0; + +fail: + if (info->rpmsg_wq) + destroy_workqueue(info->rpmsg_wq); + + return ret; +} + +static int imx_rpmsg_pcm_remove(struct platform_device *pdev) +{ + struct rpmsg_info *info = platform_get_drvdata(pdev); + + if (info->rpmsg_wq) + destroy_workqueue(info->rpmsg_wq); + + return 0; +} + +#ifdef config_pm +static int imx_rpmsg_pcm_runtime_resume(struct device *dev) +{ + struct rpmsg_info *info = dev_get_drvdata(dev); + + cpu_latency_qos_add_request(&info->pm_qos_req, 0); + + return 0; +} + +static int imx_rpmsg_pcm_runtime_suspend(struct device *dev) +{ + struct rpmsg_info *info = dev_get_drvdata(dev); + + cpu_latency_qos_remove_request(&info->pm_qos_req); + + return 0; +} +#endif + +#ifdef config_pm_sleep +static int imx_rpmsg_pcm_suspend(struct device *dev) +{ + struct rpmsg_info *info = dev_get_drvdata(dev); + struct rpmsg_msg *rpmsg_tx; + struct rpmsg_msg *rpmsg_rx; + + rpmsg_tx = &info->msg[tx_suspend]; + rpmsg_rx = &info->msg[rx_suspend]; + + rpmsg_tx->s_msg.header.cmd = tx_suspend; + info->send_message(rpmsg_tx, info); + + rpmsg_rx->s_msg.header.cmd = rx_suspend; + info->send_message(rpmsg_rx, info); + + return 0; +} + +static int imx_rpmsg_pcm_resume(struct device *dev) +{ + struct rpmsg_info *info = dev_get_drvdata(dev); + struct rpmsg_msg *rpmsg_tx; + struct rpmsg_msg *rpmsg_rx; + + rpmsg_tx = &info->msg[tx_resume]; + rpmsg_rx = &info->msg[rx_resume]; + + rpmsg_tx->s_msg.header.cmd = tx_resume; + info->send_message(rpmsg_tx, info); + + rpmsg_rx->s_msg.header.cmd = rx_resume; + info->send_message(rpmsg_rx, info); + + return 0; +} +#endif /* config_pm_sleep */ + +static const struct dev_pm_ops imx_rpmsg_pcm_pm_ops = { + set_runtime_pm_ops(imx_rpmsg_pcm_runtime_suspend, + imx_rpmsg_pcm_runtime_resume, + null) + set_system_sleep_pm_ops(imx_rpmsg_pcm_suspend, + imx_rpmsg_pcm_resume) +}; + +static struct platform_driver imx_pcm_rpmsg_driver = { + .probe = imx_rpmsg_pcm_probe, + .remove = imx_rpmsg_pcm_remove, + .driver = { + .name = imx_pcm_drv_name, + .pm = &imx_rpmsg_pcm_pm_ops, + }, +}; +module_platform_driver(imx_pcm_rpmsg_driver); + +module_description("freescale soc audio rpmsg pcm interface"); +module_author("shengjiu wang <shengjiu.wang@nxp.com>"); +module_alias("platform:" imx_pcm_drv_name); +module_license("gpl v2"); diff --git a/sound/soc/fsl/imx-pcm-rpmsg.h b/sound/soc/fsl/imx-pcm-rpmsg.h --- /dev/null +++ b/sound/soc/fsl/imx-pcm-rpmsg.h +/* spdx-license-identifier: gpl-2.0+ */ +/* + * copyright 2017-2021 nxp + * + ****************************************************************************** + * communication stack of audio with rpmsg + ****************************************************************************** + * packet structure: + * a srtm message consists of a 10 bytes header followed by 0~n bytes of data + * + * +---------------+-------------------------------+ + * | | content | + * +---------------+-------------------------------+ + * | byte offset | 7 6 5 4 3 2 1 0 | + * +---------------+---+---+---+---+---+---+---+---+ + * | 0 | category | + * +---------------+---+---+---+---+---+---+---+---+ + * | 1 ~ 2 | version | + * +---------------+---+---+---+---+---+---+---+---+ + * | 3 | type | + * +---------------+---+---+---+---+---+---+---+---+ + * | 4 | command | + * +---------------+---+---+---+---+---+---+---+---+ + * | 5 | reserved0 | + * +---------------+---+---+---+---+---+---+---+---+ + * | 6 | reserved1 | + * +---------------+---+---+---+---+---+---+---+---+ + * | 7 | reserved2 | + * +---------------+---+---+---+---+---+---+---+---+ + * | 8 | reserved3 | + * +---------------+---+---+---+---+---+---+---+---+ + * | 9 | reserved4 | + * +---------------+---+---+---+---+---+---+---+---+ + * | 10 | data 0 | + * +---------------+---+---+---+---+---+---+---+---+ + * : : : : : : : : : : : : : + * +---------------+---+---+---+---+---+---+---+---+ + * | n + 10 - 1 | data n-1 | + * +---------------+---+---+---+---+---+---+---+---+ + * + * +----------+------------+------------------------------------------------+ + * | field | byte | | + * +----------+------------+------------------------------------------------+ + * | category | 0 | the destination category. | + * +----------+------------+------------------------------------------------+ + * | version | 1 ~ 2 | the category version of the sender of the | + * | | | packet. | + * | | | the first byte represent the major version of | + * | | | the packet.the second byte represent the minor | + * | | | version of the packet. | + * +----------+------------+------------------------------------------------+ + * | type | 3 | the message type of current message packet. | + * +----------+------------+------------------------------------------------+ + * | command | 4 | the command byte sent to remote processor/soc. | + * +----------+------------+------------------------------------------------+ + * | reserved | 5 ~ 9 | reserved field for future extension. | + * +----------+------------+------------------------------------------------+ + * | data | n | the data payload of the message packet. | + * +----------+------------+------------------------------------------------+ + * + * audio control: + * srtm audio control category request command table: + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | category | version | type | command | data | function | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x00 | 0x00 | data[0]: audio device index | open a tx instance. | + * | | | | | data[1]: format | | + * | | | | | data[2]: channels | | + * | | | | | data[3-6]: samplerate | | + * | | | | | data[7-10]: buffer_addr | | + * | | | | | data[11-14]: buffer_size | | + * | | | | | data[15-18]: period_size | | + * | | | | | data[19-22]: buffer_tail | | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x00 | 0x01 | data[0]: audio device index | start a tx instance. | + * | | | | | same as above command | | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x00 | 0x02 | data[0]: audio device index | pause a tx instance. | + * | | | | | same as above command | | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x00 | 0x03 | data[0]: audio device index | resume a tx instance. | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x00 | 0x04 | data[0]: audio device index | stop a tx instance. | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x00 | 0x05 | data[0]: audio device index | close a tx instance. | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x00 | 0x06 | data[0]: audio device index | set parameters for | + * | | | | | data[1]: format | a tx instance. | + * | | | | | data[2]: channels | | + * | | | | | data[3-6]: samplerate | | + * | | | | | data[7-22]: reserved | | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x00 | 0x07 | data[0]: audio device index | set tx buffer. | + * | | | | | data[1-6]: reserved | | + * | | | | | data[7-10]: buffer_addr | | + * | | | | | data[11-14]: buffer_size | | + * | | | | | data[15-18]: period_size | | + * | | | | | data[19-22]: buffer_tail | | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x00 | 0x08 | data[0]: audio device index | suspend a tx instance | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x00 | 0x09 | data[0]: audio device index | resume a tx instance. | + * | | | | | data[1]: format | | + * | | | | | data[2]: channels | | + * | | | | | data[3-6]: samplerate | | + * | | | | | data[7-10]: buffer_addr | | + * | | | | | data[11-14]: buffer_size | | + * | | | | | data[15-18]: period_size | | + * | | | | | data[19-22]: buffer_tail | | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x00 | 0x0a | data[0]: audio device index | open a rx instance. | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x00 | 0x0b | data[0]: audio device index | start a rx instance. | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x00 | 0x0c | data[0]: audio device index | pause a rx instance. | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x00 | 0x0d | data[0]: audio device index | resume a rx instance. | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x00 | 0x0e | data[0]: audio device index | stop a rx instance. | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x00 | 0x0f | data[0]: audio device index | close a rx instance. | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x00 | 0x10 | data[0]: audio device index | set parameters for | + * | | | | | data[1]: format | a rx instance. | + * | | | | | data[2]: channels | | + * | | | | | data[3-6]: samplerate | | + * | | | | | data[7-22]: reserved | | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x00 | 0x11 | data[0]: audio device index | set rx buffer. | + * | | | | | data[1-6]: reserved | | + * | | | | | data[7-10]: buffer_addr | | + * | | | | | data[11-14]: buffer_size | | + * | | | | | data[15-18]: period_size | | + * | | | | | data[19-22]: buffer_tail | | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x00 | 0x12 | data[0]: audio device index | suspend a rx instance.| + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x00 | 0x13 | data[0]: audio device index | resume a rx instance. | + * | | | | | data[1]: format | | + * | | | | | data[2]: channels | | + * | | | | | data[3-6]: samplerate | | + * | | | | | data[7-10]: buffer_addr | | + * | | | | | data[11-14]: buffer_size | | + * | | | | | data[15-18]: period_size | | + * | | | | | data[19-22]: buffer_tail | | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x00 | 0x14 | data[0]: audio device index | set register value | + * | | | | | data[1-6]: reserved | to codec | + * | | | | | data[7-10]: register | | + * | | | | | data[11-14]: value | | + * | | | | | data[15-22]: reserved | | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x00 | 0x15 | data[0]: audio device index | get register value | + * | | | | | data[1-6]: reserved | from codec | + * | | | | | data[7-10]: register | | + * | | | | | data[11-22]: reserved | | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * note 1: see <list of sample format> for available value of + * sample format; + * note 2: see <list of audio channels> for available value of channels; + * note 3: sample rate of set parameters for an audio tx instance + * command and set parameters for an audio rx instance command is + * in little-endian format. + * + * srtm audio control category response command table: + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | category | version | type | command | data | function | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x01 | 0x00 | data[0]: audio device index | reply for open | + * | | | | | data[1]: return code | a tx instance | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x01 | 0x01 | data[0]: audio device index | reply for start | + * | | | | | data[1]: return code | a tx instance | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x01 | 0x02 | data[0]: audio device index | reply for pause | + * | | | | | data[1]: return code | a tx instance | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x01 | 0x03 | data[0]: audio device index | reply for resume | + * | | | | | data[1]: return code | a tx instance | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x01 | 0x04 | data[0]: audio device index | reply for stop | + * | | | | | data[1]: return code | a tx instance | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x01 | 0x05 | data[0]: audio device index | reply for close | + * | | | | | data[1]: return code | a tx instance | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x01 | 0x06 | data[0]: audio device index | reply for set param | + * | | | | | data[1]: return code | for a tx instance. | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x01 | 0x07 | data[0]: audio device index | reply for set | + * | | | | | data[1]: return code | tx buffer | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x01 | 0x08 | data[0]: audio device index | reply for suspend | + * | | | | | data[1]: return code | a tx instance | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x01 | 0x09 | data[0]: audio device index | reply for resume | + * | | | | | data[1]: return code | a tx instance | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x01 | 0x0a | data[0]: audio device index | reply for open | + * | | | | | data[1]: return code | a tx instance | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x01 | 0x0b | data[0]: audio device index | reply for start | + * | | | | | data[1]: return code | a tx instance | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x01 | 0x0c | data[0]: audio device index | reply for pause | + * | | | | | data[1]: return code | a tx instance | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x01 | 0x0d | data[0]: audio device index | reply for resume | + * | | | | | data[1]: return code | a rx instance | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x01 | 0x0e | data[0]: audio device index | reply for stop | + * | | | | | data[1]: return code | a rx instance | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x01 | 0x0f | data[0]: audio device index | reply for close | + * | | | | | data[1]: return code | a rx instance | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x01 | 0x10 | data[0]: audio device index | reply for set param | + * | | | | | data[1]: return code | for a rx instance. | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x01 | 0x11 | data[0]: audio device index | reply for set | + * | | | | | data[1]: return code | rx buffer | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x01 | 0x12 | data[0]: audio device index | reply for suspend | + * | | | | | data[1]: return code | a rx instance | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x01 | 0x13 | data[0]: audio device index | reply for resume | + * | | | | | data[1]: return code | a rx instance | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x01 | 0x14 | data[0]: audio device index | reply for set codec | + * | | | | | data[1]: return code | register value | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x01 | 0x15 | data[0]: audio device index | reply for get codec | + * | | | | | data[1]: return code | register value | + * | | | | | data[2-6]: reserved | | + * | | | | | data[7-10]: register | | + * | | | | | data[11-14]: value | | + * | | | | | data[15-22]: reserved | | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * + * srtm audio control category notification command table: + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | category | version | type | command | data | function | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x02 | 0x00 | data[0]: audio device index | notify one tx period | + * | | | | | | is finished | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * | 0x03 | 0x0100 | 0x02 | 0x01 | data[0]: audio device index | notify one rx period | + * | | | | | | is finished | + * +----------+---------+------+---------+-------------------------------+-----------------------+ + * + * list of sample format: + * +------------------+-----------------------+ + * | sample format | description | + * +------------------+-----------------------+ + * | 0x0 | s16_le | + * +------------------+-----------------------+ + * | 0x1 | s24_le | + * +------------------+-----------------------+ + * + * list of audio channels + * +------------------+-----------------------+ + * | audio channel | description | + * +------------------+-----------------------+ + * | 0x0 | left channel | + * +------------------+-----------------------+ + * | 0x1 | right channel | + * +------------------+---------------- ------+ + * | 0x2 | left & right channel | + * +------------------+-----------------------+ + * + */ + +#ifndef _imx_pcm_rpmsg_h +#define _imx_pcm_rpmsg_h + +#include <linux/pm_qos.h> +#include <linux/interrupt.h> +#include <sound/dmaengine_pcm.h> + +#define rpmsg_timeout 1000 + +/* rpmsg command (type a)*/ +#define tx_open 0x0 +#define tx_start 0x1 +#define tx_pause 0x2 +#define tx_restart 0x3 +#define tx_terminate 0x4 +#define tx_close 0x5 +#define tx_hw_param 0x6 +#define tx_buffer 0x7 +#define tx_suspend 0x8 +#define tx_resume 0x9 + +#define rx_open 0xa +#define rx_start 0xb +#define rx_pause 0xc +#define rx_restart 0xd +#define rx_terminate 0xe +#define rx_close 0xf +#define rx_hw_param 0x10 +#define rx_buffer 0x11 +#define rx_suspend 0x12 +#define rx_resume 0x13 +#define set_codec_value 0x14 +#define get_codec_value 0x15 +#define tx_pointer 0x16 +#define rx_pointer 0x17 +/* total msg numver for type a */ +#define msg_type_a_num 0x18 + +/* rpmsg command (type c)*/ +#define tx_period_done 0x0 +#define rx_period_done 0x1 +/* total msg numver for type c */ +#define msg_type_c_num 0x2 + +#define msg_max_num (msg_type_a_num + msg_type_c_num) + +#define msg_type_a 0x0 +#define msg_type_b 0x1 +#define msg_type_c 0x2 + +#define resp_none 0x0 +#define resp_not_allowed 0x1 +#define resp_success 0x2 +#define resp_failed 0x3 + +#define rpmsg_s16_le 0x0 +#define rpmsg_s24_le 0x1 +#define rpmsg_s32_le 0x2 +#define rpmsg_dsd_u16_le 0x3 +#define rpmsg_dsd_u24_le 0x4 +#define rpmsg_dsd_u32_le 0x5 + +#define rpmsg_ch_left 0x0 +#define rpmsg_ch_right 0x1 +#define rpmsg_ch_stereo 0x2 + +#define work_max_num 0x30 + +/* category define */ +#define imx_rmpsg_lifecycle 1 +#define imx_rpmsg_pmic 2 +#define imx_rpmsg_audio 3 +#define imx_rpmsg_key 4 +#define imx_rpmsg_gpio 5 +#define imx_rpmsg_rtc 6 +#define imx_rpmsg_sensor 7 + +/* rpmsg version */ +#define imx_rmpsg_major 1 +#define imx_rmpsg_minor 0 + +#define tx sndrv_pcm_stream_playback +#define rx sndrv_pcm_stream_capture + +/** + * struct rpmsg_head: rpmsg header structure + * + * @cate: category + * @major: major version + * @minor: minor version + * @type: message type (a/b/c) + * @cmd: message command + * @reserved: reserved space + */ +struct rpmsg_head { + u8 cate; + u8 major; + u8 minor; + u8 type; + u8 cmd; + u8 reserved[5]; +} __packed; + +/** + * struct param_s: sent rpmsg parameter + * + * @audioindex: audio instance index + * @format: audio format + * @channels: audio channel number + * @rate: sample rate + * @buffer_addr: dma buffer physical address or register for set_codec_value + * @buffer_size: dma buffer size or register value for set_codec_value + * @period_size: period size + * @buffer_tail: current period index + */ +struct param_s { + unsigned char audioindex; + unsigned char format; + unsigned char channels; + unsigned int rate; + unsigned int buffer_addr; + unsigned int buffer_size; + unsigned int period_size; + unsigned int buffer_tail; +} __packed; + +/** + * struct param_s: send rpmsg parameter + * + * @audioindex: audio instance index + * @resp: response value + * @reserved1: reserved space + * @buffer_offset: the consumed offset of buffer + * @reg_addr: register addr of codec + * @reg_data: register value of codec + * @reserved2: reserved space + * @buffer_tail: current period index + */ +struct param_r { + unsigned char audioindex; + unsigned char resp; + unsigned char reserved1[1]; + unsigned int buffer_offset; + unsigned int reg_addr; + unsigned int reg_data; + unsigned char reserved2[4]; + unsigned int buffer_tail; +} __packed; + +/* struct of sent message */ +struct rpmsg_s_msg { + struct rpmsg_head header; + struct param_s param; +}; + +/* struct of received message */ +struct rpmsg_r_msg { + struct rpmsg_head header; + struct param_r param; +}; + +/* struct of rpmsg */ +struct rpmsg_msg { + struct rpmsg_s_msg s_msg; + struct rpmsg_r_msg r_msg; +}; + +/* struct of rpmsg for workqueue */ +struct work_of_rpmsg { + struct rpmsg_info *info; + /* sent msg for each work */ + struct rpmsg_msg msg; + struct work_struct work; +}; + +/* struct of timer */ +struct stream_timer { + struct timer_list timer; + struct rpmsg_info *info; + struct snd_pcm_substream *substream; +}; + +typedef void (*dma_callback)(void *arg); + +/** + * struct rpmsg_info: rpmsg audio information + * + * @rpdev: pointer of rpmsg_device + * @dev: pointer for imx_pcm_rpmsg device + * @cmd_complete: command is finished + * @pm_qos_req: request of pm qos + * @r_msg: received rpmsg + * @msg: array of rpmsg + * @notify: notification msg (type c) for tx & rx + * @notify_updated: notification flag for tx & rx + * @rpmsg_wq: rpmsg workqueue + * @work_list: array of work list for workqueue + * @work_write_index: write index of work list + * @work_read_index: read index of work list + * @msg_drop_count: counter of dropped msg for tx & rx + * @num_period: period number for tx & rx + * @callback_param: parameter for period elapse callback for tx & rx + * @callback: period elapse callback for tx & rx + * @send_message: function pointer for send message + * @lock: spin lock for tx & rx + * @wq_lock: lock for work queue + * @msg_lock: lock for send message + * @stream_timer: timer for tigger workqueue + */ +struct rpmsg_info { + struct rpmsg_device *rpdev; + struct device *dev; + struct completion cmd_complete; + struct pm_qos_request pm_qos_req; + + /* received msg (global) */ + struct rpmsg_r_msg r_msg; + struct rpmsg_msg msg[msg_max_num]; + /* period done */ + struct rpmsg_msg notify[2]; + bool notify_updated[2]; + + struct workqueue_struct *rpmsg_wq; + struct work_of_rpmsg work_list[work_max_num]; + int work_write_index; + int work_read_index; + int msg_drop_count[2]; + int num_period[2]; + void *callback_param[2]; + dma_callback callback[2]; + int (*send_message)(struct rpmsg_msg *msg, struct rpmsg_info *info); + spinlock_t lock[2]; /* spin lock for resource protection */ + spinlock_t wq_lock; /* spin lock for resource protection */ + struct mutex msg_lock; /* mutex for resource protection */ + struct stream_timer stream_timer[2]; +}; + +#define imx_pcm_drv_name "imx_pcm_rpmsg" + +#endif /* imx_pcm_rpmsg_h */
|
Audio
|
3c00eceb2a5391ed1ca6703b71cad35ab8cd4352
|
shengjiu wang
|
sound
|
soc
|
fsl
|
asoc: imx-rpmsg: add machine driver for audio base on rpmsg
|
the platform device is not registered by device tree or cpu dai driver, it is registered by the rpmsg channel, so add a dedicated machine driver to handle this case.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add audio driver base on rpmsg on i.mx platform
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ']
|
['kconfig', 'c', 'makefile']
| 3
| 163
| 0
|
--- diff --git a/sound/soc/fsl/kconfig b/sound/soc/fsl/kconfig --- a/sound/soc/fsl/kconfig +++ b/sound/soc/fsl/kconfig +config snd_soc_imx_rpmsg + tristate "soc audio support for i.mx boards with rpmsg" + depends on rpmsg + select snd_soc_imx_pcm_rpmsg + select snd_soc_imx_audio_rpmsg + help + soc audio support for i.mx boards with rpmsg. + there should be rpmsg devices defined in other core (m core) + say y if you want to add support for soc audio on an i.mx board with + a rpmsg devices. + diff --git a/sound/soc/fsl/makefile b/sound/soc/fsl/makefile --- a/sound/soc/fsl/makefile +++ b/sound/soc/fsl/makefile +snd-soc-imx-rpmsg-objs := imx-rpmsg.o +obj-$(config_snd_soc_imx_rpmsg) += snd-soc-imx-rpmsg.o diff --git a/sound/soc/fsl/imx-rpmsg.c b/sound/soc/fsl/imx-rpmsg.c --- /dev/null +++ b/sound/soc/fsl/imx-rpmsg.c +// spdx-license-identifier: gpl-2.0+ +// copyright 2017-2020 nxp + +#include <linux/module.h> +#include <linux/of_platform.h> +#include <linux/of_reserved_mem.h> +#include <linux/i2c.h> +#include <linux/of_gpio.h> +#include <linux/slab.h> +#include <linux/gpio.h> +#include <linux/clk.h> +#include <sound/soc.h> +#include <sound/jack.h> +#include <sound/control.h> +#include <sound/pcm_params.h> +#include <sound/soc-dapm.h> +#include "imx-pcm-rpmsg.h" + +struct imx_rpmsg { + struct snd_soc_dai_link dai; + struct snd_soc_card card; +}; + +static const struct snd_soc_dapm_widget imx_rpmsg_dapm_widgets[] = { + snd_soc_dapm_hp("headphone jack", null), + snd_soc_dapm_spk("ext spk", null), + snd_soc_dapm_mic("mic jack", null), + snd_soc_dapm_mic("main mic", null), +}; + +static int imx_rpmsg_probe(struct platform_device *pdev) +{ + struct snd_soc_dai_link_component *dlc; + struct device *dev = pdev->dev.parent; + /* rpmsg_pdev is the platform device for the rpmsg node that probed us */ + struct platform_device *rpmsg_pdev = to_platform_device(dev); + struct device_node *np = rpmsg_pdev->dev.of_node; + struct of_phandle_args args; + struct imx_rpmsg *data; + int ret = 0; + + dlc = devm_kzalloc(&pdev->dev, 3 * sizeof(*dlc), gfp_kernel); + if (!dlc) + return -enomem; + + data = devm_kzalloc(&pdev->dev, sizeof(*data), gfp_kernel); + if (!data) { + ret = -enomem; + goto fail; + } + + ret = of_reserved_mem_device_init_by_idx(&pdev->dev, np, 0); + if (ret) + dev_warn(&pdev->dev, "no reserved dma memory "); + + data->dai.cpus = &dlc[0]; + data->dai.num_cpus = 1; + data->dai.platforms = &dlc[1]; + data->dai.num_platforms = 1; + data->dai.codecs = &dlc[2]; + data->dai.num_codecs = 1; + + data->dai.name = "rpmsg hifi"; + data->dai.stream_name = "rpmsg hifi"; + data->dai.dai_fmt = snd_soc_daifmt_i2s | + snd_soc_daifmt_nb_nf | + snd_soc_daifmt_cbs_cfs; + + /* optional codec node */ + ret = of_parse_phandle_with_fixed_args(np, "audio-codec", 0, 0, &args); + if (ret) { + data->dai.codecs->dai_name = "snd-soc-dummy-dai"; + data->dai.codecs->name = "snd-soc-dummy"; + } else { + data->dai.codecs->of_node = args.np; + ret = snd_soc_get_dai_name(&args, &data->dai.codecs->dai_name); + if (ret) { + dev_err(&pdev->dev, "unable to get codec_dai_name "); + goto fail; + } + } + + data->dai.cpus->dai_name = dev_name(&rpmsg_pdev->dev); + data->dai.platforms->name = imx_pcm_drv_name; + data->dai.playback_only = true; + data->dai.capture_only = true; + data->card.num_links = 1; + data->card.dai_link = &data->dai; + + if (of_property_read_bool(np, "fsl,rpmsg-out")) + data->dai.capture_only = false; + + if (of_property_read_bool(np, "fsl,rpmsg-in")) + data->dai.playback_only = false; + + if (data->dai.playback_only && data->dai.capture_only) { + dev_err(&pdev->dev, "no enabled rpmsg dai link "); + ret = -einval; + goto fail; + } + + data->card.dev = &pdev->dev; + data->card.owner = this_module; + data->card.dapm_widgets = imx_rpmsg_dapm_widgets; + data->card.num_dapm_widgets = array_size(imx_rpmsg_dapm_widgets); + /* + * inoder to use common api to get card name and audio routing. + * use parent of_node for this device, revert it after finishing using + */ + data->card.dev->of_node = np; + + ret = snd_soc_of_parse_card_name(&data->card, "model"); + if (ret) + goto fail; + + if (of_property_read_bool(np, "audio-routing")) { + ret = snd_soc_of_parse_audio_routing(&data->card, "audio-routing"); + if (ret) { + dev_err(&pdev->dev, "failed to parse audio-routing: %d ", ret); + goto fail; + } + } + + platform_set_drvdata(pdev, &data->card); + snd_soc_card_set_drvdata(&data->card, data); + ret = devm_snd_soc_register_card(&pdev->dev, &data->card); + if (ret) { + dev_err(&pdev->dev, "snd_soc_register_card failed (%d) ", ret); + goto fail; + } + +fail: + pdev->dev.of_node = null; + return ret; +} + +static struct platform_driver imx_rpmsg_driver = { + .driver = { + .name = "imx-audio-rpmsg", + .owner = this_module, + .pm = &snd_soc_pm_ops, + }, + .probe = imx_rpmsg_probe, +}; +module_platform_driver(imx_rpmsg_driver); + +module_description("freescale soc audio rpmsg machine driver"); +module_author("shengjiu wang <shengjiu.wang@nxp.com>"); +module_alias("platform:imx-audio-rpmsg"); +module_license("gpl v2");
|
Audio
|
39f8405c3e502e7b9d0533fa0b0bfe715b3e89c1
|
shengjiu wang
|
sound
|
soc
|
fsl
|
asoc: max98390: add support for tx slot configuration.
|
update voltage/current tx slot configuration support.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add support for tx slot configuration
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ', 'max98390']
|
['h', 'c']
| 2
| 64
| 0
|
--- diff --git a/sound/soc/codecs/max98390.c b/sound/soc/codecs/max98390.c --- a/sound/soc/codecs/max98390.c +++ b/sound/soc/codecs/max98390.c + + /* voltage, current slot configuration */ + regmap_write(max98390->regmap, + max98390_pcm_ch_src_2, + (max98390->i_l_slot << 4 | + max98390->v_l_slot)&0xff); + + if (max98390->v_l_slot < 8) { + regmap_update_bits(max98390->regmap, + max98390_pcm_tx_hiz_ctrl_a, + 1 << max98390->v_l_slot, 0); + regmap_update_bits(max98390->regmap, + max98390_pcm_tx_en_a, + 1 << max98390->v_l_slot, + 1 << max98390->v_l_slot); + } else { + regmap_update_bits(max98390->regmap, + max98390_pcm_tx_hiz_ctrl_b, + 1 << (max98390->v_l_slot - 8), 0); + regmap_update_bits(max98390->regmap, + max98390_pcm_tx_en_b, + 1 << (max98390->v_l_slot - 8), + 1 << (max98390->v_l_slot - 8)); + } + + if (max98390->i_l_slot < 8) { + regmap_update_bits(max98390->regmap, + max98390_pcm_tx_hiz_ctrl_a, + 1 << max98390->i_l_slot, 0); + regmap_update_bits(max98390->regmap, + max98390_pcm_tx_en_a, + 1 << max98390->i_l_slot, + 1 << max98390->i_l_slot); + } else { + regmap_update_bits(max98390->regmap, + max98390_pcm_tx_hiz_ctrl_b, + 1 << (max98390->i_l_slot - 8), 0); + regmap_update_bits(max98390->regmap, + max98390_pcm_tx_en_b, + 1 << (max98390->i_l_slot - 8), + 1 << (max98390->i_l_slot - 8)); + } +static void max98390_slot_config(struct i2c_client *i2c, + struct max98390_priv *max98390) +{ + int value; + struct device *dev = &i2c->dev; + + if (!device_property_read_u32(dev, "maxim,vmon-slot-no", &value)) + max98390->v_l_slot = value & 0xf; + else + max98390->v_l_slot = 0; + + if (!device_property_read_u32(dev, "maxim,imon-slot-no", &value)) + max98390->i_l_slot = value & 0xf; + else + max98390->i_l_slot = 1; +} + + /* voltage/current slot configuration */ + max98390_slot_config(i2c, max98390); + diff --git a/sound/soc/codecs/max98390.h b/sound/soc/codecs/max98390.h --- a/sound/soc/codecs/max98390.h +++ b/sound/soc/codecs/max98390.h + unsigned int v_l_slot; + unsigned int i_l_slot;
|
Audio
|
e5870bd0e40c749fd96a4e565497c789bee456bf
|
steve lee
|
sound
|
soc
|
codecs
|
asoc: mchp-i2s-mcc: add compatible for sama7g5
|
microchip's new sama7g5 includes an updated i2s-mcc compatible with the previous version found on sam9x60. the new controller includes 8 (4 * 2) input and output data pins for up to 8 channels for i2s and left-justified formats.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add i2s-mcc support for microchip's sama7g5
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ']
|
['kconfig', 'c']
| 2
| 6
| 0
|
--- diff --git a/sound/soc/atmel/kconfig b/sound/soc/atmel/kconfig --- a/sound/soc/atmel/kconfig +++ b/sound/soc/atmel/kconfig - sam9x60 + - sama7g5 + starting with sama7g5, i2s and left-justified multi-channel is + supported by using multiple data pins, output and input, without tdm. diff --git a/sound/soc/atmel/mchp-i2s-mcc.c b/sound/soc/atmel/mchp-i2s-mcc.c --- a/sound/soc/atmel/mchp-i2s-mcc.c +++ b/sound/soc/atmel/mchp-i2s-mcc.c + { + .compatible = "microchip,sama7g5-i2smcc", + },
|
Audio
|
99ac2f8d1508f31ecf28d5af0ce384bf0a033f90
|
codrin ciubotariu
|
sound
|
soc
|
atmel
|
asoc: mchp-i2s-mcc: add multi-channel support for i2s and left_j formats
|
the latest i2s-mcc available in sama7g5 supports multi-channel for i2s and left-justified formats. for this, the new version uses 8 (4 * 2) input and output pins, with each pin being responsible for 2 channels. this sums up to a total of 8 channels for synchronous capture and playback.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add i2s-mcc support for microchip's sama7g5
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ']
|
['c']
| 1
| 38
| 0
|
--- diff --git a/sound/soc/atmel/mchp-i2s-mcc.c b/sound/soc/atmel/mchp-i2s-mcc.c --- a/sound/soc/atmel/mchp-i2s-mcc.c +++ b/sound/soc/atmel/mchp-i2s-mcc.c +#include <linux/of_device.h> +struct mchp_i2s_mcc_soc_data { + unsigned int data_pin_pair_num; +}; + + const struct mchp_i2s_mcc_soc_data *soc; + /* for i2s and left_j one pin is needed for every 2 channels */ + if (channels > dev->soc->data_pin_pair_num * 2) { + dev_err(dev->dev, + "unsupported number of audio channels: %d ", + channels); + return -einval; + } + + /* enable for interleaved format */ + mrb |= mchp_i2smcc_mrb_cramode_regular; + + case 4: + mra |= mchp_i2smcc_mra_wirecfg_i2s_2_tdm_1; + break; + case 8: + mra |= mchp_i2smcc_mra_wirecfg_i2s_4_tdm_2; + break; +static struct mchp_i2s_mcc_soc_data mchp_i2s_mcc_sam9x60 = { + .data_pin_pair_num = 1, +}; + +static struct mchp_i2s_mcc_soc_data mchp_i2s_mcc_sama7g5 = { + .data_pin_pair_num = 4, +}; + + .data = &mchp_i2s_mcc_sam9x60, + .data = &mchp_i2s_mcc_sama7g5, + dev->soc = of_device_get_match_data(&pdev->dev); + if (!dev->soc) { + dev_err(&pdev->dev, "failed to get soc data "); + return -enodev; + }
|
Audio
|
13c1629d758aae97f329d25714e26edde4e5cf3e
|
codrin ciubotariu
|
sound
|
soc
|
atmel
|
asoc: mchp-i2s-mcc: add support to select tdm pins
|
sama7g5's i2s-mcc has 4 pairs of din/dout pins. since tdm only uses a single pair of pins for synchronous capture and playback, the controller needs to be told which of the pair is connected. this can be mentioned using the "microchip,tdm-data-pair" property from dt. the property is optional, useful only if tdm is used. if it's missing, din/dout 0 pins will be used by default.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add i2s-mcc support for microchip's sama7g5
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ']
|
['c']
| 1
| 48
| 4
|
--- diff --git a/sound/soc/atmel/mchp-i2s-mcc.c b/sound/soc/atmel/mchp-i2s-mcc.c --- a/sound/soc/atmel/mchp-i2s-mcc.c +++ b/sound/soc/atmel/mchp-i2s-mcc.c +#define mchp_i2smcc_mra_wirecfg_tdm(pin) (((pin) << 4) & \ + mchp_i2smcc_mra_wirecfg_mask) + u8 tdm_data_pair; + mra |= mchp_i2smcc_mra_wirecfg_tdm(dev->tdm_data_pair); + +static int mchp_i2s_mcc_soc_data_parse(struct platform_device *pdev, + struct mchp_i2s_mcc_dev *dev) +{ + int err; + + if (!dev->soc) { + dev_err(&pdev->dev, "failed to get soc data "); + return -enodev; + } + + if (dev->soc->data_pin_pair_num == 1) + return 0; + + err = of_property_read_u8(pdev->dev.of_node, "microchip,tdm-data-pair", + &dev->tdm_data_pair); + if (err < 0 && err != -einval) { + dev_err(&pdev->dev, + "bad property data for 'microchip,tdm-data-pair': %d", + err); + return err; + } + if (err == -einval) { + dev_info(&pdev->dev, + "'microchip,tdm-data-pair' not found; assuming din/dout 0 for tdm "); + dev->tdm_data_pair = 0; + } else { + if (dev->tdm_data_pair > dev->soc->data_pin_pair_num - 1) { + dev_err(&pdev->dev, + "invalid value for 'microchip,tdm-data-pair': %d ", + dev->tdm_data_pair); + return -einval; + } + dev_dbg(&pdev->dev, "tmd format on din/dout %d pins ", + dev->tdm_data_pair); + } + + return 0; +} + - if (!dev->soc) { - dev_err(&pdev->dev, "failed to get soc data "); - return -enodev; - } + err = mchp_i2s_mcc_soc_data_parse(pdev, dev); + if (err < 0) + return err; +
|
Audio
|
bfdca489751ff765ee606c85bda1680040dedd8e
|
codrin ciubotariu
|
sound
|
soc
|
atmel
|
asoc: mchp-i2s-mcc: add fifos support
|
i2s-mcc found on sama7g5 includes 2 fifos (capture and playback). when fifos are enabled, bits i2smcc_isra.txlrdyx and i2smcc_isra.txrrdyx must not be used. bits i2smcc_isrb.txffrdy and i2smcc_isrb.rxffrdy must be used instead.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add i2s-mcc support for microchip's sama7g5
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ']
|
['c']
| 1
| 56
| 20
|
--- diff --git a/sound/soc/atmel/mchp-i2s-mcc.c b/sound/soc/atmel/mchp-i2s-mcc.c --- a/sound/soc/atmel/mchp-i2s-mcc.c +++ b/sound/soc/atmel/mchp-i2s-mcc.c -#define mchp_i2smcc_mrb_fifoen bit(1) +#define mchp_i2smcc_mrb_fifoen bit(4) + bool has_fifo; - u32 sra, imra, srb, imrb, pendinga, pendingb, idra = 0; + u32 sra, imra, srb, imrb, pendinga, pendingb, idra = 0, idrb = 0; - idra |= pendinga & (mchp_i2smcc_int_txrdy_mask(dev->channels) | - mchp_i2smcc_int_rxrdy_mask(dev->channels)); - if (idra) + if (dev->soc->has_fifo) { + idrb |= pendingb & (mchp_i2smcc_int_txffrdy | + mchp_i2smcc_int_rxffrdy); + } else { + idra |= pendinga & (mchp_i2smcc_int_txrdy_mask(dev->channels) | + mchp_i2smcc_int_rxrdy_mask(dev->channels)); + } + if (idra || idrb) - if ((imra & mchp_i2smcc_int_txrdy_mask(dev->channels)) && - (imra & mchp_i2smcc_int_txrdy_mask(dev->channels)) == - (idra & mchp_i2smcc_int_txrdy_mask(dev->channels))) { + if ((!dev->soc->has_fifo && + (imra & mchp_i2smcc_int_txrdy_mask(dev->channels)) && + (imra & mchp_i2smcc_int_txrdy_mask(dev->channels)) == + (idra & mchp_i2smcc_int_txrdy_mask(dev->channels))) || + (dev->soc->has_fifo && imrb & mchp_i2smcc_int_txffrdy)) { - if ((imra & mchp_i2smcc_int_rxrdy_mask(dev->channels)) && - (imra & mchp_i2smcc_int_rxrdy_mask(dev->channels)) == - (idra & mchp_i2smcc_int_rxrdy_mask(dev->channels))) { + if ((!dev->soc->has_fifo && + (imra & mchp_i2smcc_int_rxrdy_mask(dev->channels)) && + (imra & mchp_i2smcc_int_rxrdy_mask(dev->channels)) == + (idra & mchp_i2smcc_int_rxrdy_mask(dev->channels))) || + (dev->soc->has_fifo && imrb & mchp_i2smcc_int_rxffrdy)) { - regmap_write(dev->regmap, mchp_i2smcc_idra, idra); + if (dev->soc->has_fifo) + regmap_write(dev->regmap, mchp_i2smcc_idrb, idrb); + else + regmap_write(dev->regmap, mchp_i2smcc_idra, idra); + /* enable fifo if available */ + if (dev->soc->has_fifo) + mrb |= mchp_i2smcc_mrb_fifoen; + - regmap_write(dev->regmap, mchp_i2smcc_idra, - mchp_i2smcc_int_txrdy_mask(dev->channels)); + if (dev->soc->has_fifo) + regmap_write(dev->regmap, mchp_i2smcc_idrb, + mchp_i2smcc_int_txffrdy); + else + regmap_write(dev->regmap, mchp_i2smcc_idra, + mchp_i2smcc_int_txrdy_mask(dev->channels)); + - regmap_write(dev->regmap, mchp_i2smcc_idra, - mchp_i2smcc_int_rxrdy_mask(dev->channels)); + if (dev->soc->has_fifo) + regmap_write(dev->regmap, mchp_i2smcc_idrb, + mchp_i2smcc_int_rxffrdy); + else + regmap_write(dev->regmap, mchp_i2smcc_idra, + mchp_i2smcc_int_rxrdy_mask(dev->channels)); - u32 iera = 0; + u32 iera = 0, ierb = 0; - iera = mchp_i2smcc_int_txrdy_mask(dev->channels); + if (dev->soc->has_fifo) + ierb = mchp_i2smcc_int_txffrdy; + else + iera = mchp_i2smcc_int_txrdy_mask(dev->channels); - iera = mchp_i2smcc_int_rxrdy_mask(dev->channels); + if (dev->soc->has_fifo) + ierb = mchp_i2smcc_int_rxffrdy; + else + iera = mchp_i2smcc_int_rxrdy_mask(dev->channels); - regmap_write(dev->regmap, mchp_i2smcc_iera, iera); + if (dev->soc->has_fifo) + regmap_write(dev->regmap, mchp_i2smcc_ierb, ierb); + else + regmap_write(dev->regmap, mchp_i2smcc_iera, iera); + .has_fifo = true,
|
Audio
|
16135d66309a5ca67e05cd7d0b1b038597a0b0a3
|
codrin ciubotariu
|
sound
|
soc
|
atmel
|
asoc: mchp,i2s-mcc: add sama7g5 to binding
|
sama7g5 includes an updated version of the i2s-mcc driver, that includes 3 more din/dout pin pairs for multi-channel.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add i2s-mcc support for microchip's sama7g5
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ']
|
['txt']
| 1
| 2
| 1
|
--- diff --git a/documentation/devicetree/bindings/sound/mchp-i2s-mcc.txt b/documentation/devicetree/bindings/sound/mchp-i2s-mcc.txt --- a/documentation/devicetree/bindings/sound/mchp-i2s-mcc.txt +++ b/documentation/devicetree/bindings/sound/mchp-i2s-mcc.txt -- compatible: should be "microchip,sam9x60-i2smcc". +- compatible: should be "microchip,sam9x60-i2smcc" or + "microchip,sama7g5-i2smcc". - reg: should be the physical base address of the controller and the - interrupts: should contain the interrupt for the controller.
|
Audio
|
153bb1feefd2a7c907d65ccf89953feb1548e60f
|
codrin ciubotariu
|
documentation
|
devicetree
|
bindings, sound
|
asoc: mediatek: mt6359: add mt6359 accdet jack driver
|
mt6359 audio codec supports jack detection feature, adds mt6359 accdet driver to support jack plugged detection and key detection.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add mt6359 accdet jack driver
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ', 'mediatek', 'mt6359']
|
['h', 'kconfig', 'c', 'makefile']
| 5
| 2,975
| 107
|
--- diff --git a/sound/soc/codecs/kconfig b/sound/soc/codecs/kconfig --- a/sound/soc/codecs/kconfig +++ b/sound/soc/codecs/kconfig +config snd_soc_mt6359_accdet + tristate "mediatek mt6359 accdet driver" + depends on mtk_pmic_wrap + help + accdet means accessory detection technology, mediatek develop it + for asoc codec soc-jack detection mechanism. + select n if you don't have jack on board. + diff --git a/sound/soc/codecs/makefile b/sound/soc/codecs/makefile --- a/sound/soc/codecs/makefile +++ b/sound/soc/codecs/makefile +snd-soc-mt6359-accdet-objs := mt6359-accdet.o +obj-$(config_snd_soc_mt6359_accdet) += mt6359-accdet.o diff --git a/sound/soc/codecs/mt6359-accdet.c b/sound/soc/codecs/mt6359-accdet.c --- /dev/null +++ b/sound/soc/codecs/mt6359-accdet.c +// spdx-license-identifier: gpl-2.0 +// +// mt6359-accdet.c -- alsa soc mt6359 accdet driver +// +// copyright (c) 2021 mediatek inc. +// author: argus lin <argus.lin@mediatek.com> +// + +#include <linux/of_gpio.h> +#include <linux/of.h> +#include <linux/of_irq.h> +#include <linux/of_device.h> +#include <linux/of_address.h> +#include <linux/input.h> +#include <linux/kthread.h> +#include <linux/io.h> +#include <linux/sched/clock.h> +#include <linux/workqueue.h> +#include <linux/timer.h> +#include <linux/delay.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/init.h> +#include <linux/irqdomain.h> +#include <linux/irq.h> +#include <linux/regmap.h> +#include <sound/soc.h> +#include <sound/jack.h> +#include <linux/mfd/mt6397/core.h> + +#include "mt6359-accdet.h" +#include "mt6359.h" + +/* global variable definitions */ +#define register_val(x) ((x) - 1) + +/* mt6359 accdet capability */ +#define accdet_pmic_eint_irq bit(0) +#define accdet_ap_gpio_eint bit(1) + +#define accdet_pmic_eint0 bit(2) +#define accdet_pmic_eint1 bit(3) +#define accdet_pmic_bi_eint bit(4) + +#define accdet_pmic_gpio_trig_eint bit(5) +#define accdet_pmic_inverter_trig_eint bit(6) +#define accdet_pmic_rsv_eint bit(7) + +#define accdet_three_key bit(8) +#define accdet_four_key bit(9) +#define accdet_tri_key_cdd bit(10) +#define accdet_rsv_key bit(11) + +#define accdet_analog_fastdischarge bit(12) +#define accdet_digital_fastdischarge bit(13) +#define accdet_ad_fastdischrage bit(14) + +static struct platform_driver mt6359_accdet_driver; +static const struct snd_soc_component_driver mt6359_accdet_soc_driver; + +/* local function declaration */ +static void accdet_set_debounce(struct mt6359_accdet *priv, int state, + unsigned int debounce); +static unsigned int adjust_eint_analog_setting(struct mt6359_accdet *priv); +static void config_digital_init_by_mode(struct mt6359_accdet *priv); +static void config_eint_init_by_mode(struct mt6359_accdet *priv); +static inline void mt6359_accdet_init(struct mt6359_accdet *priv); +static unsigned int mt6359_accdet_jd_setting(struct mt6359_accdet *priv); +static void mt6359_accdet_recover_jd_setting(struct mt6359_accdet *priv); +static void mt6359_accdet_jack_report(struct mt6359_accdet *priv); +static void recover_eint_analog_setting(struct mt6359_accdet *priv); +static void recover_eint_digital_setting(struct mt6359_accdet *priv); +static void recover_eint_setting(struct mt6359_accdet *priv); + +static unsigned int adjust_eint_analog_setting(struct mt6359_accdet *priv) +{ + if (priv->data->eint_detect_mode == 0x3 || + priv->data->eint_detect_mode == 0x4) { + /* esd switches off */ + regmap_update_bits(priv->regmap, + rg_accdetspare_addr, 1 << 8, 0); + } + if (priv->data->eint_detect_mode == 0x4) { + if (priv->caps & accdet_pmic_eint0) { + /* enable rg_eint0configaccdet */ + regmap_update_bits(priv->regmap, + rg_eint0configaccdet_addr, + rg_eint0configaccdet_mask_sft, + bit(rg_eint0configaccdet_sft)); + } else if (priv->caps & accdet_pmic_eint1) { + /* enable rg_eint1configaccdet */ + regmap_update_bits(priv->regmap, + rg_eint1configaccdet_addr, + rg_eint1configaccdet_mask_sft, + bit(rg_eint1configaccdet_sft)); + } + if (priv->data->eint_use_ext_res == 0x3 || + priv->data->eint_use_ext_res == 0x4) { + /*select 500k, use internal resistor */ + regmap_update_bits(priv->regmap, + rg_eint0hirenb_addr, + rg_eint0hirenb_mask_sft, + bit(rg_eint0hirenb_sft)); + } + } + return 0; +} + +static unsigned int adjust_eint_digital_setting(struct mt6359_accdet *priv) +{ + if (priv->caps & accdet_pmic_eint0) { + /* disable inverter */ + regmap_update_bits(priv->regmap, + accdet_eint0_inverter_sw_en_addr, + accdet_eint0_inverter_sw_en_mask_sft, 0); + } else if (priv->caps & accdet_pmic_eint1) { + /* disable inverter */ + regmap_update_bits(priv->regmap, + accdet_eint1_inverter_sw_en_addr, + accdet_eint1_inverter_sw_en_mask_sft, 0); + } + + if (priv->data->eint_detect_mode == 0x4) { + if (priv->caps & accdet_pmic_eint0) { + /* set da stable signal */ + regmap_update_bits(priv->regmap, + accdet_da_stable_addr, + accdet_eint0_cen_stable_mask_sft, 0); + } else if (priv->caps & accdet_pmic_eint1) { + /* set da stable signal */ + regmap_update_bits(priv->regmap, + accdet_da_stable_addr, + accdet_eint1_cen_stable_mask_sft, 0); + } + } + return 0; +} + +static unsigned int mt6359_accdet_jd_setting(struct mt6359_accdet *priv) +{ + if (priv->jd_sts == m_plug_in) { + /* adjust digital setting */ + adjust_eint_digital_setting(priv); + /* adjust analog setting */ + adjust_eint_analog_setting(priv); + } else if (priv->jd_sts == m_plug_out) { + /* set debounce to 1ms */ + accdet_set_debounce(priv, eint_state000, + priv->data->pwm_deb->eint_debounce0); + } else { + dev_dbg(priv->dev, "should not be here %s() ", __func__); + } + + return 0; +} + +static void recover_eint_analog_setting(struct mt6359_accdet *priv) +{ + if (priv->data->eint_detect_mode == 0x3 || + priv->data->eint_detect_mode == 0x4) { + /* esd switches on */ + regmap_update_bits(priv->regmap, rg_accdetspare_addr, + 1 << 8, 1 << 8); + } + if (priv->data->eint_detect_mode == 0x4) { + if (priv->caps & accdet_pmic_eint0) { + /* disable rg_eint0configaccdet */ + regmap_update_bits(priv->regmap, + rg_eint0configaccdet_addr, + rg_eint0configaccdet_mask_sft, 0); + } else if (priv->caps & accdet_pmic_eint1) { + /* disable rg_eint1configaccdet */ + regmap_update_bits(priv->regmap, + rg_eint1configaccdet_addr, + rg_eint1configaccdet_mask_sft, 0); + } + regmap_update_bits(priv->regmap, rg_eint0hirenb_addr, + rg_eint0hirenb_mask_sft, 0); + } +} + +static void recover_eint_digital_setting(struct mt6359_accdet *priv) +{ + if (priv->caps & accdet_pmic_eint0) { + regmap_update_bits(priv->regmap, + accdet_eint0_m_sw_en_addr, + accdet_eint0_m_sw_en_mask_sft, 0); + } else if (priv->caps & accdet_pmic_eint1) { + regmap_update_bits(priv->regmap, + accdet_eint1_m_sw_en_addr, + accdet_eint1_m_sw_en_mask_sft, 0); + } + if (priv->data->eint_detect_mode == 0x4) { + /* enable eint0cen */ + if (priv->caps & accdet_pmic_eint0) { + /* enable eint0cen */ + regmap_update_bits(priv->regmap, + accdet_da_stable_addr, + accdet_eint0_cen_stable_mask_sft, + bit(accdet_eint0_cen_stable_sft)); + } else if (priv->caps & accdet_pmic_eint1) { + /* enable eint1cen */ + regmap_update_bits(priv->regmap, + accdet_da_stable_addr, + accdet_eint1_cen_stable_mask_sft, + bit(accdet_eint1_cen_stable_sft)); + } + } + + if (priv->data->eint_detect_mode != 0x1) { + if (priv->caps & accdet_pmic_eint0) { + /* enable inverter */ + regmap_update_bits(priv->regmap, + accdet_eint0_inverter_sw_en_addr, + accdet_eint0_inverter_sw_en_mask_sft, + bit(accdet_eint0_inverter_sw_en_sft)); + } else if (priv->caps & accdet_pmic_eint1) { + /* enable inverter */ + regmap_update_bits(priv->regmap, + accdet_eint1_inverter_sw_en_addr, + accdet_eint1_inverter_sw_en_mask_sft, + bit(accdet_eint1_inverter_sw_en_sft)); + } + } +} + +static void recover_eint_setting(struct mt6359_accdet *priv) +{ + if (priv->jd_sts == m_plug_out) { + recover_eint_analog_setting(priv); + recover_eint_digital_setting(priv); + } +} + +static void mt6359_accdet_recover_jd_setting(struct mt6359_accdet *priv) +{ + int ret = 0; + unsigned int value = 0; + + regmap_update_bits(priv->regmap, accdet_irq_addr, + accdet_irq_clr_mask_sft, bit(accdet_irq_clr_sft)); + usleep_range(200, 300); + ret = regmap_read_poll_timeout(priv->regmap, + accdet_irq_addr, + value, + (value & accdet_irq_mask_sft) == 0, + 0, + 1000); + if (ret) + dev_warn(priv->dev, "%s(), ret %d ", __func__, ret); + /* clear accdet int, modify for fix interrupt trigger twice error */ + regmap_update_bits(priv->regmap, accdet_irq_addr, + accdet_irq_clr_mask_sft, 0); + regmap_update_bits(priv->regmap, rg_int_status_accdet_addr, + rg_int_status_accdet_mask_sft, + bit(rg_int_status_accdet_sft)); + + /* recover accdet debounce0,3 */ + accdet_set_debounce(priv, accdet_state000, + priv->data->pwm_deb->debounce0); + accdet_set_debounce(priv, accdet_state001, + priv->data->pwm_deb->debounce1); + accdet_set_debounce(priv, accdet_state011, + priv->data->pwm_deb->debounce3); + + priv->jack_type = 0; + priv->btn_type = 0; + priv->accdet_status = 0x3; + mt6359_accdet_jack_report(priv); +} + +static void accdet_set_debounce(struct mt6359_accdet *priv, int state, + unsigned int debounce) +{ + switch (state) { + case accdet_state000: + regmap_write(priv->regmap, accdet_debounce0_addr, debounce); + break; + case accdet_state001: + regmap_write(priv->regmap, accdet_debounce1_addr, debounce); + break; + case accdet_state010: + regmap_write(priv->regmap, accdet_debounce2_addr, debounce); + break; + case accdet_state011: + regmap_write(priv->regmap, accdet_debounce3_addr, debounce); + break; + case accdet_auxadc: + regmap_write(priv->regmap, + accdet_connect_auxadc_time_dig_addr, debounce); + break; + case eint_state000: + regmap_update_bits(priv->regmap, accdet_eint_debounce0_addr, + 0xf << accdet_eint_debounce0_sft, + debounce << accdet_eint_debounce0_sft); + break; + case eint_state001: + regmap_update_bits(priv->regmap, accdet_eint_debounce1_addr, + 0xf << accdet_eint_debounce1_sft, + debounce << accdet_eint_debounce1_sft); + break; + case eint_state010: + regmap_update_bits(priv->regmap, accdet_eint_debounce2_addr, + 0xf << accdet_eint_debounce2_sft, + debounce << accdet_eint_debounce2_sft); + break; + case eint_state011: + regmap_update_bits(priv->regmap, accdet_eint_debounce3_addr, + 0xf << accdet_eint_debounce3_sft, + debounce << accdet_eint_debounce3_sft); + break; + case eint_inverter_state000: + regmap_write(priv->regmap, accdet_eint_inverter_debounce_addr, + debounce); + break; + default: + dev_warn(priv->dev, "error: %s error state (%d) ", __func__, + state); + break; + } +} + +static void mt6359_accdet_jack_report(struct mt6359_accdet *priv) +{ + int report = 0; + + if (!priv->jack) + return; + + report = priv->jack_type | priv->btn_type; + snd_soc_jack_report(priv->jack, report, mt6359_accdet_jack_mask); +} + +static unsigned int check_button(struct mt6359_accdet *priv, unsigned int v) +{ + if (priv->caps & accdet_four_key) { + if (v < priv->data->four_key.down && + v >= priv->data->four_key.up) + priv->btn_type = snd_jack_btn_1; + if (v < priv->data->four_key.up && + v >= priv->data->four_key.voice) + priv->btn_type = snd_jack_btn_2; + if (v < priv->data->four_key.voice && + v >= priv->data->four_key.mid) + priv->btn_type = snd_jack_btn_3; + if (v < priv->data->four_key.mid) + priv->btn_type = snd_jack_btn_0; + } else { + if (v < priv->data->three_key.down && + v >= priv->data->three_key.up) + priv->btn_type = snd_jack_btn_1; + if (v < priv->data->three_key.up && + v >= priv->data->three_key.mid) + priv->btn_type = snd_jack_btn_2; + if (v < priv->data->three_key.mid) + priv->btn_type = snd_jack_btn_0; + } + return 0; +} + +static void is_key_pressed(struct mt6359_accdet *priv, bool pressed) +{ + priv->btn_type = priv->jack_type & ~mt6359_accdet_btn_mask; + + if (pressed) + check_button(priv, priv->cali_voltage); +} + +static inline void check_jack_btn_type(struct mt6359_accdet *priv) +{ + unsigned int val = 0; + + regmap_read(priv->regmap, accdet_mem_in_addr, &val); + + priv->accdet_status = + (val >> accdet_state_mem_in_offset) & accdet_state_ab_mask; + + switch (priv->accdet_status) { + case 0: + if (priv->jack_type == snd_jack_headset) + is_key_pressed(priv, true); + else + priv->jack_type = snd_jack_headphone; + break; + case 1: + if (priv->jack_type == snd_jack_headset) { + is_key_pressed(priv, false); + } else { + priv->jack_type = snd_jack_headset; + accdet_set_debounce(priv, eint_state011, 0x1); + } + break; + case 3: + default: + priv->jack_type = 0; + break; + } +} + +static void mt6359_accdet_work(struct work_struct *work) +{ + struct mt6359_accdet *priv = + container_of(work, struct mt6359_accdet, accdet_work); + + mutex_lock(&priv->res_lock); + priv->pre_accdet_status = priv->accdet_status; + check_jack_btn_type(priv); + + if (priv->jack_plugged && + priv->pre_accdet_status != priv->accdet_status) + mt6359_accdet_jack_report(priv); + mutex_unlock(&priv->res_lock); +} + +static void mt6359_accdet_jd_work(struct work_struct *work) +{ + int ret = 0; + unsigned int value = 0; + + struct mt6359_accdet *priv = + container_of(work, struct mt6359_accdet, jd_work); + + mutex_lock(&priv->res_lock); + if (priv->jd_sts == m_plug_in) { + priv->jack_plugged = true; + + /* set and clear initial bit every eint interrupt */ + regmap_update_bits(priv->regmap, accdet_seq_init_addr, + accdet_seq_init_mask_sft, + bit(accdet_seq_init_sft)); + regmap_update_bits(priv->regmap, accdet_seq_init_addr, + accdet_seq_init_mask_sft, 0); + ret = regmap_read_poll_timeout(priv->regmap, + accdet_seq_init_addr, + value, + (value & accdet_seq_init_mask_sft) == 0, + 0, + 1000); + if (ret) + dev_err(priv->dev, "%s(), ret %d ", __func__, ret); + + /* enable accdet unit */ + regmap_update_bits(priv->regmap, accdet_sw_en_addr, + accdet_sw_en_mask_sft, bit(accdet_sw_en_sft)); + } else if (priv->jd_sts == m_plug_out) { + priv->jack_plugged = false; + + accdet_set_debounce(priv, accdet_state011, + priv->data->pwm_deb->debounce3); + regmap_update_bits(priv->regmap, accdet_sw_en_addr, + accdet_sw_en_mask_sft, 0); + mt6359_accdet_recover_jd_setting(priv); + } + + if (priv->caps & accdet_pmic_eint_irq) + recover_eint_setting(priv); + mutex_unlock(&priv->res_lock); +} + +static irqreturn_t mt6359_accdet_irq(int irq, void *data) +{ + struct mt6359_accdet *priv = data; + unsigned int irq_val = 0, val = 0, value = 0; + int ret = 0; + + mutex_lock(&priv->res_lock); + regmap_read(priv->regmap, accdet_irq_addr, &irq_val); + + if (irq_val & accdet_irq_mask_sft) { + regmap_update_bits(priv->regmap, accdet_irq_addr, + accdet_irq_clr_mask_sft, + bit(accdet_irq_clr_sft)); + ret = regmap_read_poll_timeout(priv->regmap, + accdet_irq_addr, + value, + (value & accdet_irq_mask_sft) == 0, + 0, + 1000); + if (ret) { + dev_err(priv->dev, "%s(), ret %d ", __func__, ret); + mutex_unlock(&priv->res_lock); + return irq_none; + } + regmap_update_bits(priv->regmap, accdet_irq_addr, + accdet_irq_clr_mask_sft, 0); + regmap_update_bits(priv->regmap, rg_int_status_accdet_addr, + rg_int_status_accdet_mask_sft, + bit(rg_int_status_accdet_sft)); + + queue_work(priv->accdet_workqueue, &priv->accdet_work); + } else { + if (irq_val & accdet_eint0_irq_mask_sft) { + regmap_update_bits(priv->regmap, accdet_irq_addr, + accdet_eint0_irq_clr_mask_sft, + bit(accdet_eint0_irq_clr_sft)); + ret = regmap_read_poll_timeout(priv->regmap, + accdet_irq_addr, + value, + (value & accdet_eint0_irq_mask_sft) == 0, + 0, + 1000); + if (ret) { + dev_err(priv->dev, "%s(), ret %d ", __func__, + ret); + mutex_unlock(&priv->res_lock); + return irq_none; + } + regmap_update_bits(priv->regmap, accdet_irq_addr, + accdet_eint0_irq_clr_mask_sft, 0); + regmap_update_bits(priv->regmap, + rg_int_status_accdet_addr, + rg_int_status_accdet_eint0_mask_sft, + bit(rg_int_status_accdet_eint0_sft)); + } + if (irq_val & accdet_eint1_irq_mask_sft) { + regmap_update_bits(priv->regmap, accdet_irq_addr, + accdet_eint1_irq_clr_mask_sft, + bit(accdet_eint1_irq_clr_sft)); + ret = regmap_read_poll_timeout(priv->regmap, + accdet_irq_addr, + value, + (value & accdet_eint1_irq_mask_sft) == 0, + 0, + 1000); + if (ret) { + dev_err(priv->dev, "%s(), ret %d ", __func__, + ret); + mutex_unlock(&priv->res_lock); + return irq_none; + } + regmap_update_bits(priv->regmap, accdet_irq_addr, + accdet_eint1_irq_clr_mask_sft, 0); + regmap_update_bits(priv->regmap, + rg_int_status_accdet_addr, + rg_int_status_accdet_eint1_mask_sft, + bit(rg_int_status_accdet_eint1_sft)); + } + /* get jack detection status */ + regmap_read(priv->regmap, accdet_eint0_mem_in_addr, &val); + priv->jd_sts = ((val >> accdet_eint0_mem_in_sft) & + accdet_eint0_mem_in_mask); + /* adjust eint digital/analog setting */ + mt6359_accdet_jd_setting(priv); + + queue_work(priv->jd_workqueue, &priv->jd_work); + } + mutex_unlock(&priv->res_lock); + + return irq_handled; +} + +static int mt6359_accdet_parse_dt(struct mt6359_accdet *priv) +{ + int ret = 0; + struct device *dev = priv->dev; + struct device_node *node = null; + int pwm_deb[15] = {0}; + unsigned int tmp = 0; + + node = of_get_child_by_name(dev->parent->of_node, "accdet"); + if (!node) + return -einval; + + ret = of_property_read_u32(node, "mediatek,mic-vol", + &priv->data->mic_vol); + if (ret) + priv->data->mic_vol = 8; + + ret = of_property_read_u32(node, "mediatek,plugout-debounce", + &priv->data->plugout_deb); + if (ret) + priv->data->plugout_deb = 1; + + ret = of_property_read_u32(node, "mediatek,mic-mode", + &priv->data->mic_mode); + if (ret) + priv->data->mic_mode = 2; + + ret = of_property_read_u32_array(node, "mediatek,pwm-deb-setting", + pwm_deb, array_size(pwm_deb)); + /* debounce8(auxadc debounce) is default, needn't get from dts */ + if (!ret) + memcpy(priv->data->pwm_deb, pwm_deb, sizeof(pwm_deb)); + + ret = of_property_read_u32(node, "mediatek,eint-level-pol", + &priv->data->eint_pol); + if (ret) + priv->data->eint_pol = 8; + + ret = of_property_read_u32(node, "mediatek,eint-use-ap", &tmp); + if (ret) + tmp = 0; + if (tmp == 0) + priv->caps |= accdet_pmic_eint_irq; + else if (tmp == 1) + priv->caps |= accdet_ap_gpio_eint; + + ret = of_property_read_u32(node, "mediatek,eint-detect-mode", + &priv->data->eint_detect_mode); + if (ret) { + /* eint detection mode equals to eint hw mode */ + priv->data->eint_detect_mode = 0x4; + } + + ret = of_property_read_u32(node, "mediatek,eint-num", &tmp); + if (ret) + tmp = 0; + if (tmp == 0) + priv->caps |= accdet_pmic_eint0; + else if (tmp == 1) + priv->caps |= accdet_pmic_eint1; + else if (tmp == 2) + priv->caps |= accdet_pmic_bi_eint; + + ret = of_property_read_u32(node, "mediatek,eint-trig-mode", + &tmp); + if (ret) + tmp = 0; + if (tmp == 0) + priv->caps |= accdet_pmic_gpio_trig_eint; + else if (tmp == 1) + priv->caps |= accdet_pmic_inverter_trig_eint; + + ret = of_property_read_u32(node, "mediatek,eint-use-ext-res", + &priv->data->eint_use_ext_res); + if (ret) { + /* eint use internal resister */ + priv->data->eint_use_ext_res = 0x0; + } + + ret = of_property_read_u32(node, "mediatek,eint-comp-vth", + &priv->data->eint_comp_vth); + if (ret) + priv->data->eint_comp_vth = 0x0; + + ret = of_property_read_u32(node, "mediatek,key-mode", &tmp); + if (ret) + tmp = 0; + if (tmp == 0) { + int three_key[4]; + + priv->caps |= accdet_three_key; + ret = of_property_read_u32_array(node, + "mediatek,three-key-thr", + three_key, + array_size(three_key)); + if (!ret) + memcpy(&priv->data->three_key, three_key + 1, + sizeof(struct three_key_threshold)); + } else if (tmp == 1) { + int four_key[5]; + + priv->caps |= accdet_four_key; + ret = of_property_read_u32_array(node, + "mediatek,four-key-thr", + four_key, + array_size(four_key)); + if (!ret) { + memcpy(&priv->data->four_key, four_key + 1, + sizeof(struct four_key_threshold)); + } else { + dev_warn(priv->dev, + "accdet no 4-key-thrsh dts, use efuse "); + } + } else if (tmp == 2) { + int three_key[4]; + + priv->caps |= accdet_tri_key_cdd; + ret = of_property_read_u32_array(node, + "mediatek,tri-key-cdd-thr", + three_key, + array_size(three_key)); + if (!ret) + memcpy(&priv->data->three_key, three_key + 1, + sizeof(struct three_key_threshold)); + } + + dev_warn(priv->dev, "accdet caps=%x ", priv->caps); + + return 0; +} + +static void config_digital_init_by_mode(struct mt6359_accdet *priv) +{ + /* enable eint cmpmem pwm */ + regmap_write(priv->regmap, accdet_eint_cmpmen_pwm_thresh_addr, + (priv->data->pwm_deb->eint_pwm_width << 4 | + priv->data->pwm_deb->eint_pwm_thresh)); + /* da signal stable */ + if (priv->caps & accdet_pmic_eint0) { + regmap_write(priv->regmap, accdet_da_stable_addr, + accdet_eint0_stable_val); + } else if (priv->caps & accdet_pmic_eint1) { + regmap_write(priv->regmap, accdet_da_stable_addr, + accdet_eint1_stable_val); + } + /* after receive n+1 number, interrupt issued. */ + regmap_update_bits(priv->regmap, accdet_eint_m_plug_in_num_addr, + accdet_eint_m_plug_in_num_mask_sft, + bit(accdet_eint_m_plug_in_num_sft)); + /* setting hw mode, enable digital fast discharge + * if use eint0 & eint1 detection, please modify + * accdet_hwmode_en_addr[2:1] + */ + regmap_write(priv->regmap, accdet_hwmode_en_addr, 0x100); + + regmap_update_bits(priv->regmap, accdet_eint_m_detect_en_addr, + accdet_eint_m_detect_en_mask_sft, 0); + + /* enable pwm */ + regmap_write(priv->regmap, accdet_cmp_pwm_en_addr, 0x67); + /* enable inverter detection */ + if (priv->data->eint_detect_mode == 0x1) { + /* disable inverter detection */ + if (priv->caps & accdet_pmic_eint0) { + regmap_update_bits(priv->regmap, + accdet_eint0_inverter_sw_en_addr, + accdet_eint0_inverter_sw_en_mask_sft, + 0); + } else if (priv->caps & accdet_pmic_eint1) { + regmap_update_bits(priv->regmap, + accdet_eint1_inverter_sw_en_addr, + accdet_eint1_inverter_sw_en_mask_sft, + 0); + } + } else { + if (priv->caps & accdet_pmic_eint0) { + regmap_update_bits(priv->regmap, + accdet_eint0_inverter_sw_en_addr, + accdet_eint0_inverter_sw_en_mask_sft, + bit(accdet_eint0_inverter_sw_en_sft)); + } else if (priv->caps & accdet_pmic_eint1) { + regmap_update_bits(priv->regmap, + accdet_eint1_inverter_sw_en_addr, + accdet_eint1_inverter_sw_en_mask_sft, + bit(accdet_eint1_inverter_sw_en_sft)); + } + } +} + +static void config_eint_init_by_mode(struct mt6359_accdet *priv) +{ + unsigned int val = 0; + + if (priv->caps & accdet_pmic_eint0) { + regmap_update_bits(priv->regmap, rg_eint0en_addr, + rg_eint0en_mask_sft, bit(rg_eint0en_sft)); + } else if (priv->caps & accdet_pmic_eint1) { + regmap_update_bits(priv->regmap, rg_eint1en_addr, + rg_eint1en_mask_sft, bit(rg_eint1en_sft)); + } + /* esd switches on */ + regmap_update_bits(priv->regmap, rg_accdetspare_addr, + 1 << 8, 1 << 8); + /* before playback, set ncp pull low before nagative voltage */ + regmap_update_bits(priv->regmap, rg_ncp_pddis_en_addr, + rg_ncp_pddis_en_mask_sft, bit(rg_ncp_pddis_en_sft)); + + if (priv->data->eint_detect_mode == 0x1 || + priv->data->eint_detect_mode == 0x2 || + priv->data->eint_detect_mode == 0x3) { + if (priv->data->eint_use_ext_res == 0x1) { + if (priv->caps & accdet_pmic_eint0) { + regmap_update_bits(priv->regmap, + rg_eint0configaccdet_addr, + rg_eint0configaccdet_mask_sft, + 0); + } else if (priv->caps & accdet_pmic_eint1) { + regmap_update_bits(priv->regmap, + rg_eint1configaccdet_addr, + rg_eint1configaccdet_mask_sft, + 0); + } + } else { + if (priv->caps & accdet_pmic_eint0) { + regmap_update_bits(priv->regmap, + rg_eint0configaccdet_addr, + rg_eint0configaccdet_mask_sft, + bit(rg_eint0configaccdet_sft)); + } else if (priv->caps & accdet_pmic_eint1) { + regmap_update_bits(priv->regmap, + rg_eint1configaccdet_addr, + rg_eint1configaccdet_mask_sft, + bit(rg_eint1configaccdet_sft)); + } + } + } + + if (priv->data->eint_detect_mode != 0x1) { + /* current detect set 0.25ua */ + regmap_update_bits(priv->regmap, rg_accdetspare_addr, + 0x3 << rg_accdetspare_sft, + 0x3 << rg_accdetspare_sft); + } + regmap_write(priv->regmap, rg_eintcompvth_addr, + val | priv->data->eint_comp_vth << rg_eintcompvth_sft); +} + +static void mt6359_accdet_init(struct mt6359_accdet *priv) +{ + unsigned int reg = 0; + + regmap_update_bits(priv->regmap, accdet_seq_init_addr, + accdet_seq_init_mask_sft, bit(accdet_seq_init_sft)); + mdelay(2); + regmap_update_bits(priv->regmap, accdet_seq_init_addr, + accdet_seq_init_mask_sft, 0); + mdelay(1); + /* init the debounce time (debounce/32768)sec */ + accdet_set_debounce(priv, accdet_state000, + priv->data->pwm_deb->debounce0); + accdet_set_debounce(priv, accdet_state001, + priv->data->pwm_deb->debounce1); + accdet_set_debounce(priv, accdet_state011, + priv->data->pwm_deb->debounce3); + accdet_set_debounce(priv, accdet_auxadc, + priv->data->pwm_deb->debounce4); + + accdet_set_debounce(priv, eint_state000, + priv->data->pwm_deb->eint_debounce0); + accdet_set_debounce(priv, eint_state001, + priv->data->pwm_deb->eint_debounce1); + accdet_set_debounce(priv, eint_state011, + priv->data->pwm_deb->eint_debounce3); + accdet_set_debounce(priv, eint_inverter_state000, + priv->data->pwm_deb->eint_inverter_debounce); + + regmap_update_bits(priv->regmap, rg_accdet_rst_addr, + rg_accdet_rst_mask_sft, bit(rg_accdet_rst_sft)); + regmap_update_bits(priv->regmap, rg_accdet_rst_addr, + rg_accdet_rst_mask_sft, 0); + + /* clear high micbias1 voltage setting */ + regmap_update_bits(priv->regmap, rg_audpwdbmicbias1_addr, + 0x3 << rg_audmicbias1hven_sft, 0); + regmap_update_bits(priv->regmap, rg_audpwdbmicbias1_addr, + 0x7 << rg_audmicbias1vref_sft, 0); + + /* init pwm frequency, duty & rise/falling delay */ + regmap_write(priv->regmap, accdet_pwm_width_addr, + register_val(priv->data->pwm_deb->pwm_width)); + regmap_write(priv->regmap, accdet_pwm_thresh_addr, + register_val(priv->data->pwm_deb->pwm_thresh)); + regmap_write(priv->regmap, accdet_rise_delay_addr, + (priv->data->pwm_deb->fall_delay << 15 | + priv->data->pwm_deb->rise_delay)); + + regmap_read(priv->regmap, rg_audpwdbmicbias1_addr, ®); + if (priv->data->mic_vol <= 7) { + /* micbias1 <= 2.7v */ + regmap_write(priv->regmap, rg_audpwdbmicbias1_addr, + reg | (priv->data->mic_vol << rg_audmicbias1vref_sft) | + rg_audmicbias1lowpen_mask_sft); + } else if (priv->data->mic_vol == 8) { + /* micbias1 = 2.8v */ + regmap_write(priv->regmap, rg_audpwdbmicbias1_addr, + reg | (3 << rg_audmicbias1hven_sft) | + rg_audmicbias1lowpen_mask_sft); + } else if (priv->data->mic_vol == 9) { + /* micbias1 = 2.85v */ + regmap_write(priv->regmap, rg_audpwdbmicbias1_addr, + reg | (1 << rg_audmicbias1hven_sft) | + rg_audmicbias1lowpen_mask_sft); + } + /* mic mode setting */ + regmap_read(priv->regmap, rg_audaccdetmicbias0pulllow_addr, ®); + if (priv->data->mic_mode == headset_mode_1) { + /* acc mode*/ + regmap_write(priv->regmap, rg_audaccdetmicbias0pulllow_addr, + reg | rg_accdet_mode_ana11_mode1); + /* enable analog fast discharge */ + regmap_update_bits(priv->regmap, rg_analogfden_addr, + rg_analogfden_mask_sft, + bit(rg_analogfden_sft)); + regmap_update_bits(priv->regmap, rg_accdetspare_addr, + 0x3 << 11, 0x3 << 11); + } else if (priv->data->mic_mode == headset_mode_2) { + /* dcc mode low cost mode without internal bias */ + regmap_write(priv->regmap, rg_audaccdetmicbias0pulllow_addr, + reg | rg_accdet_mode_ana11_mode2); + /* enable analog fast discharge */ + regmap_update_bits(priv->regmap, rg_analogfden_addr, + 0x3 << rg_analogfden_sft, + 0x3 << rg_analogfden_sft); + } else if (priv->data->mic_mode == headset_mode_6) { + /* dcc mode low cost mode with internal bias, + * bit8 = 1 to use internal bias + */ + regmap_write(priv->regmap, rg_audaccdetmicbias0pulllow_addr, + reg | rg_accdet_mode_ana11_mode6); + regmap_update_bits(priv->regmap, rg_audpwdbmicbias1_addr, + rg_audmicbias1dcsw1pen_mask_sft, + bit(rg_audmicbias1dcsw1pen_sft)); + /* enable analog fast discharge */ + regmap_update_bits(priv->regmap, rg_analogfden_addr, + 0x3 << rg_analogfden_sft, + 0x3 << rg_analogfden_sft); + } + + if (priv->caps & accdet_pmic_eint_irq) { + config_eint_init_by_mode(priv); + config_digital_init_by_mode(priv); + } +} + +int mt6359_accdet_enable_jack_detect(struct snd_soc_component *component, + struct snd_soc_jack *jack) +{ + struct mt6359_accdet *priv = + snd_soc_component_get_drvdata(component); + + snd_jack_set_key(jack->jack, snd_jack_btn_0, key_playpause); + snd_jack_set_key(jack->jack, snd_jack_btn_1, key_volumedown); + snd_jack_set_key(jack->jack, snd_jack_btn_2, key_volumeup); + snd_jack_set_key(jack->jack, snd_jack_btn_3, key_voicecommand); + + priv->jack = jack; + + mt6359_accdet_jack_report(priv); + + return 0; +} +export_symbol_gpl(mt6359_accdet_enable_jack_detect); + +static int mt6359_accdet_probe(struct platform_device *pdev) +{ + struct mt6359_accdet *priv; + struct mt6397_chip *mt6397 = dev_get_drvdata(pdev->dev.parent); + int ret = 0; + + dev_dbg(&pdev->dev, "%s(), dev name %s ", + __func__, dev_name(&pdev->dev)); + + priv = devm_kzalloc(&pdev->dev, sizeof(struct mt6359_accdet), + gfp_kernel); + if (!priv) + return -enomem; + + priv->data = devm_kzalloc(&pdev->dev, sizeof(struct dts_data), + gfp_kernel); + if (!priv->data) + return -enomem; + + priv->data->pwm_deb = devm_kzalloc(&pdev->dev, + sizeof(struct pwm_deb_settings), + gfp_kernel); + if (!priv->data->pwm_deb) + return -enomem; + + priv->regmap = mt6397->regmap; + if (is_err(priv->regmap)) { + ret = ptr_err(priv->regmap); + dev_err(&pdev->dev, "failed to allocate register map: %d ", + ret); + return ret; + } + priv->dev = &pdev->dev; + + ret = mt6359_accdet_parse_dt(priv); + if (ret) { + dev_err(&pdev->dev, "failed to parse dts "); + return ret; + } + mutex_init(&priv->res_lock); + + priv->accdet_irq = platform_get_irq(pdev, 0); + if (priv->accdet_irq) { + ret = devm_request_threaded_irq(&pdev->dev, priv->accdet_irq, + null, mt6359_accdet_irq, + irqf_trigger_high | irqf_oneshot, + "accdet_irq", priv); + if (ret) { + dev_err(&pdev->dev, + "failed to request irq: (%d) ", ret); + return ret; + } + } + + if (priv->caps & accdet_pmic_eint0) { + priv->accdet_eint0 = platform_get_irq(pdev, 1); + if (priv->accdet_eint0) { + ret = devm_request_threaded_irq(&pdev->dev, + priv->accdet_eint0, + null, mt6359_accdet_irq, + irqf_trigger_high | irqf_oneshot, + "accdet_eint0", priv); + if (ret) { + dev_err(&pdev->dev, + "failed to request eint0 irq (%d) ", + ret); + return ret; + } + } + } else if (priv->caps & accdet_pmic_eint1) { + priv->accdet_eint1 = platform_get_irq(pdev, 2); + if (priv->accdet_eint1) { + ret = devm_request_threaded_irq(&pdev->dev, + priv->accdet_eint1, + null, mt6359_accdet_irq, + irqf_trigger_high | irqf_oneshot, + "accdet_eint1", priv); + if (ret) { + dev_err(&pdev->dev, + "failed to request eint1 irq (%d) ", + ret); + return ret; + } + } + } + + priv->accdet_workqueue = create_singlethread_workqueue("accdet"); + init_work(&priv->accdet_work, mt6359_accdet_work); + if (!priv->accdet_workqueue) { + dev_err(&pdev->dev, "failed to create accdet workqueue "); + ret = -1; + goto err_accdet_wq; + } + + priv->jd_workqueue = create_singlethread_workqueue("mt6359_accdet_jd"); + init_work(&priv->jd_work, mt6359_accdet_jd_work); + if (!priv->jd_workqueue) { + dev_err(&pdev->dev, "failed to reate jack detect workqueue "); + ret = -1; + goto err_eint_wq; + } + + platform_set_drvdata(pdev, priv); + ret = devm_snd_soc_register_component(&pdev->dev, + &mt6359_accdet_soc_driver, + null, 0); + if (ret) { + dev_err(&pdev->dev, "failed to register component "); + return ret; + } + + priv->jd_sts = m_plug_out; + priv->jack_type = 0; + priv->btn_type = 0; + priv->accdet_status = 0x3; + mt6359_accdet_init(priv); + + mt6359_accdet_jack_report(priv); + + return 0; + +err_eint_wq: + destroy_workqueue(priv->accdet_workqueue); +err_accdet_wq: + dev_err(&pdev->dev, "%s error. now exit.! ", __func__); + return ret; +} + +static struct platform_driver mt6359_accdet_driver = { + .driver = { + .name = "pmic-codec-accdet", + }, + .probe = mt6359_accdet_probe, +}; + +static int __init mt6359_accdet_driver_init(void) +{ + int ret = 0; + + ret = platform_driver_register(&mt6359_accdet_driver); + if (ret) + return -enodev; + return 0; +} + +static void __exit mt6359_accdet_driver_exit(void) +{ + platform_driver_unregister(&mt6359_accdet_driver); +} +module_init(mt6359_accdet_driver_init); +module_exit(mt6359_accdet_driver_exit); + +/* module information */ +module_description("mt6359 alsa soc codec jack driver"); +module_author("argus lin <argus.lin@mediatek.com>"); +module_license("gpl v2"); diff --git a/sound/soc/codecs/mt6359-accdet.h b/sound/soc/codecs/mt6359-accdet.h --- /dev/null +++ b/sound/soc/codecs/mt6359-accdet.h +/* spdx-license-identifier: gpl-2.0 */ +/* + * copyright (c) 2021 mediatek inc. + * author: argus lin <argus.lin@mediatek.com> + */ + +#ifndef _accdet_h_ +#define _accdet_h_ + +#include <linux/ctype.h> +#include <linux/string.h> + +#define accdet_devname "accdet" + +#define headset_mode_1 (1) +#define headset_mode_2 (2) +#define headset_mode_6 (6) + +#define mt6359_accdet_num_buttons 4 +#define mt6359_accdet_jack_mask (snd_jack_headphone | \ + snd_jack_headset | \ + snd_jack_btn_0 | \ + snd_jack_btn_1 | \ + snd_jack_btn_2 | \ + snd_jack_btn_3) +#define mt6359_accdet_btn_mask (snd_jack_btn_0 | \ + snd_jack_btn_1 | \ + snd_jack_btn_2 | \ + snd_jack_btn_3) + +enum eint_moisture_status { + m_plug_in = 0, + m_water_in = 1, + m_hp_plug_in = 2, + m_plug_out = 3, + m_no_act = 4, + m_unknown = 5, +}; + +enum { + accdet_state000 = 0, + accdet_state001, + accdet_state010, + accdet_state011, + accdet_auxadc, + eint_state000, + eint_state001, + eint_state010, + eint_state011, + eint_inverter_state000, +}; + +struct three_key_threshold { + unsigned int mid; + unsigned int up; + unsigned int down; +}; + +struct four_key_threshold { + unsigned int mid; + unsigned int voice; + unsigned int up; + unsigned int down; +}; + +struct pwm_deb_settings { + unsigned int pwm_width; + unsigned int pwm_thresh; + unsigned int fall_delay; + unsigned int rise_delay; + unsigned int debounce0; + unsigned int debounce1; + unsigned int debounce3; + unsigned int debounce4; + unsigned int eint_pwm_width; + unsigned int eint_pwm_thresh; + unsigned int eint_debounce0; + unsigned int eint_debounce1; + unsigned int eint_debounce2; + unsigned int eint_debounce3; + unsigned int eint_inverter_debounce; + +}; + +struct dts_data { + unsigned int mic_vol; + unsigned int mic_mode; + unsigned int plugout_deb; + unsigned int eint_pol; + struct pwm_deb_settings *pwm_deb; + struct three_key_threshold three_key; + struct four_key_threshold four_key; + unsigned int moisture_detect_enable; + unsigned int eint_detect_mode; + unsigned int eint_use_ext_res; + unsigned int eint_comp_vth; + unsigned int moisture_detect_mode; + unsigned int moisture_comp_vth; + unsigned int moisture_comp_vref2; + unsigned int moisture_use_ext_res; +}; + +struct mt6359_accdet { + struct snd_soc_jack *jack; + struct device *dev; + struct regmap *regmap; + struct dts_data *data; + unsigned int caps; + int accdet_irq; + int accdet_eint0; + int accdet_eint1; + struct mutex res_lock; /* lock protection */ + bool jack_plugged; + unsigned int jack_type; + unsigned int btn_type; + unsigned int accdet_status; + unsigned int pre_accdet_status; + unsigned int cali_voltage; + unsigned int jd_sts; + struct work_struct accdet_work; + struct workqueue_struct *accdet_workqueue; + struct work_struct jd_work; + struct workqueue_struct *jd_workqueue; +}; + +int mt6359_accdet_enable_jack_detect(struct snd_soc_component *component, + struct snd_soc_jack *jack); +#endif diff --git a/sound/soc/codecs/mt6359.h b/sound/soc/codecs/mt6359.h --- a/sound/soc/codecs/mt6359.h +++ b/sound/soc/codecs/mt6359.h -#define pmic_accdet_irq_shift 0 -#define pmic_accdet_eint0_irq_shift 2 -#define pmic_accdet_eint1_irq_shift 3 -#define pmic_accdet_irq_clr_shift 8 -#define pmic_accdet_eint0_irq_clr_shift 10 -#define pmic_accdet_eint1_irq_clr_shift 11 -#define pmic_rg_int_status_accdet_shift 5 -#define pmic_rg_int_status_accdet_eint0_shift 6 -#define pmic_rg_int_status_accdet_eint1_shift 7 -#define pmic_rg_eint0configaccdet_shift 11 -#define pmic_rg_eint1configaccdet_shift 0 -#define pmic_accdet_eint0_inverter_sw_en_shift 6 -#define pmic_accdet_eint1_inverter_sw_en_shift 8 -#define pmic_rg_mtest_en_shift 8 -#define pmic_rg_mtest_sel_shift 9 -#define pmic_accdet_eint0_m_sw_en_shift 10 -#define pmic_accdet_eint1_m_sw_en_shift 11 -#define pmic_accdet_eint0_cen_stable_shift 5 -#define pmic_accdet_eint1_cen_stable_shift 10 -#define pmic_accdet_da_stable_shift 0 -#define pmic_accdet_eint0_en_stable_shift 1 -#define pmic_accdet_eint0_cmpen_stable_shift 2 -#define pmic_accdet_eint1_en_stable_shift 6 -#define pmic_accdet_eint1_cmpen_stable_shift 7 -#define pmic_accdet_eint_cturbo_sel_shift 7 -#define pmic_accdet_eint0_cturbo_sw_shift 7 -#define pmic_rg_eintcompvth_shift 4 -#define pmic_rg_eint0hirenb_shift 12 -#define pmic_rg_eint0nohys_shift 10 -#define pmic_accdet_sw_en_shift 0 -#define pmic_accdet_eint0_mem_in_shift 6 -#define pmic_accdet_mem_in_shift 6 -#define pmic_accdet_eint_debounce0_shift 0 -#define pmic_accdet_eint_debounce1_shift 4 -#define pmic_accdet_eint_debounce2_shift 8 -#define pmic_accdet_eint_debounce3_shift 12 -#define pmic_rg_accdet2auxswen_shift 14 -#define pmic_audaccdetauxadcswctrl_sel_shift 9 -#define pmic_audaccdetauxadcswctrl_sw_shift 10 -#define pmic_rg_eint0cturbo_shift 5 -#define pmic_rg_eint1cturbo_shift 13 -#define pmic_accdet_eint_m_plug_in_num_shift 12 -#define pmic_accdet_eint_m_detect_en_shift 12 -#define pmic_accdet_eint0_sw_en_shift 2 -#define pmic_accdet_eint1_sw_en_shift 4 -#define pmic_accdet_eint_cmpmout_sel_shift 12 -#define pmic_accdet_eint_cmpmen_sel_shift 6 -#define pmic_rg_hploutputstbenh_vaudp32_shift 0 -#define pmic_rg_hproutputstbenh_vaudp32_shift 4 -#define pmic_rg_eint0en_shift 2 -#define pmic_rg_eint1en_shift 10 -#define pmic_rg_ncp_pddis_en_shift 0 -#define pmic_rg_accdetspare_shift 0 -#define pmic_rg_accdet_rst_shift 1 -#define pmic_rg_audmicbias1hven_shift 12 -#define pmic_rg_audmicbias1vref_shift 4 -#define pmic_rg_analogfden_shift 12 -#define pmic_rg_audmicbias1dcsw1pen_shift 8 -#define pmic_rg_audmicbias1lowpen_shift 2 -#define pmic_accdet_seq_init_shift 1 -#define pmic_rg_eintcompvth_mask 0xf -#define pmic_accdet_eint0_mem_in_mask 0x3 -#define pmic_accdet_eint_debounce0_mask 0xf -#define pmic_accdet_eint_debounce1_mask 0xf -#define pmic_accdet_eint_debounce2_mask 0xf -#define pmic_accdet_eint_debounce3_mask 0xf -#define pmic_accdet_eint0_irq_shift 2 -#define pmic_accdet_eint1_irq_shift 3 - -/* audenc_ana_con16: */ -#define rg_aud_micbias1_lowp_en bit(pmic_rg_audmicbias1lowpen_shift) - +#define mt6359_top0_id 0x0 +#define mt6359_smt_con1 0x32 +#define mt6359_drv_con2 0x3c +#define mt6359_drv_con3 0x3e +#define mt6359_drv_con4 0x40 +#define mt6359_top_ckpdn_con0 0x10c +#define mt6359_top_ckpdn_con0_set 0x10e +#define mt6359_top_ckpdn_con0_clr 0x110 +#define mt6359_auxadc_rqst0 0x1108 +#define mt6359_auxadc_con10 0x11a0 +#define mt6359_auxadc_accdet 0x11ba +#define mt6359_ldo_vusb_op_en 0x1d0c +#define mt6359_ldo_vusb_op_en_set 0x1d0e +#define mt6359_ldo_vusb_op_en_clr 0x1d10 +#define mt6359_aud_top_ckpdn_con0 0x230c +#define mt6359_aud_top_ckpdn_con0_set 0x230e +#define mt6359_aud_top_ckpdn_con0_clr 0x2310 +#define mt6359_aud_top_rst_con0 0x2320 +#define mt6359_aud_top_rst_con0_set 0x2322 +#define mt6359_aud_top_rst_con0_clr 0x2324 +#define mt6359_aud_top_int_con0 0x2328 +#define mt6359_aud_top_int_con0_set 0x232a +#define mt6359_aud_top_int_con0_clr 0x232c +#define mt6359_aud_top_int_mask_con0 0x232e +#define mt6359_aud_top_int_mask_con0_set 0x2330 +#define mt6359_aud_top_int_mask_con0_clr 0x2332 +#define mt6359_aud_top_int_status0 0x2334 +#define mt6359_afe_ncp_cfg2 0x24e2 +#define mt6359_audenc_dsn_id 0x2500 +#define mt6359_audenc_dsn_rev0 0x2502 +#define mt6359_audenc_dsn_dbi 0x2504 +#define mt6359_audenc_dsn_fpi 0x2506 +#define mt6359_audenc_ana_con0 0x2508 +#define mt6359_audenc_ana_con1 0x250a +#define mt6359_audenc_ana_con2 0x250c +#define mt6359_audenc_ana_con3 0x250e +#define mt6359_audenc_ana_con4 0x2510 +#define mt6359_audenc_ana_con5 0x2512 +#define mt6359_audenc_ana_con6 0x2514 +#define mt6359_audenc_ana_con7 0x2516 +#define mt6359_audenc_ana_con8 0x2518 +#define mt6359_audenc_ana_con9 0x251a +#define mt6359_audenc_ana_con10 0x251c +#define mt6359_audenc_ana_con11 0x251e +#define mt6359_audenc_ana_con12 0x2520 +#define mt6359_audenc_ana_con13 0x2522 +#define mt6359_audenc_ana_con14 0x2524 +#define mt6359_audenc_ana_con15 0x2526 +#define mt6359_audenc_ana_con16 0x2528 +#define mt6359_audenc_ana_con17 0x252a +#define mt6359_audenc_ana_con18 0x252c +#define mt6359_audenc_ana_con19 0x252e +#define mt6359_audenc_ana_con20 0x2530 +#define mt6359_audenc_ana_con21 0x2532 +#define mt6359_audenc_ana_con22 0x2534 +#define mt6359_audenc_ana_con23 0x2536 +#define mt6359_auddec_dsn_id 0x2580 +#define mt6359_auddec_dsn_rev0 0x2582 +#define mt6359_auddec_dsn_dbi 0x2584 +#define mt6359_auddec_dsn_fpi 0x2586 +#define mt6359_auddec_ana_con0 0x2588 +#define mt6359_auddec_ana_con1 0x258a +#define mt6359_auddec_ana_con2 0x258c +#define mt6359_auddec_ana_con3 0x258e +#define mt6359_auddec_ana_con4 0x2590 +#define mt6359_auddec_ana_con5 0x2592 +#define mt6359_auddec_ana_con6 0x2594 +#define mt6359_auddec_ana_con7 0x2596 +#define mt6359_auddec_ana_con8 0x2598 +#define mt6359_auddec_ana_con9 0x259a +#define mt6359_auddec_ana_con10 0x259c +#define mt6359_auddec_ana_con11 0x259e +#define mt6359_auddec_ana_con12 0x25a0 +#define mt6359_auddec_ana_con13 0x25a2 +#define mt6359_auddec_ana_con14 0x25a4 +#define mt6359_accdet_dsn_dig_id 0x2680 +#define mt6359_accdet_dsn_dig_rev0 0x2682 +#define mt6359_accdet_dsn_dbi 0x2684 +#define mt6359_accdet_dsn_fpi 0x2686 +#define mt6359_accdet_con0 0x2688 +#define mt6359_accdet_con1 0x268a +#define mt6359_accdet_con2 0x268c +#define mt6359_accdet_con3 0x268e +#define mt6359_accdet_con4 0x2690 +#define mt6359_accdet_con5 0x2692 +#define mt6359_accdet_con6 0x2694 +#define mt6359_accdet_con7 0x2696 +#define mt6359_accdet_con8 0x2698 +#define mt6359_accdet_con9 0x269a +#define mt6359_accdet_con10 0x269c +#define mt6359_accdet_con11 0x269e +#define mt6359_accdet_con12 0x26a0 +#define mt6359_accdet_con13 0x26a2 +#define mt6359_accdet_con14 0x26a4 +#define mt6359_accdet_con15 0x26a6 +#define mt6359_accdet_con16 0x26a8 +#define mt6359_accdet_con17 0x26aa +#define mt6359_accdet_con18 0x26ac +#define mt6359_accdet_con19 0x26ae +#define mt6359_accdet_con20 0x26b0 +#define mt6359_accdet_con21 0x26b2 +#define mt6359_accdet_con22 0x26b4 +#define mt6359_accdet_con23 0x26b6 +#define mt6359_accdet_con24 0x26b8 +#define mt6359_accdet_con25 0x26ba +#define mt6359_accdet_con26 0x26bc +#define mt6359_accdet_con27 0x26be +#define mt6359_accdet_con28 0x26c0 +#define mt6359_accdet_con29 0x26c2 +#define mt6359_accdet_con30 0x26c4 +#define mt6359_accdet_con31 0x26c6 +#define mt6359_accdet_con32 0x26c8 +#define mt6359_accdet_con33 0x26ca +#define mt6359_accdet_con34 0x26cc +#define mt6359_accdet_con35 0x26ce +#define mt6359_accdet_con36 0x26d0 +#define mt6359_accdet_con37 0x26d2 +#define mt6359_accdet_con38 0x26d4 +#define mt6359_accdet_con39 0x26d6 +#define mt6359_accdet_con40 0x26d8 + +#define top0_ana_id_addr \ + mt6359_top0_id +#define top0_ana_id_sft 0 +#define top0_ana_id_mask 0xff +#define top0_ana_id_mask_sft (0xff << 0) +#define auxadc_rqst_ch0_addr \ + mt6359_auxadc_rqst0 +#define auxadc_rqst_ch0_sft 0 +#define auxadc_rqst_ch0_mask 0x1 +#define auxadc_rqst_ch0_mask_sft (0x1 << 0) +#define auxadc_accdet_anaswctrl_en_addr \ + mt6359_auxadc_con15 +#define auxadc_accdet_anaswctrl_en_sft 6 +#define auxadc_accdet_anaswctrl_en_mask 0x1 +#define auxadc_accdet_anaswctrl_en_mask_sft (0x1 << 6) + +#define auxadc_accdet_auto_spl_addr \ + mt6359_auxadc_accdet +#define auxadc_accdet_auto_spl_sft 0 +#define auxadc_accdet_auto_spl_mask 0x1 +#define auxadc_accdet_auto_spl_mask_sft (0x1 << 0) +#define auxadc_accdet_auto_rqst_clr_addr \ + mt6359_auxadc_accdet +#define auxadc_accdet_auto_rqst_clr_sft 1 +#define auxadc_accdet_auto_rqst_clr_mask 0x1 +#define auxadc_accdet_auto_rqst_clr_mask_sft (0x1 << 1) +#define auxadc_accdet_dig1_rsv0_addr \ + mt6359_auxadc_accdet +#define auxadc_accdet_dig1_rsv0_sft 2 +#define auxadc_accdet_dig1_rsv0_mask 0x3f +#define auxadc_accdet_dig1_rsv0_mask_sft (0x3f << 2) +#define auxadc_accdet_dig0_rsv0_addr \ + mt6359_auxadc_accdet +#define auxadc_accdet_dig0_rsv0_sft 8 +#define auxadc_accdet_dig0_rsv0_mask 0xff +#define auxadc_accdet_dig0_rsv0_mask_sft (0xff << 8) + +#define rg_accdet_ck_pdn_addr \ + mt6359_aud_top_ckpdn_con0 +#define rg_accdet_ck_pdn_sft 0 +#define rg_accdet_ck_pdn_mask 0x1 +#define rg_accdet_ck_pdn_mask_sft (0x1 << 0) + +#define rg_accdet_rst_addr \ + mt6359_aud_top_rst_con0 +#define rg_accdet_rst_sft 1 +#define rg_accdet_rst_mask 0x1 +#define rg_accdet_rst_mask_sft (0x1 << 1) +#define bank_accdet_swrst_addr \ + mt6359_aud_top_rst_bank_con0 +#define bank_accdet_swrst_sft 0 +#define bank_accdet_swrst_mask 0x1 +#define bank_accdet_swrst_mask_sft (0x1 << 0) + +#define rg_int_en_accdet_addr \ + mt6359_aud_top_int_con0 +#define rg_int_en_accdet_sft 5 +#define rg_int_en_accdet_mask 0x1 +#define rg_int_en_accdet_mask_sft (0x1 << 5) +#define rg_int_en_accdet_eint0_addr \ + mt6359_aud_top_int_con0 +#define rg_int_en_accdet_eint0_sft 6 +#define rg_int_en_accdet_eint0_mask 0x1 +#define rg_int_en_accdet_eint0_mask_sft (0x1 << 6) +#define rg_int_en_accdet_eint1_addr \ + mt6359_aud_top_int_con0 +#define rg_int_en_accdet_eint1_sft 7 +#define rg_int_en_accdet_eint1_mask 0x1 +#define rg_int_en_accdet_eint1_mask_sft (0x1 << 7) + +#define rg_int_mask_accdet_addr \ + mt6359_aud_top_int_mask_con0 +#define rg_int_mask_accdet_sft 5 +#define rg_int_mask_accdet_mask 0x1 +#define rg_int_mask_accdet_mask_sft (0x1 << 5) +#define rg_int_mask_accdet_eint0_addr \ + mt6359_aud_top_int_mask_con0 +#define rg_int_mask_accdet_eint0_sft 6 +#define rg_int_mask_accdet_eint0_mask 0x1 +#define rg_int_mask_accdet_eint0_mask_sft (0x1 << 6) +#define rg_int_mask_accdet_eint1_addr \ + mt6359_aud_top_int_mask_con0 +#define rg_int_mask_accdet_eint1_sft 7 +#define rg_int_mask_accdet_eint1_mask 0x1 +#define rg_int_mask_accdet_eint1_mask_sft (0x1 << 7) + +#define rg_int_status_accdet_addr \ + mt6359_aud_top_int_status0 +#define rg_int_status_accdet_sft 5 +#define rg_int_status_accdet_mask 0x1 +#define rg_int_status_accdet_mask_sft (0x1 << 5) +#define rg_int_status_accdet_eint0_addr \ + mt6359_aud_top_int_status0 +#define rg_int_status_accdet_eint0_sft 6 +#define rg_int_status_accdet_eint0_mask 0x1 +#define rg_int_status_accdet_eint0_mask_sft (0x1 << 6) +#define rg_int_status_accdet_eint1_addr \ + mt6359_aud_top_int_status0 +#define rg_int_status_accdet_eint1_sft 7 +#define rg_int_status_accdet_eint1_mask 0x1 +#define rg_int_status_accdet_eint1_mask_sft (0x1 << 7) + +#define rg_int_raw_status_accdet_addr \ + mt6359_aud_top_int_raw_status0 +#define rg_int_raw_status_accdet_sft 5 +#define rg_int_raw_status_accdet_mask 0x1 +#define rg_int_raw_status_accdet_mask_sft (0x1 << 5) +#define rg_int_raw_status_accdet_eint0_addr \ + mt6359_aud_top_int_raw_status0 +#define rg_int_raw_status_accdet_eint0_sft 6 +#define rg_int_raw_status_accdet_eint0_mask 0x1 +#define rg_int_raw_status_accdet_eint0_mask_sft (0x1 << 6) +#define rg_int_raw_status_accdet_eint1_addr \ + mt6359_aud_top_int_raw_status0 +#define rg_int_raw_status_accdet_eint1_sft 7 +#define rg_int_raw_status_accdet_eint1_mask 0x1 +#define rg_int_raw_status_accdet_eint1_mask_sft (0x1 << 7) + +#define rg_audaccdetmicbias0pulllow_addr \ + mt6359_audenc_ana_con18 +#define rg_audaccdetmicbias0pulllow_sft 0 +#define rg_audaccdetmicbias0pulllow_mask 0x1 +#define rg_audaccdetmicbias0pulllow_mask_sft (0x1 << 0) +#define rg_audaccdetmicbias1pulllow_addr \ + mt6359_audenc_ana_con18 +#define rg_audaccdetmicbias1pulllow_sft 1 +#define rg_audaccdetmicbias1pulllow_mask 0x1 +#define rg_audaccdetmicbias1pulllow_mask_sft (0x1 << 1) +#define rg_audaccdetmicbias2pulllow_addr \ + mt6359_audenc_ana_con18 +#define rg_audaccdetmicbias2pulllow_sft 2 +#define rg_audaccdetmicbias2pulllow_mask 0x1 +#define rg_audaccdetmicbias2pulllow_mask_sft (0x1 << 2) +#define rg_audaccdetvin1pulllow_addr \ + mt6359_audenc_ana_con18 +#define rg_audaccdetvin1pulllow_sft 3 +#define rg_audaccdetvin1pulllow_mask 0x1 +#define rg_audaccdetvin1pulllow_mask_sft (0x1 << 3) +#define rg_audaccdetvthacal_addr \ + mt6359_audenc_ana_con18 +#define rg_audaccdetvthacal_sft 4 +#define rg_audaccdetvthacal_mask 0x1 +#define rg_audaccdetvthacal_mask_sft (0x1 << 4) +#define rg_audaccdetvthbcal_addr \ + mt6359_audenc_ana_con18 +#define rg_audaccdetvthbcal_sft 5 +#define rg_audaccdetvthbcal_mask 0x1 +#define rg_audaccdetvthbcal_mask_sft (0x1 << 5) +#define rg_audaccdettvdet_addr \ + mt6359_audenc_ana_con18 +#define rg_audaccdettvdet_sft 6 +#define rg_audaccdettvdet_mask 0x1 +#define rg_audaccdettvdet_mask_sft (0x1 << 6) +#define rg_accdetsel_addr \ + mt6359_audenc_ana_con18 +#define rg_accdetsel_sft 7 +#define rg_accdetsel_mask 0x1 +#define rg_accdetsel_mask_sft (0x1 << 7) + +#define rg_audpwdbmicbias1_addr \ + mt6359_audenc_ana_con16 +#define rg_audpwdbmicbias1_sft 0 +#define rg_audpwdbmicbias1_mask 0x1 +#define rg_audpwdbmicbias1_mask_sft (0x1 << 0) +#define rg_audmicbias1bypassen_addr \ + mt6359_audenc_ana_con16 +#define rg_audmicbias1bypassen_sft 1 +#define rg_audmicbias1bypassen_mask 0x1 +#define rg_audmicbias1bypassen_mask_sft (0x1 << 1) +#define rg_audmicbias1lowpen_addr \ + mt6359_audenc_ana_con16 +#define rg_audmicbias1lowpen_sft 2 +#define rg_audmicbias1lowpen_mask 0x1 +#define rg_audmicbias1lowpen_mask_sft (0x1 << 2) +#define rg_audmicbias1vref_addr \ + mt6359_audenc_ana_con16 +#define rg_audmicbias1vref_sft 4 +#define rg_audmicbias1vref_mask 0x7 +#define rg_audmicbias1vref_mask_sft (0x7 << 4) +#define rg_audmicbias1dcsw1pen_addr \ + mt6359_audenc_ana_con16 +#define rg_audmicbias1dcsw1pen_sft 8 +#define rg_audmicbias1dcsw1pen_mask 0x1 +#define rg_audmicbias1dcsw1pen_mask_sft (0x1 << 8) +#define rg_audmicbias1dcsw1nen_addr \ + mt6359_audenc_ana_con16 +#define rg_audmicbias1dcsw1nen_sft 9 +#define rg_audmicbias1dcsw1nen_mask 0x1 +#define rg_audmicbias1dcsw1nen_mask_sft (0x1 << 9) +#define rg_bandgapgen_addr \ + mt6359_audenc_ana_con16 +#define rg_bandgapgen_sft 10 +#define rg_bandgapgen_mask 0x1 +#define rg_bandgapgen_mask_sft (0x1 << 10) +#define rg_audmicbias1hven_addr \ + mt6359_audenc_ana_con16 +#define rg_audmicbias1hven_sft 12 +#define rg_audmicbias1hven_mask 0x1 +#define rg_audmicbias1hven_mask_sft (0x1 << 12) +#define rg_audmicbias1hvvref_addr \ + mt6359_audenc_ana_con16 +#define rg_audmicbias1hvvref_sft 13 +#define rg_audmicbias1hvvref_mask 0x1 +#define rg_audmicbias1hvvref_mask_sft (0x1 << 13) + +#define rg_eint0nohys_addr \ + mt6359_audenc_ana_con18 +#define rg_eint0nohys_sft 10 +#define rg_eint0nohys_mask 0x1 +#define rg_eint0nohys_mask_sft (0x1 << 10) +#define rg_eint0configaccdet_addr \ + mt6359_audenc_ana_con18 +#define rg_eint0configaccdet_sft 11 +#define rg_eint0configaccdet_mask 0x1 +#define rg_eint0configaccdet_mask_sft (0x1 << 11) +#define rg_eint0hirenb_addr \ + mt6359_audenc_ana_con18 +#define rg_eint0hirenb_sft 12 +#define rg_eint0hirenb_mask 0x1 +#define rg_eint0hirenb_mask_sft (0x1 << 12) +#define rg_accdet2auxresbypass_addr \ + mt6359_audenc_ana_con18 +#define rg_accdet2auxresbypass_sft 13 +#define rg_accdet2auxresbypass_mask 0x1 +#define rg_accdet2auxresbypass_mask_sft (0x1 << 13) +#define rg_accdet2auxswen_addr \ + mt6359_audenc_ana_con18 +#define rg_accdet2auxswen_sft 14 +#define rg_accdet2auxswen_mask 0x1 +#define rg_accdet2auxswen_mask_sft (0x1 << 14) +#define rg_audaccdetmicbias3pulllow_addr \ + mt6359_audenc_ana_con18 +#define rg_audaccdetmicbias3pulllow_sft 15 +#define rg_audaccdetmicbias3pulllow_mask 0x1 +#define rg_audaccdetmicbias3pulllow_mask_sft (0x1 << 15) +#define rg_eint1configaccdet_addr \ + mt6359_audenc_ana_con19 +#define rg_eint1configaccdet_sft 0 +#define rg_eint1configaccdet_mask 0x1 +#define rg_eint1configaccdet_mask_sft (0x1 << 0) +#define rg_eint1hirenb_addr \ + mt6359_audenc_ana_con19 +#define rg_eint1hirenb_sft 1 +#define rg_eint1hirenb_mask 0x1 +#define rg_eint1hirenb_mask_sft (0x1 << 1) +#define rg_eint1nohys_addr \ + mt6359_audenc_ana_con19 +#define rg_eint1nohys_sft 2 +#define rg_eint1nohys_mask 0x1 +#define rg_eint1nohys_mask_sft (0x1 << 2) +#define rg_eintcompvth_addr \ + mt6359_audenc_ana_con19 +#define rg_mtest_en_addr \ + mt6359_audenc_ana_con19 +#define rg_mtest_en_sft 8 +#define rg_mtest_en_mask 0x1 +#define rg_mtest_en_mask_sft (0x1 << 8) +#define rg_mtest_sel_addr \ + mt6359_audenc_ana_con19 +#define rg_mtest_sel_sft 9 +#define rg_mtest_sel_mask 0x1 +#define rg_mtest_sel_mask_sft (0x1 << 9) +#define rg_mtest_current_addr \ + mt6359_audenc_ana_con19 +#define rg_mtest_current_sft 10 +#define rg_mtest_current_mask 0x1 +#define rg_mtest_current_mask_sft (0x1 << 10) +#define rg_analogfden_addr \ + mt6359_audenc_ana_con19 +#define rg_analogfden_sft 12 +#define rg_analogfden_mask 0x1 +#define rg_analogfden_mask_sft (0x1 << 12) +#define rg_fdvin1ppulllow_addr \ + mt6359_audenc_ana_con19 +#define rg_fdvin1ppulllow_sft 13 +#define rg_fdvin1ppulllow_mask 0x1 +#define rg_fdvin1ppulllow_mask_sft (0x1 << 13) +#define rg_fdeint0type_addr \ + mt6359_audenc_ana_con19 +#define rg_fdeint0type_sft 14 +#define rg_fdeint0type_mask 0x1 +#define rg_fdeint0type_mask_sft (0x1 << 14) +#define rg_fdeint1type_addr \ + mt6359_audenc_ana_con19 +#define rg_fdeint1type_sft 15 +#define rg_fdeint1type_mask 0x1 +#define rg_fdeint1type_mask_sft (0x1 << 15) +#define rg_eint0cmpen_addr \ + mt6359_audenc_ana_con20 +#define rg_eint0cmpen_sft 0 +#define rg_eint0cmpen_mask 0x1 +#define rg_eint0cmpen_mask_sft (0x1 << 0) +#define rg_eint0cmpmen_addr \ + mt6359_audenc_ana_con20 +#define rg_eint0cmpmen_sft 1 +#define rg_eint0cmpmen_mask 0x1 +#define rg_eint0cmpmen_mask_sft (0x1 << 1) +#define rg_eint0en_addr \ + mt6359_audenc_ana_con20 +#define rg_eint0en_sft 2 +#define rg_eint0en_mask 0x1 +#define rg_eint0en_mask_sft (0x1 << 2) +#define rg_eint0cen_addr \ + mt6359_audenc_ana_con20 +#define rg_eint0cen_sft 3 +#define rg_eint0cen_mask 0x1 +#define rg_eint0cen_mask_sft (0x1 << 3) +#define rg_eint0inven_addr \ + mt6359_audenc_ana_con20 +#define rg_eint0inven_sft 4 +#define rg_eint0inven_mask 0x1 +#define rg_eint0inven_mask_sft (0x1 << 4) +#define rg_eint0cturbo_addr \ + mt6359_audenc_ana_con20 +#define rg_eint0cturbo_sft 5 +#define rg_eint0cturbo_mask 0x7 +#define rg_eint0cturbo_mask_sft (0x7 << 5) +#define rg_eint1cmpen_addr \ + mt6359_audenc_ana_con20 +#define rg_eint1cmpen_sft 8 +#define rg_eint1cmpen_mask 0x1 +#define rg_eint1cmpen_mask_sft (0x1 << 8) +#define rg_eint1cmpmen_addr \ + mt6359_audenc_ana_con20 +#define rg_eint1cmpmen_sft 9 +#define rg_eint1cmpmen_mask 0x1 +#define rg_eint1cmpmen_mask_sft (0x1 << 9) +#define rg_eint1en_addr \ + mt6359_audenc_ana_con20 +#define rg_eint1en_sft 10 +#define rg_eint1en_mask 0x1 +#define rg_eint1en_mask_sft (0x1 << 10) +#define rg_eint1cen_addr \ + mt6359_audenc_ana_con20 +#define rg_eint1cen_sft 11 +#define rg_eint1cen_mask 0x1 +#define rg_eint1cen_mask_sft (0x1 << 11) +#define rg_eint1inven_addr \ + mt6359_audenc_ana_con20 +#define rg_eint1inven_sft 12 +#define rg_eint1inven_mask 0x1 +#define rg_eint1inven_mask_sft (0x1 << 12) +#define rg_eint1cturbo_addr \ + mt6359_audenc_ana_con20 +#define rg_eint1cturbo_sft 13 +#define rg_eint1cturbo_mask 0x7 +#define rg_eint1cturbo_mask_sft (0x7 << 13) +#define rg_accdetspare_addr \ + mt6359_audenc_ana_con21 + +#define accdet_ana_id_addr \ + mt6359_accdet_dsn_dig_id +#define accdet_ana_id_sft 0 +#define accdet_ana_id_mask 0xff +#define accdet_ana_id_mask_sft (0xff << 0) +#define accdet_dig_id_addr \ + mt6359_accdet_dsn_dig_id +#define accdet_dig_id_sft 8 +#define accdet_dig_id_mask 0xff +#define accdet_dig_id_mask_sft (0xff << 8) +#define accdet_ana_minor_rev_addr \ + mt6359_accdet_dsn_dig_rev0 +#define accdet_ana_minor_rev_sft 0 +#define accdet_ana_minor_rev_mask 0xf +#define accdet_ana_minor_rev_mask_sft (0xf << 0) +#define accdet_ana_major_rev_addr \ + mt6359_accdet_dsn_dig_rev0 +#define accdet_ana_major_rev_sft 4 +#define accdet_ana_major_rev_mask 0xf +#define accdet_ana_major_rev_mask_sft (0xf << 4) +#define accdet_dig_minor_rev_addr \ + mt6359_accdet_dsn_dig_rev0 +#define accdet_dig_minor_rev_sft 8 +#define accdet_dig_minor_rev_mask 0xf +#define accdet_dig_minor_rev_mask_sft (0xf << 8) +#define accdet_dig_major_rev_addr \ + mt6359_accdet_dsn_dig_rev0 +#define accdet_dig_major_rev_sft 12 +#define accdet_dig_major_rev_mask 0xf +#define accdet_dig_major_rev_mask_sft (0xf << 12) +#define accdet_dsn_cbs_addr \ + mt6359_accdet_dsn_dbi +#define accdet_dsn_cbs_sft 0 +#define accdet_dsn_cbs_mask 0x3 +#define accdet_dsn_cbs_mask_sft (0x3 << 0) +#define accdet_dsn_bix_addr \ + mt6359_accdet_dsn_dbi +#define accdet_dsn_bix_sft 2 +#define accdet_dsn_bix_mask 0x3 +#define accdet_dsn_bix_mask_sft (0x3 << 2) +#define accdet_esp_addr \ + mt6359_accdet_dsn_dbi +#define accdet_esp_sft 8 +#define accdet_esp_mask 0xff +#define accdet_esp_mask_sft (0xff << 8) +#define accdet_dsn_fpi_addr \ + mt6359_accdet_dsn_fpi +#define accdet_dsn_fpi_sft 0 +#define accdet_dsn_fpi_mask 0xff +#define accdet_dsn_fpi_mask_sft (0xff << 0) +#define accdet_auxadc_sel_addr \ + mt6359_accdet_con0 +#define accdet_auxadc_sel_sft 0 +#define accdet_auxadc_sel_mask 0x1 +#define accdet_auxadc_sel_mask_sft (0x1 << 0) +#define accdet_auxadc_sw_addr \ + mt6359_accdet_con0 +#define accdet_auxadc_sw_sft 1 +#define accdet_auxadc_sw_mask 0x1 +#define accdet_auxadc_sw_mask_sft (0x1 << 1) +#define accdet_test_auxadc_addr \ + mt6359_accdet_con0 +#define accdet_test_auxadc_sft 2 +#define accdet_test_auxadc_mask 0x1 +#define accdet_test_auxadc_mask_sft (0x1 << 2) +#define accdet_auxadc_anaswctrl_sel_addr \ + mt6359_accdet_con0 +#define accdet_auxadc_anaswctrl_sel_sft 8 +#define accdet_auxadc_anaswctrl_sel_mask 0x1 +#define accdet_auxadc_anaswctrl_sel_mask_sft (0x1 << 8) +#define audaccdetauxadcswctrl_sel_addr \ + mt6359_accdet_con0 +#define audaccdetauxadcswctrl_sel_sft 9 +#define audaccdetauxadcswctrl_sel_mask 0x1 +#define audaccdetauxadcswctrl_sel_mask_sft (0x1 << 9) +#define audaccdetauxadcswctrl_sw_addr \ + mt6359_accdet_con0 +#define audaccdetauxadcswctrl_sw_sft 10 +#define audaccdetauxadcswctrl_sw_mask 0x1 +#define audaccdetauxadcswctrl_sw_mask_sft (0x1 << 10) +#define accdet_test_ana_addr \ + mt6359_accdet_con0 +#define accdet_test_ana_sft 11 +#define accdet_test_ana_mask 0x1 +#define accdet_test_ana_mask_sft (0x1 << 11) +#define rg_audaccdetrsv_addr \ + mt6359_accdet_con0 +#define rg_audaccdetrsv_sft 13 +#define rg_audaccdetrsv_mask 0x3 +#define rg_audaccdetrsv_mask_sft (0x3 << 13) +#define accdet_sw_en_addr \ + mt6359_accdet_con1 +#define accdet_sw_en_sft 0 +#define accdet_sw_en_mask 0x1 +#define accdet_sw_en_mask_sft (0x1 << 0) +#define accdet_seq_init_addr \ + mt6359_accdet_con1 +#define accdet_seq_init_sft 1 +#define accdet_seq_init_mask 0x1 +#define accdet_seq_init_mask_sft (0x1 << 1) +#define accdet_eint0_sw_en_addr \ + mt6359_accdet_con1 +#define accdet_eint0_sw_en_sft 2 +#define accdet_eint0_sw_en_mask 0x1 +#define accdet_eint0_sw_en_mask_sft (0x1 << 2) +#define accdet_eint0_seq_init_addr \ + mt6359_accdet_con1 +#define accdet_eint0_seq_init_sft 3 +#define accdet_eint0_seq_init_mask 0x1 +#define accdet_eint0_seq_init_mask_sft (0x1 << 3) +#define accdet_eint1_sw_en_addr \ + mt6359_accdet_con1 +#define accdet_eint1_sw_en_sft 4 +#define accdet_eint1_sw_en_mask 0x1 +#define accdet_eint1_sw_en_mask_sft (0x1 << 4) +#define accdet_eint1_seq_init_addr \ + mt6359_accdet_con1 +#define accdet_eint1_seq_init_sft 5 +#define accdet_eint1_seq_init_mask 0x1 +#define accdet_eint1_seq_init_mask_sft (0x1 << 5) +#define accdet_eint0_inverter_sw_en_addr \ + mt6359_accdet_con1 +#define accdet_eint0_inverter_sw_en_sft 6 +#define accdet_eint0_inverter_sw_en_mask 0x1 +#define accdet_eint0_inverter_sw_en_mask_sft (0x1 << 6) +#define accdet_eint0_inverter_seq_init_addr \ + mt6359_accdet_con1 +#define accdet_eint0_inverter_seq_init_sft 7 +#define accdet_eint0_inverter_seq_init_mask 0x1 +#define accdet_eint0_inverter_seq_init_mask_sft (0x1 << 7) +#define accdet_eint1_inverter_sw_en_addr \ + mt6359_accdet_con1 +#define accdet_eint1_inverter_sw_en_sft 8 +#define accdet_eint1_inverter_sw_en_mask 0x1 +#define accdet_eint1_inverter_sw_en_mask_sft (0x1 << 8) +#define accdet_eint1_inverter_seq_init_addr \ + mt6359_accdet_con1 +#define accdet_eint1_inverter_seq_init_sft 9 +#define accdet_eint1_inverter_seq_init_mask 0x1 +#define accdet_eint1_inverter_seq_init_mask_sft (0x1 << 9) +#define accdet_eint0_m_sw_en_addr \ + mt6359_accdet_con1 +#define accdet_eint0_m_sw_en_sft 10 +#define accdet_eint0_m_sw_en_mask 0x1 +#define accdet_eint0_m_sw_en_mask_sft (0x1 << 10) +#define accdet_eint1_m_sw_en_addr \ + mt6359_accdet_con1 +#define accdet_eint1_m_sw_en_sft 11 +#define accdet_eint1_m_sw_en_mask 0x1 +#define accdet_eint1_m_sw_en_mask_sft (0x1 << 11) +#define accdet_eint_m_detect_en_addr \ + mt6359_accdet_con1 +#define accdet_eint_m_detect_en_sft 12 +#define accdet_eint_m_detect_en_mask 0x1 +#define accdet_eint_m_detect_en_mask_sft (0x1 << 12) +#define accdet_cmp_pwm_en_addr \ + mt6359_accdet_con2 +#define accdet_cmp_pwm_en_sft 0 +#define accdet_cmp_pwm_en_mask 0x1 +#define accdet_cmp_pwm_en_mask_sft (0x1 << 0) +#define accdet_vth_pwm_en_addr \ + mt6359_accdet_con2 +#define accdet_vth_pwm_en_sft 1 +#define accdet_vth_pwm_en_mask 0x1 +#define accdet_vth_pwm_en_mask_sft (0x1 << 1) +#define accdet_mbias_pwm_en_addr \ + mt6359_accdet_con2 +#define accdet_mbias_pwm_en_sft 2 +#define accdet_mbias_pwm_en_mask 0x1 +#define accdet_mbias_pwm_en_mask_sft (0x1 << 2) +#define accdet_eint_en_pwm_en_addr \ + mt6359_accdet_con2 +#define accdet_eint_en_pwm_en_sft 3 +#define accdet_eint_en_pwm_en_mask 0x1 +#define accdet_eint_en_pwm_en_mask_sft (0x1 << 3) +#define accdet_eint_cmpen_pwm_en_addr \ + mt6359_accdet_con2 +#define accdet_eint_cmpen_pwm_en_sft 4 +#define accdet_eint_cmpen_pwm_en_mask 0x1 +#define accdet_eint_cmpen_pwm_en_mask_sft (0x1 << 4) +#define accdet_eint_cmpmen_pwm_en_addr \ + mt6359_accdet_con2 +#define accdet_eint_cmpmen_pwm_en_sft 5 +#define accdet_eint_cmpmen_pwm_en_mask 0x1 +#define accdet_eint_cmpmen_pwm_en_mask_sft (0x1 << 5) +#define accdet_eint_cturbo_pwm_en_addr \ + mt6359_accdet_con2 +#define accdet_eint_cturbo_pwm_en_sft 6 +#define accdet_eint_cturbo_pwm_en_mask 0x1 +#define accdet_eint_cturbo_pwm_en_mask_sft (0x1 << 6) +#define accdet_cmp_pwm_idle_addr \ + mt6359_accdet_con2 +#define accdet_cmp_pwm_idle_sft 8 +#define accdet_cmp_pwm_idle_mask 0x1 +#define accdet_cmp_pwm_idle_mask_sft (0x1 << 8) +#define accdet_vth_pwm_idle_addr \ + mt6359_accdet_con2 +#define accdet_vth_pwm_idle_sft 9 +#define accdet_vth_pwm_idle_mask 0x1 +#define accdet_vth_pwm_idle_mask_sft (0x1 << 9) +#define accdet_mbias_pwm_idle_addr \ + mt6359_accdet_con2 +#define accdet_mbias_pwm_idle_sft 10 +#define accdet_mbias_pwm_idle_mask 0x1 +#define accdet_mbias_pwm_idle_mask_sft (0x1 << 10) +#define accdet_eint0_cmpen_pwm_idle_addr \ + mt6359_accdet_con2 +#define accdet_eint0_cmpen_pwm_idle_sft 11 +#define accdet_eint0_cmpen_pwm_idle_mask 0x1 +#define accdet_eint0_cmpen_pwm_idle_mask_sft (0x1 << 11) +#define accdet_eint1_cmpen_pwm_idle_addr \ + mt6359_accdet_con2 +#define accdet_eint1_cmpen_pwm_idle_sft 12 +#define accdet_eint1_cmpen_pwm_idle_mask 0x1 +#define accdet_eint1_cmpen_pwm_idle_mask_sft (0x1 << 12) +#define accdet_pwm_en_sw_addr \ + mt6359_accdet_con2 +#define accdet_pwm_en_sw_sft 13 +#define accdet_pwm_en_sw_mask 0x1 +#define accdet_pwm_en_sw_mask_sft (0x1 << 13) +#define accdet_pwm_en_sel_addr \ + mt6359_accdet_con2 +#define accdet_pwm_en_sel_sft 14 +#define accdet_pwm_en_sel_mask 0x3 +#define accdet_pwm_en_sel_mask_sft (0x3 << 14) +#define accdet_pwm_width_addr \ + mt6359_accdet_con3 +#define accdet_pwm_width_sft 0 +#define accdet_pwm_width_mask 0xffff +#define accdet_pwm_width_mask_sft (0xffff << 0) +#define accdet_pwm_thresh_addr \ + mt6359_accdet_con4 +#define accdet_pwm_thresh_sft 0 +#define accdet_pwm_thresh_mask 0xffff +#define accdet_pwm_thresh_mask_sft (0xffff << 0) +#define accdet_rise_delay_addr \ + mt6359_accdet_con5 +#define accdet_rise_delay_sft 0 +#define accdet_rise_delay_mask 0x7fff +#define accdet_rise_delay_mask_sft (0x7fff << 0) +#define accdet_fall_delay_addr \ + mt6359_accdet_con5 +#define accdet_fall_delay_sft 15 +#define accdet_fall_delay_mask 0x1 +#define accdet_fall_delay_mask_sft (0x1 << 15) +#define accdet_eint_cmpmen_pwm_thresh_addr \ + mt6359_accdet_con6 +#define accdet_eint_cmpmen_pwm_thresh_sft 0 +#define accdet_eint_cmpmen_pwm_thresh_mask 0x7 +#define accdet_eint_cmpmen_pwm_thresh_mask_sft (0x7 << 0) +#define accdet_eint_cmpmen_pwm_width_addr \ + mt6359_accdet_con6 +#define accdet_eint_cmpmen_pwm_width_sft 4 +#define accdet_eint_cmpmen_pwm_width_mask 0x7 +#define accdet_eint_cmpmen_pwm_width_mask_sft (0x7 << 4) +#define accdet_eint_en_pwm_thresh_addr \ + mt6359_accdet_con7 +#define accdet_eint_en_pwm_thresh_sft 0 +#define accdet_eint_en_pwm_thresh_mask 0x7 +#define accdet_eint_en_pwm_thresh_mask_sft (0x7 << 0) +#define accdet_eint_en_pwm_width_addr \ + mt6359_accdet_con7 +#define accdet_eint_en_pwm_width_sft 4 +#define accdet_eint_en_pwm_width_mask 0x3 +#define accdet_eint_en_pwm_width_mask_sft (0x3 << 4) +#define accdet_eint_cmpen_pwm_thresh_addr \ + mt6359_accdet_con7 +#define accdet_eint_cmpen_pwm_thresh_sft 8 +#define accdet_eint_cmpen_pwm_thresh_mask 0x7 +#define accdet_eint_cmpen_pwm_thresh_mask_sft (0x7 << 8) +#define accdet_eint_cmpen_pwm_width_addr \ + mt6359_accdet_con7 +#define accdet_eint_cmpen_pwm_width_sft 12 +#define accdet_eint_cmpen_pwm_width_mask 0x3 +#define accdet_eint_cmpen_pwm_width_mask_sft (0x3 << 12) +#define accdet_debounce0_addr \ + mt6359_accdet_con8 +#define accdet_debounce0_sft 0 +#define accdet_debounce0_mask 0xffff +#define accdet_debounce0_mask_sft (0xffff << 0) +#define accdet_debounce1_addr \ + mt6359_accdet_con9 +#define accdet_debounce1_sft 0 +#define accdet_debounce1_mask 0xffff +#define accdet_debounce1_mask_sft (0xffff << 0) +#define accdet_debounce2_addr \ + mt6359_accdet_con10 +#define accdet_debounce2_sft 0 +#define accdet_debounce2_mask 0xffff +#define accdet_debounce2_mask_sft (0xffff << 0) +#define accdet_debounce3_addr \ + mt6359_accdet_con11 +#define accdet_debounce3_sft 0 +#define accdet_debounce3_mask 0xffff +#define accdet_debounce3_mask_sft (0xffff << 0) +#define accdet_connect_auxadc_time_dig_addr \ + mt6359_accdet_con12 +#define accdet_connect_auxadc_time_dig_sft 0 +#define accdet_connect_auxadc_time_dig_mask 0xffff +#define accdet_connect_auxadc_time_dig_mask_sft (0xffff << 0) +#define accdet_connect_auxadc_time_ana_addr \ + mt6359_accdet_con13 +#define accdet_connect_auxadc_time_ana_sft 0 +#define accdet_connect_auxadc_time_ana_mask 0xffff +#define accdet_connect_auxadc_time_ana_mask_sft (0xffff << 0) +#define accdet_eint_debounce0_addr \ + mt6359_accdet_con14 +#define accdet_eint_debounce0_sft 0 +#define accdet_eint_debounce0_mask 0xf +#define accdet_eint_debounce0_mask_sft (0xf << 0) +#define accdet_eint_debounce1_addr \ + mt6359_accdet_con14 +#define accdet_eint_debounce1_sft 4 +#define accdet_eint_debounce1_mask 0xf +#define accdet_eint_debounce1_mask_sft (0xf << 4) +#define accdet_eint_debounce2_addr \ + mt6359_accdet_con14 +#define accdet_eint_debounce2_sft 8 +#define accdet_eint_debounce2_mask 0xf +#define accdet_eint_debounce2_mask_sft (0xf << 8) +#define accdet_eint_debounce3_addr \ + mt6359_accdet_con14 +#define accdet_eint_debounce3_sft 12 +#define accdet_eint_debounce3_mask 0xf +#define accdet_eint_debounce3_mask_sft (0xf << 12) +#define accdet_eint_inverter_debounce_addr \ + mt6359_accdet_con15 +#define accdet_eint_inverter_debounce_sft 0 +#define accdet_eint_inverter_debounce_mask 0xf +#define accdet_eint_inverter_debounce_mask_sft (0xf << 0) +#define accdet_ival_cur_in_addr \ + mt6359_accdet_con16 +#define accdet_ival_cur_in_sft 0 +#define accdet_ival_cur_in_mask 0x3 +#define accdet_ival_cur_in_mask_sft (0x3 << 0) +#define accdet_ival_sam_in_addr \ + mt6359_accdet_con16 +#define accdet_ival_sam_in_sft 2 +#define accdet_ival_sam_in_mask 0x3 +#define accdet_ival_sam_in_mask_sft (0x3 << 2) +#define accdet_ival_mem_in_addr \ + mt6359_accdet_con16 +#define accdet_ival_mem_in_sft 4 +#define accdet_ival_mem_in_mask 0x3 +#define accdet_ival_mem_in_mask_sft (0x3 << 4) +#define accdet_eint_ival_cur_in_addr \ + mt6359_accdet_con16 +#define accdet_eint_ival_cur_in_sft 6 +#define accdet_eint_ival_cur_in_mask 0x3 +#define accdet_eint_ival_cur_in_mask_sft (0x3 << 6) +#define accdet_eint_ival_sam_in_addr \ + mt6359_accdet_con16 +#define accdet_eint_ival_sam_in_sft 8 +#define accdet_eint_ival_sam_in_mask 0x3 +#define accdet_eint_ival_sam_in_mask_sft (0x3 << 8) +#define accdet_eint_ival_mem_in_addr \ + mt6359_accdet_con16 +#define accdet_eint_ival_mem_in_sft 10 +#define accdet_eint_ival_mem_in_mask 0x3 +#define accdet_eint_ival_mem_in_mask_sft (0x3 << 10) +#define accdet_ival_sel_addr \ + mt6359_accdet_con16 +#define accdet_ival_sel_sft 12 +#define accdet_ival_sel_mask 0x1 +#define accdet_ival_sel_mask_sft (0x1 << 12) +#define accdet_eint_ival_sel_addr \ + mt6359_accdet_con16 +#define accdet_eint_ival_sel_sft 13 +#define accdet_eint_ival_sel_mask 0x1 +#define accdet_eint_ival_sel_mask_sft (0x1 << 13) +#define accdet_eint_inverter_ival_cur_in_addr \ + mt6359_accdet_con17 +#define accdet_eint_inverter_ival_cur_in_sft 0 +#define accdet_eint_inverter_ival_cur_in_mask 0x1 +#define accdet_eint_inverter_ival_cur_in_mask_sft (0x1 << 0) +#define accdet_eint_inverter_ival_sam_in_addr \ + mt6359_accdet_con17 +#define accdet_eint_inverter_ival_sam_in_sft 1 +#define accdet_eint_inverter_ival_sam_in_mask 0x1 +#define accdet_eint_inverter_ival_sam_in_mask_sft (0x1 << 1) +#define accdet_eint_inverter_ival_mem_in_addr \ + mt6359_accdet_con17 +#define accdet_eint_inverter_ival_mem_in_sft 2 +#define accdet_eint_inverter_ival_mem_in_mask 0x1 +#define accdet_eint_inverter_ival_mem_in_mask_sft (0x1 << 2) +#define accdet_eint_inverter_ival_sel_addr \ + mt6359_accdet_con17 +#define accdet_eint_inverter_ival_sel_sft 3 +#define accdet_eint_inverter_ival_sel_mask 0x1 +#define accdet_eint_inverter_ival_sel_mask_sft (0x1 << 3) +#define accdet_irq_addr \ + mt6359_accdet_con18 +#define accdet_irq_sft 0 +#define accdet_irq_mask 0x1 +#define accdet_irq_mask_sft (0x1 << 0) +#define accdet_eint0_irq_addr \ + mt6359_accdet_con18 +#define accdet_eint0_irq_sft 2 +#define accdet_eint0_irq_mask 0x1 +#define accdet_eint0_irq_mask_sft (0x1 << 2) +#define accdet_eint1_irq_addr \ + mt6359_accdet_con18 +#define accdet_eint1_irq_sft 3 +#define accdet_eint1_irq_mask 0x1 +#define accdet_eint1_irq_mask_sft (0x1 << 3) +#define accdet_eint_in_inverse_addr \ + mt6359_accdet_con18 +#define accdet_eint_in_inverse_sft 4 +#define accdet_eint_in_inverse_mask 0x1 +#define accdet_eint_in_inverse_mask_sft (0x1 << 4) +#define accdet_irq_clr_addr \ + mt6359_accdet_con18 +#define accdet_irq_clr_sft 8 +#define accdet_irq_clr_mask 0x1 +#define accdet_irq_clr_mask_sft (0x1 << 8) +#define accdet_eint0_irq_clr_addr \ + mt6359_accdet_con18 +#define accdet_eint0_irq_clr_sft 10 +#define accdet_eint0_irq_clr_mask 0x1 +#define accdet_eint0_irq_clr_mask_sft (0x1 << 10) +#define accdet_eint1_irq_clr_addr \ + mt6359_accdet_con18 +#define accdet_eint1_irq_clr_sft 11 +#define accdet_eint1_irq_clr_mask 0x1 +#define accdet_eint1_irq_clr_mask_sft (0x1 << 11) +#define accdet_eint_m_plug_in_num_addr \ + mt6359_accdet_con18 +#define accdet_eint_m_plug_in_num_sft 12 +#define accdet_eint_m_plug_in_num_mask 0x7 +#define accdet_eint_m_plug_in_num_mask_sft (0x7 << 12) +#define accdet_da_stable_addr \ + mt6359_accdet_con19 +#define accdet_da_stable_sft 0 +#define accdet_da_stable_mask 0x1 +#define accdet_da_stable_mask_sft (0x1 << 0) +#define accdet_eint0_en_stable_addr \ + mt6359_accdet_con19 +#define accdet_eint0_en_stable_sft 1 +#define accdet_eint0_en_stable_mask 0x1 +#define accdet_eint0_en_stable_mask_sft (0x1 << 1) +#define accdet_eint0_cmpen_stable_addr \ + mt6359_accdet_con19 +#define accdet_eint0_cmpen_stable_sft 2 +#define accdet_eint0_cmpen_stable_mask 0x1 +#define accdet_eint0_cmpen_stable_mask_sft (0x1 << 2) +#define accdet_eint0_cmpmen_stable_addr \ + mt6359_accdet_con19 +#define accdet_eint0_cmpmen_stable_sft 3 +#define accdet_eint0_cmpmen_stable_mask 0x1 +#define accdet_eint0_cmpmen_stable_mask_sft (0x1 << 3) +#define accdet_eint0_cturbo_stable_addr \ + mt6359_accdet_con19 +#define accdet_eint0_cturbo_stable_sft 4 +#define accdet_eint0_cturbo_stable_mask 0x1 +#define accdet_eint0_cturbo_stable_mask_sft (0x1 << 4) +#define accdet_eint0_cen_stable_addr \ + mt6359_accdet_con19 +#define accdet_eint0_cen_stable_sft 5 +#define accdet_eint0_cen_stable_mask 0x1 +#define accdet_eint0_cen_stable_mask_sft (0x1 << 5) +#define accdet_eint1_en_stable_addr \ + mt6359_accdet_con19 +#define accdet_eint1_en_stable_sft 6 +#define accdet_eint1_en_stable_mask 0x1 +#define accdet_eint1_en_stable_mask_sft (0x1 << 6) +#define accdet_eint1_cmpen_stable_addr \ + mt6359_accdet_con19 +#define accdet_eint1_cmpen_stable_sft 7 +#define accdet_eint1_cmpen_stable_mask 0x1 +#define accdet_eint1_cmpen_stable_mask_sft (0x1 << 7) +#define accdet_eint1_cmpmen_stable_addr \ + mt6359_accdet_con19 +#define accdet_eint1_cmpmen_stable_sft 8 +#define accdet_eint1_cmpmen_stable_mask 0x1 +#define accdet_eint1_cmpmen_stable_mask_sft (0x1 << 8) +#define accdet_eint1_cturbo_stable_addr \ + mt6359_accdet_con19 +#define accdet_eint1_cturbo_stable_sft 9 +#define accdet_eint1_cturbo_stable_mask 0x1 +#define accdet_eint1_cturbo_stable_mask_sft (0x1 << 9) +#define accdet_eint1_cen_stable_addr \ + mt6359_accdet_con19 +#define accdet_eint1_cen_stable_sft 10 +#define accdet_eint1_cen_stable_mask 0x1 +#define accdet_eint1_cen_stable_mask_sft (0x1 << 10) +#define accdet_hwmode_en_addr \ + mt6359_accdet_con20 +#define accdet_hwmode_en_sft 0 +#define accdet_hwmode_en_mask 0x1 +#define accdet_hwmode_en_mask_sft (0x1 << 0) +#define accdet_hwmode_sel_addr \ + mt6359_accdet_con20 +#define accdet_hwmode_sel_sft 1 +#define accdet_hwmode_sel_mask 0x3 +#define accdet_hwmode_sel_mask_sft (0x3 << 1) +#define accdet_plug_out_detect_addr \ + mt6359_accdet_con20 +#define accdet_plug_out_detect_sft 3 +#define accdet_plug_out_detect_mask 0x1 +#define accdet_plug_out_detect_mask_sft (0x1 << 3) +#define accdet_eint0_reverse_addr \ + mt6359_accdet_con20 +#define accdet_eint0_reverse_sft 4 +#define accdet_eint0_reverse_mask 0x1 +#define accdet_eint0_reverse_mask_sft (0x1 << 4) +#define accdet_eint1_reverse_addr \ + mt6359_accdet_con20 +#define accdet_eint1_reverse_sft 5 +#define accdet_eint1_reverse_mask 0x1 +#define accdet_eint1_reverse_mask_sft (0x1 << 5) +#define accdet_eint_hwmode_en_addr \ + mt6359_accdet_con20 +#define accdet_eint_hwmode_en_sft 8 +#define accdet_eint_hwmode_en_mask 0x1 +#define accdet_eint_hwmode_en_mask_sft (0x1 << 8) +#define accdet_eint_plug_out_bypass_deb_addr \ + mt6359_accdet_con20 +#define accdet_eint_plug_out_bypass_deb_sft 9 +#define accdet_eint_plug_out_bypass_deb_mask 0x1 +#define accdet_eint_plug_out_bypass_deb_mask_sft (0x1 << 9) +#define accdet_eint_m_plug_in_en_addr \ + mt6359_accdet_con20 +#define accdet_eint_m_plug_in_en_sft 10 +#define accdet_eint_m_plug_in_en_mask 0x1 +#define accdet_eint_m_plug_in_en_mask_sft (0x1 << 10) +#define accdet_eint_m_hwmode_en_addr \ + mt6359_accdet_con20 +#define accdet_eint_m_hwmode_en_sft 11 +#define accdet_eint_m_hwmode_en_mask 0x1 +#define accdet_eint_m_hwmode_en_mask_sft (0x1 << 11) +#define accdet_test_cmpen_addr \ + mt6359_accdet_con21 +#define accdet_test_cmpen_sft 0 +#define accdet_test_cmpen_mask 0x1 +#define accdet_test_cmpen_mask_sft (0x1 << 0) +#define accdet_test_vthen_addr \ + mt6359_accdet_con21 +#define accdet_test_vthen_sft 1 +#define accdet_test_vthen_mask 0x1 +#define accdet_test_vthen_mask_sft (0x1 << 1) +#define accdet_test_mbiasen_addr \ + mt6359_accdet_con21 +#define accdet_test_mbiasen_sft 2 +#define accdet_test_mbiasen_mask 0x1 +#define accdet_test_mbiasen_mask_sft (0x1 << 2) +#define accdet_eint_test_en_addr \ + mt6359_accdet_con21 +#define accdet_eint_test_en_sft 3 +#define accdet_eint_test_en_mask 0x1 +#define accdet_eint_test_en_mask_sft (0x1 << 3) +#define accdet_eint_test_inven_addr \ + mt6359_accdet_con21 +#define accdet_eint_test_inven_sft 4 +#define accdet_eint_test_inven_mask 0x1 +#define accdet_eint_test_inven_mask_sft (0x1 << 4) +#define accdet_eint_test_cmpen_addr \ + mt6359_accdet_con21 +#define accdet_eint_test_cmpen_sft 5 +#define accdet_eint_test_cmpen_mask 0x1 +#define accdet_eint_test_cmpen_mask_sft (0x1 << 5) +#define accdet_eint_test_cmpmen_addr \ + mt6359_accdet_con21 +#define accdet_eint_test_cmpmen_sft 6 +#define accdet_eint_test_cmpmen_mask 0x1 +#define accdet_eint_test_cmpmen_mask_sft (0x1 << 6) +#define accdet_eint_test_cturbo_addr \ + mt6359_accdet_con21 +#define accdet_eint_test_cturbo_sft 7 +#define accdet_eint_test_cturbo_mask 0x1 +#define accdet_eint_test_cturbo_mask_sft (0x1 << 7) +#define accdet_eint_test_cen_addr \ + mt6359_accdet_con21 +#define accdet_eint_test_cen_sft 8 +#define accdet_eint_test_cen_mask 0x1 +#define accdet_eint_test_cen_mask_sft (0x1 << 8) +#define accdet_test_b_addr \ + mt6359_accdet_con21 +#define accdet_test_b_sft 9 +#define accdet_test_b_mask 0x1 +#define accdet_test_b_mask_sft (0x1 << 9) +#define accdet_test_a_addr \ + mt6359_accdet_con21 +#define accdet_test_a_sft 10 +#define accdet_test_a_mask 0x1 +#define accdet_test_a_mask_sft (0x1 << 10) +#define accdet_eint_test_cmpout_addr \ + mt6359_accdet_con21 +#define accdet_eint_test_cmpout_sft 11 +#define accdet_eint_test_cmpout_mask 0x1 +#define accdet_eint_test_cmpout_mask_sft (0x1 << 11) +#define accdet_eint_test_cmpmout_addr \ + mt6359_accdet_con21 +#define accdet_eint_test_cmpmout_sft 12 +#define accdet_eint_test_cmpmout_mask 0x1 +#define accdet_eint_test_cmpmout_mask_sft (0x1 << 12) +#define accdet_eint_test_invout_addr \ + mt6359_accdet_con21 +#define accdet_eint_test_invout_sft 13 +#define accdet_eint_test_invout_mask 0x1 +#define accdet_eint_test_invout_mask_sft (0x1 << 13) +#define accdet_cmpen_sel_addr \ + mt6359_accdet_con22 +#define accdet_cmpen_sel_sft 0 +#define accdet_cmpen_sel_mask 0x1 +#define accdet_cmpen_sel_mask_sft (0x1 << 0) +#define accdet_vthen_sel_addr \ + mt6359_accdet_con22 +#define accdet_vthen_sel_sft 1 +#define accdet_vthen_sel_mask 0x1 +#define accdet_vthen_sel_mask_sft (0x1 << 1) +#define accdet_mbiasen_sel_addr \ + mt6359_accdet_con22 +#define accdet_mbiasen_sel_sft 2 +#define accdet_mbiasen_sel_mask 0x1 +#define accdet_mbiasen_sel_mask_sft (0x1 << 2) +#define accdet_eint_en_sel_addr \ + mt6359_accdet_con22 +#define accdet_eint_en_sel_sft 3 +#define accdet_eint_en_sel_mask 0x1 +#define accdet_eint_en_sel_mask_sft (0x1 << 3) +#define accdet_eint_inven_sel_addr \ + mt6359_accdet_con22 +#define accdet_eint_inven_sel_sft 4 +#define accdet_eint_inven_sel_mask 0x1 +#define accdet_eint_inven_sel_mask_sft (0x1 << 4) +#define accdet_eint_cmpen_sel_addr \ + mt6359_accdet_con22 +#define accdet_eint_cmpen_sel_sft 5 +#define accdet_eint_cmpen_sel_mask 0x1 +#define accdet_eint_cmpen_sel_mask_sft (0x1 << 5) +#define accdet_eint_cmpmen_sel_addr \ + mt6359_accdet_con22 +#define accdet_eint_cmpmen_sel_sft 6 +#define accdet_eint_cmpmen_sel_mask 0x1 +#define accdet_eint_cmpmen_sel_mask_sft (0x1 << 6) +#define accdet_eint_cturbo_sel_addr \ + mt6359_accdet_con22 +#define accdet_eint_cturbo_sel_sft 7 +#define accdet_eint_cturbo_sel_mask 0x1 +#define accdet_eint_cturbo_sel_mask_sft (0x1 << 7) +#define accdet_b_sel_addr \ + mt6359_accdet_con22 +#define accdet_b_sel_sft 9 +#define accdet_b_sel_mask 0x1 +#define accdet_b_sel_mask_sft (0x1 << 9) +#define accdet_a_sel_addr \ + mt6359_accdet_con22 +#define accdet_a_sel_sft 10 +#define accdet_a_sel_mask 0x1 +#define accdet_a_sel_mask_sft (0x1 << 10) +#define accdet_eint_cmpout_sel_addr \ + mt6359_accdet_con22 +#define accdet_eint_cmpout_sel_sft 11 +#define accdet_eint_cmpout_sel_mask 0x1 +#define accdet_eint_cmpout_sel_mask_sft (0x1 << 11) +#define accdet_eint_cmpmout_sel_addr \ + mt6359_accdet_con22 +#define accdet_eint_cmpmout_sel_sft 12 +#define accdet_eint_cmpmout_sel_mask 0x1 +#define accdet_eint_cmpmout_sel_mask_sft (0x1 << 12) +#define accdet_eint_invout_sel_addr \ + mt6359_accdet_con22 +#define accdet_eint_invout_sel_sft 13 +#define accdet_eint_invout_sel_mask 0x1 +#define accdet_eint_invout_sel_mask_sft (0x1 << 13) +#define accdet_cmpen_sw_addr \ + mt6359_accdet_con23 +#define accdet_cmpen_sw_sft 0 +#define accdet_cmpen_sw_mask 0x1 +#define accdet_cmpen_sw_mask_sft (0x1 << 0) +#define accdet_vthen_sw_addr \ + mt6359_accdet_con23 +#define accdet_vthen_sw_sft 1 +#define accdet_vthen_sw_mask 0x1 +#define accdet_vthen_sw_mask_sft (0x1 << 1) +#define accdet_mbiasen_sw_addr \ + mt6359_accdet_con23 +#define accdet_mbiasen_sw_sft 2 +#define accdet_mbiasen_sw_mask 0x1 +#define accdet_mbiasen_sw_mask_sft (0x1 << 2) +#define accdet_eint0_en_sw_addr \ + mt6359_accdet_con23 +#define accdet_eint0_en_sw_sft 3 +#define accdet_eint0_en_sw_mask 0x1 +#define accdet_eint0_en_sw_mask_sft (0x1 << 3) +#define accdet_eint0_inven_sw_addr \ + mt6359_accdet_con23 +#define accdet_eint0_inven_sw_sft 4 +#define accdet_eint0_inven_sw_mask 0x1 +#define accdet_eint0_inven_sw_mask_sft (0x1 << 4) +#define accdet_eint0_cmpen_sw_addr \ + mt6359_accdet_con23 +#define accdet_eint0_cmpen_sw_sft 5 +#define accdet_eint0_cmpen_sw_mask 0x1 +#define accdet_eint0_cmpen_sw_mask_sft (0x1 << 5) +#define accdet_eint0_cmpmen_sw_addr \ + mt6359_accdet_con23 +#define accdet_eint0_cmpmen_sw_sft 6 +#define accdet_eint0_cmpmen_sw_mask 0x1 +#define accdet_eint0_cmpmen_sw_mask_sft (0x1 << 6) +#define accdet_eint0_cturbo_sw_addr \ + mt6359_accdet_con23 +#define accdet_eint0_cturbo_sw_sft 7 +#define accdet_eint0_cturbo_sw_mask 0x1 +#define accdet_eint0_cturbo_sw_mask_sft (0x1 << 7) +#define accdet_eint1_en_sw_addr \ + mt6359_accdet_con23 +#define accdet_eint1_en_sw_sft 8 +#define accdet_eint1_en_sw_mask 0x1 +#define accdet_eint1_en_sw_mask_sft (0x1 << 8) +#define accdet_eint1_inven_sw_addr \ + mt6359_accdet_con23 +#define accdet_eint1_inven_sw_sft 9 +#define accdet_eint1_inven_sw_mask 0x1 +#define accdet_eint1_inven_sw_mask_sft (0x1 << 9) +#define accdet_eint1_cmpen_sw_addr \ + mt6359_accdet_con23 +#define accdet_eint1_cmpen_sw_sft 10 +#define accdet_eint1_cmpen_sw_mask 0x1 +#define accdet_eint1_cmpen_sw_mask_sft (0x1 << 10) +#define accdet_eint1_cmpmen_sw_addr \ + mt6359_accdet_con23 +#define accdet_eint1_cmpmen_sw_sft 11 +#define accdet_eint1_cmpmen_sw_mask 0x1 +#define accdet_eint1_cmpmen_sw_mask_sft (0x1 << 11) +#define accdet_eint1_cturbo_sw_addr \ + mt6359_accdet_con23 +#define accdet_eint1_cturbo_sw_sft 12 +#define accdet_eint1_cturbo_sw_mask 0x1 +#define accdet_eint1_cturbo_sw_mask_sft (0x1 << 12) +#define accdet_b_sw_addr \ + mt6359_accdet_con24 +#define accdet_b_sw_sft 0 +#define accdet_b_sw_mask 0x1 +#define accdet_b_sw_mask_sft (0x1 << 0) +#define accdet_a_sw_addr \ + mt6359_accdet_con24 +#define accdet_a_sw_sft 1 +#define accdet_a_sw_mask 0x1 +#define accdet_a_sw_mask_sft (0x1 << 1) +#define accdet_eint0_cmpout_sw_addr \ + mt6359_accdet_con24 +#define accdet_eint0_cmpout_sw_sft 2 +#define accdet_eint0_cmpout_sw_mask 0x1 +#define accdet_eint0_cmpout_sw_mask_sft (0x1 << 2) +#define accdet_eint0_cmpmout_sw_addr \ + mt6359_accdet_con24 +#define accdet_eint0_cmpmout_sw_sft 3 +#define accdet_eint0_cmpmout_sw_mask 0x1 +#define accdet_eint0_cmpmout_sw_mask_sft (0x1 << 3) +#define accdet_eint0_invout_sw_addr \ + mt6359_accdet_con24 +#define accdet_eint0_invout_sw_sft 4 +#define accdet_eint0_invout_sw_mask 0x1 +#define accdet_eint0_invout_sw_mask_sft (0x1 << 4) +#define accdet_eint1_cmpout_sw_addr \ + mt6359_accdet_con24 +#define accdet_eint1_cmpout_sw_sft 5 +#define accdet_eint1_cmpout_sw_mask 0x1 +#define accdet_eint1_cmpout_sw_mask_sft (0x1 << 5) +#define accdet_eint1_cmpmout_sw_addr \ + mt6359_accdet_con24 +#define accdet_eint1_cmpmout_sw_sft 6 +#define accdet_eint1_cmpmout_sw_mask 0x1 +#define accdet_eint1_cmpmout_sw_mask_sft (0x1 << 6) +#define accdet_eint1_invout_sw_addr \ + mt6359_accdet_con24 +#define accdet_eint1_invout_sw_sft 7 +#define accdet_eint1_invout_sw_mask 0x1 +#define accdet_eint1_invout_sw_mask_sft (0x1 << 7) +#define ad_audaccdetcmpob_addr \ + mt6359_accdet_con25 +#define ad_audaccdetcmpob_sft 0 +#define ad_audaccdetcmpob_mask 0x1 +#define ad_audaccdetcmpob_mask_sft (0x1 << 0) +#define ad_audaccdetcmpoa_addr \ + mt6359_accdet_con25 +#define ad_audaccdetcmpoa_sft 1 +#define ad_audaccdetcmpoa_mask 0x1 +#define ad_audaccdetcmpoa_mask_sft (0x1 << 1) +#define accdet_cur_in_addr \ + mt6359_accdet_con25 +#define accdet_cur_in_sft 2 +#define accdet_cur_in_mask 0x3 +#define accdet_cur_in_mask_sft (0x3 << 2) +#define accdet_sam_in_addr \ + mt6359_accdet_con25 +#define accdet_sam_in_sft 4 +#define accdet_sam_in_mask 0x3 +#define accdet_sam_in_mask_sft (0x3 << 4) +#define accdet_mem_in_addr \ + mt6359_accdet_con25 +#define accdet_mem_in_sft 6 +#define accdet_mem_in_mask 0x3 +#define accdet_mem_in_mask_sft (0x3 << 6) +#define accdet_state_addr \ + mt6359_accdet_con25 +#define accdet_state_sft 8 +#define accdet_state_mask 0x7 +#define accdet_state_mask_sft (0x7 << 8) +#define da_audaccdetmbiasclk_addr \ + mt6359_accdet_con25 +#define da_audaccdetmbiasclk_sft 12 +#define da_audaccdetmbiasclk_mask 0x1 +#define da_audaccdetmbiasclk_mask_sft (0x1 << 12) +#define da_audaccdetvthclk_addr \ + mt6359_accdet_con25 +#define da_audaccdetvthclk_sft 13 +#define da_audaccdetvthclk_mask 0x1 +#define da_audaccdetvthclk_mask_sft (0x1 << 13) +#define da_audaccdetcmpclk_addr \ + mt6359_accdet_con25 +#define da_audaccdetcmpclk_sft 14 +#define da_audaccdetcmpclk_mask 0x1 +#define da_audaccdetcmpclk_mask_sft (0x1 << 14) +#define da_audaccdetauxadcswctrl_addr \ + mt6359_accdet_con25 +#define da_audaccdetauxadcswctrl_sft 15 +#define da_audaccdetauxadcswctrl_mask 0x1 +#define da_audaccdetauxadcswctrl_mask_sft (0x1 << 15) +#define ad_eint0cmpmout_addr \ + mt6359_accdet_con26 +#define ad_eint0cmpmout_sft 0 +#define ad_eint0cmpmout_mask 0x1 +#define ad_eint0cmpmout_mask_sft (0x1 << 0) +#define ad_eint0cmpout_addr \ + mt6359_accdet_con26 +#define ad_eint0cmpout_sft 1 +#define ad_eint0cmpout_mask 0x1 +#define ad_eint0cmpout_mask_sft (0x1 << 1) +#define accdet_eint0_cur_in_addr \ + mt6359_accdet_con26 +#define accdet_eint0_cur_in_sft 2 +#define accdet_eint0_cur_in_mask 0x3 +#define accdet_eint0_cur_in_mask_sft (0x3 << 2) +#define accdet_eint0_sam_in_addr \ + mt6359_accdet_con26 +#define accdet_eint0_sam_in_sft 4 +#define accdet_eint0_sam_in_mask 0x3 +#define accdet_eint0_sam_in_mask_sft (0x3 << 4) +#define accdet_eint0_mem_in_addr \ + mt6359_accdet_con26 +#define accdet_eint0_mem_in_sft 6 +#define accdet_eint0_mem_in_mask 0x3 +#define accdet_eint0_mem_in_mask_sft (0x3 << 6) +#define accdet_eint0_state_addr \ + mt6359_accdet_con26 +#define accdet_eint0_state_sft 8 +#define accdet_eint0_state_mask 0x7 +#define accdet_eint0_state_mask_sft (0x7 << 8) +#define da_eint0cmpen_addr \ + mt6359_accdet_con26 +#define da_eint0cmpen_sft 13 +#define da_eint0cmpen_mask 0x1 +#define da_eint0cmpen_mask_sft (0x1 << 13) +#define da_eint0cmpmen_addr \ + mt6359_accdet_con26 +#define da_eint0cmpmen_sft 14 +#define da_eint0cmpmen_mask 0x1 +#define da_eint0cmpmen_mask_sft (0x1 << 14) +#define da_eint0cturbo_addr \ + mt6359_accdet_con26 +#define da_eint0cturbo_sft 15 +#define da_eint0cturbo_mask 0x1 +#define da_eint0cturbo_mask_sft (0x1 << 15) +#define ad_eint1cmpmout_addr \ + mt6359_accdet_con27 +#define ad_eint1cmpmout_sft 0 +#define ad_eint1cmpmout_mask 0x1 +#define ad_eint1cmpmout_mask_sft (0x1 << 0) +#define ad_eint1cmpout_addr \ + mt6359_accdet_con27 +#define ad_eint1cmpout_sft 1 +#define ad_eint1cmpout_mask 0x1 +#define ad_eint1cmpout_mask_sft (0x1 << 1) +#define accdet_eint1_cur_in_addr \ + mt6359_accdet_con27 +#define accdet_eint1_cur_in_sft 2 +#define accdet_eint1_cur_in_mask 0x3 +#define accdet_eint1_cur_in_mask_sft (0x3 << 2) +#define accdet_eint1_sam_in_addr \ + mt6359_accdet_con27 +#define accdet_eint1_sam_in_sft 4 +#define accdet_eint1_sam_in_mask 0x3 +#define accdet_eint1_sam_in_mask_sft (0x3 << 4) +#define accdet_eint1_mem_in_addr \ + mt6359_accdet_con27 +#define accdet_eint1_mem_in_sft 6 +#define accdet_eint1_mem_in_mask 0x3 +#define accdet_eint1_mem_in_mask_sft (0x3 << 6) +#define accdet_eint1_state_addr \ + mt6359_accdet_con27 +#define accdet_eint1_state_sft 8 +#define accdet_eint1_state_mask 0x7 +#define accdet_eint1_state_mask_sft (0x7 << 8) +#define da_eint1cmpen_addr \ + mt6359_accdet_con27 +#define da_eint1cmpen_sft 13 +#define da_eint1cmpen_mask 0x1 +#define da_eint1cmpen_mask_sft (0x1 << 13) +#define da_eint1cmpmen_addr \ + mt6359_accdet_con27 +#define da_eint1cmpmen_sft 14 +#define da_eint1cmpmen_mask 0x1 +#define da_eint1cmpmen_mask_sft (0x1 << 14) +#define da_eint1cturbo_addr \ + mt6359_accdet_con27 +#define da_eint1cturbo_sft 15 +#define da_eint1cturbo_mask 0x1 +#define da_eint1cturbo_mask_sft (0x1 << 15) +#define ad_eint0invout_addr \ + mt6359_accdet_con28 +#define ad_eint0invout_sft 0 +#define ad_eint0invout_mask 0x1 +#define ad_eint0invout_mask_sft (0x1 << 0) +#define accdet_eint0_inverter_cur_in_addr \ + mt6359_accdet_con28 +#define accdet_eint0_inverter_cur_in_sft 1 +#define accdet_eint0_inverter_cur_in_mask 0x1 +#define accdet_eint0_inverter_cur_in_mask_sft (0x1 << 1) +#define accdet_eint0_inverter_sam_in_addr \ + mt6359_accdet_con28 +#define accdet_eint0_inverter_sam_in_sft 2 +#define accdet_eint0_inverter_sam_in_mask 0x1 +#define accdet_eint0_inverter_sam_in_mask_sft (0x1 << 2) +#define accdet_eint0_inverter_mem_in_addr \ + mt6359_accdet_con28 +#define accdet_eint0_inverter_mem_in_sft 3 +#define accdet_eint0_inverter_mem_in_mask 0x1 +#define accdet_eint0_inverter_mem_in_mask_sft (0x1 << 3) +#define accdet_eint0_inverter_state_addr \ + mt6359_accdet_con28 +#define accdet_eint0_inverter_state_sft 8 +#define accdet_eint0_inverter_state_mask 0x7 +#define accdet_eint0_inverter_state_mask_sft (0x7 << 8) +#define da_eint0en_addr \ + mt6359_accdet_con28 +#define da_eint0en_sft 12 +#define da_eint0en_mask 0x1 +#define da_eint0en_mask_sft (0x1 << 12) +#define da_eint0inven_addr \ + mt6359_accdet_con28 +#define da_eint0inven_sft 13 +#define da_eint0inven_mask 0x1 +#define da_eint0inven_mask_sft (0x1 << 13) +#define da_eint0cen_addr \ + mt6359_accdet_con28 +#define da_eint0cen_sft 14 +#define da_eint0cen_mask 0x1 +#define da_eint0cen_mask_sft (0x1 << 14) +#define ad_eint1invout_addr \ + mt6359_accdet_con29 +#define ad_eint1invout_sft 0 +#define ad_eint1invout_mask 0x1 +#define ad_eint1invout_mask_sft (0x1 << 0) +#define accdet_eint1_inverter_cur_in_addr \ + mt6359_accdet_con29 +#define accdet_eint1_inverter_cur_in_sft 1 +#define accdet_eint1_inverter_cur_in_mask 0x1 +#define accdet_eint1_inverter_cur_in_mask_sft (0x1 << 1) +#define accdet_eint1_inverter_sam_in_addr \ + mt6359_accdet_con29 +#define accdet_eint1_inverter_sam_in_sft 2 +#define accdet_eint1_inverter_sam_in_mask 0x1 +#define accdet_eint1_inverter_sam_in_mask_sft (0x1 << 2) +#define accdet_eint1_inverter_mem_in_addr \ + mt6359_accdet_con29 +#define accdet_eint1_inverter_mem_in_sft 3 +#define accdet_eint1_inverter_mem_in_mask 0x1 +#define accdet_eint1_inverter_mem_in_mask_sft (0x1 << 3) +#define accdet_eint1_inverter_state_addr \ + mt6359_accdet_con29 +#define accdet_eint1_inverter_state_sft 8 +#define accdet_eint1_inverter_state_mask 0x7 +#define accdet_eint1_inverter_state_mask_sft (0x7 << 8) +#define da_eint1en_addr \ + mt6359_accdet_con29 +#define da_eint1en_sft 12 +#define da_eint1en_mask 0x1 +#define da_eint1en_mask_sft (0x1 << 12) +#define da_eint1inven_addr \ + mt6359_accdet_con29 +#define da_eint1inven_sft 13 +#define da_eint1inven_mask 0x1 +#define da_eint1inven_mask_sft (0x1 << 13) +#define da_eint1cen_addr \ + mt6359_accdet_con29 +#define da_eint1cen_sft 14 +#define da_eint1cen_mask 0x1 +#define da_eint1cen_mask_sft (0x1 << 14) +#define accdet_en_addr \ + mt6359_accdet_con30 +#define accdet_en_sft 0 +#define accdet_en_mask 0x1 +#define accdet_en_mask_sft (0x1 << 0) +#define accdet_eint0_en_addr \ + mt6359_accdet_con30 +#define accdet_eint0_en_sft 1 +#define accdet_eint0_en_mask 0x1 +#define accdet_eint0_en_mask_sft (0x1 << 1) +#define accdet_eint1_en_addr \ + mt6359_accdet_con30 +#define accdet_eint1_en_sft 2 +#define accdet_eint1_en_mask 0x1 +#define accdet_eint1_en_mask_sft (0x1 << 2) +#define accdet_eint0_m_en_addr \ + mt6359_accdet_con30 +#define accdet_eint0_m_en_sft 3 +#define accdet_eint0_m_en_mask 0x1 +#define accdet_eint0_m_en_mask_sft (0x1 << 3) +#define accdet_eint0_detect_moisture_addr \ + mt6359_accdet_con30 +#define accdet_eint0_detect_moisture_sft 4 +#define accdet_eint0_detect_moisture_mask 0x1 +#define accdet_eint0_detect_moisture_mask_sft (0x1 << 4) +#define accdet_eint0_plug_in_addr \ + mt6359_accdet_con30 +#define accdet_eint0_plug_in_sft 5 +#define accdet_eint0_plug_in_mask 0x1 +#define accdet_eint0_plug_in_mask_sft (0x1 << 5) +#define accdet_eint0_m_plug_in_addr \ + mt6359_accdet_con30 +#define accdet_eint0_m_plug_in_sft 6 +#define accdet_eint0_m_plug_in_mask 0x1 +#define accdet_eint0_m_plug_in_mask_sft (0x1 << 6) +#define accdet_eint1_m_en_addr \ + mt6359_accdet_con30 +#define accdet_eint1_m_en_sft 7 +#define accdet_eint1_m_en_mask 0x1 +#define accdet_eint1_m_en_mask_sft (0x1 << 7) +#define accdet_eint1_detect_moisture_addr \ + mt6359_accdet_con30 +#define accdet_eint1_detect_moisture_sft 8 +#define accdet_eint1_detect_moisture_mask 0x1 +#define accdet_eint1_detect_moisture_mask_sft (0x1 << 8) +#define accdet_eint1_plug_in_addr \ + mt6359_accdet_con30 +#define accdet_eint1_plug_in_sft 9 +#define accdet_eint1_plug_in_mask 0x1 +#define accdet_eint1_plug_in_mask_sft (0x1 << 9) +#define accdet_eint1_m_plug_in_addr \ + mt6359_accdet_con30 +#define accdet_eint1_m_plug_in_sft 10 +#define accdet_eint1_m_plug_in_mask 0x1 +#define accdet_eint1_m_plug_in_mask_sft (0x1 << 10) +#define accdet_cur_deb_addr \ + mt6359_accdet_con31 +#define accdet_cur_deb_sft 0 +#define accdet_cur_deb_mask 0xffff +#define accdet_cur_deb_mask_sft (0xffff << 0) +#define accdet_eint0_cur_deb_addr \ + mt6359_accdet_con32 +#define accdet_eint0_cur_deb_sft 0 +#define accdet_eint0_cur_deb_mask 0x7fff +#define accdet_eint0_cur_deb_mask_sft (0x7fff << 0) +#define accdet_eint1_cur_deb_addr \ + mt6359_accdet_con33 +#define accdet_eint1_cur_deb_sft 0 +#define accdet_eint1_cur_deb_mask 0x7fff +#define accdet_eint1_cur_deb_mask_sft (0x7fff << 0) +#define accdet_eint0_inverter_cur_deb_addr \ + mt6359_accdet_con34 +#define accdet_eint0_inverter_cur_deb_sft 0 +#define accdet_eint0_inverter_cur_deb_mask 0x7fff +#define accdet_eint0_inverter_cur_deb_mask_sft (0x7fff << 0) +#define accdet_eint1_inverter_cur_deb_addr \ + mt6359_accdet_con35 +#define accdet_eint1_inverter_cur_deb_sft 0 +#define accdet_eint1_inverter_cur_deb_mask 0x7fff +#define accdet_eint1_inverter_cur_deb_mask_sft (0x7fff << 0) +#define ad_audaccdetcmpob_mon_addr \ + mt6359_accdet_con36 +#define ad_audaccdetcmpob_mon_sft 0 +#define ad_audaccdetcmpob_mon_mask 0x1 +#define ad_audaccdetcmpob_mon_mask_sft (0x1 << 0) +#define ad_audaccdetcmpoa_mon_addr \ + mt6359_accdet_con36 +#define ad_audaccdetcmpoa_mon_sft 1 +#define ad_audaccdetcmpoa_mon_mask 0x1 +#define ad_audaccdetcmpoa_mon_mask_sft (0x1 << 1) +#define ad_eint0cmpmout_mon_addr \ + mt6359_accdet_con36 +#define ad_eint0cmpmout_mon_sft 2 +#define ad_eint0cmpmout_mon_mask 0x1 +#define ad_eint0cmpmout_mon_mask_sft (0x1 << 2) +#define ad_eint0cmpout_mon_addr \ + mt6359_accdet_con36 +#define ad_eint0cmpout_mon_sft 3 +#define ad_eint0cmpout_mon_mask 0x1 +#define ad_eint0cmpout_mon_mask_sft (0x1 << 3) +#define ad_eint0invout_mon_addr \ + mt6359_accdet_con36 +#define ad_eint0invout_mon_sft 4 +#define ad_eint0invout_mon_mask 0x1 +#define ad_eint0invout_mon_mask_sft (0x1 << 4) +#define ad_eint1cmpmout_mon_addr \ + mt6359_accdet_con36 +#define ad_eint1cmpmout_mon_sft 5 +#define ad_eint1cmpmout_mon_mask 0x1 +#define ad_eint1cmpmout_mon_mask_sft (0x1 << 5) +#define ad_eint1cmpout_mon_addr \ + mt6359_accdet_con36 +#define ad_eint1cmpout_mon_sft 6 +#define ad_eint1cmpout_mon_mask 0x1 +#define ad_eint1cmpout_mon_mask_sft (0x1 << 6) +#define ad_eint1invout_mon_addr \ + mt6359_accdet_con36 +#define ad_eint1invout_mon_sft 7 +#define ad_eint1invout_mon_mask 0x1 +#define ad_eint1invout_mon_mask_sft (0x1 << 7) +#define da_audaccdetcmpclk_mon_addr \ + mt6359_accdet_con37 +#define da_audaccdetcmpclk_mon_sft 0 +#define da_audaccdetcmpclk_mon_mask 0x1 +#define da_audaccdetcmpclk_mon_mask_sft (0x1 << 0) +#define da_audaccdetvthclk_mon_addr \ + mt6359_accdet_con37 +#define da_audaccdetvthclk_mon_sft 1 +#define da_audaccdetvthclk_mon_mask 0x1 +#define da_audaccdetvthclk_mon_mask_sft (0x1 << 1) +#define da_audaccdetmbiasclk_mon_addr \ + mt6359_accdet_con37 +#define da_audaccdetmbiasclk_mon_sft 2 +#define da_audaccdetmbiasclk_mon_mask 0x1 +#define da_audaccdetmbiasclk_mon_mask_sft (0x1 << 2) +#define da_audaccdetauxadcswctrl_mon_addr \ + mt6359_accdet_con37 +#define da_audaccdetauxadcswctrl_mon_sft 3 +#define da_audaccdetauxadcswctrl_mon_mask 0x1 +#define da_audaccdetauxadcswctrl_mon_mask_sft (0x1 << 3) +#define da_eint0cturbo_mon_addr \ + mt6359_accdet_con38 +#define da_eint0cturbo_mon_sft 0 +#define da_eint0cturbo_mon_mask 0x1 +#define da_eint0cturbo_mon_mask_sft (0x1 << 0) +#define da_eint0cmpmen_mon_addr \ + mt6359_accdet_con38 +#define da_eint0cmpmen_mon_sft 1 +#define da_eint0cmpmen_mon_mask 0x1 +#define da_eint0cmpmen_mon_mask_sft (0x1 << 1) +#define da_eint0cmpen_mon_addr \ + mt6359_accdet_con38 +#define da_eint0cmpen_mon_sft 2 +#define da_eint0cmpen_mon_mask 0x1 +#define da_eint0cmpen_mon_mask_sft (0x1 << 2) +#define da_eint0inven_mon_addr \ + mt6359_accdet_con38 +#define da_eint0inven_mon_sft 3 +#define da_eint0inven_mon_mask 0x1 +#define da_eint0inven_mon_mask_sft (0x1 << 3) +#define da_eint0cen_mon_addr \ + mt6359_accdet_con38 +#define da_eint0cen_mon_sft 4 +#define da_eint0cen_mon_mask 0x1 +#define da_eint0cen_mon_mask_sft (0x1 << 4) +#define da_eint0en_mon_addr \ + mt6359_accdet_con38 +#define da_eint0en_mon_sft 5 +#define da_eint0en_mon_mask 0x1 +#define da_eint0en_mon_mask_sft (0x1 << 5) +#define da_eint1cturbo_mon_addr \ + mt6359_accdet_con38 +#define da_eint1cturbo_mon_sft 8 +#define da_eint1cturbo_mon_mask 0x1 +#define da_eint1cturbo_mon_mask_sft (0x1 << 8) +#define da_eint1cmpmen_mon_addr \ + mt6359_accdet_con38 +#define da_eint1cmpmen_mon_sft 9 +#define da_eint1cmpmen_mon_mask 0x1 +#define da_eint1cmpmen_mon_mask_sft (0x1 << 9) +#define da_eint1cmpen_mon_addr \ + mt6359_accdet_con38 +#define da_eint1cmpen_mon_sft 10 +#define da_eint1cmpen_mon_mask 0x1 +#define da_eint1cmpen_mon_mask_sft (0x1 << 10) +#define da_eint1inven_mon_addr \ + mt6359_accdet_con38 +#define da_eint1inven_mon_sft 11 +#define da_eint1inven_mon_mask 0x1 +#define da_eint1inven_mon_mask_sft (0x1 << 11) +#define da_eint1cen_mon_addr \ + mt6359_accdet_con38 +#define da_eint1cen_mon_sft 12 +#define da_eint1cen_mon_mask 0x1 +#define da_eint1cen_mon_mask_sft (0x1 << 12) +#define da_eint1en_mon_addr \ + mt6359_accdet_con38 +#define da_eint1en_mon_sft 13 +#define da_eint1en_mon_mask 0x1 +#define da_eint1en_mon_mask_sft (0x1 << 13) +#define accdet_eint0_m_plug_in_count_addr \ + mt6359_accdet_con39 +#define accdet_eint0_m_plug_in_count_sft 0 +#define accdet_eint0_m_plug_in_count_mask 0x7 +#define accdet_eint0_m_plug_in_count_mask_sft (0x7 << 0) +#define accdet_eint1_m_plug_in_count_addr \ + mt6359_accdet_con39 +#define accdet_eint1_m_plug_in_count_sft 4 +#define accdet_eint1_m_plug_in_count_mask 0x7 +#define accdet_eint1_m_plug_in_count_mask_sft (0x7 << 4) +#define accdet_mon_flag_en_addr \ + mt6359_accdet_con40 +#define accdet_mon_flag_en_sft 0 +#define accdet_mon_flag_en_mask 0x1 +#define accdet_mon_flag_en_mask_sft (0x1 << 0) +#define accdet_mon_flag_sel_addr \ + mt6359_accdet_con40 +#define accdet_mon_flag_sel_sft 4 +#define accdet_mon_flag_sel_mask 0xf +#define accdet_mon_flag_sel_mask_sft (0xf << 4) + +#define rg_audpwdbmicbias0_addr \ + mt6359_audenc_ana_con15 +#define rg_audpwdbmicbias0_sft 0 +#define rg_audpwdbmicbias0_mask 0x1 +#define rg_audpwdbmicbias0_mask_sft (0x1 << 0) +#define rg_audpreamplon_addr \ + mt6359_audenc_ana_con0 +#define rg_audpreamplon_sft 0 +#define rg_audpreamplon_mask 0x1 +#define rg_audpreamplon_mask_sft (0x1 << 0) +#define rg_clksq_en_addr \ + mt6359_audenc_ana_con23 +#define rg_clksq_en_sft 0 +#define rg_clksq_en_mask 0x1 +#define rg_clksq_en_mask_sft (0x1 << 0) +#define rg_rtc32k_ck_pdn_addr \ + mt6359_top_ckpdn_con0 +#define rg_rtc32k_ck_pdn_sft 15 +#define rg_rtc32k_ck_pdn_mask 0x1 +#define rg_rtc32k_ck_pdn_mask_sft (0x1 << 15) +#define rg_hploutputstbenh_vaudp32_addr \ + mt6359_auddec_ana_con2 +#define rg_hploutputstbenh_vaudp32_sft 0 +#define rg_hploutputstbenh_vaudp32_mask 0x7 +#define rg_hploutputstbenh_vaudp32_mask_sft (0x7 << 0) +#define auxadc_rqst_ch5_addr \ + mt6359_auxadc_rqst0 +#define auxadc_rqst_ch5_sft 5 +#define auxadc_rqst_ch5_mask 0x1 +#define auxadc_rqst_ch5_mask_sft (0x1 << 5) +#define rg_ldo_vusb_hw0_op_en_addr \ + mt6359_ldo_vusb_op_en +#define rg_ldo_vusb_hw0_op_en_sft 0 +#define rg_ldo_vusb_hw0_op_en_mask 0x1 +#define rg_ldo_vusb_hw0_op_en_mask_sft (0x1 << 0) +#define rg_hproutputstbenh_vaudp32_addr \ + mt6359_auddec_ana_con2 +#define rg_hproutputstbenh_vaudp32_sft 4 +#define rg_hproutputstbenh_vaudp32_mask 0x7 +#define rg_hproutputstbenh_vaudp32_mask_sft (0x7 << 4) +#define rg_ncp_pddis_en_addr \ + mt6359_afe_ncp_cfg2 +#define rg_ncp_pddis_en_sft 0 +#define rg_ncp_pddis_en_mask 0x1 +#define rg_ncp_pddis_en_mask_sft (0x1 << 0) +#define rg_sck32k_ck_pdn_addr \ + mt6359_top_ckpdn_con0 +#define rg_sck32k_ck_pdn_sft 0 +#define rg_sck32k_ck_pdn_mask 0x1 +#define rg_sck32k_ck_pdn_mask_sft (0x1 << 0) -#define rg_accdet_mode_ana11_mode1 (0x000f) -#define rg_accdet_mode_ana11_mode2 (0x008f) -#define rg_accdet_mode_ana11_mode6 (0x008f) +#define rg_accdet_mode_ana11_mode1 (0x000f) +#define rg_accdet_mode_ana11_mode2 (0x008f) +#define rg_accdet_mode_ana11_mode6 (0x008f) -#define auxadc_data_mask (0x0fff) +#define auxadc_data_mask (0x0fff) -#define accdet_cali_mask0 (0xff) -#define accdet_cali_mask1 (0xff << 8) -#define accdet_cali_mask2 (0xff) -#define accdet_cali_mask3 (0xff << 8) -#define accdet_cali_mask4 (0xff) - -#define accdet_eint1_irq_clr_b11 bit(pmic_accdet_eint1_irq_clr_shift) -#define accdet_eint0_irq_clr_b10 bit(pmic_accdet_eint0_irq_clr_shift) -#define accdet_eint_irq_clr_b10_11 (0x03 << \ - pmic_accdet_eint0_irq_clr_shift) -#define accdet_irq_clr_b8 bit(pmic_accdet_irq_clr_shift) +#define accdet_cali_mask0 (0xff) +#define accdet_cali_mask1 (0xff << 8) +#define accdet_cali_mask2 (0xff) +#define accdet_cali_mask3 (0xff << 8) +#define accdet_cali_mask4 (0xff) -#define accdet_eint1_irq_b3 bit(pmic_accdet_eint1_irq_shift) -#define accdet_eint0_irq_b2 bit(pmic_accdet_eint0_irq_shift) -#define accdet_eint_irq_b2_b3 (0x03 << pmic_accdet_eint0_irq_shift) -#define accdet_irq_b0 bit(pmic_accdet_irq_shift) +#define accdet_eint_irq_b2_b3 (0x03 << accdet_eint0_irq_sft) -#define accdet_state_mem_in_offset (pmic_accdet_mem_in_shift) -#define accdet_state_ab_mask (0x03) -#define accdet_state_ab_00 (0x00) -#define accdet_state_ab_01 (0x01) -#define accdet_state_ab_10 (0x02) -#define accdet_state_ab_11 (0x03) +#define accdet_state_mem_in_offset (accdet_mem_in_sft) +#define accdet_state_ab_mask (0x03) +#define accdet_state_ab_00 (0x00) +#define accdet_state_ab_01 (0x01) +#define accdet_state_ab_10 (0x02) +#define accdet_state_ab_11 (0x03) -#define accdet_eint0_stable_val ((1 << pmic_accdet_da_stable_shift) | \ - (1 << pmic_accdet_eint0_en_stable_shift) | \ - (1 << pmic_accdet_eint0_cmpen_stable_shift) | \ - (1 << pmic_accdet_eint0_cen_stable_shift)) - -#define accdet_eint1_stable_val ((1 << pmic_accdet_da_stable_shift) | \ - (1 << pmic_accdet_eint1_en_stable_shift) | \ - (1 << pmic_accdet_eint1_cmpen_stable_shift) | \ - (1 << pmic_accdet_eint1_cen_stable_shift)) - +#define accdet_eint0_stable_val ((accdet_da_stable_mask_sft) | \ + (accdet_eint0_en_stable_mask_sft) | \ + (accdet_eint0_cmpen_stable_mask_sft) | \ + (accdet_eint0_cen_stable_mask_sft)) + +#define accdet_eint1_stable_val ((accdet_da_stable_mask_sft) | \ + (accdet_eint1_en_stable_mask_sft) | \ + (accdet_eint1_cmpen_stable_mask_sft) | \ + (accdet_eint1_cen_stable_mask_sft))
|
Audio
|
eef07b9e0925e16457ab9444b56a7f93b541aee3
|
argus lin
|
sound
|
soc
|
codecs
|
asoc: mediatek: mt8183: support machine driver with rt1015p
|
supports machine driver with rt1015p ("mt8183_mt6358_ts3a227_rt1015p"). embeds in the existing mt8183-mt6358-ts3a227-max98357.c because they share most of the code.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
support machine driver with rt1015p
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ', 'mediatek', 'mt8183']
|
['kconfig', 'c']
| 2
| 30
| 0
|
--- diff --git a/sound/soc/mediatek/kconfig b/sound/soc/mediatek/kconfig --- a/sound/soc/mediatek/kconfig +++ b/sound/soc/mediatek/kconfig + select snd_soc_rt1015p diff --git a/sound/soc/mediatek/mt8183/mt8183-mt6358-ts3a227-max98357.c b/sound/soc/mediatek/mt8183/mt8183-mt6358-ts3a227-max98357.c --- a/sound/soc/mediatek/mt8183/mt8183-mt6358-ts3a227-max98357.c +++ b/sound/soc/mediatek/mt8183/mt8183-mt6358-ts3a227-max98357.c +snd_soc_dailink_defs(i2s3_rt1015p, + dailink_comp_array(comp_cpu("i2s3")), + dailink_comp_array(comp_codec("rt1015p", "hifi")), + dailink_comp_array(comp_empty())); + +static struct snd_soc_card mt8183_mt6358_ts3a227_rt1015p_card = { + .name = "mt8183_mt6358_ts3a227_rt1015p", + .owner = this_module, + .dai_link = mt8183_mt6358_ts3a227_dai_links, + .num_links = array_size(mt8183_mt6358_ts3a227_dai_links), +}; + + } else if (card == &mt8183_mt6358_ts3a227_rt1015p_card) { + dai_link->be_hw_params_fixup = + mt8183_rt1015_i2s_hw_params_fixup; + dai_link->ops = &mt8183_mt6358_i2s_ops; + dai_link->cpus = i2s3_rt1015p_cpus; + dai_link->num_cpus = + array_size(i2s3_rt1015p_cpus); + dai_link->codecs = i2s3_rt1015p_codecs; + dai_link->num_codecs = + array_size(i2s3_rt1015p_codecs); + dai_link->platforms = i2s3_rt1015p_platforms; + dai_link->num_platforms = + array_size(i2s3_rt1015p_platforms); + { + .compatible = "mediatek,mt8183_mt6358_ts3a227_rt1015p", + .data = &mt8183_mt6358_ts3a227_rt1015p_card, + },
|
Audio
|
9dc21a066bb6bff55d889f22460f1bf236a9a4a3
|
tzung bi shih
|
sound
|
soc
|
mediatek, mt8183
|
asoc: rt1015p: add acpi device id for rt1015p
|
add acpi device id for rt1015p.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add acpi device id for rt1015p
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ', 'rt1015p']
|
['c']
| 1
| 10
| 0
|
--- diff --git a/sound/soc/codecs/rt1015p.c b/sound/soc/codecs/rt1015p.c --- a/sound/soc/codecs/rt1015p.c +++ b/sound/soc/codecs/rt1015p.c +#include <linux/acpi.h> +#ifdef config_acpi +static const struct acpi_device_id rt1015p_acpi_match[] = { + { "rtl1015", 0}, + { }, +}; +module_device_table(acpi, rt1015p_acpi_match); +#endif + + .acpi_match_table = acpi_ptr(rt1015p_acpi_match),
|
Audio
|
464b489a7885d6a89b0dfa7b7f1f56e2db80700d
|
jack yu pierre louis bossart pierre louis bossart linux intel com
|
sound
|
soc
|
codecs
|
asoc: rt1015p: add support on format s32_le
|
add support on format s32_le for rt1015p.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add support on format s32_le
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ', 'rt1015p']
|
['c']
| 1
| 2
| 1
|
--- diff --git a/sound/soc/codecs/rt1015p.c b/sound/soc/codecs/rt1015p.c --- a/sound/soc/codecs/rt1015p.c +++ b/sound/soc/codecs/rt1015p.c - .formats = sndrv_pcm_fmtbit_s24, + .formats = sndrv_pcm_fmtbit_s24 | + sndrv_pcm_fmtbit_s32,
|
Audio
|
7f51384f17b3e1039fbb2d3535cc777585dc3175
|
jack yu
|
sound
|
soc
|
codecs
|
asoc: rt1019: add rt1019 amplifier driver
|
this is initial amplifier driver for rt1019.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add rt1019 amplifier driver
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ', 'rt1019']
|
['yaml', 'c', 'h', 'kconfig', 'makefile']
| 5
| 1,302
| 0
|
--- diff --git a/documentation/devicetree/bindings/sound/rt1019.yaml b/documentation/devicetree/bindings/sound/rt1019.yaml --- /dev/null +++ b/documentation/devicetree/bindings/sound/rt1019.yaml +# spdx-license-identifier: (gpl-2.0-only or bsd-2-clause) +%yaml 1.2 +--- +$id: http://devicetree.org/schemas/sound/rt1019.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: rt1019 mono class-d audio amplifier + +maintainers: + - jack.yu@realtek.com + +properties: + compatible: + const: realtek,rt1019 + + reg: + maxitems: 1 + description: i2c address of the device. + +required: + - compatible + - reg + +additionalproperties: false + +examples: + - | + i2c { + rt1019: codec@28 { + compatible = "realtek,rt1019"; + reg = <0x28>; + }; + }; diff --git a/sound/soc/codecs/kconfig b/sound/soc/codecs/kconfig --- a/sound/soc/codecs/kconfig +++ b/sound/soc/codecs/kconfig + imply snd_soc_rt1019 + default y if snd_soc_rt1019=y + default m if snd_soc_rt1019=m +config snd_soc_rt1019 + tristate + depends on i2c + diff --git a/sound/soc/codecs/makefile b/sound/soc/codecs/makefile --- a/sound/soc/codecs/makefile +++ b/sound/soc/codecs/makefile +snd-soc-rt1019-objs := rt1019.o +obj-$(config_snd_soc_rt1019) += snd-soc-rt1019.o diff --git a/sound/soc/codecs/rt1019.c b/sound/soc/codecs/rt1019.c --- /dev/null +++ b/sound/soc/codecs/rt1019.c +// spdx-license-identifier: gpl-2.0-only +// +// rt1019.c -- rt1019 alsa soc audio amplifier driver +// author: jack yu <jack.yu@realtek.com> +// +// copyright(c) 2021 realtek semiconductor corp. +// +// + +#include <linux/acpi.h> +#include <linux/fs.h> +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/init.h> +#include <linux/delay.h> +#include <linux/pm.h> +#include <linux/regmap.h> +#include <linux/i2c.h> +#include <linux/platform_device.h> +#include <linux/firmware.h> +#include <linux/gpio.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> +#include <sound/soc-dapm.h> +#include <sound/initval.h> +#include <sound/tlv.h> + +#include "rl6231.h" +#include "rt1019.h" + +static const struct reg_default rt1019_reg[] = { + { 0x0000, 0x00 }, + { 0x0002, 0x55 }, + { 0x0003, 0x55 }, + { 0x0005, 0x54 }, + { 0x0006, 0x05 }, + { 0x0007, 0x01 }, + { 0x0008, 0x70 }, + { 0x0009, 0x28 }, + { 0x000a, 0x7f }, + { 0x0011, 0x04 }, + { 0x0013, 0x00 }, + { 0x0015, 0x00 }, + { 0x0017, 0x00 }, + { 0x0019, 0x30 }, + { 0x001b, 0x01 }, + { 0x001d, 0x18 }, + { 0x001f, 0x29 }, + { 0x0021, 0x09 }, + { 0x0023, 0x02 }, + { 0x0025, 0x00 }, + { 0x0026, 0x00 }, + { 0x0028, 0x03 }, + { 0x0053, 0x00 }, + { 0x0055, 0x00 }, + { 0x0056, 0x00 }, + { 0x0057, 0x00 }, + { 0x0058, 0x00 }, + { 0x005a, 0x00 }, + { 0x005c, 0x00 }, + { 0x005d, 0x00 }, + { 0x005e, 0x10 }, + { 0x005f, 0xec }, + { 0x0061, 0x10 }, + { 0x0062, 0x19 }, + { 0x0064, 0x00 }, + { 0x0066, 0x08 }, + { 0x0068, 0x00 }, + { 0x006a, 0x00 }, + { 0x006c, 0x00 }, + { 0x006e, 0x00 }, + { 0x0100, 0x80 }, + { 0x0100, 0x51 }, + { 0x0102, 0x23 }, + { 0x0102, 0x0f }, + { 0x0104, 0x6c }, + { 0x0105, 0xec }, + { 0x0106, 0x00 }, + { 0x0107, 0x00 }, + { 0x0108, 0x00 }, + { 0x0200, 0x40 }, + { 0x0201, 0x00 }, + { 0x0202, 0x00 }, + { 0x0203, 0x00 }, + { 0x0301, 0x02 }, + { 0x0302, 0xaa }, + { 0x0303, 0x2a }, + { 0x0304, 0x6a }, + { 0x0306, 0xb0 }, + { 0x0308, 0x48 }, + { 0x030a, 0x0a }, + { 0x030b, 0x4b }, + { 0x030d, 0x7d }, + { 0x030e, 0xef }, + { 0x030f, 0x5a }, + { 0x0311, 0x00 }, + { 0x0312, 0x3e }, + { 0x0313, 0x86 }, + { 0x0315, 0xa8 }, + { 0x0318, 0x1b }, + { 0x031a, 0x3d }, + { 0x031c, 0x40 }, + { 0x031d, 0x40 }, + { 0x031e, 0x30 }, + { 0x031f, 0xbb }, + { 0x0320, 0xa5 }, + { 0x0321, 0xa5 }, + { 0x0323, 0x5a }, + { 0x0324, 0xaa }, + { 0x0325, 0x80 }, + { 0x0326, 0xaa }, + { 0x0327, 0x66 }, + { 0x0328, 0x94 }, + { 0x0329, 0x00 }, + { 0x0330, 0x00 }, + { 0x0331, 0x30 }, + { 0x0332, 0x05 }, + { 0x0400, 0x03 }, + { 0x0401, 0x02 }, + { 0x0402, 0x01 }, + { 0x0403, 0x23 }, + { 0x0404, 0x45 }, + { 0x0405, 0x67 }, + { 0x0500, 0x80 }, + { 0x0501, 0x00 }, + { 0x0502, 0x00 }, + { 0x0503, 0x00 }, + { 0x0504, 0xff }, + { 0x0505, 0x24 }, + { 0x0600, 0x75 }, + { 0x0601, 0x41 }, + { 0x0602, 0x60 }, + { 0x0603, 0x7f }, + { 0x0604, 0x65 }, + { 0x0605, 0x43 }, + { 0x0606, 0x00 }, + { 0x0607, 0x00 }, + { 0x0608, 0x00 }, + { 0x0609, 0x00 }, + { 0x060a, 0x00 }, + { 0x060b, 0x00 }, + { 0x060c, 0x00 }, + { 0x060d, 0x00 }, + { 0x060e, 0x00 }, + { 0x060f, 0x00 }, + { 0x0700, 0x15 }, + { 0x0701, 0xc8 }, + { 0x0704, 0x02 }, + { 0x0705, 0x00 }, + { 0x0706, 0x00 }, + { 0x0707, 0x80 }, + { 0x0708, 0x08 }, + { 0x0709, 0x00 }, + { 0x0800, 0x00 }, + { 0x0801, 0x00 }, + { 0x0802, 0x09 }, + { 0x0803, 0x00 }, + { 0x0900, 0x87 }, + { 0x0a01, 0x99 }, + { 0x0a02, 0x40 }, + { 0x0a03, 0x10 }, + { 0x0b00, 0x50 }, + { 0x0b01, 0xc3 }, + { 0x0c00, 0x84 }, + { 0x0c01, 0x00 }, + { 0x0c02, 0xbb }, + { 0x0c03, 0x80 }, + { 0x0c04, 0x10 }, + { 0x0c05, 0x30 }, + { 0x0c06, 0x00 }, + { 0x0d00, 0x80 }, + { 0x0d01, 0xbb }, + { 0x0d02, 0x80 }, + { 0x0d03, 0x00 }, + { 0x0d04, 0x00 }, + { 0x0d05, 0x00 }, + { 0x0e00, 0x80 }, + { 0x0e01, 0xbb }, + { 0x0e02, 0x80 }, + { 0x0e03, 0x00 }, + { 0x0e04, 0x10 }, + { 0x0e05, 0x30 }, + { 0x0f00, 0x80 }, + { 0x0f01, 0xbb }, + { 0x0f02, 0x80 }, + { 0x0f03, 0x00 }, + { 0x0f04, 0x10 }, + { 0x0f05, 0x30 }, + { 0x0f06, 0x88 }, + { 0x0f07, 0x88 }, + { 0x0f08, 0x00 }, + { 0x0f09, 0x00 }, +}; + +static bool rt1019_volatile_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case rt1019_pwr_strp_1: + case rt1019_pwr_strp_2: + case rt1019_sil_det_gat: + case rt1019_phase_sync: + case rt1019_stat_mach_2: + case rt1019_fs_det_1: + case rt1019_fs_det_2: + case rt1019_fs_det_3: + case rt1019_fs_det_4: + case rt1019_fs_det_5: + case rt1019_fs_det_6: + case rt1019_fs_det_7: + case rt1019_ana_read: + case rt1019_ver_id: + case rt1019_custom_id: + case rt1019_vend_id_1: + case rt1019_vend_id_2: + case rt1019_dev_id_1: + case rt1019_dev_id_2: + case rt1019_cal_top_3: + case rt1019_cal_top_7: + case rt1019_cal_top_17: + case rt1019_cal_top_18: + case rt1019_cal_top_19: + case rt1019_cal_top_20: + case rt1019_cal_top_21: + case rt1019_cal_top_22: + case rt1019_mdre_ctrl_2: + case rt1019_mdre_ctrl_3: + case rt1019_mdre_ctrl_4: + case rt1019_sil_det_2: + case rt1019_pwm_dc_det_1: + case rt1019_pmc_8: + case rt1019_pmc_9: + case rt1019_spkdrc_7: + case rt1019_half_freq_7: + case rt1019_cur_ctrl_11: + case rt1019_cur_ctrl_12: + case rt1019_cur_ctrl_13: + return true; + + default: + return false; + } +} + +static bool rt1019_readable_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case rt1019_reset: + case rt1019_pad_drv_1: + case rt1019_pad_drv_2: + case rt1019_pad_pull_1: + case rt1019_pad_pull_2: + case rt1019_pad_pull_3: + case rt1019_i2c_ctrl_1: + case rt1019_i2c_ctrl_2: + case rt1019_i2c_ctrl_3: + case rt1019_ids_ctrl: + case rt1019_asel_ctrl: + case rt1019_pll_reset: + case rt1019_pwr_strp_1: + case rt1019_pwr_strp_2: + case rt1019_beep_tone: + case rt1019_sil_det_gat: + case rt1019_classd_time: + case rt1019_classd_ocp: + case rt1019_phase_sync: + case rt1019_stat_mach_1: + case rt1019_stat_mach_2: + case rt1019_eff_ctrl: + case rt1019_fs_det_1: + case rt1019_fs_det_2: + case rt1019_fs_det_3: + case rt1019_fs_det_4: + case rt1019_fs_det_5: + case rt1019_fs_det_6: + case rt1019_fs_det_7: + case rt1019_ana_ctrl: + case rt1019_dummy_a: + case rt1019_dummy_b: + case rt1019_dummy_c: + case rt1019_dummy_d: + case rt1019_ana_read: + case rt1019_ver_id: + case rt1019_custom_id: + case rt1019_vend_id_1: + case rt1019_vend_id_2: + case rt1019_dev_id_1: + case rt1019_dev_id_2: + case rt1019_test_pad: + case rt1019_sdb_ctrl: + case rt1019_test_ctrl_1: + case rt1019_test_ctrl_2: + case rt1019_test_ctrl_3: + case rt1019_scan_mode: + case rt1019_clk_tree_1: + case rt1019_clk_tree_2: + case rt1019_clk_tree_3: + case rt1019_clk_tree_4: + case rt1019_clk_tree_5: + case rt1019_clk_tree_6: + case rt1019_clk_tree_7: + case rt1019_clk_tree_8: + case rt1019_clk_tree_9: + case rt1019_asrc_1: + case rt1019_asrc_2: + case rt1019_asrc_3: + case rt1019_asrc_4: + case rt1019_sys_clk: + case rt1019_bias_cur_1: + case rt1019_bias_cur_2: + case rt1019_bias_cur_3: + case rt1019_bias_cur_4: + case rt1019_chop_clk_dac: + case rt1019_chop_clk_adc: + case rt1019_ldo_ctrl_1: + case rt1019_ldo_ctrl_2: + case rt1019_pm_ana_1: + case rt1019_pm_ana_2: + case rt1019_pm_ana_3: + case rt1019_pll_1: + case rt1019_pll_2: + case rt1019_pll_3: + case rt1019_pll_int_1: + case rt1019_pll_int_3: + case rt1019_mixer: + case rt1019_cld_out_1: + case rt1019_cld_out_2: + case rt1019_cld_out_3: + case rt1019_cld_out_4: + case rt1019_cld_out_5: + case rt1019_cld_out_6: + case rt1019_cls_int_reg_1: + case rt1019_cls_int_reg_2: + case rt1019_cls_int_reg_3: + case rt1019_cls_int_reg_4: + case rt1019_cls_int_reg_5: + case rt1019_cls_int_reg_6: + case rt1019_cls_int_reg_7: + case rt1019_cls_int_reg_8: + case rt1019_cls_int_reg_9: + case rt1019_cls_int_reg_10: + case rt1019_tdm_1: + case rt1019_tdm_2: + case rt1019_tdm_3: + case rt1019_tdm_4: + case rt1019_tdm_5: + case rt1019_tdm_6: + case rt1019_dvol_1: + case rt1019_dvol_2: + case rt1019_dvol_3: + case rt1019_dvol_4: + case rt1019_dmix_mono_1: + case rt1019_dmix_mono_2: + case rt1019_cal_top_1: + case rt1019_cal_top_2: + case rt1019_cal_top_3: + case rt1019_cal_top_4: + case rt1019_cal_top_5: + case rt1019_cal_top_6: + case rt1019_cal_top_7: + case rt1019_cal_top_8: + case rt1019_cal_top_9: + case rt1019_cal_top_10: + case rt1019_cal_top_11: + case rt1019_cal_top_12: + case rt1019_cal_top_13: + case rt1019_cal_top_14: + case rt1019_cal_top_15: + case rt1019_cal_top_16: + case rt1019_cal_top_17: + case rt1019_cal_top_18: + case rt1019_cal_top_19: + case rt1019_cal_top_20: + case rt1019_cal_top_21: + case rt1019_cal_top_22: + case rt1019_mdre_ctrl_1: + case rt1019_mdre_ctrl_2: + case rt1019_mdre_ctrl_3: + case rt1019_mdre_ctrl_4: + case rt1019_mdre_ctrl_5: + case rt1019_mdre_ctrl_6: + case rt1019_mdre_ctrl_7: + case rt1019_mdre_ctrl_8: + case rt1019_mdre_ctrl_9: + case rt1019_mdre_ctrl_10: + case rt1019_scc_ctrl_1: + case rt1019_scc_ctrl_2: + case rt1019_scc_ctrl_3: + case rt1019_scc_dummy: + case rt1019_sil_det_1: + case rt1019_sil_det_2: + case rt1019_pwm_dc_det_1: + case rt1019_pwm_dc_det_2: + case rt1019_pwm_dc_det_3: + case rt1019_pwm_dc_det_4: + case rt1019_beep_1: + case rt1019_beep_2: + case rt1019_pmc_1: + case rt1019_pmc_2: + case rt1019_pmc_3: + case rt1019_pmc_4: + case rt1019_pmc_5: + case rt1019_pmc_6: + case rt1019_pmc_7: + case rt1019_pmc_8: + case rt1019_pmc_9: + case rt1019_spkdrc_1: + case rt1019_spkdrc_2: + case rt1019_spkdrc_3: + case rt1019_spkdrc_4: + case rt1019_spkdrc_5: + case rt1019_spkdrc_6: + case rt1019_spkdrc_7: + case rt1019_half_freq_1: + case rt1019_half_freq_2: + case rt1019_half_freq_3: + case rt1019_half_freq_4: + case rt1019_half_freq_5: + case rt1019_half_freq_6: + case rt1019_half_freq_7: + case rt1019_cur_ctrl_1: + case rt1019_cur_ctrl_2: + case rt1019_cur_ctrl_3: + case rt1019_cur_ctrl_4: + case rt1019_cur_ctrl_5: + case rt1019_cur_ctrl_6: + case rt1019_cur_ctrl_7: + case rt1019_cur_ctrl_8: + case rt1019_cur_ctrl_9: + case rt1019_cur_ctrl_10: + case rt1019_cur_ctrl_11: + case rt1019_cur_ctrl_12: + case rt1019_cur_ctrl_13: + return true; + default: + return false; + } +} + +static const declare_tlv_db_scale(dac_vol_tlv, -9525, 75, 0); + +static const char * const rt1019_din_source_select[] = { + "left", + "right", + "left + right average", +}; + +static soc_enum_single_decl(rt1019_mono_lr_sel, rt1019_ids_ctrl, 0, + rt1019_din_source_select); + +static const struct snd_kcontrol_new rt1019_snd_controls[] = { + soc_single_tlv("dac playback volume", rt1019_dmix_mono_1, 0, + 127, 0, dac_vol_tlv), + soc_enum("mono lr select", rt1019_mono_lr_sel), +}; + +static int r1019_dac_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); + + switch (event) { + case snd_soc_dapm_pre_pmu: + snd_soc_component_write(component, rt1019_sdb_ctrl, 0xb); + break; + case snd_soc_dapm_post_pmd: + snd_soc_component_write(component, rt1019_sdb_ctrl, 0xa); + break; + default: + break; + } + + return 0; +} + +static const struct snd_soc_dapm_widget rt1019_dapm_widgets[] = { + snd_soc_dapm_aif_in("aifrx", "aif playback", 0, snd_soc_nopm, 0, 0), + snd_soc_dapm_dac_e("dac", null, snd_soc_nopm, 0, 0, + r1019_dac_event, snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmd), + snd_soc_dapm_output("spo"), +}; + +static const struct snd_soc_dapm_route rt1019_dapm_routes[] = { + { "dac", null, "aifrx" }, + { "spo", null, "dac" }, +}; + +static int rt1019_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) +{ + struct snd_soc_component *component = dai->component; + struct rt1019_priv *rt1019 = snd_soc_component_get_drvdata(component); + int pre_div, bclk_ms, frame_size; + unsigned int val_len = 0, sys_div_da_filter = 0; + unsigned int sys_dac_osr = 0, sys_fifo_clk = 0; + unsigned int sys_clk_cal = 0, sys_asrc_in = 0; + + rt1019->lrck = params_rate(params); + pre_div = rl6231_get_clk_info(rt1019->sysclk, rt1019->lrck); + if (pre_div < 0) { + dev_err(component->dev, "unsupported clock setting "); + return -einval; + } + + frame_size = snd_soc_params_to_frame_size(params); + if (frame_size < 0) { + dev_err(component->dev, "unsupported frame size: %d ", frame_size); + return -einval; + } + + bclk_ms = frame_size > 32; + rt1019->bclk = rt1019->lrck * (32 << bclk_ms); + + dev_dbg(dai->dev, "bclk is %dhz and lrck is %dhz ", + rt1019->bclk, rt1019->lrck); + dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d ", + bclk_ms, pre_div, dai->id); + + switch (pre_div) { + case 0: + sys_div_da_filter = rt1019_sys_div_da_fil_div1; + sys_dac_osr = rt1019_sys_da_osr_div1; + sys_asrc_in = rt1019_asrc_256fs_div1; + sys_fifo_clk = rt1019_sel_fifo_div1; + sys_clk_cal = rt1019_sel_clk_cal_div1; + break; + case 1: + sys_div_da_filter = rt1019_sys_div_da_fil_div2; + sys_dac_osr = rt1019_sys_da_osr_div2; + sys_asrc_in = rt1019_asrc_256fs_div2; + sys_fifo_clk = rt1019_sel_fifo_div2; + sys_clk_cal = rt1019_sel_clk_cal_div2; + break; + case 3: + sys_div_da_filter = rt1019_sys_div_da_fil_div4; + sys_dac_osr = rt1019_sys_da_osr_div4; + sys_asrc_in = rt1019_asrc_256fs_div4; + sys_fifo_clk = rt1019_sel_fifo_div4; + sys_clk_cal = rt1019_sel_clk_cal_div4; + break; + default: + return -einval; + } + + switch (params_width(params)) { + case 16: + break; + case 20: + val_len = rt1019_i2s_dl_20; + break; + case 24: + val_len = rt1019_i2s_dl_24; + break; + case 32: + val_len = rt1019_i2s_dl_32; + break; + case 8: + val_len = rt1019_i2s_dl_8; + break; + default: + return -einval; + } + + snd_soc_component_update_bits(component, rt1019_tdm_2, rt1019_i2s_dl_mask, + val_len); + snd_soc_component_update_bits(component, rt1019_clk_tree_1, + rt1019_sel_fifo_mask, sys_fifo_clk); + snd_soc_component_update_bits(component, rt1019_clk_tree_2, + rt1019_sys_div_da_fil_mask | rt1019_sys_da_osr_mask | + rt1019_asrc_256fs_mask, sys_div_da_filter | sys_dac_osr | + sys_asrc_in); + snd_soc_component_update_bits(component, rt1019_clk_tree_3, + rt1019_sel_clk_cal_mask, sys_clk_cal); + + return 0; +} + +static int rt1019_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) +{ + struct snd_soc_component *component = dai->component; + unsigned int reg_val = 0, reg_val2 = 0; + + switch (fmt & snd_soc_daifmt_inv_mask) { + case snd_soc_daifmt_nb_nf: + break; + case snd_soc_daifmt_ib_nf: + reg_val2 |= rt1019_tdm_bclk_inv; + break; + default: + return -einval; + } + + switch (fmt & snd_soc_daifmt_format_mask) { + case snd_soc_daifmt_i2s: + break; + + case snd_soc_daifmt_left_j: + reg_val |= rt1019_i2s_df_left; + break; + + case snd_soc_daifmt_dsp_a: + reg_val |= rt1019_i2s_df_pcm_a_r; + break; + + case snd_soc_daifmt_dsp_b: + reg_val |= rt1019_i2s_df_pcm_b_r; + break; + + default: + return -einval; + } + + snd_soc_component_update_bits(component, rt1019_tdm_2, + rt1019_i2s_df_mask, reg_val); + snd_soc_component_update_bits(component, rt1019_tdm_1, + rt1019_tdm_bclk_mask, reg_val2); + + return 0; +} + +static int rt1019_set_dai_sysclk(struct snd_soc_dai *dai, + int clk_id, unsigned int freq, int dir) +{ + struct snd_soc_component *component = dai->component; + struct rt1019_priv *rt1019 = snd_soc_component_get_drvdata(component); + unsigned int reg_val = 0; + + if (freq == rt1019->sysclk && clk_id == rt1019->sysclk_src) + return 0; + + switch (clk_id) { + case rt1019_sclk_s_bclk: + reg_val |= rt1019_clk_sys_pre_sel_bclk; + break; + + case rt1019_sclk_s_pll: + reg_val |= rt1019_clk_sys_pre_sel_pll; + break; + + default: + dev_err(component->dev, "invalid clock id (%d) ", clk_id); + return -einval; + } + + rt1019->sysclk = freq; + rt1019->sysclk_src = clk_id; + + dev_dbg(dai->dev, "sysclk is %dhz and clock id is %d ", freq, clk_id); + + snd_soc_component_update_bits(component, rt1019_clk_tree_1, + rt1019_clk_sys_pre_sel_mask, reg_val); + + return 0; +} + +static int rt1019_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source, + unsigned int freq_in, unsigned int freq_out) +{ + struct snd_soc_component *component = dai->component; + struct rt1019_priv *rt1019 = snd_soc_component_get_drvdata(component); + struct rl6231_pll_code pll_code; + int ret; + + if (!freq_in || !freq_out) { + dev_dbg(component->dev, "pll disabled "); + rt1019->pll_in = 0; + rt1019->pll_out = 0; + return 0; + } + + if (source == rt1019->pll_src && freq_in == rt1019->pll_in && + freq_out == rt1019->pll_out) + return 0; + + switch (source) { + case rt1019_pll_s_bclk: + snd_soc_component_update_bits(component, rt1019_clk_tree_1, + rt1019_pll_src_mask, rt1019_pll_src_sel_bclk); + break; + + case rt1019_pll_s_rc25m: + snd_soc_component_update_bits(component, rt1019_clk_tree_1, + rt1019_pll_src_mask, rt1019_pll_src_sel_rc); + break; + + default: + dev_err(component->dev, "unknown pll source %d ", source); + return -einval; + } + + ret = rl6231_pll_calc(freq_in, freq_out, &pll_code); + if (ret < 0) { + dev_err(component->dev, "unsupport input clock %d ", freq_in); + return ret; + } + + dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d ", + pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code), + pll_code.n_code, pll_code.k_code); + + snd_soc_component_update_bits(component, rt1019_pwr_strp_2, + rt1019_auto_bits_sel_mask | rt1019_auto_clk_sel_mask, + rt1019_auto_bits_sel_manu | rt1019_auto_clk_sel_manu); + snd_soc_component_update_bits(component, rt1019_pll_1, + rt1019_pll_m_mask | rt1019_pll_m_bp_mask | rt1019_pll_q_8_8_mask, + (pll_code.m_bp ? 0 : pll_code.m_code) << rt1019_pll_m_sft | + pll_code.m_bp << rt1019_pll_m_bp_sft | + ((pll_code.n_code >> 8) & rt1019_pll_q_8_8_mask)); + snd_soc_component_update_bits(component, rt1019_pll_2, + rt1019_pll_q_7_0_mask, pll_code.n_code & rt1019_pll_q_7_0_mask); + snd_soc_component_update_bits(component, rt1019_pll_3, + rt1019_pll_k_mask, pll_code.k_code); + + rt1019->pll_in = freq_in; + rt1019->pll_out = freq_out; + rt1019->pll_src = source; + + return 0; +} + +static int rt1019_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, + unsigned int rx_mask, int slots, int slot_width) +{ + struct snd_soc_component *component = dai->component; + unsigned int val = 0, rx_slotnum; + int ret = 0, first_bit; + + switch (slots) { + case 4: + val |= rt1019_i2s_tx_4ch; + break; + case 6: + val |= rt1019_i2s_tx_6ch; + break; + case 8: + val |= rt1019_i2s_tx_8ch; + break; + case 2: + break; + default: + return -einval; + } + + switch (slot_width) { + case 20: + val |= rt1019_i2s_dl_20; + break; + case 24: + val |= rt1019_i2s_dl_24; + break; + case 32: + val |= rt1019_i2s_dl_32; + break; + case 8: + val |= rt1019_i2s_dl_8; + break; + case 16: + break; + default: + return -einval; + } + + /* rx slot configuration */ + rx_slotnum = hweight_long(rx_mask); + if (rx_slotnum != 1) { + ret = -einval; + dev_err(component->dev, "too many rx slots or zero slot "); + goto _set_tdm_err_; + } + /* this is an assumption that the system sends stereo audio to the + * amplifier typically. and the stereo audio is placed in slot 0/2/4/6 + * as the starting slot. the users could select the channel from + * l/r/l+r by "mono lr select" control. + */ + first_bit = __ffs(rx_mask); + switch (first_bit) { + case 0: + case 2: + case 4: + case 6: + snd_soc_component_update_bits(component, + rt1019_tdm_3, + rt1019_tdm_i2s_tx_l_dac1_1_mask | + rt1019_tdm_i2s_tx_r_dac1_1_mask, + (first_bit << rt1019_tdm_i2s_tx_l_dac1_1_sft) | + ((first_bit + 1) << rt1019_tdm_i2s_tx_r_dac1_1_sft)); + break; + case 1: + case 3: + case 5: + case 7: + snd_soc_component_update_bits(component, + rt1019_tdm_3, + rt1019_tdm_i2s_tx_l_dac1_1_mask | + rt1019_tdm_i2s_tx_r_dac1_1_mask, + ((first_bit - 1) << rt1019_tdm_i2s_tx_l_dac1_1_sft) | + (first_bit << rt1019_tdm_i2s_tx_r_dac1_1_sft)); + break; + default: + ret = -einval; + goto _set_tdm_err_; + } + + snd_soc_component_update_bits(component, rt1019_tdm_2, + rt1019_i2s_ch_tx_mask | rt1019_i2s_df_mask, val); + +_set_tdm_err_: + return ret; +} + +static int rt1019_probe(struct snd_soc_component *component) +{ + struct rt1019_priv *rt1019 = snd_soc_component_get_drvdata(component); + + rt1019->component = component; + snd_soc_component_write(component, rt1019_sdb_ctrl, 0xa); + + return 0; +} + +#define rt1019_stereo_rates sndrv_pcm_rate_8000_192000 +#define rt1019_formats (sndrv_pcm_fmtbit_s16_le | sndrv_pcm_fmtbit_s20_3le | \ + sndrv_pcm_fmtbit_s24_le | sndrv_pcm_fmtbit_s8) + +static struct snd_soc_dai_ops rt1019_aif_dai_ops = { + .hw_params = rt1019_hw_params, + .set_fmt = rt1019_set_dai_fmt, + .set_sysclk = rt1019_set_dai_sysclk, + .set_pll = rt1019_set_dai_pll, + .set_tdm_slot = rt1019_set_tdm_slot, +}; + +static struct snd_soc_dai_driver rt1019_dai[] = { + { + .name = "rt1019-aif", + .id = 0, + .playback = { + .stream_name = "aif playback", + .channels_min = 1, + .channels_max = 2, + .rates = rt1019_stereo_rates, + .formats = rt1019_formats, + }, + .ops = &rt1019_aif_dai_ops, + } +}; + +static const struct snd_soc_component_driver soc_component_dev_rt1019 = { + .probe = rt1019_probe, + .controls = rt1019_snd_controls, + .num_controls = array_size(rt1019_snd_controls), + .dapm_widgets = rt1019_dapm_widgets, + .num_dapm_widgets = array_size(rt1019_dapm_widgets), + .dapm_routes = rt1019_dapm_routes, + .num_dapm_routes = array_size(rt1019_dapm_routes), +}; + +static const struct regmap_config rt1019_regmap = { + .reg_bits = 16, + .val_bits = 8, + .use_single_read = true, + .use_single_write = true, + .max_register = rt1019_cur_ctrl_13, + .volatile_reg = rt1019_volatile_register, + .readable_reg = rt1019_readable_register, + .cache_type = regcache_rbtree, + .reg_defaults = rt1019_reg, + .num_reg_defaults = array_size(rt1019_reg), +}; + +static const struct i2c_device_id rt1019_i2c_id[] = { + { "rt1019", 0 }, + { } +}; +module_device_table(i2c, rt1019_i2c_id); + +static const struct of_device_id rt1019_of_match[] = { + { .compatible = "realtek,rt1019", }, + {}, +}; +module_device_table(of, rt1019_of_match); + +#ifdef config_acpi +static const struct acpi_device_id rt1019_acpi_match[] = { + { "10ec1019", 0}, + { }, +}; +module_device_table(acpi, rt1019_acpi_match); +#endif + +static int rt1019_i2c_probe(struct i2c_client *i2c, + const struct i2c_device_id *id) +{ + struct rt1019_priv *rt1019; + int ret; + unsigned int val, val2, dev_id; + + rt1019 = devm_kzalloc(&i2c->dev, sizeof(struct rt1019_priv), + gfp_kernel); + if (!rt1019) + return -enomem; + + i2c_set_clientdata(i2c, rt1019); + + rt1019->regmap = devm_regmap_init_i2c(i2c, &rt1019_regmap); + if (is_err(rt1019->regmap)) { + ret = ptr_err(rt1019->regmap); + dev_err(&i2c->dev, "failed to allocate register map: %d ", + ret); + return ret; + } + + regmap_read(rt1019->regmap, rt1019_dev_id_1, &val); + regmap_read(rt1019->regmap, rt1019_dev_id_2, &val2); + dev_id = val << 8 | val2; + if (dev_id != rt1019_device_id_val && dev_id != rt1019_device_id_val2) { + dev_err(&i2c->dev, + "device with id register 0x%x is not rt1019 ", dev_id); + return -enodev; + } + + return devm_snd_soc_register_component(&i2c->dev, + &soc_component_dev_rt1019, rt1019_dai, array_size(rt1019_dai)); +} + +struct i2c_driver rt1019_i2c_driver = { + .driver = { + .name = "rt1019", + .of_match_table = of_match_ptr(rt1019_of_match), + .acpi_match_table = acpi_ptr(rt1019_acpi_match), + }, + .probe = rt1019_i2c_probe, + .id_table = rt1019_i2c_id, +}; +module_i2c_driver(rt1019_i2c_driver); + +module_description("asoc rt1019 driver"); +module_author("jack yu <jack.yu@realtek.com>"); +module_license("gpl v2"); diff --git a/sound/soc/codecs/rt1019.h b/sound/soc/codecs/rt1019.h --- /dev/null +++ b/sound/soc/codecs/rt1019.h +/* spdx-license-identifier: gpl-2.0-only */ +/* + * rt1019.h -- rt1019 alsa soc audio amplifier driver + * + * copyright(c) 2021 realtek semiconductor corp. + */ + +#ifndef __rt1019_h__ +#define __rt1019_h__ + +#define rt1019_device_id_val 0x1019 +#define rt1019_device_id_val2 0x6731 + +#define rt1019_reset 0x0000 +#define rt1019_pad_drv_1 0x0002 +#define rt1019_pad_drv_2 0x0003 +#define rt1019_pad_pull_1 0x0005 +#define rt1019_pad_pull_2 0x0006 +#define rt1019_pad_pull_3 0x0007 +#define rt1019_i2c_ctrl_1 0x0008 +#define rt1019_i2c_ctrl_2 0x0009 +#define rt1019_i2c_ctrl_3 0x000a +#define rt1019_ids_ctrl 0x0011 +#define rt1019_asel_ctrl 0x0013 +#define rt1019_pll_reset 0x0015 +#define rt1019_pwr_strp_1 0x0017 +#define rt1019_pwr_strp_2 0x0019 +#define rt1019_beep_tone 0x001b +#define rt1019_sil_det_gat 0x001d +#define rt1019_classd_time 0x001f +#define rt1019_classd_ocp 0x0021 +#define rt1019_phase_sync 0x0023 +#define rt1019_stat_mach_1 0x0025 +#define rt1019_stat_mach_2 0x0026 +#define rt1019_eff_ctrl 0x0028 +#define rt1019_fs_det_1 0x002a +#define rt1019_fs_det_2 0x002b +#define rt1019_fs_det_3 0x002c +#define rt1019_fs_det_4 0x002d +#define rt1019_fs_det_5 0x002e +#define rt1019_fs_det_6 0x002f +#define rt1019_fs_det_7 0x0030 +#define rt1019_ana_ctrl 0x0053 +#define rt1019_dummy_a 0x0055 +#define rt1019_dummy_b 0x0056 +#define rt1019_dummy_c 0x0057 +#define rt1019_dummy_d 0x0058 +#define rt1019_ana_read 0x005a +#define rt1019_ver_id 0x005c +#define rt1019_custom_id 0x005d +#define rt1019_vend_id_1 0x005e +#define rt1019_vend_id_2 0x005f +#define rt1019_dev_id_1 0x0061 +#define rt1019_dev_id_2 0x0062 +#define rt1019_test_pad 0x0064 +#define rt1019_sdb_ctrl 0x0066 +#define rt1019_test_ctrl_1 0x0068 +#define rt1019_test_ctrl_2 0x006a +#define rt1019_test_ctrl_3 0x006c +#define rt1019_scan_mode 0x006e +#define rt1019_clk_tree_1 0x0100 +#define rt1019_clk_tree_2 0x0101 +#define rt1019_clk_tree_3 0x0102 +#define rt1019_clk_tree_4 0x0103 +#define rt1019_clk_tree_5 0x0104 +#define rt1019_clk_tree_6 0x0105 +#define rt1019_clk_tree_7 0x0106 +#define rt1019_clk_tree_8 0x0107 +#define rt1019_clk_tree_9 0x0108 +#define rt1019_asrc_1 0x0200 +#define rt1019_asrc_2 0x0201 +#define rt1019_asrc_3 0x0202 +#define rt1019_asrc_4 0x0203 +#define rt1019_sys_clk 0x0300 +#define rt1019_bias_cur_1 0x0301 +#define rt1019_bias_cur_2 0x0302 +#define rt1019_bias_cur_3 0x0303 +#define rt1019_bias_cur_4 0x0304 +#define rt1019_chop_clk_dac 0x0306 +#define rt1019_chop_clk_adc 0x0308 +#define rt1019_ldo_ctrl_1 0x030a +#define rt1019_ldo_ctrl_2 0x030b +#define rt1019_pm_ana_1 0x030d +#define rt1019_pm_ana_2 0x030e +#define rt1019_pm_ana_3 0x030f +#define rt1019_pll_1 0x0311 +#define rt1019_pll_2 0x0312 +#define rt1019_pll_3 0x0313 +#define rt1019_pll_int_1 0x0315 +#define rt1019_pll_int_3 0x0318 +#define rt1019_mixer 0x031a +#define rt1019_cld_out_1 0x031c +#define rt1019_cld_out_2 0x031d +#define rt1019_cld_out_3 0x031e +#define rt1019_cld_out_4 0x031f +#define rt1019_cld_out_5 0x0320 +#define rt1019_cld_out_6 0x0321 +#define rt1019_cls_int_reg_1 0x0323 +#define rt1019_cls_int_reg_2 0x0324 +#define rt1019_cls_int_reg_3 0x0325 +#define rt1019_cls_int_reg_4 0x0326 +#define rt1019_cls_int_reg_5 0x0327 +#define rt1019_cls_int_reg_6 0x0328 +#define rt1019_cls_int_reg_7 0x0329 +#define rt1019_cls_int_reg_8 0x0330 +#define rt1019_cls_int_reg_9 0x0331 +#define rt1019_cls_int_reg_10 0x0332 +#define rt1019_tdm_1 0x0400 +#define rt1019_tdm_2 0x0401 +#define rt1019_tdm_3 0x0402 +#define rt1019_tdm_4 0x0403 +#define rt1019_tdm_5 0x0404 +#define rt1019_tdm_6 0x0405 +#define rt1019_dvol_1 0x0500 +#define rt1019_dvol_2 0x0501 +#define rt1019_dvol_3 0x0502 +#define rt1019_dvol_4 0x0503 +#define rt1019_dmix_mono_1 0x0504 +#define rt1019_dmix_mono_2 0x0505 +#define rt1019_cal_top_1 0x0600 +#define rt1019_cal_top_2 0x0601 +#define rt1019_cal_top_3 0x0602 +#define rt1019_cal_top_4 0x0603 +#define rt1019_cal_top_5 0x0604 +#define rt1019_cal_top_6 0x0605 +#define rt1019_cal_top_7 0x0606 +#define rt1019_cal_top_8 0x0607 +#define rt1019_cal_top_9 0x0608 +#define rt1019_cal_top_10 0x0609 +#define rt1019_cal_top_11 0x060a +#define rt1019_cal_top_12 0x060b +#define rt1019_cal_top_13 0x060c +#define rt1019_cal_top_14 0x060d +#define rt1019_cal_top_15 0x060e +#define rt1019_cal_top_16 0x060f +#define rt1019_cal_top_17 0x0610 +#define rt1019_cal_top_18 0x0611 +#define rt1019_cal_top_19 0x0612 +#define rt1019_cal_top_20 0x0613 +#define rt1019_cal_top_21 0x0614 +#define rt1019_cal_top_22 0x0615 +#define rt1019_mdre_ctrl_1 0x0700 +#define rt1019_mdre_ctrl_2 0x0701 +#define rt1019_mdre_ctrl_3 0x0702 +#define rt1019_mdre_ctrl_4 0x0703 +#define rt1019_mdre_ctrl_5 0x0704 +#define rt1019_mdre_ctrl_6 0x0705 +#define rt1019_mdre_ctrl_7 0x0706 +#define rt1019_mdre_ctrl_8 0x0707 +#define rt1019_mdre_ctrl_9 0x0708 +#define rt1019_mdre_ctrl_10 0x0709 +#define rt1019_scc_ctrl_1 0x0800 +#define rt1019_scc_ctrl_2 0x0801 +#define rt1019_scc_ctrl_3 0x0802 +#define rt1019_scc_dummy 0x0803 +#define rt1019_sil_det_1 0x0900 +#define rt1019_sil_det_2 0x0901 +#define rt1019_pwm_dc_det_1 0x0a00 +#define rt1019_pwm_dc_det_2 0x0a01 +#define rt1019_pwm_dc_det_3 0x0a02 +#define rt1019_pwm_dc_det_4 0x0a03 +#define rt1019_beep_1 0x0b00 +#define rt1019_beep_2 0x0b01 +#define rt1019_pmc_1 0x0c00 +#define rt1019_pmc_2 0x0c01 +#define rt1019_pmc_3 0x0c02 +#define rt1019_pmc_4 0x0c03 +#define rt1019_pmc_5 0x0c04 +#define rt1019_pmc_6 0x0c05 +#define rt1019_pmc_7 0x0c06 +#define rt1019_pmc_8 0x0c07 +#define rt1019_pmc_9 0x0c08 +#define rt1019_spkdrc_1 0x0d00 +#define rt1019_spkdrc_2 0x0d01 +#define rt1019_spkdrc_3 0x0d02 +#define rt1019_spkdrc_4 0x0d03 +#define rt1019_spkdrc_5 0x0d04 +#define rt1019_spkdrc_6 0x0d05 +#define rt1019_spkdrc_7 0x0d06 +#define rt1019_half_freq_1 0x0e00 +#define rt1019_half_freq_2 0x0e01 +#define rt1019_half_freq_3 0x0e02 +#define rt1019_half_freq_4 0x0e03 +#define rt1019_half_freq_5 0x0e04 +#define rt1019_half_freq_6 0x0e05 +#define rt1019_half_freq_7 0x0e06 +#define rt1019_cur_ctrl_1 0x0f00 +#define rt1019_cur_ctrl_2 0x0f01 +#define rt1019_cur_ctrl_3 0x0f02 +#define rt1019_cur_ctrl_4 0x0f03 +#define rt1019_cur_ctrl_5 0x0f04 +#define rt1019_cur_ctrl_6 0x0f05 +#define rt1019_cur_ctrl_7 0x0f06 +#define rt1019_cur_ctrl_8 0x0f07 +#define rt1019_cur_ctrl_9 0x0f08 +#define rt1019_cur_ctrl_10 0x0f09 +#define rt1019_cur_ctrl_11 0x0f0a +#define rt1019_cur_ctrl_12 0x0f0b +#define rt1019_cur_ctrl_13 0x0f0c + +/* 0x0019 power on strap control-2 */ +#define rt1019_auto_bits_sel_mask (0x1 << 5) +#define rt1019_auto_bits_sel_auto (0x1 << 5) +#define rt1019_auto_bits_sel_manu (0x0 << 5) +#define rt1019_auto_clk_sel_mask (0x1 << 4) +#define rt1019_auto_clk_sel_auto (0x1 << 4) +#define rt1019_auto_clk_sel_manu (0x0 << 4) + +/* 0x0100 clock tree control-1 */ +#define rt1019_clk_sys_pre_sel_mask (0x1 << 7) +#define rt1019_clk_sys_pre_sel_sft 7 +#define rt1019_clk_sys_pre_sel_bclk (0x0 << 7) +#define rt1019_clk_sys_pre_sel_pll (0x1 << 7) +#define rt1019_pll_src_mask (0x1 << 4) +#define rt1019_pll_src_sft 4 +#define rt1019_pll_src_sel_bclk (0x0 << 4) +#define rt1019_pll_src_sel_rc (0x1 << 4) +#define rt1019_sel_fifo_mask (0x3 << 2) +#define rt1019_sel_fifo_div1 (0x0 << 2) +#define rt1019_sel_fifo_div2 (0x1 << 2) +#define rt1019_sel_fifo_div4 (0x2 << 2) + +/* 0x0101 clock tree control-2 */ +#define rt1019_sys_div_da_fil_mask (0x7 << 5) +#define rt1019_sys_div_da_fil_div1 (0x2 << 5) +#define rt1019_sys_div_da_fil_div2 (0x3 << 5) +#define rt1019_sys_div_da_fil_div4 (0x4 << 5) +#define rt1019_sys_da_osr_mask (0x3 << 2) +#define rt1019_sys_da_osr_div1 (0x0 << 2) +#define rt1019_sys_da_osr_div2 (0x1 << 2) +#define rt1019_sys_da_osr_div4 (0x2 << 2) +#define rt1019_asrc_256fs_mask 0x3 +#define rt1019_asrc_256fs_div1 0x0 +#define rt1019_asrc_256fs_div2 0x1 +#define rt1019_asrc_256fs_div4 0x2 + +/* 0x0102 clock tree control-3 */ +#define rt1019_sel_clk_cal_mask (0x3 << 6) +#define rt1019_sel_clk_cal_div1 (0x0 << 6) +#define rt1019_sel_clk_cal_div2 (0x1 << 6) +#define rt1019_sel_clk_cal_div4 (0x2 << 6) + +/* 0x0311 pll-1 */ +#define rt1019_pll_m_mask (0xf << 4) +#define rt1019_pll_m_sft 4 +#define rt1019_pll_m_bp_mask (0x1 << 1) +#define rt1019_pll_m_bp_sft 1 +#define rt1019_pll_q_8_8_mask (0x1) + +/* 0x0312 pll-2 */ +#define rt1019_pll_q_7_0_mask 0xff + +/* 0x0313 pll-3 */ +#define rt1019_pll_k_mask 0x1f + +/* 0x0400 tdm control-1 */ +#define rt1019_tdm_bclk_mask (0x1 << 6) +#define rt1019_tdm_bclk_norm (0x0 << 6) +#define rt1019_tdm_bclk_inv (0x1 << 6) + +/* 0x0401 tdm control-2 */ +#define rt1019_i2s_ch_tx_mask (0x3 << 6) +#define rt1019_i2s_ch_tx_sft 6 +#define rt1019_i2s_tx_2ch (0x0 << 6) +#define rt1019_i2s_tx_4ch (0x1 << 6) +#define rt1019_i2s_tx_6ch (0x2 << 6) +#define rt1019_i2s_tx_8ch (0x3 << 6) +#define rt1019_i2s_df_mask (0x7 << 3) +#define rt1019_i2s_df_sft 3 +#define rt1019_i2s_df_i2s (0x0 << 3) +#define rt1019_i2s_df_left (0x1 << 3) +#define rt1019_i2s_df_pcm_a_r (0x2 << 3) +#define rt1019_i2s_df_pcm_b_r (0x3 << 3) +#define rt1019_i2s_df_pcm_a_f (0x6 << 3) +#define rt1019_i2s_df_pcm_b_f (0x7 << 3) +#define rt1019_i2s_dl_mask 0x7 +#define rt1019_i2s_dl_sft 0 +#define rt1019_i2s_dl_16 0x0 +#define rt1019_i2s_dl_20 0x1 +#define rt1019_i2s_dl_24 0x2 +#define rt1019_i2s_dl_32 0x3 +#define rt1019_i2s_dl_8 0x4 + +/* tdm1 control-3 (0x0402) */ +#define rt1019_tdm_i2s_tx_l_dac1_1_mask (0x7 << 4) +#define rt1019_tdm_i2s_tx_r_dac1_1_mask 0x7 +#define rt1019_tdm_i2s_tx_l_dac1_1_sft 4 +#define rt1019_tdm_i2s_tx_r_dac1_1_sft 0 + +/* system clock source */ +enum { + rt1019_sclk_s_bclk, + rt1019_sclk_s_pll, +}; + +/* pll1 source */ +enum { + rt1019_pll_s_bclk, + rt1019_pll_s_rc25m, +}; + +enum { + rt1019_aif1, + rt1019_aifs +}; + +struct rt1019_priv { + struct snd_soc_component *component; + struct regmap *regmap; + int sysclk; + int sysclk_src; + int lrck; + int bclk; + int pll_src; + int pll_in; + int pll_out; + unsigned int bclk_ratio; +}; + +#endif /* __rt1019_h__ */
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Audio
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7ec79d3850d0cb6dc52e6aa472886ab3adf15863
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jack yu
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sound
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soc
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bindings, codecs, sound
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asoc: rt1316: add rt1316 sdca vendor-specific driver
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this is the initial amplifier driver for rt1316 sdca version.
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this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
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add rt1316 sdca vendor-specific driver
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['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
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['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
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['asoc ', 'rt1316']
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['h', 'kconfig', 'c', 'makefile']
| 4
| 807
| 0
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--- diff --git a/sound/soc/codecs/kconfig b/sound/soc/codecs/kconfig --- a/sound/soc/codecs/kconfig +++ b/sound/soc/codecs/kconfig + imply snd_soc_rt1316_sdw +config snd_soc_rt1316_sdw + tristate "realtek rt1316 codec - sdw" + depends on soundwire + select regmap_soundwire + diff --git a/sound/soc/codecs/makefile b/sound/soc/codecs/makefile --- a/sound/soc/codecs/makefile +++ b/sound/soc/codecs/makefile +snd-soc-rt1316-sdw-objs := rt1316-sdw.o +obj-$(config_snd_soc_rt1316_sdw) += snd-soc-rt1316-sdw.o diff --git a/sound/soc/codecs/rt1316-sdw.c b/sound/soc/codecs/rt1316-sdw.c --- /dev/null +++ b/sound/soc/codecs/rt1316-sdw.c +// spdx-license-identifier: gpl-2.0-only +// +// rt1316-sdw.c -- rt1316 sdca alsa soc amplifier audio driver +// +// copyright(c) 2021 realtek semiconductor corp. +// +// +#include <linux/delay.h> +#include <linux/device.h> +#include <linux/pm_runtime.h> +#include <linux/mod_devicetable.h> +#include <linux/module.h> +#include <linux/regmap.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/soc-dapm.h> +#include <sound/initval.h> +#include "rt1316-sdw.h" + +static const struct reg_default rt1316_reg_defaults[] = { + { 0x3004, 0x00 }, + { 0x3005, 0x00 }, + { 0x3206, 0x00 }, + { 0xc001, 0x00 }, + { 0xc002, 0x00 }, + { 0xc003, 0x00 }, + { 0xc004, 0x00 }, + { 0xc005, 0x00 }, + { 0xc006, 0x00 }, + { 0xc007, 0x00 }, + { 0xc008, 0x00 }, + { 0xc009, 0x00 }, + { 0xc00a, 0x00 }, + { 0xc00b, 0x00 }, + { 0xc00c, 0x00 }, + { 0xc00d, 0x00 }, + { 0xc00e, 0x00 }, + { 0xc00f, 0x00 }, + { 0xc010, 0xa5 }, + { 0xc011, 0x00 }, + { 0xc012, 0xff }, + { 0xc013, 0xff }, + { 0xc014, 0x40 }, + { 0xc015, 0x00 }, + { 0xc016, 0x00 }, + { 0xc017, 0x00 }, + { 0xc605, 0x30 }, + { 0xc700, 0x0a }, + { 0xc701, 0xaa }, + { 0xc702, 0x1a }, + { 0xc703, 0x0a }, + { 0xc710, 0x80 }, + { 0xc711, 0x00 }, + { 0xc712, 0x3e }, + { 0xc713, 0x80 }, + { 0xc714, 0x80 }, + { 0xc715, 0x06 }, + { 0xd101, 0x00 }, + { 0xd102, 0x30 }, + { 0xd103, 0x00 }, + { sdw_sdca_ctl(func_num_smart_amp, rt1316_sdca_ent_udmpu21, rt1316_sdca_ctl_udmpu_cluster, 0), 0x00 }, + { sdw_sdca_ctl(func_num_smart_amp, rt1316_sdca_ent_fu21, rt1316_sdca_ctl_fu_mute, ch_l), 0x01 }, + { sdw_sdca_ctl(func_num_smart_amp, rt1316_sdca_ent_fu21, rt1316_sdca_ctl_fu_mute, ch_r), 0x01 }, + { sdw_sdca_ctl(func_num_smart_amp, rt1316_sdca_ent_xu24, rt1316_sdca_ctl_bypass, 0), 0x01 }, + { sdw_sdca_ctl(func_num_smart_amp, rt1316_sdca_ent_pde23, rt1316_sdca_ctl_req_power_state, 0), 0x03 }, + { sdw_sdca_ctl(func_num_smart_amp, rt1316_sdca_ent_pde22, rt1316_sdca_ctl_req_power_state, 0), 0x03 }, + { sdw_sdca_ctl(func_num_smart_amp, rt1316_sdca_ent_pde24, rt1316_sdca_ctl_req_power_state, 0), 0x03 }, +}; + +static const struct reg_sequence rt1316_blind_write[] = { + { 0xc710, 0x17 }, + { 0xc711, 0x80 }, + { 0xc712, 0x26 }, + { 0xc713, 0x06 }, + { 0xc714, 0x80 }, + { 0xc715, 0x06 }, + { 0xc702, 0x0a }, + { 0xc703, 0x0a }, + { 0xc001, 0x45 }, + { 0xc003, 0x00 }, + { 0xc004, 0x11 }, + { 0xc005, 0x00 }, + { 0xc006, 0x00 }, + { 0xc106, 0x00 }, + { 0xc007, 0x11 }, + { 0xc008, 0x11 }, + { 0xc009, 0x00 }, + + { 0x2f0a, 0x00 }, + { 0xd101, 0xf0 }, + { 0xd103, 0x9b }, + { 0x2f36, 0x8e }, + { 0x3206, 0x80 }, + { 0x3211, 0x0b }, + { 0x3216, 0x06 }, + { 0xc614, 0x20 }, + { 0xc615, 0x0a }, + { 0xc616, 0x02 }, + { 0xc617, 0x00 }, + { 0xc60b, 0x10 }, + { 0xc60e, 0x05 }, + { 0xc102, 0x00 }, + { 0xc090, 0xb0 }, + { 0xc00f, 0x01 }, + { 0xc09c, 0x7b }, + + { 0xc602, 0x07 }, + { 0xc603, 0x07 }, + { 0xc0a3, 0x71 }, + { 0xc00b, 0x30 }, + { 0xc093, 0x80 }, + { 0xc09d, 0x80 }, + { 0xc0b0, 0x77 }, + { 0xc010, 0xa5 }, + { 0xc050, 0x83 }, + { 0x2f55, 0x03 }, + { 0x3217, 0xb5 }, + { 0x3202, 0x02 }, + + { sdw_sdca_ctl(func_num_smart_amp, rt1316_sdca_ent_xu24, rt1316_sdca_ctl_bypass, 0), 0x00 }, + + /* for iv sense */ + { 0x2232, 0x80 }, + { 0xc0b0, 0x77 }, + { 0xc011, 0x00 }, + { 0xc020, 0x00 }, + { 0xc023, 0x00 }, + { 0x3101, 0x00 }, + { 0x3004, 0xa0 }, + { 0x3005, 0xb1 }, + { 0xc007, 0x11 }, + { 0xc008, 0x11 }, + { 0xc009, 0x00 }, + { 0xc022, 0xd6 }, + { 0xc025, 0xd6 }, + + { 0xd001, 0x03 }, + { 0xd002, 0xbf }, + { 0xd003, 0x03 }, + { 0xd004, 0xbf }, +}; + +static bool rt1316_readable_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case 0x2f0a: + case 0x2f36: + case 0x3203 ... 0x320e: + case 0xc000 ... 0xc7b4: + case 0xcf00 ... 0xcf03: + case 0xd101 ... 0xd103: + case sdw_sdca_ctl(func_num_smart_amp, rt1316_sdca_ent_udmpu21, rt1316_sdca_ctl_udmpu_cluster, 0): + case sdw_sdca_ctl(func_num_smart_amp, rt1316_sdca_ent_fu21, rt1316_sdca_ctl_fu_mute, ch_l): + case sdw_sdca_ctl(func_num_smart_amp, rt1316_sdca_ent_fu21, rt1316_sdca_ctl_fu_mute, ch_r): + case sdw_sdca_ctl(func_num_smart_amp, rt1316_sdca_ent_pde23, rt1316_sdca_ctl_req_power_state, 0): + case sdw_sdca_ctl(func_num_smart_amp, rt1316_sdca_ent_pde27, rt1316_sdca_ctl_req_power_state, 0): + case sdw_sdca_ctl(func_num_smart_amp, rt1316_sdca_ent_pde22, rt1316_sdca_ctl_req_power_state, 0): + case sdw_sdca_ctl(func_num_smart_amp, rt1316_sdca_ent_pde24, rt1316_sdca_ctl_req_power_state, 0): + return true; + default: + return false; + } +} + +static bool rt1316_volatile_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case 0xc000: + case 0xc093: + case 0xc09d: + case 0xc0a3: + case 0xc201: + case 0xc427 ... 0xc428: + case 0xd102: + return true; + default: + return false; + } +} + +static const struct regmap_config rt1316_sdw_regmap = { + .reg_bits = 32, + .val_bits = 8, + .readable_reg = rt1316_readable_register, + .volatile_reg = rt1316_volatile_register, + .max_register = 0x4108ffff, + .reg_defaults = rt1316_reg_defaults, + .num_reg_defaults = array_size(rt1316_reg_defaults), + .cache_type = regcache_rbtree, + .use_single_read = true, + .use_single_write = true, +}; + +static int rt1316_read_prop(struct sdw_slave *slave) +{ + struct sdw_slave_prop *prop = &slave->prop; + int nval; + int i, j; + u32 bit; + unsigned long addr; + struct sdw_dpn_prop *dpn; + + prop->scp_int1_mask = sdw_scp_int1_bus_clash | sdw_scp_int1_parity; + prop->quirks = sdw_slave_quirks_invalid_initial_parity; + prop->is_sdca = true; + + prop->paging_support = true; + + /* first we need to allocate memory for set bits in port lists */ + prop->source_ports = 0x04; /* bitmap: 00000100 */ + prop->sink_ports = 0x2; /* bitmap: 00000010 */ + + nval = hweight32(prop->source_ports); + prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval, + sizeof(*prop->src_dpn_prop), gfp_kernel); + if (!prop->src_dpn_prop) + return -enomem; + + i = 0; + dpn = prop->src_dpn_prop; + addr = prop->source_ports; + for_each_set_bit(bit, &addr, 32) { + dpn[i].num = bit; + dpn[i].type = sdw_dpn_full; + dpn[i].simple_ch_prep_sm = true; + dpn[i].ch_prep_timeout = 10; + i++; + } + + /* do this again for sink now */ + nval = hweight32(prop->sink_ports); + prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval, + sizeof(*prop->sink_dpn_prop), gfp_kernel); + if (!prop->sink_dpn_prop) + return -enomem; + + j = 0; + dpn = prop->sink_dpn_prop; + addr = prop->sink_ports; + for_each_set_bit(bit, &addr, 32) { + dpn[j].num = bit; + dpn[j].type = sdw_dpn_full; + dpn[j].simple_ch_prep_sm = true; + dpn[j].ch_prep_timeout = 10; + j++; + } + + /* set the timeout values */ + prop->clk_stop_timeout = 20; + + dev_dbg(&slave->dev, "%s ", __func__); + + return 0; +} + +static int rt1316_io_init(struct device *dev, struct sdw_slave *slave) +{ + struct rt1316_sdw_priv *rt1316 = dev_get_drvdata(dev); + + if (rt1316->hw_init) + return 0; + + if (rt1316->first_hw_init) { + regcache_cache_only(rt1316->regmap, false); + regcache_cache_bypass(rt1316->regmap, true); + } else { + /* + * pm runtime is only enabled when a slave reports as attached + */ + + /* set autosuspend parameters */ + pm_runtime_set_autosuspend_delay(&slave->dev, 3000); + pm_runtime_use_autosuspend(&slave->dev); + + /* update count of parent 'active' children */ + pm_runtime_set_active(&slave->dev); + + /* make sure the device does not suspend immediately */ + pm_runtime_mark_last_busy(&slave->dev); + + pm_runtime_enable(&slave->dev); + } + + pm_runtime_get_noresume(&slave->dev); + + /* sw reset */ + regmap_write(rt1316->regmap, 0xc000, 0x02); + + /* initial settings - blind write */ + regmap_multi_reg_write(rt1316->regmap, rt1316_blind_write, + array_size(rt1316_blind_write)); + + if (rt1316->first_hw_init) { + regcache_cache_bypass(rt1316->regmap, false); + regcache_mark_dirty(rt1316->regmap); + } else + rt1316->first_hw_init = true; + + /* mark slave initialization complete */ + rt1316->hw_init = true; + + pm_runtime_mark_last_busy(&slave->dev); + pm_runtime_put_autosuspend(&slave->dev); + + dev_dbg(&slave->dev, "%s hw_init complete ", __func__); + return 0; +} + +static int rt1316_update_status(struct sdw_slave *slave, + enum sdw_slave_status status) +{ + struct rt1316_sdw_priv *rt1316 = dev_get_drvdata(&slave->dev); + + /* update the status */ + rt1316->status = status; + + if (status == sdw_slave_unattached) + rt1316->hw_init = false; + + /* + * perform initialization only if slave status is present and + * hw_init flag is false + */ + if (rt1316->hw_init || rt1316->status != sdw_slave_attached) + return 0; + + /* perform i/o transfers required for slave initialization */ + return rt1316_io_init(&slave->dev, slave); +} + +static int rt1316_classd_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_component *component = + snd_soc_dapm_to_component(w->dapm); + struct rt1316_sdw_priv *rt1316 = snd_soc_component_get_drvdata(component); + unsigned char ps0 = 0x0, ps3 = 0x3; + + switch (event) { + case snd_soc_dapm_post_pmu: + regmap_write(rt1316->regmap, + sdw_sdca_ctl(func_num_smart_amp, rt1316_sdca_ent_pde23, + rt1316_sdca_ctl_req_power_state, 0), + ps0); + regmap_write(rt1316->regmap, + sdw_sdca_ctl(func_num_smart_amp, rt1316_sdca_ent_pde27, + rt1316_sdca_ctl_req_power_state, 0), + ps0); + regmap_write(rt1316->regmap, + sdw_sdca_ctl(func_num_smart_amp, rt1316_sdca_ent_pde22, + rt1316_sdca_ctl_req_power_state, 0), + ps0); + break; + case snd_soc_dapm_pre_pmd: + regmap_write(rt1316->regmap, + sdw_sdca_ctl(func_num_smart_amp, rt1316_sdca_ent_pde23, + rt1316_sdca_ctl_req_power_state, 0), + ps3); + regmap_write(rt1316->regmap, + sdw_sdca_ctl(func_num_smart_amp, rt1316_sdca_ent_pde27, + rt1316_sdca_ctl_req_power_state, 0), + ps3); + regmap_write(rt1316->regmap, + sdw_sdca_ctl(func_num_smart_amp, rt1316_sdca_ent_pde22, + rt1316_sdca_ctl_req_power_state, 0), + ps3); + break; + + default: + break; + } + + return 0; +} + +static int rt1316_pde24_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_component *component = + snd_soc_dapm_to_component(w->dapm); + struct rt1316_sdw_priv *rt1316 = snd_soc_component_get_drvdata(component); + unsigned char ps0 = 0x0, ps3 = 0x3; + + switch (event) { + case snd_soc_dapm_post_pmu: + regmap_write(rt1316->regmap, + sdw_sdca_ctl(func_num_smart_amp, rt1316_sdca_ent_pde24, + rt1316_sdca_ctl_req_power_state, 0), + ps0); + break; + case snd_soc_dapm_pre_pmd: + regmap_write(rt1316->regmap, + sdw_sdca_ctl(func_num_smart_amp, rt1316_sdca_ent_pde24, + rt1316_sdca_ctl_req_power_state, 0), + ps3); + break; + } + return 0; +} + +static const char * const rt1316_rx_data_ch_select[] = { + "l,r", + "l,l", + "l,r", + "l,l+r", + "r,l", + "r,r", + "r,l+r", + "l+r,l", + "l+r,r", + "l+r,l+r", +}; + +static soc_enum_single_decl(rt1316_rx_data_ch_enum, + sdw_sdca_ctl(func_num_smart_amp, rt1316_sdca_ent_udmpu21, rt1316_sdca_ctl_udmpu_cluster, 0), 0, + rt1316_rx_data_ch_select); + +static const struct snd_kcontrol_new rt1316_snd_controls[] = { + + /* i2s data channel selection */ + soc_enum("rx channel select", rt1316_rx_data_ch_enum), + + /* xu24 bypass control */ + soc_single("xu24 bypass switch", + sdw_sdca_ctl(func_num_smart_amp, rt1316_sdca_ent_xu24, rt1316_sdca_ctl_bypass, 0), 0, 1, 0), + + /* left/right iv tag */ + soc_single("left v tag select", 0x3004, 0, 7, 0), + soc_single("left i tag select", 0x3004, 4, 7, 0), + soc_single("right v tag select", 0x3005, 0, 7, 0), + soc_single("right i tag select", 0x3005, 4, 7, 0), + + /* iv mixer control */ + soc_double("isense mixer switch", 0xc605, 2, 0, 1, 1), + soc_double("vsense mixer switch", 0xc605, 3, 1, 1, 1), +}; + +static const struct snd_kcontrol_new rt1316_sto_dac = + soc_dapm_double_r("switch", + sdw_sdca_ctl(func_num_smart_amp, rt1316_sdca_ent_fu21, rt1316_sdca_ctl_fu_mute, ch_l), + sdw_sdca_ctl(func_num_smart_amp, rt1316_sdca_ent_fu21, rt1316_sdca_ctl_fu_mute, ch_r), + 0, 1, 1); + +static const struct snd_soc_dapm_widget rt1316_dapm_widgets[] = { + /* audio interface */ + snd_soc_dapm_aif_in("dp1rx", "dp1 playback", 0, snd_soc_nopm, 0, 0), + snd_soc_dapm_aif_out("dp2tx", "dp2 capture", 0, snd_soc_nopm, 0, 0), + + /* digital interface */ + snd_soc_dapm_switch("dac", snd_soc_nopm, 0, 0, &rt1316_sto_dac), + + /* output lines */ + snd_soc_dapm_pga_e("class d", snd_soc_nopm, 0, 0, null, 0, + rt1316_classd_event, + snd_soc_dapm_pre_pmd | snd_soc_dapm_post_pmu), + snd_soc_dapm_output("spol"), + snd_soc_dapm_output("spor"), + + snd_soc_dapm_supply("pde 24", snd_soc_nopm, 0, 0, + rt1316_pde24_event, + snd_soc_dapm_post_pmu | snd_soc_dapm_pre_pmd), + snd_soc_dapm_pga("i sense", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_pga("v sense", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_siggen("i gen"), + snd_soc_dapm_siggen("v gen"), +}; + +static const struct snd_soc_dapm_route rt1316_dapm_routes[] = { + { "dac", "switch", "dp1rx" }, + { "class d", null, "dac" }, + { "spol", null, "class d" }, + { "spor", null, "class d" }, + + { "i sense", null, "i gen" }, + { "v sense", null, "v gen" }, + { "i sense", null, "pde 24" }, + { "v sense", null, "pde 24" }, + { "dp2tx", null, "i sense" }, + { "dp2tx", null, "v sense" }, +}; + +static int rt1316_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream, + int direction) +{ + struct sdw_stream_data *stream; + + if (!sdw_stream) + return 0; + + stream = kzalloc(sizeof(*stream), gfp_kernel); + if (!stream) + return -enomem; + + stream->sdw_stream = sdw_stream; + + /* use tx_mask or rx_mask to configure stream tag and set dma_data */ + if (direction == sndrv_pcm_stream_playback) + dai->playback_dma_data = stream; + else + dai->capture_dma_data = stream; + + return 0; +} + +static void rt1316_sdw_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct sdw_stream_data *stream; + + stream = snd_soc_dai_get_dma_data(dai, substream); + snd_soc_dai_set_dma_data(dai, substream, null); + kfree(stream); +} + +static int rt1316_sdw_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) +{ + struct snd_soc_component *component = dai->component; + struct rt1316_sdw_priv *rt1316 = + snd_soc_component_get_drvdata(component); + struct sdw_stream_config stream_config; + struct sdw_port_config port_config; + enum sdw_data_direction direction; + struct sdw_stream_data *stream; + int retval, port, num_channels, ch_mask; + + dev_dbg(dai->dev, "%s %s", __func__, dai->name); + stream = snd_soc_dai_get_dma_data(dai, substream); + + if (!stream) + return -einval; + + if (!rt1316->sdw_slave) + return -einval; + + /* soundwire specific configuration */ + /* port 1 for playback */ + if (substream->stream == sndrv_pcm_stream_playback) { + direction = sdw_data_dir_rx; + port = 1; + } else { + direction = sdw_data_dir_tx; + port = 2; + } + + num_channels = params_channels(params); + ch_mask = (1 << num_channels) - 1; + + stream_config.frame_rate = params_rate(params); + stream_config.ch_count = num_channels; + stream_config.bps = snd_pcm_format_width(params_format(params)); + stream_config.direction = direction; + + port_config.ch_mask = ch_mask; + port_config.num = port; + + retval = sdw_stream_add_slave(rt1316->sdw_slave, &stream_config, + &port_config, 1, stream->sdw_stream); + if (retval) { + dev_err(dai->dev, "unable to configure port "); + return retval; + } + + return 0; +} + +static int rt1316_sdw_pcm_hw_free(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_component *component = dai->component; + struct rt1316_sdw_priv *rt1316 = + snd_soc_component_get_drvdata(component); + struct sdw_stream_data *stream = + snd_soc_dai_get_dma_data(dai, substream); + + if (!rt1316->sdw_slave) + return -einval; + + sdw_stream_remove_slave(rt1316->sdw_slave, stream->sdw_stream); + return 0; +} + +/* + * slave_ops: callbacks for get_clock_stop_mode, clock_stop and + * port_prep are not defined for now + */ +static struct sdw_slave_ops rt1316_slave_ops = { + .read_prop = rt1316_read_prop, + .update_status = rt1316_update_status, +}; + +static const struct snd_soc_component_driver soc_component_sdw_rt1316 = { + .controls = rt1316_snd_controls, + .num_controls = array_size(rt1316_snd_controls), + .dapm_widgets = rt1316_dapm_widgets, + .num_dapm_widgets = array_size(rt1316_dapm_widgets), + .dapm_routes = rt1316_dapm_routes, + .num_dapm_routes = array_size(rt1316_dapm_routes), +}; + +static const struct snd_soc_dai_ops rt1316_aif_dai_ops = { + .hw_params = rt1316_sdw_hw_params, + .hw_free = rt1316_sdw_pcm_hw_free, + .set_sdw_stream = rt1316_set_sdw_stream, + .shutdown = rt1316_sdw_shutdown, +}; + +#define rt1316_stereo_rates sndrv_pcm_rate_48000 +#define rt1316_formats (sndrv_pcm_fmtbit_s20_3le | sndrv_pcm_fmtbit_s16_le | \ + sndrv_pcm_fmtbit_s24_le) + +static struct snd_soc_dai_driver rt1316_sdw_dai[] = { + { + .name = "rt1316-aif", + .playback = { + .stream_name = "dp1 playback", + .channels_min = 1, + .channels_max = 2, + .rates = rt1316_stereo_rates, + .formats = rt1316_formats, + }, + .capture = { + .stream_name = "dp2 capture", + .channels_min = 1, + .channels_max = 2, + .rates = rt1316_stereo_rates, + .formats = rt1316_formats, + }, + .ops = &rt1316_aif_dai_ops, + }, +}; + +static int rt1316_sdw_init(struct device *dev, struct regmap *regmap, + struct sdw_slave *slave) +{ + struct rt1316_sdw_priv *rt1316; + int ret; + + rt1316 = devm_kzalloc(dev, sizeof(*rt1316), gfp_kernel); + if (!rt1316) + return -enomem; + + dev_set_drvdata(dev, rt1316); + rt1316->sdw_slave = slave; + rt1316->regmap = regmap; + + /* + * mark hw_init to false + * hw init will be performed when device reports present + */ + rt1316->hw_init = false; + rt1316->first_hw_init = false; + + ret = devm_snd_soc_register_component(dev, + &soc_component_sdw_rt1316, + rt1316_sdw_dai, + array_size(rt1316_sdw_dai)); + + dev_dbg(&slave->dev, "%s ", __func__); + + return ret; +} + +static int rt1316_sdw_probe(struct sdw_slave *slave, + const struct sdw_device_id *id) +{ + struct regmap *regmap; + + /* regmap initialization */ + regmap = devm_regmap_init_sdw(slave, &rt1316_sdw_regmap); + if (!regmap) + return -einval; + + return rt1316_sdw_init(&slave->dev, regmap, slave); +} + +static const struct sdw_device_id rt1316_id[] = { + sdw_slave_entry_ext(0x025d, 0x1316, 0x3, 0x1, 0), + {}, +}; +module_device_table(sdw, rt1316_id); + +static int __maybe_unused rt1316_dev_suspend(struct device *dev) +{ + struct rt1316_sdw_priv *rt1316 = dev_get_drvdata(dev); + + if (!rt1316->hw_init) + return 0; + + regcache_cache_only(rt1316->regmap, true); + + return 0; +} + +#define rt1316_probe_timeout 5000 + +static int __maybe_unused rt1316_dev_resume(struct device *dev) +{ + struct sdw_slave *slave = dev_to_sdw_dev(dev); + struct rt1316_sdw_priv *rt1316 = dev_get_drvdata(dev); + unsigned long time; + + if (!rt1316->hw_init) + return 0; + + if (!slave->unattach_request) + goto regmap_sync; + + time = wait_for_completion_timeout(&slave->initialization_complete, + msecs_to_jiffies(rt1316_probe_timeout)); + if (!time) { + dev_err(&slave->dev, "initialization not complete, timed out "); + return -etimedout; + } + +regmap_sync: + slave->unattach_request = 0; + regcache_cache_only(rt1316->regmap, false); + regcache_sync(rt1316->regmap); + + return 0; +} + +static const struct dev_pm_ops rt1316_pm = { + set_system_sleep_pm_ops(rt1316_dev_suspend, rt1316_dev_resume) + set_runtime_pm_ops(rt1316_dev_suspend, rt1316_dev_resume, null) +}; + +static struct sdw_driver rt1316_sdw_driver = { + .driver = { + .name = "rt1316-sdca", + .owner = this_module, + .pm = &rt1316_pm, + }, + .probe = rt1316_sdw_probe, + .ops = &rt1316_slave_ops, + .id_table = rt1316_id, +}; +module_sdw_driver(rt1316_sdw_driver); + +module_description("asoc rt1316 driver sdca sdw"); +module_author("shuming fan <shumingf@realtek.com>"); +module_license("gpl"); diff --git a/sound/soc/codecs/rt1316-sdw.h b/sound/soc/codecs/rt1316-sdw.h --- /dev/null +++ b/sound/soc/codecs/rt1316-sdw.h +/* spdx-license-identifier: gpl-2.0-only */ +/* + * rt1316-sdw.h -- rt1316 sdca alsa soc audio driver header + * + * copyright(c) 2021 realtek semiconductor corp. + */ + +#ifndef __rt1316_sdw_h__ +#define __rt1316_sdw_h__ + +#include <linux/regmap.h> +#include <linux/soundwire/sdw.h> +#include <linux/soundwire/sdw_type.h> +#include <linux/soundwire/sdw_registers.h> +#include <sound/soc.h> + +/* rt1316 sdca control - function number */ +#define func_num_smart_amp 0x04 + +/* rt1316 sdca entity */ +#define rt1316_sdca_ent_pde23 0x31 +#define rt1316_sdca_ent_pde27 0x32 +#define rt1316_sdca_ent_pde22 0x33 +#define rt1316_sdca_ent_pde24 0x34 +#define rt1316_sdca_ent_xu24 0x24 +#define rt1316_sdca_ent_fu21 0x03 +#define rt1316_sdca_ent_udmpu21 0x02 + +/* rt1316 sdca control */ +#define rt1316_sdca_ctl_sample_freq_index 0x10 +#define rt1316_sdca_ctl_req_power_state 0x01 +#define rt1316_sdca_ctl_bypass 0x01 +#define rt1316_sdca_ctl_fu_mute 0x01 +#define rt1316_sdca_ctl_fu_volume 0x02 +#define rt1316_sdca_ctl_udmpu_cluster 0x10 + +/* rt1316 sdca channel */ +#define ch_l 0x01 +#define ch_r 0x02 + +struct rt1316_sdw_priv { + struct snd_soc_component *component; + struct regmap *regmap; + struct sdw_slave *sdw_slave; + enum sdw_slave_status status; + struct sdw_bus_params params; + bool hw_init; + bool first_hw_init; +}; + +struct sdw_stream_data { + struct sdw_stream_runtime *sdw_stream; +}; + +#endif /* __rt1316_sdw_h__ */
|
Audio
|
2b719fd20f327f81270b0ab99159f61da3bbac34
|
shuming fan
|
sound
|
soc
|
codecs
|
asoc: rt5670: add emulated 'dac1 playback switch' control
|
for reliable output-mute led control we need a "dac1 playback switch" control. the "dac playback volume" control is the only control in the path from the dac1 data input to the speaker output, so the ucm profile for the speaker output will have its playbackmixerelem set to "dac1".
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add emulated 'dac1 playback switch' control
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ', 'rt5670']
|
['h', 'c']
| 2
| 97
| 4
|
--- diff --git a/sound/soc/codecs/rt5670.c b/sound/soc/codecs/rt5670.c --- a/sound/soc/codecs/rt5670.c +++ b/sound/soc/codecs/rt5670.c +/* + * for reliable output-mute led control we need a "dac1 playback switch" control. + * we emulate this by only clearing the rt5670_m_dac1_l/_r ad_da_mixer register + * bits when both our emulated dac1 playback switch control and the dac1 mixl/r + * dapm-mixer dac1 input are enabled. + */ +static void rt5670_update_ad_da_mixer_dac1_m_bits(struct rt5670_priv *rt5670) +{ + int val = rt5670_m_dac1_l | rt5670_m_dac1_r; + + if (rt5670->dac1_mixl_dac1_switch && rt5670->dac1_playback_switch_l) + val &= ~rt5670_m_dac1_l; + + if (rt5670->dac1_mixr_dac1_switch && rt5670->dac1_playback_switch_r) + val &= ~rt5670_m_dac1_r; + + regmap_update_bits(rt5670->regmap, rt5670_ad_da_mixer, + rt5670_m_dac1_l | rt5670_m_dac1_r, val); +} + +static int rt5670_dac1_playback_switch_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); + struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); + + ucontrol->value.integer.value[0] = rt5670->dac1_playback_switch_l; + ucontrol->value.integer.value[1] = rt5670->dac1_playback_switch_r; + + return 0; +} + +static int rt5670_dac1_playback_switch_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); + struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); + + if (rt5670->dac1_playback_switch_l == ucontrol->value.integer.value[0] && + rt5670->dac1_playback_switch_r == ucontrol->value.integer.value[1]) + return 0; + + rt5670->dac1_playback_switch_l = ucontrol->value.integer.value[0]; + rt5670->dac1_playback_switch_r = ucontrol->value.integer.value[1]; + + rt5670_update_ad_da_mixer_dac1_m_bits(rt5670); + + return 1; +} + + soc_double_ext("dac1 playback switch", snd_soc_nopm, 0, 1, 1, 0, + rt5670_dac1_playback_switch_get, rt5670_dac1_playback_switch_put), +/* see comment above rt5670_update_ad_da_mixer_dac1_m_bits() */ +static int rt5670_put_dac1_mix_dac1_switch(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct soc_mixer_control *mc = (struct soc_mixer_control *)kcontrol->private_value; + struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol); + struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); + int ret; + + if (mc->shift == 0) + rt5670->dac1_mixl_dac1_switch = ucontrol->value.integer.value[0]; + else + rt5670->dac1_mixr_dac1_switch = ucontrol->value.integer.value[0]; + + /* apply the update (if any) */ + ret = snd_soc_dapm_put_volsw(kcontrol, ucontrol); + if (ret == 0) + return 0; + + rt5670_update_ad_da_mixer_dac1_m_bits(rt5670); + + return 1; +} + +#define soc_dapm_single_rt5670_dac1_sw(name, shift) \ + soc_single_ext(name, snd_soc_nopm, shift, 1, 0, \ + snd_soc_dapm_get_volsw, rt5670_put_dac1_mix_dac1_switch) + - soc_dapm_single("dac1 switch", rt5670_ad_da_mixer, - rt5670_m_dac1_l_sft, 1, 1), + soc_dapm_single_rt5670_dac1_sw("dac1 switch", 0), - soc_dapm_single("dac1 switch", rt5670_ad_da_mixer, - rt5670_m_dac1_r_sft, 1, 1), + soc_dapm_single_rt5670_dac1_sw("dac1 switch", 1), + /* + * enable the emulated "dac1 playback switch" by default to avoid + * muting the output with older ucm profiles. + */ + rt5670->dac1_playback_switch_l = true; + rt5670->dac1_playback_switch_r = true; + /* the power-on-reset values for the dac1 mixer have the dac1 input enabled. */ + rt5670->dac1_mixl_dac1_switch = true; + rt5670->dac1_mixr_dac1_switch = true; + diff --git a/sound/soc/codecs/rt5670.h b/sound/soc/codecs/rt5670.h --- a/sound/soc/codecs/rt5670.h +++ b/sound/soc/codecs/rt5670.h + + bool dac1_mixl_dac1_switch; + bool dac1_mixr_dac1_switch; + bool dac1_playback_switch_l; + bool dac1_playback_switch_r;
|
Audio
|
982042931c255e2e7f196c24f1e5d6de780e04f9
|
hans de goede
|
sound
|
soc
|
codecs
|
asoc: rt711-sdca: add rt711 sdca vendor-specific driver
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this is the initial codec driver for rt711 sdca version.
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this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add rt711 sdca vendor-specific driver
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ', 'rt711-sdca']
|
['h', 'kconfig', 'c', 'makefile']
| 6
| 2,263
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--- diff --git a/sound/soc/codecs/kconfig b/sound/soc/codecs/kconfig --- a/sound/soc/codecs/kconfig +++ b/sound/soc/codecs/kconfig + imply snd_soc_rt711_sdca_sdw +config snd_soc_rt711_sdca_sdw + tristate "realtek rt711 sdca codec - sdw" + depends on soundwire + select regmap_soundwire + select regmap_soundwire_mbq + diff --git a/sound/soc/codecs/makefile b/sound/soc/codecs/makefile --- a/sound/soc/codecs/makefile +++ b/sound/soc/codecs/makefile +snd-soc-rt711-sdca-objs := rt711-sdca.o rt711-sdca-sdw.o +obj-$(config_snd_soc_rt711_sdca_sdw) += snd-soc-rt711-sdca.o diff --git a/sound/soc/codecs/rt711-sdca-sdw.c b/sound/soc/codecs/rt711-sdca-sdw.c --- /dev/null +++ b/sound/soc/codecs/rt711-sdca-sdw.c +// spdx-license-identifier: gpl-2.0-only +// +// rt711-sdw-sdca.c -- rt711 sdca alsa soc audio driver +// +// copyright(c) 2021 realtek semiconductor corp. +// +// + +#include <linux/delay.h> +#include <linux/device.h> +#include <linux/mod_devicetable.h> +#include <linux/soundwire/sdw_registers.h> +#include <linux/module.h> + +#include "rt711-sdca.h" +#include "rt711-sdca-sdw.h" + +static bool rt711_sdca_readable_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case 0x201a ... 0x2027: + case 0x2029 ... 0x202a: + case 0x202d ... 0x2034: + case 0x2200 ... 0x2204: + case 0x2206 ... 0x2212: + case 0x2220 ... 0x2223: + case 0x2230 ... 0x2239: + case 0x2f01 ... 0x2f0f: + case 0x2f30 ... 0x2f36: + case 0x2f50 ... 0x2f5a: + case 0x2f60: + case 0x3200 ... 0x3212: + case sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_ge49, rt711_sdca_ctl_selected_mode, 0): + case sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_ge49, rt711_sdca_ctl_detected_mode, 0): + case sdw_sdca_ctl(func_num_hid, rt711_sdca_ent_hid01, rt711_sdca_ctl_hidtx_current_owner, 0) ... + sdw_sdca_ctl(func_num_hid, rt711_sdca_ent_hid01, rt711_sdca_ctl_hidtx_message_length, 0): + case rt711_buf_addr_hid1 ... rt711_buf_addr_hid2: + return true; + default: + return false; + } +} + +static bool rt711_sdca_volatile_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case 0x201b: + case 0x201c: + case 0x201d: + case 0x201f: + case 0x2021: + case 0x2023: + case 0x2230: + case 0x202d ... 0x202f: /* bra */ + case 0x2200 ... 0x2212: /* i2c debug */ + case rt711_rc_cal_status: + case sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_ge49, rt711_sdca_ctl_detected_mode, 0): + case sdw_sdca_ctl(func_num_hid, rt711_sdca_ent_hid01, rt711_sdca_ctl_hidtx_current_owner, 0) ... + sdw_sdca_ctl(func_num_hid, rt711_sdca_ent_hid01, rt711_sdca_ctl_hidtx_message_length, 0): + case rt711_buf_addr_hid1 ... rt711_buf_addr_hid2: + return true; + default: + return false; + } +} + +static bool rt711_sdca_mbq_readable_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case 0x2000000 ... 0x20000ff: + case 0x5600000 ... 0x56000ff: + case 0x5700000 ... 0x57000ff: + case 0x5800000 ... 0x58000ff: + case 0x5900000 ... 0x59000ff: + case 0x5b00000 ... 0x5b000ff: + case 0x5f00000 ... 0x5f000ff: + case 0x6100000 ... 0x61000ff: + return true; + default: + return false; + } +} + +static bool rt711_sdca_mbq_volatile_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case 0x2000000: + case 0x200001a: + case 0x2000046: + case 0x2000080: + case 0x2000081: + case 0x2000083: + case 0x5800000: + case 0x5800001: + case 0x5f00001: + case 0x6100008: + return true; + default: + return false; + } +} + +static const struct regmap_config rt711_sdca_regmap = { + .reg_bits = 32, + .val_bits = 8, + .readable_reg = rt711_sdca_readable_register, + .volatile_reg = rt711_sdca_volatile_register, + .max_register = 0x44ffffff, + .reg_defaults = rt711_sdca_reg_defaults, + .num_reg_defaults = array_size(rt711_sdca_reg_defaults), + .cache_type = regcache_rbtree, + .use_single_read = true, + .use_single_write = true, +}; + +static const struct regmap_config rt711_sdca_mbq_regmap = { + .name = "sdw-mbq", + .reg_bits = 32, + .val_bits = 16, + .readable_reg = rt711_sdca_mbq_readable_register, + .volatile_reg = rt711_sdca_mbq_volatile_register, + .max_register = 0x40800f12, + .reg_defaults = rt711_sdca_mbq_defaults, + .num_reg_defaults = array_size(rt711_sdca_mbq_defaults), + .cache_type = regcache_rbtree, + .use_single_read = true, + .use_single_write = true, +}; + +static int rt711_sdca_update_status(struct sdw_slave *slave, + enum sdw_slave_status status) +{ + struct rt711_sdca_priv *rt711 = dev_get_drvdata(&slave->dev); + + /* update the status */ + rt711->status = status; + + if (status == sdw_slave_unattached) + rt711->hw_init = false; + + if (status == sdw_slave_attached) { + if (rt711->hs_jack) { + /* + * due to the scp_sdca_intmask will be cleared by any reset, and then + * if the device attached again, we will need to set the setting back. + * it could avoid losing the jack detection interrupt. + * this also could sync with the cache value as the rt711_sdca_jack_init set. + */ + sdw_write_no_pm(rt711->slave, sdw_scp_sdca_intmask1, + sdw_scp_sdca_intmask_sdca_0); + sdw_write_no_pm(rt711->slave, sdw_scp_sdca_intmask2, + sdw_scp_sdca_intmask_sdca_8); + } + } + + /* + * perform initialization only if slave status is present and + * hw_init flag is false + */ + if (rt711->hw_init || rt711->status != sdw_slave_attached) + return 0; + + /* perform i/o transfers required for slave initialization */ + return rt711_sdca_io_init(&slave->dev, slave); +} + +static int rt711_sdca_read_prop(struct sdw_slave *slave) +{ + struct sdw_slave_prop *prop = &slave->prop; + int nval; + int i, j; + u32 bit; + unsigned long addr; + struct sdw_dpn_prop *dpn; + + prop->scp_int1_mask = sdw_scp_int1_bus_clash | sdw_scp_int1_parity; + prop->quirks = sdw_slave_quirks_invalid_initial_parity; + prop->is_sdca = true; + + prop->paging_support = true; + + /* first we need to allocate memory for set bits in port lists */ + prop->source_ports = 0x14; /* bitmap: 00010100 */ + prop->sink_ports = 0x8; /* bitmap: 00001000 */ + + nval = hweight32(prop->source_ports); + prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval, + sizeof(*prop->src_dpn_prop), gfp_kernel); + if (!prop->src_dpn_prop) + return -enomem; + + i = 0; + dpn = prop->src_dpn_prop; + addr = prop->source_ports; + for_each_set_bit(bit, &addr, 32) { + dpn[i].num = bit; + dpn[i].type = sdw_dpn_full; + dpn[i].simple_ch_prep_sm = true; + dpn[i].ch_prep_timeout = 10; + i++; + } + + /* do this again for sink now */ + nval = hweight32(prop->sink_ports); + prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval, + sizeof(*prop->sink_dpn_prop), gfp_kernel); + if (!prop->sink_dpn_prop) + return -enomem; + + j = 0; + dpn = prop->sink_dpn_prop; + addr = prop->sink_ports; + for_each_set_bit(bit, &addr, 32) { + dpn[j].num = bit; + dpn[j].type = sdw_dpn_full; + dpn[j].simple_ch_prep_sm = true; + dpn[j].ch_prep_timeout = 10; + j++; + } + + /* set the timeout values */ + prop->clk_stop_timeout = 20; + + /* wake-up event */ + prop->wake_capable = 1; + + return 0; +} + +static int rt711_sdca_interrupt_callback(struct sdw_slave *slave, + struct sdw_slave_intr_status *status) +{ + struct rt711_sdca_priv *rt711 = dev_get_drvdata(&slave->dev); + int ret, stat; + int count = 0, retry = 3; + unsigned int sdca_cascade, scp_sdca_stat1, scp_sdca_stat2 = 0; + + dev_dbg(&slave->dev, + "%s control_port_stat=%x, sdca_cascade=%x", __func__, + status->control_port, status->sdca_cascade); + + if (cancel_delayed_work_sync(&rt711->jack_detect_work)) { + dev_warn(&slave->dev, "%s the pending delayed_work was cancelled", __func__); + /* avoid the hid owner doesn't change to device */ + if (rt711->scp_sdca_stat2) + scp_sdca_stat2 = rt711->scp_sdca_stat2; + } + + ret = sdw_read_no_pm(rt711->slave, sdw_scp_sdca_int1); + if (ret < 0) + goto io_error; + rt711->scp_sdca_stat1 = ret; + ret = sdw_read_no_pm(rt711->slave, sdw_scp_sdca_int2); + if (ret < 0) + goto io_error; + rt711->scp_sdca_stat2 = ret; + if (scp_sdca_stat2) + rt711->scp_sdca_stat2 |= scp_sdca_stat2; + + do { + /* clear flag */ + ret = sdw_read_no_pm(rt711->slave, sdw_scp_sdca_int1); + if (ret < 0) + goto io_error; + if (ret & sdw_scp_sdca_intmask_sdca_0) { + ret = sdw_write_no_pm(rt711->slave, sdw_scp_sdca_int1, + sdw_scp_sdca_intmask_sdca_0); + if (ret < 0) + goto io_error; + } + ret = sdw_read_no_pm(rt711->slave, sdw_scp_sdca_int2); + if (ret < 0) + goto io_error; + if (ret & sdw_scp_sdca_intmask_sdca_8) { + ret = sdw_write_no_pm(rt711->slave, sdw_scp_sdca_int2, + sdw_scp_sdca_intmask_sdca_8); + if (ret < 0) + goto io_error; + } + + /* check if flag clear or not */ + ret = sdw_read_no_pm(rt711->slave, sdw_dp0_int); + if (ret < 0) + goto io_error; + sdca_cascade = ret & sdw_dp0_sdca_cascade; + + ret = sdw_read_no_pm(rt711->slave, sdw_scp_sdca_int1); + if (ret < 0) + goto io_error; + scp_sdca_stat1 = ret & sdw_scp_sdca_intmask_sdca_0; + + ret = sdw_read_no_pm(rt711->slave, sdw_scp_sdca_int2); + if (ret < 0) + goto io_error; + scp_sdca_stat2 = ret & sdw_scp_sdca_intmask_sdca_8; + + stat = scp_sdca_stat1 || scp_sdca_stat2 || sdca_cascade; + + count++; + } while (stat != 0 && count < retry); + + if (stat) + dev_warn(&slave->dev, + "%s scp_sdca_stat1=0x%x, scp_sdca_stat2=0x%x ", __func__, + rt711->scp_sdca_stat1, rt711->scp_sdca_stat2); + + if (status->sdca_cascade) + mod_delayed_work(system_power_efficient_wq, + &rt711->jack_detect_work, msecs_to_jiffies(30)); + + return 0; + +io_error: + pr_err_ratelimited("io error in %s, ret %d ", __func__, ret); + return ret; +} + +static struct sdw_slave_ops rt711_sdca_slave_ops = { + .read_prop = rt711_sdca_read_prop, + .interrupt_callback = rt711_sdca_interrupt_callback, + .update_status = rt711_sdca_update_status, +}; + +static int rt711_sdca_sdw_probe(struct sdw_slave *slave, + const struct sdw_device_id *id) +{ + struct regmap *regmap, *mbq_regmap; + + /* regmap initialization */ + mbq_regmap = devm_regmap_init_sdw_mbq(slave, &rt711_sdca_mbq_regmap); + if (is_err(mbq_regmap)) + return ptr_err(mbq_regmap); + + regmap = devm_regmap_init_sdw(slave, &rt711_sdca_regmap); + if (is_err(regmap)) + return ptr_err(regmap); + + return rt711_sdca_init(&slave->dev, regmap, mbq_regmap, slave); +} + +static int rt711_sdca_sdw_remove(struct sdw_slave *slave) +{ + struct rt711_sdca_priv *rt711 = dev_get_drvdata(&slave->dev); + + if (rt711 && rt711->hw_init) { + cancel_delayed_work_sync(&rt711->jack_detect_work); + cancel_delayed_work_sync(&rt711->jack_btn_check_work); + } + + return 0; +} + +static const struct sdw_device_id rt711_sdca_id[] = { + sdw_slave_entry_ext(0x025d, 0x711, 0x3, 0x1, 0), + {}, +}; +module_device_table(sdw, rt711_sdca_id); + +static int __maybe_unused rt711_sdca_dev_suspend(struct device *dev) +{ + struct rt711_sdca_priv *rt711 = dev_get_drvdata(dev); + + if (!rt711->hw_init) + return 0; + + cancel_delayed_work_sync(&rt711->jack_detect_work); + cancel_delayed_work_sync(&rt711->jack_btn_check_work); + + regcache_cache_only(rt711->regmap, true); + regcache_cache_only(rt711->mbq_regmap, true); + + return 0; +} + +#define rt711_probe_timeout 5000 + +static int __maybe_unused rt711_sdca_dev_resume(struct device *dev) +{ + struct sdw_slave *slave = dev_to_sdw_dev(dev); + struct rt711_sdca_priv *rt711 = dev_get_drvdata(dev); + unsigned long time; + + if (!rt711->hw_init) + return 0; + + if (!slave->unattach_request) + goto regmap_sync; + + time = wait_for_completion_timeout(&slave->initialization_complete, + msecs_to_jiffies(rt711_probe_timeout)); + if (!time) { + dev_err(&slave->dev, "initialization not complete, timed out "); + return -etimedout; + } + +regmap_sync: + slave->unattach_request = 0; + regcache_cache_only(rt711->regmap, false); + regcache_sync(rt711->regmap); + regcache_cache_only(rt711->mbq_regmap, false); + regcache_sync(rt711->mbq_regmap); + return 0; +} + +static const struct dev_pm_ops rt711_sdca_pm = { + set_system_sleep_pm_ops(rt711_sdca_dev_suspend, rt711_sdca_dev_resume) + set_runtime_pm_ops(rt711_sdca_dev_suspend, rt711_sdca_dev_resume, null) +}; + +static struct sdw_driver rt711_sdca_sdw_driver = { + .driver = { + .name = "rt711-sdca", + .owner = this_module, + .pm = &rt711_sdca_pm, + }, + .probe = rt711_sdca_sdw_probe, + .remove = rt711_sdca_sdw_remove, + .ops = &rt711_sdca_slave_ops, + .id_table = rt711_sdca_id, +}; +module_sdw_driver(rt711_sdca_sdw_driver); + +module_description("asoc rt711 sdca sdw driver"); +module_author("shuming fan <shumingf@realtek.com>"); +module_license("gpl"); diff --git a/sound/soc/codecs/rt711-sdca-sdw.h b/sound/soc/codecs/rt711-sdca-sdw.h --- /dev/null +++ b/sound/soc/codecs/rt711-sdca-sdw.h +/* spdx-license-identifier: gpl-2.0-only */ +/* + * rt711-sdw-sdca.h -- rt711 sdca alsa soc audio driver header + * + * copyright(c) 2021 realtek semiconductor corp. + */ + +#ifndef __rt711_sdw_sdca_h__ +#define __rt711_sdw_sdca_h__ + +#include <linux/regmap.h> +#include <linux/soundwire/sdw_registers.h> + +static const struct reg_default rt711_sdca_reg_defaults[] = { + { 0x201a, 0x00 }, + { 0x201e, 0x00 }, + { 0x201f, 0x00 }, + { 0x2020, 0x00 }, + { 0x2021, 0x00 }, + { 0x2022, 0x00 }, + { 0x2023, 0x00 }, + { 0x2024, 0x00 }, + { 0x2025, 0x01 }, + { 0x2026, 0x00 }, + { 0x2027, 0x00 }, + { 0x2029, 0x00 }, + { 0x202a, 0x00 }, + { 0x202d, 0x00 }, + { 0x202e, 0x00 }, + { 0x202f, 0x00 }, + { 0x2030, 0x00 }, + { 0x2031, 0x00 }, + { 0x2032, 0x00 }, + { 0x2033, 0x00 }, + { 0x2230, 0x00 }, + { 0x2231, 0x2f }, + { 0x2232, 0x80 }, + { 0x2233, 0x00 }, + { 0x2234, 0x00 }, + { 0x2235, 0x00 }, + { 0x2236, 0x00 }, + { 0x2237, 0x00 }, + { 0x2238, 0x00 }, + { 0x2239, 0x00 }, + { 0x2f01, 0x00 }, + { 0x2f02, 0x09 }, + { 0x2f03, 0x00 }, + { 0x2f04, 0x00 }, + { 0x2f05, 0x0b }, + { 0x2f06, 0x01 }, + { 0x2f08, 0x00 }, + { 0x2f09, 0x00 }, + { 0x2f0a, 0x00 }, + { 0x2f0b, 0x00 }, + { 0x2f0c, 0x00 }, + { 0x2f0d, 0x00 }, + { 0x2f0e, 0x14 }, + { 0x2f0f, 0x00 }, + { 0x2f50, 0x03 }, + { 0x2f5a, 0x00 }, + { sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_cs01, rt711_sdca_ctl_sample_freq_index, 0), 0x09 }, + { sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_user_fu05, rt711_sdca_ctl_fu_mute, ch_l), 0x01 }, + { sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_user_fu05, rt711_sdca_ctl_fu_mute, ch_r), 0x01 }, + { sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_user_fu0f, rt711_sdca_ctl_fu_mute, ch_l), 0x01 }, + { sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_user_fu0f, rt711_sdca_ctl_fu_mute, ch_r), 0x01 }, + { sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_pde28, rt711_sdca_ctl_req_power_state, 0), 0x03 }, + { sdw_sdca_ctl(func_num_mic_array, rt711_sdca_ent_user_fu1e, rt711_sdca_ctl_fu_mute, ch_l), 0x01 }, + { sdw_sdca_ctl(func_num_mic_array, rt711_sdca_ent_user_fu1e, rt711_sdca_ctl_fu_mute, ch_r), 0x01 }, +}; + +static const struct reg_default rt711_sdca_mbq_defaults[] = { + { 0x2000009, 0x1029 }, + { 0x2000011, 0x007a }, + { 0x200001a, 0x8003 }, + { 0x2000045, 0x5289 }, + { 0x2000048, 0x8049 }, + { 0x200004a, 0xa83b }, + { 0x200006b, 0x5064 }, + { 0x200006f, 0x058b }, + { 0x5800000, 0x0008 }, + { 0x5800001, 0x0000 }, + { 0x5f00001, 0x000a }, + { 0x6100000, 0x6100 }, + { 0x6100035, 0x0060 }, + { 0x6100036, 0x0029 }, + { 0x610003f, 0xff12 }, + { sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_user_fu05, rt711_sdca_ctl_fu_volume, ch_l), 0x00 }, + { sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_user_fu05, rt711_sdca_ctl_fu_volume, ch_r), 0x00 }, + { sdw_sdca_ctl(func_num_mic_array, rt711_sdca_ent_user_fu1e, rt711_sdca_ctl_fu_volume, ch_l), 0x00 }, + { sdw_sdca_ctl(func_num_mic_array, rt711_sdca_ent_user_fu1e, rt711_sdca_ctl_fu_volume, ch_r), 0x00 }, + { sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_user_fu0f, rt711_sdca_ctl_fu_volume, ch_l), 0x00 }, + { sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_user_fu0f, rt711_sdca_ctl_fu_volume, ch_r), 0x00 }, + { sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_platform_fu44, rt711_sdca_ctl_fu_ch_gain, ch_l), 0x00 }, + { sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_platform_fu44, rt711_sdca_ctl_fu_ch_gain, ch_r), 0x00 }, + { sdw_sdca_ctl(func_num_mic_array, rt711_sdca_ent_platform_fu15, rt711_sdca_ctl_fu_ch_gain, ch_l), 0x00 }, + { sdw_sdca_ctl(func_num_mic_array, rt711_sdca_ent_platform_fu15, rt711_sdca_ctl_fu_ch_gain, ch_r), 0x00 }, +}; + +#endif /* __rt711_sdw_sdca_h__ */ diff --git a/sound/soc/codecs/rt711-sdca.c b/sound/soc/codecs/rt711-sdca.c --- /dev/null +++ b/sound/soc/codecs/rt711-sdca.c +// spdx-license-identifier: gpl-2.0-only +// +// rt711-sdca.c -- rt711 sdca alsa soc audio driver +// +// copyright(c) 2021 realtek semiconductor corp. +// +// + +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/delay.h> +#include <linux/pm_runtime.h> +#include <linux/soundwire/sdw_registers.h> +#include <linux/slab.h> +#include <linux/bitops.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/soc-dapm.h> +#include <sound/initval.h> +#include <sound/tlv.h> +#include <sound/jack.h> + +#include "rt711-sdca.h" + +static int rt711_sdca_index_write(struct rt711_sdca_priv *rt711, + unsigned int nid, unsigned int reg, unsigned int value) +{ + int ret; + struct regmap *regmap = rt711->mbq_regmap; + unsigned int addr = (nid << 20) | reg; + + ret = regmap_write(regmap, addr, value); + if (ret < 0) + dev_err(rt711->component->dev, + "failed to set private value: %06x <= %04x ret=%d ", + addr, value, ret); + + return ret; +} + +static int rt711_sdca_index_read(struct rt711_sdca_priv *rt711, + unsigned int nid, unsigned int reg, unsigned int *value) +{ + int ret; + struct regmap *regmap = rt711->mbq_regmap; + unsigned int addr = (nid << 20) | reg; + + ret = regmap_read(regmap, addr, value); + if (ret < 0) + dev_err(rt711->component->dev, + "failed to get private value: %06x => %04x ret=%d ", + addr, *value, ret); + + return ret; +} + +static int rt711_sdca_index_update_bits(struct rt711_sdca_priv *rt711, + unsigned int nid, unsigned int reg, unsigned int mask, unsigned int val) +{ + unsigned int tmp; + int ret; + + ret = rt711_sdca_index_read(rt711, nid, reg, &tmp); + if (ret < 0) + return ret; + + set_mask_bits(&tmp, mask, val); + return rt711_sdca_index_write(rt711, nid, reg, tmp); +} + +static void rt711_sdca_reset(struct rt711_sdca_priv *rt711) +{ + rt711_sdca_index_update_bits(rt711, rt711_vendor_reg, + rt711_para_verb_ctl, rt711_hidden_reg_sw_reset, + rt711_hidden_reg_sw_reset); + rt711_sdca_index_update_bits(rt711, rt711_vendor_hda_ctl, + rt711_hda_legacy_reset_ctl, 0x1, 0x1); +} + +static int rt711_sdca_calibration(struct rt711_sdca_priv *rt711) +{ + unsigned int val, loop_rc = 0, loop_dc = 0; + struct device *dev; + struct regmap *regmap = rt711->regmap; + int chk_cnt = 100; + int ret = 0; + + mutex_lock(&rt711->calibrate_mutex); + dev = regmap_get_device(regmap); + + regmap_read(rt711->regmap, rt711_rc_cal_status, &val); + /* rc calibration */ + if (!(val & 0x40)) + rt711_sdca_index_update_bits(rt711, rt711_vendor_analog_ctl, + rt711_misc_power_ctl0, 0x0010, 0x0010); + + for (loop_rc = 0; loop_rc < chk_cnt && !(val & 0x40); loop_rc++) { + usleep_range(10000, 11000); + ret = regmap_read(rt711->regmap, rt711_rc_cal_status, &val); + if (ret < 0) + goto _cali_fail_; + } + if (loop_rc == chk_cnt) + dev_err(dev, "%s, rc calibration time-out! ", __func__); + + /* hp calibration by manual mode setting */ + rt711_sdca_index_update_bits(rt711, rt711_vendor_reg, + rt711_fsm_ctl, 0x2000, 0x2000); + + /* calibration manual mode */ + rt711_sdca_index_update_bits(rt711, rt711_vendor_reg, + rt711_fsm_ctl, 0xf, rt711_cali_ctl); + + /* reset hp calibration */ + rt711_sdca_index_update_bits(rt711, rt711_vendor_cali, + rt711_dac_dc_cali_ctl1, rt711_dac_dc_force_cali_rst, 0x00); + rt711_sdca_index_update_bits(rt711, rt711_vendor_cali, + rt711_dac_dc_cali_ctl1, rt711_dac_dc_force_cali_rst, + rt711_dac_dc_force_cali_rst); + + /* cal_clk_en_reg */ + if (rt711->hw_ver == rt711_ver_vd0) + rt711_sdca_index_update_bits(rt711, rt711_vendor_cali, + rt711_dac_dc_cali_ctl1, rt711_dac_dc_cali_clk_en, + rt711_dac_dc_cali_clk_en); + + /* trigger */ + rt711_sdca_index_update_bits(rt711, rt711_vendor_cali, + rt711_dac_dc_cali_ctl1, rt711_dac_dc_cali_trigger, + rt711_dac_dc_cali_trigger); + + /* wait for calibration process */ + rt711_sdca_index_read(rt711, rt711_vendor_cali, + rt711_dac_dc_cali_ctl1, &val); + + for (loop_dc = 0; loop_dc < chk_cnt && + (val & rt711_dac_dc_cali_trigger); loop_dc++) { + usleep_range(10000, 11000); + ret = rt711_sdca_index_read(rt711, rt711_vendor_cali, + rt711_dac_dc_cali_ctl1, &val); + if (ret < 0) + goto _cali_fail_; + } + if (loop_dc == chk_cnt) + dev_err(dev, "%s, calibration time-out! ", __func__); + + if (loop_dc == chk_cnt || loop_rc == chk_cnt) + ret = -etimedout; + +_cali_fail_: + /* enable impedance sense */ + rt711_sdca_index_update_bits(rt711, rt711_vendor_reg, + rt711_fsm_ctl, rt711_fsm_imp_en, rt711_fsm_imp_en); + + /* release hp-jd and trigger fsm */ + rt711_sdca_index_write(rt711, rt711_vendor_reg, + rt711_digital_misc_ctrl4, 0x201b); + + mutex_unlock(&rt711->calibrate_mutex); + dev_dbg(dev, "%s calibration complete, ret=%d ", __func__, ret); + return ret; +} + +static unsigned int rt711_sdca_button_detect(struct rt711_sdca_priv *rt711) +{ + unsigned int btn_type = 0, offset, idx, val, owner; + int ret; + unsigned char buf[3]; + + /* get current ump message owner */ + ret = regmap_read(rt711->regmap, + sdw_sdca_ctl(func_num_hid, rt711_sdca_ent_hid01, rt711_sdca_ctl_hidtx_current_owner, 0), + &owner); + if (ret < 0) + return 0; + + /* if owner is device then there is no button event from device */ + if (owner == 1) + return 0; + + /* read ump message offset */ + ret = regmap_read(rt711->regmap, + sdw_sdca_ctl(func_num_hid, rt711_sdca_ent_hid01, rt711_sdca_ctl_hidtx_message_offset, 0), + &offset); + if (ret < 0) + goto _end_btn_det_; + + for (idx = 0; idx < sizeof(buf); idx++) { + ret = regmap_read(rt711->regmap, + rt711_buf_addr_hid1 + offset + idx, &val); + if (ret < 0) + goto _end_btn_det_; + buf[idx] = val & 0xff; + } + + if (buf[0] == 0x11) { + switch (buf[1] & 0xf0) { + case 0x10: + btn_type |= snd_jack_btn_2; + break; + case 0x20: + btn_type |= snd_jack_btn_3; + break; + case 0x40: + btn_type |= snd_jack_btn_0; + break; + case 0x80: + btn_type |= snd_jack_btn_1; + break; + } + switch (buf[2]) { + case 0x01: + case 0x10: + btn_type |= snd_jack_btn_2; + break; + case 0x02: + case 0x20: + btn_type |= snd_jack_btn_3; + break; + case 0x04: + case 0x40: + btn_type |= snd_jack_btn_0; + break; + case 0x08: + case 0x80: + btn_type |= snd_jack_btn_1; + break; + } + } + +_end_btn_det_: + /* host is owner, so set back to device */ + if (owner == 0) + /* set owner to device */ + regmap_write(rt711->regmap, + sdw_sdca_ctl(func_num_hid, rt711_sdca_ent_hid01, + rt711_sdca_ctl_hidtx_set_owner_to_device, 0), 0x01); + + return btn_type; +} + +static int rt711_sdca_headset_detect(struct rt711_sdca_priv *rt711) +{ + unsigned int det_mode; + int ret; + + /* get detected_mode */ + ret = regmap_read(rt711->regmap, + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_ge49, rt711_sdca_ctl_detected_mode, 0), + &det_mode); + if (ret < 0) + goto io_error; + + switch (det_mode) { + case 0x00: + rt711->jack_type = 0; + break; + case 0x03: + rt711->jack_type = snd_jack_headphone; + break; + case 0x05: + rt711->jack_type = snd_jack_headset; + break; + } + + /* write selected_mode */ + if (det_mode) { + ret = regmap_write(rt711->regmap, + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_ge49, rt711_sdca_ctl_selected_mode, 0), + det_mode); + if (ret < 0) + goto io_error; + } + + dev_dbg(&rt711->slave->dev, + "%s, detected_mode=0x%x ", __func__, det_mode); + + return 0; + +io_error: + pr_err_ratelimited("io error in %s, ret %d ", __func__, ret); + return ret; +} + +static void rt711_sdca_jack_detect_handler(struct work_struct *work) +{ + struct rt711_sdca_priv *rt711 = + container_of(work, struct rt711_sdca_priv, jack_detect_work.work); + int btn_type = 0, ret; + + if (!rt711->hs_jack) + return; + + if (!rt711->component->card->instantiated) + return; + + /* sdw_scp_sdca_int_sdca_0 is used for jack detection */ + if (rt711->scp_sdca_stat1 & sdw_scp_sdca_int_sdca_0) { + ret = rt711_sdca_headset_detect(rt711); + if (ret < 0) + return; + } + + /* sdw_scp_sdca_int_sdca_8 is used for button detection */ + if (rt711->scp_sdca_stat2 & sdw_scp_sdca_int_sdca_8) + btn_type = rt711_sdca_button_detect(rt711); + + if (rt711->jack_type == 0) + btn_type = 0; + + dev_dbg(&rt711->slave->dev, + "in %s, jack_type=0x%x ", __func__, rt711->jack_type); + dev_dbg(&rt711->slave->dev, + "in %s, btn_type=0x%x ", __func__, btn_type); + dev_dbg(&rt711->slave->dev, + "in %s, scp_sdca_stat1=0x%x, scp_sdca_stat2=0x%x ", __func__, + rt711->scp_sdca_stat1, rt711->scp_sdca_stat2); + + snd_soc_jack_report(rt711->hs_jack, rt711->jack_type | btn_type, + snd_jack_headset | + snd_jack_btn_0 | snd_jack_btn_1 | + snd_jack_btn_2 | snd_jack_btn_3); + + if (btn_type) { + /* button released */ + snd_soc_jack_report(rt711->hs_jack, rt711->jack_type, + snd_jack_headset | + snd_jack_btn_0 | snd_jack_btn_1 | + snd_jack_btn_2 | snd_jack_btn_3); + + mod_delayed_work(system_power_efficient_wq, + &rt711->jack_btn_check_work, msecs_to_jiffies(200)); + } +} + +static void rt711_sdca_btn_check_handler(struct work_struct *work) +{ + struct rt711_sdca_priv *rt711 = + container_of(work, struct rt711_sdca_priv, jack_btn_check_work.work); + int btn_type = 0, ret, idx; + unsigned int det_mode, offset, val; + unsigned char buf[3]; + + ret = regmap_read(rt711->regmap, + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_ge49, rt711_sdca_ctl_detected_mode, 0), + &det_mode); + if (ret < 0) + goto io_error; + + /* pin attached */ + if (det_mode) { + /* read ump message offset */ + ret = regmap_read(rt711->regmap, + sdw_sdca_ctl(func_num_hid, rt711_sdca_ent_hid01, rt711_sdca_ctl_hidtx_message_offset, 0), + &offset); + if (ret < 0) + goto io_error; + + for (idx = 0; idx < sizeof(buf); idx++) { + ret = regmap_read(rt711->regmap, + rt711_buf_addr_hid1 + offset + idx, &val); + if (ret < 0) + goto io_error; + buf[idx] = val & 0xff; + } + + if (buf[0] == 0x11) { + switch (buf[1] & 0xf0) { + case 0x10: + btn_type |= snd_jack_btn_2; + break; + case 0x20: + btn_type |= snd_jack_btn_3; + break; + case 0x40: + btn_type |= snd_jack_btn_0; + break; + case 0x80: + btn_type |= snd_jack_btn_1; + break; + } + switch (buf[2]) { + case 0x01: + case 0x10: + btn_type |= snd_jack_btn_2; + break; + case 0x02: + case 0x20: + btn_type |= snd_jack_btn_3; + break; + case 0x04: + case 0x40: + btn_type |= snd_jack_btn_0; + break; + case 0x08: + case 0x80: + btn_type |= snd_jack_btn_1; + break; + } + } + } else + rt711->jack_type = 0; + + dev_dbg(&rt711->slave->dev, "%s, btn_type=0x%x ", __func__, btn_type); + snd_soc_jack_report(rt711->hs_jack, rt711->jack_type | btn_type, + snd_jack_headset | + snd_jack_btn_0 | snd_jack_btn_1 | + snd_jack_btn_2 | snd_jack_btn_3); + + if (btn_type) { + /* button released */ + snd_soc_jack_report(rt711->hs_jack, rt711->jack_type, + snd_jack_headset | + snd_jack_btn_0 | snd_jack_btn_1 | + snd_jack_btn_2 | snd_jack_btn_3); + + mod_delayed_work(system_power_efficient_wq, + &rt711->jack_btn_check_work, msecs_to_jiffies(200)); + } + + return; + +io_error: + pr_err_ratelimited("io error in %s, ret %d ", __func__, ret); +} + +static void rt711_sdca_jack_init(struct rt711_sdca_priv *rt711) +{ + mutex_lock(&rt711->calibrate_mutex); + + if (rt711->hs_jack) { + /* enable hid1 event & set button rtc mode */ + rt711_sdca_index_update_bits(rt711, rt711_vendor_hda_ctl, + rt711_push_btn_int_ctl6, 0x80f0, 0x8000); + rt711_sdca_index_update_bits(rt711, rt711_vendor_hda_ctl, + rt711_push_btn_int_ctl2, 0x11dd, 0x11dd); + rt711_sdca_index_write(rt711, rt711_vendor_hda_ctl, + rt711_push_btn_int_ctl7, 0xffff); + rt711_sdca_index_update_bits(rt711, rt711_vendor_hda_ctl, + rt711_push_btn_int_ctl9, 0xf000, 0x0000); + + /* ge_mode_change_event_en & hid1_push_button_event_en */ + rt711_sdca_index_update_bits(rt711, rt711_vendor_hda_ctl, + rt711_ge_mode_related_ctl, 0x0c00, 0x0c00); + + switch (rt711->jd_src) { + case rt711_jd1: + /* default settings was already for jd1 */ + break; + case rt711_jd2: + rt711_sdca_index_update_bits(rt711, rt711_vendor_reg, + rt711_jd_ctl1, rt711_jd2_digital_mode_sel, + rt711_jd2_digital_mode_sel); + rt711_sdca_index_update_bits(rt711, rt711_vendor_reg, + rt711_jd_ctl2, rt711_jd2_2port_200k_decode_hp | rt711_hp_jd_sel_jd2, + rt711_jd2_2port_200k_decode_hp | rt711_hp_jd_sel_jd2); + rt711_sdca_index_update_bits(rt711, rt711_vendor_reg, + rt711_cc_det1, + rt711_hp_jd_final_result_ctl_jd12, + rt711_hp_jd_final_result_ctl_jd12); + break; + default: + dev_warn(rt711->component->dev, "wrong jd source "); + break; + } + + /* set scp_sdca_intmask1[0]=1 */ + sdw_write_no_pm(rt711->slave, sdw_scp_sdca_intmask1, sdw_scp_sdca_intmask_sdca_0); + /* set scp_sdca_intmask2[0]=1 */ + sdw_write_no_pm(rt711->slave, sdw_scp_sdca_intmask2, sdw_scp_sdca_intmask_sdca_8); + dev_dbg(&rt711->slave->dev, "in %s enable ", __func__); + } else { + /* disable hid 1/2 event */ + rt711_sdca_index_update_bits(rt711, rt711_vendor_hda_ctl, + rt711_ge_mode_related_ctl, 0x0c00, 0x0000); + + dev_dbg(&rt711->slave->dev, "in %s disable ", __func__); + } + + mutex_unlock(&rt711->calibrate_mutex); +} + +static int rt711_sdca_set_jack_detect(struct snd_soc_component *component, + struct snd_soc_jack *hs_jack, void *data) +{ + struct rt711_sdca_priv *rt711 = snd_soc_component_get_drvdata(component); + + rt711->hs_jack = hs_jack; + + if (!rt711->hw_init) { + dev_dbg(&rt711->slave->dev, + "%s hw_init not ready yet ", __func__); + return 0; + } + + rt711_sdca_jack_init(rt711); + return 0; +} + +/* for sdca control dac/adc gain */ +static int rt711_sdca_set_gain_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); + struct soc_mixer_control *mc = + (struct soc_mixer_control *)kcontrol->private_value; + struct rt711_sdca_priv *rt711 = snd_soc_component_get_drvdata(component); + unsigned int read_l, read_r, gain_l_val, gain_r_val; + unsigned int i, adc_vol_flag = 0; + + if (strstr(ucontrol->id.name, "fu1e capture volume") || + strstr(ucontrol->id.name, "fu0f capture volume")) + adc_vol_flag = 1; + + /* control value to 2's complement value */ + /* l channel */ + gain_l_val = ucontrol->value.integer.value[0]; + if (gain_l_val > mc->max) + gain_l_val = mc->max; + read_l = gain_l_val; + + if (mc->shift == 8) /* boost gain */ + gain_l_val = (gain_l_val * 10) << mc->shift; + else { /* adc/dac gain */ + if (adc_vol_flag && gain_l_val > mc->shift) + gain_l_val = (gain_l_val - mc->shift) * 75; + else + gain_l_val = (mc->shift - gain_l_val) * 75; + gain_l_val <<= 8; + gain_l_val /= 100; + if (!(adc_vol_flag && read_l > mc->shift)) { + gain_l_val = ~gain_l_val; + gain_l_val += 1; + } + gain_l_val &= 0xffff; + } + + /* r channel */ + gain_r_val = ucontrol->value.integer.value[1]; + if (gain_r_val > mc->max) + gain_r_val = mc->max; + read_r = gain_r_val; + + if (mc->shift == 8) /* boost gain */ + gain_r_val = (gain_r_val * 10) << mc->shift; + else { /* adc/dac gain */ + if (adc_vol_flag && gain_r_val > mc->shift) + gain_r_val = (gain_r_val - mc->shift) * 75; + else + gain_r_val = (mc->shift - gain_r_val) * 75; + gain_r_val <<= 8; + gain_r_val /= 100; + if (!(adc_vol_flag && read_r > mc->shift)) { + gain_r_val = ~gain_r_val; + gain_r_val += 1; + } + gain_r_val &= 0xffff; + } + + for (i = 0; i < 3; i++) { /* retry 3 times at most */ + /* lch*/ + regmap_write(rt711->mbq_regmap, mc->reg, gain_l_val); + + /* rch */ + regmap_write(rt711->mbq_regmap, mc->rreg, gain_r_val); + + regmap_read(rt711->mbq_regmap, mc->reg, &read_l); + regmap_read(rt711->mbq_regmap, mc->rreg, &read_r); + if (read_r == gain_r_val && read_l == gain_l_val) + break; + } + + return i == 3 ? -eio : 0; +} + +static int rt711_sdca_set_gain_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); + struct rt711_sdca_priv *rt711 = snd_soc_component_get_drvdata(component); + struct soc_mixer_control *mc = + (struct soc_mixer_control *)kcontrol->private_value; + unsigned int read_l, read_r, ctl_l = 0, ctl_r = 0; + unsigned int adc_vol_flag = 0, neg_flag = 0; + + if (strstr(ucontrol->id.name, "fu1e capture volume") || + strstr(ucontrol->id.name, "fu0f capture volume")) + adc_vol_flag = 1; + + regmap_read(rt711->mbq_regmap, mc->reg, &read_l); + regmap_read(rt711->mbq_regmap, mc->rreg, &read_r); + + /* 2's complement value to control value */ + if (mc->shift == 8) /* boost gain */ + ctl_l = (read_l >> mc->shift) / 10; + else { /* adc/dac gain */ + ctl_l = read_l; + if (read_l & bit(15)) { + ctl_l = 0xffff & ~(read_l - 1); + neg_flag = 1; + } + ctl_l *= 100; + ctl_l >>= 8; + if (adc_vol_flag) { + if (neg_flag) + ctl_l = mc->shift - (ctl_l / 75); + else + ctl_l = mc->shift + (ctl_l / 75); + } else + ctl_l = mc->max - (ctl_l / 75); + } + + neg_flag = 0; + if (read_l != read_r) { + if (mc->shift == 8) /* boost gain */ + ctl_r = (read_r >> mc->shift) / 10; + else { /* adc/dac gain */ + ctl_r = read_r; + if (read_r & bit(15)) { + ctl_r = 0xffff & ~(read_r - 1); + neg_flag = 1; + } + ctl_r *= 100; + ctl_r >>= 8; + if (adc_vol_flag) { + if (neg_flag) + ctl_r = mc->shift - (ctl_r / 75); + else + ctl_r = mc->shift + (ctl_r / 75); + } else + ctl_r = mc->max - (ctl_r / 75); + } + } else + ctl_r = ctl_l; + + ucontrol->value.integer.value[0] = ctl_l; + ucontrol->value.integer.value[1] = ctl_r; + + return 0; +} + +static const declare_tlv_db_scale(out_vol_tlv, -6525, 75, 0); +static const declare_tlv_db_scale(in_vol_tlv, -1725, 75, 0); +static const declare_tlv_db_scale(mic_vol_tlv, 0, 1000, 0); + +static const struct snd_kcontrol_new rt711_sdca_snd_controls[] = { + soc_double_r_ext_tlv("fu05 playback volume", + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_user_fu05, rt711_sdca_ctl_fu_volume, ch_l), + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_user_fu05, rt711_sdca_ctl_fu_volume, ch_r), + 0x57, 0x57, 0, + rt711_sdca_set_gain_get, rt711_sdca_set_gain_put, out_vol_tlv), + soc_double_r("fu1e capture switch", + sdw_sdca_ctl(func_num_mic_array, rt711_sdca_ent_user_fu1e, rt711_sdca_ctl_fu_mute, ch_l), + sdw_sdca_ctl(func_num_mic_array, rt711_sdca_ent_user_fu1e, rt711_sdca_ctl_fu_mute, ch_r), + 0, 1, 1), + soc_double_r("fu0f capture switch", + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_user_fu0f, rt711_sdca_ctl_fu_mute, ch_l), + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_user_fu0f, rt711_sdca_ctl_fu_mute, ch_r), + 0, 1, 1), + soc_double_r_ext_tlv("fu1e capture volume", + sdw_sdca_ctl(func_num_mic_array, rt711_sdca_ent_user_fu1e, rt711_sdca_ctl_fu_volume, ch_l), + sdw_sdca_ctl(func_num_mic_array, rt711_sdca_ent_user_fu1e, rt711_sdca_ctl_fu_volume, ch_r), + 0x17, 0x3f, 0, + rt711_sdca_set_gain_get, rt711_sdca_set_gain_put, in_vol_tlv), + soc_double_r_ext_tlv("fu0f capture volume", + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_user_fu0f, rt711_sdca_ctl_fu_volume, ch_l), + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_user_fu0f, rt711_sdca_ctl_fu_volume, ch_r), + 0x17, 0x3f, 0, + rt711_sdca_set_gain_get, rt711_sdca_set_gain_put, in_vol_tlv), + soc_double_r_ext_tlv("fu44 gain volume", + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_platform_fu44, rt711_sdca_ctl_fu_ch_gain, ch_l), + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_platform_fu44, rt711_sdca_ctl_fu_ch_gain, ch_r), + 8, 3, 0, + rt711_sdca_set_gain_get, rt711_sdca_set_gain_put, mic_vol_tlv), + soc_double_r_ext_tlv("fu15 gain volume", + sdw_sdca_ctl(func_num_mic_array, rt711_sdca_ent_platform_fu15, rt711_sdca_ctl_fu_ch_gain, ch_l), + sdw_sdca_ctl(func_num_mic_array, rt711_sdca_ent_platform_fu15, rt711_sdca_ctl_fu_ch_gain, ch_r), + 8, 3, 0, + rt711_sdca_set_gain_get, rt711_sdca_set_gain_put, mic_vol_tlv), +}; + +static int rt711_sdca_mux_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_dapm_kcontrol_component(kcontrol); + struct rt711_sdca_priv *rt711 = snd_soc_component_get_drvdata(component); + unsigned int val = 0, mask_sft; + + if (strstr(ucontrol->id.name, "adc 22 mux")) + mask_sft = 10; + else if (strstr(ucontrol->id.name, "adc 23 mux")) + mask_sft = 13; + else + return -einval; + + rt711_sdca_index_read(rt711, rt711_vendor_hda_ctl, + rt711_hda_legacy_mux_ctl1, &val); + + ucontrol->value.enumerated.item[0] = (val >> mask_sft) & 0x7; + + return 0; +} + +static int rt711_sdca_mux_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_dapm_kcontrol_component(kcontrol); + struct snd_soc_dapm_context *dapm = + snd_soc_dapm_kcontrol_dapm(kcontrol); + struct rt711_sdca_priv *rt711 = snd_soc_component_get_drvdata(component); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + unsigned int *item = ucontrol->value.enumerated.item; + unsigned int val, val2 = 0, change, mask_sft; + + if (item[0] >= e->items) + return -einval; + + if (strstr(ucontrol->id.name, "adc 22 mux")) + mask_sft = 10; + else if (strstr(ucontrol->id.name, "adc 23 mux")) + mask_sft = 13; + else + return -einval; + + val = snd_soc_enum_item_to_val(e, item[0]) << e->shift_l; + + rt711_sdca_index_read(rt711, rt711_vendor_hda_ctl, + rt711_hda_legacy_mux_ctl1, &val2); + val2 = (val2 >> mask_sft) & 0x7; + + if (val == val2) + change = 0; + else + change = 1; + + if (change) + rt711_sdca_index_update_bits(rt711, rt711_vendor_hda_ctl, + rt711_hda_legacy_mux_ctl1, 0x7 << mask_sft, + val << mask_sft); + + snd_soc_dapm_mux_update_power(dapm, kcontrol, + item[0], e, null); + + return change; +} + +static const char * const adc_mux_text[] = { + "mic2", + "line1", + "line2", + "dmic", +}; + +static soc_enum_single_decl( + rt711_adc22_enum, snd_soc_nopm, 0, adc_mux_text); + +static soc_enum_single_decl( + rt711_adc23_enum, snd_soc_nopm, 0, adc_mux_text); + +static const struct snd_kcontrol_new rt711_sdca_adc22_mux = + soc_dapm_enum_ext("adc 22 mux", rt711_adc22_enum, + rt711_sdca_mux_get, rt711_sdca_mux_put); + +static const struct snd_kcontrol_new rt711_sdca_adc23_mux = + soc_dapm_enum_ext("adc 23 mux", rt711_adc23_enum, + rt711_sdca_mux_get, rt711_sdca_mux_put); + +static int rt711_sdca_fu05_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_component *component = + snd_soc_dapm_to_component(w->dapm); + struct rt711_sdca_priv *rt711 = snd_soc_component_get_drvdata(component); + unsigned char unmute = 0x0, mute = 0x1; + + switch (event) { + case snd_soc_dapm_post_pmu: + regmap_write(rt711->regmap, + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_user_fu05, + rt711_sdca_ctl_fu_mute, ch_l), + unmute); + regmap_write(rt711->regmap, + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_user_fu05, + rt711_sdca_ctl_fu_mute, ch_r), + unmute); + break; + case snd_soc_dapm_pre_pmd: + regmap_write(rt711->regmap, + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_user_fu05, + rt711_sdca_ctl_fu_mute, ch_l), + mute); + regmap_write(rt711->regmap, + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_user_fu05, + rt711_sdca_ctl_fu_mute, ch_r), + mute); + break; + } + return 0; +} + +static int rt711_sdca_fu0f_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_component *component = + snd_soc_dapm_to_component(w->dapm); + struct rt711_sdca_priv *rt711 = snd_soc_component_get_drvdata(component); + unsigned char unmute = 0x0, mute = 0x1; + + switch (event) { + case snd_soc_dapm_post_pmu: + regmap_write(rt711->regmap, + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_user_fu0f, + rt711_sdca_ctl_fu_mute, ch_l), + unmute); + regmap_write(rt711->regmap, + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_user_fu0f, + rt711_sdca_ctl_fu_mute, ch_r), + unmute); + break; + case snd_soc_dapm_pre_pmd: + regmap_write(rt711->regmap, + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_user_fu0f, + rt711_sdca_ctl_fu_mute, ch_l), + mute); + regmap_write(rt711->regmap, + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_user_fu0f, + rt711_sdca_ctl_fu_mute, ch_r), + mute); + break; + } + return 0; +} + +static int rt711_sdca_fu1e_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_component *component = + snd_soc_dapm_to_component(w->dapm); + struct rt711_sdca_priv *rt711 = snd_soc_component_get_drvdata(component); + unsigned char unmute = 0x0, mute = 0x1; + + switch (event) { + case snd_soc_dapm_post_pmu: + regmap_write(rt711->regmap, + sdw_sdca_ctl(func_num_mic_array, rt711_sdca_ent_user_fu1e, + rt711_sdca_ctl_fu_mute, ch_l), + unmute); + regmap_write(rt711->regmap, + sdw_sdca_ctl(func_num_mic_array, rt711_sdca_ent_user_fu1e, + rt711_sdca_ctl_fu_mute, ch_r), + unmute); + break; + case snd_soc_dapm_pre_pmd: + regmap_write(rt711->regmap, + sdw_sdca_ctl(func_num_mic_array, rt711_sdca_ent_user_fu1e, + rt711_sdca_ctl_fu_mute, ch_l), + mute); + regmap_write(rt711->regmap, + sdw_sdca_ctl(func_num_mic_array, rt711_sdca_ent_user_fu1e, + rt711_sdca_ctl_fu_mute, ch_r), + mute); + break; + } + return 0; +} + +static int rt711_sdca_pde28_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_component *component = + snd_soc_dapm_to_component(w->dapm); + struct rt711_sdca_priv *rt711 = snd_soc_component_get_drvdata(component); + unsigned char ps0 = 0x0, ps3 = 0x3; + + switch (event) { + case snd_soc_dapm_post_pmu: + regmap_write(rt711->regmap, + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_pde28, + rt711_sdca_ctl_req_power_state, 0), + ps0); + break; + case snd_soc_dapm_pre_pmd: + regmap_write(rt711->regmap, + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_pde28, + rt711_sdca_ctl_req_power_state, 0), + ps3); + break; + } + return 0; +} + +static int rt711_sdca_pde29_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_component *component = + snd_soc_dapm_to_component(w->dapm); + struct rt711_sdca_priv *rt711 = snd_soc_component_get_drvdata(component); + unsigned char ps0 = 0x0, ps3 = 0x3; + + switch (event) { + case snd_soc_dapm_post_pmu: + regmap_write(rt711->regmap, + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_pde29, + rt711_sdca_ctl_req_power_state, 0), + ps0); + break; + case snd_soc_dapm_pre_pmd: + regmap_write(rt711->regmap, + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_pde29, + rt711_sdca_ctl_req_power_state, 0), + ps3); + break; + } + return 0; +} + +static int rt711_sdca_pde2a_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_component *component = + snd_soc_dapm_to_component(w->dapm); + struct rt711_sdca_priv *rt711 = snd_soc_component_get_drvdata(component); + unsigned char ps0 = 0x0, ps3 = 0x3; + + switch (event) { + case snd_soc_dapm_post_pmu: + regmap_write(rt711->regmap, + sdw_sdca_ctl(func_num_mic_array, rt711_sdca_ent_pde2a, + rt711_sdca_ctl_req_power_state, 0), + ps0); + break; + case snd_soc_dapm_pre_pmd: + regmap_write(rt711->regmap, + sdw_sdca_ctl(func_num_mic_array, rt711_sdca_ent_pde2a, + rt711_sdca_ctl_req_power_state, 0), + ps3); + break; + } + return 0; +} + +static int rt711_sdca_line1_power_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_component *component = + snd_soc_dapm_to_component(w->dapm); + struct rt711_sdca_priv *rt711 = snd_soc_component_get_drvdata(component); + static unsigned int sel_mode = 0xffff; + + switch (event) { + case snd_soc_dapm_post_pmu: + regmap_read(rt711->regmap, + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_ge49, + rt711_sdca_ctl_selected_mode, 0), + &sel_mode); + regmap_write(rt711->regmap, + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_line1, + rt711_sdca_ctl_vendor_def, 0), + 0x1); + regmap_write(rt711->regmap, + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_ge49, + rt711_sdca_ctl_selected_mode, 0), + 0x7); + break; + case snd_soc_dapm_pre_pmd: + regmap_write(rt711->regmap, + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_line1, + rt711_sdca_ctl_vendor_def, 0), + 0x0); + if (sel_mode != 0xffff) + regmap_write(rt711->regmap, + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_ge49, + rt711_sdca_ctl_selected_mode, 0), + sel_mode); + break; + } + + return 0; +} + +static int rt711_sdca_line2_power_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_component *component = + snd_soc_dapm_to_component(w->dapm); + struct rt711_sdca_priv *rt711 = snd_soc_component_get_drvdata(component); + unsigned char ps0 = 0x0, ps3 = 0x3; + + switch (event) { + case snd_soc_dapm_post_pmu: + regmap_write(rt711->regmap, + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_pdeline2, + rt711_sdca_ctl_req_power_state, 0), + ps0); + regmap_write(rt711->regmap, + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_line2, + rt711_sdca_ctl_vendor_def, 0), + 0x1); + break; + case snd_soc_dapm_pre_pmd: + regmap_write(rt711->regmap, + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_line2, + rt711_sdca_ctl_vendor_def, 0), + 0x0); + regmap_write(rt711->regmap, + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_pdeline2, + rt711_sdca_ctl_req_power_state, 0), + ps3); + break; + } + + return 0; +} + +static const struct snd_soc_dapm_widget rt711_sdca_dapm_widgets[] = { + snd_soc_dapm_output("hp"), + snd_soc_dapm_input("mic2"), + snd_soc_dapm_input("dmic1"), + snd_soc_dapm_input("dmic2"), + snd_soc_dapm_input("line1"), + snd_soc_dapm_input("line2"), + + snd_soc_dapm_pga_e("line1 power", snd_soc_nopm, + 0, 0, null, 0, rt711_sdca_line1_power_event, + snd_soc_dapm_post_pmu | snd_soc_dapm_pre_pmd), + snd_soc_dapm_pga_e("line2 power", snd_soc_nopm, + 0, 0, null, 0, rt711_sdca_line2_power_event, + snd_soc_dapm_post_pmu | snd_soc_dapm_pre_pmd), + + snd_soc_dapm_supply("pde 28", snd_soc_nopm, 0, 0, + rt711_sdca_pde28_event, + snd_soc_dapm_post_pmu | snd_soc_dapm_pre_pmd), + snd_soc_dapm_supply("pde 29", snd_soc_nopm, 0, 0, + rt711_sdca_pde29_event, + snd_soc_dapm_post_pmu | snd_soc_dapm_pre_pmd), + snd_soc_dapm_supply("pde 2a", snd_soc_nopm, 0, 0, + rt711_sdca_pde2a_event, + snd_soc_dapm_post_pmu | snd_soc_dapm_pre_pmd), + + snd_soc_dapm_dac_e("fu 05", null, snd_soc_nopm, 0, 0, + rt711_sdca_fu05_event, + snd_soc_dapm_post_pmu | snd_soc_dapm_pre_pmd), + snd_soc_dapm_adc_e("fu 0f", null, snd_soc_nopm, 0, 0, + rt711_sdca_fu0f_event, + snd_soc_dapm_post_pmu | snd_soc_dapm_pre_pmd), + snd_soc_dapm_adc_e("fu 1e", null, snd_soc_nopm, 0, 0, + rt711_sdca_fu1e_event, + snd_soc_dapm_post_pmu | snd_soc_dapm_pre_pmd), + snd_soc_dapm_mux("adc 22 mux", snd_soc_nopm, 0, 0, + &rt711_sdca_adc22_mux), + snd_soc_dapm_mux("adc 23 mux", snd_soc_nopm, 0, 0, + &rt711_sdca_adc23_mux), + + snd_soc_dapm_aif_in("dp3rx", "dp3 playback", 0, snd_soc_nopm, 0, 0), + snd_soc_dapm_aif_out("dp2tx", "dp2 capture", 0, snd_soc_nopm, 0, 0), + snd_soc_dapm_aif_out("dp4tx", "dp4 capture", 0, snd_soc_nopm, 0, 0), +}; + +static const struct snd_soc_dapm_route rt711_sdca_audio_map[] = { + {"fu 05", null, "dp3rx"}, + {"dp2tx", null, "fu 0f"}, + {"dp4tx", null, "fu 1e"}, + + {"line1 power", null, "line1"}, + {"line2 power", null, "line2"}, + {"hp", null, "pde 28"}, + {"fu 0f", null, "pde 29"}, + {"fu 1e", null, "pde 2a"}, + + {"fu 0f", null, "adc 22 mux"}, + {"fu 1e", null, "adc 23 mux"}, + {"adc 22 mux", "dmic", "dmic1"}, + {"adc 22 mux", "line1", "line1 power"}, + {"adc 22 mux", "line2", "line2 power"}, + {"adc 22 mux", "mic2", "mic2"}, + {"adc 23 mux", "dmic", "dmic2"}, + {"adc 23 mux", "line1", "line1 power"}, + {"adc 23 mux", "line2", "line2 power"}, + {"adc 23 mux", "mic2", "mic2"}, + + {"hp", null, "fu 05"}, +}; + +static int rt711_sdca_parse_dt(struct rt711_sdca_priv *rt711, struct device *dev) +{ + device_property_read_u32(dev, "realtek,jd-src", &rt711->jd_src); + + return 0; +} + +static int rt711_sdca_probe(struct snd_soc_component *component) +{ + struct rt711_sdca_priv *rt711 = snd_soc_component_get_drvdata(component); + + rt711_sdca_parse_dt(rt711, &rt711->slave->dev); + rt711->component = component; + + return 0; +} + +static void rt711_sdca_remove(struct snd_soc_component *component) +{ + struct rt711_sdca_priv *rt711 = snd_soc_component_get_drvdata(component); + + regcache_cache_only(rt711->regmap, true); + regcache_cache_only(rt711->mbq_regmap, true); +} + +static const struct snd_soc_component_driver soc_sdca_dev_rt711 = { + .probe = rt711_sdca_probe, + .controls = rt711_sdca_snd_controls, + .num_controls = array_size(rt711_sdca_snd_controls), + .dapm_widgets = rt711_sdca_dapm_widgets, + .num_dapm_widgets = array_size(rt711_sdca_dapm_widgets), + .dapm_routes = rt711_sdca_audio_map, + .num_dapm_routes = array_size(rt711_sdca_audio_map), + .set_jack = rt711_sdca_set_jack_detect, + .remove = rt711_sdca_remove, +}; + +static int rt711_sdca_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream, + int direction) +{ + struct sdw_stream_data *stream; + + if (!sdw_stream) + return 0; + + stream = kzalloc(sizeof(*stream), gfp_kernel); + if (!stream) + return -enomem; + + stream->sdw_stream = sdw_stream; + + /* use tx_mask or rx_mask to configure stream tag and set dma_data */ + if (direction == sndrv_pcm_stream_playback) + dai->playback_dma_data = stream; + else + dai->capture_dma_data = stream; + + return 0; +} + +static void rt711_sdca_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct sdw_stream_data *stream; + + stream = snd_soc_dai_get_dma_data(dai, substream); + snd_soc_dai_set_dma_data(dai, substream, null); + kfree(stream); +} + +static int rt711_sdca_pcm_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct snd_soc_component *component = dai->component; + struct rt711_sdca_priv *rt711 = snd_soc_component_get_drvdata(component); + struct sdw_stream_config stream_config; + struct sdw_port_config port_config; + enum sdw_data_direction direction; + struct sdw_stream_data *stream; + int retval, port, num_channels; + unsigned int sampling_rate; + + dev_dbg(dai->dev, "%s %s", __func__, dai->name); + stream = snd_soc_dai_get_dma_data(dai, substream); + + if (!stream) + return -einval; + + if (!rt711->slave) + return -einval; + + /* soundwire specific configuration */ + if (substream->stream == sndrv_pcm_stream_playback) { + direction = sdw_data_dir_rx; + port = 3; + } else { + direction = sdw_data_dir_tx; + if (dai->id == rt711_aif1) + port = 2; + else if (dai->id == rt711_aif2) + port = 4; + else + return -einval; + } + + stream_config.frame_rate = params_rate(params); + stream_config.ch_count = params_channels(params); + stream_config.bps = snd_pcm_format_width(params_format(params)); + stream_config.direction = direction; + + num_channels = params_channels(params); + port_config.ch_mask = genmask(num_channels - 1, 0); + port_config.num = port; + + retval = sdw_stream_add_slave(rt711->slave, &stream_config, + &port_config, 1, stream->sdw_stream); + if (retval) { + dev_err(dai->dev, "unable to configure port "); + return retval; + } + + if (params_channels(params) > 16) { + dev_err(component->dev, "unsupported channels %d ", + params_channels(params)); + return -einval; + } + + /* sampling rate configuration */ + switch (params_rate(params)) { + case 44100: + sampling_rate = rt711_sdca_rate_44100hz; + break; + case 48000: + sampling_rate = rt711_sdca_rate_48000hz; + break; + case 96000: + sampling_rate = rt711_sdca_rate_96000hz; + break; + case 192000: + sampling_rate = rt711_sdca_rate_192000hz; + break; + default: + dev_err(component->dev, "rate %d is not supported ", + params_rate(params)); + return -einval; + } + + /* set sampling frequency */ + regmap_write(rt711->regmap, + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_cs01, rt711_sdca_ctl_sample_freq_index, 0), + sampling_rate); + regmap_write(rt711->regmap, + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_cs11, rt711_sdca_ctl_sample_freq_index, 0), + sampling_rate); + regmap_write(rt711->regmap, + sdw_sdca_ctl(func_num_mic_array, rt711_sdca_ent_cs1f, rt711_sdca_ctl_sample_freq_index, 0), + sampling_rate); + + return 0; +} + +static int rt711_sdca_pcm_hw_free(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_component *component = dai->component; + struct rt711_sdca_priv *rt711 = snd_soc_component_get_drvdata(component); + struct sdw_stream_data *stream = + snd_soc_dai_get_dma_data(dai, substream); + + if (!rt711->slave) + return -einval; + + sdw_stream_remove_slave(rt711->slave, stream->sdw_stream); + return 0; +} + +#define rt711_stereo_rates (sndrv_pcm_rate_44100 | sndrv_pcm_rate_48000 | sndrv_pcm_rate_96000 | \ + sndrv_pcm_rate_192000) +#define rt711_formats (sndrv_pcm_fmtbit_s16_le | sndrv_pcm_fmtbit_s20_3le | \ + sndrv_pcm_fmtbit_s24_le) + +static struct snd_soc_dai_ops rt711_sdca_ops = { + .hw_params = rt711_sdca_pcm_hw_params, + .hw_free = rt711_sdca_pcm_hw_free, + .set_sdw_stream = rt711_sdca_set_sdw_stream, + .shutdown = rt711_sdca_shutdown, +}; + +static struct snd_soc_dai_driver rt711_sdca_dai[] = { + { + .name = "rt711-sdca-aif1", + .id = rt711_aif1, + .playback = { + .stream_name = "dp3 playback", + .channels_min = 1, + .channels_max = 2, + .rates = rt711_stereo_rates, + .formats = rt711_formats, + }, + .capture = { + .stream_name = "dp2 capture", + .channels_min = 1, + .channels_max = 2, + .rates = rt711_stereo_rates, + .formats = rt711_formats, + }, + .ops = &rt711_sdca_ops, + }, + { + .name = "rt711-sdca-aif2", + .id = rt711_aif2, + .capture = { + .stream_name = "dp4 capture", + .channels_min = 1, + .channels_max = 2, + .rates = rt711_stereo_rates, + .formats = rt711_formats, + }, + .ops = &rt711_sdca_ops, + } +}; + +int rt711_sdca_init(struct device *dev, struct regmap *regmap, + struct regmap *mbq_regmap, struct sdw_slave *slave) +{ + struct rt711_sdca_priv *rt711; + int ret; + + rt711 = devm_kzalloc(dev, sizeof(*rt711), gfp_kernel); + if (!rt711) + return -enomem; + + dev_set_drvdata(dev, rt711); + rt711->slave = slave; + rt711->regmap = regmap; + rt711->mbq_regmap = mbq_regmap; + + /* + * mark hw_init to false + * hw init will be performed when device reports present + */ + rt711->hw_init = false; + rt711->first_hw_init = false; + + /* jd source uses jd2 in default */ + rt711->jd_src = rt711_jd2; + + ret = devm_snd_soc_register_component(dev, + &soc_sdca_dev_rt711, + rt711_sdca_dai, + array_size(rt711_sdca_dai)); + + dev_dbg(&slave->dev, "%s ", __func__); + + return ret; +} + +static void rt711_sdca_vd0_io_init(struct rt711_sdca_priv *rt711) +{ + rt711_sdca_index_write(rt711, rt711_vendor_reg, + rt711_gpio_test_mode_ctl2, 0x0e00); + rt711_sdca_index_write(rt711, rt711_vendor_hda_ctl, + rt711_hda_legacy_gpio_ctl, 0x0008); + + regmap_write(rt711->regmap, 0x2f5a, 0x01); + + rt711_sdca_index_write(rt711, rt711_vendor_reg, + rt711_adc27_vol_set, 0x8728); + + rt711_sdca_index_write(rt711, rt711_vendor_reg, + rt711_combo_jack_auto_ctl3, 0xa472); + + regmap_write(rt711->regmap, 0x2f50, 0x02); + + rt711_sdca_index_update_bits(rt711, rt711_vendor_analog_ctl, + rt711_misc_power_ctl4, 0x6000, 0x6000); + + rt711_sdca_index_update_bits(rt711, rt711_vendor_reg, + rt711_combo_jack_auto_ctl3, 0x000c, 0x000c); + + rt711_sdca_index_write(rt711, rt711_vendor_hda_ctl, + rt711_hda_legacy_config_ctl, 0x0000); + + rt711_sdca_index_write(rt711, rt711_vendor_vad, + rt711_vad_sram_ctl1, 0x0050); +} + +static void rt711_sdca_vd1_io_init(struct rt711_sdca_priv *rt711) +{ + rt711_sdca_index_update_bits(rt711, rt711_vendor_hda_ctl, + rt711_hda_legacy_unsolicited_ctl, 0x0300, 0x0000); + + rt711_sdca_index_write(rt711, rt711_vendor_reg, + rt711_combo_jack_auto_ctl3, 0xa43e); + + regmap_write(rt711->regmap, 0x2f5a, 0x05); + + rt711_sdca_index_write(rt711, rt711_vendor_reg, + rt711_jd_ctrl6, 0x0500); + + rt711_sdca_index_write(rt711, rt711_vendor_reg, + rt711_dmic_ctl1, 0x6173); + + rt711_sdca_index_write(rt711, rt711_vendor_hda_ctl, + rt711_hda_legacy_config_ctl, 0x0000); + + rt711_sdca_index_write(rt711, rt711_vendor_vad, + rt711_vad_sram_ctl1, 0x0050); +} + +int rt711_sdca_io_init(struct device *dev, struct sdw_slave *slave) +{ + struct rt711_sdca_priv *rt711 = dev_get_drvdata(dev); + int ret = 0; + unsigned int val; + + if (rt711->hw_init) + return 0; + + if (rt711->first_hw_init) { + regcache_cache_only(rt711->regmap, false); + regcache_cache_bypass(rt711->regmap, true); + } else { + /* + * pm runtime is only enabled when a slave reports as attached + */ + + /* set autosuspend parameters */ + pm_runtime_set_autosuspend_delay(&slave->dev, 3000); + pm_runtime_use_autosuspend(&slave->dev); + + /* update count of parent 'active' children */ + pm_runtime_set_active(&slave->dev); + + /* make sure the device does not suspend immediately */ + pm_runtime_mark_last_busy(&slave->dev); + + pm_runtime_enable(&slave->dev); + } + + pm_runtime_get_noresume(&slave->dev); + + rt711_sdca_reset(rt711); + + rt711_sdca_index_read(rt711, rt711_vendor_reg, rt711_jd_product_num, &val); + rt711->hw_ver = val & 0xf; + + if (rt711->hw_ver == rt711_ver_vd0) + rt711_sdca_vd0_io_init(rt711); + else + rt711_sdca_vd1_io_init(rt711); + + /* dp4 mux select from 08_filter_out_pri */ + rt711_sdca_index_update_bits(rt711, rt711_vendor_reg, + rt711_filter_src_sel, 0x1800, 0x0800); + + /* ge_exclusive_inbox_en disable */ + rt711_sdca_index_update_bits(rt711, rt711_vendor_hda_ctl, + rt711_push_btn_int_ctl0, 0x20, 0x00); + + if (!rt711->first_hw_init) { + init_delayed_work(&rt711->jack_detect_work, + rt711_sdca_jack_detect_handler); + init_delayed_work(&rt711->jack_btn_check_work, + rt711_sdca_btn_check_handler); + mutex_init(&rt711->calibrate_mutex); + } + + /* calibration */ + ret = rt711_sdca_calibration(rt711); + if (ret < 0) + dev_err(dev, "%s, calibration failed! ", __func__); + + /* hp output enable */ + regmap_write(rt711->regmap, + sdw_sdca_ctl(func_num_jack_codec, rt711_sdca_ent_ot1, rt711_sdca_ctl_vendor_def, 0), 0x4); + + /* + * if set_jack callback occurred early than io_init, + * we set up the jack detection function now + */ + if (rt711->hs_jack) + rt711_sdca_jack_init(rt711); + + if (rt711->first_hw_init) { + regcache_cache_bypass(rt711->regmap, false); + regcache_mark_dirty(rt711->regmap); + } else + rt711->first_hw_init = true; + + /* mark slave initialization complete */ + rt711->hw_init = true; + + pm_runtime_mark_last_busy(&slave->dev); + pm_runtime_put_autosuspend(&slave->dev); + + dev_dbg(&slave->dev, "%s hw_init complete ", __func__); + return 0; +} + +module_description("asoc rt711 sdca sdw driver"); +module_author("shuming fan <shumingf@realtek.com>"); +module_license("gpl"); diff --git a/sound/soc/codecs/rt711-sdca.h b/sound/soc/codecs/rt711-sdca.h --- /dev/null +++ b/sound/soc/codecs/rt711-sdca.h +/* spdx-license-identifier: gpl-2.0-only */ +/* + * rt711-sdca.h -- rt711 sdca alsa soc audio driver header + * + * copyright(c) 2021 realtek semiconductor corp. + */ + +#ifndef __rt711_sdca_h__ +#define __rt711_sdca_h__ + +#include <linux/pm.h> +#include <linux/regmap.h> +#include <linux/soundwire/sdw.h> +#include <linux/soundwire/sdw_type.h> +#include <sound/soc.h> +#include <linux/workqueue.h> + +struct rt711_sdca_priv { + struct regmap *regmap, *mbq_regmap; + struct snd_soc_component *component; + struct sdw_slave *slave; + enum sdw_slave_status status; + struct sdw_bus_params params; + bool hw_init; + bool first_hw_init; + struct snd_soc_jack *hs_jack; + struct delayed_work jack_detect_work; + struct delayed_work jack_btn_check_work; + struct mutex calibrate_mutex; /* for headset calibration */ + int jack_type, jd_src; + unsigned int scp_sdca_stat1, scp_sdca_stat2; + int hw_ver; +}; + +struct sdw_stream_data { + struct sdw_stream_runtime *sdw_stream; +}; + +/* nid */ +#define rt711_audio_function_group 0x01 +#define rt711_dac_out2 0x03 +#define rt711_adc_in1 0x09 +#define rt711_adc_in2 0x08 +#define rt711_dmic1 0x12 +#define rt711_dmic2 0x13 +#define rt711_mic2 0x19 +#define rt711_line1 0x1a +#define rt711_line2 0x1b +#define rt711_beep 0x1d +#define rt711_vendor_reg 0x20 +#define rt711_hp_out 0x21 +#define rt711_mixer_in1 0x22 +#define rt711_mixer_in2 0x23 +#define rt711_inline_cmd 0x55 +#define rt711_vendor_cali 0x58 +#define rt711_vendor_ims_dre 0x5b +#define rt711_vendor_vad 0x5e +#define rt711_vendor_analog_ctl 0x5f +#define rt711_vendor_hda_ctl 0x61 + +/* index (nid:20h) */ +#define rt711_jd_product_num 0x00 +#define rt711_dmic_ctl1 0x06 +#define rt711_jd_ctl1 0x08 +#define rt711_jd_ctl2 0x09 +#define rt711_cc_det1 0x11 +#define rt711_para_verb_ctl 0x1a +#define rt711_combo_jack_auto_ctl1 0x45 +#define rt711_combo_jack_auto_ctl2 0x46 +#define rt711_combo_jack_auto_ctl3 0x47 +#define rt711_inline_cmd_ctl 0x48 +#define rt711_digital_misc_ctrl4 0x4a +#define rt711_jd_ctrl6 0x6a +#define rt711_vrefout_ctl 0x6b +#define rt711_gpio_test_mode_ctl2 0x6d +#define rt711_fsm_ctl 0x6f +#define rt711_irq_flag_table1 0x80 +#define rt711_irq_flag_table2 0x81 +#define rt711_irq_flag_table3 0x82 +#define rt711_hp_fsm_ctl 0x83 +#define rt711_tx_rx_mux_ctl 0x91 +#define rt711_filter_src_sel 0xb0 +#define rt711_adc27_vol_set 0xb7 + +/* index (nid:58h) */ +#define rt711_dac_dc_cali_ctl1 0x00 +#define rt711_dac_dc_cali_ctl2 0x01 + +/* index (nid:5bh) */ +#define rt711_ims_digital_ctl1 0x00 +#define rt711_hp_ims_result_l 0x20 +#define rt711_hp_ims_result_r 0x21 + +/* index (nid:5eh) */ +#define rt711_vad_sram_ctl1 0x10 + +/* index (nid:5fh) */ +#define rt711_misc_power_ctl0 0x01 +#define rt711_misc_power_ctl4 0x05 + +/* index (nid:61h) */ +#define rt711_hda_legacy_mux_ctl1 0x00 +#define rt711_hda_legacy_unsolicited_ctl 0x03 +#define rt711_hda_legacy_config_ctl 0x06 +#define rt711_hda_legacy_reset_ctl 0x08 +#define rt711_hda_legacy_gpio_ctl 0x0a +#define rt711_adc08_09_pde_ctl 0x24 +#define rt711_ge_mode_related_ctl 0x35 +#define rt711_push_btn_int_ctl0 0x36 +#define rt711_push_btn_int_ctl1 0x37 +#define rt711_push_btn_int_ctl2 0x38 +#define rt711_push_btn_int_ctl6 0x3c +#define rt711_push_btn_int_ctl7 0x3d +#define rt711_push_btn_int_ctl9 0x3f + +/* dac dc offset calibration control-1 (0x00)(nid:20h) */ +#define rt711_dac_dc_cali_trigger (0x1 << 15) +#define rt711_dac_dc_cali_clk_en (0x1 << 14) +#define rt711_dac_dc_force_cali_rst (0x1 << 3) + +/* jack detect control 1 (0x08)(nid:20h) */ +#define rt711_jd2_digital_mode_sel (0x1 << 1) + +/* jack detect control 2 (0x09)(nid:20h) */ +#define rt711_jd2_2port_200k_decode_hp (0x1 << 13) +#define rt711_hp_jd_sel_jd1 (0x0 << 1) +#define rt711_hp_jd_sel_jd2 (0x1 << 1) + +/* cc det1 (0x11)(nid:20h) */ +#define rt711_hp_jd_final_result_ctl_jd12 (0x1 << 10) +#define rt711_hp_jd_final_result_ctl_ccdet (0x0 << 10) + +/* parameter & verb control (0x1a)(nid:20h) */ +#define rt711_hidden_reg_sw_reset (0x1 << 14) + +/* combo jack auto switch control 2 (0x46)(nid:20h) */ +#define rt711_combojack_auto_det_status (0x1 << 11) +#define rt711_combojack_auto_det_trs (0x1 << 10) +#define rt711_combojack_auto_det_ctia (0x1 << 9) +#define rt711_combojack_auto_det_omtp (0x1 << 8) + +/* fsm control (0x6f)(nid:20h) */ +#define rt711_cali_ctl (0x0 << 0) +#define rt711_combojack_ctl (0x1 << 0) +#define rt711_ims_ctl (0x2 << 0) +#define rt711_depop_ctl (0x3 << 0) +#define rt711_fsm_imp_en (0x1 << 6) + +/* impedance sense digital control 1 (0x00)(nid:5bh) */ +#define rt711_trigger_ims (0x1 << 15) +#define rt711_ims_en (0x1 << 6) + +#define rt711_eapd_high 0x2 +#define rt711_eapd_low 0x0 +#define rt711_mute_sft 7 +/* set input/output mapping to payload[14][15] separately */ +#define rt711_dir_in_sft 6 +#define rt711_dir_out_sft 7 + +/* rc calibration register */ +#define rt711_rc_cal_status 0x320c + +/* buffer address for hid */ +#define rt711_buf_addr_hid1 0x44030000 +#define rt711_buf_addr_hid2 0x44030020 + +/* rt711 sdca control - function number */ +#define func_num_jack_codec 0x01 +#define func_num_mic_array 0x02 +#define func_num_hid 0x03 + +/* rt711 sdca entity */ +#define rt711_sdca_ent_hid01 0x01 +#define rt711_sdca_ent_ge49 0x49 +#define rt711_sdca_ent_user_fu05 0x05 +#define rt711_sdca_ent_user_fu0f 0x0f +#define rt711_sdca_ent_user_fu1e 0x1e +#define rt711_sdca_ent_platform_fu15 0x15 +#define rt711_sdca_ent_platform_fu44 0x44 +#define rt711_sdca_ent_pde28 0x28 +#define rt711_sdca_ent_pde29 0x29 +#define rt711_sdca_ent_pde2a 0x2a +#define rt711_sdca_ent_cs01 0x01 +#define rt711_sdca_ent_cs11 0x11 +#define rt711_sdca_ent_cs1f 0x1f +#define rt711_sdca_ent_ot1 0x06 +#define rt711_sdca_ent_line1 0x09 +#define rt711_sdca_ent_line2 0x31 +#define rt711_sdca_ent_pdeline2 0x36 +#define rt711_sdca_ent_user_fu9 0x41 + +/* rt711 sdca control */ +#define rt711_sdca_ctl_sample_freq_index 0x10 +#define rt711_sdca_ctl_fu_ch_gain 0x0b +#define rt711_sdca_ctl_fu_mute 0x01 +#define rt711_sdca_ctl_fu_volume 0x02 +#define rt711_sdca_ctl_hidtx_current_owner 0x10 +#define rt711_sdca_ctl_hidtx_set_owner_to_device 0x11 +#define rt711_sdca_ctl_hidtx_message_offset 0x12 +#define rt711_sdca_ctl_hidtx_message_length 0x13 +#define rt711_sdca_ctl_selected_mode 0x01 +#define rt711_sdca_ctl_detected_mode 0x02 +#define rt711_sdca_ctl_req_power_state 0x01 +#define rt711_sdca_ctl_vendor_def 0x30 + +/* rt711 sdca channel */ +#define ch_l 0x01 +#define ch_r 0x02 + +/* sample frequency index */ +#define rt711_sdca_rate_44100hz 0x08 +#define rt711_sdca_rate_48000hz 0x09 +#define rt711_sdca_rate_96000hz 0x0b +#define rt711_sdca_rate_192000hz 0x0d + +enum { + rt711_aif1, + rt711_aif2, + rt711_aifs, +}; + +enum rt711_sdca_jd_src { + rt711_jd_null, + rt711_jd1, + rt711_jd2 +}; + +enum rt711_sdca_ver { + rt711_ver_vd0, + rt711_ver_vd1 +}; + +int rt711_sdca_io_init(struct device *dev, struct sdw_slave *slave); +int rt711_sdca_init(struct device *dev, struct regmap *regmap, + struct regmap *mbq_regmap, struct sdw_slave *slave); + +int rt711_sdca_jack_detect(struct rt711_sdca_priv *rt711, bool *hp, bool *mic); +#endif /* __rt711_sdca_h__ */
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Audio
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7ad4d237e7c4a5dcc71cf438f646744b4484f1da
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shuming fan
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sound
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soc
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codecs
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asoc: rt715-sdca: add rt715 sdca vendor-specific driver
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this is initial sdca version of codec driver for rt715.
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this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
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add rt715 sdca vendor-specific driver
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['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
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['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
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['asoc ', 'rt715-sdca']
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['h', 'kconfig', 'c', 'makefile']
| 6
| 1,669
| 0
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--- diff --git a/sound/soc/codecs/kconfig b/sound/soc/codecs/kconfig --- a/sound/soc/codecs/kconfig +++ b/sound/soc/codecs/kconfig + imply snd_soc_rt715_sdca_sdw +config snd_soc_rt715_sdca_sdw + tristate "realtek rt715 sdca codec - sdw" + depends on soundwire + select regmap_soundwire + select regmap_soundwire_mbq + diff --git a/sound/soc/codecs/makefile b/sound/soc/codecs/makefile --- a/sound/soc/codecs/makefile +++ b/sound/soc/codecs/makefile +snd-soc-rt715-sdca-objs := rt715-sdca.o rt715-sdca-sdw.o +obj-$(config_snd_soc_rt715_sdca_sdw) += snd-soc-rt715-sdca.o diff --git a/sound/soc/codecs/rt715-sdca-sdw.c b/sound/soc/codecs/rt715-sdca-sdw.c --- /dev/null +++ b/sound/soc/codecs/rt715-sdca-sdw.c +// spdx-license-identifier: gpl-2.0-only +// +// rt715-sdca-sdw.c -- rt715 alsa soc audio driver +// +// copyright(c) 2020 realtek semiconductor corp. +// +// + +#include <linux/delay.h> +#include <linux/device.h> +#include <linux/mod_devicetable.h> +#include <linux/soundwire/sdw.h> +#include <linux/soundwire/sdw_type.h> +#include <linux/soundwire/sdw_registers.h> +#include <linux/module.h> +#include <linux/regmap.h> +#include <sound/soc.h> +#include "rt715-sdca.h" +#include "rt715-sdca-sdw.h" + +static bool rt715_sdca_readable_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case 0x201a ... 0x2027: + case 0x2029 ... 0x202a: + case 0x202d ... 0x2034: + case 0x2200 ... 0x2204: + case 0x2206 ... 0x2212: + case 0x2230 ... 0x2239: + case 0x2f5b: + case sdw_sdca_ctl(fun_mic_array, rt715_sdca_smpu_trig_st_en, + rt715_sdca_smpu_trig_st_ctrl, ch_00): + return true; + default: + return false; + } +} + +static bool rt715_sdca_volatile_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case 0x201b: + case 0x201c: + case 0x201d: + case 0x201f: + case 0x2021: + case 0x2023: + case 0x2230: + case 0x202d ... 0x202f: /* bra */ + case 0x2200 ... 0x2212: /* i2c debug */ + case 0x2f07: + case 0x2f1b ... 0x2f1e: + case 0x2f30 ... 0x2f34: + case 0x2f50 ... 0x2f51: + case 0x2f53 ... 0x2f59: + case 0x2f5c ... 0x2f5f: + case sdw_sdca_ctl(fun_mic_array, rt715_sdca_smpu_trig_st_en, + rt715_sdca_smpu_trig_st_ctrl, ch_00): /* vad searching status */ + return true; + default: + return false; + } +} + +static bool rt715_sdca_mbq_readable_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case 0x2000000: + case 0x200002b: + case 0x2000036: + case 0x2000037: + case 0x2000039: + case 0x6100000: + return true; + default: + return false; + } +} + +static bool rt715_sdca_mbq_volatile_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case 0x2000000: + return true; + default: + return false; + } +} + +static const struct regmap_config rt715_sdca_regmap = { + .reg_bits = 32, + .val_bits = 8, + .readable_reg = rt715_sdca_readable_register, + .volatile_reg = rt715_sdca_volatile_register, + .max_register = 0x43ffffff, + .reg_defaults = rt715_reg_defaults_sdca, + .num_reg_defaults = array_size(rt715_reg_defaults_sdca), + .cache_type = regcache_rbtree, + .use_single_read = true, + .use_single_write = true, +}; + +static const struct regmap_config rt715_sdca_mbq_regmap = { + .name = "sdw-mbq", + .reg_bits = 32, + .val_bits = 16, + .readable_reg = rt715_sdca_mbq_readable_register, + .volatile_reg = rt715_sdca_mbq_volatile_register, + .max_register = 0x43ffffff, + .reg_defaults = rt715_mbq_reg_defaults_sdca, + .num_reg_defaults = array_size(rt715_mbq_reg_defaults_sdca), + .cache_type = regcache_rbtree, + .use_single_read = true, + .use_single_write = true, +}; + +static int rt715_sdca_update_status(struct sdw_slave *slave, + enum sdw_slave_status status) +{ + struct rt715_sdca_priv *rt715 = dev_get_drvdata(&slave->dev); + + /* update the status */ + rt715->status = status; + + /* + * perform initialization only if slave status is present and + * hw_init flag is false + */ + if (rt715->hw_init || rt715->status != sdw_slave_attached) + return 0; + + /* perform i/o transfers required for slave initialization */ + return rt715_sdca_io_init(&slave->dev, slave); +} + +static int rt715_sdca_read_prop(struct sdw_slave *slave) +{ + struct sdw_slave_prop *prop = &slave->prop; + int nval, i; + u32 bit; + unsigned long addr; + struct sdw_dpn_prop *dpn; + + prop->paging_support = true; + + /* first we need to allocate memory for set bits in port lists */ + prop->source_ports = 0x50;/* bitmap: 01010000 */ + prop->sink_ports = 0x0; /* bitmap: 00000000 */ + + nval = hweight32(prop->source_ports); + prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval, + sizeof(*prop->src_dpn_prop), + gfp_kernel); + if (!prop->src_dpn_prop) + return -enomem; + + dpn = prop->src_dpn_prop; + i = 0; + addr = prop->source_ports; + for_each_set_bit(bit, &addr, 32) { + dpn[i].num = bit; + dpn[i].simple_ch_prep_sm = true; + dpn[i].ch_prep_timeout = 10; + i++; + } + + /* set the timeout values */ + prop->clk_stop_timeout = 20; + + return 0; +} + +static struct sdw_slave_ops rt715_sdca_slave_ops = { + .read_prop = rt715_sdca_read_prop, + .update_status = rt715_sdca_update_status, +}; + +static int rt715_sdca_sdw_probe(struct sdw_slave *slave, + const struct sdw_device_id *id) +{ + struct regmap *mbq_regmap, *regmap; + + slave->ops = &rt715_sdca_slave_ops; + + /* regmap initialization */ + mbq_regmap = devm_regmap_init_sdw_mbq(slave, &rt715_sdca_mbq_regmap); + if (!mbq_regmap) + return -einval; + + regmap = devm_regmap_init_sdw(slave, &rt715_sdca_regmap); + if (!regmap) + return -einval; + + return rt715_sdca_init(&slave->dev, mbq_regmap, regmap, slave); +} + +static const struct sdw_device_id rt715_sdca_id[] = { + sdw_slave_entry_ext(0x025d, 0x715, 0x3, 0x1, 0), + sdw_slave_entry_ext(0x025d, 0x714, 0x3, 0x1, 0), + {}, +}; +module_device_table(sdw, rt715_sdca_id); + +static int __maybe_unused rt715_dev_suspend(struct device *dev) +{ + struct rt715_sdca_priv *rt715 = dev_get_drvdata(dev); + + if (!rt715->hw_init) + return 0; + + regcache_cache_only(rt715->regmap, true); + regcache_mark_dirty(rt715->regmap); + regcache_cache_only(rt715->mbq_regmap, true); + regcache_mark_dirty(rt715->mbq_regmap); + + return 0; +} + +#define rt715_probe_timeout 5000 + +static int __maybe_unused rt715_dev_resume(struct device *dev) +{ + struct sdw_slave *slave = dev_to_sdw_dev(dev); + struct rt715_sdca_priv *rt715 = dev_get_drvdata(dev); + unsigned long time; + + if (!rt715->hw_init) + return 0; + + if (!slave->unattach_request) + goto regmap_sync; + + time = wait_for_completion_timeout(&slave->enumeration_complete, + msecs_to_jiffies(rt715_probe_timeout)); + if (!time) { + dev_err(&slave->dev, "enumeration not complete, timed out "); + return -etimedout; + } + +regmap_sync: + slave->unattach_request = 0; + regcache_cache_only(rt715->regmap, false); + regcache_sync_region(rt715->regmap, + sdw_sdca_ctl(fun_jack_codec, rt715_sdca_st_en, rt715_sdca_st_ctrl, + ch_00), + sdw_sdca_ctl(fun_mic_array, rt715_sdca_smpu_trig_st_en, + rt715_sdca_smpu_trig_st_ctrl, ch_00)); + regcache_cache_only(rt715->mbq_regmap, false); + regcache_sync_region(rt715->mbq_regmap, 0x2000000, 0x61020ff); + regcache_sync_region(rt715->mbq_regmap, + sdw_sdca_ctl(fun_jack_codec, rt715_sdca_st_en, rt715_sdca_st_ctrl, + ch_00), + sdw_sdca_ctl(fun_mic_array, rt715_sdca_smpu_trig_st_en, + rt715_sdca_smpu_trig_st_ctrl, ch_00)); + + return 0; +} + +static const struct dev_pm_ops rt715_pm = { + set_system_sleep_pm_ops(rt715_dev_suspend, rt715_dev_resume) + set_runtime_pm_ops(rt715_dev_suspend, rt715_dev_resume, null) +}; + +static struct sdw_driver rt715_sdw_driver = { + .driver = { + .name = "rt715-sdca", + .owner = this_module, + .pm = &rt715_pm, + }, + .probe = rt715_sdca_sdw_probe, + .ops = &rt715_sdca_slave_ops, + .id_table = rt715_sdca_id, +}; +module_sdw_driver(rt715_sdw_driver); + +module_description("asoc rt715 driver sdw sdca"); +module_author("jack yu <jack.yu@realtek.com>"); +module_license("gpl v2"); diff --git a/sound/soc/codecs/rt715-sdca-sdw.h b/sound/soc/codecs/rt715-sdca-sdw.h --- /dev/null +++ b/sound/soc/codecs/rt715-sdca-sdw.h +/* spdx-license-identifier: gpl-2.0-only */ +/* + * rt715-sdca-sdw.h -- rt715 alsa soc audio driver header + * + * copyright(c) 2020 realtek semiconductor corp. + */ + +#ifndef __rt715_sdw_sdca_h__ +#define __rt715_sdw_sdca_h__ + +#include <linux/soundwire/sdw_registers.h> + +static const struct reg_default rt715_reg_defaults_sdca[] = { + { 0x201a, 0x00 }, + { 0x201e, 0x00 }, + { 0x2020, 0x00 }, + { 0x2021, 0x00 }, + { 0x2022, 0x00 }, + { 0x2023, 0x00 }, + { 0x2024, 0x00 }, + { 0x2025, 0x01 }, + { 0x2026, 0x00 }, + { 0x2027, 0x00 }, + { 0x2029, 0x00 }, + { 0x202a, 0x00 }, + { 0x202d, 0x00 }, + { 0x202e, 0x00 }, + { 0x202f, 0x00 }, + { 0x2030, 0x00 }, + { 0x2031, 0x00 }, + { 0x2032, 0x00 }, + { 0x2033, 0x00 }, + { 0x2034, 0x00 }, + { 0x2230, 0x00 }, + { 0x2231, 0x2f }, + { 0x2232, 0x80 }, + { 0x2233, 0x00 }, + { 0x2234, 0x00 }, + { 0x2235, 0x00 }, + { 0x2236, 0x00 }, + { 0x2237, 0x00 }, + { 0x2238, 0x00 }, + { 0x2239, 0x00 }, + { 0x2f01, 0x00 }, + { 0x2f02, 0x09 }, + { 0x2f03, 0x0b }, + { 0x2f04, 0x00 }, + { 0x2f05, 0x0e }, + { 0x2f06, 0x01 }, + { 0x2f08, 0x00 }, + { 0x2f09, 0x00 }, + { 0x2f0a, 0x00 }, + { 0x2f0b, 0x00 }, + { 0x2f0c, 0x00 }, + { 0x2f0d, 0x00 }, + { 0x2f0e, 0x12 }, + { 0x2f0f, 0x00 }, + { 0x2f10, 0x00 }, + { 0x2f11, 0x00 }, + { 0x2f12, 0x00 }, + { 0x2f13, 0x00 }, + { 0x2f14, 0x00 }, + { 0x2f15, 0x00 }, + { 0x2f16, 0x00 }, + { 0x2f17, 0x00 }, + { 0x2f18, 0x00 }, + { 0x2f19, 0x03 }, + { 0x2f1a, 0x00 }, + { 0x2f1f, 0x10 }, + { 0x2f20, 0x00 }, + { 0x2f21, 0x00 }, + { 0x2f22, 0x00 }, + { 0x2f23, 0x00 }, + { 0x2f24, 0x00 }, + { 0x2f25, 0x00 }, + { 0x2f52, 0x01 }, + { 0x2f5a, 0x02 }, + { 0x2f5b, 0x05 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_cx_clk_sel_en, + rt715_sdca_cx_clk_sel_ctrl, ch_00), 0x1 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_adc8_9_vol, + rt715_sdca_fu_mute_ctrl, ch_01), 0x01 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_adc8_9_vol, + rt715_sdca_fu_mute_ctrl, ch_02), 0x01 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_adc8_9_vol, + rt715_sdca_fu_mute_ctrl, ch_03), 0x01 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_adc8_9_vol, + rt715_sdca_fu_mute_ctrl, ch_04), 0x01 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_adc10_11_vol, + rt715_sdca_fu_mute_ctrl, ch_01), 0x01 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_adc10_11_vol, + rt715_sdca_fu_mute_ctrl, ch_02), 0x01 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_adc10_11_vol, + rt715_sdca_fu_mute_ctrl, ch_03), 0x01 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_adc10_11_vol, + rt715_sdca_fu_mute_ctrl, ch_04), 0x01 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_adc7_27_vol, + rt715_sdca_fu_mute_ctrl, ch_01), 0x01 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_adc7_27_vol, + rt715_sdca_fu_mute_ctrl, ch_02), 0x01 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_smpu_trig_st_en, + rt715_sdca_smpu_trig_en_ctrl, ch_00), 0x02 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_smpu_trig_st_en, + rt715_sdca_smpu_trig_st_ctrl, ch_00), 0x00 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_adc7_27_vol, + rt715_sdca_fu_mute_ctrl, ch_01), 0x01 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_adc7_27_vol, + rt715_sdca_fu_mute_ctrl, ch_02), 0x01 }, +}; + +static const struct reg_default rt715_mbq_reg_defaults_sdca[] = { + { 0x200002b, 0x0420 }, + { 0x2000036, 0x0000 }, + { 0x2000037, 0x0000 }, + { 0x2000039, 0xaa81 }, + { 0x6100000, 0x0100 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_adc8_9_vol, + rt715_sdca_fu_vol_ctrl, ch_01), 0x00 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_adc8_9_vol, + rt715_sdca_fu_vol_ctrl, ch_02), 0x00 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_adc8_9_vol, + rt715_sdca_fu_vol_ctrl, ch_03), 0x00 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_adc8_9_vol, + rt715_sdca_fu_vol_ctrl, ch_04), 0x00 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_adc10_11_vol, + rt715_sdca_fu_vol_ctrl, ch_01), 0x00 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_adc10_11_vol, + rt715_sdca_fu_vol_ctrl, ch_02), 0x00 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_adc10_11_vol, + rt715_sdca_fu_vol_ctrl, ch_03), 0x00 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_adc10_11_vol, + rt715_sdca_fu_vol_ctrl, ch_04), 0x00 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_adc7_27_vol, + rt715_sdca_fu_vol_ctrl, ch_01), 0x00 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_adc7_27_vol, + rt715_sdca_fu_vol_ctrl, ch_02), 0x00 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_amic_gain_en, + rt715_sdca_fu_dmic_gain_ctrl, ch_01), 0x00 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_amic_gain_en, + rt715_sdca_fu_dmic_gain_ctrl, ch_02), 0x00 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_amic_gain_en, + rt715_sdca_fu_dmic_gain_ctrl, ch_03), 0x00 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_amic_gain_en, + rt715_sdca_fu_dmic_gain_ctrl, ch_04), 0x00 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_amic_gain_en, + rt715_sdca_fu_dmic_gain_ctrl, ch_05), 0x00 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_amic_gain_en, + rt715_sdca_fu_dmic_gain_ctrl, ch_06), 0x00 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_amic_gain_en, + rt715_sdca_fu_dmic_gain_ctrl, ch_07), 0x00 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_amic_gain_en, + rt715_sdca_fu_dmic_gain_ctrl, ch_08), 0x00 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_dmic_gain_en, + rt715_sdca_fu_dmic_gain_ctrl, ch_01), 0x00 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_dmic_gain_en, + rt715_sdca_fu_dmic_gain_ctrl, ch_02), 0x00 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_dmic_gain_en, + rt715_sdca_fu_dmic_gain_ctrl, ch_03), 0x00 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_dmic_gain_en, + rt715_sdca_fu_dmic_gain_ctrl, ch_04), 0x00 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_dmic_gain_en, + rt715_sdca_fu_dmic_gain_ctrl, ch_05), 0x00 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_dmic_gain_en, + rt715_sdca_fu_dmic_gain_ctrl, ch_06), 0x00 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_dmic_gain_en, + rt715_sdca_fu_dmic_gain_ctrl, ch_07), 0x00 }, + { sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_dmic_gain_en, + rt715_sdca_fu_dmic_gain_ctrl, ch_08), 0x00 }, +}; +#endif /* __rt715_sdw_sdca_h__ */ diff --git a/sound/soc/codecs/rt715-sdca.c b/sound/soc/codecs/rt715-sdca.c --- /dev/null +++ b/sound/soc/codecs/rt715-sdca.c +// spdx-license-identifier: gpl-2.0-only +// +// rt715-sdca.c -- rt715 alsa soc audio driver +// +// copyright(c) 2020 realtek semiconductor corp. +// +// +// + +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/version.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/pm_runtime.h> +#include <linux/pm.h> +#include <linux/soundwire/sdw.h> +#include <linux/regmap.h> +#include <linux/slab.h> +#include <linux/platform_device.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> +#include <sound/soc-dapm.h> +#include <sound/initval.h> +#include <sound/tlv.h> +#include <linux/soundwire/sdw_registers.h> + +#include "rt715-sdca.h" + +static int rt715_sdca_index_write(struct rt715_sdca_priv *rt715, + unsigned int nid, unsigned int reg, unsigned int value) +{ + struct regmap *regmap = rt715->mbq_regmap; + unsigned int addr; + int ret; + + addr = (nid << 20) | reg; + + ret = regmap_write(regmap, addr, value); + if (ret < 0) + dev_err(&rt715->slave->dev, + "failed to set private value: %08x <= %04x %d ", ret, addr, + value); + + return ret; +} + +static int rt715_sdca_index_read(struct rt715_sdca_priv *rt715, + unsigned int nid, unsigned int reg, unsigned int *value) +{ + struct regmap *regmap = rt715->mbq_regmap; + unsigned int addr; + int ret; + + addr = (nid << 20) | reg; + + ret = regmap_read(regmap, addr, value); + if (ret < 0) + dev_err(&rt715->slave->dev, + "failed to get private value: %06x => %04x ret=%d ", + addr, *value, ret); + + return ret; +} + +static int rt715_sdca_index_update_bits(struct rt715_sdca_priv *rt715, + unsigned int nid, unsigned int reg, unsigned int mask, unsigned int val) +{ + unsigned int tmp; + int ret; + + ret = rt715_sdca_index_read(rt715, nid, reg, &tmp); + if (ret < 0) + return ret; + + set_mask_bits(&tmp, mask, val); + + return rt715_sdca_index_write(rt715, nid, reg, tmp); +} + +static inline unsigned int rt715_sdca_vol_gain(unsigned int u_ctrl_val, + unsigned int vol_max, unsigned int vol_gain_sft) +{ + unsigned int val; + + if (u_ctrl_val > vol_max) + u_ctrl_val = vol_max; + val = u_ctrl_val; + u_ctrl_val = + ((abs(u_ctrl_val - vol_gain_sft) * rt715_sdca_db_step) << 8) / 1000; + if (val <= vol_gain_sft) { + u_ctrl_val = ~u_ctrl_val; + u_ctrl_val += 1; + } + u_ctrl_val &= 0xffff; + + return u_ctrl_val; +} + +static inline unsigned int rt715_sdca_boost_gain(unsigned int u_ctrl_val, + unsigned int b_max, unsigned int b_gain_sft) +{ + if (u_ctrl_val > b_max) + u_ctrl_val = b_max; + + return (u_ctrl_val * 10) << b_gain_sft; +} + +static inline unsigned int rt715_sdca_get_gain(unsigned int reg_val, + unsigned int gain_sft) +{ + unsigned int neg_flag = 0; + + if (reg_val & bit(15)) { + reg_val = ~(reg_val - 1) & 0xffff; + neg_flag = 1; + } + reg_val *= 1000; + reg_val >>= 8; + if (neg_flag) + reg_val = gain_sft - reg_val / rt715_sdca_db_step; + else + reg_val = gain_sft + reg_val / rt715_sdca_db_step; + + return reg_val; +} + +/* sdca volume/boost control */ +static int rt715_sdca_set_amp_gain_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); + struct soc_mixer_control *mc = + (struct soc_mixer_control *)kcontrol->private_value; + struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component); + unsigned int gain_val, i, k_changed = 0; + int ret; + + for (i = 0; i < 2; i++) { + if (ucontrol->value.integer.value[i] != rt715->kctl_2ch_orig[i]) { + k_changed = 1; + break; + } + } + + for (i = 0; i < 2; i++) { + rt715->kctl_2ch_orig[i] = ucontrol->value.integer.value[i]; + gain_val = + rt715_sdca_vol_gain(ucontrol->value.integer.value[i], mc->max, + mc->shift); + ret = regmap_write(rt715->mbq_regmap, mc->reg + i, gain_val); + if (ret != 0) { + dev_err(component->dev, "failed to write 0x%x=0x%x ", + mc->reg + i, gain_val); + return ret; + } + } + + return k_changed; +} + +static int rt715_sdca_set_amp_gain_4ch_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); + struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component); + struct rt715_sdca_kcontrol_private *p = + (struct rt715_sdca_kcontrol_private *)kcontrol->private_value; + unsigned int reg_base = p->reg_base, k_changed = 0; + const unsigned int gain_sft = 0x2f; + unsigned int gain_val, i; + int ret; + + for (i = 0; i < 4; i++) { + if (ucontrol->value.integer.value[i] != rt715->kctl_4ch_orig[i]) { + k_changed = 1; + break; + } + } + + for (i = 0; i < 4; i++) { + rt715->kctl_4ch_orig[i] = ucontrol->value.integer.value[i]; + gain_val = + rt715_sdca_vol_gain(ucontrol->value.integer.value[i], p->max, + gain_sft); + ret = regmap_write(rt715->mbq_regmap, reg_base + i, + gain_val); + if (ret != 0) { + dev_err(component->dev, "failed to write 0x%x=0x%x ", + reg_base + i, gain_val); + return ret; + } + } + + return k_changed; +} + +static int rt715_sdca_set_amp_gain_8ch_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); + struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component); + struct rt715_sdca_kcontrol_private *p = + (struct rt715_sdca_kcontrol_private *)kcontrol->private_value; + unsigned int reg_base = p->reg_base, i, k_changed = 0; + const unsigned int gain_sft = 8; + unsigned int gain_val, reg; + int ret; + + for (i = 0; i < 8; i++) { + if (ucontrol->value.integer.value[i] != rt715->kctl_8ch_orig[i]) { + k_changed = 1; + break; + } + } + + for (i = 0; i < 8; i++) { + rt715->kctl_8ch_orig[i] = ucontrol->value.integer.value[i]; + gain_val = + rt715_sdca_boost_gain(ucontrol->value.integer.value[i], p->max, + gain_sft); + reg = i < 7 ? reg_base + i : (reg_base - 1) | bit(15); + ret = regmap_write(rt715->mbq_regmap, reg, gain_val); + if (ret != 0) { + dev_err(component->dev, "failed to write 0x%x=0x%x ", + reg, gain_val); + return ret; + } + } + + return k_changed; +} + +static int rt715_sdca_set_amp_gain_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); + struct soc_mixer_control *mc = + (struct soc_mixer_control *)kcontrol->private_value; + struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component); + unsigned int val, i; + int ret; + + for (i = 0; i < 2; i++) { + ret = regmap_read(rt715->mbq_regmap, mc->reg + i, &val); + if (ret < 0) { + dev_err(component->dev, "failed to read 0x%x, ret=%d ", + mc->reg + i, ret); + return ret; + } + ucontrol->value.integer.value[i] = rt715_sdca_get_gain(val, mc->shift); + } + + return 0; +} + +static int rt715_sdca_set_amp_gain_4ch_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); + struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component); + struct rt715_sdca_kcontrol_private *p = + (struct rt715_sdca_kcontrol_private *)kcontrol->private_value; + unsigned int reg_base = p->reg_base, i; + const unsigned int gain_sft = 0x2f; + unsigned int val; + int ret; + + for (i = 0; i < 4; i++) { + ret = regmap_read(rt715->mbq_regmap, reg_base + i, &val); + if (ret < 0) { + dev_err(component->dev, "failed to read 0x%x, ret=%d ", + reg_base + i, ret); + return ret; + } + ucontrol->value.integer.value[i] = rt715_sdca_get_gain(val, gain_sft); + } + + return 0; +} + +static int rt715_sdca_set_amp_gain_8ch_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); + struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component); + struct rt715_sdca_kcontrol_private *p = + (struct rt715_sdca_kcontrol_private *)kcontrol->private_value; + unsigned int reg_base = p->reg_base; + const unsigned int gain_sft = 8; + unsigned int val_l, val_r; + unsigned int i, reg; + int ret; + + for (i = 0; i < 8; i += 2) { + ret = regmap_read(rt715->mbq_regmap, reg_base + i, &val_l); + if (ret < 0) { + dev_err(component->dev, "failed to read 0x%x, ret=%d ", + reg_base + i, ret); + return ret; + } + ucontrol->value.integer.value[i] = (val_l >> gain_sft) / 10; + + reg = (i == 6) ? (reg_base - 1) | bit(15) : reg_base + 1 + i; + ret = regmap_read(rt715->mbq_regmap, reg, &val_r); + if (ret < 0) { + dev_err(component->dev, "failed to read 0x%x, ret=%d ", + reg, ret); + return ret; + } + ucontrol->value.integer.value[i + 1] = (val_r >> gain_sft) / 10; + } + + return 0; +} + +static const declare_tlv_db_scale(in_vol_tlv, -17625, 375, 0); +static const declare_tlv_db_scale(mic_vol_tlv, 0, 1000, 0); + +static int rt715_sdca_get_volsw(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); + struct rt715_sdca_kcontrol_private *p = + (struct rt715_sdca_kcontrol_private *)kcontrol->private_value; + unsigned int reg_base = p->reg_base; + unsigned int invert = p->invert, i; + int val; + + for (i = 0; i < p->count; i += 2) { + val = snd_soc_component_read(component, reg_base + i); + if (val < 0) + return -einval; + ucontrol->value.integer.value[i] = invert ? p->max - val : val; + + val = snd_soc_component_read(component, reg_base + 1 + i); + if (val < 0) + return -einval; + ucontrol->value.integer.value[i + 1] = + invert ? p->max - val : val; + } + + return 0; +} + +static int rt715_sdca_put_volsw(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); + struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component); + struct rt715_sdca_kcontrol_private *p = + (struct rt715_sdca_kcontrol_private *)kcontrol->private_value; + unsigned int val[4] = {0}, val_mask, i, k_changed = 0; + unsigned int reg = p->reg_base; + unsigned int shift = p->shift; + unsigned int max = p->max; + unsigned int mask = (1 << fls(max)) - 1; + unsigned int invert = p->invert; + int err; + + for (i = 0; i < 4; i++) { + if (ucontrol->value.integer.value[i] != rt715->kctl_switch_orig[i]) { + k_changed = 1; + break; + } + } + + for (i = 0; i < 2; i++) { + rt715->kctl_switch_orig[i * 2] = ucontrol->value.integer.value[i * 2]; + val[i * 2] = ucontrol->value.integer.value[i * 2] & mask; + if (invert) + val[i * 2] = max - val[i * 2]; + val_mask = mask << shift; + val[i * 2] <<= shift; + + rt715->kctl_switch_orig[i * 2 + 1] = + ucontrol->value.integer.value[i * 2 + 1]; + val[i * 2 + 1] = + ucontrol->value.integer.value[i * 2 + 1] & mask; + if (invert) + val[i * 2 + 1] = max - val[i * 2 + 1]; + + val[i * 2 + 1] <<= shift; + + err = snd_soc_component_update_bits(component, reg + i * 2, val_mask, + val[i * 2]); + if (err < 0) + return err; + + err = snd_soc_component_update_bits(component, reg + 1 + i * 2, + val_mask, val[i * 2 + 1]); + if (err < 0) + return err; + } + + return k_changed; +} + +static int rt715_sdca_fu_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + struct rt715_sdca_kcontrol_private *p = + (struct rt715_sdca_kcontrol_private *)kcontrol->private_value; + + if (p->max == 1) + uinfo->type = sndrv_ctl_elem_type_boolean; + else + uinfo->type = sndrv_ctl_elem_type_integer; + uinfo->count = p->count; + uinfo->value.integer.min = 0; + uinfo->value.integer.max = p->max; + return 0; +} + +#define rt715_sdca_pr_value(xreg_base, xcount, xmax, xshift, xinvert) \ + ((unsigned long)&(struct rt715_sdca_kcontrol_private) \ + {.reg_base = xreg_base, .count = xcount, .max = xmax, \ + .shift = xshift, .invert = xinvert}) + +#define rt715_sdca_fu_ctrl(xname, reg_base, xshift, xmax, xinvert, xcount) \ +{ .iface = sndrv_ctl_elem_iface_mixer, .name = (xname), \ + .info = rt715_sdca_fu_info, \ + .get = rt715_sdca_get_volsw, \ + .put = rt715_sdca_put_volsw, \ + .private_value = rt715_sdca_pr_value(reg_base, xcount, xmax, \ + xshift, xinvert)} + +#define soc_double_r_ext(xname, reg_left, reg_right, xshift, xmax, xinvert,\ + xhandler_get, xhandler_put) \ +{ .iface = sndrv_ctl_elem_iface_mixer, .name = (xname), \ + .info = snd_soc_info_volsw, \ + .get = xhandler_get, .put = xhandler_put, \ + .private_value = soc_double_r_value(reg_left, reg_right, xshift, \ + xmax, xinvert) } + +#define rt715_sdca_ext_tlv(xname, reg_base, xhandler_get,\ + xhandler_put, tlv_array, xcount, xmax) \ +{ .iface = sndrv_ctl_elem_iface_mixer, .name = (xname), \ + .access = sndrv_ctl_elem_access_tlv_read | \ + sndrv_ctl_elem_access_readwrite, \ + .tlv.p = (tlv_array), \ + .info = rt715_sdca_fu_info, \ + .get = xhandler_get, .put = xhandler_put, \ + .private_value = rt715_sdca_pr_value(reg_base, xcount, xmax, 0, 0) } + +#define rt715_sdca_boost_ext_tlv(xname, reg_base, xhandler_get,\ + xhandler_put, tlv_array, xcount, xmax) \ +{ .iface = sndrv_ctl_elem_iface_mixer, .name = (xname), \ + .access = sndrv_ctl_elem_access_tlv_read | \ + sndrv_ctl_elem_access_readwrite, \ + .tlv.p = (tlv_array), \ + .info = rt715_sdca_fu_info, \ + .get = xhandler_get, .put = xhandler_put, \ + .private_value = rt715_sdca_pr_value(reg_base, xcount, xmax, 0, 0) } + +static const struct snd_kcontrol_new rt715_sdca_snd_controls[] = { + /* capture switch */ + soc_double_r("fu0a capture switch", + sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_adc7_27_vol, + rt715_sdca_fu_mute_ctrl, ch_01), + sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_adc7_27_vol, + rt715_sdca_fu_mute_ctrl, ch_02), + 0, 1, 1), + rt715_sdca_fu_ctrl("fu02 capture switch", + sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_adc8_9_vol, + rt715_sdca_fu_mute_ctrl, ch_01), + 0, 1, 1, 4), + rt715_sdca_fu_ctrl("fu06 capture switch", + sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_adc10_11_vol, + rt715_sdca_fu_mute_ctrl, ch_01), + 0, 1, 1, 4), + /* volume control */ + soc_double_r_ext_tlv("fu0a capture volume", + sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_adc7_27_vol, + rt715_sdca_fu_vol_ctrl, ch_01), + sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_adc7_27_vol, + rt715_sdca_fu_vol_ctrl, ch_02), + 0x2f, 0x7f, 0, + rt715_sdca_set_amp_gain_get, rt715_sdca_set_amp_gain_put, + in_vol_tlv), + rt715_sdca_ext_tlv("fu02 capture volume", + sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_adc8_9_vol, + rt715_sdca_fu_vol_ctrl, ch_01), + rt715_sdca_set_amp_gain_4ch_get, + rt715_sdca_set_amp_gain_4ch_put, + in_vol_tlv, 4, 0x7f), + rt715_sdca_ext_tlv("fu06 capture volume", + sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_adc10_11_vol, + rt715_sdca_fu_vol_ctrl, ch_01), + rt715_sdca_set_amp_gain_4ch_get, + rt715_sdca_set_amp_gain_4ch_put, + in_vol_tlv, 4, 0x7f), + /* mic boost control */ + rt715_sdca_boost_ext_tlv("fu0e boost", + sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_dmic_gain_en, + rt715_sdca_fu_dmic_gain_ctrl, ch_01), + rt715_sdca_set_amp_gain_8ch_get, + rt715_sdca_set_amp_gain_8ch_put, + mic_vol_tlv, 8, 3), + rt715_sdca_boost_ext_tlv("fu0c boost", + sdw_sdca_ctl(fun_mic_array, rt715_sdca_fu_amic_gain_en, + rt715_sdca_fu_dmic_gain_ctrl, ch_01), + rt715_sdca_set_amp_gain_8ch_get, + rt715_sdca_set_amp_gain_8ch_put, + mic_vol_tlv, 8, 3), +}; + +static int rt715_sdca_mux_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_dapm_kcontrol_component(kcontrol); + struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component); + unsigned int val, mask_sft; + + if (strstr(ucontrol->id.name, "adc 22 mux")) + mask_sft = 12; + else if (strstr(ucontrol->id.name, "adc 23 mux")) + mask_sft = 8; + else if (strstr(ucontrol->id.name, "adc 24 mux")) + mask_sft = 4; + else if (strstr(ucontrol->id.name, "adc 25 mux")) + mask_sft = 0; + else + return -einval; + + rt715_sdca_index_read(rt715, rt715_vendor_hda_ctl, + rt715_hda_legacy_mux_ctl1, &val); + val = (val >> mask_sft) & 0xf; + + /* + * the first two indices of adc mux 24/25 are routed to the same + * hardware source. ie, adc mux 24 0/1 will both connect to mic2. + * to have a unique set of inputs, we skip the index1 of the muxes. + */ + if ((strstr(ucontrol->id.name, "adc 24 mux") || + strstr(ucontrol->id.name, "adc 25 mux")) && val > 0) + val -= 1; + ucontrol->value.enumerated.item[0] = val; + + return 0; +} + +static int rt715_sdca_mux_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_dapm_kcontrol_component(kcontrol); + struct snd_soc_dapm_context *dapm = + snd_soc_dapm_kcontrol_dapm(kcontrol); + struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + unsigned int *item = ucontrol->value.enumerated.item; + unsigned int val, val2 = 0, change, mask_sft; + + if (item[0] >= e->items) + return -einval; + + if (strstr(ucontrol->id.name, "adc 22 mux")) + mask_sft = 12; + else if (strstr(ucontrol->id.name, "adc 23 mux")) + mask_sft = 8; + else if (strstr(ucontrol->id.name, "adc 24 mux")) + mask_sft = 4; + else if (strstr(ucontrol->id.name, "adc 25 mux")) + mask_sft = 0; + else + return -einval; + + /* verb id = 0x701h, nid = e->reg */ + val = snd_soc_enum_item_to_val(e, item[0]) << e->shift_l; + + rt715_sdca_index_read(rt715, rt715_vendor_hda_ctl, + rt715_hda_legacy_mux_ctl1, &val2); + val2 = (val2 >> mask_sft) & 0xf; + + change = val != val2; + + if (change) + rt715_sdca_index_update_bits(rt715, rt715_vendor_hda_ctl, + rt715_hda_legacy_mux_ctl1, 0xf << mask_sft, val << mask_sft); + + snd_soc_dapm_mux_update_power(dapm, kcontrol, item[0], e, null); + + return change; +} + +static const char * const adc_22_23_mux_text[] = { + "mic1", + "mic2", + "line1", + "line2", + "dmic1", + "dmic2", + "dmic3", + "dmic4", +}; + +/* + * due to mux design for nid 24 (mux_in3)/25 (mux_in4), connection index 0 and + * 1 will be connected to the same dmic source, therefore we skip index 1 to + * avoid misunderstanding on usage of dapm routing. + */ +static int rt715_adc_24_25_values[] = { + 0, + 2, + 3, + 4, + 5, +}; + +static const char * const adc_24_mux_text[] = { + "mic2", + "dmic1", + "dmic2", + "dmic3", + "dmic4", +}; + +static const char * const adc_25_mux_text[] = { + "mic1", + "dmic1", + "dmic2", + "dmic3", + "dmic4", +}; + +static soc_enum_single_decl(rt715_adc22_enum, snd_soc_nopm, 0, + adc_22_23_mux_text); + +static soc_enum_single_decl(rt715_adc23_enum, snd_soc_nopm, 0, + adc_22_23_mux_text); + +static soc_value_enum_single_decl(rt715_adc24_enum, + snd_soc_nopm, 0, 0xf, + adc_24_mux_text, rt715_adc_24_25_values); +static soc_value_enum_single_decl(rt715_adc25_enum, + snd_soc_nopm, 0, 0xf, + adc_25_mux_text, rt715_adc_24_25_values); + +static const struct snd_kcontrol_new rt715_adc22_mux = + soc_dapm_enum_ext("adc 22 mux", rt715_adc22_enum, + rt715_sdca_mux_get, rt715_sdca_mux_put); + +static const struct snd_kcontrol_new rt715_adc23_mux = + soc_dapm_enum_ext("adc 23 mux", rt715_adc23_enum, + rt715_sdca_mux_get, rt715_sdca_mux_put); + +static const struct snd_kcontrol_new rt715_adc24_mux = + soc_dapm_enum_ext("adc 24 mux", rt715_adc24_enum, + rt715_sdca_mux_get, rt715_sdca_mux_put); + +static const struct snd_kcontrol_new rt715_adc25_mux = + soc_dapm_enum_ext("adc 25 mux", rt715_adc25_enum, + rt715_sdca_mux_get, rt715_sdca_mux_put); + +static int rt715_sdca_pde23_24_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_component *component = + snd_soc_dapm_to_component(w->dapm); + struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component); + + switch (event) { + case snd_soc_dapm_post_pmu: + regmap_write(rt715->regmap, + sdw_sdca_ctl(fun_mic_array, rt715_sdca_creq_pow_en, + rt715_sdca_req_pow_ctrl, + ch_00), 0x00); + break; + case snd_soc_dapm_pre_pmd: + regmap_write(rt715->regmap, + sdw_sdca_ctl(fun_mic_array, rt715_sdca_creq_pow_en, + rt715_sdca_req_pow_ctrl, + ch_00), 0x03); + break; + } + return 0; +} + +static const struct snd_soc_dapm_widget rt715_sdca_dapm_widgets[] = { + snd_soc_dapm_input("dmic1"), + snd_soc_dapm_input("dmic2"), + snd_soc_dapm_input("dmic3"), + snd_soc_dapm_input("dmic4"), + snd_soc_dapm_input("mic1"), + snd_soc_dapm_input("mic2"), + snd_soc_dapm_input("line1"), + snd_soc_dapm_input("line2"), + + snd_soc_dapm_supply("pde23_24", snd_soc_nopm, 0, 0, + rt715_sdca_pde23_24_event, + snd_soc_dapm_post_pmu | snd_soc_dapm_pre_pmd), + + snd_soc_dapm_adc("adc 07", null, snd_soc_nopm, 4, 0), + snd_soc_dapm_adc("adc 08", null, snd_soc_nopm, 4, 0), + snd_soc_dapm_adc("adc 09", null, snd_soc_nopm, 4, 0), + snd_soc_dapm_adc("adc 27", null, snd_soc_nopm, 4, 0), + snd_soc_dapm_mux("adc 22 mux", snd_soc_nopm, 0, 0, + &rt715_adc22_mux), + snd_soc_dapm_mux("adc 23 mux", snd_soc_nopm, 0, 0, + &rt715_adc23_mux), + snd_soc_dapm_mux("adc 24 mux", snd_soc_nopm, 0, 0, + &rt715_adc24_mux), + snd_soc_dapm_mux("adc 25 mux", snd_soc_nopm, 0, 0, + &rt715_adc25_mux), + snd_soc_dapm_aif_out("dp4tx", "dp4 capture", 0, snd_soc_nopm, 0, 0), + snd_soc_dapm_aif_out("dp6tx", "dp6 capture", 0, snd_soc_nopm, 0, 0), +}; + +static const struct snd_soc_dapm_route rt715_sdca_audio_map[] = { + {"dp6tx", null, "adc 09"}, + {"dp6tx", null, "adc 08"}, + {"dp4tx", null, "adc 07"}, + {"dp4tx", null, "adc 27"}, + {"dp4tx", null, "adc 09"}, + {"dp4tx", null, "adc 08"}, + + {"line1", null, "pde23_24"}, + {"line2", null, "pde23_24"}, + {"mic1", null, "pde23_24"}, + {"mic2", null, "pde23_24"}, + {"dmic1", null, "pde23_24"}, + {"dmic2", null, "pde23_24"}, + {"dmic3", null, "pde23_24"}, + {"dmic4", null, "pde23_24"}, + + {"adc 09", null, "adc 22 mux"}, + {"adc 08", null, "adc 23 mux"}, + {"adc 07", null, "adc 24 mux"}, + {"adc 27", null, "adc 25 mux"}, + {"adc 22 mux", "mic1", "mic1"}, + {"adc 22 mux", "mic2", "mic2"}, + {"adc 22 mux", "line1", "line1"}, + {"adc 22 mux", "line2", "line2"}, + {"adc 22 mux", "dmic1", "dmic1"}, + {"adc 22 mux", "dmic2", "dmic2"}, + {"adc 22 mux", "dmic3", "dmic3"}, + {"adc 22 mux", "dmic4", "dmic4"}, + {"adc 23 mux", "mic1", "mic1"}, + {"adc 23 mux", "mic2", "mic2"}, + {"adc 23 mux", "line1", "line1"}, + {"adc 23 mux", "line2", "line2"}, + {"adc 23 mux", "dmic1", "dmic1"}, + {"adc 23 mux", "dmic2", "dmic2"}, + {"adc 23 mux", "dmic3", "dmic3"}, + {"adc 23 mux", "dmic4", "dmic4"}, + {"adc 24 mux", "mic2", "mic2"}, + {"adc 24 mux", "dmic1", "dmic1"}, + {"adc 24 mux", "dmic2", "dmic2"}, + {"adc 24 mux", "dmic3", "dmic3"}, + {"adc 24 mux", "dmic4", "dmic4"}, + {"adc 25 mux", "mic1", "mic1"}, + {"adc 25 mux", "dmic1", "dmic1"}, + {"adc 25 mux", "dmic2", "dmic2"}, + {"adc 25 mux", "dmic3", "dmic3"}, + {"adc 25 mux", "dmic4", "dmic4"}, +}; + +static const struct snd_soc_component_driver soc_codec_dev_rt715_sdca = { + .controls = rt715_sdca_snd_controls, + .num_controls = array_size(rt715_sdca_snd_controls), + .dapm_widgets = rt715_sdca_dapm_widgets, + .num_dapm_widgets = array_size(rt715_sdca_dapm_widgets), + .dapm_routes = rt715_sdca_audio_map, + .num_dapm_routes = array_size(rt715_sdca_audio_map), +}; + +static int rt715_sdca_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream, + int direction) +{ + struct rt715_sdw_stream_data *stream; + + stream = kzalloc(sizeof(*stream), gfp_kernel); + if (!stream) + return -enomem; + + stream->sdw_stream = sdw_stream; + + /* use tx_mask or rx_mask to configure stream tag and set dma_data */ + if (direction == sndrv_pcm_stream_playback) + dai->playback_dma_data = stream; + else + dai->capture_dma_data = stream; + + return 0; +} + +static void rt715_sdca_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) + +{ + struct rt715_sdw_stream_data *stream; + + stream = snd_soc_dai_get_dma_data(dai, substream); + if (!stream) + return; + + snd_soc_dai_set_dma_data(dai, substream, null); + kfree(stream); +} + +static int rt715_sdca_pcm_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct snd_soc_component *component = dai->component; + struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component); + struct sdw_stream_config stream_config; + struct sdw_port_config port_config; + enum sdw_data_direction direction; + struct rt715_sdw_stream_data *stream; + int retval, port, num_channels; + unsigned int val; + + stream = snd_soc_dai_get_dma_data(dai, substream); + + if (!stream) + return -einval; + + if (!rt715->slave) + return -einval; + + switch (dai->id) { + case rt715_aif1: + direction = sdw_data_dir_tx; + port = 6; + rt715_sdca_index_write(rt715, rt715_vendor_reg, rt715_sdw_input_sel, + 0xa500); + break; + case rt715_aif2: + direction = sdw_data_dir_tx; + port = 4; + rt715_sdca_index_write(rt715, rt715_vendor_reg, rt715_sdw_input_sel, + 0xaf00); + break; + default: + dev_err(component->dev, "invalid dai id %d ", dai->id); + return -einval; + } + + stream_config.frame_rate = params_rate(params); + stream_config.ch_count = params_channels(params); + stream_config.bps = snd_pcm_format_width(params_format(params)); + stream_config.direction = direction; + + num_channels = params_channels(params); + port_config.ch_mask = genmask(num_channels - 1, 0); + port_config.num = port; + + retval = sdw_stream_add_slave(rt715->slave, &stream_config, + &port_config, 1, stream->sdw_stream); + if (retval) { + dev_err(component->dev, "unable to configure port, retval:%d ", + retval); + return retval; + } + + switch (params_rate(params)) { + case 8000: + val = 0x1; + break; + case 11025: + val = 0x2; + break; + case 12000: + val = 0x3; + break; + case 16000: + val = 0x4; + break; + case 22050: + val = 0x5; + break; + case 24000: + val = 0x6; + break; + case 32000: + val = 0x7; + break; + case 44100: + val = 0x8; + break; + case 48000: + val = 0x9; + break; + case 88200: + val = 0xa; + break; + case 96000: + val = 0xb; + break; + case 176400: + val = 0xc; + break; + case 192000: + val = 0xd; + break; + case 384000: + val = 0xe; + break; + case 768000: + val = 0xf; + break; + default: + dev_err(component->dev, "unsupported sample rate %d ", + params_rate(params)); + return -einval; + } + + regmap_write(rt715->regmap, + sdw_sdca_ctl(fun_mic_array, rt715_sdca_cs_freq_ind_en, + rt715_sdca_freq_ind_ctrl, ch_00), val); + + return 0; +} + +static int rt715_sdca_pcm_hw_free(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_component *component = dai->component; + struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component); + struct rt715_sdw_stream_data *stream = + snd_soc_dai_get_dma_data(dai, substream); + + if (!rt715->slave) + return -einval; + + sdw_stream_remove_slave(rt715->slave, stream->sdw_stream); + return 0; +} + +#define rt715_stereo_rates (sndrv_pcm_rate_44100 | sndrv_pcm_rate_48000) +#define rt715_formats (sndrv_pcm_fmtbit_s16_le | sndrv_pcm_fmtbit_s20_3le | \ + sndrv_pcm_fmtbit_s24_le | sndrv_pcm_fmtbit_s8) + +static struct snd_soc_dai_ops rt715_sdca_ops = { + .hw_params = rt715_sdca_pcm_hw_params, + .hw_free = rt715_sdca_pcm_hw_free, + .set_sdw_stream = rt715_sdca_set_sdw_stream, + .shutdown = rt715_sdca_shutdown, +}; + +static struct snd_soc_dai_driver rt715_sdca_dai[] = { + { + .name = "rt715-aif1", + .id = rt715_aif1, + .capture = { + .stream_name = "dp6 capture", + .channels_min = 1, + .channels_max = 2, + .rates = rt715_stereo_rates, + .formats = rt715_formats, + }, + .ops = &rt715_sdca_ops, + }, + { + .name = "rt715-aif2", + .id = rt715_aif2, + .capture = { + .stream_name = "dp4 capture", + .channels_min = 1, + .channels_max = 2, + .rates = rt715_stereo_rates, + .formats = rt715_formats, + }, + .ops = &rt715_sdca_ops, + }, +}; + +/* bus clock frequency */ +#define rt715_clk_freq_9600000hz 9600000 +#define rt715_clk_freq_12000000hz 12000000 +#define rt715_clk_freq_6000000hz 6000000 +#define rt715_clk_freq_4800000hz 4800000 +#define rt715_clk_freq_2400000hz 2400000 +#define rt715_clk_freq_12288000hz 12288000 + +int rt715_sdca_init(struct device *dev, struct regmap *mbq_regmap, + struct regmap *regmap, struct sdw_slave *slave) +{ + struct rt715_sdca_priv *rt715; + int ret; + + rt715 = devm_kzalloc(dev, sizeof(*rt715), gfp_kernel); + if (!rt715) + return -enomem; + + dev_set_drvdata(dev, rt715); + rt715->slave = slave; + rt715->regmap = regmap; + rt715->mbq_regmap = mbq_regmap; + rt715->hw_sdw_ver = slave->id.sdw_version; + /* + * mark hw_init to false + * hw init will be performed when device reports present + */ + rt715->hw_init = false; + rt715->first_init = false; + + ret = devm_snd_soc_register_component(dev, + &soc_codec_dev_rt715_sdca, + rt715_sdca_dai, + array_size(rt715_sdca_dai)); + + return ret; +} + +int rt715_sdca_io_init(struct device *dev, struct sdw_slave *slave) +{ + struct rt715_sdca_priv *rt715 = dev_get_drvdata(dev); + unsigned int hw_ver; + + if (rt715->hw_init) + return 0; + + /* + * pm runtime is only enabled when a slave reports as attached + */ + if (!rt715->first_init) { + /* set autosuspend parameters */ + pm_runtime_set_autosuspend_delay(&slave->dev, 3000); + pm_runtime_use_autosuspend(&slave->dev); + + /* update count of parent 'active' children */ + pm_runtime_set_active(&slave->dev); + + /* make sure the device does not suspend immediately */ + pm_runtime_mark_last_busy(&slave->dev); + + pm_runtime_enable(&slave->dev); + + rt715->first_init = true; + } + + pm_runtime_get_noresume(&slave->dev); + + rt715_sdca_index_read(rt715, rt715_vendor_reg, + rt715_product_num, &hw_ver); + hw_ver = hw_ver & 0x000f; + + /* set clock selector = external */ + regmap_write(rt715->regmap, + sdw_sdca_ctl(fun_mic_array, rt715_sdca_cx_clk_sel_en, + rt715_sdca_cx_clk_sel_ctrl, ch_00), 0x1); + /* set gpio_4/5/6 to be 3rd/4th dmic usage */ + if (hw_ver == 0x0) + rt715_sdca_index_update_bits(rt715, rt715_vendor_reg, + rt715_ad_func_en, 0x54, 0x54); + else if (hw_ver == 0x1) { + rt715_sdca_index_update_bits(rt715, rt715_vendor_reg, + rt715_ad_func_en, 0x55, 0x55); + rt715_sdca_index_update_bits(rt715, rt715_vendor_reg, + rt715_rev_1, 0x40, 0x40); + } + /* trigger mode = vad enable */ + regmap_write(rt715->regmap, + sdw_sdca_ctl(fun_mic_array, rt715_sdca_smpu_trig_st_en, + rt715_sdca_smpu_trig_en_ctrl, ch_00), 0x2); + /* smpu-1 interrupt enable mask */ + regmap_update_bits(rt715->regmap, rt715_int_mask, 0x1, 0x1); + + /* mark slave initialization complete */ + rt715->hw_init = true; + + pm_runtime_mark_last_busy(&slave->dev); + pm_runtime_put_autosuspend(&slave->dev); + + return 0; +} + +module_description("asoc rt715 driver sdw sdca"); +module_author("jack yu <jack.yu@realtek.com>"); +module_license("gpl v2"); diff --git a/sound/soc/codecs/rt715-sdca.h b/sound/soc/codecs/rt715-sdca.h --- /dev/null +++ b/sound/soc/codecs/rt715-sdca.h +/* spdx-license-identifier: gpl-2.0-only */ +/* + * rt715-sdca.h -- rt715 alsa soc audio driver header + * + * copyright(c) 2020 realtek semiconductor corp. + */ + +#ifndef __rt715_sdca_h__ +#define __rt715_sdca_h__ + +#include <linux/regmap.h> +#include <linux/soundwire/sdw.h> +#include <linux/soundwire/sdw_type.h> +#include <sound/soc.h> +#include <linux/workqueue.h> +#include <linux/device.h> + +struct rt715_sdca_priv { + struct regmap *regmap; + struct regmap *mbq_regmap; + struct snd_soc_codec *codec; + struct sdw_slave *slave; + struct delayed_work adc_mute_work; + int dbg_nid; + int dbg_vid; + int dbg_payload; + enum sdw_slave_status status; + struct sdw_bus_params params; + bool hw_init; + bool first_init; + int l_is_unmute; + int r_is_unmute; + int hw_sdw_ver; + int kctl_switch_orig[4]; + int kctl_2ch_orig[2]; + int kctl_4ch_orig[4]; + int kctl_8ch_orig[8]; +}; + +struct rt715_sdw_stream_data { + struct sdw_stream_runtime *sdw_stream; +}; + +struct rt715_sdca_kcontrol_private { + unsigned int reg_base; + unsigned int count; + unsigned int max; + unsigned int shift; + unsigned int invert; +}; + +/* mipi register */ +#define rt715_int_ctrl 0x005a +#define rt715_int_mask 0x005e + +/* nid */ +#define rt715_audio_function_group 0x01 +#define rt715_mic_adc 0x07 +#define rt715_line_adc 0x08 +#define rt715_mix_adc 0x09 +#define rt715_dmic1 0x12 +#define rt715_dmic2 0x13 +#define rt715_mic1 0x18 +#define rt715_mic2 0x19 +#define rt715_line1 0x1a +#define rt715_line2 0x1b +#define rt715_dmic3 0x1d +#define rt715_dmic4 0x29 +#define rt715_vendor_reg 0x20 +#define rt715_mux_in1 0x22 +#define rt715_mux_in2 0x23 +#define rt715_mux_in3 0x24 +#define rt715_mux_in4 0x25 +#define rt715_mix_adc2 0x27 +#define rt715_inline_cmd 0x55 +#define rt715_vendor_hda_ctl 0x61 + +/* index (nid:20h) */ +#define rt715_product_num 0x0 +#define rt715_irq_ctrl 0x2b +#define rt715_ad_func_en 0x36 +#define rt715_rev_1 0x37 +#define rt715_sdw_input_sel 0x39 +#define rt715_ext_dmic_clk_ctrl2 0x54 + +/* index (nid:61h) */ +#define rt715_hda_legacy_mux_ctl1 0x00 + +/* sdca (function) */ +#define fun_jack_codec 0x01 +#define fun_mic_array 0x02 +#define fun_hid 0x03 +/* sdca (entity) */ +#define rt715_sdca_st_en 0x00 +#define rt715_sdca_cs_freq_ind_en 0x01 +#define rt715_sdca_fu_adc8_9_vol 0x02 +#define rt715_sdca_smpu_trig_st_en 0x05 +#define rt715_sdca_fu_adc10_11_vol 0x06 +#define rt715_sdca_fu_adc7_27_vol 0x0a +#define rt715_sdca_fu_amic_gain_en 0x0c +#define rt715_sdca_fu_dmic_gain_en 0x0e +#define rt715_sdca_cx_clk_sel_en 0x10 +#define rt715_sdca_creq_pow_en 0x18 +/* sdca (control) */ +#define rt715_sdca_st_ctrl 0x00 +#define rt715_sdca_cx_clk_sel_ctrl 0x01 +#define rt715_sdca_req_pow_ctrl 0x01 +#define rt715_sdca_fu_mute_ctrl 0x01 +#define rt715_sdca_fu_vol_ctrl 0x02 +#define rt715_sdca_fu_dmic_gain_ctrl 0x0b +#define rt715_sdca_freq_ind_ctrl 0x10 +#define rt715_sdca_smpu_trig_en_ctrl 0x10 +#define rt715_sdca_smpu_trig_st_ctrl 0x11 +/* sdca (channel) */ +#define ch_00 0x00 +#define ch_01 0x01 +#define ch_02 0x02 +#define ch_03 0x03 +#define ch_04 0x04 +#define ch_05 0x05 +#define ch_06 0x06 +#define ch_07 0x07 +#define ch_08 0x08 + +#define rt715_sdca_db_step 375 + +enum { + rt715_aif1, + rt715_aif2, +}; + +int rt715_sdca_io_init(struct device *dev, struct sdw_slave *slave); +int rt715_sdca_init(struct device *dev, struct regmap *mbq_regmap, + struct regmap *regmap, struct sdw_slave *slave); + +#endif /* __rt715_sdca_h__ */
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Audio
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20d17057f0a8c7bfecfb9e05bd5ba33a100a9a15
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jack yu
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sound
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soc
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codecs
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asoc: rt715: add main capture switch and main capture volume
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add main capture switch and main capture volume control. main capture control has its own channel value respectivelly.
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this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
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add main capture switch and main capture volume
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['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
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['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
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['asoc ', 'rt715']
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['h', 'c']
| 2
| 258
| 0
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--- diff --git a/sound/soc/codecs/rt715.c b/sound/soc/codecs/rt715.c --- a/sound/soc/codecs/rt715.c +++ b/sound/soc/codecs/rt715.c +static int rt715_set_main_switch_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); + struct snd_soc_dapm_context *dapm = + snd_soc_component_get_dapm(component); + struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component); + unsigned int capture_reg_h[] = {rt715_set_gain_mic_adc_h, + rt715_set_gain_line_adc_h, rt715_set_gain_mix_adc_h, + rt715_set_gain_mix_adc2_h}; + unsigned int capture_reg_l[] = {rt715_set_gain_mic_adc_l, + rt715_set_gain_line_adc_l, rt715_set_gain_mix_adc_l, + rt715_set_gain_mix_adc2_l}; + unsigned int addr_h, addr_l, val_h = 0x0, val_ll, val_lr; + unsigned int k_shift = rt715_dir_in_sft, k_changed = 0; + unsigned int read_ll, read_rl, i, j, loop_cnt = 4; + + for (i = 0; i < 8; i++) { + if (ucontrol->value.integer.value[i] != rt715->kctl_8ch_switch_ori[i]) + k_changed = 1; + } + + for (j = 0; j < loop_cnt; j++) { + /* can't use update bit function, so read the original value first */ + addr_h = capture_reg_h[j]; + addr_l = capture_reg_l[j]; + rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll); + + if (dapm->bias_level <= snd_soc_bias_standby) + regmap_write(rt715->regmap, + rt715_set_audio_power_state, ac_pwrst_d0); + + /* l channel */ + /* for mute */ + rt715->kctl_8ch_switch_ori[j * 2] = + ucontrol->value.integer.value[j * 2]; + val_ll = (!ucontrol->value.integer.value[j * 2]) << 7; + /* keep gain */ + val_ll |= read_ll & 0x7f; + + /* r channel */ + /* for mute */ + rt715->kctl_8ch_switch_ori[j * 2 + 1] = + ucontrol->value.integer.value[j * 2 + 1]; + val_lr = (!ucontrol->value.integer.value[j * 2 + 1]) << 7; + /* keep gain */ + val_lr |= read_rl & 0x7f; + + for (i = 0; i < 3; i++) { /* retry 3 times at most */ + + if (val_ll == val_lr) { + /* set both l/r channels at the same time */ + val_h = (1 << k_shift) | (3 << 4); + regmap_write(rt715->regmap, addr_h, + (val_h << 8) | val_ll); + regmap_write(rt715->regmap, addr_l, + (val_h << 8) | val_ll); + } else { + /* lch*/ + val_h = (1 << k_shift) | (1 << 5); + regmap_write(rt715->regmap, addr_h, + (val_h << 8) | val_ll); + /* rch */ + val_h = (1 << k_shift) | (1 << 4); + regmap_write(rt715->regmap, addr_l, + (val_h << 8) | val_lr); + } + val_h = 0x0; + rt715_get_gain(rt715, addr_h, addr_l, val_h, + &read_rl, &read_ll); + if (read_rl == val_lr && read_ll == val_ll) + break; + } + } + + /* d0:power on state, d3: power saving mode */ + if (dapm->bias_level <= snd_soc_bias_standby) + regmap_write(rt715->regmap, + rt715_set_audio_power_state, ac_pwrst_d3); + return k_changed; +} + +static int rt715_set_main_switch_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); + struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component); + unsigned int capture_reg_h[] = {rt715_set_gain_mic_adc_h, + rt715_set_gain_line_adc_h, rt715_set_gain_mix_adc_h, + rt715_set_gain_mix_adc2_h}; + unsigned int capture_reg_l[] = {rt715_set_gain_mic_adc_l, + rt715_set_gain_line_adc_l, rt715_set_gain_mix_adc_l, + rt715_set_gain_mix_adc2_l}; + unsigned int addr_h, addr_l, val_h = 0x0, i, loop_cnt = 4; + unsigned int read_ll, read_rl; + + for (i = 0; i < loop_cnt; i++) { + addr_h = capture_reg_h[i]; + addr_l = capture_reg_l[i]; + rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll); + + ucontrol->value.integer.value[i * 2] = !(read_ll & 0x80); + ucontrol->value.integer.value[i * 2 + 1] = !(read_rl & 0x80); + } + + return 0; +} + +static int rt715_set_main_vol_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); + struct snd_soc_dapm_context *dapm = + snd_soc_component_get_dapm(component); + struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component); + unsigned int capture_reg_h[] = {rt715_set_gain_mic_adc_h, + rt715_set_gain_line_adc_h, rt715_set_gain_mix_adc_h, + rt715_set_gain_mix_adc2_h}; + unsigned int capture_reg_l[] = {rt715_set_gain_mic_adc_l, + rt715_set_gain_line_adc_l, rt715_set_gain_mix_adc_l, + rt715_set_gain_mix_adc2_l}; + unsigned int addr_h, addr_l, val_h = 0x0, val_ll, val_lr; + unsigned int read_ll, read_rl, i, j, loop_cnt = 4, k_changed = 0; + unsigned int k_shift = rt715_dir_in_sft, k_max = 0x3f; + + for (i = 0; i < 8; i++) { + if (ucontrol->value.integer.value[i] != rt715->kctl_8ch_vol_ori[i]) + k_changed = 1; + } + + for (j = 0; j < loop_cnt; j++) { + addr_h = capture_reg_h[j]; + addr_l = capture_reg_l[j]; + rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll); + + if (dapm->bias_level <= snd_soc_bias_standby) + regmap_write(rt715->regmap, + rt715_set_audio_power_state, ac_pwrst_d0); + + /* l channel */ + /* for gain */ + rt715->kctl_8ch_vol_ori[j * 2] = ucontrol->value.integer.value[j * 2]; + val_ll = ((ucontrol->value.integer.value[j * 2]) & 0x7f); + if (val_ll > k_max) + val_ll = k_max; + /* keep mute status */ + val_ll |= read_ll & 0x80; + + /* r channel */ + /* for gain */ + rt715->kctl_8ch_vol_ori[j * 2 + 1] = + ucontrol->value.integer.value[j * 2 + 1]; + val_lr = ((ucontrol->value.integer.value[j * 2 + 1]) & 0x7f); + if (val_lr > k_max) + val_lr = k_max; + /* keep mute status */ + val_lr |= read_rl & 0x80; + + for (i = 0; i < 3; i++) { /* retry 3 times at most */ + if (val_ll == val_lr) { + /* set both l/r channels at the same time */ + val_h = (1 << k_shift) | (3 << 4); + regmap_write(rt715->regmap, addr_h, + (val_h << 8) | val_ll); + regmap_write(rt715->regmap, addr_l, + (val_h << 8) | val_ll); + } else { + /* lch*/ + val_h = (1 << k_shift) | (1 << 5); + regmap_write(rt715->regmap, addr_h, + (val_h << 8) | val_ll); + /* rch */ + val_h = (1 << k_shift) | (1 << 4); + regmap_write(rt715->regmap, addr_l, + (val_h << 8) | val_lr); + } + val_h = 0x0; + rt715_get_gain(rt715, addr_h, addr_l, val_h, + &read_rl, &read_ll); + if (read_rl == val_lr && read_ll == val_ll) + break; + } + } + + /* d0:power on state, d3: power saving mode */ + if (dapm->bias_level <= snd_soc_bias_standby) + regmap_write(rt715->regmap, + rt715_set_audio_power_state, ac_pwrst_d3); + return k_changed; +} + +static int rt715_set_main_vol_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); + struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component); + unsigned int capture_reg_h[] = {rt715_set_gain_mic_adc_h, + rt715_set_gain_line_adc_h, rt715_set_gain_mix_adc_h, + rt715_set_gain_mix_adc2_h}; + unsigned int capture_reg_l[] = {rt715_set_gain_mic_adc_l, + rt715_set_gain_line_adc_l, rt715_set_gain_mix_adc_l, + rt715_set_gain_mix_adc2_l}; + unsigned int addr_h, addr_l, val_h = 0x0, i, loop_cnt = 4; + unsigned int read_ll, read_rl; + + for (i = 0; i < loop_cnt; i++) { + addr_h = capture_reg_h[i]; + addr_l = capture_reg_l[i]; + rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll); + + ucontrol->value.integer.value[i * 2] = read_ll & 0x7f; + ucontrol->value.integer.value[i * 2 + 1] = read_rl & 0x7f; + } + + return 0; +} + +static int rt715_switch_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->type = sndrv_ctl_elem_type_boolean; + uinfo->count = 8; + uinfo->value.integer.min = 0; + uinfo->value.integer.max = 1; + return 0; +} + +static int rt715_vol_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->type = sndrv_ctl_elem_type_integer; + uinfo->count = 8; + uinfo->value.integer.min = 0; + uinfo->value.integer.max = 0x3f; + return 0; +} + +#define rt715_main_switch_ext(xname, xhandler_get, xhandler_put) \ +{ .iface = sndrv_ctl_elem_iface_mixer, .name = (xname), \ + .info = rt715_switch_info, \ + .get = xhandler_get, .put = xhandler_put, \ +} + +#define rt715_main_vol_ext_tlv(xname, xhandler_get, xhandler_put, tlv_array) \ +{ .iface = sndrv_ctl_elem_iface_mixer, .name = (xname), \ + .access = sndrv_ctl_elem_access_tlv_read | \ + sndrv_ctl_elem_access_readwrite, \ + .tlv.p = (tlv_array), \ + .info = rt715_vol_info, \ + .get = xhandler_get, .put = xhandler_put, \ +} + + rt715_main_switch_ext("capture switch", + rt715_set_main_switch_get, rt715_set_main_switch_put), + rt715_main_vol_ext_tlv("capture volume", + rt715_set_main_vol_get, rt715_set_main_vol_put, in_vol_tlv), diff --git a/sound/soc/codecs/rt715.h b/sound/soc/codecs/rt715.h --- a/sound/soc/codecs/rt715.h +++ b/sound/soc/codecs/rt715.h + unsigned int kctl_8ch_switch_ori[8]; + unsigned int kctl_8ch_vol_ori[8];
|
Audio
|
dcca646c4977d885af3466b454df97b9cb0e0d26
|
jack yu
|
sound
|
soc
|
codecs
|
asoc: simple-card-utils: enable flexible cpu/codec/platform
|
current simple-card / audio-graph are assuming fixed single-cpu/codec/platform. this patch prepares multi-cpu/codec/platform support.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
enable flexible cpu/codec/platform
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ', 'simple-card-utils']
|
['h', 'c']
| 4
| 110
| 22
|
--- diff --git a/include/sound/simple_card_utils.h b/include/sound/simple_card_utils.h --- a/include/sound/simple_card_utils.h +++ b/include/sound/simple_card_utils.h +struct prop_nums { + int cpus; + int codecs; + int platforms; +}; + + struct prop_nums num; + struct prop_nums num[sndrv_minor_devices]; diff --git a/sound/soc/generic/audio-graph-card.c b/sound/soc/generic/audio-graph-card.c --- a/sound/soc/generic/audio-graph-card.c +++ b/sound/soc/generic/audio-graph-card.c + if (li->link >= sndrv_minor_devices) { + dev_err(dev, "too many links "); + return -einval; + } + + li->num[li->link].cpus = 1; + li->num[li->link].codecs = 1; + li->num[li->link].platforms = 1; + + if (li->link >= sndrv_minor_devices) { + dev_err(dev, "too many links "); + return -einval; + } + + li->num[li->link].cpus = 1; + li->num[li->link].codecs = 1; + li->num[li->link].platforms = 1; + + li->num[li->link].cpus = 1; + li->num[li->link].codecs = 1; + li->num[li->link].platforms = 1; + diff --git a/sound/soc/generic/simple-card-utils.c b/sound/soc/generic/simple-card-utils.c --- a/sound/soc/generic/simple-card-utils.c +++ b/sound/soc/generic/simple-card-utils.c - int i; + int i, dai_num = 0, dlc_num = 0; - dais = devm_kcalloc(dev, li->dais, sizeof(*dais), gfp_kernel); - dlcs = devm_kcalloc(dev, li->link * 3, sizeof(*dai_props), gfp_kernel); - if (!dai_props || !dai_link || !dais || !dlcs) + if (!dai_props || !dai_link) + return -enomem; + + /* + * dais (= cpu+codec) + * dlcs (= cpu+codec+platform) + */ + for (i = 0; i < li->link; i++) { + int cc = li->num[i].cpus + li->num[i].codecs; + + dai_num += cc; + dlc_num += cc + li->num[i].platforms; + } + + dais = devm_kcalloc(dev, dai_num, sizeof(*dais), gfp_kernel); + dlcs = devm_kcalloc(dev, dlc_num, sizeof(*dai_props), gfp_kernel); + if (!dais || !dlcs) - /* - * "platform" might be removed - * see - * simple-card-utils.c :: asoc_simple_canonicalize_platform() - */ - for (i = 0; i < li->link; i++) { - dai_props[i].cpus = dlcs + (3 * i) + 0; - dai_props[i].codecs = dlcs + (3 * i) + 1; - dai_props[i].platforms = dlcs + (3 * i) + 2; - - dai_link[i].cpus = dai_props[i].cpus; - dai_link[i].num_cpus = 1; - dai_link[i].codecs = dai_props[i].codecs; - dai_link[i].num_codecs = 1; - dai_link[i].platforms = dai_props[i].platforms; - dai_link[i].num_platforms = 1; - } - + for (i = 0; i < li->link; i++) { + if (li->num[i].cpus) { + /* normal cpu */ + dai_props[i].cpus = + dai_link[i].cpus = dlcs; + dai_props[i].num.cpus = + dai_link[i].num_cpus = li->num[i].cpus; + + dlcs += li->num[i].cpus; + } + + if (li->num[i].codecs) { + /* normal codec */ + dai_props[i].codecs = + dai_link[i].codecs = dlcs; + dai_props[i].num.codecs = + dai_link[i].num_codecs = li->num[i].codecs; + + dlcs += li->num[i].codecs; + } + + if (li->num[i].platforms) { + /* have platform */ + dai_props[i].platforms = + dai_link[i].platforms = dlcs; + dai_props[i].num.platforms = + dai_link[i].num_platforms = li->num[i].platforms; + + dlcs += li->num[i].platforms; + } + } + diff --git a/sound/soc/generic/simple-card.c b/sound/soc/generic/simple-card.c --- a/sound/soc/generic/simple-card.c +++ b/sound/soc/generic/simple-card.c + if (li->link >= sndrv_minor_devices) { + struct device *dev = simple_priv_to_dev(priv); + + dev_err(dev, "too many links "); + return -einval; + } + + li->num[li->link].cpus = 1; + li->num[li->link].codecs = 1; + li->num[li->link].platforms = 1; + + if (li->link >= sndrv_minor_devices) { + struct device *dev = simple_priv_to_dev(priv); + + dev_err(dev, "too many links "); + return -einval; + } + + li->num[li->link].cpus = 1; + li->num[li->link].codecs = 1; + li->num[li->link].platforms = 1; + + li->num[li->link].cpus = 1; + li->num[li->link].codecs = 1; + li->num[li->link].platforms = 1; + + li->num[0].cpus = 1; + li->num[0].codecs = 1; + li->num[0].platforms = 1; +
|
Audio
|
f2138aed231c88d5c4fa8d06aa15ad19685087c2
|
kuninori morimoto
|
include
|
sound
|
generic
|
asoc: tegra20: ac97: add reset control
|
tegra20 ac97 driver doesn't manage the ac97 controller reset, relying on implicit deassertion of the reset by tegra-clk driver, which needs to be fixed since this behaviour is unacceptable by other tegra drivers. add explicit reset control to the tegra20 ac97 driver.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add reset control
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ', 'tegra20', 'ac97']
|
['h', 'c']
| 2
| 22
| 0
|
--- diff --git a/sound/soc/tegra/tegra20_ac97.c b/sound/soc/tegra/tegra20_ac97.c --- a/sound/soc/tegra/tegra20_ac97.c +++ b/sound/soc/tegra/tegra20_ac97.c +#include <linux/reset.h> + ac97->reset = devm_reset_control_get_exclusive(&pdev->dev, "ac97"); + if (is_err(ac97->reset)) { + dev_err(&pdev->dev, "can't retrieve ac97 reset "); + return ptr_err(ac97->reset); + } + + ret = reset_control_assert(ac97->reset); + if (ret) { + dev_err(&pdev->dev, "failed to assert ac'97 reset: %d ", ret); + goto err_clk_put; + } + + usleep_range(10, 100); + + ret = reset_control_deassert(ac97->reset); + if (ret) { + dev_err(&pdev->dev, "failed to deassert ac'97 reset: %d ", ret); + goto err_clk_disable_unprepare; + } + diff --git a/sound/soc/tegra/tegra20_ac97.h b/sound/soc/tegra/tegra20_ac97.h --- a/sound/soc/tegra/tegra20_ac97.h +++ b/sound/soc/tegra/tegra20_ac97.h + struct reset_control *reset;
|
Audio
|
a46b78247b852345ae4458711a4aec6744a7838c
|
dmitry osipenko
|
sound
|
soc
|
tegra
|
asoc: tegra20: i2s: add reset control
|
the i2s reset may be asserted at a boot time, in particular this is the case on tegra20 ac100 netbook. tegra20 i2s driver doesn't manage the reset control and currently it happens to work because reset is implicitly deasserted by the tegra-clk driver when i2s clock is enabled. the i2s permanently stays in a reset once tegra-clk is fixed to not touch the resets, which it shouldn't be doing. add reset control to the tegra20 i2s driver.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add reset control
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ', 'tegra20', 'i2s']
|
['h', 'c']
| 2
| 32
| 0
|
--- diff --git a/sound/soc/tegra/tegra20_i2s.c b/sound/soc/tegra/tegra20_i2s.c --- a/sound/soc/tegra/tegra20_i2s.c +++ b/sound/soc/tegra/tegra20_i2s.c +#include <linux/reset.h> + regcache_cache_only(i2s->regmap, true); + + ret = reset_control_assert(i2s->reset); + if (ret) + return ret; + + usleep_range(10, 100); + + ret = reset_control_deassert(i2s->reset); + if (ret) + goto disable_clocks; + + regcache_cache_only(i2s->regmap, false); + regcache_mark_dirty(i2s->regmap); + + ret = regcache_sync(i2s->regmap); + if (ret) + goto disable_clocks; + + +disable_clocks: + clk_disable_unprepare(i2s->clk_i2s); + + return ret; + i2s->reset = devm_reset_control_get_exclusive(&pdev->dev, "i2s"); + if (is_err(i2s->reset)) { + dev_err(&pdev->dev, "can't retrieve i2s reset "); + return ptr_err(i2s->reset); + } + diff --git a/sound/soc/tegra/tegra20_i2s.h b/sound/soc/tegra/tegra20_i2s.h --- a/sound/soc/tegra/tegra20_i2s.h +++ b/sound/soc/tegra/tegra20_i2s.h + struct reset_control *reset;
|
Audio
|
9c648ef82d7d4696e80b286d37dae07b67a9a32d
|
dmitry osipenko
|
sound
|
soc
|
tegra
|
input: add support for azoteq iqs626a
|
this patch adds support for the azoteq iqs626a capacitive touch controller.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add support for azoteq iqs626a
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
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['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
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[]
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['kconfig', 'c', 'makefile']
| 3
| 1,850
| 0
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--- diff --git a/drivers/input/misc/kconfig b/drivers/input/misc/kconfig --- a/drivers/input/misc/kconfig +++ b/drivers/input/misc/kconfig +config input_iqs626a + tristate "azoteq iqs626a capacitive touch controller" + depends on i2c + select regmap_i2c + help + say y to enable support for the azoteq iqs626a capacitive + touch controller. + + to compile this driver as a module, choose m here: the + module will be called iqs626a. + diff --git a/drivers/input/misc/makefile b/drivers/input/misc/makefile --- a/drivers/input/misc/makefile +++ b/drivers/input/misc/makefile +obj-$(config_input_iqs626a) += iqs626a.o diff --git a/drivers/input/misc/iqs626a.c b/drivers/input/misc/iqs626a.c --- /dev/null +++ b/drivers/input/misc/iqs626a.c +// spdx-license-identifier: gpl-2.0+ +/* + * azoteq iqs626a capacitive touch controller + * + * copyright (c) 2020 jeff labundy <jeff@labundy.com> + * + * this driver registers up to 2 input devices: one representing capacitive or + * inductive keys as well as hall-effect switches, and one for a trackpad that + * can express various gestures. + */ + +#include <linux/bits.h> +#include <linux/completion.h> +#include <linux/delay.h> +#include <linux/device.h> +#include <linux/err.h> +#include <linux/i2c.h> +#include <linux/input.h> +#include <linux/input/touchscreen.h> +#include <linux/interrupt.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/of_device.h> +#include <linux/property.h> +#include <linux/regmap.h> +#include <linux/slab.h> + +#define iqs626_ver_info 0x00 +#define iqs626_ver_info_prod_num 0x51 + +#define iqs626_sys_flags 0x02 +#define iqs626_sys_flags_show_reset bit(15) +#define iqs626_sys_flags_in_ati bit(12) +#define iqs626_sys_flags_pwr_mode_mask genmask(9, 8) +#define iqs626_sys_flags_pwr_mode_shift 8 + +#define iqs626_hall_output 0x23 + +#define iqs626_sys_settings 0x80 +#define iqs626_sys_settings_clk_div bit(15) +#define iqs626_sys_settings_ulp_auto bit(14) +#define iqs626_sys_settings_dis_auto bit(13) +#define iqs626_sys_settings_pwr_mode_mask genmask(12, 11) +#define iqs626_sys_settings_pwr_mode_shift 11 +#define iqs626_sys_settings_pwr_mode_max 3 +#define iqs626_sys_settings_ulp_update_mask genmask(10, 8) +#define iqs626_sys_settings_ulp_update_shift 8 +#define iqs626_sys_settings_ulp_update_max 7 +#define iqs626_sys_settings_event_mode bit(5) +#define iqs626_sys_settings_event_mode_lp bit(4) +#define iqs626_sys_settings_redo_ati bit(2) +#define iqs626_sys_settings_ack_reset bit(0) + +#define iqs626_misc_a_ati_band_disable bit(7) +#define iqs626_misc_a_tpx_lta_update_mask genmask(6, 4) +#define iqs626_misc_a_tpx_lta_update_shift 4 +#define iqs626_misc_a_tpx_lta_update_max 7 +#define iqs626_misc_a_ati_lp_only bit(3) +#define iqs626_misc_a_gpio3_select_mask genmask(2, 0) +#define iqs626_misc_a_gpio3_select_max 7 + +#define iqs626_event_mask_sys bit(6) +#define iqs626_event_mask_gesture bit(3) +#define iqs626_event_mask_deep bit(2) +#define iqs626_event_mask_touch bit(1) +#define iqs626_event_mask_prox bit(0) + +#define iqs626_rate_np_ms_max 255 +#define iqs626_rate_lp_ms_max 255 +#define iqs626_rate_ulp_ms_max 4080 +#define iqs626_timeout_pwr_ms_max 130560 +#define iqs626_timeout_lta_ms_max 130560 + +#define iqs626_misc_b_reseed_ui_sel_mask genmask(7, 6) +#define iqs626_misc_b_reseed_ui_sel_shift 6 +#define iqs626_misc_b_reseed_ui_sel_max 3 +#define iqs626_misc_b_thresh_extend bit(5) +#define iqs626_misc_b_tracking_ui_enable bit(4) +#define iqs626_misc_b_tpx_swipe bit(3) +#define iqs626_misc_b_reseed_offset bit(2) +#define iqs626_misc_b_filt_str_tpx genmask(1, 0) + +#define iqs626_thresh_swipe_max 255 +#define iqs626_timeout_tap_ms_max 4080 +#define iqs626_timeout_swipe_ms_max 4080 + +#define iqs626_chx_eng_0_meas_cap_size bit(7) +#define iqs626_chx_eng_0_rx_term_vss bit(5) +#define iqs626_chx_eng_0_linearize bit(4) +#define iqs626_chx_eng_0_dual_dir bit(3) +#define iqs626_chx_eng_0_filt_disable bit(2) +#define iqs626_chx_eng_0_ati_mode_mask genmask(1, 0) +#define iqs626_chx_eng_0_ati_mode_max 3 + +#define iqs626_chx_eng_1_cct_high_1 bit(7) +#define iqs626_chx_eng_1_cct_high_0 bit(6) +#define iqs626_chx_eng_1_proj_bias_mask genmask(5, 4) +#define iqs626_chx_eng_1_proj_bias_shift 4 +#define iqs626_chx_eng_1_proj_bias_max 3 +#define iqs626_chx_eng_1_cct_enable bit(3) +#define iqs626_chx_eng_1_sense_freq_mask genmask(2, 1) +#define iqs626_chx_eng_1_sense_freq_shift 1 +#define iqs626_chx_eng_1_sense_freq_max 3 +#define iqs626_chx_eng_1_ati_band_tighten bit(0) + +#define iqs626_chx_eng_2_local_cap_mask genmask(7, 6) +#define iqs626_chx_eng_2_local_cap_shift 6 +#define iqs626_chx_eng_2_local_cap_max 3 +#define iqs626_chx_eng_2_local_cap_enable bit(5) +#define iqs626_chx_eng_2_sense_mode_mask genmask(3, 0) +#define iqs626_chx_eng_2_sense_mode_max 15 + +#define iqs626_chx_eng_3_tx_freq_mask genmask(5, 4) +#define iqs626_chx_eng_3_tx_freq_shift 4 +#define iqs626_chx_eng_3_tx_freq_max 3 +#define iqs626_chx_eng_3_inv_logic bit(0) + +#define iqs626_chx_eng_4_rx_term_vreg bit(6) +#define iqs626_chx_eng_4_cct_low_1 bit(5) +#define iqs626_chx_eng_4_cct_low_0 bit(4) +#define iqs626_chx_eng_4_comp_disable bit(1) +#define iqs626_chx_eng_4_static_enable bit(0) + +#define iqs626_tpx_ati_base_min 45 +#define iqs626_tpx_ati_base_max 300 +#define iqs626_chx_ati_base_mask genmask(7, 6) +#define iqs626_chx_ati_base_75 0x00 +#define iqs626_chx_ati_base_100 0x40 +#define iqs626_chx_ati_base_150 0x80 +#define iqs626_chx_ati_base_200 0xc0 +#define iqs626_chx_ati_target_mask genmask(5, 0) +#define iqs626_chx_ati_target_max 2016 + +#define iqs626_chx_thresh_max 255 +#define iqs626_chx_hyst_deep_mask genmask(7, 4) +#define iqs626_chx_hyst_deep_shift 4 +#define iqs626_chx_hyst_touch_mask genmask(3, 0) +#define iqs626_chx_hyst_max 15 + +#define iqs626_filt_str_np_tpx_mask genmask(7, 6) +#define iqs626_filt_str_np_tpx_shift 6 +#define iqs626_filt_str_lp_tpx_mask genmask(5, 4) +#define iqs626_filt_str_lp_tpx_shift 4 + +#define iqs626_filt_str_np_cnt_mask genmask(7, 6) +#define iqs626_filt_str_np_cnt_shift 6 +#define iqs626_filt_str_lp_cnt_mask genmask(5, 4) +#define iqs626_filt_str_lp_cnt_shift 4 +#define iqs626_filt_str_np_lta_mask genmask(3, 2) +#define iqs626_filt_str_np_lta_shift 2 +#define iqs626_filt_str_lp_lta_mask genmask(1, 0) +#define iqs626_filt_str_max 3 + +#define iqs626_ulp_proj_enable bit(4) +#define iqs626_gen_weight_max 255 + +#define iqs626_max_reg 0xff + +#define iqs626_num_ch_tp_3 9 +#define iqs626_num_ch_tp_2 6 +#define iqs626_num_ch_gen 3 +#define iqs626_num_crx_tx 8 + +#define iqs626_pwr_mode_poll_sleep_us 50000 +#define iqs626_pwr_mode_poll_timeout_us 500000 + +#define iqs626_irq_wait() usleep_range(350, 400) + +enum iqs626_ch_id { + iqs626_ch_ulp_0, + iqs626_ch_tp_2, + iqs626_ch_tp_3, + iqs626_ch_gen_0, + iqs626_ch_gen_1, + iqs626_ch_gen_2, + iqs626_ch_hall, +}; + +enum iqs626_rx_inactive { + iqs626_rx_inactive_vss, + iqs626_rx_inactive_float, + iqs626_rx_inactive_vreg, +}; + +enum iqs626_st_offs { + iqs626_st_offs_prox, + iqs626_st_offs_dir, + iqs626_st_offs_touch, + iqs626_st_offs_deep, +}; + +enum iqs626_th_offs { + iqs626_th_offs_prox, + iqs626_th_offs_touch, + iqs626_th_offs_deep, +}; + +enum iqs626_event_id { + iqs626_event_prox_dn, + iqs626_event_prox_up, + iqs626_event_touch_dn, + iqs626_event_touch_up, + iqs626_event_deep_dn, + iqs626_event_deep_up, +}; + +enum iqs626_gesture_id { + iqs626_gesture_flick_x_pos, + iqs626_gesture_flick_x_neg, + iqs626_gesture_flick_y_pos, + iqs626_gesture_flick_y_neg, + iqs626_gesture_tap, + iqs626_gesture_hold, + iqs626_num_gestures, +}; + +struct iqs626_event_desc { + const char *name; + enum iqs626_st_offs st_offs; + enum iqs626_th_offs th_offs; + bool dir_up; + u8 mask; +}; + +static const struct iqs626_event_desc iqs626_events[] = { + [iqs626_event_prox_dn] = { + .name = "event-prox", + .st_offs = iqs626_st_offs_prox, + .th_offs = iqs626_th_offs_prox, + .mask = iqs626_event_mask_prox, + }, + [iqs626_event_prox_up] = { + .name = "event-prox-alt", + .st_offs = iqs626_st_offs_prox, + .th_offs = iqs626_th_offs_prox, + .dir_up = true, + .mask = iqs626_event_mask_prox, + }, + [iqs626_event_touch_dn] = { + .name = "event-touch", + .st_offs = iqs626_st_offs_touch, + .th_offs = iqs626_th_offs_touch, + .mask = iqs626_event_mask_touch, + }, + [iqs626_event_touch_up] = { + .name = "event-touch-alt", + .st_offs = iqs626_st_offs_touch, + .th_offs = iqs626_th_offs_touch, + .dir_up = true, + .mask = iqs626_event_mask_touch, + }, + [iqs626_event_deep_dn] = { + .name = "event-deep", + .st_offs = iqs626_st_offs_deep, + .th_offs = iqs626_th_offs_deep, + .mask = iqs626_event_mask_deep, + }, + [iqs626_event_deep_up] = { + .name = "event-deep-alt", + .st_offs = iqs626_st_offs_deep, + .th_offs = iqs626_th_offs_deep, + .dir_up = true, + .mask = iqs626_event_mask_deep, + }, +}; + +struct iqs626_ver_info { + u8 prod_num; + u8 sw_num; + u8 hw_num; + u8 padding; +} __packed; + +struct iqs626_flags { + __be16 system; + u8 gesture; + u8 padding_a; + u8 states[4]; + u8 ref_active; + u8 padding_b; + u8 comp_min; + u8 comp_max; + u8 trackpad_x; + u8 trackpad_y; +} __packed; + +struct iqs626_ch_reg_ulp { + u8 thresh[2]; + u8 hyst; + u8 filter; + u8 engine[2]; + u8 ati_target; + u8 padding; + __be16 ati_comp; + u8 rx_enable; + u8 tx_enable; +} __packed; + +struct iqs626_ch_reg_tp { + u8 thresh; + u8 ati_base; + __be16 ati_comp; +} __packed; + +struct iqs626_tp_grp_reg { + u8 hyst; + u8 ati_target; + u8 engine[2]; + struct iqs626_ch_reg_tp ch_reg_tp[iqs626_num_ch_tp_3]; +} __packed; + +struct iqs626_ch_reg_gen { + u8 thresh[3]; + u8 padding; + u8 hyst; + u8 ati_target; + __be16 ati_comp; + u8 engine[5]; + u8 filter; + u8 rx_enable; + u8 tx_enable; + u8 assoc_select; + u8 assoc_weight; +} __packed; + +struct iqs626_ch_reg_hall { + u8 engine; + u8 thresh; + u8 hyst; + u8 ati_target; + __be16 ati_comp; +} __packed; + +struct iqs626_sys_reg { + __be16 general; + u8 misc_a; + u8 event_mask; + u8 active; + u8 reseed; + u8 rate_np; + u8 rate_lp; + u8 rate_ulp; + u8 timeout_pwr; + u8 timeout_rdy; + u8 timeout_lta; + u8 misc_b; + u8 thresh_swipe; + u8 timeout_tap; + u8 timeout_swipe; + u8 redo_ati; + u8 padding; + struct iqs626_ch_reg_ulp ch_reg_ulp; + struct iqs626_tp_grp_reg tp_grp_reg; + struct iqs626_ch_reg_gen ch_reg_gen[iqs626_num_ch_gen]; + struct iqs626_ch_reg_hall ch_reg_hall; +} __packed; + +struct iqs626_channel_desc { + const char *name; + int num_ch; + u8 active; + bool events[array_size(iqs626_events)]; +}; + +static const struct iqs626_channel_desc iqs626_channels[] = { + [iqs626_ch_ulp_0] = { + .name = "ulp-0", + .num_ch = 1, + .active = bit(0), + .events = { + [iqs626_event_prox_dn] = true, + [iqs626_event_prox_up] = true, + [iqs626_event_touch_dn] = true, + [iqs626_event_touch_up] = true, + }, + }, + [iqs626_ch_tp_2] = { + .name = "trackpad-3x2", + .num_ch = iqs626_num_ch_tp_2, + .active = bit(1), + .events = { + [iqs626_event_touch_dn] = true, + }, + }, + [iqs626_ch_tp_3] = { + .name = "trackpad-3x3", + .num_ch = iqs626_num_ch_tp_3, + .active = bit(2) | bit(1), + .events = { + [iqs626_event_touch_dn] = true, + }, + }, + [iqs626_ch_gen_0] = { + .name = "generic-0", + .num_ch = 1, + .active = bit(4), + .events = { + [iqs626_event_prox_dn] = true, + [iqs626_event_prox_up] = true, + [iqs626_event_touch_dn] = true, + [iqs626_event_touch_up] = true, + [iqs626_event_deep_dn] = true, + [iqs626_event_deep_up] = true, + }, + }, + [iqs626_ch_gen_1] = { + .name = "generic-1", + .num_ch = 1, + .active = bit(5), + .events = { + [iqs626_event_prox_dn] = true, + [iqs626_event_prox_up] = true, + [iqs626_event_touch_dn] = true, + [iqs626_event_touch_up] = true, + [iqs626_event_deep_dn] = true, + [iqs626_event_deep_up] = true, + }, + }, + [iqs626_ch_gen_2] = { + .name = "generic-2", + .num_ch = 1, + .active = bit(6), + .events = { + [iqs626_event_prox_dn] = true, + [iqs626_event_prox_up] = true, + [iqs626_event_touch_dn] = true, + [iqs626_event_touch_up] = true, + [iqs626_event_deep_dn] = true, + [iqs626_event_deep_up] = true, + }, + }, + [iqs626_ch_hall] = { + .name = "hall", + .num_ch = 1, + .active = bit(7), + .events = { + [iqs626_event_touch_dn] = true, + [iqs626_event_touch_up] = true, + }, + }, +}; + +struct iqs626_private { + struct i2c_client *client; + struct regmap *regmap; + struct iqs626_sys_reg sys_reg; + struct completion ati_done; + struct input_dev *keypad; + struct input_dev *trackpad; + struct touchscreen_properties prop; + unsigned int kp_type[array_size(iqs626_channels)] + [array_size(iqs626_events)]; + unsigned int kp_code[array_size(iqs626_channels)] + [array_size(iqs626_events)]; + unsigned int tp_code[iqs626_num_gestures]; + unsigned int suspend_mode; +}; + +static int iqs626_parse_events(struct iqs626_private *iqs626, + const struct fwnode_handle *ch_node, + enum iqs626_ch_id ch_id) +{ + struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg; + struct i2c_client *client = iqs626->client; + const struct fwnode_handle *ev_node; + const char *ev_name; + u8 *thresh, *hyst; + unsigned int thresh_tp[iqs626_num_ch_tp_3]; + unsigned int val; + int num_ch = iqs626_channels[ch_id].num_ch; + int error, i, j; + + switch (ch_id) { + case iqs626_ch_ulp_0: + thresh = sys_reg->ch_reg_ulp.thresh; + hyst = &sys_reg->ch_reg_ulp.hyst; + break; + + case iqs626_ch_tp_2: + case iqs626_ch_tp_3: + thresh = &sys_reg->tp_grp_reg.ch_reg_tp[0].thresh; + hyst = &sys_reg->tp_grp_reg.hyst; + break; + + case iqs626_ch_gen_0: + case iqs626_ch_gen_1: + case iqs626_ch_gen_2: + i = ch_id - iqs626_ch_gen_0; + thresh = sys_reg->ch_reg_gen[i].thresh; + hyst = &sys_reg->ch_reg_gen[i].hyst; + break; + + case iqs626_ch_hall: + thresh = &sys_reg->ch_reg_hall.thresh; + hyst = &sys_reg->ch_reg_hall.hyst; + break; + + default: + return -einval; + } + + for (i = 0; i < array_size(iqs626_events); i++) { + if (!iqs626_channels[ch_id].events[i]) + continue; + + if (ch_id == iqs626_ch_tp_2 || ch_id == iqs626_ch_tp_3) { + /* + * trackpad touch events are simply described under the + * trackpad child node. + */ + ev_node = ch_node; + } else { + ev_name = iqs626_events[i].name; + ev_node = fwnode_get_named_child_node(ch_node, ev_name); + if (!ev_node) + continue; + + if (!fwnode_property_read_u32(ev_node, "linux,code", + &val)) { + iqs626->kp_code[ch_id][i] = val; + + if (fwnode_property_read_u32(ev_node, + "linux,input-type", + &val)) { + if (ch_id == iqs626_ch_hall) + val = ev_sw; + else + val = ev_key; + } + + if (val != ev_key && val != ev_sw) { + dev_err(&client->dev, + "invalid input type: %u ", + val); + return -einval; + } + + iqs626->kp_type[ch_id][i] = val; + + sys_reg->event_mask &= ~iqs626_events[i].mask; + } + } + + if (!fwnode_property_read_u32(ev_node, "azoteq,hyst", &val)) { + if (val > iqs626_chx_hyst_max) { + dev_err(&client->dev, + "invalid %s channel hysteresis: %u ", + fwnode_get_name(ch_node), val); + return -einval; + } + + if (i == iqs626_event_deep_dn || + i == iqs626_event_deep_up) { + *hyst &= ~iqs626_chx_hyst_deep_mask; + *hyst |= (val << iqs626_chx_hyst_deep_shift); + } else if (i == iqs626_event_touch_dn || + i == iqs626_event_touch_up) { + *hyst &= ~iqs626_chx_hyst_touch_mask; + *hyst |= val; + } + } + + if (ch_id != iqs626_ch_tp_2 && ch_id != iqs626_ch_tp_3 && + !fwnode_property_read_u32(ev_node, "azoteq,thresh", &val)) { + if (val > iqs626_chx_thresh_max) { + dev_err(&client->dev, + "invalid %s channel threshold: %u ", + fwnode_get_name(ch_node), val); + return -einval; + } + + if (ch_id == iqs626_ch_hall) + *thresh = val; + else + *(thresh + iqs626_events[i].th_offs) = val; + + continue; + } + + if (!fwnode_property_present(ev_node, "azoteq,thresh")) + continue; + + error = fwnode_property_read_u32_array(ev_node, "azoteq,thresh", + thresh_tp, num_ch); + if (error) { + dev_err(&client->dev, + "failed to read %s channel thresholds: %d ", + fwnode_get_name(ch_node), error); + return error; + } + + for (j = 0; j < num_ch; j++) { + if (thresh_tp[j] > iqs626_chx_thresh_max) { + dev_err(&client->dev, + "invalid %s channel threshold: %u ", + fwnode_get_name(ch_node), thresh_tp[j]); + return -einval; + } + + sys_reg->tp_grp_reg.ch_reg_tp[j].thresh = thresh_tp[j]; + } + } + + return 0; +} + +static int iqs626_parse_ati_target(struct iqs626_private *iqs626, + const struct fwnode_handle *ch_node, + enum iqs626_ch_id ch_id) +{ + struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg; + struct i2c_client *client = iqs626->client; + unsigned int ati_base[iqs626_num_ch_tp_3]; + unsigned int val; + u8 *ati_target; + int num_ch = iqs626_channels[ch_id].num_ch; + int error, i; + + switch (ch_id) { + case iqs626_ch_ulp_0: + ati_target = &sys_reg->ch_reg_ulp.ati_target; + break; + + case iqs626_ch_tp_2: + case iqs626_ch_tp_3: + ati_target = &sys_reg->tp_grp_reg.ati_target; + break; + + case iqs626_ch_gen_0: + case iqs626_ch_gen_1: + case iqs626_ch_gen_2: + i = ch_id - iqs626_ch_gen_0; + ati_target = &sys_reg->ch_reg_gen[i].ati_target; + break; + + case iqs626_ch_hall: + ati_target = &sys_reg->ch_reg_hall.ati_target; + break; + + default: + return -einval; + } + + if (!fwnode_property_read_u32(ch_node, "azoteq,ati-target", &val)) { + if (val > iqs626_chx_ati_target_max) { + dev_err(&client->dev, + "invalid %s channel ati target: %u ", + fwnode_get_name(ch_node), val); + return -einval; + } + + *ati_target &= ~iqs626_chx_ati_target_mask; + *ati_target |= (val / 32); + } + + if (ch_id != iqs626_ch_tp_2 && ch_id != iqs626_ch_tp_3 && + !fwnode_property_read_u32(ch_node, "azoteq,ati-base", &val)) { + switch (val) { + case 75: + val = iqs626_chx_ati_base_75; + break; + + case 100: + val = iqs626_chx_ati_base_100; + break; + + case 150: + val = iqs626_chx_ati_base_150; + break; + + case 200: + val = iqs626_chx_ati_base_200; + break; + + default: + dev_err(&client->dev, + "invalid %s channel ati base: %u ", + fwnode_get_name(ch_node), val); + return -einval; + } + + *ati_target &= ~iqs626_chx_ati_base_mask; + *ati_target |= val; + + return 0; + } + + if (!fwnode_property_present(ch_node, "azoteq,ati-base")) + return 0; + + error = fwnode_property_read_u32_array(ch_node, "azoteq,ati-base", + ati_base, num_ch); + if (error) { + dev_err(&client->dev, + "failed to read %s channel ati bases: %d ", + fwnode_get_name(ch_node), error); + return error; + } + + for (i = 0; i < num_ch; i++) { + if (ati_base[i] < iqs626_tpx_ati_base_min || + ati_base[i] > iqs626_tpx_ati_base_max) { + dev_err(&client->dev, + "invalid %s channel ati base: %u ", + fwnode_get_name(ch_node), ati_base[i]); + return -einval; + } + + ati_base[i] -= iqs626_tpx_ati_base_min; + sys_reg->tp_grp_reg.ch_reg_tp[i].ati_base = ati_base[i]; + } + + return 0; +} + +static int iqs626_parse_pins(struct iqs626_private *iqs626, + const struct fwnode_handle *ch_node, + const char *propname, u8 *enable) +{ + struct i2c_client *client = iqs626->client; + unsigned int val[iqs626_num_crx_tx]; + int error, count, i; + + if (!fwnode_property_present(ch_node, propname)) + return 0; + + count = fwnode_property_count_u32(ch_node, propname); + if (count > iqs626_num_crx_tx) { + dev_err(&client->dev, + "too many %s channel crx/tx pins present ", + fwnode_get_name(ch_node)); + return -einval; + } else if (count < 0) { + dev_err(&client->dev, + "failed to count %s channel crx/tx pins: %d ", + fwnode_get_name(ch_node), count); + return count; + } + + error = fwnode_property_read_u32_array(ch_node, propname, val, count); + if (error) { + dev_err(&client->dev, + "failed to read %s channel crx/tx pins: %d ", + fwnode_get_name(ch_node), error); + return error; + } + + *enable = 0; + + for (i = 0; i < count; i++) { + if (val[i] >= iqs626_num_crx_tx) { + dev_err(&client->dev, + "invalid %s channel crx/tx pin: %u ", + fwnode_get_name(ch_node), val[i]); + return -einval; + } + + *enable |= bit(val[i]); + } + + return 0; +} + +static int iqs626_parse_trackpad(struct iqs626_private *iqs626, + const struct fwnode_handle *ch_node) +{ + struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg; + struct i2c_client *client = iqs626->client; + u8 *hyst = &sys_reg->tp_grp_reg.hyst; + unsigned int val; + int error, count; + + if (!fwnode_property_read_u32(ch_node, "azoteq,lta-update", &val)) { + if (val > iqs626_misc_a_tpx_lta_update_max) { + dev_err(&client->dev, + "invalid %s channel update rate: %u ", + fwnode_get_name(ch_node), val); + return -einval; + } + + sys_reg->misc_a &= ~iqs626_misc_a_tpx_lta_update_mask; + sys_reg->misc_a |= (val << iqs626_misc_a_tpx_lta_update_shift); + } + + if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-trackpad", + &val)) { + if (val > iqs626_filt_str_max) { + dev_err(&client->dev, + "invalid %s channel filter strength: %u ", + fwnode_get_name(ch_node), val); + return -einval; + } + + sys_reg->misc_b &= ~iqs626_misc_b_filt_str_tpx; + sys_reg->misc_b |= val; + } + + if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-np-cnt", + &val)) { + if (val > iqs626_filt_str_max) { + dev_err(&client->dev, + "invalid %s channel filter strength: %u ", + fwnode_get_name(ch_node), val); + return -einval; + } + + *hyst &= ~iqs626_filt_str_np_tpx_mask; + *hyst |= (val << iqs626_filt_str_np_tpx_shift); + } + + if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-lp-cnt", + &val)) { + if (val > iqs626_filt_str_max) { + dev_err(&client->dev, + "invalid %s channel filter strength: %u ", + fwnode_get_name(ch_node), val); + return -einval; + } + + *hyst &= ~iqs626_filt_str_lp_tpx_mask; + *hyst |= (val << iqs626_filt_str_lp_tpx_shift); + } + + if (!fwnode_property_present(ch_node, "linux,keycodes")) + return 0; + + count = fwnode_property_count_u32(ch_node, "linux,keycodes"); + if (count > iqs626_num_gestures) { + dev_err(&client->dev, "too many keycodes present "); + return -einval; + } else if (count < 0) { + dev_err(&client->dev, "failed to count keycodes: %d ", count); + return count; + } + + error = fwnode_property_read_u32_array(ch_node, "linux,keycodes", + iqs626->tp_code, count); + if (error) { + dev_err(&client->dev, "failed to read keycodes: %d ", error); + return error; + } + + sys_reg->misc_b &= ~iqs626_misc_b_tpx_swipe; + if (fwnode_property_present(ch_node, "azoteq,gesture-swipe")) + sys_reg->misc_b |= iqs626_misc_b_tpx_swipe; + + if (!fwnode_property_read_u32(ch_node, "azoteq,timeout-tap-ms", + &val)) { + if (val > iqs626_timeout_tap_ms_max) { + dev_err(&client->dev, + "invalid %s channel timeout: %u ", + fwnode_get_name(ch_node), val); + return -einval; + } + + sys_reg->timeout_tap = val / 16; + } + + if (!fwnode_property_read_u32(ch_node, "azoteq,timeout-swipe-ms", + &val)) { + if (val > iqs626_timeout_swipe_ms_max) { + dev_err(&client->dev, + "invalid %s channel timeout: %u ", + fwnode_get_name(ch_node), val); + return -einval; + } + + sys_reg->timeout_swipe = val / 16; + } + + if (!fwnode_property_read_u32(ch_node, "azoteq,thresh-swipe", + &val)) { + if (val > iqs626_thresh_swipe_max) { + dev_err(&client->dev, + "invalid %s channel threshold: %u ", + fwnode_get_name(ch_node), val); + return -einval; + } + + sys_reg->thresh_swipe = val; + } + + sys_reg->event_mask &= ~iqs626_event_mask_gesture; + + return 0; +} + +static int iqs626_parse_channel(struct iqs626_private *iqs626, + const struct fwnode_handle *ch_node, + enum iqs626_ch_id ch_id) +{ + struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg; + struct i2c_client *client = iqs626->client; + u8 *engine, *filter, *rx_enable, *tx_enable; + u8 *assoc_select, *assoc_weight; + unsigned int val; + int error, i; + + switch (ch_id) { + case iqs626_ch_ulp_0: + engine = sys_reg->ch_reg_ulp.engine; + break; + + case iqs626_ch_tp_2: + case iqs626_ch_tp_3: + engine = sys_reg->tp_grp_reg.engine; + break; + + case iqs626_ch_gen_0: + case iqs626_ch_gen_1: + case iqs626_ch_gen_2: + i = ch_id - iqs626_ch_gen_0; + engine = sys_reg->ch_reg_gen[i].engine; + break; + + case iqs626_ch_hall: + engine = &sys_reg->ch_reg_hall.engine; + break; + + default: + return -einval; + } + + *engine |= iqs626_chx_eng_0_meas_cap_size; + if (fwnode_property_present(ch_node, "azoteq,meas-cap-decrease")) + *engine &= ~iqs626_chx_eng_0_meas_cap_size; + + *engine |= iqs626_chx_eng_0_rx_term_vss; + if (!fwnode_property_read_u32(ch_node, "azoteq,rx-inactive", &val)) { + switch (val) { + case iqs626_rx_inactive_vss: + break; + + case iqs626_rx_inactive_float: + *engine &= ~iqs626_chx_eng_0_rx_term_vss; + if (ch_id == iqs626_ch_gen_0 || + ch_id == iqs626_ch_gen_1 || + ch_id == iqs626_ch_gen_2) + *(engine + 4) &= ~iqs626_chx_eng_4_rx_term_vreg; + break; + + case iqs626_rx_inactive_vreg: + if (ch_id == iqs626_ch_gen_0 || + ch_id == iqs626_ch_gen_1 || + ch_id == iqs626_ch_gen_2) { + *engine &= ~iqs626_chx_eng_0_rx_term_vss; + *(engine + 4) |= iqs626_chx_eng_4_rx_term_vreg; + break; + } + fallthrough; + + default: + dev_err(&client->dev, + "invalid %s channel crx pin termination: %u ", + fwnode_get_name(ch_node), val); + return -einval; + } + } + + *engine &= ~iqs626_chx_eng_0_linearize; + if (fwnode_property_present(ch_node, "azoteq,linearize")) + *engine |= iqs626_chx_eng_0_linearize; + + *engine &= ~iqs626_chx_eng_0_dual_dir; + if (fwnode_property_present(ch_node, "azoteq,dual-direction")) + *engine |= iqs626_chx_eng_0_dual_dir; + + *engine &= ~iqs626_chx_eng_0_filt_disable; + if (fwnode_property_present(ch_node, "azoteq,filt-disable")) + *engine |= iqs626_chx_eng_0_filt_disable; + + if (!fwnode_property_read_u32(ch_node, "azoteq,ati-mode", &val)) { + if (val > iqs626_chx_eng_0_ati_mode_max) { + dev_err(&client->dev, + "invalid %s channel ati mode: %u ", + fwnode_get_name(ch_node), val); + return -einval; + } + + *engine &= ~iqs626_chx_eng_0_ati_mode_mask; + *engine |= val; + } + + if (ch_id == iqs626_ch_hall) + return 0; + + *(engine + 1) &= ~iqs626_chx_eng_1_cct_enable; + if (!fwnode_property_read_u32(ch_node, "azoteq,cct-increase", + &val) && val) { + unsigned int orig_val = val--; + + /* + * in the case of the generic channels, the charge cycle time + * field doubles in size and straddles two separate registers. + */ + if (ch_id == iqs626_ch_gen_0 || + ch_id == iqs626_ch_gen_1 || + ch_id == iqs626_ch_gen_2) { + *(engine + 4) &= ~iqs626_chx_eng_4_cct_low_1; + if (val & bit(1)) + *(engine + 4) |= iqs626_chx_eng_4_cct_low_1; + + *(engine + 4) &= ~iqs626_chx_eng_4_cct_low_0; + if (val & bit(0)) + *(engine + 4) |= iqs626_chx_eng_4_cct_low_0; + + val >>= 2; + } + + if (val & ~genmask(1, 0)) { + dev_err(&client->dev, + "invalid %s channel charge cycle time: %u ", + fwnode_get_name(ch_node), orig_val); + return -einval; + } + + *(engine + 1) &= ~iqs626_chx_eng_1_cct_high_1; + if (val & bit(1)) + *(engine + 1) |= iqs626_chx_eng_1_cct_high_1; + + *(engine + 1) &= ~iqs626_chx_eng_1_cct_high_0; + if (val & bit(0)) + *(engine + 1) |= iqs626_chx_eng_1_cct_high_0; + + *(engine + 1) |= iqs626_chx_eng_1_cct_enable; + } + + if (!fwnode_property_read_u32(ch_node, "azoteq,proj-bias", &val)) { + if (val > iqs626_chx_eng_1_proj_bias_max) { + dev_err(&client->dev, + "invalid %s channel bias current: %u ", + fwnode_get_name(ch_node), val); + return -einval; + } + + *(engine + 1) &= ~iqs626_chx_eng_1_proj_bias_mask; + *(engine + 1) |= (val << iqs626_chx_eng_1_proj_bias_shift); + } + + if (!fwnode_property_read_u32(ch_node, "azoteq,sense-freq", &val)) { + if (val > iqs626_chx_eng_1_sense_freq_max) { + dev_err(&client->dev, + "invalid %s channel sensing frequency: %u ", + fwnode_get_name(ch_node), val); + return -einval; + } + + *(engine + 1) &= ~iqs626_chx_eng_1_sense_freq_mask; + *(engine + 1) |= (val << iqs626_chx_eng_1_sense_freq_shift); + } + + *(engine + 1) &= ~iqs626_chx_eng_1_ati_band_tighten; + if (fwnode_property_present(ch_node, "azoteq,ati-band-tighten")) + *(engine + 1) |= iqs626_chx_eng_1_ati_band_tighten; + + if (ch_id == iqs626_ch_tp_2 || ch_id == iqs626_ch_tp_3) + return iqs626_parse_trackpad(iqs626, ch_node); + + if (ch_id == iqs626_ch_ulp_0) { + sys_reg->ch_reg_ulp.hyst &= ~iqs626_ulp_proj_enable; + if (fwnode_property_present(ch_node, "azoteq,proj-enable")) + sys_reg->ch_reg_ulp.hyst |= iqs626_ulp_proj_enable; + + filter = &sys_reg->ch_reg_ulp.filter; + + rx_enable = &sys_reg->ch_reg_ulp.rx_enable; + tx_enable = &sys_reg->ch_reg_ulp.tx_enable; + } else { + i = ch_id - iqs626_ch_gen_0; + filter = &sys_reg->ch_reg_gen[i].filter; + + rx_enable = &sys_reg->ch_reg_gen[i].rx_enable; + tx_enable = &sys_reg->ch_reg_gen[i].tx_enable; + } + + if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-np-cnt", + &val)) { + if (val > iqs626_filt_str_max) { + dev_err(&client->dev, + "invalid %s channel filter strength: %u ", + fwnode_get_name(ch_node), val); + return -einval; + } + + *filter &= ~iqs626_filt_str_np_cnt_mask; + *filter |= (val << iqs626_filt_str_np_cnt_shift); + } + + if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-lp-cnt", + &val)) { + if (val > iqs626_filt_str_max) { + dev_err(&client->dev, + "invalid %s channel filter strength: %u ", + fwnode_get_name(ch_node), val); + return -einval; + } + + *filter &= ~iqs626_filt_str_lp_cnt_mask; + *filter |= (val << iqs626_filt_str_lp_cnt_shift); + } + + if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-np-lta", + &val)) { + if (val > iqs626_filt_str_max) { + dev_err(&client->dev, + "invalid %s channel filter strength: %u ", + fwnode_get_name(ch_node), val); + return -einval; + } + + *filter &= ~iqs626_filt_str_np_lta_mask; + *filter |= (val << iqs626_filt_str_np_lta_shift); + } + + if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-lp-lta", + &val)) { + if (val > iqs626_filt_str_max) { + dev_err(&client->dev, + "invalid %s channel filter strength: %u ", + fwnode_get_name(ch_node), val); + return -einval; + } + + *filter &= ~iqs626_filt_str_lp_lta_mask; + *filter |= val; + } + + error = iqs626_parse_pins(iqs626, ch_node, "azoteq,rx-enable", + rx_enable); + if (error) + return error; + + error = iqs626_parse_pins(iqs626, ch_node, "azoteq,tx-enable", + tx_enable); + if (error) + return error; + + if (ch_id == iqs626_ch_ulp_0) + return 0; + + *(engine + 2) &= ~iqs626_chx_eng_2_local_cap_enable; + if (!fwnode_property_read_u32(ch_node, "azoteq,local-cap-size", + &val) && val) { + unsigned int orig_val = val--; + + if (val > iqs626_chx_eng_2_local_cap_max) { + dev_err(&client->dev, + "invalid %s channel local cap. size: %u ", + fwnode_get_name(ch_node), orig_val); + return -einval; + } + + *(engine + 2) &= ~iqs626_chx_eng_2_local_cap_mask; + *(engine + 2) |= (val << iqs626_chx_eng_2_local_cap_shift); + + *(engine + 2) |= iqs626_chx_eng_2_local_cap_enable; + } + + if (!fwnode_property_read_u32(ch_node, "azoteq,sense-mode", &val)) { + if (val > iqs626_chx_eng_2_sense_mode_max) { + dev_err(&client->dev, + "invalid %s channel sensing mode: %u ", + fwnode_get_name(ch_node), val); + return -einval; + } + + *(engine + 2) &= ~iqs626_chx_eng_2_sense_mode_mask; + *(engine + 2) |= val; + } + + if (!fwnode_property_read_u32(ch_node, "azoteq,tx-freq", &val)) { + if (val > iqs626_chx_eng_3_tx_freq_max) { + dev_err(&client->dev, + "invalid %s channel excitation frequency: %u ", + fwnode_get_name(ch_node), val); + return -einval; + } + + *(engine + 3) &= ~iqs626_chx_eng_3_tx_freq_mask; + *(engine + 3) |= (val << iqs626_chx_eng_3_tx_freq_shift); + } + + *(engine + 3) &= ~iqs626_chx_eng_3_inv_logic; + if (fwnode_property_present(ch_node, "azoteq,invert-enable")) + *(engine + 3) |= iqs626_chx_eng_3_inv_logic; + + *(engine + 4) &= ~iqs626_chx_eng_4_comp_disable; + if (fwnode_property_present(ch_node, "azoteq,comp-disable")) + *(engine + 4) |= iqs626_chx_eng_4_comp_disable; + + *(engine + 4) &= ~iqs626_chx_eng_4_static_enable; + if (fwnode_property_present(ch_node, "azoteq,static-enable")) + *(engine + 4) |= iqs626_chx_eng_4_static_enable; + + i = ch_id - iqs626_ch_gen_0; + assoc_select = &sys_reg->ch_reg_gen[i].assoc_select; + assoc_weight = &sys_reg->ch_reg_gen[i].assoc_weight; + + *assoc_select = 0; + if (!fwnode_property_present(ch_node, "azoteq,assoc-select")) + return 0; + + for (i = 0; i < array_size(iqs626_channels); i++) { + if (fwnode_property_match_string(ch_node, "azoteq,assoc-select", + iqs626_channels[i].name) < 0) + continue; + + *assoc_select |= iqs626_channels[i].active; + } + + if (fwnode_property_read_u32(ch_node, "azoteq,assoc-weight", &val)) + return 0; + + if (val > iqs626_gen_weight_max) { + dev_err(&client->dev, + "invalid %s channel associated weight: %u ", + fwnode_get_name(ch_node), val); + return -einval; + } + + *assoc_weight = val; + + return 0; +} + +static int iqs626_parse_prop(struct iqs626_private *iqs626) +{ + struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg; + struct i2c_client *client = iqs626->client; + struct fwnode_handle *ch_node; + unsigned int val; + int error, i; + u16 general; + + if (!device_property_read_u32(&client->dev, "azoteq,suspend-mode", + &val)) { + if (val > iqs626_sys_settings_pwr_mode_max) { + dev_err(&client->dev, "invalid suspend mode: %u ", + val); + return -einval; + } + + iqs626->suspend_mode = val; + } + + error = regmap_raw_read(iqs626->regmap, iqs626_sys_settings, sys_reg, + sizeof(*sys_reg)); + if (error) + return error; + + general = be16_to_cpu(sys_reg->general); + general &= iqs626_sys_settings_ulp_update_mask; + + if (device_property_present(&client->dev, "azoteq,clk-div")) + general |= iqs626_sys_settings_clk_div; + + if (device_property_present(&client->dev, "azoteq,ulp-enable")) + general |= iqs626_sys_settings_ulp_auto; + + if (!device_property_read_u32(&client->dev, "azoteq,ulp-update", + &val)) { + if (val > iqs626_sys_settings_ulp_update_max) { + dev_err(&client->dev, "invalid update rate: %u ", val); + return -einval; + } + + general &= ~iqs626_sys_settings_ulp_update_mask; + general |= (val << iqs626_sys_settings_ulp_update_shift); + } + + sys_reg->misc_a &= ~iqs626_misc_a_ati_band_disable; + if (device_property_present(&client->dev, "azoteq,ati-band-disable")) + sys_reg->misc_a |= iqs626_misc_a_ati_band_disable; + + sys_reg->misc_a &= ~iqs626_misc_a_ati_lp_only; + if (device_property_present(&client->dev, "azoteq,ati-lp-only")) + sys_reg->misc_a |= iqs626_misc_a_ati_lp_only; + + if (!device_property_read_u32(&client->dev, "azoteq,gpio3-select", + &val)) { + if (val > iqs626_misc_a_gpio3_select_max) { + dev_err(&client->dev, "invalid gpio3 selection: %u ", + val); + return -einval; + } + + sys_reg->misc_a &= ~iqs626_misc_a_gpio3_select_mask; + sys_reg->misc_a |= val; + } + + if (!device_property_read_u32(&client->dev, "azoteq,reseed-select", + &val)) { + if (val > iqs626_misc_b_reseed_ui_sel_max) { + dev_err(&client->dev, "invalid reseed selection: %u ", + val); + return -einval; + } + + sys_reg->misc_b &= ~iqs626_misc_b_reseed_ui_sel_mask; + sys_reg->misc_b |= (val << iqs626_misc_b_reseed_ui_sel_shift); + } + + sys_reg->misc_b &= ~iqs626_misc_b_thresh_extend; + if (device_property_present(&client->dev, "azoteq,thresh-extend")) + sys_reg->misc_b |= iqs626_misc_b_thresh_extend; + + sys_reg->misc_b &= ~iqs626_misc_b_tracking_ui_enable; + if (device_property_present(&client->dev, "azoteq,tracking-enable")) + sys_reg->misc_b |= iqs626_misc_b_tracking_ui_enable; + + sys_reg->misc_b &= ~iqs626_misc_b_reseed_offset; + if (device_property_present(&client->dev, "azoteq,reseed-offset")) + sys_reg->misc_b |= iqs626_misc_b_reseed_offset; + + if (!device_property_read_u32(&client->dev, "azoteq,rate-np-ms", + &val)) { + if (val > iqs626_rate_np_ms_max) { + dev_err(&client->dev, "invalid report rate: %u ", val); + return -einval; + } + + sys_reg->rate_np = val; + } + + if (!device_property_read_u32(&client->dev, "azoteq,rate-lp-ms", + &val)) { + if (val > iqs626_rate_lp_ms_max) { + dev_err(&client->dev, "invalid report rate: %u ", val); + return -einval; + } + + sys_reg->rate_lp = val; + } + + if (!device_property_read_u32(&client->dev, "azoteq,rate-ulp-ms", + &val)) { + if (val > iqs626_rate_ulp_ms_max) { + dev_err(&client->dev, "invalid report rate: %u ", val); + return -einval; + } + + sys_reg->rate_ulp = val / 16; + } + + if (!device_property_read_u32(&client->dev, "azoteq,timeout-pwr-ms", + &val)) { + if (val > iqs626_timeout_pwr_ms_max) { + dev_err(&client->dev, "invalid timeout: %u ", val); + return -einval; + } + + sys_reg->timeout_pwr = val / 512; + } + + if (!device_property_read_u32(&client->dev, "azoteq,timeout-lta-ms", + &val)) { + if (val > iqs626_timeout_lta_ms_max) { + dev_err(&client->dev, "invalid timeout: %u ", val); + return -einval; + } + + sys_reg->timeout_lta = val / 512; + } + + sys_reg->event_mask = ~((u8)iqs626_event_mask_sys); + sys_reg->redo_ati = 0; + + sys_reg->reseed = 0; + sys_reg->active = 0; + + for (i = 0; i < array_size(iqs626_channels); i++) { + ch_node = device_get_named_child_node(&client->dev, + iqs626_channels[i].name); + if (!ch_node) + continue; + + error = iqs626_parse_channel(iqs626, ch_node, i); + if (error) + return error; + + error = iqs626_parse_ati_target(iqs626, ch_node, i); + if (error) + return error; + + error = iqs626_parse_events(iqs626, ch_node, i); + if (error) + return error; + + if (!fwnode_property_present(ch_node, "azoteq,ati-exclude")) + sys_reg->redo_ati |= iqs626_channels[i].active; + + if (!fwnode_property_present(ch_node, "azoteq,reseed-disable")) + sys_reg->reseed |= iqs626_channels[i].active; + + sys_reg->active |= iqs626_channels[i].active; + } + + general |= iqs626_sys_settings_event_mode; + + /* + * enable streaming during normal-power mode if the trackpad is used to + * report raw coordinates instead of gestures. in that case, the device + * returns to event mode during low-power mode. + */ + if (sys_reg->active & iqs626_channels[iqs626_ch_tp_2].active && + sys_reg->event_mask & iqs626_event_mask_gesture) + general |= iqs626_sys_settings_event_mode_lp; + + general |= iqs626_sys_settings_redo_ati; + general |= iqs626_sys_settings_ack_reset; + + sys_reg->general = cpu_to_be16(general); + + error = regmap_raw_write(iqs626->regmap, iqs626_sys_settings, + &iqs626->sys_reg, sizeof(iqs626->sys_reg)); + if (error) + return error; + + iqs626_irq_wait(); + + return 0; +} + +static int iqs626_input_init(struct iqs626_private *iqs626) +{ + struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg; + struct i2c_client *client = iqs626->client; + int error, i, j; + + iqs626->keypad = devm_input_allocate_device(&client->dev); + if (!iqs626->keypad) + return -enomem; + + iqs626->keypad->keycodemax = array_size(iqs626->kp_code); + iqs626->keypad->keycode = iqs626->kp_code; + iqs626->keypad->keycodesize = sizeof(**iqs626->kp_code); + + iqs626->keypad->name = "iqs626a_keypad"; + iqs626->keypad->id.bustype = bus_i2c; + + for (i = 0; i < array_size(iqs626_channels); i++) { + if (!(sys_reg->active & iqs626_channels[i].active)) + continue; + + for (j = 0; j < array_size(iqs626_events); j++) { + if (!iqs626->kp_type[i][j]) + continue; + + input_set_capability(iqs626->keypad, + iqs626->kp_type[i][j], + iqs626->kp_code[i][j]); + } + } + + if (!(sys_reg->active & iqs626_channels[iqs626_ch_tp_2].active)) + return 0; + + iqs626->trackpad = devm_input_allocate_device(&client->dev); + if (!iqs626->trackpad) + return -enomem; + + iqs626->trackpad->keycodemax = array_size(iqs626->tp_code); + iqs626->trackpad->keycode = iqs626->tp_code; + iqs626->trackpad->keycodesize = sizeof(*iqs626->tp_code); + + iqs626->trackpad->name = "iqs626a_trackpad"; + iqs626->trackpad->id.bustype = bus_i2c; + + /* + * present the trackpad as a traditional pointing device if no gestures + * have been mapped to a keycode. + */ + if (sys_reg->event_mask & iqs626_event_mask_gesture) { + u8 tp_mask = iqs626_channels[iqs626_ch_tp_3].active; + + input_set_capability(iqs626->trackpad, ev_key, btn_touch); + input_set_abs_params(iqs626->trackpad, abs_y, 0, 255, 0, 0); + + if ((sys_reg->active & tp_mask) == tp_mask) + input_set_abs_params(iqs626->trackpad, + abs_x, 0, 255, 0, 0); + else + input_set_abs_params(iqs626->trackpad, + abs_x, 0, 128, 0, 0); + + touchscreen_parse_properties(iqs626->trackpad, false, + &iqs626->prop); + } else { + for (i = 0; i < iqs626_num_gestures; i++) + if (iqs626->tp_code[i] != key_reserved) + input_set_capability(iqs626->trackpad, ev_key, + iqs626->tp_code[i]); + } + + error = input_register_device(iqs626->trackpad); + if (error) + dev_err(&client->dev, "failed to register trackpad: %d ", + error); + + return error; +} + +static int iqs626_report(struct iqs626_private *iqs626) +{ + struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg; + struct i2c_client *client = iqs626->client; + struct iqs626_flags flags; + __le16 hall_output; + int error, i, j; + u8 state; + u8 *dir_mask = &flags.states[iqs626_st_offs_dir]; + + error = regmap_raw_read(iqs626->regmap, iqs626_sys_flags, &flags, + sizeof(flags)); + if (error) { + dev_err(&client->dev, "failed to read device status: %d ", + error); + return error; + } + + /* + * the device resets itself if its own watchdog bites, which can happen + * in the event of an i2c communication error. in this case, the device + * asserts a show_reset interrupt and all registers must be restored. + */ + if (be16_to_cpu(flags.system) & iqs626_sys_flags_show_reset) { + dev_err(&client->dev, "unexpected device reset "); + + error = regmap_raw_write(iqs626->regmap, iqs626_sys_settings, + sys_reg, sizeof(*sys_reg)); + if (error) + dev_err(&client->dev, + "failed to re-initialize device: %d ", error); + + return error; + } + + if (be16_to_cpu(flags.system) & iqs626_sys_flags_in_ati) + return 0; + + /* + * unlike the ulp or generic channels, the hall channel does not have a + * direction flag. instead, the direction (i.e. magnet polarity) can be + * derived based on the sign of the 2's complement differential output. + */ + if (sys_reg->active & iqs626_channels[iqs626_ch_hall].active) { + error = regmap_raw_read(iqs626->regmap, iqs626_hall_output, + &hall_output, sizeof(hall_output)); + if (error) { + dev_err(&client->dev, + "failed to read hall output: %d ", error); + return error; + } + + *dir_mask &= ~iqs626_channels[iqs626_ch_hall].active; + if (le16_to_cpu(hall_output) < 0x8000) + *dir_mask |= iqs626_channels[iqs626_ch_hall].active; + } + + for (i = 0; i < array_size(iqs626_channels); i++) { + if (!(sys_reg->active & iqs626_channels[i].active)) + continue; + + for (j = 0; j < array_size(iqs626_events); j++) { + if (!iqs626->kp_type[i][j]) + continue; + + state = flags.states[iqs626_events[j].st_offs]; + state &= iqs626_events[j].dir_up ? *dir_mask + : ~(*dir_mask); + state &= iqs626_channels[i].active; + + input_event(iqs626->keypad, iqs626->kp_type[i][j], + iqs626->kp_code[i][j], !!state); + } + } + + input_sync(iqs626->keypad); + + /* + * the following completion signals that ati has finished, any initial + * switch states have been reported and the keypad can be registered. + */ + complete_all(&iqs626->ati_done); + + if (!(sys_reg->active & iqs626_channels[iqs626_ch_tp_2].active)) + return 0; + + if (sys_reg->event_mask & iqs626_event_mask_gesture) { + state = flags.states[iqs626_st_offs_touch]; + state &= iqs626_channels[iqs626_ch_tp_2].active; + + input_report_key(iqs626->trackpad, btn_touch, state); + + if (state) + touchscreen_report_pos(iqs626->trackpad, &iqs626->prop, + flags.trackpad_x, + flags.trackpad_y, false); + } else { + for (i = 0; i < iqs626_num_gestures; i++) + input_report_key(iqs626->trackpad, iqs626->tp_code[i], + flags.gesture & bit(i)); + + if (flags.gesture & genmask(iqs626_gesture_tap, 0)) { + input_sync(iqs626->trackpad); + + /* + * momentary gestures are followed by a complementary + * release cycle so as to emulate a full keystroke. + */ + for (i = 0; i < iqs626_gesture_hold; i++) + input_report_key(iqs626->trackpad, + iqs626->tp_code[i], 0); + } + } + + input_sync(iqs626->trackpad); + + return 0; +} + +static irqreturn_t iqs626_irq(int irq, void *context) +{ + struct iqs626_private *iqs626 = context; + + if (iqs626_report(iqs626)) + return irq_none; + + /* + * the device does not deassert its interrupt (rdy) pin until shortly + * after receiving an i2c stop condition; the following delay ensures + * the interrupt handler does not return before this time. + */ + iqs626_irq_wait(); + + return irq_handled; +} + +static const struct regmap_config iqs626_regmap_config = { + .reg_bits = 8, + .val_bits = 16, + .max_register = iqs626_max_reg, +}; + +static int iqs626_probe(struct i2c_client *client) +{ + struct iqs626_ver_info ver_info; + struct iqs626_private *iqs626; + int error; + + iqs626 = devm_kzalloc(&client->dev, sizeof(*iqs626), gfp_kernel); + if (!iqs626) + return -enomem; + + i2c_set_clientdata(client, iqs626); + iqs626->client = client; + + iqs626->regmap = devm_regmap_init_i2c(client, &iqs626_regmap_config); + if (is_err(iqs626->regmap)) { + error = ptr_err(iqs626->regmap); + dev_err(&client->dev, "failed to initialize register map: %d ", + error); + return error; + } + + init_completion(&iqs626->ati_done); + + error = regmap_raw_read(iqs626->regmap, iqs626_ver_info, &ver_info, + sizeof(ver_info)); + if (error) + return error; + + if (ver_info.prod_num != iqs626_ver_info_prod_num) { + dev_err(&client->dev, "unrecognized product number: 0x%02x ", + ver_info.prod_num); + return -einval; + } + + error = iqs626_parse_prop(iqs626); + if (error) + return error; + + error = iqs626_input_init(iqs626); + if (error) + return error; + + error = devm_request_threaded_irq(&client->dev, client->irq, + null, iqs626_irq, irqf_oneshot, + client->name, iqs626); + if (error) { + dev_err(&client->dev, "failed to request irq: %d ", error); + return error; + } + + if (!wait_for_completion_timeout(&iqs626->ati_done, + msecs_to_jiffies(2000))) { + dev_err(&client->dev, "failed to complete ati "); + return -etimedout; + } + + /* + * the keypad may include one or more switches and is not registered + * until ati is complete and the initial switch states are read. + */ + error = input_register_device(iqs626->keypad); + if (error) + dev_err(&client->dev, "failed to register keypad: %d ", error); + + return error; +} + +static int __maybe_unused iqs626_suspend(struct device *dev) +{ + struct iqs626_private *iqs626 = dev_get_drvdata(dev); + struct i2c_client *client = iqs626->client; + unsigned int val; + int error; + + if (!iqs626->suspend_mode) + return 0; + + disable_irq(client->irq); + + /* + * automatic power mode switching must be disabled before the device is + * forced into any particular power mode. in this case, the device will + * transition into normal-power mode. + */ + error = regmap_update_bits(iqs626->regmap, iqs626_sys_settings, + iqs626_sys_settings_dis_auto, ~0); + if (error) + goto err_irq; + + /* + * the following check ensures the device has completed its transition + * into normal-power mode before a manual mode switch is performed. + */ + error = regmap_read_poll_timeout(iqs626->regmap, iqs626_sys_flags, val, + !(val & iqs626_sys_flags_pwr_mode_mask), + iqs626_pwr_mode_poll_sleep_us, + iqs626_pwr_mode_poll_timeout_us); + if (error) + goto err_irq; + + error = regmap_update_bits(iqs626->regmap, iqs626_sys_settings, + iqs626_sys_settings_pwr_mode_mask, + iqs626->suspend_mode << + iqs626_sys_settings_pwr_mode_shift); + if (error) + goto err_irq; + + /* + * this last check ensures the device has completed its transition into + * the desired power mode to prevent any spurious interrupts from being + * triggered after iqs626_suspend has already returned. + */ + error = regmap_read_poll_timeout(iqs626->regmap, iqs626_sys_flags, val, + (val & iqs626_sys_flags_pwr_mode_mask) + == (iqs626->suspend_mode << + iqs626_sys_flags_pwr_mode_shift), + iqs626_pwr_mode_poll_sleep_us, + iqs626_pwr_mode_poll_timeout_us); + +err_irq: + iqs626_irq_wait(); + enable_irq(client->irq); + + return error; +} + +static int __maybe_unused iqs626_resume(struct device *dev) +{ + struct iqs626_private *iqs626 = dev_get_drvdata(dev); + struct i2c_client *client = iqs626->client; + unsigned int val; + int error; + + if (!iqs626->suspend_mode) + return 0; + + disable_irq(client->irq); + + error = regmap_update_bits(iqs626->regmap, iqs626_sys_settings, + iqs626_sys_settings_pwr_mode_mask, 0); + if (error) + goto err_irq; + + /* + * this check ensures the device has returned to normal-power mode + * before automatic power mode switching is re-enabled. + */ + error = regmap_read_poll_timeout(iqs626->regmap, iqs626_sys_flags, val, + !(val & iqs626_sys_flags_pwr_mode_mask), + iqs626_pwr_mode_poll_sleep_us, + iqs626_pwr_mode_poll_timeout_us); + if (error) + goto err_irq; + + error = regmap_update_bits(iqs626->regmap, iqs626_sys_settings, + iqs626_sys_settings_dis_auto, 0); + if (error) + goto err_irq; + + /* + * this step reports any events that may have been "swallowed" as a + * result of polling pwr_mode (which automatically acknowledges any + * pending interrupts). + */ + error = iqs626_report(iqs626); + +err_irq: + iqs626_irq_wait(); + enable_irq(client->irq); + + return error; +} + +static simple_dev_pm_ops(iqs626_pm, iqs626_suspend, iqs626_resume); + +static const struct of_device_id iqs626_of_match[] = { + { .compatible = "azoteq,iqs626a" }, + { } +}; +module_device_table(of, iqs626_of_match); + +static struct i2c_driver iqs626_i2c_driver = { + .driver = { + .name = "iqs626a", + .of_match_table = iqs626_of_match, + .pm = &iqs626_pm, + }, + .probe_new = iqs626_probe, +}; +module_i2c_driver(iqs626_i2c_driver); + +module_author("jeff labundy <jeff@labundy.com>"); +module_description("azoteq iqs626a capacitive touch controller"); +module_license("gpl");
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Tablets, touch screens, keyboards, mouses
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f1d2809de97adc422967b6de59f0f6199769eb93
|
jeff labundy
|
drivers
|
input
|
misc
|
input: add support for ilitek lego series
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add support for ilitek lego series of touch devices. lego series includes ilitek 213x/23xx/25xx.
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this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
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add support for ilitek lego series
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['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
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['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
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[]
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['kconfig', 'c', 'makefile']
| 3
| 703
| 0
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--- diff --git a/drivers/input/touchscreen/kconfig b/drivers/input/touchscreen/kconfig --- a/drivers/input/touchscreen/kconfig +++ b/drivers/input/touchscreen/kconfig +config touchscreen_ilitek + tristate "ilitek i2c 213x/23xx/25xx/lego series touch ics" + depends on i2c + help + say y here if you have touchscreen with ilitek touch ic, + it supports 213x/23xx/25xx and other lego series. + + if unsure, say n. + + to compile this driver as a module, choose m here: the + module will be called ilitek_ts_i2c. + diff --git a/drivers/input/touchscreen/makefile b/drivers/input/touchscreen/makefile --- a/drivers/input/touchscreen/makefile +++ b/drivers/input/touchscreen/makefile +obj-$(config_touchscreen_ilitek) += ilitek_ts_i2c.o diff --git a/drivers/input/touchscreen/ilitek_ts_i2c.c b/drivers/input/touchscreen/ilitek_ts_i2c.c --- /dev/null +++ b/drivers/input/touchscreen/ilitek_ts_i2c.c +// spdx-license-identifier: gpl-2.0 +/* + * ilitek touch ic driver for 23xx, 25xx and lego series + * + * copyright (c) 2011 ili technology corporation. + * copyright (c) 2020 luca hsu <luca_hsu@ilitek.com> + * copyright (c) 2021 joe hung <joe_hung@ilitek.com> + */ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/input.h> +#include <linux/input/mt.h> +#include <linux/i2c.h> +#include <linux/slab.h> +#include <linux/delay.h> +#include <linux/interrupt.h> +#include <linux/gpio.h> +#include <linux/gpio/consumer.h> +#include <linux/errno.h> +#include <linux/acpi.h> +#include <linux/input/touchscreen.h> +#include <asm/unaligned.h> + + +#define ilitek_ts_name "ilitek_ts" +#define bl_v1_8 0x108 +#define bl_v1_7 0x107 +#define bl_v1_6 0x106 + +#define ilitek_tp_cmd_get_tp_res 0x20 +#define ilitek_tp_cmd_get_scrn_res 0x21 +#define ilitek_tp_cmd_set_ic_sleep 0x30 +#define ilitek_tp_cmd_set_ic_wake 0x31 +#define ilitek_tp_cmd_get_fw_ver 0x40 +#define ilitek_tp_cmd_get_prl_ver 0x42 +#define ilitek_tp_cmd_get_mcu_ver 0x61 +#define ilitek_tp_cmd_get_ic_mode 0xc0 + +#define report_count_address 61 +#define ilitek_support_max_point 40 + +struct ilitek_protocol_info { + u16 ver; + u8 ver_major; +}; + +struct ilitek_ts_data { + struct i2c_client *client; + struct gpio_desc *reset_gpio; + struct input_dev *input_dev; + struct touchscreen_properties prop; + + const struct ilitek_protocol_map *ptl_cb_func; + struct ilitek_protocol_info ptl; + + char product_id[30]; + u16 mcu_ver; + u8 ic_mode; + u8 firmware_ver[8]; + + s32 reset_time; + s32 screen_max_x; + s32 screen_max_y; + s32 screen_min_x; + s32 screen_min_y; + s32 max_tp; +}; + +struct ilitek_protocol_map { + u16 cmd; + const char *name; + int (*func)(struct ilitek_ts_data *ts, u16 cmd, u8 *inbuf, u8 *outbuf); +}; + +enum ilitek_cmds { + /* common cmds */ + get_ptl_ver = 0, + get_fw_ver, + get_scrn_res, + get_tp_res, + get_ic_mode, + get_mcu_ver, + set_ic_sleep, + set_ic_wake, + + /* always keep at the end */ + max_cmd_cnt +}; + +/* ilitek i2c r/w apis */ +static int ilitek_i2c_write_and_read(struct ilitek_ts_data *ts, + u8 *cmd, int write_len, int delay, + u8 *data, int read_len) +{ + int error; + struct i2c_client *client = ts->client; + struct i2c_msg msgs[] = { + { + .addr = client->addr, + .flags = 0, + .len = write_len, + .buf = cmd, + }, + { + .addr = client->addr, + .flags = i2c_m_rd, + .len = read_len, + .buf = data, + }, + }; + + if (delay == 0 && write_len > 0 && read_len > 0) { + error = i2c_transfer(client->adapter, msgs, array_size(msgs)); + if (error < 0) + return error; + } else { + if (write_len > 0) { + error = i2c_transfer(client->adapter, msgs, 1); + if (error < 0) + return error; + } + if (delay > 0) + mdelay(delay); + + if (read_len > 0) { + error = i2c_transfer(client->adapter, msgs + 1, 1); + if (error < 0) + return error; + } + } + + return 0; +} + +/* ilitek isr apis */ +static void ilitek_touch_down(struct ilitek_ts_data *ts, unsigned int id, + unsigned int x, unsigned int y) +{ + struct input_dev *input = ts->input_dev; + + input_mt_slot(input, id); + input_mt_report_slot_state(input, mt_tool_finger, true); + + touchscreen_report_pos(input, &ts->prop, x, y, true); +} + +static int ilitek_process_and_report_v6(struct ilitek_ts_data *ts) +{ + int error = 0; + u8 buf[512]; + int packet_len = 5; + int packet_max_point = 10; + int report_max_point; + int i, count; + struct input_dev *input = ts->input_dev; + struct device *dev = &ts->client->dev; + unsigned int x, y, status, id; + + error = ilitek_i2c_write_and_read(ts, null, 0, 0, buf, 64); + if (error) { + dev_err(dev, "get touch info failed, err:%d ", error); + goto err_sync_frame; + } + + report_max_point = buf[report_count_address]; + if (report_max_point > ts->max_tp) { + dev_err(dev, "fw report max point:%d > panel info. max:%d ", + report_max_point, ts->max_tp); + error = -einval; + goto err_sync_frame; + } + + count = div_round_up(report_max_point, packet_max_point); + for (i = 1; i < count; i++) { + error = ilitek_i2c_write_and_read(ts, null, 0, 0, + buf + i * 64, 64); + if (error) { + dev_err(dev, "get touch info. failed, cnt:%d, err:%d ", + count, error); + goto err_sync_frame; + } + } + + for (i = 0; i < report_max_point; i++) { + status = buf[i * packet_len + 1] & 0x40; + if (!status) + continue; + + id = buf[i * packet_len + 1] & 0x3f; + + x = get_unaligned_le16(buf + i * packet_len + 2); + y = get_unaligned_le16(buf + i * packet_len + 4); + + if (x > ts->screen_max_x || x < ts->screen_min_x || + y > ts->screen_max_y || y < ts->screen_min_y) { + dev_warn(dev, "invalid position, x[%d,%u,%d], y[%d,%u,%d] ", + ts->screen_min_x, x, ts->screen_max_x, + ts->screen_min_y, y, ts->screen_max_y); + continue; + } + + ilitek_touch_down(ts, id, x, y); + } + +err_sync_frame: + input_mt_sync_frame(input); + input_sync(input); + return error; +} + +/* apis of cmds for ilitek touch ic */ +static int api_protocol_set_cmd(struct ilitek_ts_data *ts, + u16 idx, u8 *inbuf, u8 *outbuf) +{ + u16 cmd; + int error; + + if (idx >= max_cmd_cnt) + return -einval; + + cmd = ts->ptl_cb_func[idx].cmd; + error = ts->ptl_cb_func[idx].func(ts, cmd, inbuf, outbuf); + if (error) + return error; + + return 0; +} + +static int api_protocol_get_ptl_ver(struct ilitek_ts_data *ts, + u16 cmd, u8 *inbuf, u8 *outbuf) +{ + int error; + u8 buf[64]; + + buf[0] = cmd; + error = ilitek_i2c_write_and_read(ts, buf, 1, 5, outbuf, 3); + if (error) + return error; + + ts->ptl.ver = get_unaligned_be16(outbuf); + ts->ptl.ver_major = outbuf[0]; + + return 0; +} + +static int api_protocol_get_mcu_ver(struct ilitek_ts_data *ts, + u16 cmd, u8 *inbuf, u8 *outbuf) +{ + int error; + u8 buf[64]; + + buf[0] = cmd; + error = ilitek_i2c_write_and_read(ts, buf, 1, 5, outbuf, 32); + if (error) + return error; + + ts->mcu_ver = get_unaligned_le16(outbuf); + memset(ts->product_id, 0, sizeof(ts->product_id)); + memcpy(ts->product_id, outbuf + 6, 26); + + return 0; +} + +static int api_protocol_get_fw_ver(struct ilitek_ts_data *ts, + u16 cmd, u8 *inbuf, u8 *outbuf) +{ + int error; + u8 buf[64]; + + buf[0] = cmd; + error = ilitek_i2c_write_and_read(ts, buf, 1, 5, outbuf, 8); + if (error) + return error; + + memcpy(ts->firmware_ver, outbuf, 8); + + return 0; +} + +static int api_protocol_get_scrn_res(struct ilitek_ts_data *ts, + u16 cmd, u8 *inbuf, u8 *outbuf) +{ + int error; + u8 buf[64]; + + buf[0] = cmd; + error = ilitek_i2c_write_and_read(ts, buf, 1, 5, outbuf, 8); + if (error) + return error; + + ts->screen_min_x = get_unaligned_le16(outbuf); + ts->screen_min_y = get_unaligned_le16(outbuf + 2); + ts->screen_max_x = get_unaligned_le16(outbuf + 4); + ts->screen_max_y = get_unaligned_le16(outbuf + 6); + + return 0; +} + +static int api_protocol_get_tp_res(struct ilitek_ts_data *ts, + u16 cmd, u8 *inbuf, u8 *outbuf) +{ + int error; + u8 buf[64]; + + buf[0] = cmd; + error = ilitek_i2c_write_and_read(ts, buf, 1, 5, outbuf, 15); + if (error) + return error; + + ts->max_tp = outbuf[8]; + if (ts->max_tp > ilitek_support_max_point) { + dev_err(&ts->client->dev, "invalid max_tp:%d from fw ", + ts->max_tp); + return -einval; + } + + return 0; +} + +static int api_protocol_get_ic_mode(struct ilitek_ts_data *ts, + u16 cmd, u8 *inbuf, u8 *outbuf) +{ + int error; + u8 buf[64]; + + buf[0] = cmd; + error = ilitek_i2c_write_and_read(ts, buf, 1, 5, outbuf, 2); + if (error) + return error; + + ts->ic_mode = outbuf[0]; + return 0; +} + +static int api_protocol_set_ic_sleep(struct ilitek_ts_data *ts, + u16 cmd, u8 *inbuf, u8 *outbuf) +{ + u8 buf[64]; + + buf[0] = cmd; + return ilitek_i2c_write_and_read(ts, buf, 1, 0, null, 0); +} + +static int api_protocol_set_ic_wake(struct ilitek_ts_data *ts, + u16 cmd, u8 *inbuf, u8 *outbuf) +{ + u8 buf[64]; + + buf[0] = cmd; + return ilitek_i2c_write_and_read(ts, buf, 1, 0, null, 0); +} + +static const struct ilitek_protocol_map ptl_func_map[] = { + /* common cmds */ + [get_ptl_ver] = { + ilitek_tp_cmd_get_prl_ver, "get_ptl_ver", + api_protocol_get_ptl_ver + }, + [get_fw_ver] = { + ilitek_tp_cmd_get_fw_ver, "get_fw_ver", + api_protocol_get_fw_ver + }, + [get_scrn_res] = { + ilitek_tp_cmd_get_scrn_res, "get_scrn_res", + api_protocol_get_scrn_res + }, + [get_tp_res] = { + ilitek_tp_cmd_get_tp_res, "get_tp_res", + api_protocol_get_tp_res + }, + [get_ic_mode] = { + ilitek_tp_cmd_get_ic_mode, "get_ic_mode", + api_protocol_get_ic_mode + }, + [get_mcu_ver] = { + ilitek_tp_cmd_get_mcu_ver, "get_mod_ver", + api_protocol_get_mcu_ver + }, + [set_ic_sleep] = { + ilitek_tp_cmd_set_ic_sleep, "set_ic_sleep", + api_protocol_set_ic_sleep + }, + [set_ic_wake] = { + ilitek_tp_cmd_set_ic_wake, "set_ic_wake", + api_protocol_set_ic_wake + }, +}; + +/* probe apis */ +static void ilitek_reset(struct ilitek_ts_data *ts, int delay) +{ + if (ts->reset_gpio) { + gpiod_set_value(ts->reset_gpio, 1); + mdelay(10); + gpiod_set_value(ts->reset_gpio, 0); + mdelay(delay); + } +} + +static int ilitek_protocol_init(struct ilitek_ts_data *ts) +{ + int error; + u8 outbuf[64]; + + ts->ptl_cb_func = ptl_func_map; + ts->reset_time = 600; + + error = api_protocol_set_cmd(ts, get_ptl_ver, null, outbuf); + if (error) + return error; + + /* protocol v3 is not support currently */ + if (ts->ptl.ver_major == 0x3 || + ts->ptl.ver == bl_v1_6 || + ts->ptl.ver == bl_v1_7) + return -einval; + + return 0; +} + +static int ilitek_read_tp_info(struct ilitek_ts_data *ts, bool boot) +{ + u8 outbuf[256]; + int error; + + error = api_protocol_set_cmd(ts, get_ptl_ver, null, outbuf); + if (error) + return error; + + error = api_protocol_set_cmd(ts, get_mcu_ver, null, outbuf); + if (error) + return error; + + error = api_protocol_set_cmd(ts, get_fw_ver, null, outbuf); + if (error) + return error; + + if (boot) { + error = api_protocol_set_cmd(ts, get_scrn_res, null, + outbuf); + if (error) + return error; + } + + error = api_protocol_set_cmd(ts, get_tp_res, null, outbuf); + if (error) + return error; + + error = api_protocol_set_cmd(ts, get_ic_mode, null, outbuf); + if (error) + return error; + + return 0; +} + +static int ilitek_input_dev_init(struct device *dev, struct ilitek_ts_data *ts) +{ + int error; + struct input_dev *input; + + input = devm_input_allocate_device(dev); + if (!input) + return -enomem; + + ts->input_dev = input; + input->name = ilitek_ts_name; + input->id.bustype = bus_i2c; + + __set_bit(input_prop_direct, input->propbit); + + input_set_abs_params(input, abs_mt_position_x, + ts->screen_min_x, ts->screen_max_x, 0, 0); + input_set_abs_params(input, abs_mt_position_y, + ts->screen_min_y, ts->screen_max_y, 0, 0); + + touchscreen_parse_properties(input, true, &ts->prop); + + error = input_mt_init_slots(input, ts->max_tp, + input_mt_direct | input_mt_drop_unused); + if (error) { + dev_err(dev, "initialize mt slots failed, err:%d ", error); + return error; + } + + error = input_register_device(input); + if (error) { + dev_err(dev, "register input device failed, err:%d ", error); + return error; + } + + return 0; +} + +static irqreturn_t ilitek_i2c_isr(int irq, void *dev_id) +{ + struct ilitek_ts_data *ts = dev_id; + int error; + + error = ilitek_process_and_report_v6(ts); + if (error < 0) { + dev_err(&ts->client->dev, "[%s] err:%d ", __func__, error); + return irq_none; + } + + return irq_handled; +} + +static ssize_t firmware_version_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct ilitek_ts_data *ts = i2c_get_clientdata(client); + + return scnprintf(buf, page_size, + "fw version: [%02x%02x.%02x%02x.%02x%02x.%02x%02x] ", + ts->firmware_ver[0], ts->firmware_ver[1], + ts->firmware_ver[2], ts->firmware_ver[3], + ts->firmware_ver[4], ts->firmware_ver[5], + ts->firmware_ver[6], ts->firmware_ver[7]); +} +static device_attr_ro(firmware_version); + +static ssize_t product_id_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct ilitek_ts_data *ts = i2c_get_clientdata(client); + + return scnprintf(buf, page_size, "product id: [%04x], module: [%s] ", + ts->mcu_ver, ts->product_id); +} +static device_attr_ro(product_id); + +static struct attribute *ilitek_sysfs_attrs[] = { + &dev_attr_firmware_version.attr, + &dev_attr_product_id.attr, + null +}; + +static struct attribute_group ilitek_attrs_group = { + .attrs = ilitek_sysfs_attrs, +}; + +static int ilitek_ts_i2c_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct ilitek_ts_data *ts; + struct device *dev = &client->dev; + int error; + + if (!i2c_check_functionality(client->adapter, i2c_func_i2c)) { + dev_err(dev, "i2c check functionality failed "); + return -enxio; + } + + ts = devm_kzalloc(dev, sizeof(*ts), gfp_kernel); + if (!ts) + return -enomem; + + ts->client = client; + i2c_set_clientdata(client, ts); + + ts->reset_gpio = devm_gpiod_get_optional(dev, "reset", gpiod_out_low); + if (is_err(ts->reset_gpio)) { + error = ptr_err(ts->reset_gpio); + dev_err(dev, "request gpiod failed: %d", error); + return error; + } + + ilitek_reset(ts, 1000); + + error = ilitek_protocol_init(ts); + if (error) { + dev_err(dev, "protocol init failed: %d", error); + return error; + } + + error = ilitek_read_tp_info(ts, true); + if (error) { + dev_err(dev, "read tp info failed: %d", error); + return error; + } + + error = ilitek_input_dev_init(dev, ts); + if (error) { + dev_err(dev, "input dev init failed: %d", error); + return error; + } + + error = devm_request_threaded_irq(dev, ts->client->irq, + null, ilitek_i2c_isr, irqf_oneshot, + "ilitek_touch_irq", ts); + if (error) { + dev_err(dev, "request threaded irq failed: %d ", error); + return error; + } + + error = devm_device_add_group(dev, &ilitek_attrs_group); + if (error) { + dev_err(dev, "sysfs create group failed: %d ", error); + return error; + } + + return 0; +} + +static int __maybe_unused ilitek_suspend(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct ilitek_ts_data *ts = i2c_get_clientdata(client); + int error; + + disable_irq(client->irq); + + if (!device_may_wakeup(dev)) { + error = api_protocol_set_cmd(ts, set_ic_sleep, null, null); + if (error) + return error; + } + + return 0; +} + +static int __maybe_unused ilitek_resume(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct ilitek_ts_data *ts = i2c_get_clientdata(client); + int error; + + if (!device_may_wakeup(dev)) { + error = api_protocol_set_cmd(ts, set_ic_wake, null, null); + if (error) + return error; + + ilitek_reset(ts, ts->reset_time); + } + + enable_irq(client->irq); + + return 0; +} + +static simple_dev_pm_ops(ilitek_pm_ops, ilitek_suspend, ilitek_resume); + +static const struct i2c_device_id ilitek_ts_i2c_id[] = { + { ilitek_ts_name, 0 }, + { }, +}; +module_device_table(i2c, ilitek_ts_i2c_id); + +#ifdef config_acpi +static const struct acpi_device_id ilitekts_acpi_id[] = { + { "iltk0001", 0 }, + { }, +}; +module_device_table(acpi, ilitekts_acpi_id); +#endif + +#ifdef config_of +static const struct of_device_id ilitek_ts_i2c_match[] = { + {.compatible = "ilitek,ili2130",}, + {.compatible = "ilitek,ili2131",}, + {.compatible = "ilitek,ili2132",}, + {.compatible = "ilitek,ili2316",}, + {.compatible = "ilitek,ili2322",}, + {.compatible = "ilitek,ili2323",}, + {.compatible = "ilitek,ili2326",}, + {.compatible = "ilitek,ili2520",}, + {.compatible = "ilitek,ili2521",}, + { }, +}; +module_device_table(of, ilitek_ts_i2c_match); +#endif + +static struct i2c_driver ilitek_ts_i2c_driver = { + .driver = { + .name = ilitek_ts_name, + .pm = &ilitek_pm_ops, + .of_match_table = of_match_ptr(ilitek_ts_i2c_match), + .acpi_match_table = acpi_ptr(ilitekts_acpi_id), + }, + .probe = ilitek_ts_i2c_probe, + .id_table = ilitek_ts_i2c_id, +}; +module_i2c_driver(ilitek_ts_i2c_driver); + +module_author("ilitek"); +module_description("ilitek i2c touchscreen driver"); +module_license("gpl");
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Tablets, touch screens, keyboards, mouses
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42370681bd46d2162093d40eb453695495483733
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joe hung
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drivers
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input
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touchscreen
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input: add mstar msg2638 touchscreen driver
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add support for the msg2638 touchscreen ic from mstar. firmware handling, wakeup gestures and other specialties are not supported. this driver reuses zinitix.c structure, while the checksum and irq handler functions are based on out-of-tree driver for alcatel idol 3 (4.7").
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this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
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add mstar msg2638 touchscreen driver
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['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
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['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
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[]
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['kconfig', 'c', 'makefile']
| 3
| 350
| 0
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--- diff --git a/drivers/input/touchscreen/kconfig b/drivers/input/touchscreen/kconfig --- a/drivers/input/touchscreen/kconfig +++ b/drivers/input/touchscreen/kconfig +config touchscreen_msg2638 + tristate "mstar msg2638 touchscreen support" + depends on i2c + depends on gpiolib || compile_test + help + say y here if you have an i2c touchscreen using mstar msg2638. + + if unsure, say n. + + to compile this driver as a module, choose m here: the + module will be called msg2638. + diff --git a/drivers/input/touchscreen/makefile b/drivers/input/touchscreen/makefile --- a/drivers/input/touchscreen/makefile +++ b/drivers/input/touchscreen/makefile +obj-$(config_touchscreen_msg2638) += msg2638.o diff --git a/drivers/input/touchscreen/msg2638.c b/drivers/input/touchscreen/msg2638.c --- /dev/null +++ b/drivers/input/touchscreen/msg2638.c +// spdx-license-identifier: gpl-2.0-only +/* + * driver for mstar msg2638 touchscreens + * + * copyright (c) 2021 vincent knecht <vincent.knecht@mailoo.org> + * + * checksum and irq handler based on mstar_drv_common.c and + * mstar_drv_mutual_fw_control.c + * copyright (c) 2006-2012 mstar semiconductor, inc. + * + * driver structure based on zinitix.c by michael srba <michael.srba@seznam.cz> + */ + +#include <linux/delay.h> +#include <linux/gpio/consumer.h> +#include <linux/i2c.h> +#include <linux/input.h> +#include <linux/input/mt.h> +#include <linux/input/touchscreen.h> +#include <linux/interrupt.h> +#include <linux/kernel.h> +#include <linux/mod_devicetable.h> +#include <linux/module.h> +#include <linux/regulator/consumer.h> +#include <linux/slab.h> + +#define mode_data_raw 0x5a + +#define max_supported_finger_num 5 + +#define chip_on_delay_ms 15 +#define firmware_on_delay_ms 50 +#define reset_delay_min_us 10000 +#define reset_delay_max_us 11000 + +struct packet { + u8 xy_hi; /* higher bits of x and y coordinates */ + u8 x_low; + u8 y_low; + u8 pressure; +}; + +struct touch_event { + u8 mode; + struct packet pkt[max_supported_finger_num]; + u8 proximity; + u8 checksum; +}; + +struct msg2638_ts_data { + struct i2c_client *client; + struct input_dev *input_dev; + struct touchscreen_properties prop; + struct regulator_bulk_data supplies[2]; + struct gpio_desc *reset_gpiod; +}; + +static u8 msg2638_checksum(u8 *data, u32 length) +{ + s32 sum = 0; + u32 i; + + for (i = 0; i < length; i++) + sum += data[i]; + + return (u8)((-sum) & 0xff); +} + +static irqreturn_t msg2638_ts_irq_handler(int irq, void *msg2638_handler) +{ + struct msg2638_ts_data *msg2638 = msg2638_handler; + struct i2c_client *client = msg2638->client; + struct input_dev *input = msg2638->input_dev; + struct touch_event touch_event; + u32 len = sizeof(touch_event); + struct i2c_msg msg[] = { + { + .addr = client->addr, + .flags = i2c_m_rd, + .len = sizeof(touch_event), + .buf = (u8 *)&touch_event, + }, + }; + struct packet *p; + u16 x, y; + int ret; + int i; + + ret = i2c_transfer(client->adapter, msg, array_size(msg)); + if (ret != array_size(msg)) { + dev_err(&client->dev, + "failed i2c transfer in irq handler: %d ", + ret < 0 ? ret : -eio); + goto out; + } + + if (touch_event.mode != mode_data_raw) + goto out; + + if (msg2638_checksum((u8 *)&touch_event, len - 1) != + touch_event.checksum) { + dev_err(&client->dev, "failed checksum! "); + goto out; + } + + for (i = 0; i < max_supported_finger_num; i++) { + p = &touch_event.pkt[i]; + + /* ignore non-pressed finger data */ + if (p->xy_hi == 0xff && p->x_low == 0xff && p->y_low == 0xff) + continue; + + x = (((p->xy_hi & 0xf0) << 4) | p->x_low); + y = (((p->xy_hi & 0x0f) << 8) | p->y_low); + + input_mt_slot(input, i); + input_mt_report_slot_state(input, mt_tool_finger, true); + touchscreen_report_pos(input, &msg2638->prop, x, y, true); + } + + input_mt_sync_frame(msg2638->input_dev); + input_sync(msg2638->input_dev); + +out: + return irq_handled; +} + +static void msg2638_reset(struct msg2638_ts_data *msg2638) +{ + gpiod_set_value_cansleep(msg2638->reset_gpiod, 1); + usleep_range(reset_delay_min_us, reset_delay_max_us); + gpiod_set_value_cansleep(msg2638->reset_gpiod, 0); + msleep(firmware_on_delay_ms); +} + +static int msg2638_start(struct msg2638_ts_data *msg2638) +{ + int error; + + error = regulator_bulk_enable(array_size(msg2638->supplies), + msg2638->supplies); + if (error) { + dev_err(&msg2638->client->dev, + "failed to enable regulators: %d ", error); + return error; + } + + msleep(chip_on_delay_ms); + + msg2638_reset(msg2638); + + enable_irq(msg2638->client->irq); + + return 0; +} + +static int msg2638_stop(struct msg2638_ts_data *msg2638) +{ + int error; + + disable_irq(msg2638->client->irq); + + error = regulator_bulk_disable(array_size(msg2638->supplies), + msg2638->supplies); + if (error) { + dev_err(&msg2638->client->dev, + "failed to disable regulators: %d ", error); + return error; + } + + return 0; +} + +static int msg2638_input_open(struct input_dev *dev) +{ + struct msg2638_ts_data *msg2638 = input_get_drvdata(dev); + + return msg2638_start(msg2638); +} + +static void msg2638_input_close(struct input_dev *dev) +{ + struct msg2638_ts_data *msg2638 = input_get_drvdata(dev); + + msg2638_stop(msg2638); +} + +static int msg2638_init_input_dev(struct msg2638_ts_data *msg2638) +{ + struct device *dev = &msg2638->client->dev; + struct input_dev *input_dev; + int error; + + input_dev = devm_input_allocate_device(dev); + if (!input_dev) { + dev_err(dev, "failed to allocate input device. "); + return -enomem; + } + + input_set_drvdata(input_dev, msg2638); + msg2638->input_dev = input_dev; + + input_dev->name = "mstar touchscreen"; + input_dev->phys = "input/ts"; + input_dev->id.bustype = bus_i2c; + input_dev->open = msg2638_input_open; + input_dev->close = msg2638_input_close; + + input_set_capability(input_dev, ev_abs, abs_mt_position_x); + input_set_capability(input_dev, ev_abs, abs_mt_position_y); + + touchscreen_parse_properties(input_dev, true, &msg2638->prop); + if (!msg2638->prop.max_x || !msg2638->prop.max_y) { + dev_err(dev, "touchscreen-size-x and/or touchscreen-size-y not set in properties "); + return -einval; + } + + error = input_mt_init_slots(input_dev, max_supported_finger_num, + input_mt_direct | input_mt_drop_unused); + if (error) { + dev_err(dev, "failed to initialize mt slots: %d ", error); + return error; + } + + error = input_register_device(input_dev); + if (error) { + dev_err(dev, "failed to register input device: %d ", error); + return error; + } + + return 0; +} + +static int msg2638_ts_probe(struct i2c_client *client) +{ + struct device *dev = &client->dev; + struct msg2638_ts_data *msg2638; + int error; + + if (!i2c_check_functionality(client->adapter, i2c_func_i2c)) { + dev_err(dev, "failed to assert adapter's support for plain i2c. "); + return -enxio; + } + + msg2638 = devm_kzalloc(dev, sizeof(*msg2638), gfp_kernel); + if (!msg2638) + return -enomem; + + msg2638->client = client; + i2c_set_clientdata(client, msg2638); + + msg2638->supplies[0].supply = "vdd"; + msg2638->supplies[1].supply = "vddio"; + error = devm_regulator_bulk_get(dev, array_size(msg2638->supplies), + msg2638->supplies); + if (error) { + dev_err(dev, "failed to get regulators: %d ", error); + return error; + } + + msg2638->reset_gpiod = devm_gpiod_get(dev, "reset", gpiod_out_low); + if (is_err(msg2638->reset_gpiod)) { + error = ptr_err(msg2638->reset_gpiod); + dev_err(dev, "failed to request reset gpio: %d ", error); + return error; + } + + error = msg2638_init_input_dev(msg2638); + if (error) { + dev_err(dev, "failed to initialize input device: %d ", error); + return error; + } + + error = devm_request_threaded_irq(dev, client->irq, + null, msg2638_ts_irq_handler, + irqf_oneshot | irqf_no_autoen, + client->name, msg2638); + if (error) { + dev_err(dev, "failed to request irq: %d ", error); + return error; + } + + return 0; +} + +static int __maybe_unused msg2638_suspend(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct msg2638_ts_data *msg2638 = i2c_get_clientdata(client); + + mutex_lock(&msg2638->input_dev->mutex); + + if (input_device_enabled(msg2638->input_dev)) + msg2638_stop(msg2638); + + mutex_unlock(&msg2638->input_dev->mutex); + + return 0; +} + +static int __maybe_unused msg2638_resume(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct msg2638_ts_data *msg2638 = i2c_get_clientdata(client); + int ret = 0; + + mutex_lock(&msg2638->input_dev->mutex); + + if (input_device_enabled(msg2638->input_dev)) + ret = msg2638_start(msg2638); + + mutex_unlock(&msg2638->input_dev->mutex); + + return ret; +} + +static simple_dev_pm_ops(msg2638_pm_ops, msg2638_suspend, msg2638_resume); + +static const struct of_device_id msg2638_of_match[] = { + { .compatible = "mstar,msg2638" }, + { } +}; +module_device_table(of, msg2638_of_match); + +static struct i2c_driver msg2638_ts_driver = { + .probe_new = msg2638_ts_probe, + .driver = { + .name = "mstar-ts", + .pm = &msg2638_pm_ops, + .of_match_table = msg2638_of_match, + }, +}; +module_i2c_driver(msg2638_ts_driver); + +module_author("vincent knecht <vincent.knecht@mailoo.org>"); +module_description("mstar msg2638 touchscreen driver"); +module_license("gpl v2");
|
Tablets, touch screens, keyboards, mouses
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cbdb24e59e7fc1943bc72bab4a7b477d298a2d80
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vincent knecht linus walleij linus walleij linaro org
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drivers
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input
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touchscreen
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input: add driver for the hycon hy46xx touchpanel series
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this patch adds support for hycon hy46xx.
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this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
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add driver for the hycon hy46xx touchpanel series
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['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
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['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
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[]
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['kconfig', 'maintainers', 'c', 'makefile']
| 4
| 604
| 0
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--- diff --git a/maintainers b/maintainers --- a/maintainers +++ b/maintainers +f: drivers/input/touchscreen/hy46xx.c diff --git a/drivers/input/touchscreen/kconfig b/drivers/input/touchscreen/kconfig --- a/drivers/input/touchscreen/kconfig +++ b/drivers/input/touchscreen/kconfig +config touchscreen_hycon_hy46xx + tristate "hycon hy46xx touchscreen support" + depends on i2c + help + say y here if you have a touchscreen using hycon hy46xx + + if unsure, say n. + + to compile this driver as a module, choose m here: the + module will be called hycon-hy46xx. + diff --git a/drivers/input/touchscreen/makefile b/drivers/input/touchscreen/makefile --- a/drivers/input/touchscreen/makefile +++ b/drivers/input/touchscreen/makefile +obj-$(config_touchscreen_hycon_hy46xx) += hycon-hy46xx.o diff --git a/drivers/input/touchscreen/hycon-hy46xx.c b/drivers/input/touchscreen/hycon-hy46xx.c --- /dev/null +++ b/drivers/input/touchscreen/hycon-hy46xx.c +// spdx-license-identifier: gpl-2.0 +/* + * copyright (c) 2021 + * author(s): giulio benetti <giulio.benetti@benettiengineering.com> + */ + +#include <linux/delay.h> +#include <linux/gpio/consumer.h> +#include <linux/i2c.h> +#include <linux/interrupt.h> +#include <linux/input.h> +#include <linux/input/mt.h> +#include <linux/input/touchscreen.h> +#include <linux/irq.h> +#include <linux/regulator/consumer.h> +#include <linux/regmap.h> + +#include <asm/unaligned.h> + +#define hy46xx_chksum_code 0x1 +#define hy46xx_finger_num 0x2 +#define hy46xx_chksum_len 0x7 +#define hy46xx_threshold 0x80 +#define hy46xx_glove_en 0x84 +#define hy46xx_report_speed 0x88 +#define hy46xx_pwr_noise_en 0x89 +#define hy46xx_filter_data 0x8a +#define hy46xx_gain 0x92 +#define hy46xx_edge_offset 0x93 +#define hy46xx_rx_nr_used 0x94 +#define hy46xx_tx_nr_used 0x95 +#define hy46xx_pwr_mode 0xa5 +#define hy46xx_fw_version 0xa6 +#define hy46xx_lib_version 0xa7 +#define hy46xx_tp_info 0xa8 +#define hy46xx_tp_chip_id 0xa9 +#define hy46xx_boot_ver 0xb0 + +#define hy46xx_tplen 0x6 +#define hy46xx_report_pkt_len 0x44 + +#define hy46xx_max_supported_points 11 + +#define touch_event_down 0x00 +#define touch_event_up 0x01 +#define touch_event_contact 0x02 +#define touch_event_reserved 0x03 + +struct hycon_hy46xx_data { + struct i2c_client *client; + struct input_dev *input; + struct touchscreen_properties prop; + struct regulator *vcc; + + struct gpio_desc *reset_gpio; + + struct mutex mutex; + struct regmap *regmap; + + int threshold; + bool glove_enable; + int report_speed; + bool noise_filter_enable; + int filter_data; + int gain; + int edge_offset; + int rx_number_used; + int tx_number_used; + int power_mode; + int fw_version; + int lib_version; + int tp_information; + int tp_chip_id; + int bootloader_version; +}; + +static const struct regmap_config hycon_hy46xx_i2c_regmap_config = { + .reg_bits = 8, + .val_bits = 8, +}; + +static bool hycon_hy46xx_check_checksum(struct hycon_hy46xx_data *tsdata, u8 *buf) +{ + u8 chksum = 0; + int i; + + for (i = 2; i < buf[hy46xx_chksum_len]; i++) + chksum += buf[i]; + + if (chksum == buf[hy46xx_chksum_code]) + return true; + + dev_err_ratelimited(&tsdata->client->dev, + "checksum error: 0x%02x expected, got 0x%02x ", + chksum, buf[hy46xx_chksum_code]); + + return false; +} + +static irqreturn_t hycon_hy46xx_isr(int irq, void *dev_id) +{ + struct hycon_hy46xx_data *tsdata = dev_id; + struct device *dev = &tsdata->client->dev; + u8 rdbuf[hy46xx_report_pkt_len]; + int i, x, y, id; + int error; + + memset(rdbuf, 0, sizeof(rdbuf)); + + error = regmap_bulk_read(tsdata->regmap, 0, rdbuf, sizeof(rdbuf)); + if (error) { + dev_err_ratelimited(dev, "unable to fetch data, error: %d ", + error); + goto out; + } + + if (!hycon_hy46xx_check_checksum(tsdata, rdbuf)) + goto out; + + for (i = 0; i < hy46xx_max_supported_points; i++) { + u8 *buf = &rdbuf[3 + (hy46xx_tplen * i)]; + int type = buf[0] >> 6; + + if (type == touch_event_reserved) + continue; + + x = get_unaligned_be16(buf) & 0x0fff; + y = get_unaligned_be16(buf + 2) & 0x0fff; + + id = buf[2] >> 4; + + input_mt_slot(tsdata->input, id); + if (input_mt_report_slot_state(tsdata->input, mt_tool_finger, + type != touch_event_up)) + touchscreen_report_pos(tsdata->input, &tsdata->prop, + x, y, true); + } + + input_mt_report_pointer_emulation(tsdata->input, false); + input_sync(tsdata->input); + +out: + return irq_handled; +} + +struct hycon_hy46xx_attribute { + struct device_attribute dattr; + size_t field_offset; + u8 address; + u8 limit_low; + u8 limit_high; +}; + +#define hycon_attr_u8(_field, _mode, _address, _limit_low, _limit_high) \ + struct hycon_hy46xx_attribute hycon_hy46xx_attr_##_field = { \ + .dattr = __attr(_field, _mode, \ + hycon_hy46xx_setting_show, \ + hycon_hy46xx_setting_store), \ + .field_offset = offsetof(struct hycon_hy46xx_data, _field), \ + .address = _address, \ + .limit_low = _limit_low, \ + .limit_high = _limit_high, \ + } + +#define hycon_attr_bool(_field, _mode, _address) \ + struct hycon_hy46xx_attribute hycon_hy46xx_attr_##_field = { \ + .dattr = __attr(_field, _mode, \ + hycon_hy46xx_setting_show, \ + hycon_hy46xx_setting_store), \ + .field_offset = offsetof(struct hycon_hy46xx_data, _field), \ + .address = _address, \ + .limit_low = false, \ + .limit_high = true, \ + } + +static ssize_t hycon_hy46xx_setting_show(struct device *dev, + struct device_attribute *dattr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct hycon_hy46xx_data *tsdata = i2c_get_clientdata(client); + struct hycon_hy46xx_attribute *attr = + container_of(dattr, struct hycon_hy46xx_attribute, dattr); + u8 *field = (u8 *)tsdata + attr->field_offset; + size_t count = 0; + int error = 0; + int val; + + mutex_lock(&tsdata->mutex); + + error = regmap_read(tsdata->regmap, attr->address, &val); + if (error < 0) { + dev_err(&tsdata->client->dev, + "failed to fetch attribute %s, error %d ", + dattr->attr.name, error); + goto out; + } + + if (val != *field) { + dev_warn(&tsdata->client->dev, + "%s: read (%d) and stored value (%d) differ ", + dattr->attr.name, val, *field); + *field = val; + } + + count = scnprintf(buf, page_size, "%d ", val); + +out: + mutex_unlock(&tsdata->mutex); + return error ?: count; +} + +static ssize_t hycon_hy46xx_setting_store(struct device *dev, + struct device_attribute *dattr, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct hycon_hy46xx_data *tsdata = i2c_get_clientdata(client); + struct hycon_hy46xx_attribute *attr = + container_of(dattr, struct hycon_hy46xx_attribute, dattr); + u8 *field = (u8 *)tsdata + attr->field_offset; + unsigned int val; + int error; + + mutex_lock(&tsdata->mutex); + + error = kstrtouint(buf, 0, &val); + if (error) + goto out; + + if (val < attr->limit_low || val > attr->limit_high) { + error = -erange; + goto out; + } + + error = regmap_write(tsdata->regmap, attr->address, val); + if (error < 0) { + dev_err(&tsdata->client->dev, + "failed to update attribute %s, error: %d ", + dattr->attr.name, error); + goto out; + } + *field = val; + +out: + mutex_unlock(&tsdata->mutex); + return error ?: count; +} + +static hycon_attr_u8(threshold, 0644, hy46xx_threshold, 0, 255); +static hycon_attr_bool(glove_enable, 0644, hy46xx_glove_en); +static hycon_attr_u8(report_speed, 0644, hy46xx_report_speed, 0, 255); +static hycon_attr_bool(noise_filter_enable, 0644, hy46xx_pwr_noise_en); +static hycon_attr_u8(filter_data, 0644, hy46xx_filter_data, 0, 5); +static hycon_attr_u8(gain, 0644, hy46xx_gain, 0, 5); +static hycon_attr_u8(edge_offset, 0644, hy46xx_edge_offset, 0, 5); +static hycon_attr_u8(fw_version, 0444, hy46xx_fw_version, 0, 255); +static hycon_attr_u8(lib_version, 0444, hy46xx_lib_version, 0, 255); +static hycon_attr_u8(tp_information, 0444, hy46xx_tp_info, 0, 255); +static hycon_attr_u8(tp_chip_id, 0444, hy46xx_tp_chip_id, 0, 255); +static hycon_attr_u8(bootloader_version, 0444, hy46xx_boot_ver, 0, 255); + +static struct attribute *hycon_hy46xx_attrs[] = { + &hycon_hy46xx_attr_threshold.dattr.attr, + &hycon_hy46xx_attr_glove_enable.dattr.attr, + &hycon_hy46xx_attr_report_speed.dattr.attr, + &hycon_hy46xx_attr_noise_filter_enable.dattr.attr, + &hycon_hy46xx_attr_filter_data.dattr.attr, + &hycon_hy46xx_attr_gain.dattr.attr, + &hycon_hy46xx_attr_edge_offset.dattr.attr, + &hycon_hy46xx_attr_fw_version.dattr.attr, + &hycon_hy46xx_attr_lib_version.dattr.attr, + &hycon_hy46xx_attr_tp_information.dattr.attr, + &hycon_hy46xx_attr_tp_chip_id.dattr.attr, + &hycon_hy46xx_attr_bootloader_version.dattr.attr, + null +}; + +static const struct attribute_group hycon_hy46xx_attr_group = { + .attrs = hycon_hy46xx_attrs, +}; + +static void hycon_hy46xx_get_defaults(struct device *dev, struct hycon_hy46xx_data *tsdata) +{ + bool val_bool; + int error; + u32 val; + + error = device_property_read_u32(dev, "hycon,threshold", &val); + if (!error) { + error = regmap_write(tsdata->regmap, hy46xx_threshold, val); + if (error < 0) + goto out; + + tsdata->threshold = val; + } + + val_bool = device_property_read_bool(dev, "hycon,glove-enable"); + error = regmap_write(tsdata->regmap, hy46xx_glove_en, val_bool); + if (error < 0) + goto out; + tsdata->glove_enable = val_bool; + + error = device_property_read_u32(dev, "hycon,report-speed-hz", &val); + if (!error) { + error = regmap_write(tsdata->regmap, hy46xx_report_speed, val); + if (error < 0) + goto out; + + tsdata->report_speed = val; + } + + val_bool = device_property_read_bool(dev, "hycon,noise-filter-enable"); + error = regmap_write(tsdata->regmap, hy46xx_pwr_noise_en, val_bool); + if (error < 0) + goto out; + tsdata->noise_filter_enable = val_bool; + + error = device_property_read_u32(dev, "hycon,filter-data", &val); + if (!error) { + error = regmap_write(tsdata->regmap, hy46xx_filter_data, val); + if (error < 0) + goto out; + + tsdata->filter_data = val; + } + + error = device_property_read_u32(dev, "hycon,gain", &val); + if (!error) { + error = regmap_write(tsdata->regmap, hy46xx_gain, val); + if (error < 0) + goto out; + + tsdata->gain = val; + } + + error = device_property_read_u32(dev, "hycon,edge-offset", &val); + if (!error) { + error = regmap_write(tsdata->regmap, hy46xx_edge_offset, val); + if (error < 0) + goto out; + + tsdata->edge_offset = val; + } + + return; +out: + dev_err(&tsdata->client->dev, "failed to set default settings"); +} + +static void hycon_hy46xx_get_parameters(struct hycon_hy46xx_data *tsdata) +{ + int error; + u32 val; + + error = regmap_read(tsdata->regmap, hy46xx_threshold, &val); + if (error < 0) + goto out; + tsdata->threshold = val; + + error = regmap_read(tsdata->regmap, hy46xx_glove_en, &val); + if (error < 0) + goto out; + tsdata->glove_enable = val; + + error = regmap_read(tsdata->regmap, hy46xx_report_speed, &val); + if (error < 0) + goto out; + tsdata->report_speed = val; + + error = regmap_read(tsdata->regmap, hy46xx_pwr_noise_en, &val); + if (error < 0) + goto out; + tsdata->noise_filter_enable = val; + + error = regmap_read(tsdata->regmap, hy46xx_filter_data, &val); + if (error < 0) + goto out; + tsdata->filter_data = val; + + error = regmap_read(tsdata->regmap, hy46xx_gain, &val); + if (error < 0) + goto out; + tsdata->gain = val; + + error = regmap_read(tsdata->regmap, hy46xx_edge_offset, &val); + if (error < 0) + goto out; + tsdata->edge_offset = val; + + error = regmap_read(tsdata->regmap, hy46xx_rx_nr_used, &val); + if (error < 0) + goto out; + tsdata->rx_number_used = val; + + error = regmap_read(tsdata->regmap, hy46xx_tx_nr_used, &val); + if (error < 0) + goto out; + tsdata->tx_number_used = val; + + error = regmap_read(tsdata->regmap, hy46xx_pwr_mode, &val); + if (error < 0) + goto out; + tsdata->power_mode = val; + + error = regmap_read(tsdata->regmap, hy46xx_fw_version, &val); + if (error < 0) + goto out; + tsdata->fw_version = val; + + error = regmap_read(tsdata->regmap, hy46xx_lib_version, &val); + if (error < 0) + goto out; + tsdata->lib_version = val; + + error = regmap_read(tsdata->regmap, hy46xx_tp_info, &val); + if (error < 0) + goto out; + tsdata->tp_information = val; + + error = regmap_read(tsdata->regmap, hy46xx_tp_chip_id, &val); + if (error < 0) + goto out; + tsdata->tp_chip_id = val; + + error = regmap_read(tsdata->regmap, hy46xx_boot_ver, &val); + if (error < 0) + goto out; + tsdata->bootloader_version = val; + + return; +out: + dev_err(&tsdata->client->dev, "failed to read default settings"); +} + +static void hycon_hy46xx_disable_regulator(void *arg) +{ + struct hycon_hy46xx_data *data = arg; + + regulator_disable(data->vcc); +} + +static int hycon_hy46xx_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct hycon_hy46xx_data *tsdata; + struct input_dev *input; + int error; + + dev_dbg(&client->dev, "probing for hycon hy46xx i2c "); + + tsdata = devm_kzalloc(&client->dev, sizeof(*tsdata), gfp_kernel); + if (!tsdata) + return -enomem; + + tsdata->vcc = devm_regulator_get(&client->dev, "vcc"); + if (is_err(tsdata->vcc)) { + error = ptr_err(tsdata->vcc); + if (error != -eprobe_defer) + dev_err(&client->dev, + "failed to request regulator: %d ", error); + return error; + } + + error = regulator_enable(tsdata->vcc); + if (error < 0) { + dev_err(&client->dev, "failed to enable vcc: %d ", error); + return error; + } + + error = devm_add_action_or_reset(&client->dev, + hycon_hy46xx_disable_regulator, + tsdata); + if (error) + return error; + + tsdata->reset_gpio = devm_gpiod_get_optional(&client->dev, + "reset", gpiod_out_low); + if (is_err(tsdata->reset_gpio)) { + error = ptr_err(tsdata->reset_gpio); + dev_err(&client->dev, + "failed to request gpio reset pin, error %d ", error); + return error; + } + + if (tsdata->reset_gpio) { + usleep_range(5000, 6000); + gpiod_set_value_cansleep(tsdata->reset_gpio, 1); + usleep_range(5000, 6000); + gpiod_set_value_cansleep(tsdata->reset_gpio, 0); + msleep(1000); + } + + input = devm_input_allocate_device(&client->dev); + if (!input) { + dev_err(&client->dev, "failed to allocate input device. "); + return -enomem; + } + + mutex_init(&tsdata->mutex); + tsdata->client = client; + tsdata->input = input; + + tsdata->regmap = devm_regmap_init_i2c(client, + &hycon_hy46xx_i2c_regmap_config); + if (is_err(tsdata->regmap)) { + dev_err(&client->dev, "regmap allocation failed "); + return ptr_err(tsdata->regmap); + } + + hycon_hy46xx_get_defaults(&client->dev, tsdata); + hycon_hy46xx_get_parameters(tsdata); + + input->name = "hycon capacitive touch"; + input->id.bustype = bus_i2c; + input->dev.parent = &client->dev; + + input_set_abs_params(input, abs_mt_position_x, 0, -1, 0, 0); + input_set_abs_params(input, abs_mt_position_y, 0, -1, 0, 0); + + touchscreen_parse_properties(input, true, &tsdata->prop); + + error = input_mt_init_slots(input, hy46xx_max_supported_points, + input_mt_direct); + if (error) { + dev_err(&client->dev, "unable to init mt slots. "); + return error; + } + + i2c_set_clientdata(client, tsdata); + + error = devm_request_threaded_irq(&client->dev, client->irq, + null, hycon_hy46xx_isr, irqf_oneshot, + client->name, tsdata); + if (error) { + dev_err(&client->dev, "unable to request touchscreen irq. "); + return error; + } + + error = devm_device_add_group(&client->dev, &hycon_hy46xx_attr_group); + if (error) + return error; + + error = input_register_device(input); + if (error) + return error; + + dev_dbg(&client->dev, + "hycon hy46xx initialized: irq %d, reset pin %d. ", + client->irq, + tsdata->reset_gpio ? desc_to_gpio(tsdata->reset_gpio) : -1); + + return 0; +} + +static const struct i2c_device_id hycon_hy46xx_id[] = { + { .name = "hy4613" }, + { .name = "hy4614" }, + { .name = "hy4621" }, + { .name = "hy4623" }, + { .name = "hy4633" }, + { .name = "hy4635" }, + { /* sentinel */ } +}; +module_device_table(i2c, hycon_hy46xx_id); + +static const struct of_device_id hycon_hy46xx_of_match[] = { + { .compatible = "hycon,hy4613" }, + { .compatible = "hycon,hy4614" }, + { .compatible = "hycon,hy4621" }, + { .compatible = "hycon,hy4623" }, + { .compatible = "hycon,hy4633" }, + { .compatible = "hycon,hy4635" }, + { /* sentinel */ } +}; +module_device_table(of, hycon_hy46xx_of_match); + +static struct i2c_driver hycon_hy46xx_driver = { + .driver = { + .name = "hycon_hy46xx", + .of_match_table = hycon_hy46xx_of_match, + .probe_type = probe_prefer_asynchronous, + }, + .id_table = hycon_hy46xx_id, + .probe = hycon_hy46xx_probe, +}; + +module_i2c_driver(hycon_hy46xx_driver); + +module_author("giulio benetti <giulio.benetti@benettiengineering.com>"); +module_description("hycon hy46xx i2c touchscreen driver"); +module_license("gpl v2");
|
Tablets, touch screens, keyboards, mouses
|
aa2f62cf211a0985c14fd78a17d55296769698d6
|
giulio benetti
|
drivers
|
input
|
touchscreen
|
input: atc260x: add onkey driver for atc260x pmics
|
the actions semi atc260x pmics are able to manage an onkey button. this driver exposes the atc260x onkey as an input device. it can also be configured to force a system reset on a long key-press with an adjustable duration.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add onkey driver for atc260x pmics
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['atc260x']
|
['kconfig', 'c', 'makefile']
| 3
| 317
| 1
|
--- diff --git a/drivers/input/misc/kconfig b/drivers/input/misc/kconfig --- a/drivers/input/misc/kconfig +++ b/drivers/input/misc/kconfig +config input_atc260x_onkey + tristate "actions semi atc260x pmic onkey" + depends on mfd_atc260x + help + support the onkey of atc260x pmics as an input device reporting + power button status. onkey can be used to wakeup from low power + modes and force a reset on long press. + + to compile this driver as a module, choose m here: the + module will be called atc260x-onkey. + diff --git a/drivers/input/misc/makefile b/drivers/input/misc/makefile --- a/drivers/input/misc/makefile +++ b/drivers/input/misc/makefile +obj-$(config_input_atc260x_onkey) += atc260x-onkey.o - diff --git a/drivers/input/misc/atc260x-onkey.c b/drivers/input/misc/atc260x-onkey.c --- /dev/null +++ b/drivers/input/misc/atc260x-onkey.c +// spdx-license-identifier: gpl-2.0+ +/* + * onkey driver for actions semi atc260x pmics. + * + * copyright (c) 2020 cristian ciocaltea <cristian.ciocaltea@gmail.com> + */ + +#include <linux/bitfield.h> +#include <linux/input.h> +#include <linux/interrupt.h> +#include <linux/mfd/atc260x/core.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> + +/* <2s for short press, >2s for long press */ +#define key_press_time_sec 2 + +/* driver internals */ +enum atc260x_onkey_reset_status { + key_reset_hw_default, + key_reset_disabled, + key_reset_user_sel, +}; + +struct atc260x_onkey_params { + u32 reg_int_ctl; + u32 kdwn_state_bm; + u32 long_int_pnd_bm; + u32 short_int_pnd_bm; + u32 kdwn_int_pnd_bm; + u32 press_int_en_bm; + u32 kdwn_int_en_bm; + u32 press_time_bm; + u32 reset_en_bm; + u32 reset_time_bm; +}; + +struct atc260x_onkey { + struct atc260x *atc260x; + const struct atc260x_onkey_params *params; + struct input_dev *input_dev; + struct delayed_work work; + int irq; +}; + +static const struct atc260x_onkey_params atc2603c_onkey_params = { + .reg_int_ctl = atc2603c_pmu_sys_ctl2, + .long_int_pnd_bm = atc2603c_pmu_sys_ctl2_onoff_long_press, + .short_int_pnd_bm = atc2603c_pmu_sys_ctl2_onoff_short_press, + .kdwn_int_pnd_bm = atc2603c_pmu_sys_ctl2_onoff_press_pd, + .press_int_en_bm = atc2603c_pmu_sys_ctl2_onoff_int_en, + .kdwn_int_en_bm = atc2603c_pmu_sys_ctl2_onoff_press_int_en, + .kdwn_state_bm = atc2603c_pmu_sys_ctl2_onoff_press, + .press_time_bm = atc2603c_pmu_sys_ctl2_onoff_press_time, + .reset_en_bm = atc2603c_pmu_sys_ctl2_onoff_press_reset_en, + .reset_time_bm = atc2603c_pmu_sys_ctl2_onoff_reset_time_sel, +}; + +static const struct atc260x_onkey_params atc2609a_onkey_params = { + .reg_int_ctl = atc2609a_pmu_sys_ctl2, + .long_int_pnd_bm = atc2609a_pmu_sys_ctl2_onoff_long_press, + .short_int_pnd_bm = atc2609a_pmu_sys_ctl2_onoff_short_press, + .kdwn_int_pnd_bm = atc2609a_pmu_sys_ctl2_onoff_press_pd, + .press_int_en_bm = atc2609a_pmu_sys_ctl2_onoff_lsp_int_en, + .kdwn_int_en_bm = atc2609a_pmu_sys_ctl2_onoff_press_int_en, + .kdwn_state_bm = atc2609a_pmu_sys_ctl2_onoff_press, + .press_time_bm = atc2609a_pmu_sys_ctl2_onoff_press_time, + .reset_en_bm = atc2609a_pmu_sys_ctl2_onoff_reset_en, + .reset_time_bm = atc2609a_pmu_sys_ctl2_onoff_reset_time_sel, +}; + +static int atc2603x_onkey_hw_init(struct atc260x_onkey *onkey, + enum atc260x_onkey_reset_status reset_status, + u32 reset_time, u32 press_time) +{ + u32 reg_bm, reg_val; + + reg_bm = onkey->params->long_int_pnd_bm | + onkey->params->short_int_pnd_bm | + onkey->params->kdwn_int_pnd_bm | + onkey->params->press_int_en_bm | + onkey->params->kdwn_int_en_bm; + + reg_val = reg_bm | press_time; + reg_bm |= onkey->params->press_time_bm; + + if (reset_status == key_reset_disabled) { + reg_bm |= onkey->params->reset_en_bm; + } else if (reset_status == key_reset_user_sel) { + reg_bm |= onkey->params->reset_en_bm | + onkey->params->reset_time_bm; + reg_val |= onkey->params->reset_en_bm | reset_time; + } + + return regmap_update_bits(onkey->atc260x->regmap, + onkey->params->reg_int_ctl, reg_bm, reg_val); +} + +static void atc260x_onkey_query(struct atc260x_onkey *onkey) +{ + u32 reg_bits; + int ret, key_down; + + ret = regmap_read(onkey->atc260x->regmap, + onkey->params->reg_int_ctl, &key_down); + if (ret) { + key_down = 1; + dev_err(onkey->atc260x->dev, + "failed to read onkey status: %d ", ret); + } else { + key_down &= onkey->params->kdwn_state_bm; + } + + /* + * the hardware generates interrupt only when the onkey pin is + * asserted. hence, the deassertion of the pin is simulated through + * work queue. + */ + if (key_down) { + schedule_delayed_work(&onkey->work, msecs_to_jiffies(200)); + return; + } + + /* + * the key-down status bit is cleared when the on/off button + * is released. + */ + input_report_key(onkey->input_dev, key_power, 0); + input_sync(onkey->input_dev); + + reg_bits = onkey->params->long_int_pnd_bm | + onkey->params->short_int_pnd_bm | + onkey->params->kdwn_int_pnd_bm | + onkey->params->press_int_en_bm | + onkey->params->kdwn_int_en_bm; + + /* clear key press pending events and enable key press interrupts. */ + regmap_update_bits(onkey->atc260x->regmap, onkey->params->reg_int_ctl, + reg_bits, reg_bits); +} + +static void atc260x_onkey_work(struct work_struct *work) +{ + struct atc260x_onkey *onkey = container_of(work, struct atc260x_onkey, + work.work); + atc260x_onkey_query(onkey); +} + +static irqreturn_t atc260x_onkey_irq(int irq, void *data) +{ + struct atc260x_onkey *onkey = data; + int ret; + + /* disable key press interrupts. */ + ret = regmap_update_bits(onkey->atc260x->regmap, + onkey->params->reg_int_ctl, + onkey->params->press_int_en_bm | + onkey->params->kdwn_int_en_bm, 0); + if (ret) + dev_err(onkey->atc260x->dev, + "failed to disable interrupts: %d ", ret); + + input_report_key(onkey->input_dev, key_power, 1); + input_sync(onkey->input_dev); + + atc260x_onkey_query(onkey); + + return irq_handled; +} + +static int atc260x_onkey_open(struct input_dev *dev) +{ + struct atc260x_onkey *onkey = input_get_drvdata(dev); + + enable_irq(onkey->irq); + + return 0; +} + +static void atc260x_onkey_close(struct input_dev *dev) +{ + struct atc260x_onkey *onkey = input_get_drvdata(dev); + + disable_irq(onkey->irq); + cancel_delayed_work_sync(&onkey->work); +} + +static int atc260x_onkey_probe(struct platform_device *pdev) +{ + struct atc260x *atc260x = dev_get_drvdata(pdev->dev.parent); + struct atc260x_onkey *onkey; + struct input_dev *input_dev; + enum atc260x_onkey_reset_status reset_status; + u32 press_time = key_press_time_sec, reset_time = 0; + int val, error; + + onkey = devm_kzalloc(&pdev->dev, sizeof(*onkey), gfp_kernel); + if (!onkey) + return -enomem; + + error = device_property_read_u32(pdev->dev.parent, + "reset-time-sec", &val); + if (error) { + reset_status = key_reset_hw_default; + } else if (val) { + if (val < 6 || val > 12) { + dev_err(&pdev->dev, "reset-time-sec out of range "); + return -einval; + } + + reset_status = key_reset_user_sel; + reset_time = (val - 6) / 2; + } else { + reset_status = key_reset_disabled; + dev_dbg(&pdev->dev, "disabled reset on long-press "); + } + + switch (atc260x->ic_type) { + case atc2603c: + onkey->params = &atc2603c_onkey_params; + press_time = field_prep(atc2603c_pmu_sys_ctl2_onoff_press_time, + press_time); + reset_time = field_prep(atc2603c_pmu_sys_ctl2_onoff_reset_time_sel, + reset_time); + break; + case atc2609a: + onkey->params = &atc2609a_onkey_params; + press_time = field_prep(atc2609a_pmu_sys_ctl2_onoff_press_time, + press_time); + reset_time = field_prep(atc2609a_pmu_sys_ctl2_onoff_reset_time_sel, + reset_time); + break; + default: + dev_err(&pdev->dev, + "onkey not supported for atc260x pmic type: %u ", + atc260x->ic_type); + return -einval; + } + + input_dev = devm_input_allocate_device(&pdev->dev); + if (!input_dev) { + dev_err(&pdev->dev, "failed to allocate input device "); + return -enomem; + } + + onkey->input_dev = input_dev; + onkey->atc260x = atc260x; + + input_dev->name = "atc260x-onkey"; + input_dev->phys = "atc260x-onkey/input0"; + input_dev->open = atc260x_onkey_open; + input_dev->close = atc260x_onkey_close; + + input_set_capability(input_dev, ev_key, key_power); + input_set_drvdata(input_dev, onkey); + + init_delayed_work(&onkey->work, atc260x_onkey_work); + + onkey->irq = platform_get_irq(pdev, 0); + if (onkey->irq < 0) + return onkey->irq; + + error = devm_request_threaded_irq(&pdev->dev, onkey->irq, null, + atc260x_onkey_irq, irqf_oneshot, + dev_name(&pdev->dev), onkey); + if (error) { + dev_err(&pdev->dev, + "failed to register irq %d: %d ", onkey->irq, error); + return error; + } + + /* keep irq disabled until atc260x_onkey_open() is called. */ + disable_irq(onkey->irq); + + error = input_register_device(input_dev); + if (error) { + dev_err(&pdev->dev, + "failed to register input device: %d ", error); + return error; + } + + error = atc2603x_onkey_hw_init(onkey, reset_status, + reset_time, press_time); + if (error) + return error; + + device_init_wakeup(&pdev->dev, true); + + return 0; +} + +static struct platform_driver atc260x_onkey_driver = { + .probe = atc260x_onkey_probe, + .driver = { + .name = "atc260x-onkey", + }, +}; + +module_platform_driver(atc260x_onkey_driver); + +module_description("onkey driver for atc260x pmics"); +module_author("cristian ciocaltea <cristian.ciocaltea@gmail.com>"); +module_license("gpl");
|
Tablets, touch screens, keyboards, mouses
|
44f6b6a50ee3ff91baef7c99d9552aa5b97a890e
|
cristian ciocaltea
|
drivers
|
input
|
misc
|
input: exc3000 - add type sysfs attribute
|
add a sysfs attribute to query the type of the touchscreen device.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add type sysfs attribute
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['exc3000']
|
['sysfs-driver-input-exc3000', 'c']
| 2
| 26
| 0
|
--- diff --git a/documentation/abi/testing/sysfs-driver-input-exc3000 b/documentation/abi/testing/sysfs-driver-input-exc3000 --- a/documentation/abi/testing/sysfs-driver-input-exc3000 +++ b/documentation/abi/testing/sysfs-driver-input-exc3000 + +what: /sys/bus/i2c/devices/xxx/type +date: jan 2021 +contact: linux-input@vger.kernel.org +description: reports the type identification provided by the touchscreen, for example "pcap82h80 series" + + access: read + + valid values: represented as string diff --git a/drivers/input/touchscreen/exc3000.c b/drivers/input/touchscreen/exc3000.c --- a/drivers/input/touchscreen/exc3000.c +++ b/drivers/input/touchscreen/exc3000.c +static ssize_t type_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct exc3000_data *data = i2c_get_clientdata(client); + u8 response[exc3000_len_frame]; + int ret; + + ret = exc3000_vendor_data_request(data, (u8[]){'f'}, 1, response, 1); + if (ret < 0) + return ret; + + return sprintf(buf, "%s ", &response[1]); +} +static device_attr_ro(type); + + &dev_attr_type.attr,
|
Tablets, touch screens, keyboards, mouses
|
ad117c558e838f9fa93af265d8f9dd54e87e15b1
|
lucas stach
|
documentation
|
abi
|
testing, touchscreen
|
input: iqs5xx - expose firmware revision to user space
|
add the read-only 'fw_info' attribute which reports information about the device's firmware in the following format:
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
expose firmware revision to user space
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['iqs5xx']
|
['c']
| 1
| 40
| 16
|
--- diff --git a/drivers/input/touchscreen/iqs5xx.c b/drivers/input/touchscreen/iqs5xx.c --- a/drivers/input/touchscreen/iqs5xx.c +++ b/drivers/input/touchscreen/iqs5xx.c +#define iqs5xx_exp_file 0x0677 -#define iqs5xx_bl_status_reset 0x00 -struct iqs5xx_private { - struct i2c_client *client; - struct input_dev *input; - struct gpio_desc *reset_gpio; - struct touchscreen_properties prop; - struct mutex lock; - u8 bl_status; -}; - +struct iqs5xx_private { + struct i2c_client *client; + struct input_dev *input; + struct gpio_desc *reset_gpio; + struct touchscreen_properties prop; + struct mutex lock; + struct iqs5xx_dev_id_info dev_id_info; + u8 exp_file[2]; +}; + - if (iqs5xx->bl_status == iqs5xx_bl_status_reset) + if (!iqs5xx->dev_id_info.bl_status) + error = iqs5xx_read_burst(client, iqs5xx_exp_file, + iqs5xx->exp_file, sizeof(iqs5xx->exp_file)); + if (error) + return error; + - iqs5xx->bl_status = dev_id_info->bl_status; + iqs5xx->dev_id_info = *dev_id_info; - if (iqs5xx->bl_status == iqs5xx_bl_status_reset) + if (!iqs5xx->dev_id_info.bl_status) - if (iqs5xx->bl_status == iqs5xx_bl_status_none) + if (iqs5xx->dev_id_info.bl_status == iqs5xx_bl_status_none) - iqs5xx->bl_status = iqs5xx_bl_status_reset; + iqs5xx->dev_id_info.bl_status = 0; - if (!error && iqs5xx->bl_status == iqs5xx_bl_status_reset) + if (!error && !iqs5xx->dev_id_info.bl_status) +static ssize_t fw_info_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct iqs5xx_private *iqs5xx = dev_get_drvdata(dev); + + if (!iqs5xx->dev_id_info.bl_status) + return -enodata; + + return scnprintf(buf, page_size, "%u.%u.%u.%u:%u.%u ", + be16_to_cpu(iqs5xx->dev_id_info.prod_num), + be16_to_cpu(iqs5xx->dev_id_info.proj_num), + iqs5xx->dev_id_info.major_ver, + iqs5xx->dev_id_info.minor_ver, + iqs5xx->exp_file[0], iqs5xx->exp_file[1]); +} + +static device_attr_ro(fw_info); + &dev_attr_fw_info.attr,
|
Tablets, touch screens, keyboards, mouses
|
509c0083132bdca505a17140bc98a8365bf4e6ca
|
jeff labundy
|
drivers
|
input
|
touchscreen
|
input: mms114 - support mms136
|
the melfas mms136 is similar to the other mms variants but has event packages of 6 bytes rather than 8 as the others.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
support mms136
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['mms114']
|
['c']
| 1
| 16
| 6
|
--- diff --git a/drivers/input/touchscreen/mms114.c b/drivers/input/touchscreen/mms114.c --- a/drivers/input/touchscreen/mms114.c +++ b/drivers/input/touchscreen/mms114.c -// melfas mms114/mms152 touchscreen device driver +// melfas mms114/mms136/mms152 touchscreen device driver -#define mms114_packet_num 8 +#define mms114_event_size 8 +#define mms136_event_size 6 + type_mms136 = 136, - touch_size = packet_size / mms114_packet_num; + /* mms136 has slightly different event size */ + if (data->type == type_mms136) + touch_size = packet_size / mms136_event_size; + else + touch_size = packet_size / mms114_event_size; + case type_mms136: - /* only mms114 has configuration and power on registers */ - if (data->type != type_mms114) + /* only mms114 and mms136 have configuration and power on registers */ + if (data->type != type_mms114 && data->type != type_mms136) - if (data->type == type_mms114) { + if (data->type == type_mms114 || data->type == type_mms136) { + }, { + .compatible = "melfas,mms136", + .data = (void *)type_mms136,
|
Tablets, touch screens, keyboards, mouses
|
53fefdd1d3a3403d8c44e28898d1031d8763b913
|
linus walleij
|
drivers
|
input
|
touchscreen
|
input: xpad - add support for amazon game controller
|
the amazon luna controller (product name "amazon game controller") behaves like an xbox 360 controller when connected over usb.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add support for amazon game controller
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['xpad']
|
['c']
| 1
| 2
| 0
|
--- diff --git a/drivers/input/joystick/xpad.c b/drivers/input/joystick/xpad.c --- a/drivers/input/joystick/xpad.c +++ b/drivers/input/joystick/xpad.c + { 0x1949, 0x041a, "amazon game controller", 0, xtype_xbox360 }, + xpad_xbox360_vendor(0x1949), /* amazon controllers */
|
Tablets, touch screens, keyboards, mouses
|
05665cef4b745cb46b1d1b8e96deaa25464092d3
|
matt reynolds harry cutts hcutts chromium org
|
drivers
|
input
|
joystick
|
hid: add support for surface aggregator module hid transport
|
add a hid transport driver to support integrated hid devices on newer microsoft surface models (specifically 7th-generation, i.e. surface laptop 3, surface book 3, and later).
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add support for surface aggregator module hid transport
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['hid ']
|
['c', 'h', 'kconfig', 'maintainers', 'makefile']
| 8
| 647
| 0
|
--- diff --git a/maintainers b/maintainers --- a/maintainers +++ b/maintainers +microsoft surface hid transport driver +m: maximilian luz <luzmaximilian@gmail.com> +l: linux-input@vger.kernel.org +l: platform-driver-x86@vger.kernel.org +s: maintained +f: drivers/hid/surface-hid/ + diff --git a/drivers/hid/kconfig b/drivers/hid/kconfig --- a/drivers/hid/kconfig +++ b/drivers/hid/kconfig +source "drivers/hid/surface-hid/kconfig" + diff --git a/drivers/hid/makefile b/drivers/hid/makefile --- a/drivers/hid/makefile +++ b/drivers/hid/makefile + +obj-$(config_surface_hid_core) += surface-hid/ diff --git a/drivers/hid/surface-hid/kconfig b/drivers/hid/surface-hid/kconfig --- /dev/null +++ b/drivers/hid/surface-hid/kconfig +# spdx-license-identifier: gpl-2.0+ +menu "surface system aggregator module hid support" + depends on surface_aggregator + depends on input + +config surface_hid + tristate "hid transport driver for surface system aggregator module" + depends on surface_aggregator_registry + select surface_hid_core + help + driver to support integrated hid devices on newer microsoft surface + models. + + this driver provides support for the hid transport protocol provided + by the surface aggregator module (i.e. the embedded controller) on + 7th-generation microsoft surface devices, i.e. surface book 3 and + surface laptop 3. on those models, it is mainly used to connect the + integrated touchpad and keyboard. + + say m or y here, if you want support for integrated hid devices, i.e. + integrated touchpad and keyboard, on 7th generation microsoft surface + models. + +endmenu + +config surface_hid_core + tristate + select hid diff --git a/drivers/hid/surface-hid/makefile b/drivers/hid/surface-hid/makefile --- /dev/null +++ b/drivers/hid/surface-hid/makefile +# spdx-license-identifier: gpl-2.0+ +# +# makefile - surface system aggregator module (ssam) hid transport driver. +# +obj-$(config_surface_hid_core) += surface_hid_core.o +obj-$(config_surface_hid) += surface_hid.o diff --git a/drivers/hid/surface-hid/surface_hid.c b/drivers/hid/surface-hid/surface_hid.c --- /dev/null +++ b/drivers/hid/surface-hid/surface_hid.c +// spdx-license-identifier: gpl-2.0+ +/* + * surface system aggregator module (ssam) hid transport driver for the + * generic hid interface (hid/tc=0x15 subsystem). provides support for + * integrated hid devices on surface laptop 3, book 3, and later. + * + * copyright (c) 2019-2021 blaz hrastnik <blaz@mxxn.io>, + * maximilian luz <luzmaximilian@gmail.com> + */ + +#include <asm/unaligned.h> +#include <linux/hid.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/types.h> + +#include <linux/surface_aggregator/controller.h> +#include <linux/surface_aggregator/device.h> + +#include "surface_hid_core.h" + + +/* -- sam interface. -------------------------------------------------------- */ + +struct surface_hid_buffer_slice { + __u8 entry; + __le32 offset; + __le32 length; + __u8 end; + __u8 data[]; +} __packed; + +static_assert(sizeof(struct surface_hid_buffer_slice) == 10); + +enum surface_hid_cid { + surface_hid_cid_output_report = 0x01, + surface_hid_cid_get_feature_report = 0x02, + surface_hid_cid_set_feature_report = 0x03, + surface_hid_cid_get_descriptor = 0x04, +}; + +static int ssam_hid_get_descriptor(struct surface_hid_device *shid, u8 entry, u8 *buf, size_t len) +{ + u8 buffer[sizeof(struct surface_hid_buffer_slice) + 0x76]; + struct surface_hid_buffer_slice *slice; + struct ssam_request rqst; + struct ssam_response rsp; + u32 buffer_len, offset, length; + int status; + + /* + * note: the 0x76 above has been chosen because that's what's used by + * the windows driver. together with the header, this leads to a 128 + * byte payload in total. + */ + + buffer_len = array_size(buffer) - sizeof(struct surface_hid_buffer_slice); + + rqst.target_category = shid->uid.category; + rqst.target_id = shid->uid.target; + rqst.command_id = surface_hid_cid_get_descriptor; + rqst.instance_id = shid->uid.instance; + rqst.flags = ssam_request_has_response; + rqst.length = sizeof(struct surface_hid_buffer_slice); + rqst.payload = buffer; + + rsp.capacity = array_size(buffer); + rsp.pointer = buffer; + + slice = (struct surface_hid_buffer_slice *)buffer; + slice->entry = entry; + slice->end = 0; + + offset = 0; + length = buffer_len; + + while (!slice->end && offset < len) { + put_unaligned_le32(offset, &slice->offset); + put_unaligned_le32(length, &slice->length); + + rsp.length = 0; + + status = ssam_retry(ssam_request_sync_onstack, shid->ctrl, &rqst, &rsp, + sizeof(*slice)); + if (status) + return status; + + offset = get_unaligned_le32(&slice->offset); + length = get_unaligned_le32(&slice->length); + + /* don't mess stuff up in case we receive garbage. */ + if (length > buffer_len || offset > len) + return -eproto; + + if (offset + length > len) + length = len - offset; + + memcpy(buf + offset, &slice->data[0], length); + + offset += length; + length = buffer_len; + } + + if (offset != len) { + dev_err(shid->dev, "unexpected descriptor length: got %u, expected %zu ", + offset, len); + return -eproto; + } + + return 0; +} + +static int ssam_hid_set_raw_report(struct surface_hid_device *shid, u8 rprt_id, bool feature, + u8 *buf, size_t len) +{ + struct ssam_request rqst; + u8 cid; + + if (feature) + cid = surface_hid_cid_set_feature_report; + else + cid = surface_hid_cid_output_report; + + rqst.target_category = shid->uid.category; + rqst.target_id = shid->uid.target; + rqst.instance_id = shid->uid.instance; + rqst.command_id = cid; + rqst.flags = 0; + rqst.length = len; + rqst.payload = buf; + + buf[0] = rprt_id; + + return ssam_retry(ssam_request_sync, shid->ctrl, &rqst, null); +} + +static int ssam_hid_get_raw_report(struct surface_hid_device *shid, u8 rprt_id, u8 *buf, size_t len) +{ + struct ssam_request rqst; + struct ssam_response rsp; + + rqst.target_category = shid->uid.category; + rqst.target_id = shid->uid.target; + rqst.instance_id = shid->uid.instance; + rqst.command_id = surface_hid_cid_get_feature_report; + rqst.flags = 0; + rqst.length = sizeof(rprt_id); + rqst.payload = &rprt_id; + + rsp.capacity = len; + rsp.length = 0; + rsp.pointer = buf; + + return ssam_retry(ssam_request_sync_onstack, shid->ctrl, &rqst, &rsp, sizeof(rprt_id)); +} + +static u32 ssam_hid_event_fn(struct ssam_event_notifier *nf, const struct ssam_event *event) +{ + struct surface_hid_device *shid = container_of(nf, struct surface_hid_device, notif); + + if (event->command_id != 0x00) + return 0; + + hid_input_report(shid->hid, hid_input_report, (u8 *)&event->data[0], event->length, 0); + return ssam_notif_handled; +} + + +/* -- transport driver. ----------------------------------------------------- */ + +static int shid_output_report(struct surface_hid_device *shid, u8 rprt_id, u8 *buf, size_t len) +{ + int status; + + status = ssam_hid_set_raw_report(shid, rprt_id, false, buf, len); + return status >= 0 ? len : status; +} + +static int shid_get_feature_report(struct surface_hid_device *shid, u8 rprt_id, u8 *buf, size_t len) +{ + int status; + + status = ssam_hid_get_raw_report(shid, rprt_id, buf, len); + return status >= 0 ? len : status; +} + +static int shid_set_feature_report(struct surface_hid_device *shid, u8 rprt_id, u8 *buf, size_t len) +{ + int status; + + status = ssam_hid_set_raw_report(shid, rprt_id, true, buf, len); + return status >= 0 ? len : status; +} + + +/* -- driver setup. --------------------------------------------------------- */ + +static int surface_hid_probe(struct ssam_device *sdev) +{ + struct surface_hid_device *shid; + + shid = devm_kzalloc(&sdev->dev, sizeof(*shid), gfp_kernel); + if (!shid) + return -enomem; + + shid->dev = &sdev->dev; + shid->ctrl = sdev->ctrl; + shid->uid = sdev->uid; + + shid->notif.base.priority = 1; + shid->notif.base.fn = ssam_hid_event_fn; + shid->notif.event.reg = ssam_event_registry_reg; + shid->notif.event.id.target_category = sdev->uid.category; + shid->notif.event.id.instance = sdev->uid.instance; + shid->notif.event.mask = ssam_event_mask_strict; + shid->notif.event.flags = 0; + + shid->ops.get_descriptor = ssam_hid_get_descriptor; + shid->ops.output_report = shid_output_report; + shid->ops.get_feature_report = shid_get_feature_report; + shid->ops.set_feature_report = shid_set_feature_report; + + ssam_device_set_drvdata(sdev, shid); + return surface_hid_device_add(shid); +} + +static void surface_hid_remove(struct ssam_device *sdev) +{ + surface_hid_device_destroy(ssam_device_get_drvdata(sdev)); +} + +static const struct ssam_device_id surface_hid_match[] = { + { ssam_sdev(hid, 0x02, ssam_any_iid, 0x00) }, + { }, +}; +module_device_table(ssam, surface_hid_match); + +static struct ssam_device_driver surface_hid_driver = { + .probe = surface_hid_probe, + .remove = surface_hid_remove, + .match_table = surface_hid_match, + .driver = { + .name = "surface_hid", + .pm = &surface_hid_pm_ops, + .probe_type = probe_prefer_asynchronous, + }, +}; +module_ssam_device_driver(surface_hid_driver); + +module_author("blaz hrastnik <blaz@mxxn.io>"); +module_author("maximilian luz <luzmaximilian@gmail.com>"); +module_description("hid transport driver for surface system aggregator module"); +module_license("gpl"); diff --git a/drivers/hid/surface-hid/surface_hid_core.c b/drivers/hid/surface-hid/surface_hid_core.c --- /dev/null +++ b/drivers/hid/surface-hid/surface_hid_core.c +// spdx-license-identifier: gpl-2.0+ +/* + * common/core components for the surface system aggregator module (ssam) hid + * transport driver. provides support for integrated hid devices on microsoft + * surface models. + * + * copyright (c) 2019-2021 maximilian luz <luzmaximilian@gmail.com> + */ + +#include <asm/unaligned.h> +#include <linux/hid.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/types.h> +#include <linux/usb/ch9.h> + +#include <linux/surface_aggregator/controller.h> + +#include "surface_hid_core.h" + + +/* -- device descriptor access. --------------------------------------------- */ + +static int surface_hid_load_hid_descriptor(struct surface_hid_device *shid) +{ + int status; + + status = shid->ops.get_descriptor(shid, surface_hid_desc_hid, + (u8 *)&shid->hid_desc, sizeof(shid->hid_desc)); + if (status) + return status; + + if (shid->hid_desc.desc_len != sizeof(shid->hid_desc)) { + dev_err(shid->dev, "unexpected hid descriptor length: got %u, expected %zu ", + shid->hid_desc.desc_len, sizeof(shid->hid_desc)); + return -eproto; + } + + if (shid->hid_desc.desc_type != hid_dt_hid) { + dev_err(shid->dev, "unexpected hid descriptor type: got %#04x, expected %#04x ", + shid->hid_desc.desc_type, hid_dt_hid); + return -eproto; + } + + if (shid->hid_desc.num_descriptors != 1) { + dev_err(shid->dev, "unexpected number of descriptors: got %u, expected 1 ", + shid->hid_desc.num_descriptors); + return -eproto; + } + + if (shid->hid_desc.report_desc_type != hid_dt_report) { + dev_err(shid->dev, "unexpected report descriptor type: got %#04x, expected %#04x ", + shid->hid_desc.report_desc_type, hid_dt_report); + return -eproto; + } + + return 0; +} + +static int surface_hid_load_device_attributes(struct surface_hid_device *shid) +{ + int status; + + status = shid->ops.get_descriptor(shid, surface_hid_desc_attrs, + (u8 *)&shid->attrs, sizeof(shid->attrs)); + if (status) + return status; + + if (get_unaligned_le32(&shid->attrs.length) != sizeof(shid->attrs)) { + dev_err(shid->dev, "unexpected attribute length: got %u, expected %zu ", + get_unaligned_le32(&shid->attrs.length), sizeof(shid->attrs)); + return -eproto; + } + + return 0; +} + + +/* -- transport driver (common). -------------------------------------------- */ + +static int surface_hid_start(struct hid_device *hid) +{ + struct surface_hid_device *shid = hid->driver_data; + + return ssam_notifier_register(shid->ctrl, &shid->notif); +} + +static void surface_hid_stop(struct hid_device *hid) +{ + struct surface_hid_device *shid = hid->driver_data; + + /* note: this call will log errors for us, so ignore them here. */ + ssam_notifier_unregister(shid->ctrl, &shid->notif); +} + +static int surface_hid_open(struct hid_device *hid) +{ + return 0; +} + +static void surface_hid_close(struct hid_device *hid) +{ +} + +static int surface_hid_parse(struct hid_device *hid) +{ + struct surface_hid_device *shid = hid->driver_data; + size_t len = get_unaligned_le16(&shid->hid_desc.report_desc_len); + u8 *buf; + int status; + + buf = kzalloc(len, gfp_kernel); + if (!buf) + return -enomem; + + status = shid->ops.get_descriptor(shid, surface_hid_desc_report, buf, len); + if (!status) + status = hid_parse_report(hid, buf, len); + + kfree(buf); + return status; +} + +static int surface_hid_raw_request(struct hid_device *hid, unsigned char reportnum, u8 *buf, + size_t len, unsigned char rtype, int reqtype) +{ + struct surface_hid_device *shid = hid->driver_data; + + if (rtype == hid_output_report && reqtype == hid_req_set_report) + return shid->ops.output_report(shid, reportnum, buf, len); + + else if (rtype == hid_feature_report && reqtype == hid_req_get_report) + return shid->ops.get_feature_report(shid, reportnum, buf, len); + + else if (rtype == hid_feature_report && reqtype == hid_req_set_report) + return shid->ops.set_feature_report(shid, reportnum, buf, len); + + return -eio; +} + +static struct hid_ll_driver surface_hid_ll_driver = { + .start = surface_hid_start, + .stop = surface_hid_stop, + .open = surface_hid_open, + .close = surface_hid_close, + .parse = surface_hid_parse, + .raw_request = surface_hid_raw_request, +}; + + +/* -- common device setup. -------------------------------------------------- */ + +int surface_hid_device_add(struct surface_hid_device *shid) +{ + int status; + + status = surface_hid_load_hid_descriptor(shid); + if (status) + return status; + + status = surface_hid_load_device_attributes(shid); + if (status) + return status; + + shid->hid = hid_allocate_device(); + if (is_err(shid->hid)) + return ptr_err(shid->hid); + + shid->hid->dev.parent = shid->dev; + shid->hid->bus = bus_host; + shid->hid->vendor = cpu_to_le16(shid->attrs.vendor); + shid->hid->product = cpu_to_le16(shid->attrs.product); + shid->hid->version = cpu_to_le16(shid->hid_desc.hid_version); + shid->hid->country = shid->hid_desc.country_code; + + snprintf(shid->hid->name, sizeof(shid->hid->name), "microsoft surface %04x:%04x", + shid->hid->vendor, shid->hid->product); + + strscpy(shid->hid->phys, dev_name(shid->dev), sizeof(shid->hid->phys)); + + shid->hid->driver_data = shid; + shid->hid->ll_driver = &surface_hid_ll_driver; + + status = hid_add_device(shid->hid); + if (status) + hid_destroy_device(shid->hid); + + return status; +} +export_symbol_gpl(surface_hid_device_add); + +void surface_hid_device_destroy(struct surface_hid_device *shid) +{ + hid_destroy_device(shid->hid); +} +export_symbol_gpl(surface_hid_device_destroy); + + +/* -- pm ops. --------------------------------------------------------------- */ + +#ifdef config_pm_sleep + +static int surface_hid_suspend(struct device *dev) +{ + struct surface_hid_device *d = dev_get_drvdata(dev); + + if (d->hid->driver && d->hid->driver->suspend) + return d->hid->driver->suspend(d->hid, pmsg_suspend); + + return 0; +} + +static int surface_hid_resume(struct device *dev) +{ + struct surface_hid_device *d = dev_get_drvdata(dev); + + if (d->hid->driver && d->hid->driver->resume) + return d->hid->driver->resume(d->hid); + + return 0; +} + +static int surface_hid_freeze(struct device *dev) +{ + struct surface_hid_device *d = dev_get_drvdata(dev); + + if (d->hid->driver && d->hid->driver->suspend) + return d->hid->driver->suspend(d->hid, pmsg_freeze); + + return 0; +} + +static int surface_hid_poweroff(struct device *dev) +{ + struct surface_hid_device *d = dev_get_drvdata(dev); + + if (d->hid->driver && d->hid->driver->suspend) + return d->hid->driver->suspend(d->hid, pmsg_hibernate); + + return 0; +} + +static int surface_hid_restore(struct device *dev) +{ + struct surface_hid_device *d = dev_get_drvdata(dev); + + if (d->hid->driver && d->hid->driver->reset_resume) + return d->hid->driver->reset_resume(d->hid); + + return 0; +} + +const struct dev_pm_ops surface_hid_pm_ops = { + .freeze = surface_hid_freeze, + .thaw = surface_hid_resume, + .suspend = surface_hid_suspend, + .resume = surface_hid_resume, + .poweroff = surface_hid_poweroff, + .restore = surface_hid_restore, +}; +export_symbol_gpl(surface_hid_pm_ops); + +#else /* config_pm_sleep */ + +const struct dev_pm_ops surface_hid_pm_ops = { }; +export_symbol_gpl(surface_hid_pm_ops); + +#endif /* config_pm_sleep */ + +module_author("maximilian luz <luzmaximilian@gmail.com>"); +module_description("hid transport driver core for surface system aggregator module"); +module_license("gpl"); diff --git a/drivers/hid/surface-hid/surface_hid_core.h b/drivers/hid/surface-hid/surface_hid_core.h --- /dev/null +++ b/drivers/hid/surface-hid/surface_hid_core.h +/* spdx-license-identifier: gpl-2.0+ */ +/* + * common/core components for the surface system aggregator module (ssam) hid + * transport driver. provides support for integrated hid devices on microsoft + * surface models. + * + * copyright (c) 2019-2021 maximilian luz <luzmaximilian@gmail.com> + */ + +#ifndef surface_hid_core_h +#define surface_hid_core_h + +#include <linux/hid.h> +#include <linux/pm.h> +#include <linux/types.h> + +#include <linux/surface_aggregator/controller.h> +#include <linux/surface_aggregator/device.h> + +enum surface_hid_descriptor_entry { + surface_hid_desc_hid = 0, + surface_hid_desc_report = 1, + surface_hid_desc_attrs = 2, +}; + +struct surface_hid_descriptor { + __u8 desc_len; /* = 9 */ + __u8 desc_type; /* = hid_dt_hid */ + __le16 hid_version; + __u8 country_code; + __u8 num_descriptors; /* = 1 */ + + __u8 report_desc_type; /* = hid_dt_report */ + __le16 report_desc_len; +} __packed; + +static_assert(sizeof(struct surface_hid_descriptor) == 9); + +struct surface_hid_attributes { + __le32 length; + __le16 vendor; + __le16 product; + __le16 version; + __u8 _unknown[22]; +} __packed; + +static_assert(sizeof(struct surface_hid_attributes) == 32); + +struct surface_hid_device; + +struct surface_hid_device_ops { + int (*get_descriptor)(struct surface_hid_device *shid, u8 entry, u8 *buf, size_t len); + int (*output_report)(struct surface_hid_device *shid, u8 rprt_id, u8 *buf, size_t len); + int (*get_feature_report)(struct surface_hid_device *shid, u8 rprt_id, u8 *buf, size_t len); + int (*set_feature_report)(struct surface_hid_device *shid, u8 rprt_id, u8 *buf, size_t len); +}; + +struct surface_hid_device { + struct device *dev; + struct ssam_controller *ctrl; + struct ssam_device_uid uid; + + struct surface_hid_descriptor hid_desc; + struct surface_hid_attributes attrs; + + struct ssam_event_notifier notif; + struct hid_device *hid; + + struct surface_hid_device_ops ops; +}; + +int surface_hid_device_add(struct surface_hid_device *shid); +void surface_hid_device_destroy(struct surface_hid_device *shid); + +extern const struct dev_pm_ops surface_hid_pm_ops; + +#endif /* surface_hid_core_h */
|
Tablets, touch screens, keyboards, mouses
|
b05ff1002a5c19f2fd511c6eada6f475ff701841
|
maximilian luz
|
drivers
|
hid
|
surface-hid
|
hid: ft260: add usb hid to i2c host bridge driver
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the ftdi ft260 chip implements usb to i2c/uart bridges through two usb hid class interfaces. the first - for i2c, and the second for uart. each interface is independent, and the kernel detects it as a separate usb hidraw device.
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this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
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add usb hid to i2c host bridge driver
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['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
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['hid ', 'ft260']
|
['c', 'h', 'kconfig', 'maintainers', 'makefile']
| 5
| 1,073
| 0
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--- diff --git a/maintainers b/maintainers --- a/maintainers +++ b/maintainers +ft260 ftdi usb-hid to i2c bridge driver +m: michael zaidman <michael.zaidman@gmail.com> +l: linux-i2c@vger.kernel.org +l: linux-input@vger.kernel.org +s: maintained +f: drivers/hid/hid-ft260.c + diff --git a/drivers/hid/kconfig b/drivers/hid/kconfig --- a/drivers/hid/kconfig +++ b/drivers/hid/kconfig +config hid_ft260 + tristate "ftdi ft260 usb hid to i2c host support" + depends on usb_hid && hidraw && i2c + help + provides i2c host adapter functionality over usb-hid through ft260 + device. the customizable usb descriptor fields are exposed as sysfs + attributes. + + to compile this driver as a module, choose m here: the module + will be called hid-ft260. + diff --git a/drivers/hid/makefile b/drivers/hid/makefile --- a/drivers/hid/makefile +++ b/drivers/hid/makefile +obj-$(config_hid_ft260) += hid-ft260.o diff --git a/drivers/hid/hid-ft260.c b/drivers/hid/hid-ft260.c --- /dev/null +++ b/drivers/hid/hid-ft260.c +// spdx-license-identifier: gpl-2.0-only +/* + * hid-ft260.c - ftdi ft260 usb hid to i2c host bridge + * + * copyright (c) 2021, michael zaidman <michaelz@xsightlabs.com> + * + * data sheet: + * https://www.ftdichip.com/support/documents/datasheets/ics/ds_ft260.pdf + */ + +#include "hid-ids.h" +#include <linux/hidraw.h> +#include <linux/i2c.h> +#include <linux/module.h> +#include <linux/usb.h> + +#ifdef debug +static int ft260_debug = 1; +#else +static int ft260_debug; +#endif +module_param_named(debug, ft260_debug, int, 0600); +module_parm_desc(debug, "toggle ft260 debugging messages"); + +#define ft260_dbg(format, arg...) \ + do { \ + if (ft260_debug) \ + pr_info("%s: " format, __func__, ##arg); \ + } while (0) + +#define ft260_report_max_length (64) +#define ft260_i2c_data_report_id(len) (ft260_i2c_report_min + (len - 1) / 4) +/* + * the input report format assigns 62 bytes for the data payload, but ft260 + * returns 60 and 2 in two separate transactions. to minimize transfer time + * in reading chunks mode, set the maximum read payload length to 60 bytes. + */ +#define ft260_rd_data_max (60) +#define ft260_wr_data_max (60) + +/* + * device interface configuration. + * the ft260 has 2 interfaces that are controlled by dcnf0 and dcnf1 pins. + * first implementes usb hid to i2c bridge function and + * second - usb hid to uart bridge function. + */ +enum { + ft260_mode_all = 0x00, + ft260_mode_i2c = 0x01, + ft260_mode_uart = 0x02, + ft260_mode_both = 0x03, +}; + +/* control pipe */ +enum { + ft260_get_rqst_type = 0xa1, + ft260_get_report = 0x01, + ft260_set_rqst_type = 0x21, + ft260_set_report = 0x09, + ft260_feature = 0x03, +}; + +/* report ids / feature in */ +enum { + ft260_chip_version = 0xa0, + ft260_system_settings = 0xa1, + ft260_i2c_status = 0xc0, + ft260_i2c_read_req = 0xc2, + ft260_i2c_report_min = 0xd0, + ft260_i2c_report_max = 0xde, + ft260_gpio = 0xb0, + ft260_uart_interrupt_status = 0xb1, + ft260_uart_status = 0xe0, + ft260_uart_ri_dcd_status = 0xe1, + ft260_uart_report = 0xf0, +}; + +/* feature out */ +enum { + ft260_set_clock = 0x01, + ft260_set_i2c_mode = 0x02, + ft260_set_uart_mode = 0x03, + ft260_enable_interrupt = 0x05, + ft260_select_gpio2_func = 0x06, + ft260_enable_uart_dcd_ri = 0x07, + ft260_select_gpioa_func = 0x08, + ft260_select_gpiog_func = 0x09, + ft260_set_interrupt_trigger = 0x0a, + ft260_set_suspend_out_polar = 0x0b, + ft260_enable_uart_ri_wakeup = 0x0c, + ft260_set_uart_ri_wakeup_cfg = 0x0d, + ft260_set_i2c_reset = 0x20, + ft260_set_i2c_clock_speed = 0x22, + ft260_set_uart_reset = 0x40, + ft260_set_uart_config = 0x41, + ft260_set_uart_baud_rate = 0x42, + ft260_set_uart_data_bit = 0x43, + ft260_set_uart_parity = 0x44, + ft260_set_uart_stop_bit = 0x45, + ft260_set_uart_breaking = 0x46, + ft260_set_uart_xon_xoff = 0x49, +}; + +/* response codes in i2c status report */ +enum { + ft260_i2c_status_success = 0x00, + ft260_i2c_status_ctrl_busy = 0x01, + ft260_i2c_status_error = 0x02, + ft260_i2c_status_addr_no_ack = 0x04, + ft260_i2c_status_data_no_ack = 0x08, + ft260_i2c_status_arbitr_lost = 0x10, + ft260_i2c_status_ctrl_idle = 0x20, + ft260_i2c_status_bus_busy = 0x40, +}; + +/* i2c conditions flags */ +enum { + ft260_flag_none = 0x00, + ft260_flag_start = 0x02, + ft260_flag_start_repeated = 0x03, + ft260_flag_stop = 0x04, + ft260_flag_start_stop = 0x06, + ft260_flag_start_stop_repeated = 0x07, +}; + +#define ft260_set_request_value(report_id) ((ft260_feature << 8) | report_id) + +/* feature in reports */ + +struct ft260_get_chip_version_report { + u8 report; /* ft260_chip_version */ + u8 chip_code[4]; /* ftdi chip identification code */ + u8 reserved[8]; +} __packed; + +struct ft260_get_system_status_report { + u8 report; /* ft260_system_settings */ + u8 chip_mode; /* dcnf0 and dcnf1 status, bits 0-1 */ + u8 clock_ctl; /* 0 - 12mhz, 1 - 24mhz, 2 - 48mhz */ + u8 suspend_status; /* 0 - not suspended, 1 - suspended */ + u8 pwren_status; /* 0 - ft260 is not ready, 1 - ready */ + u8 i2c_enable; /* 0 - disabled, 1 - enabled */ + u8 uart_mode; /* 0 - off; 1 - rts_cts, 2 - dtr_dsr, */ + /* 3 - xon_xoff, 4 - no flow control */ + u8 hid_over_i2c_en; /* 0 - disabled, 1 - enabled */ + u8 gpio2_function; /* 0 - gpio, 1 - suspout, */ + /* 2 - pwren, 4 - tx_led */ + u8 gpioa_function; /* 0 - gpio, 3 - tx_active, 4 - tx_led */ + u8 gpiog_function; /* 0 - gpio, 2 - pwren, */ + /* 5 - rx_led, 6 - bcd_det */ + u8 suspend_out_pol; /* 0 - active-high, 1 - active-low */ + u8 enable_wakeup_int; /* 0 - disabled, 1 - enabled */ + u8 intr_cond; /* interrupt trigger conditions */ + u8 power_saving_en; /* 0 - disabled, 1 - enabled */ + u8 reserved[10]; +} __packed; + +struct ft260_get_i2c_status_report { + u8 report; /* ft260_i2c_status */ + u8 bus_status; /* i2c bus status */ + __le16 clock; /* i2c bus clock in range 60-3400 khz */ + u8 reserved; +} __packed; + +/* feature out reports */ + +struct ft260_set_system_clock_report { + u8 report; /* ft260_system_settings */ + u8 request; /* ft260_set_clock */ + u8 clock_ctl; /* 0 - 12mhz, 1 - 24mhz, 2 - 48mhz */ +} __packed; + +struct ft260_set_i2c_mode_report { + u8 report; /* ft260_system_settings */ + u8 request; /* ft260_set_i2c_mode */ + u8 i2c_enable; /* 0 - disabled, 1 - enabled */ +} __packed; + +struct ft260_set_uart_mode_report { + u8 report; /* ft260_system_settings */ + u8 request; /* ft260_set_uart_mode */ + u8 uart_mode; /* 0 - off; 1 - rts_cts, 2 - dtr_dsr, */ + /* 3 - xon_xoff, 4 - no flow control */ +} __packed; + +struct ft260_set_i2c_reset_report { + u8 report; /* ft260_system_settings */ + u8 request; /* ft260_set_i2c_reset */ +} __packed; + +struct ft260_set_i2c_speed_report { + u8 report; /* ft260_system_settings */ + u8 request; /* ft260_set_i2c_clock_speed */ + __le16 clock; /* i2c bus clock in range 60-3400 khz */ +} __packed; + +/* data transfer reports */ + +struct ft260_i2c_write_request_report { + u8 report; /* ft260_i2c_report */ + u8 address; /* 7-bit i2c address */ + u8 flag; /* i2c transaction condition */ + u8 length; /* data payload length */ + u8 data[60]; /* data payload */ +} __packed; + +struct ft260_i2c_read_request_report { + u8 report; /* ft260_i2c_read_req */ + u8 address; /* 7-bit i2c address */ + u8 flag; /* i2c transaction condition */ + __le16 length; /* data payload length */ +} __packed; + +struct ft260_i2c_input_report { + u8 report; /* ft260_i2c_report */ + u8 length; /* data payload length */ + u8 data[2]; /* data payload */ +} __packed; + +static const struct hid_device_id ft260_devices[] = { + { hid_usb_device(usb_vendor_id_future_technology, + usb_device_id_ft260) }, + { /* end of list */ } +}; +module_device_table(hid, ft260_devices); + +struct ft260_device { + struct i2c_adapter adap; + struct hid_device *hdev; + struct completion wait; + struct mutex lock; + u8 write_buf[ft260_report_max_length]; + u8 *read_buf; + u16 read_idx; + u16 read_len; + u16 clock; +}; + +static int ft260_hid_feature_report_get(struct hid_device *hdev, + unsigned char report_id, u8 *data, + size_t len) +{ + u8 *buf; + int ret; + + buf = kmalloc(len, gfp_kernel); + if (!buf) + return -enomem; + + ret = hid_hw_raw_request(hdev, report_id, buf, len, hid_feature_report, + hid_req_get_report); + memcpy(data, buf, len); + kfree(buf); + return ret; +} + +static int ft260_hid_feature_report_set(struct hid_device *hdev, u8 *data, + size_t len) +{ + u8 *buf; + int ret; + + buf = kmemdup(data, len, gfp_kernel); + if (!buf) + return -enomem; + + buf[0] = ft260_system_settings; + + ret = hid_hw_raw_request(hdev, buf[0], buf, len, hid_feature_report, + hid_req_set_report); + + kfree(buf); + return ret; +} + +static int ft260_i2c_reset(struct hid_device *hdev) +{ + struct ft260_set_i2c_reset_report report; + int ret; + + report.request = ft260_set_i2c_reset; + + ret = ft260_hid_feature_report_set(hdev, (u8 *)&report, sizeof(report)); + if (ret < 0) { + hid_err(hdev, "failed to reset i2c controller: %d ", ret); + return ret; + } + + ft260_dbg("done "); + return ret; +} + +static int ft260_xfer_status(struct ft260_device *dev) +{ + struct hid_device *hdev = dev->hdev; + struct ft260_get_i2c_status_report report; + int ret; + + ret = ft260_hid_feature_report_get(hdev, ft260_i2c_status, + (u8 *)&report, sizeof(report)); + if (ret < 0) { + hid_err(hdev, "failed to retrieve status: %d ", ret); + return ret; + } + + dev->clock = le16_to_cpu(report.clock); + ft260_dbg("bus_status %#02x, clock %u ", report.bus_status, + dev->clock); + + if (report.bus_status & ft260_i2c_status_ctrl_busy) + return -eagain; + + if (report.bus_status & ft260_i2c_status_bus_busy) + return -ebusy; + + if (report.bus_status & ft260_i2c_status_error) + return -eio; + + ret = -eio; + + if (report.bus_status & ft260_i2c_status_addr_no_ack) + ft260_dbg("unacknowledged address "); + + if (report.bus_status & ft260_i2c_status_data_no_ack) + ft260_dbg("unacknowledged data "); + + if (report.bus_status & ft260_i2c_status_arbitr_lost) + ft260_dbg("arbitration loss "); + + if (report.bus_status & ft260_i2c_status_ctrl_idle) + ret = 0; + + return ret; +} + +static int ft260_hid_output_report(struct hid_device *hdev, u8 *data, + size_t len) +{ + u8 *buf; + int ret; + + buf = kmemdup(data, len, gfp_kernel); + if (!buf) + return -enomem; + + ret = hid_hw_output_report(hdev, buf, len); + + kfree(buf); + return ret; +} + +static int ft260_hid_output_report_check_status(struct ft260_device *dev, + u8 *data, int len) +{ + int ret, usec, try = 3; + struct hid_device *hdev = dev->hdev; + + ret = ft260_hid_output_report(hdev, data, len); + if (ret < 0) { + hid_err(hdev, "%s: failed to start transfer, ret %d ", + __func__, ret); + ft260_i2c_reset(hdev); + return ret; + } + + /* transfer time = 1 / clock(khz) * 10 bits * bytes */ + usec = 10000 / dev->clock * len; + usleep_range(usec, usec + 100); + ft260_dbg("wait %d usec, len %d ", usec, len); + do { + ret = ft260_xfer_status(dev); + if (ret != -eagain) + break; + } while (--try); + + if (ret == 0 || ret == -ebusy) + return 0; + + ft260_i2c_reset(hdev); + return -eio; +} + +static int ft260_i2c_write(struct ft260_device *dev, u8 addr, u8 *data, + int data_len, u8 flag) +{ + int len, ret, idx = 0; + struct hid_device *hdev = dev->hdev; + struct ft260_i2c_write_request_report *rep = + (struct ft260_i2c_write_request_report *)dev->write_buf; + + do { + if (data_len <= ft260_wr_data_max) + len = data_len; + else + len = ft260_wr_data_max; + + rep->report = ft260_i2c_data_report_id(len); + rep->address = addr; + rep->length = len; + rep->flag = flag; + + memcpy(rep->data, &data[idx], len); + + ft260_dbg("rep %#02x addr %#02x off %d len %d d[0] %#02x ", + rep->report, addr, idx, len, data[0]); + + ret = ft260_hid_output_report_check_status(dev, (u8 *)rep, + len + 4); + if (ret < 0) { + hid_err(hdev, "%s: failed to start transfer, ret %d ", + __func__, ret); + return ret; + } + + data_len -= len; + idx += len; + + } while (data_len > 0); + + return 0; +} + +static int ft260_smbus_write(struct ft260_device *dev, u8 addr, u8 cmd, + u8 *data, u8 data_len, u8 flag) +{ + int ret = 0; + int len = 4; + + struct ft260_i2c_write_request_report *rep = + (struct ft260_i2c_write_request_report *)dev->write_buf; + + rep->address = addr; + rep->data[0] = cmd; + rep->length = data_len + 1; + rep->flag = flag; + len += rep->length; + + rep->report = ft260_i2c_data_report_id(len); + + if (data_len > 0) + memcpy(&rep->data[1], data, data_len); + + ft260_dbg("rep %#02x addr %#02x cmd %#02x datlen %d replen %d ", + rep->report, addr, cmd, rep->length, len); + + ret = ft260_hid_output_report_check_status(dev, (u8 *)rep, len); + + return ret; +} + +static int ft260_i2c_read(struct ft260_device *dev, u8 addr, u8 *data, + u16 len, u8 flag) +{ + struct ft260_i2c_read_request_report rep; + struct hid_device *hdev = dev->hdev; + int timeout; + int ret; + + if (len > ft260_rd_data_max) { + hid_err(hdev, "%s: unsupported rd len: %d ", __func__, len); + return -einval; + } + + dev->read_idx = 0; + dev->read_buf = data; + dev->read_len = len; + + rep.report = ft260_i2c_read_req; + rep.length = cpu_to_le16(len); + rep.address = addr; + rep.flag = flag; + + ft260_dbg("rep %#02x addr %#02x len %d ", rep.report, rep.address, + rep.length); + + reinit_completion(&dev->wait); + + ret = ft260_hid_output_report(hdev, (u8 *)&rep, sizeof(rep)); + if (ret < 0) { + hid_err(hdev, "%s: failed to start transaction, ret %d ", + __func__, ret); + return ret; + } + + timeout = msecs_to_jiffies(5000); + if (!wait_for_completion_timeout(&dev->wait, timeout)) { + ft260_i2c_reset(hdev); + return -etimedout; + } + + ret = ft260_xfer_status(dev); + if (ret == 0) + return 0; + + ft260_i2c_reset(hdev); + return -eio; +} + +/* + * a random read operation is implemented as a dummy write operation, followed + * by a current address read operation. the dummy write operation is used to + * load the target byte address into the current byte address counter, from + * which the subsequent current address read operation then reads. + */ +static int ft260_i2c_write_read(struct ft260_device *dev, struct i2c_msg *msgs) +{ + int len, ret; + u16 left_len = msgs[1].len; + u8 *read_buf = msgs[1].buf; + u8 addr = msgs[0].addr; + u16 read_off = 0; + struct hid_device *hdev = dev->hdev; + + if (msgs[0].len > 2) { + hid_err(hdev, "%s: unsupported wr len: %d ", __func__, len); + return -eopnotsupp; + } + + memcpy(&read_off, msgs[0].buf, msgs[0].len); + + do { + if (left_len <= ft260_rd_data_max) + len = left_len; + else + len = ft260_rd_data_max; + + ft260_dbg("read_off %#x left_len %d len %d ", read_off, + left_len, len); + + ret = ft260_i2c_write(dev, addr, (u8 *)&read_off, msgs[0].len, + ft260_flag_start); + if (ret < 0) + return ret; + + ret = ft260_i2c_read(dev, addr, read_buf, len, + ft260_flag_start_stop); + if (ret < 0) + return ret; + + left_len -= len; + read_buf += len; + read_off += len; + + } while (left_len > 0); + + return 0; +} + +static int ft260_i2c_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, + int num) +{ + int ret; + struct ft260_device *dev = i2c_get_adapdata(adapter); + struct hid_device *hdev = dev->hdev; + + mutex_lock(&dev->lock); + + ret = hid_hw_power(hdev, pm_hint_fullon); + if (ret < 0) { + hid_err(hdev, "failed to enter fullon power mode: %d ", ret); + mutex_unlock(&dev->lock); + return ret; + } + + if (num == 1) { + if (msgs->flags & i2c_m_rd) + ret = ft260_i2c_read(dev, msgs->addr, msgs->buf, + msgs->len, ft260_flag_start_stop); + else + ret = ft260_i2c_write(dev, msgs->addr, msgs->buf, + msgs->len, ft260_flag_start_stop); + if (ret < 0) + goto i2c_exit; + + } else { + /* combined write then read message */ + ret = ft260_i2c_write_read(dev, msgs); + if (ret < 0) + goto i2c_exit; + } + + ret = num; +i2c_exit: + hid_hw_power(hdev, pm_hint_normal); + mutex_unlock(&dev->lock); + return ret; +} + +static int ft260_smbus_xfer(struct i2c_adapter *adapter, u16 addr, u16 flags, + char read_write, u8 cmd, int size, + union i2c_smbus_data *data) +{ + int ret; + struct ft260_device *dev = i2c_get_adapdata(adapter); + struct hid_device *hdev = dev->hdev; + + ft260_dbg("smbus size %d ", size); + + mutex_lock(&dev->lock); + + ret = hid_hw_power(hdev, pm_hint_fullon); + if (ret < 0) { + hid_err(hdev, "power management error: %d ", ret); + mutex_unlock(&dev->lock); + return ret; + } + + switch (size) { + case i2c_smbus_quick: + if (read_write == i2c_smbus_read) + ret = ft260_i2c_read(dev, addr, &data->byte, 0, + ft260_flag_start_stop); + else + ret = ft260_smbus_write(dev, addr, cmd, null, 0, + ft260_flag_start_stop); + break; + case i2c_smbus_byte: + if (read_write == i2c_smbus_read) + ret = ft260_i2c_read(dev, addr, &data->byte, 1, + ft260_flag_start_stop); + else + ret = ft260_smbus_write(dev, addr, cmd, null, 0, + ft260_flag_start_stop); + break; + case i2c_smbus_byte_data: + if (read_write == i2c_smbus_read) { + ret = ft260_smbus_write(dev, addr, cmd, null, 0, + ft260_flag_start); + if (ret) + goto smbus_exit; + + ret = ft260_i2c_read(dev, addr, &data->byte, 1, + ft260_flag_start_stop_repeated); + } else { + ret = ft260_smbus_write(dev, addr, cmd, &data->byte, 1, + ft260_flag_start_stop); + } + break; + case i2c_smbus_word_data: + if (read_write == i2c_smbus_read) { + ret = ft260_smbus_write(dev, addr, cmd, null, 0, + ft260_flag_start); + if (ret) + goto smbus_exit; + + ret = ft260_i2c_read(dev, addr, (u8 *)&data->word, 2, + ft260_flag_start_stop_repeated); + } else { + ret = ft260_smbus_write(dev, addr, cmd, + (u8 *)&data->word, 2, + ft260_flag_start_stop); + } + break; + case i2c_smbus_block_data: + if (read_write == i2c_smbus_read) { + ret = ft260_smbus_write(dev, addr, cmd, null, 0, + ft260_flag_start); + if (ret) + goto smbus_exit; + + ret = ft260_i2c_read(dev, addr, data->block, + data->block[0] + 1, + ft260_flag_start_stop_repeated); + } else { + ret = ft260_smbus_write(dev, addr, cmd, data->block, + data->block[0] + 1, + ft260_flag_start_stop); + } + break; + case i2c_smbus_i2c_block_data: + if (read_write == i2c_smbus_read) { + ret = ft260_smbus_write(dev, addr, cmd, null, 0, + ft260_flag_start); + if (ret) + goto smbus_exit; + + ret = ft260_i2c_read(dev, addr, data->block + 1, + data->block[0], + ft260_flag_start_stop_repeated); + } else { + ret = ft260_smbus_write(dev, addr, cmd, data->block + 1, + data->block[0], + ft260_flag_start_stop); + } + break; + default: + hid_err(hdev, "unsupported smbus transaction size %d ", size); + ret = -eopnotsupp; + } + +smbus_exit: + hid_hw_power(hdev, pm_hint_normal); + mutex_unlock(&dev->lock); + return ret; +} + +static u32 ft260_functionality(struct i2c_adapter *adap) +{ + return i2c_func_i2c | i2c_func_smbus_byte | i2c_func_smbus_quick | + i2c_func_smbus_byte_data | i2c_func_smbus_word_data | + i2c_func_smbus_block_data | i2c_func_smbus_i2c_block; +} + +static const struct i2c_adapter_quirks ft260_i2c_quirks = { + .flags = i2c_aq_comb_write_then_read, + .max_comb_1st_msg_len = 2, +}; + +static const struct i2c_algorithm ft260_i2c_algo = { + .master_xfer = ft260_i2c_xfer, + .smbus_xfer = ft260_smbus_xfer, + .functionality = ft260_functionality, +}; + +static int ft260_get_system_config(struct hid_device *hdev, + struct ft260_get_system_status_report *cfg) +{ + int ret; + int len = sizeof(struct ft260_get_system_status_report); + + ret = ft260_hid_feature_report_get(hdev, ft260_system_settings, + (u8 *)cfg, len); + if (ret != len) { + hid_err(hdev, "failed to retrieve system status "); + if (ret >= 0) + return -eio; + } + return 0; +} + +static int ft260_is_interface_enabled(struct hid_device *hdev) +{ + struct ft260_get_system_status_report cfg; + struct usb_interface *usbif = to_usb_interface(hdev->dev.parent); + int interface = usbif->cur_altsetting->desc.binterfacenumber; + int ret; + + ret = ft260_get_system_config(hdev, &cfg); + if (ret) + return ret; + + ft260_dbg("interface: 0x%02x ", interface); + ft260_dbg("chip mode: 0x%02x ", cfg.chip_mode); + ft260_dbg("clock_ctl: 0x%02x ", cfg.clock_ctl); + ft260_dbg("i2c_enable: 0x%02x ", cfg.i2c_enable); + ft260_dbg("uart_mode: 0x%02x ", cfg.uart_mode); + + switch (cfg.chip_mode) { + case ft260_mode_all: + case ft260_mode_both: + if (interface == 1) { + hid_info(hdev, "uart interface is not supported "); + return 0; + } + ret = 1; + break; + case ft260_mode_uart: + if (interface == 0) { + hid_info(hdev, "uart is unsupported on interface 0 "); + ret = 0; + } + break; + case ft260_mode_i2c: + if (interface == 1) { + hid_info(hdev, "i2c is unsupported on interface 1 "); + ret = 0; + } + break; + } + return ret; +} + +static int ft260_byte_show(struct hid_device *hdev, int id, u8 *cfg, int len, + u8 *field, u8 *buf) +{ + int ret; + + ret = ft260_hid_feature_report_get(hdev, id, cfg, len); + if (ret != len && ret >= 0) + return -eio; + + return scnprintf(buf, page_size, "%hi ", *field); +} + +static int ft260_word_show(struct hid_device *hdev, int id, u8 *cfg, int len, + u16 *field, u8 *buf) +{ + int ret; + + ret = ft260_hid_feature_report_get(hdev, id, cfg, len); + if (ret != len && ret >= 0) + return -eio; + + return scnprintf(buf, page_size, "%hi ", le16_to_cpu(*field)); +} + +#define ft260_attr_show(name, reptype, id, type, func) \ + static ssize_t name##_show(struct device *kdev, \ + struct device_attribute *attr, char *buf) \ + { \ + struct reptype rep; \ + struct hid_device *hdev = to_hid_device(kdev); \ + type *field = &rep.name; \ + int len = sizeof(rep); \ + \ + return func(hdev, id, (u8 *)&rep, len, field, buf); \ + } + +#define ft260_sstat_attr_show(name) \ + ft260_attr_show(name, ft260_get_system_status_report, \ + ft260_system_settings, u8, ft260_byte_show) + +#define ft260_i2cst_attr_show(name) \ + ft260_attr_show(name, ft260_get_i2c_status_report, \ + ft260_i2c_status, u16, ft260_word_show) + +#define ft260_attr_store(name, reptype, id, req, type, func) \ + static ssize_t name##_store(struct device *kdev, \ + struct device_attribute *attr, \ + const char *buf, size_t count) \ + { \ + struct reptype rep; \ + struct hid_device *hdev = to_hid_device(kdev); \ + type name; \ + int ret; \ + \ + if (!func(buf, 10, &name)) { \ + rep.name = name; \ + rep.report = id; \ + rep.request = req; \ + ret = ft260_hid_feature_report_set(hdev, (u8 *)&rep, \ + sizeof(rep)); \ + if (!ret) \ + ret = count; \ + } else { \ + ret = -einval; \ + } \ + return ret; \ + } + +#define ft260_byte_attr_store(name, reptype, req) \ + ft260_attr_store(name, reptype, ft260_system_settings, req, \ + u8, kstrtou8) + +#define ft260_word_attr_store(name, reptype, req) \ + ft260_attr_store(name, reptype, ft260_system_settings, req, \ + u16, kstrtou16) + +ft260_sstat_attr_show(chip_mode); +static device_attr_ro(chip_mode); + +ft260_sstat_attr_show(pwren_status); +static device_attr_ro(pwren_status); + +ft260_sstat_attr_show(suspend_status); +static device_attr_ro(suspend_status); + +ft260_sstat_attr_show(hid_over_i2c_en); +static device_attr_ro(hid_over_i2c_en); + +ft260_sstat_attr_show(power_saving_en); +static device_attr_ro(power_saving_en); + +ft260_sstat_attr_show(i2c_enable); +ft260_byte_attr_store(i2c_enable, ft260_set_i2c_mode_report, + ft260_set_i2c_mode); +static device_attr_rw(i2c_enable); + +ft260_sstat_attr_show(uart_mode); +ft260_byte_attr_store(uart_mode, ft260_set_uart_mode_report, + ft260_set_uart_mode); +static device_attr_rw(uart_mode); + +ft260_sstat_attr_show(clock_ctl); +ft260_byte_attr_store(clock_ctl, ft260_set_system_clock_report, + ft260_set_clock); +static device_attr_rw(clock_ctl); + +ft260_i2cst_attr_show(clock); +ft260_word_attr_store(clock, ft260_set_i2c_speed_report, + ft260_set_i2c_clock_speed); +static device_attr_rw(clock); + +static ssize_t i2c_reset_store(struct device *kdev, + struct device_attribute *attr, const char *buf, + size_t count) +{ + struct hid_device *hdev = to_hid_device(kdev); + int ret = ft260_i2c_reset(hdev); + + if (ret) + return ret; + return count; +} +static device_attr_wo(i2c_reset); + +static const struct attribute_group ft260_attr_group = { + .attrs = (struct attribute *[]) { + &dev_attr_chip_mode.attr, + &dev_attr_pwren_status.attr, + &dev_attr_suspend_status.attr, + &dev_attr_hid_over_i2c_en.attr, + &dev_attr_power_saving_en.attr, + &dev_attr_i2c_enable.attr, + &dev_attr_uart_mode.attr, + &dev_attr_clock_ctl.attr, + &dev_attr_i2c_reset.attr, + &dev_attr_clock.attr, + null + } +}; + +static int ft260_probe(struct hid_device *hdev, const struct hid_device_id *id) +{ + struct ft260_device *dev; + struct ft260_get_chip_version_report version; + int ret; + + dev = devm_kzalloc(&hdev->dev, sizeof(*dev), gfp_kernel); + if (!dev) + return -enomem; + + ret = hid_parse(hdev); + if (ret) { + hid_err(hdev, "failed to parse hid "); + return ret; + } + + ret = hid_hw_start(hdev, hid_connect_hidraw); + if (ret) { + hid_err(hdev, "failed to start hid hw "); + return ret; + } + + ret = hid_hw_open(hdev); + if (ret) { + hid_err(hdev, "failed to open hid hw "); + goto err_hid_stop; + } + + ret = ft260_hid_feature_report_get(hdev, ft260_chip_version, + (u8 *)&version, sizeof(version)); + if (ret != sizeof(version)) { + hid_err(hdev, "failed to retrieve chip version "); + if (ret >= 0) + ret = -eio; + goto err_hid_close; + } + + hid_info(hdev, "chip code: %02x%02x %02x%02x ", + version.chip_code[0], version.chip_code[1], + version.chip_code[2], version.chip_code[3]); + + ret = ft260_is_interface_enabled(hdev); + if (ret <= 0) + goto err_hid_close; + + hid_set_drvdata(hdev, dev); + dev->hdev = hdev; + dev->adap.owner = this_module; + dev->adap.class = i2c_class_hwmon; + dev->adap.algo = &ft260_i2c_algo; + dev->adap.quirks = &ft260_i2c_quirks; + dev->adap.dev.parent = &hdev->dev; + snprintf(dev->adap.name, sizeof(dev->adap.name), + "ft260 usb-i2c bridge on hidraw%d", + ((struct hidraw *)hdev->hidraw)->minor); + + mutex_init(&dev->lock); + init_completion(&dev->wait); + + ret = i2c_add_adapter(&dev->adap); + if (ret) { + hid_err(hdev, "failed to add i2c adapter "); + goto err_hid_close; + } + + i2c_set_adapdata(&dev->adap, dev); + + ret = sysfs_create_group(&hdev->dev.kobj, &ft260_attr_group); + if (ret < 0) { + hid_err(hdev, "failed to create sysfs attrs "); + goto err_i2c_free; + } + + ret = ft260_xfer_status(dev); + if (ret) + ft260_i2c_reset(hdev); + + return 0; + +err_i2c_free: + i2c_del_adapter(&dev->adap); +err_hid_close: + hid_hw_close(hdev); +err_hid_stop: + hid_hw_stop(hdev); + return ret; +} + +static void ft260_remove(struct hid_device *hdev) +{ + int ret; + struct ft260_device *dev = hid_get_drvdata(hdev); + + ret = ft260_is_interface_enabled(hdev); + if (ret <= 0) + return; + + sysfs_remove_group(&hdev->dev.kobj, &ft260_attr_group); + i2c_del_adapter(&dev->adap); + + hid_hw_close(hdev); + hid_hw_stop(hdev); +} + +static int ft260_raw_event(struct hid_device *hdev, struct hid_report *report, + u8 *data, int size) +{ + struct ft260_device *dev = hid_get_drvdata(hdev); + struct ft260_i2c_input_report *xfer = (void *)data; + + if (xfer->report >= ft260_i2c_report_min && + xfer->report <= ft260_i2c_report_max) { + ft260_dbg("i2c resp: rep %#02x len %d ", xfer->report, + xfer->length); + + memcpy(&dev->read_buf[dev->read_idx], &xfer->data, + xfer->length); + dev->read_idx += xfer->length; + + if (dev->read_idx == dev->read_len) + complete(&dev->wait); + + } else { + hid_err(hdev, "unknown report: %#02x ", xfer->report); + return 0; + } + return 1; +} + +static struct hid_driver ft260_driver = { + .name = "ft260", + .id_table = ft260_devices, + .probe = ft260_probe, + .remove = ft260_remove, + .raw_event = ft260_raw_event, +}; + +module_hid_driver(ft260_driver); +module_description("ftdi ft260 usb hid to i2c host bridge"); +module_author("michael zaidman <michael.zaidman@gmail.com>"); +module_license("gpl v2"); diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h --- a/drivers/hid/hid-ids.h +++ b/drivers/hid/hid-ids.h +#define usb_device_id_ft260 0x6030
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Tablets, touch screens, keyboards, mouses
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6a82582d9fa438045191074856f47165334f2777
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michael zaidman
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drivers
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hid
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hid: input: map battery capacity (00850065)
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this is the capacity in percentage, relative to design capacity. specifically, it is present in apple magic mouse 2.
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this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
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map battery capacity (00850065)
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['hid ']
|
['h', 'c']
| 3
| 20
| 6
|
--- diff --git a/drivers/hid/hid-debug.c b/drivers/hid/hid-debug.c --- a/drivers/hid/hid-debug.c +++ b/drivers/hid/hid-debug.c + { 0x85, 0x65, "absolutestateofcharge" }, diff --git a/drivers/hid/hid-input.c b/drivers/hid/hid-input.c --- a/drivers/hid/hid-input.c +++ b/drivers/hid/hid-input.c -static int hidinput_setup_battery(struct hid_device *dev, unsigned report_type, struct hid_field *field) +static int hidinput_setup_battery(struct hid_device *dev, unsigned report_type, + struct hid_field *field, bool is_percentage) - if (quirks & hid_battery_quirk_percent) { + if (is_percentage || (quirks & hid_battery_quirk_percent)) { - struct hid_field *field) + struct hid_field *field, bool is_percentage) - hidinput_setup_battery(device, hid_input_report, field); + hidinput_setup_battery(device, hid_input_report, field, false); - hidinput_setup_battery(device, hid_input_report, field); + hidinput_setup_battery(device, hid_input_report, field, false); + usage->type = ev_pwr; + return; + } + goto unknown; + + case hid_up_battery: + switch (usage->hid) { + case hid_bat_absolutestateofcharge: + hidinput_setup_battery(device, hid_input_report, field, true); - rep->field[i]); + rep->field[i], false); diff --git a/include/linux/hid.h b/include/linux/hid.h --- a/include/linux/hid.h +++ b/include/linux/hid.h +#define hid_up_battery 0x00850000 +#define hid_bat_absolutestateofcharge 0x00850065 +
|
Tablets, touch screens, keyboards, mouses
|
9de07a4e8d4cb269f9876b2ffa282b5ffd09e05b
|
john chen
|
drivers
|
hid
| |
hid: intel-ish-hid: ipc: add alder lake device ids
|
add alder lake pci device ids to the supported device list.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add alder lake device ids
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['hid ', 'intel-ish-hid', 'ipc']
|
['h', 'c']
| 2
| 4
| 0
|
--- diff --git a/drivers/hid/intel-ish-hid/ipc/hw-ish.h b/drivers/hid/intel-ish-hid/ipc/hw-ish.h --- a/drivers/hid/intel-ish-hid/ipc/hw-ish.h +++ b/drivers/hid/intel-ish-hid/ipc/hw-ish.h +#define adl_s_device_id 0x7af8 +#define adl_p_device_id 0x51fc diff --git a/drivers/hid/intel-ish-hid/ipc/pci-ish.c b/drivers/hid/intel-ish-hid/ipc/pci-ish.c --- a/drivers/hid/intel-ish-hid/ipc/pci-ish.c +++ b/drivers/hid/intel-ish-hid/ipc/pci-ish.c + {pci_device(pci_vendor_id_intel, adl_s_device_id)}, + {pci_device(pci_vendor_id_intel, adl_p_device_id)},
|
Tablets, touch screens, keyboards, mouses
|
22db5e0003e1441cd829180cebb42f7a6b7a46b7
|
ye xiang
|
drivers
|
hid
|
intel-ish-hid, ipc
|
hid: lenovo: add support for thinkpad x1 tablet thin keyboard
|
the thinkpad x1 tablet thin keyboard's hid interface for the media-keys and other special functions, is quite similar to the thinkpad 10 ultrabook keyboard's mouse/media-keys hid interface.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add support for thinkpad x1 tablet thin keyboard
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['hid ', 'lenovo']
|
['c']
| 1
| 61
| 0
|
--- diff --git a/drivers/hid/hid-lenovo.c b/drivers/hid/hid-lenovo.c --- a/drivers/hid/hid-lenovo.c +++ b/drivers/hid/hid-lenovo.c +static int lenovo_input_mapping_x1_tab_kbd(struct hid_device *hdev, + struct hid_input *hi, struct hid_field *field, + struct hid_usage *usage, unsigned long **bit, int *max) +{ + /* + * the thinkpad x1 tablet thin keyboard uses 0x000c0001 usage for + * a bunch of keys which have no standard consumer page code. + */ + if (usage->hid == 0x000c0001) { + switch (usage->usage_index) { + case 0: /* fn-f10: enable/disable bluetooth */ + map_key_clear(key_bluetooth); + return 1; + case 1: /* fn-f11: keyboard settings */ + map_key_clear(key_keyboard); + return 1; + case 2: /* fn-f12: user function / cortana */ + map_key_clear(key_macro1); + return 1; + case 3: /* fn-prtsc: snipping tool */ + map_key_clear(key_selective_screenshot); + return 1; + case 8: /* fn-esc: fn-lock toggle */ + map_key_clear(key_fn_esc); + return 1; + case 9: /* fn-f4: mute/unmute microphone */ + map_key_clear(key_micmute); + return 1; + case 10: /* fn-f9: settings */ + map_key_clear(key_config); + return 1; + case 13: /* fn-f7: manage external displays */ + map_key_clear(key_switchvideomode); + return 1; + case 14: /* fn-f8: enable/disable wifi */ + map_key_clear(key_wlan); + return 1; + } + } + + if (usage->hid == (hid_up_keyboard | 0x009a)) { + map_key_clear(key_sysrq); + return 1; + } + + return 0; +} + + case usb_device_id_lenovo_x1_tab: + return lenovo_input_mapping_x1_tab_kbd(hdev, hi, field, usage, bit, max); + case usb_device_id_lenovo_x1_tab: + case usb_device_id_lenovo_x1_tab: + case usb_device_id_lenovo_x1_tab: + case usb_device_id_lenovo_x1_tab: + case usb_device_id_lenovo_x1_tab: + /* + * note bind to the hid_group_generic group, so that we only bind to the keyboard + * part, while letting hid-multitouch.c handle the touchpad and trackpoint. + */ + { hid_device(bus_usb, hid_group_generic, + usb_vendor_id_lenovo, usb_device_id_lenovo_x1_tab) },
|
Tablets, touch screens, keyboards, mouses
|
c158c2afc99f9d1086f6d53b9c6c9813fcac1a10
|
hans de goede
|
drivers
|
hid
| |
hid: logitech-dj: handle newer quad/bt2.0 receivers in hid proxy mode
|
the dinovo edge and dinovo mini keyboards with builtin touchpad come with a different version of the quad/bt2.0 combo receivers shipped with the mx5000 and mx5500 keyboards. these receivers are compatible with one another, e.g. the dinovo edge keyboard can be paired with the mx5000 receiver.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
handle newer quad/bt2.0 receivers in hid proxy mode
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['hid ', 'logitech-dj']
|
['h', 'c']
| 4
| 92
| 31
|
--- diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h --- a/drivers/hid/hid-ids.h +++ b/drivers/hid/hid-ids.h -#define usb_device_id_dinovo_edge 0xc714 -#define usb_device_id_dinovo_mini 0xc71f +#define usb_device_id_dinovo_edge_receiver_kbd_dev 0xc713 +#define usb_device_id_dinovo_edge_receiver_mouse_dev 0xc714 +#define usb_device_id_dinovo_mini_receiver_kbd_dev 0xc71e +#define usb_device_id_dinovo_mini_receiver_mouse_dev 0xc71f diff --git a/drivers/hid/hid-lg.c b/drivers/hid/hid-lg.c --- a/drivers/hid/hid-lg.c +++ b/drivers/hid/hid-lg.c -static int lg_dinovo_mapping(struct hid_input *hi, struct hid_usage *usage, - unsigned long **bit, int *max) -{ - if ((usage->hid & hid_usage_page) != hid_up_logivendor) - return 0; - - switch (usage->hid & hid_usage) { - - case 0x00d: lg_map_key_clear(key_media); break; - default: - return 0; - - } - return 1; -} - - if (hdev->product == usb_device_id_dinovo_mini && - lg_dinovo_mapping(hi, usage, bit, max)) - return 1; - - { hid_usb_device(usb_vendor_id_logitech, usb_device_id_dinovo_edge), - .driver_data = lg_duplicate_usages }, - { hid_usb_device(usb_vendor_id_logitech, usb_device_id_dinovo_mini), - .driver_data = lg_duplicate_usages }, diff --git a/drivers/hid/hid-logitech-dj.c b/drivers/hid/hid-logitech-dj.c --- a/drivers/hid/hid-logitech-dj.c +++ b/drivers/hid/hid-logitech-dj.c +#define kbd_mouse bit(5) + recvr_type_dinovo, +/* mouse descriptor (5) for bluetooth receiver, normal-res hwheel, 8 buttons */ +static const char mse5_bluetooth_descriptor[] = { + 0x05, 0x01, /* usage_page (generic desktop) */ + 0x09, 0x02, /* usage (mouse) */ + 0xa1, 0x01, /* collection (application) */ + 0x85, 0x05, /* report id (5) */ + 0x09, 0x01, /* usage (pointer) */ + 0xa1, 0x00, /* collection (physical) */ + 0x05, 0x09, /* usage page (button) */ + 0x19, 0x01, /* usage minimum (1) */ + 0x29, 0x08, /* usage maximum (8) */ + 0x15, 0x00, /* logical minimum (0) */ + 0x25, 0x01, /* logical maximum (1) */ + 0x95, 0x08, /* report count (8) */ + 0x75, 0x01, /* report size (1) */ + 0x81, 0x02, /* input (data,var,abs) */ + 0x05, 0x01, /* usage page (generic desktop) */ + 0x16, 0x01, 0xf8, /* logical minimum (-2047) */ + 0x26, 0xff, 0x07, /* logical maximum (2047) */ + 0x75, 0x0c, /* report size (12) */ + 0x95, 0x02, /* report count (2) */ + 0x09, 0x30, /* usage (x) */ + 0x09, 0x31, /* usage (y) */ + 0x81, 0x06, /* input (data,var,rel) */ + 0x15, 0x81, /* logical minimum (-127) */ + 0x25, 0x7f, /* logical maximum (127) */ + 0x75, 0x08, /* report size (8) */ + 0x95, 0x01, /* report count (1) */ + 0x09, 0x38, /* usage (wheel) */ + 0x81, 0x06, /* input (data,var,rel) */ + 0x05, 0x0c, /* usage page (consumer devices) */ + 0x0a, 0x38, 0x02, /* usage (ac pan) */ + 0x15, 0x81, /* logical minimum (-127) */ + 0x25, 0x7f, /* logical maximum (127) */ + 0x75, 0x08, /* report size (8) */ + 0x95, 0x01, /* report count (1) */ + 0x81, 0x06, /* input (data,var,rel) */ + 0xc0, /* end collection */ + 0xc0, /* end collection */ +}; + + sizeof(mse5_bluetooth_descriptor) + \ +static bool recvr_type_is_bluetooth(enum recvr_type type) +{ + return type == recvr_type_bluetooth || type == recvr_type_dinovo; +} + - sep = (type == recvr_type_bluetooth) ? '.' : '/'; + sep = recvr_type_is_bluetooth(type) ? '.' : '/'; + * + * on dinovo receivers the keyboard's touchpad and an optional paired actual + * mouse send separate input reports, input(2) aka std_mouse for the mouse + * and input(5) aka kbd_mouse for the keyboard's touchpad. + * + * on mx5x00 receivers (which can also be paired with a dinovo keyboard) + * input(2) is used for both an optional paired actual mouse and for the + * keyboard's touchpad. - workitem->reports_supported |= std_mouse; + if (djrcv_dev->type == recvr_type_dinovo) + workitem->reports_supported |= kbd_mouse; + else + workitem->reports_supported |= std_mouse; - else if (djdev->dj_receiver_dev->type == recvr_type_bluetooth) + else if (recvr_type_is_bluetooth(djdev->dj_receiver_dev->type)) + if (djdev->reports_supported & kbd_mouse) { + dbg_hid("%s: sending a kbd-mouse descriptor, reports_supported: %llx ", + __func__, djdev->reports_supported); + rdcat(rdesc, &rsize, mse5_bluetooth_descriptor, + sizeof(mse5_bluetooth_descriptor)); + } + + case recvr_type_dinovo: no_dj_interfaces = 2; break; + + { /* logitech dinovo edge hid++ / bluetooth receiver keyboard intf. (0xc713) */ + hid_usb_device(usb_vendor_id_logitech, + usb_device_id_dinovo_edge_receiver_kbd_dev), + .driver_data = recvr_type_dinovo}, + { /* logitech dinovo edge hid++ / bluetooth receiver mouse intf. (0xc714) */ + hid_usb_device(usb_vendor_id_logitech, + usb_device_id_dinovo_edge_receiver_mouse_dev), + .driver_data = recvr_type_dinovo}, + { /* logitech dinovo mini hid++ / bluetooth receiver mouse intf. (0xc71e) */ + hid_usb_device(usb_vendor_id_logitech, + usb_device_id_dinovo_mini_receiver_kbd_dev), + .driver_data = recvr_type_dinovo}, + { /* logitech dinovo mini hid++ / bluetooth receiver keyboard intf. (0xc71f) */ + hid_usb_device(usb_vendor_id_logitech, + usb_device_id_dinovo_mini_receiver_mouse_dev), + .driver_data = recvr_type_dinovo}, diff --git a/drivers/hid/hid-quirks.c b/drivers/hid/hid-quirks.c --- a/drivers/hid/hid-quirks.c +++ b/drivers/hid/hid-quirks.c - { hid_usb_device(usb_vendor_id_logitech, usb_device_id_dinovo_edge) }, - { hid_usb_device(usb_vendor_id_logitech, usb_device_id_dinovo_mini) },
|
Tablets, touch screens, keyboards, mouses
|
434f77092eeb42d3ab4484f71921450d7f8966e5
|
hans de goede
|
drivers
|
hid
| |
hid: magicmouse: add apple magic mouse 2 support
|
bluetooth device vendor 004c (apple) device 0269 (magic mouse 2)
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add apple magic mouse 2 support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['hid ', 'magicmouse']
|
['h', 'c']
| 2
| 49
| 5
|
--- diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h --- a/drivers/hid/hid-ids.h +++ b/drivers/hid/hid-ids.h +#define usb_device_id_apple_magicmouse2 0x0269 diff --git a/drivers/hid/hid-magicmouse.c b/drivers/hid/hid-magicmouse.c --- a/drivers/hid/hid-magicmouse.c +++ b/drivers/hid/hid-magicmouse.c +#define mouse2_report_id 0x12 - if (input->id.product == usb_device_id_apple_magicmouse) { + if (input->id.product == usb_device_id_apple_magicmouse || + input->id.product == usb_device_id_apple_magicmouse2) { - if (input->id.product == usb_device_id_apple_magicmouse) + if (input->id.product == usb_device_id_apple_magicmouse || + input->id.product == usb_device_id_apple_magicmouse2) + case mouse2_report_id: + /* size is either 8 or (14 + 8 * n) */ + if (size != 8 && (size < 14 || (size - 14) % 8 != 0)) + return 0; + npoints = (size - 14) / 8; + if (npoints > 15) { + hid_warn(hdev, "invalid size value (%d) for mouse2_report_id ", + size); + return 0; + } + msc->ntouches = 0; + for (ii = 0; ii < npoints; ii++) + magicmouse_emit_touch(msc, ii, data + ii * 8 + 14); + + /* when emulating three-button mode, it is important + * to have the current touch information before + * generating a click event. + */ + x = (int)((data[3] << 24) | (data[2] << 16)) >> 16; + y = (int)((data[5] << 24) | (data[4] << 16)) >> 16; + clicks = data[1]; + + /* the following bits provide a device specific timestamp. they + * are unused here. + * + * ts = data[11] >> 6 | data[12] << 2 | data[13] << 10; + */ + break; - if (input->id.product == usb_device_id_apple_magicmouse) { + if (input->id.product == usb_device_id_apple_magicmouse || + input->id.product == usb_device_id_apple_magicmouse2) { - if (input->id.product == usb_device_id_apple_magicmouse) { + if (input->id.product == usb_device_id_apple_magicmouse || + input->id.product == usb_device_id_apple_magicmouse2) { - if (input->id.product == usb_device_id_apple_magicmouse) { + if (input->id.product == usb_device_id_apple_magicmouse || + input->id.product == usb_device_id_apple_magicmouse2) { + const u8 feature_mt_mouse2[] = { 0xf1, 0x02, 0x01 }; + else if (id->product == usb_device_id_apple_magicmouse2) + report = hid_register_report(hdev, hid_input_report, + mouse2_report_id, 0); + } else if (id->product == usb_device_id_apple_magicmouse2) { + feature_size = sizeof(feature_mt_mouse2); + feature = feature_mt_mouse2; + { hid_bluetooth_device(bt_vendor_id_apple, + usb_device_id_apple_magicmouse2), .driver_data = 0 },
|
Tablets, touch screens, keyboards, mouses
|
2b0c086cd6f40648df73c30ea785e5c7777948da
|
john chen
|
drivers
|
hid
| |
hid: semitek: new driver for gk6x series keyboards
|
a number of usb keyboards, using the semitek firmware, are capable of handling arbitrary n-key rollover, but due to a buggy report descriptor, keys beyond the sixth cannot be detected by the generic hid driver.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
new driver for gk6x series keyboards
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['hid ', 'semitek']
|
['h', 'kconfig', 'c', 'makefile']
| 4
| 59
| 0
|
--- diff --git a/drivers/hid/kconfig b/drivers/hid/kconfig --- a/drivers/hid/kconfig +++ b/drivers/hid/kconfig +config hid_semitek + tristate "semitek usb keyboards" + depends on hid + help + support for semitek usb keyboards that are not fully compliant + with the hid standard. + + there are many variants, including: + - gk61, gk64, gk68, gk84, gk96, etc. + - sk61, sk64, sk68, sk84, sk96, etc. + - dierya dk61/dk66 + - tronsmart tk09r + - woo-dy + - x-bows nature/knight + diff --git a/drivers/hid/makefile b/drivers/hid/makefile --- a/drivers/hid/makefile +++ b/drivers/hid/makefile +obj-$(config_hid_semitek) += hid-semitek.o diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h --- a/drivers/hid/hid-ids.h +++ b/drivers/hid/hid-ids.h +#define usb_vendor_id_semitek 0x1ea7 +#define usb_device_id_semitek_keyboard 0x0907 + diff --git a/drivers/hid/hid-semitek.c b/drivers/hid/hid-semitek.c --- /dev/null +++ b/drivers/hid/hid-semitek.c +// spdx-license-identifier: gpl-2.0-or-later +/* + * hid driver for semitek keyboards + * + * copyright (c) 2021 benjamin moody + */ + +#include <linux/device.h> +#include <linux/hid.h> +#include <linux/module.h> + +#include "hid-ids.h" + +static __u8 *semitek_report_fixup(struct hid_device *hdev, __u8 *rdesc, + unsigned int *rsize) +{ + /* in the report descriptor for interface 2, fix the incorrect + description of report id 0x04 (the report contains a + bitmask, not an array of keycodes.) */ + if (*rsize == 0xcb && rdesc[0x83] == 0x81 && rdesc[0x84] == 0x00) { + hid_info(hdev, "fixing up semitek report descriptor "); + rdesc[0x84] = 0x02; + } + return rdesc; +} + +static const struct hid_device_id semitek_devices[] = { + { hid_usb_device(usb_vendor_id_semitek, usb_device_id_semitek_keyboard) }, + { } +}; +module_device_table(hid, semitek_devices); + +static struct hid_driver semitek_driver = { + .name = "semitek", + .id_table = semitek_devices, + .report_fixup = semitek_report_fixup, +}; +module_hid_driver(semitek_driver); + +module_license("gpl");
|
Tablets, touch screens, keyboards, mouses
|
6a01268687c8d00e59dff341c519a337de980d2e
|
benjamin moody
|
drivers
|
hid
| |
hid: support for initialization of some thrustmaster wheels
|
add support for proper initialization of some thrustmaster wheels that appear like a "thrustmaster ffb wheel" (044f:b65d) to the host. when the device is connected a special usb request is sent, this request makes the wheel disconnect and reappear to the host as the "real wheel". for example: a t150 will re-appear as 044f:b677 and a t300 as 044f:b66e
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
support for initialization of some thrustmaster wheels
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['hid ']
|
['kconfig', 'c', 'makefile']
| 4
| 378
| 3
|
--- diff --git a/drivers/hid/kconfig b/drivers/hid/kconfig --- a/drivers/hid/kconfig +++ b/drivers/hid/kconfig - say y here if you have a thrustmaster firestore dual power 2 or - a thrustmaster ferrari gt rumble wheel. + say y here if you have a thrustmaster firestore dual power 2, + a thrustmaster ferrari gt rumble wheel or thrustmaster ffb + wheel (t150rs, t300rs, t300 ferrari alcantara edition, t500rs). diff --git a/drivers/hid/makefile b/drivers/hid/makefile --- a/drivers/hid/makefile +++ b/drivers/hid/makefile -obj-$(config_hid_thrustmaster) += hid-tmff.o +obj-$(config_hid_thrustmaster) += hid-tmff.o hid-thrustmaster.o +obj-$(config_hid_tminit) += hid-tminit.o diff --git a/drivers/hid/hid-quirks.c b/drivers/hid/hid-quirks.c --- a/drivers/hid/hid-quirks.c +++ b/drivers/hid/hid-quirks.c +#if is_enabled(config_hid_tminit) + { hid_usb_device(usb_vendor_id_thrustmaster, 0xb65d) }, +#endif diff --git a/drivers/hid/hid-thrustmaster.c b/drivers/hid/hid-thrustmaster.c --- /dev/null +++ b/drivers/hid/hid-thrustmaster.c +// spdx-license-identifier: gpl-2.0 +/** + * when connected to the machine, the thrustmaster wheels appear as + * a "generic" hid gamepad called "thrustmaster ffb wheel". + * + * when in this mode not every functionality of the wheel, like the force feedback, + * are available. to enable all functionalities of a thrustmaster wheel we have to send + * to it a specific usb control request with a code different for each wheel. + * + * this driver tries to understand which model of thrustmaster wheel the generic + * "thrustmaster ffb wheel" really is and then sends the appropriate control code. + * + * copyright (c) 2020-2021 dario pagani <dario.pagani.146+linuxk@gmail.com> + * copyright (c) 2020-2021 kim kuparinen <kimi.h.kuparinen@gmail.com> + */ +#include <linux/hid.h> +#include <linux/usb.h> +#include <linux/input.h> +#include <linux/slab.h> +#include <linux/module.h> + +/** + * these interrupts are used to prevent a nasty crash when initializing the + * t300rs. used in thrustmaster_interrupts(). + */ +static const u8 setup_0[] = { 0x42, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; +static const u8 setup_1[] = { 0x0a, 0x04, 0x90, 0x03, 0x00, 0x00, 0x00, 0x00 }; +static const u8 setup_2[] = { 0x0a, 0x04, 0x00, 0x0c, 0x00, 0x00, 0x00, 0x00 }; +static const u8 setup_3[] = { 0x0a, 0x04, 0x12, 0x10, 0x00, 0x00, 0x00, 0x00 }; +static const u8 setup_4[] = { 0x0a, 0x04, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00 }; +static const u8 *const setup_arr[] = { setup_0, setup_1, setup_2, setup_3, setup_4 }; +static const unsigned int setup_arr_sizes[] = { + array_size(setup_0), + array_size(setup_1), + array_size(setup_2), + array_size(setup_3), + array_size(setup_4) +}; +/** + * this struct contains for each type of + * thrustmaster wheel + * + * note: the values are stored in the cpu + * endianness, the usb protocols always use + * little endian; the macro cpu_to_le[bit]() + * must be used when preparing usb packets + * and vice-versa + */ +struct tm_wheel_info { + uint16_t wheel_type; + + /** + * see when the usb control out packet is prepared... + * @todo the tmx seems to require multiple control codes to switch. + */ + uint16_t switch_value; + + char const *const wheel_name; +}; + +/** + * known wheels. + * note: tmx does not work as it requires 2 control packets + */ +static const struct tm_wheel_info tm_wheels_infos[] = { + {0x0306, 0x0006, "thrustmaster t150rs"}, + {0x0206, 0x0005, "thrustmaster t300rs"}, + {0x0204, 0x0005, "thrustmaster t300 ferrari alcantara edition"}, + {0x0002, 0x0002, "thrustmaster t500rs"} + //{0x0407, 0x0001, "thrustmaster tmx"} +}; + +static const uint8_t tm_wheels_infos_length = 4; + +/** + * this structs contains (in little endian) the response data + * of the wheel to the request 73 + * + * a sufficient research to understand what each field does is not + * beign conducted yet. the position and meaning of fields are a + * just a very optimistic guess based on instinct.... + */ +struct __packed tm_wheel_response +{ + /** + * seems to be the type of packet + * - 0x0049 if is data.a (15 bytes) + * - 0x0047 if is data.b (7 bytes) + */ + uint16_t type; + + union { + struct __packed { + uint16_t field0; + uint16_t field1; + /** + * seems to be the model code of the wheel + * read table thrustmaster_wheels to values + */ + uint16_t model; + + uint16_t field2; + uint16_t field3; + uint16_t field4; + uint16_t field5; + } a; + struct __packed { + uint16_t field0; + uint16_t field1; + uint16_t model; + } b; + } data; +}; + +struct tm_wheel { + struct usb_device *usb_dev; + struct urb *urb; + + struct usb_ctrlrequest *model_request; + struct tm_wheel_response *response; + + struct usb_ctrlrequest *change_request; +}; + +/** the control packet to send to wheel */ +static const struct usb_ctrlrequest model_request = { + .brequesttype = 0xc1, + .brequest = 73, + .wvalue = 0, + .windex = 0, + .wlength = cpu_to_le16(0x0010) +}; + +static const struct usb_ctrlrequest change_request = { + .brequesttype = 0x41, + .brequest = 83, + .wvalue = 0, // will be filled by the driver + .windex = 0, + .wlength = 0 +}; + +/** + * on some setups initializing the t300rs crashes the kernel, + * these interrupts fix that particular issue. so far they haven't caused any + * adverse effects in other wheels. + */ +static void thrustmaster_interrupts(struct hid_device *hdev) +{ + int ret, trans, i, b_ep; + u8 *send_buf = kmalloc(256, gfp_kernel); + struct usb_host_endpoint *ep; + struct device *dev = &hdev->dev; + struct usb_interface *usbif = to_usb_interface(dev->parent); + struct usb_device *usbdev = interface_to_usbdev(usbif); + + if (!send_buf) { + hid_err(hdev, "failed allocating send buffer "); + return; + } + + ep = &usbif->cur_altsetting->endpoint[1]; + b_ep = ep->desc.bendpointaddress; + + for (i = 0; i < array_size(setup_arr); ++i) { + memcpy(send_buf, setup_arr[i], setup_arr_sizes[i]); + + ret = usb_interrupt_msg(usbdev, + usb_sndintpipe(usbdev, b_ep), + send_buf, + setup_arr_sizes[i], + &trans, + usb_ctrl_set_timeout); + + if (ret) { + hid_err(hdev, "setup data couldn't be sent "); + return; + } + } + + kfree(send_buf); +} + +static void thrustmaster_change_handler(struct urb *urb) +{ + struct hid_device *hdev = urb->context; + + // the wheel seems to kill himself before answering the host and therefore is violating the usb protocol... + if (urb->status == 0 || urb->status == -eproto || urb->status == -epipe) + hid_info(hdev, "success?! the wheel should have been initialized! "); + else + hid_warn(hdev, "urb to change wheel mode seems to have failed with error %d ", urb->status); +} + +/** + * called by the usb subsystem when the wheel responses to our request + * to get [what it seems to be] the wheel's model. + * + * if the model id is recognized then we send an opportune usb control request + * to switch the wheel to its full capabilities + */ +static void thrustmaster_model_handler(struct urb *urb) +{ + struct hid_device *hdev = urb->context; + struct tm_wheel *tm_wheel = hid_get_drvdata(hdev); + uint16_t model = 0; + int i, ret; + const struct tm_wheel_info *twi = 0; + + if (urb->status) { + hid_err(hdev, "urb to get model id failed with error %d ", urb->status); + return; + } + + if (tm_wheel->response->type == cpu_to_le16(0x49)) + model = le16_to_cpu(tm_wheel->response->data.a.model); + else if (tm_wheel->response->type == cpu_to_le16(0x47)) + model = le16_to_cpu(tm_wheel->response->data.b.model); + else { + hid_err(hdev, "unknown packet type 0x%x, unable to proceed further with wheel init ", tm_wheel->response->type); + return; + } + + for (i = 0; i < tm_wheels_infos_length && !twi; i++) + if (tm_wheels_infos[i].wheel_type == model) + twi = tm_wheels_infos + i; + + if (twi) + hid_info(hdev, "wheel with model id 0x%x is a %s ", model, twi->wheel_name); + else { + hid_err(hdev, "unknown wheel's model id 0x%x, unable to proceed further with wheel init ", model); + return; + } + + tm_wheel->change_request->wvalue = cpu_to_le16(twi->switch_value); + usb_fill_control_urb( + tm_wheel->urb, + tm_wheel->usb_dev, + usb_sndctrlpipe(tm_wheel->usb_dev, 0), + (char *)tm_wheel->change_request, + 0, 0, // we do not expect any response from the wheel + thrustmaster_change_handler, + hdev + ); + + ret = usb_submit_urb(tm_wheel->urb, gfp_atomic); + if (ret) + hid_err(hdev, "error %d while submitting the change urb. i am unable to initialize this wheel... ", ret); +} + +static void thrustmaster_remove(struct hid_device *hdev) +{ + struct tm_wheel *tm_wheel = hid_get_drvdata(hdev); + + usb_kill_urb(tm_wheel->urb); + + kfree(tm_wheel->response); + kfree(tm_wheel->model_request); + usb_free_urb(tm_wheel->urb); + kfree(tm_wheel); + + hid_hw_stop(hdev); +} + +/** + * function called by hid when a hid thrustmaster ffb wheel is connected to the host. + * this function starts the hid dev, tries to allocate the tm_wheel data structure and + * finally send an usb control request to the wheel to get [what it seems to be] its + * model type. + */ +static int thrustmaster_probe(struct hid_device *hdev, const struct hid_device_id *id) +{ + int ret = 0; + struct tm_wheel *tm_wheel = 0; + + ret = hid_parse(hdev); + if (ret) { + hid_err(hdev, "parse failed with error %d ", ret); + goto error0; + } + + ret = hid_hw_start(hdev, hid_connect_default & ~hid_connect_ff); + if (ret) { + hid_err(hdev, "hw start failed with error %d ", ret); + goto error0; + } + + // now we allocate the tm_wheel + tm_wheel = kzalloc(sizeof(struct tm_wheel), gfp_kernel); + if (!tm_wheel) { + ret = -enomem; + goto error1; + } + + tm_wheel->urb = usb_alloc_urb(0, gfp_atomic); + if (!tm_wheel->urb) { + ret = -enomem; + goto error2; + } + + tm_wheel->model_request = kzalloc(sizeof(struct usb_ctrlrequest), gfp_kernel); + if (!tm_wheel->model_request) { + ret = -enomem; + goto error3; + } + memcpy(tm_wheel->model_request, &model_request, sizeof(struct usb_ctrlrequest)); + + tm_wheel->response = kzalloc(sizeof(struct tm_wheel_response), gfp_kernel); + if (!tm_wheel->response) { + ret = -enomem; + goto error4; + } + + tm_wheel->change_request = kzalloc(sizeof(struct usb_ctrlrequest), gfp_kernel); + if (!tm_wheel->model_request) { + ret = -enomem; + goto error5; + } + memcpy(tm_wheel->change_request, &change_request, sizeof(struct usb_ctrlrequest)); + + tm_wheel->usb_dev = interface_to_usbdev(to_usb_interface(hdev->dev.parent)); + hid_set_drvdata(hdev, tm_wheel); + + thrustmaster_interrupts(hdev); + + usb_fill_control_urb( + tm_wheel->urb, + tm_wheel->usb_dev, + usb_rcvctrlpipe(tm_wheel->usb_dev, 0), + (char *)tm_wheel->model_request, + tm_wheel->response, + sizeof(struct tm_wheel_response), + thrustmaster_model_handler, + hdev + ); + + ret = usb_submit_urb(tm_wheel->urb, gfp_atomic); + if (ret) + hid_err(hdev, "error %d while submitting the urb. i am unable to initialize this wheel... ", ret); + + return ret; + +error5: kfree(tm_wheel->response); +error4: kfree(tm_wheel->model_request); +error3: usb_free_urb(tm_wheel->urb); +error2: kfree(tm_wheel); +error1: hid_hw_stop(hdev); +error0: + return ret; +} + +static const struct hid_device_id thrustmaster_devices[] = { + { hid_usb_device(0x044f, 0xb65d)}, + {} +}; + +module_device_table(hid, thrustmaster_devices); + +static struct hid_driver thrustmaster_driver = { + .name = "hid-thrustmaster", + .id_table = thrustmaster_devices, + .probe = thrustmaster_probe, + .remove = thrustmaster_remove, +}; + +module_hid_driver(thrustmaster_driver); + +module_author("dario pagani <dario.pagani.146+linuxk@gmail.com>"); +module_license("gpl"); +module_description("driver to initialize some steering wheel joysticks from thrustmaster"); +
|
Tablets, touch screens, keyboards, mouses
|
c49c33637802a2c6957a78119eb8be3b055dd9e9
|
dario pagani
|
drivers
|
hid
| |
hid: surface-hid: add support for legacy keyboard interface
|
add support for the legacy keyboard (kbd/tc=0x08) hid transport layer of the surface system aggregator module (ssam) to the surface hid driver. on surface laptops 1 and 2, this interface is used to connect the integrated keyboard.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add support for legacy keyboard interface
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['hid ', 'surface-hid']
|
['kconfig', 'c', 'makefile']
| 3
| 315
| 0
|
--- diff --git a/drivers/hid/surface-hid/kconfig b/drivers/hid/surface-hid/kconfig --- a/drivers/hid/surface-hid/kconfig +++ b/drivers/hid/surface-hid/kconfig +config surface_kbd + tristate "hid keyboard transport driver for surface system aggregator module" + select surface_hid_core + help + driver to support hid keyboards on surface laptop 1 and 2 devices. + + this driver provides support for the hid transport protocol provided + by the surface aggregator module (i.e. the embedded controller) on + microsoft surface laptops 1 and 2. it is used to connect the + integrated keyboard on those devices. + + say m or y here, if you want support for the integrated keyboard on + microsoft surface laptops 1 and 2. + diff --git a/drivers/hid/surface-hid/makefile b/drivers/hid/surface-hid/makefile --- a/drivers/hid/surface-hid/makefile +++ b/drivers/hid/surface-hid/makefile +obj-$(config_surface_kbd) += surface_kbd.o diff --git a/drivers/hid/surface-hid/surface_kbd.c b/drivers/hid/surface-hid/surface_kbd.c --- /dev/null +++ b/drivers/hid/surface-hid/surface_kbd.c +// spdx-license-identifier: gpl-2.0+ +/* + * surface system aggregator module (ssam) hid transport driver for the legacy + * keyboard interface (kbd/tc=0x08 subsystem). provides support for the + * integrated hid keyboard on surface laptops 1 and 2. + * + * copyright (c) 2019-2021 maximilian luz <luzmaximilian@gmail.com> + */ + +#include <asm/unaligned.h> +#include <linux/hid.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/types.h> + +#include <linux/surface_aggregator/controller.h> + +#include "surface_hid_core.h" + + +/* -- sam interface (kbd). -------------------------------------------------- */ + +#define kbd_feature_report_size 7 /* 6 + report id */ + +enum surface_kbd_cid { + surface_kbd_cid_get_descriptor = 0x00, + surface_kbd_cid_set_capslock_led = 0x01, + surface_kbd_cid_evt_input_generic = 0x03, + surface_kbd_cid_evt_input_hotkeys = 0x04, + surface_kbd_cid_get_feature_report = 0x0b, +}; + +static int ssam_kbd_get_descriptor(struct surface_hid_device *shid, u8 entry, u8 *buf, size_t len) +{ + struct ssam_request rqst; + struct ssam_response rsp; + int status; + + rqst.target_category = shid->uid.category; + rqst.target_id = shid->uid.target; + rqst.command_id = surface_kbd_cid_get_descriptor; + rqst.instance_id = shid->uid.instance; + rqst.flags = ssam_request_has_response; + rqst.length = sizeof(entry); + rqst.payload = &entry; + + rsp.capacity = len; + rsp.length = 0; + rsp.pointer = buf; + + status = ssam_retry(ssam_request_sync_onstack, shid->ctrl, &rqst, &rsp, sizeof(entry)); + if (status) + return status; + + if (rsp.length != len) { + dev_err(shid->dev, "invalid descriptor length: got %zu, expected, %zu ", + rsp.length, len); + return -eproto; + } + + return 0; +} + +static int ssam_kbd_set_caps_led(struct surface_hid_device *shid, bool value) +{ + struct ssam_request rqst; + u8 value_u8 = value; + + rqst.target_category = shid->uid.category; + rqst.target_id = shid->uid.target; + rqst.command_id = surface_kbd_cid_set_capslock_led; + rqst.instance_id = shid->uid.instance; + rqst.flags = 0; + rqst.length = sizeof(value_u8); + rqst.payload = &value_u8; + + return ssam_retry(ssam_request_sync_onstack, shid->ctrl, &rqst, null, sizeof(value_u8)); +} + +static int ssam_kbd_get_feature_report(struct surface_hid_device *shid, u8 *buf, size_t len) +{ + struct ssam_request rqst; + struct ssam_response rsp; + u8 payload = 0; + int status; + + rqst.target_category = shid->uid.category; + rqst.target_id = shid->uid.target; + rqst.command_id = surface_kbd_cid_get_feature_report; + rqst.instance_id = shid->uid.instance; + rqst.flags = ssam_request_has_response; + rqst.length = sizeof(payload); + rqst.payload = &payload; + + rsp.capacity = len; + rsp.length = 0; + rsp.pointer = buf; + + status = ssam_retry(ssam_request_sync_onstack, shid->ctrl, &rqst, &rsp, sizeof(payload)); + if (status) + return status; + + if (rsp.length != len) { + dev_err(shid->dev, "invalid feature report length: got %zu, expected, %zu ", + rsp.length, len); + return -eproto; + } + + return 0; +} + +static bool ssam_kbd_is_input_event(const struct ssam_event *event) +{ + if (event->command_id == surface_kbd_cid_evt_input_generic) + return true; + + if (event->command_id == surface_kbd_cid_evt_input_hotkeys) + return true; + + return false; +} + +static u32 ssam_kbd_event_fn(struct ssam_event_notifier *nf, const struct ssam_event *event) +{ + struct surface_hid_device *shid = container_of(nf, struct surface_hid_device, notif); + + /* + * check against device uid manually, as registry and device target + * category doesn't line up. + */ + + if (shid->uid.category != event->target_category) + return 0; + + if (shid->uid.target != event->target_id) + return 0; + + if (shid->uid.instance != event->instance_id) + return 0; + + if (!ssam_kbd_is_input_event(event)) + return 0; + + hid_input_report(shid->hid, hid_input_report, (u8 *)&event->data[0], event->length, 0); + return ssam_notif_handled; +} + + +/* -- transport driver (kbd). ----------------------------------------------- */ + +static int skbd_get_caps_led_value(struct hid_device *hid, u8 rprt_id, u8 *buf, size_t len) +{ + struct hid_field *field; + unsigned int offset, size; + int i; + + /* get led field. */ + field = hidinput_get_led_field(hid); + if (!field) + return -enoent; + + /* check if we got the correct report. */ + if (len != hid_report_len(field->report)) + return -enoent; + + if (rprt_id != field->report->id) + return -enoent; + + /* get caps lock led index. */ + for (i = 0; i < field->report_count; i++) + if ((field->usage[i].hid & 0xffff) == 0x02) + break; + + if (i == field->report_count) + return -enoent; + + /* extract value. */ + size = field->report_size; + offset = field->report_offset + i * size; + return !!hid_field_extract(hid, buf + 1, size, offset); +} + +static int skbd_output_report(struct surface_hid_device *shid, u8 rprt_id, u8 *buf, size_t len) +{ + int caps_led; + int status; + + caps_led = skbd_get_caps_led_value(shid->hid, rprt_id, buf, len); + if (caps_led < 0) + return -eio; /* only caps led output reports are supported. */ + + status = ssam_kbd_set_caps_led(shid, caps_led); + if (status < 0) + return status; + + return len; +} + +static int skbd_get_feature_report(struct surface_hid_device *shid, u8 rprt_id, u8 *buf, size_t len) +{ + u8 report[kbd_feature_report_size]; + int status; + + /* + * the keyboard only has a single hard-coded read-only feature report + * of size kbd_feature_report_size. try to load it and compare its + * report id against the requested one. + */ + + if (len < array_size(report)) + return -enospc; + + status = ssam_kbd_get_feature_report(shid, report, array_size(report)); + if (status < 0) + return status; + + if (rprt_id != report[0]) + return -enoent; + + memcpy(buf, report, array_size(report)); + return len; +} + +static int skbd_set_feature_report(struct surface_hid_device *shid, u8 rprt_id, u8 *buf, size_t len) +{ + /* not supported. see skbd_get_feature_report() for details. */ + return -eio; +} + + +/* -- driver setup. --------------------------------------------------------- */ + +static int surface_kbd_probe(struct platform_device *pdev) +{ + struct ssam_controller *ctrl; + struct surface_hid_device *shid; + + /* add device link to ec. */ + ctrl = ssam_client_bind(&pdev->dev); + if (is_err(ctrl)) + return ptr_err(ctrl) == -enodev ? -eprobe_defer : ptr_err(ctrl); + + shid = devm_kzalloc(&pdev->dev, sizeof(*shid), gfp_kernel); + if (!shid) + return -enomem; + + shid->dev = &pdev->dev; + shid->ctrl = ctrl; + + shid->uid.domain = ssam_domain_serialhub; + shid->uid.category = ssam_ssh_tc_kbd; + shid->uid.target = 2; + shid->uid.instance = 0; + shid->uid.function = 0; + + shid->notif.base.priority = 1; + shid->notif.base.fn = ssam_kbd_event_fn; + shid->notif.event.reg = ssam_event_registry_sam; + shid->notif.event.id.target_category = shid->uid.category; + shid->notif.event.id.instance = shid->uid.instance; + shid->notif.event.mask = ssam_event_mask_none; + shid->notif.event.flags = 0; + + shid->ops.get_descriptor = ssam_kbd_get_descriptor; + shid->ops.output_report = skbd_output_report; + shid->ops.get_feature_report = skbd_get_feature_report; + shid->ops.set_feature_report = skbd_set_feature_report; + + platform_set_drvdata(pdev, shid); + return surface_hid_device_add(shid); +} + +static int surface_kbd_remove(struct platform_device *pdev) +{ + surface_hid_device_destroy(platform_get_drvdata(pdev)); + return 0; +} + +static const struct acpi_device_id surface_kbd_match[] = { + { "mshw0096" }, + { }, +}; +module_device_table(acpi, surface_kbd_match); + +static struct platform_driver surface_kbd_driver = { + .probe = surface_kbd_probe, + .remove = surface_kbd_remove, + .driver = { + .name = "surface_keyboard", + .acpi_match_table = surface_kbd_match, + .pm = &surface_hid_pm_ops, + .probe_type = probe_prefer_asynchronous, + }, +}; +module_platform_driver(surface_kbd_driver); + +module_author("maximilian luz <luzmaximilian@gmail.com>"); +module_description("hid legacy transport driver for surface system aggregator module"); +module_license("gpl");
|
Tablets, touch screens, keyboards, mouses
|
35a927f2848bd79586c6374ebb99e4207f3b0c7f
|
maximilian luz
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drivers
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hid
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surface-hid
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media: uapi: vp8: remove "header" from symbol names and macros
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it doesn't seem to add any clarity to have a "header" suffix in controls, struct names and flags.
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this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
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v4l2 stateless vp8 de-staging
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['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['h', 'c', 'rst']
| 14
| 192
| 192
|
--- diff --git a/documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/documentation/userspace-api/media/v4l/ext-ctrls-codec.rst --- a/documentation/userspace-api/media/v4l/ext-ctrls-codec.rst +++ b/documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -''v4l2_cid_mpeg_video_vp8_frame_header (struct)'' +''v4l2_cid_mpeg_video_vp8_frame (struct)'' -.. c:type:: v4l2_ctrl_vp8_frame_header +.. c:type:: v4l2_ctrl_vp8_frame -.. flat-table:: struct v4l2_ctrl_vp8_frame_header +.. flat-table:: struct v4l2_ctrl_vp8_frame - * - struct :c:type:'v4l2_vp8_segment_header' - - ''segment_header'' + * - struct :c:type:'v4l2_vp8_segment' + - ''segment'' - structure with segment-based adjustments metadata. - * - struct :c:type:'v4l2_vp8_loopfilter_header' - - ''loopfilter_header'' + * - struct :c:type:'v4l2_vp8_loopfilter' + - ''lf'' - structure with loop filter level adjustments metadata. - * - struct :c:type:'v4l2_vp8_quantization_header' - - ''quant_header'' + * - struct :c:type:'v4l2_vp8_quantization' + - ''quant'' - structure with vp8 dequantization indices metadata. - * - struct :c:type:'v4l2_vp8_entropy_header' - - ''entropy_header'' + * - struct :c:type:'v4l2_vp8_entropy' + - ''entropy'' - structure with vp8 entropy coder probabilities metadata. - ''coder_state'' - ''flags'' - - see :ref:'frame header flags <vp8_frame_header_flags>' + - see :ref:'frame flags <vp8_frame_flags>' -.. _vp8_frame_header_flags: +.. _vp8_frame_flags: -''frame header flags'' +''frame flags'' - * - ''v4l2_vp8_frame_header_flag_key_frame'' + * - ''v4l2_vp8_frame_flag_key_frame'' - 0x01 - indicates if the frame is a key frame. - * - ''v4l2_vp8_frame_header_flag_experimental'' + * - ''v4l2_vp8_frame_flag_experimental'' - 0x02 - experimental bitstream. - * - ''v4l2_vp8_frame_header_flag_show_frame'' + * - ''v4l2_vp8_frame_flag_show_frame'' - 0x04 - show frame flag, indicates if the frame is for display. - * - ''v4l2_vp8_frame_header_flag_mb_no_skip_coeff'' + * - ''v4l2_vp8_frame_flag_mb_no_skip_coeff'' - 0x08 - enable/disable skipping of macroblocks with no non-zero coefficients. - * - ''v4l2_vp8_frame_header_flag_sign_bias_golden'' + * - ''v4l2_vp8_frame_flag_sign_bias_golden'' - 0x10 - sign of motion vectors when the golden frame is referenced. - * - ''v4l2_vp8_frame_header_flag_sign_bias_alt'' + * - ''v4l2_vp8_frame_flag_sign_bias_alt'' - 0x20 - sign of motion vectors when the alt frame is referenced. - ''padding'' - applications and drivers must set this to zero. -.. c:type:: v4l2_vp8_segment_header +.. c:type:: v4l2_vp8_segment -.. flat-table:: struct v4l2_vp8_segment_header +.. flat-table:: struct v4l2_vp8_segment - applications and drivers must set this to zero. - ''flags'' - - see :ref:'segment header flags <vp8_segment_header_flags>' + - see :ref:'segment flags <vp8_segment_flags>' -.. _vp8_segment_header_flags: +.. _vp8_segment_flags: -''segment header flags'' +''segment flags'' - * - ''v4l2_vp8_segment_header_flag_enabled'' + * - ''v4l2_vp8_segment_flag_enabled'' - 0x01 - enable/disable segment-based adjustments. - * - ''v4l2_vp8_segment_header_flag_update_map'' + * - ''v4l2_vp8_segment_flag_update_map'' - 0x02 - indicates if the macroblock segmentation map is updated in this frame. - * - ''v4l2_vp8_segment_header_flag_update_feature_data'' + * - ''v4l2_vp8_segment_flag_update_feature_data'' - 0x04 - indicates if the segment feature data is updated in this frame. - * - ''v4l2_vp8_segment_header_flag_delta_value_mode'' + * - ''v4l2_vp8_segment_flag_delta_value_mode'' - 0x08 - if is set, the segment feature data mode is delta-value. -.. c:type:: v4l2_vp8_loopfilter_header +.. c:type:: v4l2_vp8_loopfilter -.. flat-table:: struct v4l2_vp8_loopfilter_header +.. flat-table:: struct v4l2_vp8_loopfilter - applications and drivers must set this to zero. - ''flags'' - - see :ref:'loopfilter header flags <vp8_loopfilter_header_flags>' + - see :ref:'loopfilter flags <vp8_loopfilter_flags>' -.. _vp8_loopfilter_header_flags: +.. _vp8_loopfilter_flags: -''loopfilter header flags'' +''loopfilter flags'' - * - ''v4l2_vp8_lf_header_adj_enable'' + * - ''v4l2_vp8_lf_adj_enable'' - 0x01 - enable/disable macroblock-level loop filter adjustment. - * - ''v4l2_vp8_lf_header_delta_update'' + * - ''v4l2_vp8_lf_delta_update'' - 0x02 - indicates if the delta values used in an adjustment are updated. - if set, indicates the filter type is simple. -.. c:type:: v4l2_vp8_quantization_header +.. c:type:: v4l2_vp8_quantization -.. flat-table:: struct v4l2_vp8_quantization_header +.. flat-table:: struct v4l2_vp8_quantization - ''padding'' - applications and drivers must set this to zero. -.. c:type:: v4l2_vp8_entropy_header +.. c:type:: v4l2_vp8_entropy -.. flat-table:: struct v4l2_vp8_entropy_header +.. flat-table:: struct v4l2_vp8_entropy diff --git a/documentation/userspace-api/media/v4l/pixfmt-compressed.rst b/documentation/userspace-api/media/v4l/pixfmt-compressed.rst --- a/documentation/userspace-api/media/v4l/pixfmt-compressed.rst +++ b/documentation/userspace-api/media/v4l/pixfmt-compressed.rst - through the ''v4l2_cid_mpeg_video_vp8_frame_header'' control. + through the ''v4l2_cid_mpeg_video_vp8_frame'' control. diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c --- a/drivers/media/v4l2-core/v4l2-ctrls.c +++ b/drivers/media/v4l2-core/v4l2-ctrls.c - case v4l2_cid_mpeg_video_vp8_frame_header: return "vp8 frame header"; + case v4l2_cid_mpeg_video_vp8_frame: return "vp8 frame parameters"; - case v4l2_cid_mpeg_video_vp8_frame_header: - *type = v4l2_ctrl_type_vp8_frame_header; + case v4l2_cid_mpeg_video_vp8_frame: + *type = v4l2_ctrl_type_vp8_frame; - struct v4l2_ctrl_vp8_frame_header *p_vp8_frame_header; + struct v4l2_ctrl_vp8_frame *p_vp8_frame; - case v4l2_ctrl_type_vp8_frame_header: - p_vp8_frame_header = p; - p_vp8_frame_header->num_dct_parts = 1; + case v4l2_ctrl_type_vp8_frame: + p_vp8_frame = p; + p_vp8_frame->num_dct_parts = 1; - struct v4l2_ctrl_vp8_frame_header *p_vp8_frame_header; + struct v4l2_ctrl_vp8_frame *p_vp8_frame; - case v4l2_ctrl_type_vp8_frame_header: - p_vp8_frame_header = p; + case v4l2_ctrl_type_vp8_frame: + p_vp8_frame = p; - switch (p_vp8_frame_header->num_dct_parts) { + switch (p_vp8_frame->num_dct_parts) { - zero_padding(p_vp8_frame_header->segment_header); - zero_padding(p_vp8_frame_header->lf_header); - zero_padding(p_vp8_frame_header->quant_header); - zero_padding(p_vp8_frame_header->entropy_header); - zero_padding(p_vp8_frame_header->coder_state); + zero_padding(p_vp8_frame->segment); + zero_padding(p_vp8_frame->lf); + zero_padding(p_vp8_frame->quant); + zero_padding(p_vp8_frame->entropy); + zero_padding(p_vp8_frame->coder_state); - case v4l2_ctrl_type_vp8_frame_header: - elem_size = sizeof(struct v4l2_ctrl_vp8_frame_header); + case v4l2_ctrl_type_vp8_frame: + elem_size = sizeof(struct v4l2_ctrl_vp8_frame); diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c --- a/drivers/staging/media/hantro/hantro_drv.c +++ b/drivers/staging/media/hantro/hantro_drv.c - .id = v4l2_cid_mpeg_video_vp8_frame_header, + .id = v4l2_cid_mpeg_video_vp8_frame, diff --git a/drivers/staging/media/hantro/hantro_g1_vp8_dec.c b/drivers/staging/media/hantro/hantro_g1_vp8_dec.c --- a/drivers/staging/media/hantro/hantro_g1_vp8_dec.c +++ b/drivers/staging/media/hantro/hantro_g1_vp8_dec.c - const struct v4l2_ctrl_vp8_frame_header *hdr) + const struct v4l2_ctrl_vp8_frame *hdr) - const struct v4l2_vp8_segment_header *seg = &hdr->segment_header; - const struct v4l2_vp8_loopfilter_header *lf = &hdr->lf_header; + const struct v4l2_vp8_segment *seg = &hdr->segment; + const struct v4l2_vp8_loopfilter *lf = &hdr->lf; - if (!(seg->flags & v4l2_vp8_segment_header_flag_enabled)) { + if (!(seg->flags & v4l2_vp8_segment_flag_enabled)) { - } else if (seg->flags & v4l2_vp8_segment_header_flag_delta_value_mode) { + } else if (seg->flags & v4l2_vp8_segment_flag_delta_value_mode) { - if (lf->flags & v4l2_vp8_lf_header_adj_enable) { + if (lf->flags & v4l2_vp8_lf_adj_enable) { - const struct v4l2_ctrl_vp8_frame_header *hdr) + const struct v4l2_ctrl_vp8_frame *hdr) - const struct v4l2_vp8_quantization_header *q = &hdr->quant_header; - const struct v4l2_vp8_segment_header *seg = &hdr->segment_header; + const struct v4l2_vp8_quantization *q = &hdr->quant; + const struct v4l2_vp8_segment *seg = &hdr->segment; - if (!(seg->flags & v4l2_vp8_segment_header_flag_enabled)) { + if (!(seg->flags & v4l2_vp8_segment_flag_enabled)) { - } else if (seg->flags & v4l2_vp8_segment_header_flag_delta_value_mode) { + } else if (seg->flags & v4l2_vp8_segment_flag_delta_value_mode) { - const struct v4l2_ctrl_vp8_frame_header *hdr) + const struct v4l2_ctrl_vp8_frame *hdr) - const struct v4l2_ctrl_vp8_frame_header *hdr) + const struct v4l2_ctrl_vp8_frame *hdr) - const struct v4l2_ctrl_vp8_frame_header *hdr) + const struct v4l2_ctrl_vp8_frame *hdr) - if (hdr->flags & v4l2_vp8_frame_header_flag_sign_bias_golden) + if (hdr->flags & v4l2_vp8_frame_flag_sign_bias_golden) - if (hdr->flags & v4l2_vp8_frame_header_flag_sign_bias_alt) + if (hdr->flags & v4l2_vp8_frame_flag_sign_bias_alt) - const struct v4l2_ctrl_vp8_frame_header *hdr) + const struct v4l2_ctrl_vp8_frame *hdr) - const struct v4l2_vp8_segment_header *seg = &hdr->segment_header; + const struct v4l2_vp8_segment *seg = &hdr->segment; - if (seg->flags & v4l2_vp8_segment_header_flag_enabled) { + if (seg->flags & v4l2_vp8_segment_flag_enabled) { - if (seg->flags & v4l2_vp8_segment_header_flag_update_map) + if (seg->flags & v4l2_vp8_segment_flag_update_map) - const struct v4l2_ctrl_vp8_frame_header *hdr; + const struct v4l2_ctrl_vp8_frame *hdr; - hdr = hantro_get_ctrl(ctx, v4l2_cid_mpeg_video_vp8_frame_header); + hdr = hantro_get_ctrl(ctx, v4l2_cid_mpeg_video_vp8_frame); - if (!(hdr->flags & v4l2_vp8_frame_header_flag_mb_no_skip_coeff)) + if (!(hdr->flags & v4l2_vp8_frame_flag_mb_no_skip_coeff)) - if (hdr->lf_header.level == 0) + if (hdr->lf.level == 0) diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h --- a/drivers/staging/media/hantro/hantro_hw.h +++ b/drivers/staging/media/hantro/hantro_hw.h - const struct v4l2_ctrl_vp8_frame_header *hdr); + const struct v4l2_ctrl_vp8_frame *hdr); diff --git a/drivers/staging/media/hantro/hantro_vp8.c b/drivers/staging/media/hantro/hantro_vp8.c --- a/drivers/staging/media/hantro/hantro_vp8.c +++ b/drivers/staging/media/hantro/hantro_vp8.c - const struct v4l2_ctrl_vp8_frame_header *hdr) + const struct v4l2_ctrl_vp8_frame *hdr) - const struct v4l2_vp8_entropy_header *entropy = &hdr->entropy_header; + const struct v4l2_vp8_entropy *entropy = &hdr->entropy; - dst[4] = hdr->segment_header.segment_probs[0]; - dst[5] = hdr->segment_header.segment_probs[1]; - dst[6] = hdr->segment_header.segment_probs[2]; + dst[4] = hdr->segment.segment_probs[0]; + dst[5] = hdr->segment.segment_probs[1]; + dst[6] = hdr->segment.segment_probs[2]; diff --git a/drivers/staging/media/hantro/rk3399_vpu_hw_vp8_dec.c b/drivers/staging/media/hantro/rk3399_vpu_hw_vp8_dec.c --- a/drivers/staging/media/hantro/rk3399_vpu_hw_vp8_dec.c +++ b/drivers/staging/media/hantro/rk3399_vpu_hw_vp8_dec.c - const struct v4l2_ctrl_vp8_frame_header *hdr) + const struct v4l2_ctrl_vp8_frame *hdr) - const struct v4l2_vp8_segment_header *seg = &hdr->segment_header; - const struct v4l2_vp8_loopfilter_header *lf = &hdr->lf_header; + const struct v4l2_vp8_segment *seg = &hdr->segment; + const struct v4l2_vp8_loopfilter *lf = &hdr->lf; - if (!(seg->flags & v4l2_vp8_segment_header_flag_enabled)) { + if (!(seg->flags & v4l2_vp8_segment_flag_enabled)) { - } else if (seg->flags & v4l2_vp8_segment_header_flag_delta_value_mode) { + } else if (seg->flags & v4l2_vp8_segment_flag_delta_value_mode) { - if (lf->flags & v4l2_vp8_lf_header_adj_enable) { + if (lf->flags & v4l2_vp8_lf_adj_enable) { - const struct v4l2_ctrl_vp8_frame_header *hdr) + const struct v4l2_ctrl_vp8_frame *hdr) - const struct v4l2_vp8_quantization_header *q = &hdr->quant_header; - const struct v4l2_vp8_segment_header *seg = &hdr->segment_header; + const struct v4l2_vp8_quantization *q = &hdr->quant; + const struct v4l2_vp8_segment *seg = &hdr->segment; - if (!(seg->flags & v4l2_vp8_segment_header_flag_enabled)) { + if (!(seg->flags & v4l2_vp8_segment_flag_enabled)) { - } else if (seg->flags & v4l2_vp8_segment_header_flag_delta_value_mode) { + } else if (seg->flags & v4l2_vp8_segment_flag_delta_value_mode) { - const struct v4l2_ctrl_vp8_frame_header *hdr) + const struct v4l2_ctrl_vp8_frame *hdr) - const struct v4l2_ctrl_vp8_frame_header *hdr) + const struct v4l2_ctrl_vp8_frame *hdr) - const struct v4l2_ctrl_vp8_frame_header *hdr) + const struct v4l2_ctrl_vp8_frame *hdr) - if (hdr->flags & v4l2_vp8_frame_header_flag_sign_bias_golden) + if (hdr->flags & v4l2_vp8_frame_flag_sign_bias_golden) - if (hdr->flags & v4l2_vp8_frame_header_flag_sign_bias_alt) + if (hdr->flags & v4l2_vp8_frame_flag_sign_bias_alt) - const struct v4l2_ctrl_vp8_frame_header *hdr) + const struct v4l2_ctrl_vp8_frame *hdr) - const struct v4l2_vp8_segment_header *seg = &hdr->segment_header; + const struct v4l2_vp8_segment *seg = &hdr->segment; - if (seg->flags & v4l2_vp8_segment_header_flag_enabled) { + if (seg->flags & v4l2_vp8_segment_flag_enabled) { - if (seg->flags & v4l2_vp8_segment_header_flag_update_map) + if (seg->flags & v4l2_vp8_segment_flag_update_map) - const struct v4l2_ctrl_vp8_frame_header *hdr; + const struct v4l2_ctrl_vp8_frame *hdr; - hdr = hantro_get_ctrl(ctx, v4l2_cid_mpeg_video_vp8_frame_header); + hdr = hantro_get_ctrl(ctx, v4l2_cid_mpeg_video_vp8_frame); - if (!(hdr->flags & v4l2_vp8_frame_header_flag_mb_no_skip_coeff)) + if (!(hdr->flags & v4l2_vp8_frame_flag_mb_no_skip_coeff)) - if (hdr->lf_header.level == 0) + if (hdr->lf.level == 0) diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.c b/drivers/staging/media/sunxi/cedrus/cedrus.c --- a/drivers/staging/media/sunxi/cedrus/cedrus.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus.c - .id = v4l2_cid_mpeg_video_vp8_frame_header, + .id = v4l2_cid_mpeg_video_vp8_frame, diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.h b/drivers/staging/media/sunxi/cedrus/cedrus.h --- a/drivers/staging/media/sunxi/cedrus/cedrus.h +++ b/drivers/staging/media/sunxi/cedrus/cedrus.h - const struct v4l2_ctrl_vp8_frame_header *frame_params; + const struct v4l2_ctrl_vp8_frame *frame_params; diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_dec.c b/drivers/staging/media/sunxi/cedrus/cedrus_dec.c --- a/drivers/staging/media/sunxi/cedrus/cedrus_dec.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus_dec.c - v4l2_cid_mpeg_video_vp8_frame_header); + v4l2_cid_mpeg_video_vp8_frame); diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_vp8.c b/drivers/staging/media/sunxi/cedrus/cedrus_vp8.c --- a/drivers/staging/media/sunxi/cedrus/cedrus_vp8.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus_vp8.c - const struct v4l2_ctrl_vp8_frame_header *slice) + const struct v4l2_ctrl_vp8_frame *slice) -static void cedrus_vp8_update_probs(const struct v4l2_ctrl_vp8_frame_header *slice, +static void cedrus_vp8_update_probs(const struct v4l2_ctrl_vp8_frame *slice, - memcpy(&prob_table[0x1008], slice->entropy_header.y_mode_probs, - sizeof(slice->entropy_header.y_mode_probs)); - memcpy(&prob_table[0x1010], slice->entropy_header.uv_mode_probs, - sizeof(slice->entropy_header.uv_mode_probs)); + memcpy(&prob_table[0x1008], slice->entropy.y_mode_probs, + sizeof(slice->entropy.y_mode_probs)); + memcpy(&prob_table[0x1010], slice->entropy.uv_mode_probs, + sizeof(slice->entropy.uv_mode_probs)); - memcpy(&prob_table[0x1018], slice->segment_header.segment_probs, - sizeof(slice->segment_header.segment_probs)); + memcpy(&prob_table[0x1018], slice->segment.segment_probs, + sizeof(slice->segment.segment_probs)); - memcpy(&prob_table[0x1020], slice->entropy_header.mv_probs[0], + memcpy(&prob_table[0x1020], slice->entropy.mv_probs[0], - memcpy(&prob_table[0x1040], slice->entropy_header.mv_probs[1], + memcpy(&prob_table[0x1040], slice->entropy.mv_probs[1], - slice->entropy_header.coeff_probs[i][j][k], 11); + slice->entropy.coeff_probs[i][j][k], 11); - const struct v4l2_ctrl_vp8_frame_header *slice = run->vp8.frame_params; + const struct v4l2_ctrl_vp8_frame *slice = run->vp8.frame_params; - if (slice->segment_header.flags & v4l2_vp8_segment_header_flag_update_map) + if (slice->segment.flags & v4l2_vp8_segment_flag_update_map) - if (!(slice->segment_header.flags & v4l2_vp8_segment_header_flag_delta_value_mode)) + if (!(slice->segment.flags & v4l2_vp8_segment_flag_delta_value_mode)) - if (slice->segment_header.flags & v4l2_vp8_segment_header_flag_enabled) + if (slice->segment.flags & v4l2_vp8_segment_flag_enabled) - reg |= ve_vp8_pps_sharpness_level(slice->lf_header.sharpness_level); - if (slice->lf_header.flags & v4l2_vp8_lf_filter_type_simple) + reg |= ve_vp8_pps_sharpness_level(slice->lf.sharpness_level); + if (slice->lf.flags & v4l2_vp8_lf_filter_type_simple) - reg |= ve_vp8_pps_loop_filter_level(slice->lf_header.level); - if (slice->lf_header.flags & v4l2_vp8_lf_header_adj_enable) + reg |= ve_vp8_pps_loop_filter_level(slice->lf.level); + if (slice->lf.flags & v4l2_vp8_lf_adj_enable) - if (slice->lf_header.flags & v4l2_vp8_lf_header_delta_update) + if (slice->lf.flags & v4l2_vp8_lf_delta_update) - if (slice->flags & v4l2_vp8_frame_header_flag_mb_no_skip_coeff) + if (slice->flags & v4l2_vp8_frame_flag_mb_no_skip_coeff) - if (slice->flags & v4l2_vp8_frame_header_flag_sign_bias_golden) + if (slice->flags & v4l2_vp8_frame_flag_sign_bias_golden) - if (slice->flags & v4l2_vp8_frame_header_flag_sign_bias_alt) + if (slice->flags & v4l2_vp8_frame_flag_sign_bias_alt) - if (!(slice->flags & v4l2_vp8_frame_header_flag_key_frame)) + if (!(slice->flags & v4l2_vp8_frame_flag_key_frame)) - reg |= ve_vp8_qp_index_delta_uvac(slice->quant_header.uv_ac_delta); - reg |= ve_vp8_qp_index_delta_uvdc(slice->quant_header.uv_dc_delta); - reg |= ve_vp8_qp_index_delta_y2ac(slice->quant_header.y2_ac_delta); - reg |= ve_vp8_qp_index_delta_y2dc(slice->quant_header.y2_dc_delta); - reg |= ve_vp8_qp_index_delta_y1dc(slice->quant_header.y_dc_delta); - reg |= ve_vp8_qp_index_delta_base_qindex(slice->quant_header.y_ac_qi); + reg |= ve_vp8_qp_index_delta_uvac(slice->quant.uv_ac_delta); + reg |= ve_vp8_qp_index_delta_uvdc(slice->quant.uv_dc_delta); + reg |= ve_vp8_qp_index_delta_y2ac(slice->quant.y2_ac_delta); + reg |= ve_vp8_qp_index_delta_y2dc(slice->quant.y2_dc_delta); + reg |= ve_vp8_qp_index_delta_y1dc(slice->quant.y_dc_delta); + reg |= ve_vp8_qp_index_delta_base_qindex(slice->quant.y_ac_qi); - reg |= ve_vp8_segment3(slice->segment_header.quant_update[3]); - reg |= ve_vp8_segment2(slice->segment_header.quant_update[2]); - reg |= ve_vp8_segment1(slice->segment_header.quant_update[1]); - reg |= ve_vp8_segment0(slice->segment_header.quant_update[0]); + reg |= ve_vp8_segment3(slice->segment.quant_update[3]); + reg |= ve_vp8_segment2(slice->segment.quant_update[2]); + reg |= ve_vp8_segment1(slice->segment.quant_update[1]); + reg |= ve_vp8_segment0(slice->segment.quant_update[0]); - reg |= ve_vp8_segment3(slice->segment_header.lf_update[3]); - reg |= ve_vp8_segment2(slice->segment_header.lf_update[2]); - reg |= ve_vp8_segment1(slice->segment_header.lf_update[1]); - reg |= ve_vp8_segment0(slice->segment_header.lf_update[0]); + reg |= ve_vp8_segment3(slice->segment.lf_update[3]); + reg |= ve_vp8_segment2(slice->segment.lf_update[2]); + reg |= ve_vp8_segment1(slice->segment.lf_update[1]); + reg |= ve_vp8_segment0(slice->segment.lf_update[0]); - reg |= ve_vp8_lf_delta3(slice->lf_header.ref_frm_delta[3]); - reg |= ve_vp8_lf_delta2(slice->lf_header.ref_frm_delta[2]); - reg |= ve_vp8_lf_delta1(slice->lf_header.ref_frm_delta[1]); - reg |= ve_vp8_lf_delta0(slice->lf_header.ref_frm_delta[0]); + reg |= ve_vp8_lf_delta3(slice->lf.ref_frm_delta[3]); + reg |= ve_vp8_lf_delta2(slice->lf.ref_frm_delta[2]); + reg |= ve_vp8_lf_delta1(slice->lf.ref_frm_delta[1]); + reg |= ve_vp8_lf_delta0(slice->lf.ref_frm_delta[0]); - reg |= ve_vp8_lf_delta3(slice->lf_header.mb_mode_delta[3]); - reg |= ve_vp8_lf_delta2(slice->lf_header.mb_mode_delta[2]); - reg |= ve_vp8_lf_delta1(slice->lf_header.mb_mode_delta[1]); - reg |= ve_vp8_lf_delta0(slice->lf_header.mb_mode_delta[0]); + reg |= ve_vp8_lf_delta3(slice->lf.mb_mode_delta[3]); + reg |= ve_vp8_lf_delta2(slice->lf.mb_mode_delta[2]); + reg |= ve_vp8_lf_delta1(slice->lf.mb_mode_delta[1]); + reg |= ve_vp8_lf_delta0(slice->lf.mb_mode_delta[0]); - if (slice->lf_header.level) { + if (slice->lf.level) { - !!(slice->lf_header.flags & v4l2_vp8_lf_filter_type_simple); + !!(slice->lf.flags & v4l2_vp8_lf_filter_type_simple); - slice->lf_header.sharpness_level; + slice->lf.sharpness_level; diff --git a/include/media/v4l2-ctrls.h b/include/media/v4l2-ctrls.h --- a/include/media/v4l2-ctrls.h +++ b/include/media/v4l2-ctrls.h - * @p_vp8_frame_header: pointer to a vp8 frame header structure. + * @p_vp8_frame: pointer to a vp8 frame params structure. - struct v4l2_ctrl_vp8_frame_header *p_vp8_frame_header; + struct v4l2_ctrl_vp8_frame *p_vp8_frame; diff --git a/include/media/vp8-ctrls.h b/include/media/vp8-ctrls.h --- a/include/media/vp8-ctrls.h +++ b/include/media/vp8-ctrls.h -#define v4l2_cid_mpeg_video_vp8_frame_header (v4l2_cid_codec_base + 2000) -#define v4l2_ctrl_type_vp8_frame_header 0x301 +#define v4l2_cid_mpeg_video_vp8_frame (v4l2_cid_codec_base + 2000) +#define v4l2_ctrl_type_vp8_frame 0x301 -#define v4l2_vp8_segment_header_flag_enabled 0x01 -#define v4l2_vp8_segment_header_flag_update_map 0x02 -#define v4l2_vp8_segment_header_flag_update_feature_data 0x04 -#define v4l2_vp8_segment_header_flag_delta_value_mode 0x08 +#define v4l2_vp8_segment_flag_enabled 0x01 +#define v4l2_vp8_segment_flag_update_map 0x02 +#define v4l2_vp8_segment_flag_update_feature_data 0x04 +#define v4l2_vp8_segment_flag_delta_value_mode 0x08 -struct v4l2_vp8_segment_header { +struct v4l2_vp8_segment { -#define v4l2_vp8_lf_header_adj_enable 0x01 -#define v4l2_vp8_lf_header_delta_update 0x02 +#define v4l2_vp8_lf_adj_enable 0x01 +#define v4l2_vp8_lf_delta_update 0x02 -struct v4l2_vp8_loopfilter_header { +struct v4l2_vp8_loopfilter { -struct v4l2_vp8_quantization_header { +struct v4l2_vp8_quantization { -struct v4l2_vp8_entropy_header { +struct v4l2_vp8_entropy { -#define v4l2_vp8_frame_header_flag_key_frame 0x01 -#define v4l2_vp8_frame_header_flag_experimental 0x02 -#define v4l2_vp8_frame_header_flag_show_frame 0x04 -#define v4l2_vp8_frame_header_flag_mb_no_skip_coeff 0x08 -#define v4l2_vp8_frame_header_flag_sign_bias_golden 0x10 -#define v4l2_vp8_frame_header_flag_sign_bias_alt 0x20 +#define v4l2_vp8_frame_flag_key_frame 0x01 +#define v4l2_vp8_frame_flag_experimental 0x02 +#define v4l2_vp8_frame_flag_show_frame 0x04 +#define v4l2_vp8_frame_flag_mb_no_skip_coeff 0x08 +#define v4l2_vp8_frame_flag_sign_bias_golden 0x10 +#define v4l2_vp8_frame_flag_sign_bias_alt 0x20 - (!!((hdr)->flags & v4l2_vp8_frame_header_flag_key_frame)) + (!!((hdr)->flags & v4l2_vp8_frame_flag_key_frame)) -struct v4l2_ctrl_vp8_frame_header { - struct v4l2_vp8_segment_header segment_header; - struct v4l2_vp8_loopfilter_header lf_header; - struct v4l2_vp8_quantization_header quant_header; - struct v4l2_vp8_entropy_header entropy_header; +struct v4l2_ctrl_vp8_frame { + struct v4l2_vp8_segment segment; + struct v4l2_vp8_loopfilter lf; + struct v4l2_vp8_quantization quant; + struct v4l2_vp8_entropy entropy;
|
TV tuners, webcams, video capturers
|
d04c114e806f93135e3584bb7016aefa414322fb
|
ezequiel garcia
|
drivers
|
media
|
cedrus, hantro, media, sunxi, v4l, v4l2-core
|
media: uapi: vp8: rename v4l2_vp8_loopfilter to v4l2_vp8_loop_filter
|
rename to struct v4l2_vp8_loop_filter, which is closer to the vp8 syntax. this change is only cosmetics, but since this api is exposed to userspace, it's worth the trouble to get it consistent.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
v4l2 stateless vp8 de-staging
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['h', 'c', 'rst']
| 4
| 10
| 10
|
--- diff --git a/documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/documentation/userspace-api/media/v4l/ext-ctrls-codec.rst --- a/documentation/userspace-api/media/v4l/ext-ctrls-codec.rst +++ b/documentation/userspace-api/media/v4l/ext-ctrls-codec.rst - ''segment'' - structure with segment-based adjustments metadata. - * - struct :c:type:'v4l2_vp8_loopfilter' + * - struct :c:type:'v4l2_vp8_loop_filter' - ''lf'' - structure with loop filter level adjustments metadata. -.. c:type:: v4l2_vp8_loopfilter +.. c:type:: v4l2_vp8_loop_filter -.. flat-table:: struct v4l2_vp8_loopfilter +.. flat-table:: struct v4l2_vp8_loop_filter - applications and drivers must set this to zero. - ''flags'' - - see :ref:'loopfilter flags <vp8_loopfilter_flags>' + - see :ref:'loop filter flags <vp8_loop_filter_flags>' -.. _vp8_loopfilter_flags: +.. _vp8_loop_filter_flags: -''loopfilter flags'' +''loop filter flags'' diff --git a/drivers/staging/media/hantro/hantro_g1_vp8_dec.c b/drivers/staging/media/hantro/hantro_g1_vp8_dec.c --- a/drivers/staging/media/hantro/hantro_g1_vp8_dec.c +++ b/drivers/staging/media/hantro/hantro_g1_vp8_dec.c - const struct v4l2_vp8_loopfilter *lf = &hdr->lf; + const struct v4l2_vp8_loop_filter *lf = &hdr->lf; diff --git a/drivers/staging/media/hantro/rk3399_vpu_hw_vp8_dec.c b/drivers/staging/media/hantro/rk3399_vpu_hw_vp8_dec.c --- a/drivers/staging/media/hantro/rk3399_vpu_hw_vp8_dec.c +++ b/drivers/staging/media/hantro/rk3399_vpu_hw_vp8_dec.c - const struct v4l2_vp8_loopfilter *lf = &hdr->lf; + const struct v4l2_vp8_loop_filter *lf = &hdr->lf; diff --git a/include/media/vp8-ctrls.h b/include/media/vp8-ctrls.h --- a/include/media/vp8-ctrls.h +++ b/include/media/vp8-ctrls.h -struct v4l2_vp8_loopfilter { +struct v4l2_vp8_loop_filter { - struct v4l2_vp8_loopfilter lf; + struct v4l2_vp8_loop_filter lf;
|
TV tuners, webcams, video capturers
|
643a236e46d43ec8d7b4d9b35affa48b98c65df0
|
ezequiel garcia
|
documentation
|
userspace-api
|
hantro, media, v4l
|
media: uapi: vp8: add proper kernel-doc documentation
|
in preparation for making the interface public, document all the structures.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
v4l2 stateless vp8 de-staging
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['h']
| 1
| 99
| 0
|
--- diff --git a/include/media/vp8-ctrls.h b/include/media/vp8-ctrls.h --- a/include/media/vp8-ctrls.h +++ b/include/media/vp8-ctrls.h +/** + * struct v4l2_vp8_segment - vp8 segment-based adjustments parameters + * + * @quant_update: update values for the segment quantizer. + * @lf_update: update values for the loop filter level. + * @segment_probs: branch probabilities of the segment_id decoding tree. + * @padding: padding field. should be zeroed by applications. + * @flags: see v4l2_vp8_segment_flag_{}. + * + * this structure contains segment-based adjustments related parameters. + * see the 'update_segmentation()' part of the frame header syntax, + * and section '9.3. segment-based adjustments' of the vp8 specification + * for more details. + */ + +/** + * struct v4l2_vp8_loop_filter - vp8 loop filter parameters + * + * @ref_frm_delta: reference frame signed delta values. + * @mb_mode_delta: mb prediction mode signed delta values. + * @sharpness_level: matches sharpness_level syntax element. + * @level: matches loop_filter_level syntax element. + * @padding: padding field. should be zeroed by applications. + * @flags: see v4l2_vp8_lf_flag_{}. + * + * this structure contains loop filter related parameters. + * see the 'mb_lf_adjustments()' part of the frame header syntax, + * and section '9.4. loop filter type and levels' of the vp8 specification + * for more details. + */ +/** + * struct v4l2_vp8_quantization - vp8 quantizattion indices + * + * @y_ac_qi: luma ac coefficient table index. + * @y_dc_delta: luma dc delta vaue. + * @y2_dc_delta: y2 block dc delta value. + * @y2_ac_delta: y2 block ac delta value. + * @uv_dc_delta: chroma dc delta value. + * @uv_ac_delta: chroma ac delta value. + * @padding: padding field. should be zeroed by applications. + + * this structure contains the quantization indices present + * in 'quant_indices()' part of the frame header syntax. + * see section '9.6. dequantization indices' of the vp8 specification + * for more details. + */ + +/** + * struct v4l2_vp8_entropy - vp8 update probabilities + * + * @coeff_probs: coefficient probability update values. + * @y_mode_probs: luma intra-prediction probabilities. + * @uv_mode_probs: chroma intra-prediction probabilities. + * @mv_probs: mv decoding probability. + * @padding: padding field. should be zeroed by applications. + * + * this structure contains the update probabilities present in + * 'token_prob_update()' and 'mv_prob_update()' part of the frame header. + * see section '17.2. probability updates' of the vp8 specification + * for more details. + */ +/** + * struct v4l2_vp8_entropy_coder_state - vp8 boolean coder state + * + * @range: coder state value for "range" + * @value: coder state value for "value" + * @bit_count: number of bits left in range "value". + * @padding: padding field. should be zeroed by applications. + * + * this structure contains the state for the boolean coder, as + * explained in section '7. boolean entropy decoder' of the vp8 specification. + */ +/** + * struct v4l2_vp8_frame - vp8 frame parameters + * + * @seg: segmentation parameters. see &v4l2_vp8_segment for more details + * @lf: loop filter parameters. see &v4l2_vp8_loop_filter for more details + * @quant: quantization parameters. see &v4l2_vp8_quantization for more details + * @probs: probabilities. see &v4l2_vp9_probabilities for more details + * @width: frame width. + * @height: frame height. + * @horizontal_scale: horizontal scaling factor. + * @vertical_scale: vertical scaling factor. + * @version: bitstream version. + * @prob_skip_false: frame header syntax element. + * @prob_intra: frame header syntax element. + * @prob_last: frame header syntax element. + * @prob_gf: frame header syntax element. + * @num_dct_parts: number of dct coefficients partitions. + * @first_part_size: size of the first partition, i.e. the control partition. + * @first_part_header_bits: size in bits of the first partition header portion. + * @dct_part_sizes: dct coefficients sizes. + * @last_frame_ts: "last" reference buffer timestamp. + * the timestamp refers to the timestamp field in struct v4l2_buffer. + * use v4l2_timeval_to_ns() to convert the struct timeval to a __u64. + * @golden_frame_ts: "golden" reference buffer timestamp. + * @alt_frame_ts: "alt" reference buffer timestamp. + * @flags: see v4l2_vp8_frame_flag_{}. + */
|
TV tuners, webcams, video capturers
|
dacd59454449cbce47539a1abed266c659e8ebab
|
ezequiel garcia
|
include
|
media
| |
media: uapi: move parsed vp8 pixel format out of staging
|
since we are ready to stabilize the vp8 stateless api, move the parsed vp8 pixel format.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
v4l2 stateless vp8 de-staging
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['h', 'rst']
| 3
| 1
| 7
|
--- diff --git a/documentation/userspace-api/media/v4l/pixfmt-compressed.rst b/documentation/userspace-api/media/v4l/pixfmt-compressed.rst --- a/documentation/userspace-api/media/v4l/pixfmt-compressed.rst +++ b/documentation/userspace-api/media/v4l/pixfmt-compressed.rst - .. note:: - - this format is not yet part of the public kernel api and it - is expected to change. - - ''v4l2_pix_fmt_vp9'' diff --git a/include/media/vp8-ctrls.h b/include/media/vp8-ctrls.h --- a/include/media/vp8-ctrls.h +++ b/include/media/vp8-ctrls.h -#define v4l2_pix_fmt_vp8_frame v4l2_fourcc('v', 'p', '8', 'f') - diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h --- a/include/uapi/linux/videodev2.h +++ b/include/uapi/linux/videodev2.h +#define v4l2_pix_fmt_vp8_frame v4l2_fourcc('v', 'p', '8', 'f') /* vp8 parsed frame */
|
TV tuners, webcams, video capturers
|
1fb03333eb926e315f9850098b5a3361832f07cb
|
ezequiel garcia
|
documentation
|
userspace-api
|
linux, media, v4l
|
media: uapi: move the vp8 stateless control type out of staging
|
move the vp8 stateless control types out of staging, and re-number it to avoid any confusion.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
v4l2 stateless vp8 de-staging
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['h']
| 2
| 2
| 1
|
--- diff --git a/include/media/vp8-ctrls.h b/include/media/vp8-ctrls.h --- a/include/media/vp8-ctrls.h +++ b/include/media/vp8-ctrls.h -#define v4l2_ctrl_type_vp8_frame 0x301 diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h --- a/include/uapi/linux/videodev2.h +++ b/include/uapi/linux/videodev2.h + + v4l2_ctrl_type_vp8_frame = 0x0240,
|
TV tuners, webcams, video capturers
|
e74b504a87c110071376438564a6f7a351a215bf
|
ezequiel garcia
|
include
|
uapi
|
linux
|
media: controls: log vp8 stateless control in .std_log
|
simply print the type of the control.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
v4l2 stateless vp8 de-staging
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['c']
| 1
| 3
| 0
|
--- diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c --- a/drivers/media/v4l2-core/v4l2-ctrls.c +++ b/drivers/media/v4l2-core/v4l2-ctrls.c + case v4l2_ctrl_type_vp8_frame: + pr_cont("vp8_frame"); + break;
|
TV tuners, webcams, video capturers
|
45c79296d736ec30ed80ddd32e2f19da220691b1
|
ezequiel garcia
|
drivers
|
media
|
v4l2-core
|
media: vp8: rename v4l2 vp8 specific macro to v4l2_vp8_
|
before we move the vp8 controls to a stable public header, rename this macro so it's clearly v4l2-specific.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
v4l2 stateless vp8 de-staging
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['h', 'c']
| 4
| 13
| 13
|
--- diff --git a/drivers/staging/media/hantro/hantro_g1_vp8_dec.c b/drivers/staging/media/hantro/hantro_g1_vp8_dec.c --- a/drivers/staging/media/hantro/hantro_g1_vp8_dec.c +++ b/drivers/staging/media/hantro/hantro_g1_vp8_dec.c - u32 first_part_offset = vp8_frame_is_key_frame(hdr) ? 10 : 3; + u32 first_part_offset = v4l2_vp8_frame_is_key_frame(hdr) ? 10 : 3; - if (vp8_frame_is_key_frame(hdr) && ctx->vp8_dec.segment_map.cpu) + if (v4l2_vp8_frame_is_key_frame(hdr) && ctx->vp8_dec.segment_map.cpu) - if (!vp8_frame_is_key_frame(hdr)) + if (!v4l2_vp8_frame_is_key_frame(hdr)) diff --git a/drivers/staging/media/hantro/rk3399_vpu_hw_vp8_dec.c b/drivers/staging/media/hantro/rk3399_vpu_hw_vp8_dec.c --- a/drivers/staging/media/hantro/rk3399_vpu_hw_vp8_dec.c +++ b/drivers/staging/media/hantro/rk3399_vpu_hw_vp8_dec.c - u32 first_part_offset = vp8_frame_is_key_frame(hdr) ? 10 : 3; + u32 first_part_offset = v4l2_vp8_frame_is_key_frame(hdr) ? 10 : 3; - if (vp8_frame_is_key_frame(hdr) && ctx->vp8_dec.segment_map.cpu) + if (v4l2_vp8_frame_is_key_frame(hdr) && ctx->vp8_dec.segment_map.cpu) - if (!vp8_frame_is_key_frame(hdr)) + if (!v4l2_vp8_frame_is_key_frame(hdr)) diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_vp8.c b/drivers/staging/media/sunxi/cedrus/cedrus_vp8.c --- a/drivers/staging/media/sunxi/cedrus/cedrus_vp8.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus_vp8.c - if (vp8_frame_is_key_frame(slice)) { + if (v4l2_vp8_frame_is_key_frame(slice)) { - if (!vp8_frame_is_key_frame(slice)) + if (!v4l2_vp8_frame_is_key_frame(slice)) - if (!vp8_frame_is_key_frame(slice)) + if (!v4l2_vp8_frame_is_key_frame(slice)) - if (!vp8_frame_is_key_frame(slice)) { + if (!v4l2_vp8_frame_is_key_frame(slice)) { - header_size = vp8_frame_is_key_frame(slice) ? 10 : 3; + header_size = v4l2_vp8_frame_is_key_frame(slice) ? 10 : 3; - !vp8_frame_is_key_frame(slice); + !v4l2_vp8_frame_is_key_frame(slice); diff --git a/include/media/vp8-ctrls.h b/include/media/vp8-ctrls.h --- a/include/media/vp8-ctrls.h +++ b/include/media/vp8-ctrls.h -#define vp8_frame_is_key_frame(hdr) \ +#define v4l2_vp8_frame_is_key_frame(hdr) \
|
TV tuners, webcams, video capturers
|
0c86b4bdac7eb3a6c17aa5225a7bc708047bac6a
|
ezequiel garcia
|
include
|
media
|
cedrus, hantro, media, sunxi
|
media: uapi: move vp8 stateless controls out of staging
|
until now, the vp8 v4l2 api was not exported as a public api, and only defined in a private media header (media/vp8-ctrls.h).
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
v4l2 stateless vp8 de-staging
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['h', 'c', 'exceptions', 'rst']
| 17
| 555
| 565
|
--- diff --git a/documentation/userspace-api/media/v4l/ext-ctrls-codec-stateless.rst b/documentation/userspace-api/media/v4l/ext-ctrls-codec-stateless.rst --- a/documentation/userspace-api/media/v4l/ext-ctrls-codec-stateless.rst +++ b/documentation/userspace-api/media/v4l/ext-ctrls-codec-stateless.rst + +.. _v4l2-codec-stateless-vp8: + +''v4l2_cid_stateless_vp8_frame (struct)'' + specifies the frame parameters for the associated vp8 parsed frame data. + this includes the necessary parameters for + configuring a stateless hardware decoding pipeline for vp8. + the bitstream parameters are defined according to :ref:'vp8'. + +.. c:type:: v4l2_ctrl_vp8_frame + +.. raw:: latex + + \small + +.. tabularcolumns:: |p{7.0cm}|p{4.6cm}|p{5.7cm}| + +.. cssclass:: longtable + +.. flat-table:: struct v4l2_ctrl_vp8_frame + :header-rows: 0 + :stub-columns: 0 + :widths: 1 1 2 + + * - struct :c:type:'v4l2_vp8_segment' + - ''segment'' + - structure with segment-based adjustments metadata. + * - struct :c:type:'v4l2_vp8_loop_filter' + - ''lf'' + - structure with loop filter level adjustments metadata. + * - struct :c:type:'v4l2_vp8_quantization' + - ''quant'' + - structure with vp8 dequantization indices metadata. + * - struct :c:type:'v4l2_vp8_entropy' + - ''entropy'' + - structure with vp8 entropy coder probabilities metadata. + * - struct :c:type:'v4l2_vp8_entropy_coder_state' + - ''coder_state'' + - structure with vp8 entropy coder state. + * - __u16 + - ''width'' + - the width of the frame. must be set for all frames. + * - __u16 + - ''height'' + - the height of the frame. must be set for all frames. + * - __u8 + - ''horizontal_scale'' + - horizontal scaling factor. + * - __u8 + - ''vertical_scaling factor'' + - vertical scale. + * - __u8 + - ''version'' + - bitstream version. + * - __u8 + - ''prob_skip_false'' + - indicates the probability that the macroblock is not skipped. + * - __u8 + - ''prob_intra'' + - indicates the probability that a macroblock is intra-predicted. + * - __u8 + - ''prob_last'' + - indicates the probability that the last reference frame is used + for inter-prediction + * - __u8 + - ''prob_gf'' + - indicates the probability that the golden reference frame is used + for inter-prediction + * - __u8 + - ''num_dct_parts'' + - number of dct coefficients partitions. must be one of: 1, 2, 4, or 8. + * - __u32 + - ''first_part_size'' + - size of the first partition, i.e. the control partition. + * - __u32 + - ''first_part_header_bits'' + - size in bits of the first partition header portion. + * - __u32 + - ''dct_part_sizes[8]'' + - dct coefficients sizes. + * - __u64 + - ''last_frame_ts'' + - timestamp for the v4l2 capture buffer to use as last reference frame, used + with inter-coded frames. the timestamp refers to the ''timestamp'' field in + struct :c:type:'v4l2_buffer'. use the :c:func:'v4l2_timeval_to_ns()' + function to convert the struct :c:type:'timeval' in struct + :c:type:'v4l2_buffer' to a __u64. + * - __u64 + - ''golden_frame_ts'' + - timestamp for the v4l2 capture buffer to use as last reference frame, used + with inter-coded frames. the timestamp refers to the ''timestamp'' field in + struct :c:type:'v4l2_buffer'. use the :c:func:'v4l2_timeval_to_ns()' + function to convert the struct :c:type:'timeval' in struct + :c:type:'v4l2_buffer' to a __u64. + * - __u64 + - ''alt_frame_ts'' + - timestamp for the v4l2 capture buffer to use as alternate reference frame, used + with inter-coded frames. the timestamp refers to the ''timestamp'' field in + struct :c:type:'v4l2_buffer'. use the :c:func:'v4l2_timeval_to_ns()' + function to convert the struct :c:type:'timeval' in struct + :c:type:'v4l2_buffer' to a __u64. + * - __u64 + - ''flags'' + - see :ref:'frame flags <vp8_frame_flags>' + +.. raw:: latex + + ormalsize + +.. _vp8_frame_flags: + +''frame flags'' + +.. tabularcolumns:: |p{9.8cm}|p{0.8cm}|p{6.7cm}| + +.. cssclass:: longtable + +.. flat-table:: + :header-rows: 0 + :stub-columns: 0 + :widths: 1 1 2 + + * - ''v4l2_vp8_frame_flag_key_frame'' + - 0x01 + - indicates if the frame is a key frame. + * - ''v4l2_vp8_frame_flag_experimental'' + - 0x02 + - experimental bitstream. + * - ''v4l2_vp8_frame_flag_show_frame'' + - 0x04 + - show frame flag, indicates if the frame is for display. + * - ''v4l2_vp8_frame_flag_mb_no_skip_coeff'' + - 0x08 + - enable/disable skipping of macroblocks with no non-zero coefficients. + * - ''v4l2_vp8_frame_flag_sign_bias_golden'' + - 0x10 + - sign of motion vectors when the golden frame is referenced. + * - ''v4l2_vp8_frame_flag_sign_bias_alt'' + - 0x20 + - sign of motion vectors when the alt frame is referenced. + +.. c:type:: v4l2_vp8_entropy_coder_state + +.. cssclass:: longtable + +.. tabularcolumns:: |p{1.0cm}|p{2.0cm}|p{14.3cm}| + +.. flat-table:: struct v4l2_vp8_entropy_coder_state + :header-rows: 0 + :stub-columns: 0 + :widths: 1 1 2 + + * - __u8 + - ''range'' + - coder state value for "range" + * - __u8 + - ''value'' + - coder state value for "value"- + * - __u8 + - ''bit_count'' + - number of bits left. + * - __u8 + - ''padding'' + - applications and drivers must set this to zero. + +.. c:type:: v4l2_vp8_segment + +.. cssclass:: longtable + +.. tabularcolumns:: |p{1.2cm}|p{4.0cm}|p{12.1cm}| + +.. flat-table:: struct v4l2_vp8_segment + :header-rows: 0 + :stub-columns: 0 + :widths: 1 1 2 + + * - __s8 + - ''quant_update[4]'' + - signed quantizer value update. + * - __s8 + - ''lf_update[4]'' + - signed loop filter level value update. + * - __u8 + - ''segment_probs[3]'' + - segment probabilities. + * - __u8 + - ''padding'' + - applications and drivers must set this to zero. + * - __u32 + - ''flags'' + - see :ref:'segment flags <vp8_segment_flags>' + +.. _vp8_segment_flags: + +''segment flags'' + +.. raw:: latex + + \small + +.. tabularcolumns:: |p{10cm}|p{1.0cm}|p{6.3cm}| + +.. flat-table:: + :header-rows: 0 + :stub-columns: 0 + :widths: 1 1 2 + + * - ''v4l2_vp8_segment_flag_enabled'' + - 0x01 + - enable/disable segment-based adjustments. + * - ''v4l2_vp8_segment_flag_update_map'' + - 0x02 + - indicates if the macroblock segmentation map is updated in this frame. + * - ''v4l2_vp8_segment_flag_update_feature_data'' + - 0x04 + - indicates if the segment feature data is updated in this frame. + * - ''v4l2_vp8_segment_flag_delta_value_mode'' + - 0x08 + - if is set, the segment feature data mode is delta-value. + if cleared, it's absolute-value. + +.. raw:: latex + + ormalsize + +.. c:type:: v4l2_vp8_loop_filter + +.. cssclass:: longtable + +.. tabularcolumns:: |p{1.5cm}|p{3.9cm}|p{11.9cm}| + +.. flat-table:: struct v4l2_vp8_loop_filter + :header-rows: 0 + :stub-columns: 0 + :widths: 1 1 2 + + * - __s8 + - ''ref_frm_delta[4]'' + - reference adjustment (signed) delta value. + * - __s8 + - ''mb_mode_delta[4]'' + - macroblock prediction mode adjustment (signed) delta value. + * - __u8 + - ''sharpness_level'' + - sharpness level + * - __u8 + - ''level'' + - filter level + * - __u16 + - ''padding'' + - applications and drivers must set this to zero. + * - __u32 + - ''flags'' + - see :ref:'loop filter flags <vp8_loop_filter_flags>' + +.. _vp8_loop_filter_flags: + +''loop filter flags'' + +.. tabularcolumns:: |p{7.0cm}|p{1.2cm}|p{9.1cm}| + +.. flat-table:: + :header-rows: 0 + :stub-columns: 0 + :widths: 1 1 2 + + * - ''v4l2_vp8_lf_adj_enable'' + - 0x01 + - enable/disable macroblock-level loop filter adjustment. + * - ''v4l2_vp8_lf_delta_update'' + - 0x02 + - indicates if the delta values used in an adjustment are updated. + * - ''v4l2_vp8_lf_filter_type_simple'' + - 0x04 + - if set, indicates the filter type is simple. + if cleared, the filter type is normal. + +.. c:type:: v4l2_vp8_quantization + +.. tabularcolumns:: |p{1.5cm}|p{3.5cm}|p{12.3cm}| + +.. flat-table:: struct v4l2_vp8_quantization + :header-rows: 0 + :stub-columns: 0 + :widths: 1 1 2 + + * - __u8 + - ''y_ac_qi'' + - luma ac coefficient table index. + * - __s8 + - ''y_dc_delta'' + - luma dc delta vaue. + * - __s8 + - ''y2_dc_delta'' + - y2 block dc delta value. + * - __s8 + - ''y2_ac_delta'' + - y2 block ac delta value. + * - __s8 + - ''uv_dc_delta'' + - chroma dc delta value. + * - __s8 + - ''uv_ac_delta'' + - chroma ac delta value. + * - __u16 + - ''padding'' + - applications and drivers must set this to zero. + +.. c:type:: v4l2_vp8_entropy + +.. cssclass:: longtable + +.. tabularcolumns:: |p{1.5cm}|p{5.8cm}|p{10.0cm}| + +.. flat-table:: struct v4l2_vp8_entropy + :header-rows: 0 + :stub-columns: 0 + :widths: 1 1 2 + + * - __u8 + - ''coeff_probs[4][8][3][11]'' + - coefficient update probabilities. + * - __u8 + - ''y_mode_probs[4]'' + - luma mode update probabilities. + * - __u8 + - ''uv_mode_probs[3]'' + - chroma mode update probabilities. + * - __u8 + - ''mv_probs[2][19]'' + - mv decoding update probabilities. + * - __u8 + - ''padding[3]'' + - applications and drivers must set this to zero. diff --git a/documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/documentation/userspace-api/media/v4l/ext-ctrls-codec.rst --- a/documentation/userspace-api/media/v4l/ext-ctrls-codec.rst +++ b/documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -.. _v4l2-mpeg-vp8: - -''v4l2_cid_mpeg_video_vp8_frame (struct)'' - specifies the frame parameters for the associated vp8 parsed frame data. - this includes the necessary parameters for - configuring a stateless hardware decoding pipeline for vp8. - the bitstream parameters are defined according to :ref:'vp8'. - - .. note:: - - this compound control is not yet part of the public kernel api and - it is expected to change. - -.. c:type:: v4l2_ctrl_vp8_frame - -.. raw:: latex - - \small - -.. tabularcolumns:: |p{7.0cm}|p{4.6cm}|p{5.7cm}| - -.. cssclass:: longtable - -.. flat-table:: struct v4l2_ctrl_vp8_frame - :header-rows: 0 - :stub-columns: 0 - :widths: 1 1 2 - - * - struct :c:type:'v4l2_vp8_segment' - - ''segment'' - - structure with segment-based adjustments metadata. - * - struct :c:type:'v4l2_vp8_loop_filter' - - ''lf'' - - structure with loop filter level adjustments metadata. - * - struct :c:type:'v4l2_vp8_quantization' - - ''quant'' - - structure with vp8 dequantization indices metadata. - * - struct :c:type:'v4l2_vp8_entropy' - - ''entropy'' - - structure with vp8 entropy coder probabilities metadata. - * - struct :c:type:'v4l2_vp8_entropy_coder_state' - - ''coder_state'' - - structure with vp8 entropy coder state. - * - __u16 - - ''width'' - - the width of the frame. must be set for all frames. - * - __u16 - - ''height'' - - the height of the frame. must be set for all frames. - * - __u8 - - ''horizontal_scale'' - - horizontal scaling factor. - * - __u8 - - ''vertical_scaling factor'' - - vertical scale. - * - __u8 - - ''version'' - - bitstream version. - * - __u8 - - ''prob_skip_false'' - - indicates the probability that the macroblock is not skipped. - * - __u8 - - ''prob_intra'' - - indicates the probability that a macroblock is intra-predicted. - * - __u8 - - ''prob_last'' - - indicates the probability that the last reference frame is used - for inter-prediction - * - __u8 - - ''prob_gf'' - - indicates the probability that the golden reference frame is used - for inter-prediction - * - __u8 - - ''num_dct_parts'' - - number of dct coefficients partitions. must be one of: 1, 2, 4, or 8. - * - __u32 - - ''first_part_size'' - - size of the first partition, i.e. the control partition. - * - __u32 - - ''first_part_header_bits'' - - size in bits of the first partition header portion. - * - __u32 - - ''dct_part_sizes[8]'' - - dct coefficients sizes. - * - __u64 - - ''last_frame_ts'' - - timestamp for the v4l2 capture buffer to use as last reference frame, used - with inter-coded frames. the timestamp refers to the ''timestamp'' field in - struct :c:type:'v4l2_buffer'. use the :c:func:'v4l2_timeval_to_ns()' - function to convert the struct :c:type:'timeval' in struct - :c:type:'v4l2_buffer' to a __u64. - * - __u64 - - ''golden_frame_ts'' - - timestamp for the v4l2 capture buffer to use as last reference frame, used - with inter-coded frames. the timestamp refers to the ''timestamp'' field in - struct :c:type:'v4l2_buffer'. use the :c:func:'v4l2_timeval_to_ns()' - function to convert the struct :c:type:'timeval' in struct - :c:type:'v4l2_buffer' to a __u64. - * - __u64 - - ''alt_frame_ts'' - - timestamp for the v4l2 capture buffer to use as alternate reference frame, used - with inter-coded frames. the timestamp refers to the ''timestamp'' field in - struct :c:type:'v4l2_buffer'. use the :c:func:'v4l2_timeval_to_ns()' - function to convert the struct :c:type:'timeval' in struct - :c:type:'v4l2_buffer' to a __u64. - * - __u64 - - ''flags'' - - see :ref:'frame flags <vp8_frame_flags>' - -.. raw:: latex - - ormalsize - -.. _vp8_frame_flags: - -''frame flags'' - -.. tabularcolumns:: |p{9.8cm}|p{0.8cm}|p{6.7cm}| - -.. cssclass:: longtable - -.. flat-table:: - :header-rows: 0 - :stub-columns: 0 - :widths: 1 1 2 - - * - ''v4l2_vp8_frame_flag_key_frame'' - - 0x01 - - indicates if the frame is a key frame. - * - ''v4l2_vp8_frame_flag_experimental'' - - 0x02 - - experimental bitstream. - * - ''v4l2_vp8_frame_flag_show_frame'' - - 0x04 - - show frame flag, indicates if the frame is for display. - * - ''v4l2_vp8_frame_flag_mb_no_skip_coeff'' - - 0x08 - - enable/disable skipping of macroblocks with no non-zero coefficients. - * - ''v4l2_vp8_frame_flag_sign_bias_golden'' - - 0x10 - - sign of motion vectors when the golden frame is referenced. - * - ''v4l2_vp8_frame_flag_sign_bias_alt'' - - 0x20 - - sign of motion vectors when the alt frame is referenced. - -.. c:type:: v4l2_vp8_entropy_coder_state - -.. cssclass:: longtable - -.. tabularcolumns:: |p{1.0cm}|p{2.0cm}|p{14.3cm}| - -.. flat-table:: struct v4l2_vp8_entropy_coder_state - :header-rows: 0 - :stub-columns: 0 - :widths: 1 1 2 - - * - __u8 - - ''range'' - - - * - __u8 - - ''value'' - - - * - __u8 - - ''bit_count'' - - - * - __u8 - - ''padding'' - - applications and drivers must set this to zero. - -.. c:type:: v4l2_vp8_segment - -.. cssclass:: longtable - -.. tabularcolumns:: |p{1.2cm}|p{4.0cm}|p{12.1cm}| - -.. flat-table:: struct v4l2_vp8_segment - :header-rows: 0 - :stub-columns: 0 - :widths: 1 1 2 - - * - __s8 - - ''quant_update[4]'' - - signed quantizer value update. - * - __s8 - - ''lf_update[4]'' - - signed loop filter level value update. - * - __u8 - - ''segment_probs[3]'' - - segment probabilities. - * - __u8 - - ''padding'' - - applications and drivers must set this to zero. - * - __u32 - - ''flags'' - - see :ref:'segment flags <vp8_segment_flags>' - -.. _vp8_segment_flags: - -''segment flags'' - -.. raw:: latex - - \small - -.. tabularcolumns:: |p{10cm}|p{1.0cm}|p{6.3cm}| - -.. flat-table:: - :header-rows: 0 - :stub-columns: 0 - :widths: 1 1 2 - - * - ''v4l2_vp8_segment_flag_enabled'' - - 0x01 - - enable/disable segment-based adjustments. - * - ''v4l2_vp8_segment_flag_update_map'' - - 0x02 - - indicates if the macroblock segmentation map is updated in this frame. - * - ''v4l2_vp8_segment_flag_update_feature_data'' - - 0x04 - - indicates if the segment feature data is updated in this frame. - * - ''v4l2_vp8_segment_flag_delta_value_mode'' - - 0x08 - - if is set, the segment feature data mode is delta-value. - if cleared, it's absolute-value. - -.. raw:: latex - - ormalsize - -.. c:type:: v4l2_vp8_loop_filter - -.. cssclass:: longtable - -.. tabularcolumns:: |p{1.5cm}|p{3.9cm}|p{11.9cm}| - -.. flat-table:: struct v4l2_vp8_loop_filter - :header-rows: 0 - :stub-columns: 0 - :widths: 1 1 2 - - * - __s8 - - ''ref_frm_delta[4]'' - - reference adjustment (signed) delta value. - * - __s8 - - ''mb_mode_delta[4]'' - - macroblock prediction mode adjustment (signed) delta value. - * - __u8 - - ''sharpness_level'' - - sharpness level - * - __u8 - - ''level'' - - filter level - * - __u16 - - ''padding'' - - applications and drivers must set this to zero. - * - __u32 - - ''flags'' - - see :ref:'loop filter flags <vp8_loop_filter_flags>' - -.. _vp8_loop_filter_flags: - -''loop filter flags'' - -.. tabularcolumns:: |p{7.0cm}|p{1.2cm}|p{9.1cm}| - -.. flat-table:: - :header-rows: 0 - :stub-columns: 0 - :widths: 1 1 2 - - * - ''v4l2_vp8_lf_adj_enable'' - - 0x01 - - enable/disable macroblock-level loop filter adjustment. - * - ''v4l2_vp8_lf_delta_update'' - - 0x02 - - indicates if the delta values used in an adjustment are updated. - * - ''v4l2_vp8_lf_filter_type_simple'' - - 0x04 - - if set, indicates the filter type is simple. - if cleared, the filter type is normal. - -.. c:type:: v4l2_vp8_quantization - -.. tabularcolumns:: |p{1.5cm}|p{3.5cm}|p{12.3cm}| - -.. flat-table:: struct v4l2_vp8_quantization - :header-rows: 0 - :stub-columns: 0 - :widths: 1 1 2 - - * - __u8 - - ''y_ac_qi'' - - luma ac coefficient table index. - * - __s8 - - ''y_dc_delta'' - - luma dc delta vaue. - * - __s8 - - ''y2_dc_delta'' - - y2 block dc delta value. - * - __s8 - - ''y2_ac_delta'' - - y2 block ac delta value. - * - __s8 - - ''uv_dc_delta'' - - chroma dc delta value. - * - __s8 - - ''uv_ac_delta'' - - chroma ac delta value. - * - __u16 - - ''padding'' - - applications and drivers must set this to zero. - -.. c:type:: v4l2_vp8_entropy - -.. cssclass:: longtable - -.. tabularcolumns:: |p{1.5cm}|p{5.8cm}|p{10.0cm}| - -.. flat-table:: struct v4l2_vp8_entropy - :header-rows: 0 - :stub-columns: 0 - :widths: 1 1 2 - - * - __u8 - - ''coeff_probs[4][8][3][11]'' - - coefficient update probabilities. - * - __u8 - - ''y_mode_probs[4]'' - - luma mode update probabilities. - * - __u8 - - ''uv_mode_probs[3]'' - - chroma mode update probabilities. - * - __u8 - - ''mv_probs[2][19]'' - - mv decoding update probabilities. - * - __u8 - - ''padding[3]'' - - applications and drivers must set this to zero. - diff --git a/documentation/userspace-api/media/v4l/pixfmt-compressed.rst b/documentation/userspace-api/media/v4l/pixfmt-compressed.rst --- a/documentation/userspace-api/media/v4l/pixfmt-compressed.rst +++ b/documentation/userspace-api/media/v4l/pixfmt-compressed.rst - ''v4l2_pix_fmt_vp8_frame'' - 'vp8f' - - vp8 parsed frame, as extracted from the container. - this format is adapted for stateless video decoders that implement a - vp8 pipeline (using the :ref:'mem2mem' and :ref:'media-request-api'). + - vp8 parsed frame, including the frame header, as extracted from the container. + this format is adapted for stateless video decoders that implement an + vp8 pipeline with the :ref:'stateless_decoder'. - through the ''v4l2_cid_mpeg_video_vp8_frame'' control. - see the :ref:'associated codec control ids <v4l2-mpeg-vp8>'. + through the ''v4l2_cid_stateless_vp8_frame'' control. + see the :ref:'associated codec control ids <v4l2-codec-stateless-vp8>'. diff --git a/documentation/userspace-api/media/v4l/vidioc-g-ext-ctrls.rst b/documentation/userspace-api/media/v4l/vidioc-g-ext-ctrls.rst --- a/documentation/userspace-api/media/v4l/vidioc-g-ext-ctrls.rst +++ b/documentation/userspace-api/media/v4l/vidioc-g-ext-ctrls.rst - ''p_fwht_params'' - a pointer to a struct :c:type:'v4l2_ctrl_fwht_params'. valid if this control is + * - struct :c:type:'v4l2_ctrl_vp8_frame' * + - ''p_vp8_frame'' + - a pointer to a struct :c:type:'v4l2_ctrl_vp8_frame'. valid if this control is + of type ''v4l2_ctrl_type_vp8_frame''. - ''ptr'' - a pointer to a compound type which can be an n-dimensional array diff --git a/documentation/userspace-api/media/v4l/vidioc-queryctrl.rst b/documentation/userspace-api/media/v4l/vidioc-queryctrl.rst --- a/documentation/userspace-api/media/v4l/vidioc-queryctrl.rst +++ b/documentation/userspace-api/media/v4l/vidioc-queryctrl.rst - n/a - a struct :c:type:'v4l2_ctrl_hevc_slice_params', containing hevc + * - ''v4l2_ctrl_type_vp8_frame'' + - n/a + - n/a + - n/a + - a struct :c:type:'v4l2_ctrl_vp8_frame', containing vp8 + frame parameters for stateless video decoders. diff --git a/documentation/userspace-api/media/videodev2.h.rst.exceptions b/documentation/userspace-api/media/videodev2.h.rst.exceptions --- a/documentation/userspace-api/media/videodev2.h.rst.exceptions +++ b/documentation/userspace-api/media/videodev2.h.rst.exceptions +replace symbol v4l2_ctrl_type_vp8_frame :c:type:'v4l2_ctrl_type' diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c --- a/drivers/media/v4l2-core/v4l2-ctrls.c +++ b/drivers/media/v4l2-core/v4l2-ctrls.c - case v4l2_cid_mpeg_video_vp8_frame: return "vp8 frame parameters"; + case v4l2_cid_stateless_vp8_frame: return "vp8 frame parameters"; - case v4l2_cid_mpeg_video_vp8_frame: + case v4l2_cid_stateless_vp8_frame: diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c --- a/drivers/staging/media/hantro/hantro_drv.c +++ b/drivers/staging/media/hantro/hantro_drv.c - .id = v4l2_cid_mpeg_video_vp8_frame, + .id = v4l2_cid_stateless_vp8_frame, diff --git a/drivers/staging/media/hantro/hantro_g1_vp8_dec.c b/drivers/staging/media/hantro/hantro_g1_vp8_dec.c --- a/drivers/staging/media/hantro/hantro_g1_vp8_dec.c +++ b/drivers/staging/media/hantro/hantro_g1_vp8_dec.c -#include <media/vp8-ctrls.h> - hdr = hantro_get_ctrl(ctx, v4l2_cid_mpeg_video_vp8_frame); + hdr = hantro_get_ctrl(ctx, v4l2_cid_stateless_vp8_frame); diff --git a/drivers/staging/media/hantro/rk3399_vpu_hw_vp8_dec.c b/drivers/staging/media/hantro/rk3399_vpu_hw_vp8_dec.c --- a/drivers/staging/media/hantro/rk3399_vpu_hw_vp8_dec.c +++ b/drivers/staging/media/hantro/rk3399_vpu_hw_vp8_dec.c -#include <media/vp8-ctrls.h> - hdr = hantro_get_ctrl(ctx, v4l2_cid_mpeg_video_vp8_frame); + hdr = hantro_get_ctrl(ctx, v4l2_cid_stateless_vp8_frame); diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.c b/drivers/staging/media/sunxi/cedrus/cedrus.c --- a/drivers/staging/media/sunxi/cedrus/cedrus.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus.c - .id = v4l2_cid_mpeg_video_vp8_frame, + .id = v4l2_cid_stateless_vp8_frame, diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_dec.c b/drivers/staging/media/sunxi/cedrus/cedrus_dec.c --- a/drivers/staging/media/sunxi/cedrus/cedrus_dec.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus_dec.c - v4l2_cid_mpeg_video_vp8_frame); + v4l2_cid_stateless_vp8_frame); diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_vp8.c b/drivers/staging/media/sunxi/cedrus/cedrus_vp8.c --- a/drivers/staging/media/sunxi/cedrus/cedrus_vp8.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus_vp8.c - * fixme: if any other driver uses it, move this table to media/vp8-ctrls.h + * fixme: if any other driver uses it, we can consider moving + * this table so it can be shared. diff --git a/include/media/v4l2-ctrls.h b/include/media/v4l2-ctrls.h --- a/include/media/v4l2-ctrls.h +++ b/include/media/v4l2-ctrls.h -#include <media/vp8-ctrls.h> diff --git a/include/media/vp8-ctrls.h b/include/media/vp8-ctrls.h --- a/include/media/vp8-ctrls.h +++ /dev/null -/* spdx-license-identifier: gpl-2.0 */ -/* - * these are the vp8 state controls for use with stateless vp8 - * codec drivers. - * - * it turns out that these structs are not stable yet and will undergo - * more changes. so keep them private until they are stable and ready to - * become part of the official public api. - */ - -#ifndef _vp8_ctrls_h_ -#define _vp8_ctrls_h_ - -#include <linux/types.h> - -#define v4l2_cid_mpeg_video_vp8_frame (v4l2_cid_codec_base + 2000) - -#define v4l2_vp8_segment_flag_enabled 0x01 -#define v4l2_vp8_segment_flag_update_map 0x02 -#define v4l2_vp8_segment_flag_update_feature_data 0x04 -#define v4l2_vp8_segment_flag_delta_value_mode 0x08 - -/** - * struct v4l2_vp8_segment - vp8 segment-based adjustments parameters - * - * @quant_update: update values for the segment quantizer. - * @lf_update: update values for the loop filter level. - * @segment_probs: branch probabilities of the segment_id decoding tree. - * @padding: padding field. should be zeroed by applications. - * @flags: see v4l2_vp8_segment_flag_{}. - * - * this structure contains segment-based adjustments related parameters. - * see the 'update_segmentation()' part of the frame header syntax, - * and section '9.3. segment-based adjustments' of the vp8 specification - * for more details. - */ -struct v4l2_vp8_segment { - __s8 quant_update[4]; - __s8 lf_update[4]; - __u8 segment_probs[3]; - __u8 padding; - __u32 flags; -}; - -#define v4l2_vp8_lf_adj_enable 0x01 -#define v4l2_vp8_lf_delta_update 0x02 -#define v4l2_vp8_lf_filter_type_simple 0x04 - -/** - * struct v4l2_vp8_loop_filter - vp8 loop filter parameters - * - * @ref_frm_delta: reference frame signed delta values. - * @mb_mode_delta: mb prediction mode signed delta values. - * @sharpness_level: matches sharpness_level syntax element. - * @level: matches loop_filter_level syntax element. - * @padding: padding field. should be zeroed by applications. - * @flags: see v4l2_vp8_lf_flag_{}. - * - * this structure contains loop filter related parameters. - * see the 'mb_lf_adjustments()' part of the frame header syntax, - * and section '9.4. loop filter type and levels' of the vp8 specification - * for more details. - */ -struct v4l2_vp8_loop_filter { - __s8 ref_frm_delta[4]; - __s8 mb_mode_delta[4]; - __u8 sharpness_level; - __u8 level; - __u16 padding; - __u32 flags; -}; - -/** - * struct v4l2_vp8_quantization - vp8 quantizattion indices - * - * @y_ac_qi: luma ac coefficient table index. - * @y_dc_delta: luma dc delta vaue. - * @y2_dc_delta: y2 block dc delta value. - * @y2_ac_delta: y2 block ac delta value. - * @uv_dc_delta: chroma dc delta value. - * @uv_ac_delta: chroma ac delta value. - * @padding: padding field. should be zeroed by applications. - - * this structure contains the quantization indices present - * in 'quant_indices()' part of the frame header syntax. - * see section '9.6. dequantization indices' of the vp8 specification - * for more details. - */ -struct v4l2_vp8_quantization { - __u8 y_ac_qi; - __s8 y_dc_delta; - __s8 y2_dc_delta; - __s8 y2_ac_delta; - __s8 uv_dc_delta; - __s8 uv_ac_delta; - __u16 padding; -}; - -#define v4l2_vp8_coeff_prob_cnt 11 -#define v4l2_vp8_mv_prob_cnt 19 - -/** - * struct v4l2_vp8_entropy - vp8 update probabilities - * - * @coeff_probs: coefficient probability update values. - * @y_mode_probs: luma intra-prediction probabilities. - * @uv_mode_probs: chroma intra-prediction probabilities. - * @mv_probs: mv decoding probability. - * @padding: padding field. should be zeroed by applications. - * - * this structure contains the update probabilities present in - * 'token_prob_update()' and 'mv_prob_update()' part of the frame header. - * see section '17.2. probability updates' of the vp8 specification - * for more details. - */ -struct v4l2_vp8_entropy { - __u8 coeff_probs[4][8][3][v4l2_vp8_coeff_prob_cnt]; - __u8 y_mode_probs[4]; - __u8 uv_mode_probs[3]; - __u8 mv_probs[2][v4l2_vp8_mv_prob_cnt]; - __u8 padding[3]; -}; - -/** - * struct v4l2_vp8_entropy_coder_state - vp8 boolean coder state - * - * @range: coder state value for "range" - * @value: coder state value for "value" - * @bit_count: number of bits left in range "value". - * @padding: padding field. should be zeroed by applications. - * - * this structure contains the state for the boolean coder, as - * explained in section '7. boolean entropy decoder' of the vp8 specification. - */ -struct v4l2_vp8_entropy_coder_state { - __u8 range; - __u8 value; - __u8 bit_count; - __u8 padding; -}; - -#define v4l2_vp8_frame_flag_key_frame 0x01 -#define v4l2_vp8_frame_flag_experimental 0x02 -#define v4l2_vp8_frame_flag_show_frame 0x04 -#define v4l2_vp8_frame_flag_mb_no_skip_coeff 0x08 -#define v4l2_vp8_frame_flag_sign_bias_golden 0x10 -#define v4l2_vp8_frame_flag_sign_bias_alt 0x20 - -#define v4l2_vp8_frame_is_key_frame(hdr) \ - (!!((hdr)->flags & v4l2_vp8_frame_flag_key_frame)) - -/** - * struct v4l2_vp8_frame - vp8 frame parameters - * - * @seg: segmentation parameters. see &v4l2_vp8_segment for more details - * @lf: loop filter parameters. see &v4l2_vp8_loop_filter for more details - * @quant: quantization parameters. see &v4l2_vp8_quantization for more details - * @probs: probabilities. see &v4l2_vp9_probabilities for more details - * @width: frame width. - * @height: frame height. - * @horizontal_scale: horizontal scaling factor. - * @vertical_scale: vertical scaling factor. - * @version: bitstream version. - * @prob_skip_false: frame header syntax element. - * @prob_intra: frame header syntax element. - * @prob_last: frame header syntax element. - * @prob_gf: frame header syntax element. - * @num_dct_parts: number of dct coefficients partitions. - * @first_part_size: size of the first partition, i.e. the control partition. - * @first_part_header_bits: size in bits of the first partition header portion. - * @dct_part_sizes: dct coefficients sizes. - * @last_frame_ts: "last" reference buffer timestamp. - * the timestamp refers to the timestamp field in struct v4l2_buffer. - * use v4l2_timeval_to_ns() to convert the struct timeval to a __u64. - * @golden_frame_ts: "golden" reference buffer timestamp. - * @alt_frame_ts: "alt" reference buffer timestamp. - * @flags: see v4l2_vp8_frame_flag_{}. - */ -struct v4l2_ctrl_vp8_frame { - struct v4l2_vp8_segment segment; - struct v4l2_vp8_loop_filter lf; - struct v4l2_vp8_quantization quant; - struct v4l2_vp8_entropy entropy; - struct v4l2_vp8_entropy_coder_state coder_state; - - __u16 width; - __u16 height; - - __u8 horizontal_scale; - __u8 vertical_scale; - - __u8 version; - __u8 prob_skip_false; - __u8 prob_intra; - __u8 prob_last; - __u8 prob_gf; - __u8 num_dct_parts; - - __u32 first_part_size; - __u32 first_part_header_bits; - __u32 dct_part_sizes[8]; - - __u64 last_frame_ts; - __u64 golden_frame_ts; - __u64 alt_frame_ts; - - __u64 flags; -}; - -#endif diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h --- a/include/uapi/linux/v4l2-controls.h +++ b/include/uapi/linux/v4l2-controls.h +/* stateless vp8 control */ + +#define v4l2_vp8_segment_flag_enabled 0x01 +#define v4l2_vp8_segment_flag_update_map 0x02 +#define v4l2_vp8_segment_flag_update_feature_data 0x04 +#define v4l2_vp8_segment_flag_delta_value_mode 0x08 + +/** + * struct v4l2_vp8_segment - vp8 segment-based adjustments parameters + * + * @quant_update: update values for the segment quantizer. + * @lf_update: update values for the loop filter level. + * @segment_probs: branch probabilities of the segment_id decoding tree. + * @padding: padding field. should be zeroed by applications. + * @flags: see v4l2_vp8_segment_flag_{}. + * + * this structure contains segment-based adjustments related parameters. + * see the 'update_segmentation()' part of the frame header syntax, + * and section '9.3. segment-based adjustments' of the vp8 specification + * for more details. + */ +struct v4l2_vp8_segment { + __s8 quant_update[4]; + __s8 lf_update[4]; + __u8 segment_probs[3]; + __u8 padding; + __u32 flags; +}; + +#define v4l2_vp8_lf_adj_enable 0x01 +#define v4l2_vp8_lf_delta_update 0x02 +#define v4l2_vp8_lf_filter_type_simple 0x04 + +/** + * struct v4l2_vp8_loop_filter - vp8 loop filter parameters + * + * @ref_frm_delta: reference frame signed delta values. + * @mb_mode_delta: mb prediction mode signed delta values. + * @sharpness_level: matches sharpness_level syntax element. + * @level: matches loop_filter_level syntax element. + * @padding: padding field. should be zeroed by applications. + * @flags: see v4l2_vp8_lf_flag_{}. + * + * this structure contains loop filter related parameters. + * see the 'mb_lf_adjustments()' part of the frame header syntax, + * and section '9.4. loop filter type and levels' of the vp8 specification + * for more details. + */ +struct v4l2_vp8_loop_filter { + __s8 ref_frm_delta[4]; + __s8 mb_mode_delta[4]; + __u8 sharpness_level; + __u8 level; + __u16 padding; + __u32 flags; +}; + +/** + * struct v4l2_vp8_quantization - vp8 quantizattion indices + * + * @y_ac_qi: luma ac coefficient table index. + * @y_dc_delta: luma dc delta vaue. + * @y2_dc_delta: y2 block dc delta value. + * @y2_ac_delta: y2 block ac delta value. + * @uv_dc_delta: chroma dc delta value. + * @uv_ac_delta: chroma ac delta value. + * @padding: padding field. should be zeroed by applications. + + * this structure contains the quantization indices present + * in 'quant_indices()' part of the frame header syntax. + * see section '9.6. dequantization indices' of the vp8 specification + * for more details. + */ +struct v4l2_vp8_quantization { + __u8 y_ac_qi; + __s8 y_dc_delta; + __s8 y2_dc_delta; + __s8 y2_ac_delta; + __s8 uv_dc_delta; + __s8 uv_ac_delta; + __u16 padding; +}; + +#define v4l2_vp8_coeff_prob_cnt 11 +#define v4l2_vp8_mv_prob_cnt 19 + +/** + * struct v4l2_vp8_entropy - vp8 update probabilities + * + * @coeff_probs: coefficient probability update values. + * @y_mode_probs: luma intra-prediction probabilities. + * @uv_mode_probs: chroma intra-prediction probabilities. + * @mv_probs: mv decoding probability. + * @padding: padding field. should be zeroed by applications. + * + * this structure contains the update probabilities present in + * 'token_prob_update()' and 'mv_prob_update()' part of the frame header. + * see section '17.2. probability updates' of the vp8 specification + * for more details. + */ +struct v4l2_vp8_entropy { + __u8 coeff_probs[4][8][3][v4l2_vp8_coeff_prob_cnt]; + __u8 y_mode_probs[4]; + __u8 uv_mode_probs[3]; + __u8 mv_probs[2][v4l2_vp8_mv_prob_cnt]; + __u8 padding[3]; +}; + +/** + * struct v4l2_vp8_entropy_coder_state - vp8 boolean coder state + * + * @range: coder state value for "range" + * @value: coder state value for "value" + * @bit_count: number of bits left in range "value". + * @padding: padding field. should be zeroed by applications. + * + * this structure contains the state for the boolean coder, as + * explained in section '7. boolean entropy decoder' of the vp8 specification. + */ +struct v4l2_vp8_entropy_coder_state { + __u8 range; + __u8 value; + __u8 bit_count; + __u8 padding; +}; + +#define v4l2_vp8_frame_flag_key_frame 0x01 +#define v4l2_vp8_frame_flag_experimental 0x02 +#define v4l2_vp8_frame_flag_show_frame 0x04 +#define v4l2_vp8_frame_flag_mb_no_skip_coeff 0x08 +#define v4l2_vp8_frame_flag_sign_bias_golden 0x10 +#define v4l2_vp8_frame_flag_sign_bias_alt 0x20 + +#define v4l2_vp8_frame_is_key_frame(hdr) \ + (!!((hdr)->flags & v4l2_vp8_frame_flag_key_frame)) + +#define v4l2_cid_stateless_vp8_frame (v4l2_cid_codec_stateless_base + 200) +/** + * struct v4l2_vp8_frame - vp8 frame parameters + * + * @seg: segmentation parameters. see &v4l2_vp8_segment for more details + * @lf: loop filter parameters. see &v4l2_vp8_loop_filter for more details + * @quant: quantization parameters. see &v4l2_vp8_quantization for more details + * @probs: probabilities. see &v4l2_vp9_probabilities for more details + * @width: frame width. + * @height: frame height. + * @horizontal_scale: horizontal scaling factor. + * @vertical_scale: vertical scaling factor. + * @version: bitstream version. + * @prob_skip_false: frame header syntax element. + * @prob_intra: frame header syntax element. + * @prob_last: frame header syntax element. + * @prob_gf: frame header syntax element. + * @num_dct_parts: number of dct coefficients partitions. + * @first_part_size: size of the first partition, i.e. the control partition. + * @first_part_header_bits: size in bits of the first partition header portion. + * @dct_part_sizes: dct coefficients sizes. + * @last_frame_ts: "last" reference buffer timestamp. + * the timestamp refers to the timestamp field in struct v4l2_buffer. + * use v4l2_timeval_to_ns() to convert the struct timeval to a __u64. + * @golden_frame_ts: "golden" reference buffer timestamp. + * @alt_frame_ts: "alt" reference buffer timestamp. + * @flags: see v4l2_vp8_frame_flag_{}. + */ +struct v4l2_ctrl_vp8_frame { + struct v4l2_vp8_segment segment; + struct v4l2_vp8_loop_filter lf; + struct v4l2_vp8_quantization quant; + struct v4l2_vp8_entropy entropy; + struct v4l2_vp8_entropy_coder_state coder_state; + + __u16 width; + __u16 height; + + __u8 horizontal_scale; + __u8 vertical_scale; + + __u8 version; + __u8 prob_skip_false; + __u8 prob_intra; + __u8 prob_last; + __u8 prob_gf; + __u8 num_dct_parts; + + __u32 first_part_size; + __u32 first_part_header_bits; + __u32 dct_part_sizes[8]; + + __u64 last_frame_ts; + __u64 golden_frame_ts; + __u64 alt_frame_ts; + + __u64 flags; +}; + diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h --- a/include/uapi/linux/videodev2.h +++ b/include/uapi/linux/videodev2.h + struct v4l2_ctrl_vp8_frame __user *p_vp8_frame;
|
TV tuners, webcams, video capturers
|
363240ce1c08875815d28276f0a793bcaedb1ee9
|
ezequiel garcia
|
include
|
uapi
|
cedrus, hantro, linux, media, sunxi, v4l, v4l2-core
|
media: camss: fix vfe_isr_comp_done() documentation
|
function name in comment is wrong, and was changed to be the same as the actual function name.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add support for the sdm845 camera subsystem
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['c']
| 1
| 2
| 2
|
--- diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/platform/qcom/camss/camss-vfe.c --- a/drivers/media/platform/qcom/camss/camss-vfe.c +++ b/drivers/media/platform/qcom/camss/camss-vfe.c -/* - * vfe_isr_wm_done - process composite image done interrupt +/** + * vfe_isr_comp_done() - process composite image done interrupt
|
TV tuners, webcams, video capturers
|
d8bdc3e456b6d4baf99bee87dfd28020e8250367
|
robert foss
|
drivers
|
media
|
camss, platform, qcom
|
media: camss: fix vfe_isr comment typo
|
comment refers to ispif, but this is incorrect. only the vfe interrupts are handled by this function.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add support for the sdm845 camera subsystem
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['c']
| 2
| 2
| 2
|
--- diff --git a/drivers/media/platform/qcom/camss/camss-vfe-4-1.c b/drivers/media/platform/qcom/camss/camss-vfe-4-1.c --- a/drivers/media/platform/qcom/camss/camss-vfe-4-1.c +++ b/drivers/media/platform/qcom/camss/camss-vfe-4-1.c - * vfe_isr - ispif module interrupt handler + * vfe_isr - vfe module interrupt handler diff --git a/drivers/media/platform/qcom/camss/camss-vfe-4-7.c b/drivers/media/platform/qcom/camss/camss-vfe-4-7.c --- a/drivers/media/platform/qcom/camss/camss-vfe-4-7.c +++ b/drivers/media/platform/qcom/camss/camss-vfe-4-7.c - * vfe_isr - ispif module interrupt handler + * vfe_isr - vfe module interrupt handler
|
TV tuners, webcams, video capturers
|
ad46e1a8d851614b2a53796b19f1e194b0e1790a
|
robert foss bjorn andersson bjorn andersson linaro org
|
drivers
|
media
|
camss, platform, qcom
|
media: camss: replace trace_printk() with dev_dbg()
|
trace_printk() should not be used in production code, since extra memory is used for special buffers whenever trace_puts() is used.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add support for the sdm845 camera subsystem
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['c']
| 2
| 6
| 4
|
--- diff --git a/drivers/media/platform/qcom/camss/camss-vfe-4-1.c b/drivers/media/platform/qcom/camss/camss-vfe-4-1.c --- a/drivers/media/platform/qcom/camss/camss-vfe-4-1.c +++ b/drivers/media/platform/qcom/camss/camss-vfe-4-1.c +#include "camss.h" - trace_printk("vfe: status0 = 0x%08x, status1 = 0x%08x ", - value0, value1); + dev_dbg(vfe->camss->dev, "vfe: status0 = 0x%08x, status1 = 0x%08x ", + value0, value1); diff --git a/drivers/media/platform/qcom/camss/camss-vfe-4-7.c b/drivers/media/platform/qcom/camss/camss-vfe-4-7.c --- a/drivers/media/platform/qcom/camss/camss-vfe-4-7.c +++ b/drivers/media/platform/qcom/camss/camss-vfe-4-7.c +#include "camss.h" - trace_printk("vfe: status0 = 0x%08x, status1 = 0x%08x ", - value0, value1); + dev_dbg(vfe->camss->dev, "vfe: status0 = 0x%08x, status1 = 0x%08x ", + value0, value1);
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TV tuners, webcams, video capturers
|
c3177cb018a8bb1e6ed21ec3339c137892cfc99b
|
robert foss
|
drivers
|
media
|
camss, platform, qcom
|
media: camss: add camss_845 camss version
|
add enum representing the sdm845 soc, which incorporates version 170 of the titan architecture isp.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add support for the sdm845 camera subsystem
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['h']
| 1
| 1
| 0
|
--- diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/platform/qcom/camss/camss.h --- a/drivers/media/platform/qcom/camss/camss.h +++ b/drivers/media/platform/qcom/camss/camss.h + camss_845,
|
TV tuners, webcams, video capturers
|
96387cffeb7230e7523c5c13d90838191e89fcff
|
robert foss andrey konovalov andrey konovalov linaro org
|
drivers
|
media
|
camss, platform, qcom
|
media: camss: make ispif subdevice optional
|
this driver supports multiple architecture versions of the qualcomm isp. the camss architecure which this driver is name after, and with the introduction of this series, the titan architecture.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add support for the sdm845 camera subsystem
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['h', 'c']
| 4
| 143
| 84
|
--- diff --git a/drivers/media/platform/qcom/camss/camss-ispif.c b/drivers/media/platform/qcom/camss/camss-ispif.c --- a/drivers/media/platform/qcom/camss/camss-ispif.c +++ b/drivers/media/platform/qcom/camss/camss-ispif.c + struct camss *camss = ispif->camss; - dev_err_ratelimited(to_device(ispif), "vfe0 pix0 overflow "); + dev_err_ratelimited(camss->dev, "vfe0 pix0 overflow "); - dev_err_ratelimited(to_device(ispif), "vfe0 rdi0 overflow "); + dev_err_ratelimited(camss->dev, "vfe0 rdi0 overflow "); - dev_err_ratelimited(to_device(ispif), "vfe0 pix1 overflow "); + dev_err_ratelimited(camss->dev, "vfe0 pix1 overflow "); - dev_err_ratelimited(to_device(ispif), "vfe0 rdi1 overflow "); + dev_err_ratelimited(camss->dev, "vfe0 rdi1 overflow "); - dev_err_ratelimited(to_device(ispif), "vfe0 rdi2 overflow "); + dev_err_ratelimited(camss->dev, "vfe0 rdi2 overflow "); - dev_err_ratelimited(to_device(ispif), "vfe1 pix0 overflow "); + dev_err_ratelimited(camss->dev, "vfe1 pix0 overflow "); - dev_err_ratelimited(to_device(ispif), "vfe1 rdi0 overflow "); + dev_err_ratelimited(camss->dev, "vfe1 rdi0 overflow "); - dev_err_ratelimited(to_device(ispif), "vfe1 pix1 overflow "); + dev_err_ratelimited(camss->dev, "vfe1 pix1 overflow "); - dev_err_ratelimited(to_device(ispif), "vfe1 rdi1 overflow "); + dev_err_ratelimited(camss->dev, "vfe1 rdi1 overflow "); - dev_err_ratelimited(to_device(ispif), "vfe1 rdi2 overflow "); + dev_err_ratelimited(camss->dev, "vfe1 rdi2 overflow "); + struct camss *camss = ispif->camss; - dev_err_ratelimited(to_device(ispif), "vfe0 pix0 overflow "); + dev_err_ratelimited(camss->dev, "vfe0 pix0 overflow "); - dev_err_ratelimited(to_device(ispif), "vfe0 rdi0 overflow "); + dev_err_ratelimited(camss->dev, "vfe0 rdi0 overflow "); - dev_err_ratelimited(to_device(ispif), "vfe0 pix1 overflow "); + dev_err_ratelimited(camss->dev, "vfe0 pix1 overflow "); - dev_err_ratelimited(to_device(ispif), "vfe0 rdi1 overflow "); + dev_err_ratelimited(camss->dev, "vfe0 rdi1 overflow "); - dev_err_ratelimited(to_device(ispif), "vfe0 rdi2 overflow "); + dev_err_ratelimited(camss->dev, "vfe0 rdi2 overflow "); + struct camss *camss = ispif->camss; + - if (vfe_id > (to_camss(ispif)->vfe_num - 1)) { - dev_err(to_device(ispif), + if (vfe_id > (camss->vfe_num - 1)) { + dev_err(camss->dev, - dev_err(to_device(ispif), + dev_err(camss->dev, + struct camss *camss = ispif->camss; - ret = camss_pm_domain_on(to_camss(ispif), pm_domain_vfe0); + ret = camss_pm_domain_on(camss, pm_domain_vfe0); - ret = camss_pm_domain_on(to_camss(ispif), pm_domain_vfe1); + ret = camss_pm_domain_on(camss, pm_domain_vfe1); - to_device(ispif)); + camss->dev); - dev_dbg(to_device(ispif), "ispif reset failed "); + dev_dbg(camss->dev, "ispif reset failed "); - camss_pm_domain_off(to_camss(ispif), pm_domain_vfe0); - camss_pm_domain_off(to_camss(ispif), pm_domain_vfe1); + camss_pm_domain_off(camss, pm_domain_vfe0); + camss_pm_domain_off(camss, pm_domain_vfe1); - struct device *dev = to_device(ispif); + struct device *dev = ispif->camss->dev; - dev_err(to_device(ispif), "%s: ispif is busy: 0x%x ", + dev_err(ispif->camss->dev, "%s: ispif is busy: 0x%x ", - dev_err(to_device(ispif), "%s: ispif stop timeout ", + dev_err(ispif->camss->dev, "%s: ispif stop timeout ", + struct camss *camss = ispif->camss; - if (to_camss(ispif)->version == camss_8x96 || - to_camss(ispif)->version == camss_660) + if (camss->version == camss_8x96 || + camss->version == camss_660) - if (to_camss(ispif)->version == camss_8x96 || - to_camss(ispif)->version == camss_660) + if (camss->version == camss_8x96 || + camss->version == camss_660) -int msm_ispif_subdev_init(struct ispif_device *ispif, +int msm_ispif_subdev_init(struct camss *camss, - struct device *dev = to_device(ispif); + struct device *dev = camss->dev; + struct ispif_device *ispif = camss->ispif; + if (!camss->ispif) + return 0; + + ispif->camss = camss; + - if (to_camss(ispif)->version == camss_8x16) + if (camss->version == camss_8x16) - else if (to_camss(ispif)->version == camss_8x96 || - to_camss(ispif)->version == camss_660) + else if (camss->version == camss_8x96 || + camss->version == camss_660) - ispif->line = devm_kcalloc(dev, ispif->line_num, sizeof(*ispif->line), - gfp_kernel); + ispif->line = devm_kcalloc(dev, ispif->line_num, + sizeof(*ispif->line), gfp_kernel); - if (to_camss(ispif)->version == camss_8x16) { + if (camss->version == camss_8x16) { - } else if (to_camss(ispif)->version == camss_8x96 || - to_camss(ispif)->version == camss_660) { + } else if (camss->version == camss_8x96 || + camss->version == camss_660) { - if (to_camss(ispif)->version == camss_8x16) + if (camss->version == camss_8x16) - else if (to_camss(ispif)->version == camss_8x96 || - to_camss(ispif)->version == camss_660) + else if (camss->version == camss_8x96 || + camss->version == camss_660) + - struct device *dev = to_device(ispif); + struct camss *camss; + if (!ispif) + return 0; + + camss = ispif->camss; + - dev_err(dev, "failed to init format: %d ", ret); + dev_err(camss->dev, "failed to init format: %d ", ret); - dev_err(dev, "failed to init media entity: %d ", ret); + dev_err(camss->dev, "failed to init media entity: %d ", + ret); - dev_err(dev, "failed to register subdev: %d ", ret); + dev_err(camss->dev, "failed to register subdev: %d ", + ret); + if (!ispif) + return; + diff --git a/drivers/media/platform/qcom/camss/camss-ispif.h b/drivers/media/platform/qcom/camss/camss-ispif.h --- a/drivers/media/platform/qcom/camss/camss-ispif.h +++ b/drivers/media/platform/qcom/camss/camss-ispif.h + struct camss *camss; -int msm_ispif_subdev_init(struct ispif_device *ispif, +int msm_ispif_subdev_init(struct camss *camss, diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c - ret = msm_ispif_subdev_init(&camss->ispif, ispif_res); + ret = msm_ispif_subdev_init(camss, ispif_res); - ret); + ret); - ret = msm_ispif_register_entities(&camss->ispif, &camss->v4l2_dev); + ret = msm_ispif_register_entities(camss->ispif, + &camss->v4l2_dev); - ret); + ret); - for (i = 0; i < camss->csid_num; i++) { - for (j = 0; j < camss->ispif.line_num; j++) { - ret = media_create_pad_link( - &camss->csid[i].subdev.entity, - msm_csid_pad_src, - &camss->ispif.line[j].subdev.entity, - msm_ispif_pad_sink, - 0); - if (ret < 0) { - dev_err(camss->dev, - "failed to link %s->%s entities: %d ", - camss->csid[i].subdev.entity.name, - camss->ispif.line[j].subdev.entity.name, - ret); - goto err_link; - } - } - } - - for (i = 0; i < camss->ispif.line_num; i++) - for (k = 0; k < camss->vfe_num; k++) - for (j = 0; j < array_size(camss->vfe[k].line); j++) { + if (camss->ispif) { + for (i = 0; i < camss->csid_num; i++) { + for (j = 0; j < camss->ispif->line_num; j++) { - &camss->ispif.line[i].subdev.entity, - msm_ispif_pad_src, - &camss->vfe[k].line[j].subdev.entity, - msm_vfe_pad_sink, + &camss->csid[i].subdev.entity, + msm_csid_pad_src, + &camss->ispif->line[j].subdev.entity, + msm_ispif_pad_sink, - camss->ispif.line[i].subdev.entity.name, - camss->vfe[k].line[j].subdev.entity.name, + camss->csid[i].subdev.entity.name, + camss->ispif->line[j].subdev.entity.name, + } + + for (i = 0; i < camss->ispif->line_num; i++) + for (k = 0; k < camss->vfe_num; k++) + for (j = 0; j < array_size(camss->vfe[k].line); j++) { + struct v4l2_subdev *ispif = &camss->ispif->line[i].subdev; + struct v4l2_subdev *vfe = &camss->vfe[k].line[j].subdev; + + ret = media_create_pad_link(&ispif->entity, + msm_ispif_pad_src, + &vfe->entity, + msm_vfe_pad_sink, + 0); + if (ret < 0) { + dev_err(camss->dev, + "failed to link %s->%s entities: %d ", + ispif->entity.name, + vfe->entity.name, + ret); + goto err_link; + } + } + } else { + for (i = 0; i < camss->csid_num; i++) + for (k = 0; k < camss->vfe_num; k++) + for (j = 0; j < array_size(camss->vfe[k].line); j++) { + struct v4l2_subdev *csid = &camss->csid[i].subdev; + struct v4l2_subdev *vfe = &camss->vfe[k].line[j].subdev; + + ret = media_create_pad_link(&csid->entity, + msm_csid_pad_src, + &vfe->entity, + msm_vfe_pad_sink, + 0); + if (ret < 0) { + dev_err(camss->dev, + "failed to link %s->%s entities: %d ", + csid->entity.name, + vfe->entity.name, + ret); + goto err_link; + } + } + } - msm_ispif_unregister_entities(&camss->ispif); + msm_ispif_unregister_entities(camss->ispif); - msm_ispif_unregister_entities(&camss->ispif); + msm_ispif_unregister_entities(camss->ispif); + if (camss->version == camss_8x16 || + camss->version == camss_8x96) { + camss->ispif = devm_kcalloc(dev, 1, sizeof(*camss->ispif), gfp_kernel); + if (!camss->ispif) { + ret = -enomem; + goto err_free; + } + } + diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/platform/qcom/camss/camss.h --- a/drivers/media/platform/qcom/camss/camss.h +++ b/drivers/media/platform/qcom/camss/camss.h - struct ispif_device ispif; + struct ispif_device *ispif;
|
TV tuners, webcams, video capturers
|
9d95baf9fcf8aa606c8cee8ac613c7aca32769de
|
robert foss
|
drivers
|
media
|
camss, platform, qcom
|
media: camss: refactor vfe hw version support
|
in order to support qualcomm isp hardware architectures that diverge from older architectures, the vfe subdevice driver needs to be refactored to better abstract the different isp architectures.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add support for the sdm845 camera subsystem
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['h', 'c', 'makefile']
| 9
| 2,241
| 1,051
|
--- diff --git a/drivers/media/platform/qcom/camss/makefile b/drivers/media/platform/qcom/camss/makefile --- a/drivers/media/platform/qcom/camss/makefile +++ b/drivers/media/platform/qcom/camss/makefile + camss-vfe-4-8.o \ + camss-vfe-gen1.o \ diff --git a/drivers/media/platform/qcom/camss/camss-vfe-4-1.c b/drivers/media/platform/qcom/camss/camss-vfe-4-1.c --- a/drivers/media/platform/qcom/camss/camss-vfe-4-1.c +++ b/drivers/media/platform/qcom/camss/camss-vfe-4-1.c +#include "camss-vfe-gen1.h" -#define calc_word(width, m, n) (((width) * (m) + (n) - 1) / (n)) - -static int vfe_word_per_line(u32 format, u32 pixel_per_line) -{ - int val = 0; - - switch (format) { - case v4l2_pix_fmt_nv12: - case v4l2_pix_fmt_nv21: - case v4l2_pix_fmt_nv16: - case v4l2_pix_fmt_nv61: - val = calc_word(pixel_per_line, 1, 8); - break; - case v4l2_pix_fmt_yuyv: - case v4l2_pix_fmt_yvyu: - case v4l2_pix_fmt_uyvy: - case v4l2_pix_fmt_vyuy: - val = calc_word(pixel_per_line, 2, 8); - break; - } - - return val; -} - -static inline u8 vfe_calc_interp_reso(u16 input, u16 output) -{ - if (input / output >= 16) - return 0; - - if (input / output >= 8) - return 1; - - if (input / output >= 4) - return 2; - - return 3; -} - -const struct vfe_hw_ops vfe_ops_4_1 = { - .hw_version_read = vfe_hw_version_read, +static const struct vfe_hw_ops_gen1 vfe_ops_gen1_4_1 = { + .bus_connect_wm_to_rdi = vfe_bus_connect_wm_to_rdi, + .bus_disconnect_wm_from_rdi = vfe_bus_disconnect_wm_from_rdi, + .bus_enable_wr_if = vfe_bus_enable_wr_if, + .bus_reload_wm = vfe_bus_reload_wm, + .camif_wait_for_stop = vfe_camif_wait_for_stop, + .enable_irq_common = vfe_enable_irq_common, + .enable_irq_pix_line = vfe_enable_irq_pix_line, + .enable_irq_wm_line = vfe_enable_irq_wm_line, - .global_reset = vfe_global_reset, - .halt_request = vfe_halt_request, + .halt_request = vfe_halt_request, + .set_camif_cfg = vfe_set_camif_cfg, + .set_camif_cmd = vfe_set_camif_cmd, + .set_cgc_override = vfe_set_cgc_override, + .set_clamp_cfg = vfe_set_clamp_cfg, + .set_crop_cfg = vfe_set_crop_cfg, + .set_demux_cfg = vfe_set_demux_cfg, + .set_ds = vfe_set_ds, + .set_module_cfg = vfe_set_module_cfg, + .set_qos = vfe_set_qos, + .set_rdi_cid = vfe_set_rdi_cid, + .set_realign_cfg = vfe_set_realign_cfg, + .set_scale_cfg = vfe_set_scale_cfg, + .set_xbar_cfg = vfe_set_xbar_cfg, + .wm_get_ping_pong_status = vfe_wm_get_ping_pong_status, - .wm_set_framedrop_period = vfe_wm_set_framedrop_period, - .wm_set_ub_cfg = vfe_wm_set_ub_cfg, - .bus_reload_wm = vfe_bus_reload_wm, + .wm_set_framedrop_period = vfe_wm_set_framedrop_period, - .wm_get_ping_pong_status = vfe_wm_get_ping_pong_status, - .bus_enable_wr_if = vfe_bus_enable_wr_if, - .bus_connect_wm_to_rdi = vfe_bus_connect_wm_to_rdi, - .bus_disconnect_wm_from_rdi = vfe_bus_disconnect_wm_from_rdi, - .set_xbar_cfg = vfe_set_xbar_cfg, - .set_realign_cfg = vfe_set_realign_cfg, - .set_rdi_cid = vfe_set_rdi_cid, - .reg_update = vfe_reg_update, - .reg_update_clear = vfe_reg_update_clear, - .enable_irq_wm_line = vfe_enable_irq_wm_line, - .enable_irq_pix_line = vfe_enable_irq_pix_line, - .enable_irq_common = vfe_enable_irq_common, - .set_demux_cfg = vfe_set_demux_cfg, - .set_scale_cfg = vfe_set_scale_cfg, - .set_crop_cfg = vfe_set_crop_cfg, - .set_clamp_cfg = vfe_set_clamp_cfg, - .set_qos = vfe_set_qos, - .set_ds = vfe_set_ds, - .set_cgc_override = vfe_set_cgc_override, - .set_camif_cfg = vfe_set_camif_cfg, - .set_camif_cmd = vfe_set_camif_cmd, - .set_module_cfg = vfe_set_module_cfg, - .camif_wait_for_stop = vfe_camif_wait_for_stop, + .wm_set_ub_cfg = vfe_wm_set_ub_cfg, +}; + +static void vfe_subdev_init(struct device *dev, struct vfe_device *vfe) +{ + vfe->isr_ops = vfe_isr_ops_gen1; + vfe->ops_gen1 = &vfe_ops_gen1_4_1; + vfe->video_ops = vfe_video_ops_gen1; + + vfe->line_num = vfe_line_num_gen1; +} + +const struct vfe_hw_ops vfe_ops_4_1 = { + .global_reset = vfe_global_reset, + .hw_version_read = vfe_hw_version_read, - .violation_read = vfe_violation_read, + .reg_update_clear = vfe_reg_update_clear, + .reg_update = vfe_reg_update, + .subdev_init = vfe_subdev_init, + .vfe_disable = vfe_gen1_disable, + .vfe_enable = vfe_gen1_enable, + .vfe_halt = vfe_gen1_halt, + .violation_read = vfe_violation_read, diff --git a/drivers/media/platform/qcom/camss/camss-vfe-4-7.c b/drivers/media/platform/qcom/camss/camss-vfe-4-7.c --- a/drivers/media/platform/qcom/camss/camss-vfe-4-7.c +++ b/drivers/media/platform/qcom/camss/camss-vfe-4-7.c +#include "camss-vfe-gen1.h" + -static u16 vfe47_get_ub_size(u8 vfe_id) +static u16 vfe_get_ub_size(u8 vfe_id) + + /* enforce barrier between irq mask setup and global reset */ -static void vfe47_wm_enable(struct vfe_device *vfe, u8 wm, u8 enable) +static void vfe_wm_enable(struct vfe_device *vfe, u8 wm, u8 enable) + /* enforce barrier between any outstanding register write */ + + + /* use barrier to make sure bus reload is issued before anything else */ + + /* enforce barrier between line update and commit */ + + /* make sure register update is issued before further reg writes */ -static inline u8 vfe_calc_interp_reso(u16 input, u16 output) -{ - if (input / output >= 16) - return 0; - - if (input / output >= 8) - return 1; - - if (input / output >= 4) - return 2; - - return 3; -} - -static void vfe47_set_qos(struct vfe_device *vfe) +static void vfe_set_qos(struct vfe_device *vfe) -static void vfe47_set_ds(struct vfe_device *vfe) +static void vfe_set_ds(struct vfe_device *vfe) + + /* make sure camif command is issued written before it is changed again */ -static void vfe_isr_read(struct vfe_device *vfe, u32 *value0, u32 *value1) -{ - *value0 = readl_relaxed(vfe->base + vfe_0_irq_status_0); - *value1 = readl_relaxed(vfe->base + vfe_0_irq_status_1); - writel_relaxed(*value0, vfe->base + vfe_0_irq_clear_0); - writel_relaxed(*value1, vfe->base + vfe_0_irq_clear_1); - - wmb(); - writel_relaxed(vfe_0_irq_cmd_global_clear, vfe->base + vfe_0_irq_cmd); -} - -static void vfe_violation_read(struct vfe_device *vfe) -{ - u32 violation = readl_relaxed(vfe->base + vfe_0_violation_status); - - pr_err_ratelimited("vfe: violation = 0x%08x ", violation); -} - for (i = vfe_line_rdi0; i <= vfe_line_pix; i++) + for (i = vfe_line_rdi0; i < vfe->line_num; i++) -const struct vfe_hw_ops vfe_ops_4_7 = { - .hw_version_read = vfe_hw_version_read, - .get_ub_size = vfe47_get_ub_size, - .global_reset = vfe_global_reset, - .halt_request = vfe_halt_request, - .halt_clear = vfe_halt_clear, - .wm_enable = vfe47_wm_enable, - .wm_frame_based = vfe_wm_frame_based, - .wm_line_based = vfe_wm_line_based, - .wm_set_framedrop_period = vfe_wm_set_framedrop_period, - .wm_set_framedrop_pattern = vfe_wm_set_framedrop_pattern, - .wm_set_ub_cfg = vfe_wm_set_ub_cfg, - .bus_reload_wm = vfe_bus_reload_wm, - .wm_set_ping_addr = vfe_wm_set_ping_addr, - .wm_set_pong_addr = vfe_wm_set_pong_addr, - .wm_get_ping_pong_status = vfe_wm_get_ping_pong_status, - .bus_enable_wr_if = vfe_bus_enable_wr_if, - .bus_connect_wm_to_rdi = vfe_bus_connect_wm_to_rdi, - .wm_set_subsample = vfe_wm_set_subsample, - .bus_disconnect_wm_from_rdi = vfe_bus_disconnect_wm_from_rdi, - .set_xbar_cfg = vfe_set_xbar_cfg, - .set_realign_cfg = vfe_set_realign_cfg, - .set_rdi_cid = vfe_set_rdi_cid, - .reg_update = vfe_reg_update, - .reg_update_clear = vfe_reg_update_clear, - .enable_irq_wm_line = vfe_enable_irq_wm_line, - .enable_irq_pix_line = vfe_enable_irq_pix_line, - .enable_irq_common = vfe_enable_irq_common, - .set_demux_cfg = vfe_set_demux_cfg, - .set_scale_cfg = vfe_set_scale_cfg, - .set_crop_cfg = vfe_set_crop_cfg, - .set_clamp_cfg = vfe_set_clamp_cfg, - .set_qos = vfe47_set_qos, - .set_ds = vfe47_set_ds, - .set_cgc_override = vfe_set_cgc_override, - .set_camif_cfg = vfe_set_camif_cfg, - .set_camif_cmd = vfe_set_camif_cmd, - .set_module_cfg = vfe_set_module_cfg, - .camif_wait_for_stop = vfe_camif_wait_for_stop, - .isr_read = vfe_isr_read, - .violation_read = vfe_violation_read, - .isr = vfe_isr, -}; - -static u16 vfe48_get_ub_size(u8 vfe_id) +static void vfe_isr_read(struct vfe_device *vfe, u32 *value0, u32 *value1) - /* on vfe4.8 the ub-size is the same on both instances */ - return msm_vfe_vfe0_ub_size_rdi; -} + *value0 = readl_relaxed(vfe->base + vfe_0_irq_status_0); + *value1 = readl_relaxed(vfe->base + vfe_0_irq_status_1); -static void vfe48_wm_enable(struct vfe_device *vfe, u8 wm, u8 enable) -{ - if (enable) - writel_relaxed(2 << vfe48_0_bus_image_master_n_shift(wm), - vfe->base + vfe48_0_bus_image_master_cmd); - else - writel_relaxed(1 << vfe48_0_bus_image_master_n_shift(wm), - vfe->base + vfe48_0_bus_image_master_cmd); + writel_relaxed(*value0, vfe->base + vfe_0_irq_clear_0); + writel_relaxed(*value1, vfe->base + vfe_0_irq_clear_1); - /* the wm must be enabled before sending other commands */ + /* enforce barrier between local & global irq clear */ + writel_relaxed(vfe_0_irq_cmd_global_clear, vfe->base + vfe_0_irq_cmd); -static void vfe48_set_qos(struct vfe_device *vfe) -{ - u32 val = vfe48_0_bus_bdg_qos_cfg_0_cfg; - u32 val3 = vfe48_0_bus_bdg_qos_cfg_3_cfg; - u32 val4 = vfe48_0_bus_bdg_qos_cfg_4_cfg; - u32 val7 = vfe48_0_bus_bdg_qos_cfg_7_cfg; - - writel_relaxed(val, vfe->base + vfe_0_bus_bdg_qos_cfg_0); - writel_relaxed(val, vfe->base + vfe_0_bus_bdg_qos_cfg_1); - writel_relaxed(val, vfe->base + vfe_0_bus_bdg_qos_cfg_2); - writel_relaxed(val3, vfe->base + vfe_0_bus_bdg_qos_cfg_3); - writel_relaxed(val4, vfe->base + vfe_0_bus_bdg_qos_cfg_4); - writel_relaxed(val4, vfe->base + vfe_0_bus_bdg_qos_cfg_5); - writel_relaxed(val4, vfe->base + vfe_0_bus_bdg_qos_cfg_6); - writel_relaxed(val7, vfe->base + vfe_0_bus_bdg_qos_cfg_7); -} - -static void vfe48_set_ds(struct vfe_device *vfe) +static void vfe_violation_read(struct vfe_device *vfe) - u32 val = vfe48_0_bus_bdg_ds_cfg_0_cfg; - u32 val16 = vfe48_0_bus_bdg_ds_cfg_16_cfg; + u32 violation = readl_relaxed(vfe->base + vfe_0_violation_status); - writel_relaxed(val, vfe->base + vfe_0_bus_bdg_ds_cfg_0); - writel_relaxed(val, vfe->base + vfe_0_bus_bdg_ds_cfg_1); - writel_relaxed(val, vfe->base + vfe_0_bus_bdg_ds_cfg_2); - writel_relaxed(val, vfe->base + vfe_0_bus_bdg_ds_cfg_3); - writel_relaxed(val, vfe->base + vfe_0_bus_bdg_ds_cfg_4); - writel_relaxed(val, vfe->base + vfe_0_bus_bdg_ds_cfg_5); - writel_relaxed(val, vfe->base + vfe_0_bus_bdg_ds_cfg_6); - writel_relaxed(val, vfe->base + vfe_0_bus_bdg_ds_cfg_7); - writel_relaxed(val, vfe->base + vfe_0_bus_bdg_ds_cfg_8); - writel_relaxed(val, vfe->base + vfe_0_bus_bdg_ds_cfg_9); - writel_relaxed(val, vfe->base + vfe_0_bus_bdg_ds_cfg_10); - writel_relaxed(val, vfe->base + vfe_0_bus_bdg_ds_cfg_11); - writel_relaxed(val, vfe->base + vfe_0_bus_bdg_ds_cfg_12); - writel_relaxed(val, vfe->base + vfe_0_bus_bdg_ds_cfg_13); - writel_relaxed(val, vfe->base + vfe_0_bus_bdg_ds_cfg_14); - writel_relaxed(val, vfe->base + vfe_0_bus_bdg_ds_cfg_15); - writel_relaxed(val16, vfe->base + vfe_0_bus_bdg_ds_cfg_16); + pr_err_ratelimited("vfe: violation = 0x%08x ", violation); -const struct vfe_hw_ops vfe_ops_4_8 = { - .hw_version_read = vfe_hw_version_read, - .get_ub_size = vfe48_get_ub_size, - .global_reset = vfe_global_reset, - .halt_request = vfe_halt_request, +static const struct vfe_hw_ops_gen1 vfe_ops_gen1_4_7 = { + .bus_connect_wm_to_rdi = vfe_bus_connect_wm_to_rdi, + .bus_disconnect_wm_from_rdi = vfe_bus_disconnect_wm_from_rdi, + .bus_enable_wr_if = vfe_bus_enable_wr_if, + .bus_reload_wm = vfe_bus_reload_wm, + .camif_wait_for_stop = vfe_camif_wait_for_stop, + .enable_irq_common = vfe_enable_irq_common, + .enable_irq_pix_line = vfe_enable_irq_pix_line, + .enable_irq_wm_line = vfe_enable_irq_wm_line, + .get_ub_size = vfe_get_ub_size, - .wm_enable = vfe48_wm_enable, + .halt_request = vfe_halt_request, + .set_camif_cfg = vfe_set_camif_cfg, + .set_camif_cmd = vfe_set_camif_cmd, + .set_cgc_override = vfe_set_cgc_override, + .set_clamp_cfg = vfe_set_clamp_cfg, + .set_crop_cfg = vfe_set_crop_cfg, + .set_demux_cfg = vfe_set_demux_cfg, + .set_ds = vfe_set_ds, + .set_module_cfg = vfe_set_module_cfg, + .set_qos = vfe_set_qos, + .set_rdi_cid = vfe_set_rdi_cid, + .set_realign_cfg = vfe_set_realign_cfg, + .set_scale_cfg = vfe_set_scale_cfg, + .set_xbar_cfg = vfe_set_xbar_cfg, + .wm_enable = vfe_wm_enable, + .wm_get_ping_pong_status = vfe_wm_get_ping_pong_status, - .wm_set_framedrop_period = vfe_wm_set_framedrop_period, - .wm_set_ub_cfg = vfe_wm_set_ub_cfg, - .bus_reload_wm = vfe_bus_reload_wm, + .wm_set_framedrop_period = vfe_wm_set_framedrop_period, - .wm_get_ping_pong_status = vfe_wm_get_ping_pong_status, - .bus_enable_wr_if = vfe_bus_enable_wr_if, - .bus_connect_wm_to_rdi = vfe_bus_connect_wm_to_rdi, - .bus_disconnect_wm_from_rdi = vfe_bus_disconnect_wm_from_rdi, - .set_xbar_cfg = vfe_set_xbar_cfg, - .set_realign_cfg = vfe_set_realign_cfg, - .set_rdi_cid = vfe_set_rdi_cid, - .reg_update = vfe_reg_update, - .reg_update_clear = vfe_reg_update_clear, - .enable_irq_wm_line = vfe_enable_irq_wm_line, - .enable_irq_pix_line = vfe_enable_irq_pix_line, - .enable_irq_common = vfe_enable_irq_common, - .set_demux_cfg = vfe_set_demux_cfg, - .set_scale_cfg = vfe_set_scale_cfg, - .set_crop_cfg = vfe_set_crop_cfg, - .set_clamp_cfg = vfe_set_clamp_cfg, - .set_qos = vfe48_set_qos, - .set_ds = vfe48_set_ds, - .set_cgc_override = vfe_set_cgc_override, - .set_camif_cfg = vfe_set_camif_cfg, - .set_camif_cmd = vfe_set_camif_cmd, - .set_module_cfg = vfe_set_module_cfg, - .camif_wait_for_stop = vfe_camif_wait_for_stop, + .wm_set_ub_cfg = vfe_wm_set_ub_cfg, +}; + +static void vfe_subdev_init(struct device *dev, struct vfe_device *vfe) +{ + vfe->isr_ops = vfe_isr_ops_gen1; + vfe->ops_gen1 = &vfe_ops_gen1_4_7; + vfe->video_ops = vfe_video_ops_gen1; + + vfe->line_num = vfe_line_num_gen1; +} + +const struct vfe_hw_ops vfe_ops_4_7 = { + .global_reset = vfe_global_reset, + .hw_version_read = vfe_hw_version_read, - .violation_read = vfe_violation_read, + .reg_update_clear = vfe_reg_update_clear, + .reg_update = vfe_reg_update, + .subdev_init = vfe_subdev_init, + .vfe_disable = vfe_gen1_disable, + .vfe_enable = vfe_gen1_enable, + .vfe_halt = vfe_gen1_halt, + .violation_read = vfe_violation_read, diff --git a/drivers/media/platform/qcom/camss/camss-vfe-4-8.c b/drivers/media/platform/qcom/camss/camss-vfe-4-8.c --- /dev/null +++ b/drivers/media/platform/qcom/camss/camss-vfe-4-8.c +// spdx-license-identifier: gpl-2.0 +/* + * camss-vfe-4-8.c + * + * qualcomm msm camera subsystem - vfe (video front end) module v4.8 + * + * copyright (c) 2013-2015, the linux foundation. all rights reserved. + * copyright (c) 2015-2021 linaro ltd. + */ + +#include <linux/interrupt.h> +#include <linux/io.h> +#include <linux/iopoll.h> + +#include "camss.h" +#include "camss-vfe.h" +#include "camss-vfe-gen1.h" + +#define vfe_0_hw_version 0x000 + +#define vfe_0_global_reset_cmd 0x018 +#define vfe_0_global_reset_cmd_core bit(0) +#define vfe_0_global_reset_cmd_camif bit(1) +#define vfe_0_global_reset_cmd_bus bit(2) +#define vfe_0_global_reset_cmd_bus_bdg bit(3) +#define vfe_0_global_reset_cmd_register bit(4) +#define vfe_0_global_reset_cmd_pm bit(5) +#define vfe_0_global_reset_cmd_bus_misr bit(6) +#define vfe_0_global_reset_cmd_testgen bit(7) +#define vfe_0_global_reset_cmd_dsp bit(8) +#define vfe_0_global_reset_cmd_idle_cgc bit(9) + +#define vfe_0_module_lens_en 0x040 +#define vfe_0_module_lens_en_demux bit(2) +#define vfe_0_module_lens_en_chroma_upsample bit(3) + +#define vfe_0_module_zoom_en 0x04c +#define vfe_0_module_zoom_en_scale_enc bit(1) +#define vfe_0_module_zoom_en_crop_enc bit(2) +#define vfe_0_module_zoom_en_realign_buf bit(9) + +#define vfe_0_core_cfg 0x050 +#define vfe_0_core_cfg_pixel_pattern_ycbycr 0x4 +#define vfe_0_core_cfg_pixel_pattern_ycrycb 0x5 +#define vfe_0_core_cfg_pixel_pattern_cbycry 0x6 +#define vfe_0_core_cfg_pixel_pattern_crycby 0x7 +#define vfe_0_core_cfg_composite_reg_update_en bit(4) + +#define vfe_0_irq_cmd 0x058 +#define vfe_0_irq_cmd_global_clear bit(0) + +#define vfe_0_irq_mask_0 0x05c +#define vfe_0_irq_mask_0_camif_sof bit(0) +#define vfe_0_irq_mask_0_camif_eof bit(1) +#define vfe_0_irq_mask_0_rdin_reg_update(n) bit((n) + 5) +#define vfe_0_irq_mask_0_line_n_reg_update(n) \ + ((n) == vfe_line_pix ? bit(4) : vfe_0_irq_mask_0_rdin_reg_update(n)) +#define vfe_0_irq_mask_0_image_master_n_ping_pong(n) bit((n) + 8) +#define vfe_0_irq_mask_0_image_composite_done_n(n) bit((n) + 25) +#define vfe_0_irq_mask_0_reset_ack bit(31) +#define vfe_0_irq_mask_1 0x060 +#define vfe_0_irq_mask_1_camif_error bit(0) +#define vfe_0_irq_mask_1_violation bit(7) +#define vfe_0_irq_mask_1_bus_bdg_halt_ack bit(8) +#define vfe_0_irq_mask_1_image_master_n_bus_overflow(n) bit((n) + 9) +#define vfe_0_irq_mask_1_rdin_sof(n) bit((n) + 29) + +#define vfe_0_irq_clear_0 0x064 +#define vfe_0_irq_clear_1 0x068 + +#define vfe_0_irq_status_0 0x06c +#define vfe_0_irq_status_0_camif_sof bit(0) +#define vfe_0_irq_status_0_rdin_reg_update(n) bit((n) + 5) +#define vfe_0_irq_status_0_line_n_reg_update(n) \ + ((n) == vfe_line_pix ? bit(4) : vfe_0_irq_status_0_rdin_reg_update(n)) +#define vfe_0_irq_status_0_image_master_n_ping_pong(n) bit((n) + 8) +#define vfe_0_irq_status_0_image_composite_done_n(n) bit((n) + 25) +#define vfe_0_irq_status_0_reset_ack bit(31) +#define vfe_0_irq_status_1 0x070 +#define vfe_0_irq_status_1_violation bit(7) +#define vfe_0_irq_status_1_bus_bdg_halt_ack bit(8) +#define vfe_0_irq_status_1_rdin_sof(n) bit((n) + 29) + +#define vfe_0_irq_composite_mask_0 0x074 +#define vfe_0_violation_status 0x07c + +#define vfe_0_bus_cmd 0x80 +#define vfe_0_bus_cmd_mx_rld_cmd(x) bit(x) + +#define vfe_0_bus_cfg 0x084 + +#define vfe_0_bus_xbar_cfg_x(x) (0x90 + 0x4 * ((x) / 2)) +#define vfe_0_bus_xbar_cfg_x_m_pair_stream_en bit(2) +#define vfe_0_bus_xbar_cfg_x_m_realign_buf_en bit(3) +#define vfe_0_bus_xbar_cfg_x_m_pair_stream_swap_intra (0x1 << 4) +#define vfe_0_bus_xbar_cfg_x_m_pair_stream_swap_inter (0x2 << 4) +#define vfe_0_bus_xbar_cfg_x_m_pair_stream_swap_inter_intra (0x3 << 4) +#define vfe_0_bus_xbar_cfg_x_m_single_stream_sel_shift 8 +#define vfe_0_bus_xbar_cfg_x_m_single_stream_sel_luma 0x0 +#define vfe_0_bus_xbar_cfg_x_m_single_stream_sel_val_rdi0 0xc +#define vfe_0_bus_xbar_cfg_x_m_single_stream_sel_val_rdi1 0xd +#define vfe_0_bus_xbar_cfg_x_m_single_stream_sel_val_rdi2 0xe + +#define vfe_0_bus_image_master_n_wr_cfg(n) (0x0a0 + 0x2c * (n)) +#define vfe_0_bus_image_master_n_wr_cfg_wr_path_shift 0 +#define vfe_0_bus_image_master_n_wr_ping_addr(n) (0x0a4 + 0x2c * (n)) +#define vfe_0_bus_image_master_n_wr_pong_addr(n) (0x0ac + 0x2c * (n)) +#define vfe_0_bus_image_master_n_wr_addr_cfg(n) (0x0b4 + 0x2c * (n)) +#define vfe_0_bus_image_master_n_wr_addr_cfg_frm_based_shift 1 +#define vfe_0_bus_image_master_n_wr_addr_cfg_frm_drop_per_shift 2 +#define vfe_0_bus_image_master_n_wr_addr_cfg_frm_drop_per_mask (0x1f << 2) +#define vfe_0_bus_image_master_n_wr_ub_cfg(n) (0x0b8 + 0x2c * (n)) +#define vfe_0_bus_image_master_n_wr_ub_cfg_offset_shift 16 +#define vfe_0_bus_image_master_n_wr_image_size(n) (0x0bc + 0x2c * (n)) +#define vfe_0_bus_image_master_n_wr_buffer_cfg(n) (0x0c0 + 0x2c * (n)) +#define vfe_0_bus_image_master_n_wr_framedrop_pattern(n) \ + (0x0c4 + 0x2c * (n)) +#define vfe_0_bus_image_master_n_wr_irq_subsample_pattern(n) \ + (0x0c8 + 0x2c * (n)) +#define vfe_0_bus_image_master_n_wr_irq_subsample_pattern_def 0xffffffff + +#define vfe_0_bus_ping_pong_status 0x338 + +#define vfe_0_bus_bdg_cmd 0x400 +#define vfe_0_bus_bdg_cmd_halt_req 1 + +#define vfe_0_bus_bdg_qos_cfg_0 0x404 +#define vfe_0_bus_bdg_qos_cfg_0_cfg 0xaaa5aaa5 +#define vfe_0_bus_bdg_qos_cfg_1 0x408 +#define vfe_0_bus_bdg_qos_cfg_2 0x40c +#define vfe_0_bus_bdg_qos_cfg_3 0x410 +#define vfe_0_bus_bdg_qos_cfg_3_cfg 0xaa55aaa5 +#define vfe_0_bus_bdg_qos_cfg_4 0x414 +#define vfe_0_bus_bdg_qos_cfg_4_cfg 0xaa55aa55 +#define vfe_0_bus_bdg_qos_cfg_5 0x418 +#define vfe_0_bus_bdg_qos_cfg_6 0x41c +#define vfe_0_bus_bdg_qos_cfg_7 0x420 +#define vfe_0_bus_bdg_qos_cfg_7_cfg 0x0005aa55 + +#define vfe_0_bus_bdg_ds_cfg_0 0x424 +#define vfe_0_bus_bdg_ds_cfg_0_cfg 0xcccc1111 +#define vfe_0_bus_bdg_ds_cfg_1 0x428 +#define vfe_0_bus_bdg_ds_cfg_2 0x42c +#define vfe_0_bus_bdg_ds_cfg_3 0x430 +#define vfe_0_bus_bdg_ds_cfg_4 0x434 +#define vfe_0_bus_bdg_ds_cfg_5 0x438 +#define vfe_0_bus_bdg_ds_cfg_6 0x43c +#define vfe_0_bus_bdg_ds_cfg_7 0x440 +#define vfe_0_bus_bdg_ds_cfg_8 0x444 +#define vfe_0_bus_bdg_ds_cfg_9 0x448 +#define vfe_0_bus_bdg_ds_cfg_10 0x44c +#define vfe_0_bus_bdg_ds_cfg_11 0x450 +#define vfe_0_bus_bdg_ds_cfg_12 0x454 +#define vfe_0_bus_bdg_ds_cfg_13 0x458 +#define vfe_0_bus_bdg_ds_cfg_14 0x45c +#define vfe_0_bus_bdg_ds_cfg_15 0x460 +#define vfe_0_bus_bdg_ds_cfg_16 0x464 +#define vfe_0_bus_bdg_ds_cfg_16_cfg 0x00000110 + +#define vfe_0_rdi_cfg_x(x) (0x46c + (0x4 * (x))) +#define vfe_0_rdi_cfg_x_rdi_stream_sel_shift 28 +#define vfe_0_rdi_cfg_x_rdi_stream_sel_mask (0xf << 28) +#define vfe_0_rdi_cfg_x_rdi_m0_sel_shift 4 +#define vfe_0_rdi_cfg_x_rdi_m0_sel_mask (0xf << 4) +#define vfe_0_rdi_cfg_x_rdi_en_bit bit(2) +#define vfe_0_rdi_cfg_x_mipi_en_bits 0x3 + +#define vfe_0_camif_cmd 0x478 +#define vfe_0_camif_cmd_disable_frame_boundary 0 +#define vfe_0_camif_cmd_enable_frame_boundary 1 +#define vfe_0_camif_cmd_no_change 3 +#define vfe_0_camif_cmd_clear_camif_status bit(2) +#define vfe_0_camif_cfg 0x47c +#define vfe_0_camif_cfg_vfe_output_en bit(6) +#define vfe_0_camif_frame_cfg 0x484 +#define vfe_0_camif_window_width_cfg 0x488 +#define vfe_0_camif_window_height_cfg 0x48c +#define vfe_0_camif_subsample_cfg 0x490 +#define vfe_0_camif_irq_framedrop_pattern 0x498 +#define vfe_0_camif_irq_subsample_pattern 0x49c +#define vfe_0_camif_status 0x4a4 +#define vfe_0_camif_status_halt bit(31) + +#define vfe_0_reg_update 0x4ac +#define vfe_0_reg_update_rdin(n) bit(1 + (n)) +#define vfe_0_reg_update_line_n(n) \ + ((n) == vfe_line_pix ? 1 : vfe_0_reg_update_rdin(n)) + +#define vfe_0_demux_cfg 0x560 +#define vfe_0_demux_cfg_period 0x3 +#define vfe_0_demux_gain_0 0x564 +#define vfe_0_demux_gain_0_ch0_even (0x80 << 0) +#define vfe_0_demux_gain_0_ch0_odd (0x80 << 16) +#define vfe_0_demux_gain_1 0x568 +#define vfe_0_demux_gain_1_ch1 (0x80 << 0) +#define vfe_0_demux_gain_1_ch2 (0x80 << 16) +#define vfe_0_demux_even_cfg 0x574 +#define vfe_0_demux_even_cfg_pattern_yuyv 0x9cac +#define vfe_0_demux_even_cfg_pattern_yvyu 0xac9c +#define vfe_0_demux_even_cfg_pattern_uyvy 0xc9ca +#define vfe_0_demux_even_cfg_pattern_vyuy 0xcac9 +#define vfe_0_demux_odd_cfg 0x578 +#define vfe_0_demux_odd_cfg_pattern_yuyv 0x9cac +#define vfe_0_demux_odd_cfg_pattern_yvyu 0xac9c +#define vfe_0_demux_odd_cfg_pattern_uyvy 0xc9ca +#define vfe_0_demux_odd_cfg_pattern_vyuy 0xcac9 + +#define vfe_0_scale_enc_y_cfg 0x91c +#define vfe_0_scale_enc_y_h_image_size 0x920 +#define vfe_0_scale_enc_y_h_phase 0x924 +#define vfe_0_scale_enc_y_v_image_size 0x934 +#define vfe_0_scale_enc_y_v_phase 0x938 +#define vfe_0_scale_enc_cbcr_cfg 0x948 +#define vfe_0_scale_enc_cbcr_h_image_size 0x94c +#define vfe_0_scale_enc_cbcr_h_phase 0x950 +#define vfe_0_scale_enc_cbcr_v_image_size 0x960 +#define vfe_0_scale_enc_cbcr_v_phase 0x964 + +#define vfe_0_crop_enc_y_width 0x974 +#define vfe_0_crop_enc_y_height 0x978 +#define vfe_0_crop_enc_cbcr_width 0x97c +#define vfe_0_crop_enc_cbcr_height 0x980 + +#define vfe_0_clamp_enc_max_cfg 0x984 +#define vfe_0_clamp_enc_max_cfg_ch0 (0xff << 0) +#define vfe_0_clamp_enc_max_cfg_ch1 (0xff << 8) +#define vfe_0_clamp_enc_max_cfg_ch2 (0xff << 16) +#define vfe_0_clamp_enc_min_cfg 0x988 +#define vfe_0_clamp_enc_min_cfg_ch0 (0x0 << 0) +#define vfe_0_clamp_enc_min_cfg_ch1 (0x0 << 8) +#define vfe_0_clamp_enc_min_cfg_ch2 (0x0 << 16) + +#define vfe_0_realign_buf_cfg 0xaac +#define vfe_0_realign_buf_cfg_cb_odd_pixel bit(2) +#define vfe_0_realign_buf_cfg_cr_odd_pixel bit(3) +#define vfe_0_realign_buf_cfg_hsub_enable bit(4) + +#define vfe_0_bus_image_master_cmd 0xcec +#define vfe_0_bus_image_master_n_shift(x) (2 * (x)) + +#define camif_timeout_sleep_us 1000 +#define camif_timeout_all_us 1000000 + +#define msm_vfe_vfe0_ub_size 2047 +#define msm_vfe_vfe0_ub_size_rdi (msm_vfe_vfe0_ub_size / 3) +#define msm_vfe_vfe1_ub_size 1535 +#define msm_vfe_vfe1_ub_size_rdi (msm_vfe_vfe1_ub_size / 3) + +static void vfe_hw_version_read(struct vfe_device *vfe, struct device *dev) +{ + u32 hw_version = readl_relaxed(vfe->base + vfe_0_hw_version); + + dev_err(dev, "vfe hw version = 0x%08x ", hw_version); +} + +static inline void vfe_reg_clr(struct vfe_device *vfe, u32 reg, u32 clr_bits) +{ + u32 bits = readl_relaxed(vfe->base + reg); + + writel_relaxed(bits & ~clr_bits, vfe->base + reg); +} + +static inline void vfe_reg_set(struct vfe_device *vfe, u32 reg, u32 set_bits) +{ + u32 bits = readl_relaxed(vfe->base + reg); + + writel_relaxed(bits | set_bits, vfe->base + reg); +} + +static void vfe_global_reset(struct vfe_device *vfe) +{ + u32 reset_bits = vfe_0_global_reset_cmd_idle_cgc | + vfe_0_global_reset_cmd_dsp | + vfe_0_global_reset_cmd_testgen | + vfe_0_global_reset_cmd_bus_misr | + vfe_0_global_reset_cmd_pm | + vfe_0_global_reset_cmd_register | + vfe_0_global_reset_cmd_bus_bdg | + vfe_0_global_reset_cmd_bus | + vfe_0_global_reset_cmd_camif | + vfe_0_global_reset_cmd_core; + + writel_relaxed(bit(31), vfe->base + vfe_0_irq_mask_0); + + /* enforce barrier between irq mask setup and global reset */ + wmb(); + writel_relaxed(reset_bits, vfe->base + vfe_0_global_reset_cmd); +} + +static void vfe_halt_request(struct vfe_device *vfe) +{ + writel_relaxed(vfe_0_bus_bdg_cmd_halt_req, + vfe->base + vfe_0_bus_bdg_cmd); +} + +static void vfe_halt_clear(struct vfe_device *vfe) +{ + writel_relaxed(0x0, vfe->base + vfe_0_bus_bdg_cmd); +} + +static void vfe_wm_frame_based(struct vfe_device *vfe, u8 wm, u8 enable) +{ + if (enable) + vfe_reg_set(vfe, vfe_0_bus_image_master_n_wr_addr_cfg(wm), + 1 << vfe_0_bus_image_master_n_wr_addr_cfg_frm_based_shift); + else + vfe_reg_clr(vfe, vfe_0_bus_image_master_n_wr_addr_cfg(wm), + 1 << vfe_0_bus_image_master_n_wr_addr_cfg_frm_based_shift); +} + +#define calc_word(width, m, n) (((width) * (m) + (n) - 1) / (n)) + +static int vfe_word_per_line_by_pixel(u32 format, u32 pixel_per_line) +{ + int val = 0; + + switch (format) { + case v4l2_pix_fmt_nv12: + case v4l2_pix_fmt_nv21: + case v4l2_pix_fmt_nv16: + case v4l2_pix_fmt_nv61: + val = calc_word(pixel_per_line, 1, 8); + break; + case v4l2_pix_fmt_yuyv: + case v4l2_pix_fmt_yvyu: + case v4l2_pix_fmt_uyvy: + case v4l2_pix_fmt_vyuy: + val = calc_word(pixel_per_line, 2, 8); + break; + } + + return val; +} + +static int vfe_word_per_line_by_bytes(u32 bytes_per_line) +{ + return calc_word(bytes_per_line, 1, 8); +} + +static void vfe_get_wm_sizes(struct v4l2_pix_format_mplane *pix, u8 plane, + u16 *width, u16 *height, u16 *bytesperline) +{ + switch (pix->pixelformat) { + case v4l2_pix_fmt_nv12: + case v4l2_pix_fmt_nv21: + *width = pix->width; + *height = pix->height; + *bytesperline = pix->plane_fmt[0].bytesperline; + if (plane == 1) + *height /= 2; + break; + case v4l2_pix_fmt_nv16: + case v4l2_pix_fmt_nv61: + *width = pix->width; + *height = pix->height; + *bytesperline = pix->plane_fmt[0].bytesperline; + break; + case v4l2_pix_fmt_yuyv: + case v4l2_pix_fmt_yvyu: + case v4l2_pix_fmt_vyuy: + case v4l2_pix_fmt_uyvy: + *width = pix->width; + *height = pix->height; + *bytesperline = pix->plane_fmt[plane].bytesperline; + break; + } +} + +static void vfe_wm_line_based(struct vfe_device *vfe, u32 wm, + struct v4l2_pix_format_mplane *pix, + u8 plane, u32 enable) +{ + u32 reg; + + if (enable) { + u16 width = 0, height = 0, bytesperline = 0, wpl; + + vfe_get_wm_sizes(pix, plane, &width, &height, &bytesperline); + + wpl = vfe_word_per_line_by_pixel(pix->pixelformat, width); + + reg = height - 1; + reg |= ((wpl + 3) / 4 - 1) << 16; + + writel_relaxed(reg, vfe->base + + vfe_0_bus_image_master_n_wr_image_size(wm)); + + wpl = vfe_word_per_line_by_bytes(bytesperline); + + reg = 0x3; + reg |= (height - 1) << 2; + reg |= ((wpl + 1) / 2) << 16; + + writel_relaxed(reg, vfe->base + + vfe_0_bus_image_master_n_wr_buffer_cfg(wm)); + } else { + writel_relaxed(0, vfe->base + + vfe_0_bus_image_master_n_wr_image_size(wm)); + writel_relaxed(0, vfe->base + + vfe_0_bus_image_master_n_wr_buffer_cfg(wm)); + } +} + +static void vfe_wm_set_framedrop_period(struct vfe_device *vfe, u8 wm, u8 per) +{ + u32 reg; + + reg = readl_relaxed(vfe->base + + vfe_0_bus_image_master_n_wr_addr_cfg(wm)); + + reg &= ~(vfe_0_bus_image_master_n_wr_addr_cfg_frm_drop_per_mask); + + reg |= (per << vfe_0_bus_image_master_n_wr_addr_cfg_frm_drop_per_shift) + & vfe_0_bus_image_master_n_wr_addr_cfg_frm_drop_per_mask; + + writel_relaxed(reg, + vfe->base + vfe_0_bus_image_master_n_wr_addr_cfg(wm)); +} + +static void vfe_wm_set_framedrop_pattern(struct vfe_device *vfe, u8 wm, + u32 pattern) +{ + writel_relaxed(pattern, vfe->base + vfe_0_bus_image_master_n_wr_framedrop_pattern(wm)); +} + +static void vfe_wm_set_ub_cfg(struct vfe_device *vfe, u8 wm, + u16 offset, u16 depth) +{ + u32 reg; + + reg = (offset << vfe_0_bus_image_master_n_wr_ub_cfg_offset_shift) | + depth; + writel_relaxed(reg, vfe->base + vfe_0_bus_image_master_n_wr_ub_cfg(wm)); +} + +static void vfe_bus_reload_wm(struct vfe_device *vfe, u8 wm) +{ + /* enforce barrier between any outstanding register write */ + wmb(); + + writel_relaxed(vfe_0_bus_cmd_mx_rld_cmd(wm), vfe->base + vfe_0_bus_cmd); + + /* use barrier to make sure bus reload is issued before anything else */ + wmb(); +} + +static void vfe_wm_set_ping_addr(struct vfe_device *vfe, u8 wm, u32 addr) +{ + writel_relaxed(addr, + vfe->base + vfe_0_bus_image_master_n_wr_ping_addr(wm)); +} + +static void vfe_wm_set_pong_addr(struct vfe_device *vfe, u8 wm, u32 addr) +{ + writel_relaxed(addr, + vfe->base + vfe_0_bus_image_master_n_wr_pong_addr(wm)); +} + +static int vfe_wm_get_ping_pong_status(struct vfe_device *vfe, u8 wm) +{ + u32 reg; + + reg = readl_relaxed(vfe->base + vfe_0_bus_ping_pong_status); + + return (reg >> wm) & 0x1; +} + +static void vfe_bus_enable_wr_if(struct vfe_device *vfe, u8 enable) +{ + if (enable) + writel_relaxed(0x101, vfe->base + vfe_0_bus_cfg); + else + writel_relaxed(0, vfe->base + vfe_0_bus_cfg); +} + +static void vfe_bus_connect_wm_to_rdi(struct vfe_device *vfe, u8 wm, + enum vfe_line_id id) +{ + u32 reg; + + reg = vfe_0_rdi_cfg_x_mipi_en_bits; + vfe_reg_set(vfe, vfe_0_rdi_cfg_x(0), reg); + + reg = vfe_0_rdi_cfg_x_rdi_en_bit; + reg |= ((3 * id) << vfe_0_rdi_cfg_x_rdi_stream_sel_shift) & + vfe_0_rdi_cfg_x_rdi_stream_sel_mask; + vfe_reg_set(vfe, vfe_0_rdi_cfg_x(id), reg); + + switch (id) { + case vfe_line_rdi0: + default: + reg = vfe_0_bus_xbar_cfg_x_m_single_stream_sel_val_rdi0 << + vfe_0_bus_xbar_cfg_x_m_single_stream_sel_shift; + break; + case vfe_line_rdi1: + reg = vfe_0_bus_xbar_cfg_x_m_single_stream_sel_val_rdi1 << + vfe_0_bus_xbar_cfg_x_m_single_stream_sel_shift; + break; + case vfe_line_rdi2: + reg = vfe_0_bus_xbar_cfg_x_m_single_stream_sel_val_rdi2 << + vfe_0_bus_xbar_cfg_x_m_single_stream_sel_shift; + break; + } + + if (wm % 2 == 1) + reg <<= 16; + + vfe_reg_set(vfe, vfe_0_bus_xbar_cfg_x(wm), reg); +} + +static void vfe_wm_set_subsample(struct vfe_device *vfe, u8 wm) +{ + writel_relaxed(vfe_0_bus_image_master_n_wr_irq_subsample_pattern_def, + vfe->base + vfe_0_bus_image_master_n_wr_irq_subsample_pattern(wm)); +} + +static void vfe_bus_disconnect_wm_from_rdi(struct vfe_device *vfe, u8 wm, + enum vfe_line_id id) +{ + u32 reg; + + reg = vfe_0_rdi_cfg_x_rdi_en_bit; + vfe_reg_clr(vfe, vfe_0_rdi_cfg_x(id), reg); + + switch (id) { + case vfe_line_rdi0: + default: + reg = vfe_0_bus_xbar_cfg_x_m_single_stream_sel_val_rdi0 << + vfe_0_bus_xbar_cfg_x_m_single_stream_sel_shift; + break; + case vfe_line_rdi1: + reg = vfe_0_bus_xbar_cfg_x_m_single_stream_sel_val_rdi1 << + vfe_0_bus_xbar_cfg_x_m_single_stream_sel_shift; + break; + case vfe_line_rdi2: + reg = vfe_0_bus_xbar_cfg_x_m_single_stream_sel_val_rdi2 << + vfe_0_bus_xbar_cfg_x_m_single_stream_sel_shift; + break; + } + + if (wm % 2 == 1) + reg <<= 16; + + vfe_reg_clr(vfe, vfe_0_bus_xbar_cfg_x(wm), reg); +} + +static void vfe_set_xbar_cfg(struct vfe_device *vfe, struct vfe_output *output, + u8 enable) +{ + struct vfe_line *line = container_of(output, struct vfe_line, output); + u32 p = line->video_out.active_fmt.fmt.pix_mp.pixelformat; + u32 reg; + + switch (p) { + case v4l2_pix_fmt_nv12: + case v4l2_pix_fmt_nv21: + case v4l2_pix_fmt_nv16: + case v4l2_pix_fmt_nv61: + reg = vfe_0_bus_xbar_cfg_x_m_single_stream_sel_luma << + vfe_0_bus_xbar_cfg_x_m_single_stream_sel_shift; + + if (output->wm_idx[0] % 2 == 1) + reg <<= 16; + + if (enable) + vfe_reg_set(vfe, + vfe_0_bus_xbar_cfg_x(output->wm_idx[0]), + reg); + else + vfe_reg_clr(vfe, + vfe_0_bus_xbar_cfg_x(output->wm_idx[0]), + reg); + + reg = vfe_0_bus_xbar_cfg_x_m_pair_stream_en; + if (p == v4l2_pix_fmt_nv12 || p == v4l2_pix_fmt_nv16) + reg |= vfe_0_bus_xbar_cfg_x_m_pair_stream_swap_inter_intra; + + if (output->wm_idx[1] % 2 == 1) + reg <<= 16; + + if (enable) + vfe_reg_set(vfe, + vfe_0_bus_xbar_cfg_x(output->wm_idx[1]), + reg); + else + vfe_reg_clr(vfe, + vfe_0_bus_xbar_cfg_x(output->wm_idx[1]), + reg); + break; + case v4l2_pix_fmt_yuyv: + case v4l2_pix_fmt_yvyu: + case v4l2_pix_fmt_vyuy: + case v4l2_pix_fmt_uyvy: + reg = vfe_0_bus_xbar_cfg_x_m_realign_buf_en; + reg |= vfe_0_bus_xbar_cfg_x_m_pair_stream_en; + + if (p == v4l2_pix_fmt_yuyv || p == v4l2_pix_fmt_yvyu) + reg |= vfe_0_bus_xbar_cfg_x_m_pair_stream_swap_inter_intra; + + if (output->wm_idx[0] % 2 == 1) + reg <<= 16; + + if (enable) + vfe_reg_set(vfe, + vfe_0_bus_xbar_cfg_x(output->wm_idx[0]), + reg); + else + vfe_reg_clr(vfe, + vfe_0_bus_xbar_cfg_x(output->wm_idx[0]), + reg); + break; + default: + break; + } +} + +static void vfe_set_realign_cfg(struct vfe_device *vfe, struct vfe_line *line, + u8 enable) +{ + u32 p = line->video_out.active_fmt.fmt.pix_mp.pixelformat; + u32 val = vfe_0_module_zoom_en_realign_buf; + + if (p != v4l2_pix_fmt_yuyv && p != v4l2_pix_fmt_yvyu && + p != v4l2_pix_fmt_vyuy && p != v4l2_pix_fmt_uyvy) + return; + + if (enable) { + vfe_reg_set(vfe, vfe_0_module_zoom_en, val); + } else { + vfe_reg_clr(vfe, vfe_0_module_zoom_en, val); + return; + } + + val = vfe_0_realign_buf_cfg_hsub_enable; + + if (p == v4l2_pix_fmt_uyvy || p == v4l2_pix_fmt_yuyv) + val |= vfe_0_realign_buf_cfg_cr_odd_pixel; + else + val |= vfe_0_realign_buf_cfg_cb_odd_pixel; + + writel_relaxed(val, vfe->base + vfe_0_realign_buf_cfg); +} + +static void vfe_set_rdi_cid(struct vfe_device *vfe, enum vfe_line_id id, u8 cid) +{ + vfe_reg_clr(vfe, vfe_0_rdi_cfg_x(id), + vfe_0_rdi_cfg_x_rdi_m0_sel_mask); + + vfe_reg_set(vfe, vfe_0_rdi_cfg_x(id), + cid << vfe_0_rdi_cfg_x_rdi_m0_sel_shift); +} + +static void vfe_reg_update(struct vfe_device *vfe, enum vfe_line_id line_id) +{ + vfe->reg_update |= vfe_0_reg_update_line_n(line_id); + + /* enforce barrier between line update and commit */ + wmb(); + + writel_relaxed(vfe->reg_update, vfe->base + vfe_0_reg_update); + + /* make sure register update is issued before further reg writes */ + wmb(); +} + +static inline void vfe_reg_update_clear(struct vfe_device *vfe, + enum vfe_line_id line_id) +{ + vfe->reg_update &= ~vfe_0_reg_update_line_n(line_id); +} + +static void vfe_enable_irq_wm_line(struct vfe_device *vfe, u8 wm, + enum vfe_line_id line_id, u8 enable) +{ + u32 irq_en0 = vfe_0_irq_mask_0_image_master_n_ping_pong(wm) | + vfe_0_irq_mask_0_line_n_reg_update(line_id); + u32 irq_en1 = vfe_0_irq_mask_1_image_master_n_bus_overflow(wm) | + vfe_0_irq_mask_1_rdin_sof(line_id); + + if (enable) { + vfe_reg_set(vfe, vfe_0_irq_mask_0, irq_en0); + vfe_reg_set(vfe, vfe_0_irq_mask_1, irq_en1); + } else { + vfe_reg_clr(vfe, vfe_0_irq_mask_0, irq_en0); + vfe_reg_clr(vfe, vfe_0_irq_mask_1, irq_en1); + } +} + +static void vfe_enable_irq_pix_line(struct vfe_device *vfe, u8 comp, + enum vfe_line_id line_id, u8 enable) +{ + struct vfe_output *output = &vfe->line[line_id].output; + unsigned int i; + u32 irq_en0; + u32 irq_en1; + u32 comp_mask = 0; + + irq_en0 = vfe_0_irq_mask_0_camif_sof; + irq_en0 |= vfe_0_irq_mask_0_camif_eof; + irq_en0 |= vfe_0_irq_mask_0_image_composite_done_n(comp); + irq_en0 |= vfe_0_irq_mask_0_line_n_reg_update(line_id); + irq_en1 = vfe_0_irq_mask_1_camif_error; + for (i = 0; i < output->wm_num; i++) { + irq_en1 |= vfe_0_irq_mask_1_image_master_n_bus_overflow(output->wm_idx[i]); + comp_mask |= (1 << output->wm_idx[i]) << comp * 8; + } + + if (enable) { + vfe_reg_set(vfe, vfe_0_irq_mask_0, irq_en0); + vfe_reg_set(vfe, vfe_0_irq_mask_1, irq_en1); + vfe_reg_set(vfe, vfe_0_irq_composite_mask_0, comp_mask); + } else { + vfe_reg_clr(vfe, vfe_0_irq_mask_0, irq_en0); + vfe_reg_clr(vfe, vfe_0_irq_mask_1, irq_en1); + vfe_reg_clr(vfe, vfe_0_irq_composite_mask_0, comp_mask); + } +} + +static void vfe_enable_irq_common(struct vfe_device *vfe) +{ + u32 irq_en0 = vfe_0_irq_mask_0_reset_ack; + u32 irq_en1 = vfe_0_irq_mask_1_violation | + vfe_0_irq_mask_1_bus_bdg_halt_ack; + + vfe_reg_set(vfe, vfe_0_irq_mask_0, irq_en0); + vfe_reg_set(vfe, vfe_0_irq_mask_1, irq_en1); +} + +static void vfe_set_demux_cfg(struct vfe_device *vfe, struct vfe_line *line) +{ + u32 val, even_cfg, odd_cfg; + + writel_relaxed(vfe_0_demux_cfg_period, vfe->base + vfe_0_demux_cfg); + + val = vfe_0_demux_gain_0_ch0_even | vfe_0_demux_gain_0_ch0_odd; + writel_relaxed(val, vfe->base + vfe_0_demux_gain_0); + + val = vfe_0_demux_gain_1_ch1 | vfe_0_demux_gain_1_ch2; + writel_relaxed(val, vfe->base + vfe_0_demux_gain_1); + + switch (line->fmt[msm_vfe_pad_sink].code) { + case media_bus_fmt_yuyv8_2x8: + even_cfg = vfe_0_demux_even_cfg_pattern_yuyv; + odd_cfg = vfe_0_demux_odd_cfg_pattern_yuyv; + break; + case media_bus_fmt_yvyu8_2x8: + even_cfg = vfe_0_demux_even_cfg_pattern_yvyu; + odd_cfg = vfe_0_demux_odd_cfg_pattern_yvyu; + break; + case media_bus_fmt_uyvy8_2x8: + default: + even_cfg = vfe_0_demux_even_cfg_pattern_uyvy; + odd_cfg = vfe_0_demux_odd_cfg_pattern_uyvy; + break; + case media_bus_fmt_vyuy8_2x8: + even_cfg = vfe_0_demux_even_cfg_pattern_vyuy; + odd_cfg = vfe_0_demux_odd_cfg_pattern_vyuy; + break; + } + + writel_relaxed(even_cfg, vfe->base + vfe_0_demux_even_cfg); + writel_relaxed(odd_cfg, vfe->base + vfe_0_demux_odd_cfg); +} + +static void vfe_set_scale_cfg(struct vfe_device *vfe, struct vfe_line *line) +{ + u32 p = line->video_out.active_fmt.fmt.pix_mp.pixelformat; + u32 reg; + u16 input, output; + u8 interp_reso; + u32 phase_mult; + + writel_relaxed(0x3, vfe->base + vfe_0_scale_enc_y_cfg); + + input = line->fmt[msm_vfe_pad_sink].width - 1; + output = line->compose.width - 1; + reg = (output << 16) | input; + writel_relaxed(reg, vfe->base + vfe_0_scale_enc_y_h_image_size); + + interp_reso = vfe_calc_interp_reso(input, output); + phase_mult = input * (1 << (14 + interp_reso)) / output; + reg = (interp_reso << 28) | phase_mult; + writel_relaxed(reg, vfe->base + vfe_0_scale_enc_y_h_phase); + + input = line->fmt[msm_vfe_pad_sink].height - 1; + output = line->compose.height - 1; + reg = (output << 16) | input; + writel_relaxed(reg, vfe->base + vfe_0_scale_enc_y_v_image_size); + + interp_reso = vfe_calc_interp_reso(input, output); + phase_mult = input * (1 << (14 + interp_reso)) / output; + reg = (interp_reso << 28) | phase_mult; + writel_relaxed(reg, vfe->base + vfe_0_scale_enc_y_v_phase); + + writel_relaxed(0x3, vfe->base + vfe_0_scale_enc_cbcr_cfg); + + input = line->fmt[msm_vfe_pad_sink].width - 1; + output = line->compose.width / 2 - 1; + reg = (output << 16) | input; + writel_relaxed(reg, vfe->base + vfe_0_scale_enc_cbcr_h_image_size); + + interp_reso = vfe_calc_interp_reso(input, output); + phase_mult = input * (1 << (14 + interp_reso)) / output; + reg = (interp_reso << 28) | phase_mult; + writel_relaxed(reg, vfe->base + vfe_0_scale_enc_cbcr_h_phase); + + input = line->fmt[msm_vfe_pad_sink].height - 1; + output = line->compose.height - 1; + if (p == v4l2_pix_fmt_nv12 || p == v4l2_pix_fmt_nv21) + output = line->compose.height / 2 - 1; + reg = (output << 16) | input; + writel_relaxed(reg, vfe->base + vfe_0_scale_enc_cbcr_v_image_size); + + interp_reso = vfe_calc_interp_reso(input, output); + phase_mult = input * (1 << (14 + interp_reso)) / output; + reg = (interp_reso << 28) | phase_mult; + writel_relaxed(reg, vfe->base + vfe_0_scale_enc_cbcr_v_phase); +} + +static void vfe_set_crop_cfg(struct vfe_device *vfe, struct vfe_line *line) +{ + u32 p = line->video_out.active_fmt.fmt.pix_mp.pixelformat; + u32 reg; + u16 first, last; + + first = line->crop.left; + last = line->crop.left + line->crop.width - 1; + reg = (first << 16) | last; + writel_relaxed(reg, vfe->base + vfe_0_crop_enc_y_width); + + first = line->crop.top; + last = line->crop.top + line->crop.height - 1; + reg = (first << 16) | last; + writel_relaxed(reg, vfe->base + vfe_0_crop_enc_y_height); + + first = line->crop.left / 2; + last = line->crop.left / 2 + line->crop.width / 2 - 1; + reg = (first << 16) | last; + writel_relaxed(reg, vfe->base + vfe_0_crop_enc_cbcr_width); + + first = line->crop.top; + last = line->crop.top + line->crop.height - 1; + if (p == v4l2_pix_fmt_nv12 || p == v4l2_pix_fmt_nv21) { + first = line->crop.top / 2; + last = line->crop.top / 2 + line->crop.height / 2 - 1; + } + reg = (first << 16) | last; + writel_relaxed(reg, vfe->base + vfe_0_crop_enc_cbcr_height); +} + +static void vfe_set_clamp_cfg(struct vfe_device *vfe) +{ + u32 val = vfe_0_clamp_enc_max_cfg_ch0 | + vfe_0_clamp_enc_max_cfg_ch1 | + vfe_0_clamp_enc_max_cfg_ch2; + + writel_relaxed(val, vfe->base + vfe_0_clamp_enc_max_cfg); + + val = vfe_0_clamp_enc_min_cfg_ch0 | + vfe_0_clamp_enc_min_cfg_ch1 | + vfe_0_clamp_enc_min_cfg_ch2; + + writel_relaxed(val, vfe->base + vfe_0_clamp_enc_min_cfg); +} + +static void vfe_set_cgc_override(struct vfe_device *vfe, u8 wm, u8 enable) +{ + /* empty */ +} + +static void vfe_set_camif_cfg(struct vfe_device *vfe, struct vfe_line *line) +{ + u32 val; + + switch (line->fmt[msm_vfe_pad_sink].code) { + case media_bus_fmt_yuyv8_2x8: + val = vfe_0_core_cfg_pixel_pattern_ycbycr; + break; + case media_bus_fmt_yvyu8_2x8: + val = vfe_0_core_cfg_pixel_pattern_ycrycb; + break; + case media_bus_fmt_uyvy8_2x8: + default: + val = vfe_0_core_cfg_pixel_pattern_cbycry; + break; + case media_bus_fmt_vyuy8_2x8: + val = vfe_0_core_cfg_pixel_pattern_crycby; + break; + } + + val |= vfe_0_core_cfg_composite_reg_update_en; + writel_relaxed(val, vfe->base + vfe_0_core_cfg); + + val = line->fmt[msm_vfe_pad_sink].width * 2 - 1; + val |= (line->fmt[msm_vfe_pad_sink].height - 1) << 16; + writel_relaxed(val, vfe->base + vfe_0_camif_frame_cfg); + + val = line->fmt[msm_vfe_pad_sink].width * 2 - 1; + writel_relaxed(val, vfe->base + vfe_0_camif_window_width_cfg); + + val = line->fmt[msm_vfe_pad_sink].height - 1; + writel_relaxed(val, vfe->base + vfe_0_camif_window_height_cfg); + + val = 0xffffffff; + writel_relaxed(val, vfe->base + vfe_0_camif_subsample_cfg); + + val = 0xffffffff; + writel_relaxed(val, vfe->base + vfe_0_camif_irq_framedrop_pattern); + + val = 0xffffffff; + writel_relaxed(val, vfe->base + vfe_0_camif_irq_subsample_pattern); + + val = vfe_0_rdi_cfg_x_mipi_en_bits; + vfe_reg_set(vfe, vfe_0_rdi_cfg_x(0), val); + + val = vfe_0_camif_cfg_vfe_output_en; + writel_relaxed(val, vfe->base + vfe_0_camif_cfg); +} + +static void vfe_set_camif_cmd(struct vfe_device *vfe, u8 enable) +{ + u32 cmd; + + cmd = vfe_0_camif_cmd_clear_camif_status | vfe_0_camif_cmd_no_change; + writel_relaxed(cmd, vfe->base + vfe_0_camif_cmd); + + /* make sure camif command is issued written before it is changed again */ + wmb(); + + if (enable) + cmd = vfe_0_camif_cmd_enable_frame_boundary; + else + cmd = vfe_0_camif_cmd_disable_frame_boundary; + + writel_relaxed(cmd, vfe->base + vfe_0_camif_cmd); +} + +static void vfe_set_module_cfg(struct vfe_device *vfe, u8 enable) +{ + u32 val_lens = vfe_0_module_lens_en_demux | + vfe_0_module_lens_en_chroma_upsample; + u32 val_zoom = vfe_0_module_zoom_en_scale_enc | + vfe_0_module_zoom_en_crop_enc; + + if (enable) { + vfe_reg_set(vfe, vfe_0_module_lens_en, val_lens); + vfe_reg_set(vfe, vfe_0_module_zoom_en, val_zoom); + } else { + vfe_reg_clr(vfe, vfe_0_module_lens_en, val_lens); + vfe_reg_clr(vfe, vfe_0_module_zoom_en, val_zoom); + } +} + +static int vfe_camif_wait_for_stop(struct vfe_device *vfe, struct device *dev) +{ + u32 val; + int ret; + + ret = readl_poll_timeout(vfe->base + vfe_0_camif_status, + val, + (val & vfe_0_camif_status_halt), + camif_timeout_sleep_us, + camif_timeout_all_us); + if (ret < 0) + dev_err(dev, "%s: camif stop timeout ", __func__); + + return ret; +} + +/* + * vfe_isr - vfe module interrupt handler + * @irq: interrupt line + * @dev: vfe device + * + * return irq_handled on success + */ +static irqreturn_t vfe_isr(int irq, void *dev) +{ + struct vfe_device *vfe = dev; + u32 value0, value1; + int i, j; + + vfe->ops->isr_read(vfe, &value0, &value1); + + dev_dbg(vfe->camss->dev, "vfe: status0 = 0x%08x, status1 = 0x%08x ", + value0, value1); + + if (value0 & vfe_0_irq_status_0_reset_ack) + vfe->isr_ops.reset_ack(vfe); + + if (value1 & vfe_0_irq_status_1_violation) + vfe->ops->violation_read(vfe); + + if (value1 & vfe_0_irq_status_1_bus_bdg_halt_ack) + vfe->isr_ops.halt_ack(vfe); + + for (i = vfe_line_rdi0; i < vfe->line_num; i++) + if (value0 & vfe_0_irq_status_0_line_n_reg_update(i)) + vfe->isr_ops.reg_update(vfe, i); + + if (value0 & vfe_0_irq_status_0_camif_sof) + vfe->isr_ops.sof(vfe, vfe_line_pix); + + for (i = vfe_line_rdi0; i <= vfe_line_rdi2; i++) + if (value1 & vfe_0_irq_status_1_rdin_sof(i)) + vfe->isr_ops.sof(vfe, i); + + for (i = 0; i < msm_vfe_composite_irq_num; i++) + if (value0 & vfe_0_irq_status_0_image_composite_done_n(i)) { + vfe->isr_ops.comp_done(vfe, i); + for (j = 0; j < array_size(vfe->wm_output_map); j++) + if (vfe->wm_output_map[j] == vfe_line_pix) + value0 &= ~vfe_0_irq_mask_0_image_master_n_ping_pong(j); + } + + for (i = 0; i < msm_vfe_image_masters_num; i++) + if (value0 & vfe_0_irq_status_0_image_master_n_ping_pong(i)) + vfe->isr_ops.wm_done(vfe, i); + + return irq_handled; +} + +static u16 vfe_get_ub_size(u8 vfe_id) +{ + /* on vfe4.8 the ub-size is the same on both instances */ + return msm_vfe_vfe0_ub_size_rdi; +} + +static void vfe_wm_enable(struct vfe_device *vfe, u8 wm, u8 enable) +{ + if (enable) + writel_relaxed(2 << vfe_0_bus_image_master_n_shift(wm), + vfe->base + vfe_0_bus_image_master_cmd); + else + writel_relaxed(1 << vfe_0_bus_image_master_n_shift(wm), + vfe->base + vfe_0_bus_image_master_cmd); + + /* the wm must be enabled before sending other commands */ + wmb(); +} + +static void vfe_set_qos(struct vfe_device *vfe) +{ + u32 val = vfe_0_bus_bdg_qos_cfg_0_cfg; + u32 val3 = vfe_0_bus_bdg_qos_cfg_3_cfg; + u32 val4 = vfe_0_bus_bdg_qos_cfg_4_cfg; + u32 val7 = vfe_0_bus_bdg_qos_cfg_7_cfg; + + writel_relaxed(val, vfe->base + vfe_0_bus_bdg_qos_cfg_0); + writel_relaxed(val, vfe->base + vfe_0_bus_bdg_qos_cfg_1); + writel_relaxed(val, vfe->base + vfe_0_bus_bdg_qos_cfg_2); + writel_relaxed(val3, vfe->base + vfe_0_bus_bdg_qos_cfg_3); + writel_relaxed(val4, vfe->base + vfe_0_bus_bdg_qos_cfg_4); + writel_relaxed(val4, vfe->base + vfe_0_bus_bdg_qos_cfg_5); + writel_relaxed(val4, vfe->base + vfe_0_bus_bdg_qos_cfg_6); + writel_relaxed(val7, vfe->base + vfe_0_bus_bdg_qos_cfg_7); +} + +static void vfe_set_ds(struct vfe_device *vfe) +{ + u32 val = vfe_0_bus_bdg_ds_cfg_0_cfg; + u32 val16 = vfe_0_bus_bdg_ds_cfg_16_cfg; + + writel_relaxed(val, vfe->base + vfe_0_bus_bdg_ds_cfg_0); + writel_relaxed(val, vfe->base + vfe_0_bus_bdg_ds_cfg_1); + writel_relaxed(val, vfe->base + vfe_0_bus_bdg_ds_cfg_2); + writel_relaxed(val, vfe->base + vfe_0_bus_bdg_ds_cfg_3); + writel_relaxed(val, vfe->base + vfe_0_bus_bdg_ds_cfg_4); + writel_relaxed(val, vfe->base + vfe_0_bus_bdg_ds_cfg_5); + writel_relaxed(val, vfe->base + vfe_0_bus_bdg_ds_cfg_6); + writel_relaxed(val, vfe->base + vfe_0_bus_bdg_ds_cfg_7); + writel_relaxed(val, vfe->base + vfe_0_bus_bdg_ds_cfg_8); + writel_relaxed(val, vfe->base + vfe_0_bus_bdg_ds_cfg_9); + writel_relaxed(val, vfe->base + vfe_0_bus_bdg_ds_cfg_10); + writel_relaxed(val, vfe->base + vfe_0_bus_bdg_ds_cfg_11); + writel_relaxed(val, vfe->base + vfe_0_bus_bdg_ds_cfg_12); + writel_relaxed(val, vfe->base + vfe_0_bus_bdg_ds_cfg_13); + writel_relaxed(val, vfe->base + vfe_0_bus_bdg_ds_cfg_14); + writel_relaxed(val, vfe->base + vfe_0_bus_bdg_ds_cfg_15); + writel_relaxed(val16, vfe->base + vfe_0_bus_bdg_ds_cfg_16); +} + +static void vfe_isr_read(struct vfe_device *vfe, u32 *value0, u32 *value1) +{ + *value0 = readl_relaxed(vfe->base + vfe_0_irq_status_0); + *value1 = readl_relaxed(vfe->base + vfe_0_irq_status_1); + + writel_relaxed(*value0, vfe->base + vfe_0_irq_clear_0); + writel_relaxed(*value1, vfe->base + vfe_0_irq_clear_1); + + /* enforce barrier between local & global irq clear */ + wmb(); + writel_relaxed(vfe_0_irq_cmd_global_clear, vfe->base + vfe_0_irq_cmd); +} + +static void vfe_violation_read(struct vfe_device *vfe) +{ + u32 violation = readl_relaxed(vfe->base + vfe_0_violation_status); + + pr_err_ratelimited("vfe: violation = 0x%08x ", violation); +} + +static const struct vfe_hw_ops_gen1 vfe_ops_gen1_4_8 = { + .bus_connect_wm_to_rdi = vfe_bus_connect_wm_to_rdi, + .bus_disconnect_wm_from_rdi = vfe_bus_disconnect_wm_from_rdi, + .bus_enable_wr_if = vfe_bus_enable_wr_if, + .bus_reload_wm = vfe_bus_reload_wm, + .camif_wait_for_stop = vfe_camif_wait_for_stop, + .enable_irq_common = vfe_enable_irq_common, + .enable_irq_pix_line = vfe_enable_irq_pix_line, + .enable_irq_wm_line = vfe_enable_irq_wm_line, + .get_ub_size = vfe_get_ub_size, + .halt_clear = vfe_halt_clear, + .halt_request = vfe_halt_request, + .set_camif_cfg = vfe_set_camif_cfg, + .set_camif_cmd = vfe_set_camif_cmd, + .set_cgc_override = vfe_set_cgc_override, + .set_clamp_cfg = vfe_set_clamp_cfg, + .set_crop_cfg = vfe_set_crop_cfg, + .set_demux_cfg = vfe_set_demux_cfg, + .set_ds = vfe_set_ds, + .set_module_cfg = vfe_set_module_cfg, + .set_qos = vfe_set_qos, + .set_rdi_cid = vfe_set_rdi_cid, + .set_realign_cfg = vfe_set_realign_cfg, + .set_scale_cfg = vfe_set_scale_cfg, + .set_xbar_cfg = vfe_set_xbar_cfg, + .wm_enable = vfe_wm_enable, + .wm_frame_based = vfe_wm_frame_based, + .wm_get_ping_pong_status = vfe_wm_get_ping_pong_status, + .wm_line_based = vfe_wm_line_based, + .wm_set_framedrop_pattern = vfe_wm_set_framedrop_pattern, + .wm_set_framedrop_period = vfe_wm_set_framedrop_period, + .wm_set_ping_addr = vfe_wm_set_ping_addr, + .wm_set_pong_addr = vfe_wm_set_pong_addr, + .wm_set_subsample = vfe_wm_set_subsample, + .wm_set_ub_cfg = vfe_wm_set_ub_cfg, +}; + +static void vfe_subdev_init(struct device *dev, struct vfe_device *vfe) +{ + vfe->isr_ops = vfe_isr_ops_gen1; + vfe->ops_gen1 = &vfe_ops_gen1_4_8; + vfe->video_ops = vfe_video_ops_gen1; + + vfe->line_num = vfe_line_num_gen1; +} + +const struct vfe_hw_ops vfe_ops_4_8 = { + .global_reset = vfe_global_reset, + .hw_version_read = vfe_hw_version_read, + .isr_read = vfe_isr_read, + .isr = vfe_isr, + .reg_update_clear = vfe_reg_update_clear, + .reg_update = vfe_reg_update, + .subdev_init = vfe_subdev_init, + .vfe_disable = vfe_gen1_disable, + .vfe_enable = vfe_gen1_enable, + .vfe_halt = vfe_gen1_halt, + .violation_read = vfe_violation_read, +}; diff --git a/drivers/media/platform/qcom/camss/camss-vfe-gen1.c b/drivers/media/platform/qcom/camss/camss-vfe-gen1.c --- /dev/null +++ b/drivers/media/platform/qcom/camss/camss-vfe-gen1.c +// spdx-license-identifier: gpl-2.0 +/* + * camss-vfe-gen1.c + * + * qualcomm msm camera subsystem - vfe common functionality for gen 1 versions of hw (4.1, 4.7..) + * + * copyright (c) 2020 linaro ltd. + */ + +#include "camss.h" +#include "camss-vfe.h" +#include "camss-vfe-gen1.h" + +/* max number of frame drop updates per frame */ +#define vfe_frame_drop_updates 2 +#define vfe_next_sof_ms 500 + +int vfe_gen1_halt(struct vfe_device *vfe) +{ + unsigned long time; + + reinit_completion(&vfe->halt_complete); + + vfe->ops_gen1->halt_request(vfe); + + time = wait_for_completion_timeout(&vfe->halt_complete, + msecs_to_jiffies(vfe_halt_timeout_ms)); + if (!time) { + dev_err(vfe->camss->dev, "vfe halt timeout "); + return -eio; + } + + return 0; +} + +static int vfe_disable_output(struct vfe_line *line) +{ + struct vfe_device *vfe = to_vfe(line); + struct vfe_output *output = &line->output; + const struct vfe_hw_ops *ops = vfe->ops; + unsigned long flags; + unsigned long time; + unsigned int i; + + spin_lock_irqsave(&vfe->output_lock, flags); + + output->gen1.wait_sof = 1; + spin_unlock_irqrestore(&vfe->output_lock, flags); + + time = wait_for_completion_timeout(&output->sof, msecs_to_jiffies(vfe_next_sof_ms)); + if (!time) + dev_err(vfe->camss->dev, "vfe sof timeout "); + + spin_lock_irqsave(&vfe->output_lock, flags); + for (i = 0; i < output->wm_num; i++) + vfe->ops_gen1->wm_enable(vfe, output->wm_idx[i], 0); + + ops->reg_update(vfe, line->id); + output->wait_reg_update = 1; + spin_unlock_irqrestore(&vfe->output_lock, flags); + + time = wait_for_completion_timeout(&output->reg_update, msecs_to_jiffies(vfe_next_sof_ms)); + if (!time) + dev_err(vfe->camss->dev, "vfe reg update timeout "); + + spin_lock_irqsave(&vfe->output_lock, flags); + + if (line->id != vfe_line_pix) { + vfe->ops_gen1->wm_frame_based(vfe, output->wm_idx[0], 0); + vfe->ops_gen1->bus_disconnect_wm_from_rdi(vfe, output->wm_idx[0], line->id); + vfe->ops_gen1->enable_irq_wm_line(vfe, output->wm_idx[0], line->id, 0); + vfe->ops_gen1->set_cgc_override(vfe, output->wm_idx[0], 0); + spin_unlock_irqrestore(&vfe->output_lock, flags); + } else { + for (i = 0; i < output->wm_num; i++) { + vfe->ops_gen1->wm_line_based(vfe, output->wm_idx[i], null, i, 0); + vfe->ops_gen1->set_cgc_override(vfe, output->wm_idx[i], 0); + } + + vfe->ops_gen1->enable_irq_pix_line(vfe, 0, line->id, 0); + vfe->ops_gen1->set_module_cfg(vfe, 0); + vfe->ops_gen1->set_realign_cfg(vfe, line, 0); + vfe->ops_gen1->set_xbar_cfg(vfe, output, 0); + vfe->ops_gen1->set_camif_cmd(vfe, 0); + + spin_unlock_irqrestore(&vfe->output_lock, flags); + + vfe->ops_gen1->camif_wait_for_stop(vfe, vfe->camss->dev); + } + + return 0; +} + +/* + * vfe_gen1_disable - disable streaming on vfe line + * @line: vfe line + * + * return 0 on success or a negative error code otherwise + */ +int vfe_gen1_disable(struct vfe_line *line) +{ + struct vfe_device *vfe = to_vfe(line); + + vfe_disable_output(line); + + vfe_put_output(line); + + mutex_lock(&vfe->stream_lock); + + if (vfe->stream_count == 1) + vfe->ops_gen1->bus_enable_wr_if(vfe, 0); + + vfe->stream_count--; + + mutex_unlock(&vfe->stream_lock); + + return 0; +} + +static void vfe_output_init_addrs(struct vfe_device *vfe, + struct vfe_output *output, u8 sync, + struct vfe_line *line) +{ + u32 ping_addr; + u32 pong_addr; + unsigned int i; + + output->gen1.active_buf = 0; + + for (i = 0; i < output->wm_num; i++) { + if (output->buf[0]) + ping_addr = output->buf[0]->addr[i]; + else + ping_addr = 0; + + if (output->buf[1]) + pong_addr = output->buf[1]->addr[i]; + else + pong_addr = ping_addr; + + vfe->ops_gen1->wm_set_ping_addr(vfe, output->wm_idx[i], ping_addr); + vfe->ops_gen1->wm_set_pong_addr(vfe, output->wm_idx[i], pong_addr); + if (sync) + vfe->ops_gen1->bus_reload_wm(vfe, output->wm_idx[i]); + } +} + +static void vfe_output_frame_drop(struct vfe_device *vfe, + struct vfe_output *output, + u32 drop_pattern) +{ + u8 drop_period; + unsigned int i; + + /* we need to toggle update period to be valid on next frame */ + output->drop_update_idx++; + output->drop_update_idx %= vfe_frame_drop_updates; + drop_period = vfe_frame_drop_val + output->drop_update_idx; + + for (i = 0; i < output->wm_num; i++) { + vfe->ops_gen1->wm_set_framedrop_period(vfe, output->wm_idx[i], drop_period); + vfe->ops_gen1->wm_set_framedrop_pattern(vfe, output->wm_idx[i], drop_pattern); + } + + vfe->ops->reg_update(vfe, container_of(output, struct vfe_line, output)->id); +} + +static int vfe_enable_output(struct vfe_line *line) +{ + struct vfe_device *vfe = to_vfe(line); + struct vfe_output *output = &line->output; + const struct vfe_hw_ops *ops = vfe->ops; + struct media_entity *sensor; + unsigned long flags; + unsigned int frame_skip = 0; + unsigned int i; + u16 ub_size; + + ub_size = vfe->ops_gen1->get_ub_size(vfe->id); + if (!ub_size) + return -einval; + + sensor = camss_find_sensor(&line->subdev.entity); + if (sensor) { + struct v4l2_subdev *subdev = media_entity_to_v4l2_subdev(sensor); + + v4l2_subdev_call(subdev, sensor, g_skip_frames, &frame_skip); + /* max frame skip is 29 frames */ + if (frame_skip > vfe_frame_drop_val - 1) + frame_skip = vfe_frame_drop_val - 1; + } + + spin_lock_irqsave(&vfe->output_lock, flags); + + ops->reg_update_clear(vfe, line->id); + + if (output->state != vfe_output_reserved) { + dev_err(vfe->camss->dev, "output is not in reserved state %d ", output->state); + spin_unlock_irqrestore(&vfe->output_lock, flags); + return -einval; + } + output->state = vfe_output_idle; + + output->buf[0] = vfe_buf_get_pending(output); + output->buf[1] = vfe_buf_get_pending(output); + + if (!output->buf[0] && output->buf[1]) { + output->buf[0] = output->buf[1]; + output->buf[1] = null; + } + + if (output->buf[0]) + output->state = vfe_output_single; + + if (output->buf[1]) + output->state = vfe_output_continuous; + + switch (output->state) { + case vfe_output_single: + vfe_output_frame_drop(vfe, output, 1 << frame_skip); + break; + case vfe_output_continuous: + vfe_output_frame_drop(vfe, output, 3 << frame_skip); + break; + default: + vfe_output_frame_drop(vfe, output, 0); + break; + } + + output->sequence = 0; + output->gen1.wait_sof = 0; + output->wait_reg_update = 0; + reinit_completion(&output->sof); + reinit_completion(&output->reg_update); + + vfe_output_init_addrs(vfe, output, 0, line); + + if (line->id != vfe_line_pix) { + vfe->ops_gen1->set_cgc_override(vfe, output->wm_idx[0], 1); + vfe->ops_gen1->enable_irq_wm_line(vfe, output->wm_idx[0], line->id, 1); + vfe->ops_gen1->bus_connect_wm_to_rdi(vfe, output->wm_idx[0], line->id); + vfe->ops_gen1->wm_set_subsample(vfe, output->wm_idx[0]); + vfe->ops_gen1->set_rdi_cid(vfe, line->id, 0); + vfe->ops_gen1->wm_set_ub_cfg(vfe, output->wm_idx[0], + (ub_size + 1) * output->wm_idx[0], ub_size); + vfe->ops_gen1->wm_frame_based(vfe, output->wm_idx[0], 1); + vfe->ops_gen1->wm_enable(vfe, output->wm_idx[0], 1); + vfe->ops_gen1->bus_reload_wm(vfe, output->wm_idx[0]); + } else { + ub_size /= output->wm_num; + for (i = 0; i < output->wm_num; i++) { + vfe->ops_gen1->set_cgc_override(vfe, output->wm_idx[i], 1); + vfe->ops_gen1->wm_set_subsample(vfe, output->wm_idx[i]); + vfe->ops_gen1->wm_set_ub_cfg(vfe, output->wm_idx[i], + (ub_size + 1) * output->wm_idx[i], ub_size); + vfe->ops_gen1->wm_line_based(vfe, output->wm_idx[i], + &line->video_out.active_fmt.fmt.pix_mp, i, 1); + vfe->ops_gen1->wm_enable(vfe, output->wm_idx[i], 1); + vfe->ops_gen1->bus_reload_wm(vfe, output->wm_idx[i]); + } + vfe->ops_gen1->enable_irq_pix_line(vfe, 0, line->id, 1); + vfe->ops_gen1->set_module_cfg(vfe, 1); + vfe->ops_gen1->set_camif_cfg(vfe, line); + vfe->ops_gen1->set_realign_cfg(vfe, line, 1); + vfe->ops_gen1->set_xbar_cfg(vfe, output, 1); + vfe->ops_gen1->set_demux_cfg(vfe, line); + vfe->ops_gen1->set_scale_cfg(vfe, line); + vfe->ops_gen1->set_crop_cfg(vfe, line); + vfe->ops_gen1->set_clamp_cfg(vfe); + vfe->ops_gen1->set_camif_cmd(vfe, 1); + } + + ops->reg_update(vfe, line->id); + + spin_unlock_irqrestore(&vfe->output_lock, flags); + + return 0; +} + +static int vfe_get_output(struct vfe_line *line) +{ + struct vfe_device *vfe = to_vfe(line); + struct vfe_output *output; + struct v4l2_format *f = &line->video_out.active_fmt; + unsigned long flags; + int i; + int wm_idx; + + spin_lock_irqsave(&vfe->output_lock, flags); + + output = &line->output; + if (output->state != vfe_output_off) { + dev_err(vfe->camss->dev, "output is running "); + goto error; + } + output->state = vfe_output_reserved; + + output->gen1.active_buf = 0; + + switch (f->fmt.pix_mp.pixelformat) { + case v4l2_pix_fmt_nv12: + case v4l2_pix_fmt_nv21: + case v4l2_pix_fmt_nv16: + case v4l2_pix_fmt_nv61: + output->wm_num = 2; + break; + default: + output->wm_num = 1; + break; + } + + for (i = 0; i < output->wm_num; i++) { + wm_idx = vfe_reserve_wm(vfe, line->id); + if (wm_idx < 0) { + dev_err(vfe->camss->dev, "can not reserve wm "); + goto error_get_wm; + } + output->wm_idx[i] = wm_idx; + } + + output->drop_update_idx = 0; + + spin_unlock_irqrestore(&vfe->output_lock, flags); + + return 0; + +error_get_wm: + for (i--; i >= 0; i--) + vfe_release_wm(vfe, output->wm_idx[i]); + output->state = vfe_output_off; +error: + spin_unlock_irqrestore(&vfe->output_lock, flags); + + return -einval; +} + +int vfe_gen1_enable(struct vfe_line *line) +{ + struct vfe_device *vfe = to_vfe(line); + int ret; + + mutex_lock(&vfe->stream_lock); + + if (!vfe->stream_count) { + vfe->ops_gen1->enable_irq_common(vfe); + vfe->ops_gen1->bus_enable_wr_if(vfe, 1); + vfe->ops_gen1->set_qos(vfe); + vfe->ops_gen1->set_ds(vfe); + } + + vfe->stream_count++; + + mutex_unlock(&vfe->stream_lock); + + ret = vfe_get_output(line); + if (ret < 0) + goto error_get_output; + + ret = vfe_enable_output(line); + if (ret < 0) + goto error_enable_output; + + vfe->was_streaming = 1; + + return 0; + +error_enable_output: + vfe_put_output(line); + +error_get_output: + mutex_lock(&vfe->stream_lock); + + if (vfe->stream_count == 1) + vfe->ops_gen1->bus_enable_wr_if(vfe, 0); + + vfe->stream_count--; + + mutex_unlock(&vfe->stream_lock); + + return ret; +} + +static void vfe_output_update_ping_addr(struct vfe_device *vfe, + struct vfe_output *output, u8 sync, + struct vfe_line *line) +{ + u32 addr; + unsigned int i; + + for (i = 0; i < output->wm_num; i++) { + if (output->buf[0]) + addr = output->buf[0]->addr[i]; + else + addr = 0; + + vfe->ops_gen1->wm_set_ping_addr(vfe, output->wm_idx[i], addr); + if (sync) + vfe->ops_gen1->bus_reload_wm(vfe, output->wm_idx[i]); + } +} + +static void vfe_output_update_pong_addr(struct vfe_device *vfe, + struct vfe_output *output, u8 sync, + struct vfe_line *line) +{ + u32 addr; + unsigned int i; + + for (i = 0; i < output->wm_num; i++) { + if (output->buf[1]) + addr = output->buf[1]->addr[i]; + else + addr = 0; + + vfe->ops_gen1->wm_set_pong_addr(vfe, output->wm_idx[i], addr); + if (sync) + vfe->ops_gen1->bus_reload_wm(vfe, output->wm_idx[i]); + } +} + +static void vfe_buf_update_wm_on_next(struct vfe_device *vfe, + struct vfe_output *output) +{ + switch (output->state) { + case vfe_output_continuous: + vfe_output_frame_drop(vfe, output, 3); + break; + case vfe_output_single: + default: + dev_err_ratelimited(vfe->camss->dev, + "next buf in wrong state! %d ", + output->state); + break; + } +} + +static void vfe_buf_update_wm_on_last(struct vfe_device *vfe, + struct vfe_output *output) +{ + switch (output->state) { + case vfe_output_continuous: + output->state = vfe_output_single; + vfe_output_frame_drop(vfe, output, 1); + break; + case vfe_output_single: + output->state = vfe_output_stopping; + vfe_output_frame_drop(vfe, output, 0); + break; + default: + dev_err_ratelimited(vfe->camss->dev, + "last buff in wrong state! %d ", + output->state); + break; + } +} + +static void vfe_buf_update_wm_on_new(struct vfe_device *vfe, + struct vfe_output *output, + struct camss_buffer *new_buf, + struct vfe_line *line) +{ + int inactive_idx; + + switch (output->state) { + case vfe_output_single: + inactive_idx = !output->gen1.active_buf; + + if (!output->buf[inactive_idx]) { + output->buf[inactive_idx] = new_buf; + + if (inactive_idx) + vfe_output_update_pong_addr(vfe, output, 0, line); + else + vfe_output_update_ping_addr(vfe, output, 0, line); + + vfe_output_frame_drop(vfe, output, 3); + output->state = vfe_output_continuous; + } else { + vfe_buf_add_pending(output, new_buf); + dev_err_ratelimited(vfe->camss->dev, + "inactive buffer is busy "); + } + break; + + case vfe_output_idle: + if (!output->buf[0]) { + output->buf[0] = new_buf; + + vfe_output_init_addrs(vfe, output, 1, line); + vfe_output_frame_drop(vfe, output, 1); + + output->state = vfe_output_single; + } else { + vfe_buf_add_pending(output, new_buf); + dev_err_ratelimited(vfe->camss->dev, + "output idle with buffer set! "); + } + break; + + case vfe_output_continuous: + default: + vfe_buf_add_pending(output, new_buf); + break; + } +} + +/* + * vfe_isr_halt_ack - process halt ack + * @vfe: vfe device + */ +static void vfe_isr_halt_ack(struct vfe_device *vfe) +{ + complete(&vfe->halt_complete); + vfe->ops_gen1->halt_clear(vfe); +} + +/* + * vfe_isr_sof - process start of frame interrupt + * @vfe: vfe device + * @line_id: vfe line + */ +static void vfe_isr_sof(struct vfe_device *vfe, enum vfe_line_id line_id) +{ + struct vfe_output *output; + unsigned long flags; + + spin_lock_irqsave(&vfe->output_lock, flags); + output = &vfe->line[line_id].output; + if (output->gen1.wait_sof) { + output->gen1.wait_sof = 0; + complete(&output->sof); + } + spin_unlock_irqrestore(&vfe->output_lock, flags); +} + +/* + * vfe_isr_reg_update - process reg update interrupt + * @vfe: vfe device + * @line_id: vfe line + */ +static void vfe_isr_reg_update(struct vfe_device *vfe, enum vfe_line_id line_id) +{ + struct vfe_output *output; + struct vfe_line *line = &vfe->line[line_id]; + unsigned long flags; + + spin_lock_irqsave(&vfe->output_lock, flags); + vfe->ops->reg_update_clear(vfe, line_id); + + output = &line->output; + + if (output->wait_reg_update) { + output->wait_reg_update = 0; + complete(&output->reg_update); + spin_unlock_irqrestore(&vfe->output_lock, flags); + return; + } + + if (output->state == vfe_output_stopping) { + /* release last buffer when hw is idle */ + if (output->last_buffer) { + vb2_buffer_done(&output->last_buffer->vb.vb2_buf, + vb2_buf_state_done); + output->last_buffer = null; + } + output->state = vfe_output_idle; + + /* buffers received in stopping state are queued in */ + /* dma pending queue, start next capture here */ + + output->buf[0] = vfe_buf_get_pending(output); + output->buf[1] = vfe_buf_get_pending(output); + + if (!output->buf[0] && output->buf[1]) { + output->buf[0] = output->buf[1]; + output->buf[1] = null; + } + + if (output->buf[0]) + output->state = vfe_output_single; + + if (output->buf[1]) + output->state = vfe_output_continuous; + + switch (output->state) { + case vfe_output_single: + vfe_output_frame_drop(vfe, output, 2); + break; + case vfe_output_continuous: + vfe_output_frame_drop(vfe, output, 3); + break; + default: + vfe_output_frame_drop(vfe, output, 0); + break; + } + + vfe_output_init_addrs(vfe, output, 1, &vfe->line[line_id]); + } + + spin_unlock_irqrestore(&vfe->output_lock, flags); +} + +/* + * vfe_isr_wm_done - process write master done interrupt + * @vfe: vfe device + * @wm: write master id + */ +static void vfe_isr_wm_done(struct vfe_device *vfe, u8 wm) +{ + struct camss_buffer *ready_buf; + struct vfe_output *output; + dma_addr_t *new_addr; + unsigned long flags; + u32 active_index; + u64 ts = ktime_get_ns(); + unsigned int i; + + active_index = vfe->ops_gen1->wm_get_ping_pong_status(vfe, wm); + + spin_lock_irqsave(&vfe->output_lock, flags); + + if (vfe->wm_output_map[wm] == vfe_line_none) { + dev_err_ratelimited(vfe->camss->dev, + "received wm done for unmapped index "); + goto out_unlock; + } + output = &vfe->line[vfe->wm_output_map[wm]].output; + + if (output->gen1.active_buf == active_index && 0) { + dev_err_ratelimited(vfe->camss->dev, + "active buffer mismatch! "); + goto out_unlock; + } + output->gen1.active_buf = active_index; + + ready_buf = output->buf[!active_index]; + if (!ready_buf) { + dev_err_ratelimited(vfe->camss->dev, + "missing ready buf %d %d! ", + !active_index, output->state); + goto out_unlock; + } + + ready_buf->vb.vb2_buf.timestamp = ts; + ready_buf->vb.sequence = output->sequence++; + + /* get next buffer */ + output->buf[!active_index] = vfe_buf_get_pending(output); + if (!output->buf[!active_index]) { + /* no next buffer - set same address */ + new_addr = ready_buf->addr; + vfe_buf_update_wm_on_last(vfe, output); + } else { + new_addr = output->buf[!active_index]->addr; + vfe_buf_update_wm_on_next(vfe, output); + } + + if (active_index) + for (i = 0; i < output->wm_num; i++) + vfe->ops_gen1->wm_set_ping_addr(vfe, output->wm_idx[i], new_addr[i]); + else + for (i = 0; i < output->wm_num; i++) + vfe->ops_gen1->wm_set_pong_addr(vfe, output->wm_idx[i], new_addr[i]); + + spin_unlock_irqrestore(&vfe->output_lock, flags); + + if (output->state == vfe_output_stopping) + output->last_buffer = ready_buf; + else + vb2_buffer_done(&ready_buf->vb.vb2_buf, vb2_buf_state_done); + + return; + +out_unlock: + spin_unlock_irqrestore(&vfe->output_lock, flags); +} + +/* + * vfe_queue_buffer - add empty buffer + * @vid: video device structure + * @buf: buffer to be enqueued + * + * add an empty buffer - depending on the current number of buffers it will be + * put in pending buffer queue or directly given to the hardware to be filled. + * + * return 0 on success or a negative error code otherwise + */ +static int vfe_queue_buffer(struct camss_video *vid, struct camss_buffer *buf) +{ + struct vfe_line *line = container_of(vid, struct vfe_line, video_out); + struct vfe_device *vfe = to_vfe(line); + struct vfe_output *output; + unsigned long flags; + + output = &line->output; + + spin_lock_irqsave(&vfe->output_lock, flags); + + vfe_buf_update_wm_on_new(vfe, output, buf, line); + + spin_unlock_irqrestore(&vfe->output_lock, flags); + + return 0; +} + +#define calc_word(width, m, n) (((width) * (m) + (n) - 1) / (n)) + +int vfe_word_per_line(u32 format, u32 width) +{ + int val = 0; + + switch (format) { + case v4l2_pix_fmt_nv12: + case v4l2_pix_fmt_nv21: + case v4l2_pix_fmt_nv16: + case v4l2_pix_fmt_nv61: + val = calc_word(width, 1, 8); + break; + case v4l2_pix_fmt_yuyv: + case v4l2_pix_fmt_yvyu: + case v4l2_pix_fmt_uyvy: + case v4l2_pix_fmt_vyuy: + val = calc_word(width, 2, 8); + break; + } + + return val; +} + +const struct vfe_isr_ops vfe_isr_ops_gen1 = { + .reset_ack = vfe_isr_reset_ack, + .halt_ack = vfe_isr_halt_ack, + .reg_update = vfe_isr_reg_update, + .sof = vfe_isr_sof, + .comp_done = vfe_isr_comp_done, + .wm_done = vfe_isr_wm_done, +}; + +const struct camss_video_ops vfe_video_ops_gen1 = { + .queue_buffer = vfe_queue_buffer, + .flush_buffers = vfe_flush_buffers, +}; diff --git a/drivers/media/platform/qcom/camss/camss-vfe-gen1.h b/drivers/media/platform/qcom/camss/camss-vfe-gen1.h --- /dev/null +++ b/drivers/media/platform/qcom/camss/camss-vfe-gen1.h +/* spdx-license-identifier: gpl-2.0 */ +/* + * camss-vfe.h + * + * qualcomm msm camera subsystem - vfe (video front end) module + * + * copyright (c) 2013-2015, the linux foundation. all rights reserved. + * copyright (c) 2015-2018 linaro ltd. + */ +#ifndef qc_msm_camss_vfe_gen1_h +#define qc_msm_camss_vfe_gen1_h + +#include "camss-vfe.h" + +enum vfe_line_id; +struct vfe_device; +struct vfe_line; +struct vfe_output; + +struct vfe_hw_ops_gen1 { + void (*bus_connect_wm_to_rdi)(struct vfe_device *vfe, u8 wm, enum vfe_line_id id); + void (*bus_disconnect_wm_from_rdi)(struct vfe_device *vfe, u8 wm, enum vfe_line_id id); + void (*bus_enable_wr_if)(struct vfe_device *vfe, u8 enable); + void (*bus_reload_wm)(struct vfe_device *vfe, u8 wm); + int (*camif_wait_for_stop)(struct vfe_device *vfe, struct device *dev); + void (*enable_irq_common)(struct vfe_device *vfe); + void (*enable_irq_wm_line)(struct vfe_device *vfe, u8 wm, enum vfe_line_id line_id, + u8 enable); + void (*enable_irq_pix_line)(struct vfe_device *vfe, u8 comp, enum vfe_line_id line_id, + u8 enable); + u16 (*get_ub_size)(u8 vfe_id); + void (*halt_clear)(struct vfe_device *vfe); + void (*halt_request)(struct vfe_device *vfe); + void (*set_camif_cfg)(struct vfe_device *vfe, struct vfe_line *line); + void (*set_camif_cmd)(struct vfe_device *vfe, u8 enable); + void (*set_cgc_override)(struct vfe_device *vfe, u8 wm, u8 enable); + void (*set_clamp_cfg)(struct vfe_device *vfe); + void (*set_crop_cfg)(struct vfe_device *vfe, struct vfe_line *line); + void (*set_demux_cfg)(struct vfe_device *vfe, struct vfe_line *line); + void (*set_ds)(struct vfe_device *vfe); + void (*set_module_cfg)(struct vfe_device *vfe, u8 enable); + void (*set_scale_cfg)(struct vfe_device *vfe, struct vfe_line *line); + void (*set_rdi_cid)(struct vfe_device *vfe, enum vfe_line_id id, u8 cid); + void (*set_realign_cfg)(struct vfe_device *vfe, struct vfe_line *line, u8 enable); + void (*set_qos)(struct vfe_device *vfe); + void (*set_xbar_cfg)(struct vfe_device *vfe, struct vfe_output *output, u8 enable); + void (*wm_frame_based)(struct vfe_device *vfe, u8 wm, u8 enable); + void (*wm_line_based)(struct vfe_device *vfe, u32 wm, struct v4l2_pix_format_mplane *pix, + u8 plane, u32 enable); + void (*wm_set_ub_cfg)(struct vfe_device *vfe, u8 wm, u16 offset, u16 depth); + void (*wm_set_subsample)(struct vfe_device *vfe, u8 wm); + void (*wm_set_framedrop_period)(struct vfe_device *vfe, u8 wm, u8 per); + void (*wm_set_framedrop_pattern)(struct vfe_device *vfe, u8 wm, u32 pattern); + void (*wm_set_ping_addr)(struct vfe_device *vfe, u8 wm, u32 addr); + void (*wm_set_pong_addr)(struct vfe_device *vfe, u8 wm, u32 addr); + int (*wm_get_ping_pong_status)(struct vfe_device *vfe, u8 wm); + void (*wm_enable)(struct vfe_device *vfe, u8 wm, u8 enable); +}; + +/* + * vfe_calc_interp_reso - calculate interpolation mode + * @input: input resolution + * @output: output resolution + * + * return interpolation mode + */ +static inline u8 vfe_calc_interp_reso(u16 input, u16 output) +{ + if (input / output >= 16) + return 0; + + if (input / output >= 8) + return 1; + + if (input / output >= 4) + return 2; + + return 3; +} + +/* + * vfe_gen1_disable - disable streaming on vfe line + * @line: vfe line + * + * return 0 on success or a negative error code otherwise + */ +int vfe_gen1_disable(struct vfe_line *line); + +/* + * vfe_gen1_enable - enable vfe module + * @line: vfe line + * + * return 0 on success + */ +int vfe_gen1_enable(struct vfe_line *line); + +/* + * vfe_gen1_enable - halt vfe module + * @vfe: vfe device + * + * return 0 on success + */ +int vfe_gen1_halt(struct vfe_device *vfe); + +/* + * vfe_word_per_line - calculate number of words per frame width + * @format: v4l2 format + * @width: frame width + * + * return number of words per frame width + */ +int vfe_word_per_line(u32 format, u32 width); + +extern const struct vfe_isr_ops vfe_isr_ops_gen1; +extern const struct camss_video_ops vfe_video_ops_gen1; + +#endif /* qc_msm_camss_vfe_gen1_h */ diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/platform/qcom/camss/camss-vfe.c --- a/drivers/media/platform/qcom/camss/camss-vfe.c +++ b/drivers/media/platform/qcom/camss/camss-vfe.c -#define vfe_line_array(ptr_line) \ - ((const struct vfe_line (*)[]) &(ptr_line[-(ptr_line->id)])) - -#define to_vfe(ptr_line) \ - container_of(vfe_line_array(ptr_line), struct vfe_device, line) - -/* vfe halt timeout */ -#define vfe_halt_timeout_ms 100 -/* max number of frame drop updates per frame */ -#define vfe_frame_drop_updates 2 -/* frame drop value. val + updates - 1 should not exceed 31 */ -#define vfe_frame_drop_val 30 - -#define vfe_next_sof_ms 500 -/* - * vfe_halt - trigger halt on vfe module and wait to complete - * @vfe: vfe device - * - * return 0 on success or a negative error code otherwise - */ -static int vfe_halt(struct vfe_device *vfe) -{ - unsigned long time; - - reinit_completion(&vfe->halt_complete); - - vfe->ops->halt_request(vfe); - - time = wait_for_completion_timeout(&vfe->halt_complete, - msecs_to_jiffies(vfe_halt_timeout_ms)); - if (!time) { - dev_err(vfe->camss->dev, "vfe halt timeout "); - return -eio; - } - - return 0; -} - - for (i = 0; i < array_size(vfe->line); i++) { + for (i = 0; i < vfe->line_num; i++) { -static void vfe_output_init_addrs(struct vfe_device *vfe, - struct vfe_output *output, u8 sync) -{ - u32 ping_addr; - u32 pong_addr; - unsigned int i; - - output->active_buf = 0; - - for (i = 0; i < output->wm_num; i++) { - if (output->buf[0]) - ping_addr = output->buf[0]->addr[i]; - else - ping_addr = 0; - - if (output->buf[1]) - pong_addr = output->buf[1]->addr[i]; - else - pong_addr = ping_addr; - - vfe->ops->wm_set_ping_addr(vfe, output->wm_idx[i], ping_addr); - vfe->ops->wm_set_pong_addr(vfe, output->wm_idx[i], pong_addr); - if (sync) - vfe->ops->bus_reload_wm(vfe, output->wm_idx[i]); - } -} - -static void vfe_output_update_ping_addr(struct vfe_device *vfe, - struct vfe_output *output, u8 sync) -{ - u32 addr; - unsigned int i; - - for (i = 0; i < output->wm_num; i++) { - if (output->buf[0]) - addr = output->buf[0]->addr[i]; - else - addr = 0; - - vfe->ops->wm_set_ping_addr(vfe, output->wm_idx[i], addr); - if (sync) - vfe->ops->bus_reload_wm(vfe, output->wm_idx[i]); - } -} - -static void vfe_output_update_pong_addr(struct vfe_device *vfe, - struct vfe_output *output, u8 sync) -{ - u32 addr; - unsigned int i; - - for (i = 0; i < output->wm_num; i++) { - if (output->buf[1]) - addr = output->buf[1]->addr[i]; - else - addr = 0; - - vfe->ops->wm_set_pong_addr(vfe, output->wm_idx[i], addr); - if (sync) - vfe->ops->bus_reload_wm(vfe, output->wm_idx[i]); - } - -} - -static int vfe_reserve_wm(struct vfe_device *vfe, enum vfe_line_id line_id) +int vfe_reserve_wm(struct vfe_device *vfe, enum vfe_line_id line_id) -static int vfe_release_wm(struct vfe_device *vfe, u8 wm) +int vfe_release_wm(struct vfe_device *vfe, u8 wm) -static void vfe_output_frame_drop(struct vfe_device *vfe, - struct vfe_output *output, - u32 drop_pattern) -{ - u8 drop_period; - unsigned int i; - - /* we need to toggle update period to be valid on next frame */ - output->drop_update_idx++; - output->drop_update_idx %= vfe_frame_drop_updates; - drop_period = vfe_frame_drop_val + output->drop_update_idx; - - for (i = 0; i < output->wm_num; i++) { - vfe->ops->wm_set_framedrop_period(vfe, output->wm_idx[i], - drop_period); - vfe->ops->wm_set_framedrop_pattern(vfe, output->wm_idx[i], - drop_pattern); - } - vfe->ops->reg_update(vfe, - container_of(output, struct vfe_line, output)->id); -} - -static struct camss_buffer *vfe_buf_get_pending(struct vfe_output *output) +struct camss_buffer *vfe_buf_get_pending(struct vfe_output *output) -/* - * vfe_buf_add_pending - add output buffer to list of pending - * @output: vfe output - * @buffer: video buffer - */ -static void vfe_buf_add_pending(struct vfe_output *output, - struct camss_buffer *buffer) +void vfe_buf_add_pending(struct vfe_output *output, + struct camss_buffer *buffer) -static void vfe_buf_update_wm_on_next(struct vfe_device *vfe, - struct vfe_output *output) -{ - switch (output->state) { - case vfe_output_continuous: - vfe_output_frame_drop(vfe, output, 3); - break; - case vfe_output_single: - default: - dev_err_ratelimited(vfe->camss->dev, - "next buf in wrong state! %d ", - output->state); - break; - } -} - -static void vfe_buf_update_wm_on_last(struct vfe_device *vfe, - struct vfe_output *output) -{ - switch (output->state) { - case vfe_output_continuous: - output->state = vfe_output_single; - vfe_output_frame_drop(vfe, output, 1); - break; - case vfe_output_single: - output->state = vfe_output_stopping; - vfe_output_frame_drop(vfe, output, 0); - break; - default: - dev_err_ratelimited(vfe->camss->dev, - "last buff in wrong state! %d ", - output->state); - break; - } -} - -static void vfe_buf_update_wm_on_new(struct vfe_device *vfe, - struct vfe_output *output, - struct camss_buffer *new_buf) -{ - int inactive_idx; - - switch (output->state) { - case vfe_output_single: - inactive_idx = !output->active_buf; - - if (!output->buf[inactive_idx]) { - output->buf[inactive_idx] = new_buf; - - if (inactive_idx) - vfe_output_update_pong_addr(vfe, output, 0); - else - vfe_output_update_ping_addr(vfe, output, 0); - - vfe_output_frame_drop(vfe, output, 3); - output->state = vfe_output_continuous; - } else { - vfe_buf_add_pending(output, new_buf); - dev_err_ratelimited(vfe->camss->dev, - "inactive buffer is busy "); - } - break; - - case vfe_output_idle: - if (!output->buf[0]) { - output->buf[0] = new_buf; - - vfe_output_init_addrs(vfe, output, 1); - - vfe_output_frame_drop(vfe, output, 1); - output->state = vfe_output_single; - } else { - vfe_buf_add_pending(output, new_buf); - dev_err_ratelimited(vfe->camss->dev, - "output idle with buffer set! "); - } - break; - - case vfe_output_continuous: - default: - vfe_buf_add_pending(output, new_buf); - break; - } -} - -static int vfe_get_output(struct vfe_line *line) -{ - struct vfe_device *vfe = to_vfe(line); - struct vfe_output *output; - struct v4l2_format *f = &line->video_out.active_fmt; - unsigned long flags; - int i; - int wm_idx; - - spin_lock_irqsave(&vfe->output_lock, flags); - - output = &line->output; - if (output->state != vfe_output_off) { - dev_err(vfe->camss->dev, "output is running "); - goto error; - } - output->state = vfe_output_reserved; - - output->active_buf = 0; - - switch (f->fmt.pix_mp.pixelformat) { - case v4l2_pix_fmt_nv12: - case v4l2_pix_fmt_nv21: - case v4l2_pix_fmt_nv16: - case v4l2_pix_fmt_nv61: - output->wm_num = 2; - break; - default: - output->wm_num = 1; - break; - } - - for (i = 0; i < output->wm_num; i++) { - wm_idx = vfe_reserve_wm(vfe, line->id); - if (wm_idx < 0) { - dev_err(vfe->camss->dev, "can not reserve wm "); - goto error_get_wm; - } - output->wm_idx[i] = wm_idx; - } - - output->drop_update_idx = 0; - - spin_unlock_irqrestore(&vfe->output_lock, flags); - - return 0; - -error_get_wm: - for (i--; i >= 0; i--) - vfe_release_wm(vfe, output->wm_idx[i]); - output->state = vfe_output_off; -error: - spin_unlock_irqrestore(&vfe->output_lock, flags); - - return -einval; -} - -static int vfe_put_output(struct vfe_line *line) +int vfe_put_output(struct vfe_line *line) -static int vfe_enable_output(struct vfe_line *line) -{ - struct vfe_device *vfe = to_vfe(line); - struct vfe_output *output = &line->output; - const struct vfe_hw_ops *ops = vfe->ops; - struct media_entity *sensor; - unsigned long flags; - unsigned int frame_skip = 0; - unsigned int i; - u16 ub_size; - - ub_size = ops->get_ub_size(vfe->id); - if (!ub_size) - return -einval; - - sensor = camss_find_sensor(&line->subdev.entity); - if (sensor) { - struct v4l2_subdev *subdev = - media_entity_to_v4l2_subdev(sensor); - - v4l2_subdev_call(subdev, sensor, g_skip_frames, &frame_skip); - /* max frame skip is 29 frames */ - if (frame_skip > vfe_frame_drop_val - 1) - frame_skip = vfe_frame_drop_val - 1; - } - - spin_lock_irqsave(&vfe->output_lock, flags); - - ops->reg_update_clear(vfe, line->id); - - if (output->state != vfe_output_reserved) { - dev_err(vfe->camss->dev, "output is not in reserved state %d ", - output->state); - spin_unlock_irqrestore(&vfe->output_lock, flags); - return -einval; - } - output->state = vfe_output_idle; - - output->buf[0] = vfe_buf_get_pending(output); - output->buf[1] = vfe_buf_get_pending(output); - - if (!output->buf[0] && output->buf[1]) { - output->buf[0] = output->buf[1]; - output->buf[1] = null; - } - - if (output->buf[0]) - output->state = vfe_output_single; - - if (output->buf[1]) - output->state = vfe_output_continuous; - - switch (output->state) { - case vfe_output_single: - vfe_output_frame_drop(vfe, output, 1 << frame_skip); - break; - case vfe_output_continuous: - vfe_output_frame_drop(vfe, output, 3 << frame_skip); - break; - default: - vfe_output_frame_drop(vfe, output, 0); - break; - } - - output->sequence = 0; - output->wait_sof = 0; - output->wait_reg_update = 0; - reinit_completion(&output->sof); - reinit_completion(&output->reg_update); - - vfe_output_init_addrs(vfe, output, 0); - - if (line->id != vfe_line_pix) { - ops->set_cgc_override(vfe, output->wm_idx[0], 1); - ops->enable_irq_wm_line(vfe, output->wm_idx[0], line->id, 1); - ops->bus_connect_wm_to_rdi(vfe, output->wm_idx[0], line->id); - ops->wm_set_subsample(vfe, output->wm_idx[0]); - ops->set_rdi_cid(vfe, line->id, 0); - ops->wm_set_ub_cfg(vfe, output->wm_idx[0], - (ub_size + 1) * output->wm_idx[0], ub_size); - ops->wm_frame_based(vfe, output->wm_idx[0], 1); - ops->wm_enable(vfe, output->wm_idx[0], 1); - ops->bus_reload_wm(vfe, output->wm_idx[0]); - } else { - ub_size /= output->wm_num; - for (i = 0; i < output->wm_num; i++) { - ops->set_cgc_override(vfe, output->wm_idx[i], 1); - ops->wm_set_subsample(vfe, output->wm_idx[i]); - ops->wm_set_ub_cfg(vfe, output->wm_idx[i], - (ub_size + 1) * output->wm_idx[i], - ub_size); - ops->wm_line_based(vfe, output->wm_idx[i], - &line->video_out.active_fmt.fmt.pix_mp, - i, 1); - ops->wm_enable(vfe, output->wm_idx[i], 1); - ops->bus_reload_wm(vfe, output->wm_idx[i]); - } - ops->enable_irq_pix_line(vfe, 0, line->id, 1); - ops->set_module_cfg(vfe, 1); - ops->set_camif_cfg(vfe, line); - ops->set_realign_cfg(vfe, line, 1); - ops->set_xbar_cfg(vfe, output, 1); - ops->set_demux_cfg(vfe, line); - ops->set_scale_cfg(vfe, line); - ops->set_crop_cfg(vfe, line); - ops->set_clamp_cfg(vfe); - ops->set_camif_cmd(vfe, 1); - } - - ops->reg_update(vfe, line->id); - - spin_unlock_irqrestore(&vfe->output_lock, flags); - - return 0; -} - -static int vfe_disable_output(struct vfe_line *line) -{ - struct vfe_device *vfe = to_vfe(line); - struct vfe_output *output = &line->output; - const struct vfe_hw_ops *ops = vfe->ops; - unsigned long flags; - unsigned long time; - unsigned int i; - - spin_lock_irqsave(&vfe->output_lock, flags); - - output->wait_sof = 1; - spin_unlock_irqrestore(&vfe->output_lock, flags); - - time = wait_for_completion_timeout(&output->sof, - msecs_to_jiffies(vfe_next_sof_ms)); - if (!time) - dev_err(vfe->camss->dev, "vfe sof timeout "); - - spin_lock_irqsave(&vfe->output_lock, flags); - for (i = 0; i < output->wm_num; i++) - ops->wm_enable(vfe, output->wm_idx[i], 0); - - ops->reg_update(vfe, line->id); - output->wait_reg_update = 1; - spin_unlock_irqrestore(&vfe->output_lock, flags); - - time = wait_for_completion_timeout(&output->reg_update, - msecs_to_jiffies(vfe_next_sof_ms)); - if (!time) - dev_err(vfe->camss->dev, "vfe reg update timeout "); - - spin_lock_irqsave(&vfe->output_lock, flags); - - if (line->id != vfe_line_pix) { - ops->wm_frame_based(vfe, output->wm_idx[0], 0); - ops->bus_disconnect_wm_from_rdi(vfe, output->wm_idx[0], - line->id); - ops->enable_irq_wm_line(vfe, output->wm_idx[0], line->id, 0); - ops->set_cgc_override(vfe, output->wm_idx[0], 0); - spin_unlock_irqrestore(&vfe->output_lock, flags); - } else { - for (i = 0; i < output->wm_num; i++) { - ops->wm_line_based(vfe, output->wm_idx[i], null, i, 0); - ops->set_cgc_override(vfe, output->wm_idx[i], 0); - } - - ops->enable_irq_pix_line(vfe, 0, line->id, 0); - ops->set_module_cfg(vfe, 0); - ops->set_realign_cfg(vfe, line, 0); - ops->set_xbar_cfg(vfe, output, 0); - - ops->set_camif_cmd(vfe, 0); - spin_unlock_irqrestore(&vfe->output_lock, flags); - - ops->camif_wait_for_stop(vfe, vfe->camss->dev); - } - - return 0; -} - -/* - * vfe_enable - enable streaming on vfe line - * @line: vfe line - * - * return 0 on success or a negative error code otherwise - */ -static int vfe_enable(struct vfe_line *line) -{ - struct vfe_device *vfe = to_vfe(line); - int ret; - - mutex_lock(&vfe->stream_lock); - - if (!vfe->stream_count) { - vfe->ops->enable_irq_common(vfe); - - vfe->ops->bus_enable_wr_if(vfe, 1); - - vfe->ops->set_qos(vfe); - - vfe->ops->set_ds(vfe); - } - - vfe->stream_count++; - - mutex_unlock(&vfe->stream_lock); - - ret = vfe_get_output(line); - if (ret < 0) - goto error_get_output; - - ret = vfe_enable_output(line); - if (ret < 0) - goto error_enable_output; - - vfe->was_streaming = 1; - - return 0; - - -error_enable_output: - vfe_put_output(line); - -error_get_output: - mutex_lock(&vfe->stream_lock); - - if (vfe->stream_count == 1) - vfe->ops->bus_enable_wr_if(vfe, 0); - - vfe->stream_count--; - - mutex_unlock(&vfe->stream_lock); - - return ret; -} - -/* - * vfe_disable - disable streaming on vfe line - * @line: vfe line - * - * return 0 on success or a negative error code otherwise - */ -static int vfe_disable(struct vfe_line *line) -{ - struct vfe_device *vfe = to_vfe(line); - - vfe_disable_output(line); - - vfe_put_output(line); - - mutex_lock(&vfe->stream_lock); - - if (vfe->stream_count == 1) - vfe->ops->bus_enable_wr_if(vfe, 0); - - vfe->stream_count--; - - mutex_unlock(&vfe->stream_lock); - - return 0; -} - -/* - * vfe_isr_sof - process start of frame interrupt - * @vfe: vfe device - * @line_id: vfe line - */ -static void vfe_isr_sof(struct vfe_device *vfe, enum vfe_line_id line_id) -{ - struct vfe_output *output; - unsigned long flags; - - spin_lock_irqsave(&vfe->output_lock, flags); - output = &vfe->line[line_id].output; - if (output->wait_sof) { - output->wait_sof = 0; - complete(&output->sof); - } - spin_unlock_irqrestore(&vfe->output_lock, flags); -} - -/* - * vfe_isr_reg_update - process reg update interrupt - * @vfe: vfe device - * @line_id: vfe line - */ -static void vfe_isr_reg_update(struct vfe_device *vfe, enum vfe_line_id line_id) -{ - struct vfe_output *output; - unsigned long flags; - - spin_lock_irqsave(&vfe->output_lock, flags); - vfe->ops->reg_update_clear(vfe, line_id); - - output = &vfe->line[line_id].output; - - if (output->wait_reg_update) { - output->wait_reg_update = 0; - complete(&output->reg_update); - spin_unlock_irqrestore(&vfe->output_lock, flags); - return; - } - - if (output->state == vfe_output_stopping) { - /* release last buffer when hw is idle */ - if (output->last_buffer) { - vb2_buffer_done(&output->last_buffer->vb.vb2_buf, - vb2_buf_state_done); - output->last_buffer = null; - } - output->state = vfe_output_idle; - - /* buffers received in stopping state are queued in */ - /* dma pending queue, start next capture here */ - - output->buf[0] = vfe_buf_get_pending(output); - output->buf[1] = vfe_buf_get_pending(output); - - if (!output->buf[0] && output->buf[1]) { - output->buf[0] = output->buf[1]; - output->buf[1] = null; - } - - if (output->buf[0]) - output->state = vfe_output_single; - - if (output->buf[1]) - output->state = vfe_output_continuous; - - switch (output->state) { - case vfe_output_single: - vfe_output_frame_drop(vfe, output, 2); - break; - case vfe_output_continuous: - vfe_output_frame_drop(vfe, output, 3); - break; - default: - vfe_output_frame_drop(vfe, output, 0); - break; - } - - vfe_output_init_addrs(vfe, output, 1); - } - - spin_unlock_irqrestore(&vfe->output_lock, flags); -} - -/* - * vfe_isr_wm_done - process write master done interrupt - * @vfe: vfe device - * @wm: write master id - */ -static void vfe_isr_wm_done(struct vfe_device *vfe, u8 wm) -{ - struct camss_buffer *ready_buf; - struct vfe_output *output; - dma_addr_t *new_addr; - unsigned long flags; - u32 active_index; - u64 ts = ktime_get_ns(); - unsigned int i; - - active_index = vfe->ops->wm_get_ping_pong_status(vfe, wm); - - spin_lock_irqsave(&vfe->output_lock, flags); - - if (vfe->wm_output_map[wm] == vfe_line_none) { - dev_err_ratelimited(vfe->camss->dev, - "received wm done for unmapped index "); - goto out_unlock; - } - output = &vfe->line[vfe->wm_output_map[wm]].output; - - if (output->active_buf == active_index) { - dev_err_ratelimited(vfe->camss->dev, - "active buffer mismatch! "); - goto out_unlock; - } - output->active_buf = active_index; - - ready_buf = output->buf[!active_index]; - if (!ready_buf) { - dev_err_ratelimited(vfe->camss->dev, - "missing ready buf %d %d! ", - !active_index, output->state); - goto out_unlock; - } - - ready_buf->vb.vb2_buf.timestamp = ts; - ready_buf->vb.sequence = output->sequence++; - - /* get next buffer */ - output->buf[!active_index] = vfe_buf_get_pending(output); - if (!output->buf[!active_index]) { - /* no next buffer - set same address */ - new_addr = ready_buf->addr; - vfe_buf_update_wm_on_last(vfe, output); - } else { - new_addr = output->buf[!active_index]->addr; - vfe_buf_update_wm_on_next(vfe, output); - } - - if (active_index) - for (i = 0; i < output->wm_num; i++) - vfe->ops->wm_set_ping_addr(vfe, output->wm_idx[i], - new_addr[i]); - else - for (i = 0; i < output->wm_num; i++) - vfe->ops->wm_set_pong_addr(vfe, output->wm_idx[i], - new_addr[i]); - - spin_unlock_irqrestore(&vfe->output_lock, flags); - - if (output->state == vfe_output_stopping) - output->last_buffer = ready_buf; - else - vb2_buffer_done(&ready_buf->vb.vb2_buf, vb2_buf_state_done); - - return; - -out_unlock: - spin_unlock_irqrestore(&vfe->output_lock, flags); -} - -static void vfe_isr_comp_done(struct vfe_device *vfe, u8 comp) +void vfe_isr_comp_done(struct vfe_device *vfe, u8 comp) - vfe_isr_wm_done(vfe, i); + vfe->isr_ops.wm_done(vfe, i); -static inline void vfe_isr_reset_ack(struct vfe_device *vfe) +void vfe_isr_reset_ack(struct vfe_device *vfe) -static inline void vfe_isr_halt_ack(struct vfe_device *vfe) -{ - complete(&vfe->halt_complete); - vfe->ops->halt_clear(vfe); -} - - u64 pixel_clock[msm_vfe_line_num]; + u64 pixel_clock[vfe_line_num_max]; - for (i = vfe_line_rdi0; i <= vfe_line_pix; i++) { + for (i = vfe_line_rdi0; i < vfe->line_num; i++) { - for (j = vfe_line_rdi0; j <= vfe_line_pix; j++) { + for (j = vfe_line_rdi0; j < vfe->line_num; j++) { - u64 pixel_clock[msm_vfe_line_num]; + u64 pixel_clock[vfe_line_num_max]; - for (i = vfe_line_rdi0; i <= vfe_line_pix; i++) { + for (i = vfe_line_rdi0; i < vfe->line_num; i++) { - for (j = vfe_line_rdi0; j <= vfe_line_pix; j++) { + for (j = vfe_line_rdi0; j < vfe->line_num; j++) { - vfe_halt(vfe); + vfe->ops->vfe_halt(vfe); -/* - * vfe_queue_buffer - add empty buffer - * @vid: video device structure - * @buf: buffer to be enqueued - * - * add an empty buffer - depending on the current number of buffers it will be - * put in pending buffer queue or directly given to the hardware to be filled. - * - * return 0 on success or a negative error code otherwise - */ -static int vfe_queue_buffer(struct camss_video *vid, - struct camss_buffer *buf) -{ - struct vfe_line *line = container_of(vid, struct vfe_line, video_out); - struct vfe_device *vfe = to_vfe(line); - struct vfe_output *output; - unsigned long flags; - - output = &line->output; - - spin_lock_irqsave(&vfe->output_lock, flags); - - vfe_buf_update_wm_on_new(vfe, output, buf); - - spin_unlock_irqrestore(&vfe->output_lock, flags); - - return 0; -} - -static int vfe_flush_buffers(struct camss_video *vid, - enum vb2_buffer_state state) +int vfe_flush_buffers(struct camss_video *vid, + enum vb2_buffer_state state) - ret = vfe_enable(line); + ret = vfe->ops->vfe_enable(line); - ret = vfe_disable(line); + ret = vfe->ops->vfe_disable(line); - vfe->isr_ops.reset_ack = vfe_isr_reset_ack; - vfe->isr_ops.halt_ack = vfe_isr_halt_ack; - vfe->isr_ops.reg_update = vfe_isr_reg_update; - vfe->isr_ops.sof = vfe_isr_sof; - vfe->isr_ops.comp_done = vfe_isr_comp_done; - vfe->isr_ops.wm_done = vfe_isr_wm_done; - + vfe->ops->subdev_init(dev, vfe); - for (i = vfe_line_rdi0; i <= vfe_line_pix; i++) { + for (i = vfe_line_rdi0; i < vfe->line_num; i++) { -static const struct camss_video_ops camss_vfe_video_ops = { - .queue_buffer = vfe_queue_buffer, - .flush_buffers = vfe_flush_buffers, -}; - - for (i = 0; i < array_size(vfe->line); i++) { + for (i = 0; i < vfe->line_num; i++) { - video_out->ops = &camss_vfe_video_ops; + video_out->ops = &vfe->video_ops; - for (i = 0; i < array_size(vfe->line); i++) { + for (i = 0; i < vfe->line_num; i++) { diff --git a/drivers/media/platform/qcom/camss/camss-vfe.h b/drivers/media/platform/qcom/camss/camss-vfe.h --- a/drivers/media/platform/qcom/camss/camss-vfe.h +++ b/drivers/media/platform/qcom/camss/camss-vfe.h +#include "camss-vfe-gen1.h" -#define msm_vfe_line_num 4 +/* vfe halt timeout */ +#define vfe_halt_timeout_ms 100 +/* frame drop value. val + updates - 1 should not exceed 31 */ +#define vfe_frame_drop_val 30 + +#define vfe_line_array(ptr_line) \ + ((const struct vfe_line (*)[]) &(ptr_line)[-(ptr_line)->id]) + +#define to_vfe(ptr_line) \ + container_of(vfe_line_array(ptr_line), struct vfe_device, line) + - vfe_line_pix = 3 + vfe_line_pix = 3, + vfe_line_num_gen1 = 4, + vfe_line_num_max = 4 - int active_buf; + union { + struct { + int active_buf; + int wait_sof; + } gen1; + }; - int wait_sof; + - void (*hw_version_read)(struct vfe_device *vfe, struct device *dev); - u16 (*get_ub_size)(u8 vfe_id); + void (*enable_irq_common)(struct vfe_device *vfe); - void (*halt_request)(struct vfe_device *vfe); - void (*halt_clear)(struct vfe_device *vfe); - void (*wm_enable)(struct vfe_device *vfe, u8 wm, u8 enable); - void (*wm_frame_based)(struct vfe_device *vfe, u8 wm, u8 enable); - void (*wm_line_based)(struct vfe_device *vfe, u32 wm, - struct v4l2_pix_format_mplane *pix, - u8 plane, u32 enable); - void (*wm_set_framedrop_period)(struct vfe_device *vfe, u8 wm, u8 per); - void (*wm_set_framedrop_pattern)(struct vfe_device *vfe, u8 wm, - u32 pattern); - void (*wm_set_ub_cfg)(struct vfe_device *vfe, u8 wm, u16 offset, - u16 depth); - void (*bus_reload_wm)(struct vfe_device *vfe, u8 wm); - void (*wm_set_ping_addr)(struct vfe_device *vfe, u8 wm, u32 addr); - void (*wm_set_pong_addr)(struct vfe_device *vfe, u8 wm, u32 addr); - int (*wm_get_ping_pong_status)(struct vfe_device *vfe, u8 wm); - void (*bus_enable_wr_if)(struct vfe_device *vfe, u8 enable); - void (*bus_connect_wm_to_rdi)(struct vfe_device *vfe, u8 wm, - enum vfe_line_id id); - void (*wm_set_subsample)(struct vfe_device *vfe, u8 wm); - void (*bus_disconnect_wm_from_rdi)(struct vfe_device *vfe, u8 wm, - enum vfe_line_id id); - void (*set_xbar_cfg)(struct vfe_device *vfe, struct vfe_output *output, - u8 enable); - void (*set_rdi_cid)(struct vfe_device *vfe, enum vfe_line_id id, - u8 cid); - void (*set_realign_cfg)(struct vfe_device *vfe, struct vfe_line *line, - u8 enable); + void (*hw_version_read)(struct vfe_device *vfe, struct device *dev); + irqreturn_t (*isr)(int irq, void *dev); + void (*isr_read)(struct vfe_device *vfe, u32 *value0, u32 *value1); - void (*enable_irq_wm_line)(struct vfe_device *vfe, u8 wm, - enum vfe_line_id line_id, u8 enable); - void (*enable_irq_pix_line)(struct vfe_device *vfe, u8 comp, - enum vfe_line_id line_id, u8 enable); - void (*enable_irq_common)(struct vfe_device *vfe); - void (*set_demux_cfg)(struct vfe_device *vfe, struct vfe_line *line); - void (*set_scale_cfg)(struct vfe_device *vfe, struct vfe_line *line); - void (*set_crop_cfg)(struct vfe_device *vfe, struct vfe_line *line); - void (*set_clamp_cfg)(struct vfe_device *vfe); - void (*set_qos)(struct vfe_device *vfe); - void (*set_ds)(struct vfe_device *vfe); - void (*set_cgc_override)(struct vfe_device *vfe, u8 wm, u8 enable); - void (*set_camif_cfg)(struct vfe_device *vfe, struct vfe_line *line); - void (*set_camif_cmd)(struct vfe_device *vfe, u8 enable); - void (*set_module_cfg)(struct vfe_device *vfe, u8 enable); - int (*camif_wait_for_stop)(struct vfe_device *vfe, struct device *dev); - void (*isr_read)(struct vfe_device *vfe, u32 *value0, u32 *value1); + void (*subdev_init)(struct device *dev, struct vfe_device *vfe); + int (*vfe_disable)(struct vfe_line *line); + int (*vfe_enable)(struct vfe_line *line); + int (*vfe_halt)(struct vfe_device *vfe); - irqreturn_t (*isr)(int irq, void *dev); - struct vfe_line line[msm_vfe_line_num]; + struct vfe_line line[vfe_line_num_max]; + u8 line_num; + const struct vfe_hw_ops_gen1 *ops_gen1; + struct camss_video_ops video_ops; +/* + * vfe_buf_add_pending - add output buffer to list of pending + * @output: vfe output + * @buffer: video buffer + */ +void vfe_buf_add_pending(struct vfe_output *output, struct camss_buffer *buffer); + +struct camss_buffer *vfe_buf_get_pending(struct vfe_output *output); + +/* + * vfe_disable - disable streaming on vfe line + * @line: vfe line + * + * return 0 on success or a negative error code otherwise + */ +int vfe_disable(struct vfe_line *line); + +int vfe_flush_buffers(struct camss_video *vid, enum vb2_buffer_state state); + +/* + * vfe_isr_comp_done - process composite image done interrupt + * @vfe: vfe device + * @comp: composite image id + */ +void vfe_isr_comp_done(struct vfe_device *vfe, u8 comp); + +void vfe_isr_reset_ack(struct vfe_device *vfe); +int vfe_put_output(struct vfe_line *line); +int vfe_release_wm(struct vfe_device *vfe, u8 wm); +int vfe_reserve_wm(struct vfe_device *vfe, enum vfe_line_id line_id); + diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c - for (j = 0; j < array_size(camss->vfe[k].line); j++) { + for (j = 0; j < camss->vfe[k].line_num; j++) { - for (j = 0; j < array_size(camss->vfe[k].line); j++) { + for (j = 0; j < camss->vfe[k].line_num; j++) {
|
TV tuners, webcams, video capturers
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633b388f85c5c1861793c522b9a1a6db7fd06445
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robert foss
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drivers
|
media
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camss, platform, qcom
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media: camss: add support for vfe hardware version titan 170
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add register definitions for version 170 of the titan architecture and implement support for the rdi output mode.
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this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
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add support for the sdm845 camera subsystem
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['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
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['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
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[]
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['h', 'c', 'makefile']
| 6
| 934
| 18
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--- diff --git a/drivers/media/platform/qcom/camss/makefile b/drivers/media/platform/qcom/camss/makefile --- a/drivers/media/platform/qcom/camss/makefile +++ b/drivers/media/platform/qcom/camss/makefile + camss-vfe-170.o \ diff --git a/drivers/media/platform/qcom/camss/camss-vfe-170.c b/drivers/media/platform/qcom/camss/camss-vfe-170.c --- /dev/null +++ b/drivers/media/platform/qcom/camss/camss-vfe-170.c +// spdx-license-identifier: gpl-2.0 +/* + * camss-vfe-170.c + * + * qualcomm msm camera subsystem - vfe (video front end) module v170 + * + * copyright (c) 2020-2021 linaro ltd. + */ + +#include <linux/delay.h> +#include <linux/interrupt.h> +#include <linux/io.h> +#include <linux/iopoll.h> + +#include "camss.h" +#include "camss-vfe.h" + +#define vfe_hw_version (0x000) + +#define vfe_global_reset_cmd (0x018) +#define global_reset_cmd_core bit(0) +#define global_reset_cmd_camif bit(1) +#define global_reset_cmd_bus bit(2) +#define global_reset_cmd_bus_bdg bit(3) +#define global_reset_cmd_register bit(4) +#define global_reset_cmd_pm bit(5) +#define global_reset_cmd_bus_misr bit(6) +#define global_reset_cmd_testgen bit(7) +#define global_reset_cmd_dsp bit(8) +#define global_reset_cmd_idle_cgc bit(9) +#define global_reset_cmd_rdi0 bit(10) +#define global_reset_cmd_rdi1 bit(11) +#define global_reset_cmd_rdi2 bit(12) +#define global_reset_cmd_rdi3 bit(13) +#define global_reset_cmd_vfe_domain bit(30) +#define global_reset_cmd_reset_bypass bit(31) + +#define vfe_core_cfg (0x050) +#define cfg_pixel_pattern_ycbycr (0x4) +#define cfg_pixel_pattern_ycrycb (0x5) +#define cfg_pixel_pattern_cbycry (0x6) +#define cfg_pixel_pattern_crycby (0x7) +#define cfg_composite_reg_update_en bit(4) + +#define vfe_irq_cmd (0x058) +#define cmd_global_clear bit(0) + +#define vfe_irq_mask_0 (0x05c) +#define mask_0_camif_sof bit(0) +#define mask_0_camif_eof bit(1) +#define mask_0_rdi_reg_update(n) bit((n) + 5) +#define mask_0_image_master_n_ping_pong(n) bit((n) + 8) +#define mask_0_image_composite_done_n(n) bit((n) + 25) +#define mask_0_reset_ack bit(31) + +#define vfe_irq_mask_1 (0x060) +#define mask_1_camif_error bit(0) +#define mask_1_violation bit(7) +#define mask_1_bus_bdg_halt_ack bit(8) +#define mask_1_image_master_n_bus_overflow(n) bit((n) + 9) +#define mask_1_rdi_sof(n) bit((n) + 29) + +#define vfe_irq_clear_0 (0x064) +#define vfe_irq_clear_1 (0x068) + +#define vfe_irq_status_0 (0x06c) +#define status_0_camif_sof bit(0) +#define status_0_rdi_reg_update(n) bit((n) + 5) +#define status_0_image_master_ping_pong(n) bit((n) + 8) +#define status_0_image_composite_done(n) bit((n) + 25) +#define status_0_reset_ack bit(31) + +#define vfe_irq_status_1 (0x070) +#define status_1_violation bit(7) +#define status_1_bus_bdg_halt_ack bit(8) +#define status_1_rdi_sof(n) bit((n) + 27) + +#define vfe_violation_status (0x07c) + +#define vfe_camif_cmd (0x478) +#define cmd_clear_camif_status bit(2) + +#define vfe_camif_cfg (0x47c) +#define cfg_vsync_sync_edge (0) +#define vsync_active_high (0) +#define vsync_active_low (1) +#define cfg_hsync_sync_edge (1) +#define hsync_active_high (0) +#define hsync_active_low (1) +#define cfg_vfe_subsample_enable bit(4) +#define cfg_bus_subsample_enable bit(5) +#define cfg_vfe_output_en bit(6) +#define cfg_bus_output_en bit(7) +#define cfg_binning_en bit(9) +#define cfg_frame_based_en bit(10) +#define cfg_raw_crop_en bit(22) + +#define vfe_reg_update_cmd (0x4ac) +#define reg_update_rdi(n) bit(1 + (n)) + +#define vfe_bus_irq_mask(n) (0x2044 + (n) * 4) +#define vfe_bus_irq_clear(n) (0x2050 + (n) * 4) +#define vfe_bus_irq_status(n) (0x205c + (n) * 4) +#define status0_comp_reset_done bit(0) +#define status0_comp_reg_update0_done bit(1) +#define status0_comp_reg_update1_done bit(2) +#define status0_comp_reg_update2_done bit(3) +#define status0_comp_reg_update3_done bit(4) +#define status0_comp_reg_update_done(n) bit((n) + 1) +#define status0_comp0_buf_done bit(5) +#define status0_comp1_buf_done bit(6) +#define status0_comp2_buf_done bit(7) +#define status0_comp3_buf_done bit(8) +#define status0_comp4_buf_done bit(9) +#define status0_comp5_buf_done bit(10) +#define status0_comp_buf_done(n) bit((n) + 5) +#define status0_comp_error bit(11) +#define status0_comp_overwrite bit(12) +#define status0_overflow bit(13) +#define status0_violation bit(14) +/* wm_client_buf_done defined for buffers 0:19 */ +#define status1_wm_client_buf_done(n) bit(n) +#define status1_early_done bit(24) +#define status2_dual_comp0_buf_done bit(0) +#define status2_dual_comp1_buf_done bit(1) +#define status2_dual_comp2_buf_done bit(2) +#define status2_dual_comp3_buf_done bit(3) +#define status2_dual_comp4_buf_done bit(4) +#define status2_dual_comp5_buf_done bit(5) +#define status2_dual_comp_buf_done(n) bit(n) +#define status2_dual_comp_error bit(6) +#define status2_dual_comp_overwrite bit(7) + +#define vfe_bus_irq_clear_global (0x2068) + +#define vfe_bus_wm_debug_status_cfg (0x226c) +#define debug_status_cfg_status0(n) bit(n) +#define debug_status_cfg_status1(n) bit(8 + (n)) + +#define vfe_bus_wm_addr_sync_frame_header (0x2080) + +#define vfe_bus_wm_addr_sync_no_sync (0x2084) +#define bus_ver2_max_clients (24) +#define wm_addr_no_sync_default_val \ + ((1 << bus_ver2_max_clients) - 1) + +#define vfe_bus_wm_cgc_override (0x200c) +#define wm_cgc_override_all (0xfffff) + +#define vfe_bus_wm_test_bus_ctrl (0x211c) + +#define vfe_bus_wm_status0(n) (0x2200 + (n) * 0x100) +#define vfe_bus_wm_status1(n) (0x2204 + (n) * 0x100) +#define vfe_bus_wm_cfg(n) (0x2208 + (n) * 0x100) +#define wm_cfg_en (0) +#define wm_cfg_mode (1) +#define mode_qcom_plain (0) +#define mode_mipi_raw (1) +#define wm_cfg_virtualframe (2) +#define vfe_bus_wm_header_addr(n) (0x220c + (n) * 0x100) +#define vfe_bus_wm_header_cfg(n) (0x2210 + (n) * 0x100) +#define vfe_bus_wm_image_addr(n) (0x2214 + (n) * 0x100) +#define vfe_bus_wm_image_addr_offset(n) (0x2218 + (n) * 0x100) +#define vfe_bus_wm_buffer_width_cfg(n) (0x221c + (n) * 0x100) +#define wm_buffer_default_width (0xff01) + +#define vfe_bus_wm_buffer_height_cfg(n) (0x2220 + (n) * 0x100) +#define vfe_bus_wm_packer_cfg(n) (0x2224 + (n) * 0x100) + +#define vfe_bus_wm_stride(n) (0x2228 + (n) * 0x100) +#define wm_stride_default_stride (0xff01) + +#define vfe_bus_wm_irq_subsample_period(n) (0x2248 + (n) * 0x100) +#define vfe_bus_wm_irq_subsample_pattern(n) (0x224c + (n) * 0x100) +#define vfe_bus_wm_framedrop_period(n) (0x2250 + (n) * 0x100) +#define vfe_bus_wm_framedrop_pattern(n) (0x2254 + (n) * 0x100) +#define vfe_bus_wm_frame_inc(n) (0x2258 + (n) * 0x100) +#define vfe_bus_wm_burst_limit(n) (0x225c + (n) * 0x100) + +static void vfe_hw_version_read(struct vfe_device *vfe, struct device *dev) +{ + u32 hw_version = readl_relaxed(vfe->base + vfe_hw_version); + + u32 gen = (hw_version >> 28) & 0xf; + u32 rev = (hw_version >> 16) & 0xfff; + u32 step = hw_version & 0xffff; + + dev_err(dev, "vfe hw version = %u.%u.%u ", gen, rev, step); +} + +static inline void vfe_reg_clr(struct vfe_device *vfe, u32 reg, u32 clr_bits) +{ + u32 bits = readl_relaxed(vfe->base + reg); + + writel_relaxed(bits & ~clr_bits, vfe->base + reg); +} + +static inline void vfe_reg_set(struct vfe_device *vfe, u32 reg, u32 set_bits) +{ + u32 bits = readl_relaxed(vfe->base + reg); + + writel_relaxed(bits | set_bits, vfe->base + reg); +} + +static void vfe_global_reset(struct vfe_device *vfe) +{ + u32 reset_bits = global_reset_cmd_core | + global_reset_cmd_camif | + global_reset_cmd_bus | + global_reset_cmd_bus_bdg | + global_reset_cmd_register | + global_reset_cmd_testgen | + global_reset_cmd_dsp | + global_reset_cmd_idle_cgc | + global_reset_cmd_rdi0 | + global_reset_cmd_rdi1 | + global_reset_cmd_rdi2; + + writel_relaxed(bit(31), vfe->base + vfe_irq_mask_0); + + /* make sure irq mask has been written before resetting */ + wmb(); + + writel_relaxed(reset_bits, vfe->base + vfe_global_reset_cmd); +} + +static void vfe_wm_start(struct vfe_device *vfe, u8 wm, struct vfe_line *line) +{ + u32 val; + + /*set debug registers*/ + val = debug_status_cfg_status0(1) | + debug_status_cfg_status0(7); + writel_relaxed(val, vfe->base + vfe_bus_wm_debug_status_cfg); + + /* bus_wm_input_if_addr_sync_frame_header */ + writel_relaxed(0, vfe->base + vfe_bus_wm_addr_sync_frame_header); + + /* no clock gating at bus input */ + val = wm_cgc_override_all; + writel_relaxed(val, vfe->base + vfe_bus_wm_cgc_override); + + writel_relaxed(0x0, vfe->base + vfe_bus_wm_test_bus_ctrl); + + /* if addr_no_sync has default value then config the addr no sync reg */ + val = wm_addr_no_sync_default_val; + writel_relaxed(val, vfe->base + vfe_bus_wm_addr_sync_no_sync); + + writel_relaxed(0xf, vfe->base + vfe_bus_wm_burst_limit(wm)); + + val = wm_buffer_default_width; + writel_relaxed(val, vfe->base + vfe_bus_wm_buffer_width_cfg(wm)); + + val = 0; + writel_relaxed(val, vfe->base + vfe_bus_wm_buffer_height_cfg(wm)); + + val = 0; + writel_relaxed(val, vfe->base + vfe_bus_wm_packer_cfg(wm)); // xxx 1 for plain8? + + /* configure stride for rdis */ + //val = pix->plane_fmt[0].bytesperline; + val = wm_stride_default_stride; + writel_relaxed(val, vfe->base + vfe_bus_wm_stride(wm)); + + /* enable wm */ + val = 1 << wm_cfg_en | + mode_mipi_raw << wm_cfg_mode; + writel_relaxed(val, vfe->base + vfe_bus_wm_cfg(wm)); +} + +static void vfe_wm_stop(struct vfe_device *vfe, u8 wm) +{ + /* disable wm */ + writel_relaxed(0, vfe->base + vfe_bus_wm_cfg(wm)); +} + +static void vfe_wm_update(struct vfe_device *vfe, u8 wm, u32 addr, + struct vfe_line *line) +{ + struct v4l2_pix_format_mplane *pix = + &line->video_out.active_fmt.fmt.pix_mp; + u32 stride = pix->plane_fmt[0].bytesperline; + + writel_relaxed(addr, vfe->base + vfe_bus_wm_image_addr(wm)); + writel_relaxed(stride * pix->height, vfe->base + vfe_bus_wm_frame_inc(wm)); +} + +static void vfe_reg_update(struct vfe_device *vfe, enum vfe_line_id line_id) +{ + vfe->reg_update |= reg_update_rdi(line_id); + + /* enforce ordering between previous reg writes and reg update */ + wmb(); + + writel_relaxed(vfe->reg_update, vfe->base + vfe_reg_update_cmd); + + /* enforce ordering between reg update and subsequent reg writes */ + wmb(); +} + +static inline void vfe_reg_update_clear(struct vfe_device *vfe, + enum vfe_line_id line_id) +{ + vfe->reg_update &= ~reg_update_rdi(line_id); +} + +static void vfe_enable_irq_common(struct vfe_device *vfe) +{ + vfe_reg_set(vfe, vfe_irq_mask_0, ~0u); + vfe_reg_set(vfe, vfe_irq_mask_1, ~0u); + + writel_relaxed(~0u, vfe->base + vfe_bus_irq_mask(0)); + writel_relaxed(~0u, vfe->base + vfe_bus_irq_mask(1)); + writel_relaxed(~0u, vfe->base + vfe_bus_irq_mask(2)); +} + +static void vfe_isr_halt_ack(struct vfe_device *vfe) +{ + complete(&vfe->halt_complete); +} + +static void vfe_isr_read(struct vfe_device *vfe, u32 *status0, u32 *status1) +{ + *status0 = readl_relaxed(vfe->base + vfe_irq_status_0); + *status1 = readl_relaxed(vfe->base + vfe_irq_status_1); + + writel_relaxed(*status0, vfe->base + vfe_irq_clear_0); + writel_relaxed(*status1, vfe->base + vfe_irq_clear_1); + + /* enforce ordering between irq clear and global irq clear */ + wmb(); + writel_relaxed(cmd_global_clear, vfe->base + vfe_irq_cmd); +} + +static void vfe_violation_read(struct vfe_device *vfe) +{ + u32 violation = readl_relaxed(vfe->base + vfe_violation_status); + + pr_err_ratelimited("vfe: violation = 0x%08x ", violation); +} + +/* + * vfe_isr - vfe module interrupt handler + * @irq: interrupt line + * @dev: vfe device + * + * return irq_handled on success + */ +static irqreturn_t vfe_isr(int irq, void *dev) +{ + struct vfe_device *vfe = dev; + u32 status0, status1, vfe_bus_status[3]; + int i, wm; + + status0 = readl_relaxed(vfe->base + vfe_irq_status_0); + status1 = readl_relaxed(vfe->base + vfe_irq_status_1); + + writel_relaxed(status0, vfe->base + vfe_irq_clear_0); + writel_relaxed(status1, vfe->base + vfe_irq_clear_1); + + for (i = vfe_line_rdi0; i <= vfe_line_rdi2; i++) { + vfe_bus_status[i] = readl_relaxed(vfe->base + vfe_bus_irq_status(i)); + writel_relaxed(vfe_bus_status[i], vfe->base + vfe_bus_irq_clear(i)); + } + + /* enforce ordering between irq reading and interpretation */ + wmb(); + + writel_relaxed(cmd_global_clear, vfe->base + vfe_irq_cmd); + writel_relaxed(1, vfe->base + vfe_bus_irq_clear_global); + + if (status0 & status_0_reset_ack) + vfe->isr_ops.reset_ack(vfe); + + for (i = vfe_line_rdi0; i <= vfe_line_rdi2; i++) + if (status0 & status_0_rdi_reg_update(i)) + vfe->isr_ops.reg_update(vfe, i); + + for (i = vfe_line_rdi0; i <= vfe_line_rdi2; i++) + if (status0 & status_1_rdi_sof(i)) + vfe->isr_ops.sof(vfe, i); + + for (i = 0; i < msm_vfe_composite_irq_num; i++) + if (vfe_bus_status[0] & status0_comp_buf_done(i)) + vfe->isr_ops.comp_done(vfe, i); + + for (wm = 0; wm < msm_vfe_image_masters_num; wm++) + if (status0 & bit(9)) + if (vfe_bus_status[1] & status1_wm_client_buf_done(wm)) + vfe->isr_ops.wm_done(vfe, wm); + + return irq_handled; +} + +/* + * vfe_halt - trigger halt on vfe module and wait to complete + * @vfe: vfe device + * + * return 0 on success or a negative error code otherwise + */ +static int vfe_halt(struct vfe_device *vfe) +{ + unsigned long time; + + reinit_completion(&vfe->halt_complete); + + time = wait_for_completion_timeout(&vfe->halt_complete, + msecs_to_jiffies(vfe_halt_timeout_ms)); + if (!time) { + dev_err(vfe->camss->dev, "vfe halt timeout "); + return -eio; + } + + return 0; +} + +static int vfe_get_output(struct vfe_line *line) +{ + struct vfe_device *vfe = to_vfe(line); + struct vfe_output *output; + unsigned long flags; + int wm_idx; + + spin_lock_irqsave(&vfe->output_lock, flags); + + output = &line->output; + if (output->state != vfe_output_off) { + dev_err(vfe->camss->dev, "output is running "); + goto error; + } + + output->wm_num = 1; + + wm_idx = vfe_reserve_wm(vfe, line->id); + if (wm_idx < 0) { + dev_err(vfe->camss->dev, "can not reserve wm "); + goto error_get_wm; + } + output->wm_idx[0] = wm_idx; + + output->drop_update_idx = 0; + + spin_unlock_irqrestore(&vfe->output_lock, flags); + + return 0; + +error_get_wm: + vfe_release_wm(vfe, output->wm_idx[0]); + output->state = vfe_output_off; +error: + spin_unlock_irqrestore(&vfe->output_lock, flags); + + return -einval; +} + +static int vfe_enable_output(struct vfe_line *line) +{ + struct vfe_device *vfe = to_vfe(line); + struct vfe_output *output = &line->output; + const struct vfe_hw_ops *ops = vfe->ops; + struct media_entity *sensor; + unsigned long flags; + unsigned int frame_skip = 0; + unsigned int i; + + sensor = camss_find_sensor(&line->subdev.entity); + if (sensor) { + struct v4l2_subdev *subdev = media_entity_to_v4l2_subdev(sensor); + + v4l2_subdev_call(subdev, sensor, g_skip_frames, &frame_skip); + /* max frame skip is 29 frames */ + if (frame_skip > vfe_frame_drop_val - 1) + frame_skip = vfe_frame_drop_val - 1; + } + + spin_lock_irqsave(&vfe->output_lock, flags); + + ops->reg_update_clear(vfe, line->id); + + if (output->state != vfe_output_off) { + dev_err(vfe->camss->dev, "output is not in reserved state %d ", + output->state); + spin_unlock_irqrestore(&vfe->output_lock, flags); + return -einval; + } + + warn_on(output->gen2.active_num); + + output->state = vfe_output_on; + + output->sequence = 0; + output->wait_reg_update = 0; + reinit_completion(&output->reg_update); + + vfe_wm_start(vfe, output->wm_idx[0], line); + + for (i = 0; i < 2; i++) { + output->buf[i] = vfe_buf_get_pending(output); + if (!output->buf[i]) + break; + output->gen2.active_num++; + vfe_wm_update(vfe, output->wm_idx[0], output->buf[i]->addr[0], line); + } + + ops->reg_update(vfe, line->id); + + spin_unlock_irqrestore(&vfe->output_lock, flags); + + return 0; +} + +static int vfe_disable_output(struct vfe_line *line) +{ + struct vfe_device *vfe = to_vfe(line); + struct vfe_output *output = &line->output; + unsigned long flags; + unsigned int i; + bool done; + int timeout = 0; + + do { + spin_lock_irqsave(&vfe->output_lock, flags); + done = !output->gen2.active_num; + spin_unlock_irqrestore(&vfe->output_lock, flags); + usleep_range(10000, 20000); + + if (timeout++ == 100) { + dev_err(vfe->camss->dev, "vfe idle timeout - resetting "); + vfe_reset(vfe); + output->gen2.active_num = 0; + return 0; + } + } while (!done); + + spin_lock_irqsave(&vfe->output_lock, flags); + for (i = 0; i < output->wm_num; i++) + vfe_wm_stop(vfe, output->wm_idx[i]); + spin_unlock_irqrestore(&vfe->output_lock, flags); + + return 0; +} + +/* + * vfe_enable - enable streaming on vfe line + * @line: vfe line + * + * return 0 on success or a negative error code otherwise + */ +static int vfe_enable(struct vfe_line *line) +{ + struct vfe_device *vfe = to_vfe(line); + int ret; + + mutex_lock(&vfe->stream_lock); + + if (!vfe->stream_count) + vfe_enable_irq_common(vfe); + + vfe->stream_count++; + + mutex_unlock(&vfe->stream_lock); + + ret = vfe_get_output(line); + if (ret < 0) + goto error_get_output; + + ret = vfe_enable_output(line); + if (ret < 0) + goto error_enable_output; + + vfe->was_streaming = 1; + + return 0; + +error_enable_output: + vfe_put_output(line); + +error_get_output: + mutex_lock(&vfe->stream_lock); + + vfe->stream_count--; + + mutex_unlock(&vfe->stream_lock); + + return ret; +} + +/* + * vfe_disable - disable streaming on vfe line + * @line: vfe line + * + * return 0 on success or a negative error code otherwise + */ +static int vfe_disable(struct vfe_line *line) +{ + struct vfe_device *vfe = to_vfe(line); + + vfe_disable_output(line); + + vfe_put_output(line); + + mutex_lock(&vfe->stream_lock); + + vfe->stream_count--; + + mutex_unlock(&vfe->stream_lock); + + return 0; +} + +/* + * vfe_isr_sof - process start of frame interrupt + * @vfe: vfe device + * @line_id: vfe line + */ +static void vfe_isr_sof(struct vfe_device *vfe, enum vfe_line_id line_id) +{ + /* nop */ +} + +/* + * vfe_isr_reg_update - process reg update interrupt + * @vfe: vfe device + * @line_id: vfe line + */ +static void vfe_isr_reg_update(struct vfe_device *vfe, enum vfe_line_id line_id) +{ + struct vfe_output *output; + unsigned long flags; + + spin_lock_irqsave(&vfe->output_lock, flags); + vfe->ops->reg_update_clear(vfe, line_id); + + output = &vfe->line[line_id].output; + + if (output->wait_reg_update) { + output->wait_reg_update = 0; + complete(&output->reg_update); + } + + spin_unlock_irqrestore(&vfe->output_lock, flags); +} + +/* + * vfe_isr_wm_done - process write master done interrupt + * @vfe: vfe device + * @wm: write master id + */ +static void vfe_isr_wm_done(struct vfe_device *vfe, u8 wm) +{ + struct vfe_line *line = &vfe->line[vfe->wm_output_map[wm]]; + struct camss_buffer *ready_buf; + struct vfe_output *output; + unsigned long flags; + u32 index; + u64 ts = ktime_get_ns(); + + spin_lock_irqsave(&vfe->output_lock, flags); + + if (vfe->wm_output_map[wm] == vfe_line_none) { + dev_err_ratelimited(vfe->camss->dev, + "received wm done for unmapped index "); + goto out_unlock; + } + output = &vfe->line[vfe->wm_output_map[wm]].output; + + ready_buf = output->buf[0]; + if (!ready_buf) { + dev_err_ratelimited(vfe->camss->dev, + "missing ready buf %d! ", output->state); + goto out_unlock; + } + + ready_buf->vb.vb2_buf.timestamp = ts; + ready_buf->vb.sequence = output->sequence++; + + index = 0; + output->buf[0] = output->buf[1]; + if (output->buf[0]) + index = 1; + + output->buf[index] = vfe_buf_get_pending(output); + + if (output->buf[index]) + vfe_wm_update(vfe, output->wm_idx[0], output->buf[index]->addr[0], line); + else + output->gen2.active_num--; + + spin_unlock_irqrestore(&vfe->output_lock, flags); + + vb2_buffer_done(&ready_buf->vb.vb2_buf, vb2_buf_state_done); + + return; + +out_unlock: + spin_unlock_irqrestore(&vfe->output_lock, flags); +} + +/* + * vfe_queue_buffer - add empty buffer + * @vid: video device structure + * @buf: buffer to be enqueued + * + * add an empty buffer - depending on the current number of buffers it will be + * put in pending buffer queue or directly given to the hardware to be filled. + * + * return 0 on success or a negative error code otherwise + */ +static int vfe_queue_buffer(struct camss_video *vid, + struct camss_buffer *buf) +{ + struct vfe_line *line = container_of(vid, struct vfe_line, video_out); + struct vfe_device *vfe = to_vfe(line); + struct vfe_output *output; + unsigned long flags; + + output = &line->output; + + spin_lock_irqsave(&vfe->output_lock, flags); + + if (output->state == vfe_output_on && output->gen2.active_num < 2) { + output->buf[output->gen2.active_num++] = buf; + vfe_wm_update(vfe, output->wm_idx[0], buf->addr[0], line); + } else { + vfe_buf_add_pending(output, buf); + } + + spin_unlock_irqrestore(&vfe->output_lock, flags); + + return 0; +} + +static const struct vfe_isr_ops vfe_isr_ops_170 = { + .reset_ack = vfe_isr_reset_ack, + .halt_ack = vfe_isr_halt_ack, + .reg_update = vfe_isr_reg_update, + .sof = vfe_isr_sof, + .comp_done = vfe_isr_comp_done, + .wm_done = vfe_isr_wm_done, +}; + +static const struct camss_video_ops vfe_video_ops_170 = { + .queue_buffer = vfe_queue_buffer, + .flush_buffers = vfe_flush_buffers, +}; + +static void vfe_subdev_init(struct device *dev, struct vfe_device *vfe) +{ + vfe->isr_ops = vfe_isr_ops_170; + vfe->video_ops = vfe_video_ops_170; + + vfe->line_num = vfe_line_num_gen2; +} + +const struct vfe_hw_ops vfe_ops_170 = { + .global_reset = vfe_global_reset, + .hw_version_read = vfe_hw_version_read, + .isr_read = vfe_isr_read, + .isr = vfe_isr, + .reg_update_clear = vfe_reg_update_clear, + .reg_update = vfe_reg_update, + .subdev_init = vfe_subdev_init, + .vfe_disable = vfe_disable, + .vfe_enable = vfe_enable, + .vfe_halt = vfe_halt, + .violation_read = vfe_violation_read, +}; diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/platform/qcom/camss/camss-vfe.c --- a/drivers/media/platform/qcom/camss/camss-vfe.c +++ b/drivers/media/platform/qcom/camss/camss-vfe.c +static const struct vfe_format formats_rdi_845[] = { + { media_bus_fmt_uyvy8_2x8, 8 }, + { media_bus_fmt_vyuy8_2x8, 8 }, + { media_bus_fmt_yuyv8_2x8, 8 }, + { media_bus_fmt_yvyu8_2x8, 8 }, + { media_bus_fmt_sbggr8_1x8, 8 }, + { media_bus_fmt_sgbrg8_1x8, 8 }, + { media_bus_fmt_sgrbg8_1x8, 8 }, + { media_bus_fmt_srggb8_1x8, 8 }, + { media_bus_fmt_sbggr10_1x10, 10 }, + { media_bus_fmt_sgbrg10_1x10, 10 }, + { media_bus_fmt_sgrbg10_1x10, 10 }, + { media_bus_fmt_srggb10_1x10, 10 }, + { media_bus_fmt_sbggr10_2x8_padhi_le, 16 }, + { media_bus_fmt_sbggr12_1x12, 12 }, + { media_bus_fmt_sgbrg12_1x12, 12 }, + { media_bus_fmt_sgrbg12_1x12, 12 }, + { media_bus_fmt_srggb12_1x12, 12 }, + { media_bus_fmt_sbggr14_1x14, 14 }, + { media_bus_fmt_sgbrg14_1x14, 14 }, + { media_bus_fmt_sgrbg14_1x14, 14 }, + { media_bus_fmt_srggb14_1x14, 14 }, + { media_bus_fmt_y10_1x10, 10 }, + { media_bus_fmt_y10_2x8_padhi_le, 16 }, +}; + - vfe->camss->version == camss_660) + vfe->camss->version == camss_660 || + vfe->camss->version == camss_845) -/* - * vfe_reset - trigger reset on vfe module and wait to complete - * @vfe: vfe device - * - * return 0 on success or a negative error code otherwise - */ -static int vfe_reset(struct vfe_device *vfe) +int vfe_reset(struct vfe_device *vfe) - !strcmp(clock->name, "vfe1")) { + !strcmp(clock->name, "vfe1") || + !strcmp(clock->name, "vfe_lite")) { + + case camss_845: + vfe->ops = &vfe_ops_170; + break; + } else if (camss->version == camss_845) { + l->formats = formats_rdi_845; + l->nformats = array_size(formats_rdi_845); diff --git a/drivers/media/platform/qcom/camss/camss-vfe.h b/drivers/media/platform/qcom/camss/camss-vfe.h --- a/drivers/media/platform/qcom/camss/camss-vfe.h +++ b/drivers/media/platform/qcom/camss/camss-vfe.h - vfe_output_stopping + vfe_output_stopping, + vfe_output_on, + vfe_line_num_gen2 = 3, + struct { + int active_num; + } gen2; -/* - * vfe_disable - disable streaming on vfe line - * @line: vfe line - * - * return 0 on success or a negative error code otherwise - */ -int vfe_disable(struct vfe_line *line); - +/* + * vfe_reset - trigger reset on vfe module and wait to complete + * @vfe: vfe device + * + * return 0 on success or a negative error code otherwise + */ +int vfe_reset(struct vfe_device *vfe); + +extern const struct vfe_hw_ops vfe_ops_170; diff --git a/drivers/media/platform/qcom/camss/camss-video.c b/drivers/media/platform/qcom/camss/camss-video.c --- a/drivers/media/platform/qcom/camss/camss-video.c +++ b/drivers/media/platform/qcom/camss/camss-video.c +static const struct camss_format_info formats_rdi_845[] = { + { media_bus_fmt_uyvy8_2x8, v4l2_pix_fmt_uyvy, 1, + { { 1, 1 } }, { { 1, 1 } }, { 16 } }, + { media_bus_fmt_vyuy8_2x8, v4l2_pix_fmt_vyuy, 1, + { { 1, 1 } }, { { 1, 1 } }, { 16 } }, + { media_bus_fmt_yuyv8_2x8, v4l2_pix_fmt_yuyv, 1, + { { 1, 1 } }, { { 1, 1 } }, { 16 } }, + { media_bus_fmt_yvyu8_2x8, v4l2_pix_fmt_yvyu, 1, + { { 1, 1 } }, { { 1, 1 } }, { 16 } }, + { media_bus_fmt_sbggr8_1x8, v4l2_pix_fmt_sbggr8, 1, + { { 1, 1 } }, { { 1, 1 } }, { 8 } }, + { media_bus_fmt_sgbrg8_1x8, v4l2_pix_fmt_sgbrg8, 1, + { { 1, 1 } }, { { 1, 1 } }, { 8 } }, + { media_bus_fmt_sgrbg8_1x8, v4l2_pix_fmt_sgrbg8, 1, + { { 1, 1 } }, { { 1, 1 } }, { 8 } }, + { media_bus_fmt_srggb8_1x8, v4l2_pix_fmt_srggb8, 1, + { { 1, 1 } }, { { 1, 1 } }, { 8 } }, + { media_bus_fmt_sbggr10_1x10, v4l2_pix_fmt_sbggr10p, 1, + { { 1, 1 } }, { { 1, 1 } }, { 10 } }, + { media_bus_fmt_sgbrg10_1x10, v4l2_pix_fmt_sgbrg10p, 1, + { { 1, 1 } }, { { 1, 1 } }, { 10 } }, + { media_bus_fmt_sgrbg10_1x10, v4l2_pix_fmt_sgrbg10p, 1, + { { 1, 1 } }, { { 1, 1 } }, { 10 } }, + { media_bus_fmt_srggb10_1x10, v4l2_pix_fmt_srggb10p, 1, + { { 1, 1 } }, { { 1, 1 } }, { 10 } }, + { media_bus_fmt_sbggr10_2x8_padhi_le, v4l2_pix_fmt_sbggr10, 1, + { { 1, 1 } }, { { 1, 1 } }, { 16 } }, + { media_bus_fmt_sbggr12_1x12, v4l2_pix_fmt_sbggr12p, 1, + { { 1, 1 } }, { { 1, 1 } }, { 12 } }, + { media_bus_fmt_sgbrg12_1x12, v4l2_pix_fmt_sgbrg12p, 1, + { { 1, 1 } }, { { 1, 1 } }, { 12 } }, + { media_bus_fmt_sgrbg12_1x12, v4l2_pix_fmt_sgrbg12p, 1, + { { 1, 1 } }, { { 1, 1 } }, { 12 } }, + { media_bus_fmt_srggb12_1x12, v4l2_pix_fmt_srggb12p, 1, + { { 1, 1 } }, { { 1, 1 } }, { 12 } }, + { media_bus_fmt_sbggr14_1x14, v4l2_pix_fmt_sbggr14p, 1, + { { 1, 1 } }, { { 1, 1 } }, { 14 } }, + { media_bus_fmt_sgbrg14_1x14, v4l2_pix_fmt_sgbrg14p, 1, + { { 1, 1 } }, { { 1, 1 } }, { 14 } }, + { media_bus_fmt_sgrbg14_1x14, v4l2_pix_fmt_sgrbg14p, 1, + { { 1, 1 } }, { { 1, 1 } }, { 14 } }, + { media_bus_fmt_srggb14_1x14, v4l2_pix_fmt_srggb14p, 1, + { { 1, 1 } }, { { 1, 1 } }, { 14 } }, + { media_bus_fmt_y10_1x10, v4l2_pix_fmt_y10p, 1, + { { 1, 1 } }, { { 1, 1 } }, { 10 } }, + { media_bus_fmt_y10_2x8_padhi_le, v4l2_pix_fmt_y10, 1, + { { 1, 1 } }, { { 1, 1 } }, { 16 } }, +}; + + } else if (video->camss->version == camss_845) { + video->formats = formats_rdi_845; + video->nformats = array_size(formats_rdi_845); diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c +static const struct resources vfe_res_845[] = { + /* vfe0 */ + { + .regulator = { null }, + .clock = { "camnoc_axi", "cpas_ahb", "slow_ahb_src", + "soc_ahb", "vfe0", "vfe0_axi", + "vfe0_src", "csi0", + "csi0_src"}, + .clock_rate = { { 0 }, + { 0 }, + { 80000000 }, + { 0 }, + { 19200000, 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 0 }, + { 320000000 }, + { 19200000, 75000000, 384000000, 538666667 }, + { 384000000 } }, + .reg = { "vfe0" }, + .interrupt = { "vfe0" } + }, + + /* vfe1 */ + { + .regulator = { null }, + .clock = { "camnoc_axi", "cpas_ahb", "slow_ahb_src", + "soc_ahb", "vfe1", "vfe1_axi", + "vfe1_src", "csi1", + "csi1_src"}, + .clock_rate = { { 0 }, + { 0 }, + { 80000000 }, + { 0 }, + { 19200000, 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 0 }, + { 320000000 }, + { 19200000, 75000000, 384000000, 538666667 }, + { 384000000 } }, + .reg = { "vfe1" }, + .interrupt = { "vfe1" } + }, + + /* vfe-lite */ + { + .regulator = { null }, + .clock = { "camnoc_axi", "cpas_ahb", "slow_ahb_src", + "soc_ahb", "vfe_lite", + "vfe_lite_src", "csi2", + "csi2_src"}, + .clock_rate = { { 0 }, + { 0 }, + { 80000000 }, + { 0 }, + { 19200000, 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 320000000 }, + { 19200000, 75000000, 384000000, 538666667 }, + { 384000000 } }, + .reg = { "vfe_lite" }, + .interrupt = { "vfe_lite" } + } +}; +
|
TV tuners, webcams, video capturers
|
7319cdf189bb643c6d56e5898ef89ad7c3ef6c31
|
robert foss
|
drivers
|
media
|
camss, platform, qcom
|
media: camss: add missing format identifiers
|
the csi-2 spec defines format identifier for data type (dt), and how the decode format (df) & encode format (ef) are implemented. the spec does however not define the df, ef or plain format (pf) identifiers, as those are vendor specific.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add support for the sdm845 camera subsystem
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['h', 'c']
| 4
| 92
| 16
|
--- diff --git a/drivers/media/platform/qcom/camss/camss-csid-gen1.h b/drivers/media/platform/qcom/camss/camss-csid-gen1.h --- /dev/null +++ b/drivers/media/platform/qcom/camss/camss-csid-gen1.h +/* spdx-license-identifier: gpl-2.0 */ +/* + * camss-csid-gen1.h + * + * qualcomm msm camera subsystem - csid (csi decoder) module generation 1 + * + * copyright (c) 2021 linaro ltd. + */ +#ifndef qc_msm_camss_csid_gen1_h +#define qc_msm_camss_csid_gen1_h + +#define decode_format_uncompressed_6_bit 0x0 +#define decode_format_uncompressed_8_bit 0x1 +#define decode_format_uncompressed_10_bit 0x2 +#define decode_format_uncompressed_12_bit 0x3 +#define decode_format_dpcm_10_6_10 0x4 +#define decode_format_dpcm_10_8_10 0x5 +#define decode_format_dpcm_12_6_12 0x6 +#define decode_format_dpcm_12_8_12 0x7 +#define decode_format_uncompressed_14_bit 0x8 +#define decode_format_dpcm_14_8_14 0x9 +#define decode_format_dpcm_14_10_14 0xa + +#define plain_format_plain8 0x0 /* supports dpcm, uncompressed_6/8_bit */ +#define plain_format_plain16 0x1 /* supports dpcm, uncompressed_10/16_bit */ + +#endif /* qc_msm_camss_csid_gen1_h */ diff --git a/drivers/media/platform/qcom/camss/camss-csid-gen2.h b/drivers/media/platform/qcom/camss/camss-csid-gen2.h --- /dev/null +++ b/drivers/media/platform/qcom/camss/camss-csid-gen2.h +/* spdx-license-identifier: gpl-2.0 */ +/* + * camss-csid-gen1.h + * + * qualcomm msm camera subsystem - csid (csi decoder) module generation 1 + * + * copyright (c) 2021 linaro ltd. + */ +#ifndef qc_msm_camss_csid_gen2_h +#define qc_msm_camss_csid_gen2_h + +#define decode_format_uncompressed_6_bit 0x0 +#define decode_format_uncompressed_8_bit 0x1 +#define decode_format_uncompressed_10_bit 0x2 +#define decode_format_uncompressed_12_bit 0x3 +#define decode_format_uncompressed_14_bit 0x4 +#define decode_format_uncompressed_16_bit 0x5 +#define decode_format_uncompressed_20_bit 0x6 +#define decode_format_dpcm_10_6_10 0x7 +#define decode_format_dpcm_10_8_10 0x8 +#define decode_format_dpcm_12_6_12 0x9 +#define decode_format_dpcm_12_8_12 0xa +#define decode_format_dpcm_14_8_14 0xb +#define decode_format_dpcm_14_10_14 0xc +#define decode_format_dpcm_12_10_12 0xd +#define decode_format_user_defined 0xe +#define decode_format_payload_only 0xf + +#define encode_format_raw_8_bit 0x1 +#define encode_format_raw_10_bit 0x2 +#define encode_format_raw_12_bit 0x3 +#define encode_format_raw_14_bit 0x4 +#define encode_format_raw_16_bit 0x5 + +#define plain_format_plain8 0x0 /* supports dpcm, uncompressed_6/8_bit */ +#define plain_format_plain16 0x1 /* supports dpcm, uncompressed_10/16_bit */ +#define plain_format_plain32 0x2 /* supports uncompressed_20_bit */ + +#endif /* qc_msm_camss_csid_gen2_h */ diff --git a/drivers/media/platform/qcom/camss/camss-csid.c b/drivers/media/platform/qcom/camss/camss-csid.c --- a/drivers/media/platform/qcom/camss/camss-csid.c +++ b/drivers/media/platform/qcom/camss/camss-csid.c +#include "camss-csid-gen1.h" -#define camss_csid_cid_n_cfg_plain_format_8 (0 << 8) -#define camss_csid_cid_n_cfg_plain_format_16 (1 << 8) +#define camss_csid_cid_n_cfg_plain_format_8 (plain_format_plain8 << 8) +#define camss_csid_cid_n_cfg_plain_format_16 (plain_format_plain16 << 8) -#define data_type_embedded_data_8bit 0x12 -#define data_type_yuv422_8bit 0x1e -#define data_type_raw_6bit 0x28 -#define data_type_raw_8bit 0x2a -#define data_type_raw_10bit 0x2b -#define data_type_raw_12bit 0x2c -#define data_type_raw_14bit 0x2d - -#define decode_format_uncompressed_6_bit 0x0 -#define decode_format_uncompressed_8_bit 0x1 -#define decode_format_uncompressed_10_bit 0x2 -#define decode_format_uncompressed_12_bit 0x3 -#define decode_format_uncompressed_14_bit 0x8 - diff --git a/drivers/media/platform/qcom/camss/camss-csid.h b/drivers/media/platform/qcom/camss/camss-csid.h --- a/drivers/media/platform/qcom/camss/camss-csid.h +++ b/drivers/media/platform/qcom/camss/camss-csid.h +#define data_type_embedded_data_8bit 0x12 +#define data_type_yuv420_8bit 0x18 +#define data_type_yuv420_10bit 0x19 +#define data_type_yuv420_8bit_legacy 0x1a +#define data_type_yuv420_8bit_shifted 0x1c /* chroma shifted pixel sampling */ +#define data_type_yuv420_10bit_shifted 0x1d /* chroma shifted pixel sampling */ +#define data_type_yuv422_8bit 0x1e +#define data_type_yuv422_10bit 0x1f +#define data_type_rgb444 0x20 +#define data_type_rgb555 0x21 +#define data_type_rgb565 0x22 +#define data_type_rgb666 0x23 +#define data_type_rgb888 0x24 +#define data_type_raw_24bit 0x27 +#define data_type_raw_6bit 0x28 +#define data_type_raw_7bit 0x29 +#define data_type_raw_8bit 0x2a +#define data_type_raw_10bit 0x2b +#define data_type_raw_12bit 0x2c +#define data_type_raw_14bit 0x2d +#define data_type_raw_16bit 0x2e +#define data_type_raw_20bit 0x2f +
|
TV tuners, webcams, video capturers
|
e19b14b1873dff2a653ae726904fbd47d4525359
|
robert foss
|
drivers
|
media
|
camss, platform, qcom
|
media: camss: refactor csid hw version support
|
in order to support qualcomm isp hardware architectures that diverge from older architectures, the csid subdevice drivers needs to be refactored to better abstract the different isp hardware architectures.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add support for the sdm845 camera subsystem
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['h', 'c', 'makefile']
| 5
| 886
| 584
|
--- diff --git a/drivers/media/platform/qcom/camss/makefile b/drivers/media/platform/qcom/camss/makefile --- a/drivers/media/platform/qcom/camss/makefile +++ b/drivers/media/platform/qcom/camss/makefile + camss-csid-4-1.o \ + camss-csid-4-7.o \ diff --git a/drivers/media/platform/qcom/camss/camss-csid-4-1.c b/drivers/media/platform/qcom/camss/camss-csid-4-1.c --- /dev/null +++ b/drivers/media/platform/qcom/camss/camss-csid-4-1.c +// spdx-license-identifier: gpl-2.0 +/* + * camss-csid-4-1.c + * + * qualcomm msm camera subsystem - csid (csi decoder) module + * + * copyright (c) 2020 linaro ltd. + */ + +#include <linux/completion.h> +#include <linux/interrupt.h> +#include <linux/io.h> +#include <linux/kernel.h> +#include <linux/of.h> + +#include "camss-csid.h" +#include "camss-csid-gen1.h" +#include "camss.h" + +#define camss_csid_hw_version 0x0 +#define camss_csid_core_ctrl_0 0x004 +#define camss_csid_core_ctrl_1 0x008 +#define camss_csid_rst_cmd 0x00c +#define camss_csid_cid_lut_vc_n(n) (0x010 + 0x4 * (n)) +#define camss_csid_cid_n_cfg(n) (0x020 + 0x4 * (n)) +#define camss_csid_cid_n_cfg_ispif_en bit(0) +#define camss_csid_cid_n_cfg_rdi_en bit(1) +#define camss_csid_cid_n_cfg_decode_format_shift 4 +#define camss_csid_cid_n_cfg_plain_format_8 (plain_format_plain8 << 8) +#define camss_csid_cid_n_cfg_plain_format_16 (plain_format_plain16 << 8) +#define camss_csid_cid_n_cfg_plain_alignment_lsb (0 << 9) +#define camss_csid_cid_n_cfg_plain_alignment_msb (1 << 9) +#define camss_csid_cid_n_cfg_rdi_mode_raw_dump (0 << 10) +#define camss_csid_cid_n_cfg_rdi_mode_plain_packing (1 << 10) +#define camss_csid_irq_clear_cmd 0x060 +#define camss_csid_irq_mask 0x064 +#define camss_csid_irq_status 0x068 +#define camss_csid_tg_ctrl 0x0a0 +#define camss_csid_tg_ctrl_disable 0xa06436 +#define camss_csid_tg_ctrl_enable 0xa06437 +#define camss_csid_tg_vc_cfg 0x0a4 +#define camss_csid_tg_vc_cfg_h_blanking 0x3ff +#define camss_csid_tg_vc_cfg_v_blanking 0x7f +#define camss_csid_tg_dt_n_cgg_0(n) (0x0ac + 0xc * (n)) +#define camss_csid_tg_dt_n_cgg_1(n) (0x0b0 + 0xc * (n)) +#define camss_csid_tg_dt_n_cgg_2(n) (0x0b4 + 0xc * (n)) + +static const struct csid_format csid_formats[] = { + { + media_bus_fmt_uyvy8_2x8, + data_type_yuv422_8bit, + decode_format_uncompressed_8_bit, + 8, + 2, + }, + { + media_bus_fmt_vyuy8_2x8, + data_type_yuv422_8bit, + decode_format_uncompressed_8_bit, + 8, + 2, + }, + { + media_bus_fmt_yuyv8_2x8, + data_type_yuv422_8bit, + decode_format_uncompressed_8_bit, + 8, + 2, + }, + { + media_bus_fmt_yvyu8_2x8, + data_type_yuv422_8bit, + decode_format_uncompressed_8_bit, + 8, + 2, + }, + { + media_bus_fmt_sbggr8_1x8, + data_type_raw_8bit, + decode_format_uncompressed_8_bit, + 8, + 1, + }, + { + media_bus_fmt_sgbrg8_1x8, + data_type_raw_8bit, + decode_format_uncompressed_8_bit, + 8, + 1, + }, + { + media_bus_fmt_sgrbg8_1x8, + data_type_raw_8bit, + decode_format_uncompressed_8_bit, + 8, + 1, + }, + { + media_bus_fmt_srggb8_1x8, + data_type_raw_8bit, + decode_format_uncompressed_8_bit, + 8, + 1, + }, + { + media_bus_fmt_sbggr10_1x10, + data_type_raw_10bit, + decode_format_uncompressed_10_bit, + 10, + 1, + }, + { + media_bus_fmt_sgbrg10_1x10, + data_type_raw_10bit, + decode_format_uncompressed_10_bit, + 10, + 1, + }, + { + media_bus_fmt_sgrbg10_1x10, + data_type_raw_10bit, + decode_format_uncompressed_10_bit, + 10, + 1, + }, + { + media_bus_fmt_srggb10_1x10, + data_type_raw_10bit, + decode_format_uncompressed_10_bit, + 10, + 1, + }, + { + media_bus_fmt_sbggr12_1x12, + data_type_raw_12bit, + decode_format_uncompressed_12_bit, + 12, + 1, + }, + { + media_bus_fmt_sgbrg12_1x12, + data_type_raw_12bit, + decode_format_uncompressed_12_bit, + 12, + 1, + }, + { + media_bus_fmt_sgrbg12_1x12, + data_type_raw_12bit, + decode_format_uncompressed_12_bit, + 12, + 1, + }, + { + media_bus_fmt_srggb12_1x12, + data_type_raw_12bit, + decode_format_uncompressed_12_bit, + 12, + 1, + }, + { + media_bus_fmt_y10_1x10, + data_type_raw_10bit, + decode_format_uncompressed_10_bit, + 10, + 1, + }, +}; + +static void csid_configure_stream(struct csid_device *csid, u8 enable) +{ + struct csid_testgen_config *tg = &csid->testgen; + u32 val; + + if (enable) { + struct v4l2_mbus_framefmt *input_format; + const struct csid_format *format; + u8 vc = 0; /* virtual channel 0 */ + u8 cid = vc * 4; /* id of virtual channel and data type set */ + u8 dt_shift; + + if (tg->enabled) { + /* config test generator */ + u32 num_lines, num_bytes_per_line; + + input_format = &csid->fmt[msm_csid_pad_src]; + format = csid_get_fmt_entry(csid->formats, csid->nformats, + input_format->code); + num_bytes_per_line = input_format->width * format->bpp * format->spp / 8; + num_lines = input_format->height; + + /* 31:24 v blank, 23:13 h blank, 3:2 num of active dt */ + /* 1:0 vc */ + val = ((camss_csid_tg_vc_cfg_v_blanking & 0xff) << 24) | + ((camss_csid_tg_vc_cfg_h_blanking & 0x7ff) << 13); + writel_relaxed(val, csid->base + camss_csid_tg_vc_cfg); + + /* 28:16 bytes per lines, 12:0 num of lines */ + val = ((num_bytes_per_line & 0x1fff) << 16) | + (num_lines & 0x1fff); + writel_relaxed(val, csid->base + camss_csid_tg_dt_n_cgg_0(0)); + + /* 5:0 data type */ + val = format->data_type; + writel_relaxed(val, csid->base + camss_csid_tg_dt_n_cgg_1(0)); + + /* 2:0 output test pattern */ + val = tg->mode - 1; + writel_relaxed(val, csid->base + camss_csid_tg_dt_n_cgg_2(0)); + } else { + struct csid_phy_config *phy = &csid->phy; + + input_format = &csid->fmt[msm_csid_pad_sink]; + format = csid_get_fmt_entry(csid->formats, csid->nformats, + input_format->code); + + val = phy->lane_cnt - 1; + val |= phy->lane_assign << 4; + + writel_relaxed(val, csid->base + camss_csid_core_ctrl_0); + + val = phy->csiphy_id << 17; + val |= 0x9; + + writel_relaxed(val, csid->base + camss_csid_core_ctrl_1); + } + + /* config lut */ + + dt_shift = (cid % 4) * 8; + val = readl_relaxed(csid->base + camss_csid_cid_lut_vc_n(vc)); + val &= ~(0xff << dt_shift); + val |= format->data_type << dt_shift; + writel_relaxed(val, csid->base + camss_csid_cid_lut_vc_n(vc)); + + val = camss_csid_cid_n_cfg_ispif_en; + val |= camss_csid_cid_n_cfg_rdi_en; + val |= format->decode_format << camss_csid_cid_n_cfg_decode_format_shift; + val |= camss_csid_cid_n_cfg_rdi_mode_raw_dump; + writel_relaxed(val, csid->base + camss_csid_cid_n_cfg(cid)); + + if (tg->enabled) { + val = camss_csid_tg_ctrl_enable; + writel_relaxed(val, csid->base + camss_csid_tg_ctrl); + } + } else { + if (tg->enabled) { + val = camss_csid_tg_ctrl_disable; + writel_relaxed(val, csid->base + camss_csid_tg_ctrl); + } + } +} + +static int csid_configure_testgen_pattern(struct csid_device *csid, s32 val) +{ + if (val > 0 && val <= csid->testgen.nmodes) + csid->testgen.mode = val; + + return 0; +} + +static u32 csid_hw_version(struct csid_device *csid) +{ + u32 hw_version = readl_relaxed(csid->base + camss_csid_hw_version); + + dev_dbg(csid->camss->dev, "csid hw version = 0x%08x ", hw_version); + + return hw_version; +} + +static irqreturn_t csid_isr(int irq, void *dev) +{ + struct csid_device *csid = dev; + u32 value; + + value = readl_relaxed(csid->base + camss_csid_irq_status); + writel_relaxed(value, csid->base + camss_csid_irq_clear_cmd); + + if ((value >> 11) & 0x1) + complete(&csid->reset_complete); + + return irq_handled; +} + +static int csid_reset(struct csid_device *csid) +{ + unsigned long time; + + reinit_completion(&csid->reset_complete); + + writel_relaxed(0x7fff, csid->base + camss_csid_rst_cmd); + + time = wait_for_completion_timeout(&csid->reset_complete, + msecs_to_jiffies(csid_reset_timeout_ms)); + if (!time) { + dev_err(csid->camss->dev, "csid reset timeout "); + return -eio; + } + + return 0; +} + +static u32 csid_src_pad_code(struct csid_device *csid, u32 sink_code, + unsigned int match_format_idx, u32 match_code) +{ + if (match_format_idx > 0) + return 0; + + return sink_code; +} + +static void csid_subdev_init(struct csid_device *csid) +{ + csid->formats = csid_formats; + csid->nformats = array_size(csid_formats); + csid->testgen.modes = csid_testgen_modes; + csid->testgen.nmodes = csid_payload_mode_num_supported_gen1; +} + +const struct csid_hw_ops csid_ops_4_1 = { + .configure_stream = csid_configure_stream, + .configure_testgen_pattern = csid_configure_testgen_pattern, + .hw_version = csid_hw_version, + .isr = csid_isr, + .reset = csid_reset, + .src_pad_code = csid_src_pad_code, + .subdev_init = csid_subdev_init, +}; diff --git a/drivers/media/platform/qcom/camss/camss-csid-4-7.c b/drivers/media/platform/qcom/camss/camss-csid-4-7.c --- /dev/null +++ b/drivers/media/platform/qcom/camss/camss-csid-4-7.c +// spdx-license-identifier: gpl-2.0 +/* + * camss-csid-4-7.c + * + * qualcomm msm camera subsystem - csid (csi decoder) module + * + * copyright (c) 2020 linaro ltd. + */ +#include <linux/completion.h> +#include <linux/interrupt.h> +#include <linux/io.h> +#include <linux/kernel.h> +#include <linux/of.h> + +#include "camss-csid.h" +#include "camss-csid-gen1.h" +#include "camss.h" + +#define camss_csid_hw_version 0x0 +#define camss_csid_core_ctrl_0 0x004 +#define camss_csid_core_ctrl_1 0x008 +#define camss_csid_rst_cmd 0x010 +#define camss_csid_cid_lut_vc_n(n) (0x014 + 0x4 * (n)) +#define camss_csid_cid_n_cfg(n) (0x024 + 0x4 * (n)) +#define camss_csid_cid_n_cfg_ispif_en bit(0) +#define camss_csid_cid_n_cfg_rdi_en bit(1) +#define camss_csid_cid_n_cfg_decode_format_shift 4 +#define camss_csid_cid_n_cfg_plain_format_8 (plain_format_plain8 << 8) +#define camss_csid_cid_n_cfg_plain_format_16 (plain_format_plain16 << 8) +#define camss_csid_cid_n_cfg_plain_alignment_lsb (0 << 9) +#define camss_csid_cid_n_cfg_plain_alignment_msb (1 << 9) +#define camss_csid_cid_n_cfg_rdi_mode_raw_dump (0 << 10) +#define camss_csid_cid_n_cfg_rdi_mode_plain_packing (1 << 10) +#define camss_csid_irq_clear_cmd 0x064 +#define camss_csid_irq_mask 0x068 +#define camss_csid_irq_status 0x06c +#define camss_csid_tg_ctrl 0x0a8 +#define camss_csid_tg_ctrl_disable 0xa06436 +#define camss_csid_tg_ctrl_enable 0xa06437 +#define camss_csid_tg_vc_cfg 0x0ac +#define camss_csid_tg_vc_cfg_h_blanking 0x3ff +#define camss_csid_tg_vc_cfg_v_blanking 0x7f +#define camss_csid_tg_dt_n_cgg_0(n) (0x0b4 + 0xc * (n)) +#define camss_csid_tg_dt_n_cgg_1(n) (0x0b8 + 0xc * (n)) +#define camss_csid_tg_dt_n_cgg_2(n) (0x0bc + 0xc * (n)) + +static const struct csid_format csid_formats[] = { + { + media_bus_fmt_uyvy8_2x8, + data_type_yuv422_8bit, + decode_format_uncompressed_8_bit, + 8, + 2, + }, + { + media_bus_fmt_vyuy8_2x8, + data_type_yuv422_8bit, + decode_format_uncompressed_8_bit, + 8, + 2, + }, + { + media_bus_fmt_yuyv8_2x8, + data_type_yuv422_8bit, + decode_format_uncompressed_8_bit, + 8, + 2, + }, + { + media_bus_fmt_yvyu8_2x8, + data_type_yuv422_8bit, + decode_format_uncompressed_8_bit, + 8, + 2, + }, + { + media_bus_fmt_sbggr8_1x8, + data_type_raw_8bit, + decode_format_uncompressed_8_bit, + 8, + 1, + }, + { + media_bus_fmt_sgbrg8_1x8, + data_type_raw_8bit, + decode_format_uncompressed_8_bit, + 8, + 1, + }, + { + media_bus_fmt_sgrbg8_1x8, + data_type_raw_8bit, + decode_format_uncompressed_8_bit, + 8, + 1, + }, + { + media_bus_fmt_srggb8_1x8, + data_type_raw_8bit, + decode_format_uncompressed_8_bit, + 8, + 1, + }, + { + media_bus_fmt_sbggr10_1x10, + data_type_raw_10bit, + decode_format_uncompressed_10_bit, + 10, + 1, + }, + { + media_bus_fmt_sgbrg10_1x10, + data_type_raw_10bit, + decode_format_uncompressed_10_bit, + 10, + 1, + }, + { + media_bus_fmt_sgrbg10_1x10, + data_type_raw_10bit, + decode_format_uncompressed_10_bit, + 10, + 1, + }, + { + media_bus_fmt_srggb10_1x10, + data_type_raw_10bit, + decode_format_uncompressed_10_bit, + 10, + 1, + }, + { + media_bus_fmt_sbggr12_1x12, + data_type_raw_12bit, + decode_format_uncompressed_12_bit, + 12, + 1, + }, + { + media_bus_fmt_sgbrg12_1x12, + data_type_raw_12bit, + decode_format_uncompressed_12_bit, + 12, + 1, + }, + { + media_bus_fmt_sgrbg12_1x12, + data_type_raw_12bit, + decode_format_uncompressed_12_bit, + 12, + 1, + }, + { + media_bus_fmt_srggb12_1x12, + data_type_raw_12bit, + decode_format_uncompressed_12_bit, + 12, + 1, + }, + { + media_bus_fmt_sbggr14_1x14, + data_type_raw_14bit, + decode_format_uncompressed_14_bit, + 14, + 1, + }, + { + media_bus_fmt_sgbrg14_1x14, + data_type_raw_14bit, + decode_format_uncompressed_14_bit, + 14, + 1, + }, + { + media_bus_fmt_sgrbg14_1x14, + data_type_raw_14bit, + decode_format_uncompressed_14_bit, + 14, + 1, + }, + { + media_bus_fmt_srggb14_1x14, + data_type_raw_14bit, + decode_format_uncompressed_14_bit, + 14, + 1, + }, + { + media_bus_fmt_y10_1x10, + data_type_raw_10bit, + decode_format_uncompressed_10_bit, + 10, + 1, + }, +}; + +static void csid_configure_stream(struct csid_device *csid, u8 enable) +{ + struct csid_testgen_config *tg = &csid->testgen; + u32 sink_code = csid->fmt[msm_csid_pad_sink].code; + u32 src_code = csid->fmt[msm_csid_pad_src].code; + u32 val; + + if (enable) { + struct v4l2_mbus_framefmt *input_format; + const struct csid_format *format; + u8 vc = 0; /* virtual channel 0 */ + u8 cid = vc * 4; /* id of virtual channel and data type set */ + u8 dt_shift; + + if (tg->enabled) { + /* config test generator */ + u32 num_bytes_per_line, num_lines; + + input_format = &csid->fmt[msm_csid_pad_src]; + format = csid_get_fmt_entry(csid->formats, csid->nformats, + input_format->code); + num_bytes_per_line = input_format->width * format->bpp * format->spp / 8; + num_lines = input_format->height; + + /* 31:24 v blank, 23:13 h blank, 3:2 num of active dt */ + /* 1:0 vc */ + val = ((camss_csid_tg_vc_cfg_v_blanking & 0xff) << 24) | + ((camss_csid_tg_vc_cfg_h_blanking & 0x7ff) << 13); + writel_relaxed(val, csid->base + camss_csid_tg_vc_cfg); + + /* 28:16 bytes per lines, 12:0 num of lines */ + val = ((num_bytes_per_line & 0x1fff) << 16) | + (num_lines & 0x1fff); + writel_relaxed(val, csid->base + camss_csid_tg_dt_n_cgg_0(0)); + + /* 5:0 data type */ + val = format->data_type; + writel_relaxed(val, csid->base + camss_csid_tg_dt_n_cgg_1(0)); + + /* 2:0 output test pattern */ + val = tg->mode - 1; + writel_relaxed(val, csid->base + camss_csid_tg_dt_n_cgg_2(0)); + } else { + struct csid_phy_config *phy = &csid->phy; + + input_format = &csid->fmt[msm_csid_pad_sink]; + format = csid_get_fmt_entry(csid->formats, csid->nformats, + input_format->code); + + val = phy->lane_cnt - 1; + val |= phy->lane_assign << 4; + + writel_relaxed(val, csid->base + camss_csid_core_ctrl_0); + + val = phy->csiphy_id << 17; + val |= 0x9; + + writel_relaxed(val, csid->base + camss_csid_core_ctrl_1); + } + + /* config lut */ + + dt_shift = (cid % 4) * 8; + + val = readl_relaxed(csid->base + camss_csid_cid_lut_vc_n(vc)); + val &= ~(0xff << dt_shift); + val |= format->data_type << dt_shift; + writel_relaxed(val, csid->base + camss_csid_cid_lut_vc_n(vc)); + + val = camss_csid_cid_n_cfg_ispif_en; + val |= camss_csid_cid_n_cfg_rdi_en; + val |= format->decode_format << camss_csid_cid_n_cfg_decode_format_shift; + val |= camss_csid_cid_n_cfg_rdi_mode_raw_dump; + + if ((sink_code == media_bus_fmt_sbggr10_1x10 && + src_code == media_bus_fmt_sbggr10_2x8_padhi_le) || + (sink_code == media_bus_fmt_y10_1x10 && + src_code == media_bus_fmt_y10_2x8_padhi_le)) { + val |= camss_csid_cid_n_cfg_rdi_mode_plain_packing; + val |= camss_csid_cid_n_cfg_plain_format_16; + val |= camss_csid_cid_n_cfg_plain_alignment_lsb; + } + + writel_relaxed(val, csid->base + camss_csid_cid_n_cfg(cid)); + + if (tg->enabled) { + val = camss_csid_tg_ctrl_enable; + writel_relaxed(val, csid->base + camss_csid_tg_ctrl); + } + } else { + if (tg->enabled) { + val = camss_csid_tg_ctrl_disable; + writel_relaxed(val, csid->base + camss_csid_tg_ctrl); + } + } +} + +static int csid_configure_testgen_pattern(struct csid_device *csid, s32 val) +{ + if (val > 0 && val <= csid->testgen.nmodes) + csid->testgen.mode = val; + + return 0; +} + +static u32 csid_hw_version(struct csid_device *csid) +{ + u32 hw_version = readl_relaxed(csid->base + camss_csid_hw_version); + + dev_dbg(csid->camss->dev, "csid hw version = 0x%08x ", hw_version); + + return hw_version; +} + +/* + * isr - csid module interrupt service routine + * @irq: interrupt line + * @dev: csid device + * + * return irq_handled on success + */ +static irqreturn_t csid_isr(int irq, void *dev) +{ + struct csid_device *csid = dev; + u32 value; + + value = readl_relaxed(csid->base + camss_csid_irq_status); + writel_relaxed(value, csid->base + camss_csid_irq_clear_cmd); + + if ((value >> 11) & 0x1) + complete(&csid->reset_complete); + + return irq_handled; +} + +/* + * csid_reset - trigger reset on csid module and wait to complete + * @csid: csid device + * + * return 0 on success or a negative error code otherwise + */ +static int csid_reset(struct csid_device *csid) +{ + unsigned long time; + + reinit_completion(&csid->reset_complete); + + writel_relaxed(0x7fff, csid->base + camss_csid_rst_cmd); + + time = wait_for_completion_timeout(&csid->reset_complete, + msecs_to_jiffies(csid_reset_timeout_ms)); + if (!time) { + dev_err(csid->camss->dev, "csid reset timeout "); + return -eio; + } + + return 0; +} + +static u32 csid_src_pad_code(struct csid_device *csid, u32 sink_code, + unsigned int match_format_idx, u32 match_code) +{ + switch (sink_code) { + case media_bus_fmt_sbggr10_1x10: + { + u32 src_code[] = { + media_bus_fmt_sbggr10_1x10, + media_bus_fmt_sbggr10_2x8_padhi_le, + }; + + return csid_find_code(src_code, array_size(src_code), + match_format_idx, match_code); + } + case media_bus_fmt_y10_1x10: + { + u32 src_code[] = { + media_bus_fmt_y10_1x10, + media_bus_fmt_y10_2x8_padhi_le, + }; + + return csid_find_code(src_code, array_size(src_code), + match_format_idx, match_code); + } + default: + if (match_format_idx > 0) + return 0; + + return sink_code; + } +} + +static void csid_subdev_init(struct csid_device *csid) +{ + csid->formats = csid_formats; + csid->nformats = array_size(csid_formats); + csid->testgen.modes = csid_testgen_modes; + csid->testgen.nmodes = csid_payload_mode_num_supported_gen1; +} + +const struct csid_hw_ops csid_ops_4_7 = { + .configure_stream = csid_configure_stream, + .configure_testgen_pattern = csid_configure_testgen_pattern, + .hw_version = csid_hw_version, + .isr = csid_isr, + .reset = csid_reset, + .src_pad_code = csid_src_pad_code, + .subdev_init = csid_subdev_init, +}; diff --git a/drivers/media/platform/qcom/camss/camss-csid.c b/drivers/media/platform/qcom/camss/camss-csid.c --- a/drivers/media/platform/qcom/camss/camss-csid.c +++ b/drivers/media/platform/qcom/camss/camss-csid.c -#define camss_csid_hw_version 0x0 -#define camss_csid_core_ctrl_0 0x004 -#define camss_csid_core_ctrl_1 0x008 -#define camss_csid_rst_cmd(v) ((v) == camss_8x16 ? 0x00c : 0x010) -#define camss_csid_cid_lut_vc_n(v, n) \ - (((v) == camss_8x16 ? 0x010 : 0x014) + 0x4 * (n)) -#define camss_csid_cid_n_cfg(v, n) \ - (((v) == camss_8x16 ? 0x020 : 0x024) + 0x4 * (n)) -#define camss_csid_cid_n_cfg_ispif_en bit(0) -#define camss_csid_cid_n_cfg_rdi_en bit(1) -#define camss_csid_cid_n_cfg_decode_format_shift 4 -#define camss_csid_cid_n_cfg_plain_format_8 (plain_format_plain8 << 8) -#define camss_csid_cid_n_cfg_plain_format_16 (plain_format_plain16 << 8) -#define camss_csid_cid_n_cfg_plain_alignment_lsb (0 << 9) -#define camss_csid_cid_n_cfg_plain_alignment_msb (1 << 9) -#define camss_csid_cid_n_cfg_rdi_mode_raw_dump (0 << 10) -#define camss_csid_cid_n_cfg_rdi_mode_plain_packing (1 << 10) -#define camss_csid_irq_clear_cmd(v) ((v) == camss_8x16 ? 0x060 : 0x064) -#define camss_csid_irq_mask(v) ((v) == camss_8x16 ? 0x064 : 0x068) -#define camss_csid_irq_status(v) ((v) == camss_8x16 ? 0x068 : 0x06c) -#define camss_csid_tg_ctrl(v) ((v) == camss_8x16 ? 0x0a0 : 0x0a8) -#define camss_csid_tg_ctrl_disable 0xa06436 -#define camss_csid_tg_ctrl_enable 0xa06437 -#define camss_csid_tg_vc_cfg(v) ((v) == camss_8x16 ? 0x0a4 : 0x0ac) -#define camss_csid_tg_vc_cfg_h_blanking 0x3ff -#define camss_csid_tg_vc_cfg_v_blanking 0x7f -#define camss_csid_tg_dt_n_cgg_0(v, n) \ - (((v) == camss_8x16 ? 0x0ac : 0x0b4) + 0xc * (n)) -#define camss_csid_tg_dt_n_cgg_1(v, n) \ - (((v) == camss_8x16 ? 0x0b0 : 0x0b8) + 0xc * (n)) -#define camss_csid_tg_dt_n_cgg_2(v, n) \ - (((v) == camss_8x16 ? 0x0b4 : 0x0bc) + 0xc * (n)) - -#define csid_reset_timeout_ms 500 - -struct csid_format { - u32 code; - u8 data_type; - u8 decode_format; - u8 bpp; - u8 spp; /* bus samples per pixel */ -}; - -static const struct csid_format csid_formats_8x16[] = { - { - media_bus_fmt_uyvy8_2x8, - data_type_yuv422_8bit, - decode_format_uncompressed_8_bit, - 8, - 2, - }, - { - media_bus_fmt_vyuy8_2x8, - data_type_yuv422_8bit, - decode_format_uncompressed_8_bit, - 8, - 2, - }, - { - media_bus_fmt_yuyv8_2x8, - data_type_yuv422_8bit, - decode_format_uncompressed_8_bit, - 8, - 2, - }, - { - media_bus_fmt_yvyu8_2x8, - data_type_yuv422_8bit, - decode_format_uncompressed_8_bit, - 8, - 2, - }, - { - media_bus_fmt_sbggr8_1x8, - data_type_raw_8bit, - decode_format_uncompressed_8_bit, - 8, - 1, - }, - { - media_bus_fmt_sgbrg8_1x8, - data_type_raw_8bit, - decode_format_uncompressed_8_bit, - 8, - 1, - }, - { - media_bus_fmt_sgrbg8_1x8, - data_type_raw_8bit, - decode_format_uncompressed_8_bit, - 8, - 1, - }, - { - media_bus_fmt_srggb8_1x8, - data_type_raw_8bit, - decode_format_uncompressed_8_bit, - 8, - 1, - }, - { - media_bus_fmt_sbggr10_1x10, - data_type_raw_10bit, - decode_format_uncompressed_10_bit, - 10, - 1, - }, - { - media_bus_fmt_sgbrg10_1x10, - data_type_raw_10bit, - decode_format_uncompressed_10_bit, - 10, - 1, - }, - { - media_bus_fmt_sgrbg10_1x10, - data_type_raw_10bit, - decode_format_uncompressed_10_bit, - 10, - 1, - }, - { - media_bus_fmt_srggb10_1x10, - data_type_raw_10bit, - decode_format_uncompressed_10_bit, - 10, - 1, - }, - { - media_bus_fmt_sbggr12_1x12, - data_type_raw_12bit, - decode_format_uncompressed_12_bit, - 12, - 1, - }, - { - media_bus_fmt_sgbrg12_1x12, - data_type_raw_12bit, - decode_format_uncompressed_12_bit, - 12, - 1, - }, - { - media_bus_fmt_sgrbg12_1x12, - data_type_raw_12bit, - decode_format_uncompressed_12_bit, - 12, - 1, - }, - { - media_bus_fmt_srggb12_1x12, - data_type_raw_12bit, - decode_format_uncompressed_12_bit, - 12, - 1, - }, - { - media_bus_fmt_y10_1x10, - data_type_raw_10bit, - decode_format_uncompressed_10_bit, - 10, - 1, - }, -}; - -static const struct csid_format csid_formats_8x96[] = { - { - media_bus_fmt_uyvy8_2x8, - data_type_yuv422_8bit, - decode_format_uncompressed_8_bit, - 8, - 2, - }, - { - media_bus_fmt_vyuy8_2x8, - data_type_yuv422_8bit, - decode_format_uncompressed_8_bit, - 8, - 2, - }, - { - media_bus_fmt_yuyv8_2x8, - data_type_yuv422_8bit, - decode_format_uncompressed_8_bit, - 8, - 2, - }, - { - media_bus_fmt_yvyu8_2x8, - data_type_yuv422_8bit, - decode_format_uncompressed_8_bit, - 8, - 2, - }, - { - media_bus_fmt_sbggr8_1x8, - data_type_raw_8bit, - decode_format_uncompressed_8_bit, - 8, - 1, - }, - { - media_bus_fmt_sgbrg8_1x8, - data_type_raw_8bit, - decode_format_uncompressed_8_bit, - 8, - 1, - }, - { - media_bus_fmt_sgrbg8_1x8, - data_type_raw_8bit, - decode_format_uncompressed_8_bit, - 8, - 1, - }, - { - media_bus_fmt_srggb8_1x8, - data_type_raw_8bit, - decode_format_uncompressed_8_bit, - 8, - 1, - }, - { - media_bus_fmt_sbggr10_1x10, - data_type_raw_10bit, - decode_format_uncompressed_10_bit, - 10, - 1, - }, - { - media_bus_fmt_sgbrg10_1x10, - data_type_raw_10bit, - decode_format_uncompressed_10_bit, - 10, - 1, - }, - { - media_bus_fmt_sgrbg10_1x10, - data_type_raw_10bit, - decode_format_uncompressed_10_bit, - 10, - 1, - }, - { - media_bus_fmt_srggb10_1x10, - data_type_raw_10bit, - decode_format_uncompressed_10_bit, - 10, - 1, - }, - { - media_bus_fmt_sbggr12_1x12, - data_type_raw_12bit, - decode_format_uncompressed_12_bit, - 12, - 1, - }, - { - media_bus_fmt_sgbrg12_1x12, - data_type_raw_12bit, - decode_format_uncompressed_12_bit, - 12, - 1, - }, - { - media_bus_fmt_sgrbg12_1x12, - data_type_raw_12bit, - decode_format_uncompressed_12_bit, - 12, - 1, - }, - { - media_bus_fmt_srggb12_1x12, - data_type_raw_12bit, - decode_format_uncompressed_12_bit, - 12, - 1, - }, - { - media_bus_fmt_sbggr14_1x14, - data_type_raw_14bit, - decode_format_uncompressed_14_bit, - 14, - 1, - }, - { - media_bus_fmt_sgbrg14_1x14, - data_type_raw_14bit, - decode_format_uncompressed_14_bit, - 14, - 1, - }, - { - media_bus_fmt_sgrbg14_1x14, - data_type_raw_14bit, - decode_format_uncompressed_14_bit, - 14, - 1, - }, - { - media_bus_fmt_srggb14_1x14, - data_type_raw_14bit, - decode_format_uncompressed_14_bit, - 14, - 1, - }, - { - media_bus_fmt_y10_1x10, - data_type_raw_10bit, - decode_format_uncompressed_10_bit, - 10, - 1, - }, +const char * const csid_testgen_modes[] = { + "disabled", + "incrementing", + "alternating 0x55/0xaa", + "all zeros 0x00", + "all ones 0xff", + "pseudo-random data", + "user specified", + null -static u32 csid_find_code(u32 *code, unsigned int n_code, - unsigned int index, u32 req_code) +u32 csid_find_code(u32 *codes, unsigned int ncodes, + unsigned int match_format_idx, u32 match_code) - if (!req_code && (index >= n_code)) + if (!match_code && (match_format_idx >= ncodes)) - for (i = 0; i < n_code; i++) - if (req_code) { - if (req_code == code[i]) - return req_code; + for (i = 0; i < ncodes; i++) + if (match_code) { + if (codes[i] == match_code) + return match_code; - if (i == index) - return code[i]; + if (i == match_format_idx) + return codes[i]; - return code[0]; -} - -static u32 csid_src_pad_code(struct csid_device *csid, u32 sink_code, - unsigned int index, u32 src_req_code) -{ - if (csid->camss->version == camss_8x16) { - if (index > 0) - return 0; - - return sink_code; - } else if (csid->camss->version == camss_8x96 || - csid->camss->version == camss_660) { - switch (sink_code) { - case media_bus_fmt_sbggr10_1x10: - { - u32 src_code[] = { - media_bus_fmt_sbggr10_1x10, - media_bus_fmt_sbggr10_2x8_padhi_le, - }; - - return csid_find_code(src_code, array_size(src_code), - index, src_req_code); - } - case media_bus_fmt_y10_1x10: - { - u32 src_code[] = { - media_bus_fmt_y10_1x10, - media_bus_fmt_y10_2x8_padhi_le, - }; - - return csid_find_code(src_code, array_size(src_code), - index, src_req_code); - } - default: - if (index > 0) - return 0; - - return sink_code; - } - } else { - return 0; - } + return codes[0]; -static const struct csid_format *csid_get_fmt_entry( - const struct csid_format *formats, - unsigned int nformat, - u32 code) +const struct csid_format *csid_get_fmt_entry(const struct csid_format *formats, + unsigned int nformats, + u32 code) - for (i = 0; i < nformat; i++) + for (i = 0; i < nformats; i++) -/* - * csid_isr - csid module interrupt handler - * @irq: interrupt line - * @dev: csid device - * - * return irq_handled on success - */ -static irqreturn_t csid_isr(int irq, void *dev) -{ - struct csid_device *csid = dev; - enum camss_version ver = csid->camss->version; - u32 value; - - value = readl_relaxed(csid->base + camss_csid_irq_status(ver)); - writel_relaxed(value, csid->base + camss_csid_irq_clear_cmd(ver)); - - if ((value >> 11) & 0x1) - complete(&csid->reset_complete); - - return irq_handled; -} - -/* - * csid_reset - trigger reset on csid module and wait to complete - * @csid: csid device - * - * return 0 on success or a negative error code otherwise - */ -static int csid_reset(struct csid_device *csid) -{ - unsigned long time; - - reinit_completion(&csid->reset_complete); - - writel_relaxed(0x7fff, csid->base + - camss_csid_rst_cmd(csid->camss->version)); - - time = wait_for_completion_timeout(&csid->reset_complete, - msecs_to_jiffies(csid_reset_timeout_ms)); - if (!time) { - dev_err(csid->camss->dev, "csid reset timeout "); - return -eio; - } - - return 0; -} - - u32 hw_version; - - ret = csid_reset(csid); + ret = csid->ops->reset(csid); - hw_version = readl_relaxed(csid->base + camss_csid_hw_version); - dev_dbg(dev, "csid hw version = 0x%08x ", hw_version); + csid->ops->hw_version(csid); - struct csid_testgen_config *tg = &csid->testgen; - enum camss_version ver = csid->camss->version; - u32 val; + int ret; - u8 vc = 0; /* virtual channel 0 */ - u8 cid = vc * 4; /* id of virtual channel and data type set */ - u8 dt, dt_shift, df; - int ret; - - if (!tg->enabled && + if (!csid->testgen.enabled && - - if (tg->enabled) { - /* config test generator */ - struct v4l2_mbus_framefmt *f = - &csid->fmt[msm_csid_pad_src]; - const struct csid_format *format = csid_get_fmt_entry( - csid->formats, csid->nformats, f->code); - u32 num_bytes_per_line = - f->width * format->bpp * format->spp / 8; - u32 num_lines = f->height; - - /* 31:24 v blank, 23:13 h blank, 3:2 num of active dt */ - /* 1:0 vc */ - val = ((camss_csid_tg_vc_cfg_v_blanking & 0xff) << 24) | - ((camss_csid_tg_vc_cfg_h_blanking & 0x7ff) << 13); - writel_relaxed(val, csid->base + - camss_csid_tg_vc_cfg(ver)); - - /* 28:16 bytes per lines, 12:0 num of lines */ - val = ((num_bytes_per_line & 0x1fff) << 16) | - (num_lines & 0x1fff); - writel_relaxed(val, csid->base + - camss_csid_tg_dt_n_cgg_0(ver, 0)); - - dt = format->data_type; - - /* 5:0 data type */ - val = dt; - writel_relaxed(val, csid->base + - camss_csid_tg_dt_n_cgg_1(ver, 0)); - - /* 2:0 output test pattern */ - val = tg->payload_mode; - writel_relaxed(val, csid->base + - camss_csid_tg_dt_n_cgg_2(ver, 0)); - - df = format->decode_format; - } else { - struct v4l2_mbus_framefmt *f = - &csid->fmt[msm_csid_pad_sink]; - const struct csid_format *format = csid_get_fmt_entry( - csid->formats, csid->nformats, f->code); - struct csid_phy_config *phy = &csid->phy; - - val = phy->lane_cnt - 1; - val |= phy->lane_assign << 4; - - writel_relaxed(val, - csid->base + camss_csid_core_ctrl_0); - - val = phy->csiphy_id << 17; - val |= 0x9; - - writel_relaxed(val, - csid->base + camss_csid_core_ctrl_1); - - dt = format->data_type; - df = format->decode_format; - } - - /* config lut */ - - dt_shift = (cid % 4) * 8; - - val = readl_relaxed(csid->base + - camss_csid_cid_lut_vc_n(ver, vc)); - val &= ~(0xff << dt_shift); - val |= dt << dt_shift; - writel_relaxed(val, csid->base + - camss_csid_cid_lut_vc_n(ver, vc)); - - val = camss_csid_cid_n_cfg_ispif_en; - val |= camss_csid_cid_n_cfg_rdi_en; - val |= df << camss_csid_cid_n_cfg_decode_format_shift; - val |= camss_csid_cid_n_cfg_rdi_mode_raw_dump; - - if (csid->camss->version == camss_8x96 || - csid->camss->version == camss_660) { - u32 sink_code = csid->fmt[msm_csid_pad_sink].code; - u32 src_code = csid->fmt[msm_csid_pad_src].code; - - if ((sink_code == media_bus_fmt_sbggr10_1x10 && - src_code == media_bus_fmt_sbggr10_2x8_padhi_le) || - (sink_code == media_bus_fmt_y10_1x10 && - src_code == media_bus_fmt_y10_2x8_padhi_le)) { - val |= camss_csid_cid_n_cfg_rdi_mode_plain_packing; - val |= camss_csid_cid_n_cfg_plain_format_16; - val |= camss_csid_cid_n_cfg_plain_alignment_lsb; - } - } - - writel_relaxed(val, csid->base + - camss_csid_cid_n_cfg(ver, cid)); - - if (tg->enabled) { - val = camss_csid_tg_ctrl_enable; - writel_relaxed(val, csid->base + - camss_csid_tg_ctrl(ver)); - } - } else { - if (tg->enabled) { - val = camss_csid_tg_ctrl_disable; - writel_relaxed(val, csid->base + - camss_csid_tg_ctrl(ver)); - } + csid->ops->configure_stream(csid, enable); + - fmt->code = csid_src_pad_code(csid, fmt->code, 0, code); + fmt->code = csid->ops->src_pad_code(csid, fmt->code, 0, code); - code->code = csid_src_pad_code(csid, sink_fmt->code, + code->code = csid->ops->src_pad_code(csid, sink_fmt->code, -static const char * const csid_test_pattern_menu[] = { - "disabled", - "incrementing", - "alternating 0x55/0xaa", - "all zeros 0x00", - "all ones 0xff", - "pseudo-random data", -}; - - switch (value) { - case 1: - tg->payload_mode = csid_payload_mode_incrementing; - break; - case 2: - tg->payload_mode = csid_payload_mode_alternating_55_aa; - break; - case 3: - tg->payload_mode = csid_payload_mode_all_zeroes; - break; - case 4: - tg->payload_mode = csid_payload_mode_all_ones; - break; - case 5: - tg->payload_mode = csid_payload_mode_random; - break; - } - - return 0; + return csid->ops->configure_testgen_pattern(csid, value); - csid->formats = csid_formats_8x16; - csid->nformats = - array_size(csid_formats_8x16); + csid->ops = &csid_ops_4_1; - csid->formats = csid_formats_8x96; - csid->nformats = - array_size(csid_formats_8x96); + csid->ops = &csid_ops_4_7; + csid->ops->subdev_init(csid); - ret = devm_request_irq(dev, csid->irq, csid_isr, - irqf_trigger_rising, csid->irq_name, csid); + ret = devm_request_irq(dev, csid->irq, csid->ops->isr, + irqf_trigger_rising, csid->irq_name, csid); - array_size(csid_test_pattern_menu) - 1, 0, 0, - csid_test_pattern_menu); + csid->testgen.nmodes, 0, 0, + csid->testgen.modes); diff --git a/drivers/media/platform/qcom/camss/camss-csid.h b/drivers/media/platform/qcom/camss/camss-csid.h --- a/drivers/media/platform/qcom/camss/camss-csid.h +++ b/drivers/media/platform/qcom/camss/camss-csid.h +#include <linux/interrupt.h> -enum csid_payload_mode { - csid_payload_mode_incrementing = 0, - csid_payload_mode_alternating_55_aa = 1, - csid_payload_mode_all_zeroes = 2, - csid_payload_mode_all_ones = 3, - csid_payload_mode_random = 4, - csid_payload_mode_user_specified = 5, +#define csid_reset_timeout_ms 500 + +enum csid_testgen_mode { + csid_payload_mode_disabled = 0, + csid_payload_mode_incrementing = 1, + csid_payload_mode_alternating_55_aa = 2, + csid_payload_mode_all_zeroes = 3, + csid_payload_mode_all_ones = 4, + csid_payload_mode_random = 5, + csid_payload_mode_user_specified = 6, + csid_payload_mode_num_supported_gen1 = 6, /* excluding disabled */ +}; + +struct csid_format { + u32 code; + u8 data_type; + u8 decode_format; + u8 bpp; + u8 spp; /* bus samples per pixel */ + enum csid_testgen_mode mode; + const char * const*modes; + u8 nmodes; - enum csid_payload_mode payload_mode; +struct csid_device; + +struct csid_hw_ops { + /* + * configure_stream - configures and starts csid input stream + * @csid: csid device + */ + void (*configure_stream)(struct csid_device *csid, u8 enable); + + /* + * configure_testgen_pattern - validates and configures output pattern mode + * of test pattern generator + * @csid: csid device + */ + int (*configure_testgen_pattern)(struct csid_device *csid, s32 val); + + /* + * hw_version - read hardware version register from hardware + * @csid: csid device + */ + u32 (*hw_version)(struct csid_device *csid); + + /* + * isr - csid module interrupt service routine + * @irq: interrupt line + * @dev: csid device + * + * return irq_handled on success + */ + irqreturn_t (*isr)(int irq, void *dev); + + /* + * reset - trigger reset on csid module and wait to complete + * @csid: csid device + * + * return 0 on success or a negative error code otherwise + */ + int (*reset)(struct csid_device *csid); + + /* + * src_pad_code - pick an output/src format based on the input/sink format + * @csid: csid device + * @sink_code: the sink format of the input + * @match_format_idx: request preferred index, as defined by subdevice csid_format. + * set @match_code to 0 if used. + * @match_code: request preferred code, set @match_format_idx to 0 if used + * + * return 0 on failure or src format code otherwise + */ + u32 (*src_pad_code)(struct csid_device *csid, u32 sink_code, + unsigned int match_format_idx, u32 match_code); + + /* + * subdev_init - initialize csid device according for hardware revision + * @csid: csid device + */ + void (*subdev_init)(struct csid_device *csid); +}; + + const struct csid_hw_ops *ops; +/* + * csid_find_code - find a format code in an array using array index or format code + * @codes: array of format codes + * @ncodes: length of @code array + * @req_format_idx: request preferred index, as defined by subdevice csid_format. + * set @match_code to 0 if used. + * @match_code: request preferred code, set @req_format_idx to 0 if used + * + * return 0 on failure or format code otherwise + */ +u32 csid_find_code(u32 *codes, unsigned int ncode, + unsigned int match_format_idx, u32 match_code); + +/* + * csid_get_fmt_entry - find csid_format entry with matching format code + * @formats: array of format csid_format entries + * @nformats: length of @nformats array + * @code: desired format code + * + * return formats[0] on failure to find code + */ +const struct csid_format *csid_get_fmt_entry(const struct csid_format *formats, + unsigned int nformats, + u32 code); + +extern const char * const csid_testgen_modes[]; + +extern const struct csid_hw_ops csid_ops_4_1; +extern const struct csid_hw_ops csid_ops_4_7; +
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TV tuners, webcams, video capturers
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76005817fa954310a8af2bd0644404baee34a03f
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robert foss andrey konovalov andrey konovalov linaro org
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drivers
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media
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camss, platform, qcom
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media: camss: add support for csid hardware version titan 170
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add register definitions for version 170 of the titan architecture and implement support for the csid subdevice.
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this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
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add support for the sdm845 camera subsystem
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['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
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['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
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[]
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['h', 'c', 'makefile']
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| 675
| 1
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--- diff --git a/drivers/media/platform/qcom/camss/makefile b/drivers/media/platform/qcom/camss/makefile --- a/drivers/media/platform/qcom/camss/makefile +++ b/drivers/media/platform/qcom/camss/makefile + camss-csid-170.o \ diff --git a/drivers/media/platform/qcom/camss/camss-csid-170.c b/drivers/media/platform/qcom/camss/camss-csid-170.c --- /dev/null +++ b/drivers/media/platform/qcom/camss/camss-csid-170.c +// spdx-license-identifier: gpl-2.0 +/* + * camss-csid-4-7.c + * + * qualcomm msm camera subsystem - csid (csi decoder) module + * + * copyright (c) 2020 linaro ltd. + */ +#include <linux/completion.h> +#include <linux/interrupt.h> +#include <linux/io.h> +#include <linux/kernel.h> +#include <linux/of.h> + +#include "camss-csid.h" +#include "camss-csid-gen2.h" +#include "camss.h" + +/* the csid 2 ip-block is different from the others, + * and is of a bare-bones lite version, with no pix + * interface support. as a result of that it has an + * alternate register layout. + */ +#define is_lite (csid->id == 2 ? 1 : 0) + +#define csid_hw_version 0x0 +#define hw_version_stepping 0 +#define hw_version_revision 16 +#define hw_version_generation 28 + +#define csid_rst_strobes 0x10 +#define rst_strobes 0 + +#define csid_csi2_rx_irq_status 0x20 +#define csid_csi2_rx_irq_mask 0x24 +#define csid_csi2_rx_irq_clear 0x28 + +#define csid_csi2_rdin_irq_status(rdi) ((is_lite ? 0x30 : 0x40) \ + + 0x10 * (rdi)) +#define csid_csi2_rdin_irq_mask(rdi) ((is_lite ? 0x34 : 0x44) \ + + 0x10 * (rdi)) +#define csid_csi2_rdin_irq_clear(rdi) ((is_lite ? 0x38 : 0x48) \ + + 0x10 * (rdi)) +#define csid_csi2_rdin_irq_set(rdi) ((is_lite ? 0x3c : 0x4c) \ + + 0x10 * (rdi)) + +#define csid_top_irq_status 0x70 +#define top_irq_status_reset_done 0 +#define csid_top_irq_mask 0x74 +#define csid_top_irq_clear 0x78 +#define csid_top_irq_set 0x7c +#define csid_irq_cmd 0x80 +#define irq_cmd_clear 0 +#define irq_cmd_set 4 + +#define csid_csi2_rx_cfg0 0x100 +#define csi2_rx_cfg0_num_active_lanes 0 +#define csi2_rx_cfg0_dl0_input_sel 4 +#define csi2_rx_cfg0_dl1_input_sel 8 +#define csi2_rx_cfg0_dl2_input_sel 12 +#define csi2_rx_cfg0_dl3_input_sel 16 +#define csi2_rx_cfg0_phy_num_sel 20 +#define csi2_rx_cfg0_phy_type_sel 24 + +#define csid_csi2_rx_cfg1 0x104 +#define csi2_rx_cfg1_packet_ecc_correction_en 0 +#define csi2_rx_cfg1_de_scramble_en 1 +#define csi2_rx_cfg1_vc_mode 2 +#define csi2_rx_cfg1_complete_stream_en 4 +#define csi2_rx_cfg1_complete_stream_frame_timing 5 +#define csi2_rx_cfg1_misr_en 6 +#define csi2_rx_cfg1_cgc_mode 7 +#define cgc_mode_dynamic_gating 0 +#define cgc_mode_always_on 1 + +#define csid_rdi_cfg0(rdi) ((is_lite ? 0x200 : 0x300) \ + + 0x100 * (rdi)) +#define rdi_cfg0_byte_cntr_en 0 +#define rdi_cfg0_format_measure_en 1 +#define rdi_cfg0_timestamp_en 2 +#define rdi_cfg0_drop_h_en 3 +#define rdi_cfg0_drop_v_en 4 +#define rdi_cfg0_crop_h_en 5 +#define rdi_cfg0_crop_v_en 6 +#define rdi_cfg0_misr_en 7 +#define rdi_cfg0_cgc_mode 8 +#define cgc_mode_dynamic 0 +#define cgc_mode_always_on 1 +#define rdi_cfg0_plain_alignment 9 +#define plain_alignment_lsb 0 +#define plain_alignment_msb 1 +#define rdi_cfg0_plain_format 10 +#define rdi_cfg0_decode_format 12 +#define rdi_cfg0_data_type 16 +#define rdi_cfg0_virtual_channel 22 +#define rdi_cfg0_dt_id 27 +#define rdi_cfg0_early_eof_en 29 +#define rdi_cfg0_packing_format 30 +#define rdi_cfg0_enable 31 + +#define csid_rdi_cfg1(rdi) ((is_lite ? 0x204 : 0x304)\ + + 0x100 * (rdi)) +#define rdi_cfg1_timestamp_stb_sel 0 + +#define csid_rdi_ctrl(rdi) ((is_lite ? 0x208 : 0x308)\ + + 0x100 * (rdi)) +#define rdi_ctrl_halt_cmd 0 +#define alt_cmd_resume_at_frame_boundary 1 +#define rdi_ctrl_halt_mode 2 + +#define csid_rdi_frm_drop_pattern(rdi) ((is_lite ? 0x20c : 0x30c)\ + + 0x100 * (rdi)) +#define csid_rdi_frm_drop_period(rdi) ((is_lite ? 0x210 : 0x310)\ + + 0x100 * (rdi)) +#define csid_rdi_irq_subsample_pattern(rdi) ((is_lite ? 0x214 : 0x314)\ + + 0x100 * (rdi)) +#define csid_rdi_irq_subsample_period(rdi) ((is_lite ? 0x218 : 0x318)\ + + 0x100 * (rdi)) +#define csid_rdi_rpp_pix_drop_pattern(rdi) ((is_lite ? 0x224 : 0x324)\ + + 0x100 * (rdi)) +#define csid_rdi_rpp_pix_drop_period(rdi) ((is_lite ? 0x228 : 0x328)\ + + 0x100 * (rdi)) +#define csid_rdi_rpp_line_drop_pattern(rdi) ((is_lite ? 0x22c : 0x32c)\ + + 0x100 * (rdi)) +#define csid_rdi_rpp_line_drop_period(rdi) ((is_lite ? 0x230 : 0x330)\ + + 0x100 * (rdi)) + +#define csid_tpg_ctrl 0x600 +#define tpg_ctrl_test_en 0 +#define tpg_ctrl_fs_pkt_en 1 +#define tpg_ctrl_fe_pkt_en 2 +#define tpg_ctrl_num_active_lanes 4 +#define tpg_ctrl_cycles_between_pkts 8 +#define tpg_ctrl_num_trail_bytes 20 + +#define csid_tpg_vc_cfg0 0x604 +#define tpg_vc_cfg0_vc_num 0 +#define tpg_vc_cfg0_num_active_slots 8 +#define num_active_slots_0_enabled 0 +#define num_active_slots_0_1_enabled 1 +#define num_active_slots_0_1_2_enabled 2 +#define num_active_slots_0_1_3_enabled 3 +#define tpg_vc_cfg0_line_interleaving_mode 10 +#define inteleaving_mode_interleaved 0 +#define inteleaving_mode_one_shot 1 +#define tpg_vc_cfg0_num_frames 16 + +#define csid_tpg_vc_cfg1 0x608 +#define tpg_vc_cfg1_h_blanking_count 0 +#define tpg_vc_cfg1_v_blanking_count 12 +#define tpg_vc_cfg1_v_blank_frame_width_sel 24 + +#define csid_tpg_lfsr_seed 0x60c + +#define csid_tpg_dt_n_cfg_0(n) (0x610 + (n) * 0xc) +#define tpg_dt_n_cfg_0_frame_height 0 +#define tpg_dt_n_cfg_0_frame_width 16 + +#define csid_tpg_dt_n_cfg_1(n) (0x614 + (n) * 0xc) +#define tpg_dt_n_cfg_1_data_type 0 +#define tpg_dt_n_cfg_1_ecc_xor_mask 8 +#define tpg_dt_n_cfg_1_crc_xor_mask 16 + +#define csid_tpg_dt_n_cfg_2(n) (0x618 + (n) * 0xc) +#define tpg_dt_n_cfg_2_payload_mode 0 +#define tpg_dt_n_cfg_2_user_specified_payload 4 +#define tpg_dt_n_cfg_2_encode_format 16 + +#define csid_tpg_color_bars_cfg 0x640 +#define tpg_color_bars_cfg_unicolor_bar_en 0 +#define tpg_color_bars_cfg_unicolor_bar_sel 4 +#define tpg_color_bars_cfg_split_en 5 +#define tpg_color_bars_cfg_rotate_period 8 + +#define csid_tpg_color_box_cfg 0x644 +#define tpg_color_box_cfg_mode 0 +#define tpg_color_box_pattern_sel 2 + +static const struct csid_format csid_formats[] = { + { + media_bus_fmt_uyvy8_2x8, + data_type_yuv422_8bit, + decode_format_uncompressed_8_bit, + 8, + 2, + }, + { + media_bus_fmt_vyuy8_2x8, + data_type_yuv422_8bit, + decode_format_uncompressed_8_bit, + 8, + 2, + }, + { + media_bus_fmt_yuyv8_2x8, + data_type_yuv422_8bit, + decode_format_uncompressed_8_bit, + 8, + 2, + }, + { + media_bus_fmt_yvyu8_2x8, + data_type_yuv422_8bit, + decode_format_uncompressed_8_bit, + 8, + 2, + }, + { + media_bus_fmt_sbggr8_1x8, + data_type_raw_8bit, + decode_format_uncompressed_8_bit, + 8, + 1, + }, + { + media_bus_fmt_sgbrg8_1x8, + data_type_raw_8bit, + decode_format_uncompressed_8_bit, + 8, + 1, + }, + { + media_bus_fmt_sgrbg8_1x8, + data_type_raw_8bit, + decode_format_uncompressed_8_bit, + 8, + 1, + }, + { + media_bus_fmt_srggb8_1x8, + data_type_raw_8bit, + decode_format_uncompressed_8_bit, + 8, + 1, + }, + { + media_bus_fmt_sbggr10_1x10, + data_type_raw_10bit, + decode_format_uncompressed_10_bit, + 10, + 1, + }, + { + media_bus_fmt_sgbrg10_1x10, + data_type_raw_10bit, + decode_format_uncompressed_10_bit, + 10, + 1, + }, + { + media_bus_fmt_sgrbg10_1x10, + data_type_raw_10bit, + decode_format_uncompressed_10_bit, + 10, + 1, + }, + { + media_bus_fmt_srggb10_1x10, + data_type_raw_10bit, + decode_format_uncompressed_10_bit, + 10, + 1, + }, + { + media_bus_fmt_y10_1x10, + data_type_raw_10bit, + decode_format_uncompressed_10_bit, + 10, + 1, + }, + { + media_bus_fmt_sbggr12_1x12, + data_type_raw_12bit, + decode_format_uncompressed_12_bit, + 12, + 1, + }, + { + media_bus_fmt_sgbrg12_1x12, + data_type_raw_12bit, + decode_format_uncompressed_12_bit, + 12, + 1, + }, + { + media_bus_fmt_sgrbg12_1x12, + data_type_raw_12bit, + decode_format_uncompressed_12_bit, + 12, + 1, + }, + { + media_bus_fmt_srggb12_1x12, + data_type_raw_12bit, + decode_format_uncompressed_12_bit, + 12, + 1, + }, + { + media_bus_fmt_sbggr14_1x14, + data_type_raw_14bit, + decode_format_uncompressed_14_bit, + 14, + 1, + }, + { + media_bus_fmt_sgbrg14_1x14, + data_type_raw_14bit, + decode_format_uncompressed_14_bit, + 14, + 1, + }, + { + media_bus_fmt_sgrbg14_1x14, + data_type_raw_14bit, + decode_format_uncompressed_14_bit, + 14, + 1, + }, + { + media_bus_fmt_srggb14_1x14, + data_type_raw_14bit, + decode_format_uncompressed_14_bit, + 14, + 1, + }, +}; + +static void csid_configure_stream(struct csid_device *csid, u8 enable) +{ + struct csid_testgen_config *tg = &csid->testgen; + u32 val; + u32 phy_sel = 0; + u8 lane_cnt = csid->phy.lane_cnt; + struct v4l2_mbus_framefmt *input_format = &csid->fmt[msm_csid_pad_src]; + const struct csid_format *format = csid_get_fmt_entry(csid->formats, csid->nformats, + input_format->code); + + if (!lane_cnt) + lane_cnt = 4; + + if (!tg->enabled) + phy_sel = csid->phy.csiphy_id; + + if (enable) { + u8 vc = 0; /* virtual channel 0 */ + u8 dt_id = vc * 4; + + if (tg->enabled) { + /* config test generator */ + vc = 0xa; + + /* configure one dt, infinite frames */ + val = vc << tpg_vc_cfg0_vc_num; + val |= inteleaving_mode_one_shot << tpg_vc_cfg0_line_interleaving_mode; + val |= 0 << tpg_vc_cfg0_num_frames; + writel_relaxed(val, csid->base + csid_tpg_vc_cfg0); + + val = 0x740 << tpg_vc_cfg1_h_blanking_count; + val |= 0x3ff << tpg_vc_cfg1_v_blanking_count; + writel_relaxed(val, csid->base + csid_tpg_vc_cfg1); + + writel_relaxed(0x12345678, csid->base + csid_tpg_lfsr_seed); + + val = input_format->height & 0x1fff << tpg_dt_n_cfg_0_frame_height; + val |= input_format->width & 0x1fff << tpg_dt_n_cfg_0_frame_width; + writel_relaxed(val, csid->base + csid_tpg_dt_n_cfg_0(0)); + + val = data_type_raw_10bit << tpg_dt_n_cfg_1_data_type; + writel_relaxed(val, csid->base + csid_tpg_dt_n_cfg_1(0)); + + val = tg->mode << tpg_dt_n_cfg_2_payload_mode; + val |= 0xbe << tpg_dt_n_cfg_2_user_specified_payload; + val |= format->decode_format << tpg_dt_n_cfg_2_encode_format; + writel_relaxed(val, csid->base + csid_tpg_dt_n_cfg_2(0)); + + writel_relaxed(0, csid->base + csid_tpg_color_bars_cfg); + + writel_relaxed(0, csid->base + csid_tpg_color_box_cfg); + } + + val = 1 << rdi_cfg0_byte_cntr_en; + val |= 1 << rdi_cfg0_format_measure_en; + val |= 1 << rdi_cfg0_timestamp_en; + val |= decode_format_payload_only << rdi_cfg0_decode_format; + val |= data_type_raw_10bit << rdi_cfg0_data_type; + val |= vc << rdi_cfg0_virtual_channel; + val |= dt_id << rdi_cfg0_dt_id; + writel_relaxed(val, csid->base + csid_rdi_cfg0(0)); + + /* csid_timestamp_stb_post_irq */ + val = 2 << rdi_cfg1_timestamp_stb_sel; + writel_relaxed(val, csid->base + csid_rdi_cfg1(0)); + + val = 1; + writel_relaxed(val, csid->base + csid_rdi_frm_drop_period(0)); + + val = 0; + writel_relaxed(0, csid->base + csid_rdi_frm_drop_pattern(0)); + + val = 1; + writel_relaxed(val, csid->base + csid_rdi_irq_subsample_period(0)); + + val = 0; + writel_relaxed(val, csid->base + csid_rdi_irq_subsample_pattern(0)); + + val = 1; + writel_relaxed(val, csid->base + csid_rdi_rpp_pix_drop_period(0)); + + val = 0; + writel_relaxed(val, csid->base + csid_rdi_rpp_pix_drop_pattern(0)); + + val = 1; + writel_relaxed(val, csid->base + csid_rdi_rpp_line_drop_period(0)); + + val = 0; + writel_relaxed(val, csid->base + csid_rdi_rpp_line_drop_pattern(0)); + + val = 0; + writel_relaxed(val, csid->base + csid_rdi_ctrl(0)); + + val = readl_relaxed(csid->base + csid_rdi_cfg0(0)); + val |= 1 << rdi_cfg0_enable; + writel_relaxed(val, csid->base + csid_rdi_cfg0(0)); + } + + if (tg->enabled) { + val = enable << tpg_ctrl_test_en; + val |= 1 << tpg_ctrl_fs_pkt_en; + val |= 1 << tpg_ctrl_fe_pkt_en; + val |= (lane_cnt - 1) << tpg_ctrl_num_active_lanes; + val |= 0x64 << tpg_ctrl_cycles_between_pkts; + val |= 0xa << tpg_ctrl_num_trail_bytes; + writel_relaxed(val, csid->base + csid_tpg_ctrl); + } + + val = (lane_cnt - 1) << csi2_rx_cfg0_num_active_lanes; + val |= csid->phy.lane_assign << csi2_rx_cfg0_dl0_input_sel; + val |= phy_sel << csi2_rx_cfg0_phy_num_sel; + writel_relaxed(val, csid->base + csid_csi2_rx_cfg0); + + val = 1 << csi2_rx_cfg1_packet_ecc_correction_en; + val |= 1 << csi2_rx_cfg1_misr_en; + writel_relaxed(val, csid->base + csid_csi2_rx_cfg1); // csi2_vc_mode_shift_val ? + + /* error irqs start at bit(11) */ + writel_relaxed(~0u, csid->base + csid_csi2_rx_irq_mask); + + /* rdi irq */ + writel_relaxed(~0u, csid->base + csid_top_irq_mask); + + val = 1 << rdi_ctrl_halt_cmd; + writel_relaxed(val, csid->base + csid_rdi_ctrl(0)); +} + +static int csid_configure_testgen_pattern(struct csid_device *csid, s32 val) +{ + if (val > 0 && val <= csid->testgen.nmodes) + csid->testgen.mode = val; + + return 0; +} + +/* + * csid_hw_version - csid hardware version query + * @csid: csid device + * + * return hw version or error + */ +static u32 csid_hw_version(struct csid_device *csid) +{ + u32 hw_version; + u32 hw_gen; + u32 hw_rev; + u32 hw_step; + + hw_version = readl_relaxed(csid->base + csid_hw_version); + hw_gen = (hw_version >> hw_version_generation) & 0xf; + hw_rev = (hw_version >> hw_version_revision) & 0xfff; + hw_step = (hw_version >> hw_version_stepping) & 0xffff; + dev_dbg(csid->camss->dev, "csid hw version = %u.%u.%u ", + hw_gen, hw_rev, hw_step); + + return hw_version; +} + +/* + * csid_isr - csid module interrupt service routine + * @irq: interrupt line + * @dev: csid device + * + * return irq_handled on success + */ +static irqreturn_t csid_isr(int irq, void *dev) +{ + struct csid_device *csid = dev; + u32 val; + u8 reset_done; + + val = readl_relaxed(csid->base + csid_top_irq_status); + writel_relaxed(val, csid->base + csid_top_irq_clear); + reset_done = val & bit(top_irq_status_reset_done); + + val = readl_relaxed(csid->base + csid_csi2_rx_irq_status); + writel_relaxed(val, csid->base + csid_csi2_rx_irq_clear); + + val = readl_relaxed(csid->base + csid_csi2_rdin_irq_status(0)); + writel_relaxed(val, csid->base + csid_csi2_rdin_irq_clear(0)); + + val = 1 << irq_cmd_clear; + writel_relaxed(val, csid->base + csid_irq_cmd); + + if (reset_done) + complete(&csid->reset_complete); + + return irq_handled; +} + +/* + * csid_reset - trigger reset on csid module and wait to complete + * @csid: csid device + * + * return 0 on success or a negative error code otherwise + */ +static int csid_reset(struct csid_device *csid) +{ + unsigned long time; + u32 val; + + reinit_completion(&csid->reset_complete); + + writel_relaxed(1, csid->base + csid_top_irq_clear); + writel_relaxed(1, csid->base + csid_irq_cmd); + writel_relaxed(1, csid->base + csid_top_irq_mask); + writel_relaxed(1, csid->base + csid_irq_cmd); + + /* preserve registers */ + val = 0x1e << rst_strobes; + writel_relaxed(val, csid->base + csid_rst_strobes); + + time = wait_for_completion_timeout(&csid->reset_complete, + msecs_to_jiffies(csid_reset_timeout_ms)); + if (!time) { + dev_err(csid->camss->dev, "csid reset timeout "); + return -eio; + } + + return 0; +} + +static u32 csid_src_pad_code(struct csid_device *csid, u32 sink_code, + unsigned int match_format_idx, u32 match_code) +{ + switch (sink_code) { + case media_bus_fmt_sbggr10_1x10: + { + u32 src_code[] = { + media_bus_fmt_sbggr10_1x10, + media_bus_fmt_sbggr10_2x8_padhi_le, + }; + + return csid_find_code(src_code, array_size(src_code), + match_format_idx, match_code); + } + case media_bus_fmt_y10_1x10: + { + u32 src_code[] = { + media_bus_fmt_y10_1x10, + media_bus_fmt_y10_2x8_padhi_le, + }; + + return csid_find_code(src_code, array_size(src_code), + match_format_idx, match_code); + } + default: + if (match_format_idx > 0) + return 0; + + return sink_code; + } +} + +static void csid_subdev_init(struct csid_device *csid) +{ + csid->formats = csid_formats; + csid->nformats = array_size(csid_formats); + csid->testgen.modes = csid_testgen_modes; + csid->testgen.nmodes = csid_payload_mode_num_supported_gen2; +} + +const struct csid_hw_ops csid_ops_170 = { + .configure_stream = csid_configure_stream, + .configure_testgen_pattern = csid_configure_testgen_pattern, + .hw_version = csid_hw_version, + .isr = csid_isr, + .reset = csid_reset, + .src_pad_code = csid_src_pad_code, + .subdev_init = csid_subdev_init, +}; diff --git a/drivers/media/platform/qcom/camss/camss-csid.c b/drivers/media/platform/qcom/camss/camss-csid.c --- a/drivers/media/platform/qcom/camss/camss-csid.c +++ b/drivers/media/platform/qcom/camss/camss-csid.c + "complex pattern", + "color box", + "color bars", + } else if (clock->nfreqs) { + clk_set_rate(clock->clk, clock->freq[0]); + } else if (camss->version == camss_845) { + csid->ops = &csid_ops_170; diff --git a/drivers/media/platform/qcom/camss/camss-csid.h b/drivers/media/platform/qcom/camss/camss-csid.h --- a/drivers/media/platform/qcom/camss/camss-csid.h +++ b/drivers/media/platform/qcom/camss/camss-csid.h + csid_payload_mode_complex_pattern = 7, + csid_payload_mode_color_box = 8, + csid_payload_mode_color_bars = 9, + csid_payload_mode_num_supported_gen2 = 9, /* excluding disabled */ +extern const struct csid_hw_ops csid_ops_170; + diff --git a/drivers/media/platform/qcom/camss/camss-vfe-170.c b/drivers/media/platform/qcom/camss/camss-vfe-170.c --- a/drivers/media/platform/qcom/camss/camss-vfe-170.c +++ b/drivers/media/platform/qcom/camss/camss-vfe-170.c - //val = pix->plane_fmt[0].bytesperline; diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c +static const struct resources csid_res_845[] = { + /* csid0 */ + { + .regulator = { "vdda-csi0" }, + .clock = { "cpas_ahb", "cphy_rx_src", "slow_ahb_src", + "soc_ahb", "vfe0", "vfe0_src", + "vfe0_cphy_rx", "csi0", + "csi0_src" }, + .clock_rate = { { 0 }, + { 384000000 }, + { 80000000 }, + { 0 }, + { 19200000, 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 320000000 }, + { 0 }, + { 19200000, 75000000, 384000000, 538666667 }, + { 384000000 } }, + .reg = { "csid0" }, + .interrupt = { "csid0" } + }, + + /* csid1 */ + { + .regulator = { "vdda-csi1" }, + .clock = { "cpas_ahb", "cphy_rx_src", "slow_ahb_src", + "soc_ahb", "vfe1", "vfe1_src", + "vfe1_cphy_rx", "csi1", + "csi1_src" }, + .clock_rate = { { 0 }, + { 384000000 }, + { 80000000 }, + { 0 }, + { 19200000, 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 320000000 }, + { 0 }, + { 19200000, 75000000, 384000000, 538666667 }, + { 384000000 } }, + .reg = { "csid1" }, + .interrupt = { "csid1" } + }, + + /* csid2 */ + { + .regulator = { "vdda-csi2" }, + .clock = { "cpas_ahb", "cphy_rx_src", "slow_ahb_src", + "soc_ahb", "vfe_lite", "vfe_lite_src", + "vfe_lite_cphy_rx", "csi2", + "csi2_src" }, + .clock_rate = { { 0 }, + { 384000000 }, + { 80000000 }, + { 0 }, + { 19200000, 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 320000000 }, + { 0 }, + { 19200000, 75000000, 384000000, 538666667 }, + { 384000000 } }, + .reg = { "csid2" }, + .interrupt = { "csid2" } + } +}; +
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TV tuners, webcams, video capturers
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eebe6d00e9bf1216fb381b64146e1b7e50d90b3f
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robert foss andrey konovalov andrey konovalov linaro org
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drivers
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media
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camss, platform, qcom
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media: camss: add support for csiphy hardware version titan 170
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add register definitions for version 170 of the titan architecture and implement support for the csiphy subdevice.
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this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
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add support for the sdm845 camera subsystem
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['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
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['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
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[]
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['c']
| 3
| 288
| 31
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--- diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c --- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c +++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c +#define csiphy_default_params 0 +#define csiphy_lane_enable 1 +#define csiphy_settle_cnt_lower_byte 2 +#define csiphy_settle_cnt_higher_byte 3 +#define csiphy_dnp_params 4 +#define csiphy_2ph_regs 5 +#define csiphy_3ph_regs 6 + +struct csiphy_reg_t { + s32 reg_addr; + s32 reg_data; + s32 delay; + u32 csiphy_param_type; +}; + +static const struct +csiphy_reg_t lane_regs_sdm845[5][14] = { + { + {0x0004, 0x0c, 0x00, csiphy_default_params}, + {0x002c, 0x01, 0x00, csiphy_default_params}, + {0x0034, 0x0f, 0x00, csiphy_default_params}, + {0x001c, 0x0a, 0x00, csiphy_default_params}, + {0x0014, 0x60, 0x00, csiphy_default_params}, + {0x0028, 0x00, 0x00, csiphy_dnp_params}, + {0x003c, 0xb8, 0x00, csiphy_default_params}, + {0x0000, 0x91, 0x00, csiphy_default_params}, + {0x0008, 0x00, 0x00, csiphy_settle_cnt_lower_byte}, + {0x000c, 0x00, 0x00, csiphy_dnp_params}, + {0x0010, 0x52, 0x00, csiphy_default_params}, + {0x0038, 0xfe, 0x00, csiphy_default_params}, + {0x0060, 0x00, 0x00, csiphy_default_params}, + {0x0064, 0x7f, 0x00, csiphy_default_params}, + }, + { + {0x0704, 0x0c, 0x00, csiphy_default_params}, + {0x072c, 0x01, 0x00, csiphy_default_params}, + {0x0734, 0x0f, 0x00, csiphy_default_params}, + {0x071c, 0x0a, 0x00, csiphy_default_params}, + {0x0714, 0x60, 0x00, csiphy_default_params}, + {0x0728, 0x04, 0x00, csiphy_default_params}, + {0x073c, 0xb8, 0x00, csiphy_default_params}, + {0x0700, 0x80, 0x00, csiphy_default_params}, + {0x0708, 0x14, 0x00, csiphy_settle_cnt_lower_byte}, + {0x070c, 0xa5, 0x00, csiphy_default_params}, + {0x0710, 0x52, 0x00, csiphy_default_params}, + {0x0738, 0x1f, 0x00, csiphy_default_params}, + {0x0760, 0x00, 0x00, csiphy_default_params}, + {0x0764, 0x7f, 0x00, csiphy_default_params}, + }, + { + {0x0204, 0x0c, 0x00, csiphy_default_params}, + {0x022c, 0x01, 0x00, csiphy_default_params}, + {0x0234, 0x0f, 0x00, csiphy_default_params}, + {0x021c, 0x0a, 0x00, csiphy_default_params}, + {0x0214, 0x60, 0x00, csiphy_default_params}, + {0x0228, 0x00, 0x00, csiphy_dnp_params}, + {0x023c, 0xb8, 0x00, csiphy_default_params}, + {0x0200, 0x91, 0x00, csiphy_default_params}, + {0x0208, 0x00, 0x00, csiphy_settle_cnt_lower_byte}, + {0x020c, 0x00, 0x00, csiphy_dnp_params}, + {0x0210, 0x52, 0x00, csiphy_default_params}, + {0x0238, 0xfe, 0x00, csiphy_default_params}, + {0x0260, 0x00, 0x00, csiphy_default_params}, + {0x0264, 0x7f, 0x00, csiphy_default_params}, + }, + { + {0x0404, 0x0c, 0x00, csiphy_default_params}, + {0x042c, 0x01, 0x00, csiphy_default_params}, + {0x0434, 0x0f, 0x00, csiphy_default_params}, + {0x041c, 0x0a, 0x00, csiphy_default_params}, + {0x0414, 0x60, 0x00, csiphy_default_params}, + {0x0428, 0x00, 0x00, csiphy_dnp_params}, + {0x043c, 0xb8, 0x00, csiphy_default_params}, + {0x0400, 0x91, 0x00, csiphy_default_params}, + {0x0408, 0x00, 0x00, csiphy_settle_cnt_lower_byte}, + {0x040c, 0x00, 0x00, csiphy_dnp_params}, + {0x0410, 0x52, 0x00, csiphy_default_params}, + {0x0438, 0xfe, 0x00, csiphy_default_params}, + {0x0460, 0x00, 0x00, csiphy_default_params}, + {0x0464, 0x7f, 0x00, csiphy_default_params}, + }, + { + {0x0604, 0x0c, 0x00, csiphy_default_params}, + {0x062c, 0x01, 0x00, csiphy_default_params}, + {0x0634, 0x0f, 0x00, csiphy_default_params}, + {0x061c, 0x0a, 0x00, csiphy_default_params}, + {0x0614, 0x60, 0x00, csiphy_default_params}, + {0x0628, 0x00, 0x00, csiphy_dnp_params}, + {0x063c, 0xb8, 0x00, csiphy_default_params}, + {0x0600, 0x91, 0x00, csiphy_default_params}, + {0x0608, 0x00, 0x00, csiphy_settle_cnt_lower_byte}, + {0x060c, 0x00, 0x00, csiphy_dnp_params}, + {0x0610, 0x52, 0x00, csiphy_default_params}, + {0x0638, 0xfe, 0x00, csiphy_default_params}, + {0x0660, 0x00, 0x00, csiphy_default_params}, + {0x0664, 0x7f, 0x00, csiphy_default_params}, + }, +}; + -static void csiphy_lanes_enable(struct csiphy_device *csiphy, - struct csiphy_config *cfg, - s64 link_freq, u8 lane_mask) +static void csiphy_gen1_config_lanes(struct csiphy_device *csiphy, + struct csiphy_config *cfg, + u8 settle_cnt) - u8 settle_cnt; - u8 val, l = 0; - int i; - - settle_cnt = csiphy_settle_cnt_calc(link_freq, csiphy->timer_clk_rate); - - val = bit(c->clk.pos); - for (i = 0; i < c->num_data; i++) - val |= bit(c->data[i].pos * 2); - - writel_relaxed(val, csiphy->base + csiphy_3ph_cmn_csi_common_ctrln(5)); - - val = csiphy_3ph_cmn_csi_common_ctrl6_common_pwrdn_b; - writel_relaxed(val, csiphy->base + csiphy_3ph_cmn_csi_common_ctrln(6)); + int i, l = 0; + u8 val; +} + +static void csiphy_gen2_config_lanes(struct csiphy_device *csiphy, + u8 settle_cnt) +{ + int i, l; + u32 val; + + for (l = 0; l < 5; l++) { + for (i = 0; i < 14; i++) { + const struct csiphy_reg_t *r = &lane_regs_sdm845[l][i]; + + switch (r->csiphy_param_type) { + case csiphy_settle_cnt_lower_byte: + val = settle_cnt & 0xff; + break; + case csiphy_dnp_params: + continue; + default: + val = r->reg_data; + break; + } + writel_relaxed(val, csiphy->base + r->reg_addr); + } + } +} + +static void csiphy_lanes_enable(struct csiphy_device *csiphy, + struct csiphy_config *cfg, + s64 link_freq, u8 lane_mask) +{ + struct csiphy_lanes_cfg *c = &cfg->csi2->lane_cfg; + u8 settle_cnt; + u8 val; + int i; + + settle_cnt = csiphy_settle_cnt_calc(link_freq, csiphy->timer_clk_rate); + + val = bit(c->clk.pos); + for (i = 0; i < c->num_data; i++) + val |= bit(c->data[i].pos * 2); + + writel_relaxed(val, csiphy->base + csiphy_3ph_cmn_csi_common_ctrln(5)); + + val = csiphy_3ph_cmn_csi_common_ctrl6_common_pwrdn_b; + writel_relaxed(val, csiphy->base + csiphy_3ph_cmn_csi_common_ctrln(6)); + + val = 0x02; + writel_relaxed(val, csiphy->base + csiphy_3ph_cmn_csi_common_ctrln(7)); + + val = 0x00; + writel_relaxed(val, csiphy->base + csiphy_3ph_cmn_csi_common_ctrln(0)); + + if (csiphy->camss->version == camss_8x16 || + csiphy->camss->version == camss_8x96) + csiphy_gen1_config_lanes(csiphy, cfg, settle_cnt); + else if (csiphy->camss->version == camss_845) + csiphy_gen2_config_lanes(csiphy, settle_cnt); diff --git a/drivers/media/platform/qcom/camss/camss-csiphy.c b/drivers/media/platform/qcom/camss/camss-csiphy.c --- a/drivers/media/platform/qcom/camss/camss-csiphy.c +++ b/drivers/media/platform/qcom/camss/camss-csiphy.c +static const struct csiphy_format csiphy_formats_sdm845[] = { + { media_bus_fmt_uyvy8_2x8, 8 }, + { media_bus_fmt_vyuy8_2x8, 8 }, + { media_bus_fmt_yuyv8_2x8, 8 }, + { media_bus_fmt_yvyu8_2x8, 8 }, + { media_bus_fmt_sbggr8_1x8, 8 }, + { media_bus_fmt_sgbrg8_1x8, 8 }, + { media_bus_fmt_sgrbg8_1x8, 8 }, + { media_bus_fmt_srggb8_1x8, 8 }, + { media_bus_fmt_sbggr10_1x10, 10 }, + { media_bus_fmt_sgbrg10_1x10, 10 }, + { media_bus_fmt_sgrbg10_1x10, 10 }, + { media_bus_fmt_srggb10_1x10, 10 }, + { media_bus_fmt_sbggr12_1x12, 12 }, + { media_bus_fmt_sgbrg12_1x12, 12 }, + { media_bus_fmt_sgrbg12_1x12, 12 }, + { media_bus_fmt_srggb12_1x12, 12 }, + { media_bus_fmt_sbggr14_1x14, 14 }, + { media_bus_fmt_sgbrg14_1x14, 14 }, + { media_bus_fmt_sgrbg14_1x14, 14 }, + { media_bus_fmt_srggb14_1x14, 14 }, + { media_bus_fmt_y10_1x10, 10 }, +}; + - val = readl_relaxed(csiphy->base_clk_mux); - if (cfg->combo_mode && (lane_mask & 0x18) == 0x18) { - val &= ~0xf0; - val |= cfg->csid_id << 4; - } else { - val &= ~0xf; - val |= cfg->csid_id; + if (csiphy->base_clk_mux) { + val = readl_relaxed(csiphy->base_clk_mux); + if (cfg->combo_mode && (lane_mask & 0x18) == 0x18) { + val &= ~0xf0; + val |= cfg->csid_id << 4; + } else { + val &= ~0xf; + val |= cfg->csid_id; + } + writel_relaxed(val, csiphy->base_clk_mux); + + /* enforce reg write ordering between clk mux & lane enabling */ + wmb(); - writel_relaxed(val, csiphy->base_clk_mux); - wmb(); + } else if (camss->version == camss_845) { + csiphy->ops = &csiphy_ops_3ph_1_0; + csiphy->formats = csiphy_formats_sdm845; + csiphy->nformats = array_size(csiphy_formats_sdm845); - r = platform_get_resource_byname(pdev, ioresource_mem, res->reg[1]); - csiphy->base_clk_mux = devm_ioremap_resource(dev, r); - if (is_err(csiphy->base_clk_mux)) { - dev_err(dev, "could not map memory "); - return ptr_err(csiphy->base_clk_mux); + if (camss->version == camss_8x16 || + camss->version == camss_8x96) { + r = platform_get_resource_byname(pdev, ioresource_mem, + res->reg[1]); + csiphy->base_clk_mux = devm_ioremap_resource(dev, r); + if (is_err(csiphy->base_clk_mux)) { + dev_err(dev, "could not map memory "); + return ptr_err(csiphy->base_clk_mux); + } + } else { + csiphy->base_clk_mux = null; diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c +static const struct resources csiphy_res_845[] = { + /* csiphy0 */ + { + .regulator = { null }, + .clock = { "camnoc_axi", "soc_ahb", "slow_ahb_src", + "cpas_ahb", "cphy_rx_src", "csiphy0", + "csiphy0_timer_src", "csiphy0_timer" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 0 }, + { 0 }, + { 0 }, + { 0 }, + { 19200000, 240000000, 269333333 } }, + .reg = { "csiphy0" }, + .interrupt = { "csiphy0" } + }, + + /* csiphy1 */ + { + .regulator = { null }, + .clock = { "camnoc_axi", "soc_ahb", "slow_ahb_src", + "cpas_ahb", "cphy_rx_src", "csiphy1", + "csiphy1_timer_src", "csiphy1_timer" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 0 }, + { 0 }, + { 0 }, + { 0 }, + { 19200000, 240000000, 269333333 } }, + .reg = { "csiphy1" }, + .interrupt = { "csiphy1" } + }, + + /* csiphy2 */ + { + .regulator = { null }, + .clock = { "camnoc_axi", "soc_ahb", "slow_ahb_src", + "cpas_ahb", "cphy_rx_src", "csiphy2", + "csiphy2_timer_src", "csiphy2_timer" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 0 }, + { 0 }, + { 0 }, + { 0 }, + { 19200000, 240000000, 269333333 } }, + .reg = { "csiphy2" }, + .interrupt = { "csiphy2" } + }, + + /* csiphy3 */ + { + .regulator = { null }, + .clock = { "camnoc_axi", "soc_ahb", "slow_ahb_src", + "cpas_ahb", "cphy_rx_src", "csiphy3", + "csiphy3_timer_src", "csiphy3_timer" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 0 }, + { 0 }, + { 0 }, + { 0 }, + { 19200000, 240000000, 269333333 } }, + .reg = { "csiphy3" }, + .interrupt = { "csiphy3" } + } +}; +
|
TV tuners, webcams, video capturers
|
2f8b67195e4839c02151f255a5c93c250b6df968
|
robert foss andrey konovalov andrey konovalov linaro org
|
drivers
|
media
|
camss, platform, qcom
|
media: camss: refactor vfe power domain toggling
|
for titan isps clocks fail to re-enable during vfe_get() after any vfe has been halted and its corresponding power domain power has been detached.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add support for the sdm845 camera subsystem
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['h', 'c']
| 8
| 188
| 36
|
--- diff --git a/drivers/media/platform/qcom/camss/camss-vfe-170.c b/drivers/media/platform/qcom/camss/camss-vfe-170.c --- a/drivers/media/platform/qcom/camss/camss-vfe-170.c +++ b/drivers/media/platform/qcom/camss/camss-vfe-170.c +/* + * vfe_pm_domain_off - disable power domains specific to this vfe. + * @vfe: vfe device + */ +static void vfe_pm_domain_off(struct vfe_device *vfe) +{ + /* nop */ +} + +/* + * vfe_pm_domain_on - enable power domains specific to this vfe. + * @vfe: vfe device + */ +static int vfe_pm_domain_on(struct vfe_device *vfe) +{ + return 0; +} + + .pm_domain_off = vfe_pm_domain_off, + .pm_domain_on = vfe_pm_domain_on, diff --git a/drivers/media/platform/qcom/camss/camss-vfe-4-1.c b/drivers/media/platform/qcom/camss/camss-vfe-4-1.c --- a/drivers/media/platform/qcom/camss/camss-vfe-4-1.c +++ b/drivers/media/platform/qcom/camss/camss-vfe-4-1.c +/* + * vfe_pm_domain_off - disable power domains specific to this vfe. + * @vfe: vfe device + */ +static void vfe_pm_domain_off(struct vfe_device *vfe) +{ + /* nop */ +} + +/* + * vfe_pm_domain_on - enable power domains specific to this vfe. + * @vfe: vfe device + */ +static int vfe_pm_domain_on(struct vfe_device *vfe) +{ + return 0; +} + + .pm_domain_off = vfe_pm_domain_off, + .pm_domain_on = vfe_pm_domain_on, diff --git a/drivers/media/platform/qcom/camss/camss-vfe-4-7.c b/drivers/media/platform/qcom/camss/camss-vfe-4-7.c --- a/drivers/media/platform/qcom/camss/camss-vfe-4-7.c +++ b/drivers/media/platform/qcom/camss/camss-vfe-4-7.c +#include <linux/device.h> +/* + * vfe_pm_domain_off - disable power domains specific to this vfe. + * @vfe: vfe device + */ +static void vfe_pm_domain_off(struct vfe_device *vfe) +{ + struct camss *camss; + + if (!vfe) + return; + + camss = vfe->camss; + + device_link_del(camss->genpd_link[vfe->id]); +} + +/* + * vfe_pm_domain_on - enable power domains specific to this vfe. + * @vfe: vfe device + */ +static int vfe_pm_domain_on(struct vfe_device *vfe) +{ + struct camss *camss = vfe->camss; + enum vfe_line_id id = vfe->id; + + camss->genpd_link[id] = device_link_add(camss->dev, camss->genpd[id], dl_flag_stateless | + dl_flag_pm_runtime | dl_flag_rpm_active); + + if (!camss->genpd_link[id]) { + dev_err(vfe->camss->dev, "failed to add vfe#%d to power domain ", id); + return -einval; + } + + return 0; +} + + .pm_domain_off = vfe_pm_domain_off, + .pm_domain_on = vfe_pm_domain_on, diff --git a/drivers/media/platform/qcom/camss/camss-vfe-4-8.c b/drivers/media/platform/qcom/camss/camss-vfe-4-8.c --- a/drivers/media/platform/qcom/camss/camss-vfe-4-8.c +++ b/drivers/media/platform/qcom/camss/camss-vfe-4-8.c +#include <linux/device.h> +/* + * vfe_pm_domain_off - disable power domains specific to this vfe. + * @vfe: vfe device + */ +static void vfe_pm_domain_off(struct vfe_device *vfe) +{ + struct camss *camss = vfe->camss; + + device_link_del(camss->genpd_link[vfe->id]); +} + +/* + * vfe_pm_domain_on - enable power domains specific to this vfe. + * @vfe: vfe device + */ +static int vfe_pm_domain_on(struct vfe_device *vfe) +{ + struct camss *camss = vfe->camss; + enum vfe_line_id id = vfe->id; + + camss->genpd_link[id] = device_link_add(camss->dev, camss->genpd[id], dl_flag_stateless | + dl_flag_pm_runtime | dl_flag_rpm_active); + + if (!camss->genpd_link[id]) { + dev_err(vfe->camss->dev, "failed to add vfe#%d to power domain ", id); + return -einval; + } + + return 0; +} + + .pm_domain_off = vfe_pm_domain_off, + .pm_domain_on = vfe_pm_domain_on, diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/platform/qcom/camss/camss-vfe.c --- a/drivers/media/platform/qcom/camss/camss-vfe.c +++ b/drivers/media/platform/qcom/camss/camss-vfe.c - ret = camss_pm_domain_on(vfe->camss, vfe->id); + ret = vfe->ops->pm_domain_on(vfe); - camss_pm_domain_off(vfe->camss, vfe->id); + vfe->ops->pm_domain_off(vfe); - camss_pm_domain_off(vfe->camss, vfe->id); + vfe->ops->pm_domain_off(vfe); diff --git a/drivers/media/platform/qcom/camss/camss-vfe.h b/drivers/media/platform/qcom/camss/camss-vfe.h --- a/drivers/media/platform/qcom/camss/camss-vfe.h +++ b/drivers/media/platform/qcom/camss/camss-vfe.h + void (*pm_domain_off)(struct vfe_device *vfe); + int (*pm_domain_on)(struct vfe_device *vfe); diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c - if (camss->version == camss_8x96 || - camss->version == camss_660) { - camss->genpd_link[id] = device_link_add(camss->dev, - camss->genpd[id], dl_flag_stateless | - dl_flag_pm_runtime | dl_flag_rpm_active); + int ret = 0; + + if (id < camss->vfe_num) { + struct vfe_device *vfe = &camss->vfe[id]; - if (!camss->genpd_link[id]) - return -einval; + ret = vfe->ops->pm_domain_on(vfe); - return 0; + return ret; - if (camss->version == camss_8x96 || - camss->version == camss_660) - device_link_del(camss->genpd_link[id]); + if (id < camss->vfe_num) { + struct vfe_device *vfe = &camss->vfe[id]; + + vfe->ops->pm_domain_off(vfe); + } +static int camss_configure_pd(struct camss *camss) +{ + int nbr_pm_domains = 0; + int last_pm_domain = 0; + int i; + int ret; + + if (camss->version == camss_8x96 || + camss->version == camss_660) + nbr_pm_domains = pm_domain_gen1_count; + + for (i = 0; i < nbr_pm_domains; i++) { + camss->genpd[i] = dev_pm_domain_attach_by_id(camss->dev, i); + if (is_err(camss->genpd[i])) { + ret = ptr_err(camss->genpd[i]); + goto fail_pm; + } + + camss->genpd_link[i] = device_link_add(camss->dev, camss->genpd[i], + dl_flag_stateless | dl_flag_pm_runtime | + dl_flag_rpm_active); + if (!camss->genpd_link[i]) { + dev_pm_domain_detach(camss->genpd[i], true); + ret = -einval; + goto fail_pm; + } + + last_pm_domain = i; + } + + return 0; + +fail_pm: + for (i = 0; i < last_pm_domain; i++) { + device_link_del(camss->genpd_link[i]); + dev_pm_domain_detach(camss->genpd[i], true); + } + + return ret; +} + - if (camss->version == camss_8x96 || - camss->version == camss_660) { - camss->genpd[pm_domain_vfe0] = dev_pm_domain_attach_by_id( - camss->dev, pm_domain_vfe0); - if (is_err(camss->genpd[pm_domain_vfe0])) - return ptr_err(camss->genpd[pm_domain_vfe0]); - - camss->genpd[pm_domain_vfe1] = dev_pm_domain_attach_by_id( - camss->dev, pm_domain_vfe1); - if (is_err(camss->genpd[pm_domain_vfe1])) { - dev_pm_domain_detach(camss->genpd[pm_domain_vfe0], - true); - return ptr_err(camss->genpd[pm_domain_vfe1]); - } + ret = camss_configure_pd(camss); + if (ret < 0) { + dev_err(dev, "failed to configure power domains: %d ", ret); + return ret; + int nbr_pm_domains = 0; + int i; + - camss->version == camss_660) { - dev_pm_domain_detach(camss->genpd[pm_domain_vfe0], true); - dev_pm_domain_detach(camss->genpd[pm_domain_vfe1], true); + camss->version == camss_660) + nbr_pm_domains = pm_domain_gen1_count; + + for (i = 0; i < nbr_pm_domains; i++) { + device_link_del(camss->genpd_link[i]); + dev_pm_domain_detach(camss->genpd[i], true); diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/platform/qcom/camss/camss.h --- a/drivers/media/platform/qcom/camss/camss.h +++ b/drivers/media/platform/qcom/camss/camss.h - pm_domain_vfe0, - pm_domain_vfe1, - pm_domain_count + pm_domain_vfe0 = 0, + pm_domain_vfe1 = 1, + pm_domain_gen1_count = 2, /* camss series of isps */ - struct device *genpd[pm_domain_count]; - struct device_link *genpd_link[pm_domain_count]; + struct device *genpd[pm_domain_gen1_count]; + struct device_link *genpd_link[pm_domain_gen1_count];
|
TV tuners, webcams, video capturers
|
2f6f8af672038b34d71e16ce9b30c59cc987db2b
|
robert foss
|
drivers
|
media
|
camss, platform, qcom
|
media: camss: enable sdm845
|
enable support for sdm845 based titan 170 isps.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add support for the sdm845 camera subsystem
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['h', 'c']
| 2
| 21
| 2
|
--- diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c + } else if (camss->version == camss_845) { + csiphy_res = csiphy_res_845; + csid_res = csid_res_845; + /* titan vfes don't have an ispif */ + ispif_res = null; + vfe_res = vfe_res_845; + else if (camss->version == camss_845) + nbr_pm_domains = pm_domain_gen2_count; + } else if (of_device_is_compatible(dev->of_node, + "qcom,sdm845-camss")) { + camss->version = camss_845; + camss->csiphy_num = 4; + camss->csid_num = 3; + camss->vfe_num = 3; + else if (camss->version == camss_845) + nbr_pm_domains = pm_domain_gen2_count; + { .compatible = "qcom,sdm845-camss" }, diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/platform/qcom/camss/camss.h --- a/drivers/media/platform/qcom/camss/camss.h +++ b/drivers/media/platform/qcom/camss/camss.h + pm_domain_vfelite = 2, /* vfelite / top gdsc */ + pm_domain_gen2_count = 3, /* titan series of isps */ - struct device *genpd[pm_domain_gen1_count]; - struct device_link *genpd_link[pm_domain_gen1_count]; + struct device *genpd[pm_domain_gen2_count]; + struct device_link *genpd_link[pm_domain_gen2_count];
|
TV tuners, webcams, video capturers
|
705245679372b8aee67924a69dc0bb49e111380a
|
robert foss andrey konovalov andrey konovalov linaro org
|
drivers
|
media
|
camss, platform, qcom
|
media: v4l: add packed yuv444 24bpp pixel format
|
the added format is v4l2_pix_fmt_yuv24, this is a packed yuv 4:4:4 format, with 8 bits for each component, 24 bits per sample.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['h', 'c', 'rst']
| 3
| 12
| 0
|
--- diff --git a/documentation/userspace-api/media/v4l/pixfmt-packed-yuv.rst b/documentation/userspace-api/media/v4l/pixfmt-packed-yuv.rst --- a/documentation/userspace-api/media/v4l/pixfmt-packed-yuv.rst +++ b/documentation/userspace-api/media/v4l/pixfmt-packed-yuv.rst - y'\ :sub:'7-0' - x\ :sub:'7-0' + * .. _v4l2-pix-fmt-yuv24: + + - ''v4l2_pix_fmt_yuv24'' + - 'yuv3' + + - y'\ :sub:'7-0' + - cb\ :sub:'7-0' + - cr\ :sub:'7-0' + - -\ + - the alpha component is expected to contain a meaningful value that can be diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c --- a/drivers/media/v4l2-core/v4l2-ioctl.c +++ b/drivers/media/v4l2-core/v4l2-ioctl.c + case v4l2_pix_fmt_yuv24: descr = "24-bit yuv 4:4:4 8-8-8"; break; diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h --- a/include/uapi/linux/videodev2.h +++ b/include/uapi/linux/videodev2.h +#define v4l2_pix_fmt_yuv24 v4l2_fourcc('y', 'u', 'v', '3') /* 24 yuv-8-8-8 */
|
TV tuners, webcams, video capturers
|
0376a51fbe5e11a59d6a5c55e57cc201da06dbe0
|
mirela rabulea
|
documentation
|
userspace-api
|
linux, media, v4l, v4l2-core
|
media: dt-bindings: add bindings for i.mx8qxp/qm jpeg driver
|
add bindings documentation for i.mx8qxp/qm jpeg decoder & encoder driver.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['yaml']
| 1
| 84
| 0
|
--- diff --git a/documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml b/documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml --- /dev/null +++ b/documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml +# spdx-license-identifier: (gpl-2.0 or bsd-2-clause) +%yaml 1.2 +--- +$id: http://devicetree.org/schemas/media/nxp,imx8-jpeg.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: i.mx8qxp/qm jpeg decoder/encoder device tree bindings + +maintainers: + - mirela rabulea <mirela.rabulea@nxp.com> + +description: |- + the jpeg decoder/encoder present in imx8qxp and imx8qm socs is an + iso/iec 10918-1 jpeg standard compliant decoder/encoder, for baseline + and extended sequential dct modes. + +properties: + compatible: + items: + - enum: + # jpeg decoder + - nxp,imx8qxp-jpgdec + # jpeg encoder + - nxp,imx8qxp-jpgenc + + reg: + maxitems: 1 + + interrupts: + description: | + there are 4 slots available in the ip, which the driver may use + if a certain slot is used, it should have an associated interrupt + the interrupt with index i is assumed to be for slot i + minitems: 1 # at least one slot is needed by the driver + maxitems: 4 # the ip has 4 slots available for use + + power-domains: + description: + list of phandle and pm domain specifier as documented in + documentation/devicetree/bindings/power/power_domain.txt + minitems: 2 # wrapper and 1 slot + maxitems: 5 # wrapper and 4 slots + +required: + - compatible + - reg + - interrupts + - power-domains + +additionalproperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/firmware/imx/rsrc.h> + + jpegdec: jpegdec@58400000 { + compatible = "nxp,imx8qxp-jpgdec"; + reg = <0x58400000 0x00050000 >; + interrupts = <gic_spi 309 irq_type_level_high>, + <gic_spi 310 irq_type_level_high>, + <gic_spi 311 irq_type_level_high>, + <gic_spi 312 irq_type_level_high>; + power-domains = <&pd imx_sc_r_mjpeg_dec_mp>, + <&pd imx_sc_r_mjpeg_dec_s0>, + <&pd imx_sc_r_mjpeg_dec_s1>, + <&pd imx_sc_r_mjpeg_dec_s2>, + <&pd imx_sc_r_mjpeg_dec_s3>; + }; + + jpegenc: jpegenc@58450000 { + compatible = "nxp,imx8qxp-jpgenc"; + reg = <0x58450000 0x00050000 >; + interrupts = <gic_spi 305 irq_type_level_high>, + <gic_spi 306 irq_type_level_high>, + <gic_spi 307 irq_type_level_high>, + <gic_spi 308 irq_type_level_high>; + power-domains = <&pd imx_sc_r_mjpeg_enc_mp>, + <&pd imx_sc_r_mjpeg_enc_s0>, + <&pd imx_sc_r_mjpeg_enc_s1>, + <&pd imx_sc_r_mjpeg_enc_s2>, + <&pd imx_sc_r_mjpeg_enc_s3>; + }; +...
|
TV tuners, webcams, video capturers
|
b16ed1e660085dc9e6c8425e9c584055484f4665
|
mirela rabulea rob herring robh kernel org
|
documentation
|
devicetree
|
bindings, media
|
media: add parsing for app14 data segment in jpeg helpers
|
according to rec. itu-t t.872 (06/2012) 6.5.3 app14 segment is for color encoding, it contains a transform flag, which may have values of 0, 1 and 2 and are interpreted as follows: 0 - cmyk for images that are encoded with four components - rgb for images that are encoded with three components 1 - an image encoded with three components using ycbcr colour encoding. 2 - an image encoded with four components using ycck colour encoding.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['h', 'c']
| 2
| 61
| 1
|
- rgb for images that are encoded with three components --- diff --git a/drivers/media/v4l2-core/v4l2-jpeg.c b/drivers/media/v4l2-core/v4l2-jpeg.c --- a/drivers/media/v4l2-core/v4l2-jpeg.c +++ b/drivers/media/v4l2-core/v4l2-jpeg.c +#define app14 0xffee /* application data for colour encoding */ +/* rec. itu-t t.872 (06/2012) 6.5.3 */ +static int jpeg_parse_app14_data(struct jpeg_stream *stream, + enum v4l2_jpeg_app14_tf *tf) +{ + int ret; + int lp; + int skip; + + lp = jpeg_get_word_be(stream); + if (lp < 0) + return lp; + + /* check for "adobe" in ap1..6 */ + if (stream->curr + 6 > stream->end || + strncmp(stream->curr, "adobe", 6)) + return -einval; + + /* get to ap12 */ + ret = jpeg_skip(stream, 11); + if (ret < 0) + return ret; + + ret = jpeg_get_byte(stream); + if (ret < 0) + return ret; + + *tf = ret; + + /* skip the rest of the segment, this ensures at least it is complete */ + skip = lp - 2 - 11; + return jpeg_skip(stream, skip); +} + + /* init value to signal if this marker is not present */ + out->app14_tf = v4l2_jpeg_app14_tf_unknown; + - + case app14: + ret = jpeg_parse_app14_data(&stream, + &out->app14_tf); + break; diff --git a/include/media/v4l2-jpeg.h b/include/media/v4l2-jpeg.h --- a/include/media/v4l2-jpeg.h +++ b/include/media/v4l2-jpeg.h +/** + * enum v4l2_jpeg_app14_tf - app14 transform flag + * according to rec. itu-t t.872 (06/2012) 6.5.3 + * app14 segment is for color encoding, it contains a transform flag, + * which may have values of 0, 1 and 2 and are interpreted as follows: + * @v4l2_jpeg_app14_tf_cmyk_rgb: cmyk for images encoded with four components + * rgb for images encoded with three components + * @v4l2_jpeg_app14_tf_ycbcr: an image encoded with three components using ycbcr + * @v4l2_jpeg_app14_tf_ycck: an image encoded with four components using ycck + * @v4l2_jpeg_app14_tf_unknown: indicate app14 is not present + */ +enum v4l2_jpeg_app14_tf { + v4l2_jpeg_app14_tf_cmyk_rgb = 0, + v4l2_jpeg_app14_tf_ycbcr = 1, + v4l2_jpeg_app14_tf_ycck = 2, + v4l2_jpeg_app14_tf_unknown = -1, +}; + + * @app14_tf: transform flag from app14 data + enum v4l2_jpeg_app14_tf app14_tf;
|
TV tuners, webcams, video capturers
|
b8035f7988a82cbbabf1009b9f3234ff2431f8a4
|
mirela rabulea
|
drivers
|
media
|
v4l2-core
|
media: quit parsing stream if doesn't start with soi
|
in the case we get an invalid stream, such as from v4l2-compliance streaming test, jpeg_next_marker will end up parsing the entire stream. the standard describes the high level syntax of a jpeg as starting with soi, ending with eoi, so return error if the very first 2 bytes are not soi.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['c']
| 1
| 2
| 5
|
--- diff --git a/drivers/media/v4l2-core/v4l2-jpeg.c b/drivers/media/v4l2-core/v4l2-jpeg.c --- a/drivers/media/v4l2-core/v4l2-jpeg.c +++ b/drivers/media/v4l2-core/v4l2-jpeg.c - /* the first marker must be soi */ - marker = jpeg_next_marker(&stream); - if (marker < 0) - return marker; - if (marker != soi) + /* the first bytes must be soi, b.2.1 high-level syntax */ + if (jpeg_get_word_be(&stream) != soi)
|
TV tuners, webcams, video capturers
|
ccbea178db47bf4a111ee97c0d77678818563a93
|
mirela rabulea philipp zabel p zabel pengutronix de
|
drivers
|
media
|
v4l2-core
|
media: avoid parsing quantization and huffman tables
|
these are optional in struct v4l2_jpeg_header, so skip dht/dqt segment parsing if huffman_tables/quantization_tables were not requested by user, to save time. however, do count them (num_dht/num_dqt).
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['c']
| 1
| 8
| 0
|
--- diff --git a/drivers/media/v4l2-core/v4l2-jpeg.c b/drivers/media/v4l2-core/v4l2-jpeg.c --- a/drivers/media/v4l2-core/v4l2-jpeg.c +++ b/drivers/media/v4l2-core/v4l2-jpeg.c + if (!out->huffman_tables) { + ret = jpeg_skip_segment(&stream); + break; + } + if (!out->quantization_tables) { + ret = jpeg_skip_segment(&stream); + break; + }
|
TV tuners, webcams, video capturers
|
819f3ea51d476dec23e11586a70f47972d61c00a
|
mirela rabulea philipp zabel p zabel pengutronix de
|
drivers
|
media
|
v4l2-core
|
media: imx-jpeg: add v4l2 driver for i.mx8 jpeg encoder/decoder
|
v4l2 driver for the jpeg encoder/decoder from i.mx8qxp/i.mx8qm application processors. the multi-planar buffers api is used.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['h', 'kconfig', 'c', 'makefile']
| 8
| 2,630
| 0
|
--- diff --git a/drivers/media/platform/kconfig b/drivers/media/platform/kconfig --- a/drivers/media/platform/kconfig +++ b/drivers/media/platform/kconfig +source "drivers/media/platform/imx-jpeg/kconfig" + diff --git a/drivers/media/platform/makefile b/drivers/media/platform/makefile --- a/drivers/media/platform/makefile +++ b/drivers/media/platform/makefile +obj-$(config_video_imx8_jpeg) += imx-jpeg/ diff --git a/drivers/media/platform/imx-jpeg/kconfig b/drivers/media/platform/imx-jpeg/kconfig --- /dev/null +++ b/drivers/media/platform/imx-jpeg/kconfig +# spdx-license-identifier: gpl-2.0 +config video_imx8_jpeg + tristate "imx8 jpeg encoder/decoder" + depends on video_dev && video_v4l2 + select videobuf2_dma_contig + select v4l2_mem2mem_dev + select v4l2_jpeg_helper + default m + help + this is a video4linux2 driver for the i.mx8 qxp/qm integrated + jpeg encoder/decoder. diff --git a/drivers/media/platform/imx-jpeg/makefile b/drivers/media/platform/imx-jpeg/makefile --- /dev/null +++ b/drivers/media/platform/imx-jpeg/makefile +# spdx-license-identifier: gpl-2.0 +mxc-jpeg-encdec-objs := mxc-jpeg-hw.o mxc-jpeg.o +obj-$(config_video_imx8_jpeg) += mxc-jpeg-encdec.o diff --git a/drivers/media/platform/imx-jpeg/mxc-jpeg-hw.c b/drivers/media/platform/imx-jpeg/mxc-jpeg-hw.c --- /dev/null +++ b/drivers/media/platform/imx-jpeg/mxc-jpeg-hw.c +// spdx-license-identifier: gpl-2.0 +/* + * i.mx8qxp/i.mx8qm jpeg encoder/decoder v4l2 driver + * + * copyright 2018-2019 nxp + */ + +#include <linux/delay.h> +#include <media/videobuf2-core.h> +#include "mxc-jpeg-hw.h" + +#define print_wrapper_reg(dev, base_address, reg_offset)\ + internal_print_wrapper_reg(dev, (base_address), #reg_offset,\ + (reg_offset)) +#define internal_print_wrapper_reg(dev, base_address, reg_name, reg_offset) {\ + int val;\ + val = readl((base_address) + (reg_offset));\ + dev_dbg(dev, "wrapper reg %s = 0x%x ", reg_name, val);\ +} + +void print_descriptor_info(struct device *dev, struct mxc_jpeg_desc *desc) +{ + dev_dbg(dev, " mxc jpeg next_descpt_ptr 0x%x ", + desc->next_descpt_ptr); + dev_dbg(dev, " mxc jpeg buf_base0 0x%x ", desc->buf_base0); + dev_dbg(dev, " mxc jpeg buf_base1 0x%x ", desc->buf_base1); + dev_dbg(dev, " mxc jpeg line_pitch %d ", desc->line_pitch); + dev_dbg(dev, " mxc jpeg stm_bufbase 0x%x ", desc->stm_bufbase); + dev_dbg(dev, " mxc jpeg stm_bufsize %d ", desc->stm_bufsize); + dev_dbg(dev, " mxc jpeg imgsize %x (%d x %d) ", desc->imgsize, + desc->imgsize >> 16, desc->imgsize & 0xffff); + dev_dbg(dev, " mxc jpeg stm_ctrl 0x%x ", desc->stm_ctrl); +} + +void print_cast_status(struct device *dev, void __iomem *reg, + unsigned int mode) +{ + dev_dbg(dev, "cast ip status regs: "); + print_wrapper_reg(dev, reg, cast_status0); + print_wrapper_reg(dev, reg, cast_status1); + print_wrapper_reg(dev, reg, cast_status2); + print_wrapper_reg(dev, reg, cast_status3); + print_wrapper_reg(dev, reg, cast_status4); + print_wrapper_reg(dev, reg, cast_status5); + print_wrapper_reg(dev, reg, cast_status6); + print_wrapper_reg(dev, reg, cast_status7); + print_wrapper_reg(dev, reg, cast_status8); + print_wrapper_reg(dev, reg, cast_status9); + print_wrapper_reg(dev, reg, cast_status10); + print_wrapper_reg(dev, reg, cast_status11); + print_wrapper_reg(dev, reg, cast_status12); + print_wrapper_reg(dev, reg, cast_status13); + if (mode == mxc_jpeg_decode) + return; + print_wrapper_reg(dev, reg, cast_status14); + print_wrapper_reg(dev, reg, cast_status15); + print_wrapper_reg(dev, reg, cast_status16); + print_wrapper_reg(dev, reg, cast_status17); + print_wrapper_reg(dev, reg, cast_status18); + print_wrapper_reg(dev, reg, cast_status19); +} + +void print_wrapper_info(struct device *dev, void __iomem *reg) +{ + dev_dbg(dev, "wrapper regs: "); + print_wrapper_reg(dev, reg, glb_ctrl); + print_wrapper_reg(dev, reg, com_status); + print_wrapper_reg(dev, reg, buf_base0); + print_wrapper_reg(dev, reg, buf_base1); + print_wrapper_reg(dev, reg, line_pitch); + print_wrapper_reg(dev, reg, stm_bufbase); + print_wrapper_reg(dev, reg, stm_bufsize); + print_wrapper_reg(dev, reg, imgsize); + print_wrapper_reg(dev, reg, stm_ctrl); +} + +void mxc_jpeg_enable_irq(void __iomem *reg, int slot) +{ + writel(0xffffffff, reg + mxc_slot_offset(slot, slot_irq_en)); +} + +void mxc_jpeg_sw_reset(void __iomem *reg) +{ + /* + * engine soft reset, internal state machine reset + * this will not reset registers, however, it seems + * the registers may remain inconsistent with the internal state + * so, on purpose, at least let glb_ctrl bits clear after this reset + */ + writel(glb_ctrl_sft_rst, reg + glb_ctrl); +} + +void mxc_jpeg_enc_mode_conf(struct device *dev, void __iomem *reg) +{ + dev_dbg(dev, "cast encoder config... "); + /* + * "config_mode" enabled, "config_mode auto clear enabled", + */ + writel(0xa0, reg + cast_mode); + + /* all markers and segments */ + writel(0x3ff, reg + cast_cfg_mode); + + /* quality factor */ + writel(0x4b, reg + cast_quality); +} + +void mxc_jpeg_enc_mode_go(struct device *dev, void __iomem *reg) +{ + dev_dbg(dev, "cast encoder go... "); + /* + * "go" enabled, "go bit auto clear" enabled + */ + writel(0x140, reg + cast_mode); +} + +void mxc_jpeg_dec_mode_go(struct device *dev, void __iomem *reg) +{ + dev_dbg(dev, "cast decoder go... "); + writel(mxc_dec_exit_idle_mode, reg + cast_ctrl); +} + +int mxc_jpeg_enable(void __iomem *reg) +{ + u32 regval; + + writel(glb_ctrl_jpg_en, reg + glb_ctrl); + regval = readl(reg); + return regval; +} + +void mxc_jpeg_enable_slot(void __iomem *reg, int slot) +{ + u32 regval; + + regval = readl(reg + glb_ctrl); + writel(glb_ctrl_slot_en(slot) | regval, reg + glb_ctrl); +} + +void mxc_jpeg_set_l_endian(void __iomem *reg, int le) +{ + u32 regval; + + regval = readl(reg + glb_ctrl); + regval &= ~glb_ctrl_l_endian(1); /* clear */ + writel(glb_ctrl_l_endian(le) | regval, reg + glb_ctrl); /* set */ +} + +void mxc_jpeg_set_bufsize(struct mxc_jpeg_desc *desc, u32 bufsize) +{ + desc->stm_bufsize = bufsize; +} + +void mxc_jpeg_set_res(struct mxc_jpeg_desc *desc, u16 w, u16 h) +{ + desc->imgsize = w << 16 | h; +} + +void mxc_jpeg_set_line_pitch(struct mxc_jpeg_desc *desc, u32 line_pitch) +{ + desc->line_pitch = line_pitch; +} + +void mxc_jpeg_set_desc(u32 desc, void __iomem *reg, int slot) +{ + writel(desc | mxc_nxt_descpt_en, + reg + mxc_slot_offset(slot, slot_nxt_descpt_ptr)); +} diff --git a/drivers/media/platform/imx-jpeg/mxc-jpeg-hw.h b/drivers/media/platform/imx-jpeg/mxc-jpeg-hw.h --- /dev/null +++ b/drivers/media/platform/imx-jpeg/mxc-jpeg-hw.h +/* spdx-license-identifier: gpl-2.0 */ +/* + * i.mx8qxp/i.mx8qm jpeg encoder/decoder v4l2 driver + * + * copyright 2018-2019 nxp + */ + +#ifndef _mxc_jpeg_hw_h +#define _mxc_jpeg_hw_h + +/* jpeg decoder/encoder wrapper register map */ +#define glb_ctrl 0x0 +#define com_status 0x4 +#define buf_base0 0x14 +#define buf_base1 0x18 +#define line_pitch 0x1c +#define stm_bufbase 0x20 +#define stm_bufsize 0x24 +#define imgsize 0x28 +#define stm_ctrl 0x2c + +/* cast jpeg-decoder/encoder status register map (read-only)*/ +#define cast_status0 0x100 +#define cast_status1 0x104 +#define cast_status2 0x108 +#define cast_status3 0x10c +#define cast_status4 0x110 +#define cast_status5 0x114 +#define cast_status6 0x118 +#define cast_status7 0x11c +#define cast_status8 0x120 +#define cast_status9 0x124 +#define cast_status10 0x128 +#define cast_status11 0x12c +#define cast_status12 0x130 +#define cast_status13 0x134 +/* the following are for encoder only */ +#define cast_status14 0x138 +#define cast_status15 0x13c +#define cast_status16 0x140 +#define cast_status17 0x144 +#define cast_status18 0x148 +#define cast_status19 0x14c + +/* cast jpeg-decoder control register map (write-only) */ +#define cast_ctrl cast_status13 + +/* cast jpeg-encoder control register map (write-only) */ +#define cast_mode cast_status0 +#define cast_cfg_mode cast_status1 +#define cast_quality cast_status2 +#define cast_rsvd cast_status3 +#define cast_rec_regs_sel cast_status4 +#define cast_lumth cast_status5 +#define cast_chrth cast_status6 +#define cast_nomfrsize_lo cast_status7 +#define cast_nomfrsize_hi cast_status8 +#define cast_ofbsize_lo cast_status9 +#define cast_ofbsize_hi cast_status10 + +#define mxc_max_slots 1 /* todo use all 4 slots*/ +/* jpeg-decoder wrapper slot registers 0..3 */ +#define slot_base 0x10000 +#define slot_status 0x0 +#define slot_irq_en 0x4 +#define slot_buf_ptr 0x8 +#define slot_cur_descpt_ptr 0xc +#define slot_nxt_descpt_ptr 0x10 +#define mxc_slot_offset(slot, offset) ((slot_base * ((slot) + 1)) + (offset)) + +/* glb_ctrl fields */ +#define glb_ctrl_jpg_en 0x1 +#define glb_ctrl_sft_rst (0x1 << 1) +#define glb_ctrl_dec_go (0x1 << 2) +#define glb_ctrl_l_endian(le) ((le) << 3) +#define glb_ctrl_slot_en(slot) (0x1 << ((slot) + 4)) + +/* com_staus fields */ +#define com_status_dec_ongoing(r) (((r) & (1 << 31)) >> 31) +#define com_status_cur_slot(r) (((r) & (0x3 << 29)) >> 29) + +/* stm_ctrl fields */ +#define stm_ctrl_pixel_precision (0x1 << 2) +#define stm_ctrl_image_format(img_fmt) ((img_fmt) << 3) +#define stm_ctrl_image_format_mask (0xf << 3) +#define stm_ctrl_bitbuf_ptr_clr(clr) ((clr) << 7) +#define stm_ctrl_auto_start(go) ((go) << 8) +#define stm_ctrl_config_mod(mod) ((mod) << 9) + +/* slot_status fields for slots 0..3 */ +#define slot_status_frmdone (0x1 << 3) +#define slot_status_enc_config_err (0x1 << 8) + +/* slot_irq_en fields tbd */ + +#define mxc_nxt_descpt_en 0x1 +#define mxc_dec_exit_idle_mode 0x4 + +/* jpeg-decoder wrapper - stm_ctrl register fields */ +#define mxc_pixel_precision(precision) ((precision) / 8 << 2) +enum mxc_jpeg_image_format { + mxc_jpeg_invalid = -1, + mxc_jpeg_yuv420 = 0x0, /* 2 plannar, y=1st plane uv=2nd plane */ + mxc_jpeg_yuv422 = 0x1, /* 1 plannar, yuyv sequence */ + mxc_jpeg_rgb = 0x2, /* rgbrgb packed format */ + mxc_jpeg_yuv444 = 0x3, /* 1 plannar, yuvyuv sequence */ + mxc_jpeg_gray = 0x4, /* y8 or y12 or single component */ + mxc_jpeg_reserved = 0x5, + mxc_jpeg_argb = 0x6, +}; + +#include "mxc-jpeg.h" +void print_descriptor_info(struct device *dev, struct mxc_jpeg_desc *desc); +void print_cast_status(struct device *dev, void __iomem *reg, + unsigned int mode); +void print_wrapper_info(struct device *dev, void __iomem *reg); +void mxc_jpeg_sw_reset(void __iomem *reg); +int mxc_jpeg_enable(void __iomem *reg); +void wait_frmdone(struct device *dev, void __iomem *reg); +void mxc_jpeg_enc_mode_conf(struct device *dev, void __iomem *reg); +void mxc_jpeg_enc_mode_go(struct device *dev, void __iomem *reg); +void mxc_jpeg_dec_mode_go(struct device *dev, void __iomem *reg); +int mxc_jpeg_get_slot(void __iomem *reg); +u32 mxc_jpeg_get_offset(void __iomem *reg, int slot); +void mxc_jpeg_enable_slot(void __iomem *reg, int slot); +void mxc_jpeg_set_l_endian(void __iomem *reg, int le); +void mxc_jpeg_enable_irq(void __iomem *reg, int slot); +int mxc_jpeg_set_input(void __iomem *reg, u32 in_buf, u32 bufsize); +int mxc_jpeg_set_output(void __iomem *reg, u16 out_pitch, u32 out_buf, + u16 w, u16 h); +void mxc_jpeg_set_config_mode(void __iomem *reg, int config_mode); +int mxc_jpeg_set_params(struct mxc_jpeg_desc *desc, u32 bufsize, u16 + out_pitch, u32 format); +void mxc_jpeg_set_bufsize(struct mxc_jpeg_desc *desc, u32 bufsize); +void mxc_jpeg_set_res(struct mxc_jpeg_desc *desc, u16 w, u16 h); +void mxc_jpeg_set_line_pitch(struct mxc_jpeg_desc *desc, u32 line_pitch); +void mxc_jpeg_set_desc(u32 desc, void __iomem *reg, int slot); +void mxc_jpeg_set_regs_from_desc(struct mxc_jpeg_desc *desc, + void __iomem *reg); +#endif diff --git a/drivers/media/platform/imx-jpeg/mxc-jpeg.c b/drivers/media/platform/imx-jpeg/mxc-jpeg.c --- /dev/null +++ b/drivers/media/platform/imx-jpeg/mxc-jpeg.c +// spdx-license-identifier: gpl-2.0 +/* + * v4l2 driver for the jpeg encoder/decoder from i.mx8qxp/i.mx8qm application + * processors. + * + * the multi-planar buffers api is used. + * + * baseline and extended sequential jpeg decoding is supported. + * progressive jpeg decoding is not supported by the ip. + * supports encode and decode of various formats: + * yuv444, yuv422, yuv420, rgb, argb, gray + * yuv420 is the only multi-planar format supported. + * minimum resolution is 64 x 64, maximum 8192 x 8192. + * to achieve 8192 x 8192, modify in defconfig: config_cma_size_mbytes=320 + * the alignment requirements for the resolution depend on the format, + * multiple of 16 resolutions should work for all formats. + * special workarounds are made in the driver to support nv12 1080p. + * when decoding, the driver detects image resolution and pixel format + * from the jpeg stream, by parsing the jpeg markers. + * + * the ip has 4 slots available for context switching, but only slot 0 + * was fully tested to work. context switching is not used by the driver. + * each driver instance (context) allocates a slot for itself, but this + * is postponed until device_run, to allow unlimited opens. + * + * the driver submits jobs to the ip by setting up a descriptor for the + * used slot, and then validating it. the encoder has an additional descriptor + * for the configuration phase. the driver expects frm_done interrupt from + * ip to mark the job as finished. + * + * the decoder ip has some limitations regarding the component id's, + * but the driver works around this by replacing them in the jpeg stream. + * + * a module parameter is available for debug purpose (jpeg_tracing), to enable + * it, enable dynamic debug for this module and: + * echo 1 > /sys/module/mxc_jpeg_encdec/parameters/jpeg_tracing + * + * this is inspired by the drivers/media/platform/s5p-jpeg driver + * + * copyright 2018-2019 nxp + */ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/io.h> +#include <linux/clk.h> +#include <linux/of_platform.h> +#include <linux/platform_device.h> +#include <linux/slab.h> +#include <linux/irqreturn.h> +#include <linux/interrupt.h> +#include <linux/pm_domain.h> +#include <linux/string.h> + +#include <media/v4l2-jpeg.h> +#include <media/v4l2-mem2mem.h> +#include <media/v4l2-ioctl.h> +#include <media/v4l2-common.h> +#include <media/v4l2-event.h> +#include <media/videobuf2-dma-contig.h> + +#include "mxc-jpeg-hw.h" +#include "mxc-jpeg.h" + +static struct mxc_jpeg_fmt mxc_formats[] = { + { + .name = "jpeg", + .fourcc = v4l2_pix_fmt_jpeg, + .subsampling = -1, + .nc = -1, + .colplanes = 1, + .flags = mxc_jpeg_fmt_type_enc, + }, + { + .name = "rgb", /*rgbrgb packed format*/ + .fourcc = v4l2_pix_fmt_rgb24, + .subsampling = v4l2_jpeg_chroma_subsampling_444, + .nc = 3, + .depth = 24, + .colplanes = 1, + .h_align = 3, + .v_align = 3, + .flags = mxc_jpeg_fmt_type_raw, + }, + { + .name = "argb", /* argbargb packed format */ + .fourcc = v4l2_pix_fmt_argb32, + .subsampling = v4l2_jpeg_chroma_subsampling_444, + .nc = 4, + .depth = 32, + .colplanes = 1, + .h_align = 3, + .v_align = 3, + .flags = mxc_jpeg_fmt_type_raw, + }, + { + .name = "yuv420", /* 1st plane = y, 2nd plane = uv */ + .fourcc = v4l2_pix_fmt_nv12, + .subsampling = v4l2_jpeg_chroma_subsampling_420, + .nc = 3, + .depth = 12, /* 6 bytes (4y + uv) for 4 pixels */ + .colplanes = 2, /* 1 plane y, 1 plane uv interleaved */ + .h_align = 4, + .v_align = 4, + .flags = mxc_jpeg_fmt_type_raw, + }, + { + .name = "yuv422", /* yuyv */ + .fourcc = v4l2_pix_fmt_yuyv, + .subsampling = v4l2_jpeg_chroma_subsampling_422, + .nc = 3, + .depth = 16, + .colplanes = 1, + .h_align = 4, + .v_align = 3, + .flags = mxc_jpeg_fmt_type_raw, + }, + { + .name = "yuv444", /* yuvyuv */ + .fourcc = v4l2_pix_fmt_yuv24, + .subsampling = v4l2_jpeg_chroma_subsampling_444, + .nc = 3, + .depth = 24, + .colplanes = 1, + .h_align = 3, + .v_align = 3, + .flags = mxc_jpeg_fmt_type_raw, + }, + { + .name = "gray", /* gray (y8/y12) or single comp */ + .fourcc = v4l2_pix_fmt_grey, + .subsampling = v4l2_jpeg_chroma_subsampling_gray, + .nc = 1, + .depth = 8, + .colplanes = 1, + .h_align = 3, + .v_align = 3, + .flags = mxc_jpeg_fmt_type_raw, + }, +}; + +#define mxc_jpeg_num_formats array_size(mxc_formats) + +static const int mxc_decode_mode = mxc_jpeg_decode; +static const int mxc_encode_mode = mxc_jpeg_encode; + +static const struct of_device_id mxc_jpeg_match[] = { + { + .compatible = "nxp,imx8qxp-jpgdec", + .data = &mxc_decode_mode, + }, + { + .compatible = "nxp,imx8qxp-jpgenc", + .data = &mxc_encode_mode, + }, + { }, +}; + +/* + * default configuration stream, 64x64 yuv422 + * split by jpeg marker, so it's easier to modify & use + */ +static const unsigned char jpeg_soi[] = { + 0xff, 0xd8 +}; + +static const unsigned char jpeg_app0[] = { + 0xff, 0xe0, + 0x00, 0x10, 0x4a, 0x46, 0x49, 0x46, 0x00, + 0x01, 0x01, 0x00, 0x00, 0x01, 0x00, 0x01, + 0x00, 0x00 +}; + +static const unsigned char jpeg_app14[] = { + 0xff, 0xee, + 0x00, 0x0e, 0x41, 0x64, 0x6f, 0x62, 0x65, + 0x00, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00 +}; + +static const unsigned char jpeg_dqt[] = { + 0xff, 0xdb, + 0x00, 0x84, 0x00, 0x10, 0x0b, 0x0c, 0x0e, + 0x0c, 0x0a, 0x10, 0x0e, 0x0d, 0x0e, 0x12, + 0x11, 0x10, 0x13, 0x18, 0x28, 0x1a, 0x18, + 0x16, 0x16, 0x18, 0x31, 0x23, 0x25, 0x1d, + 0x28, 0x3a, 0x33, 0x3d, 0x3c, 0x39, 0x33, + 0x38, 0x37, 0x40, 0x48, 0x5c, 0x4e, 0x40, + 0x44, 0x57, 0x45, 0x37, 0x38, 0x50, 0x6d, + 0x51, 0x57, 0x5f, 0x62, 0x67, 0x68, 0x67, + 0x3e, 0x4d, 0x71, 0x79, 0x70, 0x64, 0x78, + 0x5c, 0x65, 0x67, 0x63, 0x01, 0x11, 0x12, + 0x12, 0x18, 0x15, 0x18, 0x2f, 0x1a, 0x1a, + 0x2f, 0x63, 0x42, 0x38, 0x42, 0x63, 0x63, + 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, + 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, + 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, + 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, + 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, + 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, + 0x63, 0x63, 0x63, 0x63, 0x63, 0x63 +}; + +static const unsigned char jpeg_sof_maximal[] = { + 0xff, 0xc0, + 0x00, 0x14, 0x08, 0x00, 0x40, 0x00, 0x40, + 0x04, 0x01, 0x11, 0x00, 0x02, 0x11, 0x01, + 0x03, 0x11, 0x01, 0x04, 0x11, 0x01 +}; + +static const unsigned char jpeg_dht[] = { + 0xff, 0xc4, + 0x01, 0xa2, 0x00, 0x00, 0x01, 0x05, 0x01, + 0x01, 0x01, 0x01, 0x01, 0x01, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, + 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, + 0x09, 0x0a, 0x0b, 0x10, 0x00, 0x02, 0x01, + 0x03, 0x03, 0x02, 0x04, 0x03, 0x05, 0x05, + 0x04, 0x04, 0x00, 0x00, 0x01, 0x7d, 0x01, + 0x02, 0x03, 0x00, 0x04, 0x11, 0x05, 0x12, + 0x21, 0x31, 0x41, 0x06, 0x13, 0x51, 0x61, + 0x07, 0x22, 0x71, 0x14, 0x32, 0x81, 0x91, + 0xa1, 0x08, 0x23, 0x42, 0xb1, 0xc1, 0x15, + 0x52, 0xd1, 0xf0, 0x24, 0x33, 0x62, 0x72, + 0x82, 0x09, 0x0a, 0x16, 0x17, 0x18, 0x19, + 0x1a, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2a, + 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3a, + 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, + 0x4a, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, + 0x59, 0x5a, 0x63, 0x64, 0x65, 0x66, 0x67, + 0x68, 0x69, 0x6a, 0x73, 0x74, 0x75, 0x76, + 0x77, 0x78, 0x79, 0x7a, 0x83, 0x84, 0x85, + 0x86, 0x87, 0x88, 0x89, 0x8a, 0x92, 0x93, + 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9a, + 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 0xa8, + 0xa9, 0xaa, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, + 0xb7, 0xb8, 0xb9, 0xba, 0xc2, 0xc3, 0xc4, + 0xc5, 0xc6, 0xc7, 0xc8, 0xc9, 0xca, 0xd2, + 0xd3, 0xd4, 0xd5, 0xd6, 0xd7, 0xd8, 0xd9, + 0xda, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, + 0xe7, 0xe8, 0xe9, 0xea, 0xf1, 0xf2, 0xf3, + 0xf4, 0xf5, 0xf6, 0xf7, 0xf8, 0xf9, 0xfa, + 0x01, 0x00, 0x03, 0x01, 0x01, 0x01, 0x01, + 0x01, 0x01, 0x01, 0x01, 0x01, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x01, 0x02, 0x03, + 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, + 0x0b, 0x11, 0x00, 0x02, 0x01, 0x02, 0x04, + 0x04, 0x03, 0x04, 0x07, 0x05, 0x04, 0x04, + 0x00, 0x01, 0x02, 0x77, 0x00, 0x01, 0x02, + 0x03, 0x11, 0x04, 0x05, 0x21, 0x31, 0x06, + 0x12, 0x41, 0x51, 0x07, 0x61, 0x71, 0x13, + 0x22, 0x32, 0x81, 0x08, 0x14, 0x42, 0x91, + 0xa1, 0xb1, 0xc1, 0x09, 0x23, 0x33, 0x52, + 0xf0, 0x15, 0x62, 0x72, 0xd1, 0x0a, 0x16, + 0x24, 0x34, 0xe1, 0x25, 0xf1, 0x17, 0x18, + 0x19, 0x1a, 0x26, 0x27, 0x28, 0x29, 0x2a, + 0x35, 0x36, 0x37, 0x38, 0x39, 0x3a, 0x43, + 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4a, + 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, + 0x5a, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, + 0x69, 0x6a, 0x73, 0x74, 0x75, 0x76, 0x77, + 0x78, 0x79, 0x7a, 0x82, 0x83, 0x84, 0x85, + 0x86, 0x87, 0x88, 0x89, 0x8a, 0x92, 0x93, + 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9a, + 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 0xa8, + 0xa9, 0xaa, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, + 0xb7, 0xb8, 0xb9, 0xba, 0xc2, 0xc3, 0xc4, + 0xc5, 0xc6, 0xc7, 0xc8, 0xc9, 0xca, 0xd2, + 0xd3, 0xd4, 0xd5, 0xd6, 0xd7, 0xd8, 0xd9, + 0xda, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, + 0xe8, 0xe9, 0xea, 0xf2, 0xf3, 0xf4, 0xf5, + 0xf6, 0xf7, 0xf8, 0xf9, 0xfa +}; + +static const unsigned char jpeg_dri[] = { + 0xff, 0xdd, + 0x00, 0x04, 0x00, 0x20 +}; + +static const unsigned char jpeg_sos_maximal[] = { + 0xff, 0xda, + 0x00, 0x0c, 0x04, 0x01, 0x00, 0x02, 0x11, 0x03, + 0x11, 0x04, 0x11, 0x00, 0x3f, 0x00 +}; + +static const unsigned char jpeg_eoi[] = { + 0xff, 0xd9 +}; + +struct mxc_jpeg_src_buf { + /* common v4l buffer stuff -- must be first */ + struct vb2_v4l2_buffer b; + struct list_head list; + + /* mxc-jpeg specific */ + bool dht_needed; + bool jpeg_parse_error; +}; + +static inline struct mxc_jpeg_src_buf *vb2_to_mxc_buf(struct vb2_buffer *vb) +{ + return container_of(to_vb2_v4l2_buffer(vb), + struct mxc_jpeg_src_buf, b); +} + +static unsigned int debug; +module_param(debug, int, 0644); +module_parm_desc(debug, "debug level (0-3)"); + +static void _bswap16(u16 *a) +{ + *a = ((*a & 0x00ff) << 8) | ((*a & 0xff00) >> 8); +} + +static void print_mxc_buf(struct mxc_jpeg_dev *jpeg, struct vb2_buffer *buf, + unsigned long len) +{ + unsigned int plane_no; + u32 dma_addr; + void *vaddr; + unsigned long payload; + + if (debug < 3) + return; + + for (plane_no = 0; plane_no < buf->num_planes; plane_no++) { + payload = vb2_get_plane_payload(buf, plane_no); + if (len == 0) + len = payload; + dma_addr = vb2_dma_contig_plane_dma_addr(buf, plane_no); + vaddr = vb2_plane_vaddr(buf, plane_no); + v4l2_dbg(3, debug, &jpeg->v4l2_dev, + "plane %d (vaddr=%p dma_addr=%x payload=%ld):", + plane_no, vaddr, dma_addr, payload); + print_hex_dump(kern_debug, "", dump_prefix_offset, 32, 1, + vaddr, len, false); + } +} + +static inline struct mxc_jpeg_ctx *mxc_jpeg_fh_to_ctx(struct v4l2_fh *fh) +{ + return container_of(fh, struct mxc_jpeg_ctx, fh); +} + +static int enum_fmt(struct mxc_jpeg_fmt *mxc_formats, int n, + struct v4l2_fmtdesc *f, u32 type) +{ + int i, num = 0; + + for (i = 0; i < n; ++i) { + if (mxc_formats[i].flags == type) { + /* index-th format of searched type found ? */ + if (num == f->index) + break; + /* correct type but haven't reached our index yet, + * just increment per-type index + */ + ++num; + } + } + + /* format not found */ + if (i >= n) + return -einval; + + strscpy(f->description, mxc_formats[i].name, sizeof(f->description)); + f->pixelformat = mxc_formats[i].fourcc; + + return 0; +} + +static struct mxc_jpeg_fmt *mxc_jpeg_find_format(struct mxc_jpeg_ctx *ctx, + u32 pixelformat) +{ + unsigned int k; + + for (k = 0; k < mxc_jpeg_num_formats; k++) { + struct mxc_jpeg_fmt *fmt = &mxc_formats[k]; + + if (fmt->fourcc == pixelformat) + return fmt; + } + return null; +} + +static enum mxc_jpeg_image_format mxc_jpeg_fourcc_to_imgfmt(u32 fourcc) +{ + switch (fourcc) { + case v4l2_pix_fmt_grey: + return mxc_jpeg_gray; + case v4l2_pix_fmt_yuyv: + return mxc_jpeg_yuv422; + case v4l2_pix_fmt_nv12: + return mxc_jpeg_yuv420; + case v4l2_pix_fmt_yuv24: + return mxc_jpeg_yuv444; + case v4l2_pix_fmt_rgb24: + return mxc_jpeg_rgb; + case v4l2_pix_fmt_argb32: + return mxc_jpeg_argb; + default: + return mxc_jpeg_invalid; + } +} + +static struct mxc_jpeg_q_data *mxc_jpeg_get_q_data(struct mxc_jpeg_ctx *ctx, + enum v4l2_buf_type type) +{ + if (v4l2_type_is_output(type)) + return &ctx->out_q; + return &ctx->cap_q; +} + +static void mxc_jpeg_addrs(struct mxc_jpeg_desc *desc, + struct vb2_buffer *raw_buf, + struct vb2_buffer *jpeg_buf, int offset) +{ + int img_fmt = desc->stm_ctrl & stm_ctrl_image_format_mask; + + desc->buf_base0 = vb2_dma_contig_plane_dma_addr(raw_buf, 0); + desc->buf_base1 = 0; + if (img_fmt == stm_ctrl_image_format(mxc_jpeg_yuv420)) { + warn_on(raw_buf->num_planes < 2); + desc->buf_base1 = vb2_dma_contig_plane_dma_addr(raw_buf, 1); + } + desc->stm_bufbase = vb2_dma_contig_plane_dma_addr(jpeg_buf, 0) + + offset; +} + +static void notify_eos(struct mxc_jpeg_ctx *ctx) +{ + const struct v4l2_event ev = { + .type = v4l2_event_eos + }; + + dev_dbg(ctx->mxc_jpeg->dev, "notify app event eos reached"); + v4l2_event_queue_fh(&ctx->fh, &ev); +} + +static void notify_src_chg(struct mxc_jpeg_ctx *ctx) +{ + const struct v4l2_event ev = { + .type = v4l2_event_source_change, + .u.src_change.changes = + v4l2_event_src_ch_resolution, + }; + + dev_dbg(ctx->mxc_jpeg->dev, "notify app event src_ch_resolution"); + v4l2_event_queue_fh(&ctx->fh, &ev); +} + +static int mxc_get_free_slot(struct mxc_jpeg_slot_data slot_data[], int n) +{ + int free_slot = 0; + + while (slot_data[free_slot].used && free_slot < n) + free_slot++; + + return free_slot; /* >=n when there are no more free slots */ +} + +static bool mxc_jpeg_alloc_slot_data(struct mxc_jpeg_dev *jpeg, + unsigned int slot) +{ + struct mxc_jpeg_desc *desc; + struct mxc_jpeg_desc *cfg_desc; + void *cfg_stm; + + if (jpeg->slot_data[slot].desc) + goto skip_alloc; /* already allocated, reuse it */ + + /* allocate descriptor for decoding/encoding phase */ + desc = dma_alloc_coherent(jpeg->dev, + sizeof(struct mxc_jpeg_desc), + &jpeg->slot_data[slot].desc_handle, + gfp_atomic); + if (!desc) + goto err; + jpeg->slot_data[slot].desc = desc; + + /* allocate descriptor for configuration phase (encoder only) */ + cfg_desc = dma_alloc_coherent(jpeg->dev, + sizeof(struct mxc_jpeg_desc), + &jpeg->slot_data[slot].cfg_desc_handle, + gfp_atomic); + if (!cfg_desc) + goto err; + jpeg->slot_data[slot].cfg_desc = cfg_desc; + + /* allocate configuration stream */ + cfg_stm = dma_alloc_coherent(jpeg->dev, + mxc_jpeg_max_cfg_stream, + &jpeg->slot_data[slot].cfg_stream_handle, + gfp_atomic); + if (!cfg_stm) + goto err; + jpeg->slot_data[slot].cfg_stream_vaddr = cfg_stm; + +skip_alloc: + jpeg->slot_data[slot].used = true; + + return true; +err: + dev_err(jpeg->dev, "could not allocate descriptors for slot %d", slot); + + return false; +} + +static void mxc_jpeg_free_slot_data(struct mxc_jpeg_dev *jpeg, + unsigned int slot) +{ + if (slot >= mxc_max_slots) { + dev_err(jpeg->dev, "invalid slot %d, nothing to free.", slot); + return; + } + + /* free descriptor for decoding/encoding phase */ + dma_free_coherent(jpeg->dev, sizeof(struct mxc_jpeg_desc), + jpeg->slot_data[slot].desc, + jpeg->slot_data[slot].desc_handle); + + /* free descriptor for encoder configuration phase / decoder dht */ + dma_free_coherent(jpeg->dev, sizeof(struct mxc_jpeg_desc), + jpeg->slot_data[slot].cfg_desc, + jpeg->slot_data[slot].cfg_desc_handle); + + /* free configuration stream */ + dma_free_coherent(jpeg->dev, mxc_jpeg_max_cfg_stream, + jpeg->slot_data[slot].cfg_stream_vaddr, + jpeg->slot_data[slot].cfg_stream_handle); + + jpeg->slot_data[slot].used = false; +} + +static irqreturn_t mxc_jpeg_dec_irq(int irq, void *priv) +{ + struct mxc_jpeg_dev *jpeg = priv; + struct mxc_jpeg_ctx *ctx; + void __iomem *reg = jpeg->base_reg; + struct device *dev = jpeg->dev; + struct vb2_v4l2_buffer *src_buf, *dst_buf; + struct mxc_jpeg_src_buf *jpeg_src_buf; + enum vb2_buffer_state buf_state; + u32 dec_ret, com_status; + unsigned long payload; + struct mxc_jpeg_q_data *q_data; + enum v4l2_buf_type cap_type = v4l2_buf_type_video_capture_mplane; + unsigned int slot; + + spin_lock(&jpeg->hw_lock); + + com_status = readl(reg + com_status); + slot = com_status_cur_slot(com_status); + dev_dbg(dev, "irq %d on slot %d. ", irq, slot); + + ctx = v4l2_m2m_get_curr_priv(jpeg->m2m_dev); + if (!ctx) { + dev_err(dev, + "instance released before the end of transaction. "); + /* soft reset only resets internal state, not registers */ + mxc_jpeg_sw_reset(reg); + /* clear all interrupts */ + writel(0xffffffff, reg + mxc_slot_offset(slot, slot_status)); + goto job_unlock; + } + + if (slot != ctx->slot) { + /* todo investigate when adding multi-instance support */ + dev_warn(dev, "irq slot %d != context slot %d. ", + slot, ctx->slot); + goto job_unlock; + } + + dec_ret = readl(reg + mxc_slot_offset(slot, slot_status)); + writel(dec_ret, reg + mxc_slot_offset(slot, slot_status)); /* w1c */ + + dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); + src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); + jpeg_src_buf = vb2_to_mxc_buf(&src_buf->vb2_buf); + + if (dec_ret & slot_status_enc_config_err) { + u32 ret = readl(reg + cast_status12); + + dev_err(dev, "encoder/decoder error, status=0x%08x", ret); + mxc_jpeg_sw_reset(reg); + buf_state = vb2_buf_state_error; + goto buffers_done; + } + + if (!(dec_ret & slot_status_frmdone)) + goto job_unlock; + + if (jpeg->mode == mxc_jpeg_encode && + ctx->enc_state == mxc_jpeg_enc_conf) { + ctx->enc_state = mxc_jpeg_encoding; + dev_dbg(dev, "encoder config finished. start encoding... "); + mxc_jpeg_enc_mode_go(dev, reg); + goto job_unlock; + } + if (jpeg->mode == mxc_jpeg_decode && jpeg_src_buf->dht_needed) { + jpeg_src_buf->dht_needed = false; + dev_dbg(dev, "decoder dht cfg finished. start decoding... "); + goto job_unlock; + } + if (jpeg->mode == mxc_jpeg_encode) { + payload = readl(reg + mxc_slot_offset(slot, slot_buf_ptr)); + vb2_set_plane_payload(&dst_buf->vb2_buf, 0, payload); + dev_dbg(dev, "encoding finished, payload size: %ld ", + payload); + } else { + q_data = mxc_jpeg_get_q_data(ctx, cap_type); + payload = q_data->sizeimage[0]; + vb2_set_plane_payload(&dst_buf->vb2_buf, 0, payload); + vb2_set_plane_payload(&dst_buf->vb2_buf, 1, 0); + if (q_data->fmt->colplanes == 2) { + payload = q_data->sizeimage[1]; + vb2_set_plane_payload(&dst_buf->vb2_buf, 1, payload); + } + dev_dbg(dev, "decoding finished, payload size: %ld + %ld ", + vb2_get_plane_payload(&dst_buf->vb2_buf, 0), + vb2_get_plane_payload(&dst_buf->vb2_buf, 1)); + } + + /* short preview of the results */ + dev_dbg(dev, "src_buf preview: "); + print_mxc_buf(jpeg, &src_buf->vb2_buf, 32); + dev_dbg(dev, "dst_buf preview: "); + print_mxc_buf(jpeg, &dst_buf->vb2_buf, 32); + buf_state = vb2_buf_state_done; + +buffers_done: + jpeg->slot_data[slot].used = false; /* unused, but don't free */ + v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); + v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); + v4l2_m2m_buf_done(src_buf, buf_state); + v4l2_m2m_buf_done(dst_buf, buf_state); + spin_unlock(&jpeg->hw_lock); + v4l2_m2m_job_finish(jpeg->m2m_dev, ctx->fh.m2m_ctx); + return irq_handled; +job_unlock: + spin_unlock(&jpeg->hw_lock); + return irq_handled; +} + +static int mxc_jpeg_fixup_sof(struct mxc_jpeg_sof *sof, + u32 fourcc, + u16 w, u16 h) +{ + int sof_length; + + sof->precision = 8; /* todo allow 8/12 bit precision*/ + sof->height = h; + _bswap16(&sof->height); + sof->width = w; + _bswap16(&sof->width); + + switch (fourcc) { + case v4l2_pix_fmt_nv12: + sof->components_no = 3; + sof->comp[0].v = 0x2; + sof->comp[0].h = 0x2; + break; + case v4l2_pix_fmt_yuyv: + sof->components_no = 3; + sof->comp[0].v = 0x1; + sof->comp[0].h = 0x2; + break; + case v4l2_pix_fmt_yuv24: + case v4l2_pix_fmt_rgb24: + default: + sof->components_no = 3; + break; + case v4l2_pix_fmt_argb32: + sof->components_no = 4; + break; + case v4l2_pix_fmt_grey: + sof->components_no = 1; + break; + } + sof_length = 8 + 3 * sof->components_no; + sof->length = sof_length; + _bswap16(&sof->length); + + return sof_length; /* not swaped */ +} + +static int mxc_jpeg_fixup_sos(struct mxc_jpeg_sos *sos, + u32 fourcc) +{ + int sos_length; + u8 *sof_u8 = (u8 *)sos; + + switch (fourcc) { + case v4l2_pix_fmt_nv12: + sos->components_no = 3; + break; + case v4l2_pix_fmt_yuyv: + sos->components_no = 3; + break; + case v4l2_pix_fmt_yuv24: + case v4l2_pix_fmt_rgb24: + default: + sos->components_no = 3; + break; + case v4l2_pix_fmt_argb32: + sos->components_no = 4; + break; + case v4l2_pix_fmt_grey: + sos->components_no = 1; + break; + } + sos_length = 6 + 2 * sos->components_no; + sos->length = sos_length; + _bswap16(&sos->length); + + /* sos ignorable bytes, not so ignorable after all */ + sof_u8[sos_length - 1] = 0x0; + sof_u8[sos_length - 2] = 0x3f; + sof_u8[sos_length - 3] = 0x0; + + return sos_length; /* not swaped */ +} + +static unsigned int mxc_jpeg_setup_cfg_stream(void *cfg_stream_vaddr, + u32 fourcc, + u16 w, u16 h) +{ + unsigned int offset = 0; + u8 *cfg = (u8 *)cfg_stream_vaddr; + struct mxc_jpeg_sof *sof; + struct mxc_jpeg_sos *sos; + + memcpy(cfg + offset, jpeg_soi, array_size(jpeg_soi)); + offset += array_size(jpeg_soi); + + if (fourcc == v4l2_pix_fmt_rgb24 || + fourcc == v4l2_pix_fmt_argb32) { + memcpy(cfg + offset, jpeg_app14, sizeof(jpeg_app14)); + offset += sizeof(jpeg_app14); + } else { + memcpy(cfg + offset, jpeg_app0, sizeof(jpeg_app0)); + offset += sizeof(jpeg_app0); + } + + memcpy(cfg + offset, jpeg_dqt, sizeof(jpeg_dqt)); + offset += sizeof(jpeg_dqt); + + memcpy(cfg + offset, jpeg_sof_maximal, sizeof(jpeg_sof_maximal)); + offset += 2; /* skip marker id */ + sof = (struct mxc_jpeg_sof *)(cfg + offset); + offset += mxc_jpeg_fixup_sof(sof, fourcc, w, h); + + memcpy(cfg + offset, jpeg_dht, sizeof(jpeg_dht)); + offset += sizeof(jpeg_dht); + + memcpy(cfg + offset, jpeg_dri, sizeof(jpeg_dri)); + offset += sizeof(jpeg_dri); + + memcpy(cfg + offset, jpeg_sos_maximal, sizeof(jpeg_sos_maximal)); + offset += 2; /* skip marker id */ + sos = (struct mxc_jpeg_sos *)(cfg + offset); + offset += mxc_jpeg_fixup_sos(sos, fourcc); + + memcpy(cfg + offset, jpeg_eoi, sizeof(jpeg_eoi)); + offset += sizeof(jpeg_eoi); + + return offset; +} + +static void mxc_jpeg_config_dec_desc(struct vb2_buffer *out_buf, + struct mxc_jpeg_ctx *ctx, + struct vb2_buffer *src_buf, + struct vb2_buffer *dst_buf) +{ + enum v4l2_buf_type cap_type = v4l2_buf_type_video_capture_mplane; + struct mxc_jpeg_q_data *q_data_cap; + enum mxc_jpeg_image_format img_fmt; + struct mxc_jpeg_dev *jpeg = ctx->mxc_jpeg; + void __iomem *reg = jpeg->base_reg; + unsigned int slot = ctx->slot; + struct mxc_jpeg_desc *desc = jpeg->slot_data[slot].desc; + struct mxc_jpeg_desc *cfg_desc = jpeg->slot_data[slot].cfg_desc; + dma_addr_t desc_handle = jpeg->slot_data[slot].desc_handle; + dma_addr_t cfg_desc_handle = jpeg->slot_data[slot].cfg_desc_handle; + dma_addr_t cfg_stream_handle = jpeg->slot_data[slot].cfg_stream_handle; + unsigned int *cfg_size = &jpeg->slot_data[slot].cfg_stream_size; + void *cfg_stream_vaddr = jpeg->slot_data[slot].cfg_stream_vaddr; + struct mxc_jpeg_src_buf *jpeg_src_buf; + + jpeg_src_buf = vb2_to_mxc_buf(src_buf); + + /* setup the decoding descriptor */ + desc->next_descpt_ptr = 0; /* end of chain */ + q_data_cap = mxc_jpeg_get_q_data(ctx, cap_type); + desc->imgsize = q_data_cap->w_adjusted << 16 | q_data_cap->h_adjusted; + img_fmt = mxc_jpeg_fourcc_to_imgfmt(q_data_cap->fmt->fourcc); + desc->stm_ctrl &= ~stm_ctrl_image_format(0xf); /* clear image format */ + desc->stm_ctrl |= stm_ctrl_image_format(img_fmt); + desc->line_pitch = q_data_cap->bytesperline[0]; + mxc_jpeg_addrs(desc, dst_buf, src_buf, 0); + mxc_jpeg_set_bufsize(desc, align(vb2_plane_size(src_buf, 0), 1024)); + print_descriptor_info(jpeg->dev, desc); + + if (!jpeg_src_buf->dht_needed) { + /* validate the decoding descriptor */ + mxc_jpeg_set_desc(desc_handle, reg, slot); + return; + } + + /* + * if a default huffman table is needed, use the config descriptor to + * inject a dht, by chaining it before the decoding descriptor + */ + *cfg_size = mxc_jpeg_setup_cfg_stream(cfg_stream_vaddr, + v4l2_pix_fmt_yuyv, + mxc_jpeg_min_width, + mxc_jpeg_min_height); + cfg_desc->next_descpt_ptr = desc_handle | mxc_nxt_descpt_en; + cfg_desc->buf_base0 = vb2_dma_contig_plane_dma_addr(dst_buf, 0); + cfg_desc->buf_base1 = 0; + cfg_desc->imgsize = mxc_jpeg_min_width << 16; + cfg_desc->imgsize |= mxc_jpeg_min_height; + cfg_desc->line_pitch = mxc_jpeg_min_width * 2; + cfg_desc->stm_ctrl = stm_ctrl_image_format(mxc_jpeg_yuv422); + cfg_desc->stm_bufbase = cfg_stream_handle; + cfg_desc->stm_bufsize = align(*cfg_size, 1024); + print_descriptor_info(jpeg->dev, cfg_desc); + + /* validate the configuration descriptor */ + mxc_jpeg_set_desc(cfg_desc_handle, reg, slot); +} + +static void mxc_jpeg_config_enc_desc(struct vb2_buffer *out_buf, + struct mxc_jpeg_ctx *ctx, + struct vb2_buffer *src_buf, + struct vb2_buffer *dst_buf) +{ + struct mxc_jpeg_dev *jpeg = ctx->mxc_jpeg; + void __iomem *reg = jpeg->base_reg; + unsigned int slot = ctx->slot; + struct mxc_jpeg_desc *desc = jpeg->slot_data[slot].desc; + struct mxc_jpeg_desc *cfg_desc = jpeg->slot_data[slot].cfg_desc; + dma_addr_t desc_handle = jpeg->slot_data[slot].desc_handle; + dma_addr_t cfg_desc_handle = jpeg->slot_data[slot].cfg_desc_handle; + void *cfg_stream_vaddr = jpeg->slot_data[slot].cfg_stream_vaddr; + struct mxc_jpeg_q_data *q_data; + enum mxc_jpeg_image_format img_fmt; + int w, h; + + q_data = mxc_jpeg_get_q_data(ctx, src_buf->vb2_queue->type); + + jpeg->slot_data[slot].cfg_stream_size = + mxc_jpeg_setup_cfg_stream(cfg_stream_vaddr, + q_data->fmt->fourcc, + q_data->w_adjusted, + q_data->h_adjusted); + + /* chain the config descriptor with the encoding descriptor */ + cfg_desc->next_descpt_ptr = desc_handle | mxc_nxt_descpt_en; + + cfg_desc->buf_base0 = jpeg->slot_data[slot].cfg_stream_handle; + cfg_desc->buf_base1 = 0; + cfg_desc->line_pitch = 0; + cfg_desc->stm_bufbase = 0; /* no output expected */ + cfg_desc->stm_bufsize = 0x0; + cfg_desc->imgsize = 0; + cfg_desc->stm_ctrl = stm_ctrl_config_mod(1); + + desc->next_descpt_ptr = 0; /* end of chain */ + + /* use adjusted resolution for cast ip job */ + w = q_data->w_adjusted; + h = q_data->h_adjusted; + mxc_jpeg_set_res(desc, w, h); + mxc_jpeg_set_line_pitch(desc, w * (q_data->fmt->depth / 8)); + mxc_jpeg_set_bufsize(desc, desc->line_pitch * h); + img_fmt = mxc_jpeg_fourcc_to_imgfmt(q_data->fmt->fourcc); + if (img_fmt == mxc_jpeg_invalid) + dev_err(jpeg->dev, "no valid image format detected "); + desc->stm_ctrl = stm_ctrl_config_mod(0) | + stm_ctrl_image_format(img_fmt); + mxc_jpeg_addrs(desc, src_buf, dst_buf, 0); + dev_dbg(jpeg->dev, "cfg_desc: "); + print_descriptor_info(jpeg->dev, cfg_desc); + dev_dbg(jpeg->dev, "enc desc: "); + print_descriptor_info(jpeg->dev, desc); + print_wrapper_info(jpeg->dev, reg); + print_cast_status(jpeg->dev, reg, mxc_jpeg_encode); + + /* validate the configuration descriptor */ + mxc_jpeg_set_desc(cfg_desc_handle, reg, slot); +} + +static void mxc_jpeg_device_run(void *priv) +{ + struct mxc_jpeg_ctx *ctx = priv; + struct mxc_jpeg_dev *jpeg = ctx->mxc_jpeg; + void __iomem *reg = jpeg->base_reg; + struct device *dev = jpeg->dev; + struct vb2_v4l2_buffer *src_buf, *dst_buf; + unsigned long flags; + struct mxc_jpeg_q_data *q_data_cap, *q_data_out; + struct mxc_jpeg_src_buf *jpeg_src_buf; + + spin_lock_irqsave(&ctx->mxc_jpeg->hw_lock, flags); + src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); + dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); + if (!src_buf || !dst_buf) { + dev_err(dev, "null src or dst buf "); + goto end; + } + + q_data_cap = mxc_jpeg_get_q_data(ctx, v4l2_buf_type_video_capture); + if (!q_data_cap) + goto end; + q_data_out = mxc_jpeg_get_q_data(ctx, v4l2_buf_type_video_output); + if (!q_data_out) + goto end; + src_buf->sequence = q_data_out->sequence++; + dst_buf->sequence = q_data_cap->sequence++; + + v4l2_m2m_buf_copy_metadata(src_buf, dst_buf, true); + + jpeg_src_buf = vb2_to_mxc_buf(&src_buf->vb2_buf); + if (jpeg_src_buf->jpeg_parse_error) { + jpeg->slot_data[ctx->slot].used = false; + v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); + v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); + v4l2_m2m_buf_done(src_buf, vb2_buf_state_error); + v4l2_m2m_buf_done(dst_buf, vb2_buf_state_error); + spin_unlock_irqrestore(&ctx->mxc_jpeg->hw_lock, flags); + v4l2_m2m_job_finish(jpeg->m2m_dev, ctx->fh.m2m_ctx); + + return; + } + + /* + * todo: this reset should be removed, once we figure out + * how to overcome hardware issues both on encoder and decoder + */ + mxc_jpeg_sw_reset(reg); + mxc_jpeg_enable(reg); + mxc_jpeg_set_l_endian(reg, 1); + + ctx->slot = mxc_get_free_slot(jpeg->slot_data, mxc_max_slots); + if (ctx->slot >= mxc_max_slots) { + dev_err(dev, "no more free slots "); + goto end; + } + if (!mxc_jpeg_alloc_slot_data(jpeg, ctx->slot)) { + dev_err(dev, "canot allocate slot data "); + goto end; + } + + mxc_jpeg_enable_slot(reg, ctx->slot); + mxc_jpeg_enable_irq(reg, ctx->slot); + + if (jpeg->mode == mxc_jpeg_encode) { + dev_dbg(dev, "encoding on slot %d ", ctx->slot); + ctx->enc_state = mxc_jpeg_enc_conf; + mxc_jpeg_config_enc_desc(&dst_buf->vb2_buf, ctx, + &src_buf->vb2_buf, &dst_buf->vb2_buf); + mxc_jpeg_enc_mode_conf(dev, reg); /* start config phase */ + } else { + dev_dbg(dev, "decoding on slot %d ", ctx->slot); + print_mxc_buf(jpeg, &src_buf->vb2_buf, 0); + mxc_jpeg_config_dec_desc(&dst_buf->vb2_buf, ctx, + &src_buf->vb2_buf, &dst_buf->vb2_buf); + mxc_jpeg_dec_mode_go(dev, reg); + } +end: + spin_unlock_irqrestore(&ctx->mxc_jpeg->hw_lock, flags); +} + +static int mxc_jpeg_decoder_cmd(struct file *file, void *priv, + struct v4l2_decoder_cmd *cmd) +{ + struct v4l2_fh *fh = file->private_data; + struct mxc_jpeg_ctx *ctx = mxc_jpeg_fh_to_ctx(fh); + struct device *dev = ctx->mxc_jpeg->dev; + int ret; + + ret = v4l2_m2m_ioctl_try_decoder_cmd(file, fh, cmd); + if (ret < 0) + return ret; + + if (cmd->cmd == v4l2_dec_cmd_stop) { + dev_dbg(dev, "received v4l2_dec_cmd_stop"); + if (v4l2_m2m_num_src_bufs_ready(fh->m2m_ctx) == 0) { + /* no more src bufs, notify app eos */ + notify_eos(ctx); + } else { + /* will send eos later*/ + ctx->stopping = 1; + } + } + + return 0; +} + +static int mxc_jpeg_encoder_cmd(struct file *file, void *priv, + struct v4l2_encoder_cmd *cmd) +{ + struct v4l2_fh *fh = file->private_data; + struct mxc_jpeg_ctx *ctx = mxc_jpeg_fh_to_ctx(fh); + struct device *dev = ctx->mxc_jpeg->dev; + int ret; + + ret = v4l2_m2m_ioctl_try_encoder_cmd(file, fh, cmd); + if (ret < 0) + return ret; + + if (cmd->cmd == v4l2_enc_cmd_stop) { + dev_dbg(dev, "received v4l2_enc_cmd_stop"); + if (v4l2_m2m_num_src_bufs_ready(fh->m2m_ctx) == 0) { + /* no more src bufs, notify app eos */ + notify_eos(ctx); + } else { + /* will send eos later*/ + ctx->stopping = 1; + } + } + + return 0; +} + +static int mxc_jpeg_queue_setup(struct vb2_queue *q, + unsigned int *nbuffers, + unsigned int *nplanes, + unsigned int sizes[], + struct device *alloc_ctxs[]) +{ + struct mxc_jpeg_ctx *ctx = vb2_get_drv_priv(q); + struct mxc_jpeg_q_data *q_data = null; + int i; + + q_data = mxc_jpeg_get_q_data(ctx, q->type); + if (!q_data) + return -einval; + + /* handle create_bufs situation - *nplanes != 0 */ + if (*nplanes) { + for (i = 0; i < *nplanes; i++) { + if (sizes[i] < q_data->sizeimage[i]) + return -einval; + } + return 0; + } + + /* handle reqbufs situation */ + *nplanes = q_data->fmt->colplanes; + for (i = 0; i < *nplanes; i++) + sizes[i] = q_data->sizeimage[i]; + + return 0; +} + +static int mxc_jpeg_start_streaming(struct vb2_queue *q, unsigned int count) +{ + struct mxc_jpeg_ctx *ctx = vb2_get_drv_priv(q); + struct mxc_jpeg_q_data *q_data = mxc_jpeg_get_q_data(ctx, q->type); + + dev_dbg(ctx->mxc_jpeg->dev, "start streaming ctx=%p", ctx); + q_data->sequence = 0; + + return 0; +} + +static void mxc_jpeg_stop_streaming(struct vb2_queue *q) +{ + struct mxc_jpeg_ctx *ctx = vb2_get_drv_priv(q); + struct vb2_v4l2_buffer *vbuf; + + dev_dbg(ctx->mxc_jpeg->dev, "stop streaming ctx=%p", ctx); + + /* release all active buffers */ + for (;;) { + if (v4l2_type_is_output(q->type)) + vbuf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); + else + vbuf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); + if (!vbuf) + return; + v4l2_m2m_buf_done(vbuf, vb2_buf_state_error); + } +} + +static int mxc_jpeg_valid_comp_id(struct device *dev, + struct mxc_jpeg_sof *sof, + struct mxc_jpeg_sos *sos) +{ + int valid = 1; + int i; + + /* + * there's a limitation in the ip that the component ids must be + * between 0..4, if they are not, let's patch them + */ + for (i = 0; i < sof->components_no; i++) + if (sof->comp[i].id > mxc_jpeg_max_components) { + valid = 0; + dev_err(dev, "component %d has invalid id: %d", + i, sof->comp[i].id); + } + if (!valid) + /* patch all comp ids if at least one is invalid */ + for (i = 0; i < sof->components_no; i++) { + dev_warn(dev, "component %d id patched to: %d", + i, i + 1); + sof->comp[i].id = i + 1; + sos->comp[i].id = i + 1; + } + + return valid; +} + +static u32 mxc_jpeg_get_image_format(struct device *dev, + const struct v4l2_jpeg_header header) +{ + int i; + u32 fourcc = 0; + + for (i = 0; i < mxc_jpeg_num_formats; i++) + if (mxc_formats[i].subsampling == header.frame.subsampling && + mxc_formats[i].nc == header.frame.num_components) { + fourcc = mxc_formats[i].fourcc; + break; + } + if (fourcc == 0) { + dev_err(dev, "could not identify image format nc=%d, subsampling=%d ", + header.frame.num_components, + header.frame.subsampling); + return fourcc; + } + /* + * if the transform flag from app14 marker is 0, images that are + * encoded with 3 components have rgb colorspace, see recommendation + * itu-t t.872 chapter 6.5.3 app14 marker segment for colour encoding + */ + if (fourcc == v4l2_pix_fmt_yuv24 || fourcc == v4l2_pix_fmt_rgb24) { + if (header.app14_tf == v4l2_jpeg_app14_tf_cmyk_rgb) + fourcc = v4l2_pix_fmt_rgb24; + else + fourcc = v4l2_pix_fmt_yuv24; + } + + return fourcc; +} + +static void mxc_jpeg_bytesperline(struct mxc_jpeg_q_data *q, + u32 precision) +{ + /* bytes distance between the leftmost pixels in two adjacent lines */ + if (q->fmt->fourcc == v4l2_pix_fmt_jpeg) { + /* bytesperline unused for compressed formats */ + q->bytesperline[0] = 0; + q->bytesperline[1] = 0; + } else if (q->fmt->fourcc == v4l2_pix_fmt_nv12) { + /* when the image format is planar the bytesperline value + * applies to the first plane and is divided by the same factor + * as the width field for the other planes + */ + q->bytesperline[0] = q->w * (precision / 8) * + (q->fmt->depth / 8); + q->bytesperline[1] = q->bytesperline[0]; + } else { + /* single plane formats */ + q->bytesperline[0] = q->w * (precision / 8) * + (q->fmt->depth / 8); + q->bytesperline[1] = 0; + } +} + +static void mxc_jpeg_sizeimage(struct mxc_jpeg_q_data *q) +{ + if (q->fmt->fourcc == v4l2_pix_fmt_jpeg) { + /* if no sizeimage from user, assume worst jpeg compression */ + if (!q->sizeimage[0]) + q->sizeimage[0] = 6 * q->w * q->h; + q->sizeimage[1] = 0; + + if (q->sizeimage[0] > mxc_jpeg_max_sizeimage) + q->sizeimage[0] = mxc_jpeg_max_sizeimage; + + /* jpeg stream size must be multiple of 1k */ + q->sizeimage[0] = align(q->sizeimage[0], 1024); + } else { + q->sizeimage[0] = q->bytesperline[0] * q->h; + q->sizeimage[1] = 0; + if (q->fmt->fourcc == v4l2_pix_fmt_nv12) + q->sizeimage[1] = q->sizeimage[0] / 2; + } +} + +static int mxc_jpeg_parse(struct mxc_jpeg_ctx *ctx, + u8 *src_addr, u32 size, bool *dht_needed) +{ + struct device *dev = ctx->mxc_jpeg->dev; + struct mxc_jpeg_q_data *q_data_out, *q_data_cap; + enum v4l2_buf_type cap_type = v4l2_buf_type_video_capture_mplane; + bool src_chg = false; + u32 fourcc; + struct v4l2_jpeg_header header; + struct mxc_jpeg_sof *psof = null; + struct mxc_jpeg_sos *psos = null; + int ret; + + memset(&header, 0, sizeof(header)); + ret = v4l2_jpeg_parse_header((void *)src_addr, size, &header); + if (ret < 0) { + dev_err(dev, "error parsing jpeg stream markers "); + return ret; + } + + /* if dht marker present, no need to inject default one */ + *dht_needed = (header.num_dht == 0); + + q_data_out = mxc_jpeg_get_q_data(ctx, + v4l2_buf_type_video_output_mplane); + if (q_data_out->w == 0 && q_data_out->h == 0) { + dev_warn(dev, "invalid user resolution 0x0"); + dev_warn(dev, "keeping resolution from jpeg: %dx%d", + header.frame.width, header.frame.height); + q_data_out->w = header.frame.width; + q_data_out->h = header.frame.height; + } else if (header.frame.width != q_data_out->w || + header.frame.height != q_data_out->h) { + dev_err(dev, + "resolution mismatch: %dx%d (jpeg) versus %dx%d(user)", + header.frame.width, header.frame.height, + q_data_out->w, q_data_out->h); + return -einval; + } + if (header.frame.width % 8 != 0 || header.frame.height % 8 != 0) { + dev_err(dev, "jpeg width or height not multiple of 8: %dx%d ", + header.frame.width, header.frame.height); + return -einval; + } + if (header.frame.width > mxc_jpeg_max_width || + header.frame.height > mxc_jpeg_max_height) { + dev_err(dev, "jpeg width or height should be <= 8192: %dx%d ", + header.frame.width, header.frame.height); + return -einval; + } + if (header.frame.width < mxc_jpeg_min_width || + header.frame.height < mxc_jpeg_min_height) { + dev_err(dev, "jpeg width or height should be > 64: %dx%d ", + header.frame.width, header.frame.height); + return -einval; + } + if (header.frame.num_components > v4l2_jpeg_max_components) { + dev_err(dev, "jpeg number of components should be <=%d", + v4l2_jpeg_max_components); + return -einval; + } + /* check and, if necessary, patch component ids*/ + psof = (struct mxc_jpeg_sof *)header.sof.start; + psos = (struct mxc_jpeg_sos *)header.sos.start; + if (!mxc_jpeg_valid_comp_id(dev, psof, psos)) + dev_warn(dev, "jpeg component ids should be 0-3 or 1-4"); + + fourcc = mxc_jpeg_get_image_format(dev, header); + if (fourcc == 0) + return -einval; + + /* + * set-up the capture queue with the pixelformat and resolution + * detected from the jpeg output stream + */ + q_data_cap = mxc_jpeg_get_q_data(ctx, cap_type); + if (q_data_cap->w != header.frame.width || + q_data_cap->h != header.frame.height) + src_chg = true; + q_data_cap->w = header.frame.width; + q_data_cap->h = header.frame.height; + q_data_cap->fmt = mxc_jpeg_find_format(ctx, fourcc); + q_data_cap->w_adjusted = q_data_cap->w; + q_data_cap->h_adjusted = q_data_cap->h; + /* + * align up the resolution for cast ip, + * but leave the buffer resolution unchanged + */ + v4l_bound_align_image(&q_data_cap->w_adjusted, + q_data_cap->w_adjusted, /* adjust up */ + mxc_jpeg_max_width, + q_data_cap->fmt->h_align, + &q_data_cap->h_adjusted, + q_data_cap->h_adjusted, /* adjust up */ + mxc_jpeg_max_height, + q_data_cap->fmt->v_align, + 0); + dev_dbg(dev, "detected jpeg res=(%dx%d)->(%dx%d), pixfmt=%c%c%c%c ", + q_data_cap->w, q_data_cap->h, + q_data_cap->w_adjusted, q_data_cap->h_adjusted, + (fourcc & 0xff), + (fourcc >> 8) & 0xff, + (fourcc >> 16) & 0xff, + (fourcc >> 24) & 0xff); + + /* setup bytesperline/sizeimage for capture queue */ + mxc_jpeg_bytesperline(q_data_cap, header.frame.precision); + mxc_jpeg_sizeimage(q_data_cap); + + /* + * if the capture format was updated with new values, regardless of + * whether they match the values set by the client or not, signal + * a source change event + */ + if (src_chg) + notify_src_chg(ctx); + + return 0; +} + +static void mxc_jpeg_buf_queue(struct vb2_buffer *vb) +{ + int ret; + struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); + struct mxc_jpeg_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); + struct mxc_jpeg_src_buf *jpeg_src_buf; + + if (vb->vb2_queue->type == v4l2_buf_type_video_capture_mplane) + goto end; + + /* for v4l2_buf_type_video_output_mplane */ + if (ctx->mxc_jpeg->mode != mxc_jpeg_decode) + goto end; + + jpeg_src_buf = vb2_to_mxc_buf(vb); + jpeg_src_buf->jpeg_parse_error = false; + ret = mxc_jpeg_parse(ctx, + (u8 *)vb2_plane_vaddr(vb, 0), + vb2_get_plane_payload(vb, 0), + &jpeg_src_buf->dht_needed); + if (ret) + jpeg_src_buf->jpeg_parse_error = true; + +end: + v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, vbuf); +} + +static int mxc_jpeg_buf_out_validate(struct vb2_buffer *vb) +{ + struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); + + vbuf->field = v4l2_field_none; + + return 0; +} + +static int mxc_jpeg_buf_prepare(struct vb2_buffer *vb) +{ + struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); + struct mxc_jpeg_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); + struct mxc_jpeg_q_data *q_data = null; + struct device *dev = ctx->mxc_jpeg->dev; + unsigned long sizeimage; + int i; + + vbuf->field = v4l2_field_none; + + q_data = mxc_jpeg_get_q_data(ctx, vb->vb2_queue->type); + if (!q_data) + return -einval; + for (i = 0; i < q_data->fmt->colplanes; i++) { + sizeimage = q_data->sizeimage[i]; + if (vb2_plane_size(vb, i) < sizeimage) { + dev_err(dev, "plane %d too small (%lu < %lu)", + i, vb2_plane_size(vb, i), sizeimage); + return -einval; + } + vb2_set_plane_payload(vb, i, sizeimage); + } + return 0; +} + +static const struct vb2_ops mxc_jpeg_qops = { + .queue_setup = mxc_jpeg_queue_setup, + .wait_prepare = vb2_ops_wait_prepare, + .wait_finish = vb2_ops_wait_finish, + .buf_out_validate = mxc_jpeg_buf_out_validate, + .buf_prepare = mxc_jpeg_buf_prepare, + .start_streaming = mxc_jpeg_start_streaming, + .stop_streaming = mxc_jpeg_stop_streaming, + .buf_queue = mxc_jpeg_buf_queue, +}; + +static int mxc_jpeg_queue_init(void *priv, struct vb2_queue *src_vq, + struct vb2_queue *dst_vq) +{ + struct mxc_jpeg_ctx *ctx = priv; + int ret; + + src_vq->type = v4l2_buf_type_video_output_mplane; + src_vq->io_modes = vb2_mmap | vb2_dmabuf; + src_vq->drv_priv = ctx; + src_vq->buf_struct_size = sizeof(struct mxc_jpeg_src_buf); + src_vq->ops = &mxc_jpeg_qops; + src_vq->mem_ops = &vb2_dma_contig_memops; + src_vq->timestamp_flags = v4l2_buf_flag_timestamp_copy; + src_vq->lock = &ctx->mxc_jpeg->lock; + src_vq->dev = ctx->mxc_jpeg->dev; + src_vq->allow_zero_bytesused = 1; /* keep old userspace apps working */ + + ret = vb2_queue_init(src_vq); + if (ret) + return ret; + + dst_vq->type = v4l2_buf_type_video_capture_mplane; + dst_vq->io_modes = vb2_mmap | vb2_dmabuf; + dst_vq->drv_priv = ctx; + dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer); + dst_vq->ops = &mxc_jpeg_qops; + dst_vq->mem_ops = &vb2_dma_contig_memops; + dst_vq->timestamp_flags = v4l2_buf_flag_timestamp_copy; + dst_vq->lock = &ctx->mxc_jpeg->lock; + dst_vq->dev = ctx->mxc_jpeg->dev; + + ret = vb2_queue_init(dst_vq); + return ret; +} + +static void mxc_jpeg_set_default_params(struct mxc_jpeg_ctx *ctx) +{ + struct mxc_jpeg_q_data *out_q = &ctx->out_q; + struct mxc_jpeg_q_data *cap_q = &ctx->cap_q; + struct mxc_jpeg_q_data *q[2] = {out_q, cap_q}; + int i; + + if (ctx->mxc_jpeg->mode == mxc_jpeg_encode) { + out_q->fmt = mxc_jpeg_find_format(ctx, mxc_jpeg_default_pfmt); + cap_q->fmt = mxc_jpeg_find_format(ctx, v4l2_pix_fmt_jpeg); + } else { + out_q->fmt = mxc_jpeg_find_format(ctx, v4l2_pix_fmt_jpeg); + cap_q->fmt = mxc_jpeg_find_format(ctx, mxc_jpeg_default_pfmt); + } + + for (i = 0; i < 2; i++) { + q[i]->w = mxc_jpeg_default_width; + q[i]->h = mxc_jpeg_default_height; + q[i]->w_adjusted = mxc_jpeg_default_width; + q[i]->h_adjusted = mxc_jpeg_default_height; + mxc_jpeg_bytesperline(q[i], 8); + mxc_jpeg_sizeimage(q[i]); + } +} + +static int mxc_jpeg_open(struct file *file) +{ + struct mxc_jpeg_dev *mxc_jpeg = video_drvdata(file); + struct video_device *mxc_vfd = video_devdata(file); + struct device *dev = mxc_jpeg->dev; + struct mxc_jpeg_ctx *ctx; + int ret = 0; + + ctx = kzalloc(sizeof(*ctx), gfp_kernel); + if (!ctx) + return -enomem; + + if (mutex_lock_interruptible(&mxc_jpeg->lock)) { + ret = -erestartsys; + goto free; + } + + v4l2_fh_init(&ctx->fh, mxc_vfd); + file->private_data = &ctx->fh; + v4l2_fh_add(&ctx->fh); + + ctx->mxc_jpeg = mxc_jpeg; + + ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(mxc_jpeg->m2m_dev, ctx, + mxc_jpeg_queue_init); + + if (is_err(ctx->fh.m2m_ctx)) { + ret = ptr_err(ctx->fh.m2m_ctx); + goto error; + } + + mxc_jpeg_set_default_params(ctx); + ctx->slot = mxc_max_slots; /* slot not allocated yet */ + + if (mxc_jpeg->mode == mxc_jpeg_decode) + dev_dbg(dev, "opened jpeg decoder instance %p ", ctx); + else + dev_dbg(dev, "opened jpeg encoder instance %p ", ctx); + mutex_unlock(&mxc_jpeg->lock); + + return 0; + +error: + v4l2_fh_del(&ctx->fh); + v4l2_fh_exit(&ctx->fh); + mutex_unlock(&mxc_jpeg->lock); +free: + kfree(ctx); + return ret; +} + +static int mxc_jpeg_querycap(struct file *file, void *priv, + struct v4l2_capability *cap) +{ + struct mxc_jpeg_dev *mxc_jpeg = video_drvdata(file); + + strscpy(cap->driver, mxc_jpeg_name " codec", sizeof(cap->driver)); + strscpy(cap->card, mxc_jpeg_name " codec", sizeof(cap->card)); + snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s", + dev_name(mxc_jpeg->dev)); + cap->device_caps = v4l2_cap_streaming | v4l2_cap_video_m2m_mplane; + cap->capabilities = cap->device_caps | v4l2_cap_device_caps; + + return 0; +} + +static int mxc_jpeg_enum_fmt_vid_cap(struct file *file, void *priv, + struct v4l2_fmtdesc *f) +{ + struct mxc_jpeg_ctx *ctx = mxc_jpeg_fh_to_ctx(priv); + + if (ctx->mxc_jpeg->mode == mxc_jpeg_encode) + return enum_fmt(mxc_formats, mxc_jpeg_num_formats, f, + mxc_jpeg_fmt_type_enc); + else + return enum_fmt(mxc_formats, mxc_jpeg_num_formats, f, + mxc_jpeg_fmt_type_raw); +} + +static int mxc_jpeg_enum_fmt_vid_out(struct file *file, void *priv, + struct v4l2_fmtdesc *f) +{ + struct mxc_jpeg_ctx *ctx = mxc_jpeg_fh_to_ctx(priv); + + if (ctx->mxc_jpeg->mode == mxc_jpeg_decode) + return enum_fmt(mxc_formats, mxc_jpeg_num_formats, f, + mxc_jpeg_fmt_type_enc); + else + return enum_fmt(mxc_formats, mxc_jpeg_num_formats, f, + mxc_jpeg_fmt_type_raw); +} + +static int mxc_jpeg_try_fmt(struct v4l2_format *f, struct mxc_jpeg_fmt *fmt, + struct mxc_jpeg_ctx *ctx, int q_type) +{ + struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp; + struct v4l2_plane_pix_format *pfmt; + u32 w = (pix_mp->width < mxc_jpeg_max_width) ? + pix_mp->width : mxc_jpeg_max_width; + u32 h = (pix_mp->height < mxc_jpeg_max_height) ? + pix_mp->height : mxc_jpeg_max_height; + int i; + struct mxc_jpeg_q_data tmp_q; + + memset(pix_mp->reserved, 0, sizeof(pix_mp->reserved)); + pix_mp->field = v4l2_field_none; + pix_mp->num_planes = fmt->colplanes; + pix_mp->pixelformat = fmt->fourcc; + + /* + * use mxc_jpeg_h_align instead of fmt->v_align, for vertical + * alignment, to loosen up the alignment to multiple of 8, + * otherwise nv12-1080p fails as 1080 is not a multiple of 16 + */ + v4l_bound_align_image(&w, + mxc_jpeg_min_width, + w, /* adjust downwards*/ + fmt->h_align, + &h, + mxc_jpeg_min_height, + h, /* adjust downwards*/ + mxc_jpeg_h_align, + 0); + pix_mp->width = w; /* negotiate the width */ + pix_mp->height = h; /* negotiate the height */ + + /* get user input into the tmp_q */ + tmp_q.w = w; + tmp_q.h = h; + tmp_q.fmt = fmt; + for (i = 0; i < pix_mp->num_planes; i++) { + pfmt = &pix_mp->plane_fmt[i]; + tmp_q.bytesperline[i] = pfmt->bytesperline; + tmp_q.sizeimage[i] = pfmt->sizeimage; + } + + /* calculate bytesperline & sizeimage into the tmp_q */ + mxc_jpeg_bytesperline(&tmp_q, 8); + mxc_jpeg_sizeimage(&tmp_q); + + /* adjust user format according to our calculations */ + for (i = 0; i < pix_mp->num_planes; i++) { + pfmt = &pix_mp->plane_fmt[i]; + memset(pfmt->reserved, 0, sizeof(pfmt->reserved)); + pfmt->bytesperline = tmp_q.bytesperline[i]; + pfmt->sizeimage = tmp_q.sizeimage[i]; + } + + /* fix colorspace information to srgb for both output & capture */ + pix_mp->colorspace = v4l2_colorspace_srgb; + pix_mp->ycbcr_enc = v4l2_ycbcr_enc_601; + pix_mp->xfer_func = v4l2_xfer_func_srgb; + /* + * this hardware does not change the range of the samples + * but since inside jpeg the yuv quantization is full-range, + * this driver will always use full-range for the raw frames, too + */ + pix_mp->quantization = v4l2_quantization_full_range; + + return 0; +} + +static int mxc_jpeg_try_fmt_vid_cap(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct mxc_jpeg_ctx *ctx = mxc_jpeg_fh_to_ctx(priv); + struct mxc_jpeg_dev *jpeg = ctx->mxc_jpeg; + struct device *dev = jpeg->dev; + struct mxc_jpeg_fmt *fmt; + u32 fourcc = f->fmt.pix_mp.pixelformat; + + int q_type = (jpeg->mode == mxc_jpeg_decode) ? + mxc_jpeg_fmt_type_raw : mxc_jpeg_fmt_type_enc; + + if (!v4l2_type_is_multiplanar(f->type)) { + dev_err(dev, "try_fmt with invalid type: %d ", f->type); + return -einval; + } + + fmt = mxc_jpeg_find_format(ctx, fourcc); + if (!fmt || fmt->flags != q_type) { + dev_warn(dev, "format not supported: %c%c%c%c, use the default. ", + (fourcc & 0xff), + (fourcc >> 8) & 0xff, + (fourcc >> 16) & 0xff, + (fourcc >> 24) & 0xff); + f->fmt.pix_mp.pixelformat = (jpeg->mode == mxc_jpeg_decode) ? + mxc_jpeg_default_pfmt : v4l2_pix_fmt_jpeg; + fmt = mxc_jpeg_find_format(ctx, f->fmt.pix_mp.pixelformat); + } + return mxc_jpeg_try_fmt(f, fmt, ctx, q_type); +} + +static int mxc_jpeg_try_fmt_vid_out(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct mxc_jpeg_ctx *ctx = mxc_jpeg_fh_to_ctx(priv); + struct mxc_jpeg_dev *jpeg = ctx->mxc_jpeg; + struct device *dev = jpeg->dev; + struct mxc_jpeg_fmt *fmt; + u32 fourcc = f->fmt.pix_mp.pixelformat; + + int q_type = (jpeg->mode == mxc_jpeg_encode) ? + mxc_jpeg_fmt_type_raw : mxc_jpeg_fmt_type_enc; + + if (!v4l2_type_is_multiplanar(f->type)) { + dev_err(dev, "try_fmt with invalid type: %d ", f->type); + return -einval; + } + + fmt = mxc_jpeg_find_format(ctx, fourcc); + if (!fmt || fmt->flags != q_type) { + dev_warn(dev, "format not supported: %c%c%c%c, use the default. ", + (fourcc & 0xff), + (fourcc >> 8) & 0xff, + (fourcc >> 16) & 0xff, + (fourcc >> 24) & 0xff); + f->fmt.pix_mp.pixelformat = (jpeg->mode == mxc_jpeg_encode) ? + mxc_jpeg_default_pfmt : v4l2_pix_fmt_jpeg; + fmt = mxc_jpeg_find_format(ctx, f->fmt.pix_mp.pixelformat); + } + return mxc_jpeg_try_fmt(f, fmt, ctx, q_type); +} + +static int mxc_jpeg_s_fmt(struct mxc_jpeg_ctx *ctx, + struct v4l2_format *f) +{ + struct vb2_queue *vq; + struct mxc_jpeg_q_data *q_data = null; + struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp; + struct mxc_jpeg_dev *jpeg = ctx->mxc_jpeg; + int i; + + vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); + if (!vq) + return -einval; + + q_data = mxc_jpeg_get_q_data(ctx, f->type); + + if (vb2_is_busy(vq)) { + v4l2_err(&jpeg->v4l2_dev, "queue busy "); + return -ebusy; + } + + q_data->fmt = mxc_jpeg_find_format(ctx, pix_mp->pixelformat); + q_data->w = pix_mp->width; + q_data->h = pix_mp->height; + + q_data->w_adjusted = q_data->w; + q_data->h_adjusted = q_data->h; + if (jpeg->mode == mxc_jpeg_decode) { + /* + * align up the resolution for cast ip, + * but leave the buffer resolution unchanged + */ + v4l_bound_align_image(&q_data->w_adjusted, + q_data->w_adjusted, /* adjust upwards */ + mxc_jpeg_max_width, + q_data->fmt->h_align, + &q_data->h_adjusted, + q_data->h_adjusted, /* adjust upwards */ + mxc_jpeg_max_height, + q_data->fmt->v_align, + 0); + } else { + /* + * align down the resolution for cast ip, + * but leave the buffer resolution unchanged + */ + v4l_bound_align_image(&q_data->w_adjusted, + mxc_jpeg_min_width, + q_data->w_adjusted, /* adjust downwards*/ + q_data->fmt->h_align, + &q_data->h_adjusted, + mxc_jpeg_min_height, + q_data->h_adjusted, /* adjust downwards*/ + q_data->fmt->v_align, + 0); + } + + for (i = 0; i < pix_mp->num_planes; i++) { + q_data->bytesperline[i] = pix_mp->plane_fmt[i].bytesperline; + q_data->sizeimage[i] = pix_mp->plane_fmt[i].sizeimage; + } + + return 0; +} + +static int mxc_jpeg_s_fmt_vid_cap(struct file *file, void *priv, + struct v4l2_format *f) +{ + int ret; + + ret = mxc_jpeg_try_fmt_vid_cap(file, priv, f); + if (ret) + return ret; + + return mxc_jpeg_s_fmt(mxc_jpeg_fh_to_ctx(priv), f); +} + +static int mxc_jpeg_s_fmt_vid_out(struct file *file, void *priv, + struct v4l2_format *f) +{ + int ret; + + ret = mxc_jpeg_try_fmt_vid_out(file, priv, f); + if (ret) + return ret; + + return mxc_jpeg_s_fmt(mxc_jpeg_fh_to_ctx(priv), f); +} + +static int mxc_jpeg_g_fmt_vid(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct mxc_jpeg_ctx *ctx = mxc_jpeg_fh_to_ctx(priv); + struct mxc_jpeg_dev *jpeg = ctx->mxc_jpeg; + struct device *dev = jpeg->dev; + struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp; + struct mxc_jpeg_q_data *q_data = mxc_jpeg_get_q_data(ctx, f->type); + int i; + + if (!v4l2_type_is_multiplanar(f->type)) { + dev_err(dev, "g_fmt with invalid type: %d ", f->type); + return -einval; + } + + pix_mp->pixelformat = q_data->fmt->fourcc; + pix_mp->width = q_data->w; + pix_mp->height = q_data->h; + pix_mp->field = v4l2_field_none; + + /* fix colorspace information to srgb for both output & capture */ + pix_mp->colorspace = v4l2_colorspace_srgb; + pix_mp->ycbcr_enc = v4l2_ycbcr_enc_601; + pix_mp->xfer_func = v4l2_xfer_func_srgb; + pix_mp->quantization = v4l2_quantization_full_range; + + pix_mp->num_planes = q_data->fmt->colplanes; + for (i = 0; i < pix_mp->num_planes; i++) { + pix_mp->plane_fmt[i].bytesperline = q_data->bytesperline[i]; + pix_mp->plane_fmt[i].sizeimage = q_data->sizeimage[i]; + } + + return 0; +} + +static int mxc_jpeg_subscribe_event(struct v4l2_fh *fh, + const struct v4l2_event_subscription *sub) +{ + switch (sub->type) { + case v4l2_event_eos: + return v4l2_event_subscribe(fh, sub, 0, null); + case v4l2_event_source_change: + return v4l2_src_change_event_subscribe(fh, sub); + default: + return -einval; + } +} + +static int mxc_jpeg_dqbuf(struct file *file, void *priv, + struct v4l2_buffer *buf) +{ + struct v4l2_fh *fh = file->private_data; + struct mxc_jpeg_ctx *ctx = mxc_jpeg_fh_to_ctx(priv); + struct device *dev = ctx->mxc_jpeg->dev; + int num_src_ready = v4l2_m2m_num_src_bufs_ready(fh->m2m_ctx); + int ret; + + dev_dbg(dev, "dqbuf type=%d, index=%d", buf->type, buf->index); + if (ctx->stopping == 1 && num_src_ready == 0) { + /* no more src bufs, notify app eos */ + notify_eos(ctx); + ctx->stopping = 0; + } + + ret = v4l2_m2m_dqbuf(file, fh->m2m_ctx, buf); + + return ret; +} + +static const struct v4l2_ioctl_ops mxc_jpeg_ioctl_ops = { + .vidioc_querycap = mxc_jpeg_querycap, + .vidioc_enum_fmt_vid_cap = mxc_jpeg_enum_fmt_vid_cap, + .vidioc_enum_fmt_vid_out = mxc_jpeg_enum_fmt_vid_out, + + .vidioc_try_fmt_vid_cap_mplane = mxc_jpeg_try_fmt_vid_cap, + .vidioc_try_fmt_vid_out_mplane = mxc_jpeg_try_fmt_vid_out, + + .vidioc_s_fmt_vid_cap_mplane = mxc_jpeg_s_fmt_vid_cap, + .vidioc_s_fmt_vid_out_mplane = mxc_jpeg_s_fmt_vid_out, + + .vidioc_g_fmt_vid_cap_mplane = mxc_jpeg_g_fmt_vid, + .vidioc_g_fmt_vid_out_mplane = mxc_jpeg_g_fmt_vid, + + .vidioc_subscribe_event = mxc_jpeg_subscribe_event, + .vidioc_unsubscribe_event = v4l2_event_unsubscribe, + + .vidioc_try_decoder_cmd = v4l2_m2m_ioctl_try_decoder_cmd, + .vidioc_decoder_cmd = mxc_jpeg_decoder_cmd, + .vidioc_try_encoder_cmd = v4l2_m2m_ioctl_try_encoder_cmd, + .vidioc_encoder_cmd = mxc_jpeg_encoder_cmd, + + .vidioc_qbuf = v4l2_m2m_ioctl_qbuf, + .vidioc_dqbuf = mxc_jpeg_dqbuf, + + .vidioc_create_bufs = v4l2_m2m_ioctl_create_bufs, + .vidioc_prepare_buf = v4l2_m2m_ioctl_prepare_buf, + .vidioc_reqbufs = v4l2_m2m_ioctl_reqbufs, + .vidioc_querybuf = v4l2_m2m_ioctl_querybuf, + .vidioc_expbuf = v4l2_m2m_ioctl_expbuf, + .vidioc_streamon = v4l2_m2m_ioctl_streamon, + .vidioc_streamoff = v4l2_m2m_ioctl_streamoff, +}; + +static int mxc_jpeg_release(struct file *file) +{ + struct mxc_jpeg_dev *mxc_jpeg = video_drvdata(file); + struct mxc_jpeg_ctx *ctx = mxc_jpeg_fh_to_ctx(file->private_data); + struct device *dev = mxc_jpeg->dev; + + mutex_lock(&mxc_jpeg->lock); + if (mxc_jpeg->mode == mxc_jpeg_decode) + dev_dbg(dev, "release jpeg decoder instance on slot %d.", + ctx->slot); + else + dev_dbg(dev, "release jpeg encoder instance on slot %d.", + ctx->slot); + v4l2_m2m_ctx_release(ctx->fh.m2m_ctx); + v4l2_fh_del(&ctx->fh); + v4l2_fh_exit(&ctx->fh); + kfree(ctx); + mutex_unlock(&mxc_jpeg->lock); + + return 0; +} + +static const struct v4l2_file_operations mxc_jpeg_fops = { + .owner = this_module, + .open = mxc_jpeg_open, + .release = mxc_jpeg_release, + .poll = v4l2_m2m_fop_poll, + .unlocked_ioctl = video_ioctl2, + .mmap = v4l2_m2m_fop_mmap, +}; + +static struct v4l2_m2m_ops mxc_jpeg_m2m_ops = { + .device_run = mxc_jpeg_device_run, +}; + +static void mxc_jpeg_detach_pm_domains(struct mxc_jpeg_dev *jpeg) +{ + int i; + + for (i = 0; i < jpeg->num_domains; i++) { + if (jpeg->pd_link[i] && !is_err(jpeg->pd_link[i])) + device_link_del(jpeg->pd_link[i]); + if (jpeg->pd_dev[i] && !is_err(jpeg->pd_dev[i])) + dev_pm_domain_detach(jpeg->pd_dev[i], true); + jpeg->pd_dev[i] = null; + jpeg->pd_link[i] = null; + } +} + +static int mxc_jpeg_attach_pm_domains(struct mxc_jpeg_dev *jpeg) +{ + struct device *dev = jpeg->dev; + struct device_node *np = jpeg->pdev->dev.of_node; + int i; + int ret; + + jpeg->num_domains = of_count_phandle_with_args(np, "power-domains", + "#power-domain-cells"); + if (jpeg->num_domains < 0) { + dev_err(dev, "no power domains defined for jpeg node "); + return jpeg->num_domains; + } + + jpeg->pd_dev = devm_kmalloc_array(dev, jpeg->num_domains, + sizeof(*jpeg->pd_dev), gfp_kernel); + if (!jpeg->pd_dev) + return -enomem; + + jpeg->pd_link = devm_kmalloc_array(dev, jpeg->num_domains, + sizeof(*jpeg->pd_link), gfp_kernel); + if (!jpeg->pd_link) + return -enomem; + + for (i = 0; i < jpeg->num_domains; i++) { + jpeg->pd_dev[i] = dev_pm_domain_attach_by_id(dev, i); + if (is_err(jpeg->pd_dev[i])) { + ret = ptr_err(jpeg->pd_dev[i]); + goto fail; + } + + jpeg->pd_link[i] = device_link_add(dev, jpeg->pd_dev[i], + dl_flag_stateless | + dl_flag_pm_runtime | + dl_flag_rpm_active); + if (is_err(jpeg->pd_link[i])) { + ret = ptr_err(jpeg->pd_link[i]); + goto fail; + } + } + + return 0; +fail: + mxc_jpeg_detach_pm_domains(jpeg); + return ret; +} + +static int mxc_jpeg_probe(struct platform_device *pdev) +{ + struct mxc_jpeg_dev *jpeg; + struct device *dev = &pdev->dev; + struct resource *res; + int dec_irq; + int ret; + int mode; + const struct of_device_id *of_id; + unsigned int slot; + + of_id = of_match_node(mxc_jpeg_match, dev->of_node); + mode = *(const int *)of_id->data; + + jpeg = devm_kzalloc(dev, sizeof(struct mxc_jpeg_dev), gfp_kernel); + if (!jpeg) + return -enomem; + + mutex_init(&jpeg->lock); + spin_lock_init(&jpeg->hw_lock); + + ret = dma_set_mask_and_coherent(dev, dma_bit_mask(32)); + if (ret) { + dev_err(&pdev->dev, "no suitable dma available. "); + goto err_irq; + } + + res = platform_get_resource(pdev, ioresource_mem, 0); + jpeg->base_reg = devm_ioremap_resource(&pdev->dev, res); + if (is_err(jpeg->base_reg)) + return ptr_err(jpeg->base_reg); + + for (slot = 0; slot < mxc_max_slots; slot++) { + dec_irq = platform_get_irq(pdev, slot); + if (dec_irq < 0) { + dev_err(&pdev->dev, "failed to get irq %d ", dec_irq); + ret = dec_irq; + goto err_irq; + } + ret = devm_request_irq(&pdev->dev, dec_irq, mxc_jpeg_dec_irq, + 0, pdev->name, jpeg); + if (ret) { + dev_err(&pdev->dev, "failed to request irq %d (%d) ", + dec_irq, ret); + goto err_irq; + } + } + + jpeg->pdev = pdev; + jpeg->dev = dev; + jpeg->mode = mode; + + ret = mxc_jpeg_attach_pm_domains(jpeg); + if (ret < 0) { + dev_err(dev, "failed to attach power domains %d ", ret); + return ret; + } + + /* v4l2 */ + ret = v4l2_device_register(dev, &jpeg->v4l2_dev); + if (ret) { + dev_err(dev, "failed to register v4l2 device "); + goto err_register; + } + jpeg->m2m_dev = v4l2_m2m_init(&mxc_jpeg_m2m_ops); + if (is_err(jpeg->m2m_dev)) { + dev_err(dev, "failed to register v4l2 device "); + goto err_m2m; + } + + jpeg->dec_vdev = video_device_alloc(); + if (!jpeg->dec_vdev) { + dev_err(dev, "failed to register v4l2 device "); + goto err_vdev_alloc; + } + if (mode == mxc_jpeg_encode) + snprintf(jpeg->dec_vdev->name, + sizeof(jpeg->dec_vdev->name), + "%s-enc", mxc_jpeg_name); + else + snprintf(jpeg->dec_vdev->name, + sizeof(jpeg->dec_vdev->name), + "%s-dec", mxc_jpeg_name); + + jpeg->dec_vdev->fops = &mxc_jpeg_fops; + jpeg->dec_vdev->ioctl_ops = &mxc_jpeg_ioctl_ops; + jpeg->dec_vdev->minor = -1; + jpeg->dec_vdev->release = video_device_release; + jpeg->dec_vdev->lock = &jpeg->lock; /* lock for ioctl serialization */ + jpeg->dec_vdev->v4l2_dev = &jpeg->v4l2_dev; + jpeg->dec_vdev->vfl_dir = vfl_dir_m2m; + jpeg->dec_vdev->device_caps = v4l2_cap_streaming | + v4l2_cap_video_m2m_mplane; + if (mode == mxc_jpeg_encode) { + v4l2_disable_ioctl(jpeg->dec_vdev, vidioc_decoder_cmd); + v4l2_disable_ioctl(jpeg->dec_vdev, vidioc_try_decoder_cmd); + } else { + v4l2_disable_ioctl(jpeg->dec_vdev, vidioc_encoder_cmd); + v4l2_disable_ioctl(jpeg->dec_vdev, vidioc_try_encoder_cmd); + } + ret = video_register_device(jpeg->dec_vdev, vfl_type_video, -1); + if (ret) { + dev_err(dev, "failed to register video device "); + goto err_vdev_register; + } + video_set_drvdata(jpeg->dec_vdev, jpeg); + if (mode == mxc_jpeg_encode) + v4l2_info(&jpeg->v4l2_dev, + "encoder device registered as /dev/video%d (%d,%d) ", + jpeg->dec_vdev->num, video_major, + jpeg->dec_vdev->minor); + else + v4l2_info(&jpeg->v4l2_dev, + "decoder device registered as /dev/video%d (%d,%d) ", + jpeg->dec_vdev->num, video_major, + jpeg->dec_vdev->minor); + + platform_set_drvdata(pdev, jpeg); + + return 0; + +err_vdev_register: + video_device_release(jpeg->dec_vdev); + +err_vdev_alloc: + v4l2_m2m_release(jpeg->m2m_dev); + +err_m2m: + v4l2_device_unregister(&jpeg->v4l2_dev); + +err_register: +err_irq: + return ret; +} + +static int mxc_jpeg_remove(struct platform_device *pdev) +{ + unsigned int slot; + struct mxc_jpeg_dev *jpeg = platform_get_drvdata(pdev); + + for (slot = 0; slot < mxc_max_slots; slot++) + mxc_jpeg_free_slot_data(jpeg, slot); + + video_unregister_device(jpeg->dec_vdev); + video_device_release(jpeg->dec_vdev); + v4l2_m2m_release(jpeg->m2m_dev); + v4l2_device_unregister(&jpeg->v4l2_dev); + mxc_jpeg_detach_pm_domains(jpeg); + + return 0; +} + +module_device_table(of, mxc_jpeg_match); + +static struct platform_driver mxc_jpeg_driver = { + .probe = mxc_jpeg_probe, + .remove = mxc_jpeg_remove, + .driver = { + .name = "mxc-jpeg", + .of_match_table = mxc_jpeg_match, + }, +}; +module_platform_driver(mxc_jpeg_driver); + +module_author("zhengyu shen <zhengyu.shen_1@nxp.com>"); +module_author("mirela rabulea <mirela.rabulea@nxp.com>"); +module_description("v4l2 driver for i.mx8 qxp/qm jpeg encoder/decoder"); +module_license("gpl v2"); diff --git a/drivers/media/platform/imx-jpeg/mxc-jpeg.h b/drivers/media/platform/imx-jpeg/mxc-jpeg.h --- /dev/null +++ b/drivers/media/platform/imx-jpeg/mxc-jpeg.h +/* spdx-license-identifier: gpl-2.0 */ +/* + * i.mx8qxp/i.mx8qm jpeg encoder/decoder v4l2 driver + * + * copyright 2018-2019 nxp + */ + +#include <media/v4l2-ctrls.h> +#include <media/v4l2-device.h> +#include <media/v4l2-fh.h> + +#ifndef _mxc_jpeg_core_h +#define _mxc_jpeg_core_h + +#define mxc_jpeg_name "mxc-jpeg" +#define mxc_jpeg_fmt_type_enc 0 +#define mxc_jpeg_fmt_type_raw 1 +#define mxc_jpeg_default_width 1280 +#define mxc_jpeg_default_height 720 +#define mxc_jpeg_default_pfmt v4l2_pix_fmt_rgb24 +#define mxc_jpeg_min_width 64 +#define mxc_jpeg_min_height 64 +#define mxc_jpeg_max_width 0x2000 +#define mxc_jpeg_max_height 0x2000 +#define mxc_jpeg_max_cfg_stream 0x1000 +#define mxc_jpeg_h_align 3 +#define mxc_jpeg_w_align 3 +#define mxc_jpeg_max_sizeimage 0xfffffc00 +#define mxc_jpeg_max_planes 2 + +enum mxc_jpeg_enc_state { + mxc_jpeg_encoding = 0, /* jpeg encode phase */ + mxc_jpeg_enc_conf = 1, /* jpeg encoder config phase */ +}; + +enum mxc_jpeg_mode { + mxc_jpeg_decode = 0, /* jpeg decode mode */ + mxc_jpeg_encode = 1, /* jpeg encode mode */ +}; + +/** + * struct mxc_jpeg_fmt - driver's internal color format data + * @name: format description + * @fourcc: fourcc code, 0 if not applicable + * @subsampling: subsampling of jpeg components + * @nc: number of color components + * @depth: number of bits per pixel + * @colplanes: number of color planes (1 for packed formats) + * @h_align: horizontal alignment order (align to 2^h_align) + * @v_align: vertical alignment order (align to 2^v_align) + * @flags: flags describing format applicability + */ +struct mxc_jpeg_fmt { + char *name; + u32 fourcc; + enum v4l2_jpeg_chroma_subsampling subsampling; + int nc; + int depth; + int colplanes; + int h_align; + int v_align; + u32 flags; +}; + +struct mxc_jpeg_desc { + u32 next_descpt_ptr; + u32 buf_base0; + u32 buf_base1; + u32 line_pitch; + u32 stm_bufbase; + u32 stm_bufsize; + u32 imgsize; + u32 stm_ctrl; +} __packed; + +struct mxc_jpeg_q_data { + struct mxc_jpeg_fmt *fmt; + u32 sizeimage[mxc_jpeg_max_planes]; + u32 bytesperline[mxc_jpeg_max_planes]; + int w; + int w_adjusted; + int h; + int h_adjusted; + unsigned int sequence; +}; + +struct mxc_jpeg_ctx { + struct mxc_jpeg_dev *mxc_jpeg; + struct mxc_jpeg_q_data out_q; + struct mxc_jpeg_q_data cap_q; + struct v4l2_fh fh; + enum mxc_jpeg_enc_state enc_state; + unsigned int stopping; + unsigned int slot; +}; + +struct mxc_jpeg_slot_data { + bool used; + struct mxc_jpeg_desc *desc; // enc/dec descriptor + struct mxc_jpeg_desc *cfg_desc; // configuration descriptor + void *cfg_stream_vaddr; // configuration bitstream virtual address + unsigned int cfg_stream_size; + dma_addr_t desc_handle; + dma_addr_t cfg_desc_handle; // configuration descriptor dma address + dma_addr_t cfg_stream_handle; // configuration bitstream dma address +}; + +struct mxc_jpeg_dev { + spinlock_t hw_lock; /* hardware access lock */ + unsigned int mode; + struct mutex lock; /* v4l2 ioctls serialization */ + struct platform_device *pdev; + struct device *dev; + void __iomem *base_reg; + struct v4l2_device v4l2_dev; + struct v4l2_m2m_dev *m2m_dev; + struct video_device *dec_vdev; + struct mxc_jpeg_slot_data slot_data[mxc_max_slots]; + int num_domains; + struct device **pd_dev; + struct device_link **pd_link; +}; + +/** + * struct mxc_jpeg_sof_comp - jpeg start of frame component fields + * @id: component id + * @v: vertical sampling + * @h: horizontal sampling + * @quantization_table_no: id of quantization table + */ +struct mxc_jpeg_sof_comp { + u8 id; + u8 v :4; + u8 h :4; + u8 quantization_table_no; +} __packed; + +#define mxc_jpeg_max_components 4 +/** + * struct mxc_jpeg_sof - jpeg start of frame marker fields + * @length: start of frame length + * @precision: precision (bits per pixel per color component) + * @height: image height + * @width: image width + * @components_no: number of color components + * @comp: component fields for each color component + */ +struct mxc_jpeg_sof { + u16 length; + u8 precision; + u16 height, width; + u8 components_no; + struct mxc_jpeg_sof_comp comp[mxc_jpeg_max_components]; +} __packed; + +/** + * struct mxc_jpeg_sos_comp - jpeg start of scan component fields + * @id: component id + * @huffman_table_no: id of the huffman table + */ +struct mxc_jpeg_sos_comp { + u8 id; /*component id*/ + u8 huffman_table_no; +} __packed; + +/** + * struct mxc_jpeg_sos - jpeg start of scan marker fields + * @length: start of frame length + * @components_no: number of color components + * @comp: sos component fields for each color component + * @ignorable_bytes: ignorable bytes + */ +struct mxc_jpeg_sos { + u16 length; + u8 components_no; + struct mxc_jpeg_sos_comp comp[mxc_jpeg_max_components]; + u8 ignorable_bytes[3]; +} __packed; + +#endif
|
TV tuners, webcams, video capturers
|
2db16c6ed72ce644d5639b3ed15e5817442db4ba
|
mirela rabulea
|
drivers
|
media
|
imx-jpeg, platform
|
media: add maintainer for imx jpeg v4l2 driver
|
the driver is located in drivers/media/platform/imx-jpeg, and it applies to the jpeg decoder from i.mx qxp and qm.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['maintainers']
| 1
| 8
| 0
|
--- diff --git a/maintainers b/maintainers --- a/maintainers +++ b/maintainers +nxp i.mx 8qxp/8qm jpeg v4l2 driver +m: mirela rabulea <mirela.rabulea@nxp.com> +r: nxp linux team <linux-imx@nxp.com> +l: linux-media@vger.kernel.org +s: maintained +f: documentation/devicetree/bindings/media/imx8-jpeg.yaml +f: drivers/media/platform/imx-jpeg +
|
TV tuners, webcams, video capturers
|
be157db0a3d863d9d5439bcab0a0afbf173e94f8
|
mirela rabulea
| |||
media: adv7604: support edids up to 4 blocks
|
while the adv7604/11/12 hardware supported edids up to 4 blocks, the driver didn't. this patch adds support for this. it also improves support for edids that do not have a source physical address: in that case the spa location is set to the first byte of the second block, and the 'physical address' is just the two bytes at that location. this is per the suggestion in the adv76xx documentation for such edids.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
support edids up to 4 blocks
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['adv7604']
|
['c']
| 1
| 61
| 28
|
--- diff --git a/drivers/media/i2c/adv7604.c b/drivers/media/i2c/adv7604.c --- a/drivers/media/i2c/adv7604.c +++ b/drivers/media/i2c/adv7604.c +#define adv76xx_max_edid_blocks 4 + + unsigned int edid_segment_reg; + unsigned int edid_segment_mask; + unsigned int edid_spa_loc_reg; + unsigned int edid_spa_loc_msb_mask; + unsigned int edid_spa_port_b_reg; - u8 edid[256]; + u8 edid[adv76xx_max_edid_blocks * 128]; - if (edid->blocks > 2) { - edid->blocks = 2; + if (edid->blocks > adv76xx_max_edid_blocks) { + edid->blocks = adv76xx_max_edid_blocks; + + if (!spa_loc) { + /* + * there is no spa, so just set spa_loc to 128 and pa to whatever + * data is there. + */ + spa_loc = 128; + pa = (edid->edid[spa_loc] << 8) | edid->edid[spa_loc + 1]; + } + - /* - * return an error if no location of the source physical address - * was found. - */ - if (edid->blocks > 1 && spa_loc == 0) - return -einval; - - rep_write(sd, 0x70, pa >> 8); - rep_write(sd, 0x71, pa & 0xff); + rep_write(sd, info->edid_spa_port_b_reg, pa >> 8); + rep_write(sd, info->edid_spa_port_b_reg + 1, pa & 0xff); - rep_write(sd, 0x72, pa >> 8); - rep_write(sd, 0x73, pa & 0xff); + rep_write(sd, info->edid_spa_port_b_reg + 2, pa >> 8); + rep_write(sd, info->edid_spa_port_b_reg + 3, pa & 0xff); - rep_write(sd, 0x74, pa >> 8); - rep_write(sd, 0x75, pa & 0xff); + rep_write(sd, info->edid_spa_port_b_reg + 4, pa >> 8); + rep_write(sd, info->edid_spa_port_b_reg + 5, pa & 0xff); - if (info->type == adv7604) { - rep_write(sd, 0x76, spa_loc & 0xff); - rep_write_clr_set(sd, 0x77, 0x40, (spa_loc & 0x100) >> 2); - } else { - /* adv7612 software manual rev. a, p. 15 */ - rep_write(sd, 0x70, spa_loc & 0xff); - rep_write_clr_set(sd, 0x71, 0x01, (spa_loc & 0x100) >> 8); - } + if (info->edid_spa_loc_reg) { + u8 mask = info->edid_spa_loc_msb_mask; - if (spa_loc) { - edid->edid[spa_loc] = state->spa_port_a[0]; - edid->edid[spa_loc + 1] = state->spa_port_a[1]; + rep_write(sd, info->edid_spa_loc_reg, spa_loc & 0xff); + rep_write_clr_set(sd, info->edid_spa_loc_reg + 1, + mask, (spa_loc & 0x100) ? mask : 0); + edid->edid[spa_loc] = state->spa_port_a[0]; + edid->edid[spa_loc + 1] = state->spa_port_a[1]; + - err = edid_write_block(sd, 128 * edid->blocks, state->edid.edid); + rep_write_clr_set(sd, info->edid_segment_reg, + info->edid_segment_mask, 0); + err = edid_write_block(sd, 128 * min(edid->blocks, 2u), state->edid.edid); + if (edid->blocks > 2) { + rep_write_clr_set(sd, info->edid_segment_reg, + info->edid_segment_mask, + info->edid_segment_mask); + err = edid_write_block(sd, 128 * (edid->blocks - 2), + state->edid.edid + 256); + if (err < 0) { + v4l2_err(sd, "error %d writing edid pad %d ", + err, edid->pad); + return err; + } + } + .edid_segment_reg = 0x77, + .edid_segment_mask = 0x10, + .edid_spa_loc_reg = 0x76, + .edid_spa_loc_msb_mask = 0x40, + .edid_spa_port_b_reg = 0x70, + .edid_segment_reg = 0x7a, + .edid_segment_mask = 0x01, + .edid_segment_reg = 0x7a, + .edid_segment_mask = 0x01, + .edid_spa_loc_reg = 0x70, + .edid_spa_loc_msb_mask = 0x01, + .edid_spa_port_b_reg = 0x52,
|
TV tuners, webcams, video capturers
|
c730ff32b917c814c1d86343328f0518a94114c0
|
hans verkuil
|
drivers
|
media
|
i2c
|
media: adv7842: support 1 block edids, fix clearing edid
|
add support for edids consisting of one edid block.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
support 1 block edids
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['adv7842']
|
['c']
| 1
| 43
| 28
|
--- diff --git a/drivers/media/i2c/adv7842.c b/drivers/media/i2c/adv7842.c --- a/drivers/media/i2c/adv7842.c +++ b/drivers/media/i2c/adv7842.c + u32 blocks; + u32 blocks; - const u8 *val = state->vga_edid.edid; + const u8 *edid = state->vga_edid.edid; + u32 blocks = state->vga_edid.blocks; - for (i = 0; !err && i < 256; i += i2c_smbus_block_max) + for (i = 0; !err && i < blocks * 128; i += i2c_smbus_block_max) - val + i); + edid + i); + u32 blocks = state->hdmi_edid.blocks; - u16 pa; + u16 pa, parent_pa; - pa = v4l2_get_edid_phys_addr(edid, 256, &spa_loc); - err = v4l2_phys_addr_validate(pa, &pa, null); + pa = v4l2_get_edid_phys_addr(edid, blocks * 128, &spa_loc); + err = v4l2_phys_addr_validate(pa, &parent_pa, null); - /* - * return an error if no location of the source physical address - * was found. - */ - if (spa_loc == 0) - return -einval; + if (!spa_loc) { + /* + * there is no spa, so just set spa_loc to 128 and pa to whatever + * data is there. + */ + spa_loc = 128; + pa = (edid[spa_loc] << 8) | edid[spa_loc + 1]; + } - for (i = 0; !err && i < 256; i += i2c_smbus_block_max) + for (i = 0; !err && i < blocks * 128; i += i2c_smbus_block_max) - rep_write(sd, 0x72, edid[spa_loc]); - rep_write(sd, 0x73, edid[spa_loc + 1]); + rep_write(sd, 0x72, pa >> 8); + rep_write(sd, 0x73, pa & 0xff); - rep_write(sd, 0x74, edid[spa_loc]); - rep_write(sd, 0x75, edid[spa_loc + 1]); + rep_write(sd, 0x74, pa >> 8); + rep_write(sd, 0x75, pa & 0xff); - cec_s_phys_addr(state->cec_adap, pa, false); + cec_s_phys_addr(state->cec_adap, parent_pa, false); + u32 blocks = 0; - if (state->hdmi_edid.present & (0x04 << edid->pad)) + if (state->hdmi_edid.present & (0x04 << edid->pad)) { + blocks = state->hdmi_edid.blocks; + } - if (state->vga_edid.present) + if (state->vga_edid.present) { + blocks = state->vga_edid.blocks; + } - edid->blocks = data ? 2 : 0; + edid->blocks = blocks; - if (edid->start_block >= 2) + if (edid->start_block >= blocks) - if (edid->start_block + edid->blocks > 2) - edid->blocks = 2 - edid->start_block; + if (edid->start_block + edid->blocks > blocks) + edid->blocks = blocks - edid->start_block; - state->aspect_ratio = v4l2_calc_aspect_ratio(e->edid[0x15], - e->edid[0x16]); + if (e->blocks) + state->aspect_ratio = v4l2_calc_aspect_ratio(e->edid[0x15], + e->edid[0x16]); + state->vga_edid.blocks = e->blocks; - memcpy(&state->vga_edid.edid, e->edid, 128 * e->blocks); + if (e->blocks) + memcpy(&state->vga_edid.edid, e->edid, 128 * e->blocks); + state->hdmi_edid.blocks = e->blocks; + memcpy(&state->hdmi_edid.edid, e->edid, 128 * e->blocks); - memcpy(&state->hdmi_edid.edid, e->edid, 128 * e->blocks);
|
TV tuners, webcams, video capturers
|
3e057b8a5f99bb0bd65d56ab6f543bb6fd1e7b40
|
hans verkuil
|
drivers
|
media
|
i2c
|
media: v4l: add new colorimetry class
|
add colorimetry control class for colorimetry controls
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
hdr10 static metadata
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['h', 'c']
| 2
| 10
| 1
|
--- diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c --- a/drivers/media/v4l2-core/v4l2-ctrls.c +++ b/drivers/media/v4l2-core/v4l2-ctrls.c + + /* colorimetry controls */ + /* keep the order of the 'case's the same as in v4l2-controls.h! */ + case v4l2_cid_colorimetry_class: return "colorimetry controls"; + case v4l2_cid_colorimetry_class: - /* you can neither read not write these */ + /* you can neither read nor write these */ diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h --- a/include/uapi/linux/v4l2-controls.h +++ b/include/uapi/linux/v4l2-controls.h +#define v4l2_ctrl_class_colorimetry 0x00a50000 /* colorimetry controls */ +#define v4l2_cid_colorimetry_class_base (v4l2_ctrl_class_colorimetry | 0x900) +#define v4l2_cid_colorimetry_class (v4l2_ctrl_class_colorimetry | 1) +
|
TV tuners, webcams, video capturers
|
f31b9ffd968bc07e78826814da01e164e0bf6485
|
stanimir varbanov hans verkuil hverkuil cisco xs all nl
|
include
|
uapi
|
linux, v4l2-core
|
media: docs: document colorimetry class
|
add a document for ext control colorimetry class.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
hdr10 static metadata
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['rst']
| 3
| 27
| 0
|
--- diff --git a/documentation/userspace-api/media/v4l/common.rst b/documentation/userspace-api/media/v4l/common.rst --- a/documentation/userspace-api/media/v4l/common.rst +++ b/documentation/userspace-api/media/v4l/common.rst + ext-ctrls-colorimetry diff --git a/documentation/userspace-api/media/v4l/ext-ctrls-colorimetry.rst b/documentation/userspace-api/media/v4l/ext-ctrls-colorimetry.rst --- /dev/null +++ b/documentation/userspace-api/media/v4l/ext-ctrls-colorimetry.rst +.. spdx-license-identifier: gfdl-1.1-no-invariants-or-later + +.. _colorimetry-controls: + +***************************** +colorimetry control reference +***************************** + +the colorimetry class includes controls for high dynamic range +imaging for representing colors in digital images and video. the +controls should be used for video and image encoding and decoding +as well as in hdmi receivers and transmitters. + +colorimetry control ids +----------------------- + +.. _colorimetry-control-id: + +''v4l2_cid_colorimetry_class (class)'' + the colorimetry class descriptor. calling + :ref:'vidioc_queryctrl' for this control will + return a description of this control class. diff --git a/documentation/userspace-api/media/v4l/vidioc-g-ext-ctrls.rst b/documentation/userspace-api/media/v4l/vidioc-g-ext-ctrls.rst --- a/documentation/userspace-api/media/v4l/vidioc-g-ext-ctrls.rst +++ b/documentation/userspace-api/media/v4l/vidioc-g-ext-ctrls.rst - 0xa40000 - the class containing stateless codec controls. these controls are + * - ''v4l2_ctrl_class_colorimetry'' + - 0xa50000 + - the class containing colorimetry controls. these controls are + described in :ref:'colorimetry-controls'.
|
TV tuners, webcams, video capturers
|
4e4053a28f37ab45ee9d13b77b1b9f53923b87b3
|
stanimir varbanov hans verkuil hverkuil cisco xs all nl
|
documentation
|
userspace-api
|
media, v4l
|
media: v4l: add hdr10 static metadata controls
|
introduce content light level and mastering display colour volume colorimetry compound controls with relevant payload structures and validation.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
hdr10 static metadata
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['h', 'c']
| 4
| 106
| 0
|
--- diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c --- a/drivers/media/v4l2-core/v4l2-ctrls.c +++ b/drivers/media/v4l2-core/v4l2-ctrls.c + case v4l2_cid_colorimetry_hdr10_cll_info: return "hdr10 content light info"; + case v4l2_cid_colorimetry_hdr10_mastering_display: return "hdr10 mastering display"; + case v4l2_cid_colorimetry_hdr10_cll_info: + *type = v4l2_ctrl_type_hdr10_cll_info; + break; + case v4l2_cid_colorimetry_hdr10_mastering_display: + *type = v4l2_ctrl_type_hdr10_mastering_display; + break; + case v4l2_ctrl_type_hdr10_cll_info: + pr_cont("hdr10_cll_info"); + break; + case v4l2_ctrl_type_hdr10_mastering_display: + pr_cont("hdr10_mastering_display"); + break; + struct v4l2_ctrl_hdr10_mastering_display *p_hdr10_mastering; + case v4l2_ctrl_type_hdr10_cll_info: + break; + + case v4l2_ctrl_type_hdr10_mastering_display: + p_hdr10_mastering = p; + + for (i = 0; i < 3; ++i) { + if (p_hdr10_mastering->display_primaries_x[i] < + v4l2_hdr10_mastering_primaries_x_low || + p_hdr10_mastering->display_primaries_x[i] > + v4l2_hdr10_mastering_primaries_x_high || + p_hdr10_mastering->display_primaries_y[i] < + v4l2_hdr10_mastering_primaries_y_low || + p_hdr10_mastering->display_primaries_y[i] > + v4l2_hdr10_mastering_primaries_y_high) + return -einval; + } + + if (p_hdr10_mastering->white_point_x < + v4l2_hdr10_mastering_white_point_x_low || + p_hdr10_mastering->white_point_x > + v4l2_hdr10_mastering_white_point_x_high || + p_hdr10_mastering->white_point_y < + v4l2_hdr10_mastering_white_point_y_low || + p_hdr10_mastering->white_point_y > + v4l2_hdr10_mastering_white_point_y_high) + return -einval; + + if (p_hdr10_mastering->max_display_mastering_luminance < + v4l2_hdr10_mastering_max_luma_low || + p_hdr10_mastering->max_display_mastering_luminance > + v4l2_hdr10_mastering_max_luma_high || + p_hdr10_mastering->min_display_mastering_luminance < + v4l2_hdr10_mastering_min_luma_low || + p_hdr10_mastering->min_display_mastering_luminance > + v4l2_hdr10_mastering_min_luma_high) + return -einval; + + /* the following restriction comes from itu-t rec. h.265 spec */ + if (p_hdr10_mastering->max_display_mastering_luminance == + v4l2_hdr10_mastering_max_luma_low && + p_hdr10_mastering->min_display_mastering_luminance == + v4l2_hdr10_mastering_min_luma_high) + return -einval; + + break; + + case v4l2_ctrl_type_hdr10_cll_info: + elem_size = sizeof(struct v4l2_ctrl_hdr10_cll_info); + break; + case v4l2_ctrl_type_hdr10_mastering_display: + elem_size = sizeof(struct v4l2_ctrl_hdr10_mastering_display); + break; diff --git a/include/media/v4l2-ctrls.h b/include/media/v4l2-ctrls.h --- a/include/media/v4l2-ctrls.h +++ b/include/media/v4l2-ctrls.h + * @p_hdr10_cll: pointer to an hdr10 content light level structure. + * @p_hdr10_mastering: pointer to an hdr10 mastering display structure. + struct v4l2_ctrl_hdr10_cll_info *p_hdr10_cll; + struct v4l2_ctrl_hdr10_mastering_display *p_hdr10_mastering; diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h --- a/include/uapi/linux/v4l2-controls.h +++ b/include/uapi/linux/v4l2-controls.h +#define v4l2_cid_colorimetry_hdr10_cll_info (v4l2_cid_colorimetry_class_base + 0) + +struct v4l2_ctrl_hdr10_cll_info { + __u16 max_content_light_level; + __u16 max_pic_average_light_level; +}; + +#define v4l2_cid_colorimetry_hdr10_mastering_display (v4l2_cid_colorimetry_class_base + 1) + +#define v4l2_hdr10_mastering_primaries_x_low 5 +#define v4l2_hdr10_mastering_primaries_x_high 37000 +#define v4l2_hdr10_mastering_primaries_y_low 5 +#define v4l2_hdr10_mastering_primaries_y_high 42000 +#define v4l2_hdr10_mastering_white_point_x_low 5 +#define v4l2_hdr10_mastering_white_point_x_high 37000 +#define v4l2_hdr10_mastering_white_point_y_low 5 +#define v4l2_hdr10_mastering_white_point_y_high 42000 +#define v4l2_hdr10_mastering_max_luma_low 50000 +#define v4l2_hdr10_mastering_max_luma_high 100000000 +#define v4l2_hdr10_mastering_min_luma_low 1 +#define v4l2_hdr10_mastering_min_luma_high 50000 + +struct v4l2_ctrl_hdr10_mastering_display { + __u16 display_primaries_x[3]; + __u16 display_primaries_y[3]; + __u16 white_point_x; + __u16 white_point_y; + __u32 max_display_mastering_luminance; + __u32 min_display_mastering_luminance; +}; + diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h --- a/include/uapi/linux/videodev2.h +++ b/include/uapi/linux/videodev2.h + v4l2_ctrl_type_hdr10_cll_info = 0x0110, + v4l2_ctrl_type_hdr10_mastering_display = 0x0111, +
|
TV tuners, webcams, video capturers
|
1ad0de78e7944eef171340d9fa00f0a59458991c
|
stanimir varbanov hans verkuil hverkuil cisco xs all nl
|
include
|
uapi
|
linux, v4l2-core
|
media: docs: document cll and mastering display colorimetry controls
|
document content light level and mastering display v4l2 colorimetry controls.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
hdr10 static metadata
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['exceptions', 'rst']
| 3
| 81
| 0
|
--- diff --git a/documentation/userspace-api/media/v4l/ext-ctrls-colorimetry.rst b/documentation/userspace-api/media/v4l/ext-ctrls-colorimetry.rst --- a/documentation/userspace-api/media/v4l/ext-ctrls-colorimetry.rst +++ b/documentation/userspace-api/media/v4l/ext-ctrls-colorimetry.rst + +''v4l2_cid_colorimetry_hdr10_cll_info (struct)'' + the content light level defines upper bounds for the nominal target + brightness light level of the pictures. + +.. c:type:: v4l2_ctrl_hdr10_cll_info + +.. cssclass:: longtable + +.. flat-table:: struct v4l2_ctrl_hdr10_cll_info + :header-rows: 0 + :stub-columns: 0 + :widths: 1 1 2 + + * - __u16 + - ''max_content_light_level'' + - the upper bound for the maximum light level among all individual + samples for the pictures of a video sequence, cd/m\ :sup:'2'. + when equal to 0 no such upper bound is present. + * - __u16 + - ''max_pic_average_light_level'' + - the upper bound for the maximum average light level among the + samples for any individual picture of a video sequence, + cd/m\ :sup:'2'. when equal to 0 no such upper bound is present. + +''v4l2_cid_colorimetry_hdr10_mastering_display (struct)'' + the mastering display defines the color volume (the color primaries, + white point and luminance range) of a display considered to be the + mastering display for the current video content. + +.. c:type:: v4l2_ctrl_hdr10_mastering_display + +.. cssclass:: longtable + +.. flat-table:: struct v4l2_ctrl_hdr10_mastering_display + :header-rows: 0 + :stub-columns: 0 + :widths: 1 1 2 + + * - __u16 + - ''display_primaries_x[3]'' + - specifies the normalized x chromaticity coordinate of the color + primary component c of the mastering display in increments of 0.00002. + for describing the mastering display that uses red, green and blue + color primaries, index value c equal to 0 corresponds to the green + primary, c equal to 1 corresponds to blue primary and c equal to 2 + corresponds to the red color primary. + * - __u16 + - ''display_primaries_y[3]'' + - specifies the normalized y chromaticity coordinate of the color + primary component c of the mastering display in increments of 0.00002. + for describing the mastering display that uses red, green and blue + color primaries, index value c equal to 0 corresponds to the green + primary, c equal to 1 corresponds to blue primary and c equal to 2 + corresponds to red color primary. + * - __u16 + - ''white_point_x'' + - specifies the normalized x chromaticity coordinate of the white + point of the mastering display in increments of 0.00002. + * - __u16 + - ''white_point_y'' + - specifies the normalized y chromaticity coordinate of the white + point of the mastering display in increments of 0.00002. + * - __u32 + - ''max_luminance'' + - specifies the nominal maximum display luminance of the mastering + display in units of 0.0001 cd/m\ :sup:'2'. + * - __u32 + - ''min_luminance'' + - specifies the nominal minimum display luminance of the mastering + display in units of 0.0001 cd/m\ :sup:'2'. diff --git a/documentation/userspace-api/media/v4l/vidioc-g-ext-ctrls.rst b/documentation/userspace-api/media/v4l/vidioc-g-ext-ctrls.rst --- a/documentation/userspace-api/media/v4l/vidioc-g-ext-ctrls.rst +++ b/documentation/userspace-api/media/v4l/vidioc-g-ext-ctrls.rst - ''p_vp8_frame'' - a pointer to a struct :c:type:'v4l2_ctrl_vp8_frame'. valid if this control is + * - struct :c:type:'v4l2_ctrl_hdr10_cll_info' * + - ''p_hdr10_cll'' + - a pointer to a struct :c:type:'v4l2_ctrl_hdr10_cll_info'. valid if this control is + of type ''v4l2_ctrl_type_hdr10_cll_info''. + * - struct :c:type:'v4l2_ctrl_hdr10_mastering_display' * + - ''p_hdr10_mastering'' + - a pointer to a struct :c:type:'v4l2_ctrl_hdr10_mastering_display'. valid if this control is + of type ''v4l2_ctrl_type_hdr10_mastering_display''. - ''ptr'' - a pointer to a compound type which can be an n-dimensional array diff --git a/documentation/userspace-api/media/videodev2.h.rst.exceptions b/documentation/userspace-api/media/videodev2.h.rst.exceptions --- a/documentation/userspace-api/media/videodev2.h.rst.exceptions +++ b/documentation/userspace-api/media/videodev2.h.rst.exceptions +replace symbol v4l2_ctrl_type_hdr10_cll_info :c:type:'v4l2_ctrl_type' +replace symbol v4l2_ctrl_type_hdr10_mastering_display :c:type:'v4l2_ctrl_type'
|
TV tuners, webcams, video capturers
|
5f8beb7d1e1c504b476d157732e54414f138104e
|
stanimir varbanov hans verkuil hverkuil cisco xs all nl
|
documentation
|
userspace-api
|
media, v4l
|
media: venus: venc: add support for cll and mastering display controls
|
create cll and mastering display colour volume v4l2 controls for encoder, add handling of hdr10 pq sei packet payloads for v4.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
hdr10 static metadata
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['h', 'c']
| 5
| 74
| 1
|
--- diff --git a/drivers/media/platform/qcom/venus/core.h b/drivers/media/platform/qcom/venus/core.h --- a/drivers/media/platform/qcom/venus/core.h +++ b/drivers/media/platform/qcom/venus/core.h + struct v4l2_ctrl_hdr10_cll_info cll; + struct v4l2_ctrl_hdr10_mastering_display mastering; diff --git a/drivers/media/platform/qcom/venus/hfi_cmds.c b/drivers/media/platform/qcom/venus/hfi_cmds.c --- a/drivers/media/platform/qcom/venus/hfi_cmds.c +++ b/drivers/media/platform/qcom/venus/hfi_cmds.c + case hfi_property_param_venc_hdr10_pq_sei: { + struct hfi_hdr10_pq_sei *in = pdata, *hdr10 = prop_data; + + memcpy(hdr10, in, sizeof(*hdr10)); + pkt->shdr.hdr.size += sizeof(u32) + sizeof(*hdr10); + break; + } + diff --git a/drivers/media/platform/qcom/venus/hfi_helper.h b/drivers/media/platform/qcom/venus/hfi_helper.h --- a/drivers/media/platform/qcom/venus/hfi_helper.h +++ b/drivers/media/platform/qcom/venus/hfi_helper.h +#define hfi_property_param_venc_hdr10_pq_sei 0x2005036 +struct hfi_mastering_display_colour_sei_payload { + u32 display_primaries_x[3]; + u32 display_primaries_y[3]; + u32 white_point_x; + u32 white_point_y; + u32 max_display_mastering_luminance; + u32 min_display_mastering_luminance; +}; + +struct hfi_content_light_level_sei_payload { + u32 max_content_light; + u32 max_pic_average_light; +}; + +struct hfi_hdr10_pq_sei { + struct hfi_mastering_display_colour_sei_payload mastering; + struct hfi_content_light_level_sei_payload cll; +}; + diff --git a/drivers/media/platform/qcom/venus/venc.c b/drivers/media/platform/qcom/venus/venc.c --- a/drivers/media/platform/qcom/venus/venc.c +++ b/drivers/media/platform/qcom/venus/venc.c + if (inst->fmt_cap->pixfmt == v4l2_pix_fmt_hevc) { + struct hfi_hdr10_pq_sei hdr10; + unsigned int c; + + ptype = hfi_property_param_venc_hdr10_pq_sei; + + for (c = 0; c < 3; c++) { + hdr10.mastering.display_primaries_x[c] = + ctr->mastering.display_primaries_x[c]; + hdr10.mastering.display_primaries_y[c] = + ctr->mastering.display_primaries_y[c]; + } + + hdr10.mastering.white_point_x = ctr->mastering.white_point_x; + hdr10.mastering.white_point_y = ctr->mastering.white_point_y; + hdr10.mastering.max_display_mastering_luminance = + ctr->mastering.max_display_mastering_luminance; + hdr10.mastering.min_display_mastering_luminance = + ctr->mastering.min_display_mastering_luminance; + + hdr10.cll.max_content_light = ctr->cll.max_content_light_level; + hdr10.cll.max_pic_average_light = + ctr->cll.max_pic_average_light_level; + + ret = hfi_session_set_property(inst, ptype, &hdr10); + if (ret) + return ret; + } + diff --git a/drivers/media/platform/qcom/venus/venc_ctrls.c b/drivers/media/platform/qcom/venus/venc_ctrls.c --- a/drivers/media/platform/qcom/venus/venc_ctrls.c +++ b/drivers/media/platform/qcom/venus/venc_ctrls.c + case v4l2_cid_colorimetry_hdr10_cll_info: + ctr->cll = *ctrl->p_new.p_hdr10_cll; + break; + case v4l2_cid_colorimetry_hdr10_mastering_display: + ctr->mastering = *ctrl->p_new.p_hdr10_mastering; + break; - ret = v4l2_ctrl_handler_init(&inst->ctrl_handler, 55); + ret = v4l2_ctrl_handler_init(&inst->ctrl_handler, 57); + v4l2_ctrl_new_std_compound(&inst->ctrl_handler, &venc_ctrl_ops, + v4l2_cid_colorimetry_hdr10_cll_info, + v4l2_ctrl_ptr_create(null)); + + v4l2_ctrl_new_std_compound(&inst->ctrl_handler, &venc_ctrl_ops, + v4l2_cid_colorimetry_hdr10_mastering_display, + v4l2_ctrl_ptr_create(null)); +
|
TV tuners, webcams, video capturers
|
9172652d72f8e9a1f4d9f667dde0beec60bcde41
|
stanimir varbanov
|
drivers
|
media
|
platform, qcom, venus
|
media: em28xx: add pid for bulk revision of hauppauge 461e
|
manufacturing has switched from isoc to bulk transport, the pid has accordingly changed to signify this.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add pid for bulk revision of hauppauge 461e
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['em28xx']
|
['c']
| 1
| 2
| 0
|
--- diff --git a/drivers/media/usb/em28xx/em28xx-cards.c b/drivers/media/usb/em28xx/em28xx-cards.c --- a/drivers/media/usb/em28xx/em28xx-cards.c +++ b/drivers/media/usb/em28xx/em28xx-cards.c + { usb_device(0x2013, 0x8258), /* bulk transport 461e */ + .driver_info = em28178_board_pctv_461e },
|
TV tuners, webcams, video capturers
|
042c122f4a306869177debae751ef5592aef504d
|
brad love
|
drivers
|
media
|
em28xx, usb
|
media: em28xx: add pid for bulk revision of hauppauge 461ev2
|
manufacturing has switched from isoc to bulk transport, the pid has accordingly changed to signify this.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add pid for bulk revision of hauppauge 461ev2
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['em28xx']
|
['c']
| 1
| 2
| 0
|
--- diff --git a/drivers/media/usb/em28xx/em28xx-cards.c b/drivers/media/usb/em28xx/em28xx-cards.c --- a/drivers/media/usb/em28xx/em28xx-cards.c +++ b/drivers/media/usb/em28xx/em28xx-cards.c + { usb_device(0x2013, 0x8461), /* bulk transport 461e v2 */ + .driver_info = em28178_board_pctv_461e_v2 },
|
TV tuners, webcams, video capturers
|
e5f3b2f4f2377434dc9118db47191d2f72533ab9
|
brad love
|
drivers
|
media
|
em28xx, usb
|
media: rc: add keymap for xbox 360 universal media remote
|
captured using a raw ir receiver. manual linked in the remote definition itself.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add keymap for xbox 360 universal media remote
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['rc']
|
['yaml', 'h', 'c', 'makefile']
| 4
| 86
| 0
|
--- diff --git a/documentation/devicetree/bindings/media/rc.yaml b/documentation/devicetree/bindings/media/rc.yaml --- a/documentation/devicetree/bindings/media/rc.yaml +++ b/documentation/devicetree/bindings/media/rc.yaml - rc-winfast - rc-winfast-usbii-deluxe - rc-x96max + - rc-xbox-360 - rc-xbox-dvd - rc-zx-irdec diff --git a/drivers/media/rc/keymaps/makefile b/drivers/media/rc/keymaps/makefile --- a/drivers/media/rc/keymaps/makefile +++ b/drivers/media/rc/keymaps/makefile + rc-xbox-360.o \ diff --git a/drivers/media/rc/keymaps/rc-xbox-360.c b/drivers/media/rc/keymaps/rc-xbox-360.c --- /dev/null +++ b/drivers/media/rc/keymaps/rc-xbox-360.c +// spdx-license-identifier: gpl-2.0+ +// keytable for xbox 360 universal media remote +// copyright (c) 2021 bastien nocera <hadess@hadess.net> + +#include <media/rc-map.h> +#include <linux/module.h> + +/* + * manual for remote available at: + * http://download.microsoft.com/download/b/c/e/bce76f3f-db51-4c98-b79d-b3d21e90ccc1/universalmediaremote_na_0609.pdf + */ +static struct rc_map_table xbox_360[] = { + {key_ejectcd, 0x800f7428}, + {key_homepage, 0x800f7464}, + {key_power, 0x800f740c}, + {key_stop, 0x800f7419}, + {key_pause, 0x800f7418}, + {key_rewind, 0x800f7415}, + {key_fastforward, 0x800f7414}, + {key_previous, 0x800f741b}, + {key_next, 0x800f741a}, + {key_play, 0x800f7416}, + {key_props, 0x800f744f}, /* "display" */ + {key_back, 0x800f7423}, + {key_media_top_menu, 0x800f7424}, /* "dvd menu" */ + {key_root_menu, 0x800f7451}, /* "title" */ + {key_info, 0x800f740f}, + {key_up, 0x800f741e}, + {key_left, 0x800f7420}, + {key_right, 0x800f7421}, + {key_down, 0x800f741f}, + {key_ok, 0x800f7422}, + {key_yellow, 0x800f7426}, + {key_blue, 0x800f7468}, + {key_green, 0x800f7466}, + {key_red, 0x800f7425}, + {key_volumeup, 0x800f7410}, + {key_volumedown, 0x800f7411}, + /* tv key doesn't light the ir led */ + {key_mute, 0x800f740e}, + {key_channelup, 0x800f746c}, + {key_channeldown, 0x800f746d}, + {key_leftmeta, 0x800f740d}, + {key_enter, 0x800f740b}, + {key_record, 0x800f7417}, + {key_clear, 0x800f740a}, + {key_numeric_1, 0x800f7401}, + {key_numeric_2, 0x800f7402}, + {key_numeric_3, 0x800f7403}, + {key_numeric_4, 0x800f7404}, + {key_numeric_5, 0x800f7405}, + {key_numeric_6, 0x800f7406}, + {key_numeric_7, 0x800f7407}, + {key_numeric_8, 0x800f7408}, + {key_numeric_9, 0x800f7409}, + {key_numeric_0, 0x800f7400}, + {key_102nd, 0x800f741d}, /* "100" */ + {key_cancel, 0x800f741c}, +}; + +static struct rc_map_list xbox_360_map = { + .map = { + .scan = xbox_360, + .size = array_size(xbox_360), + .rc_proto = rc_proto_rc6_mce, + .name = rc_map_xbox_360, + } +}; + +static int __init init_rc_map(void) +{ + return rc_map_register(&xbox_360_map); +} + +static void __exit exit_rc_map(void) +{ + rc_map_unregister(&xbox_360_map); +} + +module_init(init_rc_map) +module_exit(exit_rc_map) + +module_license("gpl"); diff --git a/include/media/rc-map.h b/include/media/rc-map.h --- a/include/media/rc-map.h +++ b/include/media/rc-map.h +#define rc_map_xbox_360 "rc-xbox-360"
|
TV tuners, webcams, video capturers
|
34d5fc1e0da1698783efd227c6cc46f0f4124148
|
bastien nocera
|
include
|
media
|
bindings, keymaps, media, rc
|
media: rc: add keymaps for mecool-kii-pro/kiii-pro remotes
|
add keymaps and bindings for the simple ir (nec) remotes used with the mecool kii-pro and mecool kiii-pro android stb devices.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add keymaps for mecool-kii-pro/kiii-pro remotes
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['rc']
|
['yaml', 'h', 'c', 'makefile']
| 5
| 185
| 0
|
--- diff --git a/documentation/devicetree/bindings/media/rc.yaml b/documentation/devicetree/bindings/media/rc.yaml --- a/documentation/devicetree/bindings/media/rc.yaml +++ b/documentation/devicetree/bindings/media/rc.yaml - rc-leadtek-y04g0051 - rc-lme2510 - rc-manli + - rc-mecool-kii-pro + - rc-mecool-kiii-pro - rc-medion-x10 - rc-medion-x10-digitainer - rc-medion-x10-or2x diff --git a/drivers/media/rc/keymaps/makefile b/drivers/media/rc/keymaps/makefile --- a/drivers/media/rc/keymaps/makefile +++ b/drivers/media/rc/keymaps/makefile + rc-mecool-kii-pro.o \ + rc-mecool-kiii-pro.o \ diff --git a/drivers/media/rc/keymaps/rc-mecool-kii-pro.c b/drivers/media/rc/keymaps/rc-mecool-kii-pro.c --- /dev/null +++ b/drivers/media/rc/keymaps/rc-mecool-kii-pro.c +// spdx-license-identifier: gpl-2.0+ +// +// copyright (c) 2021 christian hewitt <christianshewitt@gmail.com> + +#include <media/rc-map.h> +#include <linux/module.h> + +// +// keytable for the mecool kii pro remote control +// + +static struct rc_map_table mecool_kii_pro[] = { + { 0x59, key_power }, + { 0x19, key_mute }, + + { 0x42, key_red }, + { 0x40, key_green }, + { 0x00, key_yellow}, + { 0x03, key_blue }, + + { 0x4a, key_rewind }, + { 0x48, key_forward }, + { 0x08, key_previoussong}, + { 0x0b, key_nextsong}, + + { 0x46, key_playpause }, + { 0x44, key_stop }, + { 0x1f, key_favorites}, + { 0x04, key_pvr }, + + { 0x4d, key_epg }, + { 0x02, key_info }, + { 0x09, key_subtitle }, + { 0x01, key_language }, // audio + + { 0x0d, key_home }, + { 0x11, key_tv }, + { 0x45, key_menu }, + { 0x05, key_exit }, + + { 0x5a, key_left }, + { 0x1b, key_right }, + { 0x06, key_up }, + { 0x16, key_down }, + { 0x1a, key_ok }, + + { 0x13, key_volumeup }, + { 0x17, key_volumedown }, + { 0x58, key_appselect }, // apps + { 0x12, key_context_menu }, // mouse + { 0x55, key_channelup }, // page_up + { 0x15, key_channeldown }, // page_down + + { 0x52, key_1 }, + { 0x50, key_2 }, + { 0x10, key_3 }, + { 0x56, key_4 }, + { 0x54, key_5 }, + { 0x14, key_6 }, + { 0x4e, key_7 }, + { 0x4c, key_8 }, + { 0x0c, key_9 }, + { 0x18, key_www }, + { 0x0f, key_0 }, + { 0x51, key_delete }, +}; + +static struct rc_map_list mecool_kii_pro_map = { + .map = { + .scan = mecool_kii_pro, + .size = array_size(mecool_kii_pro), + .rc_proto = rc_proto_nec, + .name = rc_map_mecool_kii_pro, + } +}; + +static int __init init_rc_map_mecool_kii_pro(void) +{ + return rc_map_register(&mecool_kii_pro_map); +} + +static void __exit exit_rc_map_mecool_kii_pro(void) +{ + rc_map_unregister(&mecool_kii_pro_map); +} + +module_init(init_rc_map_mecool_kii_pro) +module_exit(exit_rc_map_mecool_kii_pro) + +module_license("gpl"); +module_author("christian hewitt <christianshewitt@gmail.com"); diff --git a/drivers/media/rc/keymaps/rc-mecool-kiii-pro.c b/drivers/media/rc/keymaps/rc-mecool-kiii-pro.c --- /dev/null +++ b/drivers/media/rc/keymaps/rc-mecool-kiii-pro.c +// spdx-license-identifier: gpl-2.0+ +// +// copyright (c) 2021 christian hewitt <christianshewitt@gmail.com> + +#include <media/rc-map.h> +#include <linux/module.h> + +// +// keytable for the mecool kiii pro remote control +// + +static struct rc_map_table mecool_kiii_pro[] = { + { 0x59, key_power }, + + { 0x52, key_1 }, + { 0x50, key_2 }, + { 0x10, key_3 }, + { 0x56, key_4 }, + { 0x54, key_5 }, + { 0x14, key_6 }, + { 0x4e, key_7 }, + { 0x4c, key_8 }, + { 0x0c, key_9 }, + { 0x02, key_info }, + { 0x0f, key_0 }, + { 0x51, key_delete }, + { 0x1f, key_favorites}, + { 0x09, key_subtitle }, + { 0x01, key_language }, // audio + + { 0x42, key_red }, + { 0x40, key_green }, + { 0x00, key_yellow}, + { 0x03, key_blue }, // radio + + { 0x0d, key_home }, + { 0x4d, key_epg }, + { 0x45, key_menu }, + { 0x05, key_exit }, + + { 0x5a, key_left }, + { 0x1b, key_right }, + { 0x06, key_up }, + { 0x16, key_down }, + { 0x1a, key_ok }, + + { 0x13, key_volumeup }, + { 0x17, key_volumedown }, + { 0x19, key_mute }, + { 0x12, key_context_menu }, // mouse + { 0x55, key_channelup }, // page_up + { 0x15, key_channeldown }, // page_down + + { 0x4a, key_rewind }, + { 0x48, key_forward }, + { 0x46, key_playpause }, + { 0x44, key_stop }, + + { 0x08, key_previoussong}, + { 0x0b, key_nextsong}, + { 0x04, key_pvr }, + { 0x64, key_record }, +}; + +static struct rc_map_list mecool_kiii_pro_map = { + .map = { + .scan = mecool_kiii_pro, + .size = array_size(mecool_kiii_pro), + .rc_proto = rc_proto_nec, + .name = rc_map_mecool_kiii_pro, + } +}; + +static int __init init_rc_map_mecool_kiii_pro(void) +{ + return rc_map_register(&mecool_kiii_pro_map); +} + +static void __exit exit_rc_map_mecool_kiii_pro(void) +{ + rc_map_unregister(&mecool_kiii_pro_map); +} + +module_init(init_rc_map_mecool_kiii_pro) +module_exit(exit_rc_map_mecool_kiii_pro) + +module_license("gpl"); +module_author("christian hewitt <christianshewitt@gmail.com"); diff --git a/include/media/rc-map.h b/include/media/rc-map.h --- a/include/media/rc-map.h +++ b/include/media/rc-map.h +#define rc_map_mecool_kii_pro "rc-mecool-kii-pro" +#define rc_map_mecool_kiii_pro "rc-mecool-kiii-pro"
|
TV tuners, webcams, video capturers
|
3ddcea9f7da0d7df25e12c2f2e06082341fed4fb
|
christian hewitt drazen spio drazsp gmail com
|
include
|
media
|
bindings, keymaps, media, rc
|
media: rc: remove zte zx ir driver
|
the zte zx platform is getting removed, so this driver is no longer needed.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
remove zte zx ir driver
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['rc']
|
['txt', 'kconfig', 'c', 'makefile']
| 4
| 0
| 207
|
--- diff --git a/documentation/devicetree/bindings/media/zx-irdec.txt b/documentation/devicetree/bindings/media/zx-irdec.txt --- a/documentation/devicetree/bindings/media/zx-irdec.txt +++ /dev/null -ir decoder (irdec) on zte zx family socs - -required properties: - - compatible: should be "zte,zx296718-irdec". - - reg: physical base address and length of irdec registers. - - interrupts: interrupt number of irdec. - -exmaples: - - irdec: ir-decoder@111000 { - compatible = "zte,zx296718-irdec"; - reg = <0x111000 0x1000>; - interrupts = <gic_spi 111 irq_type_level_high>; - }; diff --git a/drivers/media/rc/kconfig b/drivers/media/rc/kconfig --- a/drivers/media/rc/kconfig +++ b/drivers/media/rc/kconfig -config ir_zx - tristate "zte zx ir remote control" - depends on rc_core - depends on arch_zx || compile_test - help - say y if you want to use the ir remote control available - on zte zx family socs. - - to compile this driver as a module, choose m here: the - module will be called zx-irdec. - diff --git a/drivers/media/rc/makefile b/drivers/media/rc/makefile --- a/drivers/media/rc/makefile +++ b/drivers/media/rc/makefile -obj-$(config_ir_zx) += zx-irdec.o diff --git a/drivers/media/rc/zx-irdec.c b/drivers/media/rc/zx-irdec.c --- a/drivers/media/rc/zx-irdec.c +++ /dev/null -// spdx-license-identifier: gpl-2.0-only -/* - * copyright (c) 2017 sanechips technology co., ltd. - * copyright 2017 linaro ltd. - */ - -#include <linux/device.h> -#include <linux/err.h> -#include <linux/interrupt.h> -#include <linux/io.h> -#include <linux/module.h> -#include <linux/of_platform.h> -#include <linux/platform_device.h> - -#include <media/rc-core.h> - -#define driver_name "zx-irdec" - -#define zx_ir_enable 0x04 -#define zx_iren bit(0) -#define zx_ir_ctrl 0x08 -#define zx_degl_mask genmask(21, 20) -#define zx_degl_value(x) (((x) << 20) & zx_degl_mask) -#define zx_wdbegin_mask genmask(18, 8) -#define zx_wdbegin_value(x) (((x) << 8) & zx_wdbegin_mask) -#define zx_ir_inten 0x10 -#define zx_ir_intstclr 0x14 -#define zx_ir_code 0x30 -#define zx_ir_cnum 0x34 -#define zx_necrpt bit(16) - -struct zx_irdec { - void __iomem *base; - struct rc_dev *rcd; -}; - -static void zx_irdec_set_mask(struct zx_irdec *irdec, unsigned int reg, - u32 mask, u32 value) -{ - u32 data; - - data = readl(irdec->base + reg); - data &= ~mask; - data |= value & mask; - writel(data, irdec->base + reg); -} - -static irqreturn_t zx_irdec_irq(int irq, void *dev_id) -{ - struct zx_irdec *irdec = dev_id; - u8 address, not_address; - u8 command, not_command; - u32 rawcode, scancode; - enum rc_proto rc_proto; - - /* clear interrupt */ - writel(1, irdec->base + zx_ir_intstclr); - - /* check repeat frame */ - if (readl(irdec->base + zx_ir_cnum) & zx_necrpt) { - rc_repeat(irdec->rcd); - goto done; - } - - rawcode = readl(irdec->base + zx_ir_code); - not_command = (rawcode >> 24) & 0xff; - command = (rawcode >> 16) & 0xff; - not_address = (rawcode >> 8) & 0xff; - address = rawcode & 0xff; - - scancode = ir_nec_bytes_to_scancode(address, not_address, - command, not_command, - &rc_proto); - rc_keydown(irdec->rcd, rc_proto, scancode, 0); - -done: - return irq_handled; -} - -static int zx_irdec_probe(struct platform_device *pdev) -{ - struct device *dev = &pdev->dev; - struct zx_irdec *irdec; - struct resource *res; - struct rc_dev *rcd; - int irq; - int ret; - - irdec = devm_kzalloc(dev, sizeof(*irdec), gfp_kernel); - if (!irdec) - return -enomem; - - res = platform_get_resource(pdev, ioresource_mem, 0); - irdec->base = devm_ioremap_resource(dev, res); - if (is_err(irdec->base)) - return ptr_err(irdec->base); - - irq = platform_get_irq(pdev, 0); - if (irq < 0) - return irq; - - rcd = devm_rc_allocate_device(dev, rc_driver_scancode); - if (!rcd) { - dev_err(dev, "failed to allocate rc device "); - return -enomem; - } - - irdec->rcd = rcd; - - rcd->priv = irdec; - rcd->input_phys = driver_name "/input0"; - rcd->input_id.bustype = bus_host; - rcd->map_name = rc_map_zx_irdec; - rcd->allowed_protocols = rc_proto_bit_nec | rc_proto_bit_necx | - rc_proto_bit_nec32; - rcd->driver_name = driver_name; - rcd->device_name = driver_name; - - platform_set_drvdata(pdev, irdec); - - ret = devm_rc_register_device(dev, rcd); - if (ret) { - dev_err(dev, "failed to register rc device "); - return ret; - } - - ret = devm_request_irq(dev, irq, zx_irdec_irq, 0, null, irdec); - if (ret) { - dev_err(dev, "failed to request irq "); - return ret; - } - - /* - * initialize deglitch level and watchdog counter beginner as - * recommended by vendor bsp code. - */ - zx_irdec_set_mask(irdec, zx_ir_ctrl, zx_degl_mask, zx_degl_value(0)); - zx_irdec_set_mask(irdec, zx_ir_ctrl, zx_wdbegin_mask, - zx_wdbegin_value(0x21c)); - - /* enable interrupt */ - writel(1, irdec->base + zx_ir_inten); - - /* enable the decoder */ - zx_irdec_set_mask(irdec, zx_ir_enable, zx_iren, zx_iren); - - return 0; -} - -static int zx_irdec_remove(struct platform_device *pdev) -{ - struct zx_irdec *irdec = platform_get_drvdata(pdev); - - /* disable the decoder */ - zx_irdec_set_mask(irdec, zx_ir_enable, zx_iren, 0); - - /* disable interrupt */ - writel(0, irdec->base + zx_ir_inten); - - return 0; -} - -static const struct of_device_id zx_irdec_match[] = { - { .compatible = "zte,zx296718-irdec" }, - { }, -}; -module_device_table(of, zx_irdec_match); - -static struct platform_driver zx_irdec_driver = { - .probe = zx_irdec_probe, - .remove = zx_irdec_remove, - .driver = { - .name = driver_name, - .of_match_table = zx_irdec_match, - }, -}; -module_platform_driver(zx_irdec_driver); - -module_description("zte zx ir remote control driver"); -module_author("shawn guo <shawn.guo@linaro.org>"); -module_license("gpl v2");
|
TV tuners, webcams, video capturers
|
799ddc03708550f655e362d0934d025b702c78c2
|
arnd bergmann
|
drivers
|
media
|
bindings, media, rc
|
media: ti-vpe: cal: implement media controller centric api
|
the cal driver is video node centric, it controls the whole device through the video device nodes. this limits the possible use cases as it can't support sources that are more complex than a single subdev. to support more complex hardware pipelines, implement support for the media controller centric api. the exposed api can be selected through a module parameter.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
implement media controller centric api
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['ti-vpe', 'cal']
|
['h', 'kconfig', 'c']
| 5
| 291
| 61
|
--- diff --git a/drivers/media/platform/kconfig b/drivers/media/platform/kconfig --- a/drivers/media/platform/kconfig +++ b/drivers/media/platform/kconfig +if video_ti_cal + +config video_ti_cal_mc + bool "media controller centric mode by default" + default n + help + enables media controller centric mode by default. + + if set, cal driver will start in media controller mode by + default. note that this behavior can be overridden via + module parameter 'mc_api'. + +endif # video_ti_cal + diff --git a/drivers/media/platform/ti-vpe/cal-camerarx.c b/drivers/media/platform/ti-vpe/cal-camerarx.c --- a/drivers/media/platform/ti-vpe/cal-camerarx.c +++ b/drivers/media/platform/ti-vpe/cal-camerarx.c + sd->flags = v4l2_subdev_fl_has_devnode; diff --git a/drivers/media/platform/ti-vpe/cal-video.c b/drivers/media/platform/ti-vpe/cal-video.c --- a/drivers/media/platform/ti-vpe/cal-video.c +++ b/drivers/media/platform/ti-vpe/cal-video.c - * v4l2 video ioctls + * v4l2 common ioctls + * ------------------------------------------------------------------ + */ + +static int cal_querycap(struct file *file, void *priv, + struct v4l2_capability *cap) +{ + struct cal_ctx *ctx = video_drvdata(file); + + strscpy(cap->driver, cal_module_name, sizeof(cap->driver)); + strscpy(cap->card, cal_module_name, sizeof(cap->card)); + + snprintf(cap->bus_info, sizeof(cap->bus_info), + "platform:%s", dev_name(ctx->cal->dev)); + return 0; +} + +static int cal_g_fmt_vid_cap(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct cal_ctx *ctx = video_drvdata(file); + + *f = ctx->v_fmt; + + return 0; +} + +/* ------------------------------------------------------------------ + * v4l2 video node centric ioctls -static int cal_querycap(struct file *file, void *priv, - struct v4l2_capability *cap) -{ - struct cal_ctx *ctx = video_drvdata(file); - - strscpy(cap->driver, cal_module_name, sizeof(cap->driver)); - strscpy(cap->card, cal_module_name, sizeof(cap->card)); - - snprintf(cap->bus_info, sizeof(cap->bus_info), - "platform:%s", dev_name(ctx->cal->dev)); - return 0; -} - -static int cal_g_fmt_vid_cap(struct file *file, void *priv, - struct v4l2_format *f) -{ - struct cal_ctx *ctx = video_drvdata(file); - - *f = ctx->v_fmt; - - return 0; -} - -static const struct v4l2_file_operations cal_fops = { - .owner = this_module, - .open = v4l2_fh_open, - .release = vb2_fop_release, - .poll = vb2_fop_poll, - .unlocked_ioctl = video_ioctl2, /* v4l2 ioctl handler */ - .mmap = vb2_fop_mmap, -}; - -static const struct v4l2_ioctl_ops cal_ioctl_ops = { +static const struct v4l2_ioctl_ops cal_ioctl_video_ops = { - * videobuf2 operations + * v4l2 media controller centric ioctls + * ------------------------------------------------------------------ + */ + +static int cal_mc_enum_fmt_vid_cap(struct file *file, void *priv, + struct v4l2_fmtdesc *f) +{ + if (f->index >= cal_num_formats) + return -einval; + + f->pixelformat = cal_formats[f->index].fourcc; + f->type = v4l2_buf_type_video_capture; + + return 0; +} + +static void cal_mc_try_fmt(struct cal_ctx *ctx, struct v4l2_format *f, + const struct cal_format_info **info) +{ + struct v4l2_pix_format *format = &f->fmt.pix; + const struct cal_format_info *fmtinfo; + unsigned int bpp; + + /* + * default to the first format if the requested pixel format code isn't + * supported. + */ + fmtinfo = cal_format_by_fourcc(f->fmt.pix.pixelformat); + if (!fmtinfo) + fmtinfo = &cal_formats[0]; + + /* + * clamp the size, update the pixel format. the field and colorspace are + * accepted as-is, except for v4l2_field_any that is turned into + * v4l2_field_none. + */ + bpp = align(fmtinfo->bpp, 8); + + format->width = clamp_t(unsigned int, format->width, + cal_min_width_bytes * 8 / bpp, + cal_max_width_bytes * 8 / bpp); + format->height = clamp_t(unsigned int, format->height, + cal_min_height_lines, cal_max_height_lines); + format->pixelformat = fmtinfo->fourcc; + + if (format->field == v4l2_field_any) + format->field = v4l2_field_none; + + /* + * calculate the number of bytes per line and the image size. the + * hardware stores the stride as a number of 16 bytes words, in a + * signed 15-bit value. only 14 bits are thus usable. + */ + format->bytesperline = align(clamp(format->bytesperline, + format->width * bpp / 8, + ((1u << 14) - 1) * 16), 16); + + format->sizeimage = format->height * format->bytesperline; + + format->colorspace = ctx->v_fmt.fmt.pix.colorspace; + + if (info) + *info = fmtinfo; + + ctx_dbg(3, ctx, "%s: %s %ux%u (bytesperline %u sizeimage %u) ", + __func__, fourcc_to_str(format->pixelformat), + format->width, format->height, + format->bytesperline, format->sizeimage); +} + +static int cal_mc_try_fmt_vid_cap(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct cal_ctx *ctx = video_drvdata(file); + + cal_mc_try_fmt(ctx, f, null); + return 0; +} + +static int cal_mc_s_fmt_vid_cap(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct cal_ctx *ctx = video_drvdata(file); + const struct cal_format_info *fmtinfo; + + if (vb2_is_busy(&ctx->vb_vidq)) { + ctx_dbg(3, ctx, "%s device busy ", __func__); + return -ebusy; + } + + cal_mc_try_fmt(ctx, f, &fmtinfo); + + ctx->v_fmt = *f; + ctx->fmtinfo = fmtinfo; + + return 0; +} + +static int cal_mc_enum_framesizes(struct file *file, void *fh, + struct v4l2_frmsizeenum *fsize) +{ + struct cal_ctx *ctx = video_drvdata(file); + const struct cal_format_info *fmtinfo; + unsigned int bpp; + + if (fsize->index > 0) + return -einval; + + fmtinfo = cal_format_by_fourcc(fsize->pixel_format); + if (!fmtinfo) { + ctx_dbg(3, ctx, "invalid pixel format 0x%08x ", + fsize->pixel_format); + return -einval; + } + + bpp = align(fmtinfo->bpp, 8); + + fsize->type = v4l2_frmsize_type_stepwise; + fsize->stepwise.min_width = cal_min_width_bytes * 8 / bpp; + fsize->stepwise.max_width = cal_max_width_bytes * 8 / bpp; + fsize->stepwise.step_width = 64 / bpp; + fsize->stepwise.min_height = cal_min_height_lines; + fsize->stepwise.max_height = cal_max_height_lines; + fsize->stepwise.step_height = 1; + + return 0; +} + +static const struct v4l2_ioctl_ops cal_ioctl_mc_ops = { + .vidioc_querycap = cal_querycap, + .vidioc_enum_fmt_vid_cap = cal_mc_enum_fmt_vid_cap, + .vidioc_g_fmt_vid_cap = cal_g_fmt_vid_cap, + .vidioc_try_fmt_vid_cap = cal_mc_try_fmt_vid_cap, + .vidioc_s_fmt_vid_cap = cal_mc_s_fmt_vid_cap, + .vidioc_enum_framesizes = cal_mc_enum_framesizes, + .vidioc_reqbufs = vb2_ioctl_reqbufs, + .vidioc_create_bufs = vb2_ioctl_create_bufs, + .vidioc_prepare_buf = vb2_ioctl_prepare_buf, + .vidioc_querybuf = vb2_ioctl_querybuf, + .vidioc_qbuf = vb2_ioctl_qbuf, + .vidioc_dqbuf = vb2_ioctl_dqbuf, + .vidioc_expbuf = vb2_ioctl_expbuf, + .vidioc_streamon = vb2_ioctl_streamon, + .vidioc_streamoff = vb2_ioctl_streamoff, + .vidioc_log_status = v4l2_ctrl_log_status, +}; + +/* ------------------------------------------------------------------ + * videobuf2 common operations +/* ------------------------------------------------------------------ + * videobuf2 operations + * ------------------------------------------------------------------ + */ + +static int cal_video_check_format(struct cal_ctx *ctx) +{ + const struct v4l2_mbus_framefmt *format; + + format = &ctx->phy->formats[cal_camerarx_pad_source]; + + if (ctx->fmtinfo->code != format->code || + ctx->v_fmt.fmt.pix.height != format->height || + ctx->v_fmt.fmt.pix.width != format->width || + ctx->v_fmt.fmt.pix.field != format->field) + return -epipe; + + return 0; +} + + ret = media_pipeline_start(&ctx->vdev.entity, &ctx->phy->pipe); + if (ret < 0) { + ctx_err(ctx, "failed to start media pipeline: %d ", ret); + goto error_release_buffers; + } + + /* + * verify that the currently configured format matches the output of + * the connected camerarx. + */ + ret = cal_video_check_format(ctx); + if (ret < 0) { + ctx_dbg(3, ctx, + "format mismatch between camerarx and video node "); + goto error_pipeline; + } + - goto err; + goto error_stop; -err: +error_stop: +error_pipeline: + media_pipeline_stop(&ctx->vdev.entity); +error_release_buffers: + + + media_pipeline_stop(&ctx->vdev.entity); -static const struct video_device cal_videodev = { - .name = cal_module_name, - .fops = &cal_fops, - .ioctl_ops = &cal_ioctl_ops, - .minor = -1, - .release = video_device_release_empty, - .device_caps = v4l2_cap_video_capture | v4l2_cap_streaming, +static const struct v4l2_file_operations cal_fops = { + .owner = this_module, + .open = v4l2_fh_open, + .release = vb2_fop_release, + .poll = vb2_fop_poll, + .unlocked_ioctl = video_ioctl2, /* v4l2 ioctl handler */ + .mmap = vb2_fop_mmap, - struct v4l2_ctrl_handler *hdl = &ctx->ctrl_handler; - ret = v4l2_ctrl_add_handler(hdl, ctx->phy->sensor->ctrl_handler, null, - true); - if (ret < 0) { - ctx_err(ctx, "failed to add sensor ctrl handler "); - return ret; + if (!cal_mc_api) { + struct v4l2_ctrl_handler *hdl = &ctx->ctrl_handler; + + ret = v4l2_ctrl_add_handler(hdl, ctx->phy->sensor->ctrl_handler, + null, true); + if (ret < 0) { + ctx_err(ctx, "failed to add sensor ctrl handler "); + return ret; + } - struct v4l2_ctrl_handler *hdl = &ctx->ctrl_handler; - *vfd = cal_videodev; + vfd->fops = &cal_fops; + vfd->device_caps = v4l2_cap_video_capture | v4l2_cap_streaming + | (cal_mc_api ? v4l2_cap_io_mc : 0); + vfd->release = video_device_release_empty; + vfd->ioctl_ops = cal_mc_api ? &cal_ioctl_mc_ops : &cal_ioctl_video_ops; - /* initialize the control handler. */ - ret = v4l2_ctrl_handler_init(hdl, 11); - if (ret < 0) { - ctx_err(ctx, "failed to init ctrl handler "); - goto error; - } + if (!cal_mc_api) { + /* initialize the control handler. */ + struct v4l2_ctrl_handler *hdl = &ctx->ctrl_handler; - vfd->ctrl_handler = hdl; + ret = v4l2_ctrl_handler_init(hdl, 11); + if (ret < 0) { + ctx_err(ctx, "failed to init ctrl handler "); + goto error; + } + + vfd->ctrl_handler = hdl; + } - v4l2_ctrl_handler_free(&ctx->ctrl_handler); + if (!cal_mc_api) + v4l2_ctrl_handler_free(&ctx->ctrl_handler); + diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c +#ifdef config_video_ti_cal_mc +#define cal_mc_api_default 1 +#else +#define cal_mc_api_default 0 +#endif + +bool cal_mc_api = cal_mc_api_default; +module_param_named(mc_api, cal_mc_api, bool, 0444); +module_parm_desc(mc_api, "activates the mc api"); + + int ret = 0; - return 0; + if (cal_mc_api) + ret = v4l2_device_register_subdev_nodes(&cal->v4l2_dev); + + return ret; diff --git a/drivers/media/platform/ti-vpe/cal.h b/drivers/media/platform/ti-vpe/cal.h --- a/drivers/media/platform/ti-vpe/cal.h +++ b/drivers/media/platform/ti-vpe/cal.h + struct media_pipeline pipe; +extern bool cal_mc_api;
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TV tuners, webcams, video capturers
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38e89e790fe27f131d7310f9020d577bf9d2527f
|
laurent pinchart
|
drivers
|
media
|
platform, ti-vpe
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media: uvcvideo: support devices that report an ot as an entity source
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some devices reference an output terminal as the source of extension units. this is incorrect, as output terminals only have an input pin, and thus can't be connected to any entity in the forward direction. the resulting topology would cause issues when registering the media controller graph. to avoid this problem, connect the extension unit to the source of the output terminal instead.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
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support devices that report an ot as an entity source
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['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['uvcvideo']
|
['c']
| 1
| 32
| 0
|
--- diff --git a/drivers/media/usb/uvc/uvc_driver.c b/drivers/media/usb/uvc/uvc_driver.c --- a/drivers/media/usb/uvc/uvc_driver.c +++ b/drivers/media/usb/uvc/uvc_driver.c + /* + * some devices reference an output terminal as the + * source of extension units. this is incorrect, as + * output terminals only have an input pin, and thus + * can't be connected to any entity in the forward + * direction. the resulting topology would cause issues + * when registering the media controller graph. to + * avoid this problem, connect the extension unit to + * the source of the output terminal instead. + */ + if (uvc_entity_is_oterm(entity)) { + struct uvc_entity *source; + + source = uvc_entity_by_id(chain->dev, + entity->basourceid[0]); + if (!source) { + uvc_dbg(chain->dev, descr, + "can't connect extension unit %u in chain ", + forward->id); + break; + } + + forward->basourceid[0] = source->id; + } + + if (uvc_entity_is_oterm(entity)) { + uvc_dbg(chain->dev, descr, + "unsupported connection between output terminals %u and %u ", + entity->id, forward->id); + break; + } +
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TV tuners, webcams, video capturers
|
4ca052b4ea621d0002a5e5feace51f60ad5e6b23
|
laurent pinchart
|
drivers
|
media
|
usb, uvc
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media: v4l2-ctrl: add controls for long term reference.
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long term reference (ltr) frames are the frames that are encoded sometime in the past and stored in the dpb buffer list to be used as reference to encode future frames. this change adds controls to enable this feature.
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this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add encoder ctrls for long term reference
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['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['h', 'c', 'rst']
| 3
| 35
| 0
|
--- diff --git a/documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/documentation/userspace-api/media/v4l/ext-ctrls-codec.rst --- a/documentation/userspace-api/media/v4l/ext-ctrls-codec.rst +++ b/documentation/userspace-api/media/v4l/ext-ctrls-codec.rst + +''v4l2_cid_mpeg_video_ltr_count (integer)'' + specifies the maximum number of long term reference (ltr) frames at any + given time that the encoder can keep. + this is applicable to the h264 and hevc encoders. + +''v4l2_cid_mpeg_video_frame_ltr_index (integer)'' + after setting this control the frame that will be queued next + will be marked as a long term reference (ltr) frame + and given this ltr index which ranges from 0 to ltr_count-1. + this is applicable to the h264 and hevc encoders. + source rec. itu-t h.264 (06/2019); table 7.9 + +''v4l2_cid_mpeg_video_use_ltr_frames (bitmask)'' + specifies the long term reference (ltr) frame(s) to be used for + encoding the next frame queued after setting this control. + this provides a bitmask which consists of bits [0, ltr_count-1]. + this is applicable to the h264 and hevc encoders. diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c --- a/drivers/media/v4l2-core/v4l2-ctrls.c +++ b/drivers/media/v4l2-core/v4l2-ctrls.c + case v4l2_cid_mpeg_video_ltr_count: return "ltr count"; + case v4l2_cid_mpeg_video_frame_ltr_index: return "frame ltr index"; + case v4l2_cid_mpeg_video_use_ltr_frames: return "use ltr frames"; + case v4l2_cid_mpeg_video_ltr_count: + *type = v4l2_ctrl_type_integer; + break; + case v4l2_cid_mpeg_video_frame_ltr_index: + *type = v4l2_ctrl_type_integer; + *flags |= v4l2_ctrl_flag_execute_on_write; + break; + case v4l2_cid_mpeg_video_use_ltr_frames: + *type = v4l2_ctrl_type_bitmask; + *flags |= v4l2_ctrl_flag_execute_on_write; + break; diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h --- a/include/uapi/linux/v4l2-controls.h +++ b/include/uapi/linux/v4l2-controls.h +#define v4l2_cid_mpeg_video_ltr_count (v4l2_cid_codec_base+232) +#define v4l2_cid_mpeg_video_frame_ltr_index (v4l2_cid_codec_base+233) +#define v4l2_cid_mpeg_video_use_ltr_frames (v4l2_cid_codec_base+234)
|
TV tuners, webcams, video capturers
|
f15c54cf3f684cd1a65f6ebc55ee9ada533ec6ef
|
dikshita agarwal hans verkuil hverkuil cisco xs all nl
|
documentation
|
userspace-api
|
linux, media, v4l, v4l2-core
|
media: venus: venc: add support for long term reference (ltr) controls
|
add support for below ltr controls in encoder: - v4l2_cid_mpeg_video_ltr_count - v4l2_cid_mpeg_video_frame_ltr_index - v4l2_cid_mpeg_video_use_ltr_frames
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
add encoder ctrls for long term reference
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['h', 'c']
| 3
| 57
| 1
|
- v4l2_cid_mpeg_video_ltr_count - v4l2_cid_mpeg_video_frame_ltr_index - v4l2_cid_mpeg_video_use_ltr_frames --- diff --git a/drivers/media/platform/qcom/venus/core.h b/drivers/media/platform/qcom/venus/core.h --- a/drivers/media/platform/qcom/venus/core.h +++ b/drivers/media/platform/qcom/venus/core.h + u32 ltr_count; diff --git a/drivers/media/platform/qcom/venus/venc.c b/drivers/media/platform/qcom/venus/venc.c --- a/drivers/media/platform/qcom/venus/venc.c +++ b/drivers/media/platform/qcom/venus/venc.c + struct hfi_ltr_mode ltr_mode; + ptype = hfi_property_param_venc_ltrmode; + ltr_mode.ltr_count = ctr->ltr_count; + ltr_mode.ltr_mode = hfi_ltr_mode_manual; + ltr_mode.trust_mode = 1; + ret = hfi_session_set_property(inst, ptype, <r_mode); + if (ret) + return ret; + diff --git a/drivers/media/platform/qcom/venus/venc_ctrls.c b/drivers/media/platform/qcom/venus/venc_ctrls.c --- a/drivers/media/platform/qcom/venus/venc_ctrls.c +++ b/drivers/media/platform/qcom/venus/venc_ctrls.c +#define max_ltr_frame_count 4 + struct hfi_ltr_use ltr_use; + struct hfi_ltr_mark ltr_mark; + case v4l2_cid_mpeg_video_ltr_count: + ctr->ltr_count = ctrl->val; + break; + case v4l2_cid_mpeg_video_frame_ltr_index: + mutex_lock(&inst->lock); + if (inst->streamon_out && inst->streamon_cap) { + ptype = hfi_property_config_venc_markltrframe; + ltr_mark.mark_frame = ctrl->val; + ret = hfi_session_set_property(inst, ptype, <r_mark); + if (ret) { + mutex_unlock(&inst->lock); + return ret; + } + } + mutex_unlock(&inst->lock); + break; + case v4l2_cid_mpeg_video_use_ltr_frames: + mutex_lock(&inst->lock); + if (inst->streamon_out && inst->streamon_cap) { + ptype = hfi_property_config_venc_useltrframe; + ltr_use.ref_ltr = ctrl->val; + ltr_use.use_constrnt = true; + ltr_use.frames = 0; + ret = hfi_session_set_property(inst, ptype, <r_use); + if (ret) { + mutex_unlock(&inst->lock); + return ret; + } + } + mutex_unlock(&inst->lock); + break; - ret = v4l2_ctrl_handler_init(&inst->ctrl_handler, 52); + ret = v4l2_ctrl_handler_init(&inst->ctrl_handler, 55); + v4l2_ctrl_new_std(&inst->ctrl_handler, &venc_ctrl_ops, + v4l2_cid_mpeg_video_use_ltr_frames, 0, + ((1 << max_ltr_frame_count) - 1), 0, 0); + + v4l2_ctrl_new_std(&inst->ctrl_handler, &venc_ctrl_ops, + v4l2_cid_mpeg_video_ltr_count, 0, + max_ltr_frame_count, 1, 0); + + v4l2_ctrl_new_std(&inst->ctrl_handler, &venc_ctrl_ops, + v4l2_cid_mpeg_video_frame_ltr_index, 0, + (max_ltr_frame_count - 1), 1, 0); +
|
TV tuners, webcams, video capturers
|
f2fb3f02abe2e66fefcc045767dd7d16e5730a45
|
dikshita agarwal
|
drivers
|
media
|
platform, qcom, venus
|
media: v4l2-ctrls: add control for aud generation
|
add a control to enable inserting of aud nalu into encoded bitstream.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
aud encoder control
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['h', 'c', 'rst']
| 3
| 8
| 0
|
--- diff --git a/documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/documentation/userspace-api/media/v4l/ext-ctrls-codec.rst --- a/documentation/userspace-api/media/v4l/ext-ctrls-codec.rst +++ b/documentation/userspace-api/media/v4l/ext-ctrls-codec.rst +''v4l2_cid_mpeg_video_au_delimiter (boolean)'' + if enabled then, aud (access unit delimiter) nalus will be generated. + that could be useful to find the start of a frame without having to + fully parse each nalu. applicable to the h264 and hevc encoders. + diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c --- a/drivers/media/v4l2-core/v4l2-ctrls.c +++ b/drivers/media/v4l2-core/v4l2-ctrls.c + case v4l2_cid_mpeg_video_au_delimiter: return "generate access unit delimiters"; + case v4l2_cid_mpeg_video_au_delimiter: diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h --- a/include/uapi/linux/v4l2-controls.h +++ b/include/uapi/linux/v4l2-controls.h +#define v4l2_cid_mpeg_video_au_delimiter (v4l2_cid_codec_base+231)
|
TV tuners, webcams, video capturers
|
f2bf1bcb191b15c0ac135af2651ebed6c017bcb0
|
stanimir varbanov hans verkuil hverkuil cisco xs all nl
|
documentation
|
userspace-api
|
linux, media, v4l, v4l2-core
|
media: venus: venc: add support for aud nalu control
|
add support for access unit delimiter control into encoder.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
aud encoder control
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['h', 'c']
| 3
| 22
| 1
|
--- diff --git a/drivers/media/platform/qcom/venus/core.h b/drivers/media/platform/qcom/venus/core.h --- a/drivers/media/platform/qcom/venus/core.h +++ b/drivers/media/platform/qcom/venus/core.h + bool aud_enable; diff --git a/drivers/media/platform/qcom/venus/venc.c b/drivers/media/platform/qcom/venus/venc.c --- a/drivers/media/platform/qcom/venus/venc.c +++ b/drivers/media/platform/qcom/venus/venc.c + if (inst->fmt_cap->pixfmt == v4l2_pix_fmt_h264 || + inst->fmt_cap->pixfmt == v4l2_pix_fmt_hevc) { + struct hfi_enable en = {}; + + ptype = hfi_property_param_venc_h264_generate_audnal; + + if (ctr->aud_enable) + en.enable = 1; + + ret = hfi_session_set_property(inst, ptype, &en); + if (ret) + return ret; + } + diff --git a/drivers/media/platform/qcom/venus/venc_ctrls.c b/drivers/media/platform/qcom/venus/venc_ctrls.c --- a/drivers/media/platform/qcom/venus/venc_ctrls.c +++ b/drivers/media/platform/qcom/venus/venc_ctrls.c + case v4l2_cid_mpeg_video_au_delimiter: + ctr->aud_enable = ctrl->val; + break; - ret = v4l2_ctrl_handler_init(&inst->ctrl_handler, 51); + ret = v4l2_ctrl_handler_init(&inst->ctrl_handler, 52); + v4l2_ctrl_new_std(&inst->ctrl_handler, &venc_ctrl_ops, + v4l2_cid_mpeg_video_au_delimiter, 0, 1, 1, 0); +
|
TV tuners, webcams, video capturers
|
08c06797627935d48621359eb95ab8a69d70d5c5
|
stanimir varbanov
|
drivers
|
media
|
platform, qcom, venus
|
media: venus: update v6 buffer descriptors
|
currently hfi_platform_v6.c adds a bunch of capability parameters. reviewing downstream we can see a number of these need to be updated.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
enable 6xx support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['venus']
|
['c']
| 1
| 69
| 69
|
--- diff --git a/drivers/media/platform/qcom/venus/hfi_platform_v6.c b/drivers/media/platform/qcom/venus/hfi_platform_v6.c --- a/drivers/media/platform/qcom/venus/hfi_platform_v6.c +++ b/drivers/media/platform/qcom/venus/hfi_platform_v6.c - .caps[0] = {hfi_capability_frame_width, 96, 5760, 1}, - .caps[1] = {hfi_capability_frame_height, 96, 5760, 1}, + .caps[0] = {hfi_capability_frame_width, 128, 8192, 1}, + .caps[1] = {hfi_capability_frame_height, 128, 8192, 1}, - .caps[2] = {hfi_capability_mbs_per_frame, 36, 64800, 1}, - .caps[3] = {hfi_capability_bitrate, 1, 200000000, 1}, + .caps[2] = {hfi_capability_mbs_per_frame, 64, 138240, 1}, + .caps[3] = {hfi_capability_bitrate, 1, 220000000, 1}, - .caps[6] = {hfi_capability_mbs_per_second, 36, 1958400, 1}, - .caps[7] = {hfi_capability_framerate, 1, 480, 1}, + .caps[6] = {hfi_capability_mbs_per_second, 64, 7833600, 1}, + .caps[7] = {hfi_capability_framerate, 1, 960, 1}, - .caps[0] = {hfi_capability_frame_width, 96, 4096, 1}, - .caps[1] = {hfi_capability_frame_height, 96, 4096, 1}, - .caps[2] = {hfi_capability_mbs_per_frame, 1, 36864, 1}, - .caps[3] = {hfi_capability_bitrate, 1, 120000000, 1}, - .caps[4] = {hfi_capability_scale_x, 4096, 65536, 1}, - .caps[5] = {hfi_capability_scale_y, 4096, 65536, 1}, - .caps[6] = {hfi_capability_mbs_per_second, 1, 2073600, 1}, - .caps[7] = {hfi_capability_framerate, 1, 480, 1}, - .caps[8] = {hfi_capability_max_videocores, 1, 2, 1}, + .caps[0] = {hfi_capability_frame_width, 128, 8192, 1}, + .caps[1] = {hfi_capability_frame_height, 128, 8192, 1}, + .caps[2] = {hfi_capability_mbs_per_frame, 64, 138240, 1}, + .caps[3] = {hfi_capability_bitrate, 1, 220000000, 1}, + .caps[4] = {hfi_capability_scale_x, 65536, 65536, 1}, + .caps[5] = {hfi_capability_scale_y, 65536, 65536, 1}, + .caps[6] = {hfi_capability_mbs_per_second, 64, 7833600, 1}, + .caps[7] = {hfi_capability_framerate, 1, 960, 1}, + .caps[8] = {hfi_capability_max_videocores, 0, 1, 1}, - .caps[0] = {hfi_capability_frame_width, 96, 4096, 1}, - .caps[1] = {hfi_capability_frame_height, 96, 4096, 1}, - .caps[2] = {hfi_capability_mbs_per_frame, 1, 36864, 1}, - .caps[3] = {hfi_capability_bitrate, 1, 120000000, 1}, - .caps[4] = {hfi_capability_scale_x, 4096, 65536, 1}, - .caps[5] = {hfi_capability_scale_y, 4096, 65536, 1}, - .caps[6] = {hfi_capability_mbs_per_second, 1, 2073600, 1}, - .caps[7] = {hfi_capability_framerate, 1, 480, 1}, - .caps[8] = {hfi_capability_max_videocores, 1, 2, 1}, + .caps[0] = {hfi_capability_frame_width, 128, 4096, 1}, + .caps[1] = {hfi_capability_frame_height, 128, 4096, 1}, + .caps[2] = {hfi_capability_mbs_per_frame, 64, 36864, 1}, + .caps[3] = {hfi_capability_bitrate, 1, 100000000, 1}, + .caps[4] = {hfi_capability_scale_x, 65536, 65536, 1}, + .caps[5] = {hfi_capability_scale_y, 65536, 65536, 1}, + .caps[6] = {hfi_capability_mbs_per_second, 64, 4423680, 1}, + .caps[7] = {hfi_capability_framerate, 1, 120, 1}, + .caps[8] = {hfi_capability_max_videocores, 0, 1, 1}, - .caps[0] = {hfi_capability_frame_width, 96, 4096, 1}, - .caps[1] = {hfi_capability_frame_height, 96, 4096, 1}, - .caps[2] = {hfi_capability_mbs_per_frame, 1, 36864, 1}, - .caps[3] = {hfi_capability_bitrate, 1, 120000000, 1}, - .caps[4] = {hfi_capability_scale_x, 4096, 65536, 1}, - .caps[5] = {hfi_capability_scale_y, 4096, 65536, 1}, - .caps[6] = {hfi_capability_mbs_per_second, 1, 2073600, 1}, - .caps[7] = {hfi_capability_framerate, 1, 480, 1}, - .caps[8] = {hfi_capability_max_videocores, 1, 2, 1}, + .caps[0] = {hfi_capability_frame_width, 128, 8192, 1}, + .caps[1] = {hfi_capability_frame_height, 128, 8192, 1}, + .caps[2] = {hfi_capability_mbs_per_frame, 64, 138240, 1}, + .caps[3] = {hfi_capability_bitrate, 1, 220000000, 1}, + .caps[4] = {hfi_capability_scale_x, 65536, 65536, 1}, + .caps[5] = {hfi_capability_scale_y, 65536, 65536, 1}, + .caps[6] = {hfi_capability_mbs_per_second, 64, 7833600, 1}, + .caps[7] = {hfi_capability_framerate, 1, 960, 1}, + .caps[8] = {hfi_capability_max_videocores, 0, 1, 1}, - .caps[0] = {hfi_capability_frame_width, 96, 1920, 1}, - .caps[1] = {hfi_capability_frame_height, 96, 1920, 1}, - .caps[2] = {hfi_capability_mbs_per_frame, 1, 8160, 1}, + .caps[0] = {hfi_capability_frame_width, 128, 1920, 1}, + .caps[1] = {hfi_capability_frame_height, 128, 1920, 1}, + .caps[2] = {hfi_capability_mbs_per_frame, 64, 8160, 1}, - .caps[4] = {hfi_capability_scale_x, 4096, 65536, 1}, - .caps[5] = {hfi_capability_scale_y, 4096, 65536, 1}, - .caps[6] = {hfi_capability_mbs_per_second, 1, 244800, 1}, + .caps[4] = {hfi_capability_scale_x, 65536, 65536, 1}, + .caps[5] = {hfi_capability_scale_y, 65536, 65536, 1}, + .caps[6] = {hfi_capability_mbs_per_second, 64, 7833600, 1}, - .caps[8] = {hfi_capability_max_videocores, 1, 2, 1}, + .caps[8] = {hfi_capability_max_videocores, 0, 1, 1}, - .caps[0] = {hfi_capability_frame_width, 96, 4096, 16}, - .caps[1] = {hfi_capability_frame_height, 96, 4096, 16}, - .caps[2] = {hfi_capability_mbs_per_frame, 1, 36864, 1}, - .caps[3] = {hfi_capability_bitrate, 1, 120000000, 1}, + .caps[0] = {hfi_capability_frame_width, 128, 8192, 1}, + .caps[1] = {hfi_capability_frame_height, 128, 8192, 1}, + .caps[2] = {hfi_capability_mbs_per_frame, 64, 138240, 1}, + .caps[3] = {hfi_capability_bitrate, 1, 220000000, 1}, - .caps[6] = {hfi_capability_mbs_per_second, 1, 1036800, 1}, - .caps[7] = {hfi_capability_framerate, 1, 480, 1}, - .caps[8] = {hfi_capability_max_videocores, 1, 3, 1}, + .caps[6] = {hfi_capability_mbs_per_second, 64, 7833600, 1}, + .caps[7] = {hfi_capability_framerate, 1, 960, 1}, + .caps[8] = {hfi_capability_max_videocores, 0, 1, 1}, - .caps[10] = {hfi_capability_hier_p_num_enh_layers, 0, 5, 1}, - .caps[11] = {hfi_capability_enc_ltr_count, 0, 4, 1}, + .caps[10] = {hfi_capability_hier_p_num_enh_layers, 0, 6, 1}, + .caps[11] = {hfi_capability_enc_ltr_count, 0, 2, 1}, - .caps[14] = {hfi_capability_hier_p_hybrid_num_enh_layers, 0, 5, 1}, + .caps[14] = {hfi_capability_hier_p_hybrid_num_enh_layers, 0, 6, 1}, - .caps[0] = {hfi_capability_frame_width, 96, 4096, 16}, - .caps[1] = {hfi_capability_frame_height, 96, 4096, 16}, - .caps[2] = {hfi_capability_mbs_per_frame, 1, 36864, 1}, - .caps[3] = {hfi_capability_bitrate, 1, 120000000, 1}, + .caps[0] = {hfi_capability_frame_width, 128, 8192, 16}, + .caps[1] = {hfi_capability_frame_height, 128, 8192, 16}, + .caps[2] = {hfi_capability_mbs_per_frame, 64, 138240, 1}, + .caps[3] = {hfi_capability_bitrate, 1, 160000000, 1}, - .caps[6] = {hfi_capability_mbs_per_second, 1, 1036800, 1}, - .caps[7] = {hfi_capability_framerate, 1, 480, 1}, - .caps[8] = {hfi_capability_max_videocores, 1, 3, 1}, + .caps[6] = {hfi_capability_mbs_per_second, 64, 7833600, 1}, + .caps[7] = {hfi_capability_framerate, 1, 960, 1}, + .caps[8] = {hfi_capability_max_videocores, 0, 1, 1}, - .caps[11] = {hfi_capability_enc_ltr_count, 0, 4, 1}, + .caps[11] = {hfi_capability_enc_ltr_count, 0, 2, 1}, - .caps[15] = {hfi_capability_i_frame_qp, 0, 63, 1}, - .caps[16] = {hfi_capability_p_frame_qp, 0, 63, 1}, - .caps[17] = {hfi_capability_b_frame_qp, 0, 63, 1}, + .caps[15] = {hfi_capability_i_frame_qp, 0, 51, 1}, + .caps[16] = {hfi_capability_p_frame_qp, 0, 51, 1}, + .caps[17] = {hfi_capability_b_frame_qp, 0, 51, 1}, - .caps[0] = {hfi_capability_frame_width, 96, 4096, 16}, - .caps[1] = {hfi_capability_frame_height, 96, 4096, 16}, - .caps[2] = {hfi_capability_mbs_per_frame, 1, 36864, 1}, - .caps[3] = {hfi_capability_bitrate, 1, 120000000, 1}, + .caps[0] = {hfi_capability_frame_width, 128, 4096, 16}, + .caps[1] = {hfi_capability_frame_height, 128, 4096, 16}, + .caps[2] = {hfi_capability_mbs_per_frame, 64, 36864, 1}, + .caps[3] = {hfi_capability_bitrate, 1, 74000000, 1}, - .caps[6] = {hfi_capability_mbs_per_second, 1, 1036800, 1}, - .caps[7] = {hfi_capability_framerate, 1, 240, 1}, - .caps[8] = {hfi_capability_max_videocores, 1, 3, 1}, + .caps[6] = {hfi_capability_mbs_per_second, 64, 4423680, 1}, + .caps[7] = {hfi_capability_framerate, 1, 120, 1}, + .caps[8] = {hfi_capability_max_videocores, 0, 1, 1}, - .caps[13] = {hfi_capability_bframe, 0, 1, 1}, + .caps[13] = {hfi_capability_bframe, 0, 0, 1},
|
TV tuners, webcams, video capturers
|
daba0a10c585b3736142d8f7ff81590b1ec1da7e
|
bryan o donoghue
|
drivers
|
media
|
platform, qcom, venus
|
media: venus: core,pm: add handling for resets
|
the venus driver has to control two reset signals related to gcc video_axi0 and videocc mvs0c for v6. add it.
|
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
|
enable 6xx support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
|
['venus']
|
['h', 'c']
| 2
| 64
| 0
|
--- diff --git a/drivers/media/platform/qcom/venus/core.h b/drivers/media/platform/qcom/venus/core.h --- a/drivers/media/platform/qcom/venus/core.h +++ b/drivers/media/platform/qcom/venus/core.h +#define vidc_resets_num_max 2 + const char * const resets[vidc_resets_num_max]; + unsigned int resets_num; + struct reset_control *resets[vidc_resets_num_max]; diff --git a/drivers/media/platform/qcom/venus/pm_helpers.c b/drivers/media/platform/qcom/venus/pm_helpers.c --- a/drivers/media/platform/qcom/venus/pm_helpers.c +++ b/drivers/media/platform/qcom/venus/pm_helpers.c +#include <linux/reset.h> +static int core_resets_reset(struct venus_core *core) +{ + const struct venus_resources *res = core->res; + unsigned char i; + int ret; + + if (!res->resets_num) + return 0; + + for (i = 0; i < res->resets_num; i++) { + ret = reset_control_assert(core->resets[i]); + if (ret) + goto err; + + usleep_range(150, 250); + ret = reset_control_deassert(core->resets[i]); + if (ret) + goto err; + } + +err: + return ret; +} + +static int core_resets_get(struct venus_core *core) +{ + struct device *dev = core->dev; + const struct venus_resources *res = core->res; + unsigned char i; + int ret; + + if (!res->resets_num) + return 0; + + for (i = 0; i < res->resets_num; i++) { + core->resets[i] = + devm_reset_control_get_exclusive(dev, res->resets[i]); + if (is_err(core->resets[i])) { + ret = ptr_err(core->resets[i]); + return ret; + } + } + + return 0; +} + + ret = core_resets_get(core); + if (ret) + return ret; + + ret = core_resets_reset(core); + if (ret) { + if (pmctrl) + pm_runtime_put_sync(pmctrl); + return ret; + } + + ret = core_resets_reset(core); +
|
TV tuners, webcams, video capturers
|
3bca43585e2216611c766c2108ac476b7dd9e3a8
|
stanimir varbanov
|
drivers
|
media
|
platform, qcom, venus
|
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