commit_title
stringlengths
13
124
commit_body
stringlengths
0
1.9k
release_summary
stringclasses
52 values
changes_summary
stringlengths
1
758
release_affected_domains
stringclasses
33 values
release_affected_drivers
stringclasses
51 values
domain_of_changes
stringlengths
2
571
language_set
stringclasses
983 values
diffstat_files
int64
1
300
diffstat_insertions
int64
0
309k
diffstat_deletions
int64
0
168k
commit_diff
stringlengths
92
23.4M
category
stringclasses
108 values
commit_hash
stringlengths
34
40
related_people
stringlengths
0
370
domain
stringclasses
21 values
subdomain
stringclasses
241 values
leaf_module
stringlengths
0
912
serial: 8250: add new 8250-core based broadcom stb driver
add a uart driver for the new broadcom 8250 based stb uart. the new uart is backward compatible with the standard 8250, but has some additional features. the new features include a high accuracy baud rate clock system and dma support.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add new 8250-core based broadcom stb driver
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['8250']
['kconfig', 'maintainers', 'c', 'makefile']
4
1,221
0
--- diff --git a/maintainers b/maintainers --- a/maintainers +++ b/maintainers +broadcom brcmstb uart driver +m: al cooper <alcooperx@gmail.com> +l: linux-serial@vger.kernel.org +l: bcm-kernel-feedback-list@broadcom.com +s: maintained +f: documentation/devicetree/bindings/serial/brcm,bcm7271-uart.yaml +f: drivers/tty/serial/8250/8250_bcm7271.c + diff --git a/drivers/tty/serial/8250/8250_bcm7271.c b/drivers/tty/serial/8250/8250_bcm7271.c --- /dev/null +++ b/drivers/tty/serial/8250/8250_bcm7271.c +// spdx-license-identifier: gpl-2.0-only +/* copyright (c) 2020, broadcom */ +/* + * 8250-core based driver for broadcom ns16550a uarts + * + * this driver uses the standard 8250 driver core but adds additional + * optional features including the ability to use a baud rate clock + * mux for more accurate high speed baud rate selection and also + * an optional dma engine. + * + */ + +#include <linux/module.h> +#include <linux/types.h> +#include <linux/tty.h> +#include <linux/errno.h> +#include <linux/device.h> +#include <linux/io.h> +#include <linux/of.h> +#include <linux/dma-mapping.h> +#include <linux/tty_flip.h> +#include <linux/delay.h> +#include <linux/clk.h> +#include <linux/debugfs.h> + +#include "8250.h" + +/* register definitions for uart dma block. version 1.1 or later. */ +#define udma_arb_rx 0x00 +#define udma_arb_tx 0x04 +#define udma_arb_req 0x00000001 +#define udma_arb_grant 0x00000002 + +#define udma_rx_revision 0x00 +#define udma_rx_revision_required 0x00000101 +#define udma_rx_ctrl 0x04 +#define udma_rx_ctrl_buf_close_mode 0x00010000 +#define udma_rx_ctrl_mask_wr_done 0x00008000 +#define udma_rx_ctrl_endian_override 0x00004000 +#define udma_rx_ctrl_endian 0x00002000 +#define udma_rx_ctrl_oe_is_err 0x00001000 +#define udma_rx_ctrl_pe_is_err 0x00000800 +#define udma_rx_ctrl_fe_is_err 0x00000400 +#define udma_rx_ctrl_num_buf_used_mask 0x000003c0 +#define udma_rx_ctrl_num_buf_used_shift 6 +#define udma_rx_ctrl_buf_close_clk_sel_sys 0x00000020 +#define udma_rx_ctrl_buf_close_ena 0x00000010 +#define udma_rx_ctrl_timeout_clk_sel_sys 0x00000008 +#define udma_rx_ctrl_timeout_ena 0x00000004 +#define udma_rx_ctrl_abort 0x00000002 +#define udma_rx_ctrl_ena 0x00000001 +#define udma_rx_status 0x08 +#define udma_rx_status_active_buf_mask 0x0000000f +#define udma_rx_transfer_len 0x0c +#define udma_rx_transfer_total 0x10 +#define udma_rx_buffer_size 0x14 +#define udma_rx_src_addr 0x18 +#define udma_rx_timeout 0x1c +#define udma_rx_buffer_close 0x20 +#define udma_rx_blockout_counter 0x24 +#define udma_rx_buf0_ptr_lo 0x28 +#define udma_rx_buf0_ptr_hi 0x2c +#define udma_rx_buf0_status 0x30 +#define udma_rx_bufx_status_overrun_err 0x00000010 +#define udma_rx_bufx_status_frame_err 0x00000008 +#define udma_rx_bufx_status_parity_err 0x00000004 +#define udma_rx_bufx_status_close_expired 0x00000002 +#define udma_rx_bufx_status_data_rdy 0x00000001 +#define udma_rx_buf0_data_len 0x34 +#define udma_rx_buf1_ptr_lo 0x38 +#define udma_rx_buf1_ptr_hi 0x3c +#define udma_rx_buf1_status 0x40 +#define udma_rx_buf1_data_len 0x44 + +#define udma_tx_revision 0x00 +#define udma_tx_revision_required 0x00000101 +#define udma_tx_ctrl 0x04 +#define udma_tx_ctrl_endian_override 0x00000080 +#define udma_tx_ctrl_endian 0x00000040 +#define udma_tx_ctrl_num_buf_used_mask 0x00000030 +#define udma_tx_ctrl_num_buf_used_1 0x00000010 +#define udma_tx_ctrl_abort 0x00000002 +#define udma_tx_ctrl_ena 0x00000001 +#define udma_tx_dst_addr 0x08 +#define udma_tx_blockout_counter 0x10 +#define udma_tx_transfer_len 0x14 +#define udma_tx_transfer_total 0x18 +#define udma_tx_status 0x20 +#define udma_tx_buf0_ptr_lo 0x24 +#define udma_tx_buf0_ptr_hi 0x28 +#define udma_tx_buf0_status 0x2c +#define udma_tx_bufx_last 0x00000002 +#define udma_tx_bufx_empty 0x00000001 +#define udma_tx_buf0_data_len 0x30 +#define udma_tx_buf0_data_sent 0x34 +#define udma_tx_buf1_ptr_lo 0x38 + +#define udma_intr_status 0x00 +#define udma_intr_arb_tx_grant 0x00040000 +#define udma_intr_arb_rx_grant 0x00020000 +#define udma_intr_tx_all_empty 0x00010000 +#define udma_intr_tx_empty_buf1 0x00008000 +#define udma_intr_tx_empty_buf0 0x00004000 +#define udma_intr_tx_abort 0x00002000 +#define udma_intr_tx_done 0x00001000 +#define udma_intr_rx_error 0x00000800 +#define udma_intr_rx_timeout 0x00000400 +#define udma_intr_rx_ready_buf7 0x00000200 +#define udma_intr_rx_ready_buf6 0x00000100 +#define udma_intr_rx_ready_buf5 0x00000080 +#define udma_intr_rx_ready_buf4 0x00000040 +#define udma_intr_rx_ready_buf3 0x00000020 +#define udma_intr_rx_ready_buf2 0x00000010 +#define udma_intr_rx_ready_buf1 0x00000008 +#define udma_intr_rx_ready_buf0 0x00000004 +#define udma_intr_rx_ready_mask 0x000003fc +#define udma_intr_rx_ready_shift 2 +#define udma_intr_rx_abort 0x00000002 +#define udma_intr_rx_done 0x00000001 +#define udma_intr_set 0x04 +#define udma_intr_clear 0x08 +#define udma_intr_mask_status 0x0c +#define udma_intr_mask_set 0x10 +#define udma_intr_mask_clear 0x14 + + +#define udma_rx_interrupts ( \ + udma_intr_rx_error | \ + udma_intr_rx_timeout | \ + udma_intr_rx_ready_buf0 | \ + udma_intr_rx_ready_buf1 | \ + udma_intr_rx_ready_buf2 | \ + udma_intr_rx_ready_buf3 | \ + udma_intr_rx_ready_buf4 | \ + udma_intr_rx_ready_buf5 | \ + udma_intr_rx_ready_buf6 | \ + udma_intr_rx_ready_buf7 | \ + udma_intr_rx_abort | \ + udma_intr_rx_done) + +#define udma_rx_err_interrupts ( \ + udma_intr_rx_error | \ + udma_intr_rx_timeout | \ + udma_intr_rx_abort | \ + udma_intr_rx_done) + +#define udma_tx_interrupts ( \ + udma_intr_tx_abort | \ + udma_intr_tx_done) + +#define udma_is_rx_interrupt(status) ((status) & udma_rx_interrupts) +#define udma_is_tx_interrupt(status) ((status) & udma_tx_interrupts) + + +/* current devices have 8 sets of rx buffer registers */ +#define udma_rx_bufs_count 8 +#define udma_rx_bufs_reg_offset (udma_rx_buf1_ptr_lo - udma_rx_buf0_ptr_lo) +#define udma_rx_bufx_ptr_lo(x) (udma_rx_buf0_ptr_lo + \ + ((x) * udma_rx_bufs_reg_offset)) +#define udma_rx_bufx_ptr_hi(x) (udma_rx_buf0_ptr_hi + \ + ((x) * udma_rx_bufs_reg_offset)) +#define udma_rx_bufx_status(x) (udma_rx_buf0_status + \ + ((x) * udma_rx_bufs_reg_offset)) +#define udma_rx_bufx_data_len(x) (udma_rx_buf0_data_len + \ + ((x) * udma_rx_bufs_reg_offset)) + +/* current devices have 2 sets of tx buffer registers */ +#define udma_tx_bufs_count 2 +#define udma_tx_bufs_reg_offset (udma_tx_buf1_ptr_lo - udma_tx_buf0_ptr_lo) +#define udma_tx_bufx_ptr_lo(x) (udma_tx_buf0_ptr_lo + \ + ((x) * udma_tx_bufs_reg_offset)) +#define udma_tx_bufx_ptr_hi(x) (udma_tx_buf0_ptr_hi + \ + ((x) * udma_tx_bufs_reg_offset)) +#define udma_tx_bufx_status(x) (udma_tx_buf0_status + \ + ((x) * udma_tx_bufs_reg_offset)) +#define udma_tx_bufx_data_len(x) (udma_tx_buf0_data_len + \ + ((x) * udma_tx_bufs_reg_offset)) +#define udma_tx_bufx_data_sent(x) (udma_tx_buf0_data_sent + \ + ((x) * udma_tx_bufs_reg_offset)) +#define regs_8250 0 +#define regs_dma_rx 1 +#define regs_dma_tx 2 +#define regs_dma_isr 3 +#define regs_dma_arb 4 +#define regs_max 5 + +#define tx_buf_size 4096 +#define rx_buf_size 4096 +#define rx_bufs_count 2 +#define khz 1000 +#define mhz(x) ((x) * khz * khz) + +static const u32 brcmstb_rate_table[] = { + mhz(81), + mhz(108), + mhz(64), /* actually 64285715 for some chips */ + mhz(48), +}; + +static const u32 brcmstb_rate_table_7278[] = { + mhz(81), + mhz(108), + 0, + mhz(48), +}; + +struct brcmuart_priv { + int line; + struct clk *baud_mux_clk; + unsigned long default_mux_rate; + u32 real_rates[array_size(brcmstb_rate_table)]; + const u32 *rate_table; + ktime_t char_wait; + struct uart_port *up; + struct hrtimer hrt; + bool shutdown; + bool dma_enabled; + struct uart_8250_dma dma; + void __iomem *regs[regs_max]; + dma_addr_t rx_addr; + void *rx_bufs; + size_t rx_size; + int rx_next_buf; + dma_addr_t tx_addr; + void *tx_buf; + size_t tx_size; + bool tx_running; + bool rx_running; + struct dentry *debugfs_dir; + + /* stats exposed through debugfs */ + u64 dma_rx_partial_buf; + u64 dma_rx_full_buf; + u32 rx_bad_timeout_late_char; + u32 rx_bad_timeout_no_char; + u32 rx_missing_close_timeout; + u32 rx_err; + u32 rx_timeout; + u32 rx_abort; +}; + +struct dentry *brcmuart_debugfs_root; + +/* + * register access routines + */ +static u32 udma_readl(struct brcmuart_priv *priv, + int reg_type, int offset) +{ + return readl(priv->regs[reg_type] + offset); +} + +static void udma_writel(struct brcmuart_priv *priv, + int reg_type, int offset, u32 value) +{ + writel(value, priv->regs[reg_type] + offset); +} + +static void udma_set(struct brcmuart_priv *priv, + int reg_type, int offset, u32 bits) +{ + void __iomem *reg = priv->regs[reg_type] + offset; + u32 value; + + value = readl(reg); + value |= bits; + writel(value, reg); +} + +static void udma_unset(struct brcmuart_priv *priv, + int reg_type, int offset, u32 bits) +{ + void __iomem *reg = priv->regs[reg_type] + offset; + u32 value; + + value = readl(reg); + value &= ~bits; + writel(value, reg); +} + +/* + * the uart dma engine hardware can be used by multiple uarts, but + * only one at a time. sharing is not currently supported so + * the first uart to request the dma engine will get it and any + * subsequent requests by other uarts will fail. + */ +static int brcmuart_arbitration(struct brcmuart_priv *priv, bool acquire) +{ + u32 rx_grant; + u32 tx_grant; + int waits; + int ret = 0; + + if (acquire) { + udma_set(priv, regs_dma_arb, udma_arb_rx, udma_arb_req); + udma_set(priv, regs_dma_arb, udma_arb_tx, udma_arb_req); + + waits = 1; + while (1) { + rx_grant = udma_readl(priv, regs_dma_arb, udma_arb_rx); + tx_grant = udma_readl(priv, regs_dma_arb, udma_arb_tx); + if (rx_grant & tx_grant & udma_arb_grant) + return 0; + if (waits-- == 0) + break; + msleep(1); + } + ret = 1; + } + + udma_unset(priv, regs_dma_arb, udma_arb_rx, udma_arb_req); + udma_unset(priv, regs_dma_arb, udma_arb_tx, udma_arb_req); + return ret; +} + +static void brcmuart_init_dma_hardware(struct brcmuart_priv *priv) +{ + u32 daddr; + u32 value; + int x; + + /* start with all interrupts disabled */ + udma_writel(priv, regs_dma_isr, udma_intr_mask_set, 0xffffffff); + + udma_writel(priv, regs_dma_rx, udma_rx_buffer_size, rx_buf_size); + + /* + * setup buffer close to happen when 32 character times have + * elapsed since the last character was received. + */ + udma_writel(priv, regs_dma_rx, udma_rx_buffer_close, 16*10*32); + value = (rx_bufs_count << udma_rx_ctrl_num_buf_used_shift) + | udma_rx_ctrl_buf_close_mode + | udma_rx_ctrl_buf_close_ena; + udma_writel(priv, regs_dma_rx, udma_rx_ctrl, value); + + udma_writel(priv, regs_dma_rx, udma_rx_blockout_counter, 0); + daddr = priv->rx_addr; + for (x = 0; x < rx_bufs_count; x++) { + + /* set rx transfer length to 0 for unknown */ + udma_writel(priv, regs_dma_rx, udma_rx_transfer_len, 0); + + udma_writel(priv, regs_dma_rx, udma_rx_bufx_ptr_lo(x), + lower_32_bits(daddr)); + udma_writel(priv, regs_dma_rx, udma_rx_bufx_ptr_hi(x), + upper_32_bits(daddr)); + daddr += rx_buf_size; + } + + daddr = priv->tx_addr; + udma_writel(priv, regs_dma_tx, udma_tx_bufx_ptr_lo(0), + lower_32_bits(daddr)); + udma_writel(priv, regs_dma_tx, udma_tx_bufx_ptr_hi(0), + upper_32_bits(daddr)); + udma_writel(priv, regs_dma_tx, udma_tx_ctrl, + udma_tx_ctrl_num_buf_used_1); + + /* clear all interrupts then enable them */ + udma_writel(priv, regs_dma_isr, udma_intr_clear, 0xffffffff); + udma_writel(priv, regs_dma_isr, udma_intr_mask_clear, + udma_rx_interrupts | udma_tx_interrupts); + +} + +static void start_rx_dma(struct uart_8250_port *p) +{ + struct brcmuart_priv *priv = p->port.private_data; + int x; + + udma_unset(priv, regs_dma_rx, udma_rx_ctrl, udma_rx_ctrl_ena); + + /* clear the rx ready bit for all buffers */ + for (x = 0; x < rx_bufs_count; x++) + udma_unset(priv, regs_dma_rx, udma_rx_bufx_status(x), + udma_rx_bufx_status_data_rdy); + + /* always start with buffer 0 */ + udma_unset(priv, regs_dma_rx, udma_rx_status, + udma_rx_status_active_buf_mask); + priv->rx_next_buf = 0; + + udma_set(priv, regs_dma_rx, udma_rx_ctrl, udma_rx_ctrl_ena); + priv->rx_running = true; +} + +static void stop_rx_dma(struct uart_8250_port *p) +{ + struct brcmuart_priv *priv = p->port.private_data; + + /* if rx is running, set the rx abort */ + if (priv->rx_running) + udma_set(priv, regs_dma_rx, udma_rx_ctrl, udma_rx_ctrl_abort); +} + +static int stop_tx_dma(struct uart_8250_port *p) +{ + struct brcmuart_priv *priv = p->port.private_data; + u32 value; + + /* if tx is running, set the tx abort */ + value = udma_readl(priv, regs_dma_tx, udma_tx_ctrl); + if (value & udma_tx_ctrl_ena) + udma_set(priv, regs_dma_tx, udma_tx_ctrl, udma_tx_ctrl_abort); + priv->tx_running = false; + return 0; +} + +/* + * note: printk's in this routine will hang the system if this is + * the console tty + */ +static int brcmuart_tx_dma(struct uart_8250_port *p) +{ + struct brcmuart_priv *priv = p->port.private_data; + struct circ_buf *xmit = &p->port.state->xmit; + u32 tx_size; + + if (uart_tx_stopped(&p->port) || priv->tx_running || + uart_circ_empty(xmit)) { + return 0; + } + tx_size = circ_cnt_to_end(xmit->head, xmit->tail, uart_xmit_size); + + priv->dma.tx_err = 0; + memcpy(priv->tx_buf, &xmit->buf[xmit->tail], tx_size); + xmit->tail += tx_size; + xmit->tail &= uart_xmit_size - 1; + p->port.icount.tx += tx_size; + + if (uart_circ_chars_pending(xmit) < wakeup_chars) + uart_write_wakeup(&p->port); + + udma_writel(priv, regs_dma_tx, udma_tx_transfer_len, tx_size); + udma_writel(priv, regs_dma_tx, udma_tx_buf0_data_len, tx_size); + udma_unset(priv, regs_dma_tx, udma_tx_buf0_status, udma_tx_bufx_empty); + udma_set(priv, regs_dma_tx, udma_tx_ctrl, udma_tx_ctrl_ena); + priv->tx_running = true; + + return 0; +} + +static void brcmuart_rx_buf_done_isr(struct uart_port *up, int index) +{ + struct brcmuart_priv *priv = up->private_data; + struct tty_port *tty_port = &up->state->port; + u32 status; + u32 length; + u32 copied; + + /* make sure we're still in sync with the hardware */ + status = udma_readl(priv, regs_dma_rx, udma_rx_bufx_status(index)); + length = udma_readl(priv, regs_dma_rx, udma_rx_bufx_data_len(index)); + + if ((status & udma_rx_bufx_status_data_rdy) == 0) { + dev_err(up->dev, "rx done interrupt but data_rdy not found "); + return; + } + if (status & (udma_rx_bufx_status_overrun_err | + udma_rx_bufx_status_frame_err | + udma_rx_bufx_status_parity_err)) { + if (status & udma_rx_bufx_status_overrun_err) { + up->icount.overrun++; + dev_warn(up->dev, "rx overrun error "); + } + if (status & udma_rx_bufx_status_frame_err) { + up->icount.frame++; + dev_warn(up->dev, "rx framing error "); + } + if (status & udma_rx_bufx_status_parity_err) { + up->icount.parity++; + dev_warn(up->dev, "rx parity error "); + } + } + copied = (u32)tty_insert_flip_string( + tty_port, + priv->rx_bufs + (index * rx_buf_size), + length); + if (copied != length) { + dev_warn(up->dev, "flip buffer overrun of %d bytes ", + length - copied); + up->icount.overrun += length - copied; + } + up->icount.rx += length; + if (status & udma_rx_bufx_status_close_expired) + priv->dma_rx_partial_buf++; + else if (length != rx_buf_size) + /* + * this is a bug in the controller that doesn't cause + * any problems but will be fixed in the future. + */ + priv->rx_missing_close_timeout++; + else + priv->dma_rx_full_buf++; + + tty_flip_buffer_push(tty_port); +} + +static void brcmuart_rx_isr(struct uart_port *up, u32 rx_isr) +{ + struct brcmuart_priv *priv = up->private_data; + struct device *dev = up->dev; + u32 rx_done_isr; + u32 check_isr; + + rx_done_isr = (rx_isr & udma_intr_rx_ready_mask); + while (rx_done_isr) { + check_isr = udma_intr_rx_ready_buf0 << priv->rx_next_buf; + if (check_isr & rx_done_isr) { + brcmuart_rx_buf_done_isr(up, priv->rx_next_buf); + } else { + dev_err(dev, + "rx buffer ready out of sequence, restarting rx dma "); + start_rx_dma(up_to_u8250p(up)); + break; + } + if (rx_isr & udma_rx_err_interrupts) { + if (rx_isr & udma_intr_rx_error) + priv->rx_err++; + if (rx_isr & udma_intr_rx_timeout) { + priv->rx_timeout++; + dev_err(dev, "rx timeout error "); + } + if (rx_isr & udma_intr_rx_abort) + priv->rx_abort++; + priv->rx_running = false; + } + /* if not abort, re-enable rx buffer */ + if (!(rx_isr & udma_intr_rx_abort)) + udma_unset(priv, regs_dma_rx, + udma_rx_bufx_status(priv->rx_next_buf), + udma_rx_bufx_status_data_rdy); + rx_done_isr &= ~check_isr; + priv->rx_next_buf++; + if (priv->rx_next_buf == rx_bufs_count) + priv->rx_next_buf = 0; + } +} + +static void brcmuart_tx_isr(struct uart_port *up, u32 isr) +{ + struct brcmuart_priv *priv = up->private_data; + struct device *dev = up->dev; + struct uart_8250_port *port_8250 = up_to_u8250p(up); + struct circ_buf *xmit = &port_8250->port.state->xmit; + + if (isr & udma_intr_tx_abort) { + if (priv->tx_running) + dev_err(dev, "unexpected tx_abort interrupt "); + return; + } + priv->tx_running = false; + if (!uart_circ_empty(xmit) && !uart_tx_stopped(up)) + brcmuart_tx_dma(port_8250); +} + +static irqreturn_t brcmuart_isr(int irq, void *dev_id) +{ + struct uart_port *up = dev_id; + struct device *dev = up->dev; + struct brcmuart_priv *priv = up->private_data; + unsigned long flags; + u32 interrupts; + u32 rval; + u32 tval; + + interrupts = udma_readl(priv, regs_dma_isr, udma_intr_status); + if (interrupts == 0) + return irq_none; + + spin_lock_irqsave(&up->lock, flags); + + /* clear all interrupts */ + udma_writel(priv, regs_dma_isr, udma_intr_clear, interrupts); + + rval = udma_is_rx_interrupt(interrupts); + if (rval) + brcmuart_rx_isr(up, rval); + tval = udma_is_tx_interrupt(interrupts); + if (tval) + brcmuart_tx_isr(up, tval); + if ((rval | tval) == 0) + dev_warn(dev, "spurious interrupt: 0x%x ", interrupts); + + spin_unlock_irqrestore(&up->lock, flags); + return irq_handled; +} + +static int brcmuart_startup(struct uart_port *port) +{ + int res; + struct uart_8250_port *up = up_to_u8250p(port); + struct brcmuart_priv *priv = up->port.private_data; + + priv->shutdown = false; + + /* + * prevent serial8250_do_startup() from allocating non-existent + * dma resources + */ + up->dma = null; + + res = serial8250_do_startup(port); + if (!priv->dma_enabled) + return res; + /* + * disable the receive data interrupt because the dma engine + * will handle this. + */ + up->ier &= ~uart_ier_rdi; + serial_port_out(port, uart_ier, up->ier); + + priv->tx_running = false; + priv->dma.rx_dma = null; + priv->dma.tx_dma = brcmuart_tx_dma; + up->dma = &priv->dma; + + brcmuart_init_dma_hardware(priv); + start_rx_dma(up); + return res; +} + +static void brcmuart_shutdown(struct uart_port *port) +{ + struct uart_8250_port *up = up_to_u8250p(port); + struct brcmuart_priv *priv = up->port.private_data; + unsigned long flags; + + spin_lock_irqsave(&port->lock, flags); + priv->shutdown = true; + if (priv->dma_enabled) { + stop_rx_dma(up); + stop_tx_dma(up); + /* disable all interrupts */ + udma_writel(priv, regs_dma_isr, udma_intr_mask_set, + udma_rx_interrupts | udma_tx_interrupts); + } + + /* + * prevent serial8250_do_shutdown() from trying to free + * dma resources that we never alloc'd for this driver. + */ + up->dma = null; + + spin_unlock_irqrestore(&port->lock, flags); + serial8250_do_shutdown(port); +} + +/* + * not all clocks run at the exact specified rate, so set each requested + * rate and then get the actual rate. + */ +static void init_real_clk_rates(struct device *dev, struct brcmuart_priv *priv) +{ + int x; + int rc; + + priv->default_mux_rate = clk_get_rate(priv->baud_mux_clk); + for (x = 0; x < array_size(priv->real_rates); x++) { + if (priv->rate_table[x] == 0) { + priv->real_rates[x] = 0; + continue; + } + rc = clk_set_rate(priv->baud_mux_clk, priv->rate_table[x]); + if (rc) { + dev_err(dev, "error selecting baud mux clock for %u ", + priv->rate_table[x]); + priv->real_rates[x] = priv->rate_table[x]; + } else { + priv->real_rates[x] = clk_get_rate(priv->baud_mux_clk); + } + } + clk_set_rate(priv->baud_mux_clk, priv->default_mux_rate); +} + +static void set_clock_mux(struct uart_port *up, struct brcmuart_priv *priv, + u32 baud) +{ + u32 percent; + u32 best_percent = uint_max; + u32 quot; + u32 best_quot = 1; + u32 rate; + int best_index = -1; + u64 hires_rate; + u64 hires_baud; + u64 hires_err; + int rc; + int i; + int real_baud; + + /* if the baud mux clock was not specified, just return */ + if (priv->baud_mux_clk == null) + return; + + /* find the closest match for specified baud */ + for (i = 0; i < array_size(priv->real_rates); i++) { + if (priv->real_rates[i] == 0) + continue; + rate = priv->real_rates[i] / 16; + quot = div_round_closest(rate, baud); + if (!quot) + continue; + + /* increase resolution to get xx.xx percent */ + hires_rate = (u64)rate * 10000; + hires_baud = (u64)baud * 10000; + + hires_err = div_u64(hires_rate, (u64)quot); + + /* get the delta */ + if (hires_err > hires_baud) + hires_err = (hires_err - hires_baud); + else + hires_err = (hires_baud - hires_err); + + percent = (unsigned long)div_round_closest_ull(hires_err, baud); + dev_dbg(up->dev, + "baud rate: %u, mux clk: %u, error: %u.%u%% ", + baud, priv->real_rates[i], percent / 100, + percent % 100); + if (percent < best_percent) { + best_percent = percent; + best_index = i; + best_quot = quot; + } + } + if (best_index == -1) { + dev_err(up->dev, "error, %d baud rate is too fast. ", baud); + return; + } + rate = priv->real_rates[best_index]; + rc = clk_set_rate(priv->baud_mux_clk, rate); + if (rc) + dev_err(up->dev, "error selecting baud mux clock "); + + /* error over 3 percent will cause data errors */ + if (best_percent > 300) + dev_err(up->dev, "error, baud: %d has %u.%u%% error ", + baud, percent / 100, percent % 100); + + real_baud = rate / 16 / best_quot; + dev_dbg(up->dev, "selecting baud mux rate: %u ", rate); + dev_dbg(up->dev, "requested baud: %u, actual baud: %u ", + baud, real_baud); + + /* calc nanoseconds for 1.5 characters time at the given baud rate */ + i = nsec_per_sec / real_baud / 10; + i += (i / 2); + priv->char_wait = ns_to_ktime(i); + + up->uartclk = rate; +} + +static void brcmstb_set_termios(struct uart_port *up, + struct ktermios *termios, + struct ktermios *old) +{ + struct uart_8250_port *p8250 = up_to_u8250p(up); + struct brcmuart_priv *priv = up->private_data; + + if (priv->dma_enabled) + stop_rx_dma(p8250); + set_clock_mux(up, priv, tty_termios_baud_rate(termios)); + serial8250_do_set_termios(up, termios, old); + if (p8250->mcr & uart_mcr_afe) + p8250->port.status |= upstat_autocts; + if (priv->dma_enabled) + start_rx_dma(p8250); +} + +static int brcmuart_handle_irq(struct uart_port *p) +{ + unsigned int iir = serial_port_in(p, uart_iir); + struct brcmuart_priv *priv = p->private_data; + struct uart_8250_port *up = up_to_u8250p(p); + unsigned int status; + unsigned long flags; + unsigned int ier; + unsigned int mcr; + int handled = 0; + + /* + * there's a bug in some 8250 cores where we get a timeout + * interrupt but there is no data ready. + */ + if (((iir & uart_iir_id) == uart_iir_rx_timeout) && !(priv->shutdown)) { + spin_lock_irqsave(&p->lock, flags); + status = serial_port_in(p, uart_lsr); + if ((status & uart_lsr_dr) == 0) { + + ier = serial_port_in(p, uart_ier); + /* + * if receive data interrupt is enabled and + * we're uing hardware flow control, deassert + * rts and wait for any chars in the pipline to + * arrive and then check for dr again. + */ + if ((ier & uart_ier_rdi) && (up->mcr & uart_mcr_afe)) { + ier &= ~(uart_ier_rlsi | uart_ier_rdi); + serial_port_out(p, uart_ier, ier); + mcr = serial_port_in(p, uart_mcr); + mcr &= ~uart_mcr_rts; + serial_port_out(p, uart_mcr, mcr); + hrtimer_start(&priv->hrt, priv->char_wait, + hrtimer_mode_rel); + } else { + serial_port_in(p, uart_rx); + } + + handled = 1; + } + spin_unlock_irqrestore(&p->lock, flags); + if (handled) + return 1; + } + return serial8250_handle_irq(p, iir); +} + +static enum hrtimer_restart brcmuart_hrtimer_func(struct hrtimer *t) +{ + struct brcmuart_priv *priv = container_of(t, struct brcmuart_priv, hrt); + struct uart_port *p = priv->up; + struct uart_8250_port *up = up_to_u8250p(p); + unsigned int status; + unsigned long flags; + + if (priv->shutdown) + return hrtimer_norestart; + + spin_lock_irqsave(&p->lock, flags); + status = serial_port_in(p, uart_lsr); + + /* + * if a character did not arrive after the timeout, clear the false + * receive timeout. + */ + if ((status & uart_lsr_dr) == 0) { + serial_port_in(p, uart_rx); + priv->rx_bad_timeout_no_char++; + } else { + priv->rx_bad_timeout_late_char++; + } + + /* re-enable receive unless upper layer has disabled it */ + if ((up->ier & (uart_ier_rlsi | uart_ier_rdi)) == + (uart_ier_rlsi | uart_ier_rdi)) { + status = serial_port_in(p, uart_ier); + status |= (uart_ier_rlsi | uart_ier_rdi); + serial_port_out(p, uart_ier, status); + status = serial_port_in(p, uart_mcr); + status |= uart_mcr_rts; + serial_port_out(p, uart_mcr, status); + } + spin_unlock_irqrestore(&p->lock, flags); + return hrtimer_norestart; +} + +static const struct of_device_id brcmuart_dt_ids[] = { + { + .compatible = "brcm,bcm7278-uart", + .data = brcmstb_rate_table_7278, + }, + { + .compatible = "brcm,bcm7271-uart", + .data = brcmstb_rate_table, + }, + {}, +}; + +module_device_table(of, brcmuart_dt_ids); + +static void brcmuart_free_bufs(struct device *dev, struct brcmuart_priv *priv) +{ + if (priv->rx_bufs) + dma_free_coherent(dev, priv->rx_size, priv->rx_bufs, + priv->rx_addr); + if (priv->tx_buf) + dma_free_coherent(dev, priv->tx_size, priv->tx_buf, + priv->tx_addr); +} + +static void brcmuart_throttle(struct uart_port *port) +{ + struct brcmuart_priv *priv = port->private_data; + + udma_writel(priv, regs_dma_isr, udma_intr_mask_set, udma_rx_interrupts); +} + +static void brcmuart_unthrottle(struct uart_port *port) +{ + struct brcmuart_priv *priv = port->private_data; + + udma_writel(priv, regs_dma_isr, udma_intr_mask_clear, + udma_rx_interrupts); +} + +static int debugfs_stats_show(struct seq_file *s, void *unused) +{ + struct brcmuart_priv *priv = s->private; + + seq_printf(s, "rx_err: %u ", + priv->rx_err); + seq_printf(s, "rx_timeout: %u ", + priv->rx_timeout); + seq_printf(s, "rx_abort: %u ", + priv->rx_abort); + seq_printf(s, "rx_bad_timeout_late_char: %u ", + priv->rx_bad_timeout_late_char); + seq_printf(s, "rx_bad_timeout_no_char: %u ", + priv->rx_bad_timeout_no_char); + seq_printf(s, "rx_missing_close_timeout: %u ", + priv->rx_missing_close_timeout); + if (priv->dma_enabled) { + seq_printf(s, "dma_rx_partial_buf: %llu ", + priv->dma_rx_partial_buf); + seq_printf(s, "dma_rx_full_buf: %llu ", + priv->dma_rx_full_buf); + } + return 0; +} +define_show_attribute(debugfs_stats); + +static void brcmuart_init_debugfs(struct brcmuart_priv *priv, + const char *device) +{ + priv->debugfs_dir = debugfs_create_dir(device, brcmuart_debugfs_root); + debugfs_create_file("stats", 0444, priv->debugfs_dir, priv, + &debugfs_stats_fops); +} + + +static int brcmuart_probe(struct platform_device *pdev) +{ + struct resource *regs; + struct device_node *np = pdev->dev.of_node; + const struct of_device_id *of_id = null; + struct uart_8250_port *new_port; + struct device *dev = &pdev->dev; + struct brcmuart_priv *priv; + struct clk *baud_mux_clk; + struct uart_8250_port up; + struct resource *irq; + void __iomem *membase = 0; + resource_size_t mapbase = 0; + u32 clk_rate = 0; + int ret; + int x; + int dma_irq; + static const char * const reg_names[regs_max] = { + "uart", "dma_rx", "dma_tx", "dma_intr2", "dma_arb" + }; + + irq = platform_get_resource(pdev, ioresource_irq, 0); + if (!irq) { + dev_err(dev, "missing irq "); + return -einval; + } + priv = devm_kzalloc(dev, sizeof(struct brcmuart_priv), + gfp_kernel); + if (!priv) + return -enomem; + + of_id = of_match_node(brcmuart_dt_ids, np); + if (!of_id || !of_id->data) + priv->rate_table = brcmstb_rate_table; + else + priv->rate_table = of_id->data; + + for (x = 0; x < regs_max; x++) { + regs = platform_get_resource_byname(pdev, ioresource_mem, + reg_names[x]); + if (!regs) + break; + priv->regs[x] = devm_ioremap(dev, regs->start, + resource_size(regs)); + if (is_err(priv->regs[x])) + return ptr_err(priv->regs[x]); + if (x == regs_8250) { + mapbase = regs->start; + membase = priv->regs[x]; + } + } + + /* we should have just the uart base registers or all the registers */ + if (x != 1 && x != regs_max) { + dev_warn(dev, "%s registers not specified ", reg_names[x]); + return -einval; + } + + /* if the dma registers were specified, try to enable dma */ + if (x > regs_dma_rx) { + if (brcmuart_arbitration(priv, 1) == 0) { + u32 txrev = 0; + u32 rxrev = 0; + + txrev = udma_readl(priv, regs_dma_rx, udma_rx_revision); + rxrev = udma_readl(priv, regs_dma_tx, udma_tx_revision); + if ((txrev >= udma_tx_revision_required) && + (rxrev >= udma_rx_revision_required)) { + + /* enable the use of the dma hardware */ + priv->dma_enabled = true; + } else { + brcmuart_arbitration(priv, 0); + dev_err(dev, + "unsupported dma hardware revision "); + } + } else { + dev_err(dev, + "timeout arbitrating for uart dma hardware "); + } + } + + of_property_read_u32(np, "clock-frequency", &clk_rate); + + /* see if a baud clock has been specified */ + baud_mux_clk = of_clk_get_by_name(np, "sw_baud"); + if (is_err(baud_mux_clk)) { + if (ptr_err(baud_mux_clk) == -eprobe_defer) + return -eprobe_defer; + dev_dbg(dev, "baud mux clock not specified "); + } else { + dev_dbg(dev, "baud mux clock found "); + ret = clk_prepare_enable(baud_mux_clk); + if (ret) + return ret; + priv->baud_mux_clk = baud_mux_clk; + init_real_clk_rates(dev, priv); + clk_rate = priv->default_mux_rate; + } + + if (clk_rate == 0) { + dev_err(dev, "clock-frequency or clk not defined "); + return -einval; + } + + dev_dbg(dev, "dma is %senabled ", priv->dma_enabled ? "" : "not "); + + memset(&up, 0, sizeof(up)); + up.port.type = port_16550a; + up.port.uartclk = clk_rate; + up.port.dev = dev; + up.port.mapbase = mapbase; + up.port.membase = membase; + up.port.irq = irq->start; + up.port.handle_irq = brcmuart_handle_irq; + up.port.regshift = 2; + up.port.iotype = of_device_is_big_endian(np) ? + upio_mem32be : upio_mem32; + up.port.flags = upf_share_irq | upf_boot_autoconf + | upf_fixed_port | upf_fixed_type; + up.port.dev = dev; + up.port.private_data = priv; + up.capabilities = uart_cap_fifo | uart_cap_afe; + up.port.fifosize = 32; + + /* check for a fixed line number */ + ret = of_alias_get_id(np, "serial"); + if (ret >= 0) + up.port.line = ret; + + /* setup hr timer */ + hrtimer_init(&priv->hrt, clock_monotonic, hrtimer_mode_abs); + priv->hrt.function = brcmuart_hrtimer_func; + + up.port.shutdown = brcmuart_shutdown; + up.port.startup = brcmuart_startup; + up.port.throttle = brcmuart_throttle; + up.port.unthrottle = brcmuart_unthrottle; + up.port.set_termios = brcmstb_set_termios; + + if (priv->dma_enabled) { + priv->rx_size = rx_buf_size * rx_bufs_count; + priv->rx_bufs = dma_alloc_coherent(dev, + priv->rx_size, + &priv->rx_addr, gfp_kernel); + if (!priv->rx_bufs) + goto err; + priv->tx_size = uart_xmit_size; + priv->tx_buf = dma_alloc_coherent(dev, + priv->tx_size, + &priv->tx_addr, gfp_kernel); + if (!priv->tx_buf) + goto err; + } + + ret = serial8250_register_8250_port(&up); + if (ret < 0) { + dev_err(dev, "unable to register 8250 port "); + goto err; + } + priv->line = ret; + new_port = serial8250_get_port(ret); + priv->up = &new_port->port; + if (priv->dma_enabled) { + dma_irq = platform_get_irq_byname(pdev, "dma"); + if (dma_irq < 0) { + dev_err(dev, "no irq resource info "); + goto err1; + } + ret = devm_request_irq(dev, dma_irq, brcmuart_isr, + irqf_shared, "uart dma irq", &new_port->port); + if (ret) { + dev_err(dev, "unable to register irq handler "); + goto err1; + } + } + platform_set_drvdata(pdev, priv); + brcmuart_init_debugfs(priv, dev_name(&pdev->dev)); + return 0; + +err1: + serial8250_unregister_port(priv->line); +err: + brcmuart_free_bufs(dev, priv); + brcmuart_arbitration(priv, 0); + return -enodev; +} + +static int brcmuart_remove(struct platform_device *pdev) +{ + struct brcmuart_priv *priv = platform_get_drvdata(pdev); + + debugfs_remove_recursive(priv->debugfs_dir); + hrtimer_cancel(&priv->hrt); + serial8250_unregister_port(priv->line); + brcmuart_free_bufs(&pdev->dev, priv); + brcmuart_arbitration(priv, 0); + return 0; +} + +static int __maybe_unused brcmuart_suspend(struct device *dev) +{ + struct brcmuart_priv *priv = dev_get_drvdata(dev); + + serial8250_suspend_port(priv->line); + clk_disable_unprepare(priv->baud_mux_clk); + + return 0; +} + +static int __maybe_unused brcmuart_resume(struct device *dev) +{ + struct brcmuart_priv *priv = dev_get_drvdata(dev); + int ret; + + ret = clk_prepare_enable(priv->baud_mux_clk); + if (ret) + dev_err(dev, "error enabling baud mux clock "); + + /* + * the hardware goes back to it's default after suspend + * so get the "clk" back in sync. + */ + ret = clk_set_rate(priv->baud_mux_clk, priv->default_mux_rate); + if (ret) + dev_err(dev, "error restoring default baud mux clock "); + if (priv->dma_enabled) { + if (brcmuart_arbitration(priv, 1)) { + dev_err(dev, "timeout arbitrating for dma hardware on resume "); + return(-ebusy); + } + brcmuart_init_dma_hardware(priv); + start_rx_dma(serial8250_get_port(priv->line)); + } + serial8250_resume_port(priv->line); + return 0; +} + +static const struct dev_pm_ops brcmuart_dev_pm_ops = { + set_system_sleep_pm_ops(brcmuart_suspend, brcmuart_resume) +}; + +static struct platform_driver brcmuart_platform_driver = { + .driver = { + .name = "bcm7271-uart", + .pm = &brcmuart_dev_pm_ops, + .of_match_table = brcmuart_dt_ids, + }, + .probe = brcmuart_probe, + .remove = brcmuart_remove, +}; + +static int __init brcmuart_init(void) +{ + brcmuart_debugfs_root = debugfs_create_dir( + brcmuart_platform_driver.driver.name, null); + return platform_driver_register(&brcmuart_platform_driver); +} +module_init(brcmuart_init); + +static void __exit brcmuart_deinit(void) +{ + platform_driver_unregister(&brcmuart_platform_driver); + debugfs_remove_recursive(brcmuart_debugfs_root); +} +module_exit(brcmuart_deinit); + +module_author("al cooper"); +module_description("broadcom ns16550a compatible serial port driver"); +module_license("gpl v2"); diff --git a/drivers/tty/serial/8250/kconfig b/drivers/tty/serial/8250/kconfig --- a/drivers/tty/serial/8250/kconfig +++ b/drivers/tty/serial/8250/kconfig +config serial_8250_bcm7271 + tristate "broadcom 8250 based serial port" + depends on serial_8250 && (arch_brcmstb || compile_test) + default arch_brcmstb + help + if you have a broadcom stb based board and want to use the + enhanced features of the broadcom 8250 based serial port, + including dma support and high accuracy baud rates, say + y to this option. if unsure, say n. + diff --git a/drivers/tty/serial/8250/makefile b/drivers/tty/serial/8250/makefile --- a/drivers/tty/serial/8250/makefile +++ b/drivers/tty/serial/8250/makefile +obj-$(config_serial_8250_bcm7271) += 8250_bcm7271.o
Serial
41a469482de257ea8db43cf74b6311bd055de030
al cooper
drivers
tty
8250, serial
serial: 8250_of: add nuvoton,wpcm450-uart
add a compatible string for the uart inside the nuvoton wpcm450 soc. it works the same as the uart in npcm750.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add nuvoton,wpcm450-uart
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['8250_of']
['c']
1
1
0
--- diff --git a/drivers/tty/serial/8250/8250_of.c b/drivers/tty/serial/8250/8250_of.c --- a/drivers/tty/serial/8250/8250_of.c +++ b/drivers/tty/serial/8250/8250_of.c + { .compatible = "nuvoton,wpcm450-uart", .data = (void *)port_npcm, },
Serial
8465df70e49c05f537607f81814c560ef37c8ca2
jonathan neusch fer
drivers
tty
8250, serial
serial: 8250_pci: add support for new hpe serial device
add support for new hpe serial device. it is msi enabled, but otherwise similar to legacy hp server serial devices.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for new hpe serial device
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['8250_pci']
['c']
1
18
0
--- diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c --- a/drivers/tty/serial/8250/8250_pci.c +++ b/drivers/tty/serial/8250/8250_pci.c +#define pci_device_id_hpe_pci_serial 0x37e + + { pci_device_sub(pci_vendor_id_hp_3par, pci_device_id_hpe_pci_serial, + pci_any_id, pci_any_id) }, + /* + * hpe pci serial device + */ + { + .vendor = pci_vendor_id_hp_3par, + .device = pci_device_id_hpe_pci_serial, + .subvendor = pci_any_id, + .subdevice = pci_any_id, + .setup = pci_hp_diva_setup, + }, + /* hpe pci serial device */ + { pci_vendor_id_hp_3par, pci_device_id_hpe_pci_serial, + pci_any_id, pci_any_id, 0, 0, + pbn_b1_1_115200 },
Serial
e0e24208792080135248f23fdf6d51aa2e04df05
randy wright jerry hoemann jerry hoemann hpe com
drivers
tty
8250, serial
serial: 8250_dw: add device hid for new amd uart controller
add device hid amdi0022 to the amd uart controller driver match table and create a platform device for it. this controller can be found on microsoft surface laptop 4 devices and seems similar enough that we can just copy the existing amdi0020 entries.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add device hid for new amd uart controller
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['8250_dw']
['c']
2
2
0
--- diff --git a/drivers/acpi/acpi_apd.c b/drivers/acpi/acpi_apd.c --- a/drivers/acpi/acpi_apd.c +++ b/drivers/acpi/acpi_apd.c + { "amdi0022", apd_addr(cz_uart_desc) }, diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c + { "amdi0022", 0 },
Serial
3c35d2a960c0077a4cb09bf4989f45d289332ea0
maximilian luz andy shevchenko andy shevchenko gmail com for dw part sachi king nakato nakato io
drivers
acpi
8250, serial
tty: serial: samsung_tty: add earlycon support for apple uarts
earlycon support is identical to s3c2410, but apple socs also need mmio mapped as ngnrne. this is handled generically for normal drivers including the normal uart path here, but earlycon uses fixmap and runs before that scaffolding is ready.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add earlycon support for apple uarts
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['serial', 'samsung_tty']
['c']
1
17
0
--- diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_tty.c --- a/drivers/tty/serial/samsung_tty.c +++ b/drivers/tty/serial/samsung_tty.c + +/* apple s5l */ +static int __init apple_s5l_early_console_setup(struct earlycon_device *device, + const char *opt) +{ + /* close enough to s3c2410 for earlycon... */ + device->port.private_data = &s3c2410_early_console_data; + +#ifdef config_arm64 + /* ... but we need to override the existing fixmap entry as ngnrne */ + __set_fixmap(fix_earlycon_mem_base, device->port.mapbase, + __pgprot(prot_device_ngnrne)); +#endif + return samsung_early_console_setup(device, opt); +} + +of_earlycon_declare(s5l, "apple,s5l-uart", apple_s5l_early_console_setup);
Serial
b89cfc05a275404bcfec83e2bdf8aea9a6c6e4bb
hector martin
drivers
tty
serial
tty: serial: samsung_tty: add support for apple uarts
apple socs are a distant descendant of samsung designs and use yet another variant of their uart style, with different interrupt handling.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for apple uarts
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['serial', 'samsung_tty']
['h', 'kconfig', 'c']
3
247
9
--- diff --git a/drivers/tty/serial/kconfig b/drivers/tty/serial/kconfig --- a/drivers/tty/serial/kconfig +++ b/drivers/tty/serial/kconfig - depends on plat_samsung || arch_s5pv210 || arch_exynos || compile_test + depends on plat_samsung || arch_s5pv210 || arch_exynos || arch_apple || compile_test diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_tty.c --- a/drivers/tty/serial/samsung_tty.c +++ b/drivers/tty/serial/samsung_tty.c + type_apple_s5l, +static void s3c24xx_serial_tx_chars(struct s3c24xx_uart_port *ourport); + + case type_apple_s5l: + s3c24xx_clear_bit(port, apple_s5l_ucon_txthresh_ena, s3c2410_ucon); + break; + case type_apple_s5l: + warn_on(1); // no dma + break; + case type_apple_s5l: + ucon |= apple_s5l_ucon_txthresh_ena_msk; + wr_regl(port, s3c2410_ucon, ucon); + break; + + /* + * the apple version only has edge triggered tx irqs, so we need + * to kick off the process by sending some characters here. + */ + if (ourport->info->type == type_apple_s5l) + s3c24xx_serial_tx_chars(ourport); + case type_apple_s5l: + s3c24xx_clear_bit(port, apple_s5l_ucon_rxthresh_ena, s3c2410_ucon); + s3c24xx_clear_bit(port, apple_s5l_ucon_rxto_ena, s3c2410_ucon); + break; - ucon &= ~(s3c64xx_ucon_timeout_mask | - s3c64xx_ucon_emptyint_en | - s3c64xx_ucon_dmasus_en | - s3c64xx_ucon_timeout_en | - s3c64xx_ucon_rxmode_mask); - ucon |= 0xf << s3c64xx_ucon_timeout_shift | - s3c64xx_ucon_timeout_en | - s3c64xx_ucon_rxmode_cpu; + ucon &= ~s3c64xx_ucon_rxmode_mask; + ucon |= s3c64xx_ucon_rxmode_cpu; + + /* apple types use these bits for irq masks */ + if (ourport->info->type != type_apple_s5l) { + ucon &= ~(s3c64xx_ucon_timeout_mask | + s3c64xx_ucon_emptyint_en | + s3c64xx_ucon_dmasus_en | + s3c64xx_ucon_timeout_en); + ucon |= 0xf << s3c64xx_ucon_timeout_shift | + s3c64xx_ucon_timeout_en; + } +/* interrupt handler for apple soc's.*/ +static irqreturn_t apple_serial_handle_irq(int irq, void *id) +{ + struct s3c24xx_uart_port *ourport = id; + struct uart_port *port = &ourport->port; + unsigned int pend = rd_regl(port, s3c2410_utrstat); + irqreturn_t ret = irq_none; + + if (pend & (apple_s5l_utrstat_rxthresh | apple_s5l_utrstat_rxto)) { + wr_regl(port, s3c2410_utrstat, + apple_s5l_utrstat_rxthresh | apple_s5l_utrstat_rxto); + ret = s3c24xx_serial_rx_irq(irq, id); + } + if (pend & apple_s5l_utrstat_txthresh) { + wr_regl(port, s3c2410_utrstat, apple_s5l_utrstat_txthresh); + ret = s3c24xx_serial_tx_irq(irq, id); + } + + return ret; +} + +static void apple_s5l_serial_shutdown(struct uart_port *port) +{ + struct s3c24xx_uart_port *ourport = to_ourport(port); + + unsigned int ucon; + + ucon = rd_regl(port, s3c2410_ucon); + ucon &= ~(apple_s5l_ucon_txthresh_ena_msk | + apple_s5l_ucon_rxthresh_ena_msk | + apple_s5l_ucon_rxto_ena_msk); + wr_regl(port, s3c2410_ucon, ucon); + + wr_regl(port, s3c2410_utrstat, apple_s5l_utrstat_all_flags); + + free_irq(port->irq, ourport); + + ourport->tx_enabled = 0; + ourport->tx_mode = 0; + ourport->rx_enabled = 0; + + if (ourport->dma) + s3c24xx_serial_release_dma(ourport); + + ourport->tx_in_progress = 0; +} + +static int apple_s5l_serial_startup(struct uart_port *port) +{ + struct s3c24xx_uart_port *ourport = to_ourport(port); + unsigned long flags; + unsigned int ufcon; + int ret; + + wr_regl(port, s3c2410_utrstat, apple_s5l_utrstat_all_flags); + + ret = request_irq(port->irq, apple_serial_handle_irq, 0, + s3c24xx_serial_portname(port), ourport); + if (ret) { + dev_err(port->dev, "cannot get irq %d ", port->irq); + return ret; + } + + /* for compatibility with s3c24xx soc's */ + ourport->rx_enabled = 1; + ourport->tx_enabled = 0; + + spin_lock_irqsave(&port->lock, flags); + + ufcon = rd_regl(port, s3c2410_ufcon); + ufcon |= s3c2410_ufcon_resetrx | s5pv210_ufcon_rxtrig8; + if (!uart_console(port)) + ufcon |= s3c2410_ufcon_resettx; + wr_regl(port, s3c2410_ufcon, ufcon); + + enable_rx_pio(ourport); + + spin_unlock_irqrestore(&port->lock, flags); + + /* enable rx interrupt */ + s3c24xx_set_bit(port, apple_s5l_ucon_rxthresh_ena, s3c2410_ucon); + s3c24xx_set_bit(port, apple_s5l_ucon_rxto_ena, s3c2410_ucon); + + return ret; +} + + case type_apple_s5l: + return "apple s5l"; +static const struct uart_ops apple_s5l_serial_ops = { + .pm = s3c24xx_serial_pm, + .tx_empty = s3c24xx_serial_tx_empty, + .get_mctrl = s3c24xx_serial_get_mctrl, + .set_mctrl = s3c24xx_serial_set_mctrl, + .stop_tx = s3c24xx_serial_stop_tx, + .start_tx = s3c24xx_serial_start_tx, + .stop_rx = s3c24xx_serial_stop_rx, + .break_ctl = s3c24xx_serial_break_ctl, + .startup = apple_s5l_serial_startup, + .shutdown = apple_s5l_serial_shutdown, + .set_termios = s3c24xx_serial_set_termios, + .type = s3c24xx_serial_type, + .config_port = s3c24xx_serial_config_port, + .verify_port = s3c24xx_serial_verify_port, +#if defined(config_serial_samsung_console) && defined(config_console_poll) + .poll_get_char = s3c24xx_serial_get_poll_char, + .poll_put_char = s3c24xx_serial_put_poll_char, +#endif +}; + + case type_apple_s5l: { + unsigned int ucon; + + ucon = rd_regl(port, s3c2410_ucon); + ucon &= ~(apple_s5l_ucon_txthresh_ena_msk | + apple_s5l_ucon_rxthresh_ena_msk | + apple_s5l_ucon_rxto_ena_msk); + wr_regl(port, s3c2410_ucon, ucon); + + wr_regl(port, s3c2410_utrstat, apple_s5l_utrstat_all_flags); + break; + } + case type_apple_s5l: + ourport->port.ops = &apple_s5l_serial_ops; + break; + case type_apple_s5l: { + unsigned int ucon; + int ret; + + ret = clk_prepare_enable(ourport->clk); + if (ret) { + dev_err(dev, "clk_enable clk failed: %d ", ret); + return ret; + } + if (!is_err(ourport->baudclk)) { + ret = clk_prepare_enable(ourport->baudclk); + if (ret) { + dev_err(dev, "clk_enable baudclk failed: %d ", ret); + clk_disable_unprepare(ourport->clk); + return ret; + } + } + + ucon = rd_regl(port, s3c2410_ucon); + + ucon &= ~(apple_s5l_ucon_txthresh_ena_msk | + apple_s5l_ucon_rxthresh_ena_msk | + apple_s5l_ucon_rxto_ena_msk); + + if (ourport->tx_enabled) + ucon |= apple_s5l_ucon_txthresh_ena_msk; + if (ourport->rx_enabled) + ucon |= apple_s5l_ucon_rxthresh_ena_msk | + apple_s5l_ucon_rxto_ena_msk; + + wr_regl(port, s3c2410_ucon, ucon); + + if (!is_err(ourport->baudclk)) + clk_disable_unprepare(ourport->baudclk); + clk_disable_unprepare(ourport->clk); + break; + } +#ifdef config_arch_apple +static struct s3c24xx_serial_drv_data s5l_serial_drv_data = { + .info = &(struct s3c24xx_uart_info) { + .name = "apple s5l uart", + .type = type_apple_s5l, + .port_type = port_8250, + .fifosize = 16, + .rx_fifomask = s3c2410_ufstat_rxmask, + .rx_fifoshift = s3c2410_ufstat_rxshift, + .rx_fifofull = s3c2410_ufstat_rxfull, + .tx_fifofull = s3c2410_ufstat_txfull, + .tx_fifomask = s3c2410_ufstat_txmask, + .tx_fifoshift = s3c2410_ufstat_txshift, + .def_clk_sel = s3c2410_ucon_clksel0, + .num_clks = 1, + .clksel_mask = 0, + .clksel_shift = 0, + }, + .def_cfg = &(struct s3c2410_uartcfg) { + .ucon = apple_s5l_ucon_default, + .ufcon = s3c2410_ufcon_default, + }, +}; +#define s5l_serial_drv_data ((kernel_ulong_t)&s5l_serial_drv_data) +#else +#define s5l_serial_drv_data ((kernel_ulong_t)null) +#endif + + }, { + .name = "s5l-uart", + .driver_data = s5l_serial_drv_data, + { .compatible = "apple,s5l-uart", + .data = (void *)s5l_serial_drv_data }, diff --git a/include/linux/serial_s3c.h b/include/linux/serial_s3c.h --- a/include/linux/serial_s3c.h +++ b/include/linux/serial_s3c.h +#define apple_s5l_ucon_rxto_ena 9 +#define apple_s5l_ucon_rxthresh_ena 12 +#define apple_s5l_ucon_txthresh_ena 13 +#define apple_s5l_ucon_rxto_ena_msk (1 << apple_s5l_ucon_rxto_ena) +#define apple_s5l_ucon_rxthresh_ena_msk (1 << apple_s5l_ucon_rxthresh_ena) +#define apple_s5l_ucon_txthresh_ena_msk (1 << apple_s5l_ucon_txthresh_ena) + +#define apple_s5l_ucon_default (s3c2410_ucon_txirqmode | \ + s3c2410_ucon_rxirqmode | \ + s3c2410_ucon_rxfifo_toi) + +#define apple_s5l_utrstat_rxthresh (1<<4) +#define apple_s5l_utrstat_txthresh (1<<5) +#define apple_s5l_utrstat_rxto (1<<9) +#define apple_s5l_utrstat_all_flags (0x3f0) +
Serial
fcbba344907afe26da487f1ed0b0e285c06a547b
hector martin
include
linux
serial
tty: cyclades, remove this orphan
the cyclades driver was orphaned by commit d459883e6c54 (maintainers: remove two dead e-mail) 13 years ago. noone stepped up to take care of them and to fix all the issues the driver has.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
cyclades, remove this orphan
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['c', 'h', 'ppc6xx_defconfig', 'kconfig', 'rst', 'txt', 'maintainers', 'makefile']
18
5
5,057
--- diff --git a/documentation/admin-guide/devices.txt b/documentation/admin-guide/devices.txt --- a/documentation/admin-guide/devices.txt +++ b/documentation/admin-guide/devices.txt - 19 char cyclades serial card - 0 = /dev/ttyc0 first cyclades port - ... - 31 = /dev/ttyc31 32nd cyclades port - - 20 char cyclades serial card - alternate devices - 0 = /dev/cub0 callout device for ttyc0 - ... - 31 = /dev/cub31 callout device for ttyc31 - diff --git a/documentation/driver-api/serial/cyclades_z.rst b/documentation/driver-api/serial/cyclades_z.rst --- a/documentation/driver-api/serial/cyclades_z.rst +++ /dev/null -================ -cyclades-z notes -================ - -the cyclades-z must have firmware loaded onto the card before it will -operate. this operation should be performed during system startup, - -the firmware, loader program and the latest device driver code are -available from cyclades at - - ftp://ftp.cyclades.com/pub/cyclades/cyclades-z/linux/ diff --git a/documentation/driver-api/serial/index.rst b/documentation/driver-api/serial/index.rst --- a/documentation/driver-api/serial/index.rst +++ b/documentation/driver-api/serial/index.rst - cyclades_z diff --git a/documentation/process/magic-number.rst b/documentation/process/magic-number.rst --- a/documentation/process/magic-number.rst +++ b/documentation/process/magic-number.rst -cyclades_magic 0x4359 cyclades_port ''include/linux/cyclades.h'' diff --git a/documentation/translations/it_it/process/magic-number.rst b/documentation/translations/it_it/process/magic-number.rst --- a/documentation/translations/it_it/process/magic-number.rst +++ b/documentation/translations/it_it/process/magic-number.rst -cyclades_magic 0x4359 cyclades_port ''include/linux/cyclades.h'' diff --git a/documentation/translations/zh_cn/process/magic-number.rst b/documentation/translations/zh_cn/process/magic-number.rst --- a/documentation/translations/zh_cn/process/magic-number.rst +++ b/documentation/translations/zh_cn/process/magic-number.rst -cyclades_magic 0x4359 cyclades_port ''include/linux/cyclades.h'' diff --git a/documentation/userspace-api/ioctl/ioctl-number.rst b/documentation/userspace-api/ioctl/ioctl-number.rst --- a/documentation/userspace-api/ioctl/ioctl-number.rst +++ b/documentation/userspace-api/ioctl/ioctl-number.rst -'y' all linux/cyclades.h diff --git a/maintainers b/maintainers --- a/maintainers +++ b/maintainers -cyclades async mux driver -s: orphan -w: http://www.cyclades.com/ -f: drivers/tty/cyclades.c -f: include/linux/cyclades.h -f: include/uapi/linux/cyclades.h - diff --git a/arch/powerpc/configs/ppc6xx_defconfig b/arch/powerpc/configs/ppc6xx_defconfig --- a/arch/powerpc/configs/ppc6xx_defconfig +++ b/arch/powerpc/configs/ppc6xx_defconfig -config_cyclades=m diff --git a/drivers/tty/kconfig b/drivers/tty/kconfig --- a/drivers/tty/kconfig +++ b/drivers/tty/kconfig - this includes intelligent serial boards such as cyclades, + this includes intelligent serial boards such as -config cyclades - tristate "cyclades async mux support" - depends on serial_nonstandard && (pci || isa) - select fw_loader - help - this driver supports cyclades z and y multiserial boards. - you would need something like this to connect more than two modems to - your linux box, for instance in order to become a dial-in server. - - for information about the cyclades-z card, read - <file:documentation/driver-api/serial/cyclades_z.rst>. - - to compile this driver as a module, choose m here: the - module will be called cyclades. - - if you haven't heard about it, it's safe to say n. - -config cyz_intr - bool "cyclades-z interrupt mode operation" - depends on cyclades && pci - help - the cyclades-z family of multiport cards allows 2 (two) driver op - modes: polling and interrupt. in polling mode, the driver will check - the status of the cyclades-z ports every certain amount of time - (which is called polling cycle and is configurable). in interrupt - mode, it will use an interrupt line (irq) in order to check the - status of the cyclades-z ports. the default op mode is polling. if - unsure, say n. - diff --git a/drivers/tty/makefile b/drivers/tty/makefile --- a/drivers/tty/makefile +++ b/drivers/tty/makefile -obj-$(config_cyclades) += cyclades.o diff --git a/drivers/tty/cyclades.c b/drivers/tty/cyclades.c --- a/drivers/tty/cyclades.c +++ /dev/null -// spdx-license-identifier: gpl-2.0 -#undef blockmove -#define z_wake -#undef z_ext_chars_in_buffer - -/* - * this file contains the driver for the cyclades async multiport - * serial boards. - * - * initially written by randolph bentson <bentson@grieg.seaslug.org>. - * modified and maintained by marcio saito <marcio@cyclades.com>. - * - * copyright (c) 2007-2009 jiri slaby <jirislaby@gmail.com> - * - * much of the design and some of the code came from serial.c - * which was copyright (c) 1991, 1992 linus torvalds. it was - * extensively rewritten by theodore ts'o, 8/16/92 -- 9/14/92, - * and then fixed as suggested by michael k. johnson 12/12/92. - * converted to pci probing and cleaned up by jiri slaby. - * - */ - -#define cy_version "2.6" - -/* if you need to install more boards than nr_cards, change the constant - in the definition below. no other change is necessary to support up to - eight boards. beyond that you'll have to extend cy_isa_addresses. */ - -#define nr_cards 4 - -/* - if the total number of ports is larger than nr_ports, change this - constant in the definition below. no other change is necessary to - support more boards/ports. */ - -#define nr_ports 256 - -#define zo_v1 0 -#define zo_v2 1 -#define ze_v1 2 - -#define serial_paranoia_check -#undef cy_debug_open -#undef cy_debug_throttle -#undef cy_debug_other -#undef cy_debug_io -#undef cy_debug_count -#undef cy_debug_dtr -#undef cy_debug_interrupts -#undef cy_16y_hack -#undef cy_enable_monitoring -#undef cy_pci_debug - -/* - * include section - */ -#include <linux/module.h> -#include <linux/errno.h> -#include <linux/signal.h> -#include <linux/sched.h> -#include <linux/timer.h> -#include <linux/interrupt.h> -#include <linux/tty.h> -#include <linux/tty_flip.h> -#include <linux/serial.h> -#include <linux/major.h> -#include <linux/string.h> -#include <linux/fcntl.h> -#include <linux/ptrace.h> -#include <linux/cyclades.h> -#include <linux/mm.h> -#include <linux/ioport.h> -#include <linux/init.h> -#include <linux/delay.h> -#include <linux/spinlock.h> -#include <linux/bitops.h> -#include <linux/firmware.h> -#include <linux/device.h> -#include <linux/slab.h> - -#include <linux/io.h> -#include <linux/uaccess.h> - -#include <linux/kernel.h> -#include <linux/pci.h> - -#include <linux/stat.h> -#include <linux/proc_fs.h> -#include <linux/seq_file.h> - -static void cy_send_xchar(struct tty_struct *tty, char ch); - -#ifndef serial_xmit_size -#define serial_xmit_size (min(page_size, 4096)) -#endif - -/* firmware stuff */ -#define zl_max_blocks 16 -#define driver_version 0x02010203 -#define ram_size 0x80000 - -enum zblock_type { - zblock_prg = 0, - zblock_fpga = 1 -}; - -struct zfile_header { - char name[64]; - char date[32]; - char aux[32]; - u32 n_config; - u32 config_offset; - u32 n_blocks; - u32 block_offset; - u32 reserved[9]; -} __attribute__ ((packed)); - -struct zfile_config { - char name[64]; - u32 mailbox; - u32 function; - u32 n_blocks; - u32 block_list[zl_max_blocks]; -} __attribute__ ((packed)); - -struct zfile_block { - u32 type; - u32 file_offset; - u32 ram_offset; - u32 size; -} __attribute__ ((packed)); - -static struct tty_driver *cy_serial_driver; - -#ifdef config_isa -/* this is the address lookup table. the driver will probe for - cyclom-y/isa boards at all addresses in here. if you want the - driver to probe addresses at a different address, add it to - this table. if the driver is probing some other board and - causing problems, remove the offending address from this table. -*/ - -static unsigned int cy_isa_addresses[] = { - 0xd0000, - 0xd2000, - 0xd4000, - 0xd6000, - 0xd8000, - 0xda000, - 0xdc000, - 0xde000, - 0, 0, 0, 0, 0, 0, 0, 0 -}; - -#define nr_isa_addrs array_size(cy_isa_addresses) - -static long maddr[nr_cards]; -static int irq[nr_cards]; - -module_param_hw_array(maddr, long, iomem, null, 0); -module_param_hw_array(irq, int, irq, null, 0); - -#endif /* config_isa */ - -/* this is the per-card data structure containing address, irq, number of - channels, etc. this driver supports a maximum of nr_cards cards. -*/ -static struct cyclades_card cy_card[nr_cards]; - -static int cy_next_channel; /* next minor available */ - -/* - * this is used to look up the divisor speeds and the timeouts - * we're normally limited to 15 distinct baud rates. the extra - * are accessed via settings in info->port.flags. - * 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, - * 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, - * hi vhi - * 20 - */ -static const int baud_table[] = { - 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, - 1800, 2400, 4800, 9600, 19200, 38400, 57600, 76800, 115200, 150000, - 230400, 0 -}; - -static const char baud_co_25[] = { /* 25 mhz clock option table */ - /* value => 00 01 02 03 04 */ - /* divide by 8 32 128 512 2048 */ - 0x00, 0x04, 0x04, 0x04, 0x04, 0x04, 0x03, 0x03, 0x03, 0x02, - 0x02, 0x02, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 -}; - -static const char baud_bpr_25[] = { /* 25 mhz baud rate period table */ - 0x00, 0xf5, 0xa3, 0x6f, 0x5c, 0x51, 0xf5, 0xa3, 0x51, 0xa3, - 0x6d, 0x51, 0xa3, 0x51, 0xa3, 0x51, 0x36, 0x29, 0x1b, 0x15 -}; - -static const char baud_co_60[] = { /* 60 mhz clock option table (cd1400 j) */ - /* value => 00 01 02 03 04 */ - /* divide by 8 32 128 512 2048 */ - 0x00, 0x00, 0x00, 0x04, 0x04, 0x04, 0x04, 0x04, 0x03, 0x03, - 0x03, 0x02, 0x02, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00 -}; - -static const char baud_bpr_60[] = { /* 60 mhz baud rate period table (cd1400 j) */ - 0x00, 0x82, 0x21, 0xff, 0xdb, 0xc3, 0x92, 0x62, 0xc3, 0x62, - 0x41, 0xc3, 0x62, 0xc3, 0x62, 0xc3, 0x82, 0x62, 0x41, 0x32, - 0x21 -}; - -static const char baud_cor3[] = { /* receive threshold */ - 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, - 0x0a, 0x0a, 0x0a, 0x09, 0x09, 0x08, 0x08, 0x08, 0x08, 0x07, - 0x07 -}; - -/* - * the cyclades driver implements hw flow control as any serial driver. - * the cyclades_port structure member rflow and the vector rflow_thr - * allows us to take advantage of a special feature in the cd1400 to avoid - * data loss even when the system interrupt latency is too high. these flags - * are to be used only with very special applications. setting these flags - * requires the use of a special cable (dtr and rts reversed). in the new - * cd1400-based boards (rev. 6.00 or later), there is no need for special - * cables. - */ - -static const char rflow_thr[] = { /* rflow threshold */ - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, - 0x0a -}; - -/* the cyclom-ye has placed the sequential chips in non-sequential - * address order. this look-up table overcomes that problem. - */ -static const unsigned int cy_chip_offset[] = { 0x0000, - 0x0400, - 0x0800, - 0x0c00, - 0x0200, - 0x0600, - 0x0a00, - 0x0e00 -}; - -/* pci related definitions */ - -#ifdef config_pci -static const struct pci_device_id cy_pci_dev_id[] = { - /* pci < 1mb */ - { pci_device(pci_vendor_id_cyclades, pci_device_id_cyclom_y_lo) }, - /* pci > 1mb */ - { pci_device(pci_vendor_id_cyclades, pci_device_id_cyclom_y_hi) }, - /* 4y pci < 1mb */ - { pci_device(pci_vendor_id_cyclades, pci_device_id_cyclom_4y_lo) }, - /* 4y pci > 1mb */ - { pci_device(pci_vendor_id_cyclades, pci_device_id_cyclom_4y_hi) }, - /* 8y pci < 1mb */ - { pci_device(pci_vendor_id_cyclades, pci_device_id_cyclom_8y_lo) }, - /* 8y pci > 1mb */ - { pci_device(pci_vendor_id_cyclades, pci_device_id_cyclom_8y_hi) }, - /* z pci < 1mb */ - { pci_device(pci_vendor_id_cyclades, pci_device_id_cyclom_z_lo) }, - /* z pci > 1mb */ - { pci_device(pci_vendor_id_cyclades, pci_device_id_cyclom_z_hi) }, - { } /* end of table */ -}; -module_device_table(pci, cy_pci_dev_id); -#endif - -static void cy_start(struct tty_struct *); -static void cy_set_line_char(struct cyclades_port *, struct tty_struct *); -static int cyz_issue_cmd(struct cyclades_card *, __u32, __u8, __u32); -#ifdef config_isa -static unsigned detect_isa_irq(void __iomem *); -#endif /* config_isa */ - -#ifndef config_cyz_intr -static void cyz_poll(struct timer_list *); - -/* the cyclades-z polling cycle is defined by this variable */ -static long cyz_polling_cycle = cz_def_poll; - -static define_timer(cyz_timerlist, cyz_poll); - -#else /* config_cyz_intr */ -static void cyz_rx_restart(struct timer_list *); -#endif /* config_cyz_intr */ - -static void cyy_writeb(struct cyclades_port *port, u32 reg, u8 val) -{ - struct cyclades_card *card = port->card; - - cy_writeb(port->u.cyy.base_addr + (reg << card->bus_index), val); -} - -static u8 cyy_readb(struct cyclades_port *port, u32 reg) -{ - struct cyclades_card *card = port->card; - - return readb(port->u.cyy.base_addr + (reg << card->bus_index)); -} - -static inline bool cy_is_z(struct cyclades_card *card) -{ - return card->num_chips == (unsigned int)-1; -} - -static inline bool __cyz_fpga_loaded(struct runtime_9060 __iomem *ctl_addr) -{ - return readl(&ctl_addr->init_ctrl) & (1 << 17); -} - -static inline bool cyz_fpga_loaded(struct cyclades_card *card) -{ - return __cyz_fpga_loaded(card->ctl_addr.p9060); -} - -static bool cyz_is_loaded(struct cyclades_card *card) -{ - struct firm_id __iomem *fw_id = card->base_addr + id_address; - - return (card->hw_ver == zo_v1 || cyz_fpga_loaded(card)) && - readl(&fw_id->signature) == zfirm_id; -} - -static int serial_paranoia_check(struct cyclades_port *info, - const char *name, const char *routine) -{ -#ifdef serial_paranoia_check - if (!info) { - printk(kern_warning "cyc warning: null cyclades_port for (%s) " - "in %s ", name, routine); - return 1; - } - - if (info->magic != cyclades_magic) { - printk(kern_warning "cyc warning: bad magic number for serial " - "struct (%s) in %s ", name, routine); - return 1; - } -#endif - return 0; -} - -/***********************************************************/ -/********* start of block of cyclom-y specific code ********/ - -/* this routine waits up to 1000 micro-seconds for the previous - command to the cirrus chip to complete and then issues the - new command. an error is returned if the previous command - didn't finish within the time limit. - - this function is only called from inside spinlock-protected code. - */ -static int __cyy_issue_cmd(void __iomem *base_addr, u8 cmd, int index) -{ - void __iomem *ccr = base_addr + (cyccr << index); - unsigned int i; - - /* check to see that the previous command has completed */ - for (i = 0; i < 100; i++) { - if (readb(ccr) == 0) - break; - udelay(10l); - } - /* if the ccr never cleared, the previous command - didn't finish within the "reasonable time" */ - if (i == 100) - return -1; - - /* issue the new command */ - cy_writeb(ccr, cmd); - - return 0; -} - -static inline int cyy_issue_cmd(struct cyclades_port *port, u8 cmd) -{ - return __cyy_issue_cmd(port->u.cyy.base_addr, cmd, - port->card->bus_index); -} - -#ifdef config_isa -/* isa interrupt detection code */ -static unsigned detect_isa_irq(void __iomem *address) -{ - int irq; - unsigned long irqs, flags; - int save_xir, save_car; - int index = 0; /* irq probing is only for isa */ - - /* forget possible initially masked and pending irq */ - irq = probe_irq_off(probe_irq_on()); - - /* clear interrupts on the board first */ - cy_writeb(address + (cy_clrintr << index), 0); - /* cy_clrintr is 0x1800 */ - - irqs = probe_irq_on(); - /* wait ... */ - msleep(5); - - /* enable the tx interrupts on the cd1400 */ - local_irq_save(flags); - cy_writeb(address + (cycar << index), 0); - __cyy_issue_cmd(address, cychan_ctl | cyenb_xmtr, index); - - cy_writeb(address + (cycar << index), 0); - cy_writeb(address + (cysrer << index), - readb(address + (cysrer << index)) | cytxrdy); - local_irq_restore(flags); - - /* wait ... */ - msleep(5); - - /* check which interrupt is in use */ - irq = probe_irq_off(irqs); - - /* clean up */ - save_xir = (u_char) readb(address + (cytir << index)); - save_car = readb(address + (cycar << index)); - cy_writeb(address + (cycar << index), (save_xir & 0x3)); - cy_writeb(address + (cysrer << index), - readb(address + (cysrer << index)) & ~cytxrdy); - cy_writeb(address + (cytir << index), (save_xir & 0x3f)); - cy_writeb(address + (cycar << index), (save_car)); - cy_writeb(address + (cy_clrintr << index), 0); - /* cy_clrintr is 0x1800 */ - - return (irq > 0) ? irq : 0; -} -#endif /* config_isa */ - -static void cyy_chip_rx(struct cyclades_card *cinfo, int chip, - void __iomem *base_addr) -{ - struct cyclades_port *info; - struct tty_port *port; - int len, index = cinfo->bus_index; - u8 ivr, save_xir, channel, save_car, data, char_count; - -#ifdef cy_debug_interrupts - printk(kern_debug "cyy_interrupt: rcvd intr, chip %d ", chip); -#endif - /* determine the channel & change to that context */ - save_xir = readb(base_addr + (cyrir << index)); - channel = save_xir & cyirchannel; - info = &cinfo->ports[channel + chip * 4]; - port = &info->port; - save_car = cyy_readb(info, cycar); - cyy_writeb(info, cycar, save_xir); - ivr = cyy_readb(info, cyrivr) & cyivrmask; - - /* there is an open port for this data */ - if (ivr == cyivrrxex) { /* exception */ - data = cyy_readb(info, cyrdsr); - - /* for statistics only */ - if (data & cybreak) - info->icount.brk++; - else if (data & cyframe) - info->icount.frame++; - else if (data & cyparity) - info->icount.parity++; - else if (data & cyoverrun) - info->icount.overrun++; - - if (data & info->ignore_status_mask) { - info->icount.rx++; - return; - } - if (tty_buffer_request_room(port, 1)) { - if (data & info->read_status_mask) { - if (data & cybreak) { - tty_insert_flip_char(port, - cyy_readb(info, cyrdsr), - tty_break); - info->icount.rx++; - if (port->flags & async_sak) { - struct tty_struct *tty = - tty_port_tty_get(port); - if (tty) { - do_sak(tty); - tty_kref_put(tty); - } - } - } else if (data & cyframe) { - tty_insert_flip_char(port, - cyy_readb(info, cyrdsr), - tty_frame); - info->icount.rx++; - info->idle_stats.frame_errs++; - } else if (data & cyparity) { - /* pieces of seven... */ - tty_insert_flip_char(port, - cyy_readb(info, cyrdsr), - tty_parity); - info->icount.rx++; - info->idle_stats.parity_errs++; - } else if (data & cyoverrun) { - tty_insert_flip_char(port, 0, - tty_overrun); - info->icount.rx++; - /* if the flip buffer itself is - overflowing, we still lose - the next incoming character. - */ - tty_insert_flip_char(port, - cyy_readb(info, cyrdsr), - tty_frame); - info->icount.rx++; - info->idle_stats.overruns++; - /* these two conditions may imply */ - /* a normal read should be done. */ - /* } else if(data & cytimeout) { */ - /* } else if(data & cyspechar) { */ - } else { - tty_insert_flip_char(port, 0, - tty_normal); - info->icount.rx++; - } - } else { - tty_insert_flip_char(port, 0, tty_normal); - info->icount.rx++; - } - } else { - /* there was a software buffer overrun and nothing - * could be done about it!!! */ - info->icount.buf_overrun++; - info->idle_stats.overruns++; - } - } else { /* normal character reception */ - /* load # chars available from the chip */ - char_count = cyy_readb(info, cyrdcr); - -#ifdef cy_enable_monitoring - ++info->mon.int_count; - info->mon.char_count += char_count; - if (char_count > info->mon.char_max) - info->mon.char_max = char_count; - info->mon.char_last = char_count; -#endif - len = tty_buffer_request_room(port, char_count); - while (len--) { - data = cyy_readb(info, cyrdsr); - tty_insert_flip_char(port, data, tty_normal); - info->idle_stats.recv_bytes++; - info->icount.rx++; -#ifdef cy_16y_hack - udelay(10l); -#endif - } - info->idle_stats.recv_idle = jiffies; - } - tty_schedule_flip(port); - - /* end of service */ - cyy_writeb(info, cyrir, save_xir & 0x3f); - cyy_writeb(info, cycar, save_car); -} - -static void cyy_chip_tx(struct cyclades_card *cinfo, unsigned int chip, - void __iomem *base_addr) -{ - struct cyclades_port *info; - struct tty_struct *tty; - int char_count, index = cinfo->bus_index; - u8 save_xir, channel, save_car, outch; - - /* since we only get here when the transmit buffer - is empty, we know we can always stuff a dozen - characters. */ -#ifdef cy_debug_interrupts - printk(kern_debug "cyy_interrupt: xmit intr, chip %d ", chip); -#endif - - /* determine the channel & change to that context */ - save_xir = readb(base_addr + (cytir << index)); - channel = save_xir & cyirchannel; - save_car = readb(base_addr + (cycar << index)); - cy_writeb(base_addr + (cycar << index), save_xir); - - info = &cinfo->ports[channel + chip * 4]; - tty = tty_port_tty_get(&info->port); - if (tty == null) { - cyy_writeb(info, cysrer, cyy_readb(info, cysrer) & ~cytxrdy); - goto end; - } - - /* load the on-chip space for outbound data */ - char_count = info->xmit_fifo_size; - - if (info->x_char) { /* send special char */ - outch = info->x_char; - cyy_writeb(info, cytdr, outch); - char_count--; - info->icount.tx++; - info->x_char = 0; - } - - if (info->breakon || info->breakoff) { - if (info->breakon) { - cyy_writeb(info, cytdr, 0); - cyy_writeb(info, cytdr, 0x81); - info->breakon = 0; - char_count -= 2; - } - if (info->breakoff) { - cyy_writeb(info, cytdr, 0); - cyy_writeb(info, cytdr, 0x83); - info->breakoff = 0; - char_count -= 2; - } - } - - while (char_count-- > 0) { - if (!info->xmit_cnt) { - if (cyy_readb(info, cysrer) & cytxmpty) { - cyy_writeb(info, cysrer, - cyy_readb(info, cysrer) & ~cytxmpty); - } else { - cyy_writeb(info, cysrer, cytxmpty | - (cyy_readb(info, cysrer) & ~cytxrdy)); - } - goto done; - } - if (info->port.xmit_buf == null) { - cyy_writeb(info, cysrer, - cyy_readb(info, cysrer) & ~cytxrdy); - goto done; - } - if (tty->stopped || tty->hw_stopped) { - cyy_writeb(info, cysrer, - cyy_readb(info, cysrer) & ~cytxrdy); - goto done; - } - /* because the embedded transmit commands have been enabled, - * we must check to see if the escape character, null, is being - * sent. if it is, we must ensure that there is room for it to - * be doubled in the output stream. therefore we no longer - * advance the pointer when the character is fetched, but - * rather wait until after the check for a null output - * character. this is necessary because there may not be room - * for the two chars needed to send a null.) - */ - outch = info->port.xmit_buf[info->xmit_tail]; - if (outch) { - info->xmit_cnt--; - info->xmit_tail = (info->xmit_tail + 1) & - (serial_xmit_size - 1); - cyy_writeb(info, cytdr, outch); - info->icount.tx++; - } else { - if (char_count > 1) { - info->xmit_cnt--; - info->xmit_tail = (info->xmit_tail + 1) & - (serial_xmit_size - 1); - cyy_writeb(info, cytdr, outch); - cyy_writeb(info, cytdr, 0); - info->icount.tx++; - char_count--; - } - } - } - -done: - tty_wakeup(tty); - tty_kref_put(tty); -end: - /* end of service */ - cyy_writeb(info, cytir, save_xir & 0x3f); - cyy_writeb(info, cycar, save_car); -} - -static void cyy_chip_modem(struct cyclades_card *cinfo, int chip, - void __iomem *base_addr) -{ - struct cyclades_port *info; - struct tty_struct *tty; - int index = cinfo->bus_index; - u8 save_xir, channel, save_car, mdm_change, mdm_status; - - /* determine the channel & change to that context */ - save_xir = readb(base_addr + (cymir << index)); - channel = save_xir & cyirchannel; - info = &cinfo->ports[channel + chip * 4]; - save_car = cyy_readb(info, cycar); - cyy_writeb(info, cycar, save_xir); - - mdm_change = cyy_readb(info, cymisr); - mdm_status = cyy_readb(info, cymsvr1); - - tty = tty_port_tty_get(&info->port); - if (!tty) - goto end; - - if (mdm_change & cyany_delta) { - /* for statistics only */ - if (mdm_change & cydcd) - info->icount.dcd++; - if (mdm_change & cycts) - info->icount.cts++; - if (mdm_change & cydsr) - info->icount.dsr++; - if (mdm_change & cyri) - info->icount.rng++; - - wake_up_interruptible(&info->port.delta_msr_wait); - } - - if ((mdm_change & cydcd) && tty_port_check_carrier(&info->port)) { - if (mdm_status & cydcd) - wake_up_interruptible(&info->port.open_wait); - else - tty_hangup(tty); - } - if ((mdm_change & cycts) && tty_port_cts_enabled(&info->port)) { - if (tty->hw_stopped) { - if (mdm_status & cycts) { - /* cy_start isn't used - because... !!! */ - tty->hw_stopped = 0; - cyy_writeb(info, cysrer, - cyy_readb(info, cysrer) | cytxrdy); - tty_wakeup(tty); - } - } else { - if (!(mdm_status & cycts)) { - /* cy_stop isn't used - because ... !!! */ - tty->hw_stopped = 1; - cyy_writeb(info, cysrer, - cyy_readb(info, cysrer) & ~cytxrdy); - } - } - } -/* if (mdm_change & cydsr) { - } - if (mdm_change & cyri) { - }*/ - tty_kref_put(tty); -end: - /* end of service */ - cyy_writeb(info, cymir, save_xir & 0x3f); - cyy_writeb(info, cycar, save_car); -} - -/* the real interrupt service routine is called - whenever the card wants its hand held--chars - received, out buffer empty, modem change, etc. - */ -static irqreturn_t cyy_interrupt(int irq, void *dev_id) -{ - int status; - struct cyclades_card *cinfo = dev_id; - void __iomem *base_addr, *card_base_addr; - unsigned int chip, too_many, had_work; - int index; - - if (unlikely(cinfo == null)) { -#ifdef cy_debug_interrupts - printk(kern_debug "cyy_interrupt: spurious interrupt %d ", - irq); -#endif - return irq_none; /* spurious interrupt */ - } - - card_base_addr = cinfo->base_addr; - index = cinfo->bus_index; - - /* card was not initialized yet (e.g. debug_shirq) */ - if (unlikely(card_base_addr == null)) - return irq_handled; - - /* this loop checks all chips in the card. make a note whenever - _any_ chip had some work to do, as this is considered an - indication that there will be more to do. only when no chip - has any work does this outermost loop exit. - */ - do { - had_work = 0; - for (chip = 0; chip < cinfo->num_chips; chip++) { - base_addr = cinfo->base_addr + - (cy_chip_offset[chip] << index); - too_many = 0; - while ((status = readb(base_addr + - (cysvrr << index))) != 0x00) { - had_work++; - /* the purpose of the following test is to ensure that - no chip can monopolize the driver. this forces the - chips to be checked in a round-robin fashion (after - draining each of a bunch (1000) of characters). - */ - if (1000 < too_many++) - break; - spin_lock(&cinfo->card_lock); - if (status & cysrreceive) /* rx intr */ - cyy_chip_rx(cinfo, chip, base_addr); - if (status & cysrtransmit) /* tx intr */ - cyy_chip_tx(cinfo, chip, base_addr); - if (status & cysrmodem) /* modem intr */ - cyy_chip_modem(cinfo, chip, base_addr); - spin_unlock(&cinfo->card_lock); - } - } - } while (had_work); - - /* clear interrupts */ - spin_lock(&cinfo->card_lock); - cy_writeb(card_base_addr + (cy_clrintr << index), 0); - /* cy_clrintr is 0x1800 */ - spin_unlock(&cinfo->card_lock); - return irq_handled; -} /* cyy_interrupt */ - -static void cyy_change_rts_dtr(struct cyclades_port *info, unsigned int set, - unsigned int clear) -{ - struct cyclades_card *card = info->card; - int channel = info->line - card->first_line; - u32 rts, dtr, msvrr, msvrd; - - channel &= 0x03; - - if (info->rtsdtr_inv) { - msvrr = cymsvr2; - msvrd = cymsvr1; - rts = cydtr; - dtr = cyrts; - } else { - msvrr = cymsvr1; - msvrd = cymsvr2; - rts = cyrts; - dtr = cydtr; - } - if (set & tiocm_rts) { - cyy_writeb(info, cycar, channel); - cyy_writeb(info, msvrr, rts); - } - if (clear & tiocm_rts) { - cyy_writeb(info, cycar, channel); - cyy_writeb(info, msvrr, ~rts); - } - if (set & tiocm_dtr) { - cyy_writeb(info, cycar, channel); - cyy_writeb(info, msvrd, dtr); -#ifdef cy_debug_dtr - printk(kern_debug "cyc:set_modem_info raising dtr "); - printk(kern_debug " status: 0x%x, 0x%x ", - cyy_readb(info, cymsvr1), - cyy_readb(info, cymsvr2)); -#endif - } - if (clear & tiocm_dtr) { - cyy_writeb(info, cycar, channel); - cyy_writeb(info, msvrd, ~dtr); -#ifdef cy_debug_dtr - printk(kern_debug "cyc:set_modem_info dropping dtr "); - printk(kern_debug " status: 0x%x, 0x%x ", - cyy_readb(info, cymsvr1), - cyy_readb(info, cymsvr2)); -#endif - } -} - -/***********************************************************/ -/********* end of block of cyclom-y specific code **********/ -/******** start of block of cyclades-z specific code *******/ -/***********************************************************/ - -static int -cyz_fetch_msg(struct cyclades_card *cinfo, - __u32 *channel, __u8 *cmd, __u32 *param) -{ - struct board_ctrl __iomem *board_ctrl = cinfo->board_ctrl; - unsigned long loc_doorbell; - - loc_doorbell = readl(&cinfo->ctl_addr.p9060->loc_doorbell); - if (loc_doorbell) { - *cmd = (char)(0xff & loc_doorbell); - *channel = readl(&board_ctrl->fwcmd_channel); - *param = (__u32) readl(&board_ctrl->fwcmd_param); - cy_writel(&cinfo->ctl_addr.p9060->loc_doorbell, 0xffffffff); - return 1; - } - return 0; -} /* cyz_fetch_msg */ - -static int -cyz_issue_cmd(struct cyclades_card *cinfo, - __u32 channel, __u8 cmd, __u32 param) -{ - struct board_ctrl __iomem *board_ctrl = cinfo->board_ctrl; - __u32 __iomem *pci_doorbell; - unsigned int index; - - if (!cyz_is_loaded(cinfo)) - return -1; - - index = 0; - pci_doorbell = &cinfo->ctl_addr.p9060->pci_doorbell; - while ((readl(pci_doorbell) & 0xff) != 0) { - if (index++ == 1000) - return (int)(readl(pci_doorbell) & 0xff); - udelay(50l); - } - cy_writel(&board_ctrl->hcmd_channel, channel); - cy_writel(&board_ctrl->hcmd_param, param); - cy_writel(pci_doorbell, (long)cmd); - - return 0; -} /* cyz_issue_cmd */ - -static void cyz_handle_rx(struct cyclades_port *info) -{ - struct buf_ctrl __iomem *buf_ctrl = info->u.cyz.buf_ctrl; - struct cyclades_card *cinfo = info->card; - struct tty_port *port = &info->port; - unsigned int char_count; - int len; -#ifdef blockmove - unsigned char *buf; -#else - char data; -#endif - __u32 rx_put, rx_get, new_rx_get, rx_bufsize, rx_bufaddr; - - rx_get = new_rx_get = readl(&buf_ctrl->rx_get); - rx_put = readl(&buf_ctrl->rx_put); - rx_bufsize = readl(&buf_ctrl->rx_bufsize); - rx_bufaddr = readl(&buf_ctrl->rx_bufaddr); - if (rx_put >= rx_get) - char_count = rx_put - rx_get; - else - char_count = rx_put - rx_get + rx_bufsize; - - if (!char_count) - return; - -#ifdef cy_enable_monitoring - info->mon.int_count++; - info->mon.char_count += char_count; - if (char_count > info->mon.char_max) - info->mon.char_max = char_count; - info->mon.char_last = char_count; -#endif - -#ifdef blockmove - /* we'd like to use memcpy(t, f, n) and memset(s, c, count) - for performance, but because of buffer boundaries, there - may be several steps to the operation */ - while (1) { - len = tty_prepare_flip_string(port, &buf, - char_count); - if (!len) - break; - - len = min_t(unsigned int, min(len, char_count), - rx_bufsize - new_rx_get); - - memcpy_fromio(buf, cinfo->base_addr + - rx_bufaddr + new_rx_get, len); - - new_rx_get = (new_rx_get + len) & - (rx_bufsize - 1); - char_count -= len; - info->icount.rx += len; - info->idle_stats.recv_bytes += len; - } -#else - len = tty_buffer_request_room(port, char_count); - while (len--) { - data = readb(cinfo->base_addr + rx_bufaddr + - new_rx_get); - new_rx_get = (new_rx_get + 1) & - (rx_bufsize - 1); - tty_insert_flip_char(port, data, tty_normal); - info->idle_stats.recv_bytes++; - info->icount.rx++; - } -#endif -#ifdef config_cyz_intr - /* recalculate the number of chars in the rx buffer and issue - a cmd in case it's higher than the rx high water mark */ - rx_put = readl(&buf_ctrl->rx_put); - if (rx_put >= rx_get) - char_count = rx_put - rx_get; - else - char_count = rx_put - rx_get + rx_bufsize; - if (char_count >= readl(&buf_ctrl->rx_threshold) && - !timer_pending(&info->rx_full_timer)) - mod_timer(&info->rx_full_timer, jiffies + 1); -#endif - info->idle_stats.recv_idle = jiffies; - tty_schedule_flip(&info->port); - - /* update rx_get */ - cy_writel(&buf_ctrl->rx_get, new_rx_get); -} - -static void cyz_handle_tx(struct cyclades_port *info) -{ - struct buf_ctrl __iomem *buf_ctrl = info->u.cyz.buf_ctrl; - struct cyclades_card *cinfo = info->card; - struct tty_struct *tty; - u8 data; - unsigned int char_count; -#ifdef blockmove - int small_count; -#endif - __u32 tx_put, tx_get, tx_bufsize, tx_bufaddr; - - if (info->xmit_cnt <= 0) /* nothing to transmit */ - return; - - tx_get = readl(&buf_ctrl->tx_get); - tx_put = readl(&buf_ctrl->tx_put); - tx_bufsize = readl(&buf_ctrl->tx_bufsize); - tx_bufaddr = readl(&buf_ctrl->tx_bufaddr); - if (tx_put >= tx_get) - char_count = tx_get - tx_put - 1 + tx_bufsize; - else - char_count = tx_get - tx_put - 1; - - if (!char_count) - return; - - tty = tty_port_tty_get(&info->port); - if (tty == null) - goto ztxdone; - - if (info->x_char) { /* send special char */ - data = info->x_char; - - cy_writeb(cinfo->base_addr + tx_bufaddr + tx_put, data); - tx_put = (tx_put + 1) & (tx_bufsize - 1); - info->x_char = 0; - char_count--; - info->icount.tx++; - } -#ifdef blockmove - while (0 < (small_count = min_t(unsigned int, - tx_bufsize - tx_put, min_t(unsigned int, - (serial_xmit_size - info->xmit_tail), - min_t(unsigned int, info->xmit_cnt, - char_count))))) { - - memcpy_toio((char *)(cinfo->base_addr + tx_bufaddr + tx_put), - &info->port.xmit_buf[info->xmit_tail], - small_count); - - tx_put = (tx_put + small_count) & (tx_bufsize - 1); - char_count -= small_count; - info->icount.tx += small_count; - info->xmit_cnt -= small_count; - info->xmit_tail = (info->xmit_tail + small_count) & - (serial_xmit_size - 1); - } -#else - while (info->xmit_cnt && char_count) { - data = info->port.xmit_buf[info->xmit_tail]; - info->xmit_cnt--; - info->xmit_tail = (info->xmit_tail + 1) & - (serial_xmit_size - 1); - - cy_writeb(cinfo->base_addr + tx_bufaddr + tx_put, data); - tx_put = (tx_put + 1) & (tx_bufsize - 1); - char_count--; - info->icount.tx++; - } -#endif - tty_wakeup(tty); - tty_kref_put(tty); -ztxdone: - /* update tx_put */ - cy_writel(&buf_ctrl->tx_put, tx_put); -} - -static void cyz_handle_cmd(struct cyclades_card *cinfo) -{ - struct board_ctrl __iomem *board_ctrl = cinfo->board_ctrl; - struct cyclades_port *info; - __u32 channel, param, fw_ver; - __u8 cmd; - int special_count; - int delta_count; - - fw_ver = readl(&board_ctrl->fw_version); - - while (cyz_fetch_msg(cinfo, &channel, &cmd, &param) == 1) { - special_count = 0; - delta_count = 0; - info = &cinfo->ports[channel]; - - switch (cmd) { - case c_cm_pr_error: - tty_insert_flip_char(&info->port, 0, tty_parity); - info->icount.rx++; - special_count++; - break; - case c_cm_fr_error: - tty_insert_flip_char(&info->port, 0, tty_frame); - info->icount.rx++; - special_count++; - break; - case c_cm_rxbrk: - tty_insert_flip_char(&info->port, 0, tty_break); - info->icount.rx++; - special_count++; - break; - case c_cm_mdcd: - info->icount.dcd++; - delta_count++; - if (tty_port_check_carrier(&info->port)) { - u32 dcd = fw_ver > 241 ? param : - readl(&info->u.cyz.ch_ctrl->rs_status); - if (dcd & c_rs_dcd) - wake_up_interruptible(&info->port.open_wait); - else - tty_port_tty_hangup(&info->port, false); - } - break; - case c_cm_mcts: - info->icount.cts++; - delta_count++; - break; - case c_cm_mri: - info->icount.rng++; - delta_count++; - break; - case c_cm_mdsr: - info->icount.dsr++; - delta_count++; - break; -#ifdef z_wake - case c_cm_ioctlw: - complete(&info->shutdown_wait); - break; -#endif -#ifdef config_cyz_intr - case c_cm_rxhiwm: - case c_cm_rxnndt: - case c_cm_intback2: - /* reception interrupt */ -#ifdef cy_debug_interrupts - printk(kern_debug "cyz_interrupt: rcvd intr, card %d, " - "port %ld ", info->card, channel); -#endif - cyz_handle_rx(info); - break; - case c_cm_txbempty: - case c_cm_txlowwm: - case c_cm_intback: - /* transmission interrupt */ -#ifdef cy_debug_interrupts - printk(kern_debug "cyz_interrupt: xmit intr, card %d, " - "port %ld ", info->card, channel); -#endif - cyz_handle_tx(info); - break; -#endif /* config_cyz_intr */ - case c_cm_fatal: - /* should do something with this !!! */ - break; - default: - break; - } - if (delta_count) - wake_up_interruptible(&info->port.delta_msr_wait); - if (special_count) - tty_schedule_flip(&info->port); - } -} - -#ifdef config_cyz_intr -static irqreturn_t cyz_interrupt(int irq, void *dev_id) -{ - struct cyclades_card *cinfo = dev_id; - - if (unlikely(!cyz_is_loaded(cinfo))) { -#ifdef cy_debug_interrupts - printk(kern_debug "cyz_interrupt: board not yet loaded " - "(irq%d). ", irq); -#endif - return irq_none; - } - - /* handle the interrupts */ - cyz_handle_cmd(cinfo); - - return irq_handled; -} /* cyz_interrupt */ - -static void cyz_rx_restart(struct timer_list *t) -{ - struct cyclades_port *info = from_timer(info, t, rx_full_timer); - struct cyclades_card *card = info->card; - int retval; - __u32 channel = info->line - card->first_line; - unsigned long flags; - - spin_lock_irqsave(&card->card_lock, flags); - retval = cyz_issue_cmd(card, channel, c_cm_intback2, 0l); - if (retval != 0) { - printk(kern_err "cyc:cyz_rx_restart retval on ttyc%d was %x ", - info->line, retval); - } - spin_unlock_irqrestore(&card->card_lock, flags); -} - -#else /* config_cyz_intr */ - -static void cyz_poll(struct timer_list *unused) -{ - struct cyclades_card *cinfo; - struct cyclades_port *info; - unsigned long expires = jiffies + hz; - unsigned int port, card; - - for (card = 0; card < nr_cards; card++) { - cinfo = &cy_card[card]; - - if (!cy_is_z(cinfo)) - continue; - if (!cyz_is_loaded(cinfo)) - continue; - - /* skip first polling cycle to avoid racing conditions with the fw */ - if (!cinfo->intr_enabled) { - cinfo->intr_enabled = 1; - continue; - } - - cyz_handle_cmd(cinfo); - - for (port = 0; port < cinfo->nports; port++) { - info = &cinfo->ports[port]; - - if (!info->throttle) - cyz_handle_rx(info); - cyz_handle_tx(info); - } - /* poll every 'cyz_polling_cycle' period */ - expires = jiffies + cyz_polling_cycle; - } - mod_timer(&cyz_timerlist, expires); -} /* cyz_poll */ - -#endif /* config_cyz_intr */ - -/********** end of block of cyclades-z specific code *********/ -/***********************************************************/ - -/* this is called whenever a port becomes active; - interrupts are enabled and dtr & rts are turned on. - */ -static int cy_startup(struct cyclades_port *info, struct tty_struct *tty) -{ - struct cyclades_card *card; - unsigned long flags; - int retval = 0; - int channel; - unsigned long page; - - card = info->card; - channel = info->line - card->first_line; - - page = get_zeroed_page(gfp_kernel); - if (!page) - return -enomem; - - spin_lock_irqsave(&card->card_lock, flags); - - if (tty_port_initialized(&info->port)) - goto errout; - - if (!info->type) { - set_bit(tty_io_error, &tty->flags); - goto errout; - } - - if (info->port.xmit_buf) - free_page(page); - else - info->port.xmit_buf = (unsigned char *)page; - - spin_unlock_irqrestore(&card->card_lock, flags); - - cy_set_line_char(info, tty); - - if (!cy_is_z(card)) { - channel &= 0x03; - - spin_lock_irqsave(&card->card_lock, flags); - - cyy_writeb(info, cycar, channel); - - cyy_writeb(info, cyrtpr, - (info->default_timeout ? info->default_timeout : 0x02)); - /* 10ms rx timeout */ - - cyy_issue_cmd(info, cychan_ctl | cyenb_rcvr | cyenb_xmtr); - - cyy_change_rts_dtr(info, tiocm_rts | tiocm_dtr, 0); - - cyy_writeb(info, cysrer, cyy_readb(info, cysrer) | cyrxdata); - } else { - struct ch_ctrl __iomem *ch_ctrl = info->u.cyz.ch_ctrl; - - if (!cyz_is_loaded(card)) - return -enodev; - -#ifdef cy_debug_open - printk(kern_debug "cyc startup z card %d, channel %d, " - "base_addr %p ", card, channel, card->base_addr); -#endif - spin_lock_irqsave(&card->card_lock, flags); - - cy_writel(&ch_ctrl->op_mode, c_ch_enable); -#ifdef z_wake -#ifdef config_cyz_intr - cy_writel(&ch_ctrl->intr_enable, - c_in_txbempty | c_in_txlowwm | c_in_rxhiwm | - c_in_rxnndt | c_in_ioctlw | c_in_mdcd); -#else - cy_writel(&ch_ctrl->intr_enable, - c_in_ioctlw | c_in_mdcd); -#endif /* config_cyz_intr */ -#else -#ifdef config_cyz_intr - cy_writel(&ch_ctrl->intr_enable, - c_in_txbempty | c_in_txlowwm | c_in_rxhiwm | - c_in_rxnndt | c_in_mdcd); -#else - cy_writel(&ch_ctrl->intr_enable, c_in_mdcd); -#endif /* config_cyz_intr */ -#endif /* z_wake */ - - retval = cyz_issue_cmd(card, channel, c_cm_ioctl, 0l); - if (retval != 0) { - printk(kern_err "cyc:startup(1) retval on ttyc%d was " - "%x ", info->line, retval); - } - - /* flush rx buffers before raising dtr and rts */ - retval = cyz_issue_cmd(card, channel, c_cm_flush_rx, 0l); - if (retval != 0) { - printk(kern_err "cyc:startup(2) retval on ttyc%d was " - "%x ", info->line, retval); - } - - /* set timeout !!! */ - /* set rts and dtr !!! */ - tty_port_raise_dtr_rts(&info->port); - - /* enable send, recv, modem !!! */ - } - - tty_port_set_initialized(&info->port, 1); - - clear_bit(tty_io_error, &tty->flags); - info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; - info->breakon = info->breakoff = 0; - memset((char *)&info->idle_stats, 0, sizeof(info->idle_stats)); - info->idle_stats.in_use = - info->idle_stats.recv_idle = - info->idle_stats.xmit_idle = jiffies; - - spin_unlock_irqrestore(&card->card_lock, flags); - -#ifdef cy_debug_open - printk(kern_debug "cyc startup done "); -#endif - return 0; - -errout: - spin_unlock_irqrestore(&card->card_lock, flags); - free_page(page); - return retval; -} /* startup */ - -static void start_xmit(struct cyclades_port *info) -{ - struct cyclades_card *card = info->card; - unsigned long flags; - int channel = info->line - card->first_line; - - if (!cy_is_z(card)) { - spin_lock_irqsave(&card->card_lock, flags); - cyy_writeb(info, cycar, channel & 0x03); - cyy_writeb(info, cysrer, cyy_readb(info, cysrer) | cytxrdy); - spin_unlock_irqrestore(&card->card_lock, flags); - } else { -#ifdef config_cyz_intr - int retval; - - spin_lock_irqsave(&card->card_lock, flags); - retval = cyz_issue_cmd(card, channel, c_cm_intback, 0l); - if (retval != 0) { - printk(kern_err "cyc:start_xmit retval on ttyc%d was " - "%x ", info->line, retval); - } - spin_unlock_irqrestore(&card->card_lock, flags); -#else /* config_cyz_intr */ - /* don't have to do anything at this time */ -#endif /* config_cyz_intr */ - } -} /* start_xmit */ - -/* - * this routine shuts down a serial port; interrupts are disabled, - * and dtr is dropped if the hangup on close termio flag is on. - */ -static void cy_shutdown(struct cyclades_port *info, struct tty_struct *tty) -{ - struct cyclades_card *card; - unsigned long flags; - - if (!tty_port_initialized(&info->port)) - return; - - card = info->card; - if (!cy_is_z(card)) { - spin_lock_irqsave(&card->card_lock, flags); - - /* clear delta_msr_wait queue to avoid mem leaks. */ - wake_up_interruptible(&info->port.delta_msr_wait); - - if (info->port.xmit_buf) { - unsigned char *temp; - temp = info->port.xmit_buf; - info->port.xmit_buf = null; - free_page((unsigned long)temp); - } - if (c_hupcl(tty)) - cyy_change_rts_dtr(info, 0, tiocm_rts | tiocm_dtr); - - cyy_issue_cmd(info, cychan_ctl | cydis_rcvr); - /* it may be appropriate to clear _xmit at - some later date (after testing)!!! */ - - set_bit(tty_io_error, &tty->flags); - tty_port_set_initialized(&info->port, 0); - spin_unlock_irqrestore(&card->card_lock, flags); - } else { -#ifdef cy_debug_open - int channel = info->line - card->first_line; - printk(kern_debug "cyc shutdown z card %d, channel %d, " - "base_addr %p ", card, channel, card->base_addr); -#endif - - if (!cyz_is_loaded(card)) - return; - - spin_lock_irqsave(&card->card_lock, flags); - - if (info->port.xmit_buf) { - unsigned char *temp; - temp = info->port.xmit_buf; - info->port.xmit_buf = null; - free_page((unsigned long)temp); - } - - if (c_hupcl(tty)) - tty_port_lower_dtr_rts(&info->port); - - set_bit(tty_io_error, &tty->flags); - tty_port_set_initialized(&info->port, 0); - - spin_unlock_irqrestore(&card->card_lock, flags); - } - -#ifdef cy_debug_open - printk(kern_debug "cyc shutdown done "); -#endif -} /* shutdown */ - -/* - * ------------------------------------------------------------ - * cy_open() and friends - * ------------------------------------------------------------ - */ - -/* - * this routine is called whenever a serial port is opened. it - * performs the serial-specific initialization for the tty structure. - */ -static int cy_open(struct tty_struct *tty, struct file *filp) -{ - struct cyclades_port *info; - unsigned int i, line = tty->index; - int retval; - - for (i = 0; i < nr_cards; i++) - if (line < cy_card[i].first_line + cy_card[i].nports && - line >= cy_card[i].first_line) - break; - if (i >= nr_cards) - return -enodev; - info = &cy_card[i].ports[line - cy_card[i].first_line]; - if (info->line < 0) - return -enodev; - - /* if the card's firmware hasn't been loaded, - treat it as absent from the system. this - will make the user pay attention. - */ - if (cy_is_z(info->card)) { - struct cyclades_card *cinfo = info->card; - struct firm_id __iomem *firm_id = cinfo->base_addr + id_address; - - if (!cyz_is_loaded(cinfo)) { - if (cinfo->hw_ver == ze_v1 && cyz_fpga_loaded(cinfo) && - readl(&firm_id->signature) == - zfirm_hlt) { - printk(kern_err "cyc:cyclades-z error: you " - "need an external power supply for " - "this number of ports. firmware " - "halted. "); - } else { - printk(kern_err "cyc:cyclades-z firmware not " - "yet loaded "); - } - return -enodev; - } -#ifdef config_cyz_intr - else { - /* in case this z board is operating in interrupt mode, its - interrupts should be enabled as soon as the first open - happens to one of its ports. */ - if (!cinfo->intr_enabled) { - u16 intr; - - /* enable interrupts on the plx chip */ - intr = readw(&cinfo->ctl_addr.p9060-> - intr_ctrl_stat) | 0x0900; - cy_writew(&cinfo->ctl_addr.p9060-> - intr_ctrl_stat, intr); - /* enable interrupts on the fw */ - retval = cyz_issue_cmd(cinfo, 0, - c_cm_irq_enbl, 0l); - if (retval != 0) { - printk(kern_err "cyc:irq enable retval " - "was %x ", retval); - } - cinfo->intr_enabled = 1; - } - } -#endif /* config_cyz_intr */ - /* make sure this z port really exists in hardware */ - if (info->line > (cinfo->first_line + cinfo->nports - 1)) - return -enodev; - } -#ifdef cy_debug_other - printk(kern_debug "cyc:cy_open ttyc%d ", info->line); -#endif - tty->driver_data = info; - if (serial_paranoia_check(info, tty->name, "cy_open")) - return -enodev; - -#ifdef cy_debug_open - printk(kern_debug "cyc:cy_open ttyc%d, count = %d ", info->line, - info->port.count); -#endif - info->port.count++; -#ifdef cy_debug_count - printk(kern_debug "cyc:cy_open (%d): incrementing count to %d ", - current->pid, info->port.count); -#endif - - /* - * start up serial port - */ - retval = cy_startup(info, tty); - if (retval) - return retval; - - retval = tty_port_block_til_ready(&info->port, tty, filp); - if (retval) { -#ifdef cy_debug_open - printk(kern_debug "cyc:cy_open returning after block_til_ready " - "with %d ", retval); -#endif - return retval; - } - - info->throttle = 0; - tty_port_tty_set(&info->port, tty); - -#ifdef cy_debug_open - printk(kern_debug "cyc:cy_open done "); -#endif - return 0; -} /* cy_open */ - -/* - * cy_wait_until_sent() --- wait until the transmitter is empty - */ -static void cy_wait_until_sent(struct tty_struct *tty, int timeout) -{ - struct cyclades_card *card; - struct cyclades_port *info = tty->driver_data; - unsigned long orig_jiffies; - int char_time; - - if (serial_paranoia_check(info, tty->name, "cy_wait_until_sent")) - return; - - if (info->xmit_fifo_size == 0) - return; /* just in case.... */ - - orig_jiffies = jiffies; - /* - * set the check interval to be 1/5 of the estimated time to - * send a single character, and make it at least 1. the check - * interval should also be less than the timeout. - * - * note: we have to use pretty tight timings here to satisfy - * the nist-pcts. - */ - char_time = (info->timeout - hz / 50) / info->xmit_fifo_size; - char_time = char_time / 5; - if (char_time <= 0) - char_time = 1; - if (timeout < 0) - timeout = 0; - if (timeout) - char_time = min(char_time, timeout); - /* - * if the transmitter hasn't cleared in twice the approximate - * amount of time to send the entire fifo, it probably won't - * ever clear. this assumes the uart isn't doing flow - * control, which is currently the case. hence, if it ever - * takes longer than info->timeout, this is probably due to a - * uart bug of some kind. so, we clamp the timeout parameter at - * 2*info->timeout. - */ - if (!timeout || timeout > 2 * info->timeout) - timeout = 2 * info->timeout; - - card = info->card; - if (!cy_is_z(card)) { - while (cyy_readb(info, cysrer) & cytxrdy) { - if (msleep_interruptible(jiffies_to_msecs(char_time))) - break; - if (timeout && time_after(jiffies, orig_jiffies + - timeout)) - break; - } - } - /* run one more char cycle */ - msleep_interruptible(jiffies_to_msecs(char_time * 5)); -} - -static void cy_flush_buffer(struct tty_struct *tty) -{ - struct cyclades_port *info = tty->driver_data; - struct cyclades_card *card; - int channel, retval; - unsigned long flags; - -#ifdef cy_debug_io - printk(kern_debug "cyc:cy_flush_buffer ttyc%d ", info->line); -#endif - - if (serial_paranoia_check(info, tty->name, "cy_flush_buffer")) - return; - - card = info->card; - channel = info->line - card->first_line; - - spin_lock_irqsave(&card->card_lock, flags); - info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; - spin_unlock_irqrestore(&card->card_lock, flags); - - if (cy_is_z(card)) { /* if it is a z card, flush the on-board - buffers as well */ - spin_lock_irqsave(&card->card_lock, flags); - retval = cyz_issue_cmd(card, channel, c_cm_flush_tx, 0l); - if (retval != 0) { - printk(kern_err "cyc: flush_buffer retval on ttyc%d " - "was %x ", info->line, retval); - } - spin_unlock_irqrestore(&card->card_lock, flags); - } - tty_wakeup(tty); -} /* cy_flush_buffer */ - - -static void cy_do_close(struct tty_port *port) -{ - struct cyclades_port *info = container_of(port, struct cyclades_port, - port); - struct cyclades_card *card; - unsigned long flags; - int channel; - - card = info->card; - channel = info->line - card->first_line; - spin_lock_irqsave(&card->card_lock, flags); - - if (!cy_is_z(card)) { - /* stop accepting input */ - cyy_writeb(info, cycar, channel & 0x03); - cyy_writeb(info, cysrer, cyy_readb(info, cysrer) & ~cyrxdata); - if (tty_port_initialized(&info->port)) { - /* waiting for on-board buffers to be empty before - closing the port */ - spin_unlock_irqrestore(&card->card_lock, flags); - cy_wait_until_sent(port->tty, info->timeout); - spin_lock_irqsave(&card->card_lock, flags); - } - } else { -#ifdef z_wake - /* waiting for on-board buffers to be empty before closing - the port */ - struct ch_ctrl __iomem *ch_ctrl = info->u.cyz.ch_ctrl; - int retval; - - if (readl(&ch_ctrl->flow_status) != c_fs_txidle) { - retval = cyz_issue_cmd(card, channel, c_cm_ioctlw, 0l); - if (retval != 0) { - printk(kern_debug "cyc:cy_close retval on " - "ttyc%d was %x ", info->line, retval); - } - spin_unlock_irqrestore(&card->card_lock, flags); - wait_for_completion_interruptible(&info->shutdown_wait); - spin_lock_irqsave(&card->card_lock, flags); - } -#endif - } - spin_unlock_irqrestore(&card->card_lock, flags); - cy_shutdown(info, port->tty); -} - -/* - * this routine is called when a particular tty device is closed. - */ -static void cy_close(struct tty_struct *tty, struct file *filp) -{ - struct cyclades_port *info = tty->driver_data; - if (!info || serial_paranoia_check(info, tty->name, "cy_close")) - return; - tty_port_close(&info->port, tty, filp); -} /* cy_close */ - -/* this routine gets called when tty_write has put something into - * the write_queue. the characters may come from user space or - * kernel space. - * - * this routine will return the number of characters actually - * accepted for writing. - * - * if the port is not already transmitting stuff, start it off by - * enabling interrupts. the interrupt service routine will then - * ensure that the characters are sent. - * if the port is already active, there is no need to kick it. - * - */ -static int cy_write(struct tty_struct *tty, const unsigned char *buf, int count) -{ - struct cyclades_port *info = tty->driver_data; - unsigned long flags; - int c, ret = 0; - -#ifdef cy_debug_io - printk(kern_debug "cyc:cy_write ttyc%d ", info->line); -#endif - - if (serial_paranoia_check(info, tty->name, "cy_write")) - return 0; - - if (!info->port.xmit_buf) - return 0; - - spin_lock_irqsave(&info->card->card_lock, flags); - while (1) { - c = min(count, (int)(serial_xmit_size - info->xmit_cnt - 1)); - c = min(c, (int)(serial_xmit_size - info->xmit_head)); - - if (c <= 0) - break; - - memcpy(info->port.xmit_buf + info->xmit_head, buf, c); - info->xmit_head = (info->xmit_head + c) & - (serial_xmit_size - 1); - info->xmit_cnt += c; - buf += c; - count -= c; - ret += c; - } - spin_unlock_irqrestore(&info->card->card_lock, flags); - - info->idle_stats.xmit_bytes += ret; - info->idle_stats.xmit_idle = jiffies; - - if (info->xmit_cnt && !tty->stopped && !tty->hw_stopped) - start_xmit(info); - - return ret; -} /* cy_write */ - -/* - * this routine is called by the kernel to write a single - * character to the tty device. if the kernel uses this routine, - * it must call the flush_chars() routine (if defined) when it is - * done stuffing characters into the driver. if there is no room - * in the queue, the character is ignored. - */ -static int cy_put_char(struct tty_struct *tty, unsigned char ch) -{ - struct cyclades_port *info = tty->driver_data; - unsigned long flags; - -#ifdef cy_debug_io - printk(kern_debug "cyc:cy_put_char ttyc%d ", info->line); -#endif - - if (serial_paranoia_check(info, tty->name, "cy_put_char")) - return 0; - - if (!info->port.xmit_buf) - return 0; - - spin_lock_irqsave(&info->card->card_lock, flags); - if (info->xmit_cnt >= (int)(serial_xmit_size - 1)) { - spin_unlock_irqrestore(&info->card->card_lock, flags); - return 0; - } - - info->port.xmit_buf[info->xmit_head++] = ch; - info->xmit_head &= serial_xmit_size - 1; - info->xmit_cnt++; - info->idle_stats.xmit_bytes++; - info->idle_stats.xmit_idle = jiffies; - spin_unlock_irqrestore(&info->card->card_lock, flags); - return 1; -} /* cy_put_char */ - -/* - * this routine is called by the kernel after it has written a - * series of characters to the tty device using put_char(). - */ -static void cy_flush_chars(struct tty_struct *tty) -{ - struct cyclades_port *info = tty->driver_data; - -#ifdef cy_debug_io - printk(kern_debug "cyc:cy_flush_chars ttyc%d ", info->line); -#endif - - if (serial_paranoia_check(info, tty->name, "cy_flush_chars")) - return; - - if (info->xmit_cnt <= 0 || tty->stopped || tty->hw_stopped || - !info->port.xmit_buf) - return; - - start_xmit(info); -} /* cy_flush_chars */ - -/* - * this routine returns the numbers of characters the tty driver - * will accept for queuing to be written. this number is subject - * to change as output buffers get emptied, or if the output flow - * control is activated. - */ -static int cy_write_room(struct tty_struct *tty) -{ - struct cyclades_port *info = tty->driver_data; - int ret; - -#ifdef cy_debug_io - printk(kern_debug "cyc:cy_write_room ttyc%d ", info->line); -#endif - - if (serial_paranoia_check(info, tty->name, "cy_write_room")) - return 0; - ret = serial_xmit_size - info->xmit_cnt - 1; - if (ret < 0) - ret = 0; - return ret; -} /* cy_write_room */ - -static int cy_chars_in_buffer(struct tty_struct *tty) -{ - struct cyclades_port *info = tty->driver_data; - - if (serial_paranoia_check(info, tty->name, "cy_chars_in_buffer")) - return 0; - -#ifdef z_ext_chars_in_buffer - if (!cy_is_z(info->card)) { -#endif /* z_ext_chars_in_buffer */ -#ifdef cy_debug_io - printk(kern_debug "cyc:cy_chars_in_buffer ttyc%d %d ", - info->line, info->xmit_cnt); -#endif - return info->xmit_cnt; -#ifdef z_ext_chars_in_buffer - } else { - struct buf_ctrl __iomem *buf_ctrl = info->u.cyz.buf_ctrl; - int char_count; - __u32 tx_put, tx_get, tx_bufsize; - - tx_get = readl(&buf_ctrl->tx_get); - tx_put = readl(&buf_ctrl->tx_put); - tx_bufsize = readl(&buf_ctrl->tx_bufsize); - if (tx_put >= tx_get) - char_count = tx_put - tx_get; - else - char_count = tx_put - tx_get + tx_bufsize; -#ifdef cy_debug_io - printk(kern_debug "cyc:cy_chars_in_buffer ttyc%d %d ", - info->line, info->xmit_cnt + char_count); -#endif - return info->xmit_cnt + char_count; - } -#endif /* z_ext_chars_in_buffer */ -} /* cy_chars_in_buffer */ - -/* - * ------------------------------------------------------------ - * cy_ioctl() and friends - * ------------------------------------------------------------ - */ - -static void cyy_baud_calc(struct cyclades_port *info, __u32 baud) -{ - int co, co_val, bpr; - __u32 cy_clock = ((info->chip_rev >= cd1400_rev_j) ? 60000000 : - 25000000); - - if (baud == 0) { - info->tbpr = info->tco = info->rbpr = info->rco = 0; - return; - } - - /* determine which prescaler to use */ - for (co = 4, co_val = 2048; co; co--, co_val >>= 2) { - if (cy_clock / co_val / baud > 63) - break; - } - - bpr = (cy_clock / co_val * 2 / baud + 1) / 2; - if (bpr > 255) - bpr = 255; - - info->tbpr = info->rbpr = bpr; - info->tco = info->rco = co; -} - -/* - * this routine finds or computes the various line characteristics. - * it used to be called config_setup - */ -static void cy_set_line_char(struct cyclades_port *info, struct tty_struct *tty) -{ - struct cyclades_card *card; - unsigned long flags; - int channel; - unsigned cflag, iflag; - int baud, baud_rate = 0; - int i; - - if (info->line == -1) - return; - - cflag = tty->termios.c_cflag; - iflag = tty->termios.c_iflag; - - card = info->card; - channel = info->line - card->first_line; - - if (!cy_is_z(card)) { - u32 cflags; - - /* baud rate */ - baud = tty_get_baud_rate(tty); - if (baud == 38400 && (info->port.flags & async_spd_mask) == - async_spd_cust) { - if (info->custom_divisor) - baud_rate = info->baud / info->custom_divisor; - else - baud_rate = info->baud; - } else if (baud > cd1400_max_speed) { - baud = cd1400_max_speed; - } - /* find the baud index */ - for (i = 0; i < 20; i++) { - if (baud == baud_table[i]) - break; - } - if (i == 20) - i = 19; /* cd1400_max_speed */ - - if (baud == 38400 && (info->port.flags & async_spd_mask) == - async_spd_cust) { - cyy_baud_calc(info, baud_rate); - } else { - if (info->chip_rev >= cd1400_rev_j) { - /* it is a cd1400 rev. j or later */ - info->tbpr = baud_bpr_60[i]; /* tx bpr */ - info->tco = baud_co_60[i]; /* tx co */ - info->rbpr = baud_bpr_60[i]; /* rx bpr */ - info->rco = baud_co_60[i]; /* rx co */ - } else { - info->tbpr = baud_bpr_25[i]; /* tx bpr */ - info->tco = baud_co_25[i]; /* tx co */ - info->rbpr = baud_bpr_25[i]; /* rx bpr */ - info->rco = baud_co_25[i]; /* rx co */ - } - } - if (baud_table[i] == 134) { - /* get it right for 134.5 baud */ - info->timeout = (info->xmit_fifo_size * hz * 30 / 269) + - 2; - } else if (baud == 38400 && (info->port.flags & async_spd_mask) == - async_spd_cust) { - info->timeout = (info->xmit_fifo_size * hz * 15 / - baud_rate) + 2; - } else if (baud_table[i]) { - info->timeout = (info->xmit_fifo_size * hz * 15 / - baud_table[i]) + 2; - /* this needs to be propagated into the card info */ - } else { - info->timeout = 0; - } - /* by tradition (is it a standard?) a baud rate of zero - implies the line should be/has been closed. a bit - later in this routine such a test is performed. */ - - /* byte size and parity */ - info->cor5 = 0; - info->cor4 = 0; - /* receive threshold */ - info->cor3 = (info->default_threshold ? - info->default_threshold : baud_cor3[i]); - info->cor2 = cyetc; - switch (cflag & csize) { - case cs5: - info->cor1 = cy_5_bits; - break; - case cs6: - info->cor1 = cy_6_bits; - break; - case cs7: - info->cor1 = cy_7_bits; - break; - case cs8: - info->cor1 = cy_8_bits; - break; - } - if (cflag & cstopb) - info->cor1 |= cy_2_stop; - - if (cflag & parenb) { - if (cflag & parodd) - info->cor1 |= cyparity_o; - else - info->cor1 |= cyparity_e; - } else - info->cor1 |= cyparity_none; - - /* cts flow control flag */ - tty_port_set_cts_flow(&info->port, cflag & crtscts); - if (cflag & crtscts) - info->cor2 |= cyctsae; - else - info->cor2 &= ~cyctsae; - tty_port_set_check_carrier(&info->port, ~cflag & clocal); - - /*********************************************** - the hardware option, cyrtsao, presents rts when - the chip has characters to send. since most modems - use rts as reverse (inbound) flow control, this - option is not used. if inbound flow control is - necessary, dtr can be programmed to provide the - appropriate signals for use with a non-standard - cable. contact marcio saito for details. - ***********************************************/ - - channel &= 0x03; - - spin_lock_irqsave(&card->card_lock, flags); - cyy_writeb(info, cycar, channel); - - /* tx and rx baud rate */ - - cyy_writeb(info, cytcor, info->tco); - cyy_writeb(info, cytbpr, info->tbpr); - cyy_writeb(info, cyrcor, info->rco); - cyy_writeb(info, cyrbpr, info->rbpr); - - /* set line characteristics according configuration */ - - cyy_writeb(info, cyschr1, start_char(tty)); - cyy_writeb(info, cyschr2, stop_char(tty)); - cyy_writeb(info, cycor1, info->cor1); - cyy_writeb(info, cycor2, info->cor2); - cyy_writeb(info, cycor3, info->cor3); - cyy_writeb(info, cycor4, info->cor4); - cyy_writeb(info, cycor5, info->cor5); - - cyy_issue_cmd(info, cycor_change | cycor1ch | cycor2ch | - cycor3ch); - - /* !!! is this needed? */ - cyy_writeb(info, cycar, channel); - cyy_writeb(info, cyrtpr, - (info->default_timeout ? info->default_timeout : 0x02)); - /* 10ms rx timeout */ - - cflags = cycts; - if (!c_clocal(tty)) - cflags |= cydsr | cyri | cydcd; - /* without modem intr */ - cyy_writeb(info, cysrer, cyy_readb(info, cysrer) | cymdmch); - /* act on 1->0 modem transitions */ - if ((cflag & crtscts) && info->rflow) - cyy_writeb(info, cymcor1, cflags | rflow_thr[i]); - else - cyy_writeb(info, cymcor1, cflags); - /* act on 0->1 modem transitions */ - cyy_writeb(info, cymcor2, cflags); - - if (i == 0) /* baud rate is zero, turn off line */ - cyy_change_rts_dtr(info, 0, tiocm_dtr); - else - cyy_change_rts_dtr(info, tiocm_dtr, 0); - - clear_bit(tty_io_error, &tty->flags); - spin_unlock_irqrestore(&card->card_lock, flags); - - } else { - struct ch_ctrl __iomem *ch_ctrl = info->u.cyz.ch_ctrl; - __u32 sw_flow; - int retval; - - if (!cyz_is_loaded(card)) - return; - - /* baud rate */ - baud = tty_get_baud_rate(tty); - if (baud == 38400 && (info->port.flags & async_spd_mask) == - async_spd_cust) { - if (info->custom_divisor) - baud_rate = info->baud / info->custom_divisor; - else - baud_rate = info->baud; - } else if (baud > cyz_max_speed) { - baud = cyz_max_speed; - } - cy_writel(&ch_ctrl->comm_baud, baud); - - if (baud == 134) { - /* get it right for 134.5 baud */ - info->timeout = (info->xmit_fifo_size * hz * 30 / 269) + - 2; - } else if (baud == 38400 && (info->port.flags & async_spd_mask) == - async_spd_cust) { - info->timeout = (info->xmit_fifo_size * hz * 15 / - baud_rate) + 2; - } else if (baud) { - info->timeout = (info->xmit_fifo_size * hz * 15 / - baud) + 2; - /* this needs to be propagated into the card info */ - } else { - info->timeout = 0; - } - - /* byte size and parity */ - switch (cflag & csize) { - case cs5: - cy_writel(&ch_ctrl->comm_data_l, c_dl_cs5); - break; - case cs6: - cy_writel(&ch_ctrl->comm_data_l, c_dl_cs6); - break; - case cs7: - cy_writel(&ch_ctrl->comm_data_l, c_dl_cs7); - break; - case cs8: - cy_writel(&ch_ctrl->comm_data_l, c_dl_cs8); - break; - } - if (cflag & cstopb) { - cy_writel(&ch_ctrl->comm_data_l, - readl(&ch_ctrl->comm_data_l) | c_dl_2stop); - } else { - cy_writel(&ch_ctrl->comm_data_l, - readl(&ch_ctrl->comm_data_l) | c_dl_1stop); - } - if (cflag & parenb) { - if (cflag & parodd) - cy_writel(&ch_ctrl->comm_parity, c_pr_odd); - else - cy_writel(&ch_ctrl->comm_parity, c_pr_even); - } else - cy_writel(&ch_ctrl->comm_parity, c_pr_none); - - /* cts flow control flag */ - if (cflag & crtscts) { - cy_writel(&ch_ctrl->hw_flow, - readl(&ch_ctrl->hw_flow) | c_rs_cts | c_rs_rts); - } else { - cy_writel(&ch_ctrl->hw_flow, readl(&ch_ctrl->hw_flow) & - ~(c_rs_cts | c_rs_rts)); - } - /* as the hw flow control is done in firmware, the driver - doesn't need to care about it */ - tty_port_set_cts_flow(&info->port, 0); - - /* xon/xoff/xany flow control flags */ - sw_flow = 0; - if (iflag & ixon) { - sw_flow |= c_fl_oxx; - if (iflag & ixany) - sw_flow |= c_fl_oixany; - } - cy_writel(&ch_ctrl->sw_flow, sw_flow); - - retval = cyz_issue_cmd(card, channel, c_cm_ioctl, 0l); - if (retval != 0) { - printk(kern_err "cyc:set_line_char retval on ttyc%d " - "was %x ", info->line, retval); - } - - /* cd sensitivity */ - tty_port_set_check_carrier(&info->port, ~cflag & clocal); - - if (baud == 0) { /* baud rate is zero, turn off line */ - cy_writel(&ch_ctrl->rs_control, - readl(&ch_ctrl->rs_control) & ~c_rs_dtr); -#ifdef cy_debug_dtr - printk(kern_debug "cyc:set_line_char dropping z dtr "); -#endif - } else { - cy_writel(&ch_ctrl->rs_control, - readl(&ch_ctrl->rs_control) | c_rs_dtr); -#ifdef cy_debug_dtr - printk(kern_debug "cyc:set_line_char raising z dtr "); -#endif - } - - retval = cyz_issue_cmd(card, channel, c_cm_ioctlm, 0l); - if (retval != 0) { - printk(kern_err "cyc:set_line_char(2) retval on ttyc%d " - "was %x ", info->line, retval); - } - - clear_bit(tty_io_error, &tty->flags); - } -} /* set_line_char */ - -static int cy_get_serial_info(struct tty_struct *tty, - struct serial_struct *ss) -{ - struct cyclades_port *info = tty->driver_data; - struct cyclades_card *cinfo = info->card; - - if (serial_paranoia_check(info, tty->name, "cy_ioctl")) - return -enodev; - ss->type = info->type; - ss->line = info->line; - ss->port = (info->card - cy_card) * 0x100 + info->line - - cinfo->first_line; - ss->irq = cinfo->irq; - ss->flags = info->port.flags; - ss->close_delay = info->port.close_delay; - ss->closing_wait = info->port.closing_wait; - ss->baud_base = info->baud; - ss->custom_divisor = info->custom_divisor; - return 0; -} - -static int cy_set_serial_info(struct tty_struct *tty, - struct serial_struct *ss) -{ - struct cyclades_port *info = tty->driver_data; - int old_flags; - int ret; - - if (serial_paranoia_check(info, tty->name, "cy_ioctl")) - return -enodev; - - mutex_lock(&info->port.mutex); - - old_flags = info->port.flags; - - if (!capable(cap_sys_admin)) { - if (ss->close_delay != info->port.close_delay || - ss->baud_base != info->baud || - (ss->flags & async_flags & - ~async_usr_mask) != - (info->port.flags & async_flags & ~async_usr_mask)) - { - mutex_unlock(&info->port.mutex); - return -eperm; - } - info->port.flags = (info->port.flags & ~async_usr_mask) | - (ss->flags & async_usr_mask); - info->baud = ss->baud_base; - info->custom_divisor = ss->custom_divisor; - goto check_and_exit; - } - - /* - * ok, past this point, all the error checking has been done. - * at this point, we start making changes..... - */ - - info->baud = ss->baud_base; - info->custom_divisor = ss->custom_divisor; - info->port.flags = (info->port.flags & ~async_flags) | - (ss->flags & async_flags); - info->port.close_delay = ss->close_delay * hz / 100; - info->port.closing_wait = ss->closing_wait * hz / 100; - -check_and_exit: - if (tty_port_initialized(&info->port)) { - if ((ss->flags ^ old_flags) & async_spd_mask) { - /* warn about deprecation unless clearing */ - if (ss->flags & async_spd_mask) - dev_warn_ratelimited(tty->dev, "use of spd flags is deprecated "); - } - cy_set_line_char(info, tty); - ret = 0; - } else { - ret = cy_startup(info, tty); - } - mutex_unlock(&info->port.mutex); - return ret; -} /* set_serial_info */ - -/* - * get_lsr_info - get line status register info - * - * purpose: let user call ioctl() to get info when the uart physically - * is emptied. on bus types like rs485, the transmitter must - * release the bus after transmitting. this must be done when - * the transmit shift register is empty, not be done when the - * transmit holding register is empty. this functionality - * allows an rs485 driver to be written in user space. - */ -static int get_lsr_info(struct cyclades_port *info, unsigned int __user *value) -{ - struct cyclades_card *card = info->card; - unsigned int result; - unsigned long flags; - u8 status; - - if (!cy_is_z(card)) { - spin_lock_irqsave(&card->card_lock, flags); - status = cyy_readb(info, cysrer) & (cytxrdy | cytxmpty); - spin_unlock_irqrestore(&card->card_lock, flags); - result = (status ? 0 : tiocser_temt); - } else { - /* not supported yet */ - return -einval; - } - return put_user(result, value); -} - -static int cy_tiocmget(struct tty_struct *tty) -{ - struct cyclades_port *info = tty->driver_data; - struct cyclades_card *card; - int result; - - if (serial_paranoia_check(info, tty->name, __func__)) - return -enodev; - - card = info->card; - - if (!cy_is_z(card)) { - unsigned long flags; - int channel = info->line - card->first_line; - u8 status; - - spin_lock_irqsave(&card->card_lock, flags); - cyy_writeb(info, cycar, channel & 0x03); - status = cyy_readb(info, cymsvr1); - status |= cyy_readb(info, cymsvr2); - spin_unlock_irqrestore(&card->card_lock, flags); - - if (info->rtsdtr_inv) { - result = ((status & cyrts) ? tiocm_dtr : 0) | - ((status & cydtr) ? tiocm_rts : 0); - } else { - result = ((status & cyrts) ? tiocm_rts : 0) | - ((status & cydtr) ? tiocm_dtr : 0); - } - result |= ((status & cydcd) ? tiocm_car : 0) | - ((status & cyri) ? tiocm_rng : 0) | - ((status & cydsr) ? tiocm_dsr : 0) | - ((status & cycts) ? tiocm_cts : 0); - } else { - u32 lstatus; - - if (!cyz_is_loaded(card)) { - result = -enodev; - goto end; - } - - lstatus = readl(&info->u.cyz.ch_ctrl->rs_status); - result = ((lstatus & c_rs_rts) ? tiocm_rts : 0) | - ((lstatus & c_rs_dtr) ? tiocm_dtr : 0) | - ((lstatus & c_rs_dcd) ? tiocm_car : 0) | - ((lstatus & c_rs_ri) ? tiocm_rng : 0) | - ((lstatus & c_rs_dsr) ? tiocm_dsr : 0) | - ((lstatus & c_rs_cts) ? tiocm_cts : 0); - } -end: - return result; -} /* cy_tiomget */ - -static int -cy_tiocmset(struct tty_struct *tty, - unsigned int set, unsigned int clear) -{ - struct cyclades_port *info = tty->driver_data; - struct cyclades_card *card; - unsigned long flags; - - if (serial_paranoia_check(info, tty->name, __func__)) - return -enodev; - - card = info->card; - if (!cy_is_z(card)) { - spin_lock_irqsave(&card->card_lock, flags); - cyy_change_rts_dtr(info, set, clear); - spin_unlock_irqrestore(&card->card_lock, flags); - } else { - struct ch_ctrl __iomem *ch_ctrl = info->u.cyz.ch_ctrl; - int retval, channel = info->line - card->first_line; - u32 rs; - - if (!cyz_is_loaded(card)) - return -enodev; - - spin_lock_irqsave(&card->card_lock, flags); - rs = readl(&ch_ctrl->rs_control); - if (set & tiocm_rts) - rs |= c_rs_rts; - if (clear & tiocm_rts) - rs &= ~c_rs_rts; - if (set & tiocm_dtr) { - rs |= c_rs_dtr; -#ifdef cy_debug_dtr - printk(kern_debug "cyc:set_modem_info raising z dtr "); -#endif - } - if (clear & tiocm_dtr) { - rs &= ~c_rs_dtr; -#ifdef cy_debug_dtr - printk(kern_debug "cyc:set_modem_info clearing " - "z dtr "); -#endif - } - cy_writel(&ch_ctrl->rs_control, rs); - retval = cyz_issue_cmd(card, channel, c_cm_ioctlm, 0l); - spin_unlock_irqrestore(&card->card_lock, flags); - if (retval != 0) { - printk(kern_err "cyc:set_modem_info retval on ttyc%d " - "was %x ", info->line, retval); - } - } - return 0; -} - -/* - * cy_break() --- routine which turns the break handling on or off - */ -static int cy_break(struct tty_struct *tty, int break_state) -{ - struct cyclades_port *info = tty->driver_data; - struct cyclades_card *card; - unsigned long flags; - int retval = 0; - - if (serial_paranoia_check(info, tty->name, "cy_break")) - return -einval; - - card = info->card; - - spin_lock_irqsave(&card->card_lock, flags); - if (!cy_is_z(card)) { - /* let the transmit isr take care of this (since it - requires stuffing characters into the output stream). - */ - if (break_state == -1) { - if (!info->breakon) { - info->breakon = 1; - if (!info->xmit_cnt) { - spin_unlock_irqrestore(&card->card_lock, flags); - start_xmit(info); - spin_lock_irqsave(&card->card_lock, flags); - } - } - } else { - if (!info->breakoff) { - info->breakoff = 1; - if (!info->xmit_cnt) { - spin_unlock_irqrestore(&card->card_lock, flags); - start_xmit(info); - spin_lock_irqsave(&card->card_lock, flags); - } - } - } - } else { - if (break_state == -1) { - retval = cyz_issue_cmd(card, - info->line - card->first_line, - c_cm_set_break, 0l); - if (retval != 0) { - printk(kern_err "cyc:cy_break (set) retval on " - "ttyc%d was %x ", info->line, retval); - } - } else { - retval = cyz_issue_cmd(card, - info->line - card->first_line, - c_cm_clr_break, 0l); - if (retval != 0) { - printk(kern_debug "cyc:cy_break (clr) retval " - "on ttyc%d was %x ", info->line, - retval); - } - } - } - spin_unlock_irqrestore(&card->card_lock, flags); - return retval; -} /* cy_break */ - -static int set_threshold(struct cyclades_port *info, unsigned long value) -{ - struct cyclades_card *card = info->card; - unsigned long flags; - - if (!cy_is_z(card)) { - info->cor3 &= ~cyrec_fifo; - info->cor3 |= value & cyrec_fifo; - - spin_lock_irqsave(&card->card_lock, flags); - cyy_writeb(info, cycor3, info->cor3); - cyy_issue_cmd(info, cycor_change | cycor3ch); - spin_unlock_irqrestore(&card->card_lock, flags); - } - return 0; -} /* set_threshold */ - -static int get_threshold(struct cyclades_port *info, - unsigned long __user *value) -{ - struct cyclades_card *card = info->card; - - if (!cy_is_z(card)) { - u8 tmp = cyy_readb(info, cycor3) & cyrec_fifo; - return put_user(tmp, value); - } - return 0; -} /* get_threshold */ - -static int set_timeout(struct cyclades_port *info, unsigned long value) -{ - struct cyclades_card *card = info->card; - unsigned long flags; - - if (!cy_is_z(card)) { - spin_lock_irqsave(&card->card_lock, flags); - cyy_writeb(info, cyrtpr, value & 0xff); - spin_unlock_irqrestore(&card->card_lock, flags); - } - return 0; -} /* set_timeout */ - -static int get_timeout(struct cyclades_port *info, - unsigned long __user *value) -{ - struct cyclades_card *card = info->card; - - if (!cy_is_z(card)) { - u8 tmp = cyy_readb(info, cyrtpr); - return put_user(tmp, value); - } - return 0; -} /* get_timeout */ - -static int cy_cflags_changed(struct cyclades_port *info, unsigned long arg, - struct cyclades_icount *cprev) -{ - struct cyclades_icount cnow; - unsigned long flags; - int ret; - - spin_lock_irqsave(&info->card->card_lock, flags); - cnow = info->icount; /* atomic copy */ - spin_unlock_irqrestore(&info->card->card_lock, flags); - - ret = ((arg & tiocm_rng) && (cnow.rng != cprev->rng)) || - ((arg & tiocm_dsr) && (cnow.dsr != cprev->dsr)) || - ((arg & tiocm_cd) && (cnow.dcd != cprev->dcd)) || - ((arg & tiocm_cts) && (cnow.cts != cprev->cts)); - - *cprev = cnow; - - return ret; -} - -/* - * this routine allows the tty driver to implement device- - * specific ioctl's. if the ioctl number passed in cmd is - * not recognized by the driver, it should return enoioctlcmd. - */ -static int -cy_ioctl(struct tty_struct *tty, - unsigned int cmd, unsigned long arg) -{ - struct cyclades_port *info = tty->driver_data; - struct cyclades_icount cnow; /* kernel counter temps */ - int ret_val = 0; - unsigned long flags; - void __user *argp = (void __user *)arg; - - if (serial_paranoia_check(info, tty->name, "cy_ioctl")) - return -enodev; - -#ifdef cy_debug_other - printk(kern_debug "cyc:cy_ioctl ttyc%d, cmd = %x arg = %lx ", - info->line, cmd, arg); -#endif - - switch (cmd) { - case cygetmon: - if (copy_to_user(argp, &info->mon, sizeof(info->mon))) { - ret_val = -efault; - break; - } - memset(&info->mon, 0, sizeof(info->mon)); - break; - case cygetthresh: - ret_val = get_threshold(info, argp); - break; - case cysetthresh: - ret_val = set_threshold(info, arg); - break; - case cygetdefthresh: - ret_val = put_user(info->default_threshold, - (unsigned long __user *)argp); - break; - case cysetdefthresh: - info->default_threshold = arg & 0x0f; - break; - case cygettimeout: - ret_val = get_timeout(info, argp); - break; - case cysettimeout: - ret_val = set_timeout(info, arg); - break; - case cygetdeftimeout: - ret_val = put_user(info->default_timeout, - (unsigned long __user *)argp); - break; - case cysetdeftimeout: - info->default_timeout = arg & 0xff; - break; - case cysetrflow: - info->rflow = (int)arg; - break; - case cygetrflow: - ret_val = info->rflow; - break; - case cysetrtsdtr_inv: - info->rtsdtr_inv = (int)arg; - break; - case cygetrtsdtr_inv: - ret_val = info->rtsdtr_inv; - break; - case cygetcd1400ver: - ret_val = info->chip_rev; - break; -#ifndef config_cyz_intr - case cyzsetpollcycle: - if (arg > long_max / hz) - return -enodev; - cyz_polling_cycle = (arg * hz) / 1000; - break; - case cyzgetpollcycle: - ret_val = (cyz_polling_cycle * 1000) / hz; - break; -#endif /* config_cyz_intr */ - case cysetwait: - info->port.closing_wait = (unsigned short)arg * hz / 100; - break; - case cygetwait: - ret_val = info->port.closing_wait / (hz / 100); - break; - case tiocsergetlsr: /* get line status register */ - ret_val = get_lsr_info(info, argp); - break; - /* - * wait for any of the 4 modem inputs (dcd,ri,dsr,cts) to change - * - mask passed in arg for lines of interest - * (use |'ed tiocm_rng/dsr/cd/cts for masking) - * caller should use tiocgicount to see which one it was - */ - case tiocmiwait: - spin_lock_irqsave(&info->card->card_lock, flags); - /* note the counters on entry */ - cnow = info->icount; - spin_unlock_irqrestore(&info->card->card_lock, flags); - ret_val = wait_event_interruptible(info->port.delta_msr_wait, - cy_cflags_changed(info, arg, &cnow)); - break; - - /* - * get counter of input serial line interrupts (dcd,ri,dsr,cts) - * return: write counters to the user passed counter struct - * nb: both 1->0 and 0->1 transitions are counted except for - * ri where only 0->1 is counted. - */ - default: - ret_val = -enoioctlcmd; - } - -#ifdef cy_debug_other - printk(kern_debug "cyc:cy_ioctl done "); -#endif - return ret_val; -} /* cy_ioctl */ - -static int cy_get_icount(struct tty_struct *tty, - struct serial_icounter_struct *sic) -{ - struct cyclades_port *info = tty->driver_data; - struct cyclades_icount cnow; /* used to snapshot */ - unsigned long flags; - - spin_lock_irqsave(&info->card->card_lock, flags); - cnow = info->icount; - spin_unlock_irqrestore(&info->card->card_lock, flags); - - sic->cts = cnow.cts; - sic->dsr = cnow.dsr; - sic->rng = cnow.rng; - sic->dcd = cnow.dcd; - sic->rx = cnow.rx; - sic->tx = cnow.tx; - sic->frame = cnow.frame; - sic->overrun = cnow.overrun; - sic->parity = cnow.parity; - sic->brk = cnow.brk; - sic->buf_overrun = cnow.buf_overrun; - return 0; -} - -/* - * this routine allows the tty driver to be notified when - * device's termios settings have changed. note that a - * well-designed tty driver should be prepared to accept the case - * where old == null, and try to do something rational. - */ -static void cy_set_termios(struct tty_struct *tty, struct ktermios *old_termios) -{ - struct cyclades_port *info = tty->driver_data; - -#ifdef cy_debug_other - printk(kern_debug "cyc:cy_set_termios ttyc%d ", info->line); -#endif - - cy_set_line_char(info, tty); - - if ((old_termios->c_cflag & crtscts) && !c_crtscts(tty)) { - tty->hw_stopped = 0; - cy_start(tty); - } -#if 0 - /* - * no need to wake up processes in open wait, since they - * sample the clocal flag once, and don't recheck it. - * xxx it's not clear whether the current behavior is correct - * or not. hence, this may change..... - */ - if (!(old_termios->c_cflag & clocal) && c_clocal(tty)) - wake_up_interruptible(&info->port.open_wait); -#endif -} /* cy_set_termios */ - -/* this function is used to send a high-priority xon/xoff character to - the device. -*/ -static void cy_send_xchar(struct tty_struct *tty, char ch) -{ - struct cyclades_port *info = tty->driver_data; - struct cyclades_card *card; - int channel; - - if (serial_paranoia_check(info, tty->name, "cy_send_xchar")) - return; - - info->x_char = ch; - - if (ch) - cy_start(tty); - - card = info->card; - channel = info->line - card->first_line; - - if (cy_is_z(card)) { - if (ch == stop_char(tty)) - cyz_issue_cmd(card, channel, c_cm_sendxoff, 0l); - else if (ch == start_char(tty)) - cyz_issue_cmd(card, channel, c_cm_sendxon, 0l); - } -} - -/* this routine is called by the upper-layer tty layer to signal - that incoming characters should be throttled because the input - buffers are close to full. - */ -static void cy_throttle(struct tty_struct *tty) -{ - struct cyclades_port *info = tty->driver_data; - struct cyclades_card *card; - unsigned long flags; - -#ifdef cy_debug_throttle - printk(kern_debug "cyc:throttle %s ...ttyc%d ", tty_name(tty), - info->line); -#endif - - if (serial_paranoia_check(info, tty->name, "cy_throttle")) - return; - - card = info->card; - - if (i_ixoff(tty)) { - if (!cy_is_z(card)) - cy_send_xchar(tty, stop_char(tty)); - else - info->throttle = 1; - } - - if (c_crtscts(tty)) { - if (!cy_is_z(card)) { - spin_lock_irqsave(&card->card_lock, flags); - cyy_change_rts_dtr(info, 0, tiocm_rts); - spin_unlock_irqrestore(&card->card_lock, flags); - } else { - info->throttle = 1; - } - } -} /* cy_throttle */ - -/* - * this routine notifies the tty driver that it should signal - * that characters can now be sent to the tty without fear of - * overrunning the input buffers of the line disciplines. - */ -static void cy_unthrottle(struct tty_struct *tty) -{ - struct cyclades_port *info = tty->driver_data; - struct cyclades_card *card; - unsigned long flags; - -#ifdef cy_debug_throttle - printk(kern_debug "cyc:unthrottle %s ...ttyc%d ", - tty_name(tty), info->line); -#endif - - if (serial_paranoia_check(info, tty->name, "cy_unthrottle")) - return; - - if (i_ixoff(tty)) { - if (info->x_char) - info->x_char = 0; - else - cy_send_xchar(tty, start_char(tty)); - } - - if (c_crtscts(tty)) { - card = info->card; - if (!cy_is_z(card)) { - spin_lock_irqsave(&card->card_lock, flags); - cyy_change_rts_dtr(info, tiocm_rts, 0); - spin_unlock_irqrestore(&card->card_lock, flags); - } else { - info->throttle = 0; - } - } -} /* cy_unthrottle */ - -/* cy_start and cy_stop provide software output flow control as a - function of xon/xoff, software cts, and other such stuff. -*/ -static void cy_stop(struct tty_struct *tty) -{ - struct cyclades_card *cinfo; - struct cyclades_port *info = tty->driver_data; - int channel; - unsigned long flags; - -#ifdef cy_debug_other - printk(kern_debug "cyc:cy_stop ttyc%d ", info->line); -#endif - - if (serial_paranoia_check(info, tty->name, "cy_stop")) - return; - - cinfo = info->card; - channel = info->line - cinfo->first_line; - if (!cy_is_z(cinfo)) { - spin_lock_irqsave(&cinfo->card_lock, flags); - cyy_writeb(info, cycar, channel & 0x03); - cyy_writeb(info, cysrer, cyy_readb(info, cysrer) & ~cytxrdy); - spin_unlock_irqrestore(&cinfo->card_lock, flags); - } -} /* cy_stop */ - -static void cy_start(struct tty_struct *tty) -{ - struct cyclades_card *cinfo; - struct cyclades_port *info = tty->driver_data; - int channel; - unsigned long flags; - -#ifdef cy_debug_other - printk(kern_debug "cyc:cy_start ttyc%d ", info->line); -#endif - - if (serial_paranoia_check(info, tty->name, "cy_start")) - return; - - cinfo = info->card; - channel = info->line - cinfo->first_line; - if (!cy_is_z(cinfo)) { - spin_lock_irqsave(&cinfo->card_lock, flags); - cyy_writeb(info, cycar, channel & 0x03); - cyy_writeb(info, cysrer, cyy_readb(info, cysrer) | cytxrdy); - spin_unlock_irqrestore(&cinfo->card_lock, flags); - } -} /* cy_start */ - -/* - * cy_hangup() --- called by tty_hangup() when a hangup is signaled. - */ -static void cy_hangup(struct tty_struct *tty) -{ - struct cyclades_port *info = tty->driver_data; - -#ifdef cy_debug_other - printk(kern_debug "cyc:cy_hangup ttyc%d ", info->line); -#endif - - if (serial_paranoia_check(info, tty->name, "cy_hangup")) - return; - - cy_flush_buffer(tty); - cy_shutdown(info, tty); - tty_port_hangup(&info->port); -} /* cy_hangup */ - -static int cyy_carrier_raised(struct tty_port *port) -{ - struct cyclades_port *info = container_of(port, struct cyclades_port, - port); - struct cyclades_card *cinfo = info->card; - unsigned long flags; - int channel = info->line - cinfo->first_line; - u32 cd; - - spin_lock_irqsave(&cinfo->card_lock, flags); - cyy_writeb(info, cycar, channel & 0x03); - cd = cyy_readb(info, cymsvr1) & cydcd; - spin_unlock_irqrestore(&cinfo->card_lock, flags); - - return cd; -} - -static void cyy_dtr_rts(struct tty_port *port, int raise) -{ - struct cyclades_port *info = container_of(port, struct cyclades_port, - port); - struct cyclades_card *cinfo = info->card; - unsigned long flags; - - spin_lock_irqsave(&cinfo->card_lock, flags); - cyy_change_rts_dtr(info, raise ? tiocm_rts | tiocm_dtr : 0, - raise ? 0 : tiocm_rts | tiocm_dtr); - spin_unlock_irqrestore(&cinfo->card_lock, flags); -} - -static int cyz_carrier_raised(struct tty_port *port) -{ - struct cyclades_port *info = container_of(port, struct cyclades_port, - port); - - return readl(&info->u.cyz.ch_ctrl->rs_status) & c_rs_dcd; -} - -static void cyz_dtr_rts(struct tty_port *port, int raise) -{ - struct cyclades_port *info = container_of(port, struct cyclades_port, - port); - struct cyclades_card *cinfo = info->card; - struct ch_ctrl __iomem *ch_ctrl = info->u.cyz.ch_ctrl; - int ret, channel = info->line - cinfo->first_line; - u32 rs; - - rs = readl(&ch_ctrl->rs_control); - if (raise) - rs |= c_rs_rts | c_rs_dtr; - else - rs &= ~(c_rs_rts | c_rs_dtr); - cy_writel(&ch_ctrl->rs_control, rs); - ret = cyz_issue_cmd(cinfo, channel, c_cm_ioctlm, 0l); - if (ret != 0) - printk(kern_err "%s: retval on ttyc%d was %x ", - __func__, info->line, ret); -#ifdef cy_debug_dtr - printk(kern_debug "%s: raising z dtr ", __func__); -#endif -} - -static const struct tty_port_operations cyy_port_ops = { - .carrier_raised = cyy_carrier_raised, - .dtr_rts = cyy_dtr_rts, - .shutdown = cy_do_close, -}; - -static const struct tty_port_operations cyz_port_ops = { - .carrier_raised = cyz_carrier_raised, - .dtr_rts = cyz_dtr_rts, - .shutdown = cy_do_close, -}; - -/* - * --------------------------------------------------------------------- - * cy_init() and friends - * - * cy_init() is called at boot-time to initialize the serial driver. - * --------------------------------------------------------------------- - */ - -static int cy_init_card(struct cyclades_card *cinfo) -{ - struct cyclades_port *info; - unsigned int channel, port; - - spin_lock_init(&cinfo->card_lock); - cinfo->intr_enabled = 0; - - cinfo->ports = kcalloc(cinfo->nports, sizeof(*cinfo->ports), - gfp_kernel); - if (cinfo->ports == null) { - printk(kern_err "cyclades: cannot allocate ports "); - return -enomem; - } - - for (channel = 0, port = cinfo->first_line; channel < cinfo->nports; - channel++, port++) { - info = &cinfo->ports[channel]; - tty_port_init(&info->port); - info->magic = cyclades_magic; - info->card = cinfo; - info->line = port; - - info->port.closing_wait = closing_wait_delay; - info->port.close_delay = 5 * hz / 10; - init_completion(&info->shutdown_wait); - - if (cy_is_z(cinfo)) { - struct firm_id *firm_id = cinfo->base_addr + id_address; - struct zfw_ctrl *zfw_ctrl; - - info->port.ops = &cyz_port_ops; - info->type = port_startech; - - zfw_ctrl = cinfo->base_addr + - (readl(&firm_id->zfwctrl_addr) & 0xfffff); - info->u.cyz.ch_ctrl = &zfw_ctrl->ch_ctrl[channel]; - info->u.cyz.buf_ctrl = &zfw_ctrl->buf_ctrl[channel]; - - if (cinfo->hw_ver == zo_v1) - info->xmit_fifo_size = cyz_fifo_size; - else - info->xmit_fifo_size = 4 * cyz_fifo_size; -#ifdef config_cyz_intr - timer_setup(&info->rx_full_timer, cyz_rx_restart, 0); -#endif - } else { - unsigned short chip_number; - int index = cinfo->bus_index; - - info->port.ops = &cyy_port_ops; - info->type = port_cirrus; - info->xmit_fifo_size = cymax_char_fifo; - info->cor1 = cyparity_none | cy_1_stop | cy_8_bits; - info->cor2 = cyetc; - info->cor3 = 0x08; /* _very_ small rcv threshold */ - - chip_number = channel / cyports_per_chip; - info->u.cyy.base_addr = cinfo->base_addr + - (cy_chip_offset[chip_number] << index); - info->chip_rev = cyy_readb(info, cygfrcr); - - if (info->chip_rev >= cd1400_rev_j) { - /* it is a cd1400 rev. j or later */ - info->tbpr = baud_bpr_60[13]; /* tx bpr */ - info->tco = baud_co_60[13]; /* tx co */ - info->rbpr = baud_bpr_60[13]; /* rx bpr */ - info->rco = baud_co_60[13]; /* rx co */ - info->rtsdtr_inv = 1; - } else { - info->tbpr = baud_bpr_25[13]; /* tx bpr */ - info->tco = baud_co_25[13]; /* tx co */ - info->rbpr = baud_bpr_25[13]; /* rx bpr */ - info->rco = baud_co_25[13]; /* rx co */ - info->rtsdtr_inv = 0; - } - info->read_status_mask = cytimeout | cyspechar | - cybreak | cyparity | cyframe | cyoverrun; - } - - } - -#ifndef config_cyz_intr - if (cy_is_z(cinfo) && !timer_pending(&cyz_timerlist)) { - mod_timer(&cyz_timerlist, jiffies + 1); -#ifdef cy_pci_debug - printk(kern_debug "cyclades-z polling initialized "); -#endif - } -#endif - return 0; -} - -/* initialize chips on cyclom-y card -- return number of valid - chips (which is number of ports/4) */ -static unsigned short cyy_init_card(void __iomem *true_base_addr, - int index) -{ - unsigned int chip_number; - void __iomem *base_addr; - - cy_writeb(true_base_addr + (cy_hwreset << index), 0); - /* cy_hwreset is 0x1400 */ - cy_writeb(true_base_addr + (cy_clrintr << index), 0); - /* cy_clrintr is 0x1800 */ - udelay(500l); - - for (chip_number = 0; chip_number < cymax_chips_per_card; - chip_number++) { - base_addr = - true_base_addr + (cy_chip_offset[chip_number] << index); - mdelay(1); - if (readb(base_addr + (cyccr << index)) != 0x00) { - /************* - printk(" chip #%d at %#6lx is never idle (ccr != 0) ", - chip_number, (unsigned long)base_addr); - *************/ - return chip_number; - } - - cy_writeb(base_addr + (cygfrcr << index), 0); - udelay(10l); - - /* the cyclom-16y does not decode address bit 9 and therefore - cannot distinguish between references to chip 0 and a non- - existent chip 4. if the preceding clearing of the supposed - chip 4 gfrcr register appears at chip 0, there is no chip 4 - and this must be a cyclom-16y, not a cyclom-32ye. - */ - if (chip_number == 4 && readb(true_base_addr + - (cy_chip_offset[0] << index) + - (cygfrcr << index)) == 0) { - return chip_number; - } - - cy_writeb(base_addr + (cyccr << index), cychip_reset); - mdelay(1); - - if (readb(base_addr + (cygfrcr << index)) == 0x00) { - /* - printk(" chip #%d at %#6lx is not responding ", - chip_number, (unsigned long)base_addr); - printk("(gfrcr stayed 0) ", - */ - return chip_number; - } - if ((0xf0 & (readb(base_addr + (cygfrcr << index)))) != - 0x40) { - /* - printk(" chip #%d at %#6lx is not valid (gfrcr == " - "%#2x) ", - chip_number, (unsigned long)base_addr, - base_addr[cygfrcr<<index]); - */ - return chip_number; - } - cy_writeb(base_addr + (cygcr << index), cych0_serial); - if (readb(base_addr + (cygfrcr << index)) >= cd1400_rev_j) { - /* it is a cd1400 rev. j or later */ - /* impossible to reach 5ms with this chip. - changed to 2ms instead (f = 500 hz). */ - cy_writeb(base_addr + (cyppr << index), cyclock_60_2ms); - } else { - /* f = 200 hz */ - cy_writeb(base_addr + (cyppr << index), cyclock_25_5ms); - } - - /* - printk(" chip #%d at %#6lx is rev 0x%2x ", - chip_number, (unsigned long)base_addr, - readb(base_addr+(cygfrcr<<index))); - */ - } - return chip_number; -} /* cyy_init_card */ - -/* - * --------------------------------------------------------------------- - * cy_detect_isa() - probe for cyclom-y/isa boards. - * sets global variables and return the number of isa boards found. - * --------------------------------------------------------------------- - */ -static int __init cy_detect_isa(void) -{ -#ifdef config_isa - struct cyclades_card *card; - unsigned short cy_isa_irq, nboard; - void __iomem *cy_isa_address; - unsigned short i, j, k, cy_isa_nchan; - int isparam = 0; - - nboard = 0; - - /* check for module parameters */ - for (i = 0; i < nr_cards; i++) { - if (maddr[i] || i) { - isparam = 1; - cy_isa_addresses[i] = maddr[i]; - } - if (!maddr[i]) - break; - } - - /* scan the address table probing for cyclom-y/isa boards */ - for (i = 0; i < nr_isa_addrs; i++) { - unsigned int isa_address = cy_isa_addresses[i]; - if (isa_address == 0x0000) - return nboard; - - /* probe for cd1400... */ - cy_isa_address = ioremap(isa_address, cyisa_ywin); - if (cy_isa_address == null) { - printk(kern_err "cyclom-y/isa: can't remap base " - "address "); - continue; - } - cy_isa_nchan = cyports_per_chip * - cyy_init_card(cy_isa_address, 0); - if (cy_isa_nchan == 0) { - iounmap(cy_isa_address); - continue; - } - - if (isparam && i < nr_cards && irq[i]) - cy_isa_irq = irq[i]; - else - /* find out the board's irq by probing */ - cy_isa_irq = detect_isa_irq(cy_isa_address); - if (cy_isa_irq == 0) { - printk(kern_err "cyclom-y/isa found at 0x%lx, but the " - "irq could not be detected. ", - (unsigned long)cy_isa_address); - iounmap(cy_isa_address); - continue; - } - - if ((cy_next_channel + cy_isa_nchan) > nr_ports) { - printk(kern_err "cyclom-y/isa found at 0x%lx, but no " - "more channels are available. change nr_ports " - "in cyclades.c and recompile kernel. ", - (unsigned long)cy_isa_address); - iounmap(cy_isa_address); - return nboard; - } - /* fill the next cy_card structure available */ - for (j = 0; j < nr_cards; j++) { - card = &cy_card[j]; - if (card->base_addr == null) - break; - } - if (j == nr_cards) { /* no more cy_cards available */ - printk(kern_err "cyclom-y/isa found at 0x%lx, but no " - "more cards can be used. change nr_cards in " - "cyclades.c and recompile kernel. ", - (unsigned long)cy_isa_address); - iounmap(cy_isa_address); - return nboard; - } - - /* allocate irq */ - if (request_irq(cy_isa_irq, cyy_interrupt, - 0, "cyclom-y", card)) { - printk(kern_err "cyclom-y/isa found at 0x%lx, but " - "could not allocate irq#%d. ", - (unsigned long)cy_isa_address, cy_isa_irq); - iounmap(cy_isa_address); - return nboard; - } - - /* set cy_card */ - card->base_addr = cy_isa_address; - card->ctl_addr.p9050 = null; - card->irq = (int)cy_isa_irq; - card->bus_index = 0; - card->first_line = cy_next_channel; - card->num_chips = cy_isa_nchan / cyports_per_chip; - card->nports = cy_isa_nchan; - if (cy_init_card(card)) { - card->base_addr = null; - free_irq(cy_isa_irq, card); - iounmap(cy_isa_address); - continue; - } - nboard++; - - printk(kern_info "cyclom-y/isa #%d: 0x%lx-0x%lx, irq%d found: " - "%d channels starting from port %d ", - j + 1, (unsigned long)cy_isa_address, - (unsigned long)(cy_isa_address + (cyisa_ywin - 1)), - cy_isa_irq, cy_isa_nchan, cy_next_channel); - - for (k = 0, j = cy_next_channel; - j < cy_next_channel + cy_isa_nchan; j++, k++) - tty_port_register_device(&card->ports[k].port, - cy_serial_driver, j, null); - cy_next_channel += cy_isa_nchan; - } - return nboard; -#else - return 0; -#endif /* config_isa */ -} /* cy_detect_isa */ - -#ifdef config_pci -static inline int cyc_isfwstr(const char *str, unsigned int size) -{ - unsigned int a; - - for (a = 0; a < size && *str; a++, str++) - if (*str & 0x80) - return -einval; - - for (; a < size; a++, str++) - if (*str) - return -einval; - - return 0; -} - -static inline void cyz_fpga_copy(void __iomem *fpga, const u8 *data, - unsigned int size) -{ - for (; size > 0; size--) { - cy_writel(fpga, *data++); - udelay(10); - } -} - -static void plx_init(struct pci_dev *pdev, int irq, - struct runtime_9060 __iomem *addr) -{ - /* reset plx */ - cy_writel(&addr->init_ctrl, readl(&addr->init_ctrl) | 0x40000000); - udelay(100l); - cy_writel(&addr->init_ctrl, readl(&addr->init_ctrl) & ~0x40000000); - - /* reload config. registers from eeprom */ - cy_writel(&addr->init_ctrl, readl(&addr->init_ctrl) | 0x20000000); - udelay(100l); - cy_writel(&addr->init_ctrl, readl(&addr->init_ctrl) & ~0x20000000); - - /* for some yet unknown reason, once the plx9060 reloads the eeprom, - * the irq is lost and, thus, we have to re-write it to the pci config. - * registers. this will remain here until we find a permanent fix. - */ - pci_write_config_byte(pdev, pci_interrupt_line, irq); -} - -static int __cyz_load_fw(const struct firmware *fw, - const char *name, const u32 mailbox, void __iomem *base, - void __iomem *fpga) -{ - const void *ptr = fw->data; - const struct zfile_header *h = ptr; - const struct zfile_config *c, *cs; - const struct zfile_block *b, *bs; - unsigned int a, tmp, len = fw->size; -#define bad_fw kern_err "bad firmware: " - if (len < sizeof(*h)) { - printk(bad_fw "too short: %u<%zu ", len, sizeof(*h)); - return -einval; - } - - cs = ptr + h->config_offset; - bs = ptr + h->block_offset; - - if ((void *)(cs + h->n_config) > ptr + len || - (void *)(bs + h->n_blocks) > ptr + len) { - printk(bad_fw "too short"); - return -einval; - } - - if (cyc_isfwstr(h->name, sizeof(h->name)) || - cyc_isfwstr(h->date, sizeof(h->date))) { - printk(bad_fw "bad formatted header string "); - return -einval; - } - - if (strncmp(name, h->name, sizeof(h->name))) { - printk(bad_fw "bad name '%s' (expected '%s') ", h->name, name); - return -einval; - } - - tmp = 0; - for (c = cs; c < cs + h->n_config; c++) { - for (a = 0; a < c->n_blocks; a++) - if (c->block_list[a] > h->n_blocks) { - printk(bad_fw "bad block ref number in cfgs "); - return -einval; - } - if (c->mailbox == mailbox && c->function == 0) /* 0 is normal */ - tmp++; - } - if (!tmp) { - printk(bad_fw "nothing appropriate "); - return -einval; - } - - for (b = bs; b < bs + h->n_blocks; b++) - if (b->file_offset + b->size > len) { - printk(bad_fw "bad block data offset "); - return -einval; - } - - /* everything is ok, let's seek'n'load it */ - for (c = cs; c < cs + h->n_config; c++) - if (c->mailbox == mailbox && c->function == 0) - break; - - for (a = 0; a < c->n_blocks; a++) { - b = &bs[c->block_list[a]]; - if (b->type == zblock_fpga) { - if (fpga != null) - cyz_fpga_copy(fpga, ptr + b->file_offset, - b->size); - } else { - if (base != null) - memcpy_toio(base + b->ram_offset, - ptr + b->file_offset, b->size); - } - } -#undef bad_fw - return 0; -} - -static int cyz_load_fw(struct pci_dev *pdev, void __iomem *base_addr, - struct runtime_9060 __iomem *ctl_addr, int irq) -{ - const struct firmware *fw; - struct firm_id __iomem *fid = base_addr + id_address; - struct custom_reg __iomem *cust = base_addr; - struct zfw_ctrl __iomem *pt_zfwctrl; - void __iomem *tmp; - u32 mailbox, status, nchan; - unsigned int i; - int retval; - - retval = request_firmware(&fw, "cyzfirm.bin", &pdev->dev); - if (retval) { - dev_err(&pdev->dev, "can't get firmware "); - goto err; - } - - /* check whether the firmware is already loaded and running. if - positive, skip this board */ - if (__cyz_fpga_loaded(ctl_addr) && readl(&fid->signature) == zfirm_id) { - u32 cntval = readl(base_addr + 0x190); - - udelay(100); - if (cntval != readl(base_addr + 0x190)) { - /* fw counter is working, fw is running */ - dev_dbg(&pdev->dev, "cyclades-z fw already loaded. " - "skipping board. "); - retval = 0; - goto err_rel; - } - } - - /* start boot */ - cy_writel(&ctl_addr->intr_ctrl_stat, readl(&ctl_addr->intr_ctrl_stat) & - ~0x00030800ul); - - mailbox = readl(&ctl_addr->mail_box_0); - - if (mailbox == 0 || __cyz_fpga_loaded(ctl_addr)) { - /* stops cpu and set window to beginning of ram */ - cy_writel(&ctl_addr->loc_addr_base, win_creg); - cy_writel(&cust->cpu_stop, 0); - cy_writel(&ctl_addr->loc_addr_base, win_ram); - udelay(100); - } - - plx_init(pdev, irq, ctl_addr); - - if (mailbox != 0) { - /* load fpga */ - retval = __cyz_load_fw(fw, "cyclom-z", mailbox, null, - base_addr); - if (retval) - goto err_rel; - if (!__cyz_fpga_loaded(ctl_addr)) { - dev_err(&pdev->dev, "fw upload successful, but fw is " - "not loaded "); - goto err_rel; - } - } - - /* stops cpu and set window to beginning of ram */ - cy_writel(&ctl_addr->loc_addr_base, win_creg); - cy_writel(&cust->cpu_stop, 0); - cy_writel(&ctl_addr->loc_addr_base, win_ram); - udelay(100); - - /* clear memory */ - for (tmp = base_addr; tmp < base_addr + ram_size; tmp++) - cy_writeb(tmp, 255); - if (mailbox != 0) { - /* set window to last 512k of ram */ - cy_writel(&ctl_addr->loc_addr_base, win_ram + ram_size); - for (tmp = base_addr; tmp < base_addr + ram_size; tmp++) - cy_writeb(tmp, 255); - /* set window to beginning of ram */ - cy_writel(&ctl_addr->loc_addr_base, win_ram); - } - - retval = __cyz_load_fw(fw, "cyclom-z", mailbox, base_addr, null); - release_firmware(fw); - if (retval) - goto err; - - /* finish boot and start boards */ - cy_writel(&ctl_addr->loc_addr_base, win_creg); - cy_writel(&cust->cpu_start, 0); - cy_writel(&ctl_addr->loc_addr_base, win_ram); - i = 0; - while ((status = readl(&fid->signature)) != zfirm_id && i++ < 40) - msleep(100); - if (status != zfirm_id) { - if (status == zfirm_hlt) { - dev_err(&pdev->dev, "you need an external power supply " - "for this number of ports. firmware halted and " - "board reset. "); - retval = -eio; - goto err; - } - dev_warn(&pdev->dev, "fid->signature = 0x%x... waiting " - "some more time ", status); - while ((status = readl(&fid->signature)) != zfirm_id && - i++ < 200) - msleep(100); - if (status != zfirm_id) { - dev_err(&pdev->dev, "board not started in 20 seconds! " - "giving up. (fid->signature = 0x%x) ", - status); - dev_info(&pdev->dev, "*** warning ***: if you are " - "upgrading the fw, please power cycle the " - "system before loading the new fw to the " - "cyclades-z. "); - - if (__cyz_fpga_loaded(ctl_addr)) - plx_init(pdev, irq, ctl_addr); - - retval = -eio; - goto err; - } - dev_dbg(&pdev->dev, "firmware started after %d seconds. ", - i / 10); - } - pt_zfwctrl = base_addr + readl(&fid->zfwctrl_addr); - - dev_dbg(&pdev->dev, "fid=> %p, zfwctrl_addr=> %x, npt_zfwctrl=> %p ", - base_addr + id_address, readl(&fid->zfwctrl_addr), - base_addr + readl(&fid->zfwctrl_addr)); - - nchan = readl(&pt_zfwctrl->board_ctrl.n_channel); - dev_info(&pdev->dev, "cyclades-z fw loaded: version = %x, ports = %u ", - readl(&pt_zfwctrl->board_ctrl.fw_version), nchan); - - if (nchan == 0) { - dev_warn(&pdev->dev, "no cyclades-z ports were found. please " - "check the connection between the z host card and the " - "serial expanders. "); - - if (__cyz_fpga_loaded(ctl_addr)) - plx_init(pdev, irq, ctl_addr); - - dev_info(&pdev->dev, "null number of ports detected. board " - "reset. "); - retval = 0; - goto err; - } - - cy_writel(&pt_zfwctrl->board_ctrl.op_system, c_os_linux); - cy_writel(&pt_zfwctrl->board_ctrl.dr_version, driver_version); - - /* - early firmware failed to start looking for commands. - this enables firmware interrupts for those commands. - */ - cy_writel(&ctl_addr->intr_ctrl_stat, readl(&ctl_addr->intr_ctrl_stat) | - (1 << 17)); - cy_writel(&ctl_addr->intr_ctrl_stat, readl(&ctl_addr->intr_ctrl_stat) | - 0x00030800ul); - - return nchan; -err_rel: - release_firmware(fw); -err: - return retval; -} - -static int cy_pci_probe(struct pci_dev *pdev, - const struct pci_device_id *ent) -{ - struct cyclades_card *card; - void __iomem *addr0 = null, *addr2 = null; - char *card_name = null; - u32 mailbox; - unsigned int device_id, nchan = 0, card_no, i, j; - unsigned char plx_ver; - int retval, irq; - - retval = pci_enable_device(pdev); - if (retval) { - dev_err(&pdev->dev, "cannot enable device "); - goto err; - } - - /* read pci configuration area */ - irq = pdev->irq; - device_id = pdev->device & ~pci_device_id_mask; - -#if defined(__alpha__) - if (device_id == pci_device_id_cyclom_y_lo) { /* below 1m? */ - dev_err(&pdev->dev, "cyclom-y/pci not supported for low " - "addresses on alpha systems. "); - retval = -eio; - goto err_dis; - } -#endif - if (device_id == pci_device_id_cyclom_z_lo) { - dev_err(&pdev->dev, "cyclades-z/pci not supported for low " - "addresses "); - retval = -eio; - goto err_dis; - } - - if (pci_resource_flags(pdev, 2) & ioresource_io) { - dev_warn(&pdev->dev, "pci i/o bit incorrectly set. ignoring " - "it... "); - pdev->resource[2].flags &= ~ioresource_io; - } - - retval = pci_request_regions(pdev, "cyclades"); - if (retval) { - dev_err(&pdev->dev, "failed to reserve resources "); - goto err_dis; - } - - retval = -eio; - if (device_id == pci_device_id_cyclom_y_lo || - device_id == pci_device_id_cyclom_y_hi) { - card_name = "cyclom-y"; - - addr0 = ioremap(pci_resource_start(pdev, 0), - cypci_yctl); - if (addr0 == null) { - dev_err(&pdev->dev, "can't remap ctl region "); - goto err_reg; - } - addr2 = ioremap(pci_resource_start(pdev, 2), - cypci_ywin); - if (addr2 == null) { - dev_err(&pdev->dev, "can't remap base region "); - goto err_unmap; - } - - nchan = cyports_per_chip * cyy_init_card(addr2, 1); - if (nchan == 0) { - dev_err(&pdev->dev, "cyclom-y pci host card with no " - "serial-modules "); - goto err_unmap; - } - } else if (device_id == pci_device_id_cyclom_z_hi) { - struct runtime_9060 __iomem *ctl_addr; - - ctl_addr = addr0 = ioremap(pci_resource_start(pdev, 0), - cypci_zctl); - if (addr0 == null) { - dev_err(&pdev->dev, "can't remap ctl region "); - goto err_reg; - } - - /* disable interrupts on the plx before resetting it */ - cy_writew(&ctl_addr->intr_ctrl_stat, - readw(&ctl_addr->intr_ctrl_stat) & ~0x0900); - - plx_init(pdev, irq, addr0); - - mailbox = readl(&ctl_addr->mail_box_0); - - addr2 = ioremap(pci_resource_start(pdev, 2), - mailbox == ze_v1 ? cypci_ze_win : cypci_zwin); - if (addr2 == null) { - dev_err(&pdev->dev, "can't remap base region "); - goto err_unmap; - } - - if (mailbox == ze_v1) { - card_name = "cyclades-ze"; - } else { - card_name = "cyclades-8zo"; -#ifdef cy_pci_debug - if (mailbox == zo_v1) { - cy_writel(&ctl_addr->loc_addr_base, win_creg); - dev_info(&pdev->dev, "cyclades-8zo/pci: fpga " - "id %lx, ver %lx ", (ulong)(0xff & - readl(&((struct custom_reg *)addr2)-> - fpga_id)), (ulong)(0xff & - readl(&((struct custom_reg *)addr2)-> - fpga_version))); - cy_writel(&ctl_addr->loc_addr_base, win_ram); - } else { - dev_info(&pdev->dev, "cyclades-z/pci: new " - "cyclades-z board. fpga not loaded "); - } -#endif - /* the following clears the firmware id word. this - ensures that the driver will not attempt to talk to - the board until it has been properly initialized. - */ - if ((mailbox == zo_v1) || (mailbox == zo_v2)) - cy_writel(addr2 + id_address, 0l); - } - - retval = cyz_load_fw(pdev, addr2, addr0, irq); - if (retval <= 0) - goto err_unmap; - nchan = retval; - } - - if ((cy_next_channel + nchan) > nr_ports) { - dev_err(&pdev->dev, "cyclades-8zo/pci found, but no " - "channels are available. change nr_ports in " - "cyclades.c and recompile kernel. "); - goto err_unmap; - } - /* fill the next cy_card structure available */ - for (card_no = 0; card_no < nr_cards; card_no++) { - card = &cy_card[card_no]; - if (card->base_addr == null) - break; - } - if (card_no == nr_cards) { /* no more cy_cards available */ - dev_err(&pdev->dev, "cyclades-8zo/pci found, but no " - "more cards can be used. change nr_cards in " - "cyclades.c and recompile kernel. "); - goto err_unmap; - } - - if (device_id == pci_device_id_cyclom_y_lo || - device_id == pci_device_id_cyclom_y_hi) { - /* allocate irq */ - retval = request_irq(irq, cyy_interrupt, - irqf_shared, "cyclom-y", card); - if (retval) { - dev_err(&pdev->dev, "could not allocate irq "); - goto err_unmap; - } - card->num_chips = nchan / cyports_per_chip; - } else { - struct firm_id __iomem *firm_id = addr2 + id_address; - struct zfw_ctrl __iomem *zfw_ctrl; - - zfw_ctrl = addr2 + (readl(&firm_id->zfwctrl_addr) & 0xfffff); - - card->hw_ver = mailbox; - card->num_chips = (unsigned int)-1; - card->board_ctrl = &zfw_ctrl->board_ctrl; -#ifdef config_cyz_intr - /* allocate irq only if board has an irq */ - if (irq != 0 && irq != 255) { - retval = request_irq(irq, cyz_interrupt, - irqf_shared, "cyclades-z", card); - if (retval) { - dev_err(&pdev->dev, "could not allocate irq "); - goto err_unmap; - } - } -#endif /* config_cyz_intr */ - } - - /* set cy_card */ - card->base_addr = addr2; - card->ctl_addr.p9050 = addr0; - card->irq = irq; - card->bus_index = 1; - card->first_line = cy_next_channel; - card->nports = nchan; - retval = cy_init_card(card); - if (retval) - goto err_null; - - pci_set_drvdata(pdev, card); - - if (device_id == pci_device_id_cyclom_y_lo || - device_id == pci_device_id_cyclom_y_hi) { - /* enable interrupts in the pci interface */ - plx_ver = readb(addr2 + cyplx_ver) & 0x0f; - switch (plx_ver) { - case plx_9050: - cy_writeb(addr0 + 0x4c, 0x43); - break; - - case plx_9060: - case plx_9080: - default: /* old boards, use plx_9060 */ - { - struct runtime_9060 __iomem *ctl_addr = addr0; - plx_init(pdev, irq, ctl_addr); - cy_writew(&ctl_addr->intr_ctrl_stat, - readw(&ctl_addr->intr_ctrl_stat) | 0x0900); - break; - } - } - } - - dev_info(&pdev->dev, "%s/pci #%d found: %d channels starting from " - "port %d. ", card_name, card_no + 1, nchan, cy_next_channel); - for (j = 0, i = cy_next_channel; i < cy_next_channel + nchan; i++, j++) - tty_port_register_device(&card->ports[j].port, - cy_serial_driver, i, &pdev->dev); - cy_next_channel += nchan; - - return 0; -err_null: - card->base_addr = null; - free_irq(irq, card); -err_unmap: - iounmap(addr0); - if (addr2) - iounmap(addr2); -err_reg: - pci_release_regions(pdev); -err_dis: - pci_disable_device(pdev); -err: - return retval; -} - -static void cy_pci_remove(struct pci_dev *pdev) -{ - struct cyclades_card *cinfo = pci_get_drvdata(pdev); - unsigned int i, channel; - - /* non-z with old plx */ - if (!cy_is_z(cinfo) && (readb(cinfo->base_addr + cyplx_ver) & 0x0f) == - plx_9050) - cy_writeb(cinfo->ctl_addr.p9050 + 0x4c, 0); - else -#ifndef config_cyz_intr - if (!cy_is_z(cinfo)) -#endif - cy_writew(&cinfo->ctl_addr.p9060->intr_ctrl_stat, - readw(&cinfo->ctl_addr.p9060->intr_ctrl_stat) & - ~0x0900); - - iounmap(cinfo->base_addr); - if (cinfo->ctl_addr.p9050) - iounmap(cinfo->ctl_addr.p9050); - if (cinfo->irq -#ifndef config_cyz_intr - && !cy_is_z(cinfo) -#endif /* config_cyz_intr */ - ) - free_irq(cinfo->irq, cinfo); - pci_release_regions(pdev); - - cinfo->base_addr = null; - for (channel = 0, i = cinfo->first_line; i < cinfo->first_line + - cinfo->nports; i++, channel++) { - tty_unregister_device(cy_serial_driver, i); - tty_port_destroy(&cinfo->ports[channel].port); - } - cinfo->nports = 0; - kfree(cinfo->ports); -} - -static struct pci_driver cy_pci_driver = { - .name = "cyclades", - .id_table = cy_pci_dev_id, - .probe = cy_pci_probe, - .remove = cy_pci_remove -}; -#endif - -static int cyclades_proc_show(struct seq_file *m, void *v) -{ - struct cyclades_port *info; - unsigned int i, j; - __u32 cur_jifs = jiffies; - - seq_puts(m, "dev timeopen bytesout idleout bytesin " - "idlein overruns ldisc "); - - /* output one line for each known port */ - for (i = 0; i < nr_cards; i++) - for (j = 0; j < cy_card[i].nports; j++) { - info = &cy_card[i].ports[j]; - - if (info->port.count) { - /* xxx is the ldisc num worth this? */ - struct tty_struct *tty; - struct tty_ldisc *ld; - int num = 0; - tty = tty_port_tty_get(&info->port); - if (tty) { - ld = tty_ldisc_ref(tty); - if (ld) { - num = ld->ops->num; - tty_ldisc_deref(ld); - } - tty_kref_put(tty); - } - seq_printf(m, "%3d %8lu %10lu %8lu " - "%10lu %8lu %9lu %6d ", info->line, - (cur_jifs - info->idle_stats.in_use) / - hz, info->idle_stats.xmit_bytes, - (cur_jifs - info->idle_stats.xmit_idle)/ - hz, info->idle_stats.recv_bytes, - (cur_jifs - info->idle_stats.recv_idle)/ - hz, info->idle_stats.overruns, - num); - } else - seq_printf(m, "%3d %8lu %10lu %8lu " - "%10lu %8lu %9lu %6ld ", - info->line, 0l, 0l, 0l, 0l, 0l, 0l, 0l); - } - return 0; -} - -/* the serial driver boot-time initialization code! - hardware i/o ports are mapped to character special devices on a - first found, first allocated manner. that is, this code searches - for cyclom cards in the system. as each is found, it is probed - to discover how many chips (and thus how many ports) are present. - these ports are mapped to the tty ports 32 and upward in monotonic - fashion. if an 8-port card is replaced with a 16-port card, the - port mapping on a following card will shift. - - this approach is different from what is used in the other serial - device driver because the cyclom is more properly a multiplexer, - not just an aggregation of serial ports on one card. - - if there are more cards with more ports than have been - statically allocated above, a warning is printed and the - extra ports are ignored. - */ - -static const struct tty_operations cy_ops = { - .open = cy_open, - .close = cy_close, - .write = cy_write, - .put_char = cy_put_char, - .flush_chars = cy_flush_chars, - .write_room = cy_write_room, - .chars_in_buffer = cy_chars_in_buffer, - .flush_buffer = cy_flush_buffer, - .ioctl = cy_ioctl, - .throttle = cy_throttle, - .unthrottle = cy_unthrottle, - .set_termios = cy_set_termios, - .stop = cy_stop, - .start = cy_start, - .hangup = cy_hangup, - .break_ctl = cy_break, - .wait_until_sent = cy_wait_until_sent, - .tiocmget = cy_tiocmget, - .tiocmset = cy_tiocmset, - .get_icount = cy_get_icount, - .set_serial = cy_set_serial_info, - .get_serial = cy_get_serial_info, - .proc_show = cyclades_proc_show, -}; - -static int __init cy_init(void) -{ - unsigned int nboards; - int retval = -enomem; - - cy_serial_driver = alloc_tty_driver(nr_ports); - if (!cy_serial_driver) - goto err; - - printk(kern_info "cyclades driver " cy_version " "); - - /* initialize the tty_driver structure */ - - cy_serial_driver->driver_name = "cyclades"; - cy_serial_driver->name = "ttyc"; - cy_serial_driver->major = cyclades_major; - cy_serial_driver->minor_start = 0; - cy_serial_driver->type = tty_driver_type_serial; - cy_serial_driver->subtype = serial_type_normal; - cy_serial_driver->init_termios = tty_std_termios; - cy_serial_driver->init_termios.c_cflag = - b9600 | cs8 | cread | hupcl | clocal; - cy_serial_driver->flags = tty_driver_real_raw | tty_driver_dynamic_dev; - tty_set_operations(cy_serial_driver, &cy_ops); - - retval = tty_register_driver(cy_serial_driver); - if (retval) { - printk(kern_err "couldn't register cyclades serial driver "); - goto err_frtty; - } - - /* the code below is responsible to find the boards. each different - type of board has its own detection routine. if a board is found, - the next cy_card structure available is set by the detection - routine. these functions are responsible for checking the - availability of cy_card and cy_port data structures and updating - the cy_next_channel. */ - - /* look for isa boards */ - nboards = cy_detect_isa(); - -#ifdef config_pci - /* look for pci boards */ - retval = pci_register_driver(&cy_pci_driver); - if (retval && !nboards) { - tty_unregister_driver(cy_serial_driver); - goto err_frtty; - } -#endif - - return 0; -err_frtty: - put_tty_driver(cy_serial_driver); -err: - return retval; -} /* cy_init */ - -static void __exit cy_cleanup_module(void) -{ - struct cyclades_card *card; - unsigned int i, e1; - -#ifndef config_cyz_intr - del_timer_sync(&cyz_timerlist); -#endif /* config_cyz_intr */ - - e1 = tty_unregister_driver(cy_serial_driver); - if (e1) - printk(kern_err "failed to unregister cyclades serial " - "driver(%d) ", e1); - -#ifdef config_pci - pci_unregister_driver(&cy_pci_driver); -#endif - - for (i = 0; i < nr_cards; i++) { - card = &cy_card[i]; - if (card->base_addr) { - /* clear interrupt */ - cy_writeb(card->base_addr + cy_clrintr, 0); - iounmap(card->base_addr); - if (card->ctl_addr.p9050) - iounmap(card->ctl_addr.p9050); - if (card->irq -#ifndef config_cyz_intr - && !cy_is_z(card) -#endif /* config_cyz_intr */ - ) - free_irq(card->irq, card); - for (e1 = card->first_line; e1 < card->first_line + - card->nports; e1++) - tty_unregister_device(cy_serial_driver, e1); - kfree(card->ports); - } - } - - put_tty_driver(cy_serial_driver); -} /* cy_cleanup_module */ - -module_init(cy_init); -module_exit(cy_cleanup_module); - -module_license("gpl"); -module_version(cy_version); -module_alias_chardev_major(cyclades_major); -module_firmware("cyzfirm.bin"); diff --git a/drivers/tty/serial/8250/kconfig b/drivers/tty/serial/8250/kconfig --- a/drivers/tty/serial/8250/kconfig +++ b/drivers/tty/serial/8250/kconfig - port for anything. (note that the cyclades multi serial port driver - does not need this driver built in for it to work.) + port for anything. - "intelligent" multiport card such as cyclades, digiboards, etc. + "intelligent" multiport card such as digiboards, etc. diff --git a/include/linux/cyclades.h b/include/linux/cyclades.h --- a/include/linux/cyclades.h +++ /dev/null -/* spdx-license-identifier: gpl-2.0 */ -/* $revision: 3.0 $$date: 1998/11/02 14:20:59 $ - * linux/include/linux/cyclades.h - * - * this file was initially written by - * randolph bentson <bentson@grieg.seaslug.org> and is maintained by - * ivan passos <ivan@cyclades.com>. - * - * this file contains the general definitions for the cyclades.c driver - *$log: cyclades.h,v $ - *revision 3.1 2002/01/29 11:36:16 henrique - *added throttle field on struct cyclades_port to indicate whether the - *port is throttled or not - * - *revision 3.1 2000/04/19 18:52:52 ivan - *converted address fields to unsigned long and added fields for physical - *addresses on cyclades_card structure; - * - *revision 3.0 1998/11/02 14:20:59 ivan - *added nports field on cyclades_card structure; - * - *revision 2.5 1998/08/03 16:57:01 ivan - *added cyclades_idle_stats structure; - * - *revision 2.4 1998/06/01 12:09:53 ivan - *removed closing_wait2 from cyclades_port structure; - * - *revision 2.3 1998/03/16 18:01:12 ivan - *changes in the cyclades_port structure to get it closer to the - *standard serial port structure; - *added constants for new ioctls; - * - *revision 2.2 1998/02/17 16:50:00 ivan - *changes in the cyclades_port structure (addition of shutdown_wait and - *chip_rev variables); - *added constants for new ioctls and for cd1400 rev. numbers. - * - *revision 2.1 1997/10/24 16:03:00 ivan - *added rflow (which allows enabling the cd1400 special flow control - *feature) and rtsdtr_inv (which allows dtr/rts pin inversion) to - *cyclades_port structure; - *added alpha support - * - *revision 2.0 1997/06/30 10:30:00 ivan - *added some new doorbell command constants related to ioctlw and - *uart error signaling - * - *revision 1.8 1997/06/03 15:30:00 ivan - *added constant zfirm_hlt - *added constant cypci_ze_win ( = 2 * cy_pci_zwin) - * - *revision 1.7 1997/03/26 10:30:00 daniel - *new entries at the end of cyclades_port struct to reallocate - *variables illegally allocated within card memory. - * - *revision 1.6 1996/09/09 18:35:30 bentson - *fold in changes for cyclom-z -- including structures for - *communicating with board as well modest changes to original - *structures to support new features. - * - *revision 1.5 1995/11/13 21:13:31 bentson - *changes suggested by michael chastain <mec@duracef.shout.net> - *to support use of this file in non-kernel applications - * - * - */ -#ifndef _linux_cyclades_h -#define _linux_cyclades_h - -#include <uapi/linux/cyclades.h> - - -/* per card data structure */ -struct cyclades_card { - void __iomem *base_addr; - union { - void __iomem *p9050; - struct runtime_9060 __iomem *p9060; - } ctl_addr; - struct board_ctrl __iomem *board_ctrl; /* cyz specific */ - int irq; - unsigned int num_chips; /* 0 if card absent, -1 if z/pci, else y */ - unsigned int first_line; /* minor number of first channel on card */ - unsigned int nports; /* number of ports in the card */ - int bus_index; /* address shift - 0 for isa, 1 for pci */ - int intr_enabled; /* fw interrupt flag - 0 disabled, 1 enabled */ - u32 hw_ver; - spinlock_t card_lock; - struct cyclades_port *ports; -}; - -/*************************************** - * memory access functions/macros * - * (required to support alpha systems) * - ***************************************/ - -#define cy_writeb(port,val) do { writeb((val), (port)); mb(); } while (0) -#define cy_writew(port,val) do { writew((val), (port)); mb(); } while (0) -#define cy_writel(port,val) do { writel((val), (port)); mb(); } while (0) - -/* - * statistics counters - */ -struct cyclades_icount { - __u32 cts, dsr, rng, dcd, tx, rx; - __u32 frame, parity, overrun, brk; - __u32 buf_overrun; -}; - -/* - * this is our internal structure for each serial port's state. - * - * many fields are paralleled by the structure used by the serial_struct - * structure. - * - * for definitions of the flags field, see tty.h - */ - -struct cyclades_port { - int magic; - struct tty_port port; - struct cyclades_card *card; - union { - struct { - void __iomem *base_addr; - } cyy; - struct { - struct ch_ctrl __iomem *ch_ctrl; - struct buf_ctrl __iomem *buf_ctrl; - } cyz; - } u; - int line; - int flags; /* defined in tty.h */ - int type; /* uart type */ - int read_status_mask; - int ignore_status_mask; - int timeout; - int xmit_fifo_size; - int cor1,cor2,cor3,cor4,cor5; - int tbpr,tco,rbpr,rco; - int baud; - int rflow; - int rtsdtr_inv; - int chip_rev; - int custom_divisor; - u8 x_char; /* to be pushed out asap */ - int breakon; - int breakoff; - int xmit_head; - int xmit_tail; - int xmit_cnt; - int default_threshold; - int default_timeout; - unsigned long rflush_count; - struct cyclades_monitor mon; - struct cyclades_idle_stats idle_stats; - struct cyclades_icount icount; - struct completion shutdown_wait; - int throttle; -#ifdef config_cyz_intr - struct timer_list rx_full_timer; -#endif -}; - -#define closing_wait_delay 30*hz -#define cy_closing_wait_none async_closing_wait_none -#define cy_closing_wait_inf async_closing_wait_inf - - -#define cymax_chips_per_card 8 -#define cymax_char_fifo 12 -#define cyports_per_chip 4 -#define cd1400_max_speed 115200 - -#define cyisa_ywin 0x2000 - -#define cypci_ywin 0x4000 -#define cypci_yctl 0x80 -#define cypci_zctl ctrl_window_size -#define cypci_zwin 0x80000 -#define cypci_ze_win (2 * cypci_zwin) - -#define pci_device_id_mask 0x06 - -/**** cd1400 registers ****/ - -#define cd1400_rev_g 0x46 -#define cd1400_rev_j 0x48 - -#define cyregsize 0x0400 -#define cy_hwreset 0x1400 -#define cy_clrintr 0x1800 -#define cy_epldrev 0x1e00 - -/* global registers */ - -#define cygfrcr (0x40*2) -#define cyreve (44) -#define cycar (0x68*2) -#define cychan_0 (0x00) -#define cychan_1 (0x01) -#define cychan_2 (0x02) -#define cychan_3 (0x03) -#define cygcr (0x4b*2) -#define cych0_serial (0x00) -#define cych0_parallel (0x80) -#define cysvrr (0x67*2) -#define cysrmodem (0x04) -#define cysrtransmit (0x02) -#define cysrreceive (0x01) -#define cyricr (0x44*2) -#define cyticr (0x45*2) -#define cymicr (0x46*2) -#define cyicr0 (0x00) -#define cyicr1 (0x01) -#define cyicr2 (0x02) -#define cyicr3 (0x03) -#define cyrir (0x6b*2) -#define cytir (0x6a*2) -#define cymir (0x69*2) -#define cyirdireq (0x80) -#define cyirbusy (0x40) -#define cyirunfair (0x20) -#define cyircontext (0x1c) -#define cyirchannel (0x03) -#define cyppr (0x7e*2) -#define cyclock_20_1ms (0x27) -#define cyclock_25_1ms (0x31) -#define cyclock_25_5ms (0xf4) -#define cyclock_60_1ms (0x75) -#define cyclock_60_2ms (0xea) - -/* virtual registers */ - -#define cyrivr (0x43*2) -#define cytivr (0x42*2) -#define cymivr (0x41*2) -#define cyivrmask (0x07) -#define cyivrrxex (0x07) -#define cyivrrxok (0x03) -#define cyivrtxok (0x02) -#define cyivrmdmok (0x01) -#define cytdr (0x63*2) -#define cyrdsr (0x62*2) -#define cytimeout (0x80) -#define cyspechar (0x70) -#define cybreak (0x08) -#define cyparity (0x04) -#define cyframe (0x02) -#define cyoverrun (0x01) -#define cymisr (0x4c*2) -/* see cymcor_ and cymsvr_ for bits*/ -#define cyeosrr (0x60*2) - -/* channel registers */ - -#define cylivr (0x18*2) -#define cymscsr (0x01) -#define cytdsr (0x02) -#define cyrgdsr (0x03) -#define cyredsr (0x07) -#define cyccr (0x05*2) -/* format 1 */ -#define cychan_reset (0x80) -#define cychip_reset (0x81) -#define cyflushtransfifo (0x82) -/* format 2 */ -#define cycor_change (0x40) -#define cycor1ch (0x02) -#define cycor2ch (0x04) -#define cycor3ch (0x08) -/* format 3 */ -#define cysend_spec_1 (0x21) -#define cysend_spec_2 (0x22) -#define cysend_spec_3 (0x23) -#define cysend_spec_4 (0x24) -/* format 4 */ -#define cychan_ctl (0x10) -#define cydis_rcvr (0x01) -#define cyenb_rcvr (0x02) -#define cydis_xmtr (0x04) -#define cyenb_xmtr (0x08) -#define cysrer (0x06*2) -#define cymdmch (0x80) -#define cyrxdata (0x10) -#define cytxrdy (0x04) -#define cytxmpty (0x02) -#define cynndt (0x01) -#define cycor1 (0x08*2) -#define cyparity_none (0x00) -#define cyparity_0 (0x20) -#define cyparity_1 (0xa0) -#define cyparity_e (0x40) -#define cyparity_o (0xc0) -#define cy_1_stop (0x00) -#define cy_1_5_stop (0x04) -#define cy_2_stop (0x08) -#define cy_5_bits (0x00) -#define cy_6_bits (0x01) -#define cy_7_bits (0x02) -#define cy_8_bits (0x03) -#define cycor2 (0x09*2) -#define cyixm (0x80) -#define cytxibe (0x40) -#define cyetc (0x20) -#define cyauto_txfl (0x60) -#define cyllm (0x10) -#define cyrlm (0x08) -#define cyrtsao (0x04) -#define cyctsae (0x02) -#define cydsrae (0x01) -#define cycor3 (0x0a*2) -#define cyspl_ch_drange (0x80) /* special character detect range */ -#define cyspl_ch_det1 (0x40) /* enable special character detection - on schr4-schr3 */ -#define cyfl_ctrl_trnsp (0x20) /* flow control transparency */ -#define cyspl_ch_det2 (0x10) /* enable special character detection - on schr2-schr1 */ -#define cyrec_fifo (0x0f) /* receive fifo threshold */ -#define cycor4 (0x1e*2) -#define cycor5 (0x1f*2) -#define cyccsr (0x0b*2) -#define cyrxen (0x80) -#define cyrxfloff (0x40) -#define cyrxflon (0x20) -#define cytxen (0x08) -#define cytxfloff (0x04) -#define cytxflon (0x02) -#define cyrdcr (0x0e*2) -#define cyschr1 (0x1a*2) -#define cyschr2 (0x1b*2) -#define cyschr3 (0x1c*2) -#define cyschr4 (0x1d*2) -#define cyscrl (0x22*2) -#define cyscrh (0x23*2) -#define cylnc (0x24*2) -#define cymcor1 (0x15*2) -#define cymcor2 (0x16*2) -#define cyrtpr (0x21*2) -#define cymsvr1 (0x6c*2) -#define cymsvr2 (0x6d*2) -#define cyany_delta (0xf0) -#define cydsr (0x80) -#define cycts (0x40) -#define cyri (0x20) -#define cydcd (0x10) -#define cydtr (0x02) -#define cyrts (0x01) -#define cypvsr (0x6f*2) -#define cyrbpr (0x78*2) -#define cyrcor (0x7c*2) -#define cytbpr (0x72*2) -#define cytcor (0x76*2) - -/* custom registers */ - -#define cyplx_ver (0x3400) -#define plx_9050 0x0b -#define plx_9060 0x0c -#define plx_9080 0x0d - -/***************************************************************************/ - -#endif /* _linux_cyclades_h */ diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h -#define pci_device_id_cyclom_y_lo 0x0100 -#define pci_device_id_cyclom_y_hi 0x0101 -#define pci_device_id_cyclom_4y_lo 0x0102 -#define pci_device_id_cyclom_4y_hi 0x0103 -#define pci_device_id_cyclom_8y_lo 0x0104 -#define pci_device_id_cyclom_8y_hi 0x0105 -#define pci_device_id_cyclom_z_lo 0x0200 -#define pci_device_id_cyclom_z_hi 0x0201 diff --git a/include/uapi/linux/cyclades.h b/include/uapi/linux/cyclades.h --- a/include/uapi/linux/cyclades.h +++ /dev/null -/* spdx-license-identifier: gpl-2.0 with linux-syscall-note */ -/* $revision: 3.0 $$date: 1998/11/02 14:20:59 $ - * linux/include/linux/cyclades.h - * - * this file was initially written by - * randolph bentson <bentson@grieg.seaslug.org> and is maintained by - * ivan passos <ivan@cyclades.com>. - * - * this file contains the general definitions for the cyclades.c driver - *$log: cyclades.h,v $ - *revision 3.1 2002/01/29 11:36:16 henrique - *added throttle field on struct cyclades_port to indicate whether the - *port is throttled or not - * - *revision 3.1 2000/04/19 18:52:52 ivan - *converted address fields to unsigned long and added fields for physical - *addresses on cyclades_card structure; - * - *revision 3.0 1998/11/02 14:20:59 ivan - *added nports field on cyclades_card structure; - * - *revision 2.5 1998/08/03 16:57:01 ivan - *added cyclades_idle_stats structure; - * - *revision 2.4 1998/06/01 12:09:53 ivan - *removed closing_wait2 from cyclades_port structure; - * - *revision 2.3 1998/03/16 18:01:12 ivan - *changes in the cyclades_port structure to get it closer to the - *standard serial port structure; - *added constants for new ioctls; - * - *revision 2.2 1998/02/17 16:50:00 ivan - *changes in the cyclades_port structure (addition of shutdown_wait and - *chip_rev variables); - *added constants for new ioctls and for cd1400 rev. numbers. - * - *revision 2.1 1997/10/24 16:03:00 ivan - *added rflow (which allows enabling the cd1400 special flow control - *feature) and rtsdtr_inv (which allows dtr/rts pin inversion) to - *cyclades_port structure; - *added alpha support - * - *revision 2.0 1997/06/30 10:30:00 ivan - *added some new doorbell command constants related to ioctlw and - *uart error signaling - * - *revision 1.8 1997/06/03 15:30:00 ivan - *added constant zfirm_hlt - *added constant cypci_ze_win ( = 2 * cy_pci_zwin) - * - *revision 1.7 1997/03/26 10:30:00 daniel - *new entries at the end of cyclades_port struct to reallocate - *variables illegally allocated within card memory. - * - *revision 1.6 1996/09/09 18:35:30 bentson - *fold in changes for cyclom-z -- including structures for - *communicating with board as well modest changes to original - *structures to support new features. - * - *revision 1.5 1995/11/13 21:13:31 bentson - *changes suggested by michael chastain <mec@duracef.shout.net> - *to support use of this file in non-kernel applications - * - * - */ - -#ifndef _uapi_linux_cyclades_h -#define _uapi_linux_cyclades_h - -#include <linux/types.h> - -struct cyclades_monitor { - unsigned long int_count; - unsigned long char_count; - unsigned long char_max; - unsigned long char_last; -}; - -/* - * these stats all reflect activity since the device was last initialized. - * (i.e., since the port was opened with no other processes already having it - * open) - */ -struct cyclades_idle_stats { - __kernel_old_time_t in_use; /* time device has been in use (secs) */ - __kernel_old_time_t recv_idle; /* time since last char received (secs) */ - __kernel_old_time_t xmit_idle; /* time since last char transmitted (secs) */ - unsigned long recv_bytes; /* bytes received */ - unsigned long xmit_bytes; /* bytes transmitted */ - unsigned long overruns; /* input overruns */ - unsigned long frame_errs; /* input framing errors */ - unsigned long parity_errs; /* input parity errors */ -}; - -#define cyclades_magic 0x4359 - -#define cygetmon 0x435901 -#define cygetthresh 0x435902 -#define cysetthresh 0x435903 -#define cygetdefthresh 0x435904 -#define cysetdefthresh 0x435905 -#define cygettimeout 0x435906 -#define cysettimeout 0x435907 -#define cygetdeftimeout 0x435908 -#define cysetdeftimeout 0x435909 -#define cysetrflow 0x43590a -#define cygetrflow 0x43590b -#define cysetrtsdtr_inv 0x43590c -#define cygetrtsdtr_inv 0x43590d -#define cyzsetpollcycle 0x43590e -#define cyzgetpollcycle 0x43590f -#define cygetcd1400ver 0x435910 -#define cysetwait 0x435912 -#define cygetwait 0x435913 - -/*************** cyclom-z additions ***************/ - -#define czioc ('m' << 8) -#define cz_nboards (czioc|0xfa) -#define cz_boot_start (czioc|0xfb) -#define cz_boot_data (czioc|0xfc) -#define cz_boot_end (czioc|0xfd) -#define cz_test (czioc|0xfe) - -#define cz_def_poll (hz/25) - -#define max_board 4 /* max number of boards */ -#define max_dev 256 /* max number of ports total */ -#define cyz_max_speed 921600 - -#define cyz_fifo_size 16 - -#define cyz_boot_nwords 0x100 -struct cyz_boot_ctrl { - unsigned short nboard; - int status[max_board]; - int nchannel[max_board]; - int fw_rev[max_board]; - unsigned long offset; - unsigned long data[cyz_boot_nwords]; -}; - - -#ifndef dp_window_size -/* - * memory window sizes - */ - -#define dp_window_size (0x00080000) /* window size 512 kb */ -#define ze_dp_window_size (0x00100000) /* window size 1 mb (ze and - 8zo v.2 */ -#define ctrl_window_size (0x00000080) /* runtime regs 128 bytes */ - -/* - * custom_reg - cyclom-z/pci custom registers set. the driver - * normally will access only interested on the fpga_id, fpga_version, - * start_cpu and stop_cpu. - */ - -struct custom_reg { - __u32 fpga_id; /* fpga identification register */ - __u32 fpga_version; /* fpga version number register */ - __u32 cpu_start; /* cpu start register (write) */ - __u32 cpu_stop; /* cpu stop register (write) */ - __u32 misc_reg; /* miscellaneous register */ - __u32 idt_mode; /* idt mode register */ - __u32 uart_irq_status; /* uart irq status register */ - __u32 clear_timer0_irq; /* clear timer interrupt register */ - __u32 clear_timer1_irq; /* clear timer interrupt register */ - __u32 clear_timer2_irq; /* clear timer interrupt register */ - __u32 test_register; /* test register */ - __u32 test_count; /* test count register */ - __u32 timer_select; /* timer select register */ - __u32 pr_uart_irq_status; /* prioritized uart irq stat reg */ - __u32 ram_wait_state; /* ram wait-state register */ - __u32 uart_wait_state; /* uart wait-state register */ - __u32 timer_wait_state; /* timer wait-state register */ - __u32 ack_wait_state; /* ack wait state register */ -}; - -/* - * runtime_9060 - plx pci9060es local configuration and shared runtime - * registers. this structure can be used to access the 9060 registers - * (memory mapped). - */ - -struct runtime_9060 { - __u32 loc_addr_range; /* 00h - local address range */ - __u32 loc_addr_base; /* 04h - local address base */ - __u32 loc_arbitr; /* 08h - local arbitration */ - __u32 endian_descr; /* 0ch - big/little endian descriptor */ - __u32 loc_rom_range; /* 10h - local rom range */ - __u32 loc_rom_base; /* 14h - local rom base */ - __u32 loc_bus_descr; /* 18h - local bus descriptor */ - __u32 loc_range_mst; /* 1ch - local range for master to pci */ - __u32 loc_base_mst; /* 20h - local base for master pci */ - __u32 loc_range_io; /* 24h - local range for master io */ - __u32 pci_base_mst; /* 28h - pci base for master pci */ - __u32 pci_conf_io; /* 2ch - pci configuration for master io */ - __u32 filler1; /* 30h */ - __u32 filler2; /* 34h */ - __u32 filler3; /* 38h */ - __u32 filler4; /* 3ch */ - __u32 mail_box_0; /* 40h - mail box 0 */ - __u32 mail_box_1; /* 44h - mail box 1 */ - __u32 mail_box_2; /* 48h - mail box 2 */ - __u32 mail_box_3; /* 4ch - mail box 3 */ - __u32 filler5; /* 50h */ - __u32 filler6; /* 54h */ - __u32 filler7; /* 58h */ - __u32 filler8; /* 5ch */ - __u32 pci_doorbell; /* 60h - pci to local doorbell */ - __u32 loc_doorbell; /* 64h - local to pci doorbell */ - __u32 intr_ctrl_stat; /* 68h - interrupt control/status */ - __u32 init_ctrl; /* 6ch - eeprom control, init control, etc */ -}; - -/* values for the local base address re-map register */ - -#define win_ram 0x00000001l /* set the sliding window to ram */ -#define win_creg 0x14000001l /* set the window to custom registers */ - -/* values timer select registers */ - -#define timer_by_1m 0x00 /* clock divided by 1m */ -#define timer_by_256k 0x01 /* clock divided by 256k */ -#define timer_by_128k 0x02 /* clock divided by 128k */ -#define timer_by_32k 0x03 /* clock divided by 32k */ - -/****************** ****************** *******************/ -#endif - -#ifndef zfirm_id -/* #include "zfwint.h" */ -/****************** ****************** *******************/ -/* - * this file contains the definitions for interfacing with the - * cyclom-z zfirm firmware. - */ - -/* general constant definitions */ - -#define max_chan 64 /* max number of channels per board */ - -/* firmware id structure (set after boot) */ - -#define id_address 0x00000180l /* signature/pointer address */ -#define zfirm_id 0x5557465al /* zfirm/u signature */ -#define zfirm_hlt 0x59505b5cl /* zfirm needs external power supply */ -#define zfirm_rst 0x56040674l /* rst signal (due to fw reset) */ - -#define zf_tinact_def 1000 /* default inactivity timeout - (1000 ms) */ -#define zf_tinact zf_tinact_def - -struct firm_id { - __u32 signature; /* zfirm/u signature */ - __u32 zfwctrl_addr; /* pointer to zfw_ctrl structure */ -}; - -/* op. system id */ - -#define c_os_linux 0x00000030 /* generic linux system */ - -/* channel op_mode */ - -#define c_ch_disable 0x00000000 /* channel is disabled */ -#define c_ch_txenable 0x00000001 /* channel tx enabled */ -#define c_ch_rxenable 0x00000002 /* channel rx enabled */ -#define c_ch_enable 0x00000003 /* channel tx/rx enabled */ -#define c_ch_loopback 0x00000004 /* loopback mode */ - -/* comm_parity - parity */ - -#define c_pr_none 0x00000000 /* none */ -#define c_pr_odd 0x00000001 /* odd */ -#define c_pr_even 0x00000002 /* even */ -#define c_pr_mark 0x00000004 /* mark */ -#define c_pr_space 0x00000008 /* space */ -#define c_pr_parity 0x000000ff - -#define c_pr_discard 0x00000100 /* discard char with frame/par error */ -#define c_pr_ignore 0x00000200 /* ignore frame/par error */ - -/* comm_data_l - data length and stop bits */ - -#define c_dl_cs5 0x00000001 -#define c_dl_cs6 0x00000002 -#define c_dl_cs7 0x00000004 -#define c_dl_cs8 0x00000008 -#define c_dl_cs 0x0000000f -#define c_dl_1stop 0x00000010 -#define c_dl_15stop 0x00000020 -#define c_dl_2stop 0x00000040 -#define c_dl_stop 0x000000f0 - -/* interrupt enabling/status */ - -#define c_in_disable 0x00000000 /* zero, disable interrupts */ -#define c_in_txbempty 0x00000001 /* tx buffer empty */ -#define c_in_txlowwm 0x00000002 /* tx buffer below lwm */ -#define c_in_rxhiwm 0x00000010 /* rx buffer above hwm */ -#define c_in_rxnndt 0x00000020 /* rx no new data timeout */ -#define c_in_mdcd 0x00000100 /* modem dcd change */ -#define c_in_mdsr 0x00000200 /* modem dsr change */ -#define c_in_mri 0x00000400 /* modem ri change */ -#define c_in_mcts 0x00000800 /* modem cts change */ -#define c_in_rxbrk 0x00001000 /* break received */ -#define c_in_pr_error 0x00002000 /* parity error */ -#define c_in_fr_error 0x00004000 /* frame error */ -#define c_in_ovr_error 0x00008000 /* overrun error */ -#define c_in_rxofl 0x00010000 /* rx buffer overflow */ -#define c_in_ioctlw 0x00020000 /* i/o control w/ wait */ -#define c_in_mrts 0x00040000 /* modem rts drop */ -#define c_in_ichar 0x00080000 - -/* flow control */ - -#define c_fl_oxx 0x00000001 /* output xon/xoff flow control */ -#define c_fl_ixx 0x00000002 /* output xon/xoff flow control */ -#define c_fl_oixany 0x00000004 /* output xon/xoff (any xon) */ -#define c_fl_swflow 0x0000000f - -/* flow status */ - -#define c_fs_txidle 0x00000000 /* no tx data in the buffer or uart */ -#define c_fs_sending 0x00000001 /* uart is sending data */ -#define c_fs_swflow 0x00000002 /* tx is stopped by received xoff */ - -/* rs_control/rs_status rs-232 signals */ - -#define c_rs_param 0x80000000 /* indicates presence of parameter in - ioctlm command */ -#define c_rs_rts 0x00000001 /* rts */ -#define c_rs_dtr 0x00000004 /* dtr */ -#define c_rs_dcd 0x00000100 /* cd */ -#define c_rs_dsr 0x00000200 /* dsr */ -#define c_rs_ri 0x00000400 /* ri */ -#define c_rs_cts 0x00000800 /* cts */ - -/* commands host <-> board */ - -#define c_cm_reset 0x01 /* reset/flush buffers */ -#define c_cm_ioctl 0x02 /* re-read ch_ctrl */ -#define c_cm_ioctlw 0x03 /* re-read ch_ctrl, intr when done */ -#define c_cm_ioctlm 0x04 /* rs-232 outputs change */ -#define c_cm_sendxoff 0x10 /* send xoff */ -#define c_cm_sendxon 0x11 /* send xon */ -#define c_cm_clflow 0x12 /* clear flow control (resume) */ -#define c_cm_sendbrk 0x41 /* send break */ -#define c_cm_intback 0x42 /* interrupt back */ -#define c_cm_set_break 0x43 /* tx break on */ -#define c_cm_clr_break 0x44 /* tx break off */ -#define c_cm_cmd_done 0x45 /* previous command done */ -#define c_cm_intback2 0x46 /* alternate interrupt back */ -#define c_cm_tinact 0x51 /* set inactivity detection */ -#define c_cm_irq_enbl 0x52 /* enable generation of interrupts */ -#define c_cm_irq_dsbl 0x53 /* disable generation of interrupts */ -#define c_cm_ack_enbl 0x54 /* enable acknowledged interrupt mode */ -#define c_cm_ack_dsbl 0x55 /* disable acknowledged intr mode */ -#define c_cm_flush_rx 0x56 /* flushes rx buffer */ -#define c_cm_flush_tx 0x57 /* flushes tx buffer */ -#define c_cm_q_enable 0x58 /* enables queue access from the - driver */ -#define c_cm_q_disable 0x59 /* disables queue access from the - driver */ - -#define c_cm_txbempty 0x60 /* tx buffer is empty */ -#define c_cm_txlowwm 0x61 /* tx buffer low water mark */ -#define c_cm_rxhiwm 0x62 /* rx buffer high water mark */ -#define c_cm_rxnndt 0x63 /* rx no new data timeout */ -#define c_cm_txfempty 0x64 -#define c_cm_ichar 0x65 -#define c_cm_mdcd 0x70 /* modem dcd change */ -#define c_cm_mdsr 0x71 /* modem dsr change */ -#define c_cm_mri 0x72 /* modem ri change */ -#define c_cm_mcts 0x73 /* modem cts change */ -#define c_cm_mrts 0x74 /* modem rts drop */ -#define c_cm_rxbrk 0x84 /* break received */ -#define c_cm_pr_error 0x85 /* parity error */ -#define c_cm_fr_error 0x86 /* frame error */ -#define c_cm_ovr_error 0x87 /* overrun error */ -#define c_cm_rxofl 0x88 /* rx buffer overflow */ -#define c_cm_cmderror 0x90 /* command error */ -#define c_cm_fatal 0x91 /* fatal error */ -#define c_cm_hw_reset 0x92 /* reset board */ - -/* - * ch_ctrl - this per port structure contains all parameters - * that control an specific port. it can be seen as the - * configuration registers of a "super-serial-controller". - */ - -struct ch_ctrl { - __u32 op_mode; /* operation mode */ - __u32 intr_enable; /* interrupt masking */ - __u32 sw_flow; /* sw flow control */ - __u32 flow_status; /* output flow status */ - __u32 comm_baud; /* baud rate - numerically specified */ - __u32 comm_parity; /* parity */ - __u32 comm_data_l; /* data length/stop */ - __u32 comm_flags; /* other flags */ - __u32 hw_flow; /* hw flow control */ - __u32 rs_control; /* rs-232 outputs */ - __u32 rs_status; /* rs-232 inputs */ - __u32 flow_xon; /* xon char */ - __u32 flow_xoff; /* xoff char */ - __u32 hw_overflow; /* hw overflow counter */ - __u32 sw_overflow; /* sw overflow counter */ - __u32 comm_error; /* frame/parity error counter */ - __u32 ichar; - __u32 filler[7]; -}; - - -/* - * buf_ctrl - this per channel structure contains - * all tx and rx buffer control for a given channel. - */ - -struct buf_ctrl { - __u32 flag_dma; /* buffers are in host memory */ - __u32 tx_bufaddr; /* address of the tx buffer */ - __u32 tx_bufsize; /* tx buffer size */ - __u32 tx_threshold; /* tx low water mark */ - __u32 tx_get; /* tail index tx buf */ - __u32 tx_put; /* head index tx buf */ - __u32 rx_bufaddr; /* address of the rx buffer */ - __u32 rx_bufsize; /* rx buffer size */ - __u32 rx_threshold; /* rx high water mark */ - __u32 rx_get; /* tail index rx buf */ - __u32 rx_put; /* head index rx buf */ - __u32 filler[5]; /* filler to align structures */ -}; - -/* - * board_ctrl - this per board structure contains all global - * control fields related to the board. - */ - -struct board_ctrl { - - /* static info provided by the on-board cpu */ - __u32 n_channel; /* number of channels */ - __u32 fw_version; /* firmware version */ - - /* static info provided by the driver */ - __u32 op_system; /* op_system id */ - __u32 dr_version; /* driver version */ - - /* board control area */ - __u32 inactivity; /* inactivity control */ - - /* host to fw commands */ - __u32 hcmd_channel; /* channel number */ - __u32 hcmd_param; /* pointer to parameters */ - - /* fw to host commands */ - __u32 fwcmd_channel; /* channel number */ - __u32 fwcmd_param; /* pointer to parameters */ - __u32 zf_int_queue_addr; /* offset for int_queue structure */ - - /* filler so the structures are aligned */ - __u32 filler[6]; -}; - -/* host interrupt queue */ - -#define queue_size (10*max_chan) - -struct int_queue { - unsigned char intr_code[queue_size]; - unsigned long channel[queue_size]; - unsigned long param[queue_size]; - unsigned long put; - unsigned long get; -}; - -/* - * zfw_ctrl - this is the data structure that includes all other - * data structures used by the firmware. - */ - -struct zfw_ctrl { - struct board_ctrl board_ctrl; - struct ch_ctrl ch_ctrl[max_chan]; - struct buf_ctrl buf_ctrl[max_chan]; -}; - -/****************** ****************** *******************/ -#endif - -#endif /* _uapi_linux_cyclades_h */ diff --git a/include/uapi/linux/major.h b/include/uapi/linux/major.h --- a/include/uapi/linux/major.h +++ b/include/uapi/linux/major.h -#define cyclades_major 19 -#define cycladesaux_major 20 diff --git a/include/uapi/linux/serial.h b/include/uapi/linux/serial.h --- a/include/uapi/linux/serial.h +++ b/include/uapi/linux/serial.h -#define port_cirrus 5 /* usurped by cyclades.c */ +#define port_cirrus 5 -#define port_startech 9 /* usurped by cyclades.c */ +#define port_startech 9
Serial
f76edd8f7ce06cdff2fe5b6b39a49644c684a161
jiri slaby
include
uapi
8250, configs, ioctl, it_it, linux, process, serial, zh_cn
tty: isicom, remove this orphan
the isicom driver was orphaned by commit d86b3001a1a6 (maintainers: orphan isicom) 10 years ago. noone stepped up to take care of them and to fix all the issues the driver has.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
isicom, remove this orphan
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['c', 'h', 'kconfig', 'rst', 'txt', 'maintainers', 'makefile']
9
1
1,804
--- diff --git a/documentation/admin-guide/devices.txt b/documentation/admin-guide/devices.txt --- a/documentation/admin-guide/devices.txt +++ b/documentation/admin-guide/devices.txt - 155 = /dev/isictl multitech isicom serial control + 155 = diff --git a/documentation/process/magic-number.rst b/documentation/process/magic-number.rst --- a/documentation/process/magic-number.rst +++ b/documentation/process/magic-number.rst -isicom_magic 0x4d54 isi_port ''include/linux/isicom.h'' diff --git a/documentation/translations/it_it/process/magic-number.rst b/documentation/translations/it_it/process/magic-number.rst --- a/documentation/translations/it_it/process/magic-number.rst +++ b/documentation/translations/it_it/process/magic-number.rst -isicom_magic 0x4d54 isi_port ''include/linux/isicom.h'' diff --git a/documentation/translations/zh_cn/process/magic-number.rst b/documentation/translations/zh_cn/process/magic-number.rst --- a/documentation/translations/zh_cn/process/magic-number.rst +++ b/documentation/translations/zh_cn/process/magic-number.rst -isicom_magic 0x4d54 isi_port ''include/linux/isicom.h'' diff --git a/maintainers b/maintainers --- a/maintainers +++ b/maintainers -multitech multiport card (isicom) -s: orphan -f: drivers/tty/isicom.c -f: include/linux/isicom.h - diff --git a/drivers/tty/kconfig b/drivers/tty/kconfig --- a/drivers/tty/kconfig +++ b/drivers/tty/kconfig -config isi - tristate "multi-tech multiport card support" - depends on serial_nonstandard && pci - select fw_loader - help - this is a driver for the multi-tech cards which provide several - serial ports. the driver is experimental and can currently only be - built as a module. the module will be called isicom. - if you want to do that, choose m here. - diff --git a/drivers/tty/makefile b/drivers/tty/makefile --- a/drivers/tty/makefile +++ b/drivers/tty/makefile -obj-$(config_isi) += isicom.o diff --git a/drivers/tty/isicom.c b/drivers/tty/isicom.c --- a/drivers/tty/isicom.c +++ /dev/null -// spdx-license-identifier: gpl-2.0+ -/* - * original driver code supplied by multi-tech - * - * changes - * 1/9/98 alan@lxorguk.ukuu.org.uk - * merge to 2.0.x kernel tree - * obtain and use official major/minors - * loader switched to a misc device - * (fixed range check bug as a side effect) - * printk clean up - * 9/12/98 alan@lxorguk.ukuu.org.uk - * rough port to 2.1.x - * - * 10/6/99 sameer merged the isa and pci drivers to - * a new unified driver. - * - * 3/9/99 sameer added support for isi4616 cards. - * - * 16/9/99 sameer we do not force rts low anymore. - * this is to prevent the firmware - * from getting confused. - * - * 26/10/99 sameer cosmetic changes:the driver now - * dumps the port count information - * along with i/o address and irq. - * - * 13/12/99 sameer fixed the problem with irq sharing. - * - * 10/5/00 sameer fixed isicom_shutdown_board() - * to not lower dtr on all the ports - * when the last port on the card is - * closed. - * - * 10/5/00 sameer signal mask setup command added - * to isicom_setup_port and - * isicom_shutdown_port. - * - * 24/5/00 sameer the driver is now smp aware. - * - * - * 27/11/00 vinayak p risbud fixed the driver crash problem - * - * - * 03/01/01 anil .s added support for resetting the - * internal modems on isi cards. - * - * 08/02/01 anil .s upgraded the driver for kernel - * 2.4.x - * - * 11/04/01 kevin fixed firmware load problem with - * isihp-4x card - * - * 30/04/01 anil .s fixed the remote login through - * isi port problem. now the link - * does not go down before password - * prompt. - * - * 03/05/01 anil .s fixed the problem with irq sharing - * among isi-pci cards. - * - * 03/05/01 anil .s added support to display the version - * info during insmod as well as module - * listing by lsmod. - * - * 10/05/01 anil .s done the modifications to the source - * file and install script so that the - * same installation can be used for - * 2.2.x and 2.4.x kernel. - * - * 06/06/01 anil .s now we drop both dtr and rts during - * shutdown_port as well as raise them - * during isicom_config_port. - * - * 09/06/01 acme@conectiva.com.br use capable, not suser, do - * restore_flags on failure in - * isicom_send_break, verify put_user - * result - * - * 11/02/03 ranjeeth added support for 230 kbps and 460 kbps - * baud index extended to 21 - * - * 20/03/03 ranjeeth made to work for linux advanced server. - * taken care of license warning. - * - * 10/12/03 ravindra made to work for fedora core 1 of - * red hat distribution - * - * 06/01/05 alan cox merged the isi and base kernel strands - * into a single 2.6 driver - * - * *********************************************************** - * - * to use this driver you also need the support package. you - * can find this in rpm format on - * ftp://ftp.linux.org.uk/pub/linux/alan - * - * you can find the original tools for this direct from multitech - * ftp://ftp.multitech.com/isi-cards/ - * - * having installed the cards the module options (/etc/modprobe.d/) - * - * options isicom io=card1,card2,card3,card4 irq=card1,card2,card3,card4 - * - * omit those entries for boards you don't have installed. - * - * todo - * merge testing - * 64-bit verification - */ - -#define pr_fmt(fmt) kbuild_modname ": " fmt - -#include <linux/module.h> -#include <linux/firmware.h> -#include <linux/kernel.h> -#include <linux/tty.h> -#include <linux/tty_flip.h> -#include <linux/termios.h> -#include <linux/fs.h> -#include <linux/sched.h> -#include <linux/serial.h> -#include <linux/mm.h> -#include <linux/interrupt.h> -#include <linux/timer.h> -#include <linux/delay.h> -#include <linux/ioport.h> -#include <linux/slab.h> - -#include <linux/uaccess.h> -#include <linux/io.h> - -#include <linux/pci.h> - -#include <linux/isicom.h> - -#define interruptthecard(base) outw(0, (base) + 0xc) -#define clearinterrupt(base) inw((base) + 0x0a) - -#ifdef debug -#define isicom_paranoia_check(a, b, c) __isicom_paranoia_check((a), (b), (c)) -#else -#define isicom_paranoia_check(a, b, c) 0 -#endif - -static int isicom_probe(struct pci_dev *, const struct pci_device_id *); -static void isicom_remove(struct pci_dev *); - -static const struct pci_device_id isicom_pci_tbl[] = { - { pci_device(vendor_id, 0x2028) }, - { pci_device(vendor_id, 0x2051) }, - { pci_device(vendor_id, 0x2052) }, - { pci_device(vendor_id, 0x2053) }, - { pci_device(vendor_id, 0x2054) }, - { pci_device(vendor_id, 0x2055) }, - { pci_device(vendor_id, 0x2056) }, - { pci_device(vendor_id, 0x2057) }, - { pci_device(vendor_id, 0x2058) }, - { 0 } -}; -module_device_table(pci, isicom_pci_tbl); - -static struct pci_driver isicom_driver = { - .name = "isicom", - .id_table = isicom_pci_tbl, - .probe = isicom_probe, - .remove = isicom_remove -}; - -static int prev_card = 3; /* start servicing isi_card[0] */ -static struct tty_driver *isicom_normal; - -static void isicom_tx(struct timer_list *unused); -static void isicom_start(struct tty_struct *tty); - -static define_timer(tx, isicom_tx); - -/* baud index mappings from linux defns to isi */ - -static signed char linuxb_to_isib[] = { - -1, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 13, 15, 16, 17, 18, 19, 20, 21 -}; - -struct isi_board { - unsigned long base; - int irq; - unsigned char port_count; - unsigned short status; - unsigned short port_status; /* each bit for each port */ - unsigned short shift_count; - struct isi_port *ports; - signed char count; - spinlock_t card_lock; /* card wide lock 11/5/00 -sameer */ - unsigned long flags; - unsigned int index; -}; - -struct isi_port { - unsigned short magic; - struct tty_port port; - u16 channel; - u16 status; - struct isi_board *card; - unsigned char *xmit_buf; - int xmit_head; - int xmit_tail; - int xmit_cnt; -}; - -static struct isi_board isi_card[board_count]; -static struct isi_port isi_ports[port_count]; - -/* - * locking functions for card level locking. we need to own both - * the kernel lock for the card and have the card in a position that - * it wants to talk. - */ - -static int waittillcardisfree(unsigned long base) -{ - unsigned int count = 0; - - while (!(inw(base + 0xe) & 0x1) && count++ < 100) - mdelay(1); - - return !(inw(base + 0xe) & 0x1); -} - -static int lock_card(struct isi_board *card) -{ - unsigned long base = card->base; - unsigned int retries, a; - - for (retries = 0; retries < 10; retries++) { - spin_lock_irqsave(&card->card_lock, card->flags); - for (a = 0; a < 10; a++) { - if (inw(base + 0xe) & 0x1) - return 1; - udelay(10); - } - spin_unlock_irqrestore(&card->card_lock, card->flags); - msleep(10); - } - pr_warn("failed to lock card (0x%lx) ", card->base); - - return 0; /* failed to acquire the card! */ -} - -static void unlock_card(struct isi_board *card) -{ - spin_unlock_irqrestore(&card->card_lock, card->flags); -} - -/* - * isi card specific ops ... - */ - -/* card->lock has to be held */ -static void raise_dtr(struct isi_port *port) -{ - struct isi_board *card = port->card; - unsigned long base = card->base; - u16 channel = port->channel; - - if (waittillcardisfree(base)) - return; - - outw(0x8000 | (channel << card->shift_count) | 0x02, base); - outw(0x0504, base); - interruptthecard(base); - port->status |= isi_dtr; -} - -/* card->lock has to be held */ -static void drop_dtr(struct isi_port *port) -{ - struct isi_board *card = port->card; - unsigned long base = card->base; - u16 channel = port->channel; - - if (waittillcardisfree(base)) - return; - - outw(0x8000 | (channel << card->shift_count) | 0x02, base); - outw(0x0404, base); - interruptthecard(base); - port->status &= ~isi_dtr; -} - -/* card->lock has to be held */ -static inline void raise_rts(struct isi_port *port) -{ - struct isi_board *card = port->card; - unsigned long base = card->base; - u16 channel = port->channel; - - if (waittillcardisfree(base)) - return; - - outw(0x8000 | (channel << card->shift_count) | 0x02, base); - outw(0x0a04, base); - interruptthecard(base); - port->status |= isi_rts; -} - -/* card->lock has to be held */ -static inline void drop_rts(struct isi_port *port) -{ - struct isi_board *card = port->card; - unsigned long base = card->base; - u16 channel = port->channel; - - if (waittillcardisfree(base)) - return; - - outw(0x8000 | (channel << card->shift_count) | 0x02, base); - outw(0x0804, base); - interruptthecard(base); - port->status &= ~isi_rts; -} - -/* card->lock must not be held */ - -static void isicom_dtr_rts(struct tty_port *port, int on) -{ - struct isi_port *ip = container_of(port, struct isi_port, port); - struct isi_board *card = ip->card; - unsigned long base = card->base; - u16 channel = ip->channel; - - if (!lock_card(card)) - return; - - if (on) { - outw(0x8000 | (channel << card->shift_count) | 0x02, base); - outw(0x0f04, base); - interruptthecard(base); - ip->status |= (isi_dtr | isi_rts); - } else { - outw(0x8000 | (channel << card->shift_count) | 0x02, base); - outw(0x0c04, base); - interruptthecard(base); - ip->status &= ~(isi_dtr | isi_rts); - } - unlock_card(card); -} - -/* card->lock has to be held */ -static void drop_dtr_rts(struct isi_port *port) -{ - struct isi_board *card = port->card; - unsigned long base = card->base; - u16 channel = port->channel; - - if (waittillcardisfree(base)) - return; - - outw(0x8000 | (channel << card->shift_count) | 0x02, base); - outw(0x0c04, base); - interruptthecard(base); - port->status &= ~(isi_rts | isi_dtr); -} - -/* - * isicom driver specific routines ... - * - */ - -static inline int __isicom_paranoia_check(struct isi_port const *port, - char *name, const char *routine) -{ - if (!port) { - pr_warn("warning: bad isicom magic for dev %s in %s ", - name, routine); - return 1; - } - if (port->magic != isicom_magic) { - pr_warn("warning: null isicom port for dev %s in %s ", - name, routine); - return 1; - } - - return 0; -} - -/* - * transmitter. - * - * we shovel data into the card buffers on a regular basis. the card - * will do the rest of the work for us. - */ - -static void isicom_tx(struct timer_list *unused) -{ - unsigned long flags, base; - unsigned int retries; - short count = (board_count-1), card; - short txcount, wrd, residue, word_count, cnt; - struct isi_port *port; - struct tty_struct *tty; - - /* find next active board */ - card = (prev_card + 1) & 0x0003; - while (count-- > 0) { - if (isi_card[card].status & board_active) - break; - card = (card + 1) & 0x0003; - } - if (!(isi_card[card].status & board_active)) - goto sched_again; - - prev_card = card; - - count = isi_card[card].port_count; - port = isi_card[card].ports; - base = isi_card[card].base; - - spin_lock_irqsave(&isi_card[card].card_lock, flags); - for (retries = 0; retries < 100; retries++) { - if (inw(base + 0xe) & 0x1) - break; - udelay(2); - } - if (retries >= 100) - goto unlock; - - tty = tty_port_tty_get(&port->port); - if (tty == null) - goto put_unlock; - - for (; count > 0; count--, port++) { - /* port not active or tx disabled to force flow control */ - if (!tty_port_initialized(&port->port) || - !(port->status & isi_txok)) - continue; - - txcount = min_t(short, tx_size, port->xmit_cnt); - if (txcount <= 0 || tty->stopped || tty->hw_stopped) - continue; - - if (!(inw(base + 0x02) & (1 << port->channel))) - continue; - - pr_debug("txing %d bytes, port%d. ", - txcount, port->channel + 1); - outw((port->channel << isi_card[card].shift_count) | txcount, - base); - residue = no; - wrd = 0; - while (1) { - cnt = min_t(int, txcount, (serial_xmit_size - - port->xmit_tail)); - if (residue == yes) { - residue = no; - if (cnt > 0) { - wrd |= (port->port.xmit_buf[port->xmit_tail] - << 8); - port->xmit_tail = (port->xmit_tail + 1) - & (serial_xmit_size - 1); - port->xmit_cnt--; - txcount--; - cnt--; - outw(wrd, base); - } else { - outw(wrd, base); - break; - } - } - if (cnt <= 0) - break; - word_count = cnt >> 1; - outsw(base, port->port.xmit_buf+port->xmit_tail, word_count); - port->xmit_tail = (port->xmit_tail - + (word_count << 1)) & (serial_xmit_size - 1); - txcount -= (word_count << 1); - port->xmit_cnt -= (word_count << 1); - if (cnt & 0x0001) { - residue = yes; - wrd = port->port.xmit_buf[port->xmit_tail]; - port->xmit_tail = (port->xmit_tail + 1) - & (serial_xmit_size - 1); - port->xmit_cnt--; - txcount--; - } - } - - interruptthecard(base); - if (port->xmit_cnt <= 0) - port->status &= ~isi_txok; - if (port->xmit_cnt <= wakeup_chars) - tty_wakeup(tty); - } - -put_unlock: - tty_kref_put(tty); -unlock: - spin_unlock_irqrestore(&isi_card[card].card_lock, flags); - /* schedule another tx for hopefully in about 10ms */ -sched_again: - mod_timer(&tx, jiffies + msecs_to_jiffies(10)); -} - -/* - * main interrupt handler routine - */ - -static irqreturn_t isicom_interrupt(int irq, void *dev_id) -{ - struct isi_board *card = dev_id; - struct isi_port *port; - struct tty_struct *tty; - unsigned long base; - u16 header, word_count, count, channel; - short byte_count; - unsigned char *rp; - - if (!card || !(card->status & firmware_loaded)) - return irq_none; - - base = card->base; - - /* did the card interrupt us? */ - if (!(inw(base + 0x0e) & 0x02)) - return irq_none; - - spin_lock(&card->card_lock); - - /* - * disable any interrupts from the pci card and lower the - * interrupt line - */ - outw(0x8000, base+0x04); - clearinterrupt(base); - - inw(base); /* get the dummy word out */ - header = inw(base); - channel = (header & 0x7800) >> card->shift_count; - byte_count = header & 0xff; - - if (channel + 1 > card->port_count) { - pr_warn("%s(0x%lx): %d(channel) > port_count ", - __func__, base, channel + 1); - outw(0x0000, base+0x04); /* enable interrupts */ - spin_unlock(&card->card_lock); - return irq_handled; - } - port = card->ports + channel; - if (!tty_port_initialized(&port->port)) { - outw(0x0000, base+0x04); /* enable interrupts */ - spin_unlock(&card->card_lock); - return irq_handled; - } - - tty = tty_port_tty_get(&port->port); - if (tty == null) { - while (byte_count > 1) { - inw(base); - byte_count -= 2; - } - if (byte_count & 0x01) - inw(base); - outw(0x0000, base+0x04); /* enable interrupts */ - spin_unlock(&card->card_lock); - return irq_handled; - } - - if (header & 0x8000) { /* status packet */ - header = inw(base); - switch (header & 0xff) { - case 0: /* change in eia signals */ - if (tty_port_check_carrier(&port->port)) { - if (port->status & isi_dcd) { - if (!(header & isi_dcd)) { - /* carrier has been lost */ - pr_debug("%s: dcd->low. ", - __func__); - port->status &= ~isi_dcd; - tty_hangup(tty); - } - } else if (header & isi_dcd) { - /* carrier has been detected */ - pr_debug("%s: dcd->high. ", - __func__); - port->status |= isi_dcd; - wake_up_interruptible(&port->port.open_wait); - } - } else { - if (header & isi_dcd) - port->status |= isi_dcd; - else - port->status &= ~isi_dcd; - } - - if (tty_port_cts_enabled(&port->port)) { - if (tty->hw_stopped) { - if (header & isi_cts) { - tty->hw_stopped = 0; - /* start tx ing */ - port->status |= (isi_txok - | isi_cts); - tty_wakeup(tty); - } - } else if (!(header & isi_cts)) { - tty->hw_stopped = 1; - /* stop tx ing */ - port->status &= ~(isi_txok | isi_cts); - } - } else { - if (header & isi_cts) - port->status |= isi_cts; - else - port->status &= ~isi_cts; - } - - if (header & isi_dsr) - port->status |= isi_dsr; - else - port->status &= ~isi_dsr; - - if (header & isi_ri) - port->status |= isi_ri; - else - port->status &= ~isi_ri; - - break; - - case 1: /* received break !!! */ - tty_insert_flip_char(&port->port, 0, tty_break); - if (port->port.flags & async_sak) - do_sak(tty); - tty_flip_buffer_push(&port->port); - break; - - case 2: /* statistics */ - pr_debug("%s: stats!!! ", __func__); - break; - - default: - pr_debug("%s: unknown code in status packet. ", - __func__); - break; - } - } else { /* data packet */ - count = tty_prepare_flip_string(&port->port, &rp, - byte_count & ~1); - pr_debug("%s: can rx %d of %d bytes. ", - __func__, count, byte_count); - word_count = count >> 1; - insw(base, rp, word_count); - byte_count -= (word_count << 1); - if (count & 0x0001) { - tty_insert_flip_char(&port->port, inw(base) & 0xff, - tty_normal); - byte_count -= 2; - } - if (byte_count > 0) { - pr_debug("%s(0x%lx:%d): flip buffer overflow! dropping bytes... ", - __func__, base, channel + 1); - /* drain out unread xtra data */ - while (byte_count > 0) { - inw(base); - byte_count -= 2; - } - } - tty_flip_buffer_push(&port->port); - } - outw(0x0000, base+0x04); /* enable interrupts */ - spin_unlock(&card->card_lock); - tty_kref_put(tty); - - return irq_handled; -} - -static void isicom_config_port(struct tty_struct *tty) -{ - struct isi_port *port = tty->driver_data; - struct isi_board *card = port->card; - unsigned long baud; - unsigned long base = card->base; - u16 channel_setup, channel = port->channel, - shift_count = card->shift_count; - unsigned char flow_ctrl; - - /* fixme: switch to new tty baud api */ - baud = c_baud(tty); - if (baud & cbaudex) { - baud &= ~cbaudex; - - /* if cbaudex bit is on and the baud is set to either 50 or 75 - * then the card is programmed for 57.6kbps or 115kbps - * respectively. - */ - - /* 1,2,3,4 => 57.6, 115.2, 230, 460 kbps resp. */ - if (baud < 1 || baud > 4) - tty->termios.c_cflag &= ~cbaudex; - else - baud += 15; - } - if (baud == 15) { - - /* the async_spd_hi and async_spd_vhi options are set - * by the set_serial_info ioctl ... this is done by - * the 'setserial' utility. - */ - - if ((port->port.flags & async_spd_mask) == async_spd_hi) - baud++; /* 57.6 kbps */ - if ((port->port.flags & async_spd_mask) == async_spd_vhi) - baud += 2; /* 115 kbps */ - if ((port->port.flags & async_spd_mask) == async_spd_shi) - baud += 3; /* 230 kbps*/ - if ((port->port.flags & async_spd_mask) == async_spd_warp) - baud += 4; /* 460 kbps*/ - } - if (linuxb_to_isib[baud] == -1) { - /* hang up */ - drop_dtr(port); - return; - } else - raise_dtr(port); - - if (waittillcardisfree(base) == 0) { - outw(0x8000 | (channel << shift_count) | 0x03, base); - outw(linuxb_to_isib[baud] << 8 | 0x03, base); - channel_setup = 0; - switch (c_csize(tty)) { - case cs5: - channel_setup |= isicom_cs5; - break; - case cs6: - channel_setup |= isicom_cs6; - break; - case cs7: - channel_setup |= isicom_cs7; - break; - case cs8: - channel_setup |= isicom_cs8; - break; - } - - if (c_cstopb(tty)) - channel_setup |= isicom_2sb; - if (c_parenb(tty)) { - channel_setup |= isicom_evpar; - if (c_parodd(tty)) - channel_setup |= isicom_odpar; - } - outw(channel_setup, base); - interruptthecard(base); - } - tty_port_set_check_carrier(&port->port, !c_clocal(tty)); - - /* flow control settings ...*/ - flow_ctrl = 0; - tty_port_set_cts_flow(&port->port, c_crtscts(tty)); - if (c_crtscts(tty)) - flow_ctrl |= isicom_ctsrts; - if (i_ixon(tty)) - flow_ctrl |= isicom_respond_xonxoff; - if (i_ixoff(tty)) - flow_ctrl |= isicom_initiate_xonxoff; - - if (waittillcardisfree(base) == 0) { - outw(0x8000 | (channel << shift_count) | 0x04, base); - outw(flow_ctrl << 8 | 0x05, base); - outw((stop_char(tty)) << 8 | (start_char(tty)), base); - interruptthecard(base); - } - - /* rx enabled -> enable port for rx on the card */ - if (c_cread(tty)) { - card->port_status |= (1 << channel); - outw(card->port_status, base + 0x02); - } -} - -/* open et all */ - -static inline void isicom_setup_board(struct isi_board *bp) -{ - int channel; - struct isi_port *port; - - bp->count++; - if (!(bp->status & board_init)) { - port = bp->ports; - for (channel = 0; channel < bp->port_count; channel++, port++) - drop_dtr_rts(port); - } - bp->status |= board_active | board_init; -} - -/* activate and thus setup board are protected from races against shutdown - by the tty_port mutex */ - -static int isicom_activate(struct tty_port *tport, struct tty_struct *tty) -{ - struct isi_port *port = container_of(tport, struct isi_port, port); - struct isi_board *card = port->card; - unsigned long flags; - - if (tty_port_alloc_xmit_buf(tport) < 0) - return -enomem; - - spin_lock_irqsave(&card->card_lock, flags); - isicom_setup_board(card); - - port->xmit_cnt = port->xmit_head = port->xmit_tail = 0; - - /* discard any residual data */ - if (waittillcardisfree(card->base) == 0) { - outw(0x8000 | (port->channel << card->shift_count) | 0x02, - card->base); - outw(((isicom_killtx | isicom_killrx) << 8) | 0x06, card->base); - interruptthecard(card->base); - } - isicom_config_port(tty); - spin_unlock_irqrestore(&card->card_lock, flags); - - return 0; -} - -static int isicom_carrier_raised(struct tty_port *port) -{ - struct isi_port *ip = container_of(port, struct isi_port, port); - return (ip->status & isi_dcd)?1 : 0; -} - -static struct tty_port *isicom_find_port(struct tty_struct *tty) -{ - struct isi_port *port; - struct isi_board *card; - unsigned int board; - int line = tty->index; - - board = board(line); - card = &isi_card[board]; - - if (!(card->status & firmware_loaded)) - return null; - - /* open on a port greater than the port count for the card !!! */ - if (line > ((board * 16) + card->port_count - 1)) - return null; - - port = &isi_ports[line]; - if (isicom_paranoia_check(port, tty->name, "isicom_open")) - return null; - - return &port->port; -} - -static int isicom_open(struct tty_struct *tty, struct file *filp) -{ - struct isi_port *port; - struct tty_port *tport; - - tport = isicom_find_port(tty); - if (tport == null) - return -enodev; - port = container_of(tport, struct isi_port, port); - - tty->driver_data = port; - return tty_port_open(tport, tty, filp); -} - -/* close et all */ - -/* card->lock has to be held */ -static void isicom_shutdown_port(struct isi_port *port) -{ - struct isi_board *card = port->card; - - if (--card->count < 0) { - pr_debug("%s: bad board(0x%lx) count %d. ", - __func__, card->base, card->count); - card->count = 0; - } - /* last port was closed, shutdown that board too */ - if (!card->count) - card->status &= board_active; -} - -static void isicom_flush_buffer(struct tty_struct *tty) -{ - struct isi_port *port = tty->driver_data; - struct isi_board *card = port->card; - unsigned long flags; - - if (isicom_paranoia_check(port, tty->name, "isicom_flush_buffer")) - return; - - spin_lock_irqsave(&card->card_lock, flags); - port->xmit_cnt = port->xmit_head = port->xmit_tail = 0; - spin_unlock_irqrestore(&card->card_lock, flags); - - tty_wakeup(tty); -} - -static void isicom_shutdown(struct tty_port *port) -{ - struct isi_port *ip = container_of(port, struct isi_port, port); - struct isi_board *card = ip->card; - unsigned long flags; - - /* indicate to the card that no more data can be received - on this port */ - spin_lock_irqsave(&card->card_lock, flags); - card->port_status &= ~(1 << ip->channel); - outw(card->port_status, card->base + 0x02); - isicom_shutdown_port(ip); - spin_unlock_irqrestore(&card->card_lock, flags); - tty_port_free_xmit_buf(port); -} - -static void isicom_close(struct tty_struct *tty, struct file *filp) -{ - struct isi_port *ip = tty->driver_data; - struct tty_port *port; - - if (ip == null) - return; - - port = &ip->port; - if (isicom_paranoia_check(ip, tty->name, "isicom_close")) - return; - tty_port_close(port, tty, filp); -} - -/* write et all */ -static int isicom_write(struct tty_struct *tty, const unsigned char *buf, - int count) -{ - struct isi_port *port = tty->driver_data; - struct isi_board *card = port->card; - unsigned long flags; - int cnt, total = 0; - - if (isicom_paranoia_check(port, tty->name, "isicom_write")) - return 0; - - spin_lock_irqsave(&card->card_lock, flags); - - while (1) { - cnt = min_t(int, count, min(serial_xmit_size - port->xmit_cnt - - 1, serial_xmit_size - port->xmit_head)); - if (cnt <= 0) - break; - - memcpy(port->port.xmit_buf + port->xmit_head, buf, cnt); - port->xmit_head = (port->xmit_head + cnt) & (serial_xmit_size - - 1); - port->xmit_cnt += cnt; - buf += cnt; - count -= cnt; - total += cnt; - } - if (port->xmit_cnt && !tty->stopped && !tty->hw_stopped) - port->status |= isi_txok; - spin_unlock_irqrestore(&card->card_lock, flags); - return total; -} - -/* put_char et all */ -static int isicom_put_char(struct tty_struct *tty, unsigned char ch) -{ - struct isi_port *port = tty->driver_data; - struct isi_board *card = port->card; - unsigned long flags; - - if (isicom_paranoia_check(port, tty->name, "isicom_put_char")) - return 0; - - spin_lock_irqsave(&card->card_lock, flags); - if (port->xmit_cnt >= serial_xmit_size - 1) { - spin_unlock_irqrestore(&card->card_lock, flags); - return 0; - } - - port->port.xmit_buf[port->xmit_head++] = ch; - port->xmit_head &= (serial_xmit_size - 1); - port->xmit_cnt++; - spin_unlock_irqrestore(&card->card_lock, flags); - return 1; -} - -/* flush_chars et all */ -static void isicom_flush_chars(struct tty_struct *tty) -{ - struct isi_port *port = tty->driver_data; - - if (isicom_paranoia_check(port, tty->name, "isicom_flush_chars")) - return; - - if (port->xmit_cnt <= 0 || tty->stopped || tty->hw_stopped || - !port->port.xmit_buf) - return; - - /* this tells the transmitter to consider this port for - data output to the card ... that's the best we can do. */ - port->status |= isi_txok; -} - -/* write_room et all */ -static int isicom_write_room(struct tty_struct *tty) -{ - struct isi_port *port = tty->driver_data; - int free; - - if (isicom_paranoia_check(port, tty->name, "isicom_write_room")) - return 0; - - free = serial_xmit_size - port->xmit_cnt - 1; - if (free < 0) - free = 0; - return free; -} - -/* chars_in_buffer et all */ -static int isicom_chars_in_buffer(struct tty_struct *tty) -{ - struct isi_port *port = tty->driver_data; - if (isicom_paranoia_check(port, tty->name, "isicom_chars_in_buffer")) - return 0; - return port->xmit_cnt; -} - -/* ioctl et all */ -static int isicom_send_break(struct tty_struct *tty, int length) -{ - struct isi_port *port = tty->driver_data; - struct isi_board *card = port->card; - unsigned long base = card->base; - - if (length == -1) - return -eopnotsupp; - - if (!lock_card(card)) - return -einval; - - outw(0x8000 | ((port->channel) << (card->shift_count)) | 0x3, base); - outw((length & 0xff) << 8 | 0x00, base); - outw((length & 0xff00u), base); - interruptthecard(base); - - unlock_card(card); - return 0; -} - -static int isicom_tiocmget(struct tty_struct *tty) -{ - struct isi_port *port = tty->driver_data; - /* just send the port status */ - u16 status = port->status; - - if (isicom_paranoia_check(port, tty->name, "isicom_ioctl")) - return -enodev; - - return ((status & isi_rts) ? tiocm_rts : 0) | - ((status & isi_dtr) ? tiocm_dtr : 0) | - ((status & isi_dcd) ? tiocm_car : 0) | - ((status & isi_dsr) ? tiocm_dsr : 0) | - ((status & isi_cts) ? tiocm_cts : 0) | - ((status & isi_ri ) ? tiocm_ri : 0); -} - -static int isicom_tiocmset(struct tty_struct *tty, - unsigned int set, unsigned int clear) -{ - struct isi_port *port = tty->driver_data; - unsigned long flags; - - if (isicom_paranoia_check(port, tty->name, "isicom_ioctl")) - return -enodev; - - spin_lock_irqsave(&port->card->card_lock, flags); - if (set & tiocm_rts) - raise_rts(port); - if (set & tiocm_dtr) - raise_dtr(port); - - if (clear & tiocm_rts) - drop_rts(port); - if (clear & tiocm_dtr) - drop_dtr(port); - spin_unlock_irqrestore(&port->card->card_lock, flags); - - return 0; -} - -static int isicom_set_serial_info(struct tty_struct *tty, - struct serial_struct *ss) -{ - struct isi_port *port = tty->driver_data; - int reconfig_port; - - if (isicom_paranoia_check(port, tty->name, "isicom_ioctl")) - return -enodev; - - mutex_lock(&port->port.mutex); - reconfig_port = ((port->port.flags & async_spd_mask) != - (ss->flags & async_spd_mask)); - - if (!capable(cap_sys_admin)) { - if ((ss->close_delay != port->port.close_delay) || - (ss->closing_wait != port->port.closing_wait) || - ((ss->flags & ~async_usr_mask) != - (port->port.flags & ~async_usr_mask))) { - mutex_unlock(&port->port.mutex); - return -eperm; - } - port->port.flags = ((port->port.flags & ~async_usr_mask) | - (ss->flags & async_usr_mask)); - } else { - port->port.close_delay = ss->close_delay; - port->port.closing_wait = ss->closing_wait; - port->port.flags = ((port->port.flags & ~async_flags) | - (ss->flags & async_flags)); - } - if (reconfig_port) { - unsigned long flags; - spin_lock_irqsave(&port->card->card_lock, flags); - isicom_config_port(tty); - spin_unlock_irqrestore(&port->card->card_lock, flags); - } - mutex_unlock(&port->port.mutex); - return 0; -} - -static int isicom_get_serial_info(struct tty_struct *tty, - struct serial_struct *ss) -{ - struct isi_port *port = tty->driver_data; - - if (isicom_paranoia_check(port, tty->name, "isicom_ioctl")) - return -enodev; - - mutex_lock(&port->port.mutex); -/* ss->type = ? */ - ss->line = port - isi_ports; - ss->port = port->card->base; - ss->irq = port->card->irq; - ss->flags = port->port.flags; -/* ss->baud_base = ? */ - ss->close_delay = port->port.close_delay; - ss->closing_wait = port->port.closing_wait; - mutex_unlock(&port->port.mutex); - return 0; -} - -/* set_termios et all */ -static void isicom_set_termios(struct tty_struct *tty, - struct ktermios *old_termios) -{ - struct isi_port *port = tty->driver_data; - unsigned long flags; - - if (isicom_paranoia_check(port, tty->name, "isicom_set_termios")) - return; - - if (tty->termios.c_cflag == old_termios->c_cflag && - tty->termios.c_iflag == old_termios->c_iflag) - return; - - spin_lock_irqsave(&port->card->card_lock, flags); - isicom_config_port(tty); - spin_unlock_irqrestore(&port->card->card_lock, flags); - - if ((old_termios->c_cflag & crtscts) && !c_crtscts(tty)) { - tty->hw_stopped = 0; - isicom_start(tty); - } -} - -/* throttle et all */ -static void isicom_throttle(struct tty_struct *tty) -{ - struct isi_port *port = tty->driver_data; - struct isi_board *card = port->card; - - if (isicom_paranoia_check(port, tty->name, "isicom_throttle")) - return; - - /* tell the card that this port cannot handle any more data for now */ - card->port_status &= ~(1 << port->channel); - outw(card->port_status, card->base + 0x02); -} - -/* unthrottle et all */ -static void isicom_unthrottle(struct tty_struct *tty) -{ - struct isi_port *port = tty->driver_data; - struct isi_board *card = port->card; - - if (isicom_paranoia_check(port, tty->name, "isicom_unthrottle")) - return; - - /* tell the card that this port is ready to accept more data */ - card->port_status |= (1 << port->channel); - outw(card->port_status, card->base + 0x02); -} - -/* stop et all */ -static void isicom_stop(struct tty_struct *tty) -{ - struct isi_port *port = tty->driver_data; - - if (isicom_paranoia_check(port, tty->name, "isicom_stop")) - return; - - /* this tells the transmitter not to consider this port for - data output to the card. */ - port->status &= ~isi_txok; -} - -/* start et all */ -static void isicom_start(struct tty_struct *tty) -{ - struct isi_port *port = tty->driver_data; - - if (isicom_paranoia_check(port, tty->name, "isicom_start")) - return; - - /* this tells the transmitter to consider this port for - data output to the card. */ - port->status |= isi_txok; -} - -static void isicom_hangup(struct tty_struct *tty) -{ - struct isi_port *port = tty->driver_data; - - if (isicom_paranoia_check(port, tty->name, "isicom_hangup")) - return; - tty_port_hangup(&port->port); -} - - -/* - * driver init and deinit functions - */ - -static const struct tty_operations isicom_ops = { - .open = isicom_open, - .close = isicom_close, - .write = isicom_write, - .put_char = isicom_put_char, - .flush_chars = isicom_flush_chars, - .write_room = isicom_write_room, - .chars_in_buffer = isicom_chars_in_buffer, - .set_termios = isicom_set_termios, - .throttle = isicom_throttle, - .unthrottle = isicom_unthrottle, - .stop = isicom_stop, - .start = isicom_start, - .hangup = isicom_hangup, - .flush_buffer = isicom_flush_buffer, - .tiocmget = isicom_tiocmget, - .tiocmset = isicom_tiocmset, - .break_ctl = isicom_send_break, - .get_serial = isicom_get_serial_info, - .set_serial = isicom_set_serial_info, -}; - -static const struct tty_port_operations isicom_port_ops = { - .carrier_raised = isicom_carrier_raised, - .dtr_rts = isicom_dtr_rts, - .activate = isicom_activate, - .shutdown = isicom_shutdown, -}; - -static int reset_card(struct pci_dev *pdev, - const unsigned int card, unsigned int *signature) -{ - struct isi_board *board = pci_get_drvdata(pdev); - unsigned long base = board->base; - unsigned int sig, portcount = 0; - int retval = 0; - - dev_dbg(&pdev->dev, "isiload:resetting card%d at 0x%lx ", card + 1, - base); - - inw(base + 0x8); - - msleep(10); - - outw(0, base + 0x8); /* reset */ - - msleep(1000); - - sig = inw(base + 0x4) & 0xff; - - if (sig != 0xa5 && sig != 0xbb && sig != 0xcc && sig != 0xdd && - sig != 0xee) { - dev_warn(&pdev->dev, "isiload:card%u reset failure (possible " - "bad i/o port address 0x%lx). ", card + 1, base); - dev_dbg(&pdev->dev, "sig=0x%x ", sig); - retval = -eio; - goto end; - } - - msleep(10); - - portcount = inw(base + 0x2); - if (!(inw(base + 0xe) & 0x1) || (portcount != 0 && portcount != 4 && - portcount != 8 && portcount != 16)) { - dev_err(&pdev->dev, "isiload:pci card%d reset failure. ", - card + 1); - retval = -eio; - goto end; - } - - switch (sig) { - case 0xa5: - case 0xbb: - case 0xdd: - board->port_count = (portcount == 4) ? 4 : 8; - board->shift_count = 12; - break; - case 0xcc: - case 0xee: - board->port_count = 16; - board->shift_count = 11; - break; - } - dev_info(&pdev->dev, "-done "); - *signature = sig; - -end: - return retval; -} - -static int load_firmware(struct pci_dev *pdev, - const unsigned int index, const unsigned int signature) -{ - struct isi_board *board = pci_get_drvdata(pdev); - const struct firmware *fw; - unsigned long base = board->base; - unsigned int a; - u16 word_count, status; - int retval = -eio; - char *name; - u8 *data; - - struct stframe { - u16 addr; - u16 count; - u8 data[0]; - } *frame; - - switch (signature) { - case 0xa5: - name = "isi608.bin"; - break; - case 0xbb: - name = "isi608em.bin"; - break; - case 0xcc: - name = "isi616em.bin"; - break; - case 0xdd: - name = "isi4608.bin"; - break; - case 0xee: - name = "isi4616.bin"; - break; - default: - dev_err(&pdev->dev, "unknown signature. "); - goto end; - } - - retval = request_firmware(&fw, name, &pdev->dev); - if (retval) - goto end; - - retval = -eio; - - for (frame = (struct stframe *)fw->data; - frame < (struct stframe *)(fw->data + fw->size); - frame = (struct stframe *)((u8 *)(frame + 1) + - frame->count)) { - if (waittillcardisfree(base)) - goto errrelfw; - - outw(0xf0, base); /* start upload sequence */ - outw(0x00, base); - outw(frame->addr, base); /* lsb of address */ - - word_count = frame->count / 2 + frame->count % 2; - outw(word_count, base); - interruptthecard(base); - - udelay(100); /* 0x2f */ - - if (waittillcardisfree(base)) - goto errrelfw; - - status = inw(base + 0x4); - if (status != 0) { - dev_warn(&pdev->dev, "card%d rejected load header: " - "address:0x%x " - "count:0x%x " - "status:0x%x ", - index + 1, frame->addr, frame->count, status); - goto errrelfw; - } - outsw(base, frame->data, word_count); - - interruptthecard(base); - - udelay(50); /* 0x0f */ - - if (waittillcardisfree(base)) - goto errrelfw; - - status = inw(base + 0x4); - if (status != 0) { - dev_err(&pdev->dev, "card%d got out of sync.card " - "status:0x%x ", index + 1, status); - goto errrelfw; - } - } - -/* xxx: should we test it by reading it back and comparing with original like - * in load firmware package? */ - for (frame = (struct stframe *)fw->data; - frame < (struct stframe *)(fw->data + fw->size); - frame = (struct stframe *)((u8 *)(frame + 1) + - frame->count)) { - if (waittillcardisfree(base)) - goto errrelfw; - - outw(0xf1, base); /* start download sequence */ - outw(0x00, base); - outw(frame->addr, base); /* lsb of address */ - - word_count = (frame->count >> 1) + frame->count % 2; - outw(word_count + 1, base); - interruptthecard(base); - - udelay(50); /* 0xf */ - - if (waittillcardisfree(base)) - goto errrelfw; - - status = inw(base + 0x4); - if (status != 0) { - dev_warn(&pdev->dev, "card%d rejected verify header: " - "address:0x%x " - "count:0x%x " - "status: 0x%x ", - index + 1, frame->addr, frame->count, status); - goto errrelfw; - } - - data = kmalloc_array(word_count, 2, gfp_kernel); - if (data == null) { - dev_err(&pdev->dev, "card%d, firmware upload " - "failed, not enough memory ", index + 1); - goto errrelfw; - } - inw(base); - insw(base, data, word_count); - interruptthecard(base); - - for (a = 0; a < frame->count; a++) - if (data[a] != frame->data[a]) { - kfree(data); - dev_err(&pdev->dev, "card%d, firmware upload " - "failed ", index + 1); - goto errrelfw; - } - kfree(data); - - udelay(50); /* 0xf */ - - if (waittillcardisfree(base)) - goto errrelfw; - - status = inw(base + 0x4); - if (status != 0) { - dev_err(&pdev->dev, "card%d verify got out of sync. " - "card status:0x%x ", index + 1, status); - goto errrelfw; - } - } - - /* xfer ctrl */ - if (waittillcardisfree(base)) - goto errrelfw; - - outw(0xf2, base); - outw(0x800, base); - outw(0x0, base); - outw(0x0, base); - interruptthecard(base); - outw(0x0, base + 0x4); /* for isi4608 cards */ - - board->status |= firmware_loaded; - retval = 0; - -errrelfw: - release_firmware(fw); -end: - return retval; -} - -/* - * insmod can set static symbols so keep these static - */ -static unsigned int card_count; - -static int isicom_probe(struct pci_dev *pdev, - const struct pci_device_id *ent) -{ - unsigned int signature, index; - int retval = -eperm; - struct isi_board *board = null; - - if (card_count >= board_count) - goto err; - - retval = pci_enable_device(pdev); - if (retval) { - dev_err(&pdev->dev, "failed to enable "); - goto err; - } - - dev_info(&pdev->dev, "isi pci card(device id 0x%x) ", ent->device); - - /* allot the first empty slot in the array */ - for (index = 0; index < board_count; index++) { - if (isi_card[index].base == 0) { - board = &isi_card[index]; - break; - } - } - if (index == board_count) { - retval = -enodev; - goto err_disable; - } - - board->index = index; - board->base = pci_resource_start(pdev, 3); - board->irq = pdev->irq; - card_count++; - - pci_set_drvdata(pdev, board); - - retval = pci_request_region(pdev, 3, isicom_name); - if (retval) { - dev_err(&pdev->dev, "i/o region 0x%lx-0x%lx is busy. card%d " - "will be disabled. ", board->base, board->base + 15, - index + 1); - retval = -ebusy; - goto errdec; - } - - retval = request_irq(board->irq, isicom_interrupt, - irqf_shared, isicom_name, board); - if (retval < 0) { - dev_err(&pdev->dev, "could not install handler at irq %d. " - "card%d will be disabled. ", board->irq, index + 1); - goto errunrr; - } - - retval = reset_card(pdev, index, &signature); - if (retval < 0) - goto errunri; - - retval = load_firmware(pdev, index, signature); - if (retval < 0) - goto errunri; - - for (index = 0; index < board->port_count; index++) { - struct tty_port *tport = &board->ports[index].port; - tty_port_init(tport); - tport->ops = &isicom_port_ops; - tport->close_delay = 50 * hz/100; - tport->closing_wait = 3000 * hz/100; - tty_port_register_device(tport, isicom_normal, - board->index * 16 + index, &pdev->dev); - } - - return 0; - -errunri: - free_irq(board->irq, board); -errunrr: - pci_release_region(pdev, 3); -errdec: - board->base = 0; - card_count--; -err_disable: - pci_disable_device(pdev); -err: - return retval; -} - -static void isicom_remove(struct pci_dev *pdev) -{ - struct isi_board *board = pci_get_drvdata(pdev); - unsigned int i; - - for (i = 0; i < board->port_count; i++) { - tty_unregister_device(isicom_normal, board->index * 16 + i); - tty_port_destroy(&board->ports[i].port); - } - - free_irq(board->irq, board); - pci_release_region(pdev, 3); - board->base = 0; - card_count--; - pci_disable_device(pdev); -} - -static int __init isicom_init(void) -{ - int retval, idx, channel; - struct isi_port *port; - - for (idx = 0; idx < board_count; idx++) { - port = &isi_ports[idx * 16]; - isi_card[idx].ports = port; - spin_lock_init(&isi_card[idx].card_lock); - for (channel = 0; channel < 16; channel++, port++) { - port->magic = isicom_magic; - port->card = &isi_card[idx]; - port->channel = channel; - port->status = 0; - /* . . . */ - } - isi_card[idx].base = 0; - isi_card[idx].irq = 0; - } - - /* tty driver structure initialization */ - isicom_normal = alloc_tty_driver(port_count); - if (!isicom_normal) { - retval = -enomem; - goto error; - } - - isicom_normal->name = "ttym"; - isicom_normal->major = isicom_nmajor; - isicom_normal->minor_start = 0; - isicom_normal->type = tty_driver_type_serial; - isicom_normal->subtype = serial_type_normal; - isicom_normal->init_termios = tty_std_termios; - isicom_normal->init_termios.c_cflag = b9600 | cs8 | cread | hupcl | - clocal; - isicom_normal->flags = tty_driver_real_raw | - tty_driver_dynamic_dev | tty_driver_hardware_break; - tty_set_operations(isicom_normal, &isicom_ops); - - retval = tty_register_driver(isicom_normal); - if (retval) { - pr_debug("couldn't register the dialin driver "); - goto err_puttty; - } - - retval = pci_register_driver(&isicom_driver); - if (retval < 0) { - pr_err("unable to register pci driver. "); - goto err_unrtty; - } - - mod_timer(&tx, jiffies + 1); - - return 0; -err_unrtty: - tty_unregister_driver(isicom_normal); -err_puttty: - put_tty_driver(isicom_normal); -error: - return retval; -} - -static void __exit isicom_exit(void) -{ - del_timer_sync(&tx); - - pci_unregister_driver(&isicom_driver); - tty_unregister_driver(isicom_normal); - put_tty_driver(isicom_normal); -} - -module_init(isicom_init); -module_exit(isicom_exit); - -module_author("multitech"); -module_description("driver for the isi series of cards by multitech"); -module_license("gpl"); -module_firmware("isi608.bin"); -module_firmware("isi608em.bin"); -module_firmware("isi616em.bin"); -module_firmware("isi4608.bin"); -module_firmware("isi4616.bin"); diff --git a/include/linux/isicom.h b/include/linux/isicom.h --- a/include/linux/isicom.h +++ /dev/null -/* spdx-license-identifier: gpl-2.0 */ -#ifndef _linux_isicom_h -#define _linux_isicom_h - -#define yes 1 -#define no 0 - -/* - * isicom driver definitions ... - * - */ - -#define isicom_name "isicom" - -/* - * pci definitions - */ - -#define devid_count 9 -#define vendor_id 0x10b5 - -/* - * these are now officially allocated numbers - */ - -#define isicom_nmajor 112 /* normal */ -#define isicom_cmajor 113 /* callout */ -#define isicom_magic (('m' << 8) | 't') - -#define wakeup_chars 256 /* hard coded for now */ -#define tx_size 254 - -#define board_count 4 -#define port_count (board_count*16) - -/* character sizes */ - -#define isicom_cs5 0x0000 -#define isicom_cs6 0x0001 -#define isicom_cs7 0x0002 -#define isicom_cs8 0x0003 - -/* stop bits */ - -#define isicom_1sb 0x0000 -#define isicom_2sb 0x0004 - -/* parity */ - -#define isicom_nopar 0x0000 -#define isicom_odpar 0x0008 -#define isicom_evpar 0x0018 - -/* flow control */ - -#define isicom_ctsrts 0x03 -#define isicom_initiate_xonxoff 0x04 -#define isicom_respond_xonxoff 0x08 - -#define board(line) (((line) >> 4) & 0x3) - - /* isi kill queue bitmap */ - -#define isicom_killtx 0x01 -#define isicom_killrx 0x02 - - /* isi_board status bitmap */ - -#define firmware_loaded 0x0001 -#define board_active 0x0002 -#define board_init 0x0004 - - /* isi_port status bitmap */ - -#define isi_cts 0x1000 -#define isi_dsr 0x2000 -#define isi_ri 0x4000 -#define isi_dcd 0x8000 -#define isi_dtr 0x0100 -#define isi_rts 0x0200 - - -#define isi_txok 0x0001 - -#endif /* isicom_h */
Serial
67b1544a55c94b62f68488d5fcbc93cca293dc32
jiri slaby
drivers
tty
it_it, process, zh_cn
tty: rocket, remove the driver
while the driver is still marked as maintained in maintainers, comtrol does not really care about this ancient driver. they are still manufacturing serial devices, but those are controlled only by out-of-tree drivers.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
rocket, remove the driver
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['c', 'h', 'kconfig', 'rst', 'maintainers', 'makefile']
11
0
4,683
--- diff --git a/documentation/driver-api/serial/rocket.rst b/documentation/driver-api/serial/rocket.rst --- a/documentation/driver-api/serial/rocket.rst +++ /dev/null -================================================ -comtrol(tm) rocketport(r)/rocketmodem(tm) series -================================================ - -device driver for the linux operating system -============================================ - -product overview ----------------- - -this driver provides a loadable kernel driver for the comtrol rocketport -and rocketmodem pci boards. these boards provide, 2, 4, 8, 16, or 32 -high-speed serial ports or modems. this driver supports up to a combination -of four rocketport or rocketmodems boards in one machine simultaneously. -this file assumes that you are using the rocketport driver which is -integrated into the kernel sources. - -the driver can also be installed as an external module using the usual -"make;make install" routine. this external module driver, obtainable -from the comtrol website listed below, is useful for updating the driver -or installing it into kernels which do not have the driver configured -into them. installations instructions for the external module -are in the included readme and hw_install files. - -rocketport isa and rocketmodem ii pci boards currently are only supported by -this driver in module form. - -the rocketport isa board requires i/o ports to be configured by the dip -switches on the board. see the section "isa rocketport boards" below for -information on how to set the dip switches. - -you pass the i/o port to the driver using the following module parameters: - -board1: - i/o port for the first isa board -board2: - i/o port for the second isa board -board3: - i/o port for the third isa board -board4: - i/o port for the fourth isa board - -there is a set of utilities and scripts provided with the external driver -(downloadable from http://www.comtrol.com) that ease the configuration and -setup of the isa cards. - -the rocketmodem ii pci boards require firmware to be loaded into the card -before it will function. the driver has only been tested as a module for this -board. - -installation procedures ------------------------ - -rocketport/rocketmodem pci cards require no driver configuration, they are -automatically detected and configured. - -the rocketport driver can be installed as a module (recommended) or built -into the kernel. this is selected, as for other drivers, through the 'make config' -command from the root of the linux source tree during the kernel build process. - -the rocketport/rocketmodem serial ports installed by this driver are assigned -device major number 46, and will be named /dev/ttyrx, where x is the port number -starting at zero (ex. /dev/ttyr0, /devttyr1, ...). if you have multiple cards -installed in the system, the mapping of port names to serial ports is displayed -in the system log at /var/log/messages. - -if installed as a module, the module must be loaded. this can be done -manually by entering "modprobe rocket". to have the module loaded automatically -upon system boot, edit a '/etc/modprobe.d/*.conf' file and add the line -"alias char-major-46 rocket". - -in order to use the ports, their device names (nodes) must be created with mknod. -this is only required once, the system will retain the names once created. to -create the rocketport/rocketmodem device names, use the command -"mknod /dev/ttyrx c 46 x" where x is the port number starting at zero. - -for example:: - - > mknod /dev/ttyr0 c 46 0 - > mknod /dev/ttyr1 c 46 1 - > mknod /dev/ttyr2 c 46 2 - -the linux script makedev will create the first 16 ttyrx device names (nodes) -for you:: - - >/dev/makedev ttyr - -isa rocketport boards ---------------------- - -you must assign and configure the i/o addresses used by the isa rocketport -card before installing and using it. this is done by setting a set of dip -switches on the rocketport board. - - -setting the i/o address ------------------------ - -before installing rocketport(r) or rocketport ra boards, you must find -a range of i/o addresses for it to use. the first rocketport card -requires a 68-byte contiguous block of i/o addresses, starting at one -of the following: 0x100h, 0x140h, 0x180h, 0x200h, 0x240h, 0x280h, -0x300h, 0x340h, 0x380h. this i/o address must be reflected in the dip -switches of *all* of the rocketport cards. - -the second, third, and fourth rocketport cards require a 64-byte -contiguous block of i/o addresses, starting at one of the following -i/o addresses: 0x100h, 0x140h, 0x180h, 0x1c0h, 0x200h, 0x240h, 0x280h, -0x2c0h, 0x300h, 0x340h, 0x380h, 0x3c0h. the i/o address used by the -second, third, and fourth rocketport cards (if present) are set via -software control. the dip switch settings for the i/o address must be -set to the value of the first rocketport cards. - -in order to distinguish each of the card from the others, each card -must have a unique board id set on the dip switches. the first -rocketport board must be set with the dip switches corresponding to -the first board, the second board must be set with the dip switches -corresponding to the second board, etc. important: the board id is -the only place where the dip switch settings should differ between the -various rocketport boards in a system. - -the i/o address range used by any of the rocketport cards must not -conflict with any other cards in the system, including other -rocketport cards. below, you will find a list of commonly used i/o -address ranges which may be in use by other devices in your system. -on a linux system, "cat /proc/ioports" will also be helpful in -identifying what i/o addresses are being used by devices on your -system. - -remember, the first rocketport uses 68 i/o addresses. so, if you set it -for 0x100, it will occupy 0x100 to 0x143. this would mean that you -can not set the second, third or fourth board for address 0x140 since -the first 4 bytes of that range are used by the first board. you would -need to set the second, third, or fourth board to one of the next available -blocks such as 0x180. - -rocketport and rocketport ra sw1 settings:: - - +-------------------------------+ - | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | - +-------+-------+---------------+ - | unused| card | i/o port block| - +-------------------------------+ - - dip switches dip switches - 7 8 6 5 - =================== =================== - on on unused, must be on. on on first card <==== default - on off second card - off on third card - off off fourth card - - dip switches i/o address range - 4 3 2 1 used by the first card - ===================================== - on off on off 100-143 - on off off on 140-183 - on off off off 180-1c3 <==== default - off on on off 200-243 - off on off on 240-283 - off on off off 280-2c3 - off off on off 300-343 - off off off on 340-383 - off off off off 380-3c3 - -reporting bugs --------------- - -for technical support, please provide the following -information: driver version, kernel release, distribution of -kernel, and type of board you are using. error messages and log -printouts port configuration details are especially helpful. - -usa: - :phone: (612) 494-4100 - :fax: (612) 494-4199 - 📧 support@comtrol.com - -comtrol europe: - :phone: +44 (0) 1 869 323-220 - :fax: +44 (0) 1 869 323-211 - 📧 support@comtrol.co.uk - -web: http://www.comtrol.com -ftp: ftp.comtrol.com diff --git a/documentation/process/magic-number.rst b/documentation/process/magic-number.rst --- a/documentation/process/magic-number.rst +++ b/documentation/process/magic-number.rst -rport_magic 0x00525001 r_port ''drivers/char/rocket_int.h'' diff --git a/documentation/translations/it_it/process/magic-number.rst b/documentation/translations/it_it/process/magic-number.rst --- a/documentation/translations/it_it/process/magic-number.rst +++ b/documentation/translations/it_it/process/magic-number.rst -rport_magic 0x00525001 r_port ''drivers/char/rocket_int.h'' diff --git a/documentation/translations/zh_cn/process/magic-number.rst b/documentation/translations/zh_cn/process/magic-number.rst --- a/documentation/translations/zh_cn/process/magic-number.rst +++ b/documentation/translations/zh_cn/process/magic-number.rst -rport_magic 0x00525001 r_port ''drivers/char/rocket_int.h'' diff --git a/maintainers b/maintainers --- a/maintainers +++ b/maintainers -rocketport driver -s: maintained -w: http://www.comtrol.com -f: documentation/driver-api/serial/rocket.rst -f: drivers/tty/rocket* - diff --git a/drivers/tty/kconfig b/drivers/tty/kconfig --- a/drivers/tty/kconfig +++ b/drivers/tty/kconfig -config rocketport - tristate "comtrol rocketport support" - depends on serial_nonstandard && (isa || eisa || pci) - help - this driver supports comtrol rocketport and rocketmodem pci boards. - these boards provide 2, 4, 8, 16, or 32 high-speed serial ports or - modems. for information about the rocketport/rocketmodem boards - and this driver read <file:documentation/driver-api/serial/rocket.rst>. - - to compile this driver as a module, choose m here: the - module will be called rocket. - - if you want to compile this driver into the kernel, say y here. if - you don't have a comtrol rocketport/rocketmodem card installed, say n. - diff --git a/drivers/tty/makefile b/drivers/tty/makefile --- a/drivers/tty/makefile +++ b/drivers/tty/makefile -obj-$(config_rocketport) += rocket.o diff --git a/drivers/tty/rocket.c b/drivers/tty/rocket.c --- a/drivers/tty/rocket.c +++ /dev/null -// spdx-license-identifier: (gpl-2.0+ or bsd-3-clause) -/* - * rocketport device driver for linux - * - * written by theodore ts'o, 1995, 1996, 1997, 1998, 1999, 2000. - * - * copyright (c) 1995, 1996, 1997, 1998, 1999, 2000, 2003 by comtrol, inc. - */ - -/* - * kernel synchronization: - * - * this driver has 2 kernel control paths - exception handlers (calls into the driver - * from user mode) and the timer bottom half (tasklet). this is a polled driver, interrupts - * are not used. - * - * critical data: - * - rp_table[], accessed through passed "info" pointers, is a global (static) array of - * serial port state information and the xmit_buf circular buffer. protected by - * a per port spinlock. - * - xmit_flags[], an array of ints indexed by line (port) number, indicating that there - * is data to be transmitted. protected by atomic bit operations. - * - rp_num_ports, int indicating number of open ports, protected by atomic operations. - * - * rp_write() and rp_write_char() functions use a per port semaphore to protect against - * simultaneous access to the same port by more than one process. - */ - -/****** defines ******/ -#define rocket_paranoia_check -#define rocket_disable_simusage - -#undef rocket_soft_flow -#undef rocket_debug_open -#undef rocket_debug_intr -#undef rocket_debug_write -#undef rocket_debug_flow -#undef rocket_debug_throttle -#undef rocket_debug_wait_until_sent -#undef rocket_debug_receive -#undef rocket_debug_hangup -#undef rev_pci_order -#undef rocket_debug_io - -#define poll_period (hz/100) /* polling period .01 seconds (10ms) */ - -/****** kernel includes ******/ - -#include <linux/module.h> -#include <linux/errno.h> -#include <linux/major.h> -#include <linux/kernel.h> -#include <linux/signal.h> -#include <linux/slab.h> -#include <linux/mm.h> -#include <linux/sched.h> -#include <linux/timer.h> -#include <linux/interrupt.h> -#include <linux/tty.h> -#include <linux/tty_driver.h> -#include <linux/tty_flip.h> -#include <linux/serial.h> -#include <linux/string.h> -#include <linux/fcntl.h> -#include <linux/ptrace.h> -#include <linux/mutex.h> -#include <linux/ioport.h> -#include <linux/delay.h> -#include <linux/completion.h> -#include <linux/wait.h> -#include <linux/pci.h> -#include <linux/uaccess.h> -#include <linux/atomic.h> -#include <asm/unaligned.h> -#include <linux/bitops.h> -#include <linux/spinlock.h> -#include <linux/init.h> - -/****** rocketport includes ******/ - -#include "rocket_int.h" -#include "rocket.h" - -#define rocket_version "2.09" -#define rocket_date "12-june-2003" - -/****** rocketport local variables ******/ - -static void rp_do_poll(struct timer_list *unused); - -static struct tty_driver *rocket_driver; - -static struct rocket_version driver_version = { - rocket_version, rocket_date -}; - -static struct r_port *rp_table[max_rp_ports]; /* the main repository of serial port state information. */ -static unsigned int xmit_flags[num_boards]; /* bit significant, indicates port had data to transmit. */ - /* eg. bit 0 indicates port 0 has xmit data, ... */ -static atomic_t rp_num_ports_open; /* number of serial ports open */ -static define_timer(rocket_timer, rp_do_poll); - -static unsigned long board1; /* isa addresses, retrieved from rocketport.conf */ -static unsigned long board2; -static unsigned long board3; -static unsigned long board4; -static unsigned long controller; -static bool support_low_speed; -static unsigned long modem1; -static unsigned long modem2; -static unsigned long modem3; -static unsigned long modem4; -static unsigned long pc104_1[8]; -static unsigned long pc104_2[8]; -static unsigned long pc104_3[8]; -static unsigned long pc104_4[8]; -static unsigned long *pc104[4] = { pc104_1, pc104_2, pc104_3, pc104_4 }; - -static int rp_baud_base[num_boards]; /* board config info (someday make a per-board structure) */ -static unsigned long rcktpt_io_addr[num_boards]; -static int rcktpt_type[num_boards]; -static int is_pci[num_boards]; -static rocketmodel_t rocketmodel[num_boards]; -static int max_board; -static const struct tty_port_operations rocket_port_ops; - -/* - * the following arrays define the interrupt bits corresponding to each aiop. - * these bits are different between the isa and regular pci boards and the - * universal pci boards. - */ - -static word_t aiop_intr_bits[aiop_ctl_size] = { - aiop_intr_bit_0, - aiop_intr_bit_1, - aiop_intr_bit_2, - aiop_intr_bit_3 -}; - -#ifdef config_pci -static word_t upci_aiop_intr_bits[aiop_ctl_size] = { - upci_aiop_intr_bit_0, - upci_aiop_intr_bit_1, - upci_aiop_intr_bit_2, - upci_aiop_intr_bit_3 -}; -#endif - -static byte_t rdata[rdatasize] = { - 0x00, 0x09, 0xf6, 0x82, - 0x02, 0x09, 0x86, 0xfb, - 0x04, 0x09, 0x00, 0x0a, - 0x06, 0x09, 0x01, 0x0a, - 0x08, 0x09, 0x8a, 0x13, - 0x0a, 0x09, 0xc5, 0x11, - 0x0c, 0x09, 0x86, 0x85, - 0x0e, 0x09, 0x20, 0x0a, - 0x10, 0x09, 0x21, 0x0a, - 0x12, 0x09, 0x41, 0xff, - 0x14, 0x09, 0x82, 0x00, - 0x16, 0x09, 0x82, 0x7b, - 0x18, 0x09, 0x8a, 0x7d, - 0x1a, 0x09, 0x88, 0x81, - 0x1c, 0x09, 0x86, 0x7a, - 0x1e, 0x09, 0x84, 0x81, - 0x20, 0x09, 0x82, 0x7c, - 0x22, 0x09, 0x0a, 0x0a -}; - -static byte_t rregdata[rregdatasize] = { - 0x00, 0x09, 0xf6, 0x82, /* 00: stop rx processor */ - 0x08, 0x09, 0x8a, 0x13, /* 04: tx software flow control */ - 0x0a, 0x09, 0xc5, 0x11, /* 08: xon char */ - 0x0c, 0x09, 0x86, 0x85, /* 0c: xany */ - 0x12, 0x09, 0x41, 0xff, /* 10: rx mask char */ - 0x14, 0x09, 0x82, 0x00, /* 14: compare/ignore #0 */ - 0x16, 0x09, 0x82, 0x7b, /* 18: compare #1 */ - 0x18, 0x09, 0x8a, 0x7d, /* 1c: compare #2 */ - 0x1a, 0x09, 0x88, 0x81, /* 20: interrupt #1 */ - 0x1c, 0x09, 0x86, 0x7a, /* 24: ignore/replace #1 */ - 0x1e, 0x09, 0x84, 0x81, /* 28: interrupt #2 */ - 0x20, 0x09, 0x82, 0x7c, /* 2c: ignore/replace #2 */ - 0x22, 0x09, 0x0a, 0x0a /* 30: rx fifo enable */ -}; - -static controller_t scontroller[ctl_size] = { - {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, - {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}}, - {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, - {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}}, - {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, - {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}}, - {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0}, - {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}} -}; - -static byte_t sbitmapclrtbl[8] = { - 0xfe, 0xfd, 0xfb, 0xf7, 0xef, 0xdf, 0xbf, 0x7f -}; - -static byte_t sbitmapsettbl[8] = { - 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80 -}; - -static int sclockprescale = 0x14; - -/* - * line number is the ttysix number (x), the minor number. we - * assign them sequentially, starting at zero. the following - * array keeps track of the line number assigned to a given board/aiop/channel. - */ -static unsigned char linenumbers[max_rp_ports]; -static unsigned long nextlinenumber; - -/***** rocketport static prototypes *********/ -static int __init init_isa(int i); -static void rp_wait_until_sent(struct tty_struct *tty, int timeout); -static void rp_flush_buffer(struct tty_struct *tty); -static unsigned char getlinenumber(int ctrl, int aiop, int ch); -static unsigned char setlinenumber(int ctrl, int aiop, int ch); -static void rp_start(struct tty_struct *tty); -static int sinitchan(controller_t * ctlp, channel_t * chp, int aiopnum, - int channum); -static void ssetinterfacemode(channel_t * chp, byte_t mode); -static void sflushrxfifo(channel_t * chp); -static void sflushtxfifo(channel_t * chp); -static void seninterrupts(channel_t * chp, word_t flags); -static void sdisinterrupts(channel_t * chp, word_t flags); -static void smodemreset(controller_t * ctlp, int chan, int on); -static void spcimodemreset(controller_t * ctlp, int chan, int on); -static int swritetxpriobyte(channel_t * chp, byte_t data); -static int sinitcontroller(controller_t * ctlp, int ctlnum, byteio_t mudbacio, - byteio_t * aiopiolist, int aiopiolistsize, - int irqnum, byte_t frequency, int periodiconly); -static int sreadaiopid(byteio_t io); -static int sreadaiopnumchan(wordio_t io); - -module_author("theodore ts'o"); -module_description("comtrol rocketport driver"); -module_param_hw(board1, ulong, ioport, 0); -module_parm_desc(board1, "i/o port for (isa) board #1"); -module_param_hw(board2, ulong, ioport, 0); -module_parm_desc(board2, "i/o port for (isa) board #2"); -module_param_hw(board3, ulong, ioport, 0); -module_parm_desc(board3, "i/o port for (isa) board #3"); -module_param_hw(board4, ulong, ioport, 0); -module_parm_desc(board4, "i/o port for (isa) board #4"); -module_param_hw(controller, ulong, ioport, 0); -module_parm_desc(controller, "i/o port for (isa) rocketport controller"); -module_param(support_low_speed, bool, 0); -module_parm_desc(support_low_speed, "1 means support 50 baud, 0 means support 460400 baud"); -module_param(modem1, ulong, 0); -module_parm_desc(modem1, "1 means (isa) board #1 is a rocketmodem"); -module_param(modem2, ulong, 0); -module_parm_desc(modem2, "1 means (isa) board #2 is a rocketmodem"); -module_param(modem3, ulong, 0); -module_parm_desc(modem3, "1 means (isa) board #3 is a rocketmodem"); -module_param(modem4, ulong, 0); -module_parm_desc(modem4, "1 means (isa) board #4 is a rocketmodem"); -module_param_array(pc104_1, ulong, null, 0); -module_parm_desc(pc104_1, "set interface types for isa(pc104) board #1 (e.g. pc104_1=232,232,485,485,..."); -module_param_array(pc104_2, ulong, null, 0); -module_parm_desc(pc104_2, "set interface types for isa(pc104) board #2 (e.g. pc104_2=232,232,485,485,..."); -module_param_array(pc104_3, ulong, null, 0); -module_parm_desc(pc104_3, "set interface types for isa(pc104) board #3 (e.g. pc104_3=232,232,485,485,..."); -module_param_array(pc104_4, ulong, null, 0); -module_parm_desc(pc104_4, "set interface types for isa(pc104) board #4 (e.g. pc104_4=232,232,485,485,..."); - -static int __init rp_init(void); -static void rp_cleanup_module(void); - -module_init(rp_init); -module_exit(rp_cleanup_module); - - -module_license("dual bsd/gpl"); - -/*************************************************************************/ -/* module code starts here */ - -static inline int rocket_paranoia_check(struct r_port *info, - const char *routine) -{ -#ifdef rocket_paranoia_check - if (!info) - return 1; - if (info->magic != rport_magic) { - printk(kern_warning "warning: bad magic number for rocketport " - "struct in %s ", routine); - return 1; - } -#endif - return 0; -} - - -/* serial port receive data function. called (from timer poll) when an aiopic signals - * that receive data is present on a serial port. pulls data from fifo, moves it into the - * tty layer. - */ -static void rp_do_receive(struct r_port *info, channel_t *cp, - unsigned int chanstatus) -{ - unsigned int charnstat; - int torecv, wrecv, space; - unsigned char *cbuf; - - torecv = sgetrxcnt(cp); -#ifdef rocket_debug_intr - printk(kern_info "rp_do_receive(%d)... ", torecv); -#endif - if (torecv == 0) - return; - - /* - * if status indicates there are errored characters in the - * fifo, then enter status mode (a word in fifo holds - * character and status). - */ - if (chanstatus & (rxfoverfl | rxbreak | rxframe | rxparity)) { - if (!(chanstatus & statmode)) { -#ifdef rocket_debug_receive - printk(kern_info "entering statmode... "); -#endif - chanstatus |= statmode; - senrxstatusmode(cp); - } - } - - /* - * if we previously entered status mode, then read down the - * fifo one word at a time, pulling apart the character and - * the status. update error counters depending on status - */ - if (chanstatus & statmode) { -#ifdef rocket_debug_receive - printk(kern_info "ignore %x, read %x... ", - info->ignore_status_mask, info->read_status_mask); -#endif - while (torecv) { - char flag; - - charnstat = sinw(sgettxrxdataio(cp)); -#ifdef rocket_debug_receive - printk(kern_info "%x... ", charnstat); -#endif - if (charnstat & stmbreakh) - charnstat &= ~(stmframeh | stmparityh); - if (charnstat & info->ignore_status_mask) { - torecv--; - continue; - } - charnstat &= info->read_status_mask; - if (charnstat & stmbreakh) - flag = tty_break; - else if (charnstat & stmparityh) - flag = tty_parity; - else if (charnstat & stmframeh) - flag = tty_frame; - else if (charnstat & stmrcvrovrh) - flag = tty_overrun; - else - flag = tty_normal; - tty_insert_flip_char(&info->port, charnstat & 0xff, - flag); - torecv--; - } - - /* - * after we've emptied the fifo in status mode, turn - * status mode back off - */ - if (sgetrxcnt(cp) == 0) { -#ifdef rocket_debug_receive - printk(kern_info "status mode off. "); -#endif - sdisrxstatusmode(cp); - } - } else { - /* - * we aren't in status mode, so read down the fifo two - * characters at time by doing repeated word io - * transfer. - */ - space = tty_prepare_flip_string(&info->port, &cbuf, torecv); - if (space < torecv) { -#ifdef rocket_debug_receive - printk(kern_info "rp_do_receive:insufficient space torecv=%d space=%d ", torecv, space); -#endif - if (space <= 0) - return; - torecv = space; - } - wrecv = torecv >> 1; - if (wrecv) - sinstrw(sgettxrxdataio(cp), (unsigned short *) cbuf, wrecv); - if (torecv & 1) - cbuf[torecv - 1] = sinb(sgettxrxdataio(cp)); - } - /* push the data up to the tty layer */ - tty_flip_buffer_push(&info->port); -} - -/* - * serial port transmit data function. called from the timer polling loop as a - * result of a bit set in xmit_flags[], indicating data (from the tty layer) is ready - * to be sent out the serial port. data is buffered in rp_table[line].xmit_buf, it is - * moved to the port's xmit fifo. *info is critical data, protected by spinlocks. - */ -static void rp_do_transmit(struct r_port *info) -{ - int c; - channel_t *cp = &info->channel; - struct tty_struct *tty; - unsigned long flags; - -#ifdef rocket_debug_intr - printk(kern_debug "%s ", __func__); -#endif - if (!info) - return; - tty = tty_port_tty_get(&info->port); - - if (tty == null) { - printk(kern_warning "rp: warning %s called with tty==null ", __func__); - clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]); - return; - } - - spin_lock_irqsave(&info->slock, flags); - info->xmit_fifo_room = txfifo_size - sgettxcnt(cp); - - /* loop sending data to fifo until done or fifo full */ - while (1) { - if (tty->stopped) - break; - c = min(info->xmit_fifo_room, info->xmit_cnt); - c = min(c, xmit_buf_size - info->xmit_tail); - if (c <= 0 || info->xmit_fifo_room <= 0) - break; - soutstrw(sgettxrxdataio(cp), (unsigned short *) (info->xmit_buf + info->xmit_tail), c / 2); - if (c & 1) - soutb(sgettxrxdataio(cp), info->xmit_buf[info->xmit_tail + c - 1]); - info->xmit_tail += c; - info->xmit_tail &= xmit_buf_size - 1; - info->xmit_cnt -= c; - info->xmit_fifo_room -= c; -#ifdef rocket_debug_intr - printk(kern_info "tx %d chars... ", c); -#endif - } - - if (info->xmit_cnt == 0) - clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]); - - if (info->xmit_cnt < wakeup_chars) { - tty_wakeup(tty); -#ifdef rocketport_have_poll_wait - wake_up_interruptible(&tty->poll_wait); -#endif - } - - spin_unlock_irqrestore(&info->slock, flags); - tty_kref_put(tty); - -#ifdef rocket_debug_intr - printk(kern_debug "(%d,%d,%d,%d)... ", info->xmit_cnt, info->xmit_head, - info->xmit_tail, info->xmit_fifo_room); -#endif -} - -/* - * called when a serial port signals it has read data in it's rx fifo. - * it checks what interrupts are pending and services them, including - * receiving serial data. - */ -static void rp_handle_port(struct r_port *info) -{ - channel_t *cp; - unsigned int intmask, chanstatus; - - if (!info) - return; - - if (!tty_port_initialized(&info->port)) { - printk(kern_warning "rp: warning: rp_handle_port called with " - "info->flags & not_init "); - return; - } - - cp = &info->channel; - - intmask = sgetchanintid(cp) & info->intmask; -#ifdef rocket_debug_intr - printk(kern_info "rp_interrupt %02x... ", intmask); -#endif - chanstatus = sgetchanstatus(cp); - if (intmask & rxf_trig) { /* rx fifo trigger level */ - rp_do_receive(info, cp, chanstatus); - } - if (intmask & delta_cd) { /* cd change */ -#if (defined(rocket_debug_open) || defined(rocket_debug_intr) || defined(rocket_debug_hangup)) - printk(kern_info "ttyr%d cd now %s... ", info->line, - (chanstatus & cd_act) ? "on" : "off"); -#endif - if (!(chanstatus & cd_act) && info->cd_status) { -#ifdef rocket_debug_hangup - printk(kern_info "cd drop, calling hangup. "); -#endif - tty_port_tty_hangup(&info->port, false); - } - info->cd_status = (chanstatus & cd_act) ? 1 : 0; - wake_up_interruptible(&info->port.open_wait); - } -#ifdef rocket_debug_intr - if (intmask & delta_cts) { /* cts change */ - printk(kern_info "cts change... "); - } - if (intmask & delta_dsr) { /* dsr change */ - printk(kern_info "dsr change... "); - } -#endif -} - -/* - * the top level polling routine. repeats every 1/100 hz (10ms). - */ -static void rp_do_poll(struct timer_list *unused) -{ - controller_t *ctlp; - int ctrl, aiop, ch, line; - unsigned int xmitmask, i; - unsigned int ctlmask; - unsigned char aiopmask; - word_t bit; - - /* walk through all the boards (ctrl's) */ - for (ctrl = 0; ctrl < max_board; ctrl++) { - if (rcktpt_io_addr[ctrl] <= 0) - continue; - - /* get a ptr to the board's control struct */ - ctlp = sctlnumtoctlptr(ctrl); - - /* get the interrupt status from the board */ -#ifdef config_pci - if (ctlp->bustype == ispci) - ctlmask = spcigetcontrollerintstatus(ctlp); - else -#endif - ctlmask = sgetcontrollerintstatus(ctlp); - - /* check if any aiop read bits are set */ - for (aiop = 0; ctlmask; aiop++) { - bit = ctlp->aiopintrbits[aiop]; - if (ctlmask & bit) { - ctlmask &= ~bit; - aiopmask = sgetaiopintstatus(ctlp, aiop); - - /* check if any port read bits are set */ - for (ch = 0; aiopmask; aiopmask >>= 1, ch++) { - if (aiopmask & 1) { - - /* get the line number (/dev/ttyrx number). */ - /* read the data from the port. */ - line = getlinenumber(ctrl, aiop, ch); - rp_handle_port(rp_table[line]); - } - } - } - } - - xmitmask = xmit_flags[ctrl]; - - /* - * xmit_flags contains bit-significant flags, indicating there is data - * to xmit on the port. bit 0 is port 0 on this board, bit 1 is port - * 1, ... (32 total possible). the variable i has the aiop and ch - * numbers encoded in it (port 0-7 are aiop0, 8-15 are aiop1, etc). - */ - if (xmitmask) { - for (i = 0; i < rocketmodel[ctrl].numports; i++) { - if (xmitmask & (1 << i)) { - aiop = (i & 0x18) >> 3; - ch = i & 0x07; - line = getlinenumber(ctrl, aiop, ch); - rp_do_transmit(rp_table[line]); - } - } - } - } - - /* - * reset the timer so we get called at the next clock tick (10ms). - */ - if (atomic_read(&rp_num_ports_open)) - mod_timer(&rocket_timer, jiffies + poll_period); -} - -/* - * initializes the r_port structure for a port, as well as enabling the port on - * the board. - * inputs: board, aiop, chan numbers - */ -static void __init -init_r_port(int board, int aiop, int chan, struct pci_dev *pci_dev) -{ - unsigned rocketmode; - struct r_port *info; - int line; - controller_t *ctlp; - - /* get the next available line number */ - line = setlinenumber(board, aiop, chan); - - ctlp = sctlnumtoctlptr(board); - - /* get a r_port struct for the port, fill it in and save it globally, indexed by line number */ - info = kzalloc(sizeof (struct r_port), gfp_kernel); - if (!info) { - printk(kern_err "couldn't allocate info struct for line #%d ", - line); - return; - } - - info->magic = rport_magic; - info->line = line; - info->ctlp = ctlp; - info->board = board; - info->aiop = aiop; - info->chan = chan; - tty_port_init(&info->port); - info->port.ops = &rocket_port_ops; - info->flags &= ~rocket_mode_mask; - if (board < array_size(pc104) && line < array_size(pc104_1)) - switch (pc104[board][line]) { - case 422: - info->flags |= rocket_mode_rs422; - break; - case 485: - info->flags |= rocket_mode_rs485; - break; - case 232: - default: - info->flags |= rocket_mode_rs232; - break; - } - else - info->flags |= rocket_mode_rs232; - - info->intmask = rxf_trig | txfifo_mt | src_int | delta_cd | delta_cts | delta_dsr; - if (sinitchan(ctlp, &info->channel, aiop, chan) == 0) { - printk(kern_err "rocketport sinitchan(%d, %d, %d) failed! ", - board, aiop, chan); - tty_port_destroy(&info->port); - kfree(info); - return; - } - - rocketmode = info->flags & rocket_mode_mask; - - if ((info->flags & rocket_rts_toggle) || (rocketmode == rocket_mode_rs485)) - senrtstoggle(&info->channel); - else - sdisrtstoggle(&info->channel); - - if (ctlp->boardtype == rocket_type_pc104) { - switch (rocketmode) { - case rocket_mode_rs485: - ssetinterfacemode(&info->channel, interfacemoders485); - break; - case rocket_mode_rs422: - ssetinterfacemode(&info->channel, interfacemoders422); - break; - case rocket_mode_rs232: - default: - if (info->flags & rocket_rts_toggle) - ssetinterfacemode(&info->channel, interfacemoders232t); - else - ssetinterfacemode(&info->channel, interfacemoders232); - break; - } - } - spin_lock_init(&info->slock); - mutex_init(&info->write_mtx); - rp_table[line] = info; - tty_port_register_device(&info->port, rocket_driver, line, - pci_dev ? &pci_dev->dev : null); -} - -/* - * configures a rocketport port according to its termio settings. called from - * user mode into the driver (exception handler). *info cd manipulation is spinlock protected. - */ -static void configure_r_port(struct tty_struct *tty, struct r_port *info, - struct ktermios *old_termios) -{ - unsigned cflag; - unsigned long flags; - unsigned rocketmode; - int bits, baud, divisor; - channel_t *cp; - struct ktermios *t = &tty->termios; - - cp = &info->channel; - cflag = t->c_cflag; - - /* byte size and parity */ - if ((cflag & csize) == cs8) { - ssetdata8(cp); - bits = 10; - } else { - ssetdata7(cp); - bits = 9; - } - if (cflag & cstopb) { - ssetstop2(cp); - bits++; - } else { - ssetstop1(cp); - } - - if (cflag & parenb) { - senparity(cp); - bits++; - if (cflag & parodd) { - ssetoddparity(cp); - } else { - ssetevenparity(cp); - } - } else { - sdisparity(cp); - } - - /* baud rate */ - baud = tty_get_baud_rate(tty); - if (!baud) - baud = 9600; - divisor = ((rp_baud_base[info->board] + (baud >> 1)) / baud) - 1; - if ((divisor >= 8192 || divisor < 0) && old_termios) { - baud = tty_termios_baud_rate(old_termios); - if (!baud) - baud = 9600; - divisor = (rp_baud_base[info->board] / baud) - 1; - } - if (divisor >= 8192 || divisor < 0) { - baud = 9600; - divisor = (rp_baud_base[info->board] / baud) - 1; - } - info->cps = baud / bits; - ssetbaud(cp, divisor); - - /* fixme: should really back compute a baud rate from the divisor */ - tty_encode_baud_rate(tty, baud, baud); - - if (cflag & crtscts) { - info->intmask |= delta_cts; - senctsflowctl(cp); - } else { - info->intmask &= ~delta_cts; - sdisctsflowctl(cp); - } - if (cflag & clocal) { - info->intmask &= ~delta_cd; - } else { - spin_lock_irqsave(&info->slock, flags); - if (sgetchanstatus(cp) & cd_act) - info->cd_status = 1; - else - info->cd_status = 0; - info->intmask |= delta_cd; - spin_unlock_irqrestore(&info->slock, flags); - } - - /* - * handle software flow control in the board - */ -#ifdef rocket_soft_flow - if (i_ixon(tty)) { - sentxsoftflowctl(cp); - if (i_ixany(tty)) { - senixany(cp); - } else { - sdisixany(cp); - } - ssettxxonchar(cp, start_char(tty)); - ssettxxoffchar(cp, stop_char(tty)); - } else { - sdistxsoftflowctl(cp); - sdisixany(cp); - sclrtxxoff(cp); - } -#endif - - /* - * set up ignore/read mask words - */ - info->read_status_mask = stmrcvrovrh | 0xff; - if (i_inpck(tty)) - info->read_status_mask |= stmframeh | stmparityh; - if (i_brkint(tty) || i_parmrk(tty)) - info->read_status_mask |= stmbreakh; - - /* - * characters to ignore - */ - info->ignore_status_mask = 0; - if (i_ignpar(tty)) - info->ignore_status_mask |= stmframeh | stmparityh; - if (i_ignbrk(tty)) { - info->ignore_status_mask |= stmbreakh; - /* - * if we're ignoring parity and break indicators, - * ignore overruns too. (for real raw support). - */ - if (i_ignpar(tty)) - info->ignore_status_mask |= stmrcvrovrh; - } - - rocketmode = info->flags & rocket_mode_mask; - - if ((info->flags & rocket_rts_toggle) - || (rocketmode == rocket_mode_rs485)) - senrtstoggle(cp); - else - sdisrtstoggle(cp); - - ssetrts(&info->channel); - - if (cp->ctlp->boardtype == rocket_type_pc104) { - switch (rocketmode) { - case rocket_mode_rs485: - ssetinterfacemode(cp, interfacemoders485); - break; - case rocket_mode_rs422: - ssetinterfacemode(cp, interfacemoders422); - break; - case rocket_mode_rs232: - default: - if (info->flags & rocket_rts_toggle) - ssetinterfacemode(cp, interfacemoders232t); - else - ssetinterfacemode(cp, interfacemoders232); - break; - } - } -} - -static int carrier_raised(struct tty_port *port) -{ - struct r_port *info = container_of(port, struct r_port, port); - return (sgetchanstatuslo(&info->channel) & cd_act) ? 1 : 0; -} - -static void dtr_rts(struct tty_port *port, int on) -{ - struct r_port *info = container_of(port, struct r_port, port); - if (on) { - ssetdtr(&info->channel); - ssetrts(&info->channel); - } else { - sclrdtr(&info->channel); - sclrrts(&info->channel); - } -} - -/* - * exception handler that opens a serial port. creates xmit_buf storage, fills in - * port's r_port struct. initializes the port hardware. - */ -static int rp_open(struct tty_struct *tty, struct file *filp) -{ - struct r_port *info; - struct tty_port *port; - int retval; - channel_t *cp; - unsigned long page; - - info = rp_table[tty->index]; - if (info == null) - return -enxio; - port = &info->port; - - page = __get_free_page(gfp_kernel); - if (!page) - return -enomem; - - /* - * we must not sleep from here until the port is marked fully in use. - */ - if (info->xmit_buf) - free_page(page); - else - info->xmit_buf = (unsigned char *) page; - - tty->driver_data = info; - tty_port_tty_set(port, tty); - - if (port->count++ == 0) { - atomic_inc(&rp_num_ports_open); - -#ifdef rocket_debug_open - printk(kern_info "rocket mod++ = %d... ", - atomic_read(&rp_num_ports_open)); -#endif - } -#ifdef rocket_debug_open - printk(kern_info "rp_open ttyr%d, count=%d ", info->line, info->port.count); -#endif - - /* - * info->count is now 1; so it's safe to sleep now. - */ - if (!tty_port_initialized(port)) { - cp = &info->channel; - ssetrxtrigger(cp, trig_1); - if (sgetchanstatus(cp) & cd_act) - info->cd_status = 1; - else - info->cd_status = 0; - sdisrxstatusmode(cp); - sflushrxfifo(cp); - sflushtxfifo(cp); - - seninterrupts(cp, (txint_en | mcint_en | rxint_en | srcint_en | chanint_en)); - ssetrxtrigger(cp, trig_1); - - sgetchanstatus(cp); - sdisrxstatusmode(cp); - sclrtxxoff(cp); - - sdisctsflowctl(cp); - sdistxsoftflowctl(cp); - - senrxfifo(cp); - sentransmit(cp); - - tty_port_set_initialized(&info->port, 1); - - configure_r_port(tty, info, null); - if (c_baud(tty)) { - ssetdtr(cp); - ssetrts(cp); - } - } - /* starts (or resets) the maint polling loop */ - mod_timer(&rocket_timer, jiffies + poll_period); - - retval = tty_port_block_til_ready(port, tty, filp); - if (retval) { -#ifdef rocket_debug_open - printk(kern_info "rp_open returning after block_til_ready with %d ", retval); -#endif - return retval; - } - return 0; -} - -/* - * exception handler that closes a serial port. info->port.count is considered critical. - */ -static void rp_close(struct tty_struct *tty, struct file *filp) -{ - struct r_port *info = tty->driver_data; - struct tty_port *port = &info->port; - int timeout; - channel_t *cp; - - if (rocket_paranoia_check(info, "rp_close")) - return; - -#ifdef rocket_debug_open - printk(kern_info "rp_close ttyr%d, count = %d ", info->line, info->port.count); -#endif - - if (tty_port_close_start(port, tty, filp) == 0) - return; - - mutex_lock(&port->mutex); - cp = &info->channel; - /* - * before we drop dtr, make sure the uart transmitter - * has completely drained; this is especially - * important if there is a transmit fifo! - */ - timeout = (sgettxcnt(cp) + 1) * hz / info->cps; - if (timeout == 0) - timeout = 1; - rp_wait_until_sent(tty, timeout); - clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]); - - sdistransmit(cp); - sdisinterrupts(cp, (txint_en | mcint_en | rxint_en | srcint_en | chanint_en)); - sdisctsflowctl(cp); - sdistxsoftflowctl(cp); - sclrtxxoff(cp); - sflushrxfifo(cp); - sflushtxfifo(cp); - sclrrts(cp); - if (c_hupcl(tty)) - sclrdtr(cp); - - rp_flush_buffer(tty); - - tty_ldisc_flush(tty); - - clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]); - - /* we can't yet use tty_port_close_end as the buffer handling in this - driver is a bit different to the usual */ - - if (port->blocked_open) { - if (port->close_delay) { - msleep_interruptible(jiffies_to_msecs(port->close_delay)); - } - wake_up_interruptible(&port->open_wait); - } else { - if (info->xmit_buf) { - free_page((unsigned long) info->xmit_buf); - info->xmit_buf = null; - } - } - spin_lock_irq(&port->lock); - tty->closing = 0; - spin_unlock_irq(&port->lock); - tty_port_set_initialized(port, 0); - tty_port_set_active(port, 0); - mutex_unlock(&port->mutex); - tty_port_tty_set(port, null); - - atomic_dec(&rp_num_ports_open); - -#ifdef rocket_debug_open - printk(kern_info "rocket mod-- = %d... ", - atomic_read(&rp_num_ports_open)); - printk(kern_info "rp_close ttyr%d complete shutdown ", info->line); -#endif - -} - -static void rp_set_termios(struct tty_struct *tty, - struct ktermios *old_termios) -{ - struct r_port *info = tty->driver_data; - channel_t *cp; - unsigned cflag; - - if (rocket_paranoia_check(info, "rp_set_termios")) - return; - - cflag = tty->termios.c_cflag; - - /* - * this driver doesn't support cs5 or cs6 - */ - if (((cflag & csize) == cs5) || ((cflag & csize) == cs6)) - tty->termios.c_cflag = - ((cflag & ~csize) | (old_termios->c_cflag & csize)); - /* or cmspar */ - tty->termios.c_cflag &= ~cmspar; - - configure_r_port(tty, info, old_termios); - - cp = &info->channel; - - /* handle transition to b0 status */ - if ((old_termios->c_cflag & cbaud) && !c_baud(tty)) { - sclrdtr(cp); - sclrrts(cp); - } - - /* handle transition away from b0 status */ - if (!(old_termios->c_cflag & cbaud) && c_baud(tty)) { - ssetrts(cp); - ssetdtr(cp); - } - - if ((old_termios->c_cflag & crtscts) && !c_crtscts(tty)) - rp_start(tty); -} - -static int rp_break(struct tty_struct *tty, int break_state) -{ - struct r_port *info = tty->driver_data; - unsigned long flags; - - if (rocket_paranoia_check(info, "rp_break")) - return -einval; - - spin_lock_irqsave(&info->slock, flags); - if (break_state == -1) - ssendbreak(&info->channel); - else - sclrbreak(&info->channel); - spin_unlock_irqrestore(&info->slock, flags); - return 0; -} - -/* - * sgetchanri used to be a macro in rocket_int.h. when the functionality for - * the upci boards was added, it was decided to make this a function because - * the macro was getting too complicated. all cases except the first one - * (upciringind) are taken directly from the original macro. - */ -static int sgetchanri(channel_t * chp) -{ - controller_t *ctlp = chp->ctlp; - int channum = chp->channum; - int ringind = 0; - - if (ctlp->upciringind) - ringind = !(sinb(ctlp->upciringind) & sbitmapsettbl[channum]); - else if (ctlp->altchanringindicator) - ringind = sinb((byteio_t) (chp->chanstat + 8)) & dsr_act; - else if (ctlp->boardtype == rocket_type_pc104) - ringind = !(sinb(ctlp->aiopio[3]) & sbitmapsettbl[channum]); - - return ringind; -} - -/********************************************************************************************/ -/* here are the routines used by rp_ioctl. these are all called from exception handlers. */ - -/* - * returns the state of the serial modem control lines. these next 2 functions - * are the way kernel versions > 2.5 handle modem control lines rather than ioctls. - */ -static int rp_tiocmget(struct tty_struct *tty) -{ - struct r_port *info = tty->driver_data; - unsigned int control, result, chanstatus; - - chanstatus = sgetchanstatuslo(&info->channel); - control = info->channel.txcontrol[3]; - result = ((control & set_rts) ? tiocm_rts : 0) | - ((control & set_dtr) ? tiocm_dtr : 0) | - ((chanstatus & cd_act) ? tiocm_car : 0) | - (sgetchanri(&info->channel) ? tiocm_rng : 0) | - ((chanstatus & dsr_act) ? tiocm_dsr : 0) | - ((chanstatus & cts_act) ? tiocm_cts : 0); - - return result; -} - -/* - * sets the modem control lines - */ -static int rp_tiocmset(struct tty_struct *tty, - unsigned int set, unsigned int clear) -{ - struct r_port *info = tty->driver_data; - - if (set & tiocm_rts) - info->channel.txcontrol[3] |= set_rts; - if (set & tiocm_dtr) - info->channel.txcontrol[3] |= set_dtr; - if (clear & tiocm_rts) - info->channel.txcontrol[3] &= ~set_rts; - if (clear & tiocm_dtr) - info->channel.txcontrol[3] &= ~set_dtr; - - out32(info->channel.indexaddr, info->channel.txcontrol); - return 0; -} - -static int get_config(struct r_port *info, struct rocket_config __user *retinfo) -{ - struct rocket_config tmp; - - memset(&tmp, 0, sizeof (tmp)); - mutex_lock(&info->port.mutex); - tmp.line = info->line; - tmp.flags = info->flags; - tmp.close_delay = info->port.close_delay; - tmp.closing_wait = info->port.closing_wait; - tmp.port = rcktpt_io_addr[(info->line >> 5) & 3]; - mutex_unlock(&info->port.mutex); - - if (copy_to_user(retinfo, &tmp, sizeof (*retinfo))) - return -efault; - return 0; -} - -static int set_config(struct tty_struct *tty, struct r_port *info, - struct rocket_config __user *new_info) -{ - struct rocket_config new_serial; - - if (copy_from_user(&new_serial, new_info, sizeof (new_serial))) - return -efault; - - mutex_lock(&info->port.mutex); - if (!capable(cap_sys_admin)) - { - if ((new_serial.flags & ~rocket_usr_mask) != (info->flags & ~rocket_usr_mask)) { - mutex_unlock(&info->port.mutex); - return -eperm; - } - info->flags = ((info->flags & ~rocket_usr_mask) | (new_serial.flags & rocket_usr_mask)); - mutex_unlock(&info->port.mutex); - return 0; - } - - if ((new_serial.flags ^ info->flags) & rocket_spd_mask) { - /* warn about deprecation, unless clearing */ - if (new_serial.flags & rocket_spd_mask) - dev_warn_ratelimited(tty->dev, "use of spd flags is deprecated "); - } - - info->flags = ((info->flags & ~rocket_flags) | (new_serial.flags & rocket_flags)); - info->port.close_delay = new_serial.close_delay; - info->port.closing_wait = new_serial.closing_wait; - - mutex_unlock(&info->port.mutex); - - configure_r_port(tty, info, null); - return 0; -} - -/* - * this function fills in a rocket_ports struct with information - * about what boards/ports are in the system. this info is passed - * to user space. see setrocket.c where the info is used to create - * the /dev/ttyrx ports. - */ -static int get_ports(struct r_port *info, struct rocket_ports __user *retports) -{ - struct rocket_ports *tmp; - int board, ret = 0; - - tmp = kzalloc(sizeof(*tmp), gfp_kernel); - if (!tmp) - return -enomem; - - tmp->tty_major = rocket_driver->major; - - for (board = 0; board < 4; board++) { - tmp->rocketmodel[board].model = rocketmodel[board].model; - strcpy(tmp->rocketmodel[board].modelstring, - rocketmodel[board].modelstring); - tmp->rocketmodel[board].numports = rocketmodel[board].numports; - tmp->rocketmodel[board].loadrm2 = rocketmodel[board].loadrm2; - tmp->rocketmodel[board].startingportnumber = - rocketmodel[board].startingportnumber; - } - if (copy_to_user(retports, tmp, sizeof(*retports))) - ret = -efault; - kfree(tmp); - return ret; -} - -static int reset_rm2(struct r_port *info, void __user *arg) -{ - int reset; - - if (!capable(cap_sys_admin)) - return -eperm; - - if (copy_from_user(&reset, arg, sizeof (int))) - return -efault; - if (reset) - reset = 1; - - if (rcktpt_type[info->board] != rocket_type_modemii && - rcktpt_type[info->board] != rocket_type_modemiii) - return -einval; - - if (info->ctlp->bustype == isisa) - smodemreset(info->ctlp, info->chan, reset); - else - spcimodemreset(info->ctlp, info->chan, reset); - - return 0; -} - -static int get_version(struct r_port *info, struct rocket_version __user *retvers) -{ - if (copy_to_user(retvers, &driver_version, sizeof (*retvers))) - return -efault; - return 0; -} - -/* ioctl call handler into the driver */ -static int rp_ioctl(struct tty_struct *tty, - unsigned int cmd, unsigned long arg) -{ - struct r_port *info = tty->driver_data; - void __user *argp = (void __user *)arg; - int ret = 0; - - if (cmd != rckp_get_ports && rocket_paranoia_check(info, "rp_ioctl")) - return -enxio; - - switch (cmd) { - case rckp_get_config: - dev_warn_ratelimited(tty->dev, - "rckp_get_config option is deprecated "); - ret = get_config(info, argp); - break; - case rckp_set_config: - dev_warn_ratelimited(tty->dev, - "rckp_set_config option is deprecated "); - ret = set_config(tty, info, argp); - break; - case rckp_get_ports: - dev_warn_ratelimited(tty->dev, - "rckp_get_ports option is deprecated "); - ret = get_ports(info, argp); - break; - case rckp_reset_rm2: - dev_warn_ratelimited(tty->dev, - "rckp_reset_rm2 option is deprecated "); - ret = reset_rm2(info, argp); - break; - case rckp_get_version: - dev_warn_ratelimited(tty->dev, - "rckp_get_version option is deprecated "); - ret = get_version(info, argp); - break; - default: - ret = -enoioctlcmd; - } - return ret; -} - -static void rp_send_xchar(struct tty_struct *tty, char ch) -{ - struct r_port *info = tty->driver_data; - channel_t *cp; - - if (rocket_paranoia_check(info, "rp_send_xchar")) - return; - - cp = &info->channel; - if (sgettxcnt(cp)) - swritetxpriobyte(cp, ch); - else - swritetxbyte(sgettxrxdataio(cp), ch); -} - -static void rp_throttle(struct tty_struct *tty) -{ - struct r_port *info = tty->driver_data; - -#ifdef rocket_debug_throttle - printk(kern_info "throttle %s .... ", tty->name); -#endif - - if (rocket_paranoia_check(info, "rp_throttle")) - return; - - if (i_ixoff(tty)) - rp_send_xchar(tty, stop_char(tty)); - - sclrrts(&info->channel); -} - -static void rp_unthrottle(struct tty_struct *tty) -{ - struct r_port *info = tty->driver_data; -#ifdef rocket_debug_throttle - printk(kern_info "unthrottle %s .... ", tty->name); -#endif - - if (rocket_paranoia_check(info, "rp_unthrottle")) - return; - - if (i_ixoff(tty)) - rp_send_xchar(tty, start_char(tty)); - - ssetrts(&info->channel); -} - -/* - * ------------------------------------------------------------ - * rp_stop() and rp_start() - * - * this routines are called before setting or resetting tty->stopped. - * they enable or disable transmitter interrupts, as necessary. - * ------------------------------------------------------------ - */ -static void rp_stop(struct tty_struct *tty) -{ - struct r_port *info = tty->driver_data; - -#ifdef rocket_debug_flow - printk(kern_info "stop %s: %d %d.... ", tty->name, - info->xmit_cnt, info->xmit_fifo_room); -#endif - - if (rocket_paranoia_check(info, "rp_stop")) - return; - - if (sgettxcnt(&info->channel)) - sdistransmit(&info->channel); -} - -static void rp_start(struct tty_struct *tty) -{ - struct r_port *info = tty->driver_data; - -#ifdef rocket_debug_flow - printk(kern_info "start %s: %d %d.... ", tty->name, - info->xmit_cnt, info->xmit_fifo_room); -#endif - - if (rocket_paranoia_check(info, "rp_stop")) - return; - - sentransmit(&info->channel); - set_bit((info->aiop * 8) + info->chan, - (void *) &xmit_flags[info->board]); -} - -/* - * rp_wait_until_sent() --- wait until the transmitter is empty - */ -static void rp_wait_until_sent(struct tty_struct *tty, int timeout) -{ - struct r_port *info = tty->driver_data; - channel_t *cp; - unsigned long orig_jiffies; - int check_time, exit_time; - int txcnt; - - if (rocket_paranoia_check(info, "rp_wait_until_sent")) - return; - - cp = &info->channel; - - orig_jiffies = jiffies; -#ifdef rocket_debug_wait_until_sent - printk(kern_info "in %s(%d) (jiff=%lu)... ", __func__, timeout, - jiffies); - printk(kern_info "cps=%d... ", info->cps); -#endif - while (1) { - txcnt = sgettxcnt(cp); - if (!txcnt) { - if (sgetchanstatuslo(cp) & txshrmt) - break; - check_time = (hz / info->cps) / 5; - } else { - check_time = hz * txcnt / info->cps; - } - if (timeout) { - exit_time = orig_jiffies + timeout - jiffies; - if (exit_time <= 0) - break; - if (exit_time < check_time) - check_time = exit_time; - } - if (check_time == 0) - check_time = 1; -#ifdef rocket_debug_wait_until_sent - printk(kern_info "txcnt = %d (jiff=%lu,check=%d)... ", txcnt, - jiffies, check_time); -#endif - msleep_interruptible(jiffies_to_msecs(check_time)); - if (signal_pending(current)) - break; - } - __set_current_state(task_running); -#ifdef rocket_debug_wait_until_sent - printk(kern_info "txcnt = %d (jiff=%lu)...done ", txcnt, jiffies); -#endif -} - -/* - * rp_hangup() --- called by tty_hangup() when a hangup is signaled. - */ -static void rp_hangup(struct tty_struct *tty) -{ - channel_t *cp; - struct r_port *info = tty->driver_data; - unsigned long flags; - - if (rocket_paranoia_check(info, "rp_hangup")) - return; - -#if (defined(rocket_debug_open) || defined(rocket_debug_hangup)) - printk(kern_info "rp_hangup of ttyr%d... ", info->line); -#endif - rp_flush_buffer(tty); - spin_lock_irqsave(&info->port.lock, flags); - if (info->port.count) - atomic_dec(&rp_num_ports_open); - clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]); - spin_unlock_irqrestore(&info->port.lock, flags); - - tty_port_hangup(&info->port); - - cp = &info->channel; - sdisrxfifo(cp); - sdistransmit(cp); - sdisinterrupts(cp, (txint_en | mcint_en | rxint_en | srcint_en | chanint_en)); - sdisctsflowctl(cp); - sdistxsoftflowctl(cp); - sclrtxxoff(cp); - tty_port_set_initialized(&info->port, 0); - - wake_up_interruptible(&info->port.open_wait); -} - -/* - * exception handler - write char routine. the rocketport driver uses a - * double-buffering strategy, with the twist that if the in-memory cpu - * buffer is empty, and there's space in the transmit fifo, the - * writing routines will write directly to transmit fifo. - * write buffer and counters protected by spinlocks - */ -static int rp_put_char(struct tty_struct *tty, unsigned char ch) -{ - struct r_port *info = tty->driver_data; - channel_t *cp; - unsigned long flags; - - if (rocket_paranoia_check(info, "rp_put_char")) - return 0; - - /* - * grab the port write mutex, locking out other processes that try to - * write to this port - */ - mutex_lock(&info->write_mtx); - -#ifdef rocket_debug_write - printk(kern_info "rp_put_char %c... ", ch); -#endif - - spin_lock_irqsave(&info->slock, flags); - cp = &info->channel; - - if (!tty->stopped && info->xmit_fifo_room == 0) - info->xmit_fifo_room = txfifo_size - sgettxcnt(cp); - - if (tty->stopped || info->xmit_fifo_room == 0 || info->xmit_cnt != 0) { - info->xmit_buf[info->xmit_head++] = ch; - info->xmit_head &= xmit_buf_size - 1; - info->xmit_cnt++; - set_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]); - } else { - soutb(sgettxrxdataio(cp), ch); - info->xmit_fifo_room--; - } - spin_unlock_irqrestore(&info->slock, flags); - mutex_unlock(&info->write_mtx); - return 1; -} - -/* - * exception handler - write routine, called when user app writes to the device. - * a per port write mutex is used to protect from another process writing to - * this port at the same time. this other process could be running on the other cpu - * or get control of the cpu if the copy_from_user() blocks due to a page fault (swapped out). - * spinlocks protect the info xmit members. - */ -static int rp_write(struct tty_struct *tty, - const unsigned char *buf, int count) -{ - struct r_port *info = tty->driver_data; - channel_t *cp; - const unsigned char *b; - int c, retval = 0; - unsigned long flags; - - if (count <= 0 || rocket_paranoia_check(info, "rp_write")) - return 0; - - if (mutex_lock_interruptible(&info->write_mtx)) - return -erestartsys; - -#ifdef rocket_debug_write - printk(kern_info "rp_write %d chars... ", count); -#endif - cp = &info->channel; - - if (!tty->stopped && info->xmit_fifo_room < count) - info->xmit_fifo_room = txfifo_size - sgettxcnt(cp); - - /* - * if the write queue for the port is empty, and there is fifo space, stuff bytes - * into fifo. use the write queue for temp storage. - */ - if (!tty->stopped && info->xmit_cnt == 0 && info->xmit_fifo_room > 0) { - c = min(count, info->xmit_fifo_room); - b = buf; - - /* push data into fifo, 2 bytes at a time */ - soutstrw(sgettxrxdataio(cp), (unsigned short *) b, c / 2); - - /* if there is a byte remaining, write it */ - if (c & 1) - soutb(sgettxrxdataio(cp), b[c - 1]); - - retval += c; - buf += c; - count -= c; - - spin_lock_irqsave(&info->slock, flags); - info->xmit_fifo_room -= c; - spin_unlock_irqrestore(&info->slock, flags); - } - - /* if count is zero, we wrote it all and are done */ - if (!count) - goto end; - - /* write remaining data into the port's xmit_buf */ - while (1) { - /* hung up ? */ - if (!tty_port_active(&info->port)) - goto end; - c = min(count, xmit_buf_size - info->xmit_cnt - 1); - c = min(c, xmit_buf_size - info->xmit_head); - if (c <= 0) - break; - - b = buf; - memcpy(info->xmit_buf + info->xmit_head, b, c); - - spin_lock_irqsave(&info->slock, flags); - info->xmit_head = - (info->xmit_head + c) & (xmit_buf_size - 1); - info->xmit_cnt += c; - spin_unlock_irqrestore(&info->slock, flags); - - buf += c; - count -= c; - retval += c; - } - - if ((retval > 0) && !tty->stopped) - set_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]); - -end: - if (info->xmit_cnt < wakeup_chars) { - tty_wakeup(tty); -#ifdef rocketport_have_poll_wait - wake_up_interruptible(&tty->poll_wait); -#endif - } - mutex_unlock(&info->write_mtx); - return retval; -} - -/* - * return the number of characters that can be sent. we estimate - * only using the in-memory transmit buffer only, and ignore the - * potential space in the transmit fifo. - */ -static int rp_write_room(struct tty_struct *tty) -{ - struct r_port *info = tty->driver_data; - int ret; - - if (rocket_paranoia_check(info, "rp_write_room")) - return 0; - - ret = xmit_buf_size - info->xmit_cnt - 1; - if (ret < 0) - ret = 0; -#ifdef rocket_debug_write - printk(kern_info "rp_write_room returns %d... ", ret); -#endif - return ret; -} - -/* - * return the number of characters in the buffer. again, this only - * counts those characters in the in-memory transmit buffer. - */ -static int rp_chars_in_buffer(struct tty_struct *tty) -{ - struct r_port *info = tty->driver_data; - - if (rocket_paranoia_check(info, "rp_chars_in_buffer")) - return 0; - -#ifdef rocket_debug_write - printk(kern_info "rp_chars_in_buffer returns %d... ", info->xmit_cnt); -#endif - return info->xmit_cnt; -} - -/* - * flushes the tx fifo for a port, deletes data in the xmit_buf stored in the - * r_port struct for the port. note that spinlock are used to protect info members, - * do not call this function if the spinlock is already held. - */ -static void rp_flush_buffer(struct tty_struct *tty) -{ - struct r_port *info = tty->driver_data; - channel_t *cp; - unsigned long flags; - - if (rocket_paranoia_check(info, "rp_flush_buffer")) - return; - - spin_lock_irqsave(&info->slock, flags); - info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; - spin_unlock_irqrestore(&info->slock, flags); - -#ifdef rocketport_have_poll_wait - wake_up_interruptible(&tty->poll_wait); -#endif - tty_wakeup(tty); - - cp = &info->channel; - sflushtxfifo(cp); -} - -#ifdef config_pci - -static const struct pci_device_id rocket_pci_ids[] = { - { pci_device(pci_vendor_id_rp, pci_device_id_rp4quad) }, - { pci_device(pci_vendor_id_rp, pci_device_id_rp8octa) }, - { pci_device(pci_vendor_id_rp, pci_device_id_urp8octa) }, - { pci_device(pci_vendor_id_rp, pci_device_id_rp8intf) }, - { pci_device(pci_vendor_id_rp, pci_device_id_urp8intf) }, - { pci_device(pci_vendor_id_rp, pci_device_id_rp8j) }, - { pci_device(pci_vendor_id_rp, pci_device_id_rp4j) }, - { pci_device(pci_vendor_id_rp, pci_device_id_rp8sni) }, - { pci_device(pci_vendor_id_rp, pci_device_id_rp16sni) }, - { pci_device(pci_vendor_id_rp, pci_device_id_rp16intf) }, - { pci_device(pci_vendor_id_rp, pci_device_id_urp16intf) }, - { pci_device(pci_vendor_id_rp, pci_device_id_crp16intf) }, - { pci_device(pci_vendor_id_rp, pci_device_id_rp32intf) }, - { pci_device(pci_vendor_id_rp, pci_device_id_urp32intf) }, - { pci_device(pci_vendor_id_rp, pci_device_id_rpp4) }, - { pci_device(pci_vendor_id_rp, pci_device_id_rpp8) }, - { pci_device(pci_vendor_id_rp, pci_device_id_rp2_232) }, - { pci_device(pci_vendor_id_rp, pci_device_id_rp2_422) }, - { pci_device(pci_vendor_id_rp, pci_device_id_rp6m) }, - { pci_device(pci_vendor_id_rp, pci_device_id_rp4m) }, - { pci_device(pci_vendor_id_rp, pci_device_id_upci_rm3_8port) }, - { pci_device(pci_vendor_id_rp, pci_device_id_upci_rm3_4port) }, - { } -}; -module_device_table(pci, rocket_pci_ids); - -/* resets the speaker controller on rocketmodem ii and iii devices */ -static void rmspeakerreset(controller_t * ctlp, unsigned long model) -{ - byteio_t addr; - - /* rocketmodem ii speaker control is at the 8th port location of offset 0x40 */ - if ((model == model_rp4m) || (model == model_rp6m)) { - addr = ctlp->aiopio[0] + 0x4f; - soutb(addr, 0); - } - - /* rocketmodem iii speaker control is at the 1st port location of offset 0x80 */ - if ((model == model_upci_rm3_8port) - || (model == model_upci_rm3_4port)) { - addr = ctlp->aiopio[0] + 0x88; - soutb(addr, 0); - } -} - -/*************************************************************************** -function: spciinitcontroller -purpose: initialization of controller global registers and controller - structure. -call: spciinitcontroller(ctlp,ctlnum,aiopiolist,aiopiolistsize, - irqnum,frequency,periodiconly) - controller_t *ctlp; ptr to controller structure - int ctlnum; controller number - byteio_t *aiopiolist; list of i/o addresses for each aiop. - this list must be in the order the aiops will be found on the - controller. once an aiop in the list is not found, it is - assumed that there are no more aiops on the controller. - int aiopiolistsize; number of addresses in aiopiolist - int irqnum; interrupt request number. can be any of the following: - 0: disable global interrupts - 3: irq 3 - 4: irq 4 - 5: irq 5 - 9: irq 9 - 10: irq 10 - 11: irq 11 - 12: irq 12 - 15: irq 15 - byte_t frequency: a flag identifying the frequency - of the periodic interrupt, can be any one of the following: - freq_dis - periodic interrupt disabled - freq_137hz - 137 hertz - freq_69hz - 69 hertz - freq_34hz - 34 hertz - freq_17hz - 17 hertz - freq_9hz - 9 hertz - freq_4hz - 4 hertz - if irqnum is set to 0 the frequency parameter is - overidden, it is forced to a value of freq_dis. - int periodiconly: 1 if all interrupts except the periodic - interrupt are to be blocked. - 0 is both the periodic interrupt and - other channel interrupts are allowed. - if irqnum is set to 0 the periodiconly parameter is - overidden, it is forced to a value of 0. -return: int: number of aiops on the controller, or ctlid_null if controller - initialization failed. - -comments: - if periodic interrupts are to be disabled but aiop interrupts - are allowed, set frequency to freq_dis and periodiconly to 0. - - if interrupts are to be completely disabled set irqnum to 0. - - setting frequency to freq_dis and periodiconly to 1 is an - invalid combination. - - this function performs initialization of global interrupt modes, - but it does not actually enable global interrupts. to enable - and disable global interrupts use functions senglobalint() and - sdisglobalint(). enabling of global interrupts is normally not - done until all other initializations are complete. - - even if interrupts are globally enabled, they must also be - individually enabled for each channel that is to generate - interrupts. - -warnings: no range checking on any of the parameters is done. - - no context switches are allowed while executing this function. - - after this function all aiops on the controller are disabled, - they can be enabled with senaiop(). -*/ -static int spciinitcontroller(controller_t * ctlp, int ctlnum, - byteio_t * aiopiolist, int aiopiolistsize, - wordio_t configio, int irqnum, byte_t frequency, - int periodiconly, int altchanringindicator, - int upciringind) -{ - int i; - byteio_t io; - - ctlp->altchanringindicator = altchanringindicator; - ctlp->upciringind = upciringind; - ctlp->ctlnum = ctlnum; - ctlp->ctlid = ctlid_0001; /* controller release 1 */ - ctlp->bustype = ispci; /* controller release 1 */ - - if (configio) { - ctlp->isupci = 1; - ctlp->pciio = configio + _pci_9030_int_ctrl; - ctlp->pciio2 = configio + _pci_9030_gpio_ctrl; - ctlp->aiopintrbits = upci_aiop_intr_bits; - } else { - ctlp->isupci = 0; - ctlp->pciio = - (wordio_t) ((byteio_t) aiopiolist[0] + _pci_int_func); - ctlp->aiopintrbits = aiop_intr_bits; - } - - spcicontrollereoi(ctlp); /* clear eoi if warm init */ - /* init aiops */ - ctlp->numaiop = 0; - for (i = 0; i < aiopiolistsize; i++) { - io = aiopiolist[i]; - ctlp->aiopio[i] = (wordio_t) io; - ctlp->aiopintchanio[i] = io + _int_chan; - - ctlp->aiopid[i] = sreadaiopid(io); /* read aiop id */ - if (ctlp->aiopid[i] == aiopid_null) /* if aiop does not exist */ - break; /* done looking for aiops */ - - ctlp->aiopnumchan[i] = sreadaiopnumchan((wordio_t) io); /* num channels in aiop */ - soutw((wordio_t) io + _indx_addr, _clk_pre); /* clock prescaler */ - soutb(io + _indx_data, sclockprescale); - ctlp->numaiop++; /* bump count of aiops */ - } - - if (ctlp->numaiop == 0) - return (-1); - else - return (ctlp->numaiop); -} - -/* - * called when a pci card is found. retrieves and stores model information, - * init's aiopic and serial port hardware. - * inputs: i is the board number (0-n) - */ -static __init int register_pci(int i, struct pci_dev *dev) -{ - int num_aiops, aiop, max_num_aiops, chan; - unsigned int aiopio[max_aiops_per_board]; - controller_t *ctlp; - - int fast_clock = 0; - int altchanringindicator = 0; - int ports_per_aiop = 8; - wordio_t configio = 0; - byteio_t upciringind = 0; - - if (!dev || !pci_match_id(rocket_pci_ids, dev) || - pci_enable_device(dev) || i >= num_boards) - return 0; - - rcktpt_io_addr[i] = pci_resource_start(dev, 0); - - rcktpt_type[i] = rocket_type_normal; - rocketmodel[i].loadrm2 = 0; - rocketmodel[i].startingportnumber = nextlinenumber; - - /* depending on the model, set up some config variables */ - switch (dev->device) { - case pci_device_id_rp4quad: - max_num_aiops = 1; - ports_per_aiop = 4; - rocketmodel[i].model = model_rp4quad; - strcpy(rocketmodel[i].modelstring, "rocketport 4 port w/quad cable"); - rocketmodel[i].numports = 4; - break; - case pci_device_id_rp8octa: - max_num_aiops = 1; - rocketmodel[i].model = model_rp8octa; - strcpy(rocketmodel[i].modelstring, "rocketport 8 port w/octa cable"); - rocketmodel[i].numports = 8; - break; - case pci_device_id_urp8octa: - max_num_aiops = 1; - rocketmodel[i].model = model_upci_rp8octa; - strcpy(rocketmodel[i].modelstring, "rocketport upci 8 port w/octa cable"); - rocketmodel[i].numports = 8; - break; - case pci_device_id_rp8intf: - max_num_aiops = 1; - rocketmodel[i].model = model_rp8intf; - strcpy(rocketmodel[i].modelstring, "rocketport 8 port w/external i/f"); - rocketmodel[i].numports = 8; - break; - case pci_device_id_urp8intf: - max_num_aiops = 1; - rocketmodel[i].model = model_upci_rp8intf; - strcpy(rocketmodel[i].modelstring, "rocketport upci 8 port w/external i/f"); - rocketmodel[i].numports = 8; - break; - case pci_device_id_rp8j: - max_num_aiops = 1; - rocketmodel[i].model = model_rp8j; - strcpy(rocketmodel[i].modelstring, "rocketport 8 port w/rj11 connectors"); - rocketmodel[i].numports = 8; - break; - case pci_device_id_rp4j: - max_num_aiops = 1; - ports_per_aiop = 4; - rocketmodel[i].model = model_rp4j; - strcpy(rocketmodel[i].modelstring, "rocketport 4 port w/rj45 connectors"); - rocketmodel[i].numports = 4; - break; - case pci_device_id_rp8sni: - max_num_aiops = 1; - rocketmodel[i].model = model_rp8sni; - strcpy(rocketmodel[i].modelstring, "rocketport 8 port w/ custom db78"); - rocketmodel[i].numports = 8; - break; - case pci_device_id_rp16sni: - max_num_aiops = 2; - rocketmodel[i].model = model_rp16sni; - strcpy(rocketmodel[i].modelstring, "rocketport 16 port w/ custom db78"); - rocketmodel[i].numports = 16; - break; - case pci_device_id_rp16intf: - max_num_aiops = 2; - rocketmodel[i].model = model_rp16intf; - strcpy(rocketmodel[i].modelstring, "rocketport 16 port w/external i/f"); - rocketmodel[i].numports = 16; - break; - case pci_device_id_urp16intf: - max_num_aiops = 2; - rocketmodel[i].model = model_upci_rp16intf; - strcpy(rocketmodel[i].modelstring, "rocketport upci 16 port w/external i/f"); - rocketmodel[i].numports = 16; - break; - case pci_device_id_crp16intf: - max_num_aiops = 2; - rocketmodel[i].model = model_cpci_rp16intf; - strcpy(rocketmodel[i].modelstring, "rocketport compact pci 16 port w/external i/f"); - rocketmodel[i].numports = 16; - break; - case pci_device_id_rp32intf: - max_num_aiops = 4; - rocketmodel[i].model = model_rp32intf; - strcpy(rocketmodel[i].modelstring, "rocketport 32 port w/external i/f"); - rocketmodel[i].numports = 32; - break; - case pci_device_id_urp32intf: - max_num_aiops = 4; - rocketmodel[i].model = model_upci_rp32intf; - strcpy(rocketmodel[i].modelstring, "rocketport upci 32 port w/external i/f"); - rocketmodel[i].numports = 32; - break; - case pci_device_id_rpp4: - max_num_aiops = 1; - ports_per_aiop = 4; - altchanringindicator++; - fast_clock++; - rocketmodel[i].model = model_rpp4; - strcpy(rocketmodel[i].modelstring, "rocketport plus 4 port"); - rocketmodel[i].numports = 4; - break; - case pci_device_id_rpp8: - max_num_aiops = 2; - ports_per_aiop = 4; - altchanringindicator++; - fast_clock++; - rocketmodel[i].model = model_rpp8; - strcpy(rocketmodel[i].modelstring, "rocketport plus 8 port"); - rocketmodel[i].numports = 8; - break; - case pci_device_id_rp2_232: - max_num_aiops = 1; - ports_per_aiop = 2; - altchanringindicator++; - fast_clock++; - rocketmodel[i].model = model_rp2_232; - strcpy(rocketmodel[i].modelstring, "rocketport plus 2 port rs232"); - rocketmodel[i].numports = 2; - break; - case pci_device_id_rp2_422: - max_num_aiops = 1; - ports_per_aiop = 2; - altchanringindicator++; - fast_clock++; - rocketmodel[i].model = model_rp2_422; - strcpy(rocketmodel[i].modelstring, "rocketport plus 2 port rs422"); - rocketmodel[i].numports = 2; - break; - case pci_device_id_rp6m: - - max_num_aiops = 1; - ports_per_aiop = 6; - - /* if revision is 1, the rocketmodem flash must be loaded. - * if it is 2 it is a "socketed" version. */ - if (dev->revision == 1) { - rcktpt_type[i] = rocket_type_modemii; - rocketmodel[i].loadrm2 = 1; - } else { - rcktpt_type[i] = rocket_type_modem; - } - - rocketmodel[i].model = model_rp6m; - strcpy(rocketmodel[i].modelstring, "rocketmodem 6 port"); - rocketmodel[i].numports = 6; - break; - case pci_device_id_rp4m: - max_num_aiops = 1; - ports_per_aiop = 4; - if (dev->revision == 1) { - rcktpt_type[i] = rocket_type_modemii; - rocketmodel[i].loadrm2 = 1; - } else { - rcktpt_type[i] = rocket_type_modem; - } - - rocketmodel[i].model = model_rp4m; - strcpy(rocketmodel[i].modelstring, "rocketmodem 4 port"); - rocketmodel[i].numports = 4; - break; - default: - max_num_aiops = 0; - break; - } - - /* - * check for upci boards. - */ - - switch (dev->device) { - case pci_device_id_urp32intf: - case pci_device_id_urp8intf: - case pci_device_id_urp16intf: - case pci_device_id_crp16intf: - case pci_device_id_urp8octa: - rcktpt_io_addr[i] = pci_resource_start(dev, 2); - configio = pci_resource_start(dev, 1); - if (dev->device == pci_device_id_urp8octa) { - upciringind = rcktpt_io_addr[i] + _pci_9030_ring_ind; - - /* - * check for octa or quad cable. - */ - if (! - (sinw(configio + _pci_9030_gpio_ctrl) & - pci_gpio_ctrl_8port)) { - ports_per_aiop = 4; - rocketmodel[i].numports = 4; - } - } - break; - case pci_device_id_upci_rm3_8port: - max_num_aiops = 1; - rocketmodel[i].model = model_upci_rm3_8port; - strcpy(rocketmodel[i].modelstring, "rocketmodem iii 8 port"); - rocketmodel[i].numports = 8; - rcktpt_io_addr[i] = pci_resource_start(dev, 2); - upciringind = rcktpt_io_addr[i] + _pci_9030_ring_ind; - configio = pci_resource_start(dev, 1); - rcktpt_type[i] = rocket_type_modemiii; - break; - case pci_device_id_upci_rm3_4port: - max_num_aiops = 1; - rocketmodel[i].model = model_upci_rm3_4port; - strcpy(rocketmodel[i].modelstring, "rocketmodem iii 4 port"); - rocketmodel[i].numports = 4; - rcktpt_io_addr[i] = pci_resource_start(dev, 2); - upciringind = rcktpt_io_addr[i] + _pci_9030_ring_ind; - configio = pci_resource_start(dev, 1); - rcktpt_type[i] = rocket_type_modemiii; - break; - default: - break; - } - - if (fast_clock) { - sclockprescale = 0x12; /* mod 2 (divide by 3) */ - rp_baud_base[i] = 921600; - } else { - /* - * if support_low_speed is set, use the slow clock - * prescale, which supports 50 bps - */ - if (support_low_speed) { - /* mod 9 (divide by 10) prescale */ - sclockprescale = 0x19; - rp_baud_base[i] = 230400; - } else { - /* mod 4 (divide by 5) prescale */ - sclockprescale = 0x14; - rp_baud_base[i] = 460800; - } - } - - for (aiop = 0; aiop < max_num_aiops; aiop++) - aiopio[aiop] = rcktpt_io_addr[i] + (aiop * 0x40); - ctlp = sctlnumtoctlptr(i); - num_aiops = spciinitcontroller(ctlp, i, aiopio, max_num_aiops, configio, 0, freq_dis, 0, altchanringindicator, upciringind); - for (aiop = 0; aiop < max_num_aiops; aiop++) - ctlp->aiopnumchan[aiop] = ports_per_aiop; - - dev_info(&dev->dev, "comtrol pci controller #%d found at " - "address %04lx, %d aiop(s) (%s), creating ttyr%d - %ld ", - i, rcktpt_io_addr[i], num_aiops, rocketmodel[i].modelstring, - rocketmodel[i].startingportnumber, - rocketmodel[i].startingportnumber + rocketmodel[i].numports-1); - - if (num_aiops <= 0) { - rcktpt_io_addr[i] = 0; - return (0); - } - is_pci[i] = 1; - - /* reset the aiopic, init the serial ports */ - for (aiop = 0; aiop < num_aiops; aiop++) { - sresetaiopbynum(ctlp, aiop); - for (chan = 0; chan < ports_per_aiop; chan++) - init_r_port(i, aiop, chan, dev); - } - - /* rocket modems must be reset */ - if ((rcktpt_type[i] == rocket_type_modem) || - (rcktpt_type[i] == rocket_type_modemii) || - (rcktpt_type[i] == rocket_type_modemiii)) { - for (chan = 0; chan < ports_per_aiop; chan++) - spcimodemreset(ctlp, chan, 1); - msleep(500); - for (chan = 0; chan < ports_per_aiop; chan++) - spcimodemreset(ctlp, chan, 0); - msleep(500); - rmspeakerreset(ctlp, rocketmodel[i].model); - } - return (1); -} - -/* - * probes for pci cards, inits them if found - * input: board_found = number of isa boards already found, or the - * starting board number - * returns: number of pci boards found - */ -static int __init init_pci(int boards_found) -{ - struct pci_dev *dev = null; - int count = 0; - - /* work through the pci device list, pulling out ours */ - while ((dev = pci_get_device(pci_vendor_id_rp, pci_any_id, dev))) { - if (register_pci(count + boards_found, dev)) - count++; - } - return (count); -} - -#endif /* config_pci */ - -/* - * probes for isa cards - * input: i = the board number to look for - * returns: 1 if board found, 0 else - */ -static int __init init_isa(int i) -{ - int num_aiops, num_chan = 0, total_num_chan = 0; - int aiop, chan; - unsigned int aiopio[max_aiops_per_board]; - controller_t *ctlp; - char *type_string; - - /* if io_addr is zero, no board configured */ - if (rcktpt_io_addr[i] == 0) - return (0); - - /* reserve the io region */ - if (!request_region(rcktpt_io_addr[i], 64, "comtrol rocketport")) { - printk(kern_err "unable to reserve io region for configured " - "isa rocketport at address 0x%lx, board not " - "installed... ", rcktpt_io_addr[i]); - rcktpt_io_addr[i] = 0; - return (0); - } - - ctlp = sctlnumtoctlptr(i); - - ctlp->boardtype = rcktpt_type[i]; - - switch (rcktpt_type[i]) { - case rocket_type_pc104: - type_string = "(pc104)"; - break; - case rocket_type_modem: - type_string = "(rocketmodem)"; - break; - case rocket_type_modemii: - type_string = "(rocketmodem ii)"; - break; - default: - type_string = ""; - break; - } - - /* - * if support_low_speed is set, use the slow clock prescale, - * which supports 50 bps - */ - if (support_low_speed) { - sclockprescale = 0x19; /* mod 9 (divide by 10) prescale */ - rp_baud_base[i] = 230400; - } else { - sclockprescale = 0x14; /* mod 4 (divide by 5) prescale */ - rp_baud_base[i] = 460800; - } - - for (aiop = 0; aiop < max_aiops_per_board; aiop++) - aiopio[aiop] = rcktpt_io_addr[i] + (aiop * 0x400); - - num_aiops = sinitcontroller(ctlp, i, controller + (i * 0x400), aiopio, max_aiops_per_board, 0, freq_dis, 0); - - if (ctlp->boardtype == rocket_type_pc104) { - senaiop(ctlp, 2); /* only one aiopic, but these */ - senaiop(ctlp, 3); /* csels used for other stuff */ - } - - /* if something went wrong initing the aiop's release the isa io memory */ - if (num_aiops <= 0) { - release_region(rcktpt_io_addr[i], 64); - rcktpt_io_addr[i] = 0; - return (0); - } - - rocketmodel[i].startingportnumber = nextlinenumber; - - for (aiop = 0; aiop < num_aiops; aiop++) { - sresetaiopbynum(ctlp, aiop); - senaiop(ctlp, aiop); - num_chan = sgetaiopnumchan(ctlp, aiop); - total_num_chan += num_chan; - for (chan = 0; chan < num_chan; chan++) - init_r_port(i, aiop, chan, null); - } - is_pci[i] = 0; - if ((rcktpt_type[i] == rocket_type_modem) || (rcktpt_type[i] == rocket_type_modemii)) { - num_chan = sgetaiopnumchan(ctlp, 0); - total_num_chan = num_chan; - for (chan = 0; chan < num_chan; chan++) - smodemreset(ctlp, chan, 1); - msleep(500); - for (chan = 0; chan < num_chan; chan++) - smodemreset(ctlp, chan, 0); - msleep(500); - strcpy(rocketmodel[i].modelstring, "rocketmodem isa"); - } else { - strcpy(rocketmodel[i].modelstring, "rocketport isa"); - } - rocketmodel[i].numports = total_num_chan; - rocketmodel[i].model = model_isa; - - printk(kern_info "rocketport isa card #%d found at 0x%lx - %d aiops %s ", - i, rcktpt_io_addr[i], num_aiops, type_string); - - printk(kern_info "installing %s, creating /dev/ttyr%d - %ld ", - rocketmodel[i].modelstring, - rocketmodel[i].startingportnumber, - rocketmodel[i].startingportnumber + - rocketmodel[i].numports - 1); - - return (1); -} - -static const struct tty_operations rocket_ops = { - .open = rp_open, - .close = rp_close, - .write = rp_write, - .put_char = rp_put_char, - .write_room = rp_write_room, - .chars_in_buffer = rp_chars_in_buffer, - .flush_buffer = rp_flush_buffer, - .ioctl = rp_ioctl, - .throttle = rp_throttle, - .unthrottle = rp_unthrottle, - .set_termios = rp_set_termios, - .stop = rp_stop, - .start = rp_start, - .hangup = rp_hangup, - .break_ctl = rp_break, - .send_xchar = rp_send_xchar, - .wait_until_sent = rp_wait_until_sent, - .tiocmget = rp_tiocmget, - .tiocmset = rp_tiocmset, -}; - -static const struct tty_port_operations rocket_port_ops = { - .carrier_raised = carrier_raised, - .dtr_rts = dtr_rts, -}; - -/* - * the module "startup" routine; it's run when the module is loaded. - */ -static int __init rp_init(void) -{ - int ret = -enomem, pci_boards_found, isa_boards_found, i; - - printk(kern_info "rocketport device driver module, version %s, %s ", - rocket_version, rocket_date); - - rocket_driver = alloc_tty_driver(max_rp_ports); - if (!rocket_driver) - goto err; - - /* - * if board 1 is non-zero, there is at least one isa configured. if controller is - * zero, use the default controller io address of board1 + 0x40. - */ - if (board1) { - if (controller == 0) - controller = board1 + 0x40; - } else { - controller = 0; /* used as a flag, meaning no isa boards */ - } - - /* if an isa card is configured, reserve the 4 byte io space for the mudbac controller */ - if (controller && (!request_region(controller, 4, "comtrol rocketport"))) { - printk(kern_err "unable to reserve io region for first " - "configured isa rocketport controller 0x%lx. " - "driver exiting ", controller); - ret = -ebusy; - goto err_tty; - } - - /* store isa variable retrieved from command line or .conf file. */ - rcktpt_io_addr[0] = board1; - rcktpt_io_addr[1] = board2; - rcktpt_io_addr[2] = board3; - rcktpt_io_addr[3] = board4; - - rcktpt_type[0] = modem1 ? rocket_type_modem : rocket_type_normal; - rcktpt_type[0] = pc104_1[0] ? rocket_type_pc104 : rcktpt_type[0]; - rcktpt_type[1] = modem2 ? rocket_type_modem : rocket_type_normal; - rcktpt_type[1] = pc104_2[0] ? rocket_type_pc104 : rcktpt_type[1]; - rcktpt_type[2] = modem3 ? rocket_type_modem : rocket_type_normal; - rcktpt_type[2] = pc104_3[0] ? rocket_type_pc104 : rcktpt_type[2]; - rcktpt_type[3] = modem4 ? rocket_type_modem : rocket_type_normal; - rcktpt_type[3] = pc104_4[0] ? rocket_type_pc104 : rcktpt_type[3]; - - /* - * set up the tty driver structure and then register this - * driver with the tty layer. - */ - - rocket_driver->flags = tty_driver_dynamic_dev; - rocket_driver->name = "ttyr"; - rocket_driver->driver_name = "comtrol rocketport"; - rocket_driver->major = tty_rocket_major; - rocket_driver->minor_start = 0; - rocket_driver->type = tty_driver_type_serial; - rocket_driver->subtype = serial_type_normal; - rocket_driver->init_termios = tty_std_termios; - rocket_driver->init_termios.c_cflag = - b9600 | cs8 | cread | hupcl | clocal; - rocket_driver->init_termios.c_ispeed = 9600; - rocket_driver->init_termios.c_ospeed = 9600; -#ifdef rocket_soft_flow - rocket_driver->flags |= tty_driver_real_raw; -#endif - tty_set_operations(rocket_driver, &rocket_ops); - - ret = tty_register_driver(rocket_driver); - if (ret < 0) { - printk(kern_err "couldn't install tty rocketport driver "); - goto err_controller; - } - -#ifdef rocket_debug_open - printk(kern_info "rocketport driver is major %d ", rocket_driver.major); -#endif - - /* - * ok, let's probe each of the controllers looking for boards. any boards found - * will be initialized here. - */ - isa_boards_found = 0; - pci_boards_found = 0; - - for (i = 0; i < num_boards; i++) { - if (init_isa(i)) - isa_boards_found++; - } - -#ifdef config_pci - if (isa_boards_found < num_boards) - pci_boards_found = init_pci(isa_boards_found); -#endif - - max_board = pci_boards_found + isa_boards_found; - - if (max_board == 0) { - printk(kern_err "no rocketport ports found; unloading driver "); - ret = -enxio; - goto err_ttyu; - } - - return 0; -err_ttyu: - tty_unregister_driver(rocket_driver); -err_controller: - if (controller) - release_region(controller, 4); -err_tty: - put_tty_driver(rocket_driver); -err: - return ret; -} - - -static void rp_cleanup_module(void) -{ - int retval; - int i; - - del_timer_sync(&rocket_timer); - - retval = tty_unregister_driver(rocket_driver); - if (retval) - printk(kern_err "error %d while trying to unregister " - "rocketport driver ", -retval); - - for (i = 0; i < max_rp_ports; i++) - if (rp_table[i]) { - tty_unregister_device(rocket_driver, i); - tty_port_destroy(&rp_table[i]->port); - kfree(rp_table[i]); - } - - put_tty_driver(rocket_driver); - - for (i = 0; i < num_boards; i++) { - if (rcktpt_io_addr[i] <= 0 || is_pci[i]) - continue; - release_region(rcktpt_io_addr[i], 64); - } - if (controller) - release_region(controller, 4); -} - -/*************************************************************************** -function: sinitcontroller -purpose: initialization of controller global registers and controller - structure. -call: sinitcontroller(ctlp,ctlnum,mudbacio,aiopiolist,aiopiolistsize, - irqnum,frequency,periodiconly) - controller_t *ctlp; ptr to controller structure - int ctlnum; controller number - byteio_t mudbacio; mudbac base i/o address. - byteio_t *aiopiolist; list of i/o addresses for each aiop. - this list must be in the order the aiops will be found on the - controller. once an aiop in the list is not found, it is - assumed that there are no more aiops on the controller. - int aiopiolistsize; number of addresses in aiopiolist - int irqnum; interrupt request number. can be any of the following: - 0: disable global interrupts - 3: irq 3 - 4: irq 4 - 5: irq 5 - 9: irq 9 - 10: irq 10 - 11: irq 11 - 12: irq 12 - 15: irq 15 - byte_t frequency: a flag identifying the frequency - of the periodic interrupt, can be any one of the following: - freq_dis - periodic interrupt disabled - freq_137hz - 137 hertz - freq_69hz - 69 hertz - freq_34hz - 34 hertz - freq_17hz - 17 hertz - freq_9hz - 9 hertz - freq_4hz - 4 hertz - if irqnum is set to 0 the frequency parameter is - overidden, it is forced to a value of freq_dis. - int periodiconly: 1 if all interrupts except the periodic - interrupt are to be blocked. - 0 is both the periodic interrupt and - other channel interrupts are allowed. - if irqnum is set to 0 the periodiconly parameter is - overidden, it is forced to a value of 0. -return: int: number of aiops on the controller, or ctlid_null if controller - initialization failed. - -comments: - if periodic interrupts are to be disabled but aiop interrupts - are allowed, set frequency to freq_dis and periodiconly to 0. - - if interrupts are to be completely disabled set irqnum to 0. - - setting frequency to freq_dis and periodiconly to 1 is an - invalid combination. - - this function performs initialization of global interrupt modes, - but it does not actually enable global interrupts. to enable - and disable global interrupts use functions senglobalint() and - sdisglobalint(). enabling of global interrupts is normally not - done until all other initializations are complete. - - even if interrupts are globally enabled, they must also be - individually enabled for each channel that is to generate - interrupts. - -warnings: no range checking on any of the parameters is done. - - no context switches are allowed while executing this function. - - after this function all aiops on the controller are disabled, - they can be enabled with senaiop(). -*/ -static int sinitcontroller(controller_t * ctlp, int ctlnum, byteio_t mudbacio, - byteio_t * aiopiolist, int aiopiolistsize, - int irqnum, byte_t frequency, int periodiconly) -{ - int i; - byteio_t io; - int done; - - ctlp->aiopintrbits = aiop_intr_bits; - ctlp->altchanringindicator = 0; - ctlp->ctlnum = ctlnum; - ctlp->ctlid = ctlid_0001; /* controller release 1 */ - ctlp->bustype = isisa; - ctlp->mbaseio = mudbacio; - ctlp->mreg1io = mudbacio + 1; - ctlp->mreg2io = mudbacio + 2; - ctlp->mreg3io = mudbacio + 3; -#if 1 - ctlp->mreg2 = 0; /* interrupt disable */ - ctlp->mreg3 = 0; /* no periodic interrupts */ -#else - if (sirqmap[irqnum] == 0) { /* interrupts globally disabled */ - ctlp->mreg2 = 0; /* interrupt disable */ - ctlp->mreg3 = 0; /* no periodic interrupts */ - } else { - ctlp->mreg2 = sirqmap[irqnum]; /* set irq number */ - ctlp->mreg3 = frequency; /* set frequency */ - if (periodiconly) { /* periodic interrupt only */ - ctlp->mreg3 |= periodic_only; - } - } -#endif - soutb(ctlp->mreg2io, ctlp->mreg2); - soutb(ctlp->mreg3io, ctlp->mreg3); - scontrollereoi(ctlp); /* clear eoi if warm init */ - /* init aiops */ - ctlp->numaiop = 0; - for (i = done = 0; i < aiopiolistsize; i++) { - io = aiopiolist[i]; - ctlp->aiopio[i] = (wordio_t) io; - ctlp->aiopintchanio[i] = io + _int_chan; - soutb(ctlp->mreg2io, ctlp->mreg2 | (i & 0x03)); /* aiop index */ - soutb(mudbacio, (byte_t) (io >> 6)); /* set up aiop i/o in mudbac */ - if (done) - continue; - senaiop(ctlp, i); /* enable the aiop */ - ctlp->aiopid[i] = sreadaiopid(io); /* read aiop id */ - if (ctlp->aiopid[i] == aiopid_null) /* if aiop does not exist */ - done = 1; /* done looking for aiops */ - else { - ctlp->aiopnumchan[i] = sreadaiopnumchan((wordio_t) io); /* num channels in aiop */ - soutw((wordio_t) io + _indx_addr, _clk_pre); /* clock prescaler */ - soutb(io + _indx_data, sclockprescale); - ctlp->numaiop++; /* bump count of aiops */ - } - sdisaiop(ctlp, i); /* disable aiop */ - } - - if (ctlp->numaiop == 0) - return (-1); - else - return (ctlp->numaiop); -} - -/*************************************************************************** -function: sreadaiopid -purpose: read the aiop idenfication number directly from an aiop. -call: sreadaiopid(io) - byteio_t io: aiop base i/o address -return: int: flag aiopid_xxxx if a valid aiop is found, where x - is replace by an identifying number. - flag aiopid_null if no valid aiop is found -warnings: no context switches are allowed while executing this function. - -*/ -static int sreadaiopid(byteio_t io) -{ - byte_t aiopid; /* id byte from aiop */ - - soutb(io + _cmd_reg, reset_all); /* reset aiop */ - soutb(io + _cmd_reg, 0x0); - aiopid = sinw(io + _chn_stat0) & 0x07; - if (aiopid == 0x06) - return (1); - else /* aiop does not exist */ - return (-1); -} - -/*************************************************************************** -function: sreadaiopnumchan -purpose: read the number of channels available in an aiop directly from - an aiop. -call: sreadaiopnumchan(io) - wordio_t io: aiop base i/o address -return: int: the number of channels available -comments: the number of channels is determined by write/reads from identical - offsets within the sram address spaces for channels 0 and 4. - if the channel 4 space is mirrored to channel 0 it is a 4 channel - aiop, otherwise it is an 8 channel. -warnings: no context switches are allowed while executing this function. -*/ -static int sreadaiopnumchan(wordio_t io) -{ - word_t x; - static byte_t r[4] = { 0x00, 0x00, 0x34, 0x12 }; - - /* write to chan 0 sram */ - out32((dwordio_t) io + _indx_addr, r); - soutw(io + _indx_addr, 0); /* read from sram, chan 0 */ - x = sinw(io + _indx_data); - soutw(io + _indx_addr, 0x4000); /* read from sram, chan 4 */ - if (x != sinw(io + _indx_data)) /* if different must be 8 chan */ - return (8); - else - return (4); -} - -/*************************************************************************** -function: sinitchan -purpose: initialization of a channel and channel structure -call: sinitchan(ctlp,chp,aiopnum,channum) - controller_t *ctlp; ptr to controller structure - channel_t *chp; ptr to channel structure - int aiopnum; aiop number within controller - int channum; channel number within aiop -return: int: 1 if initialization succeeded, 0 if it fails because channel - number exceeds number of channels available in aiop. -comments: this function must be called before a channel can be used. -warnings: no range checking on any of the parameters is done. - - no context switches are allowed while executing this function. -*/ -static int sinitchan(controller_t * ctlp, channel_t * chp, int aiopnum, - int channum) -{ - int i; - wordio_t aiopio; - wordio_t chiooff; - byte_t *chr; - word_t choff; - static byte_t r[4]; - int brd9600; - - if (channum >= ctlp->aiopnumchan[aiopnum]) - return 0; /* exceeds num chans in aiop */ - - /* channel, aiop, and controller identifiers */ - chp->ctlp = ctlp; - chp->chanid = ctlp->aiopid[aiopnum]; - chp->aiopnum = aiopnum; - chp->channum = channum; - - /* global direct addresses */ - aiopio = ctlp->aiopio[aiopnum]; - chp->cmd = (byteio_t) aiopio + _cmd_reg; - chp->intchan = (byteio_t) aiopio + _int_chan; - chp->intmask = (byteio_t) aiopio + _int_mask; - chp->indexaddr = (dwordio_t) aiopio + _indx_addr; - chp->indexdata = aiopio + _indx_data; - - /* channel direct addresses */ - chiooff = aiopio + chp->channum * 2; - chp->txrxdata = chiooff + _td0; - chp->chanstat = chiooff + _chn_stat0; - chp->txrxcount = chiooff + _fifo_cnt0; - chp->intid = (byteio_t) aiopio + chp->channum + _int_id0; - - /* initialize the channel from the rdata array */ - for (i = 0; i < rdatasize; i += 4) { - r[0] = rdata[i]; - r[1] = rdata[i + 1] + 0x10 * channum; - r[2] = rdata[i + 2]; - r[3] = rdata[i + 3]; - out32(chp->indexaddr, r); - } - - chr = chp->r; - for (i = 0; i < rregdatasize; i += 4) { - chr[i] = rregdata[i]; - chr[i + 1] = rregdata[i + 1] + 0x10 * channum; - chr[i + 2] = rregdata[i + 2]; - chr[i + 3] = rregdata[i + 3]; - } - - /* indexed registers */ - choff = (word_t) channum *0x1000; - - if (sclockprescale == 0x14) - brd9600 = 47; - else - brd9600 = 23; - - chp->bauddiv[0] = (byte_t) (choff + _baud); - chp->bauddiv[1] = (byte_t) ((choff + _baud) >> 8); - chp->bauddiv[2] = (byte_t) brd9600; - chp->bauddiv[3] = (byte_t) (brd9600 >> 8); - out32(chp->indexaddr, chp->bauddiv); - - chp->txcontrol[0] = (byte_t) (choff + _tx_ctrl); - chp->txcontrol[1] = (byte_t) ((choff + _tx_ctrl) >> 8); - chp->txcontrol[2] = 0; - chp->txcontrol[3] = 0; - out32(chp->indexaddr, chp->txcontrol); - - chp->rxcontrol[0] = (byte_t) (choff + _rx_ctrl); - chp->rxcontrol[1] = (byte_t) ((choff + _rx_ctrl) >> 8); - chp->rxcontrol[2] = 0; - chp->rxcontrol[3] = 0; - out32(chp->indexaddr, chp->rxcontrol); - - chp->txenables[0] = (byte_t) (choff + _tx_enbls); - chp->txenables[1] = (byte_t) ((choff + _tx_enbls) >> 8); - chp->txenables[2] = 0; - chp->txenables[3] = 0; - out32(chp->indexaddr, chp->txenables); - - chp->txcompare[0] = (byte_t) (choff + _txcmp1); - chp->txcompare[1] = (byte_t) ((choff + _txcmp1) >> 8); - chp->txcompare[2] = 0; - chp->txcompare[3] = 0; - out32(chp->indexaddr, chp->txcompare); - - chp->txreplace1[0] = (byte_t) (choff + _txrep1b1); - chp->txreplace1[1] = (byte_t) ((choff + _txrep1b1) >> 8); - chp->txreplace1[2] = 0; - chp->txreplace1[3] = 0; - out32(chp->indexaddr, chp->txreplace1); - - chp->txreplace2[0] = (byte_t) (choff + _txrep2); - chp->txreplace2[1] = (byte_t) ((choff + _txrep2) >> 8); - chp->txreplace2[2] = 0; - chp->txreplace2[3] = 0; - out32(chp->indexaddr, chp->txreplace2); - - chp->txfifoptrs = choff + _txf_outp; - chp->txfifo = choff + _tx_fifo; - - soutb(chp->cmd, (byte_t) channum | restxfcnt); /* apply reset tx fifo count */ - soutb(chp->cmd, (byte_t) channum); /* remove reset tx fifo count */ - soutw((wordio_t) chp->indexaddr, chp->txfifoptrs); /* clear tx in/out ptrs */ - soutw(chp->indexdata, 0); - chp->rxfifoptrs = choff + _rxf_outp; - chp->rxfifo = choff + _rx_fifo; - - soutb(chp->cmd, (byte_t) channum | resrxfcnt); /* apply reset rx fifo count */ - soutb(chp->cmd, (byte_t) channum); /* remove reset rx fifo count */ - soutw((wordio_t) chp->indexaddr, chp->rxfifoptrs); /* clear rx out ptr */ - soutw(chp->indexdata, 0); - soutw((wordio_t) chp->indexaddr, chp->rxfifoptrs + 2); /* clear rx in ptr */ - soutw(chp->indexdata, 0); - chp->txpriocnt = choff + _txp_cnt; - soutw((wordio_t) chp->indexaddr, chp->txpriocnt); - soutb(chp->indexdata, 0); - chp->txprioptr = choff + _txp_pntr; - soutw((wordio_t) chp->indexaddr, chp->txprioptr); - soutb(chp->indexdata, 0); - chp->txpriobuf = choff + _txp_buf; - senrxprocessor(chp); /* start the rx processor */ - - return 1; -} - -/*************************************************************************** -function: sstoprxprocessor -purpose: stop the receive processor from processing a channel. -call: sstoprxprocessor(chp) - channel_t *chp; ptr to channel structure - -comments: the receive processor can be started again with sstartrxprocessor(). - this function causes the receive processor to skip over the - stopped channel. it does not stop it from processing other channels. - -warnings: no context switches are allowed while executing this function. - - do not leave the receive processor stopped for more than one - character time. - - after calling this function a delay of 4 us is required to ensure - that the receive processor is no longer processing this channel. -*/ -static void sstoprxprocessor(channel_t * chp) -{ - byte_t r[4]; - - r[0] = chp->r[0]; - r[1] = chp->r[1]; - r[2] = 0x0a; - r[3] = chp->r[3]; - out32(chp->indexaddr, r); -} - -/*************************************************************************** -function: sflushrxfifo -purpose: flush the rx fifo -call: sflushrxfifo(chp) - channel_t *chp; ptr to channel structure -return: void -comments: to prevent data from being enqueued or dequeued in the tx fifo - while it is being flushed the receive processor is stopped - and the transmitter is disabled. after these operations a - 4 us delay is done before clearing the pointers to allow - the receive processor to stop. these items are handled inside - this function. -warnings: no context switches are allowed while executing this function. -*/ -static void sflushrxfifo(channel_t * chp) -{ - int i; - byte_t ch; /* channel number within aiop */ - int rxfifoenabled; /* 1 if rx fifo enabled */ - - if (sgetrxcnt(chp) == 0) /* rx fifo empty */ - return; /* don't need to flush */ - - rxfifoenabled = 0; - if (chp->r[0x32] == 0x08) { /* rx fifo is enabled */ - rxfifoenabled = 1; - sdisrxfifo(chp); /* disable it */ - for (i = 0; i < 2000 / 200; i++) /* delay 2 us to allow proc to disable fifo */ - sinb(chp->intchan); /* depends on bus i/o timing */ - } - sgetchanstatus(chp); /* clear any pending rx errors in chan stat */ - ch = (byte_t) sgetchannum(chp); - soutb(chp->cmd, ch | resrxfcnt); /* apply reset rx fifo count */ - soutb(chp->cmd, ch); /* remove reset rx fifo count */ - soutw((wordio_t) chp->indexaddr, chp->rxfifoptrs); /* clear rx out ptr */ - soutw(chp->indexdata, 0); - soutw((wordio_t) chp->indexaddr, chp->rxfifoptrs + 2); /* clear rx in ptr */ - soutw(chp->indexdata, 0); - if (rxfifoenabled) - senrxfifo(chp); /* enable rx fifo */ -} - -/*************************************************************************** -function: sflushtxfifo -purpose: flush the tx fifo -call: sflushtxfifo(chp) - channel_t *chp; ptr to channel structure -return: void -comments: to prevent data from being enqueued or dequeued in the tx fifo - while it is being flushed the receive processor is stopped - and the transmitter is disabled. after these operations a - 4 us delay is done before clearing the pointers to allow - the receive processor to stop. these items are handled inside - this function. -warnings: no context switches are allowed while executing this function. -*/ -static void sflushtxfifo(channel_t * chp) -{ - int i; - byte_t ch; /* channel number within aiop */ - int txenabled; /* 1 if transmitter enabled */ - - if (sgettxcnt(chp) == 0) /* tx fifo empty */ - return; /* don't need to flush */ - - txenabled = 0; - if (chp->txcontrol[3] & tx_enable) { - txenabled = 1; - sdistransmit(chp); /* disable transmitter */ - } - sstoprxprocessor(chp); /* stop rx processor */ - for (i = 0; i < 4000 / 200; i++) /* delay 4 us to allow proc to stop */ - sinb(chp->intchan); /* depends on bus i/o timing */ - ch = (byte_t) sgetchannum(chp); - soutb(chp->cmd, ch | restxfcnt); /* apply reset tx fifo count */ - soutb(chp->cmd, ch); /* remove reset tx fifo count */ - soutw((wordio_t) chp->indexaddr, chp->txfifoptrs); /* clear tx in/out ptrs */ - soutw(chp->indexdata, 0); - if (txenabled) - sentransmit(chp); /* enable transmitter */ - sstartrxprocessor(chp); /* restart rx processor */ -} - -/*************************************************************************** -function: swritetxpriobyte -purpose: write a byte of priority transmit data to a channel -call: swritetxpriobyte(chp,data) - channel_t *chp; ptr to channel structure - byte_t data; the transmit data byte - -return: int: 1 if the bytes is successfully written, otherwise 0. - -comments: the priority byte is transmitted before any data in the tx fifo. - -warnings: no context switches are allowed while executing this function. -*/ -static int swritetxpriobyte(channel_t * chp, byte_t data) -{ - byte_t dwbuf[4]; /* buffer for double word writes */ - word_t *wordptr; /* must be far because win ss != ds */ - register dwordio_t indexaddr; - - if (sgettxcnt(chp) > 1) { /* write it to tx priority buffer */ - indexaddr = chp->indexaddr; - soutw((wordio_t) indexaddr, chp->txpriocnt); /* get priority buffer status */ - if (sinb((byteio_t) chp->indexdata) & pri_pend) /* priority buffer busy */ - return (0); /* nothing sent */ - - wordptr = (word_t *) (&dwbuf[0]); - *wordptr = chp->txpriobuf; /* data byte address */ - - dwbuf[2] = data; /* data byte value */ - out32(indexaddr, dwbuf); /* write it out */ - - *wordptr = chp->txpriocnt; /* tx priority count address */ - - dwbuf[2] = pri_pend + 1; /* indicate 1 byte pending */ - dwbuf[3] = 0; /* priority buffer pointer */ - out32(indexaddr, dwbuf); /* write it out */ - } else { /* write it to tx fifo */ - - swritetxbyte(sgettxrxdataio(chp), data); - } - return (1); /* 1 byte sent */ -} - -/*************************************************************************** -function: seninterrupts -purpose: enable one or more interrupts for a channel -call: seninterrupts(chp,flags) - channel_t *chp; ptr to channel structure - word_t flags: interrupt enable flags, can be any combination - of the following flags: - txint_en: interrupt on tx fifo empty - rxint_en: interrupt on rx fifo at trigger level (see - ssetrxtrigger()) - srcint_en: interrupt on src (special rx condition) - mcint_en: interrupt on modem input change - chanint_en: allow channel interrupt signal to the aiop's - interrupt channel register. -return: void -comments: if an interrupt enable flag is set in flags, that interrupt will be - enabled. if an interrupt enable flag is not set in flags, that - interrupt will not be changed. interrupts can be disabled with - function sdisinterrupts(). - - this function sets the appropriate bit for the channel in the aiop's - interrupt mask register if the chanint_en flag is set. this allows - this channel's bit to be set in the aiop's interrupt channel register. - - interrupts must also be globally enabled before channel interrupts - will be passed on to the host. this is done with function - senglobalint(). - - in some cases it may be desirable to disable interrupts globally but - enable channel interrupts. this would allow the global interrupt - status register to be used to determine which aiops need service. -*/ -static void seninterrupts(channel_t * chp, word_t flags) -{ - byte_t mask; /* interrupt mask register */ - - chp->rxcontrol[2] |= - ((byte_t) flags & (rxint_en | srcint_en | mcint_en)); - - out32(chp->indexaddr, chp->rxcontrol); - - chp->txcontrol[2] |= ((byte_t) flags & txint_en); - - out32(chp->indexaddr, chp->txcontrol); - - if (flags & chanint_en) { - mask = sinb(chp->intmask) | sbitmapsettbl[chp->channum]; - soutb(chp->intmask, mask); - } -} - -/*************************************************************************** -function: sdisinterrupts -purpose: disable one or more interrupts for a channel -call: sdisinterrupts(chp,flags) - channel_t *chp; ptr to channel structure - word_t flags: interrupt flags, can be any combination - of the following flags: - txint_en: interrupt on tx fifo empty - rxint_en: interrupt on rx fifo at trigger level (see - ssetrxtrigger()) - srcint_en: interrupt on src (special rx condition) - mcint_en: interrupt on modem input change - chanint_en: disable channel interrupt signal to the - aiop's interrupt channel register. -return: void -comments: if an interrupt flag is set in flags, that interrupt will be - disabled. if an interrupt flag is not set in flags, that - interrupt will not be changed. interrupts can be enabled with - function seninterrupts(). - - this function clears the appropriate bit for the channel in the aiop's - interrupt mask register if the chanint_en flag is set. this blocks - this channel's bit from being set in the aiop's interrupt channel - register. -*/ -static void sdisinterrupts(channel_t * chp, word_t flags) -{ - byte_t mask; /* interrupt mask register */ - - chp->rxcontrol[2] &= - ~((byte_t) flags & (rxint_en | srcint_en | mcint_en)); - out32(chp->indexaddr, chp->rxcontrol); - chp->txcontrol[2] &= ~((byte_t) flags & txint_en); - out32(chp->indexaddr, chp->txcontrol); - - if (flags & chanint_en) { - mask = sinb(chp->intmask) & sbitmapclrtbl[chp->channum]; - soutb(chp->intmask, mask); - } -} - -static void ssetinterfacemode(channel_t * chp, byte_t mode) -{ - soutb(chp->ctlp->aiopio[2], (mode & 0x18) | chp->channum); -} - -/* - * not an official ssci function, but how to reset rocketmodems. - * isa bus version - */ -static void smodemreset(controller_t * ctlp, int chan, int on) -{ - byteio_t addr; - byte_t val; - - addr = ctlp->aiopio[0] + 0x400; - val = sinb(ctlp->mreg3io); - /* if aiop[1] is not enabled, enable it */ - if ((val & 2) == 0) { - val = sinb(ctlp->mreg2io); - soutb(ctlp->mreg2io, (val & 0xfc) | (1 & 0x03)); - soutb(ctlp->mbaseio, (unsigned char) (addr >> 6)); - } - - senaiop(ctlp, 1); - if (!on) - addr += 8; - soutb(addr + chan, 0); /* apply or remove reset */ - sdisaiop(ctlp, 1); -} - -/* - * not an official ssci function, but how to reset rocketmodems. - * pci bus version - */ -static void spcimodemreset(controller_t * ctlp, int chan, int on) -{ - byteio_t addr; - - addr = ctlp->aiopio[0] + 0x40; /* 2nd aiop */ - if (!on) - addr += 8; - soutb(addr + chan, 0); /* apply or remove reset */ -} - -/* returns the line number given the controller (board), aiop and channel number */ -static unsigned char getlinenumber(int ctrl, int aiop, int ch) -{ - return linenumbers[(ctrl << 5) | (aiop << 3) | ch]; -} - -/* - * stores the line number associated with a given controller (board), aiop - * and channel number. - * returns: the line number assigned - */ -static unsigned char setlinenumber(int ctrl, int aiop, int ch) -{ - linenumbers[(ctrl << 5) | (aiop << 3) | ch] = nextlinenumber++; - return (nextlinenumber - 1); -} diff --git a/drivers/tty/rocket.h b/drivers/tty/rocket.h --- a/drivers/tty/rocket.h +++ /dev/null -/* spdx-license-identifier: gpl-2.0 */ -/* - * rocket.h --- the exported interface of the rocket driver to its configuration program. - * - * written by theodore ts'o, copyright 1997. - * copyright 1997 comtrol corporation. - * - */ - -/* model information struct */ -typedef struct { - unsigned long model; - char modelstring[80]; - unsigned long numports; - int loadrm2; - int startingportnumber; -} rocketmodel_t; - -struct rocket_config { - int line; - int flags; - int closing_wait; - int close_delay; - int port; - int reserved[32]; -}; - -struct rocket_ports { - int tty_major; - int callout_major; - rocketmodel_t rocketmodel[8]; -}; - -struct rocket_version { - char rocket_version[32]; - char rocket_date[32]; - char reserved[64]; -}; - -/* - * rocketport flags - */ -/*#define rocket_callout_nohup 0x00000001 */ -#define rocket_force_cd 0x00000002 -#define rocket_hup_notify 0x00000004 -#define rocket_split_termios 0x00000008 -#define rocket_spd_mask 0x00000070 -#define rocket_spd_hi 0x00000010 /* use 57600 instead of 38400 bps */ -#define rocket_spd_vhi 0x00000020 /* use 115200 instead of 38400 bps */ -#define rocket_spd_shi 0x00000030 /* use 230400 instead of 38400 bps */ -#define rocket_spd_warp 0x00000040 /* use 460800 instead of 38400 bps */ -#define rocket_sak 0x00000080 -#define rocket_session_lockout 0x00000100 -#define rocket_pgrp_lockout 0x00000200 -#define rocket_rts_toggle 0x00000400 -#define rocket_mode_mask 0x00003000 -#define rocket_mode_rs232 0x00000000 -#define rocket_mode_rs485 0x00001000 -#define rocket_mode_rs422 0x00002000 -#define rocket_flags 0x00003fff - -#define rocket_usr_mask 0x0071 /* legal flags that non-privileged - * users can set or reset */ - -/* - * for closing_wait and closing_wait2 - */ -#define rocket_closing_wait_none async_closing_wait_none -#define rocket_closing_wait_inf async_closing_wait_inf - -/* - * rocketport ioctls -- "rp" - */ -#define rckp_get_config 0x00525002 -#define rckp_set_config 0x00525003 -#define rckp_get_ports 0x00525004 -#define rckp_reset_rm2 0x00525005 -#define rckp_get_version 0x00525006 - -/* rocketport models */ -#define model_rp32intf 0x0001 /* rp 32 port w/external i/f */ -#define model_rp8intf 0x0002 /* rp 8 port w/external i/f */ -#define model_rp16intf 0x0003 /* rp 16 port w/external i/f */ -#define model_rp8octa 0x0005 /* rp 8 port w/octa cable */ -#define model_rp4quad 0x0004 /* rp 4 port w/quad cable */ -#define model_rp8j 0x0006 /* rp 8 port w/rj11 connectors */ -#define model_rp4j 0x0007 /* rp 4 port w/rj45 connectors */ -#define model_rp8sni 0x0008 /* rp 8 port w/ db78 sni connector */ -#define model_rp16sni 0x0009 /* rp 16 port w/ db78 sni connector */ -#define model_rpp4 0x000a /* rp plus 4 port */ -#define model_rpp8 0x000b /* rp plus 8 port */ -#define model_rp2_232 0x000e /* rp plus 2 port rs232 */ -#define model_rp2_422 0x000f /* rp plus 2 port rs232 */ - -/* rocketmodem ii models */ -#define model_rp6m 0x000c /* rm 6 port */ -#define model_rp4m 0x000d /* rm 4 port */ - -/* universal pci boards */ -#define model_upci_rp32intf 0x0801 /* rp upci 32 port w/external i/f */ -#define model_upci_rp8intf 0x0802 /* rp upci 8 port w/external i/f */ -#define model_upci_rp16intf 0x0803 /* rp upci 16 port w/external i/f */ -#define model_upci_rp8octa 0x0805 /* rp upci 8 port w/octa cable */ -#define model_upci_rm3_8port 0x080c /* rp upci rocketmodem iii 8 port */ -#define model_upci_rm3_4port 0x080c /* rp upci rocketmodem iii 4 port */ - -/* compact pci 16 port */ -#define model_cpci_rp16intf 0x0903 /* rp compact pci 16 port w/external i/f */ - -/* all isa boards */ -#define model_isa 0x1000 diff --git a/drivers/tty/rocket_int.h b/drivers/tty/rocket_int.h --- a/drivers/tty/rocket_int.h +++ /dev/null -/* spdx-license-identifier: gpl-2.0 */ -/* - * rocket_int.h --- internal header file for rocket.c - * - * written by theodore ts'o, copyright 1997. - * copyright 1997 comtrol corporation. - * - */ - -/* - * definition of the types in rcktpt_type - */ -#define rocket_type_normal 0 -#define rocket_type_modem 1 -#define rocket_type_modemii 2 -#define rocket_type_modemiii 3 -#define rocket_type_pc104 4 - -#include <linux/mutex.h> - -#include <asm/io.h> -#include <asm/byteorder.h> - -typedef unsigned char byte_t; -typedef unsigned int byteio_t; - -typedef unsigned int word_t; -typedef unsigned int wordio_t; - -typedef unsigned int dwordio_t; - -/* - * note! normally the linux i/o macros already take care of - * byte-swapping the i/o instructions. however, all accesses using - * soutdw aren't really 32-bit accesses, but should be handled in byte - * order. hence the use of the cpu_to_le32() macro to byte-swap - * things to no-op the byte swapping done by the big-endian outl() - * instruction. - */ - -static inline void soutb(unsigned short port, unsigned char value) -{ -#ifdef rocket_debug_io - printk(kern_debug "soutb(%x, %x)... ", port, value); -#endif - outb_p(value, port); -} - -static inline void soutw(unsigned short port, unsigned short value) -{ -#ifdef rocket_debug_io - printk(kern_debug "soutw(%x, %x)... ", port, value); -#endif - outw_p(value, port); -} - -static inline void out32(unsigned short port, byte_t *p) -{ - u32 value = get_unaligned_le32(p); -#ifdef rocket_debug_io - printk(kern_debug "out32(%x, %lx)... ", port, value); -#endif - outl_p(value, port); -} - -static inline unsigned char sinb(unsigned short port) -{ - return inb_p(port); -} - -static inline unsigned short sinw(unsigned short port) -{ - return inw_p(port); -} - -/* this is used to move arrays of bytes so byte swapping isn't appropriate. */ -#define soutstrw(port, addr, count) if (count) outsw(port, addr, count) -#define sinstrw(port, addr, count) if (count) insw(port, addr, count) - -#define ctl_size 8 -#define aiop_ctl_size 4 -#define chan_aiop_size 8 -#define max_ports_per_aiop 8 -#define max_aiops_per_board 4 -#define max_ports_per_board 32 - -/* bus type id */ -#define isisa 0 -#define ispci 1 -#define ismc 2 - -/* controller id numbers */ -#define ctlid_null -1 /* no controller exists */ -#define ctlid_0001 0x0001 /* controller release 1 */ - -/* aiop id numbers, identifies aiop type implementing channel */ -#define aiopid_null -1 /* no aiop or channel exists */ -#define aiopid_0001 0x0001 /* aiop release 1 */ - -/************************************************************************ - global register offsets - direct access - fixed values -************************************************************************/ - -#define _cmd_reg 0x38 /* command register 8 write */ -#define _int_chan 0x39 /* interrupt channel register 8 read */ -#define _int_mask 0x3a /* interrupt mask register 8 read / write */ -#define _unused 0x3b /* unused 8 */ -#define _indx_addr 0x3c /* index register address 16 write */ -#define _indx_data 0x3e /* index register data 8/16 read / write */ - -/************************************************************************ - channel register offsets for 1st channel in aiop - direct access -************************************************************************/ -#define _td0 0x00 /* transmit data 16 write */ -#define _rd0 0x00 /* receive data 16 read */ -#define _chn_stat0 0x20 /* channel status 8/16 read / write */ -#define _fifo_cnt0 0x10 /* transmit/receive fifo count 16 read */ -#define _int_id0 0x30 /* interrupt identification 8 read */ - -/************************************************************************ - tx control register offsets - indexed - external - fixed -************************************************************************/ -#define _tx_enbls 0x980 /* tx processor enables register 8 read / write */ -#define _txcmp1 0x988 /* transmit compare value #1 8 read / write */ -#define _txcmp2 0x989 /* transmit compare value #2 8 read / write */ -#define _txrep1b1 0x98a /* tx replace value #1 - byte 1 8 read / write */ -#define _txrep1b2 0x98b /* tx replace value #1 - byte 2 8 read / write */ -#define _txrep2 0x98c /* transmit replace value #2 8 read / write */ - -/************************************************************************ -memory controller register offsets - indexed - external - fixed -************************************************************************/ -#define _rx_fifo 0x000 /* rx fifo */ -#define _tx_fifo 0x800 /* tx fifo */ -#define _rxf_outp 0x990 /* rx fifo out pointer 16 read / write */ -#define _rxf_inp 0x992 /* rx fifo in pointer 16 read / write */ -#define _txf_outp 0x994 /* tx fifo out pointer 8 read / write */ -#define _txf_inp 0x995 /* tx fifo in pointer 8 read / write */ -#define _txp_cnt 0x996 /* tx priority count 8 read / write */ -#define _txp_pntr 0x997 /* tx priority pointer 8 read / write */ - -#define pri_pend 0x80 /* priority data pending (bit7, tx pri cnt) */ -#define txfifo_size 255 /* size of tx fifo */ -#define rxfifo_size 1023 /* size of rx fifo */ - -/************************************************************************ -tx priority buffer - indexed - external - fixed -************************************************************************/ -#define _txp_buf 0x9c0 /* tx priority buffer 32 bytes read / write */ -#define txp_size 0x20 /* 32 bytes */ - -/************************************************************************ -channel register offsets - indexed - internal - fixed -************************************************************************/ - -#define _tx_ctrl 0xff0 /* transmit control 16 write */ -#define _rx_ctrl 0xff2 /* receive control 8 write */ -#define _baud 0xff4 /* baud rate 16 write */ -#define _clk_pre 0xff6 /* clock prescaler 8 write */ - -#define stmbreak 0x08 /* break */ -#define stmframe 0x04 /* framing error */ -#define stmrcvrovr 0x02 /* receiver over run error */ -#define stmparity 0x01 /* parity error */ -#define stmerror (stmbreak | stmframe | stmparity) -#define stmbreakh 0x800 /* break */ -#define stmframeh 0x400 /* framing error */ -#define stmrcvrovrh 0x200 /* receiver over run error */ -#define stmparityh 0x100 /* parity error */ -#define stmerrorh (stmbreakh | stmframeh | stmparityh) - -#define cts_act 0x20 /* cts input asserted */ -#define dsr_act 0x10 /* dsr input asserted */ -#define cd_act 0x08 /* cd input asserted */ -#define txfifomt 0x04 /* tx fifo is empty */ -#define txshrmt 0x02 /* tx shift register is empty */ -#define rda 0x01 /* rx data available */ -#define drained (txfifomt | txshrmt) /* indicates tx is drained */ - -#define statmode 0x8000 /* status mode enable bit */ -#define rxfoverfl 0x2000 /* receive fifo overflow */ -#define rx2match 0x1000 /* receive compare byte 2 match */ -#define rx1match 0x0800 /* receive compare byte 1 match */ -#define rxbreak 0x0400 /* received break */ -#define rxframe 0x0200 /* received framing error */ -#define rxparity 0x0100 /* received parity error */ -#define staterror (rxbreak | rxframe | rxparity) - -#define ctsfc_en 0x80 /* cts flow control enable bit */ -#define rtstog_en 0x40 /* rts toggle enable bit */ -#define txint_en 0x10 /* transmit interrupt enable */ -#define stop2 0x08 /* enable 2 stop bits (0 = 1 stop) */ -#define parity_en 0x04 /* enable parity (0 = no parity) */ -#define even_par 0x02 /* even parity (0 = odd parity) */ -#define data8bit 0x01 /* 8 bit data (0 = 7 bit data) */ - -#define setbreak 0x10 /* send break condition (must clear) */ -#define localloop 0x08 /* local loopback set for test */ -#define set_dtr 0x04 /* assert dtr */ -#define set_rts 0x02 /* assert rts */ -#define tx_enable 0x01 /* enable transmitter */ - -#define rtsfc_en 0x40 /* rts flow control enable */ -#define rxproc_en 0x20 /* receive processor enable */ -#define trig_no 0x00 /* rx fifo trigger level 0 (no trigger) */ -#define trig_1 0x08 /* trigger level 1 char */ -#define trig_1_2 0x10 /* trigger level 1/2 */ -#define trig_7_8 0x18 /* trigger level 7/8 */ -#define trig_mask 0x18 /* trigger level mask */ -#define srcint_en 0x04 /* special rx condition interrupt enable */ -#define rxint_en 0x02 /* rx interrupt enable */ -#define mcint_en 0x01 /* modem change interrupt enable */ - -#define rxf_trig 0x20 /* rx fifo trigger level interrupt */ -#define txfifo_mt 0x10 /* tx fifo empty interrupt */ -#define src_int 0x08 /* special receive condition interrupt */ -#define delta_cd 0x04 /* cd change interrupt */ -#define delta_cts 0x02 /* cts change interrupt */ -#define delta_dsr 0x01 /* dsr change interrupt */ - -#define rep1w2_en 0x10 /* replace byte 1 with 2 bytes enable */ -#define ign2_en 0x08 /* ignore byte 2 enable */ -#define ign1_en 0x04 /* ignore byte 1 enable */ -#define comp2_en 0x02 /* compare byte 2 enable */ -#define comp1_en 0x01 /* compare byte 1 enable */ - -#define reset_all 0x80 /* reset aiop (all channels) */ -#define txoveride 0x40 /* transmit software off override */ -#define resetuart 0x20 /* reset channel's uart */ -#define restxfcnt 0x10 /* reset channel's tx fifo count register */ -#define resrxfcnt 0x08 /* reset channel's rx fifo count register */ - -#define intstat0 0x01 /* aiop 0 interrupt status */ -#define intstat1 0x02 /* aiop 1 interrupt status */ -#define intstat2 0x04 /* aiop 2 interrupt status */ -#define intstat3 0x08 /* aiop 3 interrupt status */ - -#define intr_en 0x08 /* allow interrupts to host */ -#define int_strob 0x04 /* strobe and clear interrupt line (eoi) */ - -/************************************************************************** - mudbac remapped for pci -**************************************************************************/ - -#define _cfg_int_pci 0x40 -#define _pci_int_func 0x3a - -#define pci_strob 0x2000 /* bit 13 of int aiop register */ -#define intr_en_pci 0x0010 /* allow interrupts to host */ - -/* - * definitions for universal pci board registers - */ -#define _pci_9030_int_ctrl 0x4c /* offsets from bar1 */ -#define _pci_9030_gpio_ctrl 0x54 -#define pci_int_ctrl_aiop 0x0001 -#define pci_gpio_ctrl_8port 0x4000 -#define _pci_9030_ring_ind 0xc0 /* offsets from bar1 */ - -#define chan3_en 0x08 /* enable aiop 3 */ -#define chan2_en 0x04 /* enable aiop 2 */ -#define chan1_en 0x02 /* enable aiop 1 */ -#define chan0_en 0x01 /* enable aiop 0 */ -#define freq_dis 0x00 -#define freq_274hz 0x60 -#define freq_137hz 0x50 -#define freq_69hz 0x40 -#define freq_34hz 0x30 -#define freq_17hz 0x20 -#define freq_9hz 0x10 -#define periodic_only 0x80 /* only periodic interrupt */ - -#define chanint_en 0x0100 /* flags to enable/disable channel ints */ - -#define rdatasize 72 -#define rregdatasize 52 - -/* - * aiop interrupt bits for isa/pci boards and upci boards. - */ -#define aiop_intr_bit_0 0x0001 -#define aiop_intr_bit_1 0x0002 -#define aiop_intr_bit_2 0x0004 -#define aiop_intr_bit_3 0x0008 - -#define aiop_intr_bits ( \ - aiop_intr_bit_0 \ - | aiop_intr_bit_1 \ - | aiop_intr_bit_2 \ - | aiop_intr_bit_3) - -#define upci_aiop_intr_bit_0 0x0004 -#define upci_aiop_intr_bit_1 0x0020 -#define upci_aiop_intr_bit_2 0x0100 -#define upci_aiop_intr_bit_3 0x0800 - -#define upci_aiop_intr_bits ( \ - upci_aiop_intr_bit_0 \ - | upci_aiop_intr_bit_1 \ - | upci_aiop_intr_bit_2 \ - | upci_aiop_intr_bit_3) - -/* controller level information structure */ -typedef struct { - int ctlid; - int ctlnum; - int bustype; - int boardtype; - int isupci; - wordio_t pciio; - wordio_t pciio2; - byteio_t mbaseio; - byteio_t mreg1io; - byteio_t mreg2io; - byteio_t mreg3io; - byte_t mreg2; - byte_t mreg3; - int numaiop; - int altchanringindicator; - byteio_t upciringind; - wordio_t aiopio[aiop_ctl_size]; - byteio_t aiopintchanio[aiop_ctl_size]; - int aiopid[aiop_ctl_size]; - int aiopnumchan[aiop_ctl_size]; - word_t *aiopintrbits; -} controller_t; - -typedef controller_t controller_t; - -/* channel level information structure */ -typedef struct { - controller_t *ctlp; - int aiopnum; - int chanid; - int channum; - int rtstoggle; - - byteio_t cmd; - byteio_t intchan; - byteio_t intmask; - dwordio_t indexaddr; - wordio_t indexdata; - - wordio_t txrxdata; - wordio_t chanstat; - wordio_t txrxcount; - byteio_t intid; - - word_t txfifo; - word_t txfifoptrs; - word_t rxfifo; - word_t rxfifoptrs; - word_t txpriocnt; - word_t txprioptr; - word_t txpriobuf; - - byte_t r[rregdatasize]; - - byte_t bauddiv[4]; - byte_t txcontrol[4]; - byte_t rxcontrol[4]; - byte_t txenables[4]; - byte_t txcompare[4]; - byte_t txreplace1[4]; - byte_t txreplace2[4]; -} channel_t; - -typedef channel_t channel_t; -typedef channel_t *chanptr_t; - -#define interfacemoders232 0x00 -#define interfacemoders422 0x08 -#define interfacemoders485 0x10 -#define interfacemoders232t 0x18 - -/*************************************************************************** -function: sclrbreak -purpose: stop sending a transmit break signal -call: sclrbreak(chp) - channel_t *chp; ptr to channel structure -*/ -#define sclrbreak(chp) \ -do { \ - (chp)->txcontrol[3] &= ~setbreak; \ - out32((chp)->indexaddr,(chp)->txcontrol); \ -} while (0) - -/*************************************************************************** -function: sclrdtr -purpose: clr the dtr output -call: sclrdtr(chp) - channel_t *chp; ptr to channel structure -*/ -#define sclrdtr(chp) \ -do { \ - (chp)->txcontrol[3] &= ~set_dtr; \ - out32((chp)->indexaddr,(chp)->txcontrol); \ -} while (0) - -/*************************************************************************** -function: sclrrts -purpose: clr the rts output -call: sclrrts(chp) - channel_t *chp; ptr to channel structure -*/ -#define sclrrts(chp) \ -do { \ - if ((chp)->rtstoggle) break; \ - (chp)->txcontrol[3] &= ~set_rts; \ - out32((chp)->indexaddr,(chp)->txcontrol); \ -} while (0) - -/*************************************************************************** -function: sclrtxxoff -purpose: clear any existing transmit software flow control off condition -call: sclrtxxoff(chp) - channel_t *chp; ptr to channel structure -*/ -#define sclrtxxoff(chp) \ -do { \ - soutb((chp)->cmd,txoveride | (byte_t)(chp)->channum); \ - soutb((chp)->cmd,(byte_t)(chp)->channum); \ -} while (0) - -/*************************************************************************** -function: sctlnumtoctlptr -purpose: convert a controller number to controller structure pointer -call: sctlnumtoctlptr(ctlnum) - int ctlnum; controller number -return: controller_t *: ptr to controller structure -*/ -#define sctlnumtoctlptr(ctlnum) &scontroller[ctlnum] - -/*************************************************************************** -function: scontrollereoi -purpose: strobe the mudbac's end of interrupt bit. -call: scontrollereoi(ctlp) - controller_t *ctlp; ptr to controller structure -*/ -#define scontrollereoi(ctlp) soutb((ctlp)->mreg2io,(ctlp)->mreg2 | int_strob) - -/*************************************************************************** -function: spcicontrollereoi -purpose: strobe the pci end of interrupt bit. - for the upci boards, toggle the aiop interrupt enable bit - (this was taken from the windows driver). -call: spcicontrollereoi(ctlp) - controller_t *ctlp; ptr to controller structure -*/ -#define spcicontrollereoi(ctlp) \ -do { \ - if ((ctlp)->isupci) { \ - word_t w = sinw((ctlp)->pciio); \ - soutw((ctlp)->pciio, (w ^ pci_int_ctrl_aiop)); \ - soutw((ctlp)->pciio, w); \ - } \ - else { \ - soutw((ctlp)->pciio, pci_strob); \ - } \ -} while (0) - -/*************************************************************************** -function: sdisaiop -purpose: disable i/o access to an aiop -call: sdisaiop(cltp) - controller_t *ctlp; ptr to controller structure - int aiopnum; number of aiop on controller -*/ -#define sdisaiop(ctlp,aiopnum) \ -do { \ - (ctlp)->mreg3 &= sbitmapclrtbl[aiopnum]; \ - soutb((ctlp)->mreg3io,(ctlp)->mreg3); \ -} while (0) - -/*************************************************************************** -function: sdisctsflowctl -purpose: disable output flow control using cts -call: sdisctsflowctl(chp) - channel_t *chp; ptr to channel structure -*/ -#define sdisctsflowctl(chp) \ -do { \ - (chp)->txcontrol[2] &= ~ctsfc_en; \ - out32((chp)->indexaddr,(chp)->txcontrol); \ -} while (0) - -/*************************************************************************** -function: sdisixany -purpose: disable ixany software flow control -call: sdisixany(chp) - channel_t *chp; ptr to channel structure -*/ -#define sdisixany(chp) \ -do { \ - (chp)->r[0x0e] = 0x86; \ - out32((chp)->indexaddr,&(chp)->r[0x0c]); \ -} while (0) - -/*************************************************************************** -function: disparity -purpose: disable parity -call: sdisparity(chp) - channel_t *chp; ptr to channel structure -comments: function ssetparity() can be used in place of functions senparity(), - sdisparity(), ssetoddparity(), and ssetevenparity(). -*/ -#define sdisparity(chp) \ -do { \ - (chp)->txcontrol[2] &= ~parity_en; \ - out32((chp)->indexaddr,(chp)->txcontrol); \ -} while (0) - -/*************************************************************************** -function: sdisrtstoggle -purpose: disable rts toggle -call: sdisrtstoggle(chp) - channel_t *chp; ptr to channel structure -*/ -#define sdisrtstoggle(chp) \ -do { \ - (chp)->txcontrol[2] &= ~rtstog_en; \ - out32((chp)->indexaddr,(chp)->txcontrol); \ - (chp)->rtstoggle = 0; \ -} while (0) - -/*************************************************************************** -function: sdisrxfifo -purpose: disable rx fifo -call: sdisrxfifo(chp) - channel_t *chp; ptr to channel structure -*/ -#define sdisrxfifo(chp) \ -do { \ - (chp)->r[0x32] = 0x0a; \ - out32((chp)->indexaddr,&(chp)->r[0x30]); \ -} while (0) - -/*************************************************************************** -function: sdisrxstatusmode -purpose: disable the rx status mode -call: sdisrxstatusmode(chp) - channel_t *chp; ptr to channel structure -comments: this takes the channel out of the receive status mode. all - subsequent reads of receive data using sreadrxword() will return - two data bytes. -*/ -#define sdisrxstatusmode(chp) soutw((chp)->chanstat,0) - -/*************************************************************************** -function: sdistransmit -purpose: disable transmit -call: sdistransmit(chp) - channel_t *chp; ptr to channel structure - this disables movement of tx data from the tx fifo into the 1 byte - tx buffer. therefore there could be up to a 2 byte latency - between the time sdistransmit() is called and the transmit buffer - and transmit shift register going completely empty. -*/ -#define sdistransmit(chp) \ -do { \ - (chp)->txcontrol[3] &= ~tx_enable; \ - out32((chp)->indexaddr,(chp)->txcontrol); \ -} while (0) - -/*************************************************************************** -function: sdistxsoftflowctl -purpose: disable tx software flow control -call: sdistxsoftflowctl(chp) - channel_t *chp; ptr to channel structure -*/ -#define sdistxsoftflowctl(chp) \ -do { \ - (chp)->r[0x06] = 0x8a; \ - out32((chp)->indexaddr,&(chp)->r[0x04]); \ -} while (0) - -/*************************************************************************** -function: senaiop -purpose: enable i/o access to an aiop -call: senaiop(cltp) - controller_t *ctlp; ptr to controller structure - int aiopnum; number of aiop on controller -*/ -#define senaiop(ctlp,aiopnum) \ -do { \ - (ctlp)->mreg3 |= sbitmapsettbl[aiopnum]; \ - soutb((ctlp)->mreg3io,(ctlp)->mreg3); \ -} while (0) - -/*************************************************************************** -function: senctsflowctl -purpose: enable output flow control using cts -call: senctsflowctl(chp) - channel_t *chp; ptr to channel structure -*/ -#define senctsflowctl(chp) \ -do { \ - (chp)->txcontrol[2] |= ctsfc_en; \ - out32((chp)->indexaddr,(chp)->txcontrol); \ -} while (0) - -/*************************************************************************** -function: senixany -purpose: enable ixany software flow control -call: senixany(chp) - channel_t *chp; ptr to channel structure -*/ -#define senixany(chp) \ -do { \ - (chp)->r[0x0e] = 0x21; \ - out32((chp)->indexaddr,&(chp)->r[0x0c]); \ -} while (0) - -/*************************************************************************** -function: enparity -purpose: enable parity -call: senparity(chp) - channel_t *chp; ptr to channel structure -comments: function ssetparity() can be used in place of functions senparity(), - sdisparity(), ssetoddparity(), and ssetevenparity(). - -warnings: before enabling parity odd or even parity should be chosen using - functions ssetoddparity() or ssetevenparity(). -*/ -#define senparity(chp) \ -do { \ - (chp)->txcontrol[2] |= parity_en; \ - out32((chp)->indexaddr,(chp)->txcontrol); \ -} while (0) - -/*************************************************************************** -function: senrtstoggle -purpose: enable rts toggle -call: senrtstoggle(chp) - channel_t *chp; ptr to channel structure -comments: this function will disable rts flow control and clear the rts - line to allow operation of rts toggle. -*/ -#define senrtstoggle(chp) \ -do { \ - (chp)->rxcontrol[2] &= ~rtsfc_en; \ - out32((chp)->indexaddr,(chp)->rxcontrol); \ - (chp)->txcontrol[2] |= rtstog_en; \ - (chp)->txcontrol[3] &= ~set_rts; \ - out32((chp)->indexaddr,(chp)->txcontrol); \ - (chp)->rtstoggle = 1; \ -} while (0) - -/*************************************************************************** -function: senrxfifo -purpose: enable rx fifo -call: senrxfifo(chp) - channel_t *chp; ptr to channel structure -*/ -#define senrxfifo(chp) \ -do { \ - (chp)->r[0x32] = 0x08; \ - out32((chp)->indexaddr,&(chp)->r[0x30]); \ -} while (0) - -/*************************************************************************** -function: senrxprocessor -purpose: enable the receive processor -call: senrxprocessor(chp) - channel_t *chp; ptr to channel structure -comments: this function is used to start the receive processor. when - the channel is in the reset state the receive processor is not - running. this is done to prevent the receive processor from - executing invalid microcode instructions prior to the - downloading of the microcode. - -warnings: this function must be called after valid microcode has been - downloaded to the aiop, and it must not be called before the - microcode has been downloaded. -*/ -#define senrxprocessor(chp) \ -do { \ - (chp)->rxcontrol[2] |= rxproc_en; \ - out32((chp)->indexaddr,(chp)->rxcontrol); \ -} while (0) - -/*************************************************************************** -function: senrxstatusmode -purpose: enable the rx status mode -call: senrxstatusmode(chp) - channel_t *chp; ptr to channel structure -comments: this places the channel in the receive status mode. all subsequent - reads of receive data using sreadrxword() will return a data byte - in the low word and a status byte in the high word. - -*/ -#define senrxstatusmode(chp) soutw((chp)->chanstat,statmode) - -/*************************************************************************** -function: sentransmit -purpose: enable transmit -call: sentransmit(chp) - channel_t *chp; ptr to channel structure -*/ -#define sentransmit(chp) \ -do { \ - (chp)->txcontrol[3] |= tx_enable; \ - out32((chp)->indexaddr,(chp)->txcontrol); \ -} while (0) - -/*************************************************************************** -function: sentxsoftflowctl -purpose: enable tx software flow control -call: sentxsoftflowctl(chp) - channel_t *chp; ptr to channel structure -*/ -#define sentxsoftflowctl(chp) \ -do { \ - (chp)->r[0x06] = 0xc5; \ - out32((chp)->indexaddr,&(chp)->r[0x04]); \ -} while (0) - -/*************************************************************************** -function: sgetaiopintstatus -purpose: get the aiop interrupt status -call: sgetaiopintstatus(ctlp,aiopnum) - controller_t *ctlp; ptr to controller structure - int aiopnum; aiop number -return: byte_t: the aiop interrupt status. bits 0 through 7 - represent channels 0 through 7 respectively. if a - bit is set that channel is interrupting. -*/ -#define sgetaiopintstatus(ctlp,aiopnum) sinb((ctlp)->aiopintchanio[aiopnum]) - -/*************************************************************************** -function: sgetaiopnumchan -purpose: get the number of channels supported by an aiop -call: sgetaiopnumchan(ctlp,aiopnum) - controller_t *ctlp; ptr to controller structure - int aiopnum; aiop number -return: int: the number of channels supported by the aiop -*/ -#define sgetaiopnumchan(ctlp,aiopnum) (ctlp)->aiopnumchan[aiopnum] - -/*************************************************************************** -function: sgetchanintid -purpose: get a channel's interrupt identification byte -call: sgetchanintid(chp) - channel_t *chp; ptr to channel structure -return: byte_t: the channel interrupt id. can be any - combination of the following flags: - rxf_trig: rx fifo trigger level interrupt - txfifo_mt: tx fifo empty interrupt - src_int: special receive condition interrupt - delta_cd: cd change interrupt - delta_cts: cts change interrupt - delta_dsr: dsr change interrupt -*/ -#define sgetchanintid(chp) (sinb((chp)->intid) & (rxf_trig | txfifo_mt | src_int | delta_cd | delta_cts | delta_dsr)) - -/*************************************************************************** -function: sgetchannum -purpose: get the number of a channel within an aiop -call: sgetchannum(chp) - channel_t *chp; ptr to channel structure -return: int: channel number within aiop, or nullchan if channel does - not exist. -*/ -#define sgetchannum(chp) (chp)->channum - -/*************************************************************************** -function: sgetchanstatus -purpose: get the channel status -call: sgetchanstatus(chp) - channel_t *chp; ptr to channel structure -return: word_t: the channel status. can be any combination of - the following flags: - low byte flags - cts_act: cts input asserted - dsr_act: dsr input asserted - cd_act: cd input asserted - txfifomt: tx fifo is empty - txshrmt: tx shift register is empty - rda: rx data available - - high byte flags - statmode: status mode enable bit - rxfoverfl: receive fifo overflow - rx2match: receive compare byte 2 match - rx1match: receive compare byte 1 match - rxbreak: received break - rxframe: received framing error - rxparity: received parity error -warnings: this function will clear the high byte flags in the channel - status register. -*/ -#define sgetchanstatus(chp) sinw((chp)->chanstat) - -/*************************************************************************** -function: sgetchanstatuslo -purpose: get the low byte only of the channel status -call: sgetchanstatuslo(chp) - channel_t *chp; ptr to channel structure -return: byte_t: the channel status low byte. can be any combination - of the following flags: - cts_act: cts input asserted - dsr_act: dsr input asserted - cd_act: cd input asserted - txfifomt: tx fifo is empty - txshrmt: tx shift register is empty - rda: rx data available -*/ -#define sgetchanstatuslo(chp) sinb((byteio_t)(chp)->chanstat) - -/********************************************************************** - * get ri status of channel - * defined as a function in rocket.c -aes - */ -#if 0 -#define sgetchanri(chp) ((chp)->ctlp->altchanringindicator ? \ - (sinb((byteio_t)((chp)->chanstat+8)) & dsr_act) : \ - (((chp)->ctlp->boardtype == rocket_type_pc104) ? \ - (!(sinb((chp)->ctlp->aiopio[3]) & sbitmapsettbl[(chp)->channum])) : \ - 0)) -#endif - -/*************************************************************************** -function: sgetcontrollerintstatus -purpose: get the controller interrupt status -call: sgetcontrollerintstatus(ctlp) - controller_t *ctlp; ptr to controller structure -return: byte_t: the controller interrupt status in the lower 4 - bits. bits 0 through 3 represent aiop's 0 - through 3 respectively. if a bit is set that - aiop is interrupting. bits 4 through 7 will - always be cleared. -*/ -#define sgetcontrollerintstatus(ctlp) (sinb((ctlp)->mreg1io) & 0x0f) - -/*************************************************************************** -function: spcigetcontrollerintstatus -purpose: get the controller interrupt status -call: spcigetcontrollerintstatus(ctlp) - controller_t *ctlp; ptr to controller structure -return: unsigned char: the controller interrupt status in the lower 4 - bits and bit 4. bits 0 through 3 represent aiop's 0 - through 3 respectively. bit 4 is set if the int - was generated from periodic. if a bit is set the - aiop is interrupting. -*/ -#define spcigetcontrollerintstatus(ctlp) \ - ((ctlp)->isupci ? \ - (sinw((ctlp)->pciio2) & upci_aiop_intr_bits) : \ - ((sinw((ctlp)->pciio) >> 8) & aiop_intr_bits)) - -/*************************************************************************** - -function: sgetrxcnt -purpose: get the number of data bytes in the rx fifo -call: sgetrxcnt(chp) - channel_t *chp; ptr to channel structure -return: int: the number of data bytes in the rx fifo. -comments: byte read of count register is required to obtain rx count. - -*/ -#define sgetrxcnt(chp) sinw((chp)->txrxcount) - -/*************************************************************************** -function: sgettxcnt -purpose: get the number of data bytes in the tx fifo -call: sgettxcnt(chp) - channel_t *chp; ptr to channel structure -return: byte_t: the number of data bytes in the tx fifo. -comments: byte read of count register is required to obtain tx count. - -*/ -#define sgettxcnt(chp) sinb((byteio_t)(chp)->txrxcount) - -/***************************************************************************** -function: sgettxrxdataio -purpose: get the i/o address of a channel's txrx data register -call: sgettxrxdataio(chp) - channel_t *chp; ptr to channel structure -return: wordio_t: i/o address of a channel's txrx data register -*/ -#define sgettxrxdataio(chp) (chp)->txrxdata - -/*************************************************************************** -function: sinitchandefaults -purpose: initialize a channel structure to it's default state. -call: sinitchandefaults(chp) - channel_t *chp; ptr to the channel structure -comments: this function must be called once for every channel structure - that exists before any other ssci calls can be made. - -*/ -#define sinitchandefaults(chp) \ -do { \ - (chp)->ctlp = nullctlptr; \ - (chp)->aiopnum = nullaiop; \ - (chp)->chanid = aiopid_null; \ - (chp)->channum = nullchan; \ -} while (0) - -/*************************************************************************** -function: sresetaiopbynum -purpose: reset the aiop by number -call: sresetaiopbynum(ctlp,aiopnum) - controller_t ctlp; ptr to controller structure - aiopnum; aiop index -*/ -#define sresetaiopbynum(ctlp,aiopnum) \ -do { \ - soutb((ctlp)->aiopio[(aiopnum)]+_cmd_reg,reset_all); \ - soutb((ctlp)->aiopio[(aiopnum)]+_cmd_reg,0x0); \ -} while (0) - -/*************************************************************************** -function: ssendbreak -purpose: send a transmit break signal -call: ssendbreak(chp) - channel_t *chp; ptr to channel structure -*/ -#define ssendbreak(chp) \ -do { \ - (chp)->txcontrol[3] |= setbreak; \ - out32((chp)->indexaddr,(chp)->txcontrol); \ -} while (0) - -/*************************************************************************** -function: ssetbaud -purpose: set baud rate -call: ssetbaud(chp,divisor) - channel_t *chp; ptr to channel structure - word_t divisor; 16 bit baud rate divisor for channel -*/ -#define ssetbaud(chp,divisor) \ -do { \ - (chp)->bauddiv[2] = (byte_t)(divisor); \ - (chp)->bauddiv[3] = (byte_t)((divisor) >> 8); \ - out32((chp)->indexaddr,(chp)->bauddiv); \ -} while (0) - -/*************************************************************************** -function: ssetdata7 -purpose: set data bits to 7 -call: ssetdata7(chp) - channel_t *chp; ptr to channel structure -*/ -#define ssetdata7(chp) \ -do { \ - (chp)->txcontrol[2] &= ~data8bit; \ - out32((chp)->indexaddr,(chp)->txcontrol); \ -} while (0) - -/*************************************************************************** -function: ssetdata8 -purpose: set data bits to 8 -call: ssetdata8(chp) - channel_t *chp; ptr to channel structure -*/ -#define ssetdata8(chp) \ -do { \ - (chp)->txcontrol[2] |= data8bit; \ - out32((chp)->indexaddr,(chp)->txcontrol); \ -} while (0) - -/*************************************************************************** -function: ssetdtr -purpose: set the dtr output -call: ssetdtr(chp) - channel_t *chp; ptr to channel structure -*/ -#define ssetdtr(chp) \ -do { \ - (chp)->txcontrol[3] |= set_dtr; \ - out32((chp)->indexaddr,(chp)->txcontrol); \ -} while (0) - -/*************************************************************************** -function: ssetevenparity -purpose: set even parity -call: ssetevenparity(chp) - channel_t *chp; ptr to channel structure -comments: function ssetparity() can be used in place of functions senparity(), - sdisparity(), ssetoddparity(), and ssetevenparity(). - -warnings: this function has no effect unless parity is enabled with function - senparity(). -*/ -#define ssetevenparity(chp) \ -do { \ - (chp)->txcontrol[2] |= even_par; \ - out32((chp)->indexaddr,(chp)->txcontrol); \ -} while (0) - -/*************************************************************************** -function: ssetoddparity -purpose: set odd parity -call: ssetoddparity(chp) - channel_t *chp; ptr to channel structure -comments: function ssetparity() can be used in place of functions senparity(), - sdisparity(), ssetoddparity(), and ssetevenparity(). - -warnings: this function has no effect unless parity is enabled with function - senparity(). -*/ -#define ssetoddparity(chp) \ -do { \ - (chp)->txcontrol[2] &= ~even_par; \ - out32((chp)->indexaddr,(chp)->txcontrol); \ -} while (0) - -/*************************************************************************** -function: ssetrts -purpose: set the rts output -call: ssetrts(chp) - channel_t *chp; ptr to channel structure -*/ -#define ssetrts(chp) \ -do { \ - if ((chp)->rtstoggle) break; \ - (chp)->txcontrol[3] |= set_rts; \ - out32((chp)->indexaddr,(chp)->txcontrol); \ -} while (0) - -/*************************************************************************** -function: ssetrxtrigger -purpose: set the rx fifo trigger level -call: ssetrxprocessor(chp,level) - channel_t *chp; ptr to channel structure - byte_t level; number of characters in rx fifo at which the - interrupt will be generated. can be any of the following flags: - - trig_no: no trigger - trig_1: 1 character in fifo - trig_1_2: fifo 1/2 full - trig_7_8: fifo 7/8 full -comments: an interrupt will be generated when the trigger level is reached - only if function seninterrupt() has been called with flag - rxint_en set. the rxf_trig flag in the interrupt idenfification - register will be set whenever the trigger level is reached - regardless of the setting of rxint_en. - -*/ -#define ssetrxtrigger(chp,level) \ -do { \ - (chp)->rxcontrol[2] &= ~trig_mask; \ - (chp)->rxcontrol[2] |= level; \ - out32((chp)->indexaddr,(chp)->rxcontrol); \ -} while (0) - -/*************************************************************************** -function: ssetstop1 -purpose: set stop bits to 1 -call: ssetstop1(chp) - channel_t *chp; ptr to channel structure -*/ -#define ssetstop1(chp) \ -do { \ - (chp)->txcontrol[2] &= ~stop2; \ - out32((chp)->indexaddr,(chp)->txcontrol); \ -} while (0) - -/*************************************************************************** -function: ssetstop2 -purpose: set stop bits to 2 -call: ssetstop2(chp) - channel_t *chp; ptr to channel structure -*/ -#define ssetstop2(chp) \ -do { \ - (chp)->txcontrol[2] |= stop2; \ - out32((chp)->indexaddr,(chp)->txcontrol); \ -} while (0) - -/*************************************************************************** -function: ssettxxoffchar -purpose: set the tx xoff flow control character -call: ssettxxoffchar(chp,ch) - channel_t *chp; ptr to channel structure - byte_t ch; the value to set the tx xoff character to -*/ -#define ssettxxoffchar(chp,ch) \ -do { \ - (chp)->r[0x07] = (ch); \ - out32((chp)->indexaddr,&(chp)->r[0x04]); \ -} while (0) - -/*************************************************************************** -function: ssettxxonchar -purpose: set the tx xon flow control character -call: ssettxxonchar(chp,ch) - channel_t *chp; ptr to channel structure - byte_t ch; the value to set the tx xon character to -*/ -#define ssettxxonchar(chp,ch) \ -do { \ - (chp)->r[0x0b] = (ch); \ - out32((chp)->indexaddr,&(chp)->r[0x08]); \ -} while (0) - -/*************************************************************************** -function: sstartrxprocessor -purpose: start a channel's receive processor -call: sstartrxprocessor(chp) - channel_t *chp; ptr to channel structure -comments: this function is used to start a rx processor after it was - stopped with sstoprxprocessor() or sstopswinflowctl(). it - will restart both the rx processor and software input flow control. - -*/ -#define sstartrxprocessor(chp) out32((chp)->indexaddr,&(chp)->r[0]) - -/*************************************************************************** -function: swritetxbyte -purpose: write a transmit data byte to a channel. - byteio_t io: channel transmit register i/o address. this can - be obtained with sgettxrxdataio(). - byte_t data; the transmit data byte. -warnings: this function writes the data byte without checking to see if - smaxtxsize is exceeded in the tx fifo. -*/ -#define swritetxbyte(io,data) soutb(io,data) - -/* - * begin linux specific definitions for the rocketport driver - * - * this code is copyright theodore ts'o, 1995-1997 - */ - -struct r_port { - int magic; - struct tty_port port; - int line; - int flags; /* don't yet match the asy_ flags!! */ - unsigned int board:3; - unsigned int aiop:2; - unsigned int chan:3; - controller_t *ctlp; - channel_t channel; - int intmask; - int xmit_fifo_room; /* room in xmit fifo */ - unsigned char *xmit_buf; - int xmit_head; - int xmit_tail; - int xmit_cnt; - int cd_status; - int ignore_status_mask; - int read_status_mask; - int cps; - - spinlock_t slock; - struct mutex write_mtx; -}; - -#define rport_magic 0x525001 - -#define num_boards 8 -#define max_rp_ports (32*num_boards) - -/* - * the size of the xmit buffer is 1 page, or 4096 bytes - */ -#define xmit_buf_size 4096 - -/* number of characters left in xmit buffer before we ask for more */ -#define wakeup_chars 256 - -/* - * assigned major numbers for the comtrol rocketport - */ -#define tty_rocket_major 46 -#define cua_rocket_major 47 - -#ifdef pci_vendor_id_rp -#undef pci_vendor_id_rp -#undef pci_device_id_rp8octa -#undef pci_device_id_rp8intf -#undef pci_device_id_rp16intf -#undef pci_device_id_rp32intf -#undef pci_device_id_urp8octa -#undef pci_device_id_urp8intf -#undef pci_device_id_urp16intf -#undef pci_device_id_crp16intf -#undef pci_device_id_urp32intf -#endif - -/* comtrol pci vendor id */ -#define pci_vendor_id_rp 0x11fe - -/* comtrol device id's */ -#define pci_device_id_rp32intf 0x0001 /* rocketport 32 port w/external i/f */ -#define pci_device_id_rp8intf 0x0002 /* rocketport 8 port w/external i/f */ -#define pci_device_id_rp16intf 0x0003 /* rocketport 16 port w/external i/f */ -#define pci_device_id_rp4quad 0x0004 /* rocketport 4 port w/quad cable */ -#define pci_device_id_rp8octa 0x0005 /* rocketport 8 port w/octa cable */ -#define pci_device_id_rp8j 0x0006 /* rocketport 8 port w/rj11 connectors */ -#define pci_device_id_rp4j 0x0007 /* rocketport 4 port w/rj11 connectors */ -#define pci_device_id_rp8sni 0x0008 /* rocketport 8 port w/ db78 sni (siemens) connector */ -#define pci_device_id_rp16sni 0x0009 /* rocketport 16 port w/ db78 sni (siemens) connector */ -#define pci_device_id_rpp4 0x000a /* rocketport plus 4 port */ -#define pci_device_id_rpp8 0x000b /* rocketport plus 8 port */ -#define pci_device_id_rp6m 0x000c /* rocketmodem 6 port */ -#define pci_device_id_rp4m 0x000d /* rocketmodem 4 port */ -#define pci_device_id_rp2_232 0x000e /* rocketport plus 2 port rs232 */ -#define pci_device_id_rp2_422 0x000f /* rocketport plus 2 port rs422 */ - -/* universal pci boards */ -#define pci_device_id_urp32intf 0x0801 /* rocketport upci 32 port w/external i/f */ -#define pci_device_id_urp8intf 0x0802 /* rocketport upci 8 port w/external i/f */ -#define pci_device_id_urp16intf 0x0803 /* rocketport upci 16 port w/external i/f */ -#define pci_device_id_urp8octa 0x0805 /* rocketport upci 8 port w/octa cable */ -#define pci_device_id_upci_rm3_8port 0x080c /* rocketmodem iii 8 port */ -#define pci_device_id_upci_rm3_4port 0x080d /* rocketmodem iii 4 port */ - -/* compact pci device */ -#define pci_device_id_crp16intf 0x0903 /* rocketport compact pci 16 port w/external i/f */ - diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h -#define pci_device_id_rp32intf 0x0001 -#define pci_device_id_rp8intf 0x0002 -#define pci_device_id_rp16intf 0x0003 -#define pci_device_id_rp4quad 0x0004 -#define pci_device_id_rp8octa 0x0005 -#define pci_device_id_rp8j 0x0006 -#define pci_device_id_rp4j 0x0007 -#define pci_device_id_rp8sni 0x0008 -#define pci_device_id_rp16sni 0x0009 -#define pci_device_id_rpp4 0x000a -#define pci_device_id_rpp8 0x000b -#define pci_device_id_rp4m 0x000d -#define pci_device_id_rp2_232 0x000e -#define pci_device_id_rp2_422 0x000f -#define pci_device_id_urp32intf 0x0801 -#define pci_device_id_urp8intf 0x0802 -#define pci_device_id_urp16intf 0x0803 -#define pci_device_id_urp8octa 0x0805 -#define pci_device_id_upci_rm3_8port 0x080c -#define pci_device_id_upci_rm3_4port 0x080d -#define pci_device_id_crp16intf 0x0903
Serial
3b00b6af7a5bd7fd7e5189ccaad0e0cfb7dc7785
jiri slaby
drivers
tty
it_it, process, serial, zh_cn
cpufreq: cppc: add support for frequency invariance
the frequency invariance engine (fie) is providing a frequency scaling correction factor that helps achieve more accurate load-tracking.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for frequency invariance
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['cppc']
['h', 'c', 'arm']
4
245
12
--- diff --git a/drivers/cpufreq/kconfig.arm b/drivers/cpufreq/kconfig.arm --- a/drivers/cpufreq/kconfig.arm +++ b/drivers/cpufreq/kconfig.arm +config acpi_cppc_cpufreq_fie + bool "frequency invariance support for cppc cpufreq driver" + depends on acpi_cppc_cpufreq && generic_arch_topology + default y + help + this extends frequency invariance support in the cppc cpufreq driver, + by using cppc delivered and reference performance counters. + + if in doubt, say n. + diff --git a/drivers/cpufreq/cppc_cpufreq.c b/drivers/cpufreq/cppc_cpufreq.c --- a/drivers/cpufreq/cppc_cpufreq.c +++ b/drivers/cpufreq/cppc_cpufreq.c +#include <linux/arch_topology.h> +#include <linux/irq_work.h> +#include <linux/kthread.h> +#include <uapi/linux/sched/types.h> +#ifdef config_acpi_cppc_cpufreq_fie + +/* frequency invariance support */ +struct cppc_freq_invariance { + int cpu; + struct irq_work irq_work; + struct kthread_work work; + struct cppc_perf_fb_ctrs prev_perf_fb_ctrs; + struct cppc_cpudata *cpu_data; +}; + +static define_per_cpu(struct cppc_freq_invariance, cppc_freq_inv); +static struct kthread_worker *kworker_fie; +static bool fie_disabled; + +static struct cpufreq_driver cppc_cpufreq_driver; +static unsigned int hisi_cppc_cpufreq_get_rate(unsigned int cpu); +static int cppc_perf_from_fbctrs(struct cppc_cpudata *cpu_data, + struct cppc_perf_fb_ctrs fb_ctrs_t0, + struct cppc_perf_fb_ctrs fb_ctrs_t1); + +/** + * cppc_scale_freq_workfn - cppc arch_freq_scale updater for frequency invariance + * @work: the work item. + * + * the cppc driver register itself with the topology core to provide its own + * implementation (cppc_scale_freq_tick()) of topology_scale_freq_tick() which + * gets called by the scheduler on every tick. + * + * note that the arch specific counters have higher priority than cppc counters, + * if available, though the cppc driver doesn't need to have any special + * handling for that. + * + * on an invocation of cppc_scale_freq_tick(), we schedule an irq work (since we + * reach here from hard-irq context), which then schedules a normal work item + * and cppc_scale_freq_workfn() updates the per_cpu arch_freq_scale variable + * based on the counter updates since the last tick. + */ +static void cppc_scale_freq_workfn(struct kthread_work *work) +{ + struct cppc_freq_invariance *cppc_fi; + struct cppc_perf_fb_ctrs fb_ctrs = {0}; + struct cppc_cpudata *cpu_data; + unsigned long local_freq_scale; + u64 perf; + + cppc_fi = container_of(work, struct cppc_freq_invariance, work); + cpu_data = cppc_fi->cpu_data; + + if (cppc_get_perf_ctrs(cppc_fi->cpu, &fb_ctrs)) { + pr_warn("%s: failed to read perf counters ", __func__); + return; + } + + cppc_fi->prev_perf_fb_ctrs = fb_ctrs; + perf = cppc_perf_from_fbctrs(cpu_data, cppc_fi->prev_perf_fb_ctrs, + fb_ctrs); + + perf <<= sched_capacity_shift; + local_freq_scale = div64_u64(perf, cpu_data->perf_caps.highest_perf); + if (warn_on(local_freq_scale > 1024)) + local_freq_scale = 1024; + + per_cpu(arch_freq_scale, cppc_fi->cpu) = local_freq_scale; +} + +static void cppc_irq_work(struct irq_work *irq_work) +{ + struct cppc_freq_invariance *cppc_fi; + + cppc_fi = container_of(irq_work, struct cppc_freq_invariance, irq_work); + kthread_queue_work(kworker_fie, &cppc_fi->work); +} + +static void cppc_scale_freq_tick(void) +{ + struct cppc_freq_invariance *cppc_fi = &per_cpu(cppc_freq_inv, smp_processor_id()); + + /* + * cppc_get_perf_ctrs() can potentially sleep, call that from the right + * context. + */ + irq_work_queue(&cppc_fi->irq_work); +} + +static struct scale_freq_data cppc_sftd = { + .source = scale_freq_source_cppc, + .set_freq_scale = cppc_scale_freq_tick, +}; + +static void cppc_freq_invariance_policy_init(struct cpufreq_policy *policy, + struct cppc_cpudata *cpu_data) +{ + struct cppc_perf_fb_ctrs fb_ctrs = {0}; + struct cppc_freq_invariance *cppc_fi; + int i, ret; + + if (cppc_cpufreq_driver.get == hisi_cppc_cpufreq_get_rate) + return; + + if (fie_disabled) + return; + + for_each_cpu(i, policy->cpus) { + cppc_fi = &per_cpu(cppc_freq_inv, i); + cppc_fi->cpu = i; + cppc_fi->cpu_data = cpu_data; + kthread_init_work(&cppc_fi->work, cppc_scale_freq_workfn); + init_irq_work(&cppc_fi->irq_work, cppc_irq_work); + + ret = cppc_get_perf_ctrs(i, &fb_ctrs); + if (ret) { + pr_warn("%s: failed to read perf counters: %d ", + __func__, ret); + fie_disabled = true; + } else { + cppc_fi->prev_perf_fb_ctrs = fb_ctrs; + } + } +} + +static void __init cppc_freq_invariance_init(void) +{ + struct sched_attr attr = { + .size = sizeof(struct sched_attr), + .sched_policy = sched_deadline, + .sched_nice = 0, + .sched_priority = 0, + /* + * fake (unused) bandwidth; workaround to "fix" + * priority inheritance. + */ + .sched_runtime = 1000000, + .sched_deadline = 10000000, + .sched_period = 10000000, + }; + int ret; + + if (cppc_cpufreq_driver.get == hisi_cppc_cpufreq_get_rate) + return; + + if (fie_disabled) + return; + + kworker_fie = kthread_create_worker(0, "cppc_fie"); + if (is_err(kworker_fie)) + return; + + ret = sched_setattr_nocheck(kworker_fie->task, &attr); + if (ret) { + pr_warn("%s: failed to set sched_deadline: %d ", __func__, + ret); + kthread_destroy_worker(kworker_fie); + return; + } + + /* register for freq-invariance */ + topology_set_scale_freq_source(&cppc_sftd, cpu_present_mask); +} + +static void cppc_freq_invariance_exit(void) +{ + struct cppc_freq_invariance *cppc_fi; + int i; + + if (cppc_cpufreq_driver.get == hisi_cppc_cpufreq_get_rate) + return; + + if (fie_disabled) + return; + + topology_clear_scale_freq_source(scale_freq_source_cppc, cpu_present_mask); + + for_each_possible_cpu(i) { + cppc_fi = &per_cpu(cppc_freq_inv, i); + irq_work_sync(&cppc_fi->irq_work); + } + + kthread_destroy_worker(kworker_fie); + kworker_fie = null; +} + +#else +static inline void +cppc_freq_invariance_policy_init(struct cpufreq_policy *policy, + struct cppc_cpudata *cpu_data) +{ +} + +static inline void cppc_freq_invariance_init(void) +{ +} + +static inline void cppc_freq_invariance_exit(void) +{ +} +#endif /* config_acpi_cppc_cpufreq_fie */ + - if (ret) + if (ret) { + } else { + cppc_freq_invariance_policy_init(policy, cpu_data); + } -static int cppc_get_rate_from_fbctrs(struct cppc_cpudata *cpu_data, - struct cppc_perf_fb_ctrs fb_ctrs_t0, - struct cppc_perf_fb_ctrs fb_ctrs_t1) +static int cppc_perf_from_fbctrs(struct cppc_cpudata *cpu_data, + struct cppc_perf_fb_ctrs fb_ctrs_t0, + struct cppc_perf_fb_ctrs fb_ctrs_t1) - u64 reference_perf, delivered_perf; + u64 reference_perf; - /* check to avoid divide-by zero */ - if (delta_reference || delta_delivered) - delivered_perf = (reference_perf * delta_delivered) / - delta_reference; - else - delivered_perf = cpu_data->perf_ctrls.desired_perf; + /* check to avoid divide-by zero and invalid delivered_perf */ + if (!delta_reference || !delta_delivered) + return cpu_data->perf_ctrls.desired_perf; + + return (reference_perf * delta_delivered) / delta_reference; +} + +static int cppc_get_rate_from_fbctrs(struct cppc_cpudata *cpu_data, + struct cppc_perf_fb_ctrs fb_ctrs_t0, + struct cppc_perf_fb_ctrs fb_ctrs_t1) +{ + u64 delivered_perf; + + delivered_perf = cppc_perf_from_fbctrs(cpu_data, fb_ctrs_t0, + fb_ctrs_t1); + int ret; + - return cpufreq_register_driver(&cppc_cpufreq_driver); + ret = cpufreq_register_driver(&cppc_cpufreq_driver); + if (!ret) + cppc_freq_invariance_init(); + + return ret; + cppc_freq_invariance_exit(); diff --git a/include/linux/arch_topology.h b/include/linux/arch_topology.h --- a/include/linux/arch_topology.h +++ b/include/linux/arch_topology.h + scale_freq_source_cppc, diff --git a/kernel/sched/core.c b/kernel/sched/core.c --- a/kernel/sched/core.c +++ b/kernel/sched/core.c +export_symbol_gpl(sched_setattr_nocheck);
CPU Frequency scaling
4c38f2df71c8e33c0b64865992d693f5022eeaad
viresh kumar
kernel
sched
power: supply: add ac driver for surface aggregator module
on newer microsoft surface models (specifically 7th-generation, i.e. surface pro 7, surface book 3, surface laptop 3, and surface laptop go), battery and ac status/information is no longer handled via standard acpi devices, but instead directly via the surface system aggregator module (ssam), i.e. the embedded controller on those devices.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add ac driver for surface aggregator module
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['supply']
['kconfig', 'maintainers', 'c', 'makefile']
4
300
0
--- diff --git a/maintainers b/maintainers --- a/maintainers +++ b/maintainers +f: drivers/power/supply/surface_charger.c diff --git a/drivers/power/supply/kconfig b/drivers/power/supply/kconfig --- a/drivers/power/supply/kconfig +++ b/drivers/power/supply/kconfig +config charger_surface + tristate "ac driver for 7th-generation microsoft surface devices" + depends on surface_aggregator_registry + help + driver for ac devices connected via/managed by the surface system + aggregator module (ssam). + + this driver provides ac-information and -status support for surface + devices where said data is not exposed via the standard acpi devices. + on those models (7th-generation), ac-information is instead handled + directly via a ssam client device and this driver. + + say m or y here to include ac status support for 7th-generation + microsoft surface devices, i.e. surface pro 7, surface laptop 3, + surface book 3, and surface laptop go. + diff --git a/drivers/power/supply/makefile b/drivers/power/supply/makefile --- a/drivers/power/supply/makefile +++ b/drivers/power/supply/makefile +obj-$(config_charger_surface) += surface_charger.o diff --git a/drivers/power/supply/surface_charger.c b/drivers/power/supply/surface_charger.c --- /dev/null +++ b/drivers/power/supply/surface_charger.c +// spdx-license-identifier: gpl-2.0+ +/* + * ac driver for 7th-generation microsoft surface devices via surface system + * aggregator module (ssam). + * + * copyright (c) 2019-2021 maximilian luz <luzmaximilian@gmail.com> + */ + +#include <asm/unaligned.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/mutex.h> +#include <linux/power_supply.h> +#include <linux/types.h> + +#include <linux/surface_aggregator/device.h> + + +/* -- sam interface. -------------------------------------------------------- */ + +enum sam_event_cid_bat { + sam_event_cid_bat_adp = 0x17, +}; + +enum sam_battery_sta { + sam_battery_sta_ok = 0x0f, + sam_battery_sta_present = 0x10, +}; + +/* get battery status (_sta). */ +ssam_define_sync_request_cl_r(ssam_bat_get_sta, __le32, { + .target_category = ssam_ssh_tc_bat, + .command_id = 0x01, +}); + +/* get platform power source for battery (_psr / dptf psrc). */ +ssam_define_sync_request_cl_r(ssam_bat_get_psrc, __le32, { + .target_category = ssam_ssh_tc_bat, + .command_id = 0x0d, +}); + + +/* -- device structures. ---------------------------------------------------- */ + +struct spwr_psy_properties { + const char *name; + struct ssam_event_registry registry; +}; + +struct spwr_ac_device { + struct ssam_device *sdev; + + char name[32]; + struct power_supply *psy; + struct power_supply_desc psy_desc; + + struct ssam_event_notifier notif; + + struct mutex lock; /* guards access to state below. */ + + __le32 state; +}; + + +/* -- state management. ----------------------------------------------------- */ + +static int spwr_ac_update_unlocked(struct spwr_ac_device *ac) +{ + u32 old = ac->state; + int status; + + lockdep_assert_held(&ac->lock); + + status = ssam_retry(ssam_bat_get_psrc, ac->sdev, &ac->state); + if (status < 0) + return status; + + return old != ac->state; +} + +static int spwr_ac_update(struct spwr_ac_device *ac) +{ + int status; + + mutex_lock(&ac->lock); + status = spwr_ac_update_unlocked(ac); + mutex_unlock(&ac->lock); + + return status; +} + +static int spwr_ac_recheck(struct spwr_ac_device *ac) +{ + int status; + + status = spwr_ac_update(ac); + if (status > 0) + power_supply_changed(ac->psy); + + return status >= 0 ? 0 : status; +} + +static u32 spwr_notify_ac(struct ssam_event_notifier *nf, const struct ssam_event *event) +{ + struct spwr_ac_device *ac; + int status; + + ac = container_of(nf, struct spwr_ac_device, notif); + + dev_dbg(&ac->sdev->dev, "power event (cid = %#04x, iid = %#04x, tid = %#04x) ", + event->command_id, event->instance_id, event->target_id); + + /* + * allow events of all targets/instances here. global adapter status + * seems to be handled via target=1 and instance=1, but events are + * reported on all targets/instances in use. + * + * while it should be enough to just listen on 1/1, listen everywhere to + * make sure we don't miss anything. + */ + + switch (event->command_id) { + case sam_event_cid_bat_adp: + status = spwr_ac_recheck(ac); + return ssam_notifier_from_errno(status) | ssam_notif_handled; + + default: + return 0; + } +} + + +/* -- properties. ----------------------------------------------------------- */ + +static const enum power_supply_property spwr_ac_props[] = { + power_supply_prop_online, +}; + +static int spwr_ac_get_property(struct power_supply *psy, enum power_supply_property psp, + union power_supply_propval *val) +{ + struct spwr_ac_device *ac = power_supply_get_drvdata(psy); + int status; + + mutex_lock(&ac->lock); + + status = spwr_ac_update_unlocked(ac); + if (status) + goto out; + + switch (psp) { + case power_supply_prop_online: + val->intval = !!le32_to_cpu(ac->state); + break; + + default: + status = -einval; + goto out; + } + +out: + mutex_unlock(&ac->lock); + return status; +} + + +/* -- device setup. --------------------------------------------------------- */ + +static char *battery_supplied_to[] = { + "bat1", + "bat2", +}; + +static void spwr_ac_init(struct spwr_ac_device *ac, struct ssam_device *sdev, + struct ssam_event_registry registry, const char *name) +{ + mutex_init(&ac->lock); + strncpy(ac->name, name, array_size(ac->name) - 1); + + ac->sdev = sdev; + + ac->notif.base.priority = 1; + ac->notif.base.fn = spwr_notify_ac; + ac->notif.event.reg = registry; + ac->notif.event.id.target_category = sdev->uid.category; + ac->notif.event.id.instance = 0; + ac->notif.event.mask = ssam_event_mask_none; + ac->notif.event.flags = ssam_event_sequenced; + + ac->psy_desc.name = ac->name; + ac->psy_desc.type = power_supply_type_mains; + ac->psy_desc.properties = spwr_ac_props; + ac->psy_desc.num_properties = array_size(spwr_ac_props); + ac->psy_desc.get_property = spwr_ac_get_property; +} + +static int spwr_ac_register(struct spwr_ac_device *ac) +{ + struct power_supply_config psy_cfg = {}; + __le32 sta; + int status; + + /* make sure the device is there and functioning properly. */ + status = ssam_retry(ssam_bat_get_sta, ac->sdev, &sta); + if (status) + return status; + + if ((le32_to_cpu(sta) & sam_battery_sta_ok) != sam_battery_sta_ok) + return -enodev; + + psy_cfg.drv_data = ac; + psy_cfg.supplied_to = battery_supplied_to; + psy_cfg.num_supplicants = array_size(battery_supplied_to); + + ac->psy = devm_power_supply_register(&ac->sdev->dev, &ac->psy_desc, &psy_cfg); + if (is_err(ac->psy)) + return ptr_err(ac->psy); + + return ssam_notifier_register(ac->sdev->ctrl, &ac->notif); +} + + +/* -- driver setup. --------------------------------------------------------- */ + +static int __maybe_unused surface_ac_resume(struct device *dev) +{ + return spwr_ac_recheck(dev_get_drvdata(dev)); +} +simple_dev_pm_ops(surface_ac_pm_ops, null, surface_ac_resume); + +static int surface_ac_probe(struct ssam_device *sdev) +{ + const struct spwr_psy_properties *p; + struct spwr_ac_device *ac; + + p = ssam_device_get_match_data(sdev); + if (!p) + return -enodev; + + ac = devm_kzalloc(&sdev->dev, sizeof(*ac), gfp_kernel); + if (!ac) + return -enomem; + + spwr_ac_init(ac, sdev, p->registry, p->name); + ssam_device_set_drvdata(sdev, ac); + + return spwr_ac_register(ac); +} + +static void surface_ac_remove(struct ssam_device *sdev) +{ + struct spwr_ac_device *ac = ssam_device_get_drvdata(sdev); + + ssam_notifier_unregister(sdev->ctrl, &ac->notif); +} + +static const struct spwr_psy_properties spwr_psy_props_adp1 = { + .name = "adp1", + .registry = ssam_event_registry_sam, +}; + +static const struct ssam_device_id surface_ac_match[] = { + { ssam_sdev(bat, 0x01, 0x01, 0x01), (unsigned long)&spwr_psy_props_adp1 }, + { }, +}; +module_device_table(ssam, surface_ac_match); + +static struct ssam_device_driver surface_ac_driver = { + .probe = surface_ac_probe, + .remove = surface_ac_remove, + .match_table = surface_ac_match, + .driver = { + .name = "surface_ac", + .pm = &surface_ac_pm_ops, + .probe_type = probe_prefer_asynchronous, + }, +}; +module_ssam_device_driver(surface_ac_driver); + +module_author("maximilian luz <luzmaximilian@gmail.com>"); +module_description("ac driver for surface system aggregator module"); +module_license("gpl");
Voltage, current regulators, power capping, power supply
e61ffb344591fca443be4fc633290cbf15ee3298
maximilian luz
drivers
power
supply
power: supply: add battery driver for surface aggregator module
on newer microsoft surface models (specifically 7th-generation, i.e. surface pro 7, surface book 3, surface laptop 3, and surface laptop go), battery and ac status/information is no longer handled via standard acpi devices, but instead directly via the surface system aggregator module (ssam), i.e. the embedded controller on those devices.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add battery driver for surface aggregator module
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['supply']
['c', 'kconfig', 'maintainers', 'sysfs-class-power-surface', 'makefile']
5
904
0
--- diff --git a/documentation/abi/testing/sysfs-class-power-surface b/documentation/abi/testing/sysfs-class-power-surface --- /dev/null +++ b/documentation/abi/testing/sysfs-class-power-surface +what: /sys/class/power_supply/<supply_name>/alarm +date: april 2021 +kernelversion: 5.13 +contact: maximilian luz <luzmaximilian@gmail.com> +description: + battery trip point. when the remaining battery capacity crosses this + value in either direction, the system will be notified and if + necessary woken. + + set to zero to clear/disable. + + access: read, write + + valid values: in micro-wh or micro-ah, depending on the power unit + of the battery diff --git a/maintainers b/maintainers --- a/maintainers +++ b/maintainers +microsoft surface battery and ac drivers +m: maximilian luz <luzmaximilian@gmail.com> +l: linux-pm@vger.kernel.org +l: platform-driver-x86@vger.kernel.org +s: maintained +f: drivers/power/supply/surface_battery.c + diff --git a/drivers/power/supply/kconfig b/drivers/power/supply/kconfig --- a/drivers/power/supply/kconfig +++ b/drivers/power/supply/kconfig +config battery_surface + tristate "battery driver for 7th-generation microsoft surface devices" + depends on surface_aggregator_registry + help + driver for battery devices connected via/managed by the surface system + aggregator module (ssam). + + this driver provides battery-information and -status support for + surface devices where said data is not exposed via the standard acpi + devices. on those models (7th-generation), battery-information is + instead handled directly via ssam client devices and this driver. + + say m or y here to include battery status support for 7th-generation + microsoft surface devices, i.e. surface pro 7, surface laptop 3, + surface book 3, and surface laptop go. + diff --git a/drivers/power/supply/makefile b/drivers/power/supply/makefile --- a/drivers/power/supply/makefile +++ b/drivers/power/supply/makefile +obj-$(config_battery_surface) += surface_battery.o diff --git a/drivers/power/supply/surface_battery.c b/drivers/power/supply/surface_battery.c --- /dev/null +++ b/drivers/power/supply/surface_battery.c +// spdx-license-identifier: gpl-2.0+ +/* + * battery driver for 7th-generation microsoft surface devices via surface + * system aggregator module (ssam). + * + * copyright (c) 2019-2021 maximilian luz <luzmaximilian@gmail.com> + */ + +#include <asm/unaligned.h> +#include <linux/jiffies.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/mutex.h> +#include <linux/power_supply.h> +#include <linux/sysfs.h> +#include <linux/types.h> +#include <linux/workqueue.h> + +#include <linux/surface_aggregator/device.h> + + +/* -- sam interface. -------------------------------------------------------- */ + +enum sam_event_cid_bat { + sam_event_cid_bat_bix = 0x15, + sam_event_cid_bat_bst = 0x16, + sam_event_cid_bat_adp = 0x17, + sam_event_cid_bat_prot = 0x18, + sam_event_cid_bat_dptf = 0x53, +}; + +enum sam_battery_sta { + sam_battery_sta_ok = 0x0f, + sam_battery_sta_present = 0x10, +}; + +enum sam_battery_state { + sam_battery_state_discharging = bit(0), + sam_battery_state_charging = bit(1), + sam_battery_state_critical = bit(2), +}; + +enum sam_battery_power_unit { + sam_battery_power_unit_mw = 0, + sam_battery_power_unit_ma = 1, +}; + +/* equivalent to data returned in acpi _bix method, revision 0. */ +struct spwr_bix { + u8 revision; + __le32 power_unit; + __le32 design_cap; + __le32 last_full_charge_cap; + __le32 technology; + __le32 design_voltage; + __le32 design_cap_warn; + __le32 design_cap_low; + __le32 cycle_count; + __le32 measurement_accuracy; + __le32 max_sampling_time; + __le32 min_sampling_time; + __le32 max_avg_interval; + __le32 min_avg_interval; + __le32 bat_cap_granularity_1; + __le32 bat_cap_granularity_2; + __u8 model[21]; + __u8 serial[11]; + __u8 type[5]; + __u8 oem_info[21]; +} __packed; + +static_assert(sizeof(struct spwr_bix) == 119); + +/* equivalent to data returned in acpi _bst method. */ +struct spwr_bst { + __le32 state; + __le32 present_rate; + __le32 remaining_cap; + __le32 present_voltage; +} __packed; + +static_assert(sizeof(struct spwr_bst) == 16); + +#define spwr_bix_revision 0 +#define spwr_battery_value_unknown 0xffffffff + +/* get battery status (_sta) */ +ssam_define_sync_request_cl_r(ssam_bat_get_sta, __le32, { + .target_category = ssam_ssh_tc_bat, + .command_id = 0x01, +}); + +/* get battery static information (_bix). */ +ssam_define_sync_request_cl_r(ssam_bat_get_bix, struct spwr_bix, { + .target_category = ssam_ssh_tc_bat, + .command_id = 0x02, +}); + +/* get battery dynamic information (_bst). */ +ssam_define_sync_request_cl_r(ssam_bat_get_bst, struct spwr_bst, { + .target_category = ssam_ssh_tc_bat, + .command_id = 0x03, +}); + +/* set battery trip point (_btp). */ +ssam_define_sync_request_cl_w(ssam_bat_set_btp, __le32, { + .target_category = ssam_ssh_tc_bat, + .command_id = 0x04, +}); + + +/* -- device structures. ---------------------------------------------------- */ + +struct spwr_psy_properties { + const char *name; + struct ssam_event_registry registry; +}; + +struct spwr_battery_device { + struct ssam_device *sdev; + + char name[32]; + struct power_supply *psy; + struct power_supply_desc psy_desc; + + struct delayed_work update_work; + + struct ssam_event_notifier notif; + + struct mutex lock; /* guards access to state data below. */ + unsigned long timestamp; + + __le32 sta; + struct spwr_bix bix; + struct spwr_bst bst; + u32 alarm; +}; + + +/* -- module parameters. ---------------------------------------------------- */ + +static unsigned int cache_time = 1000; +module_param(cache_time, uint, 0644); +module_parm_desc(cache_time, "battery state caching time in milliseconds [default: 1000]"); + + +/* -- state management. ----------------------------------------------------- */ + +/* + * delay for battery update quirk. see spwr_external_power_changed() below + * for more details. + */ +#define spwr_ac_bat_update_delay msecs_to_jiffies(5000) + +static bool spwr_battery_present(struct spwr_battery_device *bat) +{ + lockdep_assert_held(&bat->lock); + + return le32_to_cpu(bat->sta) & sam_battery_sta_present; +} + +static int spwr_battery_load_sta(struct spwr_battery_device *bat) +{ + lockdep_assert_held(&bat->lock); + + return ssam_retry(ssam_bat_get_sta, bat->sdev, &bat->sta); +} + +static int spwr_battery_load_bix(struct spwr_battery_device *bat) +{ + int status; + + lockdep_assert_held(&bat->lock); + + if (!spwr_battery_present(bat)) + return 0; + + status = ssam_retry(ssam_bat_get_bix, bat->sdev, &bat->bix); + + /* enforce null terminated strings in case anything goes wrong... */ + bat->bix.model[array_size(bat->bix.model) - 1] = 0; + bat->bix.serial[array_size(bat->bix.serial) - 1] = 0; + bat->bix.type[array_size(bat->bix.type) - 1] = 0; + bat->bix.oem_info[array_size(bat->bix.oem_info) - 1] = 0; + + return status; +} + +static int spwr_battery_load_bst(struct spwr_battery_device *bat) +{ + lockdep_assert_held(&bat->lock); + + if (!spwr_battery_present(bat)) + return 0; + + return ssam_retry(ssam_bat_get_bst, bat->sdev, &bat->bst); +} + +static int spwr_battery_set_alarm_unlocked(struct spwr_battery_device *bat, u32 value) +{ + __le32 value_le = cpu_to_le32(value); + + lockdep_assert_held(&bat->lock); + + bat->alarm = value; + return ssam_retry(ssam_bat_set_btp, bat->sdev, &value_le); +} + +static int spwr_battery_update_bst_unlocked(struct spwr_battery_device *bat, bool cached) +{ + unsigned long cache_deadline = bat->timestamp + msecs_to_jiffies(cache_time); + int status; + + lockdep_assert_held(&bat->lock); + + if (cached && bat->timestamp && time_is_after_jiffies(cache_deadline)) + return 0; + + status = spwr_battery_load_sta(bat); + if (status) + return status; + + status = spwr_battery_load_bst(bat); + if (status) + return status; + + bat->timestamp = jiffies; + return 0; +} + +static int spwr_battery_update_bst(struct spwr_battery_device *bat, bool cached) +{ + int status; + + mutex_lock(&bat->lock); + status = spwr_battery_update_bst_unlocked(bat, cached); + mutex_unlock(&bat->lock); + + return status; +} + +static int spwr_battery_update_bix_unlocked(struct spwr_battery_device *bat) +{ + int status; + + lockdep_assert_held(&bat->lock); + + status = spwr_battery_load_sta(bat); + if (status) + return status; + + status = spwr_battery_load_bix(bat); + if (status) + return status; + + status = spwr_battery_load_bst(bat); + if (status) + return status; + + if (bat->bix.revision != spwr_bix_revision) + dev_warn(&bat->sdev->dev, "unsupported battery revision: %u ", bat->bix.revision); + + bat->timestamp = jiffies; + return 0; +} + +static u32 sprw_battery_get_full_cap_safe(struct spwr_battery_device *bat) +{ + u32 full_cap = get_unaligned_le32(&bat->bix.last_full_charge_cap); + + lockdep_assert_held(&bat->lock); + + if (full_cap == 0 || full_cap == spwr_battery_value_unknown) + full_cap = get_unaligned_le32(&bat->bix.design_cap); + + return full_cap; +} + +static bool spwr_battery_is_full(struct spwr_battery_device *bat) +{ + u32 state = get_unaligned_le32(&bat->bst.state); + u32 full_cap = sprw_battery_get_full_cap_safe(bat); + u32 remaining_cap = get_unaligned_le32(&bat->bst.remaining_cap); + + lockdep_assert_held(&bat->lock); + + return full_cap != spwr_battery_value_unknown && full_cap != 0 && + remaining_cap != spwr_battery_value_unknown && + remaining_cap >= full_cap && + state == 0; +} + +static int spwr_battery_recheck_full(struct spwr_battery_device *bat) +{ + bool present; + u32 unit; + int status; + + mutex_lock(&bat->lock); + unit = get_unaligned_le32(&bat->bix.power_unit); + present = spwr_battery_present(bat); + + status = spwr_battery_update_bix_unlocked(bat); + if (status) + goto out; + + /* if battery has been attached, (re-)initialize alarm. */ + if (!present && spwr_battery_present(bat)) { + u32 cap_warn = get_unaligned_le32(&bat->bix.design_cap_warn); + + status = spwr_battery_set_alarm_unlocked(bat, cap_warn); + if (status) + goto out; + } + + /* + * warn if the unit has changed. this is something we genuinely don't + * expect to happen, so make this a big warning. if it does, we'll + * need to add support for it. + */ + warn_on(unit != get_unaligned_le32(&bat->bix.power_unit)); + +out: + mutex_unlock(&bat->lock); + + if (!status) + power_supply_changed(bat->psy); + + return status; +} + +static int spwr_battery_recheck_status(struct spwr_battery_device *bat) +{ + int status; + + status = spwr_battery_update_bst(bat, false); + if (!status) + power_supply_changed(bat->psy); + + return status; +} + +static u32 spwr_notify_bat(struct ssam_event_notifier *nf, const struct ssam_event *event) +{ + struct spwr_battery_device *bat = container_of(nf, struct spwr_battery_device, notif); + int status; + + dev_dbg(&bat->sdev->dev, "power event (cid = %#04x, iid = %#04x, tid = %#04x) ", + event->command_id, event->instance_id, event->target_id); + + switch (event->command_id) { + case sam_event_cid_bat_bix: + status = spwr_battery_recheck_full(bat); + break; + + case sam_event_cid_bat_bst: + status = spwr_battery_recheck_status(bat); + break; + + case sam_event_cid_bat_prot: + /* + * todo: implement support for battery protection status change + * event. + */ + status = 0; + break; + + case sam_event_cid_bat_dptf: + /* + * todo: implement support for dptf event. + */ + status = 0; + break; + + default: + return 0; + } + + return ssam_notifier_from_errno(status) | ssam_notif_handled; +} + +static void spwr_battery_update_bst_workfn(struct work_struct *work) +{ + struct delayed_work *dwork = to_delayed_work(work); + struct spwr_battery_device *bat; + int status; + + bat = container_of(dwork, struct spwr_battery_device, update_work); + + status = spwr_battery_update_bst(bat, false); + if (status) { + dev_err(&bat->sdev->dev, "failed to update battery state: %d ", status); + return; + } + + power_supply_changed(bat->psy); +} + +static void spwr_external_power_changed(struct power_supply *psy) +{ + struct spwr_battery_device *bat = power_supply_get_drvdata(psy); + + /* + * handle battery update quirk: when the battery is fully charged (or + * charged up to the limit imposed by the uefi battery limit) and the + * adapter is plugged in or removed, the ec does not send a separate + * event for the state (charging/discharging) change. furthermore it + * may take some time until the state is updated on the battery. + * schedule an update to solve this. + */ + + schedule_delayed_work(&bat->update_work, spwr_ac_bat_update_delay); +} + + +/* -- properties. ----------------------------------------------------------- */ + +static const enum power_supply_property spwr_battery_props_chg[] = { + power_supply_prop_status, + power_supply_prop_present, + power_supply_prop_technology, + power_supply_prop_cycle_count, + power_supply_prop_voltage_min_design, + power_supply_prop_voltage_now, + power_supply_prop_current_now, + power_supply_prop_charge_full_design, + power_supply_prop_charge_full, + power_supply_prop_charge_now, + power_supply_prop_capacity, + power_supply_prop_capacity_level, + power_supply_prop_model_name, + power_supply_prop_manufacturer, + power_supply_prop_serial_number, +}; + +static const enum power_supply_property spwr_battery_props_eng[] = { + power_supply_prop_status, + power_supply_prop_present, + power_supply_prop_technology, + power_supply_prop_cycle_count, + power_supply_prop_voltage_min_design, + power_supply_prop_voltage_now, + power_supply_prop_power_now, + power_supply_prop_energy_full_design, + power_supply_prop_energy_full, + power_supply_prop_energy_now, + power_supply_prop_capacity, + power_supply_prop_capacity_level, + power_supply_prop_model_name, + power_supply_prop_manufacturer, + power_supply_prop_serial_number, +}; + +static int spwr_battery_prop_status(struct spwr_battery_device *bat) +{ + u32 state = get_unaligned_le32(&bat->bst.state); + u32 present_rate = get_unaligned_le32(&bat->bst.present_rate); + + lockdep_assert_held(&bat->lock); + + if (state & sam_battery_state_discharging) + return power_supply_status_discharging; + + if (state & sam_battery_state_charging) + return power_supply_status_charging; + + if (spwr_battery_is_full(bat)) + return power_supply_status_full; + + if (present_rate == 0) + return power_supply_status_not_charging; + + return power_supply_status_unknown; +} + +static int spwr_battery_prop_technology(struct spwr_battery_device *bat) +{ + lockdep_assert_held(&bat->lock); + + if (!strcasecmp("nicd", bat->bix.type)) + return power_supply_technology_nicd; + + if (!strcasecmp("nimh", bat->bix.type)) + return power_supply_technology_nimh; + + if (!strcasecmp("lion", bat->bix.type)) + return power_supply_technology_lion; + + if (!strncasecmp("li-ion", bat->bix.type, 6)) + return power_supply_technology_lion; + + if (!strcasecmp("lip", bat->bix.type)) + return power_supply_technology_lipo; + + return power_supply_technology_unknown; +} + +static int spwr_battery_prop_capacity(struct spwr_battery_device *bat) +{ + u32 full_cap = sprw_battery_get_full_cap_safe(bat); + u32 remaining_cap = get_unaligned_le32(&bat->bst.remaining_cap); + + lockdep_assert_held(&bat->lock); + + if (full_cap == 0 || full_cap == spwr_battery_value_unknown) + return -enodata; + + if (remaining_cap == spwr_battery_value_unknown) + return -enodata; + + return remaining_cap * 100 / full_cap; +} + +static int spwr_battery_prop_capacity_level(struct spwr_battery_device *bat) +{ + u32 state = get_unaligned_le32(&bat->bst.state); + u32 remaining_cap = get_unaligned_le32(&bat->bst.remaining_cap); + + lockdep_assert_held(&bat->lock); + + if (state & sam_battery_state_critical) + return power_supply_capacity_level_critical; + + if (spwr_battery_is_full(bat)) + return power_supply_capacity_level_full; + + if (remaining_cap <= bat->alarm) + return power_supply_capacity_level_low; + + return power_supply_capacity_level_normal; +} + +static int spwr_battery_get_property(struct power_supply *psy, enum power_supply_property psp, + union power_supply_propval *val) +{ + struct spwr_battery_device *bat = power_supply_get_drvdata(psy); + u32 value; + int status; + + mutex_lock(&bat->lock); + + status = spwr_battery_update_bst_unlocked(bat, true); + if (status) + goto out; + + /* abort if battery is not present. */ + if (!spwr_battery_present(bat) && psp != power_supply_prop_present) { + status = -enodev; + goto out; + } + + switch (psp) { + case power_supply_prop_status: + val->intval = spwr_battery_prop_status(bat); + break; + + case power_supply_prop_present: + val->intval = spwr_battery_present(bat); + break; + + case power_supply_prop_technology: + val->intval = spwr_battery_prop_technology(bat); + break; + + case power_supply_prop_cycle_count: + value = get_unaligned_le32(&bat->bix.cycle_count); + if (value != spwr_battery_value_unknown) + val->intval = value; + else + status = -enodata; + break; + + case power_supply_prop_voltage_min_design: + value = get_unaligned_le32(&bat->bix.design_voltage); + if (value != spwr_battery_value_unknown) + val->intval = value * 1000; + else + status = -enodata; + break; + + case power_supply_prop_voltage_now: + value = get_unaligned_le32(&bat->bst.present_voltage); + if (value != spwr_battery_value_unknown) + val->intval = value * 1000; + else + status = -enodata; + break; + + case power_supply_prop_current_now: + case power_supply_prop_power_now: + value = get_unaligned_le32(&bat->bst.present_rate); + if (value != spwr_battery_value_unknown) + val->intval = value * 1000; + else + status = -enodata; + break; + + case power_supply_prop_charge_full_design: + case power_supply_prop_energy_full_design: + value = get_unaligned_le32(&bat->bix.design_cap); + if (value != spwr_battery_value_unknown) + val->intval = value * 1000; + else + status = -enodata; + break; + + case power_supply_prop_charge_full: + case power_supply_prop_energy_full: + value = get_unaligned_le32(&bat->bix.last_full_charge_cap); + if (value != spwr_battery_value_unknown) + val->intval = value * 1000; + else + status = -enodata; + break; + + case power_supply_prop_charge_now: + case power_supply_prop_energy_now: + value = get_unaligned_le32(&bat->bst.remaining_cap); + if (value != spwr_battery_value_unknown) + val->intval = value * 1000; + else + status = -enodata; + break; + + case power_supply_prop_capacity: + val->intval = spwr_battery_prop_capacity(bat); + break; + + case power_supply_prop_capacity_level: + val->intval = spwr_battery_prop_capacity_level(bat); + break; + + case power_supply_prop_model_name: + val->strval = bat->bix.model; + break; + + case power_supply_prop_manufacturer: + val->strval = bat->bix.oem_info; + break; + + case power_supply_prop_serial_number: + val->strval = bat->bix.serial; + break; + + default: + status = -einval; + break; + } + +out: + mutex_unlock(&bat->lock); + return status; +} + + +/* -- alarm attribute. ------------------------------------------------------ */ + +static ssize_t alarm_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct power_supply *psy = dev_get_drvdata(dev); + struct spwr_battery_device *bat = power_supply_get_drvdata(psy); + int status; + + mutex_lock(&bat->lock); + status = sysfs_emit(buf, "%d ", bat->alarm * 1000); + mutex_unlock(&bat->lock); + + return status; +} + +static ssize_t alarm_store(struct device *dev, struct device_attribute *attr, const char *buf, + size_t count) +{ + struct power_supply *psy = dev_get_drvdata(dev); + struct spwr_battery_device *bat = power_supply_get_drvdata(psy); + unsigned long value; + int status; + + status = kstrtoul(buf, 0, &value); + if (status) + return status; + + mutex_lock(&bat->lock); + + if (!spwr_battery_present(bat)) { + mutex_unlock(&bat->lock); + return -enodev; + } + + status = spwr_battery_set_alarm_unlocked(bat, value / 1000); + if (status) { + mutex_unlock(&bat->lock); + return status; + } + + mutex_unlock(&bat->lock); + return count; +} + +device_attr_rw(alarm); + +static struct attribute *spwr_battery_attrs[] = { + &dev_attr_alarm.attr, + null, +}; +attribute_groups(spwr_battery); + + +/* -- device setup. --------------------------------------------------------- */ + +static void spwr_battery_init(struct spwr_battery_device *bat, struct ssam_device *sdev, + struct ssam_event_registry registry, const char *name) +{ + mutex_init(&bat->lock); + strncpy(bat->name, name, array_size(bat->name) - 1); + + bat->sdev = sdev; + + bat->notif.base.priority = 1; + bat->notif.base.fn = spwr_notify_bat; + bat->notif.event.reg = registry; + bat->notif.event.id.target_category = sdev->uid.category; + bat->notif.event.id.instance = 0; + bat->notif.event.mask = ssam_event_mask_strict; + bat->notif.event.flags = ssam_event_sequenced; + + bat->psy_desc.name = bat->name; + bat->psy_desc.type = power_supply_type_battery; + bat->psy_desc.get_property = spwr_battery_get_property; + + init_delayed_work(&bat->update_work, spwr_battery_update_bst_workfn); +} + +static int spwr_battery_register(struct spwr_battery_device *bat) +{ + struct power_supply_config psy_cfg = {}; + __le32 sta; + int status; + + /* make sure the device is there and functioning properly. */ + status = ssam_retry(ssam_bat_get_sta, bat->sdev, &sta); + if (status) + return status; + + if ((le32_to_cpu(sta) & sam_battery_sta_ok) != sam_battery_sta_ok) + return -enodev; + + /* satisfy lockdep although we are in an exclusive context here. */ + mutex_lock(&bat->lock); + + status = spwr_battery_update_bix_unlocked(bat); + if (status) { + mutex_unlock(&bat->lock); + return status; + } + + if (spwr_battery_present(bat)) { + u32 cap_warn = get_unaligned_le32(&bat->bix.design_cap_warn); + + status = spwr_battery_set_alarm_unlocked(bat, cap_warn); + if (status) { + mutex_unlock(&bat->lock); + return status; + } + } + + mutex_unlock(&bat->lock); + + bat->psy_desc.external_power_changed = spwr_external_power_changed; + + switch (get_unaligned_le32(&bat->bix.power_unit)) { + case sam_battery_power_unit_mw: + bat->psy_desc.properties = spwr_battery_props_eng; + bat->psy_desc.num_properties = array_size(spwr_battery_props_eng); + break; + + case sam_battery_power_unit_ma: + bat->psy_desc.properties = spwr_battery_props_chg; + bat->psy_desc.num_properties = array_size(spwr_battery_props_chg); + break; + + default: + dev_err(&bat->sdev->dev, "unsupported battery power unit: %u ", + get_unaligned_le32(&bat->bix.power_unit)); + return -einval; + } + + psy_cfg.drv_data = bat; + psy_cfg.attr_grp = spwr_battery_groups; + + bat->psy = devm_power_supply_register(&bat->sdev->dev, &bat->psy_desc, &psy_cfg); + if (is_err(bat->psy)) + return ptr_err(bat->psy); + + return ssam_notifier_register(bat->sdev->ctrl, &bat->notif); +} + + +/* -- driver setup. --------------------------------------------------------- */ + +static int __maybe_unused surface_battery_resume(struct device *dev) +{ + return spwr_battery_recheck_full(dev_get_drvdata(dev)); +} +simple_dev_pm_ops(surface_battery_pm_ops, null, surface_battery_resume); + +static int surface_battery_probe(struct ssam_device *sdev) +{ + const struct spwr_psy_properties *p; + struct spwr_battery_device *bat; + + p = ssam_device_get_match_data(sdev); + if (!p) + return -enodev; + + bat = devm_kzalloc(&sdev->dev, sizeof(*bat), gfp_kernel); + if (!bat) + return -enomem; + + spwr_battery_init(bat, sdev, p->registry, p->name); + ssam_device_set_drvdata(sdev, bat); + + return spwr_battery_register(bat); +} + +static void surface_battery_remove(struct ssam_device *sdev) +{ + struct spwr_battery_device *bat = ssam_device_get_drvdata(sdev); + + ssam_notifier_unregister(sdev->ctrl, &bat->notif); + cancel_delayed_work_sync(&bat->update_work); +} + +static const struct spwr_psy_properties spwr_psy_props_bat1 = { + .name = "bat1", + .registry = ssam_event_registry_sam, +}; + +static const struct spwr_psy_properties spwr_psy_props_bat2_sb3 = { + .name = "bat2", + .registry = ssam_event_registry_kip, +}; + +static const struct ssam_device_id surface_battery_match[] = { + { ssam_sdev(bat, 0x01, 0x01, 0x00), (unsigned long)&spwr_psy_props_bat1 }, + { ssam_sdev(bat, 0x02, 0x01, 0x00), (unsigned long)&spwr_psy_props_bat2_sb3 }, + { }, +}; +module_device_table(ssam, surface_battery_match); + +static struct ssam_device_driver surface_battery_driver = { + .probe = surface_battery_probe, + .remove = surface_battery_remove, + .match_table = surface_battery_match, + .driver = { + .name = "surface_battery", + .pm = &surface_battery_pm_ops, + .probe_type = probe_prefer_asynchronous, + }, +}; +module_ssam_device_driver(surface_battery_driver); + +module_author("maximilian luz <luzmaximilian@gmail.com>"); +module_description("battery driver for surface system aggregator module"); +module_license("gpl");
Voltage, current regulators, power capping, power supply
167f77f7d0b3891941866ae66f9cf4362ec33f93
maximilian luz
drivers
power
supply, testing
power: supply: bq27xxx: add support for bq78z100
add support for ti bq78z100, i2c interface gas gauge. it provides a fully integrated safety protection and authentication for 1 to 2-series cell li-ion and li-polymer battery packs.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for bq78z100
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['supply', 'bq27xxx']
['h', 'c']
3
47
0
--- diff --git a/drivers/power/supply/bq27xxx_battery.c b/drivers/power/supply/bq27xxx_battery.c --- a/drivers/power/supply/bq27xxx_battery.c +++ b/drivers/power/supply/bq27xxx_battery.c + * https://www.ti.com/product/bq78z100 + }, + bq78z100_regs[bq27xxx_reg_max] = { + [bq27xxx_reg_ctrl] = 0x00, + [bq27xxx_reg_temp] = 0x06, + [bq27xxx_reg_int_temp] = 0x28, + [bq27xxx_reg_volt] = 0x08, + [bq27xxx_reg_ai] = 0x14, + [bq27xxx_reg_flags] = 0x0a, + [bq27xxx_reg_tte] = 0x16, + [bq27xxx_reg_ttf] = 0x18, + [bq27xxx_reg_ttes] = 0x1c, + [bq27xxx_reg_ttecp] = invalid_reg_addr, + [bq27xxx_reg_nac] = invalid_reg_addr, + [bq27xxx_reg_rc] = 0x10, + [bq27xxx_reg_fcc] = 0x12, + [bq27xxx_reg_cyct] = 0x2a, + [bq27xxx_reg_ae] = invalid_reg_addr, + [bq27xxx_reg_soc] = 0x2c, + [bq27xxx_reg_dcap] = 0x3c, + [bq27xxx_reg_ap] = 0x22, + bq27xxx_dm_reg_rows, +static enum power_supply_property bq78z100_props[] = { + power_supply_prop_status, + power_supply_prop_present, + power_supply_prop_voltage_now, + power_supply_prop_current_now, + power_supply_prop_capacity, + power_supply_prop_capacity_level, + power_supply_prop_temp, + power_supply_prop_time_to_empty_now, + power_supply_prop_time_to_full_now, + power_supply_prop_technology, + power_supply_prop_charge_full, + power_supply_prop_charge_now, + power_supply_prop_charge_full_design, + power_supply_prop_cycle_count, + power_supply_prop_power_avg, + power_supply_prop_health, + power_supply_prop_manufacturer, +}; + +#define bq78z100_dm_regs 0 + [bq78z100] = bq27xxx_data(bq78z100, 0 , bq27z561_o_bits), diff --git a/drivers/power/supply/bq27xxx_battery_i2c.c b/drivers/power/supply/bq27xxx_battery_i2c.c --- a/drivers/power/supply/bq27xxx_battery_i2c.c +++ b/drivers/power/supply/bq27xxx_battery_i2c.c + { "bq78z100", bq78z100 }, + { .compatible = "ti,bq78z100" }, diff --git a/include/linux/power/bq27xxx_battery.h b/include/linux/power/bq27xxx_battery.h --- a/include/linux/power/bq27xxx_battery.h +++ b/include/linux/power/bq27xxx_battery.h + bq78z100,
Voltage, current regulators, power capping, power supply
4eed7f5a8334a179f40b2c78c1ead572b9dd04a0
li qingwu
drivers
power
power, supply
regulator: fan53555: add tcs4525 dcdc support
tcs4525 main features:
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add tcs4525 dcdc support
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['regulator', 'fan53555']
['c']
1
122
14
- 2.7v to 5.5v input voltage range; - 3mhz constant switching frequency; - 5a available load current; - programmable output voltage: 0.6v to 1.4v in 6.25mv steps; - pfm/pwm operation for optimum increased efficiency; --- diff --git a/drivers/regulator/fan53555.c b/drivers/regulator/fan53555.c --- a/drivers/regulator/fan53555.c +++ b/drivers/regulator/fan53555.c + +#define tcs4525_vsel0 0x11 +#define tcs4525_vsel1 0x10 +#define tcs4525_time 0x13 +#define tcs4525_command 0x14 + +#define tcs4525_nvoltages 127 /* numbers of voltages */ + +#define tcs_vsel_nsel_mask 0x7f +#define tcs_vsel0_mode (1 << 7) +#define tcs_vsel1_mode (1 << 6) + +#define tcs_slew_shift 3 +#define tcs_slew_mask (0x3 < 3) + fan53555_vendor_tcs, + /* slew rate */ + unsigned int slew_reg; + unsigned int slew_mask; + unsigned int slew_shift; + unsigned int slew_rate; +static const int tcs_slew_rates[] = { + 18700, + 9300, + 4600, + 2300, +}; + + const int *slew_rate_t; + int slew_rate_n; - for (i = 0; i < array_size(slew_rates); i++) { - if (ramp <= slew_rates[i]) + switch (di->vendor) { + case fan53526_vendor_fairchild: + case fan53555_vendor_fairchild: + case fan53555_vendor_silergy: + slew_rate_t = slew_rates; + slew_rate_n = array_size(slew_rates); + break; + case fan53555_vendor_tcs: + slew_rate_t = tcs_slew_rates; + slew_rate_n = array_size(tcs_slew_rates); + break; + default: + return -einval; + } + + for (i = 0; i < slew_rate_n; i++) { + if (ramp <= slew_rate_t[i]) - return regmap_update_bits(rdev->regmap, fan53555_control, - ctl_slew_mask, regval << ctl_slew_shift); + return regmap_update_bits(rdev->regmap, di->slew_reg, + di->slew_mask, regval << di->slew_shift); - + di->slew_reg = fan53555_control; + di->slew_mask = ctl_slew_mask; + di->slew_shift = ctl_slew_shift; - + di->slew_reg = fan53555_control; + di->slew_reg = fan53555_control; + di->slew_mask = ctl_slew_mask; + di->slew_shift = ctl_slew_shift; +static int fan53555_voltages_setup_tcs(struct fan53555_device_info *di) +{ + di->slew_reg = tcs4525_time; + di->slew_mask = tcs_slew_mask; + di->slew_shift = tcs_slew_mask; + + /* init voltage range and step */ + di->vsel_min = 600000; + di->vsel_step = 6250; + di->vsel_count = tcs4525_nvoltages; + + return 0; +} + - switch (pdata->sleep_vsel_id) { - case fan53555_vsel_id_0: - di->sleep_reg = fan53555_vsel0; - di->vol_reg = fan53555_vsel1; + switch (di->vendor) { + case fan53526_vendor_fairchild: + case fan53555_vendor_fairchild: + case fan53555_vendor_silergy: + switch (pdata->sleep_vsel_id) { + case fan53555_vsel_id_0: + di->sleep_reg = fan53555_vsel0; + di->vol_reg = fan53555_vsel1; + break; + case fan53555_vsel_id_1: + di->sleep_reg = fan53555_vsel1; + di->vol_reg = fan53555_vsel0; + break; + default: + dev_err(di->dev, "invalid vsel id! "); + return -einval; + } - case fan53555_vsel_id_1: - di->sleep_reg = fan53555_vsel1; - di->vol_reg = fan53555_vsel0; + case fan53555_vendor_tcs: + switch (pdata->sleep_vsel_id) { + case fan53555_vsel_id_0: + di->sleep_reg = tcs4525_vsel0; + di->vol_reg = tcs4525_vsel1; + break; + case fan53555_vsel_id_1: + di->sleep_reg = tcs4525_vsel1; + di->vol_reg = tcs4525_vsel0; + break; + default: + dev_err(di->dev, "invalid vsel id! "); + return -einval; + } - dev_err(di->dev, "invalid vsel id! "); + dev_err(di->dev, "vendor %d not supported! ", di->vendor); + case fan53555_vendor_tcs: + di->mode_reg = tcs4525_command; + + switch (pdata->sleep_vsel_id) { + case fan53555_vsel_id_0: + di->mode_mask = tcs_vsel1_mode; + break; + case fan53555_vsel_id_1: + di->mode_mask = tcs_vsel0_mode; + break; + } + break; + case fan53555_vendor_tcs: + ret = fan53555_voltages_setup_tcs(di); + break; + }, { + .compatible = "tcs,tcs4525", + .data = (void *)fan53555_vendor_tcs + }, { + .name = "tcs4525", + .driver_data = fan53555_vendor_tcs
Voltage, current regulators, power capping, power supply
914df8faa7d6fdff7afa1fbde888a2bed8d72fa7
joseph chen
drivers
regulator
regulator: qcom-rpmh: add pm7325/pmr735a regulator support
add support for pm7325/pmr735a regulators. this ensures that consumers are able to modify the physical state of pmic regulators.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add pm7325/pmr735a regulator support
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['regulator', 'qcom-rpmh']
['c']
1
52
1
--- diff --git a/drivers/regulator/qcom-rpmh-regulator.c b/drivers/regulator/qcom-rpmh-regulator.c --- a/drivers/regulator/qcom-rpmh-regulator.c +++ b/drivers/regulator/qcom-rpmh-regulator.c -// copyright (c) 2018-2019, the linux foundation. all rights reserved. +// copyright (c) 2018-2021, the linux foundation. all rights reserved. +static const struct rpmh_vreg_init_data pm7325_vreg_data[] = { + rpmh_vreg("smps1", "smp%s1", &pmic5_hfsmps510, "vdd-s1"), + rpmh_vreg("smps2", "smp%s2", &pmic5_ftsmps520, "vdd-s2"), + rpmh_vreg("smps3", "smp%s3", &pmic5_ftsmps520, "vdd-s3"), + rpmh_vreg("smps4", "smp%s4", &pmic5_ftsmps520, "vdd-s4"), + rpmh_vreg("smps5", "smp%s5", &pmic5_ftsmps520, "vdd-s5"), + rpmh_vreg("smps6", "smp%s6", &pmic5_ftsmps520, "vdd-s6"), + rpmh_vreg("smps7", "smp%s7", &pmic5_ftsmps520, "vdd-s7"), + rpmh_vreg("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"), + rpmh_vreg("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l4-l12-l15"), + rpmh_vreg("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l7"), + rpmh_vreg("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"), + rpmh_vreg("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l1-l4-l12-l15"), + rpmh_vreg("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l5"), + rpmh_vreg("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9-l10"), + rpmh_vreg("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l2-l7"), + rpmh_vreg("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l8"), + rpmh_vreg("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9-l10"), + rpmh_vreg("ldo10", "ldo%s10", &pmic5_nldo, "vdd-l6-l9-l10"), + rpmh_vreg("ldo11", "ldo%s11", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"), + rpmh_vreg("ldo12", "ldo%s12", &pmic5_nldo, "vdd-l1-l4-l12-l15"), + rpmh_vreg("ldo13", "ldo%s13", &pmic5_nldo, "vdd-l13"), + rpmh_vreg("ldo14", "ldo%s14", &pmic5_nldo, "vdd-l14-l16"), + rpmh_vreg("ldo15", "ldo%s15", &pmic5_nldo, "vdd-l1-l4-l12-l15"), + rpmh_vreg("ldo16", "ldo%s16", &pmic5_nldo, "vdd-l14-l16"), + rpmh_vreg("ldo17", "ldo%s17", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"), + rpmh_vreg("ldo18", "ldo%s18", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"), + rpmh_vreg("ldo19", "ldo%s19", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"), +}; + +static const struct rpmh_vreg_init_data pmr735a_vreg_data[] = { + rpmh_vreg("smps1", "smp%s1", &pmic5_ftsmps520, "vdd-s1"), + rpmh_vreg("smps2", "smp%s2", &pmic5_ftsmps520, "vdd-s2"), + rpmh_vreg("smps3", "smp%s3", &pmic5_hfsmps510, "vdd-s3"), + rpmh_vreg("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l2"), + rpmh_vreg("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l1-l2"), + rpmh_vreg("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"), + rpmh_vreg("ldo4", "ldo%s4", &pmic5_pldo_lv, "vdd-l4"), + rpmh_vreg("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l5-l6"), + rpmh_vreg("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l5-l6"), + rpmh_vreg("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-bob"), +}; + + { + .compatible = "qcom,pm7325-rpmh-regulators", + .data = pm7325_vreg_data, + }, + { + .compatible = "qcom,pmr735a-rpmh-regulators", + .data = pmr735a_vreg_data, + },
Voltage, current regulators, power capping, power supply
c4e5aa3dbee56bde70dfa03debc49bf9494fb3d9
satya priya matthias kaehlcke mka chromium org
drivers
regulator
regulator: spmi: add support for ult lv_p50 and ult p300
the ult lv_p50 shares the same configuration as the other ult lv_pxxx and the ult p300 shares the same as the other ult pxxx.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for ult lv_p50 and ult p300
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['regulator', 'spmi']
['c']
1
2
0
--- diff --git a/drivers/regulator/qcom_spmi-regulator.c b/drivers/regulator/qcom_spmi-regulator.c --- a/drivers/regulator/qcom_spmi-regulator.c +++ b/drivers/regulator/qcom_spmi-regulator.c + spmi_vreg(ult_ldo, lv_p50, 0, inf, ult_ldo, ult_ldo, ult_pldo, 10000), + spmi_vreg(ult_ldo, p300, 0, inf, ult_ldo, ult_ldo, ult_pldo, 10000),
Voltage, current regulators, power capping, power supply
438421b07bf84988a819a635cd8bdf6a4d7f72f2
angelogioacchino del regno
drivers
regulator
regulator: support rohm bd71815 regulators
support voltage control for regulators on rohm bd71815 pmic.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
support rohm bd71815 regulators
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['regulator']
['kconfig', 'c', 'makefile']
3
664
0
--- diff --git a/drivers/regulator/kconfig b/drivers/regulator/kconfig --- a/drivers/regulator/kconfig +++ b/drivers/regulator/kconfig +config regulator_bd71815 + tristate "rohm bd71815 power regulator" + depends on mfd_rohm_bd71828 + help + this driver supports voltage regulators on rohm bd71815 pmic. + this will enable support for the software controllable buck + and ldo regulators and a current regulator for leds. + + this driver can also be built as a module. if so, the module + will be called bd71815-regulator. + diff --git a/drivers/regulator/makefile b/drivers/regulator/makefile --- a/drivers/regulator/makefile +++ b/drivers/regulator/makefile +obj-$(config_regulator_bd71815) += bd71815-regulator.o diff --git a/drivers/regulator/bd71815-regulator.c b/drivers/regulator/bd71815-regulator.c --- /dev/null +++ b/drivers/regulator/bd71815-regulator.c +// spdx-license-identifier: gpl-2.0-only +// +// copyright 2014 embest technology co. ltd. inc. +// bd71815-regulator.c rohm bd71815 regulator driver +// +// author: tony luo <luofc@embedinfo.com> +// +// partially rewritten at 2021 by +// matti vaittinen <matti.vaitinen@fi.rohmeurope.com> + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/init.h> +#include <linux/err.h> +#include <linux/platform_device.h> +#include <linux/regulator/driver.h> +#include <linux/delay.h> +#include <linux/slab.h> +#include <linux/gpio.h> +#include <linux/mfd/rohm-generic.h> +#include <linux/mfd/rohm-bd71815.h> +#include <linux/regulator/of_regulator.h> + +struct bd71815_regulator { + struct regulator_desc desc; + const struct rohm_dvs_config *dvs; +}; + +struct bd71815_pmic { + struct bd71815_regulator descs[bd71815_regulator_cnt]; + struct regmap *regmap; + struct device *dev; + struct gpio_descs *gps; + struct regulator_dev *rdev[bd71815_regulator_cnt]; +}; + +static const int bd7181x_wled_currents[] = { + 10, 20, 30, 50, 70, 100, 200, 300, 500, 700, 1000, 2000, 3000, 4000, + 5000, 6000, 7000, 8000, 9000, 10000, 11000, 12000, 13000, 14000, 15000, + 16000, 17000, 18000, 19000, 20000, 21000, 22000, 23000, 24000, 25000, +}; + +static const struct rohm_dvs_config buck1_dvs = { + .level_map = rohm_dvs_level_run | rohm_dvs_level_snvs | + rohm_dvs_level_suspend | rohm_dvs_level_lpsr, + .run_reg = bd71815_reg_buck1_volt_h, + .run_mask = bd71815_volt_mask, + .run_on_mask = bd71815_buck_run_on, + .snvs_on_mask = bd71815_buck_snvs_on, + .suspend_reg = bd71815_reg_buck1_volt_l, + .suspend_mask = bd71815_volt_mask, + .suspend_on_mask = bd71815_buck_susp_on, + .lpsr_reg = bd71815_reg_buck1_volt_l, + .lpsr_mask = bd71815_volt_mask, + .lpsr_on_mask = bd71815_buck_lpsr_on, +}; + +static const struct rohm_dvs_config buck2_dvs = { + .level_map = rohm_dvs_level_run | rohm_dvs_level_snvs | + rohm_dvs_level_suspend | rohm_dvs_level_lpsr, + .run_reg = bd71815_reg_buck2_volt_h, + .run_mask = bd71815_volt_mask, + .run_on_mask = bd71815_buck_run_on, + .snvs_on_mask = bd71815_buck_snvs_on, + .suspend_reg = bd71815_reg_buck2_volt_l, + .suspend_mask = bd71815_volt_mask, + .suspend_on_mask = bd71815_buck_susp_on, + .lpsr_reg = bd71815_reg_buck2_volt_l, + .lpsr_mask = bd71815_volt_mask, + .lpsr_on_mask = bd71815_buck_lpsr_on, +}; + +static const struct rohm_dvs_config buck3_dvs = { + .level_map = rohm_dvs_level_run | rohm_dvs_level_snvs | + rohm_dvs_level_suspend | rohm_dvs_level_lpsr, + .run_reg = bd71815_reg_buck3_volt, + .run_mask = bd71815_volt_mask, + .run_on_mask = bd71815_buck_run_on, + .snvs_on_mask = bd71815_buck_snvs_on, + .suspend_on_mask = bd71815_buck_susp_on, + .lpsr_on_mask = bd71815_buck_lpsr_on, +}; + +static const struct rohm_dvs_config buck4_dvs = { + .level_map = rohm_dvs_level_run | rohm_dvs_level_snvs | + rohm_dvs_level_suspend | rohm_dvs_level_lpsr, + .run_reg = bd71815_reg_buck4_volt, + .run_mask = bd71815_volt_mask, + .run_on_mask = bd71815_buck_run_on, + .snvs_on_mask = bd71815_buck_snvs_on, + .suspend_on_mask = bd71815_buck_susp_on, + .lpsr_on_mask = bd71815_buck_lpsr_on, +}; + +static const struct rohm_dvs_config ldo1_dvs = { + .level_map = rohm_dvs_level_run | rohm_dvs_level_snvs | + rohm_dvs_level_suspend | rohm_dvs_level_lpsr, + .run_reg = bd71815_reg_ldo_mode1, + .run_mask = bd71815_volt_mask, + .run_on_mask = ldo1_run_on, + .snvs_on_mask = ldo1_snvs_on, + .suspend_on_mask = ldo1_susp_on, + .lpsr_on_mask = ldo1_lpsr_on, +}; + +static const struct rohm_dvs_config ldo2_dvs = { + .level_map = rohm_dvs_level_run | rohm_dvs_level_snvs | + rohm_dvs_level_suspend | rohm_dvs_level_lpsr, + .run_reg = bd71815_reg_ldo_mode2, + .run_mask = bd71815_volt_mask, + .run_on_mask = ldo2_run_on, + .snvs_on_mask = ldo2_snvs_on, + .suspend_on_mask = ldo2_susp_on, + .lpsr_on_mask = ldo2_lpsr_on, +}; + +static const struct rohm_dvs_config ldo3_dvs = { + .level_map = rohm_dvs_level_run | rohm_dvs_level_snvs | + rohm_dvs_level_suspend | rohm_dvs_level_lpsr, + .run_reg = bd71815_reg_ldo_mode2, + .run_mask = bd71815_volt_mask, + .run_on_mask = ldo3_run_on, + .snvs_on_mask = ldo3_snvs_on, + .suspend_on_mask = ldo3_susp_on, + .lpsr_on_mask = ldo3_lpsr_on, +}; + +static const struct rohm_dvs_config ldo4_dvs = { + .level_map = rohm_dvs_level_run | rohm_dvs_level_snvs | + rohm_dvs_level_suspend | rohm_dvs_level_lpsr, + .run_reg = bd71815_reg_ldo_mode3, + .run_mask = bd71815_volt_mask, + .run_on_mask = ldo4_run_on, + .snvs_on_mask = ldo4_snvs_on, + .suspend_on_mask = ldo4_susp_on, + .lpsr_on_mask = ldo4_lpsr_on, +}; + +static const struct rohm_dvs_config ldo5_dvs = { + .level_map = rohm_dvs_level_run | rohm_dvs_level_snvs | + rohm_dvs_level_suspend | rohm_dvs_level_lpsr, + .run_reg = bd71815_reg_ldo_mode3, + .run_mask = bd71815_volt_mask, + .run_on_mask = ldo5_run_on, + .snvs_on_mask = ldo5_snvs_on, + .suspend_on_mask = ldo5_susp_on, + .lpsr_on_mask = ldo5_lpsr_on, +}; + +static const struct rohm_dvs_config dvref_dvs = { + .level_map = rohm_dvs_level_run | rohm_dvs_level_snvs | + rohm_dvs_level_suspend | rohm_dvs_level_lpsr, + .run_on_mask = dvref_run_on, + .snvs_on_mask = dvref_snvs_on, + .suspend_on_mask = dvref_susp_on, + .lpsr_on_mask = dvref_lpsr_on, +}; + +static const struct rohm_dvs_config ldolpsr_dvs = { + .level_map = rohm_dvs_level_run | rohm_dvs_level_snvs | + rohm_dvs_level_suspend | rohm_dvs_level_lpsr, + .run_on_mask = dvref_run_on, + .snvs_on_mask = dvref_snvs_on, + .suspend_on_mask = dvref_susp_on, + .lpsr_on_mask = dvref_lpsr_on, +}; + +static const struct rohm_dvs_config buck5_dvs = { + .level_map = rohm_dvs_level_run | rohm_dvs_level_snvs | + rohm_dvs_level_suspend | rohm_dvs_level_lpsr, + .run_reg = bd71815_reg_buck5_volt, + .run_mask = bd71815_volt_mask, + .run_on_mask = bd71815_buck_run_on, + .snvs_on_mask = bd71815_buck_snvs_on, + .suspend_on_mask = bd71815_buck_susp_on, + .lpsr_on_mask = bd71815_buck_lpsr_on, +}; + +static int set_hw_dvs_levels(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *cfg) +{ + struct bd71815_regulator *data; + + data = container_of(desc, struct bd71815_regulator, desc); + return rohm_regulator_set_dvs_levels(data->dvs, np, desc, cfg->regmap); +} + +/* + * bucks 1 and 2 have two voltage selection registers where selected + * voltage can be set. which of the registers is used can be either controlled + * by a control bit in register - or by hw state. if hw state specific voltages + * are given - then we assume hw state based control should be used. + * + * if volatge value is updated to currently selected register - then output + * voltage is immediately changed no matter what is set as ramp rate. thus we + * default changing voltage by writing new value to inactive register and + * then updating the 'register selection' bit. this naturally only works when + * hw state machine is not used to select the voltage. + */ +static int buck12_set_hw_dvs_levels(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *cfg) +{ + struct bd71815_regulator *data; + int ret = 0, val; + + data = container_of(desc, struct bd71815_regulator, desc); + + if (of_find_property(np, "rohm,dvs-run-voltage", null) || + of_find_property(np, "rohm,dvs-suspend-voltage", null) || + of_find_property(np, "rohm,dvs-lpsr-voltage", null) || + of_find_property(np, "rohm,dvs-snvs-voltage", null)) { + ret = regmap_read(cfg->regmap, desc->vsel_reg, &val); + if (ret) + return ret; + + if (!(bd71815_buck_stby_dvs & val) && + !(bd71815_buck_dvssel & val)) { + int val2; + + /* + * we are currently using voltage from _l. + * we'd better copy it to _h and switch to it to + * avoid shutting us down if lpsr or suspend is set to + * disabled. _l value is at reg _h + 1 + */ + ret = regmap_read(cfg->regmap, desc->vsel_reg + 1, + &val2); + if (ret) + return ret; + + ret = regmap_update_bits(cfg->regmap, desc->vsel_reg, + bd71815_volt_mask | + bd71815_buck_dvssel, + val2 | bd71815_buck_dvssel); + if (ret) + return ret; + } + ret = rohm_regulator_set_dvs_levels(data->dvs, np, desc, + cfg->regmap); + if (ret) + return ret; + /* + * dvs levels were given => use hw-state machine for voltage + * controls. note: afaik, this means that if voltage is changed + * by sw the ramp-rate is not respected. should we disable + * sw voltage control when the hw state machine is used? + */ + ret = regmap_update_bits(cfg->regmap, desc->vsel_reg, + bd71815_buck_stby_dvs, + bd71815_buck_stby_dvs); + } + + return ret; +} + +/* + * buck1/2 + * buck1ramprate[1:0] buck1 dvs ramp rate setting + * 00: 10.00mv/usec 10mv 1us + * 01: 5.00mv/usec 10mv 2us + * 10: 2.50mv/usec 10mv 4us + * 11: 1.25mv/usec 10mv 8us + */ +static const unsigned int bd7181x_ramp_table[] = { 1250, 2500, 5000, 10000 }; + +static int bd7181x_led_set_current_limit(struct regulator_dev *rdev, + int min_ua, int max_ua) +{ + int ret; + int onstatus; + + onstatus = regulator_is_enabled_regmap(rdev); + + ret = regulator_set_current_limit_regmap(rdev, min_ua, max_ua); + if (!ret) { + int newstatus; + + newstatus = regulator_is_enabled_regmap(rdev); + if (onstatus != newstatus) { + /* + * hw fix: spurious led status change detected. toggle + * state as a workaround + */ + if (onstatus) + ret = regulator_enable_regmap(rdev); + else + ret = regulator_disable_regmap(rdev); + + if (ret) + dev_err(rdev_get_dev(rdev), + "failed to revert the led state (%d) ", + ret); + } + } + + return ret; +} + +static int bd7181x_buck12_get_voltage_sel(struct regulator_dev *rdev) +{ + struct bd71815_pmic *pmic = rdev_get_drvdata(rdev); + int rid = rdev_get_id(rdev); + int ret, regh, regl, val; + + regh = bd71815_reg_buck1_volt_h + rid * 0x2; + regl = bd71815_reg_buck1_volt_l + rid * 0x2; + + ret = regmap_read(pmic->regmap, regh, &val); + if (ret) + return ret; + + /* + * if we use hw state machine based voltage reg selection - then we + * return bd71815_reg_buck1_volt_h which is used at run. + * else we do return the bd71815_reg_buck1_volt_h or + * bd71815_reg_buck1_volt_l depending on which is selected to be used + * by bd71815_buck_dvssel bit + */ + if ((!(val & bd71815_buck_stby_dvs)) && (!(val & bd71815_buck_dvssel))) + ret = regmap_read(pmic->regmap, regl, &val); + + if (ret) + return ret; + + return val & bd71815_volt_mask; +} + +/* + * for buck 1/2. + */ +static int bd7181x_buck12_set_voltage_sel(struct regulator_dev *rdev, + unsigned int sel) +{ + struct bd71815_pmic *pmic = rdev_get_drvdata(rdev); + int rid = rdev_get_id(rdev); + int ret, val, reg, regh, regl; + + regh = bd71815_reg_buck1_volt_h + rid*0x2; + regl = bd71815_reg_buck1_volt_l + rid*0x2; + + ret = regmap_read(pmic->regmap, regh, &val); + if (ret) + return ret; + + /* + * if bucks 1 & 2 are controlled by state machine - then the run state + * voltage is set to bd71815_reg_buck1_volt_h. changing suspend/lpsr + * voltages at runtime is not supported by this driver. + */ + if (((val & bd71815_buck_stby_dvs))) { + return regmap_update_bits(pmic->regmap, regh, bd71815_volt_mask, + sel); + } + /* update new voltage to the register which is not selected now */ + if (val & bd71815_buck_dvssel) + reg = regl; + else + reg = regh; + + ret = regmap_update_bits(pmic->regmap, reg, bd71815_volt_mask, sel); + if (ret) + return ret; + + /* select the other dvs register to be used */ + return regmap_update_bits(pmic->regmap, regh, bd71815_buck_dvssel, ~val); +} + +static const struct regulator_ops bd7181x_ldo_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, +}; + +static const struct regulator_ops bd7181x_fixed_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, +}; + +static const struct regulator_ops bd7181x_buck_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, +}; + +static const struct regulator_ops bd7181x_buck12_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = bd7181x_buck12_set_voltage_sel, + .get_voltage_sel = bd7181x_buck12_get_voltage_sel, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_ramp_delay = regulator_set_ramp_delay_regmap, +}; + +static const struct regulator_ops bd7181x_led_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_current_limit = bd7181x_led_set_current_limit, + .get_current_limit = regulator_get_current_limit_regmap, +}; + +#define bd71815_fixed_reg(_name, _id, ereg, emsk, voltage, _dvs) \ + [(_id)] = { \ + .desc = { \ + .name = #_name, \ + .of_match = of_match_ptr(#_name), \ + .regulators_node = of_match_ptr("regulators"), \ + .n_voltages = 1, \ + .ops = &bd7181x_fixed_regulator_ops, \ + .type = regulator_voltage, \ + .id = (_id), \ + .owner = this_module, \ + .min_uv = (voltage), \ + .enable_reg = (ereg), \ + .enable_mask = (emsk), \ + .of_parse_cb = set_hw_dvs_levels, \ + }, \ + .dvs = (_dvs), \ + } + +#define bd71815_buck_reg(_name, _id, vsel, ereg, min, max, step, _dvs) \ + [(_id)] = { \ + .desc = { \ + .name = #_name, \ + .of_match = of_match_ptr(#_name), \ + .regulators_node = of_match_ptr("regulators"), \ + .n_voltages = ((max) - (min)) / (step) + 1, \ + .ops = &bd7181x_buck_regulator_ops, \ + .type = regulator_voltage, \ + .id = (_id), \ + .owner = this_module, \ + .min_uv = (min), \ + .uv_step = (step), \ + .vsel_reg = (vsel), \ + .vsel_mask = bd71815_volt_mask, \ + .enable_reg = (ereg), \ + .enable_mask = bd71815_buck_run_on, \ + .of_parse_cb = set_hw_dvs_levels, \ + }, \ + .dvs = (_dvs), \ + } + +#define bd71815_buck12_reg(_name, _id, vsel, ereg, min, max, step, \ + _dvs) \ + [(_id)] = { \ + .desc = { \ + .name = #_name, \ + .of_match = of_match_ptr(#_name), \ + .regulators_node = of_match_ptr("regulators"), \ + .n_voltages = ((max) - (min)) / (step) + 1, \ + .ops = &bd7181x_buck12_regulator_ops, \ + .type = regulator_voltage, \ + .id = (_id), \ + .owner = this_module, \ + .min_uv = (min), \ + .uv_step = (step), \ + .vsel_reg = (vsel), \ + .vsel_mask = 0x3f, \ + .enable_reg = (ereg), \ + .enable_mask = 0x04, \ + .ramp_reg = (ereg), \ + .ramp_mask = bd71815_buck_ramprate_mask, \ + .ramp_delay_table = bd7181x_ramp_table, \ + .n_ramp_values = array_size(bd7181x_ramp_table),\ + .of_parse_cb = buck12_set_hw_dvs_levels, \ + }, \ + .dvs = (_dvs), \ + } + +#define bd71815_led_reg(_name, _id, csel, mask, ereg, emsk, currents) \ + [(_id)] = { \ + .desc = { \ + .name = #_name, \ + .of_match = of_match_ptr(#_name), \ + .regulators_node = of_match_ptr("regulators"), \ + .n_current_limits = array_size(currents), \ + .ops = &bd7181x_led_regulator_ops, \ + .type = regulator_current, \ + .id = (_id), \ + .owner = this_module, \ + .curr_table = currents, \ + .csel_reg = (csel), \ + .csel_mask = (mask), \ + .enable_reg = (ereg), \ + .enable_mask = (emsk), \ + }, \ + } + +#define bd71815_ldo_reg(_name, _id, vsel, ereg, emsk, min, max, step, \ + _dvs) \ + [(_id)] = { \ + .desc = { \ + .name = #_name, \ + .of_match = of_match_ptr(#_name), \ + .regulators_node = of_match_ptr("regulators"), \ + .n_voltages = ((max) - (min)) / (step) + 1, \ + .ops = &bd7181x_ldo_regulator_ops, \ + .type = regulator_voltage, \ + .id = (_id), \ + .owner = this_module, \ + .min_uv = (min), \ + .uv_step = (step), \ + .vsel_reg = (vsel), \ + .vsel_mask = bd71815_volt_mask, \ + .enable_reg = (ereg), \ + .enable_mask = (emsk), \ + .of_parse_cb = set_hw_dvs_levels, \ + }, \ + .dvs = (_dvs), \ + } + +static struct bd71815_regulator bd71815_regulators[] = { + bd71815_buck12_reg(buck1, bd71815_buck1, bd71815_reg_buck1_volt_h, + bd71815_reg_buck1_mode, 800000, 2000000, 25000, + &buck1_dvs), + bd71815_buck12_reg(buck2, bd71815_buck2, bd71815_reg_buck2_volt_h, + bd71815_reg_buck2_mode, 800000, 2000000, 25000, + &buck2_dvs), + bd71815_buck_reg(buck3, bd71815_buck3, bd71815_reg_buck3_volt, + bd71815_reg_buck3_mode, 1200000, 2700000, 50000, + &buck3_dvs), + bd71815_buck_reg(buck4, bd71815_buck4, bd71815_reg_buck4_volt, + bd71815_reg_buck4_mode, 1100000, 1850000, 25000, + &buck4_dvs), + bd71815_buck_reg(buck5, bd71815_buck5, bd71815_reg_buck5_volt, + bd71815_reg_buck5_mode, 1800000, 3300000, 50000, + &buck5_dvs), + bd71815_ldo_reg(ldo1, bd71815_ldo1, bd71815_reg_ldo1_volt, + bd71815_reg_ldo_mode1, ldo1_run_on, 800000, 3300000, + 50000, &ldo1_dvs), + bd71815_ldo_reg(ldo2, bd71815_ldo2, bd71815_reg_ldo2_volt, + bd71815_reg_ldo_mode2, ldo2_run_on, 800000, 3300000, + 50000, &ldo2_dvs), + /* + * let's default ldo3 to be enabled by sw. we can override ops if dt + * says ldo3 should be enabled by hw when dcin is connected. + */ + bd71815_ldo_reg(ldo3, bd71815_ldo3, bd71815_reg_ldo3_volt, + bd71815_reg_ldo_mode2, ldo3_run_on, 800000, 3300000, + 50000, &ldo3_dvs), + bd71815_ldo_reg(ldo4, bd71815_ldo4, bd71815_reg_ldo4_volt, + bd71815_reg_ldo_mode3, ldo4_run_on, 800000, 3300000, + 50000, &ldo4_dvs), + bd71815_ldo_reg(ldo5, bd71815_ldo5, bd71815_reg_ldo5_volt_h, + bd71815_reg_ldo_mode3, ldo5_run_on, 800000, 3300000, + 50000, &ldo5_dvs), + bd71815_fixed_reg(ldodvref, bd71815_ldodvref, bd71815_reg_ldo_mode4, + dvref_run_on, 3000000, &dvref_dvs), + bd71815_fixed_reg(ldolpsr, bd71815_ldolpsr, bd71815_reg_ldo_mode4, + ldo_lpsr_run_on, 1800000, &ldolpsr_dvs), + bd71815_led_reg(wled, bd71815_wled, bd71815_reg_led_dimm, led_dimm_mask, + bd71815_reg_led_ctrl, led_run_on, + bd7181x_wled_currents), +}; + +static int bd7181x_probe(struct platform_device *pdev) +{ + struct bd71815_pmic *pmic; + struct regulator_config config = {}; + int i, ret; + struct gpio_desc *ldo4_en; + + pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), gfp_kernel); + if (!pmic) + return -enomem; + + memcpy(pmic->descs, bd71815_regulators, sizeof(pmic->descs)); + + pmic->dev = &pdev->dev; + pmic->regmap = dev_get_regmap(pdev->dev.parent, null); + if (!pmic->regmap) { + dev_err(pmic->dev, "no parent regmap "); + return -enodev; + } + platform_set_drvdata(pdev, pmic); + ldo4_en = devm_gpiod_get_from_of_node(&pdev->dev, + pdev->dev.parent->of_node, + "rohm,vsel-gpios", 0, + gpiod_asis, "ldo4-en"); + + if (is_err(ldo4_en)) { + ret = ptr_err(ldo4_en); + if (ret != -enoent) + return ret; + ldo4_en = null; + } + + /* disable to go to ship-mode */ + ret = regmap_update_bits(pmic->regmap, bd71815_reg_pwrctrl, + restarten, 0); + if (ret) + return ret; + + config.dev = pdev->dev.parent; + config.regmap = pmic->regmap; + + for (i = 0; i < bd71815_regulator_cnt; i++) { + struct regulator_desc *desc; + struct regulator_dev *rdev; + + desc = &pmic->descs[i].desc; + if (i == bd71815_ldo4) + config.ena_gpiod = ldo4_en; + + config.driver_data = pmic; + + rdev = devm_regulator_register(&pdev->dev, desc, &config); + if (is_err(rdev)) { + dev_err(&pdev->dev, + "failed to register %s regulator ", + desc->name); + return ptr_err(rdev); + } + config.ena_gpiod = null; + pmic->rdev[i] = rdev; + } + return 0; +} + +static const struct platform_device_id bd7181x_pmic_id[] = { + { "bd71815-pmic", rohm_chip_type_bd71815 }, + { }, +}; +module_device_table(platform, bd7181x_pmic_id); + +static struct platform_driver bd7181x_regulator = { + .driver = { + .name = "bd7181x-pmic", + .owner = this_module, + }, + .probe = bd7181x_probe, + .id_table = bd7181x_pmic_id, +}; +module_platform_driver(bd7181x_regulator); + +module_author("tony luo <luofc@embedinfo.com>"); +module_description("bd71815 voltage regulator driver"); +module_license("gpl v2"); +module_alias("platform:bd7181x-pmic");
Voltage, current regulators, power capping, power supply
1aad39001e851cd7ee2d811eb5fd4b044979d9d5
matti vaittinen
drivers
regulator
rtc: bd70528: support rtc on rohm bd71815
bd71815 contains similar rtc block as bd71828. only the address offsets seem different. support also bd71815 rtc using rtc-bd70528.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
support rtc on rohm bd71815
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['bd70528']
['kconfig', 'c']
2
40
11
--- diff --git a/drivers/rtc/kconfig b/drivers/rtc/kconfig --- a/drivers/rtc/kconfig +++ b/drivers/rtc/kconfig - tristate "rohm bd70528 pmic rtc" - depends on mfd_rohm_bd70528 && (bd70528_watchdog || !bd70528_watchdog) + tristate "rohm bd70528, bd71815 and bd71828 pmic rtc" + depends on mfd_rohm_bd71828 || mfd_rohm_bd70528 && (bd70528_watchdog || !bd70528_watchdog) - block on rohm bd70528 and bd71828 power management ic. + block on rohm bd70528, bd71815 and bd71828 power management ic. diff --git a/drivers/rtc/rtc-bd70528.c b/drivers/rtc/rtc-bd70528.c --- a/drivers/rtc/rtc-bd70528.c +++ b/drivers/rtc/rtc-bd70528.c +#include <linux/mfd/rohm-bd71815.h> +/* + * on bd71828 and bd71815 the alm0 mask is 14 bytes after the alm0 + * block start + */ +#define bd718xx_alm_en_offset 14 + + u8 bd718xx_alm_block_start; - ret = regmap_bulk_read(r->regmap, bd71828_reg_rtc_alm_start, - &alm, sizeof(alm)); + ret = regmap_bulk_read(r->regmap, r->bd718xx_alm_block_start, &alm, + sizeof(alm)); - ret = regmap_bulk_write(r->regmap, bd71828_reg_rtc_alm_start, - &alm, sizeof(alm)); + ret = regmap_bulk_write(r->regmap, r->bd718xx_alm_block_start, &alm, + sizeof(alm)); - ret = regmap_bulk_read(r->regmap, bd71828_reg_rtc_alm_start, - &alm, sizeof(alm)); + ret = regmap_bulk_read(r->regmap, r->bd718xx_alm_block_start, &alm, + sizeof(alm)); - ret = regmap_update_bits(r->regmap, bd71828_reg_rtc_alm0_mask, - bd70528_mask_alm_en, enableval); + ret = regmap_update_bits(r->regmap, r->bd718xx_alm_block_start + + bd718xx_alm_en_offset, bd70528_mask_alm_en, + enableval); + case rohm_chip_type_bd71815: + irq_name = "bd71815-rtc-alm-0"; + bd_rtc->reg_time_start = bd71815_reg_rtc_start; + + /* + * see also bd718xx_alm_en_offset: + * this works for bd71828 and bd71815 as they have same offset + * between alm0 start and alm0_mask. if new ics are to be + * added this requires proper check as alm0_mask is not located + * at the end of alm0 block - but after all alm blocks so if + * amount of alms differ the offset to enable/disable is likely + * to be incorrect and enable/disable must be given as own + * reg address here. + */ + bd_rtc->bd718xx_alm_block_start = bd71815_reg_rtc_alm_start; + hour_reg = bd71815_reg_hour; + rtc_ops = &bd71828_rtc_ops; + break; + bd_rtc->bd718xx_alm_block_start = bd71828_reg_rtc_alm_start; + { "bd71815-rtc", rohm_chip_type_bd71815 },
Real Time Clock (RTC)
c56dc069f2687280090e0eb7454971cae3e8f2a5
matti vaittinen alexandre belloni alexandre belloni bootlin com
drivers
rtc
rtc: new driver for rtc in netronix embedded controller
with this driver, mainline linux can keep its time and date in sync with the vendor kernel.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
new driver for rtc in netronix embedded controller
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['kconfig', 'c', 'makefile']
3
154
0
--- diff --git a/drivers/rtc/kconfig b/drivers/rtc/kconfig --- a/drivers/rtc/kconfig +++ b/drivers/rtc/kconfig +config rtc_drv_ntxec + tristate "netronix embedded controller rtc" + depends on mfd_ntxec + help + say yes here if you want to support the rtc functionality of the + embedded controller found in certain e-book readers designed by the + original design manufacturer netronix. + diff --git a/drivers/rtc/makefile b/drivers/rtc/makefile --- a/drivers/rtc/makefile +++ b/drivers/rtc/makefile +obj-$(config_rtc_drv_ntxec) += rtc-ntxec.o diff --git a/drivers/rtc/rtc-ntxec.c b/drivers/rtc/rtc-ntxec.c --- /dev/null +++ b/drivers/rtc/rtc-ntxec.c +// spdx-license-identifier: gpl-2.0-or-later +/* + * the netronix embedded controller is a microcontroller found in some + * e-book readers designed by the original design manufacturer netronix, inc. + * it contains rtc, battery monitoring, system power management, and pwm + * functionality. + * + * this driver implements access to the rtc time and date. + * + * copyright 2020 jonathan neuschafer <j.neuschaefer@gmx.net> + */ + +#include <linux/mfd/ntxec.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> +#include <linux/rtc.h> +#include <linux/types.h> + +struct ntxec_rtc { + struct device *dev; + struct ntxec *ec; +}; + +#define ntxec_reg_write_year 0x10 +#define ntxec_reg_write_month 0x11 +#define ntxec_reg_write_day 0x12 +#define ntxec_reg_write_hour 0x13 +#define ntxec_reg_write_minute 0x14 +#define ntxec_reg_write_second 0x15 + +#define ntxec_reg_read_year_month 0x20 +#define ntxec_reg_read_mday_hour 0x21 +#define ntxec_reg_read_minute_second 0x23 + +static int ntxec_read_time(struct device *dev, struct rtc_time *tm) +{ + struct ntxec_rtc *rtc = dev_get_drvdata(dev); + unsigned int value; + int res; + +retry: + res = regmap_read(rtc->ec->regmap, ntxec_reg_read_minute_second, &value); + if (res < 0) + return res; + + tm->tm_min = value >> 8; + tm->tm_sec = value & 0xff; + + res = regmap_read(rtc->ec->regmap, ntxec_reg_read_mday_hour, &value); + if (res < 0) + return res; + + tm->tm_mday = value >> 8; + tm->tm_hour = value & 0xff; + + res = regmap_read(rtc->ec->regmap, ntxec_reg_read_year_month, &value); + if (res < 0) + return res; + + tm->tm_year = (value >> 8) + 100; + tm->tm_mon = (value & 0xff) - 1; + + /* + * read the minutes/seconds field again. if it changed since the first + * read, we can't assume that the values read so far are consistent, + * and should start from the beginning. + */ + res = regmap_read(rtc->ec->regmap, ntxec_reg_read_minute_second, &value); + if (res < 0) + return res; + + if (tm->tm_min != value >> 8 || tm->tm_sec != (value & 0xff)) + goto retry; + + return 0; +} + +static int ntxec_set_time(struct device *dev, struct rtc_time *tm) +{ + struct ntxec_rtc *rtc = dev_get_drvdata(dev); + + /* + * to avoid time overflows while we're writing the full date/time, + * set the seconds field to zero before doing anything else. for the + * next 59 seconds (plus however long it takes until the rtc's next + * update of the second field), the seconds field will not overflow + * into the other fields. + */ + struct reg_sequence regs[] = { + { ntxec_reg_write_second, ntxec_reg8(0) }, + { ntxec_reg_write_year, ntxec_reg8(tm->tm_year - 100) }, + { ntxec_reg_write_month, ntxec_reg8(tm->tm_mon + 1) }, + { ntxec_reg_write_day, ntxec_reg8(tm->tm_mday) }, + { ntxec_reg_write_hour, ntxec_reg8(tm->tm_hour) }, + { ntxec_reg_write_minute, ntxec_reg8(tm->tm_min) }, + { ntxec_reg_write_second, ntxec_reg8(tm->tm_sec) }, + }; + + return regmap_multi_reg_write(rtc->ec->regmap, regs, array_size(regs)); +} + +static const struct rtc_class_ops ntxec_rtc_ops = { + .read_time = ntxec_read_time, + .set_time = ntxec_set_time, +}; + +static int ntxec_rtc_probe(struct platform_device *pdev) +{ + struct rtc_device *dev; + struct ntxec_rtc *rtc; + + pdev->dev.of_node = pdev->dev.parent->of_node; + + rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), gfp_kernel); + if (!rtc) + return -enomem; + + rtc->dev = &pdev->dev; + rtc->ec = dev_get_drvdata(pdev->dev.parent); + platform_set_drvdata(pdev, rtc); + + dev = devm_rtc_allocate_device(&pdev->dev); + if (is_err(dev)) + return ptr_err(dev); + + dev->ops = &ntxec_rtc_ops; + dev->range_min = rtc_timestamp_begin_2000; + dev->range_max = 9025257599ll; /* 2255-12-31 23:59:59 */ + + return devm_rtc_register_device(dev); +} + +static struct platform_driver ntxec_rtc_driver = { + .driver = { + .name = "ntxec-rtc", + }, + .probe = ntxec_rtc_probe, +}; +module_platform_driver(ntxec_rtc_driver); + +module_author("jonathan neuschafer <j.neuschaefer@gmx.net>"); +module_description("rtc driver for netronix ec"); +module_license("gpl"); +module_alias("platform:ntxec-rtc");
Real Time Clock (RTC)
435af89786c674583b188f7322fee5c03894b8b7
jonathan neusch fer
drivers
rtc
rtc: pcf8523: add alarm support
alarm support requires unconditionally disabling clock out because it is using the int1 pin.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add alarm support
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['pcf8523']
['c']
1
179
0
--- diff --git a/drivers/rtc/rtc-pcf8523.c b/drivers/rtc/rtc-pcf8523.c --- a/drivers/rtc/rtc-pcf8523.c +++ b/drivers/rtc/rtc-pcf8523.c +#include <linux/pm_wakeirq.h> +#define reg_control1_aie bit(1) + +#define reg_control2 0x01 +#define reg_control2_af bit(3) +#define reg_minute_alarm 0x0a +#define reg_hour_alarm 0x0b +#define reg_day_alarm 0x0c +#define reg_weekday_alarm 0x0d +#define alarm_dis bit(7) + +#define reg_tmr_clkout_ctrl 0x0f + +struct pcf8523 { + struct rtc_device *rtc; + struct i2c_client *client; +}; + +static irqreturn_t pcf8523_irq(int irq, void *dev_id) +{ + struct pcf8523 *pcf8523 = i2c_get_clientdata(dev_id); + u8 value; + int err; + + err = pcf8523_read(pcf8523->client, reg_control2, &value); + if (err < 0) + return irq_handled; + + if (value & reg_control2_af) { + value &= ~reg_control2_af; + pcf8523_write(pcf8523->client, reg_control2, value); + rtc_update_irq(pcf8523->rtc, 1, rtc_irqf | rtc_af); + + return irq_handled; + } + + return irq_none; +} + +static int pcf8523_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *tm) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 start = reg_minute_alarm, regs[4]; + struct i2c_msg msgs[2]; + u8 value; + int err; + + msgs[0].addr = client->addr; + msgs[0].flags = 0; + msgs[0].len = 1; + msgs[0].buf = &start; + + msgs[1].addr = client->addr; + msgs[1].flags = i2c_m_rd; + msgs[1].len = sizeof(regs); + msgs[1].buf = regs; + + err = i2c_transfer(client->adapter, msgs, array_size(msgs)); + if (err < 0) + return err; + + tm->time.tm_sec = 0; + tm->time.tm_min = bcd2bin(regs[0] & 0x7f); + tm->time.tm_hour = bcd2bin(regs[1] & 0x3f); + tm->time.tm_mday = bcd2bin(regs[2] & 0x3f); + tm->time.tm_wday = bcd2bin(regs[3] & 0x7); + + err = pcf8523_read(client, reg_control1, &value); + if (err < 0) + return err; + tm->enabled = !!(value & reg_control1_aie); + + err = pcf8523_read(client, reg_control2, &value); + if (err < 0) + return err; + tm->pending = !!(value & reg_control2_af); + + return 0; +} + +static int pcf8523_irq_enable(struct device *dev, unsigned int enabled) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 value; + int err; + + err = pcf8523_read(client, reg_control1, &value); + if (err < 0) + return err; + + value &= reg_control1_aie; + + if (enabled) + value |= reg_control1_aie; + + err = pcf8523_write(client, reg_control1, value); + if (err < 0) + return err; + + return 0; +} + +static int pcf8523_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *tm) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_msg msg; + u8 regs[5]; + int err; + + err = pcf8523_irq_enable(dev, 0); + if (err) + return err; + + err = pcf8523_write(client, reg_control2, 0); + if (err < 0) + return err; + + /* the alarm has no seconds, round up to nearest minute */ + if (tm->time.tm_sec) { + time64_t alarm_time = rtc_tm_to_time64(&tm->time); + + alarm_time += 60 - tm->time.tm_sec; + rtc_time64_to_tm(alarm_time, &tm->time); + } + + regs[0] = reg_minute_alarm; + regs[1] = bin2bcd(tm->time.tm_min); + regs[2] = bin2bcd(tm->time.tm_hour); + regs[3] = bin2bcd(tm->time.tm_mday); + regs[4] = alarm_dis; + msg.addr = client->addr; + msg.flags = 0; + msg.len = sizeof(regs); + msg.buf = regs; + err = i2c_transfer(client->adapter, &msg, 1); + if (err < 0) + return err; + + if (tm->enabled) + return pcf8523_irq_enable(dev, tm->enabled); + + return 0; +} + + .read_alarm = pcf8523_rtc_read_alarm, + .set_alarm = pcf8523_rtc_set_alarm, + .alarm_irq_enable = pcf8523_irq_enable, + struct pcf8523 *pcf8523; + bool wakeup_source = false; + pcf8523 = devm_kzalloc(&client->dev, sizeof(struct pcf8523), gfp_kernel); + if (!pcf8523) + return -enomem; + + i2c_set_clientdata(client, pcf8523); + pcf8523->client = client; + + pcf8523->rtc = rtc; + rtc->uie_unsupported = 1; + + if (client->irq > 0) { + err = pcf8523_write(client, reg_tmr_clkout_ctrl, 0x38); + if (err < 0) + return err; + + err = devm_request_threaded_irq(&client->dev, client->irq, + null, pcf8523_irq, + irqf_shared | irqf_oneshot | irqf_trigger_low, + dev_name(&rtc->dev), client); + if (err) + return err; + + dev_pm_set_wake_irq(&client->dev, client->irq); + } + +#ifdef config_of + wakeup_source = of_property_read_bool(client->dev.of_node, "wakeup-source"); +#endif + if (client->irq > 0 || wakeup_source) + device_init_wakeup(&client->dev, true);
Real Time Clock (RTC)
13e37b7fb75dfaeb4f5a72468f0bd32853628d28
alexandre belloni
drivers
rtc
rtc: ab-eoz9: add alarm support
add alarm support for the rtc-ab-eoz9.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add alarm support
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['ab-eoz9']
['c']
1
136
0
--- diff --git a/drivers/rtc/rtc-ab-eoz9.c b/drivers/rtc/rtc-ab-eoz9.c --- a/drivers/rtc/rtc-ab-eoz9.c +++ b/drivers/rtc/rtc-ab-eoz9.c +#include <linux/bitfield.h> +#define abeoz9_reg_alarm_sec 0x10 +#define abeoz9_bit_alarm_sec genmask(6, 0) +#define abeoz9_reg_alarm_min 0x11 +#define abeoz9_bit_alarm_min genmask(6, 0) +#define abeoz9_reg_alarm_hours 0x12 +#define abeoz9_bit_alarm_hours_pm bit(5) +#define abeoz9_bit_alarm_hours genmask(4, 0) +#define abeoz9_reg_alarm_days 0x13 +#define abeoz9_bit_alarm_days genmask(5, 0) +#define abeoz9_reg_alarm_weekdays 0x14 +#define abeoz9_bit_alarm_weekdays genmask(2, 0) +#define abeoz9_reg_alarm_months 0x15 +#define abeoz9_bit_alarm_months genmask(4, 0) +#define abeoz9_reg_alarm_years 0x16 + +#define abeoz9_alarm_len 7 +#define abeoz9_bit_alarm_ae bit(7) + +static int abeoz9_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) +{ + struct abeoz9_rtc_data *data = dev_get_drvdata(dev); + struct regmap *regmap = data->regmap; + u8 regs[abeoz9_alarm_len]; + u8 val[2]; + int ret; + + ret = abeoz9_check_validity(dev); + if (ret) + return ret; + + ret = regmap_bulk_read(regmap, abeoz9_reg_ctrl_int, val, sizeof(val)); + if (ret) + return ret; + + alarm->enabled = val[0] & abeoz9_reg_ctrl_int_aie; + alarm->pending = val[1] & abeoz9_reg_ctrl_int_flag_af; + + ret = regmap_bulk_read(regmap, abeoz9_reg_alarm_sec, regs, sizeof(regs)); + if (ret) + return ret; + + alarm->time.tm_sec = bcd2bin(field_get(abeoz9_bit_alarm_sec, regs[0])); + alarm->time.tm_min = bcd2bin(field_get(abeoz9_bit_alarm_min, regs[1])); + alarm->time.tm_hour = bcd2bin(field_get(abeoz9_bit_alarm_hours, regs[2])); + if (field_get(abeoz9_bit_alarm_hours_pm, regs[2])) + alarm->time.tm_hour += 12; + + alarm->time.tm_mday = bcd2bin(field_get(abeoz9_bit_alarm_days, regs[3])); + + return 0; +} + +static int abeoz9_rtc_alarm_irq_enable(struct device *dev, u32 enable) +{ + struct abeoz9_rtc_data *data = dev_get_drvdata(dev); + + return regmap_update_bits(data->regmap, abeoz9_reg_ctrl_int, + abeoz9_reg_ctrl_int_aie, + field_prep(abeoz9_reg_ctrl_int_aie, enable)); +} + +static int abeoz9_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) +{ + struct abeoz9_rtc_data *data = dev_get_drvdata(dev); + u8 regs[abeoz9_alarm_len] = {0}; + int ret; + + ret = regmap_update_bits(data->regmap, abeoz9_reg_ctrl_int_flag, + abeoz9_reg_ctrl_int_flag_af, 0); + if (ret) + return ret; + + regs[0] = abeoz9_bit_alarm_ae | field_prep(abeoz9_bit_alarm_sec, + bin2bcd(alarm->time.tm_sec)); + regs[1] = abeoz9_bit_alarm_ae | field_prep(abeoz9_bit_alarm_min, + bin2bcd(alarm->time.tm_min)); + regs[2] = abeoz9_bit_alarm_ae | field_prep(abeoz9_bit_alarm_hours, + bin2bcd(alarm->time.tm_hour)); + regs[3] = abeoz9_bit_alarm_ae | field_prep(abeoz9_bit_alarm_days, + bin2bcd(alarm->time.tm_mday)); + + ret = regmap_bulk_write(data->regmap, abeoz9_reg_alarm_sec, regs, + sizeof(regs)); + if (ret) + return ret; + + return abeoz9_rtc_alarm_irq_enable(dev, alarm->enabled); +} + +static irqreturn_t abeoz9_rtc_irq(int irq, void *dev) +{ + struct abeoz9_rtc_data *data = dev_get_drvdata(dev); + unsigned int val; + int ret; + + ret = regmap_read(data->regmap, abeoz9_reg_ctrl_int_flag, &val); + if (ret) + return irq_none; + + if (!field_get(abeoz9_reg_ctrl_int_flag_af, val)) + return irq_none; + + regmap_update_bits(data->regmap, abeoz9_reg_ctrl_int_flag, + abeoz9_reg_ctrl_int_flag_af, 0); + + rtc_update_irq(data->rtc, 1, rtc_irqf | rtc_af); + + return irq_handled; +} + +static const struct rtc_class_ops rtc_alarm_ops = { + .read_time = abeoz9_rtc_get_time, + .set_time = abeoz9_rtc_set_time, + .read_alarm = abeoz9_rtc_read_alarm, + .set_alarm = abeoz9_rtc_set_alarm, + .alarm_irq_enable = abeoz9_rtc_alarm_irq_enable, +}; + + data->rtc->uie_unsupported = 1; + + if (client->irq > 0) { + ret = devm_request_threaded_irq(dev, client->irq, null, + abeoz9_rtc_irq, + irqf_trigger_low | irqf_oneshot, + dev_name(dev), dev); + if (ret) { + dev_err(dev, "failed to request alarm irq "); + return ret; + } + } + + if (client->irq > 0 || device_property_read_bool(dev, "wakeup-source")) { + ret = device_init_wakeup(dev, true); + data->rtc->ops = &rtc_alarm_ops; + }
Real Time Clock (RTC)
e70e52e1bf1d6d0ea60e2f8294d5e76a8d8f5370
liam beguin
drivers
rtc
rtc: pm8xxx: add rtc support for pmic pmk8350
add the comaptible string for pmic pmk8350.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add rtc support for pmic pmk8350
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['pm8xxx']
['c']
1
11
0
--- diff --git a/drivers/rtc/rtc-pm8xxx.c b/drivers/rtc/rtc-pm8xxx.c --- a/drivers/rtc/rtc-pm8xxx.c +++ b/drivers/rtc/rtc-pm8xxx.c +static const struct pm8xxx_rtc_regs pmk8350_regs = { + .ctrl = 0x6146, + .write = 0x6140, + .read = 0x6148, + .alarm_rw = 0x6240, + .alarm_ctrl = 0x6246, + .alarm_ctrl2 = 0x6248, + .alarm_en = bit(7), +}; + + { .compatible = "qcom,pmk8350-rtc", .data = &pmk8350_regs },
Real Time Clock (RTC)
c8f0ca8b7a4b91f637ccd9a55f37dbac73d6f6bf
satya priya bjorn andersson bjorn andersson linaro org
drivers
rtc
rtc: rx6110: add acpi bindings to i2c
this allows the rx6110 driver to be automatically assigned to the right device on the i2c bus.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add acpi bindings to i2c
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['rx6110']
['c']
1
7
0
--- diff --git a/drivers/rtc/rtc-rx6110.c b/drivers/rtc/rtc-rx6110.c --- a/drivers/rtc/rtc-rx6110.c +++ b/drivers/rtc/rtc-rx6110.c +static const struct acpi_device_id rx6110_i2c_acpi_match[] = { + { "secc6110" }, + { } +}; +module_device_table(acpi, rx6110_i2c_acpi_match); + + .acpi_match_table = rx6110_i2c_acpi_match,
Real Time Clock (RTC)
8d69f62fddf6c1a8c7745120c4d6aab9322b001a
johannes hahn andy shevchenko andriy shevchenko linux intel com
drivers
rtc
firmware: xilinx: add pinctrl support
adding pinctrl support to query platform specific information (pins) from firmware.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add zynqmp pinctrl driver
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['h', 'c']
2
204
0
--- diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c +/** + * zynqmp_pm_pinctrl_request - request pin from firmware + * @pin: pin number to request + * + * this function requests pin from firmware. + * + * return: returns status, either success or error+reason. + */ +int zynqmp_pm_pinctrl_request(const u32 pin) +{ + return zynqmp_pm_invoke_fn(pm_pinctrl_request, pin, 0, 0, 0, null); +} +export_symbol_gpl(zynqmp_pm_pinctrl_request); + +/** + * zynqmp_pm_pinctrl_release - inform firmware that pin control is released + * @pin: pin number to release + * + * this function release pin from firmware. + * + * return: returns status, either success or error+reason. + */ +int zynqmp_pm_pinctrl_release(const u32 pin) +{ + return zynqmp_pm_invoke_fn(pm_pinctrl_release, pin, 0, 0, 0, null); +} +export_symbol_gpl(zynqmp_pm_pinctrl_release); + +/** + * zynqmp_pm_pinctrl_get_function - read function id set for the given pin + * @pin: pin number + * @id: buffer to store function id + * + * this function provides the function currently set for the given pin. + * + * return: returns status, either success or error+reason + */ +int zynqmp_pm_pinctrl_get_function(const u32 pin, u32 *id) +{ + u32 ret_payload[payload_arg_cnt]; + int ret; + + if (!id) + return -einval; + + ret = zynqmp_pm_invoke_fn(pm_pinctrl_get_function, pin, 0, + 0, 0, ret_payload); + *id = ret_payload[1]; + + return ret; +} +export_symbol_gpl(zynqmp_pm_pinctrl_get_function); + +/** + * zynqmp_pm_pinctrl_set_function - set requested function for the pin + * @pin: pin number + * @id: function id to set + * + * this function sets requested function for the given pin. + * + * return: returns status, either success or error+reason. + */ +int zynqmp_pm_pinctrl_set_function(const u32 pin, const u32 id) +{ + return zynqmp_pm_invoke_fn(pm_pinctrl_set_function, pin, id, + 0, 0, null); +} +export_symbol_gpl(zynqmp_pm_pinctrl_set_function); + +/** + * zynqmp_pm_pinctrl_get_config - get configuration parameter for the pin + * @pin: pin number + * @param: parameter to get + * @value: buffer to store parameter value + * + * this function gets requested configuration parameter for the given pin. + * + * return: returns status, either success or error+reason. + */ +int zynqmp_pm_pinctrl_get_config(const u32 pin, const u32 param, + u32 *value) +{ + u32 ret_payload[payload_arg_cnt]; + int ret; + + if (!value) + return -einval; + + ret = zynqmp_pm_invoke_fn(pm_pinctrl_config_param_get, pin, param, + 0, 0, ret_payload); + *value = ret_payload[1]; + + return ret; +} +export_symbol_gpl(zynqmp_pm_pinctrl_get_config); + +/** + * zynqmp_pm_pinctrl_set_config - set configuration parameter for the pin + * @pin: pin number + * @param: parameter to set + * @value: parameter value to set + * + * this function sets requested configuration parameter for the given pin. + * + * return: returns status, either success or error+reason. + */ +int zynqmp_pm_pinctrl_set_config(const u32 pin, const u32 param, + u32 value) +{ + return zynqmp_pm_invoke_fn(pm_pinctrl_config_param_set, pin, + param, value, 0, null); +} +export_symbol_gpl(zynqmp_pm_pinctrl_set_config); + diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h + pm_pinctrl_request = 28, + pm_pinctrl_release = 29, + pm_pinctrl_get_function = 30, + pm_pinctrl_set_function = 31, + pm_pinctrl_config_param_get = 32, + pm_pinctrl_config_param_set = 33, + pm_qid_pinctrl_get_num_pins = 6, + pm_qid_pinctrl_get_num_functions = 7, + pm_qid_pinctrl_get_num_function_groups = 8, + pm_qid_pinctrl_get_function_name = 9, + pm_qid_pinctrl_get_function_groups = 10, + pm_qid_pinctrl_get_pin_groups = 11, +enum pm_pinctrl_config_param { + pm_pinctrl_config_slew_rate = 0, + pm_pinctrl_config_bias_status = 1, + pm_pinctrl_config_pull_ctrl = 2, + pm_pinctrl_config_schmitt_cmos = 3, + pm_pinctrl_config_drive_strength = 4, + pm_pinctrl_config_voltage_status = 5, + pm_pinctrl_config_tri_state = 6, + pm_pinctrl_config_max = 7, +}; + +enum pm_pinctrl_slew_rate { + pm_pinctrl_slew_rate_fast = 0, + pm_pinctrl_slew_rate_slow = 1, +}; + +enum pm_pinctrl_bias_status { + pm_pinctrl_bias_disable = 0, + pm_pinctrl_bias_enable = 1, +}; + +enum pm_pinctrl_pull_ctrl { + pm_pinctrl_bias_pull_down = 0, + pm_pinctrl_bias_pull_up = 1, +}; + +enum pm_pinctrl_schmitt_cmos { + pm_pinctrl_input_type_cmos = 0, + pm_pinctrl_input_type_schmitt = 1, +}; + +enum pm_pinctrl_drive_strength { + pm_pinctrl_drive_strength_2ma = 0, + pm_pinctrl_drive_strength_4ma = 1, + pm_pinctrl_drive_strength_8ma = 2, + pm_pinctrl_drive_strength_12ma = 3, +}; + +int zynqmp_pm_pinctrl_request(const u32 pin); +int zynqmp_pm_pinctrl_release(const u32 pin); +int zynqmp_pm_pinctrl_get_function(const u32 pin, u32 *id); +int zynqmp_pm_pinctrl_set_function(const u32 pin, const u32 id); +int zynqmp_pm_pinctrl_get_config(const u32 pin, const u32 param, + u32 *value); +int zynqmp_pm_pinctrl_set_config(const u32 pin, const u32 param, + u32 value); + +static inline int zynqmp_pm_pinctrl_request(const u32 pin) +{ + return -enodev; +} + +static inline int zynqmp_pm_pinctrl_release(const u32 pin) +{ + return -enodev; +} + +static inline int zynqmp_pm_pinctrl_get_function(const u32 pin, u32 *id) +{ + return -enodev; +} + +static inline int zynqmp_pm_pinctrl_set_function(const u32 pin, const u32 id) +{ + return -enodev; +} + +static inline int zynqmp_pm_pinctrl_get_config(const u32 pin, const u32 param, + u32 *value) +{ + return -enodev; +} + +static inline int zynqmp_pm_pinctrl_set_config(const u32 pin, const u32 param, + u32 value) +{ + return -enodev; +}
Pin Controllers (pinctrl)
fa989ae7c7b38efbc6c3370571fb8a6f7350029a
sai krishna potthuri michal simek michal simek xilinx com
include
linux
firmware, xilinx
pinctrl: add xilinx zynqmp pinctrl driver support
adding pinctrl driver for xilinx zynqmp platform. this driver queries pin information from firmware and registers pin control accordingly.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add zynqmp pinctrl driver
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['kconfig', 'c', 'makefile']
3
921
0
--- diff --git a/drivers/pinctrl/kconfig b/drivers/pinctrl/kconfig --- a/drivers/pinctrl/kconfig +++ b/drivers/pinctrl/kconfig +config pinctrl_zynqmp + tristate "pinctrl driver for xilinx zynqmp" + depends on zynqmp_firmware + select pinmux + select generic_pinconf + default zynqmp_firmware + help + this selects the pinctrl driver for xilinx zynqmp platform. + this driver will query the pin information from the firmware + and allow configuring the pins. + configuration can include the mux function to select on those + pin(s)/group(s), and various pin configuration parameters + such as pull-up, slew rate, etc. + diff --git a/drivers/pinctrl/makefile b/drivers/pinctrl/makefile --- a/drivers/pinctrl/makefile +++ b/drivers/pinctrl/makefile +obj-$(config_pinctrl_zynqmp) += pinctrl-zynqmp.o diff --git a/drivers/pinctrl/pinctrl-zynqmp.c b/drivers/pinctrl/pinctrl-zynqmp.c --- /dev/null +++ b/drivers/pinctrl/pinctrl-zynqmp.c +// spdx-license-identifier: gpl-2.0 +/* + * zynqmp pin controller + * + * copyright (c) 2020 xilinx, inc. + * + * sai krishna potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> + * rajan vaja <rajan.vaja@xilinx.com> + */ + +#include <dt-bindings/pinctrl/pinctrl-zynqmp.h> + +#include <linux/init.h> +#include <linux/module.h> +#include <linux/of_address.h> +#include <linux/platform_device.h> +#include <linux/firmware/xlnx-zynqmp.h> + +#include <linux/pinctrl/pinmux.h> +#include <linux/pinctrl/pinconf-generic.h> + +#include "core.h" +#include "pinctrl-utils.h" + +#define zynqmp_pin_prefix "mio" +#define pinctrl_get_func_name_resp_len 16 +#define max_func_name_len 16 +#define max_group_pin 50 +#define max_pin_groups 50 +#define end_of_functions "end_of_functions" +#define num_groups_per_resp 6 + +#define pinctrl_get_func_groups_resp_len 12 +#define pinctrl_get_pin_groups_resp_len 12 +#define na_group 0xffff +#define reserved_group 0xfffe + +#define drive_strength_2ma 2 +#define drive_strength_4ma 4 +#define drive_strength_8ma 8 +#define drive_strength_12ma 12 + +/** + * struct zynqmp_pmux_function - a pinmux function + * @name: name of the pin mux function + * @groups: list of pin groups for this function + * @ngroups: number of entries in @groups + * @node: firmware node matching with the function + * + * this structure holds information about pin control function + * and function group names supporting that function. + */ +struct zynqmp_pmux_function { + char name[max_func_name_len]; + const char * const *groups; + unsigned int ngroups; +}; + +/** + * struct zynqmp_pinctrl - driver data + * @pctrl: pin control device + * @groups: pin groups + * @ngroups: number of @groups + * @funcs: pin mux functions + * @nfuncs: number of @funcs + * + * this struct is stored as driver data and used to retrieve + * information regarding pin control functions, groups and + * group pins. + */ +struct zynqmp_pinctrl { + struct pinctrl_dev *pctrl; + const struct zynqmp_pctrl_group *groups; + unsigned int ngroups; + const struct zynqmp_pmux_function *funcs; + unsigned int nfuncs; +}; + +/** + * struct zynqmp_pctrl_group - pin control group info + * @name: group name + * @pins: group pin numbers + * @npins: number of pins in the group + */ +struct zynqmp_pctrl_group { + const char *name; + unsigned int pins[max_group_pin]; + unsigned int npins; +}; + +static struct pinctrl_desc zynqmp_desc; + +static int zynqmp_pctrl_get_groups_count(struct pinctrl_dev *pctldev) +{ + struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); + + return pctrl->ngroups; +} + +static const char *zynqmp_pctrl_get_group_name(struct pinctrl_dev *pctldev, + unsigned int selector) +{ + struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); + + return pctrl->groups[selector].name; +} + +static int zynqmp_pctrl_get_group_pins(struct pinctrl_dev *pctldev, + unsigned int selector, + const unsigned int **pins, + unsigned int *npins) +{ + struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); + + *pins = pctrl->groups[selector].pins; + *npins = pctrl->groups[selector].npins; + + return 0; +} + +static const struct pinctrl_ops zynqmp_pctrl_ops = { + .get_groups_count = zynqmp_pctrl_get_groups_count, + .get_group_name = zynqmp_pctrl_get_group_name, + .get_group_pins = zynqmp_pctrl_get_group_pins, + .dt_node_to_map = pinconf_generic_dt_node_to_map_all, + .dt_free_map = pinctrl_utils_free_map, +}; + +static int zynqmp_pinmux_request_pin(struct pinctrl_dev *pctldev, + unsigned int pin) +{ + int ret; + + ret = zynqmp_pm_pinctrl_request(pin); + if (ret) { + dev_err(pctldev->dev, "request failed for pin %u ", pin); + return ret; + } + + return 0; +} + +static int zynqmp_pmux_get_functions_count(struct pinctrl_dev *pctldev) +{ + struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); + + return pctrl->nfuncs; +} + +static const char *zynqmp_pmux_get_function_name(struct pinctrl_dev *pctldev, + unsigned int selector) +{ + struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); + + return pctrl->funcs[selector].name; +} + +/** + * zynqmp_pmux_get_function_groups() - get groups for the function + * @pctldev: pincontrol device pointer. + * @selector: function id + * @groups: group names. + * @num_groups: number of function groups. + * + * get function's group count and group names. + */ +static int zynqmp_pmux_get_function_groups(struct pinctrl_dev *pctldev, + unsigned int selector, + const char * const **groups, + unsigned * const num_groups) +{ + struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); + + *groups = pctrl->funcs[selector].groups; + *num_groups = pctrl->funcs[selector].ngroups; + + return 0; +} + +/** + * zynqmp_pinmux_set_mux() - set requested function for the group + * @pctldev: pincontrol device pointer. + * @function: function id. + * @group: group id. + * + * loop through all pins of the group and call firmware api + * to set requested function for all pins in the group. + * + * return: 0 on success else error code. + */ +static int zynqmp_pinmux_set_mux(struct pinctrl_dev *pctldev, + unsigned int function, + unsigned int group) +{ + struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); + const struct zynqmp_pctrl_group *pgrp = &pctrl->groups[group]; + int ret, i; + + for (i = 0; i < pgrp->npins; i++) { + unsigned int pin = pgrp->pins[i]; + + ret = zynqmp_pm_pinctrl_set_function(pin, function); + if (ret) { + dev_err(pctldev->dev, "set mux failed for pin %u ", + pin); + return ret; + } + } + + return 0; +} + +static int zynqmp_pinmux_release_pin(struct pinctrl_dev *pctldev, + unsigned int pin) +{ + int ret; + + ret = zynqmp_pm_pinctrl_release(pin); + if (ret) { + dev_err(pctldev->dev, "free pin failed for pin %u ", + pin); + return ret; + } + + return 0; +} + +static const struct pinmux_ops zynqmp_pinmux_ops = { + .request = zynqmp_pinmux_request_pin, + .get_functions_count = zynqmp_pmux_get_functions_count, + .get_function_name = zynqmp_pmux_get_function_name, + .get_function_groups = zynqmp_pmux_get_function_groups, + .set_mux = zynqmp_pinmux_set_mux, + .free = zynqmp_pinmux_release_pin, +}; + +/** + * zynqmp_pinconf_cfg_get() - get config value for the pin + * @pctldev: pin control device pointer. + * @pin: pin number. + * @config: value of config param. + * + * get value of the requested configuration parameter for the + * given pin. + * + * return: 0 on success else error code. + */ +static int zynqmp_pinconf_cfg_get(struct pinctrl_dev *pctldev, + unsigned int pin, + unsigned long *config) +{ + unsigned int arg, param = pinconf_to_config_param(*config); + int ret; + + if (pin >= zynqmp_desc.npins) + return -eopnotsupp; + + switch (param) { + case pin_config_slew_rate: + param = pm_pinctrl_config_slew_rate; + ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); + break; + case pin_config_bias_pull_up: + param = pm_pinctrl_config_pull_ctrl; + ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); + if (arg != pm_pinctrl_bias_pull_up) + return -einval; + + arg = 1; + break; + case pin_config_bias_pull_down: + param = pm_pinctrl_config_pull_ctrl; + ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); + if (arg != pm_pinctrl_bias_pull_down) + return -einval; + + arg = 1; + break; + case pin_config_bias_disable: + param = pm_pinctrl_config_bias_status; + ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); + if (arg != pm_pinctrl_bias_disable) + return -einval; + + arg = 1; + break; + case pin_config_power_source: + param = pm_pinctrl_config_voltage_status; + ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); + break; + case pin_config_input_schmitt_enable: + param = pm_pinctrl_config_schmitt_cmos; + ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); + break; + case pin_config_drive_strength: + param = pm_pinctrl_config_drive_strength; + ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); + switch (arg) { + case pm_pinctrl_drive_strength_2ma: + arg = drive_strength_2ma; + break; + case pm_pinctrl_drive_strength_4ma: + arg = drive_strength_4ma; + break; + case pm_pinctrl_drive_strength_8ma: + arg = drive_strength_8ma; + break; + case pm_pinctrl_drive_strength_12ma: + arg = drive_strength_12ma; + break; + default: + /* invalid drive strength */ + dev_warn(pctldev->dev, + "invalid drive strength for pin %d ", + pin); + return -einval; + } + break; + default: + ret = -eopnotsupp; + break; + } + + if (ret) + return ret; + + param = pinconf_to_config_param(*config); + *config = pinconf_to_config_packed(param, arg); + + return 0; +} + +/** + * zynqmp_pinconf_cfg_set() - set requested config for the pin + * @pctldev: pincontrol device pointer. + * @pin: pin number. + * @configs: configuration to set. + * @num_configs: number of configurations. + * + * loop through all configurations and call firmware api + * to set requested configurations for the pin. + * + * return: 0 on success else error code. + */ +static int zynqmp_pinconf_cfg_set(struct pinctrl_dev *pctldev, + unsigned int pin, unsigned long *configs, + unsigned int num_configs) +{ + int i, ret; + + if (pin >= zynqmp_desc.npins) + return -eopnotsupp; + + for (i = 0; i < num_configs; i++) { + unsigned int param = pinconf_to_config_param(configs[i]); + unsigned int arg = pinconf_to_config_argument(configs[i]); + unsigned int value; + + switch (param) { + case pin_config_slew_rate: + param = pm_pinctrl_config_slew_rate; + ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); + break; + case pin_config_bias_pull_up: + param = pm_pinctrl_config_pull_ctrl; + arg = pm_pinctrl_bias_pull_up; + ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); + break; + case pin_config_bias_pull_down: + param = pm_pinctrl_config_pull_ctrl; + arg = pm_pinctrl_bias_pull_down; + ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); + break; + case pin_config_bias_disable: + param = pm_pinctrl_config_bias_status; + arg = pm_pinctrl_bias_disable; + ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); + break; + case pin_config_input_schmitt_enable: + param = pm_pinctrl_config_schmitt_cmos; + ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); + break; + case pin_config_drive_strength: + switch (arg) { + case drive_strength_2ma: + value = pm_pinctrl_drive_strength_2ma; + break; + case drive_strength_4ma: + value = pm_pinctrl_drive_strength_4ma; + break; + case drive_strength_8ma: + value = pm_pinctrl_drive_strength_8ma; + break; + case drive_strength_12ma: + value = pm_pinctrl_drive_strength_12ma; + break; + default: + /* invalid drive strength */ + dev_warn(pctldev->dev, + "invalid drive strength for pin %d ", + pin); + return -einval; + } + + param = pm_pinctrl_config_drive_strength; + ret = zynqmp_pm_pinctrl_set_config(pin, param, value); + break; + case pin_config_power_source: + param = pm_pinctrl_config_voltage_status; + ret = zynqmp_pm_pinctrl_get_config(pin, param, &value); + + if (arg != value) + dev_warn(pctldev->dev, + "invalid io standard requested for pin %d ", + pin); + + break; + case pin_config_bias_high_impedance: + case pin_config_mode_low_power: + /* + * these cases are mentioned in dts but configurable + * registers are unknown. so falling through to ignore + * boot time warnings as of now. + */ + ret = 0; + break; + default: + dev_warn(pctldev->dev, + "unsupported configuration parameter '%u' ", + param); + ret = -eopnotsupp; + break; + } + + param = pinconf_to_config_param(configs[i]); + arg = pinconf_to_config_argument(configs[i]); + if (ret) + dev_warn(pctldev->dev, + "failed to set: pin %u param %u value %u ", + pin, param, arg); + } + + return 0; +} + +/** + * zynqmp_pinconf_group_set() - set requested config for the group + * @pctldev: pincontrol device pointer. + * @selector: group id. + * @configs: configuration to set. + * @num_configs: number of configurations. + * + * call function to set configs for each pin in the group. + * + * return: 0 on success else error code. + */ +static int zynqmp_pinconf_group_set(struct pinctrl_dev *pctldev, + unsigned int selector, + unsigned long *configs, + unsigned int num_configs) +{ + int i, ret; + struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); + const struct zynqmp_pctrl_group *pgrp = &pctrl->groups[selector]; + + for (i = 0; i < pgrp->npins; i++) { + ret = zynqmp_pinconf_cfg_set(pctldev, pgrp->pins[i], configs, + num_configs); + if (ret) + return ret; + } + + return 0; +} + +static const struct pinconf_ops zynqmp_pinconf_ops = { + .is_generic = true, + .pin_config_get = zynqmp_pinconf_cfg_get, + .pin_config_set = zynqmp_pinconf_cfg_set, + .pin_config_group_set = zynqmp_pinconf_group_set, +}; + +static struct pinctrl_desc zynqmp_desc = { + .name = "zynqmp_pinctrl", + .owner = this_module, + .pctlops = &zynqmp_pctrl_ops, + .pmxops = &zynqmp_pinmux_ops, + .confops = &zynqmp_pinconf_ops, +}; + +static int zynqmp_pinctrl_get_function_groups(u32 fid, u32 index, u16 *groups) +{ + struct zynqmp_pm_query_data qdata = {0}; + u32 payload[payload_arg_cnt]; + int ret; + + qdata.qid = pm_qid_pinctrl_get_function_groups; + qdata.arg1 = fid; + qdata.arg2 = index; + + ret = zynqmp_pm_query_data(qdata, payload); + if (ret) + return ret; + + memcpy(groups, &payload[1], pinctrl_get_func_groups_resp_len); + + return ret; +} + +static int zynqmp_pinctrl_get_func_num_groups(u32 fid, unsigned int *ngroups) +{ + struct zynqmp_pm_query_data qdata = {0}; + u32 payload[payload_arg_cnt]; + int ret; + + qdata.qid = pm_qid_pinctrl_get_num_function_groups; + qdata.arg1 = fid; + + ret = zynqmp_pm_query_data(qdata, payload); + if (ret) + return ret; + + *ngroups = payload[1]; + + return ret; +} + +/** + * zynqmp_pinctrl_prepare_func_groups() - prepare function and groups data + * @dev: device pointer. + * @fid: function id. + * @func: function data. + * @groups: groups data. + * + * query firmware to get group ids for each function. firmware returns + * group ids. based on group index for the function, group names in + * the function are stored. for example, the first group in "eth0" function + * is named as "eth0_0" and second group as "eth0_1" and so on. + * + * based on the group id received from the firmware, function stores name of + * the group for that group id. for example, if "eth0" first group id + * is x, groups[x] name will be stored as "eth0_0". + * + * once done for each function, each function would have its group names + * and each groups would also have their names. + * + * return: 0 on success else error code. + */ +static int zynqmp_pinctrl_prepare_func_groups(struct device *dev, u32 fid, + struct zynqmp_pmux_function *func, + struct zynqmp_pctrl_group *groups) +{ + u16 resp[num_groups_per_resp] = {0}; + const char **fgroups; + int ret = 0, index, i; + + fgroups = devm_kzalloc(dev, sizeof(*fgroups) * func->ngroups, gfp_kernel); + if (!fgroups) + return -enomem; + + for (index = 0; index < func->ngroups; index += num_groups_per_resp) { + ret = zynqmp_pinctrl_get_function_groups(fid, index, resp); + if (ret) + return ret; + + for (i = 0; i < num_groups_per_resp; i++) { + if (resp[i] == na_group) + goto done; + + if (resp[i] == reserved_group) + continue; + + fgroups[index + i] = devm_kasprintf(dev, gfp_kernel, + "%s_%d_grp", + func->name, + index + i); + if (!fgroups[index + i]) + return -enomem; + + groups[resp[i]].name = devm_kasprintf(dev, gfp_kernel, + "%s_%d_grp", + func->name, + index + i); + if (!groups[resp[i]].name) + return -enomem; + } + } +done: + func->groups = fgroups; + + return ret; +} + +static void zynqmp_pinctrl_get_function_name(u32 fid, char *name) +{ + struct zynqmp_pm_query_data qdata = {0}; + u32 payload[payload_arg_cnt]; + + qdata.qid = pm_qid_pinctrl_get_function_name; + qdata.arg1 = fid; + + /* + * name of the function is maximum 16 bytes and cannot + * accommodate the return value in smc buffers, hence ignoring + * the return value for this specific qid. + */ + zynqmp_pm_query_data(qdata, payload); + memcpy(name, payload, pinctrl_get_func_name_resp_len); +} + +static int zynqmp_pinctrl_get_num_functions(unsigned int *nfuncs) +{ + struct zynqmp_pm_query_data qdata = {0}; + u32 payload[payload_arg_cnt]; + int ret; + + qdata.qid = pm_qid_pinctrl_get_num_functions; + + ret = zynqmp_pm_query_data(qdata, payload); + if (ret) + return ret; + + *nfuncs = payload[1]; + + return ret; +} + +static int zynqmp_pinctrl_get_pin_groups(u32 pin, u32 index, u16 *groups) +{ + struct zynqmp_pm_query_data qdata = {0}; + u32 payload[payload_arg_cnt]; + int ret; + + qdata.qid = pm_qid_pinctrl_get_pin_groups; + qdata.arg1 = pin; + qdata.arg2 = index; + + ret = zynqmp_pm_query_data(qdata, payload); + if (ret) + return ret; + + memcpy(groups, &payload[1], pinctrl_get_pin_groups_resp_len); + + return ret; +} + +static void zynqmp_pinctrl_group_add_pin(struct zynqmp_pctrl_group *group, + unsigned int pin) +{ + group->pins[group->npins++] = pin; +} + +/** + * zynqmp_pinctrl_create_pin_groups() - assign pins to respective groups + * @dev: device pointer. + * @groups: groups data. + * @pin: pin number. + * + * query firmware to get groups available for the given pin. + * based on the firmware response(group ids for the pin), add + * pin number to the respective group's pin array. + * + * once all pins are queries, each groups would have its number + * of pins and pin numbers data. + * + * return: 0 on success else error code. + */ +static int zynqmp_pinctrl_create_pin_groups(struct device *dev, + struct zynqmp_pctrl_group *groups, + unsigned int pin) +{ + u16 resp[num_groups_per_resp] = {0}; + int ret, i, index = 0; + + do { + ret = zynqmp_pinctrl_get_pin_groups(pin, index, resp); + if (ret) + return ret; + + for (i = 0; i < num_groups_per_resp; i++) { + if (resp[i] == na_group) + return ret; + + if (resp[i] == reserved_group) + continue; + + zynqmp_pinctrl_group_add_pin(&groups[resp[i]], pin); + } + index += num_groups_per_resp; + } while (index <= max_pin_groups); + + return ret; +} + +/** + * zynqmp_pinctrl_prepare_group_pins() - prepare each group's pin data + * @dev: device pointer. + * @groups: groups data. + * @ngroups: number of groups. + * + * prepare pin number and number of pins data for each pins. + * + * return: 0 on success else error code. + */ +static int zynqmp_pinctrl_prepare_group_pins(struct device *dev, + struct zynqmp_pctrl_group *groups, + unsigned int ngroups) +{ + unsigned int pin; + int ret; + + for (pin = 0; pin < zynqmp_desc.npins; pin++) { + ret = zynqmp_pinctrl_create_pin_groups(dev, groups, pin); + if (ret) + return ret; + } + + return 0; +} + +/** + * zynqmp_pinctrl_prepare_function_info() - prepare function info + * @dev: device pointer. + * @pctrl: pin control driver data. + * + * query firmware for functions, groups and pin information and + * prepare pin control driver data. + * + * query number of functions and number of function groups (number + * of groups in given function) to allocate required memory buffers + * for functions and groups. once buffers are allocated to store + * functions and groups data, query and store required information + * (number of groups and group names for each function, number of + * pins and pin numbers for each group). + * + * return: 0 on success else error code. + */ +static int zynqmp_pinctrl_prepare_function_info(struct device *dev, + struct zynqmp_pinctrl *pctrl) +{ + struct zynqmp_pmux_function *funcs; + struct zynqmp_pctrl_group *groups; + int ret, i; + + ret = zynqmp_pinctrl_get_num_functions(&pctrl->nfuncs); + if (ret) + return ret; + + funcs = devm_kzalloc(dev, sizeof(*funcs) * pctrl->nfuncs, gfp_kernel); + if (!funcs) + return -enomem; + + for (i = 0; i < pctrl->nfuncs; i++) { + zynqmp_pinctrl_get_function_name(i, funcs[i].name); + + ret = zynqmp_pinctrl_get_func_num_groups(i, &funcs[i].ngroups); + if (ret) + return ret; + + pctrl->ngroups += funcs[i].ngroups; + } + + groups = devm_kzalloc(dev, sizeof(*groups) * pctrl->ngroups, gfp_kernel); + if (!groups) + return -enomem; + + for (i = 0; i < pctrl->nfuncs; i++) { + ret = zynqmp_pinctrl_prepare_func_groups(dev, i, &funcs[i], + groups); + if (ret) + return ret; + } + + ret = zynqmp_pinctrl_prepare_group_pins(dev, groups, pctrl->ngroups); + if (ret) + return ret; + + pctrl->funcs = funcs; + pctrl->groups = groups; + + return ret; +} + +static int zynqmp_pinctrl_get_num_pins(unsigned int *npins) +{ + struct zynqmp_pm_query_data qdata = {0}; + u32 payload[payload_arg_cnt]; + int ret; + + qdata.qid = pm_qid_pinctrl_get_num_pins; + + ret = zynqmp_pm_query_data(qdata, payload); + if (ret) + return ret; + + *npins = payload[1]; + + return ret; +} + +/** + * zynqmp_pinctrl_prepare_pin_desc() - prepare pin description info + * @dev: device pointer. + * @zynqmp_pins: pin information. + * @npins: number of pins. + * + * query number of pins information from firmware and prepare pin + * description containing pin number and pin name. + * + * return: 0 on success else error code. + */ +static int zynqmp_pinctrl_prepare_pin_desc(struct device *dev, + const struct pinctrl_pin_desc + **zynqmp_pins, + unsigned int *npins) +{ + struct pinctrl_pin_desc *pins, *pin; + int ret; + int i; + + ret = zynqmp_pinctrl_get_num_pins(npins); + if (ret) + return ret; + + pins = devm_kzalloc(dev, sizeof(*pins) * *npins, gfp_kernel); + if (!pins) + return -enomem; + + for (i = 0; i < *npins; i++) { + pin = &pins[i]; + pin->number = i; + pin->name = devm_kasprintf(dev, gfp_kernel, "%s%d", + zynqmp_pin_prefix, i); + if (!pin->name) + return -enomem; + } + + *zynqmp_pins = pins; + + return 0; +} + +static int zynqmp_pinctrl_probe(struct platform_device *pdev) +{ + struct zynqmp_pinctrl *pctrl; + int ret; + + pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), gfp_kernel); + if (!pctrl) + return -enomem; + + ret = zynqmp_pinctrl_prepare_pin_desc(&pdev->dev, + &zynqmp_desc.pins, + &zynqmp_desc.npins); + if (ret) { + dev_err(&pdev->dev, "pin desc prepare fail with %d ", + ret); + return ret; + } + + ret = zynqmp_pinctrl_prepare_function_info(&pdev->dev, pctrl); + if (ret) { + dev_err(&pdev->dev, "function info prepare fail with %d ", + ret); + return ret; + } + + pctrl->pctrl = pinctrl_register(&zynqmp_desc, &pdev->dev, pctrl); + if (is_err(pctrl->pctrl)) + return ptr_err(pctrl->pctrl); + + platform_set_drvdata(pdev, pctrl); + + return ret; +} + +static int zynqmp_pinctrl_remove(struct platform_device *pdev) +{ + struct zynqmp_pinctrl *pctrl = platform_get_drvdata(pdev); + + pinctrl_unregister(pctrl->pctrl); + + return 0; +} + +static const struct of_device_id zynqmp_pinctrl_of_match[] = { + { .compatible = "xlnx,zynqmp-pinctrl" }, + { } +}; + +module_device_table(of, zynqmp_pinctrl_of_match); + +static struct platform_driver zynqmp_pinctrl_driver = { + .driver = { + .name = "zynqmp-pinctrl", + .of_match_table = zynqmp_pinctrl_of_match, + }, + .probe = zynqmp_pinctrl_probe, + .remove = zynqmp_pinctrl_remove, +}; + +module_platform_driver(zynqmp_pinctrl_driver); + +module_author("sai krishna potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>"); +module_description("zynqmp pin controller driver"); +module_license("gpl v2");
Pin Controllers (pinctrl)
8b242ca700f8043be56542efd8360056358a42ed
sai krishna potthuri
drivers
pinctrl
pinctrl: ingenic: add dmic pins support for ingenic socs.
1.add dmic pins support for the jz4780 soc. 2.add dmic pins support for the x1000 soc. 3.add dmic pins support for the x1500 soc. 4.add dmic pins support for the x1830 soc.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add dmic pins support for ingenic
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['ingenic']
['c']
1
22
0
--- diff --git a/drivers/pinctrl/pinctrl-ingenic.c b/drivers/pinctrl/pinctrl-ingenic.c --- a/drivers/pinctrl/pinctrl-ingenic.c +++ b/drivers/pinctrl/pinctrl-ingenic.c +static int jz4780_dmic_pins[] = { 0x32, 0x33, }; + ingenic_pin_group("dmic", jz4780_dmic, 1), +static const char *jz4780_dmic_groups[] = { "dmic", }; + { "dmic", jz4780_dmic_groups, array_size(jz4780_dmic_groups), }, +static int x1000_dmic0_pins[] = { 0x35, 0x36, }; +static int x1000_dmic1_pins[] = { 0x25, }; + ingenic_pin_group("dmic0", x1000_dmic0, 0), + ingenic_pin_group("dmic1", x1000_dmic1, 1), +static const char *x1000_dmic_groups[] = { "dmic0", "dmic1", }; + { "dmic", x1000_dmic_groups, array_size(x1000_dmic_groups), }, +static int x1500_dmic0_pins[] = { 0x35, 0x36, }; +static int x1500_dmic1_pins[] = { 0x25, }; + ingenic_pin_group("dmic0", x1500_dmic0, 0), + ingenic_pin_group("dmic1", x1500_dmic1, 1), +static const char *x1500_dmic_groups[] = { "dmic0", "dmic1", }; + { "dmic", x1500_dmic_groups, array_size(x1500_dmic_groups), }, +static int x1830_dmic0_pins[] = { 0x48, 0x59, }; +static int x1830_dmic1_pins[] = { 0x5a, }; + ingenic_pin_group("dmic0", x1830_dmic0, 2), + ingenic_pin_group("dmic1", x1830_dmic1, 2), +static const char *x1830_dmic_groups[] = { "dmic0", "dmic1", }; + { "dmic", x1830_dmic_groups, array_size(x1830_dmic_groups), },
Pin Controllers (pinctrl)
6adf2c5607377d22831af009241fc0a6e62d4077
zhou yanjie paul cercueil paul crapouillou net
drivers
pinctrl
pinctrl: ingenic: add pinctrl driver for jz4730.
add support for probing the pinctrl-ingenic driver on the jz4730 soc from ingenic.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add pinctrl driver for jz4730
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['ingenic']
['c']
1
216
16
--- diff --git a/drivers/pinctrl/pinctrl-ingenic.c b/drivers/pinctrl/pinctrl-ingenic.c --- a/drivers/pinctrl/pinctrl-ingenic.c +++ b/drivers/pinctrl/pinctrl-ingenic.c - * copyright (c) 2019 (zhou yanjie) <zhouyanjie@wanyeetech.com> + * copyright (c) 2019, 2020 (zhou yanjie) <zhouyanjie@wanyeetech.com> +#define jz4730_gpio_data 0x00 +#define jz4730_gpio_gpdir 0x04 +#define jz4730_gpio_gppur 0x0c +#define jz4730_gpio_gpalr 0x10 +#define jz4730_gpio_gpaur 0x14 +#define jz4730_gpio_gpidlr 0x18 +#define jz4730_gpio_gpidur 0x1c +#define jz4730_gpio_gpier 0x20 +#define jz4730_gpio_gpimr 0x24 +#define jz4730_gpio_gpfr 0x28 + +#define jz4730_pins_per_paired_reg 16 + id_jz4730, +static const u32 jz4730_pull_ups[4] = { + 0x3fa3320f, 0xf200ffff, 0xffffffff, 0xffffffff, +}; + +static const u32 jz4730_pull_downs[4] = { + 0x00000df0, 0x0dff0000, 0x00000000, 0x00000000, +}; + +static int jz4730_mmc_1bit_pins[] = { 0x27, 0x26, 0x22, }; +static int jz4730_mmc_4bit_pins[] = { 0x23, 0x24, 0x25, }; +static int jz4730_uart0_data_pins[] = { 0x7e, 0x7f, }; +static int jz4730_uart1_data_pins[] = { 0x18, 0x19, }; +static int jz4730_uart2_data_pins[] = { 0x6f, 0x7d, }; +static int jz4730_uart3_data_pins[] = { 0x10, 0x15, }; +static int jz4730_uart3_hwflow_pins[] = { 0x11, 0x17, }; +static int jz4730_lcd_8bit_pins[] = { + 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f, + 0x3a, 0x39, 0x38, +}; +static int jz4730_lcd_16bit_pins[] = { + 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, +}; +static int jz4730_lcd_special_pins[] = { 0x3d, 0x3c, 0x3e, 0x3f, }; +static int jz4730_lcd_generic_pins[] = { 0x3b, }; +static int jz4730_nand_cs1_pins[] = { 0x53, }; +static int jz4730_nand_cs2_pins[] = { 0x54, }; +static int jz4730_nand_cs3_pins[] = { 0x55, }; +static int jz4730_nand_cs4_pins[] = { 0x56, }; +static int jz4730_nand_cs5_pins[] = { 0x57, }; +static int jz4730_pwm_pwm0_pins[] = { 0x5e, }; +static int jz4730_pwm_pwm1_pins[] = { 0x5f, }; + +static u8 jz4730_lcd_8bit_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, }; + +static const struct group_desc jz4730_groups[] = { + ingenic_pin_group("mmc-1bit", jz4730_mmc_1bit, 1), + ingenic_pin_group("mmc-4bit", jz4730_mmc_4bit, 1), + ingenic_pin_group("uart0-data", jz4730_uart0_data, 1), + ingenic_pin_group("uart1-data", jz4730_uart1_data, 1), + ingenic_pin_group("uart2-data", jz4730_uart2_data, 1), + ingenic_pin_group("uart3-data", jz4730_uart3_data, 1), + ingenic_pin_group("uart3-hwflow", jz4730_uart3_hwflow, 1), + ingenic_pin_group_funcs("lcd-8bit", jz4730_lcd_8bit, jz4730_lcd_8bit_funcs), + ingenic_pin_group("lcd-16bit", jz4730_lcd_16bit, 1), + ingenic_pin_group("lcd-special", jz4730_lcd_special, 1), + ingenic_pin_group("lcd-generic", jz4730_lcd_generic, 1), + ingenic_pin_group("nand-cs1", jz4730_nand_cs1, 1), + ingenic_pin_group("nand-cs2", jz4730_nand_cs2, 1), + ingenic_pin_group("nand-cs3", jz4730_nand_cs3, 1), + ingenic_pin_group("nand-cs4", jz4730_nand_cs4, 1), + ingenic_pin_group("nand-cs5", jz4730_nand_cs5, 1), + ingenic_pin_group("pwm0", jz4730_pwm_pwm0, 1), + ingenic_pin_group("pwm1", jz4730_pwm_pwm1, 1), +}; + +static const char *jz4730_mmc_groups[] = { "mmc-1bit", "mmc-4bit", }; +static const char *jz4730_uart0_groups[] = { "uart0-data", }; +static const char *jz4730_uart1_groups[] = { "uart1-data", }; +static const char *jz4730_uart2_groups[] = { "uart2-data", }; +static const char *jz4730_uart3_groups[] = { "uart3-data", "uart3-hwflow", }; +static const char *jz4730_lcd_groups[] = { + "lcd-8bit", "lcd-16bit", "lcd-special", "lcd-generic", +}; +static const char *jz4730_nand_groups[] = { + "nand-cs1", "nand-cs2", "nand-cs3", "nand-cs4", "nand-cs5", +}; +static const char *jz4730_pwm0_groups[] = { "pwm0", }; +static const char *jz4730_pwm1_groups[] = { "pwm1", }; + +static const struct function_desc jz4730_functions[] = { + { "mmc", jz4730_mmc_groups, array_size(jz4730_mmc_groups), }, + { "uart0", jz4730_uart0_groups, array_size(jz4730_uart0_groups), }, + { "uart1", jz4730_uart1_groups, array_size(jz4730_uart1_groups), }, + { "uart2", jz4730_uart2_groups, array_size(jz4730_uart2_groups), }, + { "uart3", jz4730_uart3_groups, array_size(jz4730_uart3_groups), }, + { "lcd", jz4730_lcd_groups, array_size(jz4730_lcd_groups), }, + { "nand", jz4730_nand_groups, array_size(jz4730_nand_groups), }, + { "pwm0", jz4730_pwm0_groups, array_size(jz4730_pwm0_groups), }, + { "pwm1", jz4730_pwm1_groups, array_size(jz4730_pwm1_groups), }, +}; + +static const struct ingenic_chip_info jz4730_chip_info = { + .num_chips = 4, + .reg_offset = 0x30, + .version = id_jz4730, + .groups = jz4730_groups, + .num_groups = array_size(jz4730_groups), + .functions = jz4730_functions, + .num_functions = array_size(jz4730_functions), + .pull_ups = jz4730_pull_ups, + .pull_downs = jz4730_pull_downs, +}; + + if (jzgc->jzpc->info->version == id_jz4730) { + regmap_update_bits(jzgc->jzpc->map, jzgc->reg_base + reg, + bit(offset), set ? bit(offset) : 0); + return; + } + +static void jz4730_gpio_set_bits(struct ingenic_gpio_chip *jzgc, + u8 reg_upper, u8 reg_lower, u8 offset, u8 value) +{ + /* + * jz4730 function and irq registers support two-bits-per-pin + * definitions, split into two groups of 16. + */ + u8 reg = offset < jz4730_pins_per_paired_reg ? reg_lower : reg_upper; + unsigned int idx = offset % jz4730_pins_per_paired_reg; + unsigned int mask = genmask(1, 0) << idx * 2; + + regmap_update_bits(jzgc->jzpc->map, jzgc->reg_base + reg, mask, value << (idx * 2)); +} + - else + else if (jzgc->jzpc->info->version >= id_jz4740) + else + ingenic_gpio_set_bit(jzgc, jz4730_gpio_data, offset, !!value); - } else { + } else if (jzgc->jzpc->info->version >= id_jz4740) { + } else { + ingenic_gpio_set_bit(jzgc, jz4730_gpio_gpdir, offset, false); + jz4730_gpio_set_bits(jzgc, jz4730_gpio_gpidur, + jz4730_gpio_gpidlr, offset, (val2 << 1) | val1); + return; + int irq = irqd->hwirq; - ingenic_gpio_set_bit(jzgc, gpio_msk, irqd->hwirq, true); + if (jzgc->jzpc->info->version >= id_jz4740) + ingenic_gpio_set_bit(jzgc, gpio_msk, irq, true); + else + ingenic_gpio_set_bit(jzgc, jz4730_gpio_gpimr, irq, true); + int irq = irqd->hwirq; - ingenic_gpio_set_bit(jzgc, gpio_msk, irqd->hwirq, false); + if (jzgc->jzpc->info->version >= id_jz4740) + ingenic_gpio_set_bit(jzgc, gpio_msk, irq, false); + else + ingenic_gpio_set_bit(jzgc, jz4730_gpio_gpimr, irq, false); - else + else if (jzgc->jzpc->info->version >= id_jz4740) + else + ingenic_gpio_set_bit(jzgc, jz4730_gpio_gpier, irq, true); - else + else if (jzgc->jzpc->info->version >= id_jz4740) + else + ingenic_gpio_set_bit(jzgc, jz4730_gpio_gpier, irq, false); - else + else if (jzgc->jzpc->info->version >= id_jz4740) + else + ingenic_gpio_set_bit(jzgc, jz4730_gpio_gpfr, irq, false); - else + else if (jzgc->jzpc->info->version >= id_jz4740) + else + flag = ingenic_gpio_read_reg(jzgc, jz4730_gpio_gpfr); - regmap_write(jzpc->map, offt * jzpc->info->reg_offset + - (set ? reg_set(reg) : reg_clear(reg)), bit(idx)); + if (set) { + if (jzpc->info->version >= id_jz4740) + regmap_write(jzpc->map, offt * jzpc->info->reg_offset + + reg_set(reg), bit(idx)); + else + regmap_set_bits(jzpc->map, offt * jzpc->info->reg_offset + + reg, bit(idx)); + } else { + if (jzpc->info->version >= id_jz4740) + regmap_write(jzpc->map, offt * jzpc->info->reg_offset + + reg_clear(reg), bit(idx)); + else + regmap_clear_bits(jzpc->map, offt * jzpc->info->reg_offset + + reg, bit(idx)); + } +static inline void jz4730_config_pin_function(struct ingenic_pinctrl *jzpc, + unsigned int pin, u8 reg_upper, u8 reg_lower, u8 value) +{ + /* + * jz4730 function and irq registers support two-bits-per-pin + * definitions, split into two groups of 16. + */ + unsigned int idx = pin % jz4730_pins_per_paired_reg; + unsigned int mask = genmask(1, 0) << idx * 2; + unsigned int offt = pin / pins_per_gpio_chip; + u8 reg = (pin % pins_per_gpio_chip) < jz4730_pins_per_paired_reg ? reg_lower : reg_upper; + + regmap_update_bits(jzpc->map, offt * jzpc->info->reg_offset + reg, + mask, value << (idx * 2)); +} + + } else if (jzpc->info->version == id_jz4730) { + if (!ingenic_get_pin_config(jzpc, pin, jz4730_gpio_gpdir)) + return gpio_line_direction_in; + return gpio_line_direction_out; - } else { + } else if (jzpc->info->version >= id_jz4740) { + } else { + ingenic_config_pin(jzpc, pin, jz4730_gpio_gpier, false); + jz4730_config_pin_function(jzpc, pin, jz4730_gpio_gpaur, jz4730_gpio_gpalr, func); - } else { + } else if (jzpc->info->version >= id_jz4740) { + } else { + ingenic_config_pin(jzpc, pin, jz4730_gpio_gpier, false); + ingenic_config_pin(jzpc, pin, jz4730_gpio_gpdir, !input); + jz4730_config_pin_function(jzpc, pin, jz4730_gpio_gpaur, jz4730_gpio_gpalr, 0); - else + else if (jzpc->info->version >= id_jz4740) + else + pull = ingenic_get_pin_config(jzpc, pin, jz4730_gpio_gppur); - } else { + } else if (jzpc->info->version >= id_jz4740) { + } else { + ingenic_config_pin(jzpc, pin, jz4730_gpio_gppur, bias); - else + else if (jzpc->info->version >= id_jz4740) + else + ingenic_config_pin(jzpc, pin, jz4730_gpio_data, high); + { .compatible = "ingenic,jz4730-gpio", }, + { + .compatible = "ingenic,jz4730-pinctrl", + .data = if_enabled(config_mach_jz4730, &jz4730_chip_info) + },
Pin Controllers (pinctrl)
424f39691f2d6f69fdad9904c958880f4ebd3ece
zhou yanjie
drivers
pinctrl
pinctrl: ingenic: add pinctrl driver for jz4750.
add support for probing the pinctrl-ingenic driver on the jz4750 soc from ingenic.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add pinctrl driver for jz4750
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['ingenic']
['c']
1
142
0
--- diff --git a/drivers/pinctrl/pinctrl-ingenic.c b/drivers/pinctrl/pinctrl-ingenic.c --- a/drivers/pinctrl/pinctrl-ingenic.c +++ b/drivers/pinctrl/pinctrl-ingenic.c + id_jz4750, +static const u32 jz4750_pull_ups[6] = { + 0xffffffff, 0xffffffff, 0x3fffffff, 0x7fffffff, 0x1fff3fff, 0x00ffffff, +}; + +static const u32 jz4750_pull_downs[6] = { + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, +}; + +static int jz4750_uart0_data_pins[] = { 0xa4, 0xa5, }; +static int jz4750_uart0_hwflow_pins[] = { 0xa6, 0xa7, }; +static int jz4750_uart1_data_pins[] = { 0x90, 0x91, }; +static int jz4750_uart1_hwflow_pins[] = { 0x92, 0x93, }; +static int jz4750_uart2_data_pins[] = { 0x9b, 0x9a, }; +static int jz4750_uart3_data_pins[] = { 0xb0, 0xb1, }; +static int jz4750_uart3_hwflow_pins[] = { 0xb2, 0xb3, }; +static int jz4750_mmc0_1bit_pins[] = { 0xa8, 0xa9, 0xa0, }; +static int jz4750_mmc0_4bit_pins[] = { 0xa1, 0xa2, 0xa3, }; +static int jz4750_mmc0_8bit_pins[] = { 0xa4, 0xa5, 0xa6, 0xa7, }; +static int jz4750_mmc1_1bit_pins[] = { 0xae, 0xaf, 0xaa, }; +static int jz4750_mmc1_4bit_pins[] = { 0xab, 0xac, 0xad, }; +static int jz4750_i2c_pins[] = { 0x8c, 0x8d, }; +static int jz4750_cim_pins[] = { + 0x89, 0x8b, 0x8a, 0x88, + 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, +}; +static int jz4750_lcd_8bit_pins[] = { + 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, + 0x72, 0x73, 0x74, +}; +static int jz4750_lcd_16bit_pins[] = { + 0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f, +}; +static int jz4750_lcd_18bit_pins[] = { 0x70, 0x71, }; +static int jz4750_lcd_24bit_pins[] = { 0x76, 0x77, 0x78, 0x79, 0xb2, 0xb3, }; +static int jz4750_lcd_special_pins[] = { 0x76, 0x77, 0x78, 0x79, }; +static int jz4750_lcd_generic_pins[] = { 0x75, }; +static int jz4750_nand_cs1_pins[] = { 0x55, }; +static int jz4750_nand_cs2_pins[] = { 0x56, }; +static int jz4750_nand_cs3_pins[] = { 0x57, }; +static int jz4750_nand_cs4_pins[] = { 0x58, }; +static int jz4750_nand_fre_fwe_pins[] = { 0x5c, 0x5d, }; +static int jz4750_pwm_pwm0_pins[] = { 0x94, }; +static int jz4750_pwm_pwm1_pins[] = { 0x95, }; +static int jz4750_pwm_pwm2_pins[] = { 0x96, }; +static int jz4750_pwm_pwm3_pins[] = { 0x97, }; +static int jz4750_pwm_pwm4_pins[] = { 0x98, }; +static int jz4750_pwm_pwm5_pins[] = { 0x99, }; + +static const struct group_desc jz4750_groups[] = { + ingenic_pin_group("uart0-data", jz4750_uart0_data, 1), + ingenic_pin_group("uart0-hwflow", jz4750_uart0_hwflow, 1), + ingenic_pin_group("uart1-data", jz4750_uart1_data, 0), + ingenic_pin_group("uart1-hwflow", jz4750_uart1_hwflow, 0), + ingenic_pin_group("uart2-data", jz4750_uart2_data, 1), + ingenic_pin_group("uart3-data", jz4750_uart3_data, 0), + ingenic_pin_group("uart3-hwflow", jz4750_uart3_hwflow, 0), + ingenic_pin_group("mmc0-1bit", jz4750_mmc0_1bit, 0), + ingenic_pin_group("mmc0-4bit", jz4750_mmc0_4bit, 0), + ingenic_pin_group("mmc0-8bit", jz4750_mmc0_8bit, 0), + ingenic_pin_group("mmc1-1bit", jz4750_mmc1_1bit, 0), + ingenic_pin_group("mmc1-4bit", jz4750_mmc1_4bit, 0), + ingenic_pin_group("i2c-data", jz4750_i2c, 0), + ingenic_pin_group("cim-data", jz4750_cim, 0), + ingenic_pin_group("lcd-8bit", jz4750_lcd_8bit, 0), + ingenic_pin_group("lcd-16bit", jz4750_lcd_16bit, 0), + ingenic_pin_group("lcd-18bit", jz4750_lcd_18bit, 0), + ingenic_pin_group("lcd-24bit", jz4750_lcd_24bit, 1), + ingenic_pin_group("lcd-special", jz4750_lcd_special, 0), + ingenic_pin_group("lcd-generic", jz4750_lcd_generic, 0), + ingenic_pin_group("nand-cs1", jz4750_nand_cs1, 0), + ingenic_pin_group("nand-cs2", jz4750_nand_cs2, 0), + ingenic_pin_group("nand-cs3", jz4750_nand_cs3, 0), + ingenic_pin_group("nand-cs4", jz4750_nand_cs4, 0), + ingenic_pin_group("nand-fre-fwe", jz4750_nand_fre_fwe, 0), + ingenic_pin_group("pwm0", jz4750_pwm_pwm0, 0), + ingenic_pin_group("pwm1", jz4750_pwm_pwm1, 0), + ingenic_pin_group("pwm2", jz4750_pwm_pwm2, 0), + ingenic_pin_group("pwm3", jz4750_pwm_pwm3, 0), + ingenic_pin_group("pwm4", jz4750_pwm_pwm4, 0), + ingenic_pin_group("pwm5", jz4750_pwm_pwm5, 0), +}; + +static const char *jz4750_uart0_groups[] = { "uart0-data", "uart0-hwflow", }; +static const char *jz4750_uart1_groups[] = { "uart1-data", "uart1-hwflow", }; +static const char *jz4750_uart2_groups[] = { "uart2-data", }; +static const char *jz4750_uart3_groups[] = { "uart3-data", "uart3-hwflow", }; +static const char *jz4750_mmc0_groups[] = { + "mmc0-1bit", "mmc0-4bit", "mmc0-8bit", +}; +static const char *jz4750_mmc1_groups[] = { "mmc0-1bit", "mmc0-4bit", }; +static const char *jz4750_i2c_groups[] = { "i2c-data", }; +static const char *jz4750_cim_groups[] = { "cim-data", }; +static const char *jz4750_lcd_groups[] = { + "lcd-8bit", "lcd-16bit", "lcd-18bit", "lcd-24bit", + "lcd-special", "lcd-generic", +}; +static const char *jz4750_nand_groups[] = { + "nand-cs1", "nand-cs2", "nand-cs3", "nand-cs4", "nand-fre-fwe", +}; +static const char *jz4750_pwm0_groups[] = { "pwm0", }; +static const char *jz4750_pwm1_groups[] = { "pwm1", }; +static const char *jz4750_pwm2_groups[] = { "pwm2", }; +static const char *jz4750_pwm3_groups[] = { "pwm3", }; +static const char *jz4750_pwm4_groups[] = { "pwm4", }; +static const char *jz4750_pwm5_groups[] = { "pwm5", }; + +static const struct function_desc jz4750_functions[] = { + { "uart0", jz4750_uart0_groups, array_size(jz4750_uart0_groups), }, + { "uart1", jz4750_uart1_groups, array_size(jz4750_uart1_groups), }, + { "uart2", jz4750_uart2_groups, array_size(jz4750_uart2_groups), }, + { "uart3", jz4750_uart3_groups, array_size(jz4750_uart3_groups), }, + { "mmc0", jz4750_mmc0_groups, array_size(jz4750_mmc0_groups), }, + { "mmc1", jz4750_mmc1_groups, array_size(jz4750_mmc1_groups), }, + { "i2c", jz4750_i2c_groups, array_size(jz4750_i2c_groups), }, + { "cim", jz4750_cim_groups, array_size(jz4750_cim_groups), }, + { "lcd", jz4750_lcd_groups, array_size(jz4750_lcd_groups), }, + { "nand", jz4750_nand_groups, array_size(jz4750_nand_groups), }, + { "pwm0", jz4750_pwm0_groups, array_size(jz4750_pwm0_groups), }, + { "pwm1", jz4750_pwm1_groups, array_size(jz4750_pwm1_groups), }, + { "pwm2", jz4750_pwm2_groups, array_size(jz4750_pwm2_groups), }, + { "pwm3", jz4750_pwm3_groups, array_size(jz4750_pwm3_groups), }, + { "pwm4", jz4750_pwm4_groups, array_size(jz4750_pwm4_groups), }, + { "pwm5", jz4750_pwm5_groups, array_size(jz4750_pwm5_groups), }, +}; + +static const struct ingenic_chip_info jz4750_chip_info = { + .num_chips = 6, + .reg_offset = 0x100, + .version = id_jz4750, + .groups = jz4750_groups, + .num_groups = array_size(jz4750_groups), + .functions = jz4750_functions, + .num_functions = array_size(jz4750_functions), + .pull_ups = jz4750_pull_ups, + .pull_downs = jz4750_pull_downs, +}; + + { .compatible = "ingenic,jz4750-gpio", }, + .compatible = "ingenic,jz4750-pinctrl", + .data = if_enabled(config_mach_jz4750, &jz4750_chip_info) + },
Pin Controllers (pinctrl)
215c81a3e96964bd5d2e96aa22191ebff2d198c3
zhou yanjie andy shevchenko andy shevchenko gmail com paul cercueil paul crapouillou net
drivers
pinctrl
pinctrl: ingenic: add pinctrl driver for jz4755.
add support for probing the pinctrl-ingenic driver on the jz4755 soc from ingenic.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add pinctrl driver for jz4755
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['ingenic']
['c']
1
139
0
--- diff --git a/drivers/pinctrl/pinctrl-ingenic.c b/drivers/pinctrl/pinctrl-ingenic.c --- a/drivers/pinctrl/pinctrl-ingenic.c +++ b/drivers/pinctrl/pinctrl-ingenic.c + id_jz4755, +static const u32 jz4755_pull_ups[6] = { + 0xffffffff, 0xffffffff, 0x0fffffff, 0xffffffff, 0x33dc3fff, 0x0000fc00, +}; + +static const u32 jz4755_pull_downs[6] = { + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, +}; + +static int jz4755_uart0_data_pins[] = { 0x7c, 0x7d, }; +static int jz4755_uart0_hwflow_pins[] = { 0x7e, 0x7f, }; +static int jz4755_uart1_data_pins[] = { 0x97, 0x99, }; +static int jz4755_uart2_data_pins[] = { 0x9f, }; +static int jz4755_mmc0_1bit_pins[] = { 0x2f, 0x50, 0x5c, }; +static int jz4755_mmc0_4bit_pins[] = { 0x5d, 0x5b, 0x51, }; +static int jz4755_mmc1_1bit_pins[] = { 0x3a, 0x3d, 0x3c, }; +static int jz4755_mmc1_4bit_pins[] = { 0x3b, 0x3e, 0x3f, }; +static int jz4755_i2c_pins[] = { 0x8c, 0x8d, }; +static int jz4755_cim_pins[] = { + 0x89, 0x8b, 0x8a, 0x88, + 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, +}; +static int jz4755_lcd_8bit_pins[] = { + 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, + 0x72, 0x73, 0x74, +}; +static int jz4755_lcd_16bit_pins[] = { + 0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f, +}; +static int jz4755_lcd_18bit_pins[] = { 0x70, 0x71, }; +static int jz4755_lcd_24bit_pins[] = { 0x76, 0x77, 0x78, 0x79, 0x7a, 0x7b, }; +static int jz4755_lcd_special_pins[] = { 0x76, 0x77, 0x78, 0x79, }; +static int jz4755_lcd_generic_pins[] = { 0x75, }; +static int jz4755_nand_cs1_pins[] = { 0x55, }; +static int jz4755_nand_cs2_pins[] = { 0x56, }; +static int jz4755_nand_cs3_pins[] = { 0x57, }; +static int jz4755_nand_cs4_pins[] = { 0x58, }; +static int jz4755_nand_fre_fwe_pins[] = { 0x5c, 0x5d, }; +static int jz4755_pwm_pwm0_pins[] = { 0x94, }; +static int jz4755_pwm_pwm1_pins[] = { 0xab, }; +static int jz4755_pwm_pwm2_pins[] = { 0x96, }; +static int jz4755_pwm_pwm3_pins[] = { 0x97, }; +static int jz4755_pwm_pwm4_pins[] = { 0x98, }; +static int jz4755_pwm_pwm5_pins[] = { 0x99, }; + +static u8 jz4755_mmc0_1bit_funcs[] = { 2, 2, 1, }; +static u8 jz4755_mmc0_4bit_funcs[] = { 1, 0, 1, }; +static u8 jz4755_lcd_24bit_funcs[] = { 1, 1, 1, 1, 0, 0, }; + +static const struct group_desc jz4755_groups[] = { + ingenic_pin_group("uart0-data", jz4755_uart0_data, 0), + ingenic_pin_group("uart0-hwflow", jz4755_uart0_hwflow, 0), + ingenic_pin_group("uart1-data", jz4755_uart1_data, 0), + ingenic_pin_group("uart2-data", jz4755_uart2_data, 1), + ingenic_pin_group_funcs("mmc0-1bit", jz4755_mmc0_1bit, + jz4755_mmc0_1bit_funcs), + ingenic_pin_group_funcs("mmc0-4bit", jz4755_mmc0_4bit, + jz4755_mmc0_4bit_funcs), + ingenic_pin_group("mmc1-1bit", jz4755_mmc1_1bit, 1), + ingenic_pin_group("mmc1-4bit", jz4755_mmc1_4bit, 1), + ingenic_pin_group("i2c-data", jz4755_i2c, 0), + ingenic_pin_group("cim-data", jz4755_cim, 0), + ingenic_pin_group("lcd-8bit", jz4755_lcd_8bit, 0), + ingenic_pin_group("lcd-16bit", jz4755_lcd_16bit, 0), + ingenic_pin_group("lcd-18bit", jz4755_lcd_18bit, 0), + ingenic_pin_group_funcs("lcd-24bit", jz4755_lcd_24bit, + jz4755_lcd_24bit_funcs), + ingenic_pin_group("lcd-special", jz4755_lcd_special, 0), + ingenic_pin_group("lcd-generic", jz4755_lcd_generic, 0), + ingenic_pin_group("nand-cs1", jz4755_nand_cs1, 0), + ingenic_pin_group("nand-cs2", jz4755_nand_cs2, 0), + ingenic_pin_group("nand-cs3", jz4755_nand_cs3, 0), + ingenic_pin_group("nand-cs4", jz4755_nand_cs4, 0), + ingenic_pin_group("nand-fre-fwe", jz4755_nand_fre_fwe, 0), + ingenic_pin_group("pwm0", jz4755_pwm_pwm0, 0), + ingenic_pin_group("pwm1", jz4755_pwm_pwm1, 1), + ingenic_pin_group("pwm2", jz4755_pwm_pwm2, 0), + ingenic_pin_group("pwm3", jz4755_pwm_pwm3, 0), + ingenic_pin_group("pwm4", jz4755_pwm_pwm4, 0), + ingenic_pin_group("pwm5", jz4755_pwm_pwm5, 0), +}; + +static const char *jz4755_uart0_groups[] = { "uart0-data", "uart0-hwflow", }; +static const char *jz4755_uart1_groups[] = { "uart1-data", }; +static const char *jz4755_uart2_groups[] = { "uart2-data", }; +static const char *jz4755_mmc0_groups[] = { "mmc0-1bit", "mmc0-4bit", }; +static const char *jz4755_mmc1_groups[] = { "mmc0-1bit", "mmc0-4bit", }; +static const char *jz4755_i2c_groups[] = { "i2c-data", }; +static const char *jz4755_cim_groups[] = { "cim-data", }; +static const char *jz4755_lcd_groups[] = { + "lcd-8bit", "lcd-16bit", "lcd-18bit", "lcd-24bit", + "lcd-special", "lcd-generic", +}; +static const char *jz4755_nand_groups[] = { + "nand-cs1", "nand-cs2", "nand-cs3", "nand-cs4", "nand-fre-fwe", +}; +static const char *jz4755_pwm0_groups[] = { "pwm0", }; +static const char *jz4755_pwm1_groups[] = { "pwm1", }; +static const char *jz4755_pwm2_groups[] = { "pwm2", }; +static const char *jz4755_pwm3_groups[] = { "pwm3", }; +static const char *jz4755_pwm4_groups[] = { "pwm4", }; +static const char *jz4755_pwm5_groups[] = { "pwm5", }; + +static const struct function_desc jz4755_functions[] = { + { "uart0", jz4755_uart0_groups, array_size(jz4755_uart0_groups), }, + { "uart1", jz4755_uart1_groups, array_size(jz4755_uart1_groups), }, + { "uart2", jz4755_uart2_groups, array_size(jz4755_uart2_groups), }, + { "mmc0", jz4755_mmc0_groups, array_size(jz4755_mmc0_groups), }, + { "mmc1", jz4755_mmc1_groups, array_size(jz4755_mmc1_groups), }, + { "i2c", jz4755_i2c_groups, array_size(jz4755_i2c_groups), }, + { "cim", jz4755_cim_groups, array_size(jz4755_cim_groups), }, + { "lcd", jz4755_lcd_groups, array_size(jz4755_lcd_groups), }, + { "nand", jz4755_nand_groups, array_size(jz4755_nand_groups), }, + { "pwm0", jz4755_pwm0_groups, array_size(jz4755_pwm0_groups), }, + { "pwm1", jz4755_pwm1_groups, array_size(jz4755_pwm1_groups), }, + { "pwm2", jz4755_pwm2_groups, array_size(jz4755_pwm2_groups), }, + { "pwm3", jz4755_pwm3_groups, array_size(jz4755_pwm3_groups), }, + { "pwm4", jz4755_pwm4_groups, array_size(jz4755_pwm4_groups), }, + { "pwm5", jz4755_pwm5_groups, array_size(jz4755_pwm5_groups), }, +}; + +static const struct ingenic_chip_info jz4755_chip_info = { + .num_chips = 6, + .reg_offset = 0x100, + .version = id_jz4755, + .groups = jz4755_groups, + .num_groups = array_size(jz4755_groups), + .functions = jz4755_functions, + .num_functions = array_size(jz4755_functions), + .pull_ups = jz4755_pull_ups, + .pull_downs = jz4755_pull_downs, +}; + + { .compatible = "ingenic,jz4755-gpio", }, + { + .compatible = "ingenic,jz4755-pinctrl", + .data = if_enabled(config_mach_jz4755, &jz4755_chip_info) + }, + {
Pin Controllers (pinctrl)
b582b5a434d35b617c9fde73210138365d681c26
zhou yanjie andy shevchenko andy shevchenko gmail com paul cercueil paul crapouillou net
drivers
pinctrl
pinctrl: ingenic: add pinctrl driver for jz4775.
add support for probing the pinctrl-ingenic driver on the jz4775 soc from ingenic.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add pinctrl driver for jz4775
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['ingenic']
['c']
1
279
0
--- diff --git a/drivers/pinctrl/pinctrl-ingenic.c b/drivers/pinctrl/pinctrl-ingenic.c --- a/drivers/pinctrl/pinctrl-ingenic.c +++ b/drivers/pinctrl/pinctrl-ingenic.c + id_jz4775, +static const u32 jz4775_pull_ups[7] = { + 0x28ff00ff, 0xf030f3fc, 0x0fffffff, 0xfffe4000, 0xf0f0000c, 0x0000f00f, 0x0000f3c0, +}; + +static const u32 jz4775_pull_downs[7] = { + 0x00000000, 0x00030c03, 0x00000000, 0x00008000, 0x00000403, 0x00000ff0, 0x00030c00, +}; + +static int jz4775_uart0_data_pins[] = { 0xa0, 0xa3, }; +static int jz4775_uart0_hwflow_pins[] = { 0xa1, 0xa2, }; +static int jz4775_uart1_data_pins[] = { 0x7a, 0x7c, }; +static int jz4775_uart1_hwflow_pins[] = { 0x7b, 0x7d, }; +static int jz4775_uart2_data_c_pins[] = { 0x54, 0x4a, }; +static int jz4775_uart2_data_f_pins[] = { 0xa5, 0xa4, }; +static int jz4775_uart3_data_pins[] = { 0x1e, 0x1f, }; +static int jz4775_ssi_dt_a_pins[] = { 0x13, }; +static int jz4775_ssi_dt_d_pins[] = { 0x75, }; +static int jz4775_ssi_dr_a_pins[] = { 0x14, }; +static int jz4775_ssi_dr_d_pins[] = { 0x74, }; +static int jz4775_ssi_clk_a_pins[] = { 0x12, }; +static int jz4775_ssi_clk_d_pins[] = { 0x78, }; +static int jz4775_ssi_gpc_pins[] = { 0x76, }; +static int jz4775_ssi_ce0_a_pins[] = { 0x17, }; +static int jz4775_ssi_ce0_d_pins[] = { 0x79, }; +static int jz4775_ssi_ce1_pins[] = { 0x77, }; +static int jz4775_mmc0_1bit_a_pins[] = { 0x12, 0x13, 0x14, }; +static int jz4775_mmc0_4bit_a_pins[] = { 0x15, 0x16, 0x17, }; +static int jz4775_mmc0_8bit_a_pins[] = { 0x04, 0x05, 0x06, 0x07, }; +static int jz4775_mmc0_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, }; +static int jz4775_mmc0_4bit_e_pins[] = { 0x95, 0x96, 0x97, }; +static int jz4775_mmc1_1bit_d_pins[] = { 0x78, 0x79, 0x74, }; +static int jz4775_mmc1_4bit_d_pins[] = { 0x75, 0x76, 0x77, }; +static int jz4775_mmc1_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, }; +static int jz4775_mmc1_4bit_e_pins[] = { 0x95, 0x96, 0x97, }; +static int jz4775_mmc2_1bit_b_pins[] = { 0x3c, 0x3d, 0x34, }; +static int jz4775_mmc2_4bit_b_pins[] = { 0x35, 0x3e, 0x3f, }; +static int jz4775_mmc2_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, }; +static int jz4775_mmc2_4bit_e_pins[] = { 0x95, 0x96, 0x97, }; +static int jz4775_nemc_8bit_data_pins[] = { + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, +}; +static int jz4775_nemc_16bit_data_pins[] = { + 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf, 0xd0, 0xd1, +}; +static int jz4775_nemc_cle_ale_pins[] = { 0x20, 0x21, }; +static int jz4775_nemc_addr_pins[] = { 0x22, 0x23, 0x24, 0x25, }; +static int jz4775_nemc_rd_we_pins[] = { 0x10, 0x11, }; +static int jz4775_nemc_frd_fwe_pins[] = { 0x12, 0x13, }; +static int jz4775_nemc_wait_pins[] = { 0x1b, }; +static int jz4775_nemc_cs1_pins[] = { 0x15, }; +static int jz4775_nemc_cs2_pins[] = { 0x16, }; +static int jz4775_nemc_cs3_pins[] = { 0x17, }; +static int jz4775_i2c0_pins[] = { 0x7e, 0x7f, }; +static int jz4775_i2c1_pins[] = { 0x9e, 0x9f, }; +static int jz4775_i2c2_pins[] = { 0x80, 0x83, }; +static int jz4775_i2s_data_tx_pins[] = { 0xa3, }; +static int jz4775_i2s_data_rx_pins[] = { 0xa2, }; +static int jz4775_i2s_clk_txrx_pins[] = { 0xa0, 0xa1, }; +static int jz4775_i2s_sysclk_pins[] = { 0x83, }; +static int jz4775_dmic_pins[] = { 0xaa, 0xab, }; +static int jz4775_cim_pins[] = { + 0x26, 0x27, 0x28, 0x29, + 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f, 0x30, 0x31, +}; +static int jz4775_lcd_8bit_pins[] = { + 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x4c, 0x4d, + 0x48, 0x52, 0x53, +}; +static int jz4775_lcd_16bit_pins[] = { + 0x4e, 0x4f, 0x50, 0x51, 0x56, 0x57, 0x58, 0x59, +}; +static int jz4775_lcd_18bit_pins[] = { + 0x5a, 0x5b, +}; +static int jz4775_lcd_24bit_pins[] = { + 0x40, 0x41, 0x4a, 0x4b, 0x54, 0x55, +}; +static int jz4775_lcd_special_pins[] = { 0x54, 0x4a, 0x41, 0x40, }; +static int jz4775_lcd_generic_pins[] = { 0x49, }; +static int jz4775_pwm_pwm0_pins[] = { 0x80, }; +static int jz4775_pwm_pwm1_pins[] = { 0x81, }; +static int jz4775_pwm_pwm2_pins[] = { 0x82, }; +static int jz4775_pwm_pwm3_pins[] = { 0x83, }; +static int jz4775_mac_rmii_pins[] = { + 0xa9, 0xab, 0xaa, 0xac, 0xa5, 0xa4, 0xad, 0xae, 0xa6, 0xa8, +}; +static int jz4775_mac_mii_pins[] = { + 0x7b, 0x7a, 0x7d, 0x7c, 0xa7, 0x24, 0xaf, +}; +static int jz4775_mac_rgmii_pins[] = { + 0xa9, 0x7b, 0x7a, 0xab, 0xaa, 0xac, 0x7d, 0x7c, 0xa5, 0xa4, + 0xad, 0xae, 0xa7, 0xa6, +}; +static int jz4775_mac_gmii_pins[] = { + 0x31, 0x30, 0x2f, 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, + 0xa8, 0x28, 0x24, 0xaf, +}; +static int jz4775_otg_pins[] = { 0x8a, }; + +static u8 jz4775_uart3_data_funcs[] = { 0, 1, }; +static u8 jz4775_mac_mii_funcs[] = { 1, 1, 1, 1, 0, 1, 0, }; +static u8 jz4775_mac_rgmii_funcs[] = { + 0, 1, 1, 0, 0, 0, 1, 1, 0, 0, + 0, 0, 0, 0, +}; +static u8 jz4775_mac_gmii_funcs[] = { + 1, 1, 1, 1, 1, 1, 1, 1, + 0, 1, 1, 0, +}; + +static const struct group_desc jz4775_groups[] = { + ingenic_pin_group("uart0-data", jz4775_uart0_data, 0), + ingenic_pin_group("uart0-hwflow", jz4775_uart0_hwflow, 0), + ingenic_pin_group("uart1-data", jz4775_uart1_data, 0), + ingenic_pin_group("uart1-hwflow", jz4775_uart1_hwflow, 0), + ingenic_pin_group("uart2-data-c", jz4775_uart2_data_c, 2), + ingenic_pin_group("uart2-data-f", jz4775_uart2_data_f, 1), + ingenic_pin_group_funcs("uart3-data", jz4775_uart3_data, + jz4775_uart3_data_funcs), + ingenic_pin_group("ssi-dt-a", jz4775_ssi_dt_a, 2), + ingenic_pin_group("ssi-dt-d", jz4775_ssi_dt_d, 1), + ingenic_pin_group("ssi-dr-a", jz4775_ssi_dr_a, 2), + ingenic_pin_group("ssi-dr-d", jz4775_ssi_dr_d, 1), + ingenic_pin_group("ssi-clk-a", jz4775_ssi_clk_a, 2), + ingenic_pin_group("ssi-clk-d", jz4775_ssi_clk_d, 1), + ingenic_pin_group("ssi-gpc", jz4775_ssi_gpc, 1), + ingenic_pin_group("ssi-ce0-a", jz4775_ssi_ce0_a, 2), + ingenic_pin_group("ssi-ce0-d", jz4775_ssi_ce0_d, 1), + ingenic_pin_group("ssi-ce1", jz4775_ssi_ce1, 1), + ingenic_pin_group("mmc0-1bit-a", jz4775_mmc0_1bit_a, 1), + ingenic_pin_group("mmc0-4bit-a", jz4775_mmc0_4bit_a, 1), + ingenic_pin_group("mmc0-8bit-a", jz4775_mmc0_8bit_a, 1), + ingenic_pin_group("mmc0-1bit-e", jz4775_mmc0_1bit_e, 0), + ingenic_pin_group("mmc0-4bit-e", jz4775_mmc0_4bit_e, 0), + ingenic_pin_group("mmc1-1bit-d", jz4775_mmc1_1bit_d, 0), + ingenic_pin_group("mmc1-4bit-d", jz4775_mmc1_4bit_d, 0), + ingenic_pin_group("mmc1-1bit-e", jz4775_mmc1_1bit_e, 1), + ingenic_pin_group("mmc1-4bit-e", jz4775_mmc1_4bit_e, 1), + ingenic_pin_group("mmc2-1bit-b", jz4775_mmc2_1bit_b, 0), + ingenic_pin_group("mmc2-4bit-b", jz4775_mmc2_4bit_b, 0), + ingenic_pin_group("mmc2-1bit-e", jz4775_mmc2_1bit_e, 2), + ingenic_pin_group("mmc2-4bit-e", jz4775_mmc2_4bit_e, 2), + ingenic_pin_group("nemc-8bit-data", jz4775_nemc_8bit_data, 0), + ingenic_pin_group("nemc-16bit-data", jz4775_nemc_16bit_data, 1), + ingenic_pin_group("nemc-cle-ale", jz4775_nemc_cle_ale, 0), + ingenic_pin_group("nemc-addr", jz4775_nemc_addr, 0), + ingenic_pin_group("nemc-rd-we", jz4775_nemc_rd_we, 0), + ingenic_pin_group("nemc-frd-fwe", jz4775_nemc_frd_fwe, 0), + ingenic_pin_group("nemc-wait", jz4775_nemc_wait, 0), + ingenic_pin_group("nemc-cs1", jz4775_nemc_cs1, 0), + ingenic_pin_group("nemc-cs2", jz4775_nemc_cs2, 0), + ingenic_pin_group("nemc-cs3", jz4775_nemc_cs3, 0), + ingenic_pin_group("i2c0-data", jz4775_i2c0, 0), + ingenic_pin_group("i2c1-data", jz4775_i2c1, 0), + ingenic_pin_group("i2c2-data", jz4775_i2c2, 1), + ingenic_pin_group("i2s-data-tx", jz4775_i2s_data_tx, 1), + ingenic_pin_group("i2s-data-rx", jz4775_i2s_data_rx, 1), + ingenic_pin_group("i2s-clk-txrx", jz4775_i2s_clk_txrx, 1), + ingenic_pin_group("i2s-sysclk", jz4775_i2s_sysclk, 2), + ingenic_pin_group("dmic", jz4775_dmic, 1), + ingenic_pin_group("cim-data", jz4775_cim, 0), + ingenic_pin_group("lcd-8bit", jz4775_lcd_8bit, 0), + ingenic_pin_group("lcd-16bit", jz4775_lcd_16bit, 0), + ingenic_pin_group("lcd-18bit", jz4775_lcd_18bit, 0), + ingenic_pin_group("lcd-24bit", jz4775_lcd_24bit, 0), + ingenic_pin_group("lcd-generic", jz4775_lcd_generic, 0), + ingenic_pin_group("lcd-special", jz4775_lcd_special, 1), + ingenic_pin_group("pwm0", jz4775_pwm_pwm0, 0), + ingenic_pin_group("pwm1", jz4775_pwm_pwm1, 0), + ingenic_pin_group("pwm2", jz4775_pwm_pwm2, 0), + ingenic_pin_group("pwm3", jz4775_pwm_pwm3, 0), + ingenic_pin_group("mac-rmii", jz4775_mac_rmii, 0), + ingenic_pin_group_funcs("mac-mii", jz4775_mac_mii, + jz4775_mac_mii_funcs), + ingenic_pin_group_funcs("mac-rgmii", jz4775_mac_rgmii, + jz4775_mac_rgmii_funcs), + ingenic_pin_group_funcs("mac-gmii", jz4775_mac_gmii, + jz4775_mac_gmii_funcs), + ingenic_pin_group("otg-vbus", jz4775_otg, 0), +}; + +static const char *jz4775_uart0_groups[] = { "uart0-data", "uart0-hwflow", }; +static const char *jz4775_uart1_groups[] = { "uart1-data", "uart1-hwflow", }; +static const char *jz4775_uart2_groups[] = { "uart2-data-c", "uart2-data-f", }; +static const char *jz4775_uart3_groups[] = { "uart3-data", }; +static const char *jz4775_ssi_groups[] = { + "ssi-dt-a", "ssi-dt-d", + "ssi-dr-a", "ssi-dr-d", + "ssi-clk-a", "ssi-clk-d", + "ssi-gpc", + "ssi-ce0-a", "ssi-ce0-d", + "ssi-ce1", +}; +static const char *jz4775_mmc0_groups[] = { + "mmc0-1bit-a", "mmc0-4bit-a", "mmc0-8bit-a", + "mmc0-1bit-e", "mmc0-4bit-e", +}; +static const char *jz4775_mmc1_groups[] = { + "mmc1-1bit-d", "mmc1-4bit-d", + "mmc1-1bit-e", "mmc1-4bit-e", +}; +static const char *jz4775_mmc2_groups[] = { + "mmc2-1bit-b", "mmc2-4bit-b", + "mmc2-1bit-e", "mmc2-4bit-e", +}; +static const char *jz4775_nemc_groups[] = { + "nemc-8bit-data", "nemc-16bit-data", "nemc-cle-ale", + "nemc-addr", "nemc-rd-we", "nemc-frd-fwe", "nemc-wait", +}; +static const char *jz4775_cs1_groups[] = { "nemc-cs1", }; +static const char *jz4775_cs2_groups[] = { "nemc-cs2", }; +static const char *jz4775_cs3_groups[] = { "nemc-cs3", }; +static const char *jz4775_i2c0_groups[] = { "i2c0-data", }; +static const char *jz4775_i2c1_groups[] = { "i2c1-data", }; +static const char *jz4775_i2c2_groups[] = { "i2c2-data", }; +static const char *jz4775_i2s_groups[] = { + "i2s-data-tx", "i2s-data-rx", "i2s-clk-txrx", "i2s-sysclk", +}; +static const char *jz4775_dmic_groups[] = { "dmic", }; +static const char *jz4775_cim_groups[] = { "cim-data", }; +static const char *jz4775_lcd_groups[] = { + "lcd-8bit", "lcd-16bit", "lcd-18bit", "lcd-24bit", + "lcd-special", "lcd-generic", +}; +static const char *jz4775_pwm0_groups[] = { "pwm0", }; +static const char *jz4775_pwm1_groups[] = { "pwm1", }; +static const char *jz4775_pwm2_groups[] = { "pwm2", }; +static const char *jz4775_pwm3_groups[] = { "pwm3", }; +static const char *jz4775_mac_groups[] = { + "mac-rmii", "mac-mii", "mac-rgmii", "mac-gmii", +}; +static const char *jz4775_otg_groups[] = { "otg-vbus", }; + +static const struct function_desc jz4775_functions[] = { + { "uart0", jz4775_uart0_groups, array_size(jz4775_uart0_groups), }, + { "uart1", jz4775_uart1_groups, array_size(jz4775_uart1_groups), }, + { "uart2", jz4775_uart2_groups, array_size(jz4775_uart2_groups), }, + { "uart3", jz4775_uart3_groups, array_size(jz4775_uart3_groups), }, + { "ssi", jz4775_ssi_groups, array_size(jz4775_ssi_groups), }, + { "mmc0", jz4775_mmc0_groups, array_size(jz4775_mmc0_groups), }, + { "mmc1", jz4775_mmc1_groups, array_size(jz4775_mmc1_groups), }, + { "mmc2", jz4775_mmc2_groups, array_size(jz4775_mmc2_groups), }, + { "nemc", jz4775_nemc_groups, array_size(jz4775_nemc_groups), }, + { "nemc-cs1", jz4775_cs1_groups, array_size(jz4775_cs1_groups), }, + { "nemc-cs2", jz4775_cs2_groups, array_size(jz4775_cs2_groups), }, + { "nemc-cs3", jz4775_cs3_groups, array_size(jz4775_cs3_groups), }, + { "i2c0", jz4775_i2c0_groups, array_size(jz4775_i2c0_groups), }, + { "i2c1", jz4775_i2c1_groups, array_size(jz4775_i2c1_groups), }, + { "i2c2", jz4775_i2c2_groups, array_size(jz4775_i2c2_groups), }, + { "i2s", jz4775_i2s_groups, array_size(jz4775_i2s_groups), }, + { "dmic", jz4775_dmic_groups, array_size(jz4775_dmic_groups), }, + { "cim", jz4775_cim_groups, array_size(jz4775_cim_groups), }, + { "lcd", jz4775_lcd_groups, array_size(jz4775_lcd_groups), }, + { "pwm0", jz4775_pwm0_groups, array_size(jz4775_pwm0_groups), }, + { "pwm1", jz4775_pwm1_groups, array_size(jz4775_pwm1_groups), }, + { "pwm2", jz4775_pwm2_groups, array_size(jz4775_pwm2_groups), }, + { "pwm3", jz4775_pwm3_groups, array_size(jz4775_pwm3_groups), }, + { "mac", jz4775_mac_groups, array_size(jz4775_mac_groups), }, + { "otg", jz4775_otg_groups, array_size(jz4775_otg_groups), }, +}; + +static const struct ingenic_chip_info jz4775_chip_info = { + .num_chips = 7, + .reg_offset = 0x100, + .version = id_jz4775, + .groups = jz4775_groups, + .num_groups = array_size(jz4775_groups), + .functions = jz4775_functions, + .num_functions = array_size(jz4775_functions), + .pull_ups = jz4775_pull_ups, + .pull_downs = jz4775_pull_downs, +}; + + { .compatible = "ingenic,jz4775-gpio", }, + { + .compatible = "ingenic,jz4775-pinctrl", + .data = if_enabled(config_mach_jz4775, &jz4775_chip_info) + },
Pin Controllers (pinctrl)
0c9907404d24220f5a5196816d069f0e05dd4459
zhou yanjie andy shevchenko andy shevchenko gmail com paul cercueil paul crapouillou net
drivers
pinctrl
pinctrl: ingenic: add pinctrl driver for x2000.
add support for probing the pinctrl-ingenic driver on the x2000 soc from ingenic.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add pinctrl driver for x2000
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['ingenic']
['c']
1
579
13
--- diff --git a/drivers/pinctrl/pinctrl-ingenic.c b/drivers/pinctrl/pinctrl-ingenic.c --- a/drivers/pinctrl/pinctrl-ingenic.c +++ b/drivers/pinctrl/pinctrl-ingenic.c +#define x1830_gpio_sr 0x150 +#define x1830_gpio_smt 0x160 + +#define x2000_gpio_edg 0x70 +#define x2000_gpio_pepu 0x80 +#define x2000_gpio_pepd 0x90 +#define x2000_gpio_sr 0xd0 +#define x2000_gpio_smt 0xe0 + id_x2000, +static const u32 x2000_pull_ups[5] = { + 0x0003ffff, 0xffffffff, 0x1ff0ffff, 0xc7fe3f3f, 0x8fff003f, +}; + +static const u32 x2000_pull_downs[5] = { + 0x0003ffff, 0xffffffff, 0x1ff0ffff, 0x00000000, 0x8fff003f, +}; + +static int x2000_uart0_data_pins[] = { 0x77, 0x78, }; +static int x2000_uart0_hwflow_pins[] = { 0x79, 0x7a, }; +static int x2000_uart1_data_pins[] = { 0x57, 0x58, }; +static int x2000_uart1_hwflow_pins[] = { 0x55, 0x56, }; +static int x2000_uart2_data_pins[] = { 0x7e, 0x7f, }; +static int x2000_uart3_data_c_pins[] = { 0x59, 0x5a, }; +static int x2000_uart3_data_d_pins[] = { 0x62, 0x63, }; +static int x2000_uart3_hwflow_c_pins[] = { 0x5b, 0x5c, }; +static int x2000_uart3_hwflow_d_pins[] = { 0x60, 0x61, }; +static int x2000_uart4_data_a_pins[] = { 0x02, 0x03, }; +static int x2000_uart4_data_c_pins[] = { 0x4b, 0x4c, }; +static int x2000_uart4_hwflow_a_pins[] = { 0x00, 0x01, }; +static int x2000_uart4_hwflow_c_pins[] = { 0x49, 0x4a, }; +static int x2000_uart5_data_a_pins[] = { 0x04, 0x05, }; +static int x2000_uart5_data_c_pins[] = { 0x45, 0x46, }; +static int x2000_uart6_data_a_pins[] = { 0x06, 0x07, }; +static int x2000_uart6_data_c_pins[] = { 0x47, 0x48, }; +static int x2000_uart7_data_a_pins[] = { 0x08, 0x09, }; +static int x2000_uart7_data_c_pins[] = { 0x41, 0x42, }; +static int x2000_uart8_data_pins[] = { 0x3c, 0x3d, }; +static int x2000_uart9_data_pins[] = { 0x3e, 0x3f, }; +static int x2000_sfc0_d_pins[] = { 0x73, 0x74, 0x75, 0x76, 0x71, 0x72, }; +static int x2000_sfc0_e_pins[] = { 0x92, 0x93, 0x94, 0x95, 0x90, 0x91, }; +static int x2000_sfc1_pins[] = { 0x77, 0x78, 0x79, 0x7a, }; +static int x2000_ssi0_dt_b_pins[] = { 0x3e, }; +static int x2000_ssi0_dt_d_pins[] = { 0x69, }; +static int x2000_ssi0_dr_b_pins[] = { 0x3d, }; +static int x2000_ssi0_dr_d_pins[] = { 0x6a, }; +static int x2000_ssi0_clk_b_pins[] = { 0x3f, }; +static int x2000_ssi0_clk_d_pins[] = { 0x68, }; +static int x2000_ssi0_ce0_b_pins[] = { 0x3c, }; +static int x2000_ssi0_ce0_d_pins[] = { 0x6d, }; +static int x2000_ssi1_dt_c_pins[] = { 0x4b, }; +static int x2000_ssi1_dt_d_pins[] = { 0x72, }; +static int x2000_ssi1_dt_e_pins[] = { 0x91, }; +static int x2000_ssi1_dr_c_pins[] = { 0x4a, }; +static int x2000_ssi1_dr_d_pins[] = { 0x73, }; +static int x2000_ssi1_dr_e_pins[] = { 0x92, }; +static int x2000_ssi1_clk_c_pins[] = { 0x4c, }; +static int x2000_ssi1_clk_d_pins[] = { 0x71, }; +static int x2000_ssi1_clk_e_pins[] = { 0x90, }; +static int x2000_ssi1_ce0_c_pins[] = { 0x49, }; +static int x2000_ssi1_ce0_d_pins[] = { 0x76, }; +static int x2000_ssi1_ce0_e_pins[] = { 0x95, }; +static int x2000_mmc0_1bit_pins[] = { 0x71, 0x72, 0x73, }; +static int x2000_mmc0_4bit_pins[] = { 0x74, 0x75, 0x75, }; +static int x2000_mmc0_8bit_pins[] = { 0x77, 0x78, 0x79, 0x7a, }; +static int x2000_mmc1_1bit_pins[] = { 0x68, 0x69, 0x6a, }; +static int x2000_mmc1_4bit_pins[] = { 0x6b, 0x6c, 0x6d, }; +static int x2000_mmc2_1bit_pins[] = { 0x80, 0x81, 0x82, }; +static int x2000_mmc2_4bit_pins[] = { 0x83, 0x84, 0x85, }; +static int x2000_emc_8bit_data_pins[] = { + 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, +}; +static int x2000_emc_16bit_data_pins[] = { + 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f, +}; +static int x2000_emc_addr_pins[] = { + 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, + 0x28, 0x29, 0x2a, 0x2b, 0x2c, +}; +static int x2000_emc_rd_we_pins[] = { 0x2d, 0x2e, }; +static int x2000_emc_wait_pins[] = { 0x2f, }; +static int x2000_emc_cs1_pins[] = { 0x57, }; +static int x2000_emc_cs2_pins[] = { 0x58, }; +static int x2000_i2c0_pins[] = { 0x4e, 0x4d, }; +static int x2000_i2c1_c_pins[] = { 0x58, 0x57, }; +static int x2000_i2c1_d_pins[] = { 0x6c, 0x6b, }; +static int x2000_i2c2_b_pins[] = { 0x37, 0x36, }; +static int x2000_i2c2_d_pins[] = { 0x75, 0x74, }; +static int x2000_i2c2_e_pins[] = { 0x94, 0x93, }; +static int x2000_i2c3_a_pins[] = { 0x11, 0x10, }; +static int x2000_i2c3_d_pins[] = { 0x7f, 0x7e, }; +static int x2000_i2c4_c_pins[] = { 0x5a, 0x59, }; +static int x2000_i2c4_d_pins[] = { 0x61, 0x60, }; +static int x2000_i2c5_c_pins[] = { 0x5c, 0x5b, }; +static int x2000_i2c5_d_pins[] = { 0x65, 0x64, }; +static int x2000_i2s1_data_tx_pins[] = { 0x47, }; +static int x2000_i2s1_data_rx_pins[] = { 0x44, }; +static int x2000_i2s1_clk_tx_pins[] = { 0x45, 0x46, }; +static int x2000_i2s1_clk_rx_pins[] = { 0x42, 0x43, }; +static int x2000_i2s1_sysclk_tx_pins[] = { 0x48, }; +static int x2000_i2s1_sysclk_rx_pins[] = { 0x41, }; +static int x2000_i2s2_data_rx0_pins[] = { 0x0a, }; +static int x2000_i2s2_data_rx1_pins[] = { 0x0b, }; +static int x2000_i2s2_data_rx2_pins[] = { 0x0c, }; +static int x2000_i2s2_data_rx3_pins[] = { 0x0d, }; +static int x2000_i2s2_clk_rx_pins[] = { 0x11, 0x09, }; +static int x2000_i2s2_sysclk_rx_pins[] = { 0x07, }; +static int x2000_i2s3_data_tx0_pins[] = { 0x03, }; +static int x2000_i2s3_data_tx1_pins[] = { 0x04, }; +static int x2000_i2s3_data_tx2_pins[] = { 0x05, }; +static int x2000_i2s3_data_tx3_pins[] = { 0x06, }; +static int x2000_i2s3_clk_tx_pins[] = { 0x10, 0x02, }; +static int x2000_i2s3_sysclk_tx_pins[] = { 0x00, }; +static int x2000_dmic0_pins[] = { 0x54, 0x55, }; +static int x2000_dmic1_pins[] = { 0x56, }; +static int x2000_dmic2_pins[] = { 0x57, }; +static int x2000_dmic3_pins[] = { 0x58, }; +static int x2000_cim_8bit_pins[] = { + 0x0e, 0x0c, 0x0d, 0x4f, + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, +}; +static int x2000_cim_12bit_pins[] = { 0x08, 0x09, 0x0a, 0x0b, }; +static int x2000_lcd_tft_8bit_pins[] = { + 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, + 0x38, 0x3a, 0x39, 0x3b, +}; +static int x2000_lcd_tft_16bit_pins[] = { + 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f, +}; +static int x2000_lcd_tft_18bit_pins[] = { + 0x30, 0x31, +}; +static int x2000_lcd_tft_24bit_pins[] = { + 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, +}; +static int x2000_lcd_slcd_8bit_pins[] = { + 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, + 0x3a, 0x38, 0x3b, 0x30, 0x39, +}; +static int x2000_pwm_pwm0_c_pins[] = { 0x40, }; +static int x2000_pwm_pwm0_d_pins[] = { 0x7e, }; +static int x2000_pwm_pwm1_c_pins[] = { 0x41, }; +static int x2000_pwm_pwm1_d_pins[] = { 0x7f, }; +static int x2000_pwm_pwm2_c_pins[] = { 0x42, }; +static int x2000_pwm_pwm2_e_pins[] = { 0x80, }; +static int x2000_pwm_pwm3_c_pins[] = { 0x43, }; +static int x2000_pwm_pwm3_e_pins[] = { 0x81, }; +static int x2000_pwm_pwm4_c_pins[] = { 0x44, }; +static int x2000_pwm_pwm4_e_pins[] = { 0x82, }; +static int x2000_pwm_pwm5_c_pins[] = { 0x45, }; +static int x2000_pwm_pwm5_e_pins[] = { 0x83, }; +static int x2000_pwm_pwm6_c_pins[] = { 0x46, }; +static int x2000_pwm_pwm6_e_pins[] = { 0x84, }; +static int x2000_pwm_pwm7_c_pins[] = { 0x47, }; +static int x2000_pwm_pwm7_e_pins[] = { 0x85, }; +static int x2000_pwm_pwm8_pins[] = { 0x48, }; +static int x2000_pwm_pwm9_pins[] = { 0x49, }; +static int x2000_pwm_pwm10_pins[] = { 0x4a, }; +static int x2000_pwm_pwm11_pins[] = { 0x4b, }; +static int x2000_pwm_pwm12_pins[] = { 0x4c, }; +static int x2000_pwm_pwm13_pins[] = { 0x4d, }; +static int x2000_pwm_pwm14_pins[] = { 0x4e, }; +static int x2000_pwm_pwm15_pins[] = { 0x4f, }; +static int x2000_mac0_rmii_pins[] = { + 0x4b, 0x47, 0x46, 0x4a, 0x43, 0x42, 0x4c, 0x4d, 0x4e, 0x41, +}; +static int x2000_mac0_rgmii_pins[] = { + 0x4b, 0x49, 0x48, 0x47, 0x46, 0x4a, 0x45, 0x44, 0x43, 0x42, + 0x4c, 0x4d, 0x4f, 0x4e, 0x41, +}; +static int x2000_mac1_rmii_pins[] = { + 0x32, 0x2d, 0x2c, 0x31, 0x29, 0x28, 0x33, 0x34, 0x35, 0x37, +}; +static int x2000_mac1_rgmii_pins[] = { + 0x32, 0x2f, 0x2e, 0x2d, 0x2c, 0x31, 0x2b, 0x2a, 0x29, 0x28, + 0x33, 0x34, 0x36, 0x35, 0x37, +}; +static int x2000_otg_pins[] = { 0x96, }; + +static u8 x2000_cim_8bit_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, }; + +static const struct group_desc x2000_groups[] = { + ingenic_pin_group("uart0-data", x2000_uart0_data, 2), + ingenic_pin_group("uart0-hwflow", x2000_uart0_hwflow, 2), + ingenic_pin_group("uart1-data", x2000_uart1_data, 1), + ingenic_pin_group("uart1-hwflow", x2000_uart1_hwflow, 1), + ingenic_pin_group("uart2-data", x2000_uart2_data, 0), + ingenic_pin_group("uart3-data-c", x2000_uart3_data_c, 0), + ingenic_pin_group("uart3-data-d", x2000_uart3_data_d, 1), + ingenic_pin_group("uart3-hwflow-c", x2000_uart3_hwflow_c, 0), + ingenic_pin_group("uart3-hwflow-d", x2000_uart3_hwflow_d, 1), + ingenic_pin_group("uart4-data-a", x2000_uart4_data_a, 1), + ingenic_pin_group("uart4-data-c", x2000_uart4_data_c, 3), + ingenic_pin_group("uart4-hwflow-a", x2000_uart4_hwflow_a, 1), + ingenic_pin_group("uart4-hwflow-c", x2000_uart4_hwflow_c, 3), + ingenic_pin_group("uart5-data-a", x2000_uart5_data_a, 1), + ingenic_pin_group("uart5-data-c", x2000_uart5_data_c, 3), + ingenic_pin_group("uart6-data-a", x2000_uart6_data_a, 1), + ingenic_pin_group("uart6-data-c", x2000_uart6_data_c, 3), + ingenic_pin_group("uart7-data-a", x2000_uart7_data_a, 1), + ingenic_pin_group("uart7-data-c", x2000_uart7_data_c, 3), + ingenic_pin_group("uart8-data", x2000_uart8_data, 3), + ingenic_pin_group("uart9-data", x2000_uart9_data, 3), + ingenic_pin_group("sfc0-d", x2000_sfc0_d, 1), + ingenic_pin_group("sfc0-e", x2000_sfc0_e, 0), + ingenic_pin_group("sfc1", x2000_sfc1, 1), + ingenic_pin_group("ssi0-dt-b", x2000_ssi0_dt_b, 1), + ingenic_pin_group("ssi0-dt-d", x2000_ssi0_dt_d, 1), + ingenic_pin_group("ssi0-dr-b", x2000_ssi0_dr_b, 1), + ingenic_pin_group("ssi0-dr-d", x2000_ssi0_dr_d, 1), + ingenic_pin_group("ssi0-clk-b", x2000_ssi0_clk_b, 1), + ingenic_pin_group("ssi0-clk-d", x2000_ssi0_clk_d, 1), + ingenic_pin_group("ssi0-ce0-b", x2000_ssi0_ce0_b, 1), + ingenic_pin_group("ssi0-ce0-d", x2000_ssi0_ce0_d, 1), + ingenic_pin_group("ssi1-dt-c", x2000_ssi1_dt_c, 2), + ingenic_pin_group("ssi1-dt-d", x2000_ssi1_dt_d, 2), + ingenic_pin_group("ssi1-dt-e", x2000_ssi1_dt_e, 1), + ingenic_pin_group("ssi1-dr-c", x2000_ssi1_dr_c, 2), + ingenic_pin_group("ssi1-dr-d", x2000_ssi1_dr_d, 2), + ingenic_pin_group("ssi1-dr-e", x2000_ssi1_dr_e, 1), + ingenic_pin_group("ssi1-clk-c", x2000_ssi1_clk_c, 2), + ingenic_pin_group("ssi1-clk-d", x2000_ssi1_clk_d, 2), + ingenic_pin_group("ssi1-clk-e", x2000_ssi1_clk_e, 1), + ingenic_pin_group("ssi1-ce0-c", x2000_ssi1_ce0_c, 2), + ingenic_pin_group("ssi1-ce0-d", x2000_ssi1_ce0_d, 2), + ingenic_pin_group("ssi1-ce0-e", x2000_ssi1_ce0_e, 1), + ingenic_pin_group("mmc0-1bit", x2000_mmc0_1bit, 0), + ingenic_pin_group("mmc0-4bit", x2000_mmc0_4bit, 0), + ingenic_pin_group("mmc0-8bit", x2000_mmc0_8bit, 0), + ingenic_pin_group("mmc1-1bit", x2000_mmc1_1bit, 0), + ingenic_pin_group("mmc1-4bit", x2000_mmc1_4bit, 0), + ingenic_pin_group("mmc2-1bit", x2000_mmc2_1bit, 0), + ingenic_pin_group("mmc2-4bit", x2000_mmc2_4bit, 0), + ingenic_pin_group("emc-8bit-data", x2000_emc_8bit_data, 0), + ingenic_pin_group("emc-16bit-data", x2000_emc_16bit_data, 0), + ingenic_pin_group("emc-addr", x2000_emc_addr, 0), + ingenic_pin_group("emc-rd-we", x2000_emc_rd_we, 0), + ingenic_pin_group("emc-wait", x2000_emc_wait, 0), + ingenic_pin_group("emc-cs1", x2000_emc_cs1, 3), + ingenic_pin_group("emc-cs2", x2000_emc_cs2, 3), + ingenic_pin_group("i2c0-data", x2000_i2c0, 3), + ingenic_pin_group("i2c1-data-c", x2000_i2c1_c, 2), + ingenic_pin_group("i2c1-data-d", x2000_i2c1_d, 1), + ingenic_pin_group("i2c2-data-b", x2000_i2c2_b, 2), + ingenic_pin_group("i2c2-data-d", x2000_i2c2_d, 2), + ingenic_pin_group("i2c2-data-e", x2000_i2c2_e, 1), + ingenic_pin_group("i2c3-data-a", x2000_i2c3_a, 0), + ingenic_pin_group("i2c3-data-d", x2000_i2c3_d, 1), + ingenic_pin_group("i2c4-data-c", x2000_i2c4_c, 1), + ingenic_pin_group("i2c4-data-d", x2000_i2c4_d, 2), + ingenic_pin_group("i2c5-data-c", x2000_i2c5_c, 1), + ingenic_pin_group("i2c5-data-d", x2000_i2c5_d, 1), + ingenic_pin_group("i2s1-data-tx", x2000_i2s1_data_tx, 2), + ingenic_pin_group("i2s1-data-rx", x2000_i2s1_data_rx, 2), + ingenic_pin_group("i2s1-clk-tx", x2000_i2s1_clk_tx, 2), + ingenic_pin_group("i2s1-clk-rx", x2000_i2s1_clk_rx, 2), + ingenic_pin_group("i2s1-sysclk-tx", x2000_i2s1_sysclk_tx, 2), + ingenic_pin_group("i2s1-sysclk-rx", x2000_i2s1_sysclk_rx, 2), + ingenic_pin_group("i2s2-data-rx0", x2000_i2s2_data_rx0, 2), + ingenic_pin_group("i2s2-data-rx1", x2000_i2s2_data_rx1, 2), + ingenic_pin_group("i2s2-data-rx2", x2000_i2s2_data_rx2, 2), + ingenic_pin_group("i2s2-data-rx3", x2000_i2s2_data_rx3, 2), + ingenic_pin_group("i2s2-clk-rx", x2000_i2s2_clk_rx, 2), + ingenic_pin_group("i2s2-sysclk-rx", x2000_i2s2_sysclk_rx, 2), + ingenic_pin_group("i2s3-data-tx0", x2000_i2s3_data_tx0, 2), + ingenic_pin_group("i2s3-data-tx1", x2000_i2s3_data_tx1, 2), + ingenic_pin_group("i2s3-data-tx2", x2000_i2s3_data_tx2, 2), + ingenic_pin_group("i2s3-data-tx3", x2000_i2s3_data_tx3, 2), + ingenic_pin_group("i2s3-clk-tx", x2000_i2s3_clk_tx, 2), + ingenic_pin_group("i2s3-sysclk-tx", x2000_i2s3_sysclk_tx, 2), + ingenic_pin_group("dmic0", x2000_dmic0, 0), + ingenic_pin_group("dmic1", x2000_dmic1, 0), + ingenic_pin_group("dmic2", x2000_dmic2, 0), + ingenic_pin_group("dmic3", x2000_dmic3, 0), + ingenic_pin_group_funcs("cim-data-8bit", x2000_cim_8bit, + x2000_cim_8bit_funcs), + ingenic_pin_group("cim-data-12bit", x2000_cim_12bit, 0), + ingenic_pin_group("lcd-tft-8bit", x2000_lcd_tft_8bit, 1), + ingenic_pin_group("lcd-tft-16bit", x2000_lcd_tft_16bit, 1), + ingenic_pin_group("lcd-tft-18bit", x2000_lcd_tft_18bit, 1), + ingenic_pin_group("lcd-tft-24bit", x2000_lcd_tft_24bit, 1), + ingenic_pin_group("lcd-slcd-8bit", x2000_lcd_slcd_8bit, 2), + ingenic_pin_group("lcd-slcd-16bit", x2000_lcd_tft_16bit, 2), + ingenic_pin_group("pwm0-c", x2000_pwm_pwm0_c, 0), + ingenic_pin_group("pwm0-d", x2000_pwm_pwm0_d, 2), + ingenic_pin_group("pwm1-c", x2000_pwm_pwm1_c, 0), + ingenic_pin_group("pwm1-d", x2000_pwm_pwm1_d, 2), + ingenic_pin_group("pwm2-c", x2000_pwm_pwm2_c, 0), + ingenic_pin_group("pwm2-e", x2000_pwm_pwm2_e, 1), + ingenic_pin_group("pwm3-c", x2000_pwm_pwm3_c, 0), + ingenic_pin_group("pwm3-e", x2000_pwm_pwm3_e, 1), + ingenic_pin_group("pwm4-c", x2000_pwm_pwm4_c, 0), + ingenic_pin_group("pwm4-e", x2000_pwm_pwm4_e, 1), + ingenic_pin_group("pwm5-c", x2000_pwm_pwm5_c, 0), + ingenic_pin_group("pwm5-e", x2000_pwm_pwm5_e, 1), + ingenic_pin_group("pwm6-c", x2000_pwm_pwm6_c, 0), + ingenic_pin_group("pwm6-e", x2000_pwm_pwm6_e, 1), + ingenic_pin_group("pwm7-c", x2000_pwm_pwm7_c, 0), + ingenic_pin_group("pwm7-e", x2000_pwm_pwm7_e, 1), + ingenic_pin_group("pwm8", x2000_pwm_pwm8, 0), + ingenic_pin_group("pwm9", x2000_pwm_pwm9, 0), + ingenic_pin_group("pwm10", x2000_pwm_pwm10, 0), + ingenic_pin_group("pwm11", x2000_pwm_pwm11, 0), + ingenic_pin_group("pwm12", x2000_pwm_pwm12, 0), + ingenic_pin_group("pwm13", x2000_pwm_pwm13, 0), + ingenic_pin_group("pwm14", x2000_pwm_pwm14, 0), + ingenic_pin_group("pwm15", x2000_pwm_pwm15, 0), + ingenic_pin_group("mac0-rmii", x2000_mac0_rmii, 1), + ingenic_pin_group("mac0-rgmii", x2000_mac0_rgmii, 1), + ingenic_pin_group("mac1-rmii", x2000_mac1_rmii, 3), + ingenic_pin_group("mac1-rgmii", x2000_mac1_rgmii, 3), + ingenic_pin_group("otg-vbus", x2000_otg, 0), +}; + +static const char *x2000_uart0_groups[] = { "uart0-data", "uart0-hwflow", }; +static const char *x2000_uart1_groups[] = { "uart1-data", "uart1-hwflow", }; +static const char *x2000_uart2_groups[] = { "uart2-data", }; +static const char *x2000_uart3_groups[] = { + "uart3-data-c", "uart3-data-d", "uart3-hwflow-c", "uart3-hwflow-d", +}; +static const char *x2000_uart4_groups[] = { + "uart4-data-a", "uart4-data-c", "uart4-hwflow-a", "uart4-hwflow-c", +}; +static const char *x2000_uart5_groups[] = { "uart5-data-a", "uart5-data-c", }; +static const char *x2000_uart6_groups[] = { "uart6-data-a", "uart6-data-c", }; +static const char *x2000_uart7_groups[] = { "uart7-data-a", "uart7-data-c", }; +static const char *x2000_uart8_groups[] = { "uart8-data", }; +static const char *x2000_uart9_groups[] = { "uart9-data", }; +static const char *x2000_sfc_groups[] = { "sfc0-d", "sfc0-e", "sfc1", }; +static const char *x2000_ssi0_groups[] = { + "ssi0-dt-b", "ssi0-dt-d", + "ssi0-dr-b", "ssi0-dr-d", + "ssi0-clk-b", "ssi0-clk-d", + "ssi0-ce0-b", "ssi0-ce0-d", +}; +static const char *x2000_ssi1_groups[] = { + "ssi1-dt-c", "ssi1-dt-d", "ssi1-dt-e", + "ssi1-dr-c", "ssi1-dr-d", "ssi1-dr-e", + "ssi1-clk-c", "ssi1-clk-d", "ssi1-clk-e", + "ssi1-ce0-c", "ssi1-ce0-d", "ssi1-ce0-e", +}; +static const char *x2000_mmc0_groups[] = { "mmc0-1bit", "mmc0-4bit", "mmc0-8bit", }; +static const char *x2000_mmc1_groups[] = { "mmc1-1bit", "mmc1-4bit", }; +static const char *x2000_mmc2_groups[] = { "mmc2-1bit", "mmc2-4bit", }; +static const char *x2000_emc_groups[] = { + "emc-8bit-data", "emc-16bit-data", + "emc-addr", "emc-rd-we", "emc-wait", +}; +static const char *x2000_cs1_groups[] = { "emc-cs1", }; +static const char *x2000_cs2_groups[] = { "emc-cs2", }; +static const char *x2000_i2c0_groups[] = { "i2c0-data", }; +static const char *x2000_i2c1_groups[] = { "i2c1-data-c", "i2c1-data-d", }; +static const char *x2000_i2c2_groups[] = { "i2c2-data-b", "i2c2-data-d", }; +static const char *x2000_i2c3_groups[] = { "i2c3-data-a", "i2c3-data-d", }; +static const char *x2000_i2c4_groups[] = { "i2c4-data-c", "i2c4-data-d", }; +static const char *x2000_i2c5_groups[] = { "i2c5-data-c", "i2c5-data-d", }; +static const char *x2000_i2s1_groups[] = { + "i2s1-data-tx", "i2s1-data-rx", + "i2s1-clk-tx", "i2s1-clk-rx", + "i2s1-sysclk-tx", "i2s1-sysclk-rx", +}; +static const char *x2000_i2s2_groups[] = { + "i2s2-data-rx0", "i2s2-data-rx1", "i2s2-data-rx2", "i2s2-data-rx3", + "i2s2-clk-rx", "i2s2-sysclk-rx", +}; +static const char *x2000_i2s3_groups[] = { + "i2s3-data-tx0", "i2s3-data-tx1", "i2s3-data-tx2", "i2s3-data-tx3", + "i2s3-clk-tx", "i2s3-sysclk-tx", +}; +static const char *x2000_dmic_groups[] = { "dmic0", "dmic1", "dmic2", "dmic3", }; +static const char *x2000_cim_groups[] = { "cim-data-8bit", "cim-data-12bit", }; +static const char *x2000_lcd_groups[] = { + "lcd-tft-8bit", "lcd-tft-16bit", "lcd-tft-18bit", "lcd-tft-24bit", + "lcd-slcd-8bit", "lcd-slcd-16bit", +}; +static const char *x2000_pwm0_groups[] = { "pwm0-c", "pwm0-d", }; +static const char *x2000_pwm1_groups[] = { "pwm1-c", "pwm1-d", }; +static const char *x2000_pwm2_groups[] = { "pwm2-c", "pwm2-e", }; +static const char *x2000_pwm3_groups[] = { "pwm3-c", "pwm3-r", }; +static const char *x2000_pwm4_groups[] = { "pwm4-c", "pwm4-e", }; +static const char *x2000_pwm5_groups[] = { "pwm5-c", "pwm5-e", }; +static const char *x2000_pwm6_groups[] = { "pwm6-c", "pwm6-e", }; +static const char *x2000_pwm7_groups[] = { "pwm7-c", "pwm7-e", }; +static const char *x2000_pwm8_groups[] = { "pwm8", }; +static const char *x2000_pwm9_groups[] = { "pwm9", }; +static const char *x2000_pwm10_groups[] = { "pwm10", }; +static const char *x2000_pwm11_groups[] = { "pwm11", }; +static const char *x2000_pwm12_groups[] = { "pwm12", }; +static const char *x2000_pwm13_groups[] = { "pwm13", }; +static const char *x2000_pwm14_groups[] = { "pwm14", }; +static const char *x2000_pwm15_groups[] = { "pwm15", }; +static const char *x2000_mac0_groups[] = { "mac0-rmii", "mac0-rgmii", }; +static const char *x2000_mac1_groups[] = { "mac1-rmii", "mac1-rgmii", }; +static const char *x2000_otg_groups[] = { "otg-vbus", }; + +static const struct function_desc x2000_functions[] = { + { "uart0", x2000_uart0_groups, array_size(x2000_uart0_groups), }, + { "uart1", x2000_uart1_groups, array_size(x2000_uart1_groups), }, + { "uart2", x2000_uart2_groups, array_size(x2000_uart2_groups), }, + { "uart3", x2000_uart3_groups, array_size(x2000_uart3_groups), }, + { "uart4", x2000_uart4_groups, array_size(x2000_uart4_groups), }, + { "uart5", x2000_uart5_groups, array_size(x2000_uart5_groups), }, + { "uart6", x2000_uart6_groups, array_size(x2000_uart6_groups), }, + { "uart7", x2000_uart7_groups, array_size(x2000_uart7_groups), }, + { "uart8", x2000_uart8_groups, array_size(x2000_uart8_groups), }, + { "uart9", x2000_uart9_groups, array_size(x2000_uart9_groups), }, + { "sfc", x2000_sfc_groups, array_size(x2000_sfc_groups), }, + { "ssi0", x2000_ssi0_groups, array_size(x2000_ssi0_groups), }, + { "ssi1", x2000_ssi1_groups, array_size(x2000_ssi1_groups), }, + { "mmc0", x2000_mmc0_groups, array_size(x2000_mmc0_groups), }, + { "mmc1", x2000_mmc1_groups, array_size(x2000_mmc1_groups), }, + { "mmc2", x2000_mmc2_groups, array_size(x2000_mmc2_groups), }, + { "emc", x2000_emc_groups, array_size(x2000_emc_groups), }, + { "emc-cs1", x2000_cs1_groups, array_size(x2000_cs1_groups), }, + { "emc-cs2", x2000_cs2_groups, array_size(x2000_cs2_groups), }, + { "i2c0", x2000_i2c0_groups, array_size(x2000_i2c0_groups), }, + { "i2c1", x2000_i2c1_groups, array_size(x2000_i2c1_groups), }, + { "i2c2", x2000_i2c2_groups, array_size(x2000_i2c2_groups), }, + { "i2c3", x2000_i2c3_groups, array_size(x2000_i2c3_groups), }, + { "i2c4", x2000_i2c4_groups, array_size(x2000_i2c4_groups), }, + { "i2c5", x2000_i2c5_groups, array_size(x2000_i2c5_groups), }, + { "i2s1", x2000_i2s1_groups, array_size(x2000_i2s1_groups), }, + { "i2s2", x2000_i2s2_groups, array_size(x2000_i2s2_groups), }, + { "i2s3", x2000_i2s3_groups, array_size(x2000_i2s3_groups), }, + { "dmic", x2000_dmic_groups, array_size(x2000_dmic_groups), }, + { "cim", x2000_cim_groups, array_size(x2000_cim_groups), }, + { "lcd", x2000_lcd_groups, array_size(x2000_lcd_groups), }, + { "pwm0", x2000_pwm0_groups, array_size(x2000_pwm0_groups), }, + { "pwm1", x2000_pwm1_groups, array_size(x2000_pwm1_groups), }, + { "pwm2", x2000_pwm2_groups, array_size(x2000_pwm2_groups), }, + { "pwm3", x2000_pwm3_groups, array_size(x2000_pwm3_groups), }, + { "pwm4", x2000_pwm4_groups, array_size(x2000_pwm4_groups), }, + { "pwm5", x2000_pwm5_groups, array_size(x2000_pwm5_groups), }, + { "pwm6", x2000_pwm6_groups, array_size(x2000_pwm6_groups), }, + { "pwm7", x2000_pwm7_groups, array_size(x2000_pwm7_groups), }, + { "pwm8", x2000_pwm8_groups, array_size(x2000_pwm8_groups), }, + { "pwm9", x2000_pwm9_groups, array_size(x2000_pwm9_groups), }, + { "pwm10", x2000_pwm10_groups, array_size(x2000_pwm10_groups), }, + { "pwm11", x2000_pwm11_groups, array_size(x2000_pwm11_groups), }, + { "pwm12", x2000_pwm12_groups, array_size(x2000_pwm12_groups), }, + { "pwm13", x2000_pwm13_groups, array_size(x2000_pwm13_groups), }, + { "pwm14", x2000_pwm14_groups, array_size(x2000_pwm14_groups), }, + { "pwm15", x2000_pwm15_groups, array_size(x2000_pwm15_groups), }, + { "mac0", x2000_mac0_groups, array_size(x2000_mac0_groups), }, + { "mac1", x2000_mac1_groups, array_size(x2000_mac1_groups), }, + { "otg", x2000_otg_groups, array_size(x2000_otg_groups), }, +}; + +static const struct ingenic_chip_info x2000_chip_info = { + .num_chips = 5, + .reg_offset = 0x100, + .version = id_x2000, + .groups = x2000_groups, + .num_groups = array_size(x2000_groups), + .functions = x2000_functions, + .num_functions = array_size(x2000_functions), + .pull_ups = x2000_pull_ups, + .pull_downs = x2000_pull_downs, +}; + - bool val1, val2; + bool val1, val2, val3; + case irq_type_edge_both: + val1 = val2 = false; + val3 = true; + break; + val3 = false; - val1 = false; + val1 = val3 = false; - val2 = false; + val2 = val3 = false; - val1 = val2 = false; + val1 = val2 = val3 = false; - if (jzgc->jzpc->info->version >= id_x1000) { + if (jzgc->jzpc->info->version >= id_x2000) { + ingenic_gpio_shadow_set_bit(jzgc, reg2, offset, val1); + ingenic_gpio_shadow_set_bit(jzgc, reg1, offset, val2); + ingenic_gpio_shadow_set_bit_load(jzgc); + ingenic_gpio_set_bit(jzgc, x2000_gpio_edg, offset, val3); + } else if (jzgc->jzpc->info->version >= id_x1000) { - if (irqd_get_trigger_type(irqd) == irq_type_edge_both) { + if ((irqd_get_trigger_type(irqd) == irq_type_edge_both) && + (jzgc->jzpc->info->version < id_x2000)) { - if (type == irq_type_edge_both) { + if ((type == irq_type_edge_both) && (jzgc->jzpc->info->version < id_x2000)) { - unsigned int pin, u8 reg, bool set) + unsigned int pin, unsigned int reg, bool set) - unsigned int pin, u8 reg) + unsigned int pin, unsigned int reg) - unsigned int bias; + unsigned int arg = 1; + unsigned int bias, reg; - if (jzpc->info->version >= id_x1830) { + if (jzpc->info->version >= id_x2000) { + pullup = ingenic_get_pin_config(jzpc, pin, x2000_gpio_pepu) && + !ingenic_get_pin_config(jzpc, pin, x2000_gpio_pepd) && + (jzpc->info->pull_ups[offt] & bit(idx)); + pulldown = ingenic_get_pin_config(jzpc, pin, x2000_gpio_pepd) && + !ingenic_get_pin_config(jzpc, pin, x2000_gpio_pepu) && + (jzpc->info->pull_downs[offt] & bit(idx)); + + } else if (jzpc->info->version >= id_x1830) { + + + + break; + + case pin_config_input_schmitt_enable: + if (jzpc->info->version >= id_x2000) + reg = x2000_gpio_smt; + else if (jzpc->info->version >= id_x1830) + reg = x1830_gpio_smt; + else + return -einval; + + arg = !!ingenic_get_pin_config(jzpc, pin, reg); + break; + + case pin_config_slew_rate: + if (jzpc->info->version >= id_x2000) + reg = x2000_gpio_sr; + else if (jzpc->info->version >= id_x1830) + reg = x1830_gpio_sr; + else + return -einval; + + arg = !!ingenic_get_pin_config(jzpc, pin, reg); - *config = pinconf_to_config_packed(param, 1); + *config = pinconf_to_config_packed(param, arg); - if (jzpc->info->version >= id_x1830) { + if (jzpc->info->version >= id_x2000) { + switch (bias) { + case pin_config_bias_pull_up: + ingenic_config_pin(jzpc, pin, x2000_gpio_pepd, false); + ingenic_config_pin(jzpc, pin, x2000_gpio_pepu, true); + break; + + case pin_config_bias_pull_down: + ingenic_config_pin(jzpc, pin, x2000_gpio_pepu, false); + ingenic_config_pin(jzpc, pin, x2000_gpio_pepd, true); + break; + + case pin_config_bias_disable: + default: + ingenic_config_pin(jzpc, pin, x2000_gpio_pepu, false); + ingenic_config_pin(jzpc, pin, x2000_gpio_pepd, false); + } + + } else if (jzpc->info->version >= id_x1830) { +static void ingenic_set_schmitt_trigger(struct ingenic_pinctrl *jzpc, + unsigned int pin, bool enable) +{ + if (jzpc->info->version >= id_x2000) + ingenic_config_pin(jzpc, pin, x2000_gpio_smt, enable); + else + ingenic_config_pin(jzpc, pin, x1830_gpio_smt, enable); +} + +static void ingenic_set_slew_rate(struct ingenic_pinctrl *jzpc, + unsigned int pin, unsigned int slew) +{ + if (jzpc->info->version >= id_x2000) + ingenic_config_pin(jzpc, pin, x2000_gpio_sr, slew); + else + ingenic_config_pin(jzpc, pin, x1830_gpio_sr, slew); +} + + case pin_config_input_schmitt_enable: + case pin_config_slew_rate: + case pin_config_input_schmitt_enable: + if (jzpc->info->version < id_x1830) + return -einval; + + ingenic_set_schmitt_trigger(jzpc, pin, arg); + break; + + case pin_config_slew_rate: + if (jzpc->info->version < id_x1830) + return -einval; + + ingenic_set_slew_rate(jzpc, pin, arg); + break; + + { .compatible = "ingenic,x2000-gpio", }, + + { + .compatible = "ingenic,x2000-pinctrl", + .data = if_enabled(config_mach_x2000, &x2000_chip_info) + }, + { + .compatible = "ingenic,x2000e-pinctrl", + .data = if_enabled(config_mach_x2000, &x2000_chip_info) + },
Pin Controllers (pinctrl)
943e0da15370341a6e5d9baa5b6a7649c020e105
zhou yanjie andy shevchenko andy shevchenko gmail com paul cercueil paul crapouillou net
drivers
pinctrl
pinctrl: ingenic: add support for read the pin configuration of x1830.
add x1830 support in "ingenic_pinconf_get()", so that it can read the configuration of x1830 soc correctly.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for read the pin configuration of x1830
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['ingenic']
['c']
1
31
9
--- diff --git a/drivers/pinctrl/pinctrl-ingenic.c b/drivers/pinctrl/pinctrl-ingenic.c --- a/drivers/pinctrl/pinctrl-ingenic.c +++ b/drivers/pinctrl/pinctrl-ingenic.c - bool pull; + unsigned int bias; + bool pull, pullup, pulldown; - if (jzpc->info->version >= id_jz4770) - pull = !ingenic_get_pin_config(jzpc, pin, jz4770_gpio_pen); - else - pull = !ingenic_get_pin_config(jzpc, pin, jz4740_gpio_pull_dis); + if (jzpc->info->version >= id_x1830) { + unsigned int half = pins_per_gpio_chip / 2; + unsigned int idxh = (pin % half) * 2; + + if (idx < half) + regmap_read(jzpc->map, offt * jzpc->info->reg_offset + + x1830_gpio_pel, &bias); + else + regmap_read(jzpc->map, offt * jzpc->info->reg_offset + + x1830_gpio_peh, &bias); + + bias = (bias >> idxh) & (gpio_pull_up | gpio_pull_down); + + pullup = (bias == gpio_pull_up) && (jzpc->info->pull_ups[offt] & bit(idx)); + pulldown = (bias == gpio_pull_down) && (jzpc->info->pull_downs[offt] & bit(idx)); + + } else { + if (jzpc->info->version >= id_jz4770) + pull = !ingenic_get_pin_config(jzpc, pin, jz4770_gpio_pen); + else + pull = !ingenic_get_pin_config(jzpc, pin, jz4740_gpio_pull_dis); + + pullup = pull && (jzpc->info->pull_ups[offt] & bit(idx)); + pulldown = pull && (jzpc->info->pull_downs[offt] & bit(idx)); + } - if (pull) + if (pullup || pulldown) - if (!pull || !(jzpc->info->pull_ups[offt] & bit(idx))) + if (!pullup) - if (!pull || !(jzpc->info->pull_downs[offt] & bit(idx))) + if (!pulldown) - unsigned int idxh = pin % half * 2; + unsigned int idxh = (pin % half) * 2;
Pin Controllers (pinctrl)
1d0bd580ef83b78a10c0b37f3313eaa59d8c80db
zhou yanjie andy shevchenko andy shevchenko gmail com paul cercueil paul crapouillou net
drivers
pinctrl
pinctrl: add a pincontrol driver for bcm6318
add a pincontrol driver for bcm6318. bcm6318 allows muxing most gpios to different functions. bcm6318 is similar to bcm6328 with the addition of a pad register, and the gpio meaning of the mux register changes based on the gpio number.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add a pincontrol driver for bcm6318
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['kconfig', 'c', 'makefile']
3
507
0
--- diff --git a/drivers/pinctrl/bcm/kconfig b/drivers/pinctrl/bcm/kconfig --- a/drivers/pinctrl/bcm/kconfig +++ b/drivers/pinctrl/bcm/kconfig +config pinctrl_bcm6318 + bool "broadcom bcm6318 gpio driver" + depends on (bmips_generic || compile_test) + select pinctrl_bcm63xx + default bmips_generic + help + say y here to enable the broadcom bcm6318 gpio driver. + diff --git a/drivers/pinctrl/bcm/makefile b/drivers/pinctrl/bcm/makefile --- a/drivers/pinctrl/bcm/makefile +++ b/drivers/pinctrl/bcm/makefile +obj-$(config_pinctrl_bcm6318) += pinctrl-bcm6318.o diff --git a/drivers/pinctrl/bcm/pinctrl-bcm6318.c b/drivers/pinctrl/bcm/pinctrl-bcm6318.c --- /dev/null +++ b/drivers/pinctrl/bcm/pinctrl-bcm6318.c +// spdx-license-identifier: gpl-2.0+ +/* + * driver for bcm6318 gpio unit (pinctrl + gpio) + * + * copyright (c) 2021 alvaro fernandez rojas <noltari@gmail.com> + * copyright (c) 2016 jonas gorski <jonas.gorski@gmail.com> + */ + +#include <linux/bits.h> +#include <linux/gpio/driver.h> +#include <linux/kernel.h> +#include <linux/of.h> +#include <linux/pinctrl/pinmux.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> + +#include "../pinctrl-utils.h" + +#include "pinctrl-bcm63xx.h" + +#define bcm6318_num_gpios 50 +#define bcm6318_num_mux 48 + +#define bcm6318_mode_reg 0x18 +#define bcm6318_mux_reg 0x1c +#define bcm6328_mux_mask genmask(1, 0) +#define bcm6318_pad_reg 0x54 +#define bcm6328_pad_mask genmask(3, 0) + +struct bcm6318_pingroup { + const char *name; + const unsigned * const pins; + const unsigned num_pins; +}; + +struct bcm6318_function { + const char *name; + const char * const *groups; + const unsigned num_groups; + + unsigned mode_val:1; + unsigned mux_val:2; +}; + +static const struct pinctrl_pin_desc bcm6318_pins[] = { + pinctrl_pin(0, "gpio0"), + pinctrl_pin(1, "gpio1"), + pinctrl_pin(2, "gpio2"), + pinctrl_pin(3, "gpio3"), + pinctrl_pin(4, "gpio4"), + pinctrl_pin(5, "gpio5"), + pinctrl_pin(6, "gpio6"), + pinctrl_pin(7, "gpio7"), + pinctrl_pin(8, "gpio8"), + pinctrl_pin(9, "gpio9"), + pinctrl_pin(10, "gpio10"), + pinctrl_pin(11, "gpio11"), + pinctrl_pin(12, "gpio12"), + pinctrl_pin(13, "gpio13"), + pinctrl_pin(14, "gpio14"), + pinctrl_pin(15, "gpio15"), + pinctrl_pin(16, "gpio16"), + pinctrl_pin(17, "gpio17"), + pinctrl_pin(18, "gpio18"), + pinctrl_pin(19, "gpio19"), + pinctrl_pin(20, "gpio20"), + pinctrl_pin(21, "gpio21"), + pinctrl_pin(22, "gpio22"), + pinctrl_pin(23, "gpio23"), + pinctrl_pin(24, "gpio24"), + pinctrl_pin(25, "gpio25"), + pinctrl_pin(26, "gpio26"), + pinctrl_pin(27, "gpio27"), + pinctrl_pin(28, "gpio28"), + pinctrl_pin(29, "gpio29"), + pinctrl_pin(30, "gpio30"), + pinctrl_pin(31, "gpio31"), + pinctrl_pin(32, "gpio32"), + pinctrl_pin(33, "gpio33"), + pinctrl_pin(34, "gpio34"), + pinctrl_pin(35, "gpio35"), + pinctrl_pin(36, "gpio36"), + pinctrl_pin(37, "gpio37"), + pinctrl_pin(38, "gpio38"), + pinctrl_pin(39, "gpio39"), + pinctrl_pin(40, "gpio40"), + pinctrl_pin(41, "gpio41"), + pinctrl_pin(42, "gpio42"), + pinctrl_pin(43, "gpio43"), + pinctrl_pin(44, "gpio44"), + pinctrl_pin(45, "gpio45"), + pinctrl_pin(46, "gpio46"), + pinctrl_pin(47, "gpio47"), + pinctrl_pin(48, "gpio48"), + pinctrl_pin(49, "gpio49"), +}; + +static unsigned gpio0_pins[] = { 0 }; +static unsigned gpio1_pins[] = { 1 }; +static unsigned gpio2_pins[] = { 2 }; +static unsigned gpio3_pins[] = { 3 }; +static unsigned gpio4_pins[] = { 4 }; +static unsigned gpio5_pins[] = { 5 }; +static unsigned gpio6_pins[] = { 6 }; +static unsigned gpio7_pins[] = { 7 }; +static unsigned gpio8_pins[] = { 8 }; +static unsigned gpio9_pins[] = { 9 }; +static unsigned gpio10_pins[] = { 10 }; +static unsigned gpio11_pins[] = { 11 }; +static unsigned gpio12_pins[] = { 12 }; +static unsigned gpio13_pins[] = { 13 }; +static unsigned gpio14_pins[] = { 14 }; +static unsigned gpio15_pins[] = { 15 }; +static unsigned gpio16_pins[] = { 16 }; +static unsigned gpio17_pins[] = { 17 }; +static unsigned gpio18_pins[] = { 18 }; +static unsigned gpio19_pins[] = { 19 }; +static unsigned gpio20_pins[] = { 20 }; +static unsigned gpio21_pins[] = { 21 }; +static unsigned gpio22_pins[] = { 22 }; +static unsigned gpio23_pins[] = { 23 }; +static unsigned gpio24_pins[] = { 24 }; +static unsigned gpio25_pins[] = { 25 }; +static unsigned gpio26_pins[] = { 26 }; +static unsigned gpio27_pins[] = { 27 }; +static unsigned gpio28_pins[] = { 28 }; +static unsigned gpio29_pins[] = { 29 }; +static unsigned gpio30_pins[] = { 30 }; +static unsigned gpio31_pins[] = { 31 }; +static unsigned gpio32_pins[] = { 32 }; +static unsigned gpio33_pins[] = { 33 }; +static unsigned gpio34_pins[] = { 34 }; +static unsigned gpio35_pins[] = { 35 }; +static unsigned gpio36_pins[] = { 36 }; +static unsigned gpio37_pins[] = { 37 }; +static unsigned gpio38_pins[] = { 38 }; +static unsigned gpio39_pins[] = { 39 }; +static unsigned gpio40_pins[] = { 40 }; +static unsigned gpio41_pins[] = { 41 }; +static unsigned gpio42_pins[] = { 42 }; +static unsigned gpio43_pins[] = { 43 }; +static unsigned gpio44_pins[] = { 44 }; +static unsigned gpio45_pins[] = { 45 }; +static unsigned gpio46_pins[] = { 46 }; +static unsigned gpio47_pins[] = { 47 }; +static unsigned gpio48_pins[] = { 48 }; +static unsigned gpio49_pins[] = { 49 }; + +#define bcm6318_group(n) \ + { \ + .name = #n, \ + .pins = n##_pins, \ + .num_pins = array_size(n##_pins), \ + } + +static struct bcm6318_pingroup bcm6318_groups[] = { + bcm6318_group(gpio0), + bcm6318_group(gpio1), + bcm6318_group(gpio2), + bcm6318_group(gpio3), + bcm6318_group(gpio4), + bcm6318_group(gpio5), + bcm6318_group(gpio6), + bcm6318_group(gpio7), + bcm6318_group(gpio8), + bcm6318_group(gpio9), + bcm6318_group(gpio10), + bcm6318_group(gpio11), + bcm6318_group(gpio12), + bcm6318_group(gpio13), + bcm6318_group(gpio14), + bcm6318_group(gpio15), + bcm6318_group(gpio16), + bcm6318_group(gpio17), + bcm6318_group(gpio18), + bcm6318_group(gpio19), + bcm6318_group(gpio20), + bcm6318_group(gpio21), + bcm6318_group(gpio22), + bcm6318_group(gpio23), + bcm6318_group(gpio24), + bcm6318_group(gpio25), + bcm6318_group(gpio26), + bcm6318_group(gpio27), + bcm6318_group(gpio28), + bcm6318_group(gpio29), + bcm6318_group(gpio30), + bcm6318_group(gpio31), + bcm6318_group(gpio32), + bcm6318_group(gpio33), + bcm6318_group(gpio34), + bcm6318_group(gpio35), + bcm6318_group(gpio36), + bcm6318_group(gpio37), + bcm6318_group(gpio38), + bcm6318_group(gpio39), + bcm6318_group(gpio40), + bcm6318_group(gpio41), + bcm6318_group(gpio42), + bcm6318_group(gpio43), + bcm6318_group(gpio44), + bcm6318_group(gpio45), + bcm6318_group(gpio46), + bcm6318_group(gpio47), + bcm6318_group(gpio48), + bcm6318_group(gpio49), +}; + +/* gpio_mode */ +static const char * const led_groups[] = { + "gpio0", + "gpio1", + "gpio2", + "gpio3", + "gpio4", + "gpio5", + "gpio6", + "gpio7", + "gpio8", + "gpio9", + "gpio10", + "gpio11", + "gpio12", + "gpio13", + "gpio14", + "gpio15", + "gpio16", + "gpio17", + "gpio18", + "gpio19", + "gpio20", + "gpio21", + "gpio22", + "gpio23", +}; + +/* pinmux_sel */ +static const char * const ephy0_spd_led_groups[] = { + "gpio0", +}; + +static const char * const ephy1_spd_led_groups[] = { + "gpio1", +}; + +static const char * const ephy2_spd_led_groups[] = { + "gpio2", +}; + +static const char * const ephy3_spd_led_groups[] = { + "gpio3", +}; + +static const char * const ephy0_act_led_groups[] = { + "gpio4", +}; + +static const char * const ephy1_act_led_groups[] = { + "gpio5", +}; + +static const char * const ephy2_act_led_groups[] = { + "gpio6", +}; + +static const char * const ephy3_act_led_groups[] = { + "gpio7", +}; + +static const char * const serial_led_data_groups[] = { + "gpio6", +}; + +static const char * const serial_led_clk_groups[] = { + "gpio7", +}; + +static const char * const inet_act_led_groups[] = { + "gpio8", +}; + +static const char * const inet_fail_led_groups[] = { + "gpio9", +}; + +static const char * const dsl_led_groups[] = { + "gpio10", +}; + +static const char * const post_fail_led_groups[] = { + "gpio11", +}; + +static const char * const wlan_wps_led_groups[] = { + "gpio12", +}; + +static const char * const usb_pwron_groups[] = { + "gpio13", +}; + +static const char * const usb_device_led_groups[] = { + "gpio13", +}; + +static const char * const usb_active_groups[] = { + "gpio40", +}; + +#define bcm6318_mode_fun(n) \ + { \ + .name = #n, \ + .groups = n##_groups, \ + .num_groups = array_size(n##_groups), \ + .mode_val = 1, \ + } + +#define bcm6318_mux_fun(n, mux) \ + { \ + .name = #n, \ + .groups = n##_groups, \ + .num_groups = array_size(n##_groups), \ + .mux_val = mux, \ + } + +static const struct bcm6318_function bcm6318_funcs[] = { + bcm6318_mode_fun(led), + bcm6318_mux_fun(ephy0_spd_led, 1), + bcm6318_mux_fun(ephy1_spd_led, 1), + bcm6318_mux_fun(ephy2_spd_led, 1), + bcm6318_mux_fun(ephy3_spd_led, 1), + bcm6318_mux_fun(ephy0_act_led, 1), + bcm6318_mux_fun(ephy1_act_led, 1), + bcm6318_mux_fun(ephy2_act_led, 1), + bcm6318_mux_fun(ephy3_act_led, 1), + bcm6318_mux_fun(serial_led_data, 3), + bcm6318_mux_fun(serial_led_clk, 3), + bcm6318_mux_fun(inet_act_led, 1), + bcm6318_mux_fun(inet_fail_led, 1), + bcm6318_mux_fun(dsl_led, 1), + bcm6318_mux_fun(post_fail_led, 1), + bcm6318_mux_fun(wlan_wps_led, 1), + bcm6318_mux_fun(usb_pwron, 1), + bcm6318_mux_fun(usb_device_led, 2), + bcm6318_mux_fun(usb_active, 2), +}; + +static inline unsigned int bcm6318_mux_off(unsigned int pin) +{ + return bcm6318_mux_reg + (pin / 16) * 4; +} + +static inline unsigned int bcm6318_pad_off(unsigned int pin) +{ + return bcm6318_pad_reg + (pin / 8) * 4; +} + +static int bcm6318_pinctrl_get_group_count(struct pinctrl_dev *pctldev) +{ + return array_size(bcm6318_groups); +} + +static const char *bcm6318_pinctrl_get_group_name(struct pinctrl_dev *pctldev, + unsigned group) +{ + return bcm6318_groups[group].name; +} + +static int bcm6318_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, + unsigned group, const unsigned **pins, + unsigned *num_pins) +{ + *pins = bcm6318_groups[group].pins; + *num_pins = bcm6318_groups[group].num_pins; + + return 0; +} + +static int bcm6318_pinctrl_get_func_count(struct pinctrl_dev *pctldev) +{ + return array_size(bcm6318_funcs); +} + +static const char *bcm6318_pinctrl_get_func_name(struct pinctrl_dev *pctldev, + unsigned selector) +{ + return bcm6318_funcs[selector].name; +} + +static int bcm6318_pinctrl_get_groups(struct pinctrl_dev *pctldev, + unsigned selector, + const char * const **groups, + unsigned * const num_groups) +{ + *groups = bcm6318_funcs[selector].groups; + *num_groups = bcm6318_funcs[selector].num_groups; + + return 0; +} + +static inline void bcm6318_rmw_mux(struct bcm63xx_pinctrl *pc, unsigned pin, + unsigned int mode, unsigned int mux) +{ + if (pin < bcm63xx_bank_gpios) + regmap_update_bits(pc->regs, bcm6318_mode_reg, bit(pin), + mode ? bit(pin) : 0); + + if (pin < bcm6318_num_mux) + regmap_update_bits(pc->regs, + bcm6318_mux_off(pin), + bcm6328_mux_mask << ((pin % 16) * 2), + mux << ((pin % 16) * 2)); +} + +static inline void bcm6318_set_pad(struct bcm63xx_pinctrl *pc, unsigned pin, + uint8_t val) +{ + regmap_update_bits(pc->regs, bcm6318_pad_off(pin), + bcm6328_pad_mask << ((pin % 8) * 4), + val << ((pin % 8) * 4)); +} + +static int bcm6318_pinctrl_set_mux(struct pinctrl_dev *pctldev, + unsigned selector, unsigned group) +{ + struct bcm63xx_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev); + const struct bcm6318_pingroup *pg = &bcm6318_groups[group]; + const struct bcm6318_function *f = &bcm6318_funcs[selector]; + + bcm6318_rmw_mux(pc, pg->pins[0], f->mode_val, f->mux_val); + + return 0; +} + +static int bcm6318_gpio_request_enable(struct pinctrl_dev *pctldev, + struct pinctrl_gpio_range *range, + unsigned offset) +{ + struct bcm63xx_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev); + + /* disable all functions using this pin */ + if (offset < 13) { + /* gpios 0-12 use mux 0 as gpio function */ + bcm6318_rmw_mux(pc, offset, 0, 0); + } else if (offset < 42) { + /* gpios 13-41 use mux 3 as gpio function */ + bcm6318_rmw_mux(pc, offset, 0, 3); + + bcm6318_set_pad(pc, offset, 0); + } + + return 0; +} + +static struct pinctrl_ops bcm6318_pctl_ops = { + .dt_free_map = pinctrl_utils_free_map, + .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, + .get_group_name = bcm6318_pinctrl_get_group_name, + .get_group_pins = bcm6318_pinctrl_get_group_pins, + .get_groups_count = bcm6318_pinctrl_get_group_count, +}; + +static struct pinmux_ops bcm6318_pmx_ops = { + .get_function_groups = bcm6318_pinctrl_get_groups, + .get_function_name = bcm6318_pinctrl_get_func_name, + .get_functions_count = bcm6318_pinctrl_get_func_count, + .gpio_request_enable = bcm6318_gpio_request_enable, + .set_mux = bcm6318_pinctrl_set_mux, + .strict = true, +}; + +static const struct bcm63xx_pinctrl_soc bcm6318_soc = { + .ngpios = bcm6318_num_gpios, + .npins = array_size(bcm6318_pins), + .pctl_ops = &bcm6318_pctl_ops, + .pins = bcm6318_pins, + .pmx_ops = &bcm6318_pmx_ops, +}; + +static int bcm6318_pinctrl_probe(struct platform_device *pdev) +{ + return bcm63xx_pinctrl_probe(pdev, &bcm6318_soc, null); +} + +static const struct of_device_id bcm6318_pinctrl_match[] = { + { .compatible = "brcm,bcm6318-pinctrl", }, + { /* sentinel */ } +}; + +static struct platform_driver bcm6318_pinctrl_driver = { + .probe = bcm6318_pinctrl_probe, + .driver = { + .name = "bcm6318-pinctrl", + .of_match_table = bcm6318_pinctrl_match, + }, +}; + +builtin_platform_driver(bcm6318_pinctrl_driver);
Pin Controllers (pinctrl)
d28039fccf948a407de69106465caa465b1dcf32
lvaro fern ndez rojas
drivers
pinctrl
bcm
pinctrl: add a pincontrol driver for bcm63268
add a pincontrol driver for bcm63268. bcm63268 allows muxing gpios to different functions. depending on the mux, these are either single pin configurations or whole pin groups.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add a pincontrol driver for bcm63268
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['kconfig', 'c', 'makefile']
3
652
0
--- diff --git a/drivers/pinctrl/bcm/kconfig b/drivers/pinctrl/bcm/kconfig --- a/drivers/pinctrl/bcm/kconfig +++ b/drivers/pinctrl/bcm/kconfig +config pinctrl_bcm63268 + bool "broadcom bcm63268 gpio driver" + depends on (bmips_generic || compile_test) + select pinctrl_bcm63xx + default bmips_generic + help + say y here to enable the broadcom bcm63268 gpio driver. + diff --git a/drivers/pinctrl/bcm/makefile b/drivers/pinctrl/bcm/makefile --- a/drivers/pinctrl/bcm/makefile +++ b/drivers/pinctrl/bcm/makefile +obj-$(config_pinctrl_bcm63268) += pinctrl-bcm63268.o diff --git a/drivers/pinctrl/bcm/pinctrl-bcm63268.c b/drivers/pinctrl/bcm/pinctrl-bcm63268.c --- /dev/null +++ b/drivers/pinctrl/bcm/pinctrl-bcm63268.c +// spdx-license-identifier: gpl-2.0+ +/* + * driver for bcm63268 gpio unit (pinctrl + gpio) + * + * copyright (c) 2021 alvaro fernandez rojas <noltari@gmail.com> + * copyright (c) 2016 jonas gorski <jonas.gorski@gmail.com> + */ + +#include <linux/bits.h> +#include <linux/gpio/driver.h> +#include <linux/kernel.h> +#include <linux/of.h> +#include <linux/pinctrl/pinmux.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> + +#include "../pinctrl-utils.h" + +#include "pinctrl-bcm63xx.h" + +#define bcm63268_num_gpios 52 +#define bcm63268_num_leds 24 + +#define bcm63268_led_reg 0x10 +#define bcm63268_mode_reg 0x18 +#define bcm63268_ctrl_reg 0x1c +#define bcm63268_basemode_reg 0x38 +#define bcm63268_basemode_nand bit(2) /* gpios 2-7, 24-31 */ +#define bcm63268_basemode_gpio35 bit(4) /* gpio 35 */ +#define bcm63268_basemode_dectpd bit(5) /* gpios 8/9 */ +#define bcm63268_basemode_vdsl_phy_0 bit(6) /* gpios 10/11 */ +#define bcm63268_basemode_vdsl_phy_1 bit(7) /* gpios 12/13 */ +#define bcm63268_basemode_vdsl_phy_2 bit(8) /* gpios 24/25 */ +#define bcm63268_basemode_vdsl_phy_3 bit(9) /* gpios 26/27 */ + +enum bcm63268_pinctrl_reg { + bcm63268_ledctrl, + bcm63268_mode, + bcm63268_ctrl, + bcm63268_basemode, +}; + +struct bcm63268_pingroup { + const char *name; + const unsigned * const pins; + const unsigned num_pins; +}; + +struct bcm63268_function { + const char *name; + const char * const *groups; + const unsigned num_groups; + + enum bcm63268_pinctrl_reg reg; + uint32_t mask; +}; + +#define bcm63268_pin(a, b, basemode) \ + { \ + .number = a, \ + .name = b, \ + .drv_data = (void *)(basemode) \ + } + +static const struct pinctrl_pin_desc bcm63268_pins[] = { + pinctrl_pin(0, "gpio0"), + pinctrl_pin(1, "gpio1"), + bcm63268_pin(2, "gpio2", bcm63268_basemode_nand), + bcm63268_pin(3, "gpio3", bcm63268_basemode_nand), + bcm63268_pin(4, "gpio4", bcm63268_basemode_nand), + bcm63268_pin(5, "gpio5", bcm63268_basemode_nand), + bcm63268_pin(6, "gpio6", bcm63268_basemode_nand), + bcm63268_pin(7, "gpio7", bcm63268_basemode_nand), + bcm63268_pin(8, "gpio8", bcm63268_basemode_dectpd), + bcm63268_pin(9, "gpio9", bcm63268_basemode_dectpd), + bcm63268_pin(10, "gpio10", bcm63268_basemode_vdsl_phy_0), + bcm63268_pin(11, "gpio11", bcm63268_basemode_vdsl_phy_0), + bcm63268_pin(12, "gpio12", bcm63268_basemode_vdsl_phy_1), + bcm63268_pin(13, "gpio13", bcm63268_basemode_vdsl_phy_1), + pinctrl_pin(14, "gpio14"), + pinctrl_pin(15, "gpio15"), + pinctrl_pin(16, "gpio16"), + pinctrl_pin(17, "gpio17"), + pinctrl_pin(18, "gpio18"), + pinctrl_pin(19, "gpio19"), + pinctrl_pin(20, "gpio20"), + pinctrl_pin(21, "gpio21"), + pinctrl_pin(22, "gpio22"), + pinctrl_pin(23, "gpio23"), + bcm63268_pin(24, "gpio24", + bcm63268_basemode_nand | bcm63268_basemode_vdsl_phy_2), + bcm63268_pin(25, "gpio25", + bcm63268_basemode_nand | bcm63268_basemode_vdsl_phy_2), + bcm63268_pin(26, "gpio26", + bcm63268_basemode_nand | bcm63268_basemode_vdsl_phy_3), + bcm63268_pin(27, "gpio27", + bcm63268_basemode_nand | bcm63268_basemode_vdsl_phy_3), + bcm63268_pin(28, "gpio28", bcm63268_basemode_nand), + bcm63268_pin(29, "gpio29", bcm63268_basemode_nand), + bcm63268_pin(30, "gpio30", bcm63268_basemode_nand), + bcm63268_pin(31, "gpio31", bcm63268_basemode_nand), + pinctrl_pin(32, "gpio32"), + pinctrl_pin(33, "gpio33"), + pinctrl_pin(34, "gpio34"), + pinctrl_pin(35, "gpio35"), + pinctrl_pin(36, "gpio36"), + pinctrl_pin(37, "gpio37"), + pinctrl_pin(38, "gpio38"), + pinctrl_pin(39, "gpio39"), + pinctrl_pin(40, "gpio40"), + pinctrl_pin(41, "gpio41"), + pinctrl_pin(42, "gpio42"), + pinctrl_pin(43, "gpio43"), + pinctrl_pin(44, "gpio44"), + pinctrl_pin(45, "gpio45"), + pinctrl_pin(46, "gpio46"), + pinctrl_pin(47, "gpio47"), + pinctrl_pin(48, "gpio48"), + pinctrl_pin(49, "gpio49"), + pinctrl_pin(50, "gpio50"), + pinctrl_pin(51, "gpio51"), +}; + +static unsigned gpio0_pins[] = { 0 }; +static unsigned gpio1_pins[] = { 1 }; +static unsigned gpio2_pins[] = { 2 }; +static unsigned gpio3_pins[] = { 3 }; +static unsigned gpio4_pins[] = { 4 }; +static unsigned gpio5_pins[] = { 5 }; +static unsigned gpio6_pins[] = { 6 }; +static unsigned gpio7_pins[] = { 7 }; +static unsigned gpio8_pins[] = { 8 }; +static unsigned gpio9_pins[] = { 9 }; +static unsigned gpio10_pins[] = { 10 }; +static unsigned gpio11_pins[] = { 11 }; +static unsigned gpio12_pins[] = { 12 }; +static unsigned gpio13_pins[] = { 13 }; +static unsigned gpio14_pins[] = { 14 }; +static unsigned gpio15_pins[] = { 15 }; +static unsigned gpio16_pins[] = { 16 }; +static unsigned gpio17_pins[] = { 17 }; +static unsigned gpio18_pins[] = { 18 }; +static unsigned gpio19_pins[] = { 19 }; +static unsigned gpio20_pins[] = { 20 }; +static unsigned gpio21_pins[] = { 21 }; +static unsigned gpio22_pins[] = { 22 }; +static unsigned gpio23_pins[] = { 23 }; +static unsigned gpio24_pins[] = { 24 }; +static unsigned gpio25_pins[] = { 25 }; +static unsigned gpio26_pins[] = { 26 }; +static unsigned gpio27_pins[] = { 27 }; +static unsigned gpio28_pins[] = { 28 }; +static unsigned gpio29_pins[] = { 29 }; +static unsigned gpio30_pins[] = { 30 }; +static unsigned gpio31_pins[] = { 31 }; +static unsigned gpio32_pins[] = { 32 }; +static unsigned gpio33_pins[] = { 33 }; +static unsigned gpio34_pins[] = { 34 }; +static unsigned gpio35_pins[] = { 35 }; +static unsigned gpio36_pins[] = { 36 }; +static unsigned gpio37_pins[] = { 37 }; +static unsigned gpio38_pins[] = { 38 }; +static unsigned gpio39_pins[] = { 39 }; +static unsigned gpio40_pins[] = { 40 }; +static unsigned gpio41_pins[] = { 41 }; +static unsigned gpio42_pins[] = { 42 }; +static unsigned gpio43_pins[] = { 43 }; +static unsigned gpio44_pins[] = { 44 }; +static unsigned gpio45_pins[] = { 45 }; +static unsigned gpio46_pins[] = { 46 }; +static unsigned gpio47_pins[] = { 47 }; +static unsigned gpio48_pins[] = { 48 }; +static unsigned gpio49_pins[] = { 49 }; +static unsigned gpio50_pins[] = { 50 }; +static unsigned gpio51_pins[] = { 51 }; + +static unsigned nand_grp_pins[] = { + 2, 3, 4, 5, 6, 7, 24, + 25, 26, 27, 28, 29, 30, 31, +}; + +static unsigned dectpd_grp_pins[] = { 8, 9 }; +static unsigned vdsl_phy0_grp_pins[] = { 10, 11 }; +static unsigned vdsl_phy1_grp_pins[] = { 12, 13 }; +static unsigned vdsl_phy2_grp_pins[] = { 24, 25 }; +static unsigned vdsl_phy3_grp_pins[] = { 26, 27 }; + +#define bcm63268_group(n) \ + { \ + .name = #n, \ + .pins = n##_pins, \ + .num_pins = array_size(n##_pins), \ + } + +static struct bcm63268_pingroup bcm63268_groups[] = { + bcm63268_group(gpio0), + bcm63268_group(gpio1), + bcm63268_group(gpio2), + bcm63268_group(gpio3), + bcm63268_group(gpio4), + bcm63268_group(gpio5), + bcm63268_group(gpio6), + bcm63268_group(gpio7), + bcm63268_group(gpio8), + bcm63268_group(gpio9), + bcm63268_group(gpio10), + bcm63268_group(gpio11), + bcm63268_group(gpio12), + bcm63268_group(gpio13), + bcm63268_group(gpio14), + bcm63268_group(gpio15), + bcm63268_group(gpio16), + bcm63268_group(gpio17), + bcm63268_group(gpio18), + bcm63268_group(gpio19), + bcm63268_group(gpio20), + bcm63268_group(gpio21), + bcm63268_group(gpio22), + bcm63268_group(gpio23), + bcm63268_group(gpio24), + bcm63268_group(gpio25), + bcm63268_group(gpio26), + bcm63268_group(gpio27), + bcm63268_group(gpio28), + bcm63268_group(gpio29), + bcm63268_group(gpio30), + bcm63268_group(gpio31), + bcm63268_group(gpio32), + bcm63268_group(gpio33), + bcm63268_group(gpio34), + bcm63268_group(gpio35), + bcm63268_group(gpio36), + bcm63268_group(gpio37), + bcm63268_group(gpio38), + bcm63268_group(gpio39), + bcm63268_group(gpio40), + bcm63268_group(gpio41), + bcm63268_group(gpio42), + bcm63268_group(gpio43), + bcm63268_group(gpio44), + bcm63268_group(gpio45), + bcm63268_group(gpio46), + bcm63268_group(gpio47), + bcm63268_group(gpio48), + bcm63268_group(gpio49), + bcm63268_group(gpio50), + bcm63268_group(gpio51), + + /* multi pin groups */ + bcm63268_group(nand_grp), + bcm63268_group(dectpd_grp), + bcm63268_group(vdsl_phy0_grp), + bcm63268_group(vdsl_phy1_grp), + bcm63268_group(vdsl_phy2_grp), + bcm63268_group(vdsl_phy3_grp), +}; + +static const char * const led_groups[] = { + "gpio0", + "gpio1", + "gpio2", + "gpio3", + "gpio4", + "gpio5", + "gpio6", + "gpio7", + "gpio8", + "gpio9", + "gpio10", + "gpio11", + "gpio12", + "gpio13", + "gpio14", + "gpio15", + "gpio16", + "gpio17", + "gpio18", + "gpio19", + "gpio20", + "gpio21", + "gpio22", + "gpio23", +}; + +static const char * const serial_led_clk_groups[] = { + "gpio0", +}; + +static const char * const serial_led_data_groups[] = { + "gpio1", +}; + +static const char * const hsspi_cs4_groups[] = { + "gpio16", +}; + +static const char * const hsspi_cs5_groups[] = { + "gpio17", +}; + +static const char * const hsspi_cs6_groups[] = { + "gpio8", +}; + +static const char * const hsspi_cs7_groups[] = { + "gpio9", +}; + +static const char * const uart1_scts_groups[] = { + "gpio10", + "gpio24", +}; + +static const char * const uart1_srts_groups[] = { + "gpio11", + "gpio25", +}; + +static const char * const uart1_sdin_groups[] = { + "gpio12", + "gpio26", +}; + +static const char * const uart1_sdout_groups[] = { + "gpio13", + "gpio27", +}; + +static const char * const ntr_pulse_in_groups[] = { + "gpio14", + "gpio28", +}; + +static const char * const dsl_ntr_pulse_out_groups[] = { + "gpio15", + "gpio29", +}; + +static const char * const adsl_spi_miso_groups[] = { + "gpio18", +}; + +static const char * const adsl_spi_mosi_groups[] = { + "gpio19", +}; + +static const char * const vreg_clk_groups[] = { + "gpio22", +}; + +static const char * const pcie_clkreq_b_groups[] = { + "gpio23", +}; + +static const char * const switch_led_clk_groups[] = { + "gpio30", +}; + +static const char * const switch_led_data_groups[] = { + "gpio31", +}; + +static const char * const wifi_groups[] = { + "gpio32", + "gpio33", + "gpio34", + "gpio35", + "gpio36", + "gpio37", + "gpio38", + "gpio39", + "gpio40", + "gpio41", + "gpio42", + "gpio43", + "gpio44", + "gpio45", + "gpio46", + "gpio47", + "gpio48", + "gpio49", + "gpio50", + "gpio51", +}; + +static const char * const nand_groups[] = { + "nand_grp", +}; + +static const char * const dectpd_groups[] = { + "dectpd_grp", +}; + +static const char * const vdsl_phy_override_0_groups[] = { + "vdsl_phy_override_0_grp", +}; + +static const char * const vdsl_phy_override_1_groups[] = { + "vdsl_phy_override_1_grp", +}; + +static const char * const vdsl_phy_override_2_groups[] = { + "vdsl_phy_override_2_grp", +}; + +static const char * const vdsl_phy_override_3_groups[] = { + "vdsl_phy_override_3_grp", +}; + +#define bcm63268_led_fun(n) \ + { \ + .name = #n, \ + .groups = n##_groups, \ + .num_groups = array_size(n##_groups), \ + .reg = bcm63268_ledctrl, \ + } + +#define bcm63268_mode_fun(n) \ + { \ + .name = #n, \ + .groups = n##_groups, \ + .num_groups = array_size(n##_groups), \ + .reg = bcm63268_mode, \ + } + +#define bcm63268_ctrl_fun(n) \ + { \ + .name = #n, \ + .groups = n##_groups, \ + .num_groups = array_size(n##_groups), \ + .reg = bcm63268_ctrl, \ + } + +#define bcm63268_basemode_fun(n, val) \ + { \ + .name = #n, \ + .groups = n##_groups, \ + .num_groups = array_size(n##_groups), \ + .reg = bcm63268_basemode, \ + .mask = val, \ + } + +static const struct bcm63268_function bcm63268_funcs[] = { + bcm63268_led_fun(led), + bcm63268_mode_fun(serial_led_clk), + bcm63268_mode_fun(serial_led_data), + bcm63268_mode_fun(hsspi_cs6), + bcm63268_mode_fun(hsspi_cs7), + bcm63268_mode_fun(uart1_scts), + bcm63268_mode_fun(uart1_srts), + bcm63268_mode_fun(uart1_sdin), + bcm63268_mode_fun(uart1_sdout), + bcm63268_mode_fun(ntr_pulse_in), + bcm63268_mode_fun(dsl_ntr_pulse_out), + bcm63268_mode_fun(hsspi_cs4), + bcm63268_mode_fun(hsspi_cs5), + bcm63268_mode_fun(adsl_spi_miso), + bcm63268_mode_fun(adsl_spi_mosi), + bcm63268_mode_fun(vreg_clk), + bcm63268_mode_fun(pcie_clkreq_b), + bcm63268_mode_fun(switch_led_clk), + bcm63268_mode_fun(switch_led_data), + bcm63268_ctrl_fun(wifi), + bcm63268_basemode_fun(nand, bcm63268_basemode_nand), + bcm63268_basemode_fun(dectpd, bcm63268_basemode_dectpd), + bcm63268_basemode_fun(vdsl_phy_override_0, + bcm63268_basemode_vdsl_phy_0), + bcm63268_basemode_fun(vdsl_phy_override_1, + bcm63268_basemode_vdsl_phy_1), + bcm63268_basemode_fun(vdsl_phy_override_2, + bcm63268_basemode_vdsl_phy_2), + bcm63268_basemode_fun(vdsl_phy_override_3, + bcm63268_basemode_vdsl_phy_3), +}; + +static int bcm63268_pinctrl_get_group_count(struct pinctrl_dev *pctldev) +{ + return array_size(bcm63268_groups); +} + +static const char *bcm63268_pinctrl_get_group_name(struct pinctrl_dev *pctldev, + unsigned group) +{ + return bcm63268_groups[group].name; +} + +static int bcm63268_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, + unsigned group, + const unsigned **pins, + unsigned *num_pins) +{ + *pins = bcm63268_groups[group].pins; + *num_pins = bcm63268_groups[group].num_pins; + + return 0; +} + +static int bcm63268_pinctrl_get_func_count(struct pinctrl_dev *pctldev) +{ + return array_size(bcm63268_funcs); +} + +static const char *bcm63268_pinctrl_get_func_name(struct pinctrl_dev *pctldev, + unsigned selector) +{ + return bcm63268_funcs[selector].name; +} + +static int bcm63268_pinctrl_get_groups(struct pinctrl_dev *pctldev, + unsigned selector, + const char * const **groups, + unsigned * const num_groups) +{ + *groups = bcm63268_funcs[selector].groups; + *num_groups = bcm63268_funcs[selector].num_groups; + + return 0; +} + +static void bcm63268_set_gpio(struct bcm63xx_pinctrl *pc, unsigned pin) +{ + const struct pinctrl_pin_desc *desc = &bcm63268_pins[pin]; + unsigned int basemode = (unsigned long) desc->drv_data; + unsigned int mask = bit(bcm63xx_bank_pin(pin)); + + if (basemode) + regmap_update_bits(pc->regs, bcm63268_basemode_reg, basemode, + 0); + + if (pin < bcm63xx_bank_gpios) { + /* base mode: 0 => gpio, 1 => mux function */ + regmap_update_bits(pc->regs, bcm63268_mode_reg, mask, 0); + + /* pins 0-23 might be muxed to led */ + if (pin < bcm63268_num_leds) + regmap_update_bits(pc->regs, bcm63268_led_reg, mask, + 0); + } else if (pin < bcm63268_num_gpios) { + /* ctrl reg: 0 => wifi function, 1 => gpio */ + regmap_update_bits(pc->regs, bcm63268_ctrl_reg, mask, mask); + } +} + +static int bcm63268_pinctrl_set_mux(struct pinctrl_dev *pctldev, + unsigned selector, unsigned group) +{ + struct bcm63xx_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev); + const struct bcm63268_pingroup *pg = &bcm63268_groups[group]; + const struct bcm63268_function *f = &bcm63268_funcs[selector]; + unsigned i; + unsigned int reg; + unsigned int val, mask; + + for (i = 0; i < pg->num_pins; i++) + bcm63268_set_gpio(pc, pg->pins[i]); + + switch (f->reg) { + case bcm63268_ledctrl: + reg = bcm63268_led_reg; + mask = bit(pg->pins[0]); + val = bit(pg->pins[0]); + break; + case bcm63268_mode: + reg = bcm63268_mode_reg; + mask = bit(pg->pins[0]); + val = bit(pg->pins[0]); + break; + case bcm63268_ctrl: + reg = bcm63268_ctrl_reg; + mask = bit(pg->pins[0]); + val = 0; + break; + case bcm63268_basemode: + reg = bcm63268_basemode_reg; + mask = f->mask; + val = f->mask; + break; + default: + warn_on(1); + return -einval; + } + + regmap_update_bits(pc->regs, reg, mask, val); + + return 0; +} + +static int bcm63268_gpio_request_enable(struct pinctrl_dev *pctldev, + struct pinctrl_gpio_range *range, + unsigned offset) +{ + struct bcm63xx_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev); + + /* disable all functions using this pin */ + bcm63268_set_gpio(pc, offset); + + return 0; +} + +static struct pinctrl_ops bcm63268_pctl_ops = { + .dt_free_map = pinctrl_utils_free_map, + .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, + .get_group_name = bcm63268_pinctrl_get_group_name, + .get_group_pins = bcm63268_pinctrl_get_group_pins, + .get_groups_count = bcm63268_pinctrl_get_group_count, +}; + +static struct pinmux_ops bcm63268_pmx_ops = { + .get_function_groups = bcm63268_pinctrl_get_groups, + .get_function_name = bcm63268_pinctrl_get_func_name, + .get_functions_count = bcm63268_pinctrl_get_func_count, + .gpio_request_enable = bcm63268_gpio_request_enable, + .set_mux = bcm63268_pinctrl_set_mux, + .strict = true, +}; + +static const struct bcm63xx_pinctrl_soc bcm63268_soc = { + .ngpios = bcm63268_num_gpios, + .npins = array_size(bcm63268_pins), + .pctl_ops = &bcm63268_pctl_ops, + .pins = bcm63268_pins, + .pmx_ops = &bcm63268_pmx_ops, +}; + +static int bcm63268_pinctrl_probe(struct platform_device *pdev) +{ + return bcm63xx_pinctrl_probe(pdev, &bcm63268_soc, null); +} + +static const struct of_device_id bcm63268_pinctrl_match[] = { + { .compatible = "brcm,bcm63268-pinctrl", }, + { /* sentinel */ } +}; + +static struct platform_driver bcm63268_pinctrl_driver = { + .probe = bcm63268_pinctrl_probe, + .driver = { + .name = "bcm63268-pinctrl", + .of_match_table = bcm63268_pinctrl_match, + }, +}; + +builtin_platform_driver(bcm63268_pinctrl_driver);
Pin Controllers (pinctrl)
155cca1b0794a8f541e7eaa45be70df0a49964f3
lvaro fern ndez rojas
drivers
pinctrl
bcm
pinctrl: add a pincontrol driver for bcm6328
add a pincontrol driver for bcm6328. bcm6328 supports muxing 32 pins as gpios, as leds for the integrated led controller, or various other functions. its pincontrol mux registers also control other aspects, like switching the second usb port between host and device mode.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add a pincontrol driver for bcm6328
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['kconfig', 'c', 'makefile']
3
413
0
--- diff --git a/drivers/pinctrl/bcm/kconfig b/drivers/pinctrl/bcm/kconfig --- a/drivers/pinctrl/bcm/kconfig +++ b/drivers/pinctrl/bcm/kconfig +config pinctrl_bcm6328 + bool "broadcom bcm6328 gpio driver" + depends on (bmips_generic || compile_test) + select pinctrl_bcm63xx + default bmips_generic + help + say y here to enable the broadcom bcm6328 gpio driver. + diff --git a/drivers/pinctrl/bcm/makefile b/drivers/pinctrl/bcm/makefile --- a/drivers/pinctrl/bcm/makefile +++ b/drivers/pinctrl/bcm/makefile +obj-$(config_pinctrl_bcm6328) += pinctrl-bcm6328.o diff --git a/drivers/pinctrl/bcm/pinctrl-bcm6328.c b/drivers/pinctrl/bcm/pinctrl-bcm6328.c --- /dev/null +++ b/drivers/pinctrl/bcm/pinctrl-bcm6328.c +// spdx-license-identifier: gpl-2.0+ +/* + * driver for bcm6328 gpio unit (pinctrl + gpio) + * + * copyright (c) 2021 alvaro fernandez rojas <noltari@gmail.com> + * copyright (c) 2016 jonas gorski <jonas.gorski@gmail.com> + */ + +#include <linux/bits.h> +#include <linux/gpio/driver.h> +#include <linux/kernel.h> +#include <linux/of.h> +#include <linux/pinctrl/pinmux.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> + +#include "../pinctrl-utils.h" + +#include "pinctrl-bcm63xx.h" + +#define bcm6328_num_gpios 32 + +#define bcm6328_mode_reg 0x18 +#define bcm6328_mux_hi_reg 0x1c +#define bcm6328_mux_lo_reg 0x20 +#define bcm6328_mux_other_reg 0x24 +#define bcm6328_mux_mask genmask(1, 0) + +struct bcm6328_pingroup { + const char *name; + const unsigned * const pins; + const unsigned num_pins; +}; + +struct bcm6328_function { + const char *name; + const char * const *groups; + const unsigned num_groups; + + unsigned mode_val:1; + unsigned mux_val:2; +}; + +static const unsigned int bcm6328_mux[] = { + bcm6328_mux_lo_reg, + bcm6328_mux_hi_reg, + bcm6328_mux_other_reg +}; + +static const struct pinctrl_pin_desc bcm6328_pins[] = { + pinctrl_pin(0, "gpio0"), + pinctrl_pin(1, "gpio1"), + pinctrl_pin(2, "gpio2"), + pinctrl_pin(3, "gpio3"), + pinctrl_pin(4, "gpio4"), + pinctrl_pin(5, "gpio5"), + pinctrl_pin(6, "gpio6"), + pinctrl_pin(7, "gpio7"), + pinctrl_pin(8, "gpio8"), + pinctrl_pin(9, "gpio9"), + pinctrl_pin(10, "gpio10"), + pinctrl_pin(11, "gpio11"), + pinctrl_pin(12, "gpio12"), + pinctrl_pin(13, "gpio13"), + pinctrl_pin(14, "gpio14"), + pinctrl_pin(15, "gpio15"), + pinctrl_pin(16, "gpio16"), + pinctrl_pin(17, "gpio17"), + pinctrl_pin(18, "gpio18"), + pinctrl_pin(19, "gpio19"), + pinctrl_pin(20, "gpio20"), + pinctrl_pin(21, "gpio21"), + pinctrl_pin(22, "gpio22"), + pinctrl_pin(23, "gpio23"), + pinctrl_pin(24, "gpio24"), + pinctrl_pin(25, "gpio25"), + pinctrl_pin(26, "gpio26"), + pinctrl_pin(27, "gpio27"), + pinctrl_pin(28, "gpio28"), + pinctrl_pin(29, "gpio29"), + pinctrl_pin(30, "gpio30"), + pinctrl_pin(31, "gpio31"), + + /* + * no idea where they really are; so let's put them according + * to their mux offsets. + */ + pinctrl_pin(36, "hsspi_cs1"), + pinctrl_pin(38, "usb_p2"), +}; + +static unsigned gpio0_pins[] = { 0 }; +static unsigned gpio1_pins[] = { 1 }; +static unsigned gpio2_pins[] = { 2 }; +static unsigned gpio3_pins[] = { 3 }; +static unsigned gpio4_pins[] = { 4 }; +static unsigned gpio5_pins[] = { 5 }; +static unsigned gpio6_pins[] = { 6 }; +static unsigned gpio7_pins[] = { 7 }; +static unsigned gpio8_pins[] = { 8 }; +static unsigned gpio9_pins[] = { 9 }; +static unsigned gpio10_pins[] = { 10 }; +static unsigned gpio11_pins[] = { 11 }; +static unsigned gpio12_pins[] = { 12 }; +static unsigned gpio13_pins[] = { 13 }; +static unsigned gpio14_pins[] = { 14 }; +static unsigned gpio15_pins[] = { 15 }; +static unsigned gpio16_pins[] = { 16 }; +static unsigned gpio17_pins[] = { 17 }; +static unsigned gpio18_pins[] = { 18 }; +static unsigned gpio19_pins[] = { 19 }; +static unsigned gpio20_pins[] = { 20 }; +static unsigned gpio21_pins[] = { 21 }; +static unsigned gpio22_pins[] = { 22 }; +static unsigned gpio23_pins[] = { 23 }; +static unsigned gpio24_pins[] = { 24 }; +static unsigned gpio25_pins[] = { 25 }; +static unsigned gpio26_pins[] = { 26 }; +static unsigned gpio27_pins[] = { 27 }; +static unsigned gpio28_pins[] = { 28 }; +static unsigned gpio29_pins[] = { 29 }; +static unsigned gpio30_pins[] = { 30 }; +static unsigned gpio31_pins[] = { 31 }; + +static unsigned hsspi_cs1_pins[] = { 36 }; +static unsigned usb_port1_pins[] = { 38 }; + +#define bcm6328_group(n) \ + { \ + .name = #n, \ + .pins = n##_pins, \ + .num_pins = array_size(n##_pins), \ + } + +static struct bcm6328_pingroup bcm6328_groups[] = { + bcm6328_group(gpio0), + bcm6328_group(gpio1), + bcm6328_group(gpio2), + bcm6328_group(gpio3), + bcm6328_group(gpio4), + bcm6328_group(gpio5), + bcm6328_group(gpio6), + bcm6328_group(gpio7), + bcm6328_group(gpio8), + bcm6328_group(gpio9), + bcm6328_group(gpio10), + bcm6328_group(gpio11), + bcm6328_group(gpio12), + bcm6328_group(gpio13), + bcm6328_group(gpio14), + bcm6328_group(gpio15), + bcm6328_group(gpio16), + bcm6328_group(gpio17), + bcm6328_group(gpio18), + bcm6328_group(gpio19), + bcm6328_group(gpio20), + bcm6328_group(gpio21), + bcm6328_group(gpio22), + bcm6328_group(gpio23), + bcm6328_group(gpio24), + bcm6328_group(gpio25), + bcm6328_group(gpio26), + bcm6328_group(gpio27), + bcm6328_group(gpio28), + bcm6328_group(gpio29), + bcm6328_group(gpio30), + bcm6328_group(gpio31), + + bcm6328_group(hsspi_cs1), + bcm6328_group(usb_port1), +}; + +/* gpio_mode */ +static const char * const led_groups[] = { + "gpio0", + "gpio1", + "gpio2", + "gpio3", + "gpio4", + "gpio5", + "gpio6", + "gpio7", + "gpio8", + "gpio9", + "gpio10", + "gpio11", + "gpio12", + "gpio13", + "gpio14", + "gpio15", + "gpio16", + "gpio17", + "gpio18", + "gpio19", + "gpio20", + "gpio21", + "gpio22", + "gpio23", +}; + +/* pinmux_sel */ +static const char * const serial_led_data_groups[] = { + "gpio6", +}; + +static const char * const serial_led_clk_groups[] = { + "gpio7", +}; + +static const char * const inet_act_led_groups[] = { + "gpio11", +}; + +static const char * const pcie_clkreq_groups[] = { + "gpio16", +}; + +static const char * const ephy0_act_led_groups[] = { + "gpio25", +}; + +static const char * const ephy1_act_led_groups[] = { + "gpio26", +}; + +static const char * const ephy2_act_led_groups[] = { + "gpio27", +}; + +static const char * const ephy3_act_led_groups[] = { + "gpio28", +}; + +static const char * const hsspi_cs1_groups[] = { + "hsspi_cs1" +}; + +static const char * const usb_host_port_groups[] = { + "usb_port1", +}; + +static const char * const usb_device_port_groups[] = { + "usb_port1", +}; + +#define bcm6328_mode_fun(n) \ + { \ + .name = #n, \ + .groups = n##_groups, \ + .num_groups = array_size(n##_groups), \ + .mode_val = 1, \ + } + +#define bcm6328_mux_fun(n, mux) \ + { \ + .name = #n, \ + .groups = n##_groups, \ + .num_groups = array_size(n##_groups), \ + .mux_val = mux, \ + } + +static const struct bcm6328_function bcm6328_funcs[] = { + bcm6328_mode_fun(led), + bcm6328_mux_fun(serial_led_data, 2), + bcm6328_mux_fun(serial_led_clk, 2), + bcm6328_mux_fun(inet_act_led, 1), + bcm6328_mux_fun(pcie_clkreq, 2), + bcm6328_mux_fun(ephy0_act_led, 1), + bcm6328_mux_fun(ephy1_act_led, 1), + bcm6328_mux_fun(ephy2_act_led, 1), + bcm6328_mux_fun(ephy3_act_led, 1), + bcm6328_mux_fun(hsspi_cs1, 2), + bcm6328_mux_fun(usb_host_port, 1), + bcm6328_mux_fun(usb_device_port, 2), +}; + +static inline unsigned int bcm6328_mux_off(unsigned int pin) +{ + return bcm6328_mux[pin / 16]; +} + +static int bcm6328_pinctrl_get_group_count(struct pinctrl_dev *pctldev) +{ + return array_size(bcm6328_groups); +} + +static const char *bcm6328_pinctrl_get_group_name(struct pinctrl_dev *pctldev, + unsigned group) +{ + return bcm6328_groups[group].name; +} + +static int bcm6328_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, + unsigned group, const unsigned **pins, + unsigned *num_pins) +{ + *pins = bcm6328_groups[group].pins; + *num_pins = bcm6328_groups[group].num_pins; + + return 0; +} + +static int bcm6328_pinctrl_get_func_count(struct pinctrl_dev *pctldev) +{ + return array_size(bcm6328_funcs); +} + +static const char *bcm6328_pinctrl_get_func_name(struct pinctrl_dev *pctldev, + unsigned selector) +{ + return bcm6328_funcs[selector].name; +} + +static int bcm6328_pinctrl_get_groups(struct pinctrl_dev *pctldev, + unsigned selector, + const char * const **groups, + unsigned * const num_groups) +{ + *groups = bcm6328_funcs[selector].groups; + *num_groups = bcm6328_funcs[selector].num_groups; + + return 0; +} + +static void bcm6328_rmw_mux(struct bcm63xx_pinctrl *pc, unsigned pin, + unsigned int mode, unsigned int mux) +{ + if (pin < bcm6328_num_gpios) + regmap_update_bits(pc->regs, bcm6328_mode_reg, bit(pin), + mode ? bit(pin) : 0); + + regmap_update_bits(pc->regs, bcm6328_mux_off(pin), + bcm6328_mux_mask << ((pin % 16) * 2), + mux << ((pin % 16) * 2)); +} + +static int bcm6328_pinctrl_set_mux(struct pinctrl_dev *pctldev, + unsigned selector, unsigned group) +{ + struct bcm63xx_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev); + const struct bcm6328_pingroup *pg = &bcm6328_groups[group]; + const struct bcm6328_function *f = &bcm6328_funcs[selector]; + + bcm6328_rmw_mux(pc, pg->pins[0], f->mode_val, f->mux_val); + + return 0; +} + +static int bcm6328_gpio_request_enable(struct pinctrl_dev *pctldev, + struct pinctrl_gpio_range *range, + unsigned offset) +{ + struct bcm63xx_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev); + + /* disable all functions using this pin */ + bcm6328_rmw_mux(pc, offset, 0, 0); + + return 0; +} + +static struct pinctrl_ops bcm6328_pctl_ops = { + .dt_free_map = pinctrl_utils_free_map, + .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, + .get_group_name = bcm6328_pinctrl_get_group_name, + .get_group_pins = bcm6328_pinctrl_get_group_pins, + .get_groups_count = bcm6328_pinctrl_get_group_count, +}; + +static struct pinmux_ops bcm6328_pmx_ops = { + .get_function_groups = bcm6328_pinctrl_get_groups, + .get_function_name = bcm6328_pinctrl_get_func_name, + .get_functions_count = bcm6328_pinctrl_get_func_count, + .gpio_request_enable = bcm6328_gpio_request_enable, + .set_mux = bcm6328_pinctrl_set_mux, + .strict = true, +}; + +static const struct bcm63xx_pinctrl_soc bcm6328_soc = { + .ngpios = bcm6328_num_gpios, + .npins = array_size(bcm6328_pins), + .pctl_ops = &bcm6328_pctl_ops, + .pins = bcm6328_pins, + .pmx_ops = &bcm6328_pmx_ops, +}; + +static int bcm6328_pinctrl_probe(struct platform_device *pdev) +{ + return bcm63xx_pinctrl_probe(pdev, &bcm6328_soc, null); +} + +static const struct of_device_id bcm6328_pinctrl_match[] = { + { .compatible = "brcm,bcm6328-pinctrl", }, + { /* sentinel */ } +}; + +static struct platform_driver bcm6328_pinctrl_driver = { + .probe = bcm6328_pinctrl_probe, + .driver = { + .name = "bcm6328-pinctrl", + .of_match_table = bcm6328_pinctrl_match, + }, +}; + +builtin_platform_driver(bcm6328_pinctrl_driver);
Pin Controllers (pinctrl)
9bf34ac5ab5805f0a798d40423c05596b7a0cee6
lvaro fern ndez rojas
drivers
pinctrl
bcm
pinctrl: add a pincontrol driver for bcm6358
add a pincotrol driver for bcm6358. bcm6358 allow overlaying different functions onto the gpio pins. it does not support configuring individual pins but only whole groups. these groups may overlap, and still require the directions to be set correctly in the gpio register. in addition the functions register controls other, not directly mux related functions.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add a pincontrol driver for bcm6358
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['kconfig', 'c', 'makefile']
3
378
0
--- diff --git a/drivers/pinctrl/bcm/kconfig b/drivers/pinctrl/bcm/kconfig --- a/drivers/pinctrl/bcm/kconfig +++ b/drivers/pinctrl/bcm/kconfig +config pinctrl_bcm6358 + bool "broadcom bcm6358 gpio driver" + depends on (bmips_generic || compile_test) + select pinctrl_bcm63xx + default bmips_generic + help + say y here to enable the broadcom bcm6358 gpio driver. + diff --git a/drivers/pinctrl/bcm/makefile b/drivers/pinctrl/bcm/makefile --- a/drivers/pinctrl/bcm/makefile +++ b/drivers/pinctrl/bcm/makefile +obj-$(config_pinctrl_bcm6358) += pinctrl-bcm6358.o diff --git a/drivers/pinctrl/bcm/pinctrl-bcm6358.c b/drivers/pinctrl/bcm/pinctrl-bcm6358.c --- /dev/null +++ b/drivers/pinctrl/bcm/pinctrl-bcm6358.c +// spdx-license-identifier: gpl-2.0+ +/* + * driver for bcm6358 gpio unit (pinctrl + gpio) + * + * copyright (c) 2021 alvaro fernandez rojas <noltari@gmail.com> + * copyright (c) 2016 jonas gorski <jonas.gorski@gmail.com> + */ + +#include <linux/bits.h> +#include <linux/gpio/driver.h> +#include <linux/kernel.h> +#include <linux/of.h> +#include <linux/pinctrl/pinmux.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> + +#include "../pinctrl-utils.h" + +#include "pinctrl-bcm63xx.h" + +#define bcm6358_num_gpios 40 + +#define bcm6358_mode_reg 0x18 +#define bcm6358_mode_mux_none 0 +#define bcm6358_mode_mux_ebi_cs bit(5) +#define bcm6358_mode_mux_uart1 bit(6) +#define bcm6358_mode_mux_spi_cs bit(7) +#define bcm6358_mode_mux_async_modem bit(8) +#define bcm6358_mode_mux_legacy_led bit(9) +#define bcm6358_mode_mux_serial_led bit(10) +#define bcm6358_mode_mux_led bit(11) +#define bcm6358_mode_mux_utopia bit(12) +#define bcm6358_mode_mux_clkrst bit(13) +#define bcm6358_mode_mux_pwm_syn_clk bit(14) +#define bcm6358_mode_mux_sys_irq bit(15) + +struct bcm6358_pingroup { + const char *name; + const unsigned * const pins; + const unsigned num_pins; + + const uint16_t mode_val; + + /* non-gpio function muxes require the gpio direction to be set */ + const uint16_t direction; +}; + +struct bcm6358_function { + const char *name; + const char * const *groups; + const unsigned num_groups; +}; + +struct bcm6358_priv { + struct regmap_field *overlays; +}; + +#define bcm6358_gpio_pin(a, b, bit1, bit2, bit3) \ + { \ + .number = a, \ + .name = b, \ + .drv_data = (void *)(bcm6358_mode_mux_##bit1 | \ + bcm6358_mode_mux_##bit2 | \ + bcm6358_mode_mux_##bit3), \ + } + +static const struct pinctrl_pin_desc bcm6358_pins[] = { + bcm6358_gpio_pin(0, "gpio0", led, none, none), + bcm6358_gpio_pin(1, "gpio1", led, none, none), + bcm6358_gpio_pin(2, "gpio2", led, none, none), + bcm6358_gpio_pin(3, "gpio3", led, none, none), + pinctrl_pin(4, "gpio4"), + bcm6358_gpio_pin(5, "gpio5", sys_irq, none, none), + bcm6358_gpio_pin(6, "gpio6", serial_led, none, none), + bcm6358_gpio_pin(7, "gpio7", serial_led, none, none), + bcm6358_gpio_pin(8, "gpio8", pwm_syn_clk, none, none), + bcm6358_gpio_pin(9, "gpio09", legacy_led, none, none), + bcm6358_gpio_pin(10, "gpio10", legacy_led, none, none), + bcm6358_gpio_pin(11, "gpio11", legacy_led, none, none), + bcm6358_gpio_pin(12, "gpio12", legacy_led, async_modem, utopia), + bcm6358_gpio_pin(13, "gpio13", legacy_led, async_modem, utopia), + bcm6358_gpio_pin(14, "gpio14", legacy_led, async_modem, utopia), + bcm6358_gpio_pin(15, "gpio15", legacy_led, async_modem, utopia), + pinctrl_pin(16, "gpio16"), + pinctrl_pin(17, "gpio17"), + pinctrl_pin(18, "gpio18"), + pinctrl_pin(19, "gpio19"), + pinctrl_pin(20, "gpio20"), + pinctrl_pin(21, "gpio21"), + bcm6358_gpio_pin(22, "gpio22", utopia, none, none), + bcm6358_gpio_pin(23, "gpio23", utopia, none, none), + bcm6358_gpio_pin(24, "gpio24", utopia, none, none), + bcm6358_gpio_pin(25, "gpio25", utopia, none, none), + bcm6358_gpio_pin(26, "gpio26", utopia, none, none), + bcm6358_gpio_pin(27, "gpio27", utopia, none, none), + bcm6358_gpio_pin(28, "gpio28", utopia, uart1, none), + bcm6358_gpio_pin(29, "gpio29", utopia, uart1, none), + bcm6358_gpio_pin(30, "gpio30", utopia, uart1, ebi_cs), + bcm6358_gpio_pin(31, "gpio31", utopia, uart1, ebi_cs), + bcm6358_gpio_pin(32, "gpio32", spi_cs, none, none), + bcm6358_gpio_pin(33, "gpio33", spi_cs, none, none), + pinctrl_pin(34, "gpio34"), + pinctrl_pin(35, "gpio35"), + pinctrl_pin(36, "gpio36"), + pinctrl_pin(37, "gpio37"), + pinctrl_pin(38, "gpio38"), + pinctrl_pin(39, "gpio39"), +}; + +static unsigned ebi_cs_grp_pins[] = { 30, 31 }; + +static unsigned uart1_grp_pins[] = { 28, 29, 30, 31 }; + +static unsigned spi_cs_grp_pins[] = { 32, 33 }; + +static unsigned async_modem_grp_pins[] = { 12, 13, 14, 15 }; + +static unsigned serial_led_grp_pins[] = { 6, 7 }; + +static unsigned legacy_led_grp_pins[] = { 9, 10, 11, 12, 13, 14, 15 }; + +static unsigned led_grp_pins[] = { 0, 1, 2, 3 }; + +static unsigned utopia_grp_pins[] = { + 12, 13, 14, 15, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, +}; + +static unsigned pwm_syn_clk_grp_pins[] = { 8 }; + +static unsigned sys_irq_grp_pins[] = { 5 }; + +#define bcm6358_gpio_mux_group(n, bit, dir) \ + { \ + .name = #n, \ + .pins = n##_pins, \ + .num_pins = array_size(n##_pins), \ + .mode_val = bcm6358_mode_mux_##bit, \ + .direction = dir, \ + } + +static const struct bcm6358_pingroup bcm6358_groups[] = { + bcm6358_gpio_mux_group(ebi_cs_grp, ebi_cs, 0x3), + bcm6358_gpio_mux_group(uart1_grp, uart1, 0x2), + bcm6358_gpio_mux_group(spi_cs_grp, spi_cs, 0x6), + bcm6358_gpio_mux_group(async_modem_grp, async_modem, 0x6), + bcm6358_gpio_mux_group(legacy_led_grp, legacy_led, 0x7f), + bcm6358_gpio_mux_group(serial_led_grp, serial_led, 0x3), + bcm6358_gpio_mux_group(led_grp, led, 0xf), + bcm6358_gpio_mux_group(utopia_grp, utopia, 0x000f), + bcm6358_gpio_mux_group(pwm_syn_clk_grp, pwm_syn_clk, 0x1), + bcm6358_gpio_mux_group(sys_irq_grp, sys_irq, 0x1), +}; + +static const char * const ebi_cs_groups[] = { + "ebi_cs_grp" +}; + +static const char * const uart1_groups[] = { + "uart1_grp" +}; + +static const char * const spi_cs_2_3_groups[] = { + "spi_cs_2_3_grp" +}; + +static const char * const async_modem_groups[] = { + "async_modem_grp" +}; + +static const char * const legacy_led_groups[] = { + "legacy_led_grp", +}; + +static const char * const serial_led_groups[] = { + "serial_led_grp", +}; + +static const char * const led_groups[] = { + "led_grp", +}; + +static const char * const clkrst_groups[] = { + "clkrst_grp", +}; + +static const char * const pwm_syn_clk_groups[] = { + "pwm_syn_clk_grp", +}; + +static const char * const sys_irq_groups[] = { + "sys_irq_grp", +}; + +#define bcm6358_fun(n) \ + { \ + .name = #n, \ + .groups = n##_groups, \ + .num_groups = array_size(n##_groups), \ + } + +static const struct bcm6358_function bcm6358_funcs[] = { + bcm6358_fun(ebi_cs), + bcm6358_fun(uart1), + bcm6358_fun(spi_cs_2_3), + bcm6358_fun(async_modem), + bcm6358_fun(legacy_led), + bcm6358_fun(serial_led), + bcm6358_fun(led), + bcm6358_fun(clkrst), + bcm6358_fun(pwm_syn_clk), + bcm6358_fun(sys_irq), +}; + +static int bcm6358_pinctrl_get_group_count(struct pinctrl_dev *pctldev) +{ + return array_size(bcm6358_groups); +} + +static const char *bcm6358_pinctrl_get_group_name(struct pinctrl_dev *pctldev, + unsigned group) +{ + return bcm6358_groups[group].name; +} + +static int bcm6358_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, + unsigned group, const unsigned **pins, + unsigned *num_pins) +{ + *pins = bcm6358_groups[group].pins; + *num_pins = bcm6358_groups[group].num_pins; + + return 0; +} + +static int bcm6358_pinctrl_get_func_count(struct pinctrl_dev *pctldev) +{ + return array_size(bcm6358_funcs); +} + +static const char *bcm6358_pinctrl_get_func_name(struct pinctrl_dev *pctldev, + unsigned selector) +{ + return bcm6358_funcs[selector].name; +} + +static int bcm6358_pinctrl_get_groups(struct pinctrl_dev *pctldev, + unsigned selector, + const char * const **groups, + unsigned * const num_groups) +{ + *groups = bcm6358_funcs[selector].groups; + *num_groups = bcm6358_funcs[selector].num_groups; + + return 0; +} + +static int bcm6358_pinctrl_set_mux(struct pinctrl_dev *pctldev, + unsigned selector, unsigned group) +{ + struct bcm63xx_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev); + struct bcm6358_priv *priv = pc->driver_data; + const struct bcm6358_pingroup *pg = &bcm6358_groups[group]; + unsigned int val = pg->mode_val; + unsigned int mask = val; + unsigned pin; + + for (pin = 0; pin < pg->num_pins; pin++) + mask |= (unsigned long)bcm6358_pins[pin].drv_data; + + regmap_field_update_bits(priv->overlays, mask, val); + + for (pin = 0; pin < pg->num_pins; pin++) { + struct pinctrl_gpio_range *range; + unsigned int hw_gpio = bcm6358_pins[pin].number; + + range = pinctrl_find_gpio_range_from_pin(pctldev, hw_gpio); + if (range) { + struct gpio_chip *gc = range->gc; + + if (pg->direction & bit(pin)) + gc->direction_output(gc, hw_gpio, 0); + else + gc->direction_input(gc, hw_gpio); + } + } + + return 0; +} + +static int bcm6358_gpio_request_enable(struct pinctrl_dev *pctldev, + struct pinctrl_gpio_range *range, + unsigned offset) +{ + struct bcm63xx_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev); + struct bcm6358_priv *priv = pc->driver_data; + unsigned int mask; + + mask = (unsigned long) bcm6358_pins[offset].drv_data; + if (!mask) + return 0; + + /* disable all functions using this pin */ + return regmap_field_update_bits(priv->overlays, mask, 0); +} + +static struct pinctrl_ops bcm6358_pctl_ops = { + .dt_free_map = pinctrl_utils_free_map, + .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, + .get_group_name = bcm6358_pinctrl_get_group_name, + .get_group_pins = bcm6358_pinctrl_get_group_pins, + .get_groups_count = bcm6358_pinctrl_get_group_count, +}; + +static struct pinmux_ops bcm6358_pmx_ops = { + .get_function_groups = bcm6358_pinctrl_get_groups, + .get_function_name = bcm6358_pinctrl_get_func_name, + .get_functions_count = bcm6358_pinctrl_get_func_count, + .gpio_request_enable = bcm6358_gpio_request_enable, + .set_mux = bcm6358_pinctrl_set_mux, + .strict = true, +}; + +static const struct bcm63xx_pinctrl_soc bcm6358_soc = { + .ngpios = bcm6358_num_gpios, + .npins = array_size(bcm6358_pins), + .pctl_ops = &bcm6358_pctl_ops, + .pins = bcm6358_pins, + .pmx_ops = &bcm6358_pmx_ops, +}; + +static int bcm6358_pinctrl_probe(struct platform_device *pdev) +{ + struct reg_field overlays = reg_field(bcm6358_mode_reg, 0, 15); + struct device *dev = &pdev->dev; + struct bcm63xx_pinctrl *pc; + struct bcm6358_priv *priv; + int err; + + priv = devm_kzalloc(dev, sizeof(*priv), gfp_kernel); + if (!priv) + return -enomem; + + err = bcm63xx_pinctrl_probe(pdev, &bcm6358_soc, (void *) priv); + if (err) + return err; + + pc = platform_get_drvdata(pdev); + + priv->overlays = devm_regmap_field_alloc(dev, pc->regs, overlays); + if (is_err(priv->overlays)) + return ptr_err(priv->overlays); + + return 0; +} + +static const struct of_device_id bcm6358_pinctrl_match[] = { + { .compatible = "brcm,bcm6358-pinctrl", }, + { /* sentinel */ } +}; + +static struct platform_driver bcm6358_pinctrl_driver = { + .probe = bcm6358_pinctrl_probe, + .driver = { + .name = "bcm6358-pinctrl", + .of_match_table = bcm6358_pinctrl_match, + }, +}; + +builtin_platform_driver(bcm6358_pinctrl_driver);
Pin Controllers (pinctrl)
9494b16976e1ae3afc643abf638a25f2ce4c3f2b
lvaro fern ndez rojas
drivers
pinctrl
bcm
pinctrl: add a pincontrol driver for bcm6362
add a pincotrol driver for bcm6362. bcm6362 allows muxing individual gpio pins to the led controller, to be available by the integrated wifi, or other functions. it also supports overlay groups, of which only nand is documented.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add a pincontrol driver for bcm6362
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['kconfig', 'c', 'makefile']
3
626
0
--- diff --git a/drivers/pinctrl/bcm/kconfig b/drivers/pinctrl/bcm/kconfig --- a/drivers/pinctrl/bcm/kconfig +++ b/drivers/pinctrl/bcm/kconfig +config pinctrl_bcm6362 + bool "broadcom bcm6362 gpio driver" + depends on (bmips_generic || compile_test) + select pinctrl_bcm63xx + default bmips_generic + help + say y here to enable the broadcom bcm6362 gpio driver. + diff --git a/drivers/pinctrl/bcm/makefile b/drivers/pinctrl/bcm/makefile --- a/drivers/pinctrl/bcm/makefile +++ b/drivers/pinctrl/bcm/makefile +obj-$(config_pinctrl_bcm6362) += pinctrl-bcm6362.o diff --git a/drivers/pinctrl/bcm/pinctrl-bcm6362.c b/drivers/pinctrl/bcm/pinctrl-bcm6362.c --- /dev/null +++ b/drivers/pinctrl/bcm/pinctrl-bcm6362.c +// spdx-license-identifier: gpl-2.0+ +/* + * driver for bcm6362 gpio unit (pinctrl + gpio) + * + * copyright (c) 2021 alvaro fernandez rojas <noltari@gmail.com> + * copyright (c) 2016 jonas gorski <jonas.gorski@gmail.com> + */ + +#include <linux/bits.h> +#include <linux/gpio/driver.h> +#include <linux/kernel.h> +#include <linux/of.h> +#include <linux/pinctrl/pinmux.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> + +#include "../pinctrl-utils.h" + +#include "pinctrl-bcm63xx.h" + +#define bcm6362_bank_gpios 32 +#define bcm6362_num_gpios 48 +#define bcm6362_num_leds 24 + +#define bcm6362_led_reg 0x10 +#define bcm6362_mode_reg 0x18 +#define bcm6362_ctrl_reg 0x1c +#define bcm6362_basemode_reg 0x38 +#define basemode_nand bit(2) + +enum bcm6362_pinctrl_reg { + bcm6362_ledctrl, + bcm6362_mode, + bcm6362_ctrl, + bcm6362_basemode, +}; + +struct bcm6362_pingroup { + const char *name; + const unsigned * const pins; + const unsigned num_pins; +}; + +struct bcm6362_function { + const char *name; + const char * const *groups; + const unsigned num_groups; + + enum bcm6362_pinctrl_reg reg; + uint32_t basemode_mask; +}; + +#define bcm6362_pin(a, b, mask) \ + { \ + .number = a, \ + .name = b, \ + .drv_data = (void *)(mask), \ + } + +static const struct pinctrl_pin_desc bcm6362_pins[] = { + pinctrl_pin(0, "gpio0"), + pinctrl_pin(1, "gpio1"), + pinctrl_pin(2, "gpio2"), + pinctrl_pin(3, "gpio3"), + pinctrl_pin(4, "gpio4"), + pinctrl_pin(5, "gpio5"), + pinctrl_pin(6, "gpio6"), + pinctrl_pin(7, "gpio7"), + bcm6362_pin(8, "gpio8", basemode_nand), + pinctrl_pin(9, "gpio9"), + pinctrl_pin(10, "gpio10"), + pinctrl_pin(11, "gpio11"), + bcm6362_pin(12, "gpio12", basemode_nand), + bcm6362_pin(13, "gpio13", basemode_nand), + bcm6362_pin(14, "gpio14", basemode_nand), + bcm6362_pin(15, "gpio15", basemode_nand), + bcm6362_pin(16, "gpio16", basemode_nand), + bcm6362_pin(17, "gpio17", basemode_nand), + bcm6362_pin(18, "gpio18", basemode_nand), + bcm6362_pin(19, "gpio19", basemode_nand), + bcm6362_pin(20, "gpio20", basemode_nand), + bcm6362_pin(21, "gpio21", basemode_nand), + bcm6362_pin(22, "gpio22", basemode_nand), + bcm6362_pin(23, "gpio23", basemode_nand), + pinctrl_pin(24, "gpio24"), + pinctrl_pin(25, "gpio25"), + pinctrl_pin(26, "gpio26"), + bcm6362_pin(27, "gpio27", basemode_nand), + pinctrl_pin(28, "gpio28"), + pinctrl_pin(29, "gpio29"), + pinctrl_pin(30, "gpio30"), + pinctrl_pin(31, "gpio31"), + pinctrl_pin(32, "gpio32"), + pinctrl_pin(33, "gpio33"), + pinctrl_pin(34, "gpio34"), + pinctrl_pin(35, "gpio35"), + pinctrl_pin(36, "gpio36"), + pinctrl_pin(37, "gpio37"), + pinctrl_pin(38, "gpio38"), + pinctrl_pin(39, "gpio39"), + pinctrl_pin(40, "gpio40"), + pinctrl_pin(41, "gpio41"), + pinctrl_pin(42, "gpio42"), + pinctrl_pin(43, "gpio43"), + pinctrl_pin(44, "gpio44"), + pinctrl_pin(45, "gpio45"), + pinctrl_pin(46, "gpio46"), + pinctrl_pin(47, "gpio47"), +}; + +static unsigned gpio0_pins[] = { 0 }; +static unsigned gpio1_pins[] = { 1 }; +static unsigned gpio2_pins[] = { 2 }; +static unsigned gpio3_pins[] = { 3 }; +static unsigned gpio4_pins[] = { 4 }; +static unsigned gpio5_pins[] = { 5 }; +static unsigned gpio6_pins[] = { 6 }; +static unsigned gpio7_pins[] = { 7 }; +static unsigned gpio8_pins[] = { 8 }; +static unsigned gpio9_pins[] = { 9 }; +static unsigned gpio10_pins[] = { 10 }; +static unsigned gpio11_pins[] = { 11 }; +static unsigned gpio12_pins[] = { 12 }; +static unsigned gpio13_pins[] = { 13 }; +static unsigned gpio14_pins[] = { 14 }; +static unsigned gpio15_pins[] = { 15 }; +static unsigned gpio16_pins[] = { 16 }; +static unsigned gpio17_pins[] = { 17 }; +static unsigned gpio18_pins[] = { 18 }; +static unsigned gpio19_pins[] = { 19 }; +static unsigned gpio20_pins[] = { 20 }; +static unsigned gpio21_pins[] = { 21 }; +static unsigned gpio22_pins[] = { 22 }; +static unsigned gpio23_pins[] = { 23 }; +static unsigned gpio24_pins[] = { 24 }; +static unsigned gpio25_pins[] = { 25 }; +static unsigned gpio26_pins[] = { 26 }; +static unsigned gpio27_pins[] = { 27 }; +static unsigned gpio28_pins[] = { 28 }; +static unsigned gpio29_pins[] = { 29 }; +static unsigned gpio30_pins[] = { 30 }; +static unsigned gpio31_pins[] = { 31 }; +static unsigned gpio32_pins[] = { 32 }; +static unsigned gpio33_pins[] = { 33 }; +static unsigned gpio34_pins[] = { 34 }; +static unsigned gpio35_pins[] = { 35 }; +static unsigned gpio36_pins[] = { 36 }; +static unsigned gpio37_pins[] = { 37 }; +static unsigned gpio38_pins[] = { 38 }; +static unsigned gpio39_pins[] = { 39 }; +static unsigned gpio40_pins[] = { 40 }; +static unsigned gpio41_pins[] = { 41 }; +static unsigned gpio42_pins[] = { 42 }; +static unsigned gpio43_pins[] = { 43 }; +static unsigned gpio44_pins[] = { 44 }; +static unsigned gpio45_pins[] = { 45 }; +static unsigned gpio46_pins[] = { 46 }; +static unsigned gpio47_pins[] = { 47 }; + +static unsigned nand_grp_pins[] = { + 8, 12, 13, 14, 15, 16, 17, + 18, 19, 20, 21, 22, 23, 27, +}; + +#define bcm6362_group(n) \ + { \ + .name = #n, \ + .pins = n##_pins, \ + .num_pins = array_size(n##_pins), \ + } + +static struct bcm6362_pingroup bcm6362_groups[] = { + bcm6362_group(gpio0), + bcm6362_group(gpio1), + bcm6362_group(gpio2), + bcm6362_group(gpio3), + bcm6362_group(gpio4), + bcm6362_group(gpio5), + bcm6362_group(gpio6), + bcm6362_group(gpio7), + bcm6362_group(gpio8), + bcm6362_group(gpio9), + bcm6362_group(gpio10), + bcm6362_group(gpio11), + bcm6362_group(gpio12), + bcm6362_group(gpio13), + bcm6362_group(gpio14), + bcm6362_group(gpio15), + bcm6362_group(gpio16), + bcm6362_group(gpio17), + bcm6362_group(gpio18), + bcm6362_group(gpio19), + bcm6362_group(gpio20), + bcm6362_group(gpio21), + bcm6362_group(gpio22), + bcm6362_group(gpio23), + bcm6362_group(gpio24), + bcm6362_group(gpio25), + bcm6362_group(gpio26), + bcm6362_group(gpio27), + bcm6362_group(gpio28), + bcm6362_group(gpio29), + bcm6362_group(gpio30), + bcm6362_group(gpio31), + bcm6362_group(gpio32), + bcm6362_group(gpio33), + bcm6362_group(gpio34), + bcm6362_group(gpio35), + bcm6362_group(gpio36), + bcm6362_group(gpio37), + bcm6362_group(gpio38), + bcm6362_group(gpio39), + bcm6362_group(gpio40), + bcm6362_group(gpio41), + bcm6362_group(gpio42), + bcm6362_group(gpio43), + bcm6362_group(gpio44), + bcm6362_group(gpio45), + bcm6362_group(gpio46), + bcm6362_group(gpio47), + bcm6362_group(nand_grp), +}; + +static const char * const led_groups[] = { + "gpio0", + "gpio1", + "gpio2", + "gpio3", + "gpio4", + "gpio5", + "gpio6", + "gpio7", + "gpio8", + "gpio9", + "gpio10", + "gpio11", + "gpio12", + "gpio13", + "gpio14", + "gpio15", + "gpio16", + "gpio17", + "gpio18", + "gpio19", + "gpio20", + "gpio21", + "gpio22", + "gpio23", +}; + +static const char * const usb_device_led_groups[] = { + "gpio0", +}; + +static const char * const sys_irq_groups[] = { + "gpio1", +}; + +static const char * const serial_led_clk_groups[] = { + "gpio2", +}; + +static const char * const serial_led_data_groups[] = { + "gpio3", +}; + +static const char * const robosw_led_data_groups[] = { + "gpio4", +}; + +static const char * const robosw_led_clk_groups[] = { + "gpio5", +}; + +static const char * const robosw_led0_groups[] = { + "gpio6", +}; + +static const char * const robosw_led1_groups[] = { + "gpio7", +}; + +static const char * const inet_led_groups[] = { + "gpio8", +}; + +static const char * const spi_cs2_groups[] = { + "gpio9", +}; + +static const char * const spi_cs3_groups[] = { + "gpio10", +}; + +static const char * const ntr_pulse_groups[] = { + "gpio11", +}; + +static const char * const uart1_scts_groups[] = { + "gpio12", +}; + +static const char * const uart1_srts_groups[] = { + "gpio13", +}; + +static const char * const uart1_sdin_groups[] = { + "gpio14", +}; + +static const char * const uart1_sdout_groups[] = { + "gpio15", +}; + +static const char * const adsl_spi_miso_groups[] = { + "gpio16", +}; + +static const char * const adsl_spi_mosi_groups[] = { + "gpio17", +}; + +static const char * const adsl_spi_clk_groups[] = { + "gpio18", +}; + +static const char * const adsl_spi_cs_groups[] = { + "gpio19", +}; + +static const char * const ephy0_led_groups[] = { + "gpio20", +}; + +static const char * const ephy1_led_groups[] = { + "gpio21", +}; + +static const char * const ephy2_led_groups[] = { + "gpio22", +}; + +static const char * const ephy3_led_groups[] = { + "gpio23", +}; + +static const char * const ext_irq0_groups[] = { + "gpio24", +}; + +static const char * const ext_irq1_groups[] = { + "gpio25", +}; + +static const char * const ext_irq2_groups[] = { + "gpio26", +}; + +static const char * const ext_irq3_groups[] = { + "gpio27", +}; + +static const char * const wifi_groups[] = { + "gpio32", + "gpio33", + "gpio34", + "gpio35", + "gpio36", + "gpio37", + "gpio38", + "gpio39", + "gpio40", + "gpio41", + "gpio42", + "gpio43", + "gpio44", + "gpio45", + "gpio46", + "gpio47", +}; + +static const char * const nand_groups[] = { + "nand_grp", +}; + +#define bcm6362_led_fun(n) \ + { \ + .name = #n, \ + .groups = n##_groups, \ + .num_groups = array_size(n##_groups), \ + .reg = bcm6362_ledctrl, \ + } + +#define bcm6362_mode_fun(n) \ + { \ + .name = #n, \ + .groups = n##_groups, \ + .num_groups = array_size(n##_groups), \ + .reg = bcm6362_mode, \ + } + +#define bcm6362_ctrl_fun(n) \ + { \ + .name = #n, \ + .groups = n##_groups, \ + .num_groups = array_size(n##_groups), \ + .reg = bcm6362_ctrl, \ + } + +#define bcm6362_basemode_fun(n, mask) \ + { \ + .name = #n, \ + .groups = n##_groups, \ + .num_groups = array_size(n##_groups), \ + .reg = bcm6362_basemode, \ + .basemode_mask = (mask), \ + } + +static const struct bcm6362_function bcm6362_funcs[] = { + bcm6362_led_fun(led), + bcm6362_mode_fun(usb_device_led), + bcm6362_mode_fun(sys_irq), + bcm6362_mode_fun(serial_led_clk), + bcm6362_mode_fun(serial_led_data), + bcm6362_mode_fun(robosw_led_data), + bcm6362_mode_fun(robosw_led_clk), + bcm6362_mode_fun(robosw_led0), + bcm6362_mode_fun(robosw_led1), + bcm6362_mode_fun(inet_led), + bcm6362_mode_fun(spi_cs2), + bcm6362_mode_fun(spi_cs3), + bcm6362_mode_fun(ntr_pulse), + bcm6362_mode_fun(uart1_scts), + bcm6362_mode_fun(uart1_srts), + bcm6362_mode_fun(uart1_sdin), + bcm6362_mode_fun(uart1_sdout), + bcm6362_mode_fun(adsl_spi_miso), + bcm6362_mode_fun(adsl_spi_mosi), + bcm6362_mode_fun(adsl_spi_clk), + bcm6362_mode_fun(adsl_spi_cs), + bcm6362_mode_fun(ephy0_led), + bcm6362_mode_fun(ephy1_led), + bcm6362_mode_fun(ephy2_led), + bcm6362_mode_fun(ephy3_led), + bcm6362_mode_fun(ext_irq0), + bcm6362_mode_fun(ext_irq1), + bcm6362_mode_fun(ext_irq2), + bcm6362_mode_fun(ext_irq3), + bcm6362_ctrl_fun(wifi), + bcm6362_basemode_fun(nand, basemode_nand), +}; + +static int bcm6362_pinctrl_get_group_count(struct pinctrl_dev *pctldev) +{ + return array_size(bcm6362_groups); +} + +static const char *bcm6362_pinctrl_get_group_name(struct pinctrl_dev *pctldev, + unsigned group) +{ + return bcm6362_groups[group].name; +} + +static int bcm6362_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, + unsigned group, const unsigned **pins, + unsigned *num_pins) +{ + *pins = bcm6362_groups[group].pins; + *num_pins = bcm6362_groups[group].num_pins; + + return 0; +} + +static int bcm6362_pinctrl_get_func_count(struct pinctrl_dev *pctldev) +{ + return array_size(bcm6362_funcs); +} + +static const char *bcm6362_pinctrl_get_func_name(struct pinctrl_dev *pctldev, + unsigned selector) +{ + return bcm6362_funcs[selector].name; +} + +static int bcm6362_pinctrl_get_groups(struct pinctrl_dev *pctldev, + unsigned selector, + const char * const **groups, + unsigned * const num_groups) +{ + *groups = bcm6362_funcs[selector].groups; + *num_groups = bcm6362_funcs[selector].num_groups; + + return 0; +} + +static void bcm6362_set_gpio(struct bcm63xx_pinctrl *pc, unsigned pin) +{ + const struct pinctrl_pin_desc *desc = &bcm6362_pins[pin]; + unsigned int mask = bcm63xx_bank_pin(pin); + + if (desc->drv_data) + regmap_update_bits(pc->regs, bcm6362_basemode_reg, + (uint32_t) desc->drv_data, 0); + + if (pin < bcm63xx_bank_gpios) { + /* base mode 0 => gpio 1 => mux function */ + regmap_update_bits(pc->regs, bcm6362_mode_reg, mask, 0); + + /* pins 0-23 might be muxed to led */ + if (pin < bcm6362_num_leds) + regmap_update_bits(pc->regs, bcm6362_led_reg, mask, 0); + } else { + /* ctrl reg 0 => wifi function 1 => gpio */ + regmap_update_bits(pc->regs, bcm6362_ctrl_reg, mask, mask); + } +} + +static int bcm6362_pinctrl_set_mux(struct pinctrl_dev *pctldev, + unsigned selector, unsigned group) +{ + struct bcm63xx_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev); + const struct bcm6362_pingroup *pg = &bcm6362_groups[group]; + const struct bcm6362_function *f = &bcm6362_funcs[selector]; + unsigned i; + unsigned int reg; + unsigned int val, mask; + + for (i = 0; i < pg->num_pins; i++) + bcm6362_set_gpio(pc, pg->pins[i]); + + switch (f->reg) { + case bcm6362_ledctrl: + reg = bcm6362_led_reg; + mask = bit(pg->pins[0]); + val = bit(pg->pins[0]); + break; + case bcm6362_mode: + reg = bcm6362_mode_reg; + mask = bit(pg->pins[0]); + val = bit(pg->pins[0]); + break; + case bcm6362_ctrl: + reg = bcm6362_ctrl_reg; + mask = bit(pg->pins[0]); + val = 0; + break; + case bcm6362_basemode: + reg = bcm6362_basemode_reg; + mask = f->basemode_mask; + val = f->basemode_mask; + break; + default: + warn_on(1); + return -einval; + } + + regmap_update_bits(pc->regs, reg, mask, val); + + return 0; +} + +static int bcm6362_gpio_request_enable(struct pinctrl_dev *pctldev, + struct pinctrl_gpio_range *range, + unsigned offset) +{ + struct bcm63xx_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev); + + /* disable all functions using this pin */ + bcm6362_set_gpio(pc, offset); + + return 0; +} + +static struct pinctrl_ops bcm6362_pctl_ops = { + .dt_free_map = pinctrl_utils_free_map, + .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, + .get_group_name = bcm6362_pinctrl_get_group_name, + .get_group_pins = bcm6362_pinctrl_get_group_pins, + .get_groups_count = bcm6362_pinctrl_get_group_count, +}; + +static struct pinmux_ops bcm6362_pmx_ops = { + .get_function_groups = bcm6362_pinctrl_get_groups, + .get_function_name = bcm6362_pinctrl_get_func_name, + .get_functions_count = bcm6362_pinctrl_get_func_count, + .gpio_request_enable = bcm6362_gpio_request_enable, + .set_mux = bcm6362_pinctrl_set_mux, + .strict = true, +}; + +static const struct bcm63xx_pinctrl_soc bcm6362_soc = { + .ngpios = bcm6362_num_gpios, + .npins = array_size(bcm6362_pins), + .pctl_ops = &bcm6362_pctl_ops, + .pins = bcm6362_pins, + .pmx_ops = &bcm6362_pmx_ops, +}; + +static int bcm6362_pinctrl_probe(struct platform_device *pdev) +{ + return bcm63xx_pinctrl_probe(pdev, &bcm6362_soc, null); +} + +static const struct of_device_id bcm6362_pinctrl_match[] = { + { .compatible = "brcm,bcm6362-pinctrl", }, + { /* sentinel */ } +}; + +static struct platform_driver bcm6362_pinctrl_driver = { + .probe = bcm6362_pinctrl_probe, + .driver = { + .name = "bcm6362-pinctrl", + .of_match_table = bcm6362_pinctrl_match, + }, +}; + +builtin_platform_driver(bcm6362_pinctrl_driver);
Pin Controllers (pinctrl)
705791e23ecd93d6c2697234fdf0c22b499c0a5b
lvaro fern ndez rojas
drivers
pinctrl
bcm
pinctrl: add a pincontrol driver for bcm6368
add a pincontrol driver for bcm6368. bcm6368 allows muxing the first 32 gpios onto alternative functions. not all are documented.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add a pincontrol driver for bcm6368
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['kconfig', 'c', 'makefile']
3
532
0
--- diff --git a/drivers/pinctrl/bcm/kconfig b/drivers/pinctrl/bcm/kconfig --- a/drivers/pinctrl/bcm/kconfig +++ b/drivers/pinctrl/bcm/kconfig +config pinctrl_bcm6368 + bool "broadcom bcm6368 gpio driver" + depends on (bmips_generic || compile_test) + select pinctrl_bcm63xx + default bmips_generic + help + say y here to enable the broadcom bcm6368 gpio driver. + diff --git a/drivers/pinctrl/bcm/makefile b/drivers/pinctrl/bcm/makefile --- a/drivers/pinctrl/bcm/makefile +++ b/drivers/pinctrl/bcm/makefile +obj-$(config_pinctrl_bcm6368) += pinctrl-bcm6368.o diff --git a/drivers/pinctrl/bcm/pinctrl-bcm6368.c b/drivers/pinctrl/bcm/pinctrl-bcm6368.c --- /dev/null +++ b/drivers/pinctrl/bcm/pinctrl-bcm6368.c +// spdx-license-identifier: gpl-2.0+ +/* + * driver for bcm6368 gpio unit (pinctrl + gpio) + * + * copyright (c) 2021 alvaro fernandez rojas <noltari@gmail.com> + * copyright (c) 2016 jonas gorski <jonas.gorski@gmail.com> + */ + +#include <linux/bits.h> +#include <linux/gpio/driver.h> +#include <linux/kernel.h> +#include <linux/of.h> +#include <linux/pinctrl/pinmux.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> + +#include "../pinctrl-utils.h" + +#include "pinctrl-bcm63xx.h" + +#define bcm6368_num_gpios 38 + +#define bcm6368_mode_reg 0x18 +#define bcm6368_basemode_reg 0x38 +#define bcm6368_basemode_mask 0x7 +#define bcm6368_basemode_gpio 0x0 +#define bcm6368_basemode_uart1 0x1 + +struct bcm6368_pingroup { + const char *name; + const unsigned * const pins; + const unsigned num_pins; +}; + +struct bcm6368_function { + const char *name; + const char * const *groups; + const unsigned num_groups; + + unsigned dir_out:16; + unsigned basemode:3; +}; + +struct bcm6368_priv { + struct regmap_field *overlays; +}; + +#define bcm6368_basemode_pin(a, b) \ + { \ + .number = a, \ + .name = b, \ + .drv_data = (void *)true \ + } + +static const struct pinctrl_pin_desc bcm6368_pins[] = { + pinctrl_pin(0, "gpio0"), + pinctrl_pin(1, "gpio1"), + pinctrl_pin(2, "gpio2"), + pinctrl_pin(3, "gpio3"), + pinctrl_pin(4, "gpio4"), + pinctrl_pin(5, "gpio5"), + pinctrl_pin(6, "gpio6"), + pinctrl_pin(7, "gpio7"), + pinctrl_pin(8, "gpio8"), + pinctrl_pin(9, "gpio9"), + pinctrl_pin(10, "gpio10"), + pinctrl_pin(11, "gpio11"), + pinctrl_pin(12, "gpio12"), + pinctrl_pin(13, "gpio13"), + pinctrl_pin(14, "gpio14"), + pinctrl_pin(15, "gpio15"), + pinctrl_pin(16, "gpio16"), + pinctrl_pin(17, "gpio17"), + pinctrl_pin(18, "gpio18"), + pinctrl_pin(19, "gpio19"), + pinctrl_pin(20, "gpio20"), + pinctrl_pin(21, "gpio21"), + pinctrl_pin(22, "gpio22"), + pinctrl_pin(23, "gpio23"), + pinctrl_pin(24, "gpio24"), + pinctrl_pin(25, "gpio25"), + pinctrl_pin(26, "gpio26"), + pinctrl_pin(27, "gpio27"), + pinctrl_pin(28, "gpio28"), + pinctrl_pin(29, "gpio29"), + bcm6368_basemode_pin(30, "gpio30"), + bcm6368_basemode_pin(31, "gpio31"), + bcm6368_basemode_pin(32, "gpio32"), + bcm6368_basemode_pin(33, "gpio33"), + pinctrl_pin(34, "gpio34"), + pinctrl_pin(35, "gpio35"), + pinctrl_pin(36, "gpio36"), + pinctrl_pin(37, "gpio37"), +}; + +static unsigned gpio0_pins[] = { 0 }; +static unsigned gpio1_pins[] = { 1 }; +static unsigned gpio2_pins[] = { 2 }; +static unsigned gpio3_pins[] = { 3 }; +static unsigned gpio4_pins[] = { 4 }; +static unsigned gpio5_pins[] = { 5 }; +static unsigned gpio6_pins[] = { 6 }; +static unsigned gpio7_pins[] = { 7 }; +static unsigned gpio8_pins[] = { 8 }; +static unsigned gpio9_pins[] = { 9 }; +static unsigned gpio10_pins[] = { 10 }; +static unsigned gpio11_pins[] = { 11 }; +static unsigned gpio12_pins[] = { 12 }; +static unsigned gpio13_pins[] = { 13 }; +static unsigned gpio14_pins[] = { 14 }; +static unsigned gpio15_pins[] = { 15 }; +static unsigned gpio16_pins[] = { 16 }; +static unsigned gpio17_pins[] = { 17 }; +static unsigned gpio18_pins[] = { 18 }; +static unsigned gpio19_pins[] = { 19 }; +static unsigned gpio20_pins[] = { 20 }; +static unsigned gpio21_pins[] = { 21 }; +static unsigned gpio22_pins[] = { 22 }; +static unsigned gpio23_pins[] = { 23 }; +static unsigned gpio24_pins[] = { 24 }; +static unsigned gpio25_pins[] = { 25 }; +static unsigned gpio26_pins[] = { 26 }; +static unsigned gpio27_pins[] = { 27 }; +static unsigned gpio28_pins[] = { 28 }; +static unsigned gpio29_pins[] = { 29 }; +static unsigned gpio30_pins[] = { 30 }; +static unsigned gpio31_pins[] = { 31 }; +static unsigned uart1_grp_pins[] = { 30, 31, 32, 33 }; + +#define bcm6368_group(n) \ + { \ + .name = #n, \ + .pins = n##_pins, \ + .num_pins = array_size(n##_pins), \ + } + +static struct bcm6368_pingroup bcm6368_groups[] = { + bcm6368_group(gpio0), + bcm6368_group(gpio1), + bcm6368_group(gpio2), + bcm6368_group(gpio3), + bcm6368_group(gpio4), + bcm6368_group(gpio5), + bcm6368_group(gpio6), + bcm6368_group(gpio7), + bcm6368_group(gpio8), + bcm6368_group(gpio9), + bcm6368_group(gpio10), + bcm6368_group(gpio11), + bcm6368_group(gpio12), + bcm6368_group(gpio13), + bcm6368_group(gpio14), + bcm6368_group(gpio15), + bcm6368_group(gpio16), + bcm6368_group(gpio17), + bcm6368_group(gpio18), + bcm6368_group(gpio19), + bcm6368_group(gpio20), + bcm6368_group(gpio21), + bcm6368_group(gpio22), + bcm6368_group(gpio23), + bcm6368_group(gpio24), + bcm6368_group(gpio25), + bcm6368_group(gpio26), + bcm6368_group(gpio27), + bcm6368_group(gpio28), + bcm6368_group(gpio29), + bcm6368_group(gpio30), + bcm6368_group(gpio31), + bcm6368_group(uart1_grp), +}; + +static const char * const analog_afe_0_groups[] = { + "gpio0", +}; + +static const char * const analog_afe_1_groups[] = { + "gpio1", +}; + +static const char * const sys_irq_groups[] = { + "gpio2", +}; + +static const char * const serial_led_data_groups[] = { + "gpio3", +}; + +static const char * const serial_led_clk_groups[] = { + "gpio4", +}; + +static const char * const inet_led_groups[] = { + "gpio5", +}; + +static const char * const ephy0_led_groups[] = { + "gpio6", +}; + +static const char * const ephy1_led_groups[] = { + "gpio7", +}; + +static const char * const ephy2_led_groups[] = { + "gpio8", +}; + +static const char * const ephy3_led_groups[] = { + "gpio9", +}; + +static const char * const robosw_led_data_groups[] = { + "gpio10", +}; + +static const char * const robosw_led_clk_groups[] = { + "gpio11", +}; + +static const char * const robosw_led0_groups[] = { + "gpio12", +}; + +static const char * const robosw_led1_groups[] = { + "gpio13", +}; + +static const char * const usb_device_led_groups[] = { + "gpio14", +}; + +static const char * const pci_req1_groups[] = { + "gpio16", +}; + +static const char * const pci_gnt1_groups[] = { + "gpio17", +}; + +static const char * const pci_intb_groups[] = { + "gpio18", +}; + +static const char * const pci_req0_groups[] = { + "gpio19", +}; + +static const char * const pci_gnt0_groups[] = { + "gpio20", +}; + +static const char * const pcmcia_cd1_groups[] = { + "gpio22", +}; + +static const char * const pcmcia_cd2_groups[] = { + "gpio23", +}; + +static const char * const pcmcia_vs1_groups[] = { + "gpio24", +}; + +static const char * const pcmcia_vs2_groups[] = { + "gpio25", +}; + +static const char * const ebi_cs2_groups[] = { + "gpio26", +}; + +static const char * const ebi_cs3_groups[] = { + "gpio27", +}; + +static const char * const spi_cs2_groups[] = { + "gpio28", +}; + +static const char * const spi_cs3_groups[] = { + "gpio29", +}; + +static const char * const spi_cs4_groups[] = { + "gpio30", +}; + +static const char * const spi_cs5_groups[] = { + "gpio31", +}; + +static const char * const uart1_groups[] = { + "uart1_grp", +}; + +#define bcm6368_fun(n, out) \ + { \ + .name = #n, \ + .groups = n##_groups, \ + .num_groups = array_size(n##_groups), \ + .dir_out = out, \ + } + +#define bcm6368_basemode_fun(n, val, out) \ + { \ + .name = #n, \ + .groups = n##_groups, \ + .num_groups = array_size(n##_groups), \ + .basemode = bcm6368_basemode_##val, \ + .dir_out = out, \ + } + +static const struct bcm6368_function bcm6368_funcs[] = { + bcm6368_fun(analog_afe_0, 1), + bcm6368_fun(analog_afe_1, 1), + bcm6368_fun(sys_irq, 1), + bcm6368_fun(serial_led_data, 1), + bcm6368_fun(serial_led_clk, 1), + bcm6368_fun(inet_led, 1), + bcm6368_fun(ephy0_led, 1), + bcm6368_fun(ephy1_led, 1), + bcm6368_fun(ephy2_led, 1), + bcm6368_fun(ephy3_led, 1), + bcm6368_fun(robosw_led_data, 1), + bcm6368_fun(robosw_led_clk, 1), + bcm6368_fun(robosw_led0, 1), + bcm6368_fun(robosw_led1, 1), + bcm6368_fun(usb_device_led, 1), + bcm6368_fun(pci_req1, 0), + bcm6368_fun(pci_gnt1, 0), + bcm6368_fun(pci_intb, 0), + bcm6368_fun(pci_req0, 0), + bcm6368_fun(pci_gnt0, 0), + bcm6368_fun(pcmcia_cd1, 0), + bcm6368_fun(pcmcia_cd2, 0), + bcm6368_fun(pcmcia_vs1, 0), + bcm6368_fun(pcmcia_vs2, 0), + bcm6368_fun(ebi_cs2, 1), + bcm6368_fun(ebi_cs3, 1), + bcm6368_fun(spi_cs2, 1), + bcm6368_fun(spi_cs3, 1), + bcm6368_fun(spi_cs4, 1), + bcm6368_fun(spi_cs5, 1), + bcm6368_basemode_fun(uart1, uart1, 0x6), +}; + +static int bcm6368_pinctrl_get_group_count(struct pinctrl_dev *pctldev) +{ + return array_size(bcm6368_groups); +} + +static const char *bcm6368_pinctrl_get_group_name(struct pinctrl_dev *pctldev, + unsigned group) +{ + return bcm6368_groups[group].name; +} + +static int bcm6368_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, + unsigned group, const unsigned **pins, + unsigned *num_pins) +{ + *pins = bcm6368_groups[group].pins; + *num_pins = bcm6368_groups[group].num_pins; + + return 0; +} + +static int bcm6368_pinctrl_get_func_count(struct pinctrl_dev *pctldev) +{ + return array_size(bcm6368_funcs); +} + +static const char *bcm6368_pinctrl_get_func_name(struct pinctrl_dev *pctldev, + unsigned selector) +{ + return bcm6368_funcs[selector].name; +} + +static int bcm6368_pinctrl_get_groups(struct pinctrl_dev *pctldev, + unsigned selector, + const char * const **groups, + unsigned * const num_groups) +{ + *groups = bcm6368_funcs[selector].groups; + *num_groups = bcm6368_funcs[selector].num_groups; + + return 0; +} + +static int bcm6368_pinctrl_set_mux(struct pinctrl_dev *pctldev, + unsigned selector, unsigned group) +{ + struct bcm63xx_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev); + struct bcm6368_priv *priv = pc->driver_data; + const struct bcm6368_pingroup *pg = &bcm6368_groups[group]; + const struct bcm6368_function *fun = &bcm6368_funcs[selector]; + int i, pin; + + if (fun->basemode) { + unsigned int mask = 0; + + for (i = 0; i < pg->num_pins; i++) { + pin = pg->pins[i]; + if (pin < bcm63xx_bank_gpios) + mask |= bit(pin); + } + + regmap_update_bits(pc->regs, bcm6368_mode_reg, mask, 0); + regmap_field_write(priv->overlays, fun->basemode); + } else { + pin = pg->pins[0]; + + if (bcm6368_pins[pin].drv_data) + regmap_field_write(priv->overlays, + bcm6368_basemode_gpio); + + regmap_update_bits(pc->regs, bcm6368_mode_reg, bit(pin), + bit(pin)); + } + + for (pin = 0; pin < pg->num_pins; pin++) { + struct pinctrl_gpio_range *range; + int hw_gpio = bcm6368_pins[pin].number; + + range = pinctrl_find_gpio_range_from_pin(pctldev, hw_gpio); + if (range) { + struct gpio_chip *gc = range->gc; + + if (fun->dir_out & bit(pin)) + gc->direction_output(gc, hw_gpio, 0); + else + gc->direction_input(gc, hw_gpio); + } + } + + return 0; +} + +static int bcm6368_gpio_request_enable(struct pinctrl_dev *pctldev, + struct pinctrl_gpio_range *range, + unsigned offset) +{ + struct bcm63xx_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev); + struct bcm6368_priv *priv = pc->driver_data; + + if (offset >= bcm63xx_bank_gpios && !bcm6368_pins[offset].drv_data) + return 0; + + /* disable all functions using this pin */ + if (offset < bcm63xx_bank_gpios) + regmap_update_bits(pc->regs, bcm6368_mode_reg, bit(offset), 0); + + if (bcm6368_pins[offset].drv_data) + regmap_field_write(priv->overlays, bcm6368_basemode_gpio); + + return 0; +} + +static struct pinctrl_ops bcm6368_pctl_ops = { + .dt_free_map = pinctrl_utils_free_map, + .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, + .get_group_name = bcm6368_pinctrl_get_group_name, + .get_group_pins = bcm6368_pinctrl_get_group_pins, + .get_groups_count = bcm6368_pinctrl_get_group_count, +}; + +static struct pinmux_ops bcm6368_pmx_ops = { + .get_function_groups = bcm6368_pinctrl_get_groups, + .get_function_name = bcm6368_pinctrl_get_func_name, + .get_functions_count = bcm6368_pinctrl_get_func_count, + .gpio_request_enable = bcm6368_gpio_request_enable, + .set_mux = bcm6368_pinctrl_set_mux, + .strict = true, +}; + +static const struct bcm63xx_pinctrl_soc bcm6368_soc = { + .ngpios = bcm6368_num_gpios, + .npins = array_size(bcm6368_pins), + .pctl_ops = &bcm6368_pctl_ops, + .pins = bcm6368_pins, + .pmx_ops = &bcm6368_pmx_ops, +}; + +static int bcm6368_pinctrl_probe(struct platform_device *pdev) +{ + struct reg_field overlays = reg_field(bcm6368_basemode_reg, 0, 15); + struct device *dev = &pdev->dev; + struct bcm63xx_pinctrl *pc; + struct bcm6368_priv *priv; + int err; + + priv = devm_kzalloc(dev, sizeof(*priv), gfp_kernel); + if (!priv) + return -enomem; + + err = bcm63xx_pinctrl_probe(pdev, &bcm6368_soc, (void *) priv); + if (err) + return err; + + pc = platform_get_drvdata(pdev); + + priv->overlays = devm_regmap_field_alloc(dev, pc->regs, overlays); + if (is_err(priv->overlays)) + return ptr_err(priv->overlays); + + return 0; +} + +static const struct of_device_id bcm6368_pinctrl_match[] = { + { .compatible = "brcm,bcm6368-pinctrl", }, + { /* sentinel */ } +}; + +static struct platform_driver bcm6368_pinctrl_driver = { + .probe = bcm6368_pinctrl_probe, + .driver = { + .name = "bcm6368-pinctrl", + .of_match_table = bcm6368_pinctrl_match, + }, +}; + +builtin_platform_driver(bcm6368_pinctrl_driver);
Pin Controllers (pinctrl)
50554accf7a79980cd04481e8903073bdb706daf
lvaro fern ndez rojas
drivers
pinctrl
bcm
pinctrl: add drive for i2c related pins on mt8195
this patch provides the advanced drive raw data setting version for i2c used pins on mt8195.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add drive for i2c related pins on mt8195
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['h', 'c']
3
41
0
--- diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8195.c b/drivers/pinctrl/mediatek/pinctrl-mt8195.c --- a/drivers/pinctrl/mediatek/pinctrl-mt8195.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt8195.c +static const struct mtk_pin_field_calc mt8195_pin_drv_adv_range[] = { + pin_field_base(8, 8, 4, 0x020, 0x10, 15, 3), + pin_field_base(9, 9, 4, 0x020, 0x10, 0, 3), + pin_field_base(10, 10, 4, 0x020, 0x10, 18, 3), + pin_field_base(11, 11, 4, 0x020, 0x10, 3, 3), + pin_field_base(12, 12, 4, 0x020, 0x10, 21, 3), + pin_field_base(13, 13, 4, 0x020, 0x10, 6, 3), + pin_field_base(14, 14, 4, 0x020, 0x10, 24, 3), + pin_field_base(15, 15, 4, 0x020, 0x10, 9, 3), + pin_field_base(16, 16, 4, 0x020, 0x10, 27, 3), + pin_field_base(17, 17, 4, 0x020, 0x10, 12, 3), + pin_field_base(29, 29, 2, 0x020, 0x10, 0, 3), + pin_field_base(30, 30, 2, 0x020, 0x10, 3, 3), + pin_field_base(34, 34, 1, 0x040, 0x10, 0, 3), + pin_field_base(35, 35, 1, 0x040, 0x10, 3, 3), + pin_field_base(44, 44, 1, 0x040, 0x10, 6, 3), + pin_field_base(45, 45, 1, 0x040, 0x10, 9, 3), +}; + + [pinctrl_pin_reg_drv_adv] = mtk_range(mt8195_pin_drv_adv_range), + .adv_drive_get = mtk_pinconf_adv_drive_get_raw, + .adv_drive_set = mtk_pinconf_adv_drive_set_raw, diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c +int mtk_pinconf_adv_drive_set_raw(struct mtk_pinctrl *hw, + const struct mtk_pin_desc *desc, u32 arg) +{ + return mtk_hw_set_value(hw, desc, pinctrl_pin_reg_drv_adv, arg); +} +export_symbol_gpl(mtk_pinconf_adv_drive_set_raw); + +int mtk_pinconf_adv_drive_get_raw(struct mtk_pinctrl *hw, + const struct mtk_pin_desc *desc, u32 *val) +{ + return mtk_hw_get_value(hw, desc, pinctrl_pin_reg_drv_adv, val); +} +export_symbol_gpl(mtk_pinconf_adv_drive_get_raw); + diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h + pinctrl_pin_reg_drv_adv, +int mtk_pinconf_adv_drive_set_raw(struct mtk_pinctrl *hw, + const struct mtk_pin_desc *desc, u32 arg); +int mtk_pinconf_adv_drive_get_raw(struct mtk_pinctrl *hw, + const struct mtk_pin_desc *desc, u32 *val);
Pin Controllers (pinctrl)
ea9d2ed46520a3fb0b865143cc824aea27deb8fa
zhiyong tao sean wang sean wang kernel org
drivers
pinctrl
mediatek
pinctrl: add pinctrl driver on mt8195
this commit includes pinctrl driver for mt8195.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add pinctrl driver on mt8195
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['h', 'kconfig', 'c', 'makefile']
4
2,504
0
--- diff --git a/drivers/pinctrl/mediatek/kconfig b/drivers/pinctrl/mediatek/kconfig --- a/drivers/pinctrl/mediatek/kconfig +++ b/drivers/pinctrl/mediatek/kconfig +config pinctrl_mt8195 + bool "mediatek mt8195 pin control" + depends on of + depends on arm64 || compile_test + select pinctrl_mtk_paris + diff --git a/drivers/pinctrl/mediatek/makefile b/drivers/pinctrl/mediatek/makefile --- a/drivers/pinctrl/mediatek/makefile +++ b/drivers/pinctrl/mediatek/makefile +obj-$(config_pinctrl_mt8195) += pinctrl-mt8195.o diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8195.c b/drivers/pinctrl/mediatek/pinctrl-mt8195.c --- /dev/null +++ b/drivers/pinctrl/mediatek/pinctrl-mt8195.c +// spdx-license-identifier: gpl-2.0 +/* + * copyright (c) 2020 mediatek inc. + * + * author: zhiyong tao <zhiyong.tao@mediatek.com> + * + */ + +#include "pinctrl-mtk-mt8195.h" +#include "pinctrl-paris.h" + +/* mt8195 have multiple bases to program pin configuration listed as the below: + * iocfg[0]:0x10005000, iocfg[1]:0x11d10000, iocfg[2]:0x11d30000, + * iocfg[3]:0x11d40000, iocfg[4]:0x11e20000, iocfg[5]:0x11eb0000, + * iocfg[6]:0x11f40000. + * _i_based could be used to indicate what base the pin should be mapped into. + */ + +#define pin_field_base(s_pin, e_pin, i_base, s_addr, x_addrs, s_bit, x_bits) \ + pin_field_calc(s_pin, e_pin, i_base, s_addr, x_addrs, s_bit, x_bits, \ + 32, 0) + +#define pins_field_base(s_pin, e_pin, i_base, s_addr, x_addrs, s_bit, x_bits) \ + pin_field_calc(s_pin, e_pin, i_base, s_addr, x_addrs, s_bit, x_bits, \ + 32, 1) + +static const struct mtk_pin_field_calc mt8195_pin_mode_range[] = { + pin_field(0, 144, 0x300, 0x10, 0, 4), +}; + +static const struct mtk_pin_field_calc mt8195_pin_dir_range[] = { + pin_field(0, 144, 0x0, 0x10, 0, 1), +}; + +static const struct mtk_pin_field_calc mt8195_pin_di_range[] = { + pin_field(0, 144, 0x200, 0x10, 0, 1), +}; + +static const struct mtk_pin_field_calc mt8195_pin_do_range[] = { + pin_field(0, 144, 0x100, 0x10, 0, 1), +}; + +static const struct mtk_pin_field_calc mt8195_pin_ies_range[] = { + pin_field_base(0, 0, 4, 0x040, 0x10, 0, 1), + pin_field_base(1, 1, 4, 0x040, 0x10, 1, 1), + pin_field_base(2, 2, 4, 0x040, 0x10, 2, 1), + pin_field_base(3, 3, 4, 0x040, 0x10, 3, 1), + pin_field_base(4, 4, 4, 0x040, 0x10, 4, 1), + pin_field_base(5, 5, 4, 0x040, 0x10, 5, 1), + pin_field_base(6, 6, 4, 0x040, 0x10, 6, 1), + pin_field_base(7, 7, 4, 0x040, 0x10, 7, 1), + pin_field_base(8, 8, 4, 0x040, 0x10, 13, 1), + pin_field_base(9, 9, 4, 0x040, 0x10, 8, 1), + pin_field_base(10, 10, 4, 0x040, 0x10, 14, 1), + pin_field_base(11, 11, 4, 0x040, 0x10, 9, 1), + pin_field_base(12, 12, 4, 0x040, 0x10, 15, 1), + pin_field_base(13, 13, 4, 0x040, 0x10, 10, 1), + pin_field_base(14, 14, 4, 0x040, 0x10, 16, 1), + pin_field_base(15, 15, 4, 0x040, 0x10, 11, 1), + pin_field_base(16, 16, 4, 0x040, 0x10, 17, 1), + pin_field_base(17, 17, 4, 0x040, 0x10, 12, 1), + pin_field_base(18, 18, 2, 0x040, 0x10, 5, 1), + pin_field_base(19, 19, 2, 0x040, 0x10, 12, 1), + pin_field_base(20, 20, 2, 0x040, 0x10, 11, 1), + pin_field_base(21, 21, 2, 0x040, 0x10, 10, 1), + pin_field_base(22, 22, 2, 0x040, 0x10, 0, 1), + pin_field_base(23, 23, 2, 0x040, 0x10, 1, 1), + pin_field_base(24, 24, 2, 0x040, 0x10, 2, 1), + pin_field_base(25, 25, 2, 0x040, 0x10, 4, 1), + pin_field_base(26, 26, 2, 0x040, 0x10, 3, 1), + pin_field_base(27, 27, 2, 0x040, 0x10, 6, 1), + pin_field_base(28, 28, 2, 0x040, 0x10, 7, 1), + pin_field_base(29, 29, 2, 0x040, 0x10, 8, 1), + pin_field_base(30, 30, 2, 0x040, 0x10, 9, 1), + pin_field_base(31, 31, 1, 0x060, 0x10, 13, 1), + pin_field_base(32, 32, 1, 0x060, 0x10, 12, 1), + pin_field_base(33, 33, 1, 0x060, 0x10, 11, 1), + pin_field_base(34, 34, 1, 0x060, 0x10, 14, 1), + pin_field_base(35, 35, 1, 0x060, 0x10, 15, 1), + pin_field_base(36, 36, 1, 0x070, 0x10, 3, 1), + pin_field_base(37, 37, 1, 0x070, 0x10, 6, 1), + pin_field_base(38, 38, 1, 0x070, 0x10, 4, 1), + pin_field_base(39, 39, 1, 0x070, 0x10, 5, 1), + pin_field_base(40, 40, 1, 0x070, 0x10, 8, 1), + pin_field_base(41, 41, 1, 0x070, 0x10, 7, 1), + pin_field_base(42, 42, 1, 0x070, 0x10, 10, 1), + pin_field_base(43, 43, 1, 0x070, 0x10, 9, 1), + pin_field_base(44, 44, 1, 0x070, 0x10, 20, 1), + pin_field_base(45, 45, 1, 0x070, 0x10, 21, 1), + pin_field_base(46, 46, 1, 0x060, 0x10, 18, 1), + pin_field_base(47, 47, 1, 0x060, 0x10, 16, 1), + pin_field_base(48, 48, 1, 0x060, 0x10, 19, 1), + pin_field_base(49, 49, 1, 0x060, 0x10, 17, 1), + pin_field_base(50, 50, 1, 0x060, 0x10, 25, 1), + pin_field_base(51, 51, 1, 0x060, 0x10, 20, 1), + pin_field_base(52, 52, 1, 0x060, 0x10, 26, 1), + pin_field_base(53, 53, 1, 0x060, 0x10, 21, 1), + pin_field_base(54, 54, 1, 0x060, 0x10, 22, 1), + pin_field_base(55, 55, 1, 0x060, 0x10, 23, 1), + pin_field_base(56, 56, 1, 0x060, 0x10, 24, 1), + pin_field_base(57, 57, 1, 0x060, 0x10, 29, 1), + pin_field_base(58, 58, 1, 0x060, 0x10, 27, 1), + pin_field_base(59, 59, 1, 0x060, 0x10, 30, 1), + pin_field_base(60, 60, 1, 0x060, 0x10, 28, 1), + pin_field_base(61, 61, 1, 0x060, 0x10, 8, 1), + pin_field_base(62, 62, 1, 0x060, 0x10, 7, 1), + pin_field_base(63, 63, 1, 0x060, 0x10, 10, 1), + pin_field_base(64, 64, 1, 0x060, 0x10, 9, 1), + pin_field_base(65, 65, 1, 0x070, 0x10, 1, 1), + pin_field_base(66, 66, 1, 0x060, 0x10, 31, 1), + pin_field_base(67, 67, 1, 0x070, 0x10, 0, 1), + pin_field_base(68, 68, 1, 0x070, 0x10, 2, 1), + pin_field_base(69, 69, 1, 0x060, 0x10, 0, 1), + pin_field_base(70, 70, 1, 0x060, 0x10, 6, 1), + pin_field_base(71, 71, 1, 0x060, 0x10, 4, 1), + pin_field_base(72, 72, 1, 0x060, 0x10, 5, 1), + pin_field_base(73, 73, 1, 0x060, 0x10, 1, 1), + pin_field_base(74, 74, 1, 0x060, 0x10, 2, 1), + pin_field_base(75, 75, 1, 0x060, 0x10, 3, 1), + pin_field_base(76, 76, 1, 0x070, 0x10, 11, 1), + pin_field_base(77, 77, 3, 0x030, 0x10, 1, 1), + pin_field_base(78, 78, 3, 0x030, 0x10, 2, 1), + pin_field_base(79, 79, 3, 0x030, 0x10, 9, 1), + pin_field_base(80, 80, 3, 0x030, 0x10, 10, 1), + pin_field_base(81, 81, 3, 0x030, 0x10, 11, 1), + pin_field_base(82, 82, 3, 0x030, 0x10, 12, 1), + pin_field_base(83, 83, 3, 0x030, 0x10, 13, 1), + pin_field_base(84, 84, 3, 0x030, 0x10, 14, 1), + pin_field_base(85, 85, 3, 0x030, 0x10, 15, 1), + pin_field_base(86, 86, 3, 0x030, 0x10, 16, 1), + pin_field_base(87, 87, 3, 0x030, 0x10, 3, 1), + pin_field_base(88, 88, 3, 0x030, 0x10, 4, 1), + pin_field_base(89, 89, 3, 0x030, 0x10, 5, 1), + pin_field_base(90, 90, 3, 0x030, 0x10, 6, 1), + pin_field_base(91, 91, 3, 0x030, 0x10, 7, 1), + pin_field_base(92, 92, 3, 0x030, 0x10, 8, 1), + pin_field_base(93, 93, 3, 0x030, 0x10, 18, 1), + pin_field_base(94, 94, 3, 0x030, 0x10, 19, 1), + pin_field_base(95, 95, 3, 0x030, 0x10, 17, 1), + pin_field_base(96, 96, 3, 0x030, 0x10, 0, 1), + pin_field_base(97, 97, 3, 0x030, 0x10, 20, 1), + pin_field_base(98, 98, 3, 0x030, 0x10, 28, 1), + pin_field_base(99, 99, 3, 0x030, 0x10, 27, 1), + pin_field_base(100, 100, 3, 0x030, 0x10, 30, 1), + pin_field_base(101, 101, 3, 0x030, 0x10, 29, 1), + pin_field_base(102, 102, 3, 0x040, 0x10, 0, 1), + pin_field_base(103, 103, 3, 0x030, 0x10, 31, 1), + pin_field_base(104, 104, 3, 0x030, 0x10, 25, 1), + pin_field_base(105, 105, 3, 0x030, 0x10, 26, 1), + pin_field_base(106, 106, 3, 0x030, 0x10, 23, 1), + pin_field_base(107, 107, 3, 0x030, 0x10, 24, 1), + pin_field_base(108, 108, 3, 0x030, 0x10, 22, 1), + pin_field_base(109, 109, 3, 0x030, 0x10, 21, 1), + pin_field_base(110, 110, 5, 0x010, 0x10, 1, 1), + pin_field_base(111, 111, 5, 0x010, 0x10, 0, 1), + pin_field_base(112, 112, 5, 0x010, 0x10, 2, 1), + pin_field_base(113, 113, 5, 0x010, 0x10, 3, 1), + pin_field_base(114, 114, 5, 0x010, 0x10, 4, 1), + pin_field_base(115, 115, 5, 0x010, 0x10, 5, 1), + pin_field_base(116, 116, 6, 0x030, 0x10, 9, 1), + pin_field_base(117, 117, 6, 0x030, 0x10, 8, 1), + pin_field_base(118, 118, 6, 0x030, 0x10, 7, 1), + pin_field_base(119, 119, 6, 0x030, 0x10, 6, 1), + pin_field_base(120, 120, 6, 0x030, 0x10, 11, 1), + pin_field_base(121, 121, 6, 0x030, 0x10, 1, 1), + pin_field_base(122, 122, 6, 0x030, 0x10, 0, 1), + pin_field_base(123, 123, 6, 0x030, 0x10, 5, 1), + pin_field_base(124, 124, 6, 0x030, 0x10, 4, 1), + pin_field_base(125, 125, 6, 0x030, 0x10, 3, 1), + pin_field_base(126, 126, 6, 0x030, 0x10, 2, 1), + pin_field_base(127, 127, 6, 0x030, 0x10, 10, 1), + pin_field_base(128, 128, 3, 0x040, 0x10, 3, 1), + pin_field_base(129, 129, 3, 0x040, 0x10, 1, 1), + pin_field_base(130, 130, 3, 0x040, 0x10, 4, 1), + pin_field_base(131, 131, 3, 0x040, 0x10, 2, 1), + pin_field_base(132, 132, 6, 0x030, 0x10, 13, 1), + pin_field_base(133, 133, 6, 0x030, 0x10, 12, 1), + pin_field_base(134, 134, 6, 0x030, 0x10, 15, 1), + pin_field_base(135, 135, 6, 0x030, 0x10, 14, 1), + pin_field_base(136, 136, 1, 0x070, 0x10, 13, 1), + pin_field_base(137, 137, 1, 0x070, 0x10, 12, 1), + pin_field_base(138, 138, 1, 0x070, 0x10, 15, 1), + pin_field_base(139, 139, 1, 0x070, 0x10, 14, 1), + pin_field_base(140, 140, 1, 0x070, 0x10, 17, 1), + pin_field_base(141, 141, 1, 0x070, 0x10, 16, 1), + pin_field_base(142, 142, 1, 0x070, 0x10, 19, 1), + pin_field_base(143, 143, 1, 0x070, 0x10, 18, 1), +}; + +static const struct mtk_pin_field_calc mt8195_pin_smt_range[] = { + pin_field_base(0, 0, 4, 0x0d0, 0x10, 0, 1), + pin_field_base(1, 1, 4, 0x0d0, 0x10, 1, 1), + pin_field_base(2, 2, 4, 0x0d0, 0x10, 2, 1), + pin_field_base(3, 3, 4, 0x0d0, 0x10, 3, 1), + pin_field_base(4, 4, 4, 0x0d0, 0x10, 4, 1), + pin_field_base(5, 5, 4, 0x0d0, 0x10, 5, 1), + pins_field_base(6, 7, 4, 0x0d0, 0x10, 6, 1), + pin_field_base(8, 8, 4, 0x0d0, 0x10, 12, 1), + pin_field_base(9, 9, 4, 0x0d0, 0x10, 7, 1), + pin_field_base(10, 10, 4, 0x0d0, 0x10, 13, 1), + pin_field_base(11, 11, 4, 0x0d0, 0x10, 8, 1), + pin_field_base(12, 12, 4, 0x0d0, 0x10, 14, 1), + pin_field_base(13, 13, 4, 0x0d0, 0x10, 9, 1), + pin_field_base(14, 14, 4, 0x0d0, 0x10, 15, 1), + pin_field_base(15, 15, 4, 0x0d0, 0x10, 10, 1), + pin_field_base(16, 16, 4, 0x0d0, 0x10, 16, 1), + pin_field_base(17, 17, 4, 0x0d0, 0x10, 11, 1), + pin_field_base(18, 18, 2, 0x090, 0x10, 11, 1), + pin_field_base(19, 19, 2, 0x090, 0x10, 10, 1), + pin_field_base(20, 20, 2, 0x090, 0x10, 9, 1), + pin_field_base(21, 21, 2, 0x090, 0x10, 11, 1), + pin_field_base(22, 22, 2, 0x090, 0x10, 0, 1), + pin_field_base(23, 23, 2, 0x090, 0x10, 1, 1), + pin_field_base(24, 24, 2, 0x090, 0x10, 2, 1), + pin_field_base(25, 25, 2, 0x090, 0x10, 4, 1), + pin_field_base(26, 26, 2, 0x090, 0x10, 3, 1), + pin_field_base(27, 27, 2, 0x090, 0x10, 5, 1), + pin_field_base(28, 28, 2, 0x090, 0x10, 6, 1), + pin_field_base(29, 29, 2, 0x090, 0x10, 7, 1), + pin_field_base(30, 30, 2, 0x090, 0x10, 8, 1), + pins_field_base(31, 33, 1, 0x0f0, 0x10, 4, 1), + pin_field_base(34, 34, 1, 0x0f0, 0x10, 0, 1), + pin_field_base(35, 35, 1, 0x0f0, 0x10, 1, 1), + pin_field_base(36, 36, 1, 0x0f0, 0x10, 4, 1), + pin_field_base(37, 37, 1, 0x0f0, 0x10, 2, 1), + pins_field_base(38, 39, 1, 0x0f0, 0x10, 5, 1), + pin_field_base(40, 40, 1, 0x0f0, 0x10, 14, 1), + pin_field_base(41, 41, 1, 0x0f0, 0x10, 13, 1), + pin_field_base(42, 42, 1, 0x0f0, 0x10, 16, 1), + pin_field_base(43, 43, 1, 0x0f0, 0x10, 15, 1), + pin_field_base(44, 44, 1, 0x0f0, 0x10, 25, 1), + pin_field_base(45, 45, 1, 0x0f0, 0x10, 26, 1), + pins_field_base(46, 47, 1, 0x0f0, 0x10, 5, 1), + pins_field_base(48, 51, 1, 0x0f0, 0x10, 6, 1), + pins_field_base(52, 55, 1, 0x0f0, 0x10, 7, 1), + pins_field_base(56, 59, 1, 0x0f0, 0x10, 8, 1), + pins_field_base(60, 63, 1, 0x0f0, 0x10, 9, 1), + pin_field_base(64, 64, 1, 0x0f0, 0x10, 10, 1), + pins_field_base(65, 68, 1, 0x0f0, 0x10, 3, 1), + pins_field_base(69, 71, 1, 0x0f0, 0x10, 10, 1), + pins_field_base(72, 75, 1, 0x0f0, 0x10, 11, 1), + pin_field_base(76, 76, 1, 0x0f0, 0x10, 12, 1), + pin_field_base(77, 77, 3, 0x0e0, 0x10, 0, 1), + pin_field_base(78, 78, 3, 0x0e0, 0x10, 1, 1), + pin_field_base(79, 79, 3, 0x0e0, 0x10, 6, 1), + pin_field_base(80, 80, 3, 0x0e0, 0x10, 7, 1), + pin_field_base(81, 81, 3, 0x0e0, 0x10, 8, 1), + pin_field_base(82, 82, 3, 0x0e0, 0x10, 9, 1), + pin_field_base(83, 83, 3, 0x0e0, 0x10, 10, 1), + pin_field_base(84, 84, 3, 0x0e0, 0x10, 11, 1), + pins_field_base(85, 88, 3, 0x0e0, 0x10, 14, 1), + pin_field_base(89, 89, 3, 0x0e0, 0x10, 2, 1), + pin_field_base(90, 90, 3, 0x0e0, 0x10, 3, 1), + pin_field_base(91, 91, 3, 0x0e0, 0x10, 4, 1), + pin_field_base(92, 92, 3, 0x0e0, 0x10, 5, 1), + pin_field_base(93, 93, 3, 0x0e0, 0x10, 12, 1), + pin_field_base(94, 94, 3, 0x0e0, 0x10, 13, 1), + pins_field_base(95, 98, 3, 0x0e0, 0x10, 15, 1), + pins_field_base(99, 102, 3, 0x0e0, 0x10, 16, 1), + pins_field_base(103, 104, 3, 0x0e0, 0x10, 17, 1), + pin_field_base(105, 105, 3, 0x0e0, 0x10, 18, 1), + pins_field_base(106, 107, 3, 0x0e0, 0x10, 17, 1), + pins_field_base(108, 109, 3, 0x0e0, 0x10, 18, 1), + pin_field_base(110, 110, 5, 0x070, 0x10, 1, 1), + pin_field_base(111, 111, 5, 0x070, 0x10, 0, 1), + pin_field_base(112, 112, 5, 0x070, 0x10, 2, 1), + pin_field_base(113, 113, 5, 0x070, 0x10, 3, 1), + pin_field_base(114, 114, 5, 0x070, 0x10, 4, 1), + pin_field_base(115, 115, 5, 0x070, 0x10, 5, 1), + pin_field_base(116, 116, 6, 0x0c0, 0x10, 9, 1), + pin_field_base(117, 117, 6, 0x0c0, 0x10, 8, 1), + pin_field_base(118, 118, 6, 0x0c0, 0x10, 7, 1), + pin_field_base(119, 119, 6, 0x0c0, 0x10, 6, 1), + pin_field_base(120, 120, 6, 0x0c0, 0x10, 11, 1), + pin_field_base(121, 121, 6, 0x0c0, 0x10, 1, 1), + pin_field_base(122, 122, 6, 0x0c0, 0x10, 0, 1), + pin_field_base(123, 123, 6, 0x0c0, 0x10, 5, 1), + pin_field_base(124, 124, 6, 0x0c0, 0x10, 4, 1), + pin_field_base(125, 125, 6, 0x0c0, 0x10, 3, 1), + pin_field_base(126, 126, 6, 0x0c0, 0x10, 2, 1), + pin_field_base(127, 127, 6, 0x0c0, 0x10, 10, 1), + pin_field_base(128, 128, 3, 0x0e0, 0x10, 18, 1), + pins_field_base(129, 131, 3, 0x0e0, 0x10, 19, 1), + pin_field_base(132, 132, 6, 0x0c0, 0x10, 13, 1), + pin_field_base(133, 133, 6, 0x0c0, 0x10, 12, 1), + pin_field_base(134, 134, 6, 0x0c0, 0x10, 15, 1), + pin_field_base(135, 135, 6, 0x0c0, 0x10, 14, 1), + pin_field_base(136, 136, 1, 0x0f0, 0x10, 18, 1), + pin_field_base(137, 137, 1, 0x0f0, 0x10, 17, 1), + pin_field_base(138, 138, 1, 0x0f0, 0x10, 20, 1), + pin_field_base(139, 139, 1, 0x0f0, 0x10, 19, 1), + pin_field_base(140, 140, 1, 0x0f0, 0x10, 22, 1), + pin_field_base(141, 141, 1, 0x0f0, 0x10, 21, 1), + pin_field_base(142, 142, 1, 0x0f0, 0x10, 24, 1), + pin_field_base(143, 143, 1, 0x0f0, 0x10, 23, 1), +}; + +static const struct mtk_pin_field_calc mt8195_pin_pu_range[] = { + pin_field_base(6, 6, 4, 0x0070, 0x10, 0, 1), + pin_field_base(7, 7, 4, 0x0070, 0x10, 1, 1), + pin_field_base(8, 8, 4, 0x0070, 0x10, 7, 1), + pin_field_base(9, 9, 4, 0x0070, 0x10, 2, 1), + pin_field_base(10, 10, 4, 0x0070, 0x10, 8, 1), + pin_field_base(11, 11, 4, 0x0070, 0x10, 3, 1), + pin_field_base(12, 12, 4, 0x0070, 0x10, 9, 1), + pin_field_base(13, 13, 4, 0x0070, 0x10, 4, 1), + pin_field_base(14, 14, 4, 0x0070, 0x10, 10, 1), + pin_field_base(15, 15, 4, 0x0070, 0x10, 5, 1), + pin_field_base(16, 16, 4, 0x0070, 0x10, 11, 1), + pin_field_base(17, 17, 4, 0x0070, 0x10, 6, 1), + pin_field_base(18, 18, 2, 0x0060, 0x10, 5, 1), + pin_field_base(19, 19, 2, 0x0060, 0x10, 12, 1), + pin_field_base(20, 20, 2, 0x0060, 0x10, 11, 1), + pin_field_base(21, 21, 2, 0x0060, 0x10, 10, 1), + pin_field_base(22, 22, 2, 0x0060, 0x10, 0, 1), + pin_field_base(23, 23, 2, 0x0060, 0x10, 1, 1), + pin_field_base(24, 24, 2, 0x0060, 0x10, 2, 1), + pin_field_base(25, 25, 2, 0x0060, 0x10, 4, 1), + pin_field_base(26, 26, 2, 0x0060, 0x10, 3, 1), + pin_field_base(27, 27, 2, 0x0060, 0x10, 6, 1), + pin_field_base(28, 28, 2, 0x0060, 0x10, 7, 1), + pin_field_base(29, 29, 2, 0x0060, 0x10, 8, 1), + pin_field_base(30, 30, 2, 0x0060, 0x10, 9, 1), + pin_field_base(31, 31, 1, 0x00a0, 0x10, 13, 1), + pin_field_base(32, 32, 1, 0x00a0, 0x10, 12, 1), + pin_field_base(33, 33, 1, 0x00a0, 0x10, 11, 1), + pin_field_base(34, 34, 1, 0x00a0, 0x10, 14, 1), + pin_field_base(35, 35, 1, 0x00a0, 0x10, 15, 1), + pin_field_base(36, 36, 1, 0x00b0, 0x10, 3, 1), + pin_field_base(37, 37, 1, 0x00b0, 0x10, 6, 1), + pin_field_base(38, 38, 1, 0x00b0, 0x10, 4, 1), + pin_field_base(39, 39, 1, 0x00b0, 0x10, 5, 1), + pin_field_base(40, 40, 1, 0x00b0, 0x10, 8, 1), + pin_field_base(41, 41, 1, 0x00b0, 0x10, 7, 1), + pin_field_base(42, 42, 1, 0x00b0, 0x10, 10, 1), + pin_field_base(43, 43, 1, 0x00b0, 0x10, 9, 1), + pin_field_base(44, 44, 1, 0x00b0, 0x10, 21, 1), + pin_field_base(45, 45, 1, 0x00b0, 0x10, 22, 1), + pin_field_base(46, 46, 1, 0x00a0, 0x10, 18, 1), + pin_field_base(47, 47, 1, 0x00a0, 0x10, 16, 1), + pin_field_base(48, 48, 1, 0x00a0, 0x10, 19, 1), + pin_field_base(49, 49, 1, 0x00a0, 0x10, 17, 1), + pin_field_base(50, 50, 1, 0x00a0, 0x10, 25, 1), + pin_field_base(51, 51, 1, 0x00a0, 0x10, 20, 1), + pin_field_base(52, 52, 1, 0x00a0, 0x10, 26, 1), + pin_field_base(53, 53, 1, 0x00a0, 0x10, 21, 1), + pin_field_base(54, 54, 1, 0x00a0, 0x10, 22, 1), + pin_field_base(55, 55, 1, 0x00a0, 0x10, 23, 1), + pin_field_base(56, 56, 1, 0x00a0, 0x10, 24, 1), + pin_field_base(57, 57, 1, 0x00a0, 0x10, 29, 1), + pin_field_base(58, 58, 1, 0x00a0, 0x10, 27, 1), + pin_field_base(59, 59, 1, 0x00a0, 0x10, 30, 1), + pin_field_base(60, 60, 1, 0x00a0, 0x10, 28, 1), + pin_field_base(61, 61, 1, 0x00a0, 0x10, 8, 1), + pin_field_base(62, 62, 1, 0x00a0, 0x10, 7, 1), + pin_field_base(63, 63, 1, 0x00a0, 0x10, 10, 1), + pin_field_base(64, 64, 1, 0x00a0, 0x10, 9, 1), + pin_field_base(65, 65, 1, 0x00b0, 0x10, 1, 1), + pin_field_base(66, 66, 1, 0x00a0, 0x10, 31, 1), + pin_field_base(67, 67, 1, 0x00b0, 0x10, 0, 1), + pin_field_base(68, 68, 1, 0x00b0, 0x10, 2, 1), + pin_field_base(69, 69, 1, 0x00a0, 0x10, 0, 1), + pin_field_base(70, 70, 1, 0x00a0, 0x10, 6, 1), + pin_field_base(71, 71, 1, 0x00a0, 0x10, 4, 1), + pin_field_base(72, 72, 1, 0x00a0, 0x10, 5, 1), + pin_field_base(73, 73, 1, 0x00a0, 0x10, 1, 1), + pin_field_base(74, 74, 1, 0x00a0, 0x10, 2, 1), + pin_field_base(75, 75, 1, 0x00a0, 0x10, 3, 1), + pin_field_base(76, 76, 1, 0x00b0, 0x10, 11, 1), + pin_field_base(97, 97, 3, 0x0070, 0x10, 0, 1), + pin_field_base(98, 98, 3, 0x0070, 0x10, 4, 1), + pin_field_base(99, 99, 3, 0x0070, 0x10, 3, 1), + pin_field_base(100, 100, 3, 0x0070, 0x10, 6, 1), + pin_field_base(101, 101, 3, 0x0070, 0x10, 5, 1), + pin_field_base(102, 102, 3, 0x0070, 0x10, 8, 1), + pin_field_base(103, 103, 3, 0x0070, 0x10, 7, 1), + pin_field_base(108, 108, 3, 0x0070, 0x10, 2, 1), + pin_field_base(109, 109, 3, 0x0070, 0x10, 1, 1), + pin_field_base(128, 128, 3, 0x0070, 0x10, 11, 1), + pin_field_base(129, 129, 3, 0x0070, 0x10, 9, 1), + pin_field_base(130, 130, 3, 0x0070, 0x10, 12, 1), + pin_field_base(131, 131, 3, 0x0070, 0x10, 10, 1), + pin_field_base(132, 132, 6, 0x0060, 0x10, 1, 1), + pin_field_base(133, 133, 6, 0x0060, 0x10, 0, 1), + pin_field_base(134, 134, 6, 0x0060, 0x10, 3, 1), + pin_field_base(135, 135, 6, 0x0060, 0x10, 2, 1), + pin_field_base(136, 136, 1, 0x00b0, 0x10, 14, 1), + pin_field_base(137, 137, 1, 0x00b0, 0x10, 13, 1), + pin_field_base(138, 138, 1, 0x00b0, 0x10, 16, 1), + pin_field_base(139, 139, 1, 0x00b0, 0x10, 15, 1), + pin_field_base(140, 140, 1, 0x00b0, 0x10, 18, 1), + pin_field_base(141, 141, 1, 0x00b0, 0x10, 17, 1), + pin_field_base(142, 142, 1, 0x00b0, 0x10, 20, 1), + pin_field_base(143, 143, 1, 0x00b0, 0x10, 19, 1), +}; + +static const struct mtk_pin_field_calc mt8195_pin_pd_range[] = { + pin_field_base(6, 6, 4, 0x0050, 0x10, 0, 1), + pin_field_base(7, 7, 4, 0x0050, 0x10, 1, 1), + pin_field_base(8, 8, 4, 0x0050, 0x10, 7, 1), + pin_field_base(9, 9, 4, 0x0050, 0x10, 2, 1), + pin_field_base(10, 10, 4, 0x0050, 0x10, 8, 1), + pin_field_base(11, 11, 4, 0x0050, 0x10, 3, 1), + pin_field_base(12, 12, 4, 0x0050, 0x10, 9, 1), + pin_field_base(13, 13, 4, 0x0050, 0x10, 4, 1), + pin_field_base(14, 14, 4, 0x0050, 0x10, 10, 1), + pin_field_base(15, 15, 4, 0x0050, 0x10, 5, 1), + pin_field_base(16, 16, 4, 0x0050, 0x10, 11, 1), + pin_field_base(17, 17, 4, 0x0050, 0x10, 6, 1), + pin_field_base(18, 18, 2, 0x0050, 0x10, 5, 1), + pin_field_base(19, 19, 2, 0x0050, 0x10, 12, 1), + pin_field_base(20, 20, 2, 0x0050, 0x10, 11, 1), + pin_field_base(21, 21, 2, 0x0050, 0x10, 10, 1), + pin_field_base(22, 22, 2, 0x0050, 0x10, 0, 1), + pin_field_base(23, 23, 2, 0x0050, 0x10, 1, 1), + pin_field_base(24, 24, 2, 0x0050, 0x10, 2, 1), + pin_field_base(25, 25, 2, 0x0050, 0x10, 4, 1), + pin_field_base(26, 26, 2, 0x0050, 0x10, 3, 1), + pin_field_base(27, 27, 2, 0x0050, 0x10, 6, 1), + pin_field_base(28, 28, 2, 0x0050, 0x10, 7, 1), + pin_field_base(29, 29, 2, 0x0050, 0x10, 8, 1), + pin_field_base(30, 30, 2, 0x0050, 0x10, 9, 1), + pin_field_base(31, 31, 1, 0x0080, 0x10, 13, 1), + pin_field_base(32, 32, 1, 0x0080, 0x10, 12, 1), + pin_field_base(33, 33, 1, 0x0080, 0x10, 11, 1), + pin_field_base(34, 34, 1, 0x0080, 0x10, 14, 1), + pin_field_base(35, 35, 1, 0x0080, 0x10, 15, 1), + pin_field_base(36, 36, 1, 0x0090, 0x10, 3, 1), + pin_field_base(37, 37, 1, 0x0090, 0x10, 6, 1), + pin_field_base(38, 38, 1, 0x0090, 0x10, 4, 1), + pin_field_base(39, 39, 1, 0x0090, 0x10, 5, 1), + pin_field_base(40, 40, 1, 0x0090, 0x10, 8, 1), + pin_field_base(41, 41, 1, 0x0090, 0x10, 7, 1), + pin_field_base(42, 42, 1, 0x0090, 0x10, 10, 1), + pin_field_base(43, 43, 1, 0x0090, 0x10, 9, 1), + pin_field_base(44, 44, 1, 0x0090, 0x10, 21, 1), + pin_field_base(45, 45, 1, 0x0090, 0x10, 22, 1), + pin_field_base(46, 46, 1, 0x0080, 0x10, 18, 1), + pin_field_base(47, 47, 1, 0x0080, 0x10, 16, 1), + pin_field_base(48, 48, 1, 0x0080, 0x10, 19, 1), + pin_field_base(49, 49, 1, 0x0080, 0x10, 17, 1), + pin_field_base(50, 50, 1, 0x0080, 0x10, 25, 1), + pin_field_base(51, 51, 1, 0x0080, 0x10, 20, 1), + pin_field_base(52, 52, 1, 0x0080, 0x10, 26, 1), + pin_field_base(53, 53, 1, 0x0080, 0x10, 21, 1), + pin_field_base(54, 54, 1, 0x0080, 0x10, 22, 1), + pin_field_base(55, 55, 1, 0x0080, 0x10, 23, 1), + pin_field_base(56, 56, 1, 0x0080, 0x10, 24, 1), + pin_field_base(57, 57, 1, 0x0080, 0x10, 29, 1), + pin_field_base(58, 58, 1, 0x0080, 0x10, 27, 1), + pin_field_base(59, 59, 1, 0x0080, 0x10, 30, 1), + pin_field_base(60, 60, 1, 0x0080, 0x10, 28, 1), + pin_field_base(61, 61, 1, 0x0080, 0x10, 8, 1), + pin_field_base(62, 62, 1, 0x0080, 0x10, 7, 1), + pin_field_base(63, 63, 1, 0x0080, 0x10, 10, 1), + pin_field_base(64, 64, 1, 0x0080, 0x10, 9, 1), + pin_field_base(65, 65, 1, 0x0090, 0x10, 1, 1), + pin_field_base(66, 66, 1, 0x0080, 0x10, 31, 1), + pin_field_base(67, 67, 1, 0x0090, 0x10, 0, 1), + pin_field_base(68, 68, 1, 0x0090, 0x10, 2, 1), + pin_field_base(69, 69, 1, 0x0080, 0x10, 0, 1), + pin_field_base(70, 70, 1, 0x0080, 0x10, 6, 1), + pin_field_base(71, 71, 1, 0x0080, 0x10, 4, 1), + pin_field_base(72, 72, 1, 0x0080, 0x10, 5, 1), + pin_field_base(73, 73, 1, 0x0080, 0x10, 1, 1), + pin_field_base(74, 74, 1, 0x0080, 0x10, 2, 1), + pin_field_base(75, 75, 1, 0x0080, 0x10, 3, 1), + pin_field_base(76, 76, 1, 0x0090, 0x10, 11, 1), + pin_field_base(97, 97, 3, 0x0050, 0x10, 0, 1), + pin_field_base(98, 98, 3, 0x0050, 0x10, 4, 1), + pin_field_base(99, 99, 3, 0x0050, 0x10, 3, 1), + pin_field_base(100, 100, 3, 0x0050, 0x10, 6, 1), + pin_field_base(101, 101, 3, 0x0050, 0x10, 5, 1), + pin_field_base(102, 102, 3, 0x0050, 0x10, 8, 1), + pin_field_base(103, 103, 3, 0x0050, 0x10, 7, 1), + pin_field_base(108, 108, 3, 0x0050, 0x10, 2, 1), + pin_field_base(109, 109, 3, 0x0050, 0x10, 1, 1), + pin_field_base(128, 128, 3, 0x0050, 0x10, 11, 1), + pin_field_base(129, 129, 3, 0x0050, 0x10, 9, 1), + pin_field_base(130, 130, 3, 0x0050, 0x10, 12, 1), + pin_field_base(131, 131, 3, 0x0050, 0x10, 10, 1), + pin_field_base(132, 132, 6, 0x0040, 0x10, 1, 1), + pin_field_base(133, 133, 6, 0x0040, 0x10, 0, 1), + pin_field_base(134, 134, 6, 0x0040, 0x10, 3, 1), + pin_field_base(135, 135, 6, 0x0040, 0x10, 2, 1), + pin_field_base(136, 136, 1, 0x0090, 0x10, 14, 1), + pin_field_base(137, 137, 1, 0x0090, 0x10, 13, 1), + pin_field_base(138, 138, 1, 0x0090, 0x10, 16, 1), + pin_field_base(139, 139, 1, 0x0090, 0x10, 15, 1), + pin_field_base(140, 140, 1, 0x0090, 0x10, 18, 1), + pin_field_base(141, 141, 1, 0x0090, 0x10, 17, 1), + pin_field_base(142, 142, 1, 0x0090, 0x10, 20, 1), + pin_field_base(143, 143, 1, 0x0090, 0x10, 19, 1), +}; + +static const struct mtk_pin_field_calc mt8195_pin_pupd_range[] = { + pin_field_base(0, 0, 4, 0x0060, 0x10, 0, 1), + pin_field_base(1, 1, 4, 0x0060, 0x10, 1, 1), + pin_field_base(2, 2, 4, 0x0060, 0x10, 2, 1), + pin_field_base(3, 3, 4, 0x0060, 0x10, 3, 1), + pin_field_base(4, 4, 4, 0x0060, 0x10, 4, 1), + pin_field_base(5, 5, 4, 0x0060, 0x10, 5, 1), + pin_field_base(77, 77, 3, 0x0060, 0x10, 1, 1), + pin_field_base(78, 78, 3, 0x0060, 0x10, 2, 1), + pin_field_base(79, 79, 3, 0x0060, 0x10, 9, 1), + pin_field_base(80, 80, 3, 0x0060, 0x10, 10, 1), + pin_field_base(81, 81, 3, 0x0060, 0x10, 11, 1), + pin_field_base(82, 82, 3, 0x0060, 0x10, 12, 1), + pin_field_base(83, 83, 3, 0x0060, 0x10, 13, 1), + pin_field_base(84, 84, 3, 0x0060, 0x10, 14, 1), + pin_field_base(85, 85, 3, 0x0060, 0x10, 15, 1), + pin_field_base(86, 86, 3, 0x0060, 0x10, 16, 1), + pin_field_base(87, 87, 3, 0x0060, 0x10, 3, 1), + pin_field_base(88, 88, 3, 0x0060, 0x10, 4, 1), + pin_field_base(89, 89, 3, 0x0060, 0x10, 5, 1), + pin_field_base(90, 90, 3, 0x0060, 0x10, 6, 1), + pin_field_base(91, 91, 3, 0x0060, 0x10, 7, 1), + pin_field_base(92, 92, 3, 0x0060, 0x10, 8, 1), + pin_field_base(93, 93, 3, 0x0060, 0x10, 18, 1), + pin_field_base(94, 94, 3, 0x0060, 0x10, 19, 1), + pin_field_base(95, 95, 3, 0x0060, 0x10, 17, 1), + pin_field_base(96, 96, 3, 0x0060, 0x10, 0, 1), + pin_field_base(104, 104, 3, 0x0060, 0x10, 22, 1), + pin_field_base(105, 105, 3, 0x0060, 0x10, 23, 1), + pin_field_base(106, 106, 3, 0x0060, 0x10, 20, 1), + pin_field_base(107, 107, 3, 0x0060, 0x10, 21, 1), + pin_field_base(110, 110, 5, 0x0020, 0x10, 1, 1), + pin_field_base(111, 111, 5, 0x0020, 0x10, 0, 1), + pin_field_base(112, 112, 5, 0x0020, 0x10, 2, 1), + pin_field_base(113, 113, 5, 0x0020, 0x10, 3, 1), + pin_field_base(114, 114, 5, 0x0020, 0x10, 4, 1), + pin_field_base(115, 115, 5, 0x0020, 0x10, 5, 1), + pin_field_base(116, 116, 6, 0x0050, 0x10, 9, 1), + pin_field_base(117, 117, 6, 0x0050, 0x10, 8, 1), + pin_field_base(118, 118, 6, 0x0050, 0x10, 7, 1), + pin_field_base(119, 119, 6, 0x0050, 0x10, 6, 1), + pin_field_base(120, 120, 6, 0x0050, 0x10, 11, 1), + pin_field_base(121, 121, 6, 0x0050, 0x10, 1, 1), + pin_field_base(122, 122, 6, 0x0050, 0x10, 0, 1), + pin_field_base(123, 123, 6, 0x0050, 0x10, 5, 1), + pin_field_base(124, 124, 6, 0x0050, 0x10, 4, 1), + pin_field_base(125, 125, 6, 0x0050, 0x10, 3, 1), + pin_field_base(126, 126, 6, 0x0050, 0x10, 2, 1), + pin_field_base(127, 127, 6, 0x0050, 0x10, 10, 1), +}; + +static const struct mtk_pin_field_calc mt8195_pin_r0_range[] = { + pin_field_base(0, 0, 4, 0x0080, 0x10, 0, 1), + pin_field_base(1, 1, 4, 0x0080, 0x10, 1, 1), + pin_field_base(2, 2, 4, 0x0080, 0x10, 2, 1), + pin_field_base(3, 3, 4, 0x0080, 0x10, 3, 1), + pin_field_base(4, 4, 4, 0x0080, 0x10, 4, 1), + pin_field_base(5, 5, 4, 0x0080, 0x10, 5, 1), + pin_field_base(77, 77, 3, 0x0080, 0x10, 1, 1), + pin_field_base(78, 78, 3, 0x0080, 0x10, 2, 1), + pin_field_base(79, 79, 3, 0x0080, 0x10, 9, 1), + pin_field_base(80, 80, 3, 0x0080, 0x10, 10, 1), + pin_field_base(81, 81, 3, 0x0080, 0x10, 11, 1), + pin_field_base(82, 82, 3, 0x0080, 0x10, 12, 1), + pin_field_base(83, 83, 3, 0x0080, 0x10, 13, 1), + pin_field_base(84, 84, 3, 0x0080, 0x10, 14, 1), + pin_field_base(85, 85, 3, 0x0080, 0x10, 15, 1), + pin_field_base(86, 86, 3, 0x0080, 0x10, 16, 1), + pin_field_base(87, 87, 3, 0x0080, 0x10, 3, 1), + pin_field_base(88, 88, 3, 0x0080, 0x10, 4, 1), + pin_field_base(89, 89, 3, 0x0080, 0x10, 5, 1), + pin_field_base(90, 90, 3, 0x0080, 0x10, 6, 1), + pin_field_base(91, 91, 3, 0x0080, 0x10, 7, 1), + pin_field_base(92, 92, 3, 0x0080, 0x10, 8, 1), + pin_field_base(93, 93, 3, 0x0080, 0x10, 18, 1), + pin_field_base(94, 94, 3, 0x0080, 0x10, 19, 1), + pin_field_base(95, 95, 3, 0x0080, 0x10, 17, 1), + pin_field_base(96, 96, 3, 0x0080, 0x10, 0, 1), + pin_field_base(104, 104, 3, 0x0080, 0x10, 22, 1), + pin_field_base(105, 105, 3, 0x0080, 0x10, 23, 1), + pin_field_base(106, 106, 3, 0x0080, 0x10, 20, 1), + pin_field_base(107, 107, 3, 0x0080, 0x10, 21, 1), + pin_field_base(110, 110, 5, 0x0030, 0x10, 1, 1), + pin_field_base(111, 111, 5, 0x0030, 0x10, 0, 1), + pin_field_base(112, 112, 5, 0x0030, 0x10, 2, 1), + pin_field_base(113, 113, 5, 0x0030, 0x10, 3, 1), + pin_field_base(114, 114, 5, 0x0030, 0x10, 4, 1), + pin_field_base(115, 115, 5, 0x0030, 0x10, 5, 1), + pin_field_base(116, 116, 6, 0x0070, 0x10, 9, 1), + pin_field_base(117, 117, 6, 0x0070, 0x10, 8, 1), + pin_field_base(118, 118, 6, 0x0070, 0x10, 7, 1), + pin_field_base(119, 119, 6, 0x0070, 0x10, 6, 1), + pin_field_base(120, 120, 6, 0x0070, 0x10, 11, 1), + pin_field_base(121, 121, 6, 0x0070, 0x10, 1, 1), + pin_field_base(122, 122, 6, 0x0070, 0x10, 0, 1), + pin_field_base(123, 123, 6, 0x0070, 0x10, 5, 1), + pin_field_base(124, 124, 6, 0x0070, 0x10, 4, 1), + pin_field_base(125, 125, 6, 0x0070, 0x10, 3, 1), + pin_field_base(126, 126, 6, 0x0070, 0x10, 2, 1), + pin_field_base(127, 127, 6, 0x0070, 0x10, 10, 1), +}; + +static const struct mtk_pin_field_calc mt8195_pin_r1_range[] = { + pin_field_base(0, 0, 4, 0x0090, 0x10, 0, 1), + pin_field_base(1, 1, 4, 0x0090, 0x10, 1, 1), + pin_field_base(2, 2, 4, 0x0090, 0x10, 2, 1), + pin_field_base(3, 3, 4, 0x0090, 0x10, 3, 1), + pin_field_base(4, 4, 4, 0x0090, 0x10, 4, 1), + pin_field_base(5, 5, 4, 0x0090, 0x10, 5, 1), + pin_field_base(77, 77, 3, 0x0090, 0x10, 1, 1), + pin_field_base(78, 78, 3, 0x0090, 0x10, 2, 1), + pin_field_base(79, 79, 3, 0x0090, 0x10, 9, 1), + pin_field_base(80, 80, 3, 0x0090, 0x10, 10, 1), + pin_field_base(81, 81, 3, 0x0090, 0x10, 11, 1), + pin_field_base(82, 82, 3, 0x0090, 0x10, 12, 1), + pin_field_base(83, 83, 3, 0x0090, 0x10, 13, 1), + pin_field_base(84, 84, 3, 0x0090, 0x10, 14, 1), + pin_field_base(85, 85, 3, 0x0090, 0x10, 15, 1), + pin_field_base(86, 86, 3, 0x0090, 0x10, 16, 1), + pin_field_base(87, 87, 3, 0x0090, 0x10, 3, 1), + pin_field_base(88, 88, 3, 0x0090, 0x10, 4, 1), + pin_field_base(89, 89, 3, 0x0090, 0x10, 5, 1), + pin_field_base(90, 90, 3, 0x0090, 0x10, 6, 1), + pin_field_base(91, 91, 3, 0x0090, 0x10, 7, 1), + pin_field_base(92, 92, 3, 0x0090, 0x10, 8, 1), + pin_field_base(93, 93, 3, 0x0090, 0x10, 18, 1), + pin_field_base(94, 94, 3, 0x0090, 0x10, 19, 1), + pin_field_base(95, 95, 3, 0x0090, 0x10, 17, 1), + pin_field_base(96, 96, 3, 0x0090, 0x10, 0, 1), + pin_field_base(104, 104, 3, 0x0090, 0x10, 22, 1), + pin_field_base(105, 105, 3, 0x0090, 0x10, 23, 1), + pin_field_base(106, 106, 3, 0x0090, 0x10, 20, 1), + pin_field_base(107, 107, 3, 0x0090, 0x10, 21, 1), + pin_field_base(110, 110, 5, 0x0040, 0x10, 1, 1), + pin_field_base(111, 111, 5, 0x0040, 0x10, 0, 1), + pin_field_base(112, 112, 5, 0x0040, 0x10, 2, 1), + pin_field_base(113, 113, 5, 0x0040, 0x10, 3, 1), + pin_field_base(114, 114, 5, 0x0040, 0x10, 4, 1), + pin_field_base(115, 115, 5, 0x0040, 0x10, 5, 1), + pin_field_base(116, 116, 6, 0x0080, 0x10, 9, 1), + pin_field_base(117, 117, 6, 0x0080, 0x10, 8, 1), + pin_field_base(118, 118, 6, 0x0080, 0x10, 7, 1), + pin_field_base(119, 119, 6, 0x0080, 0x10, 6, 1), + pin_field_base(120, 120, 6, 0x0080, 0x10, 11, 1), + pin_field_base(121, 121, 6, 0x0080, 0x10, 1, 1), + pin_field_base(122, 122, 6, 0x0080, 0x10, 0, 1), + pin_field_base(123, 123, 6, 0x0080, 0x10, 5, 1), + pin_field_base(124, 124, 6, 0x0080, 0x10, 4, 1), + pin_field_base(125, 125, 6, 0x0080, 0x10, 3, 1), + pin_field_base(126, 126, 6, 0x0080, 0x10, 2, 1), + pin_field_base(127, 127, 6, 0x0080, 0x10, 10, 1), +}; + +static const struct mtk_pin_field_calc mt8195_pin_drv_range[] = { + pin_field_base(0, 0, 4, 0x000, 0x10, 0, 3), + pin_field_base(1, 1, 4, 0x000, 0x10, 3, 3), + pin_field_base(2, 2, 4, 0x000, 0x10, 6, 3), + pin_field_base(3, 3, 4, 0x000, 0x10, 9, 3), + pin_field_base(4, 4, 4, 0x000, 0x10, 12, 3), + pin_field_base(5, 5, 4, 0x000, 0x10, 15, 3), + pins_field_base(6, 7, 4, 0x000, 0x10, 18, 3), + pin_field_base(8, 8, 4, 0x010, 0x10, 6, 3), + pin_field_base(9, 9, 4, 0x000, 0x10, 21, 3), + pin_field_base(10, 10, 4, 0x010, 0x10, 9, 3), + pin_field_base(11, 11, 4, 0x000, 0x10, 24, 3), + pin_field_base(12, 12, 4, 0x010, 0x10, 12, 3), + pin_field_base(13, 13, 4, 0x010, 0x10, 27, 3), + pin_field_base(14, 14, 4, 0x010, 0x10, 15, 3), + pin_field_base(15, 15, 4, 0x010, 0x10, 0, 3), + pin_field_base(16, 16, 4, 0x010, 0x10, 18, 3), + pin_field_base(17, 17, 4, 0x010, 0x10, 3, 3), + pin_field_base(18, 18, 2, 0x010, 0x10, 6, 3), + pin_field_base(19, 19, 2, 0x010, 0x10, 3, 3), + pin_field_base(20, 20, 2, 0x010, 0x10, 0, 3), + pin_field_base(21, 21, 2, 0x000, 0x10, 27, 3), + pin_field_base(22, 22, 2, 0x000, 0x10, 0, 3), + pin_field_base(23, 23, 2, 0x000, 0x10, 3, 3), + pin_field_base(24, 24, 2, 0x000, 0x10, 6, 3), + pin_field_base(25, 25, 2, 0x000, 0x10, 12, 3), + pin_field_base(26, 26, 2, 0x000, 0x10, 9, 3), + pin_field_base(27, 27, 2, 0x000, 0x10, 15, 3), + pin_field_base(28, 28, 2, 0x000, 0x10, 18, 3), + pin_field_base(29, 29, 2, 0x000, 0x10, 21, 3), + pin_field_base(30, 30, 2, 0x000, 0x10, 24, 3), + pins_field_base(31, 33, 1, 0x010, 0x10, 0, 3), + pin_field_base(34, 34, 1, 0x000, 0x10, 21, 3), + pin_field_base(35, 35, 1, 0x000, 0x10, 24, 3), + pin_field_base(36, 36, 1, 0x010, 0x10, 0, 3), + pin_field_base(37, 37, 1, 0x010, 0x10, 21, 3), + pins_field_base(38, 39, 1, 0x010, 0x10, 3, 3), + pin_field_base(40, 40, 1, 0x010, 0x10, 27, 3), + pin_field_base(41, 41, 1, 0x010, 0x10, 24, 3), + pin_field_base(42, 42, 1, 0x020, 0x10, 3, 3), + pin_field_base(43, 43, 1, 0x020, 0x10, 0, 3), + pin_field_base(44, 44, 1, 0x030, 0x10, 0, 3), + pin_field_base(45, 45, 1, 0x030, 0x10, 3, 3), + pins_field_base(46, 47, 1, 0x010, 0x10, 3, 3), + pins_field_base(48, 51, 1, 0x010, 0x10, 6, 3), + pins_field_base(52, 55, 1, 0x010, 0x10, 9, 3), + pins_field_base(56, 59, 1, 0x010, 0x10, 12, 3), + pins_field_base(60, 63, 1, 0x010, 0x10, 15, 3), + pin_field_base(64, 64, 1, 0x010, 0x10, 18, 3), + pins_field_base(65, 68, 1, 0x000, 0x10, 27, 3), + pin_field_base(69, 69, 1, 0x000, 0x10, 0, 3), + pin_field_base(70, 70, 1, 0x000, 0x10, 18, 3), + pin_field_base(71, 71, 1, 0x000, 0x10, 12, 3), + pin_field_base(72, 72, 1, 0x000, 0x10, 15, 3), + pin_field_base(73, 73, 1, 0x000, 0x10, 3, 3), + pin_field_base(74, 74, 1, 0x000, 0x10, 6, 3), + pin_field_base(75, 75, 1, 0x000, 0x10, 9, 3), + pin_field_base(76, 76, 1, 0x010, 0x10, 18, 3), + pin_field_base(77, 77, 3, 0x000, 0x10, 0, 3), + pin_field_base(78, 78, 3, 0x000, 0x10, 15, 3), + pin_field_base(79, 79, 3, 0x000, 0x10, 18, 3), + pin_field_base(80, 80, 3, 0x000, 0x10, 21, 3), + pin_field_base(81, 81, 3, 0x000, 0x10, 28, 3), + pin_field_base(82, 82, 3, 0x000, 0x10, 27, 3), + pin_field_base(83, 83, 3, 0x010, 0x10, 0, 3), + pin_field_base(84, 84, 3, 0x010, 0x10, 3, 3), + pins_field_base(85, 88, 3, 0x010, 0x10, 15, 3), + pin_field_base(89, 89, 3, 0x000, 0x10, 3, 3), + pin_field_base(90, 90, 3, 0x000, 0x10, 6, 3), + pin_field_base(91, 91, 3, 0x000, 0x10, 9, 3), + pin_field_base(92, 92, 3, 0x000, 0x10, 12, 3), + pin_field_base(93, 93, 3, 0x010, 0x10, 6, 3), + pin_field_base(94, 94, 3, 0x010, 0x10, 9, 3), + pins_field_base(95, 98, 3, 0x010, 0x10, 18, 3), + pins_field_base(99, 102, 3, 0x010, 0x10, 21, 3), + pins_field_base(103, 104, 3, 0x010, 0x10, 24, 3), + pin_field_base(105, 105, 3, 0x010, 0x10, 27, 3), + pins_field_base(106, 107, 3, 0x010, 0x10, 24, 3), + pins_field_base(108, 109, 3, 0x010, 0x10, 27, 3), + pin_field_base(110, 110, 5, 0x000, 0x10, 3, 3), + pin_field_base(111, 111, 5, 0x000, 0x10, 0, 3), + pin_field_base(112, 112, 5, 0x000, 0x10, 6, 3), + pin_field_base(113, 113, 5, 0x000, 0x10, 9, 3), + pin_field_base(114, 114, 5, 0x000, 0x10, 12, 3), + pin_field_base(115, 115, 5, 0x000, 0x10, 15, 3), + pin_field_base(116, 116, 6, 0x000, 0x10, 27, 3), + pin_field_base(117, 117, 6, 0x000, 0x10, 24, 3), + pin_field_base(118, 118, 6, 0x000, 0x10, 21, 3), + pin_field_base(119, 119, 6, 0x000, 0x10, 18, 3), + pin_field_base(120, 120, 6, 0x010, 0x10, 3, 3), + pin_field_base(121, 121, 6, 0x000, 0x10, 3, 3), + pin_field_base(122, 122, 6, 0x000, 0x10, 0, 3), + pin_field_base(123, 123, 6, 0x000, 0x10, 15, 3), + pin_field_base(124, 124, 6, 0x000, 0x10, 12, 3), + pin_field_base(125, 125, 6, 0x000, 0x10, 9, 3), + pin_field_base(126, 126, 6, 0x000, 0x10, 6, 3), + pin_field_base(127, 127, 6, 0x010, 0x10, 0, 3), + pin_field_base(128, 128, 3, 0x010, 0x10, 27, 3), + pins_field_base(129, 130, 3, 0x020, 0x10, 0, 3), + pins_field_base(131, 131, 3, 0x010, 0x10, 12, 3), + pin_field_base(132, 132, 6, 0x010, 0x10, 9, 3), + pin_field_base(133, 133, 6, 0x010, 0x10, 6, 3), + pin_field_base(134, 134, 6, 0x010, 0x10, 15, 3), + pin_field_base(135, 135, 6, 0x010, 0x10, 12, 3), + pin_field_base(136, 136, 1, 0x020, 0x10, 9, 3), + pin_field_base(137, 137, 1, 0x020, 0x10, 6, 3), + pin_field_base(138, 138, 1, 0x020, 0x10, 15, 3), + pin_field_base(139, 139, 1, 0x020, 0x10, 12, 3), + pin_field_base(140, 140, 1, 0x020, 0x10, 21, 3), + pin_field_base(141, 141, 1, 0x020, 0x10, 18, 3), + pin_field_base(142, 142, 1, 0x020, 0x10, 27, 3), + pin_field_base(143, 143, 1, 0x020, 0x10, 24, 3), +}; + +static const struct mtk_pin_reg_calc mt8195_reg_cals[pinctrl_pin_reg_max] = { + [pinctrl_pin_reg_mode] = mtk_range(mt8195_pin_mode_range), + [pinctrl_pin_reg_dir] = mtk_range(mt8195_pin_dir_range), + [pinctrl_pin_reg_di] = mtk_range(mt8195_pin_di_range), + [pinctrl_pin_reg_do] = mtk_range(mt8195_pin_do_range), + [pinctrl_pin_reg_smt] = mtk_range(mt8195_pin_smt_range), + [pinctrl_pin_reg_ies] = mtk_range(mt8195_pin_ies_range), + [pinctrl_pin_reg_pu] = mtk_range(mt8195_pin_pu_range), + [pinctrl_pin_reg_pd] = mtk_range(mt8195_pin_pd_range), + [pinctrl_pin_reg_drv] = mtk_range(mt8195_pin_drv_range), + [pinctrl_pin_reg_pupd] = mtk_range(mt8195_pin_pupd_range), + [pinctrl_pin_reg_r0] = mtk_range(mt8195_pin_r0_range), + [pinctrl_pin_reg_r1] = mtk_range(mt8195_pin_r1_range), +}; + +static const char * const mt8195_pinctrl_register_base_names[] = { + "iocfg0", "iocfg_bm", "iocfg_bl", "iocfg_br", "iocfg_lm", + "iocfg_rb", "iocfg_tl", +}; + +static const struct mtk_eint_hw mt8195_eint_hw = { + .port_mask = 0xf, + .ports = 7, + .ap_num = 225, + .db_cnt = 32, +}; + +static const struct mtk_pin_soc mt8195_data = { + .reg_cal = mt8195_reg_cals, + .pins = mtk_pins_mt8195, + .npins = array_size(mtk_pins_mt8195), + .ngrps = array_size(mtk_pins_mt8195), + .eint_hw = &mt8195_eint_hw, + .nfuncs = 8, + .gpio_m = 0, + .base_names = mt8195_pinctrl_register_base_names, + .nbase_names = array_size(mt8195_pinctrl_register_base_names), + .bias_set_combo = mtk_pinconf_bias_set_combo, + .bias_get_combo = mtk_pinconf_bias_get_combo, + .drive_set = mtk_pinconf_drive_set_rev1, + .drive_get = mtk_pinconf_drive_get_rev1, +}; + +static const struct of_device_id mt8195_pinctrl_of_match[] = { + { .compatible = "mediatek,mt8195-pinctrl", }, + { } +}; + +static int mt8195_pinctrl_probe(struct platform_device *pdev) +{ + return mtk_paris_pinctrl_probe(pdev, &mt8195_data); +} + +static struct platform_driver mt8195_pinctrl_driver = { + .driver = { + .name = "mt8195-pinctrl", + .of_match_table = mt8195_pinctrl_of_match, + }, + .probe = mt8195_pinctrl_probe, +}; + +static int __init mt8195_pinctrl_init(void) +{ + return platform_driver_register(&mt8195_pinctrl_driver); +} +arch_initcall(mt8195_pinctrl_init); diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-mt8195.h b/drivers/pinctrl/mediatek/pinctrl-mtk-mt8195.h --- /dev/null +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-mt8195.h +/* spdx-license-identifier: gpl-2.0 */ +/* + * copyright (c) 2020 mediatek inc. + * + * author: zhiyong tao <zhiyong.tao@mediatek.com> + * + */ + +#ifndef __pinctrl_mtk_mt8195_h +#define __pinctrl_mtk_mt8195_h + +#include "pinctrl-paris.h" + +static const struct mtk_pin_desc mtk_pins_mt8195[] = { + mtk_pin( + 0, "gpio0", + mtk_eint_function(0, 0), + drv_grp4, + mtk_function(0, "gpio0"), + mtk_function(1, "tp_gpio0_ao"), + mtk_function(2, "msdc2_cmd"), + mtk_function(3, "tdmin_mck"), + mtk_function(4, "clkm0"), + mtk_function(5, "perstn_1"), + mtk_function(6, "iddig_1p"), + mtk_function(7, "dmic4_clk") + ), + mtk_pin( + 1, "gpio1", + mtk_eint_function(0, 1), + drv_grp4, + mtk_function(0, "gpio1"), + mtk_function(1, "tp_gpio1_ao"), + mtk_function(2, "msdc2_clk"), + mtk_function(3, "tdmin_di"), + mtk_function(4, "clkm1"), + mtk_function(5, "clkreqn_1"), + mtk_function(6, "usb_drvvbus_1p"), + mtk_function(7, "dmic4_dat") + ), + mtk_pin( + 2, "gpio2", + mtk_eint_function(0, 2), + drv_grp4, + mtk_function(0, "gpio2"), + mtk_function(1, "tp_gpio2_ao"), + mtk_function(2, "msdc2_dat3"), + mtk_function(3, "tdmin_lrck"), + mtk_function(4, "clkm2"), + mtk_function(5, "waken_1"), + mtk_function(7, "dmic2_clk") + ), + mtk_pin( + 3, "gpio3", + mtk_eint_function(0, 3), + drv_grp4, + mtk_function(0, "gpio3"), + mtk_function(1, "tp_gpio3_ao"), + mtk_function(2, "msdc2_dat0"), + mtk_function(3, "tdmin_bck"), + mtk_function(4, "clkm3"), + mtk_function(7, "dmic2_dat") + ), + mtk_pin( + 4, "gpio4", + mtk_eint_function(0, 4), + drv_grp4, + mtk_function(0, "gpio4"), + mtk_function(1, "tp_gpio4_ao"), + mtk_function(2, "msdc2_dat2"), + mtk_function(3, "spdif_in1"), + mtk_function(4, "utxd3"), + mtk_function(5, "sda2"), + mtk_function(7, "iddig_2p") + ), + mtk_pin( + 5, "gpio5", + mtk_eint_function(0, 5), + drv_grp4, + mtk_function(0, "gpio5"), + mtk_function(1, "tp_gpio5_ao"), + mtk_function(2, "msdc2_dat1"), + mtk_function(3, "spdif_in0"), + mtk_function(4, "urxd3"), + mtk_function(5, "scl2"), + mtk_function(7, "usb_drvvbus_2p") + ), + mtk_pin( + 6, "gpio6", + mtk_eint_function(0, 6), + drv_grp4, + mtk_function(0, "gpio6"), + mtk_function(1, "tp_gpio6_ao"), + mtk_function(2, "dp_tx_hpd"), + mtk_function(3, "i2so1_d4"), + mtk_function(4, "utxd4"), + mtk_function(5, "cmvref3"), + mtk_function(7, "dmic3_clk") + ), + mtk_pin( + 7, "gpio7", + mtk_eint_function(0, 7), + drv_grp4, + mtk_function(0, "gpio7"), + mtk_function(1, "tp_gpio7_ao"), + mtk_function(2, "edp_tx_hpd"), + mtk_function(3, "i2so1_d5"), + mtk_function(4, "urxd4"), + mtk_function(5, "cmvref4"), + mtk_function(7, "dmic3_dat") + ), + mtk_pin( + 8, "gpio8", + mtk_eint_function(0, 8), + drv_grp4, + mtk_function(0, "gpio8"), + mtk_function(1, "sda0"), + mtk_function(2, "pwm_0"), + mtk_function(4, "spdif_out"), + mtk_function(6, "lvts_fout"), + mtk_function(7, "dbg_mon_a0") + ), + mtk_pin( + 9, "gpio9", + mtk_eint_function(0, 9), + drv_grp4, + mtk_function(0, "gpio9"), + mtk_function(1, "scl0"), + mtk_function(2, "pwm_1"), + mtk_function(4, "ir_in"), + mtk_function(6, "lvts_sdo"), + mtk_function(7, "dbg_mon_a1") + ), + mtk_pin( + 10, "gpio10", + mtk_eint_function(0, 10), + drv_grp4, + mtk_function(0, "gpio10"), + mtk_function(1, "sda1"), + mtk_function(2, "pwm_2"), + mtk_function(3, "adsp_urxd0"), + mtk_function(4, "spdif_in1"), + mtk_function(6, "lvts_scf"), + mtk_function(7, "dbg_mon_a2") + ), + mtk_pin( + 11, "gpio11", + mtk_eint_function(0, 11), + drv_grp4, + mtk_function(0, "gpio11"), + mtk_function(1, "scl1"), + mtk_function(2, "pwm_3"), + mtk_function(3, "adsp_utxd0"), + mtk_function(4, "spdif_in0"), + mtk_function(6, "lvts_sck"), + mtk_function(7, "dbg_mon_a3") + ), + mtk_pin( + 12, "gpio12", + mtk_eint_function(0, 12), + drv_grp4, + mtk_function(0, "gpio12"), + mtk_function(1, "sda2"), + mtk_function(2, "dmic3_dat_r"), + mtk_function(3, "i2so1_d6"), + mtk_function(6, "lvts_sdi"), + mtk_function(7, "dbg_mon_a4") + ), + mtk_pin( + 13, "gpio13", + mtk_eint_function(0, 13), + drv_grp4, + mtk_function(0, "gpio13"), + mtk_function(1, "scl2"), + mtk_function(2, "dmic4_dat_r"), + mtk_function(3, "i2so1_d7"), + mtk_function(7, "dbg_mon_a5") + ), + mtk_pin( + 14, "gpio14", + mtk_eint_function(0, 14), + drv_grp4, + mtk_function(0, "gpio14"), + mtk_function(1, "sda3"), + mtk_function(2, "dmic3_dat"), + mtk_function(3, "tdmin_mck"), + mtk_function(7, "dbg_mon_a6") + ), + mtk_pin( + 15, "gpio15", + mtk_eint_function(0, 15), + drv_grp4, + mtk_function(0, "gpio15"), + mtk_function(1, "scl3"), + mtk_function(2, "dmic3_clk"), + mtk_function(3, "tdmin_di"), + mtk_function(7, "dbg_mon_a7") + ), + mtk_pin( + 16, "gpio16", + mtk_eint_function(0, 16), + drv_grp4, + mtk_function(0, "gpio16"), + mtk_function(1, "sda4"), + mtk_function(2, "dmic4_dat"), + mtk_function(3, "tdmin_lrck"), + mtk_function(7, "dbg_mon_a8") + ), + mtk_pin( + 17, "gpio17", + mtk_eint_function(0, 17), + drv_grp4, + mtk_function(0, "gpio17"), + mtk_function(1, "scl4"), + mtk_function(2, "dmic4_clk"), + mtk_function(3, "tdmin_bck"), + mtk_function(7, "dbg_mon_a9") + ), + mtk_pin( + 18, "gpio18", + mtk_eint_function(0, 18), + drv_grp4, + mtk_function(0, "gpio18"), + mtk_function(1, "dp_tx_hpd") + ), + mtk_pin( + 19, "gpio19", + mtk_eint_function(0, 19), + drv_grp4, + mtk_function(0, "gpio19"), + mtk_function(1, "waken"), + mtk_function(2, "scp_sda1"), + mtk_function(3, "md32_0_jtag_tck"), + mtk_function(4, "adsp_jtag0_tck"), + mtk_function(5, "sda6") + ), + mtk_pin( + 20, "gpio20", + mtk_eint_function(0, 20), + drv_grp4, + mtk_function(0, "gpio20"), + mtk_function(1, "perstn"), + mtk_function(2, "scp_scl1"), + mtk_function(3, "md32_0_jtag_tms"), + mtk_function(4, "adsp_jtag0_tms"), + mtk_function(5, "scl6") + ), + mtk_pin( + 21, "gpio21", + mtk_eint_function(0, 21), + drv_grp4, + mtk_function(0, "gpio21"), + mtk_function(1, "clkreqn"), + mtk_function(3, "md32_0_jtag_tdi"), + mtk_function(4, "adsp_jtag0_tdi"), + mtk_function(5, "scp_sda1") + ), + mtk_pin( + 22, "gpio22", + mtk_eint_function(0, 22), + drv_grp4, + mtk_function(0, "gpio22"), + mtk_function(1, "cmmclk0"), + mtk_function(2, "perstn_1"), + mtk_function(5, "scp_scl1"), + mtk_function(7, "md32_0_gpio0") + ), + mtk_pin( + 23, "gpio23", + mtk_eint_function(0, 23), + drv_grp4, + mtk_function(0, "gpio23"), + mtk_function(1, "cmmclk1"), + mtk_function(2, "clkreqn_1"), + mtk_function(3, "sda4"), + mtk_function(4, "dmic1_clk"), + mtk_function(5, "scp_sda0"), + mtk_function(7, "md32_0_gpio1") + ), + mtk_pin( + 24, "gpio24", + mtk_eint_function(0, 24), + drv_grp4, + mtk_function(0, "gpio24"), + mtk_function(1, "cmmclk2"), + mtk_function(2, "waken_1"), + mtk_function(3, "scl4"), + mtk_function(4, "dmic1_dat"), + mtk_function(5, "scp_scl0"), + mtk_function(6, "lvts_26m"), + mtk_function(7, "md32_0_gpio2") + ), + mtk_pin( + 25, "gpio25", + mtk_eint_function(0, 25), + drv_grp4, + mtk_function(0, "gpio25"), + mtk_function(1, "cmmrst"), + mtk_function(2, "cmmclk3"), + mtk_function(3, "spdif_out"), + mtk_function(4, "sda6"), + mtk_function(5, "adsp_jtag0_trstn"), + mtk_function(6, "md32_0_jtag_trst") + ), + mtk_pin( + 26, "gpio26", + mtk_eint_function(0, 26), + drv_grp4, + mtk_function(0, "gpio26"), + mtk_function(1, "cmmpdn"), + mtk_function(2, "cmmclk4"), + mtk_function(3, "ir_in"), + mtk_function(4, "scl6"), + mtk_function(5, "adsp_jtag0_tdo"), + mtk_function(6, "md32_0_jtag_tdo") + ), + mtk_pin( + 27, "gpio27", + mtk_eint_function(0, 27), + drv_grp4, + mtk_function(0, "gpio27"), + mtk_function(1, "hdmirx20_htplg"), + mtk_function(2, "cmflash0"), + mtk_function(3, "md32_0_txd"), + mtk_function(4, "tp_utxd2_ao"), + mtk_function(5, "scl7"), + mtk_function(6, "ucts2"), + mtk_function(7, "dbg_mon_a18") + ), + mtk_pin( + 28, "gpio28", + mtk_eint_function(0, 28), + drv_grp4, + mtk_function(0, "gpio28"), + mtk_function(1, "hdmirx20_pwr5v"), + mtk_function(2, "cmflash1"), + mtk_function(3, "md32_0_rxd"), + mtk_function(4, "tp_urxd2_ao"), + mtk_function(5, "sda7"), + mtk_function(6, "urts2"), + mtk_function(7, "dbg_mon_a19") + ), + mtk_pin( + 29, "gpio29", + mtk_eint_function(0, 29), + drv_grp4, + mtk_function(0, "gpio29"), + mtk_function(1, "hdmirx20_scl"), + mtk_function(2, "cmflash2"), + mtk_function(3, "scl5"), + mtk_function(4, "tp_urts2_ao"), + mtk_function(6, "utxd2"), + mtk_function(7, "dbg_mon_a20") + ), + mtk_pin( + 30, "gpio30", + mtk_eint_function(0, 30), + drv_grp4, + mtk_function(0, "gpio30"), + mtk_function(1, "hdmirx20_sda"), + mtk_function(2, "cmflash3"), + mtk_function(3, "sda5"), + mtk_function(4, "tp_ucts2_ao"), + mtk_function(6, "urxd2"), + mtk_function(7, "dbg_mon_a21") + ), + mtk_pin( + 31, "gpio31", + mtk_eint_function(0, 31), + drv_grp4, + mtk_function(0, "gpio31"), + mtk_function(1, "hdmitx20_pwr5v"), + mtk_function(2, "dmic1_dat_r"), + mtk_function(3, "perstn"), + mtk_function(7, "dbg_mon_a22") + ), + mtk_pin( + 32, "gpio32", + mtk_eint_function(0, 32), + drv_grp4, + mtk_function(0, "gpio32"), + mtk_function(1, "hdmitx20_htplg"), + mtk_function(3, "clkreqn"), + mtk_function(7, "dbg_mon_a23") + ), + mtk_pin( + 33, "gpio33", + mtk_eint_function(0, 33), + drv_grp4, + mtk_function(0, "gpio33"), + mtk_function(1, "hdmitx20_cec"), + mtk_function(2, "cmvref0"), + mtk_function(3, "waken") + ), + mtk_pin( + 34, "gpio34", + mtk_eint_function(0, 34), + drv_grp4, + mtk_function(0, "gpio34"), + mtk_function(1, "hdmitx20_scl"), + mtk_function(2, "cmvref1"), + mtk_function(3, "scl7"), + mtk_function(4, "scl6"), + mtk_function(7, "dbg_mon_a24") + ), + mtk_pin( + 35, "gpio35", + mtk_eint_function(0, 35), + drv_grp4, + mtk_function(0, "gpio35"), + mtk_function(1, "hdmitx20_sda"), + mtk_function(2, "cmvref2"), + mtk_function(3, "sda7"), + mtk_function(4, "sda6"), + mtk_function(7, "dbg_mon_a25") + ), + mtk_pin( + 36, "gpio36", + mtk_eint_function(0, 36), + drv_grp4, + mtk_function(0, "gpio36"), + mtk_function(1, "rtc32k_ck"), + mtk_function(7, "dbg_mon_a27") + ), + mtk_pin( + 37, "gpio37", + mtk_eint_function(0, 37), + drv_grp4, + mtk_function(0, "gpio37"), + mtk_function(1, "watchdog"), + mtk_function(7, "dbg_mon_a28") + ), + mtk_pin( + 38, "gpio38", + mtk_eint_function(0, 38), + drv_grp4, + mtk_function(0, "gpio38"), + mtk_function(1, "srclkena0"), + mtk_function(7, "dbg_mon_a29") + ), + mtk_pin( + 39, "gpio39", + mtk_eint_function(0, 39), + drv_grp4, + mtk_function(0, "gpio39"), + mtk_function(1, "srclkena1"), + mtk_function(2, "dmic2_dat_r"), + mtk_function(7, "dbg_mon_a30") + ), + mtk_pin( + 40, "gpio40", + mtk_eint_function(0, 40), + drv_grp4, + mtk_function(0, "gpio40"), + mtk_function(1, "pwrap_spi0_csn"), + mtk_function(3, "spim3_csb"), + mtk_function(7, "dbg_mon_a31") + ), + mtk_pin( + 41, "gpio41", + mtk_eint_function(0, 41), + drv_grp4, + mtk_function(0, "gpio41"), + mtk_function(1, "pwrap_spi0_ck"), + mtk_function(3, "spim3_clk"), + mtk_function(7, "dbg_mon_a32") + ), + mtk_pin( + 42, "gpio42", + mtk_eint_function(0, 42), + drv_grp4, + mtk_function(0, "gpio42"), + mtk_function(1, "pwrap_spi0_mo"), + mtk_function(2, "pwrap_spi0_mi"), + mtk_function(3, "spim3_mo"), + mtk_function(7, "dbg_mon_b0") + ), + mtk_pin( + 43, "gpio43", + mtk_eint_function(0, 43), + drv_grp4, + mtk_function(0, "gpio43"), + mtk_function(1, "pwrap_spi0_mi"), + mtk_function(2, "pwrap_spi0_mo"), + mtk_function(3, "spim3_mi"), + mtk_function(7, "dbg_mon_b1") + ), + mtk_pin( + 44, "gpio44", + mtk_eint_function(0, 44), + drv_grp4, + mtk_function(0, "gpio44"), + mtk_function(1, "spmi_m_scl"), + mtk_function(2, "i2si00_data1"), + mtk_function(3, "scl5"), + mtk_function(4, "utxd5"), + mtk_function(7, "dbg_mon_b2") + ), + mtk_pin( + 45, "gpio45", + mtk_eint_function(0, 45), + drv_grp4, + mtk_function(0, "gpio45"), + mtk_function(1, "spmi_m_sda"), + mtk_function(2, "i2si00_data2"), + mtk_function(3, "sda5"), + mtk_function(4, "urxd5"), + mtk_function(7, "dbg_mon_b3") + ), + mtk_pin( + 46, "gpio46", + mtk_eint_function(0, 46), + drv_grp4, + mtk_function(0, "gpio46"), + mtk_function(1, "i2sin_mck"), + mtk_function(2, "i2si00_data3"), + mtk_function(3, "splin_mck"), + mtk_function(7, "dbg_mon_b4") + ), + mtk_pin( + 47, "gpio47", + mtk_eint_function(0, 47), + drv_grp4, + mtk_function(0, "gpio47"), + mtk_function(1, "i2sin_bck"), + mtk_function(2, "i2sin0_bck"), + mtk_function(3, "splin_lrck"), + mtk_function(7, "dbg_mon_b5") + ), + mtk_pin( + 48, "gpio48", + mtk_eint_function(0, 48), + drv_grp4, + mtk_function(0, "gpio48"), + mtk_function(1, "i2sin_ws"), + mtk_function(2, "i2sin0_lrck"), + mtk_function(3, "splin_bck"), + mtk_function(7, "dbg_mon_b6") + ), + mtk_pin( + 49, "gpio49", + mtk_eint_function(0, 49), + drv_grp4, + mtk_function(0, "gpio49"), + mtk_function(1, "i2sin_d0"), + mtk_function(2, "i2si00_data0"), + mtk_function(3, "splin_d0"), + mtk_function(7, "dbg_mon_b7") + ), + mtk_pin( + 50, "gpio50", + mtk_eint_function(0, 50), + drv_grp4, + mtk_function(0, "gpio50"), + mtk_function(1, "i2so1_mck"), + mtk_function(2, "i2si5_d0"), + mtk_function(4, "i2so4_mck"), + mtk_function(7, "dbg_mon_b8") + ), + mtk_pin( + 51, "gpio51", + mtk_eint_function(0, 51), + drv_grp4, + mtk_function(0, "gpio51"), + mtk_function(1, "i2so1_bck"), + mtk_function(2, "i2si5_bck"), + mtk_function(7, "dbg_mon_b9") + ), + mtk_pin( + 52, "gpio52", + mtk_eint_function(0, 52), + drv_grp4, + mtk_function(0, "gpio52"), + mtk_function(1, "i2so1_ws"), + mtk_function(2, "i2si5_ws"), + mtk_function(7, "dbg_mon_b10") + ), + mtk_pin( + 53, "gpio53", + mtk_eint_function(0, 53), + drv_grp4, + mtk_function(0, "gpio53"), + mtk_function(1, "i2so1_d0"), + mtk_function(2, "i2si5_mck"), + mtk_function(7, "dbg_mon_b11") + ), + mtk_pin( + 54, "gpio54", + mtk_eint_function(0, 54), + drv_grp4, + mtk_function(0, "gpio54"), + mtk_function(1, "i2so1_d1"), + mtk_function(2, "i2si01_data1"), + mtk_function(3, "splin_d1"), + mtk_function(4, "i2so4_bck"), + mtk_function(7, "dbg_mon_b12") + ), + mtk_pin( + 55, "gpio55", + mtk_eint_function(0, 55), + drv_grp4, + mtk_function(0, "gpio55"), + mtk_function(1, "i2so1_d2"), + mtk_function(2, "i2si01_data2"), + mtk_function(3, "splin_d2"), + mtk_function(4, "i2so4_ws"), + mtk_function(7, "dbg_mon_b13") + ), + mtk_pin( + 56, "gpio56", + mtk_eint_function(0, 56), + drv_grp4, + mtk_function(0, "gpio56"), + mtk_function(1, "i2so1_d3"), + mtk_function(2, "i2si01_data3"), + mtk_function(3, "splin_d3"), + mtk_function(4, "i2so4_d0"), + mtk_function(7, "dbg_mon_b14") + ), + mtk_pin( + 57, "gpio57", + mtk_eint_function(0, 57), + drv_grp4, + mtk_function(0, "gpio57"), + mtk_function(1, "i2so2_mck"), + mtk_function(2, "i2so1_d12"), + mtk_function(3, "lcm1_rst"), + mtk_function(7, "dbg_mon_b15") + ), + mtk_pin( + 58, "gpio58", + mtk_eint_function(0, 58), + drv_grp4, + mtk_function(0, "gpio58"), + mtk_function(1, "i2so2_bck"), + mtk_function(2, "i2so1_d13"), + mtk_function(3, "i2sin1_bck"), + mtk_function(7, "dbg_mon_b16") + ), + mtk_pin( + 59, "gpio59", + mtk_eint_function(0, 59), + drv_grp4, + mtk_function(0, "gpio59"), + mtk_function(1, "i2so2_ws"), + mtk_function(2, "i2so1_d14"), + mtk_function(3, "i2sin1_lrck"), + mtk_function(7, "dbg_mon_b17") + ), + mtk_pin( + 60, "gpio60", + mtk_eint_function(0, 60), + drv_grp4, + mtk_function(0, "gpio60"), + mtk_function(1, "i2so2_d0"), + mtk_function(2, "i2so1_d15"), + mtk_function(3, "i2si01_data0"), + mtk_function(7, "dbg_mon_b18") + ), + mtk_pin( + 61, "gpio61", + mtk_eint_function(0, 61), + drv_grp4, + mtk_function(0, "gpio61"), + mtk_function(1, "dmic1_clk"), + mtk_function(2, "i2so2_bck"), + mtk_function(3, "scp_spi2_ck"), + mtk_function(7, "dbg_mon_b19") + ), + mtk_pin( + 62, "gpio62", + mtk_eint_function(0, 62), + drv_grp4, + mtk_function(0, "gpio62"), + mtk_function(1, "dmic1_dat"), + mtk_function(2, "i2so2_ws"), + mtk_function(3, "scp_spi2_mi"), + mtk_function(7, "dbg_mon_b20") + ), + mtk_pin( + 63, "gpio63", + mtk_eint_function(0, 63), + drv_grp4, + mtk_function(0, "gpio63"), + mtk_function(1, "dmic2_clk"), + mtk_function(2, "vbusvalid"), + mtk_function(3, "scp_spi2_mo"), + mtk_function(4, "scp_scl2"), + mtk_function(5, "scp_jtag1_tdo"), + mtk_function(6, "jtdo_sel1"), + mtk_function(7, "dbg_mon_b21") + ), + mtk_pin( + 64, "gpio64", + mtk_eint_function(0, 64), + drv_grp4, + mtk_function(0, "gpio64"), + mtk_function(1, "dmic2_dat"), + mtk_function(2, "vbusvalid_1p"), + mtk_function(3, "scp_spi2_cs"), + mtk_function(4, "scp_sda2"), + mtk_function(7, "dbg_mon_b22") + ), + mtk_pin( + 65, "gpio65", + mtk_eint_function(0, 65), + drv_grp4, + mtk_function(0, "gpio65"), + mtk_function(1, "pcm_do"), + mtk_function(2, "auxif_st0"), + mtk_function(3, "ucts2"), + mtk_function(5, "scp_jtag1_tms"), + mtk_function(6, "jtms_sel1"), + mtk_function(7, "dbg_mon_b23") + ), + mtk_pin( + 66, "gpio66", + mtk_eint_function(0, 66), + drv_grp4, + mtk_function(0, "gpio66"), + mtk_function(1, "pcm_clk"), + mtk_function(2, "auxif_clk0"), + mtk_function(3, "urts2"), + mtk_function(5, "scp_jtag1_tck"), + mtk_function(6, "jtck_sel1"), + mtk_function(7, "dbg_mon_b24") + ), + mtk_pin( + 67, "gpio67", + mtk_eint_function(0, 67), + drv_grp4, + mtk_function(0, "gpio67"), + mtk_function(1, "pcm_di"), + mtk_function(2, "auxif_st1"), + mtk_function(3, "utxd2"), + mtk_function(5, "scp_jtag1_trstn"), + mtk_function(6, "jtrstn_sel1"), + mtk_function(7, "dbg_mon_b25") + ), + mtk_pin( + 68, "gpio68", + mtk_eint_function(0, 68), + drv_grp4, + mtk_function(0, "gpio68"), + mtk_function(1, "pcm_sync"), + mtk_function(2, "auxif_clk1"), + mtk_function(3, "urxd2"), + mtk_function(5, "scp_jtag1_tdi"), + mtk_function(6, "jtdi_sel1"), + mtk_function(7, "dbg_mon_b26") + ), + mtk_pin( + 69, "gpio69", + mtk_eint_function(0, 69), + drv_grp4, + mtk_function(0, "gpio69"), + mtk_function(1, "aud_clk_mosi"), + mtk_function(2, "i2sin2_bck"), + mtk_function(3, "pwm_0"), + mtk_function(4, "waken"), + mtk_function(7, "dbg_mon_b27") + ), + mtk_pin( + 70, "gpio70", + mtk_eint_function(0, 70), + drv_grp4, + mtk_function(0, "gpio70"), + mtk_function(1, "aud_sync_mosi"), + mtk_function(2, "i2sin2_lrck"), + mtk_function(3, "pwm_1"), + mtk_function(4, "perstn"), + mtk_function(7, "dbg_mon_b28") + ), + mtk_pin( + 71, "gpio71", + mtk_eint_function(0, 71), + drv_grp4, + mtk_function(0, "gpio71"), + mtk_function(1, "aud_dat_mosi0"), + mtk_function(2, "iddig_2p"), + mtk_function(3, "pwm_2"), + mtk_function(4, "clkreqn"), + mtk_function(7, "dbg_mon_b29") + ), + mtk_pin( + 72, "gpio72", + mtk_eint_function(0, 72), + drv_grp4, + mtk_function(0, "gpio72"), + mtk_function(1, "aud_dat_mosi1"), + mtk_function(2, "usb_drvvbus_2p"), + mtk_function(3, "pwm_3"), + mtk_function(4, "perstn_1"), + mtk_function(7, "dbg_mon_b30") + ), + mtk_pin( + 73, "gpio73", + mtk_eint_function(0, 73), + drv_grp4, + mtk_function(0, "gpio73"), + mtk_function(1, "aud_dat_miso0"), + mtk_function(2, "i2si02_data0"), + mtk_function(4, "clkreqn_1"), + mtk_function(5, "vow_dat_miso"), + mtk_function(7, "dbg_mon_b31") + ), + mtk_pin( + 74, "gpio74", + mtk_eint_function(0, 74), + drv_grp4, + mtk_function(0, "gpio74"), + mtk_function(1, "aud_dat_miso1"), + mtk_function(2, "i2si02_data1"), + mtk_function(4, "waken_1"), + mtk_function(5, "vow_clk_miso"), + mtk_function(7, "dbg_mon_b32") + ), + mtk_pin( + 75, "gpio75", + mtk_eint_function(0, 75), + drv_grp4, + mtk_function(0, "gpio75"), + mtk_function(1, "aud_dat_miso2"), + mtk_function(2, "i2si02_data2") + ), + mtk_pin( + 76, "gpio76", + mtk_eint_function(0, 76), + drv_grp4, + mtk_function(0, "gpio76"), + mtk_function(1, "scp_vreq_vao"), + mtk_function(2, "i2si02_data3"), + mtk_function(7, "dbg_mon_a26") + ), + mtk_pin( + 77, "gpio77", + mtk_eint_function(0, 77), + drv_grp4, + mtk_function(0, "gpio77"), + mtk_function(1, "dgi_d0"), + mtk_function(2, "dpi_d0"), + mtk_function(3, "i2si4_mck"), + mtk_function(4, "spim4_clk"), + mtk_function(5, "gbe_txd3"), + mtk_function(6, "spm_jtag_tck") + ), + mtk_pin( + 78, "gpio78", + mtk_eint_function(0, 78), + drv_grp4, + mtk_function(0, "gpio78"), + mtk_function(1, "dgi_d1"), + mtk_function(2, "dpi_d1"), + mtk_function(3, "i2si4_bck"), + mtk_function(4, "spim4_mo"), + mtk_function(5, "gbe_txd2"), + mtk_function(6, "spm_jtag_tms") + ), + mtk_pin( + 79, "gpio79", + mtk_eint_function(0, 79), + drv_grp4, + mtk_function(0, "gpio79"), + mtk_function(1, "dgi_d2"), + mtk_function(2, "dpi_d2"), + mtk_function(3, "i2si4_ws"), + mtk_function(4, "spim4_csb"), + mtk_function(5, "gbe_txd1"), + mtk_function(6, "spm_jtag_tdi") + ), + mtk_pin( + 80, "gpio80", + mtk_eint_function(0, 80), + drv_grp4, + mtk_function(0, "gpio80"), + mtk_function(1, "dgi_d3"), + mtk_function(2, "dpi_d3"), + mtk_function(3, "i2si4_d0"), + mtk_function(4, "spim4_mi"), + mtk_function(5, "gbe_txd0"), + mtk_function(6, "spm_jtag_tdo") + ), + mtk_pin( + 81, "gpio81", + mtk_eint_function(0, 81), + drv_grp4, + mtk_function(0, "gpio81"), + mtk_function(1, "dgi_d4"), + mtk_function(2, "dpi_d4"), + mtk_function(3, "i2si5_mck"), + mtk_function(4, "spim5_clk"), + mtk_function(5, "gbe_rxd3"), + mtk_function(6, "spm_jtag_trstn") + ), + mtk_pin( + 82, "gpio82", + mtk_eint_function(0, 82), + drv_grp4, + mtk_function(0, "gpio82"), + mtk_function(1, "dgi_d5"), + mtk_function(2, "dpi_d5"), + mtk_function(3, "i2si5_bck"), + mtk_function(4, "spim5_mo"), + mtk_function(5, "gbe_rxd2"), + mtk_function(6, "mcupm_jtag_tdo") + ), + mtk_pin( + 83, "gpio83", + mtk_eint_function(0, 83), + drv_grp4, + mtk_function(0, "gpio83"), + mtk_function(1, "dgi_d6"), + mtk_function(2, "dpi_d6"), + mtk_function(3, "i2si5_ws"), + mtk_function(4, "spim5_csb"), + mtk_function(5, "gbe_rxd1"), + mtk_function(6, "mcupm_jtag_tms") + ), + mtk_pin( + 84, "gpio84", + mtk_eint_function(0, 84), + drv_grp4, + mtk_function(0, "gpio84"), + mtk_function(1, "dgi_d7"), + mtk_function(2, "dpi_d7"), + mtk_function(3, "i2si5_d0"), + mtk_function(4, "spim5_mi"), + mtk_function(5, "gbe_rxd0"), + mtk_function(6, "mcupm_jtag_tck") + ), + mtk_pin( + 85, "gpio85", + mtk_eint_function(0, 85), + drv_grp4, + mtk_function(0, "gpio85"), + mtk_function(1, "dgi_d8"), + mtk_function(2, "dpi_d8"), + mtk_function(3, "i2so4_mck"), + mtk_function(4, "scp_spi1_b_ck"), + mtk_function(5, "gbe_txc"), + mtk_function(6, "mcupm_jtag_tdi") + ), + mtk_pin( + 86, "gpio86", + mtk_eint_function(0, 86), + drv_grp4, + mtk_function(0, "gpio86"), + mtk_function(1, "dgi_d9"), + mtk_function(2, "dpi_d9"), + mtk_function(3, "i2so4_bck"), + mtk_function(4, "scp_spi1_b_mi"), + mtk_function(5, "gbe_rxc"), + mtk_function(6, "mcupm_jtag_trstn") + ), + mtk_pin( + 87, "gpio87", + mtk_eint_function(0, 87), + drv_grp4, + mtk_function(0, "gpio87"), + mtk_function(1, "dgi_d10"), + mtk_function(2, "dpi_d10"), + mtk_function(3, "i2so4_ws"), + mtk_function(4, "scp_spi1_b_cs"), + mtk_function(5, "gbe_rxdv"), + mtk_function(6, "sspm_jtag_tdo") + ), + mtk_pin( + 88, "gpio88", + mtk_eint_function(0, 88), + drv_grp4, + mtk_function(0, "gpio88"), + mtk_function(1, "dgi_d11"), + mtk_function(2, "dpi_d11"), + mtk_function(3, "i2so4_d0"), + mtk_function(4, "scp_spi1_b_mo"), + mtk_function(5, "gbe_txen"), + mtk_function(6, "sspm_jtag_tms") + ), + mtk_pin( + 89, "gpio89", + mtk_eint_function(0, 89), + drv_grp4, + mtk_function(0, "gpio89"), + mtk_function(1, "dgi_d12"), + mtk_function(2, "dpi_d12"), + mtk_function(3, "msdc2_cmd_a"), + mtk_function(4, "i2so5_bck"), + mtk_function(5, "gbe_mdc"), + mtk_function(6, "sspm_jtag_tck") + ), + mtk_pin( + 90, "gpio90", + mtk_eint_function(0, 90), + drv_grp4, + mtk_function(0, "gpio90"), + mtk_function(1, "dgi_d13"), + mtk_function(2, "dpi_d13"), + mtk_function(3, "msdc2_clk_a"), + mtk_function(4, "i2so5_ws"), + mtk_function(5, "gbe_mdio"), + mtk_function(6, "sspm_jtag_tdi") + ), + mtk_pin( + 91, "gpio91", + mtk_eint_function(0, 91), + drv_grp4, + mtk_function(0, "gpio91"), + mtk_function(1, "dgi_d14"), + mtk_function(2, "dpi_d14"), + mtk_function(3, "msdc2_dat3_a"), + mtk_function(4, "i2so5_d0"), + mtk_function(5, "gbe_txer"), + mtk_function(6, "sspm_jtag_trstn") + ), + mtk_pin( + 92, "gpio92", + mtk_eint_function(0, 92), + drv_grp4, + mtk_function(0, "gpio92"), + mtk_function(1, "dgi_d15"), + mtk_function(2, "dpi_d15"), + mtk_function(3, "msdc2_dat0_a"), + mtk_function(4, "i2so2_d1"), + mtk_function(5, "gbe_rxer"), + mtk_function(6, "ccu0_jtag_tdo") + ), + mtk_pin( + 93, "gpio93", + mtk_eint_function(0, 93), + drv_grp4, + mtk_function(0, "gpio93"), + mtk_function(1, "dgi_hsync"), + mtk_function(2, "dpi_hsync"), + mtk_function(3, "msdc2_dat2_a"), + mtk_function(4, "i2so2_d2"), + mtk_function(5, "gbe_col"), + mtk_function(6, "ccu0_jtag_tms") + ), + mtk_pin( + 94, "gpio94", + mtk_eint_function(0, 94), + drv_grp4, + mtk_function(0, "gpio94"), + mtk_function(1, "dgi_vsync"), + mtk_function(2, "dpi_vsync"), + mtk_function(3, "msdc2_dat1_a"), + mtk_function(4, "i2so2_d3"), + mtk_function(5, "gbe_intr"), + mtk_function(6, "ccu0_jtag_tdi") + ), + mtk_pin( + 95, "gpio95", + mtk_eint_function(0, 95), + drv_grp4, + mtk_function(0, "gpio95"), + mtk_function(1, "dgi_de"), + mtk_function(2, "dpi_de"), + mtk_function(3, "utxd2"), + mtk_function(5, "i2sin_d1"), + mtk_function(6, "ccu0_jtag_tck") + ), + mtk_pin( + 96, "gpio96", + mtk_eint_function(0, 96), + drv_grp4, + mtk_function(0, "gpio96"), + mtk_function(1, "dgi_ck"), + mtk_function(2, "dpi_ck"), + mtk_function(3, "urxd2"), + mtk_function(4, "i2so5_mck"), + mtk_function(5, "i2sin_d2"), + mtk_function(6, "ccu0_jtag_trst") + ), + mtk_pin( + 97, "gpio97", + mtk_eint_function(0, 97), + drv_grp4, + mtk_function(0, "gpio97"), + mtk_function(1, "disp_pwm0"), + mtk_function(2, "dvfsrc_ext_req") + ), + mtk_pin( + 98, "gpio98", + mtk_eint_function(0, 98), + drv_grp4, + mtk_function(0, "gpio98"), + mtk_function(1, "utxd0") + ), + mtk_pin( + 99, "gpio99", + mtk_eint_function(0, 99), + drv_grp4, + mtk_function(0, "gpio99"), + mtk_function(1, "urxd0") + ), + mtk_pin( + 100, "gpio100", + mtk_eint_function(0, 100), + drv_grp4, + mtk_function(0, "gpio100"), + mtk_function(1, "urts1"), + mtk_function(2, "dsi_te"), + mtk_function(3, "i2so1_d8"), + mtk_function(4, "kprow2"), + mtk_function(5, "pwm_0"), + mtk_function(6, "tp_urts1_ao"), + mtk_function(7, "i2sin_d0") + ), + mtk_pin( + 101, "gpio101", + mtk_eint_function(0, 101), + drv_grp4, + mtk_function(0, "gpio101"), + mtk_function(1, "ucts1"), + mtk_function(2, "dsi1_te"), + mtk_function(3, "i2so1_d9"), + mtk_function(4, "kpcol2"), + mtk_function(5, "pwm_1"), + mtk_function(6, "tp_ucts1_ao"), + mtk_function(7, "i2sin_d1") + ), + mtk_pin( + 102, "gpio102", + mtk_eint_function(0, 102), + drv_grp4, + mtk_function(0, "gpio102"), + mtk_function(1, "utxd1"), + mtk_function(2, "vbusvalid_2p"), + mtk_function(3, "i2so1_d10"), + mtk_function(4, "sspm_utxd_ao"), + mtk_function(5, "tp_utxd1_ao"), + mtk_function(6, "md32_1_txd"), + mtk_function(7, "i2sin_d2") + ), + mtk_pin( + 103, "gpio103", + mtk_eint_function(0, 103), + drv_grp4, + mtk_function(0, "gpio103"), + mtk_function(1, "urxd1"), + mtk_function(2, "vbusvalid_3p"), + mtk_function(3, "i2so1_d11"), + mtk_function(4, "sspm_urxd_ao"), + mtk_function(5, "tp_urxd1_ao"), + mtk_function(6, "md32_1_rxd"), + mtk_function(7, "i2sin_d3") + ), + mtk_pin( + 104, "gpio104", + mtk_eint_function(0, 104), + drv_grp4, + mtk_function(0, "gpio104"), + mtk_function(1, "kprow0"), + mtk_function(2, "disp_pwm1") + ), + mtk_pin( + 105, "gpio105", + mtk_eint_function(0, 105), + drv_grp4, + mtk_function(0, "gpio105"), + mtk_function(1, "kprow1"), + mtk_function(2, "edp_tx_hpd"), + mtk_function(3, "pwm_2") + ), + mtk_pin( + 106, "gpio106", + mtk_eint_function(0, 106), + drv_grp4, + mtk_function(0, "gpio106"), + mtk_function(1, "kpcol0") + ), + mtk_pin( + 107, "gpio107", + mtk_eint_function(0, 107), + drv_grp4, + mtk_function(0, "gpio107"), + mtk_function(1, "kpcol1"), + mtk_function(2, "dsi1_te"), + mtk_function(3, "pwm_3"), + mtk_function(4, "scp_scl3"), + mtk_function(5, "i2sin_mck") + ), + mtk_pin( + 108, "gpio108", + mtk_eint_function(0, 108), + drv_grp4, + mtk_function(0, "gpio108"), + mtk_function(1, "lcm_rst"), + mtk_function(2, "kpcol1"), + mtk_function(4, "scp_sda3"), + mtk_function(5, "i2sin_bck") + ), + mtk_pin( + 109, "gpio109", + mtk_eint_function(0, 109), + drv_grp4, + mtk_function(0, "gpio109"), + mtk_function(1, "dsi_te"), + mtk_function(2, "i2sin_d3"), + mtk_function(5, "i2sin_ws") + ), + mtk_pin( + 110, "gpio110", + mtk_eint_function(0, 110), + drv_grp4, + mtk_function(0, "gpio110"), + mtk_function(1, "msdc1_cmd"), + mtk_function(2, "jtms_sel3"), + mtk_function(3, "udi_tms"), + mtk_function(5, "ccu1_jtag_tms"), + mtk_function(6, "ipu_jtag_tms") + ), + mtk_pin( + 111, "gpio111", + mtk_eint_function(0, 111), + drv_grp4, + mtk_function(0, "gpio111"), + mtk_function(1, "msdc1_clk"), + mtk_function(2, "jtck_sel3"), + mtk_function(3, "udi_tck"), + mtk_function(5, "ccu1_jtag_tck"), + mtk_function(6, "ipu_jtag_tck") + ), + mtk_pin( + 112, "gpio112", + mtk_eint_function(0, 112), + drv_grp4, + mtk_function(0, "gpio112"), + mtk_function(1, "msdc1_dat0"), + mtk_function(2, "jtdi_sel3"), + mtk_function(3, "udi_tdi"), + mtk_function(4, "i2so2_d0"), + mtk_function(5, "ccu1_jtag_tdi"), + mtk_function(6, "ipu_jtag_tdi") + ), + mtk_pin( + 113, "gpio113", + mtk_eint_function(0, 113), + drv_grp4, + mtk_function(0, "gpio113"), + mtk_function(1, "msdc1_dat1"), + mtk_function(2, "jtdo_sel3"), + mtk_function(3, "udi_tdo"), + mtk_function(4, "i2so2_d1"), + mtk_function(5, "ccu1_jtag_tdo"), + mtk_function(6, "ipu_jtag_tdo") + ), + mtk_pin( + 114, "gpio114", + mtk_eint_function(0, 114), + drv_grp4, + mtk_function(0, "gpio114"), + mtk_function(1, "msdc1_dat2"), + mtk_function(2, "jtrstn_sel3"), + mtk_function(3, "udi_ntrst"), + mtk_function(4, "i2so2_d2"), + mtk_function(5, "ccu1_jtag_trst"), + mtk_function(6, "ipu_jtag_trst") + ), + mtk_pin( + 115, "gpio115", + mtk_eint_function(0, 115), + drv_grp4, + mtk_function(0, "gpio115"), + mtk_function(1, "msdc1_dat3"), + mtk_function(4, "i2so2_d3"), + mtk_function(6, "md32_1_gpio2") + ), + mtk_pin( + 116, "gpio116", + mtk_eint_function(0, 116), + drv_grp4, + mtk_function(0, "gpio116"), + mtk_function(1, "msdc0_dat7") + ), + mtk_pin( + 117, "gpio117", + mtk_eint_function(0, 117), + drv_grp4, + mtk_function(0, "gpio117"), + mtk_function(1, "msdc0_dat6") + ), + mtk_pin( + 118, "gpio118", + mtk_eint_function(0, 118), + drv_grp4, + mtk_function(0, "gpio118"), + mtk_function(1, "msdc0_dat5") + ), + mtk_pin( + 119, "gpio119", + mtk_eint_function(0, 119), + drv_grp4, + mtk_function(0, "gpio119"), + mtk_function(1, "msdc0_dat4") + ), + mtk_pin( + 120, "gpio120", + mtk_eint_function(0, 120), + drv_grp4, + mtk_function(0, "gpio120"), + mtk_function(1, "msdc0_rstb") + ), + mtk_pin( + 121, "gpio121", + mtk_eint_function(0, 121), + drv_grp4, + mtk_function(0, "gpio121"), + mtk_function(1, "msdc0_cmd") + ), + mtk_pin( + 122, "gpio122", + mtk_eint_function(0, 122), + drv_grp4, + mtk_function(0, "gpio122"), + mtk_function(1, "msdc0_clk") + ), + mtk_pin( + 123, "gpio123", + mtk_eint_function(0, 123), + drv_grp4, + mtk_function(0, "gpio123"), + mtk_function(1, "msdc0_dat3") + ), + mtk_pin( + 124, "gpio124", + mtk_eint_function(0, 124), + drv_grp4, + mtk_function(0, "gpio124"), + mtk_function(1, "msdc0_dat2") + ), + mtk_pin( + 125, "gpio125", + mtk_eint_function(0, 125), + drv_grp4, + mtk_function(0, "gpio125"), + mtk_function(1, "msdc0_dat1") + ), + mtk_pin( + 126, "gpio126", + mtk_eint_function(0, 126), + drv_grp4, + mtk_function(0, "gpio126"), + mtk_function(1, "msdc0_dat0") + ), + mtk_pin( + 127, "gpio127", + mtk_eint_function(0, 127), + drv_grp4, + mtk_function(0, "gpio127"), + mtk_function(1, "msdc0_dsl") + ), + mtk_pin( + 128, "gpio128", + mtk_eint_function(0, 128), + drv_grp4, + mtk_function(0, "gpio128"), + mtk_function(1, "iddig"), + mtk_function(2, "ucts2"), + mtk_function(3, "utxd5"), + mtk_function(4, "ufs_mphy_scl"), + mtk_function(5, "mbistreaden_trigger"), + mtk_function(6, "md32_1_gpio0"), + mtk_function(7, "scp_scl2") + ), + mtk_pin( + 129, "gpio129", + mtk_eint_function(0, 129), + drv_grp4, + mtk_function(0, "gpio129"), + mtk_function(1, "usb_drvvbus"), + mtk_function(2, "urts2"), + mtk_function(3, "urxd5"), + mtk_function(4, "ufs_mphy_sda"), + mtk_function(5, "mbistwriteen_trigger"), + mtk_function(6, "md32_1_gpio1"), + mtk_function(7, "scp_sda2") + ), + mtk_pin( + 130, "gpio130", + mtk_eint_function(0, 130), + drv_grp4, + mtk_function(0, "gpio130"), + mtk_function(1, "iddig_1p"), + mtk_function(2, "spinor_io2"), + mtk_function(3, "snfi_wp"), + mtk_function(4, "vpu_udi_ntrst") + ), + mtk_pin( + 131, "gpio131", + mtk_eint_function(0, 131), + drv_grp4, + mtk_function(0, "gpio131"), + mtk_function(1, "usb_drvvbus_1p"), + mtk_function(2, "spinor_io3"), + mtk_function(3, "snfi_hold"), + mtk_function(4, "md32_1_jtag_trst"), + mtk_function(5, "scp_jtag0_trstn"), + mtk_function(6, "apu_jtag_trst") + ), + mtk_pin( + 132, "gpio132", + mtk_eint_function(0, 132), + drv_grp4, + mtk_function(0, "gpio132"), + mtk_function(1, "spim0_csb"), + mtk_function(2, "scp_spi0_cs"), + mtk_function(3, "spis0_csb"), + mtk_function(4, "vpu_udi_tms"), + mtk_function(6, "i2so5_d0") + ), + mtk_pin( + 133, "gpio133", + mtk_eint_function(0, 133), + drv_grp4, + mtk_function(0, "gpio133"), + mtk_function(1, "spim0_clk"), + mtk_function(2, "scp_spi0_ck"), + mtk_function(3, "spis0_clk"), + mtk_function(4, "vpu_udi_tck"), + mtk_function(6, "i2so5_bck") + ), + mtk_pin( + 134, "gpio134", + mtk_eint_function(0, 134), + drv_grp4, + mtk_function(0, "gpio134"), + mtk_function(1, "spim0_mo"), + mtk_function(2, "scp_spi0_mo"), + mtk_function(3, "spis0_si"), + mtk_function(4, "vpu_udi_tdo"), + mtk_function(6, "i2so5_ws") + ), + mtk_pin( + 135, "gpio135", + mtk_eint_function(0, 135), + drv_grp4, + mtk_function(0, "gpio135"), + mtk_function(1, "spim0_mi"), + mtk_function(2, "scp_spi0_mi"), + mtk_function(3, "spis0_so"), + mtk_function(4, "vpu_udi_tdi"), + mtk_function(6, "i2so5_mck") + ), + mtk_pin( + 136, "gpio136", + mtk_eint_function(0, 136), + drv_grp4, + mtk_function(0, "gpio136"), + mtk_function(1, "spim1_csb"), + mtk_function(2, "scp_spi1_a_cs"), + mtk_function(3, "spis1_csb"), + mtk_function(4, "md32_1_jtag_tms"), + mtk_function(5, "scp_jtag0_tms"), + mtk_function(6, "apu_jtag_tms"), + mtk_function(7, "dbg_mon_a15") + ), + mtk_pin( + 137, "gpio137", + mtk_eint_function(0, 137), + drv_grp4, + mtk_function(0, "gpio137"), + mtk_function(1, "spim1_clk"), + mtk_function(2, "scp_spi1_a_ck"), + mtk_function(3, "spis1_clk"), + mtk_function(4, "md32_1_jtag_tck"), + mtk_function(5, "scp_jtag0_tck"), + mtk_function(6, "apu_jtag_tck"), + mtk_function(7, "dbg_mon_a14") + ), + mtk_pin( + 138, "gpio138", + mtk_eint_function(0, 138), + drv_grp4, + mtk_function(0, "gpio138"), + mtk_function(1, "spim1_mo"), + mtk_function(2, "scp_spi1_a_mo"), + mtk_function(3, "spis1_si"), + mtk_function(4, "md32_1_jtag_tdo"), + mtk_function(5, "scp_jtag0_tdo"), + mtk_function(6, "apu_jtag_tdo"), + mtk_function(7, "dbg_mon_a16") + ), + mtk_pin( + 139, "gpio139", + mtk_eint_function(0, 139), + drv_grp4, + mtk_function(0, "gpio139"), + mtk_function(1, "spim1_mi"), + mtk_function(2, "scp_spi1_a_mi"), + mtk_function(3, "spis1_so"), + mtk_function(4, "md32_1_jtag_tdi"), + mtk_function(5, "scp_jtag0_tdi"), + mtk_function(6, "apu_jtag_tdi"), + mtk_function(7, "dbg_mon_a17") + ), + mtk_pin( + 140, "gpio140", + mtk_eint_function(0, 140), + drv_grp4, + mtk_function(0, "gpio140"), + mtk_function(1, "spim2_csb"), + mtk_function(2, "spinor_cs"), + mtk_function(3, "snfi_cs"), + mtk_function(4, "dmic3_dat"), + mtk_function(7, "dbg_mon_a11") + ), + mtk_pin( + 141, "gpio141", + mtk_eint_function(0, 141), + drv_grp4, + mtk_function(0, "gpio141"), + mtk_function(1, "spim2_clk"), + mtk_function(2, "spinor_ck"), + mtk_function(3, "snfi_clk"), + mtk_function(4, "dmic3_clk"), + mtk_function(7, "dbg_mon_a10") + ), + mtk_pin( + 142, "gpio142", + mtk_eint_function(0, 142), + drv_grp4, + mtk_function(0, "gpio142"), + mtk_function(1, "spim2_mo"), + mtk_function(2, "spinor_io0"), + mtk_function(3, "snfi_mosi"), + mtk_function(4, "dmic4_dat"), + mtk_function(7, "dbg_mon_a12") + ), + mtk_pin( + 143, "gpio143", + mtk_eint_function(0, 143), + drv_grp4, + mtk_function(0, "gpio143"), + mtk_function(1, "spim2_mi"), + mtk_function(2, "spinor_io1"), + mtk_function(3, "snfi_miso"), + mtk_function(4, "dmic4_clk"), + mtk_function(7, "dbg_mon_a13") + ), + mtk_pin( + 144, "gpio144", + mtk_eint_function(0, 144), + drv_fixed, + mtk_function(0, null) + ), + mtk_pin( + 145, "gpio145", + mtk_eint_function(0, 145), + drv_fixed, + mtk_function(0, null) + ), + mtk_pin( + 146, "gpio146", + mtk_eint_function(0, 146), + drv_fixed, + mtk_function(0, null) + ), + mtk_pin( + 147, "gpio147", + mtk_eint_function(0, 147), + drv_fixed, + mtk_function(0, null) + ), + mtk_pin( + 148, "gpio148", + mtk_eint_function(0, 148), + drv_fixed, + mtk_function(0, null) + ), + mtk_pin( + 149, "gpio149", + mtk_eint_function(0, 149), + drv_fixed, + mtk_function(0, null) + ), + mtk_pin( + 150, "gpio150", + mtk_eint_function(0, 150), + drv_fixed, + mtk_function(0, null) + ), + mtk_pin( + 151, "gpio151", + mtk_eint_function(0, 151), + drv_fixed, + mtk_function(0, null) + ), + mtk_pin( + 152, "gpio152", + mtk_eint_function(0, 152), + drv_fixed, + mtk_function(0, null) + ), + mtk_pin( + 153, "gpio153", + mtk_eint_function(0, 153), + drv_fixed, + mtk_function(0, null) + ), + mtk_pin( + 154, "gpio154", + mtk_eint_function(0, 154), + drv_grp4, + mtk_function(0, null) + ), + mtk_pin( + 155, "gpio155", + mtk_eint_function(0, 155), + drv_fixed, + mtk_function(0, null) + ), + mtk_pin( + 156, "gpio156", + mtk_eint_function(0, 216), + drv_fixed, + mtk_function(0, null) + ), + mtk_pin( + 157, "gpio157", + mtk_eint_function(0, 217), + drv_fixed, + mtk_function(0, null) + ), + mtk_pin( + 158, "gpio158", + mtk_eint_function(0, 218), + drv_fixed, + mtk_function(0, null) + ), + mtk_pin( + 159, "gpio159", + mtk_eint_function(0, 219), + drv_fixed, + mtk_function(0, null) + ), + mtk_pin( + 160, "gpio160", + mtk_eint_function(0, 220), + drv_fixed, + mtk_function(0, null) + ), + mtk_pin( + 161, "gpio161", + mtk_eint_function(0, 221), + drv_fixed, + mtk_function(0, null) + ), + mtk_pin( + 162, "gpio162", + mtk_eint_function(0, 222), + drv_fixed, + mtk_function(0, null) + ), + mtk_pin( + 163, "gpio163", + mtk_eint_function(0, 223), + drv_fixed, + mtk_function(0, null) + ), + mtk_pin( + 164, "gpio164", + mtk_eint_function(0, 224), + drv_fixed, + mtk_function(0, null) + ) +}; + +#endif /* __pinctrl_mtk_mt8195_h */
Pin Controllers (pinctrl)
6cf5e9ef362af824de2e4e8afb78d74537f1e3db
zhiyong tao sean wang sean wang kernel org
drivers
pinctrl
mediatek
pinctrl: bcm: add bcm63xx base code
add a helper for registering bcm63xx pin controllers.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add bcm63xx base code
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['bcm']
['h', 'kconfig', 'c', 'makefile']
4
160
0
--- diff --git a/drivers/pinctrl/bcm/kconfig b/drivers/pinctrl/bcm/kconfig --- a/drivers/pinctrl/bcm/kconfig +++ b/drivers/pinctrl/bcm/kconfig +config pinctrl_bcm63xx + bool + select generic_pinconf + select gpio_regmap + select pinconf + select pinmux + diff --git a/drivers/pinctrl/bcm/makefile b/drivers/pinctrl/bcm/makefile --- a/drivers/pinctrl/bcm/makefile +++ b/drivers/pinctrl/bcm/makefile +obj-$(config_pinctrl_bcm63xx) += pinctrl-bcm63xx.o diff --git a/drivers/pinctrl/bcm/pinctrl-bcm63xx.c b/drivers/pinctrl/bcm/pinctrl-bcm63xx.c --- /dev/null +++ b/drivers/pinctrl/bcm/pinctrl-bcm63xx.c +// spdx-license-identifier: gpl-2.0+ +/* + * driver for bcm63xx gpio unit (pinctrl + gpio) + * + * copyright (c) 2021 alvaro fernandez rojas <noltari@gmail.com> + * copyright (c) 2016 jonas gorski <jonas.gorski@gmail.com> + */ + +#include <linux/gpio/regmap.h> +#include <linux/mfd/syscon.h> +#include <linux/mod_devicetable.h> +#include <linux/of.h> +#include <linux/platform_device.h> + +#include "pinctrl-bcm63xx.h" + +#define bcm63xx_bank_size 4 + +#define bcm63xx_dirout_reg 0x04 +#define bcm63xx_data_reg 0x0c + +static int bcm63xx_reg_mask_xlate(struct gpio_regmap *gpio, + unsigned int base, unsigned int offset, + unsigned int *reg, unsigned int *mask) +{ + unsigned int line = offset % bcm63xx_bank_gpios; + unsigned int stride = offset / bcm63xx_bank_gpios; + + *reg = base - stride * bcm63xx_bank_size; + *mask = bit(line); + + return 0; +} + +static const struct of_device_id bcm63xx_gpio_of_match[] = { + { .compatible = "brcm,bcm6318-gpio", }, + { .compatible = "brcm,bcm6328-gpio", }, + { .compatible = "brcm,bcm6358-gpio", }, + { .compatible = "brcm,bcm6362-gpio", }, + { .compatible = "brcm,bcm6368-gpio", }, + { .compatible = "brcm,bcm63268-gpio", }, + { /* sentinel */ } +}; + +static int bcm63xx_gpio_probe(struct device *dev, struct device_node *node, + const struct bcm63xx_pinctrl_soc *soc, + struct bcm63xx_pinctrl *pc) +{ + struct gpio_regmap_config grc = {0}; + + grc.parent = dev; + grc.fwnode = &node->fwnode; + grc.ngpio = soc->ngpios; + grc.ngpio_per_reg = bcm63xx_bank_gpios; + grc.regmap = pc->regs; + grc.reg_dat_base = bcm63xx_data_reg; + grc.reg_dir_out_base = bcm63xx_dirout_reg; + grc.reg_set_base = bcm63xx_data_reg; + grc.reg_mask_xlate = bcm63xx_reg_mask_xlate; + + return ptr_err_or_zero(devm_gpio_regmap_register(dev, &grc)); +} + +int bcm63xx_pinctrl_probe(struct platform_device *pdev, + const struct bcm63xx_pinctrl_soc *soc, + void *driver_data) +{ + struct device *dev = &pdev->dev; + struct bcm63xx_pinctrl *pc; + struct device_node *node; + int err; + + pc = devm_kzalloc(dev, sizeof(*pc), gfp_kernel); + if (!pc) + return -enomem; + + platform_set_drvdata(pdev, pc); + + pc->dev = dev; + pc->driver_data = driver_data; + + pc->regs = syscon_node_to_regmap(dev->parent->of_node); + if (is_err(pc->regs)) + return ptr_err(pc->regs); + + pc->pctl_desc.name = dev_name(dev); + pc->pctl_desc.pins = soc->pins; + pc->pctl_desc.npins = soc->npins; + pc->pctl_desc.pctlops = soc->pctl_ops; + pc->pctl_desc.pmxops = soc->pmx_ops; + pc->pctl_desc.owner = this_module; + + pc->pctl_dev = devm_pinctrl_register(dev, &pc->pctl_desc, pc); + if (is_err(pc->pctl_dev)) + return ptr_err(pc->pctl_dev); + + for_each_child_of_node(dev->parent->of_node, node) { + if (of_match_node(bcm63xx_gpio_of_match, node)) { + err = bcm63xx_gpio_probe(dev, node, soc, pc); + if (err) { + dev_err(dev, "could not add gpio chip "); + of_node_put(node); + return err; + } + } + } + + return 0; +} diff --git a/drivers/pinctrl/bcm/pinctrl-bcm63xx.h b/drivers/pinctrl/bcm/pinctrl-bcm63xx.h --- /dev/null +++ b/drivers/pinctrl/bcm/pinctrl-bcm63xx.h +// spdx-license-identifier: gpl-2.0+ +/* + * copyright (c) 2021 alvaro fernandez rojas <noltari@gmail.com> + * copyright (c) 2016 jonas gorski <jonas.gorski@gmail.com> + */ + +#ifndef __pinctrl_bcm63xx_h__ +#define __pinctrl_bcm63xx_h__ + +#include <linux/pinctrl/pinctrl.h> + +#define bcm63xx_bank_gpios 32 + +struct bcm63xx_pinctrl_soc { + struct pinctrl_ops *pctl_ops; + struct pinmux_ops *pmx_ops; + + const struct pinctrl_pin_desc *pins; + unsigned npins; + + unsigned int ngpios; +}; + +struct bcm63xx_pinctrl { + struct device *dev; + struct regmap *regs; + + struct pinctrl_desc pctl_desc; + struct pinctrl_dev *pctl_dev; + + void *driver_data; +}; + +static inline unsigned int bcm63xx_bank_pin(unsigned int pin) +{ + return pin % bcm63xx_bank_gpios; +} + +int bcm63xx_pinctrl_probe(struct platform_device *pdev, + const struct bcm63xx_pinctrl_soc *soc, + void *driver_data); + +#endif /* __pinctrl_bcm63xx_h__ */
Pin Controllers (pinctrl)
132f95016db0a0a0659e99b471a7d3fd0c60f961
lvaro fern ndez rojas
drivers
pinctrl
bcm
pinctrl: pinmux: add pinmux-select debugfs file
add "pinmux-select" to debugfs which will activate a pin function for a given pin group:
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add pinmux-select debugfs file
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['pinmux']
['c']
1
102
0
--- diff --git a/drivers/pinctrl/pinmux.c b/drivers/pinctrl/pinmux.c --- a/drivers/pinctrl/pinmux.c +++ b/drivers/pinctrl/pinmux.c +#include <linux/ctype.h> +#define pinmux_select_max 128 +static ssize_t pinmux_select(struct file *file, const char __user *user_buf, + size_t len, loff_t *ppos) +{ + struct seq_file *sfile = file->private_data; + struct pinctrl_dev *pctldev = sfile->private; + const struct pinmux_ops *pmxops = pctldev->desc->pmxops; + const char *const *groups; + char *buf, *gname, *fname; + unsigned int num_groups; + int fsel, gsel, ret; + + if (len > pinmux_select_max) + return -enomem; + + buf = kzalloc(pinmux_select_max, gfp_kernel); + if (!buf) + return -enomem; + + ret = strncpy_from_user(buf, user_buf, pinmux_select_max); + if (ret < 0) + goto exit_free_buf; + buf[len-1] = ''; + + /* remove leading and trailing spaces of input buffer */ + gname = strstrip(buf); + if (*gname == '') { + ret = -einval; + goto exit_free_buf; + } + + /* find a separator which is a spacelike character */ + for (fname = gname; !isspace(*fname); fname++) { + if (*fname == '') { + ret = -einval; + goto exit_free_buf; + } + } + *fname = ''; + + /* drop extra spaces between function and group names */ + fname = skip_spaces(fname + 1); + if (*fname == '') { + ret = -einval; + goto exit_free_buf; + } + + ret = pinmux_func_name_to_selector(pctldev, fname); + if (ret < 0) { + dev_err(pctldev->dev, "invalid function %s in map table ", fname); + goto exit_free_buf; + } + fsel = ret; + + ret = pmxops->get_function_groups(pctldev, fsel, &groups, &num_groups); + if (ret) { + dev_err(pctldev->dev, "no groups for function %d (%s)", fsel, fname); + goto exit_free_buf; + } + + ret = match_string(groups, num_groups, gname); + if (ret < 0) { + dev_err(pctldev->dev, "invalid group %s", gname); + goto exit_free_buf; + } + + ret = pinctrl_get_group_selector(pctldev, gname); + if (ret < 0) { + dev_err(pctldev->dev, "failed to get group selector for %s", gname); + goto exit_free_buf; + } + gsel = ret; + + ret = pmxops->set_mux(pctldev, fsel, gsel); + if (ret) { + dev_err(pctldev->dev, "set_mux() failed: %d", ret); + goto exit_free_buf; + } + ret = len; + +exit_free_buf: + kfree(buf); + + return ret; +} + +static int pinmux_select_open(struct inode *inode, struct file *file) +{ + return single_open(file, null, inode->i_private); +} + +static const struct file_operations pinmux_select_ops = { + .owner = this_module, + .open = pinmux_select_open, + .write = pinmux_select, + .llseek = no_llseek, + .release = single_release, +}; + + debugfs_create_file("pinmux-select", 0200, + devroot, pctldev, &pinmux_select_ops);
Pin Controllers (pinctrl)
6199f6becc869d30ca9394ca0f7a484bf9d598eb
drew fustini
drivers
pinctrl
pinctrl: qcom-pmic-gpio: add support for pm8008
add support for the two gpios present on qualcomm technologies, inc. pm8008.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for pm8008
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['qcom-pmic-gpio']
['c']
1
1
0
--- diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c --- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c +++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c + { .compatible = "qcom,pm8008-gpio", .data = (void *) 2 },
Pin Controllers (pinctrl)
ea119e5a482aaf08dd22cf53400c29cb16af8416
guru das srinagesh bjorn andersson bjorn andersson linaro org
drivers
pinctrl
qcom
pinctrl: qcom: sc8180x: add acpi probe support
it adds acpi probe support for pinctrl-sc8180x driver. we have one problem with acpi table, i.e. gio0 (tlmm) block has one single memory resource to cover 3 tiles defined by sc8180x. to follow the hardware layout of 3 tiles which is already supported dt probe, it adds one function to replace the original single memory resource with 3 named ones for tiles. with that, we can map memory for acpi in the same way as dt.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add acpi probe support
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['qcom', 'sc8180x']
['kconfig', 'c']
2
122
3
--- diff --git a/drivers/pinctrl/qcom/kconfig b/drivers/pinctrl/qcom/kconfig --- a/drivers/pinctrl/qcom/kconfig +++ b/drivers/pinctrl/qcom/kconfig - depends on gpiolib && of + depends on gpiolib && (of || acpi) diff --git a/drivers/pinctrl/qcom/pinctrl-sc8180x.c b/drivers/pinctrl/qcom/pinctrl-sc8180x.c --- a/drivers/pinctrl/qcom/pinctrl-sc8180x.c +++ b/drivers/pinctrl/qcom/pinctrl-sc8180x.c +/* + * acpi dsdt has one single memory resource for tlmm. the offsets below are + * used to locate different tiles for acpi probe. + */ +struct tile_info { + u32 offset; + u32 size; +}; + +static const struct tile_info sc8180x_tile_info[] = { + { 0x00d00000, 0x00300000, }, + { 0x00500000, 0x00700000, }, + { 0x00100000, 0x00300000, }, +}; + +static const int sc8180x_acpi_reserved_gpios[] = { + 0, 1, 2, 3, + 47, 48, 49, 50, + 126, 127, 128, 129, + -1 /* terminator */ +}; + +static const struct msm_pinctrl_soc_data sc8180x_acpi_pinctrl = { + .tiles = sc8180x_tiles, + .ntiles = array_size(sc8180x_tiles), + .pins = sc8180x_pins, + .npins = array_size(sc8180x_pins), + .groups = sc8180x_groups, + .ngroups = array_size(sc8180x_groups), + .reserved_gpios = sc8180x_acpi_reserved_gpios, + .ngpios = 190, +}; + +/* + * acpi dsdt has one single memory resource for tlmm, which voilates the + * hardware layout of 3 sepearte tiles. let's split the memory resource into + * 3 named ones, so that msm_pinctrl_probe() can map memory for acpi in the + * same way as for dt probe. + */ +static int sc8180x_pinctrl_add_tile_resources(struct platform_device *pdev) +{ + int nres_num = pdev->num_resources + array_size(sc8180x_tiles) - 1; + struct resource *mres, *nres, *res; + int i, ret; + + /* + * dt already has tiles defined properly, so nothing needs to be done + * for dt probe. + */ + if (pdev->dev.of_node) + return 0; + + /* allocate for new resources */ + nres = devm_kzalloc(&pdev->dev, sizeof(*nres) * nres_num, gfp_kernel); + if (!nres) + return -enomem; + + res = nres; + + for (i = 0; i < pdev->num_resources; i++) { + struct resource *r = &pdev->resource[i]; + + /* save memory resource and copy others */ + if (resource_type(r) == ioresource_mem) + mres = r; + else + *res++ = *r; + } + + /* append tile memory resources */ + for (i = 0; i < array_size(sc8180x_tiles); i++, res++) { + const struct tile_info *info = &sc8180x_tile_info[i]; + + res->start = mres->start + info->offset; + res->end = mres->start + info->offset + info->size - 1; + res->flags = mres->flags; + res->name = sc8180x_tiles[i]; + + /* add new mem to resource tree */ + insert_resource(mres->parent, res); + } + + /* remove old mem from resource tree */ + remove_resource(mres); + + /* free old resources and install new ones */ + ret = platform_device_add_resources(pdev, nres, nres_num); + if (ret) { + dev_err(&pdev->dev, "failed to add new resources: %d ", ret); + return ret; + } + + return 0; +} + - return msm_pinctrl_probe(pdev, &sc8180x_pinctrl); + const struct msm_pinctrl_soc_data *soc_data; + int ret; + + soc_data = device_get_match_data(&pdev->dev); + if (!soc_data) + return -einval; + + ret = sc8180x_pinctrl_add_tile_resources(pdev); + if (ret) + return ret; + + return msm_pinctrl_probe(pdev, soc_data); +static const struct acpi_device_id sc8180x_pinctrl_acpi_match[] = { + { + .id = "qcom040d", + .driver_data = (kernel_ulong_t) &sc8180x_acpi_pinctrl, + }, + { } +}; +module_device_table(acpi, sc8180x_pinctrl_acpi_match); + - { .compatible = "qcom,sc8180x-tlmm", }, + { + .compatible = "qcom,sc8180x-tlmm", + .data = &sc8180x_pinctrl, + }, + .acpi_match_table = sc8180x_pinctrl_acpi_match,
Pin Controllers (pinctrl)
6d8d67988b1a2db04d9d6083a729e8abfeb725d7
shawn guo bjorn andersson bjorn andersson linaro org andy shevchenko andriy shevchenko intel com
drivers
pinctrl
qcom
pinctrl: qcom: spmi-gpio: add support for pm8350 and friends
add support for the pm8350, pm8350b, pm8350c, pmk8350, pmr735a and pmr735b gpio support to the qualcomm pmic gpio driver.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for pm8350 and friends
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['qcom', 'spmi-gpio']
['c']
1
6
0
--- diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c --- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c +++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c + { .compatible = "qcom,pm8350-gpio", .data = (void *) 10 }, + { .compatible = "qcom,pm8350b-gpio", .data = (void *) 8 }, + { .compatible = "qcom,pm8350c-gpio", .data = (void *) 9 }, + { .compatible = "qcom,pmk8350-gpio", .data = (void *) 4 }, + { .compatible = "qcom,pmr735a-gpio", .data = (void *) 4 }, + { .compatible = "qcom,pmr735b-gpio", .data = (void *) 4 },
Pin Controllers (pinctrl)
57c0a4f0a071be916e534d6f6e52dcf0cd8df8ba
vinod koul bjorn andersson bjorn andersson linaro org
drivers
pinctrl
qcom
pinctrl: renesas: add support for r-car socs with pull-down only pins
currently, the common r-car bias handling supports pin controllers with either: 1. separate pin pull-enable (puen) and pin pull-up/down control (pud) registers, for controlling both pin pull-up and pin pull-down, 2. a single pin pull-up control register (pupr), for controlling pin pull-up.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for r-car socs with pull-down only pins
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['renesas']
['h', 'c']
2
34
19
--- diff --git a/drivers/pinctrl/renesas/pinctrl.c b/drivers/pinctrl/renesas/pinctrl.c --- a/drivers/pinctrl/renesas/pinctrl.c +++ b/drivers/pinctrl/renesas/pinctrl.c - for (i = 0; pfc->info->bias_regs[i].puen; i++) { + for (i = 0; pfc->info->bias_regs[i].puen || pfc->info->bias_regs[i].pud; i++) { - if (!(sh_pfc_read(pfc, reg->puen) & bit(bit))) - return pin_config_bias_disable; - else if (!reg->pud || (sh_pfc_read(pfc, reg->pud) & bit(bit))) - return pin_config_bias_pull_up; - else - return pin_config_bias_pull_down; + if (reg->puen) { + if (!(sh_pfc_read(pfc, reg->puen) & bit(bit))) + return pin_config_bias_disable; + else if (!reg->pud || (sh_pfc_read(pfc, reg->pud) & bit(bit))) + return pin_config_bias_pull_up; + else + return pin_config_bias_pull_down; + } else { + if (sh_pfc_read(pfc, reg->pud) & bit(bit)) + return pin_config_bias_pull_down; + else + return pin_config_bias_disable; + } - enable = sh_pfc_read(pfc, reg->puen) & ~bit(bit); - if (bias != pin_config_bias_disable) - enable |= bit(bit); + if (reg->puen) { + enable = sh_pfc_read(pfc, reg->puen) & ~bit(bit); + if (bias != pin_config_bias_disable) + enable |= bit(bit); - if (reg->pud) { - updown = sh_pfc_read(pfc, reg->pud) & ~bit(bit); - if (bias == pin_config_bias_pull_up) - updown |= bit(bit); + if (reg->pud) { + updown = sh_pfc_read(pfc, reg->pud) & ~bit(bit); + if (bias == pin_config_bias_pull_up) + updown |= bit(bit); - sh_pfc_write(pfc, reg->pud, updown); - } + sh_pfc_write(pfc, reg->pud, updown); + } - sh_pfc_write(pfc, reg->puen, enable); + sh_pfc_write(pfc, reg->puen, enable); + } else { + enable = sh_pfc_read(pfc, reg->pud) & ~bit(bit); + if (bias == pin_config_bias_pull_down) + enable |= bit(bit); + + sh_pfc_write(pfc, reg->pud, enable); + } diff --git a/drivers/pinctrl/renesas/sh_pfc.h b/drivers/pinctrl/renesas/sh_pfc.h --- a/drivers/pinctrl/renesas/sh_pfc.h +++ b/drivers/pinctrl/renesas/sh_pfc.h -struct pinmux_bias_reg { +struct pinmux_bias_reg { /* at least one of puen/pud must exist */ - u32 pud; /* pull-up/down control register (optional) */ + u32 pud; /* pull-up/down or pull-down control register */
Pin Controllers (pinctrl)
1d3928a3e69cd6ec0ea837d3eeccb2ff604b5072
geert uytterhoeven
drivers
pinctrl
renesas
pinctrl: rockchip: add support for rk3568
rk3568 socs have 5 gpio controllers, each gpio has 32 pins. gpio supports set iomux, pull, drive strength and schmitt.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for rk3568
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['rockchip']
['c']
1
290
2
--- diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c --- a/drivers/pinctrl/pinctrl-rockchip.c +++ b/drivers/pinctrl/pinctrl-rockchip.c + rk3568, + +/** + * generate a bitmask for setting a value (v) with a write mask bit in hiword + * register 31:16 area. + */ +#define write_mask_val(h, l, v) \ + (genmask(((h) + 16), ((l) + 16)) | (((v) << (l)) & genmask((h), (l)))) + +#define pin_bank_mux_route_flags(id, pin, func, reg, val, flag) \ + { \ + .bank_num = id, \ + .pin = pin, \ + .func = func, \ + .route_offset = reg, \ + .route_val = val, \ + .route_location = flag, \ + } + +#define rk_muxroute_same(id, pin, func, reg, val) \ + pin_bank_mux_route_flags(id, pin, func, reg, val, rockchip_route_same) + +#define rk_muxroute_grf(id, pin, func, reg, val) \ + pin_bank_mux_route_flags(id, pin, func, reg, val, rockchip_route_grf) + +#define rk_muxroute_pmu(id, pin, func, reg, val) \ + pin_bank_mux_route_flags(id, pin, func, reg, val, rockchip_route_pmu) + +static struct rockchip_mux_route_data rk3568_mux_route_data[] = { + rk_muxroute_pmu(0, rk_pb7, 1, 0x0110, write_mask_val(1, 0, 0)), /* pwm0 io mux m0 */ + rk_muxroute_pmu(0, rk_pc7, 2, 0x0110, write_mask_val(1, 0, 1)), /* pwm0 io mux m1 */ + rk_muxroute_pmu(0, rk_pc0, 1, 0x0110, write_mask_val(3, 2, 0)), /* pwm1 io mux m0 */ + rk_muxroute_pmu(0, rk_pb5, 4, 0x0110, write_mask_val(3, 2, 1)), /* pwm1 io mux m1 */ + rk_muxroute_pmu(0, rk_pc1, 1, 0x0110, write_mask_val(5, 4, 0)), /* pwm2 io mux m0 */ + rk_muxroute_pmu(0, rk_pb6, 4, 0x0110, write_mask_val(5, 4, 1)), /* pwm2 io mux m1 */ + rk_muxroute_pmu(0, rk_pb3, 2, 0x0300, write_mask_val(0, 0, 0)), /* can0 io mux m0 */ + rk_muxroute_grf(2, rk_pa1, 4, 0x0300, write_mask_val(0, 0, 1)), /* can0 io mux m1 */ + rk_muxroute_grf(1, rk_pa1, 3, 0x0300, write_mask_val(2, 2, 0)), /* can1 io mux m0 */ + rk_muxroute_grf(4, rk_pc3, 3, 0x0300, write_mask_val(2, 2, 1)), /* can1 io mux m1 */ + rk_muxroute_grf(4, rk_pb5, 3, 0x0300, write_mask_val(4, 4, 0)), /* can2 io mux m0 */ + rk_muxroute_grf(2, rk_pb2, 4, 0x0300, write_mask_val(4, 4, 1)), /* can2 io mux m1 */ + rk_muxroute_grf(4, rk_pc4, 1, 0x0300, write_mask_val(6, 6, 0)), /* hpdin io mux m0 */ + rk_muxroute_pmu(0, rk_pc2, 2, 0x0300, write_mask_val(6, 6, 1)), /* hpdin io mux m1 */ + rk_muxroute_grf(3, rk_pb1, 3, 0x0300, write_mask_val(8, 8, 0)), /* gmac1 io mux m0 */ + rk_muxroute_grf(4, rk_pa7, 3, 0x0300, write_mask_val(8, 8, 1)), /* gmac1 io mux m1 */ + rk_muxroute_grf(4, rk_pd1, 1, 0x0300, write_mask_val(10, 10, 0)), /* hdmitx io mux m0 */ + rk_muxroute_pmu(0, rk_pc7, 1, 0x0300, write_mask_val(10, 10, 1)), /* hdmitx io mux m1 */ + rk_muxroute_pmu(0, rk_pb6, 1, 0x0300, write_mask_val(14, 14, 0)), /* i2c2 io mux m0 */ + rk_muxroute_grf(4, rk_pb4, 1, 0x0300, write_mask_val(14, 14, 1)), /* i2c2 io mux m1 */ + rk_muxroute_grf(1, rk_pa0, 1, 0x0304, write_mask_val(0, 0, 0)), /* i2c3 io mux m0 */ + rk_muxroute_grf(3, rk_pb6, 4, 0x0304, write_mask_val(0, 0, 1)), /* i2c3 io mux m1 */ + rk_muxroute_grf(4, rk_pb2, 1, 0x0304, write_mask_val(2, 2, 0)), /* i2c4 io mux m0 */ + rk_muxroute_grf(2, rk_pb1, 2, 0x0304, write_mask_val(2, 2, 1)), /* i2c4 io mux m1 */ + rk_muxroute_grf(3, rk_pb4, 4, 0x0304, write_mask_val(4, 4, 0)), /* i2c5 io mux m0 */ + rk_muxroute_grf(4, rk_pd0, 2, 0x0304, write_mask_val(4, 4, 1)), /* i2c5 io mux m1 */ + rk_muxroute_grf(3, rk_pb1, 5, 0x0304, write_mask_val(14, 14, 0)), /* pwm8 io mux m0 */ + rk_muxroute_grf(1, rk_pd5, 4, 0x0304, write_mask_val(14, 14, 1)), /* pwm8 io mux m1 */ + rk_muxroute_grf(3, rk_pb2, 5, 0x0308, write_mask_val(0, 0, 0)), /* pwm9 io mux m0 */ + rk_muxroute_grf(1, rk_pd6, 4, 0x0308, write_mask_val(0, 0, 1)), /* pwm9 io mux m1 */ + rk_muxroute_grf(3, rk_pb5, 5, 0x0308, write_mask_val(2, 2, 0)), /* pwm10 io mux m0 */ + rk_muxroute_grf(2, rk_pa1, 2, 0x0308, write_mask_val(2, 2, 1)), /* pwm10 io mux m1 */ + rk_muxroute_grf(3, rk_pb6, 5, 0x0308, write_mask_val(4, 4, 0)), /* pwm11 io mux m0 */ + rk_muxroute_grf(4, rk_pc0, 3, 0x0308, write_mask_val(4, 4, 1)), /* pwm11 io mux m1 */ + rk_muxroute_grf(3, rk_pb7, 2, 0x0308, write_mask_val(6, 6, 0)), /* pwm12 io mux m0 */ + rk_muxroute_grf(4, rk_pc5, 1, 0x0308, write_mask_val(6, 6, 1)), /* pwm12 io mux m1 */ + rk_muxroute_grf(3, rk_pc0, 2, 0x0308, write_mask_val(8, 8, 0)), /* pwm13 io mux m0 */ + rk_muxroute_grf(4, rk_pc6, 1, 0x0308, write_mask_val(8, 8, 1)), /* pwm13 io mux m1 */ + rk_muxroute_grf(3, rk_pc4, 1, 0x0308, write_mask_val(10, 10, 0)), /* pwm14 io mux m0 */ + rk_muxroute_grf(4, rk_pc2, 1, 0x0308, write_mask_val(10, 10, 1)), /* pwm14 io mux m1 */ + rk_muxroute_grf(3, rk_pc5, 1, 0x0308, write_mask_val(12, 12, 0)), /* pwm15 io mux m0 */ + rk_muxroute_grf(4, rk_pc3, 1, 0x0308, write_mask_val(12, 12, 1)), /* pwm15 io mux m1 */ + rk_muxroute_grf(3, rk_pd2, 3, 0x0308, write_mask_val(14, 14, 0)), /* sdmmc2 io mux m0 */ + rk_muxroute_grf(3, rk_pa5, 5, 0x0308, write_mask_val(14, 14, 1)), /* sdmmc2 io mux m1 */ + rk_muxroute_pmu(0, rk_pb5, 2, 0x030c, write_mask_val(0, 0, 0)), /* spi0 io mux m0 */ + rk_muxroute_grf(2, rk_pd3, 3, 0x030c, write_mask_val(0, 0, 1)), /* spi0 io mux m1 */ + rk_muxroute_grf(2, rk_pb5, 3, 0x030c, write_mask_val(2, 2, 0)), /* spi1 io mux m0 */ + rk_muxroute_grf(3, rk_pc3, 3, 0x030c, write_mask_val(2, 2, 1)), /* spi1 io mux m1 */ + rk_muxroute_grf(2, rk_pc1, 4, 0x030c, write_mask_val(4, 4, 0)), /* spi2 io mux m0 */ + rk_muxroute_grf(3, rk_pa0, 3, 0x030c, write_mask_val(4, 4, 1)), /* spi2 io mux m1 */ + rk_muxroute_grf(4, rk_pb3, 4, 0x030c, write_mask_val(6, 6, 0)), /* spi3 io mux m0 */ + rk_muxroute_grf(4, rk_pc2, 2, 0x030c, write_mask_val(6, 6, 1)), /* spi3 io mux m1 */ + rk_muxroute_grf(2, rk_pb4, 2, 0x030c, write_mask_val(8, 8, 0)), /* uart1 io mux m0 */ + rk_muxroute_pmu(0, rk_pd1, 1, 0x030c, write_mask_val(8, 8, 1)), /* uart1 io mux m1 */ + rk_muxroute_pmu(0, rk_pd1, 1, 0x030c, write_mask_val(10, 10, 0)), /* uart2 io mux m0 */ + rk_muxroute_grf(1, rk_pd5, 2, 0x030c, write_mask_val(10, 10, 1)), /* uart2 io mux m1 */ + rk_muxroute_grf(1, rk_pa1, 2, 0x030c, write_mask_val(12, 12, 0)), /* uart3 io mux m0 */ + rk_muxroute_grf(3, rk_pb7, 4, 0x030c, write_mask_val(12, 12, 1)), /* uart3 io mux m1 */ + rk_muxroute_grf(1, rk_pa6, 2, 0x030c, write_mask_val(14, 14, 0)), /* uart4 io mux m0 */ + rk_muxroute_grf(3, rk_pb2, 4, 0x030c, write_mask_val(14, 14, 1)), /* uart4 io mux m1 */ + rk_muxroute_grf(2, rk_pa2, 3, 0x0310, write_mask_val(0, 0, 0)), /* uart5 io mux m0 */ + rk_muxroute_grf(3, rk_pc2, 4, 0x0310, write_mask_val(0, 0, 1)), /* uart5 io mux m1 */ + rk_muxroute_grf(2, rk_pa4, 3, 0x0310, write_mask_val(2, 2, 0)), /* uart6 io mux m0 */ + rk_muxroute_grf(1, rk_pd5, 3, 0x0310, write_mask_val(2, 2, 1)), /* uart6 io mux m1 */ + rk_muxroute_grf(2, rk_pa6, 3, 0x0310, write_mask_val(5, 4, 0)), /* uart7 io mux m0 */ + rk_muxroute_grf(3, rk_pc4, 4, 0x0310, write_mask_val(5, 4, 1)), /* uart7 io mux m1 */ + rk_muxroute_grf(4, rk_pa2, 4, 0x0310, write_mask_val(5, 4, 2)), /* uart7 io mux m2 */ + rk_muxroute_grf(2, rk_pc5, 3, 0x0310, write_mask_val(6, 6, 0)), /* uart8 io mux m0 */ + rk_muxroute_grf(2, rk_pd7, 4, 0x0310, write_mask_val(6, 6, 1)), /* uart8 io mux m1 */ + rk_muxroute_grf(2, rk_pb0, 3, 0x0310, write_mask_val(9, 8, 0)), /* uart9 io mux m0 */ + rk_muxroute_grf(4, rk_pc5, 4, 0x0310, write_mask_val(9, 8, 1)), /* uart9 io mux m1 */ + rk_muxroute_grf(4, rk_pa4, 4, 0x0310, write_mask_val(9, 8, 2)), /* uart9 io mux m2 */ + rk_muxroute_grf(1, rk_pa2, 1, 0x0310, write_mask_val(11, 10, 0)), /* i2s1 io mux m0 */ + rk_muxroute_grf(3, rk_pc6, 4, 0x0310, write_mask_val(11, 10, 1)), /* i2s1 io mux m1 */ + rk_muxroute_grf(2, rk_pd0, 5, 0x0310, write_mask_val(11, 10, 2)), /* i2s1 io mux m2 */ + rk_muxroute_grf(2, rk_pc1, 1, 0x0310, write_mask_val(12, 12, 0)), /* i2s2 io mux m0 */ + rk_muxroute_grf(4, rk_pb6, 5, 0x0310, write_mask_val(12, 12, 1)), /* i2s2 io mux m1 */ + rk_muxroute_grf(3, rk_pa2, 4, 0x0310, write_mask_val(14, 14, 0)), /* i2s3 io mux m0 */ + rk_muxroute_grf(4, rk_pc2, 5, 0x0310, write_mask_val(14, 14, 1)), /* i2s3 io mux m1 */ + rk_muxroute_grf(1, rk_pa4, 3, 0x0314, write_mask_val(1, 0, 0)), /* pdm io mux m0 */ + rk_muxroute_grf(1, rk_pa6, 3, 0x0314, write_mask_val(1, 0, 0)), /* pdm io mux m0 */ + rk_muxroute_grf(3, rk_pd6, 5, 0x0314, write_mask_val(1, 0, 1)), /* pdm io mux m1 */ + rk_muxroute_grf(4, rk_pa0, 4, 0x0314, write_mask_val(1, 0, 1)), /* pdm io mux m1 */ + rk_muxroute_grf(3, rk_pc4, 5, 0x0314, write_mask_val(1, 0, 2)), /* pdm io mux m2 */ + rk_muxroute_pmu(0, rk_pa5, 3, 0x0314, write_mask_val(3, 2, 0)), /* pcie20 io mux m0 */ + rk_muxroute_grf(2, rk_pd0, 4, 0x0314, write_mask_val(3, 2, 1)), /* pcie20 io mux m1 */ + rk_muxroute_grf(1, rk_pb0, 4, 0x0314, write_mask_val(3, 2, 2)), /* pcie20 io mux m2 */ + rk_muxroute_pmu(0, rk_pa4, 3, 0x0314, write_mask_val(5, 4, 0)), /* pcie30x1 io mux m0 */ + rk_muxroute_grf(2, rk_pd2, 4, 0x0314, write_mask_val(5, 4, 1)), /* pcie30x1 io mux m1 */ + rk_muxroute_grf(1, rk_pa5, 4, 0x0314, write_mask_val(5, 4, 2)), /* pcie30x1 io mux m2 */ + rk_muxroute_pmu(0, rk_pa6, 2, 0x0314, write_mask_val(7, 6, 0)), /* pcie30x2 io mux m0 */ + rk_muxroute_grf(2, rk_pd4, 4, 0x0314, write_mask_val(7, 6, 1)), /* pcie30x2 io mux m1 */ + rk_muxroute_grf(4, rk_pc2, 4, 0x0314, write_mask_val(7, 6, 2)), /* pcie30x2 io mux m2 */ +}; + +#define rk3568_pull_pmu_offset 0x20 +#define rk3568_pull_grf_offset 0x80 +#define rk3568_pull_bits_per_pin 2 +#define rk3568_pull_pins_per_reg 8 +#define rk3568_pull_bank_stride 0x10 + +static void rk3568_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, + int pin_num, struct regmap **regmap, + int *reg, u8 *bit) +{ + struct rockchip_pinctrl *info = bank->drvdata; + + if (bank->bank_num == 0) { + *regmap = info->regmap_pmu; + *reg = rk3568_pull_pmu_offset; + *reg += bank->bank_num * rk3568_pull_bank_stride; + *reg += ((pin_num / rk3568_pull_pins_per_reg) * 4); + + *bit = pin_num % rk3568_pull_pins_per_reg; + *bit *= rk3568_pull_bits_per_pin; + } else { + *regmap = info->regmap_base; + *reg = rk3568_pull_grf_offset; + *reg += (bank->bank_num - 1) * rk3568_pull_bank_stride; + *reg += ((pin_num / rk3568_pull_pins_per_reg) * 4); + + *bit = (pin_num % rk3568_pull_pins_per_reg); + *bit *= rk3568_pull_bits_per_pin; + } +} + +#define rk3568_drv_pmu_offset 0x70 +#define rk3568_drv_grf_offset 0x200 +#define rk3568_drv_bits_per_pin 8 +#define rk3568_drv_pins_per_reg 2 +#define rk3568_drv_bank_stride 0x40 + +static void rk3568_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank, + int pin_num, struct regmap **regmap, + int *reg, u8 *bit) +{ + struct rockchip_pinctrl *info = bank->drvdata; + + /* the first 32 pins of the first bank are located in pmu */ + if (bank->bank_num == 0) { + *regmap = info->regmap_pmu; + *reg = rk3568_drv_pmu_offset; + *reg += ((pin_num / rk3568_drv_pins_per_reg) * 4); + + *bit = pin_num % rk3568_drv_pins_per_reg; + *bit *= rk3568_drv_bits_per_pin; + } else { + *regmap = info->regmap_base; + *reg = rk3568_drv_grf_offset; + *reg += (bank->bank_num - 1) * rk3568_drv_bank_stride; + *reg += ((pin_num / rk3568_drv_pins_per_reg) * 4); + + *bit = (pin_num % rk3568_drv_pins_per_reg); + *bit *= rk3568_drv_bits_per_pin; + } +} + + if (ctrl->type == rk3568) { + rmask_bits = rk3568_drv_bits_per_pin; + ret = (1 << (strength + 1)) - 1; + goto config; + } +config: + case rk3568: + /* + * in the trm, pull-up being 1 for everything except the gpio0_d0-d6, + * where that pull up value becomes 3. + */ + if (ctrl->type == rk3568 && bank->bank_num == 0 && pin_num >= 27 && pin_num <= 30) { + if (ret == 1) + ret = 3; + } +#define rk3568_schmitt_bits_per_pin 2 +#define rk3568_schmitt_pins_per_reg 8 +#define rk3568_schmitt_bank_stride 0x10 +#define rk3568_schmitt_grf_offset 0xc0 +#define rk3568_schmitt_pmugrf_offset 0x30 + +static int rk3568_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank, + int pin_num, + struct regmap **regmap, + int *reg, u8 *bit) +{ + struct rockchip_pinctrl *info = bank->drvdata; + + if (bank->bank_num == 0) { + *regmap = info->regmap_pmu; + *reg = rk3568_schmitt_pmugrf_offset; + } else { + *regmap = info->regmap_base; + *reg = rk3568_schmitt_grf_offset; + *reg += (bank->bank_num - 1) * rk3568_schmitt_bank_stride; + } + + *reg += ((pin_num / rk3568_schmitt_pins_per_reg) * 4); + *bit = pin_num % rk3568_schmitt_pins_per_reg; + *bit *= rk3568_schmitt_bits_per_pin; + + return 0; +} + + switch (ctrl->type) { + case rk3568: + return data & ((1 << rk3568_schmitt_bits_per_pin) - 1); + default: + break; + } + - data = bit(bit + 16) | (enable << bit); - rmask = bit(bit + 16) | bit(bit); + switch (ctrl->type) { + case rk3568: + data = ((1 << rk3568_schmitt_bits_per_pin) - 1) << (bit + 16); + rmask = data | (data >> 16); + data |= ((enable ? 0x2 : 0x1) << bit); + break; + default: + data = bit(bit + 16) | (enable << bit); + rmask = bit(bit + 16) | bit(bit); + break; + } + case rk3568: +static struct rockchip_pin_bank rk3568_pin_banks[] = { + pin_bank_iomux_flags(0, 32, "gpio0", iomux_source_pmu | iomux_width_4bit, + iomux_source_pmu | iomux_width_4bit, + iomux_source_pmu | iomux_width_4bit, + iomux_source_pmu | iomux_width_4bit), + pin_bank_iomux_flags(1, 32, "gpio1", iomux_width_4bit, + iomux_width_4bit, + iomux_width_4bit, + iomux_width_4bit), + pin_bank_iomux_flags(2, 32, "gpio2", iomux_width_4bit, + iomux_width_4bit, + iomux_width_4bit, + iomux_width_4bit), + pin_bank_iomux_flags(3, 32, "gpio3", iomux_width_4bit, + iomux_width_4bit, + iomux_width_4bit, + iomux_width_4bit), + pin_bank_iomux_flags(4, 32, "gpio4", iomux_width_4bit, + iomux_width_4bit, + iomux_width_4bit, + iomux_width_4bit), +}; + +static struct rockchip_pin_ctrl rk3568_pin_ctrl = { + .pin_banks = rk3568_pin_banks, + .nr_banks = array_size(rk3568_pin_banks), + .label = "rk3568-gpio", + .type = rk3568, + .grf_mux_offset = 0x0, + .pmu_mux_offset = 0x0, + .grf_drv_offset = 0x0200, + .pmu_drv_offset = 0x0070, + .iomux_routes = rk3568_mux_route_data, + .niomux_routes = array_size(rk3568_mux_route_data), + .pull_calc_reg = rk3568_calc_pull_reg_and_bit, + .drv_calc_reg = rk3568_calc_drv_reg_and_bit, + .schmitt_calc_reg = rk3568_calc_schmitt_reg_and_bit, +}; + + { .compatible = "rockchip,rk3568-pinctrl", + .data = &rk3568_pin_ctrl },
Pin Controllers (pinctrl)
c0dadc0e47a895e95c17a4df1fa12737e1d57d6f
jianqun xu
drivers
pinctrl
mmc: sdhci-of-dwcmshc: add rockchip platform support
sdhci based synopsys mmc ip is also used on some rockchip platforms, so add a basic support here.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add rockchip platform support
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['sdhci-of-dwcmshc']
['c']
1
253
8
--- diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c --- a/drivers/mmc/host/sdhci-of-dwcmshc.c +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c +#include <linux/iopoll.h> +#include <linux/of_device.h> +/* dwc ip vendor area 1 pointer */ +#define dwcmshc_p_vendor_area1 0xe8 +#define dwcmshc_area1_mask genmask(11, 0) +/* offset inside the vendor area 1 */ +#define dwcmshc_host_ctrl3 0x8 +#define dwcmshc_emmc_control 0x2c +#define dwcmshc_enhanced_strobe bit(8) +#define dwcmshc_emmc_atctrl 0x40 + +/* rockchip specific registers */ +#define dwcmshc_emmc_dll_ctrl 0x800 +#define dwcmshc_emmc_dll_rxclk 0x804 +#define dwcmshc_emmc_dll_txclk 0x808 +#define dwcmshc_emmc_dll_strbin 0x80c +#define dll_strbin_tapnum_from_sw bit(24) +#define dwcmshc_emmc_dll_status0 0x840 +#define dwcmshc_emmc_dll_start bit(0) +#define dwcmshc_emmc_dll_locked bit(8) +#define dwcmshc_emmc_dll_timeout bit(9) +#define dwcmshc_emmc_dll_rxclk_srcsel 29 +#define dwcmshc_emmc_dll_start_point 16 +#define dwcmshc_emmc_dll_inc 8 +#define dwcmshc_emmc_dll_dlyena bit(27) +#define dll_txclk_tapnum_default 0x8 +#define dll_strbin_tapnum_default 0x8 +#define dll_txclk_tapnum_from_sw bit(24) +#define dll_rxclk_no_inverter 1 +#define dll_rxclk_inverter 0 +#define dll_lock_wo_tmout(x) \ + ((((x) & dwcmshc_emmc_dll_locked) == dwcmshc_emmc_dll_locked) && \ + (((x) & dwcmshc_emmc_dll_timeout) == 0)) +#define rk3568_max_clks 3 + +struct rk3568_priv { + /* rockchip specified optional clocks */ + struct clk_bulk_data rockchip_clks[rk3568_max_clks]; + u8 txclk_tapnum; +}; + + int vendor_specific_area1; /* p_vendor_specific_area reg */ + void *priv; /* pointer to soc private stuff */ +static void dwcmshc_hs400_enhanced_strobe(struct mmc_host *mmc, + struct mmc_ios *ios) +{ + u32 vendor; + struct sdhci_host *host = mmc_priv(mmc); + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct dwcmshc_priv *priv = sdhci_pltfm_priv(pltfm_host); + int reg = priv->vendor_specific_area1 + dwcmshc_emmc_control; + + vendor = sdhci_readl(host, reg); + if (ios->enhanced_strobe) + vendor |= dwcmshc_enhanced_strobe; + else + vendor &= ~dwcmshc_enhanced_strobe; + + sdhci_writel(host, vendor, reg); +} + +static void dwcmshc_rk3568_set_clock(struct sdhci_host *host, unsigned int clock) +{ + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct dwcmshc_priv *dwc_priv = sdhci_pltfm_priv(pltfm_host); + struct rk3568_priv *priv = dwc_priv->priv; + u8 txclk_tapnum = dll_txclk_tapnum_default; + u32 extra, reg; + int err; + + host->mmc->actual_clock = 0; + + /* + * do not touch this setting. rx clk inverter unit is enabled + * by default, but it shouldn't be enabled. we should anyway + * disable it before issuing any cmds. + */ + extra = dwcmshc_emmc_dll_dlyena | + dll_rxclk_no_inverter << dwcmshc_emmc_dll_rxclk_srcsel; + sdhci_writel(host, extra, dwcmshc_emmc_dll_rxclk); + + if (clock == 0) + return; + + /* rockchip platform only support 375khz for identify mode */ + if (clock <= 400000) + clock = 375000; + + err = clk_set_rate(pltfm_host->clk, clock); + if (err) + dev_err(mmc_dev(host->mmc), "fail to set clock %d", clock); + + sdhci_set_clock(host, clock); + + /* disable cmd conflict check */ + reg = dwc_priv->vendor_specific_area1 + dwcmshc_host_ctrl3; + extra = sdhci_readl(host, reg); + extra &= ~bit(0); + sdhci_writel(host, extra, reg); + + if (clock <= 400000) { + /* disable dll to reset sample clock */ + sdhci_writel(host, 0, dwcmshc_emmc_dll_ctrl); + return; + } + + /* reset dll */ + sdhci_writel(host, bit(1), dwcmshc_emmc_dll_ctrl); + udelay(1); + sdhci_writel(host, 0x0, dwcmshc_emmc_dll_ctrl); + + /* init dll settings */ + extra = 0x5 << dwcmshc_emmc_dll_start_point | + 0x2 << dwcmshc_emmc_dll_inc | + dwcmshc_emmc_dll_start; + sdhci_writel(host, extra, dwcmshc_emmc_dll_ctrl); + err = readl_poll_timeout(host->ioaddr + dwcmshc_emmc_dll_status0, + extra, dll_lock_wo_tmout(extra), 1, + 500 * usec_per_msec); + if (err) { + dev_err(mmc_dev(host->mmc), "dll lock timeout! "); + return; + } + + extra = 0x1 << 16 | /* tune clock stop en */ + 0x2 << 17 | /* pre-change delay */ + 0x3 << 19; /* post-change delay */ + sdhci_writel(host, extra, dwc_priv->vendor_specific_area1 + dwcmshc_emmc_atctrl); + + if (host->mmc->ios.timing == mmc_timing_mmc_hs200 || + host->mmc->ios.timing == mmc_timing_mmc_hs400) + txclk_tapnum = priv->txclk_tapnum; + + extra = dwcmshc_emmc_dll_dlyena | + dll_txclk_tapnum_from_sw | + txclk_tapnum; + sdhci_writel(host, extra, dwcmshc_emmc_dll_txclk); + + extra = dwcmshc_emmc_dll_dlyena | + dll_strbin_tapnum_default | + dll_strbin_tapnum_from_sw; + sdhci_writel(host, extra, dwcmshc_emmc_dll_strbin); +} + +static const struct sdhci_ops sdhci_dwcmshc_rk3568_ops = { + .set_clock = dwcmshc_rk3568_set_clock, + .set_bus_width = sdhci_set_bus_width, + .set_uhs_signaling = dwcmshc_set_uhs_signaling, + .get_max_clock = sdhci_pltfm_clk_get_max_clock, + .reset = sdhci_reset, + .adma_write_desc = dwcmshc_adma_write_desc, +}; + +static const struct sdhci_pltfm_data sdhci_dwcmshc_rk3568_pdata = { + .ops = &sdhci_dwcmshc_rk3568_ops, + .quirks = sdhci_quirk_cap_clock_base_broken | + sdhci_quirk_broken_timeout_val, + .quirks2 = sdhci_quirk2_preset_value_broken | + sdhci_quirk2_clock_div_zero_broken, +}; + +static int dwcmshc_rk3568_init(struct sdhci_host *host, struct dwcmshc_priv *dwc_priv) +{ + int err; + struct rk3568_priv *priv = dwc_priv->priv; + + priv->rockchip_clks[0].id = "axi"; + priv->rockchip_clks[1].id = "block"; + priv->rockchip_clks[2].id = "timer"; + err = devm_clk_bulk_get_optional(mmc_dev(host->mmc), rk3568_max_clks, + priv->rockchip_clks); + if (err) { + dev_err(mmc_dev(host->mmc), "failed to get clocks %d ", err); + return err; + } + + err = clk_bulk_prepare_enable(rk3568_max_clks, priv->rockchip_clks); + if (err) { + dev_err(mmc_dev(host->mmc), "failed to enable clocks %d ", err); + return err; + } + + if (of_property_read_u8(mmc_dev(host->mmc)->of_node, "rockchip,txclk-tapnum", + &priv->txclk_tapnum)) + priv->txclk_tapnum = dll_txclk_tapnum_default; + + /* disable cmd conflict check */ + sdhci_writel(host, 0x0, dwc_priv->vendor_specific_area1 + dwcmshc_host_ctrl3); + /* reset previous settings */ + sdhci_writel(host, 0, dwcmshc_emmc_dll_txclk); + sdhci_writel(host, 0, dwcmshc_emmc_dll_strbin); + + return 0; +} + +static const struct of_device_id sdhci_dwcmshc_dt_ids[] = { + { + .compatible = "rockchip,rk3568-dwcmshc", + .data = &sdhci_dwcmshc_rk3568_pdata, + }, + { + .compatible = "snps,dwcmshc-sdhci", + .data = &sdhci_dwcmshc_pdata, + }, + {}, +}; +module_device_table(of, sdhci_dwcmshc_dt_ids); + + struct rk3568_priv *rk_priv = null; + const struct sdhci_pltfm_data *pltfm_data; - host = sdhci_pltfm_init(pdev, &sdhci_dwcmshc_pdata, + pltfm_data = of_device_get_match_data(&pdev->dev); + if (!pltfm_data) { + dev_err(&pdev->dev, "error: no device match data found "); + return -enodev; + } + + host = sdhci_pltfm_init(pdev, pltfm_data, + priv->vendor_specific_area1 = + sdhci_readl(host, dwcmshc_p_vendor_area1) & dwcmshc_area1_mask; + + host->mmc_host_ops.hs400_enhanced_strobe = dwcmshc_hs400_enhanced_strobe; + + if (pltfm_data == &sdhci_dwcmshc_rk3568_pdata) { + rk_priv = devm_kzalloc(&pdev->dev, sizeof(struct rk3568_priv), gfp_kernel); + if (!rk_priv) + goto err_clk; + + priv->priv = rk_priv; + + err = dwcmshc_rk3568_init(host, priv); + if (err) + goto err_clk; + } + if (rk_priv) + clk_bulk_disable_unprepare(rk3568_max_clks, + rk_priv->rockchip_clks); + struct rk3568_priv *rk_priv = priv->priv; - + if (rk_priv) + clk_bulk_disable_unprepare(rk3568_max_clks, + rk_priv->rockchip_clks); + struct rk3568_priv *rk_priv = priv->priv; + if (rk_priv) + clk_bulk_disable_unprepare(rk3568_max_clks, + rk_priv->rockchip_clks); + + struct rk3568_priv *rk_priv = priv->priv; + if (rk_priv) { + ret = clk_bulk_prepare_enable(rk3568_max_clks, + rk_priv->rockchip_clks); + if (ret) + return ret; + } + -static const struct of_device_id sdhci_dwcmshc_dt_ids[] = { - { .compatible = "snps,dwcmshc-sdhci" }, - {} -}; -module_device_table(of, sdhci_dwcmshc_dt_ids); -
Multi Media Card (MMC)
08f3dff799d43bd2ec9d5e05c819ae3f253fe5cd
shawn lin
drivers
mmc
host
mmc: sdhci-acpi: add device id for the amdi0041 variant of the amd emmc controller.
this variant is present on a lenovo ideapad slim 1, which uses an amd dali/athlon silver 3050e. the windows amd sd host controller driver also lists this as a valid device id.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add device id for the amdi0041 variant of the amd emmc controller
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['sdhci-acpi']
['c']
1
2
0
--- diff --git a/drivers/mmc/host/sdhci-acpi.c b/drivers/mmc/host/sdhci-acpi.c --- a/drivers/mmc/host/sdhci-acpi.c +++ b/drivers/mmc/host/sdhci-acpi.c + { "amdi0041", null, &sdhci_acpi_slot_amd_emmc }, + { "amdi0041" },
Multi Media Card (MMC)
955047f3c35a3116416ffbddcaeeb6499afaf43b
james young
drivers
mmc
host
mmc: sdhci-pci: add pci ids for intel lkf
add pci ids for intel lkf emmc and sd card host controllers.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add pci ids for intel lkf
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['sdhci-pci']
['h', 'c']
2
4
0
--- diff --git a/drivers/mmc/host/sdhci-pci-core.c b/drivers/mmc/host/sdhci-pci-core.c --- a/drivers/mmc/host/sdhci-pci-core.c +++ b/drivers/mmc/host/sdhci-pci-core.c + sdhci_pci_device(intel, lkf_emmc, intel_glk_emmc), + sdhci_pci_device(intel, lkf_sd, intel_byt_sd), diff --git a/drivers/mmc/host/sdhci-pci.h b/drivers/mmc/host/sdhci-pci.h --- a/drivers/mmc/host/sdhci-pci.h +++ b/drivers/mmc/host/sdhci-pci.h +#define pci_device_id_intel_lkf_emmc 0x98c4 +#define pci_device_id_intel_lkf_sd 0x98f8
Multi Media Card (MMC)
ee629112be8b4eff71d4d3d108a28bc7dc877e13
adrian hunter
drivers
mmc
host
mtd: add otp (one-time-programmable) erase ioctl
this may sound like a contradiction but some spi-nor flashes really support erasing their otp region until it is finally locked. having the possibility to erase an otp region might come in handy during development.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add otp (one-time-programmable) erase ioctl
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['h', 'c']
4
23
1
--- diff --git a/drivers/mtd/mtdchar.c b/drivers/mtd/mtdchar.c --- a/drivers/mtd/mtdchar.c +++ b/drivers/mtd/mtdchar.c + case otperase: + case otperase: - ret = mtd_lock_user_prot_reg(mtd, oinfo.start, oinfo.length); + if (cmd == otplock) + ret = mtd_lock_user_prot_reg(mtd, oinfo.start, oinfo.length); + else + ret = mtd_erase_user_prot_reg(mtd, oinfo.start, oinfo.length); diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c --- a/drivers/mtd/mtdcore.c +++ b/drivers/mtd/mtdcore.c +int mtd_erase_user_prot_reg(struct mtd_info *mtd, loff_t from, size_t len) +{ + struct mtd_info *master = mtd_get_master(mtd); + + if (!master->_erase_user_prot_reg) + return -eopnotsupp; + if (!len) + return 0; + return master->_erase_user_prot_reg(master, from, len); +} +export_symbol_gpl(mtd_erase_user_prot_reg); + diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h + int (*_erase_user_prot_reg) (struct mtd_info *mtd, loff_t from, + size_t len); +int mtd_erase_user_prot_reg(struct mtd_info *mtd, loff_t from, size_t len); diff --git a/include/uapi/mtd/mtd-abi.h b/include/uapi/mtd/mtd-abi.h --- a/include/uapi/mtd/mtd-abi.h +++ b/include/uapi/mtd/mtd-abi.h +/* erase a given range of user data (must be in mode %mtd_file_mode_otp_user) */ +#define otperase _iow('m', 25, struct otp_info)
Memory Technology Devices (MTD)
e3c1f1c92d6ede3cfa09d6a103d3d1c1ef645e35
michael walle
include
linux
mtd
mtd: parsers: ofpart: support bcm4908 fixed partitions
some devices use fixed partitioning with some partitions requiring some extra logic. e.g. bcm4908 may have multiple firmware partitions but detecting currently used one requires checking bootloader parameters.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
support bcm4908 fixed partitions
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['parsers', 'ofpart']
['h', 'kconfig', 'c', 'makefile']
5
116
2
--- diff --git a/drivers/mtd/parsers/kconfig b/drivers/mtd/parsers/kconfig --- a/drivers/mtd/parsers/kconfig +++ b/drivers/mtd/parsers/kconfig +config mtd_of_parts_bcm4908 + bool "bcm4908 partitioning support" + depends on mtd_of_parts && (arch_bcm4908 || compile_test) + default arch_bcm4908 + help + this provides partitions parser for bcm4908 family devices + that can have multiple "firmware" partitions. it takes care of + finding currently used one and backup ones. + diff --git a/drivers/mtd/parsers/makefile b/drivers/mtd/parsers/makefile --- a/drivers/mtd/parsers/makefile +++ b/drivers/mtd/parsers/makefile +ofpart-y += ofpart_core.o +ofpart-$(config_mtd_of_parts_bcm4908) += ofpart_bcm4908.o diff --git a/drivers/mtd/parsers/ofpart_bcm4908.c b/drivers/mtd/parsers/ofpart_bcm4908.c --- /dev/null +++ b/drivers/mtd/parsers/ofpart_bcm4908.c +// spdx-license-identifier: gpl-2.0 +/* + * copyright (c) 2021 rafa miecki <rafal@milecki.pl> + */ + +#include <linux/module.h> +#include <linux/init.h> +#include <linux/of.h> +#include <linux/mtd/mtd.h> +#include <linux/slab.h> +#include <linux/mtd/partitions.h> + +#include "ofpart_bcm4908.h" + +#define blparams_fw_offset "nand_rfs_ofs" + +static long long bcm4908_partitions_fw_offset(void) +{ + struct device_node *root; + struct property *prop; + const char *s; + + root = of_find_node_by_path("/"); + if (!root) + return -enoent; + + of_property_for_each_string(root, "brcm_blparms", prop, s) { + size_t len = strlen(blparams_fw_offset); + unsigned long offset; + int err; + + if (strncmp(s, blparams_fw_offset, len) || s[len] != '=') + continue; + + err = kstrtoul(s + len + 1, 0, &offset); + if (err) { + pr_err("failed to parse %s ", s + len + 1); + return err; + } + + return offset << 10; + } + + return -enoent; +} + +int bcm4908_partitions_post_parse(struct mtd_info *mtd, struct mtd_partition *parts, int nr_parts) +{ + long long fw_offset; + int i; + + fw_offset = bcm4908_partitions_fw_offset(); + + for (i = 0; i < nr_parts; i++) { + if (of_device_is_compatible(parts[i].of_node, "brcm,bcm4908-firmware")) { + if (fw_offset < 0 || parts[i].offset == fw_offset) + parts[i].name = "firmware"; + else + parts[i].name = "backup"; + } + } + + return 0; +} diff --git a/drivers/mtd/parsers/ofpart_bcm4908.h b/drivers/mtd/parsers/ofpart_bcm4908.h --- /dev/null +++ b/drivers/mtd/parsers/ofpart_bcm4908.h +/* spdx-license-identifier: gpl-2.0 */ +#ifndef __bcm4908_partitions_h +#define __bcm4908_partitions_h + +#ifdef config_mtd_of_parts_bcm4908 +int bcm4908_partitions_post_parse(struct mtd_info *mtd, struct mtd_partition *parts, int nr_parts); +#else +static inline int bcm4908_partitions_post_parse(struct mtd_info *mtd, struct mtd_partition *parts, + int nr_parts) +{ + return -eopnotsupp; +} +#endif + +#endif diff --git a/drivers/mtd/parsers/ofpart.c b/drivers/mtd/parsers/ofpart_core.c --- a/drivers/mtd/parsers/ofpart.c +++ b/drivers/mtd/parsers/ofpart_core.c +#include "ofpart_bcm4908.h" + +struct fixed_partitions_quirks { + int (*post_parse)(struct mtd_info *mtd, struct mtd_partition *parts, int nr_parts); +}; + +struct fixed_partitions_quirks bcm4908_partitions_quirks = { + .post_parse = bcm4908_partitions_post_parse, +}; + +static const struct of_device_id parse_ofpart_match_table[]; + + const struct fixed_partitions_quirks *quirks; + const struct of_device_id *of_id; - - } else if (!of_device_is_compatible(ofpart_node, "fixed-partitions")) { + } + + of_id = of_match_node(parse_ofpart_match_table, ofpart_node); + if (dedicated && !of_id) { + quirks = of_id ? of_id->data : null; + + if (quirks && quirks->post_parse) + quirks->post_parse(master, parts, nr_parts); + + /* generic */ + /* customized */ + { .compatible = "brcm,bcm4908-partitions", .data = &bcm4908_partitions_quirks, },
Memory Technology Devices (MTD)
bb17230c61a6424b622e92006ec52ba23aa5a967
rafa mi ecki
drivers
mtd
parsers
mtd: parsers: ofpart: support linksys northstar partitions
this allows extending ofpart parser with support for linksys northstar devices. that support uses recently added quirks mechanism.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
support linksys northstar partitions
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['parsers', 'ofpart']
['h', 'kconfig', 'c', 'makefile']
5
85
0
--- diff --git a/drivers/mtd/parsers/kconfig b/drivers/mtd/parsers/kconfig --- a/drivers/mtd/parsers/kconfig +++ b/drivers/mtd/parsers/kconfig +config mtd_of_parts_linksys_ns + bool "linksys northstar partitioning support" + depends on mtd_of_parts && (arch_bcm_5301x || arch_bcm4908 || compile_test) + default arch_bcm_5301x + help + this provides partitions parser for linksys devices based on broadcom + northstar architecture. linksys commonly uses fixed flash layout with + two "firmware" partitions. currently used firmware has to be detected + using cfe environment variable. + diff --git a/drivers/mtd/parsers/makefile b/drivers/mtd/parsers/makefile --- a/drivers/mtd/parsers/makefile +++ b/drivers/mtd/parsers/makefile +ofpart-$(config_mtd_of_parts_linksys_ns)+= ofpart_linksys_ns.o diff --git a/drivers/mtd/parsers/ofpart_core.c b/drivers/mtd/parsers/ofpart_core.c --- a/drivers/mtd/parsers/ofpart_core.c +++ b/drivers/mtd/parsers/ofpart_core.c +#include "ofpart_linksys_ns.h" +static struct fixed_partitions_quirks linksys_ns_partitions_quirks = { + .post_parse = linksys_ns_partitions_post_parse, +}; + + { .compatible = "linksys,ns-partitions", .data = &linksys_ns_partitions_quirks, }, diff --git a/drivers/mtd/parsers/ofpart_linksys_ns.c b/drivers/mtd/parsers/ofpart_linksys_ns.c --- /dev/null +++ b/drivers/mtd/parsers/ofpart_linksys_ns.c +// spdx-license-identifier: gpl-2.0 +/* + * copyright (c) 2021 rafa miecki <rafal@milecki.pl> + */ + +#include <linux/bcm47xx_nvram.h> +#include <linux/mtd/mtd.h> +#include <linux/mtd/partitions.h> + +#include "ofpart_linksys_ns.h" + +#define nvram_boot_part "bootpartition" + +static int ofpart_linksys_ns_bootpartition(void) +{ + char buf[4]; + int bootpartition; + + /* check cfe environment variable */ + if (bcm47xx_nvram_getenv(nvram_boot_part, buf, sizeof(buf)) > 0) { + if (!kstrtoint(buf, 0, &bootpartition)) + return bootpartition; + pr_warn("failed to parse %s value "%s" ", nvram_boot_part, + buf); + } else { + pr_warn("failed to get nvram "%s" ", nvram_boot_part); + } + + return 0; +} + +int linksys_ns_partitions_post_parse(struct mtd_info *mtd, + struct mtd_partition *parts, + int nr_parts) +{ + int bootpartition = ofpart_linksys_ns_bootpartition(); + int trx_idx = 0; + int i; + + for (i = 0; i < nr_parts; i++) { + if (of_device_is_compatible(parts[i].of_node, "linksys,ns-firmware")) { + if (trx_idx++ == bootpartition) + parts[i].name = "firmware"; + else + parts[i].name = "backup"; + } + } + + return 0; +} diff --git a/drivers/mtd/parsers/ofpart_linksys_ns.h b/drivers/mtd/parsers/ofpart_linksys_ns.h --- /dev/null +++ b/drivers/mtd/parsers/ofpart_linksys_ns.h +/* spdx-license-identifier: gpl-2.0 */ +#ifndef __ofpart_linksys_ns_h +#define __ofpart_linksys_ns_h + +#ifdef config_mtd_of_parts_linksys_ns +int linksys_ns_partitions_post_parse(struct mtd_info *mtd, + struct mtd_partition *parts, + int nr_parts); +#else +static inline int linksys_ns_partitions_post_parse(struct mtd_info *mtd, + struct mtd_partition *parts, + int nr_parts) +{ + return -eopnotsupp; +} +#endif + +#endif
Memory Technology Devices (MTD)
7134a2d026d942210b4d26d6059c9d979ca7866e
rafa mi ecki
drivers
mtd
parsers
mtd: rawnand: add support for secure regions in nand memory
on a typical end product, a vendor may choose to secure some regions in the nand memory which are supposed to stay intact between fw upgrades. the access to those regions will be blocked by a secure element like trustzone. so the normal world software like linux kernel should not touch these regions (including reading).
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for secure regions in nand memory
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['rawnand']
['h', 'c']
2
113
1
--- diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c --- a/drivers/mtd/nand/raw/nand_base.c +++ b/drivers/mtd/nand/raw/nand_base.c +/** + * nand_region_is_secured() - check if the region is secured + * @chip: nand chip object + * @offset: offset of the region to check + * @size: size of the region to check + * + * checks if the region is secured by comparing the offset and size with the + * list of secure regions obtained from dt. returns true if the region is + * secured else false. + */ +static bool nand_region_is_secured(struct nand_chip *chip, loff_t offset, u64 size) +{ + int i; + + /* skip touching the secure regions if present */ + for (i = 0; i < chip->nr_secure_regions; i++) { + const struct nand_secure_region *region = &chip->secure_regions[i]; + + if (offset + size <= region->offset || + offset >= region->offset + region->size) + continue; + + pr_debug("%s: region 0x%llx - 0x%llx is secured!", + __func__, offset, offset + size); + + return true; + } + + return false; +} + + struct mtd_info *mtd = nand_to_mtd(chip); + + /* check if the region is secured */ + if (nand_region_is_secured(chip, ofs, mtd->erasesize)) + return -eio; + + /* check if the region is secured */ + if (nand_region_is_secured(chip, to, ops->ooblen)) + return -eio; + + /* check if the region is secured */ + if (nand_region_is_secured(chip, from, readlen)) + return -eio; + + /* check if the region is secured */ + if (nand_region_is_secured(chip, from, readlen)) + return -eio; + + /* check if the region is secured */ + if (nand_region_is_secured(chip, to, writelen)) + return -eio; + + /* check if the region is secured */ + if (nand_region_is_secured(chip, instr->addr, instr->len)) + return -eio; + +static int of_get_nand_secure_regions(struct nand_chip *chip) +{ + struct device_node *dn = nand_get_flash_node(chip); + int nr_elem, i, j; + + nr_elem = of_property_count_elems_of_size(dn, "secure-regions", sizeof(u64)); + if (!nr_elem) + return 0; + + chip->nr_secure_regions = nr_elem / 2; + chip->secure_regions = kcalloc(chip->nr_secure_regions, sizeof(*chip->secure_regions), + gfp_kernel); + if (!chip->secure_regions) + return -enomem; + + for (i = 0, j = 0; i < chip->nr_secure_regions; i++, j += 2) { + of_property_read_u64_index(dn, "secure-regions", j, + &chip->secure_regions[i].offset); + of_property_read_u64_index(dn, "secure-regions", j + 1, + &chip->secure_regions[i].size); + } + + return 0; +} + + /* + * look for secure regions in the nand chip. these regions are supposed + * to be protected by a secure element like trustzone. so the read/write + * accesses to these regions will be blocked in the runtime by this + * driver. + */ + ret = of_get_nand_secure_regions(chip); + if (ret) + goto err_free_interface_config; + - goto err_free_interface_config; + goto err_free_secure_regions; +err_free_secure_regions: + kfree(chip->secure_regions); + + /* free secure regions data */ + kfree(chip->secure_regions); + diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h +/** + * struct nand_secure_region - nand secure region structure + * @offset: offset of the start of the secure region + * @size: size of the secure region + */ +struct nand_secure_region { + u64 offset; + u64 size; +}; + + * @secure_regions: structure containing the secure regions info + * @nr_secure_regions: number of secure regions + struct nand_secure_region *secure_regions; + u8 nr_secure_regions;
Memory Technology Devices (MTD)
13b89768275d6ca9764bf91449e4cafe46ba706b
manivannan sadhasivam
include
linux
mtd, nand, raw
mtd: spi-nor: add otp support
spi flashes sometimes have a special otp area, which can (and is) used to store immutable properties like board serial number or vendor assigned network hardware addresses.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
otp support
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['spi-nor ']
['h', 'c', 'makefile']
4
271
1
--- diff --git a/drivers/mtd/spi-nor/makefile b/drivers/mtd/spi-nor/makefile --- a/drivers/mtd/spi-nor/makefile +++ b/drivers/mtd/spi-nor/makefile -spi-nor-objs := core.o sfdp.o swp.o +spi-nor-objs := core.o sfdp.o swp.o otp.o diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c + params->otp.org = &info->otp_org; + + /* configure otp parameters and ops */ + spi_nor_otp_init(nor); + diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h +/** + * struct spi_nor_otp_organization - structure to describe the spi nor otp regions + * @len: size of one otp region in bytes. + * @base: start address of the otp area. + * @offset: offset between consecutive otp regions if there are more + * than one. + * @n_regions: number of individual otp regions. + */ +struct spi_nor_otp_organization { + size_t len; + loff_t base; + loff_t offset; + unsigned int n_regions; +}; + +/** + * struct spi_nor_otp_ops - spi nor otp methods + * @read: read from the spi nor otp area. + * @write: write to the spi nor otp area. + * @lock: lock an otp region. + * @is_locked: check if an otp region of the spi nor is locked. + */ +struct spi_nor_otp_ops { + int (*read)(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf); + int (*write)(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf); + int (*lock)(struct spi_nor *nor, unsigned int region); + int (*is_locked)(struct spi_nor *nor, unsigned int region); +}; + +/** + * struct spi_nor_otp - spi nor otp grouping structure + * @org: otp region organization + * @ops: otp access ops + */ +struct spi_nor_otp { + const struct spi_nor_otp_organization *org; + const struct spi_nor_otp_ops *ops; +}; + + * @otp_info: describes the otp regions. + * @otp: spi nor otp methods. + struct spi_nor_otp otp; + const struct spi_nor_otp_organization otp_org; + +#define otp_info(_len, _n_regions, _base, _offset) \ + .otp_org = { \ + .len = (_len), \ + .base = (_base), \ + .offset = (_offset), \ + .n_regions = (_n_regions), \ + }, + +void spi_nor_otp_init(struct spi_nor *nor); diff --git a/drivers/mtd/spi-nor/otp.c b/drivers/mtd/spi-nor/otp.c --- /dev/null +++ b/drivers/mtd/spi-nor/otp.c +// spdx-license-identifier: gpl-2.0 +/* + * otp support for spi nor flashes + * + * copyright (c) 2021 michael walle <michael@walle.cc> + */ + +#include <linux/log2.h> +#include <linux/mtd/mtd.h> +#include <linux/mtd/spi-nor.h> + +#include "core.h" + +#define spi_nor_otp_region_len(nor) ((nor)->params->otp.org->len) +#define spi_nor_otp_n_regions(nor) ((nor)->params->otp.org->n_regions) + +static loff_t spi_nor_otp_region_start(const struct spi_nor *nor, unsigned int region) +{ + const struct spi_nor_otp_organization *org = nor->params->otp.org; + + return org->base + region * org->offset; +} + +static size_t spi_nor_otp_size(struct spi_nor *nor) +{ + return spi_nor_otp_n_regions(nor) * spi_nor_otp_region_len(nor); +} + +/* translate the file offsets from and to otp regions. */ +static loff_t spi_nor_otp_region_to_offset(struct spi_nor *nor, unsigned int region) +{ + return region * spi_nor_otp_region_len(nor); +} + +static unsigned int spi_nor_otp_offset_to_region(struct spi_nor *nor, loff_t ofs) +{ + return div64_u64(ofs, spi_nor_otp_region_len(nor)); +} + +static int spi_nor_mtd_otp_info(struct mtd_info *mtd, size_t len, + size_t *retlen, struct otp_info *buf) +{ + struct spi_nor *nor = mtd_to_spi_nor(mtd); + const struct spi_nor_otp_ops *ops = nor->params->otp.ops; + unsigned int n_regions = spi_nor_otp_n_regions(nor); + unsigned int i; + int ret, locked; + + if (len < n_regions * sizeof(*buf)) + return -enospc; + + ret = spi_nor_lock_and_prep(nor); + if (ret) + return ret; + + for (i = 0; i < n_regions; i++) { + buf->start = spi_nor_otp_region_to_offset(nor, i); + buf->length = spi_nor_otp_region_len(nor); + + locked = ops->is_locked(nor, i); + if (locked < 0) { + ret = locked; + goto out; + } + + buf->locked = !!locked; + buf++; + } + + *retlen = n_regions * sizeof(*buf); + +out: + spi_nor_unlock_and_unprep(nor); + + return ret; +} + +static int spi_nor_mtd_otp_read_write(struct mtd_info *mtd, loff_t ofs, + size_t total_len, size_t *retlen, + u8 *buf, bool is_write) +{ + struct spi_nor *nor = mtd_to_spi_nor(mtd); + const struct spi_nor_otp_ops *ops = nor->params->otp.ops; + const size_t rlen = spi_nor_otp_region_len(nor); + loff_t rstart, rofs; + unsigned int region; + size_t len; + int ret; + + if (ofs < 0 || ofs >= spi_nor_otp_size(nor)) + return 0; + + ret = spi_nor_lock_and_prep(nor); + if (ret) + return ret; + + /* don't access beyond the end */ + total_len = min_t(size_t, total_len, spi_nor_otp_size(nor) - ofs); + + *retlen = 0; + while (total_len) { + /* + * the otp regions are mapped into a contiguous area starting + * at 0 as expected by the mtd layer. this will map the mtd + * file offsets to the address of an otp region as used in the + * actual spi commands. + */ + region = spi_nor_otp_offset_to_region(nor, ofs); + rstart = spi_nor_otp_region_start(nor, region); + + /* + * the size of a otp region is expected to be a power of two, + * thus we can just mask the lower bits and get the offset into + * a region. + */ + rofs = ofs & (rlen - 1); + + /* don't access beyond one otp region */ + len = min_t(size_t, total_len, rlen - rofs); + + if (is_write) + ret = ops->write(nor, rstart + rofs, len, buf); + else + ret = ops->read(nor, rstart + rofs, len, buf); + if (ret == 0) + ret = -eio; + if (ret < 0) + goto out; + + *retlen += ret; + ofs += ret; + buf += ret; + total_len -= ret; + } + ret = 0; + +out: + spi_nor_unlock_and_unprep(nor); + return ret; +} + +static int spi_nor_mtd_otp_read(struct mtd_info *mtd, loff_t from, size_t len, + size_t *retlen, u8 *buf) +{ + return spi_nor_mtd_otp_read_write(mtd, from, len, retlen, buf, false); +} + +static int spi_nor_mtd_otp_write(struct mtd_info *mtd, loff_t to, size_t len, + size_t *retlen, u8 *buf) +{ + return spi_nor_mtd_otp_read_write(mtd, to, len, retlen, buf, true); +} + +static int spi_nor_mtd_otp_lock(struct mtd_info *mtd, loff_t from, size_t len) +{ + struct spi_nor *nor = mtd_to_spi_nor(mtd); + const struct spi_nor_otp_ops *ops = nor->params->otp.ops; + const size_t rlen = spi_nor_otp_region_len(nor); + unsigned int region; + int ret; + + if (from < 0 || (from + len) > spi_nor_otp_size(nor)) + return -einval; + + /* the user has to explicitly ask for whole regions */ + if (!is_aligned(len, rlen) || !is_aligned(from, rlen)) + return -einval; + + ret = spi_nor_lock_and_prep(nor); + if (ret) + return ret; + + while (len) { + region = spi_nor_otp_offset_to_region(nor, from); + ret = ops->lock(nor, region); + if (ret) + goto out; + + len -= rlen; + from += rlen; + } + +out: + spi_nor_unlock_and_unprep(nor); + + return ret; +} + +void spi_nor_otp_init(struct spi_nor *nor) +{ + struct mtd_info *mtd = &nor->mtd; + + if (!nor->params->otp.ops) + return; + + if (warn_on(!is_power_of_2(spi_nor_otp_region_len(nor)))) + return; + + /* + * we only support user_prot callbacks (yet). + * + * some spi nor flashes like macronix ones can be ordered in two + * different variants. one with a factory locked otp area and one where + * it is left to the user to write to it. the factory locked otp is + * usually preprogrammed with an "electrical serial number". we don't + * support these for now. + */ + mtd->_get_user_prot_info = spi_nor_mtd_otp_info; + mtd->_read_user_prot_reg = spi_nor_mtd_otp_read; + mtd->_write_user_prot_reg = spi_nor_mtd_otp_write; + mtd->_lock_user_prot_reg = spi_nor_mtd_otp_lock; +}
Memory Technology Devices (MTD)
069089acf88b2216b667c1e5994e08b4d2e1ea12
michael walle
drivers
mtd
spi-nor
mtd: spi-nor: implement otp support for winbond and similar flashes
use the new otp ops to implement otp access on winbond flashes. most winbond flashes provides up to four different otp regions ("security registers").
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
otp support
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['spi-nor ']
['h', 'c']
4
179
1
--- diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c -static int spi_nor_write_16bit_cr_and_check(struct spi_nor *nor, u8 cr) +int spi_nor_write_16bit_cr_and_check(struct spi_nor *nor, u8 cr) diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h +int spi_nor_write_16bit_cr_and_check(struct spi_nor *nor, u8 cr); +int spi_nor_otp_read_secr(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf); +int spi_nor_otp_write_secr(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf); +int spi_nor_otp_lock_sr2(struct spi_nor *nor, unsigned int region); +int spi_nor_otp_is_locked_sr2(struct spi_nor *nor, unsigned int region); + diff --git a/drivers/mtd/spi-nor/otp.c b/drivers/mtd/spi-nor/otp.c --- a/drivers/mtd/spi-nor/otp.c +++ b/drivers/mtd/spi-nor/otp.c +/** + * spi_nor_otp_read_secr() - read otp data + * @nor: pointer to 'struct spi_nor' + * @from: offset to read from + * @len: number of bytes to read + * @buf: pointer to dst buffer + * + * read otp data from one region by using the spinor_op_rsecr commands. this + * method is used on gigadevice and winbond flashes. + * + * return: number of bytes read successfully, -errno otherwise + */ +int spi_nor_otp_read_secr(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf) +{ + u8 addr_width, read_opcode, read_dummy; + struct spi_mem_dirmap_desc *rdesc; + enum spi_nor_protocol read_proto; + int ret; + + read_opcode = nor->read_opcode; + addr_width = nor->addr_width; + read_dummy = nor->read_dummy; + read_proto = nor->read_proto; + rdesc = nor->dirmap.rdesc; + + nor->read_opcode = spinor_op_rsecr; + nor->addr_width = 3; + nor->read_dummy = 8; + nor->read_proto = snor_proto_1_1_1; + nor->dirmap.rdesc = null; + + ret = spi_nor_read_data(nor, addr, len, buf); + + nor->read_opcode = read_opcode; + nor->addr_width = addr_width; + nor->read_dummy = read_dummy; + nor->read_proto = read_proto; + nor->dirmap.rdesc = rdesc; + + return ret; +} + +/** + * spi_nor_otp_write_secr() - write otp data + * @nor: pointer to 'struct spi_nor' + * @to: offset to write to + * @len: number of bytes to write + * @buf: pointer to src buffer + * + * write otp data to one region by using the spinor_op_psecr commands. this + * method is used on gigadevice and winbond flashes. + * + * please note, the write must not span multiple otp regions. + * + * return: number of bytes written successfully, -errno otherwise + */ +int spi_nor_otp_write_secr(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf) +{ + enum spi_nor_protocol write_proto; + struct spi_mem_dirmap_desc *wdesc; + u8 addr_width, program_opcode; + int ret, written; + + program_opcode = nor->program_opcode; + addr_width = nor->addr_width; + write_proto = nor->write_proto; + wdesc = nor->dirmap.wdesc; + + nor->program_opcode = spinor_op_psecr; + nor->addr_width = 3; + nor->write_proto = snor_proto_1_1_1; + nor->dirmap.wdesc = null; + + /* + * we only support a write to one single page. for now all winbond + * flashes only have one page per otp region. + */ + ret = spi_nor_write_enable(nor); + if (ret) + goto out; + + written = spi_nor_write_data(nor, addr, len, buf); + if (written < 0) + goto out; + + ret = spi_nor_wait_till_ready(nor); + +out: + nor->program_opcode = program_opcode; + nor->addr_width = addr_width; + nor->write_proto = write_proto; + nor->dirmap.wdesc = wdesc; + + return ret ?: written; +} + +static int spi_nor_otp_lock_bit_cr(unsigned int region) +{ + static const int lock_bits[] = { sr2_lb1, sr2_lb2, sr2_lb3 }; + + if (region >= array_size(lock_bits)) + return -einval; + + return lock_bits[region]; +} + +/** + * spi_nor_otp_lock_sr2() - lock the otp region + * @nor: pointer to 'struct spi_nor' + * @region: otp region + * + * lock the otp region by writing the status register-2. this method is used on + * gigadevice and winbond flashes. + * + * return: 0 on success, -errno otherwise. + */ +int spi_nor_otp_lock_sr2(struct spi_nor *nor, unsigned int region) +{ + u8 *cr = nor->bouncebuf; + int ret, lock_bit; + + lock_bit = spi_nor_otp_lock_bit_cr(region); + if (lock_bit < 0) + return lock_bit; + + ret = spi_nor_read_cr(nor, cr); + if (ret) + return ret; + + /* no need to write the register if region is already locked */ + if (cr[0] & lock_bit) + return 0; + + cr[0] |= lock_bit; + + return spi_nor_write_16bit_cr_and_check(nor, cr[0]); +} + +/** + * spi_nor_otp_is_locked_sr2() - get the otp region lock status + * @nor: pointer to 'struct spi_nor' + * @region: otp region + * + * retrieve the otp region lock bit by reading the status register-2. this + * method is used on gigadevice and winbond flashes. + * + * return: 0 on success, -errno otherwise. + */ +int spi_nor_otp_is_locked_sr2(struct spi_nor *nor, unsigned int region) +{ + u8 *cr = nor->bouncebuf; + int ret, lock_bit; + + lock_bit = spi_nor_otp_lock_bit_cr(region); + if (lock_bit < 0) + return lock_bit; + + ret = spi_nor_read_cr(nor, cr); + if (ret) + return ret; + + return cr[0] & lock_bit; +} + diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h +/* used for gigadevices and winbond flashes. */ +#define spinor_op_esecr 0x44 /* erase security registers */ +#define spinor_op_psecr 0x42 /* program security registers */ +#define spinor_op_rsecr 0x48 /* read security registers */ + +#define sr2_lb1 bit(3) /* security register lock bit 1 */ +#define sr2_lb2 bit(4) /* security register lock bit 2 */ +#define sr2_lb3 bit(5) /* security register lock bit 3 */
Memory Technology Devices (MTD)
cad3193fe9d1f0af4d05ed86693f99984409b188
michael walle
drivers
mtd
mtd, spi-nor
mtd: spi-nor: winbond: add support for w25q512jvq
add support for w25q512jvq. this is of the same series chip with w25q256jv, which is already supported, but with size doubled and different jedec id.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for w25q512jvq
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['spi-nor ', 'winbond']
['c']
1
2
0
--- diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c + { "w25q512jvq", info(0xef4020, 0, 64 * 1024, 1024, + sect_4k | spi_nor_dual_read | spi_nor_quad_read) },
Memory Technology Devices (MTD)
ff013330fbdb2782e9001787db6c0b6415cdad77
shuhao mai
drivers
mtd
spi-nor
mtd: spi-nor: winbond: add otp support to w25q32fw/jw
with all the helper functions in place, add otp support for the winbond w25q32jw and w25q32fw.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add otp support to w25q32fw/jw
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['spi-nor ', 'winbond']
['c']
1
15
2
--- diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c - spi_nor_has_lock | spi_nor_has_tb) }, + spi_nor_has_lock | spi_nor_has_tb) + otp_info(256, 3, 0x1000, 0x1000) + }, + - spi_nor_has_lock | spi_nor_has_tb) }, + spi_nor_has_lock | spi_nor_has_tb) + otp_info(256, 3, 0x1000, 0x1000) }, +static const struct spi_nor_otp_ops winbond_otp_ops = { + .read = spi_nor_otp_read_secr, + .write = spi_nor_otp_write_secr, + .lock = spi_nor_otp_lock_sr2, + .is_locked = spi_nor_otp_is_locked_sr2, +}; + + if (nor->params->otp.org->n_regions) + nor->params->otp.ops = &winbond_otp_ops;
Memory Technology Devices (MTD)
b206b82d1726f6f878891791069ab0aea2e31113
michael walle
drivers
mtd
spi-nor
mtd: spinand: gigadevice: support gd5f1gq5uexxg
the relevant changes to the already existing gd5f1gq4uexxg support has been determined by consulting the gigadevice product change notice an-0392-10, version 1.0 from november 30, 2020.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
support gd5f1gq5uexxg
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['spinand', 'gigadevice']
['c']
1
60
9
- power on reset - unique id - double transfer rate (dtr) - parameter page - random data quad io --- diff --git a/drivers/mtd/nand/spi/gigadevice.c b/drivers/mtd/nand/spi/gigadevice.c --- a/drivers/mtd/nand/spi/gigadevice.c +++ b/drivers/mtd/nand/spi/gigadevice.c -#define gd5fxgq4uexxg_reg_status2 0xf0 +#define gd5fxgq5xe_status_ecc_1_4_bitflips (1 << 4) +#define gd5fxgq5xe_status_ecc_4_bitflips (3 << 4) + +#define gd5fxgqxxexxg_reg_status2 0xf0 -static int gd5fxgq4_variant2_ooblayout_ecc(struct mtd_info *mtd, int section, +static int gd5fxgqx_variant2_ooblayout_ecc(struct mtd_info *mtd, int section, -static int gd5fxgq4_variant2_ooblayout_free(struct mtd_info *mtd, int section, +static int gd5fxgqx_variant2_ooblayout_free(struct mtd_info *mtd, int section, -static const struct mtd_ooblayout_ops gd5fxgq4_variant2_ooblayout = { - .ecc = gd5fxgq4_variant2_ooblayout_ecc, - .free = gd5fxgq4_variant2_ooblayout_free, +/* valid for q4/q5 and q6 (untested) devices */ +static const struct mtd_ooblayout_ops gd5fxgqx_variant2_ooblayout = { + .ecc = gd5fxgqx_variant2_ooblayout_ecc, + .free = gd5fxgqx_variant2_ooblayout_free, - struct spi_mem_op op = spinand_get_feature_op(gd5fxgq4uexxg_reg_status2, + struct spi_mem_op op = spinand_get_feature_op(gd5fxgqxxexxg_reg_status2, +static int gd5fxgq5xexxg_ecc_get_status(struct spinand_device *spinand, + u8 status) +{ + u8 status2; + struct spi_mem_op op = spinand_get_feature_op(gd5fxgqxxexxg_reg_status2, + &status2); + int ret; + + switch (status & status_ecc_mask) { + case status_ecc_no_bitflips: + return 0; + + case gd5fxgq5xe_status_ecc_1_4_bitflips: + /* + * read status2 register to determine a more fine grained + * bit error status + */ + ret = spi_mem_exec_op(spinand->spimem, &op); + if (ret) + return ret; + + /* + * 1 ... 4 bits are flipped (and corrected) + */ + /* bits sorted this way (1...0): eccse1, eccse0 */ + return ((status2 & status_ecc_mask) >> 4) + 1; + + case status_ecc_uncor_error: + return -ebadmsg; + + default: + break; + } + + return -einval; +} + - spinand_eccinfo(&gd5fxgq4_variant2_ooblayout, + spinand_eccinfo(&gd5fxgqx_variant2_ooblayout, - spinand_eccinfo(&gd5fxgq4_variant2_ooblayout, + spinand_eccinfo(&gd5fxgqx_variant2_ooblayout, + spinand_info("gd5f1gq5uexxg", + spinand_id(spinand_readid_method_opcode_dummy, 0x51), + nand_memorg(1, 2048, 128, 64, 1024, 20, 1, 1, 1), + nand_eccreq(4, 512), + spinand_info_op_variants(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + spinand_has_qe_bit, + spinand_eccinfo(&gd5fxgqx_variant2_ooblayout, + gd5fxgq5xexxg_ecc_get_status)),
Memory Technology Devices (MTD)
469b992489852b500d39048aa0013639dfe9f2e6
reto schneider
drivers
mtd
nand, spi
iio: kfifo: add devm_iio_kfifo_buffer_setup() helper
this change adds the devm_iio_kfifo_buffer_setup() helper/short-hand, which groups the simple routine of allocating a kfifo buffers via devm_iio_kfifo_allocate() and calling iio_device_attach_buffer().
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for multiple iio buffers per iio device
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['h', 'c', 'rst']
3
47
0
--- diff --git a/documentation/driver-api/driver-model/devres.rst b/documentation/driver-api/driver-model/devres.rst --- a/documentation/driver-api/driver-model/devres.rst +++ b/documentation/driver-api/driver-model/devres.rst + devm_iio_kfifo_buffer_setup() diff --git a/drivers/iio/buffer/kfifo_buf.c b/drivers/iio/buffer/kfifo_buf.c --- a/drivers/iio/buffer/kfifo_buf.c +++ b/drivers/iio/buffer/kfifo_buf.c +/** + * devm_iio_kfifo_buffer_setup - allocate a kfifo buffer & attach it to an iio device + * @dev: device object to which to attach the life-time of this kfifo buffer + * @indio_dev: the device the buffer should be attached to + * @mode_flags: the mode flags for this buffer (indio_buffer_software and/or + * indio_buffer_triggered). + * @setup_ops: the setup_ops required to configure the hw part of the buffer (optional) + * + * this function allocates a kfifo buffer via devm_iio_kfifo_allocate() and + * attaches it to the iio device via iio_device_attach_buffer(). + * this is meant to be a bit of a short-hand/helper function as there are a few + * drivers that seem to do this. + */ +int devm_iio_kfifo_buffer_setup(struct device *dev, + struct iio_dev *indio_dev, + int mode_flags, + const struct iio_buffer_setup_ops *setup_ops) +{ + struct iio_buffer *buffer; + + if (mode_flags) + mode_flags &= kfifo_access_funcs.modes; + + if (!mode_flags) + return -einval; + + buffer = devm_iio_kfifo_allocate(dev); + if (!buffer) + return -enomem; + + iio_device_attach_buffer(indio_dev, buffer); + + indio_dev->modes |= mode_flags; + indio_dev->setup_ops = setup_ops; + + return 0; +} +export_symbol_gpl(devm_iio_kfifo_buffer_setup); + diff --git a/include/linux/iio/kfifo_buf.h b/include/linux/iio/kfifo_buf.h --- a/include/linux/iio/kfifo_buf.h +++ b/include/linux/iio/kfifo_buf.h +struct iio_buffer_setup_ops; +struct iio_dev; +int devm_iio_kfifo_buffer_setup(struct device *dev, + struct iio_dev *indio_dev, + int mode_flags, + const struct iio_buffer_setup_ops *setup_ops); +
Industrial I/O (iio)
e36db6a06937c6fce3291f0c362d4f757b8ec703
alexandru ardelean
include
linux
buffer, driver-model, iio
iio: make use of devm_iio_kfifo_buffer_setup() helper
all drivers that already call devm_iio_kfifo_allocate() & iio_device_attach_buffer() are simple to convert to iio_device_attach_kfifo_buffer() in a single go.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for multiple iio buffers per iio device
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['c']
13
74
124
--- diff --git a/drivers/iio/accel/ssp_accel_sensor.c b/drivers/iio/accel/ssp_accel_sensor.c --- a/drivers/iio/accel/ssp_accel_sensor.c +++ b/drivers/iio/accel/ssp_accel_sensor.c - struct iio_buffer *buffer; - indio_dev->modes = indio_buffer_software; - buffer = devm_iio_kfifo_allocate(&pdev->dev); - if (!buffer) - return -enomem; - - iio_device_attach_buffer(indio_dev, buffer); - - indio_dev->setup_ops = &ssp_accel_buffer_ops; + ret = devm_iio_kfifo_buffer_setup(&pdev->dev, indio_dev, + indio_buffer_software, + &ssp_accel_buffer_ops); + if (ret) + return ret; diff --git a/drivers/iio/adc/ina2xx-adc.c b/drivers/iio/adc/ina2xx-adc.c --- a/drivers/iio/adc/ina2xx-adc.c +++ b/drivers/iio/adc/ina2xx-adc.c - struct iio_buffer *buffer; - indio_dev->modes = indio_direct_mode | indio_buffer_software; + indio_dev->modes = indio_direct_mode; - indio_dev->setup_ops = &ina2xx_setup_ops; - buffer = devm_iio_kfifo_allocate(&indio_dev->dev); - if (!buffer) - return -enomem; - - iio_device_attach_buffer(indio_dev, buffer); + ret = devm_iio_kfifo_buffer_setup(&client->dev, indio_dev, + indio_buffer_software, + &ina2xx_setup_ops); + if (ret) + return ret; diff --git a/drivers/iio/adc/ti_am335x_adc.c b/drivers/iio/adc/ti_am335x_adc.c --- a/drivers/iio/adc/ti_am335x_adc.c +++ b/drivers/iio/adc/ti_am335x_adc.c - struct iio_buffer *buffer; - buffer = devm_iio_kfifo_allocate(dev); - if (!buffer) - return -enomem; - - iio_device_attach_buffer(indio_dev, buffer); - - ret = devm_request_threaded_irq(dev, irq, pollfunc_th, pollfunc_bh, - flags, indio_dev->name, indio_dev); + ret = devm_iio_kfifo_buffer_setup(dev, indio_dev, + indio_buffer_software, + setup_ops); - indio_dev->setup_ops = setup_ops; - indio_dev->modes |= indio_buffer_software; - - return 0; + return devm_request_threaded_irq(dev, irq, pollfunc_th, pollfunc_bh, + flags, indio_dev->name, indio_dev); diff --git a/drivers/iio/common/cros_ec_sensors/cros_ec_sensors_core.c b/drivers/iio/common/cros_ec_sensors/cros_ec_sensors_core.c --- a/drivers/iio/common/cros_ec_sensors/cros_ec_sensors_core.c +++ b/drivers/iio/common/cros_ec_sensors/cros_ec_sensors_core.c - struct iio_buffer *buffer; - - buffer = devm_iio_kfifo_allocate(dev); - if (!buffer) - return -enomem; - - iio_device_attach_buffer(indio_dev, buffer); - indio_dev->modes = indio_buffer_software; + ret = devm_iio_kfifo_buffer_setup(dev, indio_dev, + indio_buffer_software, + null); + if (ret) + return ret; diff --git a/drivers/iio/gyro/ssp_gyro_sensor.c b/drivers/iio/gyro/ssp_gyro_sensor.c --- a/drivers/iio/gyro/ssp_gyro_sensor.c +++ b/drivers/iio/gyro/ssp_gyro_sensor.c - struct iio_buffer *buffer; - indio_dev->modes = indio_buffer_software; - buffer = devm_iio_kfifo_allocate(&pdev->dev); - if (!buffer) - return -enomem; - - iio_device_attach_buffer(indio_dev, buffer); - - indio_dev->setup_ops = &ssp_gyro_buffer_ops; + ret = devm_iio_kfifo_buffer_setup(&pdev->dev, indio_dev, + indio_buffer_software, + &ssp_gyro_buffer_ops); + if (ret) + return ret; diff --git a/drivers/iio/health/max30100.c b/drivers/iio/health/max30100.c --- a/drivers/iio/health/max30100.c +++ b/drivers/iio/health/max30100.c - struct iio_buffer *buffer; - buffer = devm_iio_kfifo_allocate(&client->dev); - if (!buffer) - return -enomem; - - iio_device_attach_buffer(indio_dev, buffer); - - indio_dev->modes = (indio_buffer_software | indio_direct_mode); - indio_dev->setup_ops = &max30100_buffer_setup_ops; + indio_dev->modes = indio_direct_mode; + + ret = devm_iio_kfifo_buffer_setup(&client->dev, indio_dev, + indio_buffer_software, + &max30100_buffer_setup_ops); + if (ret) + return ret; diff --git a/drivers/iio/health/max30102.c b/drivers/iio/health/max30102.c --- a/drivers/iio/health/max30102.c +++ b/drivers/iio/health/max30102.c - struct iio_buffer *buffer; - buffer = devm_iio_kfifo_allocate(&client->dev); - if (!buffer) - return -enomem; - - iio_device_attach_buffer(indio_dev, buffer); - - indio_dev->modes = (indio_buffer_software | indio_direct_mode); - indio_dev->setup_ops = &max30102_buffer_setup_ops; + indio_dev->modes = indio_direct_mode; + ret = devm_iio_kfifo_buffer_setup(&client->dev, indio_dev, + indio_buffer_software, + &max30102_buffer_setup_ops); + if (ret) + return ret; + diff --git a/drivers/iio/imu/inv_icm42600/inv_icm42600_accel.c b/drivers/iio/imu/inv_icm42600/inv_icm42600_accel.c --- a/drivers/iio/imu/inv_icm42600/inv_icm42600_accel.c +++ b/drivers/iio/imu/inv_icm42600/inv_icm42600_accel.c - struct iio_buffer *buffer; - buffer = devm_iio_kfifo_allocate(dev); - if (!buffer) - return err_ptr(-enomem); - - indio_dev->modes = indio_direct_mode | indio_buffer_software; + indio_dev->modes = indio_direct_mode; - indio_dev->setup_ops = &inv_icm42600_buffer_ops; - iio_device_attach_buffer(indio_dev, buffer); + ret = devm_iio_kfifo_buffer_setup(dev, indio_dev, + indio_buffer_software, + &inv_icm42600_buffer_ops); + if (ret) + return err_ptr(ret); diff --git a/drivers/iio/imu/inv_icm42600/inv_icm42600_gyro.c b/drivers/iio/imu/inv_icm42600/inv_icm42600_gyro.c --- a/drivers/iio/imu/inv_icm42600/inv_icm42600_gyro.c +++ b/drivers/iio/imu/inv_icm42600/inv_icm42600_gyro.c - struct iio_buffer *buffer; - buffer = devm_iio_kfifo_allocate(dev); - if (!buffer) - return err_ptr(-enomem); - - indio_dev->modes = indio_direct_mode | indio_buffer_software; + indio_dev->modes = indio_direct_mode; - iio_device_attach_buffer(indio_dev, buffer); + ret = devm_iio_kfifo_buffer_setup(dev, indio_dev, + indio_buffer_software, + &inv_icm42600_buffer_ops); + if (ret) + return err_ptr(ret); diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c - struct iio_buffer *buffer; - int i; + int i, ret; - buffer = devm_iio_kfifo_allocate(hw->dev); - if (!buffer) - return -enomem; - - iio_device_attach_buffer(hw->iio_devs[i], buffer); - hw->iio_devs[i]->modes |= indio_buffer_software; - hw->iio_devs[i]->setup_ops = &st_lsm6dsx_buffer_ops; + ret = devm_iio_kfifo_buffer_setup(hw->dev, hw->iio_devs[i], + indio_buffer_software, + &st_lsm6dsx_buffer_ops); + if (ret) + return ret; diff --git a/drivers/iio/light/acpi-als.c b/drivers/iio/light/acpi-als.c --- a/drivers/iio/light/acpi-als.c +++ b/drivers/iio/light/acpi-als.c - struct iio_buffer *buffer; + int ret; - indio_dev->modes = indio_buffer_software; - buffer = devm_iio_kfifo_allocate(&device->dev); - if (!buffer) - return -enomem; - - iio_device_attach_buffer(indio_dev, buffer); + ret = devm_iio_kfifo_buffer_setup(&device->dev, indio_dev, + indio_buffer_software, null); + if (ret) + return ret; diff --git a/drivers/iio/light/apds9960.c b/drivers/iio/light/apds9960.c --- a/drivers/iio/light/apds9960.c +++ b/drivers/iio/light/apds9960.c - struct iio_buffer *buffer; - buffer = devm_iio_kfifo_allocate(&client->dev); - if (!buffer) - return -enomem; - - iio_device_attach_buffer(indio_dev, buffer); - - indio_dev->modes = (indio_buffer_software | indio_direct_mode); - indio_dev->setup_ops = &apds9960_buffer_setup_ops; + indio_dev->modes = indio_direct_mode; + + ret = devm_iio_kfifo_buffer_setup(&client->dev, indio_dev, + indio_buffer_software, + &apds9960_buffer_setup_ops); + if (ret) + return ret; diff --git a/drivers/staging/iio/impedance-analyzer/ad5933.c b/drivers/staging/iio/impedance-analyzer/ad5933.c --- a/drivers/staging/iio/impedance-analyzer/ad5933.c +++ b/drivers/staging/iio/impedance-analyzer/ad5933.c -static int ad5933_register_ring_funcs_and_init(struct device *dev, - struct iio_dev *indio_dev) -{ - struct iio_buffer *buffer; - - buffer = devm_iio_kfifo_allocate(dev); - if (!buffer) - return -enomem; - - iio_device_attach_buffer(indio_dev, buffer); - - /* ring buffer functions - here trigger setup related */ - indio_dev->setup_ops = &ad5933_ring_setup_ops; - - return 0; -} - - indio_dev->modes = (indio_buffer_software | indio_direct_mode); + indio_dev->modes = indio_direct_mode; - ret = ad5933_register_ring_funcs_and_init(&client->dev, indio_dev); + ret = devm_iio_kfifo_buffer_setup(&client->dev, indio_dev, + indio_buffer_software, + &ad5933_ring_setup_ops);
Industrial I/O (iio)
17395ce299211a8148ee45d1d71eb740a3fec48d
alexandru ardelean
drivers
staging
accel, adc, common, cros_ec_sensors, gyro, health, iio, impedance-analyzer, imu, inv_icm42600, light, st_lsm6dsx
iio: accel: sca3000: use devm_iio_kfifo_buffer_setup() helper
this change makes use of the devm_iio_kfifo_buffer_setup() helper, however the unwind order is changed. the life-time of the kfifo object is attached to the parent device object. this is to make the driver a bit more consistent with the other iio drivers, even though (as it is now before this change) it shouldn't be a problem.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for multiple iio buffers per iio device
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['c']
1
3
16
--- diff --git a/drivers/iio/accel/sca3000.c b/drivers/iio/accel/sca3000.c --- a/drivers/iio/accel/sca3000.c +++ b/drivers/iio/accel/sca3000.c -static int sca3000_configure_ring(struct iio_dev *indio_dev) -{ - struct iio_buffer *buffer; - - buffer = devm_iio_kfifo_allocate(&indio_dev->dev); - if (!buffer) - return -enomem; - - iio_device_attach_buffer(indio_dev, buffer); - indio_dev->modes |= indio_buffer_software; - - return 0; -} - - ret = sca3000_configure_ring(indio_dev); + ret = devm_iio_kfifo_buffer_setup(&spi->dev, indio_dev, + indio_buffer_software, + &sca3000_ring_setup_ops); - indio_dev->setup_ops = &sca3000_ring_setup_ops;
Industrial I/O (iio)
e03ed893e2cf7305183b3314ae80daa1e97667b2
alexandru ardelean
drivers
iio
accel
iio: kfifo: un-export devm_iio_kfifo_allocate() function
at this point all drivers should use devm_iio_kfifo_buffer_setup() instead of manually allocating via devm_iio_kfifo_allocate() and assigning ops and modes.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for multiple iio buffers per iio device
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['h', 'c', 'rst']
3
1
5
--- diff --git a/documentation/driver-api/driver-model/devres.rst b/documentation/driver-api/driver-model/devres.rst --- a/documentation/driver-api/driver-model/devres.rst +++ b/documentation/driver-api/driver-model/devres.rst - devm_iio_kfifo_allocate() diff --git a/drivers/iio/buffer/kfifo_buf.c b/drivers/iio/buffer/kfifo_buf.c --- a/drivers/iio/buffer/kfifo_buf.c +++ b/drivers/iio/buffer/kfifo_buf.c -struct iio_buffer *devm_iio_kfifo_allocate(struct device *dev) +static struct iio_buffer *devm_iio_kfifo_allocate(struct device *dev) -export_symbol(devm_iio_kfifo_allocate); diff --git a/include/linux/iio/kfifo_buf.h b/include/linux/iio/kfifo_buf.h --- a/include/linux/iio/kfifo_buf.h +++ b/include/linux/iio/kfifo_buf.h -struct iio_buffer *devm_iio_kfifo_allocate(struct device *dev); -
Industrial I/O (iio)
99f6e8215b627730e2e6d371430a1f81e8ed6c27
alexandru ardelean
include
linux
buffer, driver-model, iio
iio: buffer-dma,adi-axi-adc: introduce devm_iio_dmaengine_buffer_setup()
this change does a conversion of the devm_iio_dmaengine_buffer_alloc() to devm_iio_dmaengine_buffer_setup(). this will allocate an iio dma buffer and attach it to the iio device, similar to devm_iio_triggered_buffer_setup() (though the underlying code is different, the final logic is the same).
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for multiple iio buffers per iio device
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['h', 'c', 'rst']
4
38
15
--- diff --git a/documentation/driver-api/driver-model/devres.rst b/documentation/driver-api/driver-model/devres.rst --- a/documentation/driver-api/driver-model/devres.rst +++ b/documentation/driver-api/driver-model/devres.rst + devm_iio_dmaengine_buffer_setup() diff --git a/drivers/iio/adc/adi-axi-adc.c b/drivers/iio/adc/adi-axi-adc.c --- a/drivers/iio/adc/adi-axi-adc.c +++ b/drivers/iio/adc/adi-axi-adc.c - struct iio_buffer *buffer; - buffer = devm_iio_dmaengine_buffer_alloc(indio_dev->dev.parent, - dma_name); - if (is_err(buffer)) - return ptr_err(buffer); - - indio_dev->modes |= indio_buffer_hardware; - iio_device_attach_buffer(indio_dev, buffer); - - return 0; + return devm_iio_dmaengine_buffer_setup(indio_dev->dev.parent, + indio_dev, dma_name); diff --git a/drivers/iio/buffer/industrialio-buffer-dmaengine.c b/drivers/iio/buffer/industrialio-buffer-dmaengine.c --- a/drivers/iio/buffer/industrialio-buffer-dmaengine.c +++ b/drivers/iio/buffer/industrialio-buffer-dmaengine.c -struct iio_buffer *devm_iio_dmaengine_buffer_alloc(struct device *dev, +static struct iio_buffer *devm_iio_dmaengine_buffer_alloc(struct device *dev, -export_symbol_gpl(devm_iio_dmaengine_buffer_alloc); + +/** + * devm_iio_dmaengine_buffer_setup() - setup a dma buffer for an iio device + * @dev: parent device for the buffer + * @indio_dev: iio device to which to attach this buffer. + * @channel: dma channel name, typically "rx". + * + * this allocates a new iio buffer with devm_iio_dmaengine_buffer_alloc() + * and attaches it to an iio device with iio_device_attach_buffer(). + * it also appends the indio_buffer_hardware mode to the supported modes of the + * iio device. + */ +int devm_iio_dmaengine_buffer_setup(struct device *dev, + struct iio_dev *indio_dev, + const char *channel) +{ + struct iio_buffer *buffer; + + buffer = devm_iio_dmaengine_buffer_alloc(indio_dev->dev.parent, + channel); + if (is_err(buffer)) + return ptr_err(buffer); + + indio_dev->modes |= indio_buffer_hardware; + + iio_device_attach_buffer(indio_dev, buffer); + + return 0; +} +export_symbol_gpl(devm_iio_dmaengine_buffer_setup); diff --git a/include/linux/iio/buffer-dmaengine.h b/include/linux/iio/buffer-dmaengine.h --- a/include/linux/iio/buffer-dmaengine.h +++ b/include/linux/iio/buffer-dmaengine.h -struct iio_buffer; +struct iio_dev; -struct iio_buffer *devm_iio_dmaengine_buffer_alloc(struct device *dev, - const char *channel); +int devm_iio_dmaengine_buffer_setup(struct device *dev, + struct iio_dev *indio_dev, + const char *channel);
Industrial I/O (iio)
a02c09e42b3ed6cefae671e302835f1f04bf474e
alexandru ardelean
include
linux
adc, buffer, driver-model, iio
docs: ioctl-number.rst: reserve iio subsystem ioctl() space
currently, only the 'i' 0x90 ioctl() actually exists and is defined in 'include/uapi/linux/iio/events.h'.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for multiple iio buffers per iio device
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['rst']
1
1
0
--- diff --git a/documentation/userspace-api/ioctl/ioctl-number.rst b/documentation/userspace-api/ioctl/ioctl-number.rst --- a/documentation/userspace-api/ioctl/ioctl-number.rst +++ b/documentation/userspace-api/ioctl/ioctl-number.rst +'i' 90-9f 'linux/iio/*.h' iio
Industrial I/O (iio)
c127161865bc21a3fc6adad07b38ce8276ba2f8e
alexandru ardelean
documentation
userspace-api
ioctl
iio: core: register chardev only if needed
we only need a chardev if we need to support buffers and/or events.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for multiple iio buffers per iio device
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['c']
1
18
5
--- diff --git a/drivers/iio/industrialio-core.c b/drivers/iio/industrialio-core.c --- a/drivers/iio/industrialio-core.c +++ b/drivers/iio/industrialio-core.c +static const struct file_operations iio_event_fileops = { + .owner = this_module, + .llseek = noop_llseek, + .unlocked_ioctl = iio_ioctl, + .compat_ioctl = compat_ptr_ioctl, + .open = iio_chrdev_open, + .release = iio_chrdev_release, +}; + + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); - /* configure elements for the chrdev */ - indio_dev->dev.devt = mkdev(major(iio_devt), indio_dev->id); - - cdev_init(&indio_dev->chrdev, &iio_buffer_fileops); + if (indio_dev->buffer) + cdev_init(&indio_dev->chrdev, &iio_buffer_fileops); + else if (iio_dev_opaque->event_interface) + cdev_init(&indio_dev->chrdev, &iio_event_fileops); - indio_dev->chrdev.owner = this_mod; + if (indio_dev->buffer || iio_dev_opaque->event_interface) { + indio_dev->dev.devt = mkdev(major(iio_devt), indio_dev->id); + indio_dev->chrdev.owner = this_mod; + }
Industrial I/O (iio)
8ebaa3ff1e71d428912423f7f4f8001bfb368cc5
alexandru ardelean
drivers
iio
iio: core-trigger: make iio_device_register_trigger_consumer() an int return
oddly enough the noop function is an int-return. this one seems to be void. this change converts it to int, because we want to change how groups are registered. with that change this function could error out with -enomem.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for multiple iio buffers per iio device
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['h', 'c']
2
6
2
--- diff --git a/drivers/iio/iio_core_trigger.h b/drivers/iio/iio_core_trigger.h --- a/drivers/iio/iio_core_trigger.h +++ b/drivers/iio/iio_core_trigger.h + * + * return 0 if successful, negative otherwise -void iio_device_register_trigger_consumer(struct iio_dev *indio_dev); +int iio_device_register_trigger_consumer(struct iio_dev *indio_dev); diff --git a/drivers/iio/industrialio-trigger.c b/drivers/iio/industrialio-trigger.c --- a/drivers/iio/industrialio-trigger.c +++ b/drivers/iio/industrialio-trigger.c -void iio_device_register_trigger_consumer(struct iio_dev *indio_dev) +int iio_device_register_trigger_consumer(struct iio_dev *indio_dev) + + return 0;
Industrial I/O (iio)
e64506bf69b680975c47dcbca2a33fc672b368b5
alexandru ardelean
drivers
iio
iio: core: rework iio device group creation
up until now, the device groups that an iio device had were limited to 6. two of these groups would account for buffer attributes (the buffer/ and scan_elements/ directories).
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for multiple iio buffers per iio device
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['h', 'c']
7
50
15
--- diff --git a/drivers/iio/iio_core.h b/drivers/iio/iio_core.h --- a/drivers/iio/iio_core.h +++ b/drivers/iio/iio_core.h +int iio_device_register_sysfs_group(struct iio_dev *indio_dev, + const struct attribute_group *group); + diff --git a/drivers/iio/industrialio-buffer.c b/drivers/iio/industrialio-buffer.c --- a/drivers/iio/industrialio-buffer.c +++ b/drivers/iio/industrialio-buffer.c - indio_dev->groups[indio_dev->groupcounter++] = &buffer->buffer_group; + ret = iio_device_register_sysfs_group(indio_dev, &buffer->buffer_group); + if (ret) + goto error_free_buffer_attrs; - indio_dev->groups[indio_dev->groupcounter++] = &buffer->scan_el_group; + + ret = iio_device_register_sysfs_group(indio_dev, &buffer->scan_el_group); + if (ret) + goto error_free_scan_el_attrs; +error_free_scan_el_attrs: + kfree(buffer->scan_el_group.attrs); +error_free_buffer_attrs: diff --git a/drivers/iio/industrialio-core.c b/drivers/iio/industrialio-core.c --- a/drivers/iio/industrialio-core.c +++ b/drivers/iio/industrialio-core.c +int iio_device_register_sysfs_group(struct iio_dev *indio_dev, + const struct attribute_group *group) +{ + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); + const struct attribute_group **new, **old = iio_dev_opaque->groups; + unsigned int cnt = iio_dev_opaque->groupcounter; + + new = krealloc(old, sizeof(*new) * (cnt + 2), gfp_kernel); + if (!new) + return -enomem; + + new[iio_dev_opaque->groupcounter++] = group; + new[iio_dev_opaque->groupcounter] = null; + + iio_dev_opaque->groups = new; + + return 0; +} + - indio_dev->groups[indio_dev->groupcounter++] = - &iio_dev_opaque->chan_attr_group; + ret = iio_device_register_sysfs_group(indio_dev, + &iio_dev_opaque->chan_attr_group); + if (ret) + goto error_clear_attrs; + kfree(iio_dev_opaque->groups); - dev->dev.groups = dev->groups; + /* assign device groups now; they should be all registered now */ + indio_dev->dev.groups = iio_dev_opaque->groups; + diff --git a/drivers/iio/industrialio-event.c b/drivers/iio/industrialio-event.c --- a/drivers/iio/industrialio-event.c +++ b/drivers/iio/industrialio-event.c - indio_dev->groups[indio_dev->groupcounter++] = &ev_int->group; + + ret = iio_device_register_sysfs_group(indio_dev, &ev_int->group); + if (ret) + goto error_free_setup_event_lines; diff --git a/drivers/iio/industrialio-trigger.c b/drivers/iio/industrialio-trigger.c --- a/drivers/iio/industrialio-trigger.c +++ b/drivers/iio/industrialio-trigger.c - indio_dev->groups[indio_dev->groupcounter++] = - &iio_trigger_consumer_attr_group; - - return 0; + return iio_device_register_sysfs_group(indio_dev, + &iio_trigger_consumer_attr_group); diff --git a/include/linux/iio/iio-opaque.h b/include/linux/iio/iio-opaque.h --- a/include/linux/iio/iio-opaque.h +++ b/include/linux/iio/iio-opaque.h + * @groups: attribute groups + * @groupcounter: index of next attribute group + const struct attribute_group **groups; + int groupcounter; diff --git a/include/linux/iio/iio.h b/include/linux/iio/iio.h --- a/include/linux/iio/iio.h +++ b/include/linux/iio/iio.h - * @groups: [intern] attribute groups - * @groupcounter: [intern] index of next attribute group -#define iio_max_groups 6 - const struct attribute_group *groups[iio_max_groups + 1]; - int groupcounter;
Industrial I/O (iio)
32f171724e5cbecc80594fb6eced057cfdd6eb6f
alexandru ardelean
include
linux
iio
iio: buffer: group attr count and attr alloc
if we want to merge the attributes of the buffer/ and scan_elements/ directories, we'll need to count all attributes first, then (depending on the attribute group) either allocate 2 attribute groups, or a single one. historically an iio buffer was described by 2 subdirectories under /sys/bus/iio/iio:devicesx (i.e. buffer/ and scan_elements/); these subdirs were actually 2 separate attribute groups on the iio_buffer object.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for multiple iio buffers per iio device
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['c']
1
37
34
--- diff --git a/drivers/iio/industrialio-buffer.c b/drivers/iio/industrialio-buffer.c --- a/drivers/iio/industrialio-buffer.c +++ b/drivers/iio/industrialio-buffer.c - int ret, i, attrn, attrcount; + int ret, i, attrn, scan_el_attrcount, buffer_attrcount; - attrcount = 0; + buffer_attrcount = 0; - while (buffer->attrs[attrcount] != null) - attrcount++; + while (buffer->attrs[buffer_attrcount] != null) + buffer_attrcount++; - attr = kcalloc(attrcount + array_size(iio_buffer_attrs) + 1, - sizeof(struct attribute *), gfp_kernel); - if (!attr) - return -enomem; - - memcpy(attr, iio_buffer_attrs, sizeof(iio_buffer_attrs)); - if (!buffer->access->set_length) - attr[0] = &dev_attr_length_ro.attr; - - if (buffer->access->flags & indio_buffer_flag_fixed_watermark) - attr[2] = &dev_attr_watermark_ro.attr; - - if (buffer->attrs) - memcpy(&attr[array_size(iio_buffer_attrs)], buffer->attrs, - sizeof(struct attribute *) * attrcount); - - attr[attrcount + array_size(iio_buffer_attrs)] = null; - - buffer->buffer_group.name = "buffer"; - buffer->buffer_group.attrs = attr; - - ret = iio_device_register_sysfs_group(indio_dev, &buffer->buffer_group); - if (ret) - goto error_free_buffer_attrs; - - attrcount = 0; + scan_el_attrcount = 0; - attrcount += ret; + scan_el_attrcount += ret; + attr = kcalloc(buffer_attrcount + array_size(iio_buffer_attrs) + 1, + sizeof(*attr), gfp_kernel); + if (!attr) { + ret = -enomem; + goto error_free_scan_mask; + } + + memcpy(attr, iio_buffer_attrs, sizeof(iio_buffer_attrs)); + if (!buffer->access->set_length) + attr[0] = &dev_attr_length_ro.attr; + + if (buffer->access->flags & indio_buffer_flag_fixed_watermark) + attr[2] = &dev_attr_watermark_ro.attr; + + if (buffer->attrs) + memcpy(&attr[array_size(iio_buffer_attrs)], buffer->attrs, + sizeof(struct attribute *) * buffer_attrcount); + + buffer_attrcount += array_size(iio_buffer_attrs); + attr[buffer_attrcount] = null; + + buffer->buffer_group.name = "buffer"; + buffer->buffer_group.attrs = attr; + + ret = iio_device_register_sysfs_group(indio_dev, &buffer->buffer_group); + if (ret) + goto error_free_buffer_attrs; + - buffer->scan_el_group.attrs = kcalloc(attrcount + 1, + buffer->scan_el_group.attrs = kcalloc(scan_el_attrcount + 1, +error_free_buffer_attrs: + kfree(buffer->buffer_group.attrs); -error_free_buffer_attrs: - kfree(buffer->buffer_group.attrs);
Industrial I/O (iio)
e2b4d7aca9db5c1f0789e5a8e0fd1f4953d0be9e
alexandru ardelean
drivers
iio
iio: core: merge buffer/ & scan_elements/ attributes
with this change, we create a new directory for the iio device called buffer0, under which both the old buffer/ and scan_elements/ are stored.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for multiple iio buffers per iio device
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['h', 'c']
3
95
33
--- diff --git a/drivers/iio/industrialio-buffer.c b/drivers/iio/industrialio-buffer.c --- a/drivers/iio/industrialio-buffer.c +++ b/drivers/iio/industrialio-buffer.c -static const char * const iio_scan_elements_group_name = "scan_elements"; - +static int iio_buffer_register_legacy_sysfs_groups(struct iio_dev *indio_dev, + struct attribute **buffer_attrs, + int buffer_attrcount, + int scan_el_attrcount) +{ + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); + struct attribute_group *group; + struct attribute **attrs; + int ret; + + attrs = kcalloc(buffer_attrcount + 1, sizeof(*attrs), gfp_kernel); + if (!attrs) + return -enomem; + + memcpy(attrs, buffer_attrs, buffer_attrcount * sizeof(*attrs)); + + group = &iio_dev_opaque->legacy_buffer_group; + group->attrs = attrs; + group->name = "buffer"; + + ret = iio_device_register_sysfs_group(indio_dev, group); + if (ret) + goto error_free_buffer_attrs; + + attrs = kcalloc(scan_el_attrcount + 1, sizeof(*attrs), gfp_kernel); + if (!attrs) { + ret = -enomem; + goto error_free_buffer_attrs; + } + + memcpy(attrs, &buffer_attrs[buffer_attrcount], + scan_el_attrcount * sizeof(*attrs)); + + group = &iio_dev_opaque->legacy_scan_el_group; + group->attrs = attrs; + group->name = "scan_elements"; + + ret = iio_device_register_sysfs_group(indio_dev, group); + if (ret) + goto error_free_scan_el_attrs; + + return 0; + +error_free_buffer_attrs: + kfree(iio_dev_opaque->legacy_buffer_group.attrs); +error_free_scan_el_attrs: + kfree(iio_dev_opaque->legacy_scan_el_group.attrs); + + return ret; +} + +static void iio_buffer_unregister_legacy_sysfs_groups(struct iio_dev *indio_dev) +{ + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); + + kfree(iio_dev_opaque->legacy_buffer_group.attrs); + kfree(iio_dev_opaque->legacy_scan_el_group.attrs); +} + - struct iio_dev *indio_dev) + struct iio_dev *indio_dev, + int index) - attr = kcalloc(buffer_attrcount + array_size(iio_buffer_attrs) + 1, - sizeof(*attr), gfp_kernel); + attrn = buffer_attrcount + scan_el_attrcount + array_size(iio_buffer_attrs); + attr = kcalloc(attrn + 1, sizeof(* attr), gfp_kernel); - attr[buffer_attrcount] = null; - - buffer->buffer_group.name = "buffer"; - buffer->buffer_group.attrs = attr; - ret = iio_device_register_sysfs_group(indio_dev, &buffer->buffer_group); - if (ret) - goto error_free_buffer_attrs; + attrn = buffer_attrcount; - buffer->scan_el_group.name = iio_scan_elements_group_name; + list_for_each_entry(p, &buffer->scan_el_dev_attr_list, l) + attr[attrn++] = &p->dev_attr.attr; - buffer->scan_el_group.attrs = kcalloc(scan_el_attrcount + 1, - sizeof(buffer->scan_el_group.attrs[0]), - gfp_kernel); - if (buffer->scan_el_group.attrs == null) { + buffer->buffer_group.name = kasprintf(gfp_kernel, "buffer%d", index); + if (!buffer->buffer_group.name) { - goto error_free_scan_mask; + goto error_free_buffer_attrs; - attrn = 0; - list_for_each_entry(p, &buffer->scan_el_dev_attr_list, l) - buffer->scan_el_group.attrs[attrn++] = &p->dev_attr.attr; + buffer->buffer_group.attrs = attr; - ret = iio_device_register_sysfs_group(indio_dev, &buffer->scan_el_group); + ret = iio_device_register_sysfs_group(indio_dev, &buffer->buffer_group); - goto error_free_scan_el_attrs; + goto error_free_buffer_attr_group_name; + + /* we only need to register the legacy groups for the first buffer */ + if (index > 0) + return 0; + + ret = iio_buffer_register_legacy_sysfs_groups(indio_dev, attr, + buffer_attrcount, + scan_el_attrcount); + if (ret) + goto error_free_buffer_attr_group_name; -error_free_scan_el_attrs: - kfree(buffer->scan_el_group.attrs); +error_free_buffer_attr_group_name: + kfree(buffer->buffer_group.name); - return __iio_buffer_alloc_sysfs_and_mask(buffer, indio_dev); + return __iio_buffer_alloc_sysfs_and_mask(buffer, indio_dev, 0); + kfree(buffer->buffer_group.name); - kfree(buffer->scan_el_group.attrs); + iio_buffer_unregister_legacy_sysfs_groups(indio_dev); + diff --git a/include/linux/iio/buffer_impl.h b/include/linux/iio/buffer_impl.h --- a/include/linux/iio/buffer_impl.h +++ b/include/linux/iio/buffer_impl.h - /* @buffer_group: attributes of the buffer group. */ - struct attribute_group buffer_group; - - * @scan_el_group: attribute group for those attributes not - * created from the iio_chan_info array. + * @buffer_group: attributes of the new buffer group. + * includes scan elements attributes. - struct attribute_group scan_el_group; + struct attribute_group buffer_group; diff --git a/include/linux/iio/iio-opaque.h b/include/linux/iio/iio-opaque.h --- a/include/linux/iio/iio-opaque.h +++ b/include/linux/iio/iio-opaque.h + * @legacy_scan_el_group: attribute group for legacy scan elements attribute group + * @legacy_buffer_group: attribute group for legacy buffer attributes group + struct attribute_group legacy_scan_el_group; + struct attribute_group legacy_buffer_group;
Industrial I/O (iio)
d9a625744ed0e452f5c495cd8c51eed4b6623a4c
alexandru ardelean
include
linux
iio
iio: add reference to iio buffer on iio_dev_attr
this change adds a reference to a 'struct iio_buffer' object on the iio_dev_attr object. this way, we can use the created iio_dev_attr objects on per-buffer basis (since they're allocated anyway).
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for multiple iio buffers per iio device
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['h', 'c']
5
16
0
--- diff --git a/drivers/iio/iio_core.h b/drivers/iio/iio_core.h --- a/drivers/iio/iio_core.h +++ b/drivers/iio/iio_core.h +struct iio_buffer; + struct iio_buffer *buffer, diff --git a/drivers/iio/industrialio-buffer.c b/drivers/iio/industrialio-buffer.c --- a/drivers/iio/industrialio-buffer.c +++ b/drivers/iio/industrialio-buffer.c + buffer, + buffer, + buffer, + buffer, diff --git a/drivers/iio/industrialio-core.c b/drivers/iio/industrialio-core.c --- a/drivers/iio/industrialio-core.c +++ b/drivers/iio/industrialio-core.c + struct iio_buffer *buffer, + iio_attr->buffer = buffer; + null, + null, + null, + null, diff --git a/drivers/iio/industrialio-event.c b/drivers/iio/industrialio-event.c --- a/drivers/iio/industrialio-event.c +++ b/drivers/iio/industrialio-event.c + null, diff --git a/include/linux/iio/sysfs.h b/include/linux/iio/sysfs.h --- a/include/linux/iio/sysfs.h +++ b/include/linux/iio/sysfs.h +struct iio_buffer; + * @buffer: the iio buffer to which this attribute belongs to (if any) + struct iio_buffer *buffer;
Industrial I/O (iio)
3e3d11b2e43b9a967d98261250c19636b893b7ed
alexandru ardelean
include
linux
iio
iio: buffer: wrap all buffer attributes into iio_dev_attr
this change wraps all buffer attributes into iio_dev_attr objects, and assigns a reference to the iio buffer they belong to.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for multiple iio buffers per iio device
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['h', 'c']
3
54
29
--- diff --git a/drivers/iio/industrialio-buffer.c b/drivers/iio/industrialio-buffer.c --- a/drivers/iio/industrialio-buffer.c +++ b/drivers/iio/industrialio-buffer.c - struct iio_dev *indio_dev = dev_to_iio_dev(dev); - struct iio_buffer *buffer = indio_dev->buffer; + struct iio_buffer *buffer = to_iio_dev_attr(attr)->buffer; - struct iio_buffer *buffer = indio_dev->buffer; + struct iio_buffer *buffer = this_attr->buffer; - struct iio_dev *indio_dev = dev_to_iio_dev(dev); - struct iio_buffer *buffer = indio_dev->buffer; + struct iio_buffer *buffer = to_iio_dev_attr(attr)->buffer; - struct iio_buffer *buffer = indio_dev->buffer; + struct iio_buffer *buffer = to_iio_dev_attr(attr)->buffer; - &buffer->scan_el_dev_attr_list); + &buffer->buffer_attr_list); - &buffer->scan_el_dev_attr_list); + &buffer->buffer_attr_list); - &buffer->scan_el_dev_attr_list); + &buffer->buffer_attr_list); - &buffer->scan_el_dev_attr_list); + &buffer->buffer_attr_list); - struct iio_dev *indio_dev = dev_to_iio_dev(dev); - struct iio_buffer *buffer = indio_dev->buffer; + struct iio_buffer *buffer = to_iio_dev_attr(attr)->buffer; - struct iio_buffer *buffer = indio_dev->buffer; + struct iio_buffer *buffer = to_iio_dev_attr(attr)->buffer; - struct iio_dev *indio_dev = dev_to_iio_dev(dev); - struct iio_buffer *buffer = indio_dev->buffer; + struct iio_buffer *buffer = to_iio_dev_attr(attr)->buffer; - struct iio_buffer *buffer = indio_dev->buffer; + struct iio_buffer *buffer = to_iio_dev_attr(attr)->buffer; - struct iio_dev *indio_dev = dev_to_iio_dev(dev); - struct iio_buffer *buffer = indio_dev->buffer; + struct iio_buffer *buffer = to_iio_dev_attr(attr)->buffer; - struct iio_buffer *buffer = indio_dev->buffer; + struct iio_buffer *buffer = to_iio_dev_attr(attr)->buffer; - struct iio_dev *indio_dev = dev_to_iio_dev(dev); - struct iio_buffer *buffer = indio_dev->buffer; + struct iio_buffer *buffer = to_iio_dev_attr(attr)->buffer; +#define to_dev_attr(_attr) container_of(_attr, struct device_attribute, attr) + +static struct attribute *iio_buffer_wrap_attr(struct iio_buffer *buffer, + struct attribute *attr) +{ + struct device_attribute *dattr = to_dev_attr(attr); + struct iio_dev_attr *iio_attr; + + iio_attr = kzalloc(sizeof(*iio_attr), gfp_kernel); + if (!iio_attr) + return null; + + iio_attr->buffer = buffer; + memcpy(&iio_attr->dev_attr, dattr, sizeof(iio_attr->dev_attr)); + iio_attr->dev_attr.attr.name = kstrdup_const(attr->name, gfp_kernel); + + list_add(&iio_attr->l, &buffer->buffer_attr_list); + + return &iio_attr->dev_attr.attr; +} + - init_list_head(&buffer->scan_el_dev_attr_list); + init_list_head(&buffer->buffer_attr_list); - attrn = buffer_attrcount; + for (i = 0; i < buffer_attrcount; i++) { + struct attribute *wrapped; + + wrapped = iio_buffer_wrap_attr(buffer, attr[i]); + if (!wrapped) { + ret = -enomem; + goto error_free_scan_mask; + } + attr[i] = wrapped; + } - list_for_each_entry(p, &buffer->scan_el_dev_attr_list, l) + attrn = 0; + list_for_each_entry(p, &buffer->buffer_attr_list, l) - iio_free_chan_devattr_list(&buffer->scan_el_dev_attr_list); + iio_free_chan_devattr_list(&buffer->buffer_attr_list); - iio_free_chan_devattr_list(&buffer->scan_el_dev_attr_list); + iio_free_chan_devattr_list(&buffer->buffer_attr_list); diff --git a/drivers/iio/industrialio-core.c b/drivers/iio/industrialio-core.c --- a/drivers/iio/industrialio-core.c +++ b/drivers/iio/industrialio-core.c - kfree(p->dev_attr.attr.name); + kfree_const(p->dev_attr.attr.name); diff --git a/include/linux/iio/buffer_impl.h b/include/linux/iio/buffer_impl.h --- a/include/linux/iio/buffer_impl.h +++ b/include/linux/iio/buffer_impl.h - /* @scan_el_dev_attr_list: list of scan element related attributes. */ - struct list_head scan_el_dev_attr_list; + /* @buffer_attr_list: list of buffer attributes. */ + struct list_head buffer_attr_list;
Industrial I/O (iio)
15097c7a1adc0554ce8eb6f5fd6758d063bfea44
alexandru ardelean
include
linux
iio
iio: buffer: dmaengine: obtain buffer object from attribute
the reference to the iio buffer object is stored on the attribute object. so we need to unwind it to obtain it.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for multiple iio buffers per iio device
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['c']
1
2
2
--- diff --git a/drivers/iio/buffer/industrialio-buffer-dmaengine.c b/drivers/iio/buffer/industrialio-buffer-dmaengine.c --- a/drivers/iio/buffer/industrialio-buffer-dmaengine.c +++ b/drivers/iio/buffer/industrialio-buffer-dmaengine.c - struct iio_dev *indio_dev = dev_to_iio_dev(dev); + struct iio_buffer *buffer = to_iio_dev_attr(attr)->buffer; - iio_buffer_to_dmaengine_buffer(indio_dev->buffer); + iio_buffer_to_dmaengine_buffer(buffer);
Industrial I/O (iio)
4991f3ea2aec5dd8c5abdb40a360258dd71eddf4
alexandru ardelean
drivers
iio
buffer
iio: core: wrap iio device & buffer into struct for character devices
in order to keep backwards compatibility with the current chardev mechanism, and in order to add support for multiple buffers per iio device, we need to pass both the iio device & iio buffer to the chardev.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for multiple iio buffers per iio device
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['h', 'c']
3
27
6
--- diff --git a/drivers/iio/iio_core.h b/drivers/iio/iio_core.h --- a/drivers/iio/iio_core.h +++ b/drivers/iio/iio_core.h +struct iio_dev_buffer_pair { + struct iio_dev *indio_dev; + struct iio_buffer *buffer; +}; + diff --git a/drivers/iio/industrialio-buffer.c b/drivers/iio/industrialio-buffer.c --- a/drivers/iio/industrialio-buffer.c +++ b/drivers/iio/industrialio-buffer.c - struct iio_dev *indio_dev = filp->private_data; - struct iio_buffer *rb = indio_dev->buffer; + struct iio_dev_buffer_pair *ib = filp->private_data; + struct iio_buffer *rb = ib->buffer; + struct iio_dev *indio_dev = ib->indio_dev; - struct iio_dev *indio_dev = filp->private_data; - struct iio_buffer *rb = indio_dev->buffer; + struct iio_dev_buffer_pair *ib = filp->private_data; + struct iio_buffer *rb = ib->buffer; + struct iio_dev *indio_dev = ib->indio_dev; diff --git a/drivers/iio/industrialio-core.c b/drivers/iio/industrialio-core.c --- a/drivers/iio/industrialio-core.c +++ b/drivers/iio/industrialio-core.c + struct iio_dev_buffer_pair *ib; - filp->private_data = indio_dev; + ib = kmalloc(sizeof(*ib), gfp_kernel); + if (!ib) { + iio_device_put(indio_dev); + clear_bit(iio_busy_bit_pos, &indio_dev->flags); + return -enomem; + } + + ib->indio_dev = indio_dev; + ib->buffer = indio_dev->buffer; + + filp->private_data = ib; + struct iio_dev_buffer_pair *ib = filp->private_data; + kfree(ib); - struct iio_dev *indio_dev = filp->private_data; + struct iio_dev_buffer_pair *ib = filp->private_data; + struct iio_dev *indio_dev = ib->indio_dev;
Industrial I/O (iio)
be24dcb113675f72c2b95c96a55d8aae4964cdc6
alexandru ardelean
drivers
iio
iio: buffer: move __iio_buffer_free_sysfs_and_mask() before alloc
the __iio_buffer_free_sysfs_and_mask() function will be used in iio_buffer_alloc_sysfs_and_mask() when multiple buffers will be attached to the iio device. this will need to be used to cleanup resources on each buffer, when the buffers cleanup unwind will occur on the error path.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for multiple iio buffers per iio device
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['c']
1
8
8
--- diff --git a/drivers/iio/industrialio-buffer.c b/drivers/iio/industrialio-buffer.c --- a/drivers/iio/industrialio-buffer.c +++ b/drivers/iio/industrialio-buffer.c +static void __iio_buffer_free_sysfs_and_mask(struct iio_buffer *buffer) +{ + bitmap_free(buffer->scan_mask); + kfree(buffer->buffer_group.name); + kfree(buffer->buffer_group.attrs); + iio_free_chan_devattr_list(&buffer->buffer_attr_list); +} + -static void __iio_buffer_free_sysfs_and_mask(struct iio_buffer *buffer) -{ - bitmap_free(buffer->scan_mask); - kfree(buffer->buffer_group.name); - kfree(buffer->buffer_group.attrs); - iio_free_chan_devattr_list(&buffer->buffer_attr_list); -} -
Industrial I/O (iio)
0224af85a77be1ebdf5256f0d6738b0f7250f41d
alexandru ardelean
drivers
iio
iio: dummy: iio_simple_dummy_buffer: use triggered buffer core calls
the iio_simple_dummy_configure_buffer() function is essentially a re-implementation of the iio_triggered_buffer_setup() function.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for multiple iio buffers per iio device
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['c']
1
6
62
--- diff --git a/drivers/iio/dummy/iio_simple_dummy_buffer.c b/drivers/iio/dummy/iio_simple_dummy_buffer.c --- a/drivers/iio/dummy/iio_simple_dummy_buffer.c +++ b/drivers/iio/dummy/iio_simple_dummy_buffer.c -#include <linux/iio/trigger_consumer.h> -#include <linux/iio/kfifo_buf.h> +#include <linux/iio/trigger_consumer.h> +#include <linux/iio/triggered_buffer.h> - int ret; - struct iio_buffer *buffer; - - /* allocate a buffer to use - here a kfifo */ - buffer = iio_kfifo_allocate(); - if (!buffer) { - ret = -enomem; - goto error_ret; - } - - iio_device_attach_buffer(indio_dev, buffer); - - /* - * tell the core what device type specific functions should - * be run on either side of buffer capture enable / disable. - */ - indio_dev->setup_ops = &iio_simple_dummy_buffer_setup_ops; - - /* - * configure a polling function. - * when a trigger event with this polling function connected - * occurs, this function is run. typically this grabs data - * from the device. - * - * null for the bottom half. this is normally implemented only if we - * either want to ping a capture now pin (no sleeping) or grab - * a timestamp as close as possible to a data ready trigger firing. - * - * irqf_oneshot ensures irqs are masked such that only one instance - * of the handler can run at a time. - * - * "iio_simple_dummy_consumer%d" formatting string for the irq 'name' - * as seen under /proc/interrupts. remaining parameters as per printk. - */ - indio_dev->pollfunc = iio_alloc_pollfunc(null, - &iio_simple_dummy_trigger_h, - irqf_oneshot, - indio_dev, - "iio_simple_dummy_consumer%d", - indio_dev->id); - - if (!indio_dev->pollfunc) { - ret = -enomem; - goto error_free_buffer; - } - - /* - * notify the core that this device is capable of buffered capture - * driven by a trigger. - */ - indio_dev->modes |= indio_buffer_triggered; - - return 0; - -error_free_buffer: - iio_kfifo_free(indio_dev->buffer); -error_ret: - return ret; + return iio_triggered_buffer_setup(indio_dev, null, + iio_simple_dummy_trigger_h, + &iio_simple_dummy_buffer_setup_ops); - iio_dealloc_pollfunc(indio_dev->pollfunc); - iio_kfifo_free(indio_dev->buffer); + iio_triggered_buffer_cleanup(indio_dev);
Industrial I/O (iio)
738f6ba1180046904402ffbe210fbd2fa2c4b050
alexandru ardelean
drivers
iio
dummy
iio: buffer: introduce support for attaching more iio buffers
with this change, calling iio_device_attach_buffer() will actually attach more buffers. right now this doesn't do any validation of whether a buffer is attached twice; maybe that can be added later (if needed). attaching a buffer more than once should yield noticeably bad results.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for multiple iio buffers per iio device
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['h', 'c']
9
111
40
--- diff --git a/drivers/iio/buffer/industrialio-buffer-dmaengine.c b/drivers/iio/buffer/industrialio-buffer-dmaengine.c --- a/drivers/iio/buffer/industrialio-buffer-dmaengine.c +++ b/drivers/iio/buffer/industrialio-buffer-dmaengine.c - iio_device_attach_buffer(indio_dev, buffer); - - return 0; + return iio_device_attach_buffer(indio_dev, buffer); diff --git a/drivers/iio/buffer/industrialio-triggered-buffer.c b/drivers/iio/buffer/industrialio-triggered-buffer.c --- a/drivers/iio/buffer/industrialio-triggered-buffer.c +++ b/drivers/iio/buffer/industrialio-triggered-buffer.c - iio_device_attach_buffer(indio_dev, buffer); - + ret = iio_device_attach_buffer(indio_dev, buffer); + if (ret < 0) + goto error_dealloc_pollfunc; + +error_dealloc_pollfunc: + iio_dealloc_pollfunc(indio_dev->pollfunc); - iio_kfifo_free(indio_dev->buffer); + iio_kfifo_free(buffer); diff --git a/drivers/iio/buffer/kfifo_buf.c b/drivers/iio/buffer/kfifo_buf.c --- a/drivers/iio/buffer/kfifo_buf.c +++ b/drivers/iio/buffer/kfifo_buf.c - iio_device_attach_buffer(indio_dev, buffer); - - return 0; + return iio_device_attach_buffer(indio_dev, buffer); diff --git a/drivers/iio/iio_core.h b/drivers/iio/iio_core.h --- a/drivers/iio/iio_core.h +++ b/drivers/iio/iio_core.h -int iio_buffer_alloc_sysfs_and_mask(struct iio_dev *indio_dev); -void iio_buffer_free_sysfs_and_mask(struct iio_dev *indio_dev); +int iio_buffers_alloc_sysfs_and_mask(struct iio_dev *indio_dev); +void iio_buffers_free_sysfs_and_mask(struct iio_dev *indio_dev); +void iio_buffers_put(struct iio_dev *indio_dev); -static inline int iio_buffer_alloc_sysfs_and_mask(struct iio_dev *indio_dev) +static inline int iio_buffers_alloc_sysfs_and_mask(struct iio_dev *indio_dev) -static inline void iio_buffer_free_sysfs_and_mask(struct iio_dev *indio_dev) {} +static inline void iio_buffers_free_sysfs_and_mask(struct iio_dev *indio_dev) {} +static inline void iio_buffers_put(struct iio_dev *indio_dev) {} diff --git a/drivers/iio/industrialio-buffer.c b/drivers/iio/industrialio-buffer.c --- a/drivers/iio/industrialio-buffer.c +++ b/drivers/iio/industrialio-buffer.c - struct iio_buffer *buffer = indio_dev->buffer; - - if (!buffer) - return; + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); + struct iio_buffer *buffer; + unsigned int i; - wake_up(&buffer->pollq); + for (i = 0; i < iio_dev_opaque->attached_buffers_cnt; i++) { + buffer = iio_dev_opaque->attached_buffers[i]; + wake_up(&buffer->pollq); + } +void iio_buffers_put(struct iio_dev *indio_dev) +{ + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); + struct iio_buffer *buffer; + unsigned int i; + + for (i = 0; i < iio_dev_opaque->attached_buffers_cnt; i++) { + buffer = iio_dev_opaque->attached_buffers[i]; + iio_buffer_put(buffer); + } +} + -int iio_buffer_alloc_sysfs_and_mask(struct iio_dev *indio_dev) +int iio_buffers_alloc_sysfs_and_mask(struct iio_dev *indio_dev) - struct iio_buffer *buffer = indio_dev->buffer; + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); - int i; + struct iio_buffer *buffer; + int unwind_idx; + int ret, i; - if (!buffer) + if (!iio_dev_opaque->attached_buffers_cnt) - return __iio_buffer_alloc_sysfs_and_mask(buffer, indio_dev, 0); + for (i = 0; i < iio_dev_opaque->attached_buffers_cnt; i++) { + buffer = iio_dev_opaque->attached_buffers[i]; + ret = __iio_buffer_alloc_sysfs_and_mask(buffer, indio_dev, i); + if (ret) { + unwind_idx = i; + goto error_unwind_sysfs_and_mask; + } + } + + return 0; + +error_unwind_sysfs_and_mask: + for (; unwind_idx >= 0; unwind_idx--) { + buffer = iio_dev_opaque->attached_buffers[unwind_idx]; + __iio_buffer_free_sysfs_and_mask(buffer); + } + kfree(iio_dev_opaque->attached_buffers); + return ret; -void iio_buffer_free_sysfs_and_mask(struct iio_dev *indio_dev) +void iio_buffers_free_sysfs_and_mask(struct iio_dev *indio_dev) - struct iio_buffer *buffer = indio_dev->buffer; + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); + struct iio_buffer *buffer; + int i; - if (!buffer) + if (!iio_dev_opaque->attached_buffers_cnt) - __iio_buffer_free_sysfs_and_mask(buffer); + for (i = iio_dev_opaque->attached_buffers_cnt - 1; i >= 0; i--) { + buffer = iio_dev_opaque->attached_buffers[i]; + __iio_buffer_free_sysfs_and_mask(buffer); + } + + kfree(iio_dev_opaque->attached_buffers); + * return 0 if successful, negative if error. + * - * the device until the device is freed. the function should only be called at - * most once per device. + * the device until the device is freed. for legacy reasons, the first attached + * buffer will also be assigned to 'indio_dev->buffer'. -void iio_device_attach_buffer(struct iio_dev *indio_dev, - struct iio_buffer *buffer) +int iio_device_attach_buffer(struct iio_dev *indio_dev, + struct iio_buffer *buffer) - indio_dev->buffer = iio_buffer_get(buffer); + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); + struct iio_buffer **new, **old = iio_dev_opaque->attached_buffers; + unsigned int cnt = iio_dev_opaque->attached_buffers_cnt; + + cnt++; + + new = krealloc(old, sizeof(*new) * cnt, gfp_kernel); + if (!new) + return -enomem; + iio_dev_opaque->attached_buffers = new; + + buffer = iio_buffer_get(buffer); + + /* first buffer is legacy; attach it to the iio device directly */ + if (!indio_dev->buffer) + indio_dev->buffer = buffer; + + iio_dev_opaque->attached_buffers[cnt - 1] = buffer; + iio_dev_opaque->attached_buffers_cnt = cnt; + + return 0; diff --git a/drivers/iio/industrialio-core.c b/drivers/iio/industrialio-core.c --- a/drivers/iio/industrialio-core.c +++ b/drivers/iio/industrialio-core.c - iio_buffer_put(indio_dev->buffer); + iio_buffers_put(indio_dev); - ret = iio_buffer_alloc_sysfs_and_mask(indio_dev); + ret = iio_buffers_alloc_sysfs_and_mask(indio_dev); - if (indio_dev->buffer) + if (iio_dev_opaque->attached_buffers_cnt) - if (indio_dev->buffer || iio_dev_opaque->event_interface) { + if (iio_dev_opaque->attached_buffers_cnt || iio_dev_opaque->event_interface) { - iio_buffer_free_sysfs_and_mask(indio_dev); + iio_buffers_free_sysfs_and_mask(indio_dev); - iio_buffer_free_sysfs_and_mask(indio_dev); + iio_buffers_free_sysfs_and_mask(indio_dev); diff --git a/include/linux/iio/buffer.h b/include/linux/iio/buffer.h --- a/include/linux/iio/buffer.h +++ b/include/linux/iio/buffer.h -void iio_device_attach_buffer(struct iio_dev *indio_dev, - struct iio_buffer *buffer); +int iio_device_attach_buffer(struct iio_dev *indio_dev, + struct iio_buffer *buffer); diff --git a/include/linux/iio/buffer_impl.h b/include/linux/iio/buffer_impl.h --- a/include/linux/iio/buffer_impl.h +++ b/include/linux/iio/buffer_impl.h + /* @attached_entry: entry in the devices list of buffers attached by the driver. */ + struct list_head attached_entry; + diff --git a/include/linux/iio/iio-opaque.h b/include/linux/iio/iio-opaque.h --- a/include/linux/iio/iio-opaque.h +++ b/include/linux/iio/iio-opaque.h + * @attached_buffers: array of buffers statically attached by the driver + * @attached_buffers_cnt: number of buffers in the array of statically attached buffers + struct iio_buffer **attached_buffers; + unsigned int attached_buffers_cnt;
Industrial I/O (iio)
ee708e6baacd3afdace9b721c25fbbe106cebb94
alexandru ardelean
include
linux
buffer, iio
iio: buffer: add ioctl() to support opening extra buffers for iio device
with this change, an ioctl() call is added to open a character device for a buffer. the ioctl() number is 'i' 0x91, which follows the iio_get_event_fd_ioctl ioctl.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for multiple iio buffers per iio device
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['h', 'c']
5
162
11
------------------------------------------------------------------- ------------------------------------------------------------------- ------------------------------------------------------------------- ------------------------------------------------------------------- --- diff --git a/drivers/iio/iio_core.h b/drivers/iio/iio_core.h --- a/drivers/iio/iio_core.h +++ b/drivers/iio/iio_core.h -__poll_t iio_buffer_poll(struct file *filp, - struct poll_table_struct *wait); -ssize_t iio_buffer_read_outer(struct file *filp, char __user *buf, - size_t n, loff_t *f_ps); +__poll_t iio_buffer_poll_wrapper(struct file *filp, + struct poll_table_struct *wait); +ssize_t iio_buffer_read_wrapper(struct file *filp, char __user *buf, + size_t n, loff_t *f_ps); -#define iio_buffer_poll_addr (&iio_buffer_poll) -#define iio_buffer_read_outer_addr (&iio_buffer_read_outer) +#define iio_buffer_poll_addr (&iio_buffer_poll_wrapper) +#define iio_buffer_read_outer_addr (&iio_buffer_read_wrapper) diff --git a/drivers/iio/industrialio-buffer.c b/drivers/iio/industrialio-buffer.c --- a/drivers/iio/industrialio-buffer.c +++ b/drivers/iio/industrialio-buffer.c +#include <linux/anon_inodes.h> +#include <linux/file.h> - * iio_buffer_read_outer() - chrdev read for buffer access + * iio_buffer_read() - chrdev read for buffer access -ssize_t iio_buffer_read_outer(struct file *filp, char __user *buf, - size_t n, loff_t *f_ps) +static ssize_t iio_buffer_read(struct file *filp, char __user *buf, + size_t n, loff_t *f_ps) -__poll_t iio_buffer_poll(struct file *filp, - struct poll_table_struct *wait) +static __poll_t iio_buffer_poll(struct file *filp, + struct poll_table_struct *wait) +ssize_t iio_buffer_read_wrapper(struct file *filp, char __user *buf, + size_t n, loff_t *f_ps) +{ + struct iio_dev_buffer_pair *ib = filp->private_data; + struct iio_buffer *rb = ib->buffer; + + /* check if buffer was opened through new api */ + if (test_bit(iio_busy_bit_pos, &rb->flags)) + return -ebusy; + + return iio_buffer_read(filp, buf, n, f_ps); +} + +__poll_t iio_buffer_poll_wrapper(struct file *filp, + struct poll_table_struct *wait) +{ + struct iio_dev_buffer_pair *ib = filp->private_data; + struct iio_buffer *rb = ib->buffer; + + /* check if buffer was opened through new api */ + if (test_bit(iio_busy_bit_pos, &rb->flags)) + return 0; + + return iio_buffer_poll(filp, wait); +} + +static int iio_buffer_chrdev_release(struct inode *inode, struct file *filep) +{ + struct iio_dev_buffer_pair *ib = filep->private_data; + struct iio_dev *indio_dev = ib->indio_dev; + struct iio_buffer *buffer = ib->buffer; + + wake_up(&buffer->pollq); + + kfree(ib); + clear_bit(iio_busy_bit_pos, &buffer->flags); + iio_device_put(indio_dev); + + return 0; +} + +static const struct file_operations iio_buffer_chrdev_fileops = { + .owner = this_module, + .llseek = noop_llseek, + .read = iio_buffer_read, + .poll = iio_buffer_poll, + .release = iio_buffer_chrdev_release, +}; + +static long iio_device_buffer_getfd(struct iio_dev *indio_dev, unsigned long arg) +{ + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); + int __user *ival = (int __user *)arg; + struct iio_dev_buffer_pair *ib; + struct iio_buffer *buffer; + int fd, idx, ret; + + if (copy_from_user(&idx, ival, sizeof(idx))) + return -efault; + + if (idx >= iio_dev_opaque->attached_buffers_cnt) + return -enodev; + + iio_device_get(indio_dev); + + buffer = iio_dev_opaque->attached_buffers[idx]; + + if (test_and_set_bit(iio_busy_bit_pos, &buffer->flags)) { + ret = -ebusy; + goto error_iio_dev_put; + } + + ib = kzalloc(sizeof(*ib), gfp_kernel); + if (!ib) { + ret = -enomem; + goto error_clear_busy_bit; + } + + ib->indio_dev = indio_dev; + ib->buffer = buffer; + + fd = anon_inode_getfd("iio:buffer", &iio_buffer_chrdev_fileops, + ib, o_rdwr | o_cloexec); + if (fd < 0) { + ret = fd; + goto error_free_ib; + } + + if (copy_to_user(ival, &fd, sizeof(fd))) { + put_unused_fd(fd); + ret = -efault; + goto error_free_ib; + } + + return fd; + +error_free_ib: + kfree(ib); +error_clear_busy_bit: + clear_bit(iio_busy_bit_pos, &buffer->flags); +error_iio_dev_put: + iio_device_put(indio_dev); + return ret; +} + +static long iio_device_buffer_ioctl(struct iio_dev *indio_dev, struct file *filp, + unsigned int cmd, unsigned long arg) +{ + switch (cmd) { + case iio_buffer_get_fd_ioctl: + return iio_device_buffer_getfd(indio_dev, arg); + default: + return iio_ioctl_unhandled; + } +} + + size_t sz; + unwind_idx = iio_dev_opaque->attached_buffers_cnt - 1; + + sz = sizeof(*(iio_dev_opaque->buffer_ioctl_handler)); + iio_dev_opaque->buffer_ioctl_handler = kzalloc(sz, gfp_kernel); + if (!iio_dev_opaque->buffer_ioctl_handler) { + ret = -enomem; + goto error_unwind_sysfs_and_mask; + } + + iio_dev_opaque->buffer_ioctl_handler->ioctl = iio_device_buffer_ioctl; + iio_device_ioctl_handler_register(indio_dev, + iio_dev_opaque->buffer_ioctl_handler); + iio_device_ioctl_handler_unregister(iio_dev_opaque->buffer_ioctl_handler); + kfree(iio_dev_opaque->buffer_ioctl_handler); + diff --git a/include/linux/iio/buffer_impl.h b/include/linux/iio/buffer_impl.h --- a/include/linux/iio/buffer_impl.h +++ b/include/linux/iio/buffer_impl.h +#include <uapi/linux/iio/buffer.h> + + /** @flags: file ops flags including busy flag. */ + unsigned long flags; + diff --git a/include/linux/iio/iio-opaque.h b/include/linux/iio/iio-opaque.h --- a/include/linux/iio/iio-opaque.h +++ b/include/linux/iio/iio-opaque.h + * @buffer_ioctl_handler: ioctl() handler for this iio device's buffer interface + struct iio_ioctl_handler *buffer_ioctl_handler; diff --git a/include/uapi/linux/iio/buffer.h b/include/uapi/linux/iio/buffer.h --- /dev/null +++ b/include/uapi/linux/iio/buffer.h +/* spdx-license-identifier: gpl-2.0 with linux-syscall-note */ +/* industrial i/o buffer definitions needed both in and out of kernel + */ + +#ifndef _uapi_iio_buffer_h_ +#define _uapi_iio_buffer_h_ + +#define iio_buffer_get_fd_ioctl _iowr('i', 0x91, int) + +#endif /* _uapi_iio_buffer_h_ */
Industrial I/O (iio)
f73f7f4da581875f9b1f2fb8ebd1ab15ed634488
alexandru ardelean
include
linux
iio, linux
iio: core: rename 'dev' -> 'indio_dev' in iio_device_alloc()
the 'dev' variable name usually refers to 'struct device' types. however in iio_device_alloc() this was used for the 'struct iio_dev' type, which was sometimes causing minor confusions.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for multiple iio buffers per iio device
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['c']
1
14
14
--- diff --git a/drivers/iio/industrialio-core.c b/drivers/iio/industrialio-core.c --- a/drivers/iio/industrialio-core.c +++ b/drivers/iio/industrialio-core.c - struct iio_dev *dev; + struct iio_dev *indio_dev; - dev = &iio_dev_opaque->indio_dev; - dev->priv = (char *)iio_dev_opaque + + indio_dev = &iio_dev_opaque->indio_dev; + indio_dev->priv = (char *)iio_dev_opaque + - dev->dev.parent = parent; - dev->dev.type = &iio_device_type; - dev->dev.bus = &iio_bus_type; - device_initialize(&dev->dev); - dev_set_drvdata(&dev->dev, (void *)dev); - mutex_init(&dev->mlock); - mutex_init(&dev->info_exist_lock); + indio_dev->dev.parent = parent; + indio_dev->dev.type = &iio_device_type; + indio_dev->dev.bus = &iio_bus_type; + device_initialize(&indio_dev->dev); + dev_set_drvdata(&indio_dev->dev, (void *)indio_dev); + mutex_init(&indio_dev->mlock); + mutex_init(&indio_dev->info_exist_lock); - dev->id = ida_simple_get(&iio_ida, 0, 0, gfp_kernel); - if (dev->id < 0) { + indio_dev->id = ida_simple_get(&iio_ida, 0, 0, gfp_kernel); + if (indio_dev->id < 0) { - dev_set_name(&dev->dev, "iio:device%d", dev->id); + dev_set_name(&indio_dev->dev, "iio:device%d", indio_dev->id); - return dev; + return indio_dev;
Industrial I/O (iio)
0d596bb2ad0dbefc7c3e6072acb64b379888ee3d
alexandru ardelean
drivers
iio
tools: iio: make iioutils_get_type() private in iio_utils
this is a bit of a tidy-up, but also helps with extending the iioutils_get_type() function a bit, as we don't need to use it outside of the iio_utils.c file. so, we'll need to update it only in one place.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for multiple iio buffers per iio device
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['h', 'c']
2
5
8
--- diff --git a/tools/iio/iio_utils.c b/tools/iio/iio_utils.c --- a/tools/iio/iio_utils.c +++ b/tools/iio/iio_utils.c -int iioutils_get_type(unsigned *is_signed, unsigned *bytes, unsigned *bits_used, - unsigned *shift, uint64_t *mask, unsigned *be, - const char *device_dir, const char *name, - const char *generic_name) +static int iioutils_get_type(unsigned int *is_signed, unsigned int *bytes, + unsigned int *bits_used, unsigned int *shift, + uint64_t *mask, unsigned int *be, + const char *device_dir, const char *name, + const char *generic_name) diff --git a/tools/iio/iio_utils.h b/tools/iio/iio_utils.h --- a/tools/iio/iio_utils.h +++ b/tools/iio/iio_utils.h -int iioutils_get_type(unsigned *is_signed, unsigned *bytes, unsigned *bits_used, - unsigned *shift, uint64_t *mask, unsigned *be, - const char *device_dir, const char *name, - const char *generic_name);
Industrial I/O (iio)
a605c8f4e71c35fddb9b13785f4ea5c24e273aa2
alexandru ardelean
tools
iio
tools: iio: privatize globals and functions in iio_generic_buffer.c file
mostly a tidy-up. but also helps to understand the limits of scope of these functions and globals.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for multiple iio buffers per iio device
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['c']
1
15
16
--- diff --git a/tools/iio/iio_generic_buffer.c b/tools/iio/iio_generic_buffer.c --- a/tools/iio/iio_generic_buffer.c +++ b/tools/iio/iio_generic_buffer.c -int size_from_channelarray(struct iio_channel_info *channels, int num_channels) +static int size_from_channelarray(struct iio_channel_info *channels, int num_channels) -void print1byte(uint8_t input, struct iio_channel_info *info) +static void print1byte(uint8_t input, struct iio_channel_info *info) -void print2byte(uint16_t input, struct iio_channel_info *info) +static void print2byte(uint16_t input, struct iio_channel_info *info) -void print4byte(uint32_t input, struct iio_channel_info *info) +static void print4byte(uint32_t input, struct iio_channel_info *info) -void print8byte(uint64_t input, struct iio_channel_info *info) +static void print8byte(uint64_t input, struct iio_channel_info *info) -void process_scan(char *data, - struct iio_channel_info *channels, - int num_channels) +static void process_scan(char *data, struct iio_channel_info *channels, + int num_channels) -void print_usage(void) +static void print_usage(void) -enum autochan autochannels = autochannels_disabled; -char *dev_dir_name = null; -char *buf_dir_name = null; -bool current_trigger_set = false; +static enum autochan autochannels = autochannels_disabled; +static char *dev_dir_name = null; +static char *buf_dir_name = null; +static bool current_trigger_set = false; -void cleanup(void) +static void cleanup(void) -void sig_handler(int signum) +static void sig_handler(int signum) -void register_cleanup(void) +static void register_cleanup(void)
Industrial I/O (iio)
ebe5112535b5cf389ca7d337cf6a0c1d885f9880
alexandru ardelean
tools
iio
tools: iio: convert iio_generic_buffer to use new iio buffer api
this change makes use of the new iio buffer api to read data from an iio buffer. it doesn't read the /sys/bus/iio/devices/iio:devicex/scan_elements dir anymore, it reads /sys/bus/iio/devices/iio:devicex/buffery, where all the scan_elements have been merged together with the old/classical buffer attributes.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for multiple iio buffers per iio device
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['h', 'c', 'makefile']
4
107
33
--- diff --git a/tools/iio/makefile b/tools/iio/makefile --- a/tools/iio/makefile +++ b/tools/iio/makefile + ln -sf $(curdir)/../../include/uapi/linux/iio/buffer.h $@ diff --git a/tools/iio/iio_generic_buffer.c b/tools/iio/iio_generic_buffer.c --- a/tools/iio/iio_generic_buffer.c +++ b/tools/iio/iio_generic_buffer.c +#include <sys/ioctl.h> +#include <linux/iio/buffer.h> -static int enable_disable_all_channels(char *dev_dir_name, int enable) +static int enable_disable_all_channels(char *dev_dir_name, int buffer_idx, int enable) - format_scan_elements_dir, dev_dir_name); + format_scan_elements_dir, dev_dir_name, buffer_idx); + " -b <n> the buffer which to open (by index), default 0 " +static int buffer_idx = 0; - ret = enable_disable_all_channels(dev_dir_name, 0); + ret = enable_disable_all_channels(dev_dir_name, buffer_idx, 0); - int fp = -1; + struct stat st; + int fd = -1; + int buf_fd = -1; - while ((c = getopt_long(argc, argv, "aac:egl:n:n:t:t:w:?", longopts, + while ((c = getopt_long(argc, argv, "aab:c:egl:n:n:t:t:w:?", longopts, - break; + break; + case 'b': + errno = 0; + buffer_idx = strtoll(optarg, &dummy, 10); + if (errno) { + ret = -errno; + goto error; + } + if (buffer_idx < 0) { + ret = -erange; + goto error; + } + + break; - ret = build_channel_array(dev_dir_name, &channels, &num_channels); + ret = build_channel_array(dev_dir_name, buffer_idx, &channels, &num_channels); - ret = enable_disable_all_channels(dev_dir_name, 1); + ret = enable_disable_all_channels(dev_dir_name, buffer_idx, 1); - ret = build_channel_array(dev_dir_name, &channels, + ret = build_channel_array(dev_dir_name, buffer_idx, &channels, - "try again. ", dev_dir_name); + "try again. ", dev_dir_name, buffer_idx); - "%siio:device%d/buffer", iio_dir, dev_num); + "%siio:device%d/buffer%d", iio_dir, dev_num, buffer_idx); + if (stat(buf_dir_name, &st)) { + fprintf(stderr, "could not stat() '%s', got error %d: %s ", + buf_dir_name, errno, strerror(errno)); + ret = -errno; + goto error; + } + + if (!s_isdir(st.st_mode)) { + fprintf(stderr, "file '%s' is not a directory ", buf_dir_name); + ret = -efault; + goto error; + } + + ret = asprintf(&buffer_access, "/dev/iio:device%d", dev_num); + if (ret < 0) { + ret = -enomem; + goto error; + } + + /* attempt to open non blocking the access dev */ + fd = open(buffer_access, o_rdonly | o_nonblock); + if (fd == -1) { /* todo: if it isn't there make the node */ + ret = -errno; + fprintf(stderr, "failed to open %s ", buffer_access); + goto error; + } + + /* specify for which buffer index we want an fd */ + buf_fd = buffer_idx; + + ret = ioctl(fd, iio_buffer_get_fd_ioctl, &buf_fd); + if (ret == -1 || buf_fd == -1) { + ret = -errno; + if (ret == -enodev || ret == -einval) + fprintf(stderr, + "device does not have this many buffers "); + else + fprintf(stderr, "failed to retrieve buffer fd "); + + goto error; + } + - "failed to enable buffer: %s ", strerror(-ret)); + "failed to enable buffer '%s': %s ", + buf_dir_name, strerror(-ret)); - ret = asprintf(&buffer_access, "/dev/iio:device%d", dev_num); - if (ret < 0) { - ret = -enomem; - goto error; + /** + * this check is being done here for sanity reasons, however it + * should be omitted under normal operation. + * if this is buffer0, we check that we get ebusy after this point. + */ + if (buffer_idx == 0) { + errno = 0; + read_size = read(fd, data, 1); + if (read_size > -1 || errno != ebusy) { + ret = -efault; + perror("reading from '%s' should not be possible after ioctl()"); + goto error; + } - /* attempt to open non blocking the access dev */ - fp = open(buffer_access, o_rdonly | o_nonblock); - if (fp == -1) { /* todo: if it isn't there make the node */ - ret = -errno; - fprintf(stderr, "failed to open %s ", buffer_access); - goto error; - } + /* close now the main chardev fd and let the buffer fd work */ + if (close(fd) == -1) + perror("failed to close character device file"); + fd = -1; - .fd = fp, + .fd = buf_fd, - read_size = read(fp, data, toread * scan_size); + read_size = read(buf_fd, data, toread * scan_size); - if (fp >= 0 && close(fp) == -1) + if (fd >= 0 && close(fd) == -1) + perror("failed to close character device"); + if (buf_fd >= 0 && close(buf_fd) == -1) diff --git a/tools/iio/iio_utils.c b/tools/iio/iio_utils.c --- a/tools/iio/iio_utils.c +++ b/tools/iio/iio_utils.c + * @buffer_idx: the iio buffer index - const char *device_dir, const char *name, - const char *generic_name) + const char *device_dir, int buffer_idx, + const char *name, const char *generic_name) - ret = asprintf(&scan_el_dir, format_scan_elements_dir, device_dir); + ret = asprintf(&scan_el_dir, format_scan_elements_dir, device_dir, buffer_idx); + * @buffer_idx: the iio buffer for this channel array -int build_channel_array(const char *device_dir, +int build_channel_array(const char *device_dir, int buffer_idx, - ret = asprintf(&scan_el_dir, format_scan_elements_dir, device_dir); + ret = asprintf(&scan_el_dir, format_scan_elements_dir, device_dir, buffer_idx); + buffer_idx, diff --git a/tools/iio/iio_utils.h b/tools/iio/iio_utils.h --- a/tools/iio/iio_utils.h +++ b/tools/iio/iio_utils.h -#define format_scan_elements_dir "%s/scan_elements" +#define format_scan_elements_dir "%s/buffer%d" -int build_channel_array(const char *device_dir, +int build_channel_array(const char *device_dir, int buffer_idx,
Industrial I/O (iio)
8827faab2c8b52e848071a039a945db6f3ae8365
alexandru ardelean
tools
iio
iio/scmi: adding support for iio scmi based sensors
this change provides arm scmi protocol based iio device. this driver provides support for accelerometer and gyroscope using scmi sensor protocol extensions added in the scmiv3.0 arm specification
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
adding support for iio scmi based sensors
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['kconfig', 'maintainers', 'c', 'makefile']
7
715
1
--- diff --git a/maintainers b/maintainers --- a/maintainers +++ b/maintainers +iio scmi based driver +m: jyoti bhayana <jbhayana@google.com> +l: linux-iio@vger.kernel.org +s: maintained +f: drivers/iio/common/scmi_sensors/scmi_iio.c + diff --git a/drivers/firmware/arm_scmi/driver.c b/drivers/firmware/arm_scmi/driver.c --- a/drivers/firmware/arm_scmi/driver.c +++ b/drivers/firmware/arm_scmi/driver.c - { scmi_protocol_sensor, { "hwmon" },}, + { scmi_protocol_sensor, { "hwmon", "iiodev" },}, diff --git a/drivers/iio/common/kconfig b/drivers/iio/common/kconfig --- a/drivers/iio/common/kconfig +++ b/drivers/iio/common/kconfig +source "drivers/iio/common/scmi_sensors/kconfig" diff --git a/drivers/iio/common/makefile b/drivers/iio/common/makefile --- a/drivers/iio/common/makefile +++ b/drivers/iio/common/makefile +obj-y += scmi_sensors/ diff --git a/drivers/iio/common/scmi_sensors/kconfig b/drivers/iio/common/scmi_sensors/kconfig --- /dev/null +++ b/drivers/iio/common/scmi_sensors/kconfig +# +# iio over scmi +# +# when adding new entries keep the list in alphabetical order + +menu "iio scmi sensors" + +config iio_scmi + tristate "iio scmi" + depends on arm_scmi_protocol + select iio_buffer + select iio_kfifo_buf + help + say yes here to build support for iio scmi driver. + this provides arm scmi protocol based iio device. + this driver provides support for accelerometer and gyroscope + sensors available on scmi based platforms. +endmenu diff --git a/drivers/iio/common/scmi_sensors/makefile b/drivers/iio/common/scmi_sensors/makefile --- /dev/null +++ b/drivers/iio/common/scmi_sensors/makefile +# spdx - license - identifier : gpl - 2.0 - only +# +# makefile for the iio over scmi +# +obj-$(config_iio_scmi) += scmi_iio.o diff --git a/drivers/iio/common/scmi_sensors/scmi_iio.c b/drivers/iio/common/scmi_sensors/scmi_iio.c --- /dev/null +++ b/drivers/iio/common/scmi_sensors/scmi_iio.c +// spdx-license-identifier: gpl-2.0 + +/* + * system control and management interface(scmi) based iio sensor driver + * + * copyright (c) 2021 google llc + */ + +#include <linux/delay.h> +#include <linux/err.h> +#include <linux/iio/buffer.h> +#include <linux/iio/iio.h> +#include <linux/iio/kfifo_buf.h> +#include <linux/iio/sysfs.h> +#include <linux/kernel.h> +#include <linux/kthread.h> +#include <linux/module.h> +#include <linux/scmi_protocol.h> +#include <linux/time.h> +#include <linux/types.h> + +#define scmi_iio_num_of_axis 3 + +struct scmi_iio_priv { + struct scmi_handle *handle; + const struct scmi_sensor_info *sensor_info; + struct iio_dev *indio_dev; + /* adding one additional channel for timestamp */ + s64 iio_buf[scmi_iio_num_of_axis + 1]; + struct notifier_block sensor_update_nb; + u32 *freq_avail; +}; + +static int scmi_iio_sensor_update_cb(struct notifier_block *nb, + unsigned long event, void *data) +{ + struct scmi_sensor_update_report *sensor_update = data; + struct iio_dev *scmi_iio_dev; + struct scmi_iio_priv *sensor; + s8 tstamp_scale; + u64 time, time_ns; + int i; + + if (sensor_update->readings_count == 0) + return notify_done; + + sensor = container_of(nb, struct scmi_iio_priv, sensor_update_nb); + + for (i = 0; i < sensor_update->readings_count; i++) + sensor->iio_buf[i] = sensor_update->readings[i].value; + + if (!sensor->sensor_info->timestamped) { + time_ns = ktime_to_ns(sensor_update->timestamp); + } else { + /* + * all the axes are supposed to have the same value for timestamp. + * we are just using the values from the axis 0 here. + */ + time = sensor_update->readings[0].timestamp; + + /* + * timestamp returned by scmi is in seconds and is equal to + * time * power-of-10 multiplier(tstamp_scale) seconds. + * converting the timestamp to nanoseconds below. + */ + tstamp_scale = sensor->sensor_info->tstamp_scale + + const_ilog2(nsec_per_sec) / const_ilog2(10); + if (tstamp_scale < 0) { + do_div(time, int_pow(10, abs(tstamp_scale))); + time_ns = time; + } else { + time_ns = time * int_pow(10, tstamp_scale); + } + } + + scmi_iio_dev = sensor->indio_dev; + iio_push_to_buffers_with_timestamp(scmi_iio_dev, sensor->iio_buf, + time_ns); + return notify_ok; +} + +static int scmi_iio_buffer_preenable(struct iio_dev *iio_dev) +{ + struct scmi_iio_priv *sensor = iio_priv(iio_dev); + u32 sensor_id = sensor->sensor_info->id; + u32 sensor_config = 0; + int err; + + if (sensor->sensor_info->timestamped) + sensor_config |= field_prep(scmi_sens_cfg_tstamp_enabled_mask, + scmi_sens_cfg_tstamp_enable); + + sensor_config |= field_prep(scmi_sens_cfg_sensor_enabled_mask, + scmi_sens_cfg_sensor_enable); + + err = sensor->handle->notify_ops->register_event_notifier(sensor->handle, + scmi_protocol_sensor, scmi_event_sensor_update, + &sensor_id, &sensor->sensor_update_nb); + if (err) { + dev_err(&iio_dev->dev, + "error in registering sensor update notifier for sensor %s err %d", + sensor->sensor_info->name, err); + return err; + } + + err = sensor->handle->sensor_ops->config_set(sensor->handle, + sensor->sensor_info->id, sensor_config); + if (err) { + sensor->handle->notify_ops->unregister_event_notifier(sensor->handle, + scmi_protocol_sensor, + scmi_event_sensor_update, &sensor_id, + &sensor->sensor_update_nb); + dev_err(&iio_dev->dev, "error in enabling sensor %s err %d", + sensor->sensor_info->name, err); + } + + return err; +} + +static int scmi_iio_buffer_postdisable(struct iio_dev *iio_dev) +{ + struct scmi_iio_priv *sensor = iio_priv(iio_dev); + u32 sensor_id = sensor->sensor_info->id; + u32 sensor_config = 0; + int err; + + sensor_config |= field_prep(scmi_sens_cfg_sensor_enabled_mask, + scmi_sens_cfg_sensor_disable); + + err = sensor->handle->notify_ops->unregister_event_notifier(sensor->handle, + scmi_protocol_sensor, scmi_event_sensor_update, + &sensor_id, &sensor->sensor_update_nb); + if (err) { + dev_err(&iio_dev->dev, + "error in unregistering sensor update notifier for sensor %s err %d", + sensor->sensor_info->name, err); + return err; + } + + err = sensor->handle->sensor_ops->config_set(sensor->handle, sensor_id, + sensor_config); + if (err) { + dev_err(&iio_dev->dev, + "error in disabling sensor %s with err %d", + sensor->sensor_info->name, err); + } + + return err; +} + +static const struct iio_buffer_setup_ops scmi_iio_buffer_ops = { + .preenable = scmi_iio_buffer_preenable, + .postdisable = scmi_iio_buffer_postdisable, +}; + +static int scmi_iio_set_odr_val(struct iio_dev *iio_dev, int val, int val2) +{ + struct scmi_iio_priv *sensor = iio_priv(iio_dev); + const unsigned long uhz_per_hz = 1000000ul; + u64 sec, mult, uhz, sf; + u32 sensor_config; + char buf[32]; + + int err = sensor->handle->sensor_ops->config_get(sensor->handle, + sensor->sensor_info->id, &sensor_config); + if (err) { + dev_err(&iio_dev->dev, + "error in getting sensor config for sensor %s err %d", + sensor->sensor_info->name, err); + return err; + } + + uhz = val * uhz_per_hz + val2; + + /* + * the seconds field in the sensor interval in scmi is 16 bits long + * therefore seconds = 1/hz <= 0xffff. as floating point calculations are + * discouraged in the kernel driver code, to calculate the scale factor (sf) + * (1* 1000000 * sf)/uhz <= 0xffff. therefore, sf <= (uhz * 0xffff)/1000000 + * to calculate the multiplier,we convert the sf into char string and + * count the number of characters + */ + sf = (u64)uhz * 0xffff; + do_div(sf, uhz_per_hz); + mult = scnprintf(buf, sizeof(buf), "%llu", sf) - 1; + + sec = int_pow(10, mult) * uhz_per_hz; + do_div(sec, uhz); + if (sec == 0) { + dev_err(&iio_dev->dev, + "trying to set invalid sensor update value for sensor %s", + sensor->sensor_info->name); + return -einval; + } + + sensor_config &= ~scmi_sens_cfg_update_secs_mask; + sensor_config |= field_prep(scmi_sens_cfg_update_secs_mask, sec); + sensor_config &= ~scmi_sens_cfg_update_exp_mask; + sensor_config |= field_prep(scmi_sens_cfg_update_exp_mask, -mult); + + if (sensor->sensor_info->timestamped) { + sensor_config &= ~scmi_sens_cfg_tstamp_enabled_mask; + sensor_config |= field_prep(scmi_sens_cfg_tstamp_enabled_mask, + scmi_sens_cfg_tstamp_enable); + } + + sensor_config &= ~scmi_sens_cfg_round_mask; + sensor_config |= + field_prep(scmi_sens_cfg_round_mask, scmi_sens_cfg_round_auto); + + err = sensor->handle->sensor_ops->config_set(sensor->handle, + sensor->sensor_info->id, sensor_config); + if (err) + dev_err(&iio_dev->dev, + "error in setting sensor update interval for sensor %s value %u err %d", + sensor->sensor_info->name, sensor_config, err); + + return err; +} + +static int scmi_iio_write_raw(struct iio_dev *iio_dev, + struct iio_chan_spec const *chan, int val, + int val2, long mask) +{ + int err; + + switch (mask) { + case iio_chan_info_samp_freq: + mutex_lock(&iio_dev->mlock); + err = scmi_iio_set_odr_val(iio_dev, val, val2); + mutex_unlock(&iio_dev->mlock); + return err; + default: + return -einval; + } +} + +static int scmi_iio_read_avail(struct iio_dev *iio_dev, + struct iio_chan_spec const *chan, + const int **vals, int *type, int *length, + long mask) +{ + struct scmi_iio_priv *sensor = iio_priv(iio_dev); + + switch (mask) { + case iio_chan_info_samp_freq: + *vals = sensor->freq_avail; + *type = iio_val_int_plus_micro; + *length = sensor->sensor_info->intervals.count * 2; + if (sensor->sensor_info->intervals.segmented) + return iio_avail_range; + else + return iio_avail_list; + default: + return -einval; + } +} + +static void convert_ns_to_freq(u64 interval_ns, u64 *hz, u64 *uhz) +{ + u64 rem, freq; + + freq = nsec_per_sec; + rem = do_div(freq, interval_ns); + *hz = freq; + *uhz = rem * 1000000ul; + do_div(*uhz, interval_ns); +} + +static int scmi_iio_get_odr_val(struct iio_dev *iio_dev, int *val, int *val2) +{ + u64 sensor_update_interval, sensor_interval_mult, hz, uhz; + struct scmi_iio_priv *sensor = iio_priv(iio_dev); + u32 sensor_config; + int mult; + + int err = sensor->handle->sensor_ops->config_get(sensor->handle, + sensor->sensor_info->id, &sensor_config); + if (err) { + dev_err(&iio_dev->dev, + "error in getting sensor config for sensor %s err %d", + sensor->sensor_info->name, err); + return err; + } + + sensor_update_interval = + scmi_sens_cfg_get_update_secs(sensor_config) * nsec_per_sec; + + mult = scmi_sens_cfg_get_update_exp(sensor_config); + if (mult < 0) { + sensor_interval_mult = int_pow(10, abs(mult)); + do_div(sensor_update_interval, sensor_interval_mult); + } else { + sensor_interval_mult = int_pow(10, mult); + sensor_update_interval = + sensor_update_interval * sensor_interval_mult; + } + + convert_ns_to_freq(sensor_update_interval, &hz, &uhz); + *val = hz; + *val2 = uhz; + return 0; +} + +static int scmi_iio_read_raw(struct iio_dev *iio_dev, + struct iio_chan_spec const *ch, int *val, + int *val2, long mask) +{ + struct scmi_iio_priv *sensor = iio_priv(iio_dev); + s8 scale; + int ret; + + switch (mask) { + case iio_chan_info_scale: + scale = sensor->sensor_info->axis[ch->scan_index].scale; + if (scale < 0) { + *val = 1; + *val2 = int_pow(10, abs(scale)); + return iio_val_fractional; + } + *val = int_pow(10, scale); + return iio_val_int; + case iio_chan_info_samp_freq: + ret = scmi_iio_get_odr_val(iio_dev, val, val2); + return ret ? ret : iio_val_int_plus_micro; + default: + return -einval; + } +} + +static const struct iio_info scmi_iio_info = { + .read_raw = scmi_iio_read_raw, + .read_avail = scmi_iio_read_avail, + .write_raw = scmi_iio_write_raw, +}; + +static ssize_t scmi_iio_get_raw_available(struct iio_dev *iio_dev, + uintptr_t private, + const struct iio_chan_spec *chan, + char *buf) +{ + struct scmi_iio_priv *sensor = iio_priv(iio_dev); + u64 resolution, rem; + s64 min_range, max_range; + s8 exponent, scale; + int len = 0; + + /* + * all the axes are supposed to have the same value for range and resolution. + * we are just using the values from the axis 0 here. + */ + if (sensor->sensor_info->axis[0].extended_attrs) { + min_range = sensor->sensor_info->axis[0].attrs.min_range; + max_range = sensor->sensor_info->axis[0].attrs.max_range; + resolution = sensor->sensor_info->axis[0].resolution; + exponent = sensor->sensor_info->axis[0].exponent; + scale = sensor->sensor_info->axis[0].scale; + + /* + * to provide the raw value for the resolution to the userspace, + * need to divide the resolution exponent by the sensor scale + */ + exponent = exponent - scale; + if (exponent < 0) { + rem = do_div(resolution, + int_pow(10, abs(exponent)) + ); + len = scnprintf(buf, page_size, + "[%lld %llu.%llu %lld] ", min_range, + resolution, rem, max_range); + } else { + resolution = resolution * int_pow(10, exponent); + len = scnprintf(buf, page_size, "[%lld %llu %lld] ", + min_range, resolution, max_range); + } + } + return len; +} + +static const struct iio_chan_spec_ext_info scmi_iio_ext_info[] = { + { + .name = "raw_available", + .read = scmi_iio_get_raw_available, + .shared = iio_shared_by_type, + }, + {}, +}; + +static void scmi_iio_set_timestamp_channel(struct iio_chan_spec *iio_chan, + int scan_index) +{ + iio_chan->type = iio_timestamp; + iio_chan->channel = -1; + iio_chan->scan_index = scan_index; + iio_chan->scan_type.sign = 'u'; + iio_chan->scan_type.realbits = 64; + iio_chan->scan_type.storagebits = 64; +} + +static void scmi_iio_set_data_channel(struct iio_chan_spec *iio_chan, + enum iio_chan_type type, + enum iio_modifier mod, int scan_index) +{ + iio_chan->type = type; + iio_chan->modified = 1; + iio_chan->channel2 = mod; + iio_chan->info_mask_separate = bit(iio_chan_info_scale); + iio_chan->info_mask_shared_by_type = bit(iio_chan_info_samp_freq); + iio_chan->info_mask_shared_by_type_available = + bit(iio_chan_info_samp_freq); + iio_chan->scan_index = scan_index; + iio_chan->scan_type.sign = 's'; + iio_chan->scan_type.realbits = 64; + iio_chan->scan_type.storagebits = 64; + iio_chan->scan_type.endianness = iio_le; + iio_chan->ext_info = scmi_iio_ext_info; +} + +static int scmi_iio_get_chan_modifier(const char *name, + enum iio_modifier *modifier) +{ + char *pch, mod; + + if (!name) + return -einval; + + pch = strrchr(name, '_'); + if (!pch) + return -einval; + + mod = *(pch + 1); + switch (mod) { + case 'x': + *modifier = iio_mod_x; + return 0; + case 'y': + *modifier = iio_mod_y; + return 0; + case 'z': + *modifier = iio_mod_z; + return 0; + default: + return -einval; + } +} + +static int scmi_iio_get_chan_type(u8 scmi_type, enum iio_chan_type *iio_type) +{ + switch (scmi_type) { + case meters_sec_squared: + *iio_type = iio_accel; + return 0; + case radians_sec: + *iio_type = iio_angl_vel; + return 0; + default: + return -einval; + } +} + +static u64 scmi_iio_convert_interval_to_ns(u32 val) +{ + u64 sensor_update_interval = + scmi_sens_intvl_get_secs(val) * nsec_per_sec; + u64 sensor_interval_mult; + int mult; + + mult = scmi_sens_intvl_get_exp(val); + if (mult < 0) { + sensor_interval_mult = int_pow(10, abs(mult)); + do_div(sensor_update_interval, sensor_interval_mult); + } else { + sensor_interval_mult = int_pow(10, mult); + sensor_update_interval = + sensor_update_interval * sensor_interval_mult; + } + return sensor_update_interval; +} + +static int scmi_iio_set_sampling_freq_avail(struct iio_dev *iio_dev) +{ + u64 cur_interval_ns, low_interval_ns, high_interval_ns, step_size_ns, + hz, uhz; + unsigned int cur_interval, low_interval, high_interval, step_size; + struct scmi_iio_priv *sensor = iio_priv(iio_dev); + int i; + + sensor->freq_avail = + devm_kzalloc(&iio_dev->dev, + sizeof(*sensor->freq_avail) * + (sensor->sensor_info->intervals.count * 2), + gfp_kernel); + if (!sensor->freq_avail) + return -enomem; + + if (sensor->sensor_info->intervals.segmented) { + low_interval = sensor->sensor_info->intervals + .desc[scmi_sens_intvl_segment_low]; + low_interval_ns = scmi_iio_convert_interval_to_ns(low_interval); + convert_ns_to_freq(low_interval_ns, &hz, &uhz); + sensor->freq_avail[0] = hz; + sensor->freq_avail[1] = uhz; + + step_size = sensor->sensor_info->intervals + .desc[scmi_sens_intvl_segment_step]; + step_size_ns = scmi_iio_convert_interval_to_ns(step_size); + convert_ns_to_freq(step_size_ns, &hz, &uhz); + sensor->freq_avail[2] = hz; + sensor->freq_avail[3] = uhz; + + high_interval = sensor->sensor_info->intervals + .desc[scmi_sens_intvl_segment_high]; + high_interval_ns = + scmi_iio_convert_interval_to_ns(high_interval); + convert_ns_to_freq(high_interval_ns, &hz, &uhz); + sensor->freq_avail[4] = hz; + sensor->freq_avail[5] = uhz; + } else { + for (i = 0; i < sensor->sensor_info->intervals.count; i++) { + cur_interval = sensor->sensor_info->intervals.desc[i]; + cur_interval_ns = + scmi_iio_convert_interval_to_ns(cur_interval); + convert_ns_to_freq(cur_interval_ns, &hz, &uhz); + sensor->freq_avail[i * 2] = hz; + sensor->freq_avail[i * 2 + 1] = uhz; + } + } + return 0; +} + +static int scmi_iio_buffers_setup(struct iio_dev *scmi_iiodev) +{ + struct iio_buffer *buffer; + + buffer = devm_iio_kfifo_allocate(&scmi_iiodev->dev); + if (!buffer) + return -enomem; + + iio_device_attach_buffer(scmi_iiodev, buffer); + scmi_iiodev->modes |= indio_buffer_software; + scmi_iiodev->setup_ops = &scmi_iio_buffer_ops; + return 0; +} + +static struct iio_dev *scmi_alloc_iiodev(struct device *dev, + struct scmi_handle *handle, + const struct scmi_sensor_info *sensor_info) +{ + struct iio_chan_spec *iio_channels; + struct scmi_iio_priv *sensor; + enum iio_modifier modifier; + enum iio_chan_type type; + struct iio_dev *iiodev; + int i, ret; + + iiodev = devm_iio_device_alloc(dev, sizeof(*sensor)); + if (!iiodev) + return err_ptr(-enomem); + + iiodev->modes = indio_direct_mode; + iiodev->dev.parent = dev; + sensor = iio_priv(iiodev); + sensor->handle = handle; + sensor->sensor_info = sensor_info; + sensor->sensor_update_nb.notifier_call = scmi_iio_sensor_update_cb; + sensor->indio_dev = iiodev; + + /* adding one additional channel for timestamp */ + iiodev->num_channels = sensor_info->num_axis + 1; + iiodev->name = sensor_info->name; + iiodev->info = &scmi_iio_info; + + iio_channels = + devm_kzalloc(dev, + sizeof(*iio_channels) * (iiodev->num_channels), + gfp_kernel); + if (!iio_channels) + return err_ptr(-enomem); + + ret = scmi_iio_set_sampling_freq_avail(iiodev); + if (ret < 0) + return err_ptr(ret); + + for (i = 0; i < sensor_info->num_axis; i++) { + ret = scmi_iio_get_chan_type(sensor_info->axis[i].type, &type); + if (ret < 0) + return err_ptr(ret); + + ret = scmi_iio_get_chan_modifier(sensor_info->axis[i].name, + &modifier); + if (ret < 0) + return err_ptr(ret); + + scmi_iio_set_data_channel(&iio_channels[i], type, modifier, + sensor_info->axis[i].id); + } + + scmi_iio_set_timestamp_channel(&iio_channels[i], i); + iiodev->channels = iio_channels; + return iiodev; +} + +static int scmi_iio_dev_probe(struct scmi_device *sdev) +{ + const struct scmi_sensor_info *sensor_info; + struct scmi_handle *handle = sdev->handle; + struct device *dev = &sdev->dev; + struct iio_dev *scmi_iio_dev; + u16 nr_sensors; + int err = -enodev, i; + + if (!handle || !handle->sensor_ops) { + dev_err(dev, "scmi device has no sensor interface "); + return -einval; + } + + nr_sensors = handle->sensor_ops->count_get(handle); + if (!nr_sensors) { + dev_dbg(dev, "0 sensors found via scmi bus "); + return -enodev; + } + + for (i = 0; i < nr_sensors; i++) { + sensor_info = handle->sensor_ops->info_get(handle, i); + if (!sensor_info) { + dev_err(dev, "scmi sensor %d has missing info ", i); + return -einval; + } + + /* this driver only supports 3-axis accel and gyro, skipping other sensors */ + if (sensor_info->num_axis != scmi_iio_num_of_axis) + continue; + + /* this driver only supports 3-axis accel and gyro, skipping other sensors */ + if (sensor_info->axis[0].type != meters_sec_squared && + sensor_info->axis[0].type != radians_sec) + continue; + + scmi_iio_dev = scmi_alloc_iiodev(dev, handle, sensor_info); + if (is_err(scmi_iio_dev)) { + dev_err(dev, + "failed to allocate iio device for sensor %s: %ld ", + sensor_info->name, ptr_err(scmi_iio_dev)); + return ptr_err(scmi_iio_dev); + } + + err = scmi_iio_buffers_setup(scmi_iio_dev); + if (err < 0) { + dev_err(dev, + "iio buffer setup error at sensor %s: %d ", + sensor_info->name, err); + return err; + } + + err = devm_iio_device_register(dev, scmi_iio_dev); + if (err) { + dev_err(dev, + "iio device registration failed at sensor %s: %d ", + sensor_info->name, err); + return err; + } + } + return err; +} + +static const struct scmi_device_id scmi_id_table[] = { + { scmi_protocol_sensor, "iiodev" }, + {}, +}; + +module_device_table(scmi, scmi_id_table); + +static struct scmi_driver scmi_iiodev_driver = { + .name = "scmi-sensor-iiodev", + .probe = scmi_iio_dev_probe, + .id_table = scmi_id_table, +}; + +module_scmi_driver(scmi_iiodev_driver); + +module_author("jyoti bhayana <jbhayana@google.com>"); +module_description("scmi iio driver"); +module_license("gpl v2");
Industrial I/O (iio)
f774117c96f94c7c4d2f076e4cacc80218b0df48
jyoti bhayana
drivers
firmware
arm_scmi, common, scmi_sensors
iio: accel: add support for the bosch-sensortec bmi088
the bmi088 is a combined module with both accelerometer and gyroscope. this adds the accelerometer driver support for the spi interface. the gyroscope part is already supported by the bmg160 driver.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for the bosch-sensortec bmi088
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['accel']
['h', 'kconfig', 'c', 'makefile']
5
688
0
--- diff --git a/drivers/iio/accel/kconfig b/drivers/iio/accel/kconfig --- a/drivers/iio/accel/kconfig +++ b/drivers/iio/accel/kconfig +config bmi088_accel + tristate "bosch bmi088 accelerometer driver" + depends on spi + select iio_buffer + select iio_triggered_buffer + select regmap + select bmi088_accel_spi + help + say yes here to build support for the bosch bmi088 accelerometer. + + this is a combo module with both accelerometer and gyroscope. this + driver only implements the accelerometer part, which has its own + address and register map. bmg160 provides the gyroscope driver. + +config bmi088_accel_spi + tristate + select regmap_spi + diff --git a/drivers/iio/accel/makefile b/drivers/iio/accel/makefile --- a/drivers/iio/accel/makefile +++ b/drivers/iio/accel/makefile +obj-$(config_bmi088_accel) += bmi088-accel-core.o +obj-$(config_bmi088_accel_spi) += bmi088-accel-spi.o diff --git a/drivers/iio/accel/bmi088-accel-core.c b/drivers/iio/accel/bmi088-accel-core.c --- /dev/null +++ b/drivers/iio/accel/bmi088-accel-core.c +// spdx-license-identifier: gpl-2.0 +/* + * 3-axis accelerometer driver supporting following bosch-sensortec chips: + * - bmi088 + * + * copyright (c) 2018-2021, topic embedded products + */ + +#include <linux/delay.h> +#include <linux/iio/iio.h> +#include <linux/iio/sysfs.h> +#include <linux/interrupt.h> +#include <linux/module.h> +#include <linux/pm.h> +#include <linux/pm_runtime.h> +#include <linux/regmap.h> +#include <linux/slab.h> +#include <asm/unaligned.h> + +#include "bmi088-accel.h" + +#define bmi088_accel_reg_chip_id 0x00 +#define bmi088_accel_reg_error 0x02 + +#define bmi088_accel_reg_int_status 0x1d +#define bmi088_accel_int_status_bit_drdy bit(7) + +#define bmi088_accel_reg_reset 0x7e +#define bmi088_accel_reset_val 0xb6 + +#define bmi088_accel_reg_pwr_ctrl 0x7d +#define bmi088_accel_reg_pwr_conf 0x7c + +#define bmi088_accel_reg_int_map_data 0x58 +#define bmi088_accel_int_map_data_bit_int1_drdy bit(2) +#define bmi088_accel_int_map_data_bit_int2_fwm bit(5) + +#define bmi088_accel_reg_int1_io_conf 0x53 +#define bmi088_accel_int1_io_conf_bit_enable_out bit(3) +#define bmi088_accel_int1_io_conf_bit_lvl bit(1) + +#define bmi088_accel_reg_int2_io_conf 0x54 +#define bmi088_accel_int2_io_conf_bit_enable_out bit(3) +#define bmi088_accel_int2_io_conf_bit_lvl bit(1) + +#define bmi088_accel_reg_acc_conf 0x40 +#define bmi088_accel_mode_odr_mask 0x0f + +#define bmi088_accel_reg_acc_range 0x41 +#define bmi088_accel_range_3g 0x00 +#define bmi088_accel_range_6g 0x01 +#define bmi088_accel_range_12g 0x02 +#define bmi088_accel_range_24g 0x03 + +#define bmi088_accel_reg_temp 0x22 +#define bmi088_accel_reg_temp_shift 5 +#define bmi088_accel_temp_unit 125 +#define bmi088_accel_temp_offset 23000 + +#define bmi088_accel_reg_xout_l 0x12 +#define bmi088_accel_axis_to_reg(axis) \ + (bmi088_accel_reg_xout_l + (axis * 2)) + +#define bmi088_accel_max_startup_time_us 1000 +#define bmi088_auto_suspend_delay_ms 2000 + +#define bmi088_accel_reg_fifo_status 0x0e +#define bmi088_accel_reg_fifo_config0 0x48 +#define bmi088_accel_reg_fifo_config1 0x49 +#define bmi088_accel_reg_fifo_data 0x3f +#define bmi088_accel_fifo_length 100 + +#define bmi088_accel_fifo_mode_fifo 0x40 +#define bmi088_accel_fifo_mode_stream 0x80 + +enum bmi088_accel_axis { + axis_x, + axis_y, + axis_z, +}; + +static const int bmi088_sample_freqs[] = { + 12, 500000, + 25, 0, + 50, 0, + 100, 0, + 200, 0, + 400, 0, + 800, 0, + 1600, 0, +}; + +/* available osr (over sampling rate) sets the 3db cut-off frequency */ +enum bmi088_osr_modes { + bmi088_accel_mode_osr_normal = 0xa, + bmi088_accel_mode_osr_2 = 0x9, + bmi088_accel_mode_osr_4 = 0x8, +}; + +/* available odr (output data rates) in hz */ +enum bmi088_odr_modes { + bmi088_accel_mode_odr_12_5 = 0x5, + bmi088_accel_mode_odr_25 = 0x6, + bmi088_accel_mode_odr_50 = 0x7, + bmi088_accel_mode_odr_100 = 0x8, + bmi088_accel_mode_odr_200 = 0x9, + bmi088_accel_mode_odr_400 = 0xa, + bmi088_accel_mode_odr_800 = 0xb, + bmi088_accel_mode_odr_1600 = 0xc, +}; + +struct bmi088_scale_info { + int scale; + u8 reg_range; +}; + +struct bmi088_accel_chip_info { + const char *name; + u8 chip_id; + const struct iio_chan_spec *channels; + int num_channels; +}; + +struct bmi088_accel_data { + struct regmap *regmap; + const struct bmi088_accel_chip_info *chip_info; + u8 buffer[2] ____cacheline_aligned; /* shared dma safe buffer */ +}; + +static const struct regmap_range bmi088_volatile_ranges[] = { + /* all registers below 0x40 are volatile, except the chip id. */ + regmap_reg_range(bmi088_accel_reg_error, 0x3f), + /* mark the reset as volatile too, it is self-clearing */ + regmap_reg_range(bmi088_accel_reg_reset, bmi088_accel_reg_reset), +}; + +static const struct regmap_access_table bmi088_volatile_table = { + .yes_ranges = bmi088_volatile_ranges, + .n_yes_ranges = array_size(bmi088_volatile_ranges), +}; + +const struct regmap_config bmi088_regmap_conf = { + .reg_bits = 8, + .val_bits = 8, + .max_register = 0x7e, + .volatile_table = &bmi088_volatile_table, + .cache_type = regcache_rbtree, +}; +export_symbol_gpl(bmi088_regmap_conf); + +static int bmi088_accel_power_up(struct bmi088_accel_data *data) +{ + int ret; + + /* enable accelerometer and temperature sensor */ + ret = regmap_write(data->regmap, bmi088_accel_reg_pwr_ctrl, 0x4); + if (ret) + return ret; + + /* datasheet recommends to wait at least 5ms before communication */ + usleep_range(5000, 6000); + + /* disable suspend mode */ + ret = regmap_write(data->regmap, bmi088_accel_reg_pwr_conf, 0x0); + if (ret) + return ret; + + /* recommended at least 1ms before further communication */ + usleep_range(1000, 1200); + + return 0; +} + +static int bmi088_accel_power_down(struct bmi088_accel_data *data) +{ + int ret; + + /* enable suspend mode */ + ret = regmap_write(data->regmap, bmi088_accel_reg_pwr_conf, 0x3); + if (ret) + return ret; + + /* recommended at least 1ms before further communication */ + usleep_range(1000, 1200); + + /* disable accelerometer and temperature sensor */ + ret = regmap_write(data->regmap, bmi088_accel_reg_pwr_ctrl, 0x0); + if (ret) + return ret; + + /* datasheet recommends to wait at least 5ms before communication */ + usleep_range(5000, 6000); + + return 0; +} + +static int bmi088_accel_get_sample_freq(struct bmi088_accel_data *data, + int *val, int *val2) +{ + unsigned int value; + int ret; + + ret = regmap_read(data->regmap, bmi088_accel_reg_acc_conf, + &value); + if (ret) + return ret; + + value &= bmi088_accel_mode_odr_mask; + value -= bmi088_accel_mode_odr_12_5; + value <<= 1; + + if (value >= array_size(bmi088_sample_freqs) - 1) + return -einval; + + *val = bmi088_sample_freqs[value]; + *val2 = bmi088_sample_freqs[value + 1]; + + return iio_val_int_plus_micro; +} + +static int bmi088_accel_set_sample_freq(struct bmi088_accel_data *data, int val) +{ + unsigned int regval; + int index = 0; + + while (index < array_size(bmi088_sample_freqs) && + bmi088_sample_freqs[index] != val) + index += 2; + + if (index >= array_size(bmi088_sample_freqs)) + return -einval; + + regval = (index >> 1) + bmi088_accel_mode_odr_12_5; + + return regmap_update_bits(data->regmap, bmi088_accel_reg_acc_conf, + bmi088_accel_mode_odr_mask, regval); +} + +static int bmi088_accel_get_temp(struct bmi088_accel_data *data, int *val) +{ + int ret; + s16 temp; + + ret = regmap_bulk_read(data->regmap, bmi088_accel_reg_temp, + &data->buffer, sizeof(__be16)); + if (ret) + return ret; + + /* data->buffer is cacheline aligned */ + temp = be16_to_cpu(*(__be16 *)data->buffer); + + *val = temp >> bmi088_accel_reg_temp_shift; + + return iio_val_int; +} + +static int bmi088_accel_get_axis(struct bmi088_accel_data *data, + struct iio_chan_spec const *chan, + int *val) +{ + int ret; + s16 raw_val; + + ret = regmap_bulk_read(data->regmap, + bmi088_accel_axis_to_reg(chan->scan_index), + data->buffer, sizeof(__le16)); + if (ret) + return ret; + + raw_val = le16_to_cpu(*(__le16 *)data->buffer); + *val = raw_val; + + return iio_val_int; +} + +static int bmi088_accel_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, int *val2, long mask) +{ + struct bmi088_accel_data *data = iio_priv(indio_dev); + struct device *dev = regmap_get_device(data->regmap); + int ret; + + switch (mask) { + case iio_chan_info_raw: + switch (chan->type) { + case iio_temp: + pm_runtime_get_sync(dev); + ret = bmi088_accel_get_temp(data, val); + goto out_read_raw_pm_put; + case iio_accel: + pm_runtime_get_sync(dev); + ret = iio_device_claim_direct_mode(indio_dev); + if (ret) + goto out_read_raw_pm_put; + + ret = bmi088_accel_get_axis(data, chan, val); + iio_device_release_direct_mode(indio_dev); + if (!ret) + ret = iio_val_int; + + goto out_read_raw_pm_put; + default: + return -einval; + } + case iio_chan_info_offset: + switch (chan->type) { + case iio_temp: + /* offset applies before scale */ + *val = bmi088_accel_temp_offset/bmi088_accel_temp_unit; + return iio_val_int; + default: + return -einval; + } + case iio_chan_info_scale: + switch (chan->type) { + case iio_temp: + /* 0.125 degrees per lsb */ + *val = bmi088_accel_temp_unit; + return iio_val_int; + case iio_accel: + pm_runtime_get_sync(dev); + ret = regmap_read(data->regmap, + bmi088_accel_reg_acc_range, val); + if (ret) + goto out_read_raw_pm_put; + + *val2 = 15 - (*val & 0x3); + *val = 3 * 980; + ret = iio_val_fractional_log2; + + goto out_read_raw_pm_put; + default: + return -einval; + } + case iio_chan_info_samp_freq: + pm_runtime_get_sync(dev); + ret = bmi088_accel_get_sample_freq(data, val, val2); + goto out_read_raw_pm_put; + default: + break; + } + + return -einval; + +out_read_raw_pm_put: + pm_runtime_mark_last_busy(dev); + pm_runtime_put_autosuspend(dev); + + return ret; +} + +static int bmi088_accel_read_avail(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + const int **vals, int *type, int *length, + long mask) +{ + switch (mask) { + case iio_chan_info_samp_freq: + *type = iio_val_int_plus_micro; + *vals = bmi088_sample_freqs; + *length = array_size(bmi088_sample_freqs); + return iio_avail_list; + default: + return -einval; + } +} + +static int bmi088_accel_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int val, int val2, long mask) +{ + struct bmi088_accel_data *data = iio_priv(indio_dev); + struct device *dev = regmap_get_device(data->regmap); + int ret; + + switch (mask) { + case iio_chan_info_samp_freq: + pm_runtime_get_sync(dev); + ret = bmi088_accel_set_sample_freq(data, val); + pm_runtime_mark_last_busy(dev); + pm_runtime_put_autosuspend(dev); + return ret; + default: + return -einval; + } +} + +#define bmi088_accel_channel(_axis) { \ + .type = iio_accel, \ + .modified = 1, \ + .channel2 = iio_mod_##_axis, \ + .info_mask_separate = bit(iio_chan_info_raw), \ + .info_mask_shared_by_type = bit(iio_chan_info_scale) | \ + bit(iio_chan_info_samp_freq), \ + .info_mask_shared_by_type_available = bit(iio_chan_info_samp_freq), \ + .scan_index = axis_##_axis, \ +} + +static const struct iio_chan_spec bmi088_accel_channels[] = { + { + .type = iio_temp, + .info_mask_separate = bit(iio_chan_info_raw) | + bit(iio_chan_info_scale) | + bit(iio_chan_info_offset), + .scan_index = -1, + }, + bmi088_accel_channel(x), + bmi088_accel_channel(y), + bmi088_accel_channel(z), + iio_chan_soft_timestamp(3), +}; + +static const struct bmi088_accel_chip_info bmi088_accel_chip_info_tbl[] = { + [0] = { + .name = "bmi088a", + .chip_id = 0x1e, + .channels = bmi088_accel_channels, + .num_channels = array_size(bmi088_accel_channels), + }, +}; + +static const struct iio_info bmi088_accel_info = { + .read_raw = bmi088_accel_read_raw, + .write_raw = bmi088_accel_write_raw, + .read_avail = bmi088_accel_read_avail, +}; + +static const unsigned long bmi088_accel_scan_masks[] = { + bit(axis_x) | bit(axis_y) | bit(axis_z), + 0 +}; + +static int bmi088_accel_chip_init(struct bmi088_accel_data *data) +{ + struct device *dev = regmap_get_device(data->regmap); + int ret, i; + unsigned int val; + + /* do a dummy read to enable spi interface, won't harm i2c */ + regmap_read(data->regmap, bmi088_accel_reg_int_status, &val); + + /* + * reset chip to get it in a known good state. a delay of 1ms after + * reset is required according to the data sheet + */ + ret = regmap_write(data->regmap, bmi088_accel_reg_reset, + bmi088_accel_reset_val); + if (ret) + return ret; + + usleep_range(1000, 2000); + + /* do a dummy read again after a reset to enable the spi interface */ + regmap_read(data->regmap, bmi088_accel_reg_int_status, &val); + + /* read chip id */ + ret = regmap_read(data->regmap, bmi088_accel_reg_chip_id, &val); + if (ret) { + dev_err(dev, "error: reading chip id "); + return ret; + } + + /* validate chip id */ + for (i = 0; i < array_size(bmi088_accel_chip_info_tbl); i++) { + if (bmi088_accel_chip_info_tbl[i].chip_id == val) { + data->chip_info = &bmi088_accel_chip_info_tbl[i]; + break; + } + } + if (i == array_size(bmi088_accel_chip_info_tbl)) { + dev_err(dev, "invalid chip %x ", val); + return -enodev; + } + + return 0; +} + +int bmi088_accel_core_probe(struct device *dev, struct regmap *regmap, + int irq, const char *name, bool block_supported) +{ + struct bmi088_accel_data *data; + struct iio_dev *indio_dev; + int ret; + + indio_dev = devm_iio_device_alloc(dev, sizeof(*data)); + if (!indio_dev) + return -enomem; + + data = iio_priv(indio_dev); + dev_set_drvdata(dev, indio_dev); + + data->regmap = regmap; + + ret = bmi088_accel_chip_init(data); + if (ret) + return ret; + + indio_dev->dev.parent = dev; + indio_dev->channels = data->chip_info->channels; + indio_dev->num_channels = data->chip_info->num_channels; + indio_dev->name = name ? name : data->chip_info->name; + indio_dev->available_scan_masks = bmi088_accel_scan_masks; + indio_dev->modes = indio_direct_mode; + indio_dev->info = &bmi088_accel_info; + + /* enable runtime pm */ + pm_runtime_get_noresume(dev); + pm_runtime_set_suspended(dev); + pm_runtime_enable(dev); + /* we need ~6ms to startup, so set the delay to 6 seconds */ + pm_runtime_set_autosuspend_delay(dev, 6000); + pm_runtime_use_autosuspend(dev); + pm_runtime_put(dev); + + ret = iio_device_register(indio_dev); + if (ret) + dev_err(dev, "unable to register iio device "); + + return ret; +} +export_symbol_gpl(bmi088_accel_core_probe); + + +int bmi088_accel_core_remove(struct device *dev) +{ + struct iio_dev *indio_dev = dev_get_drvdata(dev); + struct bmi088_accel_data *data = iio_priv(indio_dev); + + iio_device_unregister(indio_dev); + + pm_runtime_disable(dev); + pm_runtime_set_suspended(dev); + pm_runtime_put_noidle(dev); + bmi088_accel_power_down(data); + + return 0; +} +export_symbol_gpl(bmi088_accel_core_remove); + +static int __maybe_unused bmi088_accel_runtime_suspend(struct device *dev) +{ + struct iio_dev *indio_dev = dev_get_drvdata(dev); + struct bmi088_accel_data *data = iio_priv(indio_dev); + + return bmi088_accel_power_down(data); +} + +static int __maybe_unused bmi088_accel_runtime_resume(struct device *dev) +{ + struct iio_dev *indio_dev = dev_get_drvdata(dev); + struct bmi088_accel_data *data = iio_priv(indio_dev); + + return bmi088_accel_power_up(data); +} + +const struct dev_pm_ops bmi088_accel_pm_ops = { + set_system_sleep_pm_ops(pm_runtime_force_suspend, + pm_runtime_force_resume) + set_runtime_pm_ops(bmi088_accel_runtime_suspend, + bmi088_accel_runtime_resume, null) +}; +export_symbol_gpl(bmi088_accel_pm_ops); + +module_author("niek van agt <niek.van.agt@topicproducts.com>"); +module_license("gpl v2"); +module_description("bmi088 accelerometer driver (core)"); diff --git a/drivers/iio/accel/bmi088-accel-spi.c b/drivers/iio/accel/bmi088-accel-spi.c --- /dev/null +++ b/drivers/iio/accel/bmi088-accel-spi.c +// spdx-license-identifier: gpl-2.0 +/* + * 3-axis accelerometer driver supporting following bosch-sensortec chips: + * - bmi088 + * + * copyright (c) 2018-2020, topic embedded products + */ + +#include <linux/module.h> +#include <linux/regmap.h> +#include <linux/slab.h> +#include <linux/spi/spi.h> + +#include "bmi088-accel.h" + +static int bmi088_regmap_spi_write(void *context, const void *data, size_t count) +{ + struct spi_device *spi = context; + + /* write register is same as generic spi */ + return spi_write(spi, data, count); +} + +static int bmi088_regmap_spi_read(void *context, const void *reg, + size_t reg_size, void *val, size_t val_size) +{ + struct spi_device *spi = context; + u8 addr[2]; + + addr[0] = *(u8 *)reg; + addr[0] |= bit(7); /* set rw = '1' */ + addr[1] = 0; /* read requires a dummy byte transfer */ + + return spi_write_then_read(spi, addr, sizeof(addr), val, val_size); +} + +static struct regmap_bus bmi088_regmap_bus = { + .write = bmi088_regmap_spi_write, + .read = bmi088_regmap_spi_read, +}; + +static int bmi088_accel_probe(struct spi_device *spi) +{ + struct regmap *regmap; + const struct spi_device_id *id = spi_get_device_id(spi); + + regmap = devm_regmap_init(&spi->dev, &bmi088_regmap_bus, + spi, &bmi088_regmap_conf); + + if (is_err(regmap)) { + dev_err(&spi->dev, "failed to initialize spi regmap "); + return ptr_err(regmap); + } + + return bmi088_accel_core_probe(&spi->dev, regmap, spi->irq, id->name, + true); +} + +static int bmi088_accel_remove(struct spi_device *spi) +{ + return bmi088_accel_core_remove(&spi->dev); +} + +static const struct spi_device_id bmi088_accel_id[] = { + {"bmi088-accel", }, + {} +}; +module_device_table(spi, bmi088_accel_id); + +static struct spi_driver bmi088_accel_driver = { + .driver = { + .name = "bmi088_accel_spi", + .pm = &bmi088_accel_pm_ops, + }, + .probe = bmi088_accel_probe, + .remove = bmi088_accel_remove, + .id_table = bmi088_accel_id, +}; +module_spi_driver(bmi088_accel_driver); + +module_author("niek van agt <niek.van.agt@topicproducts.com>"); +module_license("gpl v2"); +module_description("bmi088 accelerometer driver (spi)"); diff --git a/drivers/iio/accel/bmi088-accel.h b/drivers/iio/accel/bmi088-accel.h --- /dev/null +++ b/drivers/iio/accel/bmi088-accel.h +/* spdx-license-identifier: gpl-2.0 */ +#ifndef bmi088_accel_h +#define bmi088_accel_h + +#include <linux/pm.h> +#include <linux/regmap.h> +#include <linux/types.h> + +struct device; + +extern const struct regmap_config bmi088_regmap_conf; +extern const struct dev_pm_ops bmi088_accel_pm_ops; + +int bmi088_accel_core_probe(struct device *dev, struct regmap *regmap, int irq, + const char *name, bool block_supported); +int bmi088_accel_core_remove(struct device *dev); + +#endif /* bmi088_accel_h */
Industrial I/O (iio)
c19ae6be7555abbee985d73372d0e78878a337f8
mike looijmans linus walleij linus walleij linaro org
drivers
iio
accel
iio: acpi_als: add trigger support
as some firmware does not notify on illuminance changes, add a trigger to be able to query light via software (sysfs-trigger or hrtrigger). add a hardware trigger set as the default trigger to maintain backward compatibility.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add trigger support
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['acpi_als']
['c']
1
68
28
--- diff --git a/drivers/iio/light/acpi-als.c b/drivers/iio/light/acpi-als.c --- a/drivers/iio/light/acpi-als.c +++ b/drivers/iio/light/acpi-als.c +#include <linux/irq.h> -#include <linux/iio/kfifo_buf.h> +#include <linux/iio/trigger.h> +#include <linux/iio/triggered_buffer.h> +#include <linux/iio/trigger_consumer.h> + struct iio_trigger *trig; - s32 *buffer = als->evt_buffer; - s64 time_ns = iio_get_time_ns(indio_dev); - s32 val; - int ret; - - mutex_lock(&als->lock); - memset(buffer, 0, acpi_als_evt_buffer_size); - - switch (event) { - case acpi_als_notify_illuminance: - ret = acpi_als_read_value(als, acpi_als_illuminance, &val); - if (ret < 0) - goto out; - *buffer++ = val; - break; - default: - /* unhandled event */ - dev_dbg(&device->dev, "unhandled acpi als event (%08x)! ", - event); - goto out; + if (iio_buffer_enabled(indio_dev) && iio_trigger_using_own(indio_dev)) { + switch (event) { + case acpi_als_notify_illuminance: + iio_trigger_poll_chained(als->trig); + break; + default: + /* unhandled event */ + dev_dbg(&device->dev, + "unhandled acpi als event (%08x)! ", + event); + } - - iio_push_to_buffers_with_timestamp(indio_dev, als->evt_buffer, time_ns); - -out: - mutex_unlock(&als->lock); +static irqreturn_t acpi_als_trigger_handler(int irq, void *p) +{ + struct iio_poll_func *pf = p; + struct iio_dev *indio_dev = pf->indio_dev; + struct acpi_als *als = iio_priv(indio_dev); + s32 *buffer = als->evt_buffer; + s32 val; + int ret; + + mutex_lock(&als->lock); + + ret = acpi_als_read_value(als, acpi_als_illuminance, &val); + if (ret < 0) + goto out; + *buffer = val; + + /* + * when coming from own trigger via polls, set polling function + * timestamp here. given acpi notifier is already in a thread and call + * function directly, there is no need to set the timestamp in the + * notify function. + * + * if the timestamp was actually 0, the timestamp is set one more time. + */ + if (!pf->timestamp) + pf->timestamp = iio_get_time_ns(indio_dev); + + iio_push_to_buffers_with_timestamp(indio_dev, buffer, pf->timestamp); +out: + mutex_unlock(&als->lock); + iio_trigger_notify_done(indio_dev->trig); + + return irq_handled; +} + - ret = devm_iio_kfifo_buffer_setup(dev, indio_dev, - indio_buffer_software, null); + als->trig = devm_iio_trigger_alloc(dev, "%s-dev%d", indio_dev->name, indio_dev->id); + if (!als->trig) + return -enomem; + + ret = devm_iio_trigger_register(dev, als->trig); + if (ret) + return ret; + /* + * set hardware trigger by default to let events flow when + * bios support notification. + */ + indio_dev->trig = iio_trigger_get(als->trig); + + ret = devm_iio_triggered_buffer_setup(dev, indio_dev, + iio_pollfunc_store_time, + acpi_als_trigger_handler, + null);
Industrial I/O (iio)
24b84444eb6f8d6a5090f6fdf172cacfa43f89e9
gwendal grignou
drivers
iio
light
iio: adc: add driver for texas instruments ads131e0x adc family
the ads131e0x are a family of multichannel, simultaneous sampling, 24-bit, delta-sigma, analog-to-digital converters (adcs) with a built-in programmable gain amplifier (pga), internal reference and an onboard oscillator.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add driver for texas instruments ads131e0x adc family
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['adc']
['kconfig', 'maintainers', 'c', 'makefile']
4
967
0
--- diff --git a/maintainers b/maintainers --- a/maintainers +++ b/maintainers +ti ads131e0x adc series driver +m: tomislav denis <tomislav.denis@avl.com> +l: linux-iio@vger.kernel.org +s: maintained +f: drivers/iio/adc/ti-ads131e08.c + diff --git a/drivers/iio/adc/kconfig b/drivers/iio/adc/kconfig --- a/drivers/iio/adc/kconfig +++ b/drivers/iio/adc/kconfig +config ti_ads131e08 + tristate "texas instruments ads131e08" + depends on spi + select iio_buffer + select iio_triggered_buffer + help + say yes here to get support for texas instruments ads131e04, ads131e06 + and ads131e08 chips. + + this driver can also be built as a module. if so, the module will be + called ti-ads131e08. + diff --git a/drivers/iio/adc/makefile b/drivers/iio/adc/makefile --- a/drivers/iio/adc/makefile +++ b/drivers/iio/adc/makefile +obj-$(config_ti_ads131e08) += ti-ads131e08.o diff --git a/drivers/iio/adc/ti-ads131e08.c b/drivers/iio/adc/ti-ads131e08.c --- /dev/null +++ b/drivers/iio/adc/ti-ads131e08.c +// spdx-license-identifier: gpl-2.0 +/* + * texas instruments ads131e0x 4-, 6- and 8-channel adcs + * + * copyright (c) 2020 avl ditest gmbh + * tomislav denis <tomislav.denis@avl.com> + * + * datasheet: https://www.ti.com/lit/ds/symlink/ads131e08.pdf + */ + +#include <linux/bitfield.h> +#include <linux/clk.h> +#include <linux/delay.h> +#include <linux/module.h> + +#include <linux/iio/buffer.h> +#include <linux/iio/iio.h> +#include <linux/iio/sysfs.h> +#include <linux/iio/trigger.h> +#include <linux/iio/trigger_consumer.h> +#include <linux/iio/triggered_buffer.h> + +#include <linux/regulator/consumer.h> +#include <linux/spi/spi.h> + +#include <asm/unaligned.h> + +/* commands */ +#define ads131e08_cmd_reset 0x06 +#define ads131e08_cmd_start 0x08 +#define ads131e08_cmd_stop 0x0a +#define ads131e08_cmd_offsetcal 0x1a +#define ads131e08_cmd_sdatac 0x11 +#define ads131e08_cmd_rdata 0x12 +#define ads131e08_cmd_rreg(r) (bit(5) | (r & genmask(4, 0))) +#define ads131e08_cmd_wreg(r) (bit(6) | (r & genmask(4, 0))) + +/* registers */ +#define ads131e08_adr_cfg1r 0x01 +#define ads131e08_adr_cfg3r 0x03 +#define ads131e08_adr_ch0r 0x05 + +/* configuration register 1 */ +#define ads131e08_cfg1r_dr_mask genmask(2, 0) + +/* configuration register 3 */ +#define ads131e08_cfg3r_pdb_refbuf_mask bit(7) +#define ads131e08_cfg3r_vref_4v_mask bit(5) + +/* channel settings register */ +#define ads131e08_chr_gain_mask genmask(6, 4) +#define ads131e08_chr_mux_mask genmask(2, 0) +#define ads131e08_chr_pwd_mask bit(7) + +/* adc misc */ +#define ads131e08_default_data_rate 1 +#define ads131e08_default_pga_gain 1 +#define ads131e08_default_mux 0 + +#define ads131e08_vref_2v4_mv 2400 +#define ads131e08_vref_4v_mv 4000 + +#define ads131e08_wait_reset_cycles 18 +#define ads131e08_wait_sdecode_cycles 4 +#define ads131e08_wait_offsetcal_ms 153 +#define ads131e08_max_settling_time_ms 6 + +#define ads131e08_num_status_bytes 3 +#define ads131e08_num_data_bytes_max 24 +#define ads131e08_num_data_bytes(dr) (((dr) >= 32) ? 2 : 3) +#define ads131e08_num_data_bits(dr) (ads131e08_num_data_bytes(dr) * 8) +#define ads131e08_num_storage_bytes 4 + +enum ads131e08_ids { + ads131e04, + ads131e06, + ads131e08, +}; + +struct ads131e08_info { + unsigned int max_channels; + const char *name; +}; + +struct ads131e08_channel_config { + unsigned int pga_gain; + unsigned int mux; +}; + +struct ads131e08_state { + const struct ads131e08_info *info; + struct spi_device *spi; + struct iio_trigger *trig; + struct clk *adc_clk; + struct regulator *vref_reg; + struct ads131e08_channel_config *channel_config; + unsigned int data_rate; + unsigned int vref_mv; + unsigned int sdecode_delay_us; + unsigned int reset_delay_us; + unsigned int readback_len; + struct completion completion; + struct { + u8 data[ads131e08_num_data_bytes_max]; + s64 ts __aligned(8); + } tmp_buf; + + u8 tx_buf[3] ____cacheline_aligned; + /* + * add extra one padding byte to be able to access the last channel + * value using u32 pointer + */ + u8 rx_buf[ads131e08_num_status_bytes + + ads131e08_num_data_bytes_max + 1]; +}; + +static const struct ads131e08_info ads131e08_info_tbl[] = { + [ads131e04] = { + .max_channels = 4, + .name = "ads131e04", + }, + [ads131e06] = { + .max_channels = 6, + .name = "ads131e06", + }, + [ads131e08] = { + .max_channels = 8, + .name = "ads131e08", + }, +}; + +struct ads131e08_data_rate_desc { + unsigned int rate; /* data rate in ksps */ + u8 reg; /* reg value */ +}; + +static const struct ads131e08_data_rate_desc ads131e08_data_rate_tbl[] = { + { .rate = 64, .reg = 0x00 }, + { .rate = 32, .reg = 0x01 }, + { .rate = 16, .reg = 0x02 }, + { .rate = 8, .reg = 0x03 }, + { .rate = 4, .reg = 0x04 }, + { .rate = 2, .reg = 0x05 }, + { .rate = 1, .reg = 0x06 }, +}; + +struct ads131e08_pga_gain_desc { + unsigned int gain; /* pga gain value */ + u8 reg; /* field value */ +}; + +static const struct ads131e08_pga_gain_desc ads131e08_pga_gain_tbl[] = { + { .gain = 1, .reg = 0x01 }, + { .gain = 2, .reg = 0x02 }, + { .gain = 4, .reg = 0x04 }, + { .gain = 8, .reg = 0x05 }, + { .gain = 12, .reg = 0x06 }, +}; + +static const u8 ads131e08_valid_channel_mux_values[] = { 0, 1, 3, 4 }; + +static int ads131e08_exec_cmd(struct ads131e08_state *st, u8 cmd) +{ + int ret; + + ret = spi_write_then_read(st->spi, &cmd, 1, null, 0); + if (ret) + dev_err(&st->spi->dev, "exec cmd(%02x) failed ", cmd); + + return ret; +} + +static int ads131e08_read_reg(struct ads131e08_state *st, u8 reg) +{ + int ret; + struct spi_transfer transfer[] = { + { + .tx_buf = &st->tx_buf, + .len = 2, + .delay_usecs = st->sdecode_delay_us, + }, { + .rx_buf = &st->rx_buf, + .len = 1, + }, + }; + + st->tx_buf[0] = ads131e08_cmd_rreg(reg); + st->tx_buf[1] = 0; + + ret = spi_sync_transfer(st->spi, transfer, array_size(transfer)); + if (ret) { + dev_err(&st->spi->dev, "read register failed "); + return ret; + } + + return st->rx_buf[0]; +} + +static int ads131e08_write_reg(struct ads131e08_state *st, u8 reg, u8 value) +{ + int ret; + struct spi_transfer transfer[] = { + { + .tx_buf = &st->tx_buf, + .len = 3, + .delay_usecs = st->sdecode_delay_us, + } + }; + + st->tx_buf[0] = ads131e08_cmd_wreg(reg); + st->tx_buf[1] = 0; + st->tx_buf[2] = value; + + ret = spi_sync_transfer(st->spi, transfer, array_size(transfer)); + if (ret) + dev_err(&st->spi->dev, "write register failed "); + + return ret; +} + +static int ads131e08_read_data(struct ads131e08_state *st, int rx_len) +{ + int ret; + struct spi_transfer transfer[] = { + { + .tx_buf = &st->tx_buf, + .len = 1, + }, { + .rx_buf = &st->rx_buf, + .len = rx_len, + }, + }; + + st->tx_buf[0] = ads131e08_cmd_rdata; + + ret = spi_sync_transfer(st->spi, transfer, array_size(transfer)); + if (ret) + dev_err(&st->spi->dev, "read data failed "); + + return ret; +} + +static int ads131e08_set_data_rate(struct ads131e08_state *st, int data_rate) +{ + int i, reg, ret; + + for (i = 0; i < array_size(ads131e08_data_rate_tbl); i++) { + if (ads131e08_data_rate_tbl[i].rate == data_rate) + break; + } + + if (i == array_size(ads131e08_data_rate_tbl)) { + dev_err(&st->spi->dev, "invalid data rate value "); + return -einval; + } + + reg = ads131e08_read_reg(st, ads131e08_adr_cfg1r); + if (reg < 0) + return reg; + + reg &= ~ads131e08_cfg1r_dr_mask; + reg |= field_prep(ads131e08_cfg1r_dr_mask, + ads131e08_data_rate_tbl[i].reg); + + ret = ads131e08_write_reg(st, ads131e08_adr_cfg1r, reg); + if (ret) + return ret; + + st->data_rate = data_rate; + st->readback_len = ads131e08_num_status_bytes + + ads131e08_num_data_bytes(st->data_rate) * + st->info->max_channels; + + return 0; +} + +static int ads131e08_pga_gain_to_field_value(struct ads131e08_state *st, + unsigned int pga_gain) +{ + int i; + + for (i = 0; i < array_size(ads131e08_pga_gain_tbl); i++) { + if (ads131e08_pga_gain_tbl[i].gain == pga_gain) + break; + } + + if (i == array_size(ads131e08_pga_gain_tbl)) { + dev_err(&st->spi->dev, "invalid pga gain value "); + return -einval; + } + + return ads131e08_pga_gain_tbl[i].reg; +} + +static int ads131e08_set_pga_gain(struct ads131e08_state *st, + unsigned int channel, unsigned int pga_gain) +{ + int field_value, reg; + + field_value = ads131e08_pga_gain_to_field_value(st, pga_gain); + if (field_value < 0) + return field_value; + + reg = ads131e08_read_reg(st, ads131e08_adr_ch0r + channel); + if (reg < 0) + return reg; + + reg &= ~ads131e08_chr_gain_mask; + reg |= field_prep(ads131e08_chr_gain_mask, field_value); + + return ads131e08_write_reg(st, ads131e08_adr_ch0r + channel, reg); +} + +static int ads131e08_validate_channel_mux(struct ads131e08_state *st, + unsigned int mux) +{ + int i; + + for (i = 0; i < array_size(ads131e08_valid_channel_mux_values); i++) { + if (ads131e08_valid_channel_mux_values[i] == mux) + break; + } + + if (i == array_size(ads131e08_valid_channel_mux_values)) { + dev_err(&st->spi->dev, "invalid channel mux value "); + return -einval; + } + + return 0; +} + +static int ads131e08_set_channel_mux(struct ads131e08_state *st, + unsigned int channel, unsigned int mux) +{ + int reg; + + reg = ads131e08_read_reg(st, ads131e08_adr_ch0r + channel); + if (reg < 0) + return reg; + + reg &= ~ads131e08_chr_mux_mask; + reg |= field_prep(ads131e08_chr_mux_mask, mux); + + return ads131e08_write_reg(st, ads131e08_adr_ch0r + channel, reg); +} + +static int ads131e08_power_down_channel(struct ads131e08_state *st, + unsigned int channel, bool value) +{ + int reg; + + reg = ads131e08_read_reg(st, ads131e08_adr_ch0r + channel); + if (reg < 0) + return reg; + + reg &= ~ads131e08_chr_pwd_mask; + reg |= field_prep(ads131e08_chr_pwd_mask, value); + + return ads131e08_write_reg(st, ads131e08_adr_ch0r + channel, reg); +} + +static int ads131e08_config_reference_voltage(struct ads131e08_state *st) +{ + int reg; + + reg = ads131e08_read_reg(st, ads131e08_adr_cfg3r); + if (reg < 0) + return reg; + + reg &= ~ads131e08_cfg3r_pdb_refbuf_mask; + if (!st->vref_reg) { + reg |= field_prep(ads131e08_cfg3r_pdb_refbuf_mask, 1); + reg &= ~ads131e08_cfg3r_vref_4v_mask; + reg |= field_prep(ads131e08_cfg3r_vref_4v_mask, + st->vref_mv == ads131e08_vref_4v_mv); + } + + return ads131e08_write_reg(st, ads131e08_adr_cfg3r, reg); +} + +static int ads131e08_initial_config(struct iio_dev *indio_dev) +{ + const struct iio_chan_spec *channel = indio_dev->channels; + struct ads131e08_state *st = iio_priv(indio_dev); + unsigned long active_channels = 0; + int ret, i; + + ret = ads131e08_exec_cmd(st, ads131e08_cmd_reset); + if (ret) + return ret; + + udelay(st->reset_delay_us); + + /* disable read data in continuous mode (enabled by default) */ + ret = ads131e08_exec_cmd(st, ads131e08_cmd_sdatac); + if (ret) + return ret; + + ret = ads131e08_set_data_rate(st, ads131e08_default_data_rate); + if (ret) + return ret; + + ret = ads131e08_config_reference_voltage(st); + if (ret) + return ret; + + for (i = 0; i < indio_dev->num_channels; i++) { + ret = ads131e08_set_pga_gain(st, channel->channel, + st->channel_config[i].pga_gain); + if (ret) + return ret; + + ret = ads131e08_set_channel_mux(st, channel->channel, + st->channel_config[i].mux); + if (ret) + return ret; + + active_channels |= bit(channel->channel); + channel++; + } + + /* power down unused channels */ + for_each_clear_bit(i, &active_channels, st->info->max_channels) { + ret = ads131e08_power_down_channel(st, i, true); + if (ret) + return ret; + } + + /* request channel offset calibration */ + ret = ads131e08_exec_cmd(st, ads131e08_cmd_offsetcal); + if (ret) + return ret; + + /* + * channel offset calibration is triggered with the first start + * command. since calibration takes more time than settling operation, + * this causes timeout error when command start is sent first + * time (e.g. first call of the ads131e08_read_direct method). + * to avoid this problem offset calibration is triggered here. + */ + ret = ads131e08_exec_cmd(st, ads131e08_cmd_start); + if (ret) + return ret; + + msleep(ads131e08_wait_offsetcal_ms); + + return ads131e08_exec_cmd(st, ads131e08_cmd_stop); +} + +static int ads131e08_pool_data(struct ads131e08_state *st) +{ + unsigned long timeout; + int ret; + + reinit_completion(&st->completion); + + ret = ads131e08_exec_cmd(st, ads131e08_cmd_start); + if (ret) + return ret; + + timeout = msecs_to_jiffies(ads131e08_max_settling_time_ms); + ret = wait_for_completion_timeout(&st->completion, timeout); + if (!ret) + return -etimedout; + + ret = ads131e08_read_data(st, st->readback_len); + if (ret) + return ret; + + return ads131e08_exec_cmd(st, ads131e08_cmd_stop); +} + +static int ads131e08_read_direct(struct iio_dev *indio_dev, + struct iio_chan_spec const *channel, int *value) +{ + struct ads131e08_state *st = iio_priv(indio_dev); + u8 num_bits, *src; + int ret; + + ret = ads131e08_pool_data(st); + if (ret) + return ret; + + src = st->rx_buf + ads131e08_num_status_bytes + + channel->channel * ads131e08_num_data_bytes(st->data_rate); + + num_bits = ads131e08_num_data_bits(st->data_rate); + *value = sign_extend32(get_unaligned_be32(src) >> (32 - num_bits), num_bits - 1); + + return 0; +} + +static int ads131e08_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *channel, int *value, + int *value2, long mask) +{ + struct ads131e08_state *st = iio_priv(indio_dev); + int ret; + + switch (mask) { + case iio_chan_info_raw: + ret = iio_device_claim_direct_mode(indio_dev); + if (ret) + return ret; + + ret = ads131e08_read_direct(indio_dev, channel, value); + iio_device_release_direct_mode(indio_dev); + if (ret) + return ret; + + return iio_val_int; + + case iio_chan_info_scale: + if (st->vref_reg) { + ret = regulator_get_voltage(st->vref_reg); + if (ret < 0) + return ret; + + *value = ret / 1000; + } else { + *value = st->vref_mv; + } + + *value /= st->channel_config[channel->address].pga_gain; + *value2 = ads131e08_num_data_bits(st->data_rate) - 1; + + return iio_val_fractional_log2; + + case iio_chan_info_samp_freq: + *value = st->data_rate; + + return iio_val_int; + + default: + return -einval; + } +} + +static int ads131e08_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *channel, int value, + int value2, long mask) +{ + struct ads131e08_state *st = iio_priv(indio_dev); + int ret; + + switch (mask) { + case iio_chan_info_samp_freq: + ret = iio_device_claim_direct_mode(indio_dev); + if (ret) + return ret; + + ret = ads131e08_set_data_rate(st, value); + iio_device_release_direct_mode(indio_dev); + return ret; + + default: + return -einval; + } +} + +static iio_const_attr_samp_freq_avail("1 2 4 8 16 32 64"); + +static struct attribute *ads131e08_attributes[] = { + &iio_const_attr_sampling_frequency_available.dev_attr.attr, + null +}; + +static const struct attribute_group ads131e08_attribute_group = { + .attrs = ads131e08_attributes, +}; + +static int ads131e08_debugfs_reg_access(struct iio_dev *indio_dev, + unsigned int reg, unsigned int writeval, unsigned int *readval) +{ + struct ads131e08_state *st = iio_priv(indio_dev); + + if (readval) { + int ret = ads131e08_read_reg(st, reg); + *readval = ret; + return ret; + } + + return ads131e08_write_reg(st, reg, writeval); +} + +static const struct iio_info ads131e08_iio_info = { + .read_raw = ads131e08_read_raw, + .write_raw = ads131e08_write_raw, + .attrs = &ads131e08_attribute_group, + .debugfs_reg_access = &ads131e08_debugfs_reg_access, +}; + +static int ads131e08_set_trigger_state(struct iio_trigger *trig, bool state) +{ + struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); + struct ads131e08_state *st = iio_priv(indio_dev); + u8 cmd = state ? ads131e08_cmd_start : ads131e08_cmd_stop; + + return ads131e08_exec_cmd(st, cmd); +} + +static const struct iio_trigger_ops ads131e08_trigger_ops = { + .set_trigger_state = &ads131e08_set_trigger_state, + .validate_device = &iio_trigger_validate_own_device, +}; + +static irqreturn_t ads131e08_trigger_handler(int irq, void *private) +{ + struct iio_poll_func *pf = private; + struct iio_dev *indio_dev = pf->indio_dev; + struct ads131e08_state *st = iio_priv(indio_dev); + unsigned int chn, i = 0; + u8 *src, *dest; + int ret; + + /* + * the number of data bits per channel depends on the data rate. + * for 32 and 64 ksps data rates, number of data bits per channel + * is 16. this case is not compliant with used (fixed) scan element + * type (be:s24/32>>8). so we use a little tweak to pack properly + * 16 bits of data into the buffer. + */ + unsigned int num_bytes = ads131e08_num_data_bytes(st->data_rate); + u8 tweek_offset = num_bytes == 2 ? 1 : 0; + + if (iio_trigger_using_own(indio_dev)) + ret = ads131e08_read_data(st, st->readback_len); + else + ret = ads131e08_pool_data(st); + + if (ret) + goto out; + + for_each_set_bit(chn, indio_dev->active_scan_mask, indio_dev->masklength) { + src = st->rx_buf + ads131e08_num_status_bytes + chn * num_bytes; + dest = st->tmp_buf.data + i * ads131e08_num_storage_bytes; + + /* + * tweek offset is 0: + * +---+---+---+---+ + * |d0 |d1 |d2 | x | (3 data bytes) + * +---+---+---+---+ + * a+0 a+1 a+2 a+3 + * + * tweek offset is 1: + * +---+---+---+---+ + * |p0 |d0 |d1 | x | (one padding byte and 2 data bytes) + * +---+---+---+---+ + * a+0 a+1 a+2 a+3 + */ + memcpy(dest + tweek_offset, src, num_bytes); + + /* + * data conversion from 16 bits of data to 24 bits of data + * is done by sign extension (properly filling padding byte). + */ + if (tweek_offset) + *dest = *src & bit(7) ? 0xff : 0x00; + + i++; + } + + iio_push_to_buffers_with_timestamp(indio_dev, st->tmp_buf.data, + iio_get_time_ns(indio_dev)); + +out: + iio_trigger_notify_done(indio_dev->trig); + + return irq_handled; +} + +static irqreturn_t ads131e08_interrupt(int irq, void *private) +{ + struct iio_dev *indio_dev = private; + struct ads131e08_state *st = iio_priv(indio_dev); + + if (iio_buffer_enabled(indio_dev) && iio_trigger_using_own(indio_dev)) + iio_trigger_poll(st->trig); + else + complete(&st->completion); + + return irq_handled; +} + +static int ads131e08_alloc_channels(struct iio_dev *indio_dev) +{ + struct ads131e08_state *st = iio_priv(indio_dev); + struct ads131e08_channel_config *channel_config; + struct device *dev = &st->spi->dev; + struct iio_chan_spec *channels; + struct fwnode_handle *node; + unsigned int channel, tmp; + int num_channels, i, ret; + + ret = device_property_read_u32(dev, "ti,vref-internal", &tmp); + if (ret) + tmp = 0; + + switch (tmp) { + case 0: + st->vref_mv = ads131e08_vref_2v4_mv; + break; + case 1: + st->vref_mv = ads131e08_vref_4v_mv; + break; + default: + dev_err(&st->spi->dev, "invalid internal voltage reference "); + return -einval; + } + + num_channels = device_get_child_node_count(dev); + if (num_channels == 0) { + dev_err(&st->spi->dev, "no channel children "); + return -enodev; + } + + if (num_channels > st->info->max_channels) { + dev_err(&st->spi->dev, "num of channel children out of range "); + return -einval; + } + + channels = devm_kcalloc(&st->spi->dev, num_channels, + sizeof(*channels), gfp_kernel); + if (!channels) + return -enomem; + + channel_config = devm_kcalloc(&st->spi->dev, num_channels, + sizeof(*channel_config), gfp_kernel); + if (!channel_config) + return -enomem; + + i = 0; + device_for_each_child_node(dev, node) { + ret = fwnode_property_read_u32(node, "reg", &channel); + if (ret) + return ret; + + ret = fwnode_property_read_u32(node, "ti,gain", &tmp); + if (ret) { + channel_config[i].pga_gain = ads131e08_default_pga_gain; + } else { + ret = ads131e08_pga_gain_to_field_value(st, tmp); + if (ret < 0) + return ret; + + channel_config[i].pga_gain = tmp; + } + + ret = fwnode_property_read_u32(node, "ti,mux", &tmp); + if (ret) { + channel_config[i].mux = ads131e08_default_mux; + } else { + ret = ads131e08_validate_channel_mux(st, tmp); + if (ret) + return ret; + + channel_config[i].mux = tmp; + } + + channels[i].type = iio_voltage; + channels[i].indexed = 1; + channels[i].channel = channel; + channels[i].address = i; + channels[i].info_mask_separate = bit(iio_chan_info_raw) | + bit(iio_chan_info_scale); + channels[i].info_mask_shared_by_type = bit(iio_chan_info_samp_freq); + channels[i].scan_index = channel; + channels[i].scan_type.sign = 's'; + channels[i].scan_type.realbits = 24; + channels[i].scan_type.storagebits = 32; + channels[i].scan_type.shift = 8; + channels[i].scan_type.endianness = iio_be; + i++; + } + + indio_dev->channels = channels; + indio_dev->num_channels = num_channels; + st->channel_config = channel_config; + + return 0; +} + +static void ads131e08_regulator_disable(void *data) +{ + struct ads131e08_state *st = data; + + regulator_disable(st->vref_reg); +} + +static void ads131e08_clk_disable(void *data) +{ + struct ads131e08_state *st = data; + + clk_disable_unprepare(st->adc_clk); +} + +static int ads131e08_probe(struct spi_device *spi) +{ + const struct ads131e08_info *info; + struct ads131e08_state *st; + struct iio_dev *indio_dev; + unsigned long adc_clk_hz; + unsigned long adc_clk_ns; + int ret; + + info = device_get_match_data(&spi->dev); + if (!info) { + dev_err(&spi->dev, "failed to get match data "); + return -enodev; + } + + indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); + if (!indio_dev) { + dev_err(&spi->dev, "failed to allocate iio device "); + return -enomem; + } + + st = iio_priv(indio_dev); + st->info = info; + st->spi = spi; + + ret = ads131e08_alloc_channels(indio_dev); + if (ret) + return ret; + + indio_dev->name = st->info->name; + indio_dev->dev.parent = &spi->dev; + indio_dev->info = &ads131e08_iio_info; + indio_dev->modes = indio_direct_mode; + + init_completion(&st->completion); + + if (spi->irq) { + ret = devm_request_irq(&spi->dev, spi->irq, + ads131e08_interrupt, + irqf_trigger_falling | irqf_oneshot, + spi->dev.driver->name, indio_dev); + if (ret) + return dev_err_probe(&spi->dev, ret, + "request irq failed "); + } else { + dev_err(&spi->dev, "data ready irq missing "); + return -enodev; + } + + st->trig = devm_iio_trigger_alloc(&spi->dev, "%s-dev%d", + indio_dev->name, indio_dev->id); + if (!st->trig) { + dev_err(&spi->dev, "failed to allocate iio trigger "); + return -enomem; + } + + st->trig->ops = &ads131e08_trigger_ops; + st->trig->dev.parent = &spi->dev; + iio_trigger_set_drvdata(st->trig, indio_dev); + ret = devm_iio_trigger_register(&spi->dev, st->trig); + if (ret) { + dev_err(&spi->dev, "failed to register iio trigger "); + return -enomem; + } + + indio_dev->trig = iio_trigger_get(st->trig); + + ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, + null, &ads131e08_trigger_handler, null); + if (ret) { + dev_err(&spi->dev, "failed to setup iio buffer "); + return ret; + } + + st->vref_reg = devm_regulator_get_optional(&spi->dev, "vref"); + if (!is_err(st->vref_reg)) { + ret = regulator_enable(st->vref_reg); + if (ret) { + dev_err(&spi->dev, + "failed to enable external vref supply "); + return ret; + } + + ret = devm_add_action_or_reset(&spi->dev, ads131e08_regulator_disable, st); + if (ret) + return ret; + } else { + if (ptr_err(st->vref_reg) != -enodev) + return ptr_err(st->vref_reg); + + st->vref_reg = null; + } + + st->adc_clk = devm_clk_get(&spi->dev, "adc-clk"); + if (is_err(st->adc_clk)) + return dev_err_probe(&spi->dev, ptr_err(st->adc_clk), + "failed to get the adc clock "); + + ret = clk_prepare_enable(st->adc_clk); + if (ret) { + dev_err(&spi->dev, "failed to prepare/enable the adc clock "); + return ret; + } + + ret = devm_add_action_or_reset(&spi->dev, ads131e08_clk_disable, st); + if (ret) + return ret; + + adc_clk_hz = clk_get_rate(st->adc_clk); + if (!adc_clk_hz) { + dev_err(&spi->dev, "failed to get the adc clock rate "); + return -einval; + } + + adc_clk_ns = nsec_per_sec / adc_clk_hz; + st->sdecode_delay_us = div_round_up( + ads131e08_wait_sdecode_cycles * adc_clk_ns, nsec_per_usec); + st->reset_delay_us = div_round_up( + ads131e08_wait_reset_cycles * adc_clk_ns, nsec_per_usec); + + ret = ads131e08_initial_config(indio_dev); + if (ret) { + dev_err(&spi->dev, "initial configuration failed "); + return ret; + } + + return devm_iio_device_register(&spi->dev, indio_dev); +} + +static const struct of_device_id ads131e08_of_match[] = { + { .compatible = "ti,ads131e04", + .data = &ads131e08_info_tbl[ads131e04], }, + { .compatible = "ti,ads131e06", + .data = &ads131e08_info_tbl[ads131e06], }, + { .compatible = "ti,ads131e08", + .data = &ads131e08_info_tbl[ads131e08], }, + {} +}; +module_device_table(of, ads131e08_of_match); + +static struct spi_driver ads131e08_driver = { + .driver = { + .name = "ads131e08", + .of_match_table = ads131e08_of_match, + }, + .probe = ads131e08_probe, +}; +module_spi_driver(ads131e08_driver); + +module_author("tomislav denis <tomislav.denis@avl.com>"); +module_description("driver for ads131e0x adc family"); +module_license("gpl v2");
Industrial I/O (iio)
d935eddd2799f2559d3c909e5977c0a85a5af1b7
tomislav denis
drivers
iio
adc
iio: adc: ad7124: allow more than 8 channels
currently ad7124-8 driver cannot use more than 8 iio channels because it was assigning the channel configurations bijectively to channels specified in the device-tree. this is not possible to do when using more than 8 channels as ad7124-8 has only 8 configuration registers.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
allow more than 8 channels
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['adc', 'ad7124']
['c']
1
301
158
--- diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c --- a/drivers/iio/adc/ad7124.c +++ b/drivers/iio/adc/ad7124.c +#include <linux/bitops.h> +#include <linux/kfifo.h> +#define ad7124_conf_addr_offset 20 +#define ad7124_max_configs 8 +#define ad7124_max_channels 16 + + bool live; + unsigned int cfg_slot; - unsigned int ain; + unsigned int odr_sel_bits; +struct ad7124_channel { + unsigned int nr; + struct ad7124_channel_config cfg; + unsigned int ain; + unsigned int slot; +}; + - struct ad7124_channel_config *channel_config; + struct ad7124_channel *channels; + struct mutex cfgs_lock; /* lock for configs access */ + unsigned long cfg_slots_status; /* bitmap with slot status (1 means it is used) */ + declare_kfifo(live_cfgs_fifo, struct ad7124_channel_config *, ad7124_max_configs); -static int ad7124_set_channel(struct ad_sigma_delta *sd, unsigned int channel) -{ - struct ad7124_state *st = container_of(sd, struct ad7124_state, sd); - unsigned int val; - - val = st->channel_config[channel].ain | ad7124_channel_en(1) | - ad7124_channel_setup(channel); - - return ad_sd_write_reg(&st->sd, ad7124_channel(channel), 2, val); -} - -static const struct ad_sigma_delta_info ad7124_sigma_delta_info = { - .set_channel = ad7124_set_channel, - .set_mode = ad7124_set_mode, - .has_registers = true, - .addr_shift = 0, - .read_mask = bit(6), - .data_reg = ad7124_data, - .irq_flags = irqf_trigger_falling, -}; - -static int ad7124_set_channel_odr(struct ad7124_state *st, - unsigned int channel, - unsigned int odr) +static void ad7124_set_channel_odr(struct ad7124_state *st, unsigned int channel, unsigned int odr) - int ret; - ret = ad7124_spi_write_mask(st, ad7124_filter(channel), - ad7124_filter_fs_msk, - ad7124_filter_fs(odr_sel_bits), 3); - if (ret < 0) - return ret; - /* fadc = fclk / (fs[10:0] x 32) */ - st->channel_config[channel].odr = - div_round_closest(fclk, odr_sel_bits * 32); - - return 0; -} - -static int ad7124_set_channel_gain(struct ad7124_state *st, - unsigned int channel, - unsigned int gain) -{ - unsigned int res; - int ret; + if (odr_sel_bits != st->channels[channel].cfg.odr_sel_bits) + st->channels[channel].cfg.live = false; - res = ad7124_find_closest_match(ad7124_gain, - array_size(ad7124_gain), gain); - ret = ad7124_spi_write_mask(st, ad7124_config(channel), - ad7124_config_pga_msk, - ad7124_config_pga(res), 2); - if (ret < 0) - return ret; - - st->channel_config[channel].pga_bits = res; - - return 0; + /* fadc = fclk / (fs[10:0] x 32) */ + st->channels[channel].cfg.odr = div_round_closest(fclk, odr_sel_bits * 32); + st->channels[channel].cfg.odr_sel_bits = odr_sel_bits; - fadc = st->channel_config[channel].odr; + fadc = st->channels[channel].cfg.odr; - switch (st->channel_config[channel].filter_type) { + switch (st->channels[channel].cfg.filter_type) { -static int ad7124_set_3db_filter_freq(struct ad7124_state *st, - unsigned int channel, - unsigned int freq) +static void ad7124_set_3db_filter_freq(struct ad7124_state *st, unsigned int channel, + unsigned int freq) - if (st->channel_config[channel].filter_type != new_filter) { - int ret; + if (new_odr != st->channels[channel].cfg.odr) + st->channels[channel].cfg.live = false; - st->channel_config[channel].filter_type = new_filter; - ret = ad7124_spi_write_mask(st, ad7124_filter(channel), - ad7124_filter_type_msk, - ad7124_filter_type_sel(new_filter), - 3); - if (ret < 0) - return ret; + st->channels[channel].cfg.filter_type = new_filter; + st->channels[channel].cfg.odr = new_odr; +} + +static struct ad7124_channel_config *ad7124_find_similar_live_cfg(struct ad7124_state *st, + struct ad7124_channel_config *cfg) +{ + struct ad7124_channel_config *cfg_aux; + ptrdiff_t cmp_size; + int i; + + cmp_size = (u8 *)&cfg->live - (u8 *)cfg; + for (i = 0; i < st->num_channels; i++) { + cfg_aux = &st->channels[i].cfg; + + if (cfg_aux->live && !memcmp(cfg, cfg_aux, cmp_size)) + return cfg_aux; + } + + return null; +} + +static int ad7124_find_free_config_slot(struct ad7124_state *st) +{ + unsigned int free_cfg_slot; + + free_cfg_slot = find_next_zero_bit(&st->cfg_slots_status, ad7124_max_configs, 0); + if (free_cfg_slot == ad7124_max_configs) + return -1; + + return free_cfg_slot; +} + +static int ad7124_init_config_vref(struct ad7124_state *st, struct ad7124_channel_config *cfg) +{ + unsigned int refsel = cfg->refsel; + + switch (refsel) { + case ad7124_refin1: + case ad7124_refin2: + case ad7124_avdd_ref: + if (is_err(st->vref[refsel])) { + dev_err(&st->sd.spi->dev, + "error, trying to use external voltage reference without a %s regulator. ", + ad7124_ref_names[refsel]); + return ptr_err(st->vref[refsel]); + } + cfg->vref_mv = regulator_get_voltage(st->vref[refsel]); + /* conversion from uv to mv */ + cfg->vref_mv /= 1000; + return 0; + case ad7124_int_ref: + cfg->vref_mv = 2500; + st->adc_control &= ~ad7124_adc_ctrl_ref_en_msk; + st->adc_control |= ad7124_adc_ctrl_ref_en(1); + return ad_sd_write_reg(&st->sd, ad7124_adc_control, + 2, st->adc_control); + default: + dev_err(&st->sd.spi->dev, "invalid reference %d ", refsel); + return -einval; + } +} + +static int ad7124_write_config(struct ad7124_state *st, struct ad7124_channel_config *cfg, + unsigned int cfg_slot) +{ + unsigned int tmp; + unsigned int val; + int ret; + + cfg->cfg_slot = cfg_slot; + + tmp = (cfg->buf_positive << 1) + cfg->buf_negative; + val = ad7124_config_bipolar(cfg->bipolar) | ad7124_config_ref_sel(cfg->refsel) | + ad7124_config_in_buff(tmp); + ret = ad_sd_write_reg(&st->sd, ad7124_config(cfg->cfg_slot), 2, val); + if (ret < 0) + return ret; + + tmp = ad7124_filter_type_sel(cfg->filter_type); + ret = ad7124_spi_write_mask(st, ad7124_filter(cfg->cfg_slot), ad7124_filter_type_msk, + tmp, 3); + if (ret < 0) + return ret; + + ret = ad7124_spi_write_mask(st, ad7124_filter(cfg->cfg_slot), ad7124_filter_fs_msk, + ad7124_filter_fs(cfg->odr_sel_bits), 3); + if (ret < 0) + return ret; + + return ad7124_spi_write_mask(st, ad7124_config(cfg->cfg_slot), ad7124_config_pga_msk, + ad7124_config_pga(cfg->pga_bits), 2); +} + +static struct ad7124_channel_config *ad7124_pop_config(struct ad7124_state *st) +{ + struct ad7124_channel_config *lru_cfg; + struct ad7124_channel_config *cfg; + int ret; + int i; + + /* + * pop least recently used config from the fifo + * in order to make room for the new one + */ + ret = kfifo_get(&st->live_cfgs_fifo, &lru_cfg); + if (ret <= 0) + return null; + + lru_cfg->live = false; + + /* mark slot as free */ + assign_bit(lru_cfg->cfg_slot, &st->cfg_slots_status, 0); + + /* invalidate all other configs that pointed to this one */ + for (i = 0; i < st->num_channels; i++) { + cfg = &st->channels[i].cfg; + + if (cfg->cfg_slot == lru_cfg->cfg_slot) + cfg->live = false; + } + + return lru_cfg; +} + +static int ad7124_push_config(struct ad7124_state *st, struct ad7124_channel_config *cfg) +{ + struct ad7124_channel_config *lru_cfg; + int free_cfg_slot; + + free_cfg_slot = ad7124_find_free_config_slot(st); + if (free_cfg_slot >= 0) { + /* push the new config in configs queue */ + kfifo_put(&st->live_cfgs_fifo, cfg); + } else { + /* pop one config to make room for the new one */ + lru_cfg = ad7124_pop_config(st); + if (!lru_cfg) + return -einval; + + /* push the new config in configs queue */ + free_cfg_slot = lru_cfg->cfg_slot; + kfifo_put(&st->live_cfgs_fifo, cfg); + } + + /* mark slot as used */ + assign_bit(free_cfg_slot, &st->cfg_slots_status, 1); + + return ad7124_write_config(st, cfg, free_cfg_slot); +} + +static int ad7124_enable_channel(struct ad7124_state *st, struct ad7124_channel *ch) +{ + ch->cfg.live = true; + return ad_sd_write_reg(&st->sd, ad7124_channel(ch->nr), 2, ch->ain | + ad7124_channel_setup(ch->cfg.cfg_slot) | ad7124_channel_en(1)); +} + +static int ad7124_prepare_read(struct ad7124_state *st, int address) +{ + struct ad7124_channel_config *cfg = &st->channels[address].cfg; + struct ad7124_channel_config *live_cfg; + + /* + * before doing any reads assign the channel a configuration. + * check if channel's config is on the device + */ + if (!cfg->live) { + /* check if config matches another one */ + live_cfg = ad7124_find_similar_live_cfg(st, cfg); + if (!live_cfg) + ad7124_push_config(st, cfg); + else + cfg->cfg_slot = live_cfg->cfg_slot; - return ad7124_set_channel_odr(st, channel, new_odr); + /* point channel to the config slot and enable */ + return ad7124_enable_channel(st, &st->channels[address]); +static int ad7124_set_channel(struct ad_sigma_delta *sd, unsigned int channel) +{ + struct ad7124_state *st = container_of(sd, struct ad7124_state, sd); + int ret; + + mutex_lock(&st->cfgs_lock); + ret = ad7124_prepare_read(st, channel); + mutex_unlock(&st->cfgs_lock); + + return ret; +} + +static const struct ad_sigma_delta_info ad7124_sigma_delta_info = { + .set_channel = ad7124_set_channel, + .set_mode = ad7124_set_mode, + .has_registers = true, + .addr_shift = 0, + .read_mask = bit(6), + .data_reg = ad7124_data, + .irq_flags = irqf_trigger_falling +}; + - ret = ad_sd_write_reg(&st->sd, - ad7124_channel(chan->address), 2, - st->channel_config[chan->address].ain | - ad7124_channel_en(0)); + ret = ad_sd_write_reg(&st->sd, ad7124_channel(chan->address), 2, + st->channels[chan->address].ain | ad7124_channel_en(0)); - idx = st->channel_config[chan->address].pga_bits; - *val = st->channel_config[chan->address].vref_mv; - if (st->channel_config[chan->address].bipolar) + mutex_lock(&st->cfgs_lock); + + idx = st->channels[chan->address].cfg.pga_bits; + *val = st->channels[chan->address].cfg.vref_mv; + if (st->channels[chan->address].cfg.bipolar) + mutex_unlock(&st->cfgs_lock); - if (st->channel_config[chan->address].bipolar) + mutex_lock(&st->cfgs_lock); + if (st->channels[chan->address].cfg.bipolar) + mutex_unlock(&st->cfgs_lock); - *val = st->channel_config[chan->address].odr; + mutex_lock(&st->cfgs_lock); + *val = st->channels[chan->address].cfg.odr; + mutex_unlock(&st->cfgs_lock); + mutex_lock(&st->cfgs_lock); + mutex_unlock(&st->cfgs_lock); + + int ret = 0; + + mutex_lock(&st->cfgs_lock); - if (val2 != 0) - return -einval; + if (val2 != 0) { + ret = -einval; + break; + } - return ad7124_set_channel_odr(st, chan->address, val); + ad7124_set_channel_odr(st, chan->address, val); + break; - if (val != 0) - return -einval; + if (val != 0) { + ret = -einval; + break; + } - if (st->channel_config[chan->address].bipolar) + if (st->channels[chan->address].cfg.bipolar) - vref = st->channel_config[chan->address].vref_mv * 1000000ll; + vref = st->channels[chan->address].cfg.vref_mv * 1000000ll; + res = ad7124_find_closest_match(ad7124_gain, array_size(ad7124_gain), gain); + + if (st->channels[chan->address].cfg.pga_bits != res) + st->channels[chan->address].cfg.live = false; - return ad7124_set_channel_gain(st, chan->address, gain); + st->channels[chan->address].cfg.pga_bits = res; + break; - if (val2 != 0) - return -einval; + if (val2 != 0) { + ret = -einval; + break; + } - return ad7124_set_3db_filter_freq(st, chan->address, val); + ad7124_set_3db_filter_freq(st, chan->address, val); + break; - return -einval; + ret = -einval; + + mutex_unlock(&st->cfgs_lock); + return ret; -static int ad7124_init_channel_vref(struct ad7124_state *st, - unsigned int channel_number) -{ - unsigned int refsel = st->channel_config[channel_number].refsel; - - switch (refsel) { - case ad7124_refin1: - case ad7124_refin2: - case ad7124_avdd_ref: - if (is_err(st->vref[refsel])) { - dev_err(&st->sd.spi->dev, - "error, trying to use external voltage reference without a %s regulator. ", - ad7124_ref_names[refsel]); - return ptr_err(st->vref[refsel]); - } - st->channel_config[channel_number].vref_mv = - regulator_get_voltage(st->vref[refsel]); - /* conversion from uv to mv */ - st->channel_config[channel_number].vref_mv /= 1000; - break; - case ad7124_int_ref: - st->channel_config[channel_number].vref_mv = 2500; - st->adc_control &= ~ad7124_adc_ctrl_ref_en_msk; - st->adc_control |= ad7124_adc_ctrl_ref_en(1); - return ad_sd_write_reg(&st->sd, ad7124_adc_control, - 2, st->adc_control); - default: - dev_err(&st->sd.spi->dev, "invalid reference %d ", refsel); - return -einval; - } - - return 0; -} - + struct ad7124_channel_config *cfg; + struct ad7124_channel *channels; - struct ad7124_channel_config *chan_config; - chan_config = devm_kcalloc(indio_dev->dev.parent, st->num_channels, - sizeof(*chan_config), gfp_kernel); - if (!chan_config) + channels = devm_kcalloc(indio_dev->dev.parent, st->num_channels, sizeof(*channels), + gfp_kernel); + if (!channels) - st->channel_config = chan_config; + st->channels = channels; + cfg = &st->channels[channel].cfg; + - st->channel_config[channel].ain = ad7124_channel_ainp(ain[0]) | + st->channels[channel].nr = channel; + st->channels[channel].ain = ad7124_channel_ainp(ain[0]) | - st->channel_config[channel].bipolar = - of_property_read_bool(child, "bipolar"); + + cfg->bipolar = of_property_read_bool(child, "bipolar"); - st->channel_config[channel].refsel = ad7124_int_ref; + cfg->refsel = ad7124_int_ref; - st->channel_config[channel].refsel = tmp; + cfg->refsel = tmp; - st->channel_config[channel].buf_positive = - of_property_read_bool(child, "adi,buffered-positive"); - st->channel_config[channel].buf_negative = - of_property_read_bool(child, "adi,buffered-negative"); + cfg->buf_positive = of_property_read_bool(child, "adi,buffered-positive"); + cfg->buf_negative = of_property_read_bool(child, "adi,buffered-negative"); - unsigned int val, fclk, power_mode; - int i, ret, tmp; + unsigned int fclk, power_mode; + int i, ret; + mutex_init(&st->cfgs_lock); + init_kfifo(st->live_cfgs_fifo); - val = st->channel_config[i].ain | ad7124_channel_setup(i); - ret = ad_sd_write_reg(&st->sd, ad7124_channel(i), 2, val); - if (ret < 0) - return ret; - ret = ad7124_init_channel_vref(st, i); + ret = ad7124_init_config_vref(st, &st->channels[i].cfg); - tmp = (st->channel_config[i].buf_positive << 1) + - st->channel_config[i].buf_negative; - - val = ad7124_config_bipolar(st->channel_config[i].bipolar) | - ad7124_config_ref_sel(st->channel_config[i].refsel) | - ad7124_config_in_buff(tmp); - ret = ad_sd_write_reg(&st->sd, ad7124_config(i), 2, val); - if (ret < 0) - return ret; - * set all the enabled channels to this default value. + * set all channels to this default value. - ret = ad7124_set_channel_odr(st, i, 10); + ad7124_set_channel_odr(st, i, 10);
Industrial I/O (iio)
7b8d045e497a04dd88546da51f34fa3b102778d2
alexandru tachici
drivers
iio
adc
iio: dac: ad5686: add support for ad5673r/ad5677r
the ad5673r/ad5677r are low power, 16-channel, 12-/16-bit buffered voltage output digital-to-analog converters (dacs). they include a 2.5 v internal reference (enabled by default).
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for ad5673r/ad5677r
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['dac', 'ad5686']
['h', 'kconfig', 'c']
4
21
4
--- diff --git a/drivers/iio/dac/kconfig b/drivers/iio/dac/kconfig --- a/drivers/iio/dac/kconfig +++ b/drivers/iio/dac/kconfig - ad5671r, ad5675r, ad5691r, ad5692r, ad5693, ad5693r, ad5694, ad5694r, - ad5695r, ad5696, and ad5696r digital to analog converters. + ad5671r, ad5673r, ad5675r, ad5677r, ad5691r, ad5692r, ad5693, ad5693r, + ad5694, ad5694r, ad5695r, ad5696, and ad5696r digital to analog + converters. diff --git a/drivers/iio/dac/ad5686.c b/drivers/iio/dac/ad5686.c --- a/drivers/iio/dac/ad5686.c +++ b/drivers/iio/dac/ad5686.c + [id_ad5673r] = { + .channels = ad5674r_channels, + .int_vref_mv = 2500, + .num_channels = 16, + .regmap_type = ad5686_regmap, + }, + [id_ad5677r] = { + .channels = ad5679r_channels, + .int_vref_mv = 2500, + .num_channels = 16, + .regmap_type = ad5686_regmap, + }, diff --git a/drivers/iio/dac/ad5686.h b/drivers/iio/dac/ad5686.h --- a/drivers/iio/dac/ad5686.h +++ b/drivers/iio/dac/ad5686.h + id_ad5673r, + id_ad5677r, diff --git a/drivers/iio/dac/ad5696-i2c.c b/drivers/iio/dac/ad5696-i2c.c --- a/drivers/iio/dac/ad5696-i2c.c +++ b/drivers/iio/dac/ad5696-i2c.c - * ad5671r, ad5675r, ad5691r, ad5692r, ad5693, ad5693r, - * ad5694, ad5694r, ad5695r, ad5696, ad5696r + * ad5338r, ad5671r, ad5673r, ad5675r, ad5677r, ad5691r, ad5692r, ad5693, + * ad5693r, ad5694, ad5694r, ad5695r, ad5696, ad5696r + {"ad5673r", id_ad5673r}, + {"ad5677r", id_ad5677r},
Industrial I/O (iio)
477bd010c20efc377c55e6077b0526201a7a33b3
mircea caprioru
drivers
iio
dac
iio: imu: inv_mpu6050: use as standalone trigger
it may happen that the mpu6050 is the only hardware trigger available on your system such as this:
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
use as standalone trigger
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['imu', 'inv_mpu6050']
['c']
1
10
0
--- diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_trigger.c b/drivers/iio/imu/inv_mpu6050/inv_mpu_trigger.c --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_trigger.c +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_trigger.c + /* + * if the mpu6050 is just used as a trigger, then the scan mask + * is not allocated so we simply enable the temperature channel + * as a dummy and bail out. + */ + if (!indio_dev->active_scan_mask) { + st->chip_config.temp_fifo_enable = true; + return inv_mpu6050_sensor_temp; + } +
Industrial I/O (iio)
454c219f5d8452eff87b701735ae1224f4410356
linus walleij
drivers
iio
imu, inv_mpu6050
iio: proximity: add a chromeos ec mkbp proximity driver
add support for a chromeos ec proximity driver that exposes a "front" proximity sensor via the iio subsystem. the ec decides when front proximity is near and sets an mkbp switch 'ec_mkbp_front_proximity' to notify the kernel of proximity. similarly, when proximity detects something far away it sets the switch bit to 0. for now this driver exposes a single sensor, but it could be expanded in the future via more mkbp bits if desired.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add a chromeos ec mkbp proximity driver
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['proximity']
['kconfig', 'c', 'makefile']
3
283
0
--- diff --git a/drivers/iio/proximity/kconfig b/drivers/iio/proximity/kconfig --- a/drivers/iio/proximity/kconfig +++ b/drivers/iio/proximity/kconfig +config cros_ec_mkbp_proximity + tristate "chromeos ec mkbp proximity sensor" + depends on cros_ec + help + say y here to enable the proximity sensor implemented via the chromeos ec mkbp + switches protocol. you must enable one bus option (cros_ec_i2c or cros_ec_spi) + to use this. + + to compile this driver as a module, choose m here: the + module will be called cros_ec_mkbp_proximity. + diff --git a/drivers/iio/proximity/makefile b/drivers/iio/proximity/makefile --- a/drivers/iio/proximity/makefile +++ b/drivers/iio/proximity/makefile +obj-$(config_cros_ec_mkbp_proximity) += cros_ec_mkbp_proximity.o diff --git a/drivers/iio/proximity/cros_ec_mkbp_proximity.c b/drivers/iio/proximity/cros_ec_mkbp_proximity.c --- /dev/null +++ b/drivers/iio/proximity/cros_ec_mkbp_proximity.c +// spdx-license-identifier: gpl-2.0 +/* + * driver for cros-ec proximity sensor exposed through mkbp switch + * + * copyright 2021 google llc. + */ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/mutex.h> +#include <linux/notifier.h> +#include <linux/of.h> +#include <linux/platform_device.h> +#include <linux/slab.h> +#include <linux/types.h> + +#include <linux/platform_data/cros_ec_commands.h> +#include <linux/platform_data/cros_ec_proto.h> + +#include <linux/iio/events.h> +#include <linux/iio/iio.h> +#include <linux/iio/sysfs.h> + +#include <asm/unaligned.h> + +struct cros_ec_mkbp_proximity_data { + struct cros_ec_device *ec; + struct iio_dev *indio_dev; + struct mutex lock; + struct notifier_block notifier; + int last_proximity; + bool enabled; +}; + +static const struct iio_event_spec cros_ec_mkbp_proximity_events[] = { + { + .type = iio_ev_type_thresh, + .dir = iio_ev_dir_either, + .mask_separate = bit(iio_ev_info_enable), + }, +}; + +static const struct iio_chan_spec cros_ec_mkbp_proximity_chan_spec[] = { + { + .type = iio_proximity, + .info_mask_separate = bit(iio_chan_info_raw), + .event_spec = cros_ec_mkbp_proximity_events, + .num_event_specs = array_size(cros_ec_mkbp_proximity_events), + }, +}; + +static int cros_ec_mkbp_proximity_parse_state(const void *data) +{ + u32 switches = get_unaligned_le32(data); + + return !!(switches & bit(ec_mkbp_front_proximity)); +} + +static int cros_ec_mkbp_proximity_query(struct cros_ec_device *ec_dev, + int *state) +{ + struct { + struct cros_ec_command msg; + union { + struct ec_params_mkbp_info params; + u32 switches; + }; + } __packed buf = { }; + struct ec_params_mkbp_info *params = &buf.params; + struct cros_ec_command *msg = &buf.msg; + u32 *switches = &buf.switches; + size_t insize = sizeof(*switches); + int ret; + + msg->command = ec_cmd_mkbp_info; + msg->version = 1; + msg->outsize = sizeof(*params); + msg->insize = insize; + + params->info_type = ec_mkbp_info_current; + params->event_type = ec_mkbp_event_switch; + + ret = cros_ec_cmd_xfer_status(ec_dev, msg); + if (ret < 0) + return ret; + + if (ret != insize) { + dev_warn(ec_dev->dev, "wrong result size: %d != %zu ", ret, + insize); + return -eproto; + } + + *state = cros_ec_mkbp_proximity_parse_state(switches); + return iio_val_int; +} + +static void cros_ec_mkbp_proximity_push_event(struct cros_ec_mkbp_proximity_data *data, int state) +{ + s64 timestamp; + u64 ev; + int dir; + struct iio_dev *indio_dev = data->indio_dev; + struct cros_ec_device *ec = data->ec; + + mutex_lock(&data->lock); + if (state != data->last_proximity) { + if (data->enabled) { + timestamp = ktime_to_ns(ec->last_event_time); + if (iio_device_get_clock(indio_dev) != clock_boottime) + timestamp = iio_get_time_ns(indio_dev); + + dir = state ? iio_ev_dir_falling : iio_ev_dir_rising; + ev = iio_unmod_event_code(iio_proximity, 0, + iio_ev_type_thresh, dir); + iio_push_event(indio_dev, ev, timestamp); + } + data->last_proximity = state; + } + mutex_unlock(&data->lock); +} + +static int cros_ec_mkbp_proximity_notify(struct notifier_block *nb, + unsigned long queued_during_suspend, + void *_ec) +{ + struct cros_ec_mkbp_proximity_data *data; + struct cros_ec_device *ec = _ec; + u8 event_type = ec->event_data.event_type & ec_mkbp_event_type_mask; + void *switches; + int state; + + if (event_type == ec_mkbp_event_switch) { + data = container_of(nb, struct cros_ec_mkbp_proximity_data, + notifier); + + switches = &ec->event_data.data.switches; + state = cros_ec_mkbp_proximity_parse_state(switches); + cros_ec_mkbp_proximity_push_event(data, state); + } + + return notify_ok; +} + +static int cros_ec_mkbp_proximity_read_raw(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, int *val, + int *val2, long mask) +{ + struct cros_ec_mkbp_proximity_data *data = iio_priv(indio_dev); + struct cros_ec_device *ec = data->ec; + + if (chan->type == iio_proximity && mask == iio_chan_info_raw) + return cros_ec_mkbp_proximity_query(ec, val); + + return -einval; +} + +static int cros_ec_mkbp_proximity_read_event_config(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir) +{ + struct cros_ec_mkbp_proximity_data *data = iio_priv(indio_dev); + + return data->enabled; +} + +static int cros_ec_mkbp_proximity_write_event_config(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, int state) +{ + struct cros_ec_mkbp_proximity_data *data = iio_priv(indio_dev); + + mutex_lock(&data->lock); + data->enabled = state; + mutex_unlock(&data->lock); + + return 0; +} + +static const struct iio_info cros_ec_mkbp_proximity_info = { + .read_raw = cros_ec_mkbp_proximity_read_raw, + .read_event_config = cros_ec_mkbp_proximity_read_event_config, + .write_event_config = cros_ec_mkbp_proximity_write_event_config, +}; + +static __maybe_unused int cros_ec_mkbp_proximity_resume(struct device *dev) +{ + struct cros_ec_mkbp_proximity_data *data = dev_get_drvdata(dev); + struct cros_ec_device *ec = data->ec; + int ret, state; + + ret = cros_ec_mkbp_proximity_query(ec, &state); + if (ret < 0) { + dev_warn(dev, "failed to fetch proximity state on resume: %d ", + ret); + } else { + cros_ec_mkbp_proximity_push_event(data, state); + } + + return 0; +} + +static simple_dev_pm_ops(cros_ec_mkbp_proximity_pm_ops, null, + cros_ec_mkbp_proximity_resume); + +static int cros_ec_mkbp_proximity_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct cros_ec_device *ec = dev_get_drvdata(dev->parent); + struct iio_dev *indio_dev; + struct cros_ec_mkbp_proximity_data *data; + int ret; + + indio_dev = devm_iio_device_alloc(dev, sizeof(*data)); + if (!indio_dev) + return -enomem; + + data = iio_priv(indio_dev); + data->ec = ec; + data->indio_dev = indio_dev; + data->last_proximity = -1; /* unknown to start */ + mutex_init(&data->lock); + platform_set_drvdata(pdev, data); + + indio_dev->name = dev->driver->name; + indio_dev->info = &cros_ec_mkbp_proximity_info; + indio_dev->modes = indio_direct_mode; + indio_dev->channels = cros_ec_mkbp_proximity_chan_spec; + indio_dev->num_channels = array_size(cros_ec_mkbp_proximity_chan_spec); + + ret = devm_iio_device_register(dev, indio_dev); + if (ret) + return ret; + + data->notifier.notifier_call = cros_ec_mkbp_proximity_notify; + blocking_notifier_chain_register(&ec->event_notifier, &data->notifier); + + return 0; +} + +static int cros_ec_mkbp_proximity_remove(struct platform_device *pdev) +{ + struct cros_ec_mkbp_proximity_data *data = platform_get_drvdata(pdev); + struct cros_ec_device *ec = data->ec; + + blocking_notifier_chain_unregister(&ec->event_notifier, + &data->notifier); + + return 0; +} + +static const struct of_device_id cros_ec_mkbp_proximity_of_match[] = { + { .compatible = "google,cros-ec-mkbp-proximity" }, + {} +}; +module_device_table(of, cros_ec_mkbp_proximity_of_match); + +static struct platform_driver cros_ec_mkbp_proximity_driver = { + .driver = { + .name = "cros-ec-mkbp-proximity", + .of_match_table = cros_ec_mkbp_proximity_of_match, + .pm = &cros_ec_mkbp_proximity_pm_ops, + }, + .probe = cros_ec_mkbp_proximity_probe, + .remove = cros_ec_mkbp_proximity_remove, +}; +module_platform_driver(cros_ec_mkbp_proximity_driver); + +module_license("gpl v2"); +module_description("chromeos ec mkbp proximity sensor driver");
Industrial I/O (iio)
7792225b7b671800d1c9b562ace8e167a3d0e2e7
stephen boyd enric balletbo i serra enric balletbo collabora com gwendal grignou gwendal chromium org
drivers
iio
proximity
iio: proximity: vcnl3020: add proximity rate
add the proximity rate optional option and handling of it for vishay vcnl3020.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add proximity rate
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['proximity', 'vcnl3020']
['c']
1
96
1
--- diff --git a/drivers/iio/proximity/vcnl3020.c b/drivers/iio/proximity/vcnl3020.c --- a/drivers/iio/proximity/vcnl3020.c +++ b/drivers/iio/proximity/vcnl3020.c +static const int vcnl3020_prox_sampling_frequency[][2] = { + {1, 950000}, + {3, 906250}, + {7, 812500}, + {16, 625000}, + {31, 250000}, + {62, 500000}, + {125, 0}, + {250, 0}, +}; + +static int vcnl3020_read_proxy_samp_freq(struct vcnl3020_data *data, int *val, + int *val2) +{ + int rc; + unsigned int prox_rate; + + rc = regmap_read(data->regmap, vcnl_proximity_rate, &prox_rate); + if (rc) + return rc; + + if (prox_rate >= array_size(vcnl3020_prox_sampling_frequency)) + return -einval; + + *val = vcnl3020_prox_sampling_frequency[prox_rate][0]; + *val2 = vcnl3020_prox_sampling_frequency[prox_rate][1]; + + return 0; +} + +static int vcnl3020_write_proxy_samp_freq(struct vcnl3020_data *data, int val, + int val2) +{ + unsigned int i; + int index = -1; + + for (i = 0; i < array_size(vcnl3020_prox_sampling_frequency); i++) { + if (val == vcnl3020_prox_sampling_frequency[i][0] && + val2 == vcnl3020_prox_sampling_frequency[i][1]) { + index = i; + break; + } + } + + if (index < 0) + return -einval; + + return regmap_write(data->regmap, vcnl_proximity_rate, index); +} + - .info_mask_separate = bit(iio_chan_info_raw), + .info_mask_separate = bit(iio_chan_info_raw) | + bit(iio_chan_info_samp_freq), + .info_mask_separate_available = bit(iio_chan_info_samp_freq), + case iio_chan_info_samp_freq: + rc = vcnl3020_read_proxy_samp_freq(data, val, val2); + if (rc < 0) + return rc; + return iio_val_int_plus_micro; + default: + return -einval; + } +} + +static int vcnl3020_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int val, int val2, long mask) +{ + int rc; + struct vcnl3020_data *data = iio_priv(indio_dev); + + switch (mask) { + case iio_chan_info_samp_freq: + rc = iio_device_claim_direct_mode(indio_dev); + if (rc) + return rc; + rc = vcnl3020_write_proxy_samp_freq(data, val, val2); + iio_device_release_direct_mode(indio_dev); + return rc; + default: + return -einval; + } +} + +static int vcnl3020_read_avail(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + const int **vals, int *type, int *length, + long mask) +{ + switch (mask) { + case iio_chan_info_samp_freq: + *vals = (int *)vcnl3020_prox_sampling_frequency; + *type = iio_val_int_plus_micro; + *length = 2 * array_size(vcnl3020_prox_sampling_frequency); + return iio_avail_list; + .write_raw = vcnl3020_write_raw, + .read_avail = vcnl3020_read_avail,
Industrial I/O (iio)
6a878e70e88b53c015cae1a3898c17db4b4cb199
ivan mikhaylov
drivers
iio
proximity
iio:cdc:ad7150: move driver out of staging.
this capacitance to digital converter (cdc) driver is compliant with the iio abi. note, not all features supported (e.g. window event modes) but the driver should be in a useful functional state.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
move driver out of staging
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['cdc:ad7150']
['kconfig', 'c', 'makefile']
7
26
12
--- diff --git a/drivers/iio/kconfig b/drivers/iio/kconfig --- a/drivers/iio/kconfig +++ b/drivers/iio/kconfig +source "drivers/iio/cdc/kconfig" diff --git a/drivers/iio/makefile b/drivers/iio/makefile --- a/drivers/iio/makefile +++ b/drivers/iio/makefile +obj-y += cdc/ diff --git a/drivers/iio/cdc/kconfig b/drivers/iio/cdc/kconfig --- /dev/null +++ b/drivers/iio/cdc/kconfig +# spdx-license-identifier: gpl-2.0 +# +# cdc drivers +# +menu "capacitance to digital converters" + +config ad7150 + tristate "analog devices ad7150/1/6 capacitive sensor driver" + depends on i2c + help + say yes here to build support for analog devices capacitive sensors. + (ad7150, ad7151, ad7156) provides direct access via sysfs. + + to compile this driver as a module, choose m here: the + module will be called ad7150. + +endmenu diff --git a/drivers/iio/cdc/makefile b/drivers/iio/cdc/makefile --- /dev/null +++ b/drivers/iio/cdc/makefile +# spdx-license-identifier: gpl-2.0 +# +# makefile for industrial i/o capacitance to digital converter (cdc) drivers +# + +obj-$(config_ad7150) += ad7150.o diff --git a/drivers/staging/iio/cdc/ad7150.c b/drivers/iio/cdc/ad7150.c diff --git a/drivers/staging/iio/cdc/kconfig b/drivers/staging/iio/cdc/kconfig --- a/drivers/staging/iio/cdc/kconfig +++ b/drivers/staging/iio/cdc/kconfig -config ad7150 - tristate "analog devices ad7150/1/6 capacitive sensor driver" - depends on i2c - help - say yes here to build support for analog devices capacitive sensors. - (ad7150, ad7151, ad7156) provides direct access via sysfs. - - to compile this driver as a module, choose m here: the - module will be called ad7150. - diff --git a/drivers/staging/iio/cdc/makefile b/drivers/staging/iio/cdc/makefile --- a/drivers/staging/iio/cdc/makefile +++ b/drivers/staging/iio/cdc/makefile -# makefile for industrial i/o dac drivers +# makefile for industrial i/o cdc drivers -obj-$(config_ad7150) += ad7150.o
Industrial I/O (iio)
646d67b5c582d69d3a73e89116a147abdbca28ed
jonathan cameron
drivers
iio
cdc, iio
iio:magnetometer: add support for st iis2mdc
add support for st magnetometer iis2mdc, an i2c/spi interface 3-axis magnetometer. the patch was tested on the instrument with iis2mdc via i2c interface.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add support for st iis2mdc
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
['magnetometer']
['h', 'c']
4
12
0
--- diff --git a/drivers/iio/magnetometer/st_magn.h b/drivers/iio/magnetometer/st_magn.h --- a/drivers/iio/magnetometer/st_magn.h +++ b/drivers/iio/magnetometer/st_magn.h +#define iis2mdc_magn_dev_name "iis2mdc" diff --git a/drivers/iio/magnetometer/st_magn_core.c b/drivers/iio/magnetometer/st_magn_core.c --- a/drivers/iio/magnetometer/st_magn_core.c +++ b/drivers/iio/magnetometer/st_magn_core.c + [2] = iis2mdc_magn_dev_name, diff --git a/drivers/iio/magnetometer/st_magn_i2c.c b/drivers/iio/magnetometer/st_magn_i2c.c --- a/drivers/iio/magnetometer/st_magn_i2c.c +++ b/drivers/iio/magnetometer/st_magn_i2c.c + { + .compatible = "st,iis2mdc", + .data = iis2mdc_magn_dev_name, + }, + { iis2mdc_magn_dev_name }, diff --git a/drivers/iio/magnetometer/st_magn_spi.c b/drivers/iio/magnetometer/st_magn_spi.c --- a/drivers/iio/magnetometer/st_magn_spi.c +++ b/drivers/iio/magnetometer/st_magn_spi.c + { + .compatible = "st,iis2mdc", + .data = iis2mdc_magn_dev_name, + }, + { iis2mdc_magn_dev_name },
Industrial I/O (iio)
c71cfe5576d1f6e2d53b5fb9b74438eadf097b05
li qingwu
drivers
iio
magnetometer
mfd: add mfd driver for atc260x pmics
add initial support for the actions semi atc260x pmics which integrates audio codec, power management, clock generation and gpio controller blocks.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add mfd driver for atc260x pmics
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['h', 'kconfig', 'c', 'makefile']
7
1,042
0
-----> atc260x-core.c (implements core functionalities) -----> atc260x-spi.c (implements spi interface - todo) --- diff --git a/drivers/mfd/kconfig b/drivers/mfd/kconfig --- a/drivers/mfd/kconfig +++ b/drivers/mfd/kconfig +config mfd_atc260x + tristate + select mfd_core + select regmap + select regmap_irq + +config mfd_atc260x_i2c + tristate "actions semi atc260x pmics with i2c" + select mfd_atc260x + select regmap_i2c + depends on i2c + help + support for the actions semi atc260x pmics controlled via i2c. + + this driver provides common support for accessing the atc2603c + and atc2609a chip variants, additional drivers must be enabled + in order to use the functionality of the device. + diff --git a/drivers/mfd/makefile b/drivers/mfd/makefile --- a/drivers/mfd/makefile +++ b/drivers/mfd/makefile + +obj-$(config_mfd_atc260x) += atc260x-core.o +obj-$(config_mfd_atc260x_i2c) += atc260x-i2c.o diff --git a/drivers/mfd/atc260x-core.c b/drivers/mfd/atc260x-core.c --- /dev/null +++ b/drivers/mfd/atc260x-core.c +// spdx-license-identifier: gpl-2.0+ +/* + * core support for atc260x pmics + * + * copyright (c) 2019 manivannan sadhasivam <manivannan.sadhasivam@linaro.org> + * copyright (c) 2020 cristian ciocaltea <cristian.ciocaltea@gmail.com> + */ + +#include <linux/interrupt.h> +#include <linux/mfd/atc260x/core.h> +#include <linux/mfd/core.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/of_device.h> +#include <linux/regmap.h> + +#define atc260x_chip_rev_max 31 + +struct atc260x_init_regs { + unsigned int cmu_devrst; + unsigned int cmu_devrst_ints; + unsigned int ints_msk; + unsigned int pad_en; + unsigned int pad_en_extirq; +}; + +static void regmap_lock_mutex(void *__mutex) +{ + struct mutex *mutex = __mutex; + + /* + * using regmap within an atomic context (e.g. accessing a pmic when + * powering system down) is normally allowed only if the regmap type + * is mmio and the regcache type is either regcache_none or + * regcache_flat. for slow buses like i2c and spi, the regmap is + * internally protected by a mutex which is acquired non-atomically. + * + * let's improve this by using a customized locking scheme inspired + * from i2c atomic transfer. see i2c_in_atomic_xfer_mode() for a + * starting point. + */ + if (system_state > system_running && irqs_disabled()) + mutex_trylock(mutex); + else + mutex_lock(mutex); +} + +static void regmap_unlock_mutex(void *__mutex) +{ + struct mutex *mutex = __mutex; + + mutex_unlock(mutex); +} + +static const struct regmap_config atc2603c_regmap_config = { + .reg_bits = 8, + .val_bits = 16, + .max_register = atc2603c_saddr, + .cache_type = regcache_none, +}; + +static const struct regmap_config atc2609a_regmap_config = { + .reg_bits = 8, + .val_bits = 16, + .max_register = atc2609a_saddr, + .cache_type = regcache_none, +}; + +static const struct regmap_irq atc2603c_regmap_irqs[] = { + regmap_irq_reg(atc2603c_irq_audio, 0, atc2603c_ints_msk_audio), + regmap_irq_reg(atc2603c_irq_ov, 0, atc2603c_ints_msk_ov), + regmap_irq_reg(atc2603c_irq_oc, 0, atc2603c_ints_msk_oc), + regmap_irq_reg(atc2603c_irq_ot, 0, atc2603c_ints_msk_ot), + regmap_irq_reg(atc2603c_irq_uv, 0, atc2603c_ints_msk_uv), + regmap_irq_reg(atc2603c_irq_alarm, 0, atc2603c_ints_msk_alarm), + regmap_irq_reg(atc2603c_irq_onoff, 0, atc2603c_ints_msk_onoff), + regmap_irq_reg(atc2603c_irq_sgpio, 0, atc2603c_ints_msk_sgpio), + regmap_irq_reg(atc2603c_irq_ir, 0, atc2603c_ints_msk_ir), + regmap_irq_reg(atc2603c_irq_remcon, 0, atc2603c_ints_msk_remcon), + regmap_irq_reg(atc2603c_irq_power_in, 0, atc2603c_ints_msk_powerin), +}; + +static const struct regmap_irq atc2609a_regmap_irqs[] = { + regmap_irq_reg(atc2609a_irq_audio, 0, atc2609a_ints_msk_audio), + regmap_irq_reg(atc2609a_irq_ov, 0, atc2609a_ints_msk_ov), + regmap_irq_reg(atc2609a_irq_oc, 0, atc2609a_ints_msk_oc), + regmap_irq_reg(atc2609a_irq_ot, 0, atc2609a_ints_msk_ot), + regmap_irq_reg(atc2609a_irq_uv, 0, atc2609a_ints_msk_uv), + regmap_irq_reg(atc2609a_irq_alarm, 0, atc2609a_ints_msk_alarm), + regmap_irq_reg(atc2609a_irq_onoff, 0, atc2609a_ints_msk_onoff), + regmap_irq_reg(atc2609a_irq_wkup, 0, atc2609a_ints_msk_wkup), + regmap_irq_reg(atc2609a_irq_ir, 0, atc2609a_ints_msk_ir), + regmap_irq_reg(atc2609a_irq_remcon, 0, atc2609a_ints_msk_remcon), + regmap_irq_reg(atc2609a_irq_power_in, 0, atc2609a_ints_msk_powerin), +}; + +static const struct regmap_irq_chip atc2603c_regmap_irq_chip = { + .name = "atc2603c", + .irqs = atc2603c_regmap_irqs, + .num_irqs = array_size(atc2603c_regmap_irqs), + .num_regs = 1, + .status_base = atc2603c_ints_pd, + .mask_base = atc2603c_ints_msk, + .mask_invert = true, +}; + +static const struct regmap_irq_chip atc2609a_regmap_irq_chip = { + .name = "atc2609a", + .irqs = atc2609a_regmap_irqs, + .num_irqs = array_size(atc2609a_regmap_irqs), + .num_regs = 1, + .status_base = atc2609a_ints_pd, + .mask_base = atc2609a_ints_msk, + .mask_invert = true, +}; + +static const struct resource atc2603c_onkey_resources[] = { + define_res_irq(atc2603c_irq_onoff), +}; + +static const struct resource atc2609a_onkey_resources[] = { + define_res_irq(atc2609a_irq_onoff), +}; + +static const struct mfd_cell atc2603c_mfd_cells[] = { + { .name = "atc260x-regulator" }, + { .name = "atc260x-pwrc" }, + { + .name = "atc260x-onkey", + .num_resources = array_size(atc2603c_onkey_resources), + .resources = atc2603c_onkey_resources, + }, +}; + +static const struct mfd_cell atc2609a_mfd_cells[] = { + { .name = "atc260x-regulator" }, + { .name = "atc260x-pwrc" }, + { + .name = "atc260x-onkey", + .num_resources = array_size(atc2609a_onkey_resources), + .resources = atc2609a_onkey_resources, + }, +}; + +static const struct atc260x_init_regs atc2603c_init_regs = { + .cmu_devrst = atc2603c_cmu_devrst, + .cmu_devrst_ints = atc2603c_cmu_devrst_ints, + .ints_msk = atc2603c_ints_msk, + .pad_en = atc2603c_pad_en, + .pad_en_extirq = atc2603c_pad_en_extirq, +}; + +static const struct atc260x_init_regs atc2609a_init_regs = { + .cmu_devrst = atc2609a_cmu_devrst, + .cmu_devrst_ints = atc2609a_cmu_devrst_ints, + .ints_msk = atc2609a_ints_msk, + .pad_en = atc2609a_pad_en, + .pad_en_extirq = atc2609a_pad_en_extirq, +}; + +static void atc260x_cmu_reset(struct atc260x *atc260x) +{ + const struct atc260x_init_regs *regs = atc260x->init_regs; + + /* assert reset */ + regmap_update_bits(atc260x->regmap, regs->cmu_devrst, + regs->cmu_devrst_ints, ~regs->cmu_devrst_ints); + + /* de-assert reset */ + regmap_update_bits(atc260x->regmap, regs->cmu_devrst, + regs->cmu_devrst_ints, regs->cmu_devrst_ints); +} + +static void atc260x_dev_init(struct atc260x *atc260x) +{ + const struct atc260x_init_regs *regs = atc260x->init_regs; + + /* initialize interrupt block */ + atc260x_cmu_reset(atc260x); + + /* disable all interrupt sources */ + regmap_write(atc260x->regmap, regs->ints_msk, 0); + + /* enable extirq pad */ + regmap_update_bits(atc260x->regmap, regs->pad_en, + regs->pad_en_extirq, regs->pad_en_extirq); +} + +/** + * atc260x_match_device(): setup atc260x variant related fields + * + * @atc260x: atc260x device to setup (.dev field must be set) + * @regmap_cfg: regmap config associated with this atc260x device + * + * this lets the atc260x core configure the mfd cells and register maps + * for later use. + */ +int atc260x_match_device(struct atc260x *atc260x, struct regmap_config *regmap_cfg) +{ + struct device *dev = atc260x->dev; + const void *of_data; + + of_data = of_device_get_match_data(dev); + if (!of_data) + return -enodev; + + atc260x->ic_type = (unsigned long)of_data; + + switch (atc260x->ic_type) { + case atc2603c: + *regmap_cfg = atc2603c_regmap_config; + atc260x->regmap_irq_chip = &atc2603c_regmap_irq_chip; + atc260x->cells = atc2603c_mfd_cells; + atc260x->nr_cells = array_size(atc2603c_mfd_cells); + atc260x->type_name = "atc2603c"; + atc260x->rev_reg = atc2603c_chip_ver; + atc260x->init_regs = &atc2603c_init_regs; + break; + case atc2609a: + *regmap_cfg = atc2609a_regmap_config; + atc260x->regmap_irq_chip = &atc2609a_regmap_irq_chip; + atc260x->cells = atc2609a_mfd_cells; + atc260x->nr_cells = array_size(atc2609a_mfd_cells); + atc260x->type_name = "atc2609a"; + atc260x->rev_reg = atc2609a_chip_ver; + atc260x->init_regs = &atc2609a_init_regs; + break; + default: + dev_err(dev, "unsupported atc260x device type: %u ", + atc260x->ic_type); + return -einval; + } + + atc260x->regmap_mutex = devm_kzalloc(dev, sizeof(*atc260x->regmap_mutex), + gfp_kernel); + if (!atc260x->regmap_mutex) + return -enomem; + + mutex_init(atc260x->regmap_mutex); + + regmap_cfg->lock = regmap_lock_mutex, + regmap_cfg->unlock = regmap_unlock_mutex, + regmap_cfg->lock_arg = atc260x->regmap_mutex; + + return 0; +} +export_symbol_gpl(atc260x_match_device); + +/** + * atc260x_device_probe(): probe a configured atc260x device + * + * @atc260x: atc260x device to probe (must be configured) + * + * this function lets the atc260x core register the atc260x mfd devices + * and irqchip. the atc260x device passed in must be fully configured + * with atc260x_match_device, its irq set, and regmap created. + */ +int atc260x_device_probe(struct atc260x *atc260x) +{ + struct device *dev = atc260x->dev; + unsigned int chip_rev; + int ret; + + if (!atc260x->irq) { + dev_err(dev, "no interrupt support "); + return -einval; + } + + /* initialize the hardware */ + atc260x_dev_init(atc260x); + + ret = regmap_read(atc260x->regmap, atc260x->rev_reg, &chip_rev); + if (ret) { + dev_err(dev, "failed to get chip revision "); + return ret; + } + + if (chip_rev > atc260x_chip_rev_max) { + dev_err(dev, "unknown chip revision: %u ", chip_rev); + return -einval; + } + + atc260x->ic_ver = __ffs(chip_rev + 1u); + + dev_info(dev, "detected chip type %s rev.%c ", + atc260x->type_name, 'a' + atc260x->ic_ver); + + ret = devm_regmap_add_irq_chip(dev, atc260x->regmap, atc260x->irq, irqf_oneshot, + -1, atc260x->regmap_irq_chip, &atc260x->irq_data); + if (ret) { + dev_err(dev, "failed to add irq chip: %d ", ret); + return ret; + } + + ret = devm_mfd_add_devices(dev, platform_devid_none, + atc260x->cells, atc260x->nr_cells, null, 0, + regmap_irq_get_domain(atc260x->irq_data)); + if (ret) { + dev_err(dev, "failed to add child devices: %d ", ret); + regmap_del_irq_chip(atc260x->irq, atc260x->irq_data); + } + + return ret; +} +export_symbol_gpl(atc260x_device_probe); + +module_description("atc260x pmics core support"); +module_author("manivannan sadhasivam <manivannan.sadhasivam@linaro.org>"); +module_author("cristian ciocaltea <cristian.ciocaltea@gmail.com>"); +module_license("gpl"); diff --git a/drivers/mfd/atc260x-i2c.c b/drivers/mfd/atc260x-i2c.c --- /dev/null +++ b/drivers/mfd/atc260x-i2c.c +// spdx-license-identifier: gpl-2.0+ +/* + * i2c bus interface for atc260x pmics + * + * copyright (c) 2019 manivannan sadhasivam <manivannan.sadhasivam@linaro.org> + * copyright (c) 2020 cristian ciocaltea <cristian.ciocaltea@gmail.com> + */ + +#include <linux/i2c.h> +#include <linux/mfd/atc260x/core.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/regmap.h> + +static int atc260x_i2c_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct atc260x *atc260x; + struct regmap_config regmap_cfg; + int ret; + + atc260x = devm_kzalloc(&client->dev, sizeof(*atc260x), gfp_kernel); + if (!atc260x) + return -enomem; + + atc260x->dev = &client->dev; + atc260x->irq = client->irq; + + ret = atc260x_match_device(atc260x, &regmap_cfg); + if (ret) + return ret; + + i2c_set_clientdata(client, atc260x); + + atc260x->regmap = devm_regmap_init_i2c(client, &regmap_cfg); + if (is_err(atc260x->regmap)) { + ret = ptr_err(atc260x->regmap); + dev_err(&client->dev, "failed to init regmap: %d ", ret); + return ret; + } + + return atc260x_device_probe(atc260x); +} + +const struct of_device_id atc260x_i2c_of_match[] = { + { .compatible = "actions,atc2603c", .data = (void *)atc2603c }, + { .compatible = "actions,atc2609a", .data = (void *)atc2609a }, + { } +}; +module_device_table(of, atc260x_i2c_of_match); + +static struct i2c_driver atc260x_i2c_driver = { + .driver = { + .name = "atc260x", + .of_match_table = of_match_ptr(atc260x_i2c_of_match), + }, + .probe = atc260x_i2c_probe, +}; +module_i2c_driver(atc260x_i2c_driver); + +module_description("atc260x pmics i2c bus interface"); +module_author("manivannan sadhasivam <manivannan.sadhasivam@linaro.org>"); +module_author("cristian ciocaltea <cristian.ciocaltea@gmail.com>"); +module_license("gpl"); diff --git a/include/linux/mfd/atc260x/atc2603c.h b/include/linux/mfd/atc260x/atc2603c.h --- /dev/null +++ b/include/linux/mfd/atc260x/atc2603c.h +/* spdx-license-identifier: gpl-2.0+ */ +/* + * atc2603c pmic register definitions + * + * copyright (c) 2020 cristian ciocaltea <cristian.ciocaltea@gmail.com> + */ + +#ifndef __linux_mfd_atc260x_atc2603c_h +#define __linux_mfd_atc260x_atc2603c_h + +enum atc2603c_irq_def { + atc2603c_irq_audio = 0, + atc2603c_irq_ov, + atc2603c_irq_oc, + atc2603c_irq_ot, + atc2603c_irq_uv, + atc2603c_irq_alarm, + atc2603c_irq_onoff, + atc2603c_irq_sgpio, + atc2603c_irq_ir, + atc2603c_irq_remcon, + atc2603c_irq_power_in, +}; + +/* pmu registers */ +#define atc2603c_pmu_sys_ctl0 0x00 +#define atc2603c_pmu_sys_ctl1 0x01 +#define atc2603c_pmu_sys_ctl2 0x02 +#define atc2603c_pmu_sys_ctl3 0x03 +#define atc2603c_pmu_sys_ctl4 0x04 +#define atc2603c_pmu_sys_ctl5 0x05 +#define atc2603c_pmu_sys_ctl6 0x06 +#define atc2603c_pmu_sys_ctl7 0x07 +#define atc2603c_pmu_sys_ctl8 0x08 +#define atc2603c_pmu_sys_ctl9 0x09 +#define atc2603c_pmu_bat_ctl0 0x0a +#define atc2603c_pmu_bat_ctl1 0x0b +#define atc2603c_pmu_vbus_ctl0 0x0c +#define atc2603c_pmu_vbus_ctl1 0x0d +#define atc2603c_pmu_wall_ctl0 0x0e +#define atc2603c_pmu_wall_ctl1 0x0f +#define atc2603c_pmu_sys_pending 0x10 +#define atc2603c_pmu_dc1_ctl0 0x11 +#define atc2603c_pmu_dc1_ctl1 0x12 // undocumented +#define atc2603c_pmu_dc1_ctl2 0x13 // undocumented +#define atc2603c_pmu_dc2_ctl0 0x14 +#define atc2603c_pmu_dc2_ctl1 0x15 // undocumented +#define atc2603c_pmu_dc2_ctl2 0x16 // undocumented +#define atc2603c_pmu_dc3_ctl0 0x17 +#define atc2603c_pmu_dc3_ctl1 0x18 // undocumented +#define atc2603c_pmu_dc3_ctl2 0x19 // undocumented +#define atc2603c_pmu_dc4_ctl0 0x1a // undocumented +#define atc2603c_pmu_dc4_ctl1 0x1b // undocumented +#define atc2603c_pmu_dc5_ctl0 0x1c // undocumented +#define atc2603c_pmu_dc5_ctl1 0x1d // undocumented +#define atc2603c_pmu_ldo1_ctl 0x1e +#define atc2603c_pmu_ldo2_ctl 0x1f +#define atc2603c_pmu_ldo3_ctl 0x20 +#define atc2603c_pmu_ldo4_ctl 0x21 // undocumented +#define atc2603c_pmu_ldo5_ctl 0x22 +#define atc2603c_pmu_ldo6_ctl 0x23 +#define atc2603c_pmu_ldo7_ctl 0x24 +#define atc2603c_pmu_ldo8_ctl 0x25 // undocumented +#define atc2603c_pmu_ldo9_ctl 0x26 // undocumented +#define atc2603c_pmu_ldo10_ctl 0x27 // undocumented +#define atc2603c_pmu_ldo11_ctl 0x28 +#define atc2603c_pmu_switch_ctl 0x29 +#define atc2603c_pmu_ov_ctl0 0x2a +#define atc2603c_pmu_ov_ctl1 0x2b +#define atc2603c_pmu_ov_status 0x2c +#define atc2603c_pmu_ov_en 0x2d +#define atc2603c_pmu_ov_int_en 0x2e +#define atc2603c_pmu_oc_ctl 0x2f +#define atc2603c_pmu_oc_status 0x30 +#define atc2603c_pmu_oc_en 0x31 +#define atc2603c_pmu_oc_int_en 0x32 +#define atc2603c_pmu_uv_ctl0 0x33 +#define atc2603c_pmu_uv_ctl1 0x34 +#define atc2603c_pmu_uv_status 0x35 +#define atc2603c_pmu_uv_en 0x36 +#define atc2603c_pmu_uv_int_en 0x37 +#define atc2603c_pmu_ot_ctl 0x38 +#define atc2603c_pmu_charger_ctl0 0x39 +#define atc2603c_pmu_charger_ctl1 0x3a +#define atc2603c_pmu_charger_ctl2 0x3b +#define atc2603c_pmu_bakcharger_ctl 0x3c // undocumented +#define atc2603c_pmu_apds_ctl 0x3d +#define atc2603c_pmu_auxadc_ctl0 0x3e +#define atc2603c_pmu_auxadc_ctl1 0x3f +#define atc2603c_pmu_batvadc 0x40 +#define atc2603c_pmu_batiadc 0x41 +#define atc2603c_pmu_wallvadc 0x42 +#define atc2603c_pmu_walliadc 0x43 +#define atc2603c_pmu_vbusvadc 0x44 +#define atc2603c_pmu_vbusiadc 0x45 +#define atc2603c_pmu_syspwradc 0x46 +#define atc2603c_pmu_remconadc 0x47 +#define atc2603c_pmu_svccadc 0x48 +#define atc2603c_pmu_chgiadc 0x49 +#define atc2603c_pmu_irefadc 0x4a +#define atc2603c_pmu_bakbatadc 0x4b +#define atc2603c_pmu_ictempadc 0x4c +#define atc2603c_pmu_auxadc0 0x4d +#define atc2603c_pmu_auxadc1 0x4e +#define atc2603c_pmu_auxadc2 0x4f +#define atc2603c_pmu_icmadc 0x50 +#define atc2603c_pmu_bdg_ctl 0x51 // undocumented +#define atc2603c_rtc_ctl 0x52 +#define atc2603c_rtc_msalm 0x53 +#define atc2603c_rtc_halm 0x54 +#define atc2603c_rtc_ymdalm 0x55 +#define atc2603c_rtc_ms 0x56 +#define atc2603c_rtc_h 0x57 +#define atc2603c_rtc_dc 0x58 +#define atc2603c_rtc_ymd 0x59 +#define atc2603c_efuse_dat 0x5a // undocumented +#define atc2603c_efusecrtl1 0x5b // undocumented +#define atc2603c_efusecrtl2 0x5c // undocumented +#define atc2603c_pmu_fw_use0 0x5d // undocumented +#define atc2603c_pmu_fw_use1 0x5e // undocumented +#define atc2603c_pmu_fw_use2 0x5f // undocumented +#define atc2603c_pmu_fw_use3 0x60 // undocumented +#define atc2603c_pmu_fw_use4 0x61 // undocumented +#define atc2603c_pmu_abnormal_status 0x62 +#define atc2603c_pmu_wall_apds_ctl 0x63 +#define atc2603c_pmu_remcon_ctl0 0x64 +#define atc2603c_pmu_remcon_ctl1 0x65 +#define atc2603c_pmu_mux_ctl0 0x66 +#define atc2603c_pmu_sgpio_ctl0 0x67 +#define atc2603c_pmu_sgpio_ctl1 0x68 +#define atc2603c_pmu_sgpio_ctl2 0x69 +#define atc2603c_pmu_sgpio_ctl3 0x6a +#define atc2603c_pmu_sgpio_ctl4 0x6b +#define atc2603c_pwmclk_ctl 0x6c +#define atc2603c_pwm0_ctl 0x6d +#define atc2603c_pwm1_ctl 0x6e +#define atc2603c_pmu_adc_dbg0 0x70 +#define atc2603c_pmu_adc_dbg1 0x71 +#define atc2603c_pmu_adc_dbg2 0x72 +#define atc2603c_pmu_adc_dbg3 0x73 +#define atc2603c_pmu_adc_dbg4 0x74 +#define atc2603c_irc_ctl 0x80 +#define atc2603c_irc_stat 0x81 +#define atc2603c_irc_cc 0x82 +#define atc2603c_irc_kdc 0x83 +#define atc2603c_irc_wk 0x84 +#define atc2603c_irc_rcc 0x85 +#define atc2603c_irc_filter 0x86 + +/* audio_out registers */ +#define atc2603c_audioinout_ctl 0xa0 +#define atc2603c_audio_debugoutctl 0xa1 +#define atc2603c_dac_digitalctl 0xa2 +#define atc2603c_dac_volumectl0 0xa3 +#define atc2603c_dac_analog0 0xa4 +#define atc2603c_dac_analog1 0xa5 +#define atc2603c_dac_analog2 0xa6 +#define atc2603c_dac_analog3 0xa7 + +/* audio_in registers */ +#define atc2603c_adc_digitalctl 0xa8 +#define atc2603c_adc_hpfctl 0xa9 +#define atc2603c_adc_ctl 0xaa +#define atc2603c_agc_ctl0 0xab +#define atc2603c_agc_ctl1 0xac // undocumented +#define atc2603c_agc_ctl2 0xad +#define atc2603c_adc_analog0 0xae +#define atc2603c_adc_analog1 0xaf + +/* pcm_if registers */ +#define atc2603c_pcm0_ctl 0xb0 // undocumented +#define atc2603c_pcm1_ctl 0xb1 // undocumented +#define atc2603c_pcm2_ctl 0xb2 // undocumented +#define atc2603c_pcmif_ctl 0xb3 // undocumented + +/* cmu_control registers */ +#define atc2603c_cmu_devrst 0xc1 // undocumented + +/* ints registers */ +#define atc2603c_ints_pd 0xc8 +#define atc2603c_ints_msk 0xc9 + +/* mfp registers */ +#define atc2603c_mfp_ctl 0xd0 +#define atc2603c_pad_vsel 0xd1 // undocumented +#define atc2603c_gpio_outen 0xd2 +#define atc2603c_gpio_inen 0xd3 +#define atc2603c_gpio_dat 0xd4 +#define atc2603c_pad_drv 0xd5 +#define atc2603c_pad_en 0xd6 +#define atc2603c_debug_sel 0xd7 // undocumented +#define atc2603c_debug_ie 0xd8 // undocumented +#define atc2603c_debug_oe 0xd9 // undocumented +#define atc2603c_bist_start 0x0a // undocumented +#define atc2603c_bist_result 0x0b // undocumented +#define atc2603c_chip_ver 0xdc + +/* twsi registers */ +#define atc2603c_saddr 0xff + +/* pmu_sys_ctl0 register mask bits */ +#define atc2603c_pmu_sys_ctl0_ir_wk_en bit(5) +#define atc2603c_pmu_sys_ctl0_reset_wk_en bit(6) +#define atc2603c_pmu_sys_ctl0_hdsw_wk_en bit(7) +#define atc2603c_pmu_sys_ctl0_alarm_wk_en bit(8) +#define atc2603c_pmu_sys_ctl0_rem_con_wk_en bit(9) +#define atc2603c_pmu_sys_ctl0_restart_en bit(10) +#define atc2603c_pmu_sys_ctl0_sgpioirq_wk_en bit(11) +#define atc2603c_pmu_sys_ctl0_onoff_short_wk_en bit(12) +#define atc2603c_pmu_sys_ctl0_onoff_long_wk_en bit(13) +#define atc2603c_pmu_sys_ctl0_wall_wk_en bit(14) +#define atc2603c_pmu_sys_ctl0_usb_wk_en bit(15) +#define atc2603c_pmu_sys_ctl0_wk_all (genmask(15, 5) & (~bit(10))) + +/* pmu_sys_ctl1 register mask bits */ +#define atc2603c_pmu_sys_ctl1_en_s1 bit(0) +#define atc2603c_pmu_sys_ctl1_lb_s4_en bit(2) +#define atc2603c_pmu_sys_ctl1_lb_s4 genmask(4, 3) +#define atc2603c_pmu_sys_ctl1_lb_s4_3_1v bit(4) +#define atc2603c_pmu_sys_ctl1_ir_wk_flag bit(5) +#define atc2603c_pmu_sys_ctl1_reset_wk_flag bit(6) +#define atc2603c_pmu_sys_ctl1_hdsw_wk_flag bit(7) +#define atc2603c_pmu_sys_ctl1_alarm_wk_flag bit(8) +#define atc2603c_pmu_sys_ctl1_rem_con_wk_flag bit(9) +#define atc2603c_pmu_sys_ctl1_onoff_press_reset_irq_pd bit(10) +#define atc2603c_pmu_sys_ctl1_sgpioirq_wk_flag bit(11) +#define atc2603c_pmu_sys_ctl1_onoff_short_wk_flag bit(12) +#define atc2603c_pmu_sys_ctl1_onoff_long_wk_flag bit(13) +#define atc2603c_pmu_sys_ctl1_wall_wk_flag bit(14) +#define atc2603c_pmu_sys_ctl1_usb_wk_flag bit(15) + +/* pmu_sys_ctl2 register mask bits */ +#define atc2603c_pmu_sys_ctl2_pmu_a_en bit(0) +#define atc2603c_pmu_sys_ctl2_onoff_press_int_en bit(1) +#define atc2603c_pmu_sys_ctl2_onoff_press_pd bit(2) +#define atc2603c_pmu_sys_ctl2_s2timer genmask(5, 3) +#define atc2603c_pmu_sys_ctl2_s2_timer_en bit(6) +#define atc2603c_pmu_sys_ctl2_onoff_reset_time_sel genmask(8, 7) +#define atc2603c_pmu_sys_ctl2_onoff_press_reset_en bit(9) +#define atc2603c_pmu_sys_ctl2_onoff_press_time genmask(11, 10) +#define atc2603c_pmu_sys_ctl2_onoff_int_en bit(12) +#define atc2603c_pmu_sys_ctl2_onoff_long_press bit(13) +#define atc2603c_pmu_sys_ctl2_onoff_short_press bit(14) +#define atc2603c_pmu_sys_ctl2_onoff_press bit(15) + +/* pmu_sys_ctl3 register mask bits */ +#define atc2603c_pmu_sys_ctl3_s2s3tos1_timer genmask(8, 7) +#define atc2603c_pmu_sys_ctl3_s2s3tos1_timer_en bit(9) +#define atc2603c_pmu_sys_ctl3_s3_timer genmask(12, 10) +#define atc2603c_pmu_sys_ctl3_s3_timer_en bit(13) +#define atc2603c_pmu_sys_ctl3_en_s3 bit(14) +#define atc2603c_pmu_sys_ctl3_en_s2 bit(15) + +/* pmu_sys_ctl5 register mask bits */ +#define atc2603c_pmu_sys_ctl5_wallwkdten bit(7) +#define atc2603c_pmu_sys_ctl5_vbuswkdten bit(8) +#define atc2603c_pmu_sys_ctl5_remcon_dect_en bit(9) +#define atc2603c_pmu_sys_ctl5_onoff_8s_sel bit(10) + +/* ints_msk register mask bits */ +#define atc2603c_ints_msk_audio bit(0) +#define atc2603c_ints_msk_ov bit(1) +#define atc2603c_ints_msk_oc bit(2) +#define atc2603c_ints_msk_ot bit(3) +#define atc2603c_ints_msk_uv bit(4) +#define atc2603c_ints_msk_alarm bit(5) +#define atc2603c_ints_msk_onoff bit(6) +#define atc2603c_ints_msk_sgpio bit(7) +#define atc2603c_ints_msk_ir bit(8) +#define atc2603c_ints_msk_remcon bit(9) +#define atc2603c_ints_msk_powerin bit(10) + +/* cmu_devrst register mask bits */ +#define atc2603c_cmu_devrst_mfp bit(1) +#define atc2603c_cmu_devrst_ints bit(2) +#define atc2603c_cmu_devrst_audio bit(4) + +/* pad_en register mask bits */ +#define atc2603c_pad_en_extirq bit(0) + +#endif /* __linux_mfd_atc260x_atc2603c_h */ diff --git a/include/linux/mfd/atc260x/atc2609a.h b/include/linux/mfd/atc260x/atc2609a.h --- /dev/null +++ b/include/linux/mfd/atc260x/atc2609a.h +/* spdx-license-identifier: gpl-2.0+ */ +/* + * atc2609a pmic register definitions + * + * copyright (c) 2019 manivannan sadhasivam <manivannan.sadhasivam@linaro.org> + */ + +#ifndef __linux_mfd_atc260x_atc2609a_h +#define __linux_mfd_atc260x_atc2609a_h + +enum atc2609a_irq_def { + atc2609a_irq_audio = 0, + atc2609a_irq_ov, + atc2609a_irq_oc, + atc2609a_irq_ot, + atc2609a_irq_uv, + atc2609a_irq_alarm, + atc2609a_irq_onoff, + atc2609a_irq_wkup, + atc2609a_irq_ir, + atc2609a_irq_remcon, + atc2609a_irq_power_in, +}; + +/* pmu registers */ +#define atc2609a_pmu_sys_ctl0 0x00 +#define atc2609a_pmu_sys_ctl1 0x01 +#define atc2609a_pmu_sys_ctl2 0x02 +#define atc2609a_pmu_sys_ctl3 0x03 +#define atc2609a_pmu_sys_ctl4 0x04 +#define atc2609a_pmu_sys_ctl5 0x05 +#define atc2609a_pmu_sys_ctl6 0x06 +#define atc2609a_pmu_sys_ctl7 0x07 +#define atc2609a_pmu_sys_ctl8 0x08 +#define atc2609a_pmu_sys_ctl9 0x09 +#define atc2609a_pmu_bat_ctl0 0x0a +#define atc2609a_pmu_bat_ctl1 0x0b +#define atc2609a_pmu_vbus_ctl0 0x0c +#define atc2609a_pmu_vbus_ctl1 0x0d +#define atc2609a_pmu_wall_ctl0 0x0e +#define atc2609a_pmu_wall_ctl1 0x0f +#define atc2609a_pmu_sys_pending 0x10 +#define atc2609a_pmu_apds_ctl0 0x11 +#define atc2609a_pmu_apds_ctl1 0x12 +#define atc2609a_pmu_apds_ctl2 0x13 +#define atc2609a_pmu_charger_ctl 0x14 +#define atc2609a_pmu_bakcharger_ctl 0x15 +#define atc2609a_pmu_swchg_ctl0 0x16 +#define atc2609a_pmu_swchg_ctl1 0x17 +#define atc2609a_pmu_swchg_ctl2 0x18 +#define atc2609a_pmu_swchg_ctl3 0x19 +#define atc2609a_pmu_swchg_ctl4 0x1a +#define atc2609a_pmu_dc_osc 0x1b +#define atc2609a_pmu_dc0_ctl0 0x1c +#define atc2609a_pmu_dc0_ctl1 0x1d +#define atc2609a_pmu_dc0_ctl2 0x1e +#define atc2609a_pmu_dc0_ctl3 0x1f +#define atc2609a_pmu_dc0_ctl4 0x20 +#define atc2609a_pmu_dc0_ctl5 0x21 +#define atc2609a_pmu_dc0_ctl6 0x22 +#define atc2609a_pmu_dc1_ctl0 0x23 +#define atc2609a_pmu_dc1_ctl1 0x24 +#define atc2609a_pmu_dc1_ctl2 0x25 +#define atc2609a_pmu_dc1_ctl3 0x26 +#define atc2609a_pmu_dc1_ctl4 0x27 +#define atc2609a_pmu_dc1_ctl5 0x28 +#define atc2609a_pmu_dc1_ctl6 0x29 +#define atc2609a_pmu_dc2_ctl0 0x2a +#define atc2609a_pmu_dc2_ctl1 0x2b +#define atc2609a_pmu_dc2_ctl2 0x2c +#define atc2609a_pmu_dc2_ctl3 0x2d +#define atc2609a_pmu_dc2_ctl4 0x2e +#define atc2609a_pmu_dc2_ctl5 0x2f +#define atc2609a_pmu_dc2_ctl6 0x30 +#define atc2609a_pmu_dc3_ctl0 0x31 +#define atc2609a_pmu_dc3_ctl1 0x32 +#define atc2609a_pmu_dc3_ctl2 0x33 +#define atc2609a_pmu_dc3_ctl3 0x34 +#define atc2609a_pmu_dc3_ctl4 0x35 +#define atc2609a_pmu_dc3_ctl5 0x36 +#define atc2609a_pmu_dc3_ctl6 0x37 +#define atc2609a_pmu_dc_zr 0x38 +#define atc2609a_pmu_ldo0_ctl0 0x39 +#define atc2609a_pmu_ldo0_ctl1 0x3a +#define atc2609a_pmu_ldo1_ctl0 0x3b +#define atc2609a_pmu_ldo1_ctl1 0x3c +#define atc2609a_pmu_ldo2_ctl0 0x3d +#define atc2609a_pmu_ldo2_ctl1 0x3e +#define atc2609a_pmu_ldo3_ctl0 0x3f +#define atc2609a_pmu_ldo3_ctl1 0x40 +#define atc2609a_pmu_ldo4_ctl0 0x41 +#define atc2609a_pmu_ldo4_ctl1 0x42 +#define atc2609a_pmu_ldo5_ctl0 0x43 +#define atc2609a_pmu_ldo5_ctl1 0x44 +#define atc2609a_pmu_ldo6_ctl0 0x45 +#define atc2609a_pmu_ldo6_ctl1 0x46 +#define atc2609a_pmu_ldo7_ctl0 0x47 +#define atc2609a_pmu_ldo7_ctl1 0x48 +#define atc2609a_pmu_ldo8_ctl0 0x49 +#define atc2609a_pmu_ldo8_ctl1 0x4a +#define atc2609a_pmu_ldo9_ctl 0x4b +#define atc2609a_pmu_ov_int_en 0x4c +#define atc2609a_pmu_ov_status 0x4d +#define atc2609a_pmu_uv_int_en 0x4e +#define atc2609a_pmu_uv_status 0x4f +#define atc2609a_pmu_oc_int_en 0x50 +#define atc2609a_pmu_oc_status 0x51 +#define atc2609a_pmu_ot_ctl 0x52 +#define atc2609a_pmu_cm_ctl0 0x53 +#define atc2609a_pmu_fw_use0 0x54 +#define atc2609a_pmu_fw_use1 0x55 +#define atc2609a_pmu_adc12b_i 0x56 +#define atc2609a_pmu_adc12b_v 0x57 +#define atc2609a_pmu_adc12b_dummy 0x58 +#define atc2609a_pmu_auxadc_ctl0 0x59 +#define atc2609a_pmu_auxadc_ctl1 0x5a +#define atc2609a_pmu_batvadc 0x5b +#define atc2609a_pmu_batiadc 0x5c +#define atc2609a_pmu_wallvadc 0x5d +#define atc2609a_pmu_walliadc 0x5e +#define atc2609a_pmu_vbusvadc 0x5f +#define atc2609a_pmu_vbusiadc 0x60 +#define atc2609a_pmu_syspwradc 0x61 +#define atc2609a_pmu_remconadc 0x62 +#define atc2609a_pmu_svccadc 0x63 +#define atc2609a_pmu_chgiadc 0x64 +#define atc2609a_pmu_irefadc 0x65 +#define atc2609a_pmu_bakbatadc 0x66 +#define atc2609a_pmu_ictempadc 0x67 +#define atc2609a_pmu_auxadc0 0x68 +#define atc2609a_pmu_auxadc1 0x69 +#define atc2609a_pmu_auxadc2 0x6a +#define atc2609a_pmu_auxadc3 0x6b +#define atc2609a_pmu_ictempadc_adj 0x6c +#define atc2609a_pmu_bdg_ctl 0x6d +#define atc2609a_rtc_ctl 0x6e +#define atc2609a_rtc_msalm 0x6f +#define atc2609a_rtc_halm 0x70 +#define atc2609a_rtc_ymdalm 0x71 +#define atc2609a_rtc_ms 0x72 +#define atc2609a_rtc_h 0x73 +#define atc2609a_rtc_dc 0x74 +#define atc2609a_rtc_ymd 0x75 +#define atc2609a_efuse_dat 0x76 +#define atc2609a_efusecrtl1 0x77 +#define atc2609a_efusecrtl2 0x78 +#define atc2609a_pmu_dc4_ctl0 0x79 +#define atc2609a_pmu_dc4_ctl1 0x7a +#define atc2609a_pmu_dc4_ctl2 0x7b +#define atc2609a_pmu_dc4_ctl3 0x7c +#define atc2609a_pmu_dc4_ctl4 0x7d +#define atc2609a_pmu_dc4_ctl5 0x7e +#define atc2609a_pmu_dc4_ctl6 0x7f +#define atc2609a_pmu_pwr_status 0x80 +#define atc2609a_pmu_s2_pwr 0x81 +#define atc2609a_clmt_ctl0 0x82 +#define atc2609a_clmt_data0 0x83 +#define atc2609a_clmt_data1 0x84 +#define atc2609a_clmt_data2 0x85 +#define atc2609a_clmt_data3 0x86 +#define atc2609a_clmt_add0 0x87 +#define atc2609a_clmt_add1 0x88 +#define atc2609a_clmt_ocv_table 0x89 +#define atc2609a_clmt_r_table 0x8a +#define atc2609a_pmu_pwron_ctl0 0x8d +#define atc2609a_pmu_pwron_ctl1 0x8e +#define atc2609a_pmu_pwron_ctl2 0x8f +#define atc2609a_irc_ctl 0x90 +#define atc2609a_irc_stat 0x91 +#define atc2609a_irc_cc 0x92 +#define atc2609a_irc_kdc 0x93 +#define atc2609a_irc_wk 0x94 +#define atc2609a_irc_rcc 0x95 + +/* audio_out registers */ +#define atc2609a_audioinout_ctl 0xa0 +#define atc2609a_audio_debugoutctl 0xa1 +#define atc2609a_dac_digitalctl 0xa2 +#define atc2609a_dac_volumectl0 0xa3 +#define atc2609a_dac_analog0 0xa4 +#define atc2609a_dac_analog1 0xa5 +#define atc2609a_dac_analog2 0xa6 +#define atc2609a_dac_analog3 0xa7 + +/* audio_in registers */ +#define atc2609a_adc_digitalctl 0xa8 +#define atc2609a_adc_hpfctl 0xa9 +#define atc2609a_adc_ctl 0xaa +#define atc2609a_agc_ctl0 0xab +#define atc2609a_agc_ctl1 0xac +#define atc2609a_agc_ctl2 0xad +#define atc2609a_adc_analog0 0xae +#define atc2609a_adc_analog1 0xaf + +/* pcm_if registers */ +#define atc2609a_pcm0_ctl 0xb0 +#define atc2609a_pcm1_ctl 0xb1 +#define atc2609a_pcm2_ctl 0xb2 +#define atc2609a_pcmif_ctl 0xb3 + +/* cmu_control registers */ +#define atc2609a_cmu_devrst 0xc1 + +/* ints registers */ +#define atc2609a_ints_pd 0xc8 +#define atc2609a_ints_msk 0xc9 + +/* mfp registers */ +#define atc2609a_mfp_ctl 0xd0 +#define atc2609a_pad_vsel 0xd1 +#define atc2609a_gpio_outen 0xd2 +#define atc2609a_gpio_inen 0xd3 +#define atc2609a_gpio_dat 0xd4 +#define atc2609a_pad_drv 0xd5 +#define atc2609a_pad_en 0xd6 +#define atc2609a_debug_sel 0xd7 +#define atc2609a_debug_ie 0xd8 +#define atc2609a_debug_oe 0xd9 +#define atc2609a_chip_ver 0xdc + +/* pwsi registers */ +#define atc2609a_pwsi_ctl 0xf0 +#define atc2609a_pwsi_status 0xf1 + +/* twsi registers */ +#define atc2609a_saddr 0xff + +/* pmu_sys_ctl0 register mask bits */ +#define atc2609a_pmu_sys_ctl0_ir_wk_en bit(5) +#define atc2609a_pmu_sys_ctl0_reset_wk_en bit(6) +#define atc2609a_pmu_sys_ctl0_hdsw_wk_en bit(7) +#define atc2609a_pmu_sys_ctl0_alarm_wk_en bit(8) +#define atc2609a_pmu_sys_ctl0_rem_con_wk_en bit(9) +#define atc2609a_pmu_sys_ctl0_restart_en bit(10) +#define atc2609a_pmu_sys_ctl0_wkirq_wk_en bit(11) +#define atc2609a_pmu_sys_ctl0_onoff_short_wk_en bit(12) +#define atc2609a_pmu_sys_ctl0_onoff_long_wk_en bit(13) +#define atc2609a_pmu_sys_ctl0_wall_wk_en bit(14) +#define atc2609a_pmu_sys_ctl0_usb_wk_en bit(15) +#define atc2609a_pmu_sys_ctl0_wk_all (genmask(15, 5) & (~bit(10))) + +/* pmu_sys_ctl1 register mask bits */ +#define atc2609a_pmu_sys_ctl1_en_s1 bit(0) +#define atc2609a_pmu_sys_ctl1_lb_s4_en bit(2) +#define atc2609a_pmu_sys_ctl1_lb_s4 genmask(4, 3) +#define atc2609a_pmu_sys_ctl1_lb_s4_3_1v bit(4) +#define atc2609a_pmu_sys_ctl1_ir_wk_flag bit(5) +#define atc2609a_pmu_sys_ctl1_reset_wk_flag bit(6) +#define atc2609a_pmu_sys_ctl1_hdsw_wk_flag bit(7) +#define atc2609a_pmu_sys_ctl1_alarm_wk_flag bit(8) +#define atc2609a_pmu_sys_ctl1_rem_con_wk_flag bit(9) +#define atc2609a_pmu_sys_ctl1_restart_wk_flag bit(10) +#define atc2609a_pmu_sys_ctl1_wkirq_wk_flag bit(11) +#define atc2609a_pmu_sys_ctl1_onoff_short_wk_flag bit(12) +#define atc2609a_pmu_sys_ctl1_onoff_long_wk_flag bit(13) +#define atc2609a_pmu_sys_ctl1_wall_wk_flag bit(14) +#define atc2609a_pmu_sys_ctl1_usb_wk_flag bit(15) + +/* pmu_sys_ctl2 register mask bits */ +#define atc2609a_pmu_sys_ctl2_pmu_a_en bit(0) +#define atc2609a_pmu_sys_ctl2_onoff_press_int_en bit(1) +#define atc2609a_pmu_sys_ctl2_onoff_press_pd bit(2) +#define atc2609a_pmu_sys_ctl2_s2timer genmask(5, 3) +#define atc2609a_pmu_sys_ctl2_s2_timer_en bit(6) +#define atc2609a_pmu_sys_ctl2_onoff_reset_time_sel genmask(8, 7) +#define atc2609a_pmu_sys_ctl2_onoff_reset_en bit(9) +#define atc2609a_pmu_sys_ctl2_onoff_press_time genmask(11, 10) +#define atc2609a_pmu_sys_ctl2_onoff_lsp_int_en bit(12) +#define atc2609a_pmu_sys_ctl2_onoff_long_press bit(13) +#define atc2609a_pmu_sys_ctl2_onoff_short_press bit(14) +#define atc2609a_pmu_sys_ctl2_onoff_press bit(15) + +/* pmu_sys_ctl3 register mask bits */ +#define atc2609a_pmu_sys_ctl3_s2s3tos1_timer genmask(8, 7) +#define atc2609a_pmu_sys_ctl3_s2s3tos1_timer_en bit(9) +#define atc2609a_pmu_sys_ctl3_s3_timer genmask(12, 10) +#define atc2609a_pmu_sys_ctl3_s3_timer_en bit(13) +#define atc2609a_pmu_sys_ctl3_en_s3 bit(14) +#define atc2609a_pmu_sys_ctl3_en_s2 bit(15) + +/* pmu_sys_ctl5 register mask bits */ +#define atc2609a_pmu_sys_ctl5_wallwkdten bit(7) +#define atc2609a_pmu_sys_ctl5_vbuswkdten bit(8) +#define atc2609a_pmu_sys_ctl5_remcon_dect_en bit(9) +#define atc2609a_pmu_sys_ctl5_onoff_8s_sel bit(10) + +/* ints_msk register mask bits */ +#define atc2609a_ints_msk_audio bit(0) +#define atc2609a_ints_msk_ov bit(1) +#define atc2609a_ints_msk_oc bit(2) +#define atc2609a_ints_msk_ot bit(3) +#define atc2609a_ints_msk_uv bit(4) +#define atc2609a_ints_msk_alarm bit(5) +#define atc2609a_ints_msk_onoff bit(6) +#define atc2609a_ints_msk_wkup bit(7) +#define atc2609a_ints_msk_ir bit(8) +#define atc2609a_ints_msk_remcon bit(9) +#define atc2609a_ints_msk_powerin bit(10) + +/* cmu_devrst register mask bits */ +#define atc2609a_cmu_devrst_audio bit(0) +#define atc2609a_cmu_devrst_mfp bit(1) +#define atc2609a_cmu_devrst_ints bit(2) + +/* pad_en register mask bits */ +#define atc2609a_pad_en_extirq bit(0) + +#endif /* __linux_mfd_atc260x_atc2609a_h */ diff --git a/include/linux/mfd/atc260x/core.h b/include/linux/mfd/atc260x/core.h --- /dev/null +++ b/include/linux/mfd/atc260x/core.h +/* spdx-license-identifier: gpl-2.0+ */ +/* + * core mfd defines for atc260x pmics + * + * copyright (c) 2019 manivannan sadhasivam <manivannan.sadhasivam@linaro.org> + * copyright (c) 2020 cristian ciocaltea <cristian.ciocaltea@gmail.com> + */ + +#ifndef __linux_mfd_atc260x_core_h +#define __linux_mfd_atc260x_core_h + +#include <linux/mfd/atc260x/atc2603c.h> +#include <linux/mfd/atc260x/atc2609a.h> + +enum atc260x_type { + atc2603a = 0, + atc2603c, + atc2609a, +}; + +enum atc260x_ver { + atc260x_a = 0, + atc260x_b, + atc260x_c, + atc260x_d, + atc260x_e, + atc260x_f, + atc260x_g, + atc260x_h, +}; + +struct atc260x { + struct device *dev; + + struct regmap *regmap; + const struct regmap_irq_chip *regmap_irq_chip; + struct regmap_irq_chip_data *irq_data; + + struct mutex *regmap_mutex; /* mutex for custom regmap locking */ + + const struct mfd_cell *cells; + int nr_cells; + int irq; + + enum atc260x_type ic_type; + enum atc260x_ver ic_ver; + const char *type_name; + unsigned int rev_reg; + + const struct atc260x_init_regs *init_regs; /* regs for device init */ +}; + +struct regmap_config; + +int atc260x_match_device(struct atc260x *atc260x, struct regmap_config *regmap_cfg); +int atc260x_device_probe(struct atc260x *atc260x); + +#endif /* __linux_mfd_atc260x_core_h */
Multi Function Devices (MFD)
f7cb7fe34db9f32e8b1c13ecc823112480b875f8
cristian ciocaltea
include
linux
atc260x, mfd
mfd: add rohm bd71815 id
add chip id for rohm bd71815 and pmic so that drivers can identify this ic.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add rohm bd71815 id
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['h']
1
1
0
--- diff --git a/include/linux/mfd/rohm-generic.h b/include/linux/mfd/rohm-generic.h --- a/include/linux/mfd/rohm-generic.h +++ b/include/linux/mfd/rohm-generic.h + rohm_chip_type_bd71815,
Multi Function Devices (MFD)
488b205e57181a56f3503cb97240d32798d3d3bd
matti vaittinen
include
linux
mfd
mfd: add base driver for netronix embedded controller
the netronix embedded controller is a microcontroller found in some e-book readers designed by the original design manufacturer netronix, inc. it contains rtc, battery monitoring, system power management, and pwm functionality.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
add base driver for netronix embedded controller
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['h', 'kconfig', 'c', 'makefile']
4
270
0
--- diff --git a/drivers/mfd/kconfig b/drivers/mfd/kconfig --- a/drivers/mfd/kconfig +++ b/drivers/mfd/kconfig +config mfd_ntxec + tristate "netronix embedded controller (ec)" + depends on of || compile_test + depends on i2c + select regmap_i2c + select mfd_core + help + say yes here if you want to support the embedded controller found in + certain e-book readers designed by the original design manufacturer + netronix. + diff --git a/drivers/mfd/makefile b/drivers/mfd/makefile --- a/drivers/mfd/makefile +++ b/drivers/mfd/makefile +obj-$(config_mfd_ntxec) += ntxec.o diff --git a/drivers/mfd/ntxec.c b/drivers/mfd/ntxec.c --- /dev/null +++ b/drivers/mfd/ntxec.c +// spdx-license-identifier: gpl-2.0-or-later +/* + * the netronix embedded controller is a microcontroller found in some + * e-book readers designed by the original design manufacturer netronix, inc. + * it contains rtc, battery monitoring, system power management, and pwm + * functionality. + * + * this driver implements register access, version detection, and system + * power-off/reset. + * + * copyright 2020 jonathan neuschafer <j.neuschaefer@gmx.net> + */ + +#include <linux/delay.h> +#include <linux/errno.h> +#include <linux/i2c.h> +#include <linux/mfd/core.h> +#include <linux/mfd/ntxec.h> +#include <linux/module.h> +#include <linux/pm.h> +#include <linux/reboot.h> +#include <linux/regmap.h> +#include <linux/types.h> +#include <asm/unaligned.h> + +#define ntxec_reg_version 0x00 +#define ntxec_reg_poweroff 0x50 +#define ntxec_reg_powerkeep 0x70 +#define ntxec_reg_reset 0x90 + +#define ntxec_poweroff_value 0x0100 +#define ntxec_powerkeep_value 0x0800 +#define ntxec_reset_value 0xff00 + +static struct i2c_client *poweroff_restart_client; + +static void ntxec_poweroff(void) +{ + int res; + u8 buf[3] = { ntxec_reg_poweroff }; + struct i2c_msg msgs[] = { + { + .addr = poweroff_restart_client->addr, + .flags = 0, + .len = sizeof(buf), + .buf = buf, + }, + }; + + put_unaligned_be16(ntxec_poweroff_value, buf + 1); + + res = i2c_transfer(poweroff_restart_client->adapter, msgs, array_size(msgs)); + if (res < 0) + dev_warn(&poweroff_restart_client->dev, + "failed to power off (err = %d) ", res); + + /* + * the time from the register write until the host cpu is powered off + * has been observed to be about 2.5 to 3 seconds. sleep long enough to + * safely avoid returning from the poweroff handler. + */ + msleep(5000); +} + +static int ntxec_restart(struct notifier_block *nb, + unsigned long action, void *data) +{ + int res; + u8 buf[3] = { ntxec_reg_reset }; + /* + * note: the lower half of the reset value is not sent, because sending + * it causes an i2c error. (the reset handler in the downstream driver + * does send the full two-byte value, but doesn't check the result). + */ + struct i2c_msg msgs[] = { + { + .addr = poweroff_restart_client->addr, + .flags = 0, + .len = sizeof(buf) - 1, + .buf = buf, + }, + }; + + put_unaligned_be16(ntxec_reset_value, buf + 1); + + res = i2c_transfer(poweroff_restart_client->adapter, msgs, array_size(msgs)); + if (res < 0) + dev_warn(&poweroff_restart_client->dev, + "failed to restart (err = %d) ", res); + + return notify_done; +} + +static struct notifier_block ntxec_restart_handler = { + .notifier_call = ntxec_restart, + .priority = 128, +}; + +static const struct regmap_config regmap_config = { + .name = "ntxec", + .reg_bits = 8, + .val_bits = 16, + .cache_type = regcache_none, + .val_format_endian = regmap_endian_big, +}; + +static const struct mfd_cell ntxec_subdevices[] = { + { .name = "ntxec-rtc" }, + { .name = "ntxec-pwm" }, +}; + +static int ntxec_probe(struct i2c_client *client) +{ + struct ntxec *ec; + unsigned int version; + int res; + + ec = devm_kmalloc(&client->dev, sizeof(*ec), gfp_kernel); + if (!ec) + return -enomem; + + ec->dev = &client->dev; + + ec->regmap = devm_regmap_init_i2c(client, &regmap_config); + if (is_err(ec->regmap)) { + dev_err(ec->dev, "failed to set up regmap for device "); + return ptr_err(ec->regmap); + } + + /* determine the firmware version */ + res = regmap_read(ec->regmap, ntxec_reg_version, &version); + if (res < 0) { + dev_err(ec->dev, "failed to read firmware version number "); + return res; + } + + /* bail out if we encounter an unknown firmware version */ + switch (version) { + case ntxec_version_kobo_aura: + break; + default: + dev_err(ec->dev, + "netronix embedded controller version %04x is not supported. ", + version); + return -enodev; + } + + dev_info(ec->dev, + "netronix embedded controller version %04x detected. ", version); + + if (of_device_is_system_power_controller(ec->dev->of_node)) { + /* + * set the 'powerkeep' bit. this is necessary on some boards + * in order to keep the system running. + */ + res = regmap_write(ec->regmap, ntxec_reg_powerkeep, + ntxec_powerkeep_value); + if (res < 0) + return res; + + if (poweroff_restart_client) + /* + * another instance of the driver already took + * poweroff/restart duties. + */ + dev_err(ec->dev, "poweroff_restart_client already assigned "); + else + poweroff_restart_client = client; + + if (pm_power_off) + /* another driver already registered a poweroff handler. */ + dev_err(ec->dev, "pm_power_off already assigned "); + else + pm_power_off = ntxec_poweroff; + + res = register_restart_handler(&ntxec_restart_handler); + if (res) + dev_err(ec->dev, + "failed to register restart handler: %d ", res); + } + + i2c_set_clientdata(client, ec); + + res = devm_mfd_add_devices(ec->dev, platform_devid_none, ntxec_subdevices, + array_size(ntxec_subdevices), null, 0, null); + if (res) + dev_err(ec->dev, "failed to add subdevices: %d ", res); + + return res; +} + +static int ntxec_remove(struct i2c_client *client) +{ + if (client == poweroff_restart_client) { + poweroff_restart_client = null; + pm_power_off = null; + unregister_restart_handler(&ntxec_restart_handler); + } + + return 0; +} + +static const struct of_device_id of_ntxec_match_table[] = { + { .compatible = "netronix,ntxec", }, + {} +}; +module_device_table(of, of_ntxec_match_table); + +static struct i2c_driver ntxec_driver = { + .driver = { + .name = "ntxec", + .of_match_table = of_ntxec_match_table, + }, + .probe_new = ntxec_probe, + .remove = ntxec_remove, +}; +module_i2c_driver(ntxec_driver); + +module_author("jonathan neuschafer <j.neuschaefer@gmx.net>"); +module_description("core driver for netronix ec"); +module_license("gpl"); diff --git a/include/linux/mfd/ntxec.h b/include/linux/mfd/ntxec.h --- /dev/null +++ b/include/linux/mfd/ntxec.h +/* spdx-license-identifier: gpl-2.0-only */ +/* + * copyright 2020 jonathan neuschafer + * + * register access and version information for the netronix embedded + * controller. + */ + +#ifndef ntxec_h +#define ntxec_h + +#include <linux/types.h> + +struct device; +struct regmap; + +struct ntxec { + struct device *dev; + struct regmap *regmap; +}; + +/* + * some registers, such as the battery status register (0x41), are in + * big-endian, but others only have eight significant bits, which are in the + * first byte transmitted over i2c (the msb of the big-endian value). + * this convenience function converts an 8-bit value to 16-bit for use in the + * second kind of register. + */ +static inline __be16 ntxec_reg8(u8 value) +{ + return value << 8; +} + +/* known firmware versions */ +#define ntxec_version_kobo_aura 0xd726 /* found in kobo aura */ + +#endif
Multi Function Devices (MFD)
eceae583930666a69ab805eee8e81f9699bf6930
jonathan neusch fer
include
linux
mfd
mfd: remove support for ab3100
the st-ericsson u300 platform has been removed, so this driver is no longer needed.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
remove support for ab3100
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['h', 'kconfig', 'c', 'makefile']
5
1
1,324
--- diff --git a/drivers/mfd/kconfig b/drivers/mfd/kconfig --- a/drivers/mfd/kconfig +++ b/drivers/mfd/kconfig - default y if arch_u300 || arch_u8500 || compile_test + default y if arch_u8500 || compile_test -config ab3100_core - bool "st-ericsson ab3100 mixed signal circuit core functions" - depends on i2c=y && abx500_core - select mfd_core - default y if arch_u300 - help - select this to enable the ab3100 mixed signal ic core - functionality. this connects to a ab3100 on the i2c bus - and expose a number of symbols needed for dependent devices - to read and write registers and subscribe to events from - this multi-functional ic. this is needed to use other features - of the ab3100 such as battery-backed rtc, charging control, - leds, vibrator, system power and temperature, power management - and alsa sound. - -config ab3100_otp - tristate "st-ericsson ab3100 otp functions" - depends on ab3100_core - default y if ab3100_core - help - select this to enable the ab3100 mixed signal ic otp (one-time - programmable memory) support. this exposes a sysfs file to read - out otp values. - diff --git a/drivers/mfd/makefile b/drivers/mfd/makefile --- a/drivers/mfd/makefile +++ b/drivers/mfd/makefile -obj-$(config_ab3100_core) += ab3100-core.o -obj-$(config_ab3100_otp) += ab3100-otp.o diff --git a/drivers/mfd/ab3100-core.c b/drivers/mfd/ab3100-core.c --- a/drivers/mfd/ab3100-core.c +++ /dev/null -// spdx-license-identifier: gpl-2.0-only -/* - * copyright (c) 2007-2010 st-ericsson - * low-level core for exclusive access to the ab3100 ic on the i2c bus - * and some basic chip-configuration. - * author: linus walleij <linus.walleij@stericsson.com> - */ - -#include <linux/i2c.h> -#include <linux/mutex.h> -#include <linux/list.h> -#include <linux/notifier.h> -#include <linux/slab.h> -#include <linux/err.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/device.h> -#include <linux/interrupt.h> -#include <linux/random.h> -#include <linux/debugfs.h> -#include <linux/seq_file.h> -#include <linux/uaccess.h> -#include <linux/mfd/core.h> -#include <linux/mfd/ab3100.h> -#include <linux/mfd/abx500.h> - -/* these are the only registers inside ab3100 used in this main file */ - -/* interrupt event registers */ -#define ab3100_eventa1 0x21 -#define ab3100_eventa2 0x22 -#define ab3100_eventa3 0x23 - -/* ab3100 dac converter registers */ -#define ab3100_dis 0x00 -#define ab3100_d0c 0x01 -#define ab3100_d1c 0x02 -#define ab3100_d2c 0x03 -#define ab3100_d3c 0x04 - -/* chip id register */ -#define ab3100_cid 0x20 - -/* ab3100 interrupt registers */ -#define ab3100_imra1 0x24 -#define ab3100_imra2 0x25 -#define ab3100_imra3 0x26 -#define ab3100_imrb1 0x2b -#define ab3100_imrb2 0x2c -#define ab3100_imrb3 0x2d - -/* system power monitoring and control registers */ -#define ab3100_mca 0x2e -#define ab3100_mcb 0x2f - -/* sim power up */ -#define ab3100_sup 0x50 - -/* - * i2c communication - * - * the ab3100 is usually assigned address 0x48 (7-bit) - * the chip is defined in the platform i2c_board_data section. - */ -static int ab3100_get_chip_id(struct device *dev) -{ - struct ab3100 *ab3100 = dev_get_drvdata(dev->parent); - - return (int)ab3100->chip_id; -} - -static int ab3100_set_register_interruptible(struct ab3100 *ab3100, - u8 reg, u8 regval) -{ - u8 regandval[2] = {reg, regval}; - int err; - - err = mutex_lock_interruptible(&ab3100->access_mutex); - if (err) - return err; - - /* - * a two-byte write message with the first byte containing the register - * number and the second byte containing the value to be written - * effectively sets a register in the ab3100. - */ - err = i2c_master_send(ab3100->i2c_client, regandval, 2); - if (err < 0) { - dev_err(ab3100->dev, - "write error (write register): %d ", - err); - } else if (err != 2) { - dev_err(ab3100->dev, - "write error (write register) " - " %d bytes transferred (expected 2) ", - err); - err = -eio; - } else { - /* all is well */ - err = 0; - } - mutex_unlock(&ab3100->access_mutex); - return err; -} - -static int set_register_interruptible(struct device *dev, - u8 bank, u8 reg, u8 value) -{ - struct ab3100 *ab3100 = dev_get_drvdata(dev->parent); - - return ab3100_set_register_interruptible(ab3100, reg, value); -} - -/* - * the test registers exist at an i2c bus address up one - * from the ordinary base. they are not supposed to be used - * in production code, but sometimes you have to do that - * anyway. it's currently only used from this file so declare - * it static and do not export. - */ -static int ab3100_set_test_register_interruptible(struct ab3100 *ab3100, - u8 reg, u8 regval) -{ - u8 regandval[2] = {reg, regval}; - int err; - - err = mutex_lock_interruptible(&ab3100->access_mutex); - if (err) - return err; - - err = i2c_master_send(ab3100->testreg_client, regandval, 2); - if (err < 0) { - dev_err(ab3100->dev, - "write error (write test register): %d ", - err); - } else if (err != 2) { - dev_err(ab3100->dev, - "write error (write test register) " - " %d bytes transferred (expected 2) ", - err); - err = -eio; - } else { - /* all is well */ - err = 0; - } - mutex_unlock(&ab3100->access_mutex); - - return err; -} - -static int ab3100_get_register_interruptible(struct ab3100 *ab3100, - u8 reg, u8 *regval) -{ - int err; - - err = mutex_lock_interruptible(&ab3100->access_mutex); - if (err) - return err; - - /* - * ab3100 require an i2c "stop" command between each message, else - * it will not work. the only way of achieveing this with the - * message transport layer is to send the read and write messages - * separately. - */ - err = i2c_master_send(ab3100->i2c_client, &reg, 1); - if (err < 0) { - dev_err(ab3100->dev, - "write error (send register address): %d ", - err); - goto get_reg_out_unlock; - } else if (err != 1) { - dev_err(ab3100->dev, - "write error (send register address) " - " %d bytes transferred (expected 1) ", - err); - err = -eio; - goto get_reg_out_unlock; - } else { - /* all is well */ - err = 0; - } - - err = i2c_master_recv(ab3100->i2c_client, regval, 1); - if (err < 0) { - dev_err(ab3100->dev, - "write error (read register): %d ", - err); - goto get_reg_out_unlock; - } else if (err != 1) { - dev_err(ab3100->dev, - "write error (read register) " - " %d bytes transferred (expected 1) ", - err); - err = -eio; - goto get_reg_out_unlock; - } else { - /* all is well */ - err = 0; - } - - get_reg_out_unlock: - mutex_unlock(&ab3100->access_mutex); - return err; -} - -static int get_register_interruptible(struct device *dev, u8 bank, u8 reg, - u8 *value) -{ - struct ab3100 *ab3100 = dev_get_drvdata(dev->parent); - - return ab3100_get_register_interruptible(ab3100, reg, value); -} - -static int ab3100_get_register_page_interruptible(struct ab3100 *ab3100, - u8 first_reg, u8 *regvals, u8 numregs) -{ - int err; - - if (ab3100->chip_id == 0xa0 || - ab3100->chip_id == 0xa1) - /* these don't support paged reads */ - return -eio; - - err = mutex_lock_interruptible(&ab3100->access_mutex); - if (err) - return err; - - /* - * paged read also require an i2c "stop" command. - */ - err = i2c_master_send(ab3100->i2c_client, &first_reg, 1); - if (err < 0) { - dev_err(ab3100->dev, - "write error (send first register address): %d ", - err); - goto get_reg_page_out_unlock; - } else if (err != 1) { - dev_err(ab3100->dev, - "write error (send first register address) " - " %d bytes transferred (expected 1) ", - err); - err = -eio; - goto get_reg_page_out_unlock; - } - - err = i2c_master_recv(ab3100->i2c_client, regvals, numregs); - if (err < 0) { - dev_err(ab3100->dev, - "write error (read register page): %d ", - err); - goto get_reg_page_out_unlock; - } else if (err != numregs) { - dev_err(ab3100->dev, - "write error (read register page) " - " %d bytes transferred (expected %d) ", - err, numregs); - err = -eio; - goto get_reg_page_out_unlock; - } - - /* all is well */ - err = 0; - - get_reg_page_out_unlock: - mutex_unlock(&ab3100->access_mutex); - return err; -} - -static int get_register_page_interruptible(struct device *dev, u8 bank, - u8 first_reg, u8 *regvals, u8 numregs) -{ - struct ab3100 *ab3100 = dev_get_drvdata(dev->parent); - - return ab3100_get_register_page_interruptible(ab3100, - first_reg, regvals, numregs); -} - -static int ab3100_mask_and_set_register_interruptible(struct ab3100 *ab3100, - u8 reg, u8 andmask, u8 ormask) -{ - u8 regandval[2] = {reg, 0}; - int err; - - err = mutex_lock_interruptible(&ab3100->access_mutex); - if (err) - return err; - - /* first read out the target register */ - err = i2c_master_send(ab3100->i2c_client, &reg, 1); - if (err < 0) { - dev_err(ab3100->dev, - "write error (maskset send address): %d ", - err); - goto get_maskset_unlock; - } else if (err != 1) { - dev_err(ab3100->dev, - "write error (maskset send address) " - " %d bytes transferred (expected 1) ", - err); - err = -eio; - goto get_maskset_unlock; - } - - err = i2c_master_recv(ab3100->i2c_client, &regandval[1], 1); - if (err < 0) { - dev_err(ab3100->dev, - "write error (maskset read register): %d ", - err); - goto get_maskset_unlock; - } else if (err != 1) { - dev_err(ab3100->dev, - "write error (maskset read register) " - " %d bytes transferred (expected 1) ", - err); - err = -eio; - goto get_maskset_unlock; - } - - /* modify the register */ - regandval[1] &= andmask; - regandval[1] |= ormask; - - /* write the register */ - err = i2c_master_send(ab3100->i2c_client, regandval, 2); - if (err < 0) { - dev_err(ab3100->dev, - "write error (write register): %d ", - err); - goto get_maskset_unlock; - } else if (err != 2) { - dev_err(ab3100->dev, - "write error (write register) " - " %d bytes transferred (expected 2) ", - err); - err = -eio; - goto get_maskset_unlock; - } - - /* all is well */ - err = 0; - - get_maskset_unlock: - mutex_unlock(&ab3100->access_mutex); - return err; -} - -static int mask_and_set_register_interruptible(struct device *dev, u8 bank, - u8 reg, u8 bitmask, u8 bitvalues) -{ - struct ab3100 *ab3100 = dev_get_drvdata(dev->parent); - - return ab3100_mask_and_set_register_interruptible(ab3100, - reg, bitmask, (bitmask & bitvalues)); -} - -/* - * register a simple callback for handling any ab3100 events. - */ -int ab3100_event_register(struct ab3100 *ab3100, - struct notifier_block *nb) -{ - return blocking_notifier_chain_register(&ab3100->event_subscribers, - nb); -} -export_symbol(ab3100_event_register); - -/* - * remove a previously registered callback. - */ -int ab3100_event_unregister(struct ab3100 *ab3100, - struct notifier_block *nb) -{ - return blocking_notifier_chain_unregister(&ab3100->event_subscribers, - nb); -} -export_symbol(ab3100_event_unregister); - - -static int ab3100_event_registers_startup_state_get(struct device *dev, - u8 *event) -{ - struct ab3100 *ab3100 = dev_get_drvdata(dev->parent); - - if (!ab3100->startup_events_read) - return -eagain; /* try again later */ - memcpy(event, ab3100->startup_events, 3); - - return 0; -} - -static struct abx500_ops ab3100_ops = { - .get_chip_id = ab3100_get_chip_id, - .set_register = set_register_interruptible, - .get_register = get_register_interruptible, - .get_register_page = get_register_page_interruptible, - .set_register_page = null, - .mask_and_set_register = mask_and_set_register_interruptible, - .event_registers_startup_state_get = - ab3100_event_registers_startup_state_get, - .startup_irq_enabled = null, -}; - -/* - * this is a threaded interrupt handler so we can make some - * i2c calls etc. - */ -static irqreturn_t ab3100_irq_handler(int irq, void *data) -{ - struct ab3100 *ab3100 = data; - u8 event_regs[3]; - u32 fatevent; - int err; - - err = ab3100_get_register_page_interruptible(ab3100, ab3100_eventa1, - event_regs, 3); - if (err) - goto err_event; - - fatevent = (event_regs[0] << 16) | - (event_regs[1] << 8) | - event_regs[2]; - - if (!ab3100->startup_events_read) { - ab3100->startup_events[0] = event_regs[0]; - ab3100->startup_events[1] = event_regs[1]; - ab3100->startup_events[2] = event_regs[2]; - ab3100->startup_events_read = true; - } - /* - * the notified parties will have to mask out the events - * they're interested in and react to them. they will be - * notified on all events, then they use the fatevent value - * to determine if they're interested. - */ - blocking_notifier_call_chain(&ab3100->event_subscribers, - fatevent, null); - - dev_dbg(ab3100->dev, - "irq event: 0x%08x ", fatevent); - - return irq_handled; - - err_event: - dev_dbg(ab3100->dev, - "error reading event status "); - return irq_handled; -} - -#ifdef config_debug_fs -/* - * some debugfs entries only exposed if we're using debug - */ -static int ab3100_registers_print(struct seq_file *s, void *p) -{ - struct ab3100 *ab3100 = s->private; - u8 value; - u8 reg; - - seq_puts(s, "ab3100 registers: "); - - for (reg = 0; reg < 0xff; reg++) { - ab3100_get_register_interruptible(ab3100, reg, &value); - seq_printf(s, "[0x%x]: 0x%x ", reg, value); - } - return 0; -} - -static int ab3100_registers_open(struct inode *inode, struct file *file) -{ - return single_open(file, ab3100_registers_print, inode->i_private); -} - -static const struct file_operations ab3100_registers_fops = { - .open = ab3100_registers_open, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, - .owner = this_module, -}; - -struct ab3100_get_set_reg_priv { - struct ab3100 *ab3100; - bool mode; -}; - -static ssize_t ab3100_get_set_reg(struct file *file, - const char __user *user_buf, - size_t count, loff_t *ppos) -{ - struct ab3100_get_set_reg_priv *priv = file->private_data; - struct ab3100 *ab3100 = priv->ab3100; - char buf[32]; - ssize_t buf_size; - int regp; - u8 user_reg; - int err; - int i = 0; - - /* get userspace string and assure termination */ - buf_size = min((ssize_t)count, (ssize_t)(sizeof(buf)-1)); - if (copy_from_user(buf, user_buf, buf_size)) - return -efault; - buf[buf_size] = 0; - - /* - * the idea is here to parse a string which is either - * "0xnn" for reading a register, or "0xaa 0xbb" for - * writing 0xbb to the register 0xaa. first move past - * whitespace and then begin to parse the register. - */ - while ((i < buf_size) && (buf[i] == ' ')) - i++; - regp = i; - - /* - * advance pointer to end of string then terminate - * the register string. this is needed to satisfy - * the kstrtou8() function. - */ - while ((i < buf_size) && (buf[i] != ' ')) - i++; - buf[i] = ''; - - err = kstrtou8(&buf[regp], 16, &user_reg); - if (err) - return err; - - /* either we read or we write a register here */ - if (!priv->mode) { - /* reading */ - u8 regvalue; - - ab3100_get_register_interruptible(ab3100, user_reg, &regvalue); - - dev_info(ab3100->dev, - "debug read ab3100 reg[0x%02x]: 0x%02x ", - user_reg, regvalue); - } else { - int valp; - u8 user_value; - u8 regvalue; - - /* - * writing, we need some value to write to - * the register so keep parsing the string - * from userspace. - */ - i++; - while ((i < buf_size) && (buf[i] == ' ')) - i++; - valp = i; - while ((i < buf_size) && (buf[i] != ' ')) - i++; - buf[i] = ''; - - err = kstrtou8(&buf[valp], 16, &user_value); - if (err) - return err; - - ab3100_set_register_interruptible(ab3100, user_reg, user_value); - ab3100_get_register_interruptible(ab3100, user_reg, &regvalue); - - dev_info(ab3100->dev, - "debug write reg[0x%02x] " - " with 0x%02x, after readback: 0x%02x ", - user_reg, user_value, regvalue); - } - return buf_size; -} - -static const struct file_operations ab3100_get_set_reg_fops = { - .open = simple_open, - .write = ab3100_get_set_reg, - .llseek = noop_llseek, -}; - -static struct ab3100_get_set_reg_priv ab3100_get_priv; -static struct ab3100_get_set_reg_priv ab3100_set_priv; - -static void ab3100_setup_debugfs(struct ab3100 *ab3100) -{ - struct dentry *ab3100_dir; - - ab3100_dir = debugfs_create_dir("ab3100", null); - - debugfs_create_file("registers", s_irugo, ab3100_dir, ab3100, - &ab3100_registers_fops); - - ab3100_get_priv.ab3100 = ab3100; - ab3100_get_priv.mode = false; - debugfs_create_file("get_reg", s_iwusr, ab3100_dir, &ab3100_get_priv, - &ab3100_get_set_reg_fops); - - ab3100_set_priv.ab3100 = ab3100; - ab3100_set_priv.mode = true; - debugfs_create_file("set_reg", s_iwusr, ab3100_dir, &ab3100_set_priv, - &ab3100_get_set_reg_fops); -} -#else -static inline void ab3100_setup_debugfs(struct ab3100 *ab3100) -{ -} -#endif - -/* - * basic set-up, datastructure creation/destruction and i2c interface. - * this sets up a default config in the ab3100 chip so that it - * will work as expected. - */ - -struct ab3100_init_setting { - u8 abreg; - u8 setting; -}; - -static const struct ab3100_init_setting ab3100_init_settings[] = { - { - .abreg = ab3100_mca, - .setting = 0x01 - }, { - .abreg = ab3100_mcb, - .setting = 0x30 - }, { - .abreg = ab3100_imra1, - .setting = 0x00 - }, { - .abreg = ab3100_imra2, - .setting = 0xff - }, { - .abreg = ab3100_imra3, - .setting = 0x01 - }, { - .abreg = ab3100_imrb1, - .setting = 0xbf - }, { - .abreg = ab3100_imrb2, - .setting = 0xff - }, { - .abreg = ab3100_imrb3, - .setting = 0xff - }, { - .abreg = ab3100_sup, - .setting = 0x00 - }, { - .abreg = ab3100_dis, - .setting = 0xf0 - }, { - .abreg = ab3100_d0c, - .setting = 0x00 - }, { - .abreg = ab3100_d1c, - .setting = 0x00 - }, { - .abreg = ab3100_d2c, - .setting = 0x00 - }, { - .abreg = ab3100_d3c, - .setting = 0x00 - }, -}; - -static int ab3100_setup(struct ab3100 *ab3100) -{ - int err = 0; - int i; - - for (i = 0; i < array_size(ab3100_init_settings); i++) { - err = ab3100_set_register_interruptible(ab3100, - ab3100_init_settings[i].abreg, - ab3100_init_settings[i].setting); - if (err) - goto exit_no_setup; - } - - /* - * special trick to make the ab3100 use the 32khz clock (rtc) - * bit 3 in test register 0x02 is a special, undocumented test - * register bit that only exist in ab3100 p1e - */ - if (ab3100->chip_id == 0xc4) { - dev_warn(ab3100->dev, - "ab3100 p1e variant detected forcing chip to 32khz "); - err = ab3100_set_test_register_interruptible(ab3100, - 0x02, 0x08); - } - - exit_no_setup: - return err; -} - -/* the subdevices of the ab3100 */ -static struct mfd_cell ab3100_devs[] = { - { - .name = "ab3100-dac", - .id = -1, - }, - { - .name = "ab3100-leds", - .id = -1, - }, - { - .name = "ab3100-power", - .id = -1, - }, - { - .name = "ab3100-regulators", - .of_compatible = "stericsson,ab3100-regulators", - .id = -1, - }, - { - .name = "ab3100-sim", - .id = -1, - }, - { - .name = "ab3100-uart", - .id = -1, - }, - { - .name = "ab3100-rtc", - .id = -1, - }, - { - .name = "ab3100-charger", - .id = -1, - }, - { - .name = "ab3100-boost", - .id = -1, - }, - { - .name = "ab3100-adc", - .id = -1, - }, - { - .name = "ab3100-fuelgauge", - .id = -1, - }, - { - .name = "ab3100-vibrator", - .id = -1, - }, - { - .name = "ab3100-otp", - .id = -1, - }, - { - .name = "ab3100-codec", - .id = -1, - }, -}; - -struct ab_family_id { - u8 id; - char *name; -}; - -static const struct ab_family_id ids[] = { - /* ab3100 */ - { - .id = 0xc0, - .name = "p1a" - }, { - .id = 0xc1, - .name = "p1b" - }, { - .id = 0xc2, - .name = "p1c" - }, { - .id = 0xc3, - .name = "p1d" - }, { - .id = 0xc4, - .name = "p1e" - }, { - .id = 0xc5, - .name = "p1f/r1a" - }, { - .id = 0xc6, - .name = "p1g/r1a" - }, { - .id = 0xc7, - .name = "p2a/r2a" - }, { - .id = 0xc8, - .name = "p2b/r2b" - }, - /* ab3000 variants, not supported */ - { - .id = 0xa0 - }, { - .id = 0xa1 - }, { - .id = 0xa2 - }, { - .id = 0xa3 - }, { - .id = 0xa4 - }, { - .id = 0xa5 - }, { - .id = 0xa6 - }, { - .id = 0xa7 - }, - /* terminator */ - { - .id = 0x00, - }, -}; - -static int ab3100_probe(struct i2c_client *client, - const struct i2c_device_id *id) -{ - struct ab3100 *ab3100; - struct ab3100_platform_data *ab3100_plf_data = - dev_get_platdata(&client->dev); - int err; - int i; - - ab3100 = devm_kzalloc(&client->dev, sizeof(struct ab3100), gfp_kernel); - if (!ab3100) - return -enomem; - - /* initialize data structure */ - mutex_init(&ab3100->access_mutex); - blocking_init_notifier_head(&ab3100->event_subscribers); - - ab3100->i2c_client = client; - ab3100->dev = &ab3100->i2c_client->dev; - - i2c_set_clientdata(client, ab3100); - - /* read chip id register */ - err = ab3100_get_register_interruptible(ab3100, ab3100_cid, - &ab3100->chip_id); - if (err) { - dev_err(&client->dev, - "failed to communicate with ab3100 chip "); - goto exit_no_detect; - } - - for (i = 0; ids[i].id != 0x0; i++) { - if (ids[i].id == ab3100->chip_id) { - if (ids[i].name) - break; - - dev_err(&client->dev, "ab3000 is not supported "); - goto exit_no_detect; - } - } - - snprintf(&ab3100->chip_name[0], - sizeof(ab3100->chip_name) - 1, "ab3100 %s", ids[i].name); - - if (ids[i].id == 0x0) { - dev_err(&client->dev, "unknown analog baseband chip id: 0x%x ", - ab3100->chip_id); - dev_err(&client->dev, - "accepting it anyway. please update the driver. "); - goto exit_no_detect; - } - - dev_info(&client->dev, "detected chip: %s ", - &ab3100->chip_name[0]); - - /* attach a second dummy i2c_client to the test register address */ - ab3100->testreg_client = i2c_new_dummy_device(client->adapter, - client->addr + 1); - if (is_err(ab3100->testreg_client)) { - err = ptr_err(ab3100->testreg_client); - goto exit_no_testreg_client; - } - - err = ab3100_setup(ab3100); - if (err) - goto exit_no_setup; - - err = devm_request_threaded_irq(&client->dev, - client->irq, null, ab3100_irq_handler, - irqf_oneshot, "ab3100-core", ab3100); - if (err) - goto exit_no_irq; - - err = abx500_register_ops(&client->dev, &ab3100_ops); - if (err) - goto exit_no_ops; - - /* set up and register the platform devices. */ - for (i = 0; i < array_size(ab3100_devs); i++) { - ab3100_devs[i].platform_data = ab3100_plf_data; - ab3100_devs[i].pdata_size = sizeof(struct ab3100_platform_data); - } - - err = mfd_add_devices(&client->dev, 0, ab3100_devs, - array_size(ab3100_devs), null, 0, null); - - ab3100_setup_debugfs(ab3100); - - return 0; - - exit_no_ops: - exit_no_irq: - exit_no_setup: - i2c_unregister_device(ab3100->testreg_client); - exit_no_testreg_client: - exit_no_detect: - return err; -} - -static const struct i2c_device_id ab3100_id[] = { - { "ab3100", 0 }, - { } -}; - -static struct i2c_driver ab3100_driver = { - .driver = { - .name = "ab3100", - .suppress_bind_attrs = true, - }, - .id_table = ab3100_id, - .probe = ab3100_probe, -}; - -static int __init ab3100_i2c_init(void) -{ - return i2c_add_driver(&ab3100_driver); -} -subsys_initcall(ab3100_i2c_init); diff --git a/drivers/mfd/ab3100-otp.c b/drivers/mfd/ab3100-otp.c --- a/drivers/mfd/ab3100-otp.c +++ /dev/null -// spdx-license-identifier: gpl-2.0-only -/* - * drivers/mfd/ab3100_otp.c - * - * copyright (c) 2007-2009 st-ericsson ab - * driver to read out otp from the ab3100 mixed-signal circuit - * author: linus walleij <linus.walleij@stericsson.com> - */ - -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/slab.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/mfd/abx500.h> -#include <linux/debugfs.h> -#include <linux/seq_file.h> - -/* the otp registers */ -#define ab3100_otp0 0xb0 -#define ab3100_otp1 0xb1 -#define ab3100_otp2 0xb2 -#define ab3100_otp3 0xb3 -#define ab3100_otp4 0xb4 -#define ab3100_otp5 0xb5 -#define ab3100_otp6 0xb6 -#define ab3100_otp7 0xb7 -#define ab3100_otpp 0xbf - -/** - * struct ab3100_otp - * @dev: containing device - * @locked: whether the otp is locked, after locking, no more bits - * can be changed but before locking it is still possible - * to change bits from 1->0. - * @freq: clocking frequency for the otp, this frequency is either - * 32768hz or 1mhz/30 - * @paf: product activation flag, indicates whether this is a real - * product (paf true) or a lab board etc (paf false) - * @imeich: if this is set it is possible to override the - * imei number found in the tac, fac and svn fields with - * (secured) software - * @cid: customer id - * @tac: type allocation code of the imei - * @fac: final assembly code of the imei - * @svn: software version number of the imei - * @debugfs: a debugfs file used when dumping to file - */ -struct ab3100_otp { - struct device *dev; - bool locked; - u32 freq; - bool paf; - bool imeich; - u16 cid:14; - u32 tac:20; - u8 fac; - u32 svn:20; - struct dentry *debugfs; -}; - -static int __init ab3100_otp_read(struct ab3100_otp *otp) -{ - u8 otpval[8]; - u8 otpp; - int err; - - err = abx500_get_register_interruptible(otp->dev, 0, - ab3100_otpp, &otpp); - if (err) { - dev_err(otp->dev, "unable to read otpp register "); - return err; - } - - err = abx500_get_register_page_interruptible(otp->dev, 0, - ab3100_otp0, otpval, 8); - if (err) { - dev_err(otp->dev, "unable to read otp register page "); - return err; - } - - /* cache otp properties, they never change by nature */ - otp->locked = (otpp & 0x80); - otp->freq = (otpp & 0x40) ? 32768 : 34100; - otp->paf = (otpval[1] & 0x80); - otp->imeich = (otpval[1] & 0x40); - otp->cid = ((otpval[1] << 8) | otpval[0]) & 0x3fff; - otp->tac = ((otpval[4] & 0x0f) << 16) | (otpval[3] << 8) | otpval[2]; - otp->fac = ((otpval[5] & 0x0f) << 4) | (otpval[4] >> 4); - otp->svn = (otpval[7] << 12) | (otpval[6] << 4) | (otpval[5] >> 4); - return 0; -} - -/* - * this is a simple debugfs human-readable file that dumps out - * the contents of the otp. - */ -#ifdef config_debug_fs -static int ab3100_show_otp(struct seq_file *s, void *v) -{ - struct ab3100_otp *otp = s->private; - - seq_printf(s, "otp is %s ", otp->locked ? "locked" : "unlocked"); - seq_printf(s, "otp clock switch startup is %uhz ", otp->freq); - seq_printf(s, "paf is %s ", otp->paf ? "set" : "not set"); - seq_printf(s, "imei is %s ", otp->imeich ? - "changeable" : "not changeable"); - seq_printf(s, "cid: 0x%04x (decimal: %d) ", otp->cid, otp->cid); - seq_printf(s, "imei: %u-%u-%u ", otp->tac, otp->fac, otp->svn); - return 0; -} - -static int ab3100_otp_open(struct inode *inode, struct file *file) -{ - return single_open(file, ab3100_show_otp, inode->i_private); -} - -static const struct file_operations ab3100_otp_operations = { - .open = ab3100_otp_open, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static void __init ab3100_otp_init_debugfs(struct device *dev, - struct ab3100_otp *otp) -{ - otp->debugfs = debugfs_create_file("ab3100_otp", s_ifreg | s_irugo, - null, otp, &ab3100_otp_operations); -} - -static void __exit ab3100_otp_exit_debugfs(struct ab3100_otp *otp) -{ - debugfs_remove(otp->debugfs); -} -#else -/* compile this out if debugfs not selected */ -static inline void __init ab3100_otp_init_debugfs(struct device *dev, - struct ab3100_otp *otp) -{ -} - -static inline void __exit ab3100_otp_exit_debugfs(struct ab3100_otp *otp) -{ -} -#endif - -#define show_ab3100_attr(name) \ -static ssize_t ab3100_otp_##name##_show(struct device *dev, \ - struct device_attribute *attr, \ - char *buf) \ -{\ - struct ab3100_otp *otp = dev_get_drvdata(dev); \ - return sprintf(buf, "%u ", otp->name); \ -} - -show_ab3100_attr(locked) -show_ab3100_attr(freq) -show_ab3100_attr(paf) -show_ab3100_attr(imeich) -show_ab3100_attr(cid) -show_ab3100_attr(fac) -show_ab3100_attr(tac) -show_ab3100_attr(svn) - -static struct device_attribute ab3100_otp_attrs[] = { - __attr(locked, s_irugo, ab3100_otp_locked_show, null), - __attr(freq, s_irugo, ab3100_otp_freq_show, null), - __attr(paf, s_irugo, ab3100_otp_paf_show, null), - __attr(imeich, s_irugo, ab3100_otp_imeich_show, null), - __attr(cid, s_irugo, ab3100_otp_cid_show, null), - __attr(fac, s_irugo, ab3100_otp_fac_show, null), - __attr(tac, s_irugo, ab3100_otp_tac_show, null), - __attr(svn, s_irugo, ab3100_otp_svn_show, null), -}; - -static int __init ab3100_otp_probe(struct platform_device *pdev) -{ - struct ab3100_otp *otp; - int err = 0; - int i; - - otp = devm_kzalloc(&pdev->dev, sizeof(struct ab3100_otp), gfp_kernel); - if (!otp) - return -enomem; - - otp->dev = &pdev->dev; - - /* replace platform data coming in with a local struct */ - platform_set_drvdata(pdev, otp); - - err = ab3100_otp_read(otp); - if (err) - return err; - - dev_info(&pdev->dev, "ab3100 otp readout registered "); - - /* sysfs entries */ - for (i = 0; i < array_size(ab3100_otp_attrs); i++) { - err = device_create_file(&pdev->dev, - &ab3100_otp_attrs[i]); - if (err) - goto err; - } - - /* debugfs entries */ - ab3100_otp_init_debugfs(&pdev->dev, otp); - - return 0; - -err: - while (--i >= 0) - device_remove_file(&pdev->dev, &ab3100_otp_attrs[i]); - return err; -} - -static int __exit ab3100_otp_remove(struct platform_device *pdev) -{ - struct ab3100_otp *otp = platform_get_drvdata(pdev); - int i; - - for (i = 0; i < array_size(ab3100_otp_attrs); i++) - device_remove_file(&pdev->dev, - &ab3100_otp_attrs[i]); - ab3100_otp_exit_debugfs(otp); - return 0; -} - -static struct platform_driver ab3100_otp_driver = { - .driver = { - .name = "ab3100-otp", - }, - .remove = __exit_p(ab3100_otp_remove), -}; - -module_platform_driver_probe(ab3100_otp_driver, ab3100_otp_probe); - -module_author("linus walleij <linus.walleij@stericsson.com>"); -module_description("ab3100 otp readout driver"); -module_license("gpl"); diff --git a/include/linux/mfd/ab3100.h b/include/linux/mfd/ab3100.h --- a/include/linux/mfd/ab3100.h +++ /dev/null -/* spdx-license-identifier: gpl-2.0-only */ -/* - * copyright (c) 2007-2009 st-ericsson ab - * ab3100 core access functions - * author: linus walleij <linus.walleij@stericsson.com> - */ - -#include <linux/regulator/machine.h> - -struct device; - -#ifndef mfd_ab3100_h -#define mfd_ab3100_h - - -#define ab3100_p1a 0xc0 -#define ab3100_p1b 0xc1 -#define ab3100_p1c 0xc2 -#define ab3100_p1d 0xc3 -#define ab3100_p1e 0xc4 -#define ab3100_p1f 0xc5 -#define ab3100_p1g 0xc6 -#define ab3100_r2a 0xc7 -#define ab3100_r2b 0xc8 - -/* - * ab3100, eventa1, a2 and a3 event register flags - * these are catenated into a single 32-bit flag in the code - * for event notification broadcasts. - */ -#define ab3100_eventa1_onswa (0x01<<16) -#define ab3100_eventa1_onswb (0x02<<16) -#define ab3100_eventa1_onswc (0x04<<16) -#define ab3100_eventa1_dcio (0x08<<16) -#define ab3100_eventa1_over_temp (0x10<<16) -#define ab3100_eventa1_sim_off (0x20<<16) -#define ab3100_eventa1_vbus (0x40<<16) -#define ab3100_eventa1_vset_usb (0x80<<16) - -#define ab3100_eventa2_ready_tx (0x01<<8) -#define ab3100_eventa2_ready_rx (0x02<<8) -#define ab3100_eventa2_overrun_error (0x04<<8) -#define ab3100_eventa2_framing_error (0x08<<8) -#define ab3100_eventa2_charg_overcurrent (0x10<<8) -#define ab3100_eventa2_midr (0x20<<8) -#define ab3100_eventa2_battery_rem (0x40<<8) -#define ab3100_eventa2_alarm (0x80<<8) - -#define ab3100_eventa3_adc_trig5 (0x01) -#define ab3100_eventa3_adc_trig4 (0x02) -#define ab3100_eventa3_adc_trig3 (0x04) -#define ab3100_eventa3_adc_trig2 (0x08) -#define ab3100_eventa3_adc_trigvbat (0x10) -#define ab3100_eventa3_adc_trigvtx (0x20) -#define ab3100_eventa3_adc_trig1 (0x40) -#define ab3100_eventa3_adc_trig0 (0x80) - -/* ab3100, str register flags */ -#define ab3100_str_onswa (0x01) -#define ab3100_str_onswb (0x02) -#define ab3100_str_onswc (0x04) -#define ab3100_str_dcio (0x08) -#define ab3100_str_boot_mode (0x10) -#define ab3100_str_sim_off (0x20) -#define ab3100_str_batt_removal (0x40) -#define ab3100_str_vbus (0x80) - -/* - * ab3100 contains 8 regulators, one external regulator controller - * and a buck converter, further the ldo e and buck converter can - * have separate settings if they are in sleep mode, this is - * modeled as a separate regulator. - */ -#define ab3100_num_regulators 10 - -/** - * struct ab3100 - * @access_mutex: lock out concurrent accesses to the ab3100 registers - * @dev: pointer to the containing device - * @i2c_client: i2c client for this chip - * @testreg_client: secondary client for test registers - * @chip_name: name of this chip variant - * @chip_id: 8 bit chip id for this chip variant - * @event_subscribers: event subscribers are listed here - * @startup_events: a copy of the first reading of the event registers - * @startup_events_read: whether the first events have been read - * - * this struct is private and devices using it should not - * access any fields. it is used as a token for calling the - * ab3100 functions. - */ -struct ab3100 { - struct mutex access_mutex; - struct device *dev; - struct i2c_client *i2c_client; - struct i2c_client *testreg_client; - char chip_name[32]; - u8 chip_id; - struct blocking_notifier_head event_subscribers; - u8 startup_events[3]; - bool startup_events_read; -}; - -/** - * struct ab3100_platform_data - * data supplied to initialize board connections to the ab3100 - * @reg_constraints: regulator constraints for target board - * the order of these constraints are: ldo a, c, d, e, - * f, g, h, k, ext and buck. - * @reg_initvals: initial values for the regulator registers - * plus two sleep settings for ldo e and the buck converter. - * exactly ab3100_num_regulators+2 values must be sent in. - * order: ldo a, c, e, e sleep, f, g, h, k, ext, buck, - * buck sleep, ldo d. (ldo d need to be initialized last.) - * @external_voltage: voltage level of the external regulator. - */ -struct ab3100_platform_data { - struct regulator_init_data reg_constraints[ab3100_num_regulators]; - u8 reg_initvals[ab3100_num_regulators+2]; - int external_voltage; -}; - -int ab3100_event_register(struct ab3100 *ab3100, - struct notifier_block *nb); -int ab3100_event_unregister(struct ab3100 *ab3100, - struct notifier_block *nb); - -#endif /* mfd_ab3100_h */
Multi Function Devices (MFD)
16f961544bfd7170f75d805d7585e09023671dbc
arnd bergmann linus walleij linus walleij linaro org
include
linux
mfd
dt_bindings: mfd: add rohm bd9576muf and bd9573muf pmics
add bindings for rohm bd9576muf and bd9573muf pmics. these pmics are primarily intended to be used to power the r-car series processors. they provide 6 power outputs, safety features and a watchdog with two functional modes.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
support rohm bd9576muf and bd9573muf pmics
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['yaml']
1
123
0
--- diff --git a/documentation/devicetree/bindings/mfd/rohm,bd9576-pmic.yaml b/documentation/devicetree/bindings/mfd/rohm,bd9576-pmic.yaml --- /dev/null +++ b/documentation/devicetree/bindings/mfd/rohm,bd9576-pmic.yaml +# spdx-license-identifier: gpl-2.0-only or bsd-2-clause +%yaml 1.2 +--- +$id: http://devicetree.org/schemas/mfd/rohm,bd9576-pmic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: rohm bd9576muf and bd9573muf power management integrated circuit bindings + +maintainers: + - matti vaittinen <matti.vaittinen@fi.rohmeurope.com> + +description: | + bd9576muf and bd9573muf are power management ics primarily intended for + powering the r-car series processors. + the ic provides 6 power outputs with configurable sequencing and safety + monitoring. a watchdog logic with slow ping/windowed modes is also included. + +properties: + compatible: + enum: + - rohm,bd9576 + - rohm,bd9573 + + reg: + description: + i2c slave address. + maxitems: 1 + + interrupts: + maxitems: 1 + + rohm,vout1-en-low: + description: + bd9576 and bd9573 vout1 regulator enable state can be individually + controlled by a gpio. this is dictated by state of vout1-en pin during + the pmic startup. if vout1-en is low during pmic startup then the vout1 + enable sate is controlled via this pin. set this property if vout1-en + is wired to be down at pmic start-up. + type: boolean + + rohm,vout1-en-gpios: + description: + gpio specifier to specify the gpio connected to vout1-en for vout1 on/off + state control. + maxitems: 1 + + rohm,ddr-sel-low: + description: + the bd9576 and bd9573 output voltage for ddr can be selected by setting + the ddr-sel pin low or high. set this property if ddr-sel is grounded. + type: boolean + + rohm,watchdog-enable-gpios: + description: the gpio line used to enable the watchdog. + maxitems: 1 + + rohm,watchdog-ping-gpios: + description: the gpio line used to ping the watchdog. + maxitems: 1 + + rohm,hw-timeout-ms: + maxitems: 2 + description: + watchog timeout in milliseconds. if single value is given it is + the maximum timeout. eg. if pinging watchdog is not done within this time + limit the watchdog will be triggered. if two values are given watchdog + is configured in "window mode". then first value is limit for short-ping + eg. if watchdog is pinged sooner than that the watchdog will trigger. + when two values is given the second value is the maximum timeout. + # (hw) minimum for short timeout is 2ms, maximum 220 ms. + # (hw) minimum for max timeout is 4ms, maximum 4416 ms. + + regulators: + $ref: ../regulator/rohm,bd9576-regulator.yaml + description: + list of child nodes that specify the regulators. + +required: + - compatible + - reg + - regulators + +additionalproperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/leds/common.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + pmic: pmic@30 { + compatible = "rohm,bd9576"; + reg = <0x30>; + rohm,vout1-en-low; + rohm,vout1-en-gpios = <&gpio2 6 gpio_active_high>; + rohm,ddr-sel-low; + rohm,watchdog-enable-gpios = <&gpio2 6 gpio_active_high>; + rohm,watchdog-ping-gpios = <&gpio2 7 gpio_active_high>; + rohm,hw-timeout-ms = <150>, <2300>; + + regulators { + boost1: regulator-vd50 { + regulator-name = "vd50"; + }; + buck1: regulator-vd18 { + regulator-name = "vd18"; + }; + buck2: regulator-vdddr { + regulator-name = "vdddr"; + }; + buck3: regulator-vd10 { + regulator-name = "vd10"; + }; + ldo: regulator-voutl1 { + regulator-name = "voutl1"; + }; + sw: regulator-vouts1 { + regulator-name = "vouts1"; + }; + }; + }; + };
Multi Function Devices (MFD)
bd4cefe20e3ded06ee2a2629a73ecb40a08f4eaf
matti vaittinen rob herring robh kernel org
documentation
devicetree
bindings, mfd
mfd: support rohm bd9576muf and bd9573muf
add core support for rohm bd9576muf and bd9573muf pmics which are mainly used to power the r-car series processors.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
support rohm bd9576muf and bd9573muf pmics
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['h', 'kconfig', 'c', 'makefile']
5
182
0
--- diff --git a/drivers/mfd/kconfig b/drivers/mfd/kconfig --- a/drivers/mfd/kconfig +++ b/drivers/mfd/kconfig +config mfd_rohm_bd957xmuf + tristate "rohm bd9576muf and bd9573muf power management ics" + depends on i2c=y + depends on of + select regmap_i2c + select mfd_core + help + select this option to get support for the rohm bd9576muf and + bd9573muf power management ics. bd9576 and bd9573 are primarily + designed to be used to power r-car series processors. + diff --git a/drivers/mfd/makefile b/drivers/mfd/makefile --- a/drivers/mfd/makefile +++ b/drivers/mfd/makefile +obj-$(config_mfd_rohm_bd957xmuf) += rohm-bd9576.o diff --git a/drivers/mfd/rohm-bd9576.c b/drivers/mfd/rohm-bd9576.c --- /dev/null +++ b/drivers/mfd/rohm-bd9576.c +// spdx-license-identifier: gpl-2.0-or-later +/* + * copyright (c) 2021 rohm semiconductors + * + * rohm bd9576muf and bd9573muf pmic driver + */ + +#include <linux/i2c.h> +#include <linux/interrupt.h> +#include <linux/ioport.h> +#include <linux/irq.h> +#include <linux/mfd/core.h> +#include <linux/mfd/rohm-bd957x.h> +#include <linux/mfd/rohm-generic.h> +#include <linux/module.h> +#include <linux/of_device.h> +#include <linux/regmap.h> +#include <linux/types.h> + +static struct mfd_cell bd9573_mfd_cells[] = { + { .name = "bd9573-regulator", }, + { .name = "bd9576-wdt", }, +}; + +static struct mfd_cell bd9576_mfd_cells[] = { + { .name = "bd9576-regulator", }, + { .name = "bd9576-wdt", }, +}; + +static const struct regmap_range volatile_ranges[] = { + regmap_reg_range(bd957x_reg_smrb_assert, bd957x_reg_smrb_assert), + regmap_reg_range(bd957x_reg_pmic_internal_stat, + bd957x_reg_pmic_internal_stat), + regmap_reg_range(bd957x_reg_int_therm_stat, bd957x_reg_int_therm_stat), + regmap_reg_range(bd957x_reg_int_ovp_stat, bd957x_reg_int_sys_stat), + regmap_reg_range(bd957x_reg_int_main_stat, bd957x_reg_int_main_stat), +}; + +static const struct regmap_access_table volatile_regs = { + .yes_ranges = &volatile_ranges[0], + .n_yes_ranges = array_size(volatile_ranges), +}; + +static struct regmap_config bd957x_regmap = { + .reg_bits = 8, + .val_bits = 8, + .volatile_table = &volatile_regs, + .max_register = bd957x_max_register, + .cache_type = regcache_rbtree, +}; + +static int bd957x_i2c_probe(struct i2c_client *i2c, + const struct i2c_device_id *id) +{ + int ret; + struct regmap *regmap; + struct mfd_cell *cells; + int num_cells; + unsigned long chip_type; + + chip_type = (unsigned long)of_device_get_match_data(&i2c->dev); + + switch (chip_type) { + case rohm_chip_type_bd9576: + cells = bd9576_mfd_cells; + num_cells = array_size(bd9576_mfd_cells); + break; + case rohm_chip_type_bd9573: + cells = bd9573_mfd_cells; + num_cells = array_size(bd9573_mfd_cells); + break; + default: + dev_err(&i2c->dev, "unknown device type"); + return -einval; + } + + regmap = devm_regmap_init_i2c(i2c, &bd957x_regmap); + if (is_err(regmap)) { + dev_err(&i2c->dev, "failed to initialize regmap "); + return ptr_err(regmap); + } + + ret = devm_mfd_add_devices(&i2c->dev, platform_devid_auto, cells, + num_cells, null, 0, null); + if (ret) + dev_err(&i2c->dev, "failed to create subdevices "); + + return ret; +} + +static const struct of_device_id bd957x_of_match[] = { + { .compatible = "rohm,bd9576", .data = (void *)rohm_chip_type_bd9576, }, + { .compatible = "rohm,bd9573", .data = (void *)rohm_chip_type_bd9573, }, + { }, +}; +module_device_table(of, bd957x_of_match); + +static struct i2c_driver bd957x_drv = { + .driver = { + .name = "rohm-bd957x", + .of_match_table = bd957x_of_match, + }, + .probe = &bd957x_i2c_probe, +}; +module_i2c_driver(bd957x_drv); + +module_author("matti vaittinen <matti.vaittinen@fi.rohmeurope.com>"); +module_description("rohm bd9576muf and bd9573muf power management ic driver"); +module_license("gpl"); diff --git a/include/linux/mfd/rohm-bd957x.h b/include/linux/mfd/rohm-bd957x.h --- /dev/null +++ b/include/linux/mfd/rohm-bd957x.h +/* spdx-license-identifier: gpl-2.0-or-later */ +/* copyright (c) 2021 rohm semiconductors */ + +#ifndef __linux_mfd_bd957x_h__ +#define __linux_mfd_bd957x_h__ + +enum { + bd957x_vd50, + bd957x_vd18, + bd957x_vdddr, + bd957x_vd10, + bd957x_voutl1, + bd957x_vouts1, +}; + +#define bd957x_reg_smrb_assert 0x15 +#define bd957x_reg_pmic_internal_stat 0x20 +#define bd957x_reg_int_therm_stat 0x23 +#define bd957x_reg_int_therm_mask 0x24 +#define bd957x_reg_int_ovp_stat 0x25 +#define bd957x_reg_int_scp_stat 0x26 +#define bd957x_reg_int_ocp_stat 0x27 +#define bd957x_reg_int_ovd_stat 0x28 +#define bd957x_reg_int_uvd_stat 0x29 +#define bd957x_reg_int_uvp_stat 0x2a +#define bd957x_reg_int_sys_stat 0x2b +#define bd957x_reg_int_sys_mask 0x2c +#define bd957x_reg_int_main_stat 0x30 +#define bd957x_reg_int_main_mask 0x31 + +#define bd957x_reg_wdt_conf 0x16 + +#define bd957x_reg_pow_trigger1 0x41 +#define bd957x_reg_pow_trigger2 0x42 +#define bd957x_reg_pow_trigger3 0x43 +#define bd957x_reg_pow_trigger4 0x44 +#define bd957x_reg_pow_triggerl1 0x45 +#define bd957x_reg_pow_triggers1 0x46 + +#define bd957x_regulator_en_mask 0xff +#define bd957x_regulator_dis_val 0xff + +#define bd957x_vsel_reg_mask 0xff + +#define bd957x_mask_vout1_tune 0x87 +#define bd957x_mask_vout2_tune 0x87 +#define bd957x_mask_vout3_tune 0x1f +#define bd957x_mask_vout4_tune 0x1f +#define bd957x_mask_voutl1_tune 0x87 + +#define bd957x_reg_vout1_tune 0x50 +#define bd957x_reg_vout2_tune 0x53 +#define bd957x_reg_vout3_tune 0x56 +#define bd957x_reg_vout4_tune 0x59 +#define bd957x_reg_voutl1_tune 0x5c + +#define bd957x_max_register 0x61 + +#endif diff --git a/include/linux/mfd/rohm-generic.h b/include/linux/mfd/rohm-generic.h --- a/include/linux/mfd/rohm-generic.h +++ b/include/linux/mfd/rohm-generic.h + rohm_chip_type_bd9576, + rohm_chip_type_bd9573,
Multi Function Devices (MFD)
b1b3ced389795d2671e88dd3e9e07a48dc9632fc
matti vaittinen
include
linux
mfd
mfd: bd9576: add irq support
bd9573 and bd9576 support set of "protection" interrupts for "fatal" issues. those lead to soc reset as pmic shuts the power outputs. thus there is no relevant irq handling for them.
this release includes the landlock security module, which aims to make easier to sandbox applications; support for the clang control flow integrity, which aims to abort the program upon detecting certain forms of undefined behavior; support for randomising the stack address offset in each syscall; support for concurrent tbl flushing; preparatory apple m1 support; support for incoming amd and intel graphics chips; bpf support for calling kernel functions directly; a virtio sound driver for improved sound experience on virtualized guests; io_uring support for multi shot mode and a misc cgroup for miscellaneous resources. as always, there are many other features, new drivers, improvements and fixes.
support rohm bd9576muf and bd9573muf pmics
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'security', 'networking', 'architectures arm x86 mips powerpc riscv s390 ia64 xtensa']
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'remote processors', 'clock', 'phy ("physical layer" framework)', 'various']
[]
['h', 'c']
2
147
5
--- diff --git a/drivers/mfd/rohm-bd9576.c b/drivers/mfd/rohm-bd9576.c --- a/drivers/mfd/rohm-bd9576.c +++ b/drivers/mfd/rohm-bd9576.c +enum { + bd957x_regulator_cell, + bd957x_wdt_cell, +}; + +/* + * due to the bd9576muf nasty irq behaiour we don't always populate irqs. + * these will be added to regulator resources only if irq information for the + * pmic is populated in device-tree. + */ +static const struct resource bd9576_regulator_irqs[] = { + define_res_irq_named(bd9576_int_therm, "bd9576-temp"), + define_res_irq_named(bd9576_int_ovd, "bd9576-ovd"), + define_res_irq_named(bd9576_int_uvd, "bd9576-uvd"), +}; + - { .name = "bd9573-regulator", }, - { .name = "bd9576-wdt", }, + [bd957x_regulator_cell] = { .name = "bd9573-regulator", }, + [bd957x_wdt_cell] = { .name = "bd9576-wdt", }, - { .name = "bd9576-regulator", }, - { .name = "bd9576-wdt", }, + [bd957x_regulator_cell] = { .name = "bd9576-regulator", }, + [bd957x_wdt_cell] = { .name = "bd9576-wdt", }, +static struct regmap_irq bd9576_irqs[] = { + regmap_irq_reg(bd9576_int_therm, 0, bd957x_mask_int_main_therm), + regmap_irq_reg(bd9576_int_ovp, 0, bd957x_mask_int_main_ovp), + regmap_irq_reg(bd9576_int_scp, 0, bd957x_mask_int_main_scp), + regmap_irq_reg(bd9576_int_ocp, 0, bd957x_mask_int_main_ocp), + regmap_irq_reg(bd9576_int_ovd, 0, bd957x_mask_int_main_ovd), + regmap_irq_reg(bd9576_int_uvd, 0, bd957x_mask_int_main_uvd), + regmap_irq_reg(bd9576_int_uvp, 0, bd957x_mask_int_main_uvp), + regmap_irq_reg(bd9576_int_sys, 0, bd957x_mask_int_main_sys), +}; + +static struct regmap_irq_chip bd9576_irq_chip = { + .name = "bd9576_irq", + .irqs = &bd9576_irqs[0], + .num_irqs = array_size(bd9576_irqs), + .status_base = bd957x_reg_int_main_stat, + .mask_base = bd957x_reg_int_main_mask, + .ack_base = bd957x_reg_int_main_stat, + .init_ack_masked = true, + .num_regs = 1, + .irq_reg_stride = 1, +}; + + struct irq_domain *domain; + bool usable_irqs; + usable_irqs = !!i2c->irq; + /* + * bd9573 only supports fatal irqs which we can not handle + * because soc is going to lose the power. + */ + usable_irqs = false; + /* + * bd9576 behaves badly. it kepts irq line asserted for the whole + * duration of detected hw condition (like over temperature). so we + * don't require irq to be populated. + * if irq information is not given, then we mask all irqs and do not + * provide irq resources to regulator driver - which then just omits + * the notifiers. + */ + if (usable_irqs) { + struct regmap_irq_chip_data *irq_data; + struct mfd_cell *regulators; + + regulators = &bd9576_mfd_cells[bd957x_regulator_cell]; + regulators->resources = bd9576_regulator_irqs; + regulators->num_resources = array_size(bd9576_regulator_irqs); + + ret = devm_regmap_add_irq_chip(&i2c->dev, regmap, i2c->irq, + irqf_oneshot, 0, + &bd9576_irq_chip, &irq_data); + if (ret) { + dev_err(&i2c->dev, "failed to add irq chip "); + return ret; + } + domain = regmap_irq_get_domain(irq_data); + } else { + ret = regmap_update_bits(regmap, bd957x_reg_int_main_mask, + bd957x_mask_int_all, + bd957x_mask_int_all); + if (ret) + return ret; + domain = null; + } + - num_cells, null, 0, null); + num_cells, null, 0, domain); diff --git a/include/linux/mfd/rohm-bd957x.h b/include/linux/mfd/rohm-bd957x.h --- a/include/linux/mfd/rohm-bd957x.h +++ b/include/linux/mfd/rohm-bd957x.h +/* + * the bd9576 has own irq 'blocks' for: + * - i2c/thermal, + * - over voltage protection + * - short-circuit protection + * - over current protection + * - over voltage detection + * - under voltage detection + * - under voltage protection + * - 'system interrupt'. + * + * each of the blocks have a status register giving more accurate irq source + * information - for example which of the regulators have over-voltage. + * + * on top of this, there is "main irq" status register where each bit indicates + * which of sub-blocks have active irqs. fine. that would fit regmap-irq main + * status handling. except that: + * - only some sub-irqs can be masked. + * - the irq informs us about fault-condition, not when fault state changes. + * the irq line it is kept asserted until the detected condition is acked + * and cleared in hw. this is annoying for irqs like the one informing high + * temperature because if irq is not disabled it keeps the cpu in irq + * handling loop. + * + * for now we do just use the main-irq register as source for our irq + * information and bind the regmap-irq to this. we leave fine-grained sub-irq + * register handling to handlers in sub-devices. the regulator driver shall + * read which regulators are source for problem - or if the detected error is + * regulator temperature error. the sub-drivers do also handle masking of "sub- + * irqs" if this is supported/needed. + * + * to overcome the problem with hw keeping irq asserted we do call + * disable_irq_nosync() from sub-device handler and add a delayed work to + * re-enable irq roughly 1 second later. this should keep our cpu out of + * busy-loop. + */ +#define irqs_silent_ms 1000 + +enum { + bd9576_int_therm, + bd9576_int_ovp, + bd9576_int_scp, + bd9576_int_ocp, + bd9576_int_ovd, + bd9576_int_uvd, + bd9576_int_uvp, + bd9576_int_sys, +}; + +#define uvd_irq_valid_mask 0x6f +#define ovd_irq_valid_mask 0x2f + +#define bd957x_mask_int_main_therm bit(0) +#define bd957x_mask_int_main_ovp bit(1) +#define bd957x_mask_int_main_scp bit(2) +#define bd957x_mask_int_main_ocp bit(3) +#define bd957x_mask_int_main_ovd bit(4) +#define bd957x_mask_int_main_uvd bit(5) +#define bd957x_mask_int_main_uvp bit(6) +#define bd957x_mask_int_main_sys bit(7) +#define bd957x_mask_int_all 0xff +
Multi Function Devices (MFD)
0e9692607f94ecc59aedc0ecfd2348124c743412
matti vaittinen
include
linux
mfd