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usb: typec: mux: add helpers for setting the mux state
|
adding helpers typec_switch_set() and typec_mux_set() that simply call the ->set callback function of the mux. these functions make it possible to set the mux states also from outside the class code.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
driver for intel pmc mux-agent
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['typec']
|
['h', 'c']
| 3
| 28
| 6
|
--- diff --git a/drivers/usb/typec/class.c b/drivers/usb/typec/class.c --- a/drivers/usb/typec/class.c +++ b/drivers/usb/typec/class.c - if (port->sw) { - ret = port->sw->set(port->sw, orientation); - if (ret) - return ret; - } + ret = typec_switch_set(port->sw, orientation); + if (ret) + return ret; - return port->mux ? port->mux->set(port->mux, &state) : 0; + return typec_mux_set(port->mux, &state); diff --git a/drivers/usb/typec/mux.c b/drivers/usb/typec/mux.c --- a/drivers/usb/typec/mux.c +++ b/drivers/usb/typec/mux.c +int typec_switch_set(struct typec_switch *sw, + enum typec_orientation orientation) +{ + if (is_err_or_null(sw)) + return 0; + + return sw->set(sw, orientation); +} +export_symbol_gpl(typec_switch_set); + +int typec_mux_set(struct typec_mux *mux, struct typec_mux_state *state) +{ + if (is_err_or_null(mux)) + return 0; + + return mux->set(mux, state); +} +export_symbol_gpl(typec_mux_set); + diff --git a/include/linux/usb/typec_mux.h b/include/linux/usb/typec_mux.h --- a/include/linux/usb/typec_mux.h +++ b/include/linux/usb/typec_mux.h +int typec_switch_set(struct typec_switch *sw, + enum typec_orientation orientation); + +int typec_mux_set(struct typec_mux *mux, struct typec_mux_state *state); +
|
Universal Serial Bus
|
774a9df6aeac236282dc0ec711b73865b64ef6a1
|
heikki krogerus
|
drivers
|
usb
|
typec, usb
|
usb: typec: mux: allow the mux handles to be requested with fwnode
|
introducing fwnode_typec_switch_get() and fwnode_typec_mux_get() functions that work just like typec_switch_get() and typec_mux_get() but they take struct fwnode_handle as the first parameter instead of struct device.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
driver for intel pmc mux-agent
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['typec']
|
['h', 'c']
| 2
| 26
| 14
|
--- diff --git a/drivers/usb/typec/mux.c b/drivers/usb/typec/mux.c --- a/drivers/usb/typec/mux.c +++ b/drivers/usb/typec/mux.c - * typec_switch_get - find usb type-c orientation switch - * @dev: the caller device + * fwnode_typec_switch_get - find usb type-c orientation switch + * @fwnode: the caller device node -struct typec_switch *typec_switch_get(struct device *dev) +struct typec_switch *fwnode_typec_switch_get(struct fwnode_handle *fwnode) - sw = device_connection_find_match(dev, "orientation-switch", null, + sw = fwnode_connection_find_match(fwnode, "orientation-switch", null, -export_symbol_gpl(typec_switch_get); +export_symbol_gpl(fwnode_typec_switch_get); - * typec_mux_get - find usb type-c multiplexer - * @dev: the caller device + * fwnode_typec_mux_get - find usb type-c multiplexer + * @fwnode: the caller device node -struct typec_mux *typec_mux_get(struct device *dev, - const struct typec_altmode_desc *desc) +struct typec_mux *fwnode_typec_mux_get(struct fwnode_handle *fwnode, + const struct typec_altmode_desc *desc) - mux = device_connection_find_match(dev, "mode-switch", (void *)desc, + mux = fwnode_connection_find_match(fwnode, "mode-switch", (void *)desc, -export_symbol_gpl(typec_mux_get); +export_symbol_gpl(fwnode_typec_mux_get); diff --git a/include/linux/usb/typec_mux.h b/include/linux/usb/typec_mux.h --- a/include/linux/usb/typec_mux.h +++ b/include/linux/usb/typec_mux.h +#include <linux/property.h> -struct typec_switch *typec_switch_get(struct device *dev); +struct typec_switch *fwnode_typec_switch_get(struct fwnode_handle *fwnode); +static inline struct typec_switch *typec_switch_get(struct device *dev) +{ + return fwnode_typec_switch_get(dev_fwnode(dev)); +} + -struct typec_mux * -typec_mux_get(struct device *dev, const struct typec_altmode_desc *desc); +struct typec_mux *fwnode_typec_mux_get(struct fwnode_handle *fwnode, + const struct typec_altmode_desc *desc); +static inline struct typec_mux * +typec_mux_get(struct device *dev, const struct typec_altmode_desc *desc) +{ + return fwnode_typec_mux_get(dev_fwnode(dev), desc); +} +
|
Universal Serial Bus
|
d1c6a769cdf466053ae211789f2b0671c8a72331
|
heikki krogerus
|
drivers
|
usb
|
typec, usb
|
usb: roles: leave the private driver data pointer to the drivers
|
adding usb_role_switch_get/set_drvdata() functions that the switch drivers can use for setting and getting private data pointer that is associated with the switch.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
driver for intel pmc mux-agent
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['typec']
|
['h', 'c']
| 2
| 38
| 0
|
--- diff --git a/drivers/usb/roles/class.c b/drivers/usb/roles/class.c --- a/drivers/usb/roles/class.c +++ b/drivers/usb/roles/class.c + dev_set_drvdata(&sw->dev, desc->driver_data); +/** + * usb_role_switch_set_drvdata - assign private data pointer to a switch + * @sw: usb role switch + * @data: private data pointer + */ +void usb_role_switch_set_drvdata(struct usb_role_switch *sw, void *data) +{ + dev_set_drvdata(&sw->dev, data); +} +export_symbol_gpl(usb_role_switch_set_drvdata); + +/** + * usb_role_switch_get_drvdata - get the private data pointer of a switch + * @sw: usb role switch + */ +void *usb_role_switch_get_drvdata(struct usb_role_switch *sw) +{ + return dev_get_drvdata(&sw->dev); +} +export_symbol_gpl(usb_role_switch_get_drvdata); + diff --git a/include/linux/usb/role.h b/include/linux/usb/role.h --- a/include/linux/usb/role.h +++ b/include/linux/usb/role.h + * @driver_data: private data pointer + void *driver_data; + +void usb_role_switch_set_drvdata(struct usb_role_switch *sw, void *data); +void *usb_role_switch_get_drvdata(struct usb_role_switch *sw); + +static inline void +usb_role_switch_set_drvdata(struct usb_role_switch *sw, void *data) +{ +} + +static inline void *usb_role_switch_get_drvdata(struct usb_role_switch *sw) +{ + return null; +} +
|
Universal Serial Bus
|
69af044a7700552512a147e2ce3520741b65df41
|
heikki krogerus
|
drivers
|
usb
|
roles, usb
|
usb: roles: provide the switch drivers handle to the switch in the api
|
the usb role callback functions had a parameter pointing to the parent device (struct device) of the switch. the assumption was that the switch parent is always the controller. firstly, that may not be true in every case, and secondly, it prevents us from supporting devices that supply multiple muxes.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
driver for intel pmc mux-agent
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['typec']
|
['h', 'c']
| 10
| 77
| 59
|
--- diff --git a/drivers/usb/cdns3/core.c b/drivers/usb/cdns3/core.c --- a/drivers/usb/cdns3/core.c +++ b/drivers/usb/cdns3/core.c -static enum usb_role cdns3_role_get(struct device *dev) +static enum usb_role cdns3_role_get(struct usb_role_switch *sw) - struct cdns3 *cdns = dev_get_drvdata(dev); + struct cdns3 *cdns = usb_role_switch_get_drvdata(sw); -static int cdns3_role_set(struct device *dev, enum usb_role role) +static int cdns3_role_set(struct usb_role_switch *sw, enum usb_role role) - struct cdns3 *cdns = dev_get_drvdata(dev); + struct cdns3 *cdns = usb_role_switch_get_drvdata(sw); -static const struct usb_role_switch_desc cdns3_switch_desc = { - .set = cdns3_role_set, - .get = cdns3_role_get, - .allow_userspace_control = true, -}; - + struct usb_role_switch_desc sw_desc = { }; - cdns->role_sw = usb_role_switch_register(dev, &cdns3_switch_desc); + sw_desc.set = cdns3_role_set; + sw_desc.get = cdns3_role_get; + sw_desc.allow_userspace_control = true; + sw_desc.driver_data = cdns; + + cdns->role_sw = usb_role_switch_register(dev, &sw_desc); diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c --- a/drivers/usb/chipidea/core.c +++ b/drivers/usb/chipidea/core.c -static enum usb_role ci_usb_role_switch_get(struct device *dev) +static enum usb_role ci_usb_role_switch_get(struct usb_role_switch *sw) - struct ci_hdrc *ci = dev_get_drvdata(dev); + struct ci_hdrc *ci = usb_role_switch_get_drvdata(sw); -static int ci_usb_role_switch_set(struct device *dev, enum usb_role role) +static int ci_usb_role_switch_set(struct usb_role_switch *sw, + enum usb_role role) - struct ci_hdrc *ci = dev_get_drvdata(dev); + struct ci_hdrc *ci = usb_role_switch_get_drvdata(sw); + ci_role_switch.driver_data = ci; diff --git a/drivers/usb/dwc3/dwc3-meson-g12a.c b/drivers/usb/dwc3/dwc3-meson-g12a.c --- a/drivers/usb/dwc3/dwc3-meson-g12a.c +++ b/drivers/usb/dwc3/dwc3-meson-g12a.c -static int dwc3_meson_g12a_role_set(struct device *dev, enum usb_role role) +static int dwc3_meson_g12a_role_set(struct usb_role_switch *sw, + enum usb_role role) - struct dwc3_meson_g12a *priv = dev_get_drvdata(dev); + struct dwc3_meson_g12a *priv = usb_role_switch_get_drvdata(sw); -static enum usb_role dwc3_meson_g12a_role_get(struct device *dev) +static enum usb_role dwc3_meson_g12a_role_get(struct usb_role_switch *sw) - struct dwc3_meson_g12a *priv = dev_get_drvdata(dev); + struct dwc3_meson_g12a *priv = usb_role_switch_get_drvdata(sw); + priv->switch_desc.driver_data = priv; diff --git a/drivers/usb/gadget/udc/renesas_usb3.c b/drivers/usb/gadget/udc/renesas_usb3.c --- a/drivers/usb/gadget/udc/renesas_usb3.c +++ b/drivers/usb/gadget/udc/renesas_usb3.c -static enum usb_role renesas_usb3_role_switch_get(struct device *dev) +static enum usb_role renesas_usb3_role_switch_get(struct usb_role_switch *sw) - struct renesas_usb3 *usb3 = dev_get_drvdata(dev); + struct renesas_usb3 *usb3 = usb_role_switch_get_drvdata(sw); - pm_runtime_get_sync(dev); + pm_runtime_get_sync(usb3_to_dev(usb3)); - pm_runtime_put(dev); + pm_runtime_put(usb3_to_dev(usb3)); - enum usb_role cur_role = renesas_usb3_role_switch_get(dev); + enum usb_role cur_role = renesas_usb3_role_switch_get(usb3->role_sw); - enum usb_role cur_role = renesas_usb3_role_switch_get(dev); + enum usb_role cur_role = renesas_usb3_role_switch_get(usb3->role_sw); -static int renesas_usb3_role_switch_set(struct device *dev, +static int renesas_usb3_role_switch_set(struct usb_role_switch *sw, - struct renesas_usb3 *usb3 = dev_get_drvdata(dev); + struct renesas_usb3 *usb3 = usb_role_switch_get_drvdata(sw); - pm_runtime_get_sync(dev); + pm_runtime_get_sync(usb3_to_dev(usb3)); - handle_ext_role_switch_states(dev, role); + handle_ext_role_switch_states(usb3_to_dev(usb3), role); - handle_role_switch_states(dev, role); + handle_role_switch_states(usb3_to_dev(usb3), role); - pm_runtime_put(dev); + pm_runtime_put(usb3_to_dev(usb3)); + renesas_usb3_role_switch_desc.driver_data = usb3; + diff --git a/drivers/usb/gadget/udc/tegra-xudc.c b/drivers/usb/gadget/udc/tegra-xudc.c --- a/drivers/usb/gadget/udc/tegra-xudc.c +++ b/drivers/usb/gadget/udc/tegra-xudc.c -static int tegra_xudc_usb_role_sw_set(struct device *dev, enum usb_role role) +static int tegra_xudc_usb_role_sw_set(struct usb_role_switch *sw, + enum usb_role role) - struct tegra_xudc *xudc = dev_get_drvdata(dev); + struct tegra_xudc *xudc = usb_role_switch_get_drvdata(sw); - dev_dbg(dev, "%s role is %d ", __func__, role); + dev_dbg(xudc->dev, "%s role is %d ", __func__, role); + role_sx_desc.driver_data = xudc; diff --git a/drivers/usb/mtu3/mtu3_dr.c b/drivers/usb/mtu3/mtu3_dr.c --- a/drivers/usb/mtu3/mtu3_dr.c +++ b/drivers/usb/mtu3/mtu3_dr.c -static int ssusb_role_sw_set(struct device *dev, enum usb_role role) +static int ssusb_role_sw_set(struct usb_role_switch *sw, enum usb_role role) - struct ssusb_mtk *ssusb = dev_get_drvdata(dev); + struct ssusb_mtk *ssusb = usb_role_switch_get_drvdata(sw); -static enum usb_role ssusb_role_sw_get(struct device *dev) +static enum usb_role ssusb_role_sw_get(struct usb_role_switch *sw) - struct ssusb_mtk *ssusb = dev_get_drvdata(dev); + struct ssusb_mtk *ssusb = usb_role_switch_get_drvdata(sw); + role_sx_desc.driver_data = ssusb; diff --git a/drivers/usb/musb/mediatek.c b/drivers/usb/musb/mediatek.c --- a/drivers/usb/musb/mediatek.c +++ b/drivers/usb/musb/mediatek.c -static int musb_usb_role_sx_set(struct device *dev, enum usb_role role) +static int mtk_otg_switch_set(struct mtk_glue *glue, enum usb_role role) - struct mtk_glue *glue = dev_get_drvdata(dev); -static enum usb_role musb_usb_role_sx_get(struct device *dev) +static int musb_usb_role_sx_set(struct usb_role_switch *sw, enum usb_role role) - struct mtk_glue *glue = dev_get_drvdata(dev); + return mtk_otg_switch_set(usb_role_switch_get_drvdata(sw), role); +} + +static enum usb_role musb_usb_role_sx_get(struct usb_role_switch *sw) +{ + struct mtk_glue *glue = usb_role_switch_get_drvdata(sw); + role_sx_desc.driver_data = glue; - glue->role = new_role; - musb_usb_role_sx_set(dev, glue->role); + mtk_otg_switch_set(glue, new_role); diff --git a/drivers/usb/roles/class.c b/drivers/usb/roles/class.c --- a/drivers/usb/roles/class.c +++ b/drivers/usb/roles/class.c - ret = sw->set(sw->dev.parent, role); + ret = sw->set(sw, role); - role = sw->get(sw->dev.parent); + role = sw->get(sw); diff --git a/drivers/usb/roles/intel-xhci-usb-role-switch.c b/drivers/usb/roles/intel-xhci-usb-role-switch.c --- a/drivers/usb/roles/intel-xhci-usb-role-switch.c +++ b/drivers/usb/roles/intel-xhci-usb-role-switch.c + struct device *dev; -static int intel_xhci_usb_set_role(struct device *dev, enum usb_role role) +static int intel_xhci_usb_set_role(struct usb_role_switch *sw, + enum usb_role role) - struct intel_xhci_usb_data *data = dev_get_drvdata(dev); + struct intel_xhci_usb_data *data = usb_role_switch_get_drvdata(sw); - dev_err(dev, "error could not acquire lock "); + dev_err(data->dev, "error could not acquire lock "); - pm_runtime_get_sync(dev); + pm_runtime_get_sync(data->dev); - pm_runtime_put(dev); + pm_runtime_put(data->dev); - pm_runtime_put(dev); + pm_runtime_put(data->dev); - dev_warn(dev, "timeout waiting for role-switch "); + dev_warn(data->dev, "timeout waiting for role-switch "); -static enum usb_role intel_xhci_usb_get_role(struct device *dev) +static enum usb_role intel_xhci_usb_get_role(struct usb_role_switch *sw) - struct intel_xhci_usb_data *data = dev_get_drvdata(dev); + struct intel_xhci_usb_data *data = usb_role_switch_get_drvdata(sw); - pm_runtime_get_sync(dev); + pm_runtime_get_sync(data->dev); - pm_runtime_put(dev); + pm_runtime_put(data->dev); + sw_desc.driver_data = data; + data->dev = dev; diff --git a/include/linux/usb/role.h b/include/linux/usb/role.h --- a/include/linux/usb/role.h +++ b/include/linux/usb/role.h -typedef int (*usb_role_switch_set_t)(struct device *dev, enum usb_role role); -typedef enum usb_role (*usb_role_switch_get_t)(struct device *dev); +typedef int (*usb_role_switch_set_t)(struct usb_role_switch *sw, + enum usb_role role); +typedef enum usb_role (*usb_role_switch_get_t)(struct usb_role_switch *sw);
|
Universal Serial Bus
|
bce3052f0c165685a074e50136e4d341bcd59f4a
|
heikki krogerus
|
drivers
|
usb
|
cdns3, chipidea, dwc3, gadget, mtu3, musb, roles, udc, usb
|
usb: roles: allow the role switches to be named
|
the switch devices have been named by using the name of the parent device as base for now, but if for example the parent device controls multiple muxes, that will not work.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
driver for intel pmc mux-agent
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['typec']
|
['h', 'c']
| 2
| 4
| 1
|
--- diff --git a/drivers/usb/roles/class.c b/drivers/usb/roles/class.c --- a/drivers/usb/roles/class.c +++ b/drivers/usb/roles/class.c - dev_set_name(&sw->dev, "%s-role-switch", dev_name(parent)); + dev_set_name(&sw->dev, "%s-role-switch", + desc->name ? desc->name : dev_name(parent)); diff --git a/include/linux/usb/role.h b/include/linux/usb/role.h --- a/include/linux/usb/role.h +++ b/include/linux/usb/role.h + * @name: name for the switch (optional) + const char *name;
|
Universal Serial Bus
|
e5256194cb51ced7a2f656590f1e2132235d442c
|
heikki krogerus
|
drivers
|
usb
|
roles, usb
|
device property: export fwnode_get_name()
|
this makes it possible to take advantage of the function in the device drivers.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
driver for intel pmc mux-agent
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['typec']
|
['c']
| 1
| 1
| 0
|
--- diff --git a/drivers/base/property.c b/drivers/base/property.c --- a/drivers/base/property.c +++ b/drivers/base/property.c +export_symbol_gpl(fwnode_get_name);
|
Universal Serial Bus
|
a7914d1072fb8ddeb2ec87bba1d28812483a3565
|
heikki krogerus rafael j wysocki rafael j wysocki intel com
|
drivers
|
base
| |
usb: typec: add definitions for thunderbolt 3 alternate mode
|
this adds separate header file for the thunderbolt 3 alternate mode (aka. tbt). the header supplies definitions for all the thunderbolt specific vdos (vendor defined objects) that are described in the usb type-c connector specification v2.0, as well as definition for the thunderbolt 3 standard id (sid).
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
driver for intel pmc mux-agent
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['typec']
|
['h']
| 1
| 53
| 0
|
--- diff --git a/include/linux/usb/typec_tbt.h b/include/linux/usb/typec_tbt.h --- /dev/null +++ b/include/linux/usb/typec_tbt.h +/* spdx-license-identifier: gpl-2.0 */ +#ifndef __usb_typec_tbt_h +#define __usb_typec_tbt_h + +#include <linux/usb/typec_altmode.h> + +#define usb_typec_vendor_intel 0x8087 +/* alias for convenience */ +#define usb_typec_tbt_sid usb_typec_vendor_intel + +/* connector state for thunderbolt3 */ +#define typec_tbt_mode typec_state_modal + +/** + * struct typec_thunderbolt_data - thundebolt3 alt mode specific data + * @device_mode: device discover mode vdo + * @cable_mode: cable discover mode vdo + * @enter_vdo: enter mode vdo + */ +struct typec_thunderbolt_data { + u32 device_mode; + u32 cable_mode; + u32 enter_vdo; +}; + +/* tbt3 device discover mode vdo bits */ +#define tbt_mode bit(0) +#define tbt_adapter(_vdo_) (((_vdo_) & bit(16)) >> 16) +#define tbt_adapter_legacy 0 +#define tbt_adapter_tbt3 1 +#define tbt_intel_specific_b0 bit(26) +#define tbt_vendor_specific_b0 bit(30) +#define tbt_vendor_specific_b1 bit(31) + +#define tbt_set_adapter(a) (((a) & 1) << 16) + +/* tbt3 cable discover mode vdo bits */ +#define tbt_cable_speed(_vdo_) (((_vdo_) & genmask(18, 16)) >> 16) +#define tbt_cable_usb3_gen1 1 +#define tbt_cable_usb3_passive 2 +#define tbt_cable_10_and_20gbps 3 +#define tbt_cable_rounded bit(19) +#define tbt_cable_optical bit(21) +#define tbt_cable_retimer bit(22) +#define tbt_cable_link_training bit(23) + +#define tbt_set_cable_speed(_s_) (((_s_) & genmask(2, 0)) << 16) + +/* tbt3 device enter mode vdo bits */ +#define tbt_enter_mode_cable_speed(s) tbt_set_cable_speed(s) +#define tbt_enter_mode_active_cable bit(24) + +#endif /* __usb_typec_tbt_h */
|
Universal Serial Bus
|
ca469c292edc2248f1eaaef1ecec4576192fe743
|
heikki krogerus
|
include
|
linux
|
usb
|
usb: typec: driver for intel pmc mux control
|
the intel pmc microcontroller on the latest intel platforms has a new function that allows configuration of the usb multiplexer/demultiplexer switches that are under the control of the pmc.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
driver for intel pmc mux-agent
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['typec']
|
['kconfig', 'c', 'makefile']
| 3
| 444
| 0
|
--- diff --git a/drivers/usb/typec/mux/kconfig b/drivers/usb/typec/mux/kconfig --- a/drivers/usb/typec/mux/kconfig +++ b/drivers/usb/typec/mux/kconfig +config typec_mux_intel_pmc + tristate "intel pmc mux control" + depends on intel_pmc_ipc + select usb_role_switch + help + driver for usb muxes controlled by intel pmc fw. intel pmc fw can + control the usb role switch and also the multiplexer/demultiplexer + switches used with usb type-c alternate modes. + diff --git a/drivers/usb/typec/mux/makefile b/drivers/usb/typec/mux/makefile --- a/drivers/usb/typec/mux/makefile +++ b/drivers/usb/typec/mux/makefile +obj-$(config_typec_mux_intel_pmc) += intel_pmc_mux.o diff --git a/drivers/usb/typec/mux/intel_pmc_mux.c b/drivers/usb/typec/mux/intel_pmc_mux.c --- /dev/null +++ b/drivers/usb/typec/mux/intel_pmc_mux.c +// spdx-license-identifier: gpl-2.0 +/* + * driver for intel pmc usb mux control + * + * copyright (c) 2020 intel corporation + * author: heikki krogerus <heikki.krogerus@linux.intel.com> + */ + +#include <linux/acpi.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/property.h> +#include <linux/usb/role.h> +#include <linux/usb/typec_mux.h> +#include <linux/usb/typec_dp.h> +#include <linux/usb/typec_tbt.h> + +#include <asm/intel_pmc_ipc.h> + +#define pmc_usbc_cmd 0xa7 + +/* "usage" oob message field values */ +enum { + pmc_usb_connect, + pmc_usb_disconnect, + pmc_usb_safe_mode, + pmc_usb_alt_mode, + pmc_usb_dp_hpd, +}; + +#define pmc_usb_msg_usb2_port_shift 0 +#define pmc_usb_msg_usb3_port_shift 4 +#define pmc_usb_msg_ufp_shift 4 +#define pmc_usb_msg_ori_hsl_shift 5 +#define pmc_usb_msg_ori_aux_shift 6 + +/* alt mode request */ +struct altmode_req { + u8 usage; + u8 mode_type; + u8 mode_id; + u8 reserved; + u32 mode_data; +} __packed; + +#define pmc_usb_mode_type_shift 4 + +enum { + pmc_usb_mode_type_usb, + pmc_usb_mode_type_dp, + pmc_usb_mode_type_tbt, +}; + +/* common mode data bits */ +#define pmc_usb_altmode_active_cable bit(2) + +#define pmc_usb_altmode_ori_shift 1 +#define pmc_usb_altmode_ufp_shift 3 +#define pmc_usb_altmode_ori_aux_shift 4 +#define pmc_usb_altmode_ori_hsl_shift 5 + +/* dp specific mode data bits */ +#define pmc_usb_altmode_dp_mode_shift 8 + +/* tbt specific mode data bits */ +#define pmc_usb_altmode_tbt_type bit(17) +#define pmc_usb_altmode_cable_type bit(18) +#define pmc_usb_altmode_active_link bit(20) +#define pmc_usb_altmode_force_lsr bit(23) +#define pmc_usb_altmode_cable_spd(_s_) (((_s_) & genmask(2, 0)) << 25) +#define pmc_usb_altmode_cable_usb31 1 +#define pmc_usb_altmode_cable_10gps 2 +#define pmc_usb_altmode_cable_20gps 3 +#define pmc_usb_altmode_tbt_gen(_g_) (((_g_) & genmask(1, 0)) << 28) + +/* display hpd request bits */ +#define pmc_usb_dp_hpd_irq bit(5) +#define pmc_usb_dp_hpd_lvl bit(6) + +struct pmc_usb; + +struct pmc_usb_port { + int num; + struct pmc_usb *pmc; + struct typec_mux *typec_mux; + struct typec_switch *typec_sw; + struct usb_role_switch *usb_sw; + + enum typec_orientation orientation; + enum usb_role role; + + u8 usb2_port; + u8 usb3_port; +}; + +struct pmc_usb { + u8 num_ports; + struct device *dev; + struct pmc_usb_port *port; +}; + +static int pmc_usb_command(struct pmc_usb_port *port, u8 *msg, u32 len) +{ + u8 response[4]; + + /* + * error bit will always be 0 with the usbc command. + * status can be checked from the response message. + */ + intel_pmc_ipc_command(pmc_usbc_cmd, 0, msg, len, + (void *)response, 1); + + if (response[2]) { + if (response[2] & bit(1)) + return -eio; + return -ebusy; + } + + return 0; +} + +static int +pmc_usb_mux_dp_hpd(struct pmc_usb_port *port, struct typec_mux_state *state) +{ + struct typec_displayport_data *data = state->data; + u8 msg[2] = { }; + + msg[0] = pmc_usb_dp_hpd; + msg[0] |= port->usb3_port << pmc_usb_msg_usb3_port_shift; + + msg[1] = pmc_usb_dp_hpd_irq; + + if (data->status & dp_status_hpd_state) + msg[1] |= pmc_usb_dp_hpd_lvl; + + return pmc_usb_command(port, msg, sizeof(msg)); +} + +static int +pmc_usb_mux_dp(struct pmc_usb_port *port, struct typec_mux_state *state) +{ + struct typec_displayport_data *data = state->data; + struct altmode_req req = { }; + + if (data->status & dp_status_irq_hpd) + return pmc_usb_mux_dp_hpd(port, state); + + req.usage = pmc_usb_alt_mode; + req.usage |= port->usb3_port << pmc_usb_msg_usb3_port_shift; + req.mode_type = pmc_usb_mode_type_dp << pmc_usb_mode_type_shift; + + req.mode_data = (port->orientation - 1) << pmc_usb_altmode_ori_shift; + req.mode_data |= (port->role - 1) << pmc_usb_altmode_ufp_shift; + req.mode_data |= (port->orientation - 1) << pmc_usb_altmode_ori_aux_shift; + req.mode_data |= (port->orientation - 1) << pmc_usb_altmode_ori_hsl_shift; + + req.mode_data |= (state->mode - typec_state_modal) << + pmc_usb_altmode_dp_mode_shift; + + return pmc_usb_command(port, (void *)&req, sizeof(req)); +} + +static int +pmc_usb_mux_tbt(struct pmc_usb_port *port, struct typec_mux_state *state) +{ + struct typec_thunderbolt_data *data = state->data; + u8 cable_speed = tbt_cable_speed(data->cable_mode); + struct altmode_req req = { }; + + req.usage = pmc_usb_alt_mode; + req.usage |= port->usb3_port << pmc_usb_msg_usb3_port_shift; + req.mode_type = pmc_usb_mode_type_tbt << pmc_usb_mode_type_shift; + + req.mode_data = (port->orientation - 1) << pmc_usb_altmode_ori_shift; + req.mode_data |= (port->role - 1) << pmc_usb_altmode_ufp_shift; + req.mode_data |= (port->orientation - 1) << pmc_usb_altmode_ori_aux_shift; + req.mode_data |= (port->orientation - 1) << pmc_usb_altmode_ori_hsl_shift; + + if (tbt_adapter(data->device_mode) == tbt_adapter_tbt3) + req.mode_data |= pmc_usb_altmode_tbt_type; + + if (data->cable_mode & tbt_cable_optical) + req.mode_data |= pmc_usb_altmode_cable_type; + + if (data->cable_mode & tbt_cable_link_training) + req.mode_data |= pmc_usb_altmode_active_link; + + if (data->enter_vdo & tbt_enter_mode_active_cable) + req.mode_data |= pmc_usb_altmode_active_cable; + + req.mode_data |= pmc_usb_altmode_cable_spd(cable_speed); + + return pmc_usb_command(port, (void *)&req, sizeof(req)); +} + +static int pmc_usb_mux_safe_state(struct pmc_usb_port *port) +{ + u8 msg; + + msg = pmc_usb_safe_mode; + msg |= port->usb3_port << pmc_usb_msg_usb3_port_shift; + + return pmc_usb_command(port, &msg, sizeof(msg)); +} + +static int pmc_usb_connect(struct pmc_usb_port *port) +{ + u8 msg[2]; + + msg[0] = pmc_usb_connect; + msg[0] |= port->usb3_port << pmc_usb_msg_usb3_port_shift; + + msg[1] = port->usb2_port << pmc_usb_msg_usb2_port_shift; + msg[1] |= (port->orientation - 1) << pmc_usb_msg_ori_hsl_shift; + msg[1] |= (port->orientation - 1) << pmc_usb_msg_ori_aux_shift; + + return pmc_usb_command(port, msg, sizeof(msg)); +} + +static int pmc_usb_disconnect(struct pmc_usb_port *port) +{ + u8 msg[2]; + + msg[0] = pmc_usb_disconnect; + msg[0] |= port->usb3_port << pmc_usb_msg_usb3_port_shift; + + msg[1] = port->usb2_port << pmc_usb_msg_usb2_port_shift; + + return pmc_usb_command(port, msg, sizeof(msg)); +} + +static int +pmc_usb_mux_set(struct typec_mux *mux, struct typec_mux_state *state) +{ + struct pmc_usb_port *port = typec_mux_get_drvdata(mux); + + if (!state->alt) + return 0; + + if (state->mode == typec_state_safe) + return pmc_usb_mux_safe_state(port); + + switch (state->alt->svid) { + case usb_typec_tbt_sid: + return pmc_usb_mux_tbt(port, state); + case usb_typec_dp_sid: + return pmc_usb_mux_dp(port, state); + } + + return -eopnotsupp; +} + +static int pmc_usb_set_orientation(struct typec_switch *sw, + enum typec_orientation orientation) +{ + struct pmc_usb_port *port = typec_switch_get_drvdata(sw); + + if (port->orientation == orientation) + return 0; + + port->orientation = orientation; + + if (port->role) { + if (orientation == typec_orientation_none) + return pmc_usb_disconnect(port); + else + return pmc_usb_connect(port); + } + + return 0; +} + +static int pmc_usb_set_role(struct usb_role_switch *sw, enum usb_role role) +{ + struct pmc_usb_port *port = usb_role_switch_get_drvdata(sw); + + if (port->role == role) + return 0; + + port->role = role; + + if (port->orientation) { + if (role == usb_role_none) + return pmc_usb_disconnect(port); + else + return pmc_usb_connect(port); + } + + return 0; +} + +static int pmc_usb_register_port(struct pmc_usb *pmc, int index, + struct fwnode_handle *fwnode) +{ + struct pmc_usb_port *port = &pmc->port[index]; + struct usb_role_switch_desc desc = { }; + struct typec_switch_desc sw_desc = { }; + struct typec_mux_desc mux_desc = { }; + int ret; + + ret = fwnode_property_read_u8(fwnode, "usb2-port", &port->usb2_port); + if (ret) + return ret; + + ret = fwnode_property_read_u8(fwnode, "usb3-port", &port->usb3_port); + if (ret) + return ret; + + port->num = index; + port->pmc = pmc; + + sw_desc.fwnode = fwnode; + sw_desc.drvdata = port; + sw_desc.name = fwnode_get_name(fwnode); + sw_desc.set = pmc_usb_set_orientation; + + port->typec_sw = typec_switch_register(pmc->dev, &sw_desc); + if (is_err(port->typec_sw)) + return ptr_err(port->typec_sw); + + mux_desc.fwnode = fwnode; + mux_desc.drvdata = port; + mux_desc.name = fwnode_get_name(fwnode); + mux_desc.set = pmc_usb_mux_set; + + port->typec_mux = typec_mux_register(pmc->dev, &mux_desc); + if (is_err(port->typec_mux)) { + ret = ptr_err(port->typec_mux); + goto err_unregister_switch; + } + + desc.fwnode = fwnode; + desc.driver_data = port; + desc.name = fwnode_get_name(fwnode); + desc.set = pmc_usb_set_role; + + port->usb_sw = usb_role_switch_register(pmc->dev, &desc); + if (is_err(port->usb_sw)) { + ret = ptr_err(port->usb_sw); + goto err_unregister_mux; + } + + return 0; + +err_unregister_mux: + typec_mux_unregister(port->typec_mux); + +err_unregister_switch: + typec_switch_unregister(port->typec_sw); + + return ret; +} + +static int pmc_usb_probe(struct platform_device *pdev) +{ + struct fwnode_handle *fwnode = null; + struct pmc_usb *pmc; + int i = 0; + int ret; + + pmc = devm_kzalloc(&pdev->dev, sizeof(*pmc), gfp_kernel); + if (!pmc) + return -enomem; + + device_for_each_child_node(&pdev->dev, fwnode) + pmc->num_ports++; + + pmc->port = devm_kcalloc(&pdev->dev, pmc->num_ports, + sizeof(struct pmc_usb_port), gfp_kernel); + if (!pmc->port) + return -enomem; + + pmc->dev = &pdev->dev; + + /* + * for every physical usb connector (usb2 and usb3 combo) there is a + * child acpi device node under the pmc mux acpi device object. + */ + for (i = 0; i < pmc->num_ports; i++) { + fwnode = device_get_next_child_node(pmc->dev, fwnode); + if (!fwnode) + break; + + ret = pmc_usb_register_port(pmc, i, fwnode); + if (ret) + goto err_remove_ports; + } + + platform_set_drvdata(pdev, pmc); + + return 0; + +err_remove_ports: + for (i = 0; i < pmc->num_ports; i++) { + typec_switch_unregister(pmc->port[i].typec_sw); + typec_mux_unregister(pmc->port[i].typec_mux); + } + + return ret; +} + +static int pmc_usb_remove(struct platform_device *pdev) +{ + struct pmc_usb *pmc = platform_get_drvdata(pdev); + int i; + + for (i = 0; i < pmc->num_ports; i++) { + typec_switch_unregister(pmc->port[i].typec_sw); + typec_mux_unregister(pmc->port[i].typec_mux); + } + + return 0; +} + +static const struct acpi_device_id pmc_usb_acpi_ids[] = { + { "intc105c", }, + { } +}; +module_device_table(acpi, pmc_usb_acpi_ids); + +static struct platform_driver pmc_usb_driver = { + .driver = { + .name = "intel_pmc_usb", + .acpi_match_table = acpi_ptr(pmc_usb_acpi_ids), + }, + .probe = pmc_usb_probe, + .remove = pmc_usb_remove, +}; + +module_platform_driver(pmc_usb_driver); + +module_author("heikki krogerus <heikki.krogerus@linux.intel.com>"); +module_license("gpl v2"); +module_description("intel pmc usb mux control");
|
Universal Serial Bus
|
6701adfa9693bd20b89f2cce57754ced2c18ed3b
|
heikki krogerus
|
drivers
|
usb
|
mux, typec
|
usb: host: xhci-tegra: tegra186/tegra194 lpm
|
tegra186 and tegra194 xhc supports usb 3.0 lpm. this commit enables xhci_lpm_support quirk for tegra186 and tegra194.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
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tegra186/tegra194 lpm
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['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['xhci-tegra']
|
['c']
| 1
| 7
| 0
|
--- diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c + bool lpm_support; + .lpm_support = true, + .lpm_support = true, + struct tegra_xusb *tegra = dev_get_drvdata(dev); + + if (tegra && tegra->soc->lpm_support) + xhci->quirks |= xhci_lpm_support;
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Universal Serial Bus
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cbb23d5572f0186f193b1af65a7994f2d40b1d43
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jc kuo thierry reding treding nvidia com
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drivers
|
usb
|
host
|
spi: add generic spi multiplexer
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add a spi device driver that sits in-band and provides a spi controller which supports chip selects via a mux-control. this enables extra spi devices to be connected with limited native chip selects.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add support for spi bus multiplexing
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
[]
|
['kconfig', 'c', 'makefile']
| 3
| 199
| 0
|
--- diff --git a/drivers/spi/kconfig b/drivers/spi/kconfig --- a/drivers/spi/kconfig +++ b/drivers/spi/kconfig +comment "spi multiplexer support" + +config spi_mux + tristate "spi multiplexer support" + select multiplexer + help + this adds support for spi multiplexers. each spi mux will be + accessible as a spi controller, the devices behind the mux will appear + to be chip selects on this controller. it is still necessary to + select one or more specific mux-controller drivers. + diff --git a/drivers/spi/makefile b/drivers/spi/makefile --- a/drivers/spi/makefile +++ b/drivers/spi/makefile +obj-$(config_spi_mux) += spi-mux.o diff --git a/drivers/spi/spi-mux.c b/drivers/spi/spi-mux.c --- /dev/null +++ b/drivers/spi/spi-mux.c +// spdx-license-identifier: gpl-2.0 +// +// general purpose spi multiplexer + +#include <linux/err.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/mux/consumer.h> +#include <linux/slab.h> +#include <linux/spi/spi.h> + +#define spi_mux_no_cs ((unsigned int)-1) + +/** + * doc: driver description + * + * this driver supports a mux on an spi bus. this can be useful when you need + * more chip selects than the hardware peripherals support, or than are + * available in a particular board setup. + * + * the driver will create an additional spi controller. devices added under the + * mux will be handled as 'chip selects' on this controller. + */ + +/** + * struct spi_mux_priv - the basic spi_mux structure + * @spi: pointer to the device struct attached to the parent + * spi controller + * @current_cs: the current chip select set in the mux + * @child_msg_complete: the mux replaces the complete callback in the child's + * message to its own callback; this field is used by the + * driver to store the child's callback during a transfer + * @child_msg_context: used to store the child's context to the callback + * @child_msg_dev: used to store the spi_device pointer to the child + * @mux: mux_control structure used to provide chip selects for + * downstream spi devices + */ +struct spi_mux_priv { + struct spi_device *spi; + unsigned int current_cs; + + void (*child_msg_complete)(void *context); + void *child_msg_context; + struct spi_device *child_msg_dev; + struct mux_control *mux; +}; + +/* should not get called when the parent controller is doing a transfer */ +static int spi_mux_select(struct spi_device *spi) +{ + struct spi_mux_priv *priv = spi_controller_get_devdata(spi->controller); + int ret; + + if (priv->current_cs == spi->chip_select) + return 0; + + dev_dbg(&priv->spi->dev, "setting up the mux for cs %d ", + spi->chip_select); + + /* copy the child device's settings except for the cs */ + priv->spi->max_speed_hz = spi->max_speed_hz; + priv->spi->mode = spi->mode; + priv->spi->bits_per_word = spi->bits_per_word; + + ret = mux_control_select(priv->mux, spi->chip_select); + if (ret) + return ret; + + priv->current_cs = spi->chip_select; + + return 0; +} + +static int spi_mux_setup(struct spi_device *spi) +{ + struct spi_mux_priv *priv = spi_controller_get_devdata(spi->controller); + + /* + * can be called multiple times, won't do a valid setup now but we will + * change the settings when we do a transfer (necessary because we + * can't predict from which device it will be anyway) + */ + return spi_setup(priv->spi); +} + +static void spi_mux_complete_cb(void *context) +{ + struct spi_mux_priv *priv = (struct spi_mux_priv *)context; + struct spi_controller *ctlr = spi_get_drvdata(priv->spi); + struct spi_message *m = ctlr->cur_msg; + + m->complete = priv->child_msg_complete; + m->context = priv->child_msg_context; + m->spi = priv->child_msg_dev; + spi_finalize_current_message(ctlr); + mux_control_deselect(priv->mux); +} + +static int spi_mux_transfer_one_message(struct spi_controller *ctlr, + struct spi_message *m) +{ + struct spi_mux_priv *priv = spi_controller_get_devdata(ctlr); + struct spi_device *spi = m->spi; + int ret; + + ret = spi_mux_select(spi); + if (ret) + return ret; + + /* + * replace the complete callback, context and spi_device with our own + * pointers. save originals + */ + priv->child_msg_complete = m->complete; + priv->child_msg_context = m->context; + priv->child_msg_dev = m->spi; + + m->complete = spi_mux_complete_cb; + m->context = priv; + m->spi = priv->spi; + + /* do the transfer */ + return spi_async(priv->spi, m); +} + +static int spi_mux_probe(struct spi_device *spi) +{ + struct spi_controller *ctlr; + struct spi_mux_priv *priv; + int ret; + + ctlr = spi_alloc_master(&spi->dev, sizeof(*priv)); + if (!ctlr) + return -enomem; + + spi_set_drvdata(spi, ctlr); + priv = spi_controller_get_devdata(ctlr); + priv->spi = spi; + + priv->mux = devm_mux_control_get(&spi->dev, null); + if (is_err(priv->mux)) { + ret = ptr_err(priv->mux); + if (ret != -eprobe_defer) + dev_err(&spi->dev, "failed to get control-mux "); + goto err_put_ctlr; + } + + priv->current_cs = spi_mux_no_cs; + + /* supported modes are the same as our parent's */ + ctlr->mode_bits = spi->controller->mode_bits; + ctlr->flags = spi->controller->flags; + ctlr->transfer_one_message = spi_mux_transfer_one_message; + ctlr->setup = spi_mux_setup; + ctlr->num_chipselect = mux_control_states(priv->mux); + ctlr->bus_num = -1; + ctlr->dev.of_node = spi->dev.of_node; + + ret = devm_spi_register_controller(&spi->dev, ctlr); + if (ret) + goto err_put_ctlr; + + return 0; + +err_put_ctlr: + spi_controller_put(ctlr); + + return ret; +} + +static const struct of_device_id spi_mux_of_match[] = { + { .compatible = "spi-mux" }, + { } +}; + +static struct spi_driver spi_mux_driver = { + .probe = spi_mux_probe, + .driver = { + .name = "spi-mux", + .of_match_table = spi_mux_of_match, + }, +}; + +module_spi_driver(spi_mux_driver); + +module_description("spi multiplexer"); +module_license("gpl");
|
Serial Peripheral Interface (SPI)
|
e9e40543ad5b38b848879768359fd13650529961
|
chris packham andy shevchenko andy shevchenko gmail com
|
drivers
|
spi
| |
dt-bindings: spi: document binding for generic spi multiplexer
|
add binding documentation for the spi-mux driver. this allows a generic multiplexer to be used to provide access to multiple spi devices.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add support for spi bus multiplexing
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
[]
|
['yaml']
| 1
| 89
| 0
|
--- diff --git a/documentation/devicetree/bindings/spi/spi-mux.yaml b/documentation/devicetree/bindings/spi/spi-mux.yaml --- /dev/null +++ b/documentation/devicetree/bindings/spi/spi-mux.yaml +# spdx-license-identifier: (gpl-2.0 or bsd-2-clause) +%yaml 1.2 +--- +$id: http://devicetree.org/schemas/spi/spi-mux.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: generic spi multiplexer + +description: | + this binding describes a spi bus multiplexer to route the spi chip select + signals. this can be used when you need more devices than the spi controller + has chip selects available. an example setup is shown in ascii art; the actual + setting of the multiplexer to a channel needs to be done by a specific spi mux + driver. + + mosi /--------------------------------+--------+--------+--------\ + miso |/------------------------------+|-------+|-------+|-------\| + scl ||/----------------------------+||------+||------+||------\|| + ||| ||| ||| ||| ||| + +------------+ ||| ||| ||| ||| + | soc ||| | +-+++-+ +-+++-+ +-+++-+ +-+++-+ + | ||| | | dev | | dev | | dev | | dev | + | +--+++-+ | cs-x +------+\ +--+--+ +--+--+ +--+--+ +--+--+ + | | spi +-|-------+ mux |\ cs-0 | | | | + | +------+ | +--+---+\\-------/ cs-1 | | | + | | | \\----------------/ cs-2 | | + | +------+ | | \-------------------------/ cs-3 | + | | ? +-|----------/ \----------------------------------/ + | +------+ | + +------------+ + +allof: + - $ref: "/schemas/spi/spi-controller.yaml#" + +maintainers: + - chris packham <chris.packham@alliedtelesis.co.nz> + +properties: + compatible: + const: spi-mux + + mux-controls: + maxitems: 1 + +required: + - compatible + - reg + - spi-max-frequency + - mux-controls + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + mux: mux-controller { + compatible = "gpio-mux"; + #mux-control-cells = <0>; + + mux-gpios = <&gpio0 3 gpio_active_high>; + }; + + spi { + #address-cells = <1>; + #size-cells = <0>; + spi@0 { + compatible = "spi-mux"; + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <100000000>; + + mux-controls = <&mux>; + + spi-flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <40000000>; + }; + + spi-device@1 { + compatible = "lineartechnology,ltc2488"; + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <10000000>; + }; + }; + };
|
Serial Peripheral Interface (SPI)
|
d548ed71cb8862c96a1a8d17861bb5dabd1e2299
|
chris packham rob herring robh kernel org
|
documentation
|
devicetree
|
bindings, spi
|
spi: add fsi-attached spi controller driver
|
there exists a set of spi controllers on some power processors that may be accessed through the fsi bus. add a driver to traverse the fsi cfam engine that can access and drive the spi controllers. this driver would typically be used by a baseboard management controller (bmc).
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add fsi-attached spi controller driver
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
[]
|
['kconfig', 'maintainers', 'c', 'makefile']
| 4
| 573
| 0
|
--- diff --git a/maintainers b/maintainers --- a/maintainers +++ b/maintainers +fsi-attached spi driver +m: eddie james <eajames@linux.ibm.com> +l: linux-spi@vger.kernel.org +s: maintained +f: drivers/spi/spi-fsi.c +f: documentation/devicetree/bindings/fsi/ibm,fsi2spi.yaml + diff --git a/drivers/spi/kconfig b/drivers/spi/kconfig --- a/drivers/spi/kconfig +++ b/drivers/spi/kconfig +config spi_fsi + tristate "fsi spi driver" + depends on fsi + help + this enables support for the driver for fsi bus attached spi + controllers. + diff --git a/drivers/spi/makefile b/drivers/spi/makefile --- a/drivers/spi/makefile +++ b/drivers/spi/makefile +obj-$(config_spi_fsi) += spi-fsi.o diff --git a/drivers/spi/spi-fsi.c b/drivers/spi/spi-fsi.c --- /dev/null +++ b/drivers/spi/spi-fsi.c +// spdx-license-identifier: gpl-2.0-or-later +// copyright (c) ibm corporation 2020 + +#include <linux/bitfield.h> +#include <linux/bits.h> +#include <linux/fsi.h> +#include <linux/jiffies.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/spi/spi.h> + +#define fsi_engid_spi 0x23 +#define fsi_mbox_root_ctrl_8 0x2860 + +#define fsi2spi_data0 0x00 +#define fsi2spi_data1 0x04 +#define fsi2spi_cmd 0x08 +#define fsi2spi_cmd_write bit(31) +#define fsi2spi_reset 0x18 +#define fsi2spi_status 0x1c +#define fsi2spi_status_any_error bit(31) +#define fsi2spi_irq 0x20 + +#define spi_fsi_base 0x70000 +#define spi_fsi_init_timeout_ms 1000 +#define spi_fsi_max_transfer_size 2048 + +#define spi_fsi_error 0x0 +#define spi_fsi_counter_cfg 0x1 +#define spi_fsi_counter_cfg_loops(x) (((u64)(x) & 0xffull) << 32) +#define spi_fsi_cfg1 0x2 +#define spi_fsi_clock_cfg 0x3 +#define spi_fsi_clock_cfg_mm_enable bit_ull(32) +#define spi_fsi_clock_cfg_ecc_disable (bit_ull(35) | bit_ull(33)) +#define spi_fsi_clock_cfg_reset1 (bit_ull(36) | bit_ull(38)) +#define spi_fsi_clock_cfg_reset2 (bit_ull(37) | bit_ull(39)) +#define spi_fsi_clock_cfg_mode (bit_ull(41) | bit_ull(42)) +#define spi_fsi_clock_cfg_sck_recv_del genmask_ull(51, 44) +#define spi_fsi_clock_cfg_sck_no_del bit_ull(51) +#define spi_fsi_clock_cfg_sck_div genmask_ull(63, 52) +#define spi_fsi_mmap 0x4 +#define spi_fsi_data_tx 0x5 +#define spi_fsi_data_rx 0x6 +#define spi_fsi_sequence 0x7 +#define spi_fsi_sequence_stop 0x00 +#define spi_fsi_sequence_sel_slave(x) (0x10 | ((x) & 0xf)) +#define spi_fsi_sequence_shift_out(x) (0x30 | ((x) & 0xf)) +#define spi_fsi_sequence_shift_in(x) (0x40 | ((x) & 0xf)) +#define spi_fsi_sequence_copy_data_tx 0xc0 +#define spi_fsi_sequence_branch(x) (0xe0 | ((x) & 0xf)) +#define spi_fsi_status 0x8 +#define spi_fsi_status_error \ + (genmask_ull(31, 21) | genmask_ull(15, 12)) +#define spi_fsi_status_seq_state genmask_ull(55, 48) +#define spi_fsi_status_seq_state_idle bit_ull(48) +#define spi_fsi_status_tdr_underrun bit_ull(57) +#define spi_fsi_status_tdr_overrun bit_ull(58) +#define spi_fsi_status_tdr_full bit_ull(59) +#define spi_fsi_status_rdr_underrun bit_ull(61) +#define spi_fsi_status_rdr_overrun bit_ull(62) +#define spi_fsi_status_rdr_full bit_ull(63) +#define spi_fsi_status_any_error \ + (spi_fsi_status_error | spi_fsi_status_tdr_underrun | \ + spi_fsi_status_tdr_overrun | spi_fsi_status_rdr_underrun | \ + spi_fsi_status_rdr_overrun) +#define spi_fsi_port_ctrl 0x9 + +struct fsi_spi { + struct device *dev; /* spi controller device */ + struct fsi_device *fsi; /* fsi2spi cfam engine device */ + u32 base; +}; + +struct fsi_spi_sequence { + int bit; + u64 data; +}; + +static int fsi_spi_check_status(struct fsi_spi *ctx) +{ + int rc; + u32 sts; + __be32 sts_be; + + rc = fsi_device_read(ctx->fsi, fsi2spi_status, &sts_be, + sizeof(sts_be)); + if (rc) + return rc; + + sts = be32_to_cpu(sts_be); + if (sts & fsi2spi_status_any_error) { + dev_err(ctx->dev, "error with fsi2spi interface: %08x. ", sts); + return -eio; + } + + return 0; +} + +static int fsi_spi_read_reg(struct fsi_spi *ctx, u32 offset, u64 *value) +{ + int rc; + __be32 cmd_be; + __be32 data_be; + u32 cmd = offset + ctx->base; + + *value = 0ull; + + if (cmd & fsi2spi_cmd_write) + return -einval; + + cmd_be = cpu_to_be32(cmd); + rc = fsi_device_write(ctx->fsi, fsi2spi_cmd, &cmd_be, sizeof(cmd_be)); + if (rc) + return rc; + + rc = fsi_spi_check_status(ctx); + if (rc) + return rc; + + rc = fsi_device_read(ctx->fsi, fsi2spi_data0, &data_be, + sizeof(data_be)); + if (rc) + return rc; + + *value |= (u64)be32_to_cpu(data_be) << 32; + + rc = fsi_device_read(ctx->fsi, fsi2spi_data1, &data_be, + sizeof(data_be)); + if (rc) + return rc; + + *value |= (u64)be32_to_cpu(data_be); + dev_dbg(ctx->dev, "read %02x[%016llx]. ", offset, *value); + + return 0; +} + +static int fsi_spi_write_reg(struct fsi_spi *ctx, u32 offset, u64 value) +{ + int rc; + __be32 cmd_be; + __be32 data_be; + u32 cmd = offset + ctx->base; + + if (cmd & fsi2spi_cmd_write) + return -einval; + + dev_dbg(ctx->dev, "write %02x[%016llx]. ", offset, value); + + data_be = cpu_to_be32(upper_32_bits(value)); + rc = fsi_device_write(ctx->fsi, fsi2spi_data0, &data_be, + sizeof(data_be)); + if (rc) + return rc; + + data_be = cpu_to_be32(lower_32_bits(value)); + rc = fsi_device_write(ctx->fsi, fsi2spi_data1, &data_be, + sizeof(data_be)); + if (rc) + return rc; + + cmd_be = cpu_to_be32(cmd | fsi2spi_cmd_write); + rc = fsi_device_write(ctx->fsi, fsi2spi_cmd, &cmd_be, sizeof(cmd_be)); + if (rc) + return rc; + + return fsi_spi_check_status(ctx); +} + +static int fsi_spi_data_in(u64 in, u8 *rx, int len) +{ + int i; + int num_bytes = min(len, 8); + + for (i = 0; i < num_bytes; ++i) + rx[i] = (u8)(in >> (8 * ((num_bytes - 1) - i))); + + return num_bytes; +} + +static int fsi_spi_data_out(u64 *out, const u8 *tx, int len) +{ + int i; + int num_bytes = min(len, 8); + u8 *out_bytes = (u8 *)out; + + /* unused bytes of the tx data should be 0. */ + *out = 0ull; + + for (i = 0; i < num_bytes; ++i) + out_bytes[8 - (i + 1)] = tx[i]; + + return num_bytes; +} + +static int fsi_spi_reset(struct fsi_spi *ctx) +{ + int rc; + + dev_dbg(ctx->dev, "resetting spi controller. "); + + rc = fsi_spi_write_reg(ctx, spi_fsi_clock_cfg, + spi_fsi_clock_cfg_reset1); + if (rc) + return rc; + + return fsi_spi_write_reg(ctx, spi_fsi_clock_cfg, + spi_fsi_clock_cfg_reset2); +} + +static int fsi_spi_sequence_add(struct fsi_spi_sequence *seq, u8 val) +{ + /* + * add the next byte of instruction to the 8-byte sequence register. + * then decrement the counter so that the next instruction will go in + * the right place. return the number of "slots" left in the sequence + * register. + */ + seq->data |= (u64)val << seq->bit; + seq->bit -= 8; + + return ((64 - seq->bit) / 8) - 2; +} + +static void fsi_spi_sequence_init(struct fsi_spi_sequence *seq) +{ + seq->bit = 56; + seq->data = 0ull; +} + +static int fsi_spi_sequence_transfer(struct fsi_spi *ctx, + struct fsi_spi_sequence *seq, + struct spi_transfer *transfer) +{ + int loops; + int idx; + int rc; + u8 len = min(transfer->len, 8u); + u8 rem = transfer->len % len; + + loops = transfer->len / len; + + if (transfer->tx_buf) { + idx = fsi_spi_sequence_add(seq, + spi_fsi_sequence_shift_out(len)); + if (rem) + rem = spi_fsi_sequence_shift_out(rem); + } else if (transfer->rx_buf) { + idx = fsi_spi_sequence_add(seq, + spi_fsi_sequence_shift_in(len)); + if (rem) + rem = spi_fsi_sequence_shift_in(rem); + } else { + return -einval; + } + + if (loops > 1) { + fsi_spi_sequence_add(seq, spi_fsi_sequence_branch(idx)); + + if (rem) + fsi_spi_sequence_add(seq, rem); + + rc = fsi_spi_write_reg(ctx, spi_fsi_counter_cfg, + spi_fsi_counter_cfg_loops(loops - 1)); + if (rc) + return rc; + } + + return 0; +} + +static int fsi_spi_transfer_data(struct fsi_spi *ctx, + struct spi_transfer *transfer) +{ + int rc = 0; + u64 status = 0ull; + + if (transfer->tx_buf) { + int nb; + int sent = 0; + u64 out = 0ull; + const u8 *tx = transfer->tx_buf; + + while (transfer->len > sent) { + nb = fsi_spi_data_out(&out, &tx[sent], + (int)transfer->len - sent); + + rc = fsi_spi_write_reg(ctx, spi_fsi_data_tx, out); + if (rc) + return rc; + + do { + rc = fsi_spi_read_reg(ctx, spi_fsi_status, + &status); + if (rc) + return rc; + + if (status & spi_fsi_status_any_error) { + rc = fsi_spi_reset(ctx); + if (rc) + return rc; + + return -eremoteio; + } + } while (status & spi_fsi_status_tdr_full); + + sent += nb; + } + } else if (transfer->rx_buf) { + int recv = 0; + u64 in = 0ull; + u8 *rx = transfer->rx_buf; + + while (transfer->len > recv) { + do { + rc = fsi_spi_read_reg(ctx, spi_fsi_status, + &status); + if (rc) + return rc; + + if (status & spi_fsi_status_any_error) { + rc = fsi_spi_reset(ctx); + if (rc) + return rc; + + return -eremoteio; + } + } while (!(status & spi_fsi_status_rdr_full)); + + rc = fsi_spi_read_reg(ctx, spi_fsi_data_rx, &in); + if (rc) + return rc; + + recv += fsi_spi_data_in(in, &rx[recv], + (int)transfer->len - recv); + } + } + + return 0; +} + +static int fsi_spi_transfer_init(struct fsi_spi *ctx) +{ + int rc; + bool reset = false; + unsigned long end; + u64 seq_state; + u64 clock_cfg = 0ull; + u64 status = 0ull; + u64 wanted_clock_cfg = spi_fsi_clock_cfg_ecc_disable | + spi_fsi_clock_cfg_sck_no_del | + field_prep(spi_fsi_clock_cfg_sck_div, 4); + + end = jiffies + msecs_to_jiffies(spi_fsi_init_timeout_ms); + do { + if (time_after(jiffies, end)) + return -etimedout; + + rc = fsi_spi_read_reg(ctx, spi_fsi_status, &status); + if (rc) + return rc; + + seq_state = status & spi_fsi_status_seq_state; + + if (status & (spi_fsi_status_any_error | + spi_fsi_status_tdr_full | + spi_fsi_status_rdr_full)) { + if (reset) + return -eio; + + rc = fsi_spi_reset(ctx); + if (rc) + return rc; + + reset = true; + continue; + } + } while (seq_state && (seq_state != spi_fsi_status_seq_state_idle)); + + rc = fsi_spi_read_reg(ctx, spi_fsi_clock_cfg, &clock_cfg); + if (rc) + return rc; + + if ((clock_cfg & (spi_fsi_clock_cfg_mm_enable | + spi_fsi_clock_cfg_ecc_disable | + spi_fsi_clock_cfg_mode | + spi_fsi_clock_cfg_sck_recv_del | + spi_fsi_clock_cfg_sck_div)) != wanted_clock_cfg) + rc = fsi_spi_write_reg(ctx, spi_fsi_clock_cfg, + wanted_clock_cfg); + + return rc; +} + +static int fsi_spi_transfer_one_message(struct spi_controller *ctlr, + struct spi_message *mesg) +{ + int rc = 0; + u8 seq_slave = spi_fsi_sequence_sel_slave(mesg->spi->chip_select + 1); + struct spi_transfer *transfer; + struct fsi_spi *ctx = spi_controller_get_devdata(ctlr); + + list_for_each_entry(transfer, &mesg->transfers, transfer_list) { + struct fsi_spi_sequence seq; + struct spi_transfer *next = null; + + /* sequencer must do shift out (tx) first. */ + if (!transfer->tx_buf || + transfer->len > spi_fsi_max_transfer_size) { + rc = -einval; + goto error; + } + + dev_dbg(ctx->dev, "start tx of %d bytes. ", transfer->len); + + rc = fsi_spi_transfer_init(ctx); + if (rc < 0) + goto error; + + fsi_spi_sequence_init(&seq); + fsi_spi_sequence_add(&seq, seq_slave); + + rc = fsi_spi_sequence_transfer(ctx, &seq, transfer); + if (rc) + goto error; + + if (!list_is_last(&transfer->transfer_list, + &mesg->transfers)) { + next = list_next_entry(transfer, transfer_list); + + /* sequencer can only do shift in (rx) after tx. */ + if (next->rx_buf) { + if (next->len > spi_fsi_max_transfer_size) { + rc = -einval; + goto error; + } + + dev_dbg(ctx->dev, "sequence rx of %d bytes. ", + next->len); + + rc = fsi_spi_sequence_transfer(ctx, &seq, + next); + if (rc) + goto error; + } else { + next = null; + } + } + + fsi_spi_sequence_add(&seq, spi_fsi_sequence_sel_slave(0)); + + rc = fsi_spi_write_reg(ctx, spi_fsi_sequence, seq.data); + if (rc) + goto error; + + rc = fsi_spi_transfer_data(ctx, transfer); + if (rc) + goto error; + + if (next) { + rc = fsi_spi_transfer_data(ctx, next); + if (rc) + goto error; + + transfer = next; + } + } + +error: + mesg->status = rc; + spi_finalize_current_message(ctlr); + + return rc; +} + +static size_t fsi_spi_max_transfer_size(struct spi_device *spi) +{ + return spi_fsi_max_transfer_size; +} + +static int fsi_spi_probe(struct device *dev) +{ + int rc; + u32 root_ctrl_8; + struct device_node *np; + int num_controllers_registered = 0; + struct fsi_device *fsi = to_fsi_dev(dev); + + /* + * check the spi mux before attempting to probe. if the mux isn't set + * then the spi controllers can't access their slave devices. + */ + rc = fsi_slave_read(fsi->slave, fsi_mbox_root_ctrl_8, &root_ctrl_8, + sizeof(root_ctrl_8)); + if (rc) + return rc; + + if (!root_ctrl_8) { + dev_dbg(dev, "spi mux not set, aborting probe. "); + return -enodev; + } + + for_each_available_child_of_node(dev->of_node, np) { + u32 base; + struct fsi_spi *ctx; + struct spi_controller *ctlr; + + if (of_property_read_u32(np, "reg", &base)) + continue; + + ctlr = spi_alloc_master(dev, sizeof(*ctx)); + if (!ctlr) + break; + + ctlr->dev.of_node = np; + ctlr->num_chipselect = of_get_available_child_count(np) ?: 1; + ctlr->flags = spi_controller_half_duplex; + ctlr->max_transfer_size = fsi_spi_max_transfer_size; + ctlr->transfer_one_message = fsi_spi_transfer_one_message; + + ctx = spi_controller_get_devdata(ctlr); + ctx->dev = &ctlr->dev; + ctx->fsi = fsi; + ctx->base = base + spi_fsi_base; + + rc = devm_spi_register_controller(dev, ctlr); + if (rc) + spi_controller_put(ctlr); + else + num_controllers_registered++; + } + + if (!num_controllers_registered) + return -enodev; + + return 0; +} + +static const struct fsi_device_id fsi_spi_ids[] = { + { fsi_engid_spi, fsi_version_any }, + { } +}; +module_device_table(fsi, fsi_spi_ids); + +static struct fsi_driver fsi_spi_driver = { + .id_table = fsi_spi_ids, + .drv = { + .name = "spi-fsi", + .bus = &fsi_bus_type, + .probe = fsi_spi_probe, + }, +}; +module_fsi_driver(fsi_spi_driver); + +module_author("eddie james <eajames@linux.ibm.com>"); +module_description("fsi attached spi controller"); +module_license("gpl");
|
Serial Peripheral Interface (SPI)
|
bbb6b2f9865b3ed23eb457131b9ea541a3173a66
|
eddie james
|
drivers
|
spi
| |
spi: add driver for ar934x spi controller
|
this patch adds driver for spi controller found in qualcomm atheros ar934x/qca95xx socs. this controller is a superset of the already supported qca,ar7100-spi. besides the bit-bang mode in spi-ath79.c, this new controller added a new "shift register" mode, allowing faster spi operations.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add driver for ar934x spi controller
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
[]
|
['kconfig', 'c', 'makefile']
| 3
| 243
| 0
|
--- diff --git a/drivers/spi/kconfig b/drivers/spi/kconfig --- a/drivers/spi/kconfig +++ b/drivers/spi/kconfig +config spi_ar934x + tristate "qualcomm atheros ar934x/qca95xx spi controller driver" + depends on ath79 || compile_test + help + this enables support for the spi controller present on the + qualcomm atheros ar934x/qca95xx socs. + diff --git a/drivers/spi/makefile b/drivers/spi/makefile --- a/drivers/spi/makefile +++ b/drivers/spi/makefile +obj-$(config_spi_ar934x) += spi-ar934x.o diff --git a/drivers/spi/spi-ar934x.c b/drivers/spi/spi-ar934x.c --- /dev/null +++ b/drivers/spi/spi-ar934x.c +// spdx-license-identifier: gpl-2.0 +// +// spi controller driver for qualcomm atheros ar934x/qca95xx socs +// +// copyright (c) 2020 chuanhong guo <gch981213@gmail.com> +// +// based on spi-mt7621.c: +// copyright (c) 2011 sergiy <piratfm@gmail.com> +// copyright (c) 2011-2013 gabor juhos <juhosg@openwrt.org> +// copyright (c) 2014-2015 felix fietkau <nbd@nbd.name> + +#include <linux/clk.h> +#include <linux/io.h> +#include <linux/iopoll.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/of_device.h> +#include <linux/spi/spi.h> + +#define driver_name "spi-ar934x" + +#define ar934x_spi_reg_fs 0x00 +#define ar934x_spi_enable bit(0) + +#define ar934x_spi_reg_ioc 0x08 +#define ar934x_spi_ioc_initval 0x70000 + +#define ar934x_spi_reg_ctrl 0x04 +#define ar934x_spi_clk_mask genmask(5, 0) + +#define ar934x_spi_dataout 0x10 + +#define ar934x_spi_reg_shift_ctrl 0x14 +#define ar934x_spi_shift_en bit(31) +#define ar934x_spi_shift_cs(n) bit(28 + (n)) +#define ar934x_spi_shift_term 26 +#define ar934x_spi_shift_val(cs, term, count) \ + (ar934x_spi_shift_en | ar934x_spi_shift_cs(cs) | \ + (term) << ar934x_spi_shift_term | (count)) + +#define ar934x_spi_datain 0x18 + +struct ar934x_spi { + struct spi_controller *ctlr; + void __iomem *base; + struct clk *clk; + unsigned int clk_freq; +}; + +static inline int ar934x_spi_clk_div(struct ar934x_spi *sp, unsigned int freq) +{ + int div = div_round_up(sp->clk_freq, freq * 2) - 1; + + if (div < 0) + return 0; + else if (div > ar934x_spi_clk_mask) + return -einval; + else + return div; +} + +static int ar934x_spi_setup(struct spi_device *spi) +{ + struct ar934x_spi *sp = spi_controller_get_devdata(spi->master); + + if ((spi->max_speed_hz == 0) || + (spi->max_speed_hz > (sp->clk_freq / 2))) { + spi->max_speed_hz = sp->clk_freq / 2; + } else if (spi->max_speed_hz < (sp->clk_freq / 128)) { + dev_err(&spi->dev, "spi clock is too low "); + return -einval; + } + + return 0; +} + +static int ar934x_spi_transfer_one_message(struct spi_controller *master, + struct spi_message *m) +{ + struct ar934x_spi *sp = spi_controller_get_devdata(master); + struct spi_transfer *t = null; + struct spi_device *spi = m->spi; + unsigned long trx_done, trx_cur; + int stat = 0; + u8 term = 0; + int div, i; + u32 reg; + const u8 *tx_buf; + u8 *buf; + + m->actual_length = 0; + list_for_each_entry(t, &m->transfers, transfer_list) { + if (t->speed_hz) + div = ar934x_spi_clk_div(sp, t->speed_hz); + else + div = ar934x_spi_clk_div(sp, spi->max_speed_hz); + if (div < 0) { + stat = -eio; + goto msg_done; + } + + reg = ioread32(sp->base + ar934x_spi_reg_ctrl); + reg &= ~ar934x_spi_clk_mask; + reg |= div; + iowrite32(reg, sp->base + ar934x_spi_reg_ctrl); + iowrite32(0, sp->base + ar934x_spi_dataout); + + for (trx_done = 0; trx_done < t->len; trx_done += 4) { + trx_cur = t->len - trx_done; + if (trx_cur > 4) + trx_cur = 4; + else if (list_is_last(&t->transfer_list, &m->transfers)) + term = 1; + + if (t->tx_buf) { + tx_buf = t->tx_buf + trx_done; + reg = tx_buf[0]; + for (i = 1; i < trx_cur; i++) + reg = reg << 8 | tx_buf[i]; + iowrite32(reg, sp->base + ar934x_spi_dataout); + } + + reg = ar934x_spi_shift_val(spi->chip_select, term, + trx_cur * 8); + iowrite32(reg, sp->base + ar934x_spi_reg_shift_ctrl); + stat = readl_poll_timeout( + sp->base + ar934x_spi_reg_shift_ctrl, reg, + !(reg & ar934x_spi_shift_en), 0, 5); + if (stat < 0) + goto msg_done; + + if (t->rx_buf) { + reg = ioread32(sp->base + ar934x_spi_datain); + buf = t->rx_buf + trx_done; + for (i = 0; i < trx_cur; i++) { + buf[trx_cur - i - 1] = reg & 0xff; + reg >>= 8; + } + } + } + m->actual_length += t->len; + } + +msg_done: + m->status = stat; + spi_finalize_current_message(master); + + return 0; +} + +static const struct of_device_id ar934x_spi_match[] = { + { .compatible = "qca,ar934x-spi" }, + {}, +}; +module_device_table(of, ar934x_spi_match); + +static int ar934x_spi_probe(struct platform_device *pdev) +{ + struct spi_controller *ctlr; + struct ar934x_spi *sp; + void __iomem *base; + struct clk *clk; + int ret; + + base = devm_platform_ioremap_resource(pdev, 0); + if (is_err(base)) + return ptr_err(base); + + clk = devm_clk_get(&pdev->dev, null); + if (is_err(clk)) { + dev_err(&pdev->dev, "failed to get clock "); + return ptr_err(clk); + } + + ret = clk_prepare_enable(clk); + if (ret) + return ret; + + ctlr = spi_alloc_master(&pdev->dev, sizeof(*sp)); + if (!ctlr) { + dev_info(&pdev->dev, "failed to allocate spi controller "); + return -enomem; + } + + /* disable flash mapping and expose spi controller registers */ + iowrite32(ar934x_spi_enable, base + ar934x_spi_reg_fs); + /* restore pins to default state: csn=1 do=clk=0 */ + iowrite32(ar934x_spi_ioc_initval, base + ar934x_spi_reg_ioc); + + ctlr->mode_bits = spi_lsb_first; + ctlr->setup = ar934x_spi_setup; + ctlr->transfer_one_message = ar934x_spi_transfer_one_message; + ctlr->bits_per_word_mask = spi_bpw_mask(8); + ctlr->dev.of_node = pdev->dev.of_node; + ctlr->num_chipselect = 3; + + dev_set_drvdata(&pdev->dev, ctlr); + + sp = spi_controller_get_devdata(ctlr); + sp->base = base; + sp->clk = clk; + sp->clk_freq = clk_get_rate(clk); + sp->ctlr = ctlr; + + return devm_spi_register_controller(&pdev->dev, ctlr); +} + +static int ar934x_spi_remove(struct platform_device *pdev) +{ + struct spi_controller *ctlr; + struct ar934x_spi *sp; + + ctlr = dev_get_drvdata(&pdev->dev); + sp = spi_controller_get_devdata(ctlr); + + clk_disable_unprepare(sp->clk); + + return 0; +} + +static struct platform_driver ar934x_spi_driver = { + .driver = { + .name = driver_name, + .of_match_table = ar934x_spi_match, + }, + .probe = ar934x_spi_probe, + .remove = ar934x_spi_remove, +}; + +module_platform_driver(ar934x_spi_driver); + +module_description("spi controller driver for qualcomm atheros ar934x/qca95xx"); +module_author("chuanhong guo <gch981213@gmail.com>"); +module_license("gpl v2"); +module_alias("platform:" driver_name);
|
Serial Peripheral Interface (SPI)
|
047980c582af665e1581e60ebf3e57977e621c23
|
chuanhong guo
|
drivers
|
spi
| |
spi: add support for mediatek spi-nor controller
|
this is a driver for mtk spi-nor controller using spi-mem interface. the same controller already has limited support provided by mtk-quadspi driver under spi-nor framework and this new driver is a replacement for the old one.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add support for mediatek spi-nor controller
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
[]
|
['kconfig', 'c', 'makefile']
| 3
| 700
| 0
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--- diff --git a/drivers/spi/kconfig b/drivers/spi/kconfig --- a/drivers/spi/kconfig +++ b/drivers/spi/kconfig +config spi_mtk_nor + tristate "mediatek spi nor controller" + depends on arch_mediatek || compile_test + help + this enables support for spi nor controller found on mediatek + arm socs. this is a controller specifically for spi-nor flash. + it can perform generic spi transfers up to 6 bytes via generic + spi interface as well as several spi-nor specific instructions + via spi mem interface. + diff --git a/drivers/spi/makefile b/drivers/spi/makefile --- a/drivers/spi/makefile +++ b/drivers/spi/makefile +obj-$(config_spi_mtk_nor) += spi-mtk-nor.o diff --git a/drivers/spi/spi-mtk-nor.c b/drivers/spi/spi-mtk-nor.c --- /dev/null +++ b/drivers/spi/spi-mtk-nor.c +// spdx-license-identifier: gpl-2.0 +// +// mediatek spi nor controller driver +// +// copyright (c) 2020 chuanhong guo <gch981213@gmail.com> + +#include <linux/bits.h> +#include <linux/clk.h> +#include <linux/completion.h> +#include <linux/dma-mapping.h> +#include <linux/interrupt.h> +#include <linux/io.h> +#include <linux/iopoll.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/of_device.h> +#include <linux/spi/spi.h> +#include <linux/spi/spi-mem.h> +#include <linux/string.h> + +#define driver_name "mtk-spi-nor" + +#define mtk_nor_reg_cmd 0x00 +#define mtk_nor_cmd_write bit(4) +#define mtk_nor_cmd_program bit(2) +#define mtk_nor_cmd_read bit(0) +#define mtk_nor_cmd_mask genmask(5, 0) + +#define mtk_nor_reg_prg_cnt 0x04 +#define mtk_nor_reg_rdata 0x0c + +#define mtk_nor_reg_radr0 0x10 +#define mtk_nor_reg_radr(n) (mtk_nor_reg_radr0 + 4 * (n)) +#define mtk_nor_reg_radr3 0xc8 + +#define mtk_nor_reg_wdata 0x1c + +#define mtk_nor_reg_prgdata0 0x20 +#define mtk_nor_reg_prgdata(n) (mtk_nor_reg_prgdata0 + 4 * (n)) +#define mtk_nor_reg_prgdata_max 5 + +#define mtk_nor_reg_shift0 0x38 +#define mtk_nor_reg_shift(n) (mtk_nor_reg_shift0 + 4 * (n)) +#define mtk_nor_reg_shift_max 9 + +#define mtk_nor_reg_cfg1 0x60 +#define mtk_nor_fast_read bit(0) + +#define mtk_nor_reg_cfg2 0x64 +#define mtk_nor_wr_custom_op_en bit(4) +#define mtk_nor_wr_buf_en bit(0) + +#define mtk_nor_reg_pp_data 0x98 + +#define mtk_nor_reg_irq_stat 0xa8 +#define mtk_nor_reg_irq_en 0xac +#define mtk_nor_irq_dma bit(7) +#define mtk_nor_irq_mask genmask(7, 0) + +#define mtk_nor_reg_cfg3 0xb4 +#define mtk_nor_disable_wren bit(7) +#define mtk_nor_disable_sr_poll bit(5) + +#define mtk_nor_reg_wp 0xc4 +#define mtk_nor_enable_sf_cmd 0x30 + +#define mtk_nor_reg_buscfg 0xcc +#define mtk_nor_4b_addr bit(4) +#define mtk_nor_quad_addr bit(3) +#define mtk_nor_quad_read bit(2) +#define mtk_nor_dual_addr bit(1) +#define mtk_nor_dual_read bit(0) +#define mtk_nor_bus_mode_mask genmask(4, 0) + +#define mtk_nor_reg_dma_ctl 0x718 +#define mtk_nor_dma_start bit(0) + +#define mtk_nor_reg_dma_fadr 0x71c +#define mtk_nor_reg_dma_dadr 0x720 +#define mtk_nor_reg_dma_end_dadr 0x724 + +#define mtk_nor_prg_max_size 6 +// reading dma src/dst addresses have to be 16-byte aligned +#define mtk_nor_dma_align 16 +#define mtk_nor_dma_align_mask (mtk_nor_dma_align - 1) +// and we allocate a bounce buffer if destination address isn't aligned. +#define mtk_nor_bounce_buf_size page_size + +// buffered page program can do one 128-byte transfer +#define mtk_nor_pp_size 128 + +#define clk_to_us(sp, clkcnt) ((clkcnt) * 1000000 / sp->spi_freq) + +struct mtk_nor { + struct spi_controller *ctlr; + struct device *dev; + void __iomem *base; + u8 *buffer; + struct clk *spi_clk; + struct clk *ctlr_clk; + unsigned int spi_freq; + bool wbuf_en; + bool has_irq; + struct completion op_done; +}; + +static inline void mtk_nor_rmw(struct mtk_nor *sp, u32 reg, u32 set, u32 clr) +{ + u32 val = readl(sp->base + reg); + + val &= ~clr; + val |= set; + writel(val, sp->base + reg); +} + +static inline int mtk_nor_cmd_exec(struct mtk_nor *sp, u32 cmd, ulong clk) +{ + ulong delay = clk_to_us(sp, clk); + u32 reg; + int ret; + + writel(cmd, sp->base + mtk_nor_reg_cmd); + ret = readl_poll_timeout(sp->base + mtk_nor_reg_cmd, reg, !(reg & cmd), + delay / 3, (delay + 1) * 200); + if (ret < 0) + dev_err(sp->dev, "command %u timeout. ", cmd); + return ret; +} + +static void mtk_nor_set_addr(struct mtk_nor *sp, const struct spi_mem_op *op) +{ + u32 addr = op->addr.val; + int i; + + for (i = 0; i < 3; i++) { + writeb(addr & 0xff, sp->base + mtk_nor_reg_radr(i)); + addr >>= 8; + } + if (op->addr.nbytes == 4) { + writeb(addr & 0xff, sp->base + mtk_nor_reg_radr3); + mtk_nor_rmw(sp, mtk_nor_reg_buscfg, mtk_nor_4b_addr, 0); + } else { + mtk_nor_rmw(sp, mtk_nor_reg_buscfg, 0, mtk_nor_4b_addr); + } +} + +static bool mtk_nor_match_read(const struct spi_mem_op *op) +{ + int dummy = 0; + + if (op->dummy.buswidth) + dummy = op->dummy.nbytes * bits_per_byte / op->dummy.buswidth; + + if ((op->data.buswidth == 2) || (op->data.buswidth == 4)) { + if (op->addr.buswidth == 1) + return dummy == 8; + else if (op->addr.buswidth == 2) + return dummy == 4; + else if (op->addr.buswidth == 4) + return dummy == 6; + } else if ((op->addr.buswidth == 1) && (op->data.buswidth == 1)) { + if (op->cmd.opcode == 0x03) + return dummy == 0; + else if (op->cmd.opcode == 0x0b) + return dummy == 8; + } + return false; +} + +static int mtk_nor_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op) +{ + size_t len; + + if (!op->data.nbytes) + return 0; + + if ((op->addr.nbytes == 3) || (op->addr.nbytes == 4)) { + if ((op->data.dir == spi_mem_data_in) && + mtk_nor_match_read(op)) { + if ((op->addr.val & mtk_nor_dma_align_mask) || + (op->data.nbytes < mtk_nor_dma_align)) + op->data.nbytes = 1; + else if (!((ulong)(op->data.buf.in) & + mtk_nor_dma_align_mask)) + op->data.nbytes &= ~mtk_nor_dma_align_mask; + else if (op->data.nbytes > mtk_nor_bounce_buf_size) + op->data.nbytes = mtk_nor_bounce_buf_size; + return 0; + } else if (op->data.dir == spi_mem_data_out) { + if (op->data.nbytes >= mtk_nor_pp_size) + op->data.nbytes = mtk_nor_pp_size; + else + op->data.nbytes = 1; + return 0; + } + } + + len = mtk_nor_prg_max_size - sizeof(op->cmd.opcode) - op->addr.nbytes - + op->dummy.nbytes; + if (op->data.nbytes > len) + op->data.nbytes = len; + + return 0; +} + +static bool mtk_nor_supports_op(struct spi_mem *mem, + const struct spi_mem_op *op) +{ + size_t len; + + if (op->cmd.buswidth != 1) + return false; + + if ((op->addr.nbytes == 3) || (op->addr.nbytes == 4)) { + if ((op->data.dir == spi_mem_data_in) && mtk_nor_match_read(op)) + return true; + else if (op->data.dir == spi_mem_data_out) + return (op->addr.buswidth == 1) && + (op->dummy.buswidth == 0) && + (op->data.buswidth == 1); + } + len = sizeof(op->cmd.opcode) + op->addr.nbytes + op->dummy.nbytes; + if ((len > mtk_nor_prg_max_size) || + ((op->data.nbytes) && (len == mtk_nor_prg_max_size))) + return false; + return true; +} + +static void mtk_nor_setup_bus(struct mtk_nor *sp, const struct spi_mem_op *op) +{ + u32 reg = 0; + + if (op->addr.nbytes == 4) + reg |= mtk_nor_4b_addr; + + if (op->data.buswidth == 4) { + reg |= mtk_nor_quad_read; + writeb(op->cmd.opcode, sp->base + mtk_nor_reg_prgdata(4)); + if (op->addr.buswidth == 4) + reg |= mtk_nor_quad_addr; + } else if (op->data.buswidth == 2) { + reg |= mtk_nor_dual_read; + writeb(op->cmd.opcode, sp->base + mtk_nor_reg_prgdata(3)); + if (op->addr.buswidth == 2) + reg |= mtk_nor_dual_addr; + } else { + if (op->cmd.opcode == 0x0b) + mtk_nor_rmw(sp, mtk_nor_reg_cfg1, mtk_nor_fast_read, 0); + else + mtk_nor_rmw(sp, mtk_nor_reg_cfg1, 0, mtk_nor_fast_read); + } + mtk_nor_rmw(sp, mtk_nor_reg_buscfg, reg, mtk_nor_bus_mode_mask); +} + +static int mtk_nor_read_dma(struct mtk_nor *sp, u32 from, unsigned int length, + u8 *buffer) +{ + int ret = 0; + ulong delay; + u32 reg; + dma_addr_t dma_addr; + + dma_addr = dma_map_single(sp->dev, buffer, length, dma_from_device); + if (dma_mapping_error(sp->dev, dma_addr)) { + dev_err(sp->dev, "failed to map dma buffer. "); + return -einval; + } + + writel(from, sp->base + mtk_nor_reg_dma_fadr); + writel(dma_addr, sp->base + mtk_nor_reg_dma_dadr); + writel(dma_addr + length, sp->base + mtk_nor_reg_dma_end_dadr); + + if (sp->has_irq) { + reinit_completion(&sp->op_done); + mtk_nor_rmw(sp, mtk_nor_reg_irq_en, mtk_nor_irq_dma, 0); + } + + mtk_nor_rmw(sp, mtk_nor_reg_dma_ctl, mtk_nor_dma_start, 0); + + delay = clk_to_us(sp, (length + 5) * bits_per_byte); + + if (sp->has_irq) { + if (!wait_for_completion_timeout(&sp->op_done, + (delay + 1) * 100)) + ret = -etimedout; + } else { + ret = readl_poll_timeout(sp->base + mtk_nor_reg_dma_ctl, reg, + !(reg & mtk_nor_dma_start), delay / 3, + (delay + 1) * 100); + } + + dma_unmap_single(sp->dev, dma_addr, length, dma_from_device); + if (ret < 0) + dev_err(sp->dev, "dma read timeout. "); + + return ret; +} + +static int mtk_nor_read_bounce(struct mtk_nor *sp, u32 from, + unsigned int length, u8 *buffer) +{ + unsigned int rdlen; + int ret; + + if (length & mtk_nor_dma_align_mask) + rdlen = (length + mtk_nor_dma_align) & ~mtk_nor_dma_align_mask; + else + rdlen = length; + + ret = mtk_nor_read_dma(sp, from, rdlen, sp->buffer); + if (ret) + return ret; + + memcpy(buffer, sp->buffer, length); + return 0; +} + +static int mtk_nor_read_pio(struct mtk_nor *sp, const struct spi_mem_op *op) +{ + u8 *buf = op->data.buf.in; + int ret; + + ret = mtk_nor_cmd_exec(sp, mtk_nor_cmd_read, 6 * bits_per_byte); + if (!ret) + buf[0] = readb(sp->base + mtk_nor_reg_rdata); + return ret; +} + +static int mtk_nor_write_buffer_enable(struct mtk_nor *sp) +{ + int ret; + u32 val; + + if (sp->wbuf_en) + return 0; + + val = readl(sp->base + mtk_nor_reg_cfg2); + writel(val | mtk_nor_wr_buf_en, sp->base + mtk_nor_reg_cfg2); + ret = readl_poll_timeout(sp->base + mtk_nor_reg_cfg2, val, + val & mtk_nor_wr_buf_en, 0, 10000); + if (!ret) + sp->wbuf_en = true; + return ret; +} + +static int mtk_nor_write_buffer_disable(struct mtk_nor *sp) +{ + int ret; + u32 val; + + if (!sp->wbuf_en) + return 0; + val = readl(sp->base + mtk_nor_reg_cfg2); + writel(val & ~mtk_nor_wr_buf_en, sp->base + mtk_nor_reg_cfg2); + ret = readl_poll_timeout(sp->base + mtk_nor_reg_cfg2, val, + !(val & mtk_nor_wr_buf_en), 0, 10000); + if (!ret) + sp->wbuf_en = false; + return ret; +} + +static int mtk_nor_pp_buffered(struct mtk_nor *sp, const struct spi_mem_op *op) +{ + const u8 *buf = op->data.buf.out; + u32 val; + int ret, i; + + ret = mtk_nor_write_buffer_enable(sp); + if (ret < 0) + return ret; + + for (i = 0; i < op->data.nbytes; i += 4) { + val = buf[i + 3] << 24 | buf[i + 2] << 16 | buf[i + 1] << 8 | + buf[i]; + writel(val, sp->base + mtk_nor_reg_pp_data); + } + return mtk_nor_cmd_exec(sp, mtk_nor_cmd_write, + (op->data.nbytes + 5) * bits_per_byte); +} + +static int mtk_nor_pp_unbuffered(struct mtk_nor *sp, + const struct spi_mem_op *op) +{ + const u8 *buf = op->data.buf.out; + int ret; + + ret = mtk_nor_write_buffer_disable(sp); + if (ret < 0) + return ret; + writeb(buf[0], sp->base + mtk_nor_reg_wdata); + return mtk_nor_cmd_exec(sp, mtk_nor_cmd_write, 6 * bits_per_byte); +} + +int mtk_nor_exec_op(struct spi_mem *mem, const struct spi_mem_op *op) +{ + struct mtk_nor *sp = spi_controller_get_devdata(mem->spi->master); + int ret; + + if ((op->data.nbytes == 0) || + ((op->addr.nbytes != 3) && (op->addr.nbytes != 4))) + return -enotsupp; + + if (op->data.dir == spi_mem_data_out) { + mtk_nor_set_addr(sp, op); + writeb(op->cmd.opcode, sp->base + mtk_nor_reg_prgdata0); + if (op->data.nbytes == mtk_nor_pp_size) + return mtk_nor_pp_buffered(sp, op); + return mtk_nor_pp_unbuffered(sp, op); + } + + if ((op->data.dir == spi_mem_data_in) && mtk_nor_match_read(op)) { + ret = mtk_nor_write_buffer_disable(sp); + if (ret < 0) + return ret; + mtk_nor_setup_bus(sp, op); + if (op->data.nbytes == 1) { + mtk_nor_set_addr(sp, op); + return mtk_nor_read_pio(sp, op); + } else if (((ulong)(op->data.buf.in) & + mtk_nor_dma_align_mask)) { + return mtk_nor_read_bounce(sp, op->addr.val, + op->data.nbytes, + op->data.buf.in); + } else { + return mtk_nor_read_dma(sp, op->addr.val, + op->data.nbytes, + op->data.buf.in); + } + } + + return -enotsupp; +} + +static int mtk_nor_setup(struct spi_device *spi) +{ + struct mtk_nor *sp = spi_controller_get_devdata(spi->master); + + if (spi->max_speed_hz && (spi->max_speed_hz < sp->spi_freq)) { + dev_err(&spi->dev, "spi clock should be %u hz. ", + sp->spi_freq); + return -einval; + } + spi->max_speed_hz = sp->spi_freq; + + return 0; +} + +static int mtk_nor_transfer_one_message(struct spi_controller *master, + struct spi_message *m) +{ + struct mtk_nor *sp = spi_controller_get_devdata(master); + struct spi_transfer *t = null; + unsigned long trx_len = 0; + int stat = 0; + int reg_offset = mtk_nor_reg_prgdata_max; + void __iomem *reg; + const u8 *txbuf; + u8 *rxbuf; + int i; + + list_for_each_entry(t, &m->transfers, transfer_list) { + txbuf = t->tx_buf; + for (i = 0; i < t->len; i++, reg_offset--) { + reg = sp->base + mtk_nor_reg_prgdata(reg_offset); + if (txbuf) + writeb(txbuf[i], reg); + else + writeb(0, reg); + } + trx_len += t->len; + } + + writel(trx_len * bits_per_byte, sp->base + mtk_nor_reg_prg_cnt); + + stat = mtk_nor_cmd_exec(sp, mtk_nor_cmd_program, + trx_len * bits_per_byte); + if (stat < 0) + goto msg_done; + + reg_offset = trx_len - 1; + list_for_each_entry(t, &m->transfers, transfer_list) { + rxbuf = t->rx_buf; + for (i = 0; i < t->len; i++, reg_offset--) { + reg = sp->base + mtk_nor_reg_shift(reg_offset); + if (rxbuf) + rxbuf[i] = readb(reg); + } + } + + m->actual_length = trx_len; +msg_done: + m->status = stat; + spi_finalize_current_message(master); + + return 0; +} + +static void mtk_nor_disable_clk(struct mtk_nor *sp) +{ + clk_disable_unprepare(sp->spi_clk); + clk_disable_unprepare(sp->ctlr_clk); +} + +static int mtk_nor_enable_clk(struct mtk_nor *sp) +{ + int ret; + + ret = clk_prepare_enable(sp->spi_clk); + if (ret) + return ret; + + ret = clk_prepare_enable(sp->ctlr_clk); + if (ret) { + clk_disable_unprepare(sp->spi_clk); + return ret; + } + + return 0; +} + +static int mtk_nor_init(struct mtk_nor *sp) +{ + int ret; + + ret = mtk_nor_enable_clk(sp); + if (ret) + return ret; + + sp->spi_freq = clk_get_rate(sp->spi_clk); + + writel(mtk_nor_enable_sf_cmd, sp->base + mtk_nor_reg_wp); + mtk_nor_rmw(sp, mtk_nor_reg_cfg2, mtk_nor_wr_custom_op_en, 0); + mtk_nor_rmw(sp, mtk_nor_reg_cfg3, + mtk_nor_disable_wren | mtk_nor_disable_sr_poll, 0); + + return ret; +} + +static irqreturn_t mtk_nor_irq_handler(int irq, void *data) +{ + struct mtk_nor *sp = data; + u32 irq_status, irq_enabled; + + irq_status = readl(sp->base + mtk_nor_reg_irq_stat); + irq_enabled = readl(sp->base + mtk_nor_reg_irq_en); + // write status back to clear interrupt + writel(irq_status, sp->base + mtk_nor_reg_irq_stat); + + if (!(irq_status & irq_enabled)) + return irq_none; + + if (irq_status & mtk_nor_irq_dma) { + complete(&sp->op_done); + writel(0, sp->base + mtk_nor_reg_irq_en); + } + + return irq_handled; +} + +static size_t mtk_max_msg_size(struct spi_device *spi) +{ + return mtk_nor_prg_max_size; +} + +static const struct spi_controller_mem_ops mtk_nor_mem_ops = { + .adjust_op_size = mtk_nor_adjust_op_size, + .supports_op = mtk_nor_supports_op, + .exec_op = mtk_nor_exec_op +}; + +static const struct of_device_id mtk_nor_match[] = { + { .compatible = "mediatek,mt8173-nor" }, + { /* sentinel */ } +}; +module_device_table(of, mtk_nor_match); + +static int mtk_nor_probe(struct platform_device *pdev) +{ + struct spi_controller *ctlr; + struct mtk_nor *sp; + void __iomem *base; + u8 *buffer; + struct clk *spi_clk, *ctlr_clk; + int ret, irq; + + base = devm_platform_ioremap_resource(pdev, 0); + if (is_err(base)) + return ptr_err(base); + + spi_clk = devm_clk_get(&pdev->dev, "spi"); + if (is_err(spi_clk)) + return ptr_err(spi_clk); + + ctlr_clk = devm_clk_get(&pdev->dev, "sf"); + if (is_err(ctlr_clk)) + return ptr_err(ctlr_clk); + + buffer = devm_kmalloc(&pdev->dev, + mtk_nor_bounce_buf_size + mtk_nor_dma_align, + gfp_kernel); + if (!buffer) + return -enomem; + + if ((ulong)buffer & mtk_nor_dma_align_mask) + buffer = (u8 *)(((ulong)buffer + mtk_nor_dma_align) & + ~mtk_nor_dma_align_mask); + + ctlr = spi_alloc_master(&pdev->dev, sizeof(*sp)); + if (!ctlr) { + dev_err(&pdev->dev, "failed to allocate spi controller "); + return -enomem; + } + + ctlr->bits_per_word_mask = spi_bpw_mask(8); + ctlr->dev.of_node = pdev->dev.of_node; + ctlr->max_message_size = mtk_max_msg_size; + ctlr->mem_ops = &mtk_nor_mem_ops; + ctlr->mode_bits = spi_rx_dual | spi_rx_quad | spi_tx_dual | spi_tx_quad; + ctlr->num_chipselect = 1; + ctlr->setup = mtk_nor_setup; + ctlr->transfer_one_message = mtk_nor_transfer_one_message; + + dev_set_drvdata(&pdev->dev, ctlr); + + sp = spi_controller_get_devdata(ctlr); + sp->base = base; + sp->buffer = buffer; + sp->has_irq = false; + sp->wbuf_en = false; + sp->ctlr = ctlr; + sp->dev = &pdev->dev; + sp->spi_clk = spi_clk; + sp->ctlr_clk = ctlr_clk; + + irq = platform_get_irq_optional(pdev, 0); + if (irq < 0) { + dev_warn(sp->dev, "irq not available."); + } else { + writel(mtk_nor_irq_mask, base + mtk_nor_reg_irq_stat); + writel(0, base + mtk_nor_reg_irq_en); + ret = devm_request_irq(sp->dev, irq, mtk_nor_irq_handler, 0, + pdev->name, sp); + if (ret < 0) { + dev_warn(sp->dev, "failed to request irq."); + } else { + init_completion(&sp->op_done); + sp->has_irq = true; + } + } + + ret = mtk_nor_init(sp); + if (ret < 0) { + kfree(ctlr); + return ret; + } + + dev_info(&pdev->dev, "spi frequency: %d hz ", sp->spi_freq); + + return devm_spi_register_controller(&pdev->dev, ctlr); +} + +static int mtk_nor_remove(struct platform_device *pdev) +{ + struct spi_controller *ctlr; + struct mtk_nor *sp; + + ctlr = dev_get_drvdata(&pdev->dev); + sp = spi_controller_get_devdata(ctlr); + + mtk_nor_disable_clk(sp); + + return 0; +} + +static struct platform_driver mtk_nor_driver = { + .driver = { + .name = driver_name, + .of_match_table = mtk_nor_match, + }, + .probe = mtk_nor_probe, + .remove = mtk_nor_remove, +}; + +module_platform_driver(mtk_nor_driver); + +module_description("mediatek spi nor controller driver"); +module_author("chuanhong guo <gch981213@gmail.com>"); +module_license("gpl v2"); +module_alias("platform:" driver_name);
|
Serial Peripheral Interface (SPI)
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881d1ee9fe81ff2be1b90809a07621be97404a57
|
chuanhong guo
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drivers
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spi
| |
spi: meson-spicc: add support for amlogic g12a
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add support for the spicc controllers on the amlogic g12a socs family.
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this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
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add support for amlogic g12a
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['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
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['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
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['meson-spicc']
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['c']
| 1
| 46
| 8
|
--- diff --git a/drivers/spi/spi-meson-spicc.c b/drivers/spi/spi-meson-spicc.c --- a/drivers/spi/spi-meson-spicc.c +++ b/drivers/spi/spi-meson-spicc.c + bool has_pclk; + struct clk *pclk; + * + * clk path for g12a series: + * pclk -> pow2 fixed div -> pow2 div -> mux -> out + * pclk -> enh fixed div -> enh div -> mux -> out - parent_data[0].hw = __clk_get_hw(spicc->core); + if (spicc->data->has_pclk) + parent_data[0].hw = __clk_get_hw(spicc->pclk); + else + parent_data[0].hw = __clk_get_hw(spicc->core); - parent_data[0].hw = __clk_get_hw(spicc->core); + if (spicc->data->has_pclk) + parent_data[0].hw = __clk_get_hw(spicc->pclk); + else + parent_data[0].hw = __clk_get_hw(spicc->core); - int ret, irq, rate; + int ret, irq; + if (spicc->data->has_pclk) { + spicc->pclk = devm_clk_get(&pdev->dev, "pclk"); + if (is_err(spicc->pclk)) { + dev_err(&pdev->dev, "pclk clock request failed "); + ret = ptr_err(spicc->pclk); + goto out_master; + } + } + - rate = clk_get_rate(spicc->core); + + ret = clk_prepare_enable(spicc->pclk); + if (ret) { + dev_err(&pdev->dev, "pclk clock enable failed "); + goto out_master; + } + master->max_speed_hz = spicc->data->max_speed_hz; - /* setup max rate according to the meson datasheet */ - master->max_speed_hz = min_t(unsigned int, rate >> 1, - spicc->data->max_speed_hz); - + clk_disable_unprepare(spicc->pclk); + clk_disable_unprepare(spicc->pclk); +static const struct meson_spicc_data meson_spicc_g12a_data = { + .max_speed_hz = 166666666, + .min_speed_hz = 50000, + .fifo_size = 15, + .has_oen = true, + .has_enhance_clk_div = true, + .has_pclk = true, +}; + + { + .compatible = "amlogic,meson-g12a-spicc", + .data = &meson_spicc_g12a_data, + },
|
Serial Peripheral Interface (SPI)
|
4e3d322058a5e5afda100005a94ec7f0bf509d43
|
neil armstrong
|
drivers
|
spi
| |
spi: rspi: add support for active-high chip selects
|
all rspi variants support setting the polarity of the ssl signal. advertize support for active-high chip selects, and configure polarity according to the state of the flag.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add support for active-high chip selects
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['rspi']
|
['c']
| 1
| 32
| 4
|
--- diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c --- a/drivers/spi/spi-rspi.c +++ b/drivers/spi/spi-rspi.c +#include <linux/spinlock.h> -#define sslp_ssl1p 0x02 /* ssl1 signal polarity setting */ -#define sslp_ssl0p 0x01 /* ssl0 signal polarity setting */ +#define sslp_sslp(i) bit(i) /* ssli signal polarity setting */ + struct platform_device *pdev; + spinlock_t lock; /* protects rmw-access to rspi_sslp */ +static int rspi_setup(struct spi_device *spi) +{ + struct rspi_data *rspi = spi_controller_get_devdata(spi->controller); + u8 sslp; + + if (spi->cs_gpiod) + return 0; + + pm_runtime_get_sync(&rspi->pdev->dev); + spin_lock_irq(&rspi->lock); + + sslp = rspi_read8(rspi, rspi_sslp); + if (spi->mode & spi_cs_high) + sslp |= sslp_sslp(spi->chip_select); + else + sslp &= ~sslp_sslp(spi->chip_select); + rspi_write8(rspi, sslp, rspi_sslp); + + spin_unlock_irq(&rspi->lock); + pm_runtime_put(&rspi->pdev->dev); + return 0; +} + + rspi->pdev = pdev; + spin_lock_init(&rspi->lock); + ctlr->setup = rspi_setup; - ctlr->mode_bits = spi_cpha | spi_cpol | spi_lsb_first | spi_loop | - ops->extra_mode_bits; + ctlr->mode_bits = spi_cpha | spi_cpol | spi_cs_high | spi_lsb_first | + spi_loop | ops->extra_mode_bits;
|
Serial Peripheral Interface (SPI)
|
f3a14a3a4d9a54c665e979b1dedbbab1f7503a43
|
geert uytterhoeven
|
drivers
|
spi
| |
spi: spi-fsl-dspi: add support for ls1028a
|
this is similar to the dspi instantiation on ls1028a, except that: - the a-011218 erratum has been fixed, so dma works - the endianness is different, which has implications on xspi mode
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add support for ls1028a
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['spi-fsl-dspi']
|
['c']
| 1
| 9
| 0
|
- the a-011218 erratum has been fixed, so dma works - the endianness is different, which has implications on xspi mode --- diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c + ls1028a, + [ls1028a] = { + .trans_mode = dspi_xspi_mode, + .max_clock_factor = 8, + .fifo_size = 4, + }, + }, { + .compatible = "fsl,ls1028a-dspi", + .data = &devtype_data[ls1028a],
|
Serial Peripheral Interface (SPI)
|
138f56ef914b30087c560492e5997f17d494d043
|
vladimir oltean
|
drivers
|
spi
| |
watchdog: add stop_on_reboot parameter to control reboot policy
|
many watchdog drivers use watchdog_stop_on_reboot() helper in order to stop the watchdog on system reboot. unfortunately, this logic is coded in driver's probe function and doesn't allows user to decide what to do during shutdown/reboot.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
[]
|
['c']
| 1
| 12
| 0
|
--- diff --git a/drivers/watchdog/watchdog_core.c b/drivers/watchdog/watchdog_core.c --- a/drivers/watchdog/watchdog_core.c +++ b/drivers/watchdog/watchdog_core.c +static int stop_on_reboot = -1; +module_param(stop_on_reboot, int, 0444); +module_parm_desc(stop_on_reboot, "stop watchdogs on reboot (0=keep watching, 1=stop)"); + + /* module parameter to force watchdog policy on reboot. */ + if (stop_on_reboot != -1) { + if (stop_on_reboot) + set_bit(wdog_stop_on_reboot, &wdd->status); + else + clear_bit(wdog_stop_on_reboot, &wdd->status); + } +
|
Watchdog
|
9232c80659e941ffa6c7bfc96bd64c6172ef0452
|
dmitry safonov
|
drivers
|
watchdog
| |
watchdog: add k3 rti watchdog support
|
texas instruments k3 socs contain an rti (real time interrupt) module which can be used as a watchdog. this ip provides a support for windowed watchdog mode, in which the watchdog must be petted within a certain time window. if it is petted either too soon, or too late, a watchdog error will be triggered.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add k3 rti watchdog support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
[]
|
['kconfig', 'c', 'makefile']
| 3
| 264
| 0
|
--- diff --git a/drivers/watchdog/kconfig b/drivers/watchdog/kconfig --- a/drivers/watchdog/kconfig +++ b/drivers/watchdog/kconfig +config k3_rti_watchdog + tristate "texas instruments k3 rti watchdog" + depends on arch_k3 || compile_test + select watchdog_core + help + say y here if you want to include support for the k3 watchdog + timer (rti module) available in the k3 generation of processors. + diff --git a/drivers/watchdog/makefile b/drivers/watchdog/makefile --- a/drivers/watchdog/makefile +++ b/drivers/watchdog/makefile +obj-$(config_k3_rti_watchdog) += rti_wdt.o diff --git a/drivers/watchdog/rti_wdt.c b/drivers/watchdog/rti_wdt.c --- /dev/null +++ b/drivers/watchdog/rti_wdt.c +// spdx-license-identifier: gpl-2.0 +/* + * watchdog driver for the k3 rti module + * + * (c) copyright 2019-2020 texas instruments inc. + * all rights reserved. + */ + +#include <linux/clk.h> +#include <linux/device.h> +#include <linux/err.h> +#include <linux/io.h> +#include <linux/kernel.h> +#include <linux/mod_devicetable.h> +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/platform_device.h> +#include <linux/pm_runtime.h> +#include <linux/types.h> +#include <linux/watchdog.h> + +#define default_heartbeat 60 + +/* max heartbeat is calculated at 32khz source clock */ +#define max_heartbeat 1000 + +/* timer register set definition */ +#define rtidwdctrl 0x90 +#define rtidwdprld 0x94 +#define rtiwdstatus 0x98 +#define rtiwdkey 0x9c +#define rtidwdcntr 0xa0 +#define rtiwwdrxctrl 0xa4 +#define rtiwwdsizectrl 0xa8 + +#define rtiwwdrx_nmi 0xa + +#define rtiwwdsize_50p 0x50 + +#define wdenable_key 0xa98559da + +#define wdkey_seq0 0xe51a +#define wdkey_seq1 0xa35c + +#define wdt_preload_shift 13 + +#define wdt_preload_max 0xfff + +#define dwdst bit(1) + +static int heartbeat; + +/* + * struct to hold data for each wdt device + * @base - base io address of wd device + * @freq - source clock frequency of wdt + * @wdd - hold watchdog device as is in wdt core + */ +struct rti_wdt_device { + void __iomem *base; + unsigned long freq; + struct watchdog_device wdd; +}; + +static int rti_wdt_start(struct watchdog_device *wdd) +{ + u32 timer_margin; + struct rti_wdt_device *wdt = watchdog_get_drvdata(wdd); + + /* set timeout period */ + timer_margin = (u64)wdd->timeout * wdt->freq; + timer_margin >>= wdt_preload_shift; + if (timer_margin > wdt_preload_max) + timer_margin = wdt_preload_max; + writel_relaxed(timer_margin, wdt->base + rtidwdprld); + + /* + * rti only supports a windowed mode, where the watchdog can only + * be petted during the open window; not too early or not too late. + * the hw configuration options only allow for the open window size + * to be 50% or less than that; we obviouly want to configure the open + * window as large as possible so we select the 50% option. to avoid + * any glitches, we accommodate 5% safety margin also, so we setup + * the min_hw_hearbeat at 55% of the timeout period. + */ + wdd->min_hw_heartbeat_ms = 11 * wdd->timeout * 1000 / 20; + + /* generate nmi when wdt expires */ + writel_relaxed(rtiwwdrx_nmi, wdt->base + rtiwwdrxctrl); + + /* open window size 50%; this is the largest window size available */ + writel_relaxed(rtiwwdsize_50p, wdt->base + rtiwwdsizectrl); + + readl_relaxed(wdt->base + rtiwwdsizectrl); + + /* enable watchdog */ + writel_relaxed(wdenable_key, wdt->base + rtidwdctrl); + return 0; +} + +static int rti_wdt_ping(struct watchdog_device *wdd) +{ + struct rti_wdt_device *wdt = watchdog_get_drvdata(wdd); + + /* put watchdog in service state */ + writel_relaxed(wdkey_seq0, wdt->base + rtiwdkey); + /* put watchdog in active state */ + writel_relaxed(wdkey_seq1, wdt->base + rtiwdkey); + + return 0; +} + +static unsigned int rti_wdt_get_timeleft(struct watchdog_device *wdd) +{ + u64 timer_counter; + u32 val; + struct rti_wdt_device *wdt = watchdog_get_drvdata(wdd); + + /* if timeout has occurred then return 0 */ + val = readl_relaxed(wdt->base + rtiwdstatus); + if (val & dwdst) + return 0; + + timer_counter = readl_relaxed(wdt->base + rtidwdcntr); + + do_div(timer_counter, wdt->freq); + + return timer_counter; +} + +static const struct watchdog_info rti_wdt_info = { + .options = wdiof_keepaliveping, + .identity = "k3 rti watchdog", +}; + +static const struct watchdog_ops rti_wdt_ops = { + .owner = this_module, + .start = rti_wdt_start, + .ping = rti_wdt_ping, + .get_timeleft = rti_wdt_get_timeleft, +}; + +static int rti_wdt_probe(struct platform_device *pdev) +{ + int ret = 0; + struct device *dev = &pdev->dev; + struct resource *wdt_mem; + struct watchdog_device *wdd; + struct rti_wdt_device *wdt; + struct clk *clk; + + wdt = devm_kzalloc(dev, sizeof(*wdt), gfp_kernel); + if (!wdt) + return -enomem; + + clk = clk_get(dev, null); + if (is_err(clk)) { + if (ptr_err(clk) != -eprobe_defer) + dev_err(dev, "failed to get clock "); + return ptr_err(clk); + } + + wdt->freq = clk_get_rate(clk); + + clk_put(clk); + + if (!wdt->freq) { + dev_err(dev, "failed to get fck rate. "); + return -einval; + } + + pm_runtime_enable(dev); + ret = pm_runtime_get_sync(dev); + if (ret) { + if (ret != -eprobe_defer) + dev_err(&pdev->dev, "runtime pm failed "); + return ret; + } + + platform_set_drvdata(pdev, wdt); + + wdd = &wdt->wdd; + wdd->info = &rti_wdt_info; + wdd->ops = &rti_wdt_ops; + wdd->min_timeout = 1; + wdd->max_hw_heartbeat_ms = (wdt_preload_max << wdt_preload_shift) / + wdt->freq * 1000; + wdd->timeout = default_heartbeat; + wdd->parent = dev; + + watchdog_init_timeout(wdd, heartbeat, dev); + + watchdog_set_drvdata(wdd, wdt); + watchdog_set_nowayout(wdd, 1); + watchdog_set_restart_priority(wdd, 128); + + wdt_mem = platform_get_resource(pdev, ioresource_mem, 0); + wdt->base = devm_ioremap_resource(dev, wdt_mem); + if (is_err(wdt->base)) { + ret = ptr_err(wdt->base); + goto err_iomap; + } + + ret = watchdog_register_device(wdd); + if (ret) { + dev_err(dev, "cannot register watchdog device "); + goto err_iomap; + } + + return 0; + +err_iomap: + pm_runtime_put_sync(&pdev->dev); + + return ret; +} + +static int rti_wdt_remove(struct platform_device *pdev) +{ + struct rti_wdt_device *wdt = platform_get_drvdata(pdev); + + watchdog_unregister_device(&wdt->wdd); + pm_runtime_put(&pdev->dev); + + return 0; +} + +static const struct of_device_id rti_wdt_of_match[] = { + { .compatible = "ti,j7-rti-wdt", }, + {}, +}; +module_device_table(of, rti_wdt_of_match); + +static struct platform_driver rti_wdt_driver = { + .driver = { + .name = "rti-wdt", + .of_match_table = rti_wdt_of_match, + }, + .probe = rti_wdt_probe, + .remove = rti_wdt_remove, +}; + +module_platform_driver(rti_wdt_driver); + +module_author("tero kristo <t-kristo@ti.com>"); +module_description("k3 rti watchdog driver"); + +module_param(heartbeat, int, 0); +module_parm_desc(heartbeat, + "watchdog heartbeat period in seconds from 1 to " + __module_string(max_heartbeat) ", default " + __module_string(default_heartbeat)); + +module_license("gpl"); +module_alias("platform:rti-wdt");
|
Watchdog
|
2d63908bdbfbce0d98195b22236ad5105dc6eba2
|
tero kristo guenter roeck linux roeck us net
|
drivers
|
watchdog
| |
serial/sysrq: add magic_sysrq_serial_sequence
|
many embedded boards have a disconnected ttl level serial which can generate some garbage that can lead to spurious false sysrq detects.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
a string sequence that can enable sysrq if it follows break on a serial line. this is necessary because having sysrq always enabled doesn't work for some embedded boards that tend to generate garbage on serial line
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['serial/sysrq', 'add a magic sysrq serial secuence']
|
['h', 'c', 'debug']
| 3
| 77
| 7
|
--- diff --git a/drivers/tty/serial/serial_core.c b/drivers/tty/serial/serial_core.c --- a/drivers/tty/serial/serial_core.c +++ b/drivers/tty/serial/serial_core.c +#include <linux/sysrq.h> +#define sysrq_timeout (hz * 5) + +#ifdef config_magic_sysrq_serial +static const char sysrq_toggle_seq[] = config_magic_sysrq_serial_sequence; + +static void uart_sysrq_on(struct work_struct *w) +{ + sysrq_toggle_support(1); + pr_info("sysrq is enabled by magic sequence on serial "); +} +static declare_work(sysrq_enable_work, uart_sysrq_on); + +/** + * uart_try_toggle_sysrq - enables sysrq from serial line + * @port: uart_port structure where char(s) after break met + * @ch: new character in the sequence after received break + * + * enables magic sysrq when the required sequence is met on port + * (see config_magic_sysrq_serial_sequence). + * + * returns false if @ch is out of enabling sequence and should be + * handled some other way, true if @ch was consumed. + */ +static bool uart_try_toggle_sysrq(struct uart_port *port, unsigned int ch) +{ + if (array_size(sysrq_toggle_seq) <= 1) + return false; + + build_bug_on(array_size(sysrq_toggle_seq) >= u8_max); + if (sysrq_toggle_seq[port->sysrq_seq] != ch) { + port->sysrq_seq = 0; + return false; + } + + /* without the last */ + if (++port->sysrq_seq < (array_size(sysrq_toggle_seq) - 1)) { + port->sysrq = jiffies + sysrq_timeout; + return true; + } + + schedule_work(&sysrq_enable_work); + + port->sysrq = 0; + return true; +} +#else +static inline bool uart_try_toggle_sysrq(struct uart_port *port, unsigned int ch) +{ + return false; +} +#endif + - handle_sysrq(ch); - port->sysrq = 0; - return 1; + if (sysrq_mask()) { + handle_sysrq(ch); + port->sysrq = 0; + return 1; + } + if (uart_try_toggle_sysrq(port, ch)) + return 1; - port->sysrq_ch = ch; - port->sysrq = 0; - return 1; + if (sysrq_mask()) { + port->sysrq_ch = ch; + port->sysrq = 0; + return 1; + } + if (uart_try_toggle_sysrq(port, ch)) + return 1; - port->sysrq = jiffies + hz*5; + port->sysrq = jiffies + sysrq_timeout; diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h --- a/include/linux/serial_core.h +++ b/include/linux/serial_core.h + unsigned char sysrq_seq; /* index in sysrq_toggle_seq */ diff --git a/lib/kconfig.debug b/lib/kconfig.debug --- a/lib/kconfig.debug +++ b/lib/kconfig.debug +config magic_sysrq_serial_sequence + string "char sequence that enables magic sysrq over serial" + depends on magic_sysrq_serial + default "" + help + specifies a sequence of characters that can follow break to enable + sysrq on a serial console. +
|
Serial
|
68af43173d3fcece70bef49cb992c64c4c68ff23
|
dmitry safonov
|
include
|
linux
|
serial
|
sysctl/sysrq: remove __sysrq_enabled copy
|
many embedded boards have a disconnected ttl level serial which can generate some garbage that can lead to spurious false sysrq detects.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
a string sequence that can enable sysrq if it follows break on a serial line. this is necessary because having sysrq always enabled doesn't work for some embedded boards that tend to generate garbage on serial line
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['serial/sysrq', 'add a magic sysrq serial secuence']
|
['h', 'c']
| 3
| 41
| 19
|
--- diff --git a/drivers/tty/sysrq.c b/drivers/tty/sysrq.c --- a/drivers/tty/sysrq.c +++ b/drivers/tty/sysrq.c +/** + * sysrq_mask - getter for sysrq_enabled mask. + * + * return: 1 if sysrq is always enabled, enabled sysrq_key_op mask otherwise. + */ +int sysrq_mask(void) +{ + if (sysrq_always_enabled) + return 1; + return sysrq_enabled; +} + diff --git a/include/linux/sysrq.h b/include/linux/sysrq.h --- a/include/linux/sysrq.h +++ b/include/linux/sysrq.h +int sysrq_mask(void); +static inline int sysrq_mask(void) +{ + /* magic sysrq disabled mask */ + return 0; +} + diff --git a/kernel/sysctl.c b/kernel/sysctl.c --- a/kernel/sysctl.c +++ b/kernel/sysctl.c -/* note: sysrq code uses its own private copy */ -static int __sysrq_enabled = config_magic_sysrq_default_enable; - - void __user *buffer, size_t *lenp, - loff_t *ppos) -{ - int error; - - error = proc_dointvec(table, write, buffer, lenp, ppos); - if (error) - return error; - - if (write) - sysrq_toggle_support(__sysrq_enabled); - - return 0; -} - + void __user *buffer, size_t *lenp, loff_t *ppos); - .data = &__sysrq_enabled, + .data = null, +#ifdef config_magic_sysrq +static int sysrq_sysctl_handler(struct ctl_table *table, int write, + void __user *buffer, size_t *lenp, loff_t *ppos) +{ + int tmp, ret; + + tmp = sysrq_mask(); + + ret = __do_proc_dointvec(&tmp, table, write, buffer, + lenp, ppos, null, null); + if (ret || !write) + return ret; + + if (write) + sysrq_toggle_support(tmp); + + return 0; +} +#endif +
|
Serial
|
eaee41727e6d8a7d2b94421c25e82b00cb2fded5
|
dmitry safonov
|
include
|
linux
| |
tty: imx serial: implement support for reversing tx and rx polarity
|
the peripheral has support for inverting its input and/or output signals. this is useful if the hardware flips polarity of the peripheral's signal, such as swapped +/- pins on an rs-422 transceiver, or an inverting level shifter. add support for these control registers via the device tree binding.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
implement support for reversing tx and rx polarity
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['imx serial']
|
['c']
| 1
| 28
| 16
|
--- diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c --- a/drivers/tty/serial/imx.c +++ b/drivers/tty/serial/imx.c + unsigned int inverted_tx:1; + unsigned int inverted_rx:1; - u32 ucr1, ucr2, ucr4; + u32 ucr1, ucr2, ucr3, ucr4; - ucr4 = imx_uart_readl(sport, ucr4) & ~ucr4_oren; + ucr4 = imx_uart_readl(sport, ucr4) & ~(ucr4_oren | ucr4_invr); + if (sport->inverted_rx) + ucr4 |= ucr4_invr; + ucr3 = imx_uart_readl(sport, ucr3) & ~ucr3_invt; + /* + * configure tx polarity before enabling tx + */ + if (sport->inverted_tx) + ucr3 |= ucr3_invt; + + if (!imx_uart_is_imx1(sport)) { + ucr3 |= ucr3_dtrden | ucr3_ri | ucr3_dcd; + + if (sport->dte_mode) + /* disable broken interrupts */ + ucr3 &= ~(ucr3_ri | ucr3_dcd); + } + imx_uart_writel(sport, ucr3, ucr3); + - if (!imx_uart_is_imx1(sport)) { - u32 ucr3; - - ucr3 = imx_uart_readl(sport, ucr3); - - ucr3 |= ucr3_dtrden | ucr3_ri | ucr3_dcd; - - if (sport->dte_mode) - /* disable broken interrupts */ - ucr3 &= ~(ucr3_ri | ucr3_dcd); - - imx_uart_writel(sport, ucr3, ucr3); - } - + if (of_get_property(np, "fsl,inverted-tx", null)) + sport->inverted_tx = 1; + + if (of_get_property(np, "fsl,inverted-rx", null)) + sport->inverted_rx = 1; +
|
Serial
|
5a08a4877aed53ba92ffef6b1e24fb092a490757
|
george hilliard
|
drivers
|
tty
|
serial
|
tty: serial: add console_poll support to sifive uart
|
add console_poll support for future kgdb porting.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add console_poll support to sifive uart
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
[]
|
['c']
| 1
| 27
| 0
|
--- diff --git a/drivers/tty/serial/sifive.c b/drivers/tty/serial/sifive.c --- a/drivers/tty/serial/sifive.c +++ b/drivers/tty/serial/sifive.c +#ifdef config_console_poll +static int sifive_serial_poll_get_char(struct uart_port *port) +{ + struct sifive_serial_port *ssp = port_to_sifive_serial_port(port); + char is_empty, ch; + + ch = __ssp_receive_char(ssp, &is_empty); + if (is_empty) + return no_poll_char; + + return ch; +} + +static void sifive_serial_poll_put_char(struct uart_port *port, + unsigned char c) +{ + struct sifive_serial_port *ssp = port_to_sifive_serial_port(port); + + __ssp_wait_for_xmitr(ssp); + __ssp_transmit_char(ssp, c); +} +#endif /* config_console_poll */ + +#ifdef config_console_poll + .poll_get_char = sifive_serial_poll_get_char, + .poll_put_char = sifive_serial_poll_put_char, +#endif
|
Serial
|
630db5cbc7b444bf47cd717906abb092a2ab5724
|
vincent chen
|
drivers
|
tty
|
serial
|
tty: serial: fsl_lpuart: add ls1028a earlycon support
|
add a early_console_setup() for the ls1028a soc with 32bit, little endian access. if the bootloader does a fixup of the clock-frequency node the baudrate divisor register will automatically be set.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add ls1028a earlycon support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['fsl_lpuart']
|
['c']
| 1
| 43
| 8
|
--- diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c --- a/drivers/tty/serial/fsl_lpuart.c +++ b/drivers/tty/serial/fsl_lpuart.c -static void -lpuart32_serial_setbrg(struct lpuart_port *sport, unsigned int baudrate) +static void __lpuart32_serial_setbrg(struct uart_port *port, + unsigned int baudrate, bool use_rx_dma, + bool use_tx_dma) - u32 clk = sport->port.uartclk; + u32 clk = port->uartclk; - dev_warn(sport->port.dev, + dev_warn(port->dev, - tmp = lpuart32_read(&sport->port, uartbaud); + tmp = lpuart32_read(port, uartbaud); - if (!sport->lpuart_dma_rx_use) + if (!use_rx_dma) - if (!sport->lpuart_dma_tx_use) + if (!use_tx_dma) - lpuart32_write(&sport->port, tmp, uartbaud); + lpuart32_write(port, tmp, uartbaud); +} + +static void lpuart32_serial_setbrg(struct lpuart_port *sport, + unsigned int baudrate) +{ + __lpuart32_serial_setbrg(&sport->port, baudrate, + sport->lpuart_dma_rx_use, + sport->lpuart_dma_tx_use); + +static int __init ls1028a_early_console_setup(struct earlycon_device *device, + const char *opt) +{ + u32 cr; + + if (!device->port.membase) + return -enodev; + + device->port.iotype = upio_mem32; + device->con->write = lpuart32_early_write; + + /* set the baudrate */ + if (device->port.uartclk && device->baud) + __lpuart32_serial_setbrg(&device->port, device->baud, + false, false); + + /* enable transmitter */ + cr = lpuart32_read(&device->port, uartctrl); + cr |= uartctrl_te; + lpuart32_write(&device->port, cr, uartctrl); + + return 0; +} + +of_earlycon_declare(lpuart32, "fsl,ls1028a-lpuart", ls1028a_early_console_setup);
|
Serial
|
e33253f3b74b5fb2a3436c26c56252a3a8159228
|
michael walle
|
drivers
|
tty
|
serial
|
tty: serial: fsl_lpuart: add ls1028a support
|
the ls1028a uses little endian register access and has a different fifo size encoding.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add ls1028a support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['fsl_lpuart']
|
['c']
| 1
| 25
| 2
|
--- diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c --- a/drivers/tty/serial/fsl_lpuart.c +++ b/drivers/tty/serial/fsl_lpuart.c + ls1028a_lpuart, -static const struct lpuart_soc_data ls_data = { +static const struct lpuart_soc_data ls1021a_data = { +static const struct lpuart_soc_data ls1028a_data = { + .devtype = ls1028a_lpuart, + .iotype = upio_mem32, +}; + - { .compatible = "fsl,ls1021a-lpuart", .data = &ls_data, }, + { .compatible = "fsl,ls1021a-lpuart", .data = &ls1021a_data, }, + { .compatible = "fsl,ls1028a-lpuart", .data = &ls1028a_data, }, +static inline bool is_ls1028a_lpuart(struct lpuart_port *sport) +{ + return sport->devtype == ls1028a_lpuart; +} + + /* + * the ls1028a has a fixed length of 16 words. although it supports the + * rx/txsize fields their encoding is different. eg the reference manual + * states 0b101 is 16 words. + */ + if (is_ls1028a_lpuart(sport)) { + sport->rxfifo_size = 16; + sport->txfifo_size = 16; + sport->port.fifosize = sport->txfifo_size; + } +
|
Serial
|
c2f448cff22a7ed09281f02bde084b0ce3bc61ed
|
michael walle
|
drivers
|
tty
|
serial
|
serial: 8250: support console on software emulated rs485 ports
|
commit e490c9144cfa ("tty: add software emulated rs485 support for 8250") introduced support to use rts as an rs485 transmit enable signal if data is transmitted through the tty layer.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
support console on software emulated rs485 ports
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['8250']
|
['c']
| 1
| 13
| 0
|
--- diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c --- a/drivers/tty/serial/8250/8250_port.c +++ b/drivers/tty/serial/8250/8250_port.c + struct uart_8250_em485 *em485 = up->em485; + if (em485) { + if (em485->tx_stopped) + up->rs485_start_tx(up); + mdelay(port->rs485.delay_rts_before_send); + } + + if (em485) { + mdelay(port->rs485.delay_rts_before_send); + if (em485->tx_stopped) + up->rs485_stop_tx(up); + } +
|
Serial
|
7f9803072ff636fc22ad941ff059e020e9d77ed4
|
lukas wunner
|
drivers
|
tty
|
8250, serial
|
serial: 8250_bcm2835aux: support rs485 software emulation
|
amend 8250_bcm2835aux.c to support rs485 as introduced for 8250_omap.c by commit e490c9144cfa ("tty: add software emulated rs485 support for 8250").
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
support rs485 software emulation
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['8250_bcm2835aux']
|
['c']
| 1
| 60
| 2
|
--- diff --git a/drivers/tty/serial/8250/8250_bcm2835aux.c b/drivers/tty/serial/8250/8250_bcm2835aux.c --- a/drivers/tty/serial/8250/8250_bcm2835aux.c +++ b/drivers/tty/serial/8250/8250_bcm2835aux.c + * + * the bcm2835aux is capable of rts auto flow-control, but this driver doesn't + * take advantage of it yet. when adding support, be sure not to enable it + * simultaneously to rs485. +#define bcm2835_aux_uart_cntl 8 +#define bcm2835_aux_uart_cntl_rxen 0x01 /* receiver enable */ +#define bcm2835_aux_uart_cntl_txen 0x02 /* transmitter enable */ +#define bcm2835_aux_uart_cntl_autorts 0x04 /* rts set by rx fill level */ +#define bcm2835_aux_uart_cntl_autocts 0x08 /* cts stops transmitter */ +#define bcm2835_aux_uart_cntl_rts3 0x00 /* rts set until 3 chars left */ +#define bcm2835_aux_uart_cntl_rts2 0x10 /* rts set until 2 chars left */ +#define bcm2835_aux_uart_cntl_rts1 0x20 /* rts set until 1 chars left */ +#define bcm2835_aux_uart_cntl_rts4 0x30 /* rts set until 4 chars left */ +#define bcm2835_aux_uart_cntl_rtsinv 0x40 /* invert auto rts polarity */ +#define bcm2835_aux_uart_cntl_ctsinv 0x80 /* invert auto cts polarity */ + + * @cntl: cached copy of cntl register + u32 cntl; +static void bcm2835aux_rs485_start_tx(struct uart_8250_port *up) +{ + if (!(up->port.rs485.flags & ser_rs485_rx_during_tx)) { + struct bcm2835aux_data *data = dev_get_drvdata(up->port.dev); + + data->cntl &= ~bcm2835_aux_uart_cntl_rxen; + serial_out(up, bcm2835_aux_uart_cntl, data->cntl); + } + + /* + * on the bcm2835aux, the mcr register contains no other + * flags besides rts. so no need for a read-modify-write. + */ + if (up->port.rs485.flags & ser_rs485_rts_on_send) + serial8250_out_mcr(up, 0); + else + serial8250_out_mcr(up, uart_mcr_rts); +} + +static void bcm2835aux_rs485_stop_tx(struct uart_8250_port *up) +{ + if (up->port.rs485.flags & ser_rs485_rts_after_send) + serial8250_out_mcr(up, 0); + else + serial8250_out_mcr(up, uart_mcr_rts); + + if (!(up->port.rs485.flags & ser_rs485_rx_during_tx)) { + struct bcm2835aux_data *data = dev_get_drvdata(up->port.dev); + + data->cntl |= bcm2835_aux_uart_cntl_rxen; + serial_out(up, bcm2835_aux_uart_cntl, data->cntl); + } +} + + up.port.rs485_config = serial8250_em485_config; + up.rs485_start_tx = bcm2835aux_rs485_start_tx; + up.rs485_stop_tx = bcm2835aux_rs485_stop_tx; + + /* initialize cached copy with power-on reset value */ + data->cntl = bcm2835_aux_uart_cntl_rxen | bcm2835_aux_uart_cntl_txen; + + platform_set_drvdata(pdev, data); - platform_set_drvdata(pdev, data); -
|
Serial
|
f93bf75891147602d55b90937628157cc13dbdb8
|
lukas wunner
|
drivers
|
tty
|
8250, serial
|
serial: 8250_early: add earlycon for bcm2835 aux uart
|
define the of early console for bcm2835 aux uart, which can be enabled by passing "earlycon" on the boot command line. this uart is found on bcm283x and bcm27xx socs, a.k.a. raspberry pi in its variants.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add earlycon for bcm2835 aux uart
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['8250_early']
|
['c']
| 1
| 18
| 0
|
--- diff --git a/drivers/tty/serial/8250/8250_bcm2835aux.c b/drivers/tty/serial/8250/8250_bcm2835aux.c --- a/drivers/tty/serial/8250/8250_bcm2835aux.c +++ b/drivers/tty/serial/8250/8250_bcm2835aux.c +#ifdef config_serial_8250_console + +static int __init early_bcm2835aux_setup(struct earlycon_device *device, + const char *options) +{ + if (!device->port.membase) + return -enodev; + + device->port.iotype = upio_mem32; + device->port.regshift = 2; + + return early_serial8250_setup(device, null); +} + +of_earlycon_declare(bcm2835aux, "brcm,bcm2835-aux-uart", + early_bcm2835aux_setup); +#endif +
|
Serial
|
57b76faf1d7860f070a1ee2d0b7eccd9f37ecc55
|
matthias brugger
|
drivers
|
tty
|
8250, serial
|
serial: 8250_tegra: create tegra specific 8250 driver
|
to support booting nvidia tegra platforms with either device-tree or acpi, create a tegra specific 8250 serial driver that supports both firmware types. another benefit from doing this, is that the tegra specific codec in the generic open firmware 8250 driver can now be removed.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
create tegra specific 8250 driver
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['8250_tegra']
|
['kconfig', 'c', 'makefile']
| 4
| 208
| 28
|
--- diff --git a/drivers/tty/serial/8250/8250_of.c b/drivers/tty/serial/8250/8250_of.c --- a/drivers/tty/serial/8250/8250_of.c +++ b/drivers/tty/serial/8250/8250_of.c -#include <linux/delay.h> -#ifdef config_arch_tegra -static void tegra_serial_handle_break(struct uart_port *p) -{ - unsigned int status, tmout = 10000; - - do { - status = p->serial_in(p, uart_lsr); - if (status & (uart_lsr_fifoe | uart_lsr_brk_error_bits)) - status = p->serial_in(p, uart_rx); - else - break; - if (--tmout == 0) - break; - udelay(1); - } while (1); -} -#else -static inline void tegra_serial_handle_break(struct uart_port *port) -{ -} -#endif - - case port_tegra: - port->handle_break = tegra_serial_handle_break; - break; - - { .compatible = "nvidia,tegra20-uart", .data = (void *)port_tegra, }, diff --git a/drivers/tty/serial/8250/8250_tegra.c b/drivers/tty/serial/8250/8250_tegra.c --- /dev/null +++ b/drivers/tty/serial/8250/8250_tegra.c +// spdx-license-identifier: gpl-2.0+ +/* + * serial port driver for tegra devices + * + * copyright (c) 2020, nvidia corporation. all rights reserved. + */ + +#include <linux/acpi.h> +#include <linux/clk.h> +#include <linux/console.h> +#include <linux/delay.h> +#include <linux/io.h> +#include <linux/module.h> +#include <linux/reset.h> +#include <linux/slab.h> + +#include "8250.h" + +struct tegra_uart { + struct clk *clk; + struct reset_control *rst; + int line; +}; + +static void tegra_uart_handle_break(struct uart_port *p) +{ + unsigned int status, tmout = 10000; + + do { + status = p->serial_in(p, uart_lsr); + if (status & (uart_lsr_fifoe | uart_lsr_brk_error_bits)) + status = p->serial_in(p, uart_rx); + else + break; + if (--tmout == 0) + break; + udelay(1); + } while (1); +} + +static int tegra_uart_probe(struct platform_device *pdev) +{ + struct uart_8250_port port8250; + struct tegra_uart *uart; + struct uart_port *port; + struct resource *res; + int ret; + + uart = devm_kzalloc(&pdev->dev, sizeof(*uart), gfp_kernel); + if (!uart) + return -enomem; + + memset(&port8250, 0, sizeof(port8250)); + + port = &port8250.port; + spin_lock_init(&port->lock); + + port->flags = upf_share_irq | upf_boot_autoconf | upf_fixed_port | + upf_fixed_type; + port->iotype = upio_mem32; + port->regshift = 2; + port->type = port_tegra; + port->irqflags |= irqf_shared; + port->dev = &pdev->dev; + port->handle_break = tegra_uart_handle_break; + + ret = of_alias_get_id(pdev->dev.of_node, "serial"); + if (ret >= 0) + port->line = ret; + + ret = platform_get_irq(pdev, 0); + if (ret < 0) + return ret; + + port->irq = ret; + + res = platform_get_resource(pdev, ioresource_mem, 0); + if (!res) + return -enodev; + + port->membase = devm_ioremap(&pdev->dev, res->start, + resource_size(res)); + if (!port->membase) + return -enomem; + + port->mapbase = res->start; + port->mapsize = resource_size(res); + + uart->rst = devm_reset_control_get_optional_shared(&pdev->dev, null); + if (is_err(uart->rst)) + return ptr_err(uart->rst); + + if (device_property_read_u32(&pdev->dev, "clock-frequency", + &port->uartclk)) { + uart->clk = devm_clk_get(&pdev->dev, null); + if (is_err(uart->clk)) { + dev_err(&pdev->dev, "failed to get clock! "); + return -enodev; + } + + ret = clk_prepare_enable(uart->clk); + if (ret < 0) + return ret; + + port->uartclk = clk_get_rate(uart->clk); + } + + ret = reset_control_deassert(uart->rst); + if (ret) + goto err_clkdisable; + + ret = serial8250_register_8250_port(&port8250); + if (ret < 0) + goto err_clkdisable; + + platform_set_drvdata(pdev, uart); + uart->line = ret; + + return 0; + +err_clkdisable: + clk_disable_unprepare(uart->clk); + + return ret; +} + +static int tegra_uart_remove(struct platform_device *pdev) +{ + struct tegra_uart *uart = platform_get_drvdata(pdev); + + serial8250_unregister_port(uart->line); + reset_control_assert(uart->rst); + clk_disable_unprepare(uart->clk); + + return 0; +} + +#ifdef config_pm_sleep +static int tegra_uart_suspend(struct device *dev) +{ + struct tegra_uart *uart = dev_get_drvdata(dev); + struct uart_8250_port *port8250 = serial8250_get_port(uart->line); + struct uart_port *port = &port8250->port; + + serial8250_suspend_port(uart->line); + + if (!uart_console(port) || console_suspend_enabled) + clk_disable_unprepare(uart->clk); + + return 0; +} + +static int tegra_uart_resume(struct device *dev) +{ + struct tegra_uart *uart = dev_get_drvdata(dev); + struct uart_8250_port *port8250 = serial8250_get_port(uart->line); + struct uart_port *port = &port8250->port; + + if (!uart_console(port) || console_suspend_enabled) + clk_prepare_enable(uart->clk); + + serial8250_resume_port(uart->line); + + return 0; +} +#endif + +static simple_dev_pm_ops(tegra_uart_pm_ops, tegra_uart_suspend, + tegra_uart_resume); + +static const struct of_device_id tegra_uart_of_match[] = { + { .compatible = "nvidia,tegra20-uart", }, + { }, +}; +module_device_table(of, tegra_uart_of_match); + +static const struct acpi_device_id tegra_uart_acpi_match[] = { + { "nvda0100", 0 }, + { }, +}; +module_device_table(acpi, tegra_uart_acpi_match); + +static struct platform_driver tegra_uart_driver = { + .driver = { + .name = "tegra-uart", + .pm = &tegra_uart_pm_ops, + .of_match_table = tegra_uart_of_match, + .acpi_match_table = acpi_ptr(tegra_uart_acpi_match), + }, + .probe = tegra_uart_probe, + .remove = tegra_uart_remove, +}; + +module_platform_driver(tegra_uart_driver); + +module_author("jeff brasen <jbrasen@nvidia.com>"); +module_description("nvidia tegra 8250 driver"); +module_license("gpl v2"); diff --git a/drivers/tty/serial/8250/kconfig b/drivers/tty/serial/8250/kconfig --- a/drivers/tty/serial/8250/kconfig +++ b/drivers/tty/serial/8250/kconfig +config serial_8250_tegra + tristate "8250 support for tegra serial ports" + default serial_8250 + depends on serial_8250 + depends on arch_tegra || compile_test + help + select this option if you have machine with an nvidia tegra soc and + wish to enable 8250 serial driver for the tegra serial interfaces. + diff --git a/drivers/tty/serial/8250/makefile b/drivers/tty/serial/8250/makefile --- a/drivers/tty/serial/8250/makefile +++ b/drivers/tty/serial/8250/makefile +obj-$(config_serial_8250_tegra) += 8250_tegra.o
|
Serial
|
c6825c6395b7dbcb5421d89ac8d5631be815ca36
|
jeff brasen
|
drivers
|
tty
|
8250, serial
|
serial: ar933x_uart: add rs485 support
|
emulate half-duplex operation and use mctrl_gpio to add support for rs485 tranceiver with transmit/receive switch hooked to rts gpio line. this is needed to make use of the rs485 port found on teltonika rut955.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add rs485 support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['ar933x_uart']
|
['kconfig', 'c']
| 2
| 108
| 6
|
--- diff --git a/drivers/tty/serial/kconfig b/drivers/tty/serial/kconfig --- a/drivers/tty/serial/kconfig +++ b/drivers/tty/serial/kconfig + select serial_mctrl_gpio if gpiolib diff --git a/drivers/tty/serial/ar933x_uart.c b/drivers/tty/serial/ar933x_uart.c --- a/drivers/tty/serial/ar933x_uart.c +++ b/drivers/tty/serial/ar933x_uart.c +#include <linux/gpio/consumer.h> +#include "serial_mctrl_gpio.h" + + struct mctrl_gpios *gpios; + struct gpio_desc *rts_gpiod; +static inline void ar933x_uart_start_rx_interrupt(struct ar933x_uart_port *up) +{ + up->ier |= ar933x_uart_int_rx_valid; + ar933x_uart_write(up, ar933x_uart_int_en_reg, up->ier); +} + +static inline void ar933x_uart_stop_rx_interrupt(struct ar933x_uart_port *up) +{ + up->ier &= ~ar933x_uart_int_rx_valid; + ar933x_uart_write(up, ar933x_uart_int_en_reg, up->ier); +} + - return tiocm_car; + struct ar933x_uart_port *up = + container_of(port, struct ar933x_uart_port, port); + int ret = tiocm_cts | tiocm_dsr | tiocm_car; + + mctrl_gpio_get(up->gpios, &ret); + + return ret; + struct ar933x_uart_port *up = + container_of(port, struct ar933x_uart_port, port); + + mctrl_gpio_set(up->gpios, mctrl); +static void ar933x_uart_wait_tx_complete(struct ar933x_uart_port *up) +{ + unsigned int status; + unsigned int timeout = 60000; + + /* wait up to 60ms for the character(s) to be sent. */ + do { + status = ar933x_uart_read(up, ar933x_uart_cs_reg); + if (--timeout == 0) + break; + udelay(1); + } while (status & ar933x_uart_cs_tx_busy); + + if (timeout == 0) + dev_err(up->port.dev, "waiting for tx timed out "); +} + +static void ar933x_uart_rx_flush(struct ar933x_uart_port *up) +{ + unsigned int status; + + /* clear rx_valid interrupt */ + ar933x_uart_write(up, ar933x_uart_int_reg, ar933x_uart_int_rx_valid); + + /* remove characters from the rx fifo */ + do { + ar933x_uart_write(up, ar933x_uart_data_reg, ar933x_uart_data_rx_csr); + status = ar933x_uart_read(up, ar933x_uart_data_reg); + } while (status & ar933x_uart_data_rx_csr); +} + - up->ier &= ~ar933x_uart_int_rx_valid; - ar933x_uart_write(up, ar933x_uart_int_en_reg, up->ier); + ar933x_uart_stop_rx_interrupt(up); + struct serial_rs485 *rs485conf = &up->port.rs485; + bool half_duplex_send = false; + if ((rs485conf->flags & ser_rs485_enabled) && + (up->port.x_char || !uart_circ_empty(xmit))) { + ar933x_uart_stop_rx_interrupt(up); + gpiod_set_value(up->rts_gpiod, !!(rs485conf->flags & ser_rs485_rts_on_send)); + half_duplex_send = true; + } + - if (!uart_circ_empty(xmit)) + if (!uart_circ_empty(xmit)) { + } else if (half_duplex_send) { + ar933x_uart_wait_tx_complete(up); + ar933x_uart_rx_flush(up); + ar933x_uart_start_rx_interrupt(up); + gpiod_set_value(up->rts_gpiod, !!(rs485conf->flags & ser_rs485_rts_after_send)); + } - up->ier = ar933x_uart_int_rx_valid; - ar933x_uart_write(up, ar933x_uart_int_en_reg, up->ier); + ar933x_uart_start_rx_interrupt(up); +static int ar933x_config_rs485(struct uart_port *port, + struct serial_rs485 *rs485conf) +{ + struct ar933x_uart_port *up = + container_of(port, struct ar933x_uart_port, port); + + if ((rs485conf->flags & ser_rs485_enabled) && + !up->rts_gpiod) { + dev_err(port->dev, "rs485 needs rts-gpio "); + return 1; + } + port->rs485 = *rs485conf; + return 0; +} + + uart_get_rs485_mode(&pdev->dev, &port->rs485); + + port->rs485_config = ar933x_config_rs485; + up->gpios = mctrl_gpio_init(port, 0); + if (is_err(up->gpios) && ptr_err(up->gpios) != -enosys) + return ptr_err(up->gpios); + + up->rts_gpiod = mctrl_gpio_to_gpiod(up->gpios, uart_gpio_rts); + + if ((port->rs485.flags & ser_rs485_enabled) && + !up->rts_gpiod) { + dev_err(&pdev->dev, "lacking rts-gpio, disabling rs485 "); + port->rs485.flags &= ~ser_rs485_enabled; + } +
|
Serial
|
9be1064fe524b396cca449b2fe4252b7919a245f
|
daniel golle
|
drivers
|
tty
|
serial
|
cpufreq: ti-cpufreq: add support for opp_plus
|
dra762 soc introduces opp_plus which runs at 1.8ghz. add support for this opp in ti-cpufreq driver.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add support for opp_plus
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['ti-cpufreq']
|
['c']
| 1
| 7
| 0
|
--- diff --git a/drivers/cpufreq/ti-cpufreq.c b/drivers/cpufreq/ti-cpufreq.c --- a/drivers/cpufreq/ti-cpufreq.c +++ b/drivers/cpufreq/ti-cpufreq.c +#define dra76_efuse_has_plus_mpu_opp 18 +#define dra76_efuse_has_all_mpu_opp 24 +#define dra76_efuse_plus_mpu_opp bit(3) + case dra76_efuse_has_plus_mpu_opp: + case dra76_efuse_has_all_mpu_opp: + calculated_efuse |= dra76_efuse_plus_mpu_opp; + /* fall through */
|
CPU frequency scaling
|
0ea4fb29c68950fbeea4e507e3c59ea35bb98ffd
|
lokesh vutla dave gerlach d gerlach ti com
|
drivers
|
cpufreq
| |
cpufreq: qcom: add support for krait based socs
|
in certain qcom socs like ipq8064, apq8064, msm8960, msm8974 that has krait processors the voltage/current value of each opp varies based on the silicon variant in use.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add support for krait based socs
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['qcom']
|
['txt', 'c', 'arm']
| 4
| 183
| 18
|
--- diff --git a/documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt b/documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt --- a/documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt +++ b/documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt - compatible: should be - - 'operating-points-v2-kryo-cpu' for apq8096 and msm8996. + - 'operating-points-v2-kryo-cpu' for apq8096, msm8996, msm8974, + apq8064, ipq8064, msm8960 and ipq8074. -------------------- diff --git a/drivers/cpufreq/kconfig.arm b/drivers/cpufreq/kconfig.arm --- a/drivers/cpufreq/kconfig.arm +++ b/drivers/cpufreq/kconfig.arm - depends on arm64 + depends on arch_qcom diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c --- a/drivers/cpufreq/cpufreq-dt-platdev.c +++ b/drivers/cpufreq/cpufreq-dt-platdev.c + { .compatible = "qcom,ipq8064", }, + { .compatible = "qcom,apq8064", }, + { .compatible = "qcom,msm8974", }, + { .compatible = "qcom,msm8960", }, + diff --git a/drivers/cpufreq/qcom-cpufreq-nvmem.c b/drivers/cpufreq/qcom-cpufreq-nvmem.c --- a/drivers/cpufreq/qcom-cpufreq-nvmem.c +++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c + char **pvs_name, - struct opp_table **opp_tables; + struct opp_table **names_opp_tables; + struct opp_table **hw_opp_tables; +static void get_krait_bin_format_a(struct device *cpu_dev, + int *speed, int *pvs, int *pvs_ver, + struct nvmem_cell *pvs_nvmem, u8 *buf) +{ + u32 pte_efuse; + + pte_efuse = *((u32 *)buf); + + *speed = pte_efuse & 0xf; + if (*speed == 0xf) + *speed = (pte_efuse >> 4) & 0xf; + + if (*speed == 0xf) { + *speed = 0; + dev_warn(cpu_dev, "speed bin: defaulting to %d ", *speed); + } else { + dev_dbg(cpu_dev, "speed bin: %d ", *speed); + } + + *pvs = (pte_efuse >> 10) & 0x7; + if (*pvs == 0x7) + *pvs = (pte_efuse >> 13) & 0x7; + + if (*pvs == 0x7) { + *pvs = 0; + dev_warn(cpu_dev, "pvs bin: defaulting to %d ", *pvs); + } else { + dev_dbg(cpu_dev, "pvs bin: %d ", *pvs); + } +} + +static void get_krait_bin_format_b(struct device *cpu_dev, + int *speed, int *pvs, int *pvs_ver, + struct nvmem_cell *pvs_nvmem, u8 *buf) +{ + u32 pte_efuse, redundant_sel; + + pte_efuse = *((u32 *)buf); + redundant_sel = (pte_efuse >> 24) & 0x7; + + *pvs_ver = (pte_efuse >> 4) & 0x3; + + switch (redundant_sel) { + case 1: + *pvs = ((pte_efuse >> 28) & 0x8) | ((pte_efuse >> 6) & 0x7); + *speed = (pte_efuse >> 27) & 0xf; + break; + case 2: + *pvs = (pte_efuse >> 27) & 0xf; + *speed = pte_efuse & 0x7; + break; + default: + /* 4 bits of pvs are in efuse register bits 31, 8-6. */ + *pvs = ((pte_efuse >> 28) & 0x8) | ((pte_efuse >> 6) & 0x7); + *speed = pte_efuse & 0x7; + } + + /* check speed_bin_blow_status */ + if (pte_efuse & bit(3)) { + dev_dbg(cpu_dev, "speed bin: %d ", *speed); + } else { + dev_warn(cpu_dev, "speed bin not set. defaulting to 0! "); + *speed = 0; + } + + /* check pvs_blow_status */ + pte_efuse = *(((u32 *)buf) + 4); + pte_efuse &= bit(21); + if (pte_efuse) { + dev_dbg(cpu_dev, "pvs bin: %d ", *pvs); + } else { + dev_warn(cpu_dev, "pvs bin not set. defaulting to 0! "); + *pvs = 0; + } + + dev_dbg(cpu_dev, "pvs version: %d ", *pvs_ver); +} + + char **pvs_name, + *pvs_name = null; +static int qcom_cpufreq_krait_name_version(struct device *cpu_dev, + struct nvmem_cell *speedbin_nvmem, + char **pvs_name, + struct qcom_cpufreq_drv *drv) +{ + int speed = 0, pvs = 0, pvs_ver = 0; + u8 *speedbin; + size_t len; + + speedbin = nvmem_cell_read(speedbin_nvmem, &len); + + if (is_err(speedbin)) + return ptr_err(speedbin); + + switch (len) { + case 4: + get_krait_bin_format_a(cpu_dev, &speed, &pvs, &pvs_ver, + speedbin_nvmem, speedbin); + break; + case 8: + get_krait_bin_format_b(cpu_dev, &speed, &pvs, &pvs_ver, + speedbin_nvmem, speedbin); + break; + default: + dev_err(cpu_dev, "unable to read nvmem data. defaulting to 0! "); + return -enodev; + } + + snprintf(*pvs_name, sizeof("speedxx-pvsxx-vxx"), "speed%d-pvs%d-v%d", + speed, pvs, pvs_ver); + + drv->versions = (1 << speed); + + kfree(speedbin); + return 0; +} + +static const struct qcom_cpufreq_match_data match_data_krait = { + .get_version = qcom_cpufreq_krait_name_version, +}; + + char *pvs_name = "speedxx-pvsxx-vxx"; - ret = of_device_is_compatible(np, "operating-points-v2-kryo-cpu"); + ret = of_device_is_compatible(np, "operating-points-v2-qcom-cpu"); - ret = drv->data->get_version(cpu_dev, speedbin_nvmem, drv); + ret = drv->data->get_version(cpu_dev, + speedbin_nvmem, &pvs_name, drv); - drv->opp_tables = kcalloc(num_possible_cpus(), sizeof(*drv->opp_tables), + drv->names_opp_tables = kcalloc(num_possible_cpus(), + sizeof(*drv->names_opp_tables), - if (!drv->opp_tables) { + if (!drv->names_opp_tables) { + drv->hw_opp_tables = kcalloc(num_possible_cpus(), + sizeof(*drv->hw_opp_tables), + gfp_kernel); + if (!drv->hw_opp_tables) { + ret = -enomem; + goto free_opp_names; + } - drv->opp_tables[cpu] = - dev_pm_opp_set_supported_hw(cpu_dev, - &drv->versions, 1); - if (is_err(drv->opp_tables[cpu])) { - ret = ptr_err(drv->opp_tables[cpu]); + + if (pvs_name) { + drv->names_opp_tables[cpu] = dev_pm_opp_set_prop_name( + cpu_dev, + pvs_name); + if (is_err(drv->names_opp_tables[cpu])) { + ret = ptr_err(drv->names_opp_tables[cpu]); + dev_err(cpu_dev, "failed to add opp name %s ", + pvs_name); + goto free_opp; + } + } + + drv->hw_opp_tables[cpu] = dev_pm_opp_set_supported_hw( + cpu_dev, &drv->versions, 1); + if (is_err(drv->hw_opp_tables[cpu])) { + ret = ptr_err(drv->hw_opp_tables[cpu]); - if (is_err_or_null(drv->opp_tables[cpu])) + if (is_err_or_null(drv->names_opp_tables[cpu])) + break; + dev_pm_opp_put_prop_name(drv->names_opp_tables[cpu]); + } + for_each_possible_cpu(cpu) { + if (is_err_or_null(drv->hw_opp_tables[cpu])) - dev_pm_opp_put_supported_hw(drv->opp_tables[cpu]); + dev_pm_opp_put_supported_hw(drv->hw_opp_tables[cpu]); - kfree(drv->opp_tables); + kfree(drv->hw_opp_tables); +free_opp_names: + kfree(drv->names_opp_tables); - if (drv->opp_tables[cpu]) - dev_pm_opp_put_supported_hw(drv->opp_tables[cpu]); + if (drv->names_opp_tables[cpu]) + dev_pm_opp_put_supported_hw(drv->names_opp_tables[cpu]); + if (drv->hw_opp_tables[cpu]) + dev_pm_opp_put_supported_hw(drv->hw_opp_tables[cpu]); - kfree(drv->opp_tables); + kfree(drv->names_opp_tables); + kfree(drv->hw_opp_tables); + { .compatible = "qcom,ipq8064", .data = &match_data_krait }, + { .compatible = "qcom,apq8064", .data = &match_data_krait }, + { .compatible = "qcom,msm8974", .data = &match_data_krait }, + { .compatible = "qcom,msm8960", .data = &match_data_krait },
|
CPU frequency scaling
|
a8811ec764f95a04ba82f6f457e28c5e9e36e36b
|
ansuel smith
|
documentation
|
devicetree
|
bindings, opp
|
regulator: add smb208 support
|
smb208 regulators are used on some ipq806x soc. add support for it to make it avaiable on some routers that use it.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add smb208 support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
[]
|
['txt', 'c']
| 2
| 13
| 0
|
--- diff --git a/documentation/devicetree/bindings/mfd/qcom-rpm.txt b/documentation/devicetree/bindings/mfd/qcom-rpm.txt --- a/documentation/devicetree/bindings/mfd/qcom-rpm.txt +++ b/documentation/devicetree/bindings/mfd/qcom-rpm.txt + "qcom,rpm-smb208-regulators" - vdd_l0_l1_lvs-supply: - vdd_l2_l11_l12-supply: +smb208: + s1a, s1b, s2a, s2b + diff --git a/drivers/regulator/qcom_rpm-regulator.c b/drivers/regulator/qcom_rpm-regulator.c --- a/drivers/regulator/qcom_rpm-regulator.c +++ b/drivers/regulator/qcom_rpm-regulator.c +static const struct rpm_regulator_data rpm_smb208_regulators[] = { + { "s1a", qcom_rpm_smb208_s1a, &smb208_smps, "vin_s1a" }, + { "s1b", qcom_rpm_smb208_s1b, &smb208_smps, "vin_s1b" }, + { "s2a", qcom_rpm_smb208_s2a, &smb208_smps, "vin_s2a" }, + { "s2b", qcom_rpm_smb208_s2b, &smb208_smps, "vin_s2b" }, + { } +}; + + { .compatible = "qcom,rpm-smb208-regulators", .data = &rpm_smb208_regulators },
|
Voltage, current regulators, power capping, power supply
|
b5f25304aece9f2e7eaab275bbb5461c666bf38c
|
ansuel smith lee jones lee jones linaro org
|
documentation
|
devicetree
|
bindings, mfd
|
regulator: add support for mp8869 regulator
|
the mp8869 from monolithic power systems is a single output dc/dc converter. the voltage can be controlled via i2c.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add support for mp8869 regulator
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
[]
|
['kconfig', 'c', 'makefile']
| 3
| 238
| 0
|
--- diff --git a/drivers/regulator/kconfig b/drivers/regulator/kconfig --- a/drivers/regulator/kconfig +++ b/drivers/regulator/kconfig +config regulator_mp886x + tristate "mps mp8869 regulator driver" + depends on i2c && (of || compile_test) + select regmap_i2c + help + this driver supports the mp8869 voltage regulator. + diff --git a/drivers/regulator/makefile b/drivers/regulator/makefile --- a/drivers/regulator/makefile +++ b/drivers/regulator/makefile +obj-$(config_regulator_mp886x) += mp886x.o diff --git a/drivers/regulator/mp886x.c b/drivers/regulator/mp886x.c --- /dev/null +++ b/drivers/regulator/mp886x.c +// spdx-license-identifier: gpl-2.0 +// +// mp8869 regulator driver +// +// copyright (c) 2020 synaptics incorporated +// +// author: jisheng zhang <jszhang@kernel.org> + +#include <linux/gpio/consumer.h> +#include <linux/i2c.h> +#include <linux/module.h> +#include <linux/of_device.h> +#include <linux/regmap.h> +#include <linux/regulator/driver.h> +#include <linux/regulator/of_regulator.h> + +#define mp886x_vsel 0x00 +#define mp886x_v_boot (1 << 7) +#define mp886x_syscntlreg1 0x01 +#define mp886x_mode (1 << 0) +#define mp886x_go (1 << 6) +#define mp886x_en (1 << 7) + +struct mp886x_device_info { + struct device *dev; + struct regulator_desc desc; + struct regulator_init_data *regulator; + struct gpio_desc *en_gpio; + u32 r[2]; + unsigned int sel; +}; + +static int mp886x_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + switch (mode) { + case regulator_mode_fast: + regmap_update_bits(rdev->regmap, mp886x_syscntlreg1, + mp886x_mode, mp886x_mode); + break; + case regulator_mode_normal: + regmap_update_bits(rdev->regmap, mp886x_syscntlreg1, + mp886x_mode, 0); + break; + default: + return -einval; + } + return 0; +} + +static unsigned int mp886x_get_mode(struct regulator_dev *rdev) +{ + u32 val; + int ret; + + ret = regmap_read(rdev->regmap, mp886x_syscntlreg1, &val); + if (ret < 0) + return ret; + if (val & mp886x_mode) + return regulator_mode_fast; + else + return regulator_mode_normal; +} + +static int mp8869_set_voltage_sel(struct regulator_dev *rdev, unsigned int sel) +{ + int ret; + + ret = regmap_update_bits(rdev->regmap, mp886x_syscntlreg1, + mp886x_go, mp886x_go); + if (ret < 0) + return ret; + + sel <<= ffs(rdev->desc->vsel_mask) - 1; + return regmap_update_bits(rdev->regmap, rdev->desc->vsel_reg, + mp886x_v_boot | rdev->desc->vsel_mask, sel); +} + +static inline unsigned int mp8869_scale(unsigned int uv, u32 r1, u32 r2) +{ + u32 tmp = uv * r1 / r2; + + return uv + tmp; +} + +static int mp8869_get_voltage_sel(struct regulator_dev *rdev) +{ + struct mp886x_device_info *di = rdev_get_drvdata(rdev); + int ret, uv; + unsigned int val; + bool fbloop; + + ret = regmap_read(rdev->regmap, rdev->desc->vsel_reg, &val); + if (ret) + return ret; + + fbloop = val & mp886x_v_boot; + if (fbloop) { + uv = rdev->desc->min_uv; + uv = mp8869_scale(uv, di->r[0], di->r[1]); + return regulator_map_voltage_linear(rdev, uv, uv); + } + + val &= rdev->desc->vsel_mask; + val >>= ffs(rdev->desc->vsel_mask) - 1; + + return val; +} + +static const struct regulator_ops mp8869_regulator_ops = { + .set_voltage_sel = mp8869_set_voltage_sel, + .get_voltage_sel = mp8869_get_voltage_sel, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .map_voltage = regulator_map_voltage_linear, + .list_voltage = regulator_list_voltage_linear, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_mode = mp886x_set_mode, + .get_mode = mp886x_get_mode, +}; + +static int mp886x_regulator_register(struct mp886x_device_info *di, + struct regulator_config *config) +{ + struct regulator_desc *rdesc = &di->desc; + struct regulator_dev *rdev; + + rdesc->name = "mp886x-reg"; + rdesc->supply_name = "vin"; + rdesc->ops = of_device_get_match_data(di->dev); + rdesc->type = regulator_voltage; + rdesc->n_voltages = 128; + rdesc->enable_reg = mp886x_syscntlreg1; + rdesc->enable_mask = mp886x_en; + rdesc->min_uv = 600000; + rdesc->uv_step = 10000; + rdesc->vsel_reg = mp886x_vsel; + rdesc->vsel_mask = 0x3f; + rdesc->owner = this_module; + + rdev = devm_regulator_register(di->dev, &di->desc, config); + if (is_err(rdev)) + return ptr_err(rdev); + di->sel = rdesc->ops->get_voltage_sel(rdev); + return 0; +} + +static const struct regmap_config mp886x_regmap_config = { + .reg_bits = 8, + .val_bits = 8, +}; + +static int mp886x_i2c_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct device *dev = &client->dev; + struct device_node *np = dev->of_node; + struct mp886x_device_info *di; + struct regulator_config config = { }; + struct regmap *regmap; + int ret; + + di = devm_kzalloc(dev, sizeof(struct mp886x_device_info), gfp_kernel); + if (!di) + return -enomem; + + di->regulator = of_get_regulator_init_data(dev, np, &di->desc); + if (!di->regulator) { + dev_err(dev, "platform data not found! "); + return -einval; + } + + ret = of_property_read_u32_array(np, "mps,fb-voltage-divider", + di->r, 2); + if (ret) + return ret; + + di->en_gpio = devm_gpiod_get(dev, "enable", gpiod_out_high); + if (is_err(di->en_gpio)) + return ptr_err(di->en_gpio); + + di->dev = dev; + + regmap = devm_regmap_init_i2c(client, &mp886x_regmap_config); + if (is_err(regmap)) { + dev_err(dev, "failed to allocate regmap! "); + return ptr_err(regmap); + } + i2c_set_clientdata(client, di); + + config.dev = di->dev; + config.init_data = di->regulator; + config.regmap = regmap; + config.driver_data = di; + config.of_node = np; + + ret = mp886x_regulator_register(di, &config); + if (ret < 0) + dev_err(dev, "failed to register regulator! "); + return ret; +} + +static const struct of_device_id mp886x_dt_ids[] = { + { + .compatible = "mps,mp8869", + .data = &mp8869_regulator_ops + }, + { } +}; +module_device_table(of, mp886x_dt_ids); + +static const struct i2c_device_id mp886x_id[] = { + { "mp886x", }, + { }, +}; +module_device_table(i2c, mp886x_id); + +static struct i2c_driver mp886x_regulator_driver = { + .driver = { + .name = "mp886x-regulator", + .of_match_table = of_match_ptr(mp886x_dt_ids), + }, + .probe = mp886x_i2c_probe, + .id_table = mp886x_id, +}; +module_i2c_driver(mp886x_regulator_driver); + +module_author("jisheng zhang <jszhang@kernel.org>"); +module_description("mp886x regulator driver"); +module_license("gpl v2");
|
Voltage, current regulators, power capping, power supply
|
97be82880b617fb6bc06ff19e3ddb039501b2dcf
|
jisheng zhang
|
drivers
|
regulator
| |
regulator: mp5416: add mp5416 regulator driver
|
adding regulator driver for the device mp5416. the mp5416 pmic device contains four dc-dc buck converters and five regulators, accessed over i2c.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add mp5416 regulator driver
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['mp5416']
|
['kconfig', 'c', 'makefile']
| 3
| 256
| 0
|
--- diff --git a/drivers/regulator/kconfig b/drivers/regulator/kconfig --- a/drivers/regulator/kconfig +++ b/drivers/regulator/kconfig +config regulator_mp5416 + tristate "monolithic mp5416 pmic" + depends on i2c && of + select regmap_i2c + help + say y here to support the mp5416 pmic. this will enable supports + the software controllable 4 buck and 4 ldo regulators. + say m here if you want to include support for the regulator as a + module. + diff --git a/drivers/regulator/makefile b/drivers/regulator/makefile --- a/drivers/regulator/makefile +++ b/drivers/regulator/makefile +obj-$(config_regulator_mp5416) += mp5416.o diff --git a/drivers/regulator/mp5416.c b/drivers/regulator/mp5416.c --- /dev/null +++ b/drivers/regulator/mp5416.c +// spdx-license-identifier: gpl-2.0+ +// +// mp5416.c - regulator driver for mps mp5416 +// +// copyright 2020 monolithic power systems, inc +// +// author: saravanan sekar <sravanhome@gmail.com> + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/init.h> +#include <linux/err.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> +#include <linux/regulator/driver.h> +#include <linux/i2c.h> + +#define mp5416_reg_ctl0 0x00 +#define mp5416_reg_ctl1 0x01 +#define mp5416_reg_ctl2 0x02 +#define mp5416_reg_ilim 0x03 +#define mp5416_reg_buck1 0x04 +#define mp5416_reg_buck2 0x05 +#define mp5416_reg_buck3 0x06 +#define mp5416_reg_buck4 0x07 +#define mp5416_reg_ldo1 0x08 +#define mp5416_reg_ldo2 0x09 +#define mp5416_reg_ldo3 0x0a +#define mp5416_reg_ldo4 0x0b + +#define mp5416_regulator_en bit(7) +#define mp5416_mask_vset 0x7f +#define mp5416_mask_buck1_ilim 0xc0 +#define mp5416_mask_buck2_ilim 0x0c +#define mp5416_mask_buck3_ilim 0x30 +#define mp5416_mask_buck4_ilim 0x03 +#define mp5416_mask_dvs_slewrate 0xc0 + +/* values in uv */ +#define mp5416_volt1_min 600000 +#define mp5416_volt1_max 2187500 +#define mp5416_volt1_step 12500 +#define mp5416_volt2_min 800000 +#define mp5416_volt2_max 3975000 +#define mp5416_volt2_step 25000 + +#define mp5416_volt1_range \ + ((mp5416_volt1_max - mp5416_volt1_min)/mp5416_volt1_step + 1) +#define mp5416_volt2_range \ + ((mp5416_volt2_max - mp5416_volt2_min)/mp5416_volt2_step + 1) + +#define mp5416buck(_name, _id, _ilim, _dreg, _dval, _vsel) \ + [mp5416_buck ## _id] = { \ + .id = mp5416_buck ## _id, \ + .name = _name, \ + .of_match = _name, \ + .regulators_node = "regulators", \ + .ops = &mp5416_buck_ops, \ + .min_uv = mp5416_volt ##_vsel## _min, \ + .uv_step = mp5416_volt ##_vsel## _step, \ + .n_voltages = mp5416_volt ##_vsel## _range, \ + .curr_table = _ilim, \ + .n_current_limits = array_size(_ilim), \ + .csel_reg = mp5416_reg_ilim, \ + .csel_mask = mp5416_mask_buck ## _id ##_ilim, \ + .vsel_reg = mp5416_reg_buck ## _id, \ + .vsel_mask = mp5416_mask_vset, \ + .enable_reg = mp5416_reg_buck ## _id, \ + .enable_mask = mp5416_regulator_en, \ + .active_discharge_on = _dval, \ + .active_discharge_reg = _dreg, \ + .active_discharge_mask = _dval, \ + .owner = this_module, \ + } + +#define mp5416ldo(_name, _id) \ + [mp5416_ldo ## _id] = { \ + .id = mp5416_ldo ## _id, \ + .name = _name, \ + .of_match = _name, \ + .regulators_node = "regulators", \ + .ops = &mp5416_ldo_ops, \ + .min_uv = mp5416_volt2_min, \ + .uv_step = mp5416_volt2_step, \ + .n_voltages = mp5416_volt2_range, \ + .vsel_reg = mp5416_reg_ldo ##_id, \ + .vsel_mask = mp5416_mask_vset, \ + .enable_reg = mp5416_reg_ldo ##_id, \ + .enable_mask = mp5416_regulator_en, \ + .active_discharge_on = bit(_id), \ + .active_discharge_reg = mp5416_reg_ctl2, \ + .active_discharge_mask = bit(_id), \ + .owner = this_module, \ + } + +enum mp5416_regulators { + mp5416_buck1, + mp5416_buck2, + mp5416_buck3, + mp5416_buck4, + mp5416_ldo1, + mp5416_ldo2, + mp5416_ldo3, + mp5416_ldo4, + mp5416_max_regulators, +}; + +static const struct regmap_config mp5416_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = 0x0d, +}; + +/* current limits array (in ua) + * ilim1 & ilim3 + */ +static const unsigned int mp5416_i_limits1[] = { + 3800000, 4600000, 5600000, 6800000 +}; + +/* ilim2 & ilim4 */ +static const unsigned int mp5416_i_limits2[] = { + 2200000, 3200000, 4200000, 5200000 +}; + +static int mp5416_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay); + +static const struct regulator_ops mp5416_ldo_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, +}; + +static const struct regulator_ops mp5416_buck_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, + .get_current_limit = regulator_get_current_limit_regmap, + .set_current_limit = regulator_set_current_limit_regmap, + .set_ramp_delay = mp5416_set_ramp_delay, +}; + +static struct regulator_desc mp5416_regulators_desc[mp5416_max_regulators] = { + mp5416buck("buck1", 1, mp5416_i_limits1, mp5416_reg_ctl1, bit(0), 1), + mp5416buck("buck2", 2, mp5416_i_limits2, mp5416_reg_ctl1, bit(1), 2), + mp5416buck("buck3", 3, mp5416_i_limits1, mp5416_reg_ctl1, bit(2), 1), + mp5416buck("buck4", 4, mp5416_i_limits2, mp5416_reg_ctl2, bit(5), 2), + mp5416ldo("ldo1", 1), + mp5416ldo("ldo2", 2), + mp5416ldo("ldo3", 3), + mp5416ldo("ldo4", 4), +}; + +/* + * dvs ramp rate buck1 to buck4 + * 00: 32mv/us + * 01: 16mv/us + * 10: 8mv/us + * 11: 4mv/us + */ +static int mp5416_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay) +{ + unsigned int ramp_val; + + if (ramp_delay > 32000 || ramp_delay < 0) + return -einval; + + if (ramp_delay <= 4000) + ramp_val = 3; + else if (ramp_delay <= 8000) + ramp_val = 2; + else if (ramp_delay <= 16000) + ramp_val = 1; + else + ramp_val = 0; + + return regmap_update_bits(rdev->regmap, mp5416_reg_ctl2, + mp5416_mask_dvs_slewrate, ramp_val << 6); +} + +static int mp5416_i2c_probe(struct i2c_client *client) +{ + struct device *dev = &client->dev; + struct regulator_config config = { null, }; + struct regulator_dev *rdev; + struct regmap *regmap; + int i; + + regmap = devm_regmap_init_i2c(client, &mp5416_regmap_config); + if (is_err(regmap)) { + dev_err(dev, "failed to allocate regmap! "); + return ptr_err(regmap); + } + + config.dev = dev; + config.regmap = regmap; + + for (i = 0; i < mp5416_max_regulators; i++) { + rdev = devm_regulator_register(dev, + &mp5416_regulators_desc[i], + &config); + if (is_err(rdev)) { + dev_err(dev, "failed to register regulator! "); + return ptr_err(rdev); + } + } + + return 0; +} + +static const struct of_device_id mp5416_of_match[] = { + { .compatible = "mps,mp5416" }, + {}, +}; +module_device_table(of, mp5416_of_match); + +static const struct i2c_device_id mp5416_id[] = { + { "mp5416", }, + { }, +}; +module_device_table(i2c, mp5416_id); + +static struct i2c_driver mp5416_regulator_driver = { + .driver = { + .name = "mp5416", + .of_match_table = of_match_ptr(mp5416_of_match), + }, + .probe_new = mp5416_i2c_probe, + .id_table = mp5416_id, +}; +module_i2c_driver(mp5416_regulator_driver); + +module_author("saravanan sekar <sravanhome@gmail.com>"); +module_description("mp5416 pmic regulator driver"); +module_license("gpl");
|
Voltage, current regulators, power capping, power supply
|
a273188b87fd7afc9b1a0f814452ecfb4e764f62
|
saravanan sekar
|
drivers
|
regulator
| |
regulator: mp886x: add mp8867 support
|
mp8867 is an i2c-controlled adjustable voltage regulator made by monolithic power systems. the difference between mp8867 and mp8869 are: 1.if v_boot, the vref of mp8869 is fixed at 600mv while vref of mp8867 is determined by the i2c control. 2.for mp8867, when setting voltage, if the step is within 5, we need to manually set the go bit to 0.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add mp8867 support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['mp886x']
|
['c']
| 1
| 61
| 1
|
--- diff --git a/drivers/regulator/mp886x.c b/drivers/regulator/mp886x.c --- a/drivers/regulator/mp886x.c +++ b/drivers/regulator/mp886x.c -// mp8869 regulator driver +// mp8867/mp8869 regulator driver +static int mp8867_set_voltage_sel(struct regulator_dev *rdev, unsigned int sel) +{ + struct mp886x_device_info *di = rdev_get_drvdata(rdev); + int ret, delta; + + ret = mp8869_set_voltage_sel(rdev, sel); + if (ret < 0) + return ret; + + delta = di->sel - sel; + if (abs(delta) <= 5) + ret = regmap_update_bits(rdev->regmap, mp886x_syscntlreg1, + mp886x_go, 0); + di->sel = sel; + + return ret; +} + +static int mp8867_get_voltage_sel(struct regulator_dev *rdev) +{ + struct mp886x_device_info *di = rdev_get_drvdata(rdev); + int ret, uv; + unsigned int val; + bool fbloop; + + ret = regmap_read(rdev->regmap, rdev->desc->vsel_reg, &val); + if (ret) + return ret; + + fbloop = val & mp886x_v_boot; + + val &= rdev->desc->vsel_mask; + val >>= ffs(rdev->desc->vsel_mask) - 1; + + if (fbloop) { + uv = regulator_list_voltage_linear(rdev, val); + uv = mp8869_scale(uv, di->r[0], di->r[1]); + return regulator_map_voltage_linear(rdev, uv, uv); + } + + return val; +} + +static const struct regulator_ops mp8867_regulator_ops = { + .set_voltage_sel = mp8867_set_voltage_sel, + .get_voltage_sel = mp8867_get_voltage_sel, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .map_voltage = regulator_map_voltage_linear, + .list_voltage = regulator_list_voltage_linear, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_mode = mp886x_set_mode, + .get_mode = mp886x_get_mode, +}; + + { + .compatible = "mps,mp8867", + .data = &mp8867_regulator_ops + },
|
Voltage, current regulators, power capping, power supply
|
751ca3aa15be815373536eb8b3dc44910b800e9f
|
jisheng zhang
|
drivers
|
regulator
| |
regulator: qcom_smd: add pmi8994 regulator support
|
the pmi8994 is commonly found on msm8996 based devices, such as the dragonboard 820c, where it supplies power to a number of ldos on the primary pmic.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add pmi8994 regulator support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['qcom_smd']
|
['txt', 'h', 'c']
| 3
| 61
| 0
|
--- diff --git a/documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt b/documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt --- a/documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt +++ b/documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt + "qcom,rpm-pmi8994-regulators" +- vdd_s1-supply: +- vdd_s2-supply: +- vdd_s3-supply: +- vdd_bst_byp-supply: + usage: optional (pmi8994 only) + value type: <phandle> + definition: reference to regulator supplying the input pin, as + described in the data sheet + - vdd_s1-supply: - vdd_s2-supply: - vdd_s3-supply: +pmi8994: + s1, s2, s3, boost-bypass + diff --git a/drivers/regulator/qcom_smd-regulator.c b/drivers/regulator/qcom_smd-regulator.c --- a/drivers/regulator/qcom_smd-regulator.c +++ b/drivers/regulator/qcom_smd-regulator.c +static const struct regulator_desc pmi8994_ftsmps = { + .linear_ranges = (struct regulator_linear_range[]) { + regulator_linear_range(350000, 0, 199, 5000), + regulator_linear_range(700000, 200, 349, 10000), + }, + .n_linear_ranges = 2, + .n_voltages = 350, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pmi8994_hfsmps = { + .linear_ranges = (struct regulator_linear_range[]) { + regulator_linear_range(350000, 0, 80, 12500), + regulator_linear_range(700000, 81, 141, 25000), + }, + .n_linear_ranges = 2, + .n_voltages = 142, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pmi8994_bby = { + .linear_ranges = (struct regulator_linear_range[]) { + regulator_linear_range(3000000, 0, 44, 50000), + }, + .n_linear_ranges = 1, + .n_voltages = 45, + .ops = &rpm_bob_ops, +}; + +static const struct regulator_desc pmi8994_boost = { + .linear_ranges = (struct regulator_linear_range[]) { + regulator_linear_range(4000000, 0, 30, 50000), + }, + .n_linear_ranges = 1, + .n_voltages = 31, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct rpm_regulator_data rpm_pmi8994_regulators[] = { + { "s1", qcom_smd_rpm_smpb, 1, &pmi8994_ftsmps, "vdd_s1" }, + { "s2", qcom_smd_rpm_smpb, 2, &pmi8994_hfsmps, "vdd_s2" }, + { "s2", qcom_smd_rpm_smpb, 3, &pmi8994_hfsmps, "vdd_s3" }, + { "boost-bypass", qcom_smd_rpm_bbyb, 1, &pmi8994_bby, "vdd_bst_byp" }, + {} +}; + + { .compatible = "qcom,rpm-pmi8994-regulators", .data = &rpm_pmi8994_regulators }, diff --git a/include/linux/soc/qcom/smd-rpm.h b/include/linux/soc/qcom/smd-rpm.h --- a/include/linux/soc/qcom/smd-rpm.h +++ b/include/linux/soc/qcom/smd-rpm.h +#define qcom_smd_rpm_bbyb 0x62796262
|
Voltage, current regulators, power capping, power supply
|
86332c343491c6d2228a1e0c80b1ea98a2653d20
|
bjorn andersson
|
include
|
linux
|
bindings, qcom, regulator, soc
|
rtc: sun6i: make external 32k oscillator optional
|
some boards, like orangepi pc2 (h5), orangepi plus 2e (h3) and tanix tx6 (h6) don't have external 32khz oscillator. till h6, it didn't really matter if external oscillator was enabled because hw detected error and fall back to internal one. h6 has same functionality but it's the first soc which have "auto switch bypass" bit documented and always enabled in driver. this prevents rtc to work correctly if external crystal is not present on board. there are other side effects - all peripherals which depends on this clock also don't work (hdmi cec for example).
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
make external 32k oscillator optional
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['sun6i']
|
['c']
| 1
| 8
| 8
|
--- diff --git a/drivers/rtc/rtc-sun6i.c b/drivers/rtc/rtc-sun6i.c --- a/drivers/rtc/rtc-sun6i.c +++ b/drivers/rtc/rtc-sun6i.c - /* switch to the external, more precise, oscillator */ - reg |= sun6i_losc_ctrl_ext_osc; - if (rtc->data->has_losc_en) - reg |= sun6i_losc_ctrl_ext_losc_en; + /* switch to the external, more precise, oscillator, if present */ + if (of_get_property(node, "clocks", null)) { + reg |= sun6i_losc_ctrl_ext_osc; + if (rtc->data->has_losc_en) + reg |= sun6i_losc_ctrl_ext_losc_en; + } - /* deal with old dts */ - if (!of_get_property(node, "clocks", null)) - goto err; - + /* if there is no external oscillator, this will be null and ... */ + /* ... number of clock parents will be 1. */
|
Real Time Clock (RTC)
|
ec98a87509f40324807dc179a7e3163d40709eba
|
jernej skrabec
|
drivers
|
rtc
| |
rtc: add support for the mediatek mt2712 rtc
|
this add support for the mediatek mt2712 rtc. it was soc based rtc, but had different architecture compared with mt7622 rtc.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add support for the mediatek mt2712 rtc
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
[]
|
['kconfig', 'c', 'makefile']
| 3
| 432
| 0
|
--- diff --git a/drivers/rtc/kconfig b/drivers/rtc/kconfig --- a/drivers/rtc/kconfig +++ b/drivers/rtc/kconfig +config rtc_drv_mt2712 + tristate "mediatek mt2712 soc based rtc" + depends on arch_mediatek || compile_test + help + this enables support for the real time clock built in the mediatek + socs for mt2712. + + this drive can also be built as a module. if so, the module + will be called rtc-mt2712. + diff --git a/drivers/rtc/makefile b/drivers/rtc/makefile --- a/drivers/rtc/makefile +++ b/drivers/rtc/makefile +obj-$(config_rtc_drv_mt2712) += rtc-mt2712.o diff --git a/drivers/rtc/rtc-mt2712.c b/drivers/rtc/rtc-mt2712.c --- /dev/null +++ b/drivers/rtc/rtc-mt2712.c +// spdx-license-identifier: gpl-2.0 +/* + * copyright (c) 2019 mediatek inc. + * author: ran bi <ran.bi@mediatek.com> + */ + +#include <linux/delay.h> +#include <linux/init.h> +#include <linux/io.h> +#include <linux/irqdomain.h> +#include <linux/module.h> +#include <linux/of_address.h> +#include <linux/of_irq.h> +#include <linux/platform_device.h> +#include <linux/rtc.h> + +#define mt2712_bbpu 0x0000 +#define mt2712_bbpu_clrpky bit(4) +#define mt2712_bbpu_reload bit(5) +#define mt2712_bbpu_cbusy bit(6) +#define mt2712_bbpu_key (0x43 << 8) + +#define mt2712_irq_sta 0x0004 +#define mt2712_irq_sta_al bit(0) +#define mt2712_irq_sta_tc bit(1) + +#define mt2712_irq_en 0x0008 +#define mt2712_irq_en_al bit(0) +#define mt2712_irq_en_tc bit(1) +#define mt2712_irq_en_oneshot bit(2) + +#define mt2712_cii_en 0x000c + +#define mt2712_al_mask 0x0010 +#define mt2712_al_mask_dow bit(4) + +#define mt2712_tc_sec 0x0014 +#define mt2712_tc_min 0x0018 +#define mt2712_tc_hou 0x001c +#define mt2712_tc_dom 0x0020 +#define mt2712_tc_dow 0x0024 +#define mt2712_tc_mth 0x0028 +#define mt2712_tc_yea 0x002c + +#define mt2712_al_sec 0x0030 +#define mt2712_al_min 0x0034 +#define mt2712_al_hou 0x0038 +#define mt2712_al_dom 0x003c +#define mt2712_al_dow 0x0040 +#define mt2712_al_mth 0x0044 +#define mt2712_al_yea 0x0048 + +#define mt2712_sec_mask 0x003f +#define mt2712_min_mask 0x003f +#define mt2712_hou_mask 0x001f +#define mt2712_dom_mask 0x001f +#define mt2712_dow_mask 0x0007 +#define mt2712_mth_mask 0x000f +#define mt2712_yea_mask 0x007f + +#define mt2712_powerkey1 0x004c +#define mt2712_powerkey2 0x0050 +#define mt2712_powerkey1_key 0xa357 +#define mt2712_powerkey2_key 0x67d2 + +#define mt2712_con0 0x005c +#define mt2712_con1 0x0060 + +#define mt2712_prot 0x0070 +#define mt2712_prot_unlock1 0x9136 +#define mt2712_prot_unlock2 0x586a + +#define mt2712_wrtgr 0x0078 + +#define mt2712_rtc_timestamp_end_2127 4985971199ll + +struct mt2712_rtc { + struct rtc_device *rtc; + void __iomem *base; + int irq; + u8 irq_wake_enabled; + u8 powerlost; +}; + +static inline u32 mt2712_readl(struct mt2712_rtc *mt2712_rtc, u32 reg) +{ + return readl(mt2712_rtc->base + reg); +} + +static inline void mt2712_writel(struct mt2712_rtc *mt2712_rtc, + u32 reg, u32 val) +{ + writel(val, mt2712_rtc->base + reg); +} + +static void mt2712_rtc_write_trigger(struct mt2712_rtc *mt2712_rtc) +{ + unsigned long timeout = jiffies + hz / 10; + + mt2712_writel(mt2712_rtc, mt2712_wrtgr, 1); + while (1) { + if (!(mt2712_readl(mt2712_rtc, mt2712_bbpu) + & mt2712_bbpu_cbusy)) + break; + + if (time_after(jiffies, timeout)) { + dev_err(&mt2712_rtc->rtc->dev, + "%s time out! ", __func__); + break; + } + cpu_relax(); + } +} + +static void mt2712_rtc_writeif_unlock(struct mt2712_rtc *mt2712_rtc) +{ + mt2712_writel(mt2712_rtc, mt2712_prot, mt2712_prot_unlock1); + mt2712_rtc_write_trigger(mt2712_rtc); + mt2712_writel(mt2712_rtc, mt2712_prot, mt2712_prot_unlock2); + mt2712_rtc_write_trigger(mt2712_rtc); +} + +static irqreturn_t rtc_irq_handler_thread(int irq, void *data) +{ + struct mt2712_rtc *mt2712_rtc = data; + u16 irqsta; + + /* clear interrupt */ + irqsta = mt2712_readl(mt2712_rtc, mt2712_irq_sta); + if (irqsta & mt2712_irq_sta_al) { + rtc_update_irq(mt2712_rtc->rtc, 1, rtc_irqf | rtc_af); + return irq_handled; + } + + return irq_none; +} + +static void __mt2712_rtc_read_time(struct mt2712_rtc *mt2712_rtc, + struct rtc_time *tm, int *sec) +{ + tm->tm_sec = mt2712_readl(mt2712_rtc, mt2712_tc_sec) + & mt2712_sec_mask; + tm->tm_min = mt2712_readl(mt2712_rtc, mt2712_tc_min) + & mt2712_min_mask; + tm->tm_hour = mt2712_readl(mt2712_rtc, mt2712_tc_hou) + & mt2712_hou_mask; + tm->tm_mday = mt2712_readl(mt2712_rtc, mt2712_tc_dom) + & mt2712_dom_mask; + tm->tm_mon = (mt2712_readl(mt2712_rtc, mt2712_tc_mth) - 1) + & mt2712_mth_mask; + tm->tm_year = (mt2712_readl(mt2712_rtc, mt2712_tc_yea) + 100) + & mt2712_yea_mask; + + *sec = mt2712_readl(mt2712_rtc, mt2712_tc_sec) & mt2712_sec_mask; +} + +static int mt2712_rtc_read_time(struct device *dev, struct rtc_time *tm) +{ + struct mt2712_rtc *mt2712_rtc = dev_get_drvdata(dev); + int sec; + + if (mt2712_rtc->powerlost) + return -einval; + + do { + __mt2712_rtc_read_time(mt2712_rtc, tm, &sec); + } while (sec < tm->tm_sec); /* sec has carried */ + + return 0; +} + +static int mt2712_rtc_set_time(struct device *dev, struct rtc_time *tm) +{ + struct mt2712_rtc *mt2712_rtc = dev_get_drvdata(dev); + + mt2712_writel(mt2712_rtc, mt2712_tc_sec, tm->tm_sec & mt2712_sec_mask); + mt2712_writel(mt2712_rtc, mt2712_tc_min, tm->tm_min & mt2712_min_mask); + mt2712_writel(mt2712_rtc, mt2712_tc_hou, tm->tm_hour & mt2712_hou_mask); + mt2712_writel(mt2712_rtc, mt2712_tc_dom, tm->tm_mday & mt2712_dom_mask); + mt2712_writel(mt2712_rtc, mt2712_tc_mth, + (tm->tm_mon + 1) & mt2712_mth_mask); + mt2712_writel(mt2712_rtc, mt2712_tc_yea, + (tm->tm_year - 100) & mt2712_yea_mask); + + mt2712_rtc_write_trigger(mt2712_rtc); + + if (mt2712_rtc->powerlost) + mt2712_rtc->powerlost = false; + + return 0; +} + +static int mt2712_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm) +{ + struct mt2712_rtc *mt2712_rtc = dev_get_drvdata(dev); + struct rtc_time *tm = &alm->time; + u16 irqen; + + irqen = mt2712_readl(mt2712_rtc, mt2712_irq_en); + alm->enabled = !!(irqen & mt2712_irq_en_al); + + tm->tm_sec = mt2712_readl(mt2712_rtc, mt2712_al_sec) & mt2712_sec_mask; + tm->tm_min = mt2712_readl(mt2712_rtc, mt2712_al_min) & mt2712_min_mask; + tm->tm_hour = mt2712_readl(mt2712_rtc, mt2712_al_hou) & mt2712_hou_mask; + tm->tm_mday = mt2712_readl(mt2712_rtc, mt2712_al_dom) & mt2712_dom_mask; + tm->tm_mon = (mt2712_readl(mt2712_rtc, mt2712_al_mth) - 1) + & mt2712_mth_mask; + tm->tm_year = (mt2712_readl(mt2712_rtc, mt2712_al_yea) + 100) + & mt2712_yea_mask; + + return 0; +} + +static int mt2712_rtc_alarm_irq_enable(struct device *dev, + unsigned int enabled) +{ + struct mt2712_rtc *mt2712_rtc = dev_get_drvdata(dev); + u16 irqen; + + irqen = mt2712_readl(mt2712_rtc, mt2712_irq_en); + if (enabled) + irqen |= mt2712_irq_en_al; + else + irqen &= ~mt2712_irq_en_al; + mt2712_writel(mt2712_rtc, mt2712_irq_en, irqen); + mt2712_rtc_write_trigger(mt2712_rtc); + + return 0; +} + +static int mt2712_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm) +{ + struct mt2712_rtc *mt2712_rtc = dev_get_drvdata(dev); + struct rtc_time *tm = &alm->time; + + dev_dbg(&mt2712_rtc->rtc->dev, "set al time: %ptr, alm en: %d ", + tm, alm->enabled); + + mt2712_writel(mt2712_rtc, mt2712_al_sec, + (mt2712_readl(mt2712_rtc, mt2712_al_sec) + & ~(mt2712_sec_mask)) | (tm->tm_sec & mt2712_sec_mask)); + mt2712_writel(mt2712_rtc, mt2712_al_min, + (mt2712_readl(mt2712_rtc, mt2712_al_min) + & ~(mt2712_min_mask)) | (tm->tm_min & mt2712_min_mask)); + mt2712_writel(mt2712_rtc, mt2712_al_hou, + (mt2712_readl(mt2712_rtc, mt2712_al_hou) + & ~(mt2712_hou_mask)) | (tm->tm_hour & mt2712_hou_mask)); + mt2712_writel(mt2712_rtc, mt2712_al_dom, + (mt2712_readl(mt2712_rtc, mt2712_al_dom) + & ~(mt2712_dom_mask)) | (tm->tm_mday & mt2712_dom_mask)); + mt2712_writel(mt2712_rtc, mt2712_al_mth, + (mt2712_readl(mt2712_rtc, mt2712_al_mth) + & ~(mt2712_mth_mask)) + | ((tm->tm_mon + 1) & mt2712_mth_mask)); + mt2712_writel(mt2712_rtc, mt2712_al_yea, + (mt2712_readl(mt2712_rtc, mt2712_al_yea) + & ~(mt2712_yea_mask)) + | ((tm->tm_year - 100) & mt2712_yea_mask)); + + /* mask day of week */ + mt2712_writel(mt2712_rtc, mt2712_al_mask, mt2712_al_mask_dow); + mt2712_rtc_write_trigger(mt2712_rtc); + + mt2712_rtc_alarm_irq_enable(dev, alm->enabled); + + return 0; +} + +/* init rtc register */ +static void mt2712_rtc_hw_init(struct mt2712_rtc *mt2712_rtc) +{ + u32 p1, p2; + + mt2712_writel(mt2712_rtc, mt2712_bbpu, + mt2712_bbpu_key | mt2712_bbpu_reload); + + mt2712_writel(mt2712_rtc, mt2712_cii_en, 0); + mt2712_writel(mt2712_rtc, mt2712_al_mask, 0); + /* necessary before set mt2712_powerkey */ + mt2712_writel(mt2712_rtc, mt2712_con0, 0x4848); + mt2712_writel(mt2712_rtc, mt2712_con1, 0x0048); + + mt2712_rtc_write_trigger(mt2712_rtc); + + p1 = mt2712_readl(mt2712_rtc, mt2712_powerkey1); + p2 = mt2712_readl(mt2712_rtc, mt2712_powerkey2); + if (p1 != mt2712_powerkey1_key || p2 != mt2712_powerkey2_key) { + mt2712_rtc->powerlost = true; + dev_dbg(&mt2712_rtc->rtc->dev, + "powerkey not set (lost power) "); + } else { + mt2712_rtc->powerlost = false; + } + + /* rtc need powerkey1/2 match, then goto normal work mode */ + mt2712_writel(mt2712_rtc, mt2712_powerkey1, mt2712_powerkey1_key); + mt2712_writel(mt2712_rtc, mt2712_powerkey2, mt2712_powerkey2_key); + mt2712_rtc_write_trigger(mt2712_rtc); + + mt2712_rtc_writeif_unlock(mt2712_rtc); +} + +static const struct rtc_class_ops mt2712_rtc_ops = { + .read_time = mt2712_rtc_read_time, + .set_time = mt2712_rtc_set_time, + .read_alarm = mt2712_rtc_read_alarm, + .set_alarm = mt2712_rtc_set_alarm, + .alarm_irq_enable = mt2712_rtc_alarm_irq_enable, +}; + +static int mt2712_rtc_probe(struct platform_device *pdev) +{ + struct resource *res; + struct mt2712_rtc *mt2712_rtc; + int ret; + + mt2712_rtc = devm_kzalloc(&pdev->dev, + sizeof(struct mt2712_rtc), gfp_kernel); + if (!mt2712_rtc) + return -enomem; + + res = platform_get_resource(pdev, ioresource_mem, 0); + mt2712_rtc->base = devm_ioremap_resource(&pdev->dev, res); + if (is_err(mt2712_rtc->base)) + return ptr_err(mt2712_rtc->base); + + /* rtc hw init */ + mt2712_rtc_hw_init(mt2712_rtc); + + mt2712_rtc->irq = platform_get_irq(pdev, 0); + if (mt2712_rtc->irq < 0) { + dev_err(&pdev->dev, "no irq resource "); + return mt2712_rtc->irq; + } + + platform_set_drvdata(pdev, mt2712_rtc); + + mt2712_rtc->rtc = devm_rtc_allocate_device(&pdev->dev); + if (is_err(mt2712_rtc->rtc)) + return ptr_err(mt2712_rtc->rtc); + + ret = devm_request_threaded_irq(&pdev->dev, mt2712_rtc->irq, null, + rtc_irq_handler_thread, + irqf_oneshot | irqf_trigger_low, + dev_name(&mt2712_rtc->rtc->dev), + mt2712_rtc); + if (ret) { + dev_err(&pdev->dev, "failed to request alarm irq: %d: %d ", + mt2712_rtc->irq, ret); + return ret; + } + + device_init_wakeup(&pdev->dev, true); + + mt2712_rtc->rtc->ops = &mt2712_rtc_ops; + mt2712_rtc->rtc->range_min = rtc_timestamp_begin_2000; + mt2712_rtc->rtc->range_max = mt2712_rtc_timestamp_end_2127; + + ret = rtc_register_device(mt2712_rtc->rtc); + if (ret) { + dev_err(&pdev->dev, "register rtc device failed "); + return ret; + } + + return 0; +} + +#ifdef config_pm_sleep +static int mt2712_rtc_suspend(struct device *dev) +{ + int wake_status = 0; + struct mt2712_rtc *mt2712_rtc = dev_get_drvdata(dev); + + if (device_may_wakeup(dev)) { + wake_status = enable_irq_wake(mt2712_rtc->irq); + if (!wake_status) + mt2712_rtc->irq_wake_enabled = true; + } + + return 0; +} + +static int mt2712_rtc_resume(struct device *dev) +{ + int wake_status = 0; + struct mt2712_rtc *mt2712_rtc = dev_get_drvdata(dev); + + if (device_may_wakeup(dev) && mt2712_rtc->irq_wake_enabled) { + wake_status = disable_irq_wake(mt2712_rtc->irq); + if (!wake_status) + mt2712_rtc->irq_wake_enabled = false; + } + + return 0; +} + +static simple_dev_pm_ops(mt2712_pm_ops, mt2712_rtc_suspend, + mt2712_rtc_resume); +#endif + +static const struct of_device_id mt2712_rtc_of_match[] = { + { .compatible = "mediatek,mt2712-rtc", }, + { }, +}; + +module_device_table(of, mt2712_rtc_of_match); + +static struct platform_driver mt2712_rtc_driver = { + .driver = { + .name = "mt2712-rtc", + .of_match_table = mt2712_rtc_of_match, + .pm = &mt2712_pm_ops, + }, + .probe = mt2712_rtc_probe, +}; + +module_platform_driver(mt2712_rtc_driver); + +module_description("mediatek mt2712 soc based rtc driver"); +module_author("ran bi <ran.bi@mediatek.com>"); +module_license("gpl");
|
Real Time Clock (RTC)
|
64823360a82939db212bc763443c990cbd99fa7c
|
ran bi
|
drivers
|
rtc
| |
rtc: jz4740: add support for jz4760 soc
|
the wenr feature (set a magic value to enable rtc registers read-write) first appeared on the jz4760; the jz4780 came much later.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add support for jz4760 soc
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['jz4740']
|
['c']
| 1
| 3
| 1
|
--- diff --git a/drivers/rtc/rtc-jz4740.c b/drivers/rtc/rtc-jz4740.c --- a/drivers/rtc/rtc-jz4740.c +++ b/drivers/rtc/rtc-jz4740.c + id_jz4760, - if (rtc->type >= id_jz4780) + if (rtc->type >= id_jz4760) + { .compatible = "ingenic,jz4760-rtc", .data = (void *)id_jz4760 },
|
Real Time Clock (RTC)
|
5840748520be19ea97ffdb80e5aa313c6ef60575
|
paul cercueil
|
drivers
|
rtc
| |
rtc: ds1307: add support for watchdog timer on ds1388
|
the ds1388 variant has watchdog timer capabilities. when using a ds1388 and having enabled config_watchdog_core register a watchdog device for the ds1388.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add support for watchdog timer on ds1388
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['ds1307']
|
['kconfig', 'c']
| 2
| 116
| 0
|
--- diff --git a/drivers/rtc/kconfig b/drivers/rtc/kconfig --- a/drivers/rtc/kconfig +++ b/drivers/rtc/kconfig + select watchdog_core if watchdog diff --git a/drivers/rtc/rtc-ds1307.c b/drivers/rtc/rtc-ds1307.c --- a/drivers/rtc/rtc-ds1307.c +++ b/drivers/rtc/rtc-ds1307.c +#include <linux/watchdog.h> +#define ds1388_reg_wdog_hun_secs 0x08 +#define ds1388_reg_wdog_secs 0x09 +# define ds1388_bit_wf bit(6) +#define ds1388_reg_control 0x0c +# define ds1388_bit_rst bit(0) +# define ds1388_bit_wde bit(1) + +#ifdef config_watchdog_core +static int ds1388_wdt_start(struct watchdog_device *wdt_dev) +{ + struct ds1307 *ds1307 = watchdog_get_drvdata(wdt_dev); + u8 regs[2]; + int ret; + + ret = regmap_update_bits(ds1307->regmap, ds1388_reg_flag, + ds1388_bit_wf, 0); + if (ret) + return ret; + + ret = regmap_update_bits(ds1307->regmap, ds1388_reg_control, + ds1388_bit_wde | ds1388_bit_rst, 0); + if (ret) + return ret; + + /* + * watchdog timeouts are measured in seconds. so ignore hundredths of + * seconds field. + */ + regs[0] = 0; + regs[1] = bin2bcd(wdt_dev->timeout); + + ret = regmap_bulk_write(ds1307->regmap, ds1388_reg_wdog_hun_secs, regs, + sizeof(regs)); + if (ret) + return ret; + + return regmap_update_bits(ds1307->regmap, ds1388_reg_control, + ds1388_bit_wde | ds1388_bit_rst, + ds1388_bit_wde | ds1388_bit_rst); +} + +static int ds1388_wdt_stop(struct watchdog_device *wdt_dev) +{ + struct ds1307 *ds1307 = watchdog_get_drvdata(wdt_dev); + + return regmap_update_bits(ds1307->regmap, ds1388_reg_control, + ds1388_bit_wde | ds1388_bit_rst, 0); +} + +static int ds1388_wdt_ping(struct watchdog_device *wdt_dev) +{ + struct ds1307 *ds1307 = watchdog_get_drvdata(wdt_dev); + u8 regs[2]; + + return regmap_bulk_read(ds1307->regmap, ds1388_reg_wdog_hun_secs, regs, + sizeof(regs)); +} + +static int ds1388_wdt_set_timeout(struct watchdog_device *wdt_dev, + unsigned int val) +{ + struct ds1307 *ds1307 = watchdog_get_drvdata(wdt_dev); + u8 regs[2]; + + wdt_dev->timeout = val; + regs[0] = 0; + regs[1] = bin2bcd(wdt_dev->timeout); + + return regmap_bulk_write(ds1307->regmap, ds1388_reg_wdog_hun_secs, regs, + sizeof(regs)); +} +#endif + +#ifdef config_watchdog_core +static const struct watchdog_info ds1388_wdt_info = { + .options = wdiof_settimeout | wdiof_keepaliveping | wdiof_magicclose, + .identity = "ds1388 watchdog", +}; + +static const struct watchdog_ops ds1388_wdt_ops = { + .owner = this_module, + .start = ds1388_wdt_start, + .stop = ds1388_wdt_stop, + .ping = ds1388_wdt_ping, + .set_timeout = ds1388_wdt_set_timeout, + +}; + +static void ds1307_wdt_register(struct ds1307 *ds1307) +{ + struct watchdog_device *wdt; + + if (ds1307->type != ds_1388) + return; + + wdt = devm_kzalloc(ds1307->dev, sizeof(*wdt), gfp_kernel); + + wdt->info = &ds1388_wdt_info; + wdt->ops = &ds1388_wdt_ops; + wdt->timeout = 99; + wdt->max_timeout = 99; + wdt->min_timeout = 1; + + watchdog_init_timeout(wdt, 0, ds1307->dev); + watchdog_set_drvdata(wdt, ds1307); + devm_watchdog_register_device(ds1307->dev, wdt); +} +#else +static void ds1307_wdt_register(struct ds1307 *ds1307) +{ +} +#endif /* config_watchdog_core */ + + ds1307_wdt_register(ds1307);
|
Real Time Clock (RTC)
|
fd90d48db0377d4a5a6786ce19d33185c2cbe029
|
chris packham guenter roeck linux roeck us net
|
drivers
|
rtc
| |
rtc: rc5t619: add ricoh rc5t619 rtc driver
|
add an rtc driver for the rtc device on ricoh mfd rc5t619, which is implemented as a variant of rn5t618.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add ricoh rc5t619 rtc driver
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['rc5t619']
|
['kconfig', 'c', 'makefile']
| 3
| 455
| 0
|
--- diff --git a/drivers/rtc/kconfig b/drivers/rtc/kconfig --- a/drivers/rtc/kconfig +++ b/drivers/rtc/kconfig +config rtc_drv_rc5t619 + tristate "ricoh rc5t619 rtc driver" + depends on mfd_rn5t618 + help + if you say yes here you get support for the rtc on the + ricoh rc5t619 chips. + + this driver can also be built as a module. if so, the module + will be called rtc-rc5t619. + diff --git a/drivers/rtc/makefile b/drivers/rtc/makefile --- a/drivers/rtc/makefile +++ b/drivers/rtc/makefile +obj-$(config_rtc_drv_rc5t619) += rtc-rc5t619.o diff --git a/drivers/rtc/rtc-rc5t619.c b/drivers/rtc/rtc-rc5t619.c --- /dev/null +++ b/drivers/rtc/rtc-rc5t619.c +// spdx-license-identifier: gpl-2.0+ +/* + * drivers/rtc/rtc-rc5t619.c + * + * real time clock driver for ricoh rc5t619 power management chip. + * + * copyright (c) 2019 andreas kemnade + */ + +#include <linux/kernel.h> +#include <linux/device.h> +#include <linux/errno.h> +#include <linux/init.h> +#include <linux/module.h> +#include <linux/mfd/rn5t618.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> +#include <linux/bcd.h> +#include <linux/rtc.h> +#include <linux/slab.h> +#include <linux/irqdomain.h> + +struct rc5t619_rtc { + int irq; + struct rtc_device *rtc; + struct rn5t618 *rn5t618; +}; + +#define ctrl1_alarm_enabled 0x40 +#define ctrl1_24hr 0x20 +#define ctrl1_periodic_mask 0xf + +#define ctrl2_pon 0x10 +#define ctrl2_alarm_status 0x80 +#define ctrl2_ctfg 0x4 +#define ctrl2_ctc 0x1 + +#define month_centflag 0x80 +#define hour_pmflag 0x20 +#define mday_dal_ext 0x80 + +static uint8_t rtc5t619_12hour_bcd2bin(uint8_t hour) +{ + if (hour & hour_pmflag) { + hour = bcd2bin(hour & ~hour_pmflag); + return hour == 12 ? 12 : 12 + hour; + } + + hour = bcd2bin(hour); + return hour == 12 ? 0 : hour; +} + +static uint8_t rtc5t619_12hour_bin2bcd(uint8_t hour) +{ + if (!hour) + return 0x12; + + if (hour < 12) + return bin2bcd(hour); + + if (hour == 12) + return 0x12 | hour_pmflag; + + return bin2bcd(hour - 12) | hour_pmflag; +} + +static int rc5t619_rtc_periodic_disable(struct device *dev) +{ + struct rc5t619_rtc *rtc = dev_get_drvdata(dev); + int err; + + /* disable function */ + err = regmap_update_bits(rtc->rn5t618->regmap, + rn5t618_rtc_ctrl1, ctrl1_periodic_mask, 0); + if (err < 0) + return err; + + /* clear alarm flag and ctfg */ + err = regmap_update_bits(rtc->rn5t618->regmap, rn5t618_rtc_ctrl2, + ctrl2_alarm_status | ctrl2_ctfg | ctrl2_ctc, + 0); + if (err < 0) + return err; + + return 0; +} + +/* things to be done once after power on */ +static int rc5t619_rtc_pon_setup(struct device *dev) +{ + struct rc5t619_rtc *rtc = dev_get_drvdata(dev); + int err; + unsigned int reg_data; + + err = regmap_read(rtc->rn5t618->regmap, rn5t618_rtc_ctrl2, ®_data); + if (err < 0) + return err; + + /* clear vdet pon */ + reg_data &= ~(ctrl2_pon | ctrl2_ctc | 0x4a); /* 0101-1011 */ + reg_data |= 0x20; /* 0010-0000 */ + err = regmap_write(rtc->rn5t618->regmap, rn5t618_rtc_ctrl2, reg_data); + if (err < 0) + return err; + + /* clearing rtc adjust register */ + err = regmap_write(rtc->rn5t618->regmap, rn5t618_rtc_adjust, 0); + if (err) + return err; + + return regmap_update_bits(rtc->rn5t618->regmap, + rn5t618_rtc_ctrl1, + ctrl1_24hr, ctrl1_24hr); +} + +static int rc5t619_rtc_read_time(struct device *dev, struct rtc_time *tm) +{ + struct rc5t619_rtc *rtc = dev_get_drvdata(dev); + u8 buff[7]; + int err; + int cent_flag; + unsigned int ctrl1; + unsigned int ctrl2; + + err = regmap_read(rtc->rn5t618->regmap, rn5t618_rtc_ctrl2, &ctrl2); + if (err < 0) + return err; + + if (ctrl2 & ctrl2_pon) + return -einval; + + err = regmap_read(rtc->rn5t618->regmap, rn5t618_rtc_ctrl1, &ctrl1); + if (err < 0) + return err; + + err = regmap_bulk_read(rtc->rn5t618->regmap, rn5t618_rtc_seconds, + buff, sizeof(buff)); + if (err < 0) + return err; + + if (buff[5] & month_centflag) + cent_flag = 1; + else + cent_flag = 0; + + tm->tm_sec = bcd2bin(buff[0]); + tm->tm_min = bcd2bin(buff[1]); + + if (ctrl1 & ctrl1_24hr) + tm->tm_hour = bcd2bin(buff[2]); + else + tm->tm_hour = rtc5t619_12hour_bcd2bin(buff[2]); + + tm->tm_wday = bcd2bin(buff[3]); + tm->tm_mday = bcd2bin(buff[4]); + tm->tm_mon = bcd2bin(buff[5] & 0x1f) - 1; /* back to system 0-11 */ + tm->tm_year = bcd2bin(buff[6]) + 100 * cent_flag; + + return 0; +} + +static int rc5t619_rtc_set_time(struct device *dev, struct rtc_time *tm) +{ + struct rc5t619_rtc *rtc = dev_get_drvdata(dev); + u8 buff[7]; + int err; + int cent_flag; + unsigned int ctrl1; + unsigned int ctrl2; + + err = regmap_read(rtc->rn5t618->regmap, rn5t618_rtc_ctrl2, &ctrl2); + if (err < 0) + return err; + + if (ctrl2 & ctrl2_pon) + rc5t619_rtc_pon_setup(dev); + + err = regmap_read(rtc->rn5t618->regmap, rn5t618_rtc_ctrl1, &ctrl1); + if (err < 0) + return err; + + if (tm->tm_year >= 100) + cent_flag = 1; + else + cent_flag = 0; + + buff[0] = bin2bcd(tm->tm_sec); + buff[1] = bin2bcd(tm->tm_min); + + if (ctrl1 & ctrl1_24hr) + buff[2] = bin2bcd(tm->tm_hour); + else + buff[2] = rtc5t619_12hour_bin2bcd(tm->tm_hour); + + buff[3] = bin2bcd(tm->tm_wday); + buff[4] = bin2bcd(tm->tm_mday); + buff[5] = bin2bcd(tm->tm_mon + 1); /* system set 0-11 */ + buff[6] = bin2bcd(tm->tm_year - cent_flag * 100); + + if (cent_flag) + buff[5] |= month_centflag; + + err = regmap_bulk_write(rtc->rn5t618->regmap, rn5t618_rtc_seconds, + buff, sizeof(buff)); + if (err < 0) { + dev_err(dev, "failed to program new time: %d ", err); + return err; + } + + return 0; +} + +/* 0-disable, 1-enable */ +static int rc5t619_rtc_alarm_enable(struct device *dev, unsigned int enabled) +{ + struct rc5t619_rtc *rtc = dev_get_drvdata(dev); + + return regmap_update_bits(rtc->rn5t618->regmap, + rn5t618_rtc_ctrl1, + ctrl1_alarm_enabled, + enabled ? ctrl1_alarm_enabled : 0); +} + +static int rc5t619_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) +{ + struct rc5t619_rtc *rtc = dev_get_drvdata(dev); + u8 buff[6]; + unsigned int buff_cent; + int err; + int cent_flag; + unsigned int ctrl1; + + err = regmap_read(rtc->rn5t618->regmap, rn5t618_rtc_ctrl1, &ctrl1); + if (err) + return err; + + err = regmap_read(rtc->rn5t618->regmap, rn5t618_rtc_month, &buff_cent); + if (err < 0) { + dev_err(dev, "failed to read time: %d ", err); + return err; + } + + if (buff_cent & month_centflag) + cent_flag = 1; + else + cent_flag = 0; + + err = regmap_bulk_read(rtc->rn5t618->regmap, rn5t618_rtc_alarm_y_sec, + buff, sizeof(buff)); + if (err) + return err; + + buff[3] = buff[3] & 0x3f; + + alrm->time.tm_sec = bcd2bin(buff[0]); + alrm->time.tm_min = bcd2bin(buff[1]); + + if (ctrl1 & ctrl1_24hr) + alrm->time.tm_hour = bcd2bin(buff[2]); + else + alrm->time.tm_hour = rtc5t619_12hour_bcd2bin(buff[2]); + + alrm->time.tm_mday = bcd2bin(buff[3]); + alrm->time.tm_mon = bcd2bin(buff[4]) - 1; + alrm->time.tm_year = bcd2bin(buff[5]) + 100 * cent_flag; + alrm->enabled = !!(ctrl1 & ctrl1_alarm_enabled); + dev_dbg(dev, "read alarm: %ptr ", &alrm->time); + + return 0; +} + +static int rc5t619_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) +{ + struct rc5t619_rtc *rtc = dev_get_drvdata(dev); + u8 buff[6]; + int err; + int cent_flag; + unsigned int ctrl1; + + err = regmap_read(rtc->rn5t618->regmap, rn5t618_rtc_ctrl1, &ctrl1); + if (err) + return err; + + err = rc5t619_rtc_alarm_enable(dev, 0); + if (err < 0) + return err; + + if (rtc->irq == -1) + return -einval; + + if (alrm->enabled == 0) + return 0; + + if (alrm->time.tm_year >= 100) + cent_flag = 1; + else + cent_flag = 0; + + alrm->time.tm_mon += 1; + buff[0] = bin2bcd(alrm->time.tm_sec); + buff[1] = bin2bcd(alrm->time.tm_min); + + if (ctrl1 & ctrl1_24hr) + buff[2] = bin2bcd(alrm->time.tm_hour); + else + buff[2] = rtc5t619_12hour_bin2bcd(alrm->time.tm_hour); + + buff[3] = bin2bcd(alrm->time.tm_mday); + buff[4] = bin2bcd(alrm->time.tm_mon); + buff[5] = bin2bcd(alrm->time.tm_year - 100 * cent_flag); + buff[3] |= mday_dal_ext; + + err = regmap_bulk_write(rtc->rn5t618->regmap, rn5t618_rtc_alarm_y_sec, + buff, sizeof(buff)); + if (err < 0) + return err; + + return rc5t619_rtc_alarm_enable(dev, alrm->enabled); +} + +static const struct rtc_class_ops rc5t619_rtc_ops = { + .read_time = rc5t619_rtc_read_time, + .set_time = rc5t619_rtc_set_time, + .set_alarm = rc5t619_rtc_set_alarm, + .read_alarm = rc5t619_rtc_read_alarm, + .alarm_irq_enable = rc5t619_rtc_alarm_enable, +}; + +static int rc5t619_rtc_alarm_flag_clr(struct device *dev) +{ + struct rc5t619_rtc *rtc = dev_get_drvdata(dev); + + /* clear alarm-d status bits.*/ + return regmap_update_bits(rtc->rn5t618->regmap, + rn5t618_rtc_ctrl2, + ctrl2_alarm_status | ctrl2_ctc, 0); +} + +static irqreturn_t rc5t619_rtc_irq(int irq, void *data) +{ + struct device *dev = data; + struct rc5t619_rtc *rtc = dev_get_drvdata(dev); + + rc5t619_rtc_alarm_flag_clr(dev); + + rtc_update_irq(rtc->rtc, 1, rtc_irqf | rtc_af); + return irq_handled; +} + +static int rc5t619_rtc_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct rn5t618 *rn5t618 = dev_get_drvdata(pdev->dev.parent); + struct rc5t619_rtc *rtc; + unsigned int ctrl2; + int err; + + rtc = devm_kzalloc(dev, sizeof(*rtc), gfp_kernel); + if (is_err(rtc)) { + err = ptr_err(rtc); + return -enomem; + } + + rtc->rn5t618 = rn5t618; + + dev_set_drvdata(dev, rtc); + rtc->irq = -1; + + if (rn5t618->irq_data) + rtc->irq = regmap_irq_get_virq(rn5t618->irq_data, + rn5t618_irq_rtc); + + if (rtc->irq < 0) + rtc->irq = -1; + + err = regmap_read(rtc->rn5t618->regmap, rn5t618_rtc_ctrl2, &ctrl2); + if (err < 0) + return err; + + /* disable rtc periodic function */ + err = rc5t619_rtc_periodic_disable(&pdev->dev); + if (err) + return err; + + if (ctrl2 & ctrl2_pon) { + err = rc5t619_rtc_alarm_flag_clr(&pdev->dev); + if (err) + return err; + } + + rtc->rtc = devm_rtc_allocate_device(&pdev->dev); + if (is_err(rtc->rtc)) { + err = ptr_err(rtc->rtc); + dev_err(dev, "rtc device register: err %d ", err); + return err; + } + + rtc->rtc->ops = &rc5t619_rtc_ops; + rtc->rtc->range_min = rtc_timestamp_begin_1900; + rtc->rtc->range_max = rtc_timestamp_end_2099; + + /* set interrupt and enable it */ + if (rtc->irq != -1) { + err = devm_request_threaded_irq(&pdev->dev, rtc->irq, null, + rc5t619_rtc_irq, + irqf_oneshot, + "rtc-rc5t619", + &pdev->dev); + if (err < 0) { + dev_err(&pdev->dev, "request irq:%d fail ", rtc->irq); + rtc->irq = -1; + + err = rc5t619_rtc_alarm_enable(&pdev->dev, 0); + if (err) + return err; + + } else { + /* enable wake */ + device_init_wakeup(&pdev->dev, 1); + enable_irq_wake(rtc->irq); + } + } else { + /* system don't want to using alarm interrupt, so close it */ + err = rc5t619_rtc_alarm_enable(&pdev->dev, 0); + if (err) + return err; + + dev_warn(&pdev->dev, "rc5t619 interrupt is disabled "); + } + + return rtc_register_device(rtc->rtc); +} + +static struct platform_driver rc5t619_rtc_driver = { + .driver = { + .name = "rc5t619-rtc", + }, + .probe = rc5t619_rtc_probe, +}; + +module_platform_driver(rc5t619_rtc_driver); +module_alias("platform:rc5t619-rtc"); +module_description("ricoh rc5t619 rtc driver"); +module_license("gpl");
|
Real Time Clock (RTC)
|
540d1e15393d92288d133fca2ea245d8d38227e6
|
andreas kemnade
|
drivers
|
rtc
| |
rtc: fsl-ftm-alarm: enable acpi support
|
this patch enables acpi support in rtc flex timer driver.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
enable acpi support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['fsl-ftm-alarm']
|
['c']
| 1
| 15
| 6
|
--- diff --git a/drivers/rtc/rtc-fsl-ftm-alarm.c b/drivers/rtc/rtc-fsl-ftm-alarm.c --- a/drivers/rtc/rtc-fsl-ftm-alarm.c +++ b/drivers/rtc/rtc-fsl-ftm-alarm.c +#include <linux/acpi.h> - struct device_node *np = pdev->dev.of_node; - irq = irq_of_parse_and_map(np, 0); - if (irq <= 0) { - dev_err(&pdev->dev, "unable to get irq from dt, %d ", irq); - return -einval; + irq = platform_get_irq(pdev, 0); + if (irq < 0) { + dev_err(&pdev->dev, "can't get irq number "); + return irq; - rtc->big_endian = of_property_read_bool(np, "big-endian"); + rtc->big_endian = + device_property_read_bool(&pdev->dev, "big-endian"); + +static const struct acpi_device_id ftm_imx_acpi_ids[] = { + {"nxp0011",}, + { } +}; +module_device_table(acpi, ftm_imx_acpi_ids); + + .acpi_match_table = acpi_ptr(ftm_imx_acpi_ids),
|
Real Time Clock (RTC)
|
929a3270488956316214d70cd4e2ba3fa56ffe31
|
peng ma
|
drivers
|
rtc
| |
rtc/alpha: remove legacy rtc driver
|
the old drivers/char/rtc.c driver was originally the implementation for x86 pcs but got subsequently replaced by the rtc class driver on all architectures except alpha.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
remove legacy rtc driver
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['alpha']
|
['makefile', 'kconfig', 'c', 'defconfig']
| 4
| 2
| 1,372
|
--- diff --git a/arch/alpha/configs/defconfig b/arch/alpha/configs/defconfig --- a/arch/alpha/configs/defconfig +++ b/arch/alpha/configs/defconfig -config_rtc=y +config_rtc_class=y +config_rtc_drv_cmos=y diff --git a/drivers/char/kconfig b/drivers/char/kconfig --- a/drivers/char/kconfig +++ b/drivers/char/kconfig -# -# these legacy rtc drivers just cause too many conflicts with the generic -# rtc framework ... let's not even try to coexist any more. -# -if rtc_lib=n - -config rtc - tristate "enhanced real time clock support (legacy pc rtc driver)" - depends on alpha - ---help--- - if you say y here and create a character special file /dev/rtc with - major number 10 and minor number 135 using mknod ("man mknod"), you - will get access to the real time clock (or hardware clock) built - into your computer. - - every pc has such a clock built in. it can be used to generate - signals from as low as 1hz up to 8192hz, and can also be used - as a 24 hour alarm. it reports status information via the file - /proc/driver/rtc and its behaviour is set by various ioctls on - /dev/rtc. - - if you run linux on a multiprocessor machine and said y to - "symmetric multi processing" above, you should say y here to read - and set the rtc in an smp compatible fashion. - - if you think you have a use for such a device (such as periodic data - sampling), then say y here, and read <file:documentation/admin-guide/rtc.rst> - for details. - - to compile this driver as a module, choose m here: the - module will be called rtc. - -config js_rtc - tristate "enhanced real time clock support" - depends on sparc32 && pci - ---help--- - if you say y here and create a character special file /dev/rtc with - major number 10 and minor number 135 using mknod ("man mknod"), you - will get access to the real time clock (or hardware clock) built - into your computer. - - every pc has such a clock built in. it can be used to generate - signals from as low as 1hz up to 8192hz, and can also be used - as a 24 hour alarm. it reports status information via the file - /proc/driver/rtc and its behaviour is set by various ioctls on - /dev/rtc. - - if you think you have a use for such a device (such as periodic data - sampling), then say y here, and read <file:documentation/admin-guide/rtc.rst> - for details. - - to compile this driver as a module, choose m here: the - module will be called js-rtc. - -endif # rtc_lib - diff --git a/drivers/char/makefile b/drivers/char/makefile --- a/drivers/char/makefile +++ b/drivers/char/makefile -obj-$(config_rtc) += rtc.o -obj-$(config_js_rtc) += js-rtc.o -js-rtc-y = rtc.o - diff --git a/drivers/char/rtc.c b/drivers/char/rtc.c --- a/drivers/char/rtc.c +++ /dev/null -// spdx-license-identifier: gpl-2.0-or-later -/* - * real time clock interface for linux - * - * copyright (c) 1996 paul gortmaker - * - * this driver allows use of the real time clock (built into - * nearly all computers) from user space. it exports the /dev/rtc - * interface supporting various ioctl() and also the - * /proc/driver/rtc pseudo-file for status information. - * - * the ioctls can be used to set the interrupt behaviour and - * generation rate from the rtc via irq 8. then the /dev/rtc - * interface can be used to make use of these timer interrupts, - * be they interval or alarm based. - * - * the /dev/rtc interface will block on reads until an interrupt - * has been received. if a rtc interrupt has already happened, - * it will output an unsigned long and then block. the output value - * contains the interrupt status in the low byte and the number of - * interrupts since the last read in the remaining high bytes. the - * /dev/rtc interface can also be used with the select(2) call. - * - * based on other minimal char device drivers, like alan's - * watchdog, ted's random, etc. etc. - * - * 1.07 paul gortmaker. - * 1.08 miquel van smoorenburg: disallow certain things on the - * dec alpha as the cmos clock is also used for other things. - * 1.09 nikita schmidt: epoch support and some alpha cleanup. - * 1.09a pete zaitcev: sun sparc - * 1.09b jeff garzik: modularize, init cleanup - * 1.09c jeff garzik: smp cleanup - * 1.10 paul barton-davis: add support for async i/o - * 1.10a andrea arcangeli: alpha updates - * 1.10b andrew morton: smp lock fix - * 1.10c cesar barros: smp locking fixes and cleanup - * 1.10d paul gortmaker: delete paranoia check in rtc_exit - * 1.10e maciej w. rozycki: handle decstation's year weirdness. - * 1.11 takashi iwai: kernel access functions - * rtc_register/rtc_unregister/rtc_control - * 1.11a daniele bellucci: audit create_proc_read_entry in rtc_init - * 1.12 venkatesh pallipadi: hooks for emulating rtc on hpet base-timer - * config_hpet_emulate_rtc - * 1.12a maciej w. rozycki: handle memory-mapped chips properly. - * 1.12ac alan cox: allow read access to the day of week register - * 1.12b david john: remove calls to the bkl. - */ - -#define rtc_version "1.12b" - -/* - * note that *all* calls to cmos_read and cmos_write are done with - * interrupts disabled. due to the index-port/data-port (0x70/0x71) - * design of the rtc, we don't want two different things trying to - * get to it at once. (e.g. the periodic 11 min sync from - * kernel/time/ntp.c vs. this driver.) - */ - -#include <linux/interrupt.h> -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/miscdevice.h> -#include <linux/ioport.h> -#include <linux/fcntl.h> -#include <linux/mc146818rtc.h> -#include <linux/init.h> -#include <linux/poll.h> -#include <linux/proc_fs.h> -#include <linux/seq_file.h> -#include <linux/spinlock.h> -#include <linux/sched/signal.h> -#include <linux/sysctl.h> -#include <linux/wait.h> -#include <linux/bcd.h> -#include <linux/delay.h> -#include <linux/uaccess.h> -#include <linux/ratelimit.h> - -#include <asm/current.h> - -#ifdef config_x86 -#include <asm/hpet.h> -#endif - -#ifdef config_sparc32 -#include <linux/of.h> -#include <linux/of_device.h> -#include <asm/io.h> - -static unsigned long rtc_port; -static int rtc_irq; -#endif - -#ifdef config_hpet_emulate_rtc -#undef rtc_irq -#endif - -#ifdef rtc_irq -static int rtc_has_irq = 1; -#endif - -#ifndef config_hpet_emulate_rtc -#define is_hpet_enabled() 0 -#define hpet_set_alarm_time(hrs, min, sec) 0 -#define hpet_set_periodic_freq(arg) 0 -#define hpet_mask_rtc_irq_bit(arg) 0 -#define hpet_set_rtc_irq_bit(arg) 0 -#define hpet_rtc_timer_init() do { } while (0) -#define hpet_rtc_dropped_irq() 0 -#define hpet_register_irq_handler(h) ({ 0; }) -#define hpet_unregister_irq_handler(h) ({ 0; }) -#ifdef rtc_irq -static irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id) -{ - return 0; -} -#endif -#endif - -/* - * we sponge a minor off of the misc major. no need slurping - * up another valuable major dev number for this. if you add - * an ioctl, make sure you don't conflict with sparc's rtc - * ioctls. - */ - -static struct fasync_struct *rtc_async_queue; - -static declare_wait_queue_head(rtc_wait); - -#ifdef rtc_irq -static void rtc_dropped_irq(struct timer_list *unused); - -static define_timer(rtc_irq_timer, rtc_dropped_irq); -#endif - -static ssize_t rtc_read(struct file *file, char __user *buf, - size_t count, loff_t *ppos); - -static long rtc_ioctl(struct file *file, unsigned int cmd, unsigned long arg); -static void rtc_get_rtc_time(struct rtc_time *rtc_tm); - -#ifdef rtc_irq -static __poll_t rtc_poll(struct file *file, poll_table *wait); -#endif - -static void get_rtc_alm_time(struct rtc_time *alm_tm); -#ifdef rtc_irq -static void set_rtc_irq_bit_locked(unsigned char bit); -static void mask_rtc_irq_bit_locked(unsigned char bit); - -static inline void set_rtc_irq_bit(unsigned char bit) -{ - spin_lock_irq(&rtc_lock); - set_rtc_irq_bit_locked(bit); - spin_unlock_irq(&rtc_lock); -} - -static void mask_rtc_irq_bit(unsigned char bit) -{ - spin_lock_irq(&rtc_lock); - mask_rtc_irq_bit_locked(bit); - spin_unlock_irq(&rtc_lock); -} -#endif - -#ifdef config_proc_fs -static int rtc_proc_show(struct seq_file *seq, void *v); -#endif - -/* - * bits in rtc_status. (6 bits of room for future expansion) - */ - -#define rtc_is_open 0x01 /* means /dev/rtc is in use */ -#define rtc_timer_on 0x02 /* missed irq timer active */ - -/* - * rtc_status is never changed by rtc_interrupt, and ioctl/open/close is - * protected by the spin lock rtc_lock. however, ioctl can still disable the - * timer in rtc_status and then with del_timer after the interrupt has read - * rtc_status but before mod_timer is called, which would then reenable the - * timer (but you would need to have an awful timing before you'd trip on it) - */ -static unsigned long rtc_status; /* bitmapped status byte. */ -static unsigned long rtc_freq; /* current periodic irq rate */ -static unsigned long rtc_irq_data; /* our output to the world */ -static unsigned long rtc_max_user_freq = 64; /* > this, need cap_sys_resource */ - -/* - * if this driver ever becomes modularised, it will be really nice - * to make the epoch retain its value across module reload... - */ - -static unsigned long epoch = 1900; /* year corresponding to 0x00 */ - -static const unsigned char days_in_mo[] = -{0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31}; - -/* - * returns true if a clock update is in progress - */ -static inline unsigned char rtc_is_updating(void) -{ - unsigned long flags; - unsigned char uip; - - spin_lock_irqsave(&rtc_lock, flags); - uip = (cmos_read(rtc_freq_select) & rtc_uip); - spin_unlock_irqrestore(&rtc_lock, flags); - return uip; -} - -#ifdef rtc_irq -/* - * a very tiny interrupt handler. it runs with interrupts disabled, - * but there is possibility of conflicting with the set_rtc_mmss() - * call (the rtc irq and the timer irq can easily run at the same - * time in two different cpus). so we need to serialize - * accesses to the chip with the rtc_lock spinlock that each - * architecture should implement in the timer code. - * (see ./arch/xxxx/kernel/time.c for the set_rtc_mmss() function.) - */ - -static irqreturn_t rtc_interrupt(int irq, void *dev_id) -{ - /* - * can be an alarm interrupt, update complete interrupt, - * or a periodic interrupt. we store the status in the - * low byte and the number of interrupts received since - * the last read in the remainder of rtc_irq_data. - */ - - spin_lock(&rtc_lock); - rtc_irq_data += 0x100; - rtc_irq_data &= ~0xff; - if (is_hpet_enabled()) { - /* - * in this case it is hpet rtc interrupt handler - * calling us, with the interrupt information - * passed as arg1, instead of irq. - */ - rtc_irq_data |= (unsigned long)irq & 0xf0; - } else { - rtc_irq_data |= (cmos_read(rtc_intr_flags) & 0xf0); - } - - if (rtc_status & rtc_timer_on) - mod_timer(&rtc_irq_timer, jiffies + hz/rtc_freq + 2*hz/100); - - spin_unlock(&rtc_lock); - - wake_up_interruptible(&rtc_wait); - - kill_fasync(&rtc_async_queue, sigio, poll_in); - - return irq_handled; -} -#endif - -/* - * sysctl-tuning infrastructure. - */ -static struct ctl_table rtc_table[] = { - { - .procname = "max-user-freq", - .data = &rtc_max_user_freq, - .maxlen = sizeof(int), - .mode = 0644, - .proc_handler = proc_dointvec, - }, - { } -}; - -static struct ctl_table rtc_root[] = { - { - .procname = "rtc", - .mode = 0555, - .child = rtc_table, - }, - { } -}; - -static struct ctl_table dev_root[] = { - { - .procname = "dev", - .mode = 0555, - .child = rtc_root, - }, - { } -}; - -static struct ctl_table_header *sysctl_header; - -static int __init init_sysctl(void) -{ - sysctl_header = register_sysctl_table(dev_root); - return 0; -} - -static void __exit cleanup_sysctl(void) -{ - unregister_sysctl_table(sysctl_header); -} - -/* - * now all the various file operations that we export. - */ - -static ssize_t rtc_read(struct file *file, char __user *buf, - size_t count, loff_t *ppos) -{ -#ifndef rtc_irq - return -eio; -#else - declare_waitqueue(wait, current); - unsigned long data; - ssize_t retval; - - if (rtc_has_irq == 0) - return -eio; - - /* - * historically this function used to assume that sizeof(unsigned long) - * is the same in userspace and kernelspace. this lead to problems - * for configurations with multiple abis such a the mips o32 and 64 - * abis supported on the same kernel. so now we support read of both - * 4 and 8 bytes and assume that's the sizeof(unsigned long) in the - * userspace abi. - */ - if (count != sizeof(unsigned int) && count != sizeof(unsigned long)) - return -einval; - - add_wait_queue(&rtc_wait, &wait); - - do { - /* first make it right. then make it fast. putting this whole - * block within the parentheses of a while would be too - * confusing. and no, xchg() is not the answer. */ - - __set_current_state(task_interruptible); - - spin_lock_irq(&rtc_lock); - data = rtc_irq_data; - rtc_irq_data = 0; - spin_unlock_irq(&rtc_lock); - - if (data != 0) - break; - - if (file->f_flags & o_nonblock) { - retval = -eagain; - goto out; - } - if (signal_pending(current)) { - retval = -erestartsys; - goto out; - } - schedule(); - } while (1); - - if (count == sizeof(unsigned int)) { - retval = put_user(data, - (unsigned int __user *)buf) ?: sizeof(int); - } else { - retval = put_user(data, - (unsigned long __user *)buf) ?: sizeof(long); - } - if (!retval) - retval = count; - out: - __set_current_state(task_running); - remove_wait_queue(&rtc_wait, &wait); - - return retval; -#endif -} - -static int rtc_do_ioctl(unsigned int cmd, unsigned long arg, int kernel) -{ - struct rtc_time wtime; - -#ifdef rtc_irq - if (rtc_has_irq == 0) { - switch (cmd) { - case rtc_aie_off: - case rtc_aie_on: - case rtc_pie_off: - case rtc_pie_on: - case rtc_uie_off: - case rtc_uie_on: - case rtc_irqp_read: - case rtc_irqp_set: - return -einval; - } - } -#endif - - switch (cmd) { -#ifdef rtc_irq - case rtc_aie_off: /* mask alarm int. enab. bit */ - { - mask_rtc_irq_bit(rtc_aie); - return 0; - } - case rtc_aie_on: /* allow alarm interrupts. */ - { - set_rtc_irq_bit(rtc_aie); - return 0; - } - case rtc_pie_off: /* mask periodic int. enab. bit */ - { - /* can be called from isr via rtc_control() */ - unsigned long flags; - - spin_lock_irqsave(&rtc_lock, flags); - mask_rtc_irq_bit_locked(rtc_pie); - if (rtc_status & rtc_timer_on) { - rtc_status &= ~rtc_timer_on; - del_timer(&rtc_irq_timer); - } - spin_unlock_irqrestore(&rtc_lock, flags); - - return 0; - } - case rtc_pie_on: /* allow periodic ints */ - { - /* can be called from isr via rtc_control() */ - unsigned long flags; - - /* - * we don't really want joe user enabling more - * than 64hz of interrupts on a multi-user machine. - */ - if (!kernel && (rtc_freq > rtc_max_user_freq) && - (!capable(cap_sys_resource))) - return -eacces; - - spin_lock_irqsave(&rtc_lock, flags); - if (!(rtc_status & rtc_timer_on)) { - mod_timer(&rtc_irq_timer, jiffies + hz/rtc_freq + - 2*hz/100); - rtc_status |= rtc_timer_on; - } - set_rtc_irq_bit_locked(rtc_pie); - spin_unlock_irqrestore(&rtc_lock, flags); - - return 0; - } - case rtc_uie_off: /* mask ints from rtc updates. */ - { - mask_rtc_irq_bit(rtc_uie); - return 0; - } - case rtc_uie_on: /* allow ints for rtc updates. */ - { - set_rtc_irq_bit(rtc_uie); - return 0; - } -#endif - case rtc_alm_read: /* read the present alarm time */ - { - /* - * this returns a struct rtc_time. reading >= 0xc0 - * means "don't care" or "match all". only the tm_hour, - * tm_min, and tm_sec values are filled in. - */ - memset(&wtime, 0, sizeof(struct rtc_time)); - get_rtc_alm_time(&wtime); - break; - } - case rtc_alm_set: /* store a time into the alarm */ - { - /* - * this expects a struct rtc_time. writing 0xff means - * "don't care" or "match all". only the tm_hour, - * tm_min and tm_sec are used. - */ - unsigned char hrs, min, sec; - struct rtc_time alm_tm; - - if (copy_from_user(&alm_tm, (struct rtc_time __user *)arg, - sizeof(struct rtc_time))) - return -efault; - - hrs = alm_tm.tm_hour; - min = alm_tm.tm_min; - sec = alm_tm.tm_sec; - - spin_lock_irq(&rtc_lock); - if (hpet_set_alarm_time(hrs, min, sec)) { - /* - * fallthru and set alarm time in cmos too, - * so that we will get proper value in rtc_alm_read - */ - } - if (!(cmos_read(rtc_control) & rtc_dm_binary) || - rtc_always_bcd) { - if (sec < 60) - sec = bin2bcd(sec); - else - sec = 0xff; - - if (min < 60) - min = bin2bcd(min); - else - min = 0xff; - - if (hrs < 24) - hrs = bin2bcd(hrs); - else - hrs = 0xff; - } - cmos_write(hrs, rtc_hours_alarm); - cmos_write(min, rtc_minutes_alarm); - cmos_write(sec, rtc_seconds_alarm); - spin_unlock_irq(&rtc_lock); - - return 0; - } - case rtc_rd_time: /* read the time/date from rtc */ - { - memset(&wtime, 0, sizeof(struct rtc_time)); - rtc_get_rtc_time(&wtime); - break; - } - case rtc_set_time: /* set the rtc */ - { - struct rtc_time rtc_tm; - unsigned char mon, day, hrs, min, sec, leap_yr; - unsigned char save_control, save_freq_select; - unsigned int yrs; -#ifdef config_mach_decstation - unsigned int real_yrs; -#endif - - if (!capable(cap_sys_time)) - return -eacces; - - if (copy_from_user(&rtc_tm, (struct rtc_time __user *)arg, - sizeof(struct rtc_time))) - return -efault; - - yrs = rtc_tm.tm_year + 1900; - mon = rtc_tm.tm_mon + 1; /* tm_mon starts at zero */ - day = rtc_tm.tm_mday; - hrs = rtc_tm.tm_hour; - min = rtc_tm.tm_min; - sec = rtc_tm.tm_sec; - - if (yrs < 1970) - return -einval; - - leap_yr = ((!(yrs % 4) && (yrs % 100)) || !(yrs % 400)); - - if ((mon > 12) || (day == 0)) - return -einval; - - if (day > (days_in_mo[mon] + ((mon == 2) && leap_yr))) - return -einval; - - if ((hrs >= 24) || (min >= 60) || (sec >= 60)) - return -einval; - - yrs -= epoch; - if (yrs > 255) /* they are unsigned */ - return -einval; - - spin_lock_irq(&rtc_lock); -#ifdef config_mach_decstation - real_yrs = yrs; - yrs = 72; - - /* - * we want to keep the year set to 73 until march - * for non-leap years, so that feb, 29th is handled - * correctly. - */ - if (!leap_yr && mon < 3) { - real_yrs--; - yrs = 73; - } -#endif - /* these limits and adjustments are independent of - * whether the chip is in binary mode or not. - */ - if (yrs > 169) { - spin_unlock_irq(&rtc_lock); - return -einval; - } - if (yrs >= 100) - yrs -= 100; - - if (!(cmos_read(rtc_control) & rtc_dm_binary) - || rtc_always_bcd) { - sec = bin2bcd(sec); - min = bin2bcd(min); - hrs = bin2bcd(hrs); - day = bin2bcd(day); - mon = bin2bcd(mon); - yrs = bin2bcd(yrs); - } - - save_control = cmos_read(rtc_control); - cmos_write((save_control|rtc_set), rtc_control); - save_freq_select = cmos_read(rtc_freq_select); - cmos_write((save_freq_select|rtc_div_reset2), rtc_freq_select); - -#ifdef config_mach_decstation - cmos_write(real_yrs, rtc_dec_year); -#endif - cmos_write(yrs, rtc_year); - cmos_write(mon, rtc_month); - cmos_write(day, rtc_day_of_month); - cmos_write(hrs, rtc_hours); - cmos_write(min, rtc_minutes); - cmos_write(sec, rtc_seconds); - - cmos_write(save_control, rtc_control); - cmos_write(save_freq_select, rtc_freq_select); - - spin_unlock_irq(&rtc_lock); - return 0; - } -#ifdef rtc_irq - case rtc_irqp_read: /* read the periodic irq rate. */ - { - return put_user(rtc_freq, (unsigned long __user *)arg); - } - case rtc_irqp_set: /* set periodic irq rate. */ - { - int tmp = 0; - unsigned char val; - /* can be called from isr via rtc_control() */ - unsigned long flags; - - /* - * the max we can do is 8192hz. - */ - if ((arg < 2) || (arg > 8192)) - return -einval; - /* - * we don't really want joe user generating more - * than 64hz of interrupts on a multi-user machine. - */ - if (!kernel && (arg > rtc_max_user_freq) && - !capable(cap_sys_resource)) - return -eacces; - - while (arg > (1<<tmp)) - tmp++; - - /* - * check that the input was really a power of 2. - */ - if (arg != (1<<tmp)) - return -einval; - - rtc_freq = arg; - - spin_lock_irqsave(&rtc_lock, flags); - if (hpet_set_periodic_freq(arg)) { - spin_unlock_irqrestore(&rtc_lock, flags); - return 0; - } - - val = cmos_read(rtc_freq_select) & 0xf0; - val |= (16 - tmp); - cmos_write(val, rtc_freq_select); - spin_unlock_irqrestore(&rtc_lock, flags); - return 0; - } -#endif - case rtc_epoch_read: /* read the epoch. */ - { - return put_user(epoch, (unsigned long __user *)arg); - } - case rtc_epoch_set: /* set the epoch. */ - { - /* - * there were no rtc clocks before 1900. - */ - if (arg < 1900) - return -einval; - - if (!capable(cap_sys_time)) - return -eacces; - - epoch = arg; - return 0; - } - default: - return -enotty; - } - return copy_to_user((void __user *)arg, - &wtime, sizeof wtime) ? -efault : 0; -} - -static long rtc_ioctl(struct file *file, unsigned int cmd, unsigned long arg) -{ - long ret; - ret = rtc_do_ioctl(cmd, arg, 0); - return ret; -} - -/* - * we enforce only one user at a time here with the open/close. - * also clear the previous interrupt data on an open, and clean - * up things on a close. - */ -static int rtc_open(struct inode *inode, struct file *file) -{ - spin_lock_irq(&rtc_lock); - - if (rtc_status & rtc_is_open) - goto out_busy; - - rtc_status |= rtc_is_open; - - rtc_irq_data = 0; - spin_unlock_irq(&rtc_lock); - return 0; - -out_busy: - spin_unlock_irq(&rtc_lock); - return -ebusy; -} - -static int rtc_fasync(int fd, struct file *filp, int on) -{ - return fasync_helper(fd, filp, on, &rtc_async_queue); -} - -static int rtc_release(struct inode *inode, struct file *file) -{ -#ifdef rtc_irq - unsigned char tmp; - - if (rtc_has_irq == 0) - goto no_irq; - - /* - * turn off all interrupts once the device is no longer - * in use, and clear the data. - */ - - spin_lock_irq(&rtc_lock); - if (!hpet_mask_rtc_irq_bit(rtc_pie | rtc_aie | rtc_uie)) { - tmp = cmos_read(rtc_control); - tmp &= ~rtc_pie; - tmp &= ~rtc_aie; - tmp &= ~rtc_uie; - cmos_write(tmp, rtc_control); - cmos_read(rtc_intr_flags); - } - if (rtc_status & rtc_timer_on) { - rtc_status &= ~rtc_timer_on; - del_timer(&rtc_irq_timer); - } - spin_unlock_irq(&rtc_lock); - -no_irq: -#endif - - spin_lock_irq(&rtc_lock); - rtc_irq_data = 0; - rtc_status &= ~rtc_is_open; - spin_unlock_irq(&rtc_lock); - - return 0; -} - -#ifdef rtc_irq -static __poll_t rtc_poll(struct file *file, poll_table *wait) -{ - unsigned long l; - - if (rtc_has_irq == 0) - return 0; - - poll_wait(file, &rtc_wait, wait); - - spin_lock_irq(&rtc_lock); - l = rtc_irq_data; - spin_unlock_irq(&rtc_lock); - - if (l != 0) - return epollin | epollrdnorm; - return 0; -} -#endif - -/* - * the various file operations we support. - */ - -static const struct file_operations rtc_fops = { - .owner = this_module, - .llseek = no_llseek, - .read = rtc_read, -#ifdef rtc_irq - .poll = rtc_poll, -#endif - .unlocked_ioctl = rtc_ioctl, - .open = rtc_open, - .release = rtc_release, - .fasync = rtc_fasync, -}; - -static struct miscdevice rtc_dev = { - .minor = rtc_minor, - .name = "rtc", - .fops = &rtc_fops, -}; - -static resource_size_t rtc_size; - -static struct resource * __init rtc_request_region(resource_size_t size) -{ - struct resource *r; - - if (rtc_iomapped) - r = request_region(rtc_port(0), size, "rtc"); - else - r = request_mem_region(rtc_port(0), size, "rtc"); - - if (r) - rtc_size = size; - - return r; -} - -static void rtc_release_region(void) -{ - if (rtc_iomapped) - release_region(rtc_port(0), rtc_size); - else - release_mem_region(rtc_port(0), rtc_size); -} - -static int __init rtc_init(void) -{ -#ifdef config_proc_fs - struct proc_dir_entry *ent; -#endif -#if defined(__alpha__) || defined(__mips__) - unsigned int year, ctrl; - char *guess = null; -#endif -#ifdef config_sparc32 - struct device_node *ebus_dp; - struct platform_device *op; -#else - void *r; -#ifdef rtc_irq - irq_handler_t rtc_int_handler_ptr; -#endif -#endif - -#ifdef config_sparc32 - for_each_node_by_name(ebus_dp, "ebus") { - struct device_node *dp; - for_each_child_of_node(ebus_dp, dp) { - if (of_node_name_eq(dp, "rtc")) { - op = of_find_device_by_node(dp); - if (op) { - rtc_port = op->resource[0].start; - rtc_irq = op->irqs[0]; - goto found; - } - } - } - } - rtc_has_irq = 0; - printk(kern_err "rtc_init: no pc rtc found "); - return -eio; - -found: - if (!rtc_irq) { - rtc_has_irq = 0; - goto no_irq; - } - - /* - * xxx interrupt pin #7 in espresso is shared between rtc and - * pci slot 2 inta# (and some intx# in slot 1). - */ - if (request_irq(rtc_irq, rtc_interrupt, irqf_shared, "rtc", - (void *)&rtc_port)) { - rtc_has_irq = 0; - printk(kern_err "rtc: cannot register irq %d ", rtc_irq); - return -eio; - } -no_irq: -#else - r = rtc_request_region(rtc_io_extent); - - /* - * if we've already requested a smaller range (for example, because - * pnpbios or acpi told us how the device is configured), the request - * above might fail because it's too big. - * - * if so, request just the range we actually use. - */ - if (!r) - r = rtc_request_region(rtc_io_extent_used); - if (!r) { -#ifdef rtc_irq - rtc_has_irq = 0; -#endif - printk(kern_err "rtc: i/o resource %lx is not free. ", - (long)(rtc_port(0))); - return -eio; - } - -#ifdef rtc_irq - if (is_hpet_enabled()) { - int err; - - rtc_int_handler_ptr = hpet_rtc_interrupt; - err = hpet_register_irq_handler(rtc_interrupt); - if (err != 0) { - printk(kern_warning "hpet_register_irq_handler failed " - "in rtc_init()."); - return err; - } - } else { - rtc_int_handler_ptr = rtc_interrupt; - } - - if (request_irq(rtc_irq, rtc_int_handler_ptr, 0, "rtc", null)) { - /* yeah right, seeing as irq 8 doesn't even hit the bus. */ - rtc_has_irq = 0; - printk(kern_err "rtc: irq %d is not free. ", rtc_irq); - rtc_release_region(); - - return -eio; - } - hpet_rtc_timer_init(); - -#endif - -#endif /* config_sparc32 vs. others */ - - if (misc_register(&rtc_dev)) { -#ifdef rtc_irq - free_irq(rtc_irq, null); - hpet_unregister_irq_handler(rtc_interrupt); - rtc_has_irq = 0; -#endif - rtc_release_region(); - return -enodev; - } - -#ifdef config_proc_fs - ent = proc_create_single("driver/rtc", 0, null, rtc_proc_show); - if (!ent) - printk(kern_warning "rtc: failed to register with procfs. "); -#endif - -#if defined(__alpha__) || defined(__mips__) - rtc_freq = hz; - - /* each operating system on an alpha uses its own epoch. - let's try to guess which one we are using now. */ - - if (rtc_is_updating() != 0) - msleep(20); - - spin_lock_irq(&rtc_lock); - year = cmos_read(rtc_year); - ctrl = cmos_read(rtc_control); - spin_unlock_irq(&rtc_lock); - - if (!(ctrl & rtc_dm_binary) || rtc_always_bcd) - year = bcd2bin(year); /* this should never happen... */ - - if (year < 20) { - epoch = 2000; - guess = "srm (post-2000)"; - } else if (year >= 20 && year < 48) { - epoch = 1980; - guess = "arc console"; - } else if (year >= 48 && year < 72) { - epoch = 1952; - guess = "digital unix"; -#if defined(__mips__) - } else if (year >= 72 && year < 74) { - epoch = 2000; - guess = "digital decstation"; -#else - } else if (year >= 70) { - epoch = 1900; - guess = "standard pc (1900)"; -#endif - } - if (guess) - printk(kern_info "rtc: %s epoch (%lu) detected ", - guess, epoch); -#endif -#ifdef rtc_irq - if (rtc_has_irq == 0) - goto no_irq2; - - spin_lock_irq(&rtc_lock); - rtc_freq = 1024; - if (!hpet_set_periodic_freq(rtc_freq)) { - /* - * initialize periodic frequency to cmos reset default, - * which is 1024hz - */ - cmos_write(((cmos_read(rtc_freq_select) & 0xf0) | 0x06), - rtc_freq_select); - } - spin_unlock_irq(&rtc_lock); -no_irq2: -#endif - - (void) init_sysctl(); - - printk(kern_info "real time clock driver v" rtc_version " "); - - return 0; -} - -static void __exit rtc_exit(void) -{ - cleanup_sysctl(); - remove_proc_entry("driver/rtc", null); - misc_deregister(&rtc_dev); - -#ifdef config_sparc32 - if (rtc_has_irq) - free_irq(rtc_irq, &rtc_port); -#else - rtc_release_region(); -#ifdef rtc_irq - if (rtc_has_irq) { - free_irq(rtc_irq, null); - hpet_unregister_irq_handler(hpet_rtc_interrupt); - } -#endif -#endif /* config_sparc32 */ -} - -module_init(rtc_init); -module_exit(rtc_exit); - -#ifdef rtc_irq -/* - * at irq rates >= 4096hz, an interrupt may get lost altogether. - * (usually during an ide disk interrupt, with irq unmasking off) - * since the interrupt handler doesn't get called, the irq status - * byte doesn't get read, and the rtc stops generating interrupts. - * a timer is set, and will call this function if/when that happens. - * to get it out of this stalled state, we just read the status. - * at least a jiffy of interrupts (rtc_freq/hz) will have been lost. - * (you *really* shouldn't be trying to use a non-realtime system - * for something that requires a steady > 1khz signal anyways.) - */ - -static void rtc_dropped_irq(struct timer_list *unused) -{ - unsigned long freq; - - spin_lock_irq(&rtc_lock); - - if (hpet_rtc_dropped_irq()) { - spin_unlock_irq(&rtc_lock); - return; - } - - /* just in case someone disabled the timer from behind our back... */ - if (rtc_status & rtc_timer_on) - mod_timer(&rtc_irq_timer, jiffies + hz/rtc_freq + 2*hz/100); - - rtc_irq_data += ((rtc_freq/hz)<<8); - rtc_irq_data &= ~0xff; - rtc_irq_data |= (cmos_read(rtc_intr_flags) & 0xf0); /* restart */ - - freq = rtc_freq; - - spin_unlock_irq(&rtc_lock); - - printk_ratelimited(kern_warning "rtc: lost some interrupts at %ldhz. ", - freq); - - /* now we have new data */ - wake_up_interruptible(&rtc_wait); - - kill_fasync(&rtc_async_queue, sigio, poll_in); -} -#endif - -#ifdef config_proc_fs -/* - * info exported via "/proc/driver/rtc". - */ - -static int rtc_proc_show(struct seq_file *seq, void *v) -{ -#define yn(bit) ((ctrl & bit) ? "yes" : "no") -#define ny(bit) ((ctrl & bit) ? "no" : "yes") - struct rtc_time tm; - unsigned char batt, ctrl; - unsigned long freq; - - spin_lock_irq(&rtc_lock); - batt = cmos_read(rtc_valid) & rtc_vrt; - ctrl = cmos_read(rtc_control); - freq = rtc_freq; - spin_unlock_irq(&rtc_lock); - - - rtc_get_rtc_time(&tm); - - /* - * there is no way to tell if the luser has the rtc set for local - * time or for universal standard time (gmt). probably local though. - */ - seq_printf(seq, - "rtc_time : %ptrt " - "rtc_date : %ptrd " - "rtc_epoch : %04lu ", - &tm, &tm, epoch); - - get_rtc_alm_time(&tm); - - /* - * we implicitly assume 24hr mode here. alarm values >= 0xc0 will - * match any value for that particular field. values that are - * greater than a valid time, but less than 0xc0 shouldn't appear. - */ - seq_puts(seq, "alarm : "); - if (tm.tm_hour <= 24) - seq_printf(seq, "%02d:", tm.tm_hour); - else - seq_puts(seq, "**:"); - - if (tm.tm_min <= 59) - seq_printf(seq, "%02d:", tm.tm_min); - else - seq_puts(seq, "**:"); - - if (tm.tm_sec <= 59) - seq_printf(seq, "%02d ", tm.tm_sec); - else - seq_puts(seq, "** "); - - seq_printf(seq, - "dst_enable : %s " - "bcd : %s " - "24hr : %s " - "square_wave : %s " - "alarm_irq : %s " - "update_irq : %s " - "periodic_irq : %s " - "periodic_freq : %ld " - "batt_status : %s ", - yn(rtc_dst_en), - ny(rtc_dm_binary), - yn(rtc_24h), - yn(rtc_sqwe), - yn(rtc_aie), - yn(rtc_uie), - yn(rtc_pie), - freq, - batt ? "okay" : "dead"); - - return 0; -#undef yn -#undef ny -} -#endif - -static void rtc_get_rtc_time(struct rtc_time *rtc_tm) -{ - unsigned long uip_watchdog = jiffies, flags; - unsigned char ctrl; -#ifdef config_mach_decstation - unsigned int real_year; -#endif - - /* - * read rtc once any update in progress is done. the update - * can take just over 2ms. we wait 20ms. there is no need to - * to poll-wait (up to 1s - eeccch) for the falling edge of rtc_uip. - * if you need to know *exactly* when a second has started, enable - * periodic update complete interrupts, (via ioctl) and then - * immediately read /dev/rtc which will block until you get the irq. - * once the read clears, read the rtc time (again via ioctl). easy. - */ - - while (rtc_is_updating() != 0 && - time_before(jiffies, uip_watchdog + 2*hz/100)) - cpu_relax(); - - /* - * only the values that we read from the rtc are set. we leave - * tm_wday, tm_yday and tm_isdst untouched. note that while the - * rtc has rtc_day_of_week, we should usually ignore it, as it is - * only updated by the rtc when initially set to a non-zero value. - */ - spin_lock_irqsave(&rtc_lock, flags); - rtc_tm->tm_sec = cmos_read(rtc_seconds); - rtc_tm->tm_min = cmos_read(rtc_minutes); - rtc_tm->tm_hour = cmos_read(rtc_hours); - rtc_tm->tm_mday = cmos_read(rtc_day_of_month); - rtc_tm->tm_mon = cmos_read(rtc_month); - rtc_tm->tm_year = cmos_read(rtc_year); - /* only set from 2.6.16 onwards */ - rtc_tm->tm_wday = cmos_read(rtc_day_of_week); - -#ifdef config_mach_decstation - real_year = cmos_read(rtc_dec_year); -#endif - ctrl = cmos_read(rtc_control); - spin_unlock_irqrestore(&rtc_lock, flags); - - if (!(ctrl & rtc_dm_binary) || rtc_always_bcd) { - rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec); - rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min); - rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour); - rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday); - rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon); - rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year); - rtc_tm->tm_wday = bcd2bin(rtc_tm->tm_wday); - } - -#ifdef config_mach_decstation - rtc_tm->tm_year += real_year - 72; -#endif - - /* - * account for differences between how the rtc uses the values - * and how they are defined in a struct rtc_time; - */ - rtc_tm->tm_year += epoch - 1900; - if (rtc_tm->tm_year <= 69) - rtc_tm->tm_year += 100; - - rtc_tm->tm_mon--; -} - -static void get_rtc_alm_time(struct rtc_time *alm_tm) -{ - unsigned char ctrl; - - /* - * only the values that we read from the rtc are set. that - * means only tm_hour, tm_min, and tm_sec. - */ - spin_lock_irq(&rtc_lock); - alm_tm->tm_sec = cmos_read(rtc_seconds_alarm); - alm_tm->tm_min = cmos_read(rtc_minutes_alarm); - alm_tm->tm_hour = cmos_read(rtc_hours_alarm); - ctrl = cmos_read(rtc_control); - spin_unlock_irq(&rtc_lock); - - if (!(ctrl & rtc_dm_binary) || rtc_always_bcd) { - alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec); - alm_tm->tm_min = bcd2bin(alm_tm->tm_min); - alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour); - } -} - -#ifdef rtc_irq -/* - * used to disable/enable interrupts for any one of uie, aie, pie. - * rumour has it that if you frob the interrupt enable/disable - * bits in rtc_control, you should read rtc_intr_flags, to - * ensure you actually start getting interrupts. probably for - * compatibility with older/broken chipset rtc implementations. - * we also clear out any old irq data after an ioctl() that - * meddles with the interrupt enable/disable bits. - */ - -static void mask_rtc_irq_bit_locked(unsigned char bit) -{ - unsigned char val; - - if (hpet_mask_rtc_irq_bit(bit)) - return; - val = cmos_read(rtc_control); - val &= ~bit; - cmos_write(val, rtc_control); - cmos_read(rtc_intr_flags); - - rtc_irq_data = 0; -} - -static void set_rtc_irq_bit_locked(unsigned char bit) -{ - unsigned char val; - - if (hpet_set_rtc_irq_bit(bit)) - return; - val = cmos_read(rtc_control); - val |= bit; - cmos_write(val, rtc_control); - cmos_read(rtc_intr_flags); - - rtc_irq_data = 0; -} -#endif - -module_author("paul gortmaker"); -module_license("gpl"); -module_alias_miscdev(rtc_minor);
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Real Time Clock (RTC)
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f52ef24be21a2647fc50b6f8f2a4815d47bbad79
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arnd bergmann
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arch
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alpha
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configs
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rtc/ia64: remove legacy efirtc driver
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there are two efi rtc drivers, the original drivers/char/efirtc.c driver and the more modern drivers/rtc/rtc-efi.c.
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this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
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remove legacy efirtc driver
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['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
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['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
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['ia64']
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['generic_defconfig', 'c', 'h', 'kconfig', 'gensparse_defconfig', 'tiger_defconfig', 'zx1_defconfig', 'bigsur_defconfig', 'makefile']
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| 11
| 377
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--- diff --git a/arch/ia64/configs/bigsur_defconfig b/arch/ia64/configs/bigsur_defconfig --- a/arch/ia64/configs/bigsur_defconfig +++ b/arch/ia64/configs/bigsur_defconfig -config_efi_rtc=y +config_rtc_class=y +config_rtc_drv_efi=y diff --git a/arch/ia64/configs/generic_defconfig b/arch/ia64/configs/generic_defconfig --- a/arch/ia64/configs/generic_defconfig +++ b/arch/ia64/configs/generic_defconfig -config_efi_rtc=y +config_rtc_class=y +config_rtc_drv_efi=y diff --git a/arch/ia64/configs/gensparse_defconfig b/arch/ia64/configs/gensparse_defconfig --- a/arch/ia64/configs/gensparse_defconfig +++ b/arch/ia64/configs/gensparse_defconfig -config_efi_rtc=y +config_rtc_class=y +config_rtc_drv_efi=y diff --git a/arch/ia64/configs/tiger_defconfig b/arch/ia64/configs/tiger_defconfig --- a/arch/ia64/configs/tiger_defconfig +++ b/arch/ia64/configs/tiger_defconfig -config_efi_rtc=y +config_rtc_class=y +config_rtc_drv_efi=y diff --git a/arch/ia64/configs/zx1_defconfig b/arch/ia64/configs/zx1_defconfig --- a/arch/ia64/configs/zx1_defconfig +++ b/arch/ia64/configs/zx1_defconfig -config_efi_rtc=y +config_rtc_class=y +config_rtc_drv_efi=y diff --git a/drivers/char/kconfig b/drivers/char/kconfig --- a/drivers/char/kconfig +++ b/drivers/char/kconfig -config efi_rtc - bool "efi real time clock services" - depends on ia64 - diff --git a/drivers/char/makefile b/drivers/char/makefile --- a/drivers/char/makefile +++ b/drivers/char/makefile -obj-$(config_efi_rtc) += efirtc.o diff --git a/drivers/char/efirtc.c b/drivers/char/efirtc.c --- a/drivers/char/efirtc.c +++ /dev/null -// spdx-license-identifier: gpl-2.0-only -/* - * efi time services driver for linux - * - * copyright (c) 1999 hewlett-packard co - * copyright (c) 1999 stephane eranian <eranian@hpl.hp.com> - * - * based on skeleton from the drivers/char/rtc.c driver by p. gortmaker - * - * this code provides an architected & portable interface to the real time - * clock by using efi instead of direct bit fiddling. the functionalities are - * quite different from the rtc.c driver. the only way to talk to the device - * is by using ioctl(). there is a /proc interface which provides the raw - * information. - * - * please note that we have kept the api as close as possible to the - * legacy rtc. the standard /sbin/hwclock program should work normally - * when used to get/set the time. - * - * notes: - * - locking is required for safe execution of efi calls with regards - * to interrupts and smp. - * - * todo (december 1999): - * - provide the api to set/get the wakeup alarm (different from the - * rtc.c alarm). - * - smp testing - * - add module support - */ - -#include <linux/types.h> -#include <linux/errno.h> -#include <linux/miscdevice.h> -#include <linux/init.h> -#include <linux/rtc.h> -#include <linux/proc_fs.h> -#include <linux/seq_file.h> -#include <linux/efi.h> -#include <linux/uaccess.h> - - -#define efi_rtc_version "0.4" - -#define efi_isdst (efi_time_adjust_daylight|efi_time_in_daylight) -/* - * efi epoch is 1/1/1998 - */ -#define efi_rtc_epoch 1998 - -static define_spinlock(efi_rtc_lock); - -static long efi_rtc_ioctl(struct file *file, unsigned int cmd, - unsigned long arg); - -#define is_leap(year) \ - ((year) % 4 == 0 && ((year) % 100 != 0 || (year) % 400 == 0)) - -static const unsigned short int __mon_yday[2][13] = -{ - /* normal years. */ - { 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334, 365 }, - /* leap years. */ - { 0, 31, 60, 91, 121, 152, 182, 213, 244, 274, 305, 335, 366 } -}; - -/* - * returns day of the year [0-365] - */ -static inline int -compute_yday(efi_time_t *eft) -{ - /* efi_time_t.month is in the [1-12] so, we need -1 */ - return __mon_yday[is_leap(eft->year)][eft->month-1]+ eft->day -1; -} -/* - * returns day of the week [0-6] 0=sunday - * - * don't try to provide a year that's before 1998, please ! - */ -static int -compute_wday(efi_time_t *eft) -{ - int y; - int ndays = 0; - - if ( eft->year < 1998 ) { - printk(kern_err "efirtc: efi year < 1998, invalid date "); - return -1; - } - - for(y=efi_rtc_epoch; y < eft->year; y++ ) { - ndays += 365 + (is_leap(y) ? 1 : 0); - } - ndays += compute_yday(eft); - - /* - * 4=1/1/1998 was a thursday - */ - return (ndays + 4) % 7; -} - -static void -convert_to_efi_time(struct rtc_time *wtime, efi_time_t *eft) -{ - - eft->year = wtime->tm_year + 1900; - eft->month = wtime->tm_mon + 1; - eft->day = wtime->tm_mday; - eft->hour = wtime->tm_hour; - eft->minute = wtime->tm_min; - eft->second = wtime->tm_sec; - eft->nanosecond = 0; - eft->daylight = wtime->tm_isdst ? efi_isdst: 0; - eft->timezone = efi_unspecified_timezone; -} - -static void -convert_from_efi_time(efi_time_t *eft, struct rtc_time *wtime) -{ - memset(wtime, 0, sizeof(*wtime)); - wtime->tm_sec = eft->second; - wtime->tm_min = eft->minute; - wtime->tm_hour = eft->hour; - wtime->tm_mday = eft->day; - wtime->tm_mon = eft->month - 1; - wtime->tm_year = eft->year - 1900; - - /* day of the week [0-6], sunday=0 */ - wtime->tm_wday = compute_wday(eft); - - /* day in the year [1-365]*/ - wtime->tm_yday = compute_yday(eft); - - - switch (eft->daylight & efi_isdst) { - case efi_isdst: - wtime->tm_isdst = 1; - break; - case efi_time_adjust_daylight: - wtime->tm_isdst = 0; - break; - default: - wtime->tm_isdst = -1; - } -} - -static long efi_rtc_ioctl(struct file *file, unsigned int cmd, - unsigned long arg) -{ - - efi_status_t status; - unsigned long flags; - efi_time_t eft; - efi_time_cap_t cap; - struct rtc_time wtime; - struct rtc_wkalrm __user *ewp; - unsigned char enabled, pending; - - switch (cmd) { - case rtc_uie_on: - case rtc_uie_off: - case rtc_pie_on: - case rtc_pie_off: - case rtc_aie_on: - case rtc_aie_off: - case rtc_alm_set: - case rtc_alm_read: - case rtc_irqp_read: - case rtc_irqp_set: - case rtc_epoch_read: - case rtc_epoch_set: - return -einval; - - case rtc_rd_time: - spin_lock_irqsave(&efi_rtc_lock, flags); - - status = efi.get_time(&eft, &cap); - - spin_unlock_irqrestore(&efi_rtc_lock,flags); - - if (status != efi_success) { - /* should never happen */ - printk(kern_err "efitime: can't read time "); - return -einval; - } - - convert_from_efi_time(&eft, &wtime); - - return copy_to_user((void __user *)arg, &wtime, - sizeof (struct rtc_time)) ? - efault : 0; - - case rtc_set_time: - - if (!capable(cap_sys_time)) return -eacces; - - if (copy_from_user(&wtime, (struct rtc_time __user *)arg, - sizeof(struct rtc_time)) ) - return -efault; - - convert_to_efi_time(&wtime, &eft); - - spin_lock_irqsave(&efi_rtc_lock, flags); - - status = efi.set_time(&eft); - - spin_unlock_irqrestore(&efi_rtc_lock,flags); - - return status == efi_success ? 0 : -einval; - - case rtc_wkalm_set: - - if (!capable(cap_sys_time)) return -eacces; - - ewp = (struct rtc_wkalrm __user *)arg; - - if ( get_user(enabled, &ewp->enabled) - || copy_from_user(&wtime, &ewp->time, sizeof(struct rtc_time)) ) - return -efault; - - convert_to_efi_time(&wtime, &eft); - - spin_lock_irqsave(&efi_rtc_lock, flags); - /* - * xxx fixme: - * as of efi 0.92 with the firmware i have on my - * machine this call does not seem to work quite - * right - */ - status = efi.set_wakeup_time((efi_bool_t)enabled, &eft); - - spin_unlock_irqrestore(&efi_rtc_lock,flags); - - return status == efi_success ? 0 : -einval; - - case rtc_wkalm_rd: - - spin_lock_irqsave(&efi_rtc_lock, flags); - - status = efi.get_wakeup_time((efi_bool_t *)&enabled, (efi_bool_t *)&pending, &eft); - - spin_unlock_irqrestore(&efi_rtc_lock,flags); - - if (status != efi_success) return -einval; - - ewp = (struct rtc_wkalrm __user *)arg; - - if ( put_user(enabled, &ewp->enabled) - || put_user(pending, &ewp->pending)) return -efault; - - convert_from_efi_time(&eft, &wtime); - - return copy_to_user(&ewp->time, &wtime, - sizeof(struct rtc_time)) ? -efault : 0; - } - return -enotty; -} - -/* - * the various file operations we support. - */ - -static const struct file_operations efi_rtc_fops = { - .owner = this_module, - .unlocked_ioctl = efi_rtc_ioctl, - .llseek = no_llseek, -}; - -static struct miscdevice efi_rtc_dev= { - efi_rtc_minor, - "efirtc", - &efi_rtc_fops -}; - -/* - * we export raw efi information to /proc/driver/efirtc - */ -static int efi_rtc_proc_show(struct seq_file *m, void *v) -{ - efi_time_t eft, alm; - efi_time_cap_t cap; - efi_bool_t enabled, pending; - unsigned long flags; - - memset(&eft, 0, sizeof(eft)); - memset(&alm, 0, sizeof(alm)); - memset(&cap, 0, sizeof(cap)); - - spin_lock_irqsave(&efi_rtc_lock, flags); - - efi.get_time(&eft, &cap); - efi.get_wakeup_time(&enabled, &pending, &alm); - - spin_unlock_irqrestore(&efi_rtc_lock,flags); - - seq_printf(m, - "time : %u:%u:%u.%09u " - "date : %u-%u-%u " - "daylight : %u ", - eft.hour, eft.minute, eft.second, eft.nanosecond, - eft.year, eft.month, eft.day, - eft.daylight); - - if (eft.timezone == efi_unspecified_timezone) - seq_puts(m, "timezone : unspecified "); - else - /* xxx fixme: convert to string? */ - seq_printf(m, "timezone : %u ", eft.timezone); - - - seq_printf(m, - "alarm time : %u:%u:%u.%09u " - "alarm date : %u-%u-%u " - "alarm daylight : %u " - "enabled : %s " - "pending : %s ", - alm.hour, alm.minute, alm.second, alm.nanosecond, - alm.year, alm.month, alm.day, - alm.daylight, - enabled == 1 ? "yes" : "no", - pending == 1 ? "yes" : "no"); - - if (eft.timezone == efi_unspecified_timezone) - seq_puts(m, "timezone : unspecified "); - else - /* xxx fixme: convert to string? */ - seq_printf(m, "timezone : %u ", alm.timezone); - - /* - * now prints the capabilities - */ - seq_printf(m, - "resolution : %u " - "accuracy : %u " - "setstozero : %u ", - cap.resolution, cap.accuracy, cap.sets_to_zero); - - return 0; -} -static int __init -efi_rtc_init(void) -{ - int ret; - struct proc_dir_entry *dir; - - printk(kern_info "efi time services driver v%s ", efi_rtc_version); - - ret = misc_register(&efi_rtc_dev); - if (ret) { - printk(kern_err "efirtc: can't misc_register on minor=%d ", - efi_rtc_minor); - return ret; - } - - dir = proc_create_single("driver/efirtc", 0, null, efi_rtc_proc_show); - if (dir == null) { - printk(kern_err "efirtc: can't create /proc/driver/efirtc. "); - misc_deregister(&efi_rtc_dev); - return -1; - } - return 0; -} -device_initcall(efi_rtc_init); - -/* -module_license("gpl"); -*/ diff --git a/include/linux/miscdevice.h b/include/linux/miscdevice.h --- a/include/linux/miscdevice.h +++ b/include/linux/miscdevice.h -#define efi_rtc_minor 136 /* efi time services */ +/*#define efi_rtc_minor 136 was efi time services */
|
Real Time Clock (RTC)
|
8067c0b0c6ac7bce201961f0092e2532b12fc00a
|
arnd bergmann
|
include
|
linux
|
configs
|
pinctrl: bcm2835: add support for all gpios on bcm2711
|
the bcm2711 supports 58 gpios. so extend pinctrl and gpios accordingly.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add support for all gpios on bcm2711
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['bcm2835']
|
['c']
| 1
| 42
| 12
|
--- diff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c b/drivers/pinctrl/bcm/pinctrl-bcm2835.c --- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c +++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c +#define bcm2711_num_gpios 58 - unsigned int irq_type[bcm2835_num_gpios]; + unsigned int irq_type[bcm2711_num_gpios]; + bcm2835_gpio_pin(54), + bcm2835_gpio_pin(55), + bcm2835_gpio_pin(56), + bcm2835_gpio_pin(57), + "gpio54", + "gpio55", + "gpio56", + "gpio57", +static const struct gpio_chip bcm2711_gpio_chip = { + .label = "pinctrl-bcm2711", + .owner = this_module, + .request = gpiochip_generic_request, + .free = gpiochip_generic_free, + .direction_input = bcm2835_gpio_direction_input, + .direction_output = bcm2835_gpio_direction_output, + .get_direction = bcm2835_gpio_get_direction, + .get = bcm2835_gpio_get, + .set = bcm2835_gpio_set, + .set_config = gpiochip_generic_config, + .base = -1, + .ngpio = bcm2711_num_gpios, + .can_sleep = false, +}; + - case 2: /* irq2 covers gpios 46-53 */ + case 2: /* irq2 covers gpios 46-57 */ - return array_size(bcm2835_gpio_groups); + return bcm2835_num_gpios; - if (pin >= array_size(bcm2835_gpio_pins)) { + if (pin >= pc->pctl_desc.npins) { - *num_groups = array_size(bcm2835_gpio_groups); + *num_groups = bcm2835_num_gpios; - .npins = array_size(bcm2835_gpio_pins), + .npins = bcm2835_num_gpios, - .name = module_name, + .name = "pinctrl-bcm2711", - .npins = array_size(bcm2835_gpio_pins), + .npins = bcm2711_num_gpios, +static const struct pinctrl_gpio_range bcm2711_pinctrl_gpio_range = { + .name = "pinctrl-bcm2711", + .npins = bcm2711_num_gpios, +}; + - .gpio_chip = &bcm2835_gpio_chip, + .gpio_chip = &bcm2711_gpio_chip, - .gpio_range = &bcm2835_pinctrl_gpio_range, + .gpio_range = &bcm2711_pinctrl_gpio_range, - build_bug_on(array_size(bcm2835_gpio_pins) != bcm2835_num_gpios); - build_bug_on(array_size(bcm2835_gpio_groups) != bcm2835_num_gpios); + build_bug_on(array_size(bcm2835_gpio_pins) != bcm2711_num_gpios); + build_bug_on(array_size(bcm2835_gpio_groups) != bcm2711_num_gpios);
|
Pin Controllers (pinctrl)
|
b1d84a3d0a26c5844a22bc09a42704b9371208bb
|
stefan wahren nicolas saenz julienne nsaenzjulienne suse de
|
drivers
|
pinctrl
|
bcm
|
pinctrl: da9062: add driver support
|
the da9062 is a mfd pmic device which supports 5 gpios. the gpios can be used as input, output or have a special use-case.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add driver support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['da9062']
|
['kconfig', 'maintainers', 'c', 'makefile']
| 4
| 314
| 0
|
--- diff --git a/maintainers b/maintainers --- a/maintainers +++ b/maintainers +f: drivers/pinctrl/pinctrl-da90??.c diff --git a/drivers/pinctrl/kconfig b/drivers/pinctrl/kconfig --- a/drivers/pinctrl/kconfig +++ b/drivers/pinctrl/kconfig +config pinctrl_da9062 + tristate "dialog semiconductor da9062 pmic pinctrl and gpio support" + depends on mfd_da9062 + select gpiolib + help + the dialog da9062 pmic provides multiple gpios that can be muxed for + different functions. this driver bundles a pinctrl driver to select the + function muxing and a gpio driver to handle the gpio when the gpio + function is selected. + + say yes to enable pinctrl and gpio support for the da9062 pmic. + diff --git a/drivers/pinctrl/makefile b/drivers/pinctrl/makefile --- a/drivers/pinctrl/makefile +++ b/drivers/pinctrl/makefile +obj-$(config_pinctrl_da9062) += pinctrl-da9062.o diff --git a/drivers/pinctrl/pinctrl-da9062.c b/drivers/pinctrl/pinctrl-da9062.c --- /dev/null +++ b/drivers/pinctrl/pinctrl-da9062.c +// spdx-license-identifier: gpl-2.0 +/* + * dialog da9062 pinctrl and gpio driver. + * based on da9055 gpio driver. + * + * todo: + * - add pinmux and pinctrl support (gpio alternate mode) + * + * documents: + * [1] https://www.dialog-semiconductor.com/sites/default/files/da9062_datasheet_3v6.pdf + * + * copyright (c) 2019 pengutronix, marco felsch <kernel@pengutronix.de> + */ +#include <linux/bits.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> + +#include <linux/gpio/driver.h> + +#include <linux/mfd/da9062/core.h> +#include <linux/mfd/da9062/registers.h> + +/* + * we need this get the gpio_desc from a <gpio_chip,offset> tuple to decide if + * the gpio is active low without a vendor specific dt-binding. + */ +#include <../gpio/gpiolib.h> + +#define da9062_type(offset) (4 * (offset % 2)) +#define da9062_pin_shift(offset) (4 * (offset % 2)) +#define da9062_pin_alternate 0x00 /* gpio alternate mode */ +#define da9062_pin_gpi 0x01 /* gpio in */ +#define da9062_pin_gpo_od 0x02 /* gpio out open-drain */ +#define da9062_pin_gpo_pp 0x03 /* gpio out push-pull */ +#define da9062_gpio_num 5 + +struct da9062_pctl { + struct da9062 *da9062; + struct gpio_chip gc; + unsigned int pin_config[da9062_gpio_num]; +}; + +static int da9062_pctl_get_pin_mode(struct da9062_pctl *pctl, + unsigned int offset) +{ + struct regmap *regmap = pctl->da9062->regmap; + int ret, val; + + ret = regmap_read(regmap, da9062aa_gpio_0_1 + (offset >> 1), &val); + if (ret < 0) + return ret; + + val >>= da9062_pin_shift(offset); + val &= da9062aa_gpio0_pin_mask; + + return val; +} + +static int da9062_pctl_set_pin_mode(struct da9062_pctl *pctl, + unsigned int offset, unsigned int mode_req) +{ + struct regmap *regmap = pctl->da9062->regmap; + unsigned int mode = mode_req; + unsigned int mask; + int ret; + + mode &= da9062aa_gpio0_pin_mask; + mode <<= da9062_pin_shift(offset); + mask = da9062aa_gpio0_pin_mask << da9062_pin_shift(offset); + + ret = regmap_update_bits(regmap, da9062aa_gpio_0_1 + (offset >> 1), + mask, mode); + if (!ret) + pctl->pin_config[offset] = mode_req; + + return ret; +} + +static int da9062_gpio_get(struct gpio_chip *gc, unsigned int offset) +{ + struct da9062_pctl *pctl = gpiochip_get_data(gc); + struct regmap *regmap = pctl->da9062->regmap; + int gpio_mode, val; + int ret; + + gpio_mode = da9062_pctl_get_pin_mode(pctl, offset); + if (gpio_mode < 0) + return gpio_mode; + + switch (gpio_mode) { + case da9062_pin_alternate: + return -enotsupp; + case da9062_pin_gpi: + ret = regmap_read(regmap, da9062aa_status_b, &val); + if (ret < 0) + return ret; + break; + case da9062_pin_gpo_od: + case da9062_pin_gpo_pp: + ret = regmap_read(regmap, da9062aa_gpio_mode0_4, &val); + if (ret < 0) + return ret; + } + + return !!(val & bit(offset)); +} + +static void da9062_gpio_set(struct gpio_chip *gc, unsigned int offset, + int value) +{ + struct da9062_pctl *pctl = gpiochip_get_data(gc); + struct regmap *regmap = pctl->da9062->regmap; + + regmap_update_bits(regmap, da9062aa_gpio_mode0_4, bit(offset), + value << offset); +} + +static int da9062_gpio_get_direction(struct gpio_chip *gc, unsigned int offset) +{ + struct da9062_pctl *pctl = gpiochip_get_data(gc); + int gpio_mode; + + gpio_mode = da9062_pctl_get_pin_mode(pctl, offset); + if (gpio_mode < 0) + return gpio_mode; + + switch (gpio_mode) { + case da9062_pin_alternate: + return -enotsupp; + case da9062_pin_gpi: + return gpio_line_direction_in; + case da9062_pin_gpo_od: + case da9062_pin_gpo_pp: + return gpio_line_direction_out; + } + + return -einval; +} + +static int da9062_gpio_direction_input(struct gpio_chip *gc, + unsigned int offset) +{ + struct da9062_pctl *pctl = gpiochip_get_data(gc); + struct regmap *regmap = pctl->da9062->regmap; + struct gpio_desc *desc = gpiochip_get_desc(gc, offset); + unsigned int gpi_type; + int ret; + + ret = da9062_pctl_set_pin_mode(pctl, offset, da9062_pin_gpi); + if (ret) + return ret; + + /* + * if the gpio is active low we should set it in hw too. no worries + * about gpio_get() because we read and return the gpio-level. so the + * gpiolib active_low handling is still correct. + * + * 0 - active low, 1 - active high + */ + gpi_type = !gpiod_is_active_low(desc); + + return regmap_update_bits(regmap, da9062aa_gpio_0_1 + (offset >> 1), + da9062aa_gpio0_type_mask << da9062_type(offset), + gpi_type << da9062_type(offset)); +} + +static int da9062_gpio_direction_output(struct gpio_chip *gc, + unsigned int offset, int value) +{ + struct da9062_pctl *pctl = gpiochip_get_data(gc); + unsigned int pin_config = pctl->pin_config[offset]; + int ret; + + ret = da9062_pctl_set_pin_mode(pctl, offset, pin_config); + if (ret) + return ret; + + da9062_gpio_set(gc, offset, value); + + return 0; +} + +static int da9062_gpio_set_config(struct gpio_chip *gc, unsigned int offset, + unsigned long config) +{ + struct da9062_pctl *pctl = gpiochip_get_data(gc); + struct regmap *regmap = pctl->da9062->regmap; + int gpio_mode; + + /* + * we need to meet the following restrictions [1, figure 18]: + * - pin_config_bias_pull_down -> only allowed if the pin is used as + * gpio input + * - pin_config_bias_pull_up -> only allowed if the pin is used as + * gpio output open-drain. + */ + + switch (pinconf_to_config_param(config)) { + case pin_config_bias_disable: + return regmap_update_bits(regmap, da9062aa_config_k, + bit(offset), 0); + case pin_config_bias_pull_down: + gpio_mode = da9062_pctl_get_pin_mode(pctl, offset); + if (gpio_mode < 0) + return -einval; + else if (gpio_mode != da9062_pin_gpi) + return -enotsupp; + return regmap_update_bits(regmap, da9062aa_config_k, + bit(offset), bit(offset)); + case pin_config_bias_pull_up: + gpio_mode = da9062_pctl_get_pin_mode(pctl, offset); + if (gpio_mode < 0) + return -einval; + else if (gpio_mode != da9062_pin_gpo_od) + return -enotsupp; + return regmap_update_bits(regmap, da9062aa_config_k, + bit(offset), bit(offset)); + case pin_config_drive_open_drain: + return da9062_pctl_set_pin_mode(pctl, offset, + da9062_pin_gpo_od); + case pin_config_drive_push_pull: + return da9062_pctl_set_pin_mode(pctl, offset, + da9062_pin_gpo_pp); + default: + return -enotsupp; + } +} + +static int da9062_gpio_to_irq(struct gpio_chip *gc, unsigned int offset) +{ + struct da9062_pctl *pctl = gpiochip_get_data(gc); + struct da9062 *da9062 = pctl->da9062; + + return regmap_irq_get_virq(da9062->regmap_irq, + da9062_irq_gpi0 + offset); +} + +static const struct gpio_chip reference_gc = { + .owner = this_module, + .get = da9062_gpio_get, + .set = da9062_gpio_set, + .get_direction = da9062_gpio_get_direction, + .direction_input = da9062_gpio_direction_input, + .direction_output = da9062_gpio_direction_output, + .set_config = da9062_gpio_set_config, + .to_irq = da9062_gpio_to_irq, + .can_sleep = true, + .ngpio = da9062_gpio_num, + .base = -1, +}; + +static int da9062_pctl_probe(struct platform_device *pdev) +{ + struct device *parent = pdev->dev.parent; + struct da9062_pctl *pctl; + int i; + + pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), gfp_kernel); + if (!pctl) + return -enomem; + + pctl->da9062 = dev_get_drvdata(parent); + if (!pctl->da9062) + return -einval; + + if (!device_property_present(parent, "gpio-controller")) + return 0; + + for (i = 0; i < array_size(pctl->pin_config); i++) + pctl->pin_config[i] = da9062_pin_gpo_pp; + + /* + * currently the driver handles only the gpio support. the + * pinctrl/pinmux support can be added later if needed. + */ + pctl->gc = reference_gc; + pctl->gc.label = dev_name(&pdev->dev); + pctl->gc.parent = &pdev->dev; +#ifdef config_of_gpio + pctl->gc.of_node = parent->of_node; +#endif + + platform_set_drvdata(pdev, pctl); + + return devm_gpiochip_add_data(&pdev->dev, &pctl->gc, pctl); +} + +static struct platform_driver da9062_pctl_driver = { + .probe = da9062_pctl_probe, + .driver = { + .name = "da9062-gpio", + }, +}; +module_platform_driver(da9062_pctl_driver); + +module_author("marco felsch <kernel@pengutronix.de>"); +module_description("da9062 pmic pinctrl and gpio driver"); +module_license("gpl v2"); +module_alias("platform:da9062-gpio");
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Pin Controllers (pinctrl)
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56cc3af4e8c8eaba91b51efa6081a868adbd97c3
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marco felsch
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drivers
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pinctrl
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pinctrl: mediatek: add support for pin configuration dump via debugfs.
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add support for pin configuration dump via catting /sys/kernel/debug/pinctrl/$platform_dependent_path/pinconf-pins. pinctrl framework had already support such dump. this patch implement the operation function pointer to fullfill this dump.
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this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
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add support for pin configuration dump via debugfs
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['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
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['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
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['mediatek']
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['h', 'c']
| 2
| 112
| 0
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--- diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.c b/drivers/pinctrl/mediatek/pinctrl-paris.c --- a/drivers/pinctrl/mediatek/pinctrl-paris.c +++ b/drivers/pinctrl/mediatek/pinctrl-paris.c +static int mtk_hw_get_value_wrap(struct mtk_pinctrl *hw, unsigned int gpio, int field) +{ + const struct mtk_pin_desc *desc; + int value, err; + + if (gpio > hw->soc->npins) + return -einval; + + desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; + + err = mtk_hw_get_value(hw, desc, field, &value); + if (err) + return err; + + return value; +} + +#define mtk_pctrl_get_pinmux(hw, gpio) \ + mtk_hw_get_value_wrap(hw, gpio, pinctrl_pin_reg_mode) + +#define mtk_pctrl_get_direction(hw, gpio) \ + mtk_hw_get_value_wrap(hw, gpio, pinctrl_pin_reg_dir) + +#define mtk_pctrl_get_out(hw, gpio) \ + mtk_hw_get_value_wrap(hw, gpio, pinctrl_pin_reg_do) + +#define mtk_pctrl_get_in(hw, gpio) \ + mtk_hw_get_value_wrap(hw, gpio, pinctrl_pin_reg_di) + +#define mtk_pctrl_get_smt(hw, gpio) \ + mtk_hw_get_value_wrap(hw, gpio, pinctrl_pin_reg_smt) + +#define mtk_pctrl_get_ies(hw, gpio) \ + mtk_hw_get_value_wrap(hw, gpio, pinctrl_pin_reg_ies) + +#define mtk_pctrl_get_driving(hw, gpio) \ + mtk_hw_get_value_wrap(hw, gpio, pinctrl_pin_reg_drv) + +ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw, + unsigned int gpio, char *buf, unsigned int buflen) +{ + int pinmux, pullup, pullen, len = 0, r1 = -1, r0 = -1; + const struct mtk_pin_desc *desc; + + if (gpio > hw->soc->npins) + return -einval; + + desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; + pinmux = mtk_pctrl_get_pinmux(hw, gpio); + if (pinmux >= hw->soc->nfuncs) + pinmux -= hw->soc->nfuncs; + + mtk_pinconf_bias_get_combo(hw, desc, &pullup, &pullen); + if (pullen == mtk_pupd_set_r1r0_00) { + pullen = 0; + r1 = 0; + r0 = 0; + } else if (pullen == mtk_pupd_set_r1r0_01) { + pullen = 1; + r1 = 0; + r0 = 1; + } else if (pullen == mtk_pupd_set_r1r0_10) { + pullen = 1; + r1 = 1; + r0 = 0; + } else if (pullen == mtk_pupd_set_r1r0_11) { + pullen = 1; + r1 = 1; + r0 = 1; + } else if (pullen != mtk_disable && pullen != mtk_enable) { + pullen = 0; + } + len += snprintf(buf + len, buflen - len, + "%03d: %1d%1d%1d%1d%02d%1d%1d%1d%1d", + gpio, + pinmux, + mtk_pctrl_get_direction(hw, gpio), + mtk_pctrl_get_out(hw, gpio), + mtk_pctrl_get_in(hw, gpio), + mtk_pctrl_get_driving(hw, gpio), + mtk_pctrl_get_smt(hw, gpio), + mtk_pctrl_get_ies(hw, gpio), + pullen, + pullup); + + if (r1 != -1) { + len += snprintf(buf + len, buflen - len, " (%1d %1d) ", + r1, r0); + } else { + len += snprintf(buf + len, buflen - len, " "); + } + + return len; +} + +#define pin_dbg_buf_sz 96 +static void mtk_pctrl_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, + unsigned int gpio) +{ + struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); + char buf[pin_dbg_buf_sz]; + + (void)mtk_pctrl_show_one_pin(hw, gpio, buf, pin_dbg_buf_sz); + + seq_printf(s, "%s", buf); +} + + .pin_dbg_show = mtk_pctrl_dbg_show, + .is_generic = true, diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.h b/drivers/pinctrl/mediatek/pinctrl-paris.h --- a/drivers/pinctrl/mediatek/pinctrl-paris.h +++ b/drivers/pinctrl/mediatek/pinctrl-paris.h +ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw, + unsigned int gpio, char *buf, unsigned int buflen); +
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Pin Controllers (pinctrl)
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184d8e13f9b13313f711f028ca2465f973459046
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light hsieh sean wang sean wang kernel org
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drivers
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pinctrl
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mediatek
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pinctrl: qcom: add ipq6018 pinctrl driver
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add initial pinctrl driver to support pin configuration with pinctrl framework for ipq6018.
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this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
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add ipq6018 pinctrl driver
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['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
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['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
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['qcom']
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['kconfig', 'c', 'makefile']
| 3
| 1,118
| 0
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--- diff --git a/drivers/pinctrl/qcom/kconfig b/drivers/pinctrl/qcom/kconfig --- a/drivers/pinctrl/qcom/kconfig +++ b/drivers/pinctrl/qcom/kconfig +config pinctrl_ipq6018 + tristate "qualcomm technologies, inc. ipq6018 pin controller driver" + depends on gpiolib && of + select pinctrl_msm + help + this is the pinctrl, pinmux, pinconf and gpiolib driver for + the qualcomm technologies inc. tlmm block found on the + qualcomm technologies inc. ipq6018 platform. select this for + ipq6018. + diff --git a/drivers/pinctrl/qcom/makefile b/drivers/pinctrl/qcom/makefile --- a/drivers/pinctrl/qcom/makefile +++ b/drivers/pinctrl/qcom/makefile +obj-$(config_pinctrl_ipq6018) += pinctrl-ipq6018.o diff --git a/drivers/pinctrl/qcom/pinctrl-ipq6018.c b/drivers/pinctrl/qcom/pinctrl-ipq6018.c --- /dev/null +++ b/drivers/pinctrl/qcom/pinctrl-ipq6018.c +// spdx-license-identifier: gpl-2.0 +/* + * copyright (c) 2016-2018, the linux foundation. all rights reserved. + */ + +#include <linux/module.h> +#include <linux/of.h> +#include <linux/platform_device.h> +#include <linux/pinctrl/pinctrl.h> + +#include "pinctrl-msm.h" + +#define function(fname) \ + [msm_mux_##fname] = { \ + .name = #fname, \ + .groups = fname##_groups, \ + .ngroups = array_size(fname##_groups), \ + } + +#define reg_size 0x1000 +#define pingroup(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ + { \ + .name = "gpio" #id, \ + .pins = gpio##id##_pins, \ + .npins = (unsigned int)array_size(gpio##id##_pins), \ + .funcs = (int[]){ \ + msm_mux_gpio, /* gpio mode */ \ + msm_mux_##f1, \ + msm_mux_##f2, \ + msm_mux_##f3, \ + msm_mux_##f4, \ + msm_mux_##f5, \ + msm_mux_##f6, \ + msm_mux_##f7, \ + msm_mux_##f8, \ + msm_mux_##f9 \ + }, \ + .nfuncs = 10, \ + .ctl_reg = reg_size * id, \ + .io_reg = 0x4 + reg_size * id, \ + .intr_cfg_reg = 0x8 + reg_size * id, \ + .intr_status_reg = 0xc + reg_size * id, \ + .intr_target_reg = 0x8 + reg_size * id, \ + .mux_bit = 2, \ + .pull_bit = 0, \ + .drv_bit = 6, \ + .oe_bit = 9, \ + .in_bit = 0, \ + .out_bit = 1, \ + .intr_enable_bit = 0, \ + .intr_status_bit = 0, \ + .intr_target_bit = 5, \ + .intr_target_kpss_val = 3, \ + .intr_raw_status_bit = 4, \ + .intr_polarity_bit = 1, \ + .intr_detection_bit = 2, \ + .intr_detection_width = 2, \ + } + +static const struct pinctrl_pin_desc ipq6018_pins[] = { + pinctrl_pin(0, "gpio_0"), + pinctrl_pin(1, "gpio_1"), + pinctrl_pin(2, "gpio_2"), + pinctrl_pin(3, "gpio_3"), + pinctrl_pin(4, "gpio_4"), + pinctrl_pin(5, "gpio_5"), + pinctrl_pin(6, "gpio_6"), + pinctrl_pin(7, "gpio_7"), + pinctrl_pin(8, "gpio_8"), + pinctrl_pin(9, "gpio_9"), + pinctrl_pin(10, "gpio_10"), + pinctrl_pin(11, "gpio_11"), + pinctrl_pin(12, "gpio_12"), + pinctrl_pin(13, "gpio_13"), + pinctrl_pin(14, "gpio_14"), + pinctrl_pin(15, "gpio_15"), + pinctrl_pin(16, "gpio_16"), + pinctrl_pin(17, "gpio_17"), + pinctrl_pin(18, "gpio_18"), + pinctrl_pin(19, "gpio_19"), + pinctrl_pin(20, "gpio_20"), + pinctrl_pin(21, "gpio_21"), + pinctrl_pin(22, "gpio_22"), + pinctrl_pin(23, "gpio_23"), + pinctrl_pin(24, "gpio_24"), + pinctrl_pin(25, "gpio_25"), + pinctrl_pin(26, "gpio_26"), + pinctrl_pin(27, "gpio_27"), + pinctrl_pin(28, "gpio_28"), + pinctrl_pin(29, "gpio_29"), + pinctrl_pin(30, "gpio_30"), + pinctrl_pin(31, "gpio_31"), + pinctrl_pin(32, "gpio_32"), + pinctrl_pin(33, "gpio_33"), + pinctrl_pin(34, "gpio_34"), + pinctrl_pin(35, "gpio_35"), + pinctrl_pin(36, "gpio_36"), + pinctrl_pin(37, "gpio_37"), + pinctrl_pin(38, "gpio_38"), + pinctrl_pin(39, "gpio_39"), + pinctrl_pin(40, "gpio_40"), + pinctrl_pin(41, "gpio_41"), + pinctrl_pin(42, "gpio_42"), + pinctrl_pin(43, "gpio_43"), + pinctrl_pin(44, "gpio_44"), + pinctrl_pin(45, "gpio_45"), + pinctrl_pin(46, "gpio_46"), + pinctrl_pin(47, "gpio_47"), + pinctrl_pin(48, "gpio_48"), + pinctrl_pin(49, "gpio_49"), + pinctrl_pin(50, "gpio_50"), + pinctrl_pin(51, "gpio_51"), + pinctrl_pin(52, "gpio_52"), + pinctrl_pin(53, "gpio_53"), + pinctrl_pin(54, "gpio_54"), + pinctrl_pin(55, "gpio_55"), + pinctrl_pin(56, "gpio_56"), + pinctrl_pin(57, "gpio_57"), + pinctrl_pin(58, "gpio_58"), + pinctrl_pin(59, "gpio_59"), + pinctrl_pin(60, "gpio_60"), + pinctrl_pin(61, "gpio_61"), + pinctrl_pin(62, "gpio_62"), + pinctrl_pin(63, "gpio_63"), + pinctrl_pin(64, "gpio_64"), + pinctrl_pin(65, "gpio_65"), + pinctrl_pin(66, "gpio_66"), + pinctrl_pin(67, "gpio_67"), + pinctrl_pin(68, "gpio_68"), + pinctrl_pin(69, "gpio_69"), + pinctrl_pin(70, "gpio_70"), + pinctrl_pin(71, "gpio_71"), + pinctrl_pin(72, "gpio_72"), + pinctrl_pin(73, "gpio_73"), + pinctrl_pin(74, "gpio_74"), + pinctrl_pin(75, "gpio_75"), + pinctrl_pin(76, "gpio_76"), + pinctrl_pin(77, "gpio_77"), + pinctrl_pin(78, "gpio_78"), + pinctrl_pin(79, "gpio_79"), +}; + +#define declare_msm_gpio_pins(pin) \ + static const unsigned int gpio##pin##_pins[] = { pin } +declare_msm_gpio_pins(0); +declare_msm_gpio_pins(1); +declare_msm_gpio_pins(2); +declare_msm_gpio_pins(3); +declare_msm_gpio_pins(4); +declare_msm_gpio_pins(5); +declare_msm_gpio_pins(6); +declare_msm_gpio_pins(7); +declare_msm_gpio_pins(8); +declare_msm_gpio_pins(9); +declare_msm_gpio_pins(10); +declare_msm_gpio_pins(11); +declare_msm_gpio_pins(12); +declare_msm_gpio_pins(13); +declare_msm_gpio_pins(14); +declare_msm_gpio_pins(15); +declare_msm_gpio_pins(16); +declare_msm_gpio_pins(17); +declare_msm_gpio_pins(18); +declare_msm_gpio_pins(19); +declare_msm_gpio_pins(20); +declare_msm_gpio_pins(21); +declare_msm_gpio_pins(22); +declare_msm_gpio_pins(23); +declare_msm_gpio_pins(24); +declare_msm_gpio_pins(25); +declare_msm_gpio_pins(26); +declare_msm_gpio_pins(27); +declare_msm_gpio_pins(28); +declare_msm_gpio_pins(29); +declare_msm_gpio_pins(30); +declare_msm_gpio_pins(31); +declare_msm_gpio_pins(32); +declare_msm_gpio_pins(33); +declare_msm_gpio_pins(34); +declare_msm_gpio_pins(35); +declare_msm_gpio_pins(36); +declare_msm_gpio_pins(37); +declare_msm_gpio_pins(38); +declare_msm_gpio_pins(39); +declare_msm_gpio_pins(40); +declare_msm_gpio_pins(41); +declare_msm_gpio_pins(42); +declare_msm_gpio_pins(43); +declare_msm_gpio_pins(44); +declare_msm_gpio_pins(45); +declare_msm_gpio_pins(46); +declare_msm_gpio_pins(47); +declare_msm_gpio_pins(48); +declare_msm_gpio_pins(49); +declare_msm_gpio_pins(50); +declare_msm_gpio_pins(51); +declare_msm_gpio_pins(52); +declare_msm_gpio_pins(53); +declare_msm_gpio_pins(54); +declare_msm_gpio_pins(55); +declare_msm_gpio_pins(56); +declare_msm_gpio_pins(57); +declare_msm_gpio_pins(58); +declare_msm_gpio_pins(59); +declare_msm_gpio_pins(60); +declare_msm_gpio_pins(61); +declare_msm_gpio_pins(62); +declare_msm_gpio_pins(63); +declare_msm_gpio_pins(64); +declare_msm_gpio_pins(65); +declare_msm_gpio_pins(66); +declare_msm_gpio_pins(67); +declare_msm_gpio_pins(68); +declare_msm_gpio_pins(69); +declare_msm_gpio_pins(70); +declare_msm_gpio_pins(71); +declare_msm_gpio_pins(72); +declare_msm_gpio_pins(73); +declare_msm_gpio_pins(74); +declare_msm_gpio_pins(75); +declare_msm_gpio_pins(76); +declare_msm_gpio_pins(77); +declare_msm_gpio_pins(78); +declare_msm_gpio_pins(79); + +enum ipq6018_functions { + msm_mux_atest_char, + msm_mux_atest_char0, + msm_mux_atest_char1, + msm_mux_atest_char2, + msm_mux_atest_char3, + msm_mux_audio0, + msm_mux_audio1, + msm_mux_audio2, + msm_mux_audio3, + msm_mux_audio_rxbclk, + msm_mux_audio_rxfsync, + msm_mux_audio_rxmclk, + msm_mux_audio_rxmclkin, + msm_mux_audio_txbclk, + msm_mux_audio_txfsync, + msm_mux_audio_txmclk, + msm_mux_audio_txmclkin, + msm_mux_blsp0_i2c, + msm_mux_blsp0_spi, + msm_mux_blsp0_uart, + msm_mux_blsp1_i2c, + msm_mux_blsp1_spi, + msm_mux_blsp1_uart, + msm_mux_blsp2_i2c, + msm_mux_blsp2_spi, + msm_mux_blsp2_uart, + msm_mux_blsp3_i2c, + msm_mux_blsp3_spi, + msm_mux_blsp3_uart, + msm_mux_blsp4_i2c, + msm_mux_blsp4_spi, + msm_mux_blsp4_uart, + msm_mux_blsp5_i2c, + msm_mux_blsp5_uart, + msm_mux_burn0, + msm_mux_burn1, + msm_mux_cri_trng, + msm_mux_cri_trng0, + msm_mux_cri_trng1, + msm_mux_cxc0, + msm_mux_cxc1, + msm_mux_dbg_out, + msm_mux_gcc_plltest, + msm_mux_gcc_tlmm, + msm_mux_gpio, + msm_mux_lpass_aud, + msm_mux_lpass_aud0, + msm_mux_lpass_aud1, + msm_mux_lpass_aud2, + msm_mux_lpass_pcm, + msm_mux_lpass_pdm, + msm_mux_mac00, + msm_mux_mac01, + msm_mux_mac10, + msm_mux_mac11, + msm_mux_mac12, + msm_mux_mac13, + msm_mux_mac20, + msm_mux_mac21, + msm_mux_mdc, + msm_mux_mdio, + msm_mux_pcie0_clk, + msm_mux_pcie0_rst, + msm_mux_pcie0_wake, + msm_mux_prng_rosc, + msm_mux_pta1_0, + msm_mux_pta1_1, + msm_mux_pta1_2, + msm_mux_pta2_0, + msm_mux_pta2_1, + msm_mux_pta2_2, + msm_mux_pwm00, + msm_mux_pwm01, + msm_mux_pwm02, + msm_mux_pwm03, + msm_mux_pwm04, + msm_mux_pwm10, + msm_mux_pwm11, + msm_mux_pwm12, + msm_mux_pwm13, + msm_mux_pwm14, + msm_mux_pwm20, + msm_mux_pwm21, + msm_mux_pwm22, + msm_mux_pwm23, + msm_mux_pwm24, + msm_mux_pwm30, + msm_mux_pwm31, + msm_mux_pwm32, + msm_mux_pwm33, + msm_mux_qdss_cti_trig_in_a0, + msm_mux_qdss_cti_trig_in_a1, + msm_mux_qdss_cti_trig_out_a0, + msm_mux_qdss_cti_trig_out_a1, + msm_mux_qdss_cti_trig_in_b0, + msm_mux_qdss_cti_trig_in_b1, + msm_mux_qdss_cti_trig_out_b0, + msm_mux_qdss_cti_trig_out_b1, + msm_mux_qdss_traceclk_a, + msm_mux_qdss_tracectl_a, + msm_mux_qdss_tracedata_a, + msm_mux_qdss_traceclk_b, + msm_mux_qdss_tracectl_b, + msm_mux_qdss_tracedata_b, + msm_mux_qpic_pad, + msm_mux_rx0, + msm_mux_rx1, + msm_mux_rx_swrm, + msm_mux_rx_swrm0, + msm_mux_rx_swrm1, + msm_mux_sd_card, + msm_mux_sd_write, + msm_mux_tsens_max, + msm_mux_tx_swrm, + msm_mux_tx_swrm0, + msm_mux_tx_swrm1, + msm_mux_tx_swrm2, + msm_mux_wci20, + msm_mux_wci21, + msm_mux_wci22, + msm_mux_wci23, + msm_mux_wsa_swrm, + msm_mux__, +}; + +static const char * const blsp3_uart_groups[] = { + "gpio73", "gpio74", "gpio75", "gpio76", +}; + +static const char * const blsp3_i2c_groups[] = { + "gpio73", "gpio74", +}; + +static const char * const blsp3_spi_groups[] = { + "gpio73", "gpio74", "gpio75", "gpio76", "gpio77", "gpio78", "gpio79", +}; + +static const char * const wci20_groups[] = { + "gpio0", "gpio2", +}; + +static const char * const qpic_pad_groups[] = { + "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio9", "gpio10", + "gpio11", "gpio17", +}; + +static const char * const burn0_groups[] = { + "gpio0", +}; + +static const char * const mac12_groups[] = { + "gpio1", "gpio11", +}; + +static const char * const qdss_tracectl_b_groups[] = { + "gpio1", +}; + +static const char * const burn1_groups[] = { + "gpio1", +}; + +static const char * const qdss_traceclk_b_groups[] = { + "gpio0", +}; + +static const char * const qdss_tracedata_b_groups[] = { + "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", "gpio8", "gpio9", + "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", "gpio15", "gpio16", + "gpio17", +}; + +static const char * const mac01_groups[] = { + "gpio3", "gpio4", +}; + +static const char * const mac21_groups[] = { + "gpio5", "gpio6", +}; + +static const char * const atest_char_groups[] = { + "gpio9", +}; + +static const char * const cxc0_groups[] = { + "gpio9", "gpio16", +}; + +static const char * const mac13_groups[] = { + "gpio9", "gpio16", +}; + +static const char * const dbg_out_groups[] = { + "gpio9", +}; + +static const char * const wci22_groups[] = { + "gpio11", "gpio17", +}; + +static const char * const pwm00_groups[] = { + "gpio18", +}; + +static const char * const atest_char0_groups[] = { + "gpio18", +}; + +static const char * const wci23_groups[] = { + "gpio18", "gpio19", +}; + +static const char * const mac11_groups[] = { + "gpio18", "gpio19", +}; + +static const char * const pwm10_groups[] = { + "gpio19", +}; + +static const char * const atest_char1_groups[] = { + "gpio19", +}; + +static const char * const pwm20_groups[] = { + "gpio20", +}; + +static const char * const atest_char2_groups[] = { + "gpio20", +}; + +static const char * const pwm30_groups[] = { + "gpio21", +}; + +static const char * const atest_char3_groups[] = { + "gpio21", +}; + +static const char * const audio_txmclk_groups[] = { + "gpio22", +}; + +static const char * const audio_txmclkin_groups[] = { + "gpio22", +}; + +static const char * const pwm02_groups[] = { + "gpio22", +}; + +static const char * const tx_swrm0_groups[] = { + "gpio22", +}; + +static const char * const qdss_cti_trig_out_b0_groups[] = { + "gpio22", +}; + +static const char * const audio_txbclk_groups[] = { + "gpio23", +}; + +static const char * const pwm12_groups[] = { + "gpio23", +}; + +static const char * const wsa_swrm_groups[] = { + "gpio23", "gpio24", +}; + +static const char * const tx_swrm1_groups[] = { + "gpio23", +}; + +static const char * const qdss_cti_trig_in_b0_groups[] = { + "gpio23", +}; + +static const char * const audio_txfsync_groups[] = { + "gpio24", +}; + +static const char * const pwm22_groups[] = { + "gpio24", +}; + +static const char * const tx_swrm2_groups[] = { + "gpio24", +}; + +static const char * const qdss_cti_trig_out_b1_groups[] = { + "gpio24", +}; + +static const char * const audio0_groups[] = { + "gpio25", "gpio32", +}; + +static const char * const pwm32_groups[] = { + "gpio25", +}; + +static const char * const tx_swrm_groups[] = { + "gpio25", +}; + +static const char * const qdss_cti_trig_in_b1_groups[] = { + "gpio25", +}; + +static const char * const audio1_groups[] = { + "gpio26", "gpio33", +}; + +static const char * const pwm04_groups[] = { + "gpio26", +}; + +static const char * const audio2_groups[] = { + "gpio27", +}; + +static const char * const pwm14_groups[] = { + "gpio27", +}; + +static const char * const audio3_groups[] = { + "gpio28", +}; + +static const char * const pwm24_groups[] = { + "gpio28", +}; + +static const char * const audio_rxmclk_groups[] = { + "gpio29", +}; + +static const char * const audio_rxmclkin_groups[] = { + "gpio29", +}; + +static const char * const pwm03_groups[] = { + "gpio29", +}; + +static const char * const lpass_pdm_groups[] = { + "gpio29", "gpio30", "gpio31", "gpio32", +}; + +static const char * const lpass_aud_groups[] = { + "gpio29", +}; + +static const char * const qdss_cti_trig_in_a1_groups[] = { + "gpio29", +}; + +static const char * const audio_rxbclk_groups[] = { + "gpio30", +}; + +static const char * const pwm13_groups[] = { + "gpio30", +}; + +static const char * const lpass_aud0_groups[] = { + "gpio30", +}; + +static const char * const rx_swrm_groups[] = { + "gpio30", +}; + +static const char * const qdss_cti_trig_out_a1_groups[] = { + "gpio30", +}; + +static const char * const audio_rxfsync_groups[] = { + "gpio31", +}; + +static const char * const pwm23_groups[] = { + "gpio31", +}; + +static const char * const lpass_aud1_groups[] = { + "gpio31", +}; + +static const char * const rx_swrm0_groups[] = { + "gpio31", +}; + +static const char * const qdss_cti_trig_in_a0_groups[] = { + "gpio31", +}; + +static const char * const pwm33_groups[] = { + "gpio32", +}; + +static const char * const lpass_aud2_groups[] = { + "gpio32", +}; + +static const char * const rx_swrm1_groups[] = { + "gpio32", +}; + +static const char * const qdss_cti_trig_out_a0_groups[] = { + "gpio32", +}; + +static const char * const lpass_pcm_groups[] = { + "gpio34", "gpio35", "gpio36", "gpio37", +}; + +static const char * const mac10_groups[] = { + "gpio34", "gpio35", +}; + +static const char * const mac00_groups[] = { + "gpio34", "gpio35", +}; + +static const char * const mac20_groups[] = { + "gpio36", "gpio37", +}; + +static const char * const blsp0_uart_groups[] = { + "gpio38", "gpio39", "gpio40", "gpio41", +}; + +static const char * const blsp0_i2c_groups[] = { + "gpio38", "gpio39", +}; + +static const char * const blsp0_spi_groups[] = { + "gpio38", "gpio39", "gpio40", "gpio41", +}; + +static const char * const blsp2_uart_groups[] = { + "gpio42", "gpio43", "gpio44", "gpio45", +}; + +static const char * const blsp2_i2c_groups[] = { + "gpio42", "gpio43", +}; + +static const char * const blsp2_spi_groups[] = { + "gpio42", "gpio43", "gpio44", "gpio45", +}; + +static const char * const blsp5_i2c_groups[] = { + "gpio46", "gpio47", +}; + +static const char * const blsp5_uart_groups[] = { + "gpio48", "gpio49", +}; + +static const char * const qdss_traceclk_a_groups[] = { + "gpio48", +}; + +static const char * const qdss_tracectl_a_groups[] = { + "gpio49", +}; + +static const char * const pwm01_groups[] = { + "gpio50", +}; + +static const char * const pta1_1_groups[] = { + "gpio51", +}; + +static const char * const pwm11_groups[] = { + "gpio51", +}; + +static const char * const rx1_groups[] = { + "gpio51", +}; + +static const char * const pta1_2_groups[] = { + "gpio52", +}; + +static const char * const pwm21_groups[] = { + "gpio52", +}; + +static const char * const pta1_0_groups[] = { + "gpio53", +}; + +static const char * const pwm31_groups[] = { + "gpio53", +}; + +static const char * const prng_rosc_groups[] = { + "gpio53", +}; + +static const char * const blsp4_uart_groups[] = { + "gpio55", "gpio56", "gpio57", "gpio58", +}; + +static const char * const blsp4_i2c_groups[] = { + "gpio55", "gpio56", +}; + +static const char * const blsp4_spi_groups[] = { + "gpio55", "gpio56", "gpio57", "gpio58", +}; + +static const char * const pcie0_clk_groups[] = { + "gpio59", +}; + +static const char * const cri_trng0_groups[] = { + "gpio59", +}; + +static const char * const pcie0_rst_groups[] = { + "gpio60", +}; + +static const char * const cri_trng1_groups[] = { + "gpio60", +}; + +static const char * const pcie0_wake_groups[] = { + "gpio61", +}; + +static const char * const cri_trng_groups[] = { + "gpio61", +}; + +static const char * const sd_card_groups[] = { + "gpio62", +}; + +static const char * const sd_write_groups[] = { + "gpio63", +}; + +static const char * const rx0_groups[] = { + "gpio63", +}; + +static const char * const tsens_max_groups[] = { + "gpio63", +}; + +static const char * const mdc_groups[] = { + "gpio64", +}; + +static const char * const qdss_tracedata_a_groups[] = { + "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70", + "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77", + "gpio78", "gpio79", +}; + +static const char * const mdio_groups[] = { + "gpio65", +}; + +static const char * const pta2_0_groups[] = { + "gpio66", +}; + +static const char * const wci21_groups[] = { + "gpio66", "gpio68", +}; + +static const char * const cxc1_groups[] = { + "gpio66", "gpio68", +}; + +static const char * const pta2_1_groups[] = { + "gpio67", +}; + +static const char * const pta2_2_groups[] = { + "gpio68", +}; + +static const char * const blsp1_uart_groups[] = { + "gpio69", "gpio70", "gpio71", "gpio72", +}; + +static const char * const blsp1_i2c_groups[] = { + "gpio69", "gpio70", +}; + +static const char * const blsp1_spi_groups[] = { + "gpio69", "gpio70", "gpio71", "gpio72", +}; + +static const char * const gcc_plltest_groups[] = { + "gpio69", "gpio71", +}; + +static const char * const gcc_tlmm_groups[] = { + "gpio70", +}; + +static const char * const gpio_groups[] = { + "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", + "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", + "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", + "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", + "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", + "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", + "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49", + "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56", + "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63", + "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70", + "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77", + "gpio78", "gpio79", +}; + +static const struct msm_function ipq6018_functions[] = { + function(atest_char), + function(atest_char0), + function(atest_char1), + function(atest_char2), + function(atest_char3), + function(audio0), + function(audio1), + function(audio2), + function(audio3), + function(audio_rxbclk), + function(audio_rxfsync), + function(audio_rxmclk), + function(audio_rxmclkin), + function(audio_txbclk), + function(audio_txfsync), + function(audio_txmclk), + function(audio_txmclkin), + function(blsp0_i2c), + function(blsp0_spi), + function(blsp0_uart), + function(blsp1_i2c), + function(blsp1_spi), + function(blsp1_uart), + function(blsp2_i2c), + function(blsp2_spi), + function(blsp2_uart), + function(blsp3_i2c), + function(blsp3_spi), + function(blsp3_uart), + function(blsp4_i2c), + function(blsp4_spi), + function(blsp4_uart), + function(blsp5_i2c), + function(blsp5_uart), + function(burn0), + function(burn1), + function(cri_trng), + function(cri_trng0), + function(cri_trng1), + function(cxc0), + function(cxc1), + function(dbg_out), + function(gcc_plltest), + function(gcc_tlmm), + function(gpio), + function(lpass_aud), + function(lpass_aud0), + function(lpass_aud1), + function(lpass_aud2), + function(lpass_pcm), + function(lpass_pdm), + function(mac00), + function(mac01), + function(mac10), + function(mac11), + function(mac12), + function(mac13), + function(mac20), + function(mac21), + function(mdc), + function(mdio), + function(pcie0_clk), + function(pcie0_rst), + function(pcie0_wake), + function(prng_rosc), + function(pta1_0), + function(pta1_1), + function(pta1_2), + function(pta2_0), + function(pta2_1), + function(pta2_2), + function(pwm00), + function(pwm01), + function(pwm02), + function(pwm03), + function(pwm04), + function(pwm10), + function(pwm11), + function(pwm12), + function(pwm13), + function(pwm14), + function(pwm20), + function(pwm21), + function(pwm22), + function(pwm23), + function(pwm24), + function(pwm30), + function(pwm31), + function(pwm32), + function(pwm33), + function(qdss_cti_trig_in_a0), + function(qdss_cti_trig_in_a1), + function(qdss_cti_trig_out_a0), + function(qdss_cti_trig_out_a1), + function(qdss_cti_trig_in_b0), + function(qdss_cti_trig_in_b1), + function(qdss_cti_trig_out_b0), + function(qdss_cti_trig_out_b1), + function(qdss_traceclk_a), + function(qdss_tracectl_a), + function(qdss_tracedata_a), + function(qdss_traceclk_b), + function(qdss_tracectl_b), + function(qdss_tracedata_b), + function(qpic_pad), + function(rx0), + function(rx1), + function(rx_swrm), + function(rx_swrm0), + function(rx_swrm1), + function(sd_card), + function(sd_write), + function(tsens_max), + function(tx_swrm), + function(tx_swrm0), + function(tx_swrm1), + function(tx_swrm2), + function(wci20), + function(wci21), + function(wci22), + function(wci23), + function(wsa_swrm), +}; + +static const struct msm_pingroup ipq6018_groups[] = { + pingroup(0, qpic_pad, wci20, qdss_traceclk_b, _, burn0, _, _, _, _), + pingroup(1, qpic_pad, mac12, qdss_tracectl_b, _, burn1, _, _, _, _), + pingroup(2, qpic_pad, wci20, qdss_tracedata_b, _, _, _, _, _, _), + pingroup(3, qpic_pad, mac01, qdss_tracedata_b, _, _, _, _, _, _), + pingroup(4, qpic_pad, mac01, qdss_tracedata_b, _, _, _, _, _, _), + pingroup(5, qpic_pad, mac21, qdss_tracedata_b, _, _, _, _, _, _), + pingroup(6, qpic_pad, mac21, qdss_tracedata_b, _, _, _, _, _, _), + pingroup(7, qpic_pad, qdss_tracedata_b, _, _, _, _, _, _, _), + pingroup(8, qpic_pad, qdss_tracedata_b, _, _, _, _, _, _, _), + pingroup(9, qpic_pad, atest_char, cxc0, mac13, dbg_out, qdss_tracedata_b, _, _, _), + pingroup(10, qpic_pad, qdss_tracedata_b, _, _, _, _, _, _, _), + pingroup(11, qpic_pad, wci22, mac12, qdss_tracedata_b, _, _, _, _, _), + pingroup(12, qpic_pad, qdss_tracedata_b, _, _, _, _, _, _, _), + pingroup(13, qpic_pad, qdss_tracedata_b, _, _, _, _, _, _, _), + pingroup(14, qpic_pad, qdss_tracedata_b, _, _, _, _, _, _, _), + pingroup(15, qpic_pad, qdss_tracedata_b, _, _, _, _, _, _, _), + pingroup(16, qpic_pad, cxc0, mac13, qdss_tracedata_b, _, _, _, _, _), + pingroup(17, qpic_pad, qdss_tracedata_b, wci22, _, _, _, _, _, _), + pingroup(18, pwm00, atest_char0, wci23, mac11, _, _, _, _, _), + pingroup(19, pwm10, atest_char1, wci23, mac11, _, _, _, _, _), + pingroup(20, pwm20, atest_char2, _, _, _, _, _, _, _), + pingroup(21, pwm30, atest_char3, _, _, _, _, _, _, _), + pingroup(22, audio_txmclk, audio_txmclkin, pwm02, tx_swrm0, _, qdss_cti_trig_out_b0, _, _, _), + pingroup(23, audio_txbclk, pwm12, wsa_swrm, tx_swrm1, _, qdss_cti_trig_in_b0, _, _, _), + pingroup(24, audio_txfsync, pwm22, wsa_swrm, tx_swrm2, _, qdss_cti_trig_out_b1, _, _, _), + pingroup(25, audio0, pwm32, tx_swrm, _, qdss_cti_trig_in_b1, _, _, _, _), + pingroup(26, audio1, pwm04, _, _, _, _, _, _, _), + pingroup(27, audio2, pwm14, _, _, _, _, _, _, _), + pingroup(28, audio3, pwm24, _, _, _, _, _, _, _), + pingroup(29, audio_rxmclk, audio_rxmclkin, pwm03, lpass_pdm, lpass_aud, qdss_cti_trig_in_a1, _, _, _), + pingroup(30, audio_rxbclk, pwm13, lpass_pdm, lpass_aud0, rx_swrm, _, qdss_cti_trig_out_a1, _, _), + pingroup(31, audio_rxfsync, pwm23, lpass_pdm, lpass_aud1, rx_swrm0, _, qdss_cti_trig_in_a0, _, _), + pingroup(32, audio0, pwm33, lpass_pdm, lpass_aud2, rx_swrm1, _, qdss_cti_trig_out_a0, _, _), + pingroup(33, audio1, _, _, _, _, _, _, _, _), + pingroup(34, lpass_pcm, mac10, mac00, _, _, _, _, _, _), + pingroup(35, lpass_pcm, mac10, mac00, _, _, _, _, _, _), + pingroup(36, lpass_pcm, mac20, _, _, _, _, _, _, _), + pingroup(37, lpass_pcm, mac20, _, _, _, _, _, _, _), + pingroup(38, blsp0_uart, blsp0_i2c, blsp0_spi, _, _, _, _, _, _), + pingroup(39, blsp0_uart, blsp0_i2c, blsp0_spi, _, _, _, _, _, _), + pingroup(40, blsp0_uart, blsp0_spi, _, _, _, _, _, _, _), + pingroup(41, blsp0_uart, blsp0_spi, _, _, _, _, _, _, _), + pingroup(42, blsp2_uart, blsp2_i2c, blsp2_spi, _, _, _, _, _, _), + pingroup(43, blsp2_uart, blsp2_i2c, blsp2_spi, _, _, _, _, _, _), + pingroup(44, blsp2_uart, blsp2_spi, _, _, _, _, _, _, _), + pingroup(45, blsp2_uart, blsp2_spi, _, _, _, _, _, _, _), + pingroup(46, blsp5_i2c, _, _, _, _, _, _, _, _), + pingroup(47, blsp5_i2c, _, _, _, _, _, _, _, _), + pingroup(48, blsp5_uart, _, qdss_traceclk_a, _, _, _, _, _, _), + pingroup(49, blsp5_uart, _, qdss_tracectl_a, _, _, _, _, _, _), + pingroup(50, pwm01, _, _, _, _, _, _, _, _), + pingroup(51, pta1_1, pwm11, _, rx1, _, _, _, _, _), + pingroup(52, pta1_2, pwm21, _, _, _, _, _, _, _), + pingroup(53, pta1_0, pwm31, prng_rosc, _, _, _, _, _, _), + pingroup(54, _, _, _, _, _, _, _, _, _), + pingroup(55, blsp4_uart, blsp4_i2c, blsp4_spi, _, _, _, _, _, _), + pingroup(56, blsp4_uart, blsp4_i2c, blsp4_spi, _, _, _, _, _, _), + pingroup(57, blsp4_uart, blsp4_spi, _, _, _, _, _, _, _), + pingroup(58, blsp4_uart, blsp4_spi, _, _, _, _, _, _, _), + pingroup(59, pcie0_clk, _, _, cri_trng0, _, _, _, _, _), + pingroup(60, pcie0_rst, _, _, cri_trng1, _, _, _, _, _), + pingroup(61, pcie0_wake, _, _, cri_trng, _, _, _, _, _), + pingroup(62, sd_card, _, _, _, _, _, _, _, _), + pingroup(63, sd_write, rx0, _, tsens_max, _, _, _, _, _), + pingroup(64, mdc, _, qdss_tracedata_a, _, _, _, _, _, _), + pingroup(65, mdio, _, qdss_tracedata_a, _, _, _, _, _, _), + pingroup(66, pta2_0, wci21, cxc1, qdss_tracedata_a, _, _, _, _, _), + pingroup(67, pta2_1, qdss_tracedata_a, _, _, _, _, _, _, _), + pingroup(68, pta2_2, wci21, cxc1, qdss_tracedata_a, _, _, _, _, _), + pingroup(69, blsp1_uart, blsp1_i2c, blsp1_spi, gcc_plltest, qdss_tracedata_a, _, _, _, _), + pingroup(70, blsp1_uart, blsp1_i2c, blsp1_spi, gcc_tlmm, qdss_tracedata_a, _, _, _, _), + pingroup(71, blsp1_uart, blsp1_spi, gcc_plltest, qdss_tracedata_a, _, _, _, _, _), + pingroup(72, blsp1_uart, blsp1_spi, qdss_tracedata_a, _, _, _, _, _, _), + pingroup(73, blsp3_uart, blsp3_i2c, blsp3_spi, _, qdss_tracedata_a, _, _, _, _), + pingroup(74, blsp3_uart, blsp3_i2c, blsp3_spi, _, qdss_tracedata_a, _, _, _, _), + pingroup(75, blsp3_uart, blsp3_spi, _, qdss_tracedata_a, _, _, _, _, _), + pingroup(76, blsp3_uart, blsp3_spi, _, qdss_tracedata_a, _, _, _, _, _), + pingroup(77, blsp3_spi, _, qdss_tracedata_a, _, _, _, _, _, _), + pingroup(78, blsp3_spi, _, qdss_tracedata_a, _, _, _, _, _, _), + pingroup(79, blsp3_spi, _, qdss_tracedata_a, _, _, _, _, _, _), +}; + +static const struct msm_pinctrl_soc_data ipq6018_pinctrl = { + .pins = ipq6018_pins, + .npins = array_size(ipq6018_pins), + .functions = ipq6018_functions, + .nfunctions = array_size(ipq6018_functions), + .groups = ipq6018_groups, + .ngroups = array_size(ipq6018_groups), + .ngpios = 80, +}; + +static int ipq6018_pinctrl_probe(struct platform_device *pdev) +{ + return msm_pinctrl_probe(pdev, &ipq6018_pinctrl); +} + +static const struct of_device_id ipq6018_pinctrl_of_match[] = { + { .compatible = "qcom,ipq6018-pinctrl", }, + { }, +}; + +static struct platform_driver ipq6018_pinctrl_driver = { + .driver = { + .name = "ipq6018-pinctrl", + .of_match_table = ipq6018_pinctrl_of_match, + }, + .probe = ipq6018_pinctrl_probe, + .remove = msm_pinctrl_remove, +}; + +static int __init ipq6018_pinctrl_init(void) +{ + return platform_driver_register(&ipq6018_pinctrl_driver); +} +arch_initcall(ipq6018_pinctrl_init); + +static void __exit ipq6018_pinctrl_exit(void) +{ + platform_driver_unregister(&ipq6018_pinctrl_driver); +} +module_exit(ipq6018_pinctrl_exit); + +module_description("qti ipq6018 pinctrl driver"); +module_license("gpl v2"); +module_device_table(of, ipq6018_pinctrl_of_match);
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Pin Controllers (pinctrl)
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ef1ea54eab0ecb072700f59701387f839c8c760d
|
sricharan r bjorn andersson bjorn andersson linaro org
|
drivers
|
pinctrl
|
qcom
|
mmc: add mmc host software queue support
|
now the mmc read/write stack will always wait for previous request is completed by mmc_blk_rw_wait(), before sending a new request to hardware, or queue a work to complete request, that will bring context switching overhead and spend some extra time to poll the card for busy completion for i/o writes via sending cmd13, especially for high i/o per second rates, to affect the io performance.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add mmc software queue support, and set the queue depth as 64 to allow more requests can be be prepared, merged and inserted into io scheduler, which improves the performance
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['core']
|
['kconfig', 'h', 'c', 'makefile']
| 9
| 486
| 12
|
--- diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c --- a/drivers/mmc/core/block.c +++ b/drivers/mmc/core/block.c +static void mmc_blk_rw_rq_prep(struct mmc_queue_req *mqrq, + struct mmc_card *card, + int disable_multi, + struct mmc_queue *mq); +static void mmc_blk_hsq_req_done(struct mmc_request *mrq); +static int mmc_blk_hsq_issue_rw_rq(struct mmc_queue *mq, struct request *req) +{ + struct mmc_queue_req *mqrq = req_to_mmc_queue_req(req); + struct mmc_host *host = mq->card->host; + int err; + + mmc_blk_rw_rq_prep(mqrq, mq->card, 0, mq); + mqrq->brq.mrq.done = mmc_blk_hsq_req_done; + mmc_pre_req(host, &mqrq->brq.mrq); + + err = mmc_cqe_start_req(host, &mqrq->brq.mrq); + if (err) + mmc_post_req(host, &mqrq->brq.mrq, err); + + return err; +} + + struct mmc_host *host = mq->card->host; + + if (host->hsq_enabled) + return mmc_blk_hsq_issue_rw_rq(mq, req); +static void mmc_blk_hsq_req_done(struct mmc_request *mrq) +{ + struct mmc_queue_req *mqrq = + container_of(mrq, struct mmc_queue_req, brq.mrq); + struct request *req = mmc_queue_req_to_req(mqrq); + struct request_queue *q = req->q; + struct mmc_queue *mq = q->queuedata; + struct mmc_host *host = mq->card->host; + unsigned long flags; + + if (mmc_blk_rq_error(&mqrq->brq) || + mmc_blk_urgent_bkops_needed(mq, mqrq)) { + spin_lock_irqsave(&mq->lock, flags); + mq->recovery_needed = true; + mq->recovery_req = req; + spin_unlock_irqrestore(&mq->lock, flags); + + host->cqe_ops->cqe_recovery_start(host); + + schedule_work(&mq->recovery_work); + return; + } + + mmc_blk_rw_reset_success(mq, req); + + /* + * block layer timeouts race with completions which means the normal + * completion path cannot be used during recovery. + */ + if (mq->in_recovery) + mmc_blk_cqe_complete_rq(mq, req); + else + blk_mq_complete_request(req); +} + diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c --- a/drivers/mmc/core/mmc.c +++ b/drivers/mmc/core/mmc.c - if (card->ext_csd.cmdq_en && !host->cqe_enabled) { + if (host->cqe_ops && !host->cqe_enabled) { - if (err) { - pr_err("%s: failed to enable cqe, error %d ", - mmc_hostname(host), err); - } else { + if (!err) { - pr_info("%s: command queue engine enabled ", - mmc_hostname(host)); + + if (card->ext_csd.cmdq_en) { + pr_info("%s: command queue engine enabled ", + mmc_hostname(host)); + } else { + host->hsq_enabled = true; + pr_info("%s: host software queue enabled ", + mmc_hostname(host)); + } diff --git a/drivers/mmc/core/queue.c b/drivers/mmc/core/queue.c --- a/drivers/mmc/core/queue.c +++ b/drivers/mmc/core/queue.c - if (mq->use_cqe) + if (mq->use_cqe && !host->hsq_enabled) + struct mmc_card *card = mq->card; + struct mmc_host *host = card->host; - if (mq->recovery_needed || !mq->use_cqe) + if (mq->recovery_needed || !mq->use_cqe || host->hsq_enabled) + struct mmc_host *host = mq->card->host; - if (mq->use_cqe) + if (mq->use_cqe && !host->hsq_enabled) + if (host->hsq_enabled) + host->cqe_ops->cqe_recovery_finish(host); + + /* + * for mmc host software queue, we only allow 2 requests in + * flight to avoid a long latency. + */ + if (host->hsq_enabled && mq->in_flight[issue_type] > 2) { + spin_unlock_irq(&mq->lock); + return blk_sts_resource; + } - if (mq->use_cqe) + if (mq->use_cqe && !host->hsq_enabled) diff --git a/drivers/mmc/host/kconfig b/drivers/mmc/host/kconfig --- a/drivers/mmc/host/kconfig +++ b/drivers/mmc/host/kconfig +config mmc_hsq + tristate "mmc host software queue support" + help + this selects the mmc host software queue support. this may increase + performance, if the host controller and its driver supports it. + + if you have a controller/driver supporting this interface, say y or m + here. + + if unsure, say n. + diff --git a/drivers/mmc/host/makefile b/drivers/mmc/host/makefile --- a/drivers/mmc/host/makefile +++ b/drivers/mmc/host/makefile +obj-$(config_mmc_hsq) += mmc_hsq.o diff --git a/drivers/mmc/host/cqhci.c b/drivers/mmc/host/cqhci.c --- a/drivers/mmc/host/cqhci.c +++ b/drivers/mmc/host/cqhci.c + if (!card->ext_csd.cmdq_en) + return -einval; + - if (err) + if (err) { + pr_err("%s: failed to enable cqe, error %d ", + mmc_hostname(mmc), err); + } diff --git a/drivers/mmc/host/mmc_hsq.c b/drivers/mmc/host/mmc_hsq.c --- /dev/null +++ b/drivers/mmc/host/mmc_hsq.c +// spdx-license-identifier: gpl-2.0 +/* + * + * mmc software queue support based on command queue interfaces + * + * copyright (c) 2019 linaro, inc. + * author: baolin wang <baolin.wang@linaro.org> + */ + +#include <linux/mmc/card.h> +#include <linux/mmc/host.h> + +#include "mmc_hsq.h" + +#define hsq_num_slots 64 +#define hsq_invalid_tag hsq_num_slots + +static void mmc_hsq_pump_requests(struct mmc_hsq *hsq) +{ + struct mmc_host *mmc = hsq->mmc; + struct hsq_slot *slot; + unsigned long flags; + + spin_lock_irqsave(&hsq->lock, flags); + + /* make sure we are not already running a request now */ + if (hsq->mrq) { + spin_unlock_irqrestore(&hsq->lock, flags); + return; + } + + /* make sure there are remain requests need to pump */ + if (!hsq->qcnt || !hsq->enabled) { + spin_unlock_irqrestore(&hsq->lock, flags); + return; + } + + slot = &hsq->slot[hsq->next_tag]; + hsq->mrq = slot->mrq; + hsq->qcnt--; + + spin_unlock_irqrestore(&hsq->lock, flags); + + mmc->ops->request(mmc, hsq->mrq); +} + +static void mmc_hsq_update_next_tag(struct mmc_hsq *hsq, int remains) +{ + struct hsq_slot *slot; + int tag; + + /* + * if there are no remain requests in software queue, then set a invalid + * tag. + */ + if (!remains) { + hsq->next_tag = hsq_invalid_tag; + return; + } + + /* + * increasing the next tag and check if the corresponding request is + * available, if yes, then we found a candidate request. + */ + if (++hsq->next_tag != hsq_invalid_tag) { + slot = &hsq->slot[hsq->next_tag]; + if (slot->mrq) + return; + } + + /* othersie we should iterate all slots to find a available tag. */ + for (tag = 0; tag < hsq_num_slots; tag++) { + slot = &hsq->slot[tag]; + if (slot->mrq) + break; + } + + if (tag == hsq_num_slots) + tag = hsq_invalid_tag; + + hsq->next_tag = tag; +} + +static void mmc_hsq_post_request(struct mmc_hsq *hsq) +{ + unsigned long flags; + int remains; + + spin_lock_irqsave(&hsq->lock, flags); + + remains = hsq->qcnt; + hsq->mrq = null; + + /* update the next available tag to be queued. */ + mmc_hsq_update_next_tag(hsq, remains); + + if (hsq->waiting_for_idle && !remains) { + hsq->waiting_for_idle = false; + wake_up(&hsq->wait_queue); + } + + /* do not pump new request in recovery mode. */ + if (hsq->recovery_halt) { + spin_unlock_irqrestore(&hsq->lock, flags); + return; + } + + spin_unlock_irqrestore(&hsq->lock, flags); + + /* + * try to pump new request to host controller as fast as possible, + * after completing previous request. + */ + if (remains > 0) + mmc_hsq_pump_requests(hsq); +} + +/** + * mmc_hsq_finalize_request - finalize one request if the request is done + * @mmc: the host controller + * @mrq: the request need to be finalized + * + * return true if we finalized the corresponding request in software queue, + * otherwise return false. + */ +bool mmc_hsq_finalize_request(struct mmc_host *mmc, struct mmc_request *mrq) +{ + struct mmc_hsq *hsq = mmc->cqe_private; + unsigned long flags; + + spin_lock_irqsave(&hsq->lock, flags); + + if (!hsq->enabled || !hsq->mrq || hsq->mrq != mrq) { + spin_unlock_irqrestore(&hsq->lock, flags); + return false; + } + + /* + * clear current completed slot request to make a room for new request. + */ + hsq->slot[hsq->next_tag].mrq = null; + + spin_unlock_irqrestore(&hsq->lock, flags); + + mmc_cqe_request_done(mmc, hsq->mrq); + + mmc_hsq_post_request(hsq); + + return true; +} +export_symbol_gpl(mmc_hsq_finalize_request); + +static void mmc_hsq_recovery_start(struct mmc_host *mmc) +{ + struct mmc_hsq *hsq = mmc->cqe_private; + unsigned long flags; + + spin_lock_irqsave(&hsq->lock, flags); + + hsq->recovery_halt = true; + + spin_unlock_irqrestore(&hsq->lock, flags); +} + +static void mmc_hsq_recovery_finish(struct mmc_host *mmc) +{ + struct mmc_hsq *hsq = mmc->cqe_private; + int remains; + + spin_lock_irq(&hsq->lock); + + hsq->recovery_halt = false; + remains = hsq->qcnt; + + spin_unlock_irq(&hsq->lock); + + /* + * try to pump new request if there are request pending in software + * queue after finishing recovery. + */ + if (remains > 0) + mmc_hsq_pump_requests(hsq); +} + +static int mmc_hsq_request(struct mmc_host *mmc, struct mmc_request *mrq) +{ + struct mmc_hsq *hsq = mmc->cqe_private; + int tag = mrq->tag; + + spin_lock_irq(&hsq->lock); + + if (!hsq->enabled) { + spin_unlock_irq(&hsq->lock); + return -eshutdown; + } + + /* do not queue any new requests in recovery mode. */ + if (hsq->recovery_halt) { + spin_unlock_irq(&hsq->lock); + return -ebusy; + } + + hsq->slot[tag].mrq = mrq; + + /* + * set the next tag as current request tag if no available + * next tag. + */ + if (hsq->next_tag == hsq_invalid_tag) + hsq->next_tag = tag; + + hsq->qcnt++; + + spin_unlock_irq(&hsq->lock); + + mmc_hsq_pump_requests(hsq); + + return 0; +} + +static void mmc_hsq_post_req(struct mmc_host *mmc, struct mmc_request *mrq) +{ + if (mmc->ops->post_req) + mmc->ops->post_req(mmc, mrq, 0); +} + +static bool mmc_hsq_queue_is_idle(struct mmc_hsq *hsq, int *ret) +{ + bool is_idle; + + spin_lock_irq(&hsq->lock); + + is_idle = (!hsq->mrq && !hsq->qcnt) || + hsq->recovery_halt; + + *ret = hsq->recovery_halt ? -ebusy : 0; + hsq->waiting_for_idle = !is_idle; + + spin_unlock_irq(&hsq->lock); + + return is_idle; +} + +static int mmc_hsq_wait_for_idle(struct mmc_host *mmc) +{ + struct mmc_hsq *hsq = mmc->cqe_private; + int ret; + + wait_event(hsq->wait_queue, + mmc_hsq_queue_is_idle(hsq, &ret)); + + return ret; +} + +static void mmc_hsq_disable(struct mmc_host *mmc) +{ + struct mmc_hsq *hsq = mmc->cqe_private; + u32 timeout = 500; + int ret; + + spin_lock_irq(&hsq->lock); + + if (!hsq->enabled) { + spin_unlock_irq(&hsq->lock); + return; + } + + spin_unlock_irq(&hsq->lock); + + ret = wait_event_timeout(hsq->wait_queue, + mmc_hsq_queue_is_idle(hsq, &ret), + msecs_to_jiffies(timeout)); + if (ret == 0) { + pr_warn("could not stop mmc software queue "); + return; + } + + spin_lock_irq(&hsq->lock); + + hsq->enabled = false; + + spin_unlock_irq(&hsq->lock); +} + +static int mmc_hsq_enable(struct mmc_host *mmc, struct mmc_card *card) +{ + struct mmc_hsq *hsq = mmc->cqe_private; + + spin_lock_irq(&hsq->lock); + + if (hsq->enabled) { + spin_unlock_irq(&hsq->lock); + return -ebusy; + } + + hsq->enabled = true; + + spin_unlock_irq(&hsq->lock); + + return 0; +} + +static const struct mmc_cqe_ops mmc_hsq_ops = { + .cqe_enable = mmc_hsq_enable, + .cqe_disable = mmc_hsq_disable, + .cqe_request = mmc_hsq_request, + .cqe_post_req = mmc_hsq_post_req, + .cqe_wait_for_idle = mmc_hsq_wait_for_idle, + .cqe_recovery_start = mmc_hsq_recovery_start, + .cqe_recovery_finish = mmc_hsq_recovery_finish, +}; + +int mmc_hsq_init(struct mmc_hsq *hsq, struct mmc_host *mmc) +{ + hsq->num_slots = hsq_num_slots; + hsq->next_tag = hsq_invalid_tag; + + hsq->slot = devm_kcalloc(mmc_dev(mmc), hsq->num_slots, + sizeof(struct hsq_slot), gfp_kernel); + if (!hsq->slot) + return -enomem; + + hsq->mmc = mmc; + hsq->mmc->cqe_private = hsq; + mmc->cqe_ops = &mmc_hsq_ops; + + spin_lock_init(&hsq->lock); + init_waitqueue_head(&hsq->wait_queue); + + return 0; +} +export_symbol_gpl(mmc_hsq_init); + +void mmc_hsq_suspend(struct mmc_host *mmc) +{ + mmc_hsq_disable(mmc); +} +export_symbol_gpl(mmc_hsq_suspend); + +int mmc_hsq_resume(struct mmc_host *mmc) +{ + return mmc_hsq_enable(mmc, null); +} +export_symbol_gpl(mmc_hsq_resume); diff --git a/drivers/mmc/host/mmc_hsq.h b/drivers/mmc/host/mmc_hsq.h --- /dev/null +++ b/drivers/mmc/host/mmc_hsq.h +/* spdx-license-identifier: gpl-2.0 */ +#ifndef linux_mmc_hsq_h +#define linux_mmc_hsq_h + +struct hsq_slot { + struct mmc_request *mrq; +}; + +struct mmc_hsq { + struct mmc_host *mmc; + struct mmc_request *mrq; + wait_queue_head_t wait_queue; + struct hsq_slot *slot; + spinlock_t lock; + + int next_tag; + int num_slots; + int qcnt; + + bool enabled; + bool waiting_for_idle; + bool recovery_halt; +}; + +int mmc_hsq_init(struct mmc_hsq *hsq, struct mmc_host *mmc); +void mmc_hsq_suspend(struct mmc_host *mmc); +int mmc_hsq_resume(struct mmc_host *mmc); +bool mmc_hsq_finalize_request(struct mmc_host *mmc, struct mmc_request *mrq); + +#endif diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h --- a/include/linux/mmc/host.h +++ b/include/linux/mmc/host.h + /* host software queue support */ + bool hsq_enabled; +
|
Multi Media Card (MMC)
|
511ce378e16f07b66ab78118587b7cc6ac197364
|
baolin wang
|
include
|
linux
|
core, host, mmc
|
mmc: core: enable the mmc host software queue for the sd card
|
enable the mmc host software queue for the sd card if the host controller supports the mmc host software queue.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add mmc software queue support, and set the queue depth as 64 to allow more requests can be be prepared, merged and inserted into io scheduler, which improves the performance
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['core']
|
['c']
| 1
| 10
| 0
|
--- diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c --- a/drivers/mmc/core/sd.c +++ b/drivers/mmc/core/sd.c + if (host->cqe_ops && !host->cqe_enabled) { + err = host->cqe_ops->cqe_enable(host, card); + if (!err) { + host->cqe_enabled = true; + host->hsq_enabled = true; + pr_info("%s: host software queue enabled ", + mmc_hostname(host)); + } + } +
|
Multi Media Card (MMC)
|
045d705dc1fba0d881fe22ad76ebe1b44647cdac
|
baolin wang
|
drivers
|
mmc
|
core
|
mmc: host: sdhci: add request_done ops for struct sdhci_ops
|
add request_done ops for struct sdhci_ops as a preparation in case some host controllers have different method to complete one request, such as supporting request completion of mmc software queue.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add mmc software queue support, and set the queue depth as 64 to allow more requests can be be prepared, merged and inserted into io scheduler, which improves the performance
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['core']
|
['h', 'c']
| 2
| 12
| 2
|
--- diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c - mmc_request_done(host->mmc, mrq); + if (host->ops->request_done) + host->ops->request_done(host, mrq); + else + mmc_request_done(host->mmc, mrq); - if (mrqs_done[i]) + if (!mrqs_done[i]) + continue; + + if (host->ops->request_done) + host->ops->request_done(host, mrqs_done[i]); + else diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h + void (*request_done)(struct sdhci_host *host, + struct mmc_request *mrq);
|
Multi Media Card (MMC)
|
1774b0021405b4d312499095f6d3919b5bdf3e3b
|
baolin wang adrian hunter adrian hunter intel com
|
drivers
|
mmc
|
host
|
mmc: host: sdhci: add a variable to defer to complete requests if needed
|
when using the host software queue, it will trigger the next request in irq handler without a context switch. but the sdhci_request() can not be called in interrupt context when using host software queue for some host drivers, due to the get_cd() ops can be sleepable.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add mmc software queue support, and set the queue depth as 64 to allow more requests can be be prepared, merged and inserted into io scheduler, which improves the performance
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['core']
|
['h', 'c']
| 2
| 2
| 1
|
--- diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c - return host->pending_reset || + return host->pending_reset || host->always_defer_done || diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h + bool always_defer_done; /* always defer to complete requests */
|
Multi Media Card (MMC)
|
4730831c7d2e28c2e912b2c71066b9cf072f7625
|
baolin wang
|
drivers
|
mmc
|
host
|
mmc: host: sdhci-sprd: add software queue support
|
add software queue support to improve the performance.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add mmc software queue support, and set the queue depth as 64 to allow more requests can be be prepared, merged and inserted into io scheduler, which improves the performance
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['core']
|
['kconfig', 'c']
| 2
| 29
| 0
|
--- diff --git a/drivers/mmc/host/kconfig b/drivers/mmc/host/kconfig --- a/drivers/mmc/host/kconfig +++ b/drivers/mmc/host/kconfig + select mmc_hsq diff --git a/drivers/mmc/host/sdhci-sprd.c b/drivers/mmc/host/sdhci-sprd.c --- a/drivers/mmc/host/sdhci-sprd.c +++ b/drivers/mmc/host/sdhci-sprd.c +#include "mmc_hsq.h" +static void sdhci_sprd_request_done(struct sdhci_host *host, + struct mmc_request *mrq) +{ + /* validate if the request was from software queue firstly. */ + if (mmc_hsq_finalize_request(host->mmc, mrq)) + return; + + mmc_request_done(host->mmc, mrq); +} + + .request_done = sdhci_sprd_request_done, + struct mmc_hsq *hsq; + hsq = devm_kzalloc(&pdev->dev, sizeof(*hsq), gfp_kernel); + if (!hsq) { + ret = -enomem; + goto err_cleanup_host; + } + + ret = mmc_hsq_init(hsq, host->mmc); + if (ret) + goto err_cleanup_host; + + host->always_defer_done = true; + + mmc_hsq_suspend(host->mmc); + mmc_hsq_resume(host->mmc); +
|
Multi Media Card (MMC)
|
f4498549e1690af7cba1eff8570da9c134cb80b5
|
baolin wang
|
drivers
|
mmc
|
host
|
mmc: mmci: add support for sdmmc variant revision 2.0
|
this patch adds a sdmmc variant revision 2.0. this revision is backward compatible with 1.1, but adds dma linked list support.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add support for sdmmc variant revision 2.0
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['mmci']
|
['c']
| 1
| 31
| 0
|
--- diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c +static struct variant_data variant_stm32_sdmmcv2 = { + .fifosize = 16 * 4, + .fifohalfsize = 8 * 4, + .f_max = 208000000, + .stm32_clkdiv = true, + .cmdreg_cpsm_enable = mci_cpsm_stm32_enable, + .cmdreg_lrsp_crc = mci_cpsm_stm32_lrsp_crc, + .cmdreg_srsp_crc = mci_cpsm_stm32_srsp_crc, + .cmdreg_srsp = mci_cpsm_stm32_srsp, + .cmdreg_stop = mci_cpsm_stm32_cmdstop, + .data_cmd_enable = mci_cpsm_stm32_cmdtrans, + .irq_pio_mask = mci_irq_pio_stm32_mask, + .datactrl_first = true, + .datacnt_useless = true, + .datalength_bits = 25, + .datactrl_blocksz = 14, + .datactrl_any_blocksz = true, + .stm32_idmabsize_mask = genmask(16, 5), + .dma_lli = true, + .busy_timeout = true, + .busy_detect = true, + .busy_detect_flag = mci_stm32_busyd0, + .busy_detect_mask = mci_stm32_busyd0endmask, + .init = sdmmc_variant_init, +}; + + { + .id = 0x00253180, + .mask = 0xf0ffffff, + .data = &variant_stm32_sdmmcv2, + },
|
Multi Media Card (MMC)
|
7a2a98be672b7f6af3a33525ee1e5104381316a9
|
ludovic barre
|
drivers
|
mmc
|
host
|
mmc: sdhci-esdhc-imx: add strobe-dll-delay-target support
|
strobe-dll-delay-target is the delay cell add on the strobe line. strobe line the the usdhc loopback read clock which is use in hs400 mode. different strobe-dll-delay-target may need to set for different board/soc. if this delay cell is not set to an appropriate value, we may see some read operation meet crc error after hs400 mode select which already pass the tuning.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add strobe-dll-delay-target support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['sdhci-esdhc-imx']
|
['h', 'c']
| 2
| 12
| 1
|
--- diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c +#define esdhc_strobe_dll_ctrl_slv_dly_target_default 0x7 + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct pltfm_imx_data *imx_data = sdhci_pltfm_priv(pltfm_host); + u32 strobe_delay; + if (imx_data->boarddata.strobe_dll_delay_target) + strobe_delay = imx_data->boarddata.strobe_dll_delay_target; + else + strobe_delay = esdhc_strobe_dll_ctrl_slv_dly_target_default; - (7 << esdhc_strobe_dll_ctrl_slv_dly_target_shift); + (strobe_delay << esdhc_strobe_dll_ctrl_slv_dly_target_shift); + of_property_read_u32(np, "fsl,strobe-dll-delay-target", + &boarddata->strobe_dll_delay_target); diff --git a/include/linux/platform_data/mmc-esdhc-imx.h b/include/linux/platform_data/mmc-esdhc-imx.h --- a/include/linux/platform_data/mmc-esdhc-imx.h +++ b/include/linux/platform_data/mmc-esdhc-imx.h + unsigned int strobe_dll_delay_target; /* the delay cell for strobe pad (read clock) */
|
Multi Media Card (MMC)
|
5bd2acdcdde22231057b12ee8978dd87c29ff322
|
haibo chen
|
drivers
|
mmc
|
host, platform_data
|
mtd: rawnand: add support for macronix nand randomizer
|
macronix nands support randomizer operation for user data scrambled, which can be enabled with a set_feature.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add support for macronix nand randomizer
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['rawnand']
|
['c']
| 1
| 81
| 0
|
--- diff --git a/drivers/mtd/nand/raw/nand_macronix.c b/drivers/mtd/nand/raw/nand_macronix.c --- a/drivers/mtd/nand/raw/nand_macronix.c +++ b/drivers/mtd/nand/raw/nand_macronix.c +#define onfi_feature_addr_mxic_randomizer 0xb0 +#define macronix_randomizer_bit bit(1) +#define macronix_randomizer_enpgm bit(0) +#define macronix_randomizer_randen bit(1) +#define macronix_randomizer_randopt bit(2) +#define macronix_randomizer_mode_enter \ + (macronix_randomizer_enpgm | \ + macronix_randomizer_randen | \ + macronix_randomizer_randopt) +#define macronix_randomizer_mode_exit \ + (macronix_randomizer_randen | \ + macronix_randomizer_randopt) + +static int macronix_nand_randomizer_check_enable(struct nand_chip *chip) +{ + u8 feature[onfi_subfeature_param_len]; + int ret; + + ret = nand_get_features(chip, onfi_feature_addr_mxic_randomizer, + feature); + if (ret < 0) + return ret; + + if (feature[0]) + return feature[0]; + + feature[0] = macronix_randomizer_mode_enter; + ret = nand_set_features(chip, onfi_feature_addr_mxic_randomizer, + feature); + if (ret < 0) + return ret; + + /* randen and randopt otp bits are programmed */ + feature[0] = 0x0; + ret = nand_prog_page_op(chip, 0, 0, feature, 1); + if (ret < 0) + return ret; + + ret = nand_get_features(chip, onfi_feature_addr_mxic_randomizer, + feature); + if (ret < 0) + return ret; + + feature[0] &= macronix_randomizer_mode_exit; + ret = nand_set_features(chip, onfi_feature_addr_mxic_randomizer, + feature); + if (ret < 0) + return ret; + + return 0; +} + + struct device_node *dn = nand_get_flash_node(chip); + int rand_otp = 0; + int ret; + if (of_find_property(dn, "mxic,enable-randomizer-otp", null)) + rand_otp = 1; + + /* subpage write is prohibited in randomizer operatoin */ + if (rand_otp && chip->options & nand_no_subpage_write && + mxic->reliability_func & macronix_randomizer_bit) { + if (p->supports_set_get_features) { + bitmap_set(p->set_feature_list, + onfi_feature_addr_mxic_randomizer, 1); + bitmap_set(p->get_feature_list, + onfi_feature_addr_mxic_randomizer, 1); + ret = macronix_nand_randomizer_check_enable(chip); + if (ret < 0) { + bitmap_clear(p->set_feature_list, + onfi_feature_addr_mxic_randomizer, + 1); + bitmap_clear(p->get_feature_list, + onfi_feature_addr_mxic_randomizer, + 1); + pr_info("macronix nand randomizer failed "); + } else { + pr_info("macronix nand randomizer enabled "); + } + } + } +
|
Memory Technology Devices (MTD)
|
84234652595f8dc29a92a33a6ae504c7df2e11c8
|
mason yang
|
drivers
|
mtd
|
nand, raw
|
mtd: rawnand: macronix: add support for deep power down mode
|
macronix ad series support deep power down mode for a minimum power consumption state.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add support for deep power down mode
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['rawnand', 'macronix']
|
['c']
| 1
| 74
| 0
|
--- diff --git a/drivers/mtd/nand/raw/nand_macronix.c b/drivers/mtd/nand/raw/nand_macronix.c --- a/drivers/mtd/nand/raw/nand_macronix.c +++ b/drivers/mtd/nand/raw/nand_macronix.c +#include "linux/delay.h" +#define mxic_cmd_power_down 0xb9 + +static int nand_power_down_op(struct nand_chip *chip) +{ + int ret; + + if (nand_has_exec_op(chip)) { + struct nand_op_instr instrs[] = { + nand_op_cmd(mxic_cmd_power_down, 0), + }; + + struct nand_operation op = nand_operation(chip->cur_cs, instrs); + + ret = nand_exec_op(chip, &op); + if (ret) + return ret; + + } else { + chip->legacy.cmdfunc(chip, mxic_cmd_power_down, -1, -1); + } + + return 0; +} + +static int mxic_nand_suspend(struct nand_chip *chip) +{ + int ret; + + nand_select_target(chip, 0); + ret = nand_power_down_op(chip); + if (ret < 0) + pr_err("suspending mxic nand chip failed (%d) ", ret); + nand_deselect_target(chip); + + return ret; +} + +static void mxic_nand_resume(struct nand_chip *chip) +{ + /* + * toggle #cs pin to resume nand device and don't care + * of the others cle, #we, #re pins status. + * a nand controller ensure it is able to assert/de-assert #cs + * by sending any byte over the nand bus. + * i.e., + * nand power down command or reset command w/o r/b# status checking. + */ + nand_select_target(chip, 0); + nand_power_down_op(chip); + /* the minimum of a recovery time trdp is 35 us */ + usleep_range(35, 100); + nand_deselect_target(chip); +} + +static void macronix_nand_deep_power_down_support(struct nand_chip *chip) +{ + int i; + static const char * const deep_power_down_dev[] = { + "mx30uf1g28ad", + "mx30uf2g28ad", + "mx30uf4g28ad", + }; + + i = match_string(deep_power_down_dev, array_size(deep_power_down_dev), + chip->parameters.model); + if (i < 0) + return; + + chip->suspend = mxic_nand_suspend; + chip->resume = mxic_nand_resume; +} + + macronix_nand_deep_power_down_support(chip);
|
Memory Technology Devices (MTD)
|
19301d54997df35e9829b4f707c59f3284530d71
|
mason yang
|
drivers
|
mtd
|
nand, raw
|
mtd: rawnand: toshiba: support reading the number of bitflips for benand (built-in ecc nand)
|
add support vendor specific commands for kioxia corporation benand. the actual bitflips number can be retrieved by this command.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
support reading the number of bitflips for benand (built-in ecc nand)
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['rawnand', 'toshiba']
|
['c']
| 1
| 56
| 2
|
--- diff --git a/drivers/mtd/nand/raw/nand_toshiba.c b/drivers/mtd/nand/raw/nand_toshiba.c --- a/drivers/mtd/nand/raw/nand_toshiba.c +++ b/drivers/mtd/nand/raw/nand_toshiba.c +/* ecc status read command for benand */ +#define toshiba_nand_cmd_ecc_status_read 0x7a + +/* ecc status mask for benand */ +#define toshiba_nand_ecc_status_mask 0x0f + +/* uncorrectable error for benand */ +#define toshiba_nand_ecc_status_uncorr 0x0f + +/* max ecc steps for benand */ +#define toshiba_nand_max_ecc_steps 8 + +static int toshiba_nand_benand_read_eccstatus_op(struct nand_chip *chip, + u8 *buf) +{ + u8 *ecc_status = buf; + + if (nand_has_exec_op(chip)) { + const struct nand_sdr_timings *sdr = + nand_get_sdr_timings(&chip->data_interface); + struct nand_op_instr instrs[] = { + nand_op_cmd(toshiba_nand_cmd_ecc_status_read, + psec_to_nsec(sdr->tadl_min)), + nand_op_8bit_data_in(chip->ecc.steps, ecc_status, 0), + }; + struct nand_operation op = nand_operation(chip->cur_cs, instrs); + + return nand_exec_op(chip, &op); + } + + return -enotsupp; +} + - u8 status; + u8 status, ecc_status[toshiba_nand_max_ecc_steps]; + ret = toshiba_nand_benand_read_eccstatus_op(chip, ecc_status); + if (!ret) { + unsigned int i, bitflips = 0; + + for (i = 0; i < chip->ecc.steps; i++) { + bitflips = ecc_status[i] & toshiba_nand_ecc_status_mask; + if (bitflips == toshiba_nand_ecc_status_uncorr) { + mtd->ecc_stats.failed++; + } else { + mtd->ecc_stats.corrected += bitflips; + max_bitflips = max(max_bitflips, bitflips); + } + } + + return max_bitflips; + } + + /* + * fallback to regular status check if + * toshiba_nand_benand_read_eccstatus_op() failed. + */ - !(chip->id.data[4] & 0x80) /* !benand */) { + !(chip->id.data[4] & toshiba_nand_id4_is_benand) /* !benand */) {
|
Memory Technology Devices (MTD)
|
fca88925d76978b7f20de42d8ead34fb91500003
|
yoshio furuyama
|
drivers
|
mtd
|
nand, raw
|
mtd: spi-nor: add sr 4bit block protection support
|
currently we are supporting block protection only for flash chips with 3 block protection bits (bp0-2) in the sr register.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
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add sr 4bit block protection support
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['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['spi-nor']
|
['h', 'c']
| 3
| 60
| 18
|
--- diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c +static u8 spi_nor_get_sr_bp_mask(struct spi_nor *nor) +{ + u8 mask = sr_bp2 | sr_bp1 | sr_bp0; + + if (nor->flags & snor_f_has_sr_bp3_bit6) + return mask | sr_bp3_bit6; + + if (nor->flags & snor_f_has_4bit_bp) + return mask | sr_bp3; + + return mask; +} + +static u8 spi_nor_get_sr_tb_mask(struct spi_nor *nor) +{ + if (nor->flags & snor_f_has_sr_tb_bit6) + return sr_tb_bit6; + else + return sr_tb_bit5; +} + - u8 mask = sr_bp2 | sr_bp1 | sr_bp0; + u8 mask = spi_nor_get_sr_bp_mask(nor); - bp_slots = (mask >> sr_bp_shift) + 1 - 2; + bp_slots = (1 << hweight8(mask)) - 2; - u8 mask = sr_bp2 | sr_bp1 | sr_bp0; - u8 tb_mask = sr_tb_bit5; - u8 bp = (sr & mask) >> sr_bp_shift; + u8 mask = spi_nor_get_sr_bp_mask(nor); + u8 tb_mask = spi_nor_get_sr_tb_mask(nor); + u8 bp, val = sr & mask; - if (nor->flags & snor_f_has_sr_tb_bit6) - tb_mask = sr_tb_bit6; + if (nor->flags & snor_f_has_sr_bp3_bit6 && val & sr_bp3_bit6) + val = (val & ~sr_bp3_bit6) | sr_bp3; + + bp = val >> sr_bp_shift; - * supports the block protection bits bp{0,1,2} in the status register + * supports the block protection bits bp{0,1,2}/bp{0,1,2,3} in the status + * register - u8 mask = sr_bp2 | sr_bp1 | sr_bp0; - u8 tb_mask = sr_tb_bit5; + u8 mask = spi_nor_get_sr_bp_mask(nor); + u8 tb_mask = spi_nor_get_sr_tb_mask(nor); - if (nor->flags & snor_f_has_sr_tb_bit6) - tb_mask = sr_tb_bit6; - + if (nor->flags & snor_f_has_sr_bp3_bit6 && val & sr_bp3) + val = (val & ~sr_bp3) | sr_bp3_bit6; + - u8 mask = sr_bp2 | sr_bp1 | sr_bp0; - u8 tb_mask = sr_tb_bit5; + u8 mask = spi_nor_get_sr_bp_mask(nor); + u8 tb_mask = spi_nor_get_sr_tb_mask(nor); - if (nor->flags & snor_f_has_sr_tb_bit6) - tb_mask = sr_tb_bit6; - + if (nor->flags & snor_f_has_sr_bp3_bit6 && val & sr_bp3) + val = (val & ~sr_bp3) | sr_bp3_bit6; + + if (info->flags & spi_nor_4bit_bp) { + nor->flags |= snor_f_has_4bit_bp; + if (info->flags & spi_nor_bp3_sr_bit6) + nor->flags |= snor_f_has_sr_bp3_bit6; + } + diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h + snor_f_has_4bit_bp = bit(12), + snor_f_has_sr_bp3_bit6 = bit(13), +#define spi_nor_4bit_bp bit(17) /* + * flash sr has 4 bit fields (bp0-3) + * for block protection. + */ +#define spi_nor_bp3_sr_bit6 bit(18) /* + * bp3 is bit 6 of status register. + * must be used with spi_nor_4bit_bp. + */ diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h +#define sr_bp3 bit(5) /* block protect 3 */ +#define sr_bp3_bit6 bit(6) /* block protect 3 */
|
Memory Technology Devices (MTD)
|
05635c14a292de0e1a221dc31c04aba3913f03c8
|
jungseung lee
|
drivers
|
mtd
|
mtd, spi-nor
|
mtd: spi-nor: remove mtk-quadspi driver
|
this driver is superseded by the new spi-mtk-nor driver.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
remove mtk-quadspi driver
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['spi-nor']
|
['kconfig', 'c', 'makefile']
| 3
| 0
| 574
|
--- diff --git a/drivers/mtd/spi-nor/kconfig b/drivers/mtd/spi-nor/kconfig --- a/drivers/mtd/spi-nor/kconfig +++ b/drivers/mtd/spi-nor/kconfig -config spi_mtk_quadspi - tristate "mediatek quad spi controller" - depends on has_iomem - help - this enables support for the quad spi controller in master mode. - this controller does not support generic spi. it only supports - spi nor. - diff --git a/drivers/mtd/spi-nor/makefile b/drivers/mtd/spi-nor/makefile --- a/drivers/mtd/spi-nor/makefile +++ b/drivers/mtd/spi-nor/makefile -obj-$(config_spi_mtk_quadspi) += mtk-quadspi.o diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c b/drivers/mtd/spi-nor/mtk-quadspi.c --- a/drivers/mtd/spi-nor/mtk-quadspi.c +++ /dev/null -// spdx-license-identifier: gpl-2.0-only -/* - * copyright (c) 2015 mediatek inc. - * author: bayi cheng <bayi.cheng@mediatek.com> - */ - -#include <linux/clk.h> -#include <linux/delay.h> -#include <linux/device.h> -#include <linux/init.h> -#include <linux/io.h> -#include <linux/iopoll.h> -#include <linux/ioport.h> -#include <linux/math64.h> -#include <linux/module.h> -#include <linux/mutex.h> -#include <linux/of.h> -#include <linux/of_device.h> -#include <linux/platform_device.h> -#include <linux/slab.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/spi-nor.h> - -#define mtk_nor_cmd_reg 0x00 -#define mtk_nor_cnt_reg 0x04 -#define mtk_nor_rdsr_reg 0x08 -#define mtk_nor_rdata_reg 0x0c -#define mtk_nor_radr0_reg 0x10 -#define mtk_nor_radr1_reg 0x14 -#define mtk_nor_radr2_reg 0x18 -#define mtk_nor_wdata_reg 0x1c -#define mtk_nor_prgdata0_reg 0x20 -#define mtk_nor_prgdata1_reg 0x24 -#define mtk_nor_prgdata2_reg 0x28 -#define mtk_nor_prgdata3_reg 0x2c -#define mtk_nor_prgdata4_reg 0x30 -#define mtk_nor_prgdata5_reg 0x34 -#define mtk_nor_shreg0_reg 0x38 -#define mtk_nor_shreg1_reg 0x3c -#define mtk_nor_shreg2_reg 0x40 -#define mtk_nor_shreg3_reg 0x44 -#define mtk_nor_shreg4_reg 0x48 -#define mtk_nor_shreg5_reg 0x4c -#define mtk_nor_shreg6_reg 0x50 -#define mtk_nor_shreg7_reg 0x54 -#define mtk_nor_shreg8_reg 0x58 -#define mtk_nor_shreg9_reg 0x5c -#define mtk_nor_cfg1_reg 0x60 -#define mtk_nor_cfg2_reg 0x64 -#define mtk_nor_cfg3_reg 0x68 -#define mtk_nor_status0_reg 0x70 -#define mtk_nor_status1_reg 0x74 -#define mtk_nor_status2_reg 0x78 -#define mtk_nor_status3_reg 0x7c -#define mtk_nor_flhcfg_reg 0x84 -#define mtk_nor_time_reg 0x94 -#define mtk_nor_pp_data_reg 0x98 -#define mtk_nor_prebuf_stus_reg 0x9c -#define mtk_nor_delsel0_reg 0xa0 -#define mtk_nor_delsel1_reg 0xa4 -#define mtk_nor_intrstus_reg 0xa8 -#define mtk_nor_intren_reg 0xac -#define mtk_nor_chksum_ctl_reg 0xb8 -#define mtk_nor_chksum_reg 0xbc -#define mtk_nor_cmd2_reg 0xc0 -#define mtk_nor_wrprot_reg 0xc4 -#define mtk_nor_radr3_reg 0xc8 -#define mtk_nor_dual_reg 0xcc -#define mtk_nor_delsel2_reg 0xd0 -#define mtk_nor_delsel3_reg 0xd4 -#define mtk_nor_delsel4_reg 0xd8 - -/* commands for mtk nor controller */ -#define mtk_nor_read_cmd 0x0 -#define mtk_nor_rdsr_cmd 0x2 -#define mtk_nor_prg_cmd 0x4 -#define mtk_nor_wr_cmd 0x10 -#define mtk_nor_pio_wr_cmd 0x90 -#define mtk_nor_wrsr_cmd 0x20 -#define mtk_nor_pio_read_cmd 0x81 -#define mtk_nor_wr_buf_enable 0x1 -#define mtk_nor_wr_buf_disable 0x0 -#define mtk_nor_enable_sf_cmd 0x30 -#define mtk_nor_duad_addr_en 0x8 -#define mtk_nor_quad_read_en 0x4 -#define mtk_nor_dual_addr_en 0x2 -#define mtk_nor_dual_read_en 0x1 -#define mtk_nor_dual_disable 0x0 -#define mtk_nor_fast_read 0x1 - -#define sflash_wrbuf_size 128 - -/* can shift up to 48 bits (6 bytes) of tx/rx */ -#define mtk_nor_max_rx_tx_shift 6 -/* can shift up to 56 bits (7 bytes) transfer by mtk_nor_prg_cmd */ -#define mtk_nor_max_shift 7 -/* nor controller 4-byte address mode enable bit */ -#define mtk_nor_4b_addr_en bit(4) - -/* helpers for accessing the program data / shift data registers */ -#define mtk_nor_prg_reg(n) (mtk_nor_prgdata0_reg + 4 * (n)) -#define mtk_nor_shreg(n) (mtk_nor_shreg0_reg + 4 * (n)) - -struct mtk_nor { - struct spi_nor nor; - struct device *dev; - void __iomem *base; /* nor flash base address */ - struct clk *spi_clk; - struct clk *nor_clk; -}; - -static void mtk_nor_set_read_mode(struct mtk_nor *mtk_nor) -{ - struct spi_nor *nor = &mtk_nor->nor; - - switch (nor->read_proto) { - case snor_proto_1_1_1: - writeb(nor->read_opcode, mtk_nor->base + - mtk_nor_prgdata3_reg); - writeb(mtk_nor_fast_read, mtk_nor->base + - mtk_nor_cfg1_reg); - break; - case snor_proto_1_1_2: - writeb(nor->read_opcode, mtk_nor->base + - mtk_nor_prgdata3_reg); - writeb(mtk_nor_dual_read_en, mtk_nor->base + - mtk_nor_dual_reg); - break; - case snor_proto_1_1_4: - writeb(nor->read_opcode, mtk_nor->base + - mtk_nor_prgdata4_reg); - writeb(mtk_nor_quad_read_en, mtk_nor->base + - mtk_nor_dual_reg); - break; - default: - writeb(mtk_nor_dual_disable, mtk_nor->base + - mtk_nor_dual_reg); - break; - } -} - -static int mtk_nor_execute_cmd(struct mtk_nor *mtk_nor, u8 cmdval) -{ - int reg; - u8 val = cmdval & 0x1f; - - writeb(cmdval, mtk_nor->base + mtk_nor_cmd_reg); - return readl_poll_timeout(mtk_nor->base + mtk_nor_cmd_reg, reg, - !(reg & val), 100, 10000); -} - -static int mtk_nor_do_tx_rx(struct mtk_nor *mtk_nor, u8 op, - const u8 *tx, size_t txlen, u8 *rx, size_t rxlen) -{ - size_t len = 1 + txlen + rxlen; - int i, ret, idx; - - if (len > mtk_nor_max_shift) - return -einval; - - writeb(len * 8, mtk_nor->base + mtk_nor_cnt_reg); - - /* start at prgdata5, go down to prgdata0 */ - idx = mtk_nor_max_rx_tx_shift - 1; - - /* opcode */ - writeb(op, mtk_nor->base + mtk_nor_prg_reg(idx)); - idx--; - - /* program tx data */ - for (i = 0; i < txlen; i++, idx--) - writeb(tx[i], mtk_nor->base + mtk_nor_prg_reg(idx)); - - /* clear out rest of tx registers */ - while (idx >= 0) { - writeb(0, mtk_nor->base + mtk_nor_prg_reg(idx)); - idx--; - } - - ret = mtk_nor_execute_cmd(mtk_nor, mtk_nor_prg_cmd); - if (ret) - return ret; - - /* restart at first rx byte */ - idx = rxlen - 1; - - /* read out rx data */ - for (i = 0; i < rxlen; i++, idx--) - rx[i] = readb(mtk_nor->base + mtk_nor_shreg(idx)); - - return 0; -} - -/* do a wrsr (write status register) command */ -static int mtk_nor_wr_sr(struct mtk_nor *mtk_nor, const u8 sr) -{ - writeb(sr, mtk_nor->base + mtk_nor_prgdata5_reg); - writeb(8, mtk_nor->base + mtk_nor_cnt_reg); - return mtk_nor_execute_cmd(mtk_nor, mtk_nor_wrsr_cmd); -} - -static int mtk_nor_write_buffer_enable(struct mtk_nor *mtk_nor) -{ - u8 reg; - - /* the bit0 of mtk_nor_cfg2_reg is pre-fetch buffer - * 0: pre-fetch buffer use for read - * 1: pre-fetch buffer use for page program - */ - writel(mtk_nor_wr_buf_enable, mtk_nor->base + mtk_nor_cfg2_reg); - return readb_poll_timeout(mtk_nor->base + mtk_nor_cfg2_reg, reg, - 0x01 == (reg & 0x01), 100, 10000); -} - -static int mtk_nor_write_buffer_disable(struct mtk_nor *mtk_nor) -{ - u8 reg; - - writel(mtk_nor_wr_buf_disable, mtk_nor->base + mtk_nor_cfg2_reg); - return readb_poll_timeout(mtk_nor->base + mtk_nor_cfg2_reg, reg, - mtk_nor_wr_buf_disable == (reg & 0x1), 100, - 10000); -} - -static void mtk_nor_set_addr_width(struct mtk_nor *mtk_nor) -{ - u8 val; - struct spi_nor *nor = &mtk_nor->nor; - - val = readb(mtk_nor->base + mtk_nor_dual_reg); - - switch (nor->addr_width) { - case 3: - val &= ~mtk_nor_4b_addr_en; - break; - case 4: - val |= mtk_nor_4b_addr_en; - break; - default: - dev_warn(mtk_nor->dev, "unexpected address width %u. ", - nor->addr_width); - break; - } - - writeb(val, mtk_nor->base + mtk_nor_dual_reg); -} - -static void mtk_nor_set_addr(struct mtk_nor *mtk_nor, u32 addr) -{ - int i; - - mtk_nor_set_addr_width(mtk_nor); - - for (i = 0; i < 3; i++) { - writeb(addr & 0xff, mtk_nor->base + mtk_nor_radr0_reg + i * 4); - addr >>= 8; - } - /* last register is non-contiguous */ - writeb(addr & 0xff, mtk_nor->base + mtk_nor_radr3_reg); -} - -static ssize_t mtk_nor_read(struct spi_nor *nor, loff_t from, size_t length, - u_char *buffer) -{ - int i, ret; - int addr = (int)from; - u8 *buf = (u8 *)buffer; - struct mtk_nor *mtk_nor = nor->priv; - - /* set mode for fast read mode ,dual mode or quad mode */ - mtk_nor_set_read_mode(mtk_nor); - mtk_nor_set_addr(mtk_nor, addr); - - for (i = 0; i < length; i++) { - ret = mtk_nor_execute_cmd(mtk_nor, mtk_nor_pio_read_cmd); - if (ret < 0) - return ret; - buf[i] = readb(mtk_nor->base + mtk_nor_rdata_reg); - } - return length; -} - -static int mtk_nor_write_single_byte(struct mtk_nor *mtk_nor, - int addr, int length, u8 *data) -{ - int i, ret; - - mtk_nor_set_addr(mtk_nor, addr); - - for (i = 0; i < length; i++) { - writeb(*data++, mtk_nor->base + mtk_nor_wdata_reg); - ret = mtk_nor_execute_cmd(mtk_nor, mtk_nor_pio_wr_cmd); - if (ret < 0) - return ret; - } - return 0; -} - -static int mtk_nor_write_buffer(struct mtk_nor *mtk_nor, int addr, - const u8 *buf) -{ - int i, bufidx, data; - - mtk_nor_set_addr(mtk_nor, addr); - - bufidx = 0; - for (i = 0; i < sflash_wrbuf_size; i += 4) { - data = buf[bufidx + 3]<<24 | buf[bufidx + 2]<<16 | - buf[bufidx + 1]<<8 | buf[bufidx]; - bufidx += 4; - writel(data, mtk_nor->base + mtk_nor_pp_data_reg); - } - return mtk_nor_execute_cmd(mtk_nor, mtk_nor_wr_cmd); -} - -static ssize_t mtk_nor_write(struct spi_nor *nor, loff_t to, size_t len, - const u_char *buf) -{ - int ret; - struct mtk_nor *mtk_nor = nor->priv; - size_t i; - - ret = mtk_nor_write_buffer_enable(mtk_nor); - if (ret < 0) { - dev_warn(mtk_nor->dev, "write buffer enable failed! "); - return ret; - } - - for (i = 0; i + sflash_wrbuf_size <= len; i += sflash_wrbuf_size) { - ret = mtk_nor_write_buffer(mtk_nor, to, buf); - if (ret < 0) { - dev_err(mtk_nor->dev, "write buffer failed! "); - return ret; - } - to += sflash_wrbuf_size; - buf += sflash_wrbuf_size; - } - ret = mtk_nor_write_buffer_disable(mtk_nor); - if (ret < 0) { - dev_warn(mtk_nor->dev, "write buffer disable failed! "); - return ret; - } - - if (i < len) { - ret = mtk_nor_write_single_byte(mtk_nor, to, - (int)(len - i), (u8 *)buf); - if (ret < 0) { - dev_err(mtk_nor->dev, "write single byte failed! "); - return ret; - } - } - - return len; -} - -static int mtk_nor_read_reg(struct spi_nor *nor, u8 opcode, u8 *buf, size_t len) -{ - int ret; - struct mtk_nor *mtk_nor = nor->priv; - - switch (opcode) { - case spinor_op_rdsr: - ret = mtk_nor_execute_cmd(mtk_nor, mtk_nor_rdsr_cmd); - if (ret < 0) - return ret; - if (len == 1) - *buf = readb(mtk_nor->base + mtk_nor_rdsr_reg); - else - dev_err(mtk_nor->dev, "len should be 1 for read status! "); - break; - default: - ret = mtk_nor_do_tx_rx(mtk_nor, opcode, null, 0, buf, len); - break; - } - return ret; -} - -static int mtk_nor_write_reg(struct spi_nor *nor, u8 opcode, const u8 *buf, - size_t len) -{ - int ret; - struct mtk_nor *mtk_nor = nor->priv; - - switch (opcode) { - case spinor_op_wrsr: - /* we only handle 1 byte */ - ret = mtk_nor_wr_sr(mtk_nor, *buf); - break; - default: - ret = mtk_nor_do_tx_rx(mtk_nor, opcode, buf, len, null, 0); - if (ret) - dev_warn(mtk_nor->dev, "write reg failure! "); - break; - } - return ret; -} - -static void mtk_nor_disable_clk(struct mtk_nor *mtk_nor) -{ - clk_disable_unprepare(mtk_nor->spi_clk); - clk_disable_unprepare(mtk_nor->nor_clk); -} - -static int mtk_nor_enable_clk(struct mtk_nor *mtk_nor) -{ - int ret; - - ret = clk_prepare_enable(mtk_nor->spi_clk); - if (ret) - return ret; - - ret = clk_prepare_enable(mtk_nor->nor_clk); - if (ret) { - clk_disable_unprepare(mtk_nor->spi_clk); - return ret; - } - - return 0; -} - -static const struct spi_nor_controller_ops mtk_controller_ops = { - .read_reg = mtk_nor_read_reg, - .write_reg = mtk_nor_write_reg, - .read = mtk_nor_read, - .write = mtk_nor_write, -}; - -static int mtk_nor_init(struct mtk_nor *mtk_nor, - struct device_node *flash_node) -{ - const struct spi_nor_hwcaps hwcaps = { - .mask = snor_hwcaps_read | - snor_hwcaps_read_fast | - snor_hwcaps_read_1_1_2 | - snor_hwcaps_pp, - }; - int ret; - struct spi_nor *nor; - - /* initialize controller to accept commands */ - writel(mtk_nor_enable_sf_cmd, mtk_nor->base + mtk_nor_wrprot_reg); - - nor = &mtk_nor->nor; - nor->dev = mtk_nor->dev; - nor->priv = mtk_nor; - spi_nor_set_flash_node(nor, flash_node); - nor->controller_ops = &mtk_controller_ops; - - nor->mtd.name = "mtk_nor"; - /* initialized with null */ - ret = spi_nor_scan(nor, null, &hwcaps); - if (ret) - return ret; - - return mtd_device_register(&nor->mtd, null, 0); -} - -static int mtk_nor_drv_probe(struct platform_device *pdev) -{ - struct device_node *flash_np; - struct resource *res; - int ret; - struct mtk_nor *mtk_nor; - - if (!pdev->dev.of_node) { - dev_err(&pdev->dev, "no dt found "); - return -einval; - } - - mtk_nor = devm_kzalloc(&pdev->dev, sizeof(*mtk_nor), gfp_kernel); - if (!mtk_nor) - return -enomem; - platform_set_drvdata(pdev, mtk_nor); - - res = platform_get_resource(pdev, ioresource_mem, 0); - mtk_nor->base = devm_ioremap_resource(&pdev->dev, res); - if (is_err(mtk_nor->base)) - return ptr_err(mtk_nor->base); - - mtk_nor->spi_clk = devm_clk_get(&pdev->dev, "spi"); - if (is_err(mtk_nor->spi_clk)) - return ptr_err(mtk_nor->spi_clk); - - mtk_nor->nor_clk = devm_clk_get(&pdev->dev, "sf"); - if (is_err(mtk_nor->nor_clk)) - return ptr_err(mtk_nor->nor_clk); - - mtk_nor->dev = &pdev->dev; - - ret = mtk_nor_enable_clk(mtk_nor); - if (ret) - return ret; - - /* only support one attached flash */ - flash_np = of_get_next_available_child(pdev->dev.of_node, null); - if (!flash_np) { - dev_err(&pdev->dev, "no spi flash device to configure "); - ret = -enodev; - goto nor_free; - } - ret = mtk_nor_init(mtk_nor, flash_np); - -nor_free: - if (ret) - mtk_nor_disable_clk(mtk_nor); - - return ret; -} - -static int mtk_nor_drv_remove(struct platform_device *pdev) -{ - struct mtk_nor *mtk_nor = platform_get_drvdata(pdev); - - mtk_nor_disable_clk(mtk_nor); - - return 0; -} - -#ifdef config_pm_sleep -static int mtk_nor_suspend(struct device *dev) -{ - struct mtk_nor *mtk_nor = dev_get_drvdata(dev); - - mtk_nor_disable_clk(mtk_nor); - - return 0; -} - -static int mtk_nor_resume(struct device *dev) -{ - struct mtk_nor *mtk_nor = dev_get_drvdata(dev); - - return mtk_nor_enable_clk(mtk_nor); -} - -static const struct dev_pm_ops mtk_nor_dev_pm_ops = { - .suspend = mtk_nor_suspend, - .resume = mtk_nor_resume, -}; - -#define mtk_nor_dev_pm_ops (&mtk_nor_dev_pm_ops) -#else -#define mtk_nor_dev_pm_ops null -#endif - -static const struct of_device_id mtk_nor_of_ids[] = { - { .compatible = "mediatek,mt8173-nor"}, - { /* sentinel */ } -}; -module_device_table(of, mtk_nor_of_ids); - -static struct platform_driver mtk_nor_driver = { - .probe = mtk_nor_drv_probe, - .remove = mtk_nor_drv_remove, - .driver = { - .name = "mtk-nor", - .pm = mtk_nor_dev_pm_ops, - .of_match_table = mtk_nor_of_ids, - }, -}; - -module_platform_driver(mtk_nor_driver); -module_license("gpl v2"); -module_description("mediatek spi nor flash driver");
|
Memory Technology Devices (MTD)
|
e11e8473bcec748c3820636f11b986f611c9309b
|
chuanhong guo tudor ambarus tudor ambarus microchip com
|
drivers
|
mtd
|
spi-nor
|
mtd: spinand: micron: generalize the oob layout structure and function names
|
in order to add new micron spi nand devices, we generalized the oob layout structure and function names.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add new series micron spi nand devices (m78a, m79a and m70a)
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['spinand']
|
['c']
| 1
| 14
| 14
|
--- diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c --- a/drivers/mtd/nand/spi/micron.c +++ b/drivers/mtd/nand/spi/micron.c -static int mt29f2g01abagd_ooblayout_ecc(struct mtd_info *mtd, int section, - struct mtd_oob_region *region) +static int micron_8_ooblayout_ecc(struct mtd_info *mtd, int section, + struct mtd_oob_region *region) - region->offset = 64; - region->length = 64; + region->offset = mtd->oobsize / 2; + region->length = mtd->oobsize / 2; -static int mt29f2g01abagd_ooblayout_free(struct mtd_info *mtd, int section, - struct mtd_oob_region *region) +static int micron_8_ooblayout_free(struct mtd_info *mtd, int section, + struct mtd_oob_region *region) - region->length = 62; + region->length = (mtd->oobsize / 2) - 2; -static const struct mtd_ooblayout_ops mt29f2g01abagd_ooblayout = { - .ecc = mt29f2g01abagd_ooblayout_ecc, - .free = mt29f2g01abagd_ooblayout_free, +static const struct mtd_ooblayout_ops micron_8_ooblayout = { + .ecc = micron_8_ooblayout_ecc, + .free = micron_8_ooblayout_free, -static int mt29f2g01abagd_ecc_get_status(struct spinand_device *spinand, - u8 status) +static int micron_8_ecc_get_status(struct spinand_device *spinand, + u8 status) - spinand_eccinfo(&mt29f2g01abagd_ooblayout, - mt29f2g01abagd_ecc_get_status)), + spinand_eccinfo(µn_8_ooblayout, + micron_8_ecc_get_status)),
|
Memory Technology Devices (MTD)
|
d3137043440fb1faaaf2481184f35b9ed0c1f2c2
|
shivamurthy shastri boris brezillon boris brezillon collabora com
|
drivers
|
mtd
|
nand, spi
|
mtd: spinand: micron: describe the spi nand device mt29f2g01abagd
|
add the spi nand device mt29f2g01abagd series number, size and voltage details as a comment.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add new series micron spi nand devices (m78a, m79a and m70a)
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['spinand']
|
['c']
| 1
| 1
| 0
|
--- diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c --- a/drivers/mtd/nand/spi/micron.c +++ b/drivers/mtd/nand/spi/micron.c + /* m79a 2gb 3.3v */
|
Memory Technology Devices (MTD)
|
8511a3a9937e30949b34bea46c3dc3f65d11034b
|
shivamurthy shastri boris brezillon boris brezillon collabora com
|
drivers
|
mtd
|
nand, spi
|
mtd: spinand: micron: add new micron spi nand devices
|
add device table for m79a and m78a series micron spi nand devices.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add new series micron spi nand devices (m78a, m79a and m70a)
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['spinand']
|
['c']
| 1
| 33
| 0
|
--- diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c --- a/drivers/mtd/nand/spi/micron.c +++ b/drivers/mtd/nand/spi/micron.c + /* m79a 2gb 1.8v */ + spinand_info("mt29f2g01abbgd", + spinand_id(spinand_readid_method_opcode_dummy, 0x25), + nand_memorg(1, 2048, 128, 64, 2048, 40, 2, 1, 1), + nand_eccreq(8, 512), + spinand_info_op_variants(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + 0, + spinand_eccinfo(µn_8_ooblayout, + micron_8_ecc_get_status)), + /* m78a 1gb 3.3v */ + spinand_info("mt29f1g01abafd", + spinand_id(spinand_readid_method_opcode_dummy, 0x14), + nand_memorg(1, 2048, 128, 64, 1024, 20, 1, 1, 1), + nand_eccreq(8, 512), + spinand_info_op_variants(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + 0, + spinand_eccinfo(µn_8_ooblayout, + micron_8_ecc_get_status)), + /* m78a 1gb 1.8v */ + spinand_info("mt29f1g01abafd", + spinand_id(spinand_readid_method_opcode_dummy, 0x15), + nand_memorg(1, 2048, 128, 64, 1024, 20, 1, 1, 1), + nand_eccreq(8, 512), + spinand_info_op_variants(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + 0, + spinand_eccinfo(µn_8_ooblayout, + micron_8_ecc_get_status)),
|
Memory Technology Devices (MTD)
|
a15335a17f4abf48ed9739c3b119232f9392cb60
|
shivamurthy shastri boris brezillon boris brezillon collabora com
|
drivers
|
mtd
|
nand, spi
|
mtd: spinand: micron: identify spi nand device with continuous read mode
|
add spinand_has_cr_feat_bit flag to identify the spi nand device with the continuous read mode.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add new series micron spi nand devices (m78a, m79a and m70a)
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['spinand']
|
['h', 'c']
| 2
| 17
| 0
|
--- diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c --- a/drivers/mtd/nand/spi/micron.c +++ b/drivers/mtd/nand/spi/micron.c +#define micron_cfg_cr bit(0) + +static int micron_spinand_init(struct spinand_device *spinand) +{ + /* + * m70a device series enable continuous read feature at power-up, + * which is not supported. disable this bit to avoid any possible + * failure. + */ + if (spinand->flags & spinand_has_cr_feat_bit) + return spinand_upd_cfg(spinand, micron_cfg_cr, 0); + + return 0; +} + + .init = micron_spinand_init, diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h --- a/include/linux/mtd/spinand.h +++ b/include/linux/mtd/spinand.h +#define spinand_has_cr_feat_bit bit(1)
|
Memory Technology Devices (MTD)
|
0bc68af9137dc3f30b161de4ce546c7799f88d1e
|
shivamurthy shastri
|
include
|
linux
|
mtd, nand, spi
|
mtd: spinand: micron: add m70a series micron spi nand devices
|
add device table for m70a series micron spi nand devices.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add new series micron spi nand devices (m78a, m79a and m70a)
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['spinand']
|
['c']
| 1
| 22
| 0
|
--- diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c --- a/drivers/mtd/nand/spi/micron.c +++ b/drivers/mtd/nand/spi/micron.c + /* m70a 4gb 3.3v */ + spinand_info("mt29f4g01abafd", + spinand_id(spinand_readid_method_opcode_dummy, 0x34), + nand_memorg(1, 4096, 256, 64, 2048, 40, 1, 1, 1), + nand_eccreq(8, 512), + spinand_info_op_variants(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + spinand_has_cr_feat_bit, + spinand_eccinfo(µn_8_ooblayout, + micron_8_ecc_get_status)), + /* m70a 4gb 1.8v */ + spinand_info("mt29f4g01abbfd", + spinand_id(spinand_readid_method_opcode_dummy, 0x35), + nand_memorg(1, 4096, 256, 64, 2048, 40, 1, 1, 1), + nand_eccreq(8, 512), + spinand_info_op_variants(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + spinand_has_cr_feat_bit, + spinand_eccinfo(µn_8_ooblayout, + micron_8_ecc_get_status)),
|
Memory Technology Devices (MTD)
|
a7e5daccc310c3b892ae5e598cadb7a9274c2547
|
shivamurthy shastri boris brezillon boris brezillon collabora com
|
drivers
|
mtd
|
nand, spi
|
mtd: spinand: micron: add new micron spi nand devices with multiple dies
|
add device table for new micron spi nand devices, which have multiple dies.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add new series micron spi nand devices (m78a, m79a and m70a)
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['spinand']
|
['c']
| 1
| 58
| 0
|
--- diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c --- a/drivers/mtd/nand/spi/micron.c +++ b/drivers/mtd/nand/spi/micron.c +/* + * as per datasheet, die selection is done by the 6th bit of die + * select register (address 0xd0). + */ +#define micron_die_select_reg 0xd0 + +#define micron_select_die(x) ((x) << 6) + +static int micron_select_target(struct spinand_device *spinand, + unsigned int target) +{ + struct spi_mem_op op = spinand_set_feature_op(micron_die_select_reg, + spinand->scratchbuf); + + if (target > 1) + return -einval; + + *spinand->scratchbuf = micron_select_die(target); + + return spi_mem_exec_op(spinand->spimem, &op); +} + + /* m79a 4gb 3.3v */ + spinand_info("mt29f4g01adagd", + spinand_id(spinand_readid_method_opcode_dummy, 0x36), + nand_memorg(1, 2048, 128, 64, 2048, 80, 2, 1, 2), + nand_eccreq(8, 512), + spinand_info_op_variants(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + 0, + spinand_eccinfo(µn_8_ooblayout, + micron_8_ecc_get_status), + spinand_select_target(micron_select_target)), + /* m70a 8gb 3.3v */ + spinand_info("mt29f8g01adafd", + spinand_id(spinand_readid_method_opcode_dummy, 0x46), + nand_memorg(1, 4096, 256, 64, 2048, 40, 1, 1, 2), + nand_eccreq(8, 512), + spinand_info_op_variants(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + spinand_has_cr_feat_bit, + spinand_eccinfo(µn_8_ooblayout, + micron_8_ecc_get_status), + spinand_select_target(micron_select_target)), + /* m70a 8gb 1.8v */ + spinand_info("mt29f8g01adbfd", + spinand_id(spinand_readid_method_opcode_dummy, 0x47), + nand_memorg(1, 4096, 256, 64, 2048, 40, 1, 1, 2), + nand_eccreq(8, 512), + spinand_info_op_variants(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + spinand_has_cr_feat_bit, + spinand_eccinfo(µn_8_ooblayout, + micron_8_ecc_get_status), + spinand_select_target(micron_select_target)),
|
Memory Technology Devices (MTD)
|
9f9ae0c253c1e058fbc845e26c4a32a7d777f0dc
|
shivamurthy shastri
|
drivers
|
mtd
|
nand, spi
|
mtd: spinand: toshiba: support for new kioxia serial nand
|
add support for new kioxia products. the new kioxia products support program load x4 command, and have hold_d bit which is equivalent to qe bit.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
support for new kioxia serial nand
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['spinand', 'toshiba']
|
['c']
| 1
| 111
| 17
|
--- diff --git a/drivers/mtd/nand/spi/toshiba.c b/drivers/mtd/nand/spi/toshiba.c --- a/drivers/mtd/nand/spi/toshiba.c +++ b/drivers/mtd/nand/spi/toshiba.c +static spinand_op_variants(write_cache_x4_variants, + spinand_prog_load_x4(true, 0, null, 0), + spinand_prog_load(true, 0, null, 0)); + +static spinand_op_variants(update_cache_x4_variants, + spinand_prog_load_x4(false, 0, null, 0), + spinand_prog_load(false, 0, null, 0)); + +/** + * backward compatibility for 1st generation serial nand devices + * which don't support quad program load operation. + */ - /* 3.3v 1gb */ + /* 3.3v 1gb (1st generation) */ - /* 3.3v 2gb */ + /* 3.3v 2gb (1st generation) */ - /* 3.3v 4gb */ + /* 3.3v 4gb (1st generation) */ - /* 3.3v 4gb */ - spinand_info("tc58cvg2s0hraij", - spinand_id(spinand_readid_method_opcode_dummy, 0xed), - nand_memorg(1, 4096, 256, 64, 2048, 40, 1, 1, 1), - nand_eccreq(8, 512), - spinand_info_op_variants(&read_cache_variants, - &write_cache_variants, - &update_cache_variants), - 0, - spinand_eccinfo(&tx58cxgxsxraix_ooblayout, - tx58cxgxsxraix_ecc_get_status)), - /* 1.8v 1gb */ + /* 1.8v 1gb (1st generation) */ - /* 1.8v 2gb */ + /* 1.8v 2gb (1st generation) */ - /* 1.8v 4gb */ + /* 1.8v 4gb (1st generation) */ + + /* + * 2nd generation serial nand has hold_d which is equivalent to + * qe_bit. + */ + /* 3.3v 1gb (2nd generation) */ + spinand_info("tc58cvg0s3hraij", + spinand_id(spinand_readid_method_opcode_dummy, 0xe2), + nand_memorg(1, 2048, 128, 64, 1024, 20, 1, 1, 1), + nand_eccreq(8, 512), + spinand_info_op_variants(&read_cache_variants, + &write_cache_x4_variants, + &update_cache_x4_variants), + spinand_has_qe_bit, + spinand_eccinfo(&tx58cxgxsxraix_ooblayout, + tx58cxgxsxraix_ecc_get_status)), + /* 3.3v 2gb (2nd generation) */ + spinand_info("tc58cvg1s3hraij", + spinand_id(spinand_readid_method_opcode_dummy, 0xeb), + nand_memorg(1, 2048, 128, 64, 2048, 40, 1, 1, 1), + nand_eccreq(8, 512), + spinand_info_op_variants(&read_cache_variants, + &write_cache_x4_variants, + &update_cache_x4_variants), + spinand_has_qe_bit, + spinand_eccinfo(&tx58cxgxsxraix_ooblayout, + tx58cxgxsxraix_ecc_get_status)), + /* 3.3v 4gb (2nd generation) */ + spinand_info("tc58cvg2s0hraij", + spinand_id(spinand_readid_method_opcode_dummy, 0xed), + nand_memorg(1, 4096, 256, 64, 2048, 40, 1, 1, 1), + nand_eccreq(8, 512), + spinand_info_op_variants(&read_cache_variants, + &write_cache_x4_variants, + &update_cache_x4_variants), + spinand_has_qe_bit, + spinand_eccinfo(&tx58cxgxsxraix_ooblayout, + tx58cxgxsxraix_ecc_get_status)), + /* 3.3v 8gb (2nd generation) */ + spinand_info("th58cvg3s0hraij", + spinand_id(spinand_readid_method_opcode_dummy, 0xe4), + nand_memorg(1, 4096, 256, 64, 4096, 80, 1, 1, 1), + nand_eccreq(8, 512), + spinand_info_op_variants(&read_cache_variants, + &write_cache_x4_variants, + &update_cache_x4_variants), + spinand_has_qe_bit, + spinand_eccinfo(&tx58cxgxsxraix_ooblayout, + tx58cxgxsxraix_ecc_get_status)), + /* 1.8v 1gb (2nd generation) */ + spinand_info("tc58cyg0s3hraij", + spinand_id(spinand_readid_method_opcode_dummy, 0xd2), + nand_memorg(1, 2048, 128, 64, 1024, 20, 1, 1, 1), + nand_eccreq(8, 512), + spinand_info_op_variants(&read_cache_variants, + &write_cache_x4_variants, + &update_cache_x4_variants), + spinand_has_qe_bit, + spinand_eccinfo(&tx58cxgxsxraix_ooblayout, + tx58cxgxsxraix_ecc_get_status)), + /* 1.8v 2gb (2nd generation) */ + spinand_info("tc58cyg1s3hraij", + spinand_id(spinand_readid_method_opcode_dummy, 0xdb), + nand_memorg(1, 2048, 128, 64, 2048, 40, 1, 1, 1), + nand_eccreq(8, 512), + spinand_info_op_variants(&read_cache_variants, + &write_cache_x4_variants, + &update_cache_x4_variants), + spinand_has_qe_bit, + spinand_eccinfo(&tx58cxgxsxraix_ooblayout, + tx58cxgxsxraix_ecc_get_status)), + /* 1.8v 4gb (2nd generation) */ + spinand_info("tc58cyg2s0hraij", + spinand_id(spinand_readid_method_opcode_dummy, 0xdd), + nand_memorg(1, 4096, 256, 64, 2048, 40, 1, 1, 1), + nand_eccreq(8, 512), + spinand_info_op_variants(&read_cache_variants, + &write_cache_x4_variants, + &update_cache_x4_variants), + spinand_has_qe_bit, + spinand_eccinfo(&tx58cxgxsxraix_ooblayout, + tx58cxgxsxraix_ecc_get_status)), + /* 1.8v 8gb (2nd generation) */ + spinand_info("th58cyg3s0hraij", + spinand_id(spinand_readid_method_opcode_dummy, 0xd4), + nand_memorg(1, 4096, 256, 64, 4096, 80, 1, 1, 1), + nand_eccreq(8, 512), + spinand_info_op_variants(&read_cache_variants, + &write_cache_x4_variants, + &update_cache_x4_variants), + spinand_has_qe_bit, + spinand_eccinfo(&tx58cxgxsxraix_ooblayout, + tx58cxgxsxraix_ecc_get_status)),
|
Memory Technology Devices (MTD)
|
798fcdd010006e87b3154d6454c657af7b033002
|
yoshio furuyama frieder schrempf frieder schrempf kontron de
|
drivers
|
mtd
|
nand, spi
|
iio: adc: ad7124: add 3db filter
|
this patch adds the low_pass_filter_3db_frequency attribute in iio_chan_spec for each channel. the used filters are sinc3 or sinc4. the filter type with the highest output data rate is used when setting a low pass frequency in the channel's sysfs.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add 3db filter
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['adc', 'ad7124']
|
['c']
| 1
| 68
| 1
|
--- diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c --- a/drivers/iio/adc/ad7124.c +++ b/drivers/iio/adc/ad7124.c +#define ad7124_filter_type_msk genmask(23, 21) +#define ad7124_filter_type_sel(x) field_prep(ad7124_filter_type_msk, x) + +#define ad7124_sinc3_filter 2 +#define ad7124_sinc4_filter 0 + unsigned int filter_type; - bit(iio_chan_info_samp_freq), + bit(iio_chan_info_samp_freq) | + bit(iio_chan_info_low_pass_filter_3db_frequency), +static int ad7124_get_3db_filter_freq(struct ad7124_state *st, + unsigned int channel) +{ + unsigned int fadc; + + fadc = st->channel_config[channel].odr; + + switch (st->channel_config[channel].filter_type) { + case ad7124_sinc3_filter: + return div_round_closest(fadc * 230, 1000); + case ad7124_sinc4_filter: + return div_round_closest(fadc * 262, 1000); + default: + return -einval; + } +} + +static int ad7124_set_3db_filter_freq(struct ad7124_state *st, + unsigned int channel, + unsigned int freq) +{ + unsigned int sinc4_3db_odr; + unsigned int sinc3_3db_odr; + unsigned int new_filter; + unsigned int new_odr; + + sinc4_3db_odr = div_round_closest(freq * 1000, 230); + sinc3_3db_odr = div_round_closest(freq * 1000, 262); + + if (sinc4_3db_odr > sinc3_3db_odr) { + new_filter = ad7124_sinc3_filter; + new_odr = sinc4_3db_odr; + } else { + new_filter = ad7124_sinc4_filter; + new_odr = sinc3_3db_odr; + } + + if (st->channel_config[channel].filter_type != new_filter) { + int ret; + + st->channel_config[channel].filter_type = new_filter; + ret = ad7124_spi_write_mask(st, ad7124_filter(channel), + ad7124_filter_type_msk, + ad7124_filter_type_sel(new_filter), + 3); + if (ret < 0) + return ret; + } + + return ad7124_set_channel_odr(st, channel, new_odr); +} + + return iio_val_int; + case iio_chan_info_low_pass_filter_3db_frequency: + *val = ad7124_get_3db_filter_freq(st, chan->scan_index); + case iio_chan_info_low_pass_filter_3db_frequency: + if (val2 != 0) + return -einval; + + return ad7124_set_3db_filter_freq(st, chan->address, val);
|
Industrial I/O (iio)
|
cef2760954cf4f8228d14af9bd0b77a021979278
|
alexandru tachici
|
drivers
|
iio
|
adc
|
iio: adc: rn5t618: add adc driver for rn5t618/rc5t619
|
both chips have an a/d converter capable of measuring things like vbat, vusb and analog inputs.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add adc driver for rn5t618/rc5t619
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['adc', 'rn5t618']
|
['kconfig', 'c', 'makefile']
| 3
| 267
| 0
|
--- diff --git a/drivers/iio/adc/kconfig b/drivers/iio/adc/kconfig --- a/drivers/iio/adc/kconfig +++ b/drivers/iio/adc/kconfig +config rn5t618_adc + tristate "adc for the rn5t618/rc5t619 family of chips" + depends on mfd_rn5t618 + help + say yes here to build support for the integrated adc inside the + rn5t618/619 series pmics: + + this driver can also be built as a module. if so, the module + will be called rn5t618-adc. + diff --git a/drivers/iio/adc/makefile b/drivers/iio/adc/makefile --- a/drivers/iio/adc/makefile +++ b/drivers/iio/adc/makefile +obj-$(config_rn5t618_adc) += rn5t618-adc.o diff --git a/drivers/iio/adc/rn5t618-adc.c b/drivers/iio/adc/rn5t618-adc.c --- /dev/null +++ b/drivers/iio/adc/rn5t618-adc.c +// spdx-license-identifier: gpl-2.0+ +/* + * adc driver for the ricoh rn5t618 power management chip family + * + * copyright (c) 2019 andreas kemnade + */ + +#include <linux/kernel.h> +#include <linux/device.h> +#include <linux/errno.h> +#include <linux/interrupt.h> +#include <linux/init.h> +#include <linux/module.h> +#include <linux/mfd/rn5t618.h> +#include <linux/platform_device.h> +#include <linux/completion.h> +#include <linux/regmap.h> +#include <linux/iio/iio.h> +#include <linux/slab.h> + +#define rn5t618_adc_conversion_timeout (msecs_to_jiffies(500)) +#define rn5t618_reference_volt 2500 + +/* mask for selecting channels for single conversion */ +#define rn5t618_adccnt3_channel_mask 0x7 +/* average 4-time conversion mode */ +#define rn5t618_adccnt3_avg bit(3) +/* set for starting a single conversion, gets cleared by hw when done */ +#define rn5t618_adccnt3_godone bit(4) +/* automatic conversion, period is in adccnt2, selected channels are + * in adccnt1 + */ +#define rn5t618_adccnt3_auto bit(5) +#define rn5t618_adcend_irq bit(0) + +struct rn5t618_adc_data { + struct device *dev; + struct rn5t618 *rn5t618; + struct completion conv_completion; + int irq; +}; + +struct rn5t618_channel_ratios { + u16 numerator; + u16 denominator; +}; + +enum rn5t618_channels { + limmon = 0, + vbat, + vadp, + vusb, + vsys, + vthm, + ain1, + ain0 +}; + +static const struct rn5t618_channel_ratios rn5t618_ratios[8] = { + [limmon] = {50, 32}, /* measured across 20mohm, amplified by 32 */ + [vbat] = {2, 1}, + [vadp] = {3, 1}, + [vusb] = {3, 1}, + [vsys] = {3, 1}, + [vthm] = {1, 1}, + [ain1] = {1, 1}, + [ain0] = {1, 1}, +}; + +static int rn5t618_read_adc_reg(struct rn5t618 *rn5t618, int reg, u16 *val) +{ + u8 data[2]; + int ret; + + ret = regmap_bulk_read(rn5t618->regmap, reg, data, sizeof(data)); + if (ret < 0) + return ret; + + *val = (data[0] << 4) | (data[1] & 0xf); + + return 0; +} + +static irqreturn_t rn5t618_adc_irq(int irq, void *data) +{ + struct rn5t618_adc_data *adc = data; + unsigned int r = 0; + int ret; + + /* clear low & high threshold irqs */ + regmap_write(adc->rn5t618->regmap, rn5t618_ir_adc1, 0); + regmap_write(adc->rn5t618->regmap, rn5t618_ir_adc2, 0); + + ret = regmap_read(adc->rn5t618->regmap, rn5t618_ir_adc3, &r); + if (ret < 0) + dev_err(adc->dev, "failed to read irq status: %d ", ret); + + regmap_write(adc->rn5t618->regmap, rn5t618_ir_adc3, 0); + + if (r & rn5t618_adcend_irq) + complete(&adc->conv_completion); + + return irq_handled; +} + +static int rn5t618_adc_read(struct iio_dev *iio_dev, + const struct iio_chan_spec *chan, + int *val, int *val2, long mask) +{ + struct rn5t618_adc_data *adc = iio_priv(iio_dev); + u16 raw; + int ret; + + if (mask == iio_chan_info_scale) { + *val = rn5t618_reference_volt * + rn5t618_ratios[chan->channel].numerator; + *val2 = rn5t618_ratios[chan->channel].denominator * 4095; + + return iio_val_fractional; + } + + /* select channel */ + ret = regmap_update_bits(adc->rn5t618->regmap, rn5t618_adccnt3, + rn5t618_adccnt3_channel_mask, + chan->channel); + if (ret < 0) + return ret; + + ret = regmap_write(adc->rn5t618->regmap, rn5t618_en_adcir3, + rn5t618_adcend_irq); + if (ret < 0) + return ret; + + ret = regmap_update_bits(adc->rn5t618->regmap, rn5t618_adccnt3, + rn5t618_adccnt3_avg, + mask == iio_chan_info_average_raw ? + rn5t618_adccnt3_avg : 0); + if (ret < 0) + return ret; + + init_completion(&adc->conv_completion); + /* single conversion */ + ret = regmap_update_bits(adc->rn5t618->regmap, rn5t618_adccnt3, + rn5t618_adccnt3_godone, + rn5t618_adccnt3_godone); + if (ret < 0) + return ret; + + ret = wait_for_completion_timeout(&adc->conv_completion, + rn5t618_adc_conversion_timeout); + if (ret == 0) { + dev_warn(adc->dev, "timeout waiting for adc result "); + return -etimedout; + } + + ret = rn5t618_read_adc_reg(adc->rn5t618, + rn5t618_ilimdatah + 2 * chan->channel, + &raw); + if (ret < 0) + return ret; + + *val = raw; + + return iio_val_int; +} + +static const struct iio_info rn5t618_adc_iio_info = { + .read_raw = &rn5t618_adc_read, +}; + +#define rn5t618_adc_channel(_channel, _type, _name) { \ + .type = _type, \ + .channel = _channel, \ + .info_mask_separate = bit(iio_chan_info_raw) | \ + bit(iio_chan_info_average_raw) | \ + bit(iio_chan_info_scale), \ + .datasheet_name = _name, \ + .indexed = 1. \ +} + +static const struct iio_chan_spec rn5t618_adc_iio_channels[] = { + rn5t618_adc_channel(limmon, iio_current, "limmon"), + rn5t618_adc_channel(vbat, iio_voltage, "vbat"), + rn5t618_adc_channel(vadp, iio_voltage, "vadp"), + rn5t618_adc_channel(vusb, iio_voltage, "vusb"), + rn5t618_adc_channel(vsys, iio_voltage, "vsys"), + rn5t618_adc_channel(vthm, iio_voltage, "vthm"), + rn5t618_adc_channel(ain1, iio_voltage, "ain1"), + rn5t618_adc_channel(ain0, iio_voltage, "ain0") +}; + +static int rn5t618_adc_probe(struct platform_device *pdev) +{ + int ret; + struct iio_dev *iio_dev; + struct rn5t618_adc_data *adc; + struct rn5t618 *rn5t618 = dev_get_drvdata(pdev->dev.parent); + + iio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*adc)); + if (!iio_dev) { + dev_err(&pdev->dev, "failed allocating iio device "); + return -enomem; + } + + adc = iio_priv(iio_dev); + adc->dev = &pdev->dev; + adc->rn5t618 = rn5t618; + + if (rn5t618->irq_data) + adc->irq = regmap_irq_get_virq(rn5t618->irq_data, + rn5t618_irq_adc); + + if (adc->irq <= 0) { + dev_err(&pdev->dev, "get virq failed "); + return -einval; + } + + init_completion(&adc->conv_completion); + + iio_dev->name = dev_name(&pdev->dev); + iio_dev->dev.parent = &pdev->dev; + iio_dev->info = &rn5t618_adc_iio_info; + iio_dev->modes = indio_direct_mode; + iio_dev->channels = rn5t618_adc_iio_channels; + iio_dev->num_channels = array_size(rn5t618_adc_iio_channels); + + /* stop any auto-conversion */ + ret = regmap_write(rn5t618->regmap, rn5t618_adccnt3, 0); + if (ret < 0) + return ret; + + platform_set_drvdata(pdev, iio_dev); + + ret = devm_request_threaded_irq(adc->dev, adc->irq, null, + rn5t618_adc_irq, + irqf_oneshot, dev_name(adc->dev), + adc); + if (ret < 0) { + dev_err(adc->dev, "request irq %d failed: %d ", adc->irq, ret); + return ret; + } + + return devm_iio_device_register(adc->dev, iio_dev); +} + +static struct platform_driver rn5t618_adc_driver = { + .driver = { + .name = "rn5t618-adc", + }, + .probe = rn5t618_adc_probe, +}; + +module_platform_driver(rn5t618_adc_driver); +module_alias("platform:rn5t618-adc"); +module_description("ricoh rn5t618 adc driver"); +module_license("gpl");
|
Industrial I/O (iio)
|
87a25333c8c3ba6694f8230a649e162d6efb181a
|
andreas kemnade jonathan cameron jonathan cameron huawei com
|
drivers
|
iio
|
adc
|
iio: amplifiers: ad8366: add support for hmc1119 attenuator
|
this change adds support for the hmc1119 silicon digial attenuator. the hmc1119 is a broadband, highly accurate, 7-bit digital attenuator, operating from 0.1 ghz to 6.0 ghz with 31.5 db attenuation control range in 0.25 db steps.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add support for hmc1119 attenuator
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['amplifiers', 'ad8366']
|
['c']
| 1
| 17
| 0
|
--- diff --git a/drivers/iio/amplifiers/ad8366.c b/drivers/iio/amplifiers/ad8366.c --- a/drivers/iio/amplifiers/ad8366.c +++ b/drivers/iio/amplifiers/ad8366.c + * hmc1119 0.25 db lsb, 7-bit, silicon digital attenuator + id_hmc1119, + [id_hmc1119] = { + .gain_min = -31750, + .gain_max = 0, + }, + case id_hmc1119: + st->data[0] = ch_a; + break; + case id_hmc1119: + gain = -1 * code * 250; + break; + case id_hmc1119: + code = (abs(gain) / 250) & 0x7f; + break; + case id_hmc1119: + {"hmc1119", id_hmc1119},
|
Industrial I/O (iio)
|
cc74a38d85fe295468e73452ca892e6d760dc33e
|
sergiu cuciurean
|
drivers
|
iio
|
amplifiers
|
iio: amplifiers: hmc425a: add support for hmc425a attenuator
|
this patch adds support for the hmc425a 0.5 db lsb gaas mmic 6-bit digital positive control attenuator, 2.2 - 8.0 ghz.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add support for hmc425a attenuator
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['amplifiers', 'hmc425a']
|
['kconfig', 'c', 'makefile']
| 3
| 259
| 0
|
--- diff --git a/drivers/iio/amplifiers/kconfig b/drivers/iio/amplifiers/kconfig --- a/drivers/iio/amplifiers/kconfig +++ b/drivers/iio/amplifiers/kconfig +config hmc425 + tristate "analog devices hmc425a and similar gpio gain amplifiers" + depends on gpiolib + help + say yes here to build support for analog devices hmc425a and similar + gain amplifiers or step attenuators. + + to compile this driver as a module, choose m here: the + module will be called hmc425a. + diff --git a/drivers/iio/amplifiers/makefile b/drivers/iio/amplifiers/makefile --- a/drivers/iio/amplifiers/makefile +++ b/drivers/iio/amplifiers/makefile +obj-$(config_hmc425) += hmc425a.o diff --git a/drivers/iio/amplifiers/hmc425a.c b/drivers/iio/amplifiers/hmc425a.c --- /dev/null +++ b/drivers/iio/amplifiers/hmc425a.c +// spdx-license-identifier: gpl-2.0 +/* + * hmc425a and similar gain amplifiers + * + * copyright 2020 analog devices inc. + */ + +#include <linux/device.h> +#include <linux/err.h> +#include <linux/gpio/consumer.h> +#include <linux/iio/iio.h> +#include <linux/iio/sysfs.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/of_device.h> +#include <linux/of_platform.h> +#include <linux/platform_device.h> +#include <linux/slab.h> +#include <linux/regulator/consumer.h> +#include <linux/sysfs.h> + +enum hmc425a_type { + id_hmc425a, +}; + +struct hmc425a_chip_info { + const char *name; + const struct iio_chan_spec *channels; + unsigned int num_channels; + unsigned int num_gpios; + int gain_min; + int gain_max; + int default_gain; +}; + +struct hmc425a_state { + struct regulator *reg; + struct mutex lock; /* protect sensor state */ + struct hmc425a_chip_info *chip_info; + struct gpio_descs *gpios; + enum hmc425a_type type; + u32 gain; +}; + +static int hmc425a_write(struct iio_dev *indio_dev, u32 value) +{ + struct hmc425a_state *st = iio_priv(indio_dev); + declare_bitmap(values, bits_per_type(value)); + + values[0] = value; + + gpiod_set_array_value_cansleep(st->gpios->ndescs, st->gpios->desc, + null, values); + return 0; +} + +static int hmc425a_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, int *val, + int *val2, long m) +{ + struct hmc425a_state *st = iio_priv(indio_dev); + int code, gain = 0; + int ret; + + mutex_lock(&st->lock); + switch (m) { + case iio_chan_info_hardwaregain: + code = st->gain; + + switch (st->type) { + case id_hmc425a: + gain = ~code * -500; + break; + } + + *val = gain / 1000; + *val2 = (gain % 1000) * 1000; + + ret = iio_val_int_plus_micro_db; + break; + default: + ret = -einval; + } + mutex_unlock(&st->lock); + + return ret; +}; + +static int hmc425a_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, int val, + int val2, long mask) +{ + struct hmc425a_state *st = iio_priv(indio_dev); + struct hmc425a_chip_info *inf = st->chip_info; + int code = 0, gain; + int ret; + + if (val < 0) + gain = (val * 1000) - (val2 / 1000); + else + gain = (val * 1000) + (val2 / 1000); + + if (gain > inf->gain_max || gain < inf->gain_min) + return -einval; + + switch (st->type) { + case id_hmc425a: + code = ~((abs(gain) / 500) & 0x3f); + break; + } + + mutex_lock(&st->lock); + switch (mask) { + case iio_chan_info_hardwaregain: + st->gain = code; + + ret = hmc425a_write(indio_dev, st->gain); + break; + default: + ret = -einval; + } + mutex_unlock(&st->lock); + + return ret; +} + +static int hmc425a_write_raw_get_fmt(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + long mask) +{ + switch (mask) { + case iio_chan_info_hardwaregain: + return iio_val_int_plus_micro_db; + default: + return -einval; + } +} + +static const struct iio_info hmc425a_info = { + .read_raw = &hmc425a_read_raw, + .write_raw = &hmc425a_write_raw, + .write_raw_get_fmt = &hmc425a_write_raw_get_fmt, +}; + +#define hmc425a_chan(_channel) \ +{ \ + .type = iio_voltage, \ + .output = 1, \ + .indexed = 1, \ + .channel = _channel, \ + .info_mask_separate = bit(iio_chan_info_hardwaregain), \ +} + +static const struct iio_chan_spec hmc425a_channels[] = { + hmc425a_chan(0), +}; + +/* match table for of_platform binding */ +static const struct of_device_id hmc425a_of_match[] = { + { .compatible = "adi,hmc425a", .data = (void *)id_hmc425a }, + {}, +}; +module_device_table(of, hmc425a_of_match); + +static void hmc425a_reg_disable(void *data) +{ + struct hmc425a_state *st = data; + + regulator_disable(st->reg); +} + +static struct hmc425a_chip_info hmc425a_chip_info_tbl[] = { + [id_hmc425a] = { + .name = "hmc425a", + .channels = hmc425a_channels, + .num_channels = array_size(hmc425a_channels), + .num_gpios = 6, + .gain_min = -31500, + .gain_max = 0, + .default_gain = -0x40, /* set default gain -31.5db*/ + }, +}; + +static int hmc425a_probe(struct platform_device *pdev) +{ + struct iio_dev *indio_dev; + struct hmc425a_state *st; + int ret; + + indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*st)); + if (!indio_dev) + return -enomem; + + st = iio_priv(indio_dev); + st->type = (enum hmc425a_type)of_device_get_match_data(&pdev->dev); + + st->chip_info = &hmc425a_chip_info_tbl[st->type]; + indio_dev->num_channels = st->chip_info->num_channels; + indio_dev->channels = st->chip_info->channels; + indio_dev->name = st->chip_info->name; + st->gain = st->chip_info->default_gain; + + st->gpios = devm_gpiod_get_array(&pdev->dev, "ctrl", gpiod_out_low); + if (is_err(st->gpios)) { + ret = ptr_err(st->gpios); + if (ret != -eprobe_defer) + dev_err(&pdev->dev, "failed to get gpios "); + return ret; + } + + if (st->gpios->ndescs != st->chip_info->num_gpios) { + dev_err(&pdev->dev, "%d gpios needed to operate ", + st->chip_info->num_gpios); + return -enodev; + } + + st->reg = devm_regulator_get(&pdev->dev, "vcc-supply"); + if (is_err(st->reg)) + return ptr_err(st->reg); + + ret = regulator_enable(st->reg); + if (ret) + return ret; + ret = devm_add_action_or_reset(&pdev->dev, hmc425a_reg_disable, st); + if (ret) + return ret; + + mutex_init(&st->lock); + + indio_dev->dev.parent = &pdev->dev; + indio_dev->info = &hmc425a_info; + indio_dev->modes = indio_direct_mode; + + return devm_iio_device_register(&pdev->dev, indio_dev); +} + +static struct platform_driver hmc425a_driver = { + .driver = { + .name = kbuild_modname, + .of_match_table = hmc425a_of_match, + }, + .probe = hmc425a_probe, +}; +module_platform_driver(hmc425a_driver); + +module_author("michael hennerich <michael.hennerich@analog.com>"); +module_description("analog devices hmc425a and similar gpio control gain amplifiers"); +module_license("gpl v2");
|
Industrial I/O (iio)
|
a76838dfc7b7ea1f06de51fbe8e653eb34f65c94
|
michael hennerich
|
drivers
|
iio
|
amplifiers
|
iio: chemical: atlas-sensor: add do-sm module support
|
atlas scientific do-sm oem sensor reads disolved oxygen in a solution. this is reported back as mg/l which maps directly to ppm and so the iio_concentration channel type can be used.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add do-sm module support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['chemical', 'atlas-sensor']
|
['c']
| 1
| 60
| 4
|
--- diff --git a/drivers/iio/chemical/atlas-sensor.c b/drivers/iio/chemical/atlas-sensor.c --- a/drivers/iio/chemical/atlas-sensor.c +++ b/drivers/iio/chemical/atlas-sensor.c +#define atlas_reg_do_calib_status 0x09 +#define atlas_reg_do_calib_status_mask 0x03 +#define atlas_reg_do_calib_status_pressure bit(0) +#define atlas_reg_do_calib_status_do bit(1) + +#define atlas_reg_do_temp_data 0x12 +#define atlas_reg_do_data 0x22 + +#define atlas_do_int_time_in_ms 450 + atlas_do_sm, -#define atlas_ec_channel(_idx, _addr) \ +#define atlas_concentration_channel(_idx, _addr) \ - atlas_ec_channel(0, atlas_reg_tds_data), - atlas_ec_channel(1, atlas_reg_pss_data), + atlas_concentration_channel(0, atlas_reg_tds_data), + atlas_concentration_channel(1, atlas_reg_pss_data), +static const struct iio_chan_spec atlas_do_channels[] = { + atlas_concentration_channel(0, atlas_reg_do_data), + iio_chan_soft_timestamp(1), + { + .type = iio_temp, + .address = atlas_reg_do_temp_data, + .info_mask_separate = + bit(iio_chan_info_raw) | bit(iio_chan_info_scale), + .output = 1, + .scan_index = -1 + }, +}; + -}; +} + +static int atlas_check_do_calibration(struct atlas_data *data) +{ + struct device *dev = &data->client->dev; + int ret; + unsigned int val; + + ret = regmap_read(data->regmap, atlas_reg_do_calib_status, &val); + if (ret) + return ret; + + if (!(val & atlas_reg_do_calib_status_mask)) { + dev_warn(dev, "device has not been calibrated "); + return 0; + } + + if (!(val & atlas_reg_do_calib_status_pressure)) + dev_warn(dev, "device missing atmospheric pressure calibration "); + + if (!(val & atlas_reg_do_calib_status_do)) + dev_warn(dev, "device missing dissolved oxygen calibration "); + + return 0; +} + [atlas_do_sm] = { + .channels = atlas_do_channels, + .num_channels = 3, + .data_reg = atlas_reg_do_data, + .calibration = &atlas_check_do_calibration, + .delay = atlas_do_int_time_in_ms, + }, + { "atlas-do-sm", atlas_do_sm}, + { .compatible = "atlas,do-sm", .data = (void *)atlas_do_sm, },
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Industrial I/O (iio)
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a751b8e48018263d7aa5021c67b2e03a683ae1df
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matt ranostay
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drivers
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iio
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chemical
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iio: dac: ad5770r: add ad5770r support
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the ad5770r is a 6-channel, 14-bit resolution, low noise, programmable current output digital-to-analog converter (dac) for photonics control applications.
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this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
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add ad5770r support
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['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
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['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
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['dac', 'ad5770r']
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['kconfig', 'c', 'makefile']
| 3
| 706
| 0
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--- diff --git a/drivers/iio/dac/kconfig b/drivers/iio/dac/kconfig --- a/drivers/iio/dac/kconfig +++ b/drivers/iio/dac/kconfig +config ad5770r + tristate "analog devices ad5770r idac driver" + depends on spi_master + help + say yes here to build support for analog devices ad5770r digital to + analog converter. + + to compile this driver as a module, choose m here: the + module will be called ad5770r. + diff --git a/drivers/iio/dac/makefile b/drivers/iio/dac/makefile --- a/drivers/iio/dac/makefile +++ b/drivers/iio/dac/makefile +obj-$(config_ad5770r) += ad5770r.o diff --git a/drivers/iio/dac/ad5770r.c b/drivers/iio/dac/ad5770r.c --- /dev/null +++ b/drivers/iio/dac/ad5770r.c +// spdx-license-identifier: gpl-2.0+ +/* + * ad5770r digital to analog converters driver + * + * copyright 2018 analog devices inc. + */ + +#include <linux/bits.h> +#include <linux/delay.h> +#include <linux/device.h> +#include <linux/gpio/consumer.h> +#include <linux/iio/iio.h> +#include <linux/iio/sysfs.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/property.h> +#include <linux/regmap.h> +#include <linux/regulator/consumer.h> +#include <linux/spi/spi.h> + +#define adi_spi_if_config_a 0x00 +#define adi_spi_if_config_b 0x01 +#define adi_spi_if_device_config 0x02 +#define adi_spi_if_chip_type 0x03 +#define adi_spi_if_product_id_l 0x04 +#define adi_spi_if_product_id_h 0x05 +#define adi_spi_if_chip_grade 0x06 +#define adi_spi_if_scracth_pad 0x0a +#define adi_spi_if_spi_revision 0x0b +#define adi_spi_if_spi_vendor_l 0x0c +#define adi_spi_if_spi_vendor_h 0x0d +#define adi_spi_if_spi_stream_mode 0x0e +#define adi_spi_if_config_c 0x10 +#define adi_spi_if_status_a 0x11 + +/* adi_spi_if_config_a */ +#define adi_spi_if_sw_reset_msk (bit(0) | bit(7)) +#define adi_spi_if_sw_reset_sel(x) ((x) & adi_spi_if_sw_reset_msk) +#define adi_spi_if_addr_asc_msk (bit(2) | bit(5)) +#define adi_spi_if_addr_asc_sel(x) (((x) << 2) & adi_spi_if_addr_asc_msk) + +/* adi_spi_if_config_b */ +#define adi_spi_if_single_ins_msk bit(7) +#define adi_spi_if_single_ins_sel(x) field_prep(adi_spi_if_single_ins_msk, x) +#define adi_spi_if_short_ins_msk bit(7) +#define adi_spi_if_short_ins_sel(x) field_prep(adi_spi_if_single_ins_msk, x) + +/* adi_spi_if_config_c */ +#define adi_spi_if_strict_reg_msk bit(5) +#define adi_spi_if_strict_reg_get(x) field_get(adi_spi_if_strict_reg_msk, x) + +/* ad5770r configuration registers */ +#define ad5770r_channel_config 0x14 +#define ad5770r_output_range(ch) (0x15 + (ch)) +#define ad5770r_filter_resistor(ch) (0x1d + (ch)) +#define ad5770r_reference 0x1b +#define ad5770r_dac_lsb(ch) (0x26 + 2 * (ch)) +#define ad5770r_dac_msb(ch) (0x27 + 2 * (ch)) +#define ad5770r_ch_select 0x34 +#define ad5770r_ch_enable 0x44 + +/* ad5770r_channel_config */ +#define ad5770r_cfg_ch0_sink_en(x) (((x) & 0x1) << 7) +#define ad5770r_cfg_shutdown_b(x, ch) (((x) & 0x1) << (ch)) + +/* ad5770r_output_range */ +#define ad5770r_range_output_scaling(x) (((x) & genmask(5, 0)) << 2) +#define ad5770r_range_mode(x) ((x) & genmask(1, 0)) + +/* ad5770r_reference */ +#define ad5770r_ref_resistor_sel(x) (((x) & 0x1) << 2) +#define ad5770r_ref_sel(x) ((x) & genmask(1, 0)) + +/* ad5770r_ch_enable */ +#define ad5770r_ch_set(x, ch) (((x) & 0x1) << (ch)) + +#define ad5770r_max_channels 6 +#define ad5770r_max_ch_modes 14 +#define ad5770r_low_vref_mv 1250 +#define ad5770r_high_vref_mv 2500 + +enum ad5770r_ch0_modes { + ad5770r_ch0_0_300 = 0, + ad5770r_ch0_neg_60_0, + ad5770r_ch0_neg_60_300 +}; + +enum ad5770r_ch1_modes { + ad5770r_ch1_0_140_low_head = 1, + ad5770r_ch1_0_140_low_noise, + ad5770r_ch1_0_250 +}; + +enum ad5770r_ch2_5_modes { + ad5770r_ch_low_range = 0, + ad5770r_ch_high_range +}; + +enum ad5770r_ref_v { + ad5770r_ext_2_5_v = 0, + ad5770r_int_1_25_v_out_on, + ad5770r_ext_1_25_v, + ad5770r_int_1_25_v_out_off +}; + +enum ad5770r_output_filter_resistor { + ad5770r_filter_60_ohm = 0x0, + ad5770r_filter_5_6_kohm = 0x5, + ad5770r_filter_11_2_kohm, + ad5770r_filter_22_2_kohm, + ad5770r_filter_44_4_kohm, + ad5770r_filter_104_kohm, +}; + +struct ad5770r_out_range { + u8 out_scale; + u8 out_range_mode; +}; + +/** + * struct ad5770r_state - driver instance specific data + * @spi: spi_device + * @regmap: regmap + * @vref_reg: fixed regulator for reference configuration + * @gpio_reset: gpio descriptor + * @output_mode: array contains channels output ranges + * @vref: reference value + * @ch_pwr_down: powerdown flags + * @internal_ref: internal reference flag + * @external_res: external 2.5k resistor flag + * @transf_buf: cache aligned buffer for spi read/write + */ +struct ad5770r_state { + struct spi_device *spi; + struct regmap *regmap; + struct regulator *vref_reg; + struct gpio_desc *gpio_reset; + struct ad5770r_out_range output_mode[ad5770r_max_channels]; + int vref; + bool ch_pwr_down[ad5770r_max_channels]; + bool internal_ref; + bool external_res; + u8 transf_buf[2] ____cacheline_aligned; +}; + +static const struct regmap_config ad5770r_spi_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .read_flag_mask = bit(7), +}; + +struct ad5770r_output_modes { + unsigned int ch; + u8 mode; + int min; + int max; +}; + +static struct ad5770r_output_modes ad5770r_rng_tbl[] = { + { 0, ad5770r_ch0_0_300, 0, 300 }, + { 0, ad5770r_ch0_neg_60_0, -60, 0 }, + { 0, ad5770r_ch0_neg_60_300, -60, 300 }, + { 1, ad5770r_ch1_0_140_low_head, 0, 140 }, + { 1, ad5770r_ch1_0_140_low_noise, 0, 140 }, + { 1, ad5770r_ch1_0_250, 0, 250 }, + { 2, ad5770r_ch_low_range, 0, 55 }, + { 2, ad5770r_ch_high_range, 0, 150 }, + { 3, ad5770r_ch_low_range, 0, 45 }, + { 3, ad5770r_ch_high_range, 0, 100 }, + { 4, ad5770r_ch_low_range, 0, 45 }, + { 4, ad5770r_ch_high_range, 0, 100 }, + { 5, ad5770r_ch_low_range, 0, 45 }, + { 5, ad5770r_ch_high_range, 0, 100 }, +}; + +static const unsigned int ad5770r_filter_freqs[] = { + 153, 357, 715, 1400, 2800, 262000, +}; + +static const unsigned int ad5770r_filter_reg_vals[] = { + ad5770r_filter_104_kohm, + ad5770r_filter_44_4_kohm, + ad5770r_filter_22_2_kohm, + ad5770r_filter_11_2_kohm, + ad5770r_filter_5_6_kohm, + ad5770r_filter_60_ohm +}; + +static int ad5770r_set_output_mode(struct ad5770r_state *st, + const struct ad5770r_out_range *out_mode, + int channel) +{ + unsigned int regval; + + regval = ad5770r_range_output_scaling(out_mode->out_scale) | + ad5770r_range_mode(out_mode->out_range_mode); + + return regmap_write(st->regmap, + ad5770r_output_range(channel), regval); +} + +static int ad5770r_set_reference(struct ad5770r_state *st) +{ + unsigned int regval; + + regval = ad5770r_ref_resistor_sel(st->external_res); + + if (st->internal_ref) { + regval |= ad5770r_ref_sel(ad5770r_int_1_25_v_out_off); + } else { + switch (st->vref) { + case ad5770r_low_vref_mv: + regval |= ad5770r_ref_sel(ad5770r_ext_1_25_v); + break; + case ad5770r_high_vref_mv: + regval |= ad5770r_ref_sel(ad5770r_ext_2_5_v); + break; + default: + regval = ad5770r_ref_sel(ad5770r_int_1_25_v_out_off); + break; + } + } + + return regmap_write(st->regmap, ad5770r_reference, regval); +} + +static int ad5770r_soft_reset(struct ad5770r_state *st) +{ + return regmap_write(st->regmap, adi_spi_if_config_a, + adi_spi_if_sw_reset_sel(1)); +} + +static int ad5770r_reset(struct ad5770r_state *st) +{ + /* perform software reset if no gpio provided */ + if (!st->gpio_reset) + return ad5770r_soft_reset(st); + + gpiod_set_value_cansleep(st->gpio_reset, 0); + usleep_range(10, 20); + gpiod_set_value_cansleep(st->gpio_reset, 1); + + /* data must not be written during reset timeframe */ + usleep_range(100, 200); + + return 0; +} + +static int ad5770r_get_range(struct ad5770r_state *st, + int ch, int *min, int *max) +{ + int i; + u8 tbl_ch, tbl_mode, out_range; + + out_range = st->output_mode[ch].out_range_mode; + + for (i = 0; i < ad5770r_max_ch_modes; i++) { + tbl_ch = ad5770r_rng_tbl[i].ch; + tbl_mode = ad5770r_rng_tbl[i].mode; + if (tbl_ch == ch && tbl_mode == out_range) { + *min = ad5770r_rng_tbl[i].min; + *max = ad5770r_rng_tbl[i].max; + return 0; + } + } + + return -einval; +} + +static int ad5770r_get_filter_freq(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, int *freq) +{ + struct ad5770r_state *st = iio_priv(indio_dev); + int ret; + unsigned int regval, i; + + ret = regmap_read(st->regmap, + ad5770r_filter_resistor(chan->channel), ®val); + if (ret < 0) + return ret; + + for (i = 0; i < array_size(ad5770r_filter_reg_vals); i++) + if (regval == ad5770r_filter_reg_vals[i]) + break; + if (i == array_size(ad5770r_filter_reg_vals)) + return -einval; + + *freq = ad5770r_filter_freqs[i]; + + return iio_val_int; +} + +static int ad5770r_set_filter_freq(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + unsigned int freq) +{ + struct ad5770r_state *st = iio_priv(indio_dev); + unsigned int regval, i; + + for (i = 0; i < array_size(ad5770r_filter_freqs); i++) + if (ad5770r_filter_freqs[i] >= freq) + break; + if (i == array_size(ad5770r_filter_freqs)) + return -einval; + + regval = ad5770r_filter_reg_vals[i]; + + return regmap_write(st->regmap, ad5770r_filter_resistor(chan->channel), + regval); +} + +static int ad5770r_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, int *val2, long info) +{ + struct ad5770r_state *st = iio_priv(indio_dev); + int max, min, ret; + u16 buf16; + + switch (info) { + case iio_chan_info_raw: + ret = regmap_bulk_read(st->regmap, + chan->address, + st->transf_buf, 2); + if (ret) + return 0; + + buf16 = st->transf_buf[0] + (st->transf_buf[1] << 8); + *val = buf16 >> 2; + return iio_val_int; + case iio_chan_info_scale: + ret = ad5770r_get_range(st, chan->channel, &min, &max); + if (ret < 0) + return ret; + *val = max - min; + /* there is no sign bit. (negative current is mapped from 0) + * (sourced/sinked) current = raw * scale + offset + * where offset in case of ch0 can be negative. + */ + *val2 = 14; + return iio_val_fractional_log2; + case iio_chan_info_low_pass_filter_3db_frequency: + return ad5770r_get_filter_freq(indio_dev, chan, val); + case iio_chan_info_offset: + ret = ad5770r_get_range(st, chan->channel, &min, &max); + if (ret < 0) + return ret; + *val = min; + return iio_val_int; + default: + return -einval; + } +} + +static int ad5770r_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int val, int val2, long info) +{ + struct ad5770r_state *st = iio_priv(indio_dev); + + switch (info) { + case iio_chan_info_raw: + st->transf_buf[0] = ((u16)val >> 6); + st->transf_buf[1] = (val & genmask(5, 0)) << 2; + return regmap_bulk_write(st->regmap, chan->address, + st->transf_buf, 2); + case iio_chan_info_low_pass_filter_3db_frequency: + return ad5770r_set_filter_freq(indio_dev, chan, val); + default: + return -einval; + } +} + +static int ad5770r_read_freq_avail(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + const int **vals, int *type, int *length, + long mask) +{ + switch (mask) { + case iio_chan_info_low_pass_filter_3db_frequency: + *type = iio_val_int; + *vals = ad5770r_filter_freqs; + *length = array_size(ad5770r_filter_freqs); + return iio_avail_list; + } + + return -einval; +} + +static int ad5770r_reg_access(struct iio_dev *indio_dev, + unsigned int reg, + unsigned int writeval, + unsigned int *readval) +{ + struct ad5770r_state *st = iio_priv(indio_dev); + + if (readval) + return regmap_read(st->regmap, reg, readval); + else + return regmap_write(st->regmap, reg, writeval); +} + +static const struct iio_info ad5770r_info = { + .read_raw = ad5770r_read_raw, + .write_raw = ad5770r_write_raw, + .read_avail = ad5770r_read_freq_avail, + .debugfs_reg_access = &ad5770r_reg_access, +}; + +static int ad5770r_store_output_range(struct ad5770r_state *st, + int min, int max, int index) +{ + int i; + + for (i = 0; i < ad5770r_max_ch_modes; i++) { + if (ad5770r_rng_tbl[i].ch != index) + continue; + if (ad5770r_rng_tbl[i].min != min || + ad5770r_rng_tbl[i].max != max) + continue; + st->output_mode[index].out_range_mode = ad5770r_rng_tbl[i].mode; + + return 0; + } + + return -einval; +} + +static ssize_t ad5770r_read_dac_powerdown(struct iio_dev *indio_dev, + uintptr_t private, + const struct iio_chan_spec *chan, + char *buf) +{ + struct ad5770r_state *st = iio_priv(indio_dev); + + return sprintf(buf, "%d ", st->ch_pwr_down[chan->channel]); +} + +static ssize_t ad5770r_write_dac_powerdown(struct iio_dev *indio_dev, + uintptr_t private, + const struct iio_chan_spec *chan, + const char *buf, size_t len) +{ + struct ad5770r_state *st = iio_priv(indio_dev); + unsigned int regval; + unsigned int mask; + bool readin; + int ret; + + ret = kstrtobool(buf, &readin); + if (ret) + return ret; + + readin = !readin; + + regval = ad5770r_cfg_shutdown_b(readin, chan->channel); + if (chan->channel == 0 && + st->output_mode[0].out_range_mode > ad5770r_ch0_0_300) { + regval |= ad5770r_cfg_ch0_sink_en(readin); + mask = bit(chan->channel) + bit(7); + } else { + mask = bit(chan->channel); + } + ret = regmap_update_bits(st->regmap, ad5770r_channel_config, mask, + regval); + if (ret) + return ret; + + regval = ad5770r_ch_set(readin, chan->channel); + ret = regmap_update_bits(st->regmap, ad5770r_ch_enable, + bit(chan->channel), regval); + if (ret) + return ret; + + st->ch_pwr_down[chan->channel] = !readin; + + return len; +} + +static const struct iio_chan_spec_ext_info ad5770r_ext_info[] = { + { + .name = "powerdown", + .read = ad5770r_read_dac_powerdown, + .write = ad5770r_write_dac_powerdown, + .shared = iio_separate, + }, + { } +}; + +#define ad5770r_idac_channel(index, reg) { \ + .type = iio_current, \ + .address = reg, \ + .indexed = 1, \ + .channel = index, \ + .output = 1, \ + .info_mask_separate = bit(iio_chan_info_raw) | \ + bit(iio_chan_info_scale) | \ + bit(iio_chan_info_offset) | \ + bit(iio_chan_info_low_pass_filter_3db_frequency), \ + .info_mask_shared_by_type_available = \ + bit(iio_chan_info_low_pass_filter_3db_frequency), \ + .ext_info = ad5770r_ext_info, \ +} + +static const struct iio_chan_spec ad5770r_channels[] = { + ad5770r_idac_channel(0, ad5770r_dac_msb(0)), + ad5770r_idac_channel(1, ad5770r_dac_msb(1)), + ad5770r_idac_channel(2, ad5770r_dac_msb(2)), + ad5770r_idac_channel(3, ad5770r_dac_msb(3)), + ad5770r_idac_channel(4, ad5770r_dac_msb(4)), + ad5770r_idac_channel(5, ad5770r_dac_msb(5)), +}; + +static int ad5770r_channel_config(struct ad5770r_state *st) +{ + int ret, tmp[2], min, max; + unsigned int num; + struct fwnode_handle *child; + + num = device_get_child_node_count(&st->spi->dev); + if (num != ad5770r_max_channels) + return -einval; + + device_for_each_child_node(&st->spi->dev, child) { + ret = fwnode_property_read_u32(child, "num", &num); + if (ret) + return ret; + if (num > ad5770r_max_channels) + return -einval; + + ret = fwnode_property_read_u32_array(child, + "adi,range-microamp", + tmp, 2); + if (ret) + return ret; + + min = tmp[0] / 1000; + max = tmp[1] / 1000; + ret = ad5770r_store_output_range(st, min, max, num); + if (ret) + return ret; + } + + return ret; +} + +static int ad5770r_init(struct ad5770r_state *st) +{ + int ret, i; + + st->gpio_reset = devm_gpiod_get_optional(&st->spi->dev, "reset", + gpiod_out_high); + if (is_err(st->gpio_reset)) + return ptr_err(st->gpio_reset); + + /* perform a reset */ + ret = ad5770r_reset(st); + if (ret) + return ret; + + /* set output range */ + ret = ad5770r_channel_config(st); + if (ret) + return ret; + + for (i = 0; i < ad5770r_max_channels; i++) { + ret = ad5770r_set_output_mode(st, &st->output_mode[i], i); + if (ret) + return ret; + } + + st->external_res = fwnode_property_read_bool(st->spi->dev.fwnode, + "adi,external-resistor"); + + ret = ad5770r_set_reference(st); + if (ret) + return ret; + + /* set outputs off */ + ret = regmap_write(st->regmap, ad5770r_channel_config, 0x00); + if (ret) + return ret; + + ret = regmap_write(st->regmap, ad5770r_ch_enable, 0x00); + if (ret) + return ret; + + for (i = 0; i < ad5770r_max_channels; i++) + st->ch_pwr_down[i] = true; + + return ret; +} + +static void ad5770r_disable_regulator(void *data) +{ + struct ad5770r_state *st = data; + + regulator_disable(st->vref_reg); +} + +static int ad5770r_probe(struct spi_device *spi) +{ + struct ad5770r_state *st; + struct iio_dev *indio_dev; + struct regmap *regmap; + int ret; + + indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); + if (!indio_dev) + return -enomem; + + st = iio_priv(indio_dev); + spi_set_drvdata(spi, indio_dev); + + st->spi = spi; + + regmap = devm_regmap_init_spi(spi, &ad5770r_spi_regmap_config); + if (is_err(regmap)) { + dev_err(&spi->dev, "error initializing spi regmap: %ld ", + ptr_err(regmap)); + return ptr_err(regmap); + } + st->regmap = regmap; + + st->vref_reg = devm_regulator_get_optional(&spi->dev, "vref"); + if (!is_err(st->vref_reg)) { + ret = regulator_enable(st->vref_reg); + if (ret) { + dev_err(&spi->dev, + "failed to enable vref regulators: %d ", ret); + return ret; + } + + ret = devm_add_action_or_reset(&spi->dev, + ad5770r_disable_regulator, + st); + if (ret < 0) + return ret; + + ret = regulator_get_voltage(st->vref_reg); + if (ret < 0) + return ret; + + st->vref = ret / 1000; + } else { + if (ptr_err(st->vref_reg) == -enodev) { + st->vref = ad5770r_low_vref_mv; + st->internal_ref = true; + } else { + return ptr_err(st->vref_reg); + } + } + + indio_dev->dev.parent = &spi->dev; + indio_dev->name = spi_get_device_id(spi)->name; + indio_dev->info = &ad5770r_info; + indio_dev->modes = indio_direct_mode; + indio_dev->channels = ad5770r_channels; + indio_dev->num_channels = array_size(ad5770r_channels); + + ret = ad5770r_init(st); + if (ret < 0) { + dev_err(&spi->dev, "ad5770r init failed "); + return ret; + } + + return devm_iio_device_register(&st->spi->dev, indio_dev); +} + +static const struct of_device_id ad5770r_of_id[] = { + { .compatible = "adi,ad5770r", }, + {}, +}; +module_device_table(of, ad5770r_of_id); + +static const struct spi_device_id ad5770r_id[] = { + { "ad5770r", 0 }, + {}, +}; +module_device_table(spi, ad5770r_id); + +static struct spi_driver ad5770r_driver = { + .driver = { + .name = kbuild_modname, + .of_match_table = ad5770r_of_id, + }, + .probe = ad5770r_probe, + .id_table = ad5770r_id, +}; + +module_spi_driver(ad5770r_driver); + +module_author("mircea caprioru <mircea.caprioru@analog.com>"); +module_description("analog devices ad5770r idac"); +module_license("gpl v2");
|
Industrial I/O (iio)
|
cbbb819837f6a2e13808d0529d14be460a7a4a07
|
alexandru tachici
|
drivers
|
iio
|
dac
|
iio: dac: ltc2632: add support for ltc2636 family
|
the only difference between ltc2632 and ltc2636 is that the former has two dac channels while the latter has eight.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add support for ltc2636 family
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['dac', 'ltc2632']
|
['kconfig', 'c']
| 2
| 77
| 5
|
--- diff --git a/drivers/iio/dac/kconfig b/drivers/iio/dac/kconfig --- a/drivers/iio/dac/kconfig +++ b/drivers/iio/dac/kconfig - tristate "linear technology ltc2632-12/10/8 dac spi driver" + tristate "linear technology ltc2632-12/10/8 and ltc2636-12/10/8 dac spi driver" - ltc2632-12, ltc2632-10, ltc2632-8 converters (dac). + ltc2632-12, ltc2632-10, ltc2632-8, ltc2636-12, ltc2636-10 and + ltc2636-8 converters (dac). diff --git a/drivers/iio/dac/ltc2632.c b/drivers/iio/dac/ltc2632.c --- a/drivers/iio/dac/ltc2632.c +++ b/drivers/iio/dac/ltc2632.c -#define ltc2632_dac_channels 2 - + const size_t num_channels; + id_ltc2636l12, + id_ltc2636l10, + id_ltc2636l8, + id_ltc2636h12, + id_ltc2636h10, + id_ltc2636h8, + ltc2632_channel(2, _bits), \ + ltc2632_channel(3, _bits), \ + ltc2632_channel(4, _bits), \ + ltc2632_channel(5, _bits), \ + ltc2632_channel(6, _bits), \ + ltc2632_channel(7, _bits), \ + .num_channels = 2, + .num_channels = 2, + .num_channels = 2, + .num_channels = 2, + .num_channels = 2, + .num_channels = 2, + .vref_mv = 4096, + }, + [id_ltc2636l12] = { + .channels = ltc2632x12_channels, + .num_channels = 8, + .vref_mv = 2500, + }, + [id_ltc2636l10] = { + .channels = ltc2632x10_channels, + .num_channels = 8, + .vref_mv = 2500, + }, + [id_ltc2636l8] = { + .channels = ltc2632x8_channels, + .num_channels = 8, + .vref_mv = 2500, + }, + [id_ltc2636h12] = { + .channels = ltc2632x12_channels, + .num_channels = 8, + .vref_mv = 4096, + }, + [id_ltc2636h10] = { + .channels = ltc2632x10_channels, + .num_channels = 8, + .vref_mv = 4096, + }, + [id_ltc2636h8] = { + .channels = ltc2632x8_channels, + .num_channels = 8, - indio_dev->num_channels = ltc2632_dac_channels; + indio_dev->num_channels = chip_info->num_channels; + { "ltc2636-l12", (kernel_ulong_t)<c2632_chip_info_tbl[id_ltc2636l12] }, + { "ltc2636-l10", (kernel_ulong_t)<c2632_chip_info_tbl[id_ltc2636l10] }, + { "ltc2636-l8", (kernel_ulong_t)<c2632_chip_info_tbl[id_ltc2636l8] }, + { "ltc2636-h12", (kernel_ulong_t)<c2632_chip_info_tbl[id_ltc2636h12] }, + { "ltc2636-h10", (kernel_ulong_t)<c2632_chip_info_tbl[id_ltc2636h10] }, + { "ltc2636-h8", (kernel_ulong_t)<c2632_chip_info_tbl[id_ltc2636h8] }, + }, { + .compatible = "lltc,ltc2636-l12", + .data = <c2632_chip_info_tbl[id_ltc2636l12] + }, { + .compatible = "lltc,ltc2636-l10", + .data = <c2632_chip_info_tbl[id_ltc2636l10] + }, { + .compatible = "lltc,ltc2636-l8", + .data = <c2632_chip_info_tbl[id_ltc2636l8] + }, { + .compatible = "lltc,ltc2636-h12", + .data = <c2632_chip_info_tbl[id_ltc2636h12] + }, { + .compatible = "lltc,ltc2636-h10", + .data = <c2632_chip_info_tbl[id_ltc2636h10] + }, { + .compatible = "lltc,ltc2636-h8", + .data = <c2632_chip_info_tbl[id_ltc2636h8]
|
Industrial I/O (iio)
|
9f15a4a0adc910a7bd535b755185f89c3e25b37e
|
uwe kleine k nig
|
drivers
|
iio
|
dac
|
iio: imu: adis: add support product id check in adis_initial_startup
|
each driver/chip that wants to validate it's product id, can now specify a 'prod_id_reg' and an expected 'prod_id' value. the 'prod_id' value is intentionally left 0 (uninitialized). there aren't (yet) any product ids with value 0; this enforces that both 'prod_id_reg' and 'prod_id' are specified.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add support product id check in adis_initial_startup
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['imu', 'adis']
|
['h', 'c']
| 2
| 27
| 1
|
--- diff --git a/drivers/iio/imu/adis.c b/drivers/iio/imu/adis.c --- a/drivers/iio/imu/adis.c +++ b/drivers/iio/imu/adis.c + * after the self-test operation is performed, the function will also check + * that the product id is as expected. this assumes that drivers providing + * 'prod_id_reg' will also provide the 'prod_id'. + * + uint16_t prod_id; - return adis_self_test(adis); + ret = adis_self_test(adis); + if (ret) + return ret; + + if (!adis->data->prod_id_reg) + return 0; + + ret = adis_read_reg_16(adis, adis->data->prod_id_reg, &prod_id); + if (ret) + return ret; + + if (prod_id != adis->data->prod_id) + dev_warn(&adis->spi->dev, + "device id(%u) and product id(%u) do not match.", + adis->data->prod_id, prod_id); + + return 0; diff --git a/include/linux/iio/imu/adis.h b/include/linux/iio/imu/adis.h --- a/include/linux/iio/imu/adis.h +++ b/include/linux/iio/imu/adis.h + * @prod_id_reg: register address of the prod_id register + * @prod_id: product id code that should be expected when reading @prod_id_reg + unsigned int prod_id_reg; + + unsigned int prod_id;
|
Industrial I/O (iio)
|
1fd4567026926d01a94a74d0543e324fc794aa73
|
alexandru ardelean
|
include
|
linux
|
iio, imu
|
iio: imu: inv_mpu6050: add support of iam20680
|
automotive certified imu, similar to icm20608.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add support of iam20680
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['imu', 'inv_mpu6050']
|
['h', 'kconfig', 'c']
| 5
| 23
| 2
|
--- diff --git a/drivers/iio/imu/inv_mpu6050/kconfig b/drivers/iio/imu/inv_mpu6050/kconfig --- a/drivers/iio/imu/inv_mpu6050/kconfig +++ b/drivers/iio/imu/inv_mpu6050/kconfig - mpu6500/6515/9250/9255, icm20608/20609/20689 and icm20602 + mpu6500/6515/9250/9255, icm20608/20609/20689, icm20602 and iam20680 - mpu6500/6515/9250/9255, icm20608/20609/20689 and icm20602 + mpu6500/6515/9250/9255, icm20608/20609/20689, icm20602 and iam20680 diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c b/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c + { + .whoami = inv_iam20680_whoami_value, + .name = "iam20680", + .reg = ®_set_6500, + .config = &chip_config_6050, + .fifo_size = 512, + .temp = {inv_icm20608_temp_offset, inv_icm20608_temp_scale}, + }, diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_i2c.c b/drivers/iio/imu/inv_mpu6050/inv_mpu_i2c.c --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_i2c.c +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_i2c.c + case inv_iam20680: + {"iam20680", inv_iam20680}, + { + .compatible = "invensense,iam20680", + .data = (void *)inv_iam20680 + }, diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h b/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h + inv_iam20680, +#define inv_iam20680_whoami_value 0xa9 diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_spi.c b/drivers/iio/imu/inv_mpu6050/inv_mpu_spi.c --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_spi.c +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_spi.c + {"iam20680", inv_iam20680}, + { + .compatible = "invensense,iam20680", + .data = (void *)inv_iam20680 + },
|
Industrial I/O (iio)
|
d31f74e60804cba1d7b265708b820e524e574611
|
jean baptiste maneyrol
|
drivers
|
iio
|
imu, inv_mpu6050
|
iio: imu: inv_mpu6050: add support of icm20609 & icm20689
|
they are similar to icm20608 chip.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add support of icm20609 & icm20689
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['imu', 'inv_mpu6050']
|
['h', 'kconfig', 'c']
| 5
| 53
| 8
|
--- diff --git a/drivers/iio/imu/inv_mpu6050/kconfig b/drivers/iio/imu/inv_mpu6050/kconfig --- a/drivers/iio/imu/inv_mpu6050/kconfig +++ b/drivers/iio/imu/inv_mpu6050/kconfig - mpu6500/6515/9250/9255, icm20608 and icm20602 motion tracking devices - over i2c. + mpu6500/6515/9250/9255, icm20608/20609/20689 and icm20602 + motion tracking devices over i2c. - mpu6500/6515/9250/9255, icm20608 and icm20602 motion tracking devices - over spi. + mpu6500/6515/9250/9255, icm20608/20609/20689 and icm20602 + motion tracking devices over spi. diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c b/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c + { + .whoami = inv_icm20609_whoami_value, + .name = "icm20609", + .reg = ®_set_6500, + .config = &chip_config_6050, + .fifo_size = 4 * 1024, + .temp = {inv_icm20608_temp_offset, inv_icm20608_temp_scale}, + }, + { + .whoami = inv_icm20689_whoami_value, + .name = "icm20689", + .reg = ®_set_6500, + .config = &chip_config_6050, + .fifo_size = 4 * 1024, + .temp = {inv_icm20608_temp_offset, inv_icm20608_temp_scale}, + }, + /* set accel lpf */ - result = 0; + return 0; + case inv_icm20689: + /* set fifo size to maximum value */ + val |= inv_icm20689_bits_fifo_size_max; - /* set accel lpf */ - result = regmap_write(st->map, st->reg->accel_lpf, val); - return result; + return regmap_write(st->map, st->reg->accel_lpf, val); diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_i2c.c b/drivers/iio/imu/inv_mpu6050/inv_mpu_i2c.c --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_i2c.c +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_i2c.c + case inv_icm20609: + case inv_icm20689: + {"icm20609", inv_icm20609}, + {"icm20689", inv_icm20689}, + { + .compatible = "invensense,icm20609", + .data = (void *)inv_icm20609 + }, + { + .compatible = "invensense,icm20689", + .data = (void *)inv_icm20689 + }, diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h b/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h + inv_icm20609, + inv_icm20689, +#define inv_icm20689_bits_fifo_size_max 0xc0 +#define inv_icm20609_whoami_value 0xa6 +#define inv_icm20689_whoami_value 0x98 diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_spi.c b/drivers/iio/imu/inv_mpu6050/inv_mpu_spi.c --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_spi.c +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_spi.c + {"icm20609", inv_icm20609}, + {"icm20689", inv_icm20689}, + { + .compatible = "invensense,icm20609", + .data = (void *)inv_icm20609 + }, + { + .compatible = "invensense,icm20689", + .data = (void *)inv_icm20689 + },
|
Industrial I/O (iio)
|
23db8d6959314568b243fd2bc76bee50136afa4c
|
jean baptiste maneyrol
|
drivers
|
iio
|
imu, inv_mpu6050
|
iio: imu: inv_mpu6050: add support of icm20690
|
same generation as icm20602 but different registers.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add support of icm20690
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['imu', 'inv_mpu6050']
|
['h', 'kconfig', 'c']
| 5
| 48
| 9
|
--- diff --git a/drivers/iio/imu/inv_mpu6050/kconfig b/drivers/iio/imu/inv_mpu6050/kconfig --- a/drivers/iio/imu/inv_mpu6050/kconfig +++ b/drivers/iio/imu/inv_mpu6050/kconfig - mpu6500/6515/9250/9255, icm20608/20609/20689, icm20602 and iam20680 - motion tracking devices over i2c. + mpu6500/6515/9250/9255, icm20608/20609/20689, icm20602/icm20690 and + iam20680 motion tracking devices over i2c. - mpu6500/6515/9250/9255, icm20608/20609/20689, icm20602 and iam20680 - motion tracking devices over spi. + mpu6500/6515/9250/9255, icm20608/20609/20689, icm20602/icm20690 and + iam20680 motion tracking devices over spi. diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c b/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c + { + .whoami = inv_icm20690_whoami_value, + .name = "icm20690", + .reg = ®_set_icm20602, + .config = &chip_config_6050, + .fifo_size = 1024, + .temp = {inv_icm20608_temp_offset, inv_icm20608_temp_scale}, + }, +static int inv_mpu6050_set_gyro_fsr(struct inv_mpu6050_state *st, + enum inv_mpu6050_fsr_e val) +{ + unsigned int gyro_shift; + u8 data; + + switch (st->chip_type) { + case inv_icm20690: + gyro_shift = inv_icm20690_gyro_config_fsr_shift; + break; + default: + gyro_shift = inv_mpu6050_gyro_config_fsr_shift; + break; + } + + data = val << gyro_shift; + return regmap_write(st->map, st->reg->gyro_config, data); +} + + case inv_icm20690: - d = (inv_mpu6050_fsr_2000dps << inv_mpu6050_gyro_config_fsr_shift); - result = regmap_write(st->map, st->reg->gyro_config, d); + + result = inv_mpu6050_set_gyro_fsr(st, inv_mpu6050_fsr_2000dps); - u8 d; - d = (i << inv_mpu6050_gyro_config_fsr_shift); - result = regmap_write(st->map, st->reg->gyro_config, d); + result = inv_mpu6050_set_gyro_fsr(st, i); diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_i2c.c b/drivers/iio/imu/inv_mpu6050/inv_mpu_i2c.c --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_i2c.c +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_i2c.c + {"icm20690", inv_icm20690}, + { + .compatible = "invensense,icm20690", + .data = (void *)inv_icm20690 + }, diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h b/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h + inv_icm20690, +#define inv_icm20690_gyro_config_fsr_shift 2 +#define inv_icm20690_whoami_value 0x20 diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_spi.c b/drivers/iio/imu/inv_mpu6050/inv_mpu_spi.c --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_spi.c +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_spi.c + {"icm20690", inv_icm20690}, + { + .compatible = "invensense,icm20690", + .data = (void *)inv_icm20690 + },
|
Industrial I/O (iio)
|
8abce87d39912e57ade3c141049ffa2eea85846b
|
jean baptiste maneyrol
|
drivers
|
iio
|
imu, inv_mpu6050
|
iio: light: add a driver for sharp gp2ap002x00f
|
this driver handles two different sharp sensors that have been proposed for merging to the mainline kernel over the years, and already has a limited proximity-only driver in the input subsystem.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add a driver for sharp gp2ap002x00f
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['light']
|
['kconfig', 'maintainers', 'c', 'makefile']
| 4
| 804
| 0
|
- it has similarities with the capella cm3605 light sensor and - it is related to the gp2ap020a00f driver which is also there. --- diff --git a/maintainers b/maintainers --- a/maintainers +++ b/maintainers +sharp gp2ap002a00f/gp2ap002s00f sensor driver +m: linus walleij <linus.walleij@linaro.org> +l: linux-iio@vger.kernel.org +t: git git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio.git +s: maintained +f: drivers/iio/light/gp2ap002.c +f: documentation/devicetree/bindings/iio/light/sharp,gp2ap002.yaml + diff --git a/drivers/iio/light/kconfig b/drivers/iio/light/kconfig --- a/drivers/iio/light/kconfig +++ b/drivers/iio/light/kconfig +config gp2ap002 + tristate "sharp gp2ap002 proximity/als sensor" + depends on i2c + select regmap + help + say y here if you have a sharp gp2ap002 proximity/als combo-chip + hooked to an i2c bus. + + to compile this driver as a module, choose m here: the + module will be called gp2ap002. + diff --git a/drivers/iio/light/makefile b/drivers/iio/light/makefile --- a/drivers/iio/light/makefile +++ b/drivers/iio/light/makefile +obj-$(config_gp2ap002) += gp2ap002.o diff --git a/drivers/iio/light/gp2ap002.c b/drivers/iio/light/gp2ap002.c --- /dev/null +++ b/drivers/iio/light/gp2ap002.c +// spdx-license-identifier: gpl-2.0-only +/* + * these are the two sharp gp2ap002 variants supported by this driver: + * gp2ap002a00f ambient light and proximity sensor + * gp2ap002s00f proximity sensor + * + * copyright (c) 2020 linaro ltd. + * author: linus walleij <linus.walleij@linaro.org> + * + * based partly on the code in sony ericssons gp2ap00200f driver by + * courtney cavin and oskar andero in drivers/input/misc/gp2ap002a00f.c + * based partly on a samsung misc driver submitted by + * donggeun kim & minkyu kang in 2011: + * https://lore.kernel.org/lkml/1315556546-7445-1-git-send-email-dg77.kim@samsung.com/ + * based partly on a submission by + * jonathan bakker and pawe chmiel in january 2019: + * https://lore.kernel.org/linux-input/20190125175045.22576-1-pawel.mikolaj.chmiel@gmail.com/ + * based partly on code from the samsung gt-s7710 by <mjchen@sta.samsung.com> + * based partly on the code in lg electronics gp2ap00200f driver by + * kenobi lee <sungyoung.lee@lge.com> and eunyoung cho <ey.cho@lge.com> + */ +#include <linux/module.h> +#include <linux/i2c.h> +#include <linux/regmap.h> +#include <linux/iio/iio.h> +#include <linux/iio/sysfs.h> +#include <linux/iio/events.h> +#include <linux/iio/consumer.h> /* to get our adc channel */ +#include <linux/iio/types.h> /* to deal with our adc channel */ +#include <linux/init.h> +#include <linux/delay.h> +#include <linux/regulator/consumer.h> +#include <linux/pm_runtime.h> +#include <linux/interrupt.h> +#include <linux/bits.h> +#include <linux/math64.h> +#include <linux/pm.h> + +#define gp2ap002_prox_channel 0 +#define gp2ap002_als_channel 1 + +/* ------------------------------------------------------------------------ */ +/* address symbol data init r/w */ +/* d7 d6 d5 d4 d3 d2 d1 d0 */ +/* ------------------------------------------------------------------------ */ +/* 0 prox x x x x x x x vo h'00 r */ +/* 1 gain x x x x led0 x x x h'00 w */ +/* 2 hys hysd hysc1 hysc0 x hysf3 hysf2 hysf1 hysf0 h'00 w */ +/* 3 cycle x x cycl2 cycl1 cycl0 osc2 x x h'00 w */ +/* 4 opmod x x x asd x x vcon ssd h'00 w */ +/* 6 con x x x ocon1 ocon0 x x x h'00 w */ +/* ------------------------------------------------------------------------ */ +/* vo :proximity sensing result(0: no detection, 1: detection) */ +/* led0 :select switch for led driver's on-registence(0:2x higher, 1:normal)*/ +/* hysd/hysf :adjusts the receiver sensitivity */ +/* osc :select switch internal clocl frequency hoppling(0:effective) */ +/* cycl :determine the detection cycle(typically 8ms, up to 128x) */ +/* ssd :software shutdown function(0:shutdown, 1:operating) */ +/* vcon :vout output method control(0:normal, 1:interrupt) */ +/* asd :select switch for analog sleep function(0:ineffective, 1:effective)*/ +/* ocon :select switch for enabling/disabling vout (00:enable, 11:disable) */ + +#define gp2ap002_prox 0x00 +#define gp2ap002_gain 0x01 +#define gp2ap002_hys 0x02 +#define gp2ap002_cycle 0x03 +#define gp2ap002_opmod 0x04 +#define gp2ap002_con 0x06 + +#define gp2ap002_prox_vo_detect bit(0) + +/* setting this bit to 0 means 2x higher led resistance */ +#define gp2ap002_gain_led_normal bit(3) + +/* + * these bits adjusts the proximity sensitivity, determining characteristics + * of the detection distance and its hysteresis. + */ +#define gp2ap002_hys_hysd_shift 7 +#define gp2ap002_hys_hysd_mask bit(7) +#define gp2ap002_hys_hysc_shift 5 +#define gp2ap002_hys_hysc_mask genmask(6, 5) +#define gp2ap002_hys_hysf_shift 0 +#define gp2ap002_hys_hysf_mask genmask(3, 0) +#define gp2ap002_hys_mask (gp2ap002_hys_hysd_mask | \ + gp2ap002_hys_hysc_mask | \ + gp2ap002_hys_hysf_mask) + +/* + * these values determine the detection cycle response time + * 0: 8ms, 1: 16ms, 2: 32ms, 3: 64ms, 4: 128ms, + * 5: 256ms, 6: 512ms, 7: 1024ms + */ +#define gp2ap002_cycle_cycl_shift 3 +#define gp2ap002_cycle_cycl_mask genmask(5, 3) + +/* + * select switch for internal clock frequency hopping + * 0: effective, + * 1: ineffective + */ +#define gp2ap002_cycle_osc_effective 0 +#define gp2ap002_cycle_osc_ineffective bit(2) +#define gp2ap002_cycle_osc_mask bit(2) + +/* analog sleep effective */ +#define gp2ap002_opmod_asd bit(4) +/* enable chip */ +#define gp2ap002_opmod_ssd_operating bit(0) +/* irq mode */ +#define gp2ap002_opmod_vcon_irq bit(1) +#define gp2ap002_opmod_mask (bit(0) | bit(1) | bit(4)) + +/* + * select switch for enabling/disabling vout pin + * 0: enable + * 2: force to go low + * 3: force to go high + */ +#define gp2ap002_con_ocon_shift 3 +#define gp2ap002_con_ocon_enable (0x0 << gp2ap002_con_ocon_shift) +#define gp2ap002_con_ocon_low (0x2 << gp2ap002_con_ocon_shift) +#define gp2ap002_con_ocon_high (0x3 << gp2ap002_con_ocon_shift) +#define gp2ap002_con_ocon_mask (0x3 << gp2ap002_con_ocon_shift) + +/** + * struct gp2ap002 - gp2ap002 state + * @map: regmap pointer for the i2c regmap + * @dev: pointer to parent device + * @vdd: regulator controlling vdd + * @vio: regulator controlling vio + * @alsout: iio adc channel to convert the alsout signal + * @hys_far: hysteresis control from device tree + * @hys_close: hysteresis control from device tree + * @is_gp2ap002s00f: this is the gp2ap002f variant of the chip + * @irq: the irq line used by this device + * @enabled: we cannot read the status of the hardware so we need to + * keep track of whether the event is enabled using this state variable + */ +struct gp2ap002 { + struct regmap *map; + struct device *dev; + struct regulator *vdd; + struct regulator *vio; + struct iio_channel *alsout; + u8 hys_far; + u8 hys_close; + bool is_gp2ap002s00f; + int irq; + bool enabled; +}; + +static irqreturn_t gp2ap002_prox_irq(int irq, void *d) +{ + struct iio_dev *indio_dev = d; + struct gp2ap002 *gp2ap002 = iio_priv(indio_dev); + u64 ev; + int val; + int ret; + + ret = regmap_read(gp2ap002->map, gp2ap002_prox, &val); + if (ret) { + dev_err(gp2ap002->dev, "error reading proximity "); + goto err_retrig; + } + + if (val & gp2ap002_prox_vo_detect) { + /* close */ + dev_dbg(gp2ap002->dev, "close "); + ret = regmap_write(gp2ap002->map, gp2ap002_hys, + gp2ap002->hys_far); + if (ret) + dev_err(gp2ap002->dev, + "error setting up proximity hysteresis "); + ev = iio_unmod_event_code(iio_proximity, gp2ap002_prox_channel, + iio_ev_type_thresh, iio_ev_dir_rising); + } else { + /* far */ + dev_dbg(gp2ap002->dev, "far "); + ret = regmap_write(gp2ap002->map, gp2ap002_hys, + gp2ap002->hys_close); + if (ret) + dev_err(gp2ap002->dev, + "error setting up proximity hysteresis "); + ev = iio_unmod_event_code(iio_proximity, gp2ap002_prox_channel, + iio_ev_type_thresh, iio_ev_dir_falling); + } + iio_push_event(indio_dev, ev, iio_get_time_ns(indio_dev)); + + /* + * after changing hysteresis, we need to wait for one detection + * cycle to see if anything changed, or we will just trigger the + * previous interrupt again. a detection cycle depends on the cycle + * register, we are hard-coding ~8 ms in probe() so wait some more + * than this, 20-30 ms. + */ + usleep_range(20000, 30000); + +err_retrig: + ret = regmap_write(gp2ap002->map, gp2ap002_con, + gp2ap002_con_ocon_enable); + if (ret) + dev_err(gp2ap002->dev, "error setting up vout control "); + + return irq_handled; +} + +struct gp2ap002_illuminance { + unsigned int curr; + unsigned int lux; +}; + +/* + * this array maps current and lux. + * + * ambient light sensing range is 3 to 55000 lux. + * + * this mapping is based on the following formula. + * illuminance = 10 ^ (current / 10) + */ +static const struct gp2ap002_illuminance gp2ap002_illuminance_table[] = { + { .curr = 5, .lux = 3 }, + { .curr = 6, .lux = 4 }, + { .curr = 7, .lux = 5 }, + { .curr = 8, .lux = 6 }, + { .curr = 9, .lux = 8 }, + { .curr = 10, .lux = 10 }, + { .curr = 11, .lux = 12 }, + { .curr = 12, .lux = 16 }, + { .curr = 13, .lux = 20 }, + { .curr = 14, .lux = 25 }, + { .curr = 15, .lux = 32 }, + { .curr = 16, .lux = 40 }, + { .curr = 17, .lux = 50 }, + { .curr = 18, .lux = 63 }, + { .curr = 19, .lux = 79 }, + { .curr = 20, .lux = 100 }, + { .curr = 21, .lux = 126 }, + { .curr = 22, .lux = 158 }, + { .curr = 23, .lux = 200 }, + { .curr = 24, .lux = 251 }, + { .curr = 25, .lux = 316 }, + { .curr = 26, .lux = 398 }, + { .curr = 27, .lux = 501 }, + { .curr = 28, .lux = 631 }, + { .curr = 29, .lux = 794 }, + { .curr = 30, .lux = 1000 }, + { .curr = 31, .lux = 1259 }, + { .curr = 32, .lux = 1585 }, + { .curr = 33, .lux = 1995 }, + { .curr = 34, .lux = 2512 }, + { .curr = 35, .lux = 3162 }, + { .curr = 36, .lux = 3981 }, + { .curr = 37, .lux = 5012 }, + { .curr = 38, .lux = 6310 }, + { .curr = 39, .lux = 7943 }, + { .curr = 40, .lux = 10000 }, + { .curr = 41, .lux = 12589 }, + { .curr = 42, .lux = 15849 }, + { .curr = 43, .lux = 19953 }, + { .curr = 44, .lux = 25119 }, + { .curr = 45, .lux = 31623 }, + { .curr = 46, .lux = 39811 }, + { .curr = 47, .lux = 50119 }, +}; + +static int gp2ap002_get_lux(struct gp2ap002 *gp2ap002) +{ + const struct gp2ap002_illuminance *ill1; + const struct gp2ap002_illuminance *ill2; + int ret, res; + int i; + + ret = iio_read_channel_processed(gp2ap002->alsout, &res); + if (ret < 0) + return ret; + + dev_dbg(gp2ap002->dev, "read %d ma from adc ", res); + + ill1 = &gp2ap002_illuminance_table[0]; + if (res < ill1->curr) { + dev_dbg(gp2ap002->dev, "total darkness "); + return 0; + } + for (i = 0; i < array_size(gp2ap002_illuminance_table) - 1; i++) { + ill1 = &gp2ap002_illuminance_table[i]; + ill2 = &gp2ap002_illuminance_table[i + 1]; + + if (res > ill2->curr) + continue; + if ((res <= ill1->curr) && (res >= ill2->curr)) + break; + } + if (res > ill2->curr) { + dev_info_once(gp2ap002->dev, "max current overflow "); + return ill2->curr; + } + /* interpolate and return */ + dev_dbg(gp2ap002->dev, "interpolate index %d and %d ", i, i + 1); + /* how many steps along the curve */ + i = res - ill1->curr; /* x - x0 */ + /* linear interpolation */ + return ill1->lux + i * + ((ill2->lux - ill1->lux) / (ill2->curr - ill1->curr)); +} + +static int gp2ap002_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, int *val2, long mask) +{ + struct gp2ap002 *gp2ap002 = iio_priv(indio_dev); + int ret; + + switch (mask) { + case iio_chan_info_raw: + switch (chan->type) { + case iio_light: + ret = gp2ap002_get_lux(gp2ap002); + if (ret < 0) + return ret; + *val = ret; + return iio_val_int; + default: + return -einval; + } + default: + return -einval; + } +} + +static int gp2ap002_init(struct gp2ap002 *gp2ap002) +{ + int ret; + + /* set up the ir led resistance */ + ret = regmap_write(gp2ap002->map, gp2ap002_gain, + gp2ap002_gain_led_normal); + if (ret) { + dev_err(gp2ap002->dev, "error setting up led gain "); + return ret; + } + ret = regmap_write(gp2ap002->map, gp2ap002_hys, gp2ap002->hys_far); + if (ret) { + dev_err(gp2ap002->dev, + "error setting up proximity hysteresis "); + return ret; + } + + /* disable internal frequency hopping */ + ret = regmap_write(gp2ap002->map, gp2ap002_cycle, + gp2ap002_cycle_osc_ineffective); + if (ret) { + dev_err(gp2ap002->dev, + "error setting up internal frequency hopping "); + return ret; + } + + /* enable chip and irq, disable analog sleep */ + ret = regmap_write(gp2ap002->map, gp2ap002_opmod, + gp2ap002_opmod_ssd_operating | + gp2ap002_opmod_vcon_irq); + if (ret) { + dev_err(gp2ap002->dev, "error setting up operation mode "); + return ret; + } + + /* interrupt on vout enabled */ + ret = regmap_write(gp2ap002->map, gp2ap002_con, + gp2ap002_con_ocon_enable); + if (ret) + dev_err(gp2ap002->dev, "error setting up vout control "); + + return ret; +} + +static int gp2ap002_read_event_config(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir) +{ + struct gp2ap002 *gp2ap002 = iio_priv(indio_dev); + + /* + * we just keep track of this internally, as it is not possible to + * query the hardware. + */ + return gp2ap002->enabled; +} + +static int gp2ap002_write_event_config(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, + int state) +{ + struct gp2ap002 *gp2ap002 = iio_priv(indio_dev); + + if (state) { + /* + * this will bring the regulators up (unless they are on + * already) and reintialize the sensor by using runtime_pm + * callbacks. + */ + pm_runtime_get_sync(gp2ap002->dev); + gp2ap002->enabled = true; + } else { + pm_runtime_mark_last_busy(gp2ap002->dev); + pm_runtime_put_autosuspend(gp2ap002->dev); + gp2ap002->enabled = false; + } + + return 0; +} + +static const struct iio_info gp2ap002_info = { + .read_raw = gp2ap002_read_raw, + .read_event_config = gp2ap002_read_event_config, + .write_event_config = gp2ap002_write_event_config, +}; + +static const struct iio_event_spec gp2ap002_events[] = { + { + .type = iio_ev_type_thresh, + .dir = iio_ev_dir_either, + .mask_separate = bit(iio_ev_info_enable), + }, +}; + +static const struct iio_chan_spec gp2ap002_channels[] = { + { + .type = iio_proximity, + .event_spec = gp2ap002_events, + .num_event_specs = array_size(gp2ap002_events), + }, + { + .type = iio_light, + .info_mask_separate = bit(iio_chan_info_raw), + .channel = gp2ap002_als_channel, + }, +}; + +/* + * we need a special regmap because this hardware expects to + * write single bytes to registers but read a 16bit word on some + * variants and discard the lower 8 bits so combine + * i2c_smbus_read_word_data() with i2c_smbus_write_byte_data() + * selectively like this. + */ +static int gp2ap002_regmap_i2c_read(void *context, unsigned int reg, + unsigned int *val) +{ + struct device *dev = context; + struct i2c_client *i2c = to_i2c_client(dev); + int ret; + + ret = i2c_smbus_read_word_data(i2c, reg); + if (ret < 0) + return ret; + + *val = (ret >> 8) & 0xff; + + return 0; +} + +static int gp2ap002_regmap_i2c_write(void *context, unsigned int reg, + unsigned int val) +{ + struct device *dev = context; + struct i2c_client *i2c = to_i2c_client(dev); + + return i2c_smbus_write_byte_data(i2c, reg, val); +} + +static struct regmap_bus gp2ap002_regmap_bus = { + .reg_read = gp2ap002_regmap_i2c_read, + .reg_write = gp2ap002_regmap_i2c_write, +}; + +static int gp2ap002_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct gp2ap002 *gp2ap002; + struct iio_dev *indio_dev; + struct device *dev = &client->dev; + enum iio_chan_type ch_type; + static const struct regmap_config config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = gp2ap002_con, + }; + struct regmap *regmap; + int num_chan; + const char *compat; + u8 val; + int ret; + + indio_dev = devm_iio_device_alloc(dev, sizeof(*gp2ap002)); + if (!indio_dev) + return -enomem; + i2c_set_clientdata(client, indio_dev); + + gp2ap002 = iio_priv(indio_dev); + gp2ap002->dev = dev; + + /* + * check the device compatible like this makes it possible to use + * acpi prp0001 for registering the sensor using device tree + * properties. + */ + ret = device_property_read_string(dev, "compatible", &compat); + if (ret) { + dev_err(dev, "cannot check compatible "); + return ret; + } + gp2ap002->is_gp2ap002s00f = !strcmp(compat, "sharp,gp2ap002s00f"); + + regmap = devm_regmap_init(dev, &gp2ap002_regmap_bus, dev, &config); + if (is_err(regmap)) { + dev_err(dev, "failed to register i2c regmap %d ", + (int)ptr_err(regmap)); + return ptr_err(regmap); + } + gp2ap002->map = regmap; + + /* + * the hysteresis settings are coded into the device tree as values + * to be written into the hysteresis register. the datasheet defines + * modes "a", "b1" and "b2" with fixed values to be use but vendor + * code trees for actual devices are tweaking these values and refer to + * modes named things like "b1.5". to be able to support any devices, + * we allow passing an arbitrary hysteresis setting for "near" and + * "far". + */ + + /* check the device tree for the ir led hysteresis */ + ret = device_property_read_u8(dev, "sharp,proximity-far-hysteresis", + &val); + if (ret) { + dev_err(dev, "failed to obtain proximity far setting "); + return ret; + } + dev_dbg(dev, "proximity far setting %02x ", val); + gp2ap002->hys_far = val; + + ret = device_property_read_u8(dev, "sharp,proximity-close-hysteresis", + &val); + if (ret) { + dev_err(dev, "failed to obtain proximity close setting "); + return ret; + } + dev_dbg(dev, "proximity close setting %02x ", val); + gp2ap002->hys_close = val; + + /* the gp2ap002a00f has a light sensor too */ + if (!gp2ap002->is_gp2ap002s00f) { + gp2ap002->alsout = devm_iio_channel_get(dev, "alsout"); + if (is_err(gp2ap002->alsout)) { + if (ptr_err(gp2ap002->alsout) == -enodev) { + dev_err(dev, "no adc, deferring... "); + return -eprobe_defer; + } + dev_err(dev, "failed to get alsout adc channel "); + return ptr_err(gp2ap002->alsout); + } + ret = iio_get_channel_type(gp2ap002->alsout, &ch_type); + if (ret < 0) + return ret; + if (ch_type != iio_current) { + dev_err(dev, + "wrong type of iio channel specified for alsout "); + return -einval; + } + } + + gp2ap002->vdd = devm_regulator_get(dev, "vdd"); + if (is_err(gp2ap002->vdd)) { + dev_err(dev, "failed to get vdd regulator "); + return ptr_err(gp2ap002->vdd); + } + gp2ap002->vio = devm_regulator_get(dev, "vio"); + if (is_err(gp2ap002->vio)) { + dev_err(dev, "failed to get vio regulator "); + return ptr_err(gp2ap002->vio); + } + + /* operating voltage 2.4v .. 3.6v according to datasheet */ + ret = regulator_set_voltage(gp2ap002->vdd, 2400000, 3600000); + if (ret) { + dev_err(dev, "failed to sett vdd voltage "); + return ret; + } + + /* vio should be between 1.65v and vdd */ + ret = regulator_get_voltage(gp2ap002->vdd); + if (ret < 0) { + dev_err(dev, "failed to get vdd voltage "); + return ret; + } + ret = regulator_set_voltage(gp2ap002->vio, 1650000, ret); + if (ret) { + dev_err(dev, "failed to set vio voltage "); + return ret; + } + + ret = regulator_enable(gp2ap002->vdd); + if (ret) { + dev_err(dev, "failed to enable vdd regulator "); + return ret; + } + ret = regulator_enable(gp2ap002->vio); + if (ret) { + dev_err(dev, "failed to enable vio regulator "); + goto out_disable_vdd; + } + + msleep(20); + + /* + * initialize the device and signal to runtime pm that now we are + * definately up and using power. + */ + ret = gp2ap002_init(gp2ap002); + if (ret) { + dev_err(dev, "initialization failed "); + goto out_disable_vio; + } + pm_runtime_get_noresume(dev); + pm_runtime_set_active(dev); + pm_runtime_enable(dev); + gp2ap002->enabled = false; + + ret = devm_request_threaded_irq(dev, client->irq, null, + gp2ap002_prox_irq, irqf_oneshot, + "gp2ap002", indio_dev); + if (ret) { + dev_err(dev, "unable to request irq "); + goto out_disable_vio; + } + gp2ap002->irq = client->irq; + + /* + * as the device takes 20 ms + regulator delay to come up with a fresh + * measurement after power-on, do not shut it down unnecessarily. + * set autosuspend to a one second. + */ + pm_runtime_set_autosuspend_delay(dev, 1000); + pm_runtime_use_autosuspend(dev); + pm_runtime_put(dev); + + indio_dev->dev.parent = dev; + indio_dev->info = &gp2ap002_info; + indio_dev->name = "gp2ap002"; + indio_dev->channels = gp2ap002_channels; + /* skip light channel for the proximity-only sensor */ + num_chan = array_size(gp2ap002_channels); + if (gp2ap002->is_gp2ap002s00f) + num_chan--; + indio_dev->num_channels = num_chan; + indio_dev->modes = indio_direct_mode; + + ret = iio_device_register(indio_dev); + if (ret) + goto out_disable_pm; + dev_dbg(dev, "sharp gp2ap002 probed successfully "); + + return 0; + +out_disable_pm: + pm_runtime_put_noidle(dev); + pm_runtime_disable(dev); +out_disable_vio: + regulator_disable(gp2ap002->vio); +out_disable_vdd: + regulator_disable(gp2ap002->vdd); + return ret; +} + +static int gp2ap002_remove(struct i2c_client *client) +{ + struct iio_dev *indio_dev = i2c_get_clientdata(client); + struct gp2ap002 *gp2ap002 = iio_priv(indio_dev); + struct device *dev = &client->dev; + + pm_runtime_get_sync(dev); + pm_runtime_put_noidle(dev); + pm_runtime_disable(dev); + iio_device_unregister(indio_dev); + regulator_disable(gp2ap002->vio); + regulator_disable(gp2ap002->vdd); + + return 0; +} + +static int __maybe_unused gp2ap002_runtime_suspend(struct device *dev) +{ + struct iio_dev *indio_dev = dev_get_drvdata(dev); + struct gp2ap002 *gp2ap002 = iio_priv(indio_dev); + int ret; + + /* deactivate the irq */ + disable_irq(gp2ap002->irq); + + /* disable chip and irq, everything off */ + ret = regmap_write(gp2ap002->map, gp2ap002_opmod, 0x00); + if (ret) { + dev_err(gp2ap002->dev, "error setting up operation mode "); + return ret; + } + /* + * as these regulators may be shared, at least we are now in + * sleep even if the regulators aren't really turned off. + */ + regulator_disable(gp2ap002->vio); + regulator_disable(gp2ap002->vdd); + + return 0; +} + +static int __maybe_unused gp2ap002_runtime_resume(struct device *dev) +{ + struct iio_dev *indio_dev = dev_get_drvdata(dev); + struct gp2ap002 *gp2ap002 = iio_priv(indio_dev); + int ret; + + ret = regulator_enable(gp2ap002->vdd); + if (ret) { + dev_err(dev, "failed to enable vdd regulator in resume path "); + return ret; + } + ret = regulator_enable(gp2ap002->vio); + if (ret) { + dev_err(dev, "failed to enable vio regulator in resume path "); + return ret; + } + + msleep(20); + + ret = gp2ap002_init(gp2ap002); + if (ret) { + dev_err(dev, "re-initialization failed "); + return ret; + } + + /* re-activate the irq */ + enable_irq(gp2ap002->irq); + + return 0; +} + +static const struct dev_pm_ops gp2ap002_dev_pm_ops = { + set_system_sleep_pm_ops(pm_runtime_force_suspend, + pm_runtime_force_resume) + set_runtime_pm_ops(gp2ap002_runtime_suspend, + gp2ap002_runtime_resume, null) +}; + +static const struct i2c_device_id gp2ap002_id_table[] = { + { "gp2ap002", 0 }, + { }, +}; +module_device_table(i2c, gp2ap002_id_table); + +static const struct of_device_id gp2ap002_of_match[] = { + { .compatible = "sharp,gp2ap002a00f" }, + { .compatible = "sharp,gp2ap002s00f" }, + { }, +}; +module_device_table(of, gp2ap002_of_match); + +static struct i2c_driver gp2ap002_driver = { + .driver = { + .name = "gp2ap002", + .of_match_table = gp2ap002_of_match, + .pm = &gp2ap002_dev_pm_ops, + }, + .probe = gp2ap002_probe, + .remove = gp2ap002_remove, + .id_table = gp2ap002_id_table, +}; +module_i2c_driver(gp2ap002_driver); + +module_author("linus walleij <linus.walleij@linaro.org>"); +module_description("gp2ap002 ambient light and proximity sensor driver"); +module_license("gpl v2");
|
Industrial I/O (iio)
|
97d642e23037c5545266f9564c9b81e6db81b122
|
linus walleij
|
drivers
|
iio
|
light
|
iio: light: add support for azoteq iqs621/622 ambient light sensors
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this patch adds support for the azoteq iqs621 and iqs622 ambient light sensors, both of which can report a four-bit representation of ambient light intensity.
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this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
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add support for azoteq iqs621/622 ambient light sensors
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['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
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['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
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['light']
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['kconfig', 'c', 'makefile']
| 3
| 628
| 0
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--- diff --git a/drivers/iio/light/kconfig b/drivers/iio/light/kconfig --- a/drivers/iio/light/kconfig +++ b/drivers/iio/light/kconfig +config iqs621_als + tristate "azoteq iqs621/622 ambient light sensors" + depends on mfd_iqs62x || compile_test + help + say y here if you want to build support for the azoteq iqs621 + and iqs622 ambient light sensors. + + to compile this driver as a module, choose m here: the module + will be called iqs621-als. + diff --git a/drivers/iio/light/makefile b/drivers/iio/light/makefile --- a/drivers/iio/light/makefile +++ b/drivers/iio/light/makefile +obj-$(config_iqs621_als) += iqs621-als.o diff --git a/drivers/iio/light/iqs621-als.c b/drivers/iio/light/iqs621-als.c --- /dev/null +++ b/drivers/iio/light/iqs621-als.c +// spdx-license-identifier: gpl-2.0+ +/* + * azoteq iqs621/622 ambient light sensors + * + * copyright (c) 2019 jeff labundy <jeff@labundy.com> + */ + +#include <linux/device.h> +#include <linux/iio/events.h> +#include <linux/iio/iio.h> +#include <linux/kernel.h> +#include <linux/mfd/iqs62x.h> +#include <linux/module.h> +#include <linux/mutex.h> +#include <linux/notifier.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> + +#define iqs621_als_flags_light bit(7) +#define iqs621_als_flags_range genmask(3, 0) + +#define iqs621_als_ui_out 0x17 + +#define iqs621_als_thresh_dark 0x80 +#define iqs621_als_thresh_light 0x81 + +#define iqs622_ir_range 0x15 +#define iqs622_ir_flags 0x16 +#define iqs622_ir_flags_touch bit(1) +#define iqs622_ir_flags_prox bit(0) + +#define iqs622_ir_ui_out 0x17 + +#define iqs622_ir_thresh_prox 0x91 +#define iqs622_ir_thresh_touch 0x92 + +struct iqs621_als_private { + struct iqs62x_core *iqs62x; + struct notifier_block notifier; + struct mutex lock; + bool light_en; + bool range_en; + bool prox_en; + u8 als_flags; + u8 ir_flags_mask; + u8 ir_flags; + u8 thresh_light; + u8 thresh_dark; + u8 thresh_prox; +}; + +static int iqs621_als_init(struct iqs621_als_private *iqs621_als) +{ + struct iqs62x_core *iqs62x = iqs621_als->iqs62x; + unsigned int event_mask = 0; + int ret; + + switch (iqs621_als->ir_flags_mask) { + case iqs622_ir_flags_touch: + ret = regmap_write(iqs62x->regmap, iqs622_ir_thresh_touch, + iqs621_als->thresh_prox); + break; + + case iqs622_ir_flags_prox: + ret = regmap_write(iqs62x->regmap, iqs622_ir_thresh_prox, + iqs621_als->thresh_prox); + break; + + default: + ret = regmap_write(iqs62x->regmap, iqs621_als_thresh_light, + iqs621_als->thresh_light); + if (ret) + return ret; + + ret = regmap_write(iqs62x->regmap, iqs621_als_thresh_dark, + iqs621_als->thresh_dark); + } + + if (ret) + return ret; + + if (iqs621_als->light_en || iqs621_als->range_en) + event_mask |= iqs62x->dev_desc->als_mask; + + if (iqs621_als->prox_en) + event_mask |= iqs62x->dev_desc->ir_mask; + + return regmap_update_bits(iqs62x->regmap, iqs620_glbl_event_mask, + event_mask, 0); +} + +static int iqs621_als_notifier(struct notifier_block *notifier, + unsigned long event_flags, void *context) +{ + struct iqs62x_event_data *event_data = context; + struct iqs621_als_private *iqs621_als; + struct iio_dev *indio_dev; + bool light_new, light_old; + bool prox_new, prox_old; + u8 range_new, range_old; + s64 timestamp; + int ret; + + iqs621_als = container_of(notifier, struct iqs621_als_private, + notifier); + indio_dev = iio_priv_to_dev(iqs621_als); + timestamp = iio_get_time_ns(indio_dev); + + mutex_lock(&iqs621_als->lock); + + if (event_flags & bit(iqs62x_event_sys_reset)) { + ret = iqs621_als_init(iqs621_als); + if (ret) { + dev_err(indio_dev->dev.parent, + "failed to re-initialize device: %d ", ret); + ret = notify_bad; + } else { + ret = notify_ok; + } + + goto err_mutex; + } + + if (!iqs621_als->light_en && !iqs621_als->range_en && + !iqs621_als->prox_en) { + ret = notify_done; + goto err_mutex; + } + + /* iqs621 only */ + light_new = event_data->als_flags & iqs621_als_flags_light; + light_old = iqs621_als->als_flags & iqs621_als_flags_light; + + if (iqs621_als->light_en && light_new && !light_old) + iio_push_event(indio_dev, + iio_unmod_event_code(iio_light, 0, + iio_ev_type_thresh, + iio_ev_dir_rising), + timestamp); + else if (iqs621_als->light_en && !light_new && light_old) + iio_push_event(indio_dev, + iio_unmod_event_code(iio_light, 0, + iio_ev_type_thresh, + iio_ev_dir_falling), + timestamp); + + /* iqs621 and iqs622 */ + range_new = event_data->als_flags & iqs621_als_flags_range; + range_old = iqs621_als->als_flags & iqs621_als_flags_range; + + if (iqs621_als->range_en && (range_new > range_old)) + iio_push_event(indio_dev, + iio_unmod_event_code(iio_intensity, 0, + iio_ev_type_change, + iio_ev_dir_rising), + timestamp); + else if (iqs621_als->range_en && (range_new < range_old)) + iio_push_event(indio_dev, + iio_unmod_event_code(iio_intensity, 0, + iio_ev_type_change, + iio_ev_dir_falling), + timestamp); + + /* iqs622 only */ + prox_new = event_data->ir_flags & iqs621_als->ir_flags_mask; + prox_old = iqs621_als->ir_flags & iqs621_als->ir_flags_mask; + + if (iqs621_als->prox_en && prox_new && !prox_old) + iio_push_event(indio_dev, + iio_unmod_event_code(iio_proximity, 0, + iio_ev_type_thresh, + iio_ev_dir_rising), + timestamp); + else if (iqs621_als->prox_en && !prox_new && prox_old) + iio_push_event(indio_dev, + iio_unmod_event_code(iio_proximity, 0, + iio_ev_type_thresh, + iio_ev_dir_falling), + timestamp); + + iqs621_als->als_flags = event_data->als_flags; + iqs621_als->ir_flags = event_data->ir_flags; + ret = notify_ok; + +err_mutex: + mutex_unlock(&iqs621_als->lock); + + return ret; +} + +static void iqs621_als_notifier_unregister(void *context) +{ + struct iqs621_als_private *iqs621_als = context; + struct iio_dev *indio_dev = iio_priv_to_dev(iqs621_als); + int ret; + + ret = blocking_notifier_chain_unregister(&iqs621_als->iqs62x->nh, + &iqs621_als->notifier); + if (ret) + dev_err(indio_dev->dev.parent, + "failed to unregister notifier: %d ", ret); +} + +static int iqs621_als_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, int *val2, long mask) +{ + struct iqs621_als_private *iqs621_als = iio_priv(indio_dev); + struct iqs62x_core *iqs62x = iqs621_als->iqs62x; + int ret; + __le16 val_buf; + + switch (chan->type) { + case iio_intensity: + ret = regmap_read(iqs62x->regmap, chan->address, val); + if (ret) + return ret; + + *val &= iqs621_als_flags_range; + return iio_val_int; + + case iio_proximity: + case iio_light: + ret = regmap_raw_read(iqs62x->regmap, chan->address, &val_buf, + sizeof(val_buf)); + if (ret) + return ret; + + *val = le16_to_cpu(val_buf); + return iio_val_int; + + default: + return -einval; + } +} + +static int iqs621_als_read_event_config(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir) +{ + struct iqs621_als_private *iqs621_als = iio_priv(indio_dev); + int ret; + + mutex_lock(&iqs621_als->lock); + + switch (chan->type) { + case iio_light: + ret = iqs621_als->light_en; + break; + + case iio_intensity: + ret = iqs621_als->range_en; + break; + + case iio_proximity: + ret = iqs621_als->prox_en; + break; + + default: + ret = -einval; + } + + mutex_unlock(&iqs621_als->lock); + + return ret; +} + +static int iqs621_als_write_event_config(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, + int state) +{ + struct iqs621_als_private *iqs621_als = iio_priv(indio_dev); + struct iqs62x_core *iqs62x = iqs621_als->iqs62x; + unsigned int val; + int ret; + + mutex_lock(&iqs621_als->lock); + + ret = regmap_read(iqs62x->regmap, iqs62x->dev_desc->als_flags, &val); + if (ret) + goto err_mutex; + iqs621_als->als_flags = val; + + switch (chan->type) { + case iio_light: + ret = regmap_update_bits(iqs62x->regmap, iqs620_glbl_event_mask, + iqs62x->dev_desc->als_mask, + iqs621_als->range_en || state ? 0 : + 0xff); + if (!ret) + iqs621_als->light_en = state; + break; + + case iio_intensity: + ret = regmap_update_bits(iqs62x->regmap, iqs620_glbl_event_mask, + iqs62x->dev_desc->als_mask, + iqs621_als->light_en || state ? 0 : + 0xff); + if (!ret) + iqs621_als->range_en = state; + break; + + case iio_proximity: + ret = regmap_read(iqs62x->regmap, iqs622_ir_flags, &val); + if (ret) + goto err_mutex; + iqs621_als->ir_flags = val; + + ret = regmap_update_bits(iqs62x->regmap, iqs620_glbl_event_mask, + iqs62x->dev_desc->ir_mask, + state ? 0 : 0xff); + if (!ret) + iqs621_als->prox_en = state; + break; + + default: + ret = -einval; + } + +err_mutex: + mutex_unlock(&iqs621_als->lock); + + return ret; +} + +static int iqs621_als_read_event_value(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, + enum iio_event_info info, + int *val, int *val2) +{ + struct iqs621_als_private *iqs621_als = iio_priv(indio_dev); + int ret = iio_val_int; + + mutex_lock(&iqs621_als->lock); + + switch (dir) { + case iio_ev_dir_rising: + *val = iqs621_als->thresh_light * 16; + break; + + case iio_ev_dir_falling: + *val = iqs621_als->thresh_dark * 4; + break; + + case iio_ev_dir_either: + if (iqs621_als->ir_flags_mask == iqs622_ir_flags_touch) + *val = iqs621_als->thresh_prox * 4; + else + *val = iqs621_als->thresh_prox; + break; + + default: + ret = -einval; + } + + mutex_unlock(&iqs621_als->lock); + + return ret; +} + +static int iqs621_als_write_event_value(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, + enum iio_event_info info, + int val, int val2) +{ + struct iqs621_als_private *iqs621_als = iio_priv(indio_dev); + struct iqs62x_core *iqs62x = iqs621_als->iqs62x; + unsigned int thresh_reg, thresh_val; + u8 ir_flags_mask, *thresh_cache; + int ret = -einval; + + mutex_lock(&iqs621_als->lock); + + switch (dir) { + case iio_ev_dir_rising: + thresh_reg = iqs621_als_thresh_light; + thresh_val = val / 16; + + thresh_cache = &iqs621_als->thresh_light; + ir_flags_mask = 0; + break; + + case iio_ev_dir_falling: + thresh_reg = iqs621_als_thresh_dark; + thresh_val = val / 4; + + thresh_cache = &iqs621_als->thresh_dark; + ir_flags_mask = 0; + break; + + case iio_ev_dir_either: + /* + * the iqs622 supports two detection thresholds, both measured + * in the same arbitrary units reported by read_raw: proximity + * (0 through 255 in steps of 1), and touch (0 through 1020 in + * steps of 4). + * + * based on the single detection threshold chosen by the user, + * select the hardware threshold that gives the best trade-off + * between range and resolution. + * + * by default, the close-range (but coarse) touch threshold is + * chosen during probe. + */ + switch (val) { + case 0 ... 255: + thresh_reg = iqs622_ir_thresh_prox; + thresh_val = val; + + ir_flags_mask = iqs622_ir_flags_prox; + break; + + case 256 ... 1020: + thresh_reg = iqs622_ir_thresh_touch; + thresh_val = val / 4; + + ir_flags_mask = iqs622_ir_flags_touch; + break; + + default: + goto err_mutex; + } + + thresh_cache = &iqs621_als->thresh_prox; + break; + + default: + goto err_mutex; + } + + if (thresh_val > 0xff) + goto err_mutex; + + ret = regmap_write(iqs62x->regmap, thresh_reg, thresh_val); + if (ret) + goto err_mutex; + + *thresh_cache = thresh_val; + iqs621_als->ir_flags_mask = ir_flags_mask; + +err_mutex: + mutex_unlock(&iqs621_als->lock); + + return ret; +} + +static const struct iio_info iqs621_als_info = { + .read_raw = &iqs621_als_read_raw, + .read_event_config = iqs621_als_read_event_config, + .write_event_config = iqs621_als_write_event_config, + .read_event_value = iqs621_als_read_event_value, + .write_event_value = iqs621_als_write_event_value, +}; + +static const struct iio_event_spec iqs621_als_range_events[] = { + { + .type = iio_ev_type_change, + .dir = iio_ev_dir_either, + .mask_separate = bit(iio_ev_info_enable), + }, +}; + +static const struct iio_event_spec iqs621_als_light_events[] = { + { + .type = iio_ev_type_thresh, + .dir = iio_ev_dir_either, + .mask_separate = bit(iio_ev_info_enable), + }, + { + .type = iio_ev_type_thresh, + .dir = iio_ev_dir_rising, + .mask_separate = bit(iio_ev_info_value), + }, + { + .type = iio_ev_type_thresh, + .dir = iio_ev_dir_falling, + .mask_separate = bit(iio_ev_info_value), + }, +}; + +static const struct iio_chan_spec iqs621_als_channels[] = { + { + .type = iio_intensity, + .address = iqs621_als_flags, + .info_mask_separate = bit(iio_chan_info_raw), + .event_spec = iqs621_als_range_events, + .num_event_specs = array_size(iqs621_als_range_events), + }, + { + .type = iio_light, + .address = iqs621_als_ui_out, + .info_mask_separate = bit(iio_chan_info_processed), + .event_spec = iqs621_als_light_events, + .num_event_specs = array_size(iqs621_als_light_events), + }, +}; + +static const struct iio_event_spec iqs622_als_prox_events[] = { + { + .type = iio_ev_type_thresh, + .dir = iio_ev_dir_either, + .mask_separate = bit(iio_ev_info_enable) | + bit(iio_ev_info_value), + }, +}; + +static const struct iio_chan_spec iqs622_als_channels[] = { + { + .type = iio_intensity, + .channel2 = iio_mod_light_both, + .address = iqs622_als_flags, + .info_mask_separate = bit(iio_chan_info_raw), + .event_spec = iqs621_als_range_events, + .num_event_specs = array_size(iqs621_als_range_events), + .modified = true, + }, + { + .type = iio_intensity, + .channel2 = iio_mod_light_ir, + .address = iqs622_ir_range, + .info_mask_separate = bit(iio_chan_info_raw), + .modified = true, + }, + { + .type = iio_proximity, + .address = iqs622_ir_ui_out, + .info_mask_separate = bit(iio_chan_info_raw), + .event_spec = iqs622_als_prox_events, + .num_event_specs = array_size(iqs622_als_prox_events), + }, +}; + +static int iqs621_als_probe(struct platform_device *pdev) +{ + struct iqs62x_core *iqs62x = dev_get_drvdata(pdev->dev.parent); + struct iqs621_als_private *iqs621_als; + struct iio_dev *indio_dev; + unsigned int val; + int ret; + + indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*iqs621_als)); + if (!indio_dev) + return -enomem; + + iqs621_als = iio_priv(indio_dev); + iqs621_als->iqs62x = iqs62x; + + if (iqs62x->dev_desc->prod_num == iqs622_prod_num) { + ret = regmap_read(iqs62x->regmap, iqs622_ir_thresh_touch, + &val); + if (ret) + return ret; + iqs621_als->thresh_prox = val; + iqs621_als->ir_flags_mask = iqs622_ir_flags_touch; + + indio_dev->channels = iqs622_als_channels; + indio_dev->num_channels = array_size(iqs622_als_channels); + } else { + ret = regmap_read(iqs62x->regmap, iqs621_als_thresh_light, + &val); + if (ret) + return ret; + iqs621_als->thresh_light = val; + + ret = regmap_read(iqs62x->regmap, iqs621_als_thresh_dark, + &val); + if (ret) + return ret; + iqs621_als->thresh_dark = val; + + indio_dev->channels = iqs621_als_channels; + indio_dev->num_channels = array_size(iqs621_als_channels); + } + + indio_dev->modes = indio_direct_mode; + indio_dev->dev.parent = &pdev->dev; + indio_dev->name = iqs62x->dev_desc->dev_name; + indio_dev->info = &iqs621_als_info; + + mutex_init(&iqs621_als->lock); + + iqs621_als->notifier.notifier_call = iqs621_als_notifier; + ret = blocking_notifier_chain_register(&iqs621_als->iqs62x->nh, + &iqs621_als->notifier); + if (ret) { + dev_err(&pdev->dev, "failed to register notifier: %d ", ret); + return ret; + } + + ret = devm_add_action_or_reset(&pdev->dev, + iqs621_als_notifier_unregister, + iqs621_als); + if (ret) + return ret; + + return devm_iio_device_register(&pdev->dev, indio_dev); +} + +static struct platform_driver iqs621_als_platform_driver = { + .driver = { + .name = "iqs621-als", + }, + .probe = iqs621_als_probe, +}; +module_platform_driver(iqs621_als_platform_driver); + +module_author("jeff labundy <jeff@labundy.com>"); +module_description("azoteq iqs621/622 ambient light sensors"); +module_license("gpl"); +module_alias("platform:iqs621-als");
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Industrial I/O (iio)
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b081b73820945decb2fd39bdc0ccf46a1ddc6d53
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jeff labundy
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drivers
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iio
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light
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iio: light: add dyna-image al3010 driver
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based on: - 3320a in-kernel driver - https://www.spinics.net/lists/linux-iio/msg25145.html - https://lore.kernel.org/patchwork/patch/684179/
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this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
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add dyna-image al3010 driver
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['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
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['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
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['light']
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['kconfig', 'c', 'makefile']
| 3
| 253
| 0
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- 3320a in-kernel driver - https://www.spinics.net/lists/linux-iio/msg25145.html - https://lore.kernel.org/patchwork/patch/684179/ --- diff --git a/drivers/iio/light/kconfig b/drivers/iio/light/kconfig --- a/drivers/iio/light/kconfig +++ b/drivers/iio/light/kconfig +config al3010 + tristate "al3010 ambient light sensor" + depends on i2c + help + say y here if you want to build a driver for the dyna image al3010 + ambient light sensor. + + to compile this driver as a module, choose m here: the + module will be called al3010. + diff --git a/drivers/iio/light/makefile b/drivers/iio/light/makefile --- a/drivers/iio/light/makefile +++ b/drivers/iio/light/makefile +obj-$(config_al3010) += al3010.o diff --git a/drivers/iio/light/al3010.c b/drivers/iio/light/al3010.c --- /dev/null +++ b/drivers/iio/light/al3010.c +// spdx-license-identifier: gpl-2.0-only +/* + * al3010 - dyna image ambient light sensor + * + * copyright (c) 2014, intel corporation. + * copyright (c) 2016, dyna-image corp. + * copyright (c) 2020, david heidelberg, micha mirosaw, dmitry osipenko + * + * iio driver for al3010 (7-bit i2c slave address 0x1c). + * + * todo: interrupt support, thresholds + * when the driver will get support for interrupt handling, then interrupt + * will need to be disabled before turning sensor off in order to avoid + * potential races with the interrupt handling. + */ + +#include <linux/bitfield.h> +#include <linux/i2c.h> +#include <linux/module.h> +#include <linux/of.h> + +#include <linux/iio/iio.h> +#include <linux/iio/sysfs.h> + +#define al3010_drv_name "al3010" + +#define al3010_reg_system 0x00 +#define al3010_reg_data_low 0x0c +#define al3010_reg_config 0x10 + +#define al3010_config_disable 0x00 +#define al3010_config_enable 0x01 + +#define al3010_gain_mask genmask(6,4) + +#define al3010_scale_available "1.1872 0.2968 0.0742 0.018" + +enum al3xxxx_range { + al3xxx_range_1, /* 77806 lx */ + al3xxx_range_2, /* 19542 lx */ + al3xxx_range_3, /* 4863 lx */ + al3xxx_range_4 /* 1216 lx */ +}; + +static const int al3010_scales[][2] = { + {0, 1187200}, {0, 296800}, {0, 74200}, {0, 18600} +}; + +struct al3010_data { + struct i2c_client *client; +}; + +static const struct iio_chan_spec al3010_channels[] = { + { + .type = iio_light, + .info_mask_separate = bit(iio_chan_info_raw) | + bit(iio_chan_info_scale), + } +}; + +static iio_const_attr(in_illuminance_scale_available, al3010_scale_available); + +static struct attribute *al3010_attributes[] = { + &iio_const_attr_in_illuminance_scale_available.dev_attr.attr, + null, +}; + +static const struct attribute_group al3010_attribute_group = { + .attrs = al3010_attributes, +}; + +static int al3010_set_pwr(struct i2c_client *client, bool pwr) +{ + u8 val = pwr ? al3010_config_enable : al3010_config_disable; + return i2c_smbus_write_byte_data(client, al3010_reg_system, val); +} + +static void al3010_set_pwr_off(void *_data) +{ + struct al3010_data *data = _data; + + al3010_set_pwr(data->client, false); +} + +static int al3010_init(struct al3010_data *data) +{ + int ret; + + ret = al3010_set_pwr(data->client, true); + + if (ret < 0) + return ret; + + ret = i2c_smbus_write_byte_data(data->client, al3010_reg_config, + field_prep(al3010_gain_mask, + al3xxx_range_3)); + if (ret < 0) + return ret; + + return 0; +} + +static int al3010_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, int *val, + int *val2, long mask) +{ + struct al3010_data *data = iio_priv(indio_dev); + int ret; + + switch (mask) { + case iio_chan_info_raw: + /* + * als adc value is stored in two adjacent registers: + * - low byte of output is stored at al3010_reg_data_low + * - high byte of output is stored at al3010_reg_data_low + 1 + */ + ret = i2c_smbus_read_word_data(data->client, + al3010_reg_data_low); + if (ret < 0) + return ret; + *val = ret; + return iio_val_int; + case iio_chan_info_scale: + ret = i2c_smbus_read_byte_data(data->client, + al3010_reg_config); + if (ret < 0) + return ret; + + ret = field_get(al3010_gain_mask, ret); + *val = al3010_scales[ret][0]; + *val2 = al3010_scales[ret][1]; + + return iio_val_int_plus_micro; + } + return -einval; +} + +static int al3010_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, int val, + int val2, long mask) +{ + struct al3010_data *data = iio_priv(indio_dev); + int i; + + switch (mask) { + case iio_chan_info_scale: + for (i = 0; i < array_size(al3010_scales); i++) { + if (val != al3010_scales[i][0] || + val2 != al3010_scales[i][1]) + continue; + + return i2c_smbus_write_byte_data(data->client, + al3010_reg_config, + field_prep(al3010_gain_mask, i)); + } + break; + } + return -einval; +} + +static const struct iio_info al3010_info = { + .read_raw = al3010_read_raw, + .write_raw = al3010_write_raw, + .attrs = &al3010_attribute_group, +}; + +static int al3010_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct al3010_data *data; + struct iio_dev *indio_dev; + int ret; + + indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); + if (!indio_dev) + return -enomem; + + data = iio_priv(indio_dev); + i2c_set_clientdata(client, indio_dev); + data->client = client; + + indio_dev->dev.parent = &client->dev; + indio_dev->info = &al3010_info; + indio_dev->name = al3010_drv_name; + indio_dev->channels = al3010_channels; + indio_dev->num_channels = array_size(al3010_channels); + indio_dev->modes = indio_direct_mode; + + ret = al3010_init(data); + if (ret < 0) { + dev_err(&client->dev, "al3010 chip init failed "); + return ret; + } + + ret = devm_add_action_or_reset(&client->dev, + al3010_set_pwr_off, + data); + if (ret < 0) + return ret; + + return devm_iio_device_register(&client->dev, indio_dev); +} + +static int __maybe_unused al3010_suspend(struct device *dev) +{ + return al3010_set_pwr(to_i2c_client(dev), false); +} + +static int __maybe_unused al3010_resume(struct device *dev) +{ + return al3010_set_pwr(to_i2c_client(dev), true); +} + +static simple_dev_pm_ops(al3010_pm_ops, al3010_suspend, al3010_resume); + +static const struct i2c_device_id al3010_id[] = { + {"al3010", }, + {} +}; +module_device_table(i2c, al3010_id); + +static const struct of_device_id al3010_of_match[] = { + { .compatible = "dynaimage,al3010", }, + {}, +}; +module_device_table(of, al3010_of_match); + +static struct i2c_driver al3010_driver = { + .driver = { + .name = al3010_drv_name, + .of_match_table = al3010_of_match, + .pm = &al3010_pm_ops, + }, + .probe = al3010_probe, + .id_table = al3010_id, +}; +module_i2c_driver(al3010_driver); + +module_author("daniel baluta <daniel.baluta@nxp.com>"); +module_author("david heidelberg <david@ixit.cz>"); +module_description("al3010 ambient light sensor driver"); +module_license("gpl v2");
|
Industrial I/O (iio)
|
c36b5195ab7035cc7ee0b79f621a3a9ecd71cf9c
|
david heidelberg
|
drivers
|
iio
|
light
|
iio: light: al3320a implement suspend support
|
al3320a is fairly simple chip, so for suspend is enough to disable and later enable it again.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
al3320a implement suspend support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['light']
|
['c']
| 1
| 25
| 5
|
--- diff --git a/drivers/iio/light/al3320a.c b/drivers/iio/light/al3320a.c --- a/drivers/iio/light/al3320a.c +++ b/drivers/iio/light/al3320a.c + * when the driver will get support for interrupt handling, then interrupt + * will need to be disabled before turning sensor off in order to avoid + * potential races with the interrupt handling. +static int al3320a_set_pwr(struct i2c_client *client, bool pwr) +{ + u8 val = pwr ? al3320a_config_enable : al3320a_config_disable; + return i2c_smbus_write_byte_data(client, al3320a_reg_config, val); +} + - /* power on */ - ret = i2c_smbus_write_byte_data(data->client, al3320a_reg_config, - al3320a_config_enable); + ret = al3320a_set_pwr(data->client, true); + - return i2c_smbus_write_byte_data(client, al3320a_reg_config, - al3320a_config_disable); + return al3320a_set_pwr(client, false); +static int __maybe_unused al3320a_suspend(struct device *dev) +{ + return al3320a_set_pwr(to_i2c_client(dev), false); +} + +static int __maybe_unused al3320a_resume(struct device *dev) +{ + return al3320a_set_pwr(to_i2c_client(dev), true); +} + +static simple_dev_pm_ops(al3320a_pm_ops, al3320a_suspend, al3320a_resume); + + .pm = &al3320a_pm_ops,
|
Industrial I/O (iio)
|
c39a05e35263a2c8abea81df40b42aef33d1a759
|
david heidelberg
|
drivers
|
iio
|
light
|
iio: position: add support for azoteq iqs624/625 angle sensors
|
this patch adds support for the azoteq iqs624 and iqs625 angular position sensors, capable of reporting the angle of a rotating shaft down to 1 and 10 degrees of accuracy, respectively.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add support for azoteq iqs624/625 angle sensors
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['position']
|
['kconfig', 'c', 'makefile']
| 5
| 312
| 0
|
--- diff --git a/drivers/iio/kconfig b/drivers/iio/kconfig --- a/drivers/iio/kconfig +++ b/drivers/iio/kconfig +source "drivers/iio/position/kconfig" diff --git a/drivers/iio/makefile b/drivers/iio/makefile --- a/drivers/iio/makefile +++ b/drivers/iio/makefile +obj-y += position/ diff --git a/drivers/iio/position/kconfig b/drivers/iio/position/kconfig --- /dev/null +++ b/drivers/iio/position/kconfig +# spdx-license-identifier: gpl-2.0-only +# +# linear and angular position sensors +# +# when adding new entries keep the list in alphabetical order + +menu "linear and angular position sensors" + +config iqs624_pos + tristate "azoteq iqs624/625 angular position sensors" + depends on mfd_iqs62x || compile_test + help + say y here if you want to build support for the azoteq iqs624 + and iqs625 angular position sensors. + + to compile this driver as a module, choose m here: the module + will be called iqs624-pos. + +endmenu diff --git a/drivers/iio/position/makefile b/drivers/iio/position/makefile --- /dev/null +++ b/drivers/iio/position/makefile +# +# makefile for iio linear and angular position sensors +# + +# when adding new entries keep the list in alphabetical order + +obj-$(config_iqs624_pos) += iqs624-pos.o diff --git a/drivers/iio/position/iqs624-pos.c b/drivers/iio/position/iqs624-pos.c --- /dev/null +++ b/drivers/iio/position/iqs624-pos.c +// spdx-license-identifier: gpl-2.0+ +/* + * azoteq iqs624/625 angular position sensors + * + * copyright (c) 2019 jeff labundy <jeff@labundy.com> + */ + +#include <linux/device.h> +#include <linux/iio/events.h> +#include <linux/iio/iio.h> +#include <linux/kernel.h> +#include <linux/mfd/iqs62x.h> +#include <linux/module.h> +#include <linux/mutex.h> +#include <linux/notifier.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> + +#define iqs624_pos_deg_out 0x16 + +#define iqs624_pos_scale1 (314159 / 180) +#define iqs624_pos_scale2 100000 + +struct iqs624_pos_private { + struct iqs62x_core *iqs62x; + struct notifier_block notifier; + struct mutex lock; + bool angle_en; + u16 angle; +}; + +static int iqs624_pos_angle_en(struct iqs62x_core *iqs62x, bool angle_en) +{ + unsigned int event_mask = iqs624_hall_ui_whl_event; + + /* + * the iqs625 reports angular position in the form of coarse intervals, + * so only interval change events are unmasked. conversely, the iqs624 + * reports angular position down to one degree of resolution, so wheel + * movement events are unmasked instead. + */ + if (iqs62x->dev_desc->prod_num == iqs625_prod_num) + event_mask = iqs624_hall_ui_int_event; + + return regmap_update_bits(iqs62x->regmap, iqs624_hall_ui, event_mask, + angle_en ? 0 : 0xff); +} + +static int iqs624_pos_notifier(struct notifier_block *notifier, + unsigned long event_flags, void *context) +{ + struct iqs62x_event_data *event_data = context; + struct iqs624_pos_private *iqs624_pos; + struct iqs62x_core *iqs62x; + struct iio_dev *indio_dev; + u16 angle = event_data->ui_data; + s64 timestamp; + int ret; + + iqs624_pos = container_of(notifier, struct iqs624_pos_private, + notifier); + indio_dev = iio_priv_to_dev(iqs624_pos); + timestamp = iio_get_time_ns(indio_dev); + + iqs62x = iqs624_pos->iqs62x; + if (iqs62x->dev_desc->prod_num == iqs625_prod_num) + angle = event_data->interval; + + mutex_lock(&iqs624_pos->lock); + + if (event_flags & bit(iqs62x_event_sys_reset)) { + ret = iqs624_pos_angle_en(iqs62x, iqs624_pos->angle_en); + if (ret) { + dev_err(indio_dev->dev.parent, + "failed to re-initialize device: %d ", ret); + ret = notify_bad; + } else { + ret = notify_ok; + } + } else if (iqs624_pos->angle_en && (angle != iqs624_pos->angle)) { + iio_push_event(indio_dev, + iio_unmod_event_code(iio_angl, 0, + iio_ev_type_change, + iio_ev_dir_none), + timestamp); + + iqs624_pos->angle = angle; + ret = notify_ok; + } else { + ret = notify_done; + } + + mutex_unlock(&iqs624_pos->lock); + + return ret; +} + +static void iqs624_pos_notifier_unregister(void *context) +{ + struct iqs624_pos_private *iqs624_pos = context; + struct iio_dev *indio_dev = iio_priv_to_dev(iqs624_pos); + int ret; + + ret = blocking_notifier_chain_unregister(&iqs624_pos->iqs62x->nh, + &iqs624_pos->notifier); + if (ret) + dev_err(indio_dev->dev.parent, + "failed to unregister notifier: %d ", ret); +} + +static int iqs624_pos_angle_get(struct iqs62x_core *iqs62x, unsigned int *val) +{ + int ret; + __le16 val_buf; + + if (iqs62x->dev_desc->prod_num == iqs625_prod_num) + return regmap_read(iqs62x->regmap, iqs62x->dev_desc->interval, + val); + + ret = regmap_raw_read(iqs62x->regmap, iqs624_pos_deg_out, &val_buf, + sizeof(val_buf)); + if (ret) + return ret; + + *val = le16_to_cpu(val_buf); + + return 0; +} + +static int iqs624_pos_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, int *val2, long mask) +{ + struct iqs624_pos_private *iqs624_pos = iio_priv(indio_dev); + struct iqs62x_core *iqs62x = iqs624_pos->iqs62x; + unsigned int scale = 1; + int ret; + + switch (mask) { + case iio_chan_info_raw: + ret = iqs624_pos_angle_get(iqs62x, val); + if (ret) + return ret; + + return iio_val_int; + + case iio_chan_info_scale: + if (iqs62x->dev_desc->prod_num == iqs625_prod_num) { + ret = regmap_read(iqs62x->regmap, iqs624_interval_div, + &scale); + if (ret) + return ret; + } + + *val = scale * iqs624_pos_scale1; + *val2 = iqs624_pos_scale2; + return iio_val_fractional; + + default: + return -einval; + } +} + +static int iqs624_pos_read_event_config(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir) +{ + struct iqs624_pos_private *iqs624_pos = iio_priv(indio_dev); + int ret; + + mutex_lock(&iqs624_pos->lock); + ret = iqs624_pos->angle_en; + mutex_unlock(&iqs624_pos->lock); + + return ret; +} + +static int iqs624_pos_write_event_config(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, + int state) +{ + struct iqs624_pos_private *iqs624_pos = iio_priv(indio_dev); + struct iqs62x_core *iqs62x = iqs624_pos->iqs62x; + unsigned int val; + int ret; + + mutex_lock(&iqs624_pos->lock); + + ret = iqs624_pos_angle_get(iqs62x, &val); + if (ret) + goto err_mutex; + + ret = iqs624_pos_angle_en(iqs62x, state); + if (ret) + goto err_mutex; + + iqs624_pos->angle = val; + iqs624_pos->angle_en = state; + +err_mutex: + mutex_unlock(&iqs624_pos->lock); + + return ret; +} + +static const struct iio_info iqs624_pos_info = { + .read_raw = &iqs624_pos_read_raw, + .read_event_config = iqs624_pos_read_event_config, + .write_event_config = iqs624_pos_write_event_config, +}; + +static const struct iio_event_spec iqs624_pos_events[] = { + { + .type = iio_ev_type_change, + .dir = iio_ev_dir_none, + .mask_separate = bit(iio_ev_info_enable), + }, +}; + +static const struct iio_chan_spec iqs624_pos_channels[] = { + { + .type = iio_angl, + .info_mask_separate = bit(iio_chan_info_raw) | + bit(iio_chan_info_scale), + .event_spec = iqs624_pos_events, + .num_event_specs = array_size(iqs624_pos_events), + }, +}; + +static int iqs624_pos_probe(struct platform_device *pdev) +{ + struct iqs62x_core *iqs62x = dev_get_drvdata(pdev->dev.parent); + struct iqs624_pos_private *iqs624_pos; + struct iio_dev *indio_dev; + int ret; + + indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*iqs624_pos)); + if (!indio_dev) + return -enomem; + + iqs624_pos = iio_priv(indio_dev); + iqs624_pos->iqs62x = iqs62x; + + indio_dev->modes = indio_direct_mode; + indio_dev->dev.parent = &pdev->dev; + indio_dev->channels = iqs624_pos_channels; + indio_dev->num_channels = array_size(iqs624_pos_channels); + indio_dev->name = iqs62x->dev_desc->dev_name; + indio_dev->info = &iqs624_pos_info; + + mutex_init(&iqs624_pos->lock); + + iqs624_pos->notifier.notifier_call = iqs624_pos_notifier; + ret = blocking_notifier_chain_register(&iqs624_pos->iqs62x->nh, + &iqs624_pos->notifier); + if (ret) { + dev_err(&pdev->dev, "failed to register notifier: %d ", ret); + return ret; + } + + ret = devm_add_action_or_reset(&pdev->dev, + iqs624_pos_notifier_unregister, + iqs624_pos); + if (ret) + return ret; + + return devm_iio_device_register(&pdev->dev, indio_dev); +} + +static struct platform_driver iqs624_pos_platform_driver = { + .driver = { + .name = "iqs624-pos", + }, + .probe = iqs624_pos_probe, +}; +module_platform_driver(iqs624_pos_platform_driver); + +module_author("jeff labundy <jeff@labundy.com>"); +module_description("azoteq iqs624/625 angular position sensors"); +module_license("gpl"); +module_alias("platform:iqs624-pos");
|
Industrial I/O (iio)
|
189c3c495ad7382099a641664171d8b047d9e9b5
|
jeff labundy
|
drivers
|
iio
|
position
|
iio: pressure: icp10100: add driver for invensense icp-101xx
|
invensense icp-101xx sensors are a family of barometric pressure and temperature sensor.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add driver for invensense icp-101xx
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['pressure', 'icp10100']
|
['kconfig', 'c', 'makefile']
| 3
| 670
| 0
|
--- diff --git a/drivers/iio/pressure/kconfig b/drivers/iio/pressure/kconfig --- a/drivers/iio/pressure/kconfig +++ b/drivers/iio/pressure/kconfig +config icp10100 + tristate "invensense icp-101xx pressure and temperature sensor" + depends on i2c + select crc8 + help + say yes here to build support for invensense icp-101xx barometric + pressure and temperature sensor. + + to compile this driver as a module, choose m here: the module + will be called icp10100. + diff --git a/drivers/iio/pressure/makefile b/drivers/iio/pressure/makefile --- a/drivers/iio/pressure/makefile +++ b/drivers/iio/pressure/makefile +obj-$(config_icp10100) += icp10100.o diff --git a/drivers/iio/pressure/icp10100.c b/drivers/iio/pressure/icp10100.c --- /dev/null +++ b/drivers/iio/pressure/icp10100.c +// spdx-license-identifier: gpl-2.0-or-later +/* + * copyright (c) 2020 invensense, inc. + * + * driver for invensense icp-1010xx barometric pressure and temperature sensor. + * + * datasheet: + * http://www.invensense.com/wp-content/uploads/2018/01/ds-000186-icp-101xx-v1.2.pdf + */ + +#include <linux/device.h> +#include <linux/module.h> +#include <linux/i2c.h> +#include <linux/pm_runtime.h> +#include <linux/crc8.h> +#include <linux/mutex.h> +#include <linux/delay.h> +#include <linux/log2.h> +#include <linux/math64.h> +#include <linux/regulator/consumer.h> +#include <linux/iio/iio.h> + +#define icp10100_id_reg_get(_reg) ((_reg) & 0x003f) +#define icp10100_id_reg 0x08 +#define icp10100_response_word_length 3 +#define icp10100_crc8_word_length 2 +#define icp10100_crc8_polynomial 0x31 +#define icp10100_crc8_init 0xff + +enum icp10100_mode { + icp10100_mode_lp, /* low power mode: 1x sampling */ + icp10100_mode_n, /* normal mode: 2x sampling */ + icp10100_mode_ln, /* low noise mode: 4x sampling */ + icp10100_mode_uln, /* ultra low noise mode: 8x sampling */ + icp10100_mode_nb, +}; + +struct icp10100_state { + struct mutex lock; + struct i2c_client *client; + struct regulator *vdd; + enum icp10100_mode mode; + int16_t cal[4]; +}; + +struct icp10100_command { + __be16 cmd; + unsigned long wait_us; + unsigned long wait_max_us; + size_t response_word_nb; +}; + +static const struct icp10100_command icp10100_cmd_soft_reset = { + .cmd = cpu_to_be16(0x805d), + .wait_us = 170, + .wait_max_us = 200, + .response_word_nb = 0, +}; + +static const struct icp10100_command icp10100_cmd_read_id = { + .cmd = cpu_to_be16(0xefc8), + .wait_us = 0, + .response_word_nb = 1, +}; + +static const struct icp10100_command icp10100_cmd_read_otp = { + .cmd = cpu_to_be16(0xc7f7), + .wait_us = 0, + .response_word_nb = 1, +}; + +static const struct icp10100_command icp10100_cmd_measure[] = { + [icp10100_mode_lp] = { + .cmd = cpu_to_be16(0x401a), + .wait_us = 1800, + .wait_max_us = 2000, + .response_word_nb = 3, + }, + [icp10100_mode_n] = { + .cmd = cpu_to_be16(0x48a3), + .wait_us = 6300, + .wait_max_us = 6500, + .response_word_nb = 3, + }, + [icp10100_mode_ln] = { + .cmd = cpu_to_be16(0x5059), + .wait_us = 23800, + .wait_max_us = 24000, + .response_word_nb = 3, + }, + [icp10100_mode_uln] = { + .cmd = cpu_to_be16(0x58e0), + .wait_us = 94500, + .wait_max_us = 94700, + .response_word_nb = 3, + }, +}; + +static const uint8_t icp10100_switch_mode_otp[] = + {0xc5, 0x95, 0x00, 0x66, 0x9c}; + +declare_crc8_table(icp10100_crc8_table); + +static inline int icp10100_i2c_xfer(struct i2c_adapter *adap, + struct i2c_msg *msgs, int num) +{ + int ret; + + ret = i2c_transfer(adap, msgs, num); + if (ret < 0) + return ret; + + if (ret != num) + return -eio; + + return 0; +} + +static int icp10100_send_cmd(struct icp10100_state *st, + const struct icp10100_command *cmd, + __be16 *buf, size_t buf_len) +{ + size_t size = cmd->response_word_nb * icp10100_response_word_length; + uint8_t data[16]; + uint8_t *ptr; + uint8_t *buf_ptr = (uint8_t *)buf; + struct i2c_msg msgs[2] = { + { + .addr = st->client->addr, + .flags = 0, + .len = 2, + .buf = (uint8_t *)&cmd->cmd, + }, { + .addr = st->client->addr, + .flags = i2c_m_rd, + .len = size, + .buf = data, + }, + }; + uint8_t crc; + unsigned int i; + int ret; + + if (size > sizeof(data)) + return -einval; + + if (cmd->response_word_nb > 0 && + (buf == null || buf_len < (cmd->response_word_nb * 2))) + return -einval; + + dev_dbg(&st->client->dev, "sending cmd %#x ", be16_to_cpu(cmd->cmd)); + + if (cmd->response_word_nb > 0 && cmd->wait_us == 0) { + /* direct command-response without waiting */ + ret = icp10100_i2c_xfer(st->client->adapter, msgs, + array_size(msgs)); + if (ret) + return ret; + } else { + /* transfer command write */ + ret = icp10100_i2c_xfer(st->client->adapter, &msgs[0], 1); + if (ret) + return ret; + if (cmd->wait_us > 0) + usleep_range(cmd->wait_us, cmd->wait_max_us); + /* transfer response read if needed */ + if (cmd->response_word_nb > 0) { + ret = icp10100_i2c_xfer(st->client->adapter, &msgs[1], 1); + if (ret) + return ret; + } else { + return 0; + } + } + + /* process read words with crc checking */ + for (i = 0; i < cmd->response_word_nb; ++i) { + ptr = &data[i * icp10100_response_word_length]; + crc = crc8(icp10100_crc8_table, ptr, icp10100_crc8_word_length, + icp10100_crc8_init); + if (crc != ptr[icp10100_crc8_word_length]) { + dev_err(&st->client->dev, "crc error recv=%#x calc=%#x ", + ptr[icp10100_crc8_word_length], crc); + return -eio; + } + *buf_ptr++ = ptr[0]; + *buf_ptr++ = ptr[1]; + } + + return 0; +} + +static int icp10100_read_cal_otp(struct icp10100_state *st) +{ + __be16 val; + int i; + int ret; + + /* switch into otp read mode */ + ret = i2c_master_send(st->client, icp10100_switch_mode_otp, + array_size(icp10100_switch_mode_otp)); + if (ret < 0) + return ret; + if (ret != array_size(icp10100_switch_mode_otp)) + return -eio; + + /* read 4 calibration values */ + for (i = 0; i < 4; ++i) { + ret = icp10100_send_cmd(st, &icp10100_cmd_read_otp, + &val, sizeof(val)); + if (ret) + return ret; + st->cal[i] = be16_to_cpu(val); + dev_dbg(&st->client->dev, "cal[%d] = %d ", i, st->cal[i]); + } + + return 0; +} + +static int icp10100_init_chip(struct icp10100_state *st) +{ + __be16 val; + uint16_t id; + int ret; + + /* read and check id */ + ret = icp10100_send_cmd(st, &icp10100_cmd_read_id, &val, sizeof(val)); + if (ret) + return ret; + id = icp10100_id_reg_get(be16_to_cpu(val)); + if (id != icp10100_id_reg) { + dev_err(&st->client->dev, "invalid id %#x ", id); + return -enodev; + } + + /* read calibration data from otp */ + ret = icp10100_read_cal_otp(st); + if (ret) + return ret; + + /* reset chip */ + return icp10100_send_cmd(st, &icp10100_cmd_soft_reset, null, 0); +} + +static int icp10100_get_measures(struct icp10100_state *st, + uint32_t *pressure, uint16_t *temperature) +{ + const struct icp10100_command *cmd; + __be16 measures[3]; + int ret; + + pm_runtime_get_sync(&st->client->dev); + + mutex_lock(&st->lock); + cmd = &icp10100_cmd_measure[st->mode]; + ret = icp10100_send_cmd(st, cmd, measures, sizeof(measures)); + mutex_unlock(&st->lock); + if (ret) + goto error_measure; + + *pressure = (be16_to_cpu(measures[0]) << 8) | + (be16_to_cpu(measures[1]) >> 8); + *temperature = be16_to_cpu(measures[2]); + + pm_runtime_mark_last_busy(&st->client->dev); +error_measure: + pm_runtime_put_autosuspend(&st->client->dev); + return ret; +} + +static uint32_t icp10100_get_pressure(struct icp10100_state *st, + uint32_t raw_pressure, uint16_t raw_temp) +{ + static int32_t p_calib[] = {45000, 80000, 105000}; + static int32_t lut_lower = 3670016; + static int32_t lut_upper = 12058624; + static int32_t inv_quadr_factor = 16777216; + static int32_t offset_factor = 2048; + int64_t val1, val2; + int32_t p_lut[3]; + int32_t t, t_square; + int64_t a, b, c; + uint32_t pressure_mpa; + + dev_dbg(&st->client->dev, "raw: pressure = %u, temp = %u ", + raw_pressure, raw_temp); + + /* compute p_lut values */ + t = (int32_t)raw_temp - 32768; + t_square = t * t; + val1 = (int64_t)st->cal[0] * (int64_t)t_square; + p_lut[0] = lut_lower + (int32_t)div_s64(val1, inv_quadr_factor); + val1 = (int64_t)st->cal[1] * (int64_t)t_square; + p_lut[1] = offset_factor * st->cal[3] + + (int32_t)div_s64(val1, inv_quadr_factor); + val1 = (int64_t)st->cal[2] * (int64_t)t_square; + p_lut[2] = lut_upper + (int32_t)div_s64(val1, inv_quadr_factor); + dev_dbg(&st->client->dev, "p_lut = [%d, %d, %d] ", + p_lut[0], p_lut[1], p_lut[2]); + + /* compute a, b, c factors */ + val1 = (int64_t)p_lut[0] * (int64_t)p_lut[1] * + (int64_t)(p_calib[0] - p_calib[1]) + + (int64_t)p_lut[1] * (int64_t)p_lut[2] * + (int64_t)(p_calib[1] - p_calib[2]) + + (int64_t)p_lut[2] * (int64_t)p_lut[0] * + (int64_t)(p_calib[2] - p_calib[0]); + val2 = (int64_t)p_lut[2] * (int64_t)(p_calib[0] - p_calib[1]) + + (int64_t)p_lut[0] * (int64_t)(p_calib[1] - p_calib[2]) + + (int64_t)p_lut[1] * (int64_t)(p_calib[2] - p_calib[0]); + c = div64_s64(val1, val2); + dev_dbg(&st->client->dev, "val1 = %lld, val2 = %lld, c = %lld ", + val1, val2, c); + val1 = (int64_t)p_calib[0] * (int64_t)p_lut[0] - + (int64_t)p_calib[1] * (int64_t)p_lut[1] - + (int64_t)(p_calib[1] - p_calib[0]) * c; + val2 = (int64_t)p_lut[0] - (int64_t)p_lut[1]; + a = div64_s64(val1, val2); + dev_dbg(&st->client->dev, "val1 = %lld, val2 = %lld, a = %lld ", + val1, val2, a); + b = ((int64_t)p_calib[0] - a) * ((int64_t)p_lut[0] + c); + dev_dbg(&st->client->dev, "b = %lld ", b); + + /* + * pressure_pa = a + (b / (c + raw_pressure)) + * pressure_mpa = 1000 * pressure_pa + */ + pressure_mpa = 1000ll * a + div64_s64(1000ll * b, c + raw_pressure); + + return pressure_mpa; +} + +static int icp10100_read_raw_measures(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, int *val2) +{ + struct icp10100_state *st = iio_priv(indio_dev); + uint32_t raw_pressure; + uint16_t raw_temp; + uint32_t pressure_mpa; + int ret; + + ret = iio_device_claim_direct_mode(indio_dev); + if (ret) + return ret; + + ret = icp10100_get_measures(st, &raw_pressure, &raw_temp); + if (ret) + goto error_release; + + switch (chan->type) { + case iio_pressure: + pressure_mpa = icp10100_get_pressure(st, raw_pressure, + raw_temp); + /* mpa to kpa */ + *val = pressure_mpa / 1000000; + *val2 = pressure_mpa % 1000000; + ret = iio_val_int_plus_micro; + break; + case iio_temp: + *val = raw_temp; + ret = iio_val_int; + break; + default: + ret = -einval; + break; + }; + +error_release: + iio_device_release_direct_mode(indio_dev); + return ret; +} + +static int icp10100_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, int *val2, long mask) +{ + struct icp10100_state *st = iio_priv(indio_dev); + + switch (mask) { + case iio_chan_info_raw: + case iio_chan_info_processed: + return icp10100_read_raw_measures(indio_dev, chan, val, val2); + case iio_chan_info_scale: + switch (chan->type) { + case iio_temp: + /* 1000 * 175c / 65536 in mc */ + *val = 2; + *val2 = 670288; + return iio_val_int_plus_micro; + default: + return -einval; + } + break; + case iio_chan_info_offset: + switch (chan->type) { + case iio_temp: + /* 1000 * -45c in mc */ + *val = -45000; + return iio_val_int; + default: + return -einval; + } + break; + case iio_chan_info_oversampling_ratio: + mutex_lock(&st->lock); + *val = 1 << st->mode; + mutex_unlock(&st->lock); + return iio_val_int; + default: + return -einval; + } +} + +static int icp10100_read_avail(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + const int **vals, int *type, int *length, + long mask) +{ + static int oversamplings[] = {1, 2, 4, 8}; + + switch (mask) { + case iio_chan_info_oversampling_ratio: + *vals = oversamplings; + *type = iio_val_int; + *length = array_size(oversamplings); + return iio_avail_list; + default: + return -einval; + } +} + +static int icp10100_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int val, int val2, long mask) +{ + struct icp10100_state *st = iio_priv(indio_dev); + unsigned int mode; + int ret; + + switch (mask) { + case iio_chan_info_oversampling_ratio: + /* oversampling is always positive and a power of 2 */ + if (val <= 0 || !is_power_of_2(val)) + return -einval; + mode = ilog2(val); + if (mode >= icp10100_mode_nb) + return -einval; + ret = iio_device_claim_direct_mode(indio_dev); + if (ret) + return ret; + mutex_lock(&st->lock); + st->mode = mode; + mutex_unlock(&st->lock); + iio_device_release_direct_mode(indio_dev); + return 0; + default: + return -einval; + } +} + +static int icp10100_write_raw_get_fmt(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + long mask) +{ + switch (mask) { + case iio_chan_info_oversampling_ratio: + return iio_val_int; + default: + return -einval; + } +} + +static const struct iio_info icp10100_info = { + .read_raw = icp10100_read_raw, + .read_avail = icp10100_read_avail, + .write_raw = icp10100_write_raw, + .write_raw_get_fmt = icp10100_write_raw_get_fmt, +}; + +static const struct iio_chan_spec icp10100_channels[] = { + { + .type = iio_pressure, + .info_mask_separate = bit(iio_chan_info_processed), + .info_mask_shared_by_all = + bit(iio_chan_info_oversampling_ratio), + .info_mask_shared_by_all_available = + bit(iio_chan_info_oversampling_ratio), + }, { + .type = iio_temp, + .info_mask_separate = bit(iio_chan_info_raw) | + bit(iio_chan_info_scale) | + bit(iio_chan_info_offset), + .info_mask_shared_by_all = + bit(iio_chan_info_oversampling_ratio), + .info_mask_shared_by_all_available = + bit(iio_chan_info_oversampling_ratio), + }, +}; + +static int icp10100_enable_regulator(struct icp10100_state *st) +{ + int ret; + + ret = regulator_enable(st->vdd); + if (ret) + return ret; + msleep(100); + + return 0; +} + +static void icp10100_disable_regulator_action(void *data) +{ + struct icp10100_state *st = data; + int ret; + + ret = regulator_disable(st->vdd); + if (ret) + dev_err(&st->client->dev, "error %d disabling vdd ", ret); +} + +static void icp10100_pm_disable(void *data) +{ + struct device *dev = data; + + pm_runtime_put_sync_suspend(dev); + pm_runtime_disable(dev); +} + +static int icp10100_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct iio_dev *indio_dev; + struct icp10100_state *st; + int ret; + + if (!i2c_check_functionality(client->adapter, i2c_func_i2c)) { + dev_err(&client->dev, "plain i2c transactions not supported "); + return -enodev; + } + + indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st)); + if (!indio_dev) + return -enomem; + + i2c_set_clientdata(client, indio_dev); + indio_dev->dev.parent = &client->dev; + indio_dev->name = client->name; + indio_dev->modes = indio_direct_mode; + indio_dev->channels = icp10100_channels; + indio_dev->num_channels = array_size(icp10100_channels); + indio_dev->info = &icp10100_info; + + st = iio_priv(indio_dev); + mutex_init(&st->lock); + st->client = client; + st->mode = icp10100_mode_n; + + st->vdd = devm_regulator_get(&client->dev, "vdd"); + if (is_err(st->vdd)) + return ptr_err(st->vdd); + + ret = icp10100_enable_regulator(st); + if (ret) + return ret; + + ret = devm_add_action_or_reset(&client->dev, + icp10100_disable_regulator_action, st); + if (ret) + return ret; + + /* has to be done before the first i2c communication */ + crc8_populate_msb(icp10100_crc8_table, icp10100_crc8_polynomial); + + ret = icp10100_init_chip(st); + if (ret) { + dev_err(&client->dev, "init chip error %d ", ret); + return ret; + } + + /* enable runtime pm with autosuspend delay of 2s */ + pm_runtime_get_noresume(&client->dev); + pm_runtime_set_active(&client->dev); + pm_runtime_enable(&client->dev); + pm_runtime_set_autosuspend_delay(&client->dev, 2000); + pm_runtime_use_autosuspend(&client->dev); + pm_runtime_put(&client->dev); + ret = devm_add_action_or_reset(&client->dev, icp10100_pm_disable, + &client->dev); + if (ret) + return ret; + + return devm_iio_device_register(&client->dev, indio_dev); +} + +static int __maybe_unused icp10100_suspend(struct device *dev) +{ + struct icp10100_state *st = iio_priv(dev_get_drvdata(dev)); + int ret; + + mutex_lock(&st->lock); + ret = regulator_disable(st->vdd); + mutex_unlock(&st->lock); + + return ret; +} + +static int __maybe_unused icp10100_resume(struct device *dev) +{ + struct icp10100_state *st = iio_priv(dev_get_drvdata(dev)); + int ret; + + mutex_lock(&st->lock); + + ret = icp10100_enable_regulator(st); + if (ret) + goto out_unlock; + + /* reset chip */ + ret = icp10100_send_cmd(st, &icp10100_cmd_soft_reset, null, 0); + +out_unlock: + mutex_unlock(&st->lock); + return ret; +} + +static universal_dev_pm_ops(icp10100_pm, icp10100_suspend, icp10100_resume, + null); + +static const struct of_device_id icp10100_of_match[] = { + { + .compatible = "invensense,icp10100", + }, + { } +}; +module_device_table(of, icp10100_of_match); + +static const struct i2c_device_id icp10100_id[] = { + { "icp10100", 0 }, + { } +}; +module_device_table(i2c, icp10100_id); + +static struct i2c_driver icp10100_driver = { + .driver = { + .name = "icp10100", + .pm = &icp10100_pm, + .of_match_table = of_match_ptr(icp10100_of_match), + }, + .probe = icp10100_probe, + .id_table = icp10100_id, +}; +module_i2c_driver(icp10100_driver); + +module_author("invensense, inc."); +module_description("invensense icp10100 driver"); +module_license("gpl");
|
Industrial I/O (iio)
|
95c72b78c3365d8f949c3ae315e7b1ded912a6da
|
jean baptiste maneyrol
|
drivers
|
iio
|
pressure
|
iio: srf04: add power management feature
|
add suspend and resume operations for being used by optional power management.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add power management feature
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['srf04']
|
['c']
| 1
| 95
| 1
|
--- diff --git a/drivers/iio/proximity/srf04.c b/drivers/iio/proximity/srf04.c --- a/drivers/iio/proximity/srf04.c +++ b/drivers/iio/proximity/srf04.c +#include <linux/pm_runtime.h> + struct gpio_desc *gpiod_power; + int startup_time_ms; + if (data->gpiod_power) + pm_runtime_get_sync(data->dev); + + if (data->gpiod_power) { + pm_runtime_mark_last_busy(data->dev); + pm_runtime_put_autosuspend(data->dev); + } + + data->gpiod_power = devm_gpiod_get_optional(dev, "power", + gpiod_out_low); + if (is_err(data->gpiod_power)) { + dev_err(dev, "failed to get power-gpios: err=%ld ", + ptr_err(data->gpiod_power)); + return ptr_err(data->gpiod_power); + } + if (data->gpiod_power) { + + if (of_property_read_u32(dev->of_node, "startup-time-ms", + &data->startup_time_ms)) + data->startup_time_ms = 100; + dev_dbg(dev, "using power gpio: startup-time-ms=%d ", + data->startup_time_ms); + } + - return devm_iio_device_register(dev, indio_dev); + ret = iio_device_register(indio_dev); + if (ret < 0) { + dev_err(data->dev, "iio_device_register: %d ", ret); + return ret; + } + + if (data->gpiod_power) { + pm_runtime_set_autosuspend_delay(data->dev, 1000); + pm_runtime_use_autosuspend(data->dev); + + ret = pm_runtime_set_active(data->dev); + if (ret) { + dev_err(data->dev, "pm_runtime_set_active: %d ", ret); + iio_device_unregister(indio_dev); + } + + pm_runtime_enable(data->dev); + pm_runtime_idle(data->dev); + } + + return ret; +static int srf04_remove(struct platform_device *pdev) +{ + struct iio_dev *indio_dev = platform_get_drvdata(pdev); + struct srf04_data *data = iio_priv(indio_dev); + + iio_device_unregister(indio_dev); + + if (data->gpiod_power) { + pm_runtime_disable(data->dev); + pm_runtime_set_suspended(data->dev); + } + + return 0; +} + +static int __maybe_unused srf04_pm_runtime_suspend(struct device *dev) +{ + struct platform_device *pdev = container_of(dev, + struct platform_device, dev); + struct iio_dev *indio_dev = platform_get_drvdata(pdev); + struct srf04_data *data = iio_priv(indio_dev); + + gpiod_set_value(data->gpiod_power, 0); + + return 0; +} + +static int __maybe_unused srf04_pm_runtime_resume(struct device *dev) +{ + struct platform_device *pdev = container_of(dev, + struct platform_device, dev); + struct iio_dev *indio_dev = platform_get_drvdata(pdev); + struct srf04_data *data = iio_priv(indio_dev); + + gpiod_set_value(data->gpiod_power, 1); + msleep(data->startup_time_ms); + + return 0; +} + +static const struct dev_pm_ops srf04_pm_ops = { + set_runtime_pm_ops(srf04_pm_runtime_suspend, + srf04_pm_runtime_resume, null) +}; + + .remove = srf04_remove, + .pm = &srf04_pm_ops,
|
Industrial I/O (iio)
|
2251157b335b46bb3ea36994301f906e32e2d2b0
|
andreas klinger
|
drivers
|
iio
|
proximity
|
iio: temperature: add support for azoteq iqs620at temperature sensor
|
this patch adds support for the azoteq iqs620at temperature sensor, capable of reporting its absolute die temperature.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add support for azoteq iqs620at temperature sensor
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['temperature']
|
['kconfig', 'c', 'makefile']
| 3
| 108
| 0
|
--- diff --git a/drivers/iio/temperature/kconfig b/drivers/iio/temperature/kconfig --- a/drivers/iio/temperature/kconfig +++ b/drivers/iio/temperature/kconfig +config iqs620at_temp + tristate "azoteq iqs620at temperature sensor" + depends on mfd_iqs62x || compile_test + help + say y here if you want to build support for the azoteq iqs620at + temperature sensor. + + to compile this driver as a module, choose m here: the module + will be called iqs620at-temp. + diff --git a/drivers/iio/temperature/makefile b/drivers/iio/temperature/makefile --- a/drivers/iio/temperature/makefile +++ b/drivers/iio/temperature/makefile +obj-$(config_iqs620at_temp) += iqs620at-temp.o diff --git a/drivers/iio/temperature/iqs620at-temp.c b/drivers/iio/temperature/iqs620at-temp.c --- /dev/null +++ b/drivers/iio/temperature/iqs620at-temp.c +// spdx-license-identifier: gpl-2.0+ +/* + * azoteq iqs620at temperature sensor + * + * copyright (c) 2019 jeff labundy <jeff@labundy.com> + */ + +#include <linux/device.h> +#include <linux/iio/iio.h> +#include <linux/kernel.h> +#include <linux/mfd/iqs62x.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> + +#define iqs620_temp_ui_out 0x1a + +#define iqs620_temp_scale 1000 +#define iqs620_temp_offset (-100) + +static int iqs620_temp_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, int *val2, long mask) +{ + struct iqs62x_core *iqs62x = iio_device_get_drvdata(indio_dev); + int ret; + __le16 val_buf; + + switch (mask) { + case iio_chan_info_raw: + ret = regmap_raw_read(iqs62x->regmap, iqs620_temp_ui_out, + &val_buf, sizeof(val_buf)); + if (ret) + return ret; + + *val = le16_to_cpu(val_buf); + return iio_val_int; + + case iio_chan_info_scale: + *val = iqs620_temp_scale; + return iio_val_int; + + case iio_chan_info_offset: + *val = iqs620_temp_offset; + return iio_val_int; + + default: + return -einval; + } +} + +static const struct iio_info iqs620_temp_info = { + .read_raw = &iqs620_temp_read_raw, +}; + +static const struct iio_chan_spec iqs620_temp_channels[] = { + { + .type = iio_temp, + .info_mask_separate = bit(iio_chan_info_raw) | + bit(iio_chan_info_scale) | + bit(iio_chan_info_offset), + }, +}; + +static int iqs620_temp_probe(struct platform_device *pdev) +{ + struct iqs62x_core *iqs62x = dev_get_drvdata(pdev->dev.parent); + struct iio_dev *indio_dev; + + indio_dev = devm_iio_device_alloc(&pdev->dev, 0); + if (!indio_dev) + return -enomem; + + iio_device_set_drvdata(indio_dev, iqs62x); + + indio_dev->modes = indio_direct_mode; + indio_dev->dev.parent = &pdev->dev; + indio_dev->channels = iqs620_temp_channels; + indio_dev->num_channels = array_size(iqs620_temp_channels); + indio_dev->name = iqs62x->dev_desc->dev_name; + indio_dev->info = &iqs620_temp_info; + + return devm_iio_device_register(&pdev->dev, indio_dev); +} + +static struct platform_driver iqs620_temp_platform_driver = { + .driver = { + .name = "iqs620at-temp", + }, + .probe = iqs620_temp_probe, +}; +module_platform_driver(iqs620_temp_platform_driver); + +module_author("jeff labundy <jeff@labundy.com>"); +module_description("azoteq iqs620at temperature sensor"); +module_license("gpl"); +module_alias("platform:iqs620at-temp");
|
Industrial I/O (iio)
|
8ba447109af4e0bcbc38fac1b134f207c66ab39e
|
jeff labundy jonathan cameron jonathan cameron huawei com
|
drivers
|
iio
|
temperature
|
iio: trigger: stm32-timer: add power management support
|
add suspend/resume pm sleep ops to stm32-timer-trigger driver. register contents may be lost depending on low power modes. when going to low power, enforce the timer isn't active. gracefully restore its state upon resume in case it's been left enabled prior to suspend.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add power management support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['trigger', 'stm32-timer']
|
['c']
| 1
| 63
| 0
|
--- diff --git a/drivers/iio/trigger/stm32-timer-trigger.c b/drivers/iio/trigger/stm32-timer-trigger.c --- a/drivers/iio/trigger/stm32-timer-trigger.c +++ b/drivers/iio/trigger/stm32-timer-trigger.c +struct stm32_timer_trigger_regs { + u32 cr1; + u32 cr2; + u32 psc; + u32 arr; + u32 cnt; + u32 smcr; +}; + + struct stm32_timer_trigger_regs bak; +static int __maybe_unused stm32_timer_trigger_suspend(struct device *dev) +{ + struct stm32_timer_trigger *priv = dev_get_drvdata(dev); + + /* only take care of enabled timer: don't disturb other mfd child */ + if (priv->enabled) { + /* backup registers that may get lost in low power mode */ + regmap_read(priv->regmap, tim_cr1, &priv->bak.cr1); + regmap_read(priv->regmap, tim_cr2, &priv->bak.cr2); + regmap_read(priv->regmap, tim_psc, &priv->bak.psc); + regmap_read(priv->regmap, tim_arr, &priv->bak.arr); + regmap_read(priv->regmap, tim_cnt, &priv->bak.cnt); + regmap_read(priv->regmap, tim_smcr, &priv->bak.smcr); + + /* disable the timer */ + regmap_update_bits(priv->regmap, tim_cr1, tim_cr1_cen, 0); + clk_disable(priv->clk); + } + + return 0; +} + +static int __maybe_unused stm32_timer_trigger_resume(struct device *dev) +{ + struct stm32_timer_trigger *priv = dev_get_drvdata(dev); + int ret; + + if (priv->enabled) { + ret = clk_enable(priv->clk); + if (ret) + return ret; + + /* restore master/slave modes */ + regmap_write(priv->regmap, tim_smcr, priv->bak.smcr); + regmap_write(priv->regmap, tim_cr2, priv->bak.cr2); + + /* restore sampling_frequency (trgo / trgo2 triggers) */ + regmap_write(priv->regmap, tim_psc, priv->bak.psc); + regmap_write(priv->regmap, tim_arr, priv->bak.arr); + regmap_write(priv->regmap, tim_cnt, priv->bak.cnt); + + /* also re-enables the timer */ + regmap_write(priv->regmap, tim_cr1, priv->bak.cr1); + } + + return 0; +} + +static simple_dev_pm_ops(stm32_timer_trigger_pm_ops, + stm32_timer_trigger_suspend, + stm32_timer_trigger_resume); + + .pm = &stm32_timer_trigger_pm_ops,
|
Industrial I/O (iio)
|
736e19e684b3359b61740f3b75014c375c57bf9d
|
fabrice gasnier
|
drivers
|
iio
|
trigger
|
iio: vcnl4000: enable runtime pm for vcnl4200/4040
|
this is modelled after the vcnl4035 driver. for the vcnl40{0,1,2}0 we don't do anything since they use on demand measurement.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
enable runtime pm for vcnl4200/4040
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['vcnl4000']
|
['c']
| 1
| 117
| 12
|
--- diff --git a/drivers/iio/light/vcnl4000.c b/drivers/iio/light/vcnl4000.c --- a/drivers/iio/light/vcnl4000.c +++ b/drivers/iio/light/vcnl4000.c +#include <linux/pm_runtime.h> +#define vcnl4000_sleep_delay_ms 2000 /* before we enter pm_runtime_suspend */ + + int (*set_power_state)(struct vcnl4000_data *data, bool on); +static int vcnl4000_set_power_state(struct vcnl4000_data *data, bool on) +{ + /* no suspend op */ + return 0; +} + - return 0; + return data->chip_spec->set_power_state(data, true); +static int vcnl4200_set_power_state(struct vcnl4000_data *data, bool on) +{ + u16 val = on ? 0 /* power on */ : 1 /* shut down */; + int ret; + + ret = i2c_smbus_write_word_data(data->client, vcnl4200_al_conf, val); + if (ret < 0) + return ret; + + ret = i2c_smbus_write_word_data(data->client, vcnl4200_ps_conf1, val); + if (ret < 0) + return ret; + + if (on) { + /* wait at least one integration cycle before fetching data */ + data->vcnl4200_al.last_measurement = ktime_get(); + data->vcnl4200_ps.last_measurement = ktime_get(); + } + + return 0; +} + - /* set defaults and enable both channels */ - ret = i2c_smbus_write_word_data(data->client, vcnl4200_al_conf, 0); - if (ret < 0) - return ret; - ret = i2c_smbus_write_word_data(data->client, vcnl4200_ps_conf1, 0); - if (ret < 0) - return ret; - - data->vcnl4200_al.last_measurement = ktime_set(0, 0); - data->vcnl4200_ps.last_measurement = ktime_set(0, 0); + ret = data->chip_spec->set_power_state(data, true); + if (ret < 0) + return ret; + + .set_power_state = vcnl4000_set_power_state, + .set_power_state = vcnl4000_set_power_state, + .set_power_state = vcnl4200_set_power_state, + .set_power_state = vcnl4200_set_power_state, +static int vcnl4000_set_pm_runtime_state(struct vcnl4000_data *data, bool on) +{ + struct device *dev = &data->client->dev; + int ret; + + if (on) { + ret = pm_runtime_get_sync(dev); + if (ret < 0) + pm_runtime_put_noidle(dev); + } else { + pm_runtime_mark_last_busy(dev); + ret = pm_runtime_put_autosuspend(dev); + } + + return ret; +} + + ret = vcnl4000_set_pm_runtime_state(data, true); + if (ret < 0) + return ret; + + vcnl4000_set_pm_runtime_state(data, false); - return devm_iio_device_register(&client->dev, indio_dev); + ret = pm_runtime_set_active(&client->dev); + if (ret < 0) + goto fail_poweroff; + + ret = iio_device_register(indio_dev); + if (ret < 0) + goto fail_poweroff; + + pm_runtime_enable(&client->dev); + pm_runtime_set_autosuspend_delay(&client->dev, vcnl4000_sleep_delay_ms); + pm_runtime_use_autosuspend(&client->dev); + + return 0; +fail_poweroff: + data->chip_spec->set_power_state(data, false); + return ret; +static int vcnl4000_remove(struct i2c_client *client) +{ + struct iio_dev *indio_dev = i2c_get_clientdata(client); + struct vcnl4000_data *data = iio_priv(indio_dev); + + pm_runtime_dont_use_autosuspend(&client->dev); + pm_runtime_disable(&client->dev); + iio_device_unregister(indio_dev); + pm_runtime_set_suspended(&client->dev); + + return data->chip_spec->set_power_state(data, false); +} + +static int __maybe_unused vcnl4000_runtime_suspend(struct device *dev) +{ + struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); + struct vcnl4000_data *data = iio_priv(indio_dev); + + return data->chip_spec->set_power_state(data, false); +} + +static int __maybe_unused vcnl4000_runtime_resume(struct device *dev) +{ + struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); + struct vcnl4000_data *data = iio_priv(indio_dev); + + return data->chip_spec->set_power_state(data, true); +} + +static const struct dev_pm_ops vcnl4000_pm_ops = { + set_system_sleep_pm_ops(pm_runtime_force_suspend, + pm_runtime_force_resume) + set_runtime_pm_ops(vcnl4000_runtime_suspend, + vcnl4000_runtime_resume, null) +}; + + .pm = &vcnl4000_pm_ops, + .remove = vcnl4000_remove,
|
Industrial I/O (iio)
|
5e00708df3816d47d0de8b3837a33d64ff3582ed
|
guido g nther
|
drivers
|
iio
|
light
|
mfd: add support for azoteq iqs620a/621/622/624/625
|
this patch adds core support for the azoteq iqs620a, iqs621, iqs622, iqs624 and iqs625 multi-function sensors.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add support for azoteq iqs620a/621/622/624/625
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
[]
|
['h', 'kconfig', 'c', 'makefile']
| 4
| 1,216
| 0
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--- diff --git a/drivers/mfd/kconfig b/drivers/mfd/kconfig --- a/drivers/mfd/kconfig +++ b/drivers/mfd/kconfig +config mfd_iqs62x + tristate "azoteq iqs620a/621/622/624/625 core support" + depends on i2c + select mfd_core + select regmap_i2c + help + say y here if you want to build core support for the azoteq iqs620a, + iqs621, iqs622, iqs624 and iqs625 multi-function sensors. additional + options must be selected to enable device-specific functions. + + to compile this driver as a module, choose m here: the module will + be called iqs62x. + diff --git a/drivers/mfd/makefile b/drivers/mfd/makefile --- a/drivers/mfd/makefile +++ b/drivers/mfd/makefile +obj-$(config_mfd_iqs62x) += iqs62x.o diff --git a/drivers/mfd/iqs62x.c b/drivers/mfd/iqs62x.c --- /dev/null +++ b/drivers/mfd/iqs62x.c +// spdx-license-identifier: gpl-2.0+ +/* + * azoteq iqs620a/621/622/624/625 multi-function sensors + * + * copyright (c) 2019 jeff labundy <jeff@labundy.com> + * + * these devices rely on application-specific register settings and calibration + * data developed in and exported from a suite of guis offered by the vendor. a + * separate tool converts the guis' ascii-based output into a standard firmware + * file parsed by the driver. + * + * link to datasheets and guis: https://www.azoteq.com/ + * + * link to conversion tool: https://github.com/jlabundy/iqs62x-h2bin.git + */ + +#include <linux/completion.h> +#include <linux/delay.h> +#include <linux/device.h> +#include <linux/err.h> +#include <linux/firmware.h> +#include <linux/i2c.h> +#include <linux/interrupt.h> +#include <linux/kernel.h> +#include <linux/list.h> +#include <linux/mfd/core.h> +#include <linux/mfd/iqs62x.h> +#include <linux/module.h> +#include <linux/notifier.h> +#include <linux/of_device.h> +#include <linux/property.h> +#include <linux/regmap.h> +#include <linux/slab.h> +#include <asm/unaligned.h> + +#define iqs62x_prod_num 0x00 + +#define iqs62x_sys_flags 0x10 +#define iqs62x_sys_flags_in_ati bit(2) + +#define iqs620_hall_flags 0x16 +#define iqs621_hall_flags 0x19 +#define iqs622_hall_flags iqs621_hall_flags + +#define iqs624_interval_num 0x18 +#define iqs625_interval_num 0x12 + +#define iqs622_prox_settings_4 0x48 +#define iqs620_prox_settings_4 0x50 +#define iqs620_prox_settings_4_sar_en bit(7) + +#define iqs621_als_cal_div_lux 0x82 +#define iqs621_als_cal_div_ir 0x83 + +#define iqs620_temp_cal_mult 0xc2 +#define iqs620_temp_cal_div 0xc3 +#define iqs620_temp_cal_offs 0xc4 + +#define iqs62x_sys_settings 0xd0 +#define iqs62x_sys_settings_soft_reset bit(7) +#define iqs62x_sys_settings_ack_reset bit(6) +#define iqs62x_sys_settings_event_mode bit(5) +#define iqs62x_sys_settings_clk_div bit(4) +#define iqs62x_sys_settings_redo_ati bit(1) + +#define iqs62x_pwr_settings 0xd2 +#define iqs62x_pwr_settings_dis_auto bit(5) +#define iqs62x_pwr_settings_pwr_mode_mask (bit(4) | bit(3)) +#define iqs62x_pwr_settings_pwr_mode_halt (bit(4) | bit(3)) +#define iqs62x_pwr_settings_pwr_mode_norm 0 + +#define iqs62x_otp_cmd 0xf0 +#define iqs62x_otp_cmd_fg3 0x13 +#define iqs62x_otp_data 0xf1 +#define iqs62x_max_reg 0xff + +#define iqs62x_hall_cal_mask genmask(3, 0) + +#define iqs62x_fw_rec_type_info 0 +#define iqs62x_fw_rec_type_prod 1 +#define iqs62x_fw_rec_type_hall 2 +#define iqs62x_fw_rec_type_mask 3 +#define iqs62x_fw_rec_type_data 4 + +#define iqs62x_ati_poll_sleep_us 10000 +#define iqs62x_ati_poll_timeout_us 500000 +#define iqs62x_ati_stable_delay_ms 150 + +struct iqs62x_fw_rec { + u8 type; + u8 addr; + u8 len; + u8 data; +} __packed; + +struct iqs62x_fw_blk { + struct list_head list; + u8 addr; + u8 mask; + u8 len; + u8 data[]; +}; + +struct iqs62x_info { + u8 prod_num; + u8 sw_num; + u8 hw_num; +} __packed; + +static int iqs62x_dev_init(struct iqs62x_core *iqs62x) +{ + struct iqs62x_fw_blk *fw_blk; + unsigned int val; + int ret; + u8 clk_div = 1; + + list_for_each_entry(fw_blk, &iqs62x->fw_blk_head, list) { + if (fw_blk->mask) + ret = regmap_update_bits(iqs62x->regmap, fw_blk->addr, + fw_blk->mask, *fw_blk->data); + else + ret = regmap_raw_write(iqs62x->regmap, fw_blk->addr, + fw_blk->data, fw_blk->len); + if (ret) + return ret; + } + + switch (iqs62x->dev_desc->prod_num) { + case iqs620_prod_num: + case iqs622_prod_num: + ret = regmap_read(iqs62x->regmap, + iqs62x->dev_desc->prox_settings, &val); + if (ret) + return ret; + + if (val & iqs620_prox_settings_4_sar_en) + iqs62x->ui_sel = iqs62x_ui_sar1; + + /* fall through */ + + case iqs621_prod_num: + ret = regmap_write(iqs62x->regmap, iqs620_glbl_event_mask, + iqs620_glbl_event_mask_pmu | + iqs62x->dev_desc->prox_mask | + iqs62x->dev_desc->sar_mask | + iqs62x->dev_desc->hall_mask | + iqs62x->dev_desc->hyst_mask | + iqs62x->dev_desc->temp_mask | + iqs62x->dev_desc->als_mask | + iqs62x->dev_desc->ir_mask); + if (ret) + return ret; + break; + + default: + ret = regmap_write(iqs62x->regmap, iqs624_hall_ui, + iqs624_hall_ui_whl_event | + iqs624_hall_ui_int_event | + iqs624_hall_ui_auto_cal); + if (ret) + return ret; + + /* + * the iqs625 default interval divider is below the minimum + * permissible value, and the datasheet mandates that it is + * corrected during initialization (unless an updated value + * has already been provided by firmware). + * + * to protect against an unacceptably low user-entered value + * stored in the firmware, the same check is extended to the + * iqs624 as well. + */ + ret = regmap_read(iqs62x->regmap, iqs624_interval_div, &val); + if (ret) + return ret; + + if (val >= iqs62x->dev_desc->interval_div) + break; + + ret = regmap_write(iqs62x->regmap, iqs624_interval_div, + iqs62x->dev_desc->interval_div); + if (ret) + return ret; + } + + ret = regmap_read(iqs62x->regmap, iqs62x_sys_settings, &val); + if (ret) + return ret; + + if (val & iqs62x_sys_settings_clk_div) + clk_div = iqs62x->dev_desc->clk_div; + + ret = regmap_write(iqs62x->regmap, iqs62x_sys_settings, val | + iqs62x_sys_settings_ack_reset | + iqs62x_sys_settings_event_mode | + iqs62x_sys_settings_redo_ati); + if (ret) + return ret; + + ret = regmap_read_poll_timeout(iqs62x->regmap, iqs62x_sys_flags, val, + !(val & iqs62x_sys_flags_in_ati), + iqs62x_ati_poll_sleep_us, + iqs62x_ati_poll_timeout_us * clk_div); + if (ret) + return ret; + + msleep(iqs62x_ati_stable_delay_ms * clk_div); + + return 0; +} + +static int iqs62x_firmware_parse(struct iqs62x_core *iqs62x, + const struct firmware *fw) +{ + struct i2c_client *client = iqs62x->client; + struct iqs62x_fw_rec *fw_rec; + struct iqs62x_fw_blk *fw_blk; + unsigned int val; + size_t pos = 0; + int ret = 0; + u8 mask, len, *data; + u8 hall_cal_index = 0; + + while (pos < fw->size) { + if (pos + sizeof(*fw_rec) > fw->size) { + ret = -einval; + break; + } + fw_rec = (struct iqs62x_fw_rec *)(fw->data + pos); + pos += sizeof(*fw_rec); + + if (pos + fw_rec->len - 1 > fw->size) { + ret = -einval; + break; + } + pos += fw_rec->len - 1; + + switch (fw_rec->type) { + case iqs62x_fw_rec_type_info: + continue; + + case iqs62x_fw_rec_type_prod: + if (fw_rec->data == iqs62x->dev_desc->prod_num) + continue; + + dev_err(&client->dev, + "incompatible product number: 0x%02x ", + fw_rec->data); + ret = -einval; + break; + + case iqs62x_fw_rec_type_hall: + if (!hall_cal_index) { + ret = regmap_write(iqs62x->regmap, + iqs62x_otp_cmd, + iqs62x_otp_cmd_fg3); + if (ret) + break; + + ret = regmap_read(iqs62x->regmap, + iqs62x_otp_data, &val); + if (ret) + break; + + hall_cal_index = val & iqs62x_hall_cal_mask; + if (!hall_cal_index) { + dev_err(&client->dev, + "uncalibrated device "); + ret = -enodata; + break; + } + } + + if (hall_cal_index > fw_rec->len) { + ret = -einval; + break; + } + + mask = 0; + data = &fw_rec->data + hall_cal_index - 1; + len = sizeof(*data); + break; + + case iqs62x_fw_rec_type_mask: + if (fw_rec->len < (sizeof(mask) + sizeof(*data))) { + ret = -einval; + break; + } + + mask = fw_rec->data; + data = &fw_rec->data + sizeof(mask); + len = sizeof(*data); + break; + + case iqs62x_fw_rec_type_data: + mask = 0; + data = &fw_rec->data; + len = fw_rec->len; + break; + + default: + dev_err(&client->dev, + "unrecognized record type: 0x%02x ", + fw_rec->type); + ret = -einval; + } + + if (ret) + break; + + fw_blk = devm_kzalloc(&client->dev, + struct_size(fw_blk, data, len), + gfp_kernel); + if (!fw_blk) { + ret = -enomem; + break; + } + + fw_blk->addr = fw_rec->addr; + fw_blk->mask = mask; + fw_blk->len = len; + memcpy(fw_blk->data, data, len); + + list_add(&fw_blk->list, &iqs62x->fw_blk_head); + } + + release_firmware(fw); + + return ret; +} + +const struct iqs62x_event_desc iqs62x_events[iqs62x_num_events] = { + [iqs62x_event_prox_ch0_t] = { + .reg = iqs62x_event_prox, + .mask = bit(4), + .val = bit(4), + }, + [iqs62x_event_prox_ch0_p] = { + .reg = iqs62x_event_prox, + .mask = bit(0), + .val = bit(0), + }, + [iqs62x_event_prox_ch1_t] = { + .reg = iqs62x_event_prox, + .mask = bit(5), + .val = bit(5), + }, + [iqs62x_event_prox_ch1_p] = { + .reg = iqs62x_event_prox, + .mask = bit(1), + .val = bit(1), + }, + [iqs62x_event_prox_ch2_t] = { + .reg = iqs62x_event_prox, + .mask = bit(6), + .val = bit(6), + }, + [iqs62x_event_prox_ch2_p] = { + .reg = iqs62x_event_prox, + .mask = bit(2), + .val = bit(2), + }, + [iqs62x_event_hyst_pos_t] = { + .reg = iqs62x_event_hyst, + .mask = bit(6) | bit(7), + .val = bit(6), + }, + [iqs62x_event_hyst_pos_p] = { + .reg = iqs62x_event_hyst, + .mask = bit(5) | bit(7), + .val = bit(5), + }, + [iqs62x_event_hyst_neg_t] = { + .reg = iqs62x_event_hyst, + .mask = bit(6) | bit(7), + .val = bit(6) | bit(7), + }, + [iqs62x_event_hyst_neg_p] = { + .reg = iqs62x_event_hyst, + .mask = bit(5) | bit(7), + .val = bit(5) | bit(7), + }, + [iqs62x_event_sar1_act] = { + .reg = iqs62x_event_hyst, + .mask = bit(4), + .val = bit(4), + }, + [iqs62x_event_sar1_qrd] = { + .reg = iqs62x_event_hyst, + .mask = bit(2), + .val = bit(2), + }, + [iqs62x_event_sar1_move] = { + .reg = iqs62x_event_hyst, + .mask = bit(1), + .val = bit(1), + }, + [iqs62x_event_sar1_halt] = { + .reg = iqs62x_event_hyst, + .mask = bit(0), + .val = bit(0), + }, + [iqs62x_event_wheel_up] = { + .reg = iqs62x_event_wheel, + .mask = bit(7) | bit(6), + .val = bit(7), + }, + [iqs62x_event_wheel_dn] = { + .reg = iqs62x_event_wheel, + .mask = bit(7) | bit(6), + .val = bit(7) | bit(6), + }, + [iqs62x_event_hall_n_t] = { + .reg = iqs62x_event_hall, + .mask = bit(2) | bit(0), + .val = bit(2), + }, + [iqs62x_event_hall_n_p] = { + .reg = iqs62x_event_hall, + .mask = bit(1) | bit(0), + .val = bit(1), + }, + [iqs62x_event_hall_s_t] = { + .reg = iqs62x_event_hall, + .mask = bit(2) | bit(0), + .val = bit(2) | bit(0), + }, + [iqs62x_event_hall_s_p] = { + .reg = iqs62x_event_hall, + .mask = bit(1) | bit(0), + .val = bit(1) | bit(0), + }, + [iqs62x_event_sys_reset] = { + .reg = iqs62x_event_sys, + .mask = bit(7), + .val = bit(7), + }, +}; +export_symbol_gpl(iqs62x_events); + +static irqreturn_t iqs62x_irq(int irq, void *context) +{ + struct iqs62x_core *iqs62x = context; + struct i2c_client *client = iqs62x->client; + struct iqs62x_event_data event_data; + struct iqs62x_event_desc event_desc; + enum iqs62x_event_reg event_reg; + unsigned long event_flags = 0; + int ret, i, j; + u8 event_map[iqs62x_event_size]; + + /* + * the device asserts the rdy output to signal the beginning of a + * communication window, which is closed by an i2c stop condition. + * as such, all interrupt status is captured in a single read and + * broadcast to any interested sub-device drivers. + */ + ret = regmap_raw_read(iqs62x->regmap, iqs62x_sys_flags, event_map, + sizeof(event_map)); + if (ret) { + dev_err(&client->dev, "failed to read device status: %d ", + ret); + return irq_none; + } + + for (i = 0; i < sizeof(event_map); i++) { + event_reg = iqs62x->dev_desc->event_regs[iqs62x->ui_sel][i]; + + switch (event_reg) { + case iqs62x_event_ui_lo: + event_data.ui_data = get_unaligned_le16(&event_map[i]); + + /* fall through */ + + case iqs62x_event_ui_hi: + case iqs62x_event_none: + continue; + + case iqs62x_event_als: + event_data.als_flags = event_map[i]; + continue; + + case iqs62x_event_ir: + event_data.ir_flags = event_map[i]; + continue; + + case iqs62x_event_inter: + event_data.interval = event_map[i]; + continue; + + case iqs62x_event_hyst: + event_map[i] <<= iqs62x->dev_desc->hyst_shift; + + /* fall through */ + + case iqs62x_event_wheel: + case iqs62x_event_hall: + case iqs62x_event_prox: + case iqs62x_event_sys: + break; + } + + for (j = 0; j < iqs62x_num_events; j++) { + event_desc = iqs62x_events[j]; + + if (event_desc.reg != event_reg) + continue; + + if ((event_map[i] & event_desc.mask) == event_desc.val) + event_flags |= bit(j); + } + } + + /* + * the device resets itself in response to the i2c master stalling + * communication past a fixed timeout. in this case, all registers + * are restored and any interested sub-device drivers are notified. + */ + if (event_flags & bit(iqs62x_event_sys_reset)) { + dev_err(&client->dev, "unexpected device reset "); + + ret = iqs62x_dev_init(iqs62x); + if (ret) { + dev_err(&client->dev, + "failed to re-initialize device: %d ", ret); + return irq_none; + } + } + + ret = blocking_notifier_call_chain(&iqs62x->nh, event_flags, + &event_data); + if (ret & notify_stop_mask) + return irq_none; + + /* + * once the communication window is closed, a small delay is added to + * ensure the device's rdy output has been deasserted by the time the + * interrupt handler returns. + */ + usleep_range(50, 100); + + return irq_handled; +} + +static void iqs62x_firmware_load(const struct firmware *fw, void *context) +{ + struct iqs62x_core *iqs62x = context; + struct i2c_client *client = iqs62x->client; + int ret; + + if (fw) { + ret = iqs62x_firmware_parse(iqs62x, fw); + if (ret) { + dev_err(&client->dev, "failed to parse firmware: %d ", + ret); + goto err_out; + } + } + + ret = iqs62x_dev_init(iqs62x); + if (ret) { + dev_err(&client->dev, "failed to initialize device: %d ", ret); + goto err_out; + } + + ret = devm_request_threaded_irq(&client->dev, client->irq, + null, iqs62x_irq, irqf_oneshot, + client->name, iqs62x); + if (ret) { + dev_err(&client->dev, "failed to request irq: %d ", ret); + goto err_out; + } + + ret = devm_mfd_add_devices(&client->dev, platform_devid_none, + iqs62x->dev_desc->sub_devs, + iqs62x->dev_desc->num_sub_devs, + null, 0, null); + if (ret) + dev_err(&client->dev, "failed to add sub-devices: %d ", ret); + +err_out: + complete_all(&iqs62x->fw_done); +} + +static const struct mfd_cell iqs620at_sub_devs[] = { + { + .name = "iqs62x-keys", + .of_compatible = "azoteq,iqs620a-keys", + }, + { + .name = "iqs620a-pwm", + .of_compatible = "azoteq,iqs620a-pwm", + }, + { .name = "iqs620at-temp", }, +}; + +static const struct mfd_cell iqs620a_sub_devs[] = { + { + .name = "iqs62x-keys", + .of_compatible = "azoteq,iqs620a-keys", + }, + { + .name = "iqs620a-pwm", + .of_compatible = "azoteq,iqs620a-pwm", + }, +}; + +static const struct mfd_cell iqs621_sub_devs[] = { + { + .name = "iqs62x-keys", + .of_compatible = "azoteq,iqs621-keys", + }, + { .name = "iqs621-als", }, +}; + +static const struct mfd_cell iqs622_sub_devs[] = { + { + .name = "iqs62x-keys", + .of_compatible = "azoteq,iqs622-keys", + }, + { .name = "iqs621-als", }, +}; + +static const struct mfd_cell iqs624_sub_devs[] = { + { + .name = "iqs62x-keys", + .of_compatible = "azoteq,iqs624-keys", + }, + { .name = "iqs624-pos", }, +}; + +static const struct mfd_cell iqs625_sub_devs[] = { + { + .name = "iqs62x-keys", + .of_compatible = "azoteq,iqs625-keys", + }, + { .name = "iqs624-pos", }, +}; + +static const u8 iqs620at_cal_regs[] = { + iqs620_temp_cal_mult, + iqs620_temp_cal_div, + iqs620_temp_cal_offs, +}; + +static const u8 iqs621_cal_regs[] = { + iqs621_als_cal_div_lux, + iqs621_als_cal_div_ir, +}; + +static const enum iqs62x_event_reg iqs620a_event_regs[][iqs62x_event_size] = { + [iqs62x_ui_prox] = { + iqs62x_event_sys, /* 0x10 */ + iqs62x_event_none, + iqs62x_event_prox, /* 0x12 */ + iqs62x_event_hyst, /* 0x13 */ + iqs62x_event_none, + iqs62x_event_none, + iqs62x_event_hall, /* 0x16 */ + iqs62x_event_none, + iqs62x_event_none, + iqs62x_event_none, + }, + [iqs62x_ui_sar1] = { + iqs62x_event_sys, /* 0x10 */ + iqs62x_event_none, + iqs62x_event_none, + iqs62x_event_hyst, /* 0x13 */ + iqs62x_event_none, + iqs62x_event_none, + iqs62x_event_hall, /* 0x16 */ + iqs62x_event_none, + iqs62x_event_none, + iqs62x_event_none, + }, +}; + +static const enum iqs62x_event_reg iqs621_event_regs[][iqs62x_event_size] = { + [iqs62x_ui_prox] = { + iqs62x_event_sys, /* 0x10 */ + iqs62x_event_none, + iqs62x_event_prox, /* 0x12 */ + iqs62x_event_hyst, /* 0x13 */ + iqs62x_event_none, + iqs62x_event_none, + iqs62x_event_als, /* 0x16 */ + iqs62x_event_ui_lo, /* 0x17 */ + iqs62x_event_ui_hi, /* 0x18 */ + iqs62x_event_hall, /* 0x19 */ + }, +}; + +static const enum iqs62x_event_reg iqs622_event_regs[][iqs62x_event_size] = { + [iqs62x_ui_prox] = { + iqs62x_event_sys, /* 0x10 */ + iqs62x_event_none, + iqs62x_event_prox, /* 0x12 */ + iqs62x_event_none, + iqs62x_event_als, /* 0x14 */ + iqs62x_event_none, + iqs62x_event_ir, /* 0x16 */ + iqs62x_event_ui_lo, /* 0x17 */ + iqs62x_event_ui_hi, /* 0x18 */ + iqs62x_event_hall, /* 0x19 */ + }, + [iqs62x_ui_sar1] = { + iqs62x_event_sys, /* 0x10 */ + iqs62x_event_none, + iqs62x_event_none, + iqs62x_event_hyst, /* 0x13 */ + iqs62x_event_als, /* 0x14 */ + iqs62x_event_none, + iqs62x_event_ir, /* 0x16 */ + iqs62x_event_ui_lo, /* 0x17 */ + iqs62x_event_ui_hi, /* 0x18 */ + iqs62x_event_hall, /* 0x19 */ + }, +}; + +static const enum iqs62x_event_reg iqs624_event_regs[][iqs62x_event_size] = { + [iqs62x_ui_prox] = { + iqs62x_event_sys, /* 0x10 */ + iqs62x_event_none, + iqs62x_event_prox, /* 0x12 */ + iqs62x_event_none, + iqs62x_event_wheel, /* 0x14 */ + iqs62x_event_none, + iqs62x_event_ui_lo, /* 0x16 */ + iqs62x_event_ui_hi, /* 0x17 */ + iqs62x_event_inter, /* 0x18 */ + iqs62x_event_none, + }, +}; + +static const enum iqs62x_event_reg iqs625_event_regs[][iqs62x_event_size] = { + [iqs62x_ui_prox] = { + iqs62x_event_sys, /* 0x10 */ + iqs62x_event_prox, /* 0x11 */ + iqs62x_event_inter, /* 0x12 */ + iqs62x_event_none, + iqs62x_event_none, + iqs62x_event_none, + iqs62x_event_none, + iqs62x_event_none, + iqs62x_event_none, + iqs62x_event_none, + }, +}; + +static const struct iqs62x_dev_desc iqs62x_devs[] = { + { + .dev_name = "iqs620at", + .sub_devs = iqs620at_sub_devs, + .num_sub_devs = array_size(iqs620at_sub_devs), + + .prod_num = iqs620_prod_num, + .sw_num = 0x08, + .cal_regs = iqs620at_cal_regs, + .num_cal_regs = array_size(iqs620at_cal_regs), + + .prox_mask = bit(0), + .sar_mask = bit(1) | bit(7), + .hall_mask = bit(2), + .hyst_mask = bit(3), + .temp_mask = bit(4), + + .prox_settings = iqs620_prox_settings_4, + .hall_flags = iqs620_hall_flags, + + .clk_div = 4, + .fw_name = "iqs620a.bin", + .event_regs = &iqs620a_event_regs[iqs62x_ui_prox], + }, + { + .dev_name = "iqs620a", + .sub_devs = iqs620a_sub_devs, + .num_sub_devs = array_size(iqs620a_sub_devs), + + .prod_num = iqs620_prod_num, + .sw_num = 0x08, + + .prox_mask = bit(0), + .sar_mask = bit(1) | bit(7), + .hall_mask = bit(2), + .hyst_mask = bit(3), + .temp_mask = bit(4), + + .prox_settings = iqs620_prox_settings_4, + .hall_flags = iqs620_hall_flags, + + .clk_div = 4, + .fw_name = "iqs620a.bin", + .event_regs = &iqs620a_event_regs[iqs62x_ui_prox], + }, + { + .dev_name = "iqs621", + .sub_devs = iqs621_sub_devs, + .num_sub_devs = array_size(iqs621_sub_devs), + + .prod_num = iqs621_prod_num, + .sw_num = 0x09, + .cal_regs = iqs621_cal_regs, + .num_cal_regs = array_size(iqs621_cal_regs), + + .prox_mask = bit(0), + .hall_mask = bit(1), + .als_mask = bit(2), + .hyst_mask = bit(3), + .temp_mask = bit(4), + + .als_flags = iqs621_als_flags, + .hall_flags = iqs621_hall_flags, + .hyst_shift = 5, + + .clk_div = 2, + .fw_name = "iqs621.bin", + .event_regs = &iqs621_event_regs[iqs62x_ui_prox], + }, + { + .dev_name = "iqs622", + .sub_devs = iqs622_sub_devs, + .num_sub_devs = array_size(iqs622_sub_devs), + + .prod_num = iqs622_prod_num, + .sw_num = 0x06, + + .prox_mask = bit(0), + .sar_mask = bit(1), + .hall_mask = bit(2), + .als_mask = bit(3), + .ir_mask = bit(4), + + .prox_settings = iqs622_prox_settings_4, + .als_flags = iqs622_als_flags, + .hall_flags = iqs622_hall_flags, + + .clk_div = 2, + .fw_name = "iqs622.bin", + .event_regs = &iqs622_event_regs[iqs62x_ui_prox], + }, + { + .dev_name = "iqs624", + .sub_devs = iqs624_sub_devs, + .num_sub_devs = array_size(iqs624_sub_devs), + + .prod_num = iqs624_prod_num, + .sw_num = 0x0b, + + .interval = iqs624_interval_num, + .interval_div = 3, + + .clk_div = 2, + .fw_name = "iqs624.bin", + .event_regs = &iqs624_event_regs[iqs62x_ui_prox], + }, + { + .dev_name = "iqs625", + .sub_devs = iqs625_sub_devs, + .num_sub_devs = array_size(iqs625_sub_devs), + + .prod_num = iqs625_prod_num, + .sw_num = 0x0b, + + .interval = iqs625_interval_num, + .interval_div = 10, + + .clk_div = 2, + .fw_name = "iqs625.bin", + .event_regs = &iqs625_event_regs[iqs62x_ui_prox], + }, +}; + +static const struct regmap_config iqs62x_map_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = iqs62x_max_reg, +}; + +static int iqs62x_probe(struct i2c_client *client) +{ + struct iqs62x_core *iqs62x; + struct iqs62x_info info; + unsigned int val; + int ret, i, j; + u8 sw_num = 0; + const char *fw_name = null; + + iqs62x = devm_kzalloc(&client->dev, sizeof(*iqs62x), gfp_kernel); + if (!iqs62x) + return -enomem; + + i2c_set_clientdata(client, iqs62x); + iqs62x->client = client; + + blocking_init_notifier_head(&iqs62x->nh); + init_list_head(&iqs62x->fw_blk_head); + init_completion(&iqs62x->fw_done); + + iqs62x->regmap = devm_regmap_init_i2c(client, &iqs62x_map_config); + if (is_err(iqs62x->regmap)) { + ret = ptr_err(iqs62x->regmap); + dev_err(&client->dev, "failed to initialize register map: %d ", + ret); + return ret; + } + + ret = regmap_raw_read(iqs62x->regmap, iqs62x_prod_num, &info, + sizeof(info)); + if (ret) + return ret; + + /* + * the following sequence validates the device's product and software + * numbers. it then determines if the device is factory-calibrated by + * checking for nonzero values in the device's designated calibration + * registers (if applicable). depending on the device, the absence of + * calibration data indicates a reduced feature set or invalid device. + * + * for devices given in both calibrated and uncalibrated versions, the + * calibrated version (e.g. iqs620at) appears first in the iqs62x_devs + * array. the uncalibrated version (e.g. iqs620a) appears next and has + * the same product and software numbers, but no calibration registers + * are specified. + */ + for (i = 0; i < array_size(iqs62x_devs); i++) { + if (info.prod_num != iqs62x_devs[i].prod_num) + continue; + + iqs62x->dev_desc = &iqs62x_devs[i]; + + if (info.sw_num < iqs62x->dev_desc->sw_num) + continue; + + sw_num = info.sw_num; + + /* + * read each of the device's designated calibration registers, + * if any, and exit from the inner loop early if any are equal + * to zero (indicating the device is uncalibrated). this could + * be acceptable depending on the device (e.g. iqs620a instead + * of iqs620at). + */ + for (j = 0; j < iqs62x->dev_desc->num_cal_regs; j++) { + ret = regmap_read(iqs62x->regmap, + iqs62x->dev_desc->cal_regs[j], &val); + if (ret) + return ret; + + if (!val) + break; + } + + /* + * if the number of nonzero values read from the device equals + * the number of designated calibration registers (which could + * be zero), exit from the outer loop early to signal that the + * device's product and software numbers match a known device, + * and the device is calibrated (if applicable). + */ + if (j == iqs62x->dev_desc->num_cal_regs) + break; + } + + if (!iqs62x->dev_desc) { + dev_err(&client->dev, "unrecognized product number: 0x%02x ", + info.prod_num); + return -einval; + } + + if (!sw_num) { + dev_err(&client->dev, "unrecognized software number: 0x%02x ", + info.sw_num); + return -einval; + } + + if (i == array_size(iqs62x_devs)) { + dev_err(&client->dev, "uncalibrated device "); + return -enodata; + } + + device_property_read_string(&client->dev, "firmware-name", &fw_name); + + ret = request_firmware_nowait(this_module, fw_action_hotplug, + fw_name ? : iqs62x->dev_desc->fw_name, + &client->dev, gfp_kernel, iqs62x, + iqs62x_firmware_load); + if (ret) + dev_err(&client->dev, "failed to request firmware: %d ", ret); + + return ret; +} + +static int iqs62x_remove(struct i2c_client *client) +{ + struct iqs62x_core *iqs62x = i2c_get_clientdata(client); + + wait_for_completion(&iqs62x->fw_done); + + return 0; +} + +static int __maybe_unused iqs62x_suspend(struct device *dev) +{ + struct iqs62x_core *iqs62x = dev_get_drvdata(dev); + int ret; + + wait_for_completion(&iqs62x->fw_done); + + /* + * as per the datasheet, automatic mode switching must be disabled + * before the device is placed in or taken out of halt mode. + */ + ret = regmap_update_bits(iqs62x->regmap, iqs62x_pwr_settings, + iqs62x_pwr_settings_dis_auto, 0xff); + if (ret) + return ret; + + return regmap_update_bits(iqs62x->regmap, iqs62x_pwr_settings, + iqs62x_pwr_settings_pwr_mode_mask, + iqs62x_pwr_settings_pwr_mode_halt); +} + +static int __maybe_unused iqs62x_resume(struct device *dev) +{ + struct iqs62x_core *iqs62x = dev_get_drvdata(dev); + int ret; + + ret = regmap_update_bits(iqs62x->regmap, iqs62x_pwr_settings, + iqs62x_pwr_settings_pwr_mode_mask, + iqs62x_pwr_settings_pwr_mode_norm); + if (ret) + return ret; + + return regmap_update_bits(iqs62x->regmap, iqs62x_pwr_settings, + iqs62x_pwr_settings_dis_auto, 0); +} + +static simple_dev_pm_ops(iqs62x_pm, iqs62x_suspend, iqs62x_resume); + +static const struct of_device_id iqs62x_of_match[] = { + { .compatible = "azoteq,iqs620a" }, + { .compatible = "azoteq,iqs621" }, + { .compatible = "azoteq,iqs622" }, + { .compatible = "azoteq,iqs624" }, + { .compatible = "azoteq,iqs625" }, + { } +}; +module_device_table(of, iqs62x_of_match); + +static struct i2c_driver iqs62x_i2c_driver = { + .driver = { + .name = "iqs62x", + .of_match_table = iqs62x_of_match, + .pm = &iqs62x_pm, + }, + .probe_new = iqs62x_probe, + .remove = iqs62x_remove, +}; +module_i2c_driver(iqs62x_i2c_driver); + +module_author("jeff labundy <jeff@labundy.com>"); +module_description("azoteq iqs620a/621/622/624/625 multi-function sensors"); +module_license("gpl"); diff --git a/include/linux/mfd/iqs62x.h b/include/linux/mfd/iqs62x.h --- /dev/null +++ b/include/linux/mfd/iqs62x.h +/* spdx-license-identifier: gpl-2.0+ */ +/* + * azoteq iqs620a/621/622/624/625 multi-function sensors + * + * copyright (c) 2019 jeff labundy <jeff@labundy.com> + */ + +#ifndef __linux_mfd_iqs62x_h +#define __linux_mfd_iqs62x_h + +#define iqs620_prod_num 0x41 +#define iqs621_prod_num 0x46 +#define iqs622_prod_num 0x42 +#define iqs624_prod_num 0x43 +#define iqs625_prod_num 0x4e + +#define iqs621_als_flags 0x16 +#define iqs622_als_flags 0x14 + +#define iqs624_hall_ui 0x70 +#define iqs624_hall_ui_whl_event bit(4) +#define iqs624_hall_ui_int_event bit(3) +#define iqs624_hall_ui_auto_cal bit(2) + +#define iqs624_interval_div 0x7d + +#define iqs620_glbl_event_mask 0xd7 +#define iqs620_glbl_event_mask_pmu bit(6) + +#define iqs62x_num_keys 16 +#define iqs62x_num_events (iqs62x_num_keys + 5) + +#define iqs62x_event_size 10 + +enum iqs62x_ui_sel { + iqs62x_ui_prox, + iqs62x_ui_sar1, +}; + +enum iqs62x_event_reg { + iqs62x_event_none, + iqs62x_event_sys, + iqs62x_event_prox, + iqs62x_event_hyst, + iqs62x_event_hall, + iqs62x_event_als, + iqs62x_event_ir, + iqs62x_event_wheel, + iqs62x_event_inter, + iqs62x_event_ui_lo, + iqs62x_event_ui_hi, +}; + +enum iqs62x_event_flag { + /* keys */ + iqs62x_event_prox_ch0_t, + iqs62x_event_prox_ch0_p, + iqs62x_event_prox_ch1_t, + iqs62x_event_prox_ch1_p, + iqs62x_event_prox_ch2_t, + iqs62x_event_prox_ch2_p, + iqs62x_event_hyst_pos_t, + iqs62x_event_hyst_pos_p, + iqs62x_event_hyst_neg_t, + iqs62x_event_hyst_neg_p, + iqs62x_event_sar1_act, + iqs62x_event_sar1_qrd, + iqs62x_event_sar1_move, + iqs62x_event_sar1_halt, + iqs62x_event_wheel_up, + iqs62x_event_wheel_dn, + + /* switches */ + iqs62x_event_hall_n_t, + iqs62x_event_hall_n_p, + iqs62x_event_hall_s_t, + iqs62x_event_hall_s_p, + + /* everything else */ + iqs62x_event_sys_reset, +}; + +struct iqs62x_event_data { + u16 ui_data; + u8 als_flags; + u8 ir_flags; + u8 interval; +}; + +struct iqs62x_event_desc { + enum iqs62x_event_reg reg; + u8 mask; + u8 val; +}; + +struct iqs62x_dev_desc { + const char *dev_name; + const struct mfd_cell *sub_devs; + int num_sub_devs; + + u8 prod_num; + u8 sw_num; + const u8 *cal_regs; + int num_cal_regs; + + u8 prox_mask; + u8 sar_mask; + u8 hall_mask; + u8 hyst_mask; + u8 temp_mask; + u8 als_mask; + u8 ir_mask; + + u8 prox_settings; + u8 als_flags; + u8 hall_flags; + u8 hyst_shift; + + u8 interval; + u8 interval_div; + + u8 clk_div; + const char *fw_name; + const enum iqs62x_event_reg (*event_regs)[iqs62x_event_size]; +}; + +struct iqs62x_core { + const struct iqs62x_dev_desc *dev_desc; + struct i2c_client *client; + struct regmap *regmap; + struct blocking_notifier_head nh; + struct list_head fw_blk_head; + struct completion fw_done; + enum iqs62x_ui_sel ui_sel; +}; + +extern const struct iqs62x_event_desc iqs62x_events[iqs62x_num_events]; + +#endif /* __linux_mfd_iqs62x_h */
|
Multi Function Devices (MFD)
|
4d9cf7df8d355e519adb8b2f8759c84e1e633070
|
jeff labundy
|
include
|
linux
|
mfd
|
mfd: sc27xx: add usb charger type detection support
|
the spreadtrum sc27xx series pmics supply the usb charger type detection function, and related registers are located on the pmic global registers region, thus we implement and export this function in the mfd driver for users to get the usb charger type.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add usb charger type detection support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['sc27xx']
|
['h', 'c']
| 2
| 59
| 0
|
--- diff --git a/drivers/mfd/sprd-sc27xx-spi.c b/drivers/mfd/sprd-sc27xx-spi.c --- a/drivers/mfd/sprd-sc27xx-spi.c +++ b/drivers/mfd/sprd-sc27xx-spi.c +#include <uapi/linux/usb/charger.h> +#define sprd_sc2731_chg_det 0xedc + +/* pmic charger detection definition */ +#define sprd_pmic_chg_det_delay_us 200000 +#define sprd_pmic_chg_det_timeout 2000000 +#define sprd_pmic_chg_det_done bit(11) +#define sprd_pmic_sdp_type bit(7) +#define sprd_pmic_dcp_type bit(6) +#define sprd_pmic_cdp_type bit(5) +#define sprd_pmic_chg_type_mask genmask(7, 5) + const struct sprd_pmic_data *pdata; + u32 charger_det; + .charger_det = sprd_sc2731_chg_det, +enum usb_charger_type sprd_pmic_detect_charger_type(struct device *dev) +{ + struct spi_device *spi = to_spi_device(dev); + struct sprd_pmic *ddata = spi_get_drvdata(spi); + const struct sprd_pmic_data *pdata = ddata->pdata; + enum usb_charger_type type; + u32 val; + int ret; + + ret = regmap_read_poll_timeout(ddata->regmap, pdata->charger_det, val, + (val & sprd_pmic_chg_det_done), + sprd_pmic_chg_det_delay_us, + sprd_pmic_chg_det_timeout); + if (ret) { + dev_err(&spi->dev, "failed to detect charger type "); + return unknown_type; + } + + switch (val & sprd_pmic_chg_type_mask) { + case sprd_pmic_cdp_type: + type = cdp_type; + break; + case sprd_pmic_dcp_type: + type = dcp_type; + break; + case sprd_pmic_sdp_type: + type = sdp_type; + break; + default: + type = unknown_type; + break; + } + + return type; +} +export_symbol_gpl(sprd_pmic_detect_charger_type); + + ddata->pdata = pdata; diff --git a/include/linux/mfd/sc27xx-pmic.h b/include/linux/mfd/sc27xx-pmic.h --- /dev/null +++ b/include/linux/mfd/sc27xx-pmic.h +/* spdx-license-identifier: gpl-2.0 */ +#ifndef __linux_mfd_sc27xx_pmic_h +#define __linux_mfd_sc27xx_pmic_h + +extern enum usb_charger_type sprd_pmic_detect_charger_type(struct device *dev); + +#endif /* __linux_mfd_sc27xx_pmic_h */
|
Multi Function Devices (MFD)
|
2a7e7274f3d43d2a072cab25c0035dc994903bb9
|
baolin wang
|
include
|
linux
|
mfd
|
mfd: intel-lpss: add intel comet lake pch-v pci ids
|
intel comet lake pch-v has the same lpss than intel kaby lake. add the new ids to the list of supported devices.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add intel comet lake pch-v pci ids
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['intel-lpss']
|
['c']
| 1
| 10
| 0
|
--- diff --git a/drivers/mfd/intel-lpss-pci.c b/drivers/mfd/intel-lpss-pci.c --- a/drivers/mfd/intel-lpss-pci.c +++ b/drivers/mfd/intel-lpss-pci.c + /* cml-v */ + { pci_vdevice(intel, 0xa3a7), (kernel_ulong_t)&spt_uart_info }, + { pci_vdevice(intel, 0xa3a8), (kernel_ulong_t)&spt_uart_info }, + { pci_vdevice(intel, 0xa3a9), (kernel_ulong_t)&spt_info }, + { pci_vdevice(intel, 0xa3aa), (kernel_ulong_t)&spt_info }, + { pci_vdevice(intel, 0xa3e0), (kernel_ulong_t)&spt_i2c_info }, + { pci_vdevice(intel, 0xa3e1), (kernel_ulong_t)&spt_i2c_info }, + { pci_vdevice(intel, 0xa3e2), (kernel_ulong_t)&spt_i2c_info }, + { pci_vdevice(intel, 0xa3e3), (kernel_ulong_t)&spt_i2c_info }, + { pci_vdevice(intel, 0xa3e6), (kernel_ulong_t)&spt_uart_info },
|
Multi Function Devices (MFD)
|
4e213b45d2b50f0254fd5a840db0f8c11be99766
|
andy shevchenko
|
drivers
|
mfd
| |
pwm: tegra: add support for tegra194
|
tegra194 has multiple pwm controllers with each having only one output.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add support for tegra194
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['tegra']
|
['txt', 'c']
| 2
| 7
| 0
|
--- diff --git a/documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt b/documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt --- a/documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt +++ b/documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt - "nvidia,tegra132-pwm", "nvidia,tegra20-pwm": for tegra132 - "nvidia,tegra210-pwm", "nvidia,tegra20-pwm": for tegra210 - "nvidia,tegra186-pwm": for tegra186 + - "nvidia,tegra194-pwm": for tegra194 - reg: physical base address and length of the controller's registers - #pwm-cells: should be 2. see pwm.yaml in this directory for a description of diff --git a/drivers/pwm/pwm-tegra.c b/drivers/pwm/pwm-tegra.c --- a/drivers/pwm/pwm-tegra.c +++ b/drivers/pwm/pwm-tegra.c +static const struct tegra_pwm_soc tegra194_pwm_soc = { + .num_channels = 1, + .max_frequency = 408000000ul, +}; + + { .compatible = "nvidia,tegra194-pwm", .data = &tegra194_pwm_soc },
|
Pulse-Width Modulation (PWM)
|
2d0c08fcd67c23cf8433344544fb5a6c059c2572
|
sandipan patra
|
documentation
|
devicetree
|
bindings, pwm
|
pwm: jz4740: use clocks from tcu driver
|
the ingenic-timer "tcu" driver provides us with clocks, that can be (un)gated, reparented or reclocked from devicetree, instead of having these settings hardcoded in this driver.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
use clocks from tcu driver
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['jz4740']
|
['kconfig', 'c']
| 2
| 41
| 14
|
--- diff --git a/drivers/pwm/kconfig b/drivers/pwm/kconfig --- a/drivers/pwm/kconfig +++ b/drivers/pwm/kconfig + depends on common_clk diff --git a/drivers/pwm/pwm-jz4740.c b/drivers/pwm/pwm-jz4740.c --- a/drivers/pwm/pwm-jz4740.c +++ b/drivers/pwm/pwm-jz4740.c - struct clk *clk; + struct jz4740_pwm_chip *jz = to_jz4740(chip); + struct clk *clk; + char name[16]; + int err; + - jz4740_timer_start(pwm->hwpwm); + snprintf(name, sizeof(name), "timer%u", pwm->hwpwm); + + clk = clk_get(chip->dev, name); + if (is_err(clk)) { + if (ptr_err(clk) != -eprobe_defer) + dev_err(chip->dev, "failed to get clock: %pe", clk); + + return ptr_err(clk); + } + + err = clk_prepare_enable(clk); + if (err < 0) { + clk_put(clk); + return err; + } + + pwm_set_chip_data(pwm, clk); - jz4740_timer_set_ctrl(pwm->hwpwm, 0); + struct clk *clk = pwm_get_chip_data(pwm); - jz4740_timer_stop(pwm->hwpwm); + clk_disable_unprepare(clk); + clk_put(clk); + struct clk *clk = pwm_get_chip_data(pwm), + *parent_clk = clk_get_parent(clk); + unsigned long rate, period, duty; - unsigned long period, duty; + int err; - tmp = (unsigned long long)clk_get_rate(jz4740->clk) * state->period; + rate = clk_get_rate(parent_clk); + tmp = (unsigned long long)rate * state->period; + rate >>= 2; ++prescaler; + err = clk_set_rate(clk, rate); + if (err) { + dev_err(chip->dev, "unable to set rate: %d", err); + return err; + } + - ctrl = jz_timer_ctrl_prescaler(prescaler) | jz_timer_ctrl_src_ext | - jz_timer_ctrl_pwm_abbrupt_shutdown; - - jz4740_timer_set_ctrl(pwm->hwpwm, ctrl); + ctrl = jz4740_timer_get_ctrl(pwm->hwpwm); + ctrl |= jz_timer_ctrl_pwm_abbrupt_shutdown; - jz4740->clk = devm_clk_get(&pdev->dev, "ext"); - if (is_err(jz4740->clk)) - return ptr_err(jz4740->clk); -
|
Pulse-Width Modulation (PWM)
|
ce1f9cece057843a03a6b9de361a03eb37dd3fac
|
paul cercueil
|
drivers
|
pwm
| |
i3c: add a modalias sysfs attribute
|
create a modalias sysfs attribute for i3c devices.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
allow to automatically load i3c modules
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['i3c']
|
['c']
| 1
| 22
| 0
|
--- diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c --- a/drivers/i3c/master.c +++ b/drivers/i3c/master.c +static ssize_t modalias_show(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct i3c_device *i3c = dev_to_i3cdev(dev); + struct i3c_device_info devinfo; + u16 manuf, part, ext; + + i3c_device_get_info(i3c, &devinfo); + manuf = i3c_pid_manuf_id(devinfo.pid); + part = i3c_pid_part_id(devinfo.pid); + ext = i3c_pid_extra_info(devinfo.pid); + + if (i3c_pid_rnd_lower_32bits(devinfo.pid)) + return sprintf(buf, "i3c:dcr%02xmanuf%04x", devinfo.dcr, + manuf); + + return sprintf(buf, "i3c:dcr%02xmanuf%04xpart%04xext%04x", + devinfo.dcr, manuf, part, ext); +} +static device_attr_ro(modalias); + + &dev_attr_modalias.attr,
|
Inter-Integrated Circuit (I2C + I3C)
|
7ec0ddb007cf2bdc4531b5100f35c084028d4587
|
boris brezillon
|
drivers
|
i3c
| |
i3c: generate aliases for i3c modules
|
this part was missing, thus preventing user space from loading modules automatically when modalias uevents are received.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
allow to automatically load i3c modules
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['i3c']
|
['c']
| 2
| 26
| 0
|
--- diff --git a/scripts/mod/devicetable-offsets.c b/scripts/mod/devicetable-offsets.c --- a/scripts/mod/devicetable-offsets.c +++ b/scripts/mod/devicetable-offsets.c + devid(i3c_device_id); + devid_field(i3c_device_id, match_flags); + devid_field(i3c_device_id, dcr); + devid_field(i3c_device_id, manuf_id); + devid_field(i3c_device_id, part_id); + devid_field(i3c_device_id, extra_info); + diff --git a/scripts/mod/file2alias.c b/scripts/mod/file2alias.c --- a/scripts/mod/file2alias.c +++ b/scripts/mod/file2alias.c +static int do_i3c_entry(const char *filename, void *symval, + char *alias) +{ + def_field(symval, i3c_device_id, match_flags); + def_field(symval, i3c_device_id, dcr); + def_field(symval, i3c_device_id, manuf_id); + def_field(symval, i3c_device_id, part_id); + def_field(symval, i3c_device_id, extra_info); + + strcpy(alias, "i3c:"); + add(alias, "dcr", match_flags & i3c_match_dcr, dcr); + add(alias, "manuf", match_flags & i3c_match_manuf, manuf_id); + add(alias, "part", match_flags & i3c_match_part, part_id); + add(alias, "ext", match_flags & i3c_match_extra_info, extra_info); + + return 1; +} + + {"i3c", size_i3c_device_id, do_i3c_entry},
|
Inter-Integrated Circuit (I2C + I3C)
|
1ce589ad3933aa15c1a2abbb5b5e3ad5de330423
|
boris brezillon
|
scripts
|
mod
| |
i2c: brcmstb: support bcm2711 hdmi bsc controllers
|
the hdmi blocks in the bcm2771 have an i2c controller to retrieve the edid. this block is split into two parts, the bsc and the auto_i2c, lying in two separate register areas.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
support bcm2711 hdmi bsc controllers
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['i2c', 'brcmstb']
|
['c']
| 1
| 33
| 0
|
--- diff --git a/drivers/i2c/busses/i2c-brcmstb.c b/drivers/i2c/busses/i2c-brcmstb.c --- a/drivers/i2c/busses/i2c-brcmstb.c +++ b/drivers/i2c/busses/i2c-brcmstb.c +#define autoi2c_ctrl0 0x26c +#define autoi2c_ctrl0_release_bsc bit(1) + +static int bcm2711_release_bsc(struct brcmstb_i2c_dev *dev) +{ + struct platform_device *pdev = to_platform_device(dev->device); + struct resource *iomem; + void __iomem *autoi2c; + + /* map hardware registers */ + iomem = platform_get_resource_byname(pdev, ioresource_mem, "auto-i2c"); + autoi2c = devm_ioremap_resource(&pdev->dev, iomem); + if (is_err(autoi2c)) + return ptr_err(autoi2c); + + writel(autoi2c_ctrl0_release_bsc, autoi2c + autoi2c_ctrl0); + devm_iounmap(&pdev->dev, autoi2c); + + /* we need to reset the controller after the release */ + dev->bsc_regmap->iic_enable = 0; + bsc_writel(dev, dev->bsc_regmap->iic_enable, iic_enable); + + return 0; +} + + if (of_device_is_compatible(dev->device->of_node, + "brcm,bcm2711-hdmi-i2c")) { + rc = bcm2711_release_bsc(dev); + if (rc) + goto probe_errorout; + } + + {.compatible = "brcm,bcm2711-hdmi-i2c"},
|
Inter-Integrated Circuit (I2C + I3C)
|
d31f59eabea120b9ad149691f8314ce1b55a59ba
|
maxime ripard
|
drivers
|
i2c
|
busses
|
hwmon: (adt7475) add attenuator bypass support
|
added support for reading dts properties to set attenuators on device probe for the adt7473, adt7475, adt7476, and adt7490.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add attenuator bypass support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['adt7475']
|
['c']
| 1
| 58
| 3
|
--- diff --git a/drivers/hwmon/adt7475.c b/drivers/hwmon/adt7475.c --- a/drivers/hwmon/adt7475.c +++ b/drivers/hwmon/adt7475.c +#include <linux/of.h> + u8 config2; +static int set_property_bit(const struct i2c_client *client, char *property, + u8 *config, u8 bit_index) +{ + u32 prop_value = 0; + int ret = of_property_read_u32(client->dev.of_node, property, + &prop_value); + + if (!ret) { + if (prop_value) + *config |= (1 << bit_index); + else + *config &= ~(1 << bit_index); + } + + return ret; +} + +static int load_attenuators(const struct i2c_client *client, int chip, + struct adt7475_data *data) +{ + int ret; + + if (chip == adt7476 || chip == adt7490) { + set_property_bit(client, "adi,bypass-attenuator-in0", + &data->config4, 4); + set_property_bit(client, "adi,bypass-attenuator-in1", + &data->config4, 5); + set_property_bit(client, "adi,bypass-attenuator-in3", + &data->config4, 6); + set_property_bit(client, "adi,bypass-attenuator-in4", + &data->config4, 7); + + ret = i2c_smbus_write_byte_data(client, reg_config4, + data->config4); + if (ret < 0) + return ret; + } else if (chip == adt7473 || chip == adt7475) { + set_property_bit(client, "adi,bypass-attenuator-in1", + &data->config2, 5); + + ret = i2c_smbus_write_byte_data(client, reg_config2, + data->config2); + if (ret < 0) + return ret; + } + + return 0; +} + - u8 config2, config3; + u8 config3; - config2 = adt7475_read(reg_config2); - if (config2 & config2_attn) { + data->config2 = adt7475_read(reg_config2); + ret = load_attenuators(client, chip, data); + if (ret) + dev_warn(&client->dev, "error configuring attenuator bypass "); + + if (data->config2 & config2_attn) {
|
Hardware monitoring (hwmon)
|
2ecff39791bd3b33c8dcf0d241fa740dba7b79e6
|
logan shaw
|
drivers
|
hwmon
| |
hwmon: (adt7475) add support for inverting pwm output
|
add a "adi,pwm-active-state" device-tree property to allow hardware designs to use inverted logic on the pwm output.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
add attenuator bypass support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
['adt7475']
|
['c']
| 1
| 34
| 0
|
--- diff --git a/drivers/hwmon/adt7475.c b/drivers/hwmon/adt7475.c --- a/drivers/hwmon/adt7475.c +++ b/drivers/hwmon/adt7475.c +static int adt7475_set_pwm_polarity(struct i2c_client *client) +{ + u32 states[adt7475_pwm_count]; + int ret, i; + u8 val; + + ret = of_property_read_u32_array(client->dev.of_node, + "adi,pwm-active-state", states, + array_size(states)); + if (ret) + return ret; + + for (i = 0; i < adt7475_pwm_count; i++) { + ret = adt7475_read(pwm_config_reg(i)); + if (ret < 0) + return ret; + val = ret; + if (states[i]) + val &= ~bit(4); + else + val |= bit(4); + + ret = i2c_smbus_write_byte_data(client, pwm_config_reg(i), val); + if (ret) + return ret; + } + + return 0; +} + + ret = adt7475_set_pwm_polarity(client); + if (ret && ret != -einval) + dev_warn(&client->dev, "error configuring pwm polarity "); +
|
Hardware monitoring (hwmon)
|
86da28eed4fbc64dfdc386337f6cbac36c9c1ed2
|
chris packham
|
drivers
|
hwmon
| |
hwmon: support adi fan control ip
|
the purpose of this ip core is to control the fan used for the cooling of a xilinx zynq ultrascale+ mpsoc without the need of any external temperature sensors. to achieve this, the ip core uses the pl sysmone4 primitive to obtain the pl temperature and, based on those readings, it then outputs a pwm signal to control the fan rotation accordingly.
|
this release adds: support for the notion of thermal pressure, which lets the task scheduler to take better scheduling decisions in the face of cpu frequency changes; support for frequency invariant scheduler accounting on x86 cpus, which makes x86 perform better with the schedutil governor; a new and better exfat file system implementation; support for a x86 feature that allows to detect atomic operations that span cache lines; arm pointer authentication support for kernel code, which helps to prevent security issues; support for spawning processes with clone3() into cgroups; write protection support in userfaultfd(), which is equivalent to (but faster than) using mprotect(2) and a sigsegv signal handler; and a bpf-based linux security module which allows for more dynamic security auditing. as always, there are many other new drivers and improvements.
|
support adi fan control ip
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'cryptography', 'virtualization', 'security', 'networking', 'architectures arm x86 risc-v s390 powerpc c-sky mips arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'input devices: tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'clock', 'phy ("physical layer" framework)', 'edac (error detection and correction)', 'modem host interface (mhi) bus', 'various']
|
[]
|
['kconfig', 'maintainers', 'c', 'makefile']
| 4
| 486
| 0
|
--- diff --git a/maintainers b/maintainers --- a/maintainers +++ b/maintainers +axi-fan-control hardware monitor driver +m: nuno sa <nuno.sa@analog.com> +w: http://ez.analog.com/community/linux-device-drivers +l: linux-hwmon@vger.kernel.org +s: supported +f: drivers/hwmon/axi-fan-control.c + diff --git a/drivers/hwmon/kconfig b/drivers/hwmon/kconfig --- a/drivers/hwmon/kconfig +++ b/drivers/hwmon/kconfig +config sensors_axi_fan_control + tristate "analog devices fan control hdl core driver" + help + if you say yes here you get support for the analog devices + axi hdl fan monitoring core. + + this driver can also be built as a module. if so, the module + will be called axi-fan-control + diff --git a/drivers/hwmon/makefile b/drivers/hwmon/makefile --- a/drivers/hwmon/makefile +++ b/drivers/hwmon/makefile +obj-$(config_sensors_axi_fan_control) += axi-fan-control.o diff --git a/drivers/hwmon/axi-fan-control.c b/drivers/hwmon/axi-fan-control.c --- /dev/null +++ b/drivers/hwmon/axi-fan-control.c +// spdx-license-identifier: gpl-2.0 +/* + * fan control hdl core driver + * + * copyright 2019 analog devices inc. + */ +#include <linux/bits.h> +#include <linux/clk.h> +#include <linux/fpga/adi-axi-common.h> +#include <linux/hwmon.h> +#include <linux/interrupt.h> +#include <linux/io.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/platform_device.h> + +#define adi_axi_pcore_ver_major(version) (((version) >> 16) & 0xff) +#define adi_axi_pcore_ver_minor(version) (((version) >> 8) & 0xff) +#define adi_axi_pcore_ver_patch(version) ((version) & 0xff) + +/* register map */ +#define adi_reg_rstn 0x0080 +#define adi_reg_pwm_width 0x0084 +#define adi_reg_tach_period 0x0088 +#define adi_reg_tach_tolerance 0x008c +#define adi_reg_pwm_period 0x00c0 +#define adi_reg_tach_measur 0x00c4 +#define adi_reg_temperature 0x00c8 + +#define adi_reg_irq_mask 0x0040 +#define adi_reg_irq_pending 0x0044 +#define adi_reg_irq_src 0x0048 + +/* irq sources */ +#define adi_irq_src_pwm_changed bit(0) +#define adi_irq_src_tach_err bit(1) +#define adi_irq_src_temp_increase bit(2) +#define adi_irq_src_new_measur bit(3) +#define adi_irq_src_mask genmask(3, 0) +#define adi_irq_mask_out_all 0xffffffffu + +#define sysfs_pwm_max 255 + +struct axi_fan_control_data { + void __iomem *base; + struct device *hdev; + unsigned long clk_rate; + int irq; + /* pulses per revolution */ + u32 ppr; + bool hw_pwm_req; + bool update_tacho_params; + u8 fan_fault; +}; + +static inline void axi_iowrite(const u32 val, const u32 reg, + const struct axi_fan_control_data *ctl) +{ + iowrite32(val, ctl->base + reg); +} + +static inline u32 axi_ioread(const u32 reg, + const struct axi_fan_control_data *ctl) +{ + return ioread32(ctl->base + reg); +} + +static long axi_fan_control_get_pwm_duty(const struct axi_fan_control_data *ctl) +{ + u32 pwm_width = axi_ioread(adi_reg_pwm_width, ctl); + u32 pwm_period = axi_ioread(adi_reg_pwm_period, ctl); + /* + * pwm_period is a ro register set by the core. it should never be 0. + * for now we are trusting the hw... + */ + return div_round_closest(pwm_width * sysfs_pwm_max, pwm_period); +} + +static int axi_fan_control_set_pwm_duty(const long val, + struct axi_fan_control_data *ctl) +{ + u32 pwm_period = axi_ioread(adi_reg_pwm_period, ctl); + u32 new_width; + long __val = clamp_val(val, 0, sysfs_pwm_max); + + new_width = div_round_closest(__val * pwm_period, sysfs_pwm_max); + + axi_iowrite(new_width, adi_reg_pwm_width, ctl); + + return 0; +} + +static long axi_fan_control_get_fan_rpm(const struct axi_fan_control_data *ctl) +{ + const u32 tach = axi_ioread(adi_reg_tach_measur, ctl); + + if (tach == 0) + /* should we return error, eagain maybe? */ + return 0; + /* + * the tacho period should be: + * tach = 60/(ppr * rpm), where rpm is revolutions per second + * and ppr is pulses per revolution. + * given the tacho period, we can multiply it by the input clock + * so that we know how many clocks we need to have this period. + * from this, we can derive the rpm value. + */ + return div_round_closest(60 * ctl->clk_rate, ctl->ppr * tach); +} + +static int axi_fan_control_read_temp(struct device *dev, u32 attr, long *val) +{ + struct axi_fan_control_data *ctl = dev_get_drvdata(dev); + long raw_temp; + + switch (attr) { + case hwmon_temp_input: + raw_temp = axi_ioread(adi_reg_temperature, ctl); + /* + * the formula for the temperature is: + * t = (adc * 501.3743 / 2^bits) - 273.6777 + * it's multiplied by 1000 to have millidegrees as + * specified by the hwmon sysfs interface. + */ + *val = ((raw_temp * 501374) >> 16) - 273677; + return 0; + default: + return -enotsupp; + } +} + +static int axi_fan_control_read_fan(struct device *dev, u32 attr, long *val) +{ + struct axi_fan_control_data *ctl = dev_get_drvdata(dev); + + switch (attr) { + case hwmon_fan_fault: + *val = ctl->fan_fault; + /* clear it now */ + ctl->fan_fault = 0; + return 0; + case hwmon_fan_input: + *val = axi_fan_control_get_fan_rpm(ctl); + return 0; + default: + return -enotsupp; + } +} + +static int axi_fan_control_read_pwm(struct device *dev, u32 attr, long *val) +{ + struct axi_fan_control_data *ctl = dev_get_drvdata(dev); + + switch (attr) { + case hwmon_pwm_input: + *val = axi_fan_control_get_pwm_duty(ctl); + return 0; + default: + return -enotsupp; + } +} + +static int axi_fan_control_write_pwm(struct device *dev, u32 attr, long val) +{ + struct axi_fan_control_data *ctl = dev_get_drvdata(dev); + + switch (attr) { + case hwmon_pwm_input: + return axi_fan_control_set_pwm_duty(val, ctl); + default: + return -enotsupp; + } +} + +static int axi_fan_control_read_labels(struct device *dev, + enum hwmon_sensor_types type, + u32 attr, int channel, const char **str) +{ + switch (type) { + case hwmon_fan: + *str = "fan"; + return 0; + case hwmon_temp: + *str = "sysmon4"; + return 0; + default: + return -enotsupp; + } +} + +static int axi_fan_control_read(struct device *dev, + enum hwmon_sensor_types type, + u32 attr, int channel, long *val) +{ + switch (type) { + case hwmon_fan: + return axi_fan_control_read_fan(dev, attr, val); + case hwmon_pwm: + return axi_fan_control_read_pwm(dev, attr, val); + case hwmon_temp: + return axi_fan_control_read_temp(dev, attr, val); + default: + return -enotsupp; + } +} + +static int axi_fan_control_write(struct device *dev, + enum hwmon_sensor_types type, + u32 attr, int channel, long val) +{ + switch (type) { + case hwmon_pwm: + return axi_fan_control_write_pwm(dev, attr, val); + default: + return -enotsupp; + } +} + +static umode_t axi_fan_control_fan_is_visible(const u32 attr) +{ + switch (attr) { + case hwmon_fan_input: + case hwmon_fan_fault: + case hwmon_fan_label: + return 0444; + default: + return 0; + } +} + +static umode_t axi_fan_control_pwm_is_visible(const u32 attr) +{ + switch (attr) { + case hwmon_pwm_input: + return 0644; + default: + return 0; + } +} + +static umode_t axi_fan_control_temp_is_visible(const u32 attr) +{ + switch (attr) { + case hwmon_temp_input: + case hwmon_temp_label: + return 0444; + default: + return 0; + } +} + +static umode_t axi_fan_control_is_visible(const void *data, + enum hwmon_sensor_types type, + u32 attr, int channel) +{ + switch (type) { + case hwmon_fan: + return axi_fan_control_fan_is_visible(attr); + case hwmon_pwm: + return axi_fan_control_pwm_is_visible(attr); + case hwmon_temp: + return axi_fan_control_temp_is_visible(attr); + default: + return 0; + } +} + +/* + * this core has two main ways of changing the pwm duty cycle. it is done, + * either by a request from userspace (writing on pwm1_input) or by the + * core itself. when the change is done by the core, it will use predefined + * parameters to evaluate the tach signal and, on that case we cannot set them. + * on the other hand, when the request is done by the user, with some arbitrary + * value that the core does not now about, we have to provide the tach + * parameters so that, the core can evaluate the signal. on the irq handler we + * distinguish this by using the adi_irq_src_temp_increase interrupt. this tell + * us that the core requested a new duty cycle. after this, there is 5s delay + * on which the core waits for the fan rotation speed to stabilize. after this + * we get adi_irq_src_pwm_changed irq where we will decide if we need to set + * the tach parameters or not on the next tach measurement cycle (corresponding + * already to the ney duty cycle) based on the %ctl->hw_pwm_req flag. + */ +static irqreturn_t axi_fan_control_irq_handler(int irq, void *data) +{ + struct axi_fan_control_data *ctl = (struct axi_fan_control_data *)data; + u32 irq_pending = axi_ioread(adi_reg_irq_pending, ctl); + u32 clear_mask; + + if (irq_pending & adi_irq_src_new_measur) { + if (ctl->update_tacho_params) { + u32 new_tach = axi_ioread(adi_reg_tach_measur, ctl); + + /* get 25% tolerance */ + u32 tach_tol = div_round_closest(new_tach * 25, 100); + /* set new tacho parameters */ + axi_iowrite(new_tach, adi_reg_tach_period, ctl); + axi_iowrite(tach_tol, adi_reg_tach_tolerance, ctl); + ctl->update_tacho_params = false; + } + } + + if (irq_pending & adi_irq_src_pwm_changed) { + /* + * if the pwm changes on behalf of software, + * we need to provide new tacho parameters to the core. + * wait for the next measurement for that... + */ + if (!ctl->hw_pwm_req) { + ctl->update_tacho_params = true; + } else { + ctl->hw_pwm_req = false; + sysfs_notify(&ctl->hdev->kobj, null, "pwm1"); + } + } + + if (irq_pending & adi_irq_src_temp_increase) + /* hardware requested a new pwm */ + ctl->hw_pwm_req = true; + + if (irq_pending & adi_irq_src_tach_err) + ctl->fan_fault = 1; + + /* clear all interrupts */ + clear_mask = irq_pending & adi_irq_src_mask; + axi_iowrite(clear_mask, adi_reg_irq_pending, ctl); + + return irq_handled; +} + +static int axi_fan_control_init(struct axi_fan_control_data *ctl, + const struct device_node *np) +{ + int ret; + + /* get fan pulses per revolution */ + ret = of_property_read_u32(np, "pulses-per-revolution", &ctl->ppr); + if (ret) + return ret; + + /* 1, 2 and 4 are the typical and accepted values */ + if (ctl->ppr != 1 && ctl->ppr != 2 && ctl->ppr != 4) + return -einval; + /* + * enable all irqs + */ + axi_iowrite(adi_irq_mask_out_all & + ~(adi_irq_src_new_measur | adi_irq_src_tach_err | + adi_irq_src_pwm_changed | adi_irq_src_temp_increase), + adi_reg_irq_mask, ctl); + + /* bring the device out of reset */ + axi_iowrite(0x01, adi_reg_rstn, ctl); + + return ret; +} + +static const struct hwmon_channel_info *axi_fan_control_info[] = { + hwmon_channel_info(pwm, hwmon_pwm_input), + hwmon_channel_info(fan, hwmon_f_input | hwmon_f_fault | hwmon_f_label), + hwmon_channel_info(temp, hwmon_t_input | hwmon_t_label), + null +}; + +static const struct hwmon_ops axi_fan_control_hwmon_ops = { + .is_visible = axi_fan_control_is_visible, + .read = axi_fan_control_read, + .write = axi_fan_control_write, + .read_string = axi_fan_control_read_labels, +}; + +static const struct hwmon_chip_info axi_chip_info = { + .ops = &axi_fan_control_hwmon_ops, + .info = axi_fan_control_info, +}; + +static const u32 version_1_0_0 = adi_axi_pcore_ver(1, 0, 'a'); + +static const struct of_device_id axi_fan_control_of_match[] = { + { .compatible = "adi,axi-fan-control-1.00.a", + .data = (void *)&version_1_0_0}, + {}, +}; +module_device_table(of, axi_fan_control_of_match); + +static int axi_fan_control_probe(struct platform_device *pdev) +{ + struct axi_fan_control_data *ctl; + struct clk *clk; + const struct of_device_id *id; + const char *name = "axi_fan_control"; + u32 version; + int ret; + + id = of_match_node(axi_fan_control_of_match, pdev->dev.of_node); + if (!id) + return -einval; + + ctl = devm_kzalloc(&pdev->dev, sizeof(*ctl), gfp_kernel); + if (!ctl) + return -enomem; + + ctl->base = devm_platform_ioremap_resource(pdev, 0); + if (is_err(ctl->base)) + return ptr_err(ctl->base); + + clk = devm_clk_get(&pdev->dev, null); + if (is_err(clk)) { + dev_err(&pdev->dev, "clk_get failed with %ld ", ptr_err(clk)); + return ptr_err(clk); + } + + ctl->clk_rate = clk_get_rate(clk); + if (!ctl->clk_rate) + return -einval; + + version = axi_ioread(adi_axi_reg_version, ctl); + if (adi_axi_pcore_ver_major(version) != + adi_axi_pcore_ver_major((*(u32 *)id->data))) { + dev_err(&pdev->dev, "major version mismatch. expected %d.%.2d.%c, reported %d.%.2d.%c ", + adi_axi_pcore_ver_major((*(u32 *)id->data)), + adi_axi_pcore_ver_minor((*(u32 *)id->data)), + adi_axi_pcore_ver_patch((*(u32 *)id->data)), + adi_axi_pcore_ver_major(version), + adi_axi_pcore_ver_minor(version), + adi_axi_pcore_ver_patch(version)); + return -enodev; + } + + ctl->irq = platform_get_irq(pdev, 0); + if (ctl->irq < 0) + return ctl->irq; + + ret = devm_request_threaded_irq(&pdev->dev, ctl->irq, null, + axi_fan_control_irq_handler, + irqf_oneshot | irqf_trigger_high, + pdev->driver_override, ctl); + if (ret) { + dev_err(&pdev->dev, "failed to request an irq, %d", ret); + return ret; + } + + ret = axi_fan_control_init(ctl, pdev->dev.of_node); + if (ret) { + dev_err(&pdev->dev, "failed to initialize device "); + return ret; + } + + ctl->hdev = devm_hwmon_device_register_with_info(&pdev->dev, + name, + ctl, + &axi_chip_info, + null); + + return ptr_err_or_zero(ctl->hdev); +} + +static struct platform_driver axi_fan_control_driver = { + .driver = { + .name = "axi_fan_control_driver", + .of_match_table = axi_fan_control_of_match, + }, + .probe = axi_fan_control_probe, +}; +module_platform_driver(axi_fan_control_driver); + +module_author("nuno sa <nuno.sa@analog.com>"); +module_description("analog devices fan control hdl core driver"); +module_license("gpl");
|
Hardware monitoring (hwmon)
|
8412b410fa5e1e494a0fec84c3c462d49870d3f5
|
nuno s
|
drivers
|
hwmon
|
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