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asoc: sgtl5000: add multi endpoint support
|
support multiple endpoints on sgtl5000 codec port when used in of_graph context.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add multi endpoint support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ', 'sgtl5000']
|
['c']
| 1
| 8
| 0
|
--- diff --git a/sound/soc/codecs/sgtl5000.c b/sound/soc/codecs/sgtl5000.c --- a/sound/soc/codecs/sgtl5000.c +++ b/sound/soc/codecs/sgtl5000.c +static int sgtl5000_of_xlate_dai_id(struct snd_soc_component *component, + struct device_node *endpoint) +{ + /* return dai id 0, whatever the endpoint index */ + return 0; +} + + .of_xlate_dai_id = sgtl5000_of_xlate_dai_id,
|
Audio
|
06bf8ea4f8ae34f91e60d27c8065f55d7a88c682
|
marek vasut
|
sound
|
soc
|
codecs
|
asoc: tlv320aic31xx: add hp output driver pop reduction controls
|
hp output driver has two parameters that can be configured to reduce pop noise: power-on delay and ramp-up step time. two new kcontrols have been added to set these parameters.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add hp output driver pop reduction controls
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ', 'tlv320aic31xx']
|
['c']
| 1
| 30
| 2
|
--- diff --git a/sound/soc/codecs/tlv320aic31xx.c b/sound/soc/codecs/tlv320aic31xx.c --- a/sound/soc/codecs/tlv320aic31xx.c +++ b/sound/soc/codecs/tlv320aic31xx.c +static const char * const hp_poweron_time_text[] = { + "0us", "15.3us", "153us", "1.53ms", "15.3ms", "76.2ms", + "153ms", "304ms", "610ms", "1.22s", "3.04s", "6.1s" }; + +static soc_enum_single_decl(hp_poweron_time_enum, aic31xx_hppop, 3, + hp_poweron_time_text); + +static const char * const hp_rampup_step_text[] = { + "0ms", "0.98ms", "1.95ms", "3.9ms" }; + +static soc_enum_single_decl(hp_rampup_step_enum, aic31xx_hppop, 1, + hp_rampup_step_text); + + + /* hp de-pop control: apply power not immediately but via ramp + * function with these psarameters. note that power up sequence + * has to wait for this to complete; this is implemented by + * polling hp driver status in aic31xx_dapm_power_event() + */ + soc_enum("hp output driver power-on time", hp_poweron_time_enum), + soc_enum("hp output driver ramp-up step", hp_rampup_step_enum), + unsigned int timeout = 500 * usec_per_msec; + if (event == snd_soc_dapm_post_pmu) + timeout = 7 * usec_per_sec; + if (event == snd_soc_dapm_post_pmu) + timeout = 7 * usec_per_sec; - return aic31xx_wait_bits(aic31xx, reg, mask, mask, 5000, 100); + return aic31xx_wait_bits(aic31xx, reg, mask, mask, + 5000, timeout / 5000); - return aic31xx_wait_bits(aic31xx, reg, mask, 0, 5000, 100); + return aic31xx_wait_bits(aic31xx, reg, mask, 0, + 5000, timeout / 5000);
|
Audio
|
0bb1306f22fb8da72f3d1ba63854489cc8cfe0dd
|
nikita yushchenko
|
sound
|
soc
|
codecs
|
asoc: tlv320aic31xx: add volume soft stepping control
|
chip supports soft stepping of volume changes and it is enabled by default.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add volume soft stepping control
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ', 'tlv320aic31xx']
|
['c', 'h']
| 2
| 8
| 3
|
--- diff --git a/sound/soc/codecs/tlv320aic31xx.c b/sound/soc/codecs/tlv320aic31xx.c --- a/sound/soc/codecs/tlv320aic31xx.c +++ b/sound/soc/codecs/tlv320aic31xx.c +static const char * const vol_soft_step_mode_text[] = { + "fast", "slow", "disabled" }; + +static soc_enum_single_decl(vol_soft_step_mode_enum, aic31xx_dacsetup, 0, + vol_soft_step_mode_text); + + + soc_enum("volume soft stepping", vol_soft_step_mode_enum), diff --git a/sound/soc/codecs/tlv320aic31xx.h b/sound/soc/codecs/tlv320aic31xx.h --- a/sound/soc/codecs/tlv320aic31xx.h +++ b/sound/soc/codecs/tlv320aic31xx.h -/* aic31xx_dacsetup */ -#define aic31xx_softstep_mask genmask(1, 0) -
|
Audio
|
3176f94c467cf89f74120c34a3ddd9aaf8941be2
|
nikita yushchenko
|
sound
|
soc
|
codecs
|
asoc: dt-bindings: add dt bindings for wcd9340/wcd9341 audio codec
|
this patch adds bindings for wcd9340/wcd9341 audio codec which can support both slimbus and i2s/i2c interface.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add support to wcd9340/wcd9341 codec
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ']
|
['yaml']
| 1
| 175
| 0
|
--- diff --git a/documentation/devicetree/bindings/sound/qcom,wcd934x.yaml b/documentation/devicetree/bindings/sound/qcom,wcd934x.yaml --- /dev/null +++ b/documentation/devicetree/bindings/sound/qcom,wcd934x.yaml +# spdx-license-identifier: (gpl-2.0-only or bsd-2-clause) +%yaml 1.2 +--- +$id: http://devicetree.org/schemas/sound/qcom,wcd934x.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: bindings for qualcomm wcd9340/wcd9341 audio codec + +maintainers: + - srinivas kandagatla <srinivas.kandagatla@linaro.org> + +description: | + qualcomm wcd9340/wcd9341 codec is a standalone hi-fi audio codec ic. + it has in-built soundwire controller, pin controller, interrupt mux and + supports both i2s/i2c and slimbus audio interfaces. + +properties: + compatible: + const: slim217,250 + + reg: + maxitems: 1 + + interrupts: + maxitems: 1 + + reset-gpios: + description: gpio spec for reset line to use + maxitems: 1 + + slim-ifc-dev: true + + clocks: + maxitems: 1 + + clock-names: + const: extclk + + vdd-buck-supply: + description: a reference to the 1.8v buck supply + + vdd-buck-sido-supply: + description: a reference to the 1.8v sido buck supply + + vdd-rx-supply: + description: a reference to the 1.8v rx supply + + vdd-tx-supply: + description: a reference to the 1.8v tx supply + + vdd-vbat-supply: + description: a reference to the vbat supply + + vdd-io-supply: + description: a reference to the 1.8v i/o supply + + vdd-micbias-supply: + description: a reference to the micbias supply + + qcom,micbias1-microvolt: + description: micbias1 voltage + minimum: 1800000 + maximum: 2850000 + + qcom,micbias2-microvolt: + description: micbias2 voltage + minimum: 1800000 + maximum: 2850000 + + qcom,micbias3-microvolt: + description: micbias3 voltage + minimum: 1800000 + maximum: 2850000 + + qcom,micbias4-microvolt: + description: micbias4 voltage + minimum: 1800000 + maximum: 2850000 + + clock-output-names: + const: mclk + + clock-frequency: + description: clock frequency of output clk in hz + + interrupt-controller: true + + '#interrupt-cells': + const: 1 + + '#clock-cells': + const: 0 + + '#sound-dai-cells': + const: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + gpio@42: + type: object + allof: + - $ref: ../gpio/qcom,wcd934x-gpio.yaml# + +patternproperties: + "^.*@[0-9a-f]+$": + type: object + description: | + wcd934x subnode for each slave devices. bindings of each subnodes + depends on the specific driver providing the functionality and + documented in their respective bindings. + + properties: + reg: + maxitems: 1 + + required: + - reg + +required: + - compatible + - reg + - reset-gpios + - slim-ifc-dev + - interrupts + - interrupt-controller + - clock-frequency + - clock-output-names + - qcom,micbias1-microvolt + - qcom,micbias2-microvolt + - qcom,micbias3-microvolt + - qcom,micbias4-microvolt + - "#interrupt-cells" + - "#clock-cells" + - "#sound-dai-cells" + - "#address-cells" + - "#size-cells" + +examples: + - | + codec@1,0{ + compatible = "slim217,250"; + reg = <1 0>; + reset-gpios = <&tlmm 64 0>; + slim-ifc-dev = <&wcd9340_ifd>; + #sound-dai-cells = <1>; + interrupt-parent = <&tlmm>; + interrupts = <54 4>; + interrupt-controller; + #interrupt-cells = <1>; + #clock-cells = <0>; + clock-frequency = <9600000>; + clock-output-names = "mclk"; + qcom,micbias1-microvolt = <1800000>; + qcom,micbias2-microvolt = <1800000>; + qcom,micbias3-microvolt = <1800000>; + qcom,micbias4-microvolt = <1800000>; + clock-names = "extclk"; + clocks = <&rpmhcc 2>; + + #address-cells = <1>; + #size-cells = <1>; + + gpio@42 { + compatible = "qcom,wcd9340-gpio"; + reg = <0x42 0x2>; + gpio-controller; + #gpio-cells = <2>; + }; + }; + +...
|
Audio
|
a6b748713205242d1483a78662bf147b1aa7d90b
|
srinivas kandagatla rob herring robh kernel org pierre louis bossart pierre louis bossart linux intel com
|
documentation
|
devicetree
|
bindings, sound
|
asoc: wcd934x: add support to wcd9340/wcd9341 codec
|
qualcomm wcd9340/wcd9341 codec is a standalone hi-fi audio codec ic, it supports both i2s/i2c and slimbus audio interfaces. on slimbus interface it supports two data lanes; 16 tx ports and 8 rx ports. it has five dacs and seven dedicated interpolators, seven (six audio adcs, and one vbat adc), multibutton headset control (mbhc), active noise cancellation, sidetone paths, mad (mic activity detection) and codec processing engine. it supports class-h differential earpiece out and stereo single ended headphones out. this codec also has integrated soundwire controller.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add support to wcd9340/wcd9341 codec
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ']
|
['c', 'kconfig', 'makefile']
| 3
| 1,601
| 0
|
--- diff --git a/sound/soc/codecs/kconfig b/sound/soc/codecs/kconfig --- a/sound/soc/codecs/kconfig +++ b/sound/soc/codecs/kconfig + select snd_soc_wcd934x if mfd_wcd934x +config snd_soc_wcd934x + tristate "wcd9340/wcd9341 codec" + depends on mfd_wcd934x + help + the wcd9340/9341 is a audio codec ic integrated in + qualcomm socs like sdm845. + diff --git a/sound/soc/codecs/makefile b/sound/soc/codecs/makefile --- a/sound/soc/codecs/makefile +++ b/sound/soc/codecs/makefile +snd-soc-wcd934x-objs := wcd-clsh-v2.o wcd934x.o +obj-$(config_snd_soc_wcd934x) += snd-soc-wcd934x.o diff --git a/sound/soc/codecs/wcd934x.c b/sound/soc/codecs/wcd934x.c --- /dev/null +++ b/sound/soc/codecs/wcd934x.c +// spdx-license-identifier: gpl-2.0 +// copyright (c) 2019, linaro limited + +#include <linux/clk.h> +#include <linux/clk-provider.h> +#include <linux/gpio.h> +#include <linux/interrupt.h> +#include <linux/kernel.h> +#include <linux/mfd/wcd934x/registers.h> +#include <linux/mfd/wcd934x/wcd934x.h> +#include <linux/module.h> +#include <linux/mutex.h> +#include <linux/of_clk.h> +#include <linux/of_device.h> +#include <linux/of_gpio.h> +#include <linux/of.h> +#include <linux/of_irq.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> +#include <linux/regulator/consumer.h> +#include <linux/slab.h> +#include <linux/slimbus.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> +#include <sound/soc-dapm.h> +#include <sound/tlv.h> +#include "wcd-clsh-v2.h" + +#define wcd934x_rates_mask (sndrv_pcm_rate_8000 | sndrv_pcm_rate_16000 |\ + sndrv_pcm_rate_32000 | sndrv_pcm_rate_48000 |\ + sndrv_pcm_rate_96000 | sndrv_pcm_rate_192000) +/* fractional rates */ +#define wcd934x_frac_rates_mask (sndrv_pcm_rate_44100 | sndrv_pcm_rate_88200 |\ + sndrv_pcm_rate_176400) +#define wcd934x_formats_s16_s24_le (sndrv_pcm_fmtbit_s16_le | \ + sndrv_pcm_fmtbit_s24_le) + +/* slave port water mark level + * (0: 6bytes, 1: 9bytes, 2: 12 bytes, 3: 15 bytes) + */ +#define slave_port_water_mark_6bytes 0 +#define slave_port_water_mark_9bytes 1 +#define slave_port_water_mark_12bytes 2 +#define slave_port_water_mark_15bytes 3 +#define slave_port_water_mark_shift 1 +#define slave_port_enable 1 +#define slave_port_disable 0 +#define wcd934x_slim_water_mark_val \ + ((slave_port_water_mark_12bytes << slave_port_water_mark_shift) | \ + (slave_port_enable)) + +#define wcd934x_slim_num_port_reg 3 +#define wcd934x_slim_pgd_port_int_tx_en0 (wcd934x_slim_pgd_port_int_en0 + 2) +#define wcd934x_slim_irq_overflow bit(0) +#define wcd934x_slim_irq_underflow bit(1) +#define wcd934x_slim_irq_port_closed bit(2) + +#define wcd934x_mclk_clk_12p288mhz 12288000 +#define wcd934x_mclk_clk_9p6mhz 9600000 + +/* only valid for 9.6 mhz mclk */ +#define wcd9xxx_dmic_sample_rate_2p4mhz 2400000 +#define wcd9xxx_dmic_sample_rate_4p8mhz 4800000 + +/* only valid for 12.288 mhz mclk */ +#define wcd9xxx_dmic_sample_rate_4p096mhz 4096000 + +#define wcd934x_dmic_clk_div_2 0x0 +#define wcd934x_dmic_clk_div_3 0x1 +#define wcd934x_dmic_clk_div_4 0x2 +#define wcd934x_dmic_clk_div_6 0x3 +#define wcd934x_dmic_clk_div_8 0x4 +#define wcd934x_dmic_clk_div_16 0x5 +#define wcd934x_dmic_clk_drive_default 0x02 + +#define tx_hpf_cut_off_freq_mask 0x60 +#define cf_min_3db_4hz 0x0 +#define cf_min_3db_75hz 0x1 +#define cf_min_3db_150hz 0x2 + +#define wcd934x_rx_start 16 +#define wcd934x_num_interpolators 9 +#define wcd934x_rx_path_ctl_offset 20 +#define wcd934x_max_valid_adc_mux 13 +#define wcd934x_invalid_adc_mux 9 + +#define wcd934x_slim_rx_ch(p) \ + {.port = p + wcd934x_rx_start, .shift = p,} + +#define wcd934x_slim_tx_ch(p) \ + {.port = p, .shift = p,} + +/* feature masks to distinguish codec version */ +#define dsd_disabled_mask 0 +#define slnq_disabled_mask 1 + +#define dsd_disabled bit(dsd_disabled_mask) +#define slnq_disabled bit(slnq_disabled_mask) + +/* as fine version info cannot be retrieved before wcd probe. + * define three coarse versions for possible future use before wcd probe. + */ +#define wcd_version_wcd9340_1_0 0x400 +#define wcd_version_wcd9341_1_0 0x410 +#define wcd_version_wcd9340_1_1 0x401 +#define wcd_version_wcd9341_1_1 0x411 +#define wcd934x_amic_pwr_level_lp 0 +#define wcd934x_amic_pwr_level_default 1 +#define wcd934x_amic_pwr_level_hp 2 +#define wcd934x_amic_pwr_level_hybrid 3 +#define wcd934x_amic_pwr_lvl_mask 0x60 +#define wcd934x_amic_pwr_lvl_shift 0x5 + +#define wcd934x_dec_pwr_lvl_mask 0x06 +#define wcd934x_dec_pwr_lvl_lp 0x02 +#define wcd934x_dec_pwr_lvl_hp 0x04 +#define wcd934x_dec_pwr_lvl_df 0x00 +#define wcd934x_dec_pwr_lvl_hybrid wcd934x_dec_pwr_lvl_df + +#define wcd934x_def_micbias_mv 1800 +#define wcd934x_max_micbias_mv 2850 + +enum { + sido_source_internal, + sido_source_rco_bg, +}; + +enum { + interp_ear = 0, + interp_hphl, + interp_hphr, + interp_lo1, + interp_lo2, + interp_lo3_na, /* lo3 not avalible in tavil */ + interp_lo4_na, + interp_spkr1, /*int7 wsa speakers via soundwire */ + interp_spkr2, /*int8 wsa speakers via soundwire */ + interp_max, +}; + +enum { + wcd934x_rx0 = 0, + wcd934x_rx1, + wcd934x_rx2, + wcd934x_rx3, + wcd934x_rx4, + wcd934x_rx5, + wcd934x_rx6, + wcd934x_rx7, + wcd934x_rx8, + wcd934x_rx9, + wcd934x_rx10, + wcd934x_rx11, + wcd934x_rx12, + wcd934x_rx_max, +}; + +enum { + wcd934x_tx0 = 0, + wcd934x_tx1, + wcd934x_tx2, + wcd934x_tx3, + wcd934x_tx4, + wcd934x_tx5, + wcd934x_tx6, + wcd934x_tx7, + wcd934x_tx8, + wcd934x_tx9, + wcd934x_tx10, + wcd934x_tx11, + wcd934x_tx12, + wcd934x_tx13, + wcd934x_tx14, + wcd934x_tx15, + wcd934x_tx_max, +}; + +struct wcd934x_slim_ch { + u32 ch_num; + u16 port; + u16 shift; + struct list_head list; +}; + +static const struct wcd934x_slim_ch wcd934x_tx_chs[wcd934x_tx_max] = { + wcd934x_slim_tx_ch(0), + wcd934x_slim_tx_ch(1), + wcd934x_slim_tx_ch(2), + wcd934x_slim_tx_ch(3), + wcd934x_slim_tx_ch(4), + wcd934x_slim_tx_ch(5), + wcd934x_slim_tx_ch(6), + wcd934x_slim_tx_ch(7), + wcd934x_slim_tx_ch(8), + wcd934x_slim_tx_ch(9), + wcd934x_slim_tx_ch(10), + wcd934x_slim_tx_ch(11), + wcd934x_slim_tx_ch(12), + wcd934x_slim_tx_ch(13), + wcd934x_slim_tx_ch(14), + wcd934x_slim_tx_ch(15), +}; + +static const struct wcd934x_slim_ch wcd934x_rx_chs[wcd934x_rx_max] = { + wcd934x_slim_rx_ch(0), /* 16 */ + wcd934x_slim_rx_ch(1), /* 17 */ + wcd934x_slim_rx_ch(2), + wcd934x_slim_rx_ch(3), + wcd934x_slim_rx_ch(4), + wcd934x_slim_rx_ch(5), + wcd934x_slim_rx_ch(6), + wcd934x_slim_rx_ch(7), + wcd934x_slim_rx_ch(8), + wcd934x_slim_rx_ch(9), + wcd934x_slim_rx_ch(10), + wcd934x_slim_rx_ch(11), + wcd934x_slim_rx_ch(12), +}; + +enum { + aif1_pb = 0, + aif1_cap, + aif2_pb, + aif2_cap, + aif3_pb, + aif3_cap, + aif4_pb, + aif4_vifeed, + aif4_mad_tx, + num_codec_dais, +}; + +enum { + intn_1_inp_sel_zero = 0, + intn_1_inp_sel_dec0, + intn_1_inp_sel_dec1, + intn_1_inp_sel_iir0, + intn_1_inp_sel_iir1, + intn_1_inp_sel_rx0, + intn_1_inp_sel_rx1, + intn_1_inp_sel_rx2, + intn_1_inp_sel_rx3, + intn_1_inp_sel_rx4, + intn_1_inp_sel_rx5, + intn_1_inp_sel_rx6, + intn_1_inp_sel_rx7, +}; + +enum { + intn_2_inp_sel_zero = 0, + intn_2_inp_sel_rx0, + intn_2_inp_sel_rx1, + intn_2_inp_sel_rx2, + intn_2_inp_sel_rx3, + intn_2_inp_sel_rx4, + intn_2_inp_sel_rx5, + intn_2_inp_sel_rx6, + intn_2_inp_sel_rx7, + intn_2_inp_sel_proximity, +}; + +enum { + interp_main_path, + interp_mix_path, +}; + +struct interp_sample_rate { + int sample_rate; + int rate_val; +}; + +static struct interp_sample_rate sr_val_tbl[] = { + {8000, 0x0}, + {16000, 0x1}, + {32000, 0x3}, + {48000, 0x4}, + {96000, 0x5}, + {192000, 0x6}, + {384000, 0x7}, + {44100, 0x9}, + {88200, 0xa}, + {176400, 0xb}, + {352800, 0xc}, +}; + +struct wcd_slim_codec_dai_data { + struct list_head slim_ch_list; + struct slim_stream_config sconfig; + struct slim_stream_runtime *sruntime; +}; + +static const struct regmap_range_cfg wcd934x_ifc_ranges[] = { + { + .name = "wcd9335-ifc-dev", + .range_min = 0x0, + .range_max = 0xffff, + .selector_reg = 0x800, + .selector_mask = 0xfff, + .selector_shift = 0, + .window_start = 0x800, + .window_len = 0x400, + }, +}; + +static struct regmap_config wcd934x_ifc_regmap_config = { + .reg_bits = 16, + .val_bits = 8, + .max_register = 0xffff, + .ranges = wcd934x_ifc_ranges, + .num_ranges = array_size(wcd934x_ifc_ranges), +}; + +struct wcd934x_codec { + struct device *dev; + struct clk_hw hw; + struct clk *extclk; + struct regmap *regmap; + struct regmap *if_regmap; + struct slim_device *sdev; + struct slim_device *sidev; + struct wcd_clsh_ctrl *clsh_ctrl; + struct snd_soc_component *component; + struct wcd934x_slim_ch rx_chs[wcd934x_rx_max]; + struct wcd934x_slim_ch tx_chs[wcd934x_tx_max]; + struct wcd_slim_codec_dai_data dai[num_codec_dais]; + int rate; + u32 version; + u32 hph_mode; + int num_rx_port; + int num_tx_port; + u32 tx_port_value[wcd934x_tx_max]; + u32 rx_port_value[wcd934x_rx_max]; + int sido_input_src; + int dmic_0_1_clk_cnt; + int dmic_2_3_clk_cnt; + int dmic_4_5_clk_cnt; + int dmic_sample_rate; + int sysclk_users; + struct mutex sysclk_mutex; +}; + +#define to_wcd934x_codec(_hw) container_of(_hw, struct wcd934x_codec, hw) + +static int wcd934x_set_sido_input_src(struct wcd934x_codec *wcd, + int sido_src) +{ + if (sido_src == wcd->sido_input_src) + return 0; + + if (sido_src == sido_source_internal) { + regmap_update_bits(wcd->regmap, wcd934x_ana_buck_ctl, + wcd934x_ana_buck_hi_accu_en_mask, 0); + usleep_range(100, 110); + regmap_update_bits(wcd->regmap, wcd934x_ana_buck_ctl, + wcd934x_ana_buck_hi_accu_pre_enx_mask, 0x0); + usleep_range(100, 110); + regmap_update_bits(wcd->regmap, wcd934x_ana_rco, + wcd934x_ana_rco_bg_en_mask, 0); + usleep_range(100, 110); + } else if (sido_src == sido_source_rco_bg) { + regmap_update_bits(wcd->regmap, wcd934x_ana_rco, + wcd934x_ana_rco_bg_en_mask, + wcd934x_ana_rco_bg_enable); + usleep_range(100, 110); + regmap_update_bits(wcd->regmap, wcd934x_ana_buck_ctl, + wcd934x_ana_buck_pre_en1_mask, + wcd934x_ana_buck_pre_en1_enable); + usleep_range(100, 110); + regmap_update_bits(wcd->regmap, wcd934x_ana_buck_ctl, + wcd934x_ana_buck_pre_en2_mask, + wcd934x_ana_buck_pre_en2_enable); + usleep_range(100, 110); + regmap_update_bits(wcd->regmap, wcd934x_ana_buck_ctl, + wcd934x_ana_buck_hi_accu_en_mask, + wcd934x_ana_buck_hi_accu_enable); + usleep_range(100, 110); + } + wcd->sido_input_src = sido_src; + + return 0; +} + +static int wcd934x_enable_ana_bias_and_sysclk(struct wcd934x_codec *wcd) +{ + mutex_lock(&wcd->sysclk_mutex); + + if (++wcd->sysclk_users != 1) { + mutex_unlock(&wcd->sysclk_mutex); + return 0; + } + mutex_unlock(&wcd->sysclk_mutex); + + regmap_update_bits(wcd->regmap, wcd934x_ana_bias, + wcd934x_ana_bias_en_mask, + wcd934x_ana_bias_en); + regmap_update_bits(wcd->regmap, wcd934x_ana_bias, + wcd934x_ana_prechrg_en_mask, + wcd934x_ana_prechrg_en); + /* + * 1ms delay is required after pre-charge is enabled + * as per hw requirement + */ + usleep_range(1000, 1100); + regmap_update_bits(wcd->regmap, wcd934x_ana_bias, + wcd934x_ana_prechrg_en_mask, 0); + regmap_update_bits(wcd->regmap, wcd934x_ana_bias, + wcd934x_ana_prechrg_mode_mask, 0); + + /* + * in data clock contrl register is changed + * to clk_sys_mclk_prg + */ + + regmap_update_bits(wcd->regmap, wcd934x_clk_sys_mclk_prg, + wcd934x_ext_clk_buf_en_mask, + wcd934x_ext_clk_buf_en); + regmap_update_bits(wcd->regmap, wcd934x_clk_sys_mclk_prg, + wcd934x_ext_clk_div_ratio_mask, + wcd934x_ext_clk_div_by_2); + regmap_update_bits(wcd->regmap, wcd934x_clk_sys_mclk_prg, + wcd934x_mclk_src_mask, + wcd934x_mclk_src_ext_clk); + regmap_update_bits(wcd->regmap, wcd934x_clk_sys_mclk_prg, + wcd934x_mclk_en_mask, wcd934x_mclk_en); + regmap_update_bits(wcd->regmap, + wcd934x_cdc_clk_rst_ctrl_fs_cnt_control, + wcd934x_cdc_fs_mclk_cnt_en_mask, + wcd934x_cdc_fs_mclk_cnt_enable); + regmap_update_bits(wcd->regmap, + wcd934x_cdc_clk_rst_ctrl_mclk_control, + wcd934x_mclk_en_mask, + wcd934x_mclk_en); + regmap_update_bits(wcd->regmap, wcd934x_codec_rpm_clk_gate, + wcd934x_codec_rpm_clk_gate_mask, 0x0); + /* + * 10us sleep is required after clock is enabled + * as per hw requirement + */ + usleep_range(10, 15); + + wcd934x_set_sido_input_src(wcd, sido_source_rco_bg); + + return 0; +} + +static int wcd934x_disable_ana_bias_and_syclk(struct wcd934x_codec *wcd) +{ + mutex_lock(&wcd->sysclk_mutex); + if (--wcd->sysclk_users != 0) { + mutex_unlock(&wcd->sysclk_mutex); + return 0; + } + mutex_unlock(&wcd->sysclk_mutex); + + regmap_update_bits(wcd->regmap, wcd934x_clk_sys_mclk_prg, + wcd934x_ext_clk_buf_en_mask | + wcd934x_mclk_en_mask, 0x0); + wcd934x_set_sido_input_src(wcd, sido_source_internal); + + regmap_update_bits(wcd->regmap, wcd934x_ana_bias, + wcd934x_ana_bias_en_mask, 0); + regmap_update_bits(wcd->regmap, wcd934x_ana_bias, + wcd934x_ana_prechrg_en_mask, 0); + + return 0; +} + +static int __wcd934x_cdc_mclk_enable(struct wcd934x_codec *wcd, bool enable) +{ + int ret = 0; + + if (enable) { + ret = clk_prepare_enable(wcd->extclk); + + if (ret) { + dev_err(wcd->dev, "%s: ext clk enable failed ", + __func__); + return ret; + } + ret = wcd934x_enable_ana_bias_and_sysclk(wcd); + } else { + int val; + + regmap_read(wcd->regmap, wcd934x_cdc_clk_rst_ctrl_swr_control, + &val); + + /* don't disable clock if soundwire using it.*/ + if (val & wcd934x_cdc_swr_clk_en_mask) + return 0; + + wcd934x_disable_ana_bias_and_syclk(wcd); + clk_disable_unprepare(wcd->extclk); + } + + return ret; +} + +static int wcd934x_get_version(struct wcd934x_codec *wcd) +{ + int val1, val2, ver, ret; + struct regmap *regmap; + u16 id_minor; + u32 version_mask = 0; + + regmap = wcd->regmap; + ver = 0; + + ret = regmap_bulk_read(regmap, wcd934x_chip_tier_ctrl_chip_id_byte0, + (u8 *)&id_minor, sizeof(u16)); + + if (ret) + return ret; + + regmap_read(regmap, wcd934x_chip_tier_ctrl_efuse_val_out14, &val1); + regmap_read(regmap, wcd934x_chip_tier_ctrl_efuse_val_out15, &val2); + + version_mask |= (!!((u8)val1 & 0x80)) << dsd_disabled_mask; + version_mask |= (!!((u8)val2 & 0x01)) << slnq_disabled_mask; + + switch (version_mask) { + case dsd_disabled | slnq_disabled: + if (id_minor == 0) + ver = wcd_version_wcd9340_1_0; + else if (id_minor == 0x01) + ver = wcd_version_wcd9340_1_1; + break; + case slnq_disabled: + if (id_minor == 0) + ver = wcd_version_wcd9341_1_0; + else if (id_minor == 0x01) + ver = wcd_version_wcd9341_1_1; + break; + } + + wcd->version = ver; + dev_info(wcd->dev, "wcd934x minor:0x%x version:0x%x ", id_minor, ver); + + return 0; +} + +static void wcd934x_enable_efuse_sensing(struct wcd934x_codec *wcd) +{ + int rc, val; + + __wcd934x_cdc_mclk_enable(wcd, true); + + regmap_update_bits(wcd->regmap, + wcd934x_chip_tier_ctrl_efuse_ctl, + wcd934x_efuse_sense_state_mask, + wcd934x_efuse_sense_state_def); + regmap_update_bits(wcd->regmap, + wcd934x_chip_tier_ctrl_efuse_ctl, + wcd934x_efuse_sense_en_mask, + wcd934x_efuse_sense_enable); + /* + * 5ms sleep required after enabling efuse control + * before checking the status. + */ + usleep_range(5000, 5500); + wcd934x_set_sido_input_src(wcd, sido_source_rco_bg); + + rc = regmap_read(wcd->regmap, + wcd934x_chip_tier_ctrl_efuse_status, &val); + if (rc || (!(val & 0x01))) + warn(1, "%s: efuse sense is not complete val=%x, ret=%d ", + __func__, val, rc); + + __wcd934x_cdc_mclk_enable(wcd, false); +} + +static int wcd934x_swrm_clock(struct wcd934x_codec *wcd, bool enable) +{ + if (enable) { + __wcd934x_cdc_mclk_enable(wcd, true); + regmap_update_bits(wcd->regmap, + wcd934x_cdc_clk_rst_ctrl_swr_control, + wcd934x_cdc_swr_clk_en_mask, + wcd934x_cdc_swr_clk_enable); + } else { + regmap_update_bits(wcd->regmap, + wcd934x_cdc_clk_rst_ctrl_swr_control, + wcd934x_cdc_swr_clk_en_mask, 0); + __wcd934x_cdc_mclk_enable(wcd, false); + } + + return 0; +} + +static int wcd934x_set_prim_interpolator_rate(struct snd_soc_dai *dai, + u8 rate_val, u32 rate) +{ + struct snd_soc_component *comp = dai->component; + struct wcd934x_codec *wcd = dev_get_drvdata(comp->dev); + struct wcd934x_slim_ch *ch; + u8 cfg0, cfg1, inp0_sel, inp1_sel, inp2_sel; + int inp, j; + + list_for_each_entry(ch, &wcd->dai[dai->id].slim_ch_list, list) { + inp = ch->shift + intn_1_inp_sel_rx0; + /* + * loop through all interpolator mux inputs and find out + * to which interpolator input, the slim rx port + * is connected + */ + for (j = 0; j < wcd934x_num_interpolators; j++) { + /* interpolators 5 and 6 are not aviliable in tavil */ + if (j == interp_lo3_na || j == interp_lo4_na) + continue; + + cfg0 = snd_soc_component_read32(comp, + wcd934x_cdc_rx_inp_mux_rx_int_cfg0(j)); + cfg1 = snd_soc_component_read32(comp, + wcd934x_cdc_rx_inp_mux_rx_int_cfg1(j)); + + inp0_sel = cfg0 & + wcd934x_cdc_rx_inp_mux_rx_int_sel_mask; + inp1_sel = (cfg0 >> 4) & + wcd934x_cdc_rx_inp_mux_rx_int_sel_mask; + inp2_sel = (cfg1 >> 4) & + wcd934x_cdc_rx_inp_mux_rx_int_sel_mask; + + if ((inp0_sel == inp) || (inp1_sel == inp) || + (inp2_sel == inp)) { + /* rate is in hz */ + /* + * ear and speaker primary path does not support + * native sample rates + */ + if ((j == interp_ear || j == interp_spkr1 || + j == interp_spkr2) && rate == 44100) + dev_err(wcd->dev, + "cannot set 44.1khz on int%d ", + j); + else + snd_soc_component_update_bits(comp, + wcd934x_cdc_rx_path_ctl(j), + wcd934x_cdc_mix_pcm_rate_mask, + rate_val); + } + } + } + + return 0; +} + +static int wcd934x_set_mix_interpolator_rate(struct snd_soc_dai *dai, + int rate_val, u32 rate) +{ + struct snd_soc_component *component = dai->component; + struct wcd934x_codec *wcd = dev_get_drvdata(component->dev); + struct wcd934x_slim_ch *ch; + int val, j; + + list_for_each_entry(ch, &wcd->dai[dai->id].slim_ch_list, list) { + for (j = 0; j < wcd934x_num_interpolators; j++) { + /* interpolators 5 and 6 are not aviliable in tavil */ + if (j == interp_lo3_na || j == interp_lo4_na) + continue; + val = snd_soc_component_read32(component, + wcd934x_cdc_rx_inp_mux_rx_int_cfg1(j)) & + wcd934x_cdc_rx_inp_mux_rx_int_sel_mask; + + if (val == (ch->shift + intn_2_inp_sel_rx0)) { + /* + * ear mix path supports only 48, 96, 192, + * 384khz only + */ + if ((j == interp_ear) && + (rate_val < 0x4 || + rate_val > 0x7)) { + dev_err(component->dev, + "invalid rate for aif_pb dai(%d) ", + dai->id); + return -einval; + } + + snd_soc_component_update_bits(component, + wcd934x_cdc_rx_path_mix_ctl(j), + wcd934x_cdc_mix_pcm_rate_mask, + rate_val); + } + } + } + + return 0; +} + +static int wcd934x_set_interpolator_rate(struct snd_soc_dai *dai, + u32 sample_rate) +{ + int rate_val = 0; + int i, ret; + + for (i = 0; i < array_size(sr_val_tbl); i++) { + if (sample_rate == sr_val_tbl[i].sample_rate) { + rate_val = sr_val_tbl[i].rate_val; + break; + } + } + if ((i == array_size(sr_val_tbl)) || (rate_val < 0)) { + dev_err(dai->dev, "unsupported sample rate: %d ", sample_rate); + return -einval; + } + + ret = wcd934x_set_prim_interpolator_rate(dai, (u8)rate_val, + sample_rate); + if (ret) + return ret; + ret = wcd934x_set_mix_interpolator_rate(dai, (u8)rate_val, + sample_rate); + if (ret) + return ret; + + return ret; +} + +static int wcd934x_set_decimator_rate(struct snd_soc_dai *dai, + u8 rate_val, u32 rate) +{ + struct snd_soc_component *comp = dai->component; + struct wcd934x_codec *wcd = snd_soc_component_get_drvdata(comp); + u8 shift = 0, shift_val = 0, tx_mux_sel; + struct wcd934x_slim_ch *ch; + int tx_port, tx_port_reg; + int decimator = -1; + + list_for_each_entry(ch, &wcd->dai[dai->id].slim_ch_list, list) { + tx_port = ch->port; + /* find the sb tx mux input - which decimator is connected */ + switch (tx_port) { + case 0 ... 3: + tx_port_reg = wcd934x_cdc_if_router_tx_mux_cfg0; + shift = (tx_port << 1); + shift_val = 0x03; + break; + case 4 ... 7: + tx_port_reg = wcd934x_cdc_if_router_tx_mux_cfg1; + shift = ((tx_port - 4) << 1); + shift_val = 0x03; + break; + case 8 ... 10: + tx_port_reg = wcd934x_cdc_if_router_tx_mux_cfg2; + shift = ((tx_port - 8) << 1); + shift_val = 0x03; + break; + case 11: + tx_port_reg = wcd934x_cdc_if_router_tx_mux_cfg3; + shift = 0; + shift_val = 0x0f; + break; + case 13: + tx_port_reg = wcd934x_cdc_if_router_tx_mux_cfg3; + shift = 4; + shift_val = 0x03; + break; + default: + dev_err(wcd->dev, "invalid slim tx%u port dai id:%d ", + tx_port, dai->id); + return -einval; + } + + tx_mux_sel = snd_soc_component_read32(comp, tx_port_reg) & + (shift_val << shift); + + tx_mux_sel = tx_mux_sel >> shift; + switch (tx_port) { + case 0 ... 8: + if ((tx_mux_sel == 0x2) || (tx_mux_sel == 0x3)) + decimator = tx_port; + break; + case 9 ... 10: + if ((tx_mux_sel == 0x1) || (tx_mux_sel == 0x2)) + decimator = ((tx_port == 9) ? 7 : 6); + break; + case 11: + if ((tx_mux_sel >= 1) && (tx_mux_sel < 7)) + decimator = tx_mux_sel - 1; + break; + case 13: + if ((tx_mux_sel == 0x1) || (tx_mux_sel == 0x2)) + decimator = 5; + break; + default: + dev_err(wcd->dev, "error: invalid tx_port: %d ", + tx_port); + return -einval; + } + + snd_soc_component_update_bits(comp, + wcd934x_cdc_tx_path_ctl(decimator), + wcd934x_cdc_tx_path_ctl_pcm_rate_mask, + rate_val); + } + + return 0; +} + +static int wcd934x_slim_set_hw_params(struct wcd934x_codec *wcd, + struct wcd_slim_codec_dai_data *dai_data, + int direction) +{ + struct list_head *slim_ch_list = &dai_data->slim_ch_list; + struct slim_stream_config *cfg = &dai_data->sconfig; + struct wcd934x_slim_ch *ch; + u16 payload = 0; + int ret, i; + + cfg->ch_count = 0; + cfg->direction = direction; + cfg->port_mask = 0; + + /* configure slave interface device */ + list_for_each_entry(ch, slim_ch_list, list) { + cfg->ch_count++; + payload |= 1 << ch->shift; + cfg->port_mask |= bit(ch->port); + } + + cfg->chs = kcalloc(cfg->ch_count, sizeof(unsigned int), gfp_kernel); + if (!cfg->chs) + return -enomem; + + i = 0; + list_for_each_entry(ch, slim_ch_list, list) { + cfg->chs[i++] = ch->ch_num; + if (direction == sndrv_pcm_stream_playback) { + /* write to interface device */ + ret = regmap_write(wcd->if_regmap, + wcd934x_slim_pgd_rx_port_multi_chnl_0(ch->port), + payload); + + if (ret < 0) + goto err; + + /* configure the slave port for water mark and enable*/ + ret = regmap_write(wcd->if_regmap, + wcd934x_slim_pgd_rx_port_cfg(ch->port), + wcd934x_slim_water_mark_val); + if (ret < 0) + goto err; + } else { + ret = regmap_write(wcd->if_regmap, + wcd934x_slim_pgd_tx_port_multi_chnl_0(ch->port), + payload & 0x00ff); + if (ret < 0) + goto err; + + /* ports 8,9 */ + ret = regmap_write(wcd->if_regmap, + wcd934x_slim_pgd_tx_port_multi_chnl_1(ch->port), + (payload & 0xff00) >> 8); + if (ret < 0) + goto err; + + /* configure the slave port for water mark and enable*/ + ret = regmap_write(wcd->if_regmap, + wcd934x_slim_pgd_tx_port_cfg(ch->port), + wcd934x_slim_water_mark_val); + + if (ret < 0) + goto err; + } + } + + dai_data->sruntime = slim_stream_allocate(wcd->sdev, "wcd934x-slim"); + + return 0; + +err: + dev_err(wcd->dev, "error setting slim hw params "); + kfree(cfg->chs); + cfg->chs = null; + + return ret; +} + +static int wcd934x_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct wcd934x_codec *wcd; + int ret, tx_fs_rate = 0; + + wcd = snd_soc_component_get_drvdata(dai->component); + + switch (substream->stream) { + case sndrv_pcm_stream_playback: + ret = wcd934x_set_interpolator_rate(dai, params_rate(params)); + if (ret) { + dev_err(wcd->dev, "cannot set sample rate: %u ", + params_rate(params)); + return ret; + } + switch (params_width(params)) { + case 16 ... 24: + wcd->dai[dai->id].sconfig.bps = params_width(params); + break; + default: + dev_err(wcd->dev, "invalid format 0x%x ", + params_width(params)); + return -einval; + } + break; + + case sndrv_pcm_stream_capture: + switch (params_rate(params)) { + case 8000: + tx_fs_rate = 0; + break; + case 16000: + tx_fs_rate = 1; + break; + case 32000: + tx_fs_rate = 3; + break; + case 48000: + tx_fs_rate = 4; + break; + case 96000: + tx_fs_rate = 5; + break; + case 192000: + tx_fs_rate = 6; + break; + case 384000: + tx_fs_rate = 7; + break; + default: + dev_err(wcd->dev, "invalid tx sample rate: %d ", + params_rate(params)); + return -einval; + + }; + + ret = wcd934x_set_decimator_rate(dai, tx_fs_rate, + params_rate(params)); + if (ret < 0) { + dev_err(wcd->dev, "cannot set tx decimator rate "); + return ret; + } + switch (params_width(params)) { + case 16 ... 32: + wcd->dai[dai->id].sconfig.bps = params_width(params); + break; + default: + dev_err(wcd->dev, "invalid format 0x%x ", + params_width(params)); + return -einval; + }; + break; + default: + dev_err(wcd->dev, "invalid stream type %d ", + substream->stream); + return -einval; + }; + + wcd->dai[dai->id].sconfig.rate = params_rate(params); + wcd934x_slim_set_hw_params(wcd, &wcd->dai[dai->id], substream->stream); + + return 0; +} + +static int wcd934x_hw_free(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct wcd_slim_codec_dai_data *dai_data; + struct wcd934x_codec *wcd; + + wcd = snd_soc_component_get_drvdata(dai->component); + + dai_data = &wcd->dai[dai->id]; + + kfree(dai_data->sconfig.chs); + + return 0; +} + +static int wcd934x_trigger(struct snd_pcm_substream *substream, int cmd, + struct snd_soc_dai *dai) +{ + struct wcd_slim_codec_dai_data *dai_data; + struct wcd934x_codec *wcd; + struct slim_stream_config *cfg; + + wcd = snd_soc_component_get_drvdata(dai->component); + + dai_data = &wcd->dai[dai->id]; + + switch (cmd) { + case sndrv_pcm_trigger_start: + case sndrv_pcm_trigger_resume: + case sndrv_pcm_trigger_pause_release: + cfg = &dai_data->sconfig; + slim_stream_prepare(dai_data->sruntime, cfg); + slim_stream_enable(dai_data->sruntime); + break; + case sndrv_pcm_trigger_stop: + case sndrv_pcm_trigger_suspend: + case sndrv_pcm_trigger_pause_push: + slim_stream_unprepare(dai_data->sruntime); + slim_stream_disable(dai_data->sruntime); + break; + default: + break; + } + + return 0; +} + +static int wcd934x_set_channel_map(struct snd_soc_dai *dai, + unsigned int tx_num, unsigned int *tx_slot, + unsigned int rx_num, unsigned int *rx_slot) +{ + struct wcd934x_codec *wcd; + int i; + + wcd = snd_soc_component_get_drvdata(dai->component); + + if (!tx_slot || !rx_slot) { + dev_err(wcd->dev, "invalid tx_slot=%p, rx_slot=%p ", + tx_slot, rx_slot); + return -einval; + } + + if (wcd->rx_chs) { + wcd->num_rx_port = rx_num; + for (i = 0; i < rx_num; i++) { + wcd->rx_chs[i].ch_num = rx_slot[i]; + init_list_head(&wcd->rx_chs[i].list); + } + } + + if (wcd->tx_chs) { + wcd->num_tx_port = tx_num; + for (i = 0; i < tx_num; i++) { + wcd->tx_chs[i].ch_num = tx_slot[i]; + init_list_head(&wcd->tx_chs[i].list); + } + } + + return 0; +} + +static int wcd934x_get_channel_map(struct snd_soc_dai *dai, + unsigned int *tx_num, unsigned int *tx_slot, + unsigned int *rx_num, unsigned int *rx_slot) +{ + struct wcd934x_slim_ch *ch; + struct wcd934x_codec *wcd; + int i = 0; + + wcd = snd_soc_component_get_drvdata(dai->component); + + switch (dai->id) { + case aif1_pb: + case aif2_pb: + case aif3_pb: + case aif4_pb: + if (!rx_slot || !rx_num) { + dev_err(wcd->dev, "invalid rx_slot %p or rx_num %p ", + rx_slot, rx_num); + return -einval; + } + + list_for_each_entry(ch, &wcd->dai[dai->id].slim_ch_list, list) + rx_slot[i++] = ch->ch_num; + + *rx_num = i; + break; + case aif1_cap: + case aif2_cap: + case aif3_cap: + if (!tx_slot || !tx_num) { + dev_err(wcd->dev, "invalid tx_slot %p or tx_num %p ", + tx_slot, tx_num); + return -einval; + } + + list_for_each_entry(ch, &wcd->dai[dai->id].slim_ch_list, list) + tx_slot[i++] = ch->ch_num; + + *tx_num = i; + break; + default: + dev_err(wcd->dev, "invalid dai id %x ", dai->id); + break; + } + + return 0; +} + +static struct snd_soc_dai_ops wcd934x_dai_ops = { + .hw_params = wcd934x_hw_params, + .hw_free = wcd934x_hw_free, + .trigger = wcd934x_trigger, + .set_channel_map = wcd934x_set_channel_map, + .get_channel_map = wcd934x_get_channel_map, +}; + +static struct snd_soc_dai_driver wcd934x_slim_dais[] = { + [0] = { + .name = "wcd934x_rx1", + .id = aif1_pb, + .playback = { + .stream_name = "aif1 playback", + .rates = wcd934x_rates_mask | wcd934x_frac_rates_mask, + .formats = wcd934x_formats_s16_s24_le, + .rate_max = 192000, + .rate_min = 8000, + .channels_min = 1, + .channels_max = 2, + }, + .ops = &wcd934x_dai_ops, + }, + [1] = { + .name = "wcd934x_tx1", + .id = aif1_cap, + .capture = { + .stream_name = "aif1 capture", + .rates = wcd934x_rates_mask, + .formats = sndrv_pcm_fmtbit_s16_le, + .rate_min = 8000, + .rate_max = 192000, + .channels_min = 1, + .channels_max = 4, + }, + .ops = &wcd934x_dai_ops, + }, + [2] = { + .name = "wcd934x_rx2", + .id = aif2_pb, + .playback = { + .stream_name = "aif2 playback", + .rates = wcd934x_rates_mask | wcd934x_frac_rates_mask, + .formats = wcd934x_formats_s16_s24_le, + .rate_min = 8000, + .rate_max = 192000, + .channels_min = 1, + .channels_max = 2, + }, + .ops = &wcd934x_dai_ops, + }, + [3] = { + .name = "wcd934x_tx2", + .id = aif2_cap, + .capture = { + .stream_name = "aif2 capture", + .rates = wcd934x_rates_mask, + .formats = sndrv_pcm_fmtbit_s16_le, + .rate_min = 8000, + .rate_max = 192000, + .channels_min = 1, + .channels_max = 4, + }, + .ops = &wcd934x_dai_ops, + }, + [4] = { + .name = "wcd934x_rx3", + .id = aif3_pb, + .playback = { + .stream_name = "aif3 playback", + .rates = wcd934x_rates_mask | wcd934x_frac_rates_mask, + .formats = wcd934x_formats_s16_s24_le, + .rate_min = 8000, + .rate_max = 192000, + .channels_min = 1, + .channels_max = 2, + }, + .ops = &wcd934x_dai_ops, + }, + [5] = { + .name = "wcd934x_tx3", + .id = aif3_cap, + .capture = { + .stream_name = "aif3 capture", + .rates = wcd934x_rates_mask, + .formats = sndrv_pcm_fmtbit_s16_le, + .rate_min = 8000, + .rate_max = 192000, + .channels_min = 1, + .channels_max = 4, + }, + .ops = &wcd934x_dai_ops, + }, + [6] = { + .name = "wcd934x_rx4", + .id = aif4_pb, + .playback = { + .stream_name = "aif4 playback", + .rates = wcd934x_rates_mask | wcd934x_frac_rates_mask, + .formats = wcd934x_formats_s16_s24_le, + .rate_min = 8000, + .rate_max = 192000, + .channels_min = 1, + .channels_max = 2, + }, + .ops = &wcd934x_dai_ops, + }, +}; + +static int swclk_gate_enable(struct clk_hw *hw) +{ + return wcd934x_swrm_clock(to_wcd934x_codec(hw), true); +} + +static void swclk_gate_disable(struct clk_hw *hw) +{ + wcd934x_swrm_clock(to_wcd934x_codec(hw), false); +} + +static int swclk_gate_is_enabled(struct clk_hw *hw) +{ + struct wcd934x_codec *wcd = to_wcd934x_codec(hw); + int ret, val; + + regmap_read(wcd->regmap, wcd934x_cdc_clk_rst_ctrl_swr_control, &val); + ret = val & wcd934x_cdc_swr_clk_en_mask; + + return ret; +} + +static unsigned long swclk_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + return parent_rate / 2; +} + +static const struct clk_ops swclk_gate_ops = { + .prepare = swclk_gate_enable, + .unprepare = swclk_gate_disable, + .is_enabled = swclk_gate_is_enabled, + .recalc_rate = swclk_recalc_rate, + +}; + +static struct clk *wcd934x_register_mclk_output(struct wcd934x_codec *wcd) +{ + struct clk *parent = wcd->extclk; + struct device *dev = wcd->dev; + struct device_node *np = dev->parent->of_node; + const char *parent_clk_name = null; + const char *clk_name = "mclk"; + struct clk_hw *hw; + struct clk_init_data init; + int ret; + + if (of_property_read_u32(np, "clock-frequency", &wcd->rate)) + return null; + + parent_clk_name = __clk_get_name(parent); + + of_property_read_string(np, "clock-output-names", &clk_name); + + init.name = clk_name; + init.ops = &swclk_gate_ops; + init.flags = 0; + init.parent_names = &parent_clk_name; + init.num_parents = 1; + wcd->hw.init = &init; + + hw = &wcd->hw; + ret = clk_hw_register(wcd->dev->parent, hw); + if (ret) + return err_ptr(ret); + + of_clk_add_provider(np, of_clk_src_simple_get, hw->clk); + + return null; +} + +static int wcd934x_get_micbias_val(struct device *dev, const char *micbias) +{ + int mv; + + if (of_property_read_u32(dev->parent->of_node, micbias, &mv)) { + dev_err(dev, "%s value not found, using default ", micbias); + mv = wcd934x_def_micbias_mv; + } else { + /* convert it to milli volts */ + mv = mv/1000; + } + + if (mv < 1000 || mv > 2850) { + dev_err(dev, "%s value not in valid range, using default ", + micbias); + mv = wcd934x_def_micbias_mv; + } + + return (mv - 1000) / 50; +} + +static int wcd934x_init_dmic(struct snd_soc_component *comp) +{ + int vout_ctl_1, vout_ctl_2, vout_ctl_3, vout_ctl_4; + struct wcd934x_codec *wcd = dev_get_drvdata(comp->dev); + u32 def_dmic_rate, dmic_clk_drv; + + vout_ctl_1 = wcd934x_get_micbias_val(comp->dev, + "qcom,micbias1-microvolt"); + vout_ctl_2 = wcd934x_get_micbias_val(comp->dev, + "qcom,micbias2-microvolt"); + vout_ctl_3 = wcd934x_get_micbias_val(comp->dev, + "qcom,micbias3-microvolt"); + vout_ctl_4 = wcd934x_get_micbias_val(comp->dev, + "qcom,micbias4-microvolt"); + + snd_soc_component_update_bits(comp, wcd934x_ana_micb1, + wcd934x_micb_val_mask, vout_ctl_1); + snd_soc_component_update_bits(comp, wcd934x_ana_micb2, + wcd934x_micb_val_mask, vout_ctl_2); + snd_soc_component_update_bits(comp, wcd934x_ana_micb3, + wcd934x_micb_val_mask, vout_ctl_3); + snd_soc_component_update_bits(comp, wcd934x_ana_micb4, + wcd934x_micb_val_mask, vout_ctl_4); + + if (wcd->rate == wcd934x_mclk_clk_9p6mhz) + def_dmic_rate = wcd9xxx_dmic_sample_rate_4p8mhz; + else + def_dmic_rate = wcd9xxx_dmic_sample_rate_4p096mhz; + + wcd->dmic_sample_rate = def_dmic_rate; + + dmic_clk_drv = 0; + snd_soc_component_update_bits(comp, wcd934x_test_debug_pad_drvctl_0, + 0x0c, dmic_clk_drv << 2); + + return 0; +} + +static void wcd934x_hw_init(struct wcd934x_codec *wcd) +{ + struct regmap *rm = wcd->regmap; + + /* set spkr rate to fs_2p4_3p072 */ + regmap_update_bits(rm, wcd934x_cdc_rx7_rx_path_cfg1, 0x08, 0x08); + regmap_update_bits(rm, wcd934x_cdc_rx8_rx_path_cfg1, 0x08, 0x08); + + /* take dmics out of reset */ + regmap_update_bits(rm, wcd934x_cpe_ss_dmic_cfg, 0x80, 0x00); +} + +static int wcd934x_comp_init(struct snd_soc_component *component) +{ + struct wcd934x_codec *wcd = dev_get_drvdata(component->dev); + + wcd934x_hw_init(wcd); + wcd934x_enable_efuse_sensing(wcd); + wcd934x_get_version(wcd); + + return 0; +} + +static irqreturn_t wcd934x_slim_irq_handler(int irq, void *data) +{ + struct wcd934x_codec *wcd = data; + unsigned long status = 0; + int i, j, port_id; + unsigned int val, int_val = 0; + irqreturn_t ret = irq_none; + bool tx; + unsigned short reg = 0; + + for (i = wcd934x_slim_pgd_port_int_status_rx_0, j = 0; + i <= wcd934x_slim_pgd_port_int_status_tx_1; i++, j++) { + regmap_read(wcd->if_regmap, i, &val); + status |= ((u32)val << (8 * j)); + } + + for_each_set_bit(j, &status, 32) { + tx = false; + port_id = j; + + if (j >= 16) { + tx = true; + port_id = j - 16; + } + + regmap_read(wcd->if_regmap, + wcd934x_slim_pgd_port_int_rx_source0 + j, &val); + if (val) { + if (!tx) + reg = wcd934x_slim_pgd_port_int_en0 + + (port_id / 8); + else + reg = wcd934x_slim_pgd_port_int_tx_en0 + + (port_id / 8); + regmap_read(wcd->if_regmap, reg, &int_val); + } + + if (val & wcd934x_slim_irq_overflow) + dev_err_ratelimited(wcd->dev, + "overflow error on %s port %d, value %x ", + (tx ? "tx" : "rx"), port_id, val); + + if (val & wcd934x_slim_irq_underflow) + dev_err_ratelimited(wcd->dev, + "underflow error on %s port %d, value %x ", + (tx ? "tx" : "rx"), port_id, val); + + if ((val & wcd934x_slim_irq_overflow) || + (val & wcd934x_slim_irq_underflow)) { + if (!tx) + reg = wcd934x_slim_pgd_port_int_en0 + + (port_id / 8); + else + reg = wcd934x_slim_pgd_port_int_tx_en0 + + (port_id / 8); + regmap_read( + wcd->if_regmap, reg, &int_val); + if (int_val & (1 << (port_id % 8))) { + int_val = int_val ^ (1 << (port_id % 8)); + regmap_write(wcd->if_regmap, + reg, int_val); + } + } + + if (val & wcd934x_slim_irq_port_closed) + dev_err_ratelimited(wcd->dev, + "port closed %s port %d, value %x ", + (tx ? "tx" : "rx"), port_id, val); + + regmap_write(wcd->if_regmap, + wcd934x_slim_pgd_port_int_clr_rx_0 + (j / 8), + bit(j % 8)); + ret = irq_handled; + } + + return ret; +} + +static int wcd934x_comp_probe(struct snd_soc_component *component) +{ + struct wcd934x_codec *wcd = dev_get_drvdata(component->dev); + int i; + + snd_soc_component_init_regmap(component, wcd->regmap); + wcd->component = component; + + /* class-h init*/ + wcd->clsh_ctrl = wcd_clsh_ctrl_alloc(component, wcd->version); + if (is_err(wcd->clsh_ctrl)) + return ptr_err(wcd->clsh_ctrl); + + /* default hph mode to class-h low hifi */ + wcd->hph_mode = cls_h_lohifi; + + wcd934x_comp_init(component); + + for (i = 0; i < num_codec_dais; i++) + init_list_head(&wcd->dai[i].slim_ch_list); + + wcd934x_init_dmic(component); + return 0; +} + +static void wcd934x_comp_remove(struct snd_soc_component *comp) +{ + struct wcd934x_codec *wcd = dev_get_drvdata(comp->dev); + + wcd_clsh_ctrl_free(wcd->clsh_ctrl); +} + +static int wcd934x_comp_set_sysclk(struct snd_soc_component *comp, + int clk_id, int source, + unsigned int freq, int dir) +{ + struct wcd934x_codec *wcd = dev_get_drvdata(comp->dev); + int val = wcd934x_codec_rpm_clk_mclk_cfg_9p6mhz; + + wcd->rate = freq; + + if (wcd->rate == wcd934x_mclk_clk_12p288mhz) + val = wcd934x_codec_rpm_clk_mclk_cfg_12p288mhz; + + snd_soc_component_update_bits(comp, wcd934x_codec_rpm_clk_mclk_cfg, + wcd934x_codec_rpm_clk_mclk_cfg_mclk_mask, + val); + + return clk_set_rate(wcd->extclk, freq); +} + +static const struct snd_soc_component_driver wcd934x_component_drv = { + .probe = wcd934x_comp_probe, + .remove = wcd934x_comp_remove, + .set_sysclk = wcd934x_comp_set_sysclk, +}; + +static int wcd934x_codec_parse_data(struct wcd934x_codec *wcd) +{ + struct device *dev = &wcd->sdev->dev; + struct device_node *ifc_dev_np; + + ifc_dev_np = of_parse_phandle(dev->of_node, "slim-ifc-dev", 0); + if (!ifc_dev_np) { + dev_err(dev, "no interface device found "); + return -einval; + } + + wcd->sidev = of_slim_get_device(wcd->sdev->ctrl, ifc_dev_np); + if (!wcd->sidev) { + dev_err(dev, "unable to get slim interface device "); + return -einval; + } + + slim_get_logical_addr(wcd->sidev); + wcd->if_regmap = regmap_init_slimbus(wcd->sidev, + &wcd934x_ifc_regmap_config); + if (is_err(wcd->if_regmap)) { + dev_err(dev, "failed to allocate ifc register map "); + return ptr_err(wcd->if_regmap); + } + + of_property_read_u32(dev->parent->of_node, "qcom,dmic-sample-rate", + &wcd->dmic_sample_rate); + + return 0; +} + +static int wcd934x_codec_probe(struct platform_device *pdev) +{ + struct wcd934x_ddata *data = dev_get_drvdata(pdev->dev.parent); + struct wcd934x_codec *wcd; + struct device *dev = &pdev->dev; + int ret, irq; + + wcd = devm_kzalloc(&pdev->dev, sizeof(*wcd), gfp_kernel); + if (!wcd) + return -enomem; + + wcd->dev = dev; + wcd->regmap = data->regmap; + wcd->extclk = data->extclk; + wcd->sdev = to_slim_device(data->dev); + mutex_init(&wcd->sysclk_mutex); + + ret = wcd934x_codec_parse_data(wcd); + if (ret) { + dev_err(wcd->dev, "failed to get slim irq "); + return ret; + } + + /* set default rate 9p6mhz */ + regmap_update_bits(wcd->regmap, wcd934x_codec_rpm_clk_mclk_cfg, + wcd934x_codec_rpm_clk_mclk_cfg_mclk_mask, + wcd934x_codec_rpm_clk_mclk_cfg_9p6mhz); + memcpy(wcd->rx_chs, wcd934x_rx_chs, sizeof(wcd934x_rx_chs)); + memcpy(wcd->tx_chs, wcd934x_tx_chs, sizeof(wcd934x_tx_chs)); + + irq = regmap_irq_get_virq(data->irq_data, wcd934x_irq_slimbus); + if (irq < 0) { + dev_err(wcd->dev, "failed to get slim irq "); + return irq; + } + + ret = devm_request_threaded_irq(dev, irq, null, + wcd934x_slim_irq_handler, + irqf_trigger_rising, + "slim", wcd); + if (ret) { + dev_err(dev, "failed to request slimbus irq "); + return ret; + } + + wcd934x_register_mclk_output(wcd); + platform_set_drvdata(pdev, wcd); + + return devm_snd_soc_register_component(dev, &wcd934x_component_drv, + wcd934x_slim_dais, + array_size(wcd934x_slim_dais)); +} + +static const struct platform_device_id wcd934x_driver_id[] = { + { + .name = "wcd934x-codec", + }, + {}, +}; +module_device_table(platform, wcd934x_driver_id); + +static struct platform_driver wcd934x_codec_driver = { + .probe = &wcd934x_codec_probe, + .id_table = wcd934x_driver_id, + .driver = { + .name = "wcd934x-codec", + } +}; + +module_alias("platform:wcd934x-codec"); +module_platform_driver(wcd934x_codec_driver); +module_description("wcd934x codec driver"); +module_license("gpl v2");
|
Audio
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a61f3b4f476eceb25274161e5a53a8d18e42610b
|
srinivas kandagatla
|
sound
|
soc
|
codecs
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asoc: wcd934x: add basic controls
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this patch adds basic controls found in wcd934x codec.
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this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
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add support to wcd9340/wcd9341 codec
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['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
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['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ']
|
['c']
| 1
| 506
| 0
|
--- diff --git a/sound/soc/codecs/wcd934x.c b/sound/soc/codecs/wcd934x.c --- a/sound/soc/codecs/wcd934x.c +++ b/sound/soc/codecs/wcd934x.c +#define wcd_iir_filter_size (sizeof(u32) * band_max) + +#define wcd_iir_filter_ctl(xname, iidx, bidx) \ +{ \ + .iface = sndrv_ctl_elem_iface_mixer, .name = xname, \ + .info = wcd934x_iir_filter_info, \ + .get = wcd934x_get_iir_band_audio_mixer, \ + .put = wcd934x_put_iir_band_audio_mixer, \ + .private_value = (unsigned long)&(struct wcd_iir_filter_ctl) { \ + .iir_idx = iidx, \ + .band_idx = bidx, \ + .bytes_ext = {.max = wcd_iir_filter_size, }, \ + } \ +} + +/* codec supports 2 iir filters */ +enum { + iir0 = 0, + iir1, + iir_max, +}; + +/* each iir has 5 filter stages */ +enum { + band1 = 0, + band2, + band3, + band4, + band5, + band_max, +}; + +enum { + compander_1, /* hph_l */ + compander_2, /* hph_r */ + compander_3, /* lo1_diff */ + compander_4, /* lo2_diff */ + compander_5, /* lo3_se - not used in tavil */ + compander_6, /* lo4_se - not used in tavil */ + compander_7, /* swr spk ch1 */ + compander_8, /* swr spk ch2 */ + compander_max, +}; + + int comp_enabled[compander_max]; +struct wcd_iir_filter_ctl { + unsigned int iir_idx; + unsigned int band_idx; + struct soc_bytes_ext bytes_ext; +}; + +static const declare_tlv_db_scale(digital_gain, 0, 1, 0); +static const declare_tlv_db_scale(line_gain, 0, 7, 1); +static const declare_tlv_db_scale(analog_gain, 0, 25, 1); +static const declare_tlv_db_scale(ear_pa_gain, 0, 150, 0); + +/* cutoff frequency for high pass filter */ +static const char * const cf_text[] = { + "cf_neg_3db_4hz", "cf_neg_3db_75hz", "cf_neg_3db_150hz" +}; + +static const char * const rx_cf_text[] = { + "cf_neg_3db_4hz", "cf_neg_3db_75hz", "cf_neg_3db_150hz", + "cf_neg_3db_0p48hz" +}; + +static const char * const rx_hph_mode_mux_text[] = { + "class h invalid", "class-h hi-fi", "class-h low power", "class-ab", + "class-h hi-fi low power" +}; + +static const struct soc_enum cf_dec0_enum = + soc_enum_single(wcd934x_cdc_tx0_tx_path_cfg0, 5, 3, cf_text); + +static const struct soc_enum cf_dec1_enum = + soc_enum_single(wcd934x_cdc_tx1_tx_path_cfg0, 5, 3, cf_text); + +static const struct soc_enum cf_dec2_enum = + soc_enum_single(wcd934x_cdc_tx2_tx_path_cfg0, 5, 3, cf_text); + +static const struct soc_enum cf_dec3_enum = + soc_enum_single(wcd934x_cdc_tx3_tx_path_cfg0, 5, 3, cf_text); + +static const struct soc_enum cf_dec4_enum = + soc_enum_single(wcd934x_cdc_tx4_tx_path_cfg0, 5, 3, cf_text); + +static const struct soc_enum cf_dec5_enum = + soc_enum_single(wcd934x_cdc_tx5_tx_path_cfg0, 5, 3, cf_text); + +static const struct soc_enum cf_dec6_enum = + soc_enum_single(wcd934x_cdc_tx6_tx_path_cfg0, 5, 3, cf_text); + +static const struct soc_enum cf_dec7_enum = + soc_enum_single(wcd934x_cdc_tx7_tx_path_cfg0, 5, 3, cf_text); + +static const struct soc_enum cf_dec8_enum = + soc_enum_single(wcd934x_cdc_tx8_tx_path_cfg0, 5, 3, cf_text); + +static const struct soc_enum cf_int0_1_enum = + soc_enum_single(wcd934x_cdc_rx0_rx_path_cfg2, 0, 4, rx_cf_text); + +static soc_enum_single_decl(cf_int0_2_enum, wcd934x_cdc_rx0_rx_path_mix_cfg, 2, + rx_cf_text); + +static const struct soc_enum cf_int1_1_enum = + soc_enum_single(wcd934x_cdc_rx1_rx_path_cfg2, 0, 4, rx_cf_text); + +static soc_enum_single_decl(cf_int1_2_enum, wcd934x_cdc_rx1_rx_path_mix_cfg, 2, + rx_cf_text); + +static const struct soc_enum cf_int2_1_enum = + soc_enum_single(wcd934x_cdc_rx2_rx_path_cfg2, 0, 4, rx_cf_text); + +static soc_enum_single_decl(cf_int2_2_enum, wcd934x_cdc_rx2_rx_path_mix_cfg, 2, + rx_cf_text); + +static const struct soc_enum cf_int3_1_enum = + soc_enum_single(wcd934x_cdc_rx3_rx_path_cfg2, 0, 4, rx_cf_text); + +static soc_enum_single_decl(cf_int3_2_enum, wcd934x_cdc_rx3_rx_path_mix_cfg, 2, + rx_cf_text); + +static const struct soc_enum cf_int4_1_enum = + soc_enum_single(wcd934x_cdc_rx4_rx_path_cfg2, 0, 4, rx_cf_text); + +static soc_enum_single_decl(cf_int4_2_enum, wcd934x_cdc_rx4_rx_path_mix_cfg, 2, + rx_cf_text); + +static const struct soc_enum cf_int7_1_enum = + soc_enum_single(wcd934x_cdc_rx7_rx_path_cfg2, 0, 4, rx_cf_text); + +static soc_enum_single_decl(cf_int7_2_enum, wcd934x_cdc_rx7_rx_path_mix_cfg, 2, + rx_cf_text); + +static const struct soc_enum cf_int8_1_enum = + soc_enum_single(wcd934x_cdc_rx8_rx_path_cfg2, 0, 4, rx_cf_text); + +static soc_enum_single_decl(cf_int8_2_enum, wcd934x_cdc_rx8_rx_path_mix_cfg, 2, + rx_cf_text); + +static const struct soc_enum rx_hph_mode_mux_enum = + soc_enum_single_ext(array_size(rx_hph_mode_mux_text), + rx_hph_mode_mux_text); + +static uint32_t get_iir_band_coeff(struct snd_soc_component *component, + int iir_idx, int band_idx, int coeff_idx) +{ + u32 value = 0; + int reg, b2_reg; + + /* address does not automatically update if reading */ + reg = wcd934x_cdc_sidetone_iir0_iir_coef_b1_ctl + 16 * iir_idx; + b2_reg = wcd934x_cdc_sidetone_iir0_iir_coef_b2_ctl + 16 * iir_idx; + + snd_soc_component_write(component, reg, + ((band_idx * band_max + coeff_idx) * + sizeof(uint32_t)) & 0x7f); + + value |= snd_soc_component_read32(component, b2_reg); + snd_soc_component_write(component, reg, + ((band_idx * band_max + coeff_idx) + * sizeof(uint32_t) + 1) & 0x7f); + + value |= (snd_soc_component_read32(component, b2_reg) << 8); + snd_soc_component_write(component, reg, + ((band_idx * band_max + coeff_idx) + * sizeof(uint32_t) + 2) & 0x7f); + + value |= (snd_soc_component_read32(component, b2_reg) << 16); + snd_soc_component_write(component, reg, + ((band_idx * band_max + coeff_idx) + * sizeof(uint32_t) + 3) & 0x7f); + + /* mask bits top 2 bits since they are reserved */ + value |= (snd_soc_component_read32(component, b2_reg) << 24); + return value; +} + +static void set_iir_band_coeff(struct snd_soc_component *component, + int iir_idx, int band_idx, uint32_t value) +{ + int reg = wcd934x_cdc_sidetone_iir0_iir_coef_b2_ctl + 16 * iir_idx; + + snd_soc_component_write(component, reg, (value & 0xff)); + snd_soc_component_write(component, reg, (value >> 8) & 0xff); + snd_soc_component_write(component, reg, (value >> 16) & 0xff); + /* mask top 2 bits, 7-8 are reserved */ + snd_soc_component_write(component, reg, (value >> 24) & 0x3f); +} + +static int wcd934x_put_iir_band_audio_mixer( + struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + struct wcd_iir_filter_ctl *ctl = + (struct wcd_iir_filter_ctl *)kcontrol->private_value; + struct soc_bytes_ext *params = &ctl->bytes_ext; + int iir_idx = ctl->iir_idx; + int band_idx = ctl->band_idx; + u32 coeff[band_max]; + int reg = wcd934x_cdc_sidetone_iir0_iir_coef_b1_ctl + 16 * iir_idx; + + memcpy(&coeff[0], ucontrol->value.bytes.data, params->max); + + /* mask top bit it is reserved */ + /* updates addr automatically for each b2 write */ + snd_soc_component_write(component, reg, (band_idx * band_max * + sizeof(uint32_t)) & 0x7f); + + set_iir_band_coeff(component, iir_idx, band_idx, coeff[0]); + set_iir_band_coeff(component, iir_idx, band_idx, coeff[1]); + set_iir_band_coeff(component, iir_idx, band_idx, coeff[2]); + set_iir_band_coeff(component, iir_idx, band_idx, coeff[3]); + set_iir_band_coeff(component, iir_idx, band_idx, coeff[4]); + + return 0; +} + +static int wcd934x_get_iir_band_audio_mixer(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + struct wcd_iir_filter_ctl *ctl = + (struct wcd_iir_filter_ctl *)kcontrol->private_value; + struct soc_bytes_ext *params = &ctl->bytes_ext; + int iir_idx = ctl->iir_idx; + int band_idx = ctl->band_idx; + u32 coeff[band_max]; + + coeff[0] = get_iir_band_coeff(component, iir_idx, band_idx, 0); + coeff[1] = get_iir_band_coeff(component, iir_idx, band_idx, 1); + coeff[2] = get_iir_band_coeff(component, iir_idx, band_idx, 2); + coeff[3] = get_iir_band_coeff(component, iir_idx, band_idx, 3); + coeff[4] = get_iir_band_coeff(component, iir_idx, band_idx, 4); + + memcpy(ucontrol->value.bytes.data, &coeff[0], params->max); + + return 0; +} + +static int wcd934x_iir_filter_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *ucontrol) +{ + struct wcd_iir_filter_ctl *ctl = + (struct wcd_iir_filter_ctl *)kcontrol->private_value; + struct soc_bytes_ext *params = &ctl->bytes_ext; + + ucontrol->type = sndrv_ctl_elem_type_bytes; + ucontrol->count = params->max; + + return 0; +} + +static int wcd934x_compander_get(struct snd_kcontrol *kc, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = snd_soc_kcontrol_component(kc); + int comp = ((struct soc_mixer_control *)kc->private_value)->shift; + struct wcd934x_codec *wcd = dev_get_drvdata(component->dev); + + ucontrol->value.integer.value[0] = wcd->comp_enabled[comp]; + + return 0; +} + +static int wcd934x_compander_set(struct snd_kcontrol *kc, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = snd_soc_kcontrol_component(kc); + struct wcd934x_codec *wcd = dev_get_drvdata(component->dev); + int comp = ((struct soc_mixer_control *)kc->private_value)->shift; + int value = ucontrol->value.integer.value[0]; + int sel; + + wcd->comp_enabled[comp] = value; + sel = value ? wcd934x_hph_gain_src_sel_compander : + wcd934x_hph_gain_src_sel_register; + + /* any specific register configuration for compander */ + switch (comp) { + case compander_1: + /* set gain source select based on compander enable/disable */ + snd_soc_component_update_bits(component, wcd934x_hph_l_en, + wcd934x_hph_gain_src_sel_mask, + sel); + break; + case compander_2: + snd_soc_component_update_bits(component, wcd934x_hph_r_en, + wcd934x_hph_gain_src_sel_mask, + sel); + break; + case compander_3: + case compander_4: + case compander_7: + case compander_8: + break; + default: + break; + }; + + return 0; +} + +static int wcd934x_rx_hph_mode_get(struct snd_kcontrol *kc, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = snd_soc_kcontrol_component(kc); + struct wcd934x_codec *wcd = dev_get_drvdata(component->dev); + + ucontrol->value.enumerated.item[0] = wcd->hph_mode; + + return 0; +} + +static int wcd934x_rx_hph_mode_put(struct snd_kcontrol *kc, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = snd_soc_kcontrol_component(kc); + struct wcd934x_codec *wcd = dev_get_drvdata(component->dev); + u32 mode_val; + + mode_val = ucontrol->value.enumerated.item[0]; + + if (mode_val == 0) { + dev_err(wcd->dev, "invalid hph mode, default to clsh hifi "); + mode_val = cls_h_lohifi; + } + wcd->hph_mode = mode_val; + + return 0; +} + +static const struct snd_kcontrol_new wcd934x_snd_controls[] = { + /* gain controls */ + soc_single_tlv("ear pa volume", wcd934x_ana_ear, 4, 4, 1, ear_pa_gain), + soc_single_tlv("hphl volume", wcd934x_hph_l_en, 0, 24, 1, line_gain), + soc_single_tlv("hphr volume", wcd934x_hph_r_en, 0, 24, 1, line_gain), + soc_single_tlv("lineout1 volume", wcd934x_diff_lo_lo1_compander, + 3, 16, 1, line_gain), + soc_single_tlv("lineout2 volume", wcd934x_diff_lo_lo2_compander, + 3, 16, 1, line_gain), + + soc_single_tlv("adc1 volume", wcd934x_ana_amic1, 0, 20, 0, analog_gain), + soc_single_tlv("adc2 volume", wcd934x_ana_amic2, 0, 20, 0, analog_gain), + soc_single_tlv("adc3 volume", wcd934x_ana_amic3, 0, 20, 0, analog_gain), + soc_single_tlv("adc4 volume", wcd934x_ana_amic4, 0, 20, 0, analog_gain), + + soc_single_s8_tlv("rx0 digital volume", wcd934x_cdc_rx0_rx_vol_ctl, + -84, 40, digital_gain), /* -84db min - 40db max */ + soc_single_s8_tlv("rx1 digital volume", wcd934x_cdc_rx1_rx_vol_ctl, + -84, 40, digital_gain), + soc_single_s8_tlv("rx2 digital volume", wcd934x_cdc_rx2_rx_vol_ctl, + -84, 40, digital_gain), + soc_single_s8_tlv("rx3 digital volume", wcd934x_cdc_rx3_rx_vol_ctl, + -84, 40, digital_gain), + soc_single_s8_tlv("rx4 digital volume", wcd934x_cdc_rx4_rx_vol_ctl, + -84, 40, digital_gain), + soc_single_s8_tlv("rx7 digital volume", wcd934x_cdc_rx7_rx_vol_ctl, + -84, 40, digital_gain), + soc_single_s8_tlv("rx8 digital volume", wcd934x_cdc_rx8_rx_vol_ctl, + -84, 40, digital_gain), + soc_single_s8_tlv("rx0 mix digital volume", + wcd934x_cdc_rx0_rx_vol_mix_ctl, + -84, 40, digital_gain), + soc_single_s8_tlv("rx1 mix digital volume", + wcd934x_cdc_rx1_rx_vol_mix_ctl, + -84, 40, digital_gain), + soc_single_s8_tlv("rx2 mix digital volume", + wcd934x_cdc_rx2_rx_vol_mix_ctl, + -84, 40, digital_gain), + soc_single_s8_tlv("rx3 mix digital volume", + wcd934x_cdc_rx3_rx_vol_mix_ctl, + -84, 40, digital_gain), + soc_single_s8_tlv("rx4 mix digital volume", + wcd934x_cdc_rx4_rx_vol_mix_ctl, + -84, 40, digital_gain), + soc_single_s8_tlv("rx7 mix digital volume", + wcd934x_cdc_rx7_rx_vol_mix_ctl, + -84, 40, digital_gain), + soc_single_s8_tlv("rx8 mix digital volume", + wcd934x_cdc_rx8_rx_vol_mix_ctl, + -84, 40, digital_gain), + + soc_single_s8_tlv("dec0 volume", wcd934x_cdc_tx0_tx_vol_ctl, + -84, 40, digital_gain), + soc_single_s8_tlv("dec1 volume", wcd934x_cdc_tx1_tx_vol_ctl, + -84, 40, digital_gain), + soc_single_s8_tlv("dec2 volume", wcd934x_cdc_tx2_tx_vol_ctl, + -84, 40, digital_gain), + soc_single_s8_tlv("dec3 volume", wcd934x_cdc_tx3_tx_vol_ctl, + -84, 40, digital_gain), + soc_single_s8_tlv("dec4 volume", wcd934x_cdc_tx4_tx_vol_ctl, + -84, 40, digital_gain), + soc_single_s8_tlv("dec5 volume", wcd934x_cdc_tx5_tx_vol_ctl, + -84, 40, digital_gain), + soc_single_s8_tlv("dec6 volume", wcd934x_cdc_tx6_tx_vol_ctl, + -84, 40, digital_gain), + soc_single_s8_tlv("dec7 volume", wcd934x_cdc_tx7_tx_vol_ctl, + -84, 40, digital_gain), + soc_single_s8_tlv("dec8 volume", wcd934x_cdc_tx8_tx_vol_ctl, + -84, 40, digital_gain), + + soc_single_s8_tlv("iir0 inp0 volume", + wcd934x_cdc_sidetone_iir0_iir_gain_b1_ctl, -84, 40, + digital_gain), + soc_single_s8_tlv("iir0 inp1 volume", + wcd934x_cdc_sidetone_iir0_iir_gain_b2_ctl, -84, 40, + digital_gain), + soc_single_s8_tlv("iir0 inp2 volume", + wcd934x_cdc_sidetone_iir0_iir_gain_b3_ctl, -84, 40, + digital_gain), + soc_single_s8_tlv("iir0 inp3 volume", + wcd934x_cdc_sidetone_iir0_iir_gain_b4_ctl, -84, 40, + digital_gain), + soc_single_s8_tlv("iir1 inp0 volume", + wcd934x_cdc_sidetone_iir1_iir_gain_b1_ctl, -84, 40, + digital_gain), + soc_single_s8_tlv("iir1 inp1 volume", + wcd934x_cdc_sidetone_iir1_iir_gain_b2_ctl, -84, 40, + digital_gain), + soc_single_s8_tlv("iir1 inp2 volume", + wcd934x_cdc_sidetone_iir1_iir_gain_b3_ctl, -84, 40, + digital_gain), + soc_single_s8_tlv("iir1 inp3 volume", + wcd934x_cdc_sidetone_iir1_iir_gain_b4_ctl, -84, 40, + digital_gain), + + soc_enum("tx0 hpf cut off", cf_dec0_enum), + soc_enum("tx1 hpf cut off", cf_dec1_enum), + soc_enum("tx2 hpf cut off", cf_dec2_enum), + soc_enum("tx3 hpf cut off", cf_dec3_enum), + soc_enum("tx4 hpf cut off", cf_dec4_enum), + soc_enum("tx5 hpf cut off", cf_dec5_enum), + soc_enum("tx6 hpf cut off", cf_dec6_enum), + soc_enum("tx7 hpf cut off", cf_dec7_enum), + soc_enum("tx8 hpf cut off", cf_dec8_enum), + + soc_enum("rx int0_1 hpf cut off", cf_int0_1_enum), + soc_enum("rx int0_2 hpf cut off", cf_int0_2_enum), + soc_enum("rx int1_1 hpf cut off", cf_int1_1_enum), + soc_enum("rx int1_2 hpf cut off", cf_int1_2_enum), + soc_enum("rx int2_1 hpf cut off", cf_int2_1_enum), + soc_enum("rx int2_2 hpf cut off", cf_int2_2_enum), + soc_enum("rx int3_1 hpf cut off", cf_int3_1_enum), + soc_enum("rx int3_2 hpf cut off", cf_int3_2_enum), + soc_enum("rx int4_1 hpf cut off", cf_int4_1_enum), + soc_enum("rx int4_2 hpf cut off", cf_int4_2_enum), + soc_enum("rx int7_1 hpf cut off", cf_int7_1_enum), + soc_enum("rx int7_2 hpf cut off", cf_int7_2_enum), + soc_enum("rx int8_1 hpf cut off", cf_int8_1_enum), + soc_enum("rx int8_2 hpf cut off", cf_int8_2_enum), + + soc_enum_ext("rx hph mode", rx_hph_mode_mux_enum, + wcd934x_rx_hph_mode_get, wcd934x_rx_hph_mode_put), + + soc_single("iir1 band1 switch", wcd934x_cdc_sidetone_iir0_iir_ctl, + 0, 1, 0), + soc_single("iir1 band2 switch", wcd934x_cdc_sidetone_iir0_iir_ctl, + 1, 1, 0), + soc_single("iir1 band3 switch", wcd934x_cdc_sidetone_iir0_iir_ctl, + 2, 1, 0), + soc_single("iir1 band4 switch", wcd934x_cdc_sidetone_iir0_iir_ctl, + 3, 1, 0), + soc_single("iir1 band5 switch", wcd934x_cdc_sidetone_iir0_iir_ctl, + 4, 1, 0), + soc_single("iir2 band1 switch", wcd934x_cdc_sidetone_iir1_iir_ctl, + 0, 1, 0), + soc_single("iir2 band2 switch", wcd934x_cdc_sidetone_iir1_iir_ctl, + 1, 1, 0), + soc_single("iir2 band3 switch", wcd934x_cdc_sidetone_iir1_iir_ctl, + 2, 1, 0), + soc_single("iir2 band4 switch", wcd934x_cdc_sidetone_iir1_iir_ctl, + 3, 1, 0), + soc_single("iir2 band5 switch", wcd934x_cdc_sidetone_iir1_iir_ctl, + 4, 1, 0), + wcd_iir_filter_ctl("iir0 band1", iir0, band1), + wcd_iir_filter_ctl("iir0 band2", iir0, band2), + wcd_iir_filter_ctl("iir0 band3", iir0, band3), + wcd_iir_filter_ctl("iir0 band4", iir0, band4), + wcd_iir_filter_ctl("iir0 band5", iir0, band5), + + wcd_iir_filter_ctl("iir1 band1", iir1, band1), + wcd_iir_filter_ctl("iir1 band2", iir1, band2), + wcd_iir_filter_ctl("iir1 band3", iir1, band3), + wcd_iir_filter_ctl("iir1 band4", iir1, band4), + wcd_iir_filter_ctl("iir1 band5", iir1, band5), + + soc_single_ext("comp1 switch", snd_soc_nopm, compander_1, 1, 0, + wcd934x_compander_get, wcd934x_compander_set), + soc_single_ext("comp2 switch", snd_soc_nopm, compander_2, 1, 0, + wcd934x_compander_get, wcd934x_compander_set), + soc_single_ext("comp3 switch", snd_soc_nopm, compander_3, 1, 0, + wcd934x_compander_get, wcd934x_compander_set), + soc_single_ext("comp4 switch", snd_soc_nopm, compander_4, 1, 0, + wcd934x_compander_get, wcd934x_compander_set), + soc_single_ext("comp7 switch", snd_soc_nopm, compander_7, 1, 0, + wcd934x_compander_get, wcd934x_compander_set), + soc_single_ext("comp8 switch", snd_soc_nopm, compander_8, 1, 0, + wcd934x_compander_get, wcd934x_compander_set), +}; + + .controls = wcd934x_snd_controls, + .num_controls = array_size(wcd934x_snd_controls),
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Audio
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1cde8b82233275a72db34a8c1efa4cf6cc8c894f
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srinivas kandagatla pierre louis bossart pierre louis bossart linux intel com
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sound
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soc
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codecs
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asoc: wcd934x: add playback dapm widgets
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this patch adds required dapm widgets for playback.
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this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
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add support to wcd9340/wcd9341 codec
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['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
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['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
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['asoc ']
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['c']
| 1
| 1,550
| 0
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--- diff --git a/sound/soc/codecs/wcd934x.c b/sound/soc/codecs/wcd934x.c --- a/sound/soc/codecs/wcd934x.c +++ b/sound/soc/codecs/wcd934x.c +static const char *const slim_rx_mux_text[] = { + "zero", "aif1_pb", "aif2_pb", "aif3_pb", "aif4_pb", +}; + +static const char * const rx_int0_7_mix_mux_text[] = { + "zero", "rx0", "rx1", "rx2", "rx3", "rx4", "rx5", + "rx6", "rx7", "proximity" +}; + +static const char * const rx_int_mix_mux_text[] = { + "zero", "rx0", "rx1", "rx2", "rx3", "rx4", "rx5", + "rx6", "rx7" +}; + +static const char * const rx_prim_mix_text[] = { + "zero", "dec0", "dec1", "iir0", "iir1", "rx0", "rx1", "rx2", + "rx3", "rx4", "rx5", "rx6", "rx7" +}; + +static const char * const rx_sidetone_mix_text[] = { + "zero", "src0", "src1", "src_sum" +}; + +static const char * const iir_inp_mux_text[] = { + "zero", "dec0", "dec1", "dec2", "dec3", "dec4", "dec5", "dec6", + "dec7", "dec8", "rx0", "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7" +}; + +static const char * const rx_int_dem_inp_mux_text[] = { + "normal_dsm_out", "clsh_dsm_out", +}; + +static const char * const rx_int0_1_interp_mux_text[] = { + "zero", "rx int0_1 mix1", +}; + +static const char * const rx_int1_1_interp_mux_text[] = { + "zero", "rx int1_1 mix1", +}; + +static const char * const rx_int2_1_interp_mux_text[] = { + "zero", "rx int2_1 mix1", +}; + +static const char * const rx_int3_1_interp_mux_text[] = { + "zero", "rx int3_1 mix1", +}; + +static const char * const rx_int4_1_interp_mux_text[] = { + "zero", "rx int4_1 mix1", +}; + +static const char * const rx_int7_1_interp_mux_text[] = { + "zero", "rx int7_1 mix1", +}; + +static const char * const rx_int8_1_interp_mux_text[] = { + "zero", "rx int8_1 mix1", +}; + +static const char * const rx_int0_2_interp_mux_text[] = { + "zero", "rx int0_2 mux", +}; + +static const char * const rx_int1_2_interp_mux_text[] = { + "zero", "rx int1_2 mux", +}; + +static const char * const rx_int2_2_interp_mux_text[] = { + "zero", "rx int2_2 mux", +}; + +static const char * const rx_int3_2_interp_mux_text[] = { + "zero", "rx int3_2 mux", +}; + +static const char * const rx_int4_2_interp_mux_text[] = { + "zero", "rx int4_2 mux", +}; + +static const char * const rx_int7_2_interp_mux_text[] = { + "zero", "rx int7_2 mux", +}; + +static const char * const rx_int8_2_interp_mux_text[] = { + "zero", "rx int8_2 mux", +}; + +static const struct soc_enum slim_rx_mux_enum = + soc_enum_single_ext(array_size(slim_rx_mux_text), slim_rx_mux_text); + +static const struct soc_enum rx_int0_2_mux_chain_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_rx_int0_cfg1, 0, 10, + rx_int0_7_mix_mux_text); + +static const struct soc_enum rx_int1_2_mux_chain_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_rx_int1_cfg1, 0, 9, + rx_int_mix_mux_text); + +static const struct soc_enum rx_int2_2_mux_chain_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_rx_int2_cfg1, 0, 9, + rx_int_mix_mux_text); + +static const struct soc_enum rx_int3_2_mux_chain_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_rx_int3_cfg1, 0, 9, + rx_int_mix_mux_text); + +static const struct soc_enum rx_int4_2_mux_chain_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_rx_int4_cfg1, 0, 9, + rx_int_mix_mux_text); + +static const struct soc_enum rx_int7_2_mux_chain_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_rx_int7_cfg1, 0, 10, + rx_int0_7_mix_mux_text); + +static const struct soc_enum rx_int8_2_mux_chain_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_rx_int8_cfg1, 0, 9, + rx_int_mix_mux_text); + +static const struct soc_enum rx_int0_1_mix_inp0_chain_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_rx_int0_cfg0, 0, 13, + rx_prim_mix_text); + +static const struct soc_enum rx_int0_1_mix_inp1_chain_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_rx_int0_cfg0, 4, 13, + rx_prim_mix_text); + +static const struct soc_enum rx_int0_1_mix_inp2_chain_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_rx_int0_cfg1, 4, 13, + rx_prim_mix_text); + +static const struct soc_enum rx_int1_1_mix_inp0_chain_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_rx_int1_cfg0, 0, 13, + rx_prim_mix_text); + +static const struct soc_enum rx_int1_1_mix_inp1_chain_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_rx_int1_cfg0, 4, 13, + rx_prim_mix_text); + +static const struct soc_enum rx_int1_1_mix_inp2_chain_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_rx_int1_cfg1, 4, 13, + rx_prim_mix_text); + +static const struct soc_enum rx_int2_1_mix_inp0_chain_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_rx_int2_cfg0, 0, 13, + rx_prim_mix_text); + +static const struct soc_enum rx_int2_1_mix_inp1_chain_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_rx_int2_cfg0, 4, 13, + rx_prim_mix_text); + +static const struct soc_enum rx_int2_1_mix_inp2_chain_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_rx_int2_cfg1, 4, 13, + rx_prim_mix_text); + +static const struct soc_enum rx_int3_1_mix_inp0_chain_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_rx_int3_cfg0, 0, 13, + rx_prim_mix_text); + +static const struct soc_enum rx_int3_1_mix_inp1_chain_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_rx_int3_cfg0, 4, 13, + rx_prim_mix_text); + +static const struct soc_enum rx_int3_1_mix_inp2_chain_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_rx_int3_cfg1, 4, 13, + rx_prim_mix_text); + +static const struct soc_enum rx_int4_1_mix_inp0_chain_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_rx_int4_cfg0, 0, 13, + rx_prim_mix_text); + +static const struct soc_enum rx_int4_1_mix_inp1_chain_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_rx_int4_cfg0, 4, 13, + rx_prim_mix_text); + +static const struct soc_enum rx_int4_1_mix_inp2_chain_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_rx_int4_cfg1, 4, 13, + rx_prim_mix_text); + +static const struct soc_enum rx_int7_1_mix_inp0_chain_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_rx_int7_cfg0, 0, 13, + rx_prim_mix_text); + +static const struct soc_enum rx_int7_1_mix_inp1_chain_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_rx_int7_cfg0, 4, 13, + rx_prim_mix_text); + +static const struct soc_enum rx_int7_1_mix_inp2_chain_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_rx_int7_cfg1, 4, 13, + rx_prim_mix_text); + +static const struct soc_enum rx_int8_1_mix_inp0_chain_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_rx_int8_cfg0, 0, 13, + rx_prim_mix_text); + +static const struct soc_enum rx_int8_1_mix_inp1_chain_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_rx_int8_cfg0, 4, 13, + rx_prim_mix_text); + +static const struct soc_enum rx_int8_1_mix_inp2_chain_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_rx_int8_cfg1, 4, 13, + rx_prim_mix_text); + +static const struct soc_enum rx_int0_mix2_inp_mux_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_sidetone_src_cfg0, 0, 4, + rx_sidetone_mix_text); + +static const struct soc_enum rx_int1_mix2_inp_mux_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_sidetone_src_cfg0, 2, 4, + rx_sidetone_mix_text); + +static const struct soc_enum rx_int2_mix2_inp_mux_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_sidetone_src_cfg0, 4, 4, + rx_sidetone_mix_text); + +static const struct soc_enum rx_int3_mix2_inp_mux_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_sidetone_src_cfg0, 6, 4, + rx_sidetone_mix_text); + +static const struct soc_enum rx_int4_mix2_inp_mux_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_sidetone_src_cfg1, 0, 4, + rx_sidetone_mix_text); + +static const struct soc_enum rx_int7_mix2_inp_mux_enum = + soc_enum_single(wcd934x_cdc_rx_inp_mux_sidetone_src_cfg1, 2, 4, + rx_sidetone_mix_text); + +static const struct soc_enum iir0_inp0_mux_enum = + soc_enum_single(wcd934x_cdc_sidetone_iir_inp_mux_iir0_mix_cfg0, + 0, 18, iir_inp_mux_text); + +static const struct soc_enum iir0_inp1_mux_enum = + soc_enum_single(wcd934x_cdc_sidetone_iir_inp_mux_iir0_mix_cfg1, + 0, 18, iir_inp_mux_text); + +static const struct soc_enum iir0_inp2_mux_enum = + soc_enum_single(wcd934x_cdc_sidetone_iir_inp_mux_iir0_mix_cfg2, + 0, 18, iir_inp_mux_text); + +static const struct soc_enum iir0_inp3_mux_enum = + soc_enum_single(wcd934x_cdc_sidetone_iir_inp_mux_iir0_mix_cfg3, + 0, 18, iir_inp_mux_text); + +static const struct soc_enum iir1_inp0_mux_enum = + soc_enum_single(wcd934x_cdc_sidetone_iir_inp_mux_iir1_mix_cfg0, + 0, 18, iir_inp_mux_text); + +static const struct soc_enum iir1_inp1_mux_enum = + soc_enum_single(wcd934x_cdc_sidetone_iir_inp_mux_iir1_mix_cfg1, + 0, 18, iir_inp_mux_text); + +static const struct soc_enum iir1_inp2_mux_enum = + soc_enum_single(wcd934x_cdc_sidetone_iir_inp_mux_iir1_mix_cfg2, + 0, 18, iir_inp_mux_text); + +static const struct soc_enum iir1_inp3_mux_enum = + soc_enum_single(wcd934x_cdc_sidetone_iir_inp_mux_iir1_mix_cfg3, + 0, 18, iir_inp_mux_text); + +static const struct soc_enum rx_int0_dem_inp_mux_enum = + soc_enum_single(wcd934x_cdc_rx0_rx_path_sec0, 0, + array_size(rx_int_dem_inp_mux_text), + rx_int_dem_inp_mux_text); + +static const struct soc_enum rx_int1_dem_inp_mux_enum = + soc_enum_single(wcd934x_cdc_rx1_rx_path_sec0, 0, + array_size(rx_int_dem_inp_mux_text), + rx_int_dem_inp_mux_text); + +static const struct soc_enum rx_int2_dem_inp_mux_enum = + soc_enum_single(wcd934x_cdc_rx2_rx_path_sec0, 0, + array_size(rx_int_dem_inp_mux_text), + rx_int_dem_inp_mux_text); +static const struct soc_enum rx_int0_1_interp_mux_enum = + soc_enum_single(snd_soc_nopm, 0, 2, + rx_int0_1_interp_mux_text); + +static const struct soc_enum rx_int1_1_interp_mux_enum = + soc_enum_single(snd_soc_nopm, 0, 2, + rx_int1_1_interp_mux_text); + +static const struct soc_enum rx_int2_1_interp_mux_enum = + soc_enum_single(snd_soc_nopm, 0, 2, + rx_int2_1_interp_mux_text); + +static const struct soc_enum rx_int3_1_interp_mux_enum = + soc_enum_single(snd_soc_nopm, 0, 2, rx_int3_1_interp_mux_text); + +static const struct soc_enum rx_int4_1_interp_mux_enum = + soc_enum_single(snd_soc_nopm, 0, 2, rx_int4_1_interp_mux_text); + +static const struct soc_enum rx_int7_1_interp_mux_enum = + soc_enum_single(snd_soc_nopm, 0, 2, rx_int7_1_interp_mux_text); + +static const struct soc_enum rx_int8_1_interp_mux_enum = + soc_enum_single(snd_soc_nopm, 0, 2, rx_int8_1_interp_mux_text); + +static const struct soc_enum rx_int0_2_interp_mux_enum = + soc_enum_single(snd_soc_nopm, 0, 2, rx_int0_2_interp_mux_text); + +static const struct soc_enum rx_int1_2_interp_mux_enum = + soc_enum_single(snd_soc_nopm, 0, 2, rx_int1_2_interp_mux_text); + +static const struct soc_enum rx_int2_2_interp_mux_enum = + soc_enum_single(snd_soc_nopm, 0, 2, rx_int2_2_interp_mux_text); + +static const struct soc_enum rx_int3_2_interp_mux_enum = + soc_enum_single(snd_soc_nopm, 0, 2, rx_int3_2_interp_mux_text); + +static const struct soc_enum rx_int4_2_interp_mux_enum = + soc_enum_single(snd_soc_nopm, 0, 2, rx_int4_2_interp_mux_text); + +static const struct soc_enum rx_int7_2_interp_mux_enum = + soc_enum_single(snd_soc_nopm, 0, 2, rx_int7_2_interp_mux_text); + +static const struct soc_enum rx_int8_2_interp_mux_enum = + soc_enum_single(snd_soc_nopm, 0, 2, rx_int8_2_interp_mux_text); + +static int wcd934x_codec_enable_mclk(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kc, int event) +{ + struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm); + struct wcd934x_codec *wcd = dev_get_drvdata(comp->dev); + + switch (event) { + case snd_soc_dapm_pre_pmu: + return __wcd934x_cdc_mclk_enable(wcd, true); + case snd_soc_dapm_post_pmd: + return __wcd934x_cdc_mclk_enable(wcd, false); + } + + return 0; +} + +static int slim_rx_mux_get(struct snd_kcontrol *kc, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_dapm_context *dapm = snd_soc_dapm_kcontrol_dapm(kc); + struct snd_soc_dapm_widget *w = snd_soc_dapm_kcontrol_widget(kc); + struct wcd934x_codec *wcd = dev_get_drvdata(dapm->dev); + + ucontrol->value.enumerated.item[0] = wcd->rx_port_value[w->shift]; + + return 0; +} + +static int slim_rx_mux_put(struct snd_kcontrol *kc, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_dapm_widget *w = snd_soc_dapm_kcontrol_widget(kc); + struct wcd934x_codec *wcd = dev_get_drvdata(w->dapm->dev); + struct soc_enum *e = (struct soc_enum *)kc->private_value; + struct snd_soc_dapm_update *update = null; + u32 port_id = w->shift; + + if (wcd->rx_port_value[port_id] == ucontrol->value.enumerated.item[0]) + return 0; + + wcd->rx_port_value[port_id] = ucontrol->value.enumerated.item[0]; + + switch (wcd->rx_port_value[port_id]) { + case 0: + list_del_init(&wcd->rx_chs[port_id].list); + break; + case 1: + list_add_tail(&wcd->rx_chs[port_id].list, + &wcd->dai[aif1_pb].slim_ch_list); + break; + case 2: + list_add_tail(&wcd->rx_chs[port_id].list, + &wcd->dai[aif2_pb].slim_ch_list); + break; + case 3: + list_add_tail(&wcd->rx_chs[port_id].list, + &wcd->dai[aif3_pb].slim_ch_list); + break; + case 4: + list_add_tail(&wcd->rx_chs[port_id].list, + &wcd->dai[aif4_pb].slim_ch_list); + break; + default: + dev_err(wcd->dev, "unknown aif %d ", + wcd->rx_port_value[port_id]); + goto err; + } + + snd_soc_dapm_mux_update_power(w->dapm, kc, wcd->rx_port_value[port_id], + e, update); + + return 0; +err: + return -einval; +} + +static int wcd934x_int_dem_inp_mux_put(struct snd_kcontrol *kc, + struct snd_ctl_elem_value *ucontrol) +{ + struct soc_enum *e = (struct soc_enum *)kc->private_value; + struct snd_soc_component *component; + int reg, val, ret; + + component = snd_soc_dapm_kcontrol_component(kc); + val = ucontrol->value.enumerated.item[0]; + if (e->reg == wcd934x_cdc_rx0_rx_path_sec0) + reg = wcd934x_cdc_rx0_rx_path_cfg0; + else if (e->reg == wcd934x_cdc_rx1_rx_path_sec0) + reg = wcd934x_cdc_rx1_rx_path_cfg0; + else if (e->reg == wcd934x_cdc_rx2_rx_path_sec0) + reg = wcd934x_cdc_rx2_rx_path_cfg0; + else + return -einval; + + /* set look ahead delay */ + if (val) + snd_soc_component_update_bits(component, reg, + wcd934x_rx_dly_zn_en_mask, + wcd934x_rx_dly_zn_enable); + else + snd_soc_component_update_bits(component, reg, + wcd934x_rx_dly_zn_en_mask, + wcd934x_rx_dly_zn_disable); + + ret = snd_soc_dapm_put_enum_double(kc, ucontrol); + + return ret; +} + +static const struct snd_kcontrol_new rx_int0_2_mux = + soc_dapm_enum("rx int0_2 mux mux", rx_int0_2_mux_chain_enum); + +static const struct snd_kcontrol_new rx_int1_2_mux = + soc_dapm_enum("rx int1_2 mux mux", rx_int1_2_mux_chain_enum); + +static const struct snd_kcontrol_new rx_int2_2_mux = + soc_dapm_enum("rx int2_2 mux mux", rx_int2_2_mux_chain_enum); + +static const struct snd_kcontrol_new rx_int3_2_mux = + soc_dapm_enum("rx int3_2 mux mux", rx_int3_2_mux_chain_enum); + +static const struct snd_kcontrol_new rx_int4_2_mux = + soc_dapm_enum("rx int4_2 mux mux", rx_int4_2_mux_chain_enum); + +static const struct snd_kcontrol_new rx_int7_2_mux = + soc_dapm_enum("rx int7_2 mux mux", rx_int7_2_mux_chain_enum); + +static const struct snd_kcontrol_new rx_int8_2_mux = + soc_dapm_enum("rx int8_2 mux mux", rx_int8_2_mux_chain_enum); + +static const struct snd_kcontrol_new rx_int0_1_mix_inp0_mux = + soc_dapm_enum("rx int0_1 mix1 inp0 mux", rx_int0_1_mix_inp0_chain_enum); + +static const struct snd_kcontrol_new rx_int0_1_mix_inp1_mux = + soc_dapm_enum("rx int0_1 mix1 inp1 mux", rx_int0_1_mix_inp1_chain_enum); + +static const struct snd_kcontrol_new rx_int0_1_mix_inp2_mux = + soc_dapm_enum("rx int0_1 mix1 inp2 mux", rx_int0_1_mix_inp2_chain_enum); + +static const struct snd_kcontrol_new rx_int1_1_mix_inp0_mux = + soc_dapm_enum("rx int1_1 mix1 inp0 mux", rx_int1_1_mix_inp0_chain_enum); + +static const struct snd_kcontrol_new rx_int1_1_mix_inp1_mux = + soc_dapm_enum("rx int1_1 mix1 inp1 mux", rx_int1_1_mix_inp1_chain_enum); + +static const struct snd_kcontrol_new rx_int1_1_mix_inp2_mux = + soc_dapm_enum("rx int1_1 mix1 inp2 mux", rx_int1_1_mix_inp2_chain_enum); + +static const struct snd_kcontrol_new rx_int2_1_mix_inp0_mux = + soc_dapm_enum("rx int2_1 mix1 inp0 mux", rx_int2_1_mix_inp0_chain_enum); + +static const struct snd_kcontrol_new rx_int2_1_mix_inp1_mux = + soc_dapm_enum("rx int2_1 mix1 inp1 mux", rx_int2_1_mix_inp1_chain_enum); + +static const struct snd_kcontrol_new rx_int2_1_mix_inp2_mux = + soc_dapm_enum("rx int2_1 mix1 inp2 mux", rx_int2_1_mix_inp2_chain_enum); + +static const struct snd_kcontrol_new rx_int3_1_mix_inp0_mux = + soc_dapm_enum("rx int3_1 mix1 inp0 mux", rx_int3_1_mix_inp0_chain_enum); + +static const struct snd_kcontrol_new rx_int3_1_mix_inp1_mux = + soc_dapm_enum("rx int3_1 mix1 inp1 mux", rx_int3_1_mix_inp1_chain_enum); + +static const struct snd_kcontrol_new rx_int3_1_mix_inp2_mux = + soc_dapm_enum("rx int3_1 mix1 inp2 mux", rx_int3_1_mix_inp2_chain_enum); + +static const struct snd_kcontrol_new rx_int4_1_mix_inp0_mux = + soc_dapm_enum("rx int4_1 mix1 inp0 mux", rx_int4_1_mix_inp0_chain_enum); + +static const struct snd_kcontrol_new rx_int4_1_mix_inp1_mux = + soc_dapm_enum("rx int4_1 mix1 inp1 mux", rx_int4_1_mix_inp1_chain_enum); + +static const struct snd_kcontrol_new rx_int4_1_mix_inp2_mux = + soc_dapm_enum("rx int4_1 mix1 inp2 mux", rx_int4_1_mix_inp2_chain_enum); + +static const struct snd_kcontrol_new rx_int7_1_mix_inp0_mux = + soc_dapm_enum("rx int7_1 mix1 inp0 mux", rx_int7_1_mix_inp0_chain_enum); + +static const struct snd_kcontrol_new rx_int7_1_mix_inp1_mux = + soc_dapm_enum("rx int7_1 mix1 inp1 mux", rx_int7_1_mix_inp1_chain_enum); + +static const struct snd_kcontrol_new rx_int7_1_mix_inp2_mux = + soc_dapm_enum("rx int7_1 mix1 inp2 mux", rx_int7_1_mix_inp2_chain_enum); + +static const struct snd_kcontrol_new rx_int8_1_mix_inp0_mux = + soc_dapm_enum("rx int8_1 mix1 inp0 mux", rx_int8_1_mix_inp0_chain_enum); + +static const struct snd_kcontrol_new rx_int8_1_mix_inp1_mux = + soc_dapm_enum("rx int8_1 mix1 inp1 mux", rx_int8_1_mix_inp1_chain_enum); + +static const struct snd_kcontrol_new rx_int8_1_mix_inp2_mux = + soc_dapm_enum("rx int8_1 mix1 inp2 mux", rx_int8_1_mix_inp2_chain_enum); + +static const struct snd_kcontrol_new rx_int0_mix2_inp_mux = + soc_dapm_enum("rx int0 mix2 inp mux", rx_int0_mix2_inp_mux_enum); + +static const struct snd_kcontrol_new rx_int1_mix2_inp_mux = + soc_dapm_enum("rx int1 mix2 inp mux", rx_int1_mix2_inp_mux_enum); + +static const struct snd_kcontrol_new rx_int2_mix2_inp_mux = + soc_dapm_enum("rx int2 mix2 inp mux", rx_int2_mix2_inp_mux_enum); + +static const struct snd_kcontrol_new rx_int3_mix2_inp_mux = + soc_dapm_enum("rx int3 mix2 inp mux", rx_int3_mix2_inp_mux_enum); + +static const struct snd_kcontrol_new rx_int4_mix2_inp_mux = + soc_dapm_enum("rx int4 mix2 inp mux", rx_int4_mix2_inp_mux_enum); + +static const struct snd_kcontrol_new rx_int7_mix2_inp_mux = + soc_dapm_enum("rx int7 mix2 inp mux", rx_int7_mix2_inp_mux_enum); + +static const struct snd_kcontrol_new iir0_inp0_mux = + soc_dapm_enum("iir0 inp0 mux", iir0_inp0_mux_enum); +static const struct snd_kcontrol_new iir0_inp1_mux = + soc_dapm_enum("iir0 inp1 mux", iir0_inp1_mux_enum); +static const struct snd_kcontrol_new iir0_inp2_mux = + soc_dapm_enum("iir0 inp2 mux", iir0_inp2_mux_enum); +static const struct snd_kcontrol_new iir0_inp3_mux = + soc_dapm_enum("iir0 inp3 mux", iir0_inp3_mux_enum); + +static const struct snd_kcontrol_new iir1_inp0_mux = + soc_dapm_enum("iir1 inp0 mux", iir1_inp0_mux_enum); +static const struct snd_kcontrol_new iir1_inp1_mux = + soc_dapm_enum("iir1 inp1 mux", iir1_inp1_mux_enum); +static const struct snd_kcontrol_new iir1_inp2_mux = + soc_dapm_enum("iir1 inp2 mux", iir1_inp2_mux_enum); +static const struct snd_kcontrol_new iir1_inp3_mux = + soc_dapm_enum("iir1 inp3 mux", iir1_inp3_mux_enum); + +static const struct snd_kcontrol_new slim_rx_mux[wcd934x_rx_max] = { + soc_dapm_enum_ext("slim rx0 mux", slim_rx_mux_enum, + slim_rx_mux_get, slim_rx_mux_put), + soc_dapm_enum_ext("slim rx1 mux", slim_rx_mux_enum, + slim_rx_mux_get, slim_rx_mux_put), + soc_dapm_enum_ext("slim rx2 mux", slim_rx_mux_enum, + slim_rx_mux_get, slim_rx_mux_put), + soc_dapm_enum_ext("slim rx3 mux", slim_rx_mux_enum, + slim_rx_mux_get, slim_rx_mux_put), + soc_dapm_enum_ext("slim rx4 mux", slim_rx_mux_enum, + slim_rx_mux_get, slim_rx_mux_put), + soc_dapm_enum_ext("slim rx5 mux", slim_rx_mux_enum, + slim_rx_mux_get, slim_rx_mux_put), + soc_dapm_enum_ext("slim rx6 mux", slim_rx_mux_enum, + slim_rx_mux_get, slim_rx_mux_put), + soc_dapm_enum_ext("slim rx7 mux", slim_rx_mux_enum, + slim_rx_mux_get, slim_rx_mux_put), +}; + +static const struct snd_kcontrol_new rx_int1_asrc_switch[] = { + soc_dapm_single("hphl switch", snd_soc_nopm, 0, 1, 0), +}; + +static const struct snd_kcontrol_new rx_int2_asrc_switch[] = { + soc_dapm_single("hphr switch", snd_soc_nopm, 0, 1, 0), +}; + +static const struct snd_kcontrol_new rx_int3_asrc_switch[] = { + soc_dapm_single("lo1 switch", snd_soc_nopm, 0, 1, 0), +}; + +static const struct snd_kcontrol_new rx_int4_asrc_switch[] = { + soc_dapm_single("lo2 switch", snd_soc_nopm, 0, 1, 0), +}; + +static const struct snd_kcontrol_new rx_int0_dem_inp_mux = + soc_dapm_enum_ext("rx int0 dem mux mux", rx_int0_dem_inp_mux_enum, + snd_soc_dapm_get_enum_double, + wcd934x_int_dem_inp_mux_put); + +static const struct snd_kcontrol_new rx_int1_dem_inp_mux = + soc_dapm_enum_ext("rx int1 dem mux mux", rx_int1_dem_inp_mux_enum, + snd_soc_dapm_get_enum_double, + wcd934x_int_dem_inp_mux_put); + +static const struct snd_kcontrol_new rx_int2_dem_inp_mux = + soc_dapm_enum_ext("rx int2 dem mux mux", rx_int2_dem_inp_mux_enum, + snd_soc_dapm_get_enum_double, + wcd934x_int_dem_inp_mux_put); + +static const struct snd_kcontrol_new rx_int0_1_interp_mux = + soc_dapm_enum("rx int0_1 interp mux", rx_int0_1_interp_mux_enum); + +static const struct snd_kcontrol_new rx_int1_1_interp_mux = + soc_dapm_enum("rx int1_1 interp mux", rx_int1_1_interp_mux_enum); + +static const struct snd_kcontrol_new rx_int2_1_interp_mux = + soc_dapm_enum("rx int2_1 interp mux", rx_int2_1_interp_mux_enum); + +static const struct snd_kcontrol_new rx_int3_1_interp_mux = + soc_dapm_enum("rx int3_1 interp mux", rx_int3_1_interp_mux_enum); + +static const struct snd_kcontrol_new rx_int4_1_interp_mux = + soc_dapm_enum("rx int4_1 interp mux", rx_int4_1_interp_mux_enum); + +static const struct snd_kcontrol_new rx_int7_1_interp_mux = + soc_dapm_enum("rx int7_1 interp mux", rx_int7_1_interp_mux_enum); + +static const struct snd_kcontrol_new rx_int8_1_interp_mux = + soc_dapm_enum("rx int8_1 interp mux", rx_int8_1_interp_mux_enum); + +static const struct snd_kcontrol_new rx_int0_2_interp_mux = + soc_dapm_enum("rx int0_2 interp mux", rx_int0_2_interp_mux_enum); + +static const struct snd_kcontrol_new rx_int1_2_interp_mux = + soc_dapm_enum("rx int1_2 interp mux", rx_int1_2_interp_mux_enum); + +static const struct snd_kcontrol_new rx_int2_2_interp_mux = + soc_dapm_enum("rx int2_2 interp mux", rx_int2_2_interp_mux_enum); + +static const struct snd_kcontrol_new rx_int3_2_interp_mux = + soc_dapm_enum("rx int3_2 interp mux", rx_int3_2_interp_mux_enum); + +static const struct snd_kcontrol_new rx_int4_2_interp_mux = + soc_dapm_enum("rx int4_2 interp mux", rx_int4_2_interp_mux_enum); + +static const struct snd_kcontrol_new rx_int7_2_interp_mux = + soc_dapm_enum("rx int7_2 interp mux", rx_int7_2_interp_mux_enum); + +static const struct snd_kcontrol_new rx_int8_2_interp_mux = + soc_dapm_enum("rx int8_2 interp mux", rx_int8_2_interp_mux_enum); + +static void wcd934x_codec_enable_int_port(struct wcd_slim_codec_dai_data *dai, + struct snd_soc_component *component) +{ + int port_num = 0; + unsigned short reg = 0; + unsigned int val = 0; + struct wcd934x_codec *wcd = dev_get_drvdata(component->dev); + struct wcd934x_slim_ch *ch; + + list_for_each_entry(ch, &dai->slim_ch_list, list) { + if (ch->port >= wcd934x_rx_start) { + port_num = ch->port - wcd934x_rx_start; + reg = wcd934x_slim_pgd_port_int_en0 + (port_num / 8); + } else { + port_num = ch->port; + reg = wcd934x_slim_pgd_port_int_tx_en0 + (port_num / 8); + } + + regmap_read(wcd->if_regmap, reg, &val); + if (!(val & bit(port_num % 8))) + regmap_write(wcd->if_regmap, reg, + val | bit(port_num % 8)); + } +} + +static int wcd934x_codec_enable_slim(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kc, int event) +{ + struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm); + struct wcd934x_codec *wcd = snd_soc_component_get_drvdata(comp); + struct wcd_slim_codec_dai_data *dai = &wcd->dai[w->shift]; + + switch (event) { + case snd_soc_dapm_post_pmu: + wcd934x_codec_enable_int_port(dai, comp); + break; + } + + return 0; +} + +static void wcd934x_codec_hd2_control(struct snd_soc_component *component, + u16 interp_idx, int event) +{ + u16 hd2_scale_reg; + u16 hd2_enable_reg = 0; + + switch (interp_idx) { + case interp_hphl: + hd2_scale_reg = wcd934x_cdc_rx1_rx_path_sec3; + hd2_enable_reg = wcd934x_cdc_rx1_rx_path_cfg0; + break; + case interp_hphr: + hd2_scale_reg = wcd934x_cdc_rx2_rx_path_sec3; + hd2_enable_reg = wcd934x_cdc_rx2_rx_path_cfg0; + break; + default: + return; + } + + if (snd_soc_dapm_event_on(event)) { + snd_soc_component_update_bits(component, hd2_scale_reg, + wcd934x_cdc_rx_path_sec_hd2_alpha_mask, + wcd934x_cdc_rx_path_sec_hd2_alpha_0p3125); + snd_soc_component_update_bits(component, hd2_enable_reg, + wcd934x_cdc_rx_path_cfg_hd2_en_mask, + wcd934x_cdc_rx_path_cfg_hd2_enable); + } + + if (snd_soc_dapm_event_off(event)) { + snd_soc_component_update_bits(component, hd2_enable_reg, + wcd934x_cdc_rx_path_cfg_hd2_en_mask, + wcd934x_cdc_rx_path_cfg_hd2_disable); + snd_soc_component_update_bits(component, hd2_scale_reg, + wcd934x_cdc_rx_path_sec_hd2_alpha_mask, + wcd934x_cdc_rx_path_sec_hd2_alpha_0p0000); + } +} + +static void wcd934x_codec_hphdelay_lutbypass(struct snd_soc_component *comp, + u16 interp_idx, int event) +{ + u8 hph_dly_mask; + u16 hph_lut_bypass_reg = 0; + u16 hph_comp_ctrl7 = 0; + + switch (interp_idx) { + case interp_hphl: + hph_dly_mask = 1; + hph_lut_bypass_reg = wcd934x_cdc_top_hphl_comp_lut; + hph_comp_ctrl7 = wcd934x_cdc_compander1_ctl7; + break; + case interp_hphr: + hph_dly_mask = 2; + hph_lut_bypass_reg = wcd934x_cdc_top_hphr_comp_lut; + hph_comp_ctrl7 = wcd934x_cdc_compander2_ctl7; + break; + default: + return; + } + + if (snd_soc_dapm_event_on(event)) { + snd_soc_component_update_bits(comp, wcd934x_cdc_clsh_test0, + hph_dly_mask, 0x0); + snd_soc_component_update_bits(comp, hph_lut_bypass_reg, + wcd934x_hph_lut_bypass_mask, + wcd934x_hph_lut_bypass_enable); + } + + if (snd_soc_dapm_event_off(event)) { + snd_soc_component_update_bits(comp, wcd934x_cdc_clsh_test0, + hph_dly_mask, hph_dly_mask); + snd_soc_component_update_bits(comp, hph_lut_bypass_reg, + wcd934x_hph_lut_bypass_mask, + wcd934x_hph_lut_bypass_disable); + } +} + +static int wcd934x_config_compander(struct snd_soc_component *comp, + int interp_n, int event) +{ + struct wcd934x_codec *wcd = dev_get_drvdata(comp->dev); + int compander; + u16 comp_ctl0_reg, rx_path_cfg0_reg; + + /* ear does not have compander */ + if (!interp_n) + return 0; + + compander = interp_n - 1; + if (!wcd->comp_enabled[compander]) + return 0; + + comp_ctl0_reg = wcd934x_cdc_compander1_ctl0 + (compander * 8); + rx_path_cfg0_reg = wcd934x_cdc_rx1_rx_path_cfg0 + (compander * 20); + + switch (event) { + case snd_soc_dapm_pre_pmu: + /* enable compander clock */ + snd_soc_component_update_bits(comp, comp_ctl0_reg, + wcd934x_comp_clk_en_mask, + wcd934x_comp_clk_enable); + snd_soc_component_update_bits(comp, comp_ctl0_reg, + wcd934x_comp_soft_rst_mask, + wcd934x_comp_soft_rst_enable); + snd_soc_component_update_bits(comp, comp_ctl0_reg, + wcd934x_comp_soft_rst_mask, + wcd934x_comp_soft_rst_disable); + snd_soc_component_update_bits(comp, rx_path_cfg0_reg, + wcd934x_hph_cmp_en_mask, + wcd934x_hph_cmp_enable); + break; + case snd_soc_dapm_post_pmd: + snd_soc_component_update_bits(comp, rx_path_cfg0_reg, + wcd934x_hph_cmp_en_mask, + wcd934x_hph_cmp_disable); + snd_soc_component_update_bits(comp, comp_ctl0_reg, + wcd934x_comp_halt_mask, + wcd934x_comp_halt); + snd_soc_component_update_bits(comp, comp_ctl0_reg, + wcd934x_comp_soft_rst_mask, + wcd934x_comp_soft_rst_enable); + snd_soc_component_update_bits(comp, comp_ctl0_reg, + wcd934x_comp_soft_rst_mask, + wcd934x_comp_soft_rst_disable); + snd_soc_component_update_bits(comp, comp_ctl0_reg, + wcd934x_comp_clk_en_mask, 0x0); + snd_soc_component_update_bits(comp, comp_ctl0_reg, + wcd934x_comp_soft_rst_mask, 0x0); + break; + } + + return 0; +} + +static int wcd934x_codec_enable_interp_clk(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kc, int event) +{ + struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm); + int interp_idx = w->shift; + u16 main_reg = wcd934x_cdc_rx0_rx_path_ctl + (interp_idx * 20); + + switch (event) { + case snd_soc_dapm_pre_pmu: + /* clk enable */ + snd_soc_component_update_bits(comp, main_reg, + wcd934x_rx_clk_en_mask, + wcd934x_rx_clk_enable); + wcd934x_codec_hd2_control(comp, interp_idx, event); + wcd934x_codec_hphdelay_lutbypass(comp, interp_idx, event); + wcd934x_config_compander(comp, interp_idx, event); + break; + case snd_soc_dapm_post_pmd: + wcd934x_config_compander(comp, interp_idx, event); + wcd934x_codec_hphdelay_lutbypass(comp, interp_idx, event); + wcd934x_codec_hd2_control(comp, interp_idx, event); + /* clk disable */ + snd_soc_component_update_bits(comp, main_reg, + wcd934x_rx_clk_en_mask, 0); + /* reset enable and disable */ + snd_soc_component_update_bits(comp, main_reg, + wcd934x_rx_reset_mask, + wcd934x_rx_reset_enable); + snd_soc_component_update_bits(comp, main_reg, + wcd934x_rx_reset_mask, + wcd934x_rx_reset_disable); + /* reset rate to 48k*/ + snd_soc_component_update_bits(comp, main_reg, + wcd934x_rx_pcm_rate_mask, + wcd934x_rx_pcm_rate_f_48k); + break; + } + + return 0; +} + +static int wcd934x_codec_enable_mix_path(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kc, int event) +{ + struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm); + int offset_val = 0; + u16 gain_reg, mix_reg; + int val = 0; + + gain_reg = wcd934x_cdc_rx0_rx_vol_mix_ctl + + (w->shift * wcd934x_rx_path_ctl_offset); + mix_reg = wcd934x_cdc_rx0_rx_path_mix_ctl + + (w->shift * wcd934x_rx_path_ctl_offset); + + switch (event) { + case snd_soc_dapm_pre_pmu: + /* clk enable */ + snd_soc_component_update_bits(comp, mix_reg, + wcd934x_cdc_rx_mix_clk_en_mask, + wcd934x_cdc_rx_mix_clk_enable); + break; + + case snd_soc_dapm_post_pmu: + val = snd_soc_component_read32(comp, gain_reg); + val += offset_val; + snd_soc_component_write(comp, gain_reg, val); + break; + }; + + return 0; +} + +static int wcd934x_codec_set_iir_gain(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm); + int reg = w->reg; + + switch (event) { + case snd_soc_dapm_post_pmu: + /* b1 gain */ + snd_soc_component_write(comp, reg, + snd_soc_component_read32(comp, reg)); + /* b2 gain */ + reg++; + snd_soc_component_write(comp, reg, + snd_soc_component_read32(comp, reg)); + /* b3 gain */ + reg++; + snd_soc_component_write(comp, reg, + snd_soc_component_read32(comp, reg)); + /* b4 gain */ + reg++; + snd_soc_component_write(comp, reg, + snd_soc_component_read32(comp, reg)); + /* b5 gain */ + reg++; + snd_soc_component_write(comp, reg, + snd_soc_component_read32(comp, reg)); + break; + default: + break; + } + return 0; +} + +static int wcd934x_codec_enable_main_path(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event) +{ + struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm); + u16 gain_reg; + + gain_reg = wcd934x_cdc_rx0_rx_vol_ctl + (w->shift * + wcd934x_rx_path_ctl_offset); + + switch (event) { + case snd_soc_dapm_post_pmu: + snd_soc_component_write(comp, gain_reg, + snd_soc_component_read32(comp, gain_reg)); + break; + }; + + return 0; +} + +static int wcd934x_codec_ear_dac_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kc, int event) +{ + struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm); + struct wcd934x_codec *wcd = dev_get_drvdata(comp->dev); + + switch (event) { + case snd_soc_dapm_pre_pmu: + /* disable autochop timer during power up */ + snd_soc_component_update_bits(comp, + wcd934x_hph_new_int_hph_timer1, + wcd934x_hph_autochop_timer_en_mask, 0x0); + wcd_clsh_ctrl_set_state(wcd->clsh_ctrl, wcd_clsh_event_pre_dac, + wcd_clsh_state_ear, cls_h_normal); + + break; + case snd_soc_dapm_post_pmd: + wcd_clsh_ctrl_set_state(wcd->clsh_ctrl, wcd_clsh_event_post_pa, + wcd_clsh_state_ear, cls_h_normal); + break; + }; + + return 0; +} + +static int wcd934x_codec_hphl_dac_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event) +{ + struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm); + struct wcd934x_codec *wcd = dev_get_drvdata(comp->dev); + int hph_mode = wcd->hph_mode; + u8 dem_inp; + + switch (event) { + case snd_soc_dapm_pre_pmu: + /* read dem inp select */ + dem_inp = snd_soc_component_read32(comp, + wcd934x_cdc_rx1_rx_path_sec0) & 0x03; + + if (((hph_mode == cls_h_hifi) || (hph_mode == cls_h_lohifi) || + (hph_mode == cls_h_lp)) && (dem_inp != 0x01)) { + return -einval; + } + if (hph_mode != cls_h_lp) + /* ripple freq control enable */ + snd_soc_component_update_bits(comp, + wcd934x_sido_new_vout_d_freq2, + wcd934x_sido_ripple_freq_en_mask, + wcd934x_sido_ripple_freq_enable); + /* disable autochop timer during power up */ + snd_soc_component_update_bits(comp, + wcd934x_hph_new_int_hph_timer1, + wcd934x_hph_autochop_timer_en_mask, 0x0); + wcd_clsh_ctrl_set_state(wcd->clsh_ctrl, wcd_clsh_event_pre_dac, + wcd_clsh_state_hphl, hph_mode); + + break; + case snd_soc_dapm_post_pmd: + /* 1000us required as per hw requirement */ + usleep_range(1000, 1100); + wcd_clsh_ctrl_set_state(wcd->clsh_ctrl, wcd_clsh_event_post_pa, + wcd_clsh_state_hphl, hph_mode); + if (hph_mode != cls_h_lp) + /* ripple freq control disable */ + snd_soc_component_update_bits(comp, + wcd934x_sido_new_vout_d_freq2, + wcd934x_sido_ripple_freq_en_mask, 0x0); + + break; + default: + break; + }; + + return 0; +} + +static int wcd934x_codec_hphr_dac_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event) +{ + struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm); + struct wcd934x_codec *wcd = dev_get_drvdata(comp->dev); + int hph_mode = wcd->hph_mode; + u8 dem_inp; + + switch (event) { + case snd_soc_dapm_pre_pmu: + dem_inp = snd_soc_component_read32(comp, + wcd934x_cdc_rx2_rx_path_sec0) & 0x03; + if (((hph_mode == cls_h_hifi) || (hph_mode == cls_h_lohifi) || + (hph_mode == cls_h_lp)) && (dem_inp != 0x01)) { + return -einval; + } + if (hph_mode != cls_h_lp) + /* ripple freq control enable */ + snd_soc_component_update_bits(comp, + wcd934x_sido_new_vout_d_freq2, + wcd934x_sido_ripple_freq_en_mask, + wcd934x_sido_ripple_freq_enable); + /* disable autochop timer during power up */ + snd_soc_component_update_bits(comp, + wcd934x_hph_new_int_hph_timer1, + wcd934x_hph_autochop_timer_en_mask, 0x0); + wcd_clsh_ctrl_set_state(wcd->clsh_ctrl, wcd_clsh_event_pre_dac, + wcd_clsh_state_hphr, + hph_mode); + break; + case snd_soc_dapm_post_pmd: + /* 1000us required as per hw requirement */ + usleep_range(1000, 1100); + + wcd_clsh_ctrl_set_state(wcd->clsh_ctrl, wcd_clsh_event_post_pa, + wcd_clsh_state_hphr, hph_mode); + if (hph_mode != cls_h_lp) + /* ripple freq control disable */ + snd_soc_component_update_bits(comp, + wcd934x_sido_new_vout_d_freq2, + wcd934x_sido_ripple_freq_en_mask, 0x0); + break; + default: + break; + }; + + return 0; +} + +static int wcd934x_codec_lineout_dac_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kc, int event) +{ + struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm); + struct wcd934x_codec *wcd = dev_get_drvdata(comp->dev); + + switch (event) { + case snd_soc_dapm_pre_pmu: + wcd_clsh_ctrl_set_state(wcd->clsh_ctrl, wcd_clsh_event_pre_dac, + wcd_clsh_state_lo, cls_ab); + break; + case snd_soc_dapm_post_pmd: + wcd_clsh_ctrl_set_state(wcd->clsh_ctrl, wcd_clsh_event_post_pa, + wcd_clsh_state_lo, cls_ab); + break; + } + + return 0; +} + +static int wcd934x_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event) +{ + struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm); + + switch (event) { + case snd_soc_dapm_post_pmu: + /* + * 7ms sleep is required after pa is enabled as per + * hw requirement. if compander is disabled, then + * 20ms delay is needed. + */ + usleep_range(20000, 20100); + + snd_soc_component_update_bits(comp, wcd934x_hph_l_test, + wcd934x_hph_ocp_det_mask, + wcd934x_hph_ocp_det_enable); + /* remove mute on primary path */ + snd_soc_component_update_bits(comp, wcd934x_cdc_rx1_rx_path_ctl, + wcd934x_rx_path_pga_mute_en_mask, + 0); + /* enable gm3 boost */ + snd_soc_component_update_bits(comp, wcd934x_hph_cnp_wg_ctl, + wcd934x_hph_gm3_boost_en_mask, + wcd934x_hph_gm3_boost_enable); + /* enable autochop timer at the end of power up */ + snd_soc_component_update_bits(comp, + wcd934x_hph_new_int_hph_timer1, + wcd934x_hph_autochop_timer_en_mask, + wcd934x_hph_autochop_timer_enable); + /* remove mix path mute */ + snd_soc_component_update_bits(comp, + wcd934x_cdc_rx1_rx_path_mix_ctl, + wcd934x_cdc_rx_pga_mute_en_mask, 0x00); + break; + case snd_soc_dapm_pre_pmd: + /* enable dsd mute before pa disable */ + snd_soc_component_update_bits(comp, wcd934x_hph_l_test, + wcd934x_hph_ocp_det_mask, + wcd934x_hph_ocp_det_disable); + snd_soc_component_update_bits(comp, wcd934x_cdc_rx1_rx_path_ctl, + wcd934x_rx_path_pga_mute_en_mask, + wcd934x_rx_path_pga_mute_enable); + snd_soc_component_update_bits(comp, + wcd934x_cdc_rx1_rx_path_mix_ctl, + wcd934x_rx_path_pga_mute_en_mask, + wcd934x_rx_path_pga_mute_enable); + break; + case snd_soc_dapm_post_pmd: + /* + * 5ms sleep is required after pa disable. if compander is + * disabled, then 20ms delay is needed after pa disable. + */ + usleep_range(20000, 20100); + break; + }; + + return 0; +} + +static int wcd934x_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event) +{ + struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm); + + switch (event) { + case snd_soc_dapm_post_pmu: + /* + * 7ms sleep is required after pa is enabled as per + * hw requirement. if compander is disabled, then + * 20ms delay is needed. + */ + usleep_range(20000, 20100); + snd_soc_component_update_bits(comp, wcd934x_hph_r_test, + wcd934x_hph_ocp_det_mask, + wcd934x_hph_ocp_det_enable); + /* remove mute */ + snd_soc_component_update_bits(comp, wcd934x_cdc_rx2_rx_path_ctl, + wcd934x_rx_path_pga_mute_en_mask, + 0); + /* enable gm3 boost */ + snd_soc_component_update_bits(comp, wcd934x_hph_cnp_wg_ctl, + wcd934x_hph_gm3_boost_en_mask, + wcd934x_hph_gm3_boost_enable); + /* enable autochop timer at the end of power up */ + snd_soc_component_update_bits(comp, + wcd934x_hph_new_int_hph_timer1, + wcd934x_hph_autochop_timer_en_mask, + wcd934x_hph_autochop_timer_enable); + /* remove mix path mute if it is enabled */ + if ((snd_soc_component_read32(comp, + wcd934x_cdc_rx2_rx_path_mix_ctl)) & 0x10) + snd_soc_component_update_bits(comp, + wcd934x_cdc_rx2_rx_path_mix_ctl, + wcd934x_cdc_rx_pga_mute_en_mask, + wcd934x_cdc_rx_pga_mute_disable); + break; + case snd_soc_dapm_pre_pmd: + snd_soc_component_update_bits(comp, wcd934x_hph_r_test, + wcd934x_hph_ocp_det_mask, + wcd934x_hph_ocp_det_disable); + snd_soc_component_update_bits(comp, wcd934x_cdc_rx2_rx_path_ctl, + wcd934x_rx_path_pga_mute_en_mask, + wcd934x_rx_path_pga_mute_enable); + snd_soc_component_update_bits(comp, + wcd934x_cdc_rx2_rx_path_mix_ctl, + wcd934x_cdc_rx_pga_mute_en_mask, + wcd934x_cdc_rx_pga_mute_enable); + break; + case snd_soc_dapm_post_pmd: + /* + * 5ms sleep is required after pa disable. if compander is + * disabled, then 20ms delay is needed after pa disable. + */ + usleep_range(20000, 20100); + break; + }; + + return 0; +} + +static const struct snd_soc_dapm_widget wcd934x_dapm_widgets[] = { + /* analog outputs */ + snd_soc_dapm_output("ear"), + snd_soc_dapm_output("hphl"), + snd_soc_dapm_output("hphr"), + snd_soc_dapm_output("lineout1"), + snd_soc_dapm_output("lineout2"), + snd_soc_dapm_output("spk1 out"), + snd_soc_dapm_output("spk2 out"), + snd_soc_dapm_output("anc ear"), + snd_soc_dapm_output("anc hphl"), + snd_soc_dapm_output("anc hphr"), + snd_soc_dapm_output("wdma3_out"), + snd_soc_dapm_output("mad_cpe_out1"), + snd_soc_dapm_output("mad_cpe_out2"), + snd_soc_dapm_aif_in_e("aif1 pb", "aif1 playback", 0, snd_soc_nopm, + aif1_pb, 0, wcd934x_codec_enable_slim, + snd_soc_dapm_post_pmu | snd_soc_dapm_post_pmd), + snd_soc_dapm_aif_in_e("aif2 pb", "aif2 playback", 0, snd_soc_nopm, + aif2_pb, 0, wcd934x_codec_enable_slim, + snd_soc_dapm_post_pmu | snd_soc_dapm_post_pmd), + snd_soc_dapm_aif_in_e("aif3 pb", "aif3 playback", 0, snd_soc_nopm, + aif3_pb, 0, wcd934x_codec_enable_slim, + snd_soc_dapm_post_pmu | snd_soc_dapm_post_pmd), + snd_soc_dapm_aif_in_e("aif4 pb", "aif4 playback", 0, snd_soc_nopm, + aif4_pb, 0, wcd934x_codec_enable_slim, + snd_soc_dapm_post_pmu | snd_soc_dapm_post_pmd), + + snd_soc_dapm_mux("slim rx0 mux", snd_soc_nopm, wcd934x_rx0, 0, + &slim_rx_mux[wcd934x_rx0]), + snd_soc_dapm_mux("slim rx1 mux", snd_soc_nopm, wcd934x_rx1, 0, + &slim_rx_mux[wcd934x_rx1]), + snd_soc_dapm_mux("slim rx2 mux", snd_soc_nopm, wcd934x_rx2, 0, + &slim_rx_mux[wcd934x_rx2]), + snd_soc_dapm_mux("slim rx3 mux", snd_soc_nopm, wcd934x_rx3, 0, + &slim_rx_mux[wcd934x_rx3]), + snd_soc_dapm_mux("slim rx4 mux", snd_soc_nopm, wcd934x_rx4, 0, + &slim_rx_mux[wcd934x_rx4]), + snd_soc_dapm_mux("slim rx5 mux", snd_soc_nopm, wcd934x_rx5, 0, + &slim_rx_mux[wcd934x_rx5]), + snd_soc_dapm_mux("slim rx6 mux", snd_soc_nopm, wcd934x_rx6, 0, + &slim_rx_mux[wcd934x_rx6]), + snd_soc_dapm_mux("slim rx7 mux", snd_soc_nopm, wcd934x_rx7, 0, + &slim_rx_mux[wcd934x_rx7]), + + snd_soc_dapm_mixer("slim rx0", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("slim rx1", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("slim rx2", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("slim rx3", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("slim rx4", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("slim rx5", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("slim rx6", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("slim rx7", snd_soc_nopm, 0, 0, null, 0), + + snd_soc_dapm_mux_e("rx int0_2 mux", snd_soc_nopm, interp_ear, 0, + &rx_int0_2_mux, wcd934x_codec_enable_mix_path, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmu | + snd_soc_dapm_post_pmd), + snd_soc_dapm_mux_e("rx int1_2 mux", snd_soc_nopm, interp_hphl, 0, + &rx_int1_2_mux, wcd934x_codec_enable_mix_path, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmu | + snd_soc_dapm_post_pmd), + snd_soc_dapm_mux_e("rx int2_2 mux", snd_soc_nopm, interp_hphr, 0, + &rx_int2_2_mux, wcd934x_codec_enable_mix_path, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmu | + snd_soc_dapm_post_pmd), + snd_soc_dapm_mux_e("rx int3_2 mux", snd_soc_nopm, interp_lo1, 0, + &rx_int3_2_mux, wcd934x_codec_enable_mix_path, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmu | + snd_soc_dapm_post_pmd), + snd_soc_dapm_mux_e("rx int4_2 mux", snd_soc_nopm, interp_lo2, 0, + &rx_int4_2_mux, wcd934x_codec_enable_mix_path, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmu | + snd_soc_dapm_post_pmd), + snd_soc_dapm_mux_e("rx int7_2 mux", snd_soc_nopm, interp_spkr1, 0, + &rx_int7_2_mux, wcd934x_codec_enable_mix_path, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmu | + snd_soc_dapm_post_pmd), + snd_soc_dapm_mux_e("rx int8_2 mux", snd_soc_nopm, interp_spkr2, 0, + &rx_int8_2_mux, wcd934x_codec_enable_mix_path, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmu | + snd_soc_dapm_post_pmd), + + snd_soc_dapm_mux("rx int0_1 mix1 inp0", snd_soc_nopm, 0, 0, + &rx_int0_1_mix_inp0_mux), + snd_soc_dapm_mux("rx int0_1 mix1 inp1", snd_soc_nopm, 0, 0, + &rx_int0_1_mix_inp1_mux), + snd_soc_dapm_mux("rx int0_1 mix1 inp2", snd_soc_nopm, 0, 0, + &rx_int0_1_mix_inp2_mux), + snd_soc_dapm_mux("rx int1_1 mix1 inp0", snd_soc_nopm, 0, 0, + &rx_int1_1_mix_inp0_mux), + snd_soc_dapm_mux("rx int1_1 mix1 inp1", snd_soc_nopm, 0, 0, + &rx_int1_1_mix_inp1_mux), + snd_soc_dapm_mux("rx int1_1 mix1 inp2", snd_soc_nopm, 0, 0, + &rx_int1_1_mix_inp2_mux), + snd_soc_dapm_mux("rx int2_1 mix1 inp0", snd_soc_nopm, 0, 0, + &rx_int2_1_mix_inp0_mux), + snd_soc_dapm_mux("rx int2_1 mix1 inp1", snd_soc_nopm, 0, 0, + &rx_int2_1_mix_inp1_mux), + snd_soc_dapm_mux("rx int2_1 mix1 inp2", snd_soc_nopm, 0, 0, + &rx_int2_1_mix_inp2_mux), + snd_soc_dapm_mux("rx int3_1 mix1 inp0", snd_soc_nopm, 0, 0, + &rx_int3_1_mix_inp0_mux), + snd_soc_dapm_mux("rx int3_1 mix1 inp1", snd_soc_nopm, 0, 0, + &rx_int3_1_mix_inp1_mux), + snd_soc_dapm_mux("rx int3_1 mix1 inp2", snd_soc_nopm, 0, 0, + &rx_int3_1_mix_inp2_mux), + snd_soc_dapm_mux("rx int4_1 mix1 inp0", snd_soc_nopm, 0, 0, + &rx_int4_1_mix_inp0_mux), + snd_soc_dapm_mux("rx int4_1 mix1 inp1", snd_soc_nopm, 0, 0, + &rx_int4_1_mix_inp1_mux), + snd_soc_dapm_mux("rx int4_1 mix1 inp2", snd_soc_nopm, 0, 0, + &rx_int4_1_mix_inp2_mux), + snd_soc_dapm_mux("rx int7_1 mix1 inp0", snd_soc_nopm, 0, 0, + &rx_int7_1_mix_inp0_mux), + snd_soc_dapm_mux("rx int7_1 mix1 inp1", snd_soc_nopm, 0, 0, + &rx_int7_1_mix_inp1_mux), + snd_soc_dapm_mux("rx int7_1 mix1 inp2", snd_soc_nopm, 0, 0, + &rx_int7_1_mix_inp2_mux), + snd_soc_dapm_mux("rx int8_1 mix1 inp0", snd_soc_nopm, 0, 0, + &rx_int8_1_mix_inp0_mux), + snd_soc_dapm_mux("rx int8_1 mix1 inp1", snd_soc_nopm, 0, 0, + &rx_int8_1_mix_inp1_mux), + snd_soc_dapm_mux("rx int8_1 mix1 inp2", snd_soc_nopm, 0, 0, + &rx_int8_1_mix_inp2_mux), + snd_soc_dapm_mixer("rx int0_1 mix1", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("rx int0 sec mix", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("rx int1_1 mix1", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("rx int1 sec mix", snd_soc_nopm, 0, 0, + rx_int1_asrc_switch, + array_size(rx_int1_asrc_switch)), + snd_soc_dapm_mixer("rx int2_1 mix1", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("rx int2 sec mix", snd_soc_nopm, 0, 0, + rx_int2_asrc_switch, + array_size(rx_int2_asrc_switch)), + snd_soc_dapm_mixer("rx int3_1 mix1", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("rx int3 sec mix", snd_soc_nopm, 0, 0, + rx_int3_asrc_switch, + array_size(rx_int3_asrc_switch)), + snd_soc_dapm_mixer("rx int4_1 mix1", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("rx int4 sec mix", snd_soc_nopm, 0, 0, + rx_int4_asrc_switch, + array_size(rx_int4_asrc_switch)), + snd_soc_dapm_mixer("rx int7_1 mix1", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("rx int7 sec mix", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("rx int8_1 mix1", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("rx int8 sec mix", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("rx int0 mix2", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("rx int1 mix2", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("rx int1 mix3", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("rx int2 mix2", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("rx int2 mix3", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("rx int3 mix2", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("rx int3 mix3", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("rx int4 mix2", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("rx int4 mix3", snd_soc_nopm, 0, 0, null, 0), + + snd_soc_dapm_mixer("rx int7 mix2", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer_e("rx int7 chain", snd_soc_nopm, 0, 0, + null, 0, null, 0), + snd_soc_dapm_mixer_e("rx int8 chain", snd_soc_nopm, 0, 0, + null, 0, null, 0), + snd_soc_dapm_mux_e("rx int0 mix2 inp", wcd934x_cdc_rx0_rx_path_cfg0, 4, + 0, &rx_int0_mix2_inp_mux, null, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmd), + snd_soc_dapm_mux_e("rx int1 mix2 inp", wcd934x_cdc_rx1_rx_path_cfg0, 4, + 0, &rx_int1_mix2_inp_mux, null, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmd), + snd_soc_dapm_mux_e("rx int2 mix2 inp", wcd934x_cdc_rx2_rx_path_cfg0, 4, + 0, &rx_int2_mix2_inp_mux, null, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmd), + snd_soc_dapm_mux_e("rx int3 mix2 inp", wcd934x_cdc_rx3_rx_path_cfg0, 4, + 0, &rx_int3_mix2_inp_mux, null, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmd), + snd_soc_dapm_mux_e("rx int4 mix2 inp", wcd934x_cdc_rx4_rx_path_cfg0, 4, + 0, &rx_int4_mix2_inp_mux, null, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmd), + snd_soc_dapm_mux_e("rx int7 mix2 inp", wcd934x_cdc_rx7_rx_path_cfg0, 4, + 0, &rx_int7_mix2_inp_mux, null, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmd), + + snd_soc_dapm_mux("iir0 inp0 mux", snd_soc_nopm, 0, 0, &iir0_inp0_mux), + snd_soc_dapm_mux("iir0 inp1 mux", snd_soc_nopm, 0, 0, &iir0_inp1_mux), + snd_soc_dapm_mux("iir0 inp2 mux", snd_soc_nopm, 0, 0, &iir0_inp2_mux), + snd_soc_dapm_mux("iir0 inp3 mux", snd_soc_nopm, 0, 0, &iir0_inp3_mux), + snd_soc_dapm_mux("iir1 inp0 mux", snd_soc_nopm, 0, 0, &iir1_inp0_mux), + snd_soc_dapm_mux("iir1 inp1 mux", snd_soc_nopm, 0, 0, &iir1_inp1_mux), + snd_soc_dapm_mux("iir1 inp2 mux", snd_soc_nopm, 0, 0, &iir1_inp2_mux), + snd_soc_dapm_mux("iir1 inp3 mux", snd_soc_nopm, 0, 0, &iir1_inp3_mux), + + snd_soc_dapm_pga_e("iir0", wcd934x_cdc_sidetone_iir0_iir_gain_b1_ctl, + 0, 0, null, 0, wcd934x_codec_set_iir_gain, + snd_soc_dapm_post_pmu), + snd_soc_dapm_pga_e("iir1", wcd934x_cdc_sidetone_iir1_iir_gain_b1_ctl, + 1, 0, null, 0, wcd934x_codec_set_iir_gain, + snd_soc_dapm_post_pmu), + snd_soc_dapm_mixer("src0", wcd934x_cdc_sidetone_src0_st_src_path_ctl, + 4, 0, null, 0), + snd_soc_dapm_mixer("src1", wcd934x_cdc_sidetone_src1_st_src_path_ctl, + 4, 0, null, 0), + snd_soc_dapm_mux("rx int0 dem mux", snd_soc_nopm, 0, 0, + &rx_int0_dem_inp_mux), + snd_soc_dapm_mux("rx int1 dem mux", snd_soc_nopm, 0, 0, + &rx_int1_dem_inp_mux), + snd_soc_dapm_mux("rx int2 dem mux", snd_soc_nopm, 0, 0, + &rx_int2_dem_inp_mux), + + snd_soc_dapm_mux_e("rx int0_1 interp", snd_soc_nopm, interp_ear, 0, + &rx_int0_1_interp_mux, + wcd934x_codec_enable_main_path, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmu | + snd_soc_dapm_post_pmd), + snd_soc_dapm_mux_e("rx int1_1 interp", snd_soc_nopm, interp_hphl, 0, + &rx_int1_1_interp_mux, + wcd934x_codec_enable_main_path, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmu | + snd_soc_dapm_post_pmd), + snd_soc_dapm_mux_e("rx int2_1 interp", snd_soc_nopm, interp_hphr, 0, + &rx_int2_1_interp_mux, + wcd934x_codec_enable_main_path, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmu | + snd_soc_dapm_post_pmd), + snd_soc_dapm_mux_e("rx int3_1 interp", snd_soc_nopm, interp_lo1, 0, + &rx_int3_1_interp_mux, + wcd934x_codec_enable_main_path, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmu | + snd_soc_dapm_post_pmd), + snd_soc_dapm_mux_e("rx int4_1 interp", snd_soc_nopm, interp_lo2, 0, + &rx_int4_1_interp_mux, + wcd934x_codec_enable_main_path, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmu | + snd_soc_dapm_post_pmd), + snd_soc_dapm_mux_e("rx int7_1 interp", snd_soc_nopm, interp_spkr1, 0, + &rx_int7_1_interp_mux, + wcd934x_codec_enable_main_path, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmu | + snd_soc_dapm_post_pmd), + snd_soc_dapm_mux_e("rx int8_1 interp", snd_soc_nopm, interp_spkr2, 0, + &rx_int8_1_interp_mux, + wcd934x_codec_enable_main_path, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmu | + snd_soc_dapm_post_pmd), + + snd_soc_dapm_mux("rx int0_2 interp", snd_soc_nopm, 0, 0, + &rx_int0_2_interp_mux), + snd_soc_dapm_mux("rx int1_2 interp", snd_soc_nopm, 0, 0, + &rx_int1_2_interp_mux), + snd_soc_dapm_mux("rx int2_2 interp", snd_soc_nopm, 0, 0, + &rx_int2_2_interp_mux), + snd_soc_dapm_mux("rx int3_2 interp", snd_soc_nopm, 0, 0, + &rx_int3_2_interp_mux), + snd_soc_dapm_mux("rx int4_2 interp", snd_soc_nopm, 0, 0, + &rx_int4_2_interp_mux), + snd_soc_dapm_mux("rx int7_2 interp", snd_soc_nopm, 0, 0, + &rx_int7_2_interp_mux), + snd_soc_dapm_mux("rx int8_2 interp", snd_soc_nopm, 0, 0, + &rx_int8_2_interp_mux), + snd_soc_dapm_dac_e("rx int0 dac", null, snd_soc_nopm, + 0, 0, wcd934x_codec_ear_dac_event, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmu | + snd_soc_dapm_pre_pmd | snd_soc_dapm_post_pmd), + snd_soc_dapm_dac_e("rx int1 dac", null, wcd934x_ana_hph, + 5, 0, wcd934x_codec_hphl_dac_event, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmu | + snd_soc_dapm_pre_pmd | snd_soc_dapm_post_pmd), + snd_soc_dapm_dac_e("rx int2 dac", null, wcd934x_ana_hph, + 4, 0, wcd934x_codec_hphr_dac_event, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmu | + snd_soc_dapm_pre_pmd | snd_soc_dapm_post_pmd), + snd_soc_dapm_dac_e("rx int3 dac", null, snd_soc_nopm, + 0, 0, wcd934x_codec_lineout_dac_event, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmd), + snd_soc_dapm_dac_e("rx int4 dac", null, snd_soc_nopm, + 0, 0, wcd934x_codec_lineout_dac_event, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmd), + snd_soc_dapm_pga_e("ear pa", wcd934x_ana_ear, 7, 0, null, 0, null, 0), + snd_soc_dapm_pga_e("hphl pa", wcd934x_ana_hph, 7, 0, null, 0, + wcd934x_codec_enable_hphl_pa, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmu | + snd_soc_dapm_pre_pmd | snd_soc_dapm_post_pmd), + snd_soc_dapm_pga_e("hphr pa", wcd934x_ana_hph, 6, 0, null, 0, + wcd934x_codec_enable_hphr_pa, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmu | + snd_soc_dapm_pre_pmd | snd_soc_dapm_post_pmd), + snd_soc_dapm_pga_e("lineout1 pa", wcd934x_ana_lo_1_2, 7, 0, null, 0, + null, 0), + snd_soc_dapm_pga_e("lineout2 pa", wcd934x_ana_lo_1_2, 6, 0, null, 0, + null, 0), + snd_soc_dapm_supply("rx_bias", wcd934x_ana_rx_supplies, 0, 0, null, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmd), + snd_soc_dapm_supply("sboost0", wcd934x_cdc_rx7_rx_path_cfg1, + 0, 0, null, 0), + snd_soc_dapm_supply("sboost0_clk", wcd934x_cdc_boost0_boost_path_ctl, + 0, 0, null, 0), + snd_soc_dapm_supply("sboost1", wcd934x_cdc_rx8_rx_path_cfg1, + 0, 0, null, 0), + snd_soc_dapm_supply("sboost1_clk", wcd934x_cdc_boost1_boost_path_ctl, + 0, 0, null, 0), + snd_soc_dapm_supply("int0_clk", snd_soc_nopm, interp_ear, 0, + wcd934x_codec_enable_interp_clk, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmd), + snd_soc_dapm_supply("int1_clk", snd_soc_nopm, interp_hphl, 0, + wcd934x_codec_enable_interp_clk, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmd), + snd_soc_dapm_supply("int2_clk", snd_soc_nopm, interp_hphr, 0, + wcd934x_codec_enable_interp_clk, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmd), + snd_soc_dapm_supply("int3_clk", snd_soc_nopm, interp_lo1, 0, + wcd934x_codec_enable_interp_clk, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmd), + snd_soc_dapm_supply("int4_clk", snd_soc_nopm, interp_lo2, 0, + wcd934x_codec_enable_interp_clk, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmd), + snd_soc_dapm_supply("int7_clk", snd_soc_nopm, interp_spkr1, 0, + wcd934x_codec_enable_interp_clk, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmd), + snd_soc_dapm_supply("int8_clk", snd_soc_nopm, interp_spkr2, 0, + wcd934x_codec_enable_interp_clk, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmd), + snd_soc_dapm_supply("dsmdem0_clk", wcd934x_cdc_rx0_rx_path_dsmdem_ctl, + 0, 0, null, 0), + snd_soc_dapm_supply("dsmdem1_clk", wcd934x_cdc_rx1_rx_path_dsmdem_ctl, + 0, 0, null, 0), + snd_soc_dapm_supply("dsmdem2_clk", wcd934x_cdc_rx2_rx_path_dsmdem_ctl, + 0, 0, null, 0), + snd_soc_dapm_supply("dsmdem3_clk", wcd934x_cdc_rx3_rx_path_dsmdem_ctl, + 0, 0, null, 0), + snd_soc_dapm_supply("dsmdem4_clk", wcd934x_cdc_rx4_rx_path_dsmdem_ctl, + 0, 0, null, 0), + snd_soc_dapm_supply("dsmdem7_clk", wcd934x_cdc_rx7_rx_path_dsmdem_ctl, + 0, 0, null, 0), + snd_soc_dapm_supply("dsmdem8_clk", wcd934x_cdc_rx8_rx_path_dsmdem_ctl, + 0, 0, null, 0), + snd_soc_dapm_supply("mclk", snd_soc_nopm, 0, 0, + wcd934x_codec_enable_mclk, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmd), +}; + + .dapm_widgets = wcd934x_dapm_widgets, + .num_dapm_widgets = array_size(wcd934x_dapm_widgets),
|
Audio
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dd9eb19b567303e4b92747dcfb5deedb182af111
|
srinivas kandagatla pierre louis bossart pierre louis bossart linux intel com
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sound
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soc
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codecs
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asoc: wcd934x: add capture dapm widgets
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this patch adds required dapm widgets for capture path.
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this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
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add support to wcd9340/wcd9341 codec
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['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
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['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
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['asoc ']
|
['c']
| 1
| 1,149
| 2
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--- diff --git a/sound/soc/codecs/wcd934x.c b/sound/soc/codecs/wcd934x.c --- a/sound/soc/codecs/wcd934x.c +++ b/sound/soc/codecs/wcd934x.c +enum { + mic_bias_1 = 1, + mic_bias_2, + mic_bias_3, + mic_bias_4 +}; + +static const char * const dmic_mux_text[] = { + "zero", "dmic0", "dmic1", "dmic2", "dmic3", "dmic4", "dmic5" +}; + +static const char * const amic_mux_text[] = { + "zero", "adc1", "adc2", "adc3", "adc4" +}; + +static const char * const amic4_5_sel_text[] = { + "amic4", "amic5" +}; + +static const char * const adc_mux_text[] = { + "dmic", "amic", "anc_fb_tune1", "anc_fb_tune2" +}; + +static const char * const cdc_if_tx0_mux_text[] = { + "zero", "rx_mix_tx0", "dec0", "dec0_192" +}; + +static const char * const cdc_if_tx1_mux_text[] = { + "zero", "rx_mix_tx1", "dec1", "dec1_192" +}; + +static const char * const cdc_if_tx2_mux_text[] = { + "zero", "rx_mix_tx2", "dec2", "dec2_192" +}; + +static const char * const cdc_if_tx3_mux_text[] = { + "zero", "rx_mix_tx3", "dec3", "dec3_192" +}; + +static const char * const cdc_if_tx4_mux_text[] = { + "zero", "rx_mix_tx4", "dec4", "dec4_192" +}; + +static const char * const cdc_if_tx5_mux_text[] = { + "zero", "rx_mix_tx5", "dec5", "dec5_192" +}; + +static const char * const cdc_if_tx6_mux_text[] = { + "zero", "rx_mix_tx6", "dec6", "dec6_192" +}; + +static const char * const cdc_if_tx7_mux_text[] = { + "zero", "rx_mix_tx7", "dec7", "dec7_192" +}; + +static const char * const cdc_if_tx8_mux_text[] = { + "zero", "rx_mix_tx8", "dec8", "dec8_192" +}; + +static const char * const cdc_if_tx9_mux_text[] = { + "zero", "dec7", "dec7_192" +}; + +static const char * const cdc_if_tx10_mux_text[] = { + "zero", "dec6", "dec6_192" +}; + +static const char * const cdc_if_tx11_mux_text[] = { + "dec_0_5", "dec_9_12", "mad_audio", "mad_brdcst" +}; + +static const char * const cdc_if_tx11_inp1_mux_text[] = { + "zero", "dec0", "dec1", "dec2", "dec3", "dec4", + "dec5", "rx_mix_tx5", "dec9_10", "dec11_12" +}; + +static const char * const cdc_if_tx13_mux_text[] = { + "cdc_dec_5", "mad_brdcst" +}; + +static const char * const cdc_if_tx13_inp1_mux_text[] = { + "zero", "dec5", "dec5_192" +}; + + +static const struct soc_enum tx_adc_mux0_enum = + soc_enum_single(wcd934x_cdc_tx_inp_mux_adc_mux0_cfg1, 0, + array_size(adc_mux_text), adc_mux_text); +static const struct soc_enum tx_adc_mux1_enum = + soc_enum_single(wcd934x_cdc_tx_inp_mux_adc_mux1_cfg1, 0, + array_size(adc_mux_text), adc_mux_text); +static const struct soc_enum tx_adc_mux2_enum = + soc_enum_single(wcd934x_cdc_tx_inp_mux_adc_mux2_cfg1, 0, + array_size(adc_mux_text), adc_mux_text); +static const struct soc_enum tx_adc_mux3_enum = + soc_enum_single(wcd934x_cdc_tx_inp_mux_adc_mux3_cfg1, 0, + array_size(adc_mux_text), adc_mux_text); +static const struct soc_enum tx_adc_mux4_enum = + soc_enum_single(wcd934x_cdc_tx_inp_mux_adc_mux0_cfg1, 2, + array_size(adc_mux_text), adc_mux_text); +static const struct soc_enum tx_adc_mux5_enum = + soc_enum_single(wcd934x_cdc_tx_inp_mux_adc_mux1_cfg1, 2, + array_size(adc_mux_text), adc_mux_text); +static const struct soc_enum tx_adc_mux6_enum = + soc_enum_single(wcd934x_cdc_tx_inp_mux_adc_mux2_cfg1, 2, + array_size(adc_mux_text), adc_mux_text); +static const struct soc_enum tx_adc_mux7_enum = + soc_enum_single(wcd934x_cdc_tx_inp_mux_adc_mux3_cfg1, 2, + array_size(adc_mux_text), adc_mux_text); +static const struct soc_enum tx_adc_mux8_enum = + soc_enum_single(wcd934x_cdc_tx_inp_mux_adc_mux1_cfg1, 4, + array_size(adc_mux_text), adc_mux_text); + -static int wcd934x_set_sido_input_src(struct wcd934x_codec *wcd, - int sido_src) +static const struct soc_enum tx_dmic_mux0_enum = + soc_enum_single(wcd934x_cdc_tx_inp_mux_adc_mux0_cfg0, 3, 7, + dmic_mux_text); + +static const struct soc_enum tx_dmic_mux1_enum = + soc_enum_single(wcd934x_cdc_tx_inp_mux_adc_mux1_cfg0, 3, 7, + dmic_mux_text); + +static const struct soc_enum tx_dmic_mux2_enum = + soc_enum_single(wcd934x_cdc_tx_inp_mux_adc_mux2_cfg0, 3, 7, + dmic_mux_text); + +static const struct soc_enum tx_dmic_mux3_enum = + soc_enum_single(wcd934x_cdc_tx_inp_mux_adc_mux3_cfg0, 3, 7, + dmic_mux_text); + +static const struct soc_enum tx_dmic_mux4_enum = + soc_enum_single(wcd934x_cdc_tx_inp_mux_adc_mux4_cfg0, 3, 7, + dmic_mux_text); + +static const struct soc_enum tx_dmic_mux5_enum = + soc_enum_single(wcd934x_cdc_tx_inp_mux_adc_mux5_cfg0, 3, 7, + dmic_mux_text); + +static const struct soc_enum tx_dmic_mux6_enum = + soc_enum_single(wcd934x_cdc_tx_inp_mux_adc_mux6_cfg0, 3, 7, + dmic_mux_text); + +static const struct soc_enum tx_dmic_mux7_enum = + soc_enum_single(wcd934x_cdc_tx_inp_mux_adc_mux7_cfg0, 3, 7, + dmic_mux_text); + +static const struct soc_enum tx_dmic_mux8_enum = + soc_enum_single(wcd934x_cdc_tx_inp_mux_adc_mux8_cfg0, 3, 7, + dmic_mux_text); + +static const struct soc_enum tx_amic_mux0_enum = + soc_enum_single(wcd934x_cdc_tx_inp_mux_adc_mux0_cfg0, 0, 5, + amic_mux_text); +static const struct soc_enum tx_amic_mux1_enum = + soc_enum_single(wcd934x_cdc_tx_inp_mux_adc_mux1_cfg0, 0, 5, + amic_mux_text); +static const struct soc_enum tx_amic_mux2_enum = + soc_enum_single(wcd934x_cdc_tx_inp_mux_adc_mux2_cfg0, 0, 5, + amic_mux_text); +static const struct soc_enum tx_amic_mux3_enum = + soc_enum_single(wcd934x_cdc_tx_inp_mux_adc_mux3_cfg0, 0, 5, + amic_mux_text); +static const struct soc_enum tx_amic_mux4_enum = + soc_enum_single(wcd934x_cdc_tx_inp_mux_adc_mux4_cfg0, 0, 5, + amic_mux_text); +static const struct soc_enum tx_amic_mux5_enum = + soc_enum_single(wcd934x_cdc_tx_inp_mux_adc_mux5_cfg0, 0, 5, + amic_mux_text); +static const struct soc_enum tx_amic_mux6_enum = + soc_enum_single(wcd934x_cdc_tx_inp_mux_adc_mux6_cfg0, 0, 5, + amic_mux_text); +static const struct soc_enum tx_amic_mux7_enum = + soc_enum_single(wcd934x_cdc_tx_inp_mux_adc_mux7_cfg0, 0, 5, + amic_mux_text); +static const struct soc_enum tx_amic_mux8_enum = + soc_enum_single(wcd934x_cdc_tx_inp_mux_adc_mux8_cfg0, 0, 5, + amic_mux_text); + +static const struct soc_enum tx_amic4_5_enum = + soc_enum_single(wcd934x_tx_new_amic_4_5_sel, 7, 2, amic4_5_sel_text); + +static const struct soc_enum cdc_if_tx0_mux_enum = + soc_enum_single(wcd934x_cdc_if_router_tx_mux_cfg0, 0, + array_size(cdc_if_tx0_mux_text), cdc_if_tx0_mux_text); +static const struct soc_enum cdc_if_tx1_mux_enum = + soc_enum_single(wcd934x_cdc_if_router_tx_mux_cfg0, 2, + array_size(cdc_if_tx1_mux_text), cdc_if_tx1_mux_text); +static const struct soc_enum cdc_if_tx2_mux_enum = + soc_enum_single(wcd934x_cdc_if_router_tx_mux_cfg0, 4, + array_size(cdc_if_tx2_mux_text), cdc_if_tx2_mux_text); +static const struct soc_enum cdc_if_tx3_mux_enum = + soc_enum_single(wcd934x_cdc_if_router_tx_mux_cfg0, 6, + array_size(cdc_if_tx3_mux_text), cdc_if_tx3_mux_text); +static const struct soc_enum cdc_if_tx4_mux_enum = + soc_enum_single(wcd934x_cdc_if_router_tx_mux_cfg1, 0, + array_size(cdc_if_tx4_mux_text), cdc_if_tx4_mux_text); +static const struct soc_enum cdc_if_tx5_mux_enum = + soc_enum_single(wcd934x_cdc_if_router_tx_mux_cfg1, 2, + array_size(cdc_if_tx5_mux_text), cdc_if_tx5_mux_text); +static const struct soc_enum cdc_if_tx6_mux_enum = + soc_enum_single(wcd934x_cdc_if_router_tx_mux_cfg1, 4, + array_size(cdc_if_tx6_mux_text), cdc_if_tx6_mux_text); +static const struct soc_enum cdc_if_tx7_mux_enum = + soc_enum_single(wcd934x_cdc_if_router_tx_mux_cfg1, 6, + array_size(cdc_if_tx7_mux_text), cdc_if_tx7_mux_text); +static const struct soc_enum cdc_if_tx8_mux_enum = + soc_enum_single(wcd934x_cdc_if_router_tx_mux_cfg2, 0, + array_size(cdc_if_tx8_mux_text), cdc_if_tx8_mux_text); +static const struct soc_enum cdc_if_tx9_mux_enum = + soc_enum_single(wcd934x_cdc_if_router_tx_mux_cfg2, 2, + array_size(cdc_if_tx9_mux_text), cdc_if_tx9_mux_text); +static const struct soc_enum cdc_if_tx10_mux_enum = + soc_enum_single(wcd934x_cdc_if_router_tx_mux_cfg2, 4, + array_size(cdc_if_tx10_mux_text), cdc_if_tx10_mux_text); +static const struct soc_enum cdc_if_tx11_inp1_mux_enum = + soc_enum_single(wcd934x_cdc_if_router_tx_mux_cfg3, 0, + array_size(cdc_if_tx11_inp1_mux_text), + cdc_if_tx11_inp1_mux_text); +static const struct soc_enum cdc_if_tx11_mux_enum = + soc_enum_single(wcd934x_data_hub_sb_tx11_inp_cfg, 0, + array_size(cdc_if_tx11_mux_text), cdc_if_tx11_mux_text); +static const struct soc_enum cdc_if_tx13_inp1_mux_enum = + soc_enum_single(wcd934x_cdc_if_router_tx_mux_cfg3, 4, + array_size(cdc_if_tx13_inp1_mux_text), + cdc_if_tx13_inp1_mux_text); +static const struct soc_enum cdc_if_tx13_mux_enum = + soc_enum_single(wcd934x_data_hub_sb_tx13_inp_cfg, 0, + array_size(cdc_if_tx13_mux_text), cdc_if_tx13_mux_text); + +static int wcd934x_set_sido_input_src(struct wcd934x_codec *wcd, int sido_src) +static int wcd934x_dec_enum_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *comp; + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + unsigned int val; + u16 mic_sel_reg = 0; + u8 mic_sel; + + comp = snd_soc_dapm_kcontrol_component(kcontrol); + + val = ucontrol->value.enumerated.item[0]; + if (val > e->items - 1) + return -einval; + + switch (e->reg) { + case wcd934x_cdc_tx_inp_mux_adc_mux0_cfg1: + if (e->shift_l == 0) + mic_sel_reg = wcd934x_cdc_tx0_tx_path_cfg0; + else if (e->shift_l == 2) + mic_sel_reg = wcd934x_cdc_tx4_tx_path_cfg0; + else if (e->shift_l == 4) + mic_sel_reg = wcd934x_cdc_tx8_tx_path_cfg0; + break; + case wcd934x_cdc_tx_inp_mux_adc_mux1_cfg1: + if (e->shift_l == 0) + mic_sel_reg = wcd934x_cdc_tx1_tx_path_cfg0; + else if (e->shift_l == 2) + mic_sel_reg = wcd934x_cdc_tx5_tx_path_cfg0; + break; + case wcd934x_cdc_tx_inp_mux_adc_mux2_cfg1: + if (e->shift_l == 0) + mic_sel_reg = wcd934x_cdc_tx2_tx_path_cfg0; + else if (e->shift_l == 2) + mic_sel_reg = wcd934x_cdc_tx6_tx_path_cfg0; + break; + case wcd934x_cdc_tx_inp_mux_adc_mux3_cfg1: + if (e->shift_l == 0) + mic_sel_reg = wcd934x_cdc_tx3_tx_path_cfg0; + else if (e->shift_l == 2) + mic_sel_reg = wcd934x_cdc_tx7_tx_path_cfg0; + break; + default: + dev_err(comp->dev, "%s: e->reg: 0x%x not expected ", + __func__, e->reg); + return -einval; + } + + /* adc: 0, dmic: 1 */ + mic_sel = val ? 0x0 : 0x1; + if (mic_sel_reg) + snd_soc_component_update_bits(comp, mic_sel_reg, bit(7), + mic_sel << 7); + + return snd_soc_dapm_put_enum_double(kcontrol, ucontrol); +} + +static const struct snd_kcontrol_new tx_dmic_mux0 = + soc_dapm_enum("dmic mux0 mux", tx_dmic_mux0_enum); + +static const struct snd_kcontrol_new tx_dmic_mux1 = + soc_dapm_enum("dmic mux1 mux", tx_dmic_mux1_enum); + +static const struct snd_kcontrol_new tx_dmic_mux2 = + soc_dapm_enum("dmic mux2 mux", tx_dmic_mux2_enum); + +static const struct snd_kcontrol_new tx_dmic_mux3 = + soc_dapm_enum("dmic mux3 mux", tx_dmic_mux3_enum); + +static const struct snd_kcontrol_new tx_dmic_mux4 = + soc_dapm_enum("dmic mux4 mux", tx_dmic_mux4_enum); + +static const struct snd_kcontrol_new tx_dmic_mux5 = + soc_dapm_enum("dmic mux5 mux", tx_dmic_mux5_enum); + +static const struct snd_kcontrol_new tx_dmic_mux6 = + soc_dapm_enum("dmic mux6 mux", tx_dmic_mux6_enum); + +static const struct snd_kcontrol_new tx_dmic_mux7 = + soc_dapm_enum("dmic mux7 mux", tx_dmic_mux7_enum); + +static const struct snd_kcontrol_new tx_dmic_mux8 = + soc_dapm_enum("dmic mux8 mux", tx_dmic_mux8_enum); + +static const struct snd_kcontrol_new tx_amic_mux0 = + soc_dapm_enum("amic mux0 mux", tx_amic_mux0_enum); + +static const struct snd_kcontrol_new tx_amic_mux1 = + soc_dapm_enum("amic mux1 mux", tx_amic_mux1_enum); + +static const struct snd_kcontrol_new tx_amic_mux2 = + soc_dapm_enum("amic mux2 mux", tx_amic_mux2_enum); + +static const struct snd_kcontrol_new tx_amic_mux3 = + soc_dapm_enum("amic mux3 mux", tx_amic_mux3_enum); + +static const struct snd_kcontrol_new tx_amic_mux4 = + soc_dapm_enum("amic mux4 mux", tx_amic_mux4_enum); + +static const struct snd_kcontrol_new tx_amic_mux5 = + soc_dapm_enum("amic mux5 mux", tx_amic_mux5_enum); + +static const struct snd_kcontrol_new tx_amic_mux6 = + soc_dapm_enum("amic mux6 mux", tx_amic_mux6_enum); + +static const struct snd_kcontrol_new tx_amic_mux7 = + soc_dapm_enum("amic mux7 mux", tx_amic_mux7_enum); + +static const struct snd_kcontrol_new tx_amic_mux8 = + soc_dapm_enum("amic mux8 mux", tx_amic_mux8_enum); + +static const struct snd_kcontrol_new tx_amic4_5 = + soc_dapm_enum("amic4_5 sel mux", tx_amic4_5_enum); + +static const struct snd_kcontrol_new tx_adc_mux0_mux = + soc_dapm_enum_ext("adc mux0 mux", tx_adc_mux0_enum, + snd_soc_dapm_get_enum_double, wcd934x_dec_enum_put); +static const struct snd_kcontrol_new tx_adc_mux1_mux = + soc_dapm_enum_ext("adc mux1 mux", tx_adc_mux1_enum, + snd_soc_dapm_get_enum_double, wcd934x_dec_enum_put); +static const struct snd_kcontrol_new tx_adc_mux2_mux = + soc_dapm_enum_ext("adc mux2 mux", tx_adc_mux2_enum, + snd_soc_dapm_get_enum_double, wcd934x_dec_enum_put); +static const struct snd_kcontrol_new tx_adc_mux3_mux = + soc_dapm_enum_ext("adc mux3 mux", tx_adc_mux3_enum, + snd_soc_dapm_get_enum_double, wcd934x_dec_enum_put); +static const struct snd_kcontrol_new tx_adc_mux4_mux = + soc_dapm_enum_ext("adc mux4 mux", tx_adc_mux4_enum, + snd_soc_dapm_get_enum_double, wcd934x_dec_enum_put); +static const struct snd_kcontrol_new tx_adc_mux5_mux = + soc_dapm_enum_ext("adc mux5 mux", tx_adc_mux5_enum, + snd_soc_dapm_get_enum_double, wcd934x_dec_enum_put); +static const struct snd_kcontrol_new tx_adc_mux6_mux = + soc_dapm_enum_ext("adc mux6 mux", tx_adc_mux6_enum, + snd_soc_dapm_get_enum_double, wcd934x_dec_enum_put); +static const struct snd_kcontrol_new tx_adc_mux7_mux = + soc_dapm_enum_ext("adc mux7 mux", tx_adc_mux7_enum, + snd_soc_dapm_get_enum_double, wcd934x_dec_enum_put); +static const struct snd_kcontrol_new tx_adc_mux8_mux = + soc_dapm_enum_ext("adc mux8 mux", tx_adc_mux8_enum, + snd_soc_dapm_get_enum_double, wcd934x_dec_enum_put); + +static const struct snd_kcontrol_new cdc_if_tx0_mux = + soc_dapm_enum("cdc_if tx0 mux mux", cdc_if_tx0_mux_enum); +static const struct snd_kcontrol_new cdc_if_tx1_mux = + soc_dapm_enum("cdc_if tx1 mux mux", cdc_if_tx1_mux_enum); +static const struct snd_kcontrol_new cdc_if_tx2_mux = + soc_dapm_enum("cdc_if tx2 mux mux", cdc_if_tx2_mux_enum); +static const struct snd_kcontrol_new cdc_if_tx3_mux = + soc_dapm_enum("cdc_if tx3 mux mux", cdc_if_tx3_mux_enum); +static const struct snd_kcontrol_new cdc_if_tx4_mux = + soc_dapm_enum("cdc_if tx4 mux mux", cdc_if_tx4_mux_enum); +static const struct snd_kcontrol_new cdc_if_tx5_mux = + soc_dapm_enum("cdc_if tx5 mux mux", cdc_if_tx5_mux_enum); +static const struct snd_kcontrol_new cdc_if_tx6_mux = + soc_dapm_enum("cdc_if tx6 mux mux", cdc_if_tx6_mux_enum); +static const struct snd_kcontrol_new cdc_if_tx7_mux = + soc_dapm_enum("cdc_if tx7 mux mux", cdc_if_tx7_mux_enum); +static const struct snd_kcontrol_new cdc_if_tx8_mux = + soc_dapm_enum("cdc_if tx8 mux mux", cdc_if_tx8_mux_enum); +static const struct snd_kcontrol_new cdc_if_tx9_mux = + soc_dapm_enum("cdc_if tx9 mux mux", cdc_if_tx9_mux_enum); +static const struct snd_kcontrol_new cdc_if_tx10_mux = + soc_dapm_enum("cdc_if tx10 mux mux", cdc_if_tx10_mux_enum); +static const struct snd_kcontrol_new cdc_if_tx11_mux = + soc_dapm_enum("cdc_if tx11 mux mux", cdc_if_tx11_mux_enum); +static const struct snd_kcontrol_new cdc_if_tx11_inp1_mux = + soc_dapm_enum("cdc_if tx11 inp1 mux mux", cdc_if_tx11_inp1_mux_enum); +static const struct snd_kcontrol_new cdc_if_tx13_mux = + soc_dapm_enum("cdc_if tx13 mux mux", cdc_if_tx13_mux_enum); +static const struct snd_kcontrol_new cdc_if_tx13_inp1_mux = + soc_dapm_enum("cdc_if tx13 inp1 mux mux", cdc_if_tx13_inp1_mux_enum); + +static int slim_tx_mixer_get(struct snd_kcontrol *kc, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_dapm_context *dapm = snd_soc_dapm_kcontrol_dapm(kc); + struct wcd934x_codec *wcd = dev_get_drvdata(dapm->dev); + struct soc_mixer_control *mixer = + (struct soc_mixer_control *)kc->private_value; + int port_id = mixer->shift; + + ucontrol->value.integer.value[0] = wcd->tx_port_value[port_id]; + + return 0; +} + +static int slim_tx_mixer_put(struct snd_kcontrol *kc, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_dapm_widget *widget = snd_soc_dapm_kcontrol_widget(kc); + struct wcd934x_codec *wcd = dev_get_drvdata(widget->dapm->dev); + struct snd_soc_dapm_update *update = null; + struct soc_mixer_control *mixer = + (struct soc_mixer_control *)kc->private_value; + int enable = ucontrol->value.integer.value[0]; + int dai_id = widget->shift; + int port_id = mixer->shift; + + /* only add to the list if value not set */ + if (enable == wcd->tx_port_value[port_id]) + return 0; + + wcd->tx_port_value[port_id] = enable; + + if (enable) + list_add_tail(&wcd->tx_chs[port_id].list, + &wcd->dai[dai_id].slim_ch_list); + else + list_del_init(&wcd->tx_chs[port_id].list); + + snd_soc_dapm_mixer_update_power(widget->dapm, kc, enable, update); + + return 0; +} + +static const struct snd_kcontrol_new aif1_slim_cap_mixer[] = { + soc_single_ext("slim tx0", snd_soc_nopm, wcd934x_tx0, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx1", snd_soc_nopm, wcd934x_tx1, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx2", snd_soc_nopm, wcd934x_tx2, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx3", snd_soc_nopm, wcd934x_tx3, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx4", snd_soc_nopm, wcd934x_tx4, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx5", snd_soc_nopm, wcd934x_tx5, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx6", snd_soc_nopm, wcd934x_tx6, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx7", snd_soc_nopm, wcd934x_tx7, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx8", snd_soc_nopm, wcd934x_tx8, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx9", snd_soc_nopm, wcd934x_tx9, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx10", snd_soc_nopm, wcd934x_tx10, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx11", snd_soc_nopm, wcd934x_tx11, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx13", snd_soc_nopm, wcd934x_tx13, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), +}; + +static const struct snd_kcontrol_new aif2_slim_cap_mixer[] = { + soc_single_ext("slim tx0", snd_soc_nopm, wcd934x_tx0, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx1", snd_soc_nopm, wcd934x_tx1, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx2", snd_soc_nopm, wcd934x_tx2, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx3", snd_soc_nopm, wcd934x_tx3, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx4", snd_soc_nopm, wcd934x_tx4, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx5", snd_soc_nopm, wcd934x_tx5, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx6", snd_soc_nopm, wcd934x_tx6, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx7", snd_soc_nopm, wcd934x_tx7, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx8", snd_soc_nopm, wcd934x_tx8, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx9", snd_soc_nopm, wcd934x_tx9, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx10", snd_soc_nopm, wcd934x_tx10, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx11", snd_soc_nopm, wcd934x_tx11, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx13", snd_soc_nopm, wcd934x_tx13, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), +}; + +static const struct snd_kcontrol_new aif3_slim_cap_mixer[] = { + soc_single_ext("slim tx0", snd_soc_nopm, wcd934x_tx0, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx1", snd_soc_nopm, wcd934x_tx1, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx2", snd_soc_nopm, wcd934x_tx2, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx3", snd_soc_nopm, wcd934x_tx3, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx4", snd_soc_nopm, wcd934x_tx4, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx5", snd_soc_nopm, wcd934x_tx5, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx6", snd_soc_nopm, wcd934x_tx6, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx7", snd_soc_nopm, wcd934x_tx7, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx8", snd_soc_nopm, wcd934x_tx8, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx9", snd_soc_nopm, wcd934x_tx9, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx10", snd_soc_nopm, wcd934x_tx10, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx11", snd_soc_nopm, wcd934x_tx11, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), + soc_single_ext("slim tx13", snd_soc_nopm, wcd934x_tx13, 1, 0, + slim_tx_mixer_get, slim_tx_mixer_put), +}; + +static u32 wcd934x_get_dmic_sample_rate(struct snd_soc_component *comp, + unsigned int dmic, + struct wcd934x_codec *wcd) +{ + u8 tx_stream_fs; + u8 adc_mux_index = 0, adc_mux_sel = 0; + bool dec_found = false; + u16 adc_mux_ctl_reg, tx_fs_reg; + u32 dmic_fs; + + while (dec_found == 0 && adc_mux_index < wcd934x_max_valid_adc_mux) { + if (adc_mux_index < 4) { + adc_mux_ctl_reg = wcd934x_cdc_tx_inp_mux_adc_mux0_cfg0 + + (adc_mux_index * 2); + } else if (adc_mux_index < wcd934x_invalid_adc_mux) { + adc_mux_ctl_reg = wcd934x_cdc_tx_inp_mux_adc_mux4_cfg0 + + adc_mux_index - 4; + } else if (adc_mux_index == wcd934x_invalid_adc_mux) { + ++adc_mux_index; + continue; + } + adc_mux_sel = ((snd_soc_component_read32(comp, adc_mux_ctl_reg) + & 0xf8) >> 3) - 1; + + if (adc_mux_sel == dmic) { + dec_found = true; + break; + } + + ++adc_mux_index; + } + + if (dec_found && adc_mux_index <= 8) { + tx_fs_reg = wcd934x_cdc_tx0_tx_path_ctl + (16 * adc_mux_index); + tx_stream_fs = snd_soc_component_read32(comp, tx_fs_reg) & 0x0f; + if (tx_stream_fs <= 4) { + if (wcd->dmic_sample_rate <= + wcd9xxx_dmic_sample_rate_2p4mhz) + dmic_fs = wcd->dmic_sample_rate; + else + dmic_fs = wcd9xxx_dmic_sample_rate_2p4mhz; + } else + dmic_fs = wcd9xxx_dmic_sample_rate_4p8mhz; + } else { + dmic_fs = wcd->dmic_sample_rate; + } + + return dmic_fs; +} + +static u8 wcd934x_get_dmic_clk_val(struct snd_soc_component *comp, + u32 mclk_rate, u32 dmic_clk_rate) +{ + u32 div_factor; + u8 dmic_ctl_val; + + /* default value to return in case of error */ + if (mclk_rate == wcd934x_mclk_clk_9p6mhz) + dmic_ctl_val = wcd934x_dmic_clk_div_2; + else + dmic_ctl_val = wcd934x_dmic_clk_div_3; + + if (dmic_clk_rate == 0) { + dev_err(comp->dev, + "%s: dmic_sample_rate cannot be 0 ", + __func__); + goto done; + } + + div_factor = mclk_rate / dmic_clk_rate; + switch (div_factor) { + case 2: + dmic_ctl_val = wcd934x_dmic_clk_div_2; + break; + case 3: + dmic_ctl_val = wcd934x_dmic_clk_div_3; + break; + case 4: + dmic_ctl_val = wcd934x_dmic_clk_div_4; + break; + case 6: + dmic_ctl_val = wcd934x_dmic_clk_div_6; + break; + case 8: + dmic_ctl_val = wcd934x_dmic_clk_div_8; + break; + case 16: + dmic_ctl_val = wcd934x_dmic_clk_div_16; + break; + default: + dev_err(comp->dev, + "%s: invalid div_factor %u, clk_rate(%u), dmic_rate(%u) ", + __func__, div_factor, mclk_rate, dmic_clk_rate); + break; + } + +done: + return dmic_ctl_val; +} + +static int wcd934x_codec_enable_dmic(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm); + struct wcd934x_codec *wcd = dev_get_drvdata(comp->dev); + u8 dmic_clk_en = 0x01; + u16 dmic_clk_reg; + s32 *dmic_clk_cnt; + u8 dmic_rate_val, dmic_rate_shift = 1; + unsigned int dmic; + u32 dmic_sample_rate; + int ret; + char *wname; + + wname = strpbrk(w->name, "012345"); + if (!wname) { + dev_err(comp->dev, "%s: widget not found ", __func__); + return -einval; + } + + ret = kstrtouint(wname, 10, &dmic); + if (ret < 0) { + dev_err(comp->dev, "%s: invalid dmic line on the codec ", + __func__); + return -einval; + } + + switch (dmic) { + case 0: + case 1: + dmic_clk_cnt = &wcd->dmic_0_1_clk_cnt; + dmic_clk_reg = wcd934x_cpe_ss_dmic0_ctl; + break; + case 2: + case 3: + dmic_clk_cnt = &wcd->dmic_2_3_clk_cnt; + dmic_clk_reg = wcd934x_cpe_ss_dmic1_ctl; + break; + case 4: + case 5: + dmic_clk_cnt = &wcd->dmic_4_5_clk_cnt; + dmic_clk_reg = wcd934x_cpe_ss_dmic2_ctl; + break; + default: + dev_err(comp->dev, "%s: invalid dmic selection ", + __func__); + return -einval; + }; + + switch (event) { + case snd_soc_dapm_pre_pmu: + dmic_sample_rate = wcd934x_get_dmic_sample_rate(comp, dmic, + wcd); + dmic_rate_val = wcd934x_get_dmic_clk_val(comp, wcd->rate, + dmic_sample_rate); + (*dmic_clk_cnt)++; + if (*dmic_clk_cnt == 1) { + dmic_rate_val = dmic_rate_val << dmic_rate_shift; + snd_soc_component_update_bits(comp, dmic_clk_reg, + wcd934x_dmic_rate_mask, + dmic_rate_val); + snd_soc_component_update_bits(comp, dmic_clk_reg, + dmic_clk_en, dmic_clk_en); + } + + break; + case snd_soc_dapm_post_pmd: + (*dmic_clk_cnt)--; + if (*dmic_clk_cnt == 0) + snd_soc_component_update_bits(comp, dmic_clk_reg, + dmic_clk_en, 0); + break; + }; + + return 0; +} + +static int wcd934x_codec_find_amic_input(struct snd_soc_component *comp, + int adc_mux_n) +{ + u16 mask, shift, adc_mux_in_reg; + u16 amic_mux_sel_reg; + bool is_amic; + + if (adc_mux_n < 0 || adc_mux_n > wcd934x_max_valid_adc_mux || + adc_mux_n == wcd934x_invalid_adc_mux) + return 0; + + if (adc_mux_n < 3) { + adc_mux_in_reg = wcd934x_cdc_tx_inp_mux_adc_mux0_cfg1 + + adc_mux_n; + mask = 0x03; + shift = 0; + amic_mux_sel_reg = wcd934x_cdc_tx_inp_mux_adc_mux0_cfg0 + + 2 * adc_mux_n; + } else if (adc_mux_n < 4) { + adc_mux_in_reg = wcd934x_cdc_tx_inp_mux_adc_mux3_cfg1; + mask = 0x03; + shift = 0; + amic_mux_sel_reg = wcd934x_cdc_tx_inp_mux_adc_mux0_cfg0 + + 2 * adc_mux_n; + } else if (adc_mux_n < 7) { + adc_mux_in_reg = wcd934x_cdc_tx_inp_mux_adc_mux0_cfg1 + + (adc_mux_n - 4); + mask = 0x0c; + shift = 2; + amic_mux_sel_reg = wcd934x_cdc_tx_inp_mux_adc_mux4_cfg0 + + adc_mux_n - 4; + } else if (adc_mux_n < 8) { + adc_mux_in_reg = wcd934x_cdc_tx_inp_mux_adc_mux3_cfg1; + mask = 0x0c; + shift = 2; + amic_mux_sel_reg = wcd934x_cdc_tx_inp_mux_adc_mux4_cfg0 + + adc_mux_n - 4; + } else if (adc_mux_n < 12) { + adc_mux_in_reg = wcd934x_cdc_tx_inp_mux_adc_mux0_cfg1 + + ((adc_mux_n == 8) ? (adc_mux_n - 8) : + (adc_mux_n - 9)); + mask = 0x30; + shift = 4; + amic_mux_sel_reg = wcd934x_cdc_tx_inp_mux_adc_mux4_cfg0 + + adc_mux_n - 4; + } else if (adc_mux_n < 13) { + adc_mux_in_reg = wcd934x_cdc_tx_inp_mux_adc_mux3_cfg1; + mask = 0x30; + shift = 4; + amic_mux_sel_reg = wcd934x_cdc_tx_inp_mux_adc_mux4_cfg0 + + adc_mux_n - 4; + } else { + adc_mux_in_reg = wcd934x_cdc_tx_inp_mux_adc_mux0_cfg1; + mask = 0xc0; + shift = 6; + amic_mux_sel_reg = wcd934x_cdc_tx_inp_mux_adc_mux4_cfg0 + + adc_mux_n - 4; + } + + is_amic = (((snd_soc_component_read32(comp, adc_mux_in_reg) + & mask) >> shift) == 1); + if (!is_amic) + return 0; + + return snd_soc_component_read32(comp, amic_mux_sel_reg) & 0x07; +} + +static u16 wcd934x_codec_get_amic_pwlvl_reg(struct snd_soc_component *comp, + int amic) +{ + u16 pwr_level_reg = 0; + + switch (amic) { + case 1: + case 2: + pwr_level_reg = wcd934x_ana_amic1; + break; + + case 3: + case 4: + pwr_level_reg = wcd934x_ana_amic3; + break; + default: + break; + } + + return pwr_level_reg; +} + +static int wcd934x_codec_enable_dec(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm); + unsigned int decimator; + char *dec_adc_mux_name = null; + char *widget_name = null; + char *wname; + int ret = 0, amic_n; + u16 tx_vol_ctl_reg, pwr_level_reg = 0, dec_cfg_reg, hpf_gate_reg; + u16 tx_gain_ctl_reg; + char *dec; + u8 hpf_coff_freq; + + widget_name = kstrndup(w->name, 15, gfp_kernel); + if (!widget_name) + return -enomem; + + wname = widget_name; + dec_adc_mux_name = strsep(&widget_name, " "); + if (!dec_adc_mux_name) { + dev_err(comp->dev, "%s: invalid decimator = %s ", + __func__, w->name); + ret = -einval; + goto out; + } + dec_adc_mux_name = widget_name; + + dec = strpbrk(dec_adc_mux_name, "012345678"); + if (!dec) { + dev_err(comp->dev, "%s: decimator index not found ", + __func__); + ret = -einval; + goto out; + } + + ret = kstrtouint(dec, 10, &decimator); + if (ret < 0) { + dev_err(comp->dev, "%s: invalid decimator = %s ", + __func__, wname); + ret = -einval; + goto out; + } + + tx_vol_ctl_reg = wcd934x_cdc_tx0_tx_path_ctl + 16 * decimator; + hpf_gate_reg = wcd934x_cdc_tx0_tx_path_sec2 + 16 * decimator; + dec_cfg_reg = wcd934x_cdc_tx0_tx_path_cfg0 + 16 * decimator; + tx_gain_ctl_reg = wcd934x_cdc_tx0_tx_vol_ctl + 16 * decimator; + + switch (event) { + case snd_soc_dapm_pre_pmu: + amic_n = wcd934x_codec_find_amic_input(comp, decimator); + if (amic_n) + pwr_level_reg = wcd934x_codec_get_amic_pwlvl_reg(comp, + amic_n); + + if (!pwr_level_reg) + break; + + switch ((snd_soc_component_read32(comp, pwr_level_reg) & + wcd934x_amic_pwr_lvl_mask) >> + wcd934x_amic_pwr_lvl_shift) { + case wcd934x_amic_pwr_level_lp: + snd_soc_component_update_bits(comp, dec_cfg_reg, + wcd934x_dec_pwr_lvl_mask, + wcd934x_dec_pwr_lvl_lp); + break; + case wcd934x_amic_pwr_level_hp: + snd_soc_component_update_bits(comp, dec_cfg_reg, + wcd934x_dec_pwr_lvl_mask, + wcd934x_dec_pwr_lvl_hp); + break; + case wcd934x_amic_pwr_level_default: + case wcd934x_amic_pwr_level_hybrid: + default: + snd_soc_component_update_bits(comp, dec_cfg_reg, + wcd934x_dec_pwr_lvl_mask, + wcd934x_dec_pwr_lvl_df); + break; + } + break; + case snd_soc_dapm_post_pmu: + hpf_coff_freq = (snd_soc_component_read32(comp, dec_cfg_reg) & + tx_hpf_cut_off_freq_mask) >> 5; + if (hpf_coff_freq != cf_min_3db_150hz) { + snd_soc_component_update_bits(comp, dec_cfg_reg, + tx_hpf_cut_off_freq_mask, + cf_min_3db_150hz << 5); + snd_soc_component_update_bits(comp, hpf_gate_reg, + wcd934x_hph_cutoff_freq_change_req_mask, + wcd934x_hph_cutoff_freq_change_req); + /* + * minimum 1 clk cycle delay is required as per + * hw spec. + */ + usleep_range(1000, 1010); + snd_soc_component_update_bits(comp, hpf_gate_reg, + wcd934x_hph_cutoff_freq_change_req_mask, + 0); + } + /* apply gain after decimator is enabled */ + snd_soc_component_write(comp, tx_gain_ctl_reg, + snd_soc_component_read32(comp, + tx_gain_ctl_reg)); + break; + case snd_soc_dapm_pre_pmd: + hpf_coff_freq = (snd_soc_component_read32(comp, dec_cfg_reg) & + tx_hpf_cut_off_freq_mask) >> 5; + + if (hpf_coff_freq != cf_min_3db_150hz) { + snd_soc_component_update_bits(comp, dec_cfg_reg, + tx_hpf_cut_off_freq_mask, + hpf_coff_freq << 5); + snd_soc_component_update_bits(comp, hpf_gate_reg, + wcd934x_hph_cutoff_freq_change_req_mask, + wcd934x_hph_cutoff_freq_change_req); + /* + * minimum 1 clk cycle delay is required as per + * hw spec. + */ + usleep_range(1000, 1010); + snd_soc_component_update_bits(comp, hpf_gate_reg, + wcd934x_hph_cutoff_freq_change_req_mask, + 0); + } + break; + case snd_soc_dapm_post_pmd: + snd_soc_component_update_bits(comp, tx_vol_ctl_reg, + 0x10, 0x00); + snd_soc_component_update_bits(comp, dec_cfg_reg, + wcd934x_dec_pwr_lvl_mask, + wcd934x_dec_pwr_lvl_df); + break; + }; +out: + kfree(wname); + return ret; +} + +static void wcd934x_codec_set_tx_hold(struct snd_soc_component *comp, + u16 amic_reg, bool set) +{ + u8 mask = 0x20; + u8 val; + + if (amic_reg == wcd934x_ana_amic1 || + amic_reg == wcd934x_ana_amic3) + mask = 0x40; + + val = set ? mask : 0x00; + + switch (amic_reg) { + case wcd934x_ana_amic1: + case wcd934x_ana_amic2: + snd_soc_component_update_bits(comp, wcd934x_ana_amic2, + mask, val); + break; + case wcd934x_ana_amic3: + case wcd934x_ana_amic4: + snd_soc_component_update_bits(comp, wcd934x_ana_amic4, + mask, val); + break; + default: + break; + } +} + +static int wcd934x_codec_enable_adc(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm); + + switch (event) { + case snd_soc_dapm_pre_pmu: + wcd934x_codec_set_tx_hold(comp, w->reg, true); + break; + default: + break; + } + + return 0; +} + + + /* tx */ + snd_soc_dapm_input("amic1"), + snd_soc_dapm_input("amic2"), + snd_soc_dapm_input("amic3"), + snd_soc_dapm_input("amic4"), + snd_soc_dapm_input("amic5"), + snd_soc_dapm_input("dmic0 pin"), + snd_soc_dapm_input("dmic1 pin"), + snd_soc_dapm_input("dmic2 pin"), + snd_soc_dapm_input("dmic3 pin"), + snd_soc_dapm_input("dmic4 pin"), + snd_soc_dapm_input("dmic5 pin"), + + snd_soc_dapm_aif_out_e("aif1 cap", "aif1 capture", 0, snd_soc_nopm, + aif1_cap, 0, wcd934x_codec_enable_slim, + snd_soc_dapm_post_pmu | snd_soc_dapm_post_pmd), + snd_soc_dapm_aif_out_e("aif2 cap", "aif2 capture", 0, snd_soc_nopm, + aif2_cap, 0, wcd934x_codec_enable_slim, + snd_soc_dapm_post_pmu | snd_soc_dapm_post_pmd), + snd_soc_dapm_aif_out_e("aif3 cap", "aif3 capture", 0, snd_soc_nopm, + aif3_cap, 0, wcd934x_codec_enable_slim, + snd_soc_dapm_post_pmu | snd_soc_dapm_post_pmd), + + snd_soc_dapm_mixer("slim tx0", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("slim tx1", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("slim tx2", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("slim tx3", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("slim tx4", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("slim tx5", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("slim tx6", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("slim tx7", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("slim tx8", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("slim tx9", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("slim tx10", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("slim tx11", snd_soc_nopm, 0, 0, null, 0), + snd_soc_dapm_mixer("slim tx13", snd_soc_nopm, 0, 0, null, 0), + + /* digital mic inputs */ + snd_soc_dapm_adc_e("dmic0", null, snd_soc_nopm, 0, 0, + wcd934x_codec_enable_dmic, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmd), + snd_soc_dapm_adc_e("dmic1", null, snd_soc_nopm, 0, 0, + wcd934x_codec_enable_dmic, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmd), + snd_soc_dapm_adc_e("dmic2", null, snd_soc_nopm, 0, 0, + wcd934x_codec_enable_dmic, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmd), + snd_soc_dapm_adc_e("dmic3", null, snd_soc_nopm, 0, 0, + wcd934x_codec_enable_dmic, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmd), + snd_soc_dapm_adc_e("dmic4", null, snd_soc_nopm, 0, 0, + wcd934x_codec_enable_dmic, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmd), + snd_soc_dapm_adc_e("dmic5", null, snd_soc_nopm, 0, 0, + wcd934x_codec_enable_dmic, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmd), + snd_soc_dapm_mux("dmic mux0", snd_soc_nopm, 0, 0, &tx_dmic_mux0), + snd_soc_dapm_mux("dmic mux1", snd_soc_nopm, 0, 0, &tx_dmic_mux1), + snd_soc_dapm_mux("dmic mux2", snd_soc_nopm, 0, 0, &tx_dmic_mux2), + snd_soc_dapm_mux("dmic mux3", snd_soc_nopm, 0, 0, &tx_dmic_mux3), + snd_soc_dapm_mux("dmic mux4", snd_soc_nopm, 0, 0, &tx_dmic_mux4), + snd_soc_dapm_mux("dmic mux5", snd_soc_nopm, 0, 0, &tx_dmic_mux5), + snd_soc_dapm_mux("dmic mux6", snd_soc_nopm, 0, 0, &tx_dmic_mux6), + snd_soc_dapm_mux("dmic mux7", snd_soc_nopm, 0, 0, &tx_dmic_mux7), + snd_soc_dapm_mux("dmic mux8", snd_soc_nopm, 0, 0, &tx_dmic_mux8), + snd_soc_dapm_mux("amic mux0", snd_soc_nopm, 0, 0, &tx_amic_mux0), + snd_soc_dapm_mux("amic mux1", snd_soc_nopm, 0, 0, &tx_amic_mux1), + snd_soc_dapm_mux("amic mux2", snd_soc_nopm, 0, 0, &tx_amic_mux2), + snd_soc_dapm_mux("amic mux3", snd_soc_nopm, 0, 0, &tx_amic_mux3), + snd_soc_dapm_mux("amic mux4", snd_soc_nopm, 0, 0, &tx_amic_mux4), + snd_soc_dapm_mux("amic mux5", snd_soc_nopm, 0, 0, &tx_amic_mux5), + snd_soc_dapm_mux("amic mux6", snd_soc_nopm, 0, 0, &tx_amic_mux6), + snd_soc_dapm_mux("amic mux7", snd_soc_nopm, 0, 0, &tx_amic_mux7), + snd_soc_dapm_mux("amic mux8", snd_soc_nopm, 0, 0, &tx_amic_mux8), + snd_soc_dapm_mux_e("adc mux0", wcd934x_cdc_tx0_tx_path_ctl, 5, 0, + &tx_adc_mux0_mux, wcd934x_codec_enable_dec, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmu | + snd_soc_dapm_pre_pmd | snd_soc_dapm_post_pmd), + snd_soc_dapm_mux_e("adc mux1", wcd934x_cdc_tx1_tx_path_ctl, 5, 0, + &tx_adc_mux1_mux, wcd934x_codec_enable_dec, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmu | + snd_soc_dapm_pre_pmd | snd_soc_dapm_post_pmd), + snd_soc_dapm_mux_e("adc mux2", wcd934x_cdc_tx2_tx_path_ctl, 5, 0, + &tx_adc_mux2_mux, wcd934x_codec_enable_dec, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmu | + snd_soc_dapm_pre_pmd | snd_soc_dapm_post_pmd), + snd_soc_dapm_mux_e("adc mux3", wcd934x_cdc_tx3_tx_path_ctl, 5, 0, + &tx_adc_mux3_mux, wcd934x_codec_enable_dec, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmu | + snd_soc_dapm_pre_pmd | snd_soc_dapm_post_pmd), + snd_soc_dapm_mux_e("adc mux4", wcd934x_cdc_tx4_tx_path_ctl, 5, 0, + &tx_adc_mux4_mux, wcd934x_codec_enable_dec, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmu | + snd_soc_dapm_pre_pmd | snd_soc_dapm_post_pmd), + snd_soc_dapm_mux_e("adc mux5", wcd934x_cdc_tx5_tx_path_ctl, 5, 0, + &tx_adc_mux5_mux, wcd934x_codec_enable_dec, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmu | + snd_soc_dapm_pre_pmd | snd_soc_dapm_post_pmd), + snd_soc_dapm_mux_e("adc mux6", wcd934x_cdc_tx6_tx_path_ctl, 5, 0, + &tx_adc_mux6_mux, wcd934x_codec_enable_dec, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmu | + snd_soc_dapm_pre_pmd | snd_soc_dapm_post_pmd), + snd_soc_dapm_mux_e("adc mux7", wcd934x_cdc_tx7_tx_path_ctl, 5, 0, + &tx_adc_mux7_mux, wcd934x_codec_enable_dec, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmu | + snd_soc_dapm_pre_pmd | snd_soc_dapm_post_pmd), + snd_soc_dapm_mux_e("adc mux8", wcd934x_cdc_tx8_tx_path_ctl, 5, 0, + &tx_adc_mux8_mux, wcd934x_codec_enable_dec, + snd_soc_dapm_pre_pmu | snd_soc_dapm_post_pmu | + snd_soc_dapm_pre_pmd | snd_soc_dapm_post_pmd), + snd_soc_dapm_adc_e("adc1", null, wcd934x_ana_amic1, 7, 0, + wcd934x_codec_enable_adc, snd_soc_dapm_pre_pmu), + snd_soc_dapm_adc_e("adc2", null, wcd934x_ana_amic2, 7, 0, + wcd934x_codec_enable_adc, snd_soc_dapm_pre_pmu), + snd_soc_dapm_adc_e("adc3", null, wcd934x_ana_amic3, 7, 0, + wcd934x_codec_enable_adc, snd_soc_dapm_pre_pmu), + snd_soc_dapm_adc_e("adc4", null, wcd934x_ana_amic4, 7, 0, + wcd934x_codec_enable_adc, snd_soc_dapm_pre_pmu), + snd_soc_dapm_supply("mic bias1", wcd934x_ana_micb1, 6, 0, null, + snd_soc_dapm_post_pmu | snd_soc_dapm_post_pmd), + snd_soc_dapm_supply("mic bias2", wcd934x_ana_micb2, 6, 0, null, + snd_soc_dapm_post_pmu | snd_soc_dapm_post_pmd), + snd_soc_dapm_supply("mic bias3", wcd934x_ana_micb3, 6, 0, null, + snd_soc_dapm_post_pmu | snd_soc_dapm_post_pmd), + snd_soc_dapm_supply("mic bias4", wcd934x_ana_micb4, 6, 0, null, + snd_soc_dapm_post_pmu | snd_soc_dapm_post_pmd), + + snd_soc_dapm_mux("amic4_5 sel", snd_soc_nopm, 0, 0, &tx_amic4_5), + snd_soc_dapm_mux("cdc_if tx0 mux", snd_soc_nopm, wcd934x_tx0, 0, + &cdc_if_tx0_mux), + snd_soc_dapm_mux("cdc_if tx1 mux", snd_soc_nopm, wcd934x_tx1, 0, + &cdc_if_tx1_mux), + snd_soc_dapm_mux("cdc_if tx2 mux", snd_soc_nopm, wcd934x_tx2, 0, + &cdc_if_tx2_mux), + snd_soc_dapm_mux("cdc_if tx3 mux", snd_soc_nopm, wcd934x_tx3, 0, + &cdc_if_tx3_mux), + snd_soc_dapm_mux("cdc_if tx4 mux", snd_soc_nopm, wcd934x_tx4, 0, + &cdc_if_tx4_mux), + snd_soc_dapm_mux("cdc_if tx5 mux", snd_soc_nopm, wcd934x_tx5, 0, + &cdc_if_tx5_mux), + snd_soc_dapm_mux("cdc_if tx6 mux", snd_soc_nopm, wcd934x_tx6, 0, + &cdc_if_tx6_mux), + snd_soc_dapm_mux("cdc_if tx7 mux", snd_soc_nopm, wcd934x_tx7, 0, + &cdc_if_tx7_mux), + snd_soc_dapm_mux("cdc_if tx8 mux", snd_soc_nopm, wcd934x_tx8, 0, + &cdc_if_tx8_mux), + snd_soc_dapm_mux("cdc_if tx9 mux", snd_soc_nopm, wcd934x_tx9, 0, + &cdc_if_tx9_mux), + snd_soc_dapm_mux("cdc_if tx10 mux", snd_soc_nopm, wcd934x_tx10, 0, + &cdc_if_tx10_mux), + snd_soc_dapm_mux("cdc_if tx11 mux", snd_soc_nopm, wcd934x_tx11, 0, + &cdc_if_tx11_mux), + snd_soc_dapm_mux("cdc_if tx11 inp1 mux", snd_soc_nopm, wcd934x_tx11, 0, + &cdc_if_tx11_inp1_mux), + snd_soc_dapm_mux("cdc_if tx13 mux", snd_soc_nopm, wcd934x_tx13, 0, + &cdc_if_tx13_mux), + snd_soc_dapm_mux("cdc_if tx13 inp1 mux", snd_soc_nopm, wcd934x_tx13, 0, + &cdc_if_tx13_inp1_mux), + snd_soc_dapm_mixer("aif1_cap mixer", snd_soc_nopm, aif1_cap, 0, + aif1_slim_cap_mixer, + array_size(aif1_slim_cap_mixer)), + snd_soc_dapm_mixer("aif2_cap mixer", snd_soc_nopm, aif2_cap, 0, + aif2_slim_cap_mixer, + array_size(aif2_slim_cap_mixer)), + snd_soc_dapm_mixer("aif3_cap mixer", snd_soc_nopm, aif3_cap, 0, + aif3_slim_cap_mixer, + array_size(aif3_slim_cap_mixer)),
|
Audio
|
a70d9245759a48e57bb1dc9f63213dcf3017db32
|
srinivas kandagatla pierre louis bossart pierre louis bossart linux intel com
|
sound
|
soc
|
codecs
|
asoc: wcd934x: add audio routings
|
this patch adds audio routing for both playback and capture.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add support to wcd9340/wcd9341 codec
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ']
|
['c']
| 1
| 290
| 0
|
--- diff --git a/sound/soc/codecs/wcd934x.c b/sound/soc/codecs/wcd934x.c --- a/sound/soc/codecs/wcd934x.c +++ b/sound/soc/codecs/wcd934x.c +#define wcd934x_interpolator_path(id) \ + {"rx int" #id "_1 mix1 inp0", "rx0", "slim rx0"}, \ + {"rx int" #id "_1 mix1 inp0", "rx1", "slim rx1"}, \ + {"rx int" #id "_1 mix1 inp0", "rx2", "slim rx2"}, \ + {"rx int" #id "_1 mix1 inp0", "rx3", "slim rx3"}, \ + {"rx int" #id "_1 mix1 inp0", "rx4", "slim rx4"}, \ + {"rx int" #id "_1 mix1 inp0", "rx5", "slim rx5"}, \ + {"rx int" #id "_1 mix1 inp0", "rx6", "slim rx6"}, \ + {"rx int" #id "_1 mix1 inp0", "rx7", "slim rx7"}, \ + {"rx int" #id "_1 mix1 inp0", "iir0", "iir0"}, \ + {"rx int" #id "_1 mix1 inp0", "iir1", "iir1"}, \ + {"rx int" #id "_1 mix1 inp1", "rx0", "slim rx0"}, \ + {"rx int" #id "_1 mix1 inp1", "rx1", "slim rx1"}, \ + {"rx int" #id "_1 mix1 inp1", "rx2", "slim rx2"}, \ + {"rx int" #id "_1 mix1 inp1", "rx3", "slim rx3"}, \ + {"rx int" #id "_1 mix1 inp1", "rx4", "slim rx4"}, \ + {"rx int" #id "_1 mix1 inp1", "rx5", "slim rx5"}, \ + {"rx int" #id "_1 mix1 inp1", "rx6", "slim rx6"}, \ + {"rx int" #id "_1 mix1 inp1", "rx7", "slim rx7"}, \ + {"rx int" #id "_1 mix1 inp1", "iir0", "iir0"}, \ + {"rx int" #id "_1 mix1 inp1", "iir1", "iir1"}, \ + {"rx int" #id "_1 mix1 inp2", "rx0", "slim rx0"}, \ + {"rx int" #id "_1 mix1 inp2", "rx1", "slim rx1"}, \ + {"rx int" #id "_1 mix1 inp2", "rx2", "slim rx2"}, \ + {"rx int" #id "_1 mix1 inp2", "rx3", "slim rx3"}, \ + {"rx int" #id "_1 mix1 inp2", "rx4", "slim rx4"}, \ + {"rx int" #id "_1 mix1 inp2", "rx5", "slim rx5"}, \ + {"rx int" #id "_1 mix1 inp2", "rx6", "slim rx6"}, \ + {"rx int" #id "_1 mix1 inp2", "rx7", "slim rx7"}, \ + {"rx int" #id "_1 mix1 inp2", "iir0", "iir0"}, \ + {"rx int" #id "_1 mix1 inp2", "iir1", "iir1"}, \ + {"rx int" #id "_1 mix1", null, "rx int" #id "_1 mix1 inp0"}, \ + {"rx int" #id "_1 mix1", null, "rx int" #id "_1 mix1 inp1"}, \ + {"rx int" #id "_1 mix1", null, "rx int" #id "_1 mix1 inp2"}, \ + {"rx int" #id "_2 mux", "rx0", "slim rx0"}, \ + {"rx int" #id "_2 mux", "rx1", "slim rx1"}, \ + {"rx int" #id "_2 mux", "rx2", "slim rx2"}, \ + {"rx int" #id "_2 mux", "rx3", "slim rx3"}, \ + {"rx int" #id "_2 mux", "rx4", "slim rx4"}, \ + {"rx int" #id "_2 mux", "rx5", "slim rx5"}, \ + {"rx int" #id "_2 mux", "rx6", "slim rx6"}, \ + {"rx int" #id "_2 mux", "rx7", "slim rx7"}, \ + {"rx int" #id "_2 mux", null, "int" #id "_clk"}, \ + {"rx int" #id "_2 mux", null, "dsmdem" #id "_clk"}, \ + {"rx int" #id "_2 interp", null, "rx int" #id "_2 mux"}, \ + {"rx int" #id " sec mix", null, "rx int" #id "_2 interp"}, \ + {"rx int" #id "_1 interp", null, "rx int" #id "_1 mix1"}, \ + {"rx int" #id "_1 interp", null, "int" #id "_clk"}, \ + {"rx int" #id "_1 interp", null, "dsmdem" #id "_clk"}, \ + {"rx int" #id " sec mix", null, "rx int" #id "_1 interp"} + +#define wcd934x_interpolator_mix2(id) \ + {"rx int" #id " mix2", null, "rx int" #id " sec mix"}, \ + {"rx int" #id " mix2", null, "rx int" #id " mix2 inp"} + +#define wcd934x_slim_rx_aif_path(id) \ + {"slim rx"#id" mux", "aif1_pb", "aif1 pb"}, \ + {"slim rx"#id" mux", "aif2_pb", "aif2 pb"}, \ + {"slim rx"#id" mux", "aif3_pb", "aif3 pb"}, \ + {"slim rx"#id" mux", "aif4_pb", "aif4 pb"}, \ + {"slim rx"#id, null, "slim rx"#id" mux"} + +#define wcd934x_adc_mux(id) \ + {"adc mux" #id, "dmic", "dmic mux" #id }, \ + {"adc mux" #id, "amic", "amic mux" #id }, \ + {"dmic mux" #id, "dmic0", "dmic0"}, \ + {"dmic mux" #id, "dmic1", "dmic1"}, \ + {"dmic mux" #id, "dmic2", "dmic2"}, \ + {"dmic mux" #id, "dmic3", "dmic3"}, \ + {"dmic mux" #id, "dmic4", "dmic4"}, \ + {"dmic mux" #id, "dmic5", "dmic5"}, \ + {"amic mux" #id, "adc1", "adc1"}, \ + {"amic mux" #id, "adc2", "adc2"}, \ + {"amic mux" #id, "adc3", "adc3"}, \ + {"amic mux" #id, "adc4", "adc4"} + +#define wcd934x_iir_inp_mux(id) \ + {"iir" #id, null, "iir" #id " inp0 mux"}, \ + {"iir" #id " inp0 mux", "dec0", "adc mux0"}, \ + {"iir" #id " inp0 mux", "dec1", "adc mux1"}, \ + {"iir" #id " inp0 mux", "dec2", "adc mux2"}, \ + {"iir" #id " inp0 mux", "dec3", "adc mux3"}, \ + {"iir" #id " inp0 mux", "dec4", "adc mux4"}, \ + {"iir" #id " inp0 mux", "dec5", "adc mux5"}, \ + {"iir" #id " inp0 mux", "dec6", "adc mux6"}, \ + {"iir" #id " inp0 mux", "dec7", "adc mux7"}, \ + {"iir" #id " inp0 mux", "dec8", "adc mux8"}, \ + {"iir" #id " inp0 mux", "rx0", "slim rx0"}, \ + {"iir" #id " inp0 mux", "rx1", "slim rx1"}, \ + {"iir" #id " inp0 mux", "rx2", "slim rx2"}, \ + {"iir" #id " inp0 mux", "rx3", "slim rx3"}, \ + {"iir" #id " inp0 mux", "rx4", "slim rx4"}, \ + {"iir" #id " inp0 mux", "rx5", "slim rx5"}, \ + {"iir" #id " inp0 mux", "rx6", "slim rx6"}, \ + {"iir" #id " inp0 mux", "rx7", "slim rx7"}, \ + {"iir" #id, null, "iir" #id " inp1 mux"}, \ + {"iir" #id " inp1 mux", "dec0", "adc mux0"}, \ + {"iir" #id " inp1 mux", "dec1", "adc mux1"}, \ + {"iir" #id " inp1 mux", "dec2", "adc mux2"}, \ + {"iir" #id " inp1 mux", "dec3", "adc mux3"}, \ + {"iir" #id " inp1 mux", "dec4", "adc mux4"}, \ + {"iir" #id " inp1 mux", "dec5", "adc mux5"}, \ + {"iir" #id " inp1 mux", "dec6", "adc mux6"}, \ + {"iir" #id " inp1 mux", "dec7", "adc mux7"}, \ + {"iir" #id " inp1 mux", "dec8", "adc mux8"}, \ + {"iir" #id " inp1 mux", "rx0", "slim rx0"}, \ + {"iir" #id " inp1 mux", "rx1", "slim rx1"}, \ + {"iir" #id " inp1 mux", "rx2", "slim rx2"}, \ + {"iir" #id " inp1 mux", "rx3", "slim rx3"}, \ + {"iir" #id " inp1 mux", "rx4", "slim rx4"}, \ + {"iir" #id " inp1 mux", "rx5", "slim rx5"}, \ + {"iir" #id " inp1 mux", "rx6", "slim rx6"}, \ + {"iir" #id " inp1 mux", "rx7", "slim rx7"}, \ + {"iir" #id, null, "iir" #id " inp2 mux"}, \ + {"iir" #id " inp2 mux", "dec0", "adc mux0"}, \ + {"iir" #id " inp2 mux", "dec1", "adc mux1"}, \ + {"iir" #id " inp2 mux", "dec2", "adc mux2"}, \ + {"iir" #id " inp2 mux", "dec3", "adc mux3"}, \ + {"iir" #id " inp2 mux", "dec4", "adc mux4"}, \ + {"iir" #id " inp2 mux", "dec5", "adc mux5"}, \ + {"iir" #id " inp2 mux", "dec6", "adc mux6"}, \ + {"iir" #id " inp2 mux", "dec7", "adc mux7"}, \ + {"iir" #id " inp2 mux", "dec8", "adc mux8"}, \ + {"iir" #id " inp2 mux", "rx0", "slim rx0"}, \ + {"iir" #id " inp2 mux", "rx1", "slim rx1"}, \ + {"iir" #id " inp2 mux", "rx2", "slim rx2"}, \ + {"iir" #id " inp2 mux", "rx3", "slim rx3"}, \ + {"iir" #id " inp2 mux", "rx4", "slim rx4"}, \ + {"iir" #id " inp2 mux", "rx5", "slim rx5"}, \ + {"iir" #id " inp2 mux", "rx6", "slim rx6"}, \ + {"iir" #id " inp2 mux", "rx7", "slim rx7"}, \ + {"iir" #id, null, "iir" #id " inp3 mux"}, \ + {"iir" #id " inp3 mux", "dec0", "adc mux0"}, \ + {"iir" #id " inp3 mux", "dec1", "adc mux1"}, \ + {"iir" #id " inp3 mux", "dec2", "adc mux2"}, \ + {"iir" #id " inp3 mux", "dec3", "adc mux3"}, \ + {"iir" #id " inp3 mux", "dec4", "adc mux4"}, \ + {"iir" #id " inp3 mux", "dec5", "adc mux5"}, \ + {"iir" #id " inp3 mux", "dec6", "adc mux6"}, \ + {"iir" #id " inp3 mux", "dec7", "adc mux7"}, \ + {"iir" #id " inp3 mux", "dec8", "adc mux8"}, \ + {"iir" #id " inp3 mux", "rx0", "slim rx0"}, \ + {"iir" #id " inp3 mux", "rx1", "slim rx1"}, \ + {"iir" #id " inp3 mux", "rx2", "slim rx2"}, \ + {"iir" #id " inp3 mux", "rx3", "slim rx3"}, \ + {"iir" #id " inp3 mux", "rx4", "slim rx4"}, \ + {"iir" #id " inp3 mux", "rx5", "slim rx5"}, \ + {"iir" #id " inp3 mux", "rx6", "slim rx6"}, \ + {"iir" #id " inp3 mux", "rx7", "slim rx7"} + +#define wcd934x_slim_tx_aif_path(id) \ + {"aif1_cap mixer", "slim tx" #id, "slim tx" #id }, \ + {"aif2_cap mixer", "slim tx" #id, "slim tx" #id }, \ + {"aif3_cap mixer", "slim tx" #id, "slim tx" #id }, \ + {"slim tx" #id, null, "cdc_if tx" #id " mux"} + +static const struct snd_soc_dapm_route wcd934x_audio_map[] = { + /* rx0-rx7 */ + wcd934x_slim_rx_aif_path(0), + wcd934x_slim_rx_aif_path(1), + wcd934x_slim_rx_aif_path(2), + wcd934x_slim_rx_aif_path(3), + wcd934x_slim_rx_aif_path(4), + wcd934x_slim_rx_aif_path(5), + wcd934x_slim_rx_aif_path(6), + wcd934x_slim_rx_aif_path(7), + + /* rx0 ear out */ + wcd934x_interpolator_path(0), + wcd934x_interpolator_mix2(0), + {"rx int0 dem mux", "clsh_dsm_out", "rx int0 mix2"}, + {"rx int0 dac", null, "rx int0 dem mux"}, + {"rx int0 dac", null, "rx_bias"}, + {"ear pa", null, "rx int0 dac"}, + {"ear", null, "ear pa"}, + + /* rx1 headphone left */ + wcd934x_interpolator_path(1), + wcd934x_interpolator_mix2(1), + {"rx int1 mix3", null, "rx int1 mix2"}, + {"rx int1 dem mux", "clsh_dsm_out", "rx int1 mix3"}, + {"rx int1 dac", null, "rx int1 dem mux"}, + {"rx int1 dac", null, "rx_bias"}, + {"hphl pa", null, "rx int1 dac"}, + {"hphl", null, "hphl pa"}, + + /* rx2 headphone right */ + wcd934x_interpolator_path(2), + wcd934x_interpolator_mix2(2), + {"rx int2 mix3", null, "rx int2 mix2"}, + {"rx int2 dem mux", "clsh_dsm_out", "rx int2 mix3"}, + {"rx int2 dac", null, "rx int2 dem mux"}, + {"rx int2 dac", null, "rx_bias"}, + {"hphr pa", null, "rx int2 dac"}, + {"hphr", null, "hphr pa"}, + + /* rx3 hifi lineout1 */ + wcd934x_interpolator_path(3), + wcd934x_interpolator_mix2(3), + {"rx int3 mix3", null, "rx int3 mix2"}, + {"rx int3 dac", null, "rx int3 mix3"}, + {"rx int3 dac", null, "rx_bias"}, + {"lineout1 pa", null, "rx int3 dac"}, + {"lineout1", null, "lineout1 pa"}, + + /* rx4 hifi lineout2 */ + wcd934x_interpolator_path(4), + wcd934x_interpolator_mix2(4), + {"rx int4 mix3", null, "rx int4 mix2"}, + {"rx int4 dac", null, "rx int4 mix3"}, + {"rx int4 dac", null, "rx_bias"}, + {"lineout2 pa", null, "rx int4 dac"}, + {"lineout2", null, "lineout2 pa"}, + + /* rx7 speaker left out pa */ + wcd934x_interpolator_path(7), + wcd934x_interpolator_mix2(7), + {"rx int7 chain", null, "rx int7 mix2"}, + {"rx int7 chain", null, "rx_bias"}, + {"rx int7 chain", null, "sboost0"}, + {"rx int7 chain", null, "sboost0_clk"}, + {"spk1 out", null, "rx int7 chain"}, + + /* rx8 speaker right out pa */ + wcd934x_interpolator_path(8), + {"rx int8 chain", null, "rx int8 sec mix"}, + {"rx int8 chain", null, "rx_bias"}, + {"rx int8 chain", null, "sboost1"}, + {"rx int8 chain", null, "sboost1_clk"}, + {"spk2 out", null, "rx int8 chain"}, + + /* tx */ + {"aif1 cap", null, "aif1_cap mixer"}, + {"aif2 cap", null, "aif2_cap mixer"}, + {"aif3 cap", null, "aif3_cap mixer"}, + + wcd934x_slim_tx_aif_path(0), + wcd934x_slim_tx_aif_path(1), + wcd934x_slim_tx_aif_path(2), + wcd934x_slim_tx_aif_path(3), + wcd934x_slim_tx_aif_path(4), + wcd934x_slim_tx_aif_path(5), + wcd934x_slim_tx_aif_path(6), + wcd934x_slim_tx_aif_path(7), + wcd934x_slim_tx_aif_path(8), + + wcd934x_adc_mux(0), + wcd934x_adc_mux(1), + wcd934x_adc_mux(2), + wcd934x_adc_mux(3), + wcd934x_adc_mux(4), + wcd934x_adc_mux(5), + wcd934x_adc_mux(6), + wcd934x_adc_mux(7), + wcd934x_adc_mux(8), + + {"cdc_if tx0 mux", "dec0", "adc mux0"}, + {"cdc_if tx1 mux", "dec1", "adc mux1"}, + {"cdc_if tx2 mux", "dec2", "adc mux2"}, + {"cdc_if tx3 mux", "dec3", "adc mux3"}, + {"cdc_if tx4 mux", "dec4", "adc mux4"}, + {"cdc_if tx5 mux", "dec5", "adc mux5"}, + {"cdc_if tx6 mux", "dec6", "adc mux6"}, + {"cdc_if tx7 mux", "dec7", "adc mux7"}, + {"cdc_if tx8 mux", "dec8", "adc mux8"}, + + {"amic4_5 sel", "amic4", "amic4"}, + {"amic4_5 sel", "amic5", "amic5"}, + + { "dmic0", null, "dmic0 pin" }, + { "dmic1", null, "dmic1 pin" }, + { "dmic2", null, "dmic2 pin" }, + { "dmic3", null, "dmic3 pin" }, + { "dmic4", null, "dmic4 pin" }, + { "dmic5", null, "dmic5 pin" }, + + {"adc1", null, "amic1"}, + {"adc2", null, "amic2"}, + {"adc3", null, "amic3"}, + {"adc4", null, "amic4_5 sel"}, + + wcd934x_iir_inp_mux(0), + wcd934x_iir_inp_mux(1), + + {"src0", null, "iir0"}, + {"src1", null, "iir1"}, +}; + + .dapm_routes = wcd934x_audio_map, + .num_dapm_routes = array_size(wcd934x_audio_map),
|
Audio
|
da3e83f8bb866a91945ef5c47bdb25de189a381e
|
srinivas kandagatla pierre louis bossart pierre louis bossart linux intel com
|
sound
|
soc
|
codecs
|
asoc: qcom: dt-bindings: add compatible for db845c and lenovo yoga
|
this patch adds compatible strings for db845c and lenovo yoga c630 soundcard. based on this compatible strings common machine driver will be in better position to setup board specific configuration.
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this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add support to wcd9340/wcd9341 codec
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['asoc ']
|
['txt']
| 1
| 4
| 1
|
--- diff --git a/documentation/devicetree/bindings/sound/qcom,sdm845.txt b/documentation/devicetree/bindings/sound/qcom,sdm845.txt --- a/documentation/devicetree/bindings/sound/qcom,sdm845.txt +++ b/documentation/devicetree/bindings/sound/qcom,sdm845.txt - compatible: - definition: must be "qcom,sdm845-sndcard" + definition: must be one of this + "qcom,sdm845-sndcard" + "qcom,db845c-sndcard" + "lenovo,yoga-c630-sndcard" - audio-routing:
|
Audio
|
834d899794f4ec3bbf9836c85e8f76b7de6e8a59
|
srinivas kandagatla rob herring robh kernel org pierre louis bossart pierre louis bossart linux intel com
|
documentation
|
devicetree
|
bindings, sound
|
input: tm2-touchkey - add support for coreriver tc360 variant
|
the coreriver touchcore 360 is like the midas board touchkey, but it is using a fixed regulator.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
tm2-touchkey - add support for coreriver tc360 variant
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['c']
| 1
| 11
| 0
|
--- diff --git a/drivers/input/keyboard/tm2-touchkey.c b/drivers/input/keyboard/tm2-touchkey.c --- a/drivers/input/keyboard/tm2-touchkey.c +++ b/drivers/input/keyboard/tm2-touchkey.c +static const struct touchkey_variant tc360_touchkey_variant = { + .keycode_reg = 0x00, + .base_reg = 0x00, + .fixed_regulator = true, + .cmd_led_on = tm2_touchkey_cmd_led_on, + .cmd_led_off = tm2_touchkey_cmd_led_off, +}; + + }, { + .compatible = "coreriver,tc360-touchkey", + .data = &tc360_touchkey_variant,
|
Tablets, touch screens, keyboards, mouses
|
da3289044833769188c0da945d2cec90af35e87e
|
nick reitemeyer
|
drivers
|
input
|
keyboard
|
input: add ioc3 serio driver
|
this patch adds a platform driver for supporting keyboard and mouse interface of sgi ioc3 chips.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add ioc3 serio driver
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['c', 'kconfig', 'makefile']
| 3
| 227
| 0
|
--- diff --git a/drivers/input/serio/kconfig b/drivers/input/serio/kconfig --- a/drivers/input/serio/kconfig +++ b/drivers/input/serio/kconfig +config serio_sgi_ioc3 + tristate "sgi ioc3 ps/2 controller" + depends on sgi_mfd_ioc3 + help + say y here if you have an sgi onyx2, sgi octane or ioc3 pci card + and you want to attach and use a keyboard, mouse, or both. + + to compile this driver as a module, choose m here: the + module will be called ioc3kbd. + diff --git a/drivers/input/serio/makefile b/drivers/input/serio/makefile --- a/drivers/input/serio/makefile +++ b/drivers/input/serio/makefile +obj-$(config_serio_sgi_ioc3) += ioc3kbd.o diff --git a/drivers/input/serio/ioc3kbd.c b/drivers/input/serio/ioc3kbd.c --- /dev/null +++ b/drivers/input/serio/ioc3kbd.c +// spdx-license-identifier: gpl-2.0 +/* + * sgi ioc3 ps/2 controller driver for linux + * + * copyright (c) 2019 thomas bogendoerfer <tbogendoerfer@suse.de> + * + * based on code copyright (c) 2005 stanislaw skowronek <skylark@unaligned.org> + * copyright (c) 2009 johannes dickgreber <tanzy@gmx.de> + */ + +#include <linux/delay.h> +#include <linux/init.h> +#include <linux/io.h> +#include <linux/serio.h> +#include <linux/module.h> +#include <linux/platform_device.h> + +#include <asm/sn/ioc3.h> + +struct ioc3kbd_data { + struct ioc3_serioregs __iomem *regs; + struct serio *kbd, *aux; + bool kbd_exists, aux_exists; + int irq; +}; + +static int ioc3kbd_wait(struct ioc3_serioregs __iomem *regs, u32 mask) +{ + unsigned long timeout = 0; + + while ((readl(®s->km_csr) & mask) && (timeout < 250)) { + udelay(50); + timeout++; + } + return (timeout >= 250) ? -etimedout : 0; +} + +static int ioc3kbd_write(struct serio *dev, u8 val) +{ + struct ioc3kbd_data *d = dev->port_data; + int ret; + + ret = ioc3kbd_wait(d->regs, km_csr_k_wrt_pend); + if (ret) + return ret; + + writel(val, &d->regs->k_wd); + + return 0; +} + +static int ioc3kbd_start(struct serio *dev) +{ + struct ioc3kbd_data *d = dev->port_data; + + d->kbd_exists = true; + return 0; +} + +static void ioc3kbd_stop(struct serio *dev) +{ + struct ioc3kbd_data *d = dev->port_data; + + d->kbd_exists = false; +} + +static int ioc3aux_write(struct serio *dev, u8 val) +{ + struct ioc3kbd_data *d = dev->port_data; + int ret; + + ret = ioc3kbd_wait(d->regs, km_csr_m_wrt_pend); + if (ret) + return ret; + + writel(val, &d->regs->m_wd); + + return 0; +} + +static int ioc3aux_start(struct serio *dev) +{ + struct ioc3kbd_data *d = dev->port_data; + + d->aux_exists = true; + return 0; +} + +static void ioc3aux_stop(struct serio *dev) +{ + struct ioc3kbd_data *d = dev->port_data; + + d->aux_exists = false; +} + +static void ioc3kbd_process_data(struct serio *dev, u32 data) +{ + if (data & km_rd_valid_0) + serio_interrupt(dev, (data >> km_rd_data_0_shift) & 0xff, 0); + if (data & km_rd_valid_1) + serio_interrupt(dev, (data >> km_rd_data_1_shift) & 0xff, 0); + if (data & km_rd_valid_2) + serio_interrupt(dev, (data >> km_rd_data_2_shift) & 0xff, 0); +} + +static irqreturn_t ioc3kbd_intr(int itq, void *dev_id) +{ + struct ioc3kbd_data *d = dev_id; + u32 data_k, data_m; + + data_k = readl(&d->regs->k_rd); + if (d->kbd_exists) + ioc3kbd_process_data(d->kbd, data_k); + + data_m = readl(&d->regs->m_rd); + if (d->aux_exists) + ioc3kbd_process_data(d->aux, data_m); + + return irq_handled; +} + +static int ioc3kbd_probe(struct platform_device *pdev) +{ + struct ioc3_serioregs __iomem *regs; + struct device *dev = &pdev->dev; + struct ioc3kbd_data *d; + struct serio *sk, *sa; + int irq, ret; + + regs = devm_platform_ioremap_resource(pdev, 0); + if (is_err(regs)) + return ptr_err(regs); + + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return -enxio; + + d = devm_kzalloc(dev, sizeof(*d), gfp_kernel); + if (!d) + return -enomem; + + sk = kzalloc(sizeof(*sk), gfp_kernel); + if (!sk) + return -enomem; + + sa = kzalloc(sizeof(*sa), gfp_kernel); + if (!sa) { + kfree(sk); + return -enomem; + } + + sk->id.type = serio_8042; + sk->write = ioc3kbd_write; + sk->start = ioc3kbd_start; + sk->stop = ioc3kbd_stop; + snprintf(sk->name, sizeof(sk->name), "ioc3 keyboard %d", pdev->id); + snprintf(sk->phys, sizeof(sk->phys), "ioc3/serio%dkbd", pdev->id); + sk->port_data = d; + sk->dev.parent = dev; + + sa->id.type = serio_8042; + sa->write = ioc3aux_write; + sa->start = ioc3aux_start; + sa->stop = ioc3aux_stop; + snprintf(sa->name, sizeof(sa->name), "ioc3 auxiliary %d", pdev->id); + snprintf(sa->phys, sizeof(sa->phys), "ioc3/serio%daux", pdev->id); + sa->port_data = d; + sa->dev.parent = dev; + + d->regs = regs; + d->kbd = sk; + d->aux = sa; + d->irq = irq; + + platform_set_drvdata(pdev, d); + serio_register_port(d->kbd); + serio_register_port(d->aux); + + ret = request_irq(irq, ioc3kbd_intr, irqf_shared, "ioc3-kbd", d); + if (ret) { + dev_err(dev, "could not request irq %d ", irq); + serio_unregister_port(d->kbd); + serio_unregister_port(d->aux); + return ret; + } + + /* enable ports */ + writel(km_csr_k_clamp_3 | km_csr_m_clamp_3, ®s->km_csr); + + return 0; +} + +static int ioc3kbd_remove(struct platform_device *pdev) +{ + struct ioc3kbd_data *d = platform_get_drvdata(pdev); + + free_irq(d->irq, d); + + serio_unregister_port(d->kbd); + serio_unregister_port(d->aux); + + return 0; +} + +static struct platform_driver ioc3kbd_driver = { + .probe = ioc3kbd_probe, + .remove = ioc3kbd_remove, + .driver = { + .name = "ioc3-kbd", + }, +}; +module_platform_driver(ioc3kbd_driver); + +module_author("thomas bogendoerfer <tbogendoerfer@suse.de>"); +module_description("sgi ioc3 serio driver"); +module_license("gpl");
|
Tablets, touch screens, keyboards, mouses
|
273db8f03509619cd570a4b1225b399f8fb4b0b7
|
thomas bogendoerfer
|
drivers
|
input
|
serio
|
input: ili210x - add ili2120 support
|
this adds support for the ilitek ili2120 touchscreen found in the fairphone 2 smartphone.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
ili210x - add ili2120 support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['c', 'txt']
| 2
| 34
| 1
|
--- diff --git a/documentation/devicetree/bindings/input/ilitek,ili2xxx.txt b/documentation/devicetree/bindings/input/ilitek,ili2xxx.txt --- a/documentation/devicetree/bindings/input/ilitek,ili2xxx.txt +++ b/documentation/devicetree/bindings/input/ilitek,ili2xxx.txt -ilitek ili210x/ili2117/ili251x touchscreen controller +ilitek ili210x/ili2117/ili2120/ili251x touchscreen controller - compatible: + ilitek,ili2120 for ili2120 - reg: the i2c address of the device diff --git a/drivers/input/touchscreen/ili210x.c b/drivers/input/touchscreen/ili210x.c --- a/drivers/input/touchscreen/ili210x.c +++ b/drivers/input/touchscreen/ili210x.c +static bool ili212x_touchdata_to_coords(const u8 *touchdata, + unsigned int finger, + unsigned int *x, unsigned int *y) +{ + u16 val; + + val = get_unaligned_be16(touchdata + 3 + (finger * 5) + 0); + if (!(val & bit(15))) /* touch indication */ + return false; + + *x = val & 0x3fff; + *y = get_unaligned_be16(touchdata + 3 + (finger * 5) + 2); + + return true; +} + +static bool ili212x_check_continue_polling(const u8 *data, bool touch) +{ + return touch; +} + +static const struct ili2xxx_chip ili212x_chip = { + .read_reg = ili210x_read_reg, + .get_touch_data = ili210x_read_touch_data, + .parse_touch_data = ili212x_touchdata_to_coords, + .continue_polling = ili212x_check_continue_polling, + .max_touches = 10, + .has_calibrate_reg = true, +}; + + { "ili2120", (long)&ili212x_chip }, + { .compatible = "ilitek,ili2120", .data = &ili212x_chip },
|
Tablets, touch screens, keyboards, mouses
|
d0c5e7d4f5e5b76eeb53d098157d5b1f62ebb407
|
luca weiss
|
drivers
|
input
|
bindings, input, touchscreen
|
hid: hidraw: add support uniq ioctl
|
add support for reading out the uniq information from the underlying hid device. this might be the iserialnumber in case of usb or the bd_addr in case of bluetooth.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add support uniq ioctl
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['hid ', 'hidraw']
|
['c', 'h']
| 2
| 10
| 0
|
--- diff --git a/drivers/hid/hidraw.c b/drivers/hid/hidraw.c --- a/drivers/hid/hidraw.c +++ b/drivers/hid/hidraw.c -efault : len; + + if (_ioc_nr(cmd) == _ioc_nr(hidiocgrawuniq(0))) { + int len = strlen(hid->uniq) + 1; + if (len > _ioc_size(cmd)) + len = _ioc_size(cmd); + ret = copy_to_user(user_arg, hid->uniq, len) ? + -efault : len; + break; + } diff --git a/include/uapi/linux/hidraw.h b/include/uapi/linux/hidraw.h --- a/include/uapi/linux/hidraw.h +++ b/include/uapi/linux/hidraw.h +#define hidiocgrawuniq(len) _ioc(_ioc_read, 'h', 0x08, len)
|
Tablets, touch screens, keyboards, mouses
|
2f48865db3322f8e74f51ff93b91e5c2916dd259
|
marcel holtmann
|
drivers
|
hid
|
linux
|
hid: logitech-hidpp: support translations from short to long reports
|
this patch allows short reports to be translated into long reports.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
logitech hid++ bluetooth le support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['hid ']
|
['c']
| 1
| 24
| 6
|
--- diff --git a/drivers/hid/hid-logitech-hidpp.c b/drivers/hid/hid-logitech-hidpp.c --- a/drivers/hid/hid-logitech-hidpp.c +++ b/drivers/hid/hid-logitech-hidpp.c +#define hidpp_report_short_supported bit(0) +#define hidpp_report_long_supported bit(1) +#define hidpp_report_very_long_supported bit(2) + + u8 supported_reports; + /* send as long report if short reports are not supported. */ + if (report_id == report_id_hidpp_short && + !(hidpp_dev->supported_reports & hidpp_report_short_supported)) + report_id = report_id_hidpp_long; + -static bool hidpp_validate_device(struct hid_device *hdev) +static u8 hidpp_validate_device(struct hid_device *hdev) - int id, report_length, supported_reports = 0; + int id, report_length; + u8 supported_reports = 0; - supported_reports++; + supported_reports |= hidpp_report_short_supported; - supported_reports++; + supported_reports |= hidpp_report_long_supported; - supported_reports++; + supported_reports |= hidpp_report_very_long_supported; - if (!hidpp_validate_device(hdev)) { + hidpp->supported_reports = hidpp_validate_device(hdev); + + if (!hidpp->supported_reports) { + { /* mx master mouse over bluetooth */ + hid_bluetooth_device(usb_vendor_id_logitech, 0xb012), + .driver_data = hidpp_quirk_hi_res_scroll_x2121 }, + { hid_bluetooth_device(usb_vendor_id_logitech, 0xb01e), + .driver_data = hidpp_quirk_hi_res_scroll_x2121 },
|
Tablets, touch screens, keyboards, mouses
|
c2a932717a5106db97f3480b040b8f74a1761889
|
mazin rezk
|
drivers
|
hid
| |
hid: logitech-hidpp: support wirelessdevicestatus connect events
|
this patch allows hidpp_report_is_connect_event to support wirelessdevicestatus connect events.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
logitech hid++ bluetooth le support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['hid ']
|
['c']
| 1
| 35
| 4
|
--- diff --git a/drivers/hid/hid-logitech-hidpp.c b/drivers/hid/hid-logitech-hidpp.c --- a/drivers/hid/hid-logitech-hidpp.c +++ b/drivers/hid/hid-logitech-hidpp.c + + u8 wireless_feature_index; -static inline bool hidpp_report_is_connect_event(struct hidpp_report *report) +static inline bool hidpp_report_is_connect_event(struct hidpp_device *hidpp, + struct hidpp_report *report) - return (report->report_id == report_id_hidpp_short) && - (report->rap.sub_id == 0x41); + return (hidpp->wireless_feature_index && + (report->fap.feature_index == hidpp->wireless_feature_index)) || + ((report->report_id == report_id_hidpp_short) && + (report->rap.sub_id == 0x41)); +/* -------------------------------------------------------------------------- */ +/* 0x1d4b: wireless device status */ +/* -------------------------------------------------------------------------- */ +#define hidpp_page_wireless_device_status 0x1d4b + +static int hidpp_set_wireless_feature_index(struct hidpp_device *hidpp) +{ + u8 feature_type; + int ret; + + ret = hidpp_root_get_feature(hidpp, + hidpp_page_wireless_device_status, + &hidpp->wireless_feature_index, + &feature_type); + + return ret; +} + - if (unlikely(hidpp_report_is_connect_event(report))) { + if (unlikely(hidpp_report_is_connect_event(hidpp, report))) { + if (connected && hidpp->protocol_major >= 2) { + ret = hidpp_set_wireless_feature_index(hidpp); + if (ret == -enoent) + hidpp->wireless_feature_index = 0; + else if (ret) + goto hid_hw_init_fail; + } +
|
Tablets, touch screens, keyboards, mouses
|
0da0a63b7cbabe9d930015e94e890c82cab7b3d3
|
mazin rezk
|
drivers
|
hid
| |
hid-logitech-hidpp: read battery voltage from newer devices
|
newer logitech mice report their battery voltage through feature 0x1001 instead of the battery levels through feature 0x1000.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
read battery voltage from newer devices
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['hid ', 'logitech-hidpp']
|
['c']
| 1
| 168
| 4
|
--- diff --git a/drivers/hid/hid-logitech-hidpp.c b/drivers/hid/hid-logitech-hidpp.c --- a/drivers/hid/hid-logitech-hidpp.c +++ b/drivers/hid/hid-logitech-hidpp.c +#define hidpp_capability_battery_voltage bit(4) + u8 voltage_feature_index; + int voltage; + int charge_type; +/* -------------------------------------------------------------------------- */ +/* 0x1001: battery voltage */ +/* -------------------------------------------------------------------------- */ + +#define hidpp_page_battery_voltage 0x1001 + +#define cmd_battery_voltage_get_battery_voltage 0x00 + +#define event_battery_voltage_status_broadcast 0x00 + +static int hidpp20_battery_map_status_voltage(u8 data[3], int *voltage, + int *level, int *charge_type) +{ + int status; + + long charge_sts = (long)data[2]; + + *level = power_supply_capacity_level_unknown; + switch (data[2] & 0xe0) { + case 0x00: + status = power_supply_status_charging; + break; + case 0x20: + status = power_supply_status_full; + *level = power_supply_capacity_level_full; + break; + case 0x40: + status = power_supply_status_discharging; + break; + case 0xe0: + status = power_supply_status_not_charging; + break; + default: + status = power_supply_status_unknown; + } + + *charge_type = power_supply_charge_type_standard; + if (test_bit(3, &charge_sts)) { + *charge_type = power_supply_charge_type_fast; + } + if (test_bit(4, &charge_sts)) { + *charge_type = power_supply_charge_type_trickle; + } + + if (test_bit(5, &charge_sts)) { + *level = power_supply_capacity_level_critical; + } + + *voltage = get_unaligned_be16(data); + + return status; +} + +static int hidpp20_battery_get_battery_voltage(struct hidpp_device *hidpp, + u8 feature_index, + int *status, int *voltage, + int *level, int *charge_type) +{ + struct hidpp_report response; + int ret; + u8 *params = (u8 *)response.fap.params; + + ret = hidpp_send_fap_command_sync(hidpp, feature_index, + cmd_battery_voltage_get_battery_voltage, + null, 0, &response); + + if (ret > 0) { + hid_err(hidpp->hid_dev, "%s: received protocol error 0x%02x ", + __func__, ret); + return -eproto; + } + if (ret) + return ret; + + hidpp->capabilities |= hidpp_capability_battery_voltage; + + *status = hidpp20_battery_map_status_voltage(params, voltage, + level, charge_type); + + return 0; +} + +static int hidpp20_query_battery_voltage_info(struct hidpp_device *hidpp) +{ + u8 feature_type; + int ret; + int status, voltage, level, charge_type; + + if (hidpp->battery.voltage_feature_index == 0xff) { + ret = hidpp_root_get_feature(hidpp, hidpp_page_battery_voltage, + &hidpp->battery.voltage_feature_index, + &feature_type); + if (ret) + return ret; + } + + ret = hidpp20_battery_get_battery_voltage(hidpp, + hidpp->battery.voltage_feature_index, + &status, &voltage, &level, &charge_type); + + if (ret) + return ret; + + hidpp->battery.status = status; + hidpp->battery.voltage = voltage; + hidpp->battery.level = level; + hidpp->battery.charge_type = charge_type; + hidpp->battery.online = status != power_supply_status_not_charging; + + return 0; +} + +static int hidpp20_battery_voltage_event(struct hidpp_device *hidpp, + u8 *data, int size) +{ + struct hidpp_report *report = (struct hidpp_report *)data; + int status, voltage, level, charge_type; + + if (report->fap.feature_index != hidpp->battery.voltage_feature_index || + report->fap.funcindex_clientid != event_battery_voltage_status_broadcast) + return 0; + + status = hidpp20_battery_map_status_voltage(report->fap.params, &voltage, + &level, &charge_type); + + hidpp->battery.online = status != power_supply_status_not_charging; + + if (voltage != hidpp->battery.voltage || status != hidpp->battery.status) { + hidpp->battery.voltage = voltage; + hidpp->battery.status = status; + hidpp->battery.level = level; + hidpp->battery.charge_type = charge_type; + if (hidpp->battery.ps) + power_supply_changed(hidpp->battery.ps); + } + return 0; +} + + 0, /* placeholder for power_supply_prop_voltage_now, */ + case power_supply_prop_voltage_now: + /* hardware reports voltage in in mv. sysfs expects uv */ + val->intval = hidpp->battery.voltage * 1000; + break; + case power_supply_prop_charge_type: + val->intval = hidpp->battery.charge_type; + break; + ret = hidpp20_battery_voltage_event(hidpp, data, size); + if (ret != 0) + return ret; + hidpp->battery.voltage_feature_index = 0xff; - else - ret = hidpp20_query_battery_info(hidpp); + else { + ret = hidpp20_query_battery_voltage_info(hidpp); + if (ret) + ret = hidpp20_query_battery_info(hidpp); + } - num_battery_props = array_size(hidpp_battery_props) - 2; + num_battery_props = array_size(hidpp_battery_props) - 3; + if (hidpp->capabilities & hidpp_capability_battery_voltage) + battery_props[num_battery_props++] = + power_supply_prop_voltage_now; + - hidpp20_query_battery_info(hidpp); + if (hidpp->capabilities & hidpp_capability_battery_voltage) + hidpp20_query_battery_voltage_info(hidpp); + else + hidpp20_query_battery_info(hidpp);
|
Tablets, touch screens, keyboards, mouses
|
be281368f29797cf4b318ad890673ce96bb9251e
|
pedro vanzella
|
drivers
|
hid
| |
hid: logitech: add mx master 3 mouse
|
this patch adds support for the logitech mx master 3 mouse using the logitech unifying receiver and bluetooth le.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add mx master 3 mouse
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['hid ', 'logitech']
|
['c']
| 1
| 5
| 0
|
--- diff --git a/drivers/hid/hid-logitech-hidpp.c b/drivers/hid/hid-logitech-hidpp.c --- a/drivers/hid/hid-logitech-hidpp.c +++ b/drivers/hid/hid-logitech-hidpp.c + { /* mouse logitech mx master 3 */ + ldj_device(0x4082), .driver_data = hidpp_quirk_hi_res_scroll_x2121 }, + { /* mx master 3 mouse over bluetooth */ + hid_bluetooth_device(usb_vendor_id_logitech, 0xb023), + .driver_data = hidpp_quirk_hi_res_scroll_x2121 },
|
Tablets, touch screens, keyboards, mouses
|
04bd68171e01843284accbcfaa4cd2c50d1707ed
|
adrian freund
|
drivers
|
hid
| |
hid: apple: add support for recent firmware on magic keyboards
|
magic keyboards with more recent firmware (0x0100) report fn key differently. without this patch, fn key may not behave as expected and may not be configurable via hid_apple fnmode module parameter.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add support for recent firmware on magic keyboards
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['hid ', 'apple']
|
['c']
| 1
| 2
| 1
|
--- diff --git a/drivers/hid/hid-apple.c b/drivers/hid/hid-apple.c --- a/drivers/hid/hid-apple.c +++ b/drivers/hid/hid-apple.c - usage->hid == (hid_up_msvendor | 0x0003)) { + usage->hid == (hid_up_msvendor | 0x0003) || + usage->hid == (hid_up_hpvendor2 | 0x0003)) {
|
Tablets, touch screens, keyboards, mouses
|
e433be929e63265b7412478eb7ff271467aee2d7
|
mansour behabadi
|
drivers
|
hid
| |
hid: google: add moonball usb id
|
add 1 additional hammer-like device.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add moonball usb id
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['hid ', 'google']
|
['c', 'h']
| 2
| 3
| 0
|
--- diff --git a/drivers/hid/hid-google-hammer.c b/drivers/hid/hid-google-hammer.c --- a/drivers/hid/hid-google-hammer.c +++ b/drivers/hid/hid-google-hammer.c + { hid_device(bus_usb, hid_group_generic, + usb_vendor_id_google, usb_device_id_google_moonball) }, diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h --- a/drivers/hid/hid-ids.h +++ b/drivers/hid/hid-ids.h +#define usb_device_id_google_moonball 0x5044
|
Tablets, touch screens, keyboards, mouses
|
58322a1590fc189a8e1e349d309637d4a4942840
|
chen tsung hsieh nicolas boichat drinkcat chromium org
|
drivers
|
hid
| |
media: atmel: atmel-isc-base: add support for y10 format
|
the isc can receive input from sensors using y10 format directly (10 bits greyscale). in this case, the isc must dump the data directly, either as grey (8bit) or y10 (10bit). y16 is not supported because we cannot align the msb 10 bits to the msb inside the 16bit container. for this format, the isc internal pipeline cannot work (only works with bayer), so we must dump the data directly as 8bit/10bit.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add support for y10 format
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['atmel', 'atmel-isc-base']
|
['c']
| 1
| 29
| 6
|
--- diff --git a/drivers/media/platform/atmel/atmel-isc-base.c b/drivers/media/platform/atmel/atmel-isc-base.c --- a/drivers/media/platform/atmel/atmel-isc-base.c +++ b/drivers/media/platform/atmel/atmel-isc-base.c + { + .fourcc = v4l2_pix_fmt_y10, + }, + { + .fourcc = v4l2_pix_fmt_y10, + .mbus_code = media_bus_fmt_y10_1x10, + .pfe_cfg0_bps = isc_pfg_cfg0_bps_ten, + }, + +#define isc_is_format_grey(mbus_code) \ + (((mbus_code) == media_bus_fmt_y10_1x10) | \ + (((mbus_code) == media_bus_fmt_y8_1x8))) + + case v4l2_pix_fmt_y10: - - /* we cannot output raw/grey if we do not receive raw */ - if ((bayer || grey) && - !isc_is_format_raw(isc->try_config.sd_format->mbus_code)) - return -einval; - + /* we cannot output raw if we do not receive raw */ + if ((bayer) && !isc_is_format_raw(isc->try_config.sd_format->mbus_code)) + return -einval; + + /* we cannot output grey if we do not receive raw/grey */ + if (grey && !isc_is_format_raw(isc->try_config.sd_format->mbus_code) && + !isc_is_format_grey(isc->try_config.sd_format->mbus_code)) + return -einval; + + case v4l2_pix_fmt_y10: + isc->try_config.rlp_cfg_mode = isc_rlp_cfg_mode_daty10; + isc->try_config.dcfg_imode = isc_dcfg_imode_packed16; + isc->try_config.dctrl_dview = isc_dctrl_dview_packed; + isc->try_config.bpp = 16; + break;
|
TV tuners, webcams, video capturers
|
ab04e7e6436ed10bb075e6d78f7e7bf841a6fbdc
|
eugen hristev
|
drivers
|
media
|
atmel, platform
|
media: atmel: atmel-isi: add support for mono sensors, gray and y16
|
this adds support for grey and y16 formats, based on y10 mbus codes. y16 needs to go through preview path in the isi, with 2 pixels per word, and it fits the y16 format. the isi data lines need to be msb aligned with the sensor data lines. grey format in 8 bits per pixel is done by dropping the 2 lsb bits from the y10 format, and packed as 4 pixels per word.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add support for mono sensors, gray and y16
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['atmel', 'atmel-isi']
|
['c', 'h']
| 2
| 14
| 1
|
--- diff --git a/drivers/media/platform/atmel/atmel-isi.c b/drivers/media/platform/atmel/atmel-isi.c --- a/drivers/media/platform/atmel/atmel-isi.c +++ b/drivers/media/platform/atmel/atmel-isi.c - fourcc == v4l2_pix_fmt_rgb32; + fourcc == v4l2_pix_fmt_rgb32 || + fourcc == v4l2_pix_fmt_y16; + }, { + .fourcc = v4l2_pix_fmt_grey, + .mbus_code = media_bus_fmt_y10_1x10, + .bpp = 1, + .swap = isi_cfg2_gs_mode_2_pixel | isi_cfg2_grayscale, + }, { + .fourcc = v4l2_pix_fmt_y16, + .mbus_code = media_bus_fmt_y10_1x10, + .bpp = 2, + .swap = isi_cfg2_gs_mode_2_pixel | isi_cfg2_grayscale, diff --git a/drivers/media/platform/atmel/atmel-isi.h b/drivers/media/platform/atmel/atmel-isi.h --- a/drivers/media/platform/atmel/atmel-isi.h +++ b/drivers/media/platform/atmel/atmel-isi.h +#define isi_cfg2_gs_mode_2_pixel (0 << 11) +#define isi_cfg2_gs_mode_1_pixel (1 << 11)
|
TV tuners, webcams, video capturers
|
b567bf86eeba8d227d45a083a6cf139df05b9eb7
|
eugen hristev wenyou yang wenyou yang microchip com
|
drivers
|
media
|
atmel, platform
|
media: coda: jpeg: add coda960 jpeg encoder support
|
this patch adds jpeg encoding support for coda960, handling the jpeg hardware directly. a separate jpeg encoder video device is created due to the separate hardware unit and different supported pixel formats. while the hardware can not change subsampling on the fly, it can encode 4:2:2 subsampled images into jpegs of the same subsampling.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add coda960 jpeg encoder support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['coda', 'jpeg']
|
['c', 'h']
| 4
| 756
| 2
|
--- diff --git a/drivers/media/platform/coda/coda-common.c b/drivers/media/platform/coda/coda-common.c --- a/drivers/media/platform/coda/coda-common.c +++ b/drivers/media/platform/coda/coda-common.c + coda_codec(coda9_mode_encode_mjpg, v4l2_pix_fmt_yuv420, v4l2_pix_fmt_jpeg, 8192, 8192), +static const struct coda_video_device coda9_jpeg_encoder = { + .name = "coda-jpeg-encoder", + .type = coda_inst_encoder, + .ops = &coda9_jpeg_encode_ops, + .direct = true, + .src_formats = { + v4l2_pix_fmt_nv12, + v4l2_pix_fmt_yuv420, + v4l2_pix_fmt_yvu420, + v4l2_pix_fmt_yuv422p, + }, + .dst_formats = { + v4l2_pix_fmt_jpeg, + }, +}; + + &coda9_jpeg_encoder, - if (!disable_tiling && ctx->dev->devtype->product == coda_960) { + if (!disable_tiling && ctx->use_bit && + ctx->dev->devtype->product == coda_960) { - if (ctx->inst_type == coda_inst_encoder && + if ((ctx->inst_type == coda_inst_encoder || !ctx->use_bit) && + /* jpeg irq */ + if (dev->devtype->product == coda_960) { + irq = platform_get_irq_byname(pdev, "jpeg"); + if (irq < 0) + return irq; + + ret = devm_request_threaded_irq(&pdev->dev, irq, null, + coda9_jpeg_irq_handler, + irqf_oneshot, coda_name " jpeg", + dev); + if (ret < 0) { + dev_err(&pdev->dev, "failed to request jpeg irq "); + return ret; + } + } + diff --git a/drivers/media/platform/coda/coda-jpeg.c b/drivers/media/platform/coda/coda-jpeg.c --- a/drivers/media/platform/coda/coda-jpeg.c +++ b/drivers/media/platform/coda/coda-jpeg.c +#include <asm/unaligned.h> +#include <linux/irqreturn.h> +#include <linux/ktime.h> +#include <linux/slab.h> +#include <linux/videodev2.h> + +#include <media/v4l2-common.h> +#include <media/v4l2-fh.h> +#include <media/v4l2-mem2mem.h> +#include <media/videobuf2-core.h> +#include <media/videobuf2-dma-contig.h> +#define dri_marker 0xffdd +#define dqt_marker 0xffdb +#define dht_marker 0xffc4 +#define sof_marker 0xffc0 +enum { + coda9_jpeg_format_420, + coda9_jpeg_format_422, + coda9_jpeg_format_224, + coda9_jpeg_format_444, + coda9_jpeg_format_400, +}; + +#define coda9_jpeg_enc_huff_data_size (256 + 256 + 16 + 16) + +static const unsigned char width_align[] = { + [coda9_jpeg_format_420] = 16, + [coda9_jpeg_format_422] = 16, + [coda9_jpeg_format_224] = 8, + [coda9_jpeg_format_444] = 8, + [coda9_jpeg_format_400] = 8, +}; + +static const unsigned char height_align[] = { + [coda9_jpeg_format_420] = 16, + [coda9_jpeg_format_422] = 8, + [coda9_jpeg_format_224] = 16, + [coda9_jpeg_format_444] = 8, + [coda9_jpeg_format_400] = 8, +}; + +static int coda9_jpeg_chroma_format(u32 pixfmt) +{ + switch (pixfmt) { + case v4l2_pix_fmt_yuv420: + case v4l2_pix_fmt_nv12: + return coda9_jpeg_format_420; + case v4l2_pix_fmt_yuv422p: + return coda9_jpeg_format_422; + case v4l2_pix_fmt_yuv444: + return coda9_jpeg_format_444; + case v4l2_pix_fmt_grey: + return coda9_jpeg_format_400; + } + return -einval; +} + +static const int bus_req_num[] = { + [coda9_jpeg_format_420] = 2, + [coda9_jpeg_format_422] = 3, + [coda9_jpeg_format_224] = 3, + [coda9_jpeg_format_444] = 4, + [coda9_jpeg_format_400] = 4, +}; + +#define mcu_info(mcu_block_num, comp_num, comp0_info, comp1_info, comp2_info) \ + (((mcu_block_num) << coda9_jpeg_mcu_block_num_offset) | \ + ((comp_num) << coda9_jpeg_comp_num_offset) | \ + ((comp0_info) << coda9_jpeg_comp0_info_offset) | \ + ((comp1_info) << coda9_jpeg_comp1_info_offset) | \ + ((comp2_info) << coda9_jpeg_comp2_info_offset)) + +static const u32 mcu_info[] = { + [coda9_jpeg_format_420] = mcu_info(6, 3, 10, 5, 5), + [coda9_jpeg_format_422] = mcu_info(4, 3, 9, 5, 5), + [coda9_jpeg_format_224] = mcu_info(4, 3, 6, 5, 5), + [coda9_jpeg_format_444] = mcu_info(3, 3, 5, 5, 5), + [coda9_jpeg_format_400] = mcu_info(1, 1, 5, 0, 0), +}; + +/* + * convert huffman table specifcations to tables of codes and code lengths. + * for reference, see jpeg itu-t.81 (iso/iec 10918-1) [1] + * + * [1] https://www.w3.org/graphics/jpeg/itu-t81.pdf + */ +static int coda9_jpeg_gen_enc_huff_tab(struct coda_ctx *ctx, int tab_num, + int *ehufsi, int *ehufco) +{ + int i, j, k, lastk, si, code, maxsymbol; + const u8 *bits, *huffval; + struct { + int size[256]; + int code[256]; + } *huff; + static const unsigned char *huff_tabs[4] = { + luma_dc, luma_ac, chroma_dc, chroma_ac, + }; + int ret = -einval; + + huff = kzalloc(sizeof(*huff), gfp_kernel); + if (!huff) + return -enomem; + + bits = huff_tabs[tab_num]; + huffval = huff_tabs[tab_num] + 16; + + maxsymbol = tab_num & 1 ? 256 : 16; + + /* figure c.1 - generation of table of huffman code sizes */ + k = 0; + for (i = 1; i <= 16; i++) { + j = bits[i - 1]; + if (k + j > maxsymbol) + goto out; + while (j--) + huff->size[k++] = i; + } + lastk = k; + + /* figure c.2 - generation of table of huffman codes */ + k = 0; + code = 0; + si = huff->size[0]; + while (k < lastk) { + while (huff->size[k] == si) { + huff->code[k++] = code; + code++; + } + if (code >= (1 << si)) + goto out; + code <<= 1; + si++; + } + + /* figure c.3 - ordering procedure for encoding procedure code tables */ + for (k = 0; k < lastk; k++) { + i = huffval[k]; + if (i >= maxsymbol || ehufsi[i]) + goto out; + ehufco[i] = huff->code[k]; + ehufsi[i] = huff->size[k]; + } + + ret = 0; +out: + kfree(huff); + return ret; +} + +#define dc_table_index0 0 +#define ac_table_index0 1 +#define dc_table_index1 2 +#define ac_table_index1 3 + +static int coda9_jpeg_load_huff_tab(struct coda_ctx *ctx) +{ + struct { + int size[4][256]; + int code[4][256]; + } *huff; + u32 *huff_data; + int i, j; + int ret; + + huff = kzalloc(sizeof(*huff), gfp_kernel); + if (!huff) + return -enomem; + + /* generate all four (luma/chroma dc/ac) code/size lookup tables */ + for (i = 0; i < 4; i++) { + ret = coda9_jpeg_gen_enc_huff_tab(ctx, i, huff->size[i], + huff->code[i]); + if (ret) + goto out; + } + + if (!ctx->params.jpeg_huff_data) { + ctx->params.jpeg_huff_data = + kzalloc(sizeof(u32) * coda9_jpeg_enc_huff_data_size, + gfp_kernel); + if (!ctx->params.jpeg_huff_data) { + ret = -enomem; + goto out; + } + } + huff_data = ctx->params.jpeg_huff_data; + + for (j = 0; j < 4; j++) { + /* store huffman lookup tables in ac0, ac1, dc0, dc1 order */ + int t = (j == 0) ? ac_table_index0 : + (j == 1) ? ac_table_index1 : + (j == 2) ? dc_table_index0 : + dc_table_index1; + /* dc tables only have 16 entries */ + int len = (j < 2) ? 256 : 16; + + for (i = 0; i < len; i++) { + if (huff->size[t][i] == 0 && huff->code[t][i] == 0) + *(huff_data++) = 0; + else + *(huff_data++) = + ((huff->size[t][i] - 1) << 16) | + huff->code[t][i]; + } + } + + ret = 0; +out: + kfree(huff); + return ret; +} + +static void coda9_jpeg_write_huff_tab(struct coda_ctx *ctx) +{ + struct coda_dev *dev = ctx->dev; + u32 *huff_data = ctx->params.jpeg_huff_data; + int i; + + /* write huffman size/code lookup tables in ac0, ac1, dc0, dc1 order */ + coda_write(dev, 0x3, coda9_reg_jpeg_huff_ctrl); + for (i = 0; i < coda9_jpeg_enc_huff_data_size; i++) + coda_write(dev, *(huff_data++), coda9_reg_jpeg_huff_data); + coda_write(dev, 0x0, coda9_reg_jpeg_huff_ctrl); +} + +static inline void coda9_jpeg_write_qmat_quotients(struct coda_dev *dev, + u8 *qmat, int index) +{ + int i; + + coda_write(dev, index | 0x3, coda9_reg_jpeg_qmat_ctrl); + for (i = 0; i < 64; i++) + coda_write(dev, 0x80000 / qmat[i], coda9_reg_jpeg_qmat_data); + coda_write(dev, index, coda9_reg_jpeg_qmat_ctrl); +} + +static void coda9_jpeg_load_qmat_tab(struct coda_ctx *ctx) +{ + struct coda_dev *dev = ctx->dev; + u8 *luma_tab; + u8 *chroma_tab; + + luma_tab = ctx->params.jpeg_qmat_tab[0]; + if (!luma_tab) + luma_tab = luma_q; + + chroma_tab = ctx->params.jpeg_qmat_tab[1]; + if (!chroma_tab) + chroma_tab = chroma_q; + + coda9_jpeg_write_qmat_quotients(dev, luma_tab, 0x00); + coda9_jpeg_write_qmat_quotients(dev, chroma_tab, 0x40); + coda9_jpeg_write_qmat_quotients(dev, chroma_tab, 0x80); +} + +struct coda_jpeg_stream { + u8 *curr; + u8 *end; +}; + +static inline int coda_jpeg_put_byte(u8 byte, struct coda_jpeg_stream *stream) +{ + if (stream->curr >= stream->end) + return -einval; + + *stream->curr++ = byte; + + return 0; +} + +static inline int coda_jpeg_put_word(u16 word, struct coda_jpeg_stream *stream) +{ + if (stream->curr + sizeof(__be16) > stream->end) + return -einval; + + put_unaligned_be16(word, stream->curr); + stream->curr += sizeof(__be16); + + return 0; +} + +static int coda_jpeg_put_table(u16 marker, u8 index, const u8 *table, + size_t len, struct coda_jpeg_stream *stream) +{ + int i, ret; + + ret = coda_jpeg_put_word(marker, stream); + if (ret < 0) + return ret; + ret = coda_jpeg_put_word(3 + len, stream); + if (ret < 0) + return ret; + ret = coda_jpeg_put_byte(index, stream); + for (i = 0; i < len && ret == 0; i++) + ret = coda_jpeg_put_byte(table[i], stream); + + return ret; +} + +static int coda_jpeg_define_quantization_table(struct coda_ctx *ctx, u8 index, + struct coda_jpeg_stream *stream) +{ + return coda_jpeg_put_table(dqt_marker, index, + ctx->params.jpeg_qmat_tab[index], 64, + stream); +} + +static int coda_jpeg_define_huffman_table(u8 index, const u8 *table, size_t len, + struct coda_jpeg_stream *stream) +{ + return coda_jpeg_put_table(dht_marker, index, table, len, stream); +} + +static int coda9_jpeg_encode_header(struct coda_ctx *ctx, int len, u8 *buf) +{ + struct coda_jpeg_stream stream = { buf, buf + len }; + struct coda_q_data *q_data_src; + int chroma_format, comp_num; + int i, ret, pad; + + q_data_src = get_q_data(ctx, v4l2_buf_type_video_output); + chroma_format = coda9_jpeg_chroma_format(q_data_src->fourcc); + if (chroma_format < 0) + return 0; + + /* start of image */ + ret = coda_jpeg_put_word(soi_marker, &stream); + if (ret < 0) + return ret; + + /* define restart interval */ + if (ctx->params.jpeg_restart_interval) { + ret = coda_jpeg_put_word(dri_marker, &stream); + if (ret < 0) + return ret; + ret = coda_jpeg_put_word(4, &stream); + if (ret < 0) + return ret; + ret = coda_jpeg_put_word(ctx->params.jpeg_restart_interval, + &stream); + if (ret < 0) + return ret; + } + + /* define quantization tables */ + ret = coda_jpeg_define_quantization_table(ctx, 0x00, &stream); + if (ret < 0) + return ret; + if (chroma_format != coda9_jpeg_format_400) { + ret = coda_jpeg_define_quantization_table(ctx, 0x01, &stream); + if (ret < 0) + return ret; + } + + /* define huffman tables */ + ret = coda_jpeg_define_huffman_table(0x00, luma_dc, 16 + 12, &stream); + if (ret < 0) + return ret; + ret = coda_jpeg_define_huffman_table(0x10, luma_ac, 16 + 162, &stream); + if (ret < 0) + return ret; + if (chroma_format != coda9_jpeg_format_400) { + ret = coda_jpeg_define_huffman_table(0x01, chroma_dc, 16 + 12, + &stream); + if (ret < 0) + return ret; + ret = coda_jpeg_define_huffman_table(0x11, chroma_ac, 16 + 162, + &stream); + if (ret < 0) + return ret; + } + + /* start of frame */ + ret = coda_jpeg_put_word(sof_marker, &stream); + if (ret < 0) + return ret; + comp_num = (chroma_format == coda9_jpeg_format_400) ? 1 : 3; + ret = coda_jpeg_put_word(8 + comp_num * 3, &stream); + if (ret < 0) + return ret; + ret = coda_jpeg_put_byte(0x08, &stream); + if (ret < 0) + return ret; + ret = coda_jpeg_put_word(q_data_src->height, &stream); + if (ret < 0) + return ret; + ret = coda_jpeg_put_word(q_data_src->width, &stream); + if (ret < 0) + return ret; + ret = coda_jpeg_put_byte(comp_num, &stream); + if (ret < 0) + return ret; + for (i = 0; i < comp_num; i++) { + static unsigned char subsampling[5][3] = { + [coda9_jpeg_format_420] = { 0x22, 0x11, 0x11 }, + [coda9_jpeg_format_422] = { 0x21, 0x11, 0x11 }, + [coda9_jpeg_format_224] = { 0x12, 0x11, 0x11 }, + [coda9_jpeg_format_444] = { 0x11, 0x11, 0x11 }, + [coda9_jpeg_format_400] = { 0x11 }, + }; + + /* component identifier, matches sos */ + ret = coda_jpeg_put_byte(i + 1, &stream); + if (ret < 0) + return ret; + ret = coda_jpeg_put_byte(subsampling[chroma_format][i], + &stream); + if (ret < 0) + return ret; + /* chroma table index */ + ret = coda_jpeg_put_byte((i == 0) ? 0 : 1, &stream); + if (ret < 0) + return ret; + } + + /* pad to multiple of 8 bytes */ + pad = (stream.curr - buf) % 8; + if (pad) { + pad = 8 - pad; + while (pad--) { + ret = coda_jpeg_put_byte(0x00, &stream); + if (ret < 0) + return ret; + } + } + + return stream.curr - buf; +} + + +/* + * encoder context operations + */ + +static int coda9_jpeg_start_encoding(struct coda_ctx *ctx) +{ + struct coda_dev *dev = ctx->dev; + int ret; + + ret = coda9_jpeg_load_huff_tab(ctx); + if (ret < 0) { + v4l2_err(&dev->v4l2_dev, "error loading huffman tables "); + return ret; + } + if (!ctx->params.jpeg_qmat_tab[0]) + ctx->params.jpeg_qmat_tab[0] = kmalloc(64, gfp_kernel); + if (!ctx->params.jpeg_qmat_tab[1]) + ctx->params.jpeg_qmat_tab[1] = kmalloc(64, gfp_kernel); + coda_set_jpeg_compression_quality(ctx, ctx->params.jpeg_quality); + + return 0; +} + +static int coda9_jpeg_prepare_encode(struct coda_ctx *ctx) +{ + struct coda_q_data *q_data_src; + struct vb2_v4l2_buffer *src_buf, *dst_buf; + struct coda_dev *dev = ctx->dev; + u32 start_addr, end_addr; + u16 aligned_width, aligned_height; + bool chroma_interleave; + int chroma_format; + int header_len; + int ret; + ktime_t timeout; + + src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); + dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); + q_data_src = get_q_data(ctx, v4l2_buf_type_video_output); + + if (vb2_get_plane_payload(&src_buf->vb2_buf, 0) == 0) + vb2_set_plane_payload(&src_buf->vb2_buf, 0, + vb2_plane_size(&src_buf->vb2_buf, 0)); + + src_buf->sequence = ctx->osequence; + dst_buf->sequence = ctx->osequence; + ctx->osequence++; + + src_buf->flags |= v4l2_buf_flag_keyframe; + src_buf->flags &= ~v4l2_buf_flag_pframe; + + coda_set_gdi_regs(ctx); + + start_addr = vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0); + end_addr = start_addr + vb2_plane_size(&dst_buf->vb2_buf, 0); + + chroma_format = coda9_jpeg_chroma_format(q_data_src->fourcc); + if (chroma_format < 0) + return chroma_format; + + /* round image dimensions to multiple of mcu size */ + aligned_width = round_up(q_data_src->width, width_align[chroma_format]); + aligned_height = round_up(q_data_src->height, + height_align[chroma_format]); + if (aligned_width != q_data_src->bytesperline) { + v4l2_err(&dev->v4l2_dev, "wrong stride: %d instead of %d ", + aligned_width, q_data_src->bytesperline); + } + + header_len = + coda9_jpeg_encode_header(ctx, + vb2_plane_size(&dst_buf->vb2_buf, 0), + vb2_plane_vaddr(&dst_buf->vb2_buf, 0)); + if (header_len < 0) + return header_len; + + coda_write(dev, start_addr + header_len, coda9_reg_jpeg_bbc_bas_addr); + coda_write(dev, end_addr, coda9_reg_jpeg_bbc_end_addr); + coda_write(dev, start_addr + header_len, coda9_reg_jpeg_bbc_wr_ptr); + coda_write(dev, start_addr + header_len, coda9_reg_jpeg_bbc_rd_ptr); + coda_write(dev, 0, coda9_reg_jpeg_bbc_cur_pos); + /* 64 words per 256-byte page */ + coda_write(dev, 64, coda9_reg_jpeg_bbc_data_cnt); + coda_write(dev, start_addr, coda9_reg_jpeg_bbc_ext_addr); + coda_write(dev, 0, coda9_reg_jpeg_bbc_int_addr); + + coda_write(dev, 0, coda9_reg_jpeg_gbu_bt_ptr); + coda_write(dev, 0, coda9_reg_jpeg_gbu_wd_ptr); + coda_write(dev, 0, coda9_reg_jpeg_gbu_bbsr); + coda_write(dev, 0, coda9_reg_jpeg_bbc_strm_ctrl); + coda_write(dev, 0, coda9_reg_jpeg_gbu_ctrl); + coda_write(dev, 0, coda9_reg_jpeg_gbu_ff_rptr); + coda_write(dev, 127, coda9_reg_jpeg_gbu_bber); + coda_write(dev, 64, coda9_reg_jpeg_gbu_bbir); + coda_write(dev, 64, coda9_reg_jpeg_gbu_bbhr); + + chroma_interleave = (q_data_src->fourcc == v4l2_pix_fmt_nv12); + coda_write(dev, coda9_jpeg_pic_ctrl_tc_direction | + coda9_jpeg_pic_ctrl_encoder_en, coda9_reg_jpeg_pic_ctrl); + coda_write(dev, 0, coda9_reg_jpeg_scl_info); + coda_write(dev, chroma_interleave, coda9_reg_jpeg_dpb_config); + coda_write(dev, ctx->params.jpeg_restart_interval, + coda9_reg_jpeg_rst_intval); + coda_write(dev, 1, coda9_reg_jpeg_bbc_ctrl); + + coda_write(dev, bus_req_num[chroma_format], coda9_reg_jpeg_op_info); + + coda9_jpeg_write_huff_tab(ctx); + coda9_jpeg_load_qmat_tab(ctx); + + if (ctx->params.rot_mode & coda_rot_90) { + aligned_width = aligned_height; + aligned_height = q_data_src->bytesperline; + if (chroma_format == coda9_jpeg_format_422) + chroma_format = coda9_jpeg_format_224; + else if (chroma_format == coda9_jpeg_format_224) + chroma_format = coda9_jpeg_format_422; + } + /* these need to be multiples of mcu size */ + coda_write(dev, aligned_width << 16 | aligned_height, + coda9_reg_jpeg_pic_size); + coda_write(dev, ctx->params.rot_mode ? + (coda_rot_mir_enable | ctx->params.rot_mode) : 0, + coda9_reg_jpeg_rot_info); + + coda_write(dev, mcu_info[chroma_format], coda9_reg_jpeg_mcu_info); + + coda_write(dev, 1, coda9_gdi_control); + timeout = ktime_add_us(ktime_get(), 100000); + do { + ret = coda_read(dev, coda9_gdi_status); + if (ktime_compare(ktime_get(), timeout) > 0) { + v4l2_err(&dev->v4l2_dev, "timeout waiting for gdi "); + return -etimedout; + } + } while (!ret); + + coda_write(dev, (chroma_format << 17) | (chroma_interleave << 16) | + q_data_src->bytesperline, coda9_gdi_info_control); + /* the content of this register seems to be irrelevant: */ + coda_write(dev, aligned_width << 16 | aligned_height, + coda9_gdi_info_pic_size); + + coda_write_base(ctx, q_data_src, src_buf, coda9_gdi_info_base_y); + + coda_write(dev, 0, coda9_reg_jpeg_dpb_base00); + coda_write(dev, 0, coda9_gdi_control); + coda_write(dev, 1, coda9_gdi_pic_init_host); + + coda_write(dev, 1, coda9_gdi_wprot_err_clr); + coda_write(dev, 0, coda9_gdi_wprot_rgn_en); + + trace_coda_jpeg_run(ctx, src_buf); + + coda_write(dev, 1, coda9_reg_jpeg_pic_start); + + return 0; +} + +static void coda9_jpeg_finish_encode(struct coda_ctx *ctx) +{ + struct vb2_v4l2_buffer *src_buf, *dst_buf; + struct coda_dev *dev = ctx->dev; + u32 wr_ptr, start_ptr; + u32 err_mb; + + if (ctx->aborting) { + coda_write(ctx->dev, 0, coda9_reg_jpeg_bbc_flush_cmd); + return; + } + + /* + * lock to make sure that an encoder stop command running in parallel + * will either already have marked src_buf as last, or it will wake up + * the capture queue after the buffers are returned. + */ + mutex_lock(&ctx->wakeup_mutex); + src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); + dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); + + trace_coda_jpeg_done(ctx, dst_buf); + + /* + * set plane payload to the number of bytes written out + * by the jpeg processing unit + */ + start_ptr = vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0); + wr_ptr = coda_read(dev, coda9_reg_jpeg_bbc_wr_ptr); + vb2_set_plane_payload(&dst_buf->vb2_buf, 0, wr_ptr - start_ptr); + + err_mb = coda_read(dev, coda9_reg_jpeg_pic_errmb); + if (err_mb) + coda_dbg(1, ctx, "errmb: 0x%x ", err_mb); + + coda_write(dev, 0, coda9_reg_jpeg_bbc_flush_cmd); + + dst_buf->flags &= ~(v4l2_buf_flag_pframe | v4l2_buf_flag_last); + dst_buf->flags |= v4l2_buf_flag_keyframe; + dst_buf->flags |= src_buf->flags & v4l2_buf_flag_last; + + v4l2_m2m_buf_copy_metadata(src_buf, dst_buf, false); + + v4l2_m2m_buf_done(src_buf, vb2_buf_state_done); + coda_m2m_buf_done(ctx, dst_buf, err_mb ? vb2_buf_state_error : + vb2_buf_state_done); + mutex_unlock(&ctx->wakeup_mutex); + + coda_dbg(1, ctx, "job finished: encoded frame (%u)%s ", + dst_buf->sequence, + (dst_buf->flags & v4l2_buf_flag_last) ? " (last)" : ""); +} + +static void coda9_jpeg_release(struct coda_ctx *ctx) +{ + int i; + + if (ctx->params.jpeg_qmat_tab[0] == luma_q) + ctx->params.jpeg_qmat_tab[0] = null; + if (ctx->params.jpeg_qmat_tab[1] == chroma_q) + ctx->params.jpeg_qmat_tab[1] = null; + for (i = 0; i < 3; i++) + kfree(ctx->params.jpeg_qmat_tab[i]); + kfree(ctx->params.jpeg_huff_data); +} + +const struct coda_context_ops coda9_jpeg_encode_ops = { + .queue_init = coda_encoder_queue_init, + .start_streaming = coda9_jpeg_start_encoding, + .prepare_run = coda9_jpeg_prepare_encode, + .finish_run = coda9_jpeg_finish_encode, + .release = coda9_jpeg_release, +}; + +irqreturn_t coda9_jpeg_irq_handler(int irq, void *data) +{ + struct coda_dev *dev = data; + struct coda_ctx *ctx; + int status; + int err_mb; + + status = coda_read(dev, coda9_reg_jpeg_pic_status); + if (status == 0) + return irq_handled; + coda_write(dev, status, coda9_reg_jpeg_pic_status); + + if (status & coda9_jpeg_status_overflow) + v4l2_err(&dev->v4l2_dev, "jpeg overflow "); + + if (status & coda9_jpeg_status_bbc_int) + v4l2_err(&dev->v4l2_dev, "jpeg bbc interrupt "); + + if (status & coda9_jpeg_status_error) { + v4l2_err(&dev->v4l2_dev, "jpeg error "); + + err_mb = coda_read(dev, coda9_reg_jpeg_pic_errmb); + if (err_mb) { + v4l2_err(&dev->v4l2_dev, + "errmb: 0x%x: rst idx %d, mcu pos (%d,%d) ", + err_mb, err_mb >> 24, (err_mb >> 12) & 0xfff, + err_mb & 0xfff); + } + } + + ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev); + if (!ctx) { + v4l2_err(&dev->v4l2_dev, + "instance released before the end of transaction "); + mutex_unlock(&dev->coda_mutex); + return irq_handled; + } + + complete(&ctx->completion); + + return irq_handled; +} diff --git a/drivers/media/platform/coda/coda.h b/drivers/media/platform/coda/coda.h --- a/drivers/media/platform/coda/coda.h +++ b/drivers/media/platform/coda/coda.h + u32 *jpeg_huff_data; +extern const struct coda_context_ops coda9_jpeg_encode_ops; +irqreturn_t coda9_jpeg_irq_handler(int irq, void *data); diff --git a/drivers/media/platform/coda/trace.h b/drivers/media/platform/coda/trace.h --- a/drivers/media/platform/coda/trace.h +++ b/drivers/media/platform/coda/trace.h +define_event(coda_buf_class, coda_jpeg_run, + tp_proto(struct coda_ctx *ctx, struct vb2_v4l2_buffer *buf), + tp_args(ctx, buf) +); + +define_event(coda_buf_class, coda_jpeg_done, + tp_proto(struct coda_ctx *ctx, struct vb2_v4l2_buffer *buf), + tp_args(ctx, buf) +); +
|
TV tuners, webcams, video capturers
|
96f6f62c4656d13744f0fc5b958a73396f54d91e
|
philipp zabel
|
drivers
|
media
|
coda, platform
|
media: cx23885: add support for avermedia ce310b
|
the avermedia ce310b is a simple composite + s-video + stereo audio capture card, and uses only the cx23888 to perform all of these functions.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add support for avermedia ce310b
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['cx23885']
|
['c', 'h']
| 3
| 27
| 1
|
--- diff --git a/drivers/media/pci/cx23885/cx23885-cards.c b/drivers/media/pci/cx23885/cx23885-cards.c --- a/drivers/media/pci/cx23885/cx23885-cards.c +++ b/drivers/media/pci/cx23885/cx23885-cards.c + [cx23885_board_avermedia_ce310b] = { + .name = "avermedia ce310b", + .porta = cx23885_analog_video, + .force_bff = 1, + .input = {{ + .type = cx23885_vmux_composite1, + .vmux = cx25840_vin1_ch1 | + cx25840_none_ch2 | + cx25840_none0_ch3, + .amux = cx25840_audio7, + }, { + .type = cx23885_vmux_svideo, + .vmux = cx25840_vin8_ch1 | + cx25840_none_ch2 | + cx25840_vin7_ch3 | + cx25840_svideo_on, + .amux = cx25840_audio7, + } }, + }, + }, { + .subvendor = 0x1461, + .subdevice = 0x3100, + .card = cx23885_board_avermedia_ce310b, + case cx23885_board_avermedia_ce310b: diff --git a/drivers/media/pci/cx23885/cx23885-video.c b/drivers/media/pci/cx23885/cx23885-video.c --- a/drivers/media/pci/cx23885/cx23885-video.c +++ b/drivers/media/pci/cx23885/cx23885-video.c - (dev->board == cx23885_board_viewcast_460e)) { + (dev->board == cx23885_board_viewcast_460e) || + (dev->board == cx23885_board_avermedia_ce310b)) { diff --git a/drivers/media/pci/cx23885/cx23885.h b/drivers/media/pci/cx23885/cx23885.h --- a/drivers/media/pci/cx23885/cx23885.h +++ b/drivers/media/pci/cx23885/cx23885.h +#define cx23885_board_avermedia_ce310b 62
|
TV tuners, webcams, video capturers
|
dc4cac67e13515835ed8081d510aa507aacb013b
|
forest crossman
|
drivers
|
media
|
cx23885, pci
|
media: dvb: add support for terratec tc2 stick (193534)
|
seems to be a clone of logilink vg0022a. supports dvb-c, dvb-t and dvb-t2. only terrestrial reception was tested on polish and czech multiplexes.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add support for terratec tc2 stick (193534)
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['dvb']
|
['c', 'h']
| 2
| 11
| 5
|
--- diff --git a/drivers/media/usb/dvb-usb-v2/af9035.c b/drivers/media/usb/dvb-usb-v2/af9035.c --- a/drivers/media/usb/dvb-usb-v2/af9035.c +++ b/drivers/media/usb/dvb-usb-v2/af9035.c - * hack: the logilink vg0022a has a bug: when the si2157 - * firmware that came with the device is replaced by a new - * one, the i2c transfers to the tuner will return just 0xff. + * hack: the logilink vg0022a and terratec tc2 stick have + * a bug: when the si2157 firmware that came with the device + * is replaced by a new one, the i2c transfers to the tuner + * will return just 0xff. - if (le16_to_cpu(d->udev->descriptor.idvendor) == usb_vid_dexatek && - le16_to_cpu(d->udev->descriptor.idproduct) == 0x0100) + if ((le16_to_cpu(d->udev->descriptor.idvendor) == usb_vid_dexatek && + le16_to_cpu(d->udev->descriptor.idproduct) == 0x0100) || + (le16_to_cpu(d->udev->descriptor.idvendor) == usb_vid_terratec && + le16_to_cpu(d->udev->descriptor.idproduct) == usb_pid_terratec_cinergy_tc2_stick)) + { dvb_usb_device(usb_vid_terratec, usb_pid_terratec_cinergy_tc2_stick, + &it930x_props, "terratec cinergy tc2 stick", null) }, diff --git a/include/media/dvb-usb-ids.h b/include/media/dvb-usb-ids.h --- a/include/media/dvb-usb-ids.h +++ b/include/media/dvb-usb-ids.h +#define usb_pid_terratec_cinergy_tc2_stick 0x10b2
|
TV tuners, webcams, video capturers
|
c0e0d3138896f33c6d9322b07e105ea6e572ef3e
|
tomasz maciej nowak
|
include
|
media
|
dvb-usb-v2, usb
|
media: rc: ir-hix5hd2: add hi3796cv300-ir support
|
the ir device on hi3796cv300 soc is mostly same as hix5hd2, except the following two things.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add hi3796cv300-ir support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['rc', 'ir-hix5hd2']
|
['c']
| 1
| 61
| 18
|
- ir_clk offset is 0x60 instead of 0x48. - it needs to set an extra bit in ir_enable register to enable ir. - define a soc specific data to accommodate ir_clk offset and the flag - create function hix5hd2_ir_enable() to handle ir enabling. the original - device table hix5hd2_ir_table[] gets moved forward, as it's being --- diff --git a/drivers/media/rc/ir-hix5hd2.c b/drivers/media/rc/ir-hix5hd2.c --- a/drivers/media/rc/ir-hix5hd2.c +++ b/drivers/media/rc/ir-hix5hd2.c -#define ir_clk 0x48 +/* ir_enable register bits */ +#define ir_enable_en bit(0) +#define ir_enable_en_extra bit(8) + +/* need to set extra bit for enabling ir */ +#define hix5hd2_flag_extra_enable bit(0) + +struct hix5hd2_soc_data { + u32 clk_reg; + u32 flags; +}; + +static const struct hix5hd2_soc_data hix5hd2_data = { + .clk_reg = 0x48, +}; + +static const struct hix5hd2_soc_data hi3796cv300_data = { + .clk_reg = 0x60, + .flags = hix5hd2_flag_extra_enable, +}; + + const struct hix5hd2_soc_data *socdata; -static int hix5hd2_ir_enable(struct hix5hd2_ir_priv *dev, bool on) +static int hix5hd2_ir_clk_enable(struct hix5hd2_ir_priv *dev, bool on) + u32 clk_reg = dev->socdata->clk_reg; - regmap_read(dev->regmap, ir_clk, &val); + regmap_read(dev->regmap, clk_reg, &val); - regmap_write(dev->regmap, ir_clk, val); + regmap_write(dev->regmap, clk_reg, val); +static inline void hix5hd2_ir_enable(struct hix5hd2_ir_priv *priv) +{ + u32 val = ir_enable_en; + + if (priv->socdata->flags & hix5hd2_flag_extra_enable) + val |= ir_enable_en_extra; + + writel_relaxed(val, priv->base + ir_enable); +} + - writel_relaxed(0x01, priv->base + ir_enable); + hix5hd2_ir_enable(priv); + - ret = hix5hd2_ir_enable(priv, true); + ret = hix5hd2_ir_clk_enable(priv, true); - hix5hd2_ir_enable(priv, false); + hix5hd2_ir_clk_enable(priv, false); - hix5hd2_ir_enable(priv, false); + hix5hd2_ir_clk_enable(priv, false); +static const struct of_device_id hix5hd2_ir_table[] = { + { .compatible = "hisilicon,hix5hd2-ir", &hix5hd2_data, }, + { .compatible = "hisilicon,hi3796cv300-ir", &hi3796cv300_data, }, + {}, +}; +module_device_table(of, hix5hd2_ir_table); + + const struct of_device_id *of_id; + of_id = of_match_device(hix5hd2_ir_table, dev); + if (!of_id) { + dev_err(dev, "unable to initialize ir data "); + return -enodev; + } + priv->socdata = of_id->data; + - hix5hd2_ir_enable(priv, false); + hix5hd2_ir_clk_enable(priv, false); - ret = hix5hd2_ir_enable(priv, true); + ret = hix5hd2_ir_clk_enable(priv, true); - hix5hd2_ir_enable(priv, false); + hix5hd2_ir_clk_enable(priv, false); - writel_relaxed(0x01, priv->base + ir_enable); + hix5hd2_ir_enable(priv); + -static const struct of_device_id hix5hd2_ir_table[] = { - { .compatible = "hisilicon,hix5hd2-ir", }, - {}, -}; -module_device_table(of, hix5hd2_ir_table); -
|
TV tuners, webcams, video capturers
|
e4b9b6454d94481483c435b94517249b79e82b63
|
shawn guo
|
drivers
|
media
|
rc
|
media: rtl28xxu: add support for prolectrix dv107669 dvb-t dongle
|
this adds support for the prolectrix dv107669 dvt-t dongle which uses an rtl2832 and fc0012 tuner.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add support for prolectrix dv107669 dvb-t dongle
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['rtl28xxu']
|
['c', 'h']
| 2
| 3
| 0
|
- verified correct operation of dvb-t reception with vlc across --- diff --git a/drivers/media/usb/dvb-usb-v2/rtl28xxu.c b/drivers/media/usb/dvb-usb-v2/rtl28xxu.c --- a/drivers/media/usb/dvb-usb-v2/rtl28xxu.c +++ b/drivers/media/usb/dvb-usb-v2/rtl28xxu.c + { dvb_usb_device(usb_vid_gtek, usb_pid_prolectrix_dv107669, + &rtl28xxu_props, "prolectrix dv107669", null) }, diff --git a/include/media/dvb-usb-ids.h b/include/media/dvb-usb-ids.h --- a/include/media/dvb-usb-ids.h +++ b/include/media/dvb-usb-ids.h +#define usb_pid_prolectrix_dv107669 0xd803
|
TV tuners, webcams, video capturers
|
3fbe158406af6a062960c0713a4d97f31fcbbea6
|
david j fiddes
|
include
|
media
|
dvb-usb-v2, usb
|
media: sun4i-csi: add support for a10 csi1 camera sensor interface
|
the a10/a20 allwinner socs have two camera sensor interface blocks, named csi0 and csi1. the two have the same register layouts with slightly different features:
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add support for a10 csi1 camera sensor interface
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['sun4i-csi']
|
['c', 'h']
| 2
| 32
| 5
|
- csi0 has an image signal processor (isp); csi1 doesn't - csi0 can support up to four separate channels under ccir656; - csi0 can support up to 16-bit wide bus with yuv422; --- diff --git a/drivers/media/platform/sunxi/sun4i-csi/sun4i_csi.c b/drivers/media/platform/sunxi/sun4i-csi/sun4i_csi.c --- a/drivers/media/platform/sunxi/sun4i-csi/sun4i_csi.c +++ b/drivers/media/platform/sunxi/sun4i-csi/sun4i_csi.c +struct sun4i_csi_traits { + unsigned int channels; + unsigned int max_width; + bool has_isp; +}; + + csi->traits = of_device_get_match_data(&pdev->dev); + if (!csi->traits) + return -einval; + - csi->isp_clk = devm_clk_get(&pdev->dev, "isp"); - if (is_err(csi->isp_clk)) { - dev_err(&pdev->dev, "couldn't get our isp clock "); - return ptr_err(csi->isp_clk); + if (csi->traits->has_isp) { + csi->isp_clk = devm_clk_get(&pdev->dev, "isp"); + if (is_err(csi->isp_clk)) { + dev_err(&pdev->dev, "couldn't get our isp clock "); + return ptr_err(csi->isp_clk); + } +static const struct sun4i_csi_traits sun4i_a10_csi1_traits = { + .channels = 1, + .max_width = 24, + .has_isp = false, +}; + +static const struct sun4i_csi_traits sun7i_a20_csi0_traits = { + .channels = 4, + .max_width = 16, + .has_isp = true, +}; + - { .compatible = "allwinner,sun7i-a20-csi0" }, + { .compatible = "allwinner,sun4i-a10-csi1", .data = &sun4i_a10_csi1_traits }, + { .compatible = "allwinner,sun7i-a20-csi0", .data = &sun7i_a20_csi0_traits }, diff --git a/drivers/media/platform/sunxi/sun4i-csi/sun4i_csi.h b/drivers/media/platform/sunxi/sun4i-csi/sun4i_csi.h --- a/drivers/media/platform/sunxi/sun4i-csi/sun4i_csi.h +++ b/drivers/media/platform/sunxi/sun4i-csi/sun4i_csi.h + const struct sun4i_csi_traits *traits; +
|
TV tuners, webcams, video capturers
|
51e40a0dbe53cebe1f4b85bb47e250dc5a89b254
|
chen yu tsai
|
drivers
|
media
|
platform, sun4i-csi, sunxi
|
media: ti-vpe: cal: add am654 support
|
add the needed control module register bit layout to support the am654 family of devices.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add am654 support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['ti-vpe', 'cal']
|
['c', 'kconfig']
| 2
| 26
| 2
|
--- diff --git a/drivers/media/platform/kconfig b/drivers/media/platform/kconfig --- a/drivers/media/platform/kconfig +++ b/drivers/media/platform/kconfig - depends on soc_dra7xx || compile_test + depends on soc_dra7xx || arch_k3 || compile_test diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c +static struct reg_field am654_ctrl_core_csi0_reg_fields[f_max_fields] = { + [f_ctrlclken] = reg_field(0, 15, 15), + [f_cammode] = reg_field(0, 24, 25), + [f_laneenable] = reg_field(0, 0, 4), +}; + +static struct cal_csi2_phy am654_cal_csi_phy[] = { + { + .base_fields = am654_ctrl_core_csi0_reg_fields, + .num_lanes = 5, + }, +}; + +static const struct cal_data am654_cal_data = { + .csi2_phy_core = am654_cal_csi_phy, + .num_csi2_phy = array_size(am654_cal_csi_phy), +}; + - regmap_field_write(phy->fields[f_csi_mode], 1); + /* f_csi_mode is not present on every architecture */ + if (phy->fields[f_csi_mode]) + regmap_field_write(phy->fields[f_csi_mode], 1); + { + .compatible = "ti,am654-cal", + .data = (void *)&am654_cal_data, + },
|
TV tuners, webcams, video capturers
|
7a3b9684cede12dd60b50af874646527e25eb4d2
|
benoit parrot
|
drivers
|
media
|
platform, ti-vpe
|
media: ti-vpe: cal: add dra76x support
|
add the needed control module register bit layout to support the dra76x family of devices.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add dra76x support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['ti-vpe', 'cal']
|
['c']
| 1
| 34
| 0
|
--- diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c +static struct reg_field dra76x_ctrl_core_csi0_reg_fields[f_max_fields] = { + [f_ctrlclken] = reg_field(0, 8, 8), + [f_cammode] = reg_field(0, 9, 10), + [f_csi_mode] = reg_field(0, 11, 11), + [f_laneenable] = reg_field(0, 27, 31), +}; + +static struct reg_field dra76x_ctrl_core_csi1_reg_fields[f_max_fields] = { + [f_ctrlclken] = reg_field(0, 0, 0), + [f_cammode] = reg_field(0, 1, 2), + [f_csi_mode] = reg_field(0, 3, 3), + [f_laneenable] = reg_field(0, 24, 26), +}; + +static struct cal_csi2_phy dra76x_cal_csi_phy[] = { + { + .base_fields = dra76x_ctrl_core_csi0_reg_fields, + .num_lanes = 5, + }, + { + .base_fields = dra76x_ctrl_core_csi1_reg_fields, + .num_lanes = 3, + }, +}; + +static const struct cal_data dra76x_cal_data = { + .csi2_phy_core = dra76x_cal_csi_phy, + .num_csi2_phy = array_size(dra76x_cal_csi_phy), +}; + + { + .compatible = "ti,dra76-cal", + .data = (void *)&dra76x_cal_data, + },
|
TV tuners, webcams, video capturers
|
e2257005902a75b3581fcfa61c62d20d4b6a9188
|
benoit parrot
|
drivers
|
media
|
platform, ti-vpe
|
media: ti-vpe: cal: enable dmabuf export
|
allow cal to be able to export dma buffer.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
enable dmabuf export
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['ti-vpe', 'cal']
|
['c']
| 1
| 1
| 0
|
--- diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c + .vidioc_expbuf = vb2_ioctl_expbuf,
|
TV tuners, webcams, video capturers
|
23122c373e33b13001509c5d09620b0ba5f7d08c
|
benoit parrot
|
drivers
|
media
|
platform, ti-vpe
|
media: vivid: add touch support
|
support to emulate touch devices in vivid driver. it generates touch patterns simulating single tap, double tap, triple tap, move from left to right, zoom in, zoom out, palm press simulating large area being pressed on screen, and simulating 16 different simultaneous touch points.the values generated are based on behavior of the rmi_f54 driver.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add touch support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['vivid']
|
['c', 'makefile', 'h']
| 8
| 739
| 13
|
--- diff --git a/drivers/media/platform/vivid/makefile b/drivers/media/platform/vivid/makefile --- a/drivers/media/platform/vivid/makefile +++ b/drivers/media/platform/vivid/makefile - vivid-osd.o vivid-meta-cap.o vivid-meta-out.o + vivid-osd.o vivid-meta-cap.o vivid-meta-out.o \ + vivid-kthread-touch.o vivid-touch-cap.o diff --git a/drivers/media/platform/vivid/vivid-core.c b/drivers/media/platform/vivid/vivid-core.c --- a/drivers/media/platform/vivid/vivid-core.c +++ b/drivers/media/platform/vivid/vivid-core.c +#include "vivid-touch-cap.h" +static int touch_cap_nr[vivid_max_devs] = { [0 ... (vivid_max_devs - 1)] = -1 }; +module_param_array(touch_cap_nr, int, null, 0444); +module_parm_desc(touch_cap_nr, " v4l-touchx start number, -1 is autodetect"); + - [0 ... (vivid_max_devs - 1)] = 0x61d3d + [0 ... (vivid_max_devs - 1)] = 0xe1d3d -module_parm_desc(node_types, " node types, default is 0x61d3d. bitmask with the following meaning: " +module_parm_desc(node_types, " node types, default is 0xe1d3d. bitmask with the following meaning: " - " bit 18: metadata output node "); + " bit 18: metadata output node " + " bit 19: touch capture node "); - dev->meta_out_caps | v4l2_cap_device_caps; + dev->meta_out_caps | dev->touch_cap_caps | + v4l2_cap_device_caps; + if (vdev->vfl_type == vfl_type_touch) + return vivid_g_parm_tch(file, fh, parm); +static int vivid_enum_input(struct file *file, void *priv, + struct v4l2_input *inp) +{ + struct video_device *vdev = video_devdata(file); + + if (vdev->vfl_type == vfl_type_touch) + return vivid_enum_input_tch(file, priv, inp); + return vidioc_enum_input(file, priv, inp); +} + +static int vivid_g_input(struct file *file, void *priv, unsigned int *i) +{ + struct video_device *vdev = video_devdata(file); + + if (vdev->vfl_type == vfl_type_touch) + return vivid_g_input_tch(file, priv, i); + return vidioc_g_input(file, priv, i); +} + +static int vivid_s_input(struct file *file, void *priv, unsigned int i) +{ + struct video_device *vdev = video_devdata(file); + + if (vdev->vfl_type == vfl_type_touch) + return vivid_s_input_tch(file, priv, i); + return vidioc_s_input(file, priv, i); +} + +static int vivid_enum_fmt_cap(struct file *file, void *priv, + struct v4l2_fmtdesc *f) +{ + struct video_device *vdev = video_devdata(file); + + if (vdev->vfl_type == vfl_type_touch) + return vivid_enum_fmt_tch(file, priv, f); + return vivid_enum_fmt_vid(file, priv, f); +} + +static int vivid_g_fmt_cap(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct video_device *vdev = video_devdata(file); + + if (vdev->vfl_type == vfl_type_touch) + return vivid_g_fmt_tch(file, priv, f); + return vidioc_g_fmt_vid_cap(file, priv, f); +} + +static int vivid_try_fmt_cap(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct video_device *vdev = video_devdata(file); + + if (vdev->vfl_type == vfl_type_touch) + return vivid_g_fmt_tch(file, priv, f); + return vidioc_try_fmt_vid_cap(file, priv, f); +} + +static int vivid_s_fmt_cap(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct video_device *vdev = video_devdata(file); + + if (vdev->vfl_type == vfl_type_touch) + return vivid_g_fmt_tch(file, priv, f); + return vidioc_s_fmt_vid_cap(file, priv, f); +} + - vivid_is_in_use(&dev->meta_out_dev); + vivid_is_in_use(&dev->meta_out_dev) + + vivid_is_in_use(&dev->touch_cap_dev); + set_bit(v4l2_fl_registered, &dev->touch_cap_dev.flags); - .vidioc_enum_fmt_vid_cap = vivid_enum_fmt_vid, - .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap, - .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap, - .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap, + .vidioc_enum_fmt_vid_cap = vivid_enum_fmt_cap, + .vidioc_g_fmt_vid_cap = vivid_g_fmt_cap, + .vidioc_try_fmt_vid_cap = vivid_try_fmt_cap, + .vidioc_s_fmt_vid_cap = vivid_s_fmt_cap, - .vidioc_enum_input = vidioc_enum_input, - .vidioc_g_input = vidioc_g_input, - .vidioc_s_input = vidioc_s_input, + .vidioc_enum_input = vivid_enum_input, + .vidioc_g_input = vivid_g_input, + .vidioc_s_input = vivid_s_input, + /* do we create a touch capture device */ + dev->has_touch_cap = node_type & 0x80000; + + /* set up the capabilities of the touch capture device */ + if (dev->has_touch_cap) + dev->touch_cap_caps = v4l2_cap_touch | v4l2_cap_video_capture | + v4l2_cap_streaming | v4l2_cap_readwrite; + v4l2_disable_ioctl(&dev->touch_cap_dev, vidioc_s_parm); + v4l2_disable_ioctl(&dev->touch_cap_dev, vidioc_enum_framesizes); + v4l2_disable_ioctl(&dev->touch_cap_dev, vidioc_enum_frameintervals); + /* update touch configuration */ + dev->timeperframe_tch_cap.numerator = 1; + dev->timeperframe_tch_cap.denominator = 10; + vivid_set_touch(dev, 0); + + init_list_head(&dev->touch_cap_active); + if (dev->has_touch_cap) { + /* initialize touch_cap queue */ + ret = vivid_create_queue(dev, &dev->vb_touch_cap_q, + v4l2_buf_type_video_capture, 1, + &vivid_touch_cap_qops); + if (ret) + goto unreg_dev; + } + + v4l2_ctrl_handler_setup(&dev->ctrl_hdl_touch_cap); + if (dev->has_touch_cap) { + vfd = &dev->touch_cap_dev; + snprintf(vfd->name, sizeof(vfd->name), + "vivid-%03d-touch-cap", inst); + vfd->fops = &vivid_fops; + vfd->ioctl_ops = &vivid_ioctl_ops; + vfd->device_caps = dev->touch_cap_caps; + vfd->release = video_device_release_empty; + vfd->v4l2_dev = &dev->v4l2_dev; + vfd->queue = &dev->vb_touch_cap_q; + vfd->tvnorms = tvnorms_cap; + vfd->lock = &dev->mutex; + video_set_drvdata(vfd, dev); +#ifdef config_media_controller + dev->touch_cap_pad.flags = media_pad_fl_sink; + ret = media_entity_pads_init(&vfd->entity, 1, + &dev->touch_cap_pad); + if (ret) + goto unreg_dev; +#endif + ret = video_register_device(vfd, vfl_type_touch, + touch_cap_nr[inst]); + if (ret < 0) + goto unreg_dev; + v4l2_info(&dev->v4l2_dev, + "v4l2 touch capture device registered as %s ", + video_device_node_name(vfd)); + } + + video_unregister_device(&dev->touch_cap_dev); + if (dev->has_touch_cap) { + v4l2_info(&dev->v4l2_dev, "unregistering %s ", + video_device_node_name(&dev->touch_cap_dev)); + video_unregister_device(&dev->touch_cap_dev); + } diff --git a/drivers/media/platform/vivid/vivid-core.h b/drivers/media/platform/vivid/vivid-core.h --- a/drivers/media/platform/vivid/vivid-core.h +++ b/drivers/media/platform/vivid/vivid-core.h + struct media_pad touch_cap_pad; + struct video_device touch_cap_dev; + struct v4l2_ctrl_handler ctrl_hdl_touch_cap; + u32 touch_cap_caps; + bool has_touch_cap; + struct vb2_queue vb_touch_cap_q; + struct list_head touch_cap_active; + /* touch capture */ + struct task_struct *kthread_touch_cap; + unsigned long jiffies_touch_cap; + u64 touch_cap_stream_start; + u32 touch_cap_seq_offset; + bool touch_cap_seq_resync; + u32 touch_cap_seq_start; + u32 touch_cap_seq_count; + bool touch_cap_streaming; + struct v4l2_fract timeperframe_tch_cap; + struct v4l2_pix_format tch_format; + int tch_pat_random; + diff --git a/drivers/media/platform/vivid/vivid-ctrls.c b/drivers/media/platform/vivid/vivid-ctrls.c --- a/drivers/media/platform/vivid/vivid-ctrls.c +++ b/drivers/media/platform/vivid/vivid-ctrls.c + struct v4l2_ctrl_handler *hdl_tch_cap = &dev->ctrl_hdl_touch_cap; + v4l2_ctrl_handler_init(hdl_tch_cap, 2); + v4l2_ctrl_new_custom(hdl_tch_cap, &vivid_ctrl_class, null); + if (dev->has_touch_cap) { + v4l2_ctrl_add_handler(hdl_tch_cap, hdl_user_gen, null, false); + v4l2_ctrl_add_handler(hdl_tch_cap, hdl_streaming, null, false); + if (hdl_tch_cap->error) + return hdl_tch_cap->error; + dev->touch_cap_dev.ctrl_handler = hdl_tch_cap; + } + v4l2_ctrl_handler_free(&dev->ctrl_hdl_touch_cap); diff --git a/drivers/media/platform/vivid/vivid-kthread-touch.c b/drivers/media/platform/vivid/vivid-kthread-touch.c --- /dev/null +++ b/drivers/media/platform/vivid/vivid-kthread-touch.c +// spdx-license-identifier: gpl-2.0-only +/* + * vivid-kthread-touch.c - touch capture thread support functions. + * + */ + +#include <linux/freezer.h> +#include "vivid-core.h" +#include "vivid-kthread-touch.h" +#include "vivid-touch-cap.h" + +static noinline_for_stack void vivid_thread_tch_cap_tick(struct vivid_dev *dev, + int dropped_bufs) +{ + struct vivid_buffer *tch_cap_buf = null; + + spin_lock(&dev->slock); + if (!list_empty(&dev->touch_cap_active)) { + tch_cap_buf = list_entry(dev->touch_cap_active.next, + struct vivid_buffer, list); + list_del(&tch_cap_buf->list); + } + + spin_unlock(&dev->slock); + + if (tch_cap_buf) { + v4l2_ctrl_request_setup(tch_cap_buf->vb.vb2_buf.req_obj.req, + &dev->ctrl_hdl_touch_cap); + + vivid_fillbuff_tch(dev, tch_cap_buf); + v4l2_ctrl_request_complete(tch_cap_buf->vb.vb2_buf.req_obj.req, + &dev->ctrl_hdl_touch_cap); + vb2_buffer_done(&tch_cap_buf->vb.vb2_buf, dev->dqbuf_error ? + vb2_buf_state_error : vb2_buf_state_done); + dprintk(dev, 2, "touch_cap buffer %d done ", + tch_cap_buf->vb.vb2_buf.index); + + tch_cap_buf->vb.vb2_buf.timestamp = ktime_get_ns() + dev->time_wrap_offset; + } + dev->dqbuf_error = false; +} + +static int vivid_thread_touch_cap(void *data) +{ + struct vivid_dev *dev = data; + u64 numerators_since_start; + u64 buffers_since_start; + u64 next_jiffies_since_start; + unsigned long jiffies_since_start; + unsigned long cur_jiffies; + unsigned int wait_jiffies; + unsigned int numerator; + unsigned int denominator; + int dropped_bufs; + + dprintk(dev, 1, "touch capture thread start "); + + set_freezable(); + + /* resets frame counters */ + dev->touch_cap_seq_offset = 0; + dev->touch_cap_seq_count = 0; + dev->touch_cap_seq_resync = false; + dev->jiffies_touch_cap = jiffies; + + for (;;) { + try_to_freeze(); + if (kthread_should_stop()) + break; + + if (!mutex_trylock(&dev->mutex)) { + schedule_timeout_uninterruptible(1); + continue; + } + cur_jiffies = jiffies; + if (dev->touch_cap_seq_resync) { + dev->jiffies_touch_cap = cur_jiffies; + dev->touch_cap_seq_offset = dev->touch_cap_seq_count + 1; + dev->touch_cap_seq_count = 0; + dev->cap_seq_resync = false; + } + denominator = dev->timeperframe_tch_cap.denominator; + numerator = dev->timeperframe_tch_cap.numerator; + + /* calculate the number of jiffies since we started streaming */ + jiffies_since_start = cur_jiffies - dev->jiffies_touch_cap; + /* get the number of buffers streamed since the start */ + buffers_since_start = (u64)jiffies_since_start * denominator + + (hz * numerator) / 2; + do_div(buffers_since_start, hz * numerator); + + /* + * after more than 0xf0000000 (rounded down to a multiple of + * 'jiffies-per-day' to ease jiffies_to_msecs calculation) + * jiffies have passed since we started streaming reset the + * counters and keep track of the sequence offset. + */ + if (jiffies_since_start > jiffies_resync) { + dev->jiffies_touch_cap = cur_jiffies; + dev->cap_seq_offset = buffers_since_start; + buffers_since_start = 0; + } + dropped_bufs = buffers_since_start + dev->touch_cap_seq_offset - dev->touch_cap_seq_count; + dev->touch_cap_seq_count = buffers_since_start + dev->touch_cap_seq_offset; + + vivid_thread_tch_cap_tick(dev, dropped_bufs); + + /* + * calculate the number of 'numerators' streamed + * since we started, including the current buffer. + */ + numerators_since_start = ++buffers_since_start * numerator; + + /* and the number of jiffies since we started */ + jiffies_since_start = jiffies - dev->jiffies_touch_cap; + + mutex_unlock(&dev->mutex); + + /* + * calculate when that next buffer is supposed to start + * in jiffies since we started streaming. + */ + next_jiffies_since_start = numerators_since_start * hz + + denominator / 2; + do_div(next_jiffies_since_start, denominator); + /* if it is in the past, then just schedule asap */ + if (next_jiffies_since_start < jiffies_since_start) + next_jiffies_since_start = jiffies_since_start; + + wait_jiffies = next_jiffies_since_start - jiffies_since_start; + schedule_timeout_interruptible(wait_jiffies ? wait_jiffies : 1); + } + dprintk(dev, 1, "touch capture thread end "); + return 0; +} + +int vivid_start_generating_touch_cap(struct vivid_dev *dev) +{ + if (dev->kthread_touch_cap) { + dev->touch_cap_streaming = true; + return 0; + } + + dev->kthread_touch_cap = kthread_run(vivid_thread_touch_cap, dev, + "%s-tch-cap", dev->v4l2_dev.name); + + if (is_err(dev->kthread_touch_cap)) { + int err = ptr_err(dev->kthread_touch_cap); + + dev->kthread_touch_cap = null; + v4l2_err(&dev->v4l2_dev, "kernel_thread() failed "); + return err; + } + dev->touch_cap_streaming = true; + dprintk(dev, 1, "returning from %s ", __func__); + return 0; +} + +void vivid_stop_generating_touch_cap(struct vivid_dev *dev) +{ + if (!dev->kthread_touch_cap) + return; + + dev->touch_cap_streaming = false; + + while (!list_empty(&dev->touch_cap_active)) { + struct vivid_buffer *buf; + + buf = list_entry(dev->touch_cap_active.next, + struct vivid_buffer, list); + list_del(&buf->list); + v4l2_ctrl_request_complete(buf->vb.vb2_buf.req_obj.req, + &dev->ctrl_hdl_touch_cap); + vb2_buffer_done(&buf->vb.vb2_buf, vb2_buf_state_error); + dprintk(dev, 2, "touch_cap buffer %d done ", + buf->vb.vb2_buf.index); + } + + kthread_stop(dev->kthread_touch_cap); + dev->kthread_touch_cap = null; +} diff --git a/drivers/media/platform/vivid/vivid-kthread-touch.h b/drivers/media/platform/vivid/vivid-kthread-touch.h --- /dev/null +++ b/drivers/media/platform/vivid/vivid-kthread-touch.h +/* spdx-license-identifier: gpl-2.0-only */ +/* + * vivid-kthread-cap.h - video/vbi capture thread support functions. + * + */ + +#ifndef _vivid_kthread_cap_h_ +#define _vivid_kthread_cap_h_ + +int vivid_start_generating_touch_cap(struct vivid_dev *dev); +void vivid_stop_generating_touch_cap(struct vivid_dev *dev); + +#endif diff --git a/drivers/media/platform/vivid/vivid-touch-cap.c b/drivers/media/platform/vivid/vivid-touch-cap.c --- /dev/null +++ b/drivers/media/platform/vivid/vivid-touch-cap.c +// spdx-license-identifier: gpl-2.0-only +/* + * vivid-touch-cap.c - touch support functions. + */ + +#include "vivid-core.h" +#include "vivid-kthread-touch.h" +#include "vivid-touch-cap.h" + +static int touch_cap_queue_setup(struct vb2_queue *vq, unsigned int *nbuffers, + unsigned int *nplanes, unsigned int sizes[], + struct device *alloc_devs[]) +{ + struct vivid_dev *dev = vb2_get_drv_priv(vq); + struct v4l2_pix_format *f = &dev->tch_format; + unsigned int size = f->sizeimage; + + if (*nplanes) { + if (sizes[0] < size) + return -einval; + } else { + sizes[0] = size; + } + + if (vq->num_buffers + *nbuffers < 2) + *nbuffers = 2 - vq->num_buffers; + + *nplanes = 1; + return 0; +} + +static int touch_cap_buf_prepare(struct vb2_buffer *vb) +{ + struct vivid_dev *dev = vb2_get_drv_priv(vb->vb2_queue); + struct v4l2_pix_format *f = &dev->tch_format; + unsigned int size = f->sizeimage; + + if (dev->buf_prepare_error) { + /* + * error injection: test what happens if buf_prepare() returns + * an error. + */ + dev->buf_prepare_error = false; + return -einval; + } + if (vb2_plane_size(vb, 0) < size) { + dprintk(dev, 1, "%s data will not fit into plane (%lu < %u) ", + __func__, vb2_plane_size(vb, 0), size); + return -einval; + } + vb2_set_plane_payload(vb, 0, size); + + return 0; +} + +static void touch_cap_buf_queue(struct vb2_buffer *vb) +{ + struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); + struct vivid_dev *dev = vb2_get_drv_priv(vb->vb2_queue); + struct vivid_buffer *buf = container_of(vbuf, struct vivid_buffer, vb); + + spin_lock(&dev->slock); + list_add_tail(&buf->list, &dev->touch_cap_active); + spin_unlock(&dev->slock); +} + +static int touch_cap_start_streaming(struct vb2_queue *vq, unsigned int count) +{ + struct vivid_dev *dev = vb2_get_drv_priv(vq); + int err; + + dev->touch_cap_seq_count = 0; + if (dev->start_streaming_error) { + dev->start_streaming_error = false; + err = -einval; + } else { + err = vivid_start_generating_touch_cap(dev); + } + if (err) { + struct vivid_buffer *buf, *tmp; + + list_for_each_entry_safe(buf, tmp, + &dev->touch_cap_active, list) { + list_del(&buf->list); + vb2_buffer_done(&buf->vb.vb2_buf, + vb2_buf_state_queued); + } + } + return err; +} + +/* abort streaming and wait for last buffer */ +static void touch_cap_stop_streaming(struct vb2_queue *vq) +{ + struct vivid_dev *dev = vb2_get_drv_priv(vq); + + vivid_stop_generating_touch_cap(dev); +} + +static void touch_cap_buf_request_complete(struct vb2_buffer *vb) +{ + struct vivid_dev *dev = vb2_get_drv_priv(vb->vb2_queue); + + v4l2_ctrl_request_complete(vb->req_obj.req, &dev->ctrl_hdl_touch_cap); +} + +const struct vb2_ops vivid_touch_cap_qops = { + .queue_setup = touch_cap_queue_setup, + .buf_prepare = touch_cap_buf_prepare, + .buf_queue = touch_cap_buf_queue, + .start_streaming = touch_cap_start_streaming, + .stop_streaming = touch_cap_stop_streaming, + .buf_request_complete = touch_cap_buf_request_complete, + .wait_prepare = vb2_ops_wait_prepare, + .wait_finish = vb2_ops_wait_finish, +}; + +int vivid_enum_fmt_tch(struct file *file, void *priv, struct v4l2_fmtdesc *f) +{ + if (f->index) + return -einval; + + f->pixelformat = v4l2_tch_fmt_delta_td16; + return 0; +} + +int vivid_g_fmt_tch(struct file *file, void *priv, struct v4l2_format *f) +{ + struct vivid_dev *dev = video_drvdata(file); + + f->fmt.pix = dev->tch_format; + return 0; +} + +int vivid_g_parm_tch(struct file *file, void *priv, + struct v4l2_streamparm *parm) +{ + struct vivid_dev *dev = video_drvdata(file); + + if (parm->type != v4l2_buf_type_video_capture) + return -einval; + + parm->parm.capture.capability = v4l2_cap_timeperframe; + parm->parm.capture.timeperframe = dev->timeperframe_tch_cap; + parm->parm.capture.readbuffers = 1; + return 0; +} + +int vivid_enum_input_tch(struct file *file, void *priv, struct v4l2_input *inp) +{ + if (inp->index) + return -einval; + + inp->type = v4l2_input_type_touch; + strscpy(inp->name, "vivid touch", sizeof(inp->name)); + inp->capabilities = 0; + return 0; +} + +int vivid_g_input_tch(struct file *file, void *priv, unsigned int *i) +{ + *i = 0; + return 0; +} + +int vivid_set_touch(struct vivid_dev *dev, unsigned int i) +{ + struct v4l2_pix_format *f = &dev->tch_format; + + if (i) + return -einval; + + f->pixelformat = v4l2_tch_fmt_delta_td16; + f->width = vivid_tch_width; + f->height = vivid_tch_height; + f->field = v4l2_field_none; + f->colorspace = v4l2_colorspace_raw; + f->bytesperline = f->width * sizeof(s16); + f->sizeimage = f->width * f->height * sizeof(s16); + return 0; +} + +int vivid_s_input_tch(struct file *file, void *priv, unsigned int i) +{ + return vivid_set_touch(video_drvdata(file), i); +} + +static void vivid_fill_buff_noise(__s16 *tch_buf, int size) +{ + int i; + + /* fill 10% of the values within range -3 and 3, zero the others */ + for (i = 0; i < size; i++) { + unsigned int rand = get_random_int(); + + if (rand % 10) + tch_buf[i] = 0; + else + tch_buf[i] = (rand / 10) % 7 - 3; + } +} + +static inline int get_random_pressure(void) +{ + return get_random_int() % vivid_pressure_limit; +} + +static void vivid_tch_buf_set(struct v4l2_pix_format *f, + __s16 *tch_buf, + int index) +{ + unsigned int x = index % f->width; + unsigned int y = index / f->width; + unsigned int offset = vivid_min_pressure; + + tch_buf[index] = offset + get_random_pressure(); + offset /= 2; + if (x) + tch_buf[index - 1] = offset + get_random_pressure(); + if (x < f->width - 1) + tch_buf[index + 1] = offset + get_random_pressure(); + if (y) + tch_buf[index - f->width] = offset + get_random_pressure(); + if (y < f->height - 1) + tch_buf[index + f->width] = offset + get_random_pressure(); + offset /= 2; + if (x && y) + tch_buf[index - 1 - f->width] = offset + get_random_pressure(); + if (x < f->width - 1 && y) + tch_buf[index + 1 - f->width] = offset + get_random_pressure(); + if (x && y < f->height - 1) + tch_buf[index - 1 + f->width] = offset + get_random_pressure(); + if (x < f->width - 1 && y < f->height - 1) + tch_buf[index + 1 + f->width] = offset + get_random_pressure(); +} + +void vivid_fillbuff_tch(struct vivid_dev *dev, struct vivid_buffer *buf) +{ + struct v4l2_pix_format *f = &dev->tch_format; + int size = f->width * f->height; + int x, y, xstart, ystart, offset_x, offset_y; + unsigned int test_pattern, test_pat_idx, rand; + + __s16 *tch_buf = vb2_plane_vaddr(&buf->vb.vb2_buf, 0); + + buf->vb.sequence = dev->touch_cap_seq_count; + test_pattern = (buf->vb.sequence / tch_seq_count) % test_case_max; + test_pat_idx = buf->vb.sequence % tch_seq_count; + + vivid_fill_buff_noise(tch_buf, size); + + if (test_pat_idx >= tch_pattern_count) + return; + + if (test_pat_idx == 0) + dev->tch_pat_random = get_random_int(); + rand = dev->tch_pat_random; + + switch (test_pattern) { + case single_tap: + if (test_pat_idx == 2) + vivid_tch_buf_set(f, tch_buf, rand % size); + break; + case double_tap: + if (test_pat_idx == 2 || test_pat_idx == 4) + vivid_tch_buf_set(f, tch_buf, rand % size); + break; + case triple_tap: + if (test_pat_idx == 2 || test_pat_idx == 4 || test_pat_idx == 6) + vivid_tch_buf_set(f, tch_buf, rand % size); + break; + case move_left_to_right: + vivid_tch_buf_set(f, tch_buf, + (rand % f->height) * f->width + + test_pat_idx * + (f->width / tch_pattern_count)); + break; + case zoom_in: + x = f->width / 2; + y = f->height / 2; + offset_x = ((tch_pattern_count - 1 - test_pat_idx) * x) / + tch_pattern_count; + offset_y = ((tch_pattern_count - 1 - test_pat_idx) * y) / + tch_pattern_count; + vivid_tch_buf_set(f, tch_buf, + (x - offset_x) + f->width * (y - offset_y)); + vivid_tch_buf_set(f, tch_buf, + (x + offset_x) + f->width * (y + offset_y)); + break; + case zoom_out: + x = f->width / 2; + y = f->height / 2; + offset_x = (test_pat_idx * x) / tch_pattern_count; + offset_y = (test_pat_idx * y) / tch_pattern_count; + vivid_tch_buf_set(f, tch_buf, + (x - offset_x) + f->width * (y - offset_y)); + vivid_tch_buf_set(f, tch_buf, + (x + offset_x) + f->width * (y + offset_y)); + break; + case palm_press: + for (x = 0; x < f->width; x++) + for (y = f->height / 2; y < f->height; y++) + tch_buf[x + f->width * y] = vivid_min_pressure + + get_random_pressure(); + break; + case multiple_press: + /* 16 pressure points */ + for (y = 0; y < 4; y++) { + for (x = 0; x < 4; x++) { + ystart = (y * f->height) / 4 + f->height / 8; + xstart = (x * f->width) / 4 + f->width / 8; + vivid_tch_buf_set(f, tch_buf, + ystart * f->width + xstart); + } + } + break; + } +#ifdef __big_endian__ + for (x = 0; x < size; x++) + tch_buf[x] = (__force s16)__cpu_to_le16((u16)tch_buf[x]); +#endif +} diff --git a/drivers/media/platform/vivid/vivid-touch-cap.h b/drivers/media/platform/vivid/vivid-touch-cap.h --- /dev/null +++ b/drivers/media/platform/vivid/vivid-touch-cap.h +/* spdx-license-identifier: gpl-2.0-only */ +/* + * vivid-touch-cap.h - touch support functions. + */ +#ifndef _vivid_touch_cap_h_ +#define _vivid_touch_cap_h_ + +#define vivid_tch_height 12 +#define vivid_tch_width 21 +#define vivid_min_pressure 180 +#define vivid_pressure_limit 40 +#define tch_seq_count 16 +#define tch_pattern_count 12 + +enum vivid_tch_test { + single_tap, + double_tap, + triple_tap, + move_left_to_right, + zoom_in, + zoom_out, + palm_press, + multiple_press, + test_case_max +}; + +extern const struct vb2_ops vivid_touch_cap_qops; + +int vivid_enum_fmt_tch(struct file *file, void *priv, struct v4l2_fmtdesc *f); +int vivid_g_fmt_tch(struct file *file, void *priv, struct v4l2_format *f); +int vivid_enum_input_tch(struct file *file, void *priv, struct v4l2_input *inp); +int vivid_g_input_tch(struct file *file, void *priv, unsigned int *i); +int vivid_s_input_tch(struct file *file, void *priv, unsigned int i); +void vivid_fillbuff_tch(struct vivid_dev *dev, struct vivid_buffer *buf); +int vivid_set_touch(struct vivid_dev *dev, unsigned int i); +int vivid_g_parm_tch(struct file *file, void *priv, + struct v4l2_streamparm *parm); +#endif
|
TV tuners, webcams, video capturers
|
3d15c7643ba78b71c5c8fae25d7d9af52442882a
|
vandana bn
|
drivers
|
media
|
platform, vivid
|
media: vivid: support multiplanar touch devices
|
the v4l2-compliance tests failed with the touch device when multiplanar was enabled in vivid. since it is perfectly fine to support the multiplanar api for touch, add support for this in vivid.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
support multiplanar touch devices
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['vivid']
|
['c', 'h']
| 4
| 60
| 8
|
--- diff --git a/drivers/media/platform/vivid/vivid-core.c b/drivers/media/platform/vivid/vivid-core.c --- a/drivers/media/platform/vivid/vivid-core.c +++ b/drivers/media/platform/vivid/vivid-core.c +static int vivid_g_fmt_cap_mplane(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct video_device *vdev = video_devdata(file); + + if (vdev->vfl_type == vfl_type_touch) + return vivid_g_fmt_tch_mplane(file, priv, f); + return vidioc_g_fmt_vid_cap_mplane(file, priv, f); +} + +static int vivid_try_fmt_cap_mplane(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct video_device *vdev = video_devdata(file); + + if (vdev->vfl_type == vfl_type_touch) + return vivid_g_fmt_tch_mplane(file, priv, f); + return vidioc_try_fmt_vid_cap_mplane(file, priv, f); +} + +static int vivid_s_fmt_cap_mplane(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct video_device *vdev = video_devdata(file); + + if (vdev->vfl_type == vfl_type_touch) + return vivid_g_fmt_tch_mplane(file, priv, f); + return vidioc_s_fmt_vid_cap_mplane(file, priv, f); +} + - .vidioc_g_fmt_vid_cap_mplane = vidioc_g_fmt_vid_cap_mplane, - .vidioc_try_fmt_vid_cap_mplane = vidioc_try_fmt_vid_cap_mplane, - .vidioc_s_fmt_vid_cap_mplane = vidioc_s_fmt_vid_cap_mplane, + .vidioc_g_fmt_vid_cap_mplane = vivid_g_fmt_cap_mplane, + .vidioc_try_fmt_vid_cap_mplane = vivid_try_fmt_cap_mplane, + .vidioc_s_fmt_vid_cap_mplane = vivid_s_fmt_cap_mplane, - if (dev->has_touch_cap) - dev->touch_cap_caps = v4l2_cap_touch | v4l2_cap_video_capture | - v4l2_cap_streaming | v4l2_cap_readwrite; + if (dev->has_touch_cap) { + dev->touch_cap_caps = v4l2_cap_touch | v4l2_cap_streaming | + v4l2_cap_readwrite; + dev->touch_cap_caps |= dev->multiplanar ? + v4l2_cap_video_capture_mplane : v4l2_cap_video_capture; + } diff --git a/drivers/media/platform/vivid/vivid-touch-cap.c b/drivers/media/platform/vivid/vivid-touch-cap.c --- a/drivers/media/platform/vivid/vivid-touch-cap.c +++ b/drivers/media/platform/vivid/vivid-touch-cap.c +#include "vivid-vid-common.h" + if (dev->multiplanar) + return -enotty; +int vivid_g_fmt_tch_mplane(struct file *file, void *priv, struct v4l2_format *f) +{ + struct vivid_dev *dev = video_drvdata(file); + struct v4l2_format sp_fmt; + + if (!dev->multiplanar) + return -enotty; + sp_fmt.type = v4l2_buf_type_video_capture; + sp_fmt.fmt.pix = dev->tch_format; + fmt_sp2mp(&sp_fmt, f); + return 0; +} + - if (parm->type != v4l2_buf_type_video_capture) + if (parm->type != (dev->multiplanar ? + v4l2_buf_type_video_capture_mplane : + v4l2_buf_type_video_capture)) diff --git a/drivers/media/platform/vivid/vivid-touch-cap.h b/drivers/media/platform/vivid/vivid-touch-cap.h --- a/drivers/media/platform/vivid/vivid-touch-cap.h +++ b/drivers/media/platform/vivid/vivid-touch-cap.h +int vivid_g_fmt_tch_mplane(struct file *file, void *priv, struct v4l2_format *f); diff --git a/drivers/media/platform/vivid/vivid-vid-common.c b/drivers/media/platform/vivid/vivid-vid-common.c --- a/drivers/media/platform/vivid/vivid-vid-common.c +++ b/drivers/media/platform/vivid/vivid-vid-common.c - v4l2_cap_video_capture_mplane; + v4l2_buf_type_video_capture_mplane;
|
TV tuners, webcams, video capturers
|
0885acd77eb4644fd88f6d9f41e433f4ee9bc37a
|
hans verkuil
|
drivers
|
media
|
platform, vivid
|
usb: ehci: ehci-mv: add hsic support
|
some special dance is needed to initialize the hsic port.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add hsic support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['ehci', 'ehci-mv']
|
['c']
| 1
| 11
| 0
|
--- diff --git a/drivers/usb/host/ehci-mv.c b/drivers/usb/host/ehci-mv.c --- a/drivers/usb/host/ehci-mv.c +++ b/drivers/usb/host/ehci-mv.c +#include <linux/usb/of.h> + struct ehci_hcd *ehci = hcd_to_ehci(hcd); + u32 status; + if (of_usb_get_phy_mode(dev->of_node) == usbphy_interface_mode_hsic) { + status = ehci_readl(ehci, &ehci->regs->port_status[0]); + status |= port_test_force; + ehci_writel(ehci, status, &ehci->regs->port_status[0]); + status &= ~port_test_force; + ehci_writel(ehci, status, &ehci->regs->port_status[0]); + } +
|
Universal Serial Bus
|
7b104f890adea9b7ec554a491ac4d89a0a57ce96
|
lubomir rintel alan stern stern rowland harvard edu
|
drivers
|
usb
|
host
|
usb: cdns3: add streams support to cadence usb3 drd driver
|
this patch includes streams implementation changes. the current changes has been validated on fpga platform.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add streams support to cadence usb3 drd driver
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['cdns3']
|
['c', 'h']
| 3
| 596
| 56
|
--- diff --git a/drivers/usb/cdns3/gadget.c b/drivers/usb/cdns3/gadget.c --- a/drivers/usb/cdns3/gadget.c +++ b/drivers/usb/cdns3/gadget.c +static int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep, + struct usb_request *request); + +static int cdns3_ep_run_stream_transfer(struct cdns3_endpoint *priv_ep, + struct usb_request *request); + +/** + * cdns3_clear_register_bit - clear bit in given register. + * @ptr: address of device controller register to be read and changed + * @mask: bits requested to clar + */ +void cdns3_clear_register_bit(void __iomem *ptr, u32 mask) +{ + mask = readl(ptr) & ~mask; + writel(mask, ptr); +} + +/** + * cdns3_get_tdl - gets current tdl for selected endpoint. + * @priv_dev: extended gadget object + * + * before calling this function the appropriate endpoint must + * be selected by means of cdns3_select_ep function. + */ +static int cdns3_get_tdl(struct cdns3_device *priv_dev) +{ + if (priv_dev->dev_ver < dev_ver_v3) + return ep_cmd_tdl_get(readl(&priv_dev->regs->ep_cmd)); + else + return readl(&priv_dev->regs->ep_tdl); +} + - return trb_ring_size; + if (priv_ep->use_streams) + return trb_stream_ring_size; + else + return trb_ring_size; + } +} + +static void cdns3_free_trb_pool(struct cdns3_endpoint *priv_ep) +{ + struct cdns3_device *priv_dev = priv_ep->cdns3_dev; + + if (priv_ep->trb_pool) { + dma_free_coherent(priv_dev->sysdev, + cdns3_ring_size(priv_ep), + priv_ep->trb_pool, priv_ep->trb_pool_dma); + priv_ep->trb_pool = null; + int num_trbs = ring_size / trb_size; + if (priv_ep->trb_pool && priv_ep->alloc_ring_size < ring_size) + cdns3_free_trb_pool(priv_ep); + - } else { + + priv_ep->alloc_ring_size = ring_size; + priv_ep->num_trbs = num_trbs; + - priv_ep->num_trbs = ring_size / trb_size; - /* initialize the last trb as link trb. */ + /* initialize the last trb as link trb */ - link_trb->buffer = trb_buffer(priv_ep->trb_pool_dma); - link_trb->control = trb_cycle | trb_type(trb_link) | trb_toggle; - return 0; -} - -static void cdns3_free_trb_pool(struct cdns3_endpoint *priv_ep) -{ - struct cdns3_device *priv_dev = priv_ep->cdns3_dev; - - if (priv_ep->trb_pool) { - dma_free_coherent(priv_dev->sysdev, - cdns3_ring_size(priv_ep), - priv_ep->trb_pool, priv_ep->trb_pool_dma); - priv_ep->trb_pool = null; + if (priv_ep->use_streams) { + /* + * for stream capable endpoints driver use single correct trb. + * the last trb has zeroed cycle bit + */ + link_trb->control = 0; + } else { + link_trb->buffer = trb_buffer(priv_ep->trb_pool_dma); + link_trb->control = trb_cycle | trb_type(trb_link) | trb_toggle; + return 0; + priv_dev->using_streams = 0; + u8 pending_empty = list_empty(&priv_ep->pending_req_list); + + /* + * if the last pending transfer is internal + * or streams are enabled for this endpoint + * do not start new transfer till the last one is pending + */ + if (!pending_empty) { + struct cdns3_request *priv_req; + + request = cdns3_next_request(&priv_ep->pending_req_list); + priv_req = to_cdns3_request(request); + if ((priv_req->flags & request_internal) || + (priv_ep->flags & ep_tdlchk_en) || + priv_ep->use_streams) { + trace_printk("blocking external request "); + return ret; + } + } - ret = cdns3_ep_run_transfer(priv_ep, request); + if (!priv_ep->use_streams) { + ret = cdns3_ep_run_transfer(priv_ep, request); + } else { + priv_ep->stream_sg_idx = 0; + ret = cdns3_ep_run_stream_transfer(priv_ep, request); + } + if (request->stream_id != 0 || (priv_ep->flags & ep_tdlchk_en)) + break; -#define cdns3_wa2_enable_detection(priv_dev, ep_priv, reg) do { \ +#define cdns3_wa2_enable_detection(priv_dev, priv_ep, reg) do { \ + /* unmap the gadget request before copying data */ + usb_gadget_unmap_request_by_dev(priv_dev->sysdev, req, + priv_ep->dir); + + /* re-map the gadget request buffer*/ + usb_gadget_map_request_by_dev(priv_dev->sysdev, req, + usb_endpoint_dir_in(priv_ep->endpoint.desc)); + u8 pending_empty = list_empty(&priv_ep->pending_req_list); + + /* check for pending transfer */ + if (!pending_empty) { + trace_cdns3_wa2(priv_ep, "ignoring descriptor missing irq "); + return; + } - if (priv_ep->wa2_counter >= cdns3_wa2_num_buffers) + if (priv_ep->wa2_counter >= cdns3_wa2_num_buffers) { + trace_cdns3_wa2(priv_ep, "wa2 overflow "); + } +static void cdns3_wa2_reset_tdl(struct cdns3_device *priv_dev) +{ + u16 tdl = ep_cmd_tdl_get(readl(&priv_dev->regs->ep_cmd)); + + if (tdl) { + u16 reset_val = ep_cmd_tdl_max + 1 - tdl; + + writel(ep_cmd_tdl_set(reset_val) | ep_cmd_stdl, + &priv_dev->regs->ep_cmd); + } +} + +static void cdns3_wa2_check_outq_status(struct cdns3_device *priv_dev) +{ + u32 ep_sts_reg; + + /* select ep0-out */ + cdns3_select_ep(priv_dev, 0); + + ep_sts_reg = readl(&priv_dev->regs->ep_sts); + + if (ep_sts_outq_val(ep_sts_reg)) { + u32 outq_ep_num = ep_sts_outq_no(ep_sts_reg); + struct cdns3_endpoint *outq_ep = priv_dev->eps[outq_ep_num]; + + if ((outq_ep->flags & ep_enabled) && !(outq_ep->use_streams) && + outq_ep->type != usb_endpoint_xfer_isoc && outq_ep_num) { + u8 pending_empty = list_empty(&outq_ep->pending_req_list); + + if ((outq_ep->flags & ep_quirk_extra_buf_det) || + (outq_ep->flags & ep_quirk_extra_buf_en) || + !pending_empty) { + } else { + u32 ep_sts_en_reg; + u32 ep_cmd_reg; + + cdns3_select_ep(priv_dev, outq_ep->num | + outq_ep->dir); + ep_sts_en_reg = readl(&priv_dev->regs->ep_sts_en); + ep_cmd_reg = readl(&priv_dev->regs->ep_cmd); + + outq_ep->flags |= ep_tdlchk_en; + cdns3_set_register_bit(&priv_dev->regs->ep_cfg, + ep_cfg_tdl_chk); + + cdns3_wa2_enable_detection(priv_dev, outq_ep, + ep_sts_en_reg); + writel(ep_sts_en_reg, + &priv_dev->regs->ep_sts_en); + /* reset tdl value to zero */ + cdns3_wa2_reset_tdl(priv_dev); + /* + * memory barrier - reset tdl before ringing the + * doorbell. + */ + wmb(); + if (ep_cmd_drdy & ep_cmd_reg) { + trace_cdns3_wa2(outq_ep, "enabling wa2 skipping doorbell "); + + } else { + trace_cdns3_wa2(outq_ep, "enabling wa2 ringing doorbell "); + /* + * ring doorbell to generate descmis irq + */ + writel(ep_cmd_drdy, + &priv_dev->regs->ep_cmd); + } + } + } + } +} + +static int cdns3_ep_run_stream_transfer(struct cdns3_endpoint *priv_ep, + struct usb_request *request) +{ + struct cdns3_device *priv_dev = priv_ep->cdns3_dev; + struct cdns3_request *priv_req; + struct cdns3_trb *trb; + dma_addr_t trb_dma; + int address; + u32 control; + u32 length; + u32 tdl; + unsigned int sg_idx = priv_ep->stream_sg_idx; + + priv_req = to_cdns3_request(request); + address = priv_ep->endpoint.desc->bendpointaddress; + + priv_ep->flags |= ep_pending_request; + + /* must allocate buffer aligned to 8 */ + if (priv_req->flags & request_unaligned) + trb_dma = priv_req->aligned_buf->dma; + else + trb_dma = request->dma; + + /* for stream capable endpoints driver use only single td. */ + trb = priv_ep->trb_pool + priv_ep->enqueue; + priv_req->start_trb = priv_ep->enqueue; + priv_req->end_trb = priv_req->start_trb; + priv_req->trb = trb; + + cdns3_select_ep(priv_ep->cdns3_dev, address); + + control = trb_type(trb_normal) | trb_cycle | + trb_stream_id(priv_req->request.stream_id) | trb_isp; + + if (!request->num_sgs) { + trb->buffer = trb_buffer(trb_dma); + length = request->length; + } else { + trb->buffer = trb_buffer(request->sg[sg_idx].dma_address); + length = request->sg[sg_idx].length; + } + + tdl = div_round_up(length, priv_ep->endpoint.maxpacket); + + trb->length = trb_burst_len(16 /*priv_ep->trb_burst_size*/) | + trb_len(length); + + /* + * for dev_ver_v2 controller version we have enabled + * usb_conf2_en_tdl_trb in dmult configuration. + * this enables tdl calculation based on trb, hence setting tdl in trb. + */ + if (priv_dev->dev_ver >= dev_ver_v2) { + if (priv_dev->gadget.speed == usb_speed_super) + trb->length |= trb_tdl_ss_size(tdl); + } + priv_req->flags |= request_pending; + + trb->control = control; + + trace_cdns3_prepare_trb(priv_ep, priv_req->trb); + + /* + * memory barrier - cycle bit must be set before trb->length and + * trb->buffer fields. + */ + wmb(); + + /* always first element */ + writel(ep_traddr_traddr(priv_ep->trb_pool_dma), + &priv_dev->regs->ep_traddr); + + if (!(priv_ep->flags & ep_stalled)) { + trace_cdns3_ring(priv_ep); + /*clearing trberr and ep_sts_descmis before seting drdy*/ + writel(ep_sts_trberr | ep_sts_descmis, &priv_dev->regs->ep_sts); + + priv_ep->prime_flag = false; + + /* + * controller version dev_ver_v2 tdl calculation + * is based on trb + */ + + if (priv_dev->dev_ver < dev_ver_v2) + writel(ep_cmd_tdl_set(tdl) | ep_cmd_stdl, + &priv_dev->regs->ep_cmd); + else if (priv_dev->dev_ver > dev_ver_v2) + writel(tdl, &priv_dev->regs->ep_tdl); + + priv_ep->last_stream_id = priv_req->request.stream_id; + writel(ep_cmd_drdy, &priv_dev->regs->ep_cmd); + writel(ep_cmd_erdy_sid(priv_req->request.stream_id) | + ep_cmd_erdy, &priv_dev->regs->ep_cmd); + + trace_cdns3_doorbell_epx(priv_ep->name, + readl(&priv_dev->regs->ep_traddr)); + } + + /* workaround for transition to l0 */ + __cdns3_gadget_wakeup(priv_dev); + + return 0; +} + -int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep, - struct usb_request *request) +static int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep, + struct usb_request *request) + u16 total_tdl = 0; + else if (priv_ep->flags & ep_tdlchk_en) + total_tdl += div_round_up(length, + priv_ep->endpoint.maxpacket); + if (priv_dev->dev_ver < dev_ver_v2 && + (priv_ep->flags & ep_tdlchk_en)) { + u16 tdl = total_tdl; + u16 old_tdl = ep_cmd_tdl_get(readl(&priv_dev->regs->ep_cmd)); + + if (tdl > ep_cmd_tdl_max) { + tdl = ep_cmd_tdl_max; + priv_ep->pending_tdl = total_tdl - ep_cmd_tdl_max; + } + + if (old_tdl < tdl) { + tdl -= old_tdl; + writel(ep_cmd_tdl_set(tdl) | ep_cmd_stdl, + &priv_dev->regs->ep_cmd); + } + } + - /* re-select endpoint. it could be changed by other cpu during - * handling usb_gadget_giveback_request. - */ - cdns3_select_ep(priv_dev, priv_ep->endpoint.address); + if (!request->stream_id) { + /* re-select endpoint. it could be changed by other cpu + * during handling usb_gadget_giveback_request. + */ + cdns3_select_ep(priv_dev, priv_ep->endpoint.address); - if (!cdns3_request_handled(priv_ep, priv_req)) - goto prepare_next_td; + if (!cdns3_request_handled(priv_ep, priv_req)) + goto prepare_next_td; - trb = priv_ep->trb_pool + priv_ep->dequeue; - trace_cdns3_complete_trb(priv_ep, trb); + trb = priv_ep->trb_pool + priv_ep->dequeue; + trace_cdns3_complete_trb(priv_ep, trb); + + if (trb != priv_req->trb) + dev_warn(priv_dev->dev, + "request_trb=0x%p, queue_trb=0x%p ", + priv_req->trb, trb); + + request->actual = trb_len(le32_to_cpu(trb->length)); + cdns3_move_deq_to_next_trb(priv_req); + cdns3_gadget_giveback(priv_ep, priv_req, 0); + + if (priv_ep->type != usb_endpoint_xfer_isoc && + trbs_per_segment == 2) + break; + } else { + /* re-select endpoint. it could be changed by other cpu + * during handling usb_gadget_giveback_request. + */ + cdns3_select_ep(priv_dev, priv_ep->endpoint.address); + + trb = priv_ep->trb_pool; + trace_cdns3_complete_trb(priv_ep, trb); - if (trb != priv_req->trb) - dev_warn(priv_dev->dev, - "request_trb=0x%p, queue_trb=0x%p ", - priv_req->trb, trb); + if (trb != priv_req->trb) + dev_warn(priv_dev->dev, + "request_trb=0x%p, queue_trb=0x%p ", + priv_req->trb, trb); - request->actual = trb_len(le32_to_cpu(trb->length)); - cdns3_move_deq_to_next_trb(priv_req); - cdns3_gadget_giveback(priv_ep, priv_req, 0); + request->actual += trb_len(le32_to_cpu(trb->length)); - if (priv_ep->type != usb_endpoint_xfer_isoc && - trbs_per_segment == 2) + if (!request->num_sgs || + (request->num_sgs == (priv_ep->stream_sg_idx + 1))) { + priv_ep->stream_sg_idx = 0; + cdns3_gadget_giveback(priv_ep, priv_req, 0); + } else { + priv_ep->stream_sg_idx++; + cdns3_ep_run_stream_transfer(priv_ep, request); + } + } +static void cdns3_reprogram_tdl(struct cdns3_endpoint *priv_ep) +{ + u16 tdl = priv_ep->pending_tdl; + struct cdns3_device *priv_dev = priv_ep->cdns3_dev; + + if (tdl > ep_cmd_tdl_max) { + tdl = ep_cmd_tdl_max; + priv_ep->pending_tdl -= ep_cmd_tdl_max; + } else { + priv_ep->pending_tdl = 0; + } + + writel(ep_cmd_tdl_set(tdl) | ep_cmd_stdl, &priv_dev->regs->ep_cmd); +} + + struct usb_request *deferred_request; + struct usb_request *pending_request; + u32 tdl = 0; + if ((ep_sts_reg & ep_sts_prime) && priv_ep->use_streams) { + bool dbusy = !!(ep_sts_reg & ep_sts_dbusy); + + tdl = cdns3_get_tdl(priv_dev); + + /* + * continue the previous transfer: + * there is some racing between erdy and prime. the device send + * erdy and almost in the same time host send prime. it cause + * that host ignore the erdy packet and driver has to send it + * again. + */ + if (tdl && (dbusy | !ep_sts_buffempty(ep_sts_reg) | + ep_sts_hostpp(ep_sts_reg))) { + writel(ep_cmd_erdy | + ep_cmd_erdy_sid(priv_ep->last_stream_id), + &priv_dev->regs->ep_cmd); + ep_sts_reg &= ~(ep_sts_md_exit | ep_sts_ioc); + } else { + priv_ep->prime_flag = true; + + pending_request = cdns3_next_request(&priv_ep->pending_req_list); + deferred_request = cdns3_next_request(&priv_ep->deferred_req_list); + + if (deferred_request && !pending_request) { + cdns3_start_all_request(priv_dev, priv_ep); + } + } + } + - if ((ep_sts_reg & ep_sts_ioc) || (ep_sts_reg & ep_sts_isp)) { + if ((ep_sts_reg & ep_sts_ioc) || (ep_sts_reg & ep_sts_isp) || + (ep_sts_reg & ep_sts_iot)) { + if (!priv_ep->use_streams) { + if ((ep_sts_reg & ep_sts_ioc) || + (ep_sts_reg & ep_sts_isp)) { + cdns3_transfer_completed(priv_dev, priv_ep); + } else if ((priv_ep->flags & ep_tdlchk_en) & + priv_ep->pending_tdl) { + /* handle iot with pending tdl */ + cdns3_reprogram_tdl(priv_ep); + } + } else if (priv_ep->dir == usb_dir_out) { + priv_ep->ep_sts_pending |= ep_sts_reg; + } else if (ep_sts_reg & ep_sts_iot) { + cdns3_transfer_completed(priv_dev, priv_ep); + } + } + + /* + * md_exit interrupt sets when stream capable endpoint exits + * from move data state of bulk in/out stream protocol state machine + */ + if (priv_ep->dir == usb_dir_out && (ep_sts_reg & ep_sts_md_exit) && + (priv_ep->ep_sts_pending & ep_sts_iot) && priv_ep->use_streams) { + priv_ep->ep_sts_pending = 0; - * in other cases this interrupt will be disabled/ + * in other cases this interrupt will be disabled. + if (priv_dev->dev_ver < dev_ver_v2 && priv_dev->using_streams) + cdns3_wa2_check_outq_status(priv_dev); + +void cdns3_stream_ep_reconfig(struct cdns3_device *priv_dev, + struct cdns3_endpoint *priv_ep) +{ + if (!priv_ep->use_streams || priv_dev->gadget.speed < usb_speed_super) + return; + + if (priv_dev->dev_ver >= dev_ver_v3) { + u32 mask = bit(priv_ep->num + (priv_ep->dir ? 16 : 0)); + + /* + * stream capable endpoints are handled by using ep_tdl + * register. other endpoints use tdl from trb feature. + */ + cdns3_clear_register_bit(&priv_dev->regs->tdl_from_trb, mask); + } + + /* enable stream bit tdl chk and sid chk */ + cdns3_set_register_bit(&priv_dev->regs->ep_cfg, ep_cfg_stream_en | + ep_cfg_tdl_chk | ep_cfg_sid_chk); +} + + const struct usb_ss_ep_comp_descriptor *comp_desc; + comp_desc = priv_ep->endpoint.comp_desc; + bendpointaddress = priv_ep->num | priv_ep->dir; + cdns3_select_ep(priv_dev, bendpointaddress); + + if (usb_ss_max_streams(comp_desc) && usb_endpoint_xfer_bulk(desc)) { + /* + * enable stream support (ss mode) related interrupts + * in ep_sts_en register + */ + if (priv_dev->gadget.speed >= usb_speed_super) { + reg |= ep_sts_en_ioten | ep_sts_en_primeeen | + ep_sts_en_siderren | ep_sts_en_md_exiten | + ep_sts_en_streamren; + priv_ep->use_streams = true; + cdns3_stream_ep_reconfig(priv_dev, priv_ep); + priv_dev->using_streams |= true; + } + } + + priv_ep->use_streams = false; + * for stream capable endpoint if prime irq flag is set then only start + * request. - if (priv_dev->hw_configured_flag && !(priv_ep->flags & ep_stalled) && - !(priv_ep->flags & ep_stall_pending)) - cdns3_start_all_request(priv_dev, priv_ep); + if (!request->stream_id) { + if (priv_dev->hw_configured_flag && + !(priv_ep->flags & ep_stalled) && + !(priv_ep->flags & ep_stall_pending)) + cdns3_start_all_request(priv_dev, priv_ep); + } else { + if (priv_dev->hw_configured_flag && priv_ep->prime_flag) + cdns3_start_all_request(priv_dev, priv_ep); + } diff --git a/drivers/usb/cdns3/gadget.h b/drivers/usb/cdns3/gadget.h --- a/drivers/usb/cdns3/gadget.h +++ b/drivers/usb/cdns3/gadget.h +#define ep_cmd_tdl_max (ep_cmd_tdl_mask >> 9) +#define max_trb_length bit(16) + +#define trbs_per_stream_segment 2 + +#if trbs_per_stream_segment < 2 +#error "incorrect trbs_per_streams_segment. minimal transfer ring size is 2." +#endif + +#define trb_stream_ring_size (trb_size * trbs_per_stream_segment) -#define cdns3_ep_buf_size 2 /* kb */ +#define cdns3_ep_buf_size 4 /* kb */ + * @alloc_ring_size: size of the allocated trb ring +#define ep_tdlchk_en bit(15) + int alloc_ring_size; + + /* stream related */ + unsigned int use_streams:1; + unsigned int prime_flag:1; + u32 ep_sts_pending; + u16 last_stream_id; + u16 pending_tdl; + unsigned int stream_sg_idx; + unsigned using_streams:1; -int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep, - struct usb_request *request); diff --git a/drivers/usb/cdns3/trace.h b/drivers/usb/cdns3/trace.h --- a/drivers/usb/cdns3/trace.h +++ b/drivers/usb/cdns3/trace.h + __field(u32, ep_last_sid) + __field(u32, use_streams) + __entry->ep_last_sid = priv_ep->last_stream_id; + __entry->use_streams = priv_ep->use_streams; - tp_printk("%s, ep_traddr: %08x", + tp_printk("%s, ep_traddr: %08x ep_last_sid: %08x use_streams: %d", - __entry->ep_traddr) + __entry->ep_traddr, + __entry->ep_last_sid, + __entry->use_streams) + __field(unsigned int, stream_id) + __entry->stream_id = req->request.stream_id; - " trb: [start:%d, end:%d: virt addr %pa], flags:%x ", + " trb: [start:%d, end:%d: virt addr %pa], flags:%x sid: %u", - __entry->flags + __entry->flags, + __entry->stream_id +declare_event_class(cdns3_stream_split_transfer_len, + tp_proto(struct cdns3_request *req), + tp_args(req), + tp_struct__entry( + __string(name, req->priv_ep->name) + __field(struct cdns3_request *, req) + __field(unsigned int, length) + __field(unsigned int, actual) + __field(unsigned int, stream_id) + ), + tp_fast_assign( + __assign_str(name, req->priv_ep->name); + __entry->req = req; + __entry->actual = req->request.length; + __entry->length = req->request.actual; + __entry->stream_id = req->request.stream_id; + ), + tp_printk("%s: req: %p,request length: %u actual length: %u sid: %u", + __get_str(name), __entry->req, __entry->length, + __entry->actual, __entry->stream_id) +); + +define_event(cdns3_stream_split_transfer_len, cdns3_stream_transfer_split, + tp_proto(struct cdns3_request *req), + tp_args(req) +); + +define_event(cdns3_stream_split_transfer_len, + cdns3_stream_transfer_split_next_part, + tp_proto(struct cdns3_request *req), + tp_args(req) +); + +declare_event_class(cdns3_log_map_request, + tp_proto(struct cdns3_request *priv_req), + tp_args(priv_req), + tp_struct__entry( + __string(name, priv_req->priv_ep->name) + __field(struct usb_request *, req) + __field(void *, buf) + __field(dma_addr_t, dma) + ), + tp_fast_assign( + __assign_str(name, priv_req->priv_ep->name); + __entry->req = &priv_req->request; + __entry->buf = priv_req->request.buf; + __entry->dma = priv_req->request.dma; + ), + tp_printk("%s: req: %p, req buf %p, dma %p", + __get_str(name), __entry->req, __entry->buf, &__entry->dma + ) +); +define_event(cdns3_log_map_request, cdns3_map_request, + tp_proto(struct cdns3_request *req), + tp_args(req) +); +define_event(cdns3_log_map_request, cdns3_mapped_request, + tp_proto(struct cdns3_request *req), + tp_args(req) +); + + __field(unsigned int, last_stream_id) + __entry->last_stream_id = priv_ep->last_stream_id; - tp_printk("%s: trb %p, dma buf: 0x%08x, size: %ld, burst: %d ctrl: 0x%08x (%s%s%s%s%s%s%s)", + tp_printk("%s: trb %p, dma buf: 0x%08x, size: %ld, burst: %d ctrl: 0x%08x (%s%s%s%s%s%s%s) sid:%lu last_sid:%u", - trb_field_to_type(__entry->control) == trb_normal ? "normal" : "link" + trb_field_to_type(__entry->control) == trb_normal ? "normal" : "link", + trb_field_to_streamid(__entry->control), + __entry->last_stream_id + __field(unsigned int, use_streams) + __entry->use_streams = priv_ep->use_streams; - tp_printk("%s: mps: %d/%d. streams: %d, burst: %d, enq idx: %d, " - "deq idx: %d, flags %s%s%s%s%s%s%s%s, dir: %s", + tp_printk("%s: mps: %d/%d. streams: %d, stream enable: %d, burst: %d, " + "enq idx: %d, deq idx: %d, flags %s%s%s%s%s%s%s%s, dir: %s", + __entry->use_streams,
|
Universal Serial Bus
|
54c4c69f0baa433233a0c33b4ed26bf0659bc5a5
|
jayshri pawar
|
drivers
|
usb
|
cdns3
|
usb: cdns3: add nxp imx8qm glue layer
|
there is a cadence usb3 core for imx8qm and imx8qxp socs, the cdns core is the child for this glue layer device.
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this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add nxp imx8qm glue layer
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['cdns3']
|
['c', 'kconfig', 'makefile']
| 3
| 227
| 0
|
--- diff --git a/drivers/usb/cdns3/kconfig b/drivers/usb/cdns3/kconfig --- a/drivers/usb/cdns3/kconfig +++ b/drivers/usb/cdns3/kconfig +config usb_cdns3_imx + tristate "cadence usb3 support on nxp i.mx platforms" + depends on arch_mxc || compile_test + default usb_cdns3 + help + say 'y' or 'm' here if you are building for nxp i.mx + platforms that contain cadence usb3 controller core. + + for example, imx8qm and imx8qxp. + diff --git a/drivers/usb/cdns3/makefile b/drivers/usb/cdns3/makefile --- a/drivers/usb/cdns3/makefile +++ b/drivers/usb/cdns3/makefile +obj-$(config_usb_cdns3_imx) += cdns3-imx.o diff --git a/drivers/usb/cdns3/cdns3-imx.c b/drivers/usb/cdns3/cdns3-imx.c --- /dev/null +++ b/drivers/usb/cdns3/cdns3-imx.c +// spdx-license-identifier: gpl-2.0 +/** + * cdns3-imx.c - nxp i.mx specific glue layer for cadence usb controller + * + * copyright (c) 2019 nxp + */ + +#include <linux/bits.h> +#include <linux/clk.h> +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/interrupt.h> +#include <linux/platform_device.h> +#include <linux/dma-mapping.h> +#include <linux/io.h> +#include <linux/of_platform.h> +#include <linux/iopoll.h> + +#define usb3_core_ctrl1 0x00 +#define usb3_core_ctrl2 0x04 +#define usb3_int_reg 0x08 +#define usb3_core_status 0x0c +#define xhci_debug_link_st 0x10 +#define xhci_debug_bus 0x14 +#define usb3_ssphy_ctrl1 0x40 +#define usb3_ssphy_ctrl2 0x44 +#define usb3_ssphy_status 0x4c +#define usb2_phy_ctrl1 0x50 +#define usb2_phy_ctrl2 0x54 +#define usb2_phy_status 0x5c + +/* register bits definition */ + +/* usb3_core_ctrl1 */ +#define sw_reset_mask (0x3f << 26) +#define pwr_sw_reset bit(31) +#define apb_sw_reset bit(30) +#define axi_sw_reset bit(29) +#define rw_sw_reset bit(28) +#define phy_sw_reset bit(27) +#define phyahb_sw_reset bit(26) +#define all_sw_reset (pwr_sw_reset | apb_sw_reset | axi_sw_reset | \ + rw_sw_reset | phy_sw_reset | phyahb_sw_reset) +#define oc_disable bit(9) +#define mdctrl_clk_sel bit(7) +#define mode_strap_mask (0x7) +#define dev_mode (1 << 2) +#define host_mode (1 << 1) +#define otg_mode (1 << 0) + +/* usb3_int_reg */ +#define clk_125_req bit(29) +#define lpm_clk_req bit(28) +#define devu3_waekup_en bit(14) +#define otg_wakeup_en bit(12) +#define dev_int_en (3 << 8) /* dev int b9:8 */ +#define host_int1_en (1 << 0) /* host int b7:0 */ + +/* usb3_core_status */ +#define mdctrl_clk_status bit(15) +#define dev_power_on_ready bit(13) +#define host_power_on_ready bit(12) + +/* usb3_ssphy_status */ +#define clk_valid_mask (0x3f << 26) +#define clk_valid_compare_bits (0xf << 28) +#define phy_refclk_req (1 << 0) + +struct cdns_imx { + struct device *dev; + void __iomem *noncore; + struct clk_bulk_data *clks; + int num_clks; +}; + +static inline u32 cdns_imx_readl(struct cdns_imx *data, u32 offset) +{ + return readl(data->noncore + offset); +} + +static inline void cdns_imx_writel(struct cdns_imx *data, u32 offset, u32 value) +{ + writel(value, data->noncore + offset); +} + +static const struct clk_bulk_data imx_cdns3_core_clks[] = { + { .id = "usb3_lpm_clk" }, + { .id = "usb3_bus_clk" }, + { .id = "usb3_aclk" }, + { .id = "usb3_ipg_clk" }, + { .id = "usb3_core_pclk" }, +}; + +static int cdns_imx_noncore_init(struct cdns_imx *data) +{ + u32 value; + int ret; + struct device *dev = data->dev; + + cdns_imx_writel(data, usb3_ssphy_status, clk_valid_mask); + udelay(1); + ret = readl_poll_timeout(data->noncore + usb3_ssphy_status, value, + (value & clk_valid_compare_bits) == clk_valid_compare_bits, + 10, 100000); + if (ret) { + dev_err(dev, "wait clkvld timeout "); + return ret; + } + + value = cdns_imx_readl(data, usb3_core_ctrl1); + value |= all_sw_reset; + cdns_imx_writel(data, usb3_core_ctrl1, value); + udelay(1); + + value = cdns_imx_readl(data, usb3_core_ctrl1); + value = (value & ~mode_strap_mask) | otg_mode | oc_disable; + cdns_imx_writel(data, usb3_core_ctrl1, value); + + value = cdns_imx_readl(data, usb3_int_reg); + value |= host_int1_en | dev_int_en; + cdns_imx_writel(data, usb3_int_reg, value); + + value = cdns_imx_readl(data, usb3_core_ctrl1); + value &= ~all_sw_reset; + cdns_imx_writel(data, usb3_core_ctrl1, value); + return ret; +} + +static int cdns_imx_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct device_node *node = dev->of_node; + struct cdns_imx *data; + int ret; + + if (!node) + return -enodev; + + data = devm_kzalloc(dev, sizeof(*data), gfp_kernel); + if (!data) + return -enomem; + + platform_set_drvdata(pdev, data); + data->dev = dev; + data->noncore = devm_platform_ioremap_resource(pdev, 0); + if (is_err(data->noncore)) { + dev_err(dev, "can't map iomem resource "); + return ptr_err(data->noncore); + } + + data->num_clks = array_size(imx_cdns3_core_clks); + data->clks = (struct clk_bulk_data *)imx_cdns3_core_clks; + ret = devm_clk_bulk_get(dev, data->num_clks, data->clks); + if (ret) + return ret; + + ret = clk_bulk_prepare_enable(data->num_clks, data->clks); + if (ret) + return ret; + + ret = cdns_imx_noncore_init(data); + if (ret) + goto err; + + ret = of_platform_populate(node, null, null, dev); + if (ret) { + dev_err(dev, "failed to create children: %d ", ret); + goto err; + } + + return ret; + +err: + clk_bulk_disable_unprepare(data->num_clks, data->clks); + return ret; +} + +static int cdns_imx_remove_core(struct device *dev, void *data) +{ + struct platform_device *pdev = to_platform_device(dev); + + platform_device_unregister(pdev); + + return 0; +} + +static int cdns_imx_remove(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + + device_for_each_child(dev, null, cdns_imx_remove_core); + platform_set_drvdata(pdev, null); + + return 0; +} + +static const struct of_device_id cdns_imx_of_match[] = { + { .compatible = "fsl,imx8qm-usb3", }, + {}, +}; +module_device_table(of, cdns_imx_of_match); + +static struct platform_driver cdns_imx_driver = { + .probe = cdns_imx_probe, + .remove = cdns_imx_remove, + .driver = { + .name = "cdns3-imx", + .of_match_table = cdns_imx_of_match, + }, +}; +module_platform_driver(cdns_imx_driver); + +module_alias("platform:cdns3-imx"); +module_author("peter chen <peter.chen@nxp.com>"); +module_license("gpl v2"); +module_description("cadence usb3 i.mx glue layer");
|
Universal Serial Bus
|
1e056efab9931366d1e1685736dfc978eca3bf06
|
peter chen
|
drivers
|
usb
|
cdns3
|
usb: dwc3: pci: add id for the intel comet lake -v variant
|
there is one more comet lake pch variant, cml-v, that has its own pci id.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add id for the intel comet lake -v variant
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['dwc3', 'pci']
|
['c']
| 1
| 4
| 0
|
--- diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c --- a/drivers/usb/dwc3/dwc3-pci.c +++ b/drivers/usb/dwc3/dwc3-pci.c +#define pci_device_id_intel_cnpv 0xa3b0 + { pci_vdevice(intel, pci_device_id_intel_cnpv), + (kernel_ulong_t) &dwc3_pci_intel_properties, }, +
|
Universal Serial Bus
|
f5ae8869095552e3396ee3e404f9586cc6a828f0
|
heikki krogerus
|
drivers
|
usb
|
dwc3
|
usb: gadget: composite: support more than 500ma maxpower
|
usb 3.x superspeed peripherals can draw up to 900ma of vbus power when in configured state. however, if a configuration wanting to take advantage of this is added with maxpower greater than 500 (currently possible if using a configfs gadget) the composite driver fails to accommodate this for a couple reasons:
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
support more than 500ma maxpower
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['gadget', 'composite']
|
['c']
| 1
| 18
| 6
|
- usb_gadget_vbus_draw() when called from set_config() and - the bmaxpower of the configuration descriptor would be --- diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c --- a/drivers/usb/gadget/composite.c +++ b/drivers/usb/gadget/composite.c - return div_round_up(val, 2); + return min(val, 500u) / 2; - return div_round_up(val, 8); + /* + * usb 3.x supports up to 900ma, but since 900 isn't divisible + * by 8 the integral division will effectively cap to 896ma. + */ + return min(val, 900u) / 8; + if (gadget->speed < usb_speed_super) + power = min(power, 500u); + else + power = min(power, 900u); - u16 maxpower; + unsigned maxpower; - maxpower = cdev->config->maxpower; + maxpower = cdev->config->maxpower ? + cdev->config->maxpower : config_usb_gadget_vbus_draw; + if (gadget->speed < usb_speed_super) + maxpower = min(maxpower, 500u); + else + maxpower = min(maxpower, 900u); - usb_gadget_vbus_draw(gadget, maxpower ? - maxpower : config_usb_gadget_vbus_draw); + usb_gadget_vbus_draw(gadget, maxpower);
|
Universal Serial Bus
|
a2035411fa1d1206cea7d5dfe833e78481844a76
|
jack pham
|
drivers
|
usb
|
gadget
|
usb: gadget: configfs: add max_speed setting
|
some functions support speeds other than superspeed. add max_speed attribute to configfs gadget allowing user to specify the maximum speed the composite driver supports. the valid input speed names are super-speed-plus, super-speed, high-speed, full-speed, and low-speed.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add max_speed setting
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['gadget', 'configfs']
|
['c', 'configfs-usb-gadget']
| 2
| 47
| 0
|
--- diff --git a/documentation/abi/testing/configfs-usb-gadget b/documentation/abi/testing/configfs-usb-gadget --- a/documentation/abi/testing/configfs-usb-gadget +++ b/documentation/abi/testing/configfs-usb-gadget + max_speed - maximum speed the driver supports. valid + names are super-speed-plus, super-speed, + high-speed, full-speed, and low-speed. + diff --git a/drivers/usb/gadget/configfs.c b/drivers/usb/gadget/configfs.c --- a/drivers/usb/gadget/configfs.c +++ b/drivers/usb/gadget/configfs.c +static ssize_t gadget_dev_desc_max_speed_show(struct config_item *item, + char *page) +{ + enum usb_device_speed speed = to_gadget_info(item)->composite.max_speed; + + return sprintf(page, "%s ", usb_speed_string(speed)); +} + +static ssize_t gadget_dev_desc_max_speed_store(struct config_item *item, + const char *page, size_t len) +{ + struct gadget_info *gi = to_gadget_info(item); + + mutex_lock(&gi->lock); + + /* prevent changing of max_speed after the driver is binded */ + if (gi->composite.gadget_driver.udc_name) + goto err; + + if (strncmp(page, "super-speed-plus", 16) == 0) + gi->composite.max_speed = usb_speed_super_plus; + else if (strncmp(page, "super-speed", 11) == 0) + gi->composite.max_speed = usb_speed_super; + else if (strncmp(page, "high-speed", 10) == 0) + gi->composite.max_speed = usb_speed_high; + else if (strncmp(page, "full-speed", 10) == 0) + gi->composite.max_speed = usb_speed_full; + else if (strncmp(page, "low-speed", 9) == 0) + gi->composite.max_speed = usb_speed_low; + else + goto err; + + gi->composite.gadget_driver.max_speed = gi->composite.max_speed; + + mutex_unlock(&gi->lock); + return len; +err: + mutex_unlock(&gi->lock); + return -einval; +} + +configfs_attr(gadget_dev_desc_, max_speed); + &gadget_dev_desc_attr_max_speed,
|
Universal Serial Bus
|
a02497033e8e04c30501abb78c92d862982b9912
|
thinh nguyen
|
drivers
|
usb
|
gadget, testing
|
usb: gadget: legacy: set max_speed to super-speed
|
these interfaces do support super-speed so let's not limit maximum speed to high-speed.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add max_speed setting
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['gadget', 'configfs']
|
['c']
| 4
| 4
| 4
|
--- diff --git a/drivers/usb/gadget/legacy/cdc2.c b/drivers/usb/gadget/legacy/cdc2.c --- a/drivers/usb/gadget/legacy/cdc2.c +++ b/drivers/usb/gadget/legacy/cdc2.c - .max_speed = usb_speed_high, + .max_speed = usb_speed_super, diff --git a/drivers/usb/gadget/legacy/g_ffs.c b/drivers/usb/gadget/legacy/g_ffs.c --- a/drivers/usb/gadget/legacy/g_ffs.c +++ b/drivers/usb/gadget/legacy/g_ffs.c - .max_speed = usb_speed_high, + .max_speed = usb_speed_super, diff --git a/drivers/usb/gadget/legacy/multi.c b/drivers/usb/gadget/legacy/multi.c --- a/drivers/usb/gadget/legacy/multi.c +++ b/drivers/usb/gadget/legacy/multi.c - .max_speed = usb_speed_high, + .max_speed = usb_speed_super, diff --git a/drivers/usb/gadget/legacy/ncm.c b/drivers/usb/gadget/legacy/ncm.c --- a/drivers/usb/gadget/legacy/ncm.c +++ b/drivers/usb/gadget/legacy/ncm.c - .max_speed = usb_speed_high, + .max_speed = usb_speed_super,
|
Universal Serial Bus
|
463f67aec2837f981b0a0ce8617721ff59685c00
|
roger quadros
|
drivers
|
usb
|
gadget, legacy
|
usb: host: xhci-tegra: fix "tega" -> "tegra" typo
|
the tegra_xusb_mbox_regs structure was misspelled tega_xusb_mbox_regs. fortunately this was done consistently so it didn't cause any issues.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
implement basic elpg support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['xhci-tegra']
|
['c']
| 1
| 2
| 2
|
--- diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c -struct tega_xusb_mbox_regs { +struct tegra_xusb_mbox_regs { - struct tega_xusb_mbox_regs mbox; + struct tegra_xusb_mbox_regs mbox;
|
Universal Serial Bus
|
c763771504d158abefcdb965df632d09f7602e9f
|
thierry reding jc kuo jckuo nvidia com
|
drivers
|
usb
|
host
|
usb: host: xhci-tegra: separate firmware request and load
|
subsequent patches for system suspend/resume support will need to reload the firmware on resume. since the firmware remains in system memory, the driver doesn't need to reload it from the filesystem. however, the xusb controller will be reset across suspend/resume, so it needs to load the firmware into its microcontroller on resume.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
implement basic elpg support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['xhci-tegra']
|
['c']
| 1
| 30
| 10
|
--- diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c -static int tegra_xusb_load_firmware(struct tegra_xusb *tegra) +static int tegra_xusb_request_firmware(struct tegra_xusb *tegra) - unsigned int code_tag_blocks, code_size_blocks, code_blocks; - struct device *dev = tegra->dev; - unsigned long timeout; - time64_t timestamp; - struct tm time; - u64 address; - u32 value; + return 0; +} + +static int tegra_xusb_load_firmware(struct tegra_xusb *tegra) +{ + unsigned int code_tag_blocks, code_size_blocks, code_blocks; + struct tegra_xusb_fw_header *header; + struct xhci_cap_regs __iomem *cap; + struct xhci_op_regs __iomem *op; + struct device *dev = tegra->dev; + unsigned long timeout; + time64_t timestamp; + struct tm time; + u64 address; + u32 value; + + header = (struct tegra_xusb_fw_header *)tegra->fw.virt; + + err = tegra_xusb_request_firmware(tegra); + if (err < 0) { + dev_err(&pdev->dev, "failed to request firmware: %d ", err); + goto disable_phy; + } + - goto put_rpm; + goto free_firmware; - goto put_rpm; + goto free_firmware; +free_firmware: + dma_free_coherent(&pdev->dev, tegra->fw.size, tegra->fw.virt, + tegra->fw.phys);
|
Universal Serial Bus
|
741d6e5d84f30266694ca23641f1d028b55f7f40
|
thierry reding
|
drivers
|
usb
|
host
|
usb: host: xhci-tegra: avoid a fixed duration sleep
|
do not use a fixed duration sleep to wait for the dma controller to become ready. instead, poll the l2imemop_result register for the vld flag to determine when the xusb controller's dma master is ready.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
implement basic elpg support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['xhci-tegra']
|
['c']
| 1
| 14
| 1
|
--- diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c +#include <linux/iopoll.h> +#define xusb_csb_mempool_l2imemop_result 0x101a18 +#define l2imemop_result_vld bit(31) + int err; - msleep(50); + /* wait for result_vld to get set */ +#define tegra_csb_readl(offset) csb_readl(tegra, offset) + err = readx_poll_timeout(tegra_csb_readl, + xusb_csb_mempool_l2imemop_result, value, + value & l2imemop_result_vld, 100, 10000); + if (err < 0) { + dev_err(dev, "dma controller not ready %#010x ", value); + return err; + } +#undef tegra_csb_readl
|
Universal Serial Bus
|
ec12ac10c9a7e2f1edf15c488e54f4c813cf0f52
|
thierry reding
|
drivers
|
usb
|
host
|
usb: host: xhci-tegra: use cnr as firmware ready indicator
|
the falcon cpu state is a suboptimal indicator for firmware readiness, since the falcon can be in a running state if the firmware is handling port state changes or running other tasks. instead, the driver should check the sts_cnr bit to determine whether or not the firmware has been successfully loaded and is ready for xhci operation.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
implement basic elpg support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['xhci-tegra']
|
['c']
| 1
| 15
| 12
|
--- diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c + struct xhci_cap_regs __iomem *cap = tegra->regs; - struct xhci_cap_regs __iomem *cap; - struct xhci_op_regs __iomem *op; + struct xhci_op_regs __iomem *op; + op = tegra->regs + hc_length(readl(&cap->hc_capbase)); - /* boot falcon cpu and wait for it to enter the stopped (idle) state. */ - timeout = jiffies + msecs_to_jiffies(5); - + /* boot falcon cpu and wait for usbsts_cnr to get cleared. */ - while (time_before(jiffies, timeout)) { - if (csb_readl(tegra, xusb_falc_cpuctl) == cpuctl_state_stopped) + timeout = jiffies + msecs_to_jiffies(200); + + do { + value = readl(&op->status); + if ((value & sts_cnr) == 0) - usleep_range(100, 200); - } + usleep_range(1000, 2000); + } while (time_is_after_jiffies(timeout)); - if (csb_readl(tegra, xusb_falc_cpuctl) != cpuctl_state_stopped) { - dev_err(dev, "falcon failed to start, state: %#x ", - csb_readl(tegra, xusb_falc_cpuctl)); + value = readl(&op->status); + if (value & sts_cnr) { + value = csb_readl(tegra, xusb_falc_cpuctl); + dev_err(dev, "xhci controller not read: %#010x ", value);
|
Universal Serial Bus
|
482ba7a6b42fa87dc8fa7d8c6140a916d0506549
|
thierry reding
|
drivers
|
usb
|
host
|
usb: host: xhci-tegra: extract firmware enable helper
|
extract a helper that enables message generation from the firmware. this removes clutter from tegra_xusb_probe() and will also come in useful for subsequent patches that introduce suspend/resume support.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
implement basic elpg support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['xhci-tegra']
|
['c']
| 1
| 29
| 12
|
--- diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c -static int tegra_xusb_probe(struct platform_device *pdev) +static int __tegra_xusb_enable_firmware_messages(struct tegra_xusb *tegra) - struct resource *regs; + int err; + + /* enable firmware messages from controller. */ + msg.cmd = mbox_cmd_msg_enabled; + msg.data = 0; + + err = tegra_xusb_mbox_send(tegra, &msg); + if (err < 0) + dev_err(tegra->dev, "failed to enable messages: %d ", err); + + return err; +} + +static int tegra_xusb_enable_firmware_messages(struct tegra_xusb *tegra) +{ + int err; + + mutex_lock(&tegra->lock); + err = __tegra_xusb_enable_firmware_messages(tegra); + mutex_unlock(&tegra->lock); + + return err; +} + +static int tegra_xusb_probe(struct platform_device *pdev) +{ + struct resource *regs; - mutex_lock(&tegra->lock); - - /* enable firmware messages from controller. */ - msg.cmd = mbox_cmd_msg_enabled; - msg.data = 0; - - err = tegra_xusb_mbox_send(tegra, &msg); + err = tegra_xusb_enable_firmware_messages(tegra); - mutex_unlock(&tegra->lock); - mutex_unlock(&tegra->lock); -
|
Universal Serial Bus
|
96d8f628f0b35e1c1d93340cd4d2cde1ed3b8d9f
|
thierry reding
|
drivers
|
usb
|
host
|
usb: host: xhci-tegra: reuse stored register base address
|
the base address of the xusb controller's registers is already stored in the hcd. move assignment to the hcd fields to an earlier point so that they can be reused in the tegra_xusb_config() function. this avoids the need to pass the base address as an extra parameter, which in turn comes in handy in subsequent patches that need to call this function from the suspend/resume paths where these values are no longer readily available.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
implement basic elpg support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['xhci-tegra']
|
['c']
| 1
| 8
| 8
|
--- diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c -static void tegra_xusb_config(struct tegra_xusb *tegra, - struct resource *regs) +static void tegra_xusb_config(struct tegra_xusb *tegra) + u32 regs = tegra->hcd->rsrc_start; - value |= regs->start & (xusb_base_addr_mask << xusb_base_addr_shift); + value |= regs & (xusb_base_addr_mask << xusb_base_addr_shift); + tegra->hcd->regs = tegra->regs; + tegra->hcd->rsrc_start = regs->start; + tegra->hcd->rsrc_len = resource_size(regs); + - tegra_xusb_config(tegra, regs); + tegra_xusb_config(tegra); - tegra->hcd->regs = tegra->regs; - tegra->hcd->rsrc_start = regs->start; - tegra->hcd->rsrc_len = resource_size(regs); -
|
Universal Serial Bus
|
ecd0fbd12d0fb5ee030d97d5be44766552aba07c
|
thierry reding
|
drivers
|
usb
|
host
|
usb: host: xhci-tegra: enable runtime pm as late as possible
|
a number of things can currently go wrong after the xusb controller has been enabled, which means that it might need to be disabled again before it has ever been used.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
implement basic elpg support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['xhci-tegra']
|
['c']
| 1
| 17
| 16
|
--- diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c - pm_runtime_enable(&pdev->dev); - if (pm_runtime_enabled(&pdev->dev)) - err = pm_runtime_get_sync(&pdev->dev); - else - err = tegra_xusb_runtime_resume(&pdev->dev); - - if (err < 0) { - dev_err(&pdev->dev, "failed to enable device: %d ", err); - goto disable_phy; - } - - tegra_xusb_config(tegra); - - goto put_rpm; + goto disable_phy; + pm_runtime_enable(&pdev->dev); + + if (!pm_runtime_enabled(&pdev->dev)) + err = tegra_xusb_runtime_resume(&pdev->dev); + else + err = pm_runtime_get_sync(&pdev->dev); + + if (err < 0) { + dev_err(&pdev->dev, "failed to enable device: %d ", err); + goto free_firmware; + } + + tegra_xusb_config(tegra); + - goto free_firmware; + goto put_rpm; - goto free_firmware; + goto put_rpm;
|
Universal Serial Bus
|
17926924be44b21556043a2faccc3b449110bd00
|
thierry reding
|
drivers
|
usb
|
host
|
usb: host: xhci-tegra: add support for xusb context save/restore
|
the xusb controller contains registers that need to be saved on suspend and restored on resume in addition to the xhci specific registers. add support for saving and restoring the xusb specific context.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
implement basic elpg support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['xhci-tegra']
|
['c']
| 1
| 100
| 2
|
--- diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c +struct tegra_xusb_context_soc { + struct { + const unsigned int *offsets; + unsigned int num_offsets; + } ipfs; + + struct { + const unsigned int *offsets; + unsigned int num_offsets; + } fpci; +}; + + const struct tegra_xusb_context_soc *context; +struct tegra_xusb_context { + u32 *ipfs; + u32 *fpci; +}; + + + struct tegra_xusb_context context; +#ifdef config_pm_sleep +static int tegra_xusb_init_context(struct tegra_xusb *tegra) +{ + const struct tegra_xusb_context_soc *soc = tegra->soc->context; + + /* + * skip support for context save/restore if the soc doesn't have any + * xusb specific context that needs to be saved/restored. + */ + if (!soc) + return 0; + + tegra->context.ipfs = devm_kcalloc(tegra->dev, soc->ipfs.num_offsets, + sizeof(u32), gfp_kernel); + if (!tegra->context.ipfs) + return -enomem; + + tegra->context.fpci = devm_kcalloc(tegra->dev, soc->ipfs.num_offsets, + sizeof(u32), gfp_kernel); + if (!tegra->context.fpci) + return -enomem; + + return 0; +} +#else +static inline int tegra_xusb_init_context(struct tegra_xusb *tegra) +{ + return 0; +} +#endif + + err = tegra_xusb_init_context(tegra); + if (err < 0) + return err; + +static void tegra_xusb_save_context(struct tegra_xusb *tegra) +{ + const struct tegra_xusb_context_soc *soc = tegra->soc->context; + struct tegra_xusb_context *ctx = &tegra->context; + unsigned int i; + + if (soc && soc->ipfs.num_offsets > 0) { + for (i = 0; i < soc->ipfs.num_offsets; i++) + ctx->ipfs[i] = ipfs_readl(tegra, soc->ipfs.offsets[i]); + } + + if (soc && soc->fpci.num_offsets > 0) { + for (i = 0; i < soc->fpci.num_offsets; i++) + ctx->fpci[i] = fpci_readl(tegra, soc->fpci.offsets[i]); + } +} + +static void tegra_xusb_restore_context(struct tegra_xusb *tegra) +{ + const struct tegra_xusb_context_soc *soc = tegra->soc->context; + struct tegra_xusb_context *ctx = &tegra->context; + unsigned int i; + + if (soc && soc->fpci.num_offsets > 0) { + for (i = 0; i < soc->fpci.num_offsets; i++) + fpci_writel(tegra, ctx->fpci[i], soc->fpci.offsets[i]); + } + + if (soc && soc->ipfs.num_offsets > 0) { + for (i = 0; i < soc->ipfs.num_offsets; i++) + ipfs_writel(tegra, ctx->ipfs[i], soc->ipfs.offsets[i]); + } +} + + int err; - return xhci_suspend(xhci, wakeup); + err = xhci_suspend(xhci, wakeup); + if (err < 0) + return err; + + tegra_xusb_save_context(tegra); + + return 0; - return xhci_resume(xhci, 0); + tegra_xusb_restore_context(tegra); + + return xhci_resume(xhci, false);
|
Universal Serial Bus
|
5c4e8d3781bc00363183b639cf3b603bd16d3994
|
thierry reding
|
drivers
|
usb
|
host
|
usb: host: xhci-tegra: add xusb controller context
|
define the offsets of the registers that need to be saved on suspend and restored on resume for the various nvidia tegra generations supported by the xusb driver.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
implement basic elpg support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['xhci-tegra']
|
['c']
| 1
| 69
| 11
|
--- diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c +#define xusb_cfg_16 0x040 +#define xusb_cfg_24 0x060 +#define xusb_cfg_axi_cfg 0x0f8 +#define xusb_cfg_aru_context 0x43c +#define xusb_cfg_aru_context_hs_pls 0x478 +#define xusb_cfg_aru_context_fs_pls 0x47c +#define xusb_cfg_aru_context_hsfs_speed 0x480 +#define xusb_cfg_aru_context_hsfs_pp 0x484 +#define ipfs_xusb_host_msi_bar_sz_0 0x0c0 +#define ipfs_xusb_host_msi_axi_bar_st_0 0x0c4 +#define ipfs_xusb_host_msi_fpci_bar_st_0 0x0c8 +#define ipfs_xusb_host_msi_vec0_0 0x100 +#define ipfs_xusb_host_msi_en_vec0_0 0x140 +#define ipfs_xusb_host_fpci_error_masks_0 0x184 +#define ipfs_xusb_host_intr_enable_0 0x198 +#define ipfs_xusb_host_ufpci_config_0 0x19c +#define ipfs_xusb_host_mccif_fifoctrl_0 0x1dc - /* - * skip support for context save/restore if the soc doesn't have any - * xusb specific context that needs to be saved/restored. - */ - if (!soc) - return 0; - - if (soc && soc->ipfs.num_offsets > 0) { + if (soc->ipfs.num_offsets > 0) { - if (soc && soc->fpci.num_offsets > 0) { + if (soc->fpci.num_offsets > 0) { - if (soc && soc->fpci.num_offsets > 0) { + if (soc->fpci.num_offsets > 0) { - if (soc && soc->ipfs.num_offsets > 0) { + if (soc->ipfs.num_offsets > 0) { +static const unsigned int tegra124_xusb_context_ipfs[] = { + ipfs_xusb_host_msi_bar_sz_0, + ipfs_xusb_host_msi_bar_sz_0, + ipfs_xusb_host_msi_axi_bar_st_0, + ipfs_xusb_host_msi_fpci_bar_st_0, + ipfs_xusb_host_msi_vec0_0, + ipfs_xusb_host_msi_en_vec0_0, + ipfs_xusb_host_fpci_error_masks_0, + ipfs_xusb_host_intr_mask_0, + ipfs_xusb_host_intr_enable_0, + ipfs_xusb_host_ufpci_config_0, + ipfs_xusb_host_clkgate_hysteresis_0, + ipfs_xusb_host_mccif_fifoctrl_0, +}; + +static const unsigned int tegra124_xusb_context_fpci[] = { + xusb_cfg_aru_context_hs_pls, + xusb_cfg_aru_context_fs_pls, + xusb_cfg_aru_context_hsfs_speed, + xusb_cfg_aru_context_hsfs_pp, + xusb_cfg_aru_context, + xusb_cfg_axi_cfg, + xusb_cfg_24, + xusb_cfg_16, +}; + +static const struct tegra_xusb_context_soc tegra124_xusb_context = { + .ipfs = { + .num_offsets = array_size(tegra124_xusb_context_ipfs), + .offsets = tegra124_xusb_context_ipfs, + }, + .fpci = { + .num_offsets = array_size(tegra124_xusb_context_fpci), + .offsets = tegra124_xusb_context_fpci, + }, +}; + + .context = &tegra124_xusb_context, + .context = &tegra124_xusb_context, +static const struct tegra_xusb_context_soc tegra186_xusb_context = { + .fpci = { + .num_offsets = array_size(tegra124_xusb_context_fpci), + .offsets = tegra124_xusb_context_fpci, + }, +}; + + .context = &tegra186_xusb_context, + .context = &tegra186_xusb_context,
|
Universal Serial Bus
|
9ccae88e572b36a3ede1c2fe67cfd3f2b36e0610
|
thierry reding
|
drivers
|
usb
|
host
|
usb: host: xhci-tegra: implement basic elpg support
|
this implements basic engine-level powergate support which allows the xusb controller to be put into a low power mode on system sleep and get it out of that low power mode again on resume.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
implement basic elpg support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['xhci-tegra']
|
['c']
| 1
| 119
| 8
|
--- diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c +static bool xhci_hub_ports_suspended(struct xhci_hub *hub) +{ + struct device *dev = hub->hcd->self.controller; + bool status = true; + unsigned int i; + u32 value; + + for (i = 0; i < hub->num_ports; i++) { + value = readl(hub->ports[i]->addr); + if ((value & port_pe) == 0) + continue; + + if ((value & port_pls_mask) != xdev_u3) { + dev_info(dev, "%u-%u isn't suspended: %#010x ", + hub->hcd->self.busnum, i + 1, value); + status = false; + } + } + + return status; +} + +static int tegra_xusb_check_ports(struct tegra_xusb *tegra) +{ + struct xhci_hcd *xhci = hcd_to_xhci(tegra->hcd); + unsigned long flags; + int err = 0; + + spin_lock_irqsave(&xhci->lock, flags); + + if (!xhci_hub_ports_suspended(&xhci->usb2_rhub) || + !xhci_hub_ports_suspended(&xhci->usb3_rhub)) + err = -ebusy; + + spin_unlock_irqrestore(&xhci->lock, flags); + + return err; +} + -static int tegra_xusb_suspend(struct device *dev) +static int tegra_xusb_enter_elpg(struct tegra_xusb *tegra, bool wakeup) - struct tegra_xusb *tegra = dev_get_drvdata(dev); - bool wakeup = device_may_wakeup(dev); - /* todo: powergate controller across suspend/resume. */ + err = tegra_xusb_check_ports(tegra); + if (err < 0) { + dev_err(tegra->dev, "not all ports suspended: %d ", err); + return err; + } + - if (err < 0) + if (err < 0) { + dev_err(tegra->dev, "failed to suspend xhci: %d ", err); + } + tegra_xusb_phy_disable(tegra); + tegra_xusb_clk_disable(tegra); -static int tegra_xusb_resume(struct device *dev) +static int tegra_xusb_exit_elpg(struct tegra_xusb *tegra, bool wakeup) - struct tegra_xusb *tegra = dev_get_drvdata(dev); + int err; + err = tegra_xusb_clk_enable(tegra); + if (err < 0) { + dev_err(tegra->dev, "failed to enable clocks: %d ", err); + return err; + } + + err = tegra_xusb_phy_enable(tegra); + if (err < 0) { + dev_err(tegra->dev, "failed to enable phys: %d ", err); + goto disable_clk; + } + + tegra_xusb_config(tegra); - return xhci_resume(xhci, false); + err = tegra_xusb_load_firmware(tegra); + if (err < 0) { + dev_err(tegra->dev, "failed to load firmware: %d ", err); + goto disable_phy; + } + + err = __tegra_xusb_enable_firmware_messages(tegra); + if (err < 0) { + dev_err(tegra->dev, "failed to enable messages: %d ", err); + goto disable_phy; + } + + err = xhci_resume(xhci, true); + if (err < 0) { + dev_err(tegra->dev, "failed to resume xhci: %d ", err); + goto disable_phy; + } + + return 0; + +disable_phy: + tegra_xusb_phy_disable(tegra); +disable_clk: + tegra_xusb_clk_disable(tegra); + return err; +} + +static int tegra_xusb_suspend(struct device *dev) +{ + struct tegra_xusb *tegra = dev_get_drvdata(dev); + bool wakeup = device_may_wakeup(dev); + int err; + + synchronize_irq(tegra->mbox_irq); + + mutex_lock(&tegra->lock); + err = tegra_xusb_enter_elpg(tegra, wakeup); + mutex_unlock(&tegra->lock); + + return err; +} + +static int tegra_xusb_resume(struct device *dev) +{ + struct tegra_xusb *tegra = dev_get_drvdata(dev); + bool wakeup = device_may_wakeup(dev); + int err; + + mutex_lock(&tegra->lock); + err = tegra_xusb_exit_elpg(tegra, wakeup); + mutex_unlock(&tegra->lock); + + return err;
|
Universal Serial Bus
|
cad0a5c74e7a1760d90a41df8e6151a53a598676
|
thierry reding
|
drivers
|
usb
|
host
|
usb: misc: iowarrior: add support for 2 oemed devices
|
add support for two oem devices that are identical to existing io-warrior devices, except for the usb device id.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add support for 2 oemed devices
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['misc', 'iowarrior']
|
['c']
| 1
| 13
| 2
|
--- diff --git a/drivers/usb/misc/iowarrior.c b/drivers/usb/misc/iowarrior.c --- a/drivers/usb/misc/iowarrior.c +++ b/drivers/usb/misc/iowarrior.c +/* oemed devices */ +#define usb_device_id_codemercs_iow24sag 0x158a +#define usb_device_id_codemercs_iow56am 0x158b + + {usb_device(usb_vendor_id_codemercs, usb_device_id_codemercs_iow24sag)}, + {usb_device(usb_vendor_id_codemercs, usb_device_id_codemercs_iow56am)}, + case usb_device_id_codemercs_iow24sag: + case usb_device_id_codemercs_iow56am: + dev->product_id == usb_device_id_codemercs_iow24sag || - if (dev->product_id == usb_device_id_codemercs_iow56) { + if ((dev->product_id == usb_device_id_codemercs_iow56) || + (dev->product_id == usb_device_id_codemercs_iow56am)) { - (dev->product_id == usb_device_id_codemercs_iow56)) + ((dev->product_id == usb_device_id_codemercs_iow56) || + (dev->product_id == usb_device_id_codemercs_iow56am)))
|
Universal Serial Bus
|
461d8deb26a7d70254bc0391feb4fd8a95e674e8
|
greg kroah hartman
|
drivers
|
usb
|
misc
|
usb: misc: iowarrior: add support for the 100 device
|
add a new device id for the 100 devie. it has 4 interfaces like the 28 and 28l devices but a larger endpoint so more i/o pins.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add support for the 100 device
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['misc', 'iowarrior']
|
['c']
| 1
| 7
| 2
|
--- diff --git a/drivers/usb/misc/iowarrior.c b/drivers/usb/misc/iowarrior.c --- a/drivers/usb/misc/iowarrior.c +++ b/drivers/usb/misc/iowarrior.c +#define usb_device_id_codemercs_iow100 0x1506 + {usb_device(usb_vendor_id_codemercs, usb_device_id_codemercs_iow100)}, + case usb_device_id_codemercs_iow100: - (dev->product_id == usb_device_id_codemercs_iow28l)) { + (dev->product_id == usb_device_id_codemercs_iow28l) || + (dev->product_id == usb_device_id_codemercs_iow100)) { - (dev->product_id == usb_device_id_codemercs_iow28l))) + (dev->product_id == usb_device_id_codemercs_iow28l) || + (dev->product_id == usb_device_id_codemercs_iow100)))
|
Universal Serial Bus
|
bab5417f5f0118ce914bc5b2f8381e959e891155
|
greg kroah hartman
|
drivers
|
usb
|
misc
|
usb: misc: iowarrior: add support for the 28 and 28l devices
|
add new device ids for the 28 and 28l devices. these have 4 interfaces instead of 2, but the driver binds the same, so the driver changes are minimal.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add support for the 28 and 28l devices
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['misc', 'iowarrior']
|
['c']
| 1
| 13
| 2
|
--- diff --git a/drivers/usb/misc/iowarrior.c b/drivers/usb/misc/iowarrior.c --- a/drivers/usb/misc/iowarrior.c +++ b/drivers/usb/misc/iowarrior.c +/* fuller speed iowarrior */ +#define usb_device_id_codemercs_iow28 0x1504 +#define usb_device_id_codemercs_iow28l 0x1505 + {usb_device(usb_vendor_id_codemercs, usb_device_id_codemercs_iow28)}, + {usb_device(usb_vendor_id_codemercs, usb_device_id_codemercs_iow28l)}, + case usb_device_id_codemercs_iow28: + case usb_device_id_codemercs_iow28l: - (dev->product_id == usb_device_id_codemercs_iow56am)) { + (dev->product_id == usb_device_id_codemercs_iow56am) || + (dev->product_id == usb_device_id_codemercs_iow28) || + (dev->product_id == usb_device_id_codemercs_iow28l)) { - (dev->product_id == usb_device_id_codemercs_iow56am))) + (dev->product_id == usb_device_id_codemercs_iow56am) || + (dev->product_id == usb_device_id_codemercs_iow28) || + (dev->product_id == usb_device_id_codemercs_iow28l)))
|
Universal Serial Bus
|
5f6f8da2d7b5a431d3f391d0d73ace8edfb42af7
|
greg kroah hartman
|
drivers
|
usb
|
misc
|
usb: musb: add support for mediatek musb controller
|
this adds support for mediatek musb controller in host, peripheral and otg mode. there are some quirk of mediatek musb controller, such as: -w1c interrupt status registers -private data toggle registers -no dedicated dma interrupt line
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add support for mediatek musb controller
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['musb']
|
['c', 'kconfig', 'makefile']
| 3
| 591
| 1
|
-w1c interrupt status registers -private data toggle registers -no dedicated dma interrupt line --- diff --git a/drivers/usb/musb/kconfig b/drivers/usb/musb/kconfig --- a/drivers/usb/musb/kconfig +++ b/drivers/usb/musb/kconfig +config usb_musb_mediatek + tristate "mediatek platforms" + depends on arch_mediatek || compile_test + depends on nop_usb_xceiv + depends on generic_phy + select usb_role_switch + - depends on usb_musb_omap2plus + depends on usb_musb_omap2plus || usb_musb_mediatek diff --git a/drivers/usb/musb/makefile b/drivers/usb/musb/makefile --- a/drivers/usb/musb/makefile +++ b/drivers/usb/musb/makefile +obj-$(config_usb_musb_mediatek) += mediatek.o diff --git a/drivers/usb/musb/mediatek.c b/drivers/usb/musb/mediatek.c --- /dev/null +++ b/drivers/usb/musb/mediatek.c +// spdx-license-identifier: gpl-2.0 +/* + * copyright (c) 2019 mediatek inc. + * + * author: + * min guo <min.guo@mediatek.com> + * yonglong wu <yonglong.wu@mediatek.com> + */ + +#include <linux/clk.h> +#include <linux/dma-mapping.h> +#include <linux/module.h> +#include <linux/of_platform.h> +#include <linux/platform_device.h> +#include <linux/usb/role.h> +#include <linux/usb/usb_phy_generic.h> +#include "musb_core.h" +#include "musb_dma.h" + +#define usb_l1ints 0x00a0 +#define usb_l1intm 0x00a4 +#define mtk_musb_txfuncaddr 0x0480 + +/* mediatek controller toggle enable and status reg */ +#define musb_rxtog 0x80 +#define musb_rxtogen 0x82 +#define musb_txtog 0x84 +#define musb_txtogen 0x86 +#define mtk_toggle_en genmask(15, 0) + +#define tx_int_status bit(0) +#define rx_int_status bit(1) +#define usbcom_int_status bit(2) +#define dma_int_status bit(3) + +#define dma_intr_status_msk genmask(7, 0) +#define dma_intr_unmask_set_msk genmask(31, 24) + +struct mtk_glue { + struct device *dev; + struct musb *musb; + struct platform_device *musb_pdev; + struct platform_device *usb_phy; + struct phy *phy; + struct usb_phy *xceiv; + enum phy_mode phy_mode; + struct clk *main; + struct clk *mcu; + struct clk *univpll; + enum usb_role role; + struct usb_role_switch *role_sw; +}; + +static int mtk_musb_clks_get(struct mtk_glue *glue) +{ + struct device *dev = glue->dev; + + glue->main = devm_clk_get(dev, "main"); + if (is_err(glue->main)) { + dev_err(dev, "fail to get main clock "); + return ptr_err(glue->main); + } + + glue->mcu = devm_clk_get(dev, "mcu"); + if (is_err(glue->mcu)) { + dev_err(dev, "fail to get mcu clock "); + return ptr_err(glue->mcu); + } + + glue->univpll = devm_clk_get(dev, "univpll"); + if (is_err(glue->univpll)) { + dev_err(dev, "fail to get univpll clock "); + return ptr_err(glue->univpll); + } + + return 0; +} + +static int mtk_musb_clks_enable(struct mtk_glue *glue) +{ + int ret; + + ret = clk_prepare_enable(glue->main); + if (ret) { + dev_err(glue->dev, "failed to enable main clock "); + goto err_main_clk; + } + + ret = clk_prepare_enable(glue->mcu); + if (ret) { + dev_err(glue->dev, "failed to enable mcu clock "); + goto err_mcu_clk; + } + + ret = clk_prepare_enable(glue->univpll); + if (ret) { + dev_err(glue->dev, "failed to enable univpll clock "); + goto err_univpll_clk; + } + + return 0; + +err_univpll_clk: + clk_disable_unprepare(glue->mcu); +err_mcu_clk: + clk_disable_unprepare(glue->main); +err_main_clk: + return ret; +} + +static void mtk_musb_clks_disable(struct mtk_glue *glue) +{ + clk_disable_unprepare(glue->univpll); + clk_disable_unprepare(glue->mcu); + clk_disable_unprepare(glue->main); +} + +static int musb_usb_role_sx_set(struct device *dev, enum usb_role role) +{ + struct mtk_glue *glue = dev_get_drvdata(dev); + struct musb *musb = glue->musb; + u8 devctl = readb(musb->mregs + musb_devctl); + enum usb_role new_role; + + if (role == glue->role) + return 0; + + switch (role) { + case usb_role_host: + musb->xceiv->otg->state = otg_state_a_wait_vrise; + glue->phy_mode = phy_mode_usb_host; + new_role = usb_role_host; + if (glue->role == usb_role_none) + phy_power_on(glue->phy); + + devctl |= musb_devctl_session; + musb_writeb(musb->mregs, musb_devctl, devctl); + musb_hst_mode(musb); + break; + case usb_role_device: + musb->xceiv->otg->state = otg_state_b_idle; + glue->phy_mode = phy_mode_usb_device; + new_role = usb_role_device; + devctl &= ~musb_devctl_session; + musb_writeb(musb->mregs, musb_devctl, devctl); + if (glue->role == usb_role_none) + phy_power_on(glue->phy); + + musb_dev_mode(musb); + break; + case usb_role_none: + glue->phy_mode = phy_mode_usb_otg; + new_role = usb_role_none; + devctl &= ~musb_devctl_session; + musb_writeb(musb->mregs, musb_devctl, devctl); + if (glue->role != usb_role_none) + phy_power_off(glue->phy); + + break; + default: + dev_err(glue->dev, "invalid state "); + return -einval; + } + + glue->role = new_role; + phy_set_mode(glue->phy, glue->phy_mode); + + return 0; +} + +static enum usb_role musb_usb_role_sx_get(struct device *dev) +{ + struct mtk_glue *glue = dev_get_drvdata(dev); + + return glue->role; +} + +static int mtk_otg_switch_init(struct mtk_glue *glue) +{ + struct usb_role_switch_desc role_sx_desc = { 0 }; + + role_sx_desc.set = musb_usb_role_sx_set; + role_sx_desc.get = musb_usb_role_sx_get; + role_sx_desc.fwnode = dev_fwnode(glue->dev); + glue->role_sw = usb_role_switch_register(glue->dev, &role_sx_desc); + + return ptr_err_or_zero(glue->role_sw); +} + +static void mtk_otg_switch_exit(struct mtk_glue *glue) +{ + return usb_role_switch_unregister(glue->role_sw); +} + +static irqreturn_t generic_interrupt(int irq, void *__hci) +{ + unsigned long flags; + irqreturn_t retval = irq_none; + struct musb *musb = __hci; + + spin_lock_irqsave(&musb->lock, flags); + musb->int_usb = musb_clearb(musb->mregs, musb_intrusb); + musb->int_rx = musb_clearw(musb->mregs, musb_intrrx); + musb->int_tx = musb_clearw(musb->mregs, musb_intrtx); + + if (musb->int_usb || musb->int_tx || musb->int_rx) + retval = musb_interrupt(musb); + + spin_unlock_irqrestore(&musb->lock, flags); + + return retval; +} + +static irqreturn_t mtk_musb_interrupt(int irq, void *dev_id) +{ + irqreturn_t retval = irq_none; + struct musb *musb = (struct musb *)dev_id; + u32 l1_ints; + + l1_ints = musb_readl(musb->mregs, usb_l1ints) & + musb_readl(musb->mregs, usb_l1intm); + + if (l1_ints & (tx_int_status | rx_int_status | usbcom_int_status)) + retval = generic_interrupt(irq, musb); + +#if defined(config_usb_inventra_dma) + if (l1_ints & dma_int_status) + retval = dma_controller_irq(irq, musb->dma_controller); +#endif + return retval; +} + +static u32 mtk_musb_busctl_offset(u8 epnum, u16 offset) +{ + return mtk_musb_txfuncaddr + offset + 8 * epnum; +} + +static u8 mtk_musb_clearb(void __iomem *addr, unsigned int offset) +{ + u8 data; + + /* w1c */ + data = musb_readb(addr, offset); + musb_writeb(addr, offset, data); + return data; +} + +static u16 mtk_musb_clearw(void __iomem *addr, unsigned int offset) +{ + u16 data; + + /* w1c */ + data = musb_readw(addr, offset); + musb_writew(addr, offset, data); + return data; +} + +static int mtk_musb_set_mode(struct musb *musb, u8 mode) +{ + struct device *dev = musb->controller; + struct mtk_glue *glue = dev_get_drvdata(dev->parent); + enum phy_mode new_mode; + enum usb_role new_role; + + switch (mode) { + case musb_host: + new_mode = phy_mode_usb_host; + new_role = usb_role_host; + break; + case musb_peripheral: + new_mode = phy_mode_usb_device; + new_role = usb_role_device; + break; + case musb_otg: + new_mode = phy_mode_usb_otg; + new_role = usb_role_none; + break; + default: + dev_err(glue->dev, "invalid mode request "); + return -einval; + } + + if (glue->phy_mode == new_mode) + return 0; + + if (musb->port_mode != musb_otg) { + dev_err(glue->dev, "does not support changing modes "); + return -einval; + } + + glue->role = new_role; + musb_usb_role_sx_set(dev, glue->role); + return 0; +} + +static int mtk_musb_init(struct musb *musb) +{ + struct device *dev = musb->controller; + struct mtk_glue *glue = dev_get_drvdata(dev->parent); + int ret; + + glue->musb = musb; + musb->phy = glue->phy; + musb->xceiv = glue->xceiv; + musb->is_host = false; + musb->isr = mtk_musb_interrupt; + + /* set tx/rx toggle enable */ + musb_writew(musb->mregs, musb_txtogen, mtk_toggle_en); + musb_writew(musb->mregs, musb_rxtogen, mtk_toggle_en); + + if (musb->port_mode == musb_otg) { + ret = mtk_otg_switch_init(glue); + if (ret) + return ret; + } + + ret = phy_init(glue->phy); + if (ret) + goto err_phy_init; + + ret = phy_power_on(glue->phy); + if (ret) + goto err_phy_power_on; + + phy_set_mode(glue->phy, glue->phy_mode); + +#if defined(config_usb_inventra_dma) + musb_writel(musb->mregs, musb_hsdma_intr, + dma_intr_status_msk | dma_intr_unmask_set_msk); +#endif + musb_writel(musb->mregs, usb_l1intm, tx_int_status | rx_int_status | + usbcom_int_status | dma_int_status); + return 0; + +err_phy_power_on: + phy_exit(glue->phy); +err_phy_init: + mtk_otg_switch_exit(glue); + return ret; +} + +static u16 mtk_musb_get_toggle(struct musb_qh *qh, int is_out) +{ + struct musb *musb = qh->hw_ep->musb; + u8 epnum = qh->hw_ep->epnum; + u16 toggle; + + toggle = musb_readw(musb->mregs, is_out ? musb_txtog : musb_rxtog); + return toggle & (1 << epnum); +} + +static u16 mtk_musb_set_toggle(struct musb_qh *qh, int is_out, struct urb *urb) +{ + struct musb *musb = qh->hw_ep->musb; + u8 epnum = qh->hw_ep->epnum; + u16 value, toggle; + + toggle = usb_gettoggle(urb->dev, qh->epnum, is_out); + + if (is_out) { + value = musb_readw(musb->mregs, musb_txtog); + value |= toggle << epnum; + musb_writew(musb->mregs, musb_txtog, value); + } else { + value = musb_readw(musb->mregs, musb_rxtog); + value |= toggle << epnum; + musb_writew(musb->mregs, musb_rxtog, value); + } + + return 0; +} + +static int mtk_musb_exit(struct musb *musb) +{ + struct device *dev = musb->controller; + struct mtk_glue *glue = dev_get_drvdata(dev->parent); + + mtk_otg_switch_exit(glue); + phy_power_off(glue->phy); + phy_exit(glue->phy); + mtk_musb_clks_disable(glue); + + pm_runtime_put_sync(dev); + pm_runtime_disable(dev); + return 0; +} + +static const struct musb_platform_ops mtk_musb_ops = { + .quirks = musb_dma_inventra, + .init = mtk_musb_init, + .get_toggle = mtk_musb_get_toggle, + .set_toggle = mtk_musb_set_toggle, + .exit = mtk_musb_exit, +#ifdef config_usb_inventra_dma + .dma_init = musbhs_dma_controller_create_noirq, + .dma_exit = musbhs_dma_controller_destroy, +#endif + .clearb = mtk_musb_clearb, + .clearw = mtk_musb_clearw, + .busctl_offset = mtk_musb_busctl_offset, + .set_mode = mtk_musb_set_mode, +}; + +#define mtk_musb_max_ep_num 8 +#define mtk_musb_ram_bits 11 + +static struct musb_fifo_cfg mtk_musb_mode_cfg[] = { + { .hw_ep_num = 1, .style = fifo_tx, .maxpacket = 512, }, + { .hw_ep_num = 1, .style = fifo_rx, .maxpacket = 512, }, + { .hw_ep_num = 2, .style = fifo_tx, .maxpacket = 512, }, + { .hw_ep_num = 2, .style = fifo_rx, .maxpacket = 512, }, + { .hw_ep_num = 3, .style = fifo_tx, .maxpacket = 512, }, + { .hw_ep_num = 3, .style = fifo_rx, .maxpacket = 512, }, + { .hw_ep_num = 4, .style = fifo_tx, .maxpacket = 512, }, + { .hw_ep_num = 4, .style = fifo_rx, .maxpacket = 512, }, + { .hw_ep_num = 5, .style = fifo_tx, .maxpacket = 512, }, + { .hw_ep_num = 5, .style = fifo_rx, .maxpacket = 512, }, + { .hw_ep_num = 6, .style = fifo_tx, .maxpacket = 1024, }, + { .hw_ep_num = 6, .style = fifo_rx, .maxpacket = 1024, }, + { .hw_ep_num = 7, .style = fifo_tx, .maxpacket = 512, }, + { .hw_ep_num = 7, .style = fifo_rx, .maxpacket = 64, }, +}; + +static const struct musb_hdrc_config mtk_musb_hdrc_config = { + .fifo_cfg = mtk_musb_mode_cfg, + .fifo_cfg_size = array_size(mtk_musb_mode_cfg), + .multipoint = true, + .dyn_fifo = true, + .num_eps = mtk_musb_max_ep_num, + .ram_bits = mtk_musb_ram_bits, +}; + +static const struct platform_device_info mtk_dev_info = { + .name = "musb-hdrc", + .id = platform_devid_auto, + .dma_mask = dma_bit_mask(32), +}; + +static int mtk_musb_probe(struct platform_device *pdev) +{ + struct musb_hdrc_platform_data *pdata; + struct mtk_glue *glue; + struct platform_device_info pinfo; + struct device *dev = &pdev->dev; + struct device_node *np = dev->of_node; + int ret = -enomem; + + glue = devm_kzalloc(dev, sizeof(*glue), gfp_kernel); + if (!glue) + return -enomem; + + glue->dev = dev; + pdata = devm_kzalloc(dev, sizeof(*pdata), gfp_kernel); + if (!pdata) + return -enomem; + + ret = of_platform_populate(np, null, null, dev); + if (ret) { + dev_err(dev, "failed to create child devices at %p ", np); + return ret; + } + + ret = mtk_musb_clks_get(glue); + if (ret) + return ret; + + pdata->config = &mtk_musb_hdrc_config; + pdata->platform_ops = &mtk_musb_ops; + pdata->mode = usb_get_dr_mode(dev); + + if (is_enabled(config_usb_musb_host)) + pdata->mode = usb_dr_mode_host; + else if (is_enabled(config_usb_musb_gadget)) + pdata->mode = usb_dr_mode_peripheral; + + switch (pdata->mode) { + case usb_dr_mode_host: + glue->phy_mode = phy_mode_usb_host; + glue->role = usb_role_host; + break; + case usb_dr_mode_peripheral: + glue->phy_mode = phy_mode_usb_device; + glue->role = usb_role_device; + break; + case usb_dr_mode_otg: + glue->phy_mode = phy_mode_usb_otg; + glue->role = usb_role_none; + break; + default: + dev_err(&pdev->dev, "error 'dr_mode' property "); + return -einval; + } + + glue->phy = devm_of_phy_get_by_index(dev, np, 0); + if (is_err(glue->phy)) { + dev_err(dev, "fail to getting phy %ld ", + ptr_err(glue->phy)); + return ptr_err(glue->phy); + } + + glue->usb_phy = usb_phy_generic_register(); + if (is_err(glue->usb_phy)) { + dev_err(dev, "fail to registering usb-phy %ld ", + ptr_err(glue->usb_phy)); + return ptr_err(glue->usb_phy); + } + + glue->xceiv = devm_usb_get_phy(dev, usb_phy_type_usb2); + if (is_err(glue->xceiv)) { + dev_err(dev, "fail to getting usb-phy %d ", ret); + ret = ptr_err(glue->xceiv); + goto err_unregister_usb_phy; + } + + platform_set_drvdata(pdev, glue); + pm_runtime_enable(dev); + pm_runtime_get_sync(dev); + + ret = mtk_musb_clks_enable(glue); + if (ret) + goto err_enable_clk; + + pinfo = mtk_dev_info; + pinfo.parent = dev; + pinfo.res = pdev->resource; + pinfo.num_res = pdev->num_resources; + pinfo.data = pdata; + pinfo.size_data = sizeof(*pdata); + + glue->musb_pdev = platform_device_register_full(&pinfo); + if (is_err(glue->musb_pdev)) { + ret = ptr_err(glue->musb_pdev); + dev_err(dev, "failed to register musb device: %d ", ret); + goto err_device_register; + } + + return 0; + +err_device_register: + mtk_musb_clks_disable(glue); +err_enable_clk: + pm_runtime_put_sync(dev); + pm_runtime_disable(dev); +err_unregister_usb_phy: + usb_phy_generic_unregister(glue->usb_phy); + return ret; +} + +static int mtk_musb_remove(struct platform_device *pdev) +{ + struct mtk_glue *glue = platform_get_drvdata(pdev); + struct platform_device *usb_phy = glue->usb_phy; + + platform_device_unregister(glue->musb_pdev); + usb_phy_generic_unregister(usb_phy); + + return 0; +} + +#ifdef config_of +static const struct of_device_id mtk_musb_match[] = { + {.compatible = "mediatek,mtk-musb",}, + {}, +}; +module_device_table(of, mtk_musb_match); +#endif + +static struct platform_driver mtk_musb_driver = { + .probe = mtk_musb_probe, + .remove = mtk_musb_remove, + .driver = { + .name = "musb-mtk", + .of_match_table = of_match_ptr(mtk_musb_match), + }, +}; + +module_platform_driver(mtk_musb_driver); + +module_description("mediatek musb glue layer"); +module_author("min guo <min.guo@mediatek.com>"); +module_license("gpl v2");
|
Universal Serial Bus
|
0990366bab3c6afb93b276106e1e24d4bc69db7b
|
min guo
|
drivers
|
usb
|
musb
|
usb: phy: show usb charger type for user
|
current usb charger framework only shows charger state for user, but the user may also need charger type for further use, add support for it.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
show usb charger type for user
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['phy']
|
['c']
| 1
| 12
| 1
|
--- diff --git a/drivers/usb/phy/phy.c b/drivers/usb/phy/phy.c --- a/drivers/usb/phy/phy.c +++ b/drivers/usb/phy/phy.c +static const char *const usb_chger_type[] = { + [unknown_type] = "usb_charger_unknown_type", + [sdp_type] = "usb_charger_sdp_type", + [cdp_type] = "usb_charger_cdp_type", + [dcp_type] = "usb_charger_dcp_type", + [aca_type] = "usb_charger_aca_type", +}; + - char *envp[] = { uchger_state, null }; + char uchger_type[50] = { 0 }; + char *envp[] = { uchger_state, uchger_type, null }; + snprintf(uchger_type, array_size(uchger_type), + "usb_charger_type=%s", usb_chger_type[usb_phy->chg_type]);
|
Universal Serial Bus
|
3bdcfe6c1d90b343c3de5fffdc83d988e76f8679
|
peter chen
|
drivers
|
usb
|
phy
|
usb: serial: option: add me910g1 ecm composition 0x110b
|
add me910g1 ecm composition 0x110b: tty, tty, tty, ecm
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add me910g1 ecm composition 0x110b
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['serial', 'option']
|
['c']
| 1
| 2
| 0
|
--- diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c --- a/drivers/usb/serial/option.c +++ b/drivers/usb/serial/option.c + { usb_device_interface_class(telit_vendor_id, 0x110b, 0xff), /* telit me910g1 (ecm) */ + .driver_info = nctrl(0) },
|
Universal Serial Bus
|
8e852a7953be2a6ee371449f7257fe15ace6a1fc
|
daniele palmas
|
drivers
|
usb
|
serial
|
usb: serial: pl2303: add device-id for hp ld381
|
add a device id for hp ld381 display ld381: 03f0:0f7f
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add device-id for hp ld381
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['serial', 'pl2303']
|
['c', 'h']
| 2
| 2
| 0
|
--- diff --git a/drivers/usb/serial/pl2303.c b/drivers/usb/serial/pl2303.c --- a/drivers/usb/serial/pl2303.c +++ b/drivers/usb/serial/pl2303.c + { usb_device(hp_vendor_id, hp_ld381_product_id) }, diff --git a/drivers/usb/serial/pl2303.h b/drivers/usb/serial/pl2303.h --- a/drivers/usb/serial/pl2303.h +++ b/drivers/usb/serial/pl2303.h +#define hp_ld381_product_id 0x0f7f
|
Universal Serial Bus
|
cecc113c1af0dd41ccf265c1fdb84dbd05e63423
|
scott chen
|
drivers
|
usb
|
serial
|
usb: typec: ucsi: add support for separate dp altmode devices
|
ccgx controller used on nvidia gpu card has two separate display altmode for two dp pin assignments. ucsi specification doesn't prohibits using separate display altmode.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add support for separate dp altmode devices
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['typec', 'ucsi']
|
['c', 'h']
| 3
| 279
| 2
|
--- diff --git a/drivers/usb/typec/ucsi/ucsi.c b/drivers/usb/typec/ucsi/ucsi.c --- a/drivers/usb/typec/ucsi/ucsi.c +++ b/drivers/usb/typec/ucsi/ucsi.c +static int +ucsi_register_altmodes_nvidia(struct ucsi_connector *con, u8 recipient) +{ + int max_altmodes = ucsi_max_altmodes; + struct typec_altmode_desc desc; + struct ucsi_altmode alt; + struct ucsi_altmode orig[ucsi_max_altmodes]; + struct ucsi_altmode updated[ucsi_max_altmodes]; + struct ucsi *ucsi = con->ucsi; + bool multi_dp = false; + u64 command; + int ret; + int len; + int i; + int k = 0; + + if (recipient == ucsi_recipient_con) + max_altmodes = con->ucsi->cap.num_alt_modes; + + memset(orig, 0, sizeof(orig)); + memset(updated, 0, sizeof(updated)); + + /* first get all the alternate modes */ + for (i = 0; i < max_altmodes; i++) { + memset(&alt, 0, sizeof(alt)); + command = ucsi_get_alternate_modes; + command |= ucsi_get_altmode_recipient(recipient); + command |= ucsi_get_altmode_connector_number(con->num); + command |= ucsi_get_altmode_offset(i); + len = ucsi_run_command(con->ucsi, command, &alt, sizeof(alt)); + /* + * we are collecting all altmodes first and then registering. + * some type-c device will return zero length data beyond last + * alternate modes. we should not return if length is zero. + */ + if (len < 0) + return len; + + /* we got all altmodes, now break out and register them */ + if (!len || !alt.svid) + break; + + orig[k].mid = alt.mid; + orig[k].svid = alt.svid; + k++; + } + /* + * update the original altmode table as some ppms may report + * multiple dp altmodes. + */ + if (recipient == ucsi_recipient_con) + multi_dp = ucsi->ops->update_altmodes(ucsi, orig, updated); + + /* now register altmodes */ + for (i = 0; i < max_altmodes; i++) { + memset(&desc, 0, sizeof(desc)); + if (multi_dp && recipient == ucsi_recipient_con) { + desc.svid = updated[i].svid; + desc.vdo = updated[i].mid; + } else { + desc.svid = orig[i].svid; + desc.vdo = orig[i].mid; + } + desc.roles = typec_port_drd; + + if (!desc.svid) + return 0; + + ret = ucsi_register_altmode(con, &desc, recipient); + if (ret) + return ret; + } + + return 0; +} + + if (con->ucsi->ops->update_altmodes) + return ucsi_register_altmodes_nvidia(con, recipient); + diff --git a/drivers/usb/typec/ucsi/ucsi.h b/drivers/usb/typec/ucsi/ucsi.h --- a/drivers/usb/typec/ucsi/ucsi.h +++ b/drivers/usb/typec/ucsi/ucsi.h +struct ucsi_altmode; + * @update_altmodes: squashes duplicate dp altmodes + bool (*update_altmodes)(struct ucsi *ucsi, struct ucsi_altmode *orig, + struct ucsi_altmode *updated); +#define ucsi_command(_cmd_) ((_cmd_) & 0xff) +#define ucsi_set_new_cam_enter(x) (((x) >> 23) & 0x1) +#define ucsi_set_new_cam_get_am(x) (((x) >> 24) & 0xff) +#define ucsi_set_new_cam_am_mask (0xff << 24) +#define ucsi_set_new_cam_set_am(x) (((x) & 0xff) << 24) +#define ucsi_cmd_connector_mask (0x7) + diff --git a/drivers/usb/typec/ucsi/ucsi_ccg.c b/drivers/usb/typec/ucsi/ucsi_ccg.c --- a/drivers/usb/typec/ucsi/ucsi_ccg.c +++ b/drivers/usb/typec/ucsi/ucsi_ccg.c +#include <linux/usb/typec_dp.h> +struct ucsi_ccg_altmode { + u16 svid; + u32 mid; + u8 linked_idx; + u8 active_idx; +#define ucsi_multi_dp_index (0xff) + bool checked; +} __packed; + + + u64 last_cmd_sent; + bool has_multiple_dp; + struct ucsi_ccg_altmode orig[ucsi_max_altmodes]; + struct ucsi_ccg_altmode updated[ucsi_max_altmodes]; +static void ucsi_ccg_update_get_current_cam_cmd(struct ucsi_ccg *uc, u8 *data) +{ + u8 cam, new_cam; + + cam = data[0]; + new_cam = uc->orig[cam].linked_idx; + uc->updated[new_cam].active_idx = cam; + data[0] = new_cam; +} + +static bool ucsi_ccg_update_altmodes(struct ucsi *ucsi, + struct ucsi_altmode *orig, + struct ucsi_altmode *updated) +{ + struct ucsi_ccg *uc = ucsi_get_drvdata(ucsi); + struct ucsi_ccg_altmode *alt, *new_alt; + int i, j, k = 0; + bool found = false; + + alt = uc->orig; + new_alt = uc->updated; + memset(uc->updated, 0, sizeof(uc->updated)); + + /* + * copy original connector altmodes to new structure. + * we need this before second loop since second loop + * checks for duplicate altmodes. + */ + for (i = 0; i < ucsi_max_altmodes; i++) { + alt[i].svid = orig[i].svid; + alt[i].mid = orig[i].mid; + if (!alt[i].svid) + break; + } + + for (i = 0; i < ucsi_max_altmodes; i++) { + if (!alt[i].svid) + break; + + /* already checked and considered */ + if (alt[i].checked) + continue; + + if (!dp_conf_get_pin_assign(alt[i].mid)) { + /* found non dp altmode */ + new_alt[k].svid = alt[i].svid; + new_alt[k].mid |= alt[i].mid; + new_alt[k].linked_idx = i; + alt[i].linked_idx = k; + updated[k].svid = new_alt[k].svid; + updated[k].mid = new_alt[k].mid; + k++; + continue; + } + + for (j = i + 1; j < ucsi_max_altmodes; j++) { + if (alt[i].svid != alt[j].svid || + !dp_conf_get_pin_assign(alt[j].mid)) { + continue; + } else { + /* found duplicate dp mode */ + new_alt[k].svid = alt[i].svid; + new_alt[k].mid |= alt[i].mid | alt[j].mid; + new_alt[k].linked_idx = ucsi_multi_dp_index; + alt[i].linked_idx = k; + alt[j].linked_idx = k; + alt[j].checked = true; + found = true; + } + } + if (found) { + uc->has_multiple_dp = true; + } else { + /* didn't find any duplicate dp altmode */ + new_alt[k].svid = alt[i].svid; + new_alt[k].mid |= alt[i].mid; + new_alt[k].linked_idx = i; + alt[i].linked_idx = k; + } + updated[k].svid = new_alt[k].svid; + updated[k].mid = new_alt[k].mid; + k++; + } + return found; +} + +static void ucsi_ccg_update_set_new_cam_cmd(struct ucsi_ccg *uc, + struct ucsi_connector *con, + u64 *cmd) +{ + struct ucsi_ccg_altmode *new_port, *port; + struct typec_altmode *alt = null; + u8 new_cam, cam, pin; + bool enter_new_mode; + int i, j, k = 0xff; + + port = uc->orig; + new_cam = ucsi_set_new_cam_get_am(*cmd); + new_port = &uc->updated[new_cam]; + cam = new_port->linked_idx; + enter_new_mode = ucsi_set_new_cam_enter(*cmd); + + /* + * if cam is ucsi_multi_dp_index then this is dp altmode + * with multiple dp mode. find out cam for best pin assignment + * among all dp mode. priorite pin e->d->c after making sure + * the partner supports that pin. + */ + if (cam == ucsi_multi_dp_index) { + if (enter_new_mode) { + for (i = 0; con->partner_altmode[i]; i++) { + alt = con->partner_altmode[i]; + if (alt->svid == new_port->svid) + break; + } + /* + * alt will always be non null since this is + * ucsi_set_new_cam command and so there will be + * at least one con->partner_altmode[i] with svid + * matching with new_port->svid. + */ + for (j = 0; port[j].svid; j++) { + pin = dp_conf_get_pin_assign(port[j].mid); + if (alt && port[j].svid == alt->svid && + (pin & dp_conf_get_pin_assign(alt->vdo))) { + /* prioritize pin e->d->c */ + if (k == 0xff || (k != 0xff && pin > + dp_conf_get_pin_assign(port[k].mid)) + ) { + k = j; + } + } + } + cam = k; + new_port->active_idx = cam; + } else { + cam = new_port->active_idx; + } + } + *cmd &= ~ucsi_set_new_cam_am_mask; + *cmd |= ucsi_set_new_cam_set_am(cam); +} + + struct ucsi_ccg *uc = ucsi_get_drvdata(ucsi); + int ret; - return ccg_read(ucsi_get_drvdata(ucsi), reg, val, val_len); + ret = ccg_read(uc, reg, val, val_len); + if (ret) + return ret; + + if (offset == ucsi_message_in) { + if (ucsi_command(uc->last_cmd_sent) == ucsi_get_current_cam && + uc->has_multiple_dp) { + ucsi_ccg_update_get_current_cam_cmd(uc, (u8 *)val); + } + uc->last_cmd_sent = 0; + } + + return ret; + struct ucsi_connector *con; + int con_index; + if (offset == ucsi_control && val_len == sizeof(uc->last_cmd_sent)) { + uc->last_cmd_sent = *(u64 *)val; + + if (ucsi_command(uc->last_cmd_sent) == ucsi_set_new_cam && + uc->has_multiple_dp) { + con_index = (uc->last_cmd_sent >> 16) & + ucsi_cmd_connector_mask; + con = &uc->ucsi->connector[con_index - 1]; + ucsi_ccg_update_set_new_cam_cmd(uc, con, (u64 *)val); + } + } + - .async_write = ucsi_ccg_async_write + .async_write = ucsi_ccg_async_write, + .update_altmodes = ucsi_ccg_update_altmodes
|
Universal Serial Bus
|
170a6726d0e266f2c8f306e3d61715c32f4ee41e
|
ajay gupta
|
drivers
|
usb
|
typec, ucsi
|
spi: add hisilicon v3xx spi nor flash controller driver
|
add the driver for the hisilicon v3xx spi nor flash controller, commonly found in hi16xx chipsets.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add hisilicon v3xx spi nor flash controller driver
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
[]
|
['c', 'kconfig', 'makefile']
| 3
| 294
| 0
|
--- diff --git a/drivers/spi/kconfig b/drivers/spi/kconfig --- a/drivers/spi/kconfig +++ b/drivers/spi/kconfig +config spi_hisi_sfc_v3xx + tristate "hisilicon spi-nor flash controller for hi16xx chipsets" + depends on (arm64 && acpi) || compile_test + depends on has_iomem + select config_mtd_spi_nor + help + this enables support for hisilicon v3xx spi-nor flash controller + found in hi16xx chipsets. + diff --git a/drivers/spi/makefile b/drivers/spi/makefile --- a/drivers/spi/makefile +++ b/drivers/spi/makefile +obj-$(config_spi_hisi_sfc_v3xx) += spi-hisi-sfc-v3xx.o diff --git a/drivers/spi/spi-hisi-sfc-v3xx.c b/drivers/spi/spi-hisi-sfc-v3xx.c --- /dev/null +++ b/drivers/spi/spi-hisi-sfc-v3xx.c +// spdx-license-identifier: gpl-2.0-only +// +// hisilicon spi nor v3xx flash controller driver for hi16xx chipsets +// +// copyright (c) 2019 hisilicon technologies co., ltd. +// author: john garry <john.garry@huawei.com> + +#include <linux/acpi.h> +#include <linux/bitops.h> +#include <linux/iopoll.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/slab.h> +#include <linux/spi/spi.h> +#include <linux/spi/spi-mem.h> + +#define hisi_sfc_v3xx_version (0x1f8) + +#define hisi_sfc_v3xx_cmd_cfg (0x300) +#define hisi_sfc_v3xx_cmd_cfg_data_cnt_off 9 +#define hisi_sfc_v3xx_cmd_cfg_rw_msk bit(8) +#define hisi_sfc_v3xx_cmd_cfg_data_en_msk bit(7) +#define hisi_sfc_v3xx_cmd_cfg_dummy_cnt_off 4 +#define hisi_sfc_v3xx_cmd_cfg_addr_en_msk bit(3) +#define hisi_sfc_v3xx_cmd_cfg_cs_sel_off 1 +#define hisi_sfc_v3xx_cmd_cfg_start_msk bit(0) +#define hisi_sfc_v3xx_cmd_ins (0x308) +#define hisi_sfc_v3xx_cmd_addr (0x30c) +#define hisi_sfc_v3xx_cmd_databuf0 (0x400) + +struct hisi_sfc_v3xx_host { + struct device *dev; + void __iomem *regbase; + int max_cmd_dword; +}; + +#define hisi_sfc_v3xx_wait_timeout_us 1000000 +#define hisi_sfc_v3xx_wait_poll_interval_us 10 + +static int hisi_sfc_v3xx_wait_cmd_idle(struct hisi_sfc_v3xx_host *host) +{ + u32 reg; + + return readl_poll_timeout(host->regbase + hisi_sfc_v3xx_cmd_cfg, reg, + !(reg & hisi_sfc_v3xx_cmd_cfg_start_msk), + hisi_sfc_v3xx_wait_poll_interval_us, + hisi_sfc_v3xx_wait_timeout_us); +} + +static int hisi_sfc_v3xx_adjust_op_size(struct spi_mem *mem, + struct spi_mem_op *op) +{ + struct spi_device *spi = mem->spi; + struct hisi_sfc_v3xx_host *host; + uintptr_t addr = (uintptr_t)op->data.buf.in; + int max_byte_count; + + host = spi_controller_get_devdata(spi->master); + + max_byte_count = host->max_cmd_dword * 4; + + if (!is_aligned(addr, 4) && op->data.nbytes >= 4) + op->data.nbytes = 4 - (addr % 4); + else if (op->data.nbytes > max_byte_count) + op->data.nbytes = max_byte_count; + + return 0; +} + +/* + * memcpy_{to,from}io doesn't gurantee 32b accesses - which we require for the + * databuf registers -so use __io{read,write}32_copy when possible. for + * trailing bytes, copy them byte-by-byte from the databuf register, as we + * can't clobber outside the source/dest buffer. + * + * for efficient data read/write, we try to put any start 32b unaligned data + * into a separate transaction in hisi_sfc_v3xx_adjust_op_size(). + */ +static void hisi_sfc_v3xx_read_databuf(struct hisi_sfc_v3xx_host *host, + u8 *to, unsigned int len) +{ + void __iomem *from; + int i; + + from = host->regbase + hisi_sfc_v3xx_cmd_databuf0; + + if (is_aligned((uintptr_t)to, 4)) { + int words = len / 4; + + __ioread32_copy(to, from, words); + + len -= words * 4; + if (len) { + u32 val; + + to += words * 4; + from += words * 4; + + val = __raw_readl(from); + + for (i = 0; i < len; i++, val >>= 8, to++) + *to = (u8)val; + } + } else { + for (i = 0; i < div_round_up(len, 4); i++, from += 4) { + u32 val = __raw_readl(from); + int j; + + for (j = 0; j < 4 && (j + (i * 4) < len); + to++, val >>= 8, j++) + *to = (u8)val; + } + } +} + +static void hisi_sfc_v3xx_write_databuf(struct hisi_sfc_v3xx_host *host, + const u8 *from, unsigned int len) +{ + void __iomem *to; + int i; + + to = host->regbase + hisi_sfc_v3xx_cmd_databuf0; + + if (is_aligned((uintptr_t)from, 4)) { + int words = len / 4; + + __iowrite32_copy(to, from, words); + + len -= words * 4; + if (len) { + u32 val = 0; + + to += words * 4; + from += words * 4; + + for (i = 0; i < len; i++, from++) + val |= *from << i * 8; + __raw_writel(val, to); + } + + } else { + for (i = 0; i < div_round_up(len, 4); i++, to += 4) { + u32 val = 0; + int j; + + for (j = 0; j < 4 && (j + (i * 4) < len); + from++, j++) + val |= *from << j * 8; + __raw_writel(val, to); + } + } +} + +static int hisi_sfc_v3xx_generic_exec_op(struct hisi_sfc_v3xx_host *host, + const struct spi_mem_op *op, + u8 chip_select) +{ + int ret, len = op->data.nbytes; + u32 config = 0; + + if (op->addr.nbytes) + config |= hisi_sfc_v3xx_cmd_cfg_addr_en_msk; + + if (op->data.dir != spi_mem_no_data) { + config |= (len - 1) << hisi_sfc_v3xx_cmd_cfg_data_cnt_off; + config |= hisi_sfc_v3xx_cmd_cfg_data_en_msk; + } + + if (op->data.dir == spi_mem_data_out) + hisi_sfc_v3xx_write_databuf(host, op->data.buf.out, len); + else if (op->data.dir == spi_mem_data_in) + config |= hisi_sfc_v3xx_cmd_cfg_rw_msk; + + config |= op->dummy.nbytes << hisi_sfc_v3xx_cmd_cfg_dummy_cnt_off | + chip_select << hisi_sfc_v3xx_cmd_cfg_cs_sel_off | + hisi_sfc_v3xx_cmd_cfg_start_msk; + + writel(op->addr.val, host->regbase + hisi_sfc_v3xx_cmd_addr); + writel(op->cmd.opcode, host->regbase + hisi_sfc_v3xx_cmd_ins); + + writel(config, host->regbase + hisi_sfc_v3xx_cmd_cfg); + + ret = hisi_sfc_v3xx_wait_cmd_idle(host); + if (ret) + return ret; + + if (op->data.dir == spi_mem_data_in) + hisi_sfc_v3xx_read_databuf(host, op->data.buf.in, len); + + return 0; +} + +static int hisi_sfc_v3xx_exec_op(struct spi_mem *mem, + const struct spi_mem_op *op) +{ + struct hisi_sfc_v3xx_host *host; + struct spi_device *spi = mem->spi; + u8 chip_select = spi->chip_select; + + host = spi_controller_get_devdata(spi->master); + + return hisi_sfc_v3xx_generic_exec_op(host, op, chip_select); +} + +static const struct spi_controller_mem_ops hisi_sfc_v3xx_mem_ops = { + .adjust_op_size = hisi_sfc_v3xx_adjust_op_size, + .exec_op = hisi_sfc_v3xx_exec_op, +}; + +static int hisi_sfc_v3xx_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct hisi_sfc_v3xx_host *host; + struct spi_controller *ctlr; + u32 version; + int ret; + + ctlr = spi_alloc_master(&pdev->dev, sizeof(*host)); + if (!ctlr) + return -enomem; + + ctlr->mode_bits = spi_rx_dual | spi_rx_quad | + spi_tx_dual | spi_tx_quad; + + host = spi_controller_get_devdata(ctlr); + host->dev = dev; + + platform_set_drvdata(pdev, host); + + host->regbase = devm_platform_ioremap_resource(pdev, 0); + if (is_err(host->regbase)) { + ret = ptr_err(host->regbase); + goto err_put_master; + } + + ctlr->bus_num = -1; + ctlr->num_chipselect = 1; + ctlr->mem_ops = &hisi_sfc_v3xx_mem_ops; + + version = readl(host->regbase + hisi_sfc_v3xx_version); + + switch (version) { + case 0x351: + host->max_cmd_dword = 64; + break; + default: + host->max_cmd_dword = 16; + break; + } + + ret = devm_spi_register_controller(dev, ctlr); + if (ret) + goto err_put_master; + + dev_info(&pdev->dev, "hw version 0x%x ", version); + + return 0; + +err_put_master: + spi_master_put(ctlr); + return ret; +} + +#if is_enabled(config_acpi) +static const struct acpi_device_id hisi_sfc_v3xx_acpi_ids[] = { + {"hisi0341", 0}, + {} +}; +module_device_table(acpi, hisi_sfc_v3xx_acpi_ids); +#endif + +static struct platform_driver hisi_sfc_v3xx_spi_driver = { + .driver = { + .name = "hisi-sfc-v3xx", + .acpi_match_table = acpi_ptr(hisi_sfc_v3xx_acpi_ids), + }, + .probe = hisi_sfc_v3xx_probe, +}; + +module_platform_driver(hisi_sfc_v3xx_spi_driver); + +module_license("gpl"); +module_author("john garry <john.garry@huawei.com>"); +module_description("hisilicon spi nor v3xx flash controller driver for hi16xx chipsets");
|
Serial Peripheral Interface (SPI)
|
a2ca53b52e007de81752bbb443d828f5950d6d04
|
john garry
|
drivers
|
spi
| |
spi: pxa2xx: add support for intel comet lake pch-v
|
add support for intel comet lake pch-v which has the same lpss than on intel kaby lake unlike other intel comet lake pch variants that are based on intel cannon lake pch lpss.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add support for intel comet lake pch-v
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['pxa2xx']
|
['c']
| 1
| 3
| 0
|
--- diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c + /* cml-v */ + { pci_vdevice(intel, 0xa3a9), lpss_spt_ssp }, + { pci_vdevice(intel, 0xa3aa), lpss_spt_ssp },
|
Serial Peripheral Interface (SPI)
|
6157d4c255609da28f5a271ec1d56d74beb4c8be
|
jarkko nikula
|
drivers
|
spi
| |
spi: rspi: add support for gpio chip selects
|
add support for gpio chip selects using gpio descriptors. as the rspi controller always drives a native chip select when performing a transfer, at least one native chip select must be left unused.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add support for gpio chip selects
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['rspi']
|
['c']
| 1
| 8
| 1
|
--- diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c --- a/drivers/spi/spi-rspi.c +++ b/drivers/spi/spi-rspi.c + u8 num_hw_ss; - rspi->spcmd |= spcmd_ssla(spi->chip_select); + rspi->spcmd |= spcmd_ssla(spi->cs_gpiod ? rspi->ctlr->unused_native_cs + : spi->chip_select); + .num_hw_ss = 2, + .num_hw_ss = 1, + .num_hw_ss = 1, + ctlr->use_gpio_descriptors = true; + ctlr->max_native_cs = rspi->ops->num_hw_ss;
|
Serial Peripheral Interface (SPI)
|
144d8f9781e60d89dfd614210d2cedbefbba8885
|
geert uytterhoeven
|
drivers
|
spi
| |
spi: rspi: add support for multiple native chip selects
|
rspi variants on some superh or r-mobile socs support multiple native chip selects. add support for this by configuring the ssl assert signal setting.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add support for multiple native chip selects
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['rspi']
|
['c']
| 1
| 4
| 1
|
--- diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c --- a/drivers/spi/spi-rspi.c +++ b/drivers/spi/spi-rspi.c -#define spcmd_ssla_mask 0x0030 /* ssl assert signal setting (rspi) */ +#define spcmd_ssla(i) ((i) << 4) /* ssl assert signal setting */ + /* configure slave signal to assert */ + rspi->spcmd |= spcmd_ssla(spi->chip_select); +
|
Serial Peripheral Interface (SPI)
|
9815ed8714d26560d09b41f906b96a97f9bc3e3f
|
geert uytterhoeven
|
drivers
|
spi
| |
spi: spi-ti-qspi: support large flash devices
|
the ti qspi ip has limitations: - the mmio region is 64mb in size - in non-mmio mode, the transfer can handle 4096 words max.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
support large flash devices
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['spi-ti-qspi']
|
['c']
| 1
| 30
| 0
|
- the mmio region is 64mb in size - in non-mmio mode, the transfer can handle 4096 words max. --- diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c --- a/drivers/spi/spi-ti-qspi.c +++ b/drivers/spi/spi-ti-qspi.c +static int ti_qspi_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op) +{ + struct ti_qspi *qspi = spi_controller_get_devdata(mem->spi->master); + size_t max_len; + + if (op->data.dir == spi_mem_data_in) { + if (op->addr.val < qspi->mmap_size) { + /* limit mmio to the mmaped region */ + if (op->addr.val + op->data.nbytes > qspi->mmap_size) { + max_len = qspi->mmap_size - op->addr.val; + op->data.nbytes = min((size_t) op->data.nbytes, + max_len); + } + } else { + /* + * use fallback mode (sw generated transfers) above the + * mmaped region. + * adjust size to comply with the qspi max frame length. + */ + max_len = qspi_frame; + max_len -= 1 + op->addr.nbytes + op->dummy.nbytes; + op->data.nbytes = min((size_t) op->data.nbytes, + max_len); + } + } + + return 0; +} + + .adjust_op_size = ti_qspi_adjust_op_size,
|
Serial Peripheral Interface (SPI)
|
e97f491450805fe6cbfd482b97b5427b21dec575
|
jean pihet
|
drivers
|
spi
| |
watchdog: it87_wdt: add it8786 id
|
it8786 watchdog works as in it872x
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add it8786 id
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['it87_wdt']
|
['c']
| 1
| 2
| 0
|
--- diff --git a/drivers/watchdog/it87_wdt.c b/drivers/watchdog/it87_wdt.c --- a/drivers/watchdog/it87_wdt.c +++ b/drivers/watchdog/it87_wdt.c +#define it8786_id 0x8786 + case it8786_id:
|
Watchdog
|
6ae58eecad31362f5caa0bd44ff7e78fbac391dd
|
vincent prince
|
drivers
|
watchdog
| |
watchdog: mtk_wdt: mt8183: add reset controller
|
add reset controller api in watchdog driver. besides watchdog, mtk toprgu module alsa provide sub-system (eg, audio, camera, codec and connectivity) software reset functionality.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add reset controller
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['mtk_wdt', 'mt8183']
|
['c']
| 1
| 98
| 1
|
--- diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c --- a/drivers/watchdog/mtk_wdt.c +++ b/drivers/watchdog/mtk_wdt.c +#include <dt-bindings/reset-controller/mt8183-resets.h> +#include <linux/delay.h> +#include <linux/of_device.h> +#include <linux/reset-controller.h> -#include <linux/delay.h> +#define wdt_swsysrst 0x18u +#define wdt_swsys_rst_key 0x88000000 + + spinlock_t lock; /* protects wdt_swsysrst reg */ + struct reset_controller_dev rcdev; +}; + +struct mtk_wdt_data { + int toprgu_sw_rst_num; +static const struct mtk_wdt_data mt8183_data = { + .toprgu_sw_rst_num = mt8183_toprgu_sw_rst_num, +}; + +static int toprgu_reset_update(struct reset_controller_dev *rcdev, + unsigned long id, bool assert) +{ + unsigned int tmp; + unsigned long flags; + struct mtk_wdt_dev *data = + container_of(rcdev, struct mtk_wdt_dev, rcdev); + + spin_lock_irqsave(&data->lock, flags); + + tmp = readl(data->wdt_base + wdt_swsysrst); + if (assert) + tmp |= bit(id); + else + tmp &= ~bit(id); + tmp |= wdt_swsys_rst_key; + writel(tmp, data->wdt_base + wdt_swsysrst); + + spin_unlock_irqrestore(&data->lock, flags); + + return 0; +} + +static int toprgu_reset_assert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + return toprgu_reset_update(rcdev, id, true); +} + +static int toprgu_reset_deassert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + return toprgu_reset_update(rcdev, id, false); +} + +static int toprgu_reset(struct reset_controller_dev *rcdev, + unsigned long id) +{ + int ret; + + ret = toprgu_reset_assert(rcdev, id); + if (ret) + return ret; + + return toprgu_reset_deassert(rcdev, id); +} + +static const struct reset_control_ops toprgu_reset_ops = { + .assert = toprgu_reset_assert, + .deassert = toprgu_reset_deassert, + .reset = toprgu_reset, +}; + +static int toprgu_register_reset_controller(struct platform_device *pdev, + int rst_num) +{ + int ret; + struct mtk_wdt_dev *mtk_wdt = platform_get_drvdata(pdev); + + spin_lock_init(&mtk_wdt->lock); + + mtk_wdt->rcdev.owner = this_module; + mtk_wdt->rcdev.nr_resets = rst_num; + mtk_wdt->rcdev.ops = &toprgu_reset_ops; + mtk_wdt->rcdev.of_node = pdev->dev.of_node; + ret = devm_reset_controller_register(&pdev->dev, &mtk_wdt->rcdev); + if (ret != 0) + dev_err(&pdev->dev, + "couldn't register wdt reset controller: %d ", ret); + return ret; +} + + const struct mtk_wdt_data *wdt_data; + wdt_data = of_device_get_match_data(dev); + if (wdt_data) { + err = toprgu_register_reset_controller(pdev, + wdt_data->toprgu_sw_rst_num); + if (err) + return err; + } + { .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data },
|
Watchdog
|
c254e103082b74e4f0987c364e5e3b138dbef1cc
|
yong liang matthias brugger matthias bgg gmail com yingjoe chen yingjoe chen mediatek com philipp zabel p zabel pengutronix de guenter roeck linux roeck us net
|
drivers
|
watchdog
| |
watchdog: mtk_wdt: mt2712: add reset controller
|
add reset controller for 2712. besides watchdog, mtk toprgu module alsa provide sub-system (eg, audio, camera, codec and connectivity) software reset functionality.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add reset controller
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['mtk_wdt', 'mt2712']
|
['c']
| 1
| 6
| 0
|
--- diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c --- a/drivers/watchdog/mtk_wdt.c +++ b/drivers/watchdog/mtk_wdt.c +#include <dt-bindings/reset-controller/mt2712-resets.h> +static const struct mtk_wdt_data mt2712_data = { + .toprgu_sw_rst_num = mt2712_toprgu_sw_rst_num, +}; + + { .compatible = "mediatek,mt2712-wdt", .data = &mt2712_data },
|
Watchdog
|
9e5236e7cec110610f3bc824a4d535c1271e4bb5
|
yong liang matthias brugger matthias bgg gmail com yingjoe chen yingjoe chen mediatek com philipp zabel p zabel pengutronix de
|
drivers
|
watchdog
| |
serial: 8250: support disabling mdelay-filled probes of 16550a variants
|
the 8250 driver can probe for many variants of the venerable 16550a serial port. some of those probes involve long (20ms) mdelay calls, which delay system boot. modern systems and virtual machines don't have those variants.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
support disabling mdelay-filled probes of 16550a variants
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['8250']
|
['c', 'kconfig']
| 2
| 13
| 0
|
--- diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c --- a/drivers/tty/serial/8250/8250_port.c +++ b/drivers/tty/serial/8250/8250_port.c + if (!is_enabled(config_serial_8250_16550a_variants)) + return; + diff --git a/drivers/tty/serial/8250/kconfig b/drivers/tty/serial/8250/kconfig --- a/drivers/tty/serial/8250/kconfig +++ b/drivers/tty/serial/8250/kconfig +config serial_8250_16550a_variants + bool "support for variants of the 16550a serial port" + depends on serial_8250 + help + the 8250 driver can probe for many variants of the venerable 16550a + serial port. doing so takes additional time at boot. + + on modern systems, especially those using serial only for a simple + console, you can say n here. +
|
Serial
|
dc56ecb81a0aa46a7e127e916df5c8fdb8364f0b
|
josh triplett
|
drivers
|
tty
|
8250, serial
|
serial: 8250_exar: add support for acces cards
|
add acces vids and pids that use the exar chips
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add support for acces cards
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['8250_exar']
|
['c']
| 1
| 33
| 0
|
--- diff --git a/drivers/tty/serial/8250/8250_exar.c b/drivers/tty/serial/8250/8250_exar.c --- a/drivers/tty/serial/8250/8250_exar.c +++ b/drivers/tty/serial/8250/8250_exar.c +#define pci_device_id_acces_com_2s 0x1052 +#define pci_device_id_acces_com_4s 0x105d +#define pci_device_id_acces_com_8s 0x106c +#define pci_device_id_acces_com232_8 0x10a8 +#define pci_device_id_acces_com_2sm 0x10d2 +#define pci_device_id_acces_com_4sm 0x10db +#define pci_device_id_acces_com_8sm 0x10ea + +static const struct exar8250_board acces_com_2x = { + .num_ports = 2, + .setup = pci_xr17c154_setup, +}; + +static const struct exar8250_board acces_com_4x = { + .num_ports = 4, + .setup = pci_xr17c154_setup, +}; + +static const struct exar8250_board acces_com_8x = { + .num_ports = 8, + .setup = pci_xr17c154_setup, +}; + + + exar_device(accessio, acces_com_2s, acces_com_2x), + exar_device(accessio, acces_com_4s, acces_com_4x), + exar_device(accessio, acces_com_8s, acces_com_8x), + exar_device(accessio, acces_com232_8, acces_com_8x), + exar_device(accessio, acces_com_2sm, acces_com_2x), + exar_device(accessio, acces_com_4sm, acces_com_4x), + exar_device(accessio, acces_com_8sm, acces_com_8x), + +
|
Serial
|
10c5ccc3c6d32f3d7d6c07de1d3f0f4b52f3e3ab
|
jay dolan
|
drivers
|
tty
|
8250, serial
|
tty: baudrate: sparc supports few more baud rates
|
according to termbits.h sparc supports few more baud rates than currently defined in tty_baudrate.c.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
sparc supports few more baud rates
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['baudrate']
|
['c']
| 1
| 4
| 2
|
--- diff --git a/drivers/tty/tty_baudrate.c b/drivers/tty/tty_baudrate.c --- a/drivers/tty/tty_baudrate.c +++ b/drivers/tty/tty_baudrate.c - 76800, 153600, 307200, 614400, 921600 + 76800, 153600, 307200, 614400, 921600, 500000, 576000, + 1000000, 1152000, 1500000, 2000000 - b76800, b153600, b307200, b614400, b921600 + b76800, b153600, b307200, b614400, b921600, b500000, b576000, + b1000000, b1152000, b1500000, b2000000
|
Serial
|
1ddeb5a74ab6941dfd310b73c8554c393c70c2ef
|
andy shevchenko
|
drivers
|
tty
| |
tty: serial: meson_uart: add support for kernel debugger
|
the kgdb invokes the poll_put_char and poll_get_char when communicating with the host. this patch implement the serial polling hooks for the meson_uart to be used for kgdb debugging over serial line.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add support for kernel debugger
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['serial', 'meson_uart']
|
['c']
| 1
| 65
| 0
|
--- diff --git a/drivers/tty/serial/meson_uart.c b/drivers/tty/serial/meson_uart.c --- a/drivers/tty/serial/meson_uart.c +++ b/drivers/tty/serial/meson_uart.c +#include <linux/iopoll.h> +#define aml_uart_poll_usec 5 +#define aml_uart_timeout_usec 10000 +#ifdef config_console_poll +/* + * console polling routines for writing and reading from the uart while + * in an interrupt or debug context (i.e. kgdb). + */ + +static int meson_uart_poll_get_char(struct uart_port *port) +{ + u32 c; + unsigned long flags; + + spin_lock_irqsave(&port->lock, flags); + + if (readl(port->membase + aml_uart_status) & aml_uart_rx_empty) + c = no_poll_char; + else + c = readl(port->membase + aml_uart_rfifo); + + spin_unlock_irqrestore(&port->lock, flags); + + return c; +} + +static void meson_uart_poll_put_char(struct uart_port *port, unsigned char c) +{ + unsigned long flags; + u32 reg; + int ret; + + spin_lock_irqsave(&port->lock, flags); + + /* wait until fifo is empty or timeout */ + ret = readl_poll_timeout_atomic(port->membase + aml_uart_status, reg, + reg & aml_uart_tx_empty, + aml_uart_poll_usec, + aml_uart_timeout_usec); + if (ret == -etimedout) { + dev_err(port->dev, "timeout waiting for uart tx empty "); + goto out; + } + + /* write the character */ + writel(c, port->membase + aml_uart_wfifo); + + /* wait until fifo is empty or timeout */ + ret = readl_poll_timeout_atomic(port->membase + aml_uart_status, reg, + reg & aml_uart_tx_empty, + aml_uart_poll_usec, + aml_uart_timeout_usec); + if (ret == -etimedout) + dev_err(port->dev, "timeout waiting for uart tx empty "); + +out: + spin_unlock_irqrestore(&port->lock, flags); +} + +#endif /* config_console_poll */ + +#ifdef config_console_poll + .poll_get_char = meson_uart_poll_get_char, + .poll_put_char = meson_uart_poll_put_char, +#endif
|
Serial
|
8412ba1db8250087eb5d6e3525254df3be79dc3e
|
julien masson
|
drivers
|
tty
|
serial
|
pm / devfreq: add clearing transitions stats
|
add clearing transition table and time in states devfreq statistics by writing 0 (zero) to trans_stat file in devfreq sysfs. an example use is like following:
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
improve devfreq statistics counting add ability to reset statistics using sysfs
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['devfreq']
|
['c', 'sysfs-class-devfreq']
| 2
| 35
| 5
|
--- diff --git a/documentation/abi/testing/sysfs-class-devfreq b/documentation/abi/testing/sysfs-class-devfreq --- a/documentation/abi/testing/sysfs-class-devfreq +++ b/documentation/abi/testing/sysfs-class-devfreq - this abi shows the statistics of devfreq behavior on a - specific device. it shows the time spent in each state and - the number of transitions between states. + this abi shows or clears the statistics of devfreq behavior + on a specific device. it shows the time spent in each state + and the number of transitions between states. - with its profile. + with its profile. if need to reset the statistics of devfreq + behavior on a specific device, enter 0(zero) to 'trans_stat' + as following: + echo 0 > /sys/class/devfreq/.../trans_stat diff --git a/drivers/devfreq/devfreq.c b/drivers/devfreq/devfreq.c --- a/drivers/devfreq/devfreq.c +++ b/drivers/devfreq/devfreq.c -static device_attr_ro(trans_stat); + +static ssize_t trans_stat_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct devfreq *df = to_devfreq(dev); + int err, value; + + if (df->profile->max_state == 0) + return count; + + err = kstrtoint(buf, 10, &value); + if (err || value != 0) + return -einval; + + mutex_lock(&df->lock); + memset(df->time_in_state, 0, (df->profile->max_state * + sizeof(*df->time_in_state))); + memset(df->trans_table, 0, array3_size(sizeof(unsigned int), + df->profile->max_state, + df->profile->max_state)); + df->total_trans = 0; + df->last_stat_updated = get_jiffies_64(); + mutex_unlock(&df->lock); + + return count; +} +static device_attr_rw(trans_stat);
|
Device Voltage and Frequency Scaling
|
14a34396819960865ff737c665c6e46b64d0e04a
|
kamil konieczny
|
documentation
|
abi
|
testing
|
pm / devfreq: add new name attribute for sysfs
|
the commit 4585fbcb5331 ("pm / devfreq: modify the device name as devfreq(x) for sysfs") changed the node name to devfreq(x). after this commit, it is not possible to get the device name through /sys/class/devfreq/devfreq(x)/*.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add new
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['devfreq']
|
['c', 'sysfs-class-devfreq']
| 2
| 16
| 0
|
--- diff --git a/documentation/abi/testing/sysfs-class-devfreq b/documentation/abi/testing/sysfs-class-devfreq --- a/documentation/abi/testing/sysfs-class-devfreq +++ b/documentation/abi/testing/sysfs-class-devfreq +what: /sys/class/devfreq/.../name +date: november 2019 +contact: chanwoo choi <cw00.choi@samsung.com> +description: + the /sys/class/devfreq/.../name shows the name of device + of the corresponding devfreq object. + diff --git a/drivers/devfreq/devfreq.c b/drivers/devfreq/devfreq.c --- a/drivers/devfreq/devfreq.c +++ b/drivers/devfreq/devfreq.c +static ssize_t name_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct devfreq *devfreq = to_devfreq(dev); + return sprintf(buf, "%s ", dev_name(devfreq->dev.parent)); +} +static device_attr_ro(name); + + &dev_attr_name.attr,
|
Device Voltage and Frequency Scaling
|
2fee1a7cc6b1ce6634bb0f025be2c94a58dfa34d
|
chanwoo choi
|
documentation
|
abi
|
testing
|
pm / devfreq: add dynamic scaling for imx8m ddr controller
|
add driver for dynamic scaling the ddr controller on imx8m chips. actual frequency switching is implemented inside tf-a, this driver wraps the smc calls and synchronizes the clk tree.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add dynamic scaling for imx8m ddr controller
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['devfreq']
|
['c', 'kconfig', 'makefile']
| 3
| 476
| 0
|
+----------+ |\ +------+ +----------+ |u|---------->| d | +---------+ | | +---------+ | | +----------+ | | | +----------+ | | +----------+ +------+ --- diff --git a/drivers/devfreq/kconfig b/drivers/devfreq/kconfig --- a/drivers/devfreq/kconfig +++ b/drivers/devfreq/kconfig +config arm_imx8m_ddrc_devfreq + tristate "i.mx8m ddrc devfreq driver" + depends on (arch_mxc && have_arm_smccc) || \ + (compile_test && have_arm_smccc) + select devfreq_gov_simple_ondemand + select devfreq_gov_userspace + help + this adds the devfreq driver for the i.mx8m ddr controller. it allows + adjusting dram frequency. + diff --git a/drivers/devfreq/makefile b/drivers/devfreq/makefile --- a/drivers/devfreq/makefile +++ b/drivers/devfreq/makefile +obj-$(config_arm_imx8m_ddrc_devfreq) += imx8m-ddrc.o diff --git a/drivers/devfreq/imx8m-ddrc.c b/drivers/devfreq/imx8m-ddrc.c --- /dev/null +++ b/drivers/devfreq/imx8m-ddrc.c +// spdx-license-identifier: gpl-2.0 +/* + * copyright 2019 nxp + */ + +#include <linux/module.h> +#include <linux/device.h> +#include <linux/of_device.h> +#include <linux/platform_device.h> +#include <linux/devfreq.h> +#include <linux/pm_opp.h> +#include <linux/clk.h> +#include <linux/clk-provider.h> +#include <linux/arm-smccc.h> + +#define imx_sip_ddr_dvfs 0xc2000004 + +/* values starting from 0 switch to specific frequency */ +#define imx_sip_ddr_freq_set_high 0x00 + +/* deprecated after moving irq handling to atf */ +#define imx_sip_ddr_dvfs_wait_change 0x0f + +/* query available frequencies. */ +#define imx_sip_ddr_dvfs_get_freq_count 0x10 +#define imx_sip_ddr_dvfs_get_freq_info 0x11 + +/* + * this should be in a 1:1 mapping with devicetree opps but + * firmware provides additional info. + */ +struct imx8m_ddrc_freq { + unsigned long rate; + unsigned long smcarg; + int dram_core_parent_index; + int dram_alt_parent_index; + int dram_apb_parent_index; +}; + +/* hardware limitation */ +#define imx8m_ddrc_max_freq_count 4 + +/* + * i.mx8m dram controller clocks have the following structure (abridged): + * + * +----------+ |\ +------+ + * | dram_pll |-------|m| dram_core | | + * +----------+ |u|---------->| d | + * /--|x| | d | + * dram_alt_root | |/ | r | + * | | c | + * +---------+ | | + * |fix div/4| | | + * +---------+ | | + * composite: | | | + * +----------+ | | | + * | dram_alt |----/ | | + * +----------+ | | + * | dram_apb |-------------------->| | + * +----------+ +------+ + * + * the dram_pll is used for higher rates and dram_alt is used for lower rates. + * + * frequency switching is implemented in tf-a (via smc call) and can change the + * configuration of the clocks, including mux parents. the dram_alt and + * dram_apb clocks are "imx composite" and their parent can change too. + * + * we need to prepare/enable the new mux parents head of switching and update + * their information afterwards. + */ +struct imx8m_ddrc { + struct devfreq_dev_profile profile; + struct devfreq *devfreq; + + /* for frequency switching: */ + struct clk *dram_core; + struct clk *dram_pll; + struct clk *dram_alt; + struct clk *dram_apb; + + int freq_count; + struct imx8m_ddrc_freq freq_table[imx8m_ddrc_max_freq_count]; +}; + +static struct imx8m_ddrc_freq *imx8m_ddrc_find_freq(struct imx8m_ddrc *priv, + unsigned long rate) +{ + struct imx8m_ddrc_freq *freq; + int i; + + /* + * firmware reports values in mt/s, so we round-down from hz + * rounding is extra generous to ensure a match. + */ + rate = div_round_closest(rate, 250000); + for (i = 0; i < priv->freq_count; ++i) { + freq = &priv->freq_table[i]; + if (freq->rate == rate || + freq->rate + 1 == rate || + freq->rate - 1 == rate) + return freq; + } + + return null; +} + +static void imx8m_ddrc_smc_set_freq(int target_freq) +{ + struct arm_smccc_res res; + u32 online_cpus = 0; + int cpu; + + local_irq_disable(); + + for_each_online_cpu(cpu) + online_cpus |= (1 << (cpu * 8)); + + /* change the ddr freqency */ + arm_smccc_smc(imx_sip_ddr_dvfs, target_freq, online_cpus, + 0, 0, 0, 0, 0, &res); + + local_irq_enable(); +} + +static struct clk *clk_get_parent_by_index(struct clk *clk, int index) +{ + struct clk_hw *hw; + + hw = clk_hw_get_parent_by_index(__clk_get_hw(clk), index); + + return hw ? hw->clk : null; +} + +static int imx8m_ddrc_set_freq(struct device *dev, struct imx8m_ddrc_freq *freq) +{ + struct imx8m_ddrc *priv = dev_get_drvdata(dev); + struct clk *new_dram_core_parent; + struct clk *new_dram_alt_parent; + struct clk *new_dram_apb_parent; + int ret; + + /* + * fetch new parents + * + * new_dram_alt_parent and new_dram_apb_parent are optional but + * new_dram_core_parent is not. + */ + new_dram_core_parent = clk_get_parent_by_index( + priv->dram_core, freq->dram_core_parent_index - 1); + if (!new_dram_core_parent) { + dev_err(dev, "failed to fetch new dram_core parent "); + return -einval; + } + if (freq->dram_alt_parent_index) { + new_dram_alt_parent = clk_get_parent_by_index( + priv->dram_alt, + freq->dram_alt_parent_index - 1); + if (!new_dram_alt_parent) { + dev_err(dev, "failed to fetch new dram_alt parent "); + return -einval; + } + } else + new_dram_alt_parent = null; + + if (freq->dram_apb_parent_index) { + new_dram_apb_parent = clk_get_parent_by_index( + priv->dram_apb, + freq->dram_apb_parent_index - 1); + if (!new_dram_apb_parent) { + dev_err(dev, "failed to fetch new dram_apb parent "); + return -einval; + } + } else + new_dram_apb_parent = null; + + /* increase reference counts and ensure clks are on before switch */ + ret = clk_prepare_enable(new_dram_core_parent); + if (ret) { + dev_err(dev, "failed to enable new dram_core parent: %d ", + ret); + goto out; + } + ret = clk_prepare_enable(new_dram_alt_parent); + if (ret) { + dev_err(dev, "failed to enable new dram_alt parent: %d ", + ret); + goto out_disable_core_parent; + } + ret = clk_prepare_enable(new_dram_apb_parent); + if (ret) { + dev_err(dev, "failed to enable new dram_apb parent: %d ", + ret); + goto out_disable_alt_parent; + } + + imx8m_ddrc_smc_set_freq(freq->smcarg); + + /* update parents in clk tree after switch. */ + ret = clk_set_parent(priv->dram_core, new_dram_core_parent); + if (ret) + dev_warn(dev, "failed to set dram_core parent: %d ", ret); + if (new_dram_alt_parent) { + ret = clk_set_parent(priv->dram_alt, new_dram_alt_parent); + if (ret) + dev_warn(dev, "failed to set dram_alt parent: %d ", + ret); + } + if (new_dram_apb_parent) { + ret = clk_set_parent(priv->dram_apb, new_dram_apb_parent); + if (ret) + dev_warn(dev, "failed to set dram_apb parent: %d ", + ret); + } + + /* + * explicitly refresh dram pll rate. + * + * even if it's marked with clk_get_rate_nocache the rate will not be + * automatically refreshed when clk_get_rate is called on children. + */ + clk_get_rate(priv->dram_pll); + + /* + * clk_set_parent transfer the reference count from old parent. + * now we drop extra reference counts used during the switch + */ + clk_disable_unprepare(new_dram_apb_parent); +out_disable_alt_parent: + clk_disable_unprepare(new_dram_alt_parent); +out_disable_core_parent: + clk_disable_unprepare(new_dram_core_parent); +out: + return ret; +} + +static int imx8m_ddrc_target(struct device *dev, unsigned long *freq, u32 flags) +{ + struct imx8m_ddrc *priv = dev_get_drvdata(dev); + struct imx8m_ddrc_freq *freq_info; + struct dev_pm_opp *new_opp; + unsigned long old_freq, new_freq; + int ret; + + new_opp = devfreq_recommended_opp(dev, freq, flags); + if (is_err(new_opp)) { + ret = ptr_err(new_opp); + dev_err(dev, "failed to get recommended opp: %d ", ret); + return ret; + } + dev_pm_opp_put(new_opp); + + old_freq = clk_get_rate(priv->dram_core); + if (*freq == old_freq) + return 0; + + freq_info = imx8m_ddrc_find_freq(priv, *freq); + if (!freq_info) + return -einval; + + /* + * read back the clk rate to verify switch was correct and so that + * we can report it on all error paths. + */ + ret = imx8m_ddrc_set_freq(dev, freq_info); + + new_freq = clk_get_rate(priv->dram_core); + if (ret) + dev_err(dev, "ddrc failed freq switch to %lu from %lu: error %d. now at %lu ", + *freq, old_freq, ret, new_freq); + else if (*freq != new_freq) + dev_err(dev, "ddrc failed freq update to %lu from %lu, now at %lu ", + *freq, old_freq, new_freq); + else + dev_dbg(dev, "ddrc freq set to %lu (was %lu) ", + *freq, old_freq); + + return ret; +} + +static int imx8m_ddrc_get_cur_freq(struct device *dev, unsigned long *freq) +{ + struct imx8m_ddrc *priv = dev_get_drvdata(dev); + + *freq = clk_get_rate(priv->dram_core); + + return 0; +} + +static int imx8m_ddrc_get_dev_status(struct device *dev, + struct devfreq_dev_status *stat) +{ + struct imx8m_ddrc *priv = dev_get_drvdata(dev); + + stat->busy_time = 0; + stat->total_time = 0; + stat->current_frequency = clk_get_rate(priv->dram_core); + + return 0; +} + +static int imx8m_ddrc_init_freq_info(struct device *dev) +{ + struct imx8m_ddrc *priv = dev_get_drvdata(dev); + struct arm_smccc_res res; + int index; + + /* an error here means ddr dvfs api not supported by firmware */ + arm_smccc_smc(imx_sip_ddr_dvfs, imx_sip_ddr_dvfs_get_freq_count, + 0, 0, 0, 0, 0, 0, &res); + priv->freq_count = res.a0; + if (priv->freq_count <= 0 || + priv->freq_count > imx8m_ddrc_max_freq_count) + return -enodev; + + for (index = 0; index < priv->freq_count; ++index) { + struct imx8m_ddrc_freq *freq = &priv->freq_table[index]; + + arm_smccc_smc(imx_sip_ddr_dvfs, imx_sip_ddr_dvfs_get_freq_info, + index, 0, 0, 0, 0, 0, &res); + /* result should be strictly positive */ + if ((long)res.a0 <= 0) + return -enodev; + + freq->rate = res.a0; + freq->smcarg = index; + freq->dram_core_parent_index = res.a1; + freq->dram_alt_parent_index = res.a2; + freq->dram_apb_parent_index = res.a3; + + /* dram_core has 2 options: dram_pll or dram_alt_root */ + if (freq->dram_core_parent_index != 1 && + freq->dram_core_parent_index != 2) + return -enodev; + /* dram_apb and dram_alt have exactly 8 possible parents */ + if (freq->dram_alt_parent_index > 8 || + freq->dram_apb_parent_index > 8) + return -enodev; + /* dram_core from alt requires explicit dram_alt parent */ + if (freq->dram_core_parent_index == 2 && + freq->dram_alt_parent_index == 0) + return -enodev; + } + + return 0; +} + +static int imx8m_ddrc_check_opps(struct device *dev) +{ + struct imx8m_ddrc *priv = dev_get_drvdata(dev); + struct imx8m_ddrc_freq *freq_info; + struct dev_pm_opp *opp; + unsigned long freq; + int i, opp_count; + + /* enumerate dt opps and disable those not supported by firmware */ + opp_count = dev_pm_opp_get_opp_count(dev); + if (opp_count < 0) + return opp_count; + for (i = 0, freq = 0; i < opp_count; ++i, ++freq) { + opp = dev_pm_opp_find_freq_ceil(dev, &freq); + if (is_err(opp)) { + dev_err(dev, "failed enumerating opps: %ld ", + ptr_err(opp)); + return ptr_err(opp); + } + dev_pm_opp_put(opp); + + freq_info = imx8m_ddrc_find_freq(priv, freq); + if (!freq_info) { + dev_info(dev, "disable unsupported opp %luhz %lumt/s ", + freq, div_round_closest(freq, 250000)); + dev_pm_opp_disable(dev, freq); + } + } + + return 0; +} + +static void imx8m_ddrc_exit(struct device *dev) +{ + dev_pm_opp_of_remove_table(dev); +} + +static int imx8m_ddrc_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct imx8m_ddrc *priv; + const char *gov = devfreq_gov_userspace; + int ret; + + priv = devm_kzalloc(dev, sizeof(*priv), gfp_kernel); + if (!priv) + return -enomem; + + platform_set_drvdata(pdev, priv); + + ret = imx8m_ddrc_init_freq_info(dev); + if (ret) { + dev_err(dev, "failed to init firmware freq info: %d ", ret); + return ret; + } + + priv->dram_core = devm_clk_get(dev, "core"); + priv->dram_pll = devm_clk_get(dev, "pll"); + priv->dram_alt = devm_clk_get(dev, "alt"); + priv->dram_apb = devm_clk_get(dev, "apb"); + if (is_err(priv->dram_core) || + is_err(priv->dram_pll) || + is_err(priv->dram_alt) || + is_err(priv->dram_apb)) { + ret = ptr_err(priv->devfreq); + dev_err(dev, "failed to fetch clocks: %d ", ret); + return ret; + } + + ret = dev_pm_opp_of_add_table(dev); + if (ret < 0) { + dev_err(dev, "failed to get opp table "); + return ret; + } + + ret = imx8m_ddrc_check_opps(dev); + if (ret < 0) + goto err; + + priv->profile.polling_ms = 1000; + priv->profile.target = imx8m_ddrc_target; + priv->profile.get_dev_status = imx8m_ddrc_get_dev_status; + priv->profile.exit = imx8m_ddrc_exit; + priv->profile.get_cur_freq = imx8m_ddrc_get_cur_freq; + priv->profile.initial_freq = clk_get_rate(priv->dram_core); + + priv->devfreq = devm_devfreq_add_device(dev, &priv->profile, + gov, null); + if (is_err(priv->devfreq)) { + ret = ptr_err(priv->devfreq); + dev_err(dev, "failed to add devfreq device: %d ", ret); + goto err; + } + + return 0; + +err: + dev_pm_opp_of_remove_table(dev); + return ret; +} + +static const struct of_device_id imx8m_ddrc_of_match[] = { + { .compatible = "fsl,imx8m-ddrc", }, + { /* sentinel */ }, +}; +module_device_table(of, imx8m_ddrc_of_match); + +static struct platform_driver imx8m_ddrc_platdrv = { + .probe = imx8m_ddrc_probe, + .driver = { + .name = "imx8m-ddrc-devfreq", + .of_match_table = of_match_ptr(imx8m_ddrc_of_match), + }, +}; +module_platform_driver(imx8m_ddrc_platdrv); + +module_description("i.mx8m ddr controller frequency driver"); +module_author("leonard crestez <leonard.crestez@nxp.com>"); +module_license("gpl v2");
|
Device Voltage and Frequency Scaling
|
5af744ebae856a50e8b5e208a5acf28713a4ce98
|
leonard crestez
|
drivers
|
devfreq
| |
pm / devfreq: add debugfs support with devfreq_summary file
|
add debugfs interface to provide debugging information of devfreq device. it contains 'devfreq_summary' entry to show the summary of registered devfreq devices as following and the additional debugfs file will be added. - /sys/kernel/debug/devfreq/devfreq_summary
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add debugfs support with devfreq_summary file
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['devfreq']
|
['c']
| 1
| 82
| 0
|
- /sys/kernel/debug/devfreq/devfreq_summary - dev_name : device name of h/w - dev : device name made by devfreq core - parent_dev : if devfreq device uses the passive governor, - governor : devfreq governor name - polling_ms : if devfreq device uses the simple_ondemand governor, - cur_freq_hz : current frequency (unit: hz) - min_freq_hz : minimum frequency (unit: hz) - max_freq_hz : maximum frequency (unit: hz) ------------------------------ ---------- ---------- --------------- ---------- ------------ ------------ ------------ --- diff --git a/drivers/devfreq/devfreq.c b/drivers/devfreq/devfreq.c --- a/drivers/devfreq/devfreq.c +++ b/drivers/devfreq/devfreq.c +#include <linux/debugfs.h> +static struct dentry *devfreq_debugfs; +/** + * devfreq_summary_show() - show the summary of the devfreq devices + * @s: seq_file instance to show the summary of devfreq devices + * @data: not used + * + * show the summary of the devfreq devices via 'devfreq_summary' debugfs file. + * it helps that user can know the detailed information of the devfreq devices. + * + * return 0 always because it shows the information without any data change. + */ +static int devfreq_summary_show(struct seq_file *s, void *data) +{ + struct devfreq *devfreq; + struct devfreq *p_devfreq = null; + unsigned long cur_freq, min_freq, max_freq; + unsigned int polling_ms; + + seq_printf(s, "%-30s %-10s %-10s %-15s %10s %12s %12s %12s ", + "dev_name", + "dev", + "parent_dev", + "governor", + "polling_ms", + "cur_freq_hz", + "min_freq_hz", + "max_freq_hz"); + seq_printf(s, "%30s %10s %10s %15s %10s %12s %12s %12s ", + "------------------------------", + "----------", + "----------", + "---------------", + "----------", + "------------", + "------------", + "------------"); + + mutex_lock(&devfreq_list_lock); + + list_for_each_entry_reverse(devfreq, &devfreq_list, node) { +#if is_enabled(config_devfreq_gov_passive) + if (!strncmp(devfreq->governor_name, devfreq_gov_passive, + devfreq_name_len)) { + struct devfreq_passive_data *data = devfreq->data; + + if (data) + p_devfreq = data->parent; + } else { + p_devfreq = null; + } +#endif + + mutex_lock(&devfreq->lock); + cur_freq = devfreq->previous_freq, + get_freq_range(devfreq, &min_freq, &max_freq); + polling_ms = devfreq->profile->polling_ms, + mutex_unlock(&devfreq->lock); + + seq_printf(s, + "%-30s %-10s %-10s %-15s %10d %12ld %12ld %12ld ", + dev_name(devfreq->dev.parent), + dev_name(&devfreq->dev), + p_devfreq ? dev_name(&p_devfreq->dev) : "null", + devfreq->governor_name, + polling_ms, + cur_freq, + min_freq, + max_freq); + } + + mutex_unlock(&devfreq_list_lock); + + return 0; +} +define_show_attribute(devfreq_summary); + + devfreq_debugfs = debugfs_create_dir("devfreq", null); + debugfs_create_file("devfreq_summary", 0444, + devfreq_debugfs, null, + &devfreq_summary_fops); +
|
Device Voltage and Frequency Scaling
|
490a421bc575d1bf391a6ad5b582dcfbd0037724
|
chanwoo choi
|
drivers
|
devfreq
| |
power: avs: add support for cpr (core power reduction)
|
cpr (core power reduction) is a technology that reduces core power on a cpu or other device. it reads voltage settings in efuse from product test process as initial settings. each opp corresponds to a "corner" that has a range of valid voltages for a particular frequency. while the device is running at a particular frequency, cpr monitors dynamic factors such as temperature, etc. and adjusts the voltage for that frequency accordingly to save power and meet silicon characteristic requirements.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add support for cpr (core power reduction) found in qualcomm products
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['power ', 'avs']
|
['c', 'kconfig', 'makefile', 'maintainers']
| 4
| 1,816
| 0
|
--- diff --git a/maintainers b/maintainers --- a/maintainers +++ b/maintainers +qualcomm core power reduction (cpr) avs driver +m: niklas cassel <nks@flawful.org> +l: linux-pm@vger.kernel.org +l: linux-arm-msm@vger.kernel.org +s: maintained +f: documentation/devicetree/bindings/power/avs/qcom,cpr.txt +f: drivers/power/avs/qcom-cpr.c + diff --git a/drivers/power/avs/kconfig b/drivers/power/avs/kconfig --- a/drivers/power/avs/kconfig +++ b/drivers/power/avs/kconfig +config qcom_cpr + tristate "qcom core power reduction (cpr) support" + depends on power_avs + select pm_opp + help + say y here to enable support for the cpr hardware found on qualcomm + socs like qcs404. + + this driver populates cpu opps tables and makes adjustments to the + tables based on feedback from the cpr hardware. if you want to do + cpufrequency scaling say y here. + + to compile this driver as a module, choose m here: the module will + be called qcom-cpr + diff --git a/drivers/power/avs/makefile b/drivers/power/avs/makefile --- a/drivers/power/avs/makefile +++ b/drivers/power/avs/makefile +obj-$(config_qcom_cpr) += qcom-cpr.o diff --git a/drivers/power/avs/qcom-cpr.c b/drivers/power/avs/qcom-cpr.c --- /dev/null +++ b/drivers/power/avs/qcom-cpr.c +// spdx-license-identifier: gpl-2.0 +/* + * copyright (c) 2013-2015, the linux foundation. all rights reserved. + * copyright (c) 2019, linaro limited + */ + +#include <linux/module.h> +#include <linux/err.h> +#include <linux/debugfs.h> +#include <linux/string.h> +#include <linux/kernel.h> +#include <linux/list.h> +#include <linux/init.h> +#include <linux/io.h> +#include <linux/bitops.h> +#include <linux/slab.h> +#include <linux/of.h> +#include <linux/of_device.h> +#include <linux/platform_device.h> +#include <linux/pm_domain.h> +#include <linux/pm_opp.h> +#include <linux/interrupt.h> +#include <linux/regmap.h> +#include <linux/mfd/syscon.h> +#include <linux/regulator/consumer.h> +#include <linux/clk.h> +#include <linux/nvmem-consumer.h> +#include <linux/bitops.h> + +/* register offsets for rb-cpr and bit definitions */ + +/* rbcpr version register */ +#define reg_rbcpr_version 0 +#define rbcpr_ver_2 0x02 +#define flags_ignore_1st_irq_status bit(0) + +/* rbcpr gate count and target registers */ +#define reg_rbcpr_gcnt_target(n) (0x60 + 4 * (n)) + +#define rbcpr_gcnt_target_target_shift 0 +#define rbcpr_gcnt_target_target_mask genmask(11, 0) +#define rbcpr_gcnt_target_gcnt_shift 12 +#define rbcpr_gcnt_target_gcnt_mask genmask(9, 0) + +/* rbcpr timer control */ +#define reg_rbcpr_timer_interval 0x44 +#define reg_rbif_timer_adjust 0x4c + +#define rbif_timer_adj_cons_up_mask genmask(3, 0) +#define rbif_timer_adj_cons_up_shift 0 +#define rbif_timer_adj_cons_down_mask genmask(3, 0) +#define rbif_timer_adj_cons_down_shift 4 +#define rbif_timer_adj_clamp_int_mask genmask(7, 0) +#define rbif_timer_adj_clamp_int_shift 8 + +/* rbcpr config register */ +#define reg_rbif_limit 0x48 +#define rbif_limit_ceiling_mask genmask(5, 0) +#define rbif_limit_ceiling_shift 6 +#define rbif_limit_floor_bits 6 +#define rbif_limit_floor_mask genmask(5, 0) + +#define rbif_limit_ceiling_default rbif_limit_ceiling_mask +#define rbif_limit_floor_default 0 + +#define reg_rbif_sw_vlevel 0x94 +#define rbif_sw_vlevel_default 0x20 + +#define reg_rbcpr_step_quot 0x80 +#define rbcpr_step_quot_stepquot_mask genmask(7, 0) +#define rbcpr_step_quot_idle_clk_mask genmask(3, 0) +#define rbcpr_step_quot_idle_clk_shift 8 + +/* rbcpr control register */ +#define reg_rbcpr_ctl 0x90 + +#define rbcpr_ctl_loop_en bit(0) +#define rbcpr_ctl_timer_en bit(3) +#define rbcpr_ctl_sw_auto_cont_ack_en bit(5) +#define rbcpr_ctl_sw_auto_cont_nack_dn_en bit(6) +#define rbcpr_ctl_count_mode bit(10) +#define rbcpr_ctl_up_threshold_mask genmask(3, 0) +#define rbcpr_ctl_up_threshold_shift 24 +#define rbcpr_ctl_dn_threshold_mask genmask(3, 0) +#define rbcpr_ctl_dn_threshold_shift 28 + +/* rbcpr ack/nack response */ +#define reg_rbif_cont_ack_cmd 0x98 +#define reg_rbif_cont_nack_cmd 0x9c + +/* rbcpr result status register */ +#define reg_rbcpr_result_0 0xa0 + +#define rbcpr_result0_busy_shift 19 +#define rbcpr_result0_busy_mask bit(rbcpr_result0_busy_shift) +#define rbcpr_result0_error_lt0_shift 18 +#define rbcpr_result0_error_shift 6 +#define rbcpr_result0_error_mask genmask(11, 0) +#define rbcpr_result0_error_steps_shift 2 +#define rbcpr_result0_error_steps_mask genmask(3, 0) +#define rbcpr_result0_step_up_shift 1 + +/* rbcpr interrupt control register */ +#define reg_rbif_irq_en(n) (0x100 + 4 * (n)) +#define reg_rbif_irq_clear 0x110 +#define reg_rbif_irq_status 0x114 + +#define cpr_int_done bit(0) +#define cpr_int_min bit(1) +#define cpr_int_down bit(2) +#define cpr_int_mid bit(3) +#define cpr_int_up bit(4) +#define cpr_int_max bit(5) +#define cpr_int_clamp bit(6) +#define cpr_int_all (cpr_int_done | cpr_int_min | cpr_int_down | \ + cpr_int_mid | cpr_int_up | cpr_int_max | cpr_int_clamp) +#define cpr_int_default (cpr_int_up | cpr_int_down) + +#define cpr_num_ring_osc 8 + +/* cpr efuse parameters */ +#define cpr_fuse_target_quot_bits_mask genmask(11, 0) + +#define cpr_fuse_min_quot_diff 50 + +#define fuse_revision_unknown (-1) + +enum voltage_change_dir { + no_change, + down, + up, +}; + +struct cpr_fuse { + char *ring_osc; + char *init_voltage; + char *quotient; + char *quotient_offset; +}; + +struct fuse_corner_data { + int ref_uv; + int max_uv; + int min_uv; + int max_volt_scale; + int max_quot_scale; + /* fuse quot */ + int quot_offset; + int quot_scale; + int quot_adjust; + /* fuse quot_offset */ + int quot_offset_scale; + int quot_offset_adjust; +}; + +struct cpr_fuses { + int init_voltage_step; + int init_voltage_width; + struct fuse_corner_data *fuse_corner_data; +}; + +struct corner_data { + unsigned int fuse_corner; + unsigned long freq; +}; + +struct cpr_desc { + unsigned int num_fuse_corners; + int min_diff_quot; + int *step_quot; + + unsigned int timer_delay_us; + unsigned int timer_cons_up; + unsigned int timer_cons_down; + unsigned int up_threshold; + unsigned int down_threshold; + unsigned int idle_clocks; + unsigned int gcnt_us; + unsigned int vdd_apc_step_up_limit; + unsigned int vdd_apc_step_down_limit; + unsigned int clamp_timer_interval; + + struct cpr_fuses cpr_fuses; + bool reduce_to_fuse_uv; + bool reduce_to_corner_uv; +}; + +struct acc_desc { + unsigned int enable_reg; + u32 enable_mask; + + struct reg_sequence *config; + struct reg_sequence *settings; + int num_regs_per_fuse; +}; + +struct cpr_acc_desc { + const struct cpr_desc *cpr_desc; + const struct acc_desc *acc_desc; +}; + +struct fuse_corner { + int min_uv; + int max_uv; + int uv; + int quot; + int step_quot; + const struct reg_sequence *accs; + int num_accs; + unsigned long max_freq; + u8 ring_osc_idx; +}; + +struct corner { + int min_uv; + int max_uv; + int uv; + int last_uv; + int quot_adjust; + u32 save_ctl; + u32 save_irq; + unsigned long freq; + struct fuse_corner *fuse_corner; +}; + +struct cpr_drv { + unsigned int num_corners; + unsigned int ref_clk_khz; + + struct generic_pm_domain pd; + struct device *dev; + struct device *attached_cpu_dev; + struct mutex lock; + void __iomem *base; + struct corner *corner; + struct regulator *vdd_apc; + struct clk *cpu_clk; + struct regmap *tcsr; + bool loop_disabled; + u32 gcnt; + unsigned long flags; + + struct fuse_corner *fuse_corners; + struct corner *corners; + + const struct cpr_desc *desc; + const struct acc_desc *acc_desc; + const struct cpr_fuse *cpr_fuses; + + struct dentry *debugfs; +}; + +static bool cpr_is_allowed(struct cpr_drv *drv) +{ + return !drv->loop_disabled; +} + +static void cpr_write(struct cpr_drv *drv, u32 offset, u32 value) +{ + writel_relaxed(value, drv->base + offset); +} + +static u32 cpr_read(struct cpr_drv *drv, u32 offset) +{ + return readl_relaxed(drv->base + offset); +} + +static void +cpr_masked_write(struct cpr_drv *drv, u32 offset, u32 mask, u32 value) +{ + u32 val; + + val = readl_relaxed(drv->base + offset); + val &= ~mask; + val |= value & mask; + writel_relaxed(val, drv->base + offset); +} + +static void cpr_irq_clr(struct cpr_drv *drv) +{ + cpr_write(drv, reg_rbif_irq_clear, cpr_int_all); +} + +static void cpr_irq_clr_nack(struct cpr_drv *drv) +{ + cpr_irq_clr(drv); + cpr_write(drv, reg_rbif_cont_nack_cmd, 1); +} + +static void cpr_irq_clr_ack(struct cpr_drv *drv) +{ + cpr_irq_clr(drv); + cpr_write(drv, reg_rbif_cont_ack_cmd, 1); +} + +static void cpr_irq_set(struct cpr_drv *drv, u32 int_bits) +{ + cpr_write(drv, reg_rbif_irq_en(0), int_bits); +} + +static void cpr_ctl_modify(struct cpr_drv *drv, u32 mask, u32 value) +{ + cpr_masked_write(drv, reg_rbcpr_ctl, mask, value); +} + +static void cpr_ctl_enable(struct cpr_drv *drv, struct corner *corner) +{ + u32 val, mask; + const struct cpr_desc *desc = drv->desc; + + /* program consecutive up & down */ + val = desc->timer_cons_down << rbif_timer_adj_cons_down_shift; + val |= desc->timer_cons_up << rbif_timer_adj_cons_up_shift; + mask = rbif_timer_adj_cons_up_mask | rbif_timer_adj_cons_down_mask; + cpr_masked_write(drv, reg_rbif_timer_adjust, mask, val); + cpr_masked_write(drv, reg_rbcpr_ctl, + rbcpr_ctl_sw_auto_cont_nack_dn_en | + rbcpr_ctl_sw_auto_cont_ack_en, + corner->save_ctl); + cpr_irq_set(drv, corner->save_irq); + + if (cpr_is_allowed(drv) && corner->max_uv > corner->min_uv) + val = rbcpr_ctl_loop_en; + else + val = 0; + cpr_ctl_modify(drv, rbcpr_ctl_loop_en, val); +} + +static void cpr_ctl_disable(struct cpr_drv *drv) +{ + cpr_irq_set(drv, 0); + cpr_ctl_modify(drv, rbcpr_ctl_sw_auto_cont_nack_dn_en | + rbcpr_ctl_sw_auto_cont_ack_en, 0); + cpr_masked_write(drv, reg_rbif_timer_adjust, + rbif_timer_adj_cons_up_mask | + rbif_timer_adj_cons_down_mask, 0); + cpr_irq_clr(drv); + cpr_write(drv, reg_rbif_cont_ack_cmd, 1); + cpr_write(drv, reg_rbif_cont_nack_cmd, 1); + cpr_ctl_modify(drv, rbcpr_ctl_loop_en, 0); +} + +static bool cpr_ctl_is_enabled(struct cpr_drv *drv) +{ + u32 reg_val; + + reg_val = cpr_read(drv, reg_rbcpr_ctl); + return reg_val & rbcpr_ctl_loop_en; +} + +static bool cpr_ctl_is_busy(struct cpr_drv *drv) +{ + u32 reg_val; + + reg_val = cpr_read(drv, reg_rbcpr_result_0); + return reg_val & rbcpr_result0_busy_mask; +} + +static void cpr_corner_save(struct cpr_drv *drv, struct corner *corner) +{ + corner->save_ctl = cpr_read(drv, reg_rbcpr_ctl); + corner->save_irq = cpr_read(drv, reg_rbif_irq_en(0)); +} + +static void cpr_corner_restore(struct cpr_drv *drv, struct corner *corner) +{ + u32 gcnt, ctl, irq, ro_sel, step_quot; + struct fuse_corner *fuse = corner->fuse_corner; + const struct cpr_desc *desc = drv->desc; + int i; + + ro_sel = fuse->ring_osc_idx; + gcnt = drv->gcnt; + gcnt |= fuse->quot - corner->quot_adjust; + + /* program the step quotient and idle clocks */ + step_quot = desc->idle_clocks << rbcpr_step_quot_idle_clk_shift; + step_quot |= fuse->step_quot & rbcpr_step_quot_stepquot_mask; + cpr_write(drv, reg_rbcpr_step_quot, step_quot); + + /* clear the target quotient value and gate count of all ros */ + for (i = 0; i < cpr_num_ring_osc; i++) + cpr_write(drv, reg_rbcpr_gcnt_target(i), 0); + + cpr_write(drv, reg_rbcpr_gcnt_target(ro_sel), gcnt); + ctl = corner->save_ctl; + cpr_write(drv, reg_rbcpr_ctl, ctl); + irq = corner->save_irq; + cpr_irq_set(drv, irq); + dev_dbg(drv->dev, "gcnt = %#08x, ctl = %#08x, irq = %#08x ", gcnt, + ctl, irq); +} + +static void cpr_set_acc(struct regmap *tcsr, struct fuse_corner *f, + struct fuse_corner *end) +{ + if (f == end) + return; + + if (f < end) { + for (f += 1; f <= end; f++) + regmap_multi_reg_write(tcsr, f->accs, f->num_accs); + } else { + for (f -= 1; f >= end; f--) + regmap_multi_reg_write(tcsr, f->accs, f->num_accs); + } +} + +static int cpr_pre_voltage(struct cpr_drv *drv, + struct fuse_corner *fuse_corner, + enum voltage_change_dir dir) +{ + struct fuse_corner *prev_fuse_corner = drv->corner->fuse_corner; + + if (drv->tcsr && dir == down) + cpr_set_acc(drv->tcsr, prev_fuse_corner, fuse_corner); + + return 0; +} + +static int cpr_post_voltage(struct cpr_drv *drv, + struct fuse_corner *fuse_corner, + enum voltage_change_dir dir) +{ + struct fuse_corner *prev_fuse_corner = drv->corner->fuse_corner; + + if (drv->tcsr && dir == up) + cpr_set_acc(drv->tcsr, prev_fuse_corner, fuse_corner); + + return 0; +} + +static int cpr_scale_voltage(struct cpr_drv *drv, struct corner *corner, + int new_uv, enum voltage_change_dir dir) +{ + int ret; + struct fuse_corner *fuse_corner = corner->fuse_corner; + + ret = cpr_pre_voltage(drv, fuse_corner, dir); + if (ret) + return ret; + + ret = regulator_set_voltage(drv->vdd_apc, new_uv, new_uv); + if (ret) { + dev_err_ratelimited(drv->dev, "failed to set apc voltage %d ", + new_uv); + return ret; + } + + ret = cpr_post_voltage(drv, fuse_corner, dir); + if (ret) + return ret; + + return 0; +} + +static unsigned int cpr_get_cur_perf_state(struct cpr_drv *drv) +{ + return drv->corner ? drv->corner - drv->corners + 1 : 0; +} + +static int cpr_scale(struct cpr_drv *drv, enum voltage_change_dir dir) +{ + u32 val, error_steps, reg_mask; + int last_uv, new_uv, step_uv, ret; + struct corner *corner; + const struct cpr_desc *desc = drv->desc; + + if (dir != up && dir != down) + return 0; + + step_uv = regulator_get_linear_step(drv->vdd_apc); + if (!step_uv) + return -einval; + + corner = drv->corner; + + val = cpr_read(drv, reg_rbcpr_result_0); + + error_steps = val >> rbcpr_result0_error_steps_shift; + error_steps &= rbcpr_result0_error_steps_mask; + last_uv = corner->last_uv; + + if (dir == up) { + if (desc->clamp_timer_interval && + error_steps < desc->up_threshold) { + /* + * handle the case where another measurement started + * after the interrupt was triggered due to a core + * exiting from power collapse. + */ + error_steps = max(desc->up_threshold, + desc->vdd_apc_step_up_limit); + } + + if (last_uv >= corner->max_uv) { + cpr_irq_clr_nack(drv); + + /* maximize the up threshold */ + reg_mask = rbcpr_ctl_up_threshold_mask; + reg_mask <<= rbcpr_ctl_up_threshold_shift; + val = reg_mask; + cpr_ctl_modify(drv, reg_mask, val); + + /* disable up interrupt */ + cpr_irq_set(drv, cpr_int_default & ~cpr_int_up); + + return 0; + } + + if (error_steps > desc->vdd_apc_step_up_limit) + error_steps = desc->vdd_apc_step_up_limit; + + /* calculate new voltage */ + new_uv = last_uv + error_steps * step_uv; + new_uv = min(new_uv, corner->max_uv); + + dev_dbg(drv->dev, + "up: -> new_uv: %d last_uv: %d perf state: %u ", + new_uv, last_uv, cpr_get_cur_perf_state(drv)); + } else if (dir == down) { + if (desc->clamp_timer_interval && + error_steps < desc->down_threshold) { + /* + * handle the case where another measurement started + * after the interrupt was triggered due to a core + * exiting from power collapse. + */ + error_steps = max(desc->down_threshold, + desc->vdd_apc_step_down_limit); + } + + if (last_uv <= corner->min_uv) { + cpr_irq_clr_nack(drv); + + /* enable auto nack down */ + reg_mask = rbcpr_ctl_sw_auto_cont_nack_dn_en; + val = rbcpr_ctl_sw_auto_cont_nack_dn_en; + + cpr_ctl_modify(drv, reg_mask, val); + + /* disable down interrupt */ + cpr_irq_set(drv, cpr_int_default & ~cpr_int_down); + + return 0; + } + + if (error_steps > desc->vdd_apc_step_down_limit) + error_steps = desc->vdd_apc_step_down_limit; + + /* calculate new voltage */ + new_uv = last_uv - error_steps * step_uv; + new_uv = max(new_uv, corner->min_uv); + + dev_dbg(drv->dev, + "down: -> new_uv: %d last_uv: %d perf state: %u ", + new_uv, last_uv, cpr_get_cur_perf_state(drv)); + } + + ret = cpr_scale_voltage(drv, corner, new_uv, dir); + if (ret) { + cpr_irq_clr_nack(drv); + return ret; + } + drv->corner->last_uv = new_uv; + + if (dir == up) { + /* disable auto nack down */ + reg_mask = rbcpr_ctl_sw_auto_cont_nack_dn_en; + val = 0; + } else if (dir == down) { + /* restore default threshold for up */ + reg_mask = rbcpr_ctl_up_threshold_mask; + reg_mask <<= rbcpr_ctl_up_threshold_shift; + val = desc->up_threshold; + val <<= rbcpr_ctl_up_threshold_shift; + } + + cpr_ctl_modify(drv, reg_mask, val); + + /* re-enable default interrupts */ + cpr_irq_set(drv, cpr_int_default); + + /* ack */ + cpr_irq_clr_ack(drv); + + return 0; +} + +static irqreturn_t cpr_irq_handler(int irq, void *dev) +{ + struct cpr_drv *drv = dev; + const struct cpr_desc *desc = drv->desc; + irqreturn_t ret = irq_handled; + u32 val; + + mutex_lock(&drv->lock); + + val = cpr_read(drv, reg_rbif_irq_status); + if (drv->flags & flags_ignore_1st_irq_status) + val = cpr_read(drv, reg_rbif_irq_status); + + dev_dbg(drv->dev, "irq_status = %#02x ", val); + + if (!cpr_ctl_is_enabled(drv)) { + dev_dbg(drv->dev, "cpr is disabled "); + ret = irq_none; + } else if (cpr_ctl_is_busy(drv) && !desc->clamp_timer_interval) { + dev_dbg(drv->dev, "cpr measurement is not ready "); + } else if (!cpr_is_allowed(drv)) { + val = cpr_read(drv, reg_rbcpr_ctl); + dev_err_ratelimited(drv->dev, + "interrupt broken? rbcpr_ctl = %#02x ", + val); + ret = irq_none; + } else { + /* + * following sequence of handling is as per each irq's + * priority + */ + if (val & cpr_int_up) { + cpr_scale(drv, up); + } else if (val & cpr_int_down) { + cpr_scale(drv, down); + } else if (val & cpr_int_min) { + cpr_irq_clr_nack(drv); + } else if (val & cpr_int_max) { + cpr_irq_clr_nack(drv); + } else if (val & cpr_int_mid) { + /* rbcpr_ctl_sw_auto_cont_ack_en is enabled */ + dev_dbg(drv->dev, "irq occurred for mid flag "); + } else { + dev_dbg(drv->dev, + "irq occurred for unknown flag (%#08x) ", val); + } + + /* save register values for the corner */ + cpr_corner_save(drv, drv->corner); + } + + mutex_unlock(&drv->lock); + + return ret; +} + +static int cpr_enable(struct cpr_drv *drv) +{ + int ret; + + ret = regulator_enable(drv->vdd_apc); + if (ret) + return ret; + + mutex_lock(&drv->lock); + + if (cpr_is_allowed(drv) && drv->corner) { + cpr_irq_clr(drv); + cpr_corner_restore(drv, drv->corner); + cpr_ctl_enable(drv, drv->corner); + } + + mutex_unlock(&drv->lock); + + return 0; +} + +static int cpr_disable(struct cpr_drv *drv) +{ + int ret; + + mutex_lock(&drv->lock); + + if (cpr_is_allowed(drv)) { + cpr_ctl_disable(drv); + cpr_irq_clr(drv); + } + + mutex_unlock(&drv->lock); + + ret = regulator_disable(drv->vdd_apc); + if (ret) + return ret; + + return 0; +} + +static int cpr_config(struct cpr_drv *drv) +{ + int i; + u32 val, gcnt; + struct corner *corner; + const struct cpr_desc *desc = drv->desc; + + /* disable interrupt and cpr */ + cpr_write(drv, reg_rbif_irq_en(0), 0); + cpr_write(drv, reg_rbcpr_ctl, 0); + + /* program the default hw ceiling, floor and vlevel */ + val = (rbif_limit_ceiling_default & rbif_limit_ceiling_mask) + << rbif_limit_ceiling_shift; + val |= rbif_limit_floor_default & rbif_limit_floor_mask; + cpr_write(drv, reg_rbif_limit, val); + cpr_write(drv, reg_rbif_sw_vlevel, rbif_sw_vlevel_default); + + /* + * clear the target quotient value and gate count of all + * ring oscillators + */ + for (i = 0; i < cpr_num_ring_osc; i++) + cpr_write(drv, reg_rbcpr_gcnt_target(i), 0); + + /* init and save gcnt */ + gcnt = (drv->ref_clk_khz * desc->gcnt_us) / 1000; + gcnt = gcnt & rbcpr_gcnt_target_gcnt_mask; + gcnt <<= rbcpr_gcnt_target_gcnt_shift; + drv->gcnt = gcnt; + + /* program the delay count for the timer */ + val = (drv->ref_clk_khz * desc->timer_delay_us) / 1000; + cpr_write(drv, reg_rbcpr_timer_interval, val); + dev_dbg(drv->dev, "timer count: %#0x (for %d us) ", val, + desc->timer_delay_us); + + /* program consecutive up & down */ + val = desc->timer_cons_down << rbif_timer_adj_cons_down_shift; + val |= desc->timer_cons_up << rbif_timer_adj_cons_up_shift; + val |= desc->clamp_timer_interval << rbif_timer_adj_clamp_int_shift; + cpr_write(drv, reg_rbif_timer_adjust, val); + + /* program the control register */ + val = desc->up_threshold << rbcpr_ctl_up_threshold_shift; + val |= desc->down_threshold << rbcpr_ctl_dn_threshold_shift; + val |= rbcpr_ctl_timer_en | rbcpr_ctl_count_mode; + val |= rbcpr_ctl_sw_auto_cont_ack_en; + cpr_write(drv, reg_rbcpr_ctl, val); + + for (i = 0; i < drv->num_corners; i++) { + corner = &drv->corners[i]; + corner->save_ctl = val; + corner->save_irq = cpr_int_default; + } + + cpr_irq_set(drv, cpr_int_default); + + val = cpr_read(drv, reg_rbcpr_version); + if (val <= rbcpr_ver_2) + drv->flags |= flags_ignore_1st_irq_status; + + return 0; +} + +static int cpr_set_performance_state(struct generic_pm_domain *domain, + unsigned int state) +{ + struct cpr_drv *drv = container_of(domain, struct cpr_drv, pd); + struct corner *corner, *end; + enum voltage_change_dir dir; + int ret = 0, new_uv; + + mutex_lock(&drv->lock); + + dev_dbg(drv->dev, "%s: setting perf state: %u (prev state: %u) ", + __func__, state, cpr_get_cur_perf_state(drv)); + + /* + * determine new corner we're going to. + * remove one since lowest performance state is 1. + */ + corner = drv->corners + state - 1; + end = &drv->corners[drv->num_corners - 1]; + if (corner > end || corner < drv->corners) { + ret = -einval; + goto unlock; + } + + /* determine direction */ + if (drv->corner > corner) + dir = down; + else if (drv->corner < corner) + dir = up; + else + dir = no_change; + + if (cpr_is_allowed(drv)) + new_uv = corner->last_uv; + else + new_uv = corner->uv; + + if (cpr_is_allowed(drv)) + cpr_ctl_disable(drv); + + ret = cpr_scale_voltage(drv, corner, new_uv, dir); + if (ret) + goto unlock; + + if (cpr_is_allowed(drv)) { + cpr_irq_clr(drv); + if (drv->corner != corner) + cpr_corner_restore(drv, corner); + cpr_ctl_enable(drv, corner); + } + + drv->corner = corner; + +unlock: + mutex_unlock(&drv->lock); + + return ret; +} + +static int cpr_read_efuse(struct device *dev, const char *cname, u32 *data) +{ + struct nvmem_cell *cell; + ssize_t len; + char *ret; + int i; + + *data = 0; + + cell = nvmem_cell_get(dev, cname); + if (is_err(cell)) { + if (ptr_err(cell) != -eprobe_defer) + dev_err(dev, "undefined cell %s ", cname); + return ptr_err(cell); + } + + ret = nvmem_cell_read(cell, &len); + nvmem_cell_put(cell); + if (is_err(ret)) { + dev_err(dev, "can't read cell %s ", cname); + return ptr_err(ret); + } + + for (i = 0; i < len; i++) + *data |= ret[i] << (8 * i); + + kfree(ret); + dev_dbg(dev, "efuse read(%s) = %x, bytes %ld ", cname, *data, len); + + return 0; +} + +static int +cpr_populate_ring_osc_idx(struct cpr_drv *drv) +{ + struct fuse_corner *fuse = drv->fuse_corners; + struct fuse_corner *end = fuse + drv->desc->num_fuse_corners; + const struct cpr_fuse *fuses = drv->cpr_fuses; + u32 data; + int ret; + + for (; fuse < end; fuse++, fuses++) { + ret = cpr_read_efuse(drv->dev, fuses->ring_osc, + &data); + if (ret) + return ret; + fuse->ring_osc_idx = data; + } + + return 0; +} + +static int cpr_read_fuse_uv(const struct cpr_desc *desc, + const struct fuse_corner_data *fdata, + const char *init_v_efuse, + int step_volt, + struct cpr_drv *drv) +{ + int step_size_uv, steps, uv; + u32 bits = 0; + int ret; + + ret = cpr_read_efuse(drv->dev, init_v_efuse, &bits); + if (ret) + return ret; + + steps = bits & ~bit(desc->cpr_fuses.init_voltage_width - 1); + /* not two's complement.. instead highest bit is sign bit */ + if (bits & bit(desc->cpr_fuses.init_voltage_width - 1)) + steps = -steps; + + step_size_uv = desc->cpr_fuses.init_voltage_step; + + uv = fdata->ref_uv + steps * step_size_uv; + return div_round_up(uv, step_volt) * step_volt; +} + +static int cpr_fuse_corner_init(struct cpr_drv *drv) +{ + const struct cpr_desc *desc = drv->desc; + const struct cpr_fuse *fuses = drv->cpr_fuses; + const struct acc_desc *acc_desc = drv->acc_desc; + int i; + unsigned int step_volt; + struct fuse_corner_data *fdata; + struct fuse_corner *fuse, *end, *prev; + int uv; + const struct reg_sequence *accs; + int ret; + + accs = acc_desc->settings; + + step_volt = regulator_get_linear_step(drv->vdd_apc); + if (!step_volt) + return -einval; + + /* populate fuse_corner members */ + fuse = drv->fuse_corners; + end = &fuse[desc->num_fuse_corners - 1]; + fdata = desc->cpr_fuses.fuse_corner_data; + + for (i = 0, prev = null; fuse <= end; fuse++, fuses++, i++, fdata++) { + /* + * update soc voltages: platforms might choose a different + * regulators than the one used to characterize the algorithms + * (ie, init_voltage_step). + */ + fdata->min_uv = roundup(fdata->min_uv, step_volt); + fdata->max_uv = roundup(fdata->max_uv, step_volt); + + /* populate uv */ + uv = cpr_read_fuse_uv(desc, fdata, fuses->init_voltage, + step_volt, drv); + if (uv < 0) + return ret; + + fuse->min_uv = fdata->min_uv; + fuse->max_uv = fdata->max_uv; + fuse->uv = clamp(uv, fuse->min_uv, fuse->max_uv); + + if (fuse == end) { + /* + * allow the highest fuse corner's pvs voltage to + * define the ceiling voltage for that corner in order + * to support soc's in which variable ceiling values + * are required. + */ + end->max_uv = max(end->max_uv, end->uv); + } + + /* populate target quotient by scaling */ + ret = cpr_read_efuse(drv->dev, fuses->quotient, &fuse->quot); + if (ret) + return ret; + + fuse->quot *= fdata->quot_scale; + fuse->quot += fdata->quot_offset; + fuse->quot += fdata->quot_adjust; + fuse->step_quot = desc->step_quot[fuse->ring_osc_idx]; + + /* populate acc settings */ + fuse->accs = accs; + fuse->num_accs = acc_desc->num_regs_per_fuse; + accs += acc_desc->num_regs_per_fuse; + } + + /* + * restrict all fuse corner pvs voltages based upon per corner + * ceiling and floor voltages. + */ + for (fuse = drv->fuse_corners, i = 0; fuse <= end; fuse++, i++) { + if (fuse->uv > fuse->max_uv) + fuse->uv = fuse->max_uv; + else if (fuse->uv < fuse->min_uv) + fuse->uv = fuse->min_uv; + + ret = regulator_is_supported_voltage(drv->vdd_apc, + fuse->min_uv, + fuse->min_uv); + if (!ret) { + dev_err(drv->dev, + "min uv: %d (fuse corner: %d) not supported by regulator ", + fuse->min_uv, i); + return -einval; + } + + ret = regulator_is_supported_voltage(drv->vdd_apc, + fuse->max_uv, + fuse->max_uv); + if (!ret) { + dev_err(drv->dev, + "max uv: %d (fuse corner: %d) not supported by regulator ", + fuse->max_uv, i); + return -einval; + } + + dev_dbg(drv->dev, + "fuse corner %d: [%d %d %d] ro%hhu quot %d squot %d ", + i, fuse->min_uv, fuse->uv, fuse->max_uv, + fuse->ring_osc_idx, fuse->quot, fuse->step_quot); + } + + return 0; +} + +static int cpr_calculate_scaling(const char *quot_offset, + struct cpr_drv *drv, + const struct fuse_corner_data *fdata, + const struct corner *corner) +{ + u32 quot_diff = 0; + unsigned long freq_diff; + int scaling; + const struct fuse_corner *fuse, *prev_fuse; + int ret; + + fuse = corner->fuse_corner; + prev_fuse = fuse - 1; + + if (quot_offset) { + ret = cpr_read_efuse(drv->dev, quot_offset, "_diff); + if (ret) + return ret; + + quot_diff *= fdata->quot_offset_scale; + quot_diff += fdata->quot_offset_adjust; + } else { + quot_diff = fuse->quot - prev_fuse->quot; + } + + freq_diff = fuse->max_freq - prev_fuse->max_freq; + freq_diff /= 1000000; /* convert to mhz */ + scaling = 1000 * quot_diff / freq_diff; + return min(scaling, fdata->max_quot_scale); +} + +static int cpr_interpolate(const struct corner *corner, int step_volt, + const struct fuse_corner_data *fdata) +{ + unsigned long f_high, f_low, f_diff; + int uv_high, uv_low, uv; + u64 temp, temp_limit; + const struct fuse_corner *fuse, *prev_fuse; + + fuse = corner->fuse_corner; + prev_fuse = fuse - 1; + + f_high = fuse->max_freq; + f_low = prev_fuse->max_freq; + uv_high = fuse->uv; + uv_low = prev_fuse->uv; + f_diff = fuse->max_freq - corner->freq; + + /* + * don't interpolate in the wrong direction. this could happen + * if the adjusted fuse voltage overlaps with the previous fuse's + * adjusted voltage. + */ + if (f_high <= f_low || uv_high <= uv_low || f_high <= corner->freq) + return corner->uv; + + temp = f_diff * (uv_high - uv_low); + do_div(temp, f_high - f_low); + + /* + * max_volt_scale has units of uv/mhz while freq values + * have units of hz. divide by 1000000 to convert to. + */ + temp_limit = f_diff * fdata->max_volt_scale; + do_div(temp_limit, 1000000); + + uv = uv_high - min(temp, temp_limit); + return roundup(uv, step_volt); +} + +static unsigned int cpr_get_fuse_corner(struct dev_pm_opp *opp) +{ + struct device_node *np; + unsigned int fuse_corner = 0; + + np = dev_pm_opp_get_of_node(opp); + if (of_property_read_u32(np, "qcom,opp-fuse-level", &fuse_corner)) + pr_err("%s: missing 'qcom,opp-fuse-level' property ", + __func__); + + of_node_put(np); + + return fuse_corner; +} + +unsigned long cpr_get_opp_hz_for_req(struct dev_pm_opp *ref, + struct device *cpu_dev) +{ + u64 rate = 0; + struct device_node *ref_np; + struct device_node *desc_np; + struct device_node *child_np = null; + struct device_node *child_req_np = null; + + desc_np = dev_pm_opp_of_get_opp_desc_node(cpu_dev); + if (!desc_np) + return 0; + + ref_np = dev_pm_opp_get_of_node(ref); + if (!ref_np) + goto out_ref; + + do { + of_node_put(child_req_np); + child_np = of_get_next_available_child(desc_np, child_np); + child_req_np = of_parse_phandle(child_np, "required-opps", 0); + } while (child_np && child_req_np != ref_np); + + if (child_np && child_req_np == ref_np) + of_property_read_u64(child_np, "opp-hz", &rate); + + of_node_put(child_req_np); + of_node_put(child_np); + of_node_put(ref_np); +out_ref: + of_node_put(desc_np); + + return (unsigned long) rate; +} + +static int cpr_corner_init(struct cpr_drv *drv) +{ + const struct cpr_desc *desc = drv->desc; + const struct cpr_fuse *fuses = drv->cpr_fuses; + int i, level, scaling = 0; + unsigned int fnum, fc; + const char *quot_offset; + struct fuse_corner *fuse, *prev_fuse; + struct corner *corner, *end; + struct corner_data *cdata; + const struct fuse_corner_data *fdata; + bool apply_scaling; + unsigned long freq_diff, freq_diff_mhz; + unsigned long freq; + int step_volt = regulator_get_linear_step(drv->vdd_apc); + struct dev_pm_opp *opp; + + if (!step_volt) + return -einval; + + corner = drv->corners; + end = &corner[drv->num_corners - 1]; + + cdata = devm_kcalloc(drv->dev, drv->num_corners, + sizeof(struct corner_data), + gfp_kernel); + if (!cdata) + return -enomem; + + /* + * store maximum frequency for each fuse corner based on the frequency + * plan + */ + for (level = 1; level <= drv->num_corners; level++) { + opp = dev_pm_opp_find_level_exact(&drv->pd.dev, level); + if (is_err(opp)) + return -einval; + fc = cpr_get_fuse_corner(opp); + if (!fc) { + dev_pm_opp_put(opp); + return -einval; + } + fnum = fc - 1; + freq = cpr_get_opp_hz_for_req(opp, drv->attached_cpu_dev); + if (!freq) { + dev_pm_opp_put(opp); + return -einval; + } + cdata[level - 1].fuse_corner = fnum; + cdata[level - 1].freq = freq; + + fuse = &drv->fuse_corners[fnum]; + dev_dbg(drv->dev, "freq: %lu level: %u fuse level: %u ", + freq, dev_pm_opp_get_level(opp) - 1, fnum); + if (freq > fuse->max_freq) + fuse->max_freq = freq; + dev_pm_opp_put(opp); + } + + /* + * get the quotient adjustment scaling factor, according to: + * + * scaling = min(1000 * (quot(corner_n) - quot(corner_n-1)) + * / (freq(corner_n) - freq(corner_n-1)), max_factor) + * + * quot(corner_n): quotient read from fuse for fuse corner n + * quot(corner_n-1): quotient read from fuse for fuse corner (n - 1) + * freq(corner_n): max frequency in mhz supported by fuse corner n + * freq(corner_n-1): max frequency in mhz supported by fuse corner + * (n - 1) + * + * then walk through the corners mapped to each fuse corner + * and calculate the quotient adjustment for each one using the + * following formula: + * + * quot_adjust = (freq_max - freq_corner) * scaling / 1000 + * + * freq_max: max frequency in mhz supported by the fuse corner + * freq_corner: frequency in mhz corresponding to the corner + * scaling: calculated from above equation + * + * + * + + + * | v | + * q | f c o | f c + * u | c l | c + * o | f t | f + * t | c a | c + * | c f g | c f + * | e | + * +--------------- +---------------- + * 0 1 2 3 4 5 6 0 1 2 3 4 5 6 + * corner corner + * + * c = corner + * f = fuse corner + * + */ + for (apply_scaling = false, i = 0; corner <= end; corner++, i++) { + fnum = cdata[i].fuse_corner; + fdata = &desc->cpr_fuses.fuse_corner_data[fnum]; + quot_offset = fuses[fnum].quotient_offset; + fuse = &drv->fuse_corners[fnum]; + if (fnum) + prev_fuse = &drv->fuse_corners[fnum - 1]; + else + prev_fuse = null; + + corner->fuse_corner = fuse; + corner->freq = cdata[i].freq; + corner->uv = fuse->uv; + + if (prev_fuse && cdata[i - 1].freq == prev_fuse->max_freq) { + scaling = cpr_calculate_scaling(quot_offset, drv, + fdata, corner); + if (scaling < 0) + return scaling; + + apply_scaling = true; + } else if (corner->freq == fuse->max_freq) { + /* this is a fuse corner; don't scale anything */ + apply_scaling = false; + } + + if (apply_scaling) { + freq_diff = fuse->max_freq - corner->freq; + freq_diff_mhz = freq_diff / 1000000; + corner->quot_adjust = scaling * freq_diff_mhz / 1000; + + corner->uv = cpr_interpolate(corner, step_volt, fdata); + } + + corner->max_uv = fuse->max_uv; + corner->min_uv = fuse->min_uv; + corner->uv = clamp(corner->uv, corner->min_uv, corner->max_uv); + corner->last_uv = corner->uv; + + /* reduce the ceiling voltage if needed */ + if (desc->reduce_to_corner_uv && corner->uv < corner->max_uv) + corner->max_uv = corner->uv; + else if (desc->reduce_to_fuse_uv && fuse->uv < corner->max_uv) + corner->max_uv = max(corner->min_uv, fuse->uv); + + dev_dbg(drv->dev, "corner %d: [%d %d %d] quot %d ", i, + corner->min_uv, corner->uv, corner->max_uv, + fuse->quot - corner->quot_adjust); + } + + return 0; +} + +static const struct cpr_fuse *cpr_get_fuses(struct cpr_drv *drv) +{ + const struct cpr_desc *desc = drv->desc; + struct cpr_fuse *fuses; + int i; + + fuses = devm_kcalloc(drv->dev, desc->num_fuse_corners, + sizeof(struct cpr_fuse), + gfp_kernel); + if (!fuses) + return err_ptr(-enomem); + + for (i = 0; i < desc->num_fuse_corners; i++) { + char tbuf[32]; + + snprintf(tbuf, 32, "cpr_ring_osc%d", i + 1); + fuses[i].ring_osc = devm_kstrdup(drv->dev, tbuf, gfp_kernel); + if (!fuses[i].ring_osc) + return err_ptr(-enomem); + + snprintf(tbuf, 32, "cpr_init_voltage%d", i + 1); + fuses[i].init_voltage = devm_kstrdup(drv->dev, tbuf, + gfp_kernel); + if (!fuses[i].init_voltage) + return err_ptr(-enomem); + + snprintf(tbuf, 32, "cpr_quotient%d", i + 1); + fuses[i].quotient = devm_kstrdup(drv->dev, tbuf, gfp_kernel); + if (!fuses[i].quotient) + return err_ptr(-enomem); + + snprintf(tbuf, 32, "cpr_quotient_offset%d", i + 1); + fuses[i].quotient_offset = devm_kstrdup(drv->dev, tbuf, + gfp_kernel); + if (!fuses[i].quotient_offset) + return err_ptr(-enomem); + } + + return fuses; +} + +static void cpr_set_loop_allowed(struct cpr_drv *drv) +{ + drv->loop_disabled = false; +} + +static int cpr_init_parameters(struct cpr_drv *drv) +{ + const struct cpr_desc *desc = drv->desc; + struct clk *clk; + + clk = clk_get(drv->dev, "ref"); + if (is_err(clk)) + return ptr_err(clk); + + drv->ref_clk_khz = clk_get_rate(clk) / 1000; + clk_put(clk); + + if (desc->timer_cons_up > rbif_timer_adj_cons_up_mask || + desc->timer_cons_down > rbif_timer_adj_cons_down_mask || + desc->up_threshold > rbcpr_ctl_up_threshold_mask || + desc->down_threshold > rbcpr_ctl_dn_threshold_mask || + desc->idle_clocks > rbcpr_step_quot_idle_clk_mask || + desc->clamp_timer_interval > rbif_timer_adj_clamp_int_mask) + return -einval; + + dev_dbg(drv->dev, "up threshold = %u, down threshold = %u ", + desc->up_threshold, desc->down_threshold); + + return 0; +} + +static int cpr_find_initial_corner(struct cpr_drv *drv) +{ + unsigned long rate; + const struct corner *end; + struct corner *iter; + unsigned int i = 0; + + if (!drv->cpu_clk) { + dev_err(drv->dev, "cannot get rate from null clk "); + return -einval; + } + + end = &drv->corners[drv->num_corners - 1]; + rate = clk_get_rate(drv->cpu_clk); + + /* + * some bootloaders set a cpu clock frequency that is not defined + * in the opp table. when running at an unlisted frequency, + * cpufreq_online() will change to the opp which has the lowest + * frequency, at or above the unlisted frequency. + * since cpufreq_online() always "rounds up" in the case of an + * unlisted frequency, this function always "rounds down" in case + * of an unlisted frequency. that way, when cpufreq_online() + * triggers the first ever call to cpr_set_performance_state(), + * it will correctly determine the direction as up. + */ + for (iter = drv->corners; iter <= end; iter++) { + if (iter->freq > rate) + break; + i++; + if (iter->freq == rate) { + drv->corner = iter; + break; + } + if (iter->freq < rate) + drv->corner = iter; + } + + if (!drv->corner) { + dev_err(drv->dev, "boot up corner not found "); + return -einval; + } + + dev_dbg(drv->dev, "boot up perf state: %u ", i); + + return 0; +} + +static const struct cpr_desc qcs404_cpr_desc = { + .num_fuse_corners = 3, + .min_diff_quot = cpr_fuse_min_quot_diff, + .step_quot = (int []){ 25, 25, 25, }, + .timer_delay_us = 5000, + .timer_cons_up = 0, + .timer_cons_down = 2, + .up_threshold = 1, + .down_threshold = 3, + .idle_clocks = 15, + .gcnt_us = 1, + .vdd_apc_step_up_limit = 1, + .vdd_apc_step_down_limit = 1, + .cpr_fuses = { + .init_voltage_step = 8000, + .init_voltage_width = 6, + .fuse_corner_data = (struct fuse_corner_data[]){ + /* fuse corner 0 */ + { + .ref_uv = 1224000, + .max_uv = 1224000, + .min_uv = 1048000, + .max_volt_scale = 0, + .max_quot_scale = 0, + .quot_offset = 0, + .quot_scale = 1, + .quot_adjust = 0, + .quot_offset_scale = 5, + .quot_offset_adjust = 0, + }, + /* fuse corner 1 */ + { + .ref_uv = 1288000, + .max_uv = 1288000, + .min_uv = 1048000, + .max_volt_scale = 2000, + .max_quot_scale = 1400, + .quot_offset = 0, + .quot_scale = 1, + .quot_adjust = -20, + .quot_offset_scale = 5, + .quot_offset_adjust = 0, + }, + /* fuse corner 2 */ + { + .ref_uv = 1352000, + .max_uv = 1384000, + .min_uv = 1088000, + .max_volt_scale = 2000, + .max_quot_scale = 1400, + .quot_offset = 0, + .quot_scale = 1, + .quot_adjust = 0, + .quot_offset_scale = 5, + .quot_offset_adjust = 0, + }, + }, + }, +}; + +static const struct acc_desc qcs404_acc_desc = { + .settings = (struct reg_sequence[]){ + { 0xb120, 0x1041040 }, + { 0xb124, 0x41 }, + { 0xb120, 0x0 }, + { 0xb124, 0x0 }, + { 0xb120, 0x0 }, + { 0xb124, 0x0 }, + }, + .config = (struct reg_sequence[]){ + { 0xb138, 0xff }, + { 0xb130, 0x5555 }, + }, + .num_regs_per_fuse = 2, +}; + +static const struct cpr_acc_desc qcs404_cpr_acc_desc = { + .cpr_desc = &qcs404_cpr_desc, + .acc_desc = &qcs404_acc_desc, +}; + +static unsigned int cpr_get_performance_state(struct generic_pm_domain *genpd, + struct dev_pm_opp *opp) +{ + return dev_pm_opp_get_level(opp); +} + +static int cpr_power_off(struct generic_pm_domain *domain) +{ + struct cpr_drv *drv = container_of(domain, struct cpr_drv, pd); + + return cpr_disable(drv); +} + +static int cpr_power_on(struct generic_pm_domain *domain) +{ + struct cpr_drv *drv = container_of(domain, struct cpr_drv, pd); + + return cpr_enable(drv); +} + +static int cpr_pd_attach_dev(struct generic_pm_domain *domain, + struct device *dev) +{ + struct cpr_drv *drv = container_of(domain, struct cpr_drv, pd); + const struct acc_desc *acc_desc = drv->acc_desc; + int ret = 0; + + mutex_lock(&drv->lock); + + dev_dbg(drv->dev, "attach callback for: %s ", dev_name(dev)); + + /* + * this driver only supports scaling voltage for a cpu cluster + * where all cpus in the cluster share a single regulator. + * therefore, save the struct device pointer only for the first + * cpu device that gets attached. there is no need to do any + * additional initialization when further cpus get attached. + */ + if (drv->attached_cpu_dev) + goto unlock; + + /* + * cpr_scale_voltage() requires the direction (if we are changing + * to a higher or lower opp). the first time + * cpr_set_performance_state() is called, there is no previous + * performance state defined. therefore, we call + * cpr_find_initial_corner() that gets the cpu clock frequency + * set by the bootloader, so that we can determine the direction + * the first time cpr_set_performance_state() is called. + */ + drv->cpu_clk = devm_clk_get(dev, null); + if (is_err(drv->cpu_clk)) { + ret = ptr_err(drv->cpu_clk); + if (ret != -eprobe_defer) + dev_err(drv->dev, "could not get cpu clk: %d ", ret); + goto unlock; + } + drv->attached_cpu_dev = dev; + + dev_dbg(drv->dev, "using cpu clk from: %s ", + dev_name(drv->attached_cpu_dev)); + + /* + * everything related to (virtual) corners has to be initialized + * here, when attaching to the power domain, since we need to know + * the maximum frequency for each fuse corner, and this is only + * available after the cpufreq driver has attached to us. + * the reason for this is that we need to know the highest + * frequency associated with each fuse corner. + */ + drv->num_corners = dev_pm_opp_get_opp_count(&drv->pd.dev); + if (drv->num_corners < 0) { + ret = drv->num_corners; + goto unlock; + } + if (drv->num_corners < 2) { + dev_err(drv->dev, "need at least 2 opps to use cpr "); + ret = -einval; + goto unlock; + } + + dev_dbg(drv->dev, "number of opps: %d ", drv->num_corners); + + drv->corners = devm_kcalloc(drv->dev, drv->num_corners, + sizeof(*drv->corners), + gfp_kernel); + if (!drv->corners) { + ret = -enomem; + goto unlock; + } + + ret = cpr_corner_init(drv); + if (ret) + goto unlock; + + cpr_set_loop_allowed(drv); + + ret = cpr_init_parameters(drv); + if (ret) + goto unlock; + + /* configure cpr hw but keep it disabled */ + ret = cpr_config(drv); + if (ret) + goto unlock; + + ret = cpr_find_initial_corner(drv); + if (ret) + goto unlock; + + if (acc_desc->config) + regmap_multi_reg_write(drv->tcsr, acc_desc->config, + acc_desc->num_regs_per_fuse); + + /* enable acc if required */ + if (acc_desc->enable_mask) + regmap_update_bits(drv->tcsr, acc_desc->enable_reg, + acc_desc->enable_mask, + acc_desc->enable_mask); + +unlock: + mutex_unlock(&drv->lock); + + return ret; +} + +static int cpr_debug_info_show(struct seq_file *s, void *unused) +{ + u32 gcnt, ro_sel, ctl, irq_status, reg, error_steps; + u32 step_dn, step_up, error, error_lt0, busy; + struct cpr_drv *drv = s->private; + struct fuse_corner *fuse_corner; + struct corner *corner; + + corner = drv->corner; + fuse_corner = corner->fuse_corner; + + seq_printf(s, "corner, current_volt = %d uv ", + corner->last_uv); + + ro_sel = fuse_corner->ring_osc_idx; + gcnt = cpr_read(drv, reg_rbcpr_gcnt_target(ro_sel)); + seq_printf(s, "rbcpr_gcnt_target (%u) = %#02x ", ro_sel, gcnt); + + ctl = cpr_read(drv, reg_rbcpr_ctl); + seq_printf(s, "rbcpr_ctl = %#02x ", ctl); + + irq_status = cpr_read(drv, reg_rbif_irq_status); + seq_printf(s, "rbcpr_irq_status = %#02x ", irq_status); + + reg = cpr_read(drv, reg_rbcpr_result_0); + seq_printf(s, "rbcpr_result_0 = %#02x ", reg); + + step_dn = reg & 0x01; + step_up = (reg >> rbcpr_result0_step_up_shift) & 0x01; + seq_printf(s, " [step_dn = %u", step_dn); + + seq_printf(s, ", step_up = %u", step_up); + + error_steps = (reg >> rbcpr_result0_error_steps_shift) + & rbcpr_result0_error_steps_mask; + seq_printf(s, ", error_steps = %u", error_steps); + + error = (reg >> rbcpr_result0_error_shift) & rbcpr_result0_error_mask; + seq_printf(s, ", error = %u", error); + + error_lt0 = (reg >> rbcpr_result0_error_lt0_shift) & 0x01; + seq_printf(s, ", error_lt_0 = %u", error_lt0); + + busy = (reg >> rbcpr_result0_busy_shift) & 0x01; + seq_printf(s, ", busy = %u] ", busy); + + return 0; +} +define_show_attribute(cpr_debug_info); + +static void cpr_debugfs_init(struct cpr_drv *drv) +{ + drv->debugfs = debugfs_create_dir("qcom_cpr", null); + + debugfs_create_file("debug_info", 0444, drv->debugfs, + drv, &cpr_debug_info_fops); +} + +static int cpr_probe(struct platform_device *pdev) +{ + struct resource *res; + struct device *dev = &pdev->dev; + struct cpr_drv *drv; + int irq, ret; + const struct cpr_acc_desc *data; + struct device_node *np; + u32 cpr_rev = fuse_revision_unknown; + + data = of_device_get_match_data(dev); + if (!data || !data->cpr_desc || !data->acc_desc) + return -einval; + + drv = devm_kzalloc(dev, sizeof(*drv), gfp_kernel); + if (!drv) + return -enomem; + drv->dev = dev; + drv->desc = data->cpr_desc; + drv->acc_desc = data->acc_desc; + + drv->fuse_corners = devm_kcalloc(dev, drv->desc->num_fuse_corners, + sizeof(*drv->fuse_corners), + gfp_kernel); + if (!drv->fuse_corners) + return -enomem; + + np = of_parse_phandle(dev->of_node, "acc-syscon", 0); + if (!np) + return -enodev; + + drv->tcsr = syscon_node_to_regmap(np); + of_node_put(np); + if (is_err(drv->tcsr)) + return ptr_err(drv->tcsr); + + res = platform_get_resource(pdev, ioresource_mem, 0); + drv->base = devm_ioremap_resource(dev, res); + if (is_err(drv->base)) + return ptr_err(drv->base); + + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return -einval; + + drv->vdd_apc = devm_regulator_get(dev, "vdd-apc"); + if (is_err(drv->vdd_apc)) + return ptr_err(drv->vdd_apc); + + /* + * initialize fuse corners, since it simply depends + * on data in efuses. + * everything related to (virtual) corners has to be + * initialized after attaching to the power domain, + * since it depends on the cpu's opp table. + */ + ret = cpr_read_efuse(dev, "cpr_fuse_revision", &cpr_rev); + if (ret) + return ret; + + drv->cpr_fuses = cpr_get_fuses(drv); + if (is_err(drv->cpr_fuses)) + return ptr_err(drv->cpr_fuses); + + ret = cpr_populate_ring_osc_idx(drv); + if (ret) + return ret; + + ret = cpr_fuse_corner_init(drv); + if (ret) + return ret; + + mutex_init(&drv->lock); + + ret = devm_request_threaded_irq(dev, irq, null, + cpr_irq_handler, + irqf_oneshot | irqf_trigger_rising, + "cpr", drv); + if (ret) + return ret; + + drv->pd.name = devm_kstrdup_const(dev, dev->of_node->full_name, + gfp_kernel); + if (!drv->pd.name) + return -einval; + + drv->pd.power_off = cpr_power_off; + drv->pd.power_on = cpr_power_on; + drv->pd.set_performance_state = cpr_set_performance_state; + drv->pd.opp_to_performance_state = cpr_get_performance_state; + drv->pd.attach_dev = cpr_pd_attach_dev; + + ret = pm_genpd_init(&drv->pd, null, true); + if (ret) + return ret; + + ret = of_genpd_add_provider_simple(dev->of_node, &drv->pd); + if (ret) + return ret; + + platform_set_drvdata(pdev, drv); + cpr_debugfs_init(drv); + + return 0; +} + +static int cpr_remove(struct platform_device *pdev) +{ + struct cpr_drv *drv = platform_get_drvdata(pdev); + + if (cpr_is_allowed(drv)) { + cpr_ctl_disable(drv); + cpr_irq_set(drv, 0); + } + + of_genpd_del_provider(pdev->dev.of_node); + pm_genpd_remove(&drv->pd); + + debugfs_remove_recursive(drv->debugfs); + + return 0; +} + +static const struct of_device_id cpr_match_table[] = { + { .compatible = "qcom,qcs404-cpr", .data = &qcs404_cpr_acc_desc }, + { } +}; +module_device_table(of, cpr_match_table); + +static struct platform_driver cpr_driver = { + .probe = cpr_probe, + .remove = cpr_remove, + .driver = { + .name = "qcom-cpr", + .of_match_table = cpr_match_table, + }, +}; +module_platform_driver(cpr_driver); + +module_description("core power reduction (cpr) driver"); +module_license("gpl v2");
|
Voltage, current regulators, power capping, power supply
|
bf6910abf54871b0e976e52f56fb3b3dd1b90e48
|
niklas cassel
|
drivers
|
power
|
avs
|
power: supply: core: add battery internal resistance temperature table support
|
since the battery internal resistance can be changed with the temperature changes, thus add a resistance temperature table support to look up the accurate battery internal resistance in a certain temperature.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add battery internal resistance temperature table support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['power ', 'supply', 'core']
|
['c', 'h']
| 2
| 76
| 1
|
--- diff --git a/drivers/power/supply/power_supply_core.c b/drivers/power/supply/power_supply_core.c --- a/drivers/power/supply/power_supply_core.c +++ b/drivers/power/supply/power_supply_core.c + struct power_supply_resistance_temp_table *resist_table; + const __be32 *list; + info->resist_table = null; - const __be32 *list; + list = of_get_property(battery_np, "resistance-temp-table", &len); + if (!list || !len) + goto out_put_node; + + info->resist_table_size = len / (2 * sizeof(__be32)); + resist_table = info->resist_table = devm_kcalloc(&psy->dev, + info->resist_table_size, + sizeof(*resist_table), + gfp_kernel); + if (!info->resist_table) { + power_supply_put_battery_info(psy, info); + err = -enomem; + goto out_put_node; + } + + for (index = 0; index < info->resist_table_size; index++) { + resist_table[index].temp = be32_to_cpu(*list++); + resist_table[index].resistance = be32_to_cpu(*list++); + } + + + if (info->resist_table) + devm_kfree(&psy->dev, info->resist_table); +/** + * power_supply_temp2resist_simple() - find the battery internal resistance + * percent + * @table: pointer to battery resistance temperature table + * @table_len: the table length + * @ocv: current temperature + * + * this helper function is used to look up battery internal resistance percent + * according to current temperature value from the resistance temperature table, + * and the table must be ordered descending. then the actual battery internal + * resistance = the ideal battery internal resistance * percent / 100. + * + * return: the battery internal resistance percent + */ +int power_supply_temp2resist_simple(struct power_supply_resistance_temp_table *table, + int table_len, int temp) +{ + int i, resist; + + for (i = 0; i < table_len; i++) + if (temp > table[i].temp) + break; + + if (i > 0 && i < table_len) { + int tmp; + + tmp = (table[i - 1].resistance - table[i].resistance) * + (temp - table[i].temp); + tmp /= table[i - 1].temp - table[i].temp; + resist = tmp + table[i].resistance; + } else if (i == 0) { + resist = table[0].resistance; + } else { + resist = table[table_len - 1].resistance; + } + + return resist; +} +export_symbol_gpl(power_supply_temp2resist_simple); + diff --git a/include/linux/power_supply.h b/include/linux/power_supply.h --- a/include/linux/power_supply.h +++ b/include/linux/power_supply.h +struct power_supply_resistance_temp_table { + int temp; /* celsius */ + int resistance; /* internal resistance percent */ +}; + + struct power_supply_resistance_temp_table *resist_table; + int resist_table_size; +extern int +power_supply_temp2resist_simple(struct power_supply_resistance_temp_table *table, + int table_len, int temp);
|
Voltage, current regulators, power capping, power supply
|
65dbad713d5d6a8581921804ae3f5eb4a9bf032e
|
baolin wang
|
drivers
|
power
|
supply
|
power: supply: bq25890_charger: add support of bq25892 and bq25896 chips
|
support bq25892 and bq25896 chips by this driver. they shared one chip id 0, so distinquish them by device revisions (2 for 25896 and 1 for 25892).
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add support of bq25892 and bq25896 chips
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['power ', 'supply', 'bq25890_charger']
|
['c']
| 1
| 76
| 21
|
--- diff --git a/drivers/power/supply/bq25890_charger.c b/drivers/power/supply/bq25890_charger.c --- a/drivers/power/supply/bq25890_charger.c +++ b/drivers/power/supply/bq25890_charger.c +enum bq25890_chip_version { + bq25890, + bq25892, + bq25895, + bq25896, +}; + - f_bat_load_en, f_wd_rst, f_otg_cfg, f_chg_cfg, f_sysvmin, /* reg03 */ + f_bat_load_en, f_wd_rst, f_otg_cfg, f_chg_cfg, f_sysvmin, + f_min_vbat_sel, /* reg03 */ - f_boostv, f_boosti, /* reg0a */ - f_vbus_stat, f_chg_stat, f_pg_stat, f_sdp_stat, f_vsys_stat, /* reg0b */ + f_boostv, f_pfm_otg_dis, f_boosti, /* reg0a */ + f_vbus_stat, f_chg_stat, f_pg_stat, f_sdp_stat, f_0b_rsvd, + f_vsys_stat, /* reg0b */ - int chip_id; + enum bq25890_chip_version chip_version; - regmap_reg_range(0x0b, 0x0c), - regmap_reg_range(0x0e, 0x14), + regmap_reg_range(0x0b, 0x14), - /* min_vbat_sel on bq25896 */ + [f_min_vbat_sel] = reg_field(0x03, 0, 0), // bq25896 only - /* pfm_otg_dis 3 on bq25896 */ + [f_pfm_otg_dis] = reg_field(0x0a, 3, 3), // bq25896 only + /* todo: bq25896 has max ichg 3008 ma */ - if (bq->chip_id == bq25890_id) + if (bq->chip_version == bq25890) - else if (bq->chip_id == bq25895_id) + else if (bq->chip_version == bq25892) + val->strval = "bq25892"; + else if (bq->chip_version == bq25895) - else if (bq->chip_id == bq25896_id) + else if (bq->chip_version == bq25896) +static int bq25890_get_chip_version(struct bq25890_device *bq) +{ + int id, rev; + + id = bq25890_field_read(bq, f_pn); + if (id < 0) { + dev_err(bq->dev, "cannot read chip id. "); + return id; + } + + rev = bq25890_field_read(bq, f_dev_rev); + if (rev < 0) { + dev_err(bq->dev, "cannot read chip revision. "); + return id; + } + + switch (id) { + case bq25890_id: + bq->chip_version = bq25890; + break; + + /* bq25892 and bq25896 share same id 0 */ + case bq25896_id: + switch (rev) { + case 2: + bq->chip_version = bq25896; + break; + case 1: + bq->chip_version = bq25892; + break; + default: + dev_err(bq->dev, + "unknown device revision %d, assume bq25892 ", + rev); + bq->chip_version = bq25892; + } + break; + + case bq25895_id: + bq->chip_version = bq25895; + break; + + default: + dev_err(bq->dev, "unknown chip id %d ", id); + return -enodev; + } + + return 0; +} + - bq->chip_id = bq25890_field_read(bq, f_pn); - if (bq->chip_id < 0) { - dev_err(dev, "cannot read chip id. "); - return bq->chip_id; - } - - if ((bq->chip_id != bq25890_id) && (bq->chip_id != bq25895_id) - && (bq->chip_id != bq25896_id)) { - dev_err(dev, "chip with id=%d, not supported! ", bq->chip_id); - return -enodev; + ret = bq25890_get_chip_version(bq); + if (ret) { + dev_err(dev, "cannot read chip id or unknown chip. "); + return ret;
|
Voltage, current regulators, power capping, power supply
|
d20267c9a98e082b718873bffbdfb44b126c995b
|
yauhen kharuzhy
|
drivers
|
power
|
supply
|
power: supply: axp20x_usb_power: allow offlining
|
axp803/axp813 have a flag that enables/disables the usb power supply input. allow control of this flag via the online property on those variants.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
allow offlining
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['power ', 'supply', 'axp20x_usb_power']
|
['c']
| 1
| 30
| 0
|
--- diff --git a/drivers/power/supply/axp20x_usb_power.c b/drivers/power/supply/axp20x_usb_power.c --- a/drivers/power/supply/axp20x_usb_power.c +++ b/drivers/power/supply/axp20x_usb_power.c +#define axp20x_vbus_path_sel bit(7) +#define axp20x_vbus_path_sel_offset 7 + +static int axp813_usb_power_set_online(struct axp20x_usb_power *power, + int intval) +{ + int val = !intval << axp20x_vbus_path_sel_offset; + + return regmap_update_bits(power->regmap, + axp20x_vbus_ipsout_mgmt, + axp20x_vbus_path_sel, val); +} + + case power_supply_prop_online: + if (power->axp20x_id != axp813_id) + return -einval; + return axp813_usb_power_set_online(power, val->intval); + + struct axp20x_usb_power *power = power_supply_get_drvdata(psy); + + /* + * the vbus path select flag works differently on on axp288 and newer: + * - on axp20x and axp22x, the flag enables vbus (ignoring n_vbusen). + * - on axp288 and axp8xx, the flag disables vbus (ignoring n_vbusen). + * we only expose the control on variants where it can be used to force + * the vbus input offline. + */ + if (psp == power_supply_prop_online) + return power->axp20x_id == axp813_id; +
|
Voltage, current regulators, power capping, power supply
|
ecbc8dd78ed9fab5bc02d8cf2e839a3a0f2cdc5f
|
samuel holland
|
drivers
|
power
|
supply
|
power: supply: max17042: add max17055 support
|
the max17055 is very similar to the max17042 so extend the driver.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add max17055 support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['power ', 'supply', 'max17042']
|
['c', 'h']
| 2
| 61
| 4
|
--- diff --git a/drivers/power/supply/max17042_battery.c b/drivers/power/supply/max17042_battery.c --- a/drivers/power/supply/max17042_battery.c +++ b/drivers/power/supply/max17042_battery.c + else if (chip->chip_type == maxim_device_type_max17055) + ret = regmap_read(map, max17055_v_empty, &data); - chip->chip_type == maxim_device_type_max17050) + chip->chip_type == maxim_device_type_max17050 || + chip->chip_type == maxim_device_type_max17055) + if (chip->chip_type == maxim_device_type_max17055) + max17042_override_por(map, max17055_v_empty, config->vempty); - if (chip->chip_type) { + if (chip->chip_type && + ((chip->chip_type == maxim_device_type_max17042) || + (chip->chip_type == maxim_device_type_max17047) || + (chip->chip_type == maxim_device_type_max17050))) { - if (chip->chip_type != maxim_device_type_max17042) { + if ((chip->chip_type == maxim_device_type_max17047) || + (chip->chip_type == maxim_device_type_max17050)) { + { .compatible = "maxim,max17055" }, + { "max17055", maxim_device_type_max17055 }, diff --git a/include/linux/power/max17042_battery.h b/include/linux/power/max17042_battery.h --- a/include/linux/power/max17042_battery.h +++ b/include/linux/power/max17042_battery.h - max17042_ocvinternal = 0xfb, + max17042_ocvinternal = 0xfb, /* max17055 vfocv */ +enum max17055_register { + max17055_qres = 0x0c, + max17055_ttf = 0x20, + max17055_v_empty = 0x3a, + max17055_timer = 0x3e, + max17055_user_mem = 0x40, + max17055_rgain = 0x42, + + max17055_convgcfg = 0x49, + max17055_vfremcap = 0x4a, + + max17055_status2 = 0xb0, + max17055_power = 0xb1, + max17055_id = 0xb2, + max17055_avgpower = 0xb3, + max17055_ialrtth = 0xb4, + max17055_ttfcfg = 0xb5, + max17055_cvmixcap = 0xb6, + max17055_cvhalftime = 0xb7, + max17055_cgtempco = 0xb8, + max17055_curve = 0xb9, + max17055_hibcfg = 0xba, + max17055_config2 = 0xbb, + max17055_vripple = 0xbc, + max17055_ripplecfg = 0xbd, + max17055_timerh = 0xbe, + + max17055_rsense = 0xd0, + max17055_scocvlim = 0xd1, + + max17055_sochold = 0xd3, + max17055_maxpeakpwr = 0xd4, + max17055_suspeakpwr = 0xd5, + max17055_packresistance = 0xd6, + max17055_sysresistance = 0xd7, + max17055_minsysv = 0xd8, + max17055_mppcurrent = 0xd9, + max17055_sppcurrent = 0xda, + max17055_modelcfg = 0xdb, + max17055_atqresidual = 0xdc, + max17055_attte = 0xdd, + max17055_atavsoc = 0xde, + max17055_atavcap = 0xdf, +}; + + maxim_device_type_max17055,
|
Voltage, current regulators, power capping, power supply
|
bc90705bbb570b2507353ba10d6b6788cfb119b1
|
angus ainslie purism krzysztof kozlowski krzk kernel org
|
drivers
|
power
|
power, supply
|
regulator: add ipq4019 sdhci vqmmc ldo driver
|
this introduces the ipq4019 vqmmc ldo driver needed for the sd/emmc driver i/o level operation. this will enable introducing sd/emmc support for the built-in controller.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add ipq4019 sdhci vqmmc ldo driver
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['regulator ']
|
['c', 'kconfig', 'makefile']
| 3
| 119
| 0
|
--- diff --git a/drivers/regulator/kconfig b/drivers/regulator/kconfig --- a/drivers/regulator/kconfig +++ b/drivers/regulator/kconfig +config regulator_vqmmc_ipq4019 + tristate "ipq4019 vqmmc sd ldo regulator support" + depends on arch_qcom + help + this driver provides support for the vqmmc ldo i/0 + voltage regulator of the ipq4019 sd/emmc controller. + diff --git a/drivers/regulator/makefile b/drivers/regulator/makefile --- a/drivers/regulator/makefile +++ b/drivers/regulator/makefile +obj-$(config_regulator_vqmmc_ipq4019) += vqmmc-ipq4019-regulator.o diff --git a/drivers/regulator/vqmmc-ipq4019-regulator.c b/drivers/regulator/vqmmc-ipq4019-regulator.c --- /dev/null +++ b/drivers/regulator/vqmmc-ipq4019-regulator.c +// spdx-license-identifier: gpl-2.0+ +// +// copyright (c) 2019 mantas pucka <mantas@8devices.com> +// copyright (c) 2019 robert marko <robert.marko@sartura.hr> +// +// driver for ipq4019 sd/mmc controller's i/o ldo voltage regulator + +#include <linux/io.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> +#include <linux/regulator/driver.h> +#include <linux/regulator/machine.h> +#include <linux/regulator/of_regulator.h> + +static const unsigned int ipq4019_vmmc_voltages[] = { + 1500000, 1800000, 2500000, 3000000, +}; + +static struct regulator_ops ipq4019_regulator_voltage_ops = { + .list_voltage = regulator_list_voltage_table, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, +}; + +static struct regulator_desc vmmc_regulator = { + .name = "vmmcq", + .ops = &ipq4019_regulator_voltage_ops, + .type = regulator_voltage, + .owner = this_module, + .volt_table = ipq4019_vmmc_voltages, + .n_voltages = array_size(ipq4019_vmmc_voltages), + .vsel_reg = 0, + .vsel_mask = 0x3, +}; + +const struct regmap_config ipq4019_vmmcq_regmap_config = { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, +}; + +static int ipq4019_regulator_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct regulator_init_data *init_data; + struct regulator_config cfg = {}; + struct regulator_dev *rdev; + struct resource *res; + struct regmap *rmap; + void __iomem *base; + + init_data = of_get_regulator_init_data(dev, dev->of_node, + &vmmc_regulator); + if (!init_data) + return -einval; + + res = platform_get_resource(pdev, ioresource_mem, 0); + base = devm_ioremap_resource(dev, res); + if (is_err(base)) + return ptr_err(base); + + rmap = devm_regmap_init_mmio(dev, base, &ipq4019_vmmcq_regmap_config); + if (is_err(rmap)) + return ptr_err(rmap); + + cfg.dev = dev; + cfg.init_data = init_data; + cfg.of_node = dev->of_node; + cfg.regmap = rmap; + + rdev = devm_regulator_register(dev, &vmmc_regulator, &cfg); + if (is_err(rdev)) { + dev_err(dev, "failed to register regulator: %ld ", + ptr_err(rdev)); + return ptr_err(rdev); + } + platform_set_drvdata(pdev, rdev); + + return 0; +} + +static int ipq4019_regulator_remove(struct platform_device *pdev) +{ + struct regulator_dev *rdev = platform_get_drvdata(pdev); + + regulator_unregister(rdev); + + return 0; +} + +static const struct of_device_id regulator_ipq4019_of_match[] = { + { .compatible = "qcom,vqmmc-ipq4019-regulator", }, + {}, +}; + +static struct platform_driver ipq4019_regulator_driver = { + .probe = ipq4019_regulator_probe, + .remove = ipq4019_regulator_remove, + .driver = { + .name = "vqmmc-ipq4019-regulator", + .owner = this_module, + .of_match_table = of_match_ptr(regulator_ipq4019_of_match), + }, +}; +module_platform_driver(ipq4019_regulator_driver); + +module_license("gpl"); +module_author("mantas pucka <mantas@8devices.com>"); +module_description("ipq4019 vqmmc voltage regulator");
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Voltage, current regulators, power capping, power supply
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ebf652b408200504194be32ad0a3f5bb49d6000a
|
robert marko
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drivers
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regulator
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regulator: bd71828: basic support for rohm bd71828 pmic regulators
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rohm bd71828 is a power management ic containing 7 bucks and 7 ldos. bucks 1,2,6 and 7 can be assigned to a regulator group controlled by run-levels. eg. voltages and enable/disable statuses for specific run-levels (run0 to run3) can be set via register interface and run level changes can then be done either via i2c or gpio.
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this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
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basic support for rohm bd71828 pmic regulators
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['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
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['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
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['regulator ', 'bd71828']
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['c', 'kconfig', 'makefile']
| 3
| 825
| 0
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--- diff --git a/drivers/regulator/kconfig b/drivers/regulator/kconfig --- a/drivers/regulator/kconfig +++ b/drivers/regulator/kconfig +config regulator_bd71828 + tristate "rohm bd71828 power regulator" + depends on mfd_rohm_bd71828 + select regulator_rohm + help + this driver supports voltage regulators on rohm bd71828 pmic. + this will enable support for the software controllable buck + and ldo regulators. + + this driver can also be built as a module. if so, the module + will be called bd71828-regulator. + diff --git a/drivers/regulator/makefile b/drivers/regulator/makefile --- a/drivers/regulator/makefile +++ b/drivers/regulator/makefile +obj-$(config_regulator_bd71828) += bd71828-regulator.o diff --git a/drivers/regulator/bd71828-regulator.c b/drivers/regulator/bd71828-regulator.c --- /dev/null +++ b/drivers/regulator/bd71828-regulator.c +// spdx-license-identifier: gpl-2.0-only +// copyright (c) 2019 rohm semiconductors +// bd71828-regulator.c rohm bd71828gw-ds1 regulator driver +// + +#include <linux/delay.h> +#include <linux/err.h> +#include <linux/gpio.h> +#include <linux/interrupt.h> +#include <linux/kernel.h> +#include <linux/mfd/rohm-bd71828.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> +#include <linux/regulator/driver.h> +#include <linux/regulator/machine.h> +#include <linux/regulator/of_regulator.h> + +struct reg_init { + unsigned int reg; + unsigned int mask; + unsigned int val; +}; +struct bd71828_regulator_data { + struct regulator_desc desc; + const struct rohm_dvs_config dvs; + const struct reg_init *reg_inits; + int reg_init_amnt; +}; + +static const struct reg_init buck1_inits[] = { + /* + * dvs buck voltages can be changed by register values or via gpio. + * use register accesses by default. + */ + { + .reg = bd71828_reg_ps_ctrl_1, + .mask = bd71828_mask_dvs_buck1_ctrl, + .val = bd71828_dvs_buck1_ctrl_i2c, + }, +}; + +static const struct reg_init buck2_inits[] = { + { + .reg = bd71828_reg_ps_ctrl_1, + .mask = bd71828_mask_dvs_buck2_ctrl, + .val = bd71828_dvs_buck2_ctrl_i2c, + }, +}; + +static const struct reg_init buck6_inits[] = { + { + .reg = bd71828_reg_ps_ctrl_1, + .mask = bd71828_mask_dvs_buck6_ctrl, + .val = bd71828_dvs_buck6_ctrl_i2c, + }, +}; + +static const struct reg_init buck7_inits[] = { + { + .reg = bd71828_reg_ps_ctrl_1, + .mask = bd71828_mask_dvs_buck7_ctrl, + .val = bd71828_dvs_buck7_ctrl_i2c, + }, +}; + +static const struct regulator_linear_range bd71828_buck1267_volts[] = { + regulator_linear_range(500000, 0x00, 0xef, 6250), + regulator_linear_range(2000000, 0xf0, 0xff, 0), +}; + +static const struct regulator_linear_range bd71828_buck3_volts[] = { + regulator_linear_range(1200000, 0x00, 0x0f, 50000), + regulator_linear_range(2000000, 0x10, 0x1f, 0), +}; + +static const struct regulator_linear_range bd71828_buck4_volts[] = { + regulator_linear_range(1000000, 0x00, 0x1f, 25000), + regulator_linear_range(1800000, 0x20, 0x3f, 0), +}; + +static const struct regulator_linear_range bd71828_buck5_volts[] = { + regulator_linear_range(2500000, 0x00, 0x0f, 50000), + regulator_linear_range(3300000, 0x10, 0x1f, 0), +}; + +static const struct regulator_linear_range bd71828_ldo_volts[] = { + regulator_linear_range(800000, 0x00, 0x31, 50000), + regulator_linear_range(3300000, 0x32, 0x3f, 0), +}; + +static int bd71828_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay) +{ + unsigned int val; + + switch (ramp_delay) { + case 1 ... 2500: + val = 0; + break; + case 2501 ... 5000: + val = 1; + break; + case 5001 ... 10000: + val = 2; + break; + case 10001 ... 20000: + val = 3; + break; + default: + val = 3; + dev_err(&rdev->dev, + "ramp_delay: %d not supported, setting 20mv/us", + ramp_delay); + } + + /* + * on bd71828 the ramp delay level control reg is at offset +2 to + * enable reg + */ + return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg + 2, + bd71828_mask_ramp_delay, + val << (ffs(bd71828_mask_ramp_delay) - 1)); +} + +static int buck_set_hw_dvs_levels(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *cfg) +{ + struct bd71828_regulator_data *data; + + data = container_of(desc, struct bd71828_regulator_data, desc); + + return rohm_regulator_set_dvs_levels(&data->dvs, np, desc, cfg->regmap); +} + +static int ldo6_parse_dt(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *cfg) +{ + int ret, i; + uint32_t uv = 0; + unsigned int en; + struct regmap *regmap = cfg->regmap; + static const char * const props[] = { "rohm,dvs-run-voltage", + "rohm,dvs-idle-voltage", + "rohm,dvs-suspend-voltage", + "rohm,dvs-lpsr-voltage" }; + unsigned int mask[] = { bd71828_mask_run_en, bd71828_mask_idle_en, + bd71828_mask_susp_en, bd71828_mask_lpsr_en }; + + for (i = 0; i < array_size(props); i++) { + ret = of_property_read_u32(np, props[i], &uv); + if (ret) { + if (ret != -einval) + return ret; + continue; + } + if (uv) + en = 0xffffffff; + else + en = 0; + + ret = regmap_update_bits(regmap, desc->enable_reg, mask[i], en); + if (ret) + return ret; + } + return 0; +} + +static const struct regulator_ops bd71828_buck_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, +}; + +static const struct regulator_ops bd71828_dvs_buck_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_ramp_delay = bd71828_set_ramp_delay, +}; + +static const struct regulator_ops bd71828_ldo_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, +}; + +static int bd71828_ldo6_get_voltage(struct regulator_dev *rdev) +{ + return bd71828_ldo_6_voltage; +} + +static const struct regulator_ops bd71828_ldo6_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage = bd71828_ldo6_get_voltage, + .is_enabled = regulator_is_enabled_regmap, +}; + +static const struct bd71828_regulator_data bd71828_rdata[] = { + { + .desc = { + .name = "buck1", + .of_match = of_match_ptr("buck1"), + .regulators_node = of_match_ptr("regulators"), + .id = bd71828_buck1, + .ops = &bd71828_dvs_buck_ops, + .type = regulator_voltage, + .linear_ranges = bd71828_buck1267_volts, + .n_linear_ranges = array_size(bd71828_buck1267_volts), + .n_voltages = bd71828_buck1267_volts, + .enable_reg = bd71828_reg_buck1_en, + .enable_mask = bd71828_mask_run_en, + .vsel_reg = bd71828_reg_buck1_volt, + .vsel_mask = bd71828_mask_buck1267_volt, + .owner = this_module, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = rohm_dvs_level_run | rohm_dvs_level_idle | + rohm_dvs_level_suspend | + rohm_dvs_level_lpsr, + .run_reg = bd71828_reg_buck1_volt, + .run_mask = bd71828_mask_buck1267_volt, + .idle_reg = bd71828_reg_buck1_idle_volt, + .idle_mask = bd71828_mask_buck1267_volt, + .idle_on_mask = bd71828_mask_idle_en, + .suspend_reg = bd71828_reg_buck1_susp_volt, + .suspend_mask = bd71828_mask_buck1267_volt, + .suspend_on_mask = bd71828_mask_susp_en, + .lpsr_on_mask = bd71828_mask_lpsr_en, + /* + * lpsr voltage is same as suspend voltage. allow + * setting it so that regulator can be set enabled at + * lpsr state + */ + .lpsr_reg = bd71828_reg_buck1_susp_volt, + .lpsr_mask = bd71828_mask_buck1267_volt, + }, + .reg_inits = buck1_inits, + .reg_init_amnt = array_size(buck1_inits), + }, + { + .desc = { + .name = "buck2", + .of_match = of_match_ptr("buck2"), + .regulators_node = of_match_ptr("regulators"), + .id = bd71828_buck2, + .ops = &bd71828_dvs_buck_ops, + .type = regulator_voltage, + .linear_ranges = bd71828_buck1267_volts, + .n_linear_ranges = array_size(bd71828_buck1267_volts), + .n_voltages = bd71828_buck1267_volts, + .enable_reg = bd71828_reg_buck2_en, + .enable_mask = bd71828_mask_run_en, + .vsel_reg = bd71828_reg_buck2_volt, + .vsel_mask = bd71828_mask_buck1267_volt, + .owner = this_module, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = rohm_dvs_level_run | rohm_dvs_level_idle | + rohm_dvs_level_suspend | + rohm_dvs_level_lpsr, + .run_reg = bd71828_reg_buck2_volt, + .run_mask = bd71828_mask_buck1267_volt, + .idle_reg = bd71828_reg_buck2_idle_volt, + .idle_mask = bd71828_mask_buck1267_volt, + .idle_on_mask = bd71828_mask_idle_en, + .suspend_reg = bd71828_reg_buck2_susp_volt, + .suspend_mask = bd71828_mask_buck1267_volt, + .suspend_on_mask = bd71828_mask_susp_en, + .lpsr_on_mask = bd71828_mask_lpsr_en, + .lpsr_reg = bd71828_reg_buck2_susp_volt, + .lpsr_mask = bd71828_mask_buck1267_volt, + }, + .reg_inits = buck2_inits, + .reg_init_amnt = array_size(buck2_inits), + }, + { + .desc = { + .name = "buck3", + .of_match = of_match_ptr("buck3"), + .regulators_node = of_match_ptr("regulators"), + .id = bd71828_buck3, + .ops = &bd71828_buck_ops, + .type = regulator_voltage, + .linear_ranges = bd71828_buck3_volts, + .n_linear_ranges = array_size(bd71828_buck3_volts), + .n_voltages = bd71828_buck3_volts, + .enable_reg = bd71828_reg_buck3_en, + .enable_mask = bd71828_mask_run_en, + .vsel_reg = bd71828_reg_buck3_volt, + .vsel_mask = bd71828_mask_buck3_volt, + .owner = this_module, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + /* + * buck3 only supports single voltage for all states. + * voltage can be individually enabled for each state + * though => allow setting all states to support + * enabling power rail on different states. + */ + .level_map = rohm_dvs_level_run | rohm_dvs_level_idle | + rohm_dvs_level_suspend | + rohm_dvs_level_lpsr, + .run_reg = bd71828_reg_buck3_volt, + .idle_reg = bd71828_reg_buck3_volt, + .suspend_reg = bd71828_reg_buck3_volt, + .lpsr_reg = bd71828_reg_buck3_volt, + .run_mask = bd71828_mask_buck3_volt, + .idle_mask = bd71828_mask_buck3_volt, + .suspend_mask = bd71828_mask_buck3_volt, + .lpsr_mask = bd71828_mask_buck3_volt, + .idle_on_mask = bd71828_mask_idle_en, + .suspend_on_mask = bd71828_mask_susp_en, + .lpsr_on_mask = bd71828_mask_lpsr_en, + }, + }, + { + .desc = { + .name = "buck4", + .of_match = of_match_ptr("buck4"), + .regulators_node = of_match_ptr("regulators"), + .id = bd71828_buck4, + .ops = &bd71828_buck_ops, + .type = regulator_voltage, + .linear_ranges = bd71828_buck4_volts, + .n_linear_ranges = array_size(bd71828_buck4_volts), + .n_voltages = bd71828_buck4_volts, + .enable_reg = bd71828_reg_buck4_en, + .enable_mask = bd71828_mask_run_en, + .vsel_reg = bd71828_reg_buck4_volt, + .vsel_mask = bd71828_mask_buck4_volt, + .owner = this_module, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + /* + * buck4 only supports single voltage for all states. + * voltage can be individually enabled for each state + * though => allow setting all states to support + * enabling power rail on different states. + */ + .level_map = rohm_dvs_level_run | rohm_dvs_level_idle | + rohm_dvs_level_suspend | + rohm_dvs_level_lpsr, + .run_reg = bd71828_reg_buck4_volt, + .idle_reg = bd71828_reg_buck4_volt, + .suspend_reg = bd71828_reg_buck4_volt, + .lpsr_reg = bd71828_reg_buck4_volt, + .run_mask = bd71828_mask_buck4_volt, + .idle_mask = bd71828_mask_buck4_volt, + .suspend_mask = bd71828_mask_buck4_volt, + .lpsr_mask = bd71828_mask_buck4_volt, + .idle_on_mask = bd71828_mask_idle_en, + .suspend_on_mask = bd71828_mask_susp_en, + .lpsr_on_mask = bd71828_mask_lpsr_en, + }, + }, + { + .desc = { + .name = "buck5", + .of_match = of_match_ptr("buck5"), + .regulators_node = of_match_ptr("regulators"), + .id = bd71828_buck5, + .ops = &bd71828_buck_ops, + .type = regulator_voltage, + .linear_ranges = bd71828_buck5_volts, + .n_linear_ranges = array_size(bd71828_buck5_volts), + .n_voltages = bd71828_buck5_volts, + .enable_reg = bd71828_reg_buck5_en, + .enable_mask = bd71828_mask_run_en, + .vsel_reg = bd71828_reg_buck5_volt, + .vsel_mask = bd71828_mask_buck5_volt, + .owner = this_module, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + /* + * buck5 only supports single voltage for all states. + * voltage can be individually enabled for each state + * though => allow setting all states to support + * enabling power rail on different states. + */ + .level_map = rohm_dvs_level_run | rohm_dvs_level_idle | + rohm_dvs_level_suspend | + rohm_dvs_level_lpsr, + .run_reg = bd71828_reg_buck5_volt, + .idle_reg = bd71828_reg_buck5_volt, + .suspend_reg = bd71828_reg_buck5_volt, + .lpsr_reg = bd71828_reg_buck5_volt, + .run_mask = bd71828_mask_buck5_volt, + .idle_mask = bd71828_mask_buck5_volt, + .suspend_mask = bd71828_mask_buck5_volt, + .lpsr_mask = bd71828_mask_buck5_volt, + .idle_on_mask = bd71828_mask_idle_en, + .suspend_on_mask = bd71828_mask_susp_en, + .lpsr_on_mask = bd71828_mask_lpsr_en, + }, + }, + { + .desc = { + .name = "buck6", + .of_match = of_match_ptr("buck6"), + .regulators_node = of_match_ptr("regulators"), + .id = bd71828_buck6, + .ops = &bd71828_dvs_buck_ops, + .type = regulator_voltage, + .linear_ranges = bd71828_buck1267_volts, + .n_linear_ranges = array_size(bd71828_buck1267_volts), + .n_voltages = bd71828_buck1267_volts, + .enable_reg = bd71828_reg_buck6_en, + .enable_mask = bd71828_mask_run_en, + .vsel_reg = bd71828_reg_buck6_volt, + .vsel_mask = bd71828_mask_buck1267_volt, + .owner = this_module, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = rohm_dvs_level_run | rohm_dvs_level_idle | + rohm_dvs_level_suspend | + rohm_dvs_level_lpsr, + .run_reg = bd71828_reg_buck6_volt, + .run_mask = bd71828_mask_buck1267_volt, + .idle_reg = bd71828_reg_buck6_idle_volt, + .idle_mask = bd71828_mask_buck1267_volt, + .idle_on_mask = bd71828_mask_idle_en, + .suspend_reg = bd71828_reg_buck6_susp_volt, + .suspend_mask = bd71828_mask_buck1267_volt, + .suspend_on_mask = bd71828_mask_susp_en, + .lpsr_on_mask = bd71828_mask_lpsr_en, + .lpsr_reg = bd71828_reg_buck6_susp_volt, + .lpsr_mask = bd71828_mask_buck1267_volt, + }, + .reg_inits = buck6_inits, + .reg_init_amnt = array_size(buck6_inits), + }, + { + .desc = { + .name = "buck7", + .of_match = of_match_ptr("buck7"), + .regulators_node = of_match_ptr("regulators"), + .id = bd71828_buck7, + .ops = &bd71828_dvs_buck_ops, + .type = regulator_voltage, + .linear_ranges = bd71828_buck1267_volts, + .n_linear_ranges = array_size(bd71828_buck1267_volts), + .n_voltages = bd71828_buck1267_volts, + .enable_reg = bd71828_reg_buck7_en, + .enable_mask = bd71828_mask_run_en, + .vsel_reg = bd71828_reg_buck7_volt, + .vsel_mask = bd71828_mask_buck1267_volt, + .owner = this_module, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = rohm_dvs_level_run | rohm_dvs_level_idle | + rohm_dvs_level_suspend | + rohm_dvs_level_lpsr, + .run_reg = bd71828_reg_buck7_volt, + .run_mask = bd71828_mask_buck1267_volt, + .idle_reg = bd71828_reg_buck7_idle_volt, + .idle_mask = bd71828_mask_buck1267_volt, + .idle_on_mask = bd71828_mask_idle_en, + .suspend_reg = bd71828_reg_buck7_susp_volt, + .suspend_mask = bd71828_mask_buck1267_volt, + .suspend_on_mask = bd71828_mask_susp_en, + .lpsr_on_mask = bd71828_mask_lpsr_en, + .lpsr_reg = bd71828_reg_buck7_susp_volt, + .lpsr_mask = bd71828_mask_buck1267_volt, + }, + .reg_inits = buck7_inits, + .reg_init_amnt = array_size(buck7_inits), + }, + { + .desc = { + .name = "ldo1", + .of_match = of_match_ptr("ldo1"), + .regulators_node = of_match_ptr("regulators"), + .id = bd71828_ldo1, + .ops = &bd71828_ldo_ops, + .type = regulator_voltage, + .linear_ranges = bd71828_ldo_volts, + .n_linear_ranges = array_size(bd71828_ldo_volts), + .n_voltages = bd71828_ldo_volts, + .enable_reg = bd71828_reg_ldo1_en, + .enable_mask = bd71828_mask_run_en, + .vsel_reg = bd71828_reg_ldo1_volt, + .vsel_mask = bd71828_mask_ldo_volt, + .owner = this_module, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + /* + * ldo1 only supports single voltage for all states. + * voltage can be individually enabled for each state + * though => allow setting all states to support + * enabling power rail on different states. + */ + .level_map = rohm_dvs_level_run | rohm_dvs_level_idle | + rohm_dvs_level_suspend | + rohm_dvs_level_lpsr, + .run_reg = bd71828_reg_ldo1_volt, + .idle_reg = bd71828_reg_ldo1_volt, + .suspend_reg = bd71828_reg_ldo1_volt, + .lpsr_reg = bd71828_reg_ldo1_volt, + .run_mask = bd71828_mask_ldo_volt, + .idle_mask = bd71828_mask_ldo_volt, + .suspend_mask = bd71828_mask_ldo_volt, + .lpsr_mask = bd71828_mask_ldo_volt, + .idle_on_mask = bd71828_mask_idle_en, + .suspend_on_mask = bd71828_mask_susp_en, + .lpsr_on_mask = bd71828_mask_lpsr_en, + }, + }, { + .desc = { + .name = "ldo2", + .of_match = of_match_ptr("ldo2"), + .regulators_node = of_match_ptr("regulators"), + .id = bd71828_ldo2, + .ops = &bd71828_ldo_ops, + .type = regulator_voltage, + .linear_ranges = bd71828_ldo_volts, + .n_linear_ranges = array_size(bd71828_ldo_volts), + .n_voltages = bd71828_ldo_volts, + .enable_reg = bd71828_reg_ldo2_en, + .enable_mask = bd71828_mask_run_en, + .vsel_reg = bd71828_reg_ldo2_volt, + .vsel_mask = bd71828_mask_ldo_volt, + .owner = this_module, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + /* + * ldo2 only supports single voltage for all states. + * voltage can be individually enabled for each state + * though => allow setting all states to support + * enabling power rail on different states. + */ + .level_map = rohm_dvs_level_run | rohm_dvs_level_idle | + rohm_dvs_level_suspend | + rohm_dvs_level_lpsr, + .run_reg = bd71828_reg_ldo2_volt, + .idle_reg = bd71828_reg_ldo2_volt, + .suspend_reg = bd71828_reg_ldo2_volt, + .lpsr_reg = bd71828_reg_ldo2_volt, + .run_mask = bd71828_mask_ldo_volt, + .idle_mask = bd71828_mask_ldo_volt, + .suspend_mask = bd71828_mask_ldo_volt, + .lpsr_mask = bd71828_mask_ldo_volt, + .idle_on_mask = bd71828_mask_idle_en, + .suspend_on_mask = bd71828_mask_susp_en, + .lpsr_on_mask = bd71828_mask_lpsr_en, + }, + }, { + .desc = { + .name = "ldo3", + .of_match = of_match_ptr("ldo3"), + .regulators_node = of_match_ptr("regulators"), + .id = bd71828_ldo3, + .ops = &bd71828_ldo_ops, + .type = regulator_voltage, + .linear_ranges = bd71828_ldo_volts, + .n_linear_ranges = array_size(bd71828_ldo_volts), + .n_voltages = bd71828_ldo_volts, + .enable_reg = bd71828_reg_ldo3_en, + .enable_mask = bd71828_mask_run_en, + .vsel_reg = bd71828_reg_ldo3_volt, + .vsel_mask = bd71828_mask_ldo_volt, + .owner = this_module, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + /* + * ldo3 only supports single voltage for all states. + * voltage can be individually enabled for each state + * though => allow setting all states to support + * enabling power rail on different states. + */ + .level_map = rohm_dvs_level_run | rohm_dvs_level_idle | + rohm_dvs_level_suspend | + rohm_dvs_level_lpsr, + .run_reg = bd71828_reg_ldo3_volt, + .idle_reg = bd71828_reg_ldo3_volt, + .suspend_reg = bd71828_reg_ldo3_volt, + .lpsr_reg = bd71828_reg_ldo3_volt, + .run_mask = bd71828_mask_ldo_volt, + .idle_mask = bd71828_mask_ldo_volt, + .suspend_mask = bd71828_mask_ldo_volt, + .lpsr_mask = bd71828_mask_ldo_volt, + .idle_on_mask = bd71828_mask_idle_en, + .suspend_on_mask = bd71828_mask_susp_en, + .lpsr_on_mask = bd71828_mask_lpsr_en, + }, + + }, { + .desc = { + .name = "ldo4", + .of_match = of_match_ptr("ldo4"), + .regulators_node = of_match_ptr("regulators"), + .id = bd71828_ldo4, + .ops = &bd71828_ldo_ops, + .type = regulator_voltage, + .linear_ranges = bd71828_ldo_volts, + .n_linear_ranges = array_size(bd71828_ldo_volts), + .n_voltages = bd71828_ldo_volts, + .enable_reg = bd71828_reg_ldo4_en, + .enable_mask = bd71828_mask_run_en, + .vsel_reg = bd71828_reg_ldo4_volt, + .vsel_mask = bd71828_mask_ldo_volt, + .owner = this_module, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + /* + * ldo1 only supports single voltage for all states. + * voltage can be individually enabled for each state + * though => allow setting all states to support + * enabling power rail on different states. + */ + .level_map = rohm_dvs_level_run | rohm_dvs_level_idle | + rohm_dvs_level_suspend | + rohm_dvs_level_lpsr, + .run_reg = bd71828_reg_ldo4_volt, + .idle_reg = bd71828_reg_ldo4_volt, + .suspend_reg = bd71828_reg_ldo4_volt, + .lpsr_reg = bd71828_reg_ldo4_volt, + .run_mask = bd71828_mask_ldo_volt, + .idle_mask = bd71828_mask_ldo_volt, + .suspend_mask = bd71828_mask_ldo_volt, + .lpsr_mask = bd71828_mask_ldo_volt, + .idle_on_mask = bd71828_mask_idle_en, + .suspend_on_mask = bd71828_mask_susp_en, + .lpsr_on_mask = bd71828_mask_lpsr_en, + }, + }, { + .desc = { + .name = "ldo5", + .of_match = of_match_ptr("ldo5"), + .regulators_node = of_match_ptr("regulators"), + .id = bd71828_ldo5, + .ops = &bd71828_ldo_ops, + .type = regulator_voltage, + .linear_ranges = bd71828_ldo_volts, + .n_linear_ranges = array_size(bd71828_ldo_volts), + .n_voltages = bd71828_ldo_volts, + .enable_reg = bd71828_reg_ldo5_en, + .enable_mask = bd71828_mask_run_en, + .vsel_reg = bd71828_reg_ldo5_volt, + .vsel_mask = bd71828_mask_ldo_volt, + .of_parse_cb = buck_set_hw_dvs_levels, + .owner = this_module, + }, + /* + * ldo5 is special. it can choose vsel settings to be configured + * from 2 different registers (by gpio). + * + * this driver supports only configuration where + * bd71828_reg_ldo5_volt_l is used. + */ + .dvs = { + .level_map = rohm_dvs_level_run | rohm_dvs_level_idle | + rohm_dvs_level_suspend | + rohm_dvs_level_lpsr, + .run_reg = bd71828_reg_ldo5_volt, + .idle_reg = bd71828_reg_ldo5_volt, + .suspend_reg = bd71828_reg_ldo5_volt, + .lpsr_reg = bd71828_reg_ldo5_volt, + .run_mask = bd71828_mask_ldo_volt, + .idle_mask = bd71828_mask_ldo_volt, + .suspend_mask = bd71828_mask_ldo_volt, + .lpsr_mask = bd71828_mask_ldo_volt, + .idle_on_mask = bd71828_mask_idle_en, + .suspend_on_mask = bd71828_mask_susp_en, + .lpsr_on_mask = bd71828_mask_lpsr_en, + }, + + }, { + .desc = { + .name = "ldo6", + .of_match = of_match_ptr("ldo6"), + .regulators_node = of_match_ptr("regulators"), + .id = bd71828_ldo6, + .ops = &bd71828_ldo6_ops, + .type = regulator_voltage, + .n_voltages = 1, + .enable_reg = bd71828_reg_ldo6_en, + .enable_mask = bd71828_mask_run_en, + .owner = this_module, + /* + * ldo6 only supports enable/disable for all states. + * voltage for ldo6 is fixed. + */ + .of_parse_cb = ldo6_parse_dt, + }, + }, { + .desc = { + /* snvs ldo in data-sheet */ + .name = "ldo7", + .of_match = of_match_ptr("ldo7"), + .regulators_node = of_match_ptr("regulators"), + .id = bd71828_ldo_snvs, + .ops = &bd71828_ldo_ops, + .type = regulator_voltage, + .linear_ranges = bd71828_ldo_volts, + .n_linear_ranges = array_size(bd71828_ldo_volts), + .n_voltages = bd71828_ldo_volts, + .enable_reg = bd71828_reg_ldo7_en, + .enable_mask = bd71828_mask_run_en, + .vsel_reg = bd71828_reg_ldo7_volt, + .vsel_mask = bd71828_mask_ldo_volt, + .owner = this_module, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + /* + * ldo7 only supports single voltage for all states. + * voltage can be individually enabled for each state + * though => allow setting all states to support + * enabling power rail on different states. + */ + .level_map = rohm_dvs_level_run | rohm_dvs_level_idle | + rohm_dvs_level_suspend | + rohm_dvs_level_lpsr, + .run_reg = bd71828_reg_ldo7_volt, + .idle_reg = bd71828_reg_ldo7_volt, + .suspend_reg = bd71828_reg_ldo7_volt, + .lpsr_reg = bd71828_reg_ldo7_volt, + .run_mask = bd71828_mask_ldo_volt, + .idle_mask = bd71828_mask_ldo_volt, + .suspend_mask = bd71828_mask_ldo_volt, + .lpsr_mask = bd71828_mask_ldo_volt, + .idle_on_mask = bd71828_mask_idle_en, + .suspend_on_mask = bd71828_mask_susp_en, + .lpsr_on_mask = bd71828_mask_lpsr_en, + }, + + }, +}; + +static int bd71828_probe(struct platform_device *pdev) +{ + struct rohm_regmap_dev *bd71828; + int i, j, ret; + struct regulator_config config = { + .dev = pdev->dev.parent, + }; + + bd71828 = dev_get_drvdata(pdev->dev.parent); + if (!bd71828) { + dev_err(&pdev->dev, "no mfd driver data "); + return -einval; + } + + config.regmap = bd71828->regmap; + + for (i = 0; i < array_size(bd71828_rdata); i++) { + struct regulator_dev *rdev; + const struct bd71828_regulator_data *rd; + + rd = &bd71828_rdata[i]; + rdev = devm_regulator_register(&pdev->dev, + &rd->desc, &config); + if (is_err(rdev)) { + dev_err(&pdev->dev, + "failed to register %s regulator ", + rd->desc.name); + return ptr_err(rdev); + } + for (j = 0; j < rd->reg_init_amnt; j++) { + ret = regmap_update_bits(bd71828->regmap, + rd->reg_inits[j].reg, + rd->reg_inits[j].mask, + rd->reg_inits[j].val); + if (ret) { + dev_err(&pdev->dev, + "regulator %s init failed ", + rd->desc.name); + return ret; + } + } + } + return 0; +} + +static struct platform_driver bd71828_regulator = { + .driver = { + .name = "bd71828-pmic" + }, + .probe = bd71828_probe, +}; + +module_platform_driver(bd71828_regulator); + +module_author("matti vaittinen <matti.vaittinen@fi.rohmeurope.com>"); +module_description("bd71828 voltage regulator driver"); +module_license("gpl"); +module_alias("platform:bd71828-pmic");
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Voltage, current regulators, power capping, power supply
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522498f8cb8c547f415a9a39fb54fd1f7e1a1eda
|
matti vaittinen
|
drivers
|
regulator
| |
regulator: mp8859: add config option and build entry
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add entries for the mp8859 regulator driver to the build system.
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this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
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add config option and build entry
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
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['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['regulator ', 'mp8859']
|
['kconfig', 'makefile']
| 2
| 12
| 0
|
--- diff --git a/drivers/regulator/kconfig b/drivers/regulator/kconfig --- a/drivers/regulator/kconfig +++ b/drivers/regulator/kconfig +config regulator_mp8859 + tristate "mps mp8859 regulator driver" + depends on i2c + select regmap_i2c + help + say y here to support the mp8859 voltage regulator. this driver + supports basic operations (get/set voltage) through the regulator + interface. + say m here if you want to include support for the regulator as a + module. the module will be named "mp8859". + diff --git a/drivers/regulator/makefile b/drivers/regulator/makefile --- a/drivers/regulator/makefile +++ b/drivers/regulator/makefile +obj-$(config_regulator_mp8859) += mp8859.o
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Voltage, current regulators, power capping, power supply
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c66f1cbad53a61f00f8b6273e737d5e560b69ec7
|
markus reichl
|
drivers
|
regulator
| |
regulator: mp8859: add driver
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the mp8859 from monolithic power systems is a single output dc/dc converter. the voltage can be controlled via i2c.
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this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
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add driver
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['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
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['regulator ', 'mp8859']
|
['c']
| 1
| 156
| 0
|
--- diff --git a/drivers/regulator/mp8859.c b/drivers/regulator/mp8859.c --- /dev/null +++ b/drivers/regulator/mp8859.c +// spdx-license-identifier: gpl-2.0 +// +// copyright (c) 2019 five technologies gmbh +// author: markus reichl <m.reichl@fivetechno.de> + +#include <linux/module.h> +#include <linux/i2c.h> +#include <linux/of.h> +#include <linux/regulator/driver.h> +#include <linux/regmap.h> + + +#define vol_min_idx 0x00 +#define vol_max_idx 0x7ff + +/* register definitions */ +#define mp8859_vout_l_reg 0 //3 lo bits +#define mp8859_vout_h_reg 1 //8 hi bits +#define mp8859_vout_go_reg 2 +#define mp8859_iout_lim_reg 3 +#define mp8859_ctl1_reg 4 +#define mp8859_ctl2_reg 5 +#define mp8859_reserved1_reg 6 +#define mp8859_reserved2_reg 7 +#define mp8859_reserved3_reg 8 +#define mp8859_status_reg 9 +#define mp8859_interrupt_reg 0x0a +#define mp8859_mask_reg 0x0b +#define mp8859_id1_reg 0x0c +#define mp8859_mfr_id_reg 0x27 +#define mp8859_dev_id_reg 0x28 +#define mp8859_ic_rev_reg 0x29 + +#define mp8859_max_reg 0x29 + +#define mp8859_go_bit 0x01 + + +static int mp8859_set_voltage_sel(struct regulator_dev *rdev, unsigned int sel) +{ + int ret; + + ret = regmap_write(rdev->regmap, mp8859_vout_l_reg, sel & 0x7); + + if (ret) + return ret; + ret = regmap_write(rdev->regmap, mp8859_vout_h_reg, sel >> 3); + + if (ret) + return ret; + ret = regmap_update_bits(rdev->regmap, mp8859_vout_go_reg, + mp8859_go_bit, 1); + return ret; +} + +static int mp8859_get_voltage_sel(struct regulator_dev *rdev) +{ + unsigned int val_tmp; + unsigned int val; + int ret; + + ret = regmap_read(rdev->regmap, mp8859_vout_h_reg, &val_tmp); + + if (ret) + return ret; + val = val_tmp << 3; + + ret = regmap_read(rdev->regmap, mp8859_vout_l_reg, &val_tmp); + + if (ret) + return ret; + val |= val_tmp & 0x07; + return val; +} + +static const struct regulator_linear_range mp8859_dcdc_ranges[] = { + regulator_linear_range(0, vol_min_idx, vol_max_idx, 10000), +}; + +static const struct regmap_config mp8859_regmap = { + .reg_bits = 8, + .val_bits = 8, + .max_register = mp8859_max_reg, + .cache_type = regcache_rbtree, +}; + +static const struct regulator_ops mp8859_ops = { + .set_voltage_sel = mp8859_set_voltage_sel, + .get_voltage_sel = mp8859_get_voltage_sel, + .list_voltage = regulator_list_voltage_linear_range, +}; + +static const struct regulator_desc mp8859_regulators[] = { + { + .id = 0, + .type = regulator_voltage, + .name = "mp8859_dcdc", + .of_match = of_match_ptr("mp8859_dcdc"), + .n_voltages = vol_max_idx + 1, + .linear_ranges = mp8859_dcdc_ranges, + .n_linear_ranges = 1, + .ops = &mp8859_ops, + .owner = this_module, + }, +}; + +static int mp8859_i2c_probe(struct i2c_client *i2c) +{ + int ret; + struct regulator_config config = {.dev = &i2c->dev}; + struct regmap *regmap = devm_regmap_init_i2c(i2c, &mp8859_regmap); + struct regulator_dev *rdev; + + if (is_err(regmap)) { + ret = ptr_err(regmap); + dev_err(&i2c->dev, "regmap init failed: %d ", ret); + return ret; + } + rdev = devm_regulator_register(&i2c->dev, &mp8859_regulators[0], + &config); + + if (is_err(rdev)) { + ret = ptr_err(rdev); + dev_err(&i2c->dev, "failed to register %s: %d ", + mp8859_regulators[0].name, ret); + return ret; + } + return 0; +} + +static const struct of_device_id mp8859_dt_id[] = { + {.compatible = "mps,mp8859"}, + {}, +}; +module_device_table(of, mp8859_dt_id); + +static const struct i2c_device_id mp8859_i2c_id[] = { + { "mp8859", }, + { }, +}; +module_device_table(i2c, mp8859_i2c_id); + +static struct i2c_driver mp8859_regulator_driver = { + .driver = { + .name = "mp8859", + .of_match_table = of_match_ptr(mp8859_dt_id), + }, + .probe_new = mp8859_i2c_probe, + .id_table = mp8859_i2c_id, +}; + +module_i2c_driver(mp8859_regulator_driver); + +module_description("monolithic power systems mp8859 voltage regulator driver"); +module_author("markus reichl <m.reichl@fivetechno.de>"); +module_license("gpl v2");
|
Voltage, current regulators, power capping, power supply
|
4444a1c10069e2f371fa497ba22feafafed5aada
|
markus reichl
|
drivers
|
regulator
| |
regulator: mpq7920: add mpq7920 regulator driver
|
adding regulator driver for the device mpq7920. the mpq7920 pmic device contains four dc-dc buck converters and five regulators, is designed for automotive and accessed over i2c.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add mpq7920 regulator driver
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['regulator ', 'mpq7920']
|
['c', 'kconfig', 'makefile', 'h']
| 4
| 425
| 0
|
--- diff --git a/drivers/regulator/kconfig b/drivers/regulator/kconfig --- a/drivers/regulator/kconfig +++ b/drivers/regulator/kconfig +config regulator_mpq7920 + tristate "monolithic mpq7920 pmic" + depends on i2c && of + select regmap_i2c + help + say y here to support the mpq7920 pmic. this will enable supports + the software controllable 4 buck and 5 ldo regulators. + this driver supports the control of different power rails of device + through regulator interface. + diff --git a/drivers/regulator/makefile b/drivers/regulator/makefile --- a/drivers/regulator/makefile +++ b/drivers/regulator/makefile +obj-$(config_regulator_mpq7920) += mpq7920.o diff --git a/drivers/regulator/mpq7920.c b/drivers/regulator/mpq7920.c --- /dev/null +++ b/drivers/regulator/mpq7920.c +// spdx-license-identifier: gpl-2.0+ +// +// mpq7920.c - regulator driver for mps mpq7920 +// +// copyright 2019 monolithic power systems, inc +// +// author: saravanan sekar <sravanhome@gmail.com> + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/init.h> +#include <linux/err.h> +#include <linux/of.h> +#include <linux/of_device.h> +#include <linux/platform_device.h> +#include <linux/regulator/driver.h> +#include <linux/regulator/of_regulator.h> +#include <linux/i2c.h> +#include <linux/regmap.h> +#include "mpq7920.h" + +#define mpq7920_buck_volt_range \ + ((mpq7920_volt_max - mpq7920_buck_volt_min)/mpq7920_volt_step + 1) +#define mpq7920_ldo_volt_range \ + ((mpq7920_volt_max - mpq7920_ldo_volt_min)/mpq7920_volt_step + 1) + +#define mpq7920buck(_name, _id, _ilim) \ + [mpq7920_buck ## _id] = { \ + .id = mpq7920_buck ## _id, \ + .name = _name, \ + .of_match = _name, \ + .regulators_node = "regulators", \ + .of_parse_cb = mpq7920_parse_cb, \ + .ops = &mpq7920_buck_ops, \ + .min_uv = mpq7920_buck_volt_min, \ + .uv_step = mpq7920_volt_step, \ + .n_voltages = mpq7920_buck_volt_range, \ + .curr_table = _ilim, \ + .n_current_limits = array_size(_ilim), \ + .csel_reg = mpq7920_buck ##_id## _reg_c, \ + .csel_mask = mpq7920_mask_buck_ilim, \ + .enable_reg = mpq7920_reg_regulator_en, \ + .enable_mask = bit(mpq7920_regulator_en_offset - \ + mpq7920_buck ## _id), \ + .vsel_reg = mpq7920_buck ##_id## _reg_a, \ + .vsel_mask = mpq7920_mask_vref, \ + .active_discharge_on = mpq7920_discharge_on, \ + .active_discharge_reg = mpq7920_buck ##_id## _reg_b, \ + .active_discharge_mask = mpq7920_mask_discharge, \ + .soft_start_reg = mpq7920_buck ##_id## _reg_c, \ + .soft_start_mask = mpq7920_mask_softstart, \ + .owner = this_module, \ + } + +#define mpq7920ldo(_name, _id, _ops, _ilim, _ilim_sz, _creg, _cmask) \ + [mpq7920_ldo ## _id] = { \ + .id = mpq7920_ldo ## _id, \ + .name = _name, \ + .of_match = _name, \ + .regulators_node = "regulators", \ + .ops = _ops, \ + .min_uv = mpq7920_ldo_volt_min, \ + .uv_step = mpq7920_volt_step, \ + .n_voltages = mpq7920_ldo_volt_range, \ + .vsel_reg = mpq7920_ldo ##_id## _reg_a, \ + .vsel_mask = mpq7920_mask_vref, \ + .curr_table = _ilim, \ + .n_current_limits = _ilim_sz, \ + .csel_reg = _creg, \ + .csel_mask = _cmask, \ + .enable_reg = (_id == 1) ? 0 : mpq7920_reg_regulator_en,\ + .enable_mask = bit(mpq7920_regulator_en_offset - \ + mpq7920_ldo ##_id + 1), \ + .active_discharge_on = mpq7920_discharge_on, \ + .active_discharge_mask = mpq7920_mask_discharge, \ + .active_discharge_reg = mpq7920_ldo ##_id## _reg_b, \ + .type = regulator_voltage, \ + .owner = this_module, \ + } + +enum mpq7920_regulators { + mpq7920_buck1, + mpq7920_buck2, + mpq7920_buck3, + mpq7920_buck4, + mpq7920_ldo1, /* ldortc */ + mpq7920_ldo2, + mpq7920_ldo3, + mpq7920_ldo4, + mpq7920_ldo5, + mpq7920_max_regulators, +}; + +struct mpq7920_regulator_info { + struct device *dev; + struct regmap *regmap; + struct regulator_dev *rdev[mpq7920_max_regulators]; + struct regulator_desc *rdesc; +}; + +static const struct regmap_config mpq7920_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = 0x25, +}; + +/* current limits array (in ua) + * ilim1 & ilim3 + */ +static const unsigned int mpq7920_i_limits1[] = { + 4600000, 6600000, 7600000, 9300000 +}; + +/* ilim2 & ilim4 */ +static const unsigned int mpq7920_i_limits2[] = { + 2700000, 3900000, 5100000, 6100000 +}; + +/* ldo4 & ldo5 */ +static const unsigned int mpq7920_i_limits3[] = { + 300000, 700000 +}; + +static int mpq7920_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay); +static int mpq7920_parse_cb(struct device_node *np, + const struct regulator_desc *rdesc, + struct regulator_config *config); + +/* rtcldo not controllable, always on */ +static const struct regulator_ops mpq7920_ldortc_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, +}; + +static const struct regulator_ops mpq7920_ldo_wo_current_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, +}; + +static const struct regulator_ops mpq7920_ldo_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, + .get_current_limit = regulator_get_current_limit_regmap, + .set_current_limit = regulator_set_current_limit_regmap, +}; + +static const struct regulator_ops mpq7920_buck_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, + .set_soft_start = regulator_set_soft_start_regmap, + .set_ramp_delay = mpq7920_set_ramp_delay, +}; + +static struct regulator_desc mpq7920_regulators_desc[mpq7920_max_regulators] = { + mpq7920buck("buck1", 1, mpq7920_i_limits1), + mpq7920buck("buck2", 2, mpq7920_i_limits2), + mpq7920buck("buck3", 3, mpq7920_i_limits1), + mpq7920buck("buck4", 4, mpq7920_i_limits2), + mpq7920ldo("ldortc", 1, &mpq7920_ldortc_ops, null, 0, 0, 0), + mpq7920ldo("ldo2", 2, &mpq7920_ldo_wo_current_ops, null, 0, 0, 0), + mpq7920ldo("ldo3", 3, &mpq7920_ldo_wo_current_ops, null, 0, 0, 0), + mpq7920ldo("ldo4", 4, &mpq7920_ldo_ops, mpq7920_i_limits3, + array_size(mpq7920_i_limits3), mpq7920_ldo4_reg_b, + mpq7920_mask_ldo_ilim), + mpq7920ldo("ldo5", 5, &mpq7920_ldo_ops, mpq7920_i_limits3, + array_size(mpq7920_i_limits3), mpq7920_ldo5_reg_b, + mpq7920_mask_ldo_ilim), +}; + +/* + * dvs ramp rate buck1 to buck4 + * 00-01: reserved + * 10: 8mv/us + * 11: 4mv/us + */ +static int mpq7920_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay) +{ + unsigned int ramp_val; + + if (ramp_delay > 8000 || ramp_delay < 0) + return -einval; + + if (ramp_delay <= 4000) + ramp_val = 3; + else + ramp_val = 2; + + return regmap_update_bits(rdev->regmap, mpq7920_reg_ctl0, + mpq7920_mask_dvs_slewrate, ramp_val << 6); +} + +static int mpq7920_parse_cb(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *config) +{ + uint8_t val; + int ret; + struct mpq7920_regulator_info *info = config->driver_data; + struct regulator_desc *rdesc = &info->rdesc[desc->id]; + + if (of_property_read_bool(np, "mps,buck-ovp-disable")) { + regmap_update_bits(config->regmap, + mpq7920_buck1_reg_b + (rdesc->id * 4), + bit(6), ~bit(6)); + } + + ret = of_property_read_u8(np, "mps,buck-phase-delay", &val); + if (!ret) { + regmap_update_bits(config->regmap, + mpq7920_buck1_reg_c + (rdesc->id * 4), + mpq7920_mask_buck_phase_dealy, + (val & 3) << 4); + } + + ret = of_property_read_u8(np, "mps,buck-softstart", &val); + if (!ret) + rdesc->soft_start_val_on = (val & 3) << 2; + + return 0; +} + +static void mpq7920_parse_dt(struct device *dev, + struct mpq7920_regulator_info *info) +{ + int ret; + struct device_node *np = dev->of_node; + uint8_t freq; + + np = of_get_child_by_name(np, "regulators"); + if (!np) { + dev_err(dev, "missing 'regulators' subnode in dt "); + return; + } + + ret = of_property_read_u8(np, "mps,switch-freq", &freq); + if (!ret) { + regmap_update_bits(info->regmap, mpq7920_reg_ctl0, + mpq7920_mask_switch_freq, + (freq & 3) << 4); + } + + of_node_put(np); +} + +static inline int mpq7920_regulator_register( + struct mpq7920_regulator_info *info, + struct regulator_config *config) +{ + int i; + struct regulator_desc *rdesc; + + for (i = 0; i < mpq7920_max_regulators; i++) { + rdesc = &info->rdesc[i]; + + info->rdev[i] = devm_regulator_register(info->dev, rdesc, + config); + if (is_err(info->rdev)) + return ptr_err(info->rdev); + } + + return 0; +} + +static int mpq7920_i2c_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct device *dev = &client->dev; + struct mpq7920_regulator_info *info; + struct regulator_config config = { null, }; + struct regmap *regmap; + int ret; + + info = devm_kzalloc(dev, sizeof(struct mpq7920_regulator_info), + gfp_kernel); + if (!info) + return -enomem; + + info->dev = dev; + info->rdesc = mpq7920_regulators_desc; + regmap = devm_regmap_init_i2c(client, &mpq7920_regmap_config); + if (is_err(regmap)) { + dev_err(dev, "failed to allocate regmap! "); + return ptr_err(regmap); + } + + i2c_set_clientdata(client, info); + info->regmap = regmap; + if (client->dev.of_node) + mpq7920_parse_dt(&client->dev, info); + + config.dev = info->dev; + config.regmap = regmap; + config.driver_data = info; + + ret = mpq7920_regulator_register(info, &config); + if (ret < 0) + dev_err(dev, "failed to register regulator! "); + + return ret; +} + +static const struct of_device_id mpq7920_of_match[] = { + { .compatible = "mps,mpq7920"}, + {}, +}; +module_device_table(of, mpq7920_of_match); + +static const struct i2c_device_id mpq7920_id[] = { + { "mpq7920", }, + { }, +}; +module_device_table(i2c, mpq7920_id); + +static struct i2c_driver mpq7920_regulator_driver = { + .driver = { + .name = "mpq7920", + .of_match_table = of_match_ptr(mpq7920_of_match), + }, + .probe = mpq7920_i2c_probe, + .id_table = mpq7920_id, +}; +module_i2c_driver(mpq7920_regulator_driver); + +module_author("saravanan sekar <sravanhome@gmail.com>"); +module_description("mpq7920 pmic regulator driver"); +module_license("gpl"); diff --git a/drivers/regulator/mpq7920.h b/drivers/regulator/mpq7920.h --- /dev/null +++ b/drivers/regulator/mpq7920.h +/* spdx-license-identifier: gpl-2.0+ */ +/* + * mpq7920.h - regulator definitions for mpq7920 + * + * copyright 2019 monolithic power systems, inc + * + */ + +#ifndef __mpq7920_h__ +#define __mpq7920_h__ + +#define mpq7920_reg_ctl0 0x00 +#define mpq7920_reg_ctl1 0x01 +#define mpq7920_reg_ctl2 0x02 +#define mpq7920_buck1_reg_a 0x03 +#define mpq7920_buck1_reg_b 0x04 +#define mpq7920_buck1_reg_c 0x05 +#define mpq7920_buck1_reg_d 0x06 +#define mpq7920_buck2_reg_a 0x07 +#define mpq7920_buck2_reg_b 0x08 +#define mpq7920_buck2_reg_c 0x09 +#define mpq7920_buck2_reg_d 0x0a +#define mpq7920_buck3_reg_a 0x0b +#define mpq7920_buck3_reg_b 0x0c +#define mpq7920_buck3_reg_c 0x0d +#define mpq7920_buck3_reg_d 0x0e +#define mpq7920_buck4_reg_a 0x0f +#define mpq7920_buck4_reg_b 0x10 +#define mpq7920_buck4_reg_c 0x11 +#define mpq7920_buck4_reg_d 0x12 +#define mpq7920_ldo1_reg_a 0x13 +#define mpq7920_ldo1_reg_b 0x0 +#define mpq7920_ldo2_reg_a 0x14 +#define mpq7920_ldo2_reg_b 0x15 +#define mpq7920_ldo2_reg_c 0x16 +#define mpq7920_ldo3_reg_a 0x17 +#define mpq7920_ldo3_reg_b 0x18 +#define mpq7920_ldo3_reg_c 0x19 +#define mpq7920_ldo4_reg_a 0x1a +#define mpq7920_ldo4_reg_b 0x1b +#define mpq7920_ldo4_reg_c 0x1c +#define mpq7920_ldo5_reg_a 0x1d +#define mpq7920_ldo5_reg_b 0x1e +#define mpq7920_ldo5_reg_c 0x1f +#define mpq7920_reg_mode 0x20 +#define mpq7920_reg_regulator_en1 0x22 +#define mpq7920_reg_regulator_en 0x22 + +#define mpq7920_mask_vref 0x7f +#define mpq7920_mask_buck_ilim 0xd0 +#define mpq7920_mask_ldo_ilim bit(6) +#define mpq7920_mask_discharge bit(5) +#define mpq7920_mask_mode 0xc0 +#define mpq7920_mask_softstart 0x0c +#define mpq7920_mask_switch_freq 0x30 +#define mpq7920_mask_buck_phase_dealy 0x30 +#define mpq7920_mask_dvs_slewrate 0xc0 +#define mpq7920_discharge_on 0x1 + +#define mpq7920_regulator_en_offset 7 + +/* values in mv */ +#define mpq7920_buck_volt_min 400000 +#define mpq7920_ldo_volt_min 650000 +#define mpq7920_volt_max 3587500 +#define mpq7920_volt_step 12500 + +#endif /* __mpq7920_h__ */
|
Voltage, current regulators, power capping, power supply
|
6501c1f54a172fb0a4a9413eb62ab672ab3d8e7c
|
saravanan sekar
|
drivers
|
regulator
| |
rtc: at91rm9200: add sama5d4 and sama5d2 compatibles
|
both the sama5d4 and sama5d2 rtcs have more features than the previous rtcs, add a compatible string for them.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add sama5d4 and sama5d2 compatibles
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['at91rm9200']
|
['c', 'yaml']
| 2
| 8
| 0
|
--- diff --git a/documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml b/documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml --- a/documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml +++ b/documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml - atmel,at91rm9200-rtc - atmel,at91sam9x5-rtc + - atmel,sama5d4-rtc + - atmel,sama5d2-rtc - microchip,sam9x60-rtc diff --git a/drivers/rtc/rtc-at91rm9200.c b/drivers/rtc/rtc-at91rm9200.c --- a/drivers/rtc/rtc-at91rm9200.c +++ b/drivers/rtc/rtc-at91rm9200.c + }, { + .compatible = "atmel,sama5d4-rtc", + .data = &at91rm9200_config, + }, { + .compatible = "atmel,sama5d2-rtc", + .data = &at91rm9200_config,
|
Real Time Clock (RTC)
|
ca3fdc989c3cacf5b61a2334ca77ac29b0f5bc51
|
alexandre belloni
|
drivers
|
rtc
|
bindings, rtc
|
rtc: bd70528: add bd71828 support
|
rohm bd71828 pmic rtc block is from many parts similar to one on bd70528. support bd71828 rtc using bd70528 rtc driver and avoid re-inventing the wheel.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add bd71828 support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['bd70528']
|
['c', 'kconfig', 'h']
| 5
| 206
| 55
|
--- diff --git a/drivers/rtc/kconfig b/drivers/rtc/kconfig --- a/drivers/rtc/kconfig +++ b/drivers/rtc/kconfig + - on rohm bd70528 power management ic. + block on rohm bd70528 and bd71828 power management ic. diff --git a/drivers/rtc/rtc-bd70528.c b/drivers/rtc/rtc-bd70528.c --- a/drivers/rtc/rtc-bd70528.c +++ b/drivers/rtc/rtc-bd70528.c +#include <linux/mfd/rohm-bd71828.h> - * keep it u8 only to avoid padding issues. + * keep it u8 only (or packed) to avoid padding issues. +struct bd71828_rtc_alm { + struct bd70528_rtc_data alm0; + struct bd70528_rtc_data alm1; + u8 alm_mask; + u8 alm1_mask; +} __packed; + - struct rohm_regmap_dev *mfd; + struct rohm_regmap_dev *parent; + u8 reg_time_start; + bool has_rtc_timers; - ret = bd70528_wdt_set(r->mfd, new_state & bd70528_wdt_state_bit, + ret = bd70528_wdt_set(r->parent, new_state & bd70528_wdt_state_bit, - ret = bd70528_set_elapsed_tmr(r->mfd, + ret = bd70528_set_elapsed_tmr(r->parent, - ret = bd70528_set_wake(r->mfd, new_state & bd70528_wake_state_bit, + ret = bd70528_set_wake(r->parent, new_state & bd70528_wake_state_bit, + if (!r->has_rtc_timers) + return 0; + + if (!r->has_rtc_timers) + return 0; + +static int bd71828_set_alarm(struct device *dev, struct rtc_wkalrm *a) +{ + int ret; + struct bd71828_rtc_alm alm; + struct bd70528_rtc *r = dev_get_drvdata(dev); + struct rohm_regmap_dev *parent = r->parent; + + ret = regmap_bulk_read(parent->regmap, bd71828_reg_rtc_alm_start, + &alm, sizeof(alm)); + if (ret) { + dev_err(dev, "failed to read alarm regs "); + return ret; + } + + tm2rtc(&a->time, &alm.alm0); + + if (!a->enabled) + alm.alm_mask &= ~bd70528_mask_alm_en; + else + alm.alm_mask |= bd70528_mask_alm_en; + + ret = regmap_bulk_write(parent->regmap, bd71828_reg_rtc_alm_start, + &alm, sizeof(alm)); + if (ret) + dev_err(dev, "failed to set alarm time "); + + return ret; + +} + - struct rohm_regmap_dev *bd70528 = r->mfd; + struct rohm_regmap_dev *parent = r->parent; - ret = regmap_bulk_read(bd70528->regmap, bd70528_reg_rtc_wake_start, + ret = regmap_bulk_read(parent->regmap, bd70528_reg_rtc_wake_start, - ret = regmap_bulk_read(bd70528->regmap, bd70528_reg_rtc_alm_start, + ret = regmap_bulk_read(parent->regmap, bd70528_reg_rtc_alm_start, - ret = regmap_bulk_write(bd70528->regmap, + ret = regmap_bulk_write(parent->regmap, - ret = regmap_bulk_write(bd70528->regmap, bd70528_reg_rtc_alm_start, + ret = regmap_bulk_write(parent->regmap, bd70528_reg_rtc_alm_start, +static int bd71828_read_alarm(struct device *dev, struct rtc_wkalrm *a) +{ + int ret; + struct bd71828_rtc_alm alm; + struct bd70528_rtc *r = dev_get_drvdata(dev); + struct rohm_regmap_dev *parent = r->parent; + + ret = regmap_bulk_read(parent->regmap, bd71828_reg_rtc_alm_start, + &alm, sizeof(alm)); + if (ret) { + dev_err(dev, "failed to read alarm regs "); + return ret; + } + + rtc2tm(&alm.alm0, &a->time); + a->time.tm_mday = -1; + a->time.tm_mon = -1; + a->time.tm_year = -1; + a->enabled = !!(alm.alm_mask & bd70528_mask_alm_en); + a->pending = 0; + + return 0; +} + - struct rohm_regmap_dev *bd70528 = r->mfd; + struct rohm_regmap_dev *parent = r->parent; - ret = regmap_bulk_read(bd70528->regmap, bd70528_reg_rtc_alm_start, + ret = regmap_bulk_read(parent->regmap, bd70528_reg_rtc_alm_start, - struct rohm_regmap_dev *bd70528 = r->mfd; + struct rohm_regmap_dev *parent = r->parent; - tmpret = regmap_bulk_read(bd70528->regmap, - bd70528_reg_rtc_start, &rtc_data, + tmpret = regmap_bulk_read(parent->regmap, + r->reg_time_start, &rtc_data, - tmpret = regmap_bulk_write(bd70528->regmap, - bd70528_reg_rtc_start, &rtc_data, + tmpret = regmap_bulk_write(parent->regmap, + r->reg_time_start, &rtc_data, +static int bd71828_set_time(struct device *dev, struct rtc_time *t) +{ + return bd70528_set_time_locked(dev, t); +} + - bd70528_wdt_lock(r->mfd); + bd70528_wdt_lock(r->parent); - bd70528_wdt_unlock(r->mfd); + bd70528_wdt_unlock(r->parent); - struct rohm_regmap_dev *bd70528 = r->mfd; + struct rohm_regmap_dev *parent = r->parent; - ret = regmap_bulk_read(bd70528->regmap, - bd70528_reg_rtc_start, &rtc_data, + ret = regmap_bulk_read(parent->regmap, + r->reg_time_start, &rtc_data, - bd70528_wdt_lock(r->mfd); - ret = bd70528_set_wake(r->mfd, enabled, null); + bd70528_wdt_lock(r->parent); + ret = bd70528_set_wake(r->parent, enabled, null); - ret = regmap_update_bits(r->mfd->regmap, bd70528_reg_rtc_alm_mask, + ret = regmap_update_bits(r->parent->regmap, bd70528_reg_rtc_alm_mask, - bd70528_wdt_unlock(r->mfd); + bd70528_wdt_unlock(r->parent); + return ret; +} + +static int bd71828_alm_enable(struct device *dev, unsigned int enabled) +{ + int ret; + struct bd70528_rtc *r = dev_get_drvdata(dev); + unsigned int enableval = bd70528_mask_alm_en; + + if (!enabled) + enableval = 0; + + ret = regmap_update_bits(r->parent->regmap, bd71828_reg_rtc_alm0_mask, + bd70528_mask_alm_en, enableval); + if (ret) + dev_err(dev, "failed to change alarm state "); + +static const struct rtc_class_ops bd71828_rtc_ops = { + .read_time = bd70528_get_time, + .set_time = bd71828_set_time, + .read_alarm = bd71828_read_alarm, + .set_alarm = bd71828_set_alarm, + .alarm_irq_enable = bd71828_alm_enable, +}; + - struct rohm_regmap_dev *mfd; + const struct rtc_class_ops *rtc_ops; + struct rohm_regmap_dev *parent; + const char *irq_name; + bool enable_main_irq = false; + u8 hour_reg; + enum rohm_chip_type chip = platform_get_device_id(pdev)->driver_data; - mfd = dev_get_drvdata(pdev->dev.parent); - if (!mfd) { + parent = dev_get_drvdata(pdev->dev.parent); + if (!parent) { - bd_rtc->mfd = mfd; + bd_rtc->parent = parent; - irq = platform_get_irq_byname(pdev, "bd70528-rtc-alm"); - if (irq < 0) + switch (chip) { + case rohm_chip_type_bd70528: + irq_name = "bd70528-rtc-alm"; + bd_rtc->has_rtc_timers = true; + bd_rtc->reg_time_start = bd70528_reg_rtc_start; + hour_reg = bd70528_reg_rtc_hour; + enable_main_irq = true; + rtc_ops = &bd70528_rtc_ops; + break; + case rohm_chip_type_bd71828: + irq_name = "bd71828-rtc-alm-0"; + bd_rtc->reg_time_start = bd71828_reg_rtc_start; + hour_reg = bd71828_reg_rtc_hour; + rtc_ops = &bd71828_rtc_ops; + break; + default: + dev_err(&pdev->dev, "unknown chip "); + return -enoent; + } + + irq = platform_get_irq_byname(pdev, irq_name); + + if (irq < 0) { + dev_err(&pdev->dev, "failed to get irq "); + } - ret = regmap_read(mfd->regmap, bd70528_reg_rtc_hour, &hr); + ret = regmap_read(parent->regmap, hour_reg, &hr); - ret = bd70528_get_time(&pdev->dev, &t); + ret = rtc_ops->read_time(&pdev->dev, &t); - ret = bd70528_set_time(&pdev->dev, &t); + ret = rtc_ops->set_time(&pdev->dev, &t); - rtc->ops = &bd70528_rtc_ops; + rtc->ops = rtc_ops; - ret = regmap_update_bits(mfd->regmap, + if (enable_main_irq) { + ret = regmap_update_bits(parent->regmap, - if (ret) { - dev_err(&pdev->dev, "failed to enable rtc interrupts "); - return ret; + if (ret) { + dev_err(&pdev->dev, "failed to enable rtc interrupts "); + return ret; + } +static const struct platform_device_id bd718x7_rtc_id[] = { + { "bd70528-rtc", rohm_chip_type_bd70528 }, + { "bd71828-rtc", rohm_chip_type_bd71828 }, + { }, +}; +module_device_table(platform, bd718x7_rtc_id); + + .id_table = bd718x7_rtc_id, -module_description("bd70528 rtc driver"); +module_description("rohm bd70528 and bd71828 pmic rtc driver"); diff --git a/include/linux/mfd/rohm-bd70528.h b/include/linux/mfd/rohm-bd70528.h --- a/include/linux/mfd/rohm-bd70528.h +++ b/include/linux/mfd/rohm-bd70528.h +#include <linux/mfd/rohm-shared.h> -#define bd70528_mask_rtc_sec 0x7f -#define bd70528_mask_rtc_minute 0x7f -#define bd70528_mask_rtc_hour_24h 0x80 -#define bd70528_mask_rtc_hour_pm 0x20 -#define bd70528_mask_rtc_hour 0x3f -#define bd70528_mask_rtc_day 0x3f -#define bd70528_mask_rtc_week 0x07 -#define bd70528_mask_rtc_month 0x1f -#define bd70528_mask_rtc_year 0xff -#define bd70528_mask_rtc_count_l 0x7f - -#define bd70528_mask_alm_en 0x7 diff --git a/include/linux/mfd/rohm-bd71828.h b/include/linux/mfd/rohm-bd71828.h --- a/include/linux/mfd/rohm-bd71828.h +++ b/include/linux/mfd/rohm-bd71828.h +#include <linux/mfd/rohm-shared.h> +#define bd71828_reg_rtc_alm_start bd71828_reg_rtc_alm0_sec +#define bd71828_reg_rtc_start bd71828_reg_rtc_sec - diff --git a/include/linux/mfd/rohm-shared.h b/include/linux/mfd/rohm-shared.h --- /dev/null +++ b/include/linux/mfd/rohm-shared.h +/* spdx-license-identifier: gpl-2.0-or-later */ +/* copyright (c) 2020 rohm semiconductors */ + + +#ifndef __linux_mfd_rohm_shared_h__ +#define __linux_mfd_rohm_shared_h__ + +/* rtc definitions shared between bd70528 and bd71828 */ + +#define bd70528_mask_rtc_sec 0x7f +#define bd70528_mask_rtc_minute 0x7f +#define bd70528_mask_rtc_hour_24h 0x80 +#define bd70528_mask_rtc_hour_pm 0x20 +#define bd70528_mask_rtc_hour 0x3f +#define bd70528_mask_rtc_day 0x3f +#define bd70528_mask_rtc_week 0x07 +#define bd70528_mask_rtc_month 0x1f +#define bd70528_mask_rtc_year 0xff +#define bd70528_mask_alm_en 0x7 + +#endif /* __linux_mfd_rohm_shared_h__ */
|
Real Time Clock (RTC)
|
fe5a591b7814ffbc90aff661aeb8264937002f54
|
matti vaittinen alexandre belloni alexandre belloni bootlin com
|
include
|
linux
|
mfd
|
rtc: rv3029: add rtc_vl_read and rtc_vl_clear support
|
the rv3029 can report three different conditions: power on, voltage dropped and data is lost and voltage is low and temperature compensation has stopped. the first two conditions amount to the same status, the rtc data is invalid.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['rv3029']
|
['c']
| 1
| 30
| 0
|
--- diff --git a/drivers/rtc/rtc-rv3029c2.c b/drivers/rtc/rtc-rv3029c2.c --- a/drivers/rtc/rtc-rv3029c2.c +++ b/drivers/rtc/rtc-rv3029c2.c +static int rv3029_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) +{ + struct rv3029_data *rv3029 = dev_get_drvdata(dev); + unsigned long vl = 0; + int sr, ret = 0; + + switch (cmd) { + case rtc_vl_read: + ret = regmap_read(rv3029->regmap, rv3029_status, &sr); + if (ret < 0) + return ret; + + if (sr & rv3029_status_vlow1) + vl = rtc_vl_accuracy_low; + + if (sr & (rv3029_status_vlow2 | rv3029_status_pon)) + vl |= rtc_vl_data_invalid; + + return put_user(vl, (unsigned int __user *)arg); + + case rtc_vl_clr: + return regmap_update_bits(rv3029->regmap, rv3029_status, + rv3029_status_vlow1, 0); + + default: + return -enoioctlcmd; + } +} + + .ioctl = rv3029_ioctl,
|
Real Time Clock (RTC)
|
f630f728a9b114865bcfe16c1d91dff11e89a4b9
|
alexandre belloni
|
drivers
|
rtc
| |
rtc: rv3029: add nvram support
|
export the 8 byte ram using nvmem.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add nvram support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['rv3029']
|
['c']
| 1
| 31
| 5
|
--- diff --git a/drivers/rtc/rtc-rv3029c2.c b/drivers/rtc/rtc-rv3029c2.c --- a/drivers/rtc/rtc-rv3029c2.c +++ b/drivers/rtc/rtc-rv3029c2.c -#define rv3029_usr1_ram_page 0x38 -#define rv3029_usr1_section_len 0x04 -#define rv3029_usr2_ram_page 0x3c -#define rv3029_usr2_section_len 0x04 +#define rv3029_ram_page 0x38 +#define rv3029_ram_section_len 8 +static int rv3029_nvram_write(void *priv, unsigned int offset, void *val, + size_t bytes) +{ + return regmap_bulk_write(priv, rv3029_ram_page + offset, val, bytes); +} + +static int rv3029_nvram_read(void *priv, unsigned int offset, void *val, + size_t bytes) +{ + return regmap_bulk_read(priv, rv3029_ram_page + offset, val, bytes); +} + + struct nvmem_config nvmem_cfg = { + .name = "rv3029_nvram", + .word_size = 1, + .stride = 1, + .size = rv3029_ram_section_len, + .type = nvmem_type_battery_backed, + .reg_read = rv3029_nvram_read, + .reg_write = rv3029_nvram_write, + }; - return rtc_register_device(rv3029->rtc); + rc = rtc_register_device(rv3029->rtc); + if (rc) + return rc; + + nvmem_cfg.priv = rv3029->regmap; + rtc_nvmem_register(rv3029->rtc, &nvmem_cfg); + + return 0;
|
Real Time Clock (RTC)
|
ec923fcccf9b7d123f36f181b9088e1501b5a211
|
alexandre belloni
|
drivers
|
rtc
| |
pinctrl: ingenic: add missing parts for x1000 and x1500.
|
1.add pinctrl drivers for the spi flash controller (sfc) of x1000 and x1500. 2.add pinctrl driver for the synchronous serial interface (ssi) of x1000.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add missing parts for x1000 and x1500
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['ingenic']
|
['c']
| 1
| 64
| 0
|
--- diff --git a/drivers/pinctrl/pinctrl-ingenic.c b/drivers/pinctrl/pinctrl-ingenic.c --- a/drivers/pinctrl/pinctrl-ingenic.c +++ b/drivers/pinctrl/pinctrl-ingenic.c +static int x1000_sfc_pins[] = { 0x1d, 0x1c, 0x1e, 0x1f, 0x1a, 0x1b, }; +static int x1000_ssi_dt_a_22_pins[] = { 0x16, }; +static int x1000_ssi_dt_a_29_pins[] = { 0x1d, }; +static int x1000_ssi_dt_d_pins[] = { 0x62, }; +static int x1000_ssi_dr_a_23_pins[] = { 0x17, }; +static int x1000_ssi_dr_a_28_pins[] = { 0x1c, }; +static int x1000_ssi_dr_d_pins[] = { 0x63, }; +static int x1000_ssi_clk_a_24_pins[] = { 0x18, }; +static int x1000_ssi_clk_a_26_pins[] = { 0x1a, }; +static int x1000_ssi_clk_d_pins[] = { 0x60, }; +static int x1000_ssi_gpc_a_20_pins[] = { 0x14, }; +static int x1000_ssi_gpc_a_31_pins[] = { 0x1f, }; +static int x1000_ssi_ce0_a_25_pins[] = { 0x19, }; +static int x1000_ssi_ce0_a_27_pins[] = { 0x1b, }; +static int x1000_ssi_ce0_d_pins[] = { 0x61, }; +static int x1000_ssi_ce1_a_21_pins[] = { 0x15, }; +static int x1000_ssi_ce1_a_30_pins[] = { 0x1e, }; +static int x1000_sfc_funcs[] = { 1, 1, 1, 1, 1, 1, }; +static int x1000_ssi_dt_a_22_funcs[] = { 2, }; +static int x1000_ssi_dt_a_29_funcs[] = { 2, }; +static int x1000_ssi_dt_d_funcs[] = { 0, }; +static int x1000_ssi_dr_a_23_funcs[] = { 2, }; +static int x1000_ssi_dr_a_28_funcs[] = { 2, }; +static int x1000_ssi_dr_d_funcs[] = { 0, }; +static int x1000_ssi_clk_a_24_funcs[] = { 2, }; +static int x1000_ssi_clk_a_26_funcs[] = { 2, }; +static int x1000_ssi_clk_d_funcs[] = { 0, }; +static int x1000_ssi_gpc_a_20_funcs[] = { 2, }; +static int x1000_ssi_gpc_a_31_funcs[] = { 2, }; +static int x1000_ssi_ce0_a_25_funcs[] = { 2, }; +static int x1000_ssi_ce0_a_27_funcs[] = { 2, }; +static int x1000_ssi_ce0_d_funcs[] = { 0, }; +static int x1000_ssi_ce1_a_21_funcs[] = { 2, }; +static int x1000_ssi_ce1_a_30_funcs[] = { 2, }; + ingenic_pin_group("sfc", x1000_sfc), + ingenic_pin_group("ssi-dt-a-22", x1000_ssi_dt_a_22), + ingenic_pin_group("ssi-dt-a-29", x1000_ssi_dt_a_29), + ingenic_pin_group("ssi-dt-d", x1000_ssi_dt_d), + ingenic_pin_group("ssi-dr-a-23", x1000_ssi_dr_a_23), + ingenic_pin_group("ssi-dr-a-28", x1000_ssi_dr_a_28), + ingenic_pin_group("ssi-dr-d", x1000_ssi_dr_d), + ingenic_pin_group("ssi-clk-a-24", x1000_ssi_clk_a_24), + ingenic_pin_group("ssi-clk-a-26", x1000_ssi_clk_a_26), + ingenic_pin_group("ssi-clk-d", x1000_ssi_clk_d), + ingenic_pin_group("ssi-gpc-a-20", x1000_ssi_gpc_a_20), + ingenic_pin_group("ssi-gpc-a-31", x1000_ssi_gpc_a_31), + ingenic_pin_group("ssi-ce0-a-25", x1000_ssi_ce0_a_25), + ingenic_pin_group("ssi-ce0-a-27", x1000_ssi_ce0_a_27), + ingenic_pin_group("ssi-ce0-d", x1000_ssi_ce0_d), + ingenic_pin_group("ssi-ce1-a-21", x1000_ssi_ce1_a_21), + ingenic_pin_group("ssi-ce1-a-30", x1000_ssi_ce1_a_30), +static const char *x1000_sfc_groups[] = { "sfc", }; +static const char *x1000_ssi_groups[] = { + "ssi-dt-a-22", "ssi-dt-a-29", "ssi-dt-d", + "ssi-dr-a-23", "ssi-dr-a-28", "ssi-dr-d", + "ssi-clk-a-24", "ssi-clk-a-26", "ssi-clk-d", + "ssi-gpc-a-20", "ssi-gpc-a-31", + "ssi-ce0-a-25", "ssi-ce0-a-27", "ssi-ce0-d", + "ssi-ce1-a-21", "ssi-ce1-a-30", +}; + { "sfc", x1000_sfc_groups, array_size(x1000_sfc_groups), }, + { "ssi", x1000_ssi_groups, array_size(x1000_ssi_groups), }, + ingenic_pin_group("sfc", x1000_sfc), + { "sfc", x1000_sfc_groups, array_size(x1000_sfc_groups), },
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Pin Controllers (pinctrl)
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3b31e9b0eaaad3240110037a5572c891d11f8f83
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zhou yanjie
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drivers
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pinctrl
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pinctrl: ingenic: add pinctrl driver for x1830.
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add support for probing the pinctrl-ingenic driver on the x1830 soc from ingenic.
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this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
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add pinctrl driver for x1830
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['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
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['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
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['ingenic']
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['c']
| 1
| 265
| 15
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--- diff --git a/drivers/pinctrl/pinctrl-ingenic.c b/drivers/pinctrl/pinctrl-ingenic.c --- a/drivers/pinctrl/pinctrl-ingenic.c +++ b/drivers/pinctrl/pinctrl-ingenic.c - * copyright (c) 2019 zhou yanjie <zhouyanjie@zoho.com> + * copyright (c) 2019 (zhou yanjie) <zhouyanjie@wanyeetech.com> -#define x1000_gpio_pz_base 0x700 -#define x1000_gpio_pz_gid2ld 0x7f0 +#define x1830_gpio_pel 0x110 +#define x1830_gpio_peh 0x120 +#define reg_pz_base(x) ((x) * 7) +#define reg_pz_gid2ld(x) ((x) * 7 + 0xf0) + +#define gpio_pull_dis 0 +#define gpio_pull_up 1 +#define gpio_pull_down 2 + + id_x1830, +static const u32 x1830_pull_ups[4] = { + 0x5fdfffc0, 0xffffefff, 0x1ffffbff, 0x0fcff3fc, +}; + +static const u32 x1830_pull_downs[4] = { + 0x5fdfffc0, 0xffffefff, 0x1ffffbff, 0x0fcff3fc, +}; + +static int x1830_uart0_data_pins[] = { 0x33, 0x36, }; +static int x1830_uart0_hwflow_pins[] = { 0x34, 0x35, }; +static int x1830_uart1_data_pins[] = { 0x38, 0x37, }; +static int x1830_sfc_pins[] = { 0x17, 0x18, 0x1a, 0x19, 0x1b, 0x1c, }; +static int x1830_ssi0_dt_pins[] = { 0x4c, }; +static int x1830_ssi0_dr_pins[] = { 0x4b, }; +static int x1830_ssi0_clk_pins[] = { 0x4f, }; +static int x1830_ssi0_gpc_pins[] = { 0x4d, }; +static int x1830_ssi0_ce0_pins[] = { 0x50, }; +static int x1830_ssi0_ce1_pins[] = { 0x4e, }; +static int x1830_ssi1_dt_c_pins[] = { 0x53, }; +static int x1830_ssi1_dr_c_pins[] = { 0x54, }; +static int x1830_ssi1_clk_c_pins[] = { 0x57, }; +static int x1830_ssi1_gpc_c_pins[] = { 0x55, }; +static int x1830_ssi1_ce0_c_pins[] = { 0x58, }; +static int x1830_ssi1_ce1_c_pins[] = { 0x56, }; +static int x1830_ssi1_dt_d_pins[] = { 0x62, }; +static int x1830_ssi1_dr_d_pins[] = { 0x63, }; +static int x1830_ssi1_clk_d_pins[] = { 0x66, }; +static int x1830_ssi1_gpc_d_pins[] = { 0x64, }; +static int x1830_ssi1_ce0_d_pins[] = { 0x67, }; +static int x1830_ssi1_ce1_d_pins[] = { 0x65, }; +static int x1830_mmc0_1bit_pins[] = { 0x24, 0x25, 0x20, }; +static int x1830_mmc0_4bit_pins[] = { 0x21, 0x22, 0x23, }; +static int x1830_mmc1_1bit_pins[] = { 0x42, 0x43, 0x44, }; +static int x1830_mmc1_4bit_pins[] = { 0x45, 0x46, 0x47, }; +static int x1830_i2c0_pins[] = { 0x0c, 0x0d, }; +static int x1830_i2c1_pins[] = { 0x39, 0x3a, }; +static int x1830_i2c2_pins[] = { 0x5b, 0x5c, }; +static int x1830_pwm_pwm0_b_pins[] = { 0x31, }; +static int x1830_pwm_pwm0_c_pins[] = { 0x4b, }; +static int x1830_pwm_pwm1_b_pins[] = { 0x32, }; +static int x1830_pwm_pwm1_c_pins[] = { 0x4c, }; +static int x1830_pwm_pwm2_c_8_pins[] = { 0x48, }; +static int x1830_pwm_pwm2_c_13_pins[] = { 0x4d, }; +static int x1830_pwm_pwm3_c_9_pins[] = { 0x49, }; +static int x1830_pwm_pwm3_c_14_pins[] = { 0x4e, }; +static int x1830_pwm_pwm4_c_15_pins[] = { 0x4f, }; +static int x1830_pwm_pwm4_c_25_pins[] = { 0x59, }; +static int x1830_pwm_pwm5_c_16_pins[] = { 0x50, }; +static int x1830_pwm_pwm5_c_26_pins[] = { 0x5a, }; +static int x1830_pwm_pwm6_c_17_pins[] = { 0x51, }; +static int x1830_pwm_pwm6_c_27_pins[] = { 0x5b, }; +static int x1830_pwm_pwm7_c_18_pins[] = { 0x52, }; +static int x1830_pwm_pwm7_c_28_pins[] = { 0x5c, }; +static int x1830_mac_pins[] = { + 0x29, 0x30, 0x2f, 0x28, 0x2e, 0x2d, 0x2a, 0x2b, 0x26, 0x27, +}; + +static int x1830_uart0_data_funcs[] = { 0, 0, }; +static int x1830_uart0_hwflow_funcs[] = { 0, 0, }; +static int x1830_uart1_data_funcs[] = { 0, 0, }; +static int x1830_sfc_funcs[] = { 1, 1, 1, 1, 1, 1, }; +static int x1830_ssi0_dt_funcs[] = { 0, }; +static int x1830_ssi0_dr_funcs[] = { 0, }; +static int x1830_ssi0_clk_funcs[] = { 0, }; +static int x1830_ssi0_gpc_funcs[] = { 0, }; +static int x1830_ssi0_ce0_funcs[] = { 0, }; +static int x1830_ssi0_ce1_funcs[] = { 0, }; +static int x1830_ssi1_dt_c_funcs[] = { 1, }; +static int x1830_ssi1_dr_c_funcs[] = { 1, }; +static int x1830_ssi1_clk_c_funcs[] = { 1, }; +static int x1830_ssi1_gpc_c_funcs[] = { 1, }; +static int x1830_ssi1_ce0_c_funcs[] = { 1, }; +static int x1830_ssi1_ce1_c_funcs[] = { 1, }; +static int x1830_ssi1_dt_d_funcs[] = { 2, }; +static int x1830_ssi1_dr_d_funcs[] = { 2, }; +static int x1830_ssi1_clk_d_funcs[] = { 2, }; +static int x1830_ssi1_gpc_d_funcs[] = { 2, }; +static int x1830_ssi1_ce0_d_funcs[] = { 2, }; +static int x1830_ssi1_ce1_d_funcs[] = { 2, }; +static int x1830_mmc0_1bit_funcs[] = { 0, 0, 0, }; +static int x1830_mmc0_4bit_funcs[] = { 0, 0, 0, }; +static int x1830_mmc1_1bit_funcs[] = { 0, 0, 0, }; +static int x1830_mmc1_4bit_funcs[] = { 0, 0, 0, }; +static int x1830_i2c0_funcs[] = { 1, 1, }; +static int x1830_i2c1_funcs[] = { 0, 0, }; +static int x1830_i2c2_funcs[] = { 1, 1, }; +static int x1830_pwm_pwm0_b_funcs[] = { 0, }; +static int x1830_pwm_pwm0_c_funcs[] = { 1, }; +static int x1830_pwm_pwm1_b_funcs[] = { 0, }; +static int x1830_pwm_pwm1_c_funcs[] = { 1, }; +static int x1830_pwm_pwm2_c_8_funcs[] = { 0, }; +static int x1830_pwm_pwm2_c_13_funcs[] = { 1, }; +static int x1830_pwm_pwm3_c_9_funcs[] = { 0, }; +static int x1830_pwm_pwm3_c_14_funcs[] = { 1, }; +static int x1830_pwm_pwm4_c_15_funcs[] = { 1, }; +static int x1830_pwm_pwm4_c_25_funcs[] = { 0, }; +static int x1830_pwm_pwm5_c_16_funcs[] = { 1, }; +static int x1830_pwm_pwm5_c_26_funcs[] = { 0, }; +static int x1830_pwm_pwm6_c_17_funcs[] = { 1, }; +static int x1830_pwm_pwm6_c_27_funcs[] = { 0, }; +static int x1830_pwm_pwm7_c_18_funcs[] = { 1, }; +static int x1830_pwm_pwm7_c_28_funcs[] = { 0, }; +static int x1830_mac_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }; + +static const struct group_desc x1830_groups[] = { + ingenic_pin_group("uart0-data", x1830_uart0_data), + ingenic_pin_group("uart0-hwflow", x1830_uart0_hwflow), + ingenic_pin_group("uart1-data", x1830_uart1_data), + ingenic_pin_group("sfc", x1830_sfc), + ingenic_pin_group("ssi0-dt", x1830_ssi0_dt), + ingenic_pin_group("ssi0-dr", x1830_ssi0_dr), + ingenic_pin_group("ssi0-clk", x1830_ssi0_clk), + ingenic_pin_group("ssi0-gpc", x1830_ssi0_gpc), + ingenic_pin_group("ssi0-ce0", x1830_ssi0_ce0), + ingenic_pin_group("ssi0-ce1", x1830_ssi0_ce1), + ingenic_pin_group("ssi1-dt-c", x1830_ssi1_dt_c), + ingenic_pin_group("ssi1-dr-c", x1830_ssi1_dr_c), + ingenic_pin_group("ssi1-clk-c", x1830_ssi1_clk_c), + ingenic_pin_group("ssi1-gpc-c", x1830_ssi1_gpc_c), + ingenic_pin_group("ssi1-ce0-c", x1830_ssi1_ce0_c), + ingenic_pin_group("ssi1-ce1-c", x1830_ssi1_ce1_c), + ingenic_pin_group("ssi1-dt-d", x1830_ssi1_dt_d), + ingenic_pin_group("ssi1-dr-d", x1830_ssi1_dr_d), + ingenic_pin_group("ssi1-clk-d", x1830_ssi1_clk_d), + ingenic_pin_group("ssi1-gpc-d", x1830_ssi1_gpc_d), + ingenic_pin_group("ssi1-ce0-d", x1830_ssi1_ce0_d), + ingenic_pin_group("ssi1-ce1-d", x1830_ssi1_ce1_d), + ingenic_pin_group("mmc0-1bit", x1830_mmc0_1bit), + ingenic_pin_group("mmc0-4bit", x1830_mmc0_4bit), + ingenic_pin_group("mmc1-1bit", x1830_mmc1_1bit), + ingenic_pin_group("mmc1-4bit", x1830_mmc1_4bit), + ingenic_pin_group("i2c0-data", x1830_i2c0), + ingenic_pin_group("i2c1-data", x1830_i2c1), + ingenic_pin_group("i2c2-data", x1830_i2c2), + ingenic_pin_group("pwm0-b", x1830_pwm_pwm0_b), + ingenic_pin_group("pwm0-c", x1830_pwm_pwm0_c), + ingenic_pin_group("pwm1-b", x1830_pwm_pwm1_b), + ingenic_pin_group("pwm1-c", x1830_pwm_pwm1_c), + ingenic_pin_group("pwm2-c-8", x1830_pwm_pwm2_c_8), + ingenic_pin_group("pwm2-c-13", x1830_pwm_pwm2_c_13), + ingenic_pin_group("pwm3-c-9", x1830_pwm_pwm3_c_9), + ingenic_pin_group("pwm3-c-14", x1830_pwm_pwm3_c_14), + ingenic_pin_group("pwm4-c-15", x1830_pwm_pwm4_c_15), + ingenic_pin_group("pwm4-c-25", x1830_pwm_pwm4_c_25), + ingenic_pin_group("pwm5-c-16", x1830_pwm_pwm5_c_16), + ingenic_pin_group("pwm5-c-26", x1830_pwm_pwm5_c_26), + ingenic_pin_group("pwm6-c-17", x1830_pwm_pwm6_c_17), + ingenic_pin_group("pwm6-c-27", x1830_pwm_pwm6_c_27), + ingenic_pin_group("pwm7-c-18", x1830_pwm_pwm7_c_18), + ingenic_pin_group("pwm7-c-28", x1830_pwm_pwm7_c_28), + ingenic_pin_group("mac", x1830_mac), +}; + +static const char *x1830_uart0_groups[] = { "uart0-data", "uart0-hwflow", }; +static const char *x1830_uart1_groups[] = { "uart1-data", }; +static const char *x1830_sfc_groups[] = { "sfc", }; +static const char *x1830_ssi0_groups[] = { + "ssi0-dt", "ssi0-dr", "ssi0-clk", "ssi0-gpc", "ssi0-ce0", "ssi0-ce1", +}; +static const char *x1830_ssi1_groups[] = { + "ssi1-dt-c", "ssi1-dt-d", + "ssi1-dr-c", "ssi1-dr-d", + "ssi1-clk-c", "ssi1-clk-d", + "ssi1-gpc-c", "ssi1-gpc-d", + "ssi1-ce0-c", "ssi1-ce0-d", + "ssi1-ce1-c", "ssi1-ce1-d", +}; +static const char *x1830_mmc0_groups[] = { "mmc0-1bit", "mmc0-4bit", }; +static const char *x1830_mmc1_groups[] = { "mmc1-1bit", "mmc1-4bit", }; +static const char *x1830_i2c0_groups[] = { "i2c0-data", }; +static const char *x1830_i2c1_groups[] = { "i2c1-data", }; +static const char *x1830_i2c2_groups[] = { "i2c2-data", }; +static const char *x1830_pwm0_groups[] = { "pwm0-b", "pwm0-c", }; +static const char *x1830_pwm1_groups[] = { "pwm1-b", "pwm1-c", }; +static const char *x1830_pwm2_groups[] = { "pwm2-c-8", "pwm2-c-13", }; +static const char *x1830_pwm3_groups[] = { "pwm3-c-9", "pwm3-c-14", }; +static const char *x1830_pwm4_groups[] = { "pwm4-c-15", "pwm4-c-25", }; +static const char *x1830_pwm5_groups[] = { "pwm5-c-16", "pwm5-c-26", }; +static const char *x1830_pwm6_groups[] = { "pwm6-c-17", "pwm6-c-27", }; +static const char *x1830_pwm7_groups[] = { "pwm7-c-18", "pwm7-c-28", }; +static const char *x1830_mac_groups[] = { "mac", }; + +static const struct function_desc x1830_functions[] = { + { "uart0", x1830_uart0_groups, array_size(x1830_uart0_groups), }, + { "uart1", x1830_uart1_groups, array_size(x1830_uart1_groups), }, + { "sfc", x1830_sfc_groups, array_size(x1830_sfc_groups), }, + { "ssi0", x1830_ssi0_groups, array_size(x1830_ssi0_groups), }, + { "ssi1", x1830_ssi1_groups, array_size(x1830_ssi1_groups), }, + { "mmc0", x1830_mmc0_groups, array_size(x1830_mmc0_groups), }, + { "mmc1", x1830_mmc1_groups, array_size(x1830_mmc1_groups), }, + { "i2c0", x1830_i2c0_groups, array_size(x1830_i2c0_groups), }, + { "i2c1", x1830_i2c1_groups, array_size(x1830_i2c1_groups), }, + { "i2c2", x1830_i2c2_groups, array_size(x1830_i2c2_groups), }, + { "pwm0", x1830_pwm0_groups, array_size(x1830_pwm0_groups), }, + { "pwm1", x1830_pwm1_groups, array_size(x1830_pwm1_groups), }, + { "pwm2", x1830_pwm2_groups, array_size(x1830_pwm2_groups), }, + { "pwm3", x1830_pwm3_groups, array_size(x1830_pwm3_groups), }, + { "pwm4", x1830_pwm4_groups, array_size(x1830_pwm4_groups), }, + { "pwm5", x1830_pwm5_groups, array_size(x1830_pwm4_groups), }, + { "pwm6", x1830_pwm6_groups, array_size(x1830_pwm4_groups), }, + { "pwm7", x1830_pwm7_groups, array_size(x1830_pwm4_groups), }, + { "mac", x1830_mac_groups, array_size(x1830_mac_groups), }, +}; + +static const struct ingenic_chip_info x1830_chip_info = { + .num_chips = 4, + .reg_offset = 0x1000, + .groups = x1830_groups, + .num_groups = array_size(x1830_groups), + .functions = x1830_functions, + .num_functions = array_size(x1830_functions), + .pull_ups = x1830_pull_ups, + .pull_downs = x1830_pull_downs, +}; + - regmap_write(jzgc->jzpc->map, x1000_gpio_pz_base + reg, bit(offset)); + regmap_write(jzgc->jzpc->map, reg_pz_base( + jzgc->jzpc->info->reg_offset) + reg, bit(offset)); - regmap_write(jzgc->jzpc->map, x1000_gpio_pz_gid2ld, + regmap_write(jzgc->jzpc->map, reg_pz_gid2ld( + jzgc->jzpc->info->reg_offset), - regmap_write(jzpc->map, x1000_gpio_pz_gid2ld, pin / pins_per_gpio_chip); + regmap_write(jzpc->map, reg_pz_gid2ld(jzpc->info->reg_offset), + pin / pins_per_gpio_chip); - unsigned int pin, bool enabled) + unsigned int pin, unsigned int bias) - if (jzpc->version >= id_jz4760) - ingenic_config_pin(jzpc, pin, jz4760_gpio_pen, !enabled); - else - ingenic_config_pin(jzpc, pin, jz4740_gpio_pull_dis, !enabled); + if (jzpc->version >= id_x1830) { + unsigned int idx = pin % pins_per_gpio_chip; + unsigned int half = pins_per_gpio_chip / 2; + unsigned int idxh = pin % half * 2; + unsigned int offt = pin / pins_per_gpio_chip; + + if (idx < half) { + regmap_write(jzpc->map, offt * jzpc->info->reg_offset + + reg_clear(x1830_gpio_pel), 3 << idxh); + regmap_write(jzpc->map, offt * jzpc->info->reg_offset + + reg_set(x1830_gpio_pel), bias << idxh); + } else { + regmap_write(jzpc->map, offt * jzpc->info->reg_offset + + reg_clear(x1830_gpio_peh), 3 << idxh); + regmap_write(jzpc->map, offt * jzpc->info->reg_offset + + reg_set(x1830_gpio_peh), bias << idxh); + } + + } else if (jzpc->version >= id_jz4760) { + ingenic_config_pin(jzpc, pin, jz4760_gpio_pen, !bias); + } else { + ingenic_config_pin(jzpc, pin, jz4740_gpio_pull_dis, !bias); + } - ingenic_set_bias(jzpc, pin, false); + ingenic_set_bias(jzpc, pin, gpio_pull_dis); - ingenic_set_bias(jzpc, pin, true); + ingenic_set_bias(jzpc, pin, gpio_pull_up); - ingenic_set_bias(jzpc, pin, true); + ingenic_set_bias(jzpc, pin, gpio_pull_down); + { .compatible = "ingenic,x1830-pinctrl", .data = (void *) id_x1830 }, + { .compatible = "ingenic,x1830-gpio", }, - if (jzpc->version >= id_x1500) + if (jzpc->version >= id_x1830) + chip_info = &x1830_chip_info; + else if (jzpc->version >= id_x1500) + { "x1830-pinctrl", id_x1830 },
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Pin Controllers (pinctrl)
|
d7da2a1e4e0840faced2891e1c5b668f9eea18f8
|
zhou yanjie
|
drivers
|
pinctrl
| |
pinctrl: aspeed-g6: add ast2600 pinconf support
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the ast2600 pinconf is a little different from previous generations of aspeed bmc socs in terms of architecture. the pull-down setting is per-pin setting now, and drive-strength support 4 kind of value (e.g. 4ma, 8ma, 12ma, 16ma).
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this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
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add ast2600 pinconf support
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['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
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['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
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['aspeed-g6']
|
['c', 'h']
| 2
| 297
| 0
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--- diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c --- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c +#define scu454 0x454 /* multi-function pin control #15 */ +#define scu458 0x458 /* multi-function pin control #16 */ +#define scu610 0x610 /* disable gpio internal pull-down #0 */ +#define scu614 0x614 /* disable gpio internal pull-down #1 */ +#define scu618 0x618 /* disable gpio internal pull-down #2 */ +#define scu61c 0x61c /* disable gpio internal pull-down #3 */ +#define scu620 0x620 /* disable gpio internal pull-down #4 */ +#define scu634 0x634 /* disable gpio internal pull-down #5 */ +#define scu638 0x638 /* disable gpio internal pull-down #6 */ +static struct aspeed_pin_config aspeed_g6_configs[] = { + /* gpiob7 */ + aspeed_pull_down_pinconf(j24, scu610, 15), + /* gpiob6 */ + aspeed_pull_down_pinconf(h25, scu610, 14), + /* gpiob5 */ + aspeed_pull_down_pinconf(g26, scu610, 13), + /* gpiob4 */ + aspeed_pull_down_pinconf(j23, scu610, 12), + /* gpiob3 */ + aspeed_pull_down_pinconf(j25, scu610, 11), + /* gpiob2 */ + aspeed_pull_down_pinconf(h26, scu610, 10), + /* gpiob1 */ + aspeed_pull_down_pinconf(k23, scu610, 9), + /* gpiob0 */ + aspeed_pull_down_pinconf(j26, scu610, 8), + + /* gpioh3 */ + aspeed_pull_down_pinconf(a17, scu614, 27), + /* gpioh2 */ + aspeed_pull_down_pinconf(c18, scu614, 26), + /* gpioh1 */ + aspeed_pull_down_pinconf(b18, scu614, 25), + /* gpioh0 */ + aspeed_pull_down_pinconf(a18, scu614, 24), + + /* gpiol7 */ + aspeed_pull_down_pinconf(c14, scu618, 31), + /* gpiol6 */ + aspeed_pull_down_pinconf(b14, scu618, 30), + /* gpiol5 */ + aspeed_pull_down_pinconf(f15, scu618, 29), + /* gpiol4 */ + aspeed_pull_down_pinconf(c15, scu618, 28), + + /* gpioj7 */ + aspeed_pull_up_pinconf(d19, scu618, 15), + /* gpioj6 */ + aspeed_pull_up_pinconf(c20, scu618, 14), + /* gpioj5 */ + aspeed_pull_up_pinconf(a19, scu618, 13), + /* gpioj4 */ + aspeed_pull_up_pinconf(c19, scu618, 12), + /* gpioj3 */ + aspeed_pull_up_pinconf(d20, scu618, 11), + /* gpioj2 */ + aspeed_pull_up_pinconf(e19, scu618, 10), + /* gpioj1 */ + aspeed_pull_up_pinconf(a20, scu618, 9), + /* gpioj0 */ + aspeed_pull_up_pinconf(b20, scu618, 8), + + /* gpioi7 */ + aspeed_pull_down_pinconf(a15, scu618, 7), + /* gpioi6 */ + aspeed_pull_down_pinconf(b16, scu618, 6), + /* gpioi5 */ + aspeed_pull_down_pinconf(e16, scu618, 5), + /* gpioi4 */ + aspeed_pull_down_pinconf(c16, scu618, 4), + /* gpioi3 */ + aspeed_pull_down_pinconf(d16, scu618, 3), + /* gpioi2 */ + aspeed_pull_down_pinconf(e17, scu618, 2), + /* gpioi1 */ + aspeed_pull_down_pinconf(a16, scu618, 1), + /* gpioi0 */ + aspeed_pull_down_pinconf(d17, scu618, 0), + + /* gpiop7 */ + aspeed_pull_down_pinconf(y23, scu61c, 31), + /* gpiop6 */ + aspeed_pull_down_pinconf(ab24, scu61c, 30), + /* gpiop5 */ + aspeed_pull_down_pinconf(ab23, scu61c, 29), + /* gpiop4 */ + aspeed_pull_down_pinconf(w23, scu61c, 28), + /* gpiop3 */ + aspeed_pull_down_pinconf(aa24, scu61c, 27), + /* gpiop2 */ + aspeed_pull_down_pinconf(aa23, scu61c, 26), + /* gpiop1 */ + aspeed_pull_down_pinconf(w24, scu61c, 25), + /* gpiop0 */ + aspeed_pull_down_pinconf(ab22, scu61c, 24), + + /* gpioo7 */ + aspeed_pull_down_pinconf(ac23, scu61c, 23), + /* gpioo6 */ + aspeed_pull_down_pinconf(ac24, scu61c, 22), + /* gpioo5 */ + aspeed_pull_down_pinconf(ac22, scu61c, 21), + /* gpioo4 */ + aspeed_pull_down_pinconf(ad25, scu61c, 20), + /* gpioo3 */ + aspeed_pull_down_pinconf(ad24, scu61c, 19), + /* gpioo2 */ + aspeed_pull_down_pinconf(ad23, scu61c, 18), + /* gpioo1 */ + aspeed_pull_down_pinconf(ad22, scu61c, 17), + /* gpioo0 */ + aspeed_pull_down_pinconf(ad26, scu61c, 16), + + /* gpion7 */ + aspeed_pull_down_pinconf(m26, scu61c, 15), + /* gpion6 */ + aspeed_pull_down_pinconf(n26, scu61c, 14), + /* gpion5 */ + aspeed_pull_down_pinconf(m23, scu61c, 13), + /* gpion4 */ + aspeed_pull_down_pinconf(p26, scu61c, 12), + /* gpion3 */ + aspeed_pull_down_pinconf(n24, scu61c, 11), + /* gpion2 */ + aspeed_pull_down_pinconf(n25, scu61c, 10), + /* gpion1 */ + aspeed_pull_down_pinconf(n23, scu61c, 9), + /* gpion0 */ + aspeed_pull_down_pinconf(p25, scu61c, 8), + + /* gpiom7 */ + aspeed_pull_down_pinconf(d13, scu61c, 7), + /* gpiom6 */ + aspeed_pull_down_pinconf(c13, scu61c, 6), + /* gpiom5 */ + aspeed_pull_down_pinconf(c12, scu61c, 5), + /* gpiom4 */ + aspeed_pull_down_pinconf(b12, scu61c, 4), + /* gpiom3 */ + aspeed_pull_down_pinconf(e14, scu61c, 3), + /* gpiom2 */ + aspeed_pull_down_pinconf(a12, scu61c, 2), + /* gpiom1 */ + aspeed_pull_down_pinconf(b13, scu61c, 1), + /* gpiom0 */ + aspeed_pull_down_pinconf(d14, scu61c, 0), + + /* gpios7 */ + aspeed_pull_down_pinconf(t24, scu620, 23), + /* gpios6 */ + aspeed_pull_down_pinconf(p23, scu620, 22), + /* gpios5 */ + aspeed_pull_down_pinconf(p24, scu620, 21), + /* gpios4 */ + aspeed_pull_down_pinconf(r26, scu620, 20), + /* gpios3*/ + aspeed_pull_down_pinconf(r24, scu620, 19), + /* gpios2 */ + aspeed_pull_down_pinconf(t26, scu620, 18), + /* gpios1 */ + aspeed_pull_down_pinconf(t25, scu620, 17), + /* gpios0 */ + aspeed_pull_down_pinconf(r23, scu620, 16), + + /* gpior7 */ + aspeed_pull_down_pinconf(u26, scu620, 15), + /* gpior6 */ + aspeed_pull_down_pinconf(w26, scu620, 14), + /* gpior5 */ + aspeed_pull_down_pinconf(t23, scu620, 13), + /* gpior4 */ + aspeed_pull_down_pinconf(u25, scu620, 12), + /* gpior3*/ + aspeed_pull_down_pinconf(v26, scu620, 11), + /* gpior2 */ + aspeed_pull_down_pinconf(v24, scu620, 10), + /* gpior1 */ + aspeed_pull_down_pinconf(u24, scu620, 9), + /* gpior0 */ + aspeed_pull_down_pinconf(v25, scu620, 8), + + /* gpiox7 */ + aspeed_pull_down_pinconf(ab10, scu634, 31), + /* gpiox6 */ + aspeed_pull_down_pinconf(af9, scu634, 30), + /* gpiox5 */ + aspeed_pull_down_pinconf(ad9, scu634, 29), + /* gpiox4 */ + aspeed_pull_down_pinconf(ab9, scu634, 28), + /* gpiox3*/ + aspeed_pull_down_pinconf(af8, scu634, 27), + /* gpiox2 */ + aspeed_pull_down_pinconf(ac9, scu634, 26), + /* gpiox1 */ + aspeed_pull_down_pinconf(aa9, scu634, 25), + /* gpiox0 */ + aspeed_pull_down_pinconf(ae8, scu634, 24), + + /* gpiov7 */ + aspeed_pull_down_pinconf(af15, scu634, 15), + /* gpiov6 */ + aspeed_pull_down_pinconf(ad15, scu634, 14), + /* gpiov5 */ + aspeed_pull_down_pinconf(ae14, scu634, 13), + /* gpiov4 */ + aspeed_pull_down_pinconf(ae15, scu634, 12), + /* gpiov3*/ + aspeed_pull_down_pinconf(ac15, scu634, 11), + /* gpiov2 */ + aspeed_pull_down_pinconf(ad14, scu634, 10), + /* gpiov1 */ + aspeed_pull_down_pinconf(af14, scu634, 9), + /* gpiov0 */ + aspeed_pull_down_pinconf(ab15, scu634, 8), + + /* gpioz7 */ + aspeed_pull_down_pinconf(af10, scu638, 15), + /* gpioz6 */ + aspeed_pull_down_pinconf(ad11, scu638, 14), + /* gpioz5 */ + aspeed_pull_down_pinconf(aa11, scu638, 13), + /* gpioz4 */ + aspeed_pull_down_pinconf(ac11, scu638, 12), + /* gpioz3*/ + aspeed_pull_down_pinconf(ab11, scu638, 11), + + /* gpioz1 */ + aspeed_pull_down_pinconf(ad10, scu638, 9), + /* gpioz0 */ + aspeed_pull_down_pinconf(ac10, scu638, 8), + + /* gpioy6 */ + aspeed_pull_down_pinconf(ac12, scu638, 6), + /* gpioy5 */ + aspeed_pull_down_pinconf(af12, scu638, 5), + /* gpioy4 */ + aspeed_pull_down_pinconf(ae12, scu638, 4), + /* gpioy3 */ + aspeed_pull_down_pinconf(aa12, scu638, 3), + /* gpioy2 */ + aspeed_pull_down_pinconf(ae11, scu638, 2), + /* gpioy1 */ + aspeed_pull_down_pinconf(ad12, scu638, 1), + /* gpioy0 */ + aspeed_pull_down_pinconf(af11, scu638, 0), + + /* lad3 */ + { pin_config_drive_strength, { ac7, ac7 }, scu454, genmask(31, 30)}, + /* lad2 */ + { pin_config_drive_strength, { ac8, ac8 }, scu454, genmask(29, 28)}, + /* lad1 */ + { pin_config_drive_strength, { ab8, ab8 }, scu454, genmask(27, 26)}, + /* lad0 */ + { pin_config_drive_strength, { ab7, ab7 }, scu454, genmask(25, 24)}, + + /* mac3 */ + { pin_config_power_source, { h24, e26 }, scu458, bit_mask(4)}, + { pin_config_drive_strength, { h24, e26 }, scu458, genmask(1, 0)}, + /* mac4 */ + { pin_config_power_source, { f24, b24 }, scu458, bit_mask(5)}, + { pin_config_drive_strength, { f24, b24 }, scu458, genmask(3, 2)}, +}; + +static const struct aspeed_pin_config_map aspeed_g6_pin_config_map[] = { + { pin_config_bias_pull_down, 0, 1, bit_mask(0)}, + { pin_config_bias_pull_down, -1, 0, bit_mask(0)}, + { pin_config_bias_pull_up, 0, 1, bit_mask(0)}, + { pin_config_bias_pull_up, -1, 0, bit_mask(0)}, + { pin_config_bias_disable, -1, 1, bit_mask(0)}, + { pin_config_drive_strength, 4, 0, genmask(1, 0)}, + { pin_config_drive_strength, 8, 1, genmask(1, 0)}, + { pin_config_drive_strength, 12, 2, genmask(1, 0)}, + { pin_config_drive_strength, 16, 3, genmask(1, 0)}, + { pin_config_power_source, 3300, 0, bit_mask(0)}, + { pin_config_power_source, 1800, 1, bit_mask(0)}, +}; + + .configs = aspeed_g6_configs, + .nconfigs = array_size(aspeed_g6_configs), + .confmaps = aspeed_g6_pin_config_map, + .nconfmaps = array_size(aspeed_g6_pin_config_map), +static const struct pinconf_ops aspeed_g6_conf_ops = { + .is_generic = true, + .pin_config_get = aspeed_pin_config_get, + .pin_config_set = aspeed_pin_config_set, + .pin_config_group_get = aspeed_pin_config_group_get, + .pin_config_group_set = aspeed_pin_config_group_set, +}; + + .confops = &aspeed_g6_conf_ops, diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.h b/drivers/pinctrl/aspeed/pinctrl-aspeed.h --- a/drivers/pinctrl/aspeed/pinctrl-aspeed.h +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.h +#define aspeed_pull_down_pinconf(pin_, reg_, bit_) \ + aspeed_sb_pinconf(pin_config_bias_pull_down, pin_, pin_, reg_, bit_), \ + aspeed_sb_pinconf(pin_config_bias_disable, pin_, pin_, reg_, bit_) + +#define aspeed_pull_up_pinconf(pin_, reg_, bit_) \ + aspeed_sb_pinconf(pin_config_bias_pull_up, pin_, pin_, reg_, bit_), \ + aspeed_sb_pinconf(pin_config_bias_disable, pin_, pin_, reg_, bit_)
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Pin Controllers (pinctrl)
|
15711ba6ff197c3152c655dd9c55f5c1694e8272
|
johnny huang
|
drivers
|
pinctrl
|
aspeed
|
pinctrl: aspeed-g6: add support for the ast2600 usb pinmux
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ast2600 has two usb ports, a, b:
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this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
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add support for the ast2600 usb pinmux
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['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
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['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
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['aspeed-g6']
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['c', 'h']
| 2
| 69
| 1
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--- diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c --- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c +#define scu440 0x440 /* usb multi-function pin control #12 */ +#define scuc20 0xc20 /* pcie configuration setting control */ -#define aspeed_g6_nr_pins 252 +#define aspeed_g6_nr_pins 256 +#define usb2adp_desc { aspeed_ip_scu, scu440, genmask(25, 24), 0, 0 } +#define usb2ad_desc { aspeed_ip_scu, scu440, genmask(25, 24), 1, 0 } +#define usb2ah_desc { aspeed_ip_scu, scu440, genmask(25, 24), 2, 0 } +#define usb2ahp_desc { aspeed_ip_scu, scu440, genmask(25, 24), 3, 0 } +#define usb11bhid_desc { aspeed_ip_scu, scu440, genmask(29, 28), 0, 0 } +#define usb2bd_desc { aspeed_ip_scu, scu440, genmask(29, 28), 1, 0 } +#define usb2bh_desc { aspeed_ip_scu, scu440, genmask(29, 28), 2, 0 } + +#define a4 252 +sig_expr_list_decl_semg(a4, usb2adpdp, usba, usb2adp, usb2adp_desc, + sig_desc_set(scuc20, 16)); +sig_expr_list_decl_semg(a4, usb2addp, usba, usb2ad, usb2ad_desc); +sig_expr_list_decl_semg(a4, usb2ahdp, usba, usb2ah, usb2ah_desc); +sig_expr_list_decl_semg(a4, usb2ahpdp, usba, usb2ahp, usb2ahp_desc); +pin_decl_(a4, sig_expr_list_ptr(a4, usb2adpdp), sig_expr_list_ptr(a4, usb2addp), + sig_expr_list_ptr(a4, usb2ahdp)); + +#define b4 253 +sig_expr_list_decl_semg(b4, usb2adpdn, usba, usb2adp, usb2adp_desc); +sig_expr_list_decl_semg(b4, usb2addn, usba, usb2ad, usb2ad_desc); +sig_expr_list_decl_semg(b4, usb2ahdn, usba, usb2ah, usb2ah_desc); +sig_expr_list_decl_semg(b4, usb2ahpdn, usba, usb2ahp, usb2ahp_desc); +pin_decl_(b4, sig_expr_list_ptr(b4, usb2adpdn), sig_expr_list_ptr(b4, usb2addn), + sig_expr_list_ptr(b4, usb2ahdn)); + +group_decl(usba, a4, b4); + +func_decl_1(usb2adp, usba); +func_decl_1(usb2ad, usba); +func_decl_1(usb2ah, usba); +func_decl_1(usb2ahp, usba); + +#define a6 254 +sig_expr_list_decl_semg(a6, usb11bdp, usbb, usb11bhid, usb11bhid_desc); +sig_expr_list_decl_semg(a6, usb2bddp, usbb, usb2bd, usb2bd_desc); +sig_expr_list_decl_semg(a6, usb2bhdp, usbb, usb2bh, usb2bh_desc); +pin_decl_(a6, sig_expr_list_ptr(a6, usb11bdp), sig_expr_list_ptr(a6, usb2bddp), + sig_expr_list_ptr(a6, usb2bhdp)); + +#define b6 255 +sig_expr_list_decl_semg(b6, usb11bdn, usbb, usb11bhid, usb11bhid_desc); +sig_expr_list_decl_semg(b6, usb2bddn, usbb, usb2bd, usb2bd_desc); +sig_expr_list_decl_semg(b6, usb2bhdn, usbb, usb2bh, usb2bh_desc); +pin_decl_(b6, sig_expr_list_ptr(b6, usb11bdn), sig_expr_list_ptr(b6, usb2bddn), + sig_expr_list_ptr(b6, usb2bhdn)); + +group_decl(usbb, a6, b6); + +func_decl_1(usb11bhid, usbb); +func_decl_1(usb2bd, usbb); +func_decl_1(usb2bh, usbb); + + aspeed_pinctrl_pin(a4), + aspeed_pinctrl_pin(a6), + aspeed_pinctrl_pin(b4), + aspeed_pinctrl_pin(b6), + aspeed_pinctrl_group(usba), + aspeed_pinctrl_group(usbb), + aspeed_pinctrl_func(usb11bhid), + aspeed_pinctrl_func(usb2ad), + aspeed_pinctrl_func(usb2adp), + aspeed_pinctrl_func(usb2ah), + aspeed_pinctrl_func(usb2ahp), + aspeed_pinctrl_func(usb2bd), + aspeed_pinctrl_func(usb2bh), diff --git a/drivers/pinctrl/aspeed/pinmux-aspeed.h b/drivers/pinctrl/aspeed/pinmux-aspeed.h --- a/drivers/pinctrl/aspeed/pinmux-aspeed.h +++ b/drivers/pinctrl/aspeed/pinmux-aspeed.h +#define func_decl_1(func, group) func_decl_(func, #group)
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Pin Controllers (pinctrl)
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22d6919039838226d2041cc22e279985b4230f64
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johnny huang
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drivers
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pinctrl
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aspeed
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pinctrl: freescale: add i.mx8mp pinctrl driver support
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add the pinctrl driver support for i.mx8mp.
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this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
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add i.mx8mp pinctrl driver support
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['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
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['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
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['freescale']
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['c', 'kconfig', 'makefile']
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| 353
| 0
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--- diff --git a/drivers/pinctrl/freescale/kconfig b/drivers/pinctrl/freescale/kconfig --- a/drivers/pinctrl/freescale/kconfig +++ b/drivers/pinctrl/freescale/kconfig +config pinctrl_imx8mp + bool "imx8mp pinctrl driver" + depends on arch_mxc && arm64 + select pinctrl_imx + help + say y here to enable the imx8mp pinctrl driver + diff --git a/drivers/pinctrl/freescale/makefile b/drivers/pinctrl/freescale/makefile --- a/drivers/pinctrl/freescale/makefile +++ b/drivers/pinctrl/freescale/makefile +obj-$(config_pinctrl_imx8mp) += pinctrl-imx8mp.o diff --git a/drivers/pinctrl/freescale/pinctrl-imx8mp.c b/drivers/pinctrl/freescale/pinctrl-imx8mp.c --- /dev/null +++ b/drivers/pinctrl/freescale/pinctrl-imx8mp.c +// spdx-license-identifier: gpl-2.0 +/* + * copyright 2019 nxp + */ + +#include <linux/err.h> +#include <linux/init.h> +#include <linux/of.h> +#include <linux/pinctrl/pinctrl.h> +#include <linux/platform_device.h> + +#include "pinctrl-imx.h" + +enum imx8mp_pads { + mx8mp_iomuxc_reserve0 = 0, + mx8mp_iomuxc_reserve1 = 1, + mx8mp_iomuxc_reserve2 = 2, + mx8mp_iomuxc_reserve3 = 3, + mx8mp_iomuxc_reserve4 = 4, + mx8mp_iomuxc_gpio1_io00 = 5, + mx8mp_iomuxc_gpio1_io01 = 6, + mx8mp_iomuxc_gpio1_io02 = 7, + mx8mp_iomuxc_gpio1_io03 = 8, + mx8mp_iomuxc_gpio1_io04 = 9, + mx8mp_iomuxc_gpio1_io05 = 10, + mx8mp_iomuxc_gpio1_io06 = 11, + mx8mp_iomuxc_gpio1_io07 = 12, + mx8mp_iomuxc_gpio1_io08 = 13, + mx8mp_iomuxc_gpio1_io09 = 14, + mx8mp_iomuxc_gpio1_io10 = 15, + mx8mp_iomuxc_gpio1_io11 = 16, + mx8mp_iomuxc_gpio1_io12 = 17, + mx8mp_iomuxc_gpio1_io13 = 18, + mx8mp_iomuxc_gpio1_io14 = 19, + mx8mp_iomuxc_gpio1_io15 = 20, + mx8mp_iomuxc_enet_mdc = 21, + mx8mp_iomuxc_enet_mdio = 22, + mx8mp_iomuxc_enet_td3 = 23, + mx8mp_iomuxc_enet_td2 = 24, + mx8mp_iomuxc_enet_td1 = 25, + mx8mp_iomuxc_enet_td0 = 26, + mx8mp_iomuxc_enet_tx_ctl = 27, + mx8mp_iomuxc_enet_txc = 28, + mx8mp_iomuxc_enet_rx_ctl = 29, + mx8mp_iomuxc_enet_rxc = 30, + mx8mp_iomuxc_enet_rd0 = 31, + mx8mp_iomuxc_enet_rd1 = 32, + mx8mp_iomuxc_enet_rd2 = 33, + mx8mp_iomuxc_enet_rd3 = 34, + mx8mp_iomuxc_sd1_clk = 35, + mx8mp_iomuxc_sd1_cmd = 36, + mx8mp_iomuxc_sd1_data0 = 37, + mx8mp_iomuxc_sd1_data1 = 38, + mx8mp_iomuxc_sd1_data2 = 39, + mx8mp_iomuxc_sd1_data3 = 40, + mx8mp_iomuxc_sd1_data4 = 41, + mx8mp_iomuxc_sd1_data5 = 42, + mx8mp_iomuxc_sd1_data6 = 43, + mx8mp_iomuxc_sd1_data7 = 44, + mx8mp_iomuxc_sd1_reset_b = 45, + mx8mp_iomuxc_sd1_strobe = 46, + mx8mp_iomuxc_sd2_cd_b = 47, + mx8mp_iomuxc_sd2_clk = 48, + mx8mp_iomuxc_sd2_cmd = 49, + mx8mp_iomuxc_sd2_data0 = 50, + mx8mp_iomuxc_sd2_data1 = 51, + mx8mp_iomuxc_sd2_data2 = 52, + mx8mp_iomuxc_sd2_data3 = 53, + mx8mp_iomuxc_sd2_reset_b = 54, + mx8mp_iomuxc_sd2_wp = 55, + mx8mp_iomuxc_nand_ale = 56, + mx8mp_iomuxc_nand_ce0_b = 57, + mx8mp_iomuxc_nand_ce1_b = 58, + mx8mp_iomuxc_nand_ce2_b = 59, + mx8mp_iomuxc_nand_ce3_b = 60, + mx8mp_iomuxc_nand_cle = 61, + mx8mp_iomuxc_nand_data00 = 62, + mx8mp_iomuxc_nand_data01 = 63, + mx8mp_iomuxc_nand_data02 = 64, + mx8mp_iomuxc_nand_data03 = 65, + mx8mp_iomuxc_nand_data04 = 66, + mx8mp_iomuxc_nand_data05 = 67, + mx8mp_iomuxc_nand_data06 = 68, + mx8mp_iomuxc_nand_data07 = 69, + mx8mp_iomuxc_nand_dqs = 70, + mx8mp_iomuxc_nand_re_b = 71, + mx8mp_iomuxc_nand_ready_b = 72, + mx8mp_iomuxc_nand_we_b = 73, + mx8mp_iomuxc_nand_wp_b = 74, + mx8mp_iomuxc_sai5_rxfs = 75, + mx8mp_iomuxc_sai5_rxc = 76, + mx8mp_iomuxc_sai5_rxd0 = 77, + mx8mp_iomuxc_sai5_rxd1 = 78, + mx8mp_iomuxc_sai5_rxd2 = 79, + mx8mp_iomuxc_sai5_rxd3 = 80, + mx8mp_iomuxc_sai5_mclk = 81, + mx8mp_iomuxc_sai1_rxfs = 82, + mx8mp_iomuxc_sai1_rxc = 83, + mx8mp_iomuxc_sai1_rxd0 = 84, + mx8mp_iomuxc_sai1_rxd1 = 85, + mx8mp_iomuxc_sai1_rxd2 = 86, + mx8mp_iomuxc_sai1_rxd3 = 87, + mx8mp_iomuxc_sai1_rxd4 = 88, + mx8mp_iomuxc_sai1_rxd5 = 89, + mx8mp_iomuxc_sai1_rxd6 = 90, + mx8mp_iomuxc_sai1_rxd7 = 91, + mx8mp_iomuxc_sai1_txfs = 92, + mx8mp_iomuxc_sai1_txc = 93, + mx8mp_iomuxc_sai1_txd0 = 94, + mx8mp_iomuxc_sai1_txd1 = 95, + mx8mp_iomuxc_sai1_txd2 = 96, + mx8mp_iomuxc_sai1_txd3 = 97, + mx8mp_iomuxc_sai1_txd4 = 98, + mx8mp_iomuxc_sai1_txd5 = 99, + mx8mp_iomuxc_sai1_txd6 = 100, + mx8mp_iomuxc_sai1_txd7 = 101, + mx8mp_iomuxc_sai1_mclk = 102, + mx8mp_iomuxc_sai2_rxfs = 103, + mx8mp_iomuxc_sai2_rxc = 104, + mx8mp_iomuxc_sai2_rxd0 = 105, + mx8mp_iomuxc_sai2_txfs = 106, + mx8mp_iomuxc_sai2_txc = 107, + mx8mp_iomuxc_sai2_txd0 = 108, + mx8mp_iomuxc_sai2_mclk = 109, + mx8mp_iomuxc_sai3_rxfs = 110, + mx8mp_iomuxc_sai3_rxc = 111, + mx8mp_iomuxc_sai3_rxd = 112, + mx8mp_iomuxc_sai3_txfs = 113, + mx8mp_iomuxc_sai3_txc = 114, + mx8mp_iomuxc_sai3_txd = 115, + mx8mp_iomuxc_sai3_mclk = 116, + mx8mp_iomuxc_spdif_tx = 117, + mx8mp_iomuxc_spdif_rx = 118, + mx8mp_iomuxc_spdif_ext_clk = 119, + mx8mp_iomuxc_ecspi1_sclk = 120, + mx8mp_iomuxc_ecspi1_mosi = 121, + mx8mp_iomuxc_ecspi1_miso = 122, + mx8mp_iomuxc_ecspi1_ss0 = 123, + mx8mp_iomuxc_ecspi2_sclk = 124, + mx8mp_iomuxc_ecspi2_mosi = 125, + mx8mp_iomuxc_ecspi2_miso = 126, + mx8mp_iomuxc_ecspi2_ss0 = 127, + mx8mp_iomuxc_i2c1_scl = 128, + mx8mp_iomuxc_i2c1_sda = 129, + mx8mp_iomuxc_i2c2_scl = 130, + mx8mp_iomuxc_i2c2_sda = 131, + mx8mp_iomuxc_i2c3_scl = 132, + mx8mp_iomuxc_i2c3_sda = 133, + mx8mp_iomuxc_i2c4_scl = 134, + mx8mp_iomuxc_i2c4_sda = 135, + mx8mp_iomuxc_uart1_rxd = 136, + mx8mp_iomuxc_uart1_txd = 137, + mx8mp_iomuxc_uart2_rxd = 138, + mx8mp_iomuxc_uart2_txd = 139, + mx8mp_iomuxc_uart3_rxd = 140, + mx8mp_iomuxc_uart3_txd = 141, + mx8mp_iomuxc_uart4_rxd = 142, + mx8mp_iomuxc_uart4_txd = 143, + mx8mp_iomuxc_hdmi_ddc_scl = 144, + mx8mp_iomuxc_hdmi_ddc_sda = 145, + mx8mp_iomuxc_hdmi_cec = 146, + mx8mp_iomuxc_hdmi_hpd = 147, +}; + +/* pad names for the pinmux subsystem */ +static const struct pinctrl_pin_desc imx8mp_pinctrl_pads[] = { + imx_pinctrl_pin(mx8mp_iomuxc_reserve0), + imx_pinctrl_pin(mx8mp_iomuxc_reserve1), + imx_pinctrl_pin(mx8mp_iomuxc_reserve2), + imx_pinctrl_pin(mx8mp_iomuxc_reserve3), + imx_pinctrl_pin(mx8mp_iomuxc_reserve4), + imx_pinctrl_pin(mx8mp_iomuxc_gpio1_io00), + imx_pinctrl_pin(mx8mp_iomuxc_gpio1_io01), + imx_pinctrl_pin(mx8mp_iomuxc_gpio1_io02), + imx_pinctrl_pin(mx8mp_iomuxc_gpio1_io03), + imx_pinctrl_pin(mx8mp_iomuxc_gpio1_io04), + imx_pinctrl_pin(mx8mp_iomuxc_gpio1_io05), + imx_pinctrl_pin(mx8mp_iomuxc_gpio1_io06), + imx_pinctrl_pin(mx8mp_iomuxc_gpio1_io07), + imx_pinctrl_pin(mx8mp_iomuxc_gpio1_io08), + imx_pinctrl_pin(mx8mp_iomuxc_gpio1_io09), + imx_pinctrl_pin(mx8mp_iomuxc_gpio1_io10), + imx_pinctrl_pin(mx8mp_iomuxc_gpio1_io11), + imx_pinctrl_pin(mx8mp_iomuxc_gpio1_io12), + imx_pinctrl_pin(mx8mp_iomuxc_gpio1_io13), + imx_pinctrl_pin(mx8mp_iomuxc_gpio1_io14), + imx_pinctrl_pin(mx8mp_iomuxc_gpio1_io15), + imx_pinctrl_pin(mx8mp_iomuxc_enet_mdc), + imx_pinctrl_pin(mx8mp_iomuxc_enet_mdio), + imx_pinctrl_pin(mx8mp_iomuxc_enet_td3), + imx_pinctrl_pin(mx8mp_iomuxc_enet_td2), + imx_pinctrl_pin(mx8mp_iomuxc_enet_td1), + imx_pinctrl_pin(mx8mp_iomuxc_enet_td0), + imx_pinctrl_pin(mx8mp_iomuxc_enet_tx_ctl), + imx_pinctrl_pin(mx8mp_iomuxc_enet_txc), + imx_pinctrl_pin(mx8mp_iomuxc_enet_rx_ctl), + imx_pinctrl_pin(mx8mp_iomuxc_enet_rxc), + imx_pinctrl_pin(mx8mp_iomuxc_enet_rd0), + imx_pinctrl_pin(mx8mp_iomuxc_enet_rd1), + imx_pinctrl_pin(mx8mp_iomuxc_enet_rd2), + imx_pinctrl_pin(mx8mp_iomuxc_enet_rd3), + imx_pinctrl_pin(mx8mp_iomuxc_sd1_clk), + imx_pinctrl_pin(mx8mp_iomuxc_sd1_cmd), + imx_pinctrl_pin(mx8mp_iomuxc_sd1_data0), + imx_pinctrl_pin(mx8mp_iomuxc_sd1_data1), + imx_pinctrl_pin(mx8mp_iomuxc_sd1_data2), + imx_pinctrl_pin(mx8mp_iomuxc_sd1_data3), + imx_pinctrl_pin(mx8mp_iomuxc_sd1_data4), + imx_pinctrl_pin(mx8mp_iomuxc_sd1_data5), + imx_pinctrl_pin(mx8mp_iomuxc_sd1_data6), + imx_pinctrl_pin(mx8mp_iomuxc_sd1_data7), + imx_pinctrl_pin(mx8mp_iomuxc_sd1_reset_b), + imx_pinctrl_pin(mx8mp_iomuxc_sd1_strobe), + imx_pinctrl_pin(mx8mp_iomuxc_sd2_cd_b), + imx_pinctrl_pin(mx8mp_iomuxc_sd2_clk), + imx_pinctrl_pin(mx8mp_iomuxc_sd2_cmd), + imx_pinctrl_pin(mx8mp_iomuxc_sd2_data0), + imx_pinctrl_pin(mx8mp_iomuxc_sd2_data1), + imx_pinctrl_pin(mx8mp_iomuxc_sd2_data2), + imx_pinctrl_pin(mx8mp_iomuxc_sd2_data3), + imx_pinctrl_pin(mx8mp_iomuxc_sd2_reset_b), + imx_pinctrl_pin(mx8mp_iomuxc_sd2_wp), + imx_pinctrl_pin(mx8mp_iomuxc_nand_ale), + imx_pinctrl_pin(mx8mp_iomuxc_nand_ce0_b), + imx_pinctrl_pin(mx8mp_iomuxc_nand_ce1_b), + imx_pinctrl_pin(mx8mp_iomuxc_nand_ce2_b), + imx_pinctrl_pin(mx8mp_iomuxc_nand_ce3_b), + imx_pinctrl_pin(mx8mp_iomuxc_nand_cle), + imx_pinctrl_pin(mx8mp_iomuxc_nand_data00), + imx_pinctrl_pin(mx8mp_iomuxc_nand_data01), + imx_pinctrl_pin(mx8mp_iomuxc_nand_data02), + imx_pinctrl_pin(mx8mp_iomuxc_nand_data03), + imx_pinctrl_pin(mx8mp_iomuxc_nand_data04), + imx_pinctrl_pin(mx8mp_iomuxc_nand_data05), + imx_pinctrl_pin(mx8mp_iomuxc_nand_data06), + imx_pinctrl_pin(mx8mp_iomuxc_nand_data07), + imx_pinctrl_pin(mx8mp_iomuxc_nand_dqs), + imx_pinctrl_pin(mx8mp_iomuxc_nand_re_b), + imx_pinctrl_pin(mx8mp_iomuxc_nand_ready_b), + imx_pinctrl_pin(mx8mp_iomuxc_nand_we_b), + imx_pinctrl_pin(mx8mp_iomuxc_nand_wp_b), + imx_pinctrl_pin(mx8mp_iomuxc_sai5_rxfs), + imx_pinctrl_pin(mx8mp_iomuxc_sai5_rxc), + imx_pinctrl_pin(mx8mp_iomuxc_sai5_rxd0), + imx_pinctrl_pin(mx8mp_iomuxc_sai5_rxd1), + imx_pinctrl_pin(mx8mp_iomuxc_sai5_rxd2), + imx_pinctrl_pin(mx8mp_iomuxc_sai5_rxd3), + imx_pinctrl_pin(mx8mp_iomuxc_sai5_mclk), + imx_pinctrl_pin(mx8mp_iomuxc_sai1_rxfs), + imx_pinctrl_pin(mx8mp_iomuxc_sai1_rxc), + imx_pinctrl_pin(mx8mp_iomuxc_sai1_rxd0), + imx_pinctrl_pin(mx8mp_iomuxc_sai1_rxd1), + imx_pinctrl_pin(mx8mp_iomuxc_sai1_rxd2), + imx_pinctrl_pin(mx8mp_iomuxc_sai1_rxd3), + imx_pinctrl_pin(mx8mp_iomuxc_sai1_rxd4), + imx_pinctrl_pin(mx8mp_iomuxc_sai1_rxd5), + imx_pinctrl_pin(mx8mp_iomuxc_sai1_rxd6), + imx_pinctrl_pin(mx8mp_iomuxc_sai1_rxd7), + imx_pinctrl_pin(mx8mp_iomuxc_sai1_txfs), + imx_pinctrl_pin(mx8mp_iomuxc_sai1_txc), + imx_pinctrl_pin(mx8mp_iomuxc_sai1_txd0), + imx_pinctrl_pin(mx8mp_iomuxc_sai1_txd1), + imx_pinctrl_pin(mx8mp_iomuxc_sai1_txd2), + imx_pinctrl_pin(mx8mp_iomuxc_sai1_txd3), + imx_pinctrl_pin(mx8mp_iomuxc_sai1_txd4), + imx_pinctrl_pin(mx8mp_iomuxc_sai1_txd5), + imx_pinctrl_pin(mx8mp_iomuxc_sai1_txd6), + imx_pinctrl_pin(mx8mp_iomuxc_sai1_txd7), + imx_pinctrl_pin(mx8mp_iomuxc_sai1_mclk), + imx_pinctrl_pin(mx8mp_iomuxc_sai2_rxfs), + imx_pinctrl_pin(mx8mp_iomuxc_sai2_rxc), + imx_pinctrl_pin(mx8mp_iomuxc_sai2_rxd0), + imx_pinctrl_pin(mx8mp_iomuxc_sai2_txfs), + imx_pinctrl_pin(mx8mp_iomuxc_sai2_txc), + imx_pinctrl_pin(mx8mp_iomuxc_sai2_txd0), + imx_pinctrl_pin(mx8mp_iomuxc_sai2_mclk), + imx_pinctrl_pin(mx8mp_iomuxc_sai3_rxfs), + imx_pinctrl_pin(mx8mp_iomuxc_sai3_rxc), + imx_pinctrl_pin(mx8mp_iomuxc_sai3_rxd), + imx_pinctrl_pin(mx8mp_iomuxc_sai3_txfs), + imx_pinctrl_pin(mx8mp_iomuxc_sai3_txc), + imx_pinctrl_pin(mx8mp_iomuxc_sai3_txd), + imx_pinctrl_pin(mx8mp_iomuxc_sai3_mclk), + imx_pinctrl_pin(mx8mp_iomuxc_spdif_tx), + imx_pinctrl_pin(mx8mp_iomuxc_spdif_rx), + imx_pinctrl_pin(mx8mp_iomuxc_spdif_ext_clk), + imx_pinctrl_pin(mx8mp_iomuxc_ecspi1_sclk), + imx_pinctrl_pin(mx8mp_iomuxc_ecspi1_mosi), + imx_pinctrl_pin(mx8mp_iomuxc_ecspi1_miso), + imx_pinctrl_pin(mx8mp_iomuxc_ecspi1_ss0), + imx_pinctrl_pin(mx8mp_iomuxc_ecspi2_sclk), + imx_pinctrl_pin(mx8mp_iomuxc_ecspi2_mosi), + imx_pinctrl_pin(mx8mp_iomuxc_ecspi2_miso), + imx_pinctrl_pin(mx8mp_iomuxc_ecspi2_ss0), + imx_pinctrl_pin(mx8mp_iomuxc_i2c1_scl), + imx_pinctrl_pin(mx8mp_iomuxc_i2c1_sda), + imx_pinctrl_pin(mx8mp_iomuxc_i2c2_scl), + imx_pinctrl_pin(mx8mp_iomuxc_i2c2_sda), + imx_pinctrl_pin(mx8mp_iomuxc_i2c3_scl), + imx_pinctrl_pin(mx8mp_iomuxc_i2c3_sda), + imx_pinctrl_pin(mx8mp_iomuxc_i2c4_scl), + imx_pinctrl_pin(mx8mp_iomuxc_i2c4_sda), + imx_pinctrl_pin(mx8mp_iomuxc_uart1_rxd), + imx_pinctrl_pin(mx8mp_iomuxc_uart1_txd), + imx_pinctrl_pin(mx8mp_iomuxc_uart2_rxd), + imx_pinctrl_pin(mx8mp_iomuxc_uart2_txd), + imx_pinctrl_pin(mx8mp_iomuxc_uart3_rxd), + imx_pinctrl_pin(mx8mp_iomuxc_uart3_txd), + imx_pinctrl_pin(mx8mp_iomuxc_uart4_rxd), + imx_pinctrl_pin(mx8mp_iomuxc_uart4_txd), + imx_pinctrl_pin(mx8mp_iomuxc_hdmi_ddc_scl), + imx_pinctrl_pin(mx8mp_iomuxc_hdmi_ddc_sda), + imx_pinctrl_pin(mx8mp_iomuxc_hdmi_cec), + imx_pinctrl_pin(mx8mp_iomuxc_hdmi_hpd), +}; + +static const struct imx_pinctrl_soc_info imx8mp_pinctrl_info = { + .pins = imx8mp_pinctrl_pads, + .npins = array_size(imx8mp_pinctrl_pads), + .gpr_compatible = "fsl,imx8mp-iomuxc-gpr", +}; + +static const struct of_device_id imx8mp_pinctrl_of_match[] = { + { .compatible = "fsl,imx8mp-iomuxc", .data = &imx8mp_pinctrl_info, }, + { /* sentinel */ } +}; + +static int imx8mp_pinctrl_probe(struct platform_device *pdev) +{ + return imx_pinctrl_probe(pdev, &imx8mp_pinctrl_info); +} + +static struct platform_driver imx8mp_pinctrl_driver = { + .driver = { + .name = "imx8mp-pinctrl", + .of_match_table = of_match_ptr(imx8mp_pinctrl_of_match), + }, + .probe = imx8mp_pinctrl_probe, +}; + +static int __init imx8mp_pinctrl_init(void) +{ + return platform_driver_register(&imx8mp_pinctrl_driver); +} +arch_initcall(imx8mp_pinctrl_init);
|
Pin Controllers (pinctrl)
|
eec6d97d6da400226529f4748fb8998bb69a5bbf
|
anson huang abel vesa abel vesa nxp com fabio estevam festevam gmail com
|
drivers
|
pinctrl
|
freescale
|
pinctrl: sunrisepoint: add coffee lake-s acpi id
|
intel coffee lake-s pch has the same gpio hardware than sunrisepoint-h pch but the acpi id is different. add this new acpi id to the list of supported devices.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add coffee lake-s acpi id
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['sunrisepoint']
|
['c']
| 1
| 1
| 0
|
--- diff --git a/drivers/pinctrl/intel/pinctrl-sunrisepoint.c b/drivers/pinctrl/intel/pinctrl-sunrisepoint.c --- a/drivers/pinctrl/intel/pinctrl-sunrisepoint.c +++ b/drivers/pinctrl/intel/pinctrl-sunrisepoint.c + { "int3451", (kernel_ulong_t)&spth_soc_data },
|
Pin Controllers (pinctrl)
|
899b7e3374b253888b048dd06338e043e4b7637c
|
mika westerberg
|
drivers
|
pinctrl
|
intel
|
mmc: sdhci-brcmstb: add ability to use hs400es transfer mode
|
the latest emmc jedec specification version 5.1 added a new transfer mode, hs400 with enhanced strobe (hs400es). this mode will be selected if both the host controller and emmc device support it. the latest arasan 5.1 controller in the 7216a0 supports this mode. the "host controller specification" has not been updated so the controller register bit used to enable this mode is not specified and varies the with controller vendor. the linux sdhci driver supplies a callback for enabling hs400es mode and that callback will be used to supply a routine that will set the proper bit in the arasan vendor register.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add ability to use hs400es transfer mode
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['sdhci-brcmstb']
|
['c']
| 1
| 86
| 11
|
--- diff --git a/drivers/mmc/host/sdhci-brcmstb.c b/drivers/mmc/host/sdhci-brcmstb.c --- a/drivers/mmc/host/sdhci-brcmstb.c +++ b/drivers/mmc/host/sdhci-brcmstb.c +#include <linux/bitops.h> +#define sdhci_vendor 0x78 +#define sdhci_vendor_enhanced_strb 0x1 + +#define brcmstb_priv_flags_no_64bit bit(0) +#define brcmstb_priv_flags_broken_timeout bit(1) + +struct sdhci_brcmstb_priv { + void __iomem *cfg_regs; +}; + +struct brcmstb_match_priv { + void (*hs400es)(struct mmc_host *mmc, struct mmc_ios *ios); + unsigned int flags; +}; + +static void sdhci_brcmstb_hs400es(struct mmc_host *mmc, struct mmc_ios *ios) +{ + struct sdhci_host *host = mmc_priv(mmc); + + u32 reg; + + dev_dbg(mmc_dev(mmc), "%s(): setting hs400-enhanced-strobe mode ", + __func__); + reg = readl(host->ioaddr + sdhci_vendor); + if (ios->enhanced_strobe) + reg |= sdhci_vendor_enhanced_strb; + else + reg &= ~sdhci_vendor_enhanced_strb; + writel(reg, host->ioaddr + sdhci_vendor); +} + +static const struct brcmstb_match_priv match_priv_7425 = { + .flags = brcmstb_priv_flags_no_64bit | + brcmstb_priv_flags_broken_timeout, +}; + +static const struct brcmstb_match_priv match_priv_7445 = { + .flags = brcmstb_priv_flags_broken_timeout, +}; + +static const struct brcmstb_match_priv match_priv_7216 = { + .hs400es = sdhci_brcmstb_hs400es, +}; + +static const struct of_device_id sdhci_brcm_of_match[] = { + { .compatible = "brcm,bcm7425-sdhci", .data = &match_priv_7425 }, + { .compatible = "brcm,bcm7445-sdhci", .data = &match_priv_7445 }, + { .compatible = "brcm,bcm7216-sdhci", .data = &match_priv_7216 }, + {}, +}; + - struct sdhci_host *host; + const struct brcmstb_match_priv *match_priv; + const struct of_device_id *match; + struct sdhci_brcmstb_priv *priv; + struct sdhci_host *host; + struct resource *iomem; + match = of_match_node(sdhci_brcm_of_match, pdev->dev.of_node); + match_priv = match->data; + - host = sdhci_pltfm_init(pdev, &sdhci_brcmstb_pdata, 0); + host = sdhci_pltfm_init(pdev, &sdhci_brcmstb_pdata, + sizeof(struct sdhci_brcmstb_priv)); + pltfm_host = sdhci_priv(host); + priv = sdhci_pltfm_priv(pltfm_host); + + /* map in the non-standard cfg registers */ + iomem = platform_get_resource(pdev, ioresource_mem, 1); + priv->cfg_regs = devm_ioremap_resource(&pdev->dev, iomem); + if (is_err(priv->cfg_regs)) { + res = ptr_err(priv->cfg_regs); + goto err; + } + + /* + * if the chip has enhanced strobe and it's enabled, add + * callback + */ + if (match_priv->hs400es && + (host->mmc->caps2 & mmc_cap2_hs400_es)) + host->mmc_host_ops.hs400_enhanced_strobe = match_priv->hs400es; + - if (of_device_is_compatible(pdev->dev.of_node, "brcm,bcm7425-sdhci")) + if (match_priv->flags & brcmstb_priv_flags_no_64bit) - host->quirks |= sdhci_quirk_missing_caps | - sdhci_quirk_broken_timeout_val; + host->quirks |= sdhci_quirk_missing_caps; + + if (match_priv->flags & brcmstb_priv_flags_broken_timeout) + host->quirks |= sdhci_quirk_broken_timeout_val; - pltfm_host = sdhci_priv(host); -static const struct of_device_id sdhci_brcm_of_match[] = { - { .compatible = "brcm,bcm7425-sdhci" }, - { .compatible = "brcm,bcm7445-sdhci" }, - {}, -};
|
Multi Media Card (MMC)
|
78ab82fdb65c703fa21db348c50c3f3eae773d62
|
al cooper
|
drivers
|
mmc
|
host
|
mmc: sdhci-brcmstb: add support for command queuing (cqe)
|
the latest arasan controller first used in the 7216 now supports cqe so enable this feature.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add support for command queuing (cqe)
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['sdhci-brcmstb']
|
['c', 'kconfig']
| 2
| 133
| 8
|
--- diff --git a/drivers/mmc/host/kconfig b/drivers/mmc/host/kconfig --- a/drivers/mmc/host/kconfig +++ b/drivers/mmc/host/kconfig + select mmc_cqhci diff --git a/drivers/mmc/host/sdhci-brcmstb.c b/drivers/mmc/host/sdhci-brcmstb.c --- a/drivers/mmc/host/sdhci-brcmstb.c +++ b/drivers/mmc/host/sdhci-brcmstb.c +#include <linux/delay.h> +#include "cqhci.h" +#define sdhci_arasan_cqe_base_addr 0x200 + + bool has_cqe; + struct sdhci_ops *ops; -static const struct sdhci_ops sdhci_brcmstb_ops = { +static void sdhci_brcmstb_set_clock(struct sdhci_host *host, unsigned int clock) +{ + u16 clk; + + host->mmc->actual_clock = 0; + + clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock); + sdhci_writew(host, clk, sdhci_clock_control); + + if (clock == 0) + return; + + sdhci_enable_clk(host, clk); +} + +static void sdhci_brcmstb_dumpregs(struct mmc_host *mmc) +{ + sdhci_dumpregs(mmc_priv(mmc)); +} + +static void sdhci_brcmstb_cqe_enable(struct mmc_host *mmc) +{ + struct sdhci_host *host = mmc_priv(mmc); + u32 reg; + + reg = sdhci_readl(host, sdhci_present_state); + while (reg & sdhci_data_available) { + sdhci_readl(host, sdhci_buffer); + reg = sdhci_readl(host, sdhci_present_state); + } + + sdhci_cqe_enable(mmc); +} + +static const struct cqhci_host_ops sdhci_brcmstb_cqhci_ops = { + .enable = sdhci_brcmstb_cqe_enable, + .disable = sdhci_cqe_disable, + .dumpregs = sdhci_brcmstb_dumpregs, +}; + +static struct sdhci_ops sdhci_brcmstb_ops = { -static const struct sdhci_pltfm_data sdhci_brcmstb_pdata = { - .ops = &sdhci_brcmstb_ops, +static struct sdhci_ops sdhci_brcmstb_ops_7216 = { + .set_clock = sdhci_brcmstb_set_clock, + .set_bus_width = sdhci_set_bus_width, + .reset = sdhci_reset, + .set_uhs_signaling = sdhci_set_uhs_signaling, -static const struct brcmstb_match_priv match_priv_7425 = { +static struct brcmstb_match_priv match_priv_7425 = { + .ops = &sdhci_brcmstb_ops, -static const struct brcmstb_match_priv match_priv_7445 = { +static struct brcmstb_match_priv match_priv_7445 = { + .ops = &sdhci_brcmstb_ops, + .ops = &sdhci_brcmstb_ops_7216, +static u32 sdhci_brcmstb_cqhci_irq(struct sdhci_host *host, u32 intmask) +{ + int cmd_error = 0; + int data_error = 0; + + if (!sdhci_cqe_irq(host, intmask, &cmd_error, &data_error)) + return intmask; + + cqhci_irq(host->mmc, intmask, cmd_error, data_error); + + return 0; +} + +static int sdhci_brcmstb_add_host(struct sdhci_host *host, + struct sdhci_brcmstb_priv *priv) +{ + struct cqhci_host *cq_host; + bool dma64; + int ret; + + if (!priv->has_cqe) + return sdhci_add_host(host); + + dev_dbg(mmc_dev(host->mmc), "cqe is enabled "); + host->mmc->caps2 |= mmc_cap2_cqe | mmc_cap2_cqe_dcmd; + ret = sdhci_setup_host(host); + if (ret) + return ret; + + cq_host = devm_kzalloc(mmc_dev(host->mmc), + sizeof(*cq_host), gfp_kernel); + if (!cq_host) { + ret = -enomem; + goto cleanup; + } + + cq_host->mmio = host->ioaddr + sdhci_arasan_cqe_base_addr; + cq_host->ops = &sdhci_brcmstb_cqhci_ops; + + dma64 = host->flags & sdhci_use_64_bit_dma; + if (dma64) { + dev_dbg(mmc_dev(host->mmc), "using 64 bit dma "); + cq_host->caps |= cqhci_task_desc_sz_128; + cq_host->quirks |= cqhci_quirk_short_txfr_desc_sz; + } + + ret = cqhci_init(cq_host, host->mmc, dma64); + if (ret) + goto cleanup; + + ret = __sdhci_add_host(host); + if (ret) + goto cleanup; + + return 0; + +cleanup: + sdhci_cleanup_host(host); + return ret; +} + + struct sdhci_pltfm_data brcmstb_pdata; + bool has_cqe = false; + dev_dbg(&pdev->dev, "probe found match for %s ", match->compatible); + - host = sdhci_pltfm_init(pdev, &sdhci_brcmstb_pdata, + memset(&brcmstb_pdata, 0, sizeof(brcmstb_pdata)); + if (device_property_read_bool(&pdev->dev, "supports-cqe")) { + has_cqe = true; + match_priv->ops->irq = sdhci_brcmstb_cqhci_irq; + } + brcmstb_pdata.ops = match_priv->ops; + host = sdhci_pltfm_init(pdev, &brcmstb_pdata, + priv->has_cqe = has_cqe; - sdhci_support_ddr50); + sdhci_support_ddr50); - res = sdhci_add_host(host); + res = sdhci_brcmstb_add_host(host, priv);
|
Multi Media Card (MMC)
|
d46ba2d17f902680807f9f7e951ae659c5e0d64c
|
al cooper
|
drivers
|
mmc
|
host
|
mmc: sdhci-msm: add cqhci support for sdhci-msm
|
this adds cqhci support for sdhci-msm platforms.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add cqhci support for sdhci-msm
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['sdhci-msm']
|
['c', 'kconfig']
| 2
| 133
| 1
|
--- diff --git a/drivers/mmc/host/kconfig b/drivers/mmc/host/kconfig --- a/drivers/mmc/host/kconfig +++ b/drivers/mmc/host/kconfig + select mmc_cqhci diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c --- a/drivers/mmc/host/sdhci-msm.c +++ b/drivers/mmc/host/sdhci-msm.c +#include "cqhci.h" +/* cqhci vendor specific registers */ +#define cqhci_vendor_cfg1 0xa00 +#define cqhci_vendor_dis_rst_on_cq_en (0x3 << 13) + +/*****************************************************************************\ + * * + * msm command queue engine (cqe) * + * * +\*****************************************************************************/ + +static u32 sdhci_msm_cqe_irq(struct sdhci_host *host, u32 intmask) +{ + int cmd_error = 0; + int data_error = 0; + + if (!sdhci_cqe_irq(host, intmask, &cmd_error, &data_error)) + return intmask; + + cqhci_irq(host->mmc, intmask, cmd_error, data_error); + return 0; +} + +void sdhci_msm_cqe_disable(struct mmc_host *mmc, bool recovery) +{ + struct sdhci_host *host = mmc_priv(mmc); + unsigned long flags; + u32 ctrl; + + /* + * when cqe is halted, the legacy sdhci path operates only + * on 16-byte descriptors in 64bit mode. + */ + if (host->flags & sdhci_use_64_bit_dma) + host->desc_sz = 16; + + spin_lock_irqsave(&host->lock, flags); + + /* + * during cqe command transfers, command complete bit gets latched. + * so s/w should clear command complete interrupt status when cqe is + * either halted or disabled. otherwise unexpected sdchi legacy + * interrupt gets triggered when cqe is halted/disabled. + */ + ctrl = sdhci_readl(host, sdhci_int_enable); + ctrl |= sdhci_int_response; + sdhci_writel(host, ctrl, sdhci_int_enable); + sdhci_writel(host, sdhci_int_response, sdhci_int_status); + + spin_unlock_irqrestore(&host->lock, flags); + + sdhci_cqe_disable(mmc, recovery); +} + +static const struct cqhci_host_ops sdhci_msm_cqhci_ops = { + .enable = sdhci_cqe_enable, + .disable = sdhci_msm_cqe_disable, +}; + +static int sdhci_msm_cqe_add_host(struct sdhci_host *host, + struct platform_device *pdev) +{ + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host); + struct cqhci_host *cq_host; + bool dma64; + u32 cqcfg; + int ret; + + /* + * when cqe is halted, sdhc operates only on 16byte adma descriptors. + * so ensure adma table is allocated for 16byte descriptors. + */ + if (host->caps & sdhci_can_64bit) + host->alloc_desc_sz = 16; + + ret = sdhci_setup_host(host); + if (ret) + return ret; + + cq_host = cqhci_pltfm_init(pdev); + if (is_err(cq_host)) { + ret = ptr_err(cq_host); + dev_err(&pdev->dev, "cqhci-pltfm init: failed: %d ", ret); + goto cleanup; + } + + msm_host->mmc->caps2 |= mmc_cap2_cqe | mmc_cap2_cqe_dcmd; + cq_host->ops = &sdhci_msm_cqhci_ops; + + dma64 = host->flags & sdhci_use_64_bit_dma; + + ret = cqhci_init(cq_host, host->mmc, dma64); + if (ret) { + dev_err(&pdev->dev, "%s: cqe init: failed (%d) ", + mmc_hostname(host->mmc), ret); + goto cleanup; + } + + /* disable cqe reset due to cqe enable signal */ + cqcfg = cqhci_readl(cq_host, cqhci_vendor_cfg1); + cqcfg |= cqhci_vendor_dis_rst_on_cq_en; + cqhci_writel(cq_host, cqcfg, cqhci_vendor_cfg1); + + /* + * sdhc expects 12byte adma descriptors till cqe is enabled. + * so limit desc_sz to 12 so that the data commands that are sent + * during card initialization (before cqe gets enabled) would + * get executed without any issues. + */ + if (host->flags & sdhci_use_64_bit_dma) + host->desc_sz = 12; + + ret = __sdhci_add_host(host); + if (ret) + goto cleanup; + + dev_info(&pdev->dev, "%s: cqe init: success ", + mmc_hostname(host->mmc)); + return ret; + +cleanup: + sdhci_cleanup_host(host); + return ret; +} + + .irq = sdhci_msm_cqe_irq, + struct device_node *node = pdev->dev.of_node; - ret = sdhci_add_host(host); + if (of_property_read_bool(node, "supports-cqe")) + ret = sdhci_msm_cqe_add_host(host, pdev); + else + ret = sdhci_add_host(host);
|
Multi Media Card (MMC)
|
87a8df0dce6ad0af14c08858fa51dfcc8c509ab3
|
ritesh harjani adrian hunter adrian hunter intel com
|
drivers
|
mmc
|
host
|
mmc: sdhci: add support for using external dma devices
|
some standard sd host controllers can support both external dma controllers as well as adma/sdma in which the sd host controller acts as dma master. ti's omap controller is the case as an example.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add support for using external dma devices
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['sdhci']
|
['c', 'kconfig', 'h']
| 3
| 237
| 2
|
--- diff --git a/drivers/mmc/host/kconfig b/drivers/mmc/host/kconfig --- a/drivers/mmc/host/kconfig +++ b/drivers/mmc/host/kconfig + +config mmc_sdhci_external_dma + bool diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c +#include <linux/dmaengine.h> +#if is_enabled(config_mmc_sdhci_external_dma) + +static int sdhci_external_dma_init(struct sdhci_host *host) +{ + int ret = 0; + struct mmc_host *mmc = host->mmc; + + host->tx_chan = dma_request_chan(mmc->parent, "tx"); + if (is_err(host->tx_chan)) { + ret = ptr_err(host->tx_chan); + if (ret != -eprobe_defer) + pr_warn("failed to request tx dma channel. "); + host->tx_chan = null; + return ret; + } + + host->rx_chan = dma_request_chan(mmc->parent, "rx"); + if (is_err(host->rx_chan)) { + if (host->tx_chan) { + dma_release_channel(host->tx_chan); + host->tx_chan = null; + } + + ret = ptr_err(host->rx_chan); + if (ret != -eprobe_defer) + pr_warn("failed to request rx dma channel. "); + host->rx_chan = null; + } + + return ret; +} + +static struct dma_chan *sdhci_external_dma_channel(struct sdhci_host *host, + struct mmc_data *data) +{ + return data->flags & mmc_data_write ? host->tx_chan : host->rx_chan; +} + +static int sdhci_external_dma_setup(struct sdhci_host *host, + struct mmc_command *cmd) +{ + int ret, i; + struct dma_async_tx_descriptor *desc; + struct mmc_data *data = cmd->data; + struct dma_chan *chan; + struct dma_slave_config cfg; + dma_cookie_t cookie; + int sg_cnt; + + if (!host->mapbase) + return -einval; + + cfg.src_addr = host->mapbase + sdhci_buffer; + cfg.dst_addr = host->mapbase + sdhci_buffer; + cfg.src_addr_width = dma_slave_buswidth_4_bytes; + cfg.dst_addr_width = dma_slave_buswidth_4_bytes; + cfg.src_maxburst = data->blksz / 4; + cfg.dst_maxburst = data->blksz / 4; + + /* sanity check: all the sg entries must be aligned by block size. */ + for (i = 0; i < data->sg_len; i++) { + if ((data->sg + i)->length % data->blksz) + return -einval; + } + + chan = sdhci_external_dma_channel(host, data); + + ret = dmaengine_slave_config(chan, &cfg); + if (ret) + return ret; + + sg_cnt = sdhci_pre_dma_transfer(host, data, cookie_mapped); + if (sg_cnt <= 0) + return -einval; + + desc = dmaengine_prep_slave_sg(chan, data->sg, data->sg_len, + mmc_get_dma_dir(data), + dma_prep_interrupt | dma_ctrl_ack); + if (!desc) + return -einval; + + desc->callback = null; + desc->callback_param = null; + + cookie = dmaengine_submit(desc); + if (dma_submit_error(cookie)) + ret = cookie; + + return ret; +} + +static void sdhci_external_dma_release(struct sdhci_host *host) +{ + if (host->tx_chan) { + dma_release_channel(host->tx_chan); + host->tx_chan = null; + } + + if (host->rx_chan) { + dma_release_channel(host->rx_chan); + host->rx_chan = null; + } + + sdhci_switch_external_dma(host, false); +} + +static void __sdhci_external_dma_prepare_data(struct sdhci_host *host, + struct mmc_command *cmd) +{ + struct mmc_data *data = cmd->data; + + sdhci_initialize_data(host, data); + + host->flags |= sdhci_req_use_dma; + sdhci_set_transfer_irqs(host); + + sdhci_set_block_info(host, data); +} + +static void sdhci_external_dma_prepare_data(struct sdhci_host *host, + struct mmc_command *cmd) +{ + if (!sdhci_external_dma_setup(host, cmd)) { + __sdhci_external_dma_prepare_data(host, cmd); + } else { + sdhci_external_dma_release(host); + pr_err("%s: cannot use external dma, switch to the dma/pio which standard sdhci provides. ", + mmc_hostname(host->mmc)); + sdhci_prepare_data(host, cmd); + } +} + +static void sdhci_external_dma_pre_transfer(struct sdhci_host *host, + struct mmc_command *cmd) +{ + struct dma_chan *chan; + + if (!cmd->data) + return; + + chan = sdhci_external_dma_channel(host, cmd->data); + if (chan) + dma_async_issue_pending(chan); +} + +#else + +static inline int sdhci_external_dma_init(struct sdhci_host *host) +{ + return -eopnotsupp; +} + +static inline void sdhci_external_dma_release(struct sdhci_host *host) +{ +} + +static inline void sdhci_external_dma_prepare_data(struct sdhci_host *host, + struct mmc_command *cmd) +{ + /* this should never happen */ + warn_on_once(1); +} + +static inline void sdhci_external_dma_pre_transfer(struct sdhci_host *host, + struct mmc_command *cmd) +{ +} + +static inline struct dma_chan *sdhci_external_dma_channel(struct sdhci_host *host, + struct mmc_data *data) +{ + return null; +} + +#endif + +void sdhci_switch_external_dma(struct sdhci_host *host, bool en) +{ + host->use_external_dma = en; +} +export_symbol_gpl(sdhci_switch_external_dma); + - if (cmd->data) - sdhci_prepare_data(host, cmd); + if (cmd->data) { + if (host->use_external_dma) + sdhci_external_dma_prepare_data(host, cmd); + else + sdhci_prepare_data(host, cmd); + } + if (host->use_external_dma) + sdhci_external_dma_pre_transfer(host, cmd); + + if (host->use_external_dma && data && + (mrq->cmd->error || data->error)) { + struct dma_chan *chan = sdhci_external_dma_channel(host, data); + + host->mrqs_done[i] = null; + spin_unlock_irqrestore(&host->lock, flags); + dmaengine_terminate_sync(chan); + spin_lock_irqsave(&host->lock, flags); + sdhci_set_mrq_done(host, mrq); + } + + if (host->use_external_dma) { + ret = sdhci_external_dma_init(host); + if (ret == -eprobe_defer) + goto unreg; + /* + * fall back to use the dma/pio integrated in standard sdhci + * instead of external dma devices. + */ + else if (ret) + sdhci_switch_external_dma(host, false); + /* disable internal dma sources */ + else + host->flags &= ~(sdhci_use_sdma | sdhci_use_adma); + } + + + if (host->use_external_dma) + sdhci_external_dma_release(host); + + host->use_external_dma ? "external dma" : + if (host->use_external_dma) + sdhci_external_dma_release(host); + diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h + phys_addr_t mapbase; /* physical address base */ + bool use_external_dma; /* host selects to use external dma */ +#if is_enabled(config_mmc_sdhci_external_dma) + struct dma_chan *rx_chan; + struct dma_chan *tx_chan; +#endif + +void sdhci_switch_external_dma(struct sdhci_host *host, bool en);
|
Multi Media Card (MMC)
|
18e762e3b7a7be764c50957edd2fa0879cb9c67e
|
chunyan zhang
|
drivers
|
mmc
|
host
|
mtd: spi-nor: add support for at25sl321
|
this was tested in single, dual and quad mode on a custom board with the nxp flexspi controller.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add support for at25sl321
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['spi-nor']
|
['c']
| 1
| 3
| 0
|
--- diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c + { "at25sl321", info(0x1f4216, 0, 64 * 1024, 64, + sect_4k | spi_nor_dual_read | spi_nor_quad_read) }, +
|
Memory Technology Devices (MTD)
|
ccfb9299a0b63da4fde607c822e1470472a46177
|
michael walle
|
drivers
|
mtd
|
spi-nor
|
mtd: spi-nor: add support for mx25r3235f
|
add mtd support for the macronix mx25r3235f spi nor chip from macronix. the chip has 4mb of total capacity, divided into a total of 64 sectors, each 64kb sized. the chip also supports 4kb large sectors. additionally, it supports dual and quad read modes.
|
this release adds wireguard, an fast and secure vpn design that aims to replace other vpns; initial support for usb 4; support for time namespaces; asynchronous ssd trimming in btrfs; initial merge of the multipath tcp support; support for virtualbox guest shared folders; a simple file system to expose the zones of zoned storage devices as files; boot-time tracing, which lets to trace the boot-time process with all the features of ftrace; and bootconfig, created to configure boot-time tracing, which lets to extend the command line in a file attached to initrds. as always, there are many other new drivers and improvements.
|
add support for mx25r3235f
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'power management', 'cryptography', 'security', 'networking', 'architectures x86 s390 riscv mips powerpc csky microblaze sparc uml arc']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'hardware random number generator (hwrng)', 'cryptography hardware acceleration', 'pci', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'various']
|
['spi-nor']
|
['c']
| 1
| 2
| 0
|
--- diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c + { "mx25r3235f", info(0xc22816, 0, 64 * 1024, 64, + sect_4k | spi_nor_dual_read | spi_nor_quad_read) },
|
Memory Technology Devices (MTD)
|
707745e8d4e75b638b990d67950ab292b3b8ea2a
|
david bauer
|
drivers
|
mtd
|
spi-nor
|
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