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https://en.wikipedia.org/wiki/Google_Search#167 | , 2024.
- ^ Milmo, Dan (November 21, 2024). "Google must sell Chrome to end search monopoly, says US justice department". The Guardian. ISSN 0261-3077. Retrieved January 7, 2025.
- ^ Godoy, Jody (December 23, 2024). "Google offers to loosen search deals in US antitrust case remedy". Reuters. Retrieved January 7, 2025.
... |
https://en.wikipedia.org/wiki/Google_Search#168 | 2. Retrieved April 10, 2019.
- ^ Ash, Karen Artz; Danow, Bret J. ""Google It": The Search Engine's Trademark May Be a Verb, But It's Not Generic". The National Law Review. Archived from the original on April 10, 2019. Retrieved April 10, 2019.
- ^ "Feedback: Weight in dollars squared". New Scientist. June 5, 2013. Arch... |
https://en.wikipedia.org/wiki/Google_Search#169 | d Foreign Pages" Search Option Due To Lack Of Use". Search Engine Land. Archived from the original on October 17, 2017. Retrieved December 15, 2017.
- ^ "Google Instant Search: The Complete User's Guide". Search Engine Land. September 8, 2010. Archived from the original on October 20, 2021. Retrieved October 5, 2021.
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https://en.wikipedia.org/wiki/Google_Search#170 | Mayer, Marissa (September 8, 2010). "Search: now faster than the speed of type". Official Google Blog. Archived from the original on December 15, 2017. Retrieved December 15, 2017.
- ^ Wagner, Matt Van (September 20, 2010). "How Google Saved $100 Million By Launching Google Instant". Search Engine Land. Archived from t... |
https://en.wikipedia.org/wiki/Google_Search#171 | nes". Official Google Blog. Archived from the original on December 15, 2017. Retrieved December 15, 2017.
- ^ Pash, Adam (September 8, 2010). "How to Turn Off Google Instant Search". Lifehacker. Univision Communications. Archived from the original on December 16, 2017. Retrieved December 15, 2017.
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- ^ Horn, Leslie (September 29, 2010). "Google Instant Blacklist: Which Words Are Blocked?". PC Magazine. Ziff Davis. Retrieved December 15, 2017.
- ^ Schwartz, Barry (July 26, 2017). "Google has dropped Google Instant Search". Search Engine Land. Archived from the original on December... |
https://en.wikipedia.org/wiki/Google_Search#173 | use it makes no sense on mobile". The Verge. Vox Media. Archived from the original on December 15, 2017. Retrieved December 15, 2017.
- ^ Singel, Ryan (November 9, 2010). "Google Gives Searchers 'Instant Previews' of Result Pages". Wired. Retrieved October 5, 2021.
- ^ "Google Drops Instant Previews Over Low Usage". se... |
https://en.wikipedia.org/wiki/Google_Search#174 | s – Web Search Help". Web Search Help. May 2010. Archived from the original on May 24, 2010. Retrieved July 7, 2010.
- ^ "Encrypted.google.com". Archived from the original on December 29, 2013. Retrieved August 4, 2012.
- ^ "Google Will Start Encrypting Your Searches". Time. March 13, 2014. Retrieved February 6, 2017.
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https://en.wikipedia.org/wiki/Google_Search#175 | oogle launches Real-Time Search" Archived January 26, 2021, at the Wayback Machine. Mashable. Retrieved July 12, 2010.
- ^ "Relevance meets the real-time web" Archived April 7, 2019, at the Wayback Machine. Google. Retrieved July 12, 2010.
- ^ "As Deal With Twitter Expires, Google Realtime Search Goes Offline". Searche... |
https://en.wikipedia.org/wiki/Google_Search#176 | h Now Includes A Fraction Of Facebook Status Updates" Archived October 31, 2019, at the Wayback Machine. TechCrunch. Retrieved July 12, 2010.
- ^ "Google's Real-Time Search Ready to Challenge Bing" Archived July 6, 2012, at the Wayback Machine. PC World. Retrieved July 12, 2010.
- ^ Quotes delayed at least 15 min (Dece... |
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{{cite web}}
: CS1 maint: numeric names: authors list (link) - ^ "Google Realtime Search Goes Missing". Searchengineland.com. July 3, 2011. Archived from the original on February 14, 2014. Retrieved March 3, 2014.
Further reading
- Google Hacks from O'Reilly is a book containin... |
https://en.wikipedia.org/wiki/Google_Search#178 | Milstein and Rael Dornfest (O'Reilly, 2004). ISBN 0-596-00613-6
- How to Do Everything with Google by Fritz Schneider, Nancy Blachman, and Eric Fredricksen (McGraw-Hill Osborne Media, 2003). ISBN 0-07-223174-2
- Google Power by Chris Sherman (McGraw-Hill Osborne Media, 2005). ISBN 0-07-225787-3
- Barroso, Luiz Andre; D... |
https://en.wikipedia.org/wiki/Google_Search#179 | 09/MM.2003.1196112. ISSN 0272-1732. S2CID 15886858.
- Broderick, Ryan (August 28, 2023). "The end of the Googleverse". The Verge. Archived from the original on August 28, 2023. Retrieved August 30, 2023.
- Belanger, Ashley (October 27, 2023). "Google loses fight to hide 2021 money pit: $26B in default contracts". Ars T... |
https://en.wikipedia.org/wiki/Michael_Gschwind#0 | Michael Gschwind
Michael Karl Gschwind is an American computer scientist at Nvidia in Santa Clara, California. He is recognized for his seminal contributions to the design and exploitation of general-purpose programmable accelerators, as an early advocate of sustainability in computer design and as a prolific inventor.... |
https://en.wikipedia.org/wiki/Michael_Gschwind#1 | lerators and is widely recognized for his contributionsHeterogeneous computing as architect of the Cell Broadband Engine processor used in the Sony PlayStation 3,[2][3] and RoadRunner, the first supercomputer to reach sustained Petaflop operation. As Chief Architect for IBM System Architecture, he led the integration o... |
https://en.wikipedia.org/wiki/Michael_Gschwind#2 | zation[4][5] and as IBM System Chief Architect led I/O and accelerator virtualization.[6]
Gschwind has had a critical influence on the development of accelerator programming models with the development of APIs and best practices for accelerator programming,[7][8][9][10][11] application studies for a diverse range of HP... |
https://en.wikipedia.org/wiki/Michael_Gschwind#3 | erator-based systems.
AI acceleration
[edit]Gschwind was an early advocate of AI Hardware Acceleration with GPUs and programmable accelerators. As IBM's Chief Engineer for AI, he led the development of IBM's first AI products and initiated the PowerAI project which brought to market AI-optimized hardware (codenamed "Mi... |
https://en.wikipedia.org/wiki/Michael_Gschwind#4 | inary package-managed AI software stacks paving the path for adoption.[16]
At Facebook, Gschwind demonstrated accelerated Large Language Models (LLMs) for Facebook's First Generation ASIC accelerators and for GPUs, leading the first LLLM production deployments at scale for embedding serving for content analysis and pla... |
https://en.wikipedia.org/wiki/Michael_Gschwind#5 | development of and is one of the architects of Multiray, an accelerator-based platform for serving foundation models and the first production system to serve Large Language Models at scale in the industry, serving over 800 billion queries per day in 2022.[18][19]
Gschwind led the company-wide adoption of ASIC[20] and F... |
https://en.wikipedia.org/wiki/Michael_Gschwind#6 | erburg in his earnings call. Among the first recommendation models deployed with GPU Inference was a Reels video recommendation model which delivered a 30% user surge within 2 weeks of deployment, as reported by FB CEO Mark Zuckerburg in his Q1 2022 earnings call,[21] and a subsequent $3B to $10B growth for REeels year... |
https://en.wikipedia.org/wiki/Michael_Gschwind#7 | evelopment of Accelerated Transformers[23] (formerly "Better Transformer"[24]) and partnered with companies such as HuggingFace to drive industry-wide LLM Acceleration[25] to establish PyTorch 2.0 as the standard ecosystem for Large Language Models and Generative AI.[26][27][28] [29]
Gschwind subsequently led expanding... |
https://en.wikipedia.org/wiki/Michael_Gschwind#8 | tive AI feasible for the first time.[30] ExecuTorch LLM acceleration (across multiple surfaces including NPUs, MPS, and Qualcomm accelerators) delivered significant speedups making it practical to deploy Llama3 unmodified on servers and on-device (demonstrated on iOS, Android, and Raspberry Pi 5) at launch with develop... |
https://en.wikipedia.org/wiki/Michael_Gschwind#9 | acks and frameworks, AI accelerators, mobile/embedded on-device AI and low-precision numeric representations in torchchat,[33][34] representing a seminal milestone as the industry's first integrated softwarestack for servers and on-device AI with support for a broad set of server and embedded/mobile accelerators.
Gschw... |
https://en.wikipedia.org/wiki/Michael_Gschwind#10 | and software architecture for several supercomputers, including three top-ranked supercomputer systems Roadrunner (June 2008 – November 2009), Sequoia (June 2012 – November 2012), and Summit (June 2018 – June 2020).
Roadrunner was a supercomputer built by IBM for the Los Alamos National Laboratory in New Mexico, USA. T... |
https://en.wikipedia.org/wiki/Michael_Gschwind#11 | o become the world's first TOP500 LINPACK sustained 1.0 petaflops system.[36][37] It was also the fourth-most energy-efficient supercomputer in the world on the Supermicro Green500 list, with an operational rate of 444.94 megaflops per watt of power used.
Sequoia was a petascale Blue Gene/Q supercomputer constructed by... |
https://en.wikipedia.org/wiki/Michael_Gschwind#12 | ered to the Lawrence Livermore National Laboratory (LLNL) in 2011 and was fully deployed in June 2012.[38] Sequoia was dismantled in 2020, its last position on the top500.org list was #22 in the November 2019 list.
Summit is a supercomputer developed by IBM for use at Oak Ridge Leadership Computing Facility (OLCF), a f... |
https://en.wikipedia.org/wiki/Michael_Gschwind#13 | INPACK benchmark is clocked at 148.6 petaFLOPS.[41]
Many-core processor design
[edit]Gschwind was an early advocate of many-core processor design to overcome the power and performance limitations of single-processor designs. Gschwind co-authored an analysis of the limitations of frequency scaling which arguably led to ... |
https://en.wikipedia.org/wiki/Michael_Gschwind#14 | irst commercial many-core processor Cell with 9 cores, BlueGene/Q with 18 cores, and several enterprise and mainframe processors (POWER7/POWER8/POWER9 with up to 24 cores; z10-z15 with up to 12 cores).
As chip chief architect and chief microarchitect, Gschwind was critical to the reboot of the POWER architecture after ... |
https://en.wikipedia.org/wiki/Michael_Gschwind#15 | t lead and chief microarchitect for the instruction fetch, decode and branch prediction unit (also including logical instruction execution), and as acting lead for most other units at one point during the design. In subsequent generations of the POWER architecture, integration of the VMX SIMD design and FPU into VSX, l... |
https://en.wikipedia.org/wiki/Michael_Gschwind#16 | integration for the Minsky PowerAI system), and integration of NVLink for optimized GPU/CPU integration; and native support for Linux-style hardware-managed radix page-tables in POWER9, used in the world-leading Summit and Sierra Power+Nvidia supercomputers; and the introduction of PC-relative addressing and prefix ins... |
https://en.wikipedia.org/wiki/Michael_Gschwind#17 | /manager and cross-platform chief architect, Gschwind also led the reboot of system z mainframe, with introduction of compiled code efficiency (with a particular view to C, C++ and Java) in IBM z10, out-of-order execution, PCIe-based I/O in z196 and z114, support for transactional memory in IBM zEC12, introduction of h... |
https://en.wikipedia.org/wiki/Michael_Gschwind#18 | and the sunsetting of ESA390 for operating systems[44] substantially reducing verification and design complexity and improving time-to-market in IBM z14.
System reliability
[edit]Gschwind coined the term "reliability wall" for obstacles to sustained operation of large-scale systems. He has made major contributions to s... |
https://en.wikipedia.org/wiki/Michael_Gschwind#19 | s chief architect of BlueGene/Q, he led system-level reliability and processor design in addition to being the chief ISA architect and QPU vector floating point unit design lead.[45][46]
Gschwind led the first processor and chip-level architectural vulnerability modeling and selective hardening to achieve target MTBF, ... |
https://en.wikipedia.org/wiki/Michael_Gschwind#20 | while avoiding the performance and power cost associated with ECC-based designs, Gschwind proposed and led the design of register files and minor buses protected with parity with state recovery. In accordance with this approach, error detection is implemented in datapaths which may occur in parallel with initiating com... |
https://en.wikipedia.org/wiki/Michael_Gschwind#21 | om good-state maintained in alternate copies of the register file commonly used to scale the number of register file read portsa and reduce wiring delay from register file reads to execution units.[48]
Compiler technologies
[edit]Gschwind has made seminal contributions to compiler technology, with a particular emphasis... |
https://en.wikipedia.org/wiki/Michael_Gschwind#22 | .
Just-in-time-compilation
[edit]Gschwid was an early proponent of just-in-time compilation and has been a driving force in the field. He has proposed critical improvements for the implementation of JIT compilation based systems, with a particular view to dynamic optimization, binary translation and virtual machine imp... |
https://en.wikipedia.org/wiki/Michael_Gschwind#23 | performance computing optimization such as software pipelining at JIT translation time,[50][51] hardware/software co-design for binary emulation and dynamic optimization.[52][53][54][55] Gschwind's seminal contributions to Virtual Machine design and implementation are reflected by being the most-cited author in the `Vi... |
https://en.wikipedia.org/wiki/Michael_Gschwind#24 | s credited with seminal contributions for compilers and programming environments for general-purpose programmable accelerators and GPUs, building the first general purpose GPU frameworks, APIs and optimizations for Cell. His contributions include performance monitoring, code partitioning, code optimization, code partit... |
https://en.wikipedia.org/wiki/Michael_Gschwind#25 | register files to resolve phase ordering issues in auto-vectorization between unit assignment and vectorization decisions to simplify the cost model, an innovation adopted by general-purpose programmable accelerators, including the Cell SPU and GPUs, and general-purpose CPU designs, starting with Gschwind's pioneering ... |
https://en.wikipedia.org/wiki/Michael_Gschwind#26 | h-performance execution of AI workloads.[63] [29] [30]
System and compiler APIs
[edit]Gschwind led the development of the ELFv2 Power execution environment, which has been broadly adopted for Power execution environments. Advantageously, the new environment updates the APIs and ABIs for object-oriented environments. De... |
https://en.wikipedia.org/wiki/Michael_Gschwind#27 | ew little-endian version of Linux on Power. This has since been adopted for all Linux versions on Power servers and to support GPU acceleration with Nvidia GPUs, e.g., in the Minsky AI-optimized servers and the Summit and Sierra supercomputers.[64][65][66]
SIMD Parallel vector architecture
[edit]Gschwind is a pioneer o... |
https://en.wikipedia.org/wiki/Michael_Gschwind#28 | pilation, Gschwind proposed the implementation of merged scalar and vector execution units, eliminating the cost of copies between scalar and vectorized code, and simplifying compiler architecture by resolving phase ordering problems in compilers.
The Cell's accelerator cores (Synergistic Processor Unit SPU) contain a ... |
https://en.wikipedia.org/wiki/Michael_Gschwind#29 | he simplified cost model leads to significantly improved vectorization success, improving overall program performance and efficiency.[68]
The vector-scalar approach was also adopted by the IBM Power VSX (Vector Scalar Extension) SIMD instructions,[69] BlueGene/Q vector instructions[70][71] and System/z mainframe vector... |
https://en.wikipedia.org/wiki/Michael_Gschwind#30 | or IBM System Architecture.
Service, education, diversity, inclusion and digital inclusion
[edit]Gschwind is a strong believer in the power of education and its power to help overcome the effects of all types of discrimination and colonialism. He has served as faculty member at [Princeton] and [TU Wien] to advance educ... |
https://en.wikipedia.org/wiki/Michael_Gschwind#31 | the expansion and improvement of Senegal's education and research network, snRER.
Background
[edit]Gschwind was born in Vienna and obtained his doctorate degree in Computer Engineering at the Technische Universität Wien in 1996. He joined the IBM Thomas J. Watson Research Center in Yorktown Heights, NY and also held po... |
https://en.wikipedia.org/wiki/Michael_Gschwind#32 | tificial Intelligence and Accelerated Systems at Huawei. Gschwind is currently a software engineer at Meta Platforms where he has been responsible for AI Acceleration and AI infrastructure.[citation needed]
References
[edit]- ^ "Michael Karl Gschwind". www.ppubs.uspto.gov.
- ^ David Becker (December 3, 2004). "PlayStat... |
https://en.wikipedia.org/wiki/Michael_Gschwind#33 | r games, graphics, and computation. Pearson Education.
- ^ https://on-demand.gputechconf.com/gtc/2017/presentation/S7320-tim-kaldewey-optimizing-efficiency-of-deep-learning-workloads-through-gpu-virtualization.pdf, https://on-demand.gputechconf.com/gtc/2017/presentation/S7320-tim-kaldewey-optimizing-efficiency-of-deep-... |
https://en.wikipedia.org/wiki/Michael_Gschwind#34 | n, https://ieeexplore.ieee.org/document/8030299
- ^ I/O Vrtualization and System Acceleration in Power9, https://old.hotchips.org/wp-content/uploads/hc_archives/hc27/HC27.24-Monday-Epub/HC27.24.30-HP-Cloud-Comm-Epub/HC27.24.340-IO-Virtualization-POWER8-Gschwind-IBM.pdf
- ^ Gschwind, Michael (2007-06-01). "The Cell Broa... |
https://en.wikipedia.org/wiki/Michael_Gschwind#35 | 35 (3): 233–262. doi:10.1007/s10766-007-0035-4. ISSN 1573-7640.
- ^ "ntegrated execution: A programming model for accelerators". Retrieved 2024-09-04.
- ^ Chip Multiprocessing and the Cell Broadband Engine, https://computingfrontiers.org/2006/cf06-gschwind.pdf
- ^ CBE Programming Handbook
- ^ CBE Programming Tutorial, ... |
https://en.wikipedia.org/wiki/Michael_Gschwind#36 | ederico; Trancoso, Pedro; Gschwind, Michael (2010). "Application acceleration with the cell broadband engine". Computing in Science and Engineering. 12 (1): 76–81. Bibcode:2010CSE....12a..76S. doi:10.1109/MCSE.2010.4. ISSN 1521-9615.
- ^ Cell GC: using the cell synergistic processor as a garbage collection coprocessor,... |
https://en.wikipedia.org/wiki/Michael_Gschwind#37 | ns (eds), High Performance Computing with the Cell Broadband Engine Scientific Programming 2009, https://www.semanticscholar.org/paper/High-Performance-Computing-with-the-Cell-Broadband-Gschwind-Gustavson/c6775765100eb3b9eb7b7bc003a8eba1ca90667f
- ^ M. Gschwind, M. Perrone (Eds), Topical Issue On Hybrid Systems IBM Jou... |
https://en.wikipedia.org/wiki/Michael_Gschwind#38 | k for AI on Power". Retrieved 2024-09-04.
- ^ "From Ingestion to Deployment for Large Language Models | GTC Digital September 2022 | NVIDIA On-Demand". NVIDIA. Retrieved 2024-09-04.
- ^ "MultiRay: Optimizing efficiency for large-scale AI models". ai.meta.com. Retrieved 2023-10-28.
- ^ MultiRay: An Accelerated Embedding... |
https://en.wikipedia.org/wiki/Michael_Gschwind#39 | Generation Inference Accelerator Deployment at Facebook, https://arxiv.org/pdf/2107.04140.pdf
- ^ "Mark Zuckerberg says AI boosts monetization by 30% on Instagram, 40% on Facebook". Yahoo Finance. 2023-04-27. Retrieved 2024-09-04.
- ^ Gairola, Ananya. "From $3B to $10B: Meta's AI-Driven Reels Skyrocketed Revenue Growth... |
https://en.wikipedia.org/wiki/Michael_Gschwind#40 | 23-10-28.
- ^ "A BetterTransformer for Fast Transformer Inference". pytorch.org. Retrieved 2023-10-28.
- ^ Belkada, Younes (2022-11-21). "BetterTransformer, Out of the Box Performance for Hugging Face Transformers". PyTorch. Retrieved 2024-09-04.
- ^ "PyTorch 2.0: Our next generation release that is faster, more Python... |
https://en.wikipedia.org/wiki/Michael_Gschwind#41 | rieved 2024-09-04.
- ^ "Accelerating Large Language Models with Accelerated Transformers". PyTorch. Retrieved 2024-09-04.
- ^ a b Ansel, Jason; Yang, Edward; He, Horace; Gimelshein, Natalia; Jain, Animesh; et al. (27 April 2024). "PyTorch 2: Faster Machine Learning Through Dynamic Python Bytecode Transformation and Gra... |
https://en.wikipedia.org/wiki/Michael_Gschwind#42 | ting Systems (ASPLOS '24), Volume 2. ACM. pp. 929–947. doi:10.1145/3620665.3640366.
- ^ a b "ExecuTorch Alpha: Taking LLMs and AI to the Edge with Our Community and Partners". PyTorch. Retrieved 2024-09-04.
- ^ "Layla v4.6.0 has been published!". Layla. 2024-04-26. Retrieved 2024-09-04.
- ^ "⚡️Blazing fast LLama2-7B-Ch... |
https://en.wikipedia.org/wiki/Michael_Gschwind#43 | ting Local LLM Inference on Laptop, Desktop and Mobile". PyTorch. Retrieved 2024-09-04.
- ^ pytorch/torchchat, pytorch, 2024-09-04, retrieved 2024-09-04
- ^ Sustainable AI: Environmental Implications, Challenges and Opportunities, https://arxiv.org/pdf/2111.00364.pdf
- ^ Gaudin, Sharon (2008-06-09). "IBM's Roadrunner s... |
https://en.wikipedia.org/wiki/Michael_Gschwind#44 | , Jonathan (2008-06-09). "Supercomputer sets petaflop pace". BBC News. Retrieved 2008-06-09.
- ^ NNSA awards IBM contract to build next generation supercomputer, February 3, 2009
- ^ Lohr, Steve (8 June 2018). "Move Over, China: U.S. Is Again Home to World's Speediest Supercomputer". The New York Times. Retrieved 19 Ju... |
https://en.wikipedia.org/wiki/Michael_Gschwind#45 | uter Sites". TOP500. Retrieved 13 April 2022.
- ^ "Optimizing pipelines for power and performance". Retrieved 2024-09-04.
- ^ a b Schwarz, E. M.; Krishnamurthy, R. B.; Parris, C. J.; Bradbury, J. D.; Nnebe, I. M.; Gschwind, M. (2015-07-01). "The SIMD accelerator for business analytics on the IBM z13". IBM J. Res. Dev. ... |
https://en.wikipedia.org/wiki/Michael_Gschwind#46 | zed in multiple architectures, US Patent 9,588,774, https://patents.google.com/patent/US9588774B2
- ^ "Michael Gschwind - ICS 2012 BlueGeneQ keynote presentation". Retrieved 2024-09-04.
- ^ US9081501B2, Asaad, Sameh; Bellofatto, Ralph E. & Blocksome, Michael A. et al., "Multi-petascale highly efficient parallel superco... |
https://en.wikipedia.org/wiki/Michael_Gschwind#47 | cise tracking of transient faults and vulnerability analysis at processor design time". 2011 IEEE 29th International Conference on Computer Design (ICCD). pp. 404–410. doi:10.1109/ICCD.2011.6081430. ISBN 978-1-4577-1954-7. Retrieved 2024-09-04.
- ^ US7512772B2, Gschwind, Michael Karl & Philhower, Robert, "Soft error ha... |
https://en.wikipedia.org/wiki/Michael_Gschwind#48 | .
- ^ "Optimizations and oracle parallelism with dynamic translation". Retrieved 2024-09-04.
- ^ "Dynamic and Transparent Binary Translation". Retrieved 2024-09-04.
- ^ "Dynamic binary translation and optimization". Retrieved 2024-09-04.
- ^ Altman, E.R.; Ebcioglu, K.; Gschwind, M.; Sathaye, S. (2001). "Advances and fu... |
https://en.wikipedia.org/wiki/Michael_Gschwind#49 | ved 2024-09-04.
- ^ Binary translation and architecture convergence issues for IBM System/390, https://www.researchgate.net/profile/Michael-Gschwind/publication/221235791_Binary_translation_and_architecture_convergence_issues_for_IBM_system390/links/0046352f27d9de5653000000/Binary-translation-and-architecture-convergen... |
https://en.wikipedia.org/wiki/Michael_Gschwind#50 | E, https://ieeexplore.ieee.org/document/964447
- ^ Smith, Nair, Virtual Machines: Versatile Platforms for Systems and Processes, https://www.amazon.com/Virtual-Machines-Versatile-Platforms-Architecture/dp/1558609105
- ^ Valentina Salapura; Karthik Ganesan; Alan Gara; Michael Gschwind; James C. Sexton; Robert E. Walkup ... |
https://en.wikipedia.org/wiki/Michael_Gschwind#51 | Symposium on Performance Analysis of Systems and software. IEEE.
- ^ Eichenberger, Alexandre E.; O'Brien, Kathryn; O'Brien, Kevin; Wu, Peng; Chen, Tong; Oden, Peter H.; Prener, Daniel A.; Shepherd, Janice C.; So, Byoungro; Sura, Zehra; Wang, Amy; Zhang, Tao; Zhao, Peng; Gschwind, Michael (2005-09-17). "14th Internation... |
https://en.wikipedia.org/wiki/Michael_Gschwind#52 | tures and Compilation Techniques (PACT'05). PACT '05. USA: IEEE Computer Society. pp. 161–172. doi:10.1109/PACT.2005.33. ISBN 978-0-7695-2429-0.
- ^ Gschwind, Michael; Erb, David; Manning, Sid; Nutter, Mark (25 June 2007). "An Open Source Environment for Cell Broadband Engine System Software". Computer. 40 (6). IEEE: 3... |
https://en.wikipedia.org/wiki/Michael_Gschwind#53 | l Broadband Engine (PDF). ACM Computing Frontiers 2006 (Keynote speech).
- ^ Gschwind, Michael (2007-06-01). "The Cell Broadband Engine: Exploiting Multiple Levels of Parallelism in a Chip Multiprocessor". International Journal of Parallel Programming. 35 (3): 233–262. doi:10.1007/s10766-007-0035-4. ISSN 1573-7640.
- ^... |
https://en.wikipedia.org/wiki/Michael_Gschwind#54 | ): 4:1–4:14. doi:10.1147/JRD.2009.5429070.
- ^ "First-Generation Inference Accelerator Deployment at Facebook". research.facebook.com. Retrieved 2024-09-04.
- ^ OpenPOWER Reengineering a server ecosystem for large-scale data centers, https://old.hotchips.org/wp-content/uploads/hc_archives/hc26/HC26-12-day2-epub/HC26.12... |
https://en.wikipedia.org/wiki/Michael_Gschwind#55 | p.rtems.org/pub/rtems/people/sebh/ABI64BitOpenPOWERv1.1_16July2015_pub.pdf
- ^ "Reengineering a server ecosystem for enhanced portability and performance". Retrieved 2024-09-04.
- ^ Gschwind, Michael; Hofstee, H. Peter; Flachs, Brian; Hopkins, Martin; Watanabe, Yukio; Yamazaki, Takeshi (2006). "Synergistic Processing i... |
https://en.wikipedia.org/wiki/Michael_Gschwind#56 | ndre E.; O'Brien, Kathryn; O'Brien, Kevin; Wu, Peng; Chen, Tong; Oden, Peter H.; Prener, Daniel A.; Shepherd, Janice C.; So, Byoungro; Sura, Zehra; Wang, Amy; Zhang, Tao; Zhao, Peng; Gschwind, Michael (2005-09-17). "Optimizing Compiler for the CELL Processor". 14th International Conference on Parallel Architectures and... |
https://en.wikipedia.org/wiki/Michael_Gschwind#57 | 29-0.
- ^ Gschwind, M. (2016). "Workload acceleration with the IBM POWER vector-scalar architecture". IBM Journal of Research and Development. 60 (2–3): 14:1–14:18. doi:10.1147/JRD.2016.2527418. Retrieved 2024-09-04.
- ^ Haring, Ruud; Ohmacht, Martin; Fox, Thomas; Gschwind, Michael; Satterfield, David; Sugavanam, Krish... |
https://en.wikipedia.org/wiki/Michael_Gschwind#58 | rman; Kim, Changhoan (2012). "The IBM Blue Gene/Q Compute Chip". IEEE Micro. 32 (2): 48–60. doi:10.1109/MM.2011.108. Retrieved 2024-09-04.
- ^ Morgan, Timothy Prickett (22 November 2010). "IBM uncloaks 20 petaflops BlueGene/Q super". The Register.
- ^ SIMD Processing on IBM z14, z13 and z13s, https://www.ibm.com/downlo... |
https://en.wikipedia.org/wiki/Central_processing_unit#0 | Central processing unit
A central processing unit (CPU), also called a central processor, main processor, or just processor, is the primary processor in a given computer.[1][2] Its electronic circuitry executes instructions of a computer program, such as arithmetic, logic, controlling, and input/output (I/O) operations... |
https://en.wikipedia.org/wiki/Central_processing_unit#1 | ssors such as graphics processing units (GPUs).
The form, design, and implementation of CPUs have changed over time, but their fundamental operation remains almost unchanged.[7] Principal components of a CPU include the arithmetic–logic unit (ALU) that performs arithmetic and logic operations, processor registers that ... |
https://en.wikipedia.org/wiki/Central_processing_unit#2 | ), decoding and execution (of instructions) by directing the coordinated operations of the ALU, registers, and other components. Modern CPUs devote a lot of semiconductor area to caches and instruction-level parallelism to increase performance and to CPU modes to support operating systems and virtualization.
Most moder... |
https://en.wikipedia.org/wiki/Central_processing_unit#3 | with multiple CPUs are called multi-core processors.[8] The individual physical CPUs, called processor cores, can also be multithreaded to support CPU-level multithreading.[9]
An IC that contains a CPU may also contain memory, peripheral interfaces, and other components of a computer;[10] such integrated devices are va... |
https://en.wikipedia.org/wiki/Central_processing_unit#4 | rewired to perform different tasks, which caused these machines to be called "fixed-program computers".[11] The "central processing unit" term has been in use since as early as 1955.[12][13] Since the term "CPU" is generally defined as a device for software (computer program) execution, the earliest devices that could ... |
https://en.wikipedia.org/wiki/Central_processing_unit#5 | present in the design of John Presper Eckert and John William Mauchly's ENIAC, but was initially omitted so that it could be finished sooner.[14] On June 30, 1945, before ENIAC was made, mathematician John von Neumann distributed a paper entitled First Draft of a Report on the EDVAC. It was the outline of a stored-prog... |
https://en.wikipedia.org/wiki/Central_processing_unit#6 | s (or operations) of various types. Significantly, the programs written for EDVAC were to be stored in high-speed computer memory rather than specified by the physical wiring of the computer.[16] This overcame a severe limitation of ENIAC, which was the considerable time and effort required to reconfigure the computer ... |
https://en.wikipedia.org/wiki/Central_processing_unit#7 | of the memory. EDVAC was not the first stored-program computer; the Manchester Baby, which was a small-scale experimental stored-program computer, ran its first program on 21 June 1948[18] and the Manchester Mark 1 ran its first program during the night of 16–17 June 1949.[19]
Early CPUs were custom designs used as par... |
https://en.wikipedia.org/wiki/Central_processing_unit#8 | as largely given way to the development of multi-purpose processors produced in large quantities. This standardization began in the era of discrete transistor mainframes and minicomputers, and has rapidly accelerated with the popularization of the integrated circuit (IC). The IC has allowed increasingly complex CPUs to... |
https://en.wikipedia.org/wiki/Central_processing_unit#9 | ave increased the presence of digital devices in modern life far beyond the limited application of dedicated computing machines. Modern microprocessors appear in electronic devices ranging from automobiles[22] to cellphones,[23] and sometimes even in toys.[24][25]
While von Neumann is most often credited with the desig... |
https://en.wikipedia.org/wiki/Central_processing_unit#10 | rs before him, such as Konrad Zuse, had suggested and implemented similar ideas.[26] The so-called Harvard architecture of the Harvard Mark I, which was completed before EDVAC,[27][28] also used a stored-program design using punched paper tape rather than electronic memory.[29] The key difference between the von Neuman... |
https://en.wikipedia.org/wiki/Central_processing_unit#11 | uses the same memory space for both.[30] Most modern CPUs are primarily von Neumann in design, but CPUs with the Harvard architecture are seen as well, especially in embedded applications; for instance, the Atmel AVR microcontrollers are Harvard-architecture processors.[31]
Relays and vacuum tubes (thermionic tubes) we... |
https://en.wikipedia.org/wiki/Central_processing_unit#12 | e overall speed of a system is dependent on the speed of the switches. Vacuum-tube computers such as EDVAC tended to average eight hours between failures, whereas relay computers—such as the slower but earlier Harvard Mark I—failed very rarely.[13] In the end, tube-based CPUs became dominant because the significant spe... |
https://en.wikipedia.org/wiki/Central_processing_unit#13 | compared to modern microelectronic designs. Clock signal frequencies ranging from 100 kHz to 4 MHz were very common at this time, limited largely by the speed of the switching devices they were built with.[34]
Transistor CPUs
[edit]The design complexity of CPUs increased as various technologies facilitated the building... |
https://en.wikipedia.org/wiki/Central_processing_unit#14 | d CPUs during the 1950s and 1960s no longer had to be built out of bulky, unreliable, and fragile switching elements, like vacuum tubes and relays.[35] With this improvement, more complex and reliable CPUs were built onto one or several printed circuit boards containing discrete (individual) components.
In 1964, IBM in... |
https://en.wikipedia.org/wiki/Central_processing_unit#15 | different speeds and performances.[36] This was significant at a time when most electronic computers were incompatible with one another, even those made by the same manufacturer. To facilitate this improvement, IBM used the concept of a microprogram (often called "microcode"), which still sees widespread use in modern ... |
https://en.wikipedia.org/wiki/Central_processing_unit#16 | y that is continued by similar modern computers like the IBM zSeries.[38][39] In 1965, Digital Equipment Corporation (DEC) introduced another influential computer aimed at the scientific and research markets—the PDP-8.[40]
Transistor-based computers had several distinct advantages over their predecessors. Aside from fa... |
https://en.wikipedia.org/wiki/Central_processing_unit#17 | se of the short switching time of a transistor in comparison to a tube or relay.[41] The increased reliability and dramatically increased speed of the switching elements, which were almost exclusively transistors by this time; CPU clock rates in the tens of megahertz were easily obtained during this period.[42] Additio... |
https://en.wikipedia.org/wiki/Central_processing_unit#18 | ata (SIMD) vector processors began to appear.[43] These early experimental designs later gave rise to the era of specialized supercomputers like those made by Cray Inc and Fujitsu Ltd.[43]
Small-scale integration CPUs
[edit]During this period, a method of manufacturing many interconnected transistors in a compact space... |
https://en.wikipedia.org/wiki/Central_processing_unit#19 | ed die, or "chip". At first, only very basic non-specialized digital circuits such as NOR gates were miniaturized into ICs.[44] CPUs based on these "building block" ICs are generally referred to as "small-scale integration" (SSI) devices. SSI ICs, such as the ones used in the Apollo Guidance Computer, usually contained... |
https://en.wikipedia.org/wiki/Central_processing_unit#20 | uch less space and power than earlier discrete transistor designs.[45]
IBM's System/370, follow-on to the System/360, used SSI ICs rather than Solid Logic Technology discrete-transistor modules.[46][47] DEC's PDP-8/I and KI10 PDP-10 also switched from the individual transistors used by the PDP-8 and KA PDP-10 to SSI IC... |
https://en.wikipedia.org/wiki/Central_processing_unit#21 | ts once these became practical.
Large-scale integration CPUs
[edit]Lee Boysel published influential articles, including a 1967 "manifesto", which described how to build the equivalent of a 32-bit mainframe computer from a relatively small number of large-scale integration circuits (LSI).[49][50] The only way to build L... |
https://en.wikipedia.org/wiki/Central_processing_unit#22 | nufacturing process (either PMOS logic, NMOS logic, or CMOS logic). However, some companies continued to build processors out of bipolar transistor–transistor logic (TTL) chips because bipolar junction transistors were faster than MOS chips up until the 1970s (a few companies such as Datapoint continued to build proces... |
https://en.wikipedia.org/wiki/Central_processing_unit#23 | ations that required low power.[51][52] Following the development of silicon-gate MOS technology by Federico Faggin at Fairchild Semiconductor in 1968, MOS ICs largely replaced bipolar TTL as the standard chip technology in the late 1970s.[53]
As the microelectronic technology advanced, an increasing number of transist... |
https://en.wikipedia.org/wiki/Central_processing_unit#24 | unts to hundreds, and then thousands. By 1968, the number of ICs required to build a complete CPU had been reduced to 24 ICs of eight different types, with each IC containing roughly 1000 MOSFETs.[54] In stark contrast with its SSI and MSI predecessors, the first LSI implementation of the PDP-11 contained a CPU compose... |
https://en.wikipedia.org/wiki/Central_processing_unit#25 | pletely overtaken all other central processing unit implementation methods. The first commercially available microprocessor, made in 1971, was the Intel 4004, and the first widely used microprocessor, made in 1974, was the Intel 8080. Mainframe and minicomputer manufacturers of the time launched proprietary IC developm... |
https://en.wikipedia.org/wiki/Central_processing_unit#26 | t were backward-compatible with their older hardware and software. Combined with the advent and eventual success of the ubiquitous personal computer, the term CPU is now applied almost exclusively[a] to microprocessors. Several CPUs (denoted cores) can be combined in a single processing chip.[56]
Previous generations o... |
https://en.wikipedia.org/wiki/Central_processing_unit#27 | roprocessors, on the other hand, are CPUs manufactured on a very small number of ICs; usually just one.[58] The overall smaller CPU size, as a result of being implemented on a single die, means faster switching time because of physical factors like decreased gate parasitic capacitance.[59][60] This has allowed synchron... |
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