data_type large_stringclasses 3
values | source large_stringclasses 29
values | code large_stringlengths 98 49.4M | filepath large_stringlengths 5 161 ⌀ | message large_stringclasses 234
values | commit large_stringclasses 234
values | subject large_stringclasses 418
values | critique large_stringlengths 101 1.26M ⌀ | metadata dict |
|---|---|---|---|---|---|---|---|---|
lkml_critique | qemu-devel | The HTTPs curl block driver is a superset of the HTTP driver, reflect
that in the QAPI.
Suggested-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Antoine Damhet <adamhet@scaleway.com>
---
qapi/block-core.json | 13 ++-----------
1 file changed, 2 insertions(... | null | null | null | [PATCH v3 2/3] qapi: block: Refactor HTTP(s) common arguments | S3 presigned URLs are signed for a specific HTTP method (typically GET
for our use cases). The curl block driver currently issues a HEAD
request to discover the web server features and the file size, which
fails with 'HTTP 403' (forbidden).
Add a 'force-range' option that skips the HEAD request and instead
issues a mi... | {
"author": "Antoine Damhet <adamhet@scaleway.com>",
"date": "Fri, 27 Feb 2026 13:45:53 +0100",
"is_openbsd": false,
"thread_id": "20260227-fix-curl-v3-v3-1-eb8a4d88feef@scaleway.com.mbox.gz"
} |
lkml_critique | qemu-devel | The HTTPs curl block driver is a superset of the HTTP driver, reflect
that in the QAPI.
Suggested-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Antoine Damhet <adamhet@scaleway.com>
---
qapi/block-core.json | 13 ++-----------
1 file changed, 2 insertions(... | null | null | null | [PATCH v3 2/3] qapi: block: Refactor HTTP(s) common arguments | curl_multi_check_completion would bail upon the first completed
transfer even if more completion messages were available thus leaving
some in flight IOs stuck.
Rework a bit the loop to make the iterations clearer and drop the breaks.
The original hang can be somewhat reproduced with the following command:
$ qemu-img... | {
"author": "Antoine Damhet <adamhet@scaleway.com>",
"date": "Fri, 27 Feb 2026 13:45:51 +0100",
"is_openbsd": false,
"thread_id": "20260227-fix-curl-v3-v3-1-eb8a4d88feef@scaleway.com.mbox.gz"
} |
lkml_critique | qemu-devel | These functions are needed to support semihosting on CPUs that support
runtime-configurable endianness. They should not be used in other contexts.
Signed-off-by: Martin Kröning <martin.kroening@eonerc.rwth-aachen.de>
---
include/exec/tswap.h | 36 ++++++++++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
... | null | null | null | [PATCH v2 2/3] include/exec: Provide the cpu_internal_tswap()
functions | The semihosting ABI [1] states:
This commits ensures that semihosting data is properly byte-swapped if
the guest's CPU is currently in a different runtime-configurable
endianness than the host's CPU.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3258
Buglink: https://github.com/taiki-e/semihosting/issues/18... | {
"author": "=?utf-8?q?Martin_Kr=C3=B6ning?= via qemu development <qemu-devel@nongnu.org>",
"date": "Fri, 27 Feb 2026 13:54:32 +0100",
"is_openbsd": false,
"thread_id": "20260227-semihosting-cpu-tswap-v2-2-cbdcdf39dd15@eonerc.rwth-aachen.de.mbox.gz"
} |
lkml_critique | qemu-devel | These functions are needed to support semihosting on CPUs that support
runtime-configurable endianness. They should not be used in other contexts.
Signed-off-by: Martin Kröning <martin.kroening@eonerc.rwth-aachen.de>
---
include/exec/tswap.h | 36 ++++++++++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
... | null | null | null | [PATCH v2 2/3] include/exec: Provide the cpu_internal_tswap()
functions | These functions are needed to do semihosting on CPUs that support
runtime-configurable endiannes. This commit renames them and allows
using them for semihosting, but makes sure to signal that these
functions should not be used in other circumstances.
Signed-off-by: Martin Kröning <martin.kroening@eonerc.rwth-aachen.de... | {
"author": "=?utf-8?q?Martin_Kr=C3=B6ning?= via qemu development <qemu-devel@nongnu.org>",
"date": "Fri, 27 Feb 2026 13:54:30 +0100",
"is_openbsd": false,
"thread_id": "20260227-semihosting-cpu-tswap-v2-2-cbdcdf39dd15@eonerc.rwth-aachen.de.mbox.gz"
} |
lkml_critique | qemu-devel | These functions are needed to support semihosting on CPUs that support
runtime-configurable endianness. They should not be used in other contexts.
Signed-off-by: Martin Kröning <martin.kroening@eonerc.rwth-aachen.de>
---
include/exec/tswap.h | 36 ++++++++++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
... | null | null | null | [PATCH v2 2/3] include/exec: Provide the cpu_internal_tswap()
functions | The semihosting ABI [1] states:
This series ensures that semihosting data is properly byte-swapped if
the guest's CPU is currently in a different runtime-configurable
endianness than the host's CPU. This is done by adding cpu_internal_tswap()
functions and then using them in semihosting/uaccess.
Resolves: https://git... | {
"author": "=?utf-8?q?Martin_Kr=C3=B6ning?= via qemu development <qemu-devel@nongnu.org>",
"date": "Fri, 27 Feb 2026 13:54:29 +0100",
"is_openbsd": false,
"thread_id": "20260227-semihosting-cpu-tswap-v2-2-cbdcdf39dd15@eonerc.rwth-aachen.de.mbox.gz"
} |
lkml_critique | qemu-devel | Adds behavior to the device reset register.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Stephen Longfield <slongfield@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c... | null | null | null | [PATCH v7 16/22] hw/i3c/dw-i3c: Add controller resets | This adds data and CCC transmission, reception, and the associated
queues required for data transmission and reception to happen.
The I3C controller transmits data by the user writing into a command
queue. When the queue has a command and an argument in it, the
controller starts executing the command.
The controller ... | {
"author": "Jamin Lin <jamin_lin@aspeedtech.com>",
"date": "Wed, 25 Feb 2026 02:12:23 +0000",
"is_openbsd": false,
"thread_id": "8349c679-8fe8-4994-be55-6de9b71a1b6c@kaod.org.mbox.gz"
} |
lkml_critique | qemu-devel | Adds behavior to the device reset register.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Stephen Longfield <slongfield@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c... | null | null | null | [PATCH v7 16/22] hw/i3c/dw-i3c: Add controller resets | RESET_CTRL and INTR_FORCE are write-only.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/h... | {
"author": "Jamin Lin <jamin_lin@aspeedtech.com>",
"date": "Wed, 25 Feb 2026 02:12:17 +0000",
"is_openbsd": false,
"thread_id": "8349c679-8fe8-4994-be55-6de9b71a1b6c@kaod.org.mbox.gz"
} |
lkml_critique | qemu-devel | Adds behavior to the device reset register.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Stephen Longfield <slongfield@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c... | null | null | null | [PATCH v7 16/22] hw/i3c/dw-i3c: Add controller resets | Add a new I3C section to the MAINTAINERS file.
List Joe Komlodi, Cdric Le Goater and Jamin Lin
as maintainers, and Nabih Estefan as the reviewer,
covering the I3C core and related files under hw/i3c/
and include/hw/i3c/.
Signed-off-by: Nabih Estefan <nabihestefan@google.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeed... | {
"author": "Jamin Lin <jamin_lin@aspeedtech.com>",
"date": "Wed, 25 Feb 2026 02:12:40 +0000",
"is_openbsd": false,
"thread_id": "8349c679-8fe8-4994-be55-6de9b71a1b6c@kaod.org.mbox.gz"
} |
lkml_critique | qemu-devel | Adds behavior to the device reset register.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Stephen Longfield <slongfield@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c... | null | null | null | [PATCH v7 16/22] hw/i3c/dw-i3c: Add controller resets | The registers are only 32 bits wide, so we should cast the 64-bit value
passed in to only be 32 bits wide.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Titus Rwantare <titusr@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: J... | {
"author": "Jamin Lin <jamin_lin@aspeedtech.com>",
"date": "Wed, 25 Feb 2026 02:12:19 +0000",
"is_openbsd": false,
"thread_id": "8349c679-8fe8-4994-be55-6de9b71a1b6c@kaod.org.mbox.gz"
} |
lkml_critique | qemu-devel | Adds behavior to the device reset register.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Stephen Longfield <slongfield@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c... | null | null | null | [PATCH v7 16/22] hw/i3c/dw-i3c: Add controller resets | Following review feedback, update the Aspeed I3C device to use the
DEFINE_TYPES() macro instead of an explicit type registration function.
DEFINE_TYPES() is the currently recommended approach in QEMU for
registering multiple TypeInfo entries and avoids boilerplate
type_init() code.
Additionally, rename embedded SysBu... | {
"author": "Jamin Lin <jamin_lin@aspeedtech.com>",
"date": "Wed, 25 Feb 2026 02:12:02 +0000",
"is_openbsd": false,
"thread_id": "8349c679-8fe8-4994-be55-6de9b71a1b6c@kaod.org.mbox.gz"
} |
lkml_critique | qemu-devel | Adds behavior to the device reset register.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Stephen Longfield <slongfield@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c... | null | null | null | [PATCH v7 16/22] hw/i3c/dw-i3c: Add controller resets | Adds reset values for the new registers added.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c | 20 +++++++++++++++++++-
1 file changed, 19 inser... | {
"author": "Jamin Lin <jamin_lin@aspeedtech.com>",
"date": "Wed, 25 Feb 2026 02:12:12 +0000",
"is_openbsd": false,
"thread_id": "8349c679-8fe8-4994-be55-6de9b71a1b6c@kaod.org.mbox.gz"
} |
lkml_critique | qemu-devel | Adds behavior to the device reset register.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Stephen Longfield <slongfield@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c... | null | null | null | [PATCH v7 16/22] hw/i3c/dw-i3c: Add controller resets | Adds read-only register masks for the DwC I3C controller.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c | 40 +++++++++++++++++++++++++++++++++++... | {
"author": "Jamin Lin <jamin_lin@aspeedtech.com>",
"date": "Wed, 25 Feb 2026 02:12:15 +0000",
"is_openbsd": false,
"thread_id": "8349c679-8fe8-4994-be55-6de9b71a1b6c@kaod.org.mbox.gz"
} |
lkml_critique | qemu-devel | Adds behavior to the device reset register.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Stephen Longfield <slongfield@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c... | null | null | null | [PATCH v7 16/22] hw/i3c/dw-i3c: Add controller resets | Adds the rest of the Designware register fields.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c | 199 ++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 199 insertions(+)
diff --g... | {
"author": "Jamin Lin <jamin_lin@aspeedtech.com>",
"date": "Wed, 25 Feb 2026 02:12:08 +0000",
"is_openbsd": false,
"thread_id": "8349c679-8fe8-4994-be55-6de9b71a1b6c@kaod.org.mbox.gz"
} |
lkml_critique | qemu-devel | Adds behavior to the device reset register.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Stephen Longfield <slongfield@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c... | null | null | null | [PATCH v7 16/22] hw/i3c/dw-i3c: Add controller resets | Moves the Aspeed I3C model and traces into hw/i3c and creates I3C build
files.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Titus Rwantare <titusr@google.com>
Reviewed-by: Cdric Le Goater <clg@redhat.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com... | {
"author": "Jamin Lin <jamin_lin@aspeedtech.com>",
"date": "Wed, 25 Feb 2026 02:12:01 +0000",
"is_openbsd": false,
"thread_id": "8349c679-8fe8-4994-be55-6de9b71a1b6c@kaod.org.mbox.gz"
} |
lkml_critique | qemu-devel | Adds behavior to the device reset register.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Stephen Longfield <slongfield@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c... | null | null | null | [PATCH v7 16/22] hw/i3c/dw-i3c: Add controller resets | Adds read-only register masks for the Aspeed I3C controller registers.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/aspeed_i3c.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/hw/... | {
"author": "Jamin Lin <jamin_lin@aspeedtech.com>",
"date": "Wed, 25 Feb 2026 02:12:13 +0000",
"is_openbsd": false,
"thread_id": "8349c679-8fe8-4994-be55-6de9b71a1b6c@kaod.org.mbox.gz"
} |
lkml_critique | qemu-devel | Adds behavior to the device reset register.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Stephen Longfield <slongfield@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c... | null | null | null | [PATCH v7 16/22] hw/i3c/dw-i3c: Add controller resets | Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
tests/functional/arm/test_aspeed_ast2600_sdk.py | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/tests/functional/arm/test_aspeed_ast2600_sdk.py b/tests/functional/arm/test_aspeed_ast2600_sdk.py
index 971fa3390d..46b9f7058c 100755
--- a/tests/fun... | {
"author": "Jamin Lin <jamin_lin@aspeedtech.com>",
"date": "Wed, 25 Feb 2026 02:12:38 +0000",
"is_openbsd": false,
"thread_id": "8349c679-8fe8-4994-be55-6de9b71a1b6c@kaod.org.mbox.gz"
} |
lkml_critique | qemu-devel | Adds behavior to the device reset register.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Stephen Longfield <slongfield@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c... | null | null | null | [PATCH v7 16/22] hw/i3c/dw-i3c: Add controller resets | v1:
The initial patch series was based on work by Joe Komlodi <komlodi@google.com>.
This series adds I3C bus support to QEMU and adds more functionality to the
Aspeed I3C controller.
This implementation is a basic implementation that introduces IBIs
(including hot-join), CCCs, and SDR data transfer. As-is, ... | {
"author": "Jamin Lin <jamin_lin@aspeedtech.com>",
"date": "Wed, 25 Feb 2026 02:11:59 +0000",
"is_openbsd": false,
"thread_id": "8349c679-8fe8-4994-be55-6de9b71a1b6c@kaod.org.mbox.gz"
} |
lkml_critique | qemu-devel | Adds behavior to the device reset register.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Stephen Longfield <slongfield@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c... | null | null | null | [PATCH v7 16/22] hw/i3c/dw-i3c: Add controller resets | Adds handling for different IBI events that the controller can receive.
This includes:
- Handling a hot-join from a target
- Handling a secondary controller on the bus requesting to be the
primary bus controller
- Handling an interrupt request from a target.
When receiving an IBI, the controller sets an interrupt to... | {
"author": "Jamin Lin <jamin_lin@aspeedtech.com>",
"date": "Wed, 25 Feb 2026 02:12:25 +0000",
"is_openbsd": false,
"thread_id": "8349c679-8fe8-4994-be55-6de9b71a1b6c@kaod.org.mbox.gz"
} |
lkml_critique | qemu-devel | Adds behavior to the device reset register.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Stephen Longfield <slongfield@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c... | null | null | null | [PATCH v7 16/22] hw/i3c/dw-i3c: Add controller resets | Adds an I3C bus and a target class.
The bus supports:
- I3C data transmission and reception
- CCCs (including ENTDAA)
- IBIs
- legacy I2C transactions
General usage of the bus is similar to I2C. Users are expected to
initialize a bus via i3c_init_bus, and use the bus returned from the
init function to do transactions ... | {
"author": "Jamin Lin <jamin_lin@aspeedtech.com>",
"date": "Wed, 25 Feb 2026 02:12:04 +0000",
"is_openbsd": false,
"thread_id": "8349c679-8fe8-4994-be55-6de9b71a1b6c@kaod.org.mbox.gz"
} |
lkml_critique | qemu-devel | Adds behavior to the device reset register.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Stephen Longfield <slongfield@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c... | null | null | null | [PATCH v7 16/22] hw/i3c/dw-i3c: Add controller resets | Allows us to attach the mock I3C target
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/arm/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index d545ecd712..3396a32... | {
"author": "Jamin Lin <jamin_lin@aspeedtech.com>",
"date": "Wed, 25 Feb 2026 02:12:34 +0000",
"is_openbsd": false,
"thread_id": "8349c679-8fe8-4994-be55-6de9b71a1b6c@kaod.org.mbox.gz"
} |
lkml_critique | qemu-devel | Adds behavior to the device reset register.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Stephen Longfield <slongfield@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c... | null | null | null | [PATCH v7 16/22] hw/i3c/dw-i3c: Add controller resets | Adds functionality to the CTRL register.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Titus Rwantare <titusr@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c | 35 ++++... | {
"author": "Jamin Lin <jamin_lin@aspeedtech.com>",
"date": "Wed, 25 Feb 2026 02:12:27 +0000",
"is_openbsd": false,
"thread_id": "8349c679-8fe8-4994-be55-6de9b71a1b6c@kaod.org.mbox.gz"
} |
lkml_critique | qemu-devel | Adds behavior to the device reset register.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Stephen Longfield <slongfield@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c... | null | null | null | [PATCH v7 16/22] hw/i3c/dw-i3c: Add controller resets | The Aspeed I3C IP block is technically an Aspeed IP block that manages
6 DW I3C controllers.
To help reflect this better and to make it easier for other SoCs to use
the DW I3C model, we'll split out the DW portion from the Aspeed
portion.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Jamin Lin <jamin_l... | {
"author": "Jamin Lin <jamin_lin@aspeedtech.com>",
"date": "Wed, 25 Feb 2026 02:12:06 +0000",
"is_openbsd": false,
"thread_id": "8349c679-8fe8-4994-be55-6de9b71a1b6c@kaod.org.mbox.gz"
} |
lkml_critique | qemu-devel | Adds behavior to the device reset register.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Stephen Longfield <slongfield@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c... | null | null | null | [PATCH v7 16/22] hw/i3c/dw-i3c: Add controller resets | Adds a simple i3c device to be used for testing in lieu of a real
device.
The mock target supports the following features:
- A buffer that users can read and write to.
- CCC support for commonly used CCCs when probing devices on an I3C bus.
- IBI sending upon receiving a user-defined byte.
Signed-off-by: Joe Komlodi ... | {
"author": "Jamin Lin <jamin_lin@aspeedtech.com>",
"date": "Wed, 25 Feb 2026 02:12:33 +0000",
"is_openbsd": false,
"thread_id": "8349c679-8fe8-4994-be55-6de9b71a1b6c@kaod.org.mbox.gz"
} |
lkml_critique | qemu-devel | Adds behavior to the device reset register.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Stephen Longfield <slongfield@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c... | null | null | null | [PATCH v7 16/22] hw/i3c/dw-i3c: Add controller resets | This adds support for hotplugging in I3C.
Conceptually this can be thought of as an I3C target being physically
socketed onto a board.
It is then the target's responsibility to go through the hot-join and
DAA process so it can participate on the bus.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick... | {
"author": "Jamin Lin <jamin_lin@aspeedtech.com>",
"date": "Wed, 25 Feb 2026 02:12:36 +0000",
"is_openbsd": false,
"thread_id": "8349c679-8fe8-4994-be55-6de9b71a1b6c@kaod.org.mbox.gz"
} |
lkml_critique | qemu-devel | Adds behavior to the device reset register.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Stephen Longfield <slongfield@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c... | null | null | null | [PATCH v7 16/22] hw/i3c/dw-i3c: Add controller resets | Adds the rest of the Aspeed I3C controller register fields.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/aspeed_i3c.c | 54 +++++++++++++++++++++++++++++... | {
"author": "Jamin Lin <jamin_lin@aspeedtech.com>",
"date": "Wed, 25 Feb 2026 02:12:10 +0000",
"is_openbsd": false,
"thread_id": "8349c679-8fe8-4994-be55-6de9b71a1b6c@kaod.org.mbox.gz"
} |
lkml_critique | qemu-devel | Adds behavior to the device reset register.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Stephen Longfield <slongfield@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c... | null | null | null | [PATCH v7 16/22] hw/i3c/dw-i3c: Add controller resets | Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Hao Wu <wuhaotsh@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c | 56 +++++++++++++++++++++++++++++++++++++++++++++++++
1... | {
"author": "Jamin Lin <jamin_lin@aspeedtech.com>",
"date": "Wed, 25 Feb 2026 02:12:21 +0000",
"is_openbsd": false,
"thread_id": "8349c679-8fe8-4994-be55-6de9b71a1b6c@kaod.org.mbox.gz"
} |
lkml_critique | qemu-devel | Adds behavior to the device reset register.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Stephen Longfield <slongfield@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c... | null | null | null | [PATCH v7 16/22] hw/i3c/dw-i3c: Add controller resets | To retrieve the I3C bus object normally, the order is Aspeed I3C -> DW
I3C[n] -> bus object, so make a nice wrapper for people to use.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
include/hw/i3c/aspeed_i3c.h |... | {
"author": "Jamin Lin <jamin_lin@aspeedtech.com>",
"date": "Wed, 25 Feb 2026 02:12:31 +0000",
"is_openbsd": false,
"thread_id": "8349c679-8fe8-4994-be55-6de9b71a1b6c@kaod.org.mbox.gz"
} |
lkml_critique | qemu-devel | Adds behavior to the device reset register.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Stephen Longfield <slongfield@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c... | null | null | null | [PATCH v7 16/22] hw/i3c/dw-i3c: Add controller resets | Apologies for chiming in this late ... I only got a chance to test this last week
This really is a minor comment ... can be addressed subsequently
On 2/24/2026 6:12 PM, Jamin Lin wrote:
...
num_sent is never updated prior to return, so the traces (from caller i3c_send) looked a bit confusing
<snip>
mock_i3c_targe... | {
"author": "Jithu Joseph <jithu.joseph@oss.qualcomm.com>",
"date": "Thu, 26 Feb 2026 17:43:19 -0800",
"is_openbsd": false,
"thread_id": "8349c679-8fe8-4994-be55-6de9b71a1b6c@kaod.org.mbox.gz"
} |
lkml_critique | qemu-devel | Adds behavior to the device reset register.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Stephen Longfield <slongfield@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c... | null | null | null | [PATCH v7 16/22] hw/i3c/dw-i3c: Add controller resets | Another minor comment which too can be addressed later
On 2/24/2026 6:12 PM, Jamin Lin wrote:
...
num_sent is uninitialized here. Even though i3c_send_byte ignores it after the call, it gets passed by pointer into i3c_send() where it is used in the trace_i3c_send() call.
If the send callback does not write *num_sen... | {
"author": "Jithu Joseph <jithu.joseph@oss.qualcomm.com>",
"date": "Thu, 26 Feb 2026 18:23:24 -0800",
"is_openbsd": false,
"thread_id": "8349c679-8fe8-4994-be55-6de9b71a1b6c@kaod.org.mbox.gz"
} |
lkml_critique | qemu-devel | Adds behavior to the device reset register.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Stephen Longfield <slongfield@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c... | null | null | null | [PATCH v7 16/22] hw/i3c/dw-i3c: Add controller resets | On 2/24/2026 6:11 PM, Jamin Lin wrote:
Thanks Jaimin for the series, I was able to test this series to a good extent over the last week
Tested read/write transfers from guest Linux using i3ctransfer against the mock-i3c-target on an AST2600 based machine
Looks good to me, Feel free to add my tag for the whole serie... | {
"author": "Jithu Joseph <jithu.joseph@oss.qualcomm.com>",
"date": "Thu, 26 Feb 2026 18:33:27 -0800",
"is_openbsd": false,
"thread_id": "8349c679-8fe8-4994-be55-6de9b71a1b6c@kaod.org.mbox.gz"
} |
lkml_critique | qemu-devel | Adds behavior to the device reset register.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Stephen Longfield <slongfield@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c... | null | null | null | [PATCH v7 16/22] hw/i3c/dw-i3c: Add controller resets | Hello Jithu,
On 2/27/26 03:23, Jithu Joseph wrote:
Could please send a patch ? I will queue it after this series.
Also, since you have tested this series, would mind sending
a Tested-by tag ? possibly a Reviewed-by too.
Thanks
C. | {
"author": "=?UTF-8?Q?C=C3=A9dric_Le_Goater?= <clg@kaod.org>",
"date": "Fri, 27 Feb 2026 08:51:06 +0100",
"is_openbsd": false,
"thread_id": "8349c679-8fe8-4994-be55-6de9b71a1b6c@kaod.org.mbox.gz"
} |
lkml_critique | qemu-devel | Adds behavior to the device reset register.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Stephen Longfield <slongfield@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c... | null | null | null | [PATCH v7 16/22] hw/i3c/dw-i3c: Add controller resets | On 2/27/26 02:43, Jithu Joseph wrote:
No problem. It is not merged yet and fixes are expected.
Please send a patch.
Thanks,
C. | {
"author": "=?UTF-8?Q?C=C3=A9dric_Le_Goater?= <clg@kaod.org>",
"date": "Fri, 27 Feb 2026 08:52:49 +0100",
"is_openbsd": false,
"thread_id": "8349c679-8fe8-4994-be55-6de9b71a1b6c@kaod.org.mbox.gz"
} |
lkml_critique | qemu-devel | Adds behavior to the device reset register.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Stephen Longfield <slongfield@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c... | null | null | null | [PATCH v7 16/22] hw/i3c/dw-i3c: Add controller resets | On 2/25/26 03:12, Jamin Lin wrote:
This array should be a static const and its size needs a fix (0x100)
Thanks,
C. | {
"author": "=?UTF-8?Q?C=C3=A9dric_Le_Goater?= <clg@kaod.org>",
"date": "Fri, 27 Feb 2026 10:47:00 +0100",
"is_openbsd": false,
"thread_id": "8349c679-8fe8-4994-be55-6de9b71a1b6c@kaod.org.mbox.gz"
} |
lkml_critique | qemu-devel | Host CPU model is basically the same with max CPU model, except Product
ID and CPU model name. With host CPU model, Product ID comes from
cpucfg0 and CPU model comes from /proc/cpuinfo.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
---
target/loongarch/cpu.c | 94 ++++++++++++++++++++++++++++++++++++++++++
1 file cha... | null | null | null | [PATCH v5 4/5] target/loongarch: Add host CPU model in kvm mode | CPUCFG0 is LoongArch CPU Product ID, it is a combination of Vendor ID,
Series ID and Product ID, here is the layout:
+-------------+----------------+------------+----------------+
| Reserved | Vendor ID | Series ID | Product ID |
+-------------+----------------+------------+----------------+
31 ... | {
"author": "Bibo Mao <maobibo@loongson.cn>",
"date": "Wed, 25 Feb 2026 09:41:27 +0800",
"is_openbsd": false,
"thread_id": "be7b3e09-faa4-2baa-d6e5-cfedab5e15ac@loongson.cn.mbox.gz"
} |
lkml_critique | qemu-devel | Host CPU model is basically the same with max CPU model, except Product
ID and CPU model name. With host CPU model, Product ID comes from
cpucfg0 and CPU model comes from /proc/cpuinfo.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
---
target/loongarch/cpu.c | 94 ++++++++++++++++++++++++++++++++++++++++++
1 file cha... | null | null | null | [PATCH v5 4/5] target/loongarch: Add host CPU model in kvm mode | Some CPUCFG capability bits depend on KVM host hypervsior and they
are detected on QEMU. However some CPUCFG bits are irrelative with
hypervsior, here these bits are checked from host machine and set
for VM with host CPU model.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
---
target/loongarch/cpu.c | 36 ++++++++++++... | {
"author": "Bibo Mao <maobibo@loongson.cn>",
"date": "Wed, 25 Feb 2026 09:41:31 +0800",
"is_openbsd": false,
"thread_id": "be7b3e09-faa4-2baa-d6e5-cfedab5e15ac@loongson.cn.mbox.gz"
} |
lkml_critique | qemu-devel | Host CPU model is basically the same with max CPU model, except Product
ID and CPU model name. With host CPU model, Product ID comes from
cpucfg0 and CPU model comes from /proc/cpuinfo.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
---
target/loongarch/cpu.c | 94 ++++++++++++++++++++++++++++++++++++++++++
1 file cha... | null | null | null | [PATCH v5 4/5] target/loongarch: Add host CPU model in kvm mode | The features shown in cpucfg3 mostly are relative with cache capability,
QEMU does not support cache emulation and discard these features.
However it will be better if it is the same with host machine.
Here add default cpucfg3 feature information with LA464 CPU.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
---
targ... | {
"author": "Bibo Mao <maobibo@loongson.cn>",
"date": "Wed, 25 Feb 2026 09:41:28 +0800",
"is_openbsd": false,
"thread_id": "be7b3e09-faa4-2baa-d6e5-cfedab5e15ac@loongson.cn.mbox.gz"
} |
lkml_critique | qemu-devel | Host CPU model is basically the same with max CPU model, except Product
ID and CPU model name. With host CPU model, Product ID comes from
cpucfg0 and CPU model comes from /proc/cpuinfo.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
---
target/loongarch/cpu.c | 94 ++++++++++++++++++++++++++++++++++++++++++
1 file cha... | null | null | null | [PATCH v5 4/5] target/loongarch: Add host CPU model in kvm mode | On LoongArch system, CPU model name comes from IOCSR register
LOONGARCH_IOCSR_VENDOR and LOONGARCH_IOCSR_CPUNAME. Its value
can be initialized when CPU is created.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
---
hw/loongarch/virt.c | 6 ++++--
target/loongarch/cpu.c | 4 ++++
target/loongarch/cpu.h | 6 ++++++
3... | {
"author": "Bibo Mao <maobibo@loongson.cn>",
"date": "Wed, 25 Feb 2026 09:41:29 +0800",
"is_openbsd": false,
"thread_id": "be7b3e09-faa4-2baa-d6e5-cfedab5e15ac@loongson.cn.mbox.gz"
} |
lkml_critique | qemu-devel | Host CPU model is basically the same with max CPU model, except Product
ID and CPU model name. With host CPU model, Product ID comes from
cpucfg0 and CPU model comes from /proc/cpuinfo.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
---
target/loongarch/cpu.c | 94 ++++++++++++++++++++++++++++++++++++++++++
1 file cha... | null | null | null | [PATCH v5 4/5] target/loongarch: Add host CPU model in kvm mode | Host CPU model is basically the same with max CPU model, except Product
ID and CPU model name. With host CPU model, Product ID comes from
cpucfg0 on host machine and CPU model from /proc/cpuinfo, also some
CPUCFG bits which cannot be controlled by KVM hypervisor and these bits
come from host machine directly.
---
v4 .... | {
"author": "Bibo Mao <maobibo@loongson.cn>",
"date": "Wed, 25 Feb 2026 09:41:26 +0800",
"is_openbsd": false,
"thread_id": "be7b3e09-faa4-2baa-d6e5-cfedab5e15ac@loongson.cn.mbox.gz"
} |
lkml_critique | qemu-devel | Limited builds (tools, documentation) don't need to generate /
build gdbstub files. Only process the gdbstub/ folder when
user / system emulation / acceleration is built.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/meson... | null | null | null | [PATCH v3 1/2] meson: Restrict gdbstub to user/system builds | v3: Restrict meson to gdbstub/
v2: Check array length
Philippe Mathieu-Daudé (2):
meson: Restrict gdbstub to user/system builds
gdbstub: Generate a single gdbstub-xml.c / gdb_static_features[]
meson.build | 12 +-----------
stubs/gdbstub.c => gdbstub/gdb-xml-stub.c | 0
gdbstub/mes... | {
"author": "=?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>",
"date": "Fri, 27 Feb 2026 11:10:37 +0100",
"is_openbsd": false,
"thread_id": "aaGEBp6IMZwEllOW@linaro.org.mbox.gz"
} |
lkml_critique | qemu-devel | Limited builds (tools, documentation) don't need to generate /
build gdbstub files. Only process the gdbstub/ folder when
user / system emulation / acceleration is built.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/meson... | null | null | null | [PATCH v3 1/2] meson: Restrict gdbstub to user/system builds | gdb_static_features[] only contains strings, nothing target-specific.
Instead of generating one file per target, generate a single file
with a single gdb_static_features[] array.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
meson.build | 10 ----------
stubs/gdbstub.c =>... | {
"author": "=?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>",
"date": "Fri, 27 Feb 2026 11:10:39 +0100",
"is_openbsd": false,
"thread_id": "aaGEBp6IMZwEllOW@linaro.org.mbox.gz"
} |
lkml_critique | qemu-devel | Limited builds (tools, documentation) don't need to generate /
build gdbstub files. Only process the gdbstub/ folder when
user / system emulation / acceleration is built.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/meson... | null | null | null | [PATCH v3 1/2] meson: Restrict gdbstub to user/system builds | On Fri, Feb 27, 2026 at 11:10:38AM +0100, Philippe Mathieu-Daud wrote:
Reviewed-by: Jim MacArthur <jim.macarthur@linaro.org> | {
"author": "Jim MacArthur <jim.macarthur@linaro.org>",
"date": "Fri, 27 Feb 2026 11:45:32 +0000",
"is_openbsd": false,
"thread_id": "aaGEBp6IMZwEllOW@linaro.org.mbox.gz"
} |
lkml_critique | qemu-devel | Limited builds (tools, documentation) don't need to generate /
build gdbstub files. Only process the gdbstub/ folder when
user / system emulation / acceleration is built.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/meson... | null | null | null | [PATCH v3 1/2] meson: Restrict gdbstub to user/system builds | On Fri, Feb 27, 2026 at 11:10:39AM +0100, Philippe Mathieu-Daud wrote:
LGTM
Reviewed-by: Jim MacArthur <jim.macarthur@linaro.org> | {
"author": "Jim MacArthur <jim.macarthur@linaro.org>",
"date": "Fri, 27 Feb 2026 11:46:14 +0000",
"is_openbsd": false,
"thread_id": "aaGEBp6IMZwEllOW@linaro.org.mbox.gz"
} |
lkml_critique | qemu-devel | The Mobility M6 register reference (DST_HEIGHT_WIDTH) states that dst_y is
updated after a blit but this appears to not be the case.
Hardware testing revealed that both the R128 and R100 do not update
dst_x or dst_y after a blit, regardless of the source. This removes
the update.
Signed-off-by: Chad Jablonski <chad@j... | null | null | null | [PATCH v8 07/18] ati-vga: Remove dst_x/y updates after blit | Reading DST_PITCH and SRC_PITCH on the Rage 128 is broken. The read
handlers attempt to construct the value from pitch and tile bits in
the register state but mistakenly AND them instead of ORing them. This
means the pitch is always zero on read.
Signed-off-by: Chad Jablonski <chad@jablonski.xyz>
Reviewed-by: BALATON ... | {
"author": "Chad Jablonski <chad@jablonski.xyz>",
"date": "Wed, 4 Feb 2026 11:45:50 -0500",
"is_openbsd": false,
"thread_id": "DGPUBU36JIT0.1NCHM4YPRQL8X@jablonski.xyz.mbox.gz"
} |
lkml_critique | qemu-devel | The Mobility M6 register reference (DST_HEIGHT_WIDTH) states that dst_y is
updated after a blit but this appears to not be the case.
Hardware testing revealed that both the R128 and R100 do not update
dst_x or dst_y after a blit, regardless of the source. This removes
the update.
Signed-off-by: Chad Jablonski <chad@j... | null | null | null | [PATCH v8 07/18] ati-vga: Remove dst_x/y updates after blit | This series implements HOST_DATA as a blit source enabling text rendering in
xterm under X.org with 2D acceleration.
The series builds up functionality incrementally:
* Patches 1-6: Bug fixes and register implementations
* Patches 7-15: Refactor of ati_2d_blt to decouple from ATIVGAState
* Patch 16: Scisso... | {
"author": "Chad Jablonski <chad@jablonski.xyz>",
"date": "Wed, 4 Feb 2026 11:45:48 -0500",
"is_openbsd": false,
"thread_id": "DGPUBU36JIT0.1NCHM4YPRQL8X@jablonski.xyz.mbox.gz"
} |
lkml_critique | qemu-devel | The Mobility M6 register reference (DST_HEIGHT_WIDTH) states that dst_y is
updated after a blit but this appears to not be the case.
Hardware testing revealed that both the R128 and R100 do not update
dst_x or dst_y after a blit, regardless of the source. This removes
the update.
Signed-off-by: Chad Jablonski <chad@j... | null | null | null | [PATCH v8 07/18] ati-vga: Remove dst_x/y updates after blit | DP_GUI_MASTER_CNTL aliases several fields from DP_DATATYPE and DP_MIX.
These were being written correctly but not returned on a read of
DP_GUI_MASTER_CNTL.
Signed-off-by: Chad Jablonski <chad@jablonski.xyz>
Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu>
---
hw/display/ati.c | 8 +++++++-
hw/display/ati_regs.h ... | {
"author": "Chad Jablonski <chad@jablonski.xyz>",
"date": "Wed, 4 Feb 2026 11:45:51 -0500",
"is_openbsd": false,
"thread_id": "DGPUBU36JIT0.1NCHM4YPRQL8X@jablonski.xyz.mbox.gz"
} |
lkml_critique | qemu-devel | The Mobility M6 register reference (DST_HEIGHT_WIDTH) states that dst_y is
updated after a blit but this appears to not be the case.
Hardware testing revealed that both the R128 and R100 do not update
dst_x or dst_y after a blit, regardless of the source. This removes
the update.
Signed-off-by: Chad Jablonski <chad@j... | null | null | null | [PATCH v8 07/18] ati-vga: Remove dst_x/y updates after blit | Hardware testing on the Rage 128 confirms that (SRC/DST)_OFFSET,
and (SRC/DST)_PITCH are latched when (SRC/DST)_PITCH_OFFSET_CNTL bits
in DP_GUI_MASTER_CNTL are set to "default".
The earlier approach looked at the state of the (SRC/DST)_PITCH_OFFSET_CNTL
bits when offset and pitch registers were used. This meant that ... | {
"author": "Chad Jablonski <chad@jablonski.xyz>",
"date": "Wed, 4 Feb 2026 11:45:52 -0500",
"is_openbsd": false,
"thread_id": "DGPUBU36JIT0.1NCHM4YPRQL8X@jablonski.xyz.mbox.gz"
} |
lkml_critique | qemu-devel | The Mobility M6 register reference (DST_HEIGHT_WIDTH) states that dst_y is
updated after a blit but this appears to not be the case.
Hardware testing revealed that both the R128 and R100 do not update
dst_x or dst_y after a blit, regardless of the source. This removes
the update.
Signed-off-by: Chad Jablonski <chad@j... | null | null | null | [PATCH v8 07/18] ati-vga: Remove dst_x/y updates after blit | Rage 128 cards always request 64MB for their linear (framebuffer)
aperture and R100 cards always request 128MB. This is regardless
of the amount of physical VRAM on the board. The following are results
from real hardware tests:
Card VRAM PCI BAR0 CONFIG_MEMSIZE CONFIG_APER_SIZE AGP_... | {
"author": "Chad Jablonski <chad@jablonski.xyz>",
"date": "Wed, 4 Feb 2026 11:45:49 -0500",
"is_openbsd": false,
"thread_id": "DGPUBU36JIT0.1NCHM4YPRQL8X@jablonski.xyz.mbox.gz"
} |
lkml_critique | qemu-devel | The Mobility M6 register reference (DST_HEIGHT_WIDTH) states that dst_y is
updated after a blit but this appears to not be the case.
Hardware testing revealed that both the R128 and R100 do not update
dst_x or dst_y after a blit, regardless of the source. This removes
the update.
Signed-off-by: Chad Jablonski <chad@j... | null | null | null | [PATCH v8 07/18] ati-vga: Remove dst_x/y updates after blit | This completes the decoupling from the ATIVGAState struct.
Signed-off-by: Chad Jablonski <chad@jablonski.xyz>
---
hw/display/ati_2d.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/display/ati_2d.c b/hw/display/ati_2d.c
index 063928c442..8a820bc91f 100644
--- a/hw/display/ati_2d.c
+++ ... | {
"author": "Chad Jablonski <chad@jablonski.xyz>",
"date": "Wed, 4 Feb 2026 11:46:02 -0500",
"is_openbsd": false,
"thread_id": "DGPUBU36JIT0.1NCHM4YPRQL8X@jablonski.xyz.mbox.gz"
} |
lkml_critique | qemu-devel | The Mobility M6 register reference (DST_HEIGHT_WIDTH) states that dst_y is
updated after a blit but this appears to not be the case.
Hardware testing revealed that both the R128 and R100 do not update
dst_x or dst_y after a blit, regardless of the source. This removes
the update.
Signed-off-by: Chad Jablonski <chad@j... | null | null | null | [PATCH v8 07/18] ati-vga: Remove dst_x/y updates after blit | ati_2d_blt remains the public interface to the blitter but the bulk of
the implementation is moved down into ati_2d_do_blt which is passed an
ATI2DCtx.
Signed-off-by: Chad Jablonski <chad@jablonski.xyz>
---
hw/display/ati_2d.c | 14 ++++++++------
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/hw/displ... | {
"author": "Chad Jablonski <chad@jablonski.xyz>",
"date": "Wed, 4 Feb 2026 11:46:01 -0500",
"is_openbsd": false,
"thread_id": "DGPUBU36JIT0.1NCHM4YPRQL8X@jablonski.xyz.mbox.gz"
} |
lkml_critique | qemu-devel | The Mobility M6 register reference (DST_HEIGHT_WIDTH) states that dst_y is
updated after a blit but this appears to not be the case.
Hardware testing revealed that both the R128 and R100 do not update
dst_x or dst_y after a blit, regardless of the source. This removes
the update.
Signed-off-by: Chad Jablonski <chad@j... | null | null | null | [PATCH v8 07/18] ati-vga: Remove dst_x/y updates after blit | Writing to any of the HOST_DATA0-7 registers pushes the written data
into a 128-bit accumulator. When the accumulator is full a flush is
triggered to copy it to the framebuffer. A final write to HOST_DATA_LAST
will also initiate a flush. The flush itself is left for the next patch.
Unaligned HOST_DATA* writes result i... | {
"author": "Chad Jablonski <chad@jablonski.xyz>",
"date": "Wed, 4 Feb 2026 11:46:05 -0500",
"is_openbsd": false,
"thread_id": "DGPUBU36JIT0.1NCHM4YPRQL8X@jablonski.xyz.mbox.gz"
} |
lkml_critique | qemu-devel | The Mobility M6 register reference (DST_HEIGHT_WIDTH) states that dst_y is
updated after a blit but this appears to not be the case.
Hardware testing revealed that both the R128 and R100 do not update
dst_x or dst_y after a blit, regardless of the source. This removes
the update.
Signed-off-by: Chad Jablonski <chad@j... | null | null | null | [PATCH v8 07/18] ati-vga: Remove dst_x/y updates after blit | Implement flushing the 128-bit HOST_DATA accumulator to VRAM to enable
text rendering in X. Currently supports only the monochrome
foreground/background datatype.
The flush is broken up into two steps. First, expansion of the
monochrome bits to the destination color depth. Then the expanded pixels
are sent to the ati_... | {
"author": "Chad Jablonski <chad@jablonski.xyz>",
"date": "Wed, 4 Feb 2026 11:46:06 -0500",
"is_openbsd": false,
"thread_id": "DGPUBU36JIT0.1NCHM4YPRQL8X@jablonski.xyz.mbox.gz"
} |
lkml_critique | qemu-devel | The Mobility M6 register reference (DST_HEIGHT_WIDTH) states that dst_y is
updated after a blit but this appears to not be the case.
Hardware testing revealed that both the R128 and R100 do not update
dst_x or dst_y after a blit, regardless of the source. This removes
the update.
Signed-off-by: Chad Jablonski <chad@j... | null | null | null | [PATCH v8 07/18] ati-vga: Remove dst_x/y updates after blit | Implement read and write operations on SC_TOP_LEFT, SC_BOTTOM_RIGHT,
and SRC_SC_BOTTOM_RIGHT registers. These registers are also updated
when the src and/or dst clipping fields on DP_GUI_MASTER_CNTL are set
to default clipping.
Scissor clipping is used when rendering text in X.org. The r128 driver
sends host data much... | {
"author": "Chad Jablonski <chad@jablonski.xyz>",
"date": "Wed, 4 Feb 2026 11:45:54 -0500",
"is_openbsd": false,
"thread_id": "DGPUBU36JIT0.1NCHM4YPRQL8X@jablonski.xyz.mbox.gz"
} |
lkml_critique | qemu-devel | The Mobility M6 register reference (DST_HEIGHT_WIDTH) states that dst_y is
updated after a blit but this appears to not be the case.
Hardware testing revealed that both the R128 and R100 do not update
dst_x or dst_y after a blit, regardless of the source. This removes
the update.
Signed-off-by: Chad Jablonski <chad@j... | null | null | null | [PATCH v8 07/18] ati-vga: Remove dst_x/y updates after blit | These are straightforward 32-bit register write handlers. They're
necessary for a future patch which will use them for color expansion
from monochrome host data transfers.
Signed-off-by: Chad Jablonski <chad@jablonski.xyz>
Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu>
---
hw/display/ati.c | 6 ++++++
1 file change... | {
"author": "Chad Jablonski <chad@jablonski.xyz>",
"date": "Wed, 4 Feb 2026 11:45:53 -0500",
"is_openbsd": false,
"thread_id": "DGPUBU36JIT0.1NCHM4YPRQL8X@jablonski.xyz.mbox.gz"
} |
lkml_critique | qemu-devel | The Mobility M6 register reference (DST_HEIGHT_WIDTH) states that dst_y is
updated after a blit but this appears to not be the case.
Hardware testing revealed that both the R128 and R100 do not update
dst_x or dst_y after a blit, regardless of the source. This removes
the update.
Signed-off-by: Chad Jablonski <chad@j... | null | null | null | [PATCH v8 07/18] ati-vga: Remove dst_x/y updates after blit | ati_2d_blt uses a mixture of locals and direct register access of needed
state. This assigns all values derived from register state to local
variables. It prepares the function for a larger refactor that removes
the dependency on the full device and direct register access entirely.
Signed-off-by: Chad Jablonski <chad@... | {
"author": "Chad Jablonski <chad@jablonski.xyz>",
"date": "Wed, 4 Feb 2026 11:45:58 -0500",
"is_openbsd": false,
"thread_id": "DGPUBU36JIT0.1NCHM4YPRQL8X@jablonski.xyz.mbox.gz"
} |
lkml_critique | qemu-devel | The Mobility M6 register reference (DST_HEIGHT_WIDTH) states that dst_y is
updated after a blit but this appears to not be the case.
Hardware testing revealed that both the R128 and R100 do not update
dst_x or dst_y after a blit, regardless of the source. This removes
the update.
Signed-off-by: Chad Jablonski <chad@j... | null | null | null | [PATCH v8 07/18] ati-vga: Remove dst_x/y updates after blit | setup_2d_blt_ctx is responsible for knowing how to retrieve the state
needed by ati_2d_blt from the registers and assigning it to the ATI2DCtx.
This will be useful in a future patch when HOST_DATA needs to make small
modifications to the ctx.
Signed-off-by: Chad Jablonski <chad@jablonski.xyz>
---
hw/display/ati_2d.c ... | {
"author": "Chad Jablonski <chad@jablonski.xyz>",
"date": "Wed, 4 Feb 2026 11:46:00 -0500",
"is_openbsd": false,
"thread_id": "DGPUBU36JIT0.1NCHM4YPRQL8X@jablonski.xyz.mbox.gz"
} |
lkml_critique | qemu-devel | The Mobility M6 register reference (DST_HEIGHT_WIDTH) states that dst_y is
updated after a blit but this appears to not be the case.
Hardware testing revealed that both the R128 and R100 do not update
dst_x or dst_y after a blit, regardless of the source. This removes
the update.
Signed-off-by: Chad Jablonski <chad@j... | null | null | null | [PATCH v8 07/18] ati-vga: Remove dst_x/y updates after blit | A call to ati_2d_blt implies that the source will be vram. Checking
bounds is useful in that case. Other sources (HOST_DATA) will not make
sense to check against vram bounds.
Signed-off-by: Chad Jablonski <chad@jablonski.xyz>
---
hw/display/ati_2d.c | 13 ++++++-------
1 file changed, 6 insertions(+), 7 deletions(-)
... | {
"author": "Chad Jablonski <chad@jablonski.xyz>",
"date": "Wed, 4 Feb 2026 11:46:03 -0500",
"is_openbsd": false,
"thread_id": "DGPUBU36JIT0.1NCHM4YPRQL8X@jablonski.xyz.mbox.gz"
} |
lkml_critique | qemu-devel | The Mobility M6 register reference (DST_HEIGHT_WIDTH) states that dst_y is
updated after a blit but this appears to not be the case.
Hardware testing revealed that both the R128 and R100 do not update
dst_x or dst_y after a blit, regardless of the source. This removes
the update.
Signed-off-by: Chad Jablonski <chad@j... | null | null | null | [PATCH v8 07/18] ati-vga: Remove dst_x/y updates after blit | Previously all state derived from registers was moved to locals. Now we
can mechanically replace those locals with fields on the new ATI2DCtx
struct.
Signed-off-by: Chad Jablonski <chad@jablonski.xyz>
---
hw/display/ati_2d.c | 222 +++++++++++++++++++++++++-------------------
1 file changed, 126 insertions(+), 96 del... | {
"author": "Chad Jablonski <chad@jablonski.xyz>",
"date": "Wed, 4 Feb 2026 11:45:59 -0500",
"is_openbsd": false,
"thread_id": "DGPUBU36JIT0.1NCHM4YPRQL8X@jablonski.xyz.mbox.gz"
} |
lkml_critique | qemu-devel | The Mobility M6 register reference (DST_HEIGHT_WIDTH) states that dst_y is
updated after a blit but this appears to not be the case.
Hardware testing revealed that both the R128 and R100 do not update
dst_x or dst_y after a blit, regardless of the source. This removes
the update.
Signed-off-by: Chad Jablonski <chad@j... | null | null | null | [PATCH v8 07/18] ati-vga: Remove dst_x/y updates after blit | Use scissor registers to clip blit operations. This is required
for text rendering in X using the r128 driver. Without it overly-wide
glyphs are drawn and create all sorts of chaos.
The visible destination rectangle (vis_dst) is the intersection of the
scissor rectangle and the destination rectangle (dst).
The src al... | {
"author": "Chad Jablonski <chad@jablonski.xyz>",
"date": "Wed, 4 Feb 2026 11:46:04 -0500",
"is_openbsd": false,
"thread_id": "DGPUBU36JIT0.1NCHM4YPRQL8X@jablonski.xyz.mbox.gz"
} |
lkml_critique | qemu-devel | The Mobility M6 register reference (DST_HEIGHT_WIDTH) states that dst_y is
updated after a blit but this appears to not be the case.
Hardware testing revealed that both the R128 and R100 do not update
dst_x or dst_y after a blit, regardless of the source. This removes
the update.
Signed-off-by: Chad Jablonski <chad@j... | null | null | null | [PATCH v8 07/18] ati-vga: Remove dst_x/y updates after blit | Both supported ROPs follow the same memory set dirty logic.
This consolidates that logic to remove the duplication.
Signed-off-by: Chad Jablonski <chad@jablonski.xyz>
---
hw/display/ati_2d.c | 42 +++++++++++++++++++++---------------------
1 file changed, 21 insertions(+), 21 deletions(-)
diff --git a/hw/display/ati... | {
"author": "Chad Jablonski <chad@jablonski.xyz>",
"date": "Wed, 4 Feb 2026 11:45:56 -0500",
"is_openbsd": false,
"thread_id": "DGPUBU36JIT0.1NCHM4YPRQL8X@jablonski.xyz.mbox.gz"
} |
lkml_critique | qemu-devel | The Mobility M6 register reference (DST_HEIGHT_WIDTH) states that dst_y is
updated after a blit but this appears to not be the case.
Hardware testing revealed that both the R128 and R100 do not update
dst_x or dst_y after a blit, regardless of the source. This removes
the update.
Signed-off-by: Chad Jablonski <chad@j... | null | null | null | [PATCH v8 07/18] ati-vga: Remove dst_x/y updates after blit | Pixman requires stride in words. So over the course of the ati_2d_blt
function both src and dst stride were mutated before being passed to
pixman and then back afterwards.
This creates local variables holding src and dst stride in words
avoiding the potentially confusing mutation.
Signed-off-by: Chad Jablonski <chad@... | {
"author": "Chad Jablonski <chad@jablonski.xyz>",
"date": "Wed, 4 Feb 2026 11:45:57 -0500",
"is_openbsd": false,
"thread_id": "DGPUBU36JIT0.1NCHM4YPRQL8X@jablonski.xyz.mbox.gz"
} |
lkml_critique | qemu-devel | The Mobility M6 register reference (DST_HEIGHT_WIDTH) states that dst_y is
updated after a blit but this appears to not be the case.
Hardware testing revealed that both the R128 and R100 do not update
dst_x or dst_y after a blit, regardless of the source. This removes
the update.
Signed-off-by: Chad Jablonski <chad@j... | null | null | null | [PATCH v8 07/18] ati-vga: Remove dst_x/y updates after blit | On Wed, 4 Feb 2026, Chad Jablonski wrote:
Maybe we should also rename tmp_stride to tmp_stride_words for consistency
but regardless:
Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> | {
"author": "BALATON Zoltan <balaton@eik.bme.hu>",
"date": "Sun, 8 Feb 2026 20:47:13 +0100 (CET)",
"is_openbsd": false,
"thread_id": "DGPUBU36JIT0.1NCHM4YPRQL8X@jablonski.xyz.mbox.gz"
} |
lkml_critique | qemu-devel | The Mobility M6 register reference (DST_HEIGHT_WIDTH) states that dst_y is
updated after a blit but this appears to not be the case.
Hardware testing revealed that both the R128 and R100 do not update
dst_x or dst_y after a blit, regardless of the source. This removes
the update.
Signed-off-by: Chad Jablonski <chad@j... | null | null | null | [PATCH v8 07/18] ati-vga: Remove dst_x/y updates after blit | On Wed, 4 Feb 2026, Chad Jablonski wrote:
Next patch has uint32_t rop3 but since GMC_ROP3_MASK masks out sign bit
probably does not matter maybe only for consistency.
Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> | {
"author": "BALATON Zoltan <balaton@eik.bme.hu>",
"date": "Sun, 8 Feb 2026 21:19:18 +0100 (CET)",
"is_openbsd": false,
"thread_id": "DGPUBU36JIT0.1NCHM4YPRQL8X@jablonski.xyz.mbox.gz"
} |
lkml_critique | qemu-devel | The Mobility M6 register reference (DST_HEIGHT_WIDTH) states that dst_y is
updated after a blit but this appears to not be the case.
Hardware testing revealed that both the R128 and R100 do not update
dst_x or dst_y after a blit, regardless of the source. This removes
the update.
Signed-off-by: Chad Jablonski <chad@j... | null | null | null | [PATCH v8 07/18] ati-vga: Remove dst_x/y updates after blit | On Wed, 4 Feb 2026, Chad Jablonski wrote:
Maybe a good opportunity to move || and + from beginning of line to
previous line as it is more usually wrapped elsewhere. But anyway:
Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> | {
"author": "BALATON Zoltan <balaton@eik.bme.hu>",
"date": "Sun, 8 Feb 2026 21:32:36 +0100 (CET)",
"is_openbsd": false,
"thread_id": "DGPUBU36JIT0.1NCHM4YPRQL8X@jablonski.xyz.mbox.gz"
} |
lkml_critique | qemu-devel | The Mobility M6 register reference (DST_HEIGHT_WIDTH) states that dst_y is
updated after a blit but this appears to not be the case.
Hardware testing revealed that both the R128 and R100 do not update
dst_x or dst_y after a blit, regardless of the source. This removes
the update.
Signed-off-by: Chad Jablonski <chad@j... | null | null | null | [PATCH v8 07/18] ati-vga: Remove dst_x/y updates after blit | On Wed, 4 Feb 2026, Chad Jablonski wrote:
This is true for top to bottom left to right but what happens for other
direction blits?
Does this need to be computed as src and dst coordinates when not top to
bottom left to right?
These may also need to be calculated differently.
Maybe log visible rect in addition ... | {
"author": "BALATON Zoltan <balaton@eik.bme.hu>",
"date": "Sun, 8 Feb 2026 21:40:22 +0100 (CET)",
"is_openbsd": false,
"thread_id": "DGPUBU36JIT0.1NCHM4YPRQL8X@jablonski.xyz.mbox.gz"
} |
lkml_critique | qemu-devel | The Mobility M6 register reference (DST_HEIGHT_WIDTH) states that dst_y is
updated after a blit but this appears to not be the case.
Hardware testing revealed that both the R128 and R100 do not update
dst_x or dst_y after a blit, regardless of the source. This removes
the update.
Signed-off-by: Chad Jablonski <chad@j... | null | null | null | [PATCH v8 07/18] ati-vga: Remove dst_x/y updates after blit | On Wed, 4 Feb 2026, Chad Jablonski wrote:
Instead of logging what's supported it's more useful to log the value
that's unsupported, e.g. "unsupported src_source %x" because that's what
we want to look at if we see this message not what works that we don't
care about any more now that it's implemented.
I don't lik... | {
"author": "BALATON Zoltan <balaton@eik.bme.hu>",
"date": "Sun, 8 Feb 2026 22:11:11 +0100 (CET)",
"is_openbsd": false,
"thread_id": "DGPUBU36JIT0.1NCHM4YPRQL8X@jablonski.xyz.mbox.gz"
} |
lkml_critique | qemu-devel | The Mobility M6 register reference (DST_HEIGHT_WIDTH) states that dst_y is
updated after a blit but this appears to not be the case.
Hardware testing revealed that both the R128 and R100 do not update
dst_x or dst_y after a blit, regardless of the source. This removes
the update.
Signed-off-by: Chad Jablonski <chad@j... | null | null | null | [PATCH v8 07/18] ati-vga: Remove dst_x/y updates after blit | On Wed, 4 Feb 2026, Chad Jablonski wrote:
Is there any check anywhere that prevents a malicious guest to keep
writing host data and write past the vram area? I think the dst checks in
ati_2d_do_blt inherited from ati_2d_blt would probably catch that but is
there anything we can check here to prevent getting there? ... | {
"author": "BALATON Zoltan <balaton@eik.bme.hu>",
"date": "Mon, 9 Feb 2026 00:35:19 +0100 (CET)",
"is_openbsd": false,
"thread_id": "DGPUBU36JIT0.1NCHM4YPRQL8X@jablonski.xyz.mbox.gz"
} |
lkml_critique | qemu-devel | The Mobility M6 register reference (DST_HEIGHT_WIDTH) states that dst_y is
updated after a blit but this appears to not be the case.
Hardware testing revealed that both the R128 and R100 do not update
dst_x or dst_y after a blit, regardless of the source. This removes
the update.
Signed-off-by: Chad Jablonski <chad@j... | null | null | null | [PATCH v8 07/18] ati-vga: Remove dst_x/y updates after blit | ctx->dst.x and ctx->dst.y are normalized to the top left corner of the
blit in setup_2d_blt_ctx (lines 102-105). So this is able to
do the calculations uniformly for all blit direction combinations.
The scissor rectangle is always in screen coordinates. It isn't affected
by blit direction at all.
Both good questions... | {
"author": "\"Chad Jablonski\" <chad@jablonski.xyz>",
"date": "Fri, 13 Feb 2026 12:24:43 -0500",
"is_openbsd": false,
"thread_id": "DGPUBU36JIT0.1NCHM4YPRQL8X@jablonski.xyz.mbox.gz"
} |
lkml_critique | qemu-devel | The Mobility M6 register reference (DST_HEIGHT_WIDTH) states that dst_y is
updated after a blit but this appears to not be the case.
Hardware testing revealed that both the R128 and R100 do not update
dst_x or dst_y after a blit, regardless of the source. This removes
the update.
Signed-off-by: Chad Jablonski <chad@j... | null | null | null | [PATCH v8 07/18] ati-vga: Remove dst_x/y updates after blit | On Fri, 13 Feb 2026, Chad Jablonski wrote:
I wasn't sure either so that's why I asked if you considered this case.
That's even better if this is also confirmed by tests now that it will
work for all cases. Sorry if this caused additional work but it's not
for nothing as it made sure we don't have bugs.
You could... | {
"author": "BALATON Zoltan <balaton@eik.bme.hu>",
"date": "Fri, 13 Feb 2026 20:08:50 +0100 (CET)",
"is_openbsd": false,
"thread_id": "DGPUBU36JIT0.1NCHM4YPRQL8X@jablonski.xyz.mbox.gz"
} |
lkml_critique | qemu-devel | The Mobility M6 register reference (DST_HEIGHT_WIDTH) states that dst_y is
updated after a blit but this appears to not be the case.
Hardware testing revealed that both the R128 and R100 do not update
dst_x or dst_y after a blit, regardless of the source. This removes
the update.
Signed-off-by: Chad Jablonski <chad@j... | null | null | null | [PATCH v8 07/18] ati-vga: Remove dst_x/y updates after blit | I did a deeper investigation on this and you're right the hardware seems
to set an "active" flag for the blit. When the blit isn't active
HOST_DATA writes are ignored. This will be addressed in v9. Writing beyond
VRAM I believe was already handled by a comparison of the current row
against the dst height and as you sai... | {
"author": "\"Chad Jablonski\" <chad@jablonski.xyz>",
"date": "Fri, 27 Feb 2026 10:14:04 -0500",
"is_openbsd": false,
"thread_id": "DGPUBU36JIT0.1NCHM4YPRQL8X@jablonski.xyz.mbox.gz"
} |
lkml_critique | qemu-devel | From: Thomas Huth <thuth@redhat.com>
PCI devices that are added via pci_create_simple_multifunction(),
pci_create_simple() or pci_init_nic_in_slot() currently show up
under "/machine/unattached" in the QOM tree. This is somewhat ugly,
the parent should rather be the PCI bus node instead, so let's add
the proper relati... | null | null | null | [PATCH] hw/pci: Avoid adding PCI devices to the "unattached" QOM tree
node | On Tue, 17 Feb 2026 07:55:12 +0100
Thomas Huth <thuth@redhat.com> wrote:
there are a few more places that have similar pattern, should we fix them to?
this one also takes bus as an argument, and then goes down to
qdev_realize_and_unref->qdev_realize->qdev_set_parent_bus->bus_add_child
that eventually creates a link... | {
"author": "Igor Mammedov <imammedo@redhat.com>",
"date": "Thu, 19 Feb 2026 16:06:41 +0100",
"is_openbsd": false,
"thread_id": "87342md3cj.fsf@pond.sub.org.mbox.gz"
} |
lkml_critique | qemu-devel | From: Thomas Huth <thuth@redhat.com>
PCI devices that are added via pci_create_simple_multifunction(),
pci_create_simple() or pci_init_nic_in_slot() currently show up
under "/machine/unattached" in the QOM tree. This is somewhat ugly,
the parent should rather be the PCI bus node instead, so let's add
the proper relati... | null | null | null | [PATCH] hw/pci: Avoid adding PCI devices to the "unattached" QOM tree
node | On Thu, 19 Feb 2026 16:06:41 +0100
Igor Mammedov <imammedo@redhat.com> wrote:
and then this rises a question if the bus should be a parent or
the owner of the bus is the parent? | {
"author": "Igor Mammedov <imammedo@redhat.com>",
"date": "Thu, 19 Feb 2026 16:18:22 +0100",
"is_openbsd": false,
"thread_id": "87342md3cj.fsf@pond.sub.org.mbox.gz"
} |
lkml_critique | qemu-devel | From: Thomas Huth <thuth@redhat.com>
PCI devices that are added via pci_create_simple_multifunction(),
pci_create_simple() or pci_init_nic_in_slot() currently show up
under "/machine/unattached" in the QOM tree. This is somewhat ugly,
the parent should rather be the PCI bus node instead, so let's add
the proper relati... | null | null | null | [PATCH] hw/pci: Avoid adding PCI devices to the "unattached" QOM tree
node | On 19/02/2026 16.18, Igor Mammedov wrote:
You mean the various spots in the device models that call pci_new() or
pci_new_multifunction(), followed by a pci_realize_and_unref() without
adding the child property in between? ... yes, I think most of those likely
need fixing, too.
I wonder whether I should rather drop... | {
"author": "Thomas Huth <thuth@redhat.com>",
"date": "Mon, 23 Feb 2026 18:43:23 +0100",
"is_openbsd": false,
"thread_id": "87342md3cj.fsf@pond.sub.org.mbox.gz"
} |
lkml_critique | qemu-devel | From: Thomas Huth <thuth@redhat.com>
PCI devices that are added via pci_create_simple_multifunction(),
pci_create_simple() or pci_init_nic_in_slot() currently show up
under "/machine/unattached" in the QOM tree. This is somewhat ugly,
the parent should rather be the PCI bus node instead, so let's add
the proper relati... | null | null | null | [PATCH] hw/pci: Avoid adding PCI devices to the "unattached" QOM tree
node | Igor Mammedov <imammedo@redhat.com> writes:
This question is about the QOM composition tree (the thing "info
qom-tree" shows).
There is also the qdev tree (the thing "info qtree" shows). In the qdev
tree, the PCI device's parent is a PCI bus, and the PCI bus's parent is
the device providing the bus. An edge from q... | {
"author": "Markus Armbruster <armbru@redhat.com>",
"date": "Fri, 27 Feb 2026 08:59:08 +0100",
"is_openbsd": false,
"thread_id": "87342md3cj.fsf@pond.sub.org.mbox.gz"
} |
lkml_critique | qemu-devel | SME2 support adds the following state for HVF guests:
- Vector registers Z0, ... , Z31 (introduced by FEAT_SVE but HVF does
not support it)
- Predicate registers P0, .., P15 (also FEAT_SVE)
- ZA register
- ZT0 register
- PSTATE.{SM,ZA} bits (SVCR pseudo-register)
- SMPRI_EL1 which handles the PE's priority in the SM... | null | null | null | [PATCH v4 1/2] hvf/arm: handle FEAT_SME2 migration | M4/M5 Macs support SME2, and HVF exposes this functionality in its
public API.
Add support for it in QEMU.
This was tested by running an SME2 benchmark from Arm [0]. savevm and
loadvm during the benchmark's run were used to verify migration works.
[0]:
https://learn.arm.com/learning-paths/cross-platform/multiplying-... | {
"author": "Manos Pitsidianakis <manos.pitsidianakis@linaro.org>",
"date": "Fri, 27 Feb 2026 10:01:26 +0200",
"is_openbsd": false,
"thread_id": "CAAjaMXbyOZuY+hOLnhpKgxUa9QfFZcktoVq1izZ9DX9dwP-DEA@mail.gmail.com.mbox.gz"
} |
lkml_critique | qemu-devel | SME2 support adds the following state for HVF guests:
- Vector registers Z0, ... , Z31 (introduced by FEAT_SVE but HVF does
not support it)
- Predicate registers P0, .., P15 (also FEAT_SVE)
- ZA register
- ZT0 register
- PSTATE.{SM,ZA} bits (SVCR pseudo-register)
- SMPRI_EL1 which handles the PE's priority in the SM... | null | null | null | [PATCH v4 1/2] hvf/arm: handle FEAT_SME2 migration | Starting from M4 cores and MacOS 15.2 SDK, HVF can virtualise FEAT_SME2.
Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
---
target/arm/hvf/hvf.c | 29 +++++++++++++++++------------
1 file changed, 17 insertions(+), 12 deletions(-)
diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c
index ce... | {
"author": "Manos Pitsidianakis <manos.pitsidianakis@linaro.org>",
"date": "Fri, 27 Feb 2026 10:01:28 +0200",
"is_openbsd": false,
"thread_id": "CAAjaMXbyOZuY+hOLnhpKgxUa9QfFZcktoVq1izZ9DX9dwP-DEA@mail.gmail.com.mbox.gz"
} |
lkml_critique | qemu-devel | SME2 support adds the following state for HVF guests:
- Vector registers Z0, ... , Z31 (introduced by FEAT_SVE but HVF does
not support it)
- Predicate registers P0, .., P15 (also FEAT_SVE)
- ZA register
- ZT0 register
- PSTATE.{SM,ZA} bits (SVCR pseudo-register)
- SMPRI_EL1 which handles the PE's priority in the SM... | null | null | null | [PATCH v4 1/2] hvf/arm: handle FEAT_SME2 migration | On Fri, Feb 27, 2026 at 10:01 AM Manos Pitsidianakis
<manos.pitsidianakis@linaro.org> wrote:
This will reset the NEON vector registers we set up earlier in
hvf_arch_put_registers() if transitioning from streaming mode enabled
to disabled. I had tested disabled->{dis,en}abled, enabled->enabled
but not enabled -> disabl... | {
"author": "Manos Pitsidianakis <manos.pitsidianakis@linaro.org>",
"date": "Fri, 27 Feb 2026 10:50:10 +0200",
"is_openbsd": false,
"thread_id": "CAAjaMXbyOZuY+hOLnhpKgxUa9QfFZcktoVq1izZ9DX9dwP-DEA@mail.gmail.com.mbox.gz"
} |
lkml_critique | qemu-devel | Hello,
on current master (d8a9d97317d03190b34498741f98f22e2a9afe3e), the basic
gdb stub test fails for ppc-linux-user when running "make check-tcg".
The error message is as follows:
TEST basic gdbstub support on ppc
Python Exception <class 'gdb.error'>: Could not fetch register "fpscr"; remote failure rep... | null | null | null | ppc-linux-user GDB stub broken | Hi Florian,
On Fri, 27 Feb 2026 at 09:28, Florian Hofhammer
<florian.hofhammer@fhofhammer.de> wrote:
Sorry for that :/
It's odd this config isn't caught by our CI.
I'll have a look.
Regards,
Phil. | {
"author": "=?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= <philmd@linaro.org>",
"date": "Fri, 27 Feb 2026 10:58:38 +0100",
"is_openbsd": false,
"thread_id": "87bjhaxmbx.fsf@draig.linaro.org.mbox.gz"
} |
lkml_critique | qemu-devel | Hello,
on current master (d8a9d97317d03190b34498741f98f22e2a9afe3e), the basic
gdb stub test fails for ppc-linux-user when running "make check-tcg".
The error message is as follows:
TEST basic gdbstub support on ppc
Python Exception <class 'gdb.error'>: Could not fetch register "fpscr"; remote failure rep... | null | null | null | ppc-linux-user GDB stub broken | On 27/2/26 10:58, Philippe Mathieu-Daudé wrote:
Short term, this seems to fix it:
-- >8 --
diff --git a/gdbstub/gdbstub.c b/gdbstub/gdbstub.c
index 90f4b95135b..0b0a5d1e044 100644
--- a/gdbstub/gdbstub.c
+++ b/gdbstub/gdbstub.c
@@ -610,6 +610,10 @@ void gdb_register_coprocessor(CPUState *cpu,
guint i;
... | {
"author": "=?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= <philmd@linaro.org>",
"date": "Fri, 27 Feb 2026 14:09:14 +0100",
"is_openbsd": false,
"thread_id": "87bjhaxmbx.fsf@draig.linaro.org.mbox.gz"
} |
lkml_critique | qemu-devel | Hello,
on current master (d8a9d97317d03190b34498741f98f22e2a9afe3e), the basic
gdb stub test fails for ppc-linux-user when running "make check-tcg".
The error message is as follows:
TEST basic gdbstub support on ppc
Python Exception <class 'gdb.error'>: Could not fetch register "fpscr"; remote failure rep... | null | null | null | ppc-linux-user GDB stub broken | Philippe Mathieu-Daudé <philmd@linaro.org> writes:
Tested-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
Virtualisation Tech Lead @ Linaro | {
"author": "=?utf-8?Q?Alex_Benn=C3=A9e?= <alex.bennee@linaro.org>",
"date": "Fri, 27 Feb 2026 15:01:06 +0000",
"is_openbsd": false,
"thread_id": "87bjhaxmbx.fsf@draig.linaro.org.mbox.gz"
} |
lkml_critique | qemu-devel | replace blank table with a new one:
[000h 0000 4] Signature : "WDAT" [Watchdog Action Table]
[004h 0004 4] Table Length : 00000104
[008h 0008 1] Revision : 01
[009h 0009 1] Checksum : EB
[00Ah 0010 6] Oem ID :... | null | null | null | [PATCH 11/11] tests: acpi: arm/virt: update expected WDAT blob | Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
tests/qtest/bios-tables-test.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
index e489d94331..25345dd035 100644
--- a/tests/qtest/bios-tables-test.c
+++ b/tests/qtest/bios-tables... | {
"author": "Igor Mammedov <imammedo@redhat.com>",
"date": "Fri, 6 Feb 2026 14:14:32 +0100",
"is_openbsd": false,
"thread_id": "CAFEAcA-DtSE4MsN2XcBkOk5t3Xbe_Kz_MtUwfCkas4Q7R7CFnw@mail.gmail.com.mbox.gz"
} |
lkml_critique | qemu-devel | replace blank table with a new one:
[000h 0000 4] Signature : "WDAT" [Watchdog Action Table]
[004h 0004 4] Table Length : 00000104
[008h 0008 1] Revision : 01
[009h 0009 1] Checksum : EB
[00Ah 0010 6] Oem ID :... | null | null | null | [PATCH 11/11] tests: acpi: arm/virt: update expected WDAT blob | Windows doesn't ship built-in TCO watchdog driver, and users are
forced to install vendor specific driver(s) if such exists.
However OS provides a generic watchdog driver that uses
ACPI WDAT table [1] to abstract actual hardware behind it.
The same applies to ARM version of Windows.
This series adds
* WDAT table tai... | {
"author": "Igor Mammedov <imammedo@redhat.com>",
"date": "Fri, 6 Feb 2026 14:14:27 +0100",
"is_openbsd": false,
"thread_id": "CAFEAcA-DtSE4MsN2XcBkOk5t3Xbe_Kz_MtUwfCkas4Q7R7CFnw@mail.gmail.com.mbox.gz"
} |
lkml_critique | qemu-devel | replace blank table with a new one:
[000h 0000 4] Signature : "WDAT" [Watchdog Action Table]
[004h 0004 4] Table Length : 00000104
[008h 0008 1] Revision : 01
[009h 0009 1] Checksum : EB
[00Ah 0010 6] Oem ID :... | null | null | null | [PATCH 11/11] tests: acpi: arm/virt: update expected WDAT blob | Add definitions for WDAT[1] actions/instructions
and build_append_wdat_ins() API to build table entries.
1)
"Hardware Watchdog Timers Design Specification"
https://uefi.org/acpi 'Watchdog Action Table (WDAT)'
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
include/hw/acpi/wdat.h | 118 ++++++++++++++++++++++... | {
"author": "Igor Mammedov <imammedo@redhat.com>",
"date": "Fri, 6 Feb 2026 14:14:28 +0100",
"is_openbsd": false,
"thread_id": "CAFEAcA-DtSE4MsN2XcBkOk5t3Xbe_Kz_MtUwfCkas4Q7R7CFnw@mail.gmail.com.mbox.gz"
} |
lkml_critique | qemu-devel | replace blank table with a new one:
[000h 0000 4] Signature : "WDAT" [Watchdog Action Table]
[004h 0004 4] Table Length : 00000104
[008h 0008 1] Revision : 01
[009h 0009 1] Checksum : EB
[00Ah 0010 6] Oem ID :... | null | null | null | [PATCH 11/11] tests: acpi: arm/virt: update expected WDAT blob | Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
hw/watchdog/sbsa_gwdt.c | 8 ++++++++
hw/watchdog/trace-events | 9 +++++++++
2 files changed, 17 insertions(+)
diff --git a/hw/watchdog/sbsa_gwdt.c b/hw/watchdog/sbsa_gwdt.c
index 7ade5c6f18..d159e61c34 100644
--- a/hw/watchdog/sbsa_gwdt.c
+++ b/hw/watchdog/sbs... | {
"author": "Igor Mammedov <imammedo@redhat.com>",
"date": "Fri, 6 Feb 2026 14:14:34 +0100",
"is_openbsd": false,
"thread_id": "CAFEAcA-DtSE4MsN2XcBkOk5t3Xbe_Kz_MtUwfCkas4Q7R7CFnw@mail.gmail.com.mbox.gz"
} |
lkml_critique | qemu-devel | replace blank table with a new one:
[000h 0000 4] Signature : "WDAT" [Watchdog Action Table]
[004h 0004 4] Table Length : 00000104
[008h 0008 1] Revision : 01
[009h 0009 1] Checksum : EB
[00Ah 0010 6] Oem ID :... | null | null | null | [PATCH 11/11] tests: acpi: arm/virt: update expected WDAT blob | Add SBSA generic watchdog to virt machine type with
all necessary wiring for ACPI watchdog. Which includes
setting its frequency to 1KHz (max that WDAT is able to handle).
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
include/hw/acpi/wdat-gwdt.h | 19 ++++++++
include/hw/arm/virt.h | 3 ++
hw/acpi/mes... | {
"author": "Igor Mammedov <imammedo@redhat.com>",
"date": "Fri, 6 Feb 2026 14:14:35 +0100",
"is_openbsd": false,
"thread_id": "CAFEAcA-DtSE4MsN2XcBkOk5t3Xbe_Kz_MtUwfCkas4Q7R7CFnw@mail.gmail.com.mbox.gz"
} |
lkml_critique | qemu-devel | replace blank table with a new one:
[000h 0000 4] Signature : "WDAT" [Watchdog Action Table]
[004h 0004 4] Table Length : 00000104
[008h 0008 1] Revision : 01
[009h 0009 1] Checksum : EB
[00Ah 0010 6] Oem ID :... | null | null | null | [PATCH 11/11] tests: acpi: arm/virt: update expected WDAT blob | Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
tests/qtest/bios-tables-test-allowed-diff.h | 1 +
tests/data/acpi/aarch64/virt/WDAT.wdat | 0
2 files changed, 1 insertion(+)
create mode 100644 tests/data/acpi/aarch64/virt/WDAT.wdat
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/b... | {
"author": "Igor Mammedov <imammedo@redhat.com>",
"date": "Fri, 6 Feb 2026 14:14:36 +0100",
"is_openbsd": false,
"thread_id": "CAFEAcA-DtSE4MsN2XcBkOk5t3Xbe_Kz_MtUwfCkas4Q7R7CFnw@mail.gmail.com.mbox.gz"
} |
lkml_critique | qemu-devel | replace blank table with a new one:
[000h 0000 4] Signature : "WDAT" [Watchdog Action Table]
[004h 0004 4] Table Length : 00000104
[008h 0008 1] Revision : 01
[009h 0009 1] Checksum : EB
[00Ah 0010 6] Oem ID :... | null | null | null | [PATCH 11/11] tests: acpi: arm/virt: update expected WDAT blob | replace blank table with a new one:
+[000h 0000 4] Signature : "WDAT" [Watchdog Action Table]
+[004h 0004 4] Table Length : 00000134
+[008h 0008 1] Revision : 01
+[009h 0009 1] Checksum : 31
+[00Ah 0010 6] Oem... | {
"author": "Igor Mammedov <imammedo@redhat.com>",
"date": "Fri, 6 Feb 2026 14:14:33 +0100",
"is_openbsd": false,
"thread_id": "CAFEAcA-DtSE4MsN2XcBkOk5t3Xbe_Kz_MtUwfCkas4Q7R7CFnw@mail.gmail.com.mbox.gz"
} |
lkml_critique | qemu-devel | replace blank table with a new one:
[000h 0000 4] Signature : "WDAT" [Watchdog Action Table]
[004h 0004 4] Table Length : 00000104
[008h 0008 1] Revision : 01
[009h 0009 1] Checksum : EB
[00Ah 0010 6] Oem ID :... | null | null | null | [PATCH 11/11] tests: acpi: arm/virt: update expected WDAT blob | It will be used by following code to enable ACPI watchdog.
Initial support will bring it to Q35 and arm/virt machines using
respective iTCO and GWDT watchdogs as hardware backend.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
include/hw/core/boards.h | 1 +
hw/core/machine.c | 20 ++++++++++++++++++++... | {
"author": "Igor Mammedov <imammedo@redhat.com>",
"date": "Fri, 6 Feb 2026 14:14:29 +0100",
"is_openbsd": false,
"thread_id": "CAFEAcA-DtSE4MsN2XcBkOk5t3Xbe_Kz_MtUwfCkas4Q7R7CFnw@mail.gmail.com.mbox.gz"
} |
lkml_critique | qemu-devel | replace blank table with a new one:
[000h 0000 4] Signature : "WDAT" [Watchdog Action Table]
[004h 0004 4] Table Length : 00000104
[008h 0008 1] Revision : 01
[009h 0009 1] Checksum : EB
[00Ah 0010 6] Oem ID :... | null | null | null | [PATCH 11/11] tests: acpi: arm/virt: update expected WDAT blob | Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
tests/qtest/bios-tables-test-allowed-diff.h | 1 +
tests/data/acpi/x86/q35/WDAT.wdat | 0
2 files changed, 1 insertion(+)
create mode 100644 tests/data/acpi/x86/q35/WDAT.wdat
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-t... | {
"author": "Igor Mammedov <imammedo@redhat.com>",
"date": "Fri, 6 Feb 2026 14:14:31 +0100",
"is_openbsd": false,
"thread_id": "CAFEAcA-DtSE4MsN2XcBkOk5t3Xbe_Kz_MtUwfCkas4Q7R7CFnw@mail.gmail.com.mbox.gz"
} |
lkml_critique | qemu-devel | replace blank table with a new one:
[000h 0000 4] Signature : "WDAT" [Watchdog Action Table]
[004h 0004 4] Table Length : 00000104
[008h 0008 1] Revision : 01
[009h 0009 1] Checksum : EB
[00Ah 0010 6] Oem ID :... | null | null | null | [PATCH 11/11] tests: acpi: arm/virt: update expected WDAT blob | Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
tests/qtest/bios-tables-test.c | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
index 25345dd035..c2d235e686 100644
--- a/tests/qtest/bios-tables-test.c
+++ b/tests/qtest/bio... | {
"author": "Igor Mammedov <imammedo@redhat.com>",
"date": "Fri, 6 Feb 2026 14:14:37 +0100",
"is_openbsd": false,
"thread_id": "CAFEAcA-DtSE4MsN2XcBkOk5t3Xbe_Kz_MtUwfCkas4Q7R7CFnw@mail.gmail.com.mbox.gz"
} |
lkml_critique | qemu-devel | replace blank table with a new one:
[000h 0000 4] Signature : "WDAT" [Watchdog Action Table]
[004h 0004 4] Table Length : 00000104
[008h 0008 1] Revision : 01
[009h 0009 1] Checksum : EB
[00Ah 0010 6] Oem ID :... | null | null | null | [PATCH 11/11] tests: acpi: arm/virt: update expected WDAT blob | It will generate WDAT table [1] customized for TCO watchdog.
This allows Windows guests (Windows Server 2008/Vista+) to
use TCO watchdog using built-in generic driver, which
aleviates need to install vendor specific drivers.
Given that enabling it might change guest behaviour
(both Windows/Linux) the feature is disabl... | {
"author": "Igor Mammedov <imammedo@redhat.com>",
"date": "Fri, 6 Feb 2026 14:14:30 +0100",
"is_openbsd": false,
"thread_id": "CAFEAcA-DtSE4MsN2XcBkOk5t3Xbe_Kz_MtUwfCkas4Q7R7CFnw@mail.gmail.com.mbox.gz"
} |
lkml_critique | qemu-devel | replace blank table with a new one:
[000h 0000 4] Signature : "WDAT" [Watchdog Action Table]
[004h 0004 4] Table Length : 00000104
[008h 0008 1] Revision : 01
[009h 0009 1] Checksum : EB
[00Ah 0010 6] Oem ID :... | null | null | null | [PATCH 11/11] tests: acpi: arm/virt: update expected WDAT blob | On Fri, Feb 6, 2026 at 6:44 PM Igor Mammedov <imammedo@redhat.com> wrote:
I am confused. The linux documentation for arm64 says WDAT is not supported
https://www.kernel.org/doc/html/latest/arch/arm64/acpi_object_usage.html | {
"author": "Ani Sinha <anisinha@redhat.com>",
"date": "Mon, 16 Feb 2026 13:09:30 +0530",
"is_openbsd": false,
"thread_id": "CAFEAcA-DtSE4MsN2XcBkOk5t3Xbe_Kz_MtUwfCkas4Q7R7CFnw@mail.gmail.com.mbox.gz"
} |
lkml_critique | qemu-devel | replace blank table with a new one:
[000h 0000 4] Signature : "WDAT" [Watchdog Action Table]
[004h 0004 4] Table Length : 00000104
[008h 0008 1] Revision : 01
[009h 0009 1] Checksum : EB
[00Ah 0010 6] Oem ID :... | null | null | null | [PATCH 11/11] tests: acpi: arm/virt: update expected WDAT blob | On Fri, Feb 6, 2026 at 6:45 PM Igor Mammedov <imammedo@redhat.com> wrote:
Reviewed-by: Ani Sinha <anisinha@redhat.com> | {
"author": "Ani Sinha <anisinha@redhat.com>",
"date": "Mon, 16 Feb 2026 13:42:12 +0530",
"is_openbsd": false,
"thread_id": "CAFEAcA-DtSE4MsN2XcBkOk5t3Xbe_Kz_MtUwfCkas4Q7R7CFnw@mail.gmail.com.mbox.gz"
} |
lkml_critique | qemu-devel | replace blank table with a new one:
[000h 0000 4] Signature : "WDAT" [Watchdog Action Table]
[004h 0004 4] Table Length : 00000104
[008h 0008 1] Revision : 01
[009h 0009 1] Checksum : EB
[00Ah 0010 6] Oem ID :... | null | null | null | [PATCH 11/11] tests: acpi: arm/virt: update expected WDAT blob | On Fri, Feb 6, 2026 at 6:44 PM Igor Mammedov <imammedo@redhat.com> wrote:
Reviewed-by: Ani Sinha <anisinha@redhat.com> | {
"author": "Ani Sinha <anisinha@redhat.com>",
"date": "Mon, 16 Feb 2026 13:53:44 +0530",
"is_openbsd": false,
"thread_id": "CAFEAcA-DtSE4MsN2XcBkOk5t3Xbe_Kz_MtUwfCkas4Q7R7CFnw@mail.gmail.com.mbox.gz"
} |
lkml_critique | qemu-devel | replace blank table with a new one:
[000h 0000 4] Signature : "WDAT" [Watchdog Action Table]
[004h 0004 4] Table Length : 00000104
[008h 0008 1] Revision : 01
[009h 0009 1] Checksum : EB
[00Ah 0010 6] Oem ID :... | null | null | null | [PATCH 11/11] tests: acpi: arm/virt: update expected WDAT blob | Hi,
It’s outdated documentation, support for it has been added in https://lkml.iu.edu/hypermail/linux/kernel/1609.1/04003.html | {
"author": "Mohamed Mediouni <mohamed@unpredictable.fr>",
"date": "Mon, 16 Feb 2026 09:46:39 +0100",
"is_openbsd": false,
"thread_id": "CAFEAcA-DtSE4MsN2XcBkOk5t3Xbe_Kz_MtUwfCkas4Q7R7CFnw@mail.gmail.com.mbox.gz"
} |
lkml_critique | qemu-devel | replace blank table with a new one:
[000h 0000 4] Signature : "WDAT" [Watchdog Action Table]
[004h 0004 4] Table Length : 00000104
[008h 0008 1] Revision : 01
[009h 0009 1] Checksum : EB
[00Ah 0010 6] Oem ID :... | null | null | null | [PATCH 11/11] tests: acpi: arm/virt: update expected WDAT blob | On Fri, Feb 6, 2026 at 6:45 PM Igor Mammedov <imammedo@redhat.com> wrote:
Acked-by: Ani Sinha <anisinha@redhat.com> | {
"author": "Ani Sinha <anisinha@redhat.com>",
"date": "Mon, 16 Feb 2026 15:20:19 +0530",
"is_openbsd": false,
"thread_id": "CAFEAcA-DtSE4MsN2XcBkOk5t3Xbe_Kz_MtUwfCkas4Q7R7CFnw@mail.gmail.com.mbox.gz"
} |
lkml_critique | qemu-devel | replace blank table with a new one:
[000h 0000 4] Signature : "WDAT" [Watchdog Action Table]
[004h 0004 4] Table Length : 00000104
[008h 0008 1] Revision : 01
[009h 0009 1] Checksum : EB
[00Ah 0010 6] Oem ID :... | null | null | null | [PATCH 11/11] tests: acpi: arm/virt: update expected WDAT blob | On Fri, Feb 6, 2026 at 6:45 PM Igor Mammedov <imammedo@redhat.com> wrote:
Other than what mentioned below,
Reviewed-by: Ani Sinha <anisinha@redhat.com>
^^^^^
this is 64 bit.
Same here ...
... | {
"author": "Ani Sinha <anisinha@redhat.com>",
"date": "Mon, 16 Feb 2026 15:52:10 +0530",
"is_openbsd": false,
"thread_id": "CAFEAcA-DtSE4MsN2XcBkOk5t3Xbe_Kz_MtUwfCkas4Q7R7CFnw@mail.gmail.com.mbox.gz"
} |
lkml_critique | qemu-devel | replace blank table with a new one:
[000h 0000 4] Signature : "WDAT" [Watchdog Action Table]
[004h 0004 4] Table Length : 00000104
[008h 0008 1] Revision : 01
[009h 0009 1] Checksum : EB
[00Ah 0010 6] Oem ID :... | null | null | null | [PATCH 11/11] tests: acpi: arm/virt: update expected WDAT blob | On Fri, Feb 6, 2026 at 6:45 PM Igor Mammedov <imammedo@redhat.com> wrote:
^^^^^^^^^^
typo.
Other than below,
Reviewed-by: Ani Sinha <anisinha@redhat.com>
How are you getting the values for the above three (timer period, min
count and max count)? A comment will help here.
It might help to add a comment that we a... | {
"author": "Ani Sinha <anisinha@redhat.com>",
"date": "Mon, 16 Feb 2026 16:21:15 +0530",
"is_openbsd": false,
"thread_id": "CAFEAcA-DtSE4MsN2XcBkOk5t3Xbe_Kz_MtUwfCkas4Q7R7CFnw@mail.gmail.com.mbox.gz"
} |
lkml_critique | qemu-devel | replace blank table with a new one:
[000h 0000 4] Signature : "WDAT" [Watchdog Action Table]
[004h 0004 4] Table Length : 00000104
[008h 0008 1] Revision : 01
[009h 0009 1] Checksum : EB
[00Ah 0010 6] Oem ID :... | null | null | null | [PATCH 11/11] tests: acpi: arm/virt: update expected WDAT blob | On Fri, Feb 6, 2026 at 6:45 PM Igor Mammedov <imammedo@redhat.com> wrote:
looks OK from a quick look.
Acked-by: Ani Sinha <anisinha@redhat.com> | {
"author": "Ani Sinha <anisinha@redhat.com>",
"date": "Tue, 17 Feb 2026 11:04:56 +0530",
"is_openbsd": false,
"thread_id": "CAFEAcA-DtSE4MsN2XcBkOk5t3Xbe_Kz_MtUwfCkas4Q7R7CFnw@mail.gmail.com.mbox.gz"
} |
lkml_critique | qemu-devel | replace blank table with a new one:
[000h 0000 4] Signature : "WDAT" [Watchdog Action Table]
[004h 0004 4] Table Length : 00000104
[008h 0008 1] Revision : 01
[009h 0009 1] Checksum : EB
[00Ah 0010 6] Oem ID :... | null | null | null | [PATCH 11/11] tests: acpi: arm/virt: update expected WDAT blob | On Mon, 16 Feb 2026 13:09:30 +0530
Ani Sinha <anisinha@redhat.com> wrote:
IT probably should be fixed,
the WDAT support builds and actually works
and it's no different than x86 in respect that it's Windows specific ACPI table.
Justification for using WDAT on ARM is the same as x86,
reuse a more generic driver that h... | {
"author": "Igor Mammedov <imammedo@redhat.com>",
"date": "Wed, 18 Feb 2026 10:29:41 +0100",
"is_openbsd": false,
"thread_id": "CAFEAcA-DtSE4MsN2XcBkOk5t3Xbe_Kz_MtUwfCkas4Q7R7CFnw@mail.gmail.com.mbox.gz"
} |
lkml_critique | qemu-devel | replace blank table with a new one:
[000h 0000 4] Signature : "WDAT" [Watchdog Action Table]
[004h 0004 4] Table Length : 00000104
[008h 0008 1] Revision : 01
[009h 0009 1] Checksum : EB
[00Ah 0010 6] Oem ID :... | null | null | null | [PATCH 11/11] tests: acpi: arm/virt: update expected WDAT blob | On Fri, 6 Feb 2026 at 13:15, Igor Mammedov <imammedo@redhat.com> wrote:
Please can you also add support for exposing this device
in the device tree ?
Can we have a command line option name that isn't ACPI
specific, please? There's nothing inherent to ACPI about
"I would like a watchdog device".
thanks
-- PMM | {
"author": "Peter Maydell <peter.maydell@linaro.org>",
"date": "Wed, 18 Feb 2026 19:08:36 +0000",
"is_openbsd": false,
"thread_id": "CAFEAcA-DtSE4MsN2XcBkOk5t3Xbe_Kz_MtUwfCkas4Q7R7CFnw@mail.gmail.com.mbox.gz"
} |
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