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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 #include <stdbool.h> #include "sw/device/lib/base/status.h" #include "sw/device/lib/testing/entropy_testutils.h" #include "sw/device/lib/testing/test...
opentitan/sw/device/tests/penetrationtests/firmware/firmware_sca.c
arch_code
opentitan
opentitan/sw/device
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
c
false
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 #include "sw/device/lib/base/hardened_memory.h" #include "sw/device/lib/crypto/drivers/otbn.h" #include "sw/device/lib/crypto/impl/keyblob.h" #includ...
opentitan/sw/device/tests/crypto/x25519_sideload_functest.c
arch_code
opentitan
opentitan/sw/device
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
c
false
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 // Test cs_cmd_req_done, cs_entropy_req, cs_hw_inst_exc and cs_fatal_err interrupts // fired as expected class csrng_intr_vseq extends csrng_base_vs...
opentitan/hw/ip/csrng/dv/env/seq_lib/csrng_intr_vseq.sv
arch_code
opentitan
opentitan/hw/ip
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
false
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 // Response sequence for csrng protocols. // This sequence will infinitely pol for any DUT requests detected by // the monitor, and trigger the respo...
opentitan/hw/dv/sv/csrng_agent/seq_lib/csrng_device_seq.sv
arch_code
opentitan
opentitan/hw/dv
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 #include "hw/top/dt/hmac.h" #include "sw/device/lib/arch/device.h" #include "sw/device/lib/base/abs_mmio.h" #include "sw/device/lib/base/bitfield.h" ...
opentitan/sw/device/tests/hmac_endianness_test.c
arch_code
opentitan
opentitan/sw/device
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
c
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 #ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_FREESTANDING_HARDENED_H_ #define OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_FREESTANDING_HARDENED_H_ /** ...
opentitan/sw/device/lib/crypto/include/freestanding/hardened.h
arch_code
opentitan
opentitan/sw/device
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
c
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 class pattgen_base_vseq extends cip_base_vseq #( .RAL_T (pattgen_reg_block), .CFG_T (pattgen_env_cfg), .COV_T...
opentitan/hw/ip/pattgen/dv/env/seq_lib/pattgen_base_vseq.sv
arch_code
opentitan
opentitan/hw/ip
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
false
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 // // Slow to fast clock synchronizer // This module is designed to be used for efficient sampling of signals from a slow clock to a much // faster cl...
opentitan/hw/ip/prim/rtl/prim_sync_slow_fast.sv
arch_code
opentitan
opentitan/hw/ip
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 #include "sw/device/tests/penetrationtests/firmware/sca/ibex_sca.h" #include "sw/device/lib/base/memory.h" #include "sw/device/lib/base/status.h" #i...
opentitan/sw/device/tests/penetrationtests/firmware/sca/ibex_sca.c
arch_code
opentitan
opentitan/sw/device
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
c
false
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 #ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_DRIVERS_ALERT_H_ #define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_DRIVERS_ALERT_H_ #include <stddef.h>...
opentitan/sw/device/silicon_creator/lib/drivers/alert.h
arch_code
opentitan
opentitan/sw/device
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
c
false
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 class keymgr_dpe_base_test extends cip_base_test #( .CFG_T(keymgr_dpe_env_cfg), .ENV_T(keymgr_dpe_env) ); `uvm_component_utils(keymgr_dp...
opentitan/hw/ip/keymgr_dpe/dv/tests/keymgr_dpe_base_test.sv
arch_code
opentitan
opentitan/hw/ip
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 class cheriot_mem_sys_common_vseq extends cheriot_mem_sys_base_vseq; `uvm_object_utils(cheriot_mem_sys_common_vseq) constraint num_trans_c { ...
opentitan/hw/ip/cheriot_mem_sys/dv/env/seq_lib/cheriot_mem_sys_common_vseq.sv
arch_code
opentitan
opentitan/hw/ip
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 //############################################################################ // *Name: rglts_pdm_3p3v // *Module Description: Regulators (MAIN & AON...
opentitan/hw/top_darjeeling/ip/ast/rtl/rglts_pdm_3p3v.sv
arch_code
opentitan
opentitan/hw/top_darjeeling
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 #ifndef OPENTITAN_SW_DEVICE_LIB_DIF_DIF_AES_H_ #define OPENTITAN_SW_DEVICE_LIB_DIF_DIF_AES_H_ #include <stdbool.h> #include <stdint.h> #include "sw...
opentitan/sw/device/lib/dif/dif_aes.h
arch_code
opentitan
opentitan/sw/device
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
c
false
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 #include "sw/device/sca/otbn_vertical/ecc256_modinv_serial.h" #include "sw/device/lib/base/abs_mmio.h" #include "sw/device/lib/base/memory.h" #inclu...
opentitan/sw/device/sca/otbn_vertical/ecc256_modinv_serial.c
arch_code
opentitan
opentitan/sw/device
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
c
false
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 #include "sw/device/lib/testing/test_framework/check.h" #include "sw/device/lib/testing/test_framework/ottf_main.h" #include "sw/device/silicon_creat...
opentitan/sw/device/silicon_creator/lib/sigverify/ecdsa_p256_verify_functest.c
arch_code
opentitan
opentitan/sw/device
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
c
false
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 #ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_EDN_SCA_COMMANDS_H_ #define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_EDN_SCA_COMMANDS_...
opentitan/sw/device/tests/penetrationtests/json/edn_sca_commands.h
arch_code
opentitan
opentitan/sw/device
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
c
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 // Stress 'memory-to-memory' DMA transfers class dma_memory_stress_vseq extends dma_memory_vseq; `uvm_object_utils(dma_memory_stress_vseq) `uvm_o...
opentitan/hw/ip/dma/dv/env/seq_lib/dma_memory_stress_vseq.sv
arch_code
opentitan
opentitan/hw/ip
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
false
0.389
false
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 // Min length out transaction_vseq class usbdev_min_length_out_transaction_vseq extends usbdev_random_length_out_transaction_vseq; `uvm_object_util...
opentitan/hw/ip/usbdev/dv/env/seq_lib/usbdev_min_length_out_transaction_vseq.sv
arch_code
opentitan
opentitan/hw/ip
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
false
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 #include "sw/device/lib/dif/dif_otp_ctrl.h" #include <stddef.h> #include "sw/device/lib/base/bitfield.h" #include "sw/device/lib/base/macros.h" #inc...
opentitan/sw/device/lib/dif/dif_otp_ctrl.c
arch_code
opentitan
opentitan/sw/device
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
c
false
0.219
false
false
37,375
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 #ifndef OPENTITAN_SW_DEVICE_LIB_TESTING_PWRMGR_TESTUTILS_H_ #define OPENTITAN_SW_DEVICE_LIB_TESTING_PWRMGR_TESTUTILS_H_ #include <stdint.h> #includ...
opentitan/sw/device/lib/testing/pwrmgr_testutils.h
arch_code
opentitan
opentitan/sw/device
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
c
false
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 // // Derived from code in the SPHINCS+ reference implementation (CC0 license): // https://github.com/sphincs/sphincsplus/blob/ed15dd78658f63288c7492c...
opentitan/sw/device/silicon_creator/lib/sigverify/sphincsplus/wots.c
arch_code
opentitan
opentitan/sw/device
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
c
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 #include "sw/device/silicon_creator/lib/boot_log.h" #include "sw/device/lib/base/macros.h" #include "sw/device/silicon_creator/lib/drivers/hmac.h" ...
opentitan/sw/device/silicon_creator/lib/boot_log.c
arch_code
opentitan
opentitan/sw/device
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
c
false
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 class tpm_read_hw_reg_cg_wrap; covergroup tpm_read_hw_reg_cg (string name) with function sample( bit hit); option.per_instance = 1; o...
opentitan/hw/ip/spi_device/dv/env/spi_device_env_cov.sv
arch_code
opentitan
opentitan/hw/ip
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
false
0.068
false
false
12,191
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 // Interface used for fault inject verification interface force_if import uvm_pkg::*; #(parameter string Signal = "", parameter int SignalWid...
opentitan/hw/ip/aes/dv/err_injection_if/force_if.sv
arch_code
opentitan
opentitan/hw/ip
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
false
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 // Note that since rma process takes more than 100ms in dvsim, // the test runs 1.6h (110ms in simtime). #include "sw/device/lib/arch/device.h" #inc...
opentitan/sw/device/tests/sim_dv/rram_rma_unlocked_test.c
arch_code
opentitan
opentitan/sw/device
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
c
false
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 // This test randomly forces critical control signals inside one of the independent, redundant // logic rails of the cipher core FSM. The test then c...
opentitan/hw/ip/aes/dv/env/seq_lib/aes_cipher_fi_vseq.sv
arch_code
opentitan
opentitan/hw/ip
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
false
0.245
false
false
4,678
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 // module tb; // dep packages import uvm_pkg::*; import dv_utils_pkg::*; import tl_agent_pkg::*; import hmac_env_pkg::*; import hmac_test_...
opentitan/hw/ip/hmac/dv/tb/tb.sv
arch_code
opentitan
opentitan/hw/ip
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 // // RRAM Controller Arbiter // Arbitrates between two hardware interfaces (Lcmgr, OtpCtrl) and a software interface `include "prim_assert.sv" modu...
opentitan/hw/ip/rram_ctrl/rtl/rram_ctrl_arb.sv
arch_code
opentitan
opentitan/hw/ip
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 #ifndef OPENTITAN_SW_DEVICE_TESTS_CRYPTO_CRYPTOTEST_JSON_KMAC_COMMANDS_H_ #define OPENTITAN_SW_DEVICE_TESTS_CRYPTO_CRYPTOTEST_JSON_KMAC_COMMANDS_H_ #...
opentitan/sw/device/tests/crypto/cryptotest/json/kmac_commands.h
arch_code
opentitan
opentitan/sw/device
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
c
false
0.587
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 // basic fifo_overflow test vseq class i2c_host_fifo_overflow_vseq extends i2c_rx_tx_vseq; `uvm_object_utils(i2c_host_fifo_overflow_vseq) `uvm_ob...
opentitan/hw/ip/i2c/dv/env/seq_lib/i2c_host_fifo_overflow_vseq.sv
arch_code
opentitan
opentitan/hw/ip
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 // A "window" into a register block for a templated racl_ctrl instance. class racl_ctrl_reg_window extends uvm_object; `uvm_object_utils(racl_ctrl_...
opentitan/hw/ip/racl_ctrl/dv/env/racl_ctrl_reg_window.sv
arch_code
opentitan
opentitan/hw/ip
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
false
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 #include "sw/device/lib/base/mmio.h" #include "sw/device/lib/dif/dif_adc_ctrl.h" #include "sw/device/lib/dif/dif_pwrmgr.h" #include "sw/device/lib/di...
opentitan/sw/device/tests/sim_dv/adc_ctrl_sleep_debug_cable_wakeup_test.c
arch_code
opentitan
opentitan/sw/device
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
c
false
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 class otp_ctrl_virtual_sequencer extends cip_base_virtual_sequencer #( .CFG_T(otp_ctrl_env_cfg), .COV_T(otp_ctrl_env_cov) ); `uvm_compone...
opentitan/hw/top_darjeeling/ip_autogen/otp_ctrl/dv/env/otp_ctrl_virtual_sequencer.sv
arch_code
opentitan
opentitan/hw/top_darjeeling
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 #ifndef OPENTITAN_SW_DEVICE_TESTS_CRYPTO_CRYPTOTEST_JSON_HKDF_COMMANDS_H_ #define OPENTITAN_SW_DEVICE_TESTS_CRYPTO_CRYPTOTEST_JSON_HKDF_COMMANDS_H_ #...
opentitan/sw/device/tests/crypto/cryptotest/json/hkdf_commands.h
arch_code
opentitan
opentitan/sw/device
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
c
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 `uvm_analysis_imp_decl(_kmac_req) `uvm_analysis_imp_decl(_kmac_txn) class keymgr_dpe_scoreboard extends cip_base_scoreboard #( .CFG_T(keymgr_dpe...
opentitan/hw/ip/keymgr_dpe/dv/env/keymgr_dpe_scoreboard.sv
arch_code
opentitan
opentitan/hw/ip
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 #include "sw/device/lib/testing/test_framework/check.h" #include "sw/device/lib/testing/test_framework/ottf_main.h" #include "sw/device/silicon_creat...
opentitan/sw/device/silicon_creator/rom/e2e/shutdown_alert/rom_e2e_alert_config_test.c
arch_code
opentitan
opentitan/sw/device
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
c
false
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// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 // A sequence that runs a program multiple times and corrupts the `ispr_rdata_intg_i` signal of // `otbn_controller` while OTBN is still running. cl...
opentitan/hw/ip/otbn/dv/uvm/env/seq_lib/otbn_controller_ispr_rdata_err_vseq.sv
arch_code
opentitan
opentitan/hw/ip
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
false
0.175
false
false
1,927
-1
// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 #include "sw/device/lib/dif/dif_entropy_src.h" #include "sw/device/lib/testing/test_framework/check.h" #include "sw/device/lib/testing/test_framework...
opentitan/sw/device/tests/entropy_src_kat_test.c
arch_code
opentitan
opentitan/sw/device
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
c
false
0.5
false
false
599
-1
// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 class ac_range_check_env_cfg extends cip_base_env_cfg #(.RAL_T(ac_range_check_reg_block)); // Enabling Scoreboard checks downgrading in ac_range_c...
opentitan/hw/top_darjeeling/ip_autogen/ac_range_check/dv/env/ac_range_check_env_cfg.sv
arch_code
opentitan
opentitan/hw/top_darjeeling
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
false
0.37
false
false
2,537
-1
// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 class mbx_async_msg_vseq extends mbx_base_vseq; rand uint_t m_req_dw_sz; rand uint_t m_rsp_dw_sz; rand uint_t m_num_msg; rand uint_t m_num_o...
opentitan/hw/ip/mbx/dv/env/seq_lib/mbx_async_msg_vseq.sv
arch_code
opentitan
opentitan/hw/ip
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
false
0.138
false
false
4,464
-1
// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 #include "sw/device/lib/base/memory.h" #include "sw/device/lib/crypto/drivers/otbn.h" #include "sw/device/lib/crypto/include/config.h" #include "sw/d...
opentitan/sw/device/tests/crypto/rsa_4096_signature_functest.c
arch_code
opentitan
opentitan/sw/device
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
c
false
0.227
false
false
19,053
-1
// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 #ifndef OPENTITAN_HW_DV_VERILATOR_CPP_VERILATOR_MEMUTIL_H_ #define OPENTITAN_HW_DV_VERILATOR_CPP_VERILATOR_MEMUTIL_H_ // // A wrapper class that conv...
opentitan/hw/dv/verilator/cpp/verilator_memutil.h
arch_code
opentitan
opentitan/hw/dv
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
c
false
0.548
false
false
1,301
-1
// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 // Test maximum sram throughput with zero_delays=1 // // The minimum possible time for an SRAM operation is two cycles (one for the A channel request...
opentitan/hw/ip/sram_ctrl/dv/env/seq_lib/sram_ctrl_throughput_vseq.sv
arch_code
opentitan
opentitan/hw/ip
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
false
0.355
false
false
7,438
-1
// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 class adc_ctrl_base_vseq extends cip_base_vseq #( .RAL_T (adc_ctrl_reg_block), .CFG_T (adc_ctrl_env_cfg), .COV_T ...
opentitan/hw/ip/adc_ctrl/dv/env/seq_lib/adc_ctrl_base_vseq.sv
arch_code
opentitan
opentitan/hw/ip
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
false
0.233
false
false
7,205
-1
// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 #ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_CRYPTOLIB_FI_ASYM_H_ #define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_CR...
opentitan/sw/device/tests/penetrationtests/firmware/fi/cryptolib_fi_asym.h
arch_code
opentitan
opentitan/sw/device
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
c
false
0.911
false
false
8,309
-1
// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 class aes_sideload_test extends aes_base_test; `uvm_component_utils(aes_sideload_test) `uvm_component_new virtual function void build_phase(...
opentitan/hw/ip/aes/dv/tests/aes_sideload_test.sv
arch_code
opentitan
opentitan/hw/ip
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
false
0.095
false
false
1,734
-1
// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 // We are enclosing generic covergroups inside class so that we can // take avoid tool limitation of not allowing arrays of covergroup // Refer to Is...
opentitan/hw/ip/sysrst_ctrl/dv/env/sysrst_ctrl_env_cov.sv
arch_code
opentitan
opentitan/hw/ip
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
false
0.118
false
false
12,993
-1
// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 class kmac_mubi_vseq extends kmac_app_vseq; `uvm_object_utils(kmac_mubi_vseq) `uvm_object_new constraint en_app_c { en_app dist { 0...
opentitan/hw/ip/kmac/dv/env/seq_lib/kmac_mubi_vseq.sv
arch_code
opentitan
opentitan/hw/ip
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
false
0.2
false
false
1,014
-1
// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 #ifndef OPENTITAN_SW_DEVICE_TESTS_CRYPTO_CRYPTOTEST_FIRMWARE_AES_H_ #define OPENTITAN_SW_DEVICE_TESTS_CRYPTO_CRYPTOTEST_FIRMWARE_AES_H_ #include "sw...
opentitan/sw/device/tests/crypto/cryptotest/firmware/aes.h
arch_code
opentitan
opentitan/sw/device
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
c
false
0.8
false
false
533
-1
// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 // target specific signals inside the CTR mode FSM interface fi_ctr_fsm_if import uvm_pkg::*; import aes_pkg::*; ( input logic clk_i, ...
opentitan/hw/ip/aes/dv/err_injection_if/fi_ctr_fsm_if.sv
arch_code
opentitan
opentitan/hw/ip
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
false
0.322
false
false
3,725
-1
// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 #include <assert.h> #include <stdbool.h> #include "sw/device/lib/base/bitfield.h" #include "sw/device/lib/base/memory.h" #include "sw/device/lib/bas...
opentitan/sw/device/tests/lc_ctrl_otp_hw_cfg0_test.c
arch_code
opentitan
opentitan/sw/device
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
c
false
0.435
false
false
2,641
-1
// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 #include "sw/device/lib/crypto/drivers/otbn.h" #include "sw/device/lib/crypto/impl/ecc/p384.h" #include "sw/device/lib/crypto/include/config.h" #incl...
opentitan/sw/device/tests/crypto/ecc_p384_point_on_curve_check_functest.c
arch_code
opentitan
opentitan/sw/device
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
c
false
0.172
false
false
7,569
-1
// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 class entropy_src_virtual_sequencer extends cip_base_virtual_sequencer #( .CFG_T(entropy_src_env_cfg), .COV_T(entropy_src_env_cov) ); `uv...
opentitan/hw/ip/entropy_src/dv/env/entropy_src_virtual_sequencer.sv
arch_code
opentitan
opentitan/hw/ip
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
false
0.231
false
false
690
-1
// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 class usbdev_data_toggle_clear_vseq extends usbdev_base_vseq; `uvm_object_utils(usbdev_data_toggle_clear_vseq) `uvm_object_new // Randomized ...
opentitan/hw/ip/usbdev/dv/env/seq_lib/usbdev_data_toggle_clear_vseq.sv
arch_code
opentitan
opentitan/hw/ip
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
false
0.29
false
false
3,229
-1
// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 // // Ascon package package ascon_pkg; typedef enum logic [11:0] { MSG_IN = {prim_mubi_pkg::MuBi4True, prim_mubi_pkg::MuBi4False, prim_mubi_pkg::...
opentitan/hw/ip/ascon/rtl/ascon_pkg.sv
arch_code
opentitan
opentitan/hw/ip
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
false
0.391
false
false
2,075
-1
// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 #include "hw/ip/aes/model/aes_modes.h" #include "hw/top/dt/aes.h" #include "hw/top/dt/alert_handler.h" #include "hw/top/dt/csrng.h" #include "hw/top/...
opentitan/sw/device/tests/entropy_src_bypass_mode_health_test.c
arch_code
opentitan
opentitan/sw/device
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
c
false
0.265
false
false
16,513
-1
// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 #include "sw/device/lib/dif/dif_spi_device.h" #include "sw/device/lib/runtime/log.h" #include "sw/device/lib/testing/spi_device_testutils.h" #include...
opentitan/sw/device/tests/spi_device_ottf_console_test.c
arch_code
opentitan
opentitan/sw/device
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
c
false
0.088
false
false
9,486
-1
// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 // Test recoverable alerts with invalid mubi data type inputs and edn_bus_cmp_alert class edn_alert_vseq extends edn_base_vseq; `uvm_object_utils(e...
opentitan/hw/ip/edn/dv/env/seq_lib/edn_alert_vseq.sv
arch_code
opentitan
opentitan/hw/ip
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
false
0.197
false
false
26,717
-1
// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 module usb20_usbdpi ( input clk_i, input rst_ni, // Enable DPI module functionality input enable, // Outputs from the DPI module ...
opentitan/hw/dv/sv/usb20_agent/usb20_usbdpi.sv
arch_code
opentitan
opentitan/hw/dv
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
false
0.327
false
false
6,097
-1
// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 package spi_host_test_pkg; // dep packages import uvm_pkg::*; import dv_utils_pkg::*; import cip_base_pkg::*; import spi_host_env_pkg::*; ...
opentitan/hw/ip/spi_host/dv/tests/spi_host_test_pkg.sv
arch_code
opentitan
opentitan/hw/ip
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
false
0.471
false
false
498
-1
// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 #include "sw/device/silicon_creator/lib/boot_svc/boot_svc_empty.h" void boot_svc_empty_req_init(boot_svc_empty_t *msg) { // We use `uint32_t` inst...
opentitan/sw/device/silicon_creator/lib/boot_svc/boot_svc_empty.c
arch_code
opentitan
opentitan/sw/device
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
c
false
0.273
false
false
1,006
-1
// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 class aes_seq_item extends uvm_sequence_item; `uvm_object_utils(aes_seq_item) aes_item_type_e item_type; bit [1:0] operation; ///////////...
opentitan/hw/ip/aes/dv/env/aes_seq_item.sv
arch_code
opentitan
opentitan/hw/ip
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
false
0.202
false
false
13,358
-1
// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 #include "sw/device/tests/penetrationtests/firmware/sca/kmac_sca.h" #include "sw/device/lib/base/memory.h" #include "sw/device/lib/base/status.h" #i...
opentitan/sw/device/tests/penetrationtests/firmware/sca/kmac_sca.c
arch_code
opentitan
opentitan/sw/device
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
c
false
0.402
false
false
24,051
-1
// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 // // HMAC/SHA-2 256/384/512 `include "prim_assert.sv" module hmac import prim_sha2_pkg::*; import hmac_reg_pkg::*; #( parameter logic [NumAle...
opentitan/hw/ip/hmac/rtl/hmac.sv
arch_code
opentitan
opentitan/hw/ip
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
false
0.203
false
false
39,576
-1
// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 #include "sw/device/lib/base/status.h" #include "sw/device/lib/dif/dif_lc_ctrl.h" #include "sw/device/lib/dif/dif_otp_ctrl.h" #include "sw/device/lib...
opentitan/sw/device/silicon_creator/manuf/lib/personalize_functest.c
arch_code
opentitan
opentitan/sw/device
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
c
false
0.357
false
false
6,458
-1
// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 class cheriot_mem_sys_scoreboard extends cip_base_scoreboard #( .CFG_T(cheriot_mem_sys_env_cfg), .RAL_T(cheriot_mem_sys_regs_reg_block), ...
opentitan/hw/ip/cheriot_mem_sys/dv/env/cheriot_mem_sys_scoreboard.sv
arch_code
opentitan
opentitan/hw/ip
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
false
0.22
false
false
3,413
-1
// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 /** * Covergroups that are dependent on run-time parameters that may be available * only in build_phase can be defined here * Covergroups may also...
opentitan/hw/ip/adc_ctrl/dv/env/adc_ctrl_env_cov.sv
arch_code
opentitan
opentitan/hw/ip
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
false
0.213
false
false
3,978
-1
// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 class pattgen_env extends cip_base_env #( .CFG_T (pattgen_env_cfg), .COV_T (pattgen_env_cov), .VIRTUAL_SEQUEN...
opentitan/hw/ip/pattgen/dv/env/pattgen_env.sv
arch_code
opentitan
opentitan/hw/ip
Apache-2.0
Apache-2.0
41049e9deb40e0602cd5272c40398be380ae2637
other
false
0.107
false
false
1,225
-1
// See LICENSE.SiFive for license details. package freechips.rocketchip.resources import scala.collection.immutable.SortedMap import freechips.rocketchip.diplomacy.{AddressRange} object JSON { def apply(res: ResourceValue): String = { val root = res match { case ResourceMap(value, _) => value.toList matc...
rocket-chip/src/main/scala/resources/JSON.scala
arch_code
rocket-chip
rocket-chip/src/main
BSD-3-Clause OR Apache-2.0
BSD-3-Clause OR Apache-2.0
ece7b9ad544b07df39cd13b6fd7236562a26355d
other
false
0.024
false
false
1,886
-1
// See LICENSE.SiFive for license details. // See LICENSE.Berkeley for license details. package freechips.rocketchip.rocket import chisel3.{dontTouch, _} import chisel3.util._ import org.chipsalliance.cde.config._ import org.chipsalliance.diplomacy.bundlebridge._ import org.chipsalliance.diplomacy.lazymodule._ impo...
rocket-chip/src/main/scala/rocket/HellaCache.scala
arch_code
rocket-chip
rocket-chip/src/main
BSD-3-Clause OR Apache-2.0
BSD-3-Clause OR Apache-2.0
ece7b9ad544b07df39cd13b6fd7236562a26355d
other
false
0.031
false
false
13,151
-1
// See LICENSE.SiFive for license details. package freechips.rocketchip.resources class FixedClockResource(val name: String, val freqMHz: Double, val prefix: String = "soc/") { val device = new DeviceSnippet { def describe() = Description(prefix + name, Map( "#clock-cells" -> Seq(ResourceInt...
rocket-chip/src/main/scala/resources/FixedClockResource.scala
arch_code
rocket-chip
rocket-chip/src/main
BSD-3-Clause OR Apache-2.0
BSD-3-Clause OR Apache-2.0
ece7b9ad544b07df39cd13b6fd7236562a26355d
other
false
0.062
false
false
654
-1
// See LICENSE for license details. package freechips.rocketchip.formal import chisel3._ import chisel3.experimental.{SourceInfo, SourceLine} import chisel3.util._ import org.chipsalliance.cde.config._ sealed abstract class MonitorDirection(name: String) { override def toString: String = name def flip: MonitorDi...
rocket-chip/src/main/scala/formal/FormalUtils.scala
arch_code
rocket-chip
rocket-chip/src/main
BSD-3-Clause OR Apache-2.0
BSD-3-Clause OR Apache-2.0
ece7b9ad544b07df39cd13b6fd7236562a26355d
other
false
0.041
false
false
8,087
-1
// See LICENSE.SiFive for license details. package freechips.rocketchip.rocket import chisel3._ import chisel3.util.{Cat, log2Ceil} import org.chipsalliance.cde.config._ import freechips.rocketchip.tile._ import freechips.rocketchip.util._ class PMPConfig extends Bundle { val l = Bool() val res = UInt(2.W) val...
rocket-chip/src/main/scala/rocket/PMP.scala
arch_code
rocket-chip
rocket-chip/src/main
BSD-3-Clause OR Apache-2.0
BSD-3-Clause OR Apache-2.0
ece7b9ad544b07df39cd13b6fd7236562a26355d
other
false
0.044
false
false
7,565
-1
// See LICENSE.SiFive for license details. package freechips.rocketchip.amba.axis import org.chipsalliance.cde.config.Parameters import org.chipsalliance.diplomacy.lazymodule.{LazyModule, LazyModuleImp} import freechips.rocketchip.diplomacy.BufferParams class AXISBuffer(val params: BufferParams)(implicit p: Paramet...
rocket-chip/src/main/scala/amba/axis/Buffer.scala
arch_code
rocket-chip
rocket-chip/src/main
BSD-3-Clause OR Apache-2.0
BSD-3-Clause OR Apache-2.0
ece7b9ad544b07df39cd13b6fd7236562a26355d
other
false
0.045
false
false
803
-1
package freechips.rocketchip.diplomacy import chisel3.RawModule import chisel3.stage.ChiselGeneratorAnnotation import chisel3.stage.phases.{Elaborate, Convert} import firrtl.AnnotationSeq import firrtl.options.TargetDirAnnotation import org.chipsalliance.diplomacy.lazymodule.LazyModule import org.chipsalliance.cde.con...
rocket-chip/src/main/scala/diplomacy/Main.scala
arch_code
rocket-chip
rocket-chip/src/main
BSD-3-Clause OR Apache-2.0
BSD-3-Clause OR Apache-2.0
ece7b9ad544b07df39cd13b6fd7236562a26355d
other
false
0
false
false
2,105
-1
// See LICENSE.SiFive for license details. package freechips.rocketchip.system import chisel3._ import org.chipsalliance.cde.config._ import org.chipsalliance.diplomacy.lazymodule._ import freechips.rocketchip.devices.debug.Debug import freechips.rocketchip.util.AsyncResetReg class TestHarness()(implicit p: Parame...
rocket-chip/src/main/scala/system/TestHarness.scala
arch_code
rocket-chip
rocket-chip/src/main
BSD-3-Clause OR Apache-2.0
BSD-3-Clause OR Apache-2.0
ece7b9ad544b07df39cd13b6fd7236562a26355d
other
false
0.088
false
false
1,335
-1
// See LICENSE.SiFive for license details. package freechips.rocketchip.amba.apb import chisel3._ import org.chipsalliance.cde.config.Parameters import org.chipsalliance.diplomacy.lazymodule.{LazyModule, LazyModuleImp} import freechips.rocketchip.diplomacy.{BufferParams, AddressSet} import freechips.rocketchip.reg...
rocket-chip/src/main/scala/amba/apb/Test.scala
arch_code
rocket-chip
rocket-chip/src/main
BSD-3-Clause OR Apache-2.0
BSD-3-Clause OR Apache-2.0
ece7b9ad544b07df39cd13b6fd7236562a26355d
other
false
0.024
false
false
1,763
-1
// See LICENSE.SiFive for license details. package freechips.rocketchip.util import chisel3._ import chisel3.util._ /////////////////////////////// Abstract API for the Queue ///////////////////////// class LanePositionedDecoupledIO[T <: Data](private val gen: T, val maxValid: Int, val maxReady: Int) extends Bundle...
rocket-chip/src/main/scala/util/LanePositionedQueue.scala
arch_code
rocket-chip
rocket-chip/src/main
BSD-3-Clause OR Apache-2.0
BSD-3-Clause OR Apache-2.0
ece7b9ad544b07df39cd13b6fd7236562a26355d
other
false
0.109
false
false
21,341
-1
// See LICENSE.SiFive for license details. package freechips.rocketchip.util import chisel3._ import chisel3.{withClockAndReset, withReset} /** Reset: asynchronous assert, * synchronous de-assert * */ class ResetCatchAndSync (sync: Int = 3) extends Module { override def desiredName = s"ResetCatchAndSync_d...
rocket-chip/src/main/scala/util/ResetCatchAndSync.scala
arch_code
rocket-chip
rocket-chip/src/main
BSD-3-Clause OR Apache-2.0
BSD-3-Clause OR Apache-2.0
ece7b9ad544b07df39cd13b6fd7236562a26355d
other
false
0.2
false
false
1,771
-1
// See LICENSE.SiFive for license details. package freechips.rocketchip.tilelink import chisel3._ import chisel3.util._ import org.chipsalliance.cde.config._ import org.chipsalliance.diplomacy.lazymodule._ import freechips.rocketchip.diplomacy.{AddressSet, TransferSizes} import freechips.rocketchip.util.leftOR imp...
rocket-chip/src/main/scala/tilelink/AtomicAutomata.scala
arch_code
rocket-chip
rocket-chip/src/main
BSD-3-Clause OR Apache-2.0
BSD-3-Clause OR Apache-2.0
ece7b9ad544b07df39cd13b6fd7236562a26355d
other
false
0.111
false
false
15,653
-1
// See LICENSE.jtag for license details. package freechips.rocketchip.jtag import scala.collection.SortedMap import chisel3._ import org.chipsalliance.cde.config.Parameters /** JTAG signals, viewed from the master side */ class JTAGIO(hasTRSTn: Boolean = false) extends Bundle { val TRSTn = if (hasTRSTn) Some(Ou...
rocket-chip/src/main/scala/jtag/JtagTap.scala
arch_code
rocket-chip
rocket-chip/src/main
BSD-3-Clause OR Apache-2.0
BSD-3-Clause OR Apache-2.0
ece7b9ad544b07df39cd13b6fd7236562a26355d
other
false
0.304
false
false
9,729
-1
// See LICENSE.SiFive for license details. package freechips.rocketchip.tile import chisel3._ import org.chipsalliance.cde.config._ import freechips.rocketchip.prci.ClockSinkParameters import freechips.rocketchip.rocket.TracedInstruction import freechips.rocketchip.subsystem.{HierarchicalElementCrossingParamsLike, ...
rocket-chip/src/main/scala/tile/TilePRCIDomain.scala
arch_code
rocket-chip
rocket-chip/src/main
BSD-3-Clause OR Apache-2.0
BSD-3-Clause OR Apache-2.0
ece7b9ad544b07df39cd13b6fd7236562a26355d
other
false
0.375
false
false
1,116
-1
// See LICENSE.SiFive for license details. package freechips.rocketchip.tilelink import chisel3._ class IdentityModule[T <: Data](gen: T) extends Module { val io = IO(new Bundle { val in = Flipped(gen.cloneType) val out = gen.cloneType }) io.out := io.in } object IdentityModule { def apply[T <: Dat...
rocket-chip/src/main/scala/util/IdentityModule.scala
arch_code
rocket-chip
rocket-chip/src/main
BSD-3-Clause OR Apache-2.0
BSD-3-Clause OR Apache-2.0
ece7b9ad544b07df39cd13b6fd7236562a26355d
other
false
0.053
false
false
435
-1
// See LICENSE.SiFive for license details. package freechips.rocketchip.util import chisel3._ import chisel3.util.log2Ceil import scala.collection.mutable.{HashMap} case class ROMConfig(name: String, depth: Int, width: Int) class BlackBoxedROM(c: ROMConfig) extends BlackBox { val io = IO(new Bundle { val cloc...
rocket-chip/src/main/scala/util/ROMGenerator.scala
arch_code
rocket-chip
rocket-chip/src/main
BSD-3-Clause OR Apache-2.0
BSD-3-Clause OR Apache-2.0
ece7b9ad544b07df39cd13b6fd7236562a26355d
other
false
0.033
false
false
865
-1
// See LICENSE.Berkeley for license details. // See LICENSE.SiFive for license details. package freechips.rocketchip.rocket import chisel3._ import chisel3.util._ import chisel3.withClock import org.chipsalliance.cde.config.Parameters import freechips.rocketchip.tile._ import freechips.rocketchip.util._ import freech...
rocket-chip/src/main/scala/rocket/RocketCore.scala
arch_code
rocket-chip
rocket-chip/src/main
BSD-3-Clause OR Apache-2.0
BSD-3-Clause OR Apache-2.0
ece7b9ad544b07df39cd13b6fd7236562a26355d
other
false
0.029
false
false
62,895
-1
// See LICENSE.SiFive for license details. package freechips.rocketchip.tilelink import chisel3._ import chisel3.util._ import chisel3.util.random.LFSR import org.chipsalliance.cde.config.Parameters import freechips.rocketchip.util._ object TLArbiter { // (valids, select) => readys type Policy = (Integer, UInt, ...
rocket-chip/src/main/scala/tilelink/Arbiter.scala
arch_code
rocket-chip
rocket-chip/src/main
BSD-3-Clause OR Apache-2.0
BSD-3-Clause OR Apache-2.0
ece7b9ad544b07df39cd13b6fd7236562a26355d
other
false
0.117
false
false
7,382
-1
// See LICENSE.SiFive for license details. package freechips.rocketchip.prci import chisel3._ import chisel3.util._ import org.chipsalliance.cde.config._ import org.chipsalliance.diplomacy.lazymodule._ import freechips.rocketchip.util.{ClockDivider3, Pow2ClockDivider} /* An example clock adapter that divides all cl...
rocket-chip/src/main/scala/prci/ClockDivider.scala
arch_code
rocket-chip
rocket-chip/src/main
BSD-3-Clause OR Apache-2.0
BSD-3-Clause OR Apache-2.0
ece7b9ad544b07df39cd13b6fd7236562a26355d
other
false
0.156
false
false
1,492
-1
// See LICENSE.SiFive for license details. package freechips.rocketchip.tilelink import chisel3._ import chisel3.util._ import org.chipsalliance.cde.config._ import org.chipsalliance.diplomacy._ import org.chipsalliance.diplomacy.lazymodule._ import org.chipsalliance.diplomacy.nodes._ import freechips.rocketchip.di...
rocket-chip/src/main/scala/tilelink/ToAPB.scala
arch_code
rocket-chip
rocket-chip/src/main
BSD-3-Clause OR Apache-2.0
BSD-3-Clause OR Apache-2.0
ece7b9ad544b07df39cd13b6fd7236562a26355d
other
false
0.092
false
false
5,044
-1
// See LICENSE.SiFive for license details. package freechips.rocketchip.util import chisel3._ import chisel3.util._ class CrossingIO[T <: Data](gen: T) extends Bundle { // Enqueue clock domain val enq_clock = Input(Clock()) val enq_reset = Input(Bool()) // synchronously deasserted wrt. enq_clock val enq = Fl...
rocket-chip/src/main/scala/util/Crossing.scala
arch_code
rocket-chip
rocket-chip/src/main
BSD-3-Clause OR Apache-2.0
BSD-3-Clause OR Apache-2.0
ece7b9ad544b07df39cd13b6fd7236562a26355d
other
false
0.176
false
false
587
-1
// See LICENSE.SiFive for license details. package freechips.rocketchip.amba.axi4 import chisel3._ import chisel3.util._ import freechips.rocketchip.util._ abstract class AXI4BundleBase(val params: AXI4BundleParameters) extends Bundle /** * Common signals of AW and AR channels of AXI4 protocol */ abstract class...
rocket-chip/src/main/scala/amba/axi4/Bundles.scala
arch_code
rocket-chip
rocket-chip/src/main
BSD-3-Clause OR Apache-2.0
BSD-3-Clause OR Apache-2.0
ece7b9ad544b07df39cd13b6fd7236562a26355d
other
false
0.255
false
false
3,950
-1
// See LICENSE.SiFive for license details. package freechips.rocketchip.amba.apb import chisel3._ import chisel3.util.Mux1H import org.chipsalliance.cde.config.Parameters import org.chipsalliance.diplomacy.lazymodule.{LazyModule, LazyModuleImp} import freechips.rocketchip.diplomacy.AddressDecoder import freechips....
rocket-chip/src/main/scala/amba/apb/Xbar.scala
arch_code
rocket-chip
rocket-chip/src/main
BSD-3-Clause OR Apache-2.0
BSD-3-Clause OR Apache-2.0
ece7b9ad544b07df39cd13b6fd7236562a26355d
other
false
0.042
false
false
2,112
-1
// See LICENSE.Berkeley for license details. // See LICENSE.SiFive for license details. package freechips.rocketchip.trace import chisel3._ class TraceCoreIngress(val params: TraceCoreParams) extends Module { val io = IO(new Bundle { val in = new Bundle { val valid = Input(Bool()) val taken = Input...
rocket-chip/src/main/scala/trace/TraceCoreIngress.scala
arch_code
rocket-chip
rocket-chip/src/main
BSD-3-Clause OR Apache-2.0
BSD-3-Clause OR Apache-2.0
ece7b9ad544b07df39cd13b6fd7236562a26355d
other
false
0.043
false
false
1,694
-1
// See LICENSE.SiFive for license details. package freechips.rocketchip.amba.axi4 import chisel3._ import chisel3.util.IrrevocableIO import org.chipsalliance.cde.config.Parameters import org.chipsalliance.diplomacy.lazymodule.{LazyModule, LazyModuleImp} import freechips.rocketchip.tilelink.LFSRNoiseMaker /** * ...
rocket-chip/src/main/scala/amba/axi4/Delayer.scala
arch_code
rocket-chip
rocket-chip/src/main
BSD-3-Clause OR Apache-2.0
BSD-3-Clause OR Apache-2.0
ece7b9ad544b07df39cd13b6fd7236562a26355d
other
false
0.09
false
false
3,103
-1
// See LICENSE.SiFive for license details. package freechips.rocketchip.util import chisel3._ import chisel3.util._ /** Transmission delay in credit-debit systems. * debit delay is the number of cycles it takes debit+'bits' to transit the link. * credit delay is the number of cycles it takes credits to be return...
rocket-chip/src/main/scala/util/CreditedIO.scala
arch_code
rocket-chip
rocket-chip/src/main
BSD-3-Clause OR Apache-2.0
BSD-3-Clause OR Apache-2.0
ece7b9ad544b07df39cd13b6fd7236562a26355d
other
false
0.269
false
false
5,203
-1
// See LICENSE.SiFive for license details. package freechips.rocketchip.tilelink import chisel3._ import chisel3.util._ import org.chipsalliance.cde.config._ import org.chipsalliance.diplomacy.lazymodule._ import freechips.rocketchip.diplomacy.{AddressSet, IdRange} import freechips.rocketchip.util.{leftOR, UIntToOH...
rocket-chip/src/main/scala/tilelink/Fuzzer.scala
arch_code
rocket-chip
rocket-chip/src/main
BSD-3-Clause OR Apache-2.0
BSD-3-Clause OR Apache-2.0
ece7b9ad544b07df39cd13b6fd7236562a26355d
other
false
0.08
false
false
9,574
-1
// See LICENSE.SiFive for license details. package freechips.rocketchip.subsystem import chisel3._ import org.chipsalliance.cde.config._ import org.chipsalliance.diplomacy.lazymodule._ import freechips.rocketchip.resources.{Device, DeviceInterrupts, Description, ResourceBindings} import freechips.rocketchip.interru...
rocket-chip/src/main/scala/subsystem/InterruptBus.scala
arch_code
rocket-chip
rocket-chip/src/main
BSD-3-Clause OR Apache-2.0
BSD-3-Clause OR Apache-2.0
ece7b9ad544b07df39cd13b6fd7236562a26355d
other
false
0.25
false
false
3,339
-1
// See LICENSE.SiFive for license details. package freechips.rocketchip.util import chisel3._ import freechips.rocketchip.regmapper.RegField import org.json4s.JsonDSL._ import org.json4s.jackson.JsonMethods.{pretty, render} /** Mix this into a Module class or instance to mark its ports as untouchable */ trait Dont...
rocket-chip/src/main/scala/util/Annotations.scala
arch_code
rocket-chip
rocket-chip/src/main
BSD-3-Clause OR Apache-2.0
BSD-3-Clause OR Apache-2.0
ece7b9ad544b07df39cd13b6fd7236562a26355d
other
false
0.209
false
false
1,626
-1
// See LICENSE.SiFive for license details. package freechips.rocketchip.subsystem import chisel3._ import org.chipsalliance.cde.config._ import org.chipsalliance.diplomacy.bundlebridge._ import org.chipsalliance.diplomacy.lazymodule._ import freechips.rocketchip.devices.debug.{TLDebugModule, HasPeripheryDebug} impo...
rocket-chip/src/main/scala/subsystem/HasHierarchicalElements.scala
arch_code
rocket-chip
rocket-chip/src/main
BSD-3-Clause OR Apache-2.0
BSD-3-Clause OR Apache-2.0
ece7b9ad544b07df39cd13b6fd7236562a26355d
other
false
0.14
false
false
12,242
-1
// See LICENSE.Berkeley for license details. // See LICENSE.SiFive for license details. package freechips.rocketchip.rocket import chisel3._ import chisel3.util._ import org.chipsalliance.cde.config.{Parameters} import freechips.rocketchip.tile.{HasCoreParameters} import freechips.rocketchip.util.DecoupledHelper cas...
rocket-chip/src/main/scala/rocket/DebugROB.scala
arch_code
rocket-chip
rocket-chip/src/main
BSD-3-Clause OR Apache-2.0
BSD-3-Clause OR Apache-2.0
ece7b9ad544b07df39cd13b6fd7236562a26355d
other
false
0.042
false
false
6,078
-1