plateform stringclasses 1
value | repo_name stringclasses 2
values | name stringlengths 1 78 | ext stringclasses 2
values | path stringlengths 15 1.11k | size int64 1 8.55M | source_encoding stringclasses 11
values | md5 stringlengths 32 32 | text stringlengths 0 8.49M |
|---|---|---|---|---|---|---|---|---|
google | android | gf100 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf100.c | 3,063 | utf_8 | 37fd75998f8292981630ba46d3a1f623 | /*
*
* Authors: Ben Skeggs
*/
#include "priv.h"
const struct nvkm_mc_intr
gf100_mc_intr[] = {
{ 0x04000000, NVKM_ENGINE_DISP }, /* DISP first, so pageflip timestamps work. */
{ 0x00000001, NVKM_ENGINE_MSPPP },
{ 0x00000020, NVKM_ENGINE_CE0 },
{ 0x00000040, NVKM_ENGINE_CE1 },
{ 0x00000080, NVKM_ENGINE_CE2 },
{... |
google | android | gk20a | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk20a.c | 1,501 | utf_8 | 0d36e7f643a2d240fca45c6f4bb25faa | /*
*
* Authors: Ben Skeggs
*/
#include "priv.h"
static const struct nvkm_mc_func
gk20a_mc = {
.init = nv50_mc_init,
.intr = gf100_mc_intr,
.intr_unarm = gf100_mc_intr_unarm,
.intr_rearm = gf100_mc_intr_rearm,
.intr_mask = gf100_mc_intr_mask,
};
int
gk20a_mc_new(struct nvkm_device *device, int index, struct nvkm... |
google | android | mxms | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/mxm/mxms.c | 4,761 | utf_8 | 0758b475738478da1874a36c95586bc1 | /*
*
* Authors: Ben Skeggs
*/
#include "mxms.h"
#define ROM16(x) le16_to_cpu(*(u16 *)&(x))
#define ROM32(x) le32_to_cpu(*(u32 *)&(x))
static u8 *
mxms_data(struct nvkm_mxm *mxm)
{
return mxm->mxms;
}
u16
mxms_version(struct nvkm_mxm *mxm)
{
u8 *mxms = mxms_data(mxm);
u16 version = (mxms[4] << 8) | mxms[5];
switc... |
google | android | nv50 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/mxm/nv50.c | 6,244 | utf_8 | 49ed396323dfcde70946ae6ad059a961 | /*
*
* Authors: Ben Skeggs
*/
#include "mxms.h"
#include <subdev/bios.h>
#include <subdev/bios/conn.h>
#include <subdev/bios/dcb.h>
#include <subdev/bios/mxm.h>
struct context {
u32 *outp;
struct mxms_odev desc;
};
static bool
mxm_match_tmds_partner(struct nvkm_mxm *mxm, u8 *data, void *info)
{
struct context *ct... |
google | android | base | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/mxm/base.c | 7,402 | utf_8 | 3dc9e4a17734904f291a21d5d0512ab8 | /*
*
* Authors: Ben Skeggs
*/
#include "mxms.h"
#include <core/option.h>
#include <subdev/bios.h>
#include <subdev/bios/mxm.h>
#include <subdev/i2c.h>
static bool
mxm_shadow_rom_fetch(struct nvkm_i2c_bus *bus, u8 addr,
u8 offset, u8 size, u8 *data)
{
struct i2c_msg msgs[] = {
{ .addr = addr, .flags = 0, .l... |
google | android | gt215 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gt215.c | 1,413 | utf_8 | 177bf615a805cba05669e8d4bc0bddae | /*
*
* Authors: Ben Skeggs
*/
#include "nv50.h"
#include "ram.h"
static const struct nv50_fb_func
gt215_fb = {
.ram_new = gt215_ram_new,
.trap = 0x000d0fff,
};
int
gt215_fb_new(struct nvkm_device *device, int index, struct nvkm_fb **pfb)
{
return nv50_fb_new_(>215_fb, device, index, pfb);
} |
google | android | gm107 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gm107.c | 1,508 | utf_8 | 28c4ff55426f662e77f15f93838d91be | /*
*
* Authors: Ben Skeggs
*/
#include "gf100.h"
#include "ram.h"
static const struct nvkm_fb_func
gm107_fb = {
.dtor = gf100_fb_dtor,
.init = gf100_fb_init,
.intr = gf100_fb_intr,
.ram_new = gm107_ram_new,
.memtype_valid = gf100_fb_memtype_valid,
};
int
gm107_fb_new(struct nvkm_device *device, int index, struc... |
google | android | nv41 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv41.c | 2,150 | utf_8 | 19c6876f28cd444e88acce19a14208d0 | /*
*
*/
#include "priv.h"
#include "ram.h"
void
nv41_fb_tile_prog(struct nvkm_fb *fb, int i, struct nvkm_fb_tile *tile)
{
struct nvkm_device *device = fb->subdev.device;
nvkm_wr32(device, 0x100604 + (i * 0x10), tile->limit);
nvkm_wr32(device, 0x100608 + (i * 0x10), tile->pitch);
nvkm_wr32(device, 0x100600 + (i * ... |
google | android | nv46 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv46.c | 2,028 | utf_8 | 7d5cd7d8f86d87ce37c9b2e4c8162852 | /*
*
*/
#include "priv.h"
#include "ram.h"
void
nv46_fb_tile_init(struct nvkm_fb *fb, int i, u32 addr, u32 size, u32 pitch,
u32 flags, struct nvkm_fb_tile *tile)
{
/* for performance, select alternate bank offset for zeta */
if (!(flags & 4)) tile->addr = (0 << 3);
else tile->addr = (1 << 3);
til... |
google | android | gddr5 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gddr5.c | 3,697 | utf_8 | f49ab4ad5f4ce4acffe57cd321feda33 | /*
*/
#include "ram.h"
/* binary driver only executes this path if the condition (a) is true
* for any configuration (combination of rammap+ramcfg+timing) that
* can be reached on a given card. for now, we will execute the branch
* unconditionally in the hope that a "false everywhere" in the bios
* tables doesn't... |
google | android | nv49 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv49.c | 1,657 | utf_8 | c4a31970c56b7e05b700e2dc18cee0b7 | /*
*
*/
#include "priv.h"
#include "ram.h"
static const struct nvkm_fb_func
nv49_fb = {
.init = nv41_fb_init,
.tile.regions = 15,
.tile.init = nv30_fb_tile_init,
.tile.comp = nv40_fb_tile_comp,
.tile.fini = nv20_fb_tile_fini,
.tile.prog = nv41_fb_tile_prog,
.ram_new = nv49_ram_new,
.memtype_valid = nv04_fb_me... |
google | android | ramnv49 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv49.c | 1,851 | utf_8 | 8de2ef82e74aebe77c13033bcefa92a8 | /*
*
* Authors: Ben Skeggs
*/
#include "ramnv40.h"
int
nv49_ram_new(struct nvkm_fb *fb, struct nvkm_ram **pram)
{
struct nvkm_device *device = fb->subdev.device;
u32 size = nvkm_rd32(device, 0x10020c) & 0xff000000;
u32 tags = nvkm_rd32(device, 0x100320);
u32 fb914 = nvkm_rd32(device, 0x100914);
enum nvkm_ram_... |
google | android | nv10 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv10.c | 2,320 | utf_8 | 34dd7e2859f5068f4fc2029b6efeacf4 | /*
*
*/
#include "priv.h"
#include "ram.h"
void
nv10_fb_tile_init(struct nvkm_fb *fb, int i, u32 addr, u32 size, u32 pitch,
u32 flags, struct nvkm_fb_tile *tile)
{
tile->addr = 0x80000000 | addr;
tile->limit = max(1u, addr + size) - 1;
tile->pitch = pitch;
}
void
nv10_fb_tile_fini(struct nvkm_fb *fb, int i, s... |
google | android | ramnv20 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv20.c | 1,907 | utf_8 | 002b4eadfb1a1a44ac0aee4a5204959a | /*
*
* Authors: Ben Skeggs
*/
#include "ram.h"
int
nv20_ram_new(struct nvkm_fb *fb, struct nvkm_ram **pram)
{
struct nvkm_device *device = fb->subdev.device;
u32 pbus1218 = nvkm_rd32(device, 0x001218);
u32 size = (nvkm_rd32(device, 0x10020c) & 0xff000000);
u32 tags = nvkm_rd32(device, 0x100320);
enum ... |
google | android | nv40 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv40.c | 2,292 | utf_8 | 0860f75e191b0cb6ffafd62da96b6278 | /*
*
*/
#include "priv.h"
#include "ram.h"
void
nv40_fb_tile_comp(struct nvkm_fb *fb, int i, u32 size, u32 flags,
struct nvkm_fb_tile *tile)
{
u32 tiles = DIV_ROUND_UP(size, 0x80);
u32 tags = round_up(tiles / fb->ram->parts, 0x100);
if ( (flags & 2) &&
!nvkm_mm_head(&fb->ram->tags, 0, 1, tags, tags, 1, &... |
google | android | nv30 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv30.c | 3,846 | utf_8 | 71a1238c235d0717c86725638b740da2 | /*
*
*/
#include "priv.h"
#include "ram.h"
void
nv30_fb_tile_init(struct nvkm_fb *fb, int i, u32 addr, u32 size, u32 pitch,
u32 flags, struct nvkm_fb_tile *tile)
{
/* for performance, select alternate bank offset for zeta */
if (!(flags & 4)) {
tile->addr = (0 << 4);
} else {
if (fb->func->tile.comp) /* z ... |
google | android | sddr3 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/sddr3.c | 3,380 | utf_8 | 46148738429f847baa273a7e59275d08 | /*
*/
#include "priv.h"
struct ramxlat {
int id;
u8 enc;
};
static inline int
ramxlat(const struct ramxlat *xlat, int id)
{
while (xlat->id >= 0) {
if (xlat->id == id)
return xlat->enc;
xlat++;
}
return -EINVAL;
}
static const struct ramxlat
ramddr3_cl[] = {
{ 5, 2 }, { 6, 4 }, { 7, 6 }, { 8, 8 }, { 9, 10... |
google | android | ramgm107 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgm107.c | 1,490 | utf_8 | fd16f73adedec02c7403f1f9ee045ad0 | /*
*
* Authors: Ben Skeggs
*/
#include "ram.h"
static const struct nvkm_ram_func
gm107_ram_func = {
.init = gk104_ram_init,
.get = gf100_ram_get,
.put = gf100_ram_put,
};
int
gm107_ram_new(struct nvkm_fb *fb, struct nvkm_ram **pram)
{
if (!(*pram = kzalloc(sizeof(**pram), GFP_KERNEL)))
return -ENOMEM;
return ... |
google | android | ram | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ram.c | 2,996 | utf_8 | 8ee93c27c306823db287c409487fa607 | /*
*/
#include "ram.h"
int
nvkm_ram_init(struct nvkm_ram *ram)
{
if (ram->func->init)
return ram->func->init(ram);
return 0;
}
void
nvkm_ram_del(struct nvkm_ram **pram)
{
struct nvkm_ram *ram = *pram;
if (ram && !WARN_ON(!ram->func)) {
if (ram->func->dtor)
*pram = ram->func->dtor(ram);
nvkm_mm_fini(&ram->... |
google | android | nv20 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv20.c | 3,069 | utf_8 | eb91a61f2a687b6a21ee545fcd4b5003 | /*
*
*/
#include "priv.h"
#include "ram.h"
void
nv20_fb_tile_init(struct nvkm_fb *fb, int i, u32 addr, u32 size, u32 pitch,
u32 flags, struct nvkm_fb_tile *tile)
{
tile->addr = 0x00000001 | addr;
tile->limit = max(1u, addr + size) - 1;
tile->pitch = pitch;
if (flags & 4) {
fb->func->tile.comp(fb, i, size, ... |
google | android | ramnv50 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c | 20,708 | utf_8 | 8bcd9a0d2408fc37c0568eb00063e371 | /*
*
* Authors: Ben Skeggs
*/
#define nv50_ram(p) container_of((p), struct nv50_ram, base)
#include "ram.h"
#include "ramseq.h"
#include "nv50.h"
#include <core/option.h>
#include <subdev/bios.h>
#include <subdev/bios/perf.h>
#include <subdev/bios/pll.h>
#include <subdev/bios/rammap.h>
#include <subdev/bios/timing.h... |
google | android | ramnv04 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv04.c | 2,065 | utf_8 | 05e53ca4d5f3fb60fca3a6f0d9de1c06 | /*
*
* Authors: Ben Skeggs
*/
#include "ram.h"
#include "regsnv04.h"
const struct nvkm_ram_func
nv04_ram_func = {
};
int
nv04_ram_new(struct nvkm_fb *fb, struct nvkm_ram **pram)
{
struct nvkm_device *device = fb->subdev.device;
u32 boot0 = nvkm_rd32(device, NV04_PFB_BOOT_0);
u64 size;
enum nvkm_ram_type type;
i... |
google | android | ramnv44 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv44.c | 1,640 | utf_8 | 0e6e8638f4b73fca7ec704ba1d521241 | /*
*
* Authors: Ben Skeggs
*/
#include "ramnv40.h"
int
nv44_ram_new(struct nvkm_fb *fb, struct nvkm_ram **pram)
{
struct nvkm_device *device = fb->subdev.device;
u32 size = nvkm_rd32(device, 0x10020c) & 0xff000000;
u32 fb474 = nvkm_rd32(device, 0x100474);
enum nvkm_ram_type type = NVKM_RAM_TYPE_UNKNOWN;
if (fb... |
google | android | ramgk104 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c | 49,694 | utf_8 | 3425fdfa64d6617b400735858e3ff8ab | /*
*
* Authors: Ben Skeggs
*/
#define gk104_ram(p) container_of((p), struct gk104_ram, base)
#include "ram.h"
#include "ramfuc.h"
#include <core/option.h>
#include <subdev/bios.h>
#include <subdev/bios/init.h>
#include <subdev/bios/M0205.h>
#include <subdev/bios/M0209.h>
#include <subdev/bios/pll.h>
#include <subdev... |
google | android | gk104 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk104.c | 1,508 | utf_8 | fb67020181f230f1529e135e842039f1 | /*
*
* Authors: Ben Skeggs
*/
#include "gf100.h"
#include "ram.h"
static const struct nvkm_fb_func
gk104_fb = {
.dtor = gf100_fb_dtor,
.init = gf100_fb_init,
.intr = gf100_fb_intr,
.ram_new = gk104_ram_new,
.memtype_valid = gf100_fb_memtype_valid,
};
int
gk104_fb_new(struct nvkm_device *device, int index, struc... |
google | android | g84 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/g84.c | 1,406 | utf_8 | 665fa353f6553f68b350f08b74b35dcc | /*
*
* Authors: Ben Skeggs
*/
#include "nv50.h"
#include "ram.h"
static const struct nv50_fb_func
g84_fb = {
.ram_new = nv50_ram_new,
.trap = 0x001d07ff,
};
int
g84_fb_new(struct nvkm_device *device, int index, struct nvkm_fb **pfb)
{
return nv50_fb_new_(&g84_fb, device, index, pfb);
} |
google | android | nv35 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv35.c | 2,220 | utf_8 | be2f71e5cfdacf3749fcb361f534a76c | /*
*
*/
#include "priv.h"
#include "ram.h"
static void
nv35_fb_tile_comp(struct nvkm_fb *fb, int i, u32 size, u32 flags,
struct nvkm_fb_tile *tile)
{
u32 tiles = DIV_ROUND_UP(size, 0x40);
u32 tags = round_up(tiles / fb->ram->parts, 0x40);
if (!nvkm_mm_head(&fb->ram->tags, 0, 1, tags, tags, 1, &tile->tag)) {
... |
google | android | nv50 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv50.c | 8,189 | utf_8 | 9a4e87d00608071c9c2564cbe225ad29 | /*
*
* Authors: Ben Skeggs
*/
#include "nv50.h"
#include "ram.h"
#include <core/client.h>
#include <core/enum.h>
#include <engine/fifo.h>
int
nv50_fb_memtype[0x80] = {
1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1, 1, 1, 1, 0, 0, 0, 0, 2, 2, 2, 2, 0, 0, 0, 0,
1, 1, 1, 1, 1, 1, 1, 0, 2, 2, 2, 2, 2, 2, 2, 0,
0... |
google | android | ramnv41 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv41.c | 1,796 | utf_8 | 15973b2b05af2c31e766dee1e7e8c639 | /*
*
* Authors: Ben Skeggs
*/
#include "ramnv40.h"
int
nv41_ram_new(struct nvkm_fb *fb, struct nvkm_ram **pram)
{
struct nvkm_device *device = fb->subdev.device;
u32 size = nvkm_rd32(device, 0x10020c) & 0xff000000;
u32 tags = nvkm_rd32(device, 0x100320);
u32 fb474 = nvkm_rd32(device, 0x100474);
enum nvkm_ram_... |
google | android | mcp89 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/mcp89.c | 1,413 | utf_8 | 601883c9414dadc2cdc2128d6480eff9 | /*
*
* Authors: Ben Skeggs
*/
#include "nv50.h"
#include "ram.h"
static const struct nv50_fb_func
mcp89_fb = {
.ram_new = mcp77_ram_new,
.trap = 0x089d1fff,
};
int
mcp89_fb_new(struct nvkm_device *device, int index, struct nvkm_fb **pfb)
{
return nv50_fb_new_(&mcp89_fb, device, index, pfb);
} |
google | android | ramnv40 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv40.c | 6,476 | utf_8 | 68adc695766413b42052a4417ca23788 | /*
*
* Authors: Ben Skeggs
*/
#include "ramnv40.h"
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/init.h>
#include <subdev/bios/pll.h>
#include <subdev/clk/pll.h>
#include <subdev/timer.h>
static int
nv40_ram_calc(struct nvkm_ram *base, u32 freq)
{
struct nv40_ram *ram = nv40_ram(base);... |
google | android | sddr2 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/sddr2.c | 2,718 | utf_8 | e7b08904c43596c6e314eaa3234cb0df | /*
* Ben Skeggs
*/
#include "priv.h"
struct ramxlat {
int id;
u8 enc;
};
static inline int
ramxlat(const struct ramxlat *xlat, int id)
{
while (xlat->id >= 0) {
if (xlat->id == id)
return xlat->enc;
xlat++;
}
return -EINVAL;
}
static const struct ramxlat
ramddr2_cl[] = {
{ 2, 2 }, { 3, 3 }, { 4,... |
google | android | nv04 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv04.c | 1,923 | utf_8 | 1f4ddc19682275ad36bdbcdf8dc97e2a | /*
*
* Authors: Ben Skeggs
*/
#include "priv.h"
#include "ram.h"
#include "regsnv04.h"
bool
nv04_fb_memtype_valid(struct nvkm_fb *fb, u32 tile_flags)
{
if (!(tile_flags & 0xff00))
return true;
return false;
}
static void
nv04_fb_init(struct nvkm_fb *fb)
{
struct nvkm_device *device = fb->subdev.device;
/* This... |
google | android | nv4e | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv4e.c | 1,624 | utf_8 | 96b24d1246664c78365c9f01ff6d564d | /*
*
*/
#include "priv.h"
#include "ram.h"
static const struct nvkm_fb_func
nv4e_fb = {
.init = nv44_fb_init,
.tile.regions = 12,
.tile.init = nv46_fb_tile_init,
.tile.fini = nv20_fb_tile_fini,
.tile.prog = nv44_fb_tile_prog,
.ram_new = nv44_ram_new,
.memtype_valid = nv04_fb_memtype_valid,
};
int
nv4e_fb_new(s... |
google | android | ramnv10 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv10.c | 1,552 | utf_8 | eab2fb5e624d84125b5b440b3a27d78d | /*
*
* Authors: Ben Skeggs
*/
#include "ram.h"
int
nv10_ram_new(struct nvkm_fb *fb, struct nvkm_ram **pram)
{
struct nvkm_device *device = fb->subdev.device;
u32 size = nvkm_rd32(device, 0x10020c) & 0xff000000;
u32 cfg0 = nvkm_rd32(device, 0x100200);
enum nvkm_ram_type type;
if (cfg0 & 0x00000001)
type = NVKM... |
google | android | ramnv1a | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv1a.c | 1,718 | utf_8 | 9fe6421f6ab2eadf22965eaf0eb4b112 | /*
*
* Authors: Ben Skeggs
*/
#include "ram.h"
int
nv1a_ram_new(struct nvkm_fb *fb, struct nvkm_ram **pram)
{
struct pci_dev *bridge;
u32 mem, mib;
bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 1));
if (!bridge) {
nvkm_error(&fb->subdev, "no bridge device\n");
return -ENODEV;
}
if (fb->subdev.device->chips... |
google | android | nv1a | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv1a.c | 1,600 | utf_8 | 7925d2806aa0bf5cd8aa39668fb8f767 | /*
*
*/
#include "priv.h"
#include "ram.h"
static const struct nvkm_fb_func
nv1a_fb = {
.tile.regions = 8,
.tile.init = nv10_fb_tile_init,
.tile.fini = nv10_fb_tile_fini,
.tile.prog = nv10_fb_tile_prog,
.ram_new = nv1a_ram_new,
.memtype_valid = nv04_fb_memtype_valid,
};
int
nv1a_fb_new(struct nvkm_device *devic... |
google | android | ramnv4e | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv4e.c | 1,419 | utf_8 | e2ab4c33ccd0f715902beebf67b45ae4 | /*
*
* Authors: Ben Skeggs
*/
#include "ram.h"
int
nv4e_ram_new(struct nvkm_fb *fb, struct nvkm_ram **pram)
{
struct nvkm_device *device = fb->subdev.device;
u32 size = nvkm_rd32(device, 0x10020c) & 0xff000000;
return nvkm_ram_new_(&nv04_ram_func, fb, NVKM_RAM_TYPE_UNKNOWN,
size, 0, pram);
} |
google | android | gddr3 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gddr3.c | 3,540 | utf_8 | d1a8a3c2fc350f56dccaff4fa389887c | /*
*/
#include "ram.h"
struct ramxlat {
int id;
u8 enc;
};
static inline int
ramxlat(const struct ramxlat *xlat, int id)
{
while (xlat->id >= 0) {
if (xlat->id == id)
return xlat->enc;
xlat++;
}
return -EINVAL;
}
static const struct ramxlat
ramgddr3_cl_lo[] = {
{ 5, 5 }, { 7, 7 }, { 8, 0 }, { 9, 1 }, { 10... |
google | android | nv44 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv44.c | 2,405 | utf_8 | f6170abae5f7bf7b4c61e0caf97b62b7 | /*
*
*/
#include "priv.h"
#include "ram.h"
static void
nv44_fb_tile_init(struct nvkm_fb *fb, int i, u32 addr, u32 size, u32 pitch,
u32 flags, struct nvkm_fb_tile *tile)
{
tile->addr = 0x00000001; /* mode = vram */
tile->addr |= addr;
tile->limit = max(1u, addr + size) - 1;
tile->pitch = pitch;
}
void
nv44_fb... |
google | android | base | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/base.c | 4,471 | utf_8 | 8614a91e04d2eba75bfc7c93ae6a9148 | /*
*
* Authors: Ben Skeggs
*/
#include "priv.h"
#include "ram.h"
#include <subdev/bios.h>
#include <subdev/bios/M0203.h>
#include <engine/gr.h>
#include <engine/mpeg.h>
bool
nvkm_fb_memtype_valid(struct nvkm_fb *fb, u32 memtype)
{
return fb->func->memtype_valid(fb, memtype);
}
void
nvkm_fb_tile_fini(struct nvkm_fb ... |
google | android | rammcp77 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/rammcp77.c | 3,021 | utf_8 | e79356ea97eb67bdbf0ec6f5c66e4154 | /*
*
* Authors: Ben Skeggs
*/
#define mcp77_ram(p) container_of((p), struct mcp77_ram, base)
#include "ram.h"
struct mcp77_ram {
struct nvkm_ram base;
u64 poller_base;
};
static int
mcp77_ram_init(struct nvkm_ram *base)
{
struct mcp77_ram *ram = mcp77_ram(base);
struct nvkm_device *device = ram->base.fb->subdev.... |
google | android | ramgf100 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c | 21,021 | utf_8 | 95a08776259bc34e33e73a294a0dcb0a | /*
*
* Authors: Ben Skeggs
*/
#define gf100_ram(p) container_of((p), struct gf100_ram, base)
#include "ram.h"
#include "ramfuc.h"
#include <core/option.h>
#include <subdev/bios.h>
#include <subdev/bios/pll.h>
#include <subdev/bios/rammap.h>
#include <subdev/bios/timing.h>
#include <subdev/clk.h>
#include <subdev/clk... |
google | android | nv36 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv36.c | 2,220 | utf_8 | 88ff5499db3806bbf2eb59850ea61c96 | /*
*
*/
#include "priv.h"
#include "ram.h"
static void
nv36_fb_tile_comp(struct nvkm_fb *fb, int i, u32 size, u32 flags,
struct nvkm_fb_tile *tile)
{
u32 tiles = DIV_ROUND_UP(size, 0x40);
u32 tags = round_up(tiles / fb->ram->parts, 0x40);
if (!nvkm_mm_head(&fb->ram->tags, 0, 1, tags, tags, 1, &tile->tag)) {
... |
google | android | gf100 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gf100.c | 3,210 | utf_8 | 2e0b339166e152ec8af761dfb5d16323 | /*
*
* Authors: Ben Skeggs
*/
#include "gf100.h"
#include "ram.h"
extern const u8 gf100_pte_storage_type_map[256];
bool
gf100_fb_memtype_valid(struct nvkm_fb *fb, u32 tile_flags)
{
u8 memtype = (tile_flags & 0x0000ff00) >> 8;
return likely((gf100_pte_storage_type_map[memtype] != 0xff));
}
void
gf100_fb_intr(struct... |
google | android | mcp77 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/mcp77.c | 1,413 | utf_8 | e3f7708ebcbc84e7c25112a7cfcae7fe | /*
*
* Authors: Ben Skeggs
*/
#include "nv50.h"
#include "ram.h"
static const struct nv50_fb_func
mcp77_fb = {
.ram_new = mcp77_ram_new,
.trap = 0x001d07ff,
};
int
mcp77_fb_new(struct nvkm_device *device, int index, struct nvkm_fb **pfb)
{
return nv50_fb_new_(&mcp77_fb, device, index, pfb);
} |
google | android | nv25 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv25.c | 2,119 | utf_8 | a1693049fcab3eff68217e6ac7fbc549 | /*
*
*/
#include "priv.h"
#include "ram.h"
static void
nv25_fb_tile_comp(struct nvkm_fb *fb, int i, u32 size, u32 flags,
struct nvkm_fb_tile *tile)
{
u32 tiles = DIV_ROUND_UP(size, 0x40);
u32 tags = round_up(tiles / fb->ram->parts, 0x40);
if (!nvkm_mm_head(&fb->ram->tags, 0, 1, tags, tags, 1, &tile->tag)) {
... |
google | android | ramgt215 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.c | 27,550 | utf_8 | bebce0d223fd1a349af3f1f48a3f21b4 | /*
*/
#define gt215_ram(p) container_of((p), struct gt215_ram, base)
#include "ram.h"
#include "ramfuc.h"
#include <core/option.h>
#include <subdev/bios.h>
#include <subdev/bios/M0205.h>
#include <subdev/bios/rammap.h>
#include <subdev/bios/timing.h>
#include <subdev/clk/gt215.h>
#include <subdev/gpio.h>
struct gt215_... |
google | android | gk20a | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk20a.c | 1,588 | utf_8 | c643f31df1a352402023282a9dbb5339 | /*
*/
#include "priv.h"
static void
gk20a_fb_init(struct nvkm_fb *fb)
{
struct nvkm_device *device = fb->subdev.device;
nvkm_mask(device, 0x100c80, 0x00000001, 0x00000000); /* 128KiB lpg */
}
static const struct nvkm_fb_func
gk20a_fb = {
.init = gk20a_fb_init,
.memtype_valid = gf100_fb_memtype_valid,
};
int
gk20a_... |
google | android | nv47 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv47.c | 1,657 | utf_8 | c743d5edd02c0212205df66b21306a2b | /*
*
*/
#include "priv.h"
#include "ram.h"
static const struct nvkm_fb_func
nv47_fb = {
.init = nv41_fb_init,
.tile.regions = 15,
.tile.init = nv30_fb_tile_init,
.tile.comp = nv40_fb_tile_comp,
.tile.fini = nv20_fb_tile_fini,
.tile.prog = nv41_fb_tile_prog,
.ram_new = nv41_ram_new,
.memtype_valid = nv04_fb_me... |
google | android | fan | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/therm/fan.c | 7,740 | utf_8 | b4aadf01f91fe33be9fe9486e295416a | /*
*
* Authors: Ben Skeggs
* Martin Peres
*/
#include "priv.h"
#include <subdev/bios/fan.h>
#include <subdev/gpio.h>
#include <subdev/timer.h>
static int
nvkm_fan_update(struct nvkm_fan *fan, bool immediate, int target)
{
struct nvkm_therm *therm = fan->parent;
struct nvkm_subdev *subdev = &therm->subdev;
s... |
google | android | gt215 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/therm/gt215.c | 2,533 | utf_8 | 29b8d9769da74412849e9b6bf7ecb30c | /*
*
* Authors: Ben Skeggs
*/
#include "priv.h"
#include <subdev/gpio.h>
int
gt215_therm_fan_sense(struct nvkm_therm *therm)
{
struct nvkm_device *device = therm->subdev.device;
u32 tach = nvkm_rd32(device, 0x00e728) & 0x0000ffff;
u32 ctrl = nvkm_rd32(device, 0x00e720);
if (ctrl & 0x00000001)
return tach * 60 ... |
google | android | gm107 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/therm/gm107.c | 2,450 | utf_8 | cd7514ded233817c5189af54d725ab60 | /*
*
* Authors: Martin Peres
*/
#include "priv.h"
static int
gm107_fan_pwm_ctrl(struct nvkm_therm *therm, int line, bool enable)
{
/* nothing to do, it seems hardwired */
return 0;
}
static int
gm107_fan_pwm_get(struct nvkm_therm *therm, int line, u32 *divs, u32 *duty)
{
struct nvkm_device *device = therm->subdev... |
google | android | ic | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/therm/ic.c | 4,084 | utf_8 | 6a3712a2869fbd725dac7239e6ac60e0 | /*
*
* Authors: Martin Peres
*/
#include "priv.h"
#include <subdev/bios/extdev.h>
#include <subdev/i2c.h>
static bool
probe_monitoring_device(struct nvkm_i2c_bus *bus,
struct i2c_board_info *info, void *data)
{
struct nvkm_therm *therm = data;
struct nvbios_therm_sensor *sensor = &therm->bios_sensor;
struct i2... |
google | android | fanpwm | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/therm/fanpwm.c | 3,322 | utf_8 | 5f05717634d45fd5ab58f3f9514d902b | /*
*
* Authors: Ben Skeggs
* Martin Peres
*/
#include "priv.h"
#include <core/option.h>
#include <subdev/bios.h>
#include <subdev/bios/fan.h>
#include <subdev/gpio.h>
struct nvkm_fanpwm {
struct nvkm_fan base;
struct dcb_gpio_func func;
};
static int
nvkm_fanpwm_get(struct nvkm_therm *therm)
{
struct nvkm_f... |
google | android | temp | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/therm/temp.c | 7,586 | utf_8 | 8d8d08c8cedbe2c889a1eb1048f93142 | /*
*
* Authors: Martin Peres
*/
#include "priv.h"
static void
nvkm_therm_temp_set_defaults(struct nvkm_therm *therm)
{
therm->bios_sensor.offset_constant = 0;
therm->bios_sensor.thrs_fan_boost.temp = 90;
therm->bios_sensor.thrs_fan_boost.hysteresis = 3;
therm->bios_sensor.thrs_down_clock.temp = 95;
therm->bios_... |
google | android | nv40 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/therm/nv40.c | 5,665 | utf_8 | cdc8d163471f7fe061846814a4ec4820 | /*
*
* Authors: Ben Skeggs
* Martin Peres
*/
#include "priv.h"
enum nv40_sensor_style { INVALID_STYLE = -1, OLD_STYLE = 0, NEW_STYLE = 1 };
static enum nv40_sensor_style
nv40_sensor_style(struct nvkm_therm *therm)
{
switch (therm->subdev.device->chipset) {
case 0x43:
case 0x44:
case 0x4a:
case 0x47:
ret... |
google | android | gf119 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/therm/gf119.c | 4,572 | utf_8 | 03a87f44a28a1d755b4f21006294f824 | /*
*
* Authors: Ben Skeggs
*/
#include "priv.h"
static int
pwm_info(struct nvkm_therm *therm, int line)
{
struct nvkm_subdev *subdev = &therm->subdev;
struct nvkm_device *device = subdev->device;
u32 gpio = nvkm_rd32(device, 0x00d610 + (line * 0x04));
switch (gpio & 0x000000c0) {
case 0x00000000: /* normal mode... |
google | android | g84 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.c | 7,330 | utf_8 | 9425d9fa85a066534be3c10f518c94fc | /*
*
* Authors: Ben Skeggs
* Martin Peres
*/
#include "priv.h"
#include <subdev/fuse.h>
int
g84_temp_get(struct nvkm_therm *therm)
{
struct nvkm_device *device = therm->subdev.device;
if (nvkm_fuse_read(device->fuse, 0x1a8) == 1)
return nvkm_rd32(device, 0x20400);
else
return -ENODEV;
}
void
g84_sensor_... |
google | android | nv50 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/therm/nv50.c | 4,845 | utf_8 | 17b854659e5904b8e6161cc459891ae5 | /*
*
* Authors: Ben Skeggs
* Martin Peres
*/
#include "priv.h"
static int
pwm_info(struct nvkm_therm *therm, int *line, int *ctrl, int *indx)
{
struct nvkm_subdev *subdev = &therm->subdev;
if (*line == 0x04) {
*ctrl = 0x00e100;
*line = 4;
*indx = 0;
} else
if (*line == 0x09) {
*ctrl = 0x00e100;
*... |
google | android | fantog | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/therm/fantog.c | 3,305 | utf_8 | b93b1228ec5c988cf2949ec7e5bf3f95 | /*
*
* Authors: Martin Peres
*/
#include "priv.h"
#include <subdev/gpio.h>
#include <subdev/timer.h>
struct nvkm_fantog {
struct nvkm_fan base;
struct nvkm_alarm alarm;
spinlock_t lock;
u32 period_us;
u32 percent;
struct dcb_gpio_func func;
};
static void
nvkm_fantog_update(struct nvkm_fantog *fan, int percent... |
google | android | fannil | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/therm/fannil.c | 1,603 | utf_8 | 3c85133b2ab3df64a224f7dfda5ecab5 | /*
*
* Authors: Ben Skeggs
*/
#include "priv.h"
static int
nvkm_fannil_get(struct nvkm_therm *therm)
{
return -ENODEV;
}
static int
nvkm_fannil_set(struct nvkm_therm *therm, int percent)
{
return -ENODEV;
}
int
nvkm_fannil_create(struct nvkm_therm *therm)
{
struct nvkm_fan *priv;
priv = kzalloc(sizeof(*priv), GF... |
google | android | base | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/therm/base.c | 10,348 | utf_8 | 5fd2f238172a67faccb46549123bfefa | /*
*
* Authors: Martin Peres
*/
#include "priv.h"
int
nvkm_therm_temp_get(struct nvkm_therm *therm)
{
if (therm->func->temp_get)
return therm->func->temp_get(therm);
return -ENODEV;
}
static int
nvkm_therm_update_trip(struct nvkm_therm *therm)
{
struct nvbios_therm_trip_point *trip = therm->fan->bios.trip,
... |
google | android | gf117 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gf117.c | 1,824 | utf_8 | a5ff325cccd585283d2a54b45aed7373 | /*
*
* Authors: Samuel Pitoiset
*/
#include "priv.h"
static int
gf117_ibus_init(struct nvkm_subdev *ibus)
{
struct nvkm_device *device = ibus->device;
nvkm_mask(device, 0x122310, 0x0003ffff, 0x00000800);
nvkm_mask(device, 0x122348, 0x0003ffff, 0x00000100);
nvkm_mask(device, 0x1223b0, 0x0003ffff, 0x00000fff);
re... |
google | android | gk104 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk104.c | 4,135 | utf_8 | 20457b8a957b21e8245df8cdbcbc216e | /*
*
* Authors: Ben Skeggs
*/
#include <subdev/ibus.h>
static void
gk104_ibus_intr_hub(struct nvkm_subdev *ibus, int i)
{
struct nvkm_device *device = ibus->device;
u32 addr = nvkm_rd32(device, 0x122120 + (i * 0x0800));
u32 data = nvkm_rd32(device, 0x122124 + (i * 0x0800));
u32 stat = nvkm_rd32(device, 0x122128 ... |
google | android | gf100 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gf100.c | 3,948 | utf_8 | 61743834158b74ffe069bf6229447873 | /*
*
* Authors: Ben Skeggs
*/
#include "priv.h"
static void
gf100_ibus_intr_hub(struct nvkm_subdev *ibus, int i)
{
struct nvkm_device *device = ibus->device;
u32 addr = nvkm_rd32(device, 0x122120 + (i * 0x0400));
u32 data = nvkm_rd32(device, 0x122124 + (i * 0x0400));
u32 stat = nvkm_rd32(device, 0x122128 + (i * ... |
google | android | gk20a | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk20a.c | 2,656 | utf_8 | a16676cd43fecc01367fc5018e598753 | /*
*/
#include <subdev/ibus.h>
#include <subdev/timer.h>
static void
gk20a_ibus_init_ibus_ring(struct nvkm_subdev *ibus)
{
struct nvkm_device *device = ibus->device;
nvkm_mask(device, 0x137250, 0x3f, 0);
nvkm_mask(device, 0x000200, 0x20, 0);
usleep_range(20, 30);
nvkm_mask(device, 0x000200, 0x20, 0x20);
nvkm_wr3... |
google | android | fan | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/bios/fan.c | 2,705 | utf_8 | ac4295cae5a714663fc494ce8a9672dd | /*
*
* Authors: Martin Peres
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/fan.h>
u16
nvbios_fan_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
{
struct bit_entry bit_P;
u16 fan = 0x0000;
if (!bit_entry(bios, 'P', &bit_P)) {
if (bit_P.version == 2 && bit_P.len... |
google | android | shadowramin | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowramin.c | 3,369 | utf_8 | ffb4665c3931321ede66b0156bb52715 | /*
*
*/
#include "priv.h"
struct priv {
struct nvkm_bios *bios;
u32 bar0;
};
static u32
pramin_read(void *data, u32 offset, u32 length, struct nvkm_bios *bios)
{
struct nvkm_device *device = bios->subdev.device;
u32 i;
if (offset + length <= 0x00100000) {
for (i = offset; i < offset + length; i += 4)
*(u32 ... |
google | android | xpio | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/bios/xpio.c | 2,521 | utf_8 | ea0215605494eca0a5d748aba0ab0a85 | /*
*
* Authors: Ben Skeggs
*/
#include <subdev/bios.h>
#include <subdev/bios/gpio.h>
#include <subdev/bios/xpio.h>
static u16
dcb_xpiod_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
{
u16 data = dcb_gpio_table(bios, ver, hdr, cnt, len);
if (data && *ver >= 0x40 && *hdr >= 0x06) {
u16 xpio = n... |
google | android | ramcfg | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/bios/ramcfg.c | 2,502 | utf_8 | 1d46d662c33290bc76e273e07c97cc96 | /*
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/ramcfg.h>
#include <subdev/bios/M0203.h>
static u8
nvbios_ramcfg_strap(struct nvkm_subdev *subdev)
{
return (nvkm_rd32(subdev->device, 0x101000) & 0x0000003c) >> 2;
}
u8
nvbios_ramcfg_count(struct nvkm_bios *bios)
{
struct bit_entry bi... |
google | android | volt | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/bios/volt.c | 4,349 | utf_8 | 7dca412a71228e490cb78930cd464bb7 | /*
*
* Authors: Martin Peres
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/volt.h>
u16
nvbios_volt_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
{
struct bit_entry bit_P;
u16 volt = 0x0000;
if (!bit_entry(bios, 'P', &bit_P)) {
if (bit_P.version == 2)
volt ... |
google | android | gpio | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/bios/gpio.c | 4,315 | utf_8 | 3eef0b1a17a0f67fc2372de3243fff71 | /*
*
* Authors: Ben Skeggs
*/
#include <subdev/bios.h>
#include <subdev/bios/dcb.h>
#include <subdev/bios/gpio.h>
#include <subdev/bios/xpio.h>
u16
dcb_gpio_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
{
u16 data = 0x0000;
u16 dcb = dcb_table(bios, ver, hdr, cnt, len);
if (dcb) {
if (*ver >... |
google | android | shadowrom | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowrom.c | 1,992 | utf_8 | 17324437fa821f4b9868ea6968381168 | /*
*
*/
#include "priv.h"
#include <subdev/pci.h>
static u32
prom_read(void *data, u32 offset, u32 length, struct nvkm_bios *bios)
{
struct nvkm_device *device = data;
u32 i;
if (offset + length <= 0x00100000) {
for (i = offset; i < offset + length; i += 4)
*(u32 *)&bios->data[i] = nvkm_rd32(device, 0x300000 ... |
google | android | init | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c | 54,957 | utf_8 | c1742af04f8841ed6dd9adac34dd7b50 | /*
*
* Authors: Ben Skeggs
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/bmp.h>
#include <subdev/bios/conn.h>
#include <subdev/bios/dcb.h>
#include <subdev/bios/dp.h>
#include <subdev/bios/gpio.h>
#include <subdev/bios/init.h>
#include <subdev/bios/ramcfg.h>
#include <subdev/devinit.... |
google | android | therm | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/bios/therm.c | 5,666 | utf_8 | 1d61791d66f5762c0c4b92dcbcdf41ac | /*
*
* Authors: Martin Peres
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/therm.h>
static u16
therm_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *len, u8 *cnt)
{
struct bit_entry bit_P;
u16 therm = 0;
if (!bit_entry(bios, 'P', &bit_P)) {
if (bit_P.version == 1)
therm =... |
google | android | dp | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/bios/dp.c | 5,882 | utf_8 | bc29fe2a1ce01cae8ae58b84a6c68849 | /*
*
* Authors: Ben Skeggs
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/dp.h>
static u16
nvbios_dp_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
{
struct bit_entry d;
if (!bit_entry(bios, 'd', &d)) {
if (d.version == 1 && d.length >= 2) {
u16 data = nvbios... |
google | android | P0260 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/bios/P0260.c | 3,005 | utf_8 | 325807d4e21ee2591849837eb96b7336 | /*
*
* Authors: Ben Skeggs
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/P0260.h>
u32
nvbios_P0260Te(struct nvkm_bios *bios,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *xnr, u8 *xsz)
{
struct bit_entry bit_P;
u32 data = 0x00000000;
if (!bit_entry(bios, 'P', &bit_P)) {
if (bi... |
google | android | boost | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/bios/boost.c | 3,624 | utf_8 | 45178d2c0fbbe9d759377580d963b2f8 | /*
*
* Authors: Ben Skeggs
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/boost.h>
u16
nvbios_boostTe(struct nvkm_bios *bios,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *snr, u8 *ssz)
{
struct bit_entry bit_P;
u16 boost = 0x0000;
if (!bit_entry(bios, 'P', &bit_P)) {
if (bit_P... |
google | android | pll | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/bios/pll.c | 11,232 | utf_8 | 56979b7e29bf8749fff112288d5d6dea | /*
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/bmp.h>
#include <subdev/bios/pll.h>
#include <subdev/vga.h>
struct pll_mapping {
u8 type;
u32 reg;
};
static struct pll_mapping
nv04_pll_mapping[] = {
{ PLL_CORE , 0x680500 },
{ PLL_MEMORY, 0x680504 },
{ PLL_VPLL0 , 0x680508 },
{... |
google | android | shadowpci | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowpci.c | 3,016 | utf_8 | f6612589c50e779e5fb32b6688ff7e8e | /*
*
*/
#include "priv.h"
#include <core/pci.h>
struct priv {
struct pci_dev *pdev;
void __iomem *rom;
size_t size;
};
static u32
pcirom_read(void *data, u32 offset, u32 length, struct nvkm_bios *bios)
{
struct priv *priv = data;
if (offset + length <= priv->size) {
memcpy_fromio(bios->data + offset, priv->rom... |
google | android | shadow | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadow.c | 6,126 | utf_8 | b1cd577b16f4b4fdd75fd3bfb6c1cbfb | /*
*/
#include "priv.h"
#include <core/option.h>
#include <subdev/bios.h>
#include <subdev/bios/image.h>
struct shadow {
u32 skip;
const struct nvbios_source *func;
void *data;
u32 size;
int score;
};
static bool
shadow_fetch(struct nvkm_bios *bios, struct shadow *mthd, u32 upto)
{
const u32 limit = (upto + 3) &... |
google | android | perf | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.c | 5,754 | utf_8 | 6d975a3d3ed96cae54718c6f6625cdb3 | /*
*
* Authors: Martin Peres
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/perf.h>
u16
nvbios_perf_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr,
u8 *cnt, u8 *len, u8 *snr, u8 *ssz)
{
struct bit_entry bit_P;
u16 perf = 0x0000;
if (!bit_entry(bios, 'P', &bit_P)) {
if (bit_P.... |
google | android | M0205 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/bios/M0205.c | 3,626 | utf_8 | c64e7a30945cb91d26fd9e9f8cbf4582 | /*
*
* Authors: Ben Skeggs
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/M0205.h>
u32
nvbios_M0205Te(struct nvkm_bios *bios,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *snr, u8 *ssz)
{
struct bit_entry bit_M;
u32 data = 0x00000000;
if (!bit_entry(bios, 'M', &bit_M)) {
if (bi... |
google | android | M0203 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/bios/M0203.c | 3,563 | utf_8 | 6031053d53857766fd46ed52283c0afc | /*
*
* Authors: Ben Skeggs
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/M0203.h>
u32
nvbios_M0203Te(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
{
struct bit_entry bit_M;
u32 data = 0x00000000;
if (!bit_entry(bios, 'M', &bit_M)) {
if (bit_M.version == 2 && bit_M.... |
google | android | cstep | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/bios/cstep.c | 3,463 | utf_8 | 874dee9c1fb25e108180b2133011b32b | /*
*
* Authors: Ben Skeggs
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/cstep.h>
u16
nvbios_cstepTe(struct nvkm_bios *bios,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *xnr, u8 *xsz)
{
struct bit_entry bit_P;
u16 cstep = 0x0000;
if (!bit_entry(bios, 'P', &bit_P)) {
if (bit_P... |
google | android | shadowacpi | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowacpi.c | 3,156 | utf_8 | 86798b116980e2cbe2972f9015f09bf1 | /*
*
*/
#include "priv.h"
#if defined(CONFIG_ACPI) && defined(CONFIG_X86)
int nouveau_acpi_get_bios_chunk(uint8_t *bios, int offset, int len);
bool nouveau_acpi_rom_supported(struct device *);
#else
static inline bool
nouveau_acpi_rom_supported(struct device *dev)
{
return false;
}
static inline int
nouveau_acpi_get... |
google | android | extdev | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/bios/extdev.c | 2,842 | utf_8 | f596172e7e73a3247ebb001b95cbe309 | /*
*
* Authors: Martin Peres
*/
#include <subdev/bios.h>
#include <subdev/bios/dcb.h>
#include <subdev/bios/extdev.h>
static u16
extdev_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *len, u8 *cnt)
{
u8 dcb_ver, dcb_hdr, dcb_cnt, dcb_len;
u16 dcb, extdev = 0;
dcb = dcb_table(bios, &dcb_ver, &dcb_hdr, &dcb_cn... |
google | android | npde | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/bios/npde.c | 2,024 | utf_8 | 7e5e7f765044233c50f1c5c8a0742906 | /*
*/
#include <subdev/bios.h>
#include <subdev/bios/npde.h>
#include <subdev/bios/pcir.h>
u32
nvbios_npdeTe(struct nvkm_bios *bios, u32 base)
{
struct nvbios_pcirT pcir;
u8 ver; u16 hdr;
u32 data = nvbios_pcirTp(bios, base, &ver, &hdr, &pcir);
if (data = (data + hdr + 0x0f) & ~0x0f, data) {
switch (nvbios_rd32... |
google | android | pmu | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/bios/pmu.c | 3,770 | utf_8 | 575000b7ee3f8cacc46cc2a96c4bd33f | /*
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/image.h>
#include <subdev/bios/pmu.h>
static u32
weirdo_pointer(struct nvkm_bios *bios, u32 data)
{
struct nvbios_image image;
int idx = 0;
if (nvbios_image(bios, idx++, &image)) {
data -= image.size;
while (nvbios_image(bios, idx... |
google | android | disp | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/bios/disp.c | 4,702 | utf_8 | fc54a6b0747695d49a163db5fda24655 | /*
*
* Authors: Ben Skeggs
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/disp.h>
u16
nvbios_disp_table(struct nvkm_bios *bios,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *sub)
{
struct bit_entry U;
if (!bit_entry(bios, 'U', &U)) {
if (U.version == 1) {
u16 data = nvbios_rd16(b... |
google | android | bit | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/bios/bit.c | 1,781 | utf_8 | e251eb4bc918d68cf6d6014861d285ba | /*
*
* Authors: Ben Skeggs
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
int
bit_entry(struct nvkm_bios *bios, u8 id, struct bit_entry *bit)
{
if (likely(bios->bit_offset)) {
u8 entries = nvbios_rd08(bios, bios->bit_offset + 10);
u32 entry = bios->bit_offset + 12;
while (entries--) {
if (nvbi... |
google | android | shadowof | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowof.c | 2,377 | utf_8 | 37dfe6ef10832ddcf9929710936658dc | /*
*
*/
#include "priv.h"
#include <core/pci.h>
#if defined(__powerpc__)
struct priv {
const void __iomem *data;
int size;
};
static u32
of_read(void *data, u32 offset, u32 length, struct nvkm_bios *bios)
{
struct priv *priv = data;
if (offset < priv->size) {
length = min_t(u32, length, priv->size - offset);
... |
google | android | rammap | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/bios/rammap.c | 10,098 | utf_8 | 6c79492582a1401d6c0f5c085c5ff611 | /*
*
* Authors: Ben Skeggs
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/rammap.h>
u32
nvbios_rammapTe(struct nvkm_bios *bios, u8 *ver, u8 *hdr,
u8 *cnt, u8 *len, u8 *snr, u8 *ssz)
{
struct bit_entry bit_P;
u16 rammap = 0x0000;
if (!bit_entry(bios, 'P', &bit_P)) {
if (bit_P.ve... |
google | android | mxm | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/bios/mxm.c | 3,846 | utf_8 | dd2d3f225e1d1eed0e57e824c4de16c0 | /*
*
* Authors: Ben Skeggs
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/mxm.h>
u16
mxm_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr)
{
struct nvkm_subdev *subdev = &bios->subdev;
struct bit_entry x;
if (bit_entry(bios, 'x', &x)) {
nvkm_debug(subdev, "BIT 'x' table not present... |
google | android | timing | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/bios/timing.c | 5,600 | utf_8 | 7faf78943d22d7be476c59ea26b7a6cc | /*
*
* Authors: Ben Skeggs
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/timing.h>
u16
nvbios_timingTe(struct nvkm_bios *bios,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *snr, u8 *ssz)
{
struct bit_entry bit_P;
u16 timing = 0x0000;
if (!bit_entry(bios, 'P', &bit_P)) {
if (bit_P.ve... |
google | android | conn | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/bios/conn.c | 3,151 | utf_8 | 51e868edb0b2a4eafc0221fe0f3689e8 | /*
*
* Authors: Ben Skeggs
*/
#include <subdev/bios.h>
#include <subdev/bios/dcb.h>
#include <subdev/bios/conn.h>
u32
nvbios_connTe(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
{
u32 dcb = dcb_table(bios, ver, hdr, cnt, len);
if (dcb && *ver >= 0x30 && *hdr >= 0x16) {
u32 data = nvbios_rd16(bios, ... |
google | android | vmap | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/bios/vmap.c | 3,374 | utf_8 | d09cfba54b073e78833da2f121b37aad | /*
*
* Authors: Martin Peres
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/vmap.h>
u16
nvbios_vmap_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
{
struct bit_entry bit_P;
u16 vmap = 0x0000;
if (!bit_entry(bios, 'P', &bit_P)) {
if (bit_P.version == 2) {
vma... |
google | android | image | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/bios/image.c | 2,373 | utf_8 | 444e109431b86e783f1411662de80d3a | /*
*/
#include <subdev/bios.h>
#include <subdev/bios/image.h>
#include <subdev/bios/pcir.h>
#include <subdev/bios/npde.h>
static bool
nvbios_imagen(struct nvkm_bios *bios, struct nvbios_image *image)
{
struct nvkm_subdev *subdev = &bios->subdev;
struct nvbios_pcirT pcir;
struct nvbios_npdeT npde;
u8 ver;
u16 hdr... |
google | android | base | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/nouveau/nvkm/subdev/bios/base.c | 4,045 | utf_8 | a4cc6815e4f48bc01b661892088a5da6 | /*
*
* Authors: Ben Skeggs
*/
#include "priv.h"
#include <subdev/bios.h>
#include <subdev/bios/bmp.h>
#include <subdev/bios/bit.h>
u8
nvbios_checksum(const u8 *data, int size)
{
u8 sum = 0;
while (size--)
sum += *data++;
return sum;
}
u16
nvbios_findstr(const u8 *data, int size, const char *str, int len)
{
int... |
Subsets and Splits
No community queries yet
The top public SQL queries from the community will appear here once available.