author int64 658 755k | date stringlengths 19 19 | timezone int64 -46,800 43.2k | hash stringlengths 40 40 | message stringlengths 5 490 | mods list | language stringclasses 20 values | license stringclasses 3 values | repo stringlengths 5 68 | original_message stringlengths 12 491 |
|---|---|---|---|---|---|---|---|---|---|
136,256 | 05.03.2018 10:59:56 | 25,200 | 8ac74b47868f15e2743f52176bcbf314b5bd5917 | cleanup: fixing typo
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "power/intel_x86.c",
"new_path": "power/intel_x86.c",
"diff": "@@ -203,7 +203,7 @@ enum power_state common_intel_x86_power_handle_state(enum power_state state)\ncase POWER_S5:\n#ifdef CONFIG_BOARD_HAS_RTC_RESET\n- /* Wait for S5 exit and attempt RTC reset it su... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cleanup: fixing typo
BRANCH=none
BUG=none
TEST=none
Change-Id: I7139fb8e23bd613f2a3ce86057a9210577e74c6c
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/949723
Reviewed-by: Furquan Shaikh <furquan@chromium.org> |
136,256 | 02.03.2018 08:23:34 | 25,200 | 3b10e08bc341367f19de19946cbd21c36b4d95be | debugging: Correcting console channel to chipset instead of switch
BRANCH=none
TEST=build all | [
{
"change_type": "MODIFY",
"old_path": "power/common.c",
"new_path": "power/common.c",
"diff": "/* Console output macros */\n#define CPUTS(outstr) cputs(CC_CHIPSET, outstr)\n#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args)\n-#define CPRINTF(format, args...) cprintf(CC_SWITCH, fo... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | debugging: Correcting console channel to chipset instead of switch
BRANCH=none
BUG=none
TEST=build all
Change-Id: I900dbe9f9053310c4cef2d125445fc8aa0fe6b67
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/949724
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org> |
136,427 | 07.03.2018 16:02:50 | 25,200 | 0edf807724d647550cdb6818eb0893d8517fbe8e | grunt: Enable discharge on AC
Add support for setting the battery to discharge even if AC is
present. Used for factory testing.
BRANCH=none
TEST=ectool chargecontrol discharge, ectool battery | [
{
"change_type": "MODIFY",
"old_path": "board/grunt/board.h",
"new_path": "board/grunt/board.h",
"diff": "#define CONFIG_CHARGER\n#define CONFIG_CHARGER_V2\n#define CONFIG_CHARGE_MANAGER\n+#define CONFIG_CHARGER_DISCHARGE_ON_AC\n#define CONFIG_CHARGER_INPUT_CURRENT 128\n#define CONFIG_CHARGER_ISL923... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | grunt: Enable discharge on AC
Add support for setting the battery to discharge even if AC is
present. Used for factory testing.
BRANCH=none
BUG=b:74096137
TEST=ectool chargecontrol discharge, ectool battery
Change-Id: I79e6bfabcfc0327e5c12c789decc27591911a6ee
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/954283
Reviewed-by: Cheng-Han Yang <chenghan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,256 | 05.03.2018 12:49:31 | 25,200 | 700523f49753637ebe744303f0e611c999fcfd8d | yorp: Implement initial power sequence for chipset.
Also adding eSPI define.
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "board/yorp/board.c",
"new_path": "board/yorp/board.c",
"diff": "/* Yorp board-specific configuration */\n#include \"common.h\"\n+#include \"extpower.h\"\n#include \"gpio.h\"\n+#include \"hooks.h\"\n#include \"lid_switch.h\"\n+#include \"power.h\"\n#include \"p... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | yorp: Implement initial power sequence for chipset.
Also adding eSPI define.
BRANCH=none
BUG=b:74020444,b:74018816
TEST=none
Change-Id: Id237de92ed1276213b60b61968e2fc59817e0aa7
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/949722
Reviewed-by: Furquan Shaikh <furquan@chromium.org> |
136,377 | 01.03.2018 20:17:40 | 28,800 | 52c3a72b736eab4344d3eb10079af06fa05ac2b4 | rma_reset: add server side response
Add support for generating the authcode from cr50's challenge.
BRANCH=none
TEST=create a cr50 image with test keys. Verify that the output from
rma_reset -c opens cr50. | [
{
"change_type": "MODIFY",
"old_path": "extra/rma_reset/rma_reset.c",
"new_path": "extra/rma_reset/rma_reset.c",
"diff": "@@ -47,9 +47,10 @@ static char challenge[RMA_CHALLENGE_BUF_SIZE];\nstatic char authcode[RMA_AUTHCODE_BUF_SIZE];\nstatic char *progname;\n-static char *short_opts = \"k:b:d:a:w:th... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | rma_reset: add server side response
Add support for generating the authcode from cr50's challenge.
BUG=b:74019846
BRANCH=none
TEST=create a cr50 image with test keys. Verify that the output from
rma_reset -c opens cr50.
Change-Id: I85a209e55dc23daa118e0071e868878b6fbfcb69
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/945419
Reviewed-by: Randall Spangler <rspangler@chromium.org> |
136,256 | 08.03.2018 10:19:33 | 25,200 | e0d3bcee02d5ebcdac97a7e58767ee3b85b1d79f | cleanup: remove incorrect comment
The port_address field is used in the driver. Also making array
declaration consistent with other parts of the file.
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "board/coral/board.c",
"new_path": "board/coral/board.c",
"diff": "@@ -287,12 +287,12 @@ static int ps8751_tune_mux(const struct usb_mux *mux)\n}\nstruct usb_mux usb_muxes[CONFIG_USB_PD_PORT_COUNT] = {\n- {\n- .port_addr = USB_PD_PORT_ANX74XX, /* don't care / u... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cleanup: remove incorrect comment
The port_address field is used in the driver. Also making array
declaration consistent with other parts of the file.
BRANCH=none
BUG=none
TEST=none
Change-Id: I43c72182c6afefbdbb7286918326b7ea6f92c7d7
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/955940
Reviewed-by: Edward Hill <ecgh@chromium.org> |
136,267 | 09.03.2018 14:12:22 | -3,600 | 79aacf3d8eb2ff265fb31e12abc222e9da1aa07a | meowth: suppress noisy host commands logging
Before enabling timberslide/eclog, suppress noisy host commands from the
console output.
BRANCH=none
TEST=none
Commit-Ready: Vincent Palatin
Tested-by: Vincent Palatin | [
{
"change_type": "MODIFY",
"old_path": "board/meowth_fp/board.h",
"new_path": "board/meowth_fp/board.h",
"diff": "#define CONFIG_SHA256_UNROLLED\n#define CONFIG_SPI\n#define CONFIG_STM_HWTIMER32\n+#define CONFIG_SUPPRESSED_HOST_COMMANDS \\\n+ EC_CMD_CONSOLE_SNAPSHOT, EC_CMD_CONSOLE_READ, EC_CMD_PD_G... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | meowth: suppress noisy host commands logging
Before enabling timberslide/eclog, suppress noisy host commands from the
console output.
BRANCH=none
BUG=b:74394742
TEST=none
Change-Id: I7db1ff4d8f4b8c4d7fba49e053ceecba0eb840fb
Reviewed-on: https://chromium-review.googlesource.com/955649
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,256 | 07.03.2018 07:48:00 | 25,200 | 20e9a125e51a132bffd4ec0020de7da44889379d | yorp: add usb gpio definitions
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "board/yorp/board.c",
"new_path": "board/yorp/board.c",
"diff": "#include \"system.h\"\n#include \"util.h\"\n-/* Must come after other header files. */\n+static void tcpc_alert_event(enum gpio_signal signal)\n+{\n+ /* TODO(b/74127309): Flesh out USB code */\n+}... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | yorp: add usb gpio definitions
BRANCH=none
BUG=b:74127309
TEST=none
Change-Id: I598da6cd2f5e1cd262d0994c2e265a74cbc8fcc1
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/952960
Reviewed-by: Furquan Shaikh <furquan@chromium.org> |
136,256 | 08.03.2018 10:26:52 | 25,200 | badc848ab32755f5d156120e35ce8ea2cc419ca5 | yorp: add USB-C, Power, Charging skeleton code
BRANCH=none
TEST=none | [
{
"change_type": "ADD",
"old_path": null,
"new_path": "board/yorp/battery.c",
"diff": "+/* Copyright 2018 The Chromium OS Authors. All rights reserved.\n+ * Use of this source code is governed by a BSD-style license that can be\n+ * found in the LICENSE file.\n+ *\n+ * Battery pack vendor provided c... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | yorp: add USB-C, Power, Charging skeleton code
BRANCH=none
BUG=b:73811887,b:74127309
TEST=none
Change-Id: Iac2d90e63db151d37db871dc33681dc35e9127a5
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/955941
Reviewed-by: Furquan Shaikh <furquan@chromium.org> |
136,256 | 06.03.2018 13:13:41 | 25,200 | 969049a0aeab26fd21b9d846bf6d96344c90a8a8 | coral: removing unused CONFIG_USB_PD_TCPC_BOARD_INIT
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "board/coral/board.h",
"new_path": "board/coral/board.h",
"diff": "#define CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT TYPEC_RP_3A0\n#define CONFIG_USB_PD_PORT_COUNT 2\n#define CONFIG_USB_PD_VBUS_DETECT_CHARGER\n-#define CONFIG_USB_PD_TCPC_BOARD_INIT\n#define CONFI... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | coral: removing unused CONFIG_USB_PD_TCPC_BOARD_INIT
BRANCH=none
BUG=none
TEST=none
Change-Id: Iaae5aa12b329b859d775605c4e117b17816da28b
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/953064
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,256 | 08.03.2018 13:45:23 | 25,200 | b593d1c05b150fdad68c474ef0e521d5d9c3acea | bc12: add support for active low/high on all gpio signals
yorp inverts both bc12 signals and the bc12 driver needs to handle
the inverted logic
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "board/grunt/board.c",
"new_path": "board/grunt/board.c",
"diff": "#include \"driver/accel_kionix.h\"\n#include \"driver/accel_kx022.h\"\n#include \"driver/accelgyro_bmi160.h\"\n+#include \"driver/bc12/bq24392.h\"\n#include \"driver/led/lm3630a.h\"\n#include \"... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | bc12: add support for active low/high on all gpio signals
yorp inverts both bc12 signals and the bc12 driver needs to handle
the inverted logic
BRANCH=none
BUG=b:74127309
TEST=none
Change-Id: I6848375fc652251aecb553c3f53d62a5f775bec4
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/956321
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,256 | 08.03.2018 15:02:17 | 25,200 | ef4e70174ac2797f0c02753685b35d038a317a6a | usbc: add config support for multiple (and no) vbus adc channels
yorp measures each port's vbus separately on a deticated ADC.
Also, add config to take care of ADV_VBUS -1 case too.
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "board/grunt/board.h",
"new_path": "board/grunt/board.h",
"diff": "#define CONFIG_USB_PD_TCPM_TCPCI\n#define CONFIG_USB_PD_TRY_SRC\n#define CONFIG_USB_PD_VBUS_DETECT_PPC\n+#define CONFIG_USB_PD_VBUS_MEASURE_NOT_PRESENT\n#define CONFIG_USBC_PPC_SN5S330\n#define ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | usbc: add config support for multiple (and no) vbus adc channels
yorp measures each port's vbus separately on a deticated ADC.
Also, add config to take care of ADV_VBUS -1 case too.
BRANCH=none
BUG=b:74127309
TEST=none
Change-Id: I6f4df96caffc3b527b69e67358631dd448172cde
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/956555
Reviewed-by: Edward Hill <ecgh@chromium.org> |
136,274 | 06.03.2018 19:00:22 | 28,800 | 99bcab486dff32c646abed906cf37dfe68a6ead7 | servo_micro: switch parity to 8 bit data
Parity defaulted to 7 bit data, but hammer wants 8 bit.
Change servo_micro to match.
BRANCH=servo-firmware
TEST=flash_ec -b hammer | [
{
"change_type": "MODIFY",
"old_path": "chip/stm32/registers.h",
"new_path": "chip/stm32/registers.h",
"diff": "#define STM32_USART_CR1_TXEIE (1 << 7)\n#define STM32_USART_CR1_PS (1 << 9)\n#define STM32_USART_CR1_PCE (1 << 10)\n+#define STM32_USART_CR1_M (1 << 12)\n#define STM32_USART_CR1_OVER8 (1 <... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | servo_micro: switch parity to 8 bit data
Parity defaulted to 7 bit data, but hammer wants 8 bit.
Change servo_micro to match.
BRANCH=servo-firmware
BUG=b:37513705
TEST=flash_ec -b hammer
Change-Id: I91cc126b03c99107084fb0d1d2e90031b2435fe2
Signed-off-by: Nick Sanders <nsanders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/952677
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> |
136,340 | 12.03.2018 10:58:21 | 25,200 | 8e8d5a63e6dfc9dfc5faa6ff85e0f0b100806e78 | driver: bma2x2: indent register definition
BRANCH=none
TEST=compile | [
{
"change_type": "MODIFY",
"old_path": "driver/accel_bma2x2.c",
"new_path": "driver/accel_bma2x2.c",
"diff": "@@ -119,7 +119,7 @@ static int set_range(const struct motion_sensor_t *s, int range, int rnd)\n/* Find index for interface pair matching the specified range. */\nindex = find_param_index(ran... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | driver: bma2x2: indent register definition
BUG=none
BRANCH=none
TEST=compile
Change-Id: I9507cbe760f886acaa4c6b432cfd8482faeb4618
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/959387
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,340 | 13.03.2018 09:54:26 | 25,200 | 9e95ac3e0aeeaa12aaca75bdb73a055ab969e310 | driver: kionix: Use base accelgyro structure
Unify get_range/get_datarate by using accelgyro_saved_data_t
structure.
BRANCH=none
TEST=compile | [
{
"change_type": "MODIFY",
"old_path": "driver/accel_kionix.c",
"new_path": "driver/accel_kionix.c",
"diff": "@@ -320,14 +320,15 @@ static int set_range(const struct motion_sensor_t *s, int range, int rnd)\nret = set_value(s, reg, range_val, range_field);\nif (ret == EC_SUCCESS)\n- data->sensor_rang... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | driver: kionix: Use base accelgyro structure
Unify get_range/get_datarate by using accelgyro_saved_data_t
structure.
BUG=none
BRANCH=none
TEST=compile
Change-Id: I0bfa2f06c5dd2021a5af9e6499c97e65988167ce
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/961221
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,340 | 13.03.2018 10:37:56 | 25,200 | e0a2a98b69a06fa56b30a88e87d9720c0cd2b533 | driver: sensor: Remove set_resolution when NOOP
set_resolution is only used for few sensors and is not exposed to the AP.
Remove definition when sensors have a fixed resolution.
BRANCH=master
TEST=compile, kevin has enough space for perform_calib. | [
{
"change_type": "MODIFY",
"old_path": "common/motion_sense.c",
"new_path": "common/motion_sense.c",
"diff": "@@ -1560,7 +1560,8 @@ static int command_accelresolution(int argc, char **argv)\n* Write new resolution, if it returns invalid arg, then\n* return a parameter error.\n*/\n- if (sensor->drv->... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | driver: sensor: Remove set_resolution when NOOP
set_resolution is only used for few sensors and is not exposed to the AP.
Remove definition when sensors have a fixed resolution.
BUG=none
BRANCH=master
TEST=compile, kevin has enough space for perform_calib.
Change-Id: I8482387e135356467edaee44da3a0e47cf1db524
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/961222
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,340 | 13.03.2018 10:42:38 | 25,200 | 09292f6a89b113775ac951afed022138b6b20026 | board: kevin: undefined i2c_xfer command
Save some space on kevin.
BRANCH=master
TEST=Can compile kevin with perform_calib addition. | [
{
"change_type": "MODIFY",
"old_path": "board/kevin/board.h",
"new_path": "board/kevin/board.h",
"diff": "#undef CONFIG_CMD_ACCELSPOOF\n#undef CONFIG_CMD_FLASHINFO\n+#undef CONFIG_CMD_I2C_XFER\n/* Gru is especially limited on code space */\n#ifdef BOARD_GRU\n#undef CONFIG_CMD_IDLE_STATS\n-#undef CON... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | board: kevin: undefined i2c_xfer command
Save some space on kevin.
BUG=b:73205042
BRANCH=master
TEST=Can compile kevin with perform_calib addition.
Change-Id: If1526a90925ad20e4cc335e68de266cbc1ae6a42
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/961223
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,427 | 15.03.2018 17:40:55 | 21,600 | 27a0cf0233090737079373604da1469fafb6869a | grunt: GPIO changes for board version 2
Define GPIOs for board versions 0 and 2. Read version in board_init()
and configure GPIOs correctly.
BRANCH=none
TEST=build + boot grunt (version 0) | [
{
"change_type": "MODIFY",
"old_path": "board/grunt/board.c",
"new_path": "board/grunt/board.c",
"diff": "#include \"usbc_ppc.h\"\n#include \"util.h\"\n+/*\n+ * These GPIOs change pins depending on board version. They are configured\n+ * in board_init.\n+ */\n+static enum gpio_signal gpio_usb_c1_oc_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | grunt: GPIO changes for board version 2
Define GPIOs for board versions 0 and 2. Read version in board_init()
and configure GPIOs correctly.
BUG=b:74538637
BRANCH=none
TEST=build + boot grunt (version 0)
Change-Id: I1ff23d5c114cb12e3a32ef069f5e5dff50640d3f
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/966591
Reviewed-by: Martin Roth <martinroth@chromium.org> |
136,340 | 13.11.2017 12:44:44 | 28,800 | 50728bc54748d95c94095c3f7c3579d4473034a9 | config: Put all sensor interrupt config events at a single location
The number of interrupt events will increase with the ST sensors support.
BRANCH=none
TEST=compile | [
{
"change_type": "MODIFY",
"old_path": "include/config.h",
"new_path": "include/config.h",
"diff": "*/\n#undef CONFIG_ACCEL_STD_REF_FRAME_OLD\n-/*\n- * Define the event to raise when BMI160 interrupt.\n- * Must be within TASK_EVENT_MOTION_INTERRUPT_MASK.\n- */\n-#undef CONFIG_ACCELGYRO_BMI160_INT_EV... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | config: Put all sensor interrupt config events at a single location
The number of interrupt events will increase with the ST sensors support.
BUG=b:73546254
BRANCH=none
TEST=compile
Change-Id: If375afa97ad664594f005a6b007aa7d9439e8ecb
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/767611
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,427 | 16.03.2018 15:05:11 | 21,600 | 53ce2a77f545e594405e4c7b7da5082a1bdfeb06 | console: Fix help for parse_bool
A few commands had help text of "[0 | 1]" but parse_bool()
doesn't recognize 0 and 1. Change help text to "[on | off]",
matching other commands.
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "chip/npcx/flash.c",
"new_path": "chip/npcx/flash.c",
"diff": "@@ -769,7 +769,7 @@ static int command_flash_spi_sel_lock(int argc, char **argv)\nreturn EC_SUCCESS;\n}\nDECLARE_CONSOLE_COMMAND(flash_spi_lock, command_flash_spi_sel_lock,\n- \"[0 | 1]\",\n+ \"[on ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | console: Fix help for parse_bool
A few commands had help text of "[0 | 1]" but parse_bool()
doesn't recognize 0 and 1. Change help text to "[on | off]",
matching other commands.
BUG=b:75302458
BRANCH=none
TEST=none
Change-Id: I9b1e4a70e024d17ec8bccc015069e31d7fff08ca
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/967248
Reviewed-by: Randall Spangler <rspangler@chromium.org> |
136,197 | 16.03.2018 10:13:56 | -28,800 | 0cbb4b6f9dc71f6c6d90fd628f466bb61bae9dca | stack_analyzer: Add new syntax for function pointer arrays
Makes it far simpler to support hooks, console commands, host
commands.
BRANCH=poppy,fizz
TEST=Add new array annotation, run stack_analyzer | [
{
"change_type": "MODIFY",
"old_path": "extra/stack_analyzer/README.md",
"new_path": "extra/stack_analyzer/README.md",
"diff": "@@ -72,3 +72,31 @@ add:\n```\nThe source `tcpm_transmit[driver/tcpm/tcpm.h:142]` must be a full signature (function_name[path:line number]).\nSo the resolver can know which... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | stack_analyzer: Add new syntax for function pointer arrays
Makes it far simpler to support hooks, console commands, host
commands.
BRANCH=poppy,fizz
BUG=chromium:648840
TEST=Add new array annotation, run stack_analyzer
Change-Id: I8ed074ba5534661ed59f4f713bb4ba194e712f4e
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/966042
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,427 | 16.03.2018 14:49:09 | 21,600 | 0e224bf94f238aebea81b0c200778a1c3095095f | grunt: Tiny fix to board_get_temp
Fix argument to adc_read_channel() to be enum adc_channel.
No change in behavior since this ends up being a different
name for the same value (0/1).
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "board/grunt/board.c",
"new_path": "board/grunt/board.c",
"diff": "@@ -534,7 +534,9 @@ static const struct thermistor_info thermistor_info = {\nstatic int board_get_temp(int idx, int *temp_k)\n{\n- int mv = adc_read_channel(idx ? NPCX_ADC_CH1 : NPCX_ADC_CH0);\n... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | grunt: Tiny fix to board_get_temp
Fix argument to adc_read_channel() to be enum adc_channel.
No change in behavior since this ends up being a different
name for the same value (0/1).
BUG=none
BRANCH=none
TEST=none
Change-Id: I0e8b3066122f3789d043b98aad98d8a32c2607bc
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/967242
Reviewed-by: Simon Glass <sjg@chromium.org> |
136,340 | 02.11.2017 16:42:13 | 25,200 | 1c03af23e1f8a62b6815fd520de5ace9e365b12f | common: Add hardware error code
Add error code to indicate a piece of hardware is not working properly.
TEST=compile
BRANCH=none | [
{
"change_type": "MODIFY",
"old_path": "include/common.h",
"new_path": "include/common.h",
"diff": "@@ -147,6 +147,8 @@ enum ec_error_list {\nEC_ERROR_MEMORY_ALLOCATION = 23,\n/* Invalid to configure in the current module mode/stage */\nEC_ERROR_INVALID_CONFIG = 24,\n+ /* something wrong in a HW */\... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | common: Add hardware error code
Add error code to indicate a piece of hardware is not working properly.
BUG=none
TEST=compile
BRANCH=none
Change-Id: I34eca8073a359aec1c559241654a1d0a7075cd44
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/753968 |
136,396 | 19.03.2018 12:18:42 | 25,200 | 1f4d4f8a4ec219e84e9d1554f765ec6a4feb6039 | cr50: update version numbers to match Cr50 branches
This reflects version changes in Cr50 branches.
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "util/signer/ec_RW-manifest-dev.json",
"new_path": "util/signer/ec_RW-manifest-dev.json",
"diff": "\"timestamp\": 0,\n\"epoch\": 0, // FWR diversification contributor, 32 bits.\n- \"major\": 2, // FW2_HIK_CHAIN counter.\n+ \"major\": 4, // FW2_HIK_CHAIN counter... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cr50: update version numbers to match Cr50 branches
This reflects version changes in Cr50 branches.
BRANCH=none
BUG=none
TEST=none
Change-Id: I121c65797a30595a58d0b55774e80147692bda38
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/969340
Reviewed-by: Mary Ruthven <mruthven@chromium.org> |
136,340 | 15.02.2018 11:51:29 | 28,800 | 88613a3aa27b6845faf6917c2c9ef950b974f51a | driver: accel_lis2dh: Fix interface
Add support in ectool, expose min/max ODR.
BRANCH=master
TEST=compile | [
{
"change_type": "MODIFY",
"old_path": "driver/accel_lis2dh.c",
"new_path": "driver/accel_lis2dh.c",
"diff": "@@ -129,10 +129,10 @@ static int set_data_rate(const struct motion_sensor_t *s, int rate, int rnd)\n/* Adjust rounded value */\nif (reg_val > LIS2DH_ODR_400HZ_VAL) {\nreg_val = LIS2DH_ODR_40... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | driver: accel_lis2dh: Fix interface
Add support in ectool, expose min/max ODR.
BUG=b:73546254
BRANCH=master
TEST=compile
Change-Id: Ib09c06e17d7d73aaab91680672de4d5267299c7f
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/924405
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,340 | 15.02.2018 11:51:45 | 28,800 | b87bea3289d8ea050f0b482972f6e04ecb8823b1 | driver: lsm6dsm: Add ectool support.
BRANCH=master
TEST=compile | [
{
"change_type": "MODIFY",
"old_path": "include/ec_commands.h",
"new_path": "include/ec_commands.h",
"diff": "@@ -2276,6 +2276,7 @@ enum motionsensor_chip {\nMOTIONSENSE_CHIP_BH1730 = 11,\nMOTIONSENSE_CHIP_GPIO = 12,\nMOTIONSENSE_CHIP_LIS2DH = 13,\n+ MOTIONSENSE_CHIP_LSM6DSM = 14,\n};\n/* List of or... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | driver: lsm6dsm: Add ectool support.
BUG=b:73546254
BRANCH=master
TEST=compile
Change-Id: If914dfbf7bb30e934b711d8f89c46af2787f917c
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/924406
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,340 | 24.01.2018 08:28:03 | 28,800 | 94f5413159518e798800ca41916c02af00a6e2c8 | driver: lis2dh: fix gain units
Accelerometer reports accelerating in mg. Fix gain to that full range
(2g, 4g or 8g) returns 2<<15.
BRANCH=master
TEST=compile | [
{
"change_type": "MODIFY",
"old_path": "driver/accel_lis2dh.c",
"new_path": "driver/accel_lis2dh.c",
"diff": "@@ -53,25 +53,25 @@ static int enable_fifo(const struct motion_sensor_t *s, int mode, int en_dis)\n*/\nstatic int set_range(const struct motion_sensor_t *s, int range, int rnd)\n{\n- int err... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | driver: lis2dh: fix gain units
Accelerometer reports accelerating in mg. Fix gain to that full range
(2g, 4g or 8g) returns 2<<15.
BUG=b:73546254
BRANCH=master
TEST=compile
Change-Id: I2873a641985fa800709a2d30b031c2b6e3fcb39e
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/924407
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,340 | 24.01.2018 08:28:03 | 28,800 | 3d3a009f49c82ba4ed907a0d99fdef63d720ec1c | driver: lsm6dsm: fix units
Units must be reported in according to the range.
2g means 1<<15 should be returned when accel is 2g.
Actually accelerometer report units in mg.
BRANCH=master
TEST=Check with accelinfo with 2g gain Z ~= 1<<14. | [
{
"change_type": "MODIFY",
"old_path": "driver/accelgyro_lsm6dsm.c",
"new_path": "driver/accelgyro_lsm6dsm.c",
"diff": "@@ -45,7 +45,8 @@ static int set_range(const struct motion_sensor_t *s, int range, int rnd)\nif (s->type == MOTIONSENSE_TYPE_ACCEL) {\n/* Adjust and check rounded value for acc. */... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | driver: lsm6dsm: fix units
Units must be reported in according to the range.
2g means 1<<15 should be returned when accel is 2g.
Actually accelerometer report units in mg.
BUG=b:73546254
BRANCH=master
TEST=Check with accelinfo with 2g gain Z ~= 1<<14.
Change-Id: I218210ca8305ecbe76a681b535f3d75f3a6bea52
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/924408
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,340 | 31.01.2018 10:15:46 | 28,800 | ad275d5fb9e8526666eae9e87b2da15938738667 | board: meowth: add ST LSM6DSL sensors
Add LSM6DSL accel + gyro support to meowth.
FIFO and gesture support will be added later.
BRANCH=master
TEST=use accelinfo to get sensor data. | [
{
"change_type": "MODIFY",
"old_path": "board/zoombini/board.c",
"new_path": "board/zoombini/board.c",
"diff": "#include \"common.h\"\n#include \"console.h\"\n#include \"compile_time_macros.h\"\n+#include \"driver/accelgyro_lsm6dsm.h\"\n#include \"driver/als_opt3001.h\"\n#include \"driver/bc12/bq243... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | board: meowth: add ST LSM6DSL sensors
Add LSM6DSL accel + gyro support to meowth.
FIFO and gesture support will be added later.
BUG=b:69140267,b:73546254
BRANCH=master
TEST=use accelinfo to get sensor data.
Change-Id: I4362fe5dd568fb5d696c460432b5c0a6a80be83e
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/924411 |
136,228 | 19.03.2018 16:36:33 | 25,200 | bb48421c9803e2f5fcfb603bbf6c38e3c0a15bcc | poppy: Lower VCCIO from 0.975V to 0.850V
CQ-DEPEND=CL:*591042
BRANCH=poppy
TEST=No regressions observed.
Commit-Ready: Furquan Shaikh
Tested-by: Furquan Shaikh | [
{
"change_type": "MODIFY",
"old_path": "board/poppy/board.c",
"new_path": "board/poppy/board.c",
"diff": "@@ -419,11 +419,11 @@ static void board_pmic_disable_slp_s0_vr_decay(void)\n/*\n* VCCIOCNT:\n* Bit 6 (0) - Disable decay of VCCIO on SLP_S0# assertion\n- * Bits 5:4 (00) - Nominal output voltage... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | poppy: Lower VCCIO from 0.975V to 0.850V
CQ-DEPEND=CL:*591042
BUG=b:75978856
BRANCH=poppy
TEST=No regressions observed.
Change-Id: I3c481ac46bd9005df05f7be13bee8799959fb282
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/969786
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> |
136,405 | 16.03.2018 11:02:04 | 25,200 | b5fddbbe26ed27f1ade7d89e6acbeebaf15b315e | Fizz: Log DP mode entry and exit
This helps us tell whether a monitor lost picture because the EC
exited the DisplayPort mode or other reason.
BRANCH=none
TEST=boot Fizz | [
{
"change_type": "MODIFY",
"old_path": "board/fizz/usb_pd_policy.c",
"new_path": "board/fizz/usb_pd_policy.c",
"diff": "@@ -325,6 +325,8 @@ static int svdm_enter_dp_mode(int port, uint32_t mode_caps)\n{\n/* Only enter mode if device is DFP_D capable */\nif (mode_caps & MODE_DP_SNK) {\n+ pd_log_event... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Fizz: Log DP mode entry and exit
This helps us tell whether a monitor lost picture because the EC
exited the DisplayPort mode or other reason.
BUG=b:75288273
BRANCH=none
TEST=boot Fizz
Change-Id: I2da6a27c66f03ef780a0ed6f60a597a01f248942
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/966993
Reviewed-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,256 | 21.03.2018 15:51:47 | 21,600 | a615f3c7d3787b8f7be9a82c292228ed26eda963 | yorp: Enabling power in both USB-A ports in S0
BRANCH=none
TEST=build all | [
{
"change_type": "MODIFY",
"old_path": "board/yorp/board.c",
"new_path": "board/yorp/board.c",
"diff": "@@ -107,6 +107,12 @@ const struct i2c_port_t i2c_ports[] = {\n};\nconst unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);\n+/* USB-A port configuration */\n+const int usb_port_enable[USB_PORT_C... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | yorp: Enabling power in both USB-A ports in S0
BRANCH=none
BUG=b:74388692,b:75986973
TEST=build all
Change-Id: Ief74b3e1a18ca90cb8fbf76c51780f659e4caf61
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/974310
Reviewed-by: Furquan Shaikh <furquan@chromium.org> |
136,340 | 19.03.2018 14:37:25 | 25,200 | 7dfb352adcd9ad6dccf198731e59fb8a7b95a8f4 | board: In motion sensor array, remove more assignment to 0
TEST=Compile
BRANCH=none | [
{
"change_type": "MODIFY",
"old_path": "board/mchpevb1/board.c",
"new_path": "board/mchpevb1/board.c",
"diff": "@@ -944,20 +944,11 @@ struct motion_sensor_t motion_sensors[] = {\n.min_frequency = BMI160_ACCEL_MIN_FREQ,\n.max_frequency = BMI160_ACCEL_MAX_FREQ,\n.config = {\n- /* AP: by default use EC... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | board: In motion sensor array, remove more assignment to 0
BUG=none
TEST=Compile
BRANCH=none
Change-Id: I86ccc26d7fb6d482dca3275a4365729ff8644777
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/969626 |
136,256 | 19.03.2018 15:45:31 | 21,600 | 7742e06e45db3d12450b193cedacdc1171fbf85b | bip: initial add of bip skeleton
BRANCH=none
TEST=build all | [
{
"change_type": "ADD",
"old_path": null,
"new_path": "board/bip/board.c",
"diff": "+/* Copyright 2018 The Chromium OS Authors. All rights reserved.\n+ * Use of this source code is governed by a BSD-style license that can be\n+ * found in the LICENSE file.\n+ */\n+\n+/* Bip board-specific configurat... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | bip: initial add of bip skeleton
BRANCH=none
BUG=b:75972988
TEST=build all
Change-Id: Ibfadaee3b9584a7e2c87f6f607be4cba20f338b7
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/972142
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org> |
136,256 | 22.03.2018 13:49:30 | 21,600 | 4c4d80ca5dcda0224c514f55dd9d51c2fb0922a1 | yorp: update gpio alternate function parameter
The NPCX driver doesn't use anything but >= 0; make everything
consistent as to not imply something is different between UART and
everything else.
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "board/yorp/gpio.inc",
"new_path": "board/yorp/gpio.inc",
"diff": "@@ -98,12 +98,12 @@ GPIO(USB_C1_HPD_1V8_ODL, PIN(C, 6), GPIO_ODR_HIGH | /* C1 DP Hotplug Detect */\n/* Alternate functions GPIO definitions */\n/* Cr50 requires no pull-ups on UART pins. */\nALT... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | yorp: update gpio alternate function parameter
The NPCX driver doesn't use anything but >= 0; make everything
consistent as to not imply something is different between UART and
everything else.
BRANCH=none
BUG=none
TEST=none
Change-Id: Ib98f56f7004df2405df7d2cc1847f1ed4b3ec558
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/976524
Reviewed-by: Edward Hill <ecgh@chromium.org> |
136,256 | 19.03.2018 16:19:17 | 21,600 | 8b0f4b55c50a5677d15bfdfcedd9c6469337a393 | yorp: clean bug comments
Removing old comment and updating another to a more specific bug.
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "board/yorp/board.h",
"new_path": "board/yorp/board.h",
"diff": "#define CONFIG_POWER_BUTTON\n#define CONFIG_POWER_BUTTON_X86\n#define CONFIG_EXTPOWER_GPIO\n-/* TODO(b/73811887), increase CONFIG_EXTPOWER_DEBOUNCE_MS from 30 to 1000? */\n+/* TODO(b/75974377), in... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | yorp: clean bug comments
Removing old comment and updating another to a more specific bug.
BRANCH=none
BUG=none
TEST=none
Change-Id: I7542b68e590facf9d8f7b98539cc4a161359c213
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/969649
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org> |
136,377 | 22.03.2018 13:38:32 | 25,200 | e33c1d8de03b936ed7dc67405ede9bcd747d07d2 | rma_reset: update Makefile to use different compiliers
BRANCH=none
TEST=compile for bob and reef. make sure it runs on both
Commit-Ready: Mary Ruthven
Tested-by: Mary Ruthven | [
{
"change_type": "MODIFY",
"old_path": "extra/rma_reset/Makefile",
"new_path": "extra/rma_reset/Makefile",
"diff": "# Use of this source code is governed by a BSD-style license that can be\n# found in the LICENSE file.\n+CC ?= gcc\nPROGRAM := rma_reset\nSOURCE := $(PROGRAM).c\nOBJS := curve25519.o c... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | rma_reset: update Makefile to use different compiliers
BUG=b:76105747
BRANCH=none
TEST=compile for bob and reef. make sure it runs on both
Change-Id: I30004c9794c9619698889fecbf8746778ebbb48c
Signed-off-by: Mary Ruthven <mruthven@google.com>
Reviewed-on: https://chromium-review.googlesource.com/976554
Commit-Ready: Mary Ruthven <mruthven@chromium.org>
Tested-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> |
136,396 | 23.03.2018 10:40:57 | 25,200 | 4d959e92cab7d26733f5a0379f1afeed42a0c7a5 | cr50: update manifests for both dev and prod versions
BRANCH=cr50, cr50-mp
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "util/signer/ec_RW-manifest-dev.json",
"new_path": "util/signer/ec_RW-manifest-dev.json",
"diff": "\"timestamp\": 0,\n\"epoch\": 0, // FWR diversification contributor, 32 bits.\n\"major\": 4, // FW2_HIK_CHAIN counter.\n- \"minor\": 3, // Mostly harmless version... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cr50: update manifests for both dev and prod versions
BRANCH=cr50, cr50-mp
BUG=none
TEST=none
Change-Id: I377aab1b5a729a0ca98e2340050300d938e51bd5
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/978541
Reviewed-by: Mary Ruthven <mruthven@chromium.org> |
136,256 | 21.03.2018 10:44:11 | 21,600 | a63f6a6240ce3e33b732035b5573d88c17e21cb0 | bip: add gpio definitions
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "board/bip/gpio.inc",
"new_path": "board/bip/gpio.inc",
"diff": "@@ -24,6 +24,50 @@ GPIO(PCH_SCI_L, PIN(D, 3), GPIO_OUT_LOW) /* EC_SCI_R_ODL */\nGPIO(ENTERING_RW, PIN(C, 5), GPIO_OUT_LOW) /* EC_ENTERING_RW */\nGPIO(PCH_WAKE_L, PIN(D, 1), GPIO_ODR_HIGH) /* EC_PC... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | bip: add gpio definitions
BRANCH=none
BUG=b:75972988
TEST=none
Change-Id: I4c20103083dc224d449bdc659a2b359808218cb0
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/976526
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,427 | 23.03.2018 16:18:37 | 21,600 | 36e7c2498c90df0a4c5672ae8347dec6cca98689 | stoney: Rename PGOOD GPIOs
Rename stoney power signals for clarity:
SPOK -> S5_PGOOD
VGATE -> S0_PGOOD
BRANCH=none
TEST=power grunt on and off | [
{
"change_type": "MODIFY",
"old_path": "board/grunt/board.c",
"new_path": "board/grunt/board.c",
"diff": "@@ -139,8 +139,8 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);\nconst struct power_signal_info power_signal_list[] = {\n{GPIO_PCH_SLP_S3_L, POWER_SIGNAL_ACTIVE_HIGH, \"SLP_S3_DEASSE... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | stoney: Rename PGOOD GPIOs
Rename stoney power signals for clarity:
SPOK -> S5_PGOOD
VGATE -> S0_PGOOD
BUG=none
BRANCH=none
TEST=power grunt on and off
Change-Id: Iee8307138600c10868981a22971beace2de1ca91
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/978952
Reviewed-by: Justin TerAvest <teravest@chromium.org> |
136,256 | 23.03.2018 13:38:19 | 21,600 | cd17195b0f9aa72b515df0d138fa68b9cb0d713a | bip: add UART interrupt to exit deep doze mode
Hook up UART RX pin to wake up ITE device when in deep doze mode.
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "board/bip/board.c",
"new_path": "board/bip/board.c",
"diff": "#include \"lid_switch.h\"\n#include \"power_button.h\"\n#include \"spi.h\"\n+#include \"uart.h\"\n#include \"switch.h\"\n#include \"system.h\"\n#include \"util.h\"\n"
},
{
"change_type": "MO... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | bip: add UART interrupt to exit deep doze mode
Hook up UART RX pin to wake up ITE device when in deep doze mode.
BRANCH=none
BUG=b:76022415
TEST=none
Change-Id: Iabfd3ef51f9e63a6cbcca60fb916108528b0b294
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/978932
Reviewed-by: Furquan Shaikh <furquan@chromium.org> |
136,256 | 23.03.2018 09:48:50 | 21,600 | 9849d847e7e888f9588f9e2d14db19366e0dedac | yorp: update virtual wire note for PLT_RST_L
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "board/yorp/gpio.inc",
"new_path": "board/yorp/gpio.inc",
"diff": "@@ -41,7 +41,8 @@ GPIO(PCH_SLP_S0_L, PIN(A, 4), GPIO_INPUT) /* SLP_S0_L */\n#endif\n/*\n- * TODO(b/74123961): Move PLT_RST_L and SYS_RESET_L to virtual wires over eSPI\n+ * PLT_RST_L isn't used ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | yorp: update virtual wire note for PLT_RST_L
BRANCH=none
BUG=b:74123961
TEST=none
Change-Id: I8d1a810a171685f98c6fe476234ec2e29e7c5854
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/978369
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Scott Collyer <scollyer@chromium.org> |
136,352 | 25.03.2018 01:01:42 | -28,800 | b57ad0e1b82f87e7882e3bd7d05b8e994ad5a414 | Remove the unnecessary words of "Disable touchpad" in the comments
The control of trackpad from EC was entirely removed by CL:421275.
So remove the unnecessary words of disabling touchpad in the comment
of lid_angle_peripheral_enable().
BRANCH=poppy
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "board/coral/board.c",
"new_path": "board/coral/board.c",
"diff": "@@ -667,7 +667,8 @@ static void enable_input_devices(void)\nvoid lid_angle_peripheral_enable(int enable)\n{\n/* If the lid is in 360 position, ignore the lid angle,\n- * which might be faulty. D... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Remove the unnecessary words of "Disable touchpad" in the comments
The control of trackpad from EC was entirely removed by CL:421275.
So remove the unnecessary words of disabling touchpad in the comment
of lid_angle_peripheral_enable().
BUG=none
BRANCH=poppy
TEST=none
Change-Id: Ie688d9dc98c5f6f60a9d3908945495f4b6fdb00d
Signed-off-by: Kaiyen Chang <kaiyen.chang@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/979572
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,230 | 27.03.2018 14:36:23 | 25,200 | f03486d36c0d3a456b6d29944fa3bdc72bcac985 | scarlet: Limit the maximal acceptable VBUS to 5.5V
BRANCH=scarlet
TEST=Plug in a charger with 5V/9V/15V PD profiles, confirm
scarlet picks 5V
Commit-Ready: Philip Chen
Tested-by: Philip Chen | [
{
"change_type": "MODIFY",
"old_path": "board/scarlet/board.h",
"new_path": "board/scarlet/board.h",
"diff": "#define PD_OPERATING_POWER_MW 15000\n#define PD_MAX_POWER_MW ((PD_MAX_VOLTAGE_MV * PD_MAX_CURRENT_MA) / 1000)\n#define PD_MAX_CURRENT_MA 3000\n-#define PD_MAX_VOLTAGE_MV 9500\n+#define PD_MA... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | scarlet: Limit the maximal acceptable VBUS to 5.5V
BUG=b:74399717
BRANCH=scarlet
TEST=Plug in a charger with 5V/9V/15V PD profiles, confirm
scarlet picks 5V
Change-Id: I58ee110d110d873b7221695bf4a182d6d04b65e1
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/982555
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Alexandru M Stan <amstan@chromium.org> |
136,256 | 27.03.2018 13:44:00 | 21,600 | fbc40d6fcecb8a93ec91d468bc89f35c07d48f99 | chip/ite: add ADC constants
Add ADC constants to ITE driver to match existing driver style
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "chip/it83xx/adc_chip.h",
"new_path": "chip/it83xx/adc_chip.h",
"diff": "*/\n#define ADC_TIMEOUT_US 248\n+/* Minimum and maximum values returned by adc_read_channel(). */\n+#define ADC_READ_MIN 0\n+#define ADC_READ_MAX 1023\n+#define ADC_MAX_MVOLT 3000\n+\n/* L... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | chip/ite: add ADC constants
Add ADC constants to ITE driver to match existing driver style
BRANCH=none
BUG=none
TEST=none
Change-Id: I7e101a26b81d0cd5ffd50f94c18f20335df06c67
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/982560
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Dino Li <Dino.Li@ite.com.tw> |
136,256 | 27.03.2018 13:46:19 | 21,600 | ffa405476096c5c1905f7f9bf9235043ad8f0257 | usbc: add default I2C addresses
Add hard coded I2C addresses as defined by datasheet.
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "board/coral/board.c",
"new_path": "board/coral/board.c",
"diff": "@@ -191,7 +191,7 @@ struct i2c_stress_test i2c_stress_tests[] = {\n#ifdef CONFIG_CMD_I2C_STRESS_TEST_TCPC\n{\n.port = NPCX_I2C_PORT0_0,\n- .addr = 0x50,\n+ .addr = ANX74XX_I2C_ADDR1,\n.i2c_test ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | usbc: add default I2C addresses
Add hard coded I2C addresses as defined by datasheet.
BRANCH=none
BUG=none
TEST=none
Change-Id: Ia69cc4da7474a9c1f8a994d33db88e0a405f02b7
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/982561
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,197 | 27.03.2018 15:49:26 | -28,800 | 8fb18f174ce9aac91c5fc41ebe4b12c0aa746ba0 | common/ec_ec_comm_master/slave: Add support for EC hibernate
Allows the lid to hibernate the base.
BRANCH=none
TEST=With following change, lid hibernates the base when in S5,
and no AC is connected. | [
{
"change_type": "MODIFY",
"old_path": "common/ec_ec_comm_master.c",
"new_path": "common/ec_ec_comm_master.c",
"diff": "@@ -345,4 +345,26 @@ int ec_ec_master_base_charge_control(int max_current,\nreturn handle_error(__func__, ret, data.resp.head.result);\n}\n+\n+int ec_ec_master_hibernate(void)\n+{\... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | common/ec_ec_comm_master/slave: Add support for EC hibernate
Allows the lid to hibernate the base.
BRANCH=none
BUG=b:71874971
TEST=With following change, lid hibernates the base when in S5,
and no AC is connected.
Change-Id: I8c8017d638442ba8b17c8117d0b1b31f3538925f
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/981914
Reviewed-by: Randall Spangler <rspangler@chromium.org> |
136,318 | 28.03.2018 09:23:00 | 25,200 | ba20a766609679648e92c5fd1cd209b5b6c8483f | yorp: Enable Trackpad power
Enable trackpad power when chipset is in S0 state. Keep
it disabled in other states.
BRANCH=master
TEST=On Octopus, kernel logs show ELAN enumerated | [
{
"change_type": "MODIFY",
"old_path": "board/yorp/board.c",
"new_path": "board/yorp/board.c",
"diff": "@@ -140,6 +140,22 @@ static void chipset_pre_init(void)\n}\nDECLARE_HOOK(HOOK_CHIPSET_PRE_INIT, chipset_pre_init, HOOK_PRIO_DEFAULT);\n+/* Called on AP S3 -> S0 transition */\n+static void board_c... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | yorp: Enable Trackpad power
Enable trackpad power when chipset is in S0 state. Keep
it disabled in other states.
BUG=b:73137125
BRANCH=master
TEST=On Octopus, kernel logs show ELAN enumerated
Change-Id: Ie1fd8ab777e82d900418127b4efee29fe65d1423
Signed-off-by: Shamile Khan <shamile.khan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/984405
Reviewed-by: Furquan Shaikh <furquan@chromium.org> |
136,256 | 30.03.2018 12:18:55 | 21,600 | 7c0d2d02f65ba8caf01f753b98e06a74218f1303 | ite: disable interrupts if no keyboard task
We also need to ensure that the interrupts are not firing.
BRANCH=none
TEST=buildall | [
{
"change_type": "MODIFY",
"old_path": "chip/it83xx/intc.h",
"new_path": "chip/it83xx/intc.h",
"diff": "@@ -25,7 +25,7 @@ void espi_interrupt(void);\nvoid espi_vw_interrupt(void);\nvoid espi_init(void);\n-#ifdef HAS_TASK_KEYPROTO\n+#if defined(CONFIG_LPC) && defined(HAS_TASK_KEYPROTO)\nvoid lpc_kbc_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | ite: disable interrupts if no keyboard task
We also need to ensure that the interrupts are not firing.
BRANCH=none
BUG=none
TEST=buildall
Change-Id: I3311c8667fab2c575ff6bbe8b26b010a3340e600
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/988229 |
136,340 | 29.03.2018 11:23:57 | 25,200 | 94eaba49b0166f7d1d7f5356f4b5c21468f419f1 | driver: lsm6dsm: Fix ODR rate calculation
rate was wrong, but round up was saving us.
BRANCH=none
TEST=Check register is set correctly even when roundup is 0.
Tested-by: Gwendal Grignou | [
{
"change_type": "MODIFY",
"old_path": "driver/accelgyro_lsm6dsm.c",
"new_path": "driver/accelgyro_lsm6dsm.c",
"diff": "@@ -120,7 +120,7 @@ static int set_data_rate(const struct motion_sensor_t *s, int rate, int rnd)\n}\nreg_val = LSM6DSM_ODR_TO_REG(rate);\n- normalized_rate = LSM6DSM_ODR_TO_NORMALI... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | driver: lsm6dsm: Fix ODR rate calculation
rate was wrong, but round up was saving us.
BUG=b:73546254
BRANCH=none
TEST=Check register is set correctly even when roundup is 0.
Change-Id: I4cf11291345ccfaacd1fc9942a3f112b460268c1
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/986917
Tested-by: Gwendal Grignou <gwendal@google.com>
Reviewed-by: Gwendal Grignou <gwendal@google.com> |
136,256 | 28.03.2018 11:19:39 | 21,600 | aac3da46a0dee699f36eccc2fb278e8ae2373425 | yorp: add board version
Hard code value to 0 for now.
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "board/yorp/board.c",
"new_path": "board/yorp/board.c",
"diff": "@@ -84,6 +84,12 @@ const struct adc_t adc_channels[] = {\n/* Vbus C1 sensing (10x voltage divider). PPVAR_USB_C1_VBUS */\n[ADC_VBUS_C1] = {\n\"VBUS_C1\", NPCX_ADC_CH9, ADC_MAX_VOLT*10, ADC_READ_MA... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | yorp: add board version
Hard code value to 0 for now.
BRANCH=none
BUG=b:76448181
TEST=none
Change-Id: Iefe91fb02a958f40a1ff63c122792a390a545290
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/984517
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,245 | 04.04.2018 09:18:39 | 21,600 | 5d8a4ba6f252fbda1111c25a05523c73ebe3343d | config.h: clarify CONFIG_INTERNAL_STORAGE semantics
The semantics in the EC code base are that CONFIG_INTERNAL_STORAGE
implies eXecute-In-Place semantics (XIP). Add a comment to make that
abundantly clear.
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "include/config.h",
"new_path": "include/config.h",
"diff": "/*\n* EC code can reside on internal or external storage. Only one of these\n- * CONFIGs should be defined.\n+ * CONFIGs should be defined. CONFIG_INTERNAL_STORAGE implies XIP\n+ * (eXecute-In-Place) ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | config.h: clarify CONFIG_INTERNAL_STORAGE semantics
The semantics in the EC code base are that CONFIG_INTERNAL_STORAGE
implies eXecute-In-Place semantics (XIP). Add a comment to make that
abundantly clear.
BUG=none
BRANCH=none
TEST=none
Change-Id: I80152eeb41dd35716f4c09ffd1753ae128aa7d2d
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/995956
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,405 | 04.04.2018 11:36:48 | 25,200 | 660fb6a57022e0514c607633a5b0458aced026da | EFS: Clarify vboot_main entry logic
This patch clarifies the logic which determines whether we perform EFS
or not and print different messages for each case.
BRANCH=none
TEST=buildall | [
{
"change_type": "MODIFY",
"old_path": "common/vboot/vboot.c",
"new_path": "common/vboot/vboot.c",
"diff": "@@ -194,20 +194,25 @@ void vboot_main(void)\n{\nCPRINTS(\"Main\");\n- if (system_is_in_rw() || !(flash_get_protect() &\n- EC_FLASH_PROTECT_GPIO_ASSERTED)) {\n+ if (system_is_in_rw()) {\n/*\n- ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | EFS: Clarify vboot_main entry logic
This patch clarifies the logic which determines whether we perform EFS
or not and print different messages for each case.
BUG=none
BRANCH=none
TEST=buildall
Change-Id: I5588018a3594be2bcad84a2f74f805b76a195f85
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/996398
Reviewed-by: Randall Spangler <rspangler@chromium.org> |
136,405 | 04.04.2018 09:18:19 | 25,200 | 5daa45c2fe093527d22baa34fd69e2f408e202f3 | Features: Add EXEC_IN_RAM
This patch adds execution-in-ram, opposite of XIP: execution-in-place
(a.k.a. XIP) to the EC features. It can be currently implied by
CONFIG_EXTERNAL_STORAGE.
BRANCH=none
TEST=Verify ectool prints EXEC_IN_RAM on Fizz. | [
{
"change_type": "MODIFY",
"old_path": "common/ec_features.c",
"new_path": "common/ec_features.c",
"diff": "@@ -118,6 +118,9 @@ uint32_t get_feature_flags1(void)\nuint32_t result = EC_FEATURE_MASK_1(EC_FEATURE_UNIFIED_WAKE_MASKS)\n#ifdef CONFIG_HOST_EVENT64\n| EC_FEATURE_MASK_1(EC_FEATURE_HOST_EVENT... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Features: Add EXEC_IN_RAM
This patch adds execution-in-ram, opposite of XIP: execution-in-place
(a.k.a. XIP) to the EC features. It can be currently implied by
CONFIG_EXTERNAL_STORAGE.
BUG=b:77306460
BRANCH=none
TEST=Verify ectool prints EXEC_IN_RAM on Fizz.
Change-Id: I4a7fb3b267864debe59fd211956371eceac57613
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/995968
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,228 | 04.04.2018 17:00:03 | 25,200 | 5bf954bedfc1bb11aee020eeb1729bbc187cb293 | nautilus: Lower VCCIO from 0.975V to 0.850V
CQ-DEPEND=CL:*602341
BRANCH=poppy
TEST=None
Commit-Ready: Furquan Shaikh
Tested-by: Furquan Shaikh | [
{
"change_type": "MODIFY",
"old_path": "board/nautilus/board.c",
"new_path": "board/nautilus/board.c",
"diff": "@@ -323,11 +323,11 @@ static void board_pmic_disable_slp_s0_vr_decay(void)\n/*\n* VCCIOCNT:\n* Bit 6 (0) - Disable decay of VCCIO on SLP_S0# assertion\n- * Bits 5:4 (00) - Nominal output v... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | nautilus: Lower VCCIO from 0.975V to 0.850V
CQ-DEPEND=CL:*602341
BUG=b:77496214
BRANCH=poppy
TEST=None
Change-Id: If04161615343f573d0de0881667564f7384c2605
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/996804
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,226 | 28.03.2018 09:50:09 | 25,200 | d1d5dc162a8ddd6db0b71a3e95ede90b2d5e6ae6 | yorp: Enable keyboard support
BRANCH=None
TEST=make buildall -j; on yorp test keyboard
Commit-Ready: Divya S Sasidharan
Tested-by: Divya S Sasidharan | [
{
"change_type": "MODIFY",
"old_path": "board/yorp/board.c",
"new_path": "board/yorp/board.c",
"diff": "@@ -341,6 +341,26 @@ error:\nreturn version;\n}\n+/* Keyboard scan setting */\n+struct keyboard_scan_config keyscan_config = {\n+ /*\n+ * F3 key scan cycle completed but scan input is not\n+ * cha... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | yorp: Enable keyboard support
BUG=b:77487719
BRANCH=None
TEST=make buildall -j; on yorp test keyboard
Change-Id: Ieb3da871cfa6e2274a3e54274497846787edb796
Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/984385
Commit-Ready: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,226 | 23.03.2018 22:41:45 | 25,200 | 96931840bcf4171a9c44e48d4645b3c7c227014b | yorp: Enable LED support
BRANCH=master
TEST=make buildall -j
Commit-Ready: Divya S Sasidharan
Tested-by: Divya S Sasidharan | [
{
"change_type": "MODIFY",
"old_path": "board/yorp/board.h",
"new_path": "board/yorp/board.h",
"diff": "#define CONFIG_CMD_ACCELS\n#define CONFIG_CMD_ACCEL_INFO\n+#define CONFIG_LED_COMMON\n+\n/* Charger Configuration */\n#define CONFIG_CHARGE_MANAGER\n#define CONFIG_CHARGE_RAMP_HW\n"
},
{
"... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | yorp: Enable LED support
BUG=b:74952719
BRANCH=master
TEST=make buildall -j
Change-Id: I49c2f9729425c1c2a08d2a73449b1bfb1912ecc5
Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/979393
Commit-Ready: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,340 | 29.03.2018 07:43:43 | 25,200 | 54884c45c59c07a4c16fd131dc4641a27559c871 | meowth: Add Gyro/FIFO support
Enable Gyro and collect data with FIFO.
BRANCH=master
TEST=Check gyro data is correct when enabled.
Run CTS test: cheets_CTS_N.7.1_r15.x86.CtsHardwareTestCases | [
{
"change_type": "MODIFY",
"old_path": "board/zoombini/board.c",
"new_path": "board/zoombini/board.c",
"diff": "@@ -217,7 +217,7 @@ static struct mutex g_base_mutex;\n* Motion Sense\n*/\n-struct stprivate_data lsm6dsm_a_data;\n+struct lsm6dsm_data lsm6dsm_a_data;\nstruct stprivate_data lsm6dsm_g_dat... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | meowth: Add Gyro/FIFO support
Enable Gyro and collect data with FIFO.
BUG=b:73546254
BRANCH=master
TEST=Check gyro data is correct when enabled.
Run CTS test: cheets_CTS_N.7.1_r15.x86.CtsHardwareTestCases
Change-Id: I41321cfc8e7b4f8a006ee45c3a9d11305761315d
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/986918
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,340 | 29.03.2018 07:44:23 | 25,200 | 211c2125201f5783ceeb18f34452b3ed90627e01 | meowth: Add Sync support
BRANCH=master
TEST=Check sync sensor is present with accelinfo. | [
{
"change_type": "MODIFY",
"old_path": "board/zoombini/board.c",
"new_path": "board/zoombini/board.c",
"diff": "#include \"driver/led/lm3630a.h\"\n#include \"driver/pmic_tps650x30.h\"\n#include \"driver/ppc/sn5s330.h\"\n+#include \"driver/sync.h\"\n#include \"driver/tcpm/ps8xxx.h\"\n#include \"ec_co... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | meowth: Add Sync support
BUG=b:73546254
BRANCH=master
TEST=Check sync sensor is present with accelinfo.
Change-Id: Id971d9f1908a2e04be325ac54d3ed600ee7901cd
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/986919
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,256 | 06.04.2018 07:53:30 | 25,200 | d105ac0f77ef4608dc5c67c7687b64a4680a12a3 | yorp: fix inverted logic for dead battery mode
BRANCH=none
TEST=yorp P1 can still boot without battery | [
{
"change_type": "MODIFY",
"old_path": "driver/ppc/nx20p3483.c",
"new_path": "driver/ppc/nx20p3483.c",
"diff": "@@ -208,7 +208,7 @@ static int nx20p3483_init(int port)\nreturn rv;\n/* If in dead battery mode switch to SNK mode before exiting */\n- if (!(reg & ~NX20P3483_CTRL_DB_EXIT)) {\n+ if (!(reg... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | yorp: fix inverted logic for dead battery mode
BRANCH=none
BUG=b:77561535
TEST=yorp P1 can still boot without battery
Change-Id: Ifa327e2989ac3dfe260b570edbc23add4910e09f
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/998410
Reviewed-by: Furquan Shaikh <furquan@chromium.org> |
136,340 | 06.04.2018 16:28:37 | 25,200 | 7f5299cb7a588d660c8064fd7f3a4855e5706df9 | FIXUP: board: Add CONFIG_ACCEL_FORCE_MODE_MASK for ALS when needed
Enabled forced mode for BMI160 accelerometer on soraka by mistake.
BRANCH=poppy
TEST=Compile | [
{
"change_type": "MODIFY",
"old_path": "board/poppy/board.h",
"new_path": "board/poppy/board.h",
"diff": "@@ -269,7 +269,7 @@ void board_set_tcpc_power_mode(int port, int mode);\nvoid base_detect_interrupt(enum gpio_signal signal);\n/* Sensors without hardware FIFO are in forced mode */\n-#define CO... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | FIXUP: board: Add CONFIG_ACCEL_FORCE_MODE_MASK for ALS when needed
Enabled forced mode for BMI160 accelerometer on soraka by mistake.
BUG=b:67112751,b:75533383
BRANCH=poppy
TEST=Compile
Change-Id: I429a1d527a56c371351f8248912c580f8680447f
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1000726
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> |
136,256 | 27.03.2018 14:44:54 | 21,600 | 32bbdbf88cf5422ac1ca8fe8121d3cec07c379c3 | bip: add initial power sequence usb-pd
BRANCH=none
TEST=buildall | [
{
"change_type": "ADD",
"old_path": null,
"new_path": "board/bip/battery.c",
"diff": "+/* Copyright 2018 The Chromium OS Authors. All rights reserved.\n+ * Use of this source code is governed by a BSD-style license that can be\n+ * found in the LICENSE file.\n+ *\n+ * Battery pack vendor provided ch... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | bip: add initial power sequence usb-pd
BRANCH=none
BUG=b:75972988,b:76218141
TEST=buildall
Change-Id: I8d03f10828821c6d8e096d882db9f82cc901003a
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/982562
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,340 | 05.04.2018 18:23:08 | 25,200 | 17a7b0b30a38e240ea4cc3423e83cca52344b5a8 | FIXUP: meowth: Add Gyro/FIFO support
Remove SPI define, set EC period properly.
BRANCH=none
TEST=check accel and gyro data. | [
{
"change_type": "MODIFY",
"old_path": "board/zoombini/board.c",
"new_path": "board/zoombini/board.c",
"diff": "@@ -242,7 +242,7 @@ struct motion_sensor_t motion_sensors[] = {\n/* EC use accel for angle detection */\n[SENSOR_CONFIG_EC_S0] = {\n.odr = 13000,\n- .ec_rate = 13 * MSEC,\n+ .ec_rate = 76 ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | FIXUP: meowth: Add Gyro/FIFO support
Remove SPI define, set EC period properly.
BUG=None
BRANCH=none
TEST=check accel and gyro data.
Change-Id: Ic2af6ca9721d127867a39b76e80aa396403a628d
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/999815
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,256 | 02.04.2018 15:08:09 | 25,200 | c8814430d65c440950446c573db0932707f02c89 | yorp: add more USB-C power logic
* TCPC reset
* PPC input charging (current/voltage limits)
* PPC output charging
* VBUS presence detection
BRANCH=none
TEST=yorp C1 can negotiate 20V at 3A | [
{
"change_type": "MODIFY",
"old_path": "board/yorp/board.c",
"new_path": "board/yorp/board.c",
"diff": "#include \"adc.h\"\n#include \"adc_chip.h\"\n#include \"battery.h\"\n+#include \"charge_manager.h\"\n+#include \"charge_state.h\"\n#include \"common.h\"\n#include \"driver/accel_kionix.h\"\n#inclu... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | yorp: add more USB-C power logic
* TCPC reset
* PPC input charging (current/voltage limits)
* PPC output charging
* VBUS presence detection
BRANCH=none
BUG=b:74127309,b:77458917,b:77579760
TEST=yorp C1 can negotiate 20V at 3A
Change-Id: Ifa84071be1617a060a217d00bc102d836edffe95
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/991081 |
136,274 | 09.04.2018 23:17:29 | 25,200 | f305ec22d62005ca277e077676e45c015919c403 | stm32: implement reboot wait-ext
This was missed on stm32, but is helpful for servod
to work reliably.
TEST=it waits 10 sec for external reboot. | [
{
"change_type": "MODIFY",
"old_path": "chip/stm32/system.c",
"new_path": "chip/stm32/system.c",
"diff": "@@ -398,6 +398,15 @@ void system_reset(int flags)\nwhile (1)\n;\n} else {\n+ if (flags & SYSTEM_RESET_WAIT_EXT) {\n+ int i;\n+\n+ /* Wait 10 seconds for external reset */\n+ for (i = 0; i < 1000... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | stm32: implement reboot wait-ext
This was missed on stm32, but is helpful for servod
to work reliably.
BUG=b:77830536
TEST=it waits 10 sec for external reboot.
Change-Id: Ic4c905846c41b43f3b8542d70e021744716bd0c2
Signed-off-by: Nick Sanders <nsanders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1004437
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Scott Collyer <scollyer@chromium.org> |
136,274 | 03.04.2018 20:01:13 | 25,200 | 2dcd5c19c1b4fe49c7cfd82bee9df3105ddf73d0 | flash_ec: add more verbose options
Print stm32mon command in verbose mode.
BRANCH=None
TEST=it prints
Commit-Ready: Nick Sanders
Tested-by: Nick Sanders | [
{
"change_type": "MODIFY",
"old_path": "util/flash_ec",
"new_path": "util/flash_ec",
"diff": "@@ -798,8 +798,12 @@ function flash_stm32() {\nec_reset\nfi\n# Unprotect flash, erase, and write\n+ STM32MON_COMMAND=\"${STM32MON} -d ${EC_UART} -U -u -e -w\"\n+ if [ \"${FLAGS_verbose}\" = ${FLAGS_TRUE} ];... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | flash_ec: add more verbose options
Print stm32mon command in verbose mode.
BUG=None
BRANCH=None
TEST=it prints
Signed-off-by: Nick Sanders <nsanders@chromium.org>
Change-Id: I4b31d1212c139f64e34e92fa0def662202aa3b41
Reviewed-on: https://chromium-review.googlesource.com/1004436
Commit-Ready: Nick Sanders <nsanders@chromium.org>
Tested-by: Nick Sanders <nsanders@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,256 | 11.04.2018 16:37:12 | 21,600 | 4338ec527cc839958ca801d2919ab53250fe7913 | cbi: always refersh data for cbi ec command
Also updated the description of the cbi command in help
BRANCH=none
TEST=wrote directly to flash and verified the cbi command updated | [
{
"change_type": "MODIFY",
"old_path": "common/cbi.c",
"new_path": "common/cbi.c",
"diff": "@@ -310,7 +310,7 @@ DECLARE_HOST_COMMAND(EC_CMD_SET_CROS_BOARD_INFO,\nhc_cbi_set,\nEC_VER_MASK(0));\n-static void dump_cbi(void)\n+static void dump_flash(void)\n{\nuint8_t buf[16];\nint i;\n@@ -326,32 +326,41... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cbi: always refersh data for cbi ec command
Also updated the description of the cbi command in help
BRANCH=none
BUG=none
TEST=wrote directly to flash and verified the cbi command updated
Change-Id: I54b5d995a0f06b9566622a5079da11ce575fb309
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1008831
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,405 | 19.03.2018 22:10:03 | 25,200 | 36ce967fce6d53c12b86a278d545cc41c1145ee4 | Nami: Enable Analogix USB-C port
Auto-toggling is currently disabled due to b/77544959.
CQ-DEPEND=CL:988414
BRANCH=none
TEST=Boot Nami. Verify PD power is negotiated and bettery is charged
with a Zinger through the Analogix port. | [
{
"change_type": "MODIFY",
"old_path": "board/nami/board.c",
"new_path": "board/nami/board.c",
"diff": "#include \"adc.h\"\n#include \"adc_chip.h\"\n+#include \"anx7447.h\"\n#include \"board_config.h\"\n#include \"button.h\"\n#include \"charge_manager.h\"\n#define CPRINTS(format, args...) cprints(CC... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Nami: Enable Analogix USB-C port
Auto-toggling is currently disabled due to b/77544959.
BUG=b:73793947
CQ-DEPEND=CL:988414
BRANCH=none
TEST=Boot Nami. Verify PD power is negotiated and bettery is charged
with a Zinger through the Analogix port.
Change-Id: Ie817883027eb8623a8115aa8194fe4df50c3ce72
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/969989
Reviewed-by: Scott Collyer <scollyer@chromium.org> |
136,377 | 02.04.2018 16:50:49 | 25,200 | c40bb886e92c76547fdd889ff50ef159b5ea5d67 | cr50: add s3 term for rk3399 devices
BRANCH=cr50
TEST=run suspend/resume tests on bob
Commit-Ready: Mary Ruthven
Tested-by: Mary Ruthven | [
{
"change_type": "MODIFY",
"old_path": "board/cr50/board.c",
"new_path": "board/cr50/board.c",
"diff": "@@ -232,7 +232,8 @@ const struct strap_desc strap_regs[] = {\nstatic struct board_cfg board_cfg_table[] = {\n/* SPI Variants: DIOA12 = 1M PD, DIOA6 = 1M PD */\n/* Kevin/Gru: DI0A9 = 5k PD, DIOA1 =... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cr50: add s3 term for rk3399 devices
BUG=b:62200096
BRANCH=cr50
TEST=run suspend/resume tests on bob
Change-Id: Idb249125f5967f6f9c80afbf991998425f9f5005
Signed-off-by: Mary Ruthven <mruthven@google.com>
Reviewed-on: https://chromium-review.googlesource.com/991339
Commit-Ready: Mary Ruthven <mruthven@chromium.org>
Tested-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org> |
136,256 | 17.04.2018 09:24:47 | 21,600 | 2e7e6665b1e712a950eef8ae3d3f64ae0f1d2ec1 | yorp: increase TCPC i2c bus speed
BRANCH=none
TEST=i2cscan and USB-C ports still connect on yorp | [
{
"change_type": "MODIFY",
"old_path": "board/yorp/board.c",
"new_path": "board/yorp/board.c",
"diff": "@@ -114,10 +114,9 @@ BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT);\n/* I2C port map. */\nconst struct i2c_port_t i2c_ports[] = {\n-/* TODO(b/74387239): increase I2C bus speeds... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | yorp: increase TCPC i2c bus speed
BRANCH=none
BUG=b:74387239
TEST=i2cscan and USB-C ports still connect on yorp
Change-Id: Ic76549d6f81536cf02e1aa858a95e67eb528bccd
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1014704
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org> |
136,396 | 17.04.2018 12:01:02 | 25,200 | f929c8202b0ae202971767047a771cf39e423448 | cr50: prepare to release prepvt 0.4.5
BRANCH=cr50
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "util/signer/ec_RW-manifest-dev.json",
"new_path": "util/signer/ec_RW-manifest-dev.json",
"diff": "\"timestamp\": 0,\n\"epoch\": 0, // FWR diversification contributor, 32 bits.\n\"major\": 4, // FW2_HIK_CHAIN counter.\n- \"minor\": 4, // Mostly harmless version... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cr50: prepare to release prepvt 0.4.5
BRANCH=cr50
BUG=none
TEST=none
Change-Id: Ieb8eef7d64ee22a8ba04f0b09f22d04387042b45
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1015631
Reviewed-by: Mary Ruthven <mruthven@chromium.org> |
136,197 | 19.04.2018 09:57:46 | -28,800 | c6ce2208e3b6bf2fd1b51269dfdff4c57139af84 | flash_ec: Fix SERVO_TYPE test
Without this, we see this line when running flash_ec.
util/flash_ec: line 787: [: =~: binary operator expected
These kind of tests require double brackets.
BRANCH=none
TEST=run util/flash_ec using servo_micro on staff. | [
{
"change_type": "MODIFY",
"old_path": "util/flash_ec",
"new_path": "util/flash_ec",
"diff": "@@ -784,7 +784,7 @@ function flash_stm32() {\ninfo \"${MCU} UART pty : ${EC_UART}\"\nclaim_pty ${EC_UART}\n- if ! on_raiden && [ \"${SERVO_TYPE}\" =~ \"servo\" ] ; then\n+ if ! on_raiden && [[ \"${SERVO_TYP... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | flash_ec: Fix SERVO_TYPE test
Without this, we see this line when running flash_ec.
util/flash_ec: line 787: [: =~: binary operator expected
These kind of tests require double brackets.
BUG=b:77825616
BRANCH=none
TEST=run util/flash_ec using servo_micro on staff.
Change-Id: I6baecec2252276ac06992fd2b2e50f74d55805f2
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1018560
Reviewed-by: Mary Ruthven <mruthven@chromium.org> |
136,228 | 18.04.2018 19:03:19 | 25,200 | e5d961ae9673486f905d82a3dc7a85b1a28ef7e3 | stoney: Use chipset_pre_init callback
Similar to intel_x86, move chipset stoney to using chipset_pre_init
callback.
BRANCH=None
TEST=make -j buildall
Commit-Ready: Furquan Shaikh
Tested-by: Furquan Shaikh | [
{
"change_type": "MODIFY",
"old_path": "board/kahlee/board.c",
"new_path": "board/kahlee/board.c",
"diff": "@@ -290,13 +290,6 @@ void board_tcpc_init(void)\n}\nDECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_I2C+1);\n-/* Called by power state machine when transitioning from G3 to S5 */\n-sta... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | stoney: Use chipset_pre_init callback
Similar to intel_x86, move chipset stoney to using chipset_pre_init
callback.
BUG=None
BRANCH=None
TEST=make -j buildall
Change-Id: I995bbda01ec78ecd28c302f269cf15739913ecd9
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1018738
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,427 | 13.04.2018 13:10:45 | 21,600 | a51e6428d897efb72a06670c0c49b6d7a5b05d9f | grunt: Send sensor MKBP events using host event
Add CONFIG_MKBP_EVENT and CONFIG_MKBP_USE_HOST_EVENT
to send sensor events to AP.
BRANCH=none
TEST=view sensors in AIDA64 Android app in ARC++ | [
{
"change_type": "MODIFY",
"old_path": "board/grunt/board.h",
"new_path": "board/grunt/board.h",
"diff": "#ifndef __CROS_EC_BOARD_H\n#define __CROS_EC_BOARD_H\n+/*\n+ * By default, enable all console messages excepted HC, ACPI and event:\n+ * The sensor stack is generating a lot of activity.\n+ */\n... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | grunt: Send sensor MKBP events using host event
Add CONFIG_MKBP_EVENT and CONFIG_MKBP_USE_HOST_EVENT
to send sensor events to AP.
BUG=b:77342604
BRANCH=none
TEST=view sensors in AIDA64 Android app in ARC++
Change-Id: I3687072903d251bccb2cdf7670b0780a906dd22d
Signed-off-by: Edward Hill <ecgh@chromium.org>
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1012457 |
136,226 | 19.04.2018 16:31:13 | 25,200 | 2952045100592b02c13d9498ac7f0351b7fa1d5f | tcpm: Check appropriate NULL pointer for src ctrl
BRANCH=None
TEST=On yorp; make buildall -j
Commit-Ready: Divya Sasidharan
Tested-by: Divya Sasidharan | [
{
"change_type": "MODIFY",
"old_path": "driver/tcpm/tcpm.h",
"new_path": "driver/tcpm/tcpm.h",
"diff": "@@ -154,7 +154,7 @@ static inline int tcpm_set_snk_ctrl(int port, int enable)\nstatic inline int tcpm_set_src_ctrl(int port, int enable)\n{\n- if (tcpc_config[port].drv->set_snk_ctrl != NULL)\n+ i... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | tcpm: Check appropriate NULL pointer for src ctrl
BUG=None
BRANCH=None
TEST=On yorp; make buildall -j
Change-Id: I804f82fd4d3f71080fa2a3ced02dca785a3e9891
Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1020523
Commit-Ready: Divya Sasidharan <divya.s.sasidharan@intel.corp-partner.google.com>
Tested-by: Divya Sasidharan <divya.s.sasidharan@intel.corp-partner.google.com>
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,278 | 19.04.2018 20:00:20 | 25,200 | e09917178de4a3c0cc61f5cbf012a33896fea42e | flash_ec: remove redundant sudo
we were invoking flashrom as "sudo sudo flashrom", so remove
the gratuitous sudo.
BRANCH=none
TEST=used flash_ec to flash atlas
Commit-Ready: Caveh Jalali
Tested-by: Caveh Jalali | [
{
"change_type": "MODIFY",
"old_path": "util/flash_ec",
"new_path": "util/flash_ec",
"diff": "@@ -710,7 +710,7 @@ function flash_flashrom() {\necho \"Running flashrom:\" 1>&2\necho \" ${FLASHROM_CMDLINE}\" 1>&2\nfi\n- SPI_SIZE=$(sudo ${FLASHROM_CMDLINE} 2>/dev/null |\\\n+ SPI_SIZE=$(${FLASHROM_CMDLI... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | flash_ec: remove redundant sudo
we were invoking flashrom as "sudo sudo flashrom", so remove
the gratuitous sudo.
BUG=none
BRANCH=none
TEST=used flash_ec to flash atlas
Change-Id: I420ada94c4b973c8f7efe546670dd04cfbb1b234
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1020782
Commit-Ready: Caveh Jalali <caveh@google.com>
Tested-by: Caveh Jalali <caveh@google.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,230 | 20.04.2018 14:57:58 | 25,200 | 7db9838df5360232a3e81b1a2c5f163eaef3fba6 | power/rk3399: Check aborted suspend for s0s3_usb_wake_power_seq
BRANCH=scarlet
TEST=build kevin and scarlet
Commit-Ready: Philip Chen
Tested-by: Philip Chen | [
{
"change_type": "MODIFY",
"old_path": "power/rk3399.c",
"new_path": "power/rk3399.c",
"diff": "@@ -303,7 +303,11 @@ static int power_seq_run(const struct power_seq_op *power_seq_ops, int op_count)\npower_seq_ops[i].level);\nif (!power_seq_ops[i].delay)\ncontinue;\n- if (power_seq_ops == s0s3_power_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | power/rk3399: Check aborted suspend for s0s3_usb_wake_power_seq
BUG=b:78321971
BRANCH=scarlet
TEST=build kevin and scarlet
Change-Id: I9e0c842cd8f4186147fa8e6d001b1c21ddad7e89
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1022746
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Derek Basehore <dbasehore@chromium.org> |
136,256 | 19.04.2018 11:45:28 | 21,600 | fb712058eec77db78e5355bd1cfab9297570fab5 | bq25703: initial commit for bq25703 driver
BRANCH=none
TEST=building with bip | [
{
"change_type": "MODIFY",
"old_path": "driver/build.mk",
"new_path": "driver/build.mk",
"diff": "@@ -51,6 +51,7 @@ driver-$(CONFIG_CHARGER_BQ24735)+=charger/bq24735.o\ndriver-$(CONFIG_CHARGER_BQ24738)+=charger/bq24738.o\ndriver-$(CONFIG_CHARGER_BQ24770)+=charger/bq24773.o\ndriver-$(CONFIG_CHARGER_B... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | bq25703: initial commit for bq25703 driver
BRANCH=none
BUG=b:76429930
TEST=building with bip
Change-Id: Ibed206e1e0b578b3a4b70709509a7288284fc23b
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1019606
Reviewed-by: Justin TerAvest <teravest@chromium.org> |
136,256 | 23.04.2018 12:53:20 | 21,600 | 6b57b4b3900c81bd652e51839b1499025bbdfac4 | ps8751: add note to revert vbus detection workaround
Once the PS8751 has new firmware, it will be able to detect VBus
at the appropriate time. After that, we can go back to using the
cached version of Vbus detection.
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "driver/tcpm/ps8xxx.c",
"new_path": "driver/tcpm/ps8xxx.c",
"diff": "@@ -95,8 +95,11 @@ int ps8xxx_tcpc_get_fw_version(int port, int *version)\n#ifdef CONFIG_USB_PD_VBUS_DETECT_TCPC\n/*\n* Read Vbus level directly instead of using the cached version because som... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | ps8751: add note to revert vbus detection workaround
Once the PS8751 has new firmware, it will be able to detect VBus
at the appropriate time. After that, we can go back to using the
cached version of Vbus detection.
BRANCH=none
BUG=b:77639399
TEST=none
Change-Id: I691919f3bd2479a131aa58763c7906cb4f6919ff
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1024531 |
136,230 | 23.04.2018 19:56:26 | 25,200 | c4778cb4c467fecc4ab4c821197285de5842579e | usb_mux: Simplify logging to reduce code size
BRANCH=none
TEST=make buildall
Commit-Ready: Philip Chen
Tested-by: Philip Chen | [
{
"change_type": "MODIFY",
"old_path": "driver/usb_mux.c",
"new_path": "driver/usb_mux.c",
"diff": "@@ -24,7 +24,7 @@ void usb_mux_init(int port)\nASSERT(port >= 0 && port < CONFIG_USB_PD_PORT_COUNT);\nres = mux->driver->init(mux->port_addr);\nif (res)\n- CPRINTS(\"Error initializing mux port(%d): %... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | usb_mux: Simplify logging to reduce code size
BUG=none
BRANCH=none
TEST=make buildall
Change-Id: Ib2d9476e4740527ad2e1f73eeecb0306140b3f38
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1025118
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> |
136,256 | 23.04.2018 09:53:46 | 21,600 | 21f26e25b1b53fb3c60ba44ad1ec31b07096ea5a | bip: use ITE as TCPC driver for C1
The PS8751 is only being used as mux with the option of
being a TCPC is we stuff resistor on the subboard. The
default resistor configuration uses ITE EC as C1 TCPC.
BRANCH=NONE
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "board/bip/board.c",
"new_path": "board/bip/board.c",
"diff": "@@ -99,21 +99,20 @@ const struct i2c_port_t i2c_ports[] = {\n};\nconst unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);\n-#define USB_PD_PORT_0_ITE 0\n-#define USB_PD_PORT_1_PS8751 1\n+#define U... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | bip: use ITE as TCPC driver for C1
The PS8751 is only being used as mux with the option of
being a TCPC is we stuff resistor on the subboard. The
default resistor configuration uses ITE EC as C1 TCPC.
BRANCH=NONE
BUG=b:78341944
TEST=none
Change-Id: I4ccad314fa7eec0d205a155e42e52109cff5811f
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1024487 |
136,256 | 23.04.2018 15:30:54 | 21,600 | d5e01f07d46e3a25c9906d1b99e180c39a13b51c | bip: add cbi board version
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "board/bip/board.h",
"new_path": "board/bip/board.h",
"diff": "#define CONFIG_VBOOT_HASH\n#define CONFIG_VSTORE\n#define CONFIG_VSTORE_SLOT_COUNT 1\n+#define CONFIG_CRC8\n+#define CONFIG_CROS_BOARD_INFO\n+#define CONFIG_BOARD_VERSION_CBI\n/* Charger Configurati... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | bip: add cbi board version
BRANCH=none
BUG=b:78473271
TEST=none
Change-Id: Ic7b500ed33b884c59036c41b9ce3e7925637ee69
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1024962
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,377 | 23.04.2018 16:55:48 | 25,200 | 9b6fdcc0a4c089d703c11e3edff3f8a2e23ee93e | flash_ec: fix handling ccd controls
BRANCH=none
TEST=use ccd uut to flash meowth and ccd bitbang to flash scarlet
Commit-Ready: Mary Ruthven
Tested-by: Mary Ruthven | [
{
"change_type": "MODIFY",
"old_path": "util/flash_ec",
"new_path": "util/flash_ec",
"diff": "@@ -331,8 +331,8 @@ toad_ec_boot0() {\n}\nccd_ec_boot0() {\n- info \"Using CCD.\"\n- dut_control ccd_ec_boot_mode:on\n+ info \"Using CCD $1.\"\n+ dut_control ccd_ec_boot_mode_$1:on\n}\nservo_ec_boot0() {\n@... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | flash_ec: fix handling ccd controls
BUG=none
BRANCH=none
TEST=use ccd uut to flash meowth and ccd bitbang to flash scarlet
Change-Id: I83ba0c82f66b698d4083649637d2f74a85db9bc4
Signed-off-by: Mary Ruthven <mruthven@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1025265
Commit-Ready: Mary Ruthven <mruthven@chromium.org>
Tested-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,256 | 20.04.2018 09:38:15 | 21,600 | 3d9c424cd720bf97db53cba3a22624596f703103 | bip: set correct AC_PRESENT debouce delay
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "board/bip/board.h",
"new_path": "board/bip/board.h",
"diff": "#define CONFIG_POWER_BUTTON\n#define CONFIG_POWER_BUTTON_X86\n#define CONFIG_EXTPOWER_GPIO\n-/* TODO(b/75974377), increase CONFIG_EXTPOWER_DEBOUNCE_MS from 30 to 1000? */\n+\n+/*\n+ * From BQ25703: ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | bip: set correct AC_PRESENT debouce delay
BRANCH=none
BUG=b:75974377
TEST=none
Change-Id: Ib6fcc0ac7668614a487525196ea4f3a5f399c640
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1024278
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org> |
136,274 | 18.04.2018 20:26:50 | 25,200 | 805b9850a6402d56e3671e3cb1d5abd9cd68dd50 | it83xx: implement reboot wait-ext
This was missed on it83xx, but is helpful for servod
to work reliably. Refactor save_flags to use common code.
TEST=(not yet done) it waits 10 sec for external reboot.
Tested-by: Dino Li | [
{
"change_type": "MODIFY",
"old_path": "chip/it83xx/system.c",
"new_path": "chip/it83xx/system.c",
"diff": "@@ -120,18 +120,8 @@ void system_reset(int flags)\n/* Disable interrupts to avoid task swaps during reboot. */\ninterrupt_disable();\n- /* Save current reset reasons if necessary */\n- if (fla... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | it83xx: implement reboot wait-ext
This was missed on it83xx, but is helpful for servod
to work reliably. Refactor save_flags to use common code.
BUG=b:77830536
TEST=(not yet done) it waits 10 sec for external reboot.
Change-Id: Ia2aac1879d73ac11dd7f3dfc13a1dd871905473e
Signed-off-by: Nick Sanders <nsanders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1018597
Tested-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,256 | 24.04.2018 11:55:54 | 21,600 | 6e7193c4587c13d69e8f4990252623284e84893f | bq25793: add hw ramp support
BRANCH=none
TEST=build with bip | [
{
"change_type": "MODIFY",
"old_path": "driver/charger/bq25703.c",
"new_path": "driver/charger/bq25703.c",
"diff": "#include \"common.h\"\n#include \"console.h\"\n#include \"i2c.h\"\n+#include \"timer.h\"\n/* Sense resistor configurations and macros */\n#define DEFAULT_SENSE_RESISTOR 10\n@@ -220,3 +... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | bq25793: add hw ramp support
BRANCH=none
BUG=b:76429930
TEST=build with bip
Change-Id: I03da263ad0f751487ab0d807d0cc659bd8f2b2c8
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1024596
Reviewed-by: Scott Collyer <scollyer@chromium.org> |
136,429 | 21.02.2018 11:23:27 | 28,800 | 826a3876b4f3ecd5f73d2320ee1e853a789e6e30 | Cr50: Add VENDOR_CC_PINWEAVER vendor command.
This connects the pinweaver code to the tpm vendor
specific command code.
CQ-DEPEND=CL:895395
BRANCH=none
TEST=TBD | [
{
"change_type": "MODIFY",
"old_path": "common/pinweaver.c",
"new_path": "common/pinweaver.c",
"diff": "#include <common.h>\n#include <console.h>\n#include <dcrypto.h>\n+#include <extension.h>\n+#include <hooks.h>\n#include <pinweaver.h>\n#include <pinweaver_tpm_imports.h>\n#include <pinweaver_types... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Cr50: Add VENDOR_CC_PINWEAVER vendor command.
This connects the pinweaver code to the tpm vendor
specific command code.
CQ-DEPEND=CL:895395
BRANCH=none
BUG=chromium:809741
TEST=TBD
Change-Id: I2a6c4bf52ad77b7bf0395095404e925e1dd48dbc
Signed-off-by: Allen Webb <allenwebb@google.com>
Reviewed-on: https://chromium-review.googlesource.com/929430
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> |
136,256 | 16.04.2018 12:46:33 | 21,600 | 86ab7efb58025601b7799eedee29ba9d9d5f10a6 | tcpci: reset TCPC if alert mask is reset
The PS8751 TCPC expresses that it has been reset by resetting the
alert mask. Handle its re-init case.
BRANCH=none
TEST=Verify that TCPC is reset on yorp C1 after reinsertion | [
{
"change_type": "MODIFY",
"old_path": "driver/tcpm/tcpci.c",
"new_path": "driver/tcpm/tcpci.c",
"diff": "@@ -288,12 +288,37 @@ int tcpci_tcpm_transmit(int port, enum tcpm_transmit_type type,\nreturn rv;\n}\n+/* Returns true if TCPC has reset based on reading mask registers. */\n+static int register... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | tcpci: reset TCPC if alert mask is reset
The PS8751 TCPC expresses that it has been reset by resetting the
alert mask. Handle its re-init case.
BRANCH=none
BUG=b:77551454,b:77639399
TEST=Verify that TCPC is reset on yorp C1 after reinsertion
Change-Id: Ie1a819a3627a1225c3fad65a60a4aca126a69f53
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1014355
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,256 | 19.04.2018 11:49:53 | 21,600 | bbb5edb220834dc563893311fc371526087af708 | bip: add correct charger driver
BRANCH=none
TEST=buildall | [
{
"change_type": "MODIFY",
"old_path": "board/bip/board.h",
"new_path": "board/bip/board.h",
"diff": "#define CONFIG_CHARGE_RAMP_HW\n#define CONFIG_CHARGER\n#define CONFIG_CHARGER_V2\n- /* TODO(b/76429930): Use correct driver below after writing BQ25703 driver */\n-#define CONFIG_CHARGER_ISL9238\n+#... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | bip: add correct charger driver
BRANCH=none
BUG=b:76429930
TEST=buildall
Change-Id: I6d318ad80911e564dda67ba542899ecc42068276
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1019607 |
136,228 | 26.04.2018 18:32:46 | 25,200 | a26cdd08128a33a7cd39ce59d89e6e79d88e4260 | nautilus: Enable usb device mode
BRANCH=poppy
TEST=Verified following:
1. ectool usbpd 0 dr_swap
2. ectool usbpd 0
> Role: SNK UFP
Commit-Ready: Furquan Shaikh
Tested-by: Furquan Shaikh | [
{
"change_type": "MODIFY",
"old_path": "board/nautilus/usb_pd_policy.c",
"new_path": "board/nautilus/usb_pd_policy.c",
"diff": "@@ -189,7 +189,14 @@ int pd_check_vconn_swap(int port)\nvoid pd_execute_data_swap(int port, int data_role)\n{\n- /* Do nothing */\n+ /* Only port 0 supports device mode. */... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | nautilus: Enable usb device mode
BUG=b:78649985
BRANCH=poppy
TEST=Verified following:
1. ectool usbpd 0 dr_swap
2. ectool usbpd 0
--> Role: SNK UFP
Change-Id: I10addb4936eab169655c1d11f115740da139a14e
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1031109
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@google.com> |
136,256 | 01.05.2018 10:47:35 | 21,600 | 8476a6695dec25898033f9808ed365a79201f9d3 | usb mux: add comment describing mux_state_t
It is a combination of flags and also represents typec_mux enum.
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "include/usb_mux.h",
"new_path": "include/usb_mux.h",
"diff": "#include \"usb_charge.h\"\n#include \"usb_pd.h\"\n-/* USB-C mux state */\n+/*\n+ * USB-C mux state\n+ *\n+ * A bitwise combination of the USB_PD_MUX_* flags.\n+ * The bottom 2 bits also correspond t... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | usb mux: add comment describing mux_state_t
It is a combination of flags and also represents typec_mux enum.
BRANCH=none
BUG=none
TEST=none
Change-Id: Ib44f41af6c99f62d76fe29230c82b64537ff0665
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1037423
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,256 | 01.05.2018 14:03:16 | 21,600 | 696536faab1d85d6377641c4a37c4c8bb95d7b7a | yorp: enable low power mode on EC
BRANCH=none
TEST=builds. Still needs more verification for low power mode | [
{
"change_type": "MODIFY",
"old_path": "board/yorp/board.h",
"new_path": "board/yorp/board.h",
"diff": "#define CONFIG_BOARD_VERSION_CBI\n#define CONFIG_CRC8\n#define CONFIG_CROS_BOARD_INFO\n+#define CONFIG_LOW_POWER_IDLE\n+\n/* Keyboard */\n#define CONFIG_CMD_KEYBOARD\n#define CONFIG_KEYBOARD_BOARD... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | yorp: enable low power mode on EC
BRANCH=none
BUG=b:78497503
TEST=builds. Still needs more verification for low power mode
Change-Id: Idab7a1577e4d99edc29d55ad4f99a662d9419c12
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1038896
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.corp-partner.google.com> |
136,256 | 02.05.2018 09:25:00 | 21,600 | 2efff2146cbe1f2f7b63012cf95aaf1d86f02f38 | bip: add keyboard functionality
BRANCH=none
TEST=builds | [
{
"change_type": "MODIFY",
"old_path": "board/bip/board.c",
"new_path": "board/bip/board.c",
"diff": "@@ -175,6 +175,28 @@ const int usb_port_enable[USB_PORT_COUNT] = {\nGPIO_EN_USB_A1_5V,\n};\n+/******************************************************************************/\n+/* Keyboard scan setti... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | bip: add keyboard functionality
BRANCH=none
BUG=none
TEST=builds
Change-Id: Iaea766ab55a4d55cb3df5254b55ee460a820f55d
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1039872
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.corp-partner.google.com>
Reviewed-by: Justin TerAvest <teravest@chromium.org> |
136,256 | 01.05.2018 14:08:23 | 21,600 | 59b4257fbbf4c0f4958066bc77a6d9ef4c54d6a8 | bip: adding missing common defines
Add common defines in bip before we pull them into baseboard
to ensure that the diff of the move is clean.
BRANCH=none
TEST=bip builds. | [
{
"change_type": "MODIFY",
"old_path": "board/bip/board.h",
"new_path": "board/bip/board.h",
"diff": "/* Optional features */\n#define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands while in dev. */\n+#define CONFIG_CMD_PPC_DUMP\n/* ITE Config */\n#define CONFIG_IT83XX_FLASH_CLOCK_48MHZ /* Flash... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | bip: adding missing common defines
Add common defines in bip before we pull them into baseboard
to ensure that the diff of the move is clean.
BRANCH=none
BUG=none
TEST=bip builds.
Change-Id: I06333f2b1ad5d2d7bd057e5e8cd459199393ce1d
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1038897
Reviewed-by: Furquan Shaikh <furquan@chromium.org> |
136,256 | 01.05.2018 11:38:09 | 21,600 | 2c7d0bad3755383e1a849b18e373c2618611a267 | build: add build option to print configs
This is used verify moving define from board to baseboard
is a no-op
BRANCH=none
TEST=make BOARD=yorp print-configs works | [
{
"change_type": "MODIFY",
"old_path": "Makefile.rules",
"new_path": "Makefile.rules",
"diff": "@@ -467,6 +467,21 @@ flash_dfu: $(out)/ec.bin\nprint-baseboard:\n@echo \"${BASEBOARD}\"\n+.PHONY: print-configs\n+print-configs:\n+ @echo \"----------------------------------------------------------------... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | build: add build option to print configs
This is used verify moving define from board to baseboard
is a no-op
BRANCH=none
BUG=none
TEST=make BOARD=yorp print-configs works
Change-Id: I6868e9ee9e52cd80791df734961d380bbe95bd1e
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1038895
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org> |
136,256 | 02.05.2018 10:34:13 | 21,600 | f24dc485fef065ef6298d8b94fdee11a982e8564 | octopus: move common function to baseboard
Move common variables and functions to baseboard from yorp and bip
BRANCH=none
TEST=builds | [
{
"change_type": "MODIFY",
"old_path": "baseboard/octopus/baseboard.c",
"new_path": "baseboard/octopus/baseboard.c",
"diff": "/* Octopus family-specific configuration */\n-#include \"common.h\"\n-#include \"console.h\"\n#include \"charge_manager.h\"\n#include \"charge_state.h\"\n+#include \"common.h... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | octopus: move common function to baseboard
Move common variables and functions to baseboard from yorp and bip
BRANCH=none
BUG=none
TEST=builds
Change-Id: Ic74bec45f4ff6c833e4ef0620380f21b2ed6a041
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1040107
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.corp-partner.google.com> |
136,396 | 01.05.2018 16:53:55 | 25,200 | 5b6381713b4c120e9fda7d0fb13b41225f1dc6a6 | cr50: prepare to release prepvt 0.4.6
BRANCH=none
TEST=mnone | [
{
"change_type": "MODIFY",
"old_path": "util/signer/ec_RW-manifest-dev.json",
"new_path": "util/signer/ec_RW-manifest-dev.json",
"diff": "\"timestamp\": 0,\n\"epoch\": 0, // FWR diversification contributor, 32 bits.\n\"major\": 4, // FW2_HIK_CHAIN counter.\n- \"minor\": 5, // Mostly harmless version... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cr50: prepare to release prepvt 0.4.6
BRANCH=none
BUG=none
TEST=mnone
Change-Id: Icf5a2069fcdc8908711af6592886a39236c8beab
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1038761
Reviewed-by: Mary Ruthven <mruthven@chromium.org> |
136,338 | 01.05.2018 14:30:52 | 21,600 | c44f56739a671b188081979d159638f107b281d9 | ec: Add .clang-format
Copied from coreboot.
BRANCH=none
TEST=Tried formatting a few lines. | [
{
"change_type": "ADD",
"old_path": null,
"new_path": ".clang-format",
"diff": "+BasedOnStyle: LLVM\n+Language: Cpp\n+IndentWidth: 8\n+UseTab: Always\n+BreakBeforeBraces: Linux\n+AllowShortIfStatementsOnASingleLine: false\n+IndentCaseLabels: false\n+SortIncludes: false\n+ContinuationIndentWidth: 8\n... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | ec: Add .clang-format
Copied from coreboot.
BUG=none
BRANCH=none
TEST=Tried formatting a few lines.
Change-Id: Iff9e6970cb8d725834f5f1f0c6447b62568a6f09
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1038156
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,338 | 27.04.2018 15:55:42 | 21,600 | 585d33e5d9ac9e61fcb826b5453e7245b5a40757 | ectool: Add hibernate-clear-ap-off command
Allows for: ectool reboot_ec hibernate-clear-ap-off
TEST=Built and tested on grunt
BRANCH=none | [
{
"change_type": "MODIFY",
"old_path": "util/ectool.c",
"new_path": "util/ectool.c",
"diff": "@@ -210,7 +210,7 @@ const char help_str[] =\n\" Set 16 bit duty cycle of given PWM\\n\"\n\" readtest <patternoffset> <size>\\n\"\n\" Reads a pattern from the EC via LPC\\n\"\n- \" reboot_ec <RO|RW|cold|hibe... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | ectool: Add hibernate-clear-ap-off command
Allows for: ectool reboot_ec hibernate-clear-ap-off
TEST=Built and tested on grunt
BRANCH=none
BUG=b:73825078
Change-Id: Ia05f9c2db9e7b699882fdec61aaa9fb67b2e097d
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1033926
Reviewed-by: Edward Hill <ecgh@chromium.org> |
136,312 | 01.05.2018 16:22:47 | 25,200 | afb5e282ac7af5af053b427bdaa40c661fe0ca2d | PRESUBMIT: give real names
BRANCH=none
TEST=upload | [
{
"change_type": "MODIFY",
"old_path": "PRESUBMIT.cfg",
"new_path": "PRESUBMIT.cfg",
"diff": "@@ -10,6 +10,6 @@ tab_check: false\ncheckpatch_check: --no-tree --ignore=MSLEEP,VOLATILE\n[Hook Scripts]\n-hook0 = util/presubmit_check.sh 2>&1\n-hook1 = util/config_option_check.py 2>&1\n-hook2 = util/host... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | PRESUBMIT: give real names
BRANCH=none
BUG=none
TEST=upload
Change-Id: Ied1474ebc347d994a209b31d0dc715318bd2a192
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1038730 |
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