author int64 658 755k | date stringlengths 19 19 | timezone int64 -46,800 43.2k | hash stringlengths 40 40 | message stringlengths 5 490 | mods list | language stringclasses 20 values | license stringclasses 3 values | repo stringlengths 5 68 | original_message stringlengths 12 491 |
|---|---|---|---|---|---|---|---|---|---|
136,312 | 01.05.2018 16:01:54 | 25,200 | db55f6866bc33f740761f642c2b0138f4dd6fa2d | ectool: add 'kbinfo' command
We might use this in the kernel, so it's nice to have a diagnostic
command for it too.
BRANCH=none
TEST=`ectool kbinfo` on kevin and scarlet | [
{
"change_type": "MODIFY",
"old_path": "util/ectool.c",
"new_path": "util/ectool.c",
"diff": "@@ -156,6 +156,8 @@ const char help_str[] =\n\" Get info about USB type-C accessory attached to port\\n\"\n\" inventory\\n\"\n\" Return the list of supported features\\n\"\n+ \" kbinfo\\n\"\n+ \" Dump keybo... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | ectool: add 'kbinfo' command
We might use this in the kernel, so it's nice to have a diagnostic
command for it too.
BRANCH=none
BUG=chromium:836279
TEST=`ectool kbinfo` on kevin and scarlet
Change-Id: I746badf0d2be53d471592a2ca0d7b8ff8070f7a1
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1038729
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,407 | 03.05.2018 15:48:12 | 25,200 | be54bb9a9c2be4ab926f7ca9bd4fe7303aea5c98 | nocturne: Only power base when AP is on.
BRANCH=None
TEST=make -j BOARD=nocturne
Commit-Ready: Aseda Aboagye
Tested-by: Aseda Aboagye | [
{
"change_type": "MODIFY",
"old_path": "board/nocturne/base_detect.c",
"new_path": "board/nocturne/base_detect.c",
"diff": "*/\n#include \"adc.h\"\n+#include \"chipset.h\"\n#include \"common.h\"\n#include \"console.h\"\n#include \"gpio.h\"\n@@ -57,13 +58,23 @@ enum base_detect_state {\nstatic int de... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | nocturne: Only power base when AP is on.
BUG=None
BRANCH=None
TEST=make -j BOARD=nocturne
Change-Id: I4492498b710e4e0f4a1682e4353f993013131c7f
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1043346
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org> |
136,226 | 02.05.2018 16:56:11 | 25,200 | 0f54e5dd5a0a6dfd4f12681aa3552c66c1e3ad28 | yorp: Add support for SONY battery
BRANCH=None
TEST=make buildall -j; connect SONY battery
and test if recognized on battery UI icon in OS.
Commit-Ready: Divya S Sasidharan
Tested-by: Wenkai Du | [
{
"change_type": "MODIFY",
"old_path": "board/yorp/battery.c",
"new_path": "board/yorp/battery.c",
"diff": "@@ -117,6 +117,34 @@ const struct board_batt_params board_battery_info[] = {\n.discharging_max_c = 60,\n},\n},\n+\n+ /* Sony Ap13J4K Battery Information */\n+ [BATTERY_SONY] = {\n+ .fuel_gauge... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | yorp: Add support for SONY battery
BUG=b:78906183
BRANCH=None
TEST=make buildall -j; connect SONY battery
and test if recognized on battery UI icon in OS.
Change-Id: I15c7a9611c10de425f3ca34f7f8f737c65e47275
Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1041159
Commit-Ready: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Tested-by: Wenkai Du <wenkai.du@intel.com>
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,256 | 02.05.2018 14:02:37 | 21,600 | a6e394276036e70610d7c5ef8c65273f3176f34f | octopus: remove pwm code for LEDs
We are using LED as straight GPIO signals so remove pwm for now
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "board/bip/board.h",
"new_path": "board/bip/board.h",
"diff": "@@ -27,11 +27,6 @@ enum adc_channel {\nADC_CH_COUNT\n};\n-/* TODO(b/75972988): Fill out correctly */\n-enum pwm_channel {\n- PWM_CH_COUNT\n-};\n-\n/* List of possible batteries */\nenum battery_type... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | octopus: remove pwm code for LEDs
We are using LED as straight GPIO signals so remove pwm for now
BRANCH=none
BUG=none
TEST=none
Change-Id: I48b316b6df023217a7cc1bed7a741f72d1388026
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1042728
Reviewed-by: Furquan Shaikh <furquan@chromium.org> |
136,256 | 02.05.2018 15:41:51 | 21,600 | 52848179d20e1abd98ad5c3feab2ee319ddbffcc | octopus: move more implementation to baseboard
Move driver configuration to baseboard in preparation for phaser board
BRANCH=none
TEST=yorp still works | [
{
"change_type": "MODIFY",
"old_path": "Makefile",
"new_path": "Makefile",
"diff": "@@ -125,12 +125,14 @@ CPPFLAGS_RW+=$(foreach t,$(_tsk_cfg_rw),-D$(t)) \\\n$(foreach t,$(_tsk_cfg_ro),-D$(t)_RO)\nCPPFLAGS+=$(foreach t,$(_tsk_cfg),-D$(t))\n+# Get the CONFIG_ and VARIANT_ options that are defined for... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | octopus: move more implementation to baseboard
Move driver configuration to baseboard in preparation for phaser board
BRANCH=none
BUG=none
TEST=yorp still works
Change-Id: Ifeb434d2d4103160acd6eb9f784533d1ae0ae35a
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1042729
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org> |
136,409 | 30.04.2018 09:37:00 | 25,200 | 756141d6b92b0cffe7fca4226f096151af149bee | eve: Limit data role swap to port 0
Only USB port 0 is capable of device mode, so ignore data role
swaps to other ports.
BRANCH=eve
TEST=manual: ensure OTG pins are not asserted with data role swap
on port 1. | [
{
"change_type": "MODIFY",
"old_path": "board/eve/usb_pd_policy.c",
"new_path": "board/eve/usb_pd_policy.c",
"diff": "@@ -191,6 +191,10 @@ int pd_check_vconn_swap(int port)\nvoid pd_execute_data_swap(int port, int data_role)\n{\n+ /* Only port 0 supports device mode. */\n+ if (port != 0)\n+ return;\... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | eve: Limit data role swap to port 0
Only USB port 0 is capable of device mode, so ignore data role
swaps to other ports.
BUG=b:78308749
BRANCH=eve
TEST=manual: ensure OTG pins are not asserted with data role swap
on port 1.
Change-Id: I07a331af11c3ce599a75517a5ba0ff2716987545
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1035424
Reviewed-by: Furquan Shaikh <furquan@chromium.org> |
136,256 | 07.05.2018 13:37:30 | 21,600 | 52726d7f7f6948626f2481e999afc9aa5246166b | anx7447: remove write to OCM version reg
When we write a 0 to the register it actually prevents
future calls from correctly determining if the OCM is
present.
BRANCH=none
TEST=board with OCM still reports ocm after multiple anx_ocm 0 calls | [
{
"change_type": "MODIFY",
"old_path": "driver/tcpm/anx7447.c",
"new_path": "driver/tcpm/anx7447.c",
"diff": "@@ -170,7 +170,6 @@ static int anx7447_flash_is_empty(int port)\nint r;\nanx7447_reg_read(port, ANX7447_REG_OCM_VERSION, &r);\n- anx7447_reg_write(port, ANX7447_REG_OCM_VERSION, 0);\nreturn ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | anx7447: remove write to OCM version reg
When we write a 0 to the register it actually prevents
future calls from correctly determining if the OCM is
present.
BRANCH=none
BUG=b:79123179
TEST=board with OCM still reports ocm after multiple anx_ocm 0 calls
Change-Id: I3899e8999483518fb42ddbd044d29e32fc3380f3
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1047830
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,256 | 30.04.2018 12:56:53 | 21,600 | 0385f2fefd5ffecbaf738c7a7d8e93a5580c17fc | phaser: initial files commit
BRANCH=none
TEST=build | [
{
"change_type": "ADD",
"old_path": null,
"new_path": "board/phaser/battery.c",
"diff": "+/* Copyright 2018 The Chromium OS Authors. All rights reserved.\n+ * Use of this source code is governed by a BSD-style license that can be\n+ * found in the LICENSE file.\n+ *\n+ * Battery pack vendor provided... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | phaser: initial files commit
BRANCH=none
BUG=b:78770036
TEST=build
Change-Id: I10ce1cc0196bc1e9b7d892834351bb9b3d27e3e1
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1042730
Reviewed-by: Scott Collyer <scollyer@chromium.org> |
136,230 | 08.05.2018 19:36:48 | 25,200 | aa6382fe6666b08a3a285dead36858138a8ab490 | charger/rt946x: Fix macro coding style
BRANCH=scarlet
TEST=buildall
Commit-Ready: Philip Chen
Tested-by: Philip Chen | [
{
"change_type": "MODIFY",
"old_path": "driver/charger/rt946x.h",
"new_path": "driver/charger/rt946x.h",
"diff": "#define RT946X_MASK_SHIP_MODE (1 << RT946X_SHIFT_SHIP_MODE)\n#define RT946X_MASK_TE (1 << RT946X_SHIFT_TE)\n-#define RT946X_MASK_ILMTSEL 0x0C\n+#define RT946X_MASK_ILMTSEL (0x3 << RT946X... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | charger/rt946x: Fix macro coding style
BUG=none
BRANCH=scarlet
TEST=buildall
Change-Id: I2f1d11156b7d14dbe1865cd7807c5bc1b769255e
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1050988
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: David Schneider <dnschneid@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> |
136,274 | 08.05.2018 17:02:38 | 25,200 | 1356a1a5b747bb9159e8e71db03a9f93a196b245 | usb_updater2: match by serial number
Add a serial number match to allow update of servo or
other usb devices, where mutliple devices may be attached
to one system.
BRANCH=None
TEST=usb_updater2 -d 18d1:501b --serial=[C1706311869|fail] | [
{
"change_type": "MODIFY",
"old_path": "extra/usb_updater/usb_updater2.c",
"new_path": "extra/usb_updater/usb_updater2.c",
"diff": "@@ -72,7 +72,7 @@ static struct first_response_pdu targ;\nstatic uint16_t protocol_version;\nstatic uint16_t header_type;\nstatic char *progname;\n-static char *short_o... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | usb_updater2: match by serial number
Add a serial number match to allow update of servo or
other usb devices, where mutliple devices may be attached
to one system.
BRANCH=None
BUG=chromium:718688
TEST=usb_updater2 -d 18d1:501b --serial=[C1706311869|fail]
Signed-off-by: Nick Sanders <nsanders@chromium.org>
Change-Id: Id6ec944139e685948433af703555fd185e91a9d4
Reviewed-on: https://chromium-review.googlesource.com/1050971
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> |
136,256 | 09.05.2018 16:20:47 | 21,600 | ec1428f96dd750d20047b6b1c4a72e270d71682e | yorp: increase current limit
We need to increase our current limit so we don't trip when we are right
at 3.0A.
BRANCH=none
TEST=yorp can now source 3A | [
{
"change_type": "MODIFY",
"old_path": "driver/ppc/nx20p3483.c",
"new_path": "driver/ppc/nx20p3483.c",
"diff": "@@ -88,9 +88,11 @@ static int nx20p3483_set_vbus_source_current_limit(int port,\nreturn status;\nregval &= ~NX20P3483_ILIM_MASK;\n+\n+ /* We need buffer room for all current values. */\nsw... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | yorp: increase current limit
We need to increase our current limit so we don't trip when we are right
at 3.0A.
BRANCH=none
BUG=b:79482290
TEST=yorp can now source 3A
Change-Id: If90af7e6eeaf90d3bd0ac67462e94523d2348a0a
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1053238
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Scott Collyer <scollyer@chromium.org> |
136,400 | 05.05.2018 13:45:07 | -7,200 | e4b718df7a3fbf320fc867844699e60e908d6c20 | charge_manager: fix possible out of bound read access
The port id given by the kernel is never checked and out-of-bound
read accesses can be made on available_charge. Fix it. | [
{
"change_type": "MODIFY",
"old_path": "common/charge_manager.c",
"new_path": "common/charge_manager.c",
"diff": "@@ -1079,6 +1079,9 @@ static int hc_pd_power_info(struct host_cmd_handler_args *args)\nif (port == PD_POWER_CHARGING_PORT)\nport = charge_port;\n+ if (port >= CHARGE_PORT_COUNT)\n+ retur... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | charge_manager: fix possible out of bound read access
The port id given by the kernel is never checked and out-of-bound
read accesses can be made on available_charge. Fix it.
Change-Id: I06ed3d28c30db77d8256e9af808484a7cbdc901e
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-on: https://chromium-review.googlesource.com/1046592
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,421 | 08.05.2018 06:35:59 | -7,200 | 6415c19415738cea4d0df1b827e573954be12d8a | CEC: Group ectool subcommands under "ectool cec"
Instead of e.g. "ectool cecwrite", use "ectool cec write" to
not clutter the command list.
BRANCH=none
TEST=Run "cec read/write/get/set" and make sure they still
work.
CQ-DEPEND=CL:1030218 | [
{
"change_type": "MODIFY",
"old_path": "util/ectool.c",
"new_path": "util/ectool.c",
"diff": "@@ -76,14 +76,8 @@ const char help_str[] =\n\" Prints supported version mask for a command number\\n\"\n\" console\\n\"\n\" Prints the last output to the EC debug console\\n\"\n- \" cecset <address|enable> ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | CEC: Group ectool subcommands under "ectool cec"
Instead of e.g. "ectool cecwrite", use "ectool cec write" to
not clutter the command list.
BUG=b:76467407
BRANCH=none
TEST=Run "cec read/write/get/set" and make sure they still
work.
CQ-DEPEND=CL:1030218
Change-Id: Id515782f5a5ff0861fb95ab63c45dc8ab153f0bb
Signed-off-by: Stefan Adolfsson <sadolfsson@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1046185
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,418 | 08.05.2018 14:05:29 | 25,200 | f8e3859a67a4b80eacf74fb1e46f485f20d4d870 | cheza: Disable EC hibernate temporarily
EC can't be waked up once it enters hibernate. Need to figure out the
cause. Disable it temporarily in order not to block others.
BRANCH=none
TEST=Ran "help" on console and not "hibernate" command. | [
{
"change_type": "MODIFY",
"old_path": "board/cheza/board.c",
"new_path": "board/cheza/board.c",
"diff": "@@ -127,14 +127,6 @@ static void ppc_interrupt(enum gpio_signal signal)\nsn5s330_interrupt(port);\n}\n-/* Wake-up pins for hibernate */\n-const enum gpio_signal hibernate_wake_pins[] = {\n- GPIO... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cheza: Disable EC hibernate temporarily
EC can't be waked up once it enters hibernate. Need to figure out the
cause. Disable it temporarily in order not to block others.
BRANCH=none
BUG=b:79348203
TEST=Ran "help" on console and not "hibernate" command.
Change-Id: Ifba2b95df26b03e4389616ebb3fc217bb5a24d54
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1050748
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,274 | 11.05.2018 19:43:54 | 25,200 | 88ffd86551e86bd8c57a10118c9fb6409e503507 | servo_v4: add more stack for PD
C0 PD would occasionally get stack overflow.
Add venti stack.
BRANCH=servo
TEST=no more crash | [
{
"change_type": "MODIFY",
"old_path": "board/servo_v4/ec.tasklist",
"new_path": "board/servo_v4/ec.tasklist",
"diff": "#define CONFIG_TASK_LIST \\\nTASK_ALWAYS(HOOKS, hook_task, NULL, VENTI_TASK_STACK_SIZE) \\\nTASK_ALWAYS(CONSOLE, console_task, NULL, TASK_STACK_SIZE) \\\n- TASK_ALWAYS(PD_C0, pd_ta... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | servo_v4: add more stack for PD
C0 PD would occasionally get stack overflow.
Add venti stack.
BRANCH=servo
BUG=b:79266510
TEST=no more crash
Change-Id: Id1d7174af954b5e5716ba402ae5b993e2971464d
Signed-off-by: Nick Sanders <nsanders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1056488
Reviewed-by: Mary Ruthven <mruthven@chromium.org> |
136,405 | 15.05.2018 10:41:38 | 25,200 | 9e441a5fae9e1bad1350f557e52cffbe17807995 | Nami: Turn off battery LED in S3 for Sona
Sona has a power LED which blinks in S3. So, the battery LED is turned
off.
BRANCH=none
TEST=make BOARD=nami
Commit-Ready: Daisuke Nojiri
Tested-by: Daisuke Nojiri | [
{
"change_type": "MODIFY",
"old_path": "board/nami/led.c",
"new_path": "board/nami/led.c",
"diff": "@@ -115,14 +115,13 @@ const static led_patterns battery_pattern_0 = {\n* Sona - Battery LED (dual color)\n* AC is attached Solid ON White\n* charging Solid ON Amber\n- * Discharge in S0 Off\n+ * Disch... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Nami: Turn off battery LED in S3 for Sona
Sona has a power LED which blinks in S3. So, the battery LED is turned
off.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b:74940319
BRANCH=none
TEST=make BOARD=nami
Change-Id: I9fbe78966806eb2110b57b9d8e471d8d9b0e982c
Reviewed-on: https://chromium-review.googlesource.com/1060109
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,256 | 15.05.2018 11:47:12 | 25,200 | e16963ce25831f796acabcfaa870335876a14941 | i2c: correct i2c read print statement
The decimal converted value for i2c read does not work.
It just happens to work every other time I have seen it.
BRANCH=none
TEST=bip i2cxfer r works | [
{
"change_type": "MODIFY",
"old_path": "common/i2c_master.c",
"new_path": "common/i2c_master.c",
"diff": "@@ -870,13 +870,13 @@ static int command_i2cxfer(int argc, char **argv)\n/* 8-bit read */\nrv = i2c_read8(port, slave_addr, offset, &v);\nif (!rv)\n- ccprintf(\"0x%02x [%d]\\n\", v);\n+ ccprintf... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | i2c: correct i2c read print statement
The decimal converted value for i2c read does not work.
It just happens to work every other time I have seen it.
BUG=none
BRANCH=none
TEST=bip i2cxfer r works
Change-Id: I7d868e3fc79eea081867634b679120f2da6f9363
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1060167
Reviewed-by: Randall Spangler <rspangler@chromium.org> |
136,396 | 16.05.2018 12:29:00 | 25,200 | 0f41a73dbf9ac5ec569ab53600b7b8e95453a284 | common: drop unnecessary line ending
CPRINTS() macro is already adding the newline character, no need to
include it explicitly.
BRANCH=none
TEST=vefied that Coral EC does not print this newline any more | [
{
"change_type": "MODIFY",
"old_path": "common/tablet_mode.c",
"new_path": "common/tablet_mode.c",
"diff": "@@ -27,7 +27,7 @@ void tablet_set_mode(int mode)\nreturn;\ntablet_mode = mode;\n- CPRINTS(\"tablet mode %sabled\\n\", mode ? \"en\" : \"dis\");\n+ CPRINTS(\"tablet mode %sabled\", mode ? \"en\... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | common: drop unnecessary line ending
CPRINTS() macro is already adding the newline character, no need to
include it explicitly.
BRANCH=none
BUG=none
TEST=vefied that Coral EC does not print this newline any more
Change-Id: I1f6b1fcb90818a8d4a2d18cf5060669fc46d38a7
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1062588
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,256 | 15.05.2018 17:36:38 | 25,200 | 0579bf584ccd0e9aeea51c3435b2bca114dacdb2 | bq25703: correct define names
The register values used BQ25793 as the prefix and they should
use BQ25703 instead
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "driver/charger/bq25703.c",
"new_path": "driver/charger/bq25703.c",
"diff": "@@ -99,7 +99,7 @@ int charger_get_status(int *status)\n/* Default status */\n*status = CHARGER_LEVEL_2;\n- if (option & BQ25793_CHARGE_OPTION_0_CHRG_INHIBIT)\n+ if (option & BQ25703_CH... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | bq25703: correct define names
The register values used BQ25793 as the prefix and they should
use BQ25703 instead
BRANCH=none
BUG=none
TEST=none
Change-Id: I1955ff075c4e95ed901a5f265340ee01d60e1739
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1060590
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Scott Collyer <scollyer@chromium.org> |
136,230 | 17.05.2018 18:54:33 | 25,200 | 4daa90d7b4522ac6ee8e304f68f05042095b4186 | charge_state_v2: Localize a static variable
BRANCH=scarlet
TEST=build scarlet
Commit-Ready: Philip Chen
Tested-by: Philip Chen | [
{
"change_type": "MODIFY",
"old_path": "common/charge_state_v2.c",
"new_path": "common/charge_state_v2.c",
"diff": "#endif /* BAT_OCP_HYSTERESIS_PCT */\n#define BAT_OCP_HYSTERESIS \\\n(BAT_MAX_DISCHG_CURRENT * BAT_OCP_HYSTERESIS_PCT / 100) /* mA */\n-static timestamp_t ocp_throttle_start_time;\n#end... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | charge_state_v2: Localize a static variable
BUG=none
BRANCH=scarlet
TEST=build scarlet
Change-Id: Idf70d5eb3905edf86ea14e1288ae1a42876bd35c
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1064982
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> |
136,256 | 18.05.2018 09:59:29 | 25,200 | 5fb2784fc4df774bdbefd11290fd7112b6b64bb2 | bip: fix uart interrupt type to both
ITE only supports both edge triggers for GPB0 instead
of just falling.
BRANCH=none
TEST=nothing is changing on how it configured.
We are just changing the documentation in gpio.inc | [
{
"change_type": "MODIFY",
"old_path": "board/bip/gpio.inc",
"new_path": "board/bip/gpio.inc",
"diff": "@@ -14,7 +14,7 @@ GPIO_INT(WP_L, PIN(I, 4), GPIO_INT_BOTH, switch_interrupt) /* EC_WP_ODL */\nGPIO_INT(POWER_BUTTON_L, PIN(E, 4), GPIO_INT_BOTH, power_button_interrupt) /* MECH_PWR_BTN_ODL */\n#if... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | bip: fix uart interrupt type to both
ITE only supports both edge triggers for GPB0 instead
of just falling.
BRANCH=none
BUG=79942824
TEST=nothing is changing on how it configured.
We are just changing the documentation in gpio.inc
Change-Id: Ib7af54e360f4acaf410fb64b6747caf4d8729cec
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1066310
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,256 | 18.05.2018 09:11:49 | 25,200 | a93ed9b9aa51736ce48fd4bee5cf7b3bae346855 | it8320: print error message if gpio triggers are misconfigured
If a GPIO interrupt is misconifgured print out a console message.
BRANCH=none
TEST=verified messages get printed if I try to configure both on GPH6 | [
{
"change_type": "MODIFY",
"old_path": "chip/it83xx/gpio.c",
"new_path": "chip/it83xx/gpio.c",
"diff": "@@ -305,11 +305,33 @@ void gpio_kbs_pin_gpio_mode(uint32_t port, uint32_t mask, uint32_t flags)\nIT83XX_KBS_KSIGCTRL |= mask;\n}\n+/* Returns true when the falling trigger bit actually mean both t... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | it8320: print error message if gpio triggers are misconfigured
If a GPIO interrupt is misconifgured print out a console message.
BRANCH=none
BUG=b:79942824
TEST=verified messages get printed if I try to configure both on GPH6
Change-Id: Ic7156bea7c4fb2ac0bf7d717d8b812a60d5ad16a
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1066223
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Dino Li <Dino.Li@ite.com.tw> |
136,274 | 11.05.2018 19:21:17 | 25,200 | 677207d5f0081a692a9b00b6b5f3807b83d427ed | servo_updater: allow local builds
Updater regex allows local build versions as well.
BRANCH=None
TEST=update servo v4 | [
{
"change_type": "MODIFY",
"old_path": "extra/usb_updater/servo_updater.py",
"new_path": "extra/usb_updater/servo_updater.py",
"diff": "@@ -128,7 +128,7 @@ def do_updater_version(vidpid, iface, serialno):\n\"\"\"\nvers = do_version(vidpid, iface, serialno)\n- m = re.search('_v1.1.(\\d\\d\\d\\d)-', v... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | servo_updater: allow local builds
Updater regex allows local build versions as well.
BRANCH=None
BUG=b:69016431
TEST=update servo v4
Change-Id: I203aefff998ef5c69434187830c27431dbcc7dee
Signed-off-by: Nick Sanders <nsanders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1066989
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> |
136,396 | 21.05.2018 13:16:18 | 25,200 | 338c594ce37a22a12e8f879bf2eec55f486fd9bf | cr50: prepare to release version 0.4.7
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "util/signer/ec_RW-manifest-dev.json",
"new_path": "util/signer/ec_RW-manifest-dev.json",
"diff": "\"timestamp\": 0,\n\"epoch\": 0, // FWR diversification contributor, 32 bits.\n\"major\": 4, // FW2_HIK_CHAIN counter.\n- \"minor\": 6, // Mostly harmless version... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cr50: prepare to release version 0.4.7
BRANCH=none
BUG=none
TEST=none
Change-Id: I3c5516f8c8b3119ae705308eba3068ba5bf4d7e7
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1067780
Reviewed-by: Mary Ruthven <mruthven@chromium.org> |
136,274 | 18.05.2018 18:53:40 | 25,200 | c20a6da0549197b9d35bea59473f709a757ddfcf | servo_updater: add reboot flag
This allows a reboot request regardless of whether update
is required.
BRANCH=servo
TEST=servo reboots | [
{
"change_type": "MODIFY",
"old_path": "extra/usb_updater/servo_updater.py",
"new_path": "extra/usb_updater/servo_updater.py",
"diff": "@@ -213,6 +213,8 @@ def main():\nhelp=\"Update even if version match\", default=False)\nparser.add_argument('-v', '--verbose', action=\"store_true\",\nhelp=\"Chatty... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | servo_updater: add reboot flag
This allows a reboot request regardless of whether update
is required.
BRANCH=servo
BUG=b:69016505
TEST=servo reboots
Change-Id: I2e8651e6ffa95c622aa0a8122d705d9ac8fbdd82
Signed-off-by: Nick Sanders <nsanders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1066988
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> |
136,333 | 10.05.2018 08:19:34 | 14,400 | 359f1b582a080511179c26b6dd25e2db58587d23 | ec_chip_mchp: Add miscellaneous register defines: LPC and IRQ.
BRANCH=none
TEST=Build boards based on chip/mchp.
Commit-Ready: Randall Spangler
Tested-by: Randall Spangler | [
{
"change_type": "MODIFY",
"old_path": "chip/mchp/registers.h",
"new_path": "chip/mchp/registers.h",
"diff": "#include \"common.h\"\n+#define DEBUG_LPC 0\n+#define DEBUG_I2C 0\n/*\n* Helper function for RAM address aliasing\n#define MCHP_INT15_8042_OBE (1ul << 18)\n#define MCHP_INT15_8042_IBF (1ul <... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | ec_chip_mchp: Add miscellaneous register defines: LPC and IRQ.
BRANCH=none
BUG=
TEST=Build boards based on chip/mchp.
Change-Id: I792e042cc3d78bf139b2ba4be8c1904e00118d30
Signed-off-by: scott worley <scott.worley@microchip.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/1053576
Commit-Ready: Randall Spangler <rspangler@chromium.org>
Tested-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org> |
136,256 | 21.05.2018 10:31:16 | 21,600 | ad31abcfc829e91acf09da0622f6b35ad7b13412 | espi: convert all eSPI board to use CONFIG_HOSTCMD_ESPI
Convert all boards that use both CONFIG_ESPI and CONFIG_LPC to only use
the CONFIG_HOSTCMD_ESPI option.
BRANCH=none
TEST=entire stack works with lpc and espi | [
{
"change_type": "MODIFY",
"old_path": "baseboard/octopus/baseboard.h",
"new_path": "baseboard/octopus/baseboard.h",
"diff": "/* Common SoC / PCH defines */\n#define CONFIG_CHIPSET_GEMINILAKE\n#define CONFIG_CHIPSET_RESET_HOOK\n-#define CONFIG_ESPI\n+#define CONFIG_HOSTCMD_ESPI\n/* TODO(b/74123961):... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | espi: convert all eSPI board to use CONFIG_HOSTCMD_ESPI
Convert all boards that use both CONFIG_ESPI and CONFIG_LPC to only use
the CONFIG_HOSTCMD_ESPI option.
BRANCH=none
BUG=chromium:818804
TEST=entire stack works with lpc and espi
Change-Id: Idd1519494a4f880b7b2018d059579d50c5461fcf
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1067499
Reviewed-by: Randall Spangler <rspangler@chromium.org> |
136,256 | 21.05.2018 10:22:55 | 21,600 | 707bebe29356b4804509d438bb6f02496cb8b1b3 | lpc: convert LPC only boards to use CONFIG_HOSTCMD_LPC
BRANCH=none
TEST=Full stack builds and works on yorp (espi) and grunt (lpc) | [
{
"change_type": "MODIFY",
"old_path": "board/bds/board.h",
"new_path": "board/bds/board.h",
"diff": "/* Modules we want to exclude */\n#undef CONFIG_LID_SWITCH\n-#undef CONFIG_LPC\n+#undef CONFIG_LPC /* TODO(chromium:818804): Remove after transition */\n+#undef CONFIG_HOSTCMD_LPC\n#undef CONFIG_PEC... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | lpc: convert LPC only boards to use CONFIG_HOSTCMD_LPC
BRANCH=none
BUG=chromium:818804
TEST=Full stack builds and works on yorp (espi) and grunt (lpc)
Change-Id: I4a70e10c34d79361ceada1ff40b8912b8a6fdaa7
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1067500
Reviewed-by: Randall Spangler <rspangler@chromium.org> |
136,256 | 11.05.2018 13:24:43 | 21,600 | b34a5973cd8a5cc66c4c931a86317a114f68d792 | cleanup: add comment to CONFIG_BATTERY_REVIVE_DISCONNECT
When you define CONFIG_BATTERY_REVIVE_DISCONNECT you also need to define
battery_get_disconnected_state method()
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "include/config.h",
"new_path": "include/config.h",
"diff": "/*\n* Check for battery in disconnect state (similar to cut-off state). If this\n* battery is found to be in disconnect state, take it out of this state by\n- * force-applying a charge current.\n+ * f... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cleanup: add comment to CONFIG_BATTERY_REVIVE_DISCONNECT
When you define CONFIG_BATTERY_REVIVE_DISCONNECT you also need to define
battery_get_disconnected_state method()
BRANCH=none
BUG=none
TEST=none
Change-Id: I0ab42c722e2511cbfa50cab2142baec0906d8263
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1055819
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,256 | 21.05.2018 11:24:31 | 21,600 | 535c0bf4fa8b1c44b96f1163d163b20cebdd0a92 | cleanup: remove transition code for LPC/ESPI cleanup
BRANCH=none
TEST=full stack works with lpc and espi | [
{
"change_type": "MODIFY",
"old_path": "board/bds/board.h",
"new_path": "board/bds/board.h",
"diff": "/* Modules we want to exclude */\n#undef CONFIG_LID_SWITCH\n-#undef CONFIG_LPC /* TODO(chromium:818804): Remove after transition */\n#undef CONFIG_HOSTCMD_LPC\n#undef CONFIG_PECI\n#undef CONFIG_SWIT... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cleanup: remove transition code for LPC/ESPI cleanup
BRANCH=none
BUG=chromium:818804
TEST=full stack works with lpc and espi
Change-Id: I371e993bc97e7e87fb1075cf3dba82082402c0cf
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1067504
Reviewed-by: Randall Spangler <rspangler@chromium.org> |
136,256 | 08.05.2018 14:14:32 | 21,600 | 36d59f752fb7526bcfac74c567593c05c97b6f10 | yorp: add keyboard backlight control
Enable PWM control of backlight in EC for yorp and phaser. Proto build
of bip will not have backlight control in EC.
BRANCH=none
TEST=none (no hardware to test with) | [
{
"change_type": "MODIFY",
"old_path": "baseboard/octopus/baseboard.c",
"new_path": "baseboard/octopus/baseboard.c",
"diff": "@@ -135,6 +135,8 @@ static void baseboard_chipset_resume(void)\n* LID_OPEN connection in hardware.\n*/\ngpio_set_level(GPIO_ENABLE_BACKLIGHT, 1);\n+ /* Enable the keyboard ba... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | yorp: add keyboard backlight control
Enable PWM control of backlight in EC for yorp and phaser. Proto build
of bip will not have backlight control in EC.
BRANCH=none
BUG=b:79422226
TEST=none (no hardware to test with)
Change-Id: Ib6ed4af4de3145b112ed43b4ca1ec9f931f3875f
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1050785
Reviewed-by: Justin TerAvest <teravest@chromium.org> |
136,256 | 15.05.2018 17:43:34 | 25,200 | c4387539f6d3a58fb1ef5f6fb1d8deb12f8f9d7e | cleanup: make has_dut_i2c_mux check similar to other checks
BRANCH=none
TEST=flash on bip using new check | [
{
"change_type": "MODIFY",
"old_path": "util/flash_ec",
"new_path": "util/flash_ec",
"diff": "@@ -281,11 +281,15 @@ if [ \"${CHIP}\" = \"stm32_dfu\" -o \"${CHIP}\" = \"it83xx\" ]; then\nfi\nservo_has_warm_reset() {\n- dut_control warm_reset >/dev/null 2>&1\n+ dut_control -i warm_reset >/dev/null 2>&... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cleanup: make has_dut_i2c_mux check similar to other checks
BRANCH=none
BUG=none
TEST=flash on bip using new check
Change-Id: I32266554e090c80bdd9078c06cfa78512d5965ea
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1060589
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,427 | 22.05.2018 18:14:36 | 21,600 | 6a2939005d99415e6f305c519caf3d3a5774952a | genvif: Allow usb_pd_policy.c only in baseboard
Update rules for util/genvif to allow usb_pd_policy.c to be present
in just baseboard, or just board, or both.
BRANCH=none
TEST=make -j buildall | [
{
"change_type": "MODIFY",
"old_path": "util/build.mk",
"new_path": "util/build.mk",
"diff": "@@ -39,19 +39,23 @@ ec_parse_panicinfo-objs=ec_parse_panicinfo.o ec_panicinfo.o\nifeq ($(CONFIG_USB_POWER_DELIVERY),y)\nbuild-util-bin+=genvif\nbuild-util-art+=$(BOARD)_vif.txt\n-$(out)/util/genvif: $(out)/... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | genvif: Allow usb_pd_policy.c only in baseboard
Update rules for util/genvif to allow usb_pd_policy.c to be present
in just baseboard, or just board, or both.
BUG=b:78638238,b:79704826
BRANCH=none
TEST=make -j buildall
Change-Id: I4e2970a65c131d0681d2159fe2ea18b2639048c9
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1067751
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,197 | 23.05.2018 14:08:30 | -28,800 | 35e278bb41dc9f54e1317b0225c371b4c939eb12 | console_output: Add option to disable console channels
On hammer, we do not need the console channels, so we can just
disable them to save flash size.
BRANCH=poppy
TEST=make newsizes, staff image size shrinks by 704 bytes | [
{
"change_type": "MODIFY",
"old_path": "common/console_output.c",
"new_path": "common/console_output.c",
"diff": "#include \"usb_console.h\"\n#include \"util.h\"\n+#ifdef CONFIG_CONSOLE_CHANNEL\n/* Default to all channels active */\n#ifndef CC_DEFAULT\n#define CC_DEFAULT CC_ALL\n@@ -34,6 +35,7 @@ st... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | console_output: Add option to disable console channels
On hammer, we do not need the console channels, so we can just
disable them to save flash size.
BRANCH=poppy
BUG=b:35647963
TEST=make newsizes, staff image size shrinks by 704 bytes
Change-Id: I7a493ae57573814b166d45e57f1ad3d885f26086
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1070949
Reviewed-by: Randall Spangler <rspangler@chromium.org> |
136,197 | 23.05.2018 14:19:19 | -28,800 | db24bed78d6274def74f0a764a29a9ea1e2feb71 | timer: Allow disabling gettime console command
hammer does not need that command, let's just remove it.
BRANCH=poppy
TEST=make newsizes, saves 112 bytes of flash | [
{
"change_type": "MODIFY",
"old_path": "common/timer.c",
"new_path": "common/timer.c",
"diff": "@@ -319,6 +319,7 @@ DECLARE_CONSOLE_COMMAND(forcetime, command_force_time,\n\"Force current time\");\n#endif\n+#ifdef CONFIG_CMD_GETTIME\nstatic int command_get_time(int argc, char **argv)\n{\ntimestamp_t... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | timer: Allow disabling gettime console command
hammer does not need that command, let's just remove it.
BRANCH=poppy
BUG=b:35647963
TEST=make newsizes, saves 112 bytes of flash
Change-Id: I24ed979f8a9053128d4eb56fc5af00429f7ba0ae
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1070950
Reviewed-by: Randall Spangler <rspangler@chromium.org> |
136,197 | 23.05.2018 13:28:27 | -28,800 | 0bf44c2d56b3d2b29ce6d0d1b36a2bb5b36fa943 | hammer: Remove unnecessary console commands
Saving space in RW, even if we are not critical in terms of size,
always helps to reduce verification time.
BRANCH=poppy
TEST=make newsize => Hammer shrinks by ~3k, verification time
down by ~12 ms. | [
{
"change_type": "MODIFY",
"old_path": "board/hammer/board.h",
"new_path": "board/hammer/board.h",
"diff": "#define CONFIG_BOARD_PRE_INIT\n#define CONFIG_WATCHDOG_HELP\n+/* No need to hibernate, remove console commands that are not very useful. */\n+#undef CONFIG_HIBERNATE\n+#undef CONFIG_CONSOLE_CH... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | hammer: Remove unnecessary console commands
Saving space in RW, even if we are not critical in terms of size,
always helps to reduce verification time.
BRANCH=poppy
BUG=b:35647963
TEST=make newsize => Hammer shrinks by ~3k, verification time
down by ~12 ms.
Change-Id: I63741106fdc56c410871fb367c29605bf37f1b77
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1070951
Reviewed-by: Randall Spangler <rspangler@chromium.org> |
136,256 | 23.05.2018 15:15:32 | 21,600 | 1c2a9ee49eb54e9d3f30d3b9f45db71ef565133c | ppc: flush console regularly during console dump
I noticed data was getting dropped from my console output on
bip. Adding the cflush fixes it.
BRANCH=none
TEST=ppc_dump 0 on bip works | [
{
"change_type": "MODIFY",
"old_path": "driver/ppc/nx20p3483.c",
"new_path": "driver/ppc/nx20p3483.c",
"diff": "@@ -364,6 +364,9 @@ static int nx20p3483_dump(int port)\nreturn rv;\n}\nccprintf(\"[0x%02x]: 0x%02x\\n\", reg_addr, reg);\n+\n+ /* Flush every call otherwise buffer may get full */\n+ cflu... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | ppc: flush console regularly during console dump
I noticed data was getting dropped from my console output on
bip. Adding the cflush fixes it.
BRANCH=none
BUG=none
TEST=ppc_dump 0 on bip works
Change-Id: Ib71cb37c4c8728a7ab958905d3b2627b8c163faa
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1070626 |
136,256 | 21.05.2018 15:56:28 | 21,600 | 4a65a62f85ece242588d9316bf624bbd12cd54f7 | ppc: making driver non-const
We need to update the driver based on the runtime board id, so we need
to remove the const attribute.
BRANCH=none
TEST=build all -j | [
{
"change_type": "MODIFY",
"old_path": "baseboard/octopus/variant_usbc_ec_tcpcs.c",
"new_path": "baseboard/octopus/variant_usbc_ec_tcpcs.c",
"diff": "@@ -78,7 +78,7 @@ struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_COUNT] = {\n/***************************************************************************... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | ppc: making driver non-const
We need to update the driver based on the runtime board id, so we need
to remove the const attribute.
BRANCH=none
BUG=b:78896495,b:78021059
TEST=build all -j
Change-Id: I5f751c33cf4ec68a38aeb8644170df4987c87d7b
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1068030
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org> |
136,256 | 17.05.2018 18:17:45 | 25,200 | 89275aff034cc4fb03c14e5ada1674b5d5bcbbd5 | octopus: moving hibernate code to baseboard
bip also need to enable the sink path when going into hibernate
BRANCH=none
TEST=on bip, verfied that AC_OK, LID_OPEN, and POWER_BTN all wake the EC
up. | [
{
"change_type": "MODIFY",
"old_path": "baseboard/octopus/baseboard.c",
"new_path": "baseboard/octopus/baseboard.c",
"diff": "#include \"charge_manager.h\"\n#include \"charge_state.h\"\n+#include \"chipset.h\"\n#include \"common.h\"\n#include \"console.h\"\n#include \"driver/bc12/bq24392.h\"\n+#incl... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | octopus: moving hibernate code to baseboard
bip also need to enable the sink path when going into hibernate
BRANCH=none
BUG=b:79948623
TEST=on bip, verfied that AC_OK, LID_OPEN, and POWER_BTN all wake the EC
up.
Change-Id: I2c1168f856cc45635b5c76f7ca409007fcf141cc
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1065203 |
136,197 | 24.05.2018 18:01:58 | -28,800 | c7aaf471c975a3fd71423401696667a76ab4935a | touchpad_elan: Ensure we at least have 1k of shared memory
Debugging commands may request buffers up to that size.
BRANCH=poppy
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "driver/touchpad_elan.c",
"new_path": "driver/touchpad_elan.c",
"diff": "@@ -574,6 +574,9 @@ allowed_command_hashes[TOUCHPAD_ELAN_DEBUG_NUM_CMD][SHA256_DIGEST_SIZE] = {\n},\n};\n+/* Debugging commands need to allocate a <=1k buffer. */\n+SHARED_MEM_CHECK_SIZE(1... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | touchpad_elan: Ensure we at least have 1k of shared memory
Debugging commands may request buffers up to that size.
BRANCH=poppy
BUG=b:63993891
TEST=make buildall -j
Change-Id: I6dedfafc4e36d311026f9678e2cac99c85036ce0
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1071311
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,197 | 24.05.2018 15:40:41 | -28,800 | 1d2c13a1630a1a6222411e1c03186cb9b1f576e0 | test: Make it possible to run rsa tests on hammer board
BRANCH=poppy
TEST=make run-rsa run-rsa3
TEST=make BOARD=hammer test-rsa3, test on board | [
{
"change_type": "MODIFY",
"old_path": "test/build.mk",
"new_path": "test/build.mk",
"diff": "@@ -11,7 +11,7 @@ test-list-y=pingpong timer_calib timer_dos timer_jump mutex utils utils_str\ntest-list-$(BOARD_BDS)+=\n-test-list-$(BOARD_HAMMER)+=entropy\n+test-list-$(BOARD_HAMMER)+=entropy rsa3\n# Samu... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | test: Make it possible to run rsa tests on hammer board
BRANCH=poppy
BUG=b:35647963
BUG=b:77608104
TEST=make run-rsa run-rsa3
TEST=make BOARD=hammer test-rsa3, test on board
Change-Id: Id4bd8d5f550dbc6569d88ced114849b3b6411b2f
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1071410
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,427 | 23.05.2018 17:11:17 | 21,600 | 092e647d99c0100f0a51574eda28cc6130bb0df2 | careena: Make GPIOs match hardware
Update GPIO definitions for Careena to match hardware.
BRANCH=none
TEST=make BOARD=careena | [
{
"change_type": "MODIFY",
"old_path": "baseboard/grunt/baseboard.c",
"new_path": "baseboard/grunt/baseboard.c",
"diff": "@@ -131,7 +131,7 @@ unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips);\n/* BC 1.2 chip Configuration */\nconst struct bq24392_config_t bq24392_config[CONFIG_USB_PD_PORT_COUNT] = {\n[U... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | careena: Make GPIOs match hardware
Update GPIO definitions for Careena to match hardware.
BUG=b:79704826
BRANCH=none
TEST=make BOARD=careena
Change-Id: I755e5fd8123eefdfa8d30ca2314435c28340e488
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1070989
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,427 | 24.05.2018 17:00:26 | 21,600 | 13776ebef9af8fc954d16ed922666ea3446df7c5 | careena: Change LED colors
Careena has non-PWM White/Orange LEDs.
BRANCH=none
TEST=make -j buildall | [
{
"change_type": "MODIFY",
"old_path": "baseboard/grunt/baseboard.c",
"new_path": "baseboard/grunt/baseboard.c",
"diff": "#include \"driver/accel_kx022.h\"\n#include \"driver/accelgyro_bmi160.h\"\n#include \"driver/bc12/bq24392.h\"\n-#include \"driver/led/lm3630a.h\"\n#include \"driver/ppc/sn5s330.h... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | careena: Change LED colors
Careena has non-PWM White/Orange LEDs.
BUG=b:79704826,b:79894166
BRANCH=none
TEST=make -j buildall
Change-Id: Ie85de84fbd6e4ac4c6139d8407a7a25b5f6d5e7e
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1072898
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,403 | 18.05.2018 17:04:59 | 25,200 | b3218b9533b607dd53fec13671e3d91b50c0122a | ccd_config: Ccd vendor command takes params struct
This is needed so ccd_open() can see p->flags, for a subsequent
change. No change to existing command behavior or binary size.
BRANCH=cr50
TEST=gsctool -I still works | [
{
"change_type": "MODIFY",
"old_path": "common/ccd_config.c",
"new_path": "common/ccd_config.c",
"diff": "#include \"hooks.h\"\n#include \"nvmem_vars.h\"\n#include \"physical_presence.h\"\n-#include \"shared_mem.h\"\n#include \"system.h\"\n#include \"system_chip.h\"\n#include \"task.h\"\n@@ -56,6 +5... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | ccd_config: Ccd vendor command takes params struct
This is needed so ccd_open() can see p->flags, for a subsequent
change. No change to existing command behavior or binary size.
BUG=b:79983505
BRANCH=cr50
TEST=gsctool -I still works
Change-Id: I614d8c410e8bc55a5045e253469b2ec222078684
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1072500
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> |
136,197 | 25.05.2018 07:13:35 | -28,800 | 5c5eba404c9ec8c1d728f5f6691a110aea1efbb0 | cheza: Add stubs and ifdefs to fix tests
BRANCH=none
TEST=make BOARD=cheza tests -j | [
{
"change_type": "MODIFY",
"old_path": "board/cheza/board.c",
"new_path": "board/cheza/board.c",
"diff": "@@ -54,8 +54,10 @@ static void anx74xx_cable_det_interrupt(enum gpio_signal signal);\n/* GPIO Interrupt Handlers */\nstatic void tcpc_alert_event(enum gpio_signal signal)\n{\n+#ifdef HAS_TASK_PD... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cheza: Add stubs and ifdefs to fix tests
BRANCH=none
BUG=none
TEST=make BOARD=cheza tests -j
Change-Id: Ifec4653bf71b870b616669f0a32ba528c1e38787
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1072217
Reviewed-by: Wai-Hong Tam <waihong@google.com>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,197 | 24.05.2018 17:19:48 | -28,800 | 43a5152a2e7987668bfbedeb23b8d03fd1982018 | console_output: Clarify help text for CONFIG_CONSOLE_CHANNEL
BRANCH=poppy
TEST=N/A | [
{
"change_type": "MODIFY",
"old_path": "include/config.h",
"new_path": "include/config.h",
"diff": "* Make it possible for console to be output to different channels that can be\n* turned on and off.\n*\n- * Boards that do not require a typical FAFT flow may #undef this to reduce\n- * image size.\n+... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | console_output: Clarify help text for CONFIG_CONSOLE_CHANNEL
BRANCH=poppy
BUG=b:35647963
TEST=N/A
Change-Id: I85dd6553cf3ebace4e19813a308d0a024eba2915
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1071412
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,418 | 24.03.2018 20:52:49 | -28,800 | 2785d8971694f9415a418c74baa808b775898399 | Cheza: Support host command over SPI
BRANCH=none
TEST=make buildall -j
TEST=Ran "ectool version" in userspace. | [
{
"change_type": "MODIFY",
"old_path": "board/cheza/board.c",
"new_path": "board/cheza/board.c",
"diff": "#include \"power.h\"\n#include \"power_button.h\"\n#include \"system.h\"\n+#include \"shi_chip.h\"\n#include \"switch.h\"\n#include \"task.h\"\n#include \"usb_charge.h\"\n"
},
{
"change_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Cheza: Support host command over SPI
BRANCH=none
BUG=b:74395451
TEST=make buildall -j
TEST=Ran "ectool version" in userspace.
Change-Id: Iee6816c669a18d1203b9f8f88857418185645503
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1005554
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,405 | 14.05.2018 18:38:13 | 25,200 | 2352723c9f6fa21455e4796db5ca955605aa314f | Nami: Set battery configuration per board
This patch makes EC configure battery parameters differently based
on OEM ID.
BRANCH=none
TEST=make BOARD=nami
Commit-Ready: Daisuke Nojiri
Tested-by: Daisuke Nojiri | [
{
"change_type": "MODIFY",
"old_path": "board/nami/battery.c",
"new_path": "board/nami/battery.c",
"diff": "#include \"battery.h\"\n#include \"battery_smart.h\"\n+#include \"board.h\"\n#include \"charge_state.h\"\n#include \"console.h\"\n#include \"ec_commands.h\"\n#include \"extpower.h\"\n#include ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Nami: Set battery configuration per board
This patch makes EC configure battery parameters differently based
on OEM ID.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b:79498660
BRANCH=none
TEST=make BOARD=nami
Change-Id: I782bd950f086bde13b2bc58656dc96e7c3f2aeb3
Reviewed-on: https://chromium-review.googlesource.com/1058718
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,256 | 21.05.2018 14:56:33 | 21,600 | 65cd9c106c8ac1e3425acec534e71744c3b472e5 | yorp: drive PPC EN_SNK from TCPC gpio
Since the PS8751 is now driving the EN_SNK GPIO on the PPC, we cannot
reset without a battery otherwise we will brown out the board.
BRANCH=none
TEST=verified with reworked board. | [
{
"change_type": "MODIFY",
"old_path": "baseboard/octopus/variant_usbc_standalone_tcpcs.c",
"new_path": "baseboard/octopus/variant_usbc_standalone_tcpcs.c",
"diff": "#include \"usbc_ppc.h\"\n#include \"util.h\"\n+#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args)\n+#define CPRIN... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | yorp: drive PPC EN_SNK from TCPC gpio
Since the PS8751 is now driving the EN_SNK GPIO on the PPC, we cannot
reset without a battery otherwise we will brown out the board.
BRANCH=none
BUG=b:78896495,b:78021059
TEST=verified with reworked board.
Change-Id: Ibadf46de922c49f5fdd08c43991e71f852ff7600
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1067711 |
136,427 | 29.05.2018 10:17:51 | 21,600 | cd5e7cbeb1cfabed3632edea0c2363e181a0e228 | grunt: Reduce USB-C source current to 1.5A
Grunt and Careena hardware does not support sourcing 3A over USB-C
so reduce what we advertise to 1.5A.
BRANCH=none
TEST=Grunt advertises 1.5A Source Cap on both ports | [
{
"change_type": "MODIFY",
"old_path": "baseboard/grunt/baseboard.h",
"new_path": "baseboard/grunt/baseboard.h",
"diff": "#define CONFIG_USB_PD_DUAL_ROLE\n#define CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE\n#define CONFIG_USB_PD_LOGGING\n-#define CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT TYPEC_RP_3A0\n#defin... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | grunt: Reduce USB-C source current to 1.5A
Grunt and Careena hardware does not support sourcing 3A over USB-C
so reduce what we advertise to 1.5A.
BUG=b:78908554
BRANCH=none
TEST=Grunt advertises 1.5A Source Cap on both ports
Change-Id: Ifd3ddf45445ae69c5988dee4f66f21056b4b0f96
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1077096
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,418 | 01.06.2018 11:46:24 | 25,200 | 4a0bd0cedab55f119419b0a8c70ca05d47b4a8e2 | cheza: Switch USB port-0 HS to the hub
It matches the SS path, in which both port-0 and port-1 connect to the
hub.
BRANCH=none
TEST=Tried plugging USB 2.0 disk to port-0 and port-1, both bootable. | [
{
"change_type": "MODIFY",
"old_path": "board/cheza/gpio.inc",
"new_path": "board/cheza/gpio.inc",
"diff": "@@ -86,9 +86,9 @@ GPIO(CHG_LED_W_C1, PIN(3, 0), GPIO_OUT_LOW) /* EC_CHG_LED_W_C1 */\n*\n* TODO(waihong): Support auto-detection and switching.\n*/\n-/* By default, switch port-0 to AP and port... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cheza: Switch USB port-0 HS to the hub
It matches the SS path, in which both port-0 and port-1 connect to the
hub.
BRANCH=none
BUG=b:74395451
TEST=Tried plugging USB 2.0 disk to port-0 and port-1, both bootable.
Change-Id: Ic0264657fbe126242a419ef33ce07bc2599375ee
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1082981
Reviewed-by: Douglas Anderson <dianders@chromium.org> |
136,401 | 01.06.2018 13:14:26 | 21,600 | ee1861e9ed39707136b3ff13f5bb007b8a9c2796 | stoney: strip unused forcing_coldreset path.
This is just a dead code elimination; no functional changes. See also
b/72426192 for functional changes.
TEST=power cycle on grunt EVT
BRANCH=none | [
{
"change_type": "MODIFY",
"old_path": "power/stoney.c",
"new_path": "power/stoney.c",
"diff": "#define IN_S5_PGOOD POWER_SIGNAL_MASK(X86_S5_PGOOD)\n-static int forcing_coldreset; /* Forced coldreset in progress? */\nstatic int forcing_shutdown; /* Forced shutdown in progress? */\nvoid chipset_force... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | stoney: strip unused forcing_coldreset path.
This is just a dead code elimination; no functional changes. See also
b/72426192 for functional changes.
BUG=b:77301519
TEST=power cycle on grunt EVT
BRANCH=none
Change-Id: Id9f60d14eb2a7df9013f779b05a54638ad62971f
Signed-off-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1083317
Reviewed-by: Edward Hill <ecgh@chromium.org> |
136,401 | 05.06.2018 09:37:22 | 21,600 | 0776ebfbbfd016bdbe0bb8e46af0659b13e52ab9 | stoney: Rename GPIO_PCH_RCIN_L to GPIO_SYS_RESET_L
Pin rename only; no functional changes. See also b/72426192 for
earlier functional changes.
TEST=make -j buildall
BRANCH=none | [
{
"change_type": "MODIFY",
"old_path": "board/careena/gpio.inc",
"new_path": "board/careena/gpio.inc",
"diff": "@@ -31,7 +31,7 @@ GPIO(ENABLE_BACKLIGHT_L, PIN(D, 3), GPIO_OUT_HIGH) /* Enable Backlight */\nGPIO(PCH_RSMRST_L, PIN(C, 2), GPIO_OUT_LOW) /* RSMRST# to SOC */\nGPIO(PCH_PWRBTN_L, PIN(C, 1),... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | stoney: Rename GPIO_PCH_RCIN_L to GPIO_SYS_RESET_L
Pin rename only; no functional changes. See also b/72426192 for
earlier functional changes.
BUG=b:77301519
TEST=make -j buildall
BRANCH=none
Change-Id: I18e71118e584a5b36ba001bac24951929d2c93ff
Signed-off-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1087207
Reviewed-by: Edward Hill <ecgh@chromium.org> |
136,274 | 24.05.2018 15:28:39 | 25,200 | ef25dff82aad8d75cada88eff8fa09d2139dac20 | servo_v4: use coreboot toolchain
This defaults servo_v4 to use the more compact coreboot
toolchain, as the flash is full.
BRANCH=None
TEST=still works | [
{
"change_type": "MODIFY",
"old_path": "board/servo_v4/build.mk",
"new_path": "board/servo_v4/build.mk",
"diff": "CHIP:=stm32\nCHIP_FAMILY:=stm32f0\nCHIP_VARIANT:=stm32f07x\n+$(call set-option,CROSS_COMPILE_arm,$(CROSS_COMPILE_arm),\\\n+ /opt/coreboot-sdk/bin/arm-eabi-)\n# Not enough SRAM: Disable a... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | servo_v4: use coreboot toolchain
This defaults servo_v4 to use the more compact coreboot
toolchain, as the flash is full.
BUG=b:80261180
BRANCH=None
TEST=still works
Change-Id: Ifb970c4a22439e0c53420cfff2464a658331c799
Signed-off-by: Nick Sanders <nsanders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1072745
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> |
136,230 | 06.06.2018 20:21:36 | 25,200 | 77da1b6499e02e810b5a39579e23b964b8b4cdf1 | cheza: Read board version from GPIO pins
BRANCH=none
TEST='version' command on ec console shows correct board version
Commit-Ready: ChromeOS CL Exonerator Bot
Tested-by: Philip Chen | [
{
"change_type": "MODIFY",
"old_path": "board/cheza/board.h",
"new_path": "board/cheza/board.h",
"diff": "#define CONFIG_HOSTCMD_SECTION_SORTED /* Host commands are sorted. */\n#define CONFIG_MKBP_EVENT\n-#define CONFIG_BOARD_VERSION\n+#define CONFIG_BOARD_VERSION_GPIO\n#define CONFIG_POWER_BUTTON\n... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cheza: Read board version from GPIO pins
BUG=none
BRANCH=none
TEST='version' command on ec console shows correct board version
Change-Id: If52b3424f754cf470042909767eaff48a9b5483a
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1090370
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Wai-Hong Tam <waihong@google.com> |
136,197 | 07.06.2018 14:55:49 | -28,800 | eb480d50b0fcd128d1f6c2de81d8c17d6cc3a31a | power: Rename mediatek to mt817x
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "board/elm/board.h",
"new_path": "board/elm/board.h",
"diff": "#define CONFIG_CHARGER_SENSE_RESISTOR_AC 20\n#define CONFIG_CHARGER_DISCHARGE_ON_AC\n#define CONFIG_CHARGER_V2\n-#define CONFIG_CHIPSET_MEDIATEK\n+#define CONFIG_CHIPSET_MT817X\n#define CONFIG_CMD_T... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | power: Rename mediatek to mt817x
BRANCH=none
BUG=b:109850749
TEST=make buildall -j
Change-Id: I69538a210f9b2198614720537faa3ee75bc0600e
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1090522
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,197 | 07.06.2018 15:02:53 | -28,800 | af97a6046b2b81284e6052c0a9957d43c40fa35d | power: Rename rockchip to rk3288
Get rid of a TODO.
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "board/jerry/board.h",
"new_path": "board/jerry/board.h",
"diff": "#define CONFIG_CHARGER_BQ24715\n#define CONFIG_CHARGER_DISCHARGE_ON_AC\n#define CONFIG_CHARGER_V2\n-#define CONFIG_CHIPSET_ROCKCHIP\n+#define CONFIG_CHIPSET_RK3288\n#define CONFIG_EXTPOWER_GPIO\... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | power: Rename rockchip to rk3288
Get rid of a TODO.
BRANCH=none
BUG=b:35569119
TEST=make buildall -j
Change-Id: Ia918c90519220a348f8c65b6b6f14b6d3129a63a
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1090523
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,256 | 06.06.2018 11:15:30 | 21,600 | 9a80691c33801f9343c0ebd42e643fa6cb2cdec2 | octopus: remove ADCs for VBUS
Hardware does not support ADCs for Vbus anymore for
all boards except bip. Make bip the same as other octopus
boards (i.e. not using ADCs for Vbus measurements).
BRANCH=none
TEST=CL stack works with current yorp | [
{
"change_type": "MODIFY",
"old_path": "baseboard/octopus/baseboard.h",
"new_path": "baseboard/octopus/baseboard.h",
"diff": "#define CONFIG_USBC_SS_MUX\n#define CONFIG_USBC_VCONN\n#define CONFIG_USBC_VCONN_SWAP\n-#define CONFIG_USB_PD_VBUS_MEASURE_ADC_EACH_PORT\n+#define CONFIG_USB_PD_VBUS_MEASURE_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | octopus: remove ADCs for VBUS
Hardware does not support ADCs for Vbus anymore for
all boards except bip. Make bip the same as other octopus
boards (i.e. not using ADCs for Vbus measurements).
BRANCH=none
BUG=b:109747036
TEST=CL stack works with current yorp
Change-Id: I96b82b70799e8b70bf5d479a1714524fc1652140
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1089199
Reviewed-by: Furquan Shaikh <furquan@chromium.org> |
136,256 | 08.06.2018 10:15:20 | 21,600 | 8350369c8695e58f1c7c0ffeddf8c652d3af3adb | phaser: erase OCM automatically for V0
New part did not make it in time for SMT, so we can work around issue in
firmware.
BRANCH=none
TEST=builds | [
{
"change_type": "MODIFY",
"old_path": "board/phaser/board.c",
"new_path": "board/phaser/board.c",
"diff": "#include \"adc.h\"\n#include \"adc_chip.h\"\n#include \"common.h\"\n+#include \"console.h\"\n+#include \"cros_board_info.h\"\n#include \"driver/ppc/nx20p3483.h\"\n+#include \"driver/tcpm/anx74... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | phaser: erase OCM automatically for V0
New part did not make it in time for SMT, so we can work around issue in
firmware.
BRANCH=none
BUG=b:109928364
TEST=builds
Change-Id: I6bac65a2148755cb68020fb8a0de7ba5cf2de726
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1093112
Reviewed-by: Furquan Shaikh <furquan@chromium.org> |
136,256 | 08.06.2018 09:28:08 | 21,600 | 8babd9c4156d02919f4ff943482997497889c76d | bip: set 1.8V mode for i2c bus
The alternate mode for i2c still needs to set the 1.8V flag since it is
called when configuring the port initially and when it finishes
manually unwedging the port.
BRANCH=none
TEST=builds | [
{
"change_type": "MODIFY",
"old_path": "board/bip/gpio.inc",
"new_path": "board/bip/gpio.inc",
"diff": "@@ -108,7 +108,7 @@ UNIMPLEMENTED(KB_BL_PWR_EN)\n/* Cr50 requires no pull-ups on UART pins. */\nALTERNATE(PIN_MASK(B, 0x03), 0, MODULE_UART, 0) /* UART from EC to Servo */\nALTERNATE(PIN_MASK(B, 0... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | bip: set 1.8V mode for i2c bus
The alternate mode for i2c still needs to set the 1.8V flag since it is
called when configuring the port initially and when it finishes
manually unwedging the port.
BRANCH=none
BUG=b:109884927
TEST=builds
Change-Id: Iac34c413499dfa803b45ec575f0a134774951b6c
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1096019
Reviewed-by: Furquan Shaikh <furquan@chromium.org> |
136,396 | 11.06.2018 10:05:05 | 25,200 | 827765d0d3ab712dd2d27d3a01a324950f7f7301 | cr50: prepare to release 0.4.8
BRANCH=cr50
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "util/signer/ec_RW-manifest-dev.json",
"new_path": "util/signer/ec_RW-manifest-dev.json",
"diff": "\"timestamp\": 0,\n\"epoch\": 0, // FWR diversification contributor, 32 bits.\n\"major\": 4, // FW2_HIK_CHAIN counter.\n- \"minor\": 7, // Mostly harmless version... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cr50: prepare to release 0.4.8
BRANCH=cr50
BUG=none
TEST=none
Change-Id: I1355c758eee43f95f1d1e42635025f96594d7514
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1095634
Reviewed-by: Mary Ruthven <mruthven@chromium.org> |
136,256 | 08.05.2018 10:19:02 | 21,600 | 084fb77a796e2a33e68435be52f18ce63c48d62d | phaser: add battery information
Add battery information for:
- SMP 5B10Q13163
- LGC 5B10Q13162
BRANCH=none
TEST=builds (I don't have a phaser or batteries yet) | [
{
"change_type": "MODIFY",
"old_path": "board/phaser/battery.c",
"new_path": "board/phaser/battery.c",
"diff": "@@ -48,7 +48,7 @@ const struct board_batt_params board_battery_info[] = {\n}\n},\n.batt_info = {\n- .voltage_max = 13200,\n+ .voltage_max = 13200, /* mV */\n.voltage_normal = 11550, /* mV ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | phaser: add battery information
Add battery information for:
- SMP 5B10Q13163
- LGC 5B10Q13162
BRANCH=none
BUG=b:78770233
TEST=builds (I don't have a phaser or batteries yet)
Change-Id: I61ff3f874ff37ef60be084ccebddd2a72f4e82a3
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1096125
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org> |
136,256 | 12.06.2018 16:07:08 | 21,600 | 622be4bc30d015c27746a58a114f131268523de9 | presubmit_check: disable SPDX_LICENSE_TAG check
The SPDX_LICENSE_TAG doesn't apply to the ec codebase since it would
want us to add the SPDX-License-Identifier to every file.
BRANCH=none
TEST=verified a new file does not need SPDX-License-Identifier tag | [
{
"change_type": "MODIFY",
"old_path": "PRESUBMIT.cfg",
"new_path": "PRESUBMIT.cfg",
"diff": "@@ -7,7 +7,7 @@ checkpatch_check: true\ntab_check: false\n[Hook Overrides Options]\n-checkpatch_check: --no-tree --ignore=MSLEEP,VOLATILE\n+checkpatch_check: --no-tree --ignore=MSLEEP,VOLATILE,SPDX_LICENSE_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | presubmit_check: disable SPDX_LICENSE_TAG check
The SPDX_LICENSE_TAG doesn't apply to the ec codebase since it would
want us to add the SPDX-License-Identifier to every file.
BRANCH=none
BUG=none
TEST=verified a new file does not need SPDX-License-Identifier tag
Change-Id: Ie7670f52ecd7a5dd825a56a0e8dc839e66ddd6f1
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1098026
Reviewed-by: Mike Frysinger <vapier@chromium.org> |
136,256 | 12.06.2018 15:19:16 | 21,600 | 82c8be734893f968dc946b62892f885e3725f949 | yorp: remove old comment
Bug is already closed
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "board/yorp/board.c",
"new_path": "board/yorp/board.c",
"diff": "@@ -206,7 +206,6 @@ static struct stprivate_data lsm6dsm_g_data;\nstatic struct stprivate_data lsm6dsm_a_data;\n/* Drivers */\n-/* TODO(b/74602071): Tune sensor cfg after the board is received */\... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | yorp: remove old comment
Bug is already closed
BRANCH=none
BUG=b:74602071
TEST=none
Change-Id: Ib3d4200810a495f4c803f9ecf662a9a2a655b3aa
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1098019
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org> |
136,256 | 12.06.2018 07:46:18 | 21,600 | ac4246bac6b14c1a764a73b76d1429b47a9b95cd | phaser: add Sunwoda L18D3PG1 battery information
BRANCH=none
TEST=builds
Commit-Ready: Justin TerAvest | [
{
"change_type": "MODIFY",
"old_path": "board/phaser/battery.c",
"new_path": "board/phaser/battery.c",
"diff": "* address, mask, and disconnect value need to be provided.\n*/\nconst struct board_batt_params board_battery_info[] = {\n- /* TODO(b/78770233): Add real battery information from datasheets... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | phaser: add Sunwoda L18D3PG1 battery information
BRANCH=none
BUG=b:78770233
TEST=builds
Change-Id: Ic6880ba1f1c89c175320c434a6574540d5efbd36
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1099574
Commit-Ready: Justin TerAvest <teravest@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org> |
136,256 | 12.06.2018 12:23:46 | 21,600 | 945109b4887fa0db5dd521c2a8a552ba2ca8376f | fleex: add initial firmware image
The is based off of current yorp (V1) on ToT without the LED
implementation.
BRANCH=none
TEST=builds | [
{
"change_type": "ADD",
"old_path": null,
"new_path": "board/fleex/battery.c",
"diff": "+/* Copyright 2018 The Chromium OS Authors. All rights reserved.\n+ * Use of this source code is governed by a BSD-style license that can be\n+ * found in the LICENSE file.\n+ *\n+ * Battery pack vendor provided ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | fleex: add initial firmware image
The is based off of current yorp (V1) on ToT without the LED
implementation.
BRANCH=none
BUG=b:110085182
TEST=builds
Change-Id: Ic95fdf19be60637cf9effa8b34cb4659ad45952a
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1098020
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org> |
136,340 | 13.06.2018 13:09:32 | 25,200 | 062680833fcfd42bdd03f8422c023b7e1c12a6fd | driver: bmi160: Rename secondary i2c device address
Make it more generic, to support other magnetometer.
BRANCH=none
TEST=Compile | [
{
"change_type": "MODIFY",
"old_path": "board/eve/board.h",
"new_path": "board/eve/board.h",
"diff": "#define CONFIG_MAG_BMI160_BMM150\n#define CONFIG_ACCEL_INTERRUPTS\n#define CONFIG_ACCELGYRO_BMI160_INT_EVENT TASK_EVENT_CUSTOM(4)\n-#define BMM150_I2C_ADDRESS BMM150_ADDR0 /* 8-bit address */\n+#def... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | driver: bmi160: Rename secondary i2c device address
Make it more generic, to support other magnetometer.
BUG=b:110143516
BRANCH=none
TEST=Compile
Change-Id: I94cbbe6daf598680a2decde12d703650dfb7c04c
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1101548 |
136,396 | 14.06.2018 17:07:21 | 25,200 | b7ff14aa41db159249acf68731eb64499d6bcfd0 | cr50: use SYSTEM_IMAGE_RW instead of SYSTEM_IMAGE_RW_A
Cr50 branches did not cherry pick the patch which introduced the
SYSTEM_IMAGE_RW_A enum, let's use SYSTEM_IMAGE_RW instead as the rest
of Cr50 code does.
BRANCH=none
TEST=make buildall | [
{
"change_type": "MODIFY",
"old_path": "board/cr50/factory_mode.c",
"new_path": "board/cr50/factory_mode.c",
"diff": "@@ -38,10 +38,10 @@ static int inactive_image_is_guc_image(void)\nenum system_image_copy_t inactive_copy;\nconst struct SignedHeader *other;\n- if (system_get_image_copy() == SYSTEM_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cr50: use SYSTEM_IMAGE_RW instead of SYSTEM_IMAGE_RW_A
Cr50 branches did not cherry pick the patch which introduced the
SYSTEM_IMAGE_RW_A enum, let's use SYSTEM_IMAGE_RW instead as the rest
of Cr50 code does.
BRANCH=none
BUG=none
TEST=make buildall
Change-Id: Ifcb8de638ecb2000d5bef8a33efa0c42d366a461
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1102078
Reviewed-by: Mary Ruthven <mruthven@chromium.org> |
136,230 | 07.06.2018 02:51:55 | 25,200 | b0d725bf21e230e1b04afa689e0e13e181e4c423 | cheza: Support accel/gyro
BRANCH=none
TEST=Move/rotate cheza rev1 board, and
'accelread' shows different readings
Commit-Ready: Philip Chen
Tested-by: Philip Chen | [
{
"change_type": "MODIFY",
"old_path": "board/cheza/board.c",
"new_path": "board/cheza/board.c",
"diff": "#include \"charge_state.h\"\n#include \"chipset.h\"\n#include \"extpower.h\"\n+#include \"driver/accelgyro_bmi160.h\"\n#include \"driver/ppc/sn5s330.h\"\n#include \"driver/tcpm/anx74xx.h\"\n#inc... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cheza: Support accel/gyro
BUG=b:110006188
BRANCH=none
TEST=Move/rotate cheza rev1 board, and
'accelread' shows different readings
Change-Id: Iec89e800df9722f5bb53d91c3178dd99d30e5d4c
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1090693
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Alexandru M Stan <amstan@chromium.org> |
136,312 | 15.06.2018 12:47:34 | 25,200 | 56e50874c0edeaa0851e8c5b75732a7b71f4784b | gsctool: --password does not take an arg
It takes the password on a stdin prompt.
BRANCH=none
TEST=build; `gsctool --help` | [
{
"change_type": "MODIFY",
"old_path": "extra/usb_updater/gsctool.c",
"new_path": "extra/usb_updater/gsctool.c",
"diff": "@@ -530,7 +530,7 @@ static void usage(int errs)\n\" using information provided in \"\n\"<desc file>\\n\"\n\" -o,--ccd_open Start CCD open sequence\\n\"\n- \" -P,--password <passw... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | gsctool: --password does not take an arg
It takes the password on a stdin prompt.
BRANCH=none
BUG=none
TEST=build; `gsctool --help`
Change-Id: Ic16cb288507028bde4983d07bb6ab8b541f4a55b
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1103014
Reviewed-by: Mary Ruthven <mruthven@chromium.org> |
136,340 | 13.06.2018 13:16:25 | 25,200 | ee5d8b8a627381e906369f6c108dab7be2ac7518 | driver: bmi160: Rename secondary i2c access functions
Make it more generic to support sensor other than BMI159.
BRANCH=none
TEST=compile | [
{
"change_type": "MODIFY",
"old_path": "driver/accelgyro_bmi160.c",
"new_path": "driver/accelgyro_bmi160.c",
"diff": "@@ -241,14 +241,14 @@ static int raw_read_n(const int port, const int addr, const uint8_t reg,\nreturn rv;\n}\n-#ifdef CONFIG_MAG_BMI160_BMM150\n+#ifdef CONFIG_BMI160_SEC_I2C\n/**\n*... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | driver: bmi160: Rename secondary i2c access functions
Make it more generic to support sensor other than BMI159.
BUG=b:110143516
BRANCH=none
TEST=compile
Change-Id: I954df2e9301e05968930add396cd724ca0dfa262
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1101550
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,383 | 15.06.2018 12:59:38 | 25,200 | 966802817aeb59a32dc72d5330252881a06010ce | util: add unpack_ftb to setup.py
unpack_ftb is used as a build tool to convert .ftb to .bin
TEST=verify that unpack_ftb is present and executable
Commit-Ready: Bob Moragues
Tested-by: Bob Moragues | [
{
"change_type": "MODIFY",
"old_path": "setup.py",
"new_path": "setup.py",
"diff": "@@ -72,3 +72,17 @@ setup(\ndescription=\"Tool to open the usb console on servo, cr50.\",\n)\n+setup(\n+ name=\"unpack_ftb\",\n+ version=\"1.0\",\n+ author=\"Wei-Han Chen\",\n+ author_email=\"stimim@chromium.org\",\n+... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | util: add unpack_ftb to setup.py
unpack_ftb is used as a build tool to convert .ftb to .bin
BUG=b:109719787
TEST=verify that unpack_ftb is present and executable
Change-Id: I65c77cb13fd2866aabd2975979d943063cd615c6
Reviewed-on: https://chromium-review.googlesource.com/1103058
Commit-Ready: Bob Moragues <moragues@chromium.org>
Tested-by: Bob Moragues <moragues@chromium.org>
Reviewed-by: Wei-Han Chen <stimim@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> |
136,401 | 07.06.2018 13:28:26 | 21,600 | 4c0f7192f6ca544bf46aea9ba8009f560b9cc5b5 | grunt: Enable tablet mode for convertible SKUs.
BRANCH=none
TEST=EC functional test 1.2.18 on grunt convertible. Verified that
a grunt clamshell wthat does not have a populated lid accelerometer
works as expected. | [
{
"change_type": "MODIFY",
"old_path": "baseboard/grunt/baseboard.c",
"new_path": "baseboard/grunt/baseboard.c",
"diff": "#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args)\n#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args)\n+static int board_is_convertible... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | grunt: Enable tablet mode for convertible SKUs.
BUG=b:79159777
BRANCH=none
TEST=EC functional test 1.2.18 on grunt convertible. Verified that
a grunt clamshell wthat does not have a populated lid accelerometer
works as expected.
Change-Id: Ic9059d7d8f4f353475517ad3b8ef049ed653e9e4
Signed-off-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1093255
Reviewed-by: Edward Hill <ecgh@chromium.org> |
136,405 | 07.06.2018 13:01:14 | 25,200 | b3110cc9c35e73af83b66aee70cc773a496379f5 | Nami: Set initial fan duty to 50%
BRANCH=none
TEST=Verify fan starts at 50% duty on Nami.
Commit-Ready: Daisuke Nojiri
Tested-by: Daisuke Nojiri | [
{
"change_type": "MODIFY",
"old_path": "board/nami/board.h",
"new_path": "board/nami/board.h",
"diff": "#define WIRELESS_GPIO_WLAN_POWER GPIO_PP3300_DX_WLAN\n#undef CONFIG_SUPPORT_CHIP_HIBERNATION\n#define CONFIG_FANS 1\n+#undef CONFIG_FAN_INIT_SPEED\n+#define CONFIG_FAN_INIT_SPEED 50\n#define CONFI... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Nami: Set initial fan duty to 50%
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b:80152440
BRANCH=none
TEST=Verify fan starts at 50% duty on Nami.
Change-Id: I9b75ce95f40b86d0b89a685ff1bb22abf1fcf3f4
Reviewed-on: https://chromium-review.googlesource.com/1100963
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,383 | 18.06.2018 12:36:19 | 25,200 | a201157d9cc06d4d9245c175850da2ff56d0e402 | util: correct unpack_ftb
unpack_ftb is used as a build tool to convert
ST toucpad .ftb file to .bin
TEST=verify that unpack_ftb is present and executable
Commit-Ready: Bob Moragues
Tested-by: Bob Moragues | [
{
"change_type": "MODIFY",
"old_path": "setup.py",
"new_path": "setup.py",
"diff": "@@ -81,8 +81,8 @@ setup(\npackage_dir={\"\" : \"util\"},\npy_modules=[\"unpack_ftb\"],\nentry_points = {\n- \"build_scripts\": [\"unpack_ftb=unpack_ftb:main\"],\n+ \"console_scripts\": [\"unpack_ftb=unpack_ftb:main\"... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | util: correct unpack_ftb
unpack_ftb is used as a build tool to convert
ST toucpad .ftb file to .bin
BUG=b:109719787
TEST=verify that unpack_ftb is present and executable
Change-Id: I91f541f7c030adc7979043ad48cdedc1f9f58da6
Reviewed-on: https://chromium-review.googlesource.com/1104979
Commit-Ready: Bob Moragues <moragues@chromium.org>
Tested-by: Bob Moragues <moragues@chromium.org>
Reviewed-by: Nick Sanders <nsanders@chromium.org> |
136,256 | 19.06.2018 11:33:55 | 21,600 | 4fd457c2c8aa8b053bd0991cd4de52a5f490cd8f | bip: ensure AP is off during EC flash
Hard reset the system right before flashing the EC to ensure that AP is
off while we are flashing the EC.
BRANCH=none
TEST=flash bip and verify that AP console is unresponsive. | [
{
"change_type": "MODIFY",
"old_path": "util/flash_ec",
"new_path": "util/flash_ec",
"diff": "@@ -981,6 +981,9 @@ function flash_it83xx() {\ndut_control dut_i2c_mux:ec_prog\nfi\n+ # Ensure that the AP is off while we are flashing the EC\n+ servo_ec_hard_reset\n+\ninfo \"Close connection to ftdi_i2c ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | bip: ensure AP is off during EC flash
Hard reset the system right before flashing the EC to ensure that AP is
off while we are flashing the EC.
BRANCH=none
BUG=b:110410722
TEST=flash bip and verify that AP console is unresponsive.
Change-Id: I297f230c260ae5c3c1a8de8f0ea7c55a87606691
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1106655 |
136,208 | 19.06.2018 17:18:42 | -28,800 | 7711af5291b755cc55f38723b8fe4ae62fc211d1 | power/mt8183: Remove use of GPIO_PP1800_S0_EN.
TEST=make BOARD=kukui
BRANCH=None
Commit-Ready: Yilun Lin
Tested-by: Yilun Lin | [
{
"change_type": "MODIFY",
"old_path": "power/mt8183.c",
"new_path": "power/mt8183.c",
"diff": "@@ -69,13 +69,11 @@ static const struct power_seq_op s5s3_power_seq[] = {\n/* The power sequence for POWER_S3S0 */\nstatic const struct power_seq_op s3s0_power_seq[] = {\n{ GPIO_PP3300_S0_EN, 1, 0 },\n- {... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | power/mt8183: Remove use of GPIO_PP1800_S0_EN.
TEST=make BOARD=kukui
BUG=None
BRANCH=None
Change-Id: I09b8efb1215abfc53904a8ceb8273d88ef9fbbb1
Signed-off-by: Yilun Lin <yllin@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1105804
Commit-Ready: Yilun Lin <yllin@chromium.org>
Tested-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> |
136,197 | 21.06.2018 08:38:09 | -28,800 | 5d34998aeb78534ae7659778788cf6d2aec3d742 | test/host_command: Do not overflow req_buf
The test attempts to access req_buf outside of its bounds during
test_hostcmd_too_long, let's increase the buffer size.
BRANCH=none
TEST=make V=1 TEST_ASAN=y run-host_command -j | [
{
"change_type": "MODIFY",
"old_path": "test/host_command.c",
"new_path": "test/host_command.c",
"diff": "#include \"timer.h\"\n#include \"util.h\"\n+/* Request/response buffer size (and maximum command length) */\n+#define BUFFER_SIZE 128\n+\nstruct host_packet pkt;\n-static char resp_buf[128];\n-s... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | test/host_command: Do not overflow req_buf
The test attempts to access req_buf outside of its bounds during
test_hostcmd_too_long, let's increase the buffer size.
BRANCH=none
BUG=chromium:854924
TEST=make V=1 TEST_ASAN=y run-host_command -j
Change-Id: Ibacc080c9e961ad4eb56c17908e704796404a9ca
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1109614
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,197 | 21.06.2018 06:19:31 | -28,800 | 161501e092f9509aba66a1bd0217ef6661314dfe | chip/host/gpio.c: Fix out of bounds access
Check if signal is within bounds before accessing
gpio_irq_handlers[signal].
BRANCH=none
TEST=make TEST_ASAN=y runtests -j | [
{
"change_type": "MODIFY",
"old_path": "chip/host/gpio.c",
"new_path": "chip/host/gpio.c",
"diff": "@@ -43,13 +43,15 @@ test_mockable void gpio_set_level(enum gpio_signal signal, int value)\nconst struct gpio_info *g = gpio_list + signal;\nconst uint32_t flags = g->flags;\nconst int old_value = gpio... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | chip/host/gpio.c: Fix out of bounds access
Check if signal is within bounds before accessing
gpio_irq_handlers[signal].
BRANCH=none
BUG=chromium:854924
TEST=make TEST_ASAN=y runtests -j
Change-Id: Ia1ff9b34943ff596d27b2c746937f31623f58f96
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1109615
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,412 | 26.06.2018 01:03:15 | 25,200 | 8c0f1480713cf29b441a8097e818a76c51876659 | ectool: remove fpcheckpixels from help message
fpcheckpixels (checkerboard tests) is no longer implemented in ectool,
update the help message.
TEST=None
BRANCH=None | [
{
"change_type": "MODIFY",
"old_path": "util/ectool.c",
"new_path": "util/ectool.c",
"diff": "@@ -120,8 +120,6 @@ const char help_str[] =\n\" Reads from EC flash to a file\\n\"\n\" flashwrite <offset> <infile>\\n\"\n\" Writes to EC flash from a file\\n\"\n- \" fpcheckpixels\\n\"\n- \" Count the numb... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | ectool: remove fpcheckpixels from help message
fpcheckpixels (checkerboard tests) is no longer implemented in ectool,
update the help message.
BUG=None
TEST=None
BRANCH=None
Change-Id: Ib9d0e3760ed9c838c84f67b3900b22b5a5be5679
Signed-off-by: Nicolas Norvez <norvez@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1114679
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,197 | 27.06.2018 10:48:02 | -28,800 | 7d55645209d726c4140b439a6ea0de3957f694f8 | core/host/task: Fix task_set_event
task_set_event is expected to _add_ the event bit to the current
mask, not reset the whole mask.
Also, fix all operations to use atomics.
BRANCH=none
TEST=No more timeouts when running usb_pd fuzzing tests. | [
{
"change_type": "MODIFY",
"old_path": "core/host/task.c",
"new_path": "core/host/task.c",
"diff": "@@ -183,7 +183,7 @@ pthread_t task_get_thread(task_id_t tskid)\nuint32_t task_set_event(task_id_t tskid, uint32_t event, int wait)\n{\n- tasks[tskid].event = event;\n+ atomic_or(&tasks[tskid].event, e... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | core/host/task: Fix task_set_event
task_set_event is expected to _add_ the event bit to the current
mask, not reset the whole mask.
Also, fix all operations to use atomics.
BRANCH=none
BUG=chromium:854975
TEST=No more timeouts when running usb_pd fuzzing tests.
Change-Id: Id17428e15f6fb8b52891bed33281f866fbc2be8f
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1116624
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,338 | 26.06.2018 16:28:43 | 21,600 | 0fa6368a995418eb0298e63f3ed13501912c12ef | flash_ec: respect SERVOD_PORT
If the SERVOD_PORT variable is set, servod will use it as its default
port. This makes flash_ec also respect the variable.
TEST=SERVOD_PORT=9000 flash_ec --board=grunt
BRANCH=none | [
{
"change_type": "MODIFY",
"old_path": "util/flash_ec",
"new_path": "util/flash_ec",
"diff": "@@ -179,6 +179,8 @@ declare -A VALID_CHIP_COMBO\nVALID_CHIP_COMBO[\"grunt.npcx_uut\"]=\"ccd_cr50\"\nVALID_CHIP_COMBO[\"grunt.npcx_spi\"]=\"servo\"\n+DEFAULT_PORT=\"${SERVOD_PORT:-9999}\"\n+\n# Flags\nDEFINE... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | flash_ec: respect SERVOD_PORT
If the SERVOD_PORT variable is set, servod will use it as its default
port. This makes flash_ec also respect the variable.
BUG=none
TEST=SERVOD_PORT=9000 flash_ec --board=grunt
BRANCH=none
Change-Id: Ic4ae28b3632faa326b81be85bf807c39dac1cf7c
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1116865
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,399 | 29.06.2018 14:58:48 | 21,600 | a2ef0dabfcec633d92d40a817b31dd167246bc3c | bobba: initial files commit
The contents of Bobba are copied from yorp, with the exception of
board.c and gpio.inc, which were modified to always use V1 settings.
Bobba proto is equivalent to yorp proto2.
BRANCH=none
TEST=build | [
{
"change_type": "ADD",
"old_path": null,
"new_path": "board/bobba/battery.c",
"diff": "+/* Copyright 2018 The Chromium OS Authors. All rights reserved.\n+ * Use of this source code is governed by a BSD-style license that can be\n+ * found in the LICENSE file.\n+ *\n+ * Battery pack vendor provided ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | bobba: initial files commit
The contents of Bobba are copied from yorp, with the exception of
board.c and gpio.inc, which were modified to always use V1 settings.
Bobba proto is equivalent to yorp proto2.
BRANCH=none
BUG=b:110781720
TEST=build
Change-Id: I10937ef6eb8b20fc5e58c3871c679fc80bdcca70
Signed-off-by: Justin TerAvest <teravest@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1121110
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,197 | 02.07.2018 15:04:29 | -28,800 | 9520460224e391bb747149bcc14da0d155088d83 | kukui: GPIO fixups, and mirror AP watchdog input to output
We can do more complicated things with the watchdog signal in the
future.
Also fix a bunch of GPIO signals after review.
BRANCH=none
TEST=make BOARD=kukui -j | [
{
"change_type": "MODIFY",
"old_path": "board/kukui/board.c",
"new_path": "board/kukui/board.c",
"diff": "@@ -62,9 +62,14 @@ static void warm_reset_request_interrupt(enum gpio_signal signal)\nstatic void ap_watchdog_interrupt(enum gpio_signal signal)\n{\n- CPRINTS(\"AP watchdog triggered.\");\n- cfl... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | kukui: GPIO fixups, and mirror AP watchdog input to output
We can do more complicated things with the watchdog signal in the
future.
Also fix a bunch of GPIO signals after review.
BRANCH=none
BUG=b:109900671
TEST=make BOARD=kukui -j
Change-Id: I8c9998dbec2c15d2aedd3c5d299e502d42b663fe
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1122137
Reviewed-by: Yilun Lin <yllin@chromium.org> |
136,305 | 02.07.2018 13:13:50 | 21,600 | 36a62bd63bb74183c74bf4987ab6ed2af9119fa9 | bip: comment fix to clarify GPIO pins
The bip schematics name the LEDs with "_L", which would seem to imply
they are active low but they are actually active high.
BRANCH=none
TEST=make buildall | [
{
"change_type": "MODIFY",
"old_path": "board/bip/gpio.inc",
"new_path": "board/bip/gpio.inc",
"diff": "@@ -102,8 +102,8 @@ GPIO(USB_C1_PD_RST_ODL, PIN(L, 7), GPIO_ODR_HIGH) /* C1 PD Reset */\nGPIO(USB2_OTG_ID, PIN(I, 2), GPIO_OUT_LOW) /* OTG ID */\n/* LED */\n-GPIO(BAT_LED_ORANGE, PIN(A, 6), GPIO_O... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | bip: comment fix to clarify GPIO pins
The bip schematics name the LEDs with "_L", which would seem to imply
they are active low but they are actually active high.
BRANCH=none
BUG=none
TEST=make buildall
Change-Id: I03fe9cbf093753a53559d768cede62339da111f2
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1123112
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,419 | 26.06.2018 14:39:17 | 25,200 | d915b701cae9cd6aca74effbec2b99907d7a06c7 | Update signed_header.h with additional fields.
BRANCH=none
TEST=make buildall -J
Tested-by: Marius Schilder | [
{
"change_type": "MODIFY",
"old_path": "chip/g/signed_header.h",
"new_path": "chip/g/signed_header.h",
"diff": "@@ -45,12 +45,36 @@ struct SignedHeader {\nuint32_t err_response_;\n/* action to take when expectation is violated */\nuint32_t expect_response_;\n- /*\n- * Padding to bring the total stru... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Update signed_header.h with additional fields.
BRANCH=none
BUG=None
TEST=make buildall -J
Change-Id: Ic5590bea4577c1d249cb628389fb930ef20fc9d2
Signed-off-by: Kor Nielsen <kor@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1115906
Tested-by: Marius Schilder <mschilder@chromium.org>
Reviewed-by: Marius Schilder <mschilder@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org> |
136,234 | 03.07.2018 10:16:58 | 25,200 | b08b87c54440ddb51fbfbcd9d5dffda5320ec09e | driver: Add driver header for it8300 I/O port controller
BRANCH=none
TEST=Manually tested on GLKRVP using ITE eval board, i2cxfer works
Commit-Ready: Vijay P Hiremath
Tested-by: Vijay P Hiremath | [
{
"change_type": "ADD",
"old_path": null,
"new_path": "driver/ioexpander_it8300.h",
"diff": "+/* Copyright 2018 The Chromium OS Authors. All rights reserved.\n+ * Use of this source code is governed by a BSD-style license that can be\n+ * found in the LICENSE file.\n+ *\n+ * ITE IT8300 I/O Port expa... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | driver: Add driver header for it8300 I/O port controller
BUG=b:111107786
BRANCH=none
TEST=Manually tested on GLKRVP using ITE eval board, i2cxfer works
Change-Id: I74055a1138516e1364779fbb0758251c70792c3d
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1123216
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,197 | 05.07.2018 08:20:42 | -28,800 | e9fdbf8030ecc1123b4dccab0562e9f9c29ed2b5 | meowth_fp: Update SPIID for nocturne
On nocturne, the FP controller device name is spi-PRP0001:02.
BRANCH=none
TEST=flash_fp_mcu ec.bin | [
{
"change_type": "MODIFY",
"old_path": "board/meowth_fp/flash_fp_mcu",
"new_path": "board/meowth_fp/flash_fp_mcu",
"diff": "# Use of this source code is governed by a BSD-style license that can be\n# found in the LICENSE file.\n-# GSPI1 ACPI device for FP MCU\n-SPIID=\"spi-PRP0001:01\"\n-\n# Cannonl... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | meowth_fp: Update SPIID for nocturne
On nocturne, the FP controller device name is spi-PRP0001:02.
BRANCH=none
BUG=b:111144409
TEST=flash_fp_mcu ec.bin
Change-Id: Ie356bc824248e8a629a4317d5e40483e5bae4185
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1126582
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,197 | 06.07.2018 12:50:27 | -28,800 | 7d095691d8e5b445979518e0bccdc0438e397aab | flash_fp_mcu: Unlock flash before programming it
Also, add a short sleep before stm32mon, which seems to make
programming more reliable.
BRANCH=none
TEST=bash flash_fp_mcu ec.bin works on first attempt with protected
flash. | [
{
"change_type": "MODIFY",
"old_path": "board/meowth_fp/flash_fp_mcu",
"new_path": "board/meowth_fp/flash_fp_mcu",
"diff": "@@ -69,8 +69,9 @@ echo \"in\" > /sys/class/gpio/gpio${GPIO_NRST}/direction\necho \"${SPIID}\" > /sys/bus/spi/drivers/cros-ec-spi/bind\necho \"${SPIID}\" > /sys/bus/spi/drivers/... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | flash_fp_mcu: Unlock flash before programming it
Also, add a short sleep before stm32mon, which seems to make
programming more reliable.
BRANCH=none
BUG=none
TEST=bash flash_fp_mcu ec.bin works on first attempt with protected
flash.
Change-Id: Iccb815186aaa13395eac8efb4e25edb74549ed30
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1127799
Reviewed-by: Nicolas Norvez <norvez@chromium.org> |
136,197 | 09.07.2018 11:19:36 | -28,800 | 0ceecc93aa1a52f69625eebfb729d77713b0a898 | meowth_fp: flash_fp_mpu: Make sure WP is deasserted
BRANCH=none
TEST=flash_fp_mcu complains if WP is asserted | [
{
"change_type": "MODIFY",
"old_path": "board/meowth_fp/flash_fp_mcu",
"new_path": "board/meowth_fp/flash_fp_mcu",
"diff": "@@ -43,6 +43,11 @@ if [ ! -f \"$1\" ]; then\nexit 1\nfi\n+if ectool gpioget EC_WP_L | grep -q '= 0'; then\n+ echo \"Please make sure WP is deasserted.\"\n+ exit 1\n+fi\n+\n# En... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | meowth_fp: flash_fp_mpu: Make sure WP is deasserted
BRANCH=none
BUG=none
TEST=flash_fp_mcu complains if WP is asserted
Change-Id: I2a84e568fdd54636c357857c4e70be45557635cb
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1128783
Reviewed-by: Nicolas Norvez <norvez@chromium.org> |
136,197 | 09.07.2018 13:37:34 | -28,800 | 8757ee93e732dd49f50a4016b16f926857ab7e02 | rollback: Fix compile warning when local entropy is disabled.
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/rollback.c",
"new_path": "common/rollback.c",
"diff": "@@ -168,8 +168,10 @@ static int add_entropy(uint8_t *dst, const uint8_t *src,\nBUILD_ASSERT(SHA256_DIGEST_SIZE == CONFIG_ROLLBACK_SECRET_SIZE);\nstruct sha256_ctx ctx;\nuint8_t *hash;\n+#ifdef CONFI... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | rollback: Fix compile warning when local entropy is disabled.
BRANCH=none
BUG=b:111190988
TEST=make buildall -j
Change-Id: I9cea8ce0270ca8a3f4fd33663d78d7d7c5b93643
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1128784
Reviewed-by: Randall Spangler <rspangler@chromium.org> |
136,208 | 11.07.2018 12:45:34 | -28,800 | b2fbe4c24610fda7314361c2efab31c7ae7aca8a | charger/mt6370: Support RGB LED.
TEST=test on EVB, and checks the led blinks accordingly.
BRANCH=none
Commit-Ready: Yilun Lin
Tested-by: Yilun Lin | [
{
"change_type": "MODIFY",
"old_path": "driver/charger/rt946x.c",
"new_path": "driver/charger/rt946x.c",
"diff": "@@ -981,3 +981,69 @@ int rt946x_enable_charge_termination(int en)\nreturn (en ? rt946x_set_bit : rt946x_clr_bit)\n(RT946X_REG_CHGCTRL2, RT946X_MASK_TE);\n}\n+\n+#ifdef CONFIG_CHARGER_MT6... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | charger/mt6370: Support RGB LED.
TEST=test on EVB, and checks the led blinks accordingly.
BUG=b:80160408
BRANCH=none
Change-Id: Id0a06f51fd6369daa42e080af5e705321b93c732
Signed-off-by: Yilun Lin <yllin@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1132723
Commit-Ready: Yilun Lin <yllin@chromium.org>
Tested-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> |
136,208 | 11.07.2018 12:45:24 | -28,800 | 56f742bed06c2247803b198875247875d02632a4 | kukui: Add LED behavior.
Add simple LED rules.
Charge: red
Discharge under 10 percent: blink red
Full: green
Idle: red or green breath.
TEST=none
BRANCH=none
Commit-Ready: Yilun Lin
Tested-by: Yilun Lin | [
{
"change_type": "MODIFY",
"old_path": "board/kukui/led.c",
"new_path": "board/kukui/led.c",
"diff": "*TODO(b:80160408): Implement mt6370 led driver.\n*/\n+#include \"battery.h\"\n+#include \"charge_state.h\"\n+#include \"driver/charger/rt946x.h\"\n#include \"hooks.h\"\n#include \"led_common.h\"\n-/... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | kukui: Add LED behavior.
Add simple LED rules.
Charge: red
Discharge under 10 percent: blink red
Full: green
Idle: red or green breath.
BUG=b:80160408
TEST=none
BRANCH=none
Change-Id: I1d3a75dadb92e0dbf617a132990e3a0c4da66461
Signed-off-by: Yilun Lin <yllin@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1126748
Commit-Ready: Yilun Lin <yllin@chromium.org>
Tested-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> |
136,228 | 10.07.2018 21:46:40 | 25,200 | 1f01861126587b8ee8b5634d538a799295d87dc7 | yorp: Enable tablet mode
BRANCH=None
TEST=Verified that Chrome enables auto-rotation when lid angle is
>180.
Commit-Ready: Furquan Shaikh
Tested-by: Furquan Shaikh | [
{
"change_type": "MODIFY",
"old_path": "board/yorp/board.h",
"new_path": "board/yorp/board.h",
"diff": "#define CONFIG_LID_ANGLE_UPDATE\n#define CONFIG_LID_ANGLE_SENSOR_BASE BASE_ACCEL\n#define CONFIG_LID_ANGLE_SENSOR_LID LID_ACCEL\n+#define CONFIG_LID_ANGLE_TABLET_MODE\n+#define CONFIG_LID_ANGLE_IN... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | yorp: Enable tablet mode
BUG=b:111264961
BRANCH=None
TEST=Verified that Chrome enables auto-rotation when lid angle is
>180.
Change-Id: I05b14214c8efb02dcd6168b3aff08317e8ddcd30
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1132686
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,420 | 04.07.2018 17:21:09 | -7,200 | 7e972ab9860d594c0db9d4c2df1742a96f64bc67 | assert/panic: mark noreturn to inform the compiler
BRANCH=none
TEST=buildall with gcc8.1 stops failing on this family of functions
Commit-Ready: Patrick Georgi
Tested-by: Patrick Georgi | [
{
"change_type": "MODIFY",
"old_path": "builtin/assert.h",
"new_path": "builtin/assert.h",
"diff": "#ifdef CONFIG_DEBUG_ASSERT_REBOOTS\n#ifdef CONFIG_DEBUG_ASSERT_BRIEF\n-extern void panic_assert_fail(const char *fname, int linenum);\n+extern void panic_assert_fail(const char *fname, int linenum)\n+... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | assert/panic: mark noreturn to inform the compiler
BUG=b:65441143
BRANCH=none
TEST=buildall with gcc8.1 stops failing on this family of functions
Change-Id: I44f9d643e46f955ea0cd0b5893c2806a4e3f52b0
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1126315
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@chromium.org> |
136,420 | 04.07.2018 17:02:24 | -7,200 | 72b83f6b6c89da81248d76c25d2f7ba3066b6acf | Makefile.rules: only update version.h timestamp if it changed
BRANCH=none
TEST=buildall with no change is much faster now (no relinking of
ec.*.elf)
Commit-Ready: Patrick Georgi
Tested-by: Patrick Georgi | [
{
"change_type": "MODIFY",
"old_path": "Makefile.rules",
"new_path": "Makefile.rules",
"diff": "@@ -84,7 +84,8 @@ cmd_c_to_host = $(HOSTCC) $(HOST_CFLAGS) $(HOST_LDFLAGS) -MMD -MF $@.d -o $@ \\\ncmd_cxx_to_host = $(HOSTCXX) -std=c++0x $(COMMON_WARN) $(HOST_CXXFLAGS)\\\n-I ./$($(notdir $@)_ROOT) -o $... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Makefile.rules: only update version.h timestamp if it changed
BUG=none
BRANCH=none
TEST=buildall with no change is much faster now (no relinking of
ec.*.elf)
Change-Id: I844b5f6836462efaa98a1d26edcaf8f8a3c47567
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1126316
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,401 | 11.07.2018 16:03:55 | 21,600 | d539328b3fc5d29afe591001ce78cc3a97682be8 | Grunt: Elide obsolete GPIO configuration.
BRANCH=none
TEST=make -j buildall
Commit-Ready: Jonathan Brandmeyer
Tested-by: Jonathan Brandmeyer | [
{
"change_type": "MODIFY",
"old_path": "board/grunt/gpio.inc",
"new_path": "board/grunt/gpio.inc",
"diff": "@@ -78,7 +78,6 @@ GPIO(USB_C1_OC_L_V2, PIN(7, 2), GPIO_INPUT) /* C1 Over Current */\nGPIO(USB_C0_PD_RST_L_V0, PIN(F, 1), GPIO_INPUT) /* C0 PD Reset */\nGPIO(USB_C0_PD_RST_L_V2, PIN(3, 2), GPIO... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Grunt: Elide obsolete GPIO configuration.
BRANCH=none
BUG=none
TEST=make -j buildall
Signed-off-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
Change-Id: I2beb407e39acd49755982587b8de6602b7e00f4e
Reviewed-on: https://chromium-review.googlesource.com/1136712
Commit-Ready: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
Tested-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,197 | 13.07.2018 14:56:12 | -28,800 | 220d6884b3a00bb3067a4fdcbaf5b6e2b4f891fe | rwsig: If RW cannot be locked separately, always increment rollback
BRANCH=none
TEST=Lock RO, flash RW images of increasing CONFIG_ROLLBACK_VERSION,
see that rollback minimum version is incremented in
rollbackinfo. | [
{
"change_type": "MODIFY",
"old_path": "common/rwsig.c",
"new_path": "common/rwsig.c",
"diff": "@@ -199,11 +199,14 @@ int rwsig_check_signature(void)\n* if rollback information should be updated.\n*\n* When system is locked, we only increment the rollback if RW is\n- * currently protected.\n+ * curr... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | rwsig: If RW cannot be locked separately, always increment rollback
BRANCH=none
BUG=b:111190988
TEST=Lock RO, flash RW images of increasing CONFIG_ROLLBACK_VERSION,
see that rollback minimum version is incremented in
rollbackinfo.
Change-Id: I48ee68d37098b74478432db9bf84dc96d1ef2dd8
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1137981
Reviewed-by: Randall Spangler <rspangler@chromium.org> |
136,197 | 17.07.2018 10:03:26 | -28,800 | 8d6bbaf73d3271ee3ae74b22e2bf3bd5b8fba3e8 | ectool: Allow for chips with more than 1 MB of flash
ectool currently assumes any offset >= 0x100000 (1MB) is invalid,
this is not true on STM32H7.
BRANCH=none
TEST=ectool --name=cros_fp flasherase 0x120000 131072 does not fail
with "Bad offset." | [
{
"change_type": "MODIFY",
"old_path": "util/ectool.c",
"new_path": "util/ectool.c",
"diff": "#include \"ps8xxx.h\"\n#include \"usb_pd.h\"\n+/* Maximum flash size (16 MB, conservative) */\n+#define MAX_FLASH_SIZE 0x1000000\n+\n/* Command line options */\nenum {\nOPT_DEV = 1000,\n@@ -676,7 +679,7 @@ ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | ectool: Allow for chips with more than 1 MB of flash
ectool currently assumes any offset >= 0x100000 (1MB) is invalid,
this is not true on STM32H7.
BRANCH=none
BUG=none
TEST=ectool --name=cros_fp flasherase 0x120000 131072 does not fail
with "Bad offset."
Change-Id: I5f8e29b03dbc4c1a3f1566b0e78d4466f4a44565
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1139951
Reviewed-by: Randall Spangler <rspangler@chromium.org> |
136,230 | 16.07.2018 18:33:50 | 25,200 | d73d3d2d97fc14d31fb133ee6bce367a9aa97d83 | nautilus: Remove the unused GPIO USB_POWERON_L
BRANCH=poppy
TEST=manually confirm USB-A port still works
Commit-Ready: Philip Chen
Tested-by: Philip Chen | [
{
"change_type": "MODIFY",
"old_path": "board/nautilus/board.c",
"new_path": "board/nautilus/board.c",
"diff": "@@ -741,8 +741,6 @@ DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_chipset_suspend, HOOK_PRIO_DEFAULT);\nstatic void board_chipset_startup(void)\n{\n- /* Power On USB-A port */\n- gpio_set_level... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | nautilus: Remove the unused GPIO USB_POWERON_L
BUG=b:111433611
BRANCH=poppy
TEST=manually confirm USB-A port still works
Change-Id: I70146f696056e526df08831847650710dea4a8ae
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1139400
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org> |
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