author int64 658 755k | date stringlengths 19 19 | timezone int64 -46,800 43.2k | hash stringlengths 40 40 | message stringlengths 5 490 | mods list | language stringclasses 20 values | license stringclasses 3 values | repo stringlengths 5 68 | original_message stringlengths 12 491 |
|---|---|---|---|---|---|---|---|---|---|
136,443 | 31.07.2019 10:30:05 | 25,200 | 5866ec2921784004f66f9a0407f97c1659d674fb | mock: Add fp_sensor and mkbp_events mocks
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/fpsensor/build.mk",
"new_path": "common/fpsensor/build.mk",
"diff": "@@ -12,6 +12,6 @@ all-obj-$(HAS_TASK_FPSENSOR)+=$(_fpsensor_dir)fpsensor_crypto.o\nifneq ($(CONFIG_SPI_FP_PORT),)\nall-obj-$(HAS_TASK_FPSENSOR)+=$(_fpsensor_dir)fpsensor.o\nendif\n-ife... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | mock: Add fp_sensor and mkbp_events mocks
BRANCH=none
BUG=b:116065496
TEST=make buildall -j
Change-Id: Ia723d98354ca027f41f1b3c00d6a2dac500edbf8
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1715633
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Commit-Queue: Sean Abraham <seanabraham@chromium.org> |
136,427 | 10.10.2019 15:55:02 | 21,600 | d2ad17f646df75d56220b6b3724d68d2a108fc99 | Trembyle: Add CONFIG_USB_PORT_POWER_SMART for USB-A ports
Trembyle uses IO expander for USB-A VBUS enable and current limit GPIOs.
BRANCH=none
TEST=USB-A VBUS gets enabled on Trembyle | [
{
"change_type": "MODIFY",
"old_path": "baseboard/zork/baseboard.c",
"new_path": "baseboard/zork/baseboard.c",
"diff": "@@ -482,6 +482,11 @@ struct ioexpander_config_t ioex_config[] = {\nBUILD_ASSERT(ARRAY_SIZE(ioex_config) == USBC_PORT_COUNT);\nBUILD_ASSERT(CONFIG_IO_EXPANDER_PORT_COUNT == USBC_POR... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Trembyle: Add CONFIG_USB_PORT_POWER_SMART for USB-A ports
Trembyle uses IO expander for USB-A VBUS enable and current limit GPIOs.
BUG=b:138600691
BRANCH=none
TEST=USB-A VBUS gets enabled on Trembyle
Change-Id: I87b96cc6ce0b0a8ed077425556d838cb55075749
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1854780
Reviewed-by: Denis Brockus <dbrockus@chromium.org> |
136,331 | 25.10.2019 17:18:32 | 21,600 | 0f6d238844a75756e660959a0c2051f397682ae6 | drallion_ish: correct lid accelerometer rotation matrix
Z axis was inverted.
BRANCH=none
TEST=use ectool to verify sane values at various lid angles | [
{
"change_type": "MODIFY",
"old_path": "board/drallion_ish/board.c",
"new_path": "board/drallion_ish/board.c",
"diff": "@@ -45,7 +45,7 @@ static struct lis2mdl_private_data lis2mdl_a_data;\n/* Matrix to rotate lid sensor into standard reference frame */\nconst mat33_fp_t lid_rot_ref = {\n{ FLOAT_TO_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | drallion_ish: correct lid accelerometer rotation matrix
Z axis was inverted.
BUG=b:140311300
BRANCH=none
TEST=use ectool to verify sane values at various lid angles
Change-Id: I48863fc336474f34e123ee37f495aff35251b111
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1881930
Reviewed-by: Mathew King <mathewk@chromium.org> |
136,205 | 21.10.2019 17:31:36 | -28,800 | 6841c7835416d03aefb939ff94b3e9221e81c355 | helios: Remove ALS OPT3001 configuration
Helios does not have an ambient light sensor (ALS).
Remove the ALS OPT3001 configuration.
BRANCH=None
TEST=Manual
Check EC console message. | [
{
"change_type": "MODIFY",
"old_path": "board/helios/board.c",
"new_path": "board/helios/board.c",
"diff": "@@ -202,12 +202,6 @@ static struct bmi160_drv_data_t g_bmi160_data;\n/* BMA255 private data */\nstatic struct accelgyro_saved_data_t g_bma255_data;\n-static struct opt3001_drv_data_t g_opt3001... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | helios: Remove ALS OPT3001 configuration
Helios does not have an ambient light sensor (ALS).
Remove the ALS OPT3001 configuration.
BUG=b:142881461
BRANCH=None
TEST=Manual
Check EC console message.
Change-Id: I91b94b3f9842621fc7b70e8dc9e84533174febfd
Signed-off-by: Michael5 Chen <michael5_chen@pegatroncorp.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1871491
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> |
136,330 | 24.10.2019 12:10:29 | 21,600 | 1c1d60aa956d7aa015210384fd225b8ae08456f1 | volteer: Remove ISR todo
There is no need to change the ISR for RSMRST, so remove the todo.
TEST=make buildall
BRANCH=none | [
{
"change_type": "MODIFY",
"old_path": "board/volteer/gpio.inc",
"new_path": "board/volteer/gpio.inc",
"diff": "@@ -20,7 +20,6 @@ GPIO_INT(SLP_S0_L, PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt)\nGPIO_INT(SLP_S3_L, PIN(A, 5), GPIO_INT_BOTH, power_signal_interrupt)\n#endif\nGPIO_INT(SLP_SUS_L, PI... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | volteer: Remove ISR todo
There is no need to change the ISR for RSMRST, so remove the todo.
BUG=b:139553375
TEST=make buildall
BRANCH=none
Change-Id: I3ccc5c80432aa085f8492b96446456bf0ef1c1a4
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1881755
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,269 | 18.10.2019 13:00:05 | 25,200 | 24b8b215065de2e3de9a5531976e32fe62313de8 | fpsensor: Clean up headers and Makefiles
We no longer need the various levels of indirection since the source
files are public.
BRANCH=none
TEST=make buildall -j
Cq-Depend: chrome-internal:2005128 | [
{
"change_type": "MODIFY",
"old_path": "driver/fingerprint/fpc/bep/build.mk",
"new_path": "driver/fingerprint/fpc/bep/build.mk",
"diff": "@@ -10,14 +10,8 @@ _bep_cur_dir:=$(dir $(lastword $(MAKEFILE_LIST)))\n# Make sure output directory is created (in build directory)\ndirs-y+=\"$(_bep_cur_dir)\"\n-... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | fpsensor: Clean up headers and Makefiles
We no longer need the various levels of indirection since the source
files are public.
BRANCH=none
BUG=b:137848573
TEST=make buildall -j
Cq-Depend: chrome-internal:2005128
Change-Id: I7483c233dc54c5dbf2907441365feffc9ae9f0a5
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1869533 |
136,443 | 25.10.2019 15:56:48 | 25,200 | 6e4478cbb18a0b45df89c89ea931d1bc86df9c1a | make: Add utils to help message
BRANCH=none
TEST=make help | [
{
"change_type": "MODIFY",
"old_path": "Makefile.rules",
"new_path": "Makefile.rules",
"diff": "@@ -676,6 +676,7 @@ help:\n@echo \" proj-<boardname> - Build a single board (similar to 'all BOARD=boardname')\"\n@echo \" savesizes - Save the filesizes of currently built boards for comparison\"\n@echo ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | make: Add utils to help message
BRANCH=none
BUG=none
TEST=make help
Change-Id: I912e54927e3e307180e8d80e78105fdfdd6c9dfb
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1880322
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,275 | 28.10.2019 16:39:03 | -28,800 | 67f04ec31380936802f8851eaa8be74495ac5b3b | usb_pd: fix an unit in log message.
From USB PD spec, the voltages encoded in PDO is in 50mV units, not 50V
units.
TEST=None
BRANCH=none | [
{
"change_type": "MODIFY",
"old_path": "common/usb_pd_policy.c",
"new_path": "common/usb_pd_policy.c",
"diff": "@@ -80,7 +80,7 @@ int pd_check_requested_voltage(uint32_t rdo, const int port)\nif (max_ma > pdo_ma && !(rdo & RDO_CAP_MISMATCH))\nreturn EC_ERROR_INVAL; /* too much max current */\n- CPRI... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | usb_pd: fix an unit in log message.
From USB PD spec, the voltages encoded in PDO is in 50mV units, not 50V
units.
BUG=None
TEST=None
BRANCH=none
Change-Id: I20ea308c954fc407b313dd3923ab0112b520108c
Signed-off-by: Pi-Hsun Shih <pihsun@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1880777
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,278 | 24.10.2019 22:22:24 | 25,200 | 1b54e57c7e7bf50dbf31f24fe5a4c293d6698ffd | usb_pd_protocol: disable VBUS when suspending PD task
when we suspend a port's PD task, we should also shut off VBUS on that
port.
BRANCH=none
TEST=ectool pdcontrol suspend now shuts off VBUS | [
{
"change_type": "MODIFY",
"old_path": "common/usb_pd_protocol.c",
"new_path": "common/usb_pd_protocol.c",
"diff": "@@ -3810,6 +3810,7 @@ void pd_task(void *u)\npd_hw_release(port);\npd_power_supply_reset(port);\n#else\n+ pd_power_supply_reset(port);\nrstatus = tcpm_release(port);\nif (rstatus != 0 ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | usb_pd_protocol: disable VBUS when suspending PD task
when we suspend a port's PD task, we should also shut off VBUS on that
port.
BUG=b:143330980
BRANCH=none
TEST=ectool pdcontrol suspend now shuts off VBUS
Change-Id: Iba20586e07514276c29a91e567bf6abde8f97056
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1886450
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,208 | 30.10.2019 16:19:14 | -28,800 | 4548b81d8ec8d58339c7981c81f9edae5dd91c6f | battery/mm8013: Fix reversed WANT_CHG flag.
battery_flag()'s return code is 0 on success.
TEST=see allowing charge in command battery
BRANCH=kukui | [
{
"change_type": "MODIFY",
"old_path": "driver/battery/mm8013.c",
"new_path": "driver/battery/mm8013.c",
"diff": "@@ -212,12 +212,12 @@ void battery_get_params(struct batt_params *batt)\nif (battery_full_charge_capacity(&batt_new.full_capacity))\nbatt_new.flags |= BATT_FLAG_BAD_FULL_CAPACITY;\n- if ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | battery/mm8013: Fix reversed WANT_CHG flag.
battery_flag()'s return code is 0 on success.
TEST=see allowing charge in command battery
BUG=None
BRANCH=kukui
Change-Id: I26d6a69deadca1ad5a0f5d7faaa031ed0dffe78d
Signed-off-by: Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1888004
Reviewed-by: Ting Shen <phoenixshen@chromium.org> |
136,324 | 30.10.2019 10:43:08 | 21,600 | e0f25be8962020e9836790ee2078720f16191238 | trembyle: temperature sensor changes
Changed when thermistors will be valid
Changed temperature limits for CPU
BRANCH=none
TEST=manual verification on trembyle | [
{
"change_type": "MODIFY",
"old_path": "baseboard/zork/baseboard.c",
"new_path": "baseboard/zork/baseboard.c",
"diff": "@@ -561,17 +561,45 @@ static const struct thermistor_info thermistor_info = {\nstatic int board_get_temp(int idx, int *temp_k)\n{\n- /* idx is the sensor index set below in temp_se... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | trembyle: temperature sensor changes
Changed when thermistors will be valid
Changed temperature limits for CPU
BUG=b:143611482
BRANCH=none
TEST=manual verification on trembyle
Change-Id: Iab72844ebee21356a045e57d97ce253f3d23abef
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1890917
Commit-Queue: Edward Hill <ecgh@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org> |
136,311 | 29.10.2019 14:56:16 | 21,600 | 510df8cb6ae9f78fea9a5f8bbac09c5d131ad357 | cometlake: cleanup power signal names
Add X86 prefix to the Comet Lake signals names for consistency with
other Intel APs.
BRANCH=none
TEST=make buildall | [
{
"change_type": "MODIFY",
"old_path": "baseboard/hatch/baseboard.h",
"new_path": "baseboard/hatch/baseboard.h",
"diff": "#define CONFIG_BACKLIGHT_LID\n#define GPIO_ENABLE_BACKLIGHT GPIO_EDP_BKLTEN_OD\n-#define PP5000_PGOOD_POWER_SIGNAL_MASK POWER_SIGNAL_MASK(PP5000_A_PGOOD)\n+#define PP5000_PGOOD_P... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cometlake: cleanup power signal names
Add X86 prefix to the Comet Lake signals names for consistency with
other Intel APs.
BUG=none
BRANCH=none
TEST=make buildall
Change-Id: I70b2a261fd6fbc0e6de70e5d4cf3a90b35078d4e
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1888596
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org> |
136,278 | 24.10.2019 21:00:26 | 25,200 | adc5678d1979b4f2bd52a5d70b5f0a08cefad8f9 | tcpci: fix tcpc_alert error message
this adds a missing newline to the end of a CPRINTF format string.
BRANCH=none
TEST=builall passes | [
{
"change_type": "MODIFY",
"old_path": "driver/tcpm/tcpci.c",
"new_path": "driver/tcpm/tcpci.c",
"diff": "@@ -662,8 +662,8 @@ void tcpci_tcpc_alert(int port)\n/* Ensure we don't loop endlessly */\nif (failed_attempts >= MAX_ALLOW_FAILED_RX_READS) {\n- CPRINTF(\"C%d Cannot consume RX buffer after %d ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | tcpci: fix tcpc_alert error message
this adds a missing newline to the end of a CPRINTF format string.
BRANCH=none
BUG=none
TEST=builall passes
Change-Id: I4a380983bce107af7a0f6eb7304bb9090c5b621a
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1886033
Reviewed-by: Caveh Jalali <caveh@google.com>
Commit-Queue: Sean Abraham <seanabraham@chromium.org> |
136,278 | 25.10.2019 02:40:51 | 25,200 | 7dece1affb2b8bcaa449743937c55774a0aa2ee0 | atlas: fix charger selection messages
this corrects the printed text and switches from CPRINTF to CPRINTS
for time stamping.
BRANCH=none
TEST=buildall passes | [
{
"change_type": "MODIFY",
"old_path": "board/atlas/board.c",
"new_path": "board/atlas/board.c",
"diff": "@@ -488,11 +488,11 @@ int board_set_active_charge_port(int charge_port)\nGPIO_USB_C0_5V_EN : GPIO_USB_C1_5V_EN);\nif (is_real_port && is_source) {\n- CPRINTF(\"No charging on source port p%d is ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | atlas: fix charger selection messages
this corrects the printed text and switches from CPRINTF to CPRINTS
for time stamping.
BRANCH=none
BUG=none
TEST=buildall passes
Change-Id: I4647ef4348a44d3eb433afa96ad04f2483899bc0
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1886034
Commit-Queue: Sean Abraham <seanabraham@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,311 | 31.10.2019 13:40:53 | 21,600 | 65294881b3aee9f47b649cc9a2320a1c3f5ab9f9 | gpio: add function to set a GPIO and log to the console
Add a common function gpio_set_level_verbose() to generate a cprints()
statement prior to changing the GPIO pin level.
BRANCH=none
TEST=make buildall | [
{
"change_type": "MODIFY",
"old_path": "common/gpio.c",
"new_path": "common/gpio.c",
"diff": "@@ -196,6 +196,14 @@ int gpio_power_down_module(enum module_id id)\n}\n#endif /* #ifdef CONFIG_GPIO_POWER_DOWN */\n+void gpio_set_level_verbose(enum console_channel channel,\n+ enum gpio_signal signal, int ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | gpio: add function to set a GPIO and log to the console
Add a common function gpio_set_level_verbose() to generate a cprints()
statement prior to changing the GPIO pin level.
BUG=none
BRANCH=none
TEST=make buildall
Change-Id: I6b3a9e89604fb721d8fa5208ce96df9e9414cdf9
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1893633
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,311 | 31.10.2019 13:43:41 | 21,600 | 36d36bafc2ff53efbed0fb1638c82fca07e17dc1 | volteer: Add manual power sequencing
As backup if board driven power sequencing doesn't work, implement EC
controlled power sequencing on Volteer.
BRANCH=none
TEST=make buildall
TEST=make BOARD=volteer VOLTEER_POWER_SEQUENCE=y | [
{
"change_type": "MODIFY",
"old_path": "board/volteer/board.h",
"new_path": "board/volteer/board.h",
"diff": "#include \"gpio_signal.h\"\n#include \"registers.h\"\n+/* TODO: b/143375057 - Remove this code after power on. */\n+void c10_gate_change(enum gpio_signal signal);\n#endif /* !__ASSEMBLER__ *... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | volteer: Add manual power sequencing
As backup if board driven power sequencing doesn't work, implement EC
controlled power sequencing on Volteer.
BUG=b:140556273
BRANCH=none
TEST=make buildall
TEST=make BOARD=volteer VOLTEER_POWER_SEQUENCE=y
Change-Id: I62e30e5f153085e2e6c26005a77e2e1abe981b0a
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1881754
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,447 | 01.11.2019 11:30:41 | -39,600 | e7599590e8e5b7510f9a1b0a76665fc753828070 | puff: populate ADCs and temperature sensors
Several analog channels are needed for power sequencing, and may as well
fill them all in while we're here.
TEST=image builds and links
BRANCH=None | [
{
"change_type": "MODIFY",
"old_path": "board/puff/board.c",
"new_path": "board/puff/board.c",
"diff": "@@ -72,6 +72,64 @@ const struct i2c_port_t i2c_ports[] = {\n};\nconst unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);\n+const struct adc_t adc_channels[] = {\n+ [ADC_SNS_PP3300] = { /* 9/11 v... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | puff: populate ADCs and temperature sensors
Several analog channels are needed for power sequencing, and may as well
fill them all in while we're here.
BUG=b:143188569
TEST=image builds and links
BRANCH=None
Change-Id: I99c2def362b11bef0748adfe11cc7356bb1591c6
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1893016
Reviewed-by: Andrew McRae <amcrae@chromium.org> |
136,391 | 03.11.2019 17:41:16 | -28,800 | 8b54f65a87e93b427cdfd0b21de0936d547dc8cb | Kodama: Modify celxpert battery parameter
Base on celxpert battery SPEC, pre-charge current is 404mA and over
discharge voltage is 2.8V.
TEST=Base on celxpert battery SPEC.
BRANCH=kukui | [
{
"change_type": "MODIFY",
"old_path": "board/kodama/battery.c",
"new_path": "board/kodama/battery.c",
"diff": "@@ -61,8 +61,8 @@ const struct board_batt_params board_battery_info[] = {\n.batt_info = {\n.voltage_max = 4400,\n.voltage_normal = 3840,\n- .voltage_min = 3000,\n- .precharge_current = 256... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Kodama: Modify celxpert battery parameter
Base on celxpert battery SPEC, pre-charge current is 404mA and over
discharge voltage is 2.8V.
BUG=b:138826367
TEST=Base on celxpert battery SPEC.
BRANCH=kukui
Change-Id: I7714e2392f9de3190964f25980871ab78c2ad309
Signed-off-by: Xiong Huang <xiong.huang@bitland.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1893900
Reviewed-by: Ting Shen <phoenixshen@chromium.org> |
136,256 | 01.11.2019 16:13:00 | 21,600 | 86893761dcfcb76addf04b44426d97154608e03b | host: adding gpio print for debugging
Add console print when GPIO line changes for easier unit
test debugging
BRANCH=none
TEST=verified that gpio print occurs in unit tests | [
{
"change_type": "MODIFY",
"old_path": "chip/host/gpio.c",
"new_path": "chip/host/gpio.c",
"diff": "#include \"console.h\"\n#include \"common.h\"\n+#include \"console.h\"\n#include \"gpio.h\"\n#include \"timer.h\"\n#include \"util.h\"\nstatic int gpio_values[GPIO_COUNT];\nstatic int gpio_interrupt_e... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | host: adding gpio print for debugging
Add console print when GPIO line changes for easier unit
test debugging
BRANCH=none
BUG=none
TEST=verified that gpio print occurs in unit tests
Change-Id: I888859c8ef4a1b879146e9c01767ee487f7ce564
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1896124
Commit-Queue: Raul E Rangel <rrangel@chromium.org>
Reviewed-by: Raul E Rangel <rrangel@chromium.org> |
136,282 | 05.11.2019 13:10:02 | -28,800 | 7c7f736b851243194997c75c240b8de9fd26c136 | dratini: remove unused ALS sensor id
BRANCH=none
TEST=make buildall -j. | [
{
"change_type": "MODIFY",
"old_path": "board/dratini/board.h",
"new_path": "board/dratini/board.h",
"diff": "#define CONFIG_ACCELGYRO_BMI160_INT2_OUTPUT\n/* BMA253 Lid accel */\n#define CONFIG_ACCEL_BMA255\n-#define CONFIG_ACCEL_FORCE_MODE_MASK (BIT(LID_ACCEL) | BIT(CLEAR_ALS))\n+#define CONFIG_ACC... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | dratini: remove unused ALS sensor id
BUG=none
BRANCH=none
TEST=make buildall -j.
Change-Id: I4cf3d353afaaf4d422421b1a35c137f74259f962
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1898248
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> |
136,444 | 05.11.2019 17:14:44 | 28,800 | 14b13d302e715c23909ed5de5e6cfffc2e5c9f44 | docs: update link to host commands documentation
The Google Sites version was deprecated when
was submitted.
BRANCH=none
TEST=Check the rendering in Gitiles | [
{
"change_type": "MODIFY",
"old_path": "README.md",
"new_path": "README.md",
"diff": "@@ -333,7 +333,7 @@ levels of detail (see include/ec_commands.h for the data structures).\n## Host commands\nThe way in which messages are exchanged between the AP and EC is\n-[documented separately](http://dev.chr... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | docs: update link to host commands documentation
The Google Sites version was deprecated when https://crrev.com/c/1807964
was submitted.
BRANCH=none
BUG=none
TEST=Check the rendering in Gitiles
Change-Id: I440ae76501a4eb747e4a2e4550c192565c3c6717
Signed-off-by: Harry Cutts <hcutts@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1900666
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,209 | 06.11.2019 16:25:14 | -39,600 | 85609a92c8fb6de177ff5a15f64f1f8b46e9f8cc | puff: Add fan configuration to EC.
Add fan configuration to puff.
BRANCH=none
TEST=Build puff, tests, buildall.
Tested-by: Andrew McRae | [
{
"change_type": "MODIFY",
"old_path": "board/puff/board.c",
"new_path": "board/puff/board.c",
"diff": "@@ -52,6 +52,8 @@ const unsigned int spi_devices_used = ARRAY_SIZE(spi_devices);\n/******************************************************************************/\n/* PWM channels. Must be in the ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | puff: Add fan configuration to EC.
Add fan configuration to puff.
BRANCH=none
BUG=b:143327224
TEST=Build puff, tests, buildall.
Change-Id: Ib968dafa297c7d17ea0d90c0b67869f5aca5e210
Signed-off-by: Andrew McRae <amcrae@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1899653
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Andrew McRae <amcrae@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org> |
136,278 | 30.10.2019 22:51:28 | 25,200 | b76871fce86d8d89e7d1d8e951bae4e9b392d150 | usb_pd_protocol: disable vconn on pd_suspend
this disables VCONN on a port before we start the TCPC firmware update.
BRANCH=none
TEST=tested TCPC firmware update on atlas | [
{
"change_type": "MODIFY",
"old_path": "common/usb_pd_protocol.c",
"new_path": "common/usb_pd_protocol.c",
"diff": "@@ -3843,6 +3843,9 @@ void pd_task(void *u)\npd_power_supply_reset(port);\n#else\npd_power_supply_reset(port);\n+#ifdef CONFIG_USBC_VCONN\n+ set_vconn(port, 0);\n+#endif\nrstatus = tcp... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | usb_pd_protocol: disable vconn on pd_suspend
this disables VCONN on a port before we start the TCPC firmware update.
BUG=b:143330980
BRANCH=none
TEST=tested TCPC firmware update on atlas
Change-Id: I2b0b8d52d637acf5b7adfdc37ef4ae4871054f5b
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1899077
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,208 | 06.11.2019 13:28:15 | -28,800 | 53d08442e3c9bedde86f1a7ec961efd21902d115 | baseboard/kukui: Increase UART TX buffer size to 8192
To keep buffer overflow logs.
TEST=make buildall
BRANCH=kukui
Tested-by: Nicolas Boichat | [
{
"change_type": "MODIFY",
"old_path": "baseboard/kukui/baseboard.h",
"new_path": "baseboard/kukui/baseboard.h",
"diff": "/* Increase tx buffer size, as we'd like to stream EC log to AP. */\n#undef CONFIG_UART_TX_BUF_SIZE\n-#define CONFIG_UART_TX_BUF_SIZE 4096\n+#define CONFIG_UART_TX_BUF_SIZE 8192\... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | baseboard/kukui: Increase UART TX buffer size to 8192
To keep buffer overflow logs.
TEST=make buildall
BUG=none
BRANCH=kukui
Change-Id: I2db611f9296aa03cfb97932f3c816003a2610ecb
Signed-off-by: Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1899654
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Commit-Queue: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> |
136,282 | 07.11.2019 11:30:57 | -28,800 | 98e6559efe1e0574b17e9c2b456f12c0f1f396a7 | dratini/dragonair: add new SKU
add unprovisioned SKUID to support kblight and convertible for pre-flash
cbi. add SKU ID: 23 (Convertible, TS, Stylus)
BRANCH=none
TEST=make buildall -j. | [
{
"change_type": "MODIFY",
"old_path": "board/dratini/board.c",
"new_path": "board/dratini/board.c",
"diff": "@@ -366,8 +366,11 @@ static bool board_is_convertible(void)\n{\nuint8_t sku_id = get_board_sku();\n- /* Dragonair (SKU 21 and 22) is a convertible. Dratini is not. */\n- return sku_id == 21 ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | dratini/dragonair: add new SKU
add unprovisioned SKUID to support kblight and convertible for pre-flash
cbi. add SKU ID: 23 (Convertible, TS, Stylus)
BUG=b:142987639, b:143994766
BRANCH=none
TEST=make buildall -j.
Change-Id: Ie8d4b611d8073ff993a94699d832ada6830a2771
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1902892
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> |
136,427 | 07.11.2019 10:13:10 | 25,200 | 701ae21806a13c1c62036ff861de437056dc8abd | Trembyle: Add more IOEX GPIO definitions
BRANCH=none
TEST=build | [
{
"change_type": "MODIFY",
"old_path": "board/trembyle/gpio.inc",
"new_path": "board/trembyle/gpio.inc",
"diff": "@@ -54,9 +54,10 @@ GPIO(LED_CHRG_L, PIN(C, 0), GPIO_OUT_HIGH)\nIOEX(USB_A0_RETIMER_EN, EXPIN(USBC_PORT_C0, 0, 0), GPIO_OUT_HIGH) /* A0 Retimer Enable */\nIOEX(USB_A0_RETIMER_RST, EXPIN(U... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Trembyle: Add more IOEX GPIO definitions
BUG=none
BRANCH=none
TEST=build
Change-Id: I64c5b46367774163f532bbcb9097657e2b83ad9f
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1904153
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org> |
136,377 | 30.10.2019 17:50:36 | 25,200 | 3f53eda83e9b91eef3058c41e68a8c6842a70d82 | sn_bits: use board_id_is_blank
Use the standard board_id_is_blank function to check if the board id is
blank.
BRANCH=cr50
TEST=set the serialnumber | [
{
"change_type": "MODIFY",
"old_path": "chip/g/sn_bits.c",
"new_path": "chip/g/sn_bits.c",
"diff": "@@ -155,7 +155,7 @@ static enum vendor_cmd_rc vc_sn_set_hash(enum vendor_cmd_cc code,\n* that the board ID has not been writen yet.\n*/\nif (read_board_id(&bid) != EC_SUCCESS ||\n- ~(bid.type & bid.ty... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | sn_bits: use board_id_is_blank
Use the standard board_id_is_blank function to check if the board id is
blank.
BUG=b:143649068
BRANCH=cr50
TEST=set the serialnumber
Change-Id: If4e50a548ec2a4747b7bc291f93f170e28eea949
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1892114
Reviewed-by: Namyoon Woo <namyoon@chromium.org> |
136,256 | 01.11.2019 16:14:12 | 21,600 | cf54e8664faaed51f4d622f84d6475f90f53e06e | usbc: fix vbus discharge path for GPIO
Code on Tot assumes that port count was the port to
discharge instead of port parameter
BRANCH=none
TEST=verified with unit test (in this CL) | [
{
"change_type": "MODIFY",
"old_path": "board/host/gpio.inc",
"new_path": "board/host/gpio.inc",
"diff": "@@ -29,3 +29,5 @@ GPIO(BASE_CHG_VDD_EN, PIN(0, 12), 0)\n/* Fingerprint */\nGPIO(SPI1_NSS, PIN(0, 13), GPIO_OUT_HIGH)\n+\n+GPIO(USB_C0_DISCHARGE, PIN(0, 15), 0)\n"
},
{
"change_type": "MO... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | usbc: fix vbus discharge path for GPIO
Code on Tot assumes that port count was the port to
discharge instead of port parameter
BRANCH=none
BUG=none
TEST=verified with unit test (in this CL)
Change-Id: I17658a0c555f9cea56fa4ec1652e0faf62e3d6cc
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1896125 |
136,234 | 05.11.2019 12:34:52 | 28,800 | daee93dd1e7f722a249db0fdf124d5157744f693 | tglrvp: Add back the ALL_SYS_PWRGD signal
Adding back the ALL_SYS_PWRGD signal which was removed as part of
the CL:1881753.
BRANCH=none
TEST=powerinfo shows all signals | [
{
"change_type": "MODIFY",
"old_path": "board/tglrvpu_ite/board.h",
"new_path": "board/tglrvpu_ite/board.h",
"diff": "#define CONFIG_CHIPSET_TIGERLAKE\n#define GPIO_PG_EC_RSMRST_ODL GPIO_RSMRST_L_PGOOD\n#define GPIO_PCH_DSW_PWROK GPIO_EC_PCH_DSW_PWROK\n+#define GPIO_PG_EC_ALL_SYS_PWRGD GPIO_ALL_SYS_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | tglrvp: Add back the ALL_SYS_PWRGD signal
Adding back the ALL_SYS_PWRGD signal which was removed as part of
the CL:1881753.
BUG=b:143373337
BRANCH=none
TEST=powerinfo shows all signals
Change-Id: I8ddfb0ed61963839cd657840b9a5b80cebb5da86
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1900125
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,324 | 08.11.2019 07:38:01 | 25,200 | 81a46885ddd6a592fc80321164781d42bba86132 | pd: Clarify flag comments
BRANCH=none
TEST=make -j buildall | [
{
"change_type": "MODIFY",
"old_path": "common/usbc/usb_pe_drp_sm.c",
"new_path": "common/usbc/usb_pe_drp_sm.c",
"diff": "/* At least one successful PD communication packet received from port partner */\n#define PE_FLAGS_PD_CONNECTION BIT(0)\n-#define PE_FLAGS_ACCEPT BIT(1) /* Got accept message */\... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | pd: Clarify flag comments
BRANCH=none
BUG=b:141563840
TEST=make -j buildall
Change-Id: Iaff605f5d93ccce26aec4d9e33be78017c7b9231
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1906194
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,311 | 02.11.2019 10:22:30 | 21,600 | bd2b21346ceb7bdd736efcd83f444c1d7f84ee7d | volteer: add initial battery support
Add ODM specified 62 Wh battery.
BRANCH=none
TEST=make buildall | [
{
"change_type": "MODIFY",
"old_path": "baseboard/volteer/baseboard.c",
"new_path": "baseboard/volteer/baseboard.c",
"diff": "/* Volteer family-specific configuration */\n#include \"adc_chip.h\"\n-#include \"battery.h\"\n#include \"charge_state.h\"\n#include \"gpio.h\"\n#include \"i2c.h\"\n@@ -154,1... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | volteer: add initial battery support
Add ODM specified 62 Wh battery.
BUG=b:143477210
BRANCH=none
TEST=make buildall
Change-Id: I7c3292bbd23405781207366981c2af03b6d4624a
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1896648 |
136,390 | 28.08.2019 18:00:51 | -28,800 | a9629611a9f8d3d301363683bc3e7db2fbbf769c | Enable double tap host detection in kukui
BRANCH=none
TEST=AP can receive mkbp event when double tap is triggered | [
{
"change_type": "MODIFY",
"old_path": "board/kukui/board.c",
"new_path": "board/kukui/board.c",
"diff": "#include \"driver/tcpm/mt6370.h\"\n#include \"driver/usb_mux/it5205.h\"\n#include \"extpower.h\"\n+#include \"gesture.h\"\n#include \"gpio.h\"\n#include \"hooks.h\"\n#include \"host_command.h\"\... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Enable double tap host detection in kukui
BUG=b:135575671
BRANCH=none
TEST=AP can receive mkbp event when double tap is triggered
Change-Id: I35abf2a62d4980c9b9232c28a72c5ba624142270
Signed-off-by: Heng-Ruey Hsu <henryhsu@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1772867
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,269 | 06.11.2019 15:37:36 | 28,800 | a755d4d72e7e94785411a92311a4fa111b1bd0ff | stm32: Document flash layout for 1 MB Flash (STM32F412)
STM32F412xE has 512 KB flash
STM32F412xG has 1 MB flash
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "chip/stm32/flash-stm32f3.c",
"new_path": "chip/stm32/flash-stm32f3.c",
"diff": "@@ -45,7 +45,14 @@ struct ec_flash_bank const flash_bank_array[] = {\n};\n#elif defined(CHIP_FAMILY_STM32F4)\n/*\n- * 8 \"erase\" sectors : 16KB/16KB/16KB/16KB/64KB/128KB/128KB/128... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | stm32: Document flash layout for 1 MB Flash (STM32F412)
STM32F412xE has 512 KB flash
STM32F412xG has 1 MB flash
https://www.st.com/resource/en/datasheet/stm32f412cg.pdf
BRANCH=none
BUG=none
TEST=make buildall -j
Change-Id: I260659a1de62f3e79f427dd38ca831b4cabed448
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1902463
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,269 | 06.11.2019 14:48:20 | 28,800 | cb240acefd5fd3c7484d8721e15ebcf76b446f62 | rollback: Remove unused rollback_lock function
Use of the rollback_lock function was removed in
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/rollback.c",
"new_path": "common/rollback.c",
"diff": "@@ -196,32 +196,6 @@ failed:\n}\n#endif\n-int rollback_lock(void)\n-{\n- int ret;\n-\n- /* Already locked */\n- if (flash_get_protect() & EC_FLASH_PROTECT_ROLLBACK_NOW)\n- return EC_SUCCESS;\n-\n- C... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | rollback: Remove unused rollback_lock function
Use of the rollback_lock function was removed in
https://crrev.com/c/479176.
BRANCH=none
BUG=none
TEST=make buildall -j
Change-Id: I15bfeba9b169c7b0fae8d3c9423bc2f4817d52d8
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1902460
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> |
136,437 | 12.11.2019 13:56:32 | -28,800 | 697a07fa83fedb9109ff207685ef6eb32504de09 | damu: add initial content for the build
This initial content of damu is taken after jacuzzi. It will need
to be revised later.
BRANCH=none
TEST=make -j BOARD=damu | [
{
"change_type": "ADD",
"old_path": null,
"new_path": "board/damu/battery.c",
"diff": "+/* Copyright 2019 The Chromium OS Authors. All rights reserved.\n+ * Use of this source code is governed by a BSD-style license that can be\n+ * found in the LICENSE file.\n+ */\n+\n+#include \"battery.h\"\n+#inc... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | damu: add initial content for the build
This initial content of damu is taken after jacuzzi. It will need
to be revised later.
BUG=b:144321985
BRANCH=none
TEST=make -j BOARD=damu
Change-Id: Ia92a3f8e316891ab3491049e8330608052082f5e
Signed-off-by: Paul Ma <magf@bitland.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1911267
Reviewed-by: Ting Shen <phoenixshen@chromium.org> |
136,282 | 13.11.2019 13:46:26 | -28,800 | a49c836634c169e408e9286ec8c741c98a11ae3e | kappa: remove symbolic link from jaccuzi
Copy jaccuzi for kappa EC image. Below CLs will come after this CL merged.
1. Battery configration.
2. Implement leds.
BRANCH=none
TEST=make BOARD=kappa | [
{
"change_type": "DELETE",
"old_path": "board/kappa",
"new_path": null,
"diff": "-jacuzzi\n\\ No newline at end of file\n"
},
{
"change_type": "ADD",
"old_path": null,
"new_path": "board/kappa/battery.c",
"diff": "+/* Copyright 2019 The Chromium OS Authors. All rights reserved.\n... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | kappa: remove symbolic link from jaccuzi
Copy jaccuzi for kappa EC image. Below CLs will come after this CL merged.
1. Battery configration.
2. Implement leds.
BUG=b:144388520
BRANCH=none
TEST=make BOARD=kappa
Change-Id: Ica52cc6ddaf5d7bc6c94a11525584edad0258c00
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1913943
Reviewed-by: Ting Shen <phoenixshen@chromium.org> |
136,324 | 12.11.2019 07:56:53 | 25,200 | dc850cb6b6feef79d783f28d5f45d3a25b4022d0 | retimer: usbc retimer name cleanup
Need to cleanup naming around USBC Retimers for adding
PI2DPX1207 code
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "baseboard/intelrvp/build.mk",
"new_path": "baseboard/intelrvp/build.mk",
"diff": "@@ -22,7 +22,7 @@ baseboard-$(CONFIG_BC12_DETECT_MAX14637)+=bc12.o\nbaseboard-$(CONFIG_USB_MUX_VIRTUAL)+=usb_mux.o\n#USB Retimer specific files\n-baseboard-$(CONFIG_USB_PD_RETIME... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | retimer: usbc retimer name cleanup
Need to cleanup naming around USBC Retimers for adding
PI2DPX1207 code
BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: I7e18e0abbe5bfd89bf0e20fa7b5174669689778f
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1911296
Reviewed-by: Edward Hill <ecgh@chromium.org> |
136,330 | 12.11.2019 18:25:20 | 28,800 | dfec8a5585820826cf4e669f694895d880a53820 | volteer: Show power information with LEDs
Configure the LEDs as power LEDs and enable setting them based on
battery and chipset state.
TEST=Observe LEDs; charge, disconnect battery, and fake low charge
BRANCH=none | [
{
"change_type": "MODIFY",
"old_path": "baseboard/volteer/baseboard.h",
"new_path": "baseboard/volteer/baseboard.h",
"diff": "* CONFIG_LED_ONOFF_STATES_BAT_LOW when CONFIG_CHARGER is defined.\n*/\n#define CONFIG_LED_PWM\n-/* TODO(b/140557020): Remove this when CONFIG_CHARGER is defined. */\n-#define... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | volteer: Show power information with LEDs
Configure the LEDs as power LEDs and enable setting them based on
battery and chipset state.
BUG=b:139554899
TEST=Observe LEDs; charge, disconnect battery, and fake low charge
BRANCH=none
Change-Id: Id303ffa9fce1ce1071d1615da7bb577ef4d6bfd0
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1913861
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,330 | 12.11.2019 19:46:03 | 28,800 | 65b5a9994d7759263d540d5781038e019f964d27 | volteer: Cleanup LED configuration
Place it in its own section and remove stale TODO.
TEST=make buildall
BRANCH=none
Tested-by: Keith Short | [
{
"change_type": "MODIFY",
"old_path": "baseboard/volteer/baseboard.h",
"new_path": "baseboard/volteer/baseboard.h",
"diff": "#define CONFIG_CRC8\n#define CONFIG_CROS_BOARD_INFO\n#define CONFIG_HIBERNATE_PSL\n-#define CONFIG_LED_COMMON\n-/* TODO(b/140557020): Define CONFIG_LED_ONOFF_STATES and\n- * ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | volteer: Cleanup LED configuration
Place it in its own section and remove stale TODO.
BUG=b:139554899
TEST=make buildall
BRANCH=none
Change-Id: Iac64a4c0d29091de68213aa719a0b48fcf369177
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1913862
Reviewed-by: Keith Short <keithshort@chromium.org>
Tested-by: Keith Short <keithshort@chromium.org> |
136,324 | 05.11.2019 14:51:56 | 25,200 | a4972e187c6ce582aa54dbfce6039fd2239e4bbd | usbc: retimer pi3dpx1207
BRANCH=none
TEST=verify mode is set correctly when switching devices | [
{
"change_type": "MODIFY",
"old_path": "driver/build.mk",
"new_path": "driver/build.mk",
"diff": "@@ -139,6 +139,7 @@ driver-$(CONFIG_USB_PD_TCPM_NCT38XX)+=tcpm/nct38xx.o\n# Type-C Retimer drivers\ndriver-$(CONFIG_USBC_RETIMER_INTEL_BB)+=retimer/bb_retimer.o\n+driver-$(CONFIG_USBC_RETIMER_PI3DPX1207... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | usbc: retimer pi3dpx1207
BUG=b:139428185
BRANCH=none
TEST=verify mode is set correctly when switching devices
Change-Id: Ic9d460a94bb8007f17168ac5237a4dcbc24cfb2b
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1900123
Reviewed-by: Edward Hill <ecgh@chromium.org> |
136,376 | 16.04.2019 10:48:14 | -28,800 | d226ec2751923b70ab1b9e6089eab3132df98c60 | rt946x: Fix MT6370 charger type detection
add bc12 workaround when bc12 detect SDP
BRANCH=kukui
TEST=boot kukui, slow plug in DCP, check bc12 detect chg type | [
{
"change_type": "MODIFY",
"old_path": "driver/charger/rt946x.c",
"new_path": "driver/charger/rt946x.c",
"diff": "@@ -1332,12 +1332,30 @@ static int mt6370_irq_handler(void)\n}\n#endif /* CONFIG_CHARGER_MT6370 */\n+static void rt946x_bc12_workaround(void)\n+{\n+ /*\n+ * There is a parasitic capacita... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | rt946x: Fix MT6370 charger type detection
add bc12 workaround when bc12 detect SDP
BRANCH=kukui
BUG=b:128049211
TEST=boot kukui, slow plug in DCP, check bc12 detect chg type
Change-Id: Ie9b8780fdad6e061e967ebb127b27bf63a11db2e
Signed-off-by: Gene Chen <gene_chen@mediatek.corp-partner.google.com>
Signed-off-by: Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1568887
Reviewed-by: Ting Shen <phoenixshen@chromium.org> |
136,324 | 12.11.2019 06:29:50 | 25,200 | c27ddbea2824237634ab9745eac2e54171fffdba | trembyle: Enable pi3dpx1207
BRANCH=none
TEST=verify mode is set correctly when switching devices | [
{
"change_type": "MODIFY",
"old_path": "baseboard/zork/baseboard.c",
"new_path": "baseboard/zork/baseboard.c",
"diff": "#include \"driver/bc12/pi3usb9201.h\"\n#include \"driver/ppc/aoz1380.h\"\n#include \"driver/ppc/nx20p348x.h\"\n+#include \"driver/retimer/pi3dpx1207.h\"\n#include \"driver/tcpm/ps8... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | trembyle: Enable pi3dpx1207
BUG=b:139428185
BRANCH=none
TEST=verify mode is set correctly when switching devices
Change-Id: I266a399966bb90709bd3395405a67d3a1f49c2f9
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1911292
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,443 | 25.10.2019 11:31:35 | 25,200 | f3a33b768e4d0710e4213c5a1c53669ce2fd3d73 | mock: Update README.md with design pattern
Add the reasoning behind the design pattern of
placing all params in one struct.
BRANCH=none
TEST=Examined in Gitlies | [
{
"change_type": "MODIFY",
"old_path": "common/mock/README.md",
"new_path": "common/mock/README.md",
"diff": "@@ -10,7 +10,9 @@ from unit tests and fuzzers' `.mocklist` file.\n* Add the mock source to [common/mock](/common/mock) and the\noptional header file to [include/mock](/include/mock).\nHeader... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | mock: Update README.md with design pattern
Add the reasoning behind the design pattern of
placing all params in one struct.
BRANCH=none
BUG=none
TEST=Examined in Gitlies
Change-Id: I80f29468126c3a3a36363c857d52d3baad785638
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1880578
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,209 | 14.11.2019 15:36:28 | -39,600 | 6e3c061c4baae0e3169ee5371462615f5153fbed | puff: Add config for power sensors.
Add config for INA3221 power monitor sensors.
BRANCH=none
TEST=EC buildall
Tested-by: Andrew McRae | [
{
"change_type": "MODIFY",
"old_path": "board/puff/board.c",
"new_path": "board/puff/board.c",
"diff": "#include \"button.h\"\n#include \"common.h\"\n#include \"cros_board_info.h\"\n+#include \"driver/ina3221.h\"\n#include \"driver/ppc/sn5s330.h\"\n#include \"driver/tcpm/anx7447.h\"\n#include \"driv... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | puff: Add config for power sensors.
Add config for INA3221 power monitor sensors.
BRANCH=none
BUG=b:144127082
TEST=EC buildall
Change-Id: I87b3da86403b0ec7314b4084bc710c59f019930d
Signed-off-by: Andrew McRae <amcrae@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1915481
Tested-by: Andrew McRae <amcrae@chromium.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org> |
136,443 | 14.11.2019 18:57:49 | 0 | e2f451e10da4701d69c37beca44e6cc04ca1f017 | mock: Change mock initializer to compound literal
This ensures that these initializer/reset macros
can be used as a reset value (after initialization).
BRANCH=nocturne,nami
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "include/mock/fp_sensor_mock.h",
"new_path": "include/mock/fp_sensor_mock.h",
"diff": "@@ -28,7 +28,7 @@ struct mock_ctrl_fp_sensor {\n};\n#define MOCK_CTRL_DEFAULT_FP_SENSOR \\\n-{ \\\n+(struct mock_ctrl_fp_sensor) { \\\n.fp_sensor_init_return = EC_SUCCESS, \\... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | mock: Change mock initializer to compound literal
This ensures that these initializer/reset macros
can be used as a reset value (after initialization).
BRANCH=nocturne,nami
BUG=none
TEST=make buildall -j
Signed-off-by: Craig Hesling <hesling@chromium.org>
Change-Id: I5f4675399c87d959235b09e04c04e3613834421a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1917580
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,311 | 13.11.2019 13:20:49 | 28,800 | 188b6ff7d7b4e4139c16df188728f47ae81a4e00 | icelake/tigerlake: add option to enable PP3300 before PP5000
On Volteer, to avoid leakage from PP3300_A rail to PP5000 rail, turn on
the PP3300 rail before PP5000.
BRANCH=none
TEST=make buildall -j
TEST=verify Volteer transitions to S0 | [
{
"change_type": "MODIFY",
"old_path": "baseboard/volteer/baseboard.h",
"new_path": "baseboard/volteer/baseboard.h",
"diff": "/* Chipset config */\n#define CONFIG_CHIPSET_TIGERLAKE\n+#define CONFIG_CHIPSET_PP3300_RAIL_FIRST\n#define CONFIG_CHIPSET_X86_RSMRST_DELAY\n#define CONFIG_CHIPSET_RESET_HOOK\... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | icelake/tigerlake: add option to enable PP3300 before PP5000
On Volteer, to avoid leakage from PP3300_A rail to PP5000 rail, turn on
the PP3300 rail before PP5000.
BUG=none
BRANCH=none
TEST=make buildall -j
TEST=verify Volteer transitions to S0
Change-Id: Ic86f97dbdde6d6c904fe7efc8b0edc1ead727cf6
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1918603
Reviewed-by: Abe Levkoy <alevkoy@chromium.org> |
136,396 | 15.11.2019 15:49:39 | 28,800 | 0554955a51b0e7e4eff63f475b51d8e3aabc9c26 | Add OWNERS for Cr50 specific directories
Let's make sure any change to files used explicitly in Cr50 are
approved by relevant persons.
BRANCH=none
TEST=none | [
{
"change_type": "ADD",
"old_path": null,
"new_path": "board/cr50/OWNERS",
"diff": "+# Cr50 board owners\n+apronin@chromium.org\n+mruthven@chromium.org\n+namyoon@chromium.org\n+vbendeb@chromium.org\n+\n+# Don't inherit owners from elsewhere in the manifest\n+set noparent\n"
},
{
"change_type... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Add OWNERS for Cr50 specific directories
Let's make sure any change to files used explicitly in Cr50 are
approved by relevant persons.
BRANCH=none
BUG=none
TEST=none
Change-Id: If6affd837063311e3215e7596a3a424dc56c7603
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1919649
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-by: Andrey Pronin <apronin@chromium.org> |
136,447 | 11.11.2019 11:01:30 | -39,600 | 5162094fe4be16ffc6255ac46102b536c2fbc96f | Create cometlake-discrete power driver
This sets up the driver (mostly copied from cometlake for now), to be
used by puff.
TEST=make buildall still succeeds
BRANCH=none | [
{
"change_type": "MODIFY",
"old_path": "include/config.h",
"new_path": "include/config.h",
"diff": "#undef CONFIG_CHIPSET_BRASWELL /* Intel Braswell (x86) */\n#undef CONFIG_CHIPSET_CANNONLAKE /* Intel Cannonlake (x86) */\n#undef CONFIG_CHIPSET_COMETLAKE /* Intel Cometlake (x86) */\n+#undef CONFIG_CH... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Create cometlake-discrete power driver
This sets up the driver (mostly copied from cometlake for now), to be
used by puff.
BUG=b:143188569
TEST=make buildall still succeeds
BRANCH=none
Change-Id: I4a4b70dd8ba58c070e2c6ad5941911bab16bafe6
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1906391
Reviewed-by: Andrew McRae <amcrae@chromium.org> |
136,297 | 16.09.2019 09:47:50 | -32,400 | 46e72f0f0bbd64ebbf761a32c026e742e8c82e60 | kohaku : change battery discharging max temperature
Change battery discharging max temperature from 60 to 70.
BRANCH=master
TEST=flash EC and check battery charging. | [
{
"change_type": "MODIFY",
"old_path": "board/kohaku/battery.c",
"new_path": "board/kohaku/battery.c",
"diff": "@@ -85,7 +85,7 @@ const struct board_batt_params board_battery_info[] = {\n.charging_min_c = 0,\n.charging_max_c = 55,\n.discharging_min_c = -20,\n- .discharging_max_c = 60,\n+ .dischargin... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | kohaku : change battery discharging max temperature
Change battery discharging max temperature from 60 to 70.
BUG=b:143910072
BRANCH=master
TEST=flash EC and check battery charging.
Change-Id: Ia5a6a7c565e96e880715c6a03727c51a70dcab7c
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1806175
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> |
136,447 | 11.11.2019 11:01:30 | -39,600 | 55d2b5df418421db5fcffae3d4c2af847feafe0c | puff: use cometlake-discrete power driver
TEST=make buildall still succeeds
BRANCH=none | [
{
"change_type": "MODIFY",
"old_path": "board/puff/board.h",
"new_path": "board/puff/board.h",
"diff": "#define CONFIG_CMD_PPC_DUMP\n/* Chipset config */\n-#define CONFIG_CHIPSET_COMETLAKE\n+#define CONFIG_CHIPSET_COMETLAKE_DISCRETE\n/* check */\n#define CONFIG_CHIPSET_CAN_THROTTLE\n#define CONFIG_C... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | puff: use cometlake-discrete power driver
BUG=b:143188569
TEST=make buildall still succeeds
BRANCH=none
Change-Id: I9193878c65b20293fad5914af88ea4e49be369a8
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1913939
Reviewed-by: Andrew McRae <amcrae@chromium.org> |
136,269 | 18.11.2019 09:50:44 | 28,800 | ade2bda733d09458f923e37c67a8b0bc304d906b | docs/fingerprint: Add details on types of keys
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "docs/fingerprint/fingerprint.md",
"new_path": "docs/fingerprint/fingerprint.md",
"diff": "@@ -128,15 +128,27 @@ for development (through `flash_fp_mcu`) to erase and flash the entire chip.\n## Keys\nThe `RO` section of the fingerprint firmware contains the pub... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | docs/fingerprint: Add details on types of keys
BRANCH=none
BUG=none
TEST=none
Change-Id: I2c0b404ddfbd8e35fcc7455d93c1830167baa564
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1922229
Reviewed-by: Craig Hesling <hesling@chromium.org>
Commit-Queue: Craig Hesling <hesling@chromium.org> |
136,269 | 18.11.2019 09:28:28 | 28,800 | bdea774dfa59a90a980d36a579d48726a8cab01a | docs: Removing battery disables HW write protection
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "docs/write_protection.md",
"new_path": "docs/write_protection.md",
"diff": "@@ -53,6 +53,9 @@ documentation][wp_screw]. Older Chrome OS devices had a write protect screw\nthat had to be physically removed. More details on this history can be found\nhere: http:... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | docs: Removing battery disables HW write protection
BRANCH=none
BUG=none
TEST=none
Change-Id: Ic8f5a4378ce7b02e21518921c7a29edfaa031bf4
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1922064
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,234 | 15.11.2019 12:38:54 | 28,800 | 698cf4fb48979e47d522827fcdfcf5d2f117ddce | volteer: Add USB-C policy
BRANCH=none
TEST=USB2.0 & USB3.0 device detected over Type-C port 0 | [
{
"change_type": "MODIFY",
"old_path": "baseboard/volteer/baseboard.c",
"new_path": "baseboard/volteer/baseboard.c",
"diff": "@@ -184,6 +184,7 @@ const struct tcpc_config_t tcpc_config[] = {\n.addr_flags = TUSB422_I2C_ADDR_FLAGS,\n},\n.drv = &tusb422_tcpm_drv,\n+ .usb23 = USBC_PORT_0_USB2_NUM | (USB... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | volteer: Add USB-C policy
BUG=b:140578872
BRANCH=none
TEST=USB2.0 & USB3.0 device detected over Type-C port 0
Change-Id: I44790aac3543589c32dcd60f84e4e67d5d76cdab
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1922752
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,282 | 18.11.2019 11:12:11 | -28,800 | 052ed9c30e9fca104ac151920de92f8a8f76fc07 | kappa: fix charge/discharge control setting order
Clone form CL:1916160
BRANCH=none
TEST=make BOARD=kappa | [
{
"change_type": "MODIFY",
"old_path": "board/kappa/board.c",
"new_path": "board/kappa/board.c",
"diff": "@@ -140,7 +140,7 @@ int board_set_active_charge_port(int charge_port)\nCPRINTS(\"New chg p%d\", charge_port);\n/* ignore all request when discharge mode is on */\n- if (force_discharge)\n+ if (f... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | kappa: fix charge/discharge control setting order
Clone form CL:1916160
BUG=none
BRANCH=none
TEST=make BOARD=kappa
Change-Id: I18905f7ace402debf1fad93e72b8a86ee27d1f50
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1918986
Reviewed-by: Eric Yilun Lin <yllin@chromium.org> |
136,396 | 14.08.2019 11:32:21 | 25,200 | f5b56454cf1c94920259d65de6a4872470efc4d1 | cr50: remove flash nonvolatile counter space
Counter implementation has been moved to the AP, no need to keep space
for it in the flash.
BRANCH=cr50, cr50-mp
TEST=generated image uses 2048 bytes less than before this patch. | [
{
"change_type": "MODIFY",
"old_path": "board/cr50/board.h",
"new_path": "board/cr50/board.h",
"diff": "#define CONFIG_CRC8\n-/* Non-volatile counter storage for U2F (deprecated) */\n-#define CONFIG_FLASH_NVCTR_SIZE CONFIG_FLASH_BANK_SIZE\n-#define CONFIG_FLASH_NVCTR_BASE_A (CONFIG_PROGRAM_MEMORY_BA... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cr50: remove flash nonvolatile counter space
Counter implementation has been moved to the AP, no need to keep space
for it in the flash.
BUG=b:65253310
BRANCH=cr50, cr50-mp
TEST=generated image uses 2048 bytes less than before this patch.
Change-Id: I8225e9923932ce06ca0a4333c06508cf7d7c70d8
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1753677
Reviewed-by: Andrey Pronin <apronin@chromium.org> |
136,396 | 21.09.2019 12:21:16 | 25,200 | 9e10d76382342ab223c57f8f13ade3aee62b9667 | cr50: switch to new dev key
The new RO has a new dev key, modify the dev manifest to match the new
RO expectations.
BRANCH=cr50, cr50-mp
TEST=built a node locked image for ro 0.0.11 and observed it boot and
run | [
{
"change_type": "MODIFY",
"old_path": "chip/g/build.mk",
"new_path": "chip/g/build.mk",
"diff": "@@ -179,7 +179,7 @@ ifeq ($(H1_DEVIDS),)\n# Signing with non-secret test key.\nCR50_RW_KEY = loader-testkey-A.pem\n# Make sure manifset Key ID field matches the actual key.\n-DUM := $(shell sed 's/11871... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cr50: switch to new dev key
The new RO has a new dev key, modify the dev manifest to match the new
RO expectations.
BUG=b:74100307
BRANCH=cr50, cr50-mp
TEST=built a node locked image for ro 0.0.11 and observed it boot and
run
Change-Id: I3ce9ca8d23be6b2d959d4457ea6d08afa05376ac
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1866173
Reviewed-by: Andrey Pronin <apronin@chromium.org> |
136,256 | 19.11.2019 11:28:54 | 25,200 | cdfc04f0d6e244a892df68a241d999915920b581 | cleanup: fixing warnings and formatting
BRANCH=none
TEST=builds
Tested-by: Denis Brockus | [
{
"change_type": "MODIFY",
"old_path": "common/usb_pd_protocol.c",
"new_path": "common/usb_pd_protocol.c",
"diff": "@@ -2817,7 +2817,7 @@ void schedule_deferred_pd_interrupt(const int port)\n*/\nvoid pd_interrupt_handler_task(void *p)\n{\n- const int port = (int) p;\n+ const int port = (int) ((intpt... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cleanup: fixing warnings and formatting
BRANCH=none
BUG=none
TEST=builds
Change-Id: Idf4b7363ce08a638fcca3407355c8f232100496d
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1924786
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Tested-by: Denis Brockus <dbrockus@chromium.org> |
136,324 | 14.11.2019 14:13:29 | 25,200 | 154f597b8656fbcc16f6652f6fe8713943440939 | usbc: add enter_low_power_mode for retimer mux
BRANCH=none
TEST=verify mode is set correctly when switching devices | [
{
"change_type": "MODIFY",
"old_path": "driver/retimer/pi3dpx1207.c",
"new_path": "driver/retimer/pi3dpx1207.c",
"diff": "/* Stack space is limited, so put the buffer somewhere else */\nstatic uint8_t buf[PI3DPX1207_NUM_REGISTERS];\n+/**\n+ * Local utility functions\n+ */\nstatic int pi3dpx1207_i2c_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | usbc: add enter_low_power_mode for retimer mux
BUG=b:139428185
BRANCH=none
TEST=verify mode is set correctly when switching devices
Change-Id: I3e40e0321cb1026180b7edc0bfe99439c13acafb
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1922062 |
136,234 | 19.11.2019 10:15:35 | 28,800 | b6e36785982074af5638c456f305871f1465d460 | cleanup: Segregate ioexpander related drivers in ioexpander folder
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "baseboard/intelrvp/baseboard.c",
"new_path": "baseboard/intelrvp/baseboard.c",
"diff": "#include \"espi.h\"\n#include \"fan.h\"\n#include \"hooks.h\"\n-#include \"ioexpander_pca9555.h\"\n+#include \"pca9555.h\"\n#include \"peci.h\"\n#include \"power.h\"\n#incl... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cleanup: Segregate ioexpander related drivers in ioexpander folder
BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: I7fe9ab23254dbd8515936d10ad6782305e76236c
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1925173
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,282 | 20.11.2019 18:04:32 | -28,800 | b25323c4fa6797c8ecf9a2df24f7d864d56ca922 | Dratini/Jinlon: Add support for TEMP_SENSOR3
A new temperature sensor is added to Dratini/Jinlon boards, close to the
CPU. It is used to support the fan control.
BRANCH=hatch
TEST=temp command in EC console | [
{
"change_type": "MODIFY",
"old_path": "board/dratini/board.c",
"new_path": "board/dratini/board.c",
"diff": "@@ -298,23 +298,30 @@ BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT);\n/* ADC channels */\nconst struct adc_t adc_channels[] = {\n[ADC_TEMP_SENSOR_1] = {\n- \"TEMP_AMB\", NPCX_ADC_CH... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Dratini/Jinlon: Add support for TEMP_SENSOR3
A new temperature sensor is added to Dratini/Jinlon boards, close to the
CPU. It is used to support the fan control.
BUG=none
BRANCH=hatch
TEST=temp command in EC console
Change-Id: Icd5974133da5e1aec81f2201f87e1b83b79c6169
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1925802
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> |
136,436 | 20.11.2019 22:22:25 | 28,800 | 62c28034b339011cb877feca705dfeb6b695459e | all hatch variants: Make sure EC_RST_ODL is GPIO_LOCKED
BRANCH=hatch
TEST=make buildall
Tested-by: Furquan Shaikh | [
{
"change_type": "MODIFY",
"old_path": "board/akemi/gpio.inc",
"new_path": "board/akemi/gpio.inc",
"diff": "@@ -58,6 +58,17 @@ GPIO(CPU_C10_GATE_L, PIN(6, 7), GPIO_INPUT)\n/* MKBP event synchronization */\nGPIO(EC_INT_L, PIN(7, 0), GPIO_ODR_HIGH)\n+/*\n+ * GPIO_INT_BOTH is required for PSL wake from... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | all hatch variants: Make sure EC_RST_ODL is GPIO_LOCKED
BUG=b:144886704
BRANCH=hatch
TEST=make buildall
Change-Id: I0d520a5c375a2b47c55a335da91f556ccfd59c29
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1928422
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org> |
136,233 | 20.11.2019 16:05:39 | -28,800 | dbada69697be895fffe1b7ded21d80db1d01cf9a | it83xx/spi_master: correct the module ID
The module ID in alternate function setting for spi
master should be corrected as MODULE_SPI_MASTER.
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "board/it83xx_evb/gpio.inc",
"new_path": "board/it83xx_evb/gpio.inc",
"diff": "@@ -70,10 +70,10 @@ ALTERNATE(PIN_MASK(B, 0x03), 1, MODULE_UART, GPIO_PULL_UP) /* UART1 */\n#ifdef CONFIG_UART_HOST\nALTERNATE(PIN_MASK(H, 0x06), 1, MODULE_UART, 0) /* UART2 */\n#end... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | it83xx/spi_master: correct the module ID
The module ID in alternate function setting for spi
master should be corrected as MODULE_SPI_MASTER.
BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: Ib52b09a5f1e0c496374d4ed2f3a222dab9af2eb0
Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1868133
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,396 | 22.11.2019 10:54:58 | 28,800 | 33991367ca56493c68dc2fd6937d7858a39d2811 | cr50: prepare to release 0.{3,4}.24
BRANCH=cr50, cr50-mp
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "util/signer/ec_RW-manifest-dev.json",
"new_path": "util/signer/ec_RW-manifest-dev.json",
"diff": "\"timestamp\": 0,\n\"epoch\": 0, // FWR diversification contributor, 32 bits.\n\"major\": 4, // FW2_HIK_CHAIN counter.\n- \"minor\": 23, // Mostly harmless versio... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cr50: prepare to release 0.{3,4}.24
BRANCH=cr50, cr50-mp
BUG=none
TEST=none
Change-Id: I2bef8173536cdf4d584b93169d22c6120daed7f2
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1930141
Reviewed-by: Mary Ruthven <mruthven@chromium.org> |
136,324 | 22.11.2019 06:54:22 | 25,200 | a621ea9f352a7fdd5fa41982bfc4c13f1e351f3c | zork: make product ID project level
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "baseboard/zork/baseboard.h",
"new_path": "baseboard/zork/baseboard.h",
"diff": "#define CONFIG_KEYBOARD_COL2_INVERTED\n#define CONFIG_KEYBOARD_PROTOCOL_8042\n+/*\n+ * USB ID\n+ *\n+ * This is allocated specifically for Zork\n+ * http://google3/hardware/standar... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | zork: make product ID project level
BUG=none
BRANCH=none
TEST=none
Change-Id: I7cd71e246708dd4423b7fc3021a644e2988e2771
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1930868
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,447 | 26.11.2019 10:52:17 | -39,600 | b06d417e821c8681261d6e5f1139e5d101d147fc | puff: update PP3300_SNS divider
The schematic has changed to 9.31k / 47k resistors on this input.
TEST=still builds
BRANCH=None | [
{
"change_type": "MODIFY",
"old_path": "board/puff/board.c",
"new_path": "board/puff/board.c",
"diff": "@@ -98,11 +98,17 @@ const struct i2c_port_t i2c_ports[] = {\nconst unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);\nconst struct adc_t adc_channels[] = {\n- [ADC_SNS_PP3300] = { /* 9/11 volta... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | puff: update PP3300_SNS divider
The schematic has changed to 9.31k / 47k resistors on this input.
BUG=b:1829597655
TEST=still builds
BRANCH=None
Change-Id: I2856df05b2611edd30d497a35bb871b8f5b173e9
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1935467
Reviewed-by: Andrew McRae <amcrae@chromium.org>
Commit-Queue: Nicolas Boichat <drinkcat@chromium.org> |
136,443 | 22.11.2019 09:05:51 | 28,800 | bd7f034b6cf01380cc7e14f28c3bd72ad42daaf2 | cortex-m/m0: Reformat linkers script with tabs
This is just a cleanup of the linker scripts for cortex-m chips.
This brings no functional change.
BRANCH=none
TEST=make buildall | [
{
"change_type": "MODIFY",
"old_path": "core/cortex-m/ec.lds.S",
"new_path": "core/cortex-m/ec.lds.S",
"diff": "* Use of this source code is governed by a BSD-style license that can be\n* found in the LICENSE file.\n*/\n+\n#include \"config.h\"\n#include \"rwsig.h\"\nOUTPUT_FORMAT(BFD_FORMAT, BFD_FO... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cortex-m/m0: Reformat linkers script with tabs
This is just a cleanup of the linker scripts for cortex-m chips.
This brings no functional change.
BRANCH=none
BUG=none
TEST=make buildall
Change-Id: If9fa43157e8955fed7c7426b910c6af957794b0b
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1930392
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,234 | 22.11.2019 11:42:29 | 28,800 | 3cb2b8e2be4c3526510f46ad69225b57e2b34cd0 | usb_mux: cleanup the usb_mux_get() function
Simplified the usb_mux_get() function and made the MUX info
prints same as in ectool.
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "board/cheza/usb_pd_policy.c",
"new_path": "board/cheza/usb_pd_policy.c",
"diff": "@@ -373,12 +373,10 @@ static void svdm_dp_post_config(int port)\nstatic int is_dp_muxable(int port)\n{\nint i;\n- const char *dp_str, *usb_str;\nfor (i = 0; i < CONFIG_USB_PD_POR... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | usb_mux: cleanup the usb_mux_get() function
Simplified the usb_mux_get() function and made the MUX info
prints same as in ectool.
BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: Iefb16e1dbd323afbe248b06fe9c53abc63be9a67
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1931284
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,427 | 26.11.2019 18:28:29 | 25,200 | 1edeb2b8169143e5233df02b1bd758d64267a039 | trembyle: Update GPIO and I2C to match HW changes
BRANCH=none
TEST=AP still boots ok | [
{
"change_type": "MODIFY",
"old_path": "baseboard/zork/baseboard.c",
"new_path": "baseboard/zork/baseboard.c",
"diff": "@@ -126,8 +126,8 @@ const struct i2c_port_t i2c_ports[] = {\n.name = \"power\",\n.port = I2C_PORT_BATTERY,\n.kbps = 100,\n- .scl = GPIO_EC_I2C_POWER_CBI_SCL,\n- .sda = GPIO_EC_I2C_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | trembyle: Update GPIO and I2C to match HW changes
BUG=b:145246560
BRANCH=none
TEST=AP still boots ok
Change-Id: I0110c7041ab9d2ba2df3107341524c792af2ca5d
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1939786
Reviewed-by: Denis Brockus <dbrockus@chromium.org> |
136,427 | 27.11.2019 11:23:16 | 25,200 | dee29eb63ebd9259786ba60ef3069c95286de148 | trembyle: Increase CONFIG_UART_TX_BUF_SIZE
Increase console output buffer to avoid risk of losing output (eg
when tracing I2C) since we have the RAM available.
BRANCH=none
TEST=build | [
{
"change_type": "MODIFY",
"old_path": "baseboard/zork/baseboard.h",
"new_path": "baseboard/zork/baseboard.h",
"diff": "#undef CONFIG_PORT80_HISTORY_LEN\n#define CONFIG_PORT80_HISTORY_LEN 256\n+/* Increase console output buffer since we have the RAM available. */\n+#undef CONFIG_UART_TX_BUF_SIZE\n+#... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | trembyle: Increase CONFIG_UART_TX_BUF_SIZE
Increase console output buffer to avoid risk of losing output (eg
when tracing I2C) since we have the RAM available.
BUG=none
BRANCH=none
TEST=build
Change-Id: I5886723fe0eacd3d1040bfbd4cd320f279c82d6c
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1940782
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org> |
136,269 | 02.12.2019 13:21:05 | 28,800 | fe387a175ad92df2a165854b683ffa76c41750a6 | docs: Add wikipedia link for LPC
BRANCH=none
TEST=view in gitiles | [
{
"change_type": "MODIFY",
"old_path": "docs/ec_terms.md",
"new_path": "docs/ec_terms.md",
"diff": "A Light Emitting Diode is a semiconductor that emits light when current flows through it.\n-* **LPC - Low Pin Count bus**{#lpc}\n+* **LPC - [Low Pin Count bus]**{#lpc}\nLegacy communication bus betwee... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | docs: Add wikipedia link for LPC
BRANCH=none
BUG=none
TEST=view in gitiles
Change-Id: I711fb38b180adfc7f69cf954b6070aa45e7677ae
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1946788
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,234 | 02.12.2019 15:22:12 | 28,800 | b4f8858cef8105edee5a049beb8c93b102186bc3 | volteer: Enable USB-C Port 1
BRANCH=none
TEST=Able to boot to OS from Zinger connected on Port 1 | [
{
"change_type": "MODIFY",
"old_path": "baseboard/volteer/baseboard.c",
"new_path": "baseboard/volteer/baseboard.c",
"diff": "#include \"charge_state.h\"\n#include \"driver/bc12/pi3usb9201.h\"\n#include \"driver/ppc/sn5s330.h\"\n+#include \"driver/ppc/syv682x.h\"\n#include \"driver/tcpm/tusb422.h\"\... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | volteer: Enable USB-C Port 1
BUG=b:140578872
BRANCH=none
TEST=Able to boot to OS from Zinger connected on Port 1
Change-Id: I2db9763370ecfae2a38081b6fc607b1ef1d06b67
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1947426
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,269 | 04.12.2019 14:58:43 | 28,800 | e36f4da1fe29dbadd7313d164b333bc01db22ab3 | docs/fingerprint: Add factory requirements for fingerprint
BRANCH=none
TEST=view in gitiles | [
{
"change_type": "MODIFY",
"old_path": "docs/sitemap.md",
"new_path": "docs/sitemap.md",
"diff": "* [Fingerprint MCU (FPMCU)](./fingerprint/fingerprint.md)\n* [FPMCU Development for Partners](./fingerprint/fingerprint-dev-for-partners.md)\n* [Fingerprint Authentication Design Doc](./fingerprint/fing... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | docs/fingerprint: Add factory requirements for fingerprint
BRANCH=none
BUG=b:131913998
TEST=view in gitiles
Change-Id: Ia0cbdb5a2be3b1e35be668384369c372334629c4
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1951809 |
136,269 | 04.12.2019 16:43:32 | 28,800 | a4e6ec6c90f8da6ded2cbda3cf6f3d795739f97f | docs/fingerprint: Add details on FPMCU logs
BRANCH=none
TEST=view in gitiles | [
{
"change_type": "MODIFY",
"old_path": "docs/fingerprint/fingerprint.md",
"new_path": "docs/fingerprint/fingerprint.md",
"diff": "@@ -16,7 +16,8 @@ build/<board>` or `make clobber` to prevent compilation errors.\n## Software\nThe main source code for fingerprint sensor functionality lives in the\n-[... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | docs/fingerprint: Add details on FPMCU logs
BRANCH=none
BUG=none
TEST=view in gitiles
Change-Id: Ie3ef2dbbb9ffbe2592268eb2d23f1afe53594a25
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1952098
Reviewed-by: Craig Hesling <hesling@chromium.org>
Commit-Queue: Craig Hesling <hesling@chromium.org> |
136,208 | 20.11.2019 18:57:43 | -28,800 | d112a590dd8cdebca2aaff6435345f0cd31903d8 | kukui: Do not sink LED power on init
Enable LED color would start consuming power even if the
led brightness is zero.
TEST=make buildall
BRANCH=kukui | [
{
"change_type": "MODIFY",
"old_path": "board/kukui/led.c",
"new_path": "board/kukui/led.c",
"diff": "@@ -118,7 +118,7 @@ static void krane_led_init(void)\n{\nconst enum mt6370_led_dim_mode dim = MT6370_LED_DIM_MODE_PWM;\nconst enum mt6370_led_pwm_freq freq = MT6370_LED_PWM_FREQ1000;\n- mt6370_led_s... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | kukui: Do not sink LED power on init
Enable LED color would start consuming power even if the
led brightness is zero.
TEST=make buildall
BUG=b:137618886
BRANCH=kukui
Change-Id: I06120f4fec0cc41e40463989649ac9a5061d9f6b
Signed-off-by: Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1926187
Reviewed-by: Ting Shen <phoenixshen@chromium.org> |
136,256 | 02.12.2019 10:50:05 | 25,200 | fc4f8e5123364342c67d2c842a1091b7382bf50e | cleanup: format help text to ease reading
BRANCH=none
TEST=verify help text on command line | [
{
"change_type": "MODIFY",
"old_path": "util/cbi-util.c",
"new_path": "util/cbi-util.c",
"diff": "@@ -81,9 +81,7 @@ const char help_create[] =\n\" --board_version <value> Board version\\n\"\n\" --sku_id <value> SKU ID\\n\"\n\" --size <size> Size of output file in bytes\\n\"\n- \"<value> must be a po... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cleanup: format help text to ease reading
BRANCH=none
BUG=none
TEST=verify help text on command line
Change-Id: Iec19641eb0a61f1f0de1afe4b59b587b8f0d7410
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1945820
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,443 | 04.12.2019 18:43:01 | 28,800 | bf0057e2bff9a68dc9a9f00d660193143d8233c0 | docs/fingerprint: Add note about generating keys
BRANCH=none
TEST=view in gitile | [
{
"change_type": "MODIFY",
"old_path": "docs/fingerprint/fingerprint.md",
"new_path": "docs/fingerprint/fingerprint.md",
"diff": "@@ -187,6 +187,13 @@ devices.\nSwitching keys is only possible when the `RO` firmware is not write protected,\nsince the public portion of the keypair is stored in the `R... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | docs/fingerprint: Add note about generating keys
BRANCH=none
BUG=none
TEST=view in gitile
Change-Id: I7aee42a1eb6f526836c6ef387bf05e1342d2b65f
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1952287
Reviewed-by: Tom Hughes <tomhughes@chromium.org> |
136,427 | 05.12.2019 13:27:51 | 25,200 | cbdbbd39df55ecd582fbcd4f566015bcc2c72770 | usbc: Move PPC overcurrent functions to usb_common.c
Share single copy of PPC overcurrent functions between TCPMv1 and TCPMv2.
BRANCH=none
TEST=build | [
{
"change_type": "MODIFY",
"old_path": "common/usb_common.c",
"new_path": "common/usb_common.c",
"diff": "* and the new (i.e. usb_sm_*) USB-C PD stacks.\n*/\n-#include \"common.h\"\n+#include \"atomic.h\"\n#include \"charge_state.h\"\n+#include \"common.h\"\n+#include \"hooks.h\"\n#include \"task.h\... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | usbc: Move PPC overcurrent functions to usb_common.c
Share single copy of PPC overcurrent functions between TCPMv1 and TCPMv2.
BUG=none
BRANCH=none
TEST=build
Change-Id: I70e25e8580f6bbfebe6269552cd186f3bb981ede
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1954305
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,311 | 03.12.2019 16:29:08 | 25,200 | 436ab9db9a0f999ac3452f8f26d4fb7ad4d4802c | volteer: disable PD 3.0 stack
The PD 3.0 stack isn't reliably charging the battery.
BRANCH=none
TEST=make buildall
TEST=verify PD negotiation with battery connected and battery charging | [
{
"change_type": "MODIFY",
"old_path": "baseboard/volteer/baseboard.h",
"new_path": "baseboard/volteer/baseboard.h",
"diff": "/* USB Type C and USB PD defines */\n/* Enable the new USB-C PD stack */\n+/* TODO: b/145756626 - re-enable once all blocking issues resolved */\n+#if 0\n#define CONFIG_USB_S... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | volteer: disable PD 3.0 stack
The PD 3.0 stack isn't reliably charging the battery.
BUG=b:145622441
BRANCH=none
TEST=make buildall
TEST=verify PD negotiation with battery connected and battery charging
Change-Id: Idccf6a4f325e94fdbf2df310b539a0b75125be92
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1949148 |
136,234 | 05.12.2019 15:32:00 | 28,800 | 93ff538d4c637860e19130c8d47f26081eb8a35c | volteer: Keep RSMRST# pin low at init
Keeping the RSMRST# pin is low at init based on the TGL
PDG power sequence Timing Diagram.
BRANCH=none
TEST=Verified on scope, RSMRST# pin is low at init | [
{
"change_type": "MODIFY",
"old_path": "board/volteer/gpio.inc",
"new_path": "board/volteer/gpio.inc",
"diff": "@@ -75,7 +75,7 @@ GPIO(EC_RST_ODL, PIN(0, 2), GPIO_INT_BOTH |\n/* AP/PCH Signals */\nGPIO(EC_PCH_SYS_PWROK, PIN(3, 7), GPIO_OUT_LOW)\n-GPIO(EC_PCH_RSMRST_ODL, PIN(A, 6), GPIO_ODR_HIGH) /* ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | volteer: Keep RSMRST# pin low at init
Keeping the RSMRST# pin is low at init based on the TGL
PDG power sequence Timing Diagram.
BUG=b:145767544
BRANCH=none
TEST=Verified on scope, RSMRST# pin is low at init
Change-Id: Ia5d5c76ce3f173d1c283da706dd1113ce1dad550
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1954875
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,208 | 06.12.2019 13:42:54 | -28,800 | 25dbfd93433d61616d8a2da4dc92806d2486cb9e | kukui: enlarge stack for hook_task
We are seeing a stack overflow from hook_task. Enlarge it
to prevent from crashing.
TEST=not seeing a EC crash
BRANCH=kukui | [
{
"change_type": "MODIFY",
"old_path": "board/kukui/ec.tasklist",
"new_path": "board/kukui/ec.tasklist",
"diff": "* See CONFIG_TASK_LIST in config.h for details.\n*/\n#define CONFIG_TASK_LIST \\\n- TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \\\n+ TASK_ALWAYS(HOOKS, hook_task, NULL, ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | kukui: enlarge stack for hook_task
We are seeing a stack overflow from hook_task. Enlarge it
to prevent from crashing.
TEST=not seeing a EC crash
BUG=none
BRANCH=kukui
Change-Id: I1c574ecd577528dda57c2771bd4e67b3aa557b75
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1954833
Reviewed-by: Ting Shen <phoenixshen@chromium.org> |
136,443 | 04.12.2019 17:52:47 | 28,800 | b3ebb204b53f8e633ff0f401d4719bd51d813b64 | make: Add help messages for flash variants
BRANCH=none
TEST=make help | [
{
"change_type": "MODIFY",
"old_path": "Makefile.rules",
"new_path": "Makefile.rules",
"diff": "@@ -684,6 +684,10 @@ help:\n@echo \" buildfuzztests - Build all host fuzzers\"\n@echo \" runfuzztests - Build and run all host fuzzers for one round\"\n@echo \"\"\n+ @echo \" flash [BOARD=] - Use OpenOCD ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | make: Add help messages for flash variants
BRANCH=none
BUG=none
TEST=make help
Change-Id: Ic32777ec1c92fd79b803f8d20591ce47685af784
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1952197
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,234 | 02.12.2019 17:37:03 | 28,800 | 41acb78745d413f0db6dfc95c00276b622802be7 | volteer: Enable Burnisde Bridge retimer
BRANCH=none
TEST=BB retimer can communicate via I2C | [
{
"change_type": "MODIFY",
"old_path": "baseboard/intelrvp/retimer.c",
"new_path": "baseboard/intelrvp/retimer.c",
"diff": "@@ -16,6 +16,7 @@ struct usb_retimer usb_retimers[CONFIG_USB_PD_PORT_MAX_COUNT] = {\n.driver = &bb_usb_retimer,\n.i2c_port = I2C_PORT0_BB_RETIMER,\n.i2c_addr_flags = I2C_PORT0_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | volteer: Enable Burnisde Bridge retimer
BUG=b:145560203
BRANCH=none
TEST=BB retimer can communicate via I2C
Change-Id: Ibc9b61d909ff1d07794e13927796e26aa1e53e03
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1947427
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,234 | 04.12.2019 12:09:09 | 28,800 | fdcc690ac4bd08bb28df5a88aee0a10ac5397e22 | volteer: Enable BC1.2 charge ramp
BRANCH=none
TEST=Able to charge ramp BC1.2 devices on both the ports | [
{
"change_type": "MODIFY",
"old_path": "baseboard/volteer/baseboard.c",
"new_path": "baseboard/volteer/baseboard.c",
"diff": "#include \"keyboard_scan.h\"\n#include \"pwm.h\"\n#include \"pwm_chip.h\"\n+#include \"task.h\"\n#include \"temp_sensor.h\"\n#include \"usbc_ppc.h\"\n#include \"usb_mux.h\"\n... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | volteer: Enable BC1.2 charge ramp
BUG=b:145683021
BRANCH=none
TEST=Able to charge ramp BC1.2 devices on both the ports
Change-Id: Iccabb3a1cf51c2cf22c6620e560d7ab74415a2cf
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1951426
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org> |
136,340 | 08.12.2019 00:28:48 | 28,800 | 6f96b488deffa19f7fc0075ed586410c32f3a379 | board: Set min/max frequency attributes
On some boards, min_/max_frequency attributes were not set, esp. for
kx022 acceleometers.
BRANCH=octopus,coral
TEST=compile
Tested-by: Justin TerAvest | [
{
"change_type": "MODIFY",
"old_path": "board/ampton/board.c",
"new_path": "board/ampton/board.c",
"diff": "@@ -191,6 +191,8 @@ struct motion_sensor_t motion_sensors[] = {\n.i2c_spi_addr_flags = KX022_ADDR1_FLAGS,\n.rot_standard_ref = &lid_standard_ref,\n.default_range = 4, /* g */\n+ .min_frequency... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | board: Set min/max frequency attributes
On some boards, min_/max_frequency attributes were not set, esp. for
kx022 acceleometers.
BUG=b:145799480
BRANCH=octopus,coral
TEST=compile
Change-Id: I6d32926541505f02f183539ca3ad9f70c1ae7a6b
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1957374
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Tested-by: Justin TerAvest <teravest@chromium.org> |
136,257 | 06.12.2019 17:00:30 | -28,800 | c3c55b71261ca9ac43e6df5e05cb3a3fcd47efee | volteer: update battery parameter
Update battery parameter
BRANCH=NONE
TEST=make buildall | [
{
"change_type": "MODIFY",
"old_path": "board/volteer/battery.c",
"new_path": "board/volteer/battery.c",
"diff": "@@ -50,16 +50,16 @@ const struct board_batt_params board_battery_info[] = {\n}\n},\n.batt_info = {\n- .voltage_max = TARGET_WITH_MARGIN(13050, 5),\n- .voltage_normal = 11400, /* mV */\n+... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | volteer: update battery parameter
Update battery parameter
BUG=b:145786003
BRANCH=NONE
TEST=make buildall
Change-Id: Ie0941cb06d82902a3b32b9165644a62efdb05746
Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1955106
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,280 | 03.12.2019 10:47:12 | -28,800 | 76f923047f4395993d4df7bae0c7d7d515075887 | jacuzzi: remove CONFIG_USB_PD_VBUS_MEASURE_NOT_PRESENT
TEST=`ectool usbpdpower`
BRANCH=none
Tested-by: Ting Shen | [
{
"change_type": "MODIFY",
"old_path": "board/damu/board.h",
"new_path": "board/damu/board.h",
"diff": "#define CONFIG_USB_PD_TCPM_FUSB302\n#define CONFIG_USB_PD_DISCHARGE_GPIO\n-#define CONFIG_USB_PD_VBUS_MEASURE_NOT_PRESENT\n#define CONFIG_USB_PD_TCPC_LOW_POWER\n#define CONFIG_USB_MUX_IT5205\n"
... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | jacuzzi: remove CONFIG_USB_PD_VBUS_MEASURE_NOT_PRESENT
BUG=b:145376409
TEST=`ectool usbpdpower`
BRANCH=none
Change-Id: I95fea133997643408652e1884fe53215ef17e2a9
Signed-off-by: Ting Shen <phoenixshen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1947508
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org> |
136,427 | 05.12.2019 14:48:00 | 25,200 | dfdd079e8746226b6bc4b66a8ddbde82b6c3d74d | Morphius: create new board
BRANCH=none
TEST=build | [
{
"change_type": "ADD",
"old_path": null,
"new_path": "board/morphius/analyzestack.yaml",
"diff": "+remove:\n+- panic_assert_fail\n"
},
{
"change_type": "ADD",
"old_path": null,
"new_path": "board/morphius/battery.c",
"diff": "+/* Copyright 2019 The Chromium OS Authors. All right... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Morphius: create new board
BUG=b:144029292
BRANCH=none
TEST=build
Change-Id: Id362ac64a43082e0ae2cb59c0259f040c693dd1f
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1954308
Reviewed-by: Denis Brockus <dbrockus@chromium.org> |
136,377 | 22.10.2019 23:01:21 | 25,200 | e4967bcc38227275d6788f1504e7a679c865357d | ccd_howtos: add ccd faft setup
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "docs/ccd_howtos.md",
"new_path": "docs/ccd_howtos.md",
"diff": "@@ -65,6 +65,168 @@ This goes through the steps to connect SuzyQ and start using CCD.\nconsole is a good enough sign that your Suzyq setup is ok.\n---\n+## Setup CCD for FAFT\n+\n+These are the mo... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | ccd_howtos: add ccd faft setup
BUG=none
BRANCH=none
TEST=none
Change-Id: Ibe22f9131dc34ce4185379d8db166de42a3d1e24
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1873853
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> |
136,324 | 05.12.2019 10:12:37 | 25,200 | f74ddb9de4f7e29402156904d3f16a8d01fb6df5 | tcpci: add tcpc_update routines for read/mod/write
BRANCH=none
TEST=verify TCPCI is still functioning | [
{
"change_type": "MODIFY",
"old_path": "driver/tcpm/tcpci.c",
"new_path": "driver/tcpm/tcpci.c",
"diff": "@@ -144,6 +144,38 @@ int tcpc_xfer_unlocked(int port, const uint8_t *out, int out_size,\npd_device_accessed(port);\nreturn rv;\n}\n+\n+int tcpc_update8(int port, int reg,\n+ uint8_t mask,\n+ enu... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | tcpci: add tcpc_update routines for read/mod/write
BUG=none
BRANCH=none
TEST=verify TCPCI is still functioning
Change-Id: I325b025bf65d3b0cb6e15cf8dab8488138cc76d5
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1953124
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Jett Rink <jettrink@chromium.org> |
136,324 | 09.12.2019 08:41:36 | 25,200 | 4ee83b2cdf8b222228fde4baf08ab218a06148db | nct38xx: change rmw operations to use i2c update
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "driver/tcpm/nct38xx.c",
"new_path": "driver/tcpm/nct38xx.c",
"diff": "@@ -56,21 +56,19 @@ static int nct38xx_tcpm_init(int port)\nreturn rv;\n/* Disable OVP */\n- rv = tcpc_read(port, TCPC_REG_FAULT_CTRL, ®);\n- if (rv)\n- return rv;\n- reg = reg | TCPC_REG... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | nct38xx: change rmw operations to use i2c update
BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: I93add5d4e3f633ad9ce799576407835b6d1e41e8
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1958410
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,324 | 08.12.2019 13:44:40 | 25,200 | b95d6d39532ad49e082e8267f3dafa28af55783e | tcpci: tcpci_tcpm_set_polarity should not clobber
Bits 1-7 were getting clobbered when we updated Bit 0
BRANCH=none
TEST=verify tcpci still functions | [
{
"change_type": "MODIFY",
"old_path": "driver/tcpm/tcpci.c",
"new_path": "driver/tcpm/tcpci.c",
"diff": "@@ -353,8 +353,10 @@ int tcpci_enter_low_power_mode(int port)\nint tcpci_tcpm_set_polarity(int port, int polarity)\n{\n- return tcpc_write(port, TCPC_REG_TCPC_CTRL,\n- TCPC_REG_TCPC_CTRL_SET(pol... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | tcpci: tcpci_tcpm_set_polarity should not clobber
Bits 1-7 were getting clobbered when we updated Bit 0
BUG=none
BRANCH=none
TEST=verify tcpci still functions
Change-Id: Ida60a08aa9e250e1dfb640caff44efc75c8ca1a9
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1956438
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,324 | 06.12.2019 16:17:37 | 25,200 | f9ca02003dbcf9152c97dbfa853a29ad0136485a | nct38xx: Use common tcpci set_polarity
BRANCH=none
TEST=verify TCPCI is still functional | [
{
"change_type": "MODIFY",
"old_path": "driver/tcpm/nct38xx.c",
"new_path": "driver/tcpm/nct38xx.c",
"diff": "@@ -201,20 +201,6 @@ int tcpci_nct38xx_drp_toggle(int port)\nreturn tcpci_tcpc_drp_toggle(port);\n}\n-int tcpci_nct38xx_set_polarity(int port, int polarity)\n-{\n- int rv, reg;\n-\n- rv = tc... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | nct38xx: Use common tcpci set_polarity
BUG=none
BRANCH=none
TEST=verify TCPCI is still functional
Change-Id: Id5004076ecf8eb7d9bd2e4f12a23d612cc5a8e33
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1956439
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,324 | 09.12.2019 09:10:57 | 25,200 | 7199e402ed041c9f856fa1100b7a904af345a763 | isl9241: use i2c update for read/modify/write
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "driver/charger/isl9241.c",
"new_path": "driver/charger/isl9241.c",
"diff": "@@ -70,6 +70,13 @@ static inline int isl9241_write(int offset, int value)\noffset, value);\n}\n+static inline int isl9241_update(int offset, uint16_t mask,\n+ enum mask_update_action a... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | isl9241: use i2c update for read/modify/write
BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: I8ff09ef662d4bb4f02749cb1c004541a44c8cad8
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1958412
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,324 | 09.12.2019 09:19:59 | 25,200 | c2e089ac90c46c14d4827b40e3eb9b78f46ae518 | pi3usb9201: use i2c field update common function
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "driver/bc12/pi3usb9201.c",
"new_path": "driver/bc12/pi3usb9201.c",
"diff": "@@ -67,26 +67,12 @@ static inline int raw_read8(int port, int offset, int *value)\noffset, value);\n}\n-static inline int raw_write8(int port, int offset, int value)\n-{\n- return i2c_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | pi3usb9201: use i2c field update common function
BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: I26eeba971cea3f470c7e54fa325e361a2a26b313
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1958413
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,427 | 05.12.2019 15:44:58 | 25,200 | 10808c08199912e8d2f4a4b3a5449cebaefd748c | trembyle: Use amd_fp5_usb_mux_driver for both C0 and C1
Both ports require setting the SOC internal mux.
BRANCH=none
TEST=USB3 device enumerates on C1 | [
{
"change_type": "MODIFY",
"old_path": "baseboard/zork/baseboard.c",
"new_path": "baseboard/zork/baseboard.c",
"diff": "@@ -462,8 +462,7 @@ struct usb_mux usb_muxes[] = {\n.driver = &amd_fp5_usb_mux_driver,\n},\n[USBC_PORT_C1] = {\n- .driver = &tcpci_tcpm_usb_mux_driver,\n- .hpd_update = &ps8xxx_tcp... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | trembyle: Use amd_fp5_usb_mux_driver for both C0 and C1
Both ports require setting the SOC internal mux.
BUG=b:143147353
BRANCH=none
TEST=USB3 device enumerates on C1
Change-Id: Iad64a4c361e95164dd3c1c4ac7ea3ce444f366f1
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1955147
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org> |
136,418 | 07.12.2019 16:59:59 | -28,800 | a7caa808133041759366f45b90d4fa8d252a5a62 | Trogdor: Measure the rail PP868_S1C_S2C_S3C
Add ADC5 which measure the rail PP868_S1C_S2C_S3C.
BRANCH=None
TEST=Checked the ADC values when AP on and off. | [
{
"change_type": "MODIFY",
"old_path": "board/trogdor/board.c",
"new_path": "board/trogdor/board.c",
"diff": "@@ -146,6 +146,14 @@ const struct adc_t adc_channels[] = {\n2,\n0\n},\n+ /* Expected to be within 2.8V. No multiplier. */\n+ [ADC_PP868_S1C_S2C_S3C] = {\n+ \"PP868_S1C_S2C_S3C\",\n+ NPCX_ADC... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Trogdor: Measure the rail PP868_S1C_S2C_S3C
Add ADC5 which measure the rail PP868_S1C_S2C_S3C.
BRANCH=None
BUG=b:143616352
TEST=Checked the ADC values when AP on and off.
Change-Id: I8b33e199a9c7214d748c5435d9a77d0bf1fd7c15
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1954981
Reviewed-by: Stephen Boyd <swboyd@chromium.org> |
136,418 | 07.12.2019 14:21:22 | -28,800 | b7d028f7da714bf98a2634922f86ec2952c66fb7 | Trogdor: Remove VBOB rail control
The VBOB rail is for backup only. Verified the hardware that it works
without this rail. Should be OK to remove the control of it.
BRANCH=None
TEST=Verified AP power on and power off. | [
{
"change_type": "MODIFY",
"old_path": "power/sc7180.c",
"new_path": "power/sc7180.c",
"diff": "@@ -329,7 +329,7 @@ static void wait_pmic_pwron(int enable, unsigned int timeout)\n/**\n* Set the state of the system power signals but without any check.\n*\n- * The system power signals are the enable p... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Trogdor: Remove VBOB rail control
The VBOB rail is for backup only. Verified the hardware that it works
without this rail. Should be OK to remove the control of it.
BRANCH=None
BUG=b:143616352
TEST=Verified AP power on and power off.
Change-Id: I9632d881b590482a07482e23aba88bc7ffec4521
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1955108
Reviewed-by: Stephen Boyd <swboyd@chromium.org> |
136,269 | 10.12.2019 13:06:19 | 28,800 | 42146139144fc2debf9ede8d31148f9cbfd2a19f | docs/fingerprint: Add instructions for running unit tests
BRANCH=none
TEST=view in gitiles | [
{
"change_type": "MODIFY",
"old_path": "docs/fingerprint/fingerprint.md",
"new_path": "docs/fingerprint/fingerprint.md",
"diff": "@@ -71,10 +71,24 @@ prevent you from uploading.\n(chroot) ~/trunk/src/platform/ec $ make buildall -j\n```\n-## Build tests\n+## Building and running unit tests\n+\n+List ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | docs/fingerprint: Add instructions for running unit tests
BRANCH=none
BUG=none
TEST=view in gitiles
Change-Id: Ib3d85c5fc4301b9db01d0bf288f2952f8553d14d
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1960928
Reviewed-by: Craig Hesling <hesling@chromium.org>
Commit-Queue: Craig Hesling <hesling@chromium.org> |
136,282 | 09.12.2019 22:23:35 | -28,800 | 0d300a80616e5669ad43269c2dfc913f9feedf12 | jinlon: Assign SYS_RST_ODL to GPIOC5
Clone from CL:1928421
BRANCH=hatch
TEST=make sure AP reset pass. | [
{
"change_type": "MODIFY",
"old_path": "board/jinlon/gpio.inc",
"new_path": "board/jinlon/gpio.inc",
"diff": "@@ -44,7 +44,7 @@ GPIO_INT(HDMI_CONN_HPD, PIN(7, 2), GPIO_INT_BOTH, hdmi_hpd_interrupt)\nGPIO_INT(EC_VOLDN_BTN_ODL, PIN(9, 3), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt)\nGPIO_INT(EC_VO... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | jinlon: Assign SYS_RST_ODL to GPIOC5
Clone from CL:1928421
BUG=none
BRANCH=hatch
TEST=make sure AP reset pass.
Change-Id: I98f8160c9d948a89e8f9a3fd0a3f85b6a7b95b82
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1958385
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> |
136,282 | 09.12.2019 22:29:46 | -28,800 | 29fdf0d429bbe5272a6e560852feb8a71c7dc957 | jinlon: Make sure EC_RST_ODL is GPIO_LOCKED
Clone from CL:1928422
BRANCH=hatch
TEST=make buildall | [
{
"change_type": "MODIFY",
"old_path": "board/jinlon/gpio.inc",
"new_path": "board/jinlon/gpio.inc",
"diff": "@@ -61,6 +61,17 @@ GPIO(CPU_C10_GATE_L, PIN(6, 7), GPIO_INPUT)\n/* MKBP event synchronization */\nGPIO(EC_INT_L, PIN(7, 0), GPIO_ODR_HIGH)\n+/*\n+ * GPIO_INT_BOTH is required for PSL wake fr... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | jinlon: Make sure EC_RST_ODL is GPIO_LOCKED
Clone from CL:1928422
BUG=none
BRANCH=hatch
TEST=make buildall
Change-Id: I488ecaa317b2164d693c9acea2ed010da2e26e2b
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1958386
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> |
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