author int64 658 755k | date stringlengths 19 19 | timezone int64 -46,800 43.2k | hash stringlengths 40 40 | message stringlengths 5 490 | mods list | language stringclasses 20 values | license stringclasses 3 values | repo stringlengths 5 68 | original_message stringlengths 12 491 |
|---|---|---|---|---|---|---|---|---|---|
136,282 | 10.12.2019 10:52:26 | -28,800 | 9a6cc49c7b56d518aa04777f1c8cff507ca3f651 | dratini: configure fan speed at initial
Set correct fan maxima/minimum and initial speed for EVT.
To provent fan loudly after ec reset. Set lower initial speed to 10
percent.
BRANCH=hatch
TEST=make buildall | [
{
"change_type": "MODIFY",
"old_path": "board/dratini/board.c",
"new_path": "board/dratini/board.c",
"diff": "@@ -279,9 +279,9 @@ const struct fan_conf fan_conf_0 = {\n/* Default */\nconst struct fan_rpm fan_rpm_0 = {\n- .rpm_min = 3100,\n- .rpm_start = 3100,\n- .rpm_max = 6900,\n+ .rpm_min = 2500,\... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | dratini: configure fan speed at initial
Set correct fan maxima/minimum and initial speed for EVT.
To provent fan loudly after ec reset. Set lower initial speed to 10
percent.
BUG=none
BRANCH=hatch
TEST=make buildall
Change-Id: I468b82942ec2e5841ed35ced9baea296b35f620b
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1958390
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> |
136,295 | 29.11.2019 11:20:33 | -28,800 | cd3aace7aa0a3a01220e716c36a17af312d63ae4 | kappa: Add keyboard functionality
Clone from CL:1693863
Added IT8801 io expandor (which include keyboard controller) and
the keyscan task.
BRANCH=none
TEST=make buildall | [
{
"change_type": "MODIFY",
"old_path": "board/kappa/board.c",
"new_path": "board/kappa/board.c",
"diff": "#include \"hooks.h\"\n#include \"host_command.h\"\n#include \"i2c.h\"\n+#include \"it8801.h\"\n+#include \"keyboard_scan.h\"\n#include \"lid_switch.h\"\n#include \"power.h\"\n#include \"power_bu... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | kappa: Add keyboard functionality
Clone from CL:1693863
Added IT8801 io expandor (which include keyboard controller) and
the keyscan task.
BUG=none
BRANCH=none
TEST=make buildall
Change-Id: Ibd74f55e37e8c9bef1d1866b0e538dec37000d66
Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1943496
Reviewed-by: Ting Shen <phoenixshen@chromium.org> |
136,233 | 10.12.2019 14:56:37 | -28,800 | 82b48440086e010880db8bd102e7ade1f8d515ad | it83xx/spi: add spi slave function
Add the spi slave function which is required to
communicate with the EC when the CPU is the ARM
processor.
BRANCH=none
TEST=Replaced board elm's EC with it83202 and
boot kernel and keyboard work. | [
{
"change_type": "MODIFY",
"old_path": "chip/it83xx/build.mk",
"new_path": "chip/it83xx/build.mk",
"diff": "@@ -30,6 +30,7 @@ chip-$(CONFIG_ADC)+=adc.o\nchip-$(CONFIG_HOSTCMD_X86)+=lpc.o ec2i.o\nchip-$(CONFIG_HOSTCMD_ESPI)+=espi.o\nchip-$(CONFIG_SPI_MASTER)+=spi_master.o\n+chip-$(CONFIG_SPI)+=spi.o\... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | it83xx/spi: add spi slave function
Add the spi slave function which is required to
communicate with the EC when the CPU is the ARM
processor.
BUG=none
BRANCH=none
TEST=Replaced board elm's EC with it83202 and
boot kernel and keyboard work.
Change-Id: I7ce3bb56450276997b58e84b1c6de3f8e45bb4b7
Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1918991
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,234 | 10.12.2019 16:46:55 | 28,800 | 8d00345012f717500a85890a07326ff27cf54593 | usb_pd: Get current DP pin mode
As part of the new changes in CL:1949052 getting DP pin mode status
is removed hence adding back old CL:1646534 on TOT.
BRANCH=none
TEST=Manually tested on TGLRVP, able to see DP working | [
{
"change_type": "MODIFY",
"old_path": "common/usb_common.c",
"new_path": "common/usb_common.c",
"diff": "@@ -752,11 +752,16 @@ __overridable int svdm_dp_status(int port, uint32_t *payload)\nreturn 2;\n};\n+__overridable uint8_t get_dp_pin_mode(int port)\n+{\n+ return pd_dfp_dp_get_pin_mode(port, dp... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | usb_pd: Get current DP pin mode
As part of the new changes in CL:1949052 getting DP pin mode status
is removed hence adding back old CL:1646534 on TOT.
BUG=b:146006717
BRANCH=none
TEST=Manually tested on TGLRVP, able to see DP working
Change-Id: I09cee179ad64c1b7753ec87ce83a1d5dc54770cd
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1961150
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,282 | 10.12.2019 11:43:47 | -28,800 | bf86d97b7b3bf0401b96752d3924e8d3364e2b30 | meep: correct battery discharging parameter
Correct batteery discharging parameter to follow datasheet.
BRANCH=octopus
TEST=make buildall | [
{
"change_type": "MODIFY",
"old_path": "board/meep/battery.c",
"new_path": "board/meep/battery.c",
"diff": "@@ -56,7 +56,7 @@ const struct board_batt_params board_battery_info[] = {\n.start_charging_max_c = 45,\n.charging_min_c = 0,\n.charging_max_c = 45,\n- .discharging_min_c = 0,\n+ .discharging_m... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | meep: correct battery discharging parameter
Correct batteery discharging parameter to follow datasheet.
BUG=b:145494158
BRANCH=octopus
TEST=make buildall
Change-Id: Ib5e134af912d99a27d5f2b55d206a7bee7f5f74c
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1958391
Reviewed-by: Diana Z <dzigterman@chromium.org> |
136,417 | 13.12.2019 09:49:09 | 28,800 | b0bb3ce2a0e077108e5df2966f13b4d6a024b3d5 | docs: Fix servo link
BRANCH=None
TEST=None | [
{
"change_type": "MODIFY",
"old_path": "docs/write_protection.md",
"new_path": "docs/write_protection.md",
"diff": "@@ -303,4 +303,4 @@ etc.) return an error if `EC_FLASH_PROTECT_ALL_NOW` is set.\n[`OverrideWP`]: ./case_closed_debugging_cr50.md\n[wp_screw]: https://www.chromium.org/chromium-os/firmw... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | docs: Fix servo link
BRANCH=None
BUG=None
TEST=None
Change-Id: Iadfeb5179a23fd2b58b9edf1e2d8610dbcf67403
Signed-off-by: Neeraj Poojary <npoojary@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1965760
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,282 | 13.12.2019 17:02:36 | -28,800 | 13a1764e9d23aeb20a819ca479440ce006b10cd1 | jinlon: remove identifying SKUs for kbbacklit and convertible.
Jinlon is all convertible SKUs and has kbbacklit. This patch
remove identifying SKUs for kbbacklit and convertible.
BRANCH=hatch
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "board/jinlon/board.c",
"new_path": "board/jinlon/board.c",
"diff": "@@ -380,34 +380,11 @@ static void setup_fans(void)\nthermal_params[TEMP_SENSOR_2] = thermal_b;\n}\n-/*\n- * Returns true for boards that are convertible into tablet mode, and\n- * false for cl... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | jinlon: remove identifying SKUs for kbbacklit and convertible.
Jinlon is all convertible SKUs and has kbbacklit. This patch
remove identifying SKUs for kbbacklit and convertible.
BUG=b:145688887
BRANCH=hatch
TEST=make buildall -j
Change-Id: I15a0ba9017a5a924c90625d85f9714afd03ab355
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1966816
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> |
136,443 | 09.12.2019 11:46:13 | 28,800 | c13071f4e5625ac1aee104a7127d712add0c7808 | stm32h7: Cleanup reset reg constants
This brings no change in functionality.
BRANCH=nocturne,hatch
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "chip/stm32/registers-stm32h7.h",
"new_path": "chip/stm32/registers-stm32h7.h",
"diff": "/* Reset causes definitions */\n#define STM32_RCC_RESET_CAUSE STM32_RCC_RSR\n-#define RESET_CAUSE_WDG 0x14000000\n-#define RESET_CAUSE_SFT 0x01000000\n-#define RESET_CAUSE_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | stm32h7: Cleanup reset reg constants
This brings no change in functionality.
BRANCH=nocturne,hatch
BUG=none
TEST=make buildall -j
Change-Id: I03ed72ba07affb9b6a8757c1a2154ca31283bb97
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1958845
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,443 | 09.12.2019 11:46:31 | 28,800 | d29c928cda0bf730e6d0a5762205b330dea09639 | stm32f4: Cleanup reset reg constants
This brings no function change.
BRANCH=hatch
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "chip/stm32/registers-stm32f4.h",
"new_path": "chip/stm32/registers-stm32f4.h",
"diff": "/* Reset causes definitions */\n/* Reset causes in RCC CSR register */\n#define STM32_RCC_RESET_CAUSE STM32_RCC_CSR\n-#define RESET_CAUSE_WDG 0x60000000\n-#define RESET_CAU... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | stm32f4: Cleanup reset reg constants
This brings no function change.
BRANCH=hatch
BUG=none
TEST=make buildall -j
Change-Id: I9a9363d4771039244ed79408674a598f768075e9
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1958846
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,443 | 09.12.2019 11:57:06 | 28,800 | 5db9f5f19e99b00a0bc284c4989de8cac81bbf47 | stm32f4: Fix SBF clear bit
The STM32F412 and STM32F446 reference manuals seem
to indicate that the SBF clear bit is actually bit 3.
BRANCH=hatch
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "chip/stm32/registers-stm32f4.h",
"new_path": "chip/stm32/registers-stm32f4.h",
"diff": "#define STM32_PWR_RESET_CAUSE STM32_PWR_CSR\n#define RESET_CAUSE_SBF BIT(1)\n#define STM32_PWR_RESET_CAUSE_CLR STM32_PWR_CR\n-#define RESET_CAUSE_SBF_CLR BIT(2)\n+#define R... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | stm32f4: Fix SBF clear bit
The STM32F412 and STM32F446 reference manuals seem
to indicate that the SBF clear bit is actually bit 3.
BRANCH=hatch
BUG=none
TEST=make buildall -j
Change-Id: Ib98c5831f19355dfe3643c7d0b8258bd449d373b
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1958847
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,443 | 11.12.2019 13:04:20 | 28,800 | f8d4a9440152b71599dcd76453fbb47baa13aa1b | stm32f4: Add registers for DBGMCU
This is more for register documentation accuracy.
BRANCH=hatch
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "chip/stm32/registers-stm32f4.h",
"new_path": "chip/stm32/registers-stm32f4.h",
"diff": "#define STM32_SYSCFG_CFGR REG32(STM32_SYSCFG_BASE + 0x2C)\n-/* Peripheral bits for RCC_APB/AHB and DBGMCU regs */\n+/* Peripheral bits for RCC_APB/AHB regs */\n#define STM3... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | stm32f4: Add registers for DBGMCU
This is more for register documentation accuracy.
BRANCH=hatch
BUG=none
TEST=make buildall -j
Change-Id: I879ae1feb85115ebfa845fc98ff9bb1b9ef2b936
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1962973
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,256 | 16.12.2019 10:04:23 | 25,200 | ead3425b71a445ff3d327730eb89708c5df29100 | cleanup: add prototype incorrectly removed
CL:1900058 accidentally removed this prototype that was initially added
in CL:1891255.
BRANCH=none
TEST=builds | [
{
"change_type": "MODIFY",
"old_path": "include/usb_pd.h",
"new_path": "include/usb_pd.h",
"diff": "@@ -2329,6 +2329,17 @@ void pd_notify_dp_alt_mode_entry(void);\nenum pd_cc_states pd_get_cc_state(\nenum tcpc_cc_voltage_status cc1, enum tcpc_cc_voltage_status cc2);\n+/*\n+ * Optional, get the board... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cleanup: add prototype incorrectly removed
CL:1900058 accidentally removed this prototype that was initially added
in CL:1891255.
BRANCH=none
BUG=none
TEST=builds
Change-Id: Id871cd9981a9be36ed0e366c94a5500111a7d064
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1969253
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,443 | 16.12.2019 11:42:46 | 28,800 | 0370fc4e58a10c0545ca3ff2285443d13343a946 | core/nds32: Format linker script
This is a cleanup/reformat of the linker script.
This brings no functional change.
BRANCH=none
TEST=make buildall | [
{
"change_type": "MODIFY",
"old_path": "core/nds32/ec.lds.S",
"new_path": "core/nds32/ec.lds.S",
"diff": "OUTPUT_FORMAT(BFD_FORMAT, BFD_FORMAT, BFD_FORMAT)\nOUTPUT_ARCH(BFD_ARCH)\nENTRY(reset)\n+\nMEMORY\n{\nFLASH (rx) : ORIGIN = FW_OFF(SECTION), LENGTH = FW_SIZE(SECTION)\n@@ -25,11 +26,13 @@ MEMORY... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | core/nds32: Format linker script
This is a cleanup/reformat of the linker script.
This brings no functional change.
BRANCH=none
BUG=b:146083406
TEST=make buildall
Change-Id: Id87f33d3a69f3c2ff5dffc761932eee823f301c7
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1966290
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,443 | 16.12.2019 11:43:08 | 28,800 | db58bafaec3d5744afbaebb1c518d7c1c978c249 | core/riscv-rv32i: Format linker script
This is a cleanup/reformat of the linker script.
This brings no functional change.
BRANCH=none
TEST=make buildall | [
{
"change_type": "MODIFY",
"old_path": "core/riscv-rv32i/ec.lds.S",
"new_path": "core/riscv-rv32i/ec.lds.S",
"diff": "OUTPUT_FORMAT(BFD_FORMAT, BFD_FORMAT, BFD_FORMAT)\nOUTPUT_ARCH(BFD_ARCH)\nENTRY(__reset)\n+\nMEMORY\n{\nFLASH (rx) : ORIGIN = FW_OFF(SECTION) - CHIP_ILM_BASE, \\\nLENGTH = FW_SIZE(SE... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | core/riscv-rv32i: Format linker script
This is a cleanup/reformat of the linker script.
This brings no functional change.
BRANCH=none
BUG=b:146083406
TEST=make buildall
Change-Id: I8dd252f6b53c510dbeedee1f33d4de35ce0d8922
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1970430
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,208 | 17.12.2019 10:04:09 | -28,800 | c0fac86829c4bf0345c568584f3ab1a981866595 | baseboard/kukui: reduce UART_TX buffer size to 4096
kodama's build failure due to out of space.
Reduce the TX buffer size.
Note: This change should not cherry-pick to firmware branch.
TEST=make buildall
BRANCH=none | [
{
"change_type": "MODIFY",
"old_path": "baseboard/kukui/baseboard.h",
"new_path": "baseboard/kukui/baseboard.h",
"diff": "/* Increase tx buffer size, as we'd like to stream EC log to AP. */\n#undef CONFIG_UART_TX_BUF_SIZE\n-#define CONFIG_UART_TX_BUF_SIZE 8192\n+#define CONFIG_UART_TX_BUF_SIZE 4096\... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | baseboard/kukui: reduce UART_TX buffer size to 4096
kodama's build failure due to out of space.
Reduce the TX buffer size.
Note: This change should not cherry-pick to firmware branch.
TEST=make buildall
BUG=chromium:1034518
BRANCH=none
Change-Id: I8f65dd62f10ead34c68b557569edcdd680bbd931
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1970672 |
136,208 | 14.11.2019 11:24:36 | -28,800 | 5ec3b2791a405b18ff919bfd9a4283b1e03debda | charger/rt946x: expose rt946x_get_adc
expose rt946x_get_adc for ADC readings
TEST=make buildall -j
BRANCH=kukui | [
{
"change_type": "MODIFY",
"old_path": "driver/charger/rt946x.c",
"new_path": "driver/charger/rt946x.c",
"diff": "@@ -71,15 +71,6 @@ enum rt946x_chg_stat {\nRT946X_CHGSTAT_FAULT,\n};\n-enum rt946x_adc_in_sel {\n- RT946X_ADC_VBUS_DIV5 = 1,\n- RT946X_ADC_VBUS_DIV2,\n- MT6370_ADC_TS_BAT = 6,\n- MT6370_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | charger/rt946x: expose rt946x_get_adc
expose rt946x_get_adc for ADC readings
TEST=make buildall -j
BUG=b:141903096
BRANCH=kukui
Change-Id: Ibd8f900347b1a940dab1cce7e20031da02b0a334
Signed-off-by: Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1915480
Reviewed-by: Ting Shen <phoenixshen@chromium.org> |
136,250 | 13.12.2019 18:33:23 | 28,800 | 071aa62a826290bb0697d72cf3490442b46e2357 | i2c-pseudo: Fix second example I2C transaction in Documentation.txt
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "extra/i2c_pseudo/Documentation.txt",
"new_path": "extra/i2c_pseudo/Documentation.txt",
"diff": "@@ -283,8 +283,8 @@ read(fd, buf, sizeof(buf));\n*\n* Note that it is also valid to write these together in one write().\n*/\n-dprintf(fd, \"I2C_XFER_REPLY 3 0 0x00... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | i2c-pseudo: Fix second example I2C transaction in Documentation.txt
BRANCH=none
BUG=none
TEST=none
Change-Id: I3fcdfb065e5d2534e6ebcfb7cdd7d60401c8cce1
Signed-off-by: Matthew Blecker <matthewb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1968205
Reviewed-by: Harry Cutts <hcutts@chromium.org>
Commit-Queue: Harry Cutts <hcutts@chromium.org> |
136,443 | 16.12.2019 17:15:44 | 28,800 | e0d99a923236fb2f65fb8301e6ac631ba4d4267b | nucleo-h743zi: Add button
BRANCH=none
TEST=make BOARD=nucleo-h743zi
# Flash board
# From the EC UART console:
gpioget BTN1
# Hold button down
gpioget BTN1 | [
{
"change_type": "MODIFY",
"old_path": "board/nucleo-h743zi/board.c",
"new_path": "board/nucleo-h743zi/board.c",
"diff": "@@ -45,11 +45,15 @@ static void ap_deferred(void)\nDECLARE_DEFERRED(ap_deferred);\n/* PCH power state changes */\n-void slp_event(enum gpio_signal signal)\n+static void slp_event... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | nucleo-h743zi: Add button
BRANCH=none
BUG=none
TEST=make BOARD=nucleo-h743zi
# Flash board
# From the EC UART console:
gpioget BTN1
# Hold button down
gpioget BTN1
Change-Id: I3e412a299d9394bbb161e43b22382dea34e7e603
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1970813
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,234 | 11.12.2019 07:38:22 | 28,800 | 90d3346a74953d98e2ddd8e622e91289aaa91f01 | tglrvp: Enable Thunderbolt-compatible mode
BRANCH=none
TEST=Able to detect Thunderbolt-compatible device | [
{
"change_type": "MODIFY",
"old_path": "board/tglrvpu_ite/board.h",
"new_path": "board/tglrvpu_ite/board.h",
"diff": "/* Enabling SOP* communication */\n#define CONFIG_USB_PD_DECODE_SOP\n+/* Enabling Thunderbolt-compatible mode */\n+#define CONFIG_USB_PD_TBT_COMPAT_MODE\n+\n#ifndef __ASSEMBLER__\nen... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | tglrvp: Enable Thunderbolt-compatible mode
BUG=b:140643923
BRANCH=none
TEST=Able to detect Thunderbolt-compatible device
Change-Id: Ic904f7d7a45cfd4051148792c96e6d7ad9d8610e
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1962751
Commit-Queue: Keith Short <keithshort@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,443 | 16.12.2019 17:16:58 | 28,800 | b8d97655fc0c5b19042fc1c28384c0580debb9c0 | common: Format firmware_image linker script
This is a cleanup/reformat of the linker script.
This brings no functional change.
BRANCH=none
TEST=make buildall | [
{
"change_type": "MODIFY",
"old_path": "common/firmware_image.lds.S",
"new_path": "common/firmware_image.lds.S",
"diff": "#include \"rwsig.h\"\n#ifdef NPCX_RO_HEADER\n-/* Replace *_MEM_OFF with *_STORAGE_OFF to indicate flat file contains header\n- * or some struture which doesn't belong to FW */\n+... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | common: Format firmware_image linker script
This is a cleanup/reformat of the linker script.
This brings no functional change.
BRANCH=none
BUG=b:146083406
TEST=make buildall
Change-Id: Ia86d7ed16ad3d12c26688b23e79ffb6f4bba9531
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1970812
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,191 | 13.12.2019 16:53:21 | 25,200 | 122f0b194d6ced2683e97686008bc3de2680edc4 | Fix URL for USB-C spec to August update
TEST=Click on new MD
BRANCH=None | [
{
"change_type": "MODIFY",
"old_path": "docs/usb-c.md",
"new_path": "docs/usb-c.md",
"diff": "@@ -218,5 +218,5 @@ Probing now. Need new driver in depthcharge\n[USB PD Spec Id]: https://www.usb.org/document-library/usb-power-delivery\n[Introduction to USB Power Delivery]: https://www.microchip.com/ww... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Fix URL for USB-C spec to August update
BUG=None
TEST=Click on new MD
BRANCH=None
Change-Id: I7b927ff645e203bdd115559453d2b69a3d6e53bb
Signed-off-by: Eric Peers <epeers@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1967767
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,287 | 01.10.2019 00:51:23 | 21,600 | 61ef5715f654efeefea19c259f3eaf103c86c96d | common: Add sensor stillness detector
This change adds a stillness detector for 3d sensors.
This will be needed to filter sensor readings when
calibrating later.
BRANCH=None
TEST=buildall with new unit tests | [
{
"change_type": "MODIFY",
"old_path": "common/build.mk",
"new_path": "common/build.mk",
"diff": "@@ -119,6 +119,7 @@ common-$(CONFIG_ROLLBACK)+=rollback.o\ncommon-$(CONFIG_RWSIG)+=rwsig.o vboot/common.o\ncommon-$(CONFIG_RWSIG_TYPE_RWSIG)+=vboot/vb21_lib.o\ncommon-$(CONFIG_MATH_UTIL)+=math_util.o\n+... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | common: Add sensor stillness detector
This change adds a stillness detector for 3d sensors.
This will be needed to filter sensor readings when
calibrating later.
BUG=b:138303429,chromium:1023858
BRANCH=None
TEST=buildall with new unit tests
Change-Id: I919ae7533fd42b0394de66aa0585e58343a662cc
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1833157
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> |
136,282 | 17.12.2019 19:34:07 | -28,800 | cfa3edf3feec8d1cf5f7a8d3c22073bc38cff1f1 | jinlon: add battery configuration
Add Dynapack CosMX battery configuration.
BRANCH=hatch
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "board/jinlon/battery.c",
"new_path": "board/jinlon/battery.c",
"diff": "#include \"util.h\"\n/*\n- * Battery info for all Dratini/Dragonair battery types. Note that the fields\n+ * Battery info for all Jinlon battery types. Note that the fields\n* start_chargi... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | jinlon: add battery configuration
Add Dynapack CosMX battery configuration.
BUG=b:146413878
BRANCH=hatch
TEST=make buildall -j
Change-Id: I8614ddc34b37b243386101cc8695a0b0a5b15056
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1971511
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> |
136,208 | 18.12.2019 13:59:21 | -28,800 | 3e6d03b01f79b6a808a496fc8808a64e9757fe1e | battery: combine strings to reduce code size
TEST=see kodama's RW flash space shrank by 44 bytes.
BRANCH=kukui | [
{
"change_type": "MODIFY",
"old_path": "common/battery.c",
"new_path": "common/battery.c",
"diff": "#define CPRINTF(format, args...) cprintf(CC_CHARGER, format, ## args)\n#define CPRINTS(format, args...) cprints(CC_CHARGER, format, ## args)\n+#define CUTOFFPRINTS(info) CPRINTS(\"%s %s\", \"Battery c... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | battery: combine strings to reduce code size
TEST=see kodama's RW flash space shrank by 44 bytes.
BUG=chromium:1034518
BRANCH=kukui
Change-Id: Ia21b31d08090dca1b91965f47a90120f0dfbde11
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1972999
Reviewed-by: Ting Shen <phoenixshen@chromium.org> |
136,208 | 18.12.2019 11:37:53 | -28,800 | a13dece660b32f47357a64648f394f58e9d45566 | rt946x: reduce log info
kukui/kodama is running out-of-flash, reduce the permissive log
to gain some flash space.
TEST=compare the kodama RO flash size, and it shrank by 704 bytes
BRANCH=kukui | [
{
"change_type": "MODIFY",
"old_path": "driver/charger/rt946x.c",
"new_path": "driver/charger/rt946x.c",
"diff": "/* Console output macros */\n#define CPRINTF(format, args...) cprintf(CC_CHARGER, format, ## args)\n-#define CPRINTS(format, args...) cprints(CC_CHARGER, \"CHG \" format, ## args)\n+#def... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | rt946x: reduce log info
kukui/kodama is running out-of-flash, reduce the permissive log
to gain some flash space.
TEST=compare the kodama RO flash size, and it shrank by 704 bytes
BUG=chromium:1034518
BRANCH=kukui
Change-Id: I3139cbb8b4031d55b90736bfbbd5108281b84b82
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1973000
Reviewed-by: Hung-Te Lin <hungte@chromium.org> |
136,280 | 18.12.2019 20:59:03 | -28,800 | 40f05646ea791216ab894949a6408850be68a58b | rt946x: add missing new line in console log
TEST=make
BRANCH=kukui
Tested-by: Ting Shen | [
{
"change_type": "MODIFY",
"old_path": "driver/charger/rt946x.c",
"new_path": "driver/charger/rt946x.c",
"diff": "@@ -659,7 +659,7 @@ int charger_set_input_current(int input_current)\ninfo->input_current_max, info->input_current_step,\ninput_current);\n- CPRINTF(\"iin=%d\", input_current);\n+ CPRINT... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | rt946x: add missing new line in console log
BUG=None
TEST=make
BRANCH=kukui
Change-Id: I4b1953dc244d00b189c9776e62441fa6d8999258
Signed-off-by: Ting Shen <phoenixshen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1973591
Tested-by: Ting Shen <phoenixshen@chromium.org>
Auto-Submit: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
Commit-Queue: Eric Yilun Lin <yllin@chromium.org> |
136,287 | 03.10.2019 11:47:04 | 21,600 | 61203550b8421ec5d539e275b9f2fefc26f9d929 | common: accelgyro: Add read temperature function to driver
Add the read temperature function to the driver when an FPU
is available.
TEST=None
BRANCH=None | [
{
"change_type": "MODIFY",
"old_path": "include/accelgyro.h",
"new_path": "include/accelgyro.h",
"diff": "#define __CROS_EC_ACCELGYRO_H\n#include \"motion_sense.h\"\n+#include \"math_util.h\"\n/* Header file for accelerometer / gyro drivers. */\n@@ -37,6 +38,15 @@ struct accelgyro_drv {\n*/\nint (*r... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | common: accelgyro: Add read temperature function to driver
Add the read temperature function to the driver when an FPU
is available.
BUG=b:138303429,chromium:1023858
TEST=None
BRANCH=None
Change-Id: I29e596af202def07c296fa1b478c711d31517999
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1859454
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org> |
136,242 | 23.07.2019 12:59:51 | -28,800 | 62a4510bf29ccec8980ab965d154e6e29233ef93 | jacuzzi: add IMU sensors
* BMI160 Base ACC+Gyro
* LSM in the LID
BRANCH=master
TEST=accelread
TEST=UI reacts properly depending on the orientation
TEST=ectool motionsense | [
{
"change_type": "MODIFY",
"old_path": "board/jacuzzi/board.c",
"new_path": "board/jacuzzi/board.c",
"diff": "#include \"chipset.h\"\n#include \"common.h\"\n#include \"console.h\"\n+#include \"driver/accel_kionix.h\"\n#include \"driver/accelgyro_bmi160.h\"\n#include \"driver/battery/max17055.h\"\n#i... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | jacuzzi: add IMU sensors
* BMI160 Base ACC+Gyro
* LSM in the LID
BRANCH=master
BUG=b:135895590
TEST=accelread
TEST=UI reacts properly depending on the orientation
TEST=ectool motionsense
Change-Id: Ic4d0e3b47aa1e91576d497d574199ccbb8096a33
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1714436
Reviewed-by: Gwendal Grignou <gwendal@chromium.org> |
136,331 | 18.12.2019 18:01:10 | 25,200 | 2e6cdb08533197da6a33c2f3bb2f64e6f87f9853 | ish: convert pack_ec.py script to Python 3
Misc changes to get working in Python 3, mostly to do with handling
bytes/strings differently.
BRANCH=none
TEST=make BOARD=arcada_ish | [
{
"change_type": "MODIFY",
"old_path": "chip/ish/util/pack_ec.py",
"new_path": "chip/ish/util/pack_ec.py",
"diff": "-#!/usr/bin/env python2\n+#!/usr/bin/env python3\n# -*- coding: utf-8 -*-\"\n# Copyright 2019 The Chromium OS Authors. All rights reserved.\n@@ -17,7 +17,6 @@ image with a manifest hea... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | ish: convert pack_ec.py script to Python 3
Misc changes to get working in Python 3, mostly to do with handling
bytes/strings differently.
BUG=chromium:1031705
BRANCH=none
TEST=make BOARD=arcada_ish
Change-Id: I3fe4adbf8d8dcb07401515ddf8a02aec9c3d0b05
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1975094
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,209 | 20.12.2019 05:51:41 | -39,600 | d34e19b1c8a7bee59c3c1564b22a35f6289e402f | puff: Fix LED display.
Make sure LED power and alert/critical states turn on the LEDs.
BRANCH=none
TEST=Verify on puff
Tested-by: Andrew McRae | [
{
"change_type": "MODIFY",
"old_path": "board/puff/led.c",
"new_path": "board/puff/led.c",
"diff": "@@ -122,13 +122,7 @@ static void led_tick(void)\nuint32_t elapsed;\nuint32_t next = 0;\nuint32_t start = get_time().le.lo;\n- static uint8_t pwm_enabled = 0;\n- if (!pwm_enabled) {\n- pwm_enable(PWM_C... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | puff: Fix LED display.
Make sure LED power and alert/critical states turn on the LEDs.
BRANCH=none
BUG=b:146523469
TEST=Verify on puff
Signed-off-by: Andrew McRae <amcrae@google.com>
Change-Id: Ic20e366f60b2a32ffeef270a3a1aaee6a05ed031
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1977065
Tested-by: Andrew McRae <amcrae@chromium.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org> |
136,280 | 19.12.2019 11:48:17 | -28,800 | c286f66015fe7e7ba67473bb5d2a4c6d6d1a1bc8 | kukui: reduce board id mapping array size
This saves 65 bytes
TEST=make
BRANCH=kukui
Tested-by: Ting Shen | [
{
"change_type": "MODIFY",
"old_path": "baseboard/kukui/baseboard.c",
"new_path": "baseboard/kukui/baseboard.c",
"diff": "@@ -51,28 +51,26 @@ enum kukui_board_version {\nBOARD_VERSION_COUNT,\n};\n-struct {\n- enum kukui_board_version version;\n- int expect_mv;\n-} const kukui_boards[] = {\n- { BOARD... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | kukui: reduce board id mapping array size
This saves 65 bytes
BUG=chromium:1034518
TEST=make
BRANCH=kukui
Change-Id: I98697af247344580b4445bbebb7f2d0229e0cd97
Signed-off-by: Ting Shen <phoenixshen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1975001
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org> |
136,208 | 20.12.2019 10:50:42 | -28,800 | 872d6559233c279e9f7b1acc9be553edb97e9860 | kodama: disable PD detail log
kodama is tight at RO flash space, disable the
PD detail log to earn 1.4k flash.
BRANCH=kukui
TEST=make BOARD=kodama | [
{
"change_type": "MODIFY",
"old_path": "board/kodama/board.h",
"new_path": "board/kodama/board.h",
"diff": "#define CONFIG_BATTERY_HW_PRESENT_CUSTOM\n+/* free flash space */\n+#ifdef SECTION_IS_RO\n+#undef CONFIG_USB_PD_DEBUG_LEVEL\n+#define CONFIG_USB_PD_DEBUG_LEVEL 0\n+#endif\n+\n/* Battery */\n#d... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | kodama: disable PD detail log
kodama is tight at RO flash space, disable the
PD detail log to earn 1.4k flash.
BUG=chromium:1034518
BRANCH=kukui
TEST=make BOARD=kodama
Change-Id: I5a7d17df8051f7701562f913bc30fda3c29d3aa5
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1977976
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org> |
136,427 | 19.12.2019 23:06:34 | 25,200 | d9fa15722d45f4ff6aa1cc08059f1807a37768d7 | retimer: Add PS8818 driver
BRANCH=none
TEST=USB3 device enumerates as 5G on Trembyle OPT1 USB-C1 | [
{
"change_type": "MODIFY",
"old_path": "driver/build.mk",
"new_path": "driver/build.mk",
"diff": "@@ -142,6 +142,7 @@ driver-$(CONFIG_USB_PD_TCPM_NCT38XX)+=tcpm/nct38xx.o\n# Type-C Retimer drivers\ndriver-$(CONFIG_USBC_RETIMER_INTEL_BB)+=retimer/bb_retimer.o\ndriver-$(CONFIG_USBC_RETIMER_PI3DPX1207)... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | retimer: Add PS8818 driver
BUG=b:139428235, b:145766506
BRANCH=none
TEST=USB3 device enumerates as 5G on Trembyle OPT1 USB-C1
Change-Id: I96ddd393626000630daf1ce517e003f6472c50cd
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1977983
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org> |
136,427 | 19.12.2019 23:11:04 | 25,200 | 7f703ac070027f085d0aec7f40926e382ad3d000 | zork: Enable PS8818 retimer for USB-C1
BRANCH=none
TEST=USB3 device enumerates as 5G on Trembyle OPT1 USB-C1 | [
{
"change_type": "MODIFY",
"old_path": "baseboard/zork/baseboard.c",
"new_path": "baseboard/zork/baseboard.c",
"diff": "#include \"driver/ppc/aoz1380.h\"\n#include \"driver/ppc/nx20p348x.h\"\n#include \"driver/retimer/pi3dpx1207.h\"\n+#include \"driver/retimer/ps8818.h\"\n#include \"driver/tcpm/ps8x... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | zork: Enable PS8818 retimer for USB-C1
BUG=b:139428235, b:145766506
BRANCH=none
TEST=USB3 device enumerates as 5G on Trembyle OPT1 USB-C1
Change-Id: I360cde6cf1ef5d717cf89149e99257bdfa4289e9
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1977984
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org> |
136,282 | 20.12.2019 10:04:03 | -28,800 | b462358fe122b51cdad99740329e6034c35bf4a0 | dratini: assign SKUIDs for DVT
BRANCH=hatch
TEST=make buildall -j. | [
{
"change_type": "MODIFY",
"old_path": "board/dratini/board.c",
"new_path": "board/dratini/board.c",
"diff": "@@ -374,10 +374,12 @@ bool board_is_convertible(void)\nuint8_t sku_id = get_board_sku();\n/*\n- * Dragonair (SKU 21 ,22 and 23) is a convertible. Dratini is not.\n+ * Dragonair (SKU 21 ,22, ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | dratini: assign SKUIDs for DVT
BUG=b:146504217
BRANCH=hatch
TEST=make buildall -j.
Change-Id: Iccf5f9e5785ca3bfcb14af619718f9b8c6747a0b
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1975946
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> |
136,208 | 23.12.2019 13:37:40 | -28,800 | 28001a83d226a86f176bd92b699586d6c0858196 | rt946x: polish charger log format
Prefix logs with RT946X and add some minor information
TEST=make buildall
BRANCH=kukui | [
{
"change_type": "MODIFY",
"old_path": "driver/charger/rt946x.c",
"new_path": "driver/charger/rt946x.c",
"diff": "/* Console output macros */\n#define CPRINTF(format, args...) cprintf(CC_CHARGER, format, ## args)\n-#define CPRINTS(format, args...) cprints(CC_CHARGER, format, ## args)\n+#define CPRIN... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | rt946x: polish charger log format
Prefix logs with RT946X and add some minor information
TEST=make buildall
BUG=None
BRANCH=kukui
Change-Id: I10992c1d8fbde97eb70bf29c655ea124ce80891f
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1980106
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,282 | 25.12.2019 13:01:00 | -28,800 | cac35234cfdb2c2c8950afb9379d7038db475318 | kappa: enlarge stack for hook_task
Clone from CL:1957341
BRANCH=kukui
TEST=make BOARD=kappa | [
{
"change_type": "MODIFY",
"old_path": "board/kappa/ec.tasklist",
"new_path": "board/kappa/ec.tasklist",
"diff": "* See CONFIG_TASK_LIST in config.h for details.\n*/\n#define CONFIG_TASK_LIST \\\n- TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \\\n+ TASK_ALWAYS(HOOKS, hook_task, NULL, ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | kappa: enlarge stack for hook_task
Clone from CL:1957341
BUG=none
BRANCH=kukui
TEST=make BOARD=kappa
Change-Id: I98479731d2b6c0323bae2b4ced1a25b856ca2b21
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1980400
Reviewed-by: Ting Shen <phoenixshen@chromium.org> |
136,427 | 23.12.2019 03:59:15 | 25,200 | bfff18207694893690b2fcdec8f3907dd254d716 | retimer: Add PS8802 driver
BRANCH=none
TEST=USB3 device enumerates as 5G on Trembyle OPT3 USB-C1
Tested-by: Denis Brockus | [
{
"change_type": "MODIFY",
"old_path": "driver/build.mk",
"new_path": "driver/build.mk",
"diff": "@@ -142,6 +142,7 @@ driver-$(CONFIG_USB_PD_TCPM_NCT38XX)+=tcpm/nct38xx.o\n# Type-C Retimer drivers\ndriver-$(CONFIG_USBC_RETIMER_INTEL_BB)+=retimer/bb_retimer.o\ndriver-$(CONFIG_USBC_RETIMER_PI3DPX1207)... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | retimer: Add PS8802 driver
BUG=b:138682132, b:143147353
BRANCH=none
TEST=USB3 device enumerates as 5G on Trembyle OPT3 USB-C1
Change-Id: I214517f9b2f821fd47079ea0828a810a0b7bb287
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1980391
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
Tested-by: Denis Brockus <dbrockus@chromium.org> |
136,287 | 16.10.2019 11:38:44 | 21,600 | 32412de5fe36815e828302d6d8279d687a3dddf0 | driver: bmi160: Implement temperature reading
BRANCH=None
TEST=buildall | [
{
"change_type": "MODIFY",
"old_path": "driver/accelgyro_bmi160.c",
"new_path": "driver/accelgyro_bmi160.c",
"diff": "@@ -1268,6 +1268,11 @@ static int read(const struct motion_sensor_t *s, intv3_t v)\nreturn EC_SUCCESS;\n}\n+static int read_temp(const struct motion_sensor_t *s, int *temp_ptr)\n+{\n... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | driver: bmi160: Implement temperature reading
BUG=b:138303429,chromium:1023858
BRANCH=None
TEST=buildall
Change-Id: I1a1fd0f0cf9fd4d4d85d537ecf0e1ace76d3e196
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1867224
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> |
136,287 | 15.11.2019 10:14:18 | 25,200 | 4a7e15fd51dac214d22567ffa080a447e5051d63 | driver: lsm6dsm: Implement temperature reading
Implement reading the internal chip temperature
TEST=None
BRANCH=None | [
{
"change_type": "MODIFY",
"old_path": "driver/accelgyro_lsm6dsm.c",
"new_path": "driver/accelgyro_lsm6dsm.c",
"diff": "@@ -836,6 +836,21 @@ err_unlock:\nreturn ret;\n}\n+static int read_temp(const struct motion_sensor_t *s, int *temp)\n+{\n+ int ret;\n+ uint8_t raw[2];\n+\n+ ret = st_raw_read_n_noi... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | driver: lsm6dsm: Implement temperature reading
Implement reading the internal chip temperature
BUG=b:138303429,chromium:1023858
TEST=None
BRANCH=None
Change-Id: Ia077d5d439d5557333aae5325140ab1958da993e
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1922293
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org> |
136,269 | 03.01.2020 08:46:00 | 28,800 | 8942f29ca874dafc70902f4283efbd52ad512f0f | docs/fingerprint: Update for Dragonclaw Rev 0.2
Update FPMCU partner documentation for the Dragonclaw Rev 0.2
development board.
BRANCH=none
TEST=view in gitiles | [
{
"change_type": "MODIFY",
"old_path": "docs/fingerprint/fingerprint-dev-for-partners.md",
"new_path": "docs/fingerprint/fingerprint-dev-for-partners.md",
"diff": "@@ -27,16 +27,14 @@ The Fingerprint MCU (FPMCU) board has the MCU that handles all\nfingerprint-related functionality (matching, encrypt... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | docs/fingerprint: Update for Dragonclaw Rev 0.2
Update FPMCU partner documentation for the Dragonclaw Rev 0.2
development board.
BRANCH=none
BUG=none
TEST=view in gitiles
Change-Id: Ib0c5acb95843583289a76fc17cba2daa675341dd
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1986874
Reviewed-by: Craig Hesling <hesling@chromium.org> |
136,447 | 19.12.2019 11:37:39 | 28,800 | fa18c654e2f39e373f5e209ac9751082e4ae56a1 | puff: enable EFS
Configs mostly copied from fizz.
TEST=booted on hardware, observed successful jump to RW.
BRANCH=none | [
{
"change_type": "MODIFY",
"old_path": "board/puff/board.c",
"new_path": "board/puff/board.c",
"diff": "@@ -510,3 +510,8 @@ void board_overcurrent_event(int port, int is_overcurrented)\nreturn;\nusbc_overcurrent = is_overcurrented;\n}\n+\n+enum battery_present battery_is_present(void)\n+{\n+ return ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | puff: enable EFS
Configs mostly copied from fizz.
TEST=booted on hardware, observed successful jump to RW.
BRANCH=none
BUG=b:146504182
Change-Id: Icf2925b92fea848efcd705bb5274d1afc91d2513
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1977079
Reviewed-by: Andrew McRae <amcrae@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org> |
136,330 | 03.01.2020 16:55:26 | 25,200 | 6109da0a52fa568742c55fa0f10166590ff7bbf5 | volteer: Increase LED PWM frequency
Prevent visible LED flicker by driving the LEDs at a higher frequency.
TEST=Observe LED not flickering
BRANCH=none | [
{
"change_type": "MODIFY",
"old_path": "baseboard/volteer/baseboard.c",
"new_path": "baseboard/volteer/baseboard.c",
"diff": "@@ -166,17 +166,17 @@ const struct pwm_t pwm_channels[] = {\n[PWM_CH_LED1_BLUE] = {\n.channel = 2,\n.flags = PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP,\n- .freq = 100,\n+ .fr... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | volteer: Increase LED PWM frequency
Prevent visible LED flicker by driving the LEDs at a higher frequency.
BUG=b:144168173
TEST=Observe LED not flickering
BRANCH=none
Change-Id: Ib9e0dea7286f1aab75123dfe9d6047280bf74336
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1980708
Commit-Queue: Keith Short <keithshort@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,330 | 03.01.2020 16:58:29 | 25,200 | 83f95fa7763155ea76bde754e8e4b02749be04b0 | volteer: Enable daughter-board LED
PWM the motherboard/daughter-board switch at 50% to drive both LEDs
equally.
TEST=ledtest 0 enable <various colors>; observe LEDs
BRANCH=none | [
{
"change_type": "MODIFY",
"old_path": "baseboard/volteer/baseboard.c",
"new_path": "baseboard/volteer/baseboard.c",
"diff": "@@ -178,6 +178,14 @@ const struct pwm_t pwm_channels[] = {\n.flags = PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP,\n.freq = 2400,\n},\n+ [PWM_CH_LED4_SIDESEL] = {\n+ .channel = ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | volteer: Enable daughter-board LED
PWM the motherboard/daughter-board switch at 50% to drive both LEDs
equally.
BUG=b:139554899
TEST=ledtest 0 enable <various colors>; observe LEDs
BRANCH=none
Change-Id: I0fefac4d540351f5083b769b09ede83c87c97a86
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1987245
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,269 | 06.01.2020 12:11:05 | 28,800 | c7e46e446e593f89deee9d5ac7adc4eb691a7bd3 | docs/fingerprint: Update Dragonclaw v0.2 rework instructions
Update Dragonclaw v0.2 rework instructions to account for second load
switch.
BRANCH=none
TEST=view in gitiles | [
{
"change_type": "MODIFY",
"old_path": "docs/fingerprint/fingerprint-dev-for-partners.md",
"new_path": "docs/fingerprint/fingerprint-dev-for-partners.md",
"diff": "@@ -423,12 +423,12 @@ From the DUT, flash the firmware you copied:\n### Dragonclaw Rev 0.2 Rework {#dragonclaw-rev-0.2-rework}\n-Dragonc... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | docs/fingerprint: Update Dragonclaw v0.2 rework instructions
Update Dragonclaw v0.2 rework instructions to account for second load
switch.
BRANCH=none
BUG=none
TEST=view in gitiles
Change-Id: I3cd609f62eca7f7a3aa8fd5a354f8df2cd09ca8c
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1988708
Reviewed-by: Craig Hesling <hesling@chromium.org> |
136,282 | 25.12.2019 14:08:38 | -28,800 | 2b2d437cd717239643951a76e7ddab77f07d322e | kappa: remove charger port allocation with board version
BRANCH=kukui
TEST=make BOARD=kappa | [
{
"change_type": "MODIFY",
"old_path": "board/kappa/board.c",
"new_path": "board/kappa/board.c",
"diff": "@@ -280,8 +280,3 @@ static void board_chipset_shutdown(void)\n}\nDECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, board_chipset_shutdown, HOOK_PRIO_DEFAULT);\n-int board_get_charger_i2c(void)\n-{\n- /* TODO(... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | kappa: remove charger port allocation with board version
BUG=none
BRANCH=kukui
TEST=make BOARD=kappa
Change-Id: I0c50c899f936707bfcb1b9388f0bddc1f9c0133b
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1980401
Reviewed-by: Ting Shen <phoenixshen@chromium.org> |
136,256 | 06.01.2020 11:35:10 | 25,200 | 825b3cec015cc2d33d24762370b77a91ae5e396c | cbi: fix print of 32-bit int value in ectool
The ectool tool only prints the lower 8-bits as an integer.
BRANCH=none
TEST=ectool prints 32-bit integer value correctly | [
{
"change_type": "MODIFY",
"old_path": "util/ectool.c",
"new_path": "util/ectool.c",
"diff": "@@ -7475,8 +7475,8 @@ static int cmd_cbi(int argc, char *argv[])\nif (!strcasecmp(argv[1], \"get\")) {\nstruct ec_params_get_cbi p = { 0 };\n- uint8_t *r;\nint i;\n+\np.tag = tag;\nif (argc > 3) {\np.flag =... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cbi: fix print of 32-bit int value in ectool
The ectool tool only prints the lower 8-bits as an integer.
BRANCH=none
BUG=none
TEST=ectool prints 32-bit integer value correctly
Change-Id: Idf05833ad8c0a2f2bb0ad42fd74b86e23987a98e
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1988705
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,269 | 09.01.2020 17:09:12 | 28,800 | deaa645651c493ee3e46192dfeee09672f35e887 | docs/fingerprint: Add instructions for using SWD with Dragonclaw v0.2
BRANCH=none
TEST=view in gitiles | [
{
"change_type": "MODIFY",
"old_path": "docs/fingerprint/fingerprint-dev-for-partners.md",
"new_path": "docs/fingerprint/fingerprint-dev-for-partners.md",
"diff": "@@ -50,8 +50,9 @@ debug a running program. It supports SPI, UART, I2C, as well as JTAG/SWD.\nThere are two different servo debugger setu... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | docs/fingerprint: Add instructions for using SWD with Dragonclaw v0.2
BRANCH=none
BUG=none
TEST=view in gitiles
Change-Id: Ic95e8af072df74951d177502ee594f183a3a4b23
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1994620
Commit-Queue: Craig Hesling <hesling@chromium.org>
Reviewed-by: Craig Hesling <hesling@chromium.org> |
136,282 | 25.12.2019 15:35:49 | -28,800 | faea7b763c2ccd1b9f980267b92d570a524f7e87 | kappa: add battery configuration
This patch adds battery parameter as following:
1. Dynapack HIGHPOWER DAK124960-W110703HT
2. Dynapack CosMX DAK124960-W0P0707HT
BRANCH=kukui
TEST=make sure battery charging, battery cutoff works. | [
{
"change_type": "MODIFY",
"old_path": "board/kappa/battery.c",
"new_path": "board/kappa/battery.c",
"diff": "#include \"gpio.h\"\nconst struct board_batt_params board_battery_info[] = {\n- [BATTERY_PANASONIC_AC15A3J] = {\n+ /* Dynapack HIGHPOWER DAK124960-W110703HT Battery Information */\n+ [BATTER... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | kappa: add battery configuration
This patch adds battery parameter as following:
1. Dynapack HIGHPOWER DAK124960-W110703HT
2. Dynapack CosMX DAK124960-W0P0707HT
BUG=b:146504215
BRANCH=kukui
TEST=make sure battery charging, battery cutoff works.
Change-Id: I64d04dbd4056ce74c036d873a7b19f23a9dece11
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1980407
Reviewed-by: Ting Shen <phoenixshen@chromium.org> |
136,324 | 09.01.2020 08:42:38 | 25,200 | 58dbab0e1bb70a8b3d9dd0b66f267302fd240889 | pd: use pd_get_[power/data]_role instead of the tc version
the tc versions were doing the same thing as the pd version
so removed the duplication
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/usbc/usb_pe_drp_sm.c",
"new_path": "common/usbc/usb_pe_drp_sm.c",
"diff": "@@ -511,11 +511,11 @@ static void pe_init(int port)\npe[port].dpm_request = 0;\npe[port].source_cap_timer = TIMER_DISABLED;\npe[port].no_response_timer = TIMER_DISABLED;\n- pe[po... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | pd: use pd_get_[power/data]_role instead of the tc version
the tc versions were doing the same thing as the pd version
so removed the duplication
BUG=b:147290482,b:147314832
BRANCH=none
TEST=make buildall -j
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Change-Id: Iaa48dcd65e3a6c325b0ae2cca33e629fec6e33c9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1993861
Reviewed-by: Edward Hill <ecgh@chromium.org> |
136,443 | 09.01.2020 19:37:50 | 0 | fc272b77bc62c3f3e10971c13abd38bd5d0b29d7 | nocturne_fp: Better comments for pin config
BRANCH=nocturne
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "board/nocturne_fp/gpio.inc",
"new_path": "board/nocturne_fp/gpio.inc",
"diff": "@@ -23,9 +23,9 @@ GPIO(USER_PRES_L, PIN(C, 5), GPIO_ODR_HIGH)\nUNIMPLEMENTED(ENTERING_RW)\n-/* USART1: PA9/PA10 */\n+/* USART1: PA9/PA10 (TX/RX) */\nALTERNATE(PIN_MASK(A, 0x0600), ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | nocturne_fp: Better comments for pin config
BRANCH=nocturne
BUG=none
TEST=none
Change-Id: I8c7534c43754f30a8fcff5d3a167d52ba11afd4e
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1993569
Reviewed-by: Tom Hughes <tomhughes@chromium.org> |
136,443 | 09.01.2020 19:43:04 | 0 | 122e5ab24acdd6e0dbe39a4756e796eda0cfc0d4 | hatch_fp: Better comments for pin config
BRANCH=nocturne,hatch
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "board/hatch_fp/gpio.inc",
"new_path": "board/hatch_fp/gpio.inc",
"diff": "@@ -40,12 +40,12 @@ UNUSED(PIN(H, 1))\nUNIMPLEMENTED(ENTERING_RW)\n-/* USART1: PA9/PA10 */\n+/* USART1: PA9/PA10 (TX/RX) */\nALTERNATE(PIN_MASK(A, 0x0600), GPIO_ALT_USART, MODULE_UART, G... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | hatch_fp: Better comments for pin config
BRANCH=nocturne,hatch
BUG=none
TEST=none
Change-Id: I1b1e994d7e8e74c298f2452b7eaf1a567d387dc0
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1991997
Reviewed-by: Tom Hughes <tomhughes@chromium.org> |
136,234 | 07.01.2020 07:15:20 | 28,800 | d9250f0c5ef96861b7abbb3406876505487b9607 | volteer: Enable Thunderbolt-compatible mode
BRANCH=none
TEST=Both EC & Kernel can enter to TBT3 mode | [
{
"change_type": "MODIFY",
"old_path": "baseboard/volteer/baseboard.h",
"new_path": "baseboard/volteer/baseboard.h",
"diff": "#define CONFIG_USBC_VCONN\n#define CONFIG_USBC_VCONN_SWAP\n+/* Enabling SOP* communication */\n+#define CONFIG_CMD_USB_PD_CABLE\n+#define CONFIG_USB_PD_DECODE_SOP\n+\n+/* Ena... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | volteer: Enable Thunderbolt-compatible mode
BUG=b:147278743
BRANCH=none
TEST=Both EC & Kernel can enter to TBT3 mode
Change-Id: Ic33a1edf6c5218ef7951759b152bb397110c1b21
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1989475
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,250 | 10.01.2020 11:48:12 | 28,800 | e762dafc04bbc25cd66830d880a27131e72ceff5 | i2c-pseudo: Fix data byte separator in multi-byte I2C_XFER_REPLY example.
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "extra/i2c_pseudo/Documentation.txt",
"new_path": "extra/i2c_pseudo/Documentation.txt",
"diff": "@@ -193,7 +193,7 @@ adapters, even when adapter numbers have been reused.\nWrite Command: I2C_XFER_REPLY <xfer_id> <msg_id> <addr> <flags> <errno> [<read_byte>[:...... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | i2c-pseudo: Fix data byte separator in multi-byte I2C_XFER_REPLY example.
BRANCH=none
BUG=none
TEST=none
Change-Id: Ibe34f5cb4e0dfe3a2aed70dec9de12d4b064ca89
Signed-off-by: Matthew Blecker <matthewb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1995607
Reviewed-by: Harry Cutts <hcutts@chromium.org>
Commit-Queue: Harry Cutts <hcutts@chromium.org> |
136,305 | 08.01.2020 10:09:09 | 25,200 | f11df7732d4d4bfdc9b25441be5af3d5ba569cad | RAA489000: Add TCPC driver
The RAA489000 is both a charger and TCPC. This commit adds the driver
for the TCPC portion.
BRANCH=none
TEST=builds
Tested-by: Aseda Aboagye | [
{
"change_type": "MODIFY",
"old_path": "driver/build.mk",
"new_path": "driver/build.mk",
"diff": "@@ -138,6 +138,7 @@ driver-$(CONFIG_USB_PD_TCPM_PS8751)+=tcpm/ps8xxx.o\ndriver-$(CONFIG_USB_PD_TCPM_PS8805)+=tcpm/ps8xxx.o\ndriver-$(CONFIG_USB_PD_TCPM_TUSB422)+=tcpm/tusb422.o\ndriver-$(CONFIG_USB_PD_T... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | RAA489000: Add TCPC driver
The RAA489000 is both a charger and TCPC. This commit adds the driver
for the TCPC portion.
BRANCH=none
BUG=b:147316570
TEST=builds
Change-Id: I797a3bf9a6cd15a23b6188e695c6d1abd3ce3980
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1991846
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org> |
136,256 | 13.01.2020 11:53:33 | 25,200 | ee33959c8bd97ad88d846d7835db32cc23686a16 | doc: add code review doc to site map
BRANCH=none
TEST=view in gitiles | [
{
"change_type": "MODIFY",
"old_path": "docs/sitemap.md",
"new_path": "docs/sitemap.md",
"diff": "* [Low Battery Startup](./low_battery_startup.md)\n* [I2C tracing via console commands](./i2c-debugging.md)\n* [Application Processor to EC communication](./ap-ec-comm.md)\n+* [Code Reviews](./code_revi... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | doc: add code review doc to site map
BRANCH=none
BUG=none
TEST=view in gitiles
Change-Id: Id23e1ba7f87b5b3fd541e8cdebc6425f601395dd
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1998538
Commit-Queue: Keith Short <keithshort@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,331 | 18.12.2019 19:01:31 | 25,200 | 27142308bed998ea0ba0881778c7a9deb21eac5b | mec1322: convert pack_ec.py script to Python 3
Just some string/bytes encoding handling needed to upgrade to
Python 3.
BRANCH=none
TEST=make BOARD=strago, verified binary is unchanged | [
{
"change_type": "MODIFY",
"old_path": "chip/mec1322/util/pack_ec.py",
"new_path": "chip/mec1322/util/pack_ec.py",
"diff": "-#!/usr/bin/env python2\n+#!/usr/bin/env python3\n# Copyright 2013 The Chromium OS Authors. All rights reserved.\n# Use of this source code is governed by a BSD-style license t... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | mec1322: convert pack_ec.py script to Python 3
Just some string/bytes encoding handling needed to upgrade to
Python 3.
BUG=chromium:1031705
BRANCH=none
TEST=make BOARD=strago, verified binary is unchanged
Change-Id: I2e95da9442e680e89761b9d34ce7aee9a72c0991
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1975098
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,340 | 10.01.2020 00:12:55 | 28,800 | 1e3197dd934a18a5d6bd7f67f1e9c3a5ffe1b1eb | board: sensor: remove identity matrices
Use NULL instead of defining an identity matrix.
BRANCH=none
TEST=make buildall | [
{
"change_type": "MODIFY",
"old_path": "baseboard/grunt/baseboard.c",
"new_path": "baseboard/grunt/baseboard.c",
"diff": "@@ -547,18 +547,6 @@ BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT);\nstatic struct mutex g_lid_mutex;\nstatic struct mutex g_base_mutex;\n-mat33_fp_t grunt_base_sta... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | board: sensor: remove identity matrices
Use NULL instead of defining an identity matrix.
BUG=none
BRANCH=none
TEST=make buildall
Change-Id: I9aad9f2de162cb10a25ae51561ca4949521a1f9b
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1995023
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> |
136,324 | 09.01.2020 13:08:32 | 25,200 | cb9c91ae78238429e0e7a1514333bc5fe8238431 | ps8802: use hardware pin for IN_HPD
we have a hardware line to this pin, so we should
use that instead of setting it in firmware
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "driver/retimer/ps8802.c",
"new_path": "driver/retimer/ps8802.c",
"diff": "@@ -49,8 +49,7 @@ static int ps8802_set_mux(int port, mux_state_t mux_state)\n{\nint val = (PS8802_MODE_DP_REG_CONTROL\n| PS8802_MODE_USB_REG_CONTROL\n- | PS8802_MODE_FLIP_REG_CONTROL\n-... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | ps8802: use hardware pin for IN_HPD
we have a hardware line to this pin, so we should
use that instead of setting it in firmware
BUG=b:139432598
BRANCH=none
TEST=make buildall -j
Change-Id: I0e7e826930d4421f2cb6e03d09ea9d7036a9ad26
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1993862
Reviewed-by: Edward Hill <ecgh@chromium.org> |
136,234 | 07.01.2020 12:05:15 | 28,800 | 329045e9bcd3af6294460fcf0ab9be5fa583c1c7 | TCPMv1 & TCPMv2: Move common functions to common code
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/usb_common.c",
"new_path": "common/usb_common.c",
"diff": "@@ -290,7 +290,7 @@ void pd_extract_pdo_power(uint32_t pdo, uint32_t *ma, uint32_t *mv)\nvoid pd_build_request(uint32_t src_cap_cnt, const uint32_t * const src_caps,\nint32_t vpd_vdo, uint32_t *... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv1 & TCPMv2: Move common functions to common code
BUG=b:147249926, b:146623068
BRANCH=none
TEST=make buildall -j
Change-Id: Ibb24bdad4e9ec24b02106c05ca5fe51269efcb1c
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1990425
Reviewed-by: Denis Brockus <dbrockus@chromium.org> |
136,305 | 09.01.2020 17:10:21 | 25,200 | a3d44f8770d37266122f7c12515ae9932713db5a | Waddledoo: Add sensor support
Waddledoo is using the BMI160 as a base accel and the BMA253 lid accel,
which is compatible with the current bma2x2 driver.
BRANCH=none
TEST=builds | [
{
"change_type": "MODIFY",
"old_path": "baseboard/dedede/baseboard.h",
"new_path": "baseboard/dedede/baseboard.h",
"diff": "#define GPIO_VOLUME_UP_L GPIO_VOLUP_BTN_ODL\n#define GPIO_VOLUME_DOWN_L GPIO_VOLDN_BTN_ODL\n#define GPIO_WP GPIO_EC_WP_OD\n+#define GMR_TABLET_MODE_GPIO_L GPIO_LID_360_L\n/* Co... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Waddledoo: Add sensor support
Waddledoo is using the BMI160 as a base accel and the BMA253 lid accel,
which is compatible with the current bma2x2 driver.
BUG=b:147258603
BRANCH=none
TEST=builds
Change-Id: Id76e826f11154f8b687021713a2bf176bd82fef4
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1993952
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,256 | 08.01.2020 09:30:47 | 25,200 | e39204e43ca3b075654285ddb94a028774b51666 | stm: add register values
Add new register definitions needed for c2d2
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "chip/stm32/registers-stm32f0.h",
"new_path": "chip/stm32/registers-stm32f0.h",
"diff": "#define STM32_RCC_SYSCFGEN BIT(0)\n#define STM32_RCC_APB1ENR REG32(STM32_RCC_BASE + 0x1c)\n+#define STM32_RCC_DACEN BIT(29)\n#define STM32_RCC_PWREN BIT(28)\n#define STM32_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | stm: add register values
Add new register definitions needed for c2d2
BRANCH=none
BUG=b:145314772
TEST=none
Change-Id: I159f832a40037271aa352fe83c5289a3a674699b
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1991848
Reviewed-by: Craig Hesling <hesling@chromium.org> |
136,208 | 06.01.2020 14:50:13 | -28,800 | 86bf6c285c456e08c012835138e9510d5fee059f | kukui: support DP UFP_U pin mode
UFP_U should be supported as well.
TEST=plug to a UFP_U display, and ensure it can output
BRANCH=kukui | [
{
"change_type": "MODIFY",
"old_path": "baseboard/kukui/usb_pd_policy.c",
"new_path": "baseboard/kukui/usb_pd_policy.c",
"diff": "@@ -117,7 +117,8 @@ __override int svdm_enter_dp_mode(int port, uint32_t mode_caps)\n* capable\n*/\nif ((mode_caps & MODE_DP_SNK) &&\n- (mode_caps & (support_pin_mode << ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | kukui: support DP UFP_U pin mode
UFP_U should be supported as well.
TEST=plug to a UFP_U display, and ensure it can output
BUG=b:146908979
BRANCH=kukui
Change-Id: I18bfbca521c9e90f13413ee9d3af88f9b07588df
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1988032
Reviewed-by: Ting Shen <phoenixshen@chromium.org> |
136,198 | 30.10.2019 11:35:28 | 25,200 | 42aa7ca9622391c4290210c4a76eba2972e8ab75 | util:uart_stress_tester has an option to get output from USB channel
BRANCH=None
TEST=ran stress test on fleex.
./util/uart_stress_tester.py /dev/ttyUSB0 /dev/ttyUSB2 \
time 120 --debug --usb | [
{
"change_type": "MODIFY",
"old_path": "util/uart_stress_tester.py",
"new_path": "util/uart_stress_tester.py",
"diff": "@@ -93,7 +93,8 @@ class UartSerial(object):\n)\ndef __init__(self, port, duration, timeout=1,\n- baudrate=BAUDRATE, cr50_workload=False):\n+ baudrate=BAUDRATE, cr50_workload=False,... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | util:uart_stress_tester has an option to get output from USB channel
BUG=chromium:992607
BRANCH=None
TEST=ran stress test on fleex.
./util/uart_stress_tester.py /dev/ttyUSB0 /dev/ttyUSB2 \
--time 120 --debug --usb
Change-Id: Iebe5e8b18116fcbd5b94bc5796983cac4fb40087
Signed-off-by: Namyoon Woo <namyoon@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1891254 |
136,269 | 15.01.2020 15:31:12 | 28,800 | 69442e5aaa2fb1adc13b40e118831c9c277c82a3 | docs/fingerprint: Update Dragonclaw v0.2 rework instructions
Add instructions to replace sense resistors in addition to load switch.
BRANCH=none
TEST=view in gitiles | [
{
"change_type": "MODIFY",
"old_path": "docs/fingerprint/fingerprint-dev-for-partners.md",
"new_path": "docs/fingerprint/fingerprint-dev-for-partners.md",
"diff": "@@ -567,4 +567,4 @@ https://crbug.com/992082.\nappending \"export/pdf\" to the Google Drive link. -->\n<!-- https://docs.google.com/draw... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | docs/fingerprint: Update Dragonclaw v0.2 rework instructions
Add instructions to replace sense resistors in addition to load switch.
BRANCH=none
BUG=none
TEST=view in gitiles
Change-Id: I8fe56e6a13067bbbb95508d5bf1a5cc7dccefffc
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2003889
Commit-Queue: Craig Hesling <hesling@chromium.org>
Reviewed-by: Craig Hesling <hesling@chromium.org> |
136,345 | 16.01.2020 09:18:01 | -39,600 | e5d01b87e4007d19dbc37a0d0791a5ee36890f0e | puff: Disable TCPMv2.
On puff with TCPMv2 enabled, the type C mux is not being configured to
allow USB 3. Disable TCPMv2 for now to unblock testing.
BRANCH=None
TEST=make buildall | [
{
"change_type": "MODIFY",
"old_path": "board/puff/board.h",
"new_path": "board/puff/board.h",
"diff": "#define CONFIG_CHARGER_INPUT_CURRENT 512 /* Allow low-current USB charging */\n/* USB type C */\n-/* Use TCPMv2 */\n+/* TODO: (b/147255678) Use TCPMv2 */\n+#if 0\n#define CONFIG_USB_SM_FRAMEWORK\n... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | puff: Disable TCPMv2.
On puff with TCPMv2 enabled, the type C mux is not being configured to
allow USB 3. Disable TCPMv2 for now to unblock testing.
BRANCH=None
BUG=b:147255678
TEST=make buildall
Change-Id: I5cd45c8d05c22b5720619942cd124c04d2cca7f2
Signed-off-by: Sam McNally <sammc@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2002989
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> |
136,293 | 16.01.2020 12:41:23 | 18,000 | 166c22d05730de961b894d954116439d6ff219e7 | endeavour: remove EFS related configs
We had removed the EFS config but found that the signer still
needed an EFS key due to RWSIG.
TEST=install and boot in both dev and normal modes
Tested-by: Jeff Chase | [
{
"change_type": "MODIFY",
"old_path": "board/endeavour/board.h",
"new_path": "board/endeavour/board.h",
"diff": "/* I2C addresses */\n#define I2C_ADDR_EEPROM_FLAGS 0x50\n-/* Verify and jump to RW image on boot */\n#define CONFIG_VBOOT_HASH\n#define CONFIG_VSTORE\n#define CONFIG_VSTORE_SLOT_COUNT 1\... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | endeavour: remove EFS related configs
We had removed the EFS config but found that the signer still
needed an EFS key due to RWSIG.
TEST=install and boot in both dev and normal modes
Change-Id: Idc57c6e6868b1d616c8f4dcef1a006e207569284
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2005649
Tested-by: Jeff Chase <jnchase@google.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Jeff Chase <jnchase@google.com> |
136,427 | 17.01.2020 12:19:59 | 25,200 | 77a89596929beea6646ef361b19e09ab75a5a3b9 | Trembyle: Fix detection of V0 HW
BRANCH=none
TEST=AP boots on V0 HW | [
{
"change_type": "MODIFY",
"old_path": "board/trembyle/board.c",
"new_path": "board/trembyle/board.c",
"diff": "@@ -30,7 +30,7 @@ void board_update_sensor_config_from_sku(void)\n* If the CBI EEPROM is found on the battery I2C port then we are\n* running on V0 HW so re-map the GPIOs that moved.\n*/\n... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Trembyle: Fix detection of V0 HW
BUG=none
BRANCH=none
TEST=AP boots on V0 HW
Change-Id: I82f6cce422d706d1361641248cc697da7429d815
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2008091
Reviewed-by: Raul E Rangel <rrangel@chromium.org> |
136,274 | 17.01.2020 13:51:45 | 28,800 | 794d7443506b63781379dae37a05a29825bbd8ef | tigertool: fix regex
Change $ to \s in regex.
TEST=./tigertool.py --setserialno test
BRANCH=none | [
{
"change_type": "MODIFY",
"old_path": "extra/tigertool/ecusb/tiny_servo_common.py",
"new_path": "extra/tigertool/ecusb/tiny_servo_common.py",
"diff": "@@ -115,7 +115,7 @@ def do_serialno(serialno, pty):\nptyError: on command interface error.\n\"\"\"\ncmd = 'serialno set %s' % serialno\n- regex = 'S... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | tigertool: fix regex
Change $ to \s in regex.
BUG=None (tigertail serserialno fail
TEST=./tigertool.py --setserialno test
BRANCH=none
Change-Id: I006ff8e70b3d20be44590c2050f9e341f10a2d53
Signed-off-by: Nick Sanders <nsanders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2008450
Reviewed-by: YH Lin <yueherngl@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,447 | 20.01.2020 12:42:14 | -39,600 | 79c2d17078aeff8da275f36ac86ea85c73af281b | puff: remove TODOs for PD limits
They seem to be fine as-is; no further changes required.
TEST=None; no code changes
BRANCH=None | [
{
"change_type": "MODIFY",
"old_path": "board/puff/board.h",
"new_path": "board/puff/board.h",
"diff": "#define CONFIG_POWER_TRACK_HOST_SLEEP_STATE\n#define CONFIG_INA3221\n-/* TODO: (b/143501304) Use correct PD delay values */\n#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */\n#define PD_POWER_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | puff: remove TODOs for PD limits
They seem to be fine as-is; no further changes required.
BUG=b:146031922, b:143501304
TEST=None; no code changes
BRANCH=None
Change-Id: I4d10c57d34f1f1e53e5fbcb994c4ae1403fb8a98
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2009527
Reviewed-by: Andrew McRae <amcrae@chromium.org> |
136,447 | 20.01.2020 12:34:04 | -39,600 | 15edeaabe90c554d83faa4ff0c9143c66248e0e4 | puff: blink LED when insufficient power to boot (<30W)
Also ensure we set the required power to the intended value, and remove
useless charger-related items.
TEST=LED blinks and does not boot when given 7.5W on USB-C.
BRANCH=None | [
{
"change_type": "MODIFY",
"old_path": "board/puff/board.c",
"new_path": "board/puff/board.c",
"diff": "@@ -77,17 +77,15 @@ uint16_t tcpc_get_alert_status(void)\nreturn status;\n}\n+/* Called when the charge manager has switched to a new port. */\nvoid board_set_charge_limit(int port, int supplier, ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | puff: blink LED when insufficient power to boot (<30W)
Also ensure we set the required power to the intended value, and remove
useless charger-related items.
BUG=b:146515963
TEST=LED blinks and does not boot when given 7.5W on USB-C.
BRANCH=None
Change-Id: I34df8f1cbf6648ef2007fc34c620ae1d2021f7a8
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2009526 |
136,234 | 17.01.2020 10:21:15 | 28,800 | e9c55a5830e558fbf6158b879da0a93904ef1e6f | TCPMv1/v2: Move EC_CMD_USB_PD_PORTS host command to common file
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/build.mk",
"new_path": "common/build.mk",
"diff": "@@ -142,7 +142,7 @@ common-$(CONFIG_USB_CONSOLE_STREAM)+=usb_console_stream.o\ncommon-$(CONFIG_USB_I2C)+=usb_i2c.o\ncommon-$(CONFIG_USB_PORT_POWER_DUMB)+=usb_port_power_dumb.o\ncommon-$(CONFIG_USB_PORT_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv1/v2: Move EC_CMD_USB_PD_PORTS host command to common file
BUG=b:142911453
BRANCH=none
TEST=make buildall -j
Change-Id: Ibdd840efd79dbba1e2836f990ec86515ae08c919
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2008297
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org> |
136,287 | 17.10.2019 09:55:09 | 21,600 | 62df6c8c83814e3ade12afd346afb11d7a6150c8 | common: Implement kasa sphere fit algorithm
Add an implementation of the kasa sphere fit algorithm
adapted from AOSP.
TEST=Added unit tests
BRANCH=None | [
{
"change_type": "MODIFY",
"old_path": "common/build.mk",
"new_path": "common/build.mk",
"diff": "@@ -119,7 +119,8 @@ common-$(CONFIG_ROLLBACK)+=rollback.o\ncommon-$(CONFIG_RWSIG)+=rwsig.o vboot/common.o\ncommon-$(CONFIG_RWSIG_TYPE_RWSIG)+=vboot/vb21_lib.o\ncommon-$(CONFIG_MATH_UTIL)+=math_util.o\n-... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | common: Implement kasa sphere fit algorithm
Add an implementation of the kasa sphere fit algorithm
adapted from AOSP.
BUG=b:138303429,chromium:1023858
TEST=Added unit tests
BRANCH=None
Change-Id: I8194bfaddbb7c57a2b20a1917c91f7c78707e685
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1867226
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> |
136,443 | 11.12.2019 13:28:17 | 28,800 | cefb6232a83f5122ef4397ba81572183f723ce3f | chip/stm32: Stop timers and watchdogs on STM32F4 when debugging
BRANCH=none
TEST=make buildall -j
TEST=Attach SWD to dragonclaw v0.2
Tested-by: Tom Hughes | [
{
"change_type": "MODIFY",
"old_path": "chip/stm32/registers-stm32f4.h",
"new_path": "chip/stm32/registers-stm32f4.h",
"diff": "#define STM32_RCC_CSR_LSION BIT(0)\n#define STM32_RCC_CSR_LSIRDY BIT(1)\n+#define STM32_RCC_PB2_TIM1 BIT(0)\n+#define STM32_RCC_PB2_TIM8 BIT(1)\n#define STM32_RCC_PB2_TIM9 ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | chip/stm32: Stop timers and watchdogs on STM32F4 when debugging
BRANCH=none
BUG=none
TEST=make buildall -j
TEST=Attach SWD to dragonclaw v0.2
Change-Id: I7bd5741c4862bb2f134ae3067715d2301a18ea78
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1962974
Reviewed-by: Jett Rink <jettrink@chromium.org>
Tested-by: Tom Hughes <tomhughes@chromium.org> |
136,269 | 21.01.2020 13:28:57 | 28,800 | eba8651a8536c7dabc52f9a2cae4eccb440aa808 | docs/fingerprint: Update chromeos-config and flashing instructions
BRANCH=none
TEST=view in gitiles | [
{
"change_type": "MODIFY",
"old_path": "docs/fingerprint/fingerprint.md",
"new_path": "docs/fingerprint/fingerprint.md",
"diff": "@@ -31,13 +31,20 @@ building the EC code) are for fingerprint:\n* Support for the STM32F412 for the FPMCU is not yet fully complete,\nbut it is functional enough for test... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | docs/fingerprint: Update chromeos-config and flashing instructions
BRANCH=none
BUG=none
TEST=view in gitiles
Change-Id: Ibc97efb7a1746cb6cbb5422104d72be8b708681e
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2015141
Commit-Queue: Craig Hesling <hesling@chromium.org>
Reviewed-by: Craig Hesling <hesling@chromium.org> |
136,282 | 25.11.2019 13:47:48 | -28,800 | 0195a23ec69c08bc1ed5adea270776b33b1731bf | jinlon: enable OTI502 IR temperature sensor
BRANCH=hatch
TEST=ec console "temps" to check OTI502 IR temperature sensor can be read. | [
{
"change_type": "MODIFY",
"old_path": "baseboard/hatch/baseboard.c",
"new_path": "baseboard/hatch/baseboard.c",
"diff": "@@ -76,6 +76,9 @@ const struct i2c_port_t i2c_ports[] = {\n{\"tcpc0\", I2C_PORT_TCPC0, 100, GPIO_I2C3_SCL, GPIO_I2C3_SDA},\n#ifdef BOARD_AKEMI\n{\"thermal\", I2C_PORT_THERMAL, 40... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | jinlon: enable OTI502 IR temperature sensor
BUG=b:141259174
BRANCH=hatch
TEST=ec console "temps" to check OTI502 IR temperature sensor can be read.
Change-Id: I03254e850809d6968b59ca9d0fbcc45443f097af
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1933789
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> |
136,340 | 08.01.2020 11:00:45 | 28,800 | a8ea3bfdbe928b9bcf2d3756a2fae16fe40132ae | driver/opt3100: Set min/max frequency that match the driver
Given we set integration time at 800ms, the host must be aware to not
set an ODR over 1Hz.
BRANCH=nocturne
TEST=Check new max_frequency is indeed 1Hz on nocturne. | [
{
"change_type": "MODIFY",
"old_path": "driver/als_opt3001.c",
"new_path": "driver/als_opt3001.c",
"diff": "@@ -214,8 +214,8 @@ static int opt3001_set_data_rate(const struct motion_sensor_t *s,\n* integrating over 800ms.\n* Do not allow range higher than 1Hz.\n*/\n- if (rate > 1000)\n- rate = 1000;\... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | driver/opt3100: Set min/max frequency that match the driver
Given we set integration time at 800ms, the host must be aware to not
set an ODR over 1Hz.
BUG=chromium:615059
BRANCH=nocturne
TEST=Check new max_frequency is indeed 1Hz on nocturne.
Change-Id: I44252073f59e00cdf4d13b4fa6d88448537c168e
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1991857
Reviewed-by: Nick Vaccaro <nvaccaro@google.com> |
136,209 | 22.01.2020 16:55:16 | -39,600 | f2207c4c7a632e604221909f4e8935ad16bf32a2 | puff ec: Add EVT GPIO definitions.
Update the puff EC GPIO definitions to include EVT changes.
BRANCH=none
TEST=Ran on puff.
Tested-by: Andrew McRae | [
{
"change_type": "MODIFY",
"old_path": "board/puff/board.h",
"new_path": "board/puff/board.h",
"diff": "#define PP5000_PGOOD_POWER_SIGNAL_MASK POWER_SIGNAL_MASK(PP5000_A_PGOOD)\n-#define CEC_GPIO_OUT GPIO_CEC_OUT\n-#define CEC_GPIO_IN GPIO_CEC_IN\n-#define CEC_GPIO_PULL_UP GPIO_CEC_PULL_UP\n-\n#ifnd... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | puff ec: Add EVT GPIO definitions.
Update the puff EC GPIO definitions to include EVT changes.
BRANCH=none
BUG=b:147983217
TEST=Ran on puff.
Change-Id: I9fa911881dfbd705ee8e264d7f55576b45b80893
Signed-off-by: Andrew McRae <amcrae@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2014003
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
Tested-by: Andrew McRae <amcrae@chromium.org> |
136,278 | 21.01.2020 14:37:05 | 28,800 | 495f0f2d2f170f9763a11cfe2630f8d3bec9c17e | volteer: enable PD_CONTROL
BRANCH=none
TEST=successfully updated to firmware 0x03 | [
{
"change_type": "MODIFY",
"old_path": "baseboard/volteer/baseboard.h",
"new_path": "baseboard/volteer/baseboard.h",
"diff": "#undef CONFIG_USB_PD_TCPC_LOW_POWER\n#define CONFIG_USB_PD_TCPM_TCPCI\n#define CONFIG_USB_PD_TCPM_TUSB422 /* USBC port C0 */\n+#define CONFIG_CMD_PD_CONTROL /* Needed for TCP... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | volteer: enable PD_CONTROL
BRANCH=none
BUG=b:147459088
TEST=successfully updated to firmware 0x03
Change-Id: I9dddb9d68714f8befd1e28d837daf2e8041cf298
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2013657
Reviewed-by: Caveh Jalali <caveh@google.com>
Commit-Queue: Caveh Jalali <caveh@google.com> |
136,269 | 23.01.2020 10:12:14 | 28,800 | 4ae4aa94365e6e93654c4a7191ec9a9f65409dc3 | docs/fingerprint: Add details on using fingerprint with Chrome OS build
BRANCH=none
TEST=view in gitiles | [
{
"change_type": "MODIFY",
"old_path": "docs/fingerprint/fingerprint.md",
"new_path": "docs/fingerprint/fingerprint.md",
"diff": "@@ -19,7 +19,7 @@ The main source code for fingerprint sensor functionality lives in the\n[`common/fpsensor`] directory. The driver code for specific sensors lives in the... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | docs/fingerprint: Add details on using fingerprint with Chrome OS build
BRANCH=none
BUG=none
TEST=view in gitiles
Change-Id: Icedacbe7897d8aaf441e7d76be50e440f46c5a54
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2017576
Commit-Queue: Craig Hesling <hesling@chromium.org>
Reviewed-by: Craig Hesling <hesling@chromium.org> |
136,234 | 17.01.2020 11:01:13 | 28,800 | a00bf6d576a993f36c0f8fce4c9764b6cfbc430d | TCPMv1/v2: Move EC_CMD_USB_PD_RW_HASH_ENTRY host command to common file
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/usb_pd_host_cmd.c",
"new_path": "common/usb_pd_host_cmd.c",
"diff": "* Host commands for USB-PD module.\n*/\n+#include <string.h>\n+\n#include \"ec_commands.h\"\n#include \"host_command.h\"\n#include \"usb_pd.h\"\n+#ifdef CONFIG_COMMON_RUNTIME\n+struct ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv1/v2: Move EC_CMD_USB_PD_RW_HASH_ENTRY host command to common file
BUG=b:142911453
BRANCH=none
TEST=make buildall -j
Change-Id: Ibcf7b23c9b4c166a59c00b4805d1fbad5e79e5f1
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2008298
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,234 | 17.01.2020 11:23:58 | 28,800 | b7e9d202eb32d769962b3fe12c9c1ca745a8ee64 | TCPMv1/v2: Move EC_CMD_PD_CHIP_INFO host command to common file
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/usb_pd_host_cmd.c",
"new_path": "common/usb_pd_host_cmd.c",
"diff": "#include \"ec_commands.h\"\n#include \"host_command.h\"\n+#include \"tcpm.h\"\n#include \"usb_pd.h\"\n+#include \"usb_pd_tcpm.h\"\n#ifdef CONFIG_COMMON_RUNTIME\nstruct ec_params_usb_pd... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv1/v2: Move EC_CMD_PD_CHIP_INFO host command to common file
BUG=b:142911453
BRANCH=none
TEST=make buildall -j
Change-Id: Ia858db061811c58a14b2525d17d6abdc35ea6fa7
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2008299
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,234 | 17.01.2020 11:53:22 | 28,800 | 1a7e28d8d7c0539dd4a29d10932a8a4b802d36e9 | TCPMv1/v2: Move EC_CMD_USB_PD_SET_AMODE host command to common file
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/usb_pd_host_cmd.c",
"new_path": "common/usb_pd_host_cmd.c",
"diff": "#include <string.h>\n+#include \"console.h\"\n#include \"ec_commands.h\"\n#include \"host_command.h\"\n#include \"tcpm.h\"\n#ifdef CONFIG_COMMON_RUNTIME\nstruct ec_params_usb_pd_rw_has... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv1/v2: Move EC_CMD_USB_PD_SET_AMODE host command to common file
BUG=b:142911453
BRANCH=none
TEST=make buildall -j
Change-Id: Id5cb4475a4bdf37947a6b1484441dadb7aa2d214
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2008300
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,234 | 17.01.2020 12:51:28 | 28,800 | 07fd9cc41e3aba4eb3e82f50d03d9ff738ced2b3 | TCPMv1/v2: Move EC_CMD_USB_PD_DEV_INFO host command to common file
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/usb_pd_host_cmd.c",
"new_path": "common/usb_pd_host_cmd.c",
"diff": "@@ -138,4 +138,29 @@ DECLARE_HOST_COMMAND(EC_CMD_USB_PD_SET_AMODE,\nEC_VER_MASK(0));\n#endif /* CONFIG_USB_PD_ALT_MODE_DFP */\n+#ifdef CONFIG_COMMON_RUNTIME\n+static enum ec_status hc_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv1/v2: Move EC_CMD_USB_PD_DEV_INFO host command to common file
BUG=b:142911453
BRANCH=none
TEST=make buildall -j
Change-Id: If9d902ef77da7d56a123c0c78b1ebbcd0d95bc3b
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2008301
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,418 | 23.01.2020 15:20:12 | 28,800 | ba608292244d859fc6af0b76c44049976da9fcd1 | Trogdor: Deprecate AP_RST_REQ handling logic
This logic is no longer used. Should be deprecated.
BRANCH=None
TEST=Assert the AP_RST_REQ signal, no reboot happens. | [
{
"change_type": "MODIFY",
"old_path": "board/trogdor/gpio.inc",
"new_path": "board/trogdor/gpio.inc",
"diff": "@@ -26,7 +26,6 @@ GPIO_INT(EC_VOLDN_BTN_ODL, PIN(7, 0), GPIO_INT_BOTH | GPIO_PULL_UP, button_inte\nGPIO_INT(EC_VOLUP_BTN_ODL, PIN(F, 2), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) /* ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Trogdor: Deprecate AP_RST_REQ handling logic
This logic is no longer used. Should be deprecated.
BRANCH=None
BUG=b:148238496
TEST=Assert the AP_RST_REQ signal, no reboot happens.
Change-Id: Icade7ede9a8fb48313123ad59b5a36a8aa1a71bf
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2018056
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Alexandru M Stan <amstan@chromium.org> |
136,311 | 23.01.2020 17:40:46 | 25,200 | 1f0710427b951e2ae638c23cfe9da9047792bd26 | Volteer: move USB product ID to baseboard
The selected ID has been properly allocated in
BRANCH=none
TEST=make buildall | [
{
"change_type": "MODIFY",
"old_path": "baseboard/volteer/baseboard.h",
"new_path": "baseboard/volteer/baseboard.h",
"diff": "/* Enabling Thunderbolt-compatible mode */\n#define CONFIG_USB_PD_TBT_COMPAT_MODE\n+/*\n+ * USB ID\n+ * This is allocated specifically for Volteer\n+ * http://google3/hardwar... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Volteer: move USB product ID to baseboard
The selected ID has been properly allocated in
http://google3/hardware/standards/usb/
BUG=b:140578872
BRANCH=none
TEST=make buildall
Change-Id: I718050fbf6db2a205cd0d76796ab57e72606b28b
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2018464
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,256 | 22.01.2020 11:15:43 | 25,200 | 200021e4613277c9dc806edffde9d560bd659d1a | deltaur: initial add
Add a bare-bones Deltaur EC image to build on
BRANCH=none
TEST=builds | [
{
"change_type": "ADD",
"old_path": null,
"new_path": "board/deltaur/board.c",
"diff": "+/* Copyright 2020 The Chromium OS Authors. All rights reserved.\n+ * Use of this source code is governed by a BSD-style license that can be\n+ * found in the LICENSE file.\n+ */\n+\n+/* Deltaur board-specific co... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | deltaur: initial add
Add a bare-bones Deltaur EC image to build on
BRANCH=none
BUG=b:148160415
TEST=builds
Change-Id: Ia8145e978c2e1d561768d3344e0b89e1c4ef2f6c
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2015352
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> |
136,234 | 27.01.2020 17:25:45 | 28,800 | 786dedfb15f333ac5a70b83a110eb37805f3be7d | TCPMv1/v2: Move EC_CMD_USB_PD_DISCOVERY host command to common file
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/usb_pd_host_cmd.c",
"new_path": "common/usb_pd_host_cmd.c",
"diff": "@@ -136,6 +136,28 @@ static enum ec_status hc_remote_pd_set_amode(struct host_cmd_handler_args *args)\nDECLARE_HOST_COMMAND(EC_CMD_USB_PD_SET_AMODE,\nhc_remote_pd_set_amode,\nEC_VER_MA... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv1/v2: Move EC_CMD_USB_PD_DISCOVERY host command to common file
BUG=b:142911453
BRANCH=none
TEST=make buildall -j
Change-Id: Ia2ad22669a908e9b9c23c4b73e97872399049e75
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2024427
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org> |
136,234 | 27.01.2020 18:45:18 | 28,800 | 9c853d14068fe636a24c2c670f6f278851117f89 | TCPMv1/v2: Move EC_CMD_USB_PD_GET_AMODE host command to common file
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/usb_pd_host_cmd.c",
"new_path": "common/usb_pd_host_cmd.c",
"diff": "@@ -158,6 +158,39 @@ static enum ec_status hc_remote_pd_discovery(struct host_cmd_handler_args *args)\nDECLARE_HOST_COMMAND(EC_CMD_USB_PD_DISCOVERY,\nhc_remote_pd_discovery,\nEC_VER_MA... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv1/v2: Move EC_CMD_USB_PD_GET_AMODE host command to common file
BUG=b:142911453
BRANCH=none
TEST=make buildall -j
Change-Id: I0b9cb76adbc5e385cb20256f693bd2b0687b30de
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2024428
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org> |
136,234 | 28.01.2020 12:00:48 | 28,800 | 609366791c55586d051130363cafb0272ceb0800 | USB-C: Move EC_CMD_GET_PD_PORT_CAPS host command to host command file
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/usb_common.c",
"new_path": "common/usb_common.c",
"diff": "@@ -1098,46 +1098,3 @@ const struct svdm_amode_fx supported_modes[] = {\n};\nconst int supported_modes_cnt = ARRAY_SIZE(supported_modes);\n#endif /* CONFIG_USB_PD_ALT_MODE_DFP */\n-\n-__overrida... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | USB-C: Move EC_CMD_GET_PD_PORT_CAPS host command to host command file
BUG=b:142911453
BRANCH=none
TEST=make buildall -j
Change-Id: I70625ee9ffe9a3d5c6de73bd80eb5530db39bca7
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2025769
Reviewed-by: Denis Brockus <dbrockus@chromium.org> |
136,234 | 21.01.2020 18:25:52 | 28,800 | a8b2362e82e1016f53d50f86469af233c9b4a002 | TCPMv1: Cleanup sending TBT control flags to host
BRANCH=none
TEST=tested on Volteer, able to get correct TBT control flags | [
{
"change_type": "MODIFY",
"old_path": "common/usb_pd_policy.c",
"new_path": "common/usb_pd_policy.c",
"diff": "@@ -201,7 +201,7 @@ void reset_pd_cable(int port)\nmemset(&cable[port], 0, sizeof(cable[port]));\n}\n-enum idh_ptype get_usb_pd_mux_cable_type(int port)\n+enum idh_ptype get_usb_pd_cable_t... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv1: Cleanup sending TBT control flags to host
BUG=b:148114593
BRANCH=none
TEST=tested on Volteer, able to get correct TBT control flags
Change-Id: If673d4a194d3cc6b9579f0f32511c6363f2614f3
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2013825
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,234 | 29.01.2020 13:42:48 | 28,800 | a9be53c2c40a16db6d03f57f1db87338f4e42e2d | intelrvp: Enable PD 3.0 support
BRANCH=none
TEST=tglrvp can negotiate with TBT3 docks | [
{
"change_type": "MODIFY",
"old_path": "baseboard/intelrvp/baseboard.h",
"new_path": "baseboard/intelrvp/baseboard.h",
"diff": "#define CONFIG_CHARGE_RAMP_HW\n#endif\n+/* Enable USB-PD REV 3.0 */\n+#define CONFIG_USB_PD_REV30\n+#define CONFIG_USB_PID 0x8086\n+\n/* USB PD config */\n#define CONFIG_US... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | intelrvp: Enable PD 3.0 support
BUG=b:148528594
BRANCH=none
TEST=tglrvp can negotiate with TBT3 docks
Change-Id: I180ebb26ad8bb4fbbb0685c16b677ce4cc2608ba
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2027754
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,234 | 20.01.2020 19:34:46 | 28,800 | 0171ea4e6b23cf0c54e83fe3c2272ed30dc28c8d | TCPMv1/v2: Move EC_CMD_USB_PD_CONTROL host command to common file
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/usb_pd_host_cmd.c",
"new_path": "common/usb_pd_host_cmd.c",
"diff": "#include \"ec_commands.h\"\n#include \"host_command.h\"\n#include \"tcpm.h\"\n+#include \"usb_mux.h\"\n#include \"usb_pd.h\"\n#include \"usb_pd_tcpm.h\"\n@@ -216,6 +217,157 @@ static e... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv1/v2: Move EC_CMD_USB_PD_CONTROL host command to common file
BUG=b:142911453
BRANCH=none
TEST=make buildall -j
Change-Id: Iadb75b9b187a0444c445c2641ec71d592cf4ac92
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2013228
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,234 | 30.12.2019 13:57:13 | 28,800 | 71aadcd324ddfcdde2168247d7ef2d19b69db36e | volteer: Enable USB4.0 mode
BRANCH=none
TEST=With Gatkex creek 3 device volteer can enter to USB4.0 mode | [
{
"change_type": "MODIFY",
"old_path": "baseboard/volteer/baseboard.h",
"new_path": "baseboard/volteer/baseboard.h",
"diff": "/* Enabling Thunderbolt-compatible mode */\n#define CONFIG_USB_PD_TBT_COMPAT_MODE\n+/* Enabling USB4 mode */\n+#define CONFIG_USB_PD_USB4\n+\n/*\n* USB ID\n* This is allocate... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | volteer: Enable USB4.0 mode
BUG=b:140819518
BRANCH=none
TEST=With Gatkex creek 3 device volteer can enter to USB4.0 mode
Change-Id: Ib20c14db42cae413322ca060c961fd67088a1a09
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Signed-off-by: Ayushee <ayushee.shah@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1984608
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,295 | 31.01.2020 13:45:58 | -28,800 | b0457df349047d1a1db54d89beb2525a91ec2e94 | morphius: enable audio codec
Clone from CL:1988031
Enables audio codec with following features:
DMIC
I2S_RX
BRANCH=none
TEST=make buildall | [
{
"change_type": "MODIFY",
"old_path": "board/morphius/gpio.inc",
"new_path": "board/morphius/gpio.inc",
"diff": "@@ -131,3 +131,7 @@ ALTERNATE(PIN_MASK(0, 0xE0), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_10-\n/* Power Switch Logic (PSL) inputs */\nALTERNATE(PIN_MASK(0, BIT(0) | BIT(1) | BIT(2)... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | morphius: enable audio codec
Clone from CL:1988031
Enables audio codec with following features:
- DMIC
- I2S_RX
BRANCH=none
BUG=none
TEST=make buildall
Change-Id: I068210a2607ae7a6fd63bfce5e68ecf2b7e0c072
Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032548
Reviewed-by: Denis Brockus <dbrockus@chromium.org> |
136,340 | 01.02.2020 23:15:41 | 28,800 | 56f8be436a8fc4b5f73508e7ba84304958adfede | driver: bmm150: Fix comment
Fix cut and paste error.
BRANCH=reef
TEST=compile | [
{
"change_type": "MODIFY",
"old_path": "driver/mag_bmm150.c",
"new_path": "driver/mag_bmm150.c",
"diff": "@@ -232,7 +232,7 @@ void bmm150_normalize(const struct motion_sensor_t *s,\n/* X and Y are two's complement 13 bits vectors */\nraw[X] = ((int16_t)(data[0] | (data[1] << 8))) >> 3;\nraw[Y] = ((i... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | driver: bmm150: Fix comment
Fix cut and paste error.
BRANCH=reef
BUG=none
TEST=compile
(cherry picked from commit 7b2f6cffa2e9710fe8bf0e66e20fc70bf1fb2a7f)
Change-Id: I60cc7bb7b08491927a7ac03c769dda03f8765b81
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2034676
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,234 | 30.01.2020 11:15:16 | 28,800 | 0978c5b16a2e459f29beb1256b1ae5f2e3025768 | TCPMv1/v2: Move pd_dfp_dp_get_pin_mode() to common file
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/build.mk",
"new_path": "common/build.mk",
"diff": "@@ -148,6 +148,7 @@ common-$(CONFIG_USB_POWER_DELIVERY)+=usb_common.o usb_pd_host_cmd.o\nifeq ($(CONFIG_USB_SM_FRAMEWORK),)\ncommon-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_protocol.o usb_pd_policy.o\nendif... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv1/v2: Move pd_dfp_dp_get_pin_mode() to common file
BUG=b:148528713
BRANCH=none
TEST=make buildall -j
Change-Id: I9192762e7eba55d659d1ad282e62ad3849e41b65
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032155
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org> |
136,234 | 30.01.2020 12:45:28 | 28,800 | 49d2557199a851138c5c3e8842aa6d2fe7563fc3 | TCPMv1/v2: Move pd_dfp_enter_mode() to common file
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/usb_pd_alt_mode_dfp.c",
"new_path": "common/usb_pd_alt_mode_dfp.c",
"diff": "* Alternate Mode Downstream Facing Port (DFP) USB-PD module.\n*/\n+#include \"console.h\"\n#include \"usb_pd.h\"\n#include \"util.h\"\n+#ifdef CONFIG_COMMON_RUNTIME\n+#define C... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv1/v2: Move pd_dfp_enter_mode() to common file
BUG=b:148528713
BRANCH=none
TEST=make buildall -j
Change-Id: Id1d3e8bc27d895a53b53a77cf1c8fd36c69b47dc
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032156
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,234 | 30.01.2020 14:24:20 | 28,800 | a14f04dd9525b4e59c549bc6cdc193da45423b0c | TCPMv1/v2: Move pd_dfp_exit_mode() to common file
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/usb_pd_alt_mode_dfp.c",
"new_path": "common/usb_pd_alt_mode_dfp.c",
"diff": "@@ -65,6 +65,27 @@ static int pd_allocate_mode(int port, uint16_t svid)\nreturn -1;\n}\n+static int validate_mode_request(struct svdm_amode_data *modep,\n+ uint16_t svid, int o... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv1/v2: Move pd_dfp_exit_mode() to common file
BUG=b:148528713
BRANCH=none
TEST=make buildall -j
Change-Id: I9d6a219ae031ed9954819c12563867e07bcc8668
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032157
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,234 | 30.01.2020 15:08:26 | 28,800 | 1c5d43dd90a55dc3e5a61447aaa8e0441b13b236 | TCPMv1/v2: Move dfp_consume_identity() to common file
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/usb_pd_alt_mode_dfp.c",
"new_path": "common/usb_pd_alt_mode_dfp.c",
"diff": "@@ -233,3 +233,32 @@ void dfp_consume_attention(int port, uint32_t *payload)\nif (modep->fx->attention)\nmodep->fx->attention(port, payload);\n}\n+\n+void dfp_consume_identity(... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv1/v2: Move dfp_consume_identity() to common file
BUG=b:148528713
BRANCH=none
TEST=make buildall -j
Change-Id: I5b0bbd553cbe4fc76478b1c89b0f3f391f074a27
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032158
Reviewed-by: Keith Short <keithshort@chromium.org> |
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