author int64 658 755k | date stringlengths 19 19 | timezone int64 -46,800 43.2k | hash stringlengths 40 40 | message stringlengths 5 490 | mods list | language stringclasses 20 values | license stringclasses 3 values | repo stringlengths 5 68 | original_message stringlengths 12 491 |
|---|---|---|---|---|---|---|---|---|---|
136,234 | 30.01.2020 15:50:11 | 28,800 | 0b30c20dcfd5460f957ea687d4b4bfd7bcf3d8de | TCPMv1/v2: Move dfp_consume_svids() to common file
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/usb_pd_alt_mode_dfp.c",
"new_path": "common/usb_pd_alt_mode_dfp.c",
"diff": "@@ -262,3 +262,42 @@ void dfp_consume_identity(int port, int cnt, uint32_t *payload)\nbreak;\n}\n}\n+\n+void dfp_consume_svids(int port, int cnt, uint32_t *payload)\n+{\n+ int ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv1/v2: Move dfp_consume_svids() to common file
BUG=b:148528713
BRANCH=none
TEST=make buildall -j
Change-Id: I3ba96a803fa68d800a3ca41b4ac31e43325c0266
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032159
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,234 | 30.01.2020 16:12:15 | 28,800 | 9a02c817a31865fa368fbb8f5a7a3aa8875b3308 | TCPMv1/v2: Move dfp_consume_modes() to common file
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/usb_pd_alt_mode_dfp.c",
"new_path": "common/usb_pd_alt_mode_dfp.c",
"diff": "@@ -301,3 +301,20 @@ void dfp_consume_svids(int port, int cnt, uint32_t *payload)\nif (i && ((i % 12) == 0))\nCPRINTF(\"ERR:SVID+12\\n\");\n}\n+\n+void dfp_consume_modes(int po... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv1/v2: Move dfp_consume_modes() to common file
BUG=b:148528713
BRANCH=none
TEST=make buildall -j
Change-Id: I0a587a68b5c814595d78905f1cdd611f710f2182
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032160
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,234 | 30.01.2020 16:35:54 | 28,800 | 51e1a092de5daf59b1a6b39755183a6ef312f199 | TCPMv1/v2: Move dfp_discover_modes() to common file
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/usb_pd_alt_mode_dfp.c",
"new_path": "common/usb_pd_alt_mode_dfp.c",
"diff": "@@ -318,3 +318,16 @@ void dfp_consume_modes(int port, int cnt, uint32_t *payload)\npe->svid_idx++;\n}\n+\n+int dfp_discover_modes(int port, uint32_t *payload)\n+{\n+ struct pd_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv1/v2: Move dfp_discover_modes() to common file
BUG=b:148528713
BRANCH=none
TEST=make buildall -j
Change-Id: I83c6dca9652a9c613849b292b4c2329da3f9d424
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032161
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,234 | 30.01.2020 20:23:49 | 28,800 | 6b87e07a55b83251d30288dbb297d602ddba811a | TCPMv1/v2: Move DFP alternate mode functions to common file
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/usb_pd_alt_mode_dfp.c",
"new_path": "common/usb_pd_alt_mode_dfp.c",
"diff": "@@ -331,3 +331,52 @@ int dfp_discover_modes(int port, uint32_t *payload)\nreturn 1;\n}\n+\n+int pd_alt_mode(int port, uint16_t svid)\n+{\n+ struct svdm_amode_data *modep = pd_g... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv1/v2: Move DFP alternate mode functions to common file
BUG=b:148528713
BRANCH=none
TEST=make buildall -j
Change-Id: I34bf543b381fc9e4f858a48d3d1568de42438509
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032725
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,295 | 22.01.2020 15:01:12 | -28,800 | efac8816d6d6a5617bfede0cac4e284fabb2ce26 | morphius: add trackpoint reset sequence
Add trackpoint reset sequence follow spec.
BRANCH=none
TEST=make buildall | [
{
"change_type": "MODIFY",
"old_path": "board/morphius/board.c",
"new_path": "board/morphius/board.c",
"diff": "#include \"driver/accelgyro_bmi160.h\"\n#include \"extpower.h\"\n#include \"gpio.h\"\n+#include \"hooks.h\"\n#include \"lid_switch.h\"\n#include \"power.h\"\n#include \"power_button.h\"\n@... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | morphius: add trackpoint reset sequence
Add trackpoint reset sequence follow spec.
BUG=b:145575366
BRANCH=none
TEST=make buildall
Change-Id: I5334e5a83606115cdce3da908ef4a54851107058
Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032547
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org> |
136,234 | 03.02.2020 11:04:25 | 28,800 | fd7576f02df537972b11098a687232a0e7a71f01 | volteer/intelrvp: Enable "pe" console command
BRANCH=none
TEST=Able to observe all the SVIDs presented by port partner | [
{
"change_type": "MODIFY",
"old_path": "baseboard/intelrvp/baseboard.h",
"new_path": "baseboard/intelrvp/baseboard.h",
"diff": "#define CONFIG_CMD_CHARGER_DUMP\n#define CONFIG_CMD_KEYBOARD\n#define CONFIG_CMD_USB_PD_CABLE\n+#define CONFIG_CMD_USB_PD_PE\n/* Port80 display */\n#define CONFIG_MAX695X_S... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | volteer/intelrvp: Enable "pe" console command
BUG=none
BRANCH=none
TEST=Able to observe all the SVIDs presented by port partner
Change-Id: I2fdb851b0683782555b6b10cbbd16446a914a40a
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2036590
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org> |
136,234 | 30.01.2020 20:46:54 | 28,800 | fadd6d704cd460ef6e9af2aae7eba08b527c5bf4 | TCPMv1/v2: Move "pe" console command to common file
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/build.mk",
"new_path": "common/build.mk",
"diff": "@@ -144,7 +144,8 @@ common-$(CONFIG_USB_CONSOLE_STREAM)+=usb_console_stream.o\ncommon-$(CONFIG_USB_I2C)+=usb_i2c.o\ncommon-$(CONFIG_USB_PORT_POWER_DUMB)+=usb_port_power_dumb.o\ncommon-$(CONFIG_USB_PORT_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv1/v2: Move "pe" console command to common file
BUG=b:148528713
BRANCH=none
TEST=make buildall -j
Change-Id: I71c8d491014a69ec938fa1172eee7b5322572654
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032726
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Jett Rink <jettrink@chromium.org> |
136,282 | 05.02.2020 10:54:28 | -28,800 | 58881259aeb8ebd76bc422eabe57ab45f112aed5 | Bipship: Add SKUID for non-keyboard backlight SKUs
BRANCH=octopus
TEST=make buildall -j.
Tested-by: Justin TerAvest | [
{
"change_type": "MODIFY",
"old_path": "board/bloog/board.c",
"new_path": "board/bloog/board.c",
"diff": "@@ -332,7 +332,7 @@ __override uint32_t board_override_feature_flags0(uint32_t flags0)\n* Remove keyboard backlight feature for devices that don't support it.\n*/\nif (sku_id == 33 || sku_id == ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Bipship: Add SKUID for non-keyboard backlight SKUs
BUG=b:147021309
BRANCH=octopus
TEST=make buildall -j.
Change-Id: I1990888bd4409166a1ba164b5017c1147a3b0793
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2035446
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Tested-by: Justin TerAvest <teravest@chromium.org> |
136,443 | 02.02.2020 18:02:13 | 28,800 | 1f3f4e74576669a1c791cbb1d45bbd3a410a085d | host: Add basic taskinfo console command
BRANCH=none
TEST=./build/host/aes/aes.exe
> taskinfo | [
{
"change_type": "MODIFY",
"old_path": "core/host/task.c",
"new_path": "core/host/task.c",
"diff": "@@ -301,6 +301,28 @@ task_id_t task_get_running(void)\nreturn running_task_id;\n}\n+void task_print_list(void)\n+{\n+ int i;\n+\n+ ccputs(\"Name Events\\n\");\n+\n+ for (i = 0; i < TASK_ID_COUNT; i++)... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | host: Add basic taskinfo console command
BRANCH=none
BUG=none
TEST=./build/host/aes/aes.exe
> taskinfo
Change-Id: I91bb17b8c65564fd91510755510974de9357731c
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2034998
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,368 | 11.12.2019 13:20:14 | 28,800 | ec9f5592b4448bf91369a6eedfc16758c6cfb297 | TCPMv2: Add TypeC functions needed for PD FAFT
Add status and control functions that are accessed
from the pd console which enables the device to work
with PD FAFT.
BRANCH=none
TEST=make -j buildall | [
{
"change_type": "MODIFY",
"old_path": "common/usbc/usb_tc_drp_acc_trysrc_sm.c",
"new_path": "common/usbc/usb_tc_drp_acc_trysrc_sm.c",
"diff": "/* 100 ms is enough time for any TCPC transaction to complete. */\n#define PD_LPM_DEBOUNCE_US (100 * MSEC)\n+/*\n+ * The TypeC state machine uses this bit t... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv2: Add TypeC functions needed for PD FAFT
Add status and control functions that are accessed
from the pd console which enables the device to work
with PD FAFT.
BUG=chromium:1021235
BRANCH=none
TEST=make -j buildall
Change-Id: I1a33b50646acf0e7036c325eb4cb7a94cc8ec2cd
Signed-off-by: Sam Hurst <shurst@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1962972
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,324 | 05.02.2020 12:46:45 | 25,200 | 66e42932b9be27df7ac563a915877371662b120f | zork: adjust retimer gain adjustments
BRANCH=none
TEST=verify functioning USB-C1 | [
{
"change_type": "MODIFY",
"old_path": "baseboard/zork/baseboard.c",
"new_path": "baseboard/zork/baseboard.c",
"diff": "@@ -491,44 +491,27 @@ static int ps8802_tune_mux(int port, mux_state_t mux_state)\nPS8802_REG_PAGE2,\nPS8802_REG2_USB_SSEQ_LEVEL,\nPS8802_USBEQ_LEVEL_UP_MASK,\n- PS8802_USBEQ_LEVEL... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | zork: adjust retimer gain adjustments
BUG=none
BRANCH=none
TEST=verify functioning USB-C1
Change-Id: I9222b075ca5e59a8ee84a0f19260e8b4549132d6
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2039910
Commit-Queue: Edward Hill <ecgh@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org> |
136,324 | 05.02.2020 12:47:52 | 25,200 | 47c7ea65d567f88eed4f7b279e76505b471c2810 | ps8802: debug cleanup and make wake_up accessible
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "driver/retimer/ps8802.c",
"new_path": "driver/retimer/ps8802.c",
"diff": "@@ -35,60 +35,132 @@ int ps8802_i2c_read(int port, int page, int offset, int *data)\nint ps8802_i2c_write(int port, int page, int offset, int data)\n{\n+ int rv;\n+ int pre_val, post_val... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | ps8802: debug cleanup and make wake_up accessible
BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: I4fe0ce5fa1996367dfeeb982077a498e164c9a59
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2039911
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org> |
136,324 | 05.02.2020 12:48:54 | 25,200 | 42d77650f7d3767e80bf0fe641425db0234bb7a9 | ps8818: debug cleanup
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "driver/retimer/ps8818.c",
"new_path": "driver/retimer/ps8818.c",
"diff": "@@ -35,31 +35,67 @@ int ps8818_i2c_read(int port, int page, int offset, int *data)\nint ps8818_i2c_write(int port, int page, int offset, int data)\n{\n+ int rv;\n+ int pre_val, post_val;... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | ps8818: debug cleanup
BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: I54817e28b255fddece2f4911ebef1fdbb86af367
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2039912
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org> |
136,324 | 05.02.2020 12:49:55 | 25,200 | 50d7dd999f709669fe965cda68b753c3ee4602e2 | zork: wake up ps8802 before tuning gain adjustment
BRANCH=none
TEST=verify functional USB-C1 | [
{
"change_type": "MODIFY",
"old_path": "baseboard/zork/baseboard.c",
"new_path": "baseboard/zork/baseboard.c",
"diff": "@@ -484,6 +484,11 @@ static int ps8802_tune_mux(int port, mux_state_t mux_state)\n{\nint rv = EC_SUCCESS;\n+ /* Make sure the PS8802 is awake */\n+ rv = ps8802_i2c_wake(port);\n+ i... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | zork: wake up ps8802 before tuning gain adjustment
BUG=none
BRANCH=none
TEST=verify functional USB-C1
Change-Id: If716e182e15e7d9f355b0d5ec2e0b444b83ccf4b
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2039913
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org> |
136,324 | 05.02.2020 15:43:34 | 25,200 | b1743225b0da0f24a860581e90b999615fbfced5 | trembyle: adjust gain on USB-A ps8811 for gen2 speeds
BRANCH=none
TEST=verify gen2 speeds on ps8811 equipt USB-A connections
Tested-by: Edward Hill | [
{
"change_type": "MODIFY",
"old_path": "baseboard/zork/baseboard.c",
"new_path": "baseboard/zork/baseboard.c",
"diff": "#include \"driver/ppc/nx20p348x.h\"\n#include \"driver/retimer/pi3dpx1207.h\"\n#include \"driver/retimer/ps8802.h\"\n+#include \"driver/retimer/ps8811.h\"\n#include \"driver/retime... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | trembyle: adjust gain on USB-A ps8811 for gen2 speeds
BUG=b:138600008
BRANCH=none
TEST=verify gen2 speeds on ps8811 equipt USB-A connections
Change-Id: I5226fccf2460009dd7f873ca6869b57048bd65fc
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2040096
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org> |
136,287 | 18.10.2019 13:21:25 | 21,600 | be915c8339500ce81ff2b9944ca5d1ecc6395455 | common: Implement newton sphere fit
Add implementation of Newton's method for sphere fitting.
TEST=Added new unit tests
BRANCH=None | [
{
"change_type": "MODIFY",
"old_path": "common/build.mk",
"new_path": "common/build.mk",
"diff": "@@ -121,7 +121,7 @@ common-$(CONFIG_RWSIG)+=rwsig.o vboot/common.o\ncommon-$(CONFIG_RWSIG_TYPE_RWSIG)+=vboot/vb21_lib.o\ncommon-$(CONFIG_MATH_UTIL)+=math_util.o\ncommon-$(CONFIG_ONLINE_CALIB)+=stillness... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | common: Implement newton sphere fit
Add implementation of Newton's method for sphere fitting.
BUG=b:137758297,chromium:1023858
TEST=Added new unit tests
BRANCH=None
Change-Id: Ic78ec4f8a8c2f57ddfa1d5220861bf5c06981ad8
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1869730
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> |
136,234 | 03.02.2020 21:34:18 | 28,800 | 1b886ec3bb3a8212ea0902956382b4fed503bfd9 | usb_pd: Move common alt mode DFP functions to it's file
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/usb_common.c",
"new_path": "common/usb_common.c",
"diff": "@@ -407,19 +407,6 @@ void pd_build_request(uint32_t src_cap_cnt, const uint32_t * const src_caps,\n}\n#endif\n-#ifdef CONFIG_USB_PD_ALT_MODE_DFP\n-void notify_sysjump_ready(volatile const task_i... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | usb_pd: Move common alt mode DFP functions to it's file
BUG=b:148528713
BRANCH=none
TEST=make buildall -j
Change-Id: I5a9a70095940aa57408685584352e602b42b298e
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2037133
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org> |
136,427 | 06.02.2020 13:41:12 | 25,200 | e61202c800686ca441c03d8f2e6f75de94e6222d | trembyle/morphius: Remove CONFIG_BRINGUP
BRANCH=none
TEST=trembyle AP boots to OS on EC reboot | [
{
"change_type": "MODIFY",
"old_path": "board/morphius/board.h",
"new_path": "board/morphius/board.h",
"diff": "* TODO: Remove this config before production.\n*/\n#define CONFIG_SYSTEM_UNLOCKED\n-#define CONFIG_BRINGUP\n#define CONFIG_I2C_DEBUG\n#define CONFIG_MKBP_USE_GPIO\n"
},
{
"change_t... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | trembyle/morphius: Remove CONFIG_BRINGUP
BUG=none
BRANCH=none
TEST=trembyle AP boots to OS on EC reboot
Change-Id: I564b3da9dc458a833acdca37274f4ecc7bc6fcd5
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2042678
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org> |
136,234 | 04.02.2020 11:40:23 | 28,800 | 596466a21da2995b9294fc354895c9a8b5b7849e | TCPMv1/v2: Move "pdcable" console command to common file
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/usb_pd_console_cmd.c",
"new_path": "common/usb_pd_console_cmd.c",
"diff": "@@ -82,4 +82,100 @@ DECLARE_CONSOLE_COMMAND(pe, command_pe,\n\"<port> dump\",\n\"USB PE\");\n#endif /* CONFIG_CMD_USB_PD_PE */\n+\n+#ifdef CONFIG_CMD_USB_PD_CABLE\n+static const ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv1/v2: Move "pdcable" console command to common file
BUG=b:148528713
BRANCH=none
TEST=make buildall -j
Change-Id: I7f78efeb74536d5d6c5dd0b4bd5f32325c1500ec
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2036604
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,269 | 11.12.2019 09:50:58 | 28,800 | 34b2db31633446684f73104f016d248ffb09344b | docs/fingerprint: Remove unnecessary BOARD env variable
Since we're running the host tests (using the "host" board), we don't
need to set the BOARD environment variable.
BRANCH=none
TEST=view in gitiles | [
{
"change_type": "MODIFY",
"old_path": "docs/fingerprint/fingerprint.md",
"new_path": "docs/fingerprint/fingerprint.md",
"diff": "@@ -98,19 +98,19 @@ prevent you from uploading.\nList available unit tests:\n```bash\n-(chroot) ~/trunk/src/platform/ec $ make BOARD=nocturne_fp print-host-tests\n+(chroo... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | docs/fingerprint: Remove unnecessary BOARD env variable
Since we're running the host tests (using the "host" board), we don't
need to set the BOARD environment variable.
BRANCH=none
BUG=none
TEST=view in gitiles
Change-Id: I8ddf90a1562f2f91a784c2c0781bb4293efbf0a6
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1962449
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,447 | 04.02.2020 09:31:07 | -39,600 | 5d83007b68734e5bde995d3c4f7e935bc53cdf11 | puff: re-enable TCPMv2
TEST=Relevant bugs are fixed
BRANCH=None
Cq-Depend: chromium:2039504, chromium:2036592 | [
{
"change_type": "MODIFY",
"old_path": "board/puff/board.h",
"new_path": "board/puff/board.h",
"diff": "#undef CONFIG_CHARGE_MANAGER_SAFE_MODE\n/* USB type C */\n-/* TODO: (b/147255678) Use TCPMv2 */\n-#if 0\n-#define CONFIG_USB_SM_FRAMEWORK\n-#endif\n-\n+#define CONFIG_USB_SM_FRAMEWORK /* Use TCPMv... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | puff: re-enable TCPMv2
BUG=b:147255678, b:147265554
TEST=Relevant bugs are fixed
BRANCH=None
Cq-Depend: chromium:2039504, chromium:2036592
Change-Id: I052ff0e9b6cec7359781eecdbabf8f93dedc74dd
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2035431
Reviewed-by: Sam McNally <sammc@chromium.org> |
136,256 | 07.02.2020 10:42:41 | 25,200 | 1bc5961c7e2d4e7e623e69f628cb0069e02b6b4d | cleanup: add comments for MT flag use
Document why we need the MT flag as a compiler option
BRANCH=none
TEST=builds | [
{
"change_type": "MODIFY",
"old_path": "Makefile.rules",
"new_path": "Makefile.rules",
"diff": "@@ -57,6 +57,11 @@ endif\n# the resulting ec.bin\nexport STATIC_VERSION\n+# Commonly used compiler options used in these scripts\n+#\n+# -MT explicitly sets target file name in generated .d files to work ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cleanup: add comments for MT flag use
Document why we need the MT flag as a compiler option
BRANCH=none
BUG=none
TEST=builds
Change-Id: Id6bceacc3b0af110f79d9f727ded595950fa2afb
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2044358
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> |
136,324 | 10.02.2020 12:39:47 | 25,200 | 9473c61ff528ce45bda479027f5011297faaa5da | trembyle: initialize PS8811 after AP rail is high
BRANCH=none
TEST=verify USB-A1 runs USB3.1g2 speeds | [
{
"change_type": "MODIFY",
"old_path": "baseboard/zork/baseboard.c",
"new_path": "baseboard/zork/baseboard.c",
"diff": "@@ -482,6 +482,10 @@ static void ps8811_tuning_init(void)\n{\nint rv;\n+ /* Turn on the retimers */\n+ ioex_set_level(IOEX_USB_A0_RETIMER_EN, 1);\n+ ioex_set_level(IOEX_USB_A1_RETI... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | trembyle: initialize PS8811 after AP rail is high
BUG=b:138600008
BRANCH=none
TEST=verify USB-A1 runs USB3.1g2 speeds
Change-Id: I688f02bfbabd53e69a1d7d7a08526db6ddad77b0
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2047629
Commit-Queue: Edward Hill <ecgh@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org> |
136,295 | 04.02.2020 14:19:40 | -28,800 | 6ba747b88f10499dd558e1b606895cf82ed7ba3d | morphius: add PWM CH0 for LED control
This patch add PWM channel 0 for LED control.
BRANCH=none
TEST=make buildall | [
{
"change_type": "MODIFY",
"old_path": "baseboard/zork/baseboard.c",
"new_path": "baseboard/zork/baseboard.c",
"diff": "@@ -174,20 +174,6 @@ const struct i2c_port_t i2c_ports[] = {\n};\nconst unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);\n-const struct pwm_t pwm_channels[] = {\n- [PWM_CH_KBLI... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | morphius: add PWM CH0 for LED control
This patch add PWM channel 0 for LED control.
BUG=none
BRANCH=none
TEST=make buildall
Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com>
Change-Id: I513856dd7c223b5ee1f6f12fa9a1846f5f616e01
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2035440
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org> |
136,338 | 11.02.2020 10:52:11 | 25,200 | e49c175c63d94d59ee378ce1d97e4df8c25d987f | zork: Disable Host command and Fan channels
These are pretty annoying. Lets disable them by default.
BRANCH=none
TEST=Booted trembyle and didn't see messages | [
{
"change_type": "MODIFY",
"old_path": "baseboard/zork/baseboard.h",
"new_path": "baseboard/zork/baseboard.h",
"diff": "#define CONFIG_SPI_FLASH_REGS\n#define CONFIG_SPI_FLASH_W25Q40 /* Internal SPI flash type. */\n+#define CC_DEFAULT (CC_ALL & ~(CC_MASK(CC_HOSTCMD) | CC_MASK(CC_PWM)))\n+\n/*\n* Ena... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | zork: Disable Host command and Fan channels
These are pretty annoying. Lets disable them by default.
BUG=none
BRANCH=none
TEST=Booted trembyle and didn't see messages
Change-Id: Icf12c6d69059a6a263815f89c4248df1e1acb83d
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2050028
Commit-Queue: Edward Hill <ecgh@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org> |
136,305 | 07.02.2020 13:28:33 | 25,200 | fdec8e3a239cc5c6dd40d9f95640bb8b6cbcf23c | Waddledee: Add thermistors
This change adds the temperature sensors for waddledee, which are hooked
up to 2 of the ADCs.
BRANCH=None
TEST=builds | [
{
"change_type": "MODIFY",
"old_path": "board/waddledee/board.c",
"new_path": "board/waddledee/board.c",
"diff": "#include \"driver/accel_lis2dh.h\"\n#include \"driver/accelgyro_lsm6dsm.h\"\n#include \"driver/sync.h\"\n+#include \"driver/temp_sensor/thermistor.h\"\n#include \"gpio.h\"\n#include \"in... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Waddledee: Add thermistors
This change adds the temperature sensors for waddledee, which are hooked
up to 2 of the ADCs.
BUG=b:146557556
BRANCH=None
TEST=builds
Change-Id: I3475a586f0992df8cba33939611ce6a632f25119
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2044701
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,324 | 11.02.2020 11:33:52 | 25,200 | 65bf4e879f39229ddd69c7a993f95909dbf3f1d0 | nx20p3483: vbus_source_enable failure correction
The nx20p3483 can not use the switch status register
because TCPCI was used to enable the switch control.
BRANCH=none
TEST=verify on TCPMv2 that USB3.1 gen 2 functions | [
{
"change_type": "MODIFY",
"old_path": "driver/ppc/nx20p348x.c",
"new_path": "driver/ppc/nx20p348x.c",
"diff": "@@ -30,6 +30,10 @@ static int db_exit_fail_count[CONFIG_USB_PD_PORT_MAX_COUNT];\n#define NX20P348X_FLAGS_SOURCE_ENABLED BIT(0)\nstatic uint8_t flags[CONFIG_USB_PD_PORT_MAX_COUNT];\n+#if !d... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | nx20p3483: vbus_source_enable failure correction
The nx20p3483 can not use the switch status register
because TCPCI was used to enable the switch control.
BUG=none
BRANCH=none
TEST=verify on TCPMv2 that USB3.1 gen 2 functions
Change-Id: I5681996640568d74b51fdfc2d5dac20a97e4908a
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2051010
Reviewed-by: Edward Hill <ecgh@chromium.org> |
136,293 | 10.02.2020 12:19:36 | 18,000 | 50b268bc67c1c73d81eafaa46dc7cab75c335e41 | Fizz: add fan table for excelsior
BRANCH=none
TEST=build, install, set OEM to 10, check fan speed, set min fan speed | [
{
"change_type": "MODIFY",
"old_path": "board/fizz/board.c",
"new_path": "board/fizz/board.c",
"diff": "@@ -618,10 +618,21 @@ static const struct fan_step fan_table2[] = {\n{.on = 87, .off = 81, .rpm = 3900},\n{.on = 98, .off = 91, .rpm = 5000},\n};\n+static const struct fan_step fan_table3[] = {\n+... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Fizz: add fan table for excelsior
BUG=b:149103675
BRANCH=none
TEST=build, install, set OEM to 10, check fan speed, set min fan speed
Change-Id: I032c48c5d7696a482b0cf4083b88dcd4f341f434
Signed-off-by: Jeff Chase <jnchase@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2047931
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com>
Reviewed-by: David Huang <David.Huang@quantatw.com> |
136,234 | 10.02.2020 16:40:33 | 28,800 | e34464e92cc0d13e1fc4a7647897bf534be52444 | TCPMv1/v2: Move pd_usb_billboard_deferred() to common file
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/usb_common.c",
"new_path": "common/usb_common.c",
"diff": "#include \"host_command.h\"\n#include \"system.h\"\n#include \"task.h\"\n+#include \"usb_api.h\"\n#include \"usb_common.h\"\n#include \"usb_mux.h\"\n#include \"usb_pd.h\"\n@@ -773,3 +774,21 @@ _... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv1/v2: Move pd_usb_billboard_deferred() to common file
BUG=b:148528713
BRANCH=none
TEST=make buildall -j
Change-Id: I92e7ed06a610126ff80ec91047962e3e9ba2cde1
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2051215
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,234 | 10.02.2020 16:00:42 | 28,800 | 7460621eae83145ea57d42c0eb6daf486286f234 | TCPMv1/v2: Move pd_check_requested_voltage() to common file
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "board/plankton/usb_pd_policy.c",
"new_path": "board/plankton/usb_pd_policy.c",
"diff": "@@ -68,15 +68,6 @@ void pd_set_input_current_limit(int port, uint32_t max_ma,\nreturn;\n}\n-int pd_board_check_request(uint32_t rdo, int pdo_cnt)\n-{\n- int idx = RDO_POS(r... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv1/v2: Move pd_check_requested_voltage() to common file
BUG=b:148528713
BRANCH=none
TEST=make buildall -j
Change-Id: I5ba854552b5c6124e3c6758273651edc0e3c23ae
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2051214
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,234 | 10.02.2020 16:44:42 | 28,800 | 8d3e54731e8f2a47a1822d08f4a403aef28be1de | TCPMv1/v2: Move pd_set_vbus_discharge() to common file
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/usb_common.c",
"new_path": "common/usb_common.c",
"diff": "@@ -840,3 +840,43 @@ static void pd_usb_billboard_deferred(void)\n}\n}\nDECLARE_DEFERRED(pd_usb_billboard_deferred);\n+\n+#ifdef CONFIG_USB_PD_DISCHARGE\n+static void gpio_discharge_vbus(int por... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv1/v2: Move pd_set_vbus_discharge() to common file
BUG=b:148528713
BRANCH=none
TEST=make buildall -j
Change-Id: Id7b0d10396300c4bd5b8253b7ce77c1fe59c9bc8
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2051216
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,234 | 10.02.2020 17:22:37 | 28,800 | 7bbdd3cc90d174343cdc863515258de339f4c4dc | TCPMv1/v2: Move pd_charge_from_device() to common file
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/build.mk",
"new_path": "common/build.mk",
"diff": "@@ -150,6 +150,7 @@ ifeq ($(CONFIG_USB_SM_FRAMEWORK),)\ncommon-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_protocol.o usb_pd_policy.o\nendif\ncommon-$(CONFIG_USB_PD_ALT_MODE_DFP)+=usb_pd_alt_mode_dfp.o\n+commo... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv1/v2: Move pd_charge_from_device() to common file
BUG=b:148528713
BRANCH=none
TEST=make buildall -j
Change-Id: I2327ceaf6be76a0428981106aaeb3ffbb2018049
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2051217
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,234 | 11.02.2020 11:47:50 | 28,800 | d34cf65162e9b75dd4e3c929ecacdb450b5a73e5 | TCPMv1/v2: Move pd_get/set_max_voltage() to common file
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/usb_pd_dual_role.c",
"new_path": "common/usb_pd_dual_role.c",
"diff": "#include \"usb_pd.h\"\n+#if defined(PD_MAX_VOLTAGE_MV) && defined(PD_OPERATING_POWER_MW)\n+/*\n+ * As a sink, this is the max voltage (in millivolts) we can request\n+ * before getti... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv1/v2: Move pd_get/set_max_voltage() to common file
BUG=b:148528713
BRANCH=none
TEST=make buildall -j
Change-Id: I6fd4c870b8821a2393c67fda7003583b91ef7f5c
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2051218
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,234 | 11.02.2020 12:02:44 | 28,800 | b7f0b4cd0cd42319d204ac653224f3661a463237 | TCPMv1/v2: Move PDO functions to PD dual role module file
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/build.mk",
"new_path": "common/build.mk",
"diff": "@@ -150,7 +150,9 @@ ifeq ($(CONFIG_USB_SM_FRAMEWORK),)\ncommon-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_protocol.o usb_pd_policy.o\nendif\ncommon-$(CONFIG_USB_PD_ALT_MODE_DFP)+=usb_pd_alt_mode_dfp.o\n+ifneq... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv1/v2: Move PDO functions to PD dual role module file
BUG=b:148528713
BRANCH=none
TEST=make buildall -j
Change-Id: Ib43a83084b087905a8322bfd2bea2fe70ec33c1d
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2051219
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,234 | 11.02.2020 12:48:46 | 28,800 | 0c2d07061c82d718288dbc287ca56b17da2206f9 | TCPMv1/v2: Move pd_process_source_cap() to common file
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/usb_pd_dual_role.c",
"new_path": "common/usb_pd_dual_role.c",
"diff": "* Dual Role (Source & Sink) USB-PD module.\n*/\n+#include \"charge_manager.h\"\n#include \"charge_state.h\"\n#include \"usb_common.h\"\n#include \"usb_pd.h\"\n@@ -281,6 +282,25 @@ vo... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv1/v2: Move pd_process_source_cap() to common file
BUG=b:148528713
BRANCH=none
TEST=make buildall -j
Change-Id: I6bd6b5875a322ca4ba6d77a4cfc96a72630e5f5c
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2051220
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,427 | 11.02.2020 16:40:38 | 25,200 | 67495bf67accdc4851bd18d542e6800fce140eac | zork: Increase PD max power to 60W
BRANCH=none
TEST=EC requests 20V 3A from 100W charger | [
{
"change_type": "MODIFY",
"old_path": "baseboard/zork/baseboard.h",
"new_path": "baseboard/zork/baseboard.h",
"diff": "#define PD_VCONN_SWAP_DELAY 5000 /* us */\n#define PD_OPERATING_POWER_MW 15000\n-#define PD_MAX_POWER_MW 45000\n+#define PD_MAX_POWER_MW 60000\n#define PD_MAX_CURRENT_MA 3000\n#def... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | zork: Increase PD max power to 60W
BUG=b:138601169
BRANCH=none
TEST=EC requests 20V 3A from 100W charger
Change-Id: I51aae0f2cd3e8c7e5cad5de24591af3824244ddc
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2051310
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org> |
136,234 | 12.02.2020 12:01:31 | 28,800 | ba2927dd652c425bef420f90c6610ffcd182e070 | TCPMv1/v2: Move PD & Partner type detection code to common file
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/usb_common.c",
"new_path": "common/usb_common.c",
"diff": "@@ -153,6 +153,27 @@ enum pd_cc_states pd_get_cc_state(\nreturn PD_CC_NONE;\n}\n+/**\n+ * This function checks the current CC status of the port partner\n+ * and returns true if the attached par... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv1/v2: Move PD & Partner type detection code to common file
BUG=b:148528713
BRANCH=none
TEST=make buildall -j
Change-Id: Icb9dfe998df889e8e2d6de7776d9889295115708
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2052644
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,377 | 06.02.2020 13:42:45 | 28,800 | 356f6719d9060523f8302eb93f67be97134831c7 | cr50_rma_open: port to python 3
BRANCH=none
TEST=run with python3 | [
{
"change_type": "MODIFY",
"old_path": "extra/cr50_rma_open/cr50_rma_open.py",
"new_path": "extra/cr50_rma_open/cr50_rma_open.py",
"diff": "-#!/usr/bin/env python2\n+#!/usr/bin/env python3\n+# -*- coding: utf-8 -*-\n# Copyright 2018 The Chromium OS Authors. All rights reserved.\n# Use of this source... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cr50_rma_open: port to python 3
BUG=b:149405690
BRANCH=none
TEST=run with python3
Change-Id: I42bcccec83c7c582450c0b599f46b3fbf0ab3f80
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2052268
Reviewed-by: Mike Frysinger <vapier@chromium.org>
Reviewed-by: Wai-Hong Tam <waihong@google.com> |
136,377 | 06.02.2020 14:08:38 | 28,800 | 63e6072b454d41e85fd3763abff412d73090ce2d | cr50_rma_open: fix linter errors
Fix errors from pylint. Use logging to print messages instead of print.
BRANCH=none
TEST=RMA open a device and enable testlab mode. | [
{
"change_type": "MODIFY",
"old_path": "extra/cr50_rma_open/cr50_rma_open.py",
"new_path": "extra/cr50_rma_open/cr50_rma_open.py",
"diff": "# found in the LICENSE file.\n# Used to access the cr50 console and handle RMA Open\n+\"\"\"Open cr50 using RMA authentication.\n-import argparse\n-import glob\... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cr50_rma_open: fix linter errors
Fix errors from pylint. Use logging to print messages instead of print.
BUG=b:149405690
BRANCH=none
TEST=RMA open a device and enable testlab mode.
Change-Id: I63a8b108b0f436291659f2f787ebcf72e8f4a523
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2052269
Reviewed-by: Mike Frysinger <vapier@chromium.org>
Reviewed-by: Wai-Hong Tam <waihong@google.com> |
136,427 | 13.02.2020 13:06:14 | 25,200 | 423d9e5462757de7d4d06a76ef031247fd1fecbe | zork: Sync GPIO changes
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "board/dalboz/gpio.inc",
"new_path": "board/dalboz/gpio.inc",
"diff": "@@ -54,7 +54,7 @@ GPIO(DP2_HPD, PIN(C, 1), GPIO_OUT_LOW) /* C1 DP Hotplug Detect */\nGPIO(LED_FULL_L, PIN(6, 0), GPIO_OUT_HIGH)\nGPIO(LED_CHRG_L, PIN(C, 0), GPIO_OUT_HIGH)\n-IOEX(USB_A0_RETI... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | zork: Sync GPIO changes
BUG=none
BRANCH=none
TEST=none
Change-Id: Iee187879822d3deb4c05d8022264bb1ff8f7b05a
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2055368
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org> |
136,324 | 13.02.2020 13:35:46 | 25,200 | 456412ee39b6ce107ebef65d8782b0469a0f6de5 | nct38xx: use tcpci rev 2 standard receive and transmit
BRANCH=none
TEST=verify charger is working | [
{
"change_type": "MODIFY",
"old_path": "baseboard/zork/baseboard.c",
"new_path": "baseboard/zork/baseboard.c",
"diff": "@@ -296,6 +296,7 @@ const struct tcpc_config_t tcpc_config[] = {\n.addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS,\n},\n.drv = &nct38xx_tcpm_drv,\n+ .flags = TCPC_FLAGS_TCPCI_V2_0,\n},\n[U... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | nct38xx: use tcpci rev 2 standard receive and transmit
BUG=b:149418834
BRANCH=none
TEST=verify charger is working
Change-Id: I31f2fedd7afece8303113ca1e1e74bbaf91de666
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2055763
Reviewed-by: Edward Hill <ecgh@chromium.org> |
136,234 | 22.01.2020 12:15:23 | 28,800 | d595bddb4c6576c9f5611d3a42c71424ebd3c1d7 | intelrvp: Correct build assert array size comparison
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "baseboard/intelrvp/bc12.c",
"new_path": "baseboard/intelrvp/bc12.c",
"diff": "/* BC1.2 chip Configuration */\n#ifdef CONFIG_BC12_DETECT_MAX14637\n-const struct max14637_config_t max14637_config[CONFIG_USB_PD_PORT_MAX_COUNT] = {\n+const struct max14637_config_t... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | intelrvp: Correct build assert array size comparison
BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: I8eab72a146dd410af4f5e5c056f3393766284c5e
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2055884
Reviewed-by: Abe Levkoy <alevkoy@chromium.org> |
136,427 | 30.01.2020 11:27:09 | 25,200 | fd5e9c3980c81098bd6dd84c7d927c779187f8a2 | zork: HPD for DB OPT1 HDMI
Add interrupt handler for HDMI_CONN_HPD_3V3_DB from IO expander on
DB OPT1 and connect to AP's DP1_HPD.
BRANCH=none
TEST=HDMI works with DB OPT1 | [
{
"change_type": "MODIFY",
"old_path": "baseboard/zork/baseboard.c",
"new_path": "baseboard/zork/baseboard.c",
"diff": "@@ -337,6 +337,9 @@ void baseboard_tcpc_init(void)\n/* Enable BC 1.2 interrupts */\ngpio_enable_interrupt(GPIO_USB_C0_BC12_INT_ODL);\ngpio_enable_interrupt(GPIO_USB_C1_BC12_INT_ODL... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | zork: HPD for DB OPT1 HDMI
Add interrupt handler for HDMI_CONN_HPD_3V3_DB from IO expander on
DB OPT1 and connect to AP's DP1_HPD.
BUG=b:146468190
BRANCH=none
TEST=HDMI works with DB OPT1
Change-Id: I2cfd1a630d046086594335a20c98ff77953f59eb
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2031651 |
136,427 | 06.02.2020 14:05:12 | 25,200 | ca2625eafcd3d22ffb65fb6bf7d7f8021c92fa21 | zork: HPD for DB OPT3 MST hub
Add interrupt handler for MST_HPD_OUT from IO expander on
DB OPT3 and connect to AP's DP1_HPD.
BRANCH=none
TEST=HDMI works with DB OPT3 | [
{
"change_type": "MODIFY",
"old_path": "baseboard/zork/baseboard.c",
"new_path": "baseboard/zork/baseboard.c",
"diff": "@@ -340,6 +340,7 @@ void baseboard_tcpc_init(void)\n/* Enable HPD interrupts */\nioex_enable_interrupt(IOEX_HDMI_CONN_HPD_3V3_DB);\n+ ioex_enable_interrupt(IOEX_MST_HPD_OUT);\n}\nD... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | zork: HPD for DB OPT3 MST hub
Add interrupt handler for MST_HPD_OUT from IO expander on
DB OPT3 and connect to AP's DP1_HPD.
BUG=b:146468096
BRANCH=none
TEST=HDMI works with DB OPT3
Change-Id: I60a7932f3eb03b90b94354ce809e0d5e09e15247
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2042680
Reviewed-by: Denis Brockus <dbrockus@chromium.org> |
136,324 | 07.02.2020 11:51:49 | 25,200 | c487d8ad9b1d6ce2fd1729ef16d218949236b2a3 | trembyle: enable TCPMv2 USB-C PD stack
Charging is now working with/without AP running in both
polarities.
BRANCH=none
TEST=Plug charger in Trembyle USB-C0/C1 | [
{
"change_type": "MODIFY",
"old_path": "baseboard/zork/baseboard.h",
"new_path": "baseboard/zork/baseboard.h",
"diff": "*/\n#define CONFIG_USB_PID 0x5040\n-#if 0\n+#if 1\n/* TODO(b/142284905): Enable the TCPMv2 PD stack */\n#define CONFIG_USB_PE_SM\n#define CONFIG_USB_PRL_SM\n#define CONFIG_USB_SM_F... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | trembyle: enable TCPMv2 USB-C PD stack
Charging is now working with/without AP running in both
polarities.
BUG=b:142284905
BRANCH=none
TEST=Plug charger in Trembyle USB-C0/C1
Change-Id: I94cd7181a20d44b182516633a5fc0913e78dd482
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1982361
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,427 | 14.02.2020 10:12:21 | 25,200 | 27e3b57d2f37edd49b04bfa89ca6dd9c14c6c1ea | dalboz/ezkinil: Connect up HPD interrupts
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "board/dalboz/gpio.inc",
"new_path": "board/dalboz/gpio.inc",
"diff": "@@ -54,6 +54,9 @@ GPIO(DP2_HPD, PIN(C, 1), GPIO_OUT_LOW) /* C1 DP Hotplug Detect */\nGPIO(LED_FULL_L, PIN(6, 0), GPIO_OUT_HIGH)\nGPIO(LED_CHRG_L, PIN(C, 0), GPIO_OUT_HIGH)\n+IOEX_INT(HDMI_CO... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | dalboz/ezkinil: Connect up HPD interrupts
BUG=none
BRANCH=none
TEST=none
Change-Id: Ic3fc8102b789cf9ac0baecfdeaa3fbeca2917001
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2057366
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org> |
136,443 | 07.01.2020 18:32:01 | 0 | 50847744a89591e7c4c867432dcc1b6d75feb087 | docs: Remove statement about disabling HW WP + reboot
BRANCH=nocturne,hatch
TEST=Remove HW WP and issue reboot_ec command
Tested-by: Craig Hesling | [
{
"change_type": "MODIFY",
"old_path": "docs/write_protection.md",
"new_path": "docs/write_protection.md",
"diff": "@@ -110,11 +110,6 @@ EC chips. However the common requirements are that software write protect can\nonly be disabled when hardware write protect is off and that the RO firmware\nmust b... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | docs: Remove statement about disabling HW WP + reboot
BRANCH=nocturne,hatch
BUG=none
TEST=Remove HW WP and issue reboot_ec command
Change-Id: I2430f3b08bc8136928e471dcb453cb0c779e3e77
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1989367
Tested-by: Craig Hesling <hesling@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Commit-Queue: Craig Hesling <hesling@chromium.org> |
136,418 | 14.02.2020 15:49:48 | 28,800 | 3128f5988eef8f1e61d76b1fd754f43d840322ca | sc7180, sdm845: Disable idle task deep sleep during sysjump
When sysjump to RW, the sleep mask is cleared. Should mask the AP_RUN
bit to prevent deep sleep.
BRANCH=None
TEST=Reboot EC/AP, sysjump to rw; checked dsleep AP_RUN bit set. | [
{
"change_type": "MODIFY",
"old_path": "power/sc7180.c",
"new_path": "power/sc7180.c",
"diff": "@@ -420,6 +420,8 @@ enum power_state power_chipset_init(void)\nif (power_get_signals() & IN_POWER_GOOD) {\nCPRINTS(\"SOC ON\");\ninit_power_state = POWER_S0;\n+ /* Disable idle task deep sleep when in S0 ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | sc7180, sdm845: Disable idle task deep sleep during sysjump
When sysjump to RW, the sleep mask is cleared. Should mask the AP_RUN
bit to prevent deep sleep.
BRANCH=None
BUG=b:149337916
TEST=Reboot EC/AP, sysjump to rw; checked dsleep AP_RUN bit set.
Change-Id: I7b11132eb464bf6d28432884b90ba292e7f56847
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2057971
Reviewed-by: Stephen Boyd <swboyd@chromium.org> |
136,282 | 18.02.2020 12:55:29 | -28,800 | 980b7bc18f1a1e32bb24c3238d93558a02e5fe99 | garg360: add covertible SKU ID (again)
BRANCH=octopus
TEST=make buildall -j
Tested-by: Henry Sun | [
{
"change_type": "MODIFY",
"old_path": "board/garg/board.c",
"new_path": "board/garg/board.c",
"diff": "@@ -210,10 +210,10 @@ unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors);\nstatic int board_is_convertible(void)\n{\n/*\n- * Garg360: 37\n+ * Garg360: 37, 38\n* Unprovisioned: 255\n*/\n... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | garg360: add covertible SKU ID (again)
BUG=b:146260545
BRANCH=octopus
TEST=make buildall -j
Change-Id: Ia50d31eb86adb35fbe93432612be848f0c45f7da
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2060262
Reviewed-by: Henry Sun <henrysun@google.com>
Commit-Queue: Henry Sun <henrysun@google.com>
Tested-by: Henry Sun <henrysun@google.com> |
136,234 | 12.02.2020 13:29:27 | 28,800 | b11e6ca471c53cd9bd43e7d8a761b34f2b9fda91 | TCPMv1/v2: Move resume_pd_port() to common file
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/usb_common.c",
"new_path": "common/usb_common.c",
"diff": "@@ -637,3 +637,25 @@ void pd_set_vbus_discharge(int port, int enable)\nmutex_unlock(&discharge_lock[port]);\n}\n#endif /* CONFIG_USB_PD_DISCHARGE */\n+\n+#ifdef CONFIG_USB_PD_TCPM_TCPCI\n+static... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv1/v2: Move resume_pd_port() to common file
BUG=b:148528713
BRANCH=none
TEST=make buildall -j
Change-Id: Ic965dd1622b6bc20fca6777d4c81f37661c6c886
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2052646
Reviewed-by: Diana Z <dzigterman@chromium.org> |
136,438 | 18.11.2019 16:11:31 | 28,800 | 80ca9dfa347a9af16607992b995133d99a5cce48 | chip/stm32: Add explanation for previous STOP mode bug.
Commit fixed a bug in STOP
mode. This commit adds more explanation of what was happening.
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "chip/stm32/clock-stm32h7.c",
"new_path": "chip/stm32/clock-stm32h7.c",
"diff": "*/\n#define LPTIM_PRESCALER_LOG2 2\n/*\n- * LPTIM_PRESCALER and LPTIM_PERIOD_US have to be signed, because we compare\n- * them to an int to decide whether to go to deep sleep. Sim... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | chip/stm32: Add explanation for previous STOP mode bug.
Commit a6c2477aca71c0dd3aed21d34009aecf056a6f4a fixed a bug in STOP
mode. This commit adds more explanation of what was happening.
BUG=b:140538084
BRANCH=none
TEST=none
Change-Id: Ibfca1884aef4fabf8f74238b3ff1f70d5e0da3dd
Signed-off-by: Yicheng Li <yichengli@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1922912
Reviewed-by: Craig Hesling <hesling@chromium.org> |
136,280 | 17.02.2020 15:03:01 | -28,800 | b1a2410cbde692ebe9c8ebf9e42552d938974752 | juniper: reduce bitbang failrate
apply CL:2050003 to juniper
TEST=make
BRANCH=kukui
Tested-by: Ting Shen | [
{
"change_type": "MODIFY",
"old_path": "board/jacuzzi/board.c",
"new_path": "board/jacuzzi/board.c",
"diff": "@@ -99,8 +99,8 @@ struct keyboard_scan_config keyscan_config = {\n.output_settle_us = 35,\n.debounce_down_us = 5 * MSEC,\n.debounce_up_us = 40 * MSEC,\n- .scan_period_us = 3 * MSEC,\n- .min_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | juniper: reduce bitbang failrate
apply CL:2050003 to juniper
BUG=b:149176366
TEST=make
BRANCH=kukui
Change-Id: I44fd20b11f64fe4b8cb5b4a47611ea1757a0b82f
Signed-off-by: Ting Shen <phoenixshen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2059858
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org> |
136,234 | 12.02.2020 14:57:41 | 28,800 | bcbc5db23753b91ae59abab78cc74a43a06a7a09 | TCPMv1/v2: Move pd_is_try_source_capable() to common file
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/usb_pd_dual_role.c",
"new_path": "common/usb_pd_dual_role.c",
"diff": "@@ -343,3 +343,51 @@ int pd_charge_from_device(uint16_t vid, uint16_t pid)\nreturn (vid == USB_VID_APPLE &&\n(pid == USB_PID1_APPLE || pid == USB_PID2_APPLE));\n}\n+\n+#ifdef CONFIG_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv1/v2: Move pd_is_try_source_capable() to common file
BUG=b:148528713
BRANCH=none
TEST=make buildall -j
Change-Id: I79f75d23f6091a264c11b4da6cf0cea26205df60
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2052648
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org> |
136,234 | 12.02.2020 13:40:06 | 28,800 | 0340484f40f22e3e26aaf490c292363be3697445 | TCPMv1/v2: Move pd_is_vbus_present() to common file
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/usb_common.c",
"new_path": "common/usb_common.c",
"diff": "@@ -659,3 +659,11 @@ void pd_deferred_resume(int port)\nhook_call_deferred(&resume_pd_port_data, 5 * SECOND);\n}\n#endif /* CONFIG_USB_PD_TCPM_TCPCI */\n+\n+int pd_is_vbus_present(int port)\n+{\... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv1/v2: Move pd_is_vbus_present() to common file
BUG=b:148528713
BRANCH=none
TEST=make buildall -j
Change-Id: I5fb9bda868961008db858a46b7898b5c58cdd922
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2052647
Reviewed-by: Denis Brockus <dbrockus@chromium.org> |
136,324 | 19.02.2020 14:09:58 | 25,200 | dcee461db54865980e6f1d59fa3ea4a216a94c0b | zork: enable usb-c FRSwap
Enabling FRSwap and removed the TODOs for enabling
TCPMv2 and FRSwap.
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "baseboard/zork/baseboard.h",
"new_path": "baseboard/zork/baseboard.h",
"diff": "*/\n#define CONFIG_USB_PID 0x5040\n-#if 1\n-/* TODO(b/142284905): Enable the TCPMv2 PD stack */\n+/* Enable the TCPMv2 PD stack */\n#define CONFIG_USB_PE_SM\n#define CONFIG_USB_PRL... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | zork: enable usb-c FRSwap
Enabling FRSwap and removed the TODOs for enabling
TCPMv2 and FRSwap.
BUG=b:146393213
BRANCH=none
TEST=make buildall -j
Change-Id: I9c7ad30d675011614d383c3b4cd8fb1384a68841
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2064542
Reviewed-by: Diana Z <dzigterman@chromium.org> |
136,269 | 19.02.2020 14:22:04 | 28,800 | 34aa18be4b636223988c54ce0882ccfdd5523bc7 | puff: Disable console command help to recover flash space
We're running out of flash space, so disable the console command help
strings since they're not strictly required.
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "board/puff/board.h",
"new_path": "board/puff/board.h",
"diff": "#undef CONFIG_CMD_MMAPINFO\n#endif\n+#undef CONFIG_CONSOLE_CMDHELP\n+\n/* Don't generate host command debug by default */\n#undef CONFIG_HOSTCMD_DEBUG_MODE\n#define CONFIG_HOSTCMD_DEBUG_MODE HCDEB... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | puff: Disable console command help to recover flash space
We're running out of flash space, so disable the console command help
strings since they're not strictly required.
BRANCH=none
BUG=b:146447208
TEST=make buildall -j
Change-Id: I3c3ce780aafc36bc0b355150d85cc5e4d93245ac
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2065492
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> |
136,356 | 14.02.2020 08:47:13 | -28,800 | f18b94ab43c8a7fce3aee0077c09fa5608924659 | Ezkinil: Add new SMP battery
new battery: Simplo 934QA017H/934QA017HB
remove the unused battery
BRANCH=none
TEST=Make sure battery can cutoff by console "cutoff" or "ectool cutoff"
and resume by plug in adapter. | [
{
"change_type": "MODIFY",
"old_path": "board/ezkinil/battery.c",
"new_path": "board/ezkinil/battery.c",
"diff": "* address, mask, and disconnect value need to be provided.\n*/\nconst struct board_batt_params board_battery_info[] = {\n- /* AP18F4M */\n- [BATTERY_AP18F4M] = {\n+ /* AP18C7M */\n+ [BAT... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Ezkinil: Add new SMP battery
new battery: Simplo 934QA017H/934QA017HB
remove the unused battery
BUG=b:148962537
BRANCH=none
TEST=Make sure battery can cutoff by console "cutoff" or "ectool cutoff"
and resume by plug in adapter.
Change-Id: Ib290b10918a8e721eb7b9d9b730a7549357bdd3f
Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2055265
Reviewed-by: Edward Hill <ecgh@chromium.org> |
136,250 | 21.02.2020 14:57:21 | 28,800 | 71f97f2c63ef5e7ad2d88645949efea26c23fb3f | ps8xxx: Only apply PS8751 DRP disabled CC status workaround to PS8751.
BRANCH=none
TEST=make buildall | [
{
"change_type": "MODIFY",
"old_path": "driver/tcpm/ps8xxx.c",
"new_path": "driver/tcpm/ps8xxx.c",
"diff": "@@ -259,18 +259,14 @@ static int ps8xxx_tcpm_init(int port)\nreturn ps8xxx_dci_disable(port);\n}\n-static int ps8xxx_get_cc(int port, enum tcpc_cc_voltage_status *cc1,\n- enum tcpc_cc_voltage_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | ps8xxx: Only apply PS8751 DRP disabled CC status workaround to PS8751.
BRANCH=none
BUG=b:147472779,b:147684491,b:148710467
TEST=make buildall
Change-Id: I8eed7bf86fe7c3e135517aaa31c3315128ca74e1
Signed-off-by: Matthew Blecker <matthewb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2068803
Reviewed-by: caveh jalali <caveh@chromium.org> |
136,234 | 12.02.2020 12:25:34 | 28,800 | 5f505564df053199fd93b6b29247d6510ac38321 | TCPMv1/v2: Move pd_set_polarity() to common file
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/usb_common.c",
"new_path": "common/usb_common.c",
"diff": "@@ -167,6 +167,14 @@ bool pd_is_debug_acc(int port)\ncc_state == PD_CC_DFP_DEBUG_ACC;\n}\n+void pd_set_polarity(int port, enum tcpc_cc_polarity polarity)\n+{\n+ tcpm_set_polarity(port, polarity)... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv1/v2: Move pd_set_polarity() to common file
BUG=b:148528713
BRANCH=none
TEST=make buildall -j
Change-Id: Idf6908bfc3e79a960a7de6e4249c2f50b41b56e6
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2052645
Reviewed-by: Diana Z <dzigterman@chromium.org> |
136,256 | 19.02.2020 09:06:07 | 25,200 | ab70d6a8b5b0f64bd3b826122da2a3b3ffd5c990 | iteflash: honor Ctrl+C signal
Ensure all configuration (e.g. CCD, FTDI, linux) abort
when Ctrl+c is pressed.
BRANCH=none
TEST=Verify the Ctrl+c quits when using linux driver
with C2D2 | [
{
"change_type": "MODIFY",
"old_path": "util/iteflash.c",
"new_path": "util/iteflash.c",
"diff": "@@ -172,6 +172,10 @@ static void config_release(struct iteflash_config *conf)\nstatic inline int i2c_byte_transfer(struct common_hnd *chnd, uint8_t addr,\nuint8_t *data, int write, int numbytes)\n{\n+ /... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | iteflash: honor Ctrl+C signal
Ensure all configuration (e.g. CCD, FTDI, linux) abort
when Ctrl+c is pressed.
BRANCH=none
BUG=none
TEST=Verify the Ctrl+c quits when using linux driver
with C2D2
Change-Id: Idc0555ae9689a118d9375f2b31f24cc7d1e61a4b
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2064591
Reviewed-by: Matthew Blecker <matthewb@chromium.org> |
136,256 | 18.02.2020 15:24:47 | 25,200 | b7de2bf7b2879d582f0c9878034e6f2bba55cbe5 | flash_ec: add pointer to iteflash.md
If we cannot find the linux i2c pseudo module then it
may have never been installed. The iteflash.md document
walks the users how to set up everything correctly.
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "util/flash_ec",
"new_path": "util/flash_ec",
"diff": "@@ -1153,7 +1153,8 @@ function dut_i2c_dev() {\nfalse\n); then\ndie \"Could not find servo I2C adapter. This could be because\"\\\n-\"the i2c-pseudo module was not loaded when servod was started.\"\n+\" the... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | flash_ec: add pointer to iteflash.md
If we cannot find the linux i2c pseudo module then it
may have never been installed. The iteflash.md document
walks the users how to set up everything correctly.
BRANCH=none
BUG=none
TEST=none
Change-Id: I97de487b2d495772d77d7d6085905be64cdf9ec5
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2064590
Reviewed-by: Matthew Blecker <matthewb@chromium.org> |
136,256 | 19.02.2020 09:33:09 | 25,200 | 7a9b2d8a7c83c087e40ddd9461408490b80ae400 | cleanup: move voltage rail detection to common
Single source the VDD rail sagging reset interrupt
Add VDD detection to C2D2 as well.
BRANCH=servo
TEST=builds | [
{
"change_type": "MODIFY",
"old_path": "board/c2d2/board.h",
"new_path": "board/c2d2/board.h",
"diff": "/* Options features */\n#define CONFIG_ADC\n+/*\n+ * See 'Programmable voltage detector characteristics' in the STM32F072x8\n+ * Datasheet. PVD Threshold 1 corresponds to a falling voltage thresho... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cleanup: move voltage rail detection to common
Single source the VDD rail sagging reset interrupt
Add VDD detection to C2D2 as well.
BRANCH=servo
BUG=none
TEST=builds
Change-Id: Iceac7d9fa7a9bde5a3c23c36e63b6d635d8812a3
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2064593
Reviewed-by: Diana Z <dzigterman@chromium.org> |
136,368 | 24.02.2020 08:51:03 | 28,800 | f6ee241a55abb590917cb8ffbf13c22f2f52bc57 | TCPMv1/v2: Move hex8tou32 and remote_flashing to common file
BRANCH=none
TEST=make buildall -j
Tested-by: Sam Hurst | [
{
"change_type": "MODIFY",
"old_path": "common/usb_common.c",
"new_path": "common/usb_common.c",
"diff": "#define CPRINTF(format, args...)\n#endif\n+#if defined(CONFIG_CMD_PD) && defined(CONFIG_CMD_PD_FLASH)\n+int hex8tou32(char *str, uint32_t *val)\n+{\n+ char *ptr = str;\n+ uint32_t tmp = 0;\n+\n+... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TCPMv1/v2: Move hex8tou32 and remote_flashing to common file
BUG=chromium:1021235
BRANCH=none
TEST=make buildall -j
Signed-off-by: Sam Hurst <shurst@google.com>
Change-Id: Ia243d5062c77d8f6b8299fbd131cabfdbcffb01e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2070452
Tested-by: Sam Hurst <shurst@google.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Sam Hurst <shurst@google.com> |
136,330 | 18.02.2020 15:07:12 | 25,200 | a188f90f7e815b6175771c22c47ee35863471dad | docs: Minor formatting fixes
TEST=Observed rendered MD
BRANCH=none | [
{
"change_type": "MODIFY",
"old_path": "docs/code_reviews.md",
"new_path": "docs/code_reviews.md",
"diff": "# Code Reviews\n-The platform/ec repository makes use of a code review system that tries to\n-evenly distributed code reviews among available reviewers.\n+The `platform/ec` repository makes us... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | docs: Minor formatting fixes
BUG=none
TEST=Observed rendered MD
BRANCH=none
Change-Id: Iab52f7759028dae68b592ec59b7712a0b04344c7
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2062990
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Jett Rink <jettrink@chromium.org> |
136,269 | 10.12.2019 13:18:26 | 28,800 | 7f3f2782e5d058df2b249757baac2aa50f73a6aa | docs: Add unit test documentation
BRANCH=none
TEST=view in gitiles | [
{
"change_type": "MODIFY",
"old_path": "docs/fingerprint/fingerprint.md",
"new_path": "docs/fingerprint/fingerprint.md",
"diff": "@@ -95,23 +95,7 @@ prevent you from uploading.\n## Building and running unit tests\n-List available unit tests:\n-\n-```bash\n-(chroot) ~/trunk/src/platform/ec $ make pri... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | docs: Add unit test documentation
BRANCH=none
BUG=none
TEST=view in gitiles
Change-Id: I4c282ed8bb831afa534e1c40bc619cd8e6d772ad
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1958255
Commit-Queue: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org> |
136,443 | 14.02.2020 14:08:51 | 28,800 | 5ee54edfd520ce1a447cf0b04d1fcdf3f618188e | nocturne_fp: Beautify gpio.inc
This has no functional change, as verified with compare_builds.sh.
BRANCH=nocturne,hatch
TEST=./util/compare_build.sh -b nocturne_fp | [
{
"change_type": "MODIFY",
"old_path": "board/nocturne_fp/gpio.inc",
"new_path": "board/nocturne_fp/gpio.inc",
"diff": "@@ -11,13 +11,11 @@ GPIO_INT(SPI1_NSS, PIN(A, 4), GPIO_INPUT, spi_event)\nGPIO_INT(PCH_SLP_S0_L, PIN(D,13), GPIO_INT_BOTH, slp_event)\nGPIO_INT(PCH_SLP_S3_L, PIN(A,11), GPIO_INT_BO... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | nocturne_fp: Beautify gpio.inc
This has no functional change, as verified with compare_builds.sh.
BRANCH=nocturne,hatch
BUG=none
TEST=./util/compare_build.sh -b nocturne_fp
Change-Id: If0fab353f85c7e61c9556cfdd23d37649420df06
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2057497
Reviewed-by: Tom Hughes <tomhughes@chromium.org> |
136,443 | 17.02.2020 18:49:39 | 28,800 | 1707e1ea83a9df8162c18321fc5a529d38f58870 | nucleo-dartmonkey: Add fingerprint support
This adds the support for the fingerprint sensor
and fingerprint system.
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "board/nucleo-dartmonkey/board.c",
"new_path": "board/nucleo-dartmonkey/board.c",
"diff": "@@ -50,11 +50,38 @@ static void slp_event(enum gpio_signal signal)\nhook_call_deferred(&ap_deferred_data, 0);\n}\n+#ifndef HAS_TASK_FPSENSOR\n+void fps_event(enum gpio_si... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | nucleo-dartmonkey: Add fingerprint support
This adds the support for the fingerprint sensor
and fingerprint system.
BRANCH=none
BUG=b:130296790
TEST=none
Change-Id: Ib6a555f0b0a5fd30487dbf8c314096de3e4f2fcf
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2061349 |
136,305 | 14.02.2020 12:56:04 | 25,200 | 2696c706b8b97f28dfc5448687f168e9225cc61f | TUSB544: Add driver
Driver code for the TUSB544 redriver
BRANCH=None
TEST=builds | [
{
"change_type": "MODIFY",
"old_path": "driver/build.mk",
"new_path": "driver/build.mk",
"diff": "@@ -143,6 +143,7 @@ driver-$(CONFIG_USBC_RETIMER_NB7V904M)+=retimer/nb7v904m.o\ndriver-$(CONFIG_USBC_RETIMER_PI3DPX1207)+=retimer/pi3dpx1207.o\ndriver-$(CONFIG_USBC_RETIMER_PS8802)+=retimer/ps8802.o\ndr... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | TUSB544: Add driver
Driver code for the TUSB544 redriver
BRANCH=None
BUG=b:149561847
TEST=builds
Change-Id: I391d6d264ff9d326c2d45569124dd1366f892812
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2062766
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,330 | 06.02.2020 14:15:08 | 25,200 | c55731350c4dcd5c9be3beaeb502603c3f317b6c | usb_set_suspend: Use "enable" consistently
The port is enabled when suspend is not enabled and vice versa. Avoid
confusing these idioms.
TEST=make buildall
BRANCH=none | [
{
"change_type": "MODIFY",
"old_path": "common/usb_pd_protocol.c",
"new_path": "common/usb_pd_protocol.c",
"diff": "@@ -4939,20 +4939,20 @@ static void pd_control_resume(int port)\n}\n/*\n- * (enable=1) request pd_task transition to the suspended state. hang\n+ * (suspend=1) request pd_task transiti... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | usb_set_suspend: Use "enable" consistently
The port is enabled when suspend is not enabled and vice versa. Avoid
confusing these idioms.
BUG=none
TEST=make buildall
BRANCH=none
Change-Id: I3063793334ac875afee8a176f96625e8903d2694
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2057979
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,427 | 25.02.2020 14:53:22 | 25,200 | 4baea4e432c476e66d1defb81391ce982e3cdfd8 | zork: Create baseboard variants for trembyle/dalboz
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "baseboard/zork/baseboard.c",
"new_path": "baseboard/zork/baseboard.c",
"diff": "#include \"driver/ppc/nx20p348x.h\"\n#include \"driver/retimer/pi3dpx1207.h\"\n#include \"driver/retimer/ps8802.h\"\n-#include \"driver/retimer/ps8811.h\"\n#include \"driver/retime... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | zork: Create baseboard variants for trembyle/dalboz
BUG=b:150110428
BRANCH=none
TEST=none
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: I30503a0416325fc8573a4a62b3bc3ff943b5008e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2071390
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org> |
136,427 | 25.02.2020 15:24:14 | 25,200 | 331de6dbdf9b024d4c3f6e183df868d3f7cabac2 | zork: Move fan into variant_trembyle.c
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "baseboard/zork/baseboard.c",
"new_path": "baseboard/zork/baseboard.c",
"diff": "#include \"driver/usb_mux/amd_fp5.h\"\n#include \"ec_commands.h\"\n#include \"extpower.h\"\n-#include \"fan.h\"\n-#include \"fan_chip.h\"\n#include \"gpio.h\"\n#include \"hooks.h\"... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | zork: Move fan into variant_trembyle.c
BUG=b:147297680
BRANCH=none
TEST=none
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: Icc77e0d27db794b1aed0d65c7d30de3ccc3747ca
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2071391
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org> |
136,427 | 26.02.2020 14:27:23 | 25,200 | 29918a71d3622f9c9da9a4db37bb1843ce8f3284 | dalboz: update GPIOs
BRANCH=none
TEST=able to boot dalboz AP | [
{
"change_type": "MODIFY",
"old_path": "baseboard/zork/baseboard.c",
"new_path": "baseboard/zork/baseboard.c",
"diff": "@@ -315,7 +315,9 @@ void baseboard_tcpc_init(void)\n/* Enable HPD interrupts */\nioex_enable_interrupt(IOEX_HDMI_CONN_HPD_3V3_DB);\n+#ifdef VARIANT_ZORK_TREMBYLE\nioex_enable_inter... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | dalboz: update GPIOs
BUG=b:147297680
BRANCH=none
TEST=able to boot dalboz AP
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: I4a3ec2a77292e48672f5c6143990c36b9a80b6a6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2073277
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org> |
136,427 | 21.02.2020 10:49:19 | 25,200 | 701ffebc0b0242de0d9f9af1ed8ae9f3285f1b5e | tcpmv2: Add names for super states
Add names for super states to pe_state_names and tc_state_names,
and BUILD_ASSERT that all states are named.
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "common/usbc/usb_pe_drp_sm.c",
"new_path": "common/usbc/usb_pe_drp_sm.c",
"diff": "@@ -272,6 +272,8 @@ static const char * const pe_state_names[] = {\n[PE_WAIT_FOR_ERROR_RECOVERY] = \"PE_Wait_For_Error_Recovery\",\n[PE_BIST] = \"PE_Bist\",\n[PE_DR_SNK_GET_SINK_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | tcpmv2: Add names for super states
Add names for super states to pe_state_names and tc_state_names,
and BUILD_ASSERT that all states are named.
BUG=none
BRANCH=none
TEST=none
Change-Id: Iad77ff2e04f761e28169d9e11db328ca5fdb3727
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2068529
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org> |
136,427 | 21.02.2020 10:55:32 | 25,200 | dd453ede19a1a2e9a13b1c85b209b4c7e93d0467 | usb_prl_sm: Add state names for debugging
Add state names for prl_tx_states, prl_hr_states, rch_states, tch_states
to test_prl_sm_data.
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "common/usbc/usb_prl_sm.c",
"new_path": "common/usbc/usb_prl_sm.c",
"diff": "@@ -135,7 +135,6 @@ static const struct usb_state prl_hr_states[];\nstatic const struct usb_state rch_states[];\nstatic const struct usb_state tch_states[];\n-\n/* Chunked Rx State Mac... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | usb_prl_sm: Add state names for debugging
Add state names for prl_tx_states, prl_hr_states, rch_states, tch_states
to test_prl_sm_data.
BUG=none
BRANCH=none
TEST=none
Change-Id: I1c929fccafc49448dcc58d2235cd7c6e0adf6167
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2068530
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org> |
136,338 | 25.02.2020 16:27:22 | 25,200 | 0dff5a752b3796c73bf29919d7d13f03204bc0f3 | chip/npcx/lpc: Set bit 5 when sending AUX responses.
The linux kernel expects bit 5 to be set in the status register when the
output buffer contains and AUX packet.
BRANCH=none
TEST=Verified bit 5 is set when sending aux packets | [
{
"change_type": "MODIFY",
"old_path": "chip/npcx/lpc.c",
"new_path": "chip/npcx/lpc.c",
"diff": "#include \"gpio.h\"\n#include \"hooks.h\"\n#include \"host_command.h\"\n+#include \"i8042_protocol.h\"\n#include \"keyboard_protocol.h\"\n#include \"lpc.h\"\n#include \"lpc_chip.h\"\n@@ -316,6 +317,7 @@... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | chip/npcx/lpc: Set bit 5 when sending AUX responses.
The linux kernel expects bit 5 to be set in the status register when the
output buffer contains and AUX packet.
BUG=b:145575366
BRANCH=none
TEST=Verified bit 5 is set when sending aux packets
Change-Id: I0d3944ea6fd04224d9f9bcf0e1b0b3c8633ad786
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2073281
Reviewed-by: Edward Hill <ecgh@chromium.org> |
136,338 | 25.02.2020 16:36:35 | 25,200 | 621cc6985400e77dbc5bfe1724a12baa4899641d | common/keyboard_8042: Rename i8042_irq_enabled
Rename i8042_irq_enabled to i8042_keyboard_irq_enabled to avoid
confusion when adding i8042_aux_irq_enabled.
BRANCH=none
TEST=Build test | [
{
"change_type": "MODIFY",
"old_path": "common/keyboard_8042.c",
"new_path": "common/keyboard_8042.c",
"diff": "@@ -94,7 +94,7 @@ struct host_byte {\n*/\nstatic struct queue const from_host = QUEUE_NULL(8, struct host_byte);\n-static int i8042_irq_enabled;\n+static int i8042_keyboard_irq_enabled;\n/... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | common/keyboard_8042: Rename i8042_irq_enabled
Rename i8042_irq_enabled to i8042_keyboard_irq_enabled to avoid
confusion when adding i8042_aux_irq_enabled.
BUG=b:145575366
BRANCH=none
TEST=Build test
Change-Id: I031bf941faf80d99a01bf2a3834f61b5040f7674
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2073283
Reviewed-by: Edward Hill <ecgh@chromium.org> |
136,338 | 25.02.2020 16:43:27 | 25,200 | 782d71645f713bbce7021a0d3bd75ef1345297b0 | common/keyboard_8042: Track aux chan enable and aux irq enable
Start tracking these so we can correctly filter mouse messages.
BRANCH=none
TEST=Verified 8042 command prints current state | [
{
"change_type": "MODIFY",
"old_path": "common/keyboard_8042.c",
"new_path": "common/keyboard_8042.c",
"diff": "@@ -95,9 +95,11 @@ struct host_byte {\nstatic struct queue const from_host = QUEUE_NULL(8, struct host_byte);\nstatic int i8042_keyboard_irq_enabled;\n+static int i8042_aux_irq_enabled;\n/... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | common/keyboard_8042: Track aux chan enable and aux irq enable
Start tracking these so we can correctly filter mouse messages.
BUG=b:145575366
BRANCH=none
TEST=Verified 8042 command prints current state
Change-Id: I8a5fe3c66196d961c3a1adbb7355532de5ac0dc9
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2073284
Reviewed-by: Edward Hill <ecgh@chromium.org> |
136,436 | 27.02.2020 13:43:10 | 28,800 | f2aadfb231eba35d43d8e619c21ed0b2644af8c9 | hatch: Enable extpwrlimit option in ectool
BRANCH=hatch
TEST=ectool extpwrlimit 3000 5000
Tested-by: Shelley Chen | [
{
"change_type": "MODIFY",
"old_path": "baseboard/hatch/baseboard.h",
"new_path": "baseboard/hatch/baseboard.h",
"diff": "/* Common charger defines */\n#define CONFIG_CHARGE_MANAGER\n+#define CONFIG_CHARGE_MANAGER_EXTERNAL_POWER_LIMIT\n#define CONFIG_CHARGER\n#define CONFIG_CHARGER_BQ25710\n#define ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | hatch: Enable extpwrlimit option in ectool
BUG=b:149997506
BRANCH=hatch
TEST=ectool extpwrlimit 3000 5000
Signed-off-by: Shelley Chen <shchen@google.com>
Change-Id: Ie133ac518f1a290ef04610a56c1d104d60254ac2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2079358
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Commit-Queue: Shelley Chen <shchen@chromium.org>
Tested-by: Shelley Chen <shchen@chromium.org> |
136,436 | 27.02.2020 13:53:52 | 28,800 | c9f2a4db18e0c38a2cf1934a2d69043922866d3b | nami: Enable extpwrlimit option in ectool
BRANCH=nami
TEST=ectool extpwrlimit 3000 5000
Tested-by: Shelley Chen | [
{
"change_type": "MODIFY",
"old_path": "board/nami/board.h",
"new_path": "board/nami/board.h",
"diff": "/* Charger */\n#define CONFIG_CHARGE_MANAGER\n#define CONFIG_CHARGE_RAMP_HW /* This, or just RAMP? */\n-\n+#define CONFIG_CHARGE_MANAGER_EXTERNAL_POWER_LIMIT\n#define CONFIG_CHARGER\n#define CONFI... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | nami: Enable extpwrlimit option in ectool
BUG=b:149997506
BRANCH=nami
TEST=ectool extpwrlimit 3000 5000
Signed-off-by: Shelley Chen <shchen@google.com>
Change-Id: I34da082b8475ae4b200586d604ad653186fc5299
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2079359
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Shelley Chen <shchen@chromium.org>
Tested-by: Shelley Chen <shchen@chromium.org> |
136,269 | 26.02.2020 16:24:07 | 28,800 | 359601479790a2fc83cea483a54530712e648670 | docs/fingerprint: Add instructions for adding private repo
BRANCH=none
TEST=view in gitiles
Tested-by: Craig Hesling | [
{
"change_type": "MODIFY",
"old_path": "docs/fingerprint/fingerprint-dev-for-partners.md",
"new_path": "docs/fingerprint/fingerprint-dev-for-partners.md",
"diff": "@@ -373,7 +373,30 @@ If your partnership agreement requires non-public code sharing you will need to\nregister for an account on the [In... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | docs/fingerprint: Add instructions for adding private repo
BRANCH=none
BUG=b:147702944
TEST=view in gitiles
Change-Id: I6262b47b0438fe34aee6a3c562198e1ee41b6f83
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2076583
Tested-by: Craig Hesling <hesling@chromium.org>
Reviewed-by: Craig Hesling <hesling@chromium.org> |
136,427 | 28.02.2020 12:14:49 | 25,200 | 7345fbc90603f8d0d9161dc18e5579487b346593 | zork: Split mux/retimer for trembyle/dalboz
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "baseboard/zork/baseboard.c",
"new_path": "baseboard/zork/baseboard.c",
"diff": "#include \"driver/charger/isl9241.h\"\n#include \"driver/ppc/aoz1380.h\"\n#include \"driver/ppc/nx20p348x.h\"\n-#include \"driver/retimer/pi3dpx1207.h\"\n-#include \"driver/retimer... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | zork: Split mux/retimer for trembyle/dalboz
BUG=b:150099043 b:150384642
BRANCH=none
TEST=none
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: Ica9eda3f9d6a1332319b5c7ba56c0881d05eeebd
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2079353
Reviewed-by: Denis Brockus <dbrockus@chromium.org> |
136,427 | 28.02.2020 13:28:44 | 25,200 | 7453e9b1f8515df35ceb141a771d049001f55d61 | PS8740: Allow 0xa or 0xb for REVISION_ID2
BRANCH=none
TEST=ps874x_init succeeds on Dalboz | [
{
"change_type": "MODIFY",
"old_path": "driver/usb_mux/ps874x.c",
"new_path": "driver/usb_mux/ps874x.c",
"diff": "@@ -27,7 +27,8 @@ static inline int ps874x_write(const struct usb_mux *me,\nstatic int ps874x_init(const struct usb_mux *me)\n{\n- int val;\n+ int id1;\n+ int id2;\nint res;\n/* Reset ch... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | PS8740: Allow 0xa or 0xb for REVISION_ID2
BUG=b:150384642
BRANCH=none
TEST=ps874x_init succeeds on Dalboz
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: I9213a1f12d2412db4d38eaf75daaa27507787e90
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2080644
Reviewed-by: Denis Brockus <dbrockus@chromium.org> |
136,338 | 27.02.2020 14:09:04 | 25,200 | 3d82db55bb854c2e596d4f52d5b58e32c53ca8b6 | common/keyboard_8042: Update kblog while holding mutex
i8042_send_to_host can be called from multiple tasks. Make sure we don't
mix up or lose any kblog entries.
BRANCH=none
TEST=Built and saw kblog is still populated. | [
{
"change_type": "MODIFY",
"old_path": "common/keyboard_8042.c",
"new_path": "common/keyboard_8042.c",
"diff": "@@ -252,11 +252,12 @@ static void i8042_send_to_host(int len, const uint8_t *bytes,\nint i;\nstruct data_byte data;\n+ /* Enqueue output data if there's space */\n+ mutex_lock(&to_host_mut... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | common/keyboard_8042: Update kblog while holding mutex
i8042_send_to_host can be called from multiple tasks. Make sure we don't
mix up or lose any kblog entries.
BUG=b:145575366
BRANCH=none
TEST=Built and saw kblog is still populated.
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I5d036f6db4c829c2071850c1ec92f74a24b135b7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2079692
Reviewed-by: Edward Hill <ecgh@chromium.org> |
136,338 | 27.02.2020 14:15:04 | 25,200 | 1066c43cb64399e75d810cd0b6d126c0d153407d | common/keyboard_8042: Add logging to keyboard_clear_buffer
It's useful to know when the buffer has been cleared.
BRANCH=none
TEST=Saw x in kblog | [
{
"change_type": "MODIFY",
"old_path": "common/keyboard_8042.c",
"new_path": "common/keyboard_8042.c",
"diff": "@@ -173,6 +173,8 @@ struct kblog_t {\n* k = to-host queue head pointer before byte dequeued\n* K = byte actually sent to host via LPC\n*\n+ * x = to_host queue was cleared\n+ *\n* The to-h... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | common/keyboard_8042: Add logging to keyboard_clear_buffer
It's useful to know when the buffer has been cleared.
BUG=b:145575366
BRANCH=none
TEST=Saw x in kblog
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I1c3474687c91a3e017d7a7a0e4e7967c3fb10f05
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2079693
Reviewed-by: Edward Hill <ecgh@chromium.org> |
136,338 | 27.02.2020 15:29:58 | 25,200 | 7a24cedd6f815e359c0032b548950cf62b754fd9 | board/morphius: Enable PS/2 Mouse
BRANCH=none
TEST=Verified mouse was enumerated in the kernel
[ 19.329499] input: PS/2 Generic Mouse as /devices/platform/i8042/serio1/input/input4 | [
{
"change_type": "MODIFY",
"old_path": "board/morphius/board.c",
"new_path": "board/morphius/board.c",
"diff": "#include \"fan.h\"\n#include \"fan_chip.h\"\n#include \"hooks.h\"\n+#include \"keyboard_8042.h\"\n#include \"lid_switch.h\"\n#include \"power.h\"\n#include \"power_button.h\"\n+#include \"... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | board/morphius: Enable PS/2 Mouse
BUG=b:145575366
BRANCH=none
TEST=Verified mouse was enumerated in the kernel
[ 19.329499] input: PS/2 Generic Mouse as /devices/platform/i8042/serio1/input/input4
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I95f446f95902892df470dc1b9ad17dbc5b8b8b87
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2079696
Reviewed-by: Edward Hill <ecgh@chromium.org> |
136,331 | 02.03.2020 15:26:55 | 25,200 | b148719adf763dc4c50f1fa5f6c4f6185b5182b2 | motion_sense: simple typo correction (CONIFG_ -> CONFIG)
TEST=none
BRANCH=none | [
{
"change_type": "MODIFY",
"old_path": "common/motion_sense.c",
"new_path": "common/motion_sense.c",
"diff": "@@ -1801,5 +1801,5 @@ static int command_accelspoof(int argc, char **argv)\nDECLARE_CONSOLE_COMMAND(accelspoof, command_accelspoof,\n\"id [on/off] [X] [Y] [Z]\",\n\"Enable/Disable spoofing o... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | motion_sense: simple typo correction (CONIFG_ -> CONFIG)
BUG=none
TEST=none
BRANCH=none
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: If62d1c4dc74000c1a4bd021c0c42e7bd2371ac81
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2083584
Reviewed-by: Denis Brockus <dbrockus@chromium.org> |
136,446 | 28.02.2020 13:16:46 | 28,800 | efbc14d8265fcee2e7de749d7f925c051607e3c2 | common/keyboard_scan: Enable the SEARCH key in the default mask
The SEARCH key on is now standard on Chromeos keyboards.
Lets enable it by default.
TEST=Build
BRANCH=firmware-hatch-12672.B | [
{
"change_type": "MODIFY",
"old_path": "common/keyboard_scan.c",
"new_path": "common/keyboard_scan.c",
"diff": "@@ -63,7 +63,7 @@ struct keyboard_scan_config keyscan_config = {\n.min_post_scan_delay_us = 1000,\n.poll_timeout_us = 100 * MSEC,\n.actual_key_mask = {\n- 0x14, 0xff, 0xff, 0xff, 0xff, 0xf... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | common/keyboard_scan: Enable the SEARCH key in the default mask
The SEARCH key on Row-3, Col-0 is now standard on Chromeos keyboards.
Lets enable it by default.
BUG=b:148488560,b:146501925
TEST=Build
BRANCH=firmware-hatch-12672.B
Signed-off-by: Rajat Jain <rajatja@google.com>
Change-Id: I9164a7e2894d70599a2c2eb25ecb2408e3b1eebe
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2080599
Reviewed-by: Scott Collyer <scollyer@chromium.org> |
136,446 | 28.01.2020 16:11:50 | 28,800 | b678a6ff46846883a9b5adb8e16b40adaefa738c | hatch/baseboard: Enable the Search key button in mask
Enable the search key located at
TEST=Check search key while debugging
BRANCH=firmware-hatch-12672.B | [
{
"change_type": "MODIFY",
"old_path": "baseboard/hatch/baseboard.c",
"new_path": "baseboard/hatch/baseboard.c",
"diff": "@@ -64,7 +64,7 @@ struct keyboard_scan_config keyscan_config = {\n.min_post_scan_delay_us = 1000,\n.poll_timeout_us = 100 * MSEC,\n.actual_key_mask = {\n- 0x14, 0xff, 0xff, 0xff,... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | hatch/baseboard: Enable the Search key button in mask
Enable the search key located at Row-3, Col-0
BUG=b:146501925,b:148488560
TEST=Check search key while debugging
BRANCH=firmware-hatch-12672.B
Signed-off-by: Rajat Jain <rajatja@google.com>
Change-Id: I3496d6413994f147839fbb29f6d666b5fc6c0914
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2080600
Reviewed-by: Scott Collyer <scollyer@chromium.org> |
136,405 | 28.02.2020 10:28:39 | 28,800 | 9d3f321689ddcdc0989842055292aeb4e8d6f811 | system: Rename SYSTEM_IMAGE_RW to EC_IMAGE_RW
This is left out from CL:2036599.
BRANCH=none
TEST=build helios with EFS2 enabled. | [
{
"change_type": "MODIFY",
"old_path": "common/vboot/efs2.c",
"new_path": "common/vboot/efs2.c",
"diff": "@@ -208,7 +208,7 @@ static void verify_and_jump(void)\nenable_pd();\nbreak;\ncase CR50_COMM_SUCCESS:\n- rv = system_run_image_copy(SYSTEM_IMAGE_RW);\n+ rv = system_run_image_copy(EC_IMAGE_RW);\n... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | system: Rename SYSTEM_IMAGE_RW to EC_IMAGE_RW
This is left out from CL:2036599.
BUG=none
BRANCH=none
TEST=build helios with EFS2 enabled.
Signed-off-by: dnojiri <dnojiri@chromium.org>
Change-Id: Iaf70443b89f0db155c2569b5e80b80879e9ea087
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2080129
Reviewed-by: Tom Hughes <tomhughes@chromium.org> |
136,208 | 26.02.2020 16:38:55 | -28,800 | 8bd1645dd4c3777db7070702711c3445b365ebb4 | servo_v4: print PD-comm capability with cc command
Support to print the PD-comm information for FAFT.
BRANCH=servo
TEST=ensure cc print the correct output at SNK/SRC roles
Cq-Depend: chromium:2072543, chromium:2073423 | [
{
"change_type": "MODIFY",
"old_path": "board/servo_v4/usb_pd_policy.c",
"new_path": "board/servo_v4/usb_pd_policy.c",
"diff": "@@ -797,6 +797,7 @@ static void print_cc_mode(void)\nccprintf(\"drp enabled: %s\\n\", cc_config & CC_ENABLE_DRP ? \"on\" : \"off\");\nccprintf(\"cc polarity: %s\\n\", cc_co... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | servo_v4: print PD-comm capability with cc command
Support to print the PD-comm information for FAFT.
BRANCH=servo
BUG=b:150185455
TEST=ensure cc print the correct output at SNK/SRC roles
Cq-Depend: chromium:2072543, chromium:2073423
Change-Id: Ia8c8a373eaab31a13f70e3422bf6dafcc27f92f1
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2072567
Reviewed-by: Wai-Hong Tam <waihong@google.com> |
136,443 | 04.03.2020 04:23:24 | 0 | fc6d829790908f0fde4e2b2bebb3a3d6703cfe89 | getversion.sh: Add cryptoc git hash for fingerprint
BRANCH=none
TEST=make BOARD=dartmonkey && strings build/dartmonkey/ec.bin | grep dart | [
{
"change_type": "MODIFY",
"old_path": "util/getversion.sh",
"new_path": "util/getversion.sh",
"diff": "@@ -105,6 +105,9 @@ main() {\ndir_list+=( ../../third_party/tpm2 ../../third_party/cryptoc )\n;;\n(*_fp|dartmonkey|bloonchipper)\n+ if [[ -d ../../third_party/cryptoc ]]; then\n+ dir_list+=( ../..... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | getversion.sh: Add cryptoc git hash for fingerprint
BRANCH=none
BUG=none
TEST=make BOARD=dartmonkey && strings build/dartmonkey/ec.bin | grep dart
Signed-off-by: Craig Hesling <hesling@chromium.org>
Change-Id: I845a6b72ca2489f8a89d9a856820300af0375e32
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2086556
Reviewed-by: Tom Hughes <tomhughes@chromium.org> |
136,345 | 04.03.2020 17:12:07 | -39,600 | 82bad86fbe1f8c1adc78873602b319a8bf31020e | puff: Use a 2k stack for the hostcmd task.
EC_CMD_EFS_VERIFY causes a stack overflow. Use a 2k stack for the
hostcmd task like fizz to avoid this.
TEST=puff can sync RW EC and boot
BRANCH=none | [
{
"change_type": "MODIFY",
"old_path": "board/puff/ec.tasklist",
"new_path": "board/puff/ec.tasklist",
"diff": "TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \\\nTASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \\\nTASK_NOTEST(PDCMD, pd_command_task, NULL, TASK_STACK_SI... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | puff: Use a 2k stack for the hostcmd task.
EC_CMD_EFS_VERIFY causes a stack overflow. Use a 2k stack for the
hostcmd task like fizz to avoid this.
BUG=b:150742950
TEST=puff can sync RW EC and boot
BRANCH=none
Signed-off-by: Sam McNally <sammc@chromium.org>
Change-Id: I8defe34a4ae2a7c5f8276e9caa73295794ac2db7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2086390
Reviewed-by: Peter Marheine <pmarheine@chromium.org> |
136,234 | 04.03.2020 10:49:33 | 28,800 | 5e9b1c805b2b13d998fb65506ff3a214c8bfd8d3 | bb_retimer: Set Data_Connection_Present bit in Safe mode
BRANCH=none
TEST=Data_Connection_Present is set in safe mode on Volteer | [
{
"change_type": "MODIFY",
"old_path": "driver/retimer/bb_retimer.c",
"new_path": "driver/retimer/bb_retimer.c",
"diff": "#define BB_RETIMER_WRITE_SIZE (BB_RETIMER_REG_SIZE + 2)\n#define BB_RETIMER_MUX_DATA_PRESENT (USB_PD_MUX_USB_ENABLED \\\n| USB_PD_MUX_DP_ENABLED \\\n+ | USB_PD_MUX_SAFE_MODE \\\n... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | bb_retimer: Set Data_Connection_Present bit in Safe mode
BUG=b:150764332
BRANCH=none
TEST=Data_Connection_Present is set in safe mode on Volteer
Change-Id: Ib00ab10d2527636d9e6342de937477a72625f8bf
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2087902
Reviewed-by: Keith Short <keithshort@chromium.org> |
136,356 | 04.03.2020 08:55:13 | -28,800 | 8d0e7f50a6330a11ae5b3ecdd32ff4ad6425b552 | Ezkinil: Add battery information
LGC battery MPPACEEASW1C
BRANCH=none
TEST=Make sure battery can cutoff by console "cutoff" or "ectool cutoff"
and resume by plug in adapter. | [
{
"change_type": "MODIFY",
"old_path": "board/ezkinil/battery.c",
"new_path": "board/ezkinil/battery.c",
"diff": "* address, mask, and disconnect value need to be provided.\n*/\nconst struct board_batt_params board_battery_info[] = {\n+ /* AP19B8M */\n+ [BATTERY_AP19B8M] = {\n+ .fuel_gauge = {\n+ .m... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Ezkinil: Add battery information
LGC battery MPPACEEASW1C
BUG=b:150666053
BRANCH=none
TEST=Make sure battery can cutoff by console "cutoff" or "ectool cutoff"
and resume by plug in adapter.
Change-Id: If536d66d0eb86c1e90a768f3661dc9ddec3d1183
Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2086381
Reviewed-by: Edward Hill <ecgh@chromium.org> |
136,256 | 05.03.2020 13:11:40 | 25,200 | 816e70e25f5a311310e4851b329ae792a35e3872 | c2d2: update AP/AUX I2C to correct alternate func
Fix copy and paste error, the I2C2 pins are alternate function 1 instead
of 2.
BRANCH=servo
TEST=`i2cscan 1` on C2D2 console shows i2c CLK and SDA traffic | [
{
"change_type": "MODIFY",
"old_path": "board/c2d2/gpio.inc",
"new_path": "board/c2d2/gpio.inc",
"diff": "@@ -43,7 +43,7 @@ ALTERNATE(PIN_MASK(A, GENMASK(15, 14)), 1, MODULE_UART, 0) /* USART2: PA14/PA15\nALTERNATE(PIN_MASK(B, GENMASK( 7, 6)), 2, MODULE_I2C_TIMERS, 0)\nALTERNATE(PIN_MASK(B, GENMASK(... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | c2d2: update AP/AUX I2C to correct alternate func
Fix copy and paste error, the I2C2 pins are alternate function 1 instead
of 2.
BRANCH=servo
BUG=b:147381671
TEST=`i2cscan 1` on C2D2 console shows i2c CLK and SDA traffic
Change-Id: I2739be429bc0924814ca6124f74132062e7bda1b
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2090083
Reviewed-by: David Schneider <dnschneid@chromium.org> |
136,437 | 05.03.2020 19:37:25 | -28,800 | cfd2561f5fa4d3d9044c34bd2ba082b4da88028f | dalboz: add FSUSB42UMX driver
Add FSUSB42UMX support. This chip is used as SBU mux of usb
c0 port.
BRANCH=none
TEST=build dalboz ec successfully. | [
{
"change_type": "MODIFY",
"old_path": "baseboard/zork/variant_dalboz.c",
"new_path": "baseboard/zork/variant_dalboz.c",
"diff": "@@ -24,12 +24,47 @@ static void usba_retimer_off(void)\n}\nDECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, usba_retimer_off, HOOK_PRIO_DEFAULT);\n+/*\n+ * USB C0 port SBU mux use sta... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | dalboz: add FSUSB42UMX driver
Add FSUSB42UMX support. This chip is used as SBU mux of usb
c0 port.
BUG=b:150398913
BRANCH=none
TEST=build dalboz ec successfully.
Change-Id: Ibd58c252b7e1256891df0626a0a7fb5292a9da84
Signed-off-by: Paul Ma <magf@bitland.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2089213
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org> |
136,377 | 06.03.2020 13:37:12 | 28,800 | 4bdb7d9889371ca8ae74599cead640a254ed7b0d | ccd_howtos: add test_that command
Add a test_that command to show how we run tests locally.
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "docs/ccd_howtos.md",
"new_path": "docs/ccd_howtos.md",
"diff": "@@ -190,7 +190,15 @@ is not a clamshell, check out the [full dev mode instructions].\nchroot > dut-control ec_board\n-13. **Debug Setup**\n+13. **Try running a test** Use autotest_dir, so you don'... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | ccd_howtos: add test_that command
Add a test_that command to show how we run tests locally.
BUG=none
BRANCH=none
TEST=none
Change-Id: I04d1a5d96c03b1cdceff6677e64893498837ea88
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2092202
Reviewed-by: Shelley Chen <shchen@chromium.org> |
136,340 | 03.03.2020 10:42:22 | 28,800 | c015cff5060e8e113780245bee601eb03afcb602 | ec_commands.h: add info_4 in sensor request structure
Fixes: ("common: Add feature flag for online calibration")
TEST=compile
BRANCH=none | [
{
"change_type": "MODIFY",
"old_path": "include/ec_commands.h",
"new_path": "include/ec_commands.h",
"diff": "@@ -2715,7 +2715,7 @@ struct ec_params_motion_sense {\n*/\nstruct __ec_todo_unpacked {\nuint8_t sensor_num;\n- } info, info_3, data, fifo_flush, list_activities;\n+ } info, info_3, info_4, d... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | ec_commands.h: add info_4 in sensor request structure
Fixes: 267da3cfc ("common: Add feature flag for online calibration")
BUG=chromium:1023858
TEST=compile
BRANCH=none
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Change-Id: I7e7784e509062f28c8dc12d52fe8daed2ab73b23
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2084398
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,257 | 05.03.2020 10:34:21 | -28,800 | 9bdfa3ab066418ef84644c344727bd481a73466b | damu: add initial led support
Enable battery and power LED.
Note: LED settings will be fine tune after we receive board.
BRANCH=kukui
TEST=make -j BOARD=damu
TEST=make buildall | [
{
"change_type": "MODIFY",
"old_path": "board/damu/board.h",
"new_path": "board/damu/board.h",
"diff": "#define CONFIG_USB_MUX_IT5205\n+#define CONFIG_LED_ONOFF_STATES\n+#define CONFIG_LED_POWER_LED\n+#define CONFIG_LED_COMMON\n+\n/* Motion Sensors */\n#ifdef SECTION_IS_RW\n#define CONFIG_MAG_BMI160... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | damu: add initial led support
Enable battery and power LED.
Note: LED settings will be fine tune after we receive board.
BUG=b:147163799, b:147192374
BRANCH=kukui
TEST=make -j BOARD=damu
TEST=make buildall
Signed-off-by: Scott Chao <scott.chao@bitland.corp-partner.google.com>
Change-Id: I012abd5f4b745015e5265abfa215cf4d1c092e81
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2087436
Reviewed-by: Eric Yilun Lin <yllin@chromium.org> |
136,269 | 06.03.2020 17:15:29 | 28,800 | 97c73303cf9d5f6c8b6e871ddebd01a8e4ce4206 | driver/fingerprint: Clarify FPC 1145 hardware ID
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "driver/fingerprint/fpc/libfp/fpc1145_private.h",
"new_path": "driver/fingerprint/fpc/libfp/fpc1145_private.h",
"diff": "#include <stdint.h>\n-/* The 16-bit hardware ID is 0x140y */\n+/**\n+ * The hardware ID is 16-bits. All 114x FPC sensors (including FPC1145)... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | driver/fingerprint: Clarify FPC 1145 hardware ID
BRANCH=none
BUG=b:150407388
TEST=make buildall -j
Change-Id: Id0e7b42affcabf90c94334603a40b87cbc9543a8
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2092913
Commit-Queue: Craig Hesling <hesling@chromium.org>
Reviewed-by: Andrey Perminov <andrey.perminov@fingerprints.com>
Reviewed-by: Craig Hesling <hesling@chromium.org> |
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