text stringlengths 59 71.4k |
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#include <bits/stdc++.h> using namespace std; int main() { int test, i, k, j, sum1, sum, n, p; cin >> test; for (i = 0; i < test; i++) { cin >> n >> k; sum = 0; sum1 = 0; vector<int> v1, v2; for (j = 0; j < n; j++) { cin >> p; v1.push_back(p); } ... |
/*
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law... |
module check (input unsigned [22:0] a, b, c);
wire unsigned [22:0] int_AB;
assign int_AB = a / b;
always @(a, b, int_AB, c) begin
#1;
if (int_AB !== c) begin
$display("ERROR");
$finish;
end
end
endmodule
module stimulus (output reg unsigned [22:0] A, B);
parameter MAX = 1 << 23;
parameter S ... |
`timescale 1ns/10ps
module PLL108_0002(
// interface 'refclk'
input wire refclk,
// interface 'reset'
input wire rst,
// interface 'outclk0'
output wire outclk_0,
// interface 'locked'
output wire locked
);
altera_pll #(
.fractional_vco_multiplier("true"),
.reference_clock_frequency("50.0 MHz"),
.o... |
/*
-- ============================================================================
-- FILE NAME : if_reg.v
-- DESCRIPTION : IF¥¹¥Æ©`¥¸¥Ñ¥¤¥×¥é¥¤¥ó¥ì¥¸¥¹¥¿
-- ----------------------------------------------------------------------------
-- Revision Date Coding_by Comment
-- 1.0.0 2011/06/27 suito ÐÂÒ×÷³É... |
`timescale 1ns / 1ps
`include "def.v"
module OSECPU(clk, reset, dr, cr, pc);
input clk;
input reset;
output reg [31:0] dr = 0;
output [15:0] pc;
output [7:0] cr;
//
wire [31:0] alu_d0, alu_d1, alu_dout;
wire [3:0] alu_op;
wire alu_iscmp;
//
wire [5:0] ireg_rw, ireg_r0, ireg_r1;
wire [31:0] ireg_d0, ireg_d1,... |
#include <bits/stdc++.h> using namespace std; long long n, ans; string str; long long solve() { cin >> n >> str; long long x = -1, y = -1; long long i = 0; while (i < n) { if (str[i] == 1 ) { x = i; break; } i++; } i = n - 1; while (i >= 0) { ... |
`timescale 1ns / 1ps
/*
* Simple Brainfuck CPU in Verilog.
* Copyright (C) 2011 Sergey Gridasov <>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
*... |
///////////////////////////////////////////////////////////////////////////////
// (c) Copyright 2008 Xilinx, Inc. All rights reserved.
//
// This file contains confidential and proprietary information
// of Xilinx, Inc. and is protected under U.S. and
// international copyright and other intellectual property
//... |
#include <bits/stdc++.h> using namespace std; const int N = 1e5; int n, k, a[N]; long long seg[4 * N + 4], dp[N + 1][12]; void update(int p, int l, int r, int indx, long long val) { if (l == r) { seg[p] = val; return; } int mid = l + (r - l) / 2; if (indx <= mid) update(p * 2... |
#include <bits/stdc++.h> using namespace std; int n, k; int id[105]; int A[105]; int B[105]; long long dp[77][77]; bool check(int left, int right, int pos1, int pos2) { for (int i = 0; i < k; i++) { if (A[i] == pos1) { if (B[i] == pos2 && id[i] == 1) return false; if (B[i] <= lef... |
#include <bits/stdc++.h> long long INF = (long long)1e18; struct node { int n; double rat; }; bool operator<(const node& n1, const node& n2) { return n1.rat > n2.rat; } std::vector<int> edge[100010]; int ch[100010], ne[100010]; int main() { int x, a, b, k, n, m, q, t, num, in = 0, to, i; d... |
// Copyright (C) 1991-2015 Altera Corporation. All rights reserved.
// Your use of Altera Corporation's design tools, logic functions
// and other software and tools, and its AMPP partner logic
// functions, and any output files from any of the foregoing
// (including device programming or simulation files), and any... |
#include <bits/stdc++.h> using namespace std; const int maxn = 1e5 + 10; vector<int> v[maxn]; int ma = 0; int h = 0; int f = 0; int root = 0; int g[maxn]; bool mark[maxn]; void dfs(int k) { if (mark[k] == false) { mark[k] = true; } else { return; } for (int i = 0; i < v[k... |
#include <bits/stdc++.h> using namespace std; int main() { int len; string s; cin >> len; cin >> s; vector<char> vect; while (len != 0) { if (len % 2 == 1) { vect.push_back(s[0]); } else { vect.insert(vect.begin(), s[0]); } s.erase(0, 1); len = s... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
module dv_elink_tb();
parameter AW=32;
parameter DW=32;
parameter CW=2; //number of clocks to send int
parameter MW=104;
parameter MAW=10;
parameter MD=1<<MAW;//limit test to 1K transactions
//TODO:generealize
/* verilator lint_off STMTDLY */
/* verilator lint_off UNOPTFLAT *... |
#include <bits/stdc++.h> using namespace std; const int maxn = 1000005; int n; char s1[maxn], s2[maxn]; int main() { scanf( %d%s%s , &n, s1 + 1, s2 + 1); reverse(s1 + 1, s1 + n); for (int i = 1; i < n; ++i) { if (s1[i] == N ) s1[i] = S ; else if (s1[i] == S ) s1[i] =... |
#include <bits/stdc++.h> int a[100 + 10]; int main() { int n, m, min_, max_; scanf( %d %d %d %d , &n, &m, &min_, &max_); int i, j, t = 0; for (i = 0; i < m; i++) { scanf( %d , &a[i]); } for (i = 0; i < m; i++) { for (j = i + 1; j < m; j++) { if (a[j] < a[i]) { t... |
#include <bits/stdc++.h> using namespace std; inline int in() { int x, y; y = scanf( %d , &x); return x; } const int N = -1; int main() { int X = in(), d = in(); vector<long long> v; v.push_back(0); int b = 0; while (X) { if (X % 2) { v.push_back(v.back() + d); ... |
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed into the Public Domain, for any use,
// without warranty, 2009 by Wilson Snyder.
module t (/*AUTOARG*/
// Inputs
clk
);
input clk;
logic use_AnB;
logic [1:0] active_command [8:0];
logic [1:0] command_A [8:0]... |
#include <bits/stdc++.h> using namespace std; const int64_t INF = 0x3f3f3f3f; const int64_t INFLL = 0x3f3f3f3f3f3f3f3f; const int64_t MOD = 1e9 + 7; const double EPS = 1e-9; const double PI = acos(-1); mt19937 rng(chrono::steady_clock::now().time_since_epoch().count()); int64_t rand(int64_t x, int64_t y... |
// testbench_8.v
////////////////////////////////////////////////////////////////////////////////
// CPU testbench using the suggested program of lab 8
////////////////////////////////////////////////////////////////////////////////
// Dimitrios Paraschas ()
///////////////////////////////////////////////////////////... |
/*
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law... |
#include <bits/stdc++.h> using namespace std; const int N = 100 + 10; int a[N]; int main() { int n; scanf( %d , &n); for (int i = 0; i < n + n; i++) scanf( %d , &a[i]); sort(a, a + n + n); if (a[n] > a[n - 1]) puts( YES ); else puts( NO ); return 0; } |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
/*
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law... |
#include <bits/stdc++.h> int b[1010]; double dp[1010][1010]; int main() { int n, m, i, j, x, y; double ans = 0; scanf( %d%d , &n, &m); for (i = 0; i < n; i++) scanf( %d , &b[i]); for (i = 0; i < n; i++) { for (j = 0; j < n; j++) { if (b[i] > b[j]) dp[i][j] = 1; ... |
#include <bits/stdc++.h> template <typename T> void MACRO_VAR_Scan(T& t) { std::cin >> t; } template <typename First, typename... Rest> void MACRO_VAR_Scan(First& first, Rest&... rest) { std::cin >> first; MACRO_VAR_Scan(rest...); } template <typename T> void MACRO_VEC_ROW_Init(int n, T& t) ... |
#include <bits/stdc++.h> using namespace std; int main() { int n, m; cin >> n >> m; if (n == 1 && m == 2) { cout << 0 << endl; cout << 1 << << 1 << endl; cout << 1 << << 2 << endl; cout << 1 << << 1 << endl; return 0; } if (n == 2 && m == 1) { cout... |
#include <bits/stdc++.h> using namespace std; int main() { string s1, s2; cin >> s1 >> s2; int n = s1.length(), k = 0, s; for (int i = 0; i < n; i++) if (s1[i] != s2[i]) k++; if (k % 2 == 1) printf( impossible ); else { int s = k / 2; string ans; for (int i = 0;... |
/*
* Rx_Header Module
* Author: Benjamin Huntsman
*
* This module controls the receiving and appropriate transimission of the
* TLP Header. This module is instantiated in the Rx_Engine and will control
* the loading of the TLP header into the Tx_Header_FIFO and into registers
* that will be holding the header d... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
/*
* Copyright (c) 2006 Stephen Williams ()
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* ... |
#include <bits/stdc++.h> using namespace std; pair<double, double> midpoint(double x1, double y1, double x2, double y2) { return {(x1 + x2) / 2, (y1 + y2) / 2}; } int main() { ios_base::sync_with_stdio(0); cin.tie(0); cout.tie(0); int n; cin >> n; map<pair<double, double>, int> mp; ... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
#include <bits/stdc++.h> using namespace std; int main() { int n, b; cin >> n >> b; vector<int> arr(n); for (int i = 0; i < n; i++) { cin >> arr[i]; } vector<int> s; for (int i = 0; i < n - 1; i++) { if (arr[i] <= b) { int m = INT_MIN; for (int j = i + 1; j < ... |
/*******************************************************************************
* This file is owned and controlled by Xilinx and must be used solely *
* for design, simulation, implementation and creation of design files *
* limited to Xilinx devices or technologies. Use with non-Xilinx ... |
#include <bits/stdc++.h> using namespace std; int main() { ios_base::sync_with_stdio(0); cin.tie(0); long long t, v; cin >> t >> v; long long a[t]; for (int i = 0; i < t; i++) cin >> a[i]; long long minx = 0; sort(a, a + t); for (int z = 0; z < t - 1; z++) { minx = max(a[z ... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
#include <bits/stdc++.h> using namespace std; int a[20][110], b[20][110], c[20][110]; vector<int> res; int main() { int n, m, k; scanf( %d%d%d , &n, &m, &k); for (int i = 0; i < n; i++) { char st[15]; scanf( %s , st); for (int j = 0; j < m; j++) scanf( %d%d%d , &a[i][j], &b[i][j], ... |
// This tests SystemVerilog interfaces
//
// This file ONLY is placed into the Public Domain, for any use,
// without warranty, 2012 by Iztok Jeras.
module test ();
// error counter
bit err = 0;
logic clk = 1'b1;
logic rst = 1'b1; // reset
integer rst_cnt = 0;
// clock generator
always #5 ... |
#include <bits/stdc++.h> using namespace std; int n, m; int t[107][107]; int mini; int a; int maxi; int main() { scanf( %d%d , &n, &m); for (int i = 1; i <= n; i++) { mini = 1000000009; for (int j = 1; j <= m; j++) { scanf( %d , &a); if (a < mini) { mini = a; ... |
/**
* This is written by Zhiyang Ong
* and Andrew Mattheisen
* for EE577b Troy WideWord Processor Project
*/
/**
* Reference:
* Nestoras Tzartzanis, EE 577B Verilog Example, Jan 25, 1996
* http://www-scf.usc.edu/~ee577/tutorial/verilog/counter.v
*/
// Behavioral model for the 32-bit program counter
module ... |
#include <bits/stdc++.h> using namespace std; const int ss = 1000; int n, k, ans, x; bool flag1, flag2; bool a[5000][5000]; int b[1002], tot; int main() { scanf( %d%d , &n, &k); memset(a, false, sizeof(a)); memset(b, false, sizeof(b)); flag1 = flag2 = false; n += ss; for (int i = 1... |
#include <bits/stdc++.h> int main() { int n, x_num; x_num = 0; std::string x; std::cin >> n; for (int i = 0; i < n; i++) { std::cin >> x; if (x.substr(0, 2) == -- || x.substr(1, 2) == -- ) x_num--; else x_num++; } std::cout << x_num; return 0; } ... |
// File: write_pointerTBV.v
// Generated by MyHDL 0.10
// Date: Mon Aug 27 20:09:01 2018
`timescale 1ns/10ps
module write_pointerTBV (
);
// myHDL->Verilog Testbench for `write_pointer module`
reg wr = 0;
reg fifo_full = 0;
wire [4:0] wptr;
wire fifo_we;
reg clk = 0;
reg rst_n = 0;
wire write_pointer0_0_fifo_we_... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
#include <bits/stdc++.h> using namespace std; int main() { int a; cin >> a; vector<int> s(6); for (int i = 0; i < 6; i++) { if ((1 << i) & a) s[i]++; } int res = 0; res += (16 * s[0]); res += (2 * s[1]); res += (8 * s[2]); res += (4 * s[3]); res += s[4]; res += ... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
#include <bits/stdc++.h> using namespace std; const int N = 10005; int gcd(int a, int b) { return !b ? a : gcd(b, a % b); } int T, n, A, B, C, cnt, p[N], mu[N], du[N], fe[N], tot; long long a[N], b[N], c[N]; bool np[N]; void init() { mu[1] = 1; for (int i = 2; i <= n; i++) { if (!np[i]) p[++... |
#include <bits/stdc++.h> using namespace std; const long long N = 1e6 + 5; const long long MOD = 1e9 + 7; long long n, ct; long long a[N], vis[N]; vector<long long> g[N]; void dfs(long long k) { if (vis[k]) return; vis[k] = 1; ct++; for (auto it : g[k]) dfs(it); } int32_t main() { ... |
#include <bits/stdc++.h> using namespace std; long long n, m; long long x, y, z; vector<pair<long long, long long> > v[200005]; long long dp[300]; bool used[2000005]; long long len[100005]; void dfs(long long x) { used[x] = true; for (long long i = 0; i < v[x].size(); ++i) { long long to =... |
#include <bits/stdc++.h> using namespace std; int main() { int t; long long int n, ans, c = 1, i; cin >> t; while (t--) { cin >> n; c = 1, ans = 0, i = 1; while (n > 0) { if (n <= 4) { if (i % 2 != 0) { ans = ans + max(c, n - 1); } else ... |
/*
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law... |
/*------------------------------------------------------------------------------
* This code was generated by Spiral Multiplier Block Generator, www.spiral.net
* Copyright (c) 2006, Carnegie Mellon University
* All rights reserved.
* The code is distributed under a BSD style license
* (see http://www.opensource.or... |
module not_32(
input [31:0] a, //input value
output [31:0] out //output value
);
//output is the inverse of a
assign out[0] = !a[0];
assign out[1] = !a[1];
assign out[2] = !a[2];
assign out[3] = !a[3];
assign out[4] = !a[4];
assign out[5] = !a[5];
assign out[6] = !a[6];
assign out[7] ... |
(** * Extraction: Extracting ML from Coq *)
(** * Basic Extraction *)
(** In its simplest form, program extraction from Coq is completely straightforward. *)
(** First we say what language we want to extract into. Options are OCaml (the
most mature), Haskell (which mostly works), and Scheme (a bit out
of ... |
#include <bits/stdc++.h> using namespace std; void err(istream_iterator<string> it) { cerr << endl; } template <typename T, typename... Args> void err(istream_iterator<string> it, T a, Args... args) { cerr << *it << = << a << , ; err(++it, args...); } namespace fastIO { bool IOerror = 0; ... |
// megafunction wizard: %ROM: 1-PORT%VBB%
// GENERATION: STANDARD
// VERSION: WM1.0
// MODULE: altsyncram
// ============================================================
// File Name: ninjasymbol.v
// Megafunction Name(s):
// altsyncram
//
// Simulation Library Files(s):
// altera_mf
// ========================... |
`timescale 1ns / 1ps
//扫描计数器，异步复位高有效
module display_cnt_3bit(input reset, input display_clk,
output reg [2:0] display_cnt_3bit_num);
always @( posedge reset or posedge display_clk) begin
if ( reset) display_cnt_3bit_num <= 0;
else display_cnt_3bit_num <= display_cnt_3bit... |
#include <bits/stdc++.h> using namespace std; long long fact[(long long)(1e6 + 10)], mod_inv[(long long)(1e6 + 10)]; long long _pow(long long a, long long n) { if (n == 0) return 1; if (n % 2 == 1) return (a * _pow(a, n - 1)) % (long long)(1e9 + 7); long long x = _pow(a, n / 2) % (long long)(1e9 + 7);... |
/*!
* <b>Module:</b>clock_inverter
* @file clock_inverter.v
* @date 2016-02-11
* @author Andrey Filippov
*
* @brief Glitch-free clock controlled inverter
*
* @copyright Copyright (c) 2016 Elphel, Inc .
*
* <b>License:</b>
*
* clock_inverter.v is free software; you can redistribute it and/or modify
*... |
module simuart(input wire clk,
input wire cs,
input wire [31:0] bus_addr,
input wire [31:0] bus_wr_val,
input wire [3:0] bus_bytesel,
output reg bus_ack,
output reg [31:0] bus_data,
output reg inter,
input wire intack
);
task write_dat... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
#include <bits/stdc++.h> using namespace std; template <typename F, typename S> ostream& operator<<(ostream& os, const pair<F, S>& p) { return os << ( << p.first << , << p.second << ) ; } template <class T> ostream& operator<<(ostream& os, vector<T> const& x) { os << { ; for (auto& y : x... |
#include <bits/stdc++.h> using namespace std; const double Pi = acos(-1.0); const int MAXN = 1e6 + 5; int n, m, t; int v[MAXN]; char s[MAXN]; int main() { cin >> t; while (t--) { cin >> n >> s + 1; int sum1 = 0, sum2 = 0, now = 0; for (int i = 1; i <= n * 2; i++) { if (s[... |
#include <bits/stdc++.h> template <typename T> void MACRO_VAR_Scan(T& t) { std::cin >> t; } template <typename First, typename... Rest> void MACRO_VAR_Scan(First& first, Rest&... rest) { std::cin >> first; MACRO_VAR_Scan(rest...); } template <typename T> void MACRO_VEC_ROW_Init(int n, T& t) ... |
/*******************************************************************************
* This file is owned and controlled by Xilinx and must be used *
* solely for design, simulation, implementation and creation of *
* design files limited to Xilinx devices or technologies. Use ... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
#include <bits/stdc++.h> using namespace std; double us1[210]; double us2[210]; int deal(double *us, int s, int e, int p) { int flag = 0; for (int i = 1; i <= 200; i++) { if (us[i] < 1e-4 / 200.) continue; double dd = us[i] * (100 - p) / 100.; dd /= (e - s + 1); us[i] = us[i] / 1... |
#include <bits/stdc++.h> using namespace std; int z[1000005]; string s; void z_function() { int n = (int)s.length(); for (int i = 0; i < n; i++) z[i] = 0; for (int i = 1, l = 0, r = 0; i < n; ++i) { if (i <= r) z[i] = min(r - i + 1, z[i - l]); while (i + z[i] < n && s[z[i]] == s[i + z[i]... |
module FrameTrans(Reset,Clock100M,Mode,Clock,DataIn);
input Reset;
input Clock100M;
input [1:0] Mode;
output Clock;
output reg DataIn;
reg [31:0] Counter;
reg Clk_10ms;
reg [7:0] StateCnt256;
reg [1:0] FrameCnt4;
reg FrameStart;
reg ScrambEn;
wire ScrambOut;
parameter ... |
/*
Copyright (c) 2014 Alex Forencich
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, s... |
// Copyright (c) 2002 Michael Ruff (mruff at chiaro.com)
// Michael Runyan (mrunyan at chiaro.com)
//
// This source code is free software; you can redistribute it
// and/or modify it in source code form under the terms of the GNU
// General Public License as published by the Free Software
/... |
`timescale 10ns/1ps
module main(
input clk_pin_i,
input rst_pin_i,
output[7:0] led_o
);
// Logic analyzer part
// -------------------
// This block consists of ICON controller, with 2 submodules: logic analyzer
// (ILA) nad GPIO module (VIO). They use la_ctl0 and la_ctl1 busses
// respectively.
wire[35:0] la_ctl0;
... |
#include <bits/stdc++.h> using namespace std; long long a[100005], dist[100005], sad[100005], subt[100005], ans = 0LL; vector<pair<long long, long long> > adj[100005]; void dfs(long long node, long long par, long long min_vertex) { if (par != -1) sad[node] = (a[node] < dist[node] - dist[min_vertex]); mi... |
// nios_tester_mm_interconnect_0_avalon_st_adapter_003.v
// This file was auto-generated from altera_avalon_st_adapter_hw.tcl. If you edit it your changes
// will probably be lost.
//
// Generated using ACDS version 15.1 185
`timescale 1 ps / 1 ps
module nios_tester_mm_interconnect_0_avalon_st_adapter_003 #(
para... |
module tail_offset (ir, toff_0_0, toff_1_0, toff_2_0, toff_3_0, toff_4_0, toff_5_0, toff_6_0, toff_7_0, toff_8_0, toff_9_0, toff_10_0, toff_11_0, toff_12_0, toff_13_0, toff_14_0, toff_15_0);
input [63:0] ir;
output [3:0] toff_0_0, toff_1_0, toff_2_0, toff_3_0, toff_4_0, toff_5_0, toff_6_0, toff_7_0, toff_8_0, toff_9_0... |
#include <bits/stdc++.h> using namespace std; int N; long long gMin = 1e12, gMax = -1e12, rMin = 1e12, rMax = -1e12, bMin = 1e12, bMax = -1e12, lasty = -1e12, ret = 0; vector<long long> notGreen[2]; int main() { ios_base::sync_with_stdio(0); cin.tie(0); cout << fixed << setprecision(18... |
#include <bits/stdc++.h> using namespace std; const long long MAX = 1000000000000000000; long long mod = 1000000000; long double pi = 3.141592653589793238; void pls() { ios_base::sync_with_stdio(0); cin.tie(0); cout.tie(0); } long long n, k, d; vector<vector<int>> res; void backtrack(vecto... |
// Author: Hugues CREUSY
// February 2004
// Verilog model
// project: M25P40 25 MHz,
// release: 1.1
// These Verilog HDL models are provided "as is" without warranty
// of any kind, included but not limited to, implied warranty
// of merchantability and fitness for a particular purpose.
`times... |
#include <bits/stdc++.h> using namespace std; void setIO(string s = ) { ios_base::sync_with_stdio(0); cin.tie(0); if ((int)s.size()) { freopen((s + .in ).c_str(), r , stdin); freopen((s + .out ).c_str(), w , stdout); } } int main() { setIO(); int n; string s; ci... |
#include <bits/stdc++.h> using namespace std; const int INF = (int)1e9; const int maxN = 1.1e4; vector<int> g[maxN]; map<string, int> m[maxN]; int len = 1; void add(int v, string s) { if (m[v][s] == 0) { m[v][s] = len; g[v].push_back(len); len++; } } void parse(string s) { ... |
#include <bits/stdc++.h> using namespace std; template <class T> inline void getar(T a, int n, int m) { for (int i = 0; i < n; i++) for (int j = 0; j < m; ++j) { scanf( %d , &a[i][j]); } } inline void getar(int *a, int n) { for (int ii = 0; ii < n; ii++) { scanf( %d , a + ii)... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
#include <bits/stdc++.h> using namespace std; int main() { double d, h, v, e; cin >> d >> h >> v >> e; double ans = 3.14159265359 * d * d * h / (4 * v - 3.14159265359 * d * d * e); if (ans < 0) cout << NO << n ; else { cout.precision(17); cout << YES ... |
#include <bits/stdc++.h> template <typename T> inline void read(T &x) { char c; bool nega = 0; while ((!isdigit(c = getchar())) && (c != - )) ; if (c == - ) { nega = 1; c = getchar(); } x = c - 48; while (isdigit(c = getchar())) x = x * 10 + c - 48; if (nega) x = ... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
#include <bits/stdc++.h> using namespace std; int main() { long long n, a, b; cin >> n; if (n == 1) { cout << 9 8 << endl; } else { cout << n * 3 << << n * 2 << endl; } return 0; } |
#include <bits/stdc++.h> using namespace std; const long long INF = 1e18; struct custom_hash { static uint64_t splitmix64(uint64_t x) { x += 0x9e3779b97f4a7c15; x = (x ^ (x >> 30)) * 0xbf58476d1ce4e5b9; x = (x ^ (x >> 27)) * 0x94d049bb133111eb; return x ^ (x >> 31); } size_t op... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
#include <bits/stdc++.h> using namespace std; string s[2005]; char str[2005][2005]; int a[2005][2005]; int v[2005][2005]; long long dp[8005][2005]; int pool[8005], top = 0; int child[8005]; int ID = 0, n; int getID() { return pool[--top]; } void pre() { for (int i = 8000; i >= 0; i--) pool[top... |
// ==============================================================
// File generated by Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC
// Version: 2017.2
// Copyright (C) 1986-2017 Xilinx, Inc. All Rights Reserved.
//
// ==============================================================
`timescale 1 ... |
#include <bits/stdc++.h> using namespace std; using ll = long long; const ll MOD = 1e9 + 7, N = 1e5 + 10; int32_t main() { ios::sync_with_stdio(false); cin.tie(NULL); ll a[3]; cin >> a[0] >> a[1] >> a[2]; cout << First << endl; vector<ll> b(3); iota(b.begin(), b.end(), 0); sort... |
module alu16(
input clk,rst,
input [2:0] operator, // will depend on operatorSize
input [15:0] op1,op2,
output reg [15:0] out, status
);
`define numBits 16
`define operatorSize 4
//wire [0:`operatorSize - 1] operator;
//wire signed [0:`numBits - 1] op1,op2;
//reg [0:`numBits - 1] out, status;
... |
// Sequential Modules
module latch(
input d,
output reg q,
input clk
);
always @(clk)
q <= d;
endmodule
module flip_flop(
input d,
output reg q,
input clk
);
always @(posedge clk)
q <= d;
endmodule
// Testbenches for sequential logic
// Testbench for... |
#include <bits/stdc++.h> #pragma GCC optimize( O3 ) using namespace std; const int N = 200031; int n, m, a[N], b[N]; vector<int> g[N]; int used[N]; int dep[N]; vector<int> this_comp; vector<pair<int, int> > order; vector<pair<int, pair<int, int> > > solution; int par[N]; int in_st[N]; int used... |
#include <bits/stdc++.h> using namespace std; int n; string s; set<vector<int> > DP[10001]; bool R[4]; int main() { cin >> n; cin >> s; for (int i = 0; i < s.size(); i++) if (s[i] == G ) s[i] = 0 ; else if (s[i] == S ) s[i] = 1 ; else if (s[i] == H ) ... |
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