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#include <bits/stdc++.h> using namespace std; const long double eps = 1e-9; const long double pi = acos(-1.0); const long long inf = 1e+9; #pragma comment(linker, /STACK:36777216 ) template <typename T> istream &operator>>(istream &, vector<T> &); template <typename T> ostream &operator<<(ostream &, ...
// custom_math.v // This file was auto-generated as a prototype implementation of a module // created in component editor. It ties off all outputs to ground and // ignores all inputs. It needs to be edited to make it do something // useful. // // This file will not be automatically regenerated. You should check it...
// (C) 2001-2015 Altera Corporation. All rights reserved. // Your use of Altera Corporation's design tools, logic functions and other // software and tools, and its AMPP partner logic functions, and any output // files any of the foregoing (including device programming or simulation // files), and any associated doc...
`timescale 1ns/1ns `define NOP w_ctrl = 3'd0 `define WRITE w_ctrl = 3'd1 `define EOF_WITH_WRITE w_ctrl = 3'd2 `define EOF_WITHOUT_WRITE w_ctrl = 3'd3 `define HEAD w_ctrl = 3'd4 `define FINAL_HEAD w_ctrl = 3'd5 `define DISCARD w_ctrl = 3'd6 module testbench; parameter ADDRWIDTH = 4; w...
// DESCRIPTION: Verilator: Verilog Test module // // This file ONLY is placed under the Creative Commons Public Domain, for // any use, without warranty, 2013 by Wilson Snyder. // SPDX-License-Identifier: CC0-1.0 // bug789 generates module t (/*AUTOARG*/ // Inputs clk ); input clk; integer cyc=1; ...
// Copyright (c) 2000-2009 Bluespec, Inc. // Permission is hereby granted, free of charge, to any person obtaining a copy // of this software and associated documentation files (the "Software"), to deal // in the Software without restriction, including without limitation the rights // to use, copy, modify, merge, pub...
#include <bits/stdc++.h> using namespace std; int a[11], n; long long dp[11][111], c[111][111]; int main() { memset(c, 0, sizeof(c)); for (int i = (0); i < (111); i++) c[i][0] = 1; for (int i = (1); i < (111); i++) for (int j = (1); j <= (i); j++) c[i][j] = (c[i - 1][j - 1] + c[i - 1][...
#include <bits/stdc++.h> using namespace std; int main(int argc, const char* argv[]) { int cases; cin >> cases; while (cases--) { int num; scanf( %d , &num); vector<pair<int, int> > coords; pair<int, int> z(0, 0); coords.push_back(z); for (int i = 0; i < num; ++i) { ...
#include <bits/stdc++.h> using namespace std; const long long MOD = 1e9 + 7; const long long INF = 1e9 + 9; const long long N = 500500; signed main() { ios_base::sync_with_stdio(false); cin.tie(0); long long T; cin >> T; while (T--) { long long n, k; cin >> n >> k; string...
#include <bits/stdc++.h> using namespace std; int main() { int n; cin >> n; vector<vector<int> > a(n, vector<int>(n)); int sum = 0; for (int i = 0; i < n; i++) { for (int j = 0; j < n; j++) { scanf( %d , &a[i][j]); if (i == j) sum += a[i][j]; } } sum &= 1; ...
#include <bits/stdc++.h> using namespace std; string str; long long int n, k; int main() { string temp; ios_base::sync_with_stdio(0); cin.tie(0); cout.tie(0); long long int a, b, i, j, cnt = 0; cin >> str; n = str.size(); cin >> k; for (i = 0; i < k; i++) { cin >> temp;...
module memory_epp( input wire mclk, input wire epp_astb, input wire epp_dstb, input wire epp_wr, output reg epp_wait, inout wire[7:0] epp_data, input wire[7:6] status, input wire[31:0] address, output wire[31:0] dout, input wire[31:0] din, output reg complete, input wire complete_clr ); // Host is Little-...
// (C) 2001-2011 Altera Corporation. All rights reserved. // Your use of Altera Corporation's design tools, logic functions and other // software and tools, and its AMPP partner logic functions, and any output // files any of the foregoing (including device programming or simulation // files), and any associated doc...
#include <bits/stdc++.h> using namespace std; int dp[100000]; int main() { int n, a, b, c; cin >> n >> a >> b >> c; dp[a] = dp[b] = dp[c] = 1; int x = min(a, min(b, c)); for (int i = x; i <= n; i++) { if (i - a >= 0 && dp[i - a] > 0) dp[i] = max(dp[i], dp[i - a] + 1); if (i - b >= ...
#include <bits/stdc++.h> using namespace std; const int modn = (int)1e9 + 7, N = (int)1e5 + 10; int a[N], p[N][6], q[N], c[6][6][6], n, m; inline void add(int &x, int y) { x += y; if (x >= modn) x %= modn; } struct zz { int power, x, s, t, tot; int v[N << 2], ls[N << 2], rs[N << 2], b[N << 2...
#include <bits/stdc++.h> using namespace std; void past_code(); vector<int> v[100005]; int main() { ios_base::sync_with_stdio(false); cin.tie(NULL); cout.tie(NULL); int x, y, j, k; cin >> x; for (int i = 1; i <= 2 * x; i++) { cin >> y; v[y].push_back(i); } long long s...
#include <bits/stdc++.h> using namespace std; template <typename T> using min_pq = priority_queue<T, vector<T>, greater<T>>; template <typename T> using max_pq = priority_queue<T>; const int inf = 2e9 + 5; const long long l_inf = 2e18 + 5; const int mod_v = 1e9 + 7; const int max_n = 1e5 + 5; const ...
#include <bits/stdc++.h> using namespace std; template <class T> void read(T& num) { char CH; bool F = false; for (CH = getchar(); CH < 0 || CH > 9 ; F = CH == - , CH = getchar()) ; for (num = 0; CH >= 0 && CH <= 9 ; num = num * 10 + CH - 0 , CH = getchar()) ; F &&...
// DESCRIPTION: Verilator: Verilog Test module // // This file ONLY is placed under the Creative Commons Public Domain, for // any use, without warranty, 2004 by Wilson Snyder. // SPDX-License-Identifier: CC0-1.0 module t (/*AUTOARG*/ // Inputs clk ); input clk; integer cyc; initial cyc=1; reg [255...
// *************************************************************************** // *************************************************************************** // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved. // // In this HDL repository, there are many different and unique modules, consisting // of...
#include <bits/stdc++.h> using namespace std; int main() { int n; cin >> n; int a[11][11] = {1}; for (int i = 0; i < n; i++) { a[i][0] = 1; a[0][i] = 1; } for (int i = 1; i < n; i++) { for (int j = 1; j < n; j++) { a[i][j] = a[i - 1][j] + a[i][j - 1]; } } ...
#include <bits/stdc++.h> using namespace std; template <class T> using v2d = vector<vector<T> >; template <class T> bool uin(T &a, T b) { return a > b ? (a = b, true) : false; } template <class T> bool uax(T &a, T b) { return a < b ? (a = b, true) : false; } mt19937 rng(chrono::system_clock:...
#include <bits/stdc++.h> using namespace std; int main() { string a, b; long long team1 = 0, team2 = 0; cin >> a; cin >> b; for (int i = 0; i <= a.size(); i++) { if ((a[i] == [ && b[i] == ( ) || (a[i] == 8 && b[i] == [ ) || (a[i] == ( && b[i] == 8 )) { team1++; ...
/** * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable la...
`include "Defintions.v" `include "Token.v" `include "data_setup.v" //este modulo es concido como targetsystem module TS ( sync, sync2, clk, rst, data, token, busy, data_out, setup_data, token_out, ); input wire busy; input wire clk; input wire rst; input wire [88:0] setup_data; input wire [1047:0]data; input ...
/* This module implements the VGA controller. It assumes a 25MHz clock is supplied as input. * * General approach: * Go through each line of the screen and read the colour each pixel on that line should have from * the Video memory. To do that for each (x,y) pixel on the screen convert (x,y) coordinate to * a memo...
/** * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable la...
#include <bits/stdc++.h> using namespace std; long long a[100]; long long b[100]; vector<long long> pos[101]; int main() { long long i, j, k, l, m, n, t; scanf( %lld , &n); scanf( %lld , &k); for (i = 0; i < n; i++) { scanf( %lld , &a[i]); pos[a[i]].push_back(i); } long lon...
/** * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable la...
#include <bits/stdc++.h> using namespace std; int main() { int n, kk, a[200]; scanf( %d%d , &n, &kk); for (int i = 0; i < n; i++) scanf( %d , &a[i]); int sum, tp, mx = a[0]; for (int i = 0; i < n; i++) for (int j = i; j < n; j++) { priority_queue<int> la, sm; sum = 0; ...
#include <bits/stdc++.h> ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ;...
/* * Copyright (c) 2001 Stephen Williams () * * This source code is free software; you can redistribute it * and/or modify it in source code form under the terms of the GNU * General Public License as published by the Free Software * Foundation; either version 2 of the License, or (at your option) * ...
/** * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable la...
#include <bits/stdc++.h> using namespace std; int main() { long long n; cin >> n; long long a, b, c; if (n % 3 == 0) { a = n - 2; b = 1; c = 1; } else { if ((n + 1) % 3 == 0) { a = n - 3; b = 2; c = 1; } else if ((n - 1) % 3 == 0) { a...
#include <bits/stdc++.h> #pragma GCC optimize( Ofast ) using namespace std; mt19937 rnd(chrono::steady_clock().now().time_since_epoch().count()); const int N = 765; const long long inf = (long long)4e18; long long dp[N][N]; long long f[N]; int main() { ios::sync_with_stdio(false); cin.tie(0); ...
module cpu( input clk, inout [31:0] data, output reg [11:0] adr, output reg we); reg [31:0] towrite; reg [31:0]regs[15:0]; reg [31:0]ir; reg [4:0] psr; reg [5:0] pc; reg halted; integer i; assign data = (we) ? towrite : 'bz; initial begin towrite = 'd0; adr = 12'b000000000000; we = 0; psr = 5'b00000; p...
module test_RegWaitRW32( //Avalon System control signal. input rsi_MRST_reset, // reset_n from MCU GPIO input csi_MCLK_clk, //Avalon-MM Control. input [31:0] avs_test_writedata, output [31:0] avs_test_readdata, input [5:0] avs_test_address, input [3:0] avs_test_byteenable, input avs_test_wri...
//-------------------------------------------------------------------------------- // transmitter.v // // Copyright (C) 2006 Michael Poppitz // // This program is free software; you can redistribute it and/or modify // it under the terms of the GNU General Public License as published by // the Free Software Fou...
/** * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable la...
#include <bits/stdc++.h> using namespace std; const int MaxN = 1e5; struct NOOD { int flag; int l; int r; int v; } num[MaxN + 5]; int ans[MaxN + 5], p[MaxN + 5]; bool ok[MaxN + 5], flag; int Max; int n, m; int main() { scanf( %d%d , &n, &m); for (int i = 1; i <= m; i++) { ...
/* Distributed under the MIT license. Copyright (c) 2016 Dave McCoy () Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, mo...
/** * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable la...
#include <bits/stdc++.h> using namespace std; int cal(int a, int b, int ba) { int x[100], xl, y[100], yl, i, z[100]; memset(x, 0, sizeof x); memset(y, 0, sizeof y); memset(z, 0, sizeof z); xl = yl = 0; while (a > 0) { x[xl++] = a % 10; a /= 10; } while (b > 0) { y[y...
#include <bits/stdc++.h> using namespace std; const long long int mod = 1000000007; const long long int inf = 1e17; const long long int N = 5005; long long int n; long long int a[N]; long long int dp[N][N]; long long int go(long long int idx, long long int flag) { long long int &ans = dp[idx][flag];...
#include <bits/stdc++.h> using namespace std; int main() { int n, m; scanf( %d%d , &n, &m); printf( %d n , min(n, m) + 1); for (int i = 0; i <= min(n, m); i++) { printf( %d %d n , min(n, m) - i, i); } }
`include "assert.vh" module cpu_tb(); reg clk = 0; // // ROM // localparam MEM_ADDR = 4; localparam MEM_EXTRA = 4; reg [ MEM_ADDR :0] mem_addr; reg [ MEM_EXTRA-1:0] mem_extra; reg [ MEM_ADDR :0] rom_lower_bound = 0; reg [ MEM_ADDR :0] rom_upper_bound = ~0; wire [2...
//***************************************************************************** // (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. // // This file contains confidential and proprietary information // of Xilinx, Inc. and is protected under U.S. and // international copyright and other intellectual property /...
#include <bits/stdc++.h> int main() { long n, k, a, b, a2 = {0}, a3 = {0}, a5 = {0}, b2 = {0}, b3 = {0}, b5 = {0}; scanf( %d %d , &a, &b); k = 1; while (k == 1) { if (a % 2 == 0) { a = a / 2; a2++; } else k = 0; } k = 1; while (k == 1) { if (a % 3 ...
#include <bits/stdc++.h> using namespace std; long long n, s, a, ans, a11, r; vector<long long> aa, ab, c; int main() { cin >> n; for (int i = 1; i <= n; i++) { cin >> s >> a; if (s == 11) { a11++; ans += a; } if (s == 0) c.push_back(a); if (s == 10) aa.push...
#include <bits/stdc++.h> using namespace std; int main() { long long int n; cin >> n; if (n % 2 == 0) { n = n / 2; if (n % 2 == 0) cout << 0; else cout << 1; } else { n = (n + 1) / 2; if (n % 2 == 0) cout << 0; else cout << 1; }...
/* * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law...
#include <bits/stdc++.h> int main(void) { int n, m; scanf( %d %d , &n, &m); long long a[1000 + 1]; long long t[1000 + 1 + 1][1000 + 1]; for (int i = 1; i <= n; i++) { scanf( %lld , &a[i]); } for (int j = 0; j <= n; j++) t[n + 1][j] = 0; for (int i = n; i >= 1; i--) { for (i...
#include <bits/stdc++.h> using namespace std; const int maxn = 1e5 + 5; long long n, m, s, t; long long pos[maxn], T[maxn]; long long cal(long long x) { if (s < m) s += t; else s -= t; t--; return (s % n + n) % n; } int main() { cin >> n >> m >> s >> t; s--; while (...
#include <bits/stdc++.h> using namespace std; const int MAXN = 3005; queue<int> q; vector<int> G[MAXN]; int d[MAXN][MAXN]; bool vis[MAXN]; void bfs(int s) { memset(vis, 0, sizeof(vis)); vis[s] = true; d[s][s] = 0; q.push(s); while (!q.empty()) { int u = q.front(); q.pop(); ...
`timescale 1ns / 1ps ////////////////////////////////////////////////////////////////////////////////// // Company: Cal Poly Pomona // Engineer: Byron Phung // // Create Date: 15:18:15 04/17/2016 // Design Name: // Module Name: Search // Project Name: // Target Devices: // Tool versions: // Descrip...
/* Generated by Yosys 0.5 (git sha1 c3c9fbf, gcc 4.8.2-19ubuntu1 -O2 -fstack-protector -fPIC -Os) */ (* top = 1 *) (* src = "test.v:1" *) module dffr_17(q, d, clk, reset); (* src = "test.v:5" *) input clk; (* src = "test.v:4" *) input [16:0] d; (* src = "test.v:3" *) output [16:0] q; (* src = "test.v:5...
#include <bits/stdc++.h> using namespace std; const int MOD7 = 1e9 + 7; const int MOD9 = 1e9 + 9; const double EPS = 1e-9; long long int gcd(long long int a, long long int b) { return b == 0 ? a : gcd(b, a % b); } int toint(const string &s) { stringstream second; second << s; int x; se...
// generated by newgenasym Mon Jan 25 15:49:40 2016 module \atsam3u1cb-au (ad12bvref, advref, dfsdm, dfsdp, dhsdm, dhsdp, erase, fwup, gnd1, gnd2, gnd3, gndana, gndbu, gndpll, gndutmi, jtagsel, nrst, nrstb, \pa0/pgmncmd , \pa1/pgmrdy , \pa10/pgmd2 , \pa11/pgmd3 , \pa12/pgmd4 , \pa13/pgmd5 , ...
#include <bits/stdc++.h> using namespace std; int64_t v[200005] = {0}; int64_t fnc(int64_t h, int n) { int64_t mn = v[0]; for (int i = 1; i < n; i++) { v[i] += v[i - 1]; mn = min(mn, v[i]); } if (v[n - 1] >= 0 && h + mn > 0) return -1; int64_t ans = 0; if (h + mn <= 0) { ...
//-------------------------------------------------------------------------------- // Project : SWITCH // File : sync_block.v // Version : 0.2 // Author : Shreejith S // // Description: Clock Domain Crossing Synchronisation - XILINX // // //---------------------------------------------------------------...
// -- (c) Copyright 2016 Xilinx, Inc. All rights reserved. // -- // -- This file contains confidential and proprietary information // -- of Xilinx, Inc. and is protected under U.S. and // -- international copyright and other intellectual...
`timescale 1ns / 1ps `include "asserts.vh" module tx_top_v(); reg [11:0] story_tb; reg clk, reset; reg [7:0] dat_i; reg lchar_i, valid_i; wire d_o, s_o, ready_o; tx_top top( .txClk(clk), .txReset(reset), .dat_i(dat_i), .lchar_i(lchar_i), .valid_i(valid_i), .d(d_o), .s(s_o), .ready_o(read...
/** * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable la...
/** * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable la...
#include <bits/stdc++.h> using namespace std; using cd = complex<double>; const int Inf = 1000000007; const long long mod = 1000000007; const double Pi = acos(-1); void Fastio() { ios_base::sync_with_stdio(false); cin.tie(0); cout.tie(0); } int n, t, ans = 0; long long res = 0; int Co[4]...
#include <bits/stdc++.h> using namespace std; const double EPS = 1e-9; const int INF = 2147483647; const long long LLINF = 9223372036854775807LL; template <class T> T gcd(T a, T b) { if (a < b) swap(a, b); if (b == 0) return a; return gcd(b, a % b); } template <class T> T lcm(T a, T b) { ...
#include <bits/stdc++.h> using namespace std; namespace LYYY { int read() { int s = 0; char c = getchar(); int f = 1; while (c < 48 || c > 57) { if (c == 45) f = -1; c = getchar(); } while (c >= 48 && c <= 57) s = (s << 3) + (s << 1) + (c ^ 48), c = getchar(); return s * f;...
module fifo # (parameter abits = 20, dbits = 8)( input reset, clock, input rd, wr, input [dbits-1:0] din, output [dbits-1:0] dout, output empty, output full, output reg ledres ); wire db_wr; wire db_rd; reg dffw1, dffr1; reg [dbits-1:0] out; initial ledres = 0; reg [1:0] count; reg...
/* * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law...
/*------------------------------------------------------------------------------ * This code was generated by Spiral Multiplier Block Generator, www.spiral.net * Copyright (c) 2006, Carnegie Mellon University * All rights reserved. * The code is distributed under a BSD style license * (see http://www.opensource.or...
// ---------------------------------------------------------------------- // Copyright (c) 2015, The Regents of the University of California All // rights reserved. // // Redistribution and use in source and binary forms, with or without // modification, are permitted provided that the following conditions are // met:...
#include <bits/stdc++.h> using namespace std; int main() { int n, m; cin >> n >> m; int i; map<string, string> mp1to2; map<string, string> mp2to1; map<string, int> mp1p; map<string, int> mp2p; for (i = 1; i <= m; i++) { string w1, w2; cin >> w1 >> w2; mp1to2[w1] = w...
/** * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable la...
#include <bits/stdc++.h> using namespace std; int mod = 1e9 + 7; int f[105][105][105], len[105], n, m; char s[105]; int qpow(int x, int y) { int res = 1; while (y) { if (y % 2) res = 1ll * res * x % mod; x = 1ll * x * x % mod; y /= 2; } return res; } int dfs(int x, int l,...
module top ( input wire clk, input wire rx, output wire tx, input wire [15:0] sw, output wire [15:0] led ); RAM64X1S #( .INIT(64'b00000000_00000000_00000000_00000000_00000000_00000000_00000000_00000010) ) ram3 ( .WCLK (clk), .A5 (sw[5]), .A4 (sw...
#include <bits/stdc++.h> using namespace std; const int N = 105; int answer[N][4]; int main() { int n, m; cin >> n >> m; int k = 0; for (int i = 1; i <= n; ++i) { if (k == m) break; answer[i][0] = ++k; if (k == m) break; answer[i][3] = ++k; } for (int i = 1; i <= ...
/* Copyright (c) 2019 Alex Forencich Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute,...
#include <bits/stdc++.h> using namespace std; const int N = 1e5 + 2; void testCase() { int n, k, cnt = 0, ans = 1, s = 0; scanf( %d%d , &n, &k); vector<int> a(n), fr(101), z(101); for (int i = 0; i < n; ++i) { scanf( %d , &a[i]); if (fr[a[i]]++ == 0) ++cnt, ++s; if (cnt == k + 1)...
#include <bits/stdc++.h> using namespace std; const long long maxN = 1e6 + 5; const long long inf = 1e10; const long long mod = 1e9 + 7; long long n; long long x[maxN]; long long a, b; int main() { ios_base::sync_with_stdio(0); cin >> n; for (long long i = 1; i <= n; i++) cin >> x[i]; ci...
// Fetch-Issue Pipeline Register module iss_pipe_reg ( input wire clk, input wire reset, input wire clr, input wire enable, // Active Low enable signal input wire[31:0] next_pc_iss_pipe_reg_i, input wire[31:0] instr_iss_p...
/* ######################################################################## Generic Clock Domain Crossing Block ######################################################################## */ module fifo_cdc (/*AUTOARG*/ // Outputs wait_out, access_out, packet_out, // Inputs clk_in, reset_in, access_in, pa...
#include <bits/stdc++.h> using namespace std; int main() { ios_base::sync_with_stdio(false); cin.tie(0); cout.tie(0); int n; cin >> n; vector<int> v; for (int i = 0; i < n; i++) { int x; cin >> x; v.push_back(x); } sort(v.begin(), v.end()); if (v[0] == v[n /...
#include <bits/stdc++.h> using namespace std; const int INF = 1e9 + 7; const int MAXN = 1e6 + 7; const double EPS = 1e-6; const int M = 15; int main() { ios_base::sync_with_stdio(0); cin.tie(0); cout.tie(0); srand(time(0)); vector<vector<int> > dp(M + 1); vector<vector<pair<int, int>...
/** * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable la...
/** * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable la...
// DESCRIPTION: Verilator: Verilog Test module // // This file ONLY is placed into the Public Domain, for any use, // without warranty, 2010 by Wilson Snyder. module t (/*AUTOARG*/ // Inputs rst_sync_l, rst_both_l, rst_async_l, d, clk ); /*AUTOINPUT*/ // Beginning of automatic inputs (from unused autoin...
#include <bits/stdc++.h> using namespace std; bool flag; int vis[(1 << 17)]; int n, m, k; vector<pair<int, int> > vt[(1 << 17)]; void dfs(int u) { for (int i = 0; i < vt[u].size(); i++) { int v = vt[u][i].first; int c = vt[u][i].second; if (vis[v] == -1) { if (c == 1) ...
#include <bits/stdc++.h> using namespace std; const long long PR = 1000000009; int n, m, premin[100009], sufmax[100009]; char A[100009], B[100009]; int main() { ios::sync_with_stdio(false); cin >> A >> B; n = strlen(A); m = strlen(B); for (int i = 0; i < m; i++) premin[i] = n, sufmax[i] = ...
// Copyright 1986-2014 Xilinx, Inc. All Rights Reserved. // -------------------------------------------------------------------------------- // Tool Version: Vivado v.2014.1 (lin64) Build 881834 Fri Apr 4 14:00:25 MDT 2014 // Date : Thu May 15 18:05:39 2014 // Host : macbook running 64-bit Arch Linux // ...
#include <bits/stdc++.h> using namespace std; int n, p; string msg, s[100001], h = <3 ; int sub(int &i, string &w) { int k = 0; for (; k < w.length() && i < msg.length(); i++) { if (w[k] == msg[i]) { ++k; } } return k == w.length(); } int main() { ios_base::sync_with...
////////////////////////////////////////////////////////////////////////////// // // Xilinx, Inc. 2008 www.xilinx.com // ////////////////////////////////////////////////////////////////////////////// // // File name : serdes_n_to_1.v // // Description : 1-bit generic n:1 transmitter modul...
#include <bits/stdc++.h> using namespace std; int pgcd(int a, int b) { if (b % a == 0) return a; pgcd(b % a, a); } int main() { int o = 0, gcd, az[1001], t[5000], j, k = 0, m, x, y, i, a, b, n; cin >> a >> b >> n; gcd = pgcd(a, b); for (i = 1; i * i <= gcd; i++) { if (gcd % i == 0)...
`include "timescale.vh" module hello ( input resn, // Reset, active low. input clk, output serialOut // The serial output. ); // UART TX testing "Hello World!" reg wr; wire [7:0] char; reg [3:0] state; wire empty; reg [3:0] messageIdx; ...
#include <bits/stdc++.h> using namespace std; using ll = long long; using ld = long double; void solve() { string s; cin >> s; vector<vector<ll>> cnt(2, vector<ll>(2, 0)); ll e = 0, o = 0; for (int i = 0; i < s.size(); i++) { o++; if (i % 2 == 0) { o += cnt[s[i] - a ][0]...
/** * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable la...
/* * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law...
#include <bits/stdc++.h> using namespace std; int A[2006]; int B[2005]; map<int, int> mp; int main() { int a, b, n, x; while (cin >> n) { mp.clear(); int t = 1, x1, y1; for (int i = 0; i < n; i++) { scanf( %d , &A[i]); if (mp.count(A[i]) == 0) mp[A[i]] = t++; } ...
`timescale 1ns / 1ps //Divisor de 32 bits con signo. /* * Números de 32 bits donde, si a es número, entonces: * a[31] : signo de a. * a[30:10] : parte entera de a. * a[9:0] : parte decimal de a. */ module Divisor( input wire [31:0] a, input wire [31:0] b, output reg [31:0] Z, output reg ovf ); ...
#include <bits/stdc++.h> using namespace std; int main() { int r, h, sum, n; float k, l; cin >> r >> h; n = h / r; h -= n * r; l = r / 2.0; k = sqrt(3) / 2 * r; if (h < l) sum = n * 2 + 1; if (h >= l && h < k) sum = n * 2 + 2; if (h >= k) sum = n * 2 + 3; cout << sum << e...
module decoder (cx,d); output [2:0] d; input [8:0] cx; reg [2:0] d; reg [5:0] s; reg [8:0] cx1; parameter s0 = 6'b011001; parameter s1 = 6'b010010; parameter s2 = 6'b101010; parameter s3 = 6'b100000; parameter s4 = 6'b010000; parameter s5 = 6'b001000; parameter s6 = 6'b000100; parameter s7 = 6'b000010;...