text stringlengths 59 71.4k |
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/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
#include <bits/stdc++.h> using namespace std; #pragma comment(linker, /STACK:200000000 ) const double EPS = 1E-9; const int INF = 1000000000; const long long INF64 = (long long)1E18; const double PI = 3.1415926535897932384626433832795; char s[2100][2100]; int ans[2100]; int main() { int n, m, k; ... |
#include <bits/stdc++.h> long long mod = 1e9 + 7, mod2 = 998244353; using namespace std; long long fac[10000000]; long long gcd(long long x, long long y) { if (y == 0) return x; return gcd(y, x % y); } long long fexp(long long a, long long b, long long m) { long long ans = 1; while (b) { ... |
#include <bits/stdc++.h> using namespace std; vector<pair<long long int, long long int> > dis(100005), edge; long long int cnt[100005]; int main() { ios_base::sync_with_stdio(false); cin.tie(NULL); long long int t = 0, n, e, x, y, z, i, j, k, g, q, ans = 0, sum = 0, c = 0, h; cin >> n >> t; ... |
#include <bits/stdc++.h> #define ll long long using namespace std; int main() { int t; cin>>t; int arra[10] = { 0, 3, 17, 151, 1117, 11941, 117653, ... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date: 09/14/2014 05:34:33 PM
// Design Name:
// Module Name: delta_sigma
// Project Name:
// Target Devices:
// Tool Versions:
// Description:
//
// Dependencies:
//
/... |
// ==============================================================
// File generated by Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC
// Version: 2013.4
// Copyright (C) 2013 Xilinx Inc. All rights reserved.
//
// ==============================================================
`timescale 1 ns / 1 ps
m... |
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed into the Public Domain, for any use,
// without warranty, 2006 by Wilson Snyder.
`include "verilated.v"
`define STRINGIFY(x) `"x`"
module t (/*AUTOARG*/
// Inputs
clk
);
input clk;
reg [63:0] crc;
integer fd;
integer... |
#include <bits/stdc++.h> using namespace std; void snum(long long &x) { scanf( %lld , &x); } void snum(long long &x, long long &y) { scanf( %lld %lld , &x, &y); } void snum(long long &x, long long &y, long long &z) { scanf( %lld %lld %lld , &x, &y, &z); } vector<long long> adj[100100]; long long outDe... |
/****************************************
MIST1032SA
OoO Processor
for Open Design Computer Project
Takahiro Ito @cpu_labs
****************************************/
`include "core.h"
`default_nettype none
module execute_port0(
//System
input wire iCLOCK,
input wire inRESET,
//Free
input wire iFREE_RESTART... |
#include <bits/stdc++.h> using namespace std; const int N = 80, Inf = 0x3f3f3f3f; int n, f[N][N][N][2]; int pos[3][N], num[3][N]; char s[N]; inline int getid(char ch) { if (ch == V ) return 0; if (ch == K ) return 1; return 2; } inline int move(int i, int j, int k, int id) { return max... |
#include <bits/stdc++.h> using namespace std; int pos[1 << 12], num[1 << 12]; int p[1 << 12], q[1 << 12]; void maintain(int x, int y) { for (;;) { int t = pos[q[x] ^ num[x]]; if (t == x) return; else if (t == y) { swap(p[x], p[y]); swap(pos[p[x]], pos[p[y]]); ... |
/*
Copyright (c) 2015-2018 Alex Forencich
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distri... |
#include <bits/stdc++.h> using namespace std; const int MAX = 1e6 + 10; int n, m, q, pos[MAX], bit[MAX], res[MAX], XOR[MAX]; pair<int, int> cache[MAX], a[MAX], b[MAX]; struct Node { int lef, rig, tt; bool operator<(const Node& other) const { return this->lef < other.lef; } }; Node query[MAX]; vo... |
// author: xay5421 // created: Mon May 3 17:34:21 2021 #include<bits/stdc++.h> #define rep(i,a,b) for(int i=(a);i<=(b);++i) #define per(i,a,b) for(int i=(a);i>=(b);--i) using namespace std; typedef long long LL; const LL INFLL=0X3F3F3F3F3F3F3F3FLL; const int N=200005; int n,Q,_w[N],_v[N],id[N],_id[N]... |
// (C) 2001-2013 Altera Corporation. All rights reserved.
// Your use of Altera Corporation's design tools, logic functions and other
// software and tools, and its AMPP partner logic functions, and any output
// files any of the foregoing (including device programming or simulation
// files), and any associated doc... |
/////////////////////////////////////////////////////////////////////
//// ////
//// WISHBONE rev.B2 compliant I2C Master byte-controller ////
//// ////
//// ... |
//#############################################################################
//# Function: Aligns positive edge of slow clock to fast clock #
//# !!!Assumes clocks are aligned and synchronous!!! #
//#############################################################################
... |
#include <bits/stdc++.h> using namespace std; const long long mod = 998244353; void ingraph(vector<long long> graph[], long long m) { long long x, y; for (long long i = 0; i < m; i++) { cin >> x >> y; x--, y--; graph[x].push_back(y); graph[y].push_back(x); } } long long gcd... |
//Copyright 1986-2014 Xilinx, Inc. All Rights Reserved.
//--------------------------------------------------------------------------------
//Tool Version: Vivado v.2014.4 (win64) Build Tue Nov 18 18:29:27 MST 2014
//Date : Thu May 19 21:55:14 2016
//Host : YINGCAIDONG1779 running 64-bit Service Pack 1 (... |
#include <bits/stdc++.h> const int N = 1e5 + 10; const int LOGN = 20; long long ans; int n; int pre[N << 1], to[N << 1], head[N], wcnt; long long dis[N]; int val[N], fa[N]; int dep[N]; int table[LOGN][N << 1]; int LOG2[N << 1]; int idcnt; int st[N]; inline int minp(int x, int y) { return (dep[... |
#include <bits/stdc++.h> using namespace std; int gcd(int a, int b) { if (b == 0) return a; return gcd(b, a % b); } void solve() { int a, b, n; cin >> a >> b >> n; bool aturn = true; while (n > 0) { int x; if (aturn) { x = gcd(a, n); aturn = false; } els... |
#include <bits/stdc++.h> #pragma GCC optimize( Ofast ) using namespace std; constexpr int LG = 60; int N; long long int ai, bi, bs; long long int x[LG + 1]; inline bool ins(long long int v) { for (int i = LG; i >= 0; --i) { if (!((v >> i) & 1)) continue; if (x[i]) { v ^= x[i]; ... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
#include <bits/stdc++.h> using namespace std; int i, i0, n, m, a[105]; bool vis[100]; vector<int> ans; int main() { while (scanf( %d , &n) != EOF) { for (i = 0; i < n; i++) scanf( %d , &a[i]); sort(a, a + n); for (i = 0; i < n; i++) { if (a[i] == 0) { ans.push_back(a[i]... |
`define ADDER_WIDTH 128
`define DUMMY_WIDTH 128
`define 3_LEVEL_ADDER
module adder_tree_top (
clk,
isum0_0_0_0, isum0_0_0_1, isum0_0_1_0, isum0_0_1_1, isum0_1_0_0, isum0_1_0_1, isum0_1_1_0, isum0_1_1_1,
sum,
);
input clk;
input [`ADDER_WIDTH+0-1:0] isum0_0_0_0, isum0_0_0_1, isum0_0_1_0, isum0_0_1_1, isum0_1_0_0,... |
#include <bits/stdc++.h> using namespace std; const int mod = 1e9 + 7; const int MN = 200010; int exp(int x, int n) { int ret = 1; while (n) { if (n & 1) ret = 1LL * ret * x % mod; x = 1LL * x * x % mod; n >>= 1; } return ret; } int inv(int x) { return exp(x, mod - 2); } ... |
#include <bits/stdc++.h> static int v1[100001]; static int v2[100001]; int comp(const void *elem1, const void *elem2) { return *((const int *)elem2) - *((const int *)elem1); } int main(void) { int k, r, n; scanf( %d %d %d , &n, &k, &r); k--; r--; for (int i = 0; i < n; ++i) { int... |
#include <bits/stdc++.h> using namespace std; long long gcd(long long a, long long b) { return b ? gcd(b, a % b) : a; } long long lcm(long long a, long long b) { return a / gcd(a, b) * b; } double PI = 3.1415926536; const int inf = 1e9 + 7; long long MAX(long long a, long long b) { return a > b ? a : b; } ... |
#include <bits/stdc++.h> #pragma GCC optimize( Ofast ) #pragma GCC target( avx,avx2,fma ) using namespace std; long long gcd(long long a, long long b) { return (b == 0) ? a : gcd(b, a % b); } long long lcm(long long a, long long b) { return ((a * b) / (gcd(a, b))); } bool compare(const pair<long long, long ... |
/* -------------------------------------------------------------------------------
* (C)2007 Robert Mullins
* Computer Architecture Group, Computer Laboratory
* University of Cambridge, UK.
* -------------------------------------------------------------------------------
*
* Matrix Arbiter
*
* See Dally/Towle... |
///////////////////////////////////////////////////////////////////////////////
//
// Project: Aurora 64B/66B
// Company: Xilinx
//
//
//
// (c) Copyright 2008 - 2009 Xilinx, Inc. All rights reserved.
//
// This file contains confidential and proprietary information
// of Xilinx, Inc. and is protected unde... |
/*
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law... |
/*
*
* Copyright (c) 2011
*
*
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the ... |
#include <bits/stdc++.h> using namespace std; const int N = 41; int n, m, q, cs; char a[N][N]; int s[N][N]; int dp[N][N][N][N]; int main() { memset(dp, 0, sizeof(int) * N * N * N * N); cin >> n >> m >> q; for (int i = 0; i < n; ++i) { cin.ignore(); for (int j = 0; j < m; ++j) { ... |
#include <bits/stdc++.h> using namespace std; int main(int argc, char *argv[]) { map<int, int> set; int n, a, b, check1, check2, temp; cin >> n >> a >> b; int arr[n]; vector<int> check; for (int i = int(0); i <= int(n - 1); i++) { cin >> arr[i]; set[arr[i]] = -1; } if (a ... |
`timescale 1ns / 1ps
////////////////////////////////////////////////////////////////////////////////
// Company: California State University San Bernardino
// Engineer: Bogdan Kravtsov
//
// Create Date: 13:46:10 10/03/2016
// Module Name: PC_tb
// Project Name: MIPS
// Description: Testing MIPS PC impl... |
//Legal Notice: (C)2014 Altera Corporation. All rights reserved. Your
//use of Altera Corporation's design tools, logic functions and other
//software and tools, and its AMPP partner logic functions, and any
//output files any of the foregoing (including device programming or
//simulation files), and any associated do... |
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed into the Public Domain, for any use,
// without warranty, 2008 by Wilson Snyder.
module t (/*AUTOARG*/
// Inputs
clk
);
input clk;
integer cyc=0;
reg [63:0] crc;
reg negate;
reg enable;
wire [31:0] datA = c... |
#include <bits/stdc++.h> using namespace std; int main() { int n, k; cin >> n >> k; string s; cin >> s; bool arr[26] = {false}; for (int i = 0; i < k; i++) { char c; cin >> c; arr[c - a ] = true; } long long ans = 0; long long co = 0; for (int i = 0; i < n;... |
`timescale 1ns / 1ps
/* gayle.v
Copyright (C) 2016-2017, Stephen J. Leary
All rights reserved.
This file is part of TF328 (Terrible Fire CD32 RAM + IDE BOARD)
TF530 is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free... |
#include <bits/stdc++.h> using namespace std; int main() { long long n, m, k; cin >> n >> m >> k; vector<long long> v; for (int i = 0; i < n; i++) { long long x; cin >> x; v.push_back(x); } long long sum = 0; int i; for (i = n - 1; i >= 0; i--) { sum += v[i]; ... |
//
// Generated by Bluespec Compiler, version 2019.05.beta2 (build a88bf40db, 2019-05-24)
//
//
//
//
// Ports:
// Name I/O size props
// RDY_tv_in_put O 1 reg
// axi_out_tvalid O 1 reg
// axi_out_tdata O 608 reg
// axi_out_tstrb ... |
/*
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law... |
//--------------------------------------------------------------------------------
// stage.vhd
//
// Copyright (C) 2006 Michael Poppitz
//
// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundat... |
#include <bits/stdc++.h> using namespace std; const int N = 2e5 + 10, K = 105, MOD = 998244353; int p[N][K], dp[N][K], a[N], ans[N] = {1}; int n, k, len; int sum(int l, int r, int x) { l = max(l, 1); r = min(r, n); return p[r][x] - p[l - 1][x]; } int main() { cin >> n >> k >> len; for ... |
//-----------------------------------------------------------------------------
//
// (c) Copyright 2009-2010 Xilinx, Inc. All rights reserved.
//
// This file contains confidential and proprietary information
// of Xilinx, Inc. and is protected under U.S. and
// international copyright and other intellectual property... |
// $Id: c_gather.v 5188 2012-08-30 00:31:31Z dub $
/*
Copyright (c) 2007-2012, Trustees of The Leland Stanford Junior University
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
Redistributions of ... |
module test(out);
output out;
`define wow
`define nest_one
`define second_nest
`define nest_two
`ifdef wow
initial $display("wow is defined");
`ifdef nest_one
initial $display("nest_one is defined");
`ifdef nest_two
initial $display("nest_two is defined");
`else
initial $display("nest_two is not def... |
#include <bits/stdc++.h> using namespace std; long long fact[1000010]; long long m = 1e9 + 7; long long me(long long a, long long b, long long m) { long long ans = 1; while (b > 0) { if (b % 2 == 1) { ans = (ans % m * a % m) % m; } a = (a * a) % m; b /= 2; } retur... |
// PentEvo project (c) NedoPC 2012
//
// SPI hub: arbitrating between AVR and Z80 accesses to SDcard via SPI.
`include "../include/tune.v"
module spihub(
input wire fclk,
input wire rst_n,
// pins to SDcard
output reg sdcs_n,
output wire sdclk,
output wire sddo,
input wire ... |
`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date: 02/13/2016 08:25:37 PM
// Design Name:
// Module Name: Multiplier
// Project Name:
// Target Devices:
// Tool Versions:
// Description:
//
// Dependencies:
//
//... |
#include <bits/stdc++.h> using namespace std; int main() { int n; int ind = 0; vector<int> v; scanf( %d , &n); for (int i = 0; i < n; i++) { int temp; scanf( %d , &temp); v.push_back(temp); } sort(v.begin(), v.end()); for (int i = 0; i < n; i++) { if (v[i] - i... |
#include <bits/stdc++.h> using namespace std; template <typename T> inline bool chkmin(T &a, const T &b) { return a > b ? a = b, 1 : 0; } template <typename T> inline bool chkmax(T &a, const T &b) { return a < b ? a = b, 1 : 0; } const int oo = 0x3f3f3f3f; const int maxn = 200100; int n; i... |
#include <bits/stdc++.h> using namespace std; long long n, k, A, B, ans = 0; long long fmin() { long long pros = (n - (n / k)) * A; if (B < pros) { n = n / k; return B; } else { n = n / k; return pros; } } int main() { cin >> n; cin >> k; cin >> A; cin >... |
#include <bits/stdc++.h> using namespace std; long long int a[200005], b[200005], c[200005]; class Myfirst { private: string *name; long long int *age; public: long long int gcd(long long int a, long long int b) { if (b == 0) return a; a %= b; return gcd(b, a); } lon... |
// pr_region_default_Top_0.v
// Generated using ACDS version 17.1 240
`timescale 1 ps / 1 ps
module pr_region_default_Top_0 (
input wire clock, // clock.clk
output wire [5:0] io_M_AXI_0_AWID, // io_M_AXI_0.awid
output wire [31:0] io_M_AXI_0_AWUSER, // .... |
//*****************************************************************************
// (c) Copyright 2009 - 2012 Xilinx, Inc. All rights reserved.
//
// This file contains confidential and proprietary information
// of Xilinx, Inc. and is protected under U.S. and
// international copyright and other intellectual property
/... |
#include <bits/stdc++.h> using namespace std; int main() { long long l1, r1, l2, r2, k, l, r; cin >> l1 >> r1 >> l2 >> r2 >> k; l = max(l1, l2); r = min(r1, r2); if (r < l) cout << 0; else if (l <= k && k <= r) cout << r - l; else cout << r - l + 1 << endl; return 0... |
#include <bits/stdc++.h> using std::cin; using std::cout; using std::endl; const int maxn = 200005; long long a[maxn], b[maxn]; int n; int ans, base; std::map<std::pair<long long, long long>, int> mmp; long long gcd(long long x, long long y) { return y == 0 ? x : gcd(y, x % y); } int main() { ci... |
#include <bits/stdc++.h> using namespace std; const int N = 2005, K = 55, mod = 998244353; int n, k, b[N], f[2 * K][N], g[2 * K][N], C[N][N]; int main() { scanf( %d%d , &n, &k); for (int i = 1; i <= n; i++) scanf( %d , &b[i]); f[k][0] = 1; for (int i = 1; i <= n; i++) { memset(g, 0, sizeof... |
#include <bits/stdc++.h> using namespace std; const long long mod = (1e9 + 7); const long long inf = (1e18 + 3); const long long N = 1e7 + 5; void no() { cout << -1 ; exit(0); } void yes() { cout << YES ; exit(0); } long long powmod(long long a, long long b) { long long res = 1; ... |
#include <bits/stdc++.h> using namespace std; const int INF = 0x3f3f3f3f; int q, n, a[505]; int main() { cin >> q; while (q--) { cin >> n; for (int i = 1; i <= n; i++) cin >> a[i]; bool pd = 1; for (int i = 1; i < n; i++) { int xx = a[i] + 1; if (xx > n) xx = 1; ... |
#include <bits/stdc++.h> using namespace std; int main() { long long int s, x, y, a, b = 0; cin >> s >> x; int f = 1; if (s < x) f = 0; if (s == x) b = 2; y = s - x; if (y % 2 == 1) f = 0; if (f) { y /= 2, a = 1; while (x > 0 || y > 0) { if (x % 2 == 1) { ... |
// hub_mem
/*
-------------------------------------------------------------------------------
Copyright 2014 Parallax Inc.
This file is part of the hardware description for the Propeller 1 Design.
The Propeller 1 Design is free software: you can redistribute it and/or modify
it under the terms of the GNU General Pub... |
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain, for
// any use, without warranty, 2003 by Wilson Snyder.
// SPDX-License-Identifier: CC0-1.0
module t (/*AUTOARG*/
// Inputs
clk
);
input clk;
reg _ranit;
reg [2:0] xor3;
reg ... |
/*
* Copyright (c) 2008 Zeus Gomez Marmolejo <>
*
* This file is part of the Zet processor. This processor is free
* hardware; you can redistribute it and/or modify it under the terms of
* the GNU General Public License as published by the Free Software
* Foundation; either version 3, or (at your option) an... |
`include "defines.v"
module HRbridge16
#(parameter addr = 4'b0000) //No. 0 connect router, port 0
(
input `control_w port_l0_i,
input `control_w port_l1_i,
input `control_w port_g0_i,
input `control_w port_g1_i,
output `control_w port_l0_o,
output `control_w port_l1_o,
output... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
#include <bits/stdc++.h> using namespace std; int log(int x) { return 32 - __builtin_clz(x) - 1; } int log(long long x) { return 64 - __builtin_clzll(x) - 1; } int n; int main() { cin >> n; if (n % 2 == 0) { cout << NO ; return 0; } cout << YES n ; bool add = false; for (... |
#include <bits/stdc++.h> using namespace std; struct problem { long long ts, tl, ss, sl, p; } pro[1005]; pair<long long, double> f[1005][1566]; int n, t; bool cmp(problem a, problem b) { return a.tl * a.p * (1000000 - b.p) < b.tl * b.p * (1000000 - a.p); } bool better(pair<long long, double> &a,... |
/*
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
/*
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law... |
#include <bits/stdc++.h> using namespace std; char s[55]; int l; int df[55][10]; int f(int pos, int c) { if (pos == l) return 1; if (df[pos][c] != -1) return df[pos][c]; int res = 0; int nn = c + s[pos]; res += f(pos + 1, nn / 2); if (nn & 1) res += f(pos + 1, (nn + 1) / 2); return... |
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed into the Public Domain, for any use,
// without warranty, 2005 by Wilson Snyder.
module t (/*AUTOARG*/
// Inputs
clk
);
input clk;
reg [11:0] in_a;
reg [31:0] sel;
wire [2:0] out_x;
extractor #(4,3) extractor (
... |
#include <bits/stdc++.h> template <typename T, typename U> inline void swap(T &a, U &b) { a = a ^ b; b = a ^ b; a = a ^ b; } inline void swap(int &a, int &b) { a = a ^ b; b = a ^ b; a = a ^ b; } inline void swap(long long &a, long long &b) { a = a ^ b; b = a ^ b; a = a ^ ... |
#include <bits/stdc++.h> using namespace std; template <typename T> T gcd(T a, T b) { while (b) { T c = a % b; a = b; b = c; } return a; } template <typename T> T lcm(T a, T b) { assert(a / gcd(a, b) <= numeric_limits<T>::max() / b); return a * (b / gcd(a, b)); } cl... |
#include <bits/stdc++.h> using namespace std; int main() { int n, ans = 0; cin >> n; pair<int, int> arr[n]; for (int i = 0; i < n; i++) cin >> arr[i].first >> arr[i].second; sort(arr, arr + n); for (int i = 0; i < n; i++) { if (arr[i].second >= ans) { ans = arr[i].second; ... |
//----------------------------------------------------------------------------
//-- Asynchronous serial receiver Unit
//------------------------------------------
//-- (C) BQ. December 2015. Written by Juan Gonzalez (Obijuan)
//-- GPL license
//---------------------------------------------------------------------------... |
/***********************************************************************
Incorrect direction non-detection test case
Copyright (C) 2001 Eric LaForest,
Licenced under GPL
***********************************************************************/
module CPU (data, address, rw, clock, reset);
inout [15:0]... |
/*
* BCH Encode/Decoder Modules
*
* Copyright 2014 - Russ Dill <>
* Distributed under 2-clause BSD license as contained in COPYING file.
*/
`timescale 1ns / 1ps
`include "bch_defs.vh"
/* serial inversionless */
module bch_sigma_bma_noinv #(
parameter [`BCH_PARAM_SZ-1:0] P = `BCH_SANE
) (
input clk,
input star... |
/////////////////////////////////////////////////////////////
// Created by: Synopsys DC Ultra(TM) in wire load mode
// Version : L-2016.03-SP3
// Date : Sun Mar 12 17:15:04 2017
/////////////////////////////////////////////////////////////
module Approx_adder_W16 ( add_sub, in1, in2, res );
input [15:0] in1... |
#include <bits/stdc++.h> using namespace std; using LL = long long; int main() { ios::sync_with_stdio(false); cin.tie(0); int n; cin >> n; LL sum = 0; for (int i = 0; i < n; ++i) { LL a; cin >> a; sum += a; } LL base = 1LL * (1 + n) * n / 2; LL add = (sum - ba... |
#include <bits/stdc++.h> using namespace std; struct node { int x, id; friend bool operator<(node a, node b) { if (a.x == b.x) return a.id < b.id; return a.x < b.x; } } a[200005]; priority_queue<node> Q; struct edge { int s, e; } ans[2000005]; int id; int main() { int n, ... |
#include <bits/stdc++.h> using namespace std; vector<int> g[2000]; int vis[2000]; vector<pair<int, int> > cyc; void dfs(int x, int scc) { if (vis[x] > 0) { return; } vis[x] = 1; int j; for (int i = 0; i < g[x].size(); i++) { for (j = 0; j < g[g[x][i]].size(); j++) { if ... |
#include <bits/stdc++.h> using namespace std; const unsigned long long mod = 1000000007; int main() { int x, y; unsigned long long n = 0; cin >> x >> y; unsigned long long t = 0; int power = 2; for (int p = 0; p < 2200; p++) { if (power > y) break; t += y + 1 - power; pow... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
//-----------------------------------------------------------------------------
// File : wb_slave_mem_master.v
// Creation date : 27.07.2017
// Creation time : 14:40:19
// Description : Used to test wishbone cpu wrapper from both master and slave side.
// Created by : TermosPullo
// Tool : Kactus2 3.4.11... |
#include <bits/stdc++.h> double A[1005][1005]; void guass(int n) { int i, j; for (i = 0; i < n - 1; i++) { double f = A[i + 1][i] / A[i][i]; for (j = i; j < n; j++) { if (j > i + 2) break; A[i + 1][j] -= f * A[i][j]; } A[i + 1][n] -= f * A[i][n]; } for (i = n ... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
#include <bits/stdc++.h> using namespace std; char s[131100]; int cal(int l, int r, char t) { int cnt = 0; for (int i = l; i <= r; i++) { if (s[i] != t) cnt++; } return cnt; } int dfs(int l, int r, char t) { if (l == r) return cal(l, r, t); int ret = 1e9; int mid = (l + r) >>... |
`timescale 1ns / 1ps
////////////////////////////////////////////////////////////////////////////////
// Company: California State University San Bernardino
// Engineer: Bogdan Kravtsov
//
// Create Date: 14:34:17 10/03/2016
// Module Name: IF_ID_tb
// Project Name: MIPS
// Description: Testing MIPS IF_... |
/*
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law... |
/*
Screen Memory is 4kB
It is expected that an ISR will be used to update the screen memory during output.
*/
module ModFbMem(clock, reset,
pixCellIx, cellData1, cellData2,
busAddr, busData, busOE, busWR, busHold);
/* verilator lint_off UNUSED */
input clock;
input reset;
input[13:0] pixCellIx;
output[31:0] cell... |
// Quartus Prime Verilog Template
// Single port RAM with single read/write address and initial contents
// specified with an initial block
module phyIniCommand0_and
#(parameter DATA_WIDTH=16, parameter ADDR_WIDTH=4)
(
input [(DATA_WIDTH-1):0] data,
input [(ADDR_WIDTH-1):0] addr,
input we, clk,
... |
// megafunction wizard: %FIFO%
// GENERATION: STANDARD
// VERSION: WM1.0
// MODULE: scfifo
// ============================================================
// File Name: syncfifo_512x72.v
// Megafunction Name(s):
// scfifo
//
// Simulation Library Files(s):
// altera_mf
// ===========================... |
/*
* PAL/DAC controller for VGA
* Copyright (C) 2010 Zeus Gomez Marmolejo <>
*
* VGA FML support
* Copyright (C) 2013 Charley Picker <>
*
* This file is part of the Zet processor. This processor is free
* hardware; you can redistribute it and/or modify it under the terms of
* the GNU General P... |
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