sass stringlengths 231 30.8k | rdna stringlengths 69 28.4k | function_name stringlengths 1 85 | sass_tokens int64 90 14.4k ⌀ | rdna_tokens int64 11 14.5k ⌀ | source stringclasses 15
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// Demangled: setupCurandStates(curandStateXORWOW*, unsigned long, int)
Function : _Z17setupCurandStatesP17curandStateXORWOWmi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R8, SR_TID.X &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x388] &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x3 ?trans1;
BSSY.RECONVERGENT B0, 0xed0 ?trans6;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans8;
LDC R9, c[0x0][0x390] &wr=0x1 ?trans8;
LDC.64 R6, c[0x0][0x380] &wr=0x4 ?trans1;
LOP3.LUT R0, R2, 0xaad26b49, RZ, 0x3c, !PT &req={2} ?WAIT2_END_GROUP;
LOP3.LUT R2, R3, 0xf7dcefdd, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
IMAD R0, R0, 0x4182bed5, RZ ?trans2;
IMAD R3, R2, -0x658354e5, RZ ?WAIT3_END_GROUP;
IADD3 R5, PT, PT, R0.reuse, 0x75bcd15, RZ ?trans2;
LOP3.LUT R10, R0.reuse, 0x159a55e5, RZ, 0x3c, !PT ?trans2;
IADD3 R4, PT, PT, R0.reuse, 0x64f0c9, R3 ?trans1;
IMAD R8, R9, UR6, R8 &req={1} ?trans1;
IADD3 R13, PT, PT, R0, 0x583f19, RZ ?trans2;
IADD3 R11, PT, PT, R3.reuse, 0x1f123bb5, RZ ?trans2;
LOP3.LUT R12, R3, 0x5491333, RZ, 0x3c, !PT ?trans1;
ISETP.NE.AND P0, PT, R8.reuse, RZ, PT ?trans1;
SHF.R.S32.HI R9, RZ, 0x1f, R8 ?trans1;
IMAD.WIDE R6, R8, 0x30, R6 &req={4} ?WAIT5_END_GROUP;
STG.E.64 desc[UR4][R6.64], R4 &req={3} &rd=0x1 ?trans4;
STG.E.64 desc[UR4][R6.64+0x8], R10 &rd=0x1 ?trans4;
STG.E.64 desc[UR4][R6.64+0x10], R12 &rd=0x1 ?trans1;
@!P0 BRA 0xec0 &req={0} ?trans5;
IADD.64 R10, R6, 0x4 &req={1} ?trans2;
HFMA2 R18, -RZ, RZ, 0, 0 ?WAIT7_END_GROUP;
LOP3.LUT R12, R8, 0x3, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B1, 0xe50 ?trans1;
MOV R13, RZ ?WAIT5_END_GROUP;
ISETP.NE.S64.AND P0, PT, R12, RZ, PT ?WAIT14_END_GROUP;
@!P0 BRA 0xe40 ?trans5;
LDC.64 R14, c[0x4][RZ] &wr=0x0 ?trans1;
MOV R19, RZ ?trans1;
IMAD.WIDE.U32 R14, R18, 0xc80, R14 &req={0} ?WAIT7_END_GROUP;
HFMA2 R21, -RZ, RZ, 0, 0 &req={0} ?trans1;
MOV R23, RZ ?trans1;
CS2R R4, SRZ ?trans1;
CS2R R2, SRZ ?WAIT7_END_GROUP;
IMAD.WIDE.U32 R16, R23, 0x4, R10 ?WAIT5_END_GROUP;
LDG.E R25, desc[UR4][R16.64] &rd=0x0 &wr=0x5 ?trans1;
MOV R27, R23 ?trans1;
IADD3 R23, PT, PT, R23, 0x1, RZ ?trans1;
MOV R0, RZ ?WAIT4_END_GROUP;
ISETP.NE.AND P0, PT, R23, 0x5, PT ?WAIT5_END_GROUP;
P2R R28, PR, RZ, 0x1 &req={0} ?WAIT8_END_GROUP;
SHF.R.U32.HI R30, RZ, R0, R25 &req={5} ?trans1;
IMAD R16, R27, 0x20, R0 ?WAIT3_END_GROUP;
LOP3.LUT R17, R30, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P0, PT, R17, 0x1, PT ?trans1;
IMAD R17, R16, 0x5, RZ ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R16, R17, 0x4, R14 ?trans1;
R2P PR, R30, 0x7e ?WAIT7_END_GROUP;
@!P0 LDG.E R20, desc[UR4][R16.64] &wr=0x2 ?trans4;
@!P0 LDG.E R24, desc[UR4][R16.64+0x10] &wr=0x3 ?trans4;
@!P0 LDG.E R29, desc[UR4][R16.64+0x4] &wr=0x4 ?trans4;
@!P0 LDG.E R22, desc[UR4][R16.64+0x8] &wr=0x4 ?trans4;
@!P0 LDG.E R31, desc[UR4][R16.64+0xc] &wr=0x4 ?trans4;
@P1 LDG.E R32, desc[UR4][R16.64+0x14] &wr=0x4 ?trans4;
@P2 LDG.E R34, desc[UR4][R16.64+0x28] &wr=0x4 ?trans4;
@P5 LDG.E R36, desc[UR4][R16.64+0x64] &wr=0x4 ?trans4;
@P1 LDG.E R26, desc[UR4][R16.64+0x1c] &wr=0x4 ?trans4;
@P6 LDG.E R35, desc[UR4][R16.64+0x78] &wr=0x4 ?trans4;
@P2 LDG.E R33, desc[UR4][R16.64+0x2c] &wr=0x4 ?trans4;
@P4 LDG.E R37, desc[UR4][R16.64+0x5c] &wr=0x4 ?trans1;
@!P0 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P3 LDG.E R20, desc[UR4][R16.64+0x3c] &wr=0x2 ?trans1;
@!P0 LOP3.LUT R5, R5, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P4 LDG.E R24, desc[UR4][R16.64+0x50] &wr=0x3 ?trans1;
@!P0 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT &req={4} ?WAIT3_END_GROUP;
@P1 LDG.E R29, desc[UR4][R16.64+0x18] &wr=0x4 ?trans1;
@!P0 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P1 LDG.E R22, desc[UR4][R16.64+0x24] &wr=0x4 ?trans1;
@!P0 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P1 LDG.E R31, desc[UR4][R16.64+0x20] &wr=0x4 ?trans1;
@P1 LOP3.LUT R21, R21, R32, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R32, desc[UR4][R16.64+0x30] &wr=0x4 ?trans1;
@P2 LOP3.LUT R21, R21, R34, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R34, desc[UR4][R16.64+0x38] &wr=0x4 ?trans1;
LOP3.LUT P0, RZ, R30, 0x80, RZ, 0xc0, !PT ?trans2;
@P1 LOP3.LUT R3, R3, R26, RZ, 0x3c, !PT ?trans2;
@P4 LDG.E R26, desc[UR4][R16.64+0x60] &wr=0x4 ?trans1;
@P3 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P3 LDG.E R20, desc[UR4][R16.64+0x44] &wr=0x2 ?trans1;
@P4 LOP3.LUT R21, R21, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P4 LDG.E R24, desc[UR4][R16.64+0x58] &wr=0x3 ?trans1;
@P1 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT &req={4} ?trans2;
@P5 LOP3.LUT R21, R21, R36, RZ, 0x3c, !PT ?trans1;
@P2 LDG.E R29, desc[UR4][R16.64+0x34] &wr=0x4 ?trans1;
@P1 LOP3.LUT R5, R5, R22, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P3 LDG.E R22, desc[UR4][R16.64+0x4c] &wr=0x4 ?trans1;
@P1 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P3 LDG.E R31, desc[UR4][R16.64+0x40] &wr=0x4 ?trans1;
@P6 LOP3.LUT R21, R21, R35, RZ, 0x3c, !PT ?trans2;
@P2 LOP3.LUT R2, R2, R33, RZ, 0x3c, !PT ?trans1;
@P4 LDG.E R35, desc[UR4][R16.64+0x54] &wr=0x4 ?trans1;
@P2 LOP3.LUT R5, R5, R34, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P3 LDG.E R33, desc[UR4][R16.64+0x48] &wr=0x4 ?trans1;
@P2 LOP3.LUT R3, R3, R32, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P0 LDG.E R34, desc[UR4][R16.64+0x8c] &wr=0x4 ?trans4;
@P5 LDG.E R32, desc[UR4][R16.64+0x68] &wr=0x4 ?trans1;
@P3 LOP3.LUT R3, R3, R20, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P5 LDG.E R20, desc[UR4][R16.64+0x6c] &wr=0x2 ?trans1;
@P4 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P6 LDG.E R24, desc[UR4][R16.64+0x80] &wr=0x3 ?trans1;
@P2 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT &req={4} ?WAIT3_END_GROUP;
@P5 LDG.E R29, desc[UR4][R16.64+0x70] &wr=0x4 ?trans1;
@P3 LOP3.LUT R5, R5, R22, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P5 LDG.E R22, desc[UR4][R16.64+0x74] &wr=0x4 ?trans1;
@P3 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?trans1;
@P6 LDG.E R31, desc[UR4][R16.64+0x7c] &wr=0x4 ?trans1;
@P4 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R26, desc[UR4][R16.64+0x88] &wr=0x4 ?trans1;
@P3 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R33, desc[UR4][R16.64+0x84] &wr=0x4 ?trans1;
@P0 LOP3.LUT R21, R21, R34, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R4, R4, R37, RZ, 0x3c, !PT ?trans1;
@P0 LDG.E R35, desc[UR4][R16.64+0x90] &wr=0x4 ?trans1;
@P5 LOP3.LUT R2, R2, R32, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P0 LDG.E R32, desc[UR4][R16.64+0x94] &wr=0x4 ?trans4;
@P0 LDG.E R37, desc[UR4][R16.64+0x98] &wr=0x4 ?trans4;
@P0 LDG.E R34, desc[UR4][R16.64+0x9c] &wr=0x4 ?trans1;
@P5 LOP3.LUT R3, R3, R20, RZ, 0x3c, !PT &req={2} ?WAIT4_END_GROUP;
@P6 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={3} ?trans2;
@P5 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT &req={4} ?trans2;
@P5 LOP3.LUT R5, R5, R22, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
@P0 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R3, R3, R32, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R4, R4, R37, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R5, R5, R34, RZ, 0x3c, !PT ?trans2;
R2P PR, R30.B1, 0x7f ?WAIT13_END_GROUP;
@P0 LDG.E R22, desc[UR4][R16.64+0xa8] &wr=0x2 ?trans4;
@P0 LDG.E R24, desc[UR4][R16.64+0xb0] &wr=0x3 ?trans4;
@P0 LDG.E R31, desc[UR4][R16.64+0xac] &wr=0x4 ?trans4;
@P0 LDG.E R29, desc[UR4][R16.64+0xa4] &wr=0x4 ?trans4;
@P0 LDG.E R20, desc[UR4][R16.64+0xa0] &wr=0x4 ?trans4;
@P2 LDG.E R32, desc[UR4][R16.64+0xc8] &wr=0x4 ?trans4;
@P3 LDG.E R34, desc[UR4][R16.64+0xdc] &wr=0x4 ?trans4;
@P4 LDG.E R36, desc[UR4][R16.64+0xf0] &wr=0x4 ?trans4;
@P5 LDG.E R33, desc[UR4][R16.64+0x104] &wr=0x4 ?trans4;
@P1 LDG.E R26, desc[UR4][R16.64+0xc4] &wr=0x4 ?trans4;
@P3 LDG.E R37, desc[UR4][R16.64+0xe8] &wr=0x4 ?trans4;
@P3 LDG.E R35, desc[UR4][R16.64+0xe0] &wr=0x4 ?trans1;
@P0 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P1 LDG.E R22, desc[UR4][R16.64+0xb4] &wr=0x2 ?trans1;
@P0 LOP3.LUT R5, R5, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P1 LDG.E R24, desc[UR4][R16.64+0xbc] &wr=0x3 ?trans1;
@P0 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT &req={4} ?WAIT3_END_GROUP;
@P1 LDG.E R31, desc[UR4][R16.64+0xc0] &wr=0x4 ?trans1;
@P0 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P1 LDG.E R29, desc[UR4][R16.64+0xb8] &wr=0x4 ?trans1;
@P0 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT ?trans2;
LOP3.LUT P0, RZ, R30, 0x8000, RZ, 0xc0, !PT ?trans1;
@P6 LDG.E R20, desc[UR4][R16.64+0x118] &wr=0x4 ?trans4;
@P3 LDG.E R30, desc[UR4][R16.64+0xe4] &wr=0x4 ?trans1;
@P1 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R26, desc[UR4][R16.64+0xd8] &wr=0x4 ?trans1;
@P1 LOP3.LUT R21, R21, R22, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P4 LDG.E R22, desc[UR4][R16.64+0xf8] &wr=0x2 ?trans1;
@P2 LOP3.LUT R21, R21, R32, RZ, 0x3c, !PT ?trans2;
@P1 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={3} ?trans1;
@P3 LDG.E R32, desc[UR4][R16.64+0xec] &wr=0x3 ?trans1;
@P3 LOP3.LUT R21, R21, R34, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R24, desc[UR4][R16.64+0xd0] &wr=0x2 ?trans1;
@P4 LOP3.LUT R21, R21, R36, RZ, 0x3c, !PT ?trans2;
@P1 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT &req={4} ?trans1;
@P0 LDG.E R36, desc[UR4][R16.64+0x12c] &wr=0x4 ?trans1;
@P5 LOP3.LUT R21, R21, R33, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R33, desc[UR4][R16.64+0xd4] &wr=0x3 ?trans1;
@P1 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R31, desc[UR4][R16.64+0xcc] &wr=0x4 ?trans4;
@P4 LDG.E R29, desc[UR4][R16.64+0xfc] &wr=0x4 ?trans4;
@P4 LDG.E R34, desc[UR4][R16.64+0xf4] &wr=0x4 ?trans1;
@P6 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P4 LDG.E R20, desc[UR4][R16.64+0x100] &wr=0x4 ?trans1;
@P2 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P5 LDG.E R26, desc[UR4][R16.64+0x114] &wr=0x4 ?trans1;
@P2 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P5 LDG.E R24, desc[UR4][R16.64+0x10c] &wr=0x2 ?trans1;
@P3 LOP3.LUT R3, R3, R30, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R30, desc[UR4][R16.64+0x128] &wr=0x2 ?trans1;
@P2 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P5 LDG.E R33, desc[UR4][R16.64+0x110] &wr=0x3 ?trans1;
@P2 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT &req={4} ?trans2;
@P3 LOP3.LUT R4, R4, R37, RZ, 0x3c, !PT ?trans1;
@P5 LDG.E R31, desc[UR4][R16.64+0x108] &wr=0x4 ?trans1;
@P3 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT ?trans1;
@P6 LDG.E R35, desc[UR4][R16.64+0x11c] &wr=0x4 ?trans1;
@P4 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R22, desc[UR4][R16.64+0x120] &wr=0x4 ?trans1;
@P0 LOP3.LUT R21, R21, R36, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R29, desc[UR4][R16.64+0x124] &wr=0x4 ?trans1;
@P3 LOP3.LUT R5, R5, R32, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R2, R2, R34, RZ, 0x3c, !PT ?trans1;
@P0 LDG.E R37, desc[UR4][R16.64+0x130] &wr=0x4 ?trans4;
@P0 LDG.E R32, desc[UR4][R16.64+0x134] &wr=0x4 ?trans4;
@P0 LDG.E R34, desc[UR4][R16.64+0x138] &wr=0x4 ?trans4;
@P0 LDG.E R36, desc[UR4][R16.64+0x13c] &wr=0x4 ?trans1;
IADD3 R0, PT, PT, R0, 0x10, RZ ?WAIT2_END_GROUP;
@P4 LOP3.LUT R5, R5, R20, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
ISETP.NE.AND P1, PT, R0, 0x20, PT ?trans1;
@P5 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?trans2;
@P5 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={2} ?trans2;
@P6 LOP3.LUT R5, R5, R30, RZ, 0x3c, !PT ?trans2;
@P5 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT &req={3} ?trans2;
@P5 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT &req={4} ?WAIT4_END_GROUP;
@P6 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R2, R2, R37, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R3, R3, R32, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R4, R4, R34, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
@P0 LOP3.LUT R5, R5, R36, RZ, 0x3c, !PT ?trans1;
@P1 BRA 0x2f0 ?trans6;
ISETP.NE.AND P2, PT, R28, RZ, PT ?WAIT13_END_GROUP;
@P2 BRA 0x280 ?trans5;
STG.E.64 desc[UR4][R6.64+0x8], R2 &rd=0x0 ?trans1;
IADD3 R19, PT, PT, R19, 0x1, RZ ?WAIT3_END_GROUP;
STG.E.64 desc[UR4][R6.64+0x10], R4 &rd=0x0 ?trans2;
ISETP.GE.U32.AND P0, PT, R19, R12, PT ?trans2;
STG.E desc[UR4][R6.64+0x4], R21 &rd=0x0 ?trans11;
@!P0 BRA 0x240 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R2, R8 &req={0} ?trans1;
MOV R3, R9 ?trans1;
SHF.R.U64 R8, R8, 0x2, R9.reuse ?trans2;
SHF.R.U32.HI R9, RZ, 0x2, R9 ?trans2;
ISETP.GT.U64.AND P0, PT, R2, 0x3, PT ?WAIT3_END_GROUP;
IADD3 R18, PT, PT, R18, 0x1, RZ ?WAIT11_END_GROUP;
@P0 BRA 0x1c0 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
STG.E.64 desc[UR4][R6.64+0x18], RZ ?trans4;
STG.E desc[UR4][R6.64+0x20], RZ ?trans4;
STG.E.64 desc[UR4][R6.64+0x28], RZ ?trans1;
EXIT ?trans5;
BRA 0xf10;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: setupCurandStates(hiprandState*, unsigned long, int)
_Z17setupCurandStatesP12hiprandStatemi:
s_load_b64 s[0:1], s[0:1], 0x4
s_clause 0x1
s_load_b32 s4, s[2:3], 0x10
s_load_b128 s[16:19], s[2:3], 0x0
v_bfe_u32 v2, v0, 10, 10
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 20, 10
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mul_u32_u24_e32 v2, s1, v2
s_lshr_b32 s0, s0, 16
s_mul_i32 s0, s0, s1
s_xor_b32 s1, s18, 0x2c7f967f
s_delay_alu instid0(VALU_DEP_1)
v_mad_u64_u32 v[5:6], null, s15, s4, v[1:2]
v_mul_lo_u32 v1, s0, v1
s_xor_b32 s0, s19, 0xa03697cb
s_mul_i32 s4, s1, 0x493c4aa1
s_mul_i32 s5, s0, 0x7b99840d
s_add_i32 s0, s4, 0x75bcd15
s_xor_b32 s1, s4, 0x159a55e5
s_add_i32 s2, s5, 0x1f123bb5
s_add_i32 s6, s4, 0x583f19
v_add3_u32 v4, v1, v2, v0
s_add_i32 s4, s4, s5
s_xor_b32 s3, s5, 0x5491333
v_mov_b32_e32 v2, s2
v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
v_mul_lo_u32 v8, v4, 48
s_add_i32 s0, s4, 0x64f0c9
v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v4, s6
v_ashrrev_i32_e32 v6, 31, v5
v_mov_b32_e32 v7, s0
s_mov_b32 s5, 0
s_mov_b32 s18, exec_lo
ds_store_2addr_b64 v8, v[0:1], v[2:3] offset0:3 offset1:4
ds_store_2addr_b32 v8, v7, v4 offset1:10
v_cmpx_ne_u32_e32 0, v5
s_cbranch_execz .LBB0_12
v_mov_b32_e32 v7, v6
v_dual_mov_b32 v6, v5 :: v_dual_add_nc_u32 v9, 24, v8
s_mov_b32 s8, 0
s_getpc_b64 s[6:7]
s_add_u32 s6, s6, _ZL31d_xorwow_sequence_jump_matrices@rel32@lo+4
s_addc_u32 s7, s7, _ZL31d_xorwow_sequence_jump_matrices@rel32@hi+12
.LBB0_2:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_and_b32_e32 v10, 3, v6
s_mov_b32 s19, exec_lo
v_cmpx_ne_u32_e32 0, v10
s_cbranch_execz .LBB0_11
s_mov_b32 s20, 0
s_mov_b32 s21, 0
.LBB0_4:
s_mov_b32 s9, s8
s_mov_b32 s10, s8
s_mov_b32 s11, s8
s_mov_b32 s12, s8
v_dual_mov_b32 v0, s8 :: v_dual_mov_b32 v1, s9
v_dual_mov_b32 v2, s10 :: v_dual_mov_b32 v3, s11
v_mov_b32_e32 v4, s12
s_mov_b64 s[10:11], s[6:7]
s_mov_b32 s9, 0
.LBB0_5:
s_delay_alu instid0(SALU_CYCLE_1)
s_lshr_b32 s0, s9, 3
s_mov_b64 s[12:13], 0
s_and_b32 s0, s0, 0x1ffffffc
s_mov_b64 s[14:15], s[10:11]
v_add_nc_u32_e32 v11, s0, v9
s_and_b32 s0, s9, 31
ds_load_b32 v11, v11
s_waitcnt lgkmcnt(0)
v_bfe_u32 v11, v11, s0, 1
s_delay_alu instid0(VALU_DEP_1)
v_cmp_eq_u32_e32 vcc_lo, 0, v11
.LBB0_6:
s_load_b32 s4, s[14:15], 0x0
s_cmp_eq_u32 s12, 1
s_cselect_b32 s0, -1, 0
s_cmp_eq_u32 s12, 2
v_cndmask_b32_e64 v11, v0, v1, s0
s_cselect_b32 s1, -1, 0
s_cmp_eq_u32 s12, 3
s_cselect_b32 s2, -1, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v11, v11, v2, s1
s_cmp_eq_u32 s12, 4
s_cselect_b32 s3, -1, 0
s_cmp_eq_u32 s12, 0
v_cndmask_b32_e64 v11, v11, v3, s2
s_delay_alu instid0(VALU_DEP_1)
v_cndmask_b32_e64 v11, v11, v4, s3
s_waitcnt lgkmcnt(0)
v_cndmask_b32_e64 v12, s4, 0, vcc_lo
s_cselect_b32 s4, -1, 0
s_add_u32 s12, s12, 1
s_addc_u32 s13, s13, 0
s_add_u32 s14, s14, 4
v_xor_b32_e32 v11, v12, v11
s_addc_u32 s15, s15, 0
s_cmp_eq_u32 s12, 5
s_delay_alu instid0(VALU_DEP_1)
v_cndmask_b32_e64 v4, v4, v11, s3
v_cndmask_b32_e64 v3, v3, v11, s2
v_cndmask_b32_e64 v2, v2, v11, s1
v_cndmask_b32_e64 v1, v1, v11, s0
v_cndmask_b32_e64 v0, v0, v11, s4
s_cbranch_scc0 .LBB0_6
s_add_i32 s9, s9, 1
s_add_u32 s10, s10, 20
s_addc_u32 s11, s11, 0
s_cmpk_lg_i32 s9, 0xa0
s_cbranch_scc1 .LBB0_5
v_mov_b32_e32 v11, v9
s_mov_b64 s[0:1], 0
.LBB0_9:
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s0, 1
s_cselect_b32 vcc_lo, -1, 0
s_cmp_eq_u32 s0, 2
v_cndmask_b32_e32 v12, v0, v1, vcc_lo
s_cselect_b32 vcc_lo, -1, 0
s_cmp_eq_u32 s0, 3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v12, v12, v2, vcc_lo
s_cselect_b32 vcc_lo, -1, 0
s_cmp_eq_u32 s0, 4
v_cndmask_b32_e32 v12, v12, v3, vcc_lo
s_cselect_b32 vcc_lo, -1, 0
s_add_u32 s0, s0, 1
s_addc_u32 s1, s1, 0
s_cmp_eq_u32 s0, 5
v_cndmask_b32_e32 v12, v12, v4, vcc_lo
ds_store_b32 v11, v12
v_add_nc_u32_e32 v11, 4, v11
s_cbranch_scc0 .LBB0_9
s_add_i32 s21, s21, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_eq_u32_e32 vcc_lo, s21, v10
s_or_b32 s20, vcc_lo, s20
s_and_not1_b32 exec_lo, exec_lo, s20
s_cbranch_execnz .LBB0_4
.LBB0_11:
s_or_b32 exec_lo, exec_lo, s19
v_lshrrev_b64 v[0:1], 2, v[6:7]
v_cmp_gt_u64_e32 vcc_lo, 4, v[6:7]
s_add_u32 s6, s6, 0xc80
s_addc_u32 s7, s7, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_dual_mov_b32 v7, v1 :: v_dual_mov_b32 v6, v0
s_or_b32 s5, vcc_lo, s5
s_and_not1_b32 exec_lo, exec_lo, s5
s_cbranch_execnz .LBB0_2
.LBB0_12:
s_or_b32 exec_lo, exec_lo, s18
v_mov_b32_e32 v4, 0
ds_load_2addr_b64 v[0:3], v8 offset0:4 offset1:5
v_mad_i64_i32 v[6:7], null, v5, 48, s[16:17]
ds_store_2addr_b32 v8, v4, v4 offset0:1 offset1:2
ds_load_2addr_b64 v[9:12], v8 offset0:2 offset1:3
ds_load_2addr_b64 v[13:16], v8 offset1:1
s_waitcnt lgkmcnt(3)
global_store_b128 v[6:7], v[0:3], off offset:32
s_waitcnt lgkmcnt(1)
global_store_b128 v[6:7], v[9:12], off offset:16
s_waitcnt lgkmcnt(0)
global_store_b128 v[6:7], v[13:16], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| setupCurandStates | 7,942 | 3,040 | stackv2-00000-of-00015 |
// Demangled: conv1(unsigned int*, int*)
Function : _Z5conv1PjPi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R9, SR_TID.Y &wr=0x1 ?trans1;
S2R R4, SR_TID.X &wr=0x1 ?trans2;
VIMNMX.U32 R0, R9, R4, !PT &req={1} ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R0, 0x17, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD R4, R9, 0x1c, R4 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R4, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R32, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans4;
LDG.E R33, desc[UR4][R2.64+0x4] &wr=0x3 ?trans4;
LDG.E R28, desc[UR4][R2.64+0x8] &wr=0x4 ?trans4;
LDG.E R27, desc[UR4][R2.64+0xc] &wr=0x5 ?trans4;
LDG.E R26, desc[UR4][R2.64+0x10] &wr=0x5 ?trans4;
LDG.E R25, desc[UR4][R2.64+0x70] &wr=0x5 ?trans4;
LDG.E R24, desc[UR4][R2.64+0x74] &wr=0x5 ?trans4;
LDG.E R20, desc[UR4][R2.64+0x78] &wr=0x5 ?trans4;
LDG.E R19, desc[UR4][R2.64+0x7c] &wr=0x5 ?trans4;
LDG.E R18, desc[UR4][R2.64+0x80] &wr=0x5 ?trans4;
LDG.E R17, desc[UR4][R2.64+0xe0] &wr=0x5 ?trans4;
LDG.E R11, desc[UR4][R2.64+0xe4] &wr=0x5 ?trans4;
LDG.E R16, desc[UR4][R2.64+0xe8] &wr=0x5 ?trans4;
LDG.E R15, desc[UR4][R2.64+0xec] &wr=0x5 ?trans4;
LDG.E R14, desc[UR4][R2.64+0xf0] &wr=0x5 ?trans4;
LDG.E R12, desc[UR4][R2.64+0x150] &wr=0x5 ?trans4;
LDG.E R10, desc[UR4][R2.64+0x154] &wr=0x5 ?trans4;
LDG.E R7, desc[UR4][R2.64+0x158] &wr=0x5 ?trans4;
LDG.E R5, desc[UR4][R2.64+0x15c] &wr=0x5 ?trans4;
LDG.E R0, desc[UR4][R2.64+0x160] &wr=0x5 ?trans4;
LDG.E R13, desc[UR4][R2.64+0x1c0] &wr=0x5 ?trans4;
LDG.E R8, desc[UR4][R2.64+0x1c8] &wr=0x5 ?trans4;
LDG.E R6, desc[UR4][R2.64+0x1cc] &wr=0x5 ?trans4;
LDG.E R21, desc[UR4][R2.64+0x1d0] &rd=0x0 &wr=0x5 ?trans1;
IMAD R9, R9, -0x4, R4 ?trans1;
S2R R22, SR_CTAID.X &wr=0x1 ?trans2;
IMAD R23, R22, 0x19, RZ &req={1} ?WAIT2_END_GROUP;
IMAD R9, R22, 0x240, R9 ?WAIT3_END_GROUP;
SHF.L.U32 R23, R23, 0x2, RZ ?WAIT4_END_GROUP;
LDC R29, c[0x3][R23] &wr=0x2 ?trans8;
LDC R31, c[0x3][R23+0x4] &wr=0x3 ?trans8;
LDC R34, c[0x3][R23+0x8] &wr=0x4 ?trans8;
LDC R30, c[0x3][R23+0xc] &wr=0x5 ?trans8;
LDC R2, c[0x3][R23+0x14] &req={0} &wr=0x0 ?trans8;
LDC R3, c[0x3][R23+0x18] &wr=0x1 ?trans1;
IMAD R32, R29, R32, RZ &req={2} ?WAIT7_END_GROUP;
LDC R29, c[0x3][R23+0x10] &wr=0x2 ?trans1;
IMAD R31, R31, R33, R32 &req={3} ?WAIT4_END_GROUP;
IMAD R34, R34, R28, R31 &req={4} ?WAIT3_END_GROUP;
LDC R31, c[0x3][R23+0x1c] &wr=0x3 ?trans1;
IMAD R30, R30, R27, R34 &req={5} ?WAIT7_END_GROUP;
LDC R28, c[0x3][R23+0x20] &wr=0x4 ?trans8;
LDC R27, c[0x3][R23+0x24] &wr=0x5 ?trans1;
IMAD R29, R29, R26, R30 &req={2} ?WAIT4_END_GROUP;
IMAD R25, R2, R25, R29 &req={0} ?WAIT3_END_GROUP;
LDC R26, c[0x3][R23+0x28] &wr=0x0 ?trans1;
IMAD R24, R3, R24, R25 &req={1} ?WAIT4_END_GROUP;
IMAD R20, R31, R20, R24 &req={3} ?WAIT3_END_GROUP;
LDC R2, c[0x3][R23+0x2c] &wr=0x1 ?trans1;
IMAD R19, R28, R19, R20 &req={4} ?WAIT7_END_GROUP;
LDC R3, c[0x3][R23+0x30] &wr=0x2 ?trans1;
IMAD R18, R27, R18, R19 &req={5} ?WAIT7_END_GROUP;
LDC R24, c[0x3][R23+0x34] &wr=0x3 ?trans1;
IMAD R17, R26, R17, R18 &req={0} ?WAIT7_END_GROUP;
LDC R20, c[0x3][R23+0x38] &wr=0x0 ?trans1;
IMAD R2, R2, R11, R17 &req={1} ?WAIT7_END_GROUP;
LDC R19, c[0x3][R23+0x3c] &wr=0x1 ?trans1;
IMAD R2, R3, R16, R2 &req={2} ?WAIT7_END_GROUP;
LDC R18, c[0x3][R23+0x40] &wr=0x2 ?trans1;
IMAD R15, R24, R15, R2 &req={3} ?WAIT7_END_GROUP;
LDC R11, c[0x3][R23+0x44] &wr=0x3 ?trans1;
IMAD R15, R20, R14, R15 &req={0} ?WAIT7_END_GROUP;
LDC R3, c[0x3][R23+0x48] &wr=0x0 ?trans1;
IMAD R15, R19, R12, R15 &req={1} ?WAIT7_END_GROUP;
LDC R16, c[0x3][R23+0x4c] &wr=0x1 ?trans1;
IMAD R18, R18, R10, R15 &req={2} ?WAIT7_END_GROUP;
LDC R14, c[0x3][R23+0x50] &wr=0x2 ?trans1;
IMAD R18, R11, R7, R18 &req={3} ?WAIT7_END_GROUP;
LDC R12, c[0x3][R23+0x54] &wr=0x3 ?trans1;
IMAD R5, R3, R5, R18 &req={0} ?WAIT7_END_GROUP;
LDC R15, c[0x3][R23+0x58] &wr=0x0 ?trans1;
IMAD R0, R16, R0, R5 &req={1} ?WAIT7_END_GROUP;
LDC R7, c[0x3][R23+0x5c] &wr=0x1 ?trans1;
IMAD R13, R14, R13, R0 &req={2} ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD R13, R10, R12, R13 &req={3} ?WAIT7_END_GROUP;
LDC R11, c[0x3][R23+0x60] &wr=0x3 ?trans1;
IMAD R13, R15, R8, R13 &req={0} ?WAIT4_END_GROUP;
IMAD R6, R7, R6, R13 &req={1} ?trans2;
IMAD.WIDE R2, R9, 0x4, R2 &req={2} ?WAIT4_END_GROUP;
IMAD R11, R11, R21, R6 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R11 ?trans1;
EXIT ?trans5;
BRA 0x5d0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: conv1(unsigned int*, int*)
_Z5conv1PjPi:
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
s_mov_b32 s2, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_max_u32_e32 v2, v1, v0
v_cmpx_gt_u32_e32 24, v2
s_cbranch_execz .LBB0_2
s_load_b128 s[0:3], s[0:1], 0x0
v_mul_u32_u24_e32 v2, 28, v1
s_getpc_b64 s[4:5]
s_add_u32 s4, s4, FIL@rel32@lo+4
s_addc_u32 s5, s5, FIL@rel32@hi+12
v_mul_u32_u24_e32 v1, 24, v1
v_add_lshl_u32 v18, v2, v0, 2
s_waitcnt lgkmcnt(0)
s_clause 0x6
global_load_b128 v[2:5], v18, s[0:1]
global_load_b32 v21, v18, s[0:1] offset:16
global_load_b128 v[6:9], v18, s[0:1] offset:112
global_load_b32 v22, v18, s[0:1] offset:128
global_load_b128 v[10:13], v18, s[0:1] offset:224
global_load_b32 v23, v18, s[0:1] offset:240
global_load_b128 v[14:17], v18, s[0:1] offset:336
v_add_nc_u32_e32 v19, 8, v18
s_clause 0x2
global_load_b32 v24, v18, s[0:1] offset:352
global_load_b32 v25, v18, s[0:1] offset:448
global_load_b96 v[18:20], v19, s[0:1] offset:448
s_mul_i32 s0, s15, 25
s_mulk_i32 s15, 0x240
s_ashr_i32 s1, s0, 31
v_add3_u32 v0, v1, v0, s15
s_lshl_b64 s[0:1], s[0:1], 2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
s_add_u32 s4, s0, s4
s_addc_u32 s5, s1, s5
v_ashrrev_i32_e32 v1, 31, v0
s_load_b512 s[16:31], s[4:5], 0x0
s_getpc_b64 s[4:5]
s_add_u32 s4, s4, FIL@rel32@lo+68
s_addc_u32 s5, s5, FIL@rel32@hi+76
s_add_u32 s0, s0, s4
s_addc_u32 s1, s1, s5
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_clause 0x1
s_load_b256 s[4:11], s[0:1], 0x0
s_load_b32 s0, s[0:1], 0x20
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
s_waitcnt lgkmcnt(0)
s_add_i32 s1, s9, s4
s_waitcnt vmcnt(9)
v_mul_lo_u32 v2, v2, s16
v_mul_lo_u32 v26, v4, s18
v_mul_lo_u32 v27, v5, s19
s_delay_alu instid0(VALU_DEP_3)
v_mad_u64_u32 v[4:5], null, v3, s17, v[2:3]
s_waitcnt vmcnt(8)
v_mul_lo_u32 v2, v21, s20
s_waitcnt vmcnt(7)
v_mul_lo_u32 v3, v6, s21
v_mul_lo_u32 v5, v7, s22
v_mul_lo_u32 v6, v8, s23
v_add3_u32 v4, v4, v26, v27
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_add3_u32 v2, v4, v2, v3
v_mul_lo_u32 v3, v9, s24
s_waitcnt vmcnt(6)
v_mul_lo_u32 v4, v22, s25
v_add3_u32 v2, v2, v5, v6
s_waitcnt vmcnt(5)
v_mul_lo_u32 v5, v10, s26
v_mul_lo_u32 v6, v11, s27
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_add3_u32 v2, v2, v3, v4
v_mul_lo_u32 v3, v12, s28
v_mul_lo_u32 v4, v13, s29
v_add3_u32 v2, v2, v5, v6
s_waitcnt vmcnt(4)
v_mul_lo_u32 v5, v23, s30
s_waitcnt vmcnt(3)
v_mul_lo_u32 v6, v14, s31
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_add3_u32 v2, v2, v3, v4
v_mul_lo_u32 v3, v16, s5
v_mul_lo_u32 v4, v17, s6
v_add3_u32 v2, v2, v5, v6
s_waitcnt vmcnt(2)
v_mul_lo_u32 v5, v24, s7
s_waitcnt vmcnt(1)
v_mul_lo_u32 v6, v25, s8
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_add3_u32 v2, v2, v3, v4
s_waitcnt vmcnt(0)
v_mul_lo_u32 v3, v18, s10
v_mul_lo_u32 v4, s1, v15
v_add3_u32 v2, v2, v5, v6
v_mul_lo_u32 v5, v19, s11
v_mul_lo_u32 v6, v20, s0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add3_u32 v2, v2, v4, v3
v_add3_u32 v2, v2, v5, v6
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| conv1 | 2,754 | 1,974 | stackv2-00000-of-00015 |
// Demangled: conv2(int*, int*, int*)
Function : _Z5conv2PiS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.Y &wr=0x1 ?trans1;
S2R R7, SR_TID.X &wr=0x1 ?trans2;
LOP3.LUT P0, RZ, R0, 0x3f8, R7, 0xc8, !PT &req={1} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
S2R R6, SR_CTAID.X &wr=0x1 ?trans1;
LDC.64 R4, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD R11, R0, 0xc, R7 ?trans2;
HFMA2 R30, -RZ, RZ, 0, 0 ?trans1;
MOV R14, RZ ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x3 ?trans3;
LDC.64 R2, c[0x0][0x388] &wr=0x4 ?trans1;
IMAD.WIDE.U32 R4, R11, 0x4, R4 &req={2} ?WAIT5_END_GROUP;
IADD.64 R4, R4, 0x68 ?trans2;
IMAD R9, R6, 0x320, RZ &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R9, 0x4, R2 &req={4} ?WAIT5_END_GROUP;
IADD.64 R2, R2, 0x30 &req={3} ?WAIT8_END_GROUP;
LDG.E R15, desc[UR4][R2.64+-0x30] &wr=0x2 ?trans4;
LDG.E R16, desc[UR4][R4.64+-0x68] &wr=0x2 ?trans4;
LDG.E R32, desc[UR4][R2.64+-0x2c] &wr=0x3 ?trans4;
LDG.E R17, desc[UR4][R4.64+-0x64] &wr=0x3 ?trans4;
LDG.E R34, desc[UR4][R2.64+-0x28] &wr=0x4 ?trans4;
LDG.E R31, desc[UR4][R4.64+-0x60] &wr=0x4 ?trans4;
LDG.E R18, desc[UR4][R2.64+-0x24] &wr=0x5 ?trans4;
LDG.E R19, desc[UR4][R4.64+-0x5c] &wr=0x5 ?trans4;
LDG.E R20, desc[UR4][R2.64+-0x20] &wr=0x5 ?trans4;
LDG.E R21, desc[UR4][R4.64+-0x58] &wr=0x5 ?trans4;
LDG.E R27, desc[UR4][R2.64+-0x1c] &wr=0x5 ?trans4;
LDG.E R26, desc[UR4][R4.64+-0x38] &wr=0x5 ?trans4;
LDG.E R28, desc[UR4][R2.64+-0x18] &wr=0x5 ?trans4;
LDG.E R29, desc[UR4][R4.64+-0x34] &wr=0x5 ?trans4;
LDG.E R24, desc[UR4][R2.64+-0x14] &wr=0x5 ?trans4;
LDG.E R25, desc[UR4][R4.64+-0x30] &wr=0x5 ?trans4;
LDG.E R22, desc[UR4][R2.64+-0x10] &wr=0x5 ?trans4;
LDG.E R23, desc[UR4][R4.64+-0x2c] &wr=0x5 ?trans4;
LDG.E R8, desc[UR4][R2.64+-0xc] &wr=0x5 ?trans4;
LDG.E R9, desc[UR4][R4.64+-0x28] &wr=0x5 ?trans4;
LDG.E R10, desc[UR4][R2.64+-0x8] &wr=0x5 ?trans4;
LDG.E R11, desc[UR4][R4.64+-0x8] &wr=0x5 ?trans4;
LDG.E R12, desc[UR4][R2.64+-0x4] &wr=0x5 ?trans4;
LDG.E R13, desc[UR4][R4.64+-0x4] &wr=0x5 ?trans4;
LDG.E R33, desc[UR4][R4.64+0x64] &wr=0x5 ?trans1;
IMAD R15, R15, R16, R14 &req={2} ?WAIT3_END_GROUP;
LDG.E R14, desc[UR4][R2.64] &wr=0x2 ?trans4;
LDG.E R16, desc[UR4][R2.64+0x4] &wr=0x2 ?trans1;
IMAD R17, R32, R17, R15 &req={3} ?WAIT3_END_GROUP;
LDG.E R15, desc[UR4][R4.64] &wr=0x2 ?trans1;
IMAD R31, R34, R31, R17 &req={4} ?WAIT3_END_GROUP;
LDG.E R17, desc[UR4][R4.64+0x4] &wr=0x3 ?trans1;
IMAD R31, R18, R19, R31 &req={5} ?WAIT3_END_GROUP;
LDG.E R18, desc[UR4][R2.64+0x8] &wr=0x4 ?trans4;
LDG.E R19, desc[UR4][R4.64+0x8] &wr=0x4 ?trans1;
IMAD R31, R20, R21, R31 ?WAIT3_END_GROUP;
LDG.E R20, desc[UR4][R2.64+0xc] &wr=0x5 ?trans4;
LDG.E R21, desc[UR4][R4.64+0x28] &wr=0x5 ?trans1;
IMAD R31, R27, R26, R31 ?WAIT3_END_GROUP;
LDG.E R27, desc[UR4][R2.64+0x10] &wr=0x5 ?trans4;
LDG.E R26, desc[UR4][R4.64+0x2c] &wr=0x5 ?trans1;
IMAD R31, R28, R29, R31 ?WAIT3_END_GROUP;
LDG.E R28, desc[UR4][R2.64+0x14] &wr=0x5 ?trans4;
LDG.E R29, desc[UR4][R4.64+0x30] &wr=0x5 ?trans1;
IMAD R31, R24, R25, R31 ?WAIT3_END_GROUP;
LDG.E R24, desc[UR4][R2.64+0x18] &wr=0x5 ?trans4;
LDG.E R25, desc[UR4][R4.64+0x34] &wr=0x5 ?trans1;
IMAD R31, R22, R23, R31 ?WAIT3_END_GROUP;
LDG.E R22, desc[UR4][R2.64+0x1c] &wr=0x5 ?trans4;
LDG.E R23, desc[UR4][R4.64+0x38] &wr=0x5 ?trans1;
IMAD R32, R8, R9, R31 ?WAIT3_END_GROUP;
LDG.E R8, desc[UR4][R2.64+0x20] &wr=0x5 ?trans4;
LDG.E R9, desc[UR4][R4.64+0x58] &wr=0x5 ?trans1;
IMAD R32, R10, R11, R32 ?WAIT3_END_GROUP;
LDG.E R31, desc[UR4][R2.64+0x24] &wr=0x5 ?trans4;
LDG.E R10, desc[UR4][R2.64+0x28] &wr=0x5 ?trans4;
LDG.E R11, desc[UR4][R4.64+0x60] &wr=0x5 ?trans1;
IMAD R34, R12, R13, R32 ?WAIT3_END_GROUP;
LDG.E R32, desc[UR4][R2.64+0x2c] &wr=0x5 ?trans4;
LDG.E R12, desc[UR4][R2.64+0x30] &rd=0x1 &wr=0x5 ?trans4;
LDG.E R13, desc[UR4][R4.64+0x68] &rd=0x0 &wr=0x5 ?trans1;
IADD3 R30, PT, PT, R30, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R30, 0x20, PT ?trans1;
IADD.64 R2, R2, 0x64 &req={1} ?trans2;
IADD.64 R4, R4, 0x240 &req={0} ?trans2;
IMAD R14, R14, R15, R34 &req={2} ?WAIT4_END_GROUP;
IMAD R14, R16, R17, R14 &req={3} ?WAIT4_END_GROUP;
IMAD R14, R18, R19, R14 &req={4} ?WAIT4_END_GROUP;
IMAD R14, R20, R21, R14 &req={5} ?WAIT4_END_GROUP;
IMAD R14, R27, R26, R14 ?WAIT4_END_GROUP;
IMAD R14, R28, R29, R14 ?WAIT4_END_GROUP;
IMAD R14, R24, R25, R14 ?WAIT4_END_GROUP;
IMAD R14, R22, R23, R14 ?WAIT4_END_GROUP;
IMAD R8, R8, R9, R14 ?WAIT4_END_GROUP;
IMAD R8, R26, R31, R8 ?WAIT4_END_GROUP;
IMAD R8, R10, R11, R8 ?WAIT4_END_GROUP;
IMAD R8, R32, R33, R8 ?WAIT4_END_GROUP;
IMAD R14, R12, R13, R8 ?trans1;
@P0 BRA 0x110 ?trans6;
LDC.64 R2, c[0x0][0x390] &wr=0x0 ?trans1;
LEA R7, R0, R7, 0x3 ?WAIT4_END_GROUP;
LEA R7, R6, R7, 0x6 ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R2, R7, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R14 ?trans1;
EXIT ?trans5;
BRA 0x660;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: conv2(int*, int*, int*)
_Z5conv2PiS_S_:
v_bfe_u32 v3, v0, 10, 10
v_and_b32_e32 v2, 0x3ff, v0
s_mov_b32 s2, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_or_b32_e32 v0, v3, v2
v_cmpx_gt_u32_e32 8, v0
s_cbranch_execz .LBB2_4
s_load_b128 s[4:7], s[0:1], 0x0
v_mul_u32_u24_e32 v0, 12, v3
s_load_b64 s[0:1], s[0:1], 0x10
s_mul_i32 s2, s15, 0x320
v_mov_b32_e32 v4, 0
s_ashr_i32 s3, s2, 31
v_add_lshl_u32 v0, v0, v2, 2
s_lshl_b64 s[2:3], s[2:3], 2
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v0, s4, v0, s4
v_add_co_ci_u32_e64 v1, null, 0, s5, s4
s_add_u32 s4, s6, s2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, 0x68, v0
v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
s_addc_u32 s5, s7, s3
s_mov_b64 s[2:3], 0
.LBB2_2:
s_clause 0x9
global_load_b128 v[5:8], v[0:1], off offset:-104
global_load_b32 v24, v[0:1], off offset:-88
global_load_b128 v[9:12], v[0:1], off offset:-56
global_load_b32 v25, v[0:1], off offset:-40
global_load_b128 v[13:16], v[0:1], off offset:-8
global_load_b32 v26, v[0:1], off offset:8
global_load_b128 v[17:20], v[0:1], off offset:40
global_load_b32 v27, v[0:1], off offset:56
global_load_b32 v28, v[0:1], off offset:88
global_load_b96 v[21:23], v[0:1], off offset:96
s_add_u32 s6, s4, s2
s_addc_u32 s7, s5, s3
s_clause 0x2
s_load_b512 s[16:31], s[6:7], 0x0
s_load_b256 s[36:43], s[6:7], 0x40
s_load_b32 s6, s[6:7], 0x60
v_add_co_u32 v0, vcc_lo, 0x240, v0
v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
s_waitcnt lgkmcnt(0)
s_add_i32 s7, s41, s36
s_add_u32 s2, s2, 0x64
s_addc_u32 s3, s3, 0
s_cmpk_lg_i32 s2, 0xc80
s_waitcnt vmcnt(9)
v_mul_lo_u32 v5, v5, s16
v_mul_lo_u32 v6, v6, s17
v_mul_lo_u32 v7, v7, s18
v_mul_lo_u32 v8, v8, s19
s_waitcnt vmcnt(8)
v_mul_lo_u32 v24, v24, s20
s_delay_alu instid0(VALU_DEP_4)
v_add3_u32 v4, v5, v4, v6
s_waitcnt vmcnt(7)
v_mul_lo_u32 v5, v9, s21
v_mul_lo_u32 v6, v10, s22
s_waitcnt vmcnt(5)
v_mul_lo_u32 v9, v13, s26
v_add3_u32 v4, v4, v7, v8
v_mul_lo_u32 v7, v11, s23
v_mul_lo_u32 v8, v12, s24
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add3_u32 v4, v4, v24, v5
v_mul_lo_u32 v5, v25, s25
v_add3_u32 v4, v4, v6, v7
v_mul_lo_u32 v6, v14, s27
v_mul_lo_u32 v7, v15, s28
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_add3_u32 v4, v4, v8, v5
v_mul_lo_u32 v5, v16, s29
s_waitcnt vmcnt(4)
v_mul_lo_u32 v8, v26, s30
v_add3_u32 v4, v4, v9, v6
s_waitcnt vmcnt(3)
v_mul_lo_u32 v6, v17, s31
v_mul_lo_u32 v9, v19, s37
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_add3_u32 v4, v4, v7, v5
v_mul_lo_u32 v5, v20, s38
s_waitcnt vmcnt(2)
v_mul_lo_u32 v7, v27, s39
v_add3_u32 v4, v4, v8, v6
s_waitcnt vmcnt(1)
v_mul_lo_u32 v6, v28, s40
s_waitcnt vmcnt(0)
v_mul_lo_u32 v8, v21, s42
v_add3_u32 v4, v4, v9, v5
v_mul_lo_u32 v5, s7, v18
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_add3_u32 v4, v4, v7, v6
v_mul_lo_u32 v6, v22, s43
v_mul_lo_u32 v7, v23, s6
v_add3_u32 v4, v4, v5, v8
s_delay_alu instid0(VALU_DEP_1)
v_add3_u32 v4, v4, v6, v7
s_cbranch_scc1 .LBB2_2
v_lshlrev_b32_e32 v0, 3, v3
s_lshl_b32 s2, s15, 6
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_add3_u32 v0, v0, v2, s2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v4, off
.LBB2_4:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| conv2 | 2,934 | 2,139 | stackv2-00000-of-00015 |
// Demangled: maxpool(int*, int*)
Function : _Z7maxpoolPiS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R13, SR_TID.Y &wr=0x1 ?trans1;
S2R R6, SR_TID.X &wr=0x1 ?trans2;
LOP3.LUT P0, RZ, R13, 0x3fc, R6, 0xc8, !PT &req={1} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
S2R R15, SR_CTAID.X &wr=0x1 ?trans1;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans1;
IADD3 R0, PT, PT, R6, R6, RZ ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x3 ?trans4;
IMAD R0, R15, 0x40, R0 &req={1} ?WAIT4_END_GROUP;
IMAD R5, R13, 0x10, R0 ?WAIT4_END_GROUP;
IMAD.WIDE R2, R5, 0x4, R2 &req={2} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R2.64] &req={3} &wr=0x2 ?trans4;
LDG.E R5, desc[UR4][R2.64+0x4] &wr=0x2 ?trans4;
LDG.E R4, desc[UR4][R2.64+0x20] &wr=0x3 ?trans4;
LDG.E R7, desc[UR4][R2.64+0x24] &wr=0x3 ?trans1;
VIMNMX.S32 R9, R0, R5, !PT &req={2} ?trans1;
VIMNMX.S32 R7, R4, R7, !PT &req={3} ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R9, R7, PT ?WAIT13_END_GROUP;
@P0 LDC.64 R4, c[0x0][0x388] &wr=0x1 ?trans1;
@P0 LEA R0, R13, R6, 0x2 ?WAIT5_END_GROUP;
@P0 IMAD R11, R15, 0x10, R0 ?WAIT4_END_GROUP;
@P0 IMAD.WIDE.U32 R4, R11, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
@P0 STG.E desc[UR4][R4.64], R9 &rd=0x1 ?trans1;
@P0 EXIT ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x2 ?trans1;
LEA R6, R13, R6, 0x2 ?WAIT5_END_GROUP;
IMAD R15, R15, 0x10, R6 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R15, 0x4, R2 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R7 ?trans1;
EXIT ?trans5;
BRA 0x1f0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: maxpool(int*, int*)
_Z7maxpoolPiS_:
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
s_mov_b32 s2, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_or_b32_e32 v2, v1, v0
v_cmpx_gt_u32_e32 4, v2
s_cbranch_execz .LBB3_2
v_lshlrev_b32_e32 v2, 1, v0
v_lshlrev_b32_e32 v3, 4, v1
s_load_b128 s[0:3], s[0:1], 0x0
s_lshl_b32 s4, s15, 6
v_lshlrev_b32_e32 v1, 2, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add3_u32 v2, s4, v2, v3
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s0, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
s_lshl_b32 s0, s15, 4
s_clause 0x1
global_load_b64 v[4:5], v[2:3], off offset:32
global_load_b64 v[2:3], v[2:3], off
v_add3_u32 v0, s0, v1, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
s_waitcnt vmcnt(1)
v_max_i32_e32 v4, v4, v5
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_max3_i32 v2, v2, v3, v4
global_store_b32 v[0:1], v2, off
.LBB3_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| maxpool | 859 | 789 | stackv2-00000-of-00015 |
// Demangled: maxpooling(int*, int*)
Function : _Z10maxpoolingPiS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R11, SR_TID.Y &wr=0x1 ?trans1;
S2R R8, SR_TID.X &wr=0x1 ?trans2;
VIMNMX.U32 R0, R11, R8, !PT &req={1} ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R0, 0xb, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
S2R R0, SR_CTAID.X &wr=0x0 ?trans1;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans1;
IMAD R0, R0, 0x240, RZ &req={0} ?WAIT5_END_GROUP;
IADD3 R4, PT, PT, R0, R8, R8 ?WAIT5_END_GROUP;
IMAD R5, R11, 0x30, R4 ?WAIT4_END_GROUP;
IMAD.WIDE R2, R5, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
LDG.E R4, desc[UR4][R2.64] &req={2} &wr=0x2 ?trans4;
LDG.E R5, desc[UR4][R2.64+0x4] &wr=0x2 ?trans4;
LDG.E R6, desc[UR4][R2.64+0x60] &wr=0x3 ?trans4;
LDG.E R7, desc[UR4][R2.64+0x64] &wr=0x3 ?trans1;
VIMNMX.S32 R9, R4, R5, !PT &req={2} ?trans1;
VIMNMX.S32 R6, R6, R7, !PT &req={3} ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R9, R6, PT ?WAIT13_END_GROUP;
@P0 LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
@P0 IMAD R7, R11, 0xc, R8 ?WAIT5_END_GROUP;
@P0 LEA.HI.SX32 R7, R0, R7, 0x1e ?WAIT5_END_GROUP;
@P0 IMAD.WIDE R4, R7, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
@P0 STG.E desc[UR4][R4.64], R9 &rd=0x0 ?trans1;
@P0 EXIT ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans1;
IMAD R11, R11, 0xc, R8 ?WAIT5_END_GROUP;
LEA.HI.SX32 R11, R0, R11, 0x1e ?WAIT5_END_GROUP;
IMAD.WIDE R2, R11, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R6 ?trans1;
EXIT ?trans5;
BRA 0x200;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: maxpooling(int*, int*)
_Z10maxpoolingPiS_:
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
s_mov_b32 s2, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_max_u32_e32 v2, v1, v0
v_cmpx_gt_u32_e32 12, v2
s_cbranch_execz .LBB1_2
v_lshlrev_b32_e32 v2, 1, v0
v_mul_u32_u24_e32 v3, 48, v1
s_load_b128 s[0:3], s[0:1], 0x0
s_mulk_i32 s15, 0x240
v_mul_u32_u24_e32 v1, 12, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add3_u32 v2, s15, v2, v3
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s0, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
s_ashr_i32 s0, s15, 2
s_clause 0x1
global_load_b64 v[4:5], v[2:3], off offset:96
global_load_b64 v[2:3], v[2:3], off
v_add3_u32 v0, v1, v0, s0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
s_waitcnt vmcnt(1)
v_max_i32_e32 v4, v4, v5
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_max3_i32 v2, v2, v3, v4
global_store_b32 v[0:1], v2, off
.LBB1_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| maxpooling | 899 | 795 | stackv2-00000-of-00015 |
// Demangled: kernel(float2*, float2*, float2*, float2*, int)
Function : _Z6kernelP6float2S0_S0_S0_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R11, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x3a0] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R11, R0, UR4, R11 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R11, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD.WIDE R2, R11, 0x8, R2 &req={0} ?WAIT7_END_GROUP;
LDC.64 R8, c[0x0][0x398] &wr=0x0 ?trans1;
LDG.E.64 R2, desc[UR4][R2.64] &req={1} &wr=0x4 ?trans1;
IMAD.WIDE R4, R11, 0x8, R4 &req={2} ?WAIT6_END_GROUP;
LDG.E.64 R4, desc[UR4][R4.64] &wr=0x4 ?trans1;
IMAD.WIDE R6, R11, 0x8, R6 &req={3} ?WAIT6_END_GROUP;
LDG.E.64 R6, desc[UR4][R6.64] &wr=0x2 ?trans1;
IMAD.WIDE R8, R11, 0x8, R8 &req={0} ?WAIT4_END_GROUP;
FADD R13, R2, R4 &req={4} ?trans1;
FADD R0, R3, R5 ?WAIT3_END_GROUP;
FADD R10, R13, R6 &req={2} ?trans1;
FADD R11, R7, R0 ?WAIT5_END_GROUP;
STG.E.64 desc[UR4][R8.64], R10 ?trans1;
EXIT ?trans5;
BRA 0x1a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: kernel(HIP_vector_type<float, 2u>*, HIP_vector_type<float, 2u>*, HIP_vector_type<float, 2u>*, HIP_vector_type<float, 2u>*, int)
_Z6kernelP15HIP_vector_typeIfLj2EES1_S1_S1_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x34
s_load_b32 s3, s[0:1], 0x20
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_load_b256 s[0:7], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 3, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s3, v1, vcc_lo
v_add_co_u32 v6, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v1, vcc_lo
global_load_b32 v8, v[2:3], off
global_load_b32 v9, v[4:5], off
global_load_b32 v10, v[6:7], off
v_add_co_u32 v0, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
s_waitcnt vmcnt(1)
v_add_f32_e32 v8, v8, v9
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_add_f32_e32 v8, v8, v10
global_store_b32 v[0:1], v8, off
global_load_b32 v2, v[2:3], off offset:4
global_load_b32 v3, v[4:5], off offset:4
global_load_b32 v4, v[6:7], off offset:4
s_waitcnt vmcnt(1)
v_add_f32_e32 v2, v2, v3
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_add_f32_e32 v2, v2, v4
global_store_b32 v[0:1], v2, off offset:4
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| kernel | 735 | 810 | stackv2-00000-of-00015 |
// Demangled: ApplyBC(float*, float*, float*, int, int, float, float)
Function : _Z7ApplyBCPfS_S_iiff
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R6, c[0x0][0x398] &wr=0x1 ?trans1;
S2R R5, SR_CTAID.X &wr=0x2 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x2 ?trans1;
S2R R4, SR_TID.X &wr=0x2 ?trans1;
IABS R7, R6 &req={1} ?WAIT4_END_GROUP;
I2F.RP R0, R7 &wr=0x1 ?trans1;
IMAD R5, R5, UR4, R4 &req={2} ?trans1;
MUFU.RCP R0, R0 &req={1} &wr=0x1 ?trans2;
IADD3 R2, PT, PT, R0, 0xffffffe, RZ &req={1} ?trans2;
IABS R0, R5 ?trans2;
F2I.FTZ.U32.TRUNC.NTZ R3, R2 &rd=0x1 &wr=0x2 ?trans2;
HFMA2 R2, -RZ, RZ, 0, 0 &req={1} ?trans1;
IADD3 R8, PT, PT, RZ, -R3, RZ &req={2} ?WAIT5_END_GROUP;
MOV R4, R8 ?WAIT5_END_GROUP;
IMAD R9, R4, R7, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R3, R3, R9, R2 ?trans2;
LDC.64 R8, c[0x0][0x3a0] &wr=0x1 ?trans4;
IMAD.HI.U32 R17, R3, R0, RZ ?WAIT5_END_GROUP;
IADD3 R2, PT, PT, -R17, RZ, RZ ?WAIT5_END_GROUP;
IMAD R0, R7, R2, R0 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R7, R0, PT ?trans1;
FMUL R2, R8, 299792448 &req={1} ?WAIT4_END_GROUP;
FADD R3, R2, R9 ?WAIT8_END_GROUP;
@!P1 IADD3 R0, PT, PT, R0, -R7.reuse, RZ ?trans2;
@!P1 IADD3 R17, PT, PT, R17, 0x1, RZ ?trans1;
MUFU.RCP R4, R3 &wr=0x1 ?trans2;
ISETP.GE.U32.AND P0, PT, R0, R7, PT ?trans1;
LOP3.LUT R0, R5, R6, RZ, 0x3c, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R0, RZ, PT ?trans1;
FADD R0, R2, -R9 ?WAIT6_END_GROUP;
@P0 IADD3 R17, PT, PT, R17, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R6, RZ, PT ?trans1;
FFMA R7, -R3, R4, 1 &req={1} ?WAIT4_END_GROUP;
@!P1 IADD3 R17, PT, PT, -R17, RZ, RZ ?trans1;
FFMA R7, R4, R7, R4 ?WAIT4_END_GROUP;
FFMA R12, R0, R7, RZ ?WAIT3_END_GROUP;
@!P0 LOP3.LUT R17, RZ, R6, RZ, 0x33, !PT ?trans1;
FCHK P0, R0, R3 &wr=0x1 ?trans1;
FFMA R4, -R3, R12, R0 ?trans2;
IADD3 R8, PT, PT, -R17, RZ, RZ ?trans2;
FFMA R12, R7, R4, R12 ?WAIT3_END_GROUP;
IMAD R5, R6, R8, R5 ?trans1;
@!P0 BRA 0x2f0 &req={1,0} ?trans6;
MOV R6, 0x2e0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xe30 ?trans5;
MOV R12, R9 ?WAIT7_END_GROUP;
LDC R4, c[0x0][0x3a4] &wr=0x0 ?trans1;
MUFU.RCP R0, R3 &wr=0x1 ?trans2;
FFMA R7, -R3, R0, 1 &req={1} ?WAIT4_END_GROUP;
FFMA R0, R0, R7, R0 ?trans1;
FADD R4, R4, R4 &req={0} ?WAIT4_END_GROUP;
FCHK P0, R4, R3 &wr=0x0 ?trans1;
FFMA R13, R0, R4, RZ ?WAIT4_END_GROUP;
FFMA R6, -R3, R13, R4 ?WAIT4_END_GROUP;
FFMA R13, R0, R6, R13 ?trans1;
@!P0 BRA 0x3d0 &req={0} ?trans6;
MOV R0, R4 ?trans1;
MOV R6, 0x3c0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xe30 ?trans5;
MOV R13, R9 ?WAIT7_END_GROUP;
FMUL R3, R3, R4 ?trans1;
FMUL R0, R2, R2 ?WAIT3_END_GROUP;
MUFU.RCP R4, R3 &wr=0x0 ?trans1;
FCHK P0, R0, R3 &wr=0x1 ?trans1;
FFMA R7, -R3, R4, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R7, R4, R7, R4 ?WAIT4_END_GROUP;
FFMA R16, R0, R7, RZ ?WAIT4_END_GROUP;
FFMA R2, -R3, R16, R0 ?WAIT4_END_GROUP;
FFMA R16, R7, R2, R16 ?trans1;
@!P0 BRA 0x4a0 &req={1} ?trans6;
MOV R6, 0x490 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xe30 ?trans5;
MOV R16, R9 ?WAIT7_END_GROUP;
LDC.64 R10, c[0x0][0x398] &wr=0x0 ?trans1;
ISETP.GE.AND P2, PT, R17.reuse, 0x1, PT ?trans1;
ISETP.NE.AND P0, PT, R17, RZ, PT ?trans1;
SHF.R.S32.HI R19, RZ, 0x1f, R17 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
MOV R18, R17 ?trans1;
ISETP.NE.OR P3, PT, R5.reuse, RZ, !P2 ?trans1;
ISETP.LT.OR P0, PT, R5, 0x1, P0 ?trans1;
LDC.64 R8, c[0x0][0x390] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x8a0 ?trans7;
LDC.64 R14, c[0x0][0x380] &wr=0x3 ?trans1;
IADD3 R0, PT, PT, R11, -0x1, RZ &req={0} ?trans1;
IMAD R2, R5, R10, RZ ?WAIT6_END_GROUP;
LDC.64 R6, c[0x0][0x388] &wr=0x0 ?trans1;
IADD3 R4, PT, PT, R10, -0x1, RZ ?trans1;
ISETP.NE.AND P1, PT, R17.reuse, R0.reuse, PT ?trans1;
SHF.R.S32.HI R3, RZ, 0x1f, R2 ?trans1;
ISETP.GE.OR P3, PT, R17, R0, P3 ?trans2;
ISETP.NE.OR P2, PT, R5.reuse, R4, !P2 ?trans1;
ISETP.LT.OR P1, PT, R5, 0x1, P1 ?trans1;
IADD.64 R18, R2, R18 ?trans2;
ISETP.GE.OR P0, PT, R5, R4, P0 ?trans1;
ISETP.GE.OR P2, PT, R17, R0, P2 ?trans1;
ISETP.GE.OR P1, PT, R5, R4, P1 ?trans1;
SHF.L.U64.HI R5, R18.reuse, 0x2, R19 ?trans1;
IMAD.SHL.U32 R4, R18, 0x4, RZ ?trans1;
IADD3 R11, PT, PT, R17, R2, RZ ?WAIT2_END_GROUP;
IADD3 R17, PT, PT, R17, -R10, R2 ?trans2;
IADD.64 R2, R4, R8 &req={2} ?trans2;
@P3 BRA 0x890 &req={3,1} ?trans6;
LDC.64 R26, c[0x0][0x380] &wr=0x1 ?trans1;
IADD3 R33, PT, PT, R11.reuse, 0x1, RZ ?trans1;
IMAD.WIDE.U32 R30, R11, 0x4, R8 ?WAIT6_END_GROUP;
LDC.64 R18, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R32, R33, 0x4, R8 ?trans1;
LDG.E R0, desc[UR4][R30.64] &wr=0x3 ?trans1;
IADD3 R35, PT, PT, R17, R10, R10 ?WAIT3_END_GROUP;
LDG.E R29, desc[UR4][R32.64] &wr=0x4 ?trans2;
IMAD.WIDE R22, R35, 0x4, R8 ?trans2;
LDG.E R28, desc[UR4][R2.64+-0x4] &wr=0x5 ?trans4;
LDG.E R34, desc[UR4][R22.64+0x4] &wr=0x5 ?trans1;
IMAD.WIDE.U32 R20, R11, 0x4, R26 &req={1} ?WAIT3_END_GROUP;
LDG.E R31, desc[UR4][R22.64] &wr=0x5 ?trans1;
IMAD.WIDE R26, R35, 0x4, R26 ?WAIT3_END_GROUP;
LDG.E R21, desc[UR4][R20.64] &rd=0x1 &wr=0x5 ?trans1;
IMAD.WIDE R24, R35, 0x4, R18 &req={2} ?WAIT3_END_GROUP;
LDG.E R27, desc[UR4][R26.64] &wr=0x2 ?trans4;
LDG.E R24, desc[UR4][R24.64] &wr=0x2 ?trans4;
LDG.E R33, desc[UR4][R22.64+-0x4] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R18, R11, 0x4, R18 ?WAIT4_END_GROUP;
FADD R30, R0, R0 &req={3} ?WAIT4_END_GROUP;
FADD R29, R29, -R30 &req={4} ?WAIT4_END_GROUP;
FADD R29, R29, R28 &req={5} ?WAIT4_END_GROUP;
FADD R29, R29, R34 ?trans1;
FADD R20, R31, R31.reuse &req={1} ?trans1;
FADD R31, R0, R31 ?WAIT3_END_GROUP;
FADD R20, R29, -R20 ?trans1;
FADD R28, R24, R21 &req={2} ?WAIT4_END_GROUP;
FFMA R28, R28, R12, -R27 ?trans1;
FADD R20, R20, R33 ?WAIT3_END_GROUP;
FFMA R31, R31, R13, R28 ?WAIT4_END_GROUP;
FFMA R31, R20, R16, R31 ?WAIT5_END_GROUP;
STG.E desc[UR4][R18.64], R31 &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BSSY.RECONVERGENT B0, 0xaa0 ?trans4;
@P2 BRA 0xa90 ?trans5;
LDC.64 R24, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD.WIDE R26, R11, 0x4, R8.reuse ?trans1;
LDG.E R28, desc[UR4][R2.64+0x4] &wr=0x3 ?trans4;
LDG.E R0, desc[UR4][R26.64] &wr=0x4 ?trans2;
LDC.64 R20, c[0x0][0x380] &wr=0x5 ?trans1;
IMAD.WIDE R22, R17.reuse, 0x4, R8 ?trans1;
LDG.E R30, desc[UR4][R2.64+-0x4] &wr=0x3 ?trans4;
LDG.E R32, desc[UR4][R22.64+0x4] &wr=0x3 ?trans4;
LDG.E R31, desc[UR4][R22.64] &req={1} &wr=0x3 ?trans4;
LDG.E R33, desc[UR4][R22.64+-0x4] &wr=0x3 ?trans1;
IMAD.WIDE R24, R17, 0x4, R24 &req={2} ?WAIT4_END_GROUP;
IMAD.WIDE R18, R10, 0x4, R24 ?trans2;
LDG.E R24, desc[UR4][R24.64] &wr=0x2 ?trans2;
IMAD.WIDE R20, R17, 0x4, R20 &req={5} ?trans2;
LDG.E R29, desc[UR4][R18.64] &wr=0x2 ?trans4;
LDG.E R21, desc[UR4][R20.64] &wr=0x5 ?trans1;
FADD R27, R0, R0 &req={4} ?WAIT4_END_GROUP;
FADD R27, R28, -R27 &req={3} ?WAIT4_END_GROUP;
FADD R27, R27, R30 ?WAIT4_END_GROUP;
FADD R27, R27, R32 ?trans1;
FADD R26, R31, R31.reuse ?trans1;
FADD R31, R0, R31 ?WAIT3_END_GROUP;
FADD R26, R27, -R26 ?WAIT4_END_GROUP;
FADD R26, R26, R33 ?trans1;
FADD R24, R24, R29 &req={2} ?WAIT4_END_GROUP;
FFMA R24, R24, R12, -R21 &req={5} ?WAIT4_END_GROUP;
FFMA R31, R31, R13, R24 ?WAIT4_END_GROUP;
FFMA R31, R26, R16, R31 ?WAIT5_END_GROUP;
STG.E desc[UR4][R18.64], R31 &rd=0x2 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
IADD.64 R14, R4.reuse, R14 ?trans2;
BSSY.RECONVERGENT B0, 0xc90 ?trans1;
IADD.64 R4, R4, R6 &req={0} ?trans2;
IMAD.WIDE R18, R17, 0x4, R8 &req={2,1} ?trans1;
@P0 BRA 0xc80 ?trans6;
IMAD.WIDE R24, R11.reuse, 0x4, R8 ?trans1;
LDG.E R33, desc[UR4][R18.64] &wr=0x2 ?trans3;
IMAD.WIDE R20, R11, 0x4, R6 ?trans1;
LDG.E R26, desc[UR4][R4.64+0x4] &wr=0x3 ?trans3;
IMAD.WIDE R22, R10, 0x4, R24 ?trans1;
LDG.E R27, desc[UR4][R20.64] &wr=0x3 ?trans4;
LDG.E R24, desc[UR4][R24.64] &wr=0x4 ?trans4;
LDG.E R28, desc[UR4][R22.64] &wr=0x5 ?trans4;
LDG.E R35, desc[UR4][R22.64+0x4] &wr=0x2 ?trans4;
LDG.E R29, desc[UR4][R2.64+0x4] &wr=0x3 ?trans4;
LDG.E R17, desc[UR4][R14.64+0x4] &wr=0x3 ?trans4;
LDG.E R0, desc[UR4][R18.64+0x4] &wr=0x3 ?trans1;
FADD R31, R24, R24 &req={4} ?WAIT4_END_GROUP;
FADD R28, R28, -R31 &req={5} ?WAIT4_END_GROUP;
FADD R28, R28, R33 &req={2} ?trans1;
FADD R26, R26, R27 &req={3} ?WAIT3_END_GROUP;
FADD R28, R28, R35 ?trans1;
FADD R23, R29, R29.reuse ?trans1;
FADD R29, R24, R29 ?trans1;
FFMA R26, R26, R12, -R17 ?trans2;
FADD R23, R28, -R23 ?trans2;
FFMA R29, R29, R13, R26 ?trans2;
FADD R0, R23, R0 ?WAIT4_END_GROUP;
FFMA R29, R0, R16, R29 ?WAIT5_END_GROUP;
STG.E desc[UR4][R20.64], R29 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
@P1 EXIT ?trans5;
IMAD.WIDE R8, R11.reuse, 0x4, R8 ?trans1;
LDG.E R17, desc[UR4][R18.64] &wr=0x2 ?trans3;
IMAD.WIDE R6, R11, 0x4, R6 ?trans1;
LDG.E R4, desc[UR4][R4.64+-0x4] &wr=0x3 ?trans3;
IMAD.WIDE R20, R10, 0x4, R8 &req={0} ?trans1;
LDG.E R25, desc[UR4][R6.64] &wr=0x3 ?trans4;
LDG.E R8, desc[UR4][R8.64] &wr=0x4 ?trans4;
LDG.E R0, desc[UR4][R20.64] &wr=0x5 ?trans4;
LDG.E R10, desc[UR4][R20.64+-0x4] &wr=0x2 ?trans4;
LDG.E R15, desc[UR4][R14.64+-0x4] &wr=0x3 ?trans4;
LDG.E R3, desc[UR4][R2.64+-0x4] &wr=0x3 ?trans4;
LDG.E R23, desc[UR4][R18.64+-0x4] &wr=0x3 ?trans1;
FADD R11, R8, R8 &req={4} ?WAIT4_END_GROUP;
FADD R0, R0, -R11 &req={5} ?WAIT4_END_GROUP;
FADD R17, R0, R17 &req={2} ?trans1;
FADD R0, R4, R25 &req={3} ?WAIT3_END_GROUP;
FADD R10, R17, R10 ?trans1;
FFMA R0, R0, R12, -R15 ?trans1;
FADD R5, R8, R3 ?trans2;
FADD R10, -R3, R10 ?trans2;
FFMA R5, R5, R13, R0 ?trans2;
FADD R10, R10, R23 ?WAIT4_END_GROUP;
FFMA R5, R10, R16, R5 ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R5 ?trans1;
EXIT ?trans5;
SHF.R.U32.HI R8, RZ, 0x17, R3 ?trans2;
SHF.R.U32.HI R7, RZ, 0x17, R0 ?trans2;
LOP3.LUT R16, R8, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R14, R7, 0xff, RZ, 0xc0, !PT ?trans1;
MOV R7, R3 ?trans1;
IADD3 R10, PT, PT, R16, -0x1, RZ ?trans2;
IADD3 R9, PT, PT, R14, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R10, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R9, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R8, RZ ?trans1;
@!P0 BRA 0x1050 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0x1430 ?trans5;
LOP3.LUT P0, RZ, R7, 0x7fffffff, R0, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1410 ?trans5;
FSETP.NEU.FTZ.AND P1, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P2, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P2 BRA !P1, 0x1410 ?trans5;
LOP3.LUT P1, RZ, R0, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P2, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0x13f0 ?trans5;
LOP3.LUT P1, RZ, R7, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x13c0 ?trans5;
ISETP.GE.AND P0, PT, R9, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R10, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R8, RZ ?trans1;
@!P0 MOV R8, 0xffffffc0 ?trans1;
@!P0 FFMA R0, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R7, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R8, PT, PT, R8, 0x40, RZ ?WAIT7_END_GROUP;
LEA R10, R16, 0xc0800000, 0x17 ?WAIT4_END_GROUP;
IADD3 R10, PT, PT, -R10, R7, RZ ?trans2;
IADD3 R7, PT, PT, R14, -0x7f, RZ ?trans2;
MUFU.RCP R9, R10 &wr=0x0 ?trans1;
FADD.FTZ R11, -R10, -RZ ?trans2;
IMAD R0, R7.reuse, -0x800000, R0 ?trans1;
IADD3 R7, PT, PT, R7, 0x7f, -R16 ?WAIT4_END_GROUP;
IADD3 R7, PT, PT, R7, R8, RZ ?trans1;
FFMA R14, R9, R11, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R18, R9, R14, R9 ?WAIT4_END_GROUP;
FFMA R9, R0, R18, RZ ?WAIT4_END_GROUP;
FFMA R14, R11, R9, R0 ?WAIT4_END_GROUP;
FFMA R15, R18, R14, R9 ?WAIT4_END_GROUP;
FFMA R14, R11, R15, R0 ?WAIT4_END_GROUP;
FFMA R9, R18, R14, R15 ?WAIT5_END_GROUP;
SHF.R.U32.HI R0, RZ, 0x17, R9 ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R10, PT, PT, R0, R7, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R10, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x13a0 ?trans5;
ISETP.GT.AND P0, PT, R10, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1370 ?trans5;
ISETP.GE.AND P0, PT, R10, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1440 ?trans5;
ISETP.GE.AND P0, PT, R10, -0x18, PT ?trans1;
LOP3.LUT R9, R9, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x1440 ?trans5;
FFMA.RZ R0, R18, R14.reuse, R15.reuse ?trans1;
IADD3 R11, PT, PT, R10, 0x20, RZ ?trans1;
FFMA.RM R7, R18, R14.reuse, R15.reuse ?trans1;
ISETP.NE.AND P1, PT, R10.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R10, RZ, PT ?trans1;
LOP3.LUT R0, R0, 0x7fffff, RZ, 0xc0, !PT ?trans2;
IADD3 R10, PT, PT, -R10, RZ, RZ ?trans2;
LOP3.LUT R8, R0, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R0, R18, R14, R15 ?WAIT3_END_GROUP;
SHF.L.U32 R11, R8, R11, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R0, R7, PT ?trans1;
SEL R7, R10, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R11, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R7, RZ, R7, R8 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R11, RZ, 0x1, R7 ?WAIT3_END_GROUP;
SEL R0, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R0, R0, 0x1, R11, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, R7, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R11, R0, RZ ?WAIT4_END_GROUP;
LOP3.LUT R9, R0, R9, RZ, 0xfc, !PT ?trans1;
BRA 0x1440 ?trans6;
LOP3.LUT R9, R9, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R9, R9, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x1440 ?trans6;
IMAD R9, R7, 0x800000, R9 ?trans1;
BRA 0x1440 ?trans6;
LOP3.LUT R0, R7, 0x80000000, R0, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R9, R0, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x1440 ?trans6;
LOP3.LUT R9, R7, 0x80000000, R0, 0x48, !PT ?trans1;
BRA 0x1440 ?trans6;
MUFU.RSQ R9, -QNAN &wr=0x0 ?trans1;
BRA 0x1440 ?trans5;
FADD.FTZ R9, R0, R3 ?WAIT7_END_GROUP;
HFMA2 R7, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R6 0x0 &req={0} ?trans5;
BRA 0x1460;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: ApplyBC(float*, float*, float*, int, int, float, float)
_Z7ApplyBCPfS_S_iiff:
s_clause 0x1
s_load_b128 s[16:19], s[0:1], 0x18
s_load_b32 s2, s[0:1], 0x34
s_waitcnt lgkmcnt(0)
s_ashr_i32 s3, s16, 31
s_and_b32 s2, s2, 0xffff
s_add_i32 s4, s16, s3
v_mul_f32_e64 v6, 0x4d8ef3c2, s18
s_xor_b32 s4, s4, s3
v_add_f32_e64 v7, s19, s19
v_cvt_f32_u32_e32 v1, s4
s_add_i32 s5, s17, -1
v_mul_f32_e32 v6, v6, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v1, v1
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v1, 0x4f7ffffe, v1
v_cvt_u32_f32_e32 v3, v1
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_sub_i32 s2, 0, s4
s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
v_mul_lo_u32 v0, s2, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v2, 31, v1
v_mul_hi_u32 v0, v3, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v4, v1, v2
v_dual_mov_b32 v3, s19 :: v_dual_add_nc_u32 v0, v3, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_xor_b32_e32 v4, v4, v2
v_xor_b32_e32 v2, s3, v2
v_fma_f32 v5, 0x4d8ef3c2, s18, -v3
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_mul_hi_u32 v0, v4, v0
v_fmamk_f32 v3, s18, 0x4d8ef3c2, v3
s_clause 0x1
s_load_b128 s[8:11], s[0:1], 0x0
s_load_b64 s[6:7], s[0:1], 0x10
v_div_scale_f32 v9, null, v3, v3, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_mul_lo_u32 v8, v0, s4
v_div_scale_f32 v10, null, v3, v3, v7
v_rcp_f32_e32 v14, v9
v_div_scale_f32 v16, s2, v5, v3, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_sub_nc_u32_e32 v4, v4, v8
v_rcp_f32_e32 v8, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v12, s4, v4
v_cmp_le_u32_e32 vcc_lo, s4, v4
v_dual_mul_f32 v13, v7, v3 :: v_dual_cndmask_b32 v4, v4, v12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_2)
v_div_scale_f32 v15, null, v13, v13, v6
v_fma_f32 v12, -v9, v14, 1.0
v_add_nc_u32_e32 v11, 1, v0
s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
v_fma_f32 v18, -v10, v8, 1.0
v_rcp_f32_e32 v17, v15
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v14, v12, v14
v_dual_fmac_f32 v8, v18, v8 :: v_dual_mul_f32 v19, v16, v14
s_waitcnt_depctr 0xfff
v_fma_f32 v12, -v15, v17, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_fmac_f32_e32 v17, v12, v17
v_cndmask_b32_e32 v0, v0, v11, vcc_lo
v_cmp_le_u32_e32 vcc_lo, s4, v4
v_div_scale_f32 v18, s4, v6, v13, v6
v_div_scale_f32 v4, s3, v7, v3, v7
v_mul_f32_e32 v21, v18, v17
v_add_nc_u32_e32 v11, 1, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v0, v0, v11, vcc_lo
s_mov_b32 vcc_lo, s2
v_xor_b32_e32 v0, v0, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v11, v0, v2
v_fma_f32 v2, -v9, v19, v16
v_mul_lo_u32 v12, v11, s16
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_fmac_f32_e32 v19, v2, v14
v_fma_f32 v2, -v15, v21, v18
v_mul_f32_e32 v0, v4, v8
v_cmp_gt_i32_e64 s0, s5, v11
v_fmac_f32_e32 v21, v2, v17
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
v_fma_f32 v20, -v10, v0, v4
v_sub_nc_u32_e32 v12, v1, v12
v_fma_f32 v1, -v9, v19, v16
v_fma_f32 v9, -v15, v21, v18
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_fmac_f32_e32 v0, v20, v8
v_mul_lo_u32 v2, v12, s16
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_div_fmas_f32 v1, v1, v14, v19
s_mov_b32 vcc_lo, s3
v_cmp_eq_u32_e64 s1, 0, v12
v_fma_f32 v4, -v10, v0, v4
v_div_fmas_f32 v8, v4, v8, v0
v_subrev_nc_u32_e32 v0, s16, v2
s_mov_b32 vcc_lo, s4
v_add_nc_u32_e32 v4, v2, v11
v_div_fmas_f32 v14, v9, v17, v21
v_div_fixup_f32 v10, v8, v3, v7
v_add_nc_u32_e32 v0, v0, v11
v_cmp_lt_i32_e32 vcc_lo, 0, v11
v_div_fixup_f32 v9, v1, v3, v5
v_div_fixup_f32 v8, v14, v13, v6
v_add_nc_u32_e32 v6, -1, v4
v_lshl_add_u32 v2, s16, 1, v0
v_ashrrev_i32_e32 v5, 31, v4
s_and_b32 s1, s1, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v7, 31, v6
v_ashrrev_i32_e32 v3, 31, v2
s_and_b32 s1, s1, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s2, s1
s_cbranch_execz .LBB1_2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[13:14], 2, v[2:3]
v_lshlrev_b64 v[16:17], 2, v[4:5]
v_lshlrev_b64 v[22:23], 2, v[6:7]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v18, s1, s10, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_ci_u32_e64 v19, s1, s11, v14, s1
v_add_co_u32 v20, s1, s6, v16
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e64 v21, s1, s7, v17, s1
v_add_co_u32 v24, s1, s8, v16
v_add_co_ci_u32_e64 v25, s1, s9, v17, s1
v_add_co_u32 v22, s1, s6, v22
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e64 v23, s1, s7, v23, s1
v_add_co_u32 v26, s1, s6, v13
v_add_co_ci_u32_e64 v27, s1, s7, v14, s1
s_clause 0x1
global_load_b64 v[20:21], v[20:21], off
global_load_b32 v1, v[22:23], off
v_add_co_u32 v22, s1, s8, v13
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v23, s1, s9, v14, s1
global_load_b32 v18, v[18:19], off
global_load_b32 v19, v[24:25], off
global_load_b96 v[13:15], v[26:27], off offset:-4
global_load_b32 v22, v[22:23], off
s_waitcnt vmcnt(2)
v_dual_fmac_f32 v21, -2.0, v20 :: v_dual_add_f32 v18, v18, v19
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v18, v9, v18, -v22
v_add_f32_e32 v1, v21, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_f32_e32 v1, v1, v15
v_add_f32_e32 v15, v20, v14
v_dual_fmac_f32 v1, -2.0, v14 :: v_dual_fmac_f32 v18, v10, v15
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_f32_e32 v1, v13, v1
v_add_co_u32 v13, s1, s10, v16
v_add_co_ci_u32_e64 v14, s1, s11, v17, s1
s_delay_alu instid0(VALU_DEP_3)
v_fmac_f32_e32 v18, v8, v1
global_store_b32 v[13:14], v18, off
.LBB1_2:
s_or_b32 exec_lo, exec_lo, s2
s_add_i32 s2, s16, -1
v_ashrrev_i32_e32 v1, 31, v0
v_cmp_eq_u32_e64 s1, s2, v12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s1, s1, vcc_lo
s_and_b32 s1, s1, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s0, s1
s_cbranch_execz .LBB1_4
v_lshlrev_b64 v[13:14], 2, v[0:1]
v_lshlrev_b64 v[15:16], 2, v[4:5]
v_lshlrev_b64 v[21:22], 2, v[6:7]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v17, vcc_lo, s10, v13
v_add_co_ci_u32_e32 v18, vcc_lo, s11, v14, vcc_lo
s_delay_alu instid0(VALU_DEP_4)
v_add_co_u32 v19, vcc_lo, s6, v15
v_add_co_ci_u32_e32 v20, vcc_lo, s7, v16, vcc_lo
v_add_co_u32 v23, vcc_lo, s10, v15
v_add_co_ci_u32_e32 v24, vcc_lo, s11, v16, vcc_lo
v_add_co_u32 v15, vcc_lo, s6, v21
v_add_co_ci_u32_e32 v16, vcc_lo, s7, v22, vcc_lo
global_load_b64 v[19:20], v[19:20], off
v_add_co_u32 v21, vcc_lo, s6, v13
global_load_b32 v16, v[15:16], off
v_add_co_ci_u32_e32 v22, vcc_lo, s7, v14, vcc_lo
v_add_co_u32 v25, vcc_lo, s8, v13
v_add_co_ci_u32_e32 v26, vcc_lo, s9, v14, vcc_lo
s_clause 0x1
global_load_b32 v17, v[17:18], off
global_load_b32 v18, v[23:24], off
global_load_b96 v[13:15], v[21:22], off offset:-4
global_load_b32 v21, v[25:26], off
s_waitcnt vmcnt(2)
v_dual_fmac_f32 v20, -2.0, v19 :: v_dual_add_f32 v17, v17, v18
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_f32_e32 v16, v20, v16
s_waitcnt vmcnt(1)
v_add_f32_e32 v15, v16, v15
s_waitcnt vmcnt(0)
v_fma_f32 v16, v9, v17, -v21
v_add_f32_e32 v17, v19, v14
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_fmac_f32 v16, v10, v17 :: v_dual_fmac_f32 v15, -2.0, v14
v_add_f32_e32 v13, v13, v15
s_delay_alu instid0(VALU_DEP_1)
v_fmac_f32_e32 v16, v8, v13
global_store_b32 v[23:24], v16, off
.LBB1_4:
s_or_b32 exec_lo, exec_lo, s0
v_cmp_eq_u32_e64 s1, 0, v11
v_cmp_lt_i32_e32 vcc_lo, 0, v12
v_cmp_gt_i32_e64 s0, s2, v12
s_delay_alu instid0(VALU_DEP_3)
s_and_b32 s1, vcc_lo, s1
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
s_and_b32 s1, s0, s1
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s2, s1
s_cbranch_execz .LBB1_6
v_lshlrev_b64 v[12:13], 2, v[4:5]
v_lshlrev_b64 v[14:15], 2, v[2:3]
v_lshlrev_b64 v[18:19], 2, v[0:1]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v16, s1, s6, v12
v_add_co_ci_u32_e64 v17, s1, s7, v13, s1
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v14, s1, s6, v14
v_add_co_ci_u32_e64 v15, s1, s7, v15, s1
v_add_co_u32 v18, s1, s6, v18
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e64 v19, s1, s7, v19, s1
v_add_co_u32 v20, s1, s10, v12
v_add_co_ci_u32_e64 v21, s1, s11, v13, s1
s_clause 0x1
global_load_b64 v[16:17], v[16:17], off
global_load_b64 v[14:15], v[14:15], off
v_add_co_u32 v12, s1, s8, v12
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v13, s1, s9, v13, s1
global_load_b64 v[18:19], v[18:19], off
global_load_b64 v[22:23], v[20:21], off
global_load_b32 v12, v[12:13], off offset:4
s_waitcnt vmcnt(3)
v_fma_f32 v13, -2.0, v16, v14
s_waitcnt vmcnt(2)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_f32_e32 v13, v13, v18
s_waitcnt vmcnt(1)
v_add_f32_e32 v14, v23, v22
s_waitcnt vmcnt(0)
v_fma_f32 v12, v9, v14, -v12
v_dual_add_f32 v14, v16, v17 :: v_dual_add_f32 v13, v13, v15
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_fmac_f32 v12, v10, v14 :: v_dual_fmac_f32 v13, -2.0, v17
v_add_f32_e32 v13, v19, v13
s_delay_alu instid0(VALU_DEP_1)
v_fmac_f32_e32 v12, v8, v13
global_store_b32 v[20:21], v12, off
.LBB1_6:
s_or_b32 exec_lo, exec_lo, s2
v_cmp_eq_u32_e64 s1, s5, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s1, vcc_lo, s1
s_and_b32 s0, s0, s1
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB1_8
v_lshlrev_b64 v[6:7], 2, v[6:7]
v_lshlrev_b64 v[4:5], 2, v[4:5]
v_lshlrev_b64 v[2:3], 2, v[2:3]
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_4)
v_add_co_u32 v11, vcc_lo, s10, v6
v_add_co_ci_u32_e32 v12, vcc_lo, s11, v7, vcc_lo
v_add_co_u32 v13, vcc_lo, s6, v4
v_add_co_ci_u32_e32 v14, vcc_lo, s7, v5, vcc_lo
v_add_co_u32 v2, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
v_add_co_u32 v4, vcc_lo, s10, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s11, v5, vcc_lo
s_clause 0x1
global_load_b32 v15, v[13:14], off
global_load_b64 v[2:3], v[2:3], off offset:-4
v_add_co_u32 v0, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
s_clause 0x1
global_load_b32 v11, v[11:12], off
global_load_b32 v12, v[4:5], off
global_load_b64 v[0:1], v[0:1], off offset:-4
v_add_co_u32 v13, vcc_lo, s8, v6
v_add_co_ci_u32_e32 v14, vcc_lo, s9, v7, vcc_lo
v_add_co_u32 v6, vcc_lo, s6, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
global_load_b32 v13, v[13:14], off
global_load_b32 v6, v[6:7], off
s_waitcnt vmcnt(5)
v_fma_f32 v3, -2.0, v15, v3
s_waitcnt vmcnt(2)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v1, v3, v1
v_add_f32_e32 v1, v1, v2
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_f32_e32 v1, v1, v6
v_dual_add_f32 v3, v11, v12 :: v_dual_add_f32 v0, v0, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fma_f32 v2, v9, v3, -v13
v_add_f32_e32 v3, v15, v6
v_fmac_f32_e32 v2, v10, v3
s_delay_alu instid0(VALU_DEP_1)
v_fmac_f32_e32 v2, v8, v0
global_store_b32 v[4:5], v2, off
.LBB1_8:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| ApplyBC | 7,937 | 6,876 | stackv2-00000-of-00015 |
// Demangled: Update(float*, float*, float*, float*, int, int, int, int, int, float)
Function : _Z6UpdatePfS_S_S_iiiiif
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R6, c[0x0][0x3a0] &wr=0x1 ?trans1;
S2R R5, SR_CTAID.X &wr=0x2 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x4f0 ?trans1;
S2R R4, SR_TID.X &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans1;
IABS R7, R6 &req={1} ?WAIT4_END_GROUP;
I2F.RP R0, R7 &wr=0x1 ?trans1;
IMAD R5, R5, UR4, R4 &req={2} ?trans1;
LDCU UR4, c[0x0][0x3a4] &wr=0x2 ?trans1;
MUFU.RCP R0, R0 &req={1} &wr=0x1 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, -0x1, URZ &req={2} ?trans1;
IADD3 R2, PT, PT, R0, 0xffffffe, RZ &req={1} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R3, R2 &rd=0x1 &wr=0x2 ?trans2;
HFMA2 R2, -RZ, RZ, 0, 0 &req={1} ?trans1;
IADD3 R8, PT, PT, RZ, -R3, RZ &req={2} ?WAIT5_END_GROUP;
MOV R4, R8 ?trans1;
IABS R8, R5 ?WAIT4_END_GROUP;
IMAD R9, R4, R7, RZ ?trans1;
MOV R4, R8 ?WAIT3_END_GROUP;
IMAD.HI.U32 R3, R3, R9, R2 ?WAIT6_END_GROUP;
IMAD.HI.U32 R0, R3, R4, RZ ?WAIT5_END_GROUP;
IADD3 R2, PT, PT, -R0, RZ, RZ ?WAIT5_END_GROUP;
IMAD R2, R7, R2, R4 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R7, R2, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R2, PT, PT, R2, -R7, RZ ?trans2;
@!P1 IADD3 R0, PT, PT, R0, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P0, PT, R2, R7, PT ?trans1;
LOP3.LUT R2, R5, R6, RZ, 0x3c, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R2, RZ, PT ?trans1;
IADD3 R2, PT, PT, R6, -0x1, RZ ?WAIT6_END_GROUP;
@P0 IADD3 R0, PT, PT, R0, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R6, RZ, PT ?WAIT5_END_GROUP;
@!P1 IADD3 R0, PT, PT, -R0, RZ, RZ ?WAIT8_END_GROUP;
@!P0 LOP3.LUT R0, RZ, R6, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R3, PT, PT, -R0.reuse, RZ, RZ ?trans1;
ISETP.GE.AND P0, PT, R0, UR4, PT ?WAIT4_END_GROUP;
IMAD R3, R6, R3, R5 ?WAIT4_END_GROUP;
IMAD R8, R3.reuse, R6, RZ ?trans1;
ISETP.GE.OR P0, PT, R3, R2, P0 ?trans1;
VIMNMX.S32 R2, R0, R3, PT ?WAIT5_END_GROUP;
ISETP.LT.OR P0, PT, R2, 0x1, P0 ?trans1;
IADD3 R2, PT, PT, R0, R8, RZ ?WAIT12_END_GROUP;
@P0 BRA 0x4e0 &req={3,0} ?trans5;
LDC.64 R12, c[0x0][0x390] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x390] &wr=0x1 ?trans1;
SHF.R.S32.HI R9, RZ, 0x1f, R8.reuse ?trans1;
MOV R4, R0 ?trans1;
MOV R5, RZ ?trans1;
IADD3 R7, PT, PT, R0, -R6, R8 ?WAIT3_END_GROUP;
LDC.64 R16, c[0x0][0x380] &wr=0x2 ?trans1;
IADD.64 R18, R8, R4 ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x398] &wr=0x3 ?trans1;
LEA R14, P0, R18, UR4, 0x2 &req={1} ?WAIT4_END_GROUP;
LEA.HI.X R15, R18, UR5, R19, 0x2, P0 ?trans1;
IMAD.WIDE R8, R2, 0x4, R12 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R12, R7, 0x4, R12 ?trans1;
LDG.E R19, desc[UR6][R14.64+0x4] &wr=0x4 ?trans3;
IMAD.WIDE R10, R6, 0x4, R8 ?trans1;
LDG.E R21, desc[UR6][R14.64+-0x4] &wr=0x5 ?trans4;
LDG.E R13, desc[UR6][R12.64] &wr=0x4 ?trans4;
LDG.E R10, desc[UR6][R10.64] &wr=0x4 ?trans1;
IMAD.WIDE R6, R2, 0x4, R16 &req={2} ?WAIT2_END_GROUP;
LDC.64 R16, c[0x0][0x388] &wr=0x0 ?trans1;
LDG.E R8, desc[UR6][R8.64] &wr=0x2 ?trans1;
IMAD.WIDE R4, R2, 0x4, R4 &req={3} ?WAIT3_END_GROUP;
LDG.E R7, desc[UR6][R6.64] &wr=0x3 ?trans4;
LDG.E R5, desc[UR6][R4.64] &wr=0x3 ?trans1;
FADD R18, R10, R13 &req={4} ?WAIT4_END_GROUP;
FADD R18, R18, R19 ?trans1;
FADD R10, R8, R8 &req={2} ?WAIT3_END_GROUP;
FADD R21, R18, R21 &req={5} ?trans1;
FADD R10, R10, -R7 &req={3} ?WAIT3_END_GROUP;
FFMA R21, R8, -4, R21 ?trans1;
IMAD.WIDE R8, R2, 0x4, R16 &req={0} ?WAIT4_END_GROUP;
FFMA R21, R5, R21, R10 ?WAIT5_END_GROUP;
STG.E desc[UR6][R8.64], R21 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU UR4, c[0x0][0x3a8] &wr=0x1 ?trans2;
ISETP.NE.AND P0, PT, R0, UR4, PT &req={1} ?WAIT5_END_GROUP;
ISETP.NE.OR P0, PT, R3, UR4, P0 ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x3b0] &wr=0x2 ?trans1;
IMAD.WIDE R2, R2, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
LDG.E R4, desc[UR6][R2.64] &rd=0x1 &wr=0x5 ?trans1;
UFMUL UR4, UR9, 6.28318576640000000000e+10 &req={2} ?trans1;
I2FP.F32.S32 R0, UR8 ?WAIT5_END_GROUP;
FMUL R0, R0, UR4 ?WAIT4_END_GROUP;
FMUL R5, R0.reuse, 0.63661974668502807617 ?trans1;
FSETP.GE.AND P0, PT, |R0|, 105615, PT ?WAIT5_END_GROUP;
F2I.NTZ R5, R5 &wr=0x2 ?trans2;
I2FP.F32.S32 R7, R5 &req={2} ?WAIT5_END_GROUP;
FFMA R6, R7, -1.5707962512969970703, R0 ?WAIT4_END_GROUP;
FFMA R6, R7, -7.5497894158615963534e-08, R6 ?WAIT4_END_GROUP;
FFMA R8, R7, -5.3903029534742383927e-15, R6 &req={0} ?trans1;
@!P0 BRA 0xc90 &req={1} ?trans6;
FSETP.NEU.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@!P0 FMUL R8, RZ, R0 ?trans1;
@!P0 MOV R5, RZ ?trans1;
@!P0 BRA 0xc90 ?trans6;
LDCU.64 UR4, c[0x4][URZ] &wr=0x0 ?trans1;
IMAD.SHL.U32 R5, R0, 0x100, RZ ?trans2;
HFMA2 R12, -RZ, RZ, 0, 0 ?trans1;
MOV.64 R6, RZ ?trans2;
MOV.64 R10, RZ ?WAIT3_END_GROUP;
LOP3.LUT R5, R5, 0x80000000, RZ, 0xfc, !PT ?trans1;
MOV.64 R8, UR4 &req={0} ?WAIT8_END_GROUP;
LDG.E.CONSTANT R13, desc[UR6][R8.64] &rd=0x0 &wr=0x2 ?trans1;
IADD3 R12, PT, PT, R12, 0x1, RZ ?trans1;
ISETP.EQ.AND P1, PT, R10.reuse, RZ, PT ?trans1;
ISETP.EQ.AND P2, PT, R10.reuse, 0x4, PT ?trans1;
ISETP.EQ.AND P3, PT, R10.reuse, 0x8, PT ?trans1;
ISETP.EQ.AND P4, PT, R10.reuse, 0xc, PT ?trans1;
ISETP.EQ.AND P5, PT, R10.reuse, 0x10, PT ?trans1;
ISETP.EQ.AND P6, PT, R10, 0x14, PT ?trans1;
ISETP.NE.AND P0, PT, R12, 0x6, PT ?trans1;
IADD.64 R10, R10, 0x4 ?trans2;
IADD.64 R8, R8, 0x4 &req={0} ?WAIT2_END_GROUP;
IMAD.WIDE.U32 R6, R13, R5, R6 &req={2} ?WAIT3_END_GROUP;
@P1 MOV R14, R6.reuse ?trans1;
@P2 MOV R15, R6.reuse ?trans1;
@P3 MOV R16, R6.reuse ?trans1;
@P4 MOV R17, R6.reuse ?trans1;
@P5 MOV R18, R6.reuse ?trans1;
@P6 MOV R19, R6 ?trans1;
MOV R6, R7 ?trans1;
MOV R7, RZ ?trans1;
@P0 BRA 0x6d0 ?trans6;
SHF.R.U32.HI R5, RZ, 0x17, R0 ?WAIT4_END_GROUP;
LOP3.LUT R8, R5.reuse, 0xe0, RZ, 0xc0, !PT ?trans2;
LOP3.LUT P5, RZ, R5, 0x1f, RZ, 0xc0, !PT ?trans2;
IADD3 R8, PT, PT, R8, -0x80, RZ ?WAIT4_END_GROUP;
SHF.R.U32.HI R8, RZ, 0x5, R8 ?WAIT5_END_GROUP;
IMAD.U32 R11, R8, -0x4, RZ ?WAIT5_END_GROUP;
ISETP.EQ.AND P2, PT, R11.reuse, -0x18, PT ?trans1;
ISETP.EQ.AND P3, PT, R11.reuse, -0x14, PT ?trans1;
ISETP.EQ.AND P1, PT, R11.reuse, -0x10, PT ?trans1;
ISETP.EQ.AND P0, PT, R11.reuse, -0xc, PT ?trans1;
ISETP.EQ.AND P6, PT, R11.reuse, -0x4, PT ?trans1;
ISETP.EQ.AND P4, PT, R11, RZ, PT ?WAIT8_END_GROUP;
@P2 MOV R8, R14.reuse ?trans1;
ISETP.EQ.AND P2, PT, R11.reuse, -0x8, PT ?trans1;
@P3 MOV R9, R14 ?trans1;
@P3 MOV R8, R15 ?trans1;
ISETP.EQ.AND P3, PT, R11, 0x4, PT ?trans1;
@P1 MOV R8, R16.reuse ?trans1;
@P0 MOV R8, R17 ?trans1;
@P1 MOV R9, R15 ?trans1;
@P0 MOV R9, R16 ?WAIT6_END_GROUP;
@P2 MOV R8, R18 ?trans1;
@P6 MOV R8, R19 ?trans1;
@P4 MOV R8, R6 ?trans1;
@P2 MOV R9, R17 ?trans1;
@P6 MOV R9, R18 ?trans1;
@P4 MOV R9, R19 ?trans1;
@P3 MOV R9, R6 ?trans1;
MOV R10, R8 ?trans1;
@!P5 BRA 0xb00 ?trans6;
@P1 MOV R7, R14 ?trans1;
@P0 MOV R7, R15 ?trans1;
ISETP.EQ.AND P0, PT, R11, 0x8, PT ?trans1;
LOP3.LUT R5, R5, 0x1f, RZ, 0xc0, !PT ?trans1;
@P2 MOV R7, R16 ?trans1;
@P6 MOV R7, R17 ?trans1;
@P4 MOV R7, R18 ?trans1;
@P3 MOV R7, R19 ?trans1;
IADD3 R8, PT, PT, -R5, 0x20, RZ ?trans2;
SHF.L.U32 R10, R10, R5, RZ ?WAIT2_END_GROUP;
SHF.L.U32 R5, R9, R5, RZ ?trans2;
SHF.R.U32.HI R9, RZ, R8, R9 ?trans1;
@P0 MOV R7, R6 ?WAIT3_END_GROUP;
IADD3 R10, PT, PT, R10, R9, RZ ?trans2;
SHF.R.U32.HI R8, RZ, R8, R7 ?WAIT4_END_GROUP;
IADD3 R9, PT, PT, R5, R8, RZ ?WAIT7_END_GROUP;
IMAD.SHL.U32 R12, R10, 0x4, RZ ?trans1;
SHF.L.U32.HI R11, R9.reuse, 0x2, R10 ?trans1;
IMAD.SHL.U32 R8, R9, 0x4, RZ ?trans1;
ISETP.GE.AND P0, PT, R0, RZ, PT ?trans1;
UMOV.64 UR4, 0x3bf921fb54442d19 ?trans1;
SHF.R.S32.HI R5, RZ, 0x1f, R12 ?trans2;
LOP3.LUT R0, R11, R0, RZ, 0x3c, !PT ?trans2;
LOP3.LUT R8, R5.reuse, R8, RZ, 0x3c, !PT ?trans2;
LOP3.LUT R9, R5, R11, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
SHF.R.U32.HI R5, RZ, 0x1e, R10 ?trans2;
I2F.F64.S64 R6, R8 &wr=0x0 ?trans1;
ISETP.GE.AND P1, PT, R0, RZ, PT ?trans1;
LEA.HI R5, R12, R5, RZ, 0x1 ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, -R5, RZ, RZ ?WAIT5_END_GROUP;
@!P0 MOV R5, R0 ?WAIT15_END_GROUP;
NOP ?WAIT8_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R6, R6, UR4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R6, R6 &req={0} &wr=0x0 ?trans2;
FSEL R8, -R6, R6, !P1 &req={0} ?WAIT7_END_GROUP;
LOP3.LUT R6, R5.reuse, 0x1, RZ, 0xc0, !PT ?trans1;
FMUL R7, R8, R8 ?trans1;
MOV R0, 0x37cbac00 ?trans1;
MOV R10, 0x3d2aaabb ?trans1;
MOV R9, 0x3effffff ?trans1;
ISETP.NE.U32.AND P0, PT, R6, 0x1, PT ?trans1;
LOP3.LUT P1, RZ, R5, 0x2, RZ, 0xc0, !PT ?trans1;
FFMA R0, R7, R0, -0.0013887860113754868507 ?WAIT3_END_GROUP;
FSEL R10, R10, 0.0083327032625675201416, !P0 ?trans1;
FSEL R9, -R9, -0.16666662693023681641, !P0 ?trans1;
FSEL R6, R0, -0.00019574658654164522886, !P0 ?trans1;
FSEL R0, R8, 1, P0 ?WAIT4_END_GROUP;
FFMA R6, R7.reuse, R6, R10 ?trans1;
FFMA R5, R7, R0, RZ ?WAIT3_END_GROUP;
FFMA R6, R7, R6, R9 ?WAIT4_END_GROUP;
FFMA R5, R5, R6, R0 ?WAIT4_END_GROUP;
@P1 FADD R5, RZ, -R5 ?WAIT4_END_GROUP;
FFMA R5, R5, 45, R4 &req={5} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R5 ?trans1;
EXIT ?trans5;
BRA 0xdd0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: Update(float*, float*, float*, float*, int, int, int, int, int, float)
_Z6UpdatePfS_S_S_iiiiif:
s_clause 0x1
s_load_b128 s[16:19], s[0:1], 0x20
s_load_b32 s2, s[0:1], 0x44
s_waitcnt lgkmcnt(0)
s_ashr_i32 s3, s16, 31
s_and_b32 s2, s2, 0xffff
s_add_i32 s4, s16, s3
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_xor_b32 s4, s4, s3
v_cvt_f32_u32_e32 v1, s4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v1, v1
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v1, 0x4f7ffffe, v1
v_cvt_u32_f32_e32 v3, v1
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_sub_i32 s2, 0, s4
s_load_b256 s[8:15], s[0:1], 0x0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_lo_u32 v0, s2, v3
s_add_i32 s2, s16, -1
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_hi_u32 v0, v3, v0
v_add_nc_u32_e32 v4, v1, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_xor_b32_e32 v4, v4, v2
v_xor_b32_e32 v2, s3, v2
v_add_nc_u32_e32 v0, v3, v0
s_add_i32 s3, s17, -1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v0, v4, v0
v_mul_lo_u32 v3, v0, s4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v3, v4, v3
v_add_nc_u32_e32 v4, 1, v0
v_subrev_nc_u32_e32 v5, s4, v3
v_cmp_le_u32_e32 vcc_lo, s4, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_cndmask_b32 v3, v3, v5 :: v_dual_cndmask_b32 v0, v0, v4
v_cmp_le_u32_e32 vcc_lo, s4, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v4, 1, v0
v_cndmask_b32_e32 v0, v0, v4, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v0, v0, v2
v_sub_nc_u32_e32 v2, v0, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v0, v2, s16
v_sub_nc_u32_e32 v3, v1, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
v_mul_lo_u32 v4, v3, s16
v_cmp_gt_i32_e32 vcc_lo, s2, v3
v_cmp_gt_i32_e64 s2, s3, v2
v_cmp_lt_i32_e64 s3, 0, v2
v_cmp_lt_i32_e64 s4, 0, v3
s_and_b32 s2, vcc_lo, s2
v_add_nc_u32_e32 v0, v4, v2
s_delay_alu instid0(VALU_DEP_3)
s_and_b32 s2, s2, s3
s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
s_and_b32 s3, s4, s2
s_delay_alu instid0(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
s_and_saveexec_b32 s2, s3
s_cbranch_execz .LBB0_2
v_subrev_nc_u32_e32 v4, s16, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[10:11], 2, v[0:1]
v_add_nc_u32_e32 v4, v4, v2
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v12, vcc_lo, s12, v10
v_add_co_ci_u32_e32 v13, vcc_lo, s13, v11, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshl_add_u32 v6, s16, 1, v4
v_ashrrev_i32_e32 v5, 31, v4
v_ashrrev_i32_e32 v7, 31, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[4:5], 2, v[4:5]
v_lshlrev_b64 v[6:7], 2, v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v6, vcc_lo, s12, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s13, v7, vcc_lo
s_delay_alu instid0(VALU_DEP_4)
v_add_co_u32 v4, vcc_lo, s12, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s13, v5, vcc_lo
s_clause 0x2
global_load_b64 v[12:13], v[12:13], off
global_load_b32 v14, v[6:7], off
global_load_b32 v15, v[4:5], off
v_add_nc_u32_e32 v8, -1, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v9, 31, v8
v_lshlrev_b64 v[8:9], 2, v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v4, vcc_lo, s12, v8
v_add_co_ci_u32_e32 v5, vcc_lo, s13, v9, vcc_lo
v_add_co_u32 v6, vcc_lo, s8, v10
v_add_co_ci_u32_e32 v7, vcc_lo, s9, v11, vcc_lo
global_load_b32 v8, v[4:5], off
global_load_b32 v6, v[6:7], off
v_add_co_u32 v4, vcc_lo, s14, v10
v_add_co_ci_u32_e32 v5, vcc_lo, s15, v11, vcc_lo
global_load_b32 v4, v[4:5], off
s_waitcnt vmcnt(3)
v_add_f32_e32 v5, v14, v15
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_f32_e32 v5, v5, v13
s_waitcnt vmcnt(2)
v_add_f32_e32 v5, v5, v8
s_waitcnt vmcnt(1)
v_fma_f32 v6, v12, 2.0, -v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v5, -4.0, v12
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v6, v4, v5
v_add_co_u32 v4, vcc_lo, s10, v10
v_add_co_ci_u32_e32 v5, vcc_lo, s11, v11, vcc_lo
global_store_b32 v[4:5], v6, off
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s2
v_cmp_eq_u32_e32 vcc_lo, s18, v3
v_cmp_eq_u32_e64 s2, s18, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, vcc_lo, s2
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB0_9
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_sqrt_f32_e32 v3, 0
s_load_b64 s[0:1], s[0:1], 0x30
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s10, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
s_waitcnt_depctr 0xfff
v_fmac_f32_e32 v3, 0, v3
global_load_b32 v2, v[0:1], off
v_add_f32_e32 v3, v3, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_f32_e32 v3, 0x40490fdb, v3
v_cvt_f32_i32_e32 v4, s0
v_add_f32_e32 v3, v3, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v3, 0x41200000, v3
v_mul_f32_e32 v3, 0x4e6e6b28, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mul_f32_e32 v3, s1, v3
s_mov_b32 s1, 0
v_mul_f32_e32 v3, v3, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cmp_ngt_f32_e64 s0, 0x48000000, |v3|
v_readfirstlane_b32 s2, v3
s_and_b32 vcc_lo, exec_lo, s0
s_delay_alu instid0(VALU_DEP_1)
s_and_b32 s0, s2, 0x7fffffff
s_cbranch_vccz .LBB0_5
s_and_b32 s2, s0, 0x7fffff
s_lshr_b32 s3, s0, 23
s_bitset1_b32 s2, 23
s_addk_i32 s3, 0xff88
s_mul_hi_u32 s4, s2, 0xfe5163ab
s_mul_i32 s5, s2, 0x3c439041
s_mul_hi_u32 s6, s2, 0x3c439041
s_add_u32 s4, s4, s5
s_addc_u32 s5, 0, s6
s_mul_i32 s6, s2, 0xdb629599
s_mul_hi_u32 s7, s2, 0xdb629599
s_add_u32 s5, s5, s6
s_addc_u32 s6, 0, s7
s_mul_i32 s7, s2, 0xf534ddc0
s_mul_hi_u32 s8, s2, 0xf534ddc0
s_add_u32 s6, s6, s7
s_addc_u32 s7, 0, s8
s_mul_i32 s8, s2, 0xfc2757d1
s_mul_hi_u32 s9, s2, 0xfc2757d1
s_add_u32 s7, s7, s8
s_addc_u32 s8, 0, s9
s_mul_i32 s9, s2, 0x4e441529
s_mul_hi_u32 s10, s2, 0x4e441529
s_add_u32 s8, s8, s9
s_addc_u32 s9, 0, s10
s_cmp_gt_u32 s3, 63
s_mul_i32 s10, s2, 0xfe5163ab
s_mul_hi_u32 s11, s2, 0xa2f9836e
s_mul_i32 s2, s2, 0xa2f9836e
s_cselect_b32 s12, s5, s7
s_cselect_b32 s4, s4, s6
s_cselect_b32 s5, s10, s5
s_add_u32 s2, s9, s2
s_addc_u32 s9, 0, s11
s_cmp_gt_u32 s3, 63
s_cselect_b32 s10, 0xffffffc0, 0
s_cselect_b32 s6, s6, s8
s_cselect_b32 s2, s7, s2
s_cselect_b32 s7, s8, s9
s_add_i32 s10, s10, s3
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_gt_u32 s10, 31
s_cselect_b32 s3, 0xffffffe0, 0
s_cselect_b32 s8, s6, s2
s_cselect_b32 s2, s2, s7
s_cselect_b32 s6, s12, s6
s_cselect_b32 s7, s4, s12
s_cselect_b32 s4, s5, s4
s_add_i32 s3, s3, s10
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_gt_u32 s3, 31
s_cselect_b32 s5, 0xffffffe0, 0
s_cselect_b32 s2, s8, s2
s_cselect_b32 s8, s6, s8
s_cselect_b32 s6, s7, s6
s_cselect_b32 s4, s4, s7
s_add_i32 s5, s5, s3
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
s_sub_i32 s3, 32, s5
s_cmp_eq_u32 s5, 0
v_mov_b32_e32 v4, s3
s_cselect_b32 s5, -1, 0
v_alignbit_b32 v5, s2, s8, v4
v_alignbit_b32 v6, s8, s6, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_readfirstlane_b32 s3, v5
v_cndmask_b32_e64 v5, v6, s8, s5
s_delay_alu instid0(VALU_DEP_2)
s_cselect_b32 s2, s2, s3
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_alignbit_b32 v6, s2, v5, 30
s_bfe_u32 s3, s2, 0x1001d
s_delay_alu instid0(SALU_CYCLE_1)
s_sub_i32 s7, 0, s3
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_xor_b32_e32 v6, s7, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_clz_i32_u32_e32 v7, v6
v_min_u32_e32 v7, 32, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_lshlrev_b32_e32 v9, 23, v7
v_alignbit_b32 v4, s6, s4, v4
v_sub_nc_u32_e32 v8, 31, v7
v_cndmask_b32_e64 v4, v4, s6, s5
s_delay_alu instid0(VALU_DEP_1)
v_alignbit_b32 v5, v5, v4, 30
v_alignbit_b32 v4, v4, s4, 30
s_lshr_b32 s4, s2, 29
s_lshr_b32 s2, s2, 30
s_lshl_b32 s4, s4, 31
v_xor_b32_e32 v5, s7, v5
v_xor_b32_e32 v4, s7, v4
s_or_b32 s5, s4, 0.5
s_add_i32 s2, s3, s2
v_sub_nc_u32_e32 v9, s5, v9
v_alignbit_b32 v6, v6, v5, v8
v_alignbit_b32 v4, v5, v4, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_alignbit_b32 v5, v6, v4, 9
v_clz_i32_u32_e32 v8, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_min_u32_e32 v8, 32, v8
v_sub_nc_u32_e32 v10, 31, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_alignbit_b32 v4, v5, v4, v10
v_lshrrev_b32_e32 v5, 9, v6
v_lshrrev_b32_e32 v4, 9, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_or_b32_e32 v5, v5, v9
v_add_nc_u32_e32 v7, v8, v7
v_lshlrev_b32_e32 v6, 23, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
v_sub_nc_u32_e32 v4, v4, v6
v_mul_f32_e32 v6, 0x3fc90fda, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v4, 0x33000000, v4
v_fma_f32 v7, 0x3fc90fda, v5, -v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_or_b32_e32 v4, s4, v4
v_fmamk_f32 v5, v5, 0x33a22168, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v5, 0x3fc90fda, v4
v_add_f32_e32 v4, v6, v5
s_branch .LBB0_6
.LBB0_5:
s_mov_b32 s1, -1
.LBB0_6:
v_mov_b32_e32 v5, s2
s_and_not1_b32 vcc_lo, exec_lo, s1
s_cbranch_vccnz .LBB0_8
v_mul_f32_e64 v4, 0x3f22f983, |v3|
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rndne_f32_e32 v5, v4
v_fma_f32 v4, 0xbfc90fda, v5, |v3|
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmamk_f32 v4, v5, 0xb3a22168, v4
v_fmamk_f32 v4, v5, 0xa7c234c4, v4
v_cvt_i32_f32_e32 v5, v5
.LBB0_8:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_dual_mul_f32 v6, v4, v4 :: v_dual_lshlrev_b32 v9, 30, v5
s_mov_b32 s1, 0xb94c1982
s_mov_b32 s2, 0x37d75334
v_xor_b32_e32 v10, s0, v3
v_fmaak_f32 v7, s1, v6, 0x3c0881c4
v_and_b32_e32 v5, 1, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_fmaak_f32 v7, v6, v7, 0xbe2aaa9d
v_fmaak_f32 v8, s2, v6, 0xbab64f3b
v_cmp_eq_u32_e32 vcc_lo, 0, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mul_f32_e32 v7, v6, v7
v_fmaak_f32 v8, v6, v8, 0x3d2aabf7
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_dual_fmac_f32 v4, v4, v7 :: v_dual_and_b32 v7, 0x80000000, v9
v_fmaak_f32 v8, v6, v8, 0xbf000004
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_xor_b32_e32 v5, v10, v7
v_fma_f32 v6, v6, v8, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v4, v6, v4, vcc_lo
v_cmp_class_f32_e64 vcc_lo, v3, 0x1f8
v_xor_b32_e32 v4, v5, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v4, 0x42340000, v4
v_cndmask_b32_e32 v3, 0x7fc00000, v4, vcc_lo
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_add_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
.LBB0_9:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| Update | 5,213 | 6,732 | stackv2-00000-of-00015 |
// Demangled: MultiplicationMulti(float*, float*, float*)
Function : _Z19MultiplicationMultiPfS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R19, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans1;
HFMA2 R20, -RZ, RZ, 0, 0 ?trans1;
UMOV UR4, URZ ?WAIT4_END_GROUP;
S2UR UR5, SR_CTAID.X &wr=0x4 ?trans1;
ISETP.GE.U32.AND P1, PT, R19.reuse, 0x8, PT &req={1} ?trans1;
LOP3.LUT P0, R3, R19.reuse, 0x7, RZ, 0xc0, !PT ?trans1;
IMAD R2, R19, UR5, RZ &req={4} ?WAIT11_END_GROUP;
@!P1 BRA 0x400 &req={3,2,0} ?trans5;
LDC.64 R6, c[0x0][0x380] &wr=0x0 ?trans1;
LOP3.LUT R18, R19, 0xfffffff8, RZ, 0xc0, !PT ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x388] &wr=0x1 ?trans1;
IMAD R23, R19.reuse, 0x3, R0.reuse ?trans1;
IADD3 R21, PT, PT, R0, R19, R19 ?trans1;
IMAD R27, R19.reuse, 0x5, R0.reuse ?trans1;
LEA R25, R19.reuse, R0.reuse, 0x2 ?trans1;
IMAD R29, R19.reuse, 0x6, R0.reuse ?trans1;
MOV R20, RZ ?trans1;
IMAD R31, R19.reuse, 0x7, R0 ?trans1;
IADD3 R33, PT, PT, R19, R0, RZ ?trans2;
IADD3 R18, PT, PT, -R18, RZ, RZ ?trans1;
UMOV UR4, URZ ?trans1;
IMAD.WIDE.U32 R6, R2, 0x4, R6 &req={0} ?WAIT5_END_GROUP;
IADD.64 R6, R6, 0x10 ?WAIT8_END_GROUP;
IMAD.WIDE.U32 R34, R0, 0x4, R4.reuse &req={1} ?trans1;
LDG.E R37, desc[UR6][R6.64+-0x10] &wr=0x2 ?trans3;
IMAD.WIDE.U32 R16, R33, 0x4, R4.reuse ?trans1;
LDG.E R24, desc[UR6][R6.64+-0xc] &wr=0x3 ?trans4;
LDG.E R35, desc[UR6][R34.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R8, R21, 0x4, R4 ?WAIT3_END_GROUP;
LDG.E R22, desc[UR6][R16.64] &rd=0x0 &wr=0x3 ?trans1;
IMAD.WIDE.U32 R10, R23, 0x4, R4 ?WAIT3_END_GROUP;
LDG.E R26, desc[UR6][R8.64] &rd=0x1 &wr=0x4 ?trans1;
IMAD.WIDE.U32 R12, R25, 0x4, R4 ?WAIT3_END_GROUP;
LDG.E R28, desc[UR6][R6.64+-0x8] &wr=0x4 ?trans1;
IMAD.WIDE.U32 R14, R27, 0x4, R4 ?WAIT3_END_GROUP;
LDG.E R11, desc[UR6][R10.64] &wr=0x5 ?trans4;
LDG.E R30, desc[UR6][R6.64+-0x4] &wr=0x5 ?trans1;
IMAD.WIDE.U32 R16, R29, 0x4, R4 &req={0} ?WAIT3_END_GROUP;
LDG.E R13, desc[UR6][R12.64] &wr=0x5 ?trans4;
LDG.E R32, desc[UR6][R6.64] &wr=0x5 ?trans1;
IMAD.WIDE.U32 R8, R31, 0x4, R4 &req={1} ?WAIT3_END_GROUP;
LDG.E R15, desc[UR6][R14.64] &wr=0x5 ?trans4;
LDG.E R34, desc[UR6][R6.64+0x4] &wr=0x5 ?trans4;
LDG.E R17, desc[UR6][R16.64] &wr=0x5 ?trans4;
LDG.E R36, desc[UR6][R6.64+0x8] &wr=0x5 ?trans4;
LDG.E R9, desc[UR6][R8.64] &wr=0x5 ?trans4;
LDG.E R10, desc[UR6][R6.64+0xc] &rd=0x0 &wr=0x5 ?trans1;
IADD3 R18, PT, PT, R18, 0x8, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R18, RZ, PT ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
IMAD.WIDE.U32 R4, R19, 0x20, R4 ?trans1;
IADD.64 R6, R6, 0x20 &req={0} ?WAIT3_END_GROUP;
FFMA R35, R37, R35, R20 &req={2} ?WAIT4_END_GROUP;
FFMA R35, R24, R22, R35 &req={3} ?WAIT4_END_GROUP;
FFMA R35, R28, R26, R35 &req={4} ?WAIT4_END_GROUP;
FFMA R11, R30, R11, R35 &req={5} ?WAIT4_END_GROUP;
FFMA R11, R32, R13, R11 ?WAIT4_END_GROUP;
FFMA R11, R34, R15, R11 ?WAIT4_END_GROUP;
FFMA R11, R36, R17, R11 ?WAIT4_END_GROUP;
FFMA R20, R10, R9, R11 ?trans1;
@P1 BRA 0x1a0 ?trans6;
@!P0 BRA 0x890 ?trans5;
ISETP.GE.U32.AND P1, PT, R3, 0x4, PT ?trans1;
LOP3.LUT R17, R19, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R17, RZ, PT ?WAIT7_END_GROUP;
@!P1 BRA 0x640 ?trans6;
LDC.64 R8, c[0x0][0x380] &wr=0x0 ?trans1;
IMAD R10, R19, UR4, R0 ?trans2;
HFMA2 R3, -RZ, RZ, 0, 0 ?trans1;
UMOV UR5, URZ ?trans1;
IADD3 R7, PT, PT, R2, UR4, RZ ?trans2;
IADD3 R16, PT, PT, R10, R19, RZ ?trans1;
IADD.64 R12, R2, UR4 ?trans2;
LDC.64 R4, c[0x0][0x388] &wr=0x1 ?trans8;
LDC.64 R22, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R8, R7, 0x4, R8 &req={0} ?WAIT6_END_GROUP;
LDG.E R9, desc[UR6][R8.64] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R10, R10, 0x4, R4 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R14, R16.reuse, 0x4, R4 ?trans1;
IADD3 R16, PT, PT, R16, R19.reuse, RZ ?trans1;
LDG.E R10, desc[UR6][R10.64] &wr=0x3 ?trans1;
LEA R6, P1, R12, R22, 0x2 &req={2} ?trans2;
IADD3 R21, PT, PT, R16, R19, RZ ?trans1;
LDG.E R14, desc[UR6][R14.64] &wr=0x2 ?trans1;
LEA.HI.X R7, R12, R23, R13, 0x2, P1 ?trans1;
IMAD.WIDE.U32 R12, R16, 0x4, R4 ?WAIT4_END_GROUP;
LDG.E R16, desc[UR6][R6.64+0x4] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R4, R21, 0x4, R4 ?WAIT3_END_GROUP;
LDG.E R12, desc[UR6][R12.64] &wr=0x4 ?trans4;
LDG.E R18, desc[UR6][R6.64+0x8] &wr=0x4 ?trans4;
LDG.E R4, desc[UR6][R4.64] &wr=0x5 ?trans4;
LDG.E R8, desc[UR6][R6.64+0xc] &wr=0x5 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
FFMA R9, R9, R10, R20 &req={3} ?WAIT4_END_GROUP;
FFMA R9, R16, R14, R9 &req={2} ?WAIT4_END_GROUP;
FFMA R9, R18, R12, R9 &req={4} ?WAIT4_END_GROUP;
FFMA R20, R8, R4, R9 &req={5} ?WAIT7_END_GROUP;
@!P0 BRA 0x890 ?trans5;
ISETP.NE.AND P1, PT, R17, 0x1, PT ?trans1;
LOP3.LUT R4, R19, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P0, PT, R4, 0x1, PT ?WAIT7_END_GROUP;
@!P1 BRA 0x7f0 ?trans6;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans1;
MOV R8, R2 ?trans1;
HFMA2 R9, -RZ, RZ, 0, 0 ?trans1;
UMOV UR5, URZ ?trans1;
IADD3 R13, PT, PT, R2, UR4, RZ ?WAIT3_END_GROUP;
IADD.64 R10, R8, UR4 ?trans2;
LDC.64 R14, c[0x0][0x380] &wr=0x1 ?trans1;
IMAD R8, R19, UR4, R0 ?WAIT5_END_GROUP;
IADD3 R17, PT, PT, R8, R19, RZ ?trans2;
LDC.64 R6, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R4, R13, 0x4, R4 &req={0} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR6][R4.64] &wr=0x3 ?trans1;
LEA R12, P1, R10, R14, 0x2 &req={1} ?WAIT4_END_GROUP;
LEA.HI.X R13, R10, R15, R11, 0x2, P1 ?trans1;
IMAD.WIDE.U32 R8, R8, 0x4, R6 &req={2} ?WAIT5_END_GROUP;
LDG.E R13, desc[UR6][R12.64+0x4] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R6, R17, 0x4, R6 ?WAIT3_END_GROUP;
LDG.E R8, desc[UR6][R8.64] &wr=0x3 ?trans4;
LDG.E R6, desc[UR6][R6.64] &wr=0x2 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x2, URZ ?trans1;
FFMA R20, R5, R8, R20 &req={3} ?WAIT4_END_GROUP;
FFMA R20, R13, R6, R20 &req={2} ?WAIT7_END_GROUP;
@P0 BRA 0x890 ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans1;
IADD3 R9, PT, PT, R2, UR4, RZ ?trans1;
IMAD R19, R19, UR4, R0 ?WAIT6_END_GROUP;
LDC.64 R6, c[0x0][0x388] &wr=0x1 ?trans1;
IMAD.WIDE.U32 R4, R9, 0x4, R4 &req={0} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR6][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R6, R19, 0x4, R6 &req={1} ?WAIT6_END_GROUP;
LDG.E R6, desc[UR6][R6.64] &wr=0x2 ?trans2;
FFMA R20, R5, R6, R20 &req={2} ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans1;
IADD3 R3, PT, PT, R2, R0, RZ ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R2, R3, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R20 ?trans1;
EXIT ?trans5;
BRA 0x8e0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: MultiplicationMulti(float*, float*, float*)
_Z19MultiplicationMultiPfS_S_:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s2, 0xffff
s_mov_b32 s2, 0
s_cmp_eq_u32 s3, 0
s_cbranch_scc1 .LBB3_3
v_lshlrev_b32_e32 v1, 2, v0
s_mul_i32 s2, s15, s3
s_lshl_b32 s8, s3, 2
s_ashr_i32 s3, s2, 31
v_mov_b32_e32 v3, 0
v_add_co_u32 v1, s6, s6, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_add_co_ci_u32_e64 v2, null, s7, 0, s6
s_lshl_b64 s[6:7], s[2:3], 2
s_add_u32 s3, s4, s6
s_addc_u32 s6, s5, s7
s_mov_b64 s[4:5], 0
.LBB3_2:
global_load_b32 v4, v[1:2], off
s_add_u32 s10, s3, s4
s_addc_u32 s11, s6, s5
v_add_co_u32 v1, vcc_lo, v1, s8
s_load_b32 s7, s[10:11], 0x0
v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
s_add_u32 s4, s4, 4
s_addc_u32 s5, s5, 0
s_cmp_eq_u32 s8, s4
s_waitcnt vmcnt(0) lgkmcnt(0)
v_fmac_f32_e32 v3, s7, v4
s_cbranch_scc0 .LBB3_2
s_branch .LBB3_4
.LBB3_3:
v_mov_b32_e32 v3, 0
.LBB3_4:
v_add_nc_u32_e32 v0, s2, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v3, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| MultiplicationMulti | 3,797 | 826 | stackv2-00000-of-00015 |
// Demangled: MultiplicationSingle(float*, float*, float*, int)
Function : _Z20MultiplicationSinglePfS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R0, c[0x0][0x398] &wr=0x1 ?trans1;
S2R R15, SR_TID.X &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans1;
MOV R12, RZ ?trans1;
I2F.U32.RP R4, R0 &req={1} &wr=0x1 ?trans1;
ISETP.NE.U32.AND P2, PT, R0, RZ, PT ?trans1;
MUFU.RCP R4, R4 &req={1} &wr=0x1 ?trans2;
IADD3 R2, PT, PT, R4, 0xffffffe, RZ &req={1} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R3, R2 &rd=0x1 &wr=0x4 ?trans2;
HFMA2 R2, -RZ, RZ, 0, 0 &req={1} ?trans1;
IADD3 R5, PT, PT, RZ, -R3, RZ &req={4} ?WAIT5_END_GROUP;
IMAD R5, R5, R0, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R3, R3, R5, R2 ?WAIT6_END_GROUP;
IMAD.HI.U32 R13, R3, R15, RZ &req={2} ?WAIT5_END_GROUP;
IADD3 R3, PT, PT, -R13, RZ, RZ ?WAIT5_END_GROUP;
IMAD R3, R0, R3, R15 ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R3, R0, PT ?WAIT13_END_GROUP;
@P0 IADD3 R3, PT, PT, R3, -R0.reuse, RZ ?trans2;
@P0 IADD3 R13, PT, PT, R13, 0x1, RZ ?trans1;
ISETP.GE.AND P0, PT, R0, 0x1, PT ?trans2;
ISETP.GE.U32.AND P1, PT, R3, R0, PT ?WAIT13_END_GROUP;
@P1 IADD3 R13, PT, PT, R13, 0x1, RZ ?trans2;
@!P2 LOP3.LUT R13, RZ, R0, RZ, 0x33, !PT ?WAIT5_END_GROUP;
IMAD R2, R13, R0, RZ ?WAIT5_END_GROUP;
IADD3 R15, PT, PT, -R2, R15, RZ ?trans1;
@!P0 BRA 0x9e0 &req={3,0} ?trans6;
ISETP.GE.U32.AND P0, PT, R0.reuse, 0x8, PT ?trans1;
LOP3.LUT R28, R0, 0x7, RZ, 0xc0, !PT ?trans1;
UMOV UR4, URZ ?trans1;
MOV R12, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P1, PT, R28, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x550 ?trans6;
LOP3.LUT R14, R0, 0x7ffffff8, RZ, 0xc0, !PT ?trans1;
HFMA2 R12, -RZ, RZ, 0, 0 ?trans1;
UMOV UR4, URZ ?trans2;
IADD3 R14, PT, PT, -R14, RZ, RZ ?WAIT7_END_GROUP;
LDC.64 R6, c[0x0][0x388] &wr=0x0 ?trans1;
IMAD R9, R0, UR4, R15 ?trans1;
IADD3 R17, PT, PT, R2, UR4, RZ ?WAIT4_END_GROUP;
IADD3 R11, PT, PT, R9, R0.reuse, RZ ?trans2;
LDC.64 R4, c[0x0][0x380] &wr=0x1 ?trans2;
IADD3 R31, PT, PT, R11, R0, RZ ?WAIT4_END_GROUP;
IADD3 R25, PT, PT, R31, R0, RZ ?trans1;
IMAD.WIDE.U32 R8, R9, 0x4, R6 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R10, R11, 0x4, R6 ?trans1;
LDG.E R19, desc[UR6][R8.64] &rd=0x0 &wr=0x2 ?trans3;
IMAD.WIDE.U32 R4, R17, 0x4, R4 &req={1} ?trans1;
IADD3 R17, PT, PT, R25, R0.reuse, RZ ?trans1;
LDG.E R18, desc[UR6][R10.64] &rd=0x1 &wr=0x3 ?trans4;
LDG.E R21, desc[UR6][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R30, R31, 0x4, R6 ?trans1;
IADD3 R33, PT, PT, R17, R0, RZ ?WAIT2_END_GROUP;
LDG.E R23, desc[UR6][R4.64+0x4] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R24, R25, 0x4, R6 ?WAIT3_END_GROUP;
LDG.E R20, desc[UR6][R30.64] &wr=0x4 ?trans1;
IMAD.WIDE.U32 R16, R17, 0x4, R6 ?WAIT3_END_GROUP;
LDG.E R27, desc[UR6][R4.64+0x8] &wr=0x4 ?trans1;
IADD3 R35, PT, PT, R33.reuse, R0.reuse, RZ ?trans1;
IMAD.WIDE.U32 R8, R33, 0x4, R6.reuse &req={0} ?trans2;
LDG.E R24, desc[UR6][R24.64] &wr=0x5 ?trans4;
LDG.E R29, desc[UR6][R4.64+0xc] &wr=0x5 ?trans1;
IMAD.WIDE.U32 R10, R35.reuse, 0x4, R6 &req={1} ?trans1;
IADD3 R35, PT, PT, R35, R0, RZ ?WAIT2_END_GROUP;
LDG.E R17, desc[UR6][R16.64] &wr=0x5 ?trans4;
LDG.E R22, desc[UR6][R4.64+0x10] &wr=0x5 ?trans1;
IMAD.WIDE.U32 R6, R35, 0x4, R6 ?WAIT3_END_GROUP;
LDG.E R9, desc[UR6][R8.64] &wr=0x5 ?trans4;
LDG.E R26, desc[UR6][R4.64+0x14] &wr=0x5 ?trans4;
LDG.E R10, desc[UR6][R10.64] &wr=0x5 ?trans4;
LDG.E R30, desc[UR6][R4.64+0x18] &wr=0x5 ?trans4;
LDG.E R32, desc[UR6][R4.64+0x1c] &wr=0x5 ?trans4;
LDG.E R6, desc[UR6][R6.64] &wr=0x5 ?trans1;
IADD3 R14, PT, PT, R14, 0x8, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R14, RZ, PT ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
FFMA R12, R21, R19, R12 &req={2} ?WAIT4_END_GROUP;
FFMA R12, R23, R18, R12 &req={3} ?WAIT4_END_GROUP;
FFMA R12, R27, R20, R12 &req={4} ?WAIT4_END_GROUP;
FFMA R29, R29, R24, R12 &req={5} ?WAIT4_END_GROUP;
FFMA R17, R22, R17, R29 ?WAIT4_END_GROUP;
FFMA R9, R26, R9, R17 ?WAIT4_END_GROUP;
FFMA R9, R30, R10, R9 ?WAIT4_END_GROUP;
FFMA R12, R32, R6, R9 ?trans1;
@P0 BRA 0x250 ?trans6;
@!P1 BRA 0x9e0 ?trans5;
ISETP.GE.U32.AND P0, PT, R28, 0x4, PT ?trans1;
LOP3.LUT R22, R0, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R22, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x790 ?trans6;
LDC.64 R8, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR8, c[0x0][0x380] &wr=0x1 ?trans1;
IMAD R11, R0, UR4, R15 ?trans2;
HFMA2 R3, -RZ, RZ, 0, 0 ?trans1;
IADD3 R7, PT, PT, R2.reuse, UR4, RZ ?trans1;
UMOV UR5, URZ ?trans1;
IADD3 R19, PT, PT, R11, R0, RZ ?trans1;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans1;
IADD.64 R24, R2, UR4 ?WAIT3_END_GROUP;
IADD3 R21, PT, PT, R19, R0, RZ ?trans2;
LEA R6, P0, R24, UR8, 0x2 &req={1} ?trans1;
IMAD.WIDE.U32 R8, R7, 0x4, R8 &req={0} ?WAIT3_END_GROUP;
LEA.HI.X R7, R24, UR9, R25, 0x2, P0 ?WAIT3_END_GROUP;
LDG.E R9, desc[UR6][R8.64] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R10, R11, 0x4, R4 &req={2} ?WAIT3_END_GROUP;
LDG.E R14, desc[UR6][R6.64+0x4] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R16, R19, 0x4, R4 ?WAIT3_END_GROUP;
LDG.E R10, desc[UR6][R10.64] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R18, R21.reuse, 0x4, R4.reuse ?trans1;
IADD3 R21, PT, PT, R21, R0, RZ ?trans2;
LDG.E R16, desc[UR6][R16.64] &wr=0x2 ?trans3;
IMAD.WIDE.U32 R4, R21, 0x4, R4 ?trans1;
LDG.E R18, desc[UR6][R18.64] &wr=0x4 ?trans4;
LDG.E R20, desc[UR6][R6.64+0x8] &wr=0x4 ?trans4;
LDG.E R24, desc[UR6][R6.64+0xc] &wr=0x5 ?trans4;
LDG.E R4, desc[UR6][R4.64] &wr=0x5 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
FFMA R9, R9, R10, R12 &req={3} ?WAIT4_END_GROUP;
FFMA R9, R14, R16, R9 &req={2} ?WAIT4_END_GROUP;
FFMA R9, R20, R18, R9 &req={4} ?WAIT4_END_GROUP;
FFMA R12, R24, R4, R9 &req={5} ?WAIT7_END_GROUP;
@!P1 BRA 0x9e0 ?trans5;
ISETP.NE.AND P0, PT, R22, 0x1, PT ?trans1;
LOP3.LUT R4, R0, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P1, PT, R4, 0x1, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x940 ?trans6;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR8, c[0x0][0x380] &wr=0x1 ?trans1;
MOV R8, R2 ?trans1;
HFMA2 R9, -RZ, RZ, 0, 0 ?trans1;
IADD3 R17, PT, PT, R2, UR4, RZ ?trans1;
UMOV UR5, URZ ?WAIT3_END_GROUP;
LDC.64 R6, c[0x0][0x388] &wr=0x2 ?trans1;
IADD.64 R10, R8, UR4 ?trans2;
IMAD R9, R0, UR4, R15 ?WAIT5_END_GROUP;
IADD3 R19, PT, PT, R9, R0, RZ ?trans2;
LEA R16, P0, R10, UR8, 0x2 &req={1} ?trans1;
IMAD.WIDE.U32 R4, R17, 0x4, R4 &req={0} ?WAIT3_END_GROUP;
LEA.HI.X R17, R10, UR9, R11, 0x2, P0 ?WAIT3_END_GROUP;
LDG.E R5, desc[UR6][R4.64] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R8, R9, 0x4, R6 &req={2} ?WAIT3_END_GROUP;
LDG.E R17, desc[UR6][R16.64+0x4] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R6, R19, 0x4, R6 ?WAIT3_END_GROUP;
LDG.E R8, desc[UR6][R8.64] &wr=0x3 ?trans4;
LDG.E R6, desc[UR6][R6.64] &wr=0x2 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x2, URZ ?trans1;
FFMA R12, R5, R8, R12 &req={3} ?WAIT4_END_GROUP;
FFMA R12, R17, R6, R12 &req={2} ?WAIT7_END_GROUP;
@P1 BRA 0x9e0 ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans1;
IADD3 R3, PT, PT, R2, UR4, RZ ?trans1;
IMAD R9, R0, UR4, R15 ?WAIT6_END_GROUP;
LDC.64 R6, c[0x0][0x388] &wr=0x1 ?trans1;
IMAD.WIDE.U32 R2, R3, 0x4, R4 &req={0} ?WAIT6_END_GROUP;
LDG.E R3, desc[UR6][R2.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R4, R9, 0x4, R6 &req={1} ?WAIT6_END_GROUP;
LDG.E R4, desc[UR6][R4.64] &wr=0x2 ?trans2;
FFMA R12, R3, R4, R12 &req={2} ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD R13, R13, R0, R15 ?WAIT4_END_GROUP;
IMAD.WIDE R2, R13, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R12 ?trans1;
EXIT ?trans5;
BRA 0xa30;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: MultiplicationSingle(float*, float*, float*, int)
_Z20MultiplicationSinglePfS_S_i:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x18
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s2, 1
s_cbranch_scc1 .LBB2_3
v_cvt_f32_u32_e32 v1, s2
s_sub_i32 s3, 0, s2
v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v1, v1
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v1, 0x4f7ffffe, v1
v_cvt_u32_f32_e32 v1, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mul_lo_u32 v2, s3, v1
s_mov_b32 s3, 0
v_mul_hi_u32 v2, v1, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v1, v1, v2
v_mul_hi_u32 v1, v0, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v1, v1, s2
v_sub_nc_u32_e32 v1, v0, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v2, s2, v1
v_cmp_le_u32_e32 vcc_lo, s2, v1
v_cndmask_b32_e32 v1, v1, v2, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v2, s2, v1
v_cmp_le_u32_e32 vcc_lo, s2, v1
v_cndmask_b32_e32 v1, v1, v2, vcc_lo
s_delay_alu instid0(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v0, v1
.LBB2_2:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_dual_mov_b32 v2, v4 :: v_dual_add_nc_u32 v3, s3, v6
s_add_i32 s3, s3, 1
s_cmp_eq_u32 s2, s3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[7:8], 2, v[3:4]
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_nc_u32_e32 v1, s2, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v7, vcc_lo, s4, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
s_delay_alu instid0(VALU_DEP_4)
v_add_co_u32 v2, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
global_load_b32 v7, v[7:8], off
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v5, v7, v2
s_cbranch_scc0 .LBB2_2
s_branch .LBB2_4
.LBB2_3:
v_mov_b32_e32 v5, 0
.LBB2_4:
v_lshlrev_b32_e32 v0, 2, v0
global_store_b32 v0, v5, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| MultiplicationSingle | 4,313 | 1,211 | stackv2-00000-of-00015 |
// Demangled: SetMatrixA(float*)
Function : _Z10SetMatrixAPf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R0, SR_TID.X &wr=0x0 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans7;
LDC R9, c[0x0][0x360] &wr=0x0 ?trans8;
LDC.64 R6, c[0x0][0x380] &wr=0x3 ?trans1;
I2F.F64.U32 R2, UR6 &req={1} ?trans1;
IMAD R9, R9, UR6, R0 &req={0} ?trans1;
UMOV.64 UR6, 0x3fb999999999999a ?WAIT3_END_GROUP;
IMAD.WIDE R6, R9, 0x4, R6 &req={3} ?WAIT15_END_GROUP;
NOP ?WAIT14_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U32 R4, R0 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R4, UR6, R2 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R3, R2 &req={0} &wr=0x2 ?trans2;
STG.E desc[UR4][R6.64], R3 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x1a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: SetMatrixA(float*)
_Z10SetMatrixAPf:
v_cvt_f64_u32_e32 v[1:2], s15
v_cvt_f64_u32_e32 v[3:4], v0
s_mov_b32 s2, 0x9999999a
s_mov_b32 s3, 0x3fb99999
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_fma_f64 v[1:2], v[3:4], s[2:3], v[1:2]
s_clause 0x1
s_load_b32 s2, s[0:1], 0x14
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cvt_f32_f64_e32 v3, v[1:2]
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v3, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| SetMatrixA | 528 | 484 | stackv2-00000-of-00015 |
// Demangled: SetMatrixB(float*)
Function : _Z10SetMatrixBPf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans8;
S2UR UR6, SR_CTAID.X &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
LDC R9, c[0x0][0x360] &wr=0x2 ?trans8;
LDC.64 R6, c[0x0][0x380] &wr=0x3 ?trans1;
UIMAD UR4, UR6, 0x3, URZ &req={0} ?trans1;
I2F.F64.U32 R4, R0 &req={1} ?trans1;
IMAD R9, R9, UR6, R0 &req={2} ?WAIT4_END_GROUP;
IMAD.WIDE R6, R9, 0x4, R6 &req={3} ?WAIT15_END_GROUP;
NOP ?WAIT14_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U32 R2, UR4 &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R4, 0.5, R2 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R3, R2 &req={0} &wr=0x1 ?trans2;
STG.E desc[UR4][R6.64], R3 &req={1} ?trans1;
EXIT ?trans5;
BRA 0x1a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: SetMatrixB(float*)
_Z10SetMatrixBPf:
s_mul_i32 s2, s15, 3
v_cvt_f64_u32_e32 v[3:4], v0
v_cvt_f64_u32_e32 v[1:2], s2
s_clause 0x1
s_load_b32 s2, s[0:1], 0x14
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[1:2], v[3:4], 0.5, v[1:2]
v_cvt_f32_f64_e32 v3, v[1:2]
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v3, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| SetMatrixB | 525 | 448 | stackv2-00000-of-00015 |
// Demangled: MatMult(float*, float*, float*, int, int)
Function : _Z7MatMultPfS_S_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC.64 R22, c[0x0][0x398] &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x2 ?trans1;
HFMA2 R15, -RZ, RZ, 0, 0 ?WAIT6_END_GROUP;
S2UR UR4, SR_CTAID.X ?trans8;
S2UR UR5, SR_CTAID.Y &wr=0x3 ?trans1;
IABS R5, R23 &req={1} ?trans2;
IABS R6, R22 ?WAIT2_END_GROUP;
I2F.RP R0, R5 &wr=0x1 ?trans2;
MUFU.RCP R0, R0 &req={1} &wr=0x1 ?trans2;
IADD3 R2, PT, PT, R0, 0xffffffe, RZ &req={1} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R3, R2 &rd=0x1 &wr=0x4 ?trans2;
HFMA2 R2, -RZ, RZ, 0, 0 &req={1} ?trans1;
IADD3 R4, PT, PT, RZ, -R3, RZ &req={4} ?WAIT5_END_GROUP;
IMAD R7, R4, R5, RZ ?trans1;
MOV R4, R6 ?WAIT3_END_GROUP;
IMAD.HI.U32 R3, R3, R7, R2 ?trans2;
S2R R2, SR_TID.Y &wr=0x3 ?trans4;
IMAD.HI.U32 R3, R3, R4, RZ ?WAIT5_END_GROUP;
IADD3 R0, PT, PT, -R3, RZ, RZ ?WAIT5_END_GROUP;
IMAD R0, R5, R0, R4 ?trans1;
LOP3.LUT R4, R22, R23, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P0, PT, R5, R0, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R0, PT, PT, R0, -R5.reuse, RZ ?trans2;
@!P0 IADD3 R3, PT, PT, R3, 0x1, RZ ?trans1;
ISETP.GE.AND P0, PT, R4, RZ, PT ?trans1;
IMAD R4, R23, UR5, R2 &req={3} ?trans1;
ISETP.GE.U32.AND P1, PT, R0, R5, PT ?trans2;
S2R R0, SR_TID.X &wr=0x1 ?trans11;
@P1 IADD3 R3, PT, PT, R3, 0x1, RZ ?trans1;
ISETP.NE.AND P1, PT, R23, RZ, PT ?WAIT4_END_GROUP;
MOV R29, R3 ?WAIT5_END_GROUP;
@!P0 IADD3 R29, PT, PT, -R29, RZ, RZ ?WAIT4_END_GROUP;
@!P1 LOP3.LUT R29, RZ, R23, RZ, 0x33, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R29, 0x1, PT ?trans1;
IMAD R3, R23, UR4, R0 &req={1} ?WAIT12_END_GROUP;
@!P0 BRA 0xc00 &req={2,0} ?trans5;
S2UR UR6, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR4, 0x400 ?trans1;
ISETP.GE.U32.AND P1, PT, R29, 0x4, PT ?trans1;
UIADD3 UR5, UPT, UPT, UR4, 0x10, URZ ?trans1;
VIMNMX.S32 R5, R3, R4, !PT ?trans1;
MOV R15, RZ ?trans1;
MOV R6, RZ ?WAIT3_END_GROUP;
ISETP.GE.AND P0, PT, R5, R22, PT ?trans1;
LOP3.LUT R5, R29, 0x3, RZ, 0xc0, !PT ?trans1;
ULEA UR4, UR6, UR4, 0x18 &req={0} ?trans1;
ULEA UR5, UR6, UR5, 0x18 ?WAIT5_END_GROUP;
LEA R7, R2, UR4, 0x3 ?trans2;
LEA R9, R0, UR5, 0x2 ?WAIT3_END_GROUP;
IMAD R8, R0, 0x4, R7 ?trans2;
IMAD R10, R2, 0x8, R9 ?trans1;
@!P1 BRA 0x9d0 ?trans6;
LDC.64 R18, c[0x0][0x380] &wr=0x0 ?trans1;
IADD3 R17, PT, PT, R23, R23.reuse, RZ ?trans2;
LOP3.LUT R29, R29, 0x7ffffffc, RZ, 0xc0, !PT ?trans1;
IMAD R12, R4, R22, R0 ?trans1;
IADD3 R16, PT, PT, R2, R23.reuse, RZ ?trans1;
IMAD R14, R23, 0x3, R2 ?trans1;
IADD3 R13, PT, PT, R17, R2, RZ ?trans1;
HFMA2 R6, -RZ, RZ, 0, 0 ?trans1;
LDC.64 R20, c[0x0][0x388] &wr=0x1 ?trans1;
BSSY.RECONVERGENT B0, 0x9d0 ?trans1;
IMAD R11, R23, R22.reuse, RZ ?trans1;
IADD3 R28, PT, PT, R12, R23, RZ ?trans1;
IMAD R14, R14, R22.reuse, R3.reuse ?trans1;
MOV R15, RZ ?trans1;
IMAD R16, R16, R22.reuse, R3.reuse ?trans1;
IADD3 R29, PT, PT, -R29, RZ, RZ ?trans1;
IMAD R13, R13, R22.reuse, R3.reuse ?trans1;
IADD3 R17, PT, PT, R12, R17, RZ ?trans1;
IMAD R26, R2, R22, R3 ?trans1;
LDCU UR5, c[0x0][0x39c] &wr=0x2 ?trans1;
IMAD R27, R23, 0x3, R12 ?WAIT7_END_GROUP;
@P0 BRA 0x6b0 ?trans5;
IMAD.WIDE.U32 R32, R12, 0x4, R18 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R30, R26, 0x4, R20 &req={1} ?trans2;
LDG.E R33, desc[UR8][R32.64] &wr=0x3 ?trans4;
LDG.E R37, desc[UR8][R30.64] &wr=0x4 ?trans1;
WARPSYNC.ALL ?trans5;
NOP ?trans1;
IMAD.WIDE.U32 R24, R28, 0x4, R18 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R22, R16, 0x4, R20 ?trans1;
STS [R8], R33 &req={3} ?trans4;
STS [R10], R37 &req={4} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R34, [R7] ?trans4;
LDS R35, [R9] &wr=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R32, [R7+0x4] ?trans4;
LDS R31, [R9+0x8] &wr=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDG.E R25, desc[UR8][R24.64] &wr=0x3 ?trans4;
LDG.E R23, desc[UR8][R22.64] &wr=0x4 ?trans1;
FFMA R35, R34, R35, R15 &req={0} ?WAIT4_END_GROUP;
FFMA R31, R32, R31, R35 &req={1} ?trans1;
STS [R8], R25 &req={3} ?trans4;
STS [R10], R23 &req={4} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R30, [R7] ?trans4;
LDS R33, [R9] &wr=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R37, [R7+0x4] ?trans4;
LDS R36, [R9+0x8] &wr=0x1 ?trans1;
FFMA R30, R30, R33, R31 &req={0} ?WAIT4_END_GROUP;
FFMA R15, R37, R36, R30 &req={1} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 BRA 0x8f0 ?trans5;
IMAD.WIDE.U32 R22, R17, 0x4, R18 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R24, R13, 0x4, R20 &req={1} ?trans2;
LDG.E R23, desc[UR8][R22.64] &wr=0x3 ?trans4;
LDG.E R25, desc[UR8][R24.64] &wr=0x4 ?trans1;
WARPSYNC.ALL ?trans5;
NOP ?trans1;
STS [R8], R23 &req={3} ?trans4;
STS [R10], R25 &req={4} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R30, [R7] ?trans4;
LDS R31, [R9] &wr=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R32, [R7+0x4] ?trans4;
LDS R33, [R9+0x8] &wr=0x1 ?trans1;
FFMA R15, R30, R31, R15 &req={0} ?WAIT4_END_GROUP;
FFMA R15, R32, R33, R15 &req={1} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 BRA 0x8f0 ?trans5;
IMAD.WIDE.U32 R22, R27, 0x4, R18 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R24, R14, 0x4, R20 ?trans2;
LDG.E R23, desc[UR8][R22.64] &wr=0x3 ?trans4;
LDG.E R25, desc[UR8][R24.64] &wr=0x4 ?trans1;
WARPSYNC.ALL ?trans5;
NOP ?trans1;
STS [R8], R23 &req={3} ?trans4;
STS [R10], R25 &req={4} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R30, [R7] ?trans4;
LDS R31, [R9] &wr=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R32, [R7+0x4] ?trans4;
LDS R33, [R9+0x8] &wr=0x1 ?trans1;
FFMA R15, R30, R31, R15 &req={0} ?WAIT4_END_GROUP;
FFMA R15, R32, R33, R15 &req={1} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
IADD3 R29, PT, PT, R29, 0x4, RZ ?trans1;
MOV R23, UR5 &req={2} ?trans1;
IADD3 R6, PT, PT, R6, 0x4, RZ ?trans2;
LEA R14, R11.reuse, R14, 0x2 ?trans1;
IMAD R13, R11, 0x4, R13 ?trans1;
ISETP.NE.AND P1, PT, R29, RZ, PT ?trans1;
IMAD R16, R11.reuse, 0x4, R16 ?trans1;
LEA R26, R11, R26, 0x2 ?trans1;
IMAD R27, R23.reuse, 0x4, R27 ?trans1;
LEA R17, R23.reuse, R17, 0x2 ?trans1;
IMAD R28, R23.reuse, 0x4, R28 ?trans1;
LEA R12, R23, R12, 0x2 ?WAIT7_END_GROUP;
@P1 BRA 0x4a0 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
ISETP.NE.AND P1, PT, R5, RZ, PT ?trans1;
BSSY B0, 0xc00 ?WAIT12_END_GROUP;
@!P1 BRA 0xbf0 ?trans5;
LDC.64 R12, c[0x0][0x398] &wr=0x2 ?trans1;
LDCU UR4, c[0x0][0x398] &wr=0x3 ?trans1;
IMAD R2, R6.reuse, R23.reuse, R2 ?trans2;
IMAD R23, R6, R23, R0 ?trans1;
IADD3 R0, PT, PT, -R5, RZ, RZ ?trans1;
IMAD R5, R2, UR4, R3 &req={3} ?trans2;
IMAD R23, R4, UR4, R23 ?WAIT7_END_GROUP;
LDC.64 R16, c[0x0][0x380] &wr=0x3 ?trans8;
LDC.64 R18, c[0x0][0x388] &req={0} &wr=0x0 ?trans1;
@!P0 IMAD.WIDE.U32 R16, R23, 0x4, R16 &req={3} ?WAIT6_END_GROUP;
@!P0 LDG.E R17, desc[UR8][R16.64] &wr=0x3 ?trans1;
@!P0 IMAD.WIDE.U32 R18, R5, 0x4, R18 &req={0} ?WAIT6_END_GROUP;
@!P0 LDG.E R19, desc[UR8][R18.64] &wr=0x4 ?trans1;
@!P0 WARPSYNC.ALL ?trans5;
@!P0 NOP ?trans1;
IADD3 R0, PT, PT, R0, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R0, RZ, PT ?trans1;
IADD3 R23, PT, PT, R23, R13, RZ &req={2} ?trans1;
IMAD R5, R13, R12, R5 ?trans1;
@!P0 STS [R8], R17 &req={3} ?trans4;
@!P0 STS [R10], R19 &req={4} ?trans1;
@!P0 BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P0 LDS R2, [R7] ?trans4;
@!P0 LDS R6, [R9] &wr=0x0 ?trans1;
@!P0 BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P0 LDS R11, [R7+0x4] ?trans4;
@!P0 LDS R14, [R9+0x8] &wr=0x2 ?trans1;
@!P0 FFMA R2, R2, R6, R15 &req={0} ?WAIT4_END_GROUP;
@!P0 FFMA R15, R11, R14, R2 &req={2} ?trans1;
@!P0 BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P1 BRA 0xa70 ?trans5;
BSYNC B0 ?trans5;
LDC.64 R6, c[0x0][0x390] &wr=0x2 ?trans1;
LDCU UR4, c[0x0][0x398] &wr=0x3 ?trans2;
IMAD R3, R4, UR4, R3 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R3, 0x4, R6 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR8][R2.64], R15 ?trans1;
EXIT ?trans5;
BRA 0xc60;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: MatMult(float*, float*, float*, int, int)
_Z7MatMultPfS_S_ii:
s_load_b256 s[4:11], s[0:1], 0x0
v_and_b32_e32 v3, 0x3ff, v0
v_bfe_u32 v2, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_ashr_i32 s0, s11, 31
s_ashr_i32 s12, s10, 31
s_add_i32 s1, s11, s0
s_add_i32 s13, s10, s12
s_xor_b32 s1, s1, s0
s_xor_b32 s13, s13, s12
v_cvt_f32_u32_e32 v1, s1
s_sub_i32 s3, 0, s1
v_mad_u64_u32 v[4:5], null, s15, s11, v[2:3]
s_xor_b32 s0, s12, s0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v1, v1
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v1, 0x4f7ffffe, v1
v_cvt_u32_f32_e32 v1, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_readfirstlane_b32 s2, v1
v_mad_u64_u32 v[0:1], null, s14, s11, v[3:4]
v_mul_lo_u32 v1, v4, s10
s_mul_i32 s3, s3, s2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_mul_hi_u32 s3, s2, s3
s_add_i32 s2, s2, s3
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_mul_hi_u32 s2, s13, s2
s_mul_i32 s3, s2, s1
s_add_i32 s12, s2, 1
s_sub_i32 s3, s13, s3
s_delay_alu instid0(SALU_CYCLE_1)
s_sub_i32 s13, s3, s1
s_cmp_ge_u32 s3, s1
s_cselect_b32 s2, s12, s2
s_cselect_b32 s3, s13, s3
s_add_i32 s12, s2, 1
s_cmp_ge_u32 s3, s1
s_cselect_b32 s1, s12, s2
s_mov_b32 s2, 0
s_xor_b32 s1, s1, s0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_sub_i32 s1, s1, s0
s_cmp_lt_i32 s1, 1
s_cbranch_scc1 .LBB0_6
v_lshlrev_b32_e32 v6, 2, v3
v_max_i32_e32 v5, v0, v4
v_add_nc_u32_e32 v8, v1, v3
v_dual_mov_b32 v4, 0 :: v_dual_lshlrev_b32 v9, 3, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_cmp_gt_i32_e64 s0, s10, v5
v_mov_b32_e32 v5, 0
v_lshl_add_u32 v7, v2, 3, v6
v_add_nc_u32_e32 v10, 16, v7
.LBB0_2:
s_delay_alu instid0(VALU_DEP_4)
s_and_saveexec_b32 s3, s0
s_cbranch_execz .LBB0_5
s_mul_i32 s12, s2, s11
s_mov_b32 s13, 0
v_add_nc_u32_e32 v13, s12, v2
v_add_nc_u32_e32 v3, s12, v8
s_mov_b32 s12, -1
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_mad_u64_u32 v[11:12], null, v13, s10, v[0:1]
v_mov_b32_e32 v12, v4
v_lshlrev_b64 v[13:14], 2, v[3:4]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[11:12], 2, v[11:12]
v_add_co_u32 v13, vcc_lo, s4, v13
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v14, vcc_lo, s5, v14, vcc_lo
v_add_co_u32 v11, vcc_lo, s6, v11
s_delay_alu instid0(VALU_DEP_4)
v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
global_load_b32 v3, v[13:14], off
global_load_b32 v11, v[11:12], off
s_waitcnt vmcnt(1)
ds_store_b32 v7, v3
s_waitcnt vmcnt(0)
ds_store_b32 v10, v11
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB0_4:
v_lshl_add_u32 v3, s13, 2, v9
v_lshl_add_u32 v11, s13, 3, v6
s_mov_b32 s13, 1
s_and_b32 vcc_lo, exec_lo, s12
s_mov_b32 s12, 0
ds_load_b32 v3, v3
ds_load_b32 v11, v11 offset:16
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_fmac_f32_e32 v5, v3, v11
s_cbranch_vccnz .LBB0_4
.LBB0_5:
s_or_b32 exec_lo, exec_lo, s3
s_add_i32 s2, s2, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s2, s1
s_cbranch_scc0 .LBB0_2
s_branch .LBB0_7
.LBB0_6:
v_mov_b32_e32 v5, 0
.LBB0_7:
v_add_nc_u32_e32 v0, v1, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s8, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
global_store_b32 v[0:1], v5, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| MatMult | 4,449 | 2,058 | stackv2-00000-of-00015 |
// Demangled: polynomial_expansion(float*, int, int, float*)
Function : _Z20polynomial_expansionPfiiS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x38c] &wr=0x2 ?trans7;
LDC R5, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R5, R5, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R4, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans1;
HFMA2 R8, -RZ, RZ, 0, 0 ?WAIT6_END_GROUP;
LDC.64 R2, c[0x0][0x390] &wr=0x2 ?trans1;
ISETP.GE.AND P0, PT, R4, RZ, PT &req={0} ?trans1;
IMAD.WIDE R2, R5, 0x4, R2 &req={2} ?WAIT12_END_GROUP;
@!P0 BRA 0x940 &req={1} ?trans5;
ISETP.GE.U32.AND P1, PT, R4.reuse, 0xf, PT ?trans1;
IADD3 R9, PT, PT, R4, 0x1, RZ ?trans1;
LDG.E R0, desc[UR6][R2.64] &rd=0x0 &wr=0x5 ?trans1;
MOV R8, RZ ?trans1;
MOV R7, 0x3f800000 ?trans1;
MOV R6, RZ ?trans1;
LOP3.LUT R10, R9, 0xf, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R10, RZ, PT ?trans2;
@!P1 BRA 0x550 &req={0} ?trans11;
LDCU.64 UR4, c[0x0][0x380] &wr=0x0 ?trans1;
LOP3.LUT R11, R9, 0xfffffff0, RZ, 0xc0, !PT ?trans1;
HFMA2 R7, -RZ, RZ, 1.875, 0 ?trans1;
MOV R8, RZ ?trans1;
MOV R6, RZ ?trans1;
IADD3 R11, PT, PT, -R11, RZ, RZ ?trans1;
UIADD3.64 UR4, UPT, UPT, UR4, 0x20, URZ &req={0} ?WAIT6_END_GROUP;
MOV.64 R4, UR4 ?WAIT8_END_GROUP;
LDG.E R23, desc[UR6][R4.64+-0x20] &wr=0x2 ?trans4;
LDG.E R22, desc[UR6][R4.64+-0x1c] &wr=0x3 ?trans4;
LDG.E R24, desc[UR6][R4.64+-0x18] &wr=0x4 ?trans4;
LDG.E R25, desc[UR6][R4.64+-0x14] &wr=0x4 ?trans4;
LDG.E R26, desc[UR6][R4.64+-0x10] &wr=0x4 ?trans4;
LDG.E R27, desc[UR6][R4.64+-0xc] &wr=0x4 ?trans4;
LDG.E R21, desc[UR6][R4.64+-0x8] &wr=0x4 ?trans4;
LDG.E R20, desc[UR6][R4.64+-0x4] &wr=0x4 ?trans4;
LDG.E R19, desc[UR6][R4.64] &wr=0x4 ?trans4;
LDG.E R18, desc[UR6][R4.64+0x4] &wr=0x4 ?trans4;
LDG.E R17, desc[UR6][R4.64+0x8] &wr=0x4 ?trans4;
LDG.E R16, desc[UR6][R4.64+0xc] &wr=0x4 ?trans4;
LDG.E R15, desc[UR6][R4.64+0x10] &wr=0x4 ?trans4;
LDG.E R14, desc[UR6][R4.64+0x14] &wr=0x4 ?trans4;
LDG.E R13, desc[UR6][R4.64+0x18] &wr=0x4 ?trans4;
LDG.E R12, desc[UR6][R4.64+0x1c] &rd=0x0 &wr=0x4 ?trans1;
IADD3 R11, PT, PT, R11, 0x10, RZ ?WAIT2_END_GROUP;
IADD3 R6, PT, PT, R6, 0x10, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P1, PT, R11, RZ, PT ?trans1;
IADD.64 R4, R4, 0x40 &req={0} ?trans2;
FFMA R23, R23, R7.reuse, R8 &req={2} ?trans1;
FMUL R8, R0, R7 &req={5} ?WAIT4_END_GROUP;
FFMA R22, R8, R22, R23 &req={3} ?trans1;
FMUL R7, R0, R8 ?WAIT4_END_GROUP;
FFMA R22, R7, R24, R22 &req={4} ?trans1;
FMUL R7, R0, R7 ?WAIT4_END_GROUP;
FFMA R22, R7, R25, R22 ?trans1;
FMUL R7, R0, R7 ?WAIT4_END_GROUP;
FFMA R22, R7, R26, R22 ?trans1;
FMUL R7, R0, R7 ?WAIT4_END_GROUP;
FFMA R22, R7, R27, R22 ?trans1;
FMUL R7, R0, R7 ?WAIT4_END_GROUP;
FFMA R21, R7, R21, R22 ?trans1;
FMUL R8, R0, R7 ?WAIT4_END_GROUP;
FFMA R20, R8, R20, R21 ?trans1;
FMUL R7, R0, R8 ?WAIT4_END_GROUP;
FFMA R19, R7, R19, R20 ?trans1;
FMUL R8, R0, R7 ?WAIT4_END_GROUP;
FFMA R18, R8, R18, R19 ?trans1;
FMUL R7, R0, R8 ?WAIT4_END_GROUP;
FFMA R17, R7, R17, R18 ?trans1;
FMUL R8, R0, R7 ?WAIT4_END_GROUP;
FFMA R16, R8, R16, R17 ?trans1;
FMUL R7, R0, R8 ?WAIT4_END_GROUP;
FFMA R15, R7, R15, R16 ?trans1;
FMUL R8, R0, R7 ?WAIT4_END_GROUP;
FFMA R14, R8, R14, R15 ?trans1;
FMUL R7, R0, R8 ?WAIT4_END_GROUP;
FFMA R13, R7, R13, R14 ?trans1;
FMUL R14, R0, R7 ?WAIT4_END_GROUP;
FFMA R8, R14, R12, R13 ?trans1;
FMUL R7, R0, R14 ?trans1;
@P1 BRA 0x200 ?trans6;
@!P0 BRA 0x940 ?trans5;
ISETP.GE.U32.AND P0, PT, R10, 0x8, PT ?trans1;
LOP3.LUT R19, R9, 0x7, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R19, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x750 ?trans6;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans2;
IMAD.WIDE.U32 R4, R6, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
LDG.E R10, desc[UR6][R4.64] &wr=0x2 ?trans4;
LDG.E R12, desc[UR6][R4.64+0x4] &wr=0x3 ?trans4;
LDG.E R13, desc[UR6][R4.64+0x8] &wr=0x4 ?trans4;
LDG.E R14, desc[UR6][R4.64+0xc] &wr=0x4 ?trans4;
LDG.E R15, desc[UR6][R4.64+0x10] &wr=0x4 ?trans4;
LDG.E R16, desc[UR6][R4.64+0x14] &wr=0x4 ?trans4;
LDG.E R17, desc[UR6][R4.64+0x18] &wr=0x4 ?trans4;
LDG.E R18, desc[UR6][R4.64+0x1c] &rd=0x0 &wr=0x4 ?trans1;
FMUL R11, R0, R7 &req={5} ?trans1;
IADD3 R6, PT, PT, R6, 0x8, RZ ?trans1;
FFMA R10, R7, R10, R8 &req={2} ?WAIT2_END_GROUP;
FMUL R7, R0.reuse, R11 ?trans2;
FFMA R10, R11, R12, R10 &req={3} ?trans2;
FMUL R11, R0.reuse, R7 ?trans2;
FFMA R10, R7, R13, R10 &req={4} ?trans2;
FMUL R7, R0, R11 ?trans2;
FFMA R10, R11, R14, R10 ?WAIT2_END_GROUP;
FMUL R11, R0.reuse, R7 ?trans2;
FFMA R10, R7, R15, R10 ?trans2;
FMUL R5, R0.reuse, R11 &req={0} ?trans2;
FFMA R10, R11, R16, R10 ?trans2;
FMUL R11, R0, R5 ?trans2;
FFMA R10, R5, R17, R10 ?WAIT2_END_GROUP;
FMUL R7, R0, R11 ?trans2;
FFMA R8, R11, R18, R10 ?WAIT7_END_GROUP;
@!P1 BRA 0x940 ?trans5;
ISETP.GE.U32.AND P0, PT, R19, 0x4, PT ?trans1;
LOP3.LUT R9, R9, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R9, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x890 ?trans6;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans2;
IMAD.WIDE.U32 R4, R6, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
LDG.E R10, desc[UR6][R4.64] &wr=0x2 ?trans4;
LDG.E R12, desc[UR6][R4.64+0x4] &wr=0x3 ?trans4;
LDG.E R13, desc[UR6][R4.64+0x8] &wr=0x4 ?trans4;
LDG.E R14, desc[UR6][R4.64+0xc] &wr=0x4 ?trans1;
FMUL R11, R0, R7 &req={5} ?trans1;
IADD3 R6, PT, PT, R6, 0x4, RZ ?trans1;
FFMA R10, R7, R10, R8 &req={2} ?WAIT2_END_GROUP;
FMUL R7, R0.reuse, R11 ?trans2;
FFMA R10, R11, R12, R10 &req={3} ?trans2;
FMUL R11, R0.reuse, R7 ?trans2;
FFMA R10, R7, R13, R10 &req={4} ?trans2;
FMUL R7, R0, R11 ?trans2;
FFMA R8, R11, R14, R10 ?WAIT7_END_GROUP;
@!P1 BRA 0x940 ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans1;
IADD3 R9, PT, PT, -R9, RZ, RZ ?trans1;
IMAD.WIDE.U32 R4, R6, 0x4, R4 &req={0} ?WAIT7_END_GROUP;
LDG.E R11, desc[UR6][R4.64] &rd=0x0 &wr=0x2 ?trans1;
IADD3 R9, PT, PT, R9, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R9, RZ, PT ?trans1;
IADD.64 R4, R4, 0x4 &req={0} ?trans2;
FFMA R8, R11, R7.reuse, R8 &req={2} ?trans1;
FMUL R7, R0, R7 &req={5} ?WAIT9_END_GROUP;
@P0 BRA 0x8d0 ?trans5;
STG.E desc[UR6][R2.64], R8 ?trans1;
EXIT ?trans5;
BRA 0x960;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: polynomial_expansion(float*, int, int, float*)
_Z20polynomial_expansionPfiiS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b64 s[2:3], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
v_cmp_gt_i32_e32 vcc_lo, s3, v1
s_and_saveexec_b32 s3, vcc_lo
s_cbranch_execz .LBB0_5
s_load_b64 s[4:5], s[0:1], 0x10
v_ashrrev_i32_e32 v2, 31, v1
s_cmp_lt_i32 s2, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_mov_b32_e32 v2, 0
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
s_cbranch_scc1 .LBB0_4
global_load_b32 v3, v[0:1], off
s_load_b64 s[0:1], s[0:1], 0x0
v_mov_b32_e32 v2, 0
v_mov_b32_e32 v4, 1.0
s_add_i32 s2, s2, 1
.LBB0_3:
s_waitcnt lgkmcnt(0)
s_load_b32 s3, s[0:1], 0x0
s_add_i32 s2, s2, -1
s_add_u32 s0, s0, 4
s_addc_u32 s1, s1, 0
s_cmp_eq_u32 s2, 0
s_waitcnt lgkmcnt(0)
v_fmac_f32_e32 v2, s3, v4
s_waitcnt vmcnt(0)
v_mul_f32_e32 v4, v3, v4
s_cbranch_scc0 .LBB0_3
.LBB0_4:
global_store_b32 v[0:1], v2, off
.LBB0_5:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| polynomial_expansion | 3,630 | 697 | stackv2-00000-of-00015 |
// Demangled: vecAdd(double*, double*, double*, int)
Function : _Z6vecAddPdS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R0, SR_TID.X &wr=0x0 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC R7, c[0x0][0x360] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans8;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD R7, R7, UR6, R0 &req={0} ?WAIT7_END_GROUP;
LDC.64 R8, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD.WIDE R2, R7, 0x8, R2 &req={2} ?WAIT6_END_GROUP;
LDG.E.64 R2, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
IMAD.WIDE R4, R7, 0x8, R4 &req={3} ?WAIT6_END_GROUP;
LDG.E.64 R4, desc[UR4][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE R8, R7, 0x8, R8 &req={0} ?trans1;
DADD R6, R2, R4 &req={2} &wr=0x0 ?trans4;
STG.E.64 desc[UR4][R8.64], R6 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x110;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: vecAdd(double*, double*, double*, int)
_Z6vecAddPdS_S_i:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x2c
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 3, v[1:2]
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b64 v[2:3], v[2:3], off
global_load_b64 v[4:5], v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_f64 v[2:3], v[2:3], v[4:5]
global_store_b64 v[0:1], v[2:3], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| vecAdd | 512 | 512 | stackv2-00000-of-00015 |
// Demangled: deviceDFSk3(int*, int*, int*, int*)
Function : _Z11deviceDFSk3PiS_S_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x390] &wr=0x1 ?trans2;
LDG.E R3, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans6;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
S2R R5, SR_TID.X &wr=0x1 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R0, UR6, R5 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, R3, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans2;
IMAD.WIDE R2, R0, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R8, desc[UR4][R2.64] &wr=0x2 ?trans4;
LDG.E R5, desc[UR4][R2.64+0x4] &wr=0x2 ?trans2;
ISETP.GE.AND P0, PT, R8, R5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDCU.64 UR6, c[0x0][0x398] &wr=0x0 ?trans1;
SHF.R.S32.HI R7, RZ, 0x1f, R0 ?trans1;
MOV R9, R5 ?trans1;
LEA R4, P0, R0, UR6, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R5, R0, UR7, R7, 0x2, P0 ?WAIT9_END_GROUP;
LDC.64 R6, c[0x0][0x388] &req={0} &wr=0x0 ?trans2;
IMAD.WIDE R6, R8, 0x4, R6 &req={0} ?WAIT5_END_GROUP;
LDG.E R13, desc[UR4][R6.64] &req={2} &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x570 ?trans1;
ISETP.GT.AND P0, PT, R13, R0, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x560 &req={1} ?trans5;
LDC.64 R10, c[0x0][0x380] &wr=0x0 ?trans1;
MOV R15, R13 ?WAIT5_END_GROUP;
IMAD.WIDE R10, R15, 0x4, R10 &req={0} ?WAIT5_END_GROUP;
LDG.E R12, desc[UR4][R10.64] &wr=0x2 ?trans4;
LDG.E R13, desc[UR4][R10.64+0x4] &wr=0x2 ?trans2;
ISETP.GE.AND P0, PT, R12, R13, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x560 ?trans5;
BSSY.RECONVERGENT B1, 0x550 ?trans1;
MOV R9, R12 ?WAIT7_END_GROUP;
LDC.64 R10, c[0x0][0x388] &req={0} &wr=0x0 ?trans2;
IMAD.WIDE R10, R9, 0x4, R10 &req={0} ?WAIT5_END_GROUP;
LDG.E R14, desc[UR4][R10.64] &req={2} &wr=0x2 ?trans1;
VIMNMX.S32 R13, R0, R15, !PT ?trans1;
BSSY.RECONVERGENT B2, 0x4e0 ?trans4;
ISETP.GE.AND P0, PT, R13, R14, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x4d0 ?trans5;
LDC.64 R12, c[0x0][0x380] &wr=0x0 ?trans1;
MOV R23, R14 ?WAIT5_END_GROUP;
IMAD.WIDE R12, R23, 0x4, R12 &req={0} ?WAIT5_END_GROUP;
LDG.E R18, desc[UR4][R12.64] &wr=0x2 ?trans4;
LDG.E R17, desc[UR4][R12.64+0x4] &wr=0x2 ?trans2;
ISETP.GE.AND P0, PT, R18, R17, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x4d0 ?trans5;
LDC.64 R12, c[0x0][0x380] &wr=0x0 ?trans1;
BSSY.RECONVERGENT B3, 0x4c0 ?trans1;
MOV R25, R18 ?WAIT6_END_GROUP;
LDC.64 R14, c[0x0][0x388] &wr=0x1 ?trans8;
LDC.64 R16, c[0x0][0x398] &wr=0x2 ?trans2;
IMAD.WIDE R18, R25, 0x4, R14 &req={1} ?WAIT6_END_GROUP;
LDG.E R19, desc[UR4][R18.64] &wr=0x3 ?trans1;
BSSY.RECONVERGENT B4, 0x460 ?trans1;
ISETP.NE.AND P0, PT, R19, R0, PT &req={3} ?WAIT13_END_GROUP;
@P0 BRA 0x450 ?trans5;
HFMA2 R27, -RZ, RZ, 0, 1.1920928955078125e-07 ?WAIT5_END_GROUP;
REDG.E.ADD.STRONG.GPU desc[UR4][R4.64], R27 &rd=0x1 ?trans4;
LDG.E R19, desc[UR4][R6.64] &wr=0x3 ?trans2;
IMAD.WIDE R18, R19, 0x4, R16 &req={3,2} ?WAIT5_END_GROUP;
REDG.E.ADD.STRONG.GPU desc[UR4][R18.64], R27 &rd=0x1 ?trans4;
LDG.E R21, desc[UR4][R10.64] &wr=0x2 ?trans2;
IMAD.WIDE R20, R21, 0x4, R16 &req={2} ?WAIT5_END_GROUP;
REDG.E.ADD.STRONG.GPU desc[UR4][R20.64], R27 &rd=0x1 ?trans4;
LDG.E R23, desc[UR4][R10.64] &rd=0x1 &wr=0x5 ?trans2;
BSYNC.RECONVERGENT B4 ?trans5;
IMAD.WIDE R18, R23, 0x4, R12 &req={5,1,0} ?WAIT6_END_GROUP;
LDG.E R18, desc[UR4][R18.64+0x4] &wr=0x3 ?trans1;
IADD3 R25, PT, PT, R25, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R25, R18, PT &req={3} ?WAIT13_END_GROUP;
@!P0 BRA 0x370 ?trans5;
BSYNC.RECONVERGENT B3 ?trans5;
LDG.E R15, desc[UR4][R6.64] &rd=0x0 &wr=0x5 ?trans2;
BSYNC.RECONVERGENT B2 ?trans5;
LDC.64 R10, c[0x0][0x380] &wr=0x1 ?trans2;
IMAD.WIDE R10, R15, 0x4, R10 &req={5,1} ?WAIT6_END_GROUP;
LDG.E R10, desc[UR4][R10.64+0x4] &wr=0x3 ?trans1;
IADD3 R9, PT, PT, R9, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R9, R10, PT &req={3} ?WAIT13_END_GROUP;
@!P0 BRA 0x240 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
LDG.E R9, desc[UR4][R2.64+0x4] &rd=0x1 &wr=0x5 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R8, PT, PT, R8, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R8, R9, PT &req={5} ?WAIT13_END_GROUP;
@!P0 BRA 0x150 ?trans5;
EXIT ?trans5;
BRA 0x5b0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: deviceDFSk3(int*, int*, int*, int*)
_Z11deviceDFSk3PiS_S_S_:
s_clause 0x1
s_load_b256 s[4:11], s[0:1], 0x0
s_load_b32 s0, s[0:1], 0x2c
s_waitcnt lgkmcnt(0)
s_load_b32 s1, s[8:9], 0x0
s_and_b32 s0, s0, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
s_mov_b32 s0, exec_lo
s_waitcnt lgkmcnt(0)
v_cmpx_gt_i32_e64 s1, v1
s_cbranch_execz .LBB2_18
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[1:2]
v_add_co_u32 v2, vcc_lo, s4, v6
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v7, vcc_lo
global_load_b64 v[4:5], v[2:3], off
s_waitcnt vmcnt(0)
v_mov_b32_e32 v12, v5
v_cmp_lt_i32_e32 vcc_lo, v4, v5
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB2_18
v_add_co_u32 v6, vcc_lo, s10, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s11, v7, vcc_lo
v_mov_b32_e32 v0, 2
s_add_u32 s1, s4, 4
s_addc_u32 s2, s5, 0
s_mov_b32 s3, 0
.LBB2_3:
v_ashrrev_i32_e32 v5, 31, v4
s_mov_b32 s8, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[8:9], 2, v[4:5]
v_add_co_u32 v8, vcc_lo, s6, v8
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v9, vcc_lo, s7, v9, vcc_lo
global_load_b32 v13, v[8:9], off
s_waitcnt vmcnt(0)
v_cmpx_gt_i32_e64 v13, v1
s_cbranch_execz .LBB2_17
v_ashrrev_i32_e32 v14, 31, v13
s_mov_b32 s9, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[10:11], 2, v[13:14]
v_add_co_u32 v10, vcc_lo, s4, v10
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v11, vcc_lo, s5, v11, vcc_lo
global_load_b64 v[10:11], v[10:11], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e64 v10, v11
s_cbranch_execz .LBB2_16
s_mov_b32 s12, 0
.LBB2_6:
v_ashrrev_i32_e32 v11, 31, v10
v_max_i32_e32 v5, v13, v1
s_mov_b32 s13, exec_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[11:12], 2, v[10:11]
v_add_co_u32 v11, vcc_lo, s6, v11
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
global_load_b32 v16, v[11:12], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e64 v5, v16
s_cbranch_execz .LBB2_14
v_ashrrev_i32_e32 v17, 31, v16
s_mov_b32 s14, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[14:15], 2, v[16:17]
v_add_co_u32 v14, vcc_lo, s4, v14
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v15, vcc_lo, s5, v15, vcc_lo
global_load_b64 v[14:15], v[14:15], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e64 v14, v15
s_cbranch_execz .LBB2_13
v_ashrrev_i32_e32 v15, 31, v14
s_mov_b32 s15, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[18:19], 2, v[14:15]
v_add_co_u32 v18, vcc_lo, s6, v18
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v19, vcc_lo, s7, v19, vcc_lo
.LBB2_9:
global_load_b32 v5, v[18:19], off
s_mov_b32 s0, exec_lo
s_waitcnt vmcnt(0)
v_cmpx_eq_u32_e64 v5, v1
s_cbranch_execz .LBB2_11
global_atomic_add_u32 v[6:7], v0, off
global_load_b32 v15, v[8:9], off
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v16, 31, v15
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[15:16], 2, v[15:16]
v_add_co_u32 v15, vcc_lo, s10, v15
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v16, vcc_lo, s11, v16, vcc_lo
global_atomic_add_u32 v[15:16], v0, off
global_load_b32 v15, v[11:12], off
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v16, 31, v15
v_lshlrev_b64 v[15:16], 2, v[15:16]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v15, vcc_lo, s10, v15
v_add_co_ci_u32_e32 v16, vcc_lo, s11, v16, vcc_lo
global_atomic_add_u32 v[15:16], v0, off
global_load_b32 v16, v[11:12], off
.LBB2_11:
s_or_b32 exec_lo, exec_lo, s0
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v17, 31, v16
v_add_nc_u32_e32 v14, 1, v14
v_add_co_u32 v18, s0, v18, 4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_ci_u32_e64 v19, s0, 0, v19, s0
v_lshlrev_b64 v[20:21], 2, v[16:17]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v20, vcc_lo, s1, v20
v_add_co_ci_u32_e32 v21, vcc_lo, s2, v21, vcc_lo
global_load_b32 v5, v[20:21], off
s_waitcnt vmcnt(0)
v_cmp_ge_i32_e32 vcc_lo, v14, v5
s_or_b32 s15, vcc_lo, s15
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s15
s_cbranch_execnz .LBB2_9
s_or_b32 exec_lo, exec_lo, s15
global_load_b32 v13, v[8:9], off
.LBB2_13:
s_or_b32 exec_lo, exec_lo, s14
.LBB2_14:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
s_or_b32 exec_lo, exec_lo, s13
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v14, 31, v13
v_add_nc_u32_e32 v10, 1, v10
v_lshlrev_b64 v[11:12], 2, v[13:14]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v11, vcc_lo, s1, v11
v_add_co_ci_u32_e32 v12, vcc_lo, s2, v12, vcc_lo
global_load_b32 v5, v[11:12], off
s_waitcnt vmcnt(0)
v_cmp_ge_i32_e32 vcc_lo, v10, v5
s_or_b32 s12, vcc_lo, s12
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s12
s_cbranch_execnz .LBB2_6
s_or_b32 exec_lo, exec_lo, s12
global_load_b32 v12, v[2:3], off offset:4
.LBB2_16:
s_or_b32 exec_lo, exec_lo, s9
.LBB2_17:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
s_or_b32 exec_lo, exec_lo, s8
v_add_nc_u32_e32 v4, 1, v4
s_waitcnt vmcnt(0)
v_cmp_ge_i32_e32 vcc_lo, v4, v12
s_or_b32 s3, vcc_lo, s3
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s3
s_cbranch_execnz .LBB2_3
.LBB2_18:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| deviceDFSk3 | 2,448 | 3,118 | stackv2-00000-of-00015 |
// Demangled: deviceDFSk4(int*, int*, int*, int*)
Function : _Z11deviceDFSk4PiS_S_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x390] &wr=0x1 ?trans2;
LDG.E R3, desc[UR6][R2.64] &req={1} &wr=0x2 ?trans6;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
S2R R5, SR_TID.X &wr=0x1 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R0, UR4, R5 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, R3, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans2;
IMAD.WIDE R2, R0, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R9, desc[UR6][R2.64] &wr=0x2 ?trans4;
LDG.E R4, desc[UR6][R2.64+0x4] &wr=0x2 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR4, 0x400 ?trans1;
BSSY.RECONVERGENT B3, 0x8e0 ?trans1;
HFMA2 R6, -RZ, RZ, 0, 0 ?trans1;
SHF.R.S32.HI R7, RZ, 0x1f, R0 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={0} ?WAIT6_END_GROUP;
LEA R5, R5, UR4, 0x2 ?WAIT5_END_GROUP;
STS [R5], RZ &rd=0x0 ?trans1;
ISETP.GE.AND P0, PT, R9, R4, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x8d0 &req={0} ?trans5;
MOV R6, RZ ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x388] &req={0} &wr=0x0 ?trans2;
IMAD.WIDE R2, R9, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R11, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans1;
IADD3 R9, PT, PT, R9, 0x1, RZ ?trans1;
BSSY.RECONVERGENT B2, 0x8c0 ?trans4;
ISETP.GE.AND P2, PT, R9, R4, PT ?trans1;
ISETP.NE.AND P0, PT, R11, R0, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x8b0 &req={1} ?trans5;
LDCU.64 UR4, c[0x0][0x380] &wr=0x0 ?trans1;
SHF.R.S32.HI R8, RZ, 0x1f, R11 ?trans2;
LEA R2, P0, R11, UR4, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R3, R11, UR5, R8, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R13, desc[UR6][R2.64] &wr=0x2 ?trans4;
LDG.E R8, desc[UR6][R2.64+0x4] &wr=0x2 ?trans2;
ISETP.GE.AND P0, PT, R13, R8, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x8b0 ?trans5;
LDC.64 R2, c[0x0][0x388] &req={0} &wr=0x0 ?trans2;
IMAD.WIDE R2, R13, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R10, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans1;
IADD3 R13, PT, PT, R13, 0x1, RZ ?trans1;
BSSY.RECONVERGENT B1, 0x8a0 ?trans4;
ISETP.GE.AND P1, PT, R13, R8, PT ?trans1;
ISETP.NE.AND P0, PT, R10, R0, PT &req={2} ?WAIT5_END_GROUP;
ISETP.EQ.OR P0, PT, R10, R11, !P0 ?WAIT13_END_GROUP;
@P0 BRA 0x890 &req={1} ?trans5;
LDCU.64 UR4, c[0x0][0x380] &wr=0x0 ?trans1;
SHF.R.S32.HI R3, RZ, 0x1f, R10 ?trans2;
LEA R2, P0, R10, UR4, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R3, R10, UR5, R3, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R15, desc[UR6][R2.64] &wr=0x2 ?trans4;
LDG.E R12, desc[UR6][R2.64+0x4] &wr=0x2 ?trans2;
ISETP.GE.AND P0, PT, R15, R12, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x890 ?trans5;
LDCU.64 UR4, c[0x0][0x388] &req={0} &wr=0x0 ?trans2;
MOV.64 R2, UR4 &req={0} ?WAIT6_END_GROUP;
IMAD.WIDE R16, R15, 0x4, R2 ?WAIT5_END_GROUP;
LDG.E R19, desc[UR6][R16.64] &req={2} &wr=0x2 ?trans1;
IADD3 R15, PT, PT, R15, 0x1, RZ ?trans1;
BSSY.RECONVERGENT B0, 0x880 ?trans4;
ISETP.GE.AND P3, PT, R15, R12, PT ?trans1;
ISETP.NE.AND P0, PT, R19, R11, PT &req={2} ?WAIT5_END_GROUP;
ISETP.EQ.OR P0, PT, R19, R10, !P0 ?WAIT5_END_GROUP;
ISETP.EQ.OR P0, PT, R19, R0, P0 ?WAIT13_END_GROUP;
@P0 BRA 0x870 &req={1} ?trans5;
LDC.64 R16, c[0x0][0x380] &wr=0x0 ?trans2;
IMAD.WIDE R16, R19, 0x4, R16 &req={0} ?WAIT5_END_GROUP;
LDG.E R25, desc[UR6][R16.64] &wr=0x2 ?trans4;
LDG.E R14, desc[UR6][R16.64+0x4] &wr=0x2 ?trans2;
ISETP.GE.AND P0, PT, R25, R14, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x870 ?trans5;
IADD3 R16, PT, PT, R14, -R25, RZ ?trans1;
BSSY.RECONVERGENT B4, 0x6e0 ?trans1;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?WAIT3_END_GROUP;
ISETP.GT.AND P4, PT, R16, 0x3, PT ?WAIT13_END_GROUP;
@!P4 BRA 0x6d0 ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x80 ?trans2;
IADD3 R24, PT, PT, R14, -0x3, RZ ?WAIT11_END_GROUP;
IMAD.WIDE R22, R25.reuse, 0x4, R2 &req={0} ?trans1;
IADD3 R17, PT, PT, R25.reuse, 0x1, RZ ?trans2;
IADD3 R19, PT, PT, R25, 0x2, RZ ?WAIT3_END_GROUP;
LDG.E R23, desc[UR6][R22.64] &wr=0x2 ?trans1;
IMAD.WIDE R16, R17, 0x4, R2 ?trans1;
IADD3 R21, PT, PT, R25, 0x3, RZ ?WAIT3_END_GROUP;
IMAD.WIDE R18, R19, 0x4, R2.reuse ?trans2;
LDG.E R17, desc[UR6][R16.64] &wr=0x3 ?trans2;
IMAD.WIDE R20, R21, 0x4, R2 ?trans2;
LDG.E R19, desc[UR6][R18.64] &wr=0x4 ?trans4;
LDG.E R21, desc[UR6][R20.64] &wr=0x5 ?trans1;
IADD3 R25, PT, PT, R25, 0x4, RZ ?trans1;
ISETP.NE.AND P6, PT, R23, R0.reuse, PT &req={2} ?trans1;
ISETP.NE.AND P5, PT, R17, R0.reuse, PT &req={3} ?trans1;
ISETP.NE.AND P4, PT, R19, R0, PT &req={4} ?WAIT11_END_GROUP;
@!P6 IADD3 R6, PT, PT, R6, 0x1, RZ &req={1} ?WAIT5_END_GROUP;
@!P6 STS [R5], R6 &rd=0x0 ?trans1;
ISETP.NE.AND P6, PT, R21, R0, PT &req={5} ?trans1;
@!P5 IADD3 R6, PT, PT, R6, 0x1, RZ &req={0} ?WAIT5_END_GROUP;
@!P5 STS [R5], R6 &rd=0x0 ?trans2;
@!P4 IADD3 R6, PT, PT, R6, 0x1, RZ &req={0} ?WAIT5_END_GROUP;
@!P4 STS [R5], R6 &rd=0x0 ?trans1;
ISETP.GE.AND P4, PT, R25, R24, PT ?trans1;
@!P6 IADD3 R6, PT, PT, R6, 0x1, RZ &req={0} ?WAIT5_END_GROUP;
@!P6 STS [R5], R6 &rd=0x1 ?trans7;
@!P4 BRA 0x530 ?trans5;
BSYNC.RECONVERGENT B4 ?trans5;
IADD3 R16, PT, PT, R14, -R25, RZ ?trans1;
BSSY.RECONVERGENT B4, 0x800 ?trans4;
ISETP.GT.AND P4, PT, R16, 0x1, PT ?WAIT13_END_GROUP;
@!P4 BRA 0x7f0 ?trans5;
IMAD.WIDE R16, R25.reuse, 0x4, R2 ?trans1;
IADD3 R25, PT, PT, R25, 0x1, RZ ?WAIT5_END_GROUP;
LDG.E R17, desc[UR6][R16.64] &wr=0x2 ?trans1;
IMAD.WIDE R18, R25, 0x4, R2 ?WAIT6_END_GROUP;
LDG.E R19, desc[UR6][R18.64] &wr=0x3 ?trans1;
IADD3 R25, PT, PT, R25, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R17, R0.reuse, PT &req={2} ?trans1;
ISETP.NE.AND P4, PT, R19, R0, PT &req={3} ?WAIT12_END_GROUP;
@!P0 IADD3 R6, PT, PT, R6, 0x1, RZ &req={1} ?WAIT5_END_GROUP;
@!P0 STS [R5], R6 &rd=0x0 ?trans1;
PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x80 ?trans2;
@!P4 IADD3 R6, PT, PT, R6, 0x1, RZ &req={0} ?WAIT5_END_GROUP;
@!P4 STS [R5], R6 &rd=0x0 ?trans6;
BSYNC.RECONVERGENT B4 ?trans5;
ISETP.LT.OR P0, PT, R25, R14, P0 ?WAIT13_END_GROUP;
@!P0 BRA 0x870 ?trans5;
IMAD.WIDE R2, R25, 0x4, R2 ?WAIT6_END_GROUP;
LDG.E R3, desc[UR6][R2.64] &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R3, R0, PT &req={2} ?WAIT13_END_GROUP;
@!P0 IADD3 R6, PT, PT, R6, 0x1, RZ &req={1,0} ?WAIT5_END_GROUP;
@!P0 STS [R5], R6 &rd=0x2 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
@!P3 BRA 0x3a0 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
@!P1 BRA 0x290 ?trans5;
BSYNC.RECONVERGENT B2 ?trans5;
@!P2 BRA 0x190 ?trans5;
BSYNC.RECONVERGENT B3 ?trans5;
LDCU.64 UR4, c[0x0][0x398] &wr=0x3 ?trans2;
LEA R2, P0, R0, UR4, 0x2 &req={3} ?WAIT4_END_GROUP;
LEA.HI.X R3, R0, UR5, R7, 0x2, P0 ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R6 ?trans1;
EXIT ?trans5;
BRA 0x930;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: deviceDFSk4(int*, int*, int*, int*)
_Z11deviceDFSk4PiS_S_S_:
s_clause 0x1
s_load_b256 s[4:11], s[0:1], 0x0
s_load_b32 s0, s[0:1], 0x2c
s_waitcnt lgkmcnt(0)
s_load_b32 s1, s[8:9], 0x0
s_and_b32 s0, s0, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
s_mov_b32 s0, exec_lo
s_waitcnt lgkmcnt(0)
v_cmpx_gt_i32_e64 s1, v1
s_cbranch_execz .LBB1_26
v_ashrrev_i32_e32 v2, 31, v1
v_mov_b32_e32 v0, 0
s_mov_b32 s1, exec_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
global_load_b64 v[4:5], v[4:5], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e64 v4, v5
s_cbranch_execz .LBB1_25
v_mov_b32_e32 v0, 0
v_mov_b32_e32 v6, v4
s_mov_b32 s2, 0
.LBB1_3:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v7, 31, v6
s_mov_b32 s3, exec_lo
v_lshlrev_b64 v[7:8], 2, v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v7, vcc_lo, s6, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
global_load_b32 v7, v[7:8], off
s_waitcnt vmcnt(0)
v_cmpx_ne_u32_e64 v7, v1
s_cbranch_execz .LBB1_23
v_ashrrev_i32_e32 v8, 31, v7
s_mov_b32 s8, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[8:9], 2, v[7:8]
v_add_co_u32 v8, vcc_lo, s4, v8
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
global_load_b64 v[8:9], v[8:9], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e64 v8, v9
s_cbranch_execz .LBB1_22
v_mov_b32_e32 v10, v8
s_mov_b32 s9, 0
.LBB1_6:
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v11, 31, v10
v_lshlrev_b64 v[11:12], 2, v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v11, vcc_lo, s6, v11
v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
global_load_b32 v11, v[11:12], off
s_waitcnt vmcnt(0)
v_cmp_ne_u32_e32 vcc_lo, v11, v7
v_cmp_ne_u32_e64 s0, v11, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, vcc_lo, s0
s_and_saveexec_b32 s12, s0
s_cbranch_execz .LBB1_20
v_ashrrev_i32_e32 v12, 31, v11
s_mov_b32 s13, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[12:13], 2, v[11:12]
v_add_co_u32 v12, vcc_lo, s4, v12
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v13, vcc_lo, s5, v13, vcc_lo
global_load_b64 v[12:13], v[12:13], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e64 v12, v13
s_cbranch_execz .LBB1_19
v_mov_b32_e32 v14, v12
s_mov_b32 s14, 0
.LBB1_9:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v15, 31, v14
s_mov_b32 s15, exec_lo
v_lshlrev_b64 v[15:16], 2, v[14:15]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v15, vcc_lo, s6, v15
v_add_co_ci_u32_e32 v16, vcc_lo, s7, v16, vcc_lo
global_load_b32 v15, v[15:16], off
s_waitcnt vmcnt(0)
v_cmpx_ne_u32_e64 v15, v11
s_cbranch_execz .LBB1_17
v_cmp_ne_u32_e32 vcc_lo, v15, v7
v_cmp_ne_u32_e64 s0, v15, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, vcc_lo, s0
s_and_saveexec_b32 s16, s0
s_cbranch_execz .LBB1_16
v_ashrrev_i32_e32 v16, 31, v15
s_mov_b32 s17, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[15:16], 2, v[15:16]
v_add_co_u32 v15, vcc_lo, s4, v15
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v16, vcc_lo, s5, v16, vcc_lo
global_load_b64 v[15:16], v[15:16], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e64 v15, v16
s_cbranch_execz .LBB1_15
v_ashrrev_i32_e32 v18, 31, v15
v_mov_b32_e32 v17, v15
s_mov_b32 s18, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[17:18], 2, v[17:18]
v_add_co_u32 v17, vcc_lo, s6, v17
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v18, vcc_lo, s7, v18, vcc_lo
.LBB1_13:
global_load_b32 v4, v[17:18], off
v_add_nc_u32_e32 v15, 1, v15
v_add_co_u32 v17, vcc_lo, v17, 4
v_add_co_ci_u32_e32 v18, vcc_lo, 0, v18, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_cmp_ge_i32_e32 vcc_lo, v15, v16
s_or_b32 s18, vcc_lo, s18
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e64 s0, v4, v1
v_add_co_ci_u32_e64 v0, s0, 0, v0, s0
s_and_not1_b32 exec_lo, exec_lo, s18
s_cbranch_execnz .LBB1_13
s_or_b32 exec_lo, exec_lo, s18
.LBB1_15:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s17
.LBB1_16:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s16
.LBB1_17:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
s_or_b32 exec_lo, exec_lo, s15
v_add_nc_u32_e32 v14, 1, v14
v_cmp_ge_i32_e32 vcc_lo, v14, v13
s_or_b32 s14, vcc_lo, s14
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s14
s_cbranch_execnz .LBB1_9
s_or_b32 exec_lo, exec_lo, s14
.LBB1_19:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s13
.LBB1_20:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
s_or_b32 exec_lo, exec_lo, s12
v_add_nc_u32_e32 v10, 1, v10
v_cmp_ge_i32_e32 vcc_lo, v10, v9
s_or_b32 s9, vcc_lo, s9
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s9
s_cbranch_execnz .LBB1_6
s_or_b32 exec_lo, exec_lo, s9
.LBB1_22:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s8
.LBB1_23:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
s_or_b32 exec_lo, exec_lo, s3
v_add_nc_u32_e32 v6, 1, v6
v_cmp_ge_i32_e32 vcc_lo, v6, v5
s_or_b32 s2, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB1_3
s_or_b32 exec_lo, exec_lo, s2
.LBB1_25:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s1
v_add_co_u32 v1, vcc_lo, s10, v2
v_add_co_ci_u32_e32 v2, vcc_lo, s11, v3, vcc_lo
global_store_b32 v[1:2], v0, off
.LBB1_26:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| deviceDFSk4 | 3,843 | 3,306 | stackv2-00000-of-00015 |
// Demangled: deviceDFSk5(int*, int*, int*, int*)
Function : _Z11deviceDFSk5PiS_S_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x390] &wr=0x1 ?trans2;
LDG.E R3, desc[UR6][R2.64] &req={1} &wr=0x2 ?trans6;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
S2R R13, SR_TID.X &wr=0x1 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R0, UR4, R13 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, R3, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans2;
IMAD.WIDE R2, R0, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R17, desc[UR6][R2.64] &wr=0x2 ?trans4;
LDG.E R12, desc[UR6][R2.64+0x4] &wr=0x2 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR4, 0x400 ?trans1;
BSSY.RECONVERGENT B4, 0xa30 ?trans1;
HFMA2 R14, -RZ, RZ, 0, 0 ?trans1;
SHF.R.S32.HI R15, RZ, 0x1f, R0 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={0} ?WAIT6_END_GROUP;
LEA R13, R13, UR4, 0x2 ?WAIT5_END_GROUP;
STS [R13], RZ &rd=0x0 ?trans1;
ISETP.GE.AND P0, PT, R17, R12, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0xa20 &req={0} ?trans5;
MOV R14, RZ ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x388] &req={0} &wr=0x0 ?trans2;
IMAD.WIDE R2, R17, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R19, desc[UR6][R2.64] &wr=0x2 ?trans1;
IADD3 R17, PT, PT, R17, 0x1, RZ ?trans1;
BSSY.RECONVERGENT B3, 0xa10 ?trans4;
ISETP.GE.AND P2, PT, R17, R12, PT ?trans1;
ISETP.NE.AND P0, PT, R19, R0, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0xa00 &req={1} ?trans5;
LDCU.64 UR4, c[0x0][0x380] &wr=0x0 ?trans1;
SHF.R.S32.HI R4, RZ, 0x1f, R19 ?trans2;
LEA R2, P0, R19, UR4, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R3, R19, UR5, R4, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R21, desc[UR6][R2.64] &wr=0x2 ?trans4;
LDG.E R16, desc[UR6][R2.64+0x4] &wr=0x2 ?trans2;
ISETP.GE.AND P0, PT, R21, R16, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0xa00 ?trans5;
LDC.64 R2, c[0x0][0x388] &req={0} &wr=0x0 ?trans2;
IMAD.WIDE R2, R21, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R18, desc[UR6][R2.64] &wr=0x2 ?trans1;
IADD3 R21, PT, PT, R21, 0x1, RZ ?trans1;
BSSY.RECONVERGENT B2, 0x9f0 ?trans4;
ISETP.GE.AND P1, PT, R21, R16, PT ?trans1;
ISETP.NE.AND P0, PT, R18, R0, PT &req={2} ?WAIT5_END_GROUP;
ISETP.EQ.OR P0, PT, R18, R19, !P0 ?WAIT13_END_GROUP;
@P0 BRA 0x9e0 &req={1} ?trans5;
LDCU.64 UR4, c[0x0][0x380] &wr=0x0 ?trans1;
SHF.R.S32.HI R3, RZ, 0x1f, R18 ?trans2;
LEA R2, P0, R18, UR4, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R3, R18, UR5, R3, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R23, desc[UR6][R2.64] &wr=0x2 ?trans4;
LDG.E R20, desc[UR6][R2.64+0x4] &wr=0x2 ?trans2;
ISETP.GE.AND P0, PT, R23, R20, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x9e0 ?trans5;
LDC.64 R2, c[0x0][0x388] &req={0} &wr=0x0 ?trans2;
IMAD.WIDE R2, R23, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R25, desc[UR6][R2.64] &wr=0x2 ?trans1;
IADD3 R23, PT, PT, R23, 0x1, RZ ?trans1;
BSSY.RECONVERGENT B1, 0x9d0 ?trans4;
ISETP.GE.AND P3, PT, R23, R20, PT ?trans1;
ISETP.NE.AND P0, PT, R25, R19, PT &req={2} ?WAIT5_END_GROUP;
ISETP.EQ.OR P0, PT, R25, R18, !P0 ?WAIT5_END_GROUP;
ISETP.EQ.OR P0, PT, R25, R0, P0 ?WAIT13_END_GROUP;
@P0 BRA 0x9c0 &req={1} ?trans5;
LDCU.64 UR4, c[0x0][0x380] &wr=0x0 ?trans1;
SHF.R.S32.HI R4, RZ, 0x1f, R25 ?trans2;
LEA R2, P0, R25, UR4, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R3, R25, UR5, R4, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R27, desc[UR6][R2.64] &wr=0x2 ?trans4;
LDG.E R22, desc[UR6][R2.64+0x4] &wr=0x2 ?trans2;
ISETP.GE.AND P0, PT, R27, R22, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x9c0 ?trans5;
LDCU.64 UR4, c[0x0][0x388] &req={0} &wr=0x0 ?trans2;
MOV.64 R2, UR4 &req={0} ?WAIT6_END_GROUP;
IMAD.WIDE R4, R27, 0x4, R2 ?WAIT5_END_GROUP;
LDG.E R7, desc[UR6][R4.64] &wr=0x2 ?trans1;
IADD3 R27, PT, PT, R27, 0x1, RZ ?trans1;
BSSY.RECONVERGENT B0, 0x9b0 ?trans4;
ISETP.GE.AND P4, PT, R27, R22, PT ?trans1;
ISETP.NE.AND P0, PT, R7, R18, PT &req={2} ?WAIT5_END_GROUP;
ISETP.EQ.OR P0, PT, R7, R25, !P0 ?WAIT5_END_GROUP;
ISETP.EQ.OR P0, PT, R7, R19, P0 ?WAIT5_END_GROUP;
ISETP.EQ.OR P0, PT, R7, R0, P0 ?WAIT13_END_GROUP;
@P0 BRA 0x9a0 &req={1} ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans2;
IMAD.WIDE R4, R7, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
LDG.E R29, desc[UR6][R4.64] &wr=0x2 ?trans4;
LDG.E R24, desc[UR6][R4.64+0x4] &wr=0x2 ?trans2;
ISETP.GE.AND P0, PT, R29, R24, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x9a0 ?trans5;
IADD3 R4, PT, PT, R24, -R29, RZ ?trans1;
BSSY.RECONVERGENT B5, 0x810 ?trans1;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?WAIT3_END_GROUP;
ISETP.GT.AND P5, PT, R4, 0x3, PT ?WAIT13_END_GROUP;
@!P5 BRA 0x800 ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x80 ?trans2;
IADD3 R26, PT, PT, R24, -0x3, RZ ?WAIT11_END_GROUP;
IMAD.WIDE R4, R29.reuse, 0x4, R2 &req={0} ?trans1;
IADD3 R7, PT, PT, R29, 0x1, RZ ?WAIT5_END_GROUP;
LDG.E R5, desc[UR6][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE R6, R7, 0x4, R2 ?trans1;
IADD3 R9, PT, PT, R29, 0x2, RZ ?WAIT5_END_GROUP;
LDG.E R7, desc[UR6][R6.64] &wr=0x3 ?trans1;
IMAD.WIDE R8, R9, 0x4, R2 ?trans1;
IADD3 R11, PT, PT, R29, 0x3, RZ ?WAIT5_END_GROUP;
LDG.E R9, desc[UR6][R8.64] &wr=0x4 ?trans1;
IMAD.WIDE R10, R11, 0x4, R2 ?WAIT6_END_GROUP;
LDG.E R11, desc[UR6][R10.64] &wr=0x5 ?trans1;
IADD3 R29, PT, PT, R29, 0x4, RZ ?trans1;
ISETP.NE.AND P6, PT, R5, R0.reuse, PT &req={2} ?trans1;
ISETP.NE.AND P5, PT, R7, R0, PT &req={3} ?WAIT12_END_GROUP;
@!P6 IADD3 R14, PT, PT, R14, 0x1, RZ ?WAIT5_END_GROUP;
@!P6 STS [R13], R14 &rd=0x0 ?trans1;
ISETP.NE.AND P6, PT, R9, R0, PT &req={4} ?trans1;
@!P5 IADD3 R14, PT, PT, R14, 0x1, RZ &req={0} ?WAIT5_END_GROUP;
@!P5 STS [R13], R14 &rd=0x0 ?trans1;
ISETP.NE.AND P5, PT, R11, R0, PT &req={5} ?WAIT6_END_GROUP;
@!P6 IADD3 R14, PT, PT, R14, 0x1, RZ &req={0} ?WAIT5_END_GROUP;
@!P6 STS [R13], R14 &rd=0x0 ?trans2;
@!P5 IADD3 R14, PT, PT, R14, 0x1, RZ &req={0} ?WAIT5_END_GROUP;
@!P5 STS [R13], R14 &rd=0x1 ?trans1;
ISETP.GE.AND P5, PT, R29, R26, PT ?WAIT13_END_GROUP;
@!P5 BRA 0x660 &req={1} ?trans5;
BSYNC.RECONVERGENT B5 ?trans5;
IADD3 R4, PT, PT, R24, -R29, RZ ?trans1;
BSSY.RECONVERGENT B5, 0x930 ?trans4;
ISETP.GT.AND P5, PT, R4, 0x1, PT ?WAIT13_END_GROUP;
@!P5 BRA 0x920 ?trans5;
IMAD.WIDE R4, R29.reuse, 0x4, R2 ?trans1;
IADD3 R29, PT, PT, R29, 0x1, RZ ?WAIT5_END_GROUP;
LDG.E R5, desc[UR6][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE R6, R29, 0x4, R2 ?WAIT6_END_GROUP;
LDG.E R7, desc[UR6][R6.64] &wr=0x3 ?trans1;
IADD3 R29, PT, PT, R29, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R5, R0.reuse, PT &req={2} ?trans1;
ISETP.NE.AND P5, PT, R7, R0, PT &req={3} ?WAIT12_END_GROUP;
@!P0 IADD3 R14, PT, PT, R14, 0x1, RZ ?WAIT5_END_GROUP;
@!P0 STS [R13], R14 &rd=0x0 ?trans1;
PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x80 ?trans2;
@!P5 IADD3 R14, PT, PT, R14, 0x1, RZ &req={0} ?WAIT5_END_GROUP;
@!P5 STS [R13], R14 &rd=0x0 ?trans6;
BSYNC.RECONVERGENT B5 ?trans5;
ISETP.LT.OR P0, PT, R29, R24, P0 ?WAIT13_END_GROUP;
@!P0 BRA 0x9a0 ?trans5;
IMAD.WIDE R2, R29, 0x4, R2 ?WAIT6_END_GROUP;
LDG.E R3, desc[UR6][R2.64] &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R3, R0, PT &req={2} ?WAIT13_END_GROUP;
@!P0 IADD3 R14, PT, PT, R14, 0x1, RZ &req={0} ?WAIT5_END_GROUP;
@!P0 STS [R13], R14 &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
@!P4 BRA 0x4c0 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
@!P3 BRA 0x3a0 ?trans5;
BSYNC.RECONVERGENT B2 ?trans5;
@!P1 BRA 0x290 ?trans5;
BSYNC.RECONVERGENT B3 ?trans5;
@!P2 BRA 0x190 ?trans5;
BSYNC.RECONVERGENT B4 ?trans5;
LDCU.64 UR4, c[0x0][0x398] &wr=0x2 ?trans2;
LEA R2, P0, R0, UR4, 0x2 &req={2} ?WAIT4_END_GROUP;
LEA.HI.X R3, R0, UR5, R15, 0x2, P0 ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R14 ?trans1;
EXIT ?trans5;
BRA 0xa80;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: deviceDFSk5(int*, int*, int*, int*)
_Z11deviceDFSk5PiS_S_S_:
s_clause 0x1
s_load_b256 s[4:11], s[0:1], 0x0
s_load_b32 s0, s[0:1], 0x2c
s_waitcnt lgkmcnt(0)
s_load_b32 s1, s[8:9], 0x0
s_and_b32 s0, s0, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
s_mov_b32 s0, exec_lo
s_waitcnt lgkmcnt(0)
v_cmpx_gt_i32_e64 s1, v1
s_cbranch_execz .LBB0_34
v_ashrrev_i32_e32 v2, 31, v1
v_mov_b32_e32 v0, 0
s_mov_b32 s1, exec_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
global_load_b64 v[4:5], v[4:5], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e64 v4, v5
s_cbranch_execz .LBB0_33
v_mov_b32_e32 v0, 0
v_mov_b32_e32 v6, v4
s_mov_b32 s2, 0
.LBB0_3:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v7, 31, v6
s_mov_b32 s3, exec_lo
v_lshlrev_b64 v[7:8], 2, v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v7, vcc_lo, s6, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
global_load_b32 v7, v[7:8], off
s_waitcnt vmcnt(0)
v_cmpx_ne_u32_e64 v7, v1
s_cbranch_execz .LBB0_31
v_ashrrev_i32_e32 v8, 31, v7
s_mov_b32 s8, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[8:9], 2, v[7:8]
v_add_co_u32 v8, vcc_lo, s4, v8
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
global_load_b64 v[8:9], v[8:9], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e64 v8, v9
s_cbranch_execz .LBB0_30
v_mov_b32_e32 v10, v8
s_mov_b32 s9, 0
.LBB0_6:
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v11, 31, v10
v_lshlrev_b64 v[11:12], 2, v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v11, vcc_lo, s6, v11
v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
global_load_b32 v11, v[11:12], off
s_waitcnt vmcnt(0)
v_cmp_ne_u32_e32 vcc_lo, v11, v7
v_cmp_ne_u32_e64 s0, v11, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, vcc_lo, s0
s_and_saveexec_b32 s12, s0
s_cbranch_execz .LBB0_28
v_ashrrev_i32_e32 v12, 31, v11
s_mov_b32 s13, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[12:13], 2, v[11:12]
v_add_co_u32 v12, vcc_lo, s4, v12
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v13, vcc_lo, s5, v13, vcc_lo
global_load_b64 v[12:13], v[12:13], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e64 v12, v13
s_cbranch_execz .LBB0_27
v_mov_b32_e32 v14, v12
s_mov_b32 s14, 0
.LBB0_9:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v15, 31, v14
s_mov_b32 s15, exec_lo
v_lshlrev_b64 v[15:16], 2, v[14:15]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v15, vcc_lo, s6, v15
v_add_co_ci_u32_e32 v16, vcc_lo, s7, v16, vcc_lo
global_load_b32 v15, v[15:16], off
s_waitcnt vmcnt(0)
v_cmpx_ne_u32_e64 v15, v11
s_cbranch_execz .LBB0_25
v_cmp_ne_u32_e32 vcc_lo, v15, v7
v_cmp_ne_u32_e64 s0, v15, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, vcc_lo, s0
s_and_saveexec_b32 s16, s0
s_cbranch_execz .LBB0_24
v_ashrrev_i32_e32 v16, 31, v15
s_mov_b32 s17, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[16:17], 2, v[15:16]
v_add_co_u32 v16, vcc_lo, s4, v16
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v17, vcc_lo, s5, v17, vcc_lo
global_load_b64 v[16:17], v[16:17], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e64 v16, v17
s_cbranch_execz .LBB0_23
v_mov_b32_e32 v18, v16
s_mov_b32 s18, 0
.LBB0_13:
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v19, 31, v18
v_lshlrev_b64 v[19:20], 2, v[18:19]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v19, vcc_lo, s6, v19
v_add_co_ci_u32_e32 v20, vcc_lo, s7, v20, vcc_lo
global_load_b32 v19, v[19:20], off
s_waitcnt vmcnt(0)
v_cmp_ne_u32_e32 vcc_lo, v19, v15
v_cmp_ne_u32_e64 s0, v19, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, vcc_lo, s0
s_and_saveexec_b32 s19, s0
s_cbranch_execz .LBB0_21
v_cmp_ne_u32_e32 vcc_lo, v19, v7
v_cmp_ne_u32_e64 s0, v19, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, vcc_lo, s0
s_and_saveexec_b32 s20, s0
s_cbranch_execz .LBB0_20
v_ashrrev_i32_e32 v20, 31, v19
s_mov_b32 s21, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[19:20], 2, v[19:20]
v_add_co_u32 v19, vcc_lo, s4, v19
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v20, vcc_lo, s5, v20, vcc_lo
global_load_b64 v[19:20], v[19:20], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e64 v19, v20
s_cbranch_execz .LBB0_19
v_ashrrev_i32_e32 v22, 31, v19
v_mov_b32_e32 v21, v19
s_mov_b32 s22, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[21:22], 2, v[21:22]
v_add_co_u32 v21, vcc_lo, s6, v21
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v22, vcc_lo, s7, v22, vcc_lo
.LBB0_17:
global_load_b32 v4, v[21:22], off
v_add_nc_u32_e32 v19, 1, v19
v_add_co_u32 v21, vcc_lo, v21, 4
v_add_co_ci_u32_e32 v22, vcc_lo, 0, v22, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_cmp_ge_i32_e32 vcc_lo, v19, v20
s_or_b32 s22, vcc_lo, s22
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e64 s0, v4, v1
v_add_co_ci_u32_e64 v0, s0, 0, v0, s0
s_and_not1_b32 exec_lo, exec_lo, s22
s_cbranch_execnz .LBB0_17
s_or_b32 exec_lo, exec_lo, s22
.LBB0_19:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s21
.LBB0_20:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s20
.LBB0_21:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
s_or_b32 exec_lo, exec_lo, s19
v_add_nc_u32_e32 v18, 1, v18
v_cmp_ge_i32_e32 vcc_lo, v18, v17
s_or_b32 s18, vcc_lo, s18
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s18
s_cbranch_execnz .LBB0_13
s_or_b32 exec_lo, exec_lo, s18
.LBB0_23:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s17
.LBB0_24:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s16
.LBB0_25:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
s_or_b32 exec_lo, exec_lo, s15
v_add_nc_u32_e32 v14, 1, v14
v_cmp_ge_i32_e32 vcc_lo, v14, v13
s_or_b32 s14, vcc_lo, s14
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s14
s_cbranch_execnz .LBB0_9
s_or_b32 exec_lo, exec_lo, s14
.LBB0_27:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s13
.LBB0_28:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
s_or_b32 exec_lo, exec_lo, s12
v_add_nc_u32_e32 v10, 1, v10
v_cmp_ge_i32_e32 vcc_lo, v10, v9
s_or_b32 s9, vcc_lo, s9
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s9
s_cbranch_execnz .LBB0_6
s_or_b32 exec_lo, exec_lo, s9
.LBB0_30:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s8
.LBB0_31:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
s_or_b32 exec_lo, exec_lo, s3
v_add_nc_u32_e32 v6, 1, v6
v_cmp_ge_i32_e32 vcc_lo, v6, v5
s_or_b32 s2, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB0_3
s_or_b32 exec_lo, exec_lo, s2
.LBB0_33:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s1
v_add_co_u32 v1, vcc_lo, s10, v2
v_add_co_ci_u32_e32 v2, vcc_lo, s11, v3, vcc_lo
global_store_b32 v[1:2], v0, off
.LBB0_34:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| deviceDFSk5 | 4,378 | 4,233 | stackv2-00000-of-00015 |
// Demangled: trasp_mat(int, double*, double*)
Function : _Z9trasp_matiPdS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans8;
LDC R9, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD R0, R0, UR4, R3 &req={1} ?WAIT2_END_GROUP;
IMAD R3, R9, R9, RZ &req={2} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, R3, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
IABS R5, R9 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans1;
IABS R8, R0 ?trans2;
I2F.RP R4, R5 &wr=0x1 ?trans2;
MUFU.RCP R4, R4 &req={1} &wr=0x1 ?trans2;
IADD3 R2, PT, PT, R4, 0xffffffe, RZ &req={1} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R3, R2 &rd=0x1 &wr=0x2 ?trans2;
HFMA2 R2, -RZ, RZ, 0, 0 &req={1} ?trans1;
IADD3 R6, PT, PT, RZ, -R3, RZ &req={2} ?WAIT5_END_GROUP;
IMAD R7, R6, R5, RZ ?trans1;
MOV R6, R8 ?WAIT3_END_GROUP;
IMAD.HI.U32 R3, R3, R7, R2 ?trans1;
LOP3.LUT R2, R0, R9, RZ, 0x3c, !PT ?WAIT5_END_GROUP;
IMAD.HI.U32 R3, R3, R6, RZ ?WAIT5_END_GROUP;
IADD3 R4, PT, PT, -R3, RZ, RZ ?WAIT5_END_GROUP;
IMAD R4, R5, R4, R6 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R5, R4, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R4, PT, PT, R4, -R5.reuse, RZ ?trans2;
@!P0 IADD3 R3, PT, PT, R3, 0x1, RZ ?trans1;
ISETP.GE.AND P0, PT, R2, RZ, PT ?trans2;
ISETP.GE.U32.AND P1, PT, R4, R5, PT ?WAIT13_END_GROUP;
@P1 IADD3 R3, PT, PT, R3, 0x1, RZ ?trans1;
ISETP.NE.AND P1, PT, R9, RZ, PT ?WAIT4_END_GROUP;
MOV R6, R3 ?trans2;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans3;
@!P0 IADD3 R6, PT, PT, -R6, RZ, RZ ?WAIT4_END_GROUP;
@!P1 LOP3.LUT R6, RZ, R9, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R7, PT, PT, -R6, RZ, RZ ?WAIT5_END_GROUP;
IMAD R7, R9, R7, R0 ?WAIT4_END_GROUP;
IMAD R5, R6, R9, R7 ?WAIT4_END_GROUP;
IMAD.WIDE R2, R5, 0x8, R2 &req={1} ?trans2;
LDC.64 R4, c[0x0][0x390] &wr=0x1 ?trans4;
LDG.E.64 R2, desc[UR4][R2.64] &req={0} &wr=0x2 ?trans1;
IMAD R7, R7, R9, R6 ?WAIT4_END_GROUP;
IMAD.WIDE R4, R7, 0x8, R4 &req={1} ?WAIT5_END_GROUP;
STG.E.64 desc[UR4][R4.64], R2 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x2e0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: trasp_mat(int, double*, double*)
_Z9trasp_matiPdS_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s4, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mul_i32 s2, s4, s4
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_i32_e32 vcc_lo, s2, v1
s_and_saveexec_b32 s2, vcc_lo
s_cbranch_execz .LBB0_2
s_load_b128 s[0:3], s[0:1], 0x8
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 3, v[1:2]
v_add_nc_u32_e32 v6, v1, v2
v_xor_b32_e32 v6, v6, v2
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v3, vcc_lo, s0, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
s_ashr_i32 s0, s4, 31
s_delay_alu instid0(SALU_CYCLE_1)
s_add_i32 s1, s4, s0
global_load_b64 v[3:4], v[3:4], off
s_xor_b32 s1, s1, s0
v_xor_b32_e32 v2, s0, v2
v_cvt_f32_u32_e32 v0, s1
s_sub_i32 s5, 0, s1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v0, v0
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
v_cvt_u32_f32_e32 v0, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v5, s5, v0
v_mul_hi_u32 v5, v0, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v0, v0, v5
v_mul_hi_u32 v0, v6, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v5, v0, s1
v_sub_nc_u32_e32 v5, v6, v5
v_add_nc_u32_e32 v6, 1, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v7, s1, v5
v_cmp_le_u32_e32 vcc_lo, s1, v5
v_dual_cndmask_b32 v5, v5, v7 :: v_dual_cndmask_b32 v0, v0, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_u32_e32 vcc_lo, s1, v5
v_add_nc_u32_e32 v6, 1, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v0, v0, v6, vcc_lo
v_xor_b32_e32 v0, v0, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v0, v0, v2
v_mul_lo_u32 v2, v0, s4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v5, v1, v2
v_mad_u64_u32 v[1:2], null, v5, s4, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[0:1], 3, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
s_waitcnt vmcnt(0)
global_store_b64 v[0:1], v[3:4], off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| trasp_mat | 1,164 | 1,487 | stackv2-00000-of-00015 |
// Demangled: kernel(unsigned long, float*, LargeArg, int)
Function : _Z6kernelmPf8LargeArgi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
HFMA2 R3, -RZ, RZ, 4.6015625, 2 ?trans1;
UMOV.64 UR6, 0x2800 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?WAIT9_END_GROUP;
LDS.128 R128, [UR4] &wr=0x1 ?trans4;
LDS.128 R124, [UR4+0x10] &wr=0x2 ?trans4;
LDS.128 R120, [UR4+0x20] &wr=0x3 ?trans4;
LDS.128 R116, [UR4+0x30] &wr=0x4 ?trans4;
LDS.128 R112, [UR4+0x40] &wr=0x5 ?trans4;
LDS.128 R108, [UR4+0x50] &wr=0x0 ?trans4;
LDS.128 R104, [UR4+0x60] &wr=0x0 ?trans4;
LDS.128 R100, [UR4+0x70] &wr=0x0 ?trans4;
LDS.128 R96, [UR4+0x80] &wr=0x0 ?trans4;
LDS.128 R92, [UR4+0x90] &wr=0x0 ?trans4;
LDS.128 R88, [UR4+0xa0] &wr=0x0 ?trans4;
LDS.128 R84, [UR4+0xb0] &wr=0x0 ?trans4;
LDS.128 R80, [UR4+0xc0] &wr=0x0 ?trans4;
LDS.128 R76, [UR4+0xd0] &wr=0x0 ?trans4;
LDS.128 R72, [UR4+0xe0] &wr=0x0 ?trans4;
LDS.128 R68, [UR4+0xf0] &wr=0x0 ?trans4;
LDS.128 R64, [UR4+0x100] &wr=0x0 ?trans4;
LDS.128 R60, [UR4+0x110] &wr=0x0 ?trans4;
LDS.128 R56, [UR4+0x120] &wr=0x0 ?trans4;
LDS.128 R52, [UR4+0x130] &wr=0x0 ?trans4;
LDS.128 R48, [UR4+0x140] &wr=0x0 ?trans4;
LDS.128 R44, [UR4+0x150] &wr=0x0 ?trans4;
LDS.128 R40, [UR4+0x160] &wr=0x0 ?trans4;
LDS.128 R36, [UR4+0x170] &wr=0x0 ?trans4;
LDS.128 R32, [UR4+0x180] &wr=0x0 ?trans4;
LDS.128 R28, [UR4+0x190] &wr=0x0 ?trans4;
LDS.128 R24, [UR4+0x1a0] &wr=0x0 ?trans4;
LDS.128 R20, [UR4+0x1b0] &wr=0x0 ?trans4;
LDS.128 R16, [UR4+0x1c0] &wr=0x0 ?trans4;
LDS.128 R12, [UR4+0x1d0] &wr=0x0 ?trans4;
LDS.128 R8, [UR4+0x1e0] &wr=0x0 ?trans4;
LDS.128 R4, [UR4+0x1f0] &req={5,4,3,2,1} &wr=0x0 ?trans2;
MUFU.RCP R2, R129 &wr=0x1 ?trans1;
FADD R0, R128, R3 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR6, -0x1, URZ ?WAIT3_END_GROUP;
FCHK P0, R0, R129 &wr=0x2 ?trans3;
ISETP.NE.S64.AND P2, PT, RZ, UR6, PT ?trans2;
FFMA R133, R2, -R129, 1 &req={1} ?WAIT4_END_GROUP;
FFMA R133, R2, R133, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R133, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R129, R0 ?WAIT4_END_GROUP;
FFMA R3, R133, R3, R2 ?trans1;
@!P0 BRA 0x350 &req={2} ?trans6;
MOV R3, R129 ?trans1;
MOV R2, 0x340 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1f70 &req={0} ?trans5;
MOV R3, R133 ?WAIT7_END_GROUP;
MUFU.RCP R2, R125 &wr=0x1 ?trans1;
FADD R3, R3, -R130 ?WAIT4_END_GROUP;
FFMA R0, R3, R131, R124 ?WAIT4_END_GROUP;
FCHK P0, R0, R125 &wr=0x2 ?trans1;
FFMA R133, R2, -R125, 1 &req={1} ?WAIT4_END_GROUP;
FFMA R133, R2, R133, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R133, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R125, R0 ?WAIT4_END_GROUP;
FFMA R3, R133, R3, R2 ?trans1;
@!P0 BRA 0x430 &req={2} ?trans6;
MOV R3, R125 ?trans1;
MOV R2, 0x420 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1f70 &req={0} ?trans5;
MOV R3, R133 ?WAIT7_END_GROUP;
MUFU.RCP R2, R121 &wr=0x1 ?trans1;
FADD R3, R3, -R126 ?WAIT4_END_GROUP;
FFMA R0, R3, R127, R120 ?WAIT4_END_GROUP;
FCHK P0, R0, R121 &wr=0x2 ?trans1;
FFMA R133, R2, -R121, 1 &req={1} ?WAIT4_END_GROUP;
FFMA R133, R2, R133, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R133, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R121, R0 ?WAIT4_END_GROUP;
FFMA R3, R133, R3, R2 ?trans1;
@!P0 BRA 0x510 &req={2} ?trans6;
MOV R3, R121 ?trans1;
MOV R2, 0x500 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1f70 &req={0} ?trans5;
MOV R3, R133 ?WAIT7_END_GROUP;
MUFU.RCP R2, R117 &wr=0x1 ?trans1;
FADD R3, R3, -R122 ?WAIT4_END_GROUP;
FFMA R0, R3, R123, R116 ?WAIT4_END_GROUP;
FCHK P0, R0, R117 &wr=0x2 ?trans1;
FFMA R133, R2, -R117, 1 &req={1} ?WAIT4_END_GROUP;
FFMA R133, R2, R133, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R133, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R117, R0 ?WAIT4_END_GROUP;
FFMA R3, R133, R3, R2 ?trans1;
@!P0 BRA 0x5f0 &req={2} ?trans6;
MOV R3, R117 ?trans1;
MOV R2, 0x5e0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1f70 &req={0} ?trans5;
MOV R3, R133 ?WAIT7_END_GROUP;
MUFU.RCP R2, R113 &wr=0x1 ?trans1;
FADD R3, R3, -R118 ?WAIT4_END_GROUP;
FFMA R0, R3, R119, R112 ?WAIT4_END_GROUP;
FCHK P0, R0, R113 &wr=0x2 ?trans1;
FFMA R133, R2, -R113, 1 &req={1} ?WAIT4_END_GROUP;
FFMA R133, R2, R133, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R133, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R113, R0 ?WAIT4_END_GROUP;
FFMA R3, R133, R3, R2 ?trans1;
@!P0 BRA 0x6d0 &req={2} ?trans6;
MOV R3, R113 ?trans1;
MOV R2, 0x6c0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1f70 &req={0} ?trans5;
MOV R3, R133 ?WAIT7_END_GROUP;
MUFU.RCP R2, R109 &req={0} &wr=0x0 ?trans1;
FADD R3, R3, -R114 ?WAIT4_END_GROUP;
FFMA R0, R3, R115, R108 ?WAIT4_END_GROUP;
FCHK P0, R0, R109 &wr=0x1 ?trans1;
FFMA R133, R2, -R109, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R133, R2, R133, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R133, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R109, R0 ?WAIT4_END_GROUP;
FFMA R3, R133, R3, R2 ?trans1;
@!P0 BRA 0x7b0 &req={1} ?trans6;
MOV R3, R109 ?trans1;
MOV R2, 0x7a0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1f70 ?trans5;
MOV R3, R133 ?WAIT7_END_GROUP;
MUFU.RCP R2, R105 &wr=0x0 ?trans1;
FADD R3, R3, -R110 ?WAIT4_END_GROUP;
FFMA R0, R3, R111, R104 ?WAIT4_END_GROUP;
FCHK P0, R0, R105 &wr=0x1 ?trans1;
FFMA R133, R2, -R105, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R133, R2, R133, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R133, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R105, R0 ?WAIT4_END_GROUP;
FFMA R3, R133, R3, R2 ?trans1;
@!P0 BRA 0x890 &req={1} ?trans6;
MOV R3, R105 ?trans1;
MOV R2, 0x880 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1f70 ?trans5;
MOV R3, R133 ?WAIT7_END_GROUP;
MUFU.RCP R2, R101 &wr=0x0 ?trans1;
FADD R3, R3, -R106 ?WAIT4_END_GROUP;
FFMA R0, R3, R107, R100 ?WAIT4_END_GROUP;
FCHK P0, R0, R101 &wr=0x1 ?trans1;
FFMA R133, R2, -R101, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R133, R2, R133, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R133, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R101, R0 ?WAIT4_END_GROUP;
FFMA R3, R133, R3, R2 ?trans1;
@!P0 BRA 0x970 &req={1} ?trans6;
MOV R3, R101 ?trans1;
MOV R2, 0x960 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1f70 ?trans5;
MOV R3, R133 ?WAIT7_END_GROUP;
MUFU.RCP R2, R97 &wr=0x0 ?trans1;
FADD R3, R3, -R102 ?WAIT4_END_GROUP;
FFMA R0, R3, R103, R96 ?WAIT4_END_GROUP;
FCHK P0, R0, R97 &wr=0x1 ?trans1;
FFMA R133, R2, -R97, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R133, R2, R133, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R133, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R97, R0 ?WAIT4_END_GROUP;
FFMA R3, R133, R3, R2 ?trans1;
@!P0 BRA 0xa50 &req={1} ?trans6;
MOV R3, R97 ?trans1;
MOV R2, 0xa40 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1f70 ?trans5;
MOV R3, R133 ?WAIT7_END_GROUP;
MUFU.RCP R2, R93 &wr=0x0 ?trans1;
FADD R3, R3, -R98 ?WAIT4_END_GROUP;
FFMA R0, R3, R99, R92 ?WAIT4_END_GROUP;
FCHK P0, R0, R93 &wr=0x1 ?trans1;
FFMA R133, R2, -R93, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R133, R2, R133, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R133, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R93, R0 ?WAIT4_END_GROUP;
FFMA R3, R133, R3, R2 ?trans1;
@!P0 BRA 0xb30 &req={1} ?trans6;
MOV R3, R93 ?trans1;
MOV R2, 0xb20 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1f70 ?trans5;
MOV R3, R133 ?WAIT7_END_GROUP;
MUFU.RCP R2, R89 &wr=0x0 ?trans1;
FADD R3, R3, -R94 ?WAIT4_END_GROUP;
FFMA R0, R3, R95, R88 ?WAIT4_END_GROUP;
FCHK P0, R0, R89 &wr=0x1 ?trans1;
FFMA R133, R2, -R89, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R133, R2, R133, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R133, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R89, R0 ?WAIT4_END_GROUP;
FFMA R3, R133, R3, R2 ?trans1;
@!P0 BRA 0xc10 &req={1} ?trans6;
MOV R3, R89 ?trans1;
MOV R2, 0xc00 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1f70 ?trans5;
MOV R3, R133 ?WAIT7_END_GROUP;
MUFU.RCP R2, R85 &wr=0x0 ?trans1;
FADD R3, R3, -R90 ?WAIT4_END_GROUP;
FFMA R0, R3, R91, R84 ?WAIT4_END_GROUP;
FCHK P0, R0, R85 &wr=0x1 ?trans1;
FFMA R133, R2, -R85, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R133, R2, R133, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R133, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R85, R0 ?WAIT4_END_GROUP;
FFMA R3, R133, R3, R2 ?trans1;
@!P0 BRA 0xcf0 &req={1} ?trans6;
MOV R3, R85 ?trans1;
MOV R2, 0xce0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1f70 ?trans5;
MOV R3, R133 ?WAIT7_END_GROUP;
MUFU.RCP R2, R81 &wr=0x0 ?trans1;
FADD R3, R3, -R86 ?WAIT4_END_GROUP;
FFMA R0, R3, R87, R80 ?WAIT4_END_GROUP;
FCHK P0, R0, R81 &wr=0x1 ?trans1;
FFMA R133, R2, -R81, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R133, R2, R133, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R133, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R81, R0 ?WAIT4_END_GROUP;
FFMA R3, R133, R3, R2 ?trans1;
@!P0 BRA 0xdd0 &req={1} ?trans6;
MOV R3, R81 ?trans1;
MOV R2, 0xdc0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1f70 ?trans5;
MOV R3, R133 ?WAIT7_END_GROUP;
MUFU.RCP R2, R77 &wr=0x0 ?trans1;
FADD R3, R3, -R82 ?WAIT4_END_GROUP;
FFMA R0, R3, R83, R76 ?WAIT4_END_GROUP;
FCHK P0, R0, R77 &wr=0x1 ?trans1;
FFMA R133, R2, -R77, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R133, R2, R133, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R133, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R77, R0 ?WAIT4_END_GROUP;
FFMA R3, R133, R3, R2 ?trans1;
@!P0 BRA 0xeb0 &req={1} ?trans6;
MOV R3, R77 ?trans1;
MOV R2, 0xea0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1f70 ?trans5;
MOV R3, R133 ?WAIT7_END_GROUP;
MUFU.RCP R2, R73 &wr=0x0 ?trans1;
FADD R3, R3, -R78 ?WAIT4_END_GROUP;
FFMA R0, R3, R79, R72 ?WAIT4_END_GROUP;
FCHK P0, R0, R73 &wr=0x1 ?trans1;
FFMA R133, R2, -R73, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R133, R2, R133, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R133, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R73, R0 ?WAIT4_END_GROUP;
FFMA R3, R133, R3, R2 ?trans1;
@!P0 BRA 0xf90 &req={1} ?trans6;
MOV R3, R73 ?trans1;
MOV R2, 0xf80 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1f70 ?trans5;
MOV R3, R133 ?WAIT7_END_GROUP;
MUFU.RCP R2, R69 &wr=0x0 ?trans1;
FADD R3, R3, -R74 ?WAIT4_END_GROUP;
FFMA R0, R3, R75, R68 ?WAIT4_END_GROUP;
FCHK P0, R0, R69 &wr=0x1 ?trans1;
FFMA R133, R2, -R69, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R133, R2, R133, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R133, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R69, R0 ?WAIT4_END_GROUP;
FFMA R3, R133, R3, R2 ?trans1;
@!P0 BRA 0x1070 &req={1} ?trans6;
MOV R3, R69 ?trans1;
MOV R2, 0x1060 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1f70 ?trans5;
MOV R3, R133 ?WAIT7_END_GROUP;
MUFU.RCP R2, R65 &wr=0x0 ?trans1;
FADD R3, R3, -R70 ?WAIT4_END_GROUP;
FFMA R0, R3, R71, R64 ?WAIT4_END_GROUP;
FCHK P0, R0, R65 &wr=0x1 ?trans1;
FFMA R133, R2, -R65, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R133, R2, R133, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R133, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R65, R0 ?WAIT4_END_GROUP;
FFMA R3, R133, R3, R2 ?trans1;
@!P0 BRA 0x1150 &req={1} ?trans6;
MOV R3, R65 ?trans1;
MOV R2, 0x1140 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1f70 ?trans5;
MOV R3, R133 ?WAIT7_END_GROUP;
MUFU.RCP R2, R61 &wr=0x0 ?trans1;
FADD R3, R3, -R66 ?WAIT4_END_GROUP;
FFMA R0, R3, R67, R60 ?WAIT4_END_GROUP;
FCHK P0, R0, R61 &wr=0x1 ?trans1;
FFMA R133, R2, -R61, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R133, R2, R133, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R133, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R61, R0 ?WAIT4_END_GROUP;
FFMA R3, R133, R3, R2 ?trans1;
@!P0 BRA 0x1230 &req={1} ?trans6;
MOV R3, R61 ?trans1;
MOV R2, 0x1220 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1f70 ?trans5;
MOV R3, R133 ?WAIT7_END_GROUP;
MUFU.RCP R2, R57 &wr=0x0 ?trans1;
FADD R3, R3, -R62 ?WAIT4_END_GROUP;
FFMA R0, R3, R63, R56 ?WAIT4_END_GROUP;
FCHK P0, R0, R57 &wr=0x1 ?trans1;
FFMA R133, R2, -R57, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R133, R2, R133, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R133, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R57, R0 ?WAIT4_END_GROUP;
FFMA R3, R133, R3, R2 ?trans1;
@!P0 BRA 0x1310 &req={1} ?trans6;
MOV R3, R57 ?trans1;
MOV R2, 0x1300 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1f70 ?trans5;
MOV R3, R133 ?WAIT7_END_GROUP;
MUFU.RCP R2, R53 &wr=0x0 ?trans1;
FADD R3, R3, -R58 ?WAIT4_END_GROUP;
FFMA R0, R3, R59, R52 ?WAIT4_END_GROUP;
FCHK P0, R0, R53 &wr=0x1 ?trans1;
FFMA R133, R2, -R53, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R133, R2, R133, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R133, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R53, R0 ?WAIT4_END_GROUP;
FFMA R3, R133, R3, R2 ?trans1;
@!P0 BRA 0x13f0 &req={1} ?trans6;
MOV R3, R53 ?trans1;
MOV R2, 0x13e0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1f70 ?trans5;
MOV R3, R133 ?WAIT7_END_GROUP;
MUFU.RCP R2, R49 &wr=0x0 ?trans1;
FADD R3, R3, -R54 ?WAIT4_END_GROUP;
FFMA R0, R3, R55, R48 ?WAIT4_END_GROUP;
FCHK P0, R0, R49 &wr=0x1 ?trans1;
FFMA R133, R2, -R49, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R133, R2, R133, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R133, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R49, R0 ?WAIT4_END_GROUP;
FFMA R3, R133, R3, R2 ?trans1;
@!P0 BRA 0x14d0 &req={1} ?trans6;
MOV R3, R49 ?trans1;
MOV R2, 0x14c0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1f70 ?trans5;
MOV R3, R133 ?WAIT7_END_GROUP;
MUFU.RCP R2, R45 &wr=0x0 ?trans1;
FADD R3, R3, -R50 ?WAIT4_END_GROUP;
FFMA R0, R3, R51, R44 ?WAIT4_END_GROUP;
FCHK P0, R0, R45 &wr=0x1 ?trans1;
FFMA R133, R2, -R45, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R133, R2, R133, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R133, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R45, R0 ?WAIT4_END_GROUP;
FFMA R3, R133, R3, R2 ?trans1;
@!P0 BRA 0x15b0 &req={1} ?trans6;
MOV R3, R45 ?trans1;
MOV R2, 0x15a0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1f70 ?trans5;
MOV R3, R133 ?WAIT7_END_GROUP;
MUFU.RCP R2, R41 &wr=0x0 ?trans1;
FADD R3, R3, -R46 ?WAIT4_END_GROUP;
FFMA R0, R3, R47, R40 ?WAIT4_END_GROUP;
FCHK P0, R0, R41 &wr=0x1 ?trans1;
FFMA R133, R2, -R41, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R133, R2, R133, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R133, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R41, R0 ?WAIT4_END_GROUP;
FFMA R3, R133, R3, R2 ?trans1;
@!P0 BRA 0x1690 &req={1} ?trans6;
MOV R3, R41 ?trans1;
MOV R2, 0x1680 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1f70 ?trans5;
MOV R3, R133 ?WAIT7_END_GROUP;
MUFU.RCP R2, R37 &wr=0x0 ?trans1;
FADD R3, R3, -R42 ?WAIT4_END_GROUP;
FFMA R0, R3, R43, R36 ?WAIT4_END_GROUP;
FCHK P0, R0, R37 &wr=0x1 ?trans1;
FFMA R133, R2, -R37, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R133, R2, R133, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R133, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R37, R0 ?WAIT4_END_GROUP;
FFMA R3, R133, R3, R2 ?trans1;
@!P0 BRA 0x1770 &req={1} ?trans6;
MOV R3, R37 ?trans1;
MOV R2, 0x1760 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1f70 ?trans5;
MOV R3, R133 ?WAIT7_END_GROUP;
MUFU.RCP R2, R33 &wr=0x0 ?trans1;
FADD R3, R3, -R38 ?WAIT4_END_GROUP;
FFMA R0, R3, R39, R32 ?WAIT4_END_GROUP;
FCHK P0, R0, R33 &wr=0x1 ?trans1;
FFMA R133, R2, -R33, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R133, R2, R133, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R133, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R33, R0 ?WAIT4_END_GROUP;
FFMA R3, R133, R3, R2 ?trans1;
@!P0 BRA 0x1850 &req={1} ?trans6;
MOV R3, R33 ?trans1;
MOV R2, 0x1840 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1f70 ?trans5;
MOV R3, R133 ?WAIT7_END_GROUP;
MUFU.RCP R2, R29 &wr=0x0 ?trans1;
FADD R3, R3, -R34 ?WAIT4_END_GROUP;
FFMA R0, R3, R35, R28 ?WAIT4_END_GROUP;
FCHK P0, R0, R29 &wr=0x1 ?trans1;
FFMA R133, R2, -R29, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R133, R2, R133, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R133, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R29, R0 ?WAIT4_END_GROUP;
FFMA R3, R133, R3, R2 ?trans1;
@!P0 BRA 0x1930 &req={1} ?trans6;
MOV R3, R29 ?trans1;
MOV R2, 0x1920 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1f70 ?trans5;
MOV R3, R133 ?WAIT7_END_GROUP;
MUFU.RCP R2, R25 &wr=0x0 ?trans1;
FADD R3, R3, -R30 ?WAIT4_END_GROUP;
FFMA R0, R3, R31, R24 ?WAIT4_END_GROUP;
FCHK P0, R0, R25 &wr=0x1 ?trans1;
FFMA R133, R2, -R25, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R133, R2, R133, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R133, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R25, R0 ?WAIT4_END_GROUP;
FFMA R3, R133, R3, R2 ?trans1;
@!P0 BRA 0x1a10 &req={1} ?trans6;
MOV R3, R25 ?trans1;
MOV R2, 0x1a00 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1f70 ?trans5;
MOV R3, R133 ?WAIT7_END_GROUP;
MUFU.RCP R2, R21 &wr=0x0 ?trans1;
FADD R3, R3, -R26 ?WAIT4_END_GROUP;
FFMA R0, R3, R27, R20 ?WAIT4_END_GROUP;
FCHK P0, R0, R21 &wr=0x1 ?trans1;
FFMA R133, R2, -R21, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R133, R2, R133, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R133, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R21, R0 ?WAIT4_END_GROUP;
FFMA R3, R133, R3, R2 ?trans1;
@!P0 BRA 0x1af0 &req={1} ?trans6;
MOV R3, R21 ?trans1;
MOV R2, 0x1ae0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1f70 ?trans5;
MOV R3, R133 ?WAIT7_END_GROUP;
MUFU.RCP R2, R17 &wr=0x0 ?trans1;
FADD R3, R3, -R22 ?WAIT4_END_GROUP;
FFMA R0, R3, R23, R16 ?WAIT4_END_GROUP;
FCHK P0, R0, R17 &wr=0x1 ?trans1;
FFMA R133, R2, -R17, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R133, R2, R133, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R133, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R17, R0 ?WAIT4_END_GROUP;
FFMA R3, R133, R3, R2 ?trans1;
@!P0 BRA 0x1bd0 &req={1} ?trans6;
MOV R3, R17 ?trans1;
MOV R2, 0x1bc0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1f70 ?trans5;
MOV R3, R133 ?WAIT7_END_GROUP;
MUFU.RCP R2, R13 &wr=0x0 ?trans1;
FADD R3, R3, -R18 ?WAIT4_END_GROUP;
FFMA R0, R3, R19, R12 ?WAIT4_END_GROUP;
FCHK P0, R0, R13 &wr=0x1 ?trans1;
FFMA R133, R2, -R13, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R133, R2, R133, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R133, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R13, R0 ?WAIT4_END_GROUP;
FFMA R3, R133, R3, R2 ?trans1;
@!P0 BRA 0x1cb0 &req={1} ?trans6;
MOV R3, R13 ?trans1;
MOV R2, 0x1ca0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1f70 ?trans5;
MOV R3, R133 ?WAIT7_END_GROUP;
MUFU.RCP R2, R9 &wr=0x0 ?trans1;
FADD R3, R3, -R14 ?WAIT4_END_GROUP;
FFMA R0, R3, R15, R8 ?WAIT4_END_GROUP;
FCHK P0, R0, R9 &wr=0x1 ?trans1;
FFMA R133, R2, -R9, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R133, R2, R133, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R133, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R9, R0 ?WAIT4_END_GROUP;
FFMA R3, R133, R3, R2 ?trans1;
@!P0 BRA 0x1d90 &req={1} ?trans6;
MOV R3, R9 ?trans1;
MOV R2, 0x1d80 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1f70 ?trans5;
MOV R3, R133 ?WAIT7_END_GROUP;
MUFU.RCP R2, R5 &wr=0x0 ?trans1;
FADD R3, R3, -R10 ?WAIT4_END_GROUP;
FFMA R0, R3, R11, R4 ?WAIT4_END_GROUP;
FCHK P0, R0, R5 &wr=0x1 ?trans1;
FFMA R133, R2, -R5, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R133, R2, R133, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R133, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R5, R0 ?WAIT4_END_GROUP;
FFMA R3, R133, R3, R2 ?trans1;
@!P0 BRA 0x1e70 &req={1} ?trans6;
MOV R3, R5 ?trans1;
MOV R2, 0x1e60 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1f70 ?trans5;
MOV R3, R133 ?WAIT7_END_GROUP;
FADD R0, R3, -R6 ?WAIT4_END_GROUP;
FMUL R3, R0, R7 ?trans1;
@P2 BRA 0x260 ?trans6;
S2R R5, SR_TID.X &wr=0x0 ?trans1;
S2UR UR4, SR_CTAID.X &wr=0x0 ?trans8;
LDC R0, c[0x0][0x360] &wr=0x0 ?trans8;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
IMAD R0, R0, UR4, R5 &req={0} ?trans1;
UMOV UR4, 0x400 ?WAIT4_END_GROUP;
SHF.L.U32 R0, R0, 0x2, RZ ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?WAIT3_END_GROUP;
LOP3.LUT R0, R0, 0x1fc, RZ, 0xc0, !PT ?WAIT6_END_GROUP;
LDS R2, [R0+UR4] &wr=0x0 ?trans2;
FADD R3, R3, R2 &req={0} ?WAIT5_END_GROUP;
STS [R0+UR4], R3 ?trans1;
EXIT ?trans5;
SHF.R.U32.HI R133, RZ, 0x17, R3 ?trans2;
SHF.R.U32.HI R132, RZ, 0x17, R0 ?trans2;
LOP3.LUT R138, R133, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R136, R132, 0xff, RZ, 0xc0, !PT ?trans2;
IADD3 R134, PT, PT, R138, -0x1, RZ ?trans2;
IADD3 R133, PT, PT, R136, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R134, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R133, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R132, RZ ?trans1;
@!P0 BRA 0x2180 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0x2560 ?trans5;
LOP3.LUT P0, RZ, R3, 0x7fffffff, R0, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x2540 ?trans5;
FSETP.NEU.FTZ.AND P3, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P1 BRA !P3, 0x2540 ?trans5;
LOP3.LUT P3, RZ, R0, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P1, P3, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0x2520 ?trans5;
LOP3.LUT P1, RZ, R3, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x24f0 ?trans5;
ISETP.GE.AND P0, PT, R133, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R134, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R132, RZ ?trans1;
@!P0 MOV R132, 0xffffffc0 ?trans1;
@!P0 FFMA R0, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R3, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R132, PT, PT, R132, 0x40, RZ ?WAIT7_END_GROUP;
LEA R134, R138, 0xc0800000, 0x17 ?WAIT4_END_GROUP;
IADD3 R134, PT, PT, -R134, R3, RZ ?trans2;
IADD3 R3, PT, PT, R136, -0x7f, RZ ?trans2;
MUFU.RCP R133, R134 &wr=0x0 ?trans1;
FADD.FTZ R135, -R134, -RZ ?trans2;
IMAD R0, R3.reuse, -0x800000, R0 ?trans1;
IADD3 R3, PT, PT, R3, 0x7f, -R138 ?WAIT4_END_GROUP;
IADD3 R3, PT, PT, R3, R132, RZ ?trans1;
FFMA R136, R133, R135, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R140, R133, R136, R133 ?WAIT4_END_GROUP;
FFMA R133, R0, R140, RZ ?WAIT4_END_GROUP;
FFMA R136, R135, R133, R0 ?WAIT4_END_GROUP;
FFMA R137, R140, R136, R133 ?WAIT4_END_GROUP;
FFMA R136, R135, R137, R0 ?WAIT4_END_GROUP;
FFMA R133, R140, R136, R137 ?WAIT5_END_GROUP;
SHF.R.U32.HI R0, RZ, 0x17, R133 ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R134, PT, PT, R0, R3, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R134, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x24d0 ?trans5;
ISETP.GT.AND P0, PT, R134, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x24a0 ?trans5;
ISETP.GE.AND P0, PT, R134, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x2570 ?trans5;
ISETP.GE.AND P0, PT, R134, -0x18, PT ?trans1;
LOP3.LUT R133, R133, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x2570 ?trans5;
FFMA.RZ R0, R140, R136.reuse, R137.reuse ?trans1;
IADD3 R135, PT, PT, R134, 0x20, RZ ?trans1;
FFMA.RM R3, R140, R136.reuse, R137.reuse ?trans1;
ISETP.NE.AND P1, PT, R134.reuse, RZ, PT ?trans1;
ISETP.NE.AND P3, PT, R134, RZ, PT ?trans1;
LOP3.LUT R0, R0, 0x7fffff, RZ, 0xc0, !PT ?trans2;
IADD3 R134, PT, PT, -R134, RZ, RZ ?trans2;
LOP3.LUT R132, R0, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R0, R140, R136, R137 ?WAIT3_END_GROUP;
SHF.L.U32 R135, R132, R135, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R0, R3, PT ?trans1;
SEL R3, R134, RZ, P3 ?trans2;
ISETP.NE.AND P1, PT, R135, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R3, RZ, R3, R132 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R135, RZ, 0x1, R3 ?WAIT3_END_GROUP;
SEL R0, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R0, R0, 0x1, R135, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, R3, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R135, R0, RZ ?WAIT4_END_GROUP;
LOP3.LUT R133, R0, R133, RZ, 0xfc, !PT ?trans1;
BRA 0x2570 ?trans6;
LOP3.LUT R133, R133, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R133, R133, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x2570 ?trans6;
LEA R133, R3, R133, 0x17 ?trans1;
BRA 0x2570 ?trans6;
LOP3.LUT R0, R3, 0x80000000, R0, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R133, R0, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x2570 ?trans6;
LOP3.LUT R133, R3, 0x80000000, R0, 0x48, !PT ?trans1;
BRA 0x2570 ?trans6;
MUFU.RSQ R133, -QNAN &wr=0x0 ?trans1;
BRA 0x2570 ?trans5;
FADD.FTZ R133, R0, R3 ?WAIT7_END_GROUP;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R2 0x0 &req={0} ?trans5;
BRA 0x2590;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: kernel(unsigned long, float*, LargeArg, int)
_Z6kernelmPf8LargeArgi:
v_mov_b32_e32 v1, 0x449a4000
s_mov_b64 s[2:3], 0
.LBB0_1:
s_mov_b64 s[4:5], -4
s_mov_b32 s6, 0
.LBB0_2:
s_delay_alu instid0(SALU_CYCLE_1)
v_mov_b32_e32 v2, s6
s_add_u32 s4, s4, 4
s_addc_u32 s5, s5, 0
s_add_i32 s6, s6, 16
v_cmp_lt_u64_e64 s7, 0x7b, s[4:5]
ds_load_b128 v[2:5], v2
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v1, v1, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_div_scale_f32 v2, null, v3, v3, v1
v_div_scale_f32 v8, vcc_lo, v1, v3, v1
v_rcp_f32_e32 v6, v2
s_waitcnt_depctr 0xfff
v_fma_f32 v7, -v2, v6, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v6, v7, v6
v_mul_f32_e32 v7, v8, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v9, -v2, v7, v8
v_fmac_f32_e32 v7, v9, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v2, -v2, v7, v8
v_div_fmas_f32 v2, v2, v6, v7
s_and_b32 vcc_lo, exec_lo, s7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fixup_f32 v1, v2, v3, v1
v_sub_f32_e32 v1, v1, v4
s_delay_alu instid0(VALU_DEP_1)
v_mul_f32_e32 v1, v1, v5
s_cbranch_vccz .LBB0_2
s_add_u32 s2, s2, 1
s_addc_u32 s3, s3, 0
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u64 s[2:3], 0x2800
s_cbranch_scc0 .LBB0_1
s_load_b32 s0, s[0:1], 0x224
s_waitcnt lgkmcnt(0)
v_mad_u64_u32 v[2:3], null, s15, s0, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_and_b32_e32 v0, 0x7f, v2
v_lshlrev_b32_e32 v0, 2, v0
ds_load_b32 v2, v0
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v1, v1, v2
ds_store_b32 v0, v1
s_endpgm
| kernel | 12,881 | 950 | stackv2-00000-of-00015 |
// Demangled: sumMatrix1D1D(float*, float*, float*, int, int)
Function : _Z13sumMatrix1D1DPfS_S_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R0, c[0x0][0x398] &wr=0x1 ?trans2;
ISETP.LE.AND P0, PT, R0, UR4, PT &req={1} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
S2R R14, SR_TID.X &wr=0x0 ?trans1;
LDCU UR5, c[0x0][0x360] &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x2 ?trans1;
LDCU UR6, c[0x0][0x370] &wr=0x3 ?trans2;
LDC R17, c[0x0][0x39c] &wr=0x4 ?trans1;
BSSY.RECONVERGENT B0, 0x1e0 ?trans7;
LDC R16, c[0x0][0x398] &wr=0x3 ?trans1;
ISETP.GE.AND P0, PT, R14, R17, PT &req={4,0} ?WAIT13_END_GROUP;
@P0 BRA 0x1d0 &req={3} ?trans5;
LDC.64 R12, c[0x0][0x390] &wr=0x0 ?trans1;
MOV R0, R14 ?WAIT7_END_GROUP;
LDC.64 R8, c[0x0][0x380] &wr=0x3 ?trans8;
LDC.64 R10, c[0x0][0x388] &wr=0x4 ?trans2;
IMAD R7, R17, UR4, R0 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R7, 0x4, R8 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R7.reuse, 0x4, R10 &req={4} ?trans2;
LDG.E R2, desc[UR8][R2.64] &req={2} &wr=0x2 ?trans4;
LDG.E R5, desc[UR8][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE R6, R7, 0x4, R12 &req={0} ?trans1;
IADD3 R0, PT, PT, R0, UR5, RZ &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, R17, PT ?trans1;
FADD R15, R2, R5 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR8][R6.64], R15 &rd=0x0 ?trans7;
@!P0 BRA 0x120 ?trans5;
BSYNC.RECONVERGENT B0 &req={2,1} ?trans5;
UIADD3 UR4, UPT, UPT, UR6, UR4, URZ ?WAIT6_END_GROUP;
ISETP.LE.AND P0, PT, R16, UR4, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x90 ?trans5;
EXIT ?trans5;
BRA 0x220;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: sumMatrix1D1D(float*, float*, float*, int, int)
_Z13sumMatrix1D1DPfS_S_ii:
s_load_b64 s[2:3], s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_cmp_ge_i32 s15, s2
s_cbranch_scc1 .LBB1_6
s_clause 0x2
s_load_b32 s12, s[0:1], 0x20
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[8:9], s[0:1], 0x10
v_cmp_gt_i32_e32 vcc_lo, s3, v0
s_add_u32 s10, s0, 32
s_addc_u32 s11, s1, 0
s_mul_i32 s13, s15, s3
s_waitcnt lgkmcnt(0)
s_mul_i32 s14, s12, s3
.LBB1_2:
s_and_saveexec_b32 s16, vcc_lo
s_cbranch_execz .LBB1_5
s_load_b32 s0, s[10:11], 0xc
v_mov_b32_e32 v1, v0
s_mov_b32 s18, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s17, s0, 0xffff
.LBB1_4:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v2, s13, v1
v_add_nc_u32_e32 v1, s17, v1
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[2:3]
v_add_co_u32 v4, s0, s4, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e64 v5, s0, s5, v3, s0
v_add_co_u32 v6, s0, s6, v2
v_add_co_ci_u32_e64 v7, s0, s7, v3, s0
v_cmp_le_i32_e64 s0, s3, v1
global_load_b32 v4, v[4:5], off
global_load_b32 v5, v[6:7], off
v_add_co_u32 v2, s1, s8, v2
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v3, s1, s9, v3, s1
s_or_b32 s18, s0, s18
s_waitcnt vmcnt(0)
v_add_f32_e32 v4, v4, v5
global_store_b32 v[2:3], v4, off
s_and_not1_b32 exec_lo, exec_lo, s18
s_cbranch_execnz .LBB1_4
.LBB1_5:
s_or_b32 exec_lo, exec_lo, s16
s_add_i32 s15, s12, s15
s_add_i32 s13, s13, s14
s_cmp_lt_i32 s15, s2
s_cbranch_scc1 .LBB1_2
.LBB1_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| sumMatrix1D1D | 910 | 932 | stackv2-00000-of-00015 |
// Demangled: sumMatrix2D2D(float*, float*, float*, int, int)
Function : _Z13sumMatrix2D2DPfS_S_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R7, SR_TID.X &wr=0x0 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x0 ?trans1;
LDCU UR8, c[0x0][0x39c] &wr=0x1 ?trans1;
S2R R9, SR_TID.Y &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x3 ?trans5;
LDC R0, c[0x0][0x360] &wr=0x0 ?trans8;
S2UR UR7, SR_CTAID.Y &wr=0x2 ?trans8;
LDC R6, c[0x0][0x364] &wr=0x2 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x4 ?trans1;
IMAD R0, R0, UR6, R7 &req={0} ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
IMAD R7, R6, UR7, R9 &req={2} ?WAIT4_END_GROUP;
IMAD R9, R7, UR8, R0 &req={1} ?WAIT3_END_GROUP;
LDC.64 R6, c[0x0][0x390] &wr=0x1 ?trans1;
IMAD.WIDE R2, R9, 0x4, R2 &req={4} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={3} &wr=0x2 ?trans1;
IMAD.WIDE R4, R9, 0x4, R4 &req={0} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE R6, R9, 0x4, R6 &req={1} ?WAIT4_END_GROUP;
FADD R9, R2, R5 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x170;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: sumMatrix2D2D(float*, float*, float*, int, int)
_Z13sumMatrix2D2DPfS_S_ii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x1c
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s4, s2, 16
s_and_b32 s2, s2, 0xffff
v_mad_u64_u32 v[2:3], null, s15, s4, v[1:2]
s_load_b128 s[4:7], s[0:1], 0x0
s_mul_i32 s14, s14, s2
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v1, v2, s3
v_add3_u32 v0, s14, v0, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| sumMatrix2D2D | 633 | 657 | stackv2-00000-of-00015 |
// Demangled: vectorSumWithinBlock(int*, int, int*)
Function : _Z20vectorSumWithinBlockPiiS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R7, SR_TID.X &wr=0x1 ?trans7;
LDC R0, c[0x0][0x388] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
ISETP.GE.AND P0, PT, R7, R0, PT &req={1} ?WAIT13_END_GROUP;
@!P0 LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans2;
@!P0 IMAD.WIDE.U32 R2, R7, 0x4, R2 &req={1} ?WAIT6_END_GROUP;
@!P0 LDG.E R3, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
ISETP.GE.AND P1, PT, R0, 0x2, PT ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?WAIT6_END_GROUP;
LEA R0, R7, UR4, 0x2 ?WAIT5_END_GROUP;
@!P0 STS [R0], R3 &req={2} &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P1 BRA 0x1f0 &req={0} ?trans5;
HFMA2 R3, -RZ, RZ, 0, 5.9604644775390625e-08 &req={1} ?trans1;
LDCU UR4, c[0x0][0x388] &wr=0x0 ?trans1;
NOP ?WAIT5_END_GROUP;
IADD3 R2, PT, PT, R7, R3, RZ ?WAIT5_END_GROUP;
VIMNMX.S32 R2, R2, R7, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R2, UR4, PT &req={0} ?WAIT13_END_GROUP;
@!P0 IMAD R2, R3.reuse, 0x4, R0 ?trans1;
@!P0 LDS R5, [R0] ?trans1;
IADD3 R3, PT, PT, R3, R3, RZ ?WAIT4_END_GROUP;
@!P0 LDS R2, [R2] &wr=0x0 ?trans2;
@!P0 IADD3 R5, PT, PT, R2, R5, RZ &req={0} ?WAIT5_END_GROUP;
@!P0 STS [R0], R5 &rd=0x2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.AND P0, PT, R3, UR4, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x130 &req={2} ?trans5;
S2UR UR5, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR4, 0x400 ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x390] &req={1} &wr=0x1 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={0} ?WAIT9_END_GROUP;
LDS R5, [UR4] &wr=0x1 ?trans4;
STG.E desc[UR6][R2.64], R5 &req={1} ?trans1;
EXIT ?trans5;
BRA 0x260;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: vectorSumWithinBlock(int*, int, int*)
_Z20vectorSumWithinBlockPiiS_:
s_load_b32 s3, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, s3, v0
s_and_saveexec_b32 s2, vcc_lo
s_cbranch_execz .LBB0_2
s_load_b64 s[4:5], s[0:1], 0x0
v_lshlrev_b32_e32 v1, 2, v0
s_waitcnt lgkmcnt(0)
global_load_b32 v2, v1, s[4:5]
v_add_nc_u32_e32 v1, 0, v1
s_waitcnt vmcnt(0)
ds_store_b32 v1, v2
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s2
s_cmp_lt_i32 s3, 2
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_8
v_lshl_add_u32 v1, v0, 2, 0
s_mov_b32 s4, 1
.LBB0_4:
s_and_saveexec_b32 s5, vcc_lo
s_cbranch_execz .LBB0_7
v_add_nc_u32_e32 v2, s4, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_gt_i32_e64 s2, s3, v2
s_and_b32 exec_lo, exec_lo, s2
s_cbranch_execz .LBB0_7
v_lshl_add_u32 v2, s4, 2, v1
ds_load_b32 v2, v2
ds_load_b32 v3, v1
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
ds_store_b32 v1, v2
.LBB0_7:
s_or_b32 exec_lo, exec_lo, s5
s_lshl_b32 s4, s4, 1
s_waitcnt lgkmcnt(0)
s_cmp_ge_i32 s4, s3
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB0_4
.LBB0_8:
v_mov_b32_e32 v0, 0
s_load_b64 s[0:1], s[0:1], 0x10
ds_load_b32 v1, v0
s_waitcnt lgkmcnt(0)
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| vectorSumWithinBlock | 988 | 680 | stackv2-00000-of-00015 |
// Demangled: vectorSumWithinBlock2(int*, int, int*)
Function : _Z21vectorSumWithinBlock2PiiS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R7, SR_TID.X &wr=0x0 ?trans7;
LDC R9, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans1;
ISETP.GE.AND P0, PT, R7, R9, PT &req={0} ?WAIT13_END_GROUP;
@!P0 LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans2;
@!P0 IMAD.WIDE.U32 R2, R7, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
@!P0 LDG.E R3, desc[UR6][R2.64] &req={1} &rd=0x0 &wr=0x2 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
IADD3 R0, PT, PT, R7, 0x80, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R0, R9, PT ?trans1;
IADD3 R2, PT, PT, R7, 0x40, RZ &req={0} ?WAIT4_END_GROUP;
ISETP.GT.U32.OR P1, PT, R7, 0x7f, P1 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?WAIT6_END_GROUP;
LEA R0, R7, UR4, 0x2 ?WAIT5_END_GROUP;
@!P0 STS [R0], R3 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.AND P0, PT, R2, R9, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R7.reuse, 0x3f, P0 ?trans1;
@!P1 LDS R4, [R0+0x200] ?trans4;
@!P1 LDS R5, [R0] &wr=0x0 ?trans2;
@!P1 IADD3 R5, PT, PT, R4, R5, RZ &req={0} ?trans2;
IADD3 R4, PT, PT, R7, 0x20, RZ ?WAIT3_END_GROUP;
@!P1 STS [R0], R5 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.AND P1, PT, R4, R9, PT ?trans1;
IADD3 R4, PT, PT, R7, 0x10, RZ ?WAIT4_END_GROUP;
ISETP.GT.U32.OR P1, PT, R7, 0x1f, P1 ?trans1;
@!P0 LDS R2, [R0+0x100] ?trans4;
@!P0 LDS R3, [R0] &wr=0x0 ?trans2;
@!P0 IADD3 R3, PT, PT, R2, R3, RZ &req={0} ?WAIT5_END_GROUP;
@!P0 STS [R0], R3 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.AND P0, PT, R4, R9, PT ?trans1;
IADD3 R4, PT, PT, R7, 0x8, RZ ?WAIT4_END_GROUP;
ISETP.GT.U32.OR P0, PT, R7, 0xf, P0 ?trans1;
@!P1 LDS R2, [R0+0x80] ?trans4;
@!P1 LDS R5, [R0] &wr=0x0 ?trans2;
@!P1 IADD3 R5, PT, PT, R2, R5, RZ &req={0} ?WAIT5_END_GROUP;
@!P1 STS [R0], R5 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.AND P1, PT, R4, R9, PT ?trans1;
IADD3 R4, PT, PT, R7, 0x4, RZ ?WAIT4_END_GROUP;
ISETP.GT.U32.OR P1, PT, R7, 0x7, P1 ?trans1;
@!P0 LDS R2, [R0+0x40] ?trans4;
@!P0 LDS R3, [R0] &wr=0x0 ?trans2;
@!P0 IADD3 R3, PT, PT, R2, R3, RZ &req={0} ?WAIT5_END_GROUP;
@!P0 STS [R0], R3 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.AND P0, PT, R4, R9, PT ?trans1;
IADD3 R4, PT, PT, R7, 0x2, RZ ?WAIT4_END_GROUP;
ISETP.GT.U32.OR P0, PT, R7, 0x3, P0 ?trans1;
@!P1 LDS R2, [R0+0x20] ?trans4;
@!P1 LDS R5, [R0] &wr=0x0 ?trans2;
@!P1 IADD3 R5, PT, PT, R2, R5, RZ &req={0} ?WAIT5_END_GROUP;
@!P1 STS [R0], R5 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.AND P1, PT, R4, R9, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P1, PT, R7, 0x1, P1 ?trans1;
@!P0 LDS R2, [R0+0x10] ?trans4;
@!P0 LDS R3, [R0] &wr=0x0 ?trans2;
@!P0 IADD3 R3, PT, PT, R2, R3, RZ &req={0} ?WAIT5_END_GROUP;
@!P0 STS [R0], R3 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.AND P0, PT, R9, 0x2, PT ?WAIT5_END_GROUP;
ISETP.NE.OR P0, PT, R7, RZ, !P0 ?trans1;
@!P1 LDS R2, [R0+0x8] ?trans4;
@!P1 LDS R5, [R0] &wr=0x0 ?trans2;
@!P1 IADD3 R5, PT, PT, R2, R5, RZ &req={0} ?trans2;
LDC.64 R2, c[0x0][0x390] &wr=0x0 ?trans3;
@!P1 STS [R0], R5 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P0 LDS.64 R6, [UR4] &wr=0x1 ?trans2;
@!P0 IADD3 R6, PT, PT, R6, R7, RZ &req={1} ?WAIT5_END_GROUP;
@!P0 STS [UR4], R6 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R7, [UR4] &wr=0x0 ?trans4;
STG.E desc[UR6][R2.64], R7 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x500;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: vectorSumWithinBlock2(int*, int, int*)
_Z21vectorSumWithinBlock2PiiS_:
s_load_b32 s3, s[0:1], 0x8
s_mov_b32 s2, exec_lo
s_waitcnt lgkmcnt(0)
v_cmpx_gt_i32_e64 s3, v0
s_cbranch_execz .LBB1_2
s_load_b64 s[4:5], s[0:1], 0x0
v_lshlrev_b32_e32 v1, 2, v0
s_waitcnt lgkmcnt(0)
global_load_b32 v2, v1, s[4:5]
v_add_nc_u32_e32 v1, 0, v1
s_waitcnt vmcnt(0)
ds_store_b32 v1, v2
.LBB1_2:
s_or_b32 exec_lo, exec_lo, s2
v_or_b32_e32 v2, 0x80, v0
v_cmp_gt_u32_e32 vcc_lo, 0x80, v0
v_lshl_add_u32 v1, v0, 2, 0
s_waitcnt lgkmcnt(0)
s_barrier
v_cmp_gt_i32_e64 s2, s3, v2
buffer_gl0_inv
s_and_b32 s4, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s2, s4
s_cbranch_execz .LBB1_4
v_lshl_add_u32 v2, v2, 2, 0
ds_load_b32 v2, v2
ds_load_b32 v3, v1
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
ds_store_b32 v1, v2
.LBB1_4:
s_or_b32 exec_lo, exec_lo, s2
v_or_b32_e32 v2, 64, v0
v_cmp_gt_u32_e32 vcc_lo, 64, v0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmp_gt_i32_e64 s2, s3, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s4, vcc_lo, s2
s_and_saveexec_b32 s2, s4
s_cbranch_execz .LBB1_6
v_lshl_add_u32 v2, v2, 2, 0
ds_load_b32 v2, v2
ds_load_b32 v3, v1
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
ds_store_b32 v1, v2
.LBB1_6:
s_or_b32 exec_lo, exec_lo, s2
v_or_b32_e32 v2, 32, v0
v_cmp_gt_u32_e32 vcc_lo, 32, v0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmp_gt_i32_e64 s2, s3, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s4, vcc_lo, s2
s_and_saveexec_b32 s2, s4
s_cbranch_execz .LBB1_8
v_lshl_add_u32 v2, v2, 2, 0
ds_load_b32 v2, v2
ds_load_b32 v3, v1
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
ds_store_b32 v1, v2
.LBB1_8:
s_or_b32 exec_lo, exec_lo, s2
v_or_b32_e32 v2, 16, v0
v_cmp_gt_u32_e32 vcc_lo, 16, v0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmp_gt_i32_e64 s2, s3, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s4, vcc_lo, s2
s_and_saveexec_b32 s2, s4
s_cbranch_execz .LBB1_10
v_lshl_add_u32 v2, v2, 2, 0
ds_load_b32 v2, v2
ds_load_b32 v3, v1
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
ds_store_b32 v1, v2
.LBB1_10:
s_or_b32 exec_lo, exec_lo, s2
v_or_b32_e32 v2, 8, v0
v_cmp_gt_u32_e32 vcc_lo, 8, v0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmp_gt_i32_e64 s2, s3, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s4, vcc_lo, s2
s_and_saveexec_b32 s2, s4
s_cbranch_execz .LBB1_12
v_lshl_add_u32 v2, v2, 2, 0
ds_load_b32 v2, v2
ds_load_b32 v3, v1
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
ds_store_b32 v1, v2
.LBB1_12:
s_or_b32 exec_lo, exec_lo, s2
v_or_b32_e32 v2, 4, v0
v_cmp_gt_u32_e32 vcc_lo, 4, v0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmp_gt_i32_e64 s2, s3, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s4, vcc_lo, s2
s_and_saveexec_b32 s2, s4
s_cbranch_execz .LBB1_14
v_lshl_add_u32 v2, v2, 2, 0
ds_load_b32 v2, v2
ds_load_b32 v3, v1
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
ds_store_b32 v1, v2
.LBB1_14:
s_or_b32 exec_lo, exec_lo, s2
v_or_b32_e32 v2, 2, v0
v_cmp_gt_u32_e32 vcc_lo, 2, v0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmp_gt_i32_e64 s2, s3, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s4, vcc_lo, s2
s_and_saveexec_b32 s2, s4
s_cbranch_execz .LBB1_16
v_lshl_add_u32 v2, v2, 2, 0
ds_load_b32 v2, v2
ds_load_b32 v3, v1
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
ds_store_b32 v1, v2
.LBB1_16:
s_or_b32 exec_lo, exec_lo, s2
v_cmp_eq_u32_e32 vcc_lo, 0, v0
s_cmp_gt_i32 s3, 1
s_waitcnt lgkmcnt(0)
s_cselect_b32 s2, -1, 0
s_barrier
s_and_b32 s3, vcc_lo, s2
buffer_gl0_inv
s_and_saveexec_b32 s2, s3
s_cbranch_execz .LBB1_18
v_mov_b32_e32 v2, 0
ds_load_2addr_b32 v[0:1], v2 offset1:1
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v0, v0, v1
ds_store_b32 v2, v0
.LBB1_18:
s_or_b32 exec_lo, exec_lo, s2
v_mov_b32_e32 v0, 0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
ds_load_b32 v1, v0
s_waitcnt lgkmcnt(0)
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| vectorSumWithinBlock2 | 1,943 | 2,260 | stackv2-00000-of-00015 |
// Demangled: vectorSumWithinBlock3(int*, int, int*)
Function : _Z21vectorSumWithinBlock3PiiS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R7, SR_TID.X &wr=0x1 ?trans1;
LDCU UR8, c[0x0][0x388] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
ISETP.GE.AND P1, PT, R7, UR8, PT &req={1} ?WAIT13_END_GROUP;
@!P1 LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans2;
@!P1 IMAD.WIDE.U32 R2, R7, 0x4, R2 &req={1} ?WAIT6_END_GROUP;
@!P1 LDG.E R3, desc[UR6][R2.64] &req={2} &rd=0x1 &wr=0x2 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x3 ?trans1;
UMOV UR4, 0x400 ?trans1;
IADD3 R0, PT, PT, R7.reuse, 0x80, RZ ?trans1;
BSSY.RECONVERGENT B0, 0x2f0 ?trans4;
ISETP.GE.AND P0, PT, R0, UR8, PT ?trans1;
IADD3 R2, PT, PT, R7, 0x40, RZ &req={1} ?WAIT4_END_GROUP;
ISETP.GT.U32.OR P0, PT, R7, 0x7f, P0 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={3} ?WAIT6_END_GROUP;
LEA R0, R7, UR4, 0x2 ?WAIT5_END_GROUP;
@!P1 STS [R0], R3 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.AND P1, PT, R2, UR8, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P1, PT, R7.reuse, 0x3f, P1 ?trans1;
@!P0 LDS R4, [R0+0x200] ?trans4;
@!P0 LDS R5, [R0] &wr=0x1 ?trans2;
@!P0 IADD3 R5, PT, PT, R4, R5, RZ &req={1} ?trans2;
IADD3 R4, PT, PT, R7, 0x20, RZ ?WAIT3_END_GROUP;
@!P0 STS [R0], R5 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.AND P0, PT, R4, UR8, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R7, 0x1f, P0 ?trans1;
@!P1 LDS R2, [R0+0x100] ?trans4;
@!P1 LDS R3, [R0] &wr=0x1 ?trans2;
@!P1 IADD3 R3, PT, PT, R2, R3, RZ &req={1} ?WAIT5_END_GROUP;
@!P1 STS [R0], R3 &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 BRA 0x2e0 &req={0} ?trans5;
LDS R2, [R0+0x80] ?trans4;
LDS R3, [R0] &req={1} ?trans4;
LDS R4, [R0+0x40] &wr=0x0 ?trans4;
LDS R5, [R0+0x20] ?trans4;
LDS R6, [R0+0x10] &wr=0x1 ?trans4;
LDS R7, [R0+0x8] ?trans4;
LDS R8, [R0+0x4] &wr=0x2 ?trans1;
IADD3 R2, PT, PT, R4, R3, R2 &req={0} ?WAIT4_END_GROUP;
IADD3 R2, PT, PT, R6, R5, R2 &req={1} ?WAIT4_END_GROUP;
IADD3 R7, PT, PT, R8, R7, R2 &req={2} ?WAIT5_END_GROUP;
STS [R0], R7 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans8;
LDC.64 R2, c[0x0][0x390] &req={1} &wr=0x1 ?trans1;
LDS R5, [UR4] &wr=0x1 ?trans4;
STG.E desc[UR6][R2.64], R5 &req={1} ?trans1;
EXIT ?trans5;
BRA 0x340;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: vectorSumWithinBlock3(int*, int, int*)
_Z21vectorSumWithinBlock3PiiS_:
s_load_b32 s3, s[0:1], 0x8
s_mov_b32 s2, exec_lo
s_waitcnt lgkmcnt(0)
v_cmpx_gt_i32_e64 s3, v0
s_cbranch_execz .LBB2_2
s_load_b64 s[4:5], s[0:1], 0x0
v_lshlrev_b32_e32 v1, 2, v0
s_waitcnt lgkmcnt(0)
global_load_b32 v2, v1, s[4:5]
v_add_nc_u32_e32 v1, 0, v1
s_waitcnt vmcnt(0)
ds_store_b32 v1, v2
.LBB2_2:
s_or_b32 exec_lo, exec_lo, s2
v_or_b32_e32 v2, 0x80, v0
v_cmp_gt_u32_e32 vcc_lo, 0x80, v0
v_lshl_add_u32 v1, v0, 2, 0
s_waitcnt lgkmcnt(0)
s_barrier
v_cmp_gt_i32_e64 s2, s3, v2
buffer_gl0_inv
s_and_b32 s4, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s2, s4
s_cbranch_execz .LBB2_4
v_lshl_add_u32 v2, v2, 2, 0
ds_load_b32 v2, v2
ds_load_b32 v3, v1
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
ds_store_b32 v1, v2
.LBB2_4:
s_or_b32 exec_lo, exec_lo, s2
v_or_b32_e32 v2, 64, v0
v_cmp_gt_u32_e32 vcc_lo, 64, v0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmp_gt_i32_e64 s2, s3, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s4, vcc_lo, s2
s_and_saveexec_b32 s2, s4
s_cbranch_execz .LBB2_6
v_lshl_add_u32 v2, v2, 2, 0
ds_load_b32 v2, v2
ds_load_b32 v3, v1
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
ds_store_b32 v1, v2
.LBB2_6:
s_or_b32 exec_lo, exec_lo, s2
v_or_b32_e32 v2, 32, v0
v_cmp_gt_u32_e32 vcc_lo, 32, v0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmp_gt_i32_e64 s2, s3, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s3, vcc_lo, s2
s_and_saveexec_b32 s2, s3
s_cbranch_execz .LBB2_8
v_lshl_add_u32 v0, v2, 2, 0
ds_load_b32 v0, v0
ds_load_2addr_b32 v[2:3], v1 offset1:1
ds_load_2addr_b32 v[4:5], v1 offset0:8 offset1:16
ds_load_2addr_b32 v[6:7], v1 offset0:2 offset1:4
s_waitcnt lgkmcnt(1)
v_add3_u32 v0, v2, v0, v5
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add3_u32 v0, v4, v0, v7
v_add3_u32 v0, v6, v0, v3
ds_store_b32 v1, v0
.LBB2_8:
s_or_b32 exec_lo, exec_lo, s2
v_mov_b32_e32 v0, 0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
ds_load_b32 v1, v0
s_waitcnt lgkmcnt(0)
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| vectorSumWithinBlock3 | 1,297 | 1,210 | stackv2-00000-of-00015 |
// Demangled: cal_pi(double*, int, int, int)
Function : _Z6cal_piPdiii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x388] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R0, UR4, R3 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, UR6, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
LDCU UR7, c[0x0][0x390] &wr=0x2 ?trans6;
LDC.64 R8, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD.WIDE R4, R0, 0x8, R4 &req={0} ?WAIT5_END_GROUP;
LDG.E.64 R6, desc[UR4][R4.64] &req={1} &rd=0x0 &wr=0x5 ?trans1;
I2F.F64 R10, UR6 &wr=0x1 ?trans1;
BSSY.RECONVERGENT B0, 0x850 &req={2} ?trans1;
I2F.F64.U32 R2, R0 &rd=0x2 &wr=0x4 ?trans1;
BSSY.RECONVERGENT B1, 0x4c0 ?trans1;
IMAD R0, R9, UR7, R0 &req={3,2} ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P1, PT, R0, R8, PT ?WAIT15_END_GROUP;
NOP ?WAIT12_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R2, 0.5 &req={4} &rd=0x2 &wr=0x3 ?trans2;
MOV R2, 0x1 &req={2} ?trans1;
FSETP.GEU.AND P2, PT, |R17|, 6.5827683646048100446e-37, PT &req={3} ?trans1;
MUFU.RCP64H R3, R11 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, -R10, R2, 1 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R12, R12, R12 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R2, R12, R2 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, -R10, R12, 1 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R12, R2, R12 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R12, R16, R2 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, -R10, R12, R16 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R2, R14, R12 &req={1} &wr=0x1 ?trans2;
FFMA R12, RZ, R11, R3 &req={1} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R12|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA P2, 0x4b0 ?trans5;
MOV R14, R16 ?trans1;
MOV R15, R17 ?trans1;
MOV R12, R10 ?trans1;
MOV R13, R11 ?trans1;
MOV R18, 0x4b0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x870 &req={5,0} ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
DFMA R16, R2, R2, 1 &wr=0x1 ?trans1;
BSSY.RECONVERGENT B1, 0x820 ?trans1;
MUFU.RCP64H R3, R17 &req={1} &wr=0x1 ?trans1;
MOV R2, 0x1 ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, -R16, R2, 1 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R12, R12, R12 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R2, R12, R2 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, -R16, R12, 1 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R12, R2, R12 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R12, R2, 4 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, -R16, R12, 4 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R2, R14, R12 &req={1} &wr=0x1 ?trans2;
FFMA R12, RZ, R17, R3 &req={1} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R12|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA 0x810 ?trans5;
MOV R12, R16 ?trans1;
MOV R13, R17 ?trans1;
MOV R14, RZ ?trans1;
MOV R15, 0x40100000 ?trans1;
MOV R18, 0x810 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x870 &req={5,0} ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
DADD R6, R2, R6 &req={5} &rd=0x2 &wr=0x4 ?trans2;
@!P1 BRA 0x100 &req={4,2} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
STG.E.64 desc[UR4][R4.64], R6 ?trans1;
EXIT ?trans5;
FSETP.GEU.AND P3, PT, |R15|.reuse, 1.469367938527859385e-39, PT ?trans1;
LOP3.LUT R19, R15, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B2, 0x1060 ?trans1;
LOP3.LUT R22, R13.reuse, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
MOV R20, 0x1ca00000 ?trans1;
FSETP.GEU.AND P0, PT, |R13|.reuse, 1.469367938527859385e-39, PT ?trans1;
LOP3.LUT R2, R13, 0x800fffff, RZ, 0xc0, !PT ?trans2;
ISETP.GE.U32.AND P2, PT, R19, R22, PT ?trans1;
MOV R31, R19 ?trans1;
LOP3.LUT R3, R2, 0x3ff00000, RZ, 0xfc, !PT ?WAIT3_END_GROUP;
@!P3 LOP3.LUT R16, R13, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
SEL R17, R20.reuse, 0x63400000, !P2 ?trans1;
@!P3 MOV R28, RZ ?trans1;
MOV R2, R12 ?trans2;
@!P3 ISETP.GE.U32.AND P4, PT, R19, R16, PT ?trans1;
MOV R16, R14 ?trans1;
LOP3.LUT R17, R17, 0x800fffff, R15, 0xf8, !PT ?trans1;
MOV R30, R22 ?trans2;
@!P3 SEL R21, R20, 0x63400000, !P4 ?trans1;
@!P0 DMUL R2, R12, 8.98846567431157953865e+307 &wr=0x0 ?trans1;
MOV R24, 0x1 ?trans1;
MUFU.RCP64H R25, R3 &req={0} &wr=0x0 ?trans1;
@!P0 LOP3.LUT R30, R3, 0x7ff00000, RZ, 0xc0, !PT ?WAIT2_END_GROUP;
@!P3 LOP3.LUT R21, R21, 0x80000000, R15, 0xf8, !PT ?trans2;
IADD3 R22, PT, PT, R30, -0x1, RZ ?trans2;
@!P3 LOP3.LUT R29, R21, 0x100000, RZ, 0xfc, !PT ?WAIT15_END_GROUP;
NOP ?WAIT10_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P3 DFMA R16, R16, 2, -R28 &wr=0x1 ?trans2;
@!P3 LOP3.LUT R31, R17, 0x7ff00000, RZ, 0xc0, !PT &req={1} ?WAIT4_END_GROUP;
IADD3 R21, PT, PT, R31, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R21, 0x7feffffe, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R22, 0x7feffffe, P0 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R26, R24, -R2, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R26, R26, R26, R26 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R24, R24, R26, R24 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R26, R24, -R2, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R24, R24, R26, R24 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R28, R24, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R26, R28, -R2, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, R24, R26, R28 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0xf10 &req={1,0} ?trans5;
LOP3.LUT R24, R13, 0x7ff00000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R14, PT, PT, R19.reuse, -R24.reuse, RZ ?trans1;
ISETP.GE.U32.AND P0, PT, R19, R24, PT ?WAIT4_END_GROUP;
VIMNMX.S32 R14, R14, -0x46a00000, !PT ?trans1;
SEL R19, R20, 0x63400000, !P0 ?WAIT4_END_GROUP;
VIMNMX.S32 R14, R14, 0x46a00000, PT ?WAIT5_END_GROUP;
IADD3 R19, PT, PT, -R19, R14, RZ ?trans1;
MOV R14, RZ ?WAIT3_END_GROUP;
IADD3 R15, PT, PT, R19, 0x7fe00000, RZ ?WAIT6_END_GROUP;
DMUL R20, R22, R14 &wr=0x0 ?trans2;
FSETP.GTU.AND P0, PT, |R21|, 1.469367938527859385e-39, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x1050 ?trans5;
DFMA R2, R22, -R2, R16 &wr=0x0 ?trans1;
MOV R14, RZ ?trans1;
FSETP.NEU.AND P0, PT, R3.reuse, RZ, PT &req={0} ?trans1;
LOP3.LUT R13, R3, 0x80000000, R13, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R15, R13, R15, RZ, 0xfc, !PT ?WAIT8_END_GROUP;
@!P0 BRA 0x1050 ?trans5;
IADD3 R3, PT, PT, -R19, RZ, RZ ?trans1;
MOV R2, RZ ?trans1;
DMUL.RP R14, R22, R14 &wr=0x0 ?trans2;
LOP3.LUT R13, R15, R13, RZ, 0x3c, !PT &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R20, -R2, R22 &wr=0x0 ?trans2;
IADD3 R2, PT, PT, -R19, -0x43300000, RZ &req={0} ?WAIT5_END_GROUP;
FSETP.NEU.AND P0, PT, |R3|, R2, PT ?WAIT5_END_GROUP;
FSEL R20, R14, R20, !P0 ?trans1;
FSEL R21, R13, R21, !P0 ?trans1;
BRA 0x1050 ?trans6;
DSETP.NAN.AND P0, PT, R14, R14, PT &wr=0x0 ?trans2;
@P0 BRA 0x1030 &req={0} ?trans5;
DSETP.NAN.AND P0, PT, R12, R12, PT &wr=0x0 ?trans2;
@P0 BRA 0x1000 &req={0} ?trans5;
ISETP.NE.AND P0, PT, R31, R30, PT ?trans1;
MOV.64 R20, 0xfff8000000000000 ?WAIT12_END_GROUP;
@!P0 BRA 0x1050 ?trans5;
ISETP.NE.AND P0, PT, R31, 0x7ff00000, PT ?trans1;
LOP3.LUT R21, R15, 0x80000000, R13, 0x48, !PT ?WAIT4_END_GROUP;
ISETP.EQ.OR P0, PT, R30, RZ, !P0 ?WAIT13_END_GROUP;
@P0 LOP3.LUT R2, R21, 0x7ff00000, RZ, 0xfc, !PT ?trans1;
@!P0 MOV R20, RZ ?trans1;
@P0 MOV R20, RZ ?WAIT3_END_GROUP;
@P0 MOV R21, R2 ?trans1;
BRA 0x1050 ?trans6;
LOP3.LUT R21, R13, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R20, R12 ?trans1;
BRA 0x1050 ?trans6;
LOP3.LUT R21, R15, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R20, R14 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
HFMA2 R19, -RZ, RZ, 0, 0 ?trans1;
MOV R2, R20 ?trans1;
MOV R3, R21 ?trans2;
RET.REL.NODEC R18 0x0 ?trans5;
BRA 0x10a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: cal_pi(double*, int, int, int)
_Z6cal_piPdiii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_u32_e64 s4, v1
s_cbranch_execz .LBB0_4
s_load_b64 s[0:1], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
v_cvt_f64_i32_e32 v[6:7], s4
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 3, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s0, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
s_mul_i32 s1, s6, s5
s_mov_b32 s0, 0
global_load_b64 v[4:5], v[2:3], off
.LBB0_2:
v_cvt_f64_u32_e32 v[8:9], v1
v_add_nc_u32_e32 v1, s1, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[8:9], v[8:9], 0.5
v_div_scale_f64 v[10:11], null, v[6:7], v[6:7], v[8:9]
v_div_scale_f64 v[16:17], vcc_lo, v[8:9], v[6:7], v[8:9]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f64_e32 v[12:13], v[10:11]
s_waitcnt_depctr 0xfff
v_fma_f64 v[14:15], -v[10:11], v[12:13], 1.0
v_fma_f64 v[12:13], v[12:13], v[14:15], v[12:13]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[14:15], -v[10:11], v[12:13], 1.0
v_fma_f64 v[12:13], v[12:13], v[14:15], v[12:13]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[14:15], v[16:17], v[12:13]
v_fma_f64 v[10:11], -v[10:11], v[14:15], v[16:17]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fmas_f64 v[10:11], v[10:11], v[12:13], v[14:15]
v_div_fixup_f64 v[8:9], v[10:11], v[6:7], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[8:9], v[8:9], v[8:9], 1.0
v_div_scale_f64 v[10:11], null, v[8:9], v[8:9], 4.0
v_div_scale_f64 v[16:17], vcc_lo, 4.0, v[8:9], 4.0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f64_e32 v[12:13], v[10:11]
s_waitcnt_depctr 0xfff
v_fma_f64 v[14:15], -v[10:11], v[12:13], 1.0
v_fma_f64 v[12:13], v[12:13], v[14:15], v[12:13]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[14:15], -v[10:11], v[12:13], 1.0
v_fma_f64 v[12:13], v[12:13], v[14:15], v[12:13]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[14:15], v[16:17], v[12:13]
v_fma_f64 v[10:11], -v[10:11], v[14:15], v[16:17]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_div_fmas_f64 v[10:11], v[10:11], v[12:13], v[14:15]
v_cmp_le_u32_e32 vcc_lo, s4, v1
s_or_b32 s0, vcc_lo, s0
v_div_fixup_f64 v[8:9], v[10:11], v[8:9], 4.0
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_add_f64 v[4:5], v[8:9], v[4:5]
s_and_not1_b32 exec_lo, exec_lo, s0
s_cbranch_execnz .LBB0_2
s_or_b32 exec_lo, exec_lo, s0
global_store_b64 v[2:3], v[4:5], off
.LBB0_4:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| cal_pi | 5,247 | 1,807 | stackv2-00000-of-00015 |
// Demangled: mandelgpu(int, int, int*, int)
Function : _Z9mandelgpuiiPii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x380] &wr=0x1 ?trans1;
HFMA2 R2, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
I2F.F64 R4, UR4 &req={1} &wr=0x1 ?trans2;
MUFU.RCP64H R3, R5 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, -R4, R2, 1 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R6, R6, R6 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R2, R6, R2 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, -R4, R6, 1 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R6, R2, R6 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R6, R2, 3.5 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, -R4, R6, 3.5 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R2, R8, R6 &req={1} &wr=0x1 ?trans2;
FFMA R0, RZ, R5, R3 &req={1} ?trans1;
HFMA2 R7, -RZ, RZ, 2.0234375, 0 ?WAIT4_END_GROUP;
FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ?trans1;
MOV R0, RZ ?WAIT12_END_GROUP;
@P0 BRA 0x380 &req={0} ?trans5;
MOV R8, R4 ?trans1;
MOV R9, R5 ?trans1;
MOV R6, 0x360 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xbb0 ?trans5;
MOV R2, R16 ?trans1;
MOV R3, R17 ?WAIT7_END_GROUP;
LDCU UR4, c[0x0][0x384] &wr=0x0 ?trans1;
MOV R4, 0x1 ?trans1;
I2F.F64 R8, UR4 &req={0} &wr=0x0 ?trans2;
MUFU.RCP64H R5, R9 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, -R8, R4, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R10, R10, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R4, R10, R4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, -R8, R10, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R10, R4, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R4, 3.5 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, -R8, R10, 3.5 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R4, R12, R10 &req={0} &wr=0x0 ?trans2;
FFMA R6, RZ, R9, R5 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R6|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA 0x6b0 ?trans5;
MOV R6, 0x690 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xbb0 ?trans5;
MOV R4, R16 ?trans1;
MOV R5, R17 ?WAIT7_END_GROUP;
S2R R7, SR_TID.X &wr=0x0 ?trans1;
S2UR UR4, SR_CTAID.X &wr=0x0 ?trans1;
MOV R16, RZ ?WAIT7_END_GROUP;
LDC R0, c[0x0][0x360] &wr=0x0 ?trans8;
LDC R17, c[0x0][0x364] &wr=0x1 ?trans8;
LDC R19, c[0x0][0x390] &wr=0x2 ?trans1;
IMAD R0, R0, UR4, R7 &req={0} ?WAIT7_END_GROUP;
S2UR UR4, SR_CTAID.Y &wr=0x1 ?trans1;
I2F.F64 R6, R0 &wr=0x0 ?trans7;
LDC.64 R10, c[0x0][0x388] &wr=0x3 ?trans1;
ISETP.GE.AND P0, PT, R19, 0x1, PT &req={2} ?WAIT15_END_GROUP;
NOP ?WAIT11_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R6, R2, -2.25 &req={0} &rd=0x0 &wr=0x2 ?trans2;
S2R R2, SR_TID.Y &req={0} &wr=0x1 ?trans2;
IMAD R17, R17, UR4, R2 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U32 R2, R17 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R2, R4, -1.75 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@!P0 BRA 0xb30 &req={3,2,1,0} ?trans5;
MOV.64 R2, RZ ?trans2;
MOV.64 R4, RZ ?trans2;
MOV.64 R6, RZ ?trans2;
MOV.64 R8, RZ ?trans2;
BSSY.RECONVERGENT B0, 0xb30 ?trans1;
MOV R16, RZ ?WAIT7_END_GROUP;
IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
DADD R6, R6, R6 &wr=0x0 ?trans4;
ISETP.GE.AND P0, PT, R16, R19, PT ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R2, R4, -R2 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R6, R8, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, R12, R2 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R2, R6, R6 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R4, R8, R8 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R4, R2 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.LT.AND P1, PT, R20, 4, PT &req={0} &wr=0x0 ?trans2;
@!P0 BRA P1, 0x8c0 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU UR6, c[0x0][0x384] &wr=0x0 ?trans1;
ISETP.NE.AND P0, PT, R16.reuse, R19, PT ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans4;
SEL R5, R16, RZ, P0 ?trans1;
IMAD R3, R0, UR6, R17 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R3, 0x4, R10 ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R5 &req={1} ?trans1;
EXIT ?trans5;
FSETP.GEU.AND P0, PT, |R9|.reuse, 1.469367938527859385e-39, PT ?trans1;
LOP3.LUT R4, R9.reuse, 0x800fffff, RZ, 0xc0, !PT ?trans1;
HFMA2 R22, -RZ, RZ, 0.0045166015625, 0 ?trans1;
MOV R10, 0x1 ?trans1;
LOP3.LUT R20, R9, 0x7ff00000, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R5, R4, 0x3ff00000, RZ, 0xfc, !PT ?trans1;
MOV R4, R8 ?WAIT6_END_GROUP;
@!P0 DMUL R4, R8, 8.98846567431157953865e+307 &wr=0x0 ?trans2;
MUFU.RCP64H R11, R5 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, -R4, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R12, R12, R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, R10 &req={0} &rd=0x0 &wr=0x1 ?trans2;
MOV R11, R7 &req={0} ?trans1;
MOV R10, R0 ?WAIT4_END_GROUP;
LOP3.LUT R21, R11, 0x7ff00000, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P1, PT, R21, R20, PT ?trans1;
MOV R23, R21 ?WAIT15_END_GROUP;
NOP ?WAIT6_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, -R4, 1 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R14, R12 &req={0} &rd=0x0 &wr=0x1 ?trans2;
SEL R13, R22, 0x63400000, !P1 &req={0} ?trans1;
FSETP.GEU.AND P1, PT, |R11|, 1.469367938527859385e-39, PT ?trans1;
MOV R12, R10 ?WAIT3_END_GROUP;
LOP3.LUT R13, R13, 0x800fffff, R11, 0xf8, !PT ?WAIT9_END_GROUP;
@P1 BRA 0xee0 &req={1} ?trans5;
LOP3.LUT R16, R9, 0x7ff00000, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P1, PT, R21, R16, PT ?trans1;
MOV R16, RZ ?WAIT4_END_GROUP;
SEL R17, R22, 0x63400000, !P1 ?WAIT5_END_GROUP;
LOP3.LUT R17, R17, 0x80000000, R11, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R17, R17, 0x100000, RZ, 0xfc, !PT ?WAIT6_END_GROUP;
DFMA R12, R12, 2, -R16 &wr=0x0 ?trans2;
LOP3.LUT R23, R13, 0x7ff00000, RZ, 0xc0, !PT &req={0} ?WAIT7_END_GROUP;
@!P0 LOP3.LUT R20, R5, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
DMUL R16, R14, R12 &wr=0x0 ?trans1;
IADD3 R24, PT, PT, R23, -0x1, RZ ?trans2;
IADD3 R25, PT, PT, R20, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R24, 0x7feffffe, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R25, 0x7feffffe, P0 ?WAIT15_END_GROUP;
NOP ?WAIT8_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R16, -R4, R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R14, R18, R16 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0x11e0 &req={1,0} ?trans5;
LOP3.LUT R16, R9, 0x7ff00000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R10, PT, PT, R21.reuse, -R16.reuse, RZ ?trans1;
ISETP.GE.U32.AND P0, PT, R21, R16, PT ?WAIT4_END_GROUP;
VIMNMX.S32 R10, R10, -0x46a00000, !PT ?trans1;
SEL R11, R22, 0x63400000, !P0 ?WAIT4_END_GROUP;
VIMNMX.S32 R10, R10, 0x46a00000, PT ?WAIT5_END_GROUP;
IADD3 R18, PT, PT, -R11, R10, RZ ?trans1;
MOV R10, RZ ?WAIT3_END_GROUP;
IADD3 R11, PT, PT, R18, 0x7fe00000, RZ ?WAIT6_END_GROUP;
DMUL R16, R14, R10 &wr=0x0 ?trans2;
FSETP.GTU.AND P0, PT, |R17|, 1.469367938527859385e-39, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x1320 ?trans5;
DFMA R4, R14, -R4, R12 &wr=0x0 ?trans1;
MOV R10, RZ ?trans1;
FSETP.NEU.AND P0, PT, R5.reuse, RZ, PT &req={0} ?trans1;
LOP3.LUT R9, R5, 0x80000000, R9, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R11, R9, R11, RZ, 0xfc, !PT ?WAIT8_END_GROUP;
@!P0 BRA 0x1320 ?trans5;
IADD3 R5, PT, PT, -R18, RZ, RZ ?trans1;
MOV R4, RZ ?trans1;
DMUL.RP R10, R14, R10 &wr=0x0 ?trans2;
LOP3.LUT R9, R11, R9, RZ, 0x3c, !PT &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R16, -R4, R14 &wr=0x0 ?trans2;
IADD3 R4, PT, PT, -R18, -0x43300000, RZ &req={0} ?WAIT5_END_GROUP;
FSETP.NEU.AND P0, PT, |R5|, R4, PT ?WAIT5_END_GROUP;
FSEL R16, R10, R16, !P0 ?trans1;
FSEL R17, R9, R17, !P0 ?trans1;
BRA 0x1320 ?trans6;
DSETP.NAN.AND P0, PT, R10, R10, PT &wr=0x0 ?trans2;
@P0 BRA 0x1300 &req={0} ?trans5;
DSETP.NAN.AND P0, PT, R8, R8, PT &wr=0x0 ?trans2;
@P0 BRA 0x12d0 &req={0} ?trans5;
ISETP.NE.AND P0, PT, R23, R20, PT ?trans1;
MOV.64 R16, 0xfff8000000000000 ?WAIT12_END_GROUP;
@!P0 BRA 0x1320 ?trans5;
ISETP.NE.AND P0, PT, R23, 0x7ff00000, PT ?trans1;
LOP3.LUT R17, R11, 0x80000000, R9, 0x48, !PT ?WAIT4_END_GROUP;
ISETP.EQ.OR P0, PT, R20, RZ, !P0 ?WAIT13_END_GROUP;
@P0 LOP3.LUT R4, R17, 0x7ff00000, RZ, 0xfc, !PT ?trans1;
@!P0 MOV R16, RZ ?trans1;
@P0 MOV R16, RZ ?WAIT3_END_GROUP;
@P0 MOV R17, R4 ?trans1;
BRA 0x1320 ?trans6;
LOP3.LUT R17, R9, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R16, R8 ?trans1;
BRA 0x1320 ?trans6;
LOP3.LUT R17, R11, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R16, R10 ?WAIT7_END_GROUP;
MOV R4, R6 ?trans1;
MOV R5, 0x0 ?WAIT4_END_GROUP;
RET.REL.NODEC R4 0x0 ?trans5;
BRA 0x1350;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: mandelgpu(int, int, int*, int)
_Z9mandelgpuiiPii:
s_clause 0x2
s_load_b32 s5, s[0:1], 0x24
s_load_b32 s4, s[0:1], 0x10
s_load_b64 s[2:3], s[0:1], 0x0
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s6, s5, 16
s_and_b32 s5, s5, 0xffff
s_cmp_lt_i32 s4, 1
v_mad_u64_u32 v[0:1], null, s14, s5, v[2:3]
v_mad_u64_u32 v[1:2], null, s15, s6, v[3:4]
s_cbranch_scc1 .LBB0_4
v_cvt_f64_i32_e32 v[2:3], s2
v_cvt_f64_i32_e32 v[4:5], s3
s_mov_b32 s5, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_div_scale_f64 v[6:7], null, v[2:3], v[2:3], 0x400c0000
v_div_scale_f64 v[8:9], null, v[4:5], v[4:5], 0x400c0000
v_div_scale_f64 v[18:19], vcc_lo, 0x400c0000, v[2:3], 0x400c0000
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_rcp_f64_e32 v[10:11], v[6:7]
v_rcp_f64_e32 v[12:13], v[8:9]
s_waitcnt_depctr 0xfff
v_fma_f64 v[14:15], -v[6:7], v[10:11], 1.0
v_fma_f64 v[16:17], -v[8:9], v[12:13], 1.0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[10:11], v[10:11], v[14:15], v[10:11]
v_fma_f64 v[12:13], v[12:13], v[16:17], v[12:13]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[14:15], -v[6:7], v[10:11], 1.0
v_fma_f64 v[16:17], -v[8:9], v[12:13], 1.0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_fma_f64 v[10:11], v[10:11], v[14:15], v[10:11]
v_div_scale_f64 v[14:15], s2, 0x400c0000, v[4:5], 0x400c0000
v_fma_f64 v[12:13], v[12:13], v[16:17], v[12:13]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f64 v[16:17], v[18:19], v[10:11]
v_mul_f64 v[20:21], v[14:15], v[12:13]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[6:7], -v[6:7], v[16:17], v[18:19]
v_fma_f64 v[8:9], -v[8:9], v[20:21], v[14:15]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_div_fmas_f64 v[6:7], v[6:7], v[10:11], v[16:17]
s_mov_b32 vcc_lo, s2
v_cvt_f64_i32_e32 v[10:11], v0
v_div_fmas_f64 v[8:9], v[8:9], v[12:13], v[20:21]
s_mov_b32 s2, 0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_div_fixup_f64 v[2:3], v[6:7], v[2:3], 0x400c0000
v_cvt_f64_i32_e32 v[6:7], v1
v_div_fixup_f64 v[4:5], v[8:9], v[4:5], 0x400c0000
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[2:3], v[2:3], v[10:11], 0xc0020000
v_fma_f64 v[4:5], v[4:5], v[6:7], 0xbffc0000
v_mov_b32_e32 v6, 0
v_mov_b32_e32 v7, 0
s_delay_alu instid0(VALU_DEP_1)
v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
v_dual_mov_b32 v11, v7 :: v_dual_mov_b32 v10, v6
v_dual_mov_b32 v13, v7 :: v_dual_mov_b32 v12, v6
.LBB0_2:
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[8:9], v[8:9], v[8:9]
v_add_f64 v[10:11], v[12:13], -v[10:11]
s_add_i32 s5, s5, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
s_cmp_ge_i32 s5, s4
v_mov_b32_e32 v14, s5
s_cselect_b32 s6, -1, 0
v_fma_f64 v[8:9], v[8:9], v[6:7], v[4:5]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[6:7], v[2:3], v[10:11]
v_mul_f64 v[10:11], v[8:9], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[12:13], v[6:7], v[6:7], v[10:11]
v_cmp_ngt_f64_e32 vcc_lo, 4.0, v[12:13]
v_mul_f64 v[12:13], v[6:7], v[6:7]
s_or_b32 s6, vcc_lo, s6
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s6, exec_lo, s6
s_or_b32 s2, s6, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB0_2
s_or_b32 exec_lo, exec_lo, s2
s_branch .LBB0_5
.LBB0_4:
v_mov_b32_e32 v14, 0
.LBB0_5:
s_load_b64 s[0:1], s[0:1], 0x8
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[2:3], null, v0, s3, v[1:2]
v_cmp_ne_u32_e32 vcc_lo, s4, v14
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[0:1], 2, v[2:3]
v_cndmask_b32_e32 v2, 0, v14, vcc_lo
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| mandelgpu | 5,770 | 2,592 | stackv2-00000-of-00015 |
// Demangled: matrixMulCUDA(double*, double*, double*, int, int, int)
Function : _Z13matrixMulCUDAPdS_S_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R11, c[0x0][0x39c] &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x2 ?trans1;
ISETP.GE.AND P0, PT, R11, 0x1, PT &req={1} ?WAIT13_END_GROUP;
@!P0 BRA 0x10b0 &req={2,0} ?trans5;
S2R R10, SR_TID.X &wr=0x0 ?trans1;
S2UR UR6, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
ISETP.GE.U32.AND P0, PT, R11.reuse, 0x8, PT ?trans1;
S2R R5, SR_CTAID.X &wr=0x2 ?trans1;
UIADD3 UR5, UPT, UPT, UR4, 0x4000, URZ ?trans1;
LOP3.LUT R2, R11, 0x7, RZ, 0xc0, !PT ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?trans1;
S2R R7, SR_CTAID.Y &wr=0x3 ?trans3;
ISETP.NE.AND P3, PT, R2, RZ, PT ?trans1;
S2R R0, SR_TID.Y &wr=0x4 ?trans1;
ULEA UR4, UR6, UR4, 0x18 &req={1} ?trans1;
ULEA UR5, UR6, UR5, 0x18 ?trans1;
IMAD.SHL.U32 R6, R10, 0x80, RZ &req={0} ?WAIT4_END_GROUP;
LEA R8, R10.reuse, UR4, 0xa ?trans2;
LEA R9, R10, UR5, 0xa ?trans1;
IMAD R4, R5.reuse, 0x10, R10 &req={2} ?trans2;
IMAD R5, R5, 0x800, R6.reuse ?trans2;
IMAD R6, R7.reuse, 0x800, R6 &req={3} ?trans2;
IMAD R7, R7, 0x10, R10 ?trans1;
@!P0 BRA 0x920 ?trans6;
LOP3.LUT R3, R11, 0x7ffffff8, RZ, 0xc0, !PT ?trans1;
LDCU UR4, c[0x0][0x3a0] &wr=0x0 ?trans1;
MOV R10, RZ ?WAIT7_END_GROUP;
IMAD R26, R10, 0x10, R0 &req={4} ?WAIT5_END_GROUP;
IADD3 R29, PT, PT, R26.reuse, 0x10, RZ ?trans1;
ISETP.GT.U32.AND P0, PT, R26, 0x7f, PT ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P6, PT, R29, 0x7f, PT ?trans1;
ISETP.GE.U32.OR P1, PT, R4, UR4, P0 &req={0} ?trans1;
ISETP.GE.U32.OR P0, PT, R7, UR4, P0 ?WAIT3_END_GROUP;
ISETP.GE.U32.OR P4, PT, R4, UR4, P6 ?trans1;
ISETP.GE.U32.OR P6, PT, R7, UR4, P6 ?WAIT8_END_GROUP;
@!P1 LDC.64 R18, c[0x0][0x380] &wr=0x0 ?trans1;
@!P1 IADD3 R11, PT, PT, R5.reuse, R26.reuse, RZ ?trans2;
@!P0 IADD3 R21, PT, PT, R6, R26, RZ ?trans2;
@!P4 IADD3 R23, PT, PT, R5, R29, RZ ?WAIT3_END_GROUP;
@!P0 LDC.64 R16, c[0x0][0x388] &wr=0x1 ?trans8;
@!P4 LDC.64 R14, c[0x0][0x380] &wr=0x2 ?trans8;
@!P6 LDC.64 R12, c[0x0][0x388] &wr=0x3 ?trans1;
@!P1 IMAD.WIDE.U32 R18, R11, 0x8, R18 &req={0} ?trans1;
@!P6 IADD3 R29, PT, PT, R6, R29, RZ ?WAIT5_END_GROUP;
@!P1 LDG.E.64 R18, desc[UR8][R18.64] &wr=0x4 ?trans1;
@!P0 IMAD.WIDE.U32 R16, R21, 0x8, R16 &req={1} ?WAIT6_END_GROUP;
@!P0 LDG.E.64 R16, desc[UR8][R16.64] &wr=0x5 ?trans1;
@!P4 IMAD.WIDE.U32 R14, R23, 0x8, R14 &req={2} ?WAIT6_END_GROUP;
@!P4 LDG.E.64 R14, desc[UR8][R14.64] &wr=0x2 ?trans1;
@!P6 IMAD.WIDE.U32 R28, R29, 0x8, R12 &req={3} ?WAIT6_END_GROUP;
@!P6 LDG.E.64 R28, desc[UR8][R28.64] &wr=0x3 ?trans1;
IADD3 R33, PT, PT, R26.reuse, 0x20, RZ ?trans1;
IMAD R12, R26.reuse, 0x8, R8 ?trans1;
IADD3 R27, PT, PT, R26.reuse, 0x30, RZ ?trans1;
IMAD R11, R26.reuse, 0x8, R9 ?trans2;
ISETP.GT.U32.AND P2, PT, R33, 0x7f, PT ?trans1;
IADD3 R13, PT, PT, R26, 0x40, RZ ?trans1;
@!P1 STS.64 [R12], R18 &req={4} ?trans1;
ISETP.GT.U32.AND P1, PT, R27, 0x7f, PT ?WAIT3_END_GROUP;
@!P0 STS.64 [R11], R16 &req={5} &rd=0x0 ?trans1;
ISETP.GE.U32.OR P0, PT, R7, UR4, P2 ?trans1;
ISETP.GE.U32.OR P5, PT, R4.reuse, UR4, P1 ?trans2;
@!P4 STS.64 [R12+0x80], R14 &req={2} &rd=0x1 ?trans1;
ISETP.GE.U32.OR P4, PT, R4, UR4, P2 ?trans1;
ISETP.GT.U32.AND P2, PT, R13, 0x7f, PT ?trans1;
ISETP.GE.U32.OR P1, PT, R7, UR4, P1 ?WAIT7_END_GROUP;
@!P0 LDC.64 R22, c[0x0][0x388] &wr=0x2 ?trans1;
@!P6 STS.64 [R11+0x80], R28 &req={3} &rd=0x3 ?trans1;
ISETP.GE.U32.OR P6, PT, R4, UR4, P2 ?trans1;
ISETP.GE.U32.OR P2, PT, R7, UR4, P2 ?WAIT5_END_GROUP;
@!P4 LDC.64 R24, c[0x0][0x380] &wr=0x4 ?trans8;
@!P5 LDC.64 R16, c[0x0][0x380] &req={0} &wr=0x0 ?trans8;
@!P1 LDC.64 R14, c[0x0][0x388] &req={1} &wr=0x1 ?trans8;
@!P6 LDC.64 R20, c[0x0][0x380] &wr=0x5 ?trans8;
@!P2 LDC.64 R18, c[0x0][0x388] &wr=0x5 ?trans1;
@!P4 IADD3 R31, PT, PT, R5, R33, RZ ?WAIT2_END_GROUP;
@!P0 IADD3 R33, PT, PT, R6.reuse, R33, RZ ?trans2;
@!P5 IADD3 R29, PT, PT, R5, R27.reuse, RZ &req={3} ?trans1;
@!P4 IMAD.WIDE.U32 R24, R31, 0x8, R24 &req={4} ?trans1;
@!P1 IADD3 R27, PT, PT, R6, R27, RZ ?WAIT3_END_GROUP;
@!P0 IMAD.WIDE.U32 R22, R33, 0x8, R22 &req={2} ?trans2;
@!P4 LDG.E.64 R24, desc[UR8][R24.64] &wr=0x2 ?trans2;
@!P5 IMAD.WIDE.U32 R16, R29, 0x8, R16 &req={0} ?trans1;
@!P6 IADD3 R29, PT, PT, R5, R13.reuse, RZ ?trans2;
@!P2 IADD3 R13, PT, PT, R6, R13, RZ ?trans1;
@!P0 LDG.E.64 R22, desc[UR8][R22.64] &wr=0x3 ?trans1;
@!P1 IMAD.WIDE.U32 R14, R27, 0x8, R14 &req={1} ?WAIT3_END_GROUP;
@!P5 LDG.E.64 R16, desc[UR8][R16.64] &wr=0x4 ?trans1;
@!P6 IMAD.WIDE.U32 R20, R29, 0x8, R20 &req={5} ?WAIT3_END_GROUP;
@!P1 LDG.E.64 R14, desc[UR8][R14.64] &wr=0x5 ?trans1;
@!P2 IMAD.WIDE.U32 R18, R13, 0x8, R18 ?WAIT3_END_GROUP;
@!P6 LDG.E.64 R20, desc[UR8][R20.64] &wr=0x5 ?trans4;
@!P2 LDG.E.64 R18, desc[UR8][R18.64] &wr=0x5 ?trans1;
IADD3 R13, PT, PT, R26.reuse, 0x50, RZ ?trans2;
IADD3 R27, PT, PT, R26.reuse, 0x60, RZ ?trans2;
IADD3 R26, PT, PT, R26, 0x70, RZ ?trans1;
@!P4 STS.64 [R12+0x100], R24 &req={2} ?trans1;
ISETP.GT.U32.AND P4, PT, R13, 0x7f, PT ?WAIT3_END_GROUP;
@!P0 STS.64 [R11+0x100], R22 &req={3} ?trans1;
ISETP.GT.U32.AND P0, PT, R27, 0x7f, PT ?WAIT3_END_GROUP;
@!P5 STS.64 [R12+0x180], R16 &req={4} &rd=0x0 ?trans1;
ISETP.GE.U32.OR P5, PT, R4, UR4, P4 ?WAIT3_END_GROUP;
@!P1 STS.64 [R11+0x180], R14 &req={5} &rd=0x1 ?trans1;
ISETP.GT.U32.AND P1, PT, R26, 0x7f, PT ?trans1;
ISETP.GE.U32.OR P4, PT, R7.reuse, UR4, P4 ?trans2;
@!P6 STS.64 [R12+0x200], R20 &rd=0x2 ?trans4;
@!P2 STS.64 [R11+0x200], R18 &rd=0x3 ?trans1;
ISETP.GE.U32.OR P2, PT, R4.reuse, UR4, P0 ?trans1;
ISETP.GE.U32.OR P0, PT, R7.reuse, UR4, P0 ?trans1;
ISETP.GE.U32.OR P6, PT, R4, UR4, P1 ?trans1;
ISETP.GE.U32.OR P1, PT, R7, UR4, P1 ?trans1;
@!P5 LDC.64 R16, c[0x0][0x380] &req={0} &wr=0x0 ?trans8;
@!P4 LDC.64 R14, c[0x0][0x388] &req={1} &wr=0x1 ?trans8;
@!P2 LDC.64 R22, c[0x0][0x380] &wr=0x4 ?trans8;
@!P0 LDC.64 R20, c[0x0][0x388] &req={2} &wr=0x2 ?trans8;
@!P6 LDC.64 R24, c[0x0][0x380] &wr=0x5 ?trans8;
@!P1 LDC.64 R18, c[0x0][0x388] &req={3} &wr=0x3 ?trans1;
@!P5 IADD3 R29, PT, PT, R5, R13, RZ ?WAIT2_END_GROUP;
@!P4 IADD3 R13, PT, PT, R6.reuse, R13, RZ ?trans2;
@!P6 IADD3 R31, PT, PT, R5, R26.reuse, RZ ?trans1;
@!P5 IMAD.WIDE.U32 R16, R29, 0x8, R16 &req={0} ?trans1;
@!P2 IADD3 R29, PT, PT, R5, R27.reuse, RZ ?trans2;
@!P0 IADD3 R27, PT, PT, R6.reuse, R27, RZ ?trans2;
@!P1 IADD3 R33, PT, PT, R6, R26, RZ ?trans1;
@!P4 IMAD.WIDE.U32 R14, R13, 0x8, R14 &req={1} ?trans1;
@!P5 LDG.E.64 R16, desc[UR8][R16.64] &wr=0x3 ?trans3;
@!P2 IMAD.WIDE.U32 R22, R29, 0x8, R22 &req={4} ?WAIT2_END_GROUP;
@!P4 LDG.E.64 R14, desc[UR8][R14.64] &wr=0x4 ?trans2;
@!P0 IMAD.WIDE.U32 R20, R27, 0x8, R20 &req={2} ?trans2;
@!P2 LDG.E.64 R22, desc[UR8][R22.64] &wr=0x2 ?trans2;
@!P6 IMAD.WIDE.U32 R24, R31, 0x8, R24 &req={5} ?trans2;
@!P0 LDG.E.64 R20, desc[UR8][R20.64] &wr=0x5 ?trans2;
@!P1 IMAD.WIDE.U32 R18, R33, 0x8, R18 &req={3} ?WAIT2_END_GROUP;
@!P6 LDG.E.64 R24, desc[UR8][R24.64] &wr=0x3 ?trans4;
@!P1 LDG.E.64 R18, desc[UR8][R18.64] &wr=0x3 ?trans1;
IADD3 R10, PT, PT, R10, 0x8, RZ ?WAIT3_END_GROUP;
@!P5 STS.64 [R12+0x280], R16 &rd=0x1 ?trans4;
@!P4 STS.64 [R11+0x280], R14 &req={4} &rd=0x1 ?trans4;
@!P2 STS.64 [R12+0x300], R22 &req={2} &rd=0x1 ?trans4;
@!P0 STS.64 [R11+0x300], R20 &req={5} &rd=0x1 ?trans4;
@!P6 STS.64 [R12+0x380], R24 &req={3} &rd=0x1 ?trans4;
@!P1 STS.64 [R11+0x380], R18 &rd=0x1 ?trans1;
ISETP.NE.AND P0, PT, R10, R3, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1d0 &req={1} ?trans5;
@!P3 BRA 0x10b0 ?trans5;
LDC R22, c[0x0][0x39c] &wr=0x0 ?trans1;
ISETP.GE.U32.AND P0, PT, R2, 0x4, PT ?trans1;
LOP3.LUT R24, R22, 0x3, RZ, 0xc0, !PT &req={0} ?WAIT5_END_GROUP;
ISETP.NE.AND P3, PT, R24, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0xd40 ?trans6;
LDCU UR4, c[0x0][0x3a0] &wr=0x0 ?trans1;
IMAD R25, R3, 0x10, R0 &req={4} ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R25, 0x7f, PT ?WAIT5_END_GROUP;
ISETP.GE.U32.OR P6, PT, R4, UR4, P0 &req={0} ?trans1;
ISETP.GE.U32.OR P2, PT, R7, UR4, P0 ?WAIT12_END_GROUP;
@!P6 LDC.64 R16, c[0x0][0x380] &wr=0x0 ?trans1;
@!P6 IADD3 R13, PT, PT, R5, R25.reuse, RZ ?trans2;
@!P2 IADD3 R15, PT, PT, R6, R25, RZ ?WAIT5_END_GROUP;
@!P2 LDC.64 R10, c[0x0][0x388] &wr=0x1 ?trans1;
@!P6 IMAD.WIDE.U32 R16, R13, 0x8, R16 &req={0} ?WAIT6_END_GROUP;
@!P6 LDG.E.64 R16, desc[UR8][R16.64] &wr=0x2 ?trans1;
@!P2 IMAD.WIDE.U32 R10, R15, 0x8, R10 &req={1} ?WAIT5_END_GROUP;
@!P2 LDG.E.64 R18, desc[UR8][R10.64] &wr=0x3 ?trans1;
IADD3 R26, PT, PT, R25.reuse, 0x10, RZ ?trans2;
IADD3 R31, PT, PT, R25.reuse, 0x20, RZ ?trans1;
IMAD R23, R25.reuse, 0x8, R8 ?trans2;
ISETP.GT.U32.AND P5, PT, R26, 0x7f, PT ?trans1;
IMAD R2, R25.reuse, 0x8, R9 ?trans1;
IADD3 R25, PT, PT, R25, 0x30, RZ ?trans1;
ISETP.GT.U32.AND P1, PT, R31, 0x7f, PT ?trans2;
ISETP.GE.U32.OR P4, PT, R4, UR4, P5 ?WAIT2_END_GROUP;
ISETP.GT.U32.AND P0, PT, R25, 0x7f, PT ?WAIT11_END_GROUP;
@!P4 LDC.64 R14, c[0x0][0x380] &wr=0x0 ?trans1;
@!P4 IADD3 R27, PT, PT, R5, R26, RZ ?WAIT5_END_GROUP;
@!P4 IMAD.WIDE.U32 R14, R27, 0x8, R14 &req={0} ?WAIT6_END_GROUP;
@!P4 LDG.E.64 R14, desc[UR8][R14.64] &wr=0x4 ?trans4;
@!P6 STS.64 [R23], R16 &req={2} &rd=0x0 ?trans1;
ISETP.GE.U32.OR P6, PT, R4.reuse, UR4, P0 ?trans1;
ISETP.GE.U32.OR P0, PT, R7.reuse, UR4, P0 ?trans2;
@!P2 STS.64 [R2], R18 &req={3} &rd=0x1 ?trans1;
ISETP.GE.U32.OR P2, PT, R7.reuse, UR4, P5 ?trans1;
ISETP.GE.U32.OR P5, PT, R4, UR4, P1 ?trans1;
ISETP.GE.U32.OR P1, PT, R7, UR4, P1 ?WAIT7_END_GROUP;
@!P6 LDC.64 R20, c[0x0][0x380] &wr=0x2 ?trans8;
@!P2 LDC.64 R10, c[0x0][0x388] &wr=0x3 ?trans8;
@!P5 LDC.64 R12, c[0x0][0x380] &wr=0x5 ?trans8;
@!P1 LDC.64 R16, c[0x0][0x388] &req={0} &wr=0x0 ?trans8;
@!P0 LDC.64 R18, c[0x0][0x388] &req={1} &wr=0x1 ?trans1;
@!P2 IADD3 R27, PT, PT, R6, R26, RZ ?WAIT2_END_GROUP;
@!P5 IADD3 R29, PT, PT, R5.reuse, R31.reuse, RZ ?trans2;
@!P1 IADD3 R31, PT, PT, R6.reuse, R31, RZ ?trans2;
@!P6 IADD3 R33, PT, PT, R5, R25.reuse, RZ ?trans2;
@!P0 IADD3 R25, PT, PT, R6, R25, RZ ?trans1;
@!P2 IMAD.WIDE.U32 R10, R27, 0x8, R10 &req={3} ?WAIT4_END_GROUP;
@!P5 IMAD.WIDE.U32 R12, R29, 0x8, R12 &req={5} ?trans2;
@!P2 LDG.E.64 R10, desc[UR8][R10.64] &wr=0x3 ?trans2;
@!P6 IMAD.WIDE.U32 R20, R33, 0x8, R20 &req={2} ?trans2;
@!P5 LDG.E.64 R12, desc[UR8][R12.64] &wr=0x2 ?trans2;
@!P1 IMAD.WIDE.U32 R16, R31, 0x8, R16 &req={0} ?trans2;
@!P6 LDG.E.64 R20, desc[UR8][R20.64] &wr=0x5 ?trans2;
@!P0 IMAD.WIDE.U32 R18, R25, 0x8, R18 &req={1} ?WAIT2_END_GROUP;
@!P1 LDG.E.64 R16, desc[UR8][R16.64] &wr=0x5 ?trans4;
@!P0 LDG.E.64 R18, desc[UR8][R18.64] &wr=0x5 ?trans4;
@!P4 STS.64 [R23+0x80], R14 &req={4} &rd=0x0 ?trans1;
IADD3 R3, PT, PT, R3, 0x4, RZ ?WAIT3_END_GROUP;
@!P2 STS.64 [R2+0x80], R10 &req={3} &rd=0x0 ?trans4;
@!P5 STS.64 [R23+0x100], R12 &req={2} &rd=0x0 ?trans4;
@!P1 STS.64 [R2+0x100], R16 &req={5} &rd=0x0 ?trans4;
@!P6 STS.64 [R23+0x180], R20 &rd=0x0 ?trans4;
@!P0 STS.64 [R2+0x180], R18 &rd=0x0 ?trans2;
@!P3 BRA 0x10b0 ?trans5;
ISETP.NE.AND P0, PT, R24, 0x1, PT ?trans1;
LOP3.LUT R22, R22, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P2, PT, R22, 0x1, PT ?WAIT7_END_GROUP;
@!P0 BRA 0xf90 ?trans6;
LDCU UR4, c[0x0][0x3a0] &wr=0x1 ?trans1;
IMAD R2, R3, 0x10, R0 &req={4,0} ?WAIT5_END_GROUP;
IADD3 R25, PT, PT, R2.reuse, 0x10, RZ ?trans1;
ISETP.GT.U32.AND P0, PT, R2, 0x7f, PT ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P1, PT, R25, 0x7f, PT ?trans1;
ISETP.GE.U32.OR P3, PT, R4, UR4, P0 &req={1} ?trans1;
ISETP.GE.U32.OR P0, PT, R7, UR4, P0 ?WAIT3_END_GROUP;
ISETP.GE.U32.OR P4, PT, R4, UR4, P1 ?trans1;
ISETP.GE.U32.OR P1, PT, R7, UR4, P1 ?WAIT8_END_GROUP;
@!P3 LDC.64 R14, c[0x0][0x380] &wr=0x0 ?trans1;
@!P3 IADD3 R19, PT, PT, R5.reuse, R2.reuse, RZ ?trans2;
@!P0 IADD3 R21, PT, PT, R6.reuse, R2, RZ ?trans2;
@!P4 IADD3 R23, PT, PT, R5, R25.reuse, RZ ?trans2;
@!P1 IADD3 R25, PT, PT, R6, R25, RZ ?trans1;
@!P0 LDC.64 R16, c[0x0][0x388] &wr=0x1 ?trans8;
@!P4 LDC.64 R12, c[0x0][0x380] &wr=0x2 ?trans8;
@!P1 LDC.64 R10, c[0x0][0x388] &wr=0x3 ?trans1;
@!P3 IMAD.WIDE.U32 R14, R19, 0x8, R14 &req={0} ?WAIT6_END_GROUP;
@!P3 LDG.E.64 R14, desc[UR8][R14.64] &wr=0x4 ?trans1;
@!P0 IMAD.WIDE.U32 R16, R21, 0x8, R16 &req={1} ?WAIT6_END_GROUP;
@!P0 LDG.E.64 R16, desc[UR8][R16.64] &wr=0x5 ?trans1;
@!P4 IMAD.WIDE.U32 R12, R23, 0x8, R12 &req={2} ?WAIT6_END_GROUP;
@!P4 LDG.E.64 R12, desc[UR8][R12.64] &wr=0x2 ?trans1;
@!P1 IMAD.WIDE.U32 R10, R25, 0x8, R10 &req={3} ?WAIT6_END_GROUP;
@!P1 LDG.E.64 R10, desc[UR8][R10.64] &wr=0x3 ?trans1;
IMAD R19, R2.reuse, 0x8, R8 ?trans2;
IMAD R21, R2, 0x8, R9 ?trans1;
IADD3 R3, PT, PT, R3, 0x2, RZ ?trans2;
@!P3 STS.64 [R19], R14 &req={4} &rd=0x1 ?trans4;
@!P0 STS.64 [R21], R16 &req={5} &rd=0x1 ?trans4;
@!P4 STS.64 [R19+0x80], R12 &req={2} &rd=0x1 ?trans4;
@!P1 STS.64 [R21+0x80], R10 &req={3} &rd=0x1 ?trans2;
@P2 BRA 0x10b0 ?trans5;
LDCU UR4, c[0x0][0x3a0] &wr=0x2 ?trans1;
IMAD R0, R3, 0x10, R0 &req={4} ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R0, 0x7f, PT ?WAIT5_END_GROUP;
ISETP.GE.U32.OR P1, PT, R4, UR4, P0 &req={2} ?trans1;
ISETP.GE.U32.OR P0, PT, R7, UR4, P0 ?WAIT12_END_GROUP;
@!P1 LDC.64 R2, c[0x0][0x380] &req={0} &wr=0x0 ?trans1;
@!P1 IADD3 R5, PT, PT, R5, R0.reuse, RZ ?trans2;
@!P0 IADD3 R7, PT, PT, R6, R0, RZ ?WAIT5_END_GROUP;
@!P0 LDC.64 R10, c[0x0][0x388] &req={1} &wr=0x1 ?trans1;
@!P1 IMAD.WIDE.U32 R2, R5, 0x8, R2 &req={0} ?WAIT6_END_GROUP;
@!P1 LDG.E.64 R2, desc[UR8][R2.64] &wr=0x2 ?trans1;
@!P0 IMAD.WIDE.U32 R4, R7, 0x8, R10 &req={1} ?WAIT6_END_GROUP;
@!P0 LDG.E.64 R4, desc[UR8][R4.64] &wr=0x3 ?trans1;
@!P1 IMAD R7, R0.reuse, 0x8, R8 ?trans2;
@!P0 IMAD R9, R0, 0x8, R9 ?WAIT3_END_GROUP;
@!P1 STS.64 [R7], R2 &req={2} &rd=0x2 ?trans4;
@!P0 STS.64 [R9], R4 &req={3} &rd=0x2 ?trans2;
S2R R2, SR_TID.Y &req={2,0} &wr=0x0 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x2 ?trans1;
UMOV UR4, 0x400 ?trans1;
MOV.64 R6, RZ ?trans2;
S2R R0, SR_TID.X &req={4} &wr=0x3 ?trans1;
UIADD3 UR6, UPT, UPT, UR4, 0x4000, URZ ?WAIT3_END_GROUP;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ULEA UR6, UR5, UR6, 0x18 &req={2} ?trans1;
ULEA UR4, UR5, UR4, 0x18 ?WAIT5_END_GROUP;
LEA R3, R2, UR6, 0xa &req={0} ?trans2;
LEA R4, R0, UR4, 0xa &req={3} ?trans1;
UMOV UR4, 0x40 ?WAIT6_END_GROUP;
LDS.128 R8, [R4+UR4+-0x40] &req={1} ?trans4;
LDS.128 R12, [R3+UR4+-0x40] &wr=0x0 ?trans2;
DADD R16, R8, -R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R10, -R14 &rd=0x1 ?trans2;
LDS.128 R8, [R4+UR4+-0x30] &req={1} ?trans4;
LDS.128 R12, [R3+UR4+-0x30] &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R16, R16, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R8, -R12 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R10, -R14 &rd=0x1 ?trans2;
LDS.128 R8, [R4+UR4+-0x20] &req={1} ?trans4;
LDS.128 R12, [R3+UR4+-0x20] &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R18, R18, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R20, R20, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R8, -R12 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R10, -R14 &rd=0x1 ?trans2;
LDS.128 R8, [R4+UR4+-0x10] &req={1} ?trans4;
LDS.128 R12, [R3+UR4+-0x10] &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R16, R16, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R18, R18, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R8, -R12 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R10, -R14 &rd=0x1 ?trans2;
LDS.128 R8, [R4+UR4] &req={1} ?trans4;
LDS.128 R12, [R3+UR4] &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R20, R20, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R16, R16, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R8, -R12 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R10, -R14 &rd=0x1 ?trans2;
LDS.128 R8, [R4+UR4+0x10] &req={1} ?trans4;
LDS.128 R12, [R3+UR4+0x10] &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R18, R18, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R20, R20, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R8, -R12 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R10, -R14 &rd=0x1 ?trans2;
LDS.128 R8, [R4+UR4+0x20] &req={1} ?trans4;
LDS.128 R12, [R3+UR4+0x20] &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R16, R16, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R18, R18, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R8, -R12 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R10, -R14 &rd=0x1 ?trans2;
LDS.128 R8, [R4+UR4+0x30] &req={1} ?trans4;
LDS.128 R12, [R3+UR4+0x30] &wr=0x1 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x80, URZ ?WAIT4_END_GROUP;
UISETP.NE.AND UP0, UPT, UR4, 0x440, UPT ?WAIT6_END_GROUP;
PLOP3.LUT P0, PT, PT, PT, UP0, 0x80, 0x8 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R20, R20, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R16, R16, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, R8, -R12 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R18, R18, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, R10, -R14 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R8, R8, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R10, R10, R6 &req={0} &rd=0x0 &wr=0x2 ?trans2;
@P0 BRA 0x1170 &req={2,0} ?trans5;
S2R R3, SR_CTAID.X &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x3a0] &wr=0x1 ?trans1;
IMAD R5, R3, 0x10, R0 &req={0} ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R5, UR4, PT &req={1} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
S2R R3, SR_CTAID.Y &wr=0x0 ?trans2;
IMAD R0, R3, 0x10, R2 &req={0} ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, UR4, PT ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDC.64 R2, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD R5, R5, UR4, R0 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R5, 0x8, R2 &req={0} ?WAIT5_END_GROUP;
STG.E.64 desc[UR8][R2.64], R6 ?trans1;
EXIT ?trans5;
BRA 0x1ce0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: matrixMulCUDA(double*, double*, double*, int, int, int)
_Z13matrixMulCUDAPdS_S_iii:
s_clause 0x2
s_load_b64 s[8:9], s[0:1], 0x1c
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x10
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_mov_b32 s0, 0
s_waitcnt lgkmcnt(0)
s_cmp_gt_i32 s8, 0
s_cbranch_scc1 .LBB0_2
v_and_b32_e32 v4, 0x3ff, v0
v_bfe_u32 v5, v0, 10, 10
s_branch .LBB0_3
.LBB0_2:
s_mov_b32 s0, -1
.LBB0_3:
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 vcc_lo, exec_lo, s0
s_cbranch_vccnz .LBB0_11
v_lshl_add_u32 v0, s14, 4, v2
v_lshl_add_u32 v1, s15, 4, v2
v_lshlrev_b32_e32 v5, 7, v2
v_dual_mov_b32 v7, v3 :: v_dual_lshlrev_b32 v6, 3, v3
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_cmp_gt_u32_e32 vcc_lo, s9, v0
v_cmp_gt_u32_e64 s0, s9, v1
v_mov_b32_e32 v1, 0
v_lshl_add_u32 v4, s15, 11, v5
v_lshl_add_u32 v5, s14, 11, v5
v_lshl_add_u32 v6, v2, 10, v6
.LBB0_5:
v_cmp_gt_u32_e64 s1, 0x80, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s1, vcc_lo, s1
s_and_saveexec_b32 s10, s1
s_cbranch_execz .LBB0_7
v_add_nc_u32_e32 v0, v5, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[8:9], 3, v[0:1]
v_add_co_u32 v8, s1, s4, v8
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v9, s1, s5, v9, s1
global_load_b64 v[8:9], v[8:9], off
s_waitcnt vmcnt(0)
ds_store_b64 v6, v[8:9]
.LBB0_7:
s_or_b32 exec_lo, exec_lo, s10
v_cmp_gt_u32_e64 s1, 0x80, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s1, s0, s1
s_and_saveexec_b32 s10, s1
s_cbranch_execz .LBB0_9
v_add_nc_u32_e32 v0, v4, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[8:9], 3, v[0:1]
v_add_co_u32 v8, s1, s6, v8
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v9, s1, s7, v9, s1
global_load_b64 v[8:9], v[8:9], off
s_waitcnt vmcnt(0)
ds_store_b64 v6, v[8:9] offset:16384
.LBB0_9:
s_or_b32 exec_lo, exec_lo, s10
v_add_nc_u32_e32 v7, 16, v7
v_add_nc_u32_e32 v6, 0x80, v6
s_add_i32 s8, s8, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s8, 0
s_cbranch_scc0 .LBB0_5
v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v5, v3
.LBB0_11:
v_mov_b32_e32 v0, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v2, 10, v4
v_lshl_add_u32 v3, v5, 10, 0x4000
s_mov_b32 s0, 0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB0_12:
v_add_nc_u32_e32 v6, s0, v2
v_add_nc_u32_e32 v8, s0, v3
s_add_i32 s0, s0, 8
ds_load_b64 v[6:7], v6
ds_load_b64 v[8:9], v8
s_cmpk_eq_i32 s0, 0x400
s_waitcnt lgkmcnt(0)
v_add_f64 v[6:7], v[6:7], -v[8:9]
s_delay_alu instid0(VALU_DEP_1)
v_fma_f64 v[0:1], v[6:7], v[6:7], v[0:1]
s_cbranch_scc0 .LBB0_12
v_lshl_add_u32 v3, s14, 4, v4
v_lshl_add_u32 v2, s15, 4, v5
s_mov_b32 s0, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_max_u32_e32 v4, v3, v2
v_cmpx_gt_u32_e64 s9, v4
s_cbranch_execz .LBB0_15
v_mad_u64_u32 v[4:5], null, v3, s9, v[2:3]
v_mov_b32_e32 v5, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 3, v[4:5]
v_add_co_u32 v2, vcc_lo, s2, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
global_store_b64 v[2:3], v[0:1], off
.LBB0_15:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| matrixMulCUDA | 11,353 | 1,923 | stackv2-00000-of-00015 |
// Demangled: init_matrix(float*, int, int, float)
Function : _Z11init_matrixPfiif
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x388] &wr=0x2 ?trans7;
LDC R7, c[0x0][0x360] &wr=0x1 ?trans1;
UIMAD UR4, UR5, UR4, URZ &req={2} ?trans1;
IMAD R0, R7, UR6, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR4, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R9, c[0x0][0x390] &wr=0x0 ?trans1;
LDCU UR5, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R4, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD R7, R7, UR5, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R2, R0, 0x4, R4 &req={3} ?trans1;
IADD3 R0, PT, PT, R7, R0, RZ ?WAIT4_END_GROUP;
STG.E desc[UR6][R2.64], R9 &req={2,0} &rd=0x1 ?trans1;
ISETP.GE.AND P0, PT, R0, UR4, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xe0 &req={1} ?trans5;
EXIT ?trans5;
BRA 0x140;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: init_matrix(float*, int, int, float)
_Z11init_matrixPfiif:
s_clause 0x1
s_load_b32 s8, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x8
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s7, s8, 0xffff
s_mul_i32 s4, s5, s4
v_mad_u64_u32 v[1:2], null, s15, s7, v[0:1]
s_mov_b32 s5, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s4, v1
s_cbranch_execz .LBB0_3
s_load_b32 s5, s[2:3], 0x0
s_load_b64 s[2:3], s[0:1], 0x0
v_mov_b32_e32 v0, s6
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s5, s7
s_mov_b32 s5, 0
.LBB0_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_cmp_le_i32_e32 vcc_lo, s4, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v2, s0, s2, v2
v_add_co_ci_u32_e64 v3, s0, s3, v3, s0
s_or_b32 s5, vcc_lo, s5
global_store_b32 v[2:3], v0, off
s_and_not1_b32 exec_lo, exec_lo, s5
s_cbranch_execnz .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| init_matrix | 548 | 591 | stackv2-00000-of-00015 |
// Demangled: multiply_matrices(float*, float*, float*, int, int, int)
Function : _Z17multiply_matricesPfS_S_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
LDC R2, c[0x0][0x364] &wr=0x2 ?trans1;
LDCU UR6, c[0x0][0x398] &wr=0x3 ?trans1;
S2R R3, SR_TID.Y &wr=0x2 ?trans6;
S2UR UR5, SR_CTAID.X &wr=0x1 ?trans8;
LDC R5, c[0x0][0x360] &wr=0x1 ?trans8;
S2UR UR4, SR_CTAID.Y &wr=0x2 ?trans8;
LDC R6, c[0x0][0x3a0] &wr=0x4 ?trans1;
IMAD R0, R5, UR5, R0 &req={1} ?WAIT2_END_GROUP;
IMAD R3, R2, UR4, R3 &req={2} ?WAIT3_END_GROUP;
ISETP.GE.AND P0, PT, R0, R6, PT &req={4} ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R3, UR6, P0 &req={3} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R2, c[0x0][0x39c] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
HFMA2 R28, -RZ, RZ, 0, 0 ?trans1;
ISETP.GE.AND P0, PT, R2, 0x1, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0xa60 &req={1} ?trans5;
ISETP.GE.U32.AND P0, PT, R2.reuse, 0x8, PT ?trans1;
LOP3.LUT R4, R2, 0x7, RZ, 0xc0, !PT ?trans1;
IMAD R10, R3, R2, RZ ?trans1;
MOV R28, RZ ?trans1;
MOV R5, RZ ?trans2;
ISETP.NE.AND P1, PT, R4, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x5c0 ?trans6;
SHF.R.S32.HI R7, RZ, 0x1f, R6 ?trans1;
LDC.64 R8, c[0x0][0x380] &wr=0x0 ?trans1;
LOP3.LUT R32, R2, 0x7ffffff8, RZ, 0xc0, !PT ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?trans1;
MOV R28, RZ ?trans1;
IADD.64 R12, R6, R6 ?trans2;
MOV R33, R0 ?trans1;
IADD3 R32, PT, PT, -R32, RZ, RZ ?trans1;
IADD.64 R14, R6, R12 ?WAIT3_END_GROUP;
SHF.L.U64.HI R13, R12, 0x2, R13 ?trans1;
IADD.64 R16, R6, R14 ?trans2;
IMAD.SHL.U32 R12, R12, 0x4, RZ ?trans1;
SHF.L.U64.HI R15, R14, 0x2, R15 ?trans1;
IADD.64 R18, R6, R16 ?trans2;
IMAD.SHL.U32 R14, R14, 0x4, RZ ?trans1;
SHF.L.U64.HI R17, R16, 0x2, R17 ?trans1;
IADD.64 R20, R6, R18 ?trans2;
IMAD.SHL.U32 R16, R16, 0x4, RZ ?trans1;
SHF.L.U64.HI R19, R18, 0x2, R19 ?trans1;
IMAD.WIDE.U32 R8, R10, 0x4, R8 &req={0} ?trans1;
IADD.64 R22, R6, R20 ?WAIT3_END_GROUP;
SHF.L.U64.HI R21, R20, 0x2, R21 ?trans1;
IADD.64 R8, R8, 0x10 ?trans2;
IMAD.SHL.U32 R18, R18, 0x4, RZ ?trans1;
SHF.L.U64.HI R23, R22, 0x2, R23 ?trans1;
IMAD.SHL.U32 R20, R20, 0x4, RZ ?trans2;
IMAD.SHL.U32 R22, R22, 0x4, RZ ?WAIT7_END_GROUP;
LDC.64 R30, c[0x0][0x388] &wr=0x0 ?trans1;
LDG.E R37, desc[UR4][R8.64+-0x10] &wr=0x2 ?trans4;
LDG.E R36, desc[UR4][R8.64+-0x4] &wr=0x3 ?trans1;
IMAD.WIDE R30, R33, 0x4, R30 &req={0} ?WAIT5_END_GROUP;
IADD.64 R24, R30, R14 ?trans2;
IMAD.WIDE R34, R6, 0x4, R30 ?trans1;
LDG.E R29, desc[UR4][R30.64] &wr=0x2 ?trans1;
IADD.64 R26, R30, R12 ?WAIT3_END_GROUP;
LDG.E R24, desc[UR4][R24.64] &wr=0x3 ?trans4;
LDG.E R35, desc[UR4][R34.64] &wr=0x4 ?trans4;
LDG.E R26, desc[UR4][R26.64] &wr=0x5 ?trans4;
LDG.E R25, desc[UR4][R8.64+-0x8] &wr=0x5 ?trans4;
LDG.E R34, desc[UR4][R8.64+-0xc] &wr=0x4 ?trans1;
FFMA R29, R37, R29, R28 &req={2} ?WAIT3_END_GROUP;
LDG.E R37, desc[UR4][R8.64+0x8] &wr=0x2 ?trans1;
FFMA R28, R34, R35, R29 &req={4} ?WAIT3_END_GROUP;
LDG.E R35, desc[UR4][R8.64] &wr=0x4 ?trans1;
FFMA R27, R25, R26, R28 &req={5} ?trans1;
IADD.64 R28, R30, R16 ?trans2;
LDG.E R34, desc[UR4][R8.64+0x4] &wr=0x5 ?trans1;
FFMA R36, R36, R24, R27 &req={3} ?trans1;
IADD.64 R26, R30.reuse, R18 ?trans2;
IADD.64 R24, R30.reuse, R20 ?trans2;
LDG.E R29, desc[UR4][R28.64] &wr=0x4 ?trans1;
IADD.64 R30, R30, R22 ?WAIT3_END_GROUP;
LDG.E R27, desc[UR4][R26.64] &wr=0x5 ?trans4;
LDG.E R24, desc[UR4][R24.64] &wr=0x2 ?trans4;
LDG.E R30, desc[UR4][R30.64] &wr=0x3 ?trans4;
LDG.E R25, desc[UR4][R8.64+0xc] &rd=0x0 &wr=0x3 ?trans1;
IADD3 R32, PT, PT, R32, 0x8, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R32, RZ, PT ?trans1;
IADD3 R5, PT, PT, R5, 0x8, RZ ?trans1;
IMAD R33, R6, 0x8, R33 ?trans1;
IADD.64 R8, R8, 0x20 &req={0} ?trans2;
FFMA R35, R35, R29, R36 &req={4} ?WAIT4_END_GROUP;
FFMA R34, R34, R27, R35 &req={5} ?WAIT4_END_GROUP;
FFMA R34, R37, R24, R34 &req={2} ?WAIT4_END_GROUP;
FFMA R28, R25, R30, R34 &req={3} ?trans1;
@P0 BRA 0x350 ?trans6;
@!P1 BRA 0xa60 ?trans5;
ISETP.GE.U32.AND P1, PT, R4, 0x4, PT ?trans1;
LOP3.LUT R24, R2, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R24, RZ, PT ?WAIT7_END_GROUP;
@!P1 BRA 0x840 ?trans6;
LDC.64 R12, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x380] &wr=0x1 ?trans1;
HFMA2 R11, -RZ, RZ, 0, 0 ?trans1;
MOV R8, R5 ?trans1;
HFMA2 R9, -RZ, RZ, 0, 0 ?trans2;
IMAD R15, R5, R6, R0 ?trans1;
SHF.R.S32.HI R17, RZ, 0x1f, R6 ?trans1;
LDC.64 R20, c[0x0][0x380] &wr=0x2 ?trans1;
IADD.64 R22, R10, R8 ?trans2;
MOV R16, R6 ?trans1;
IADD3 R19, PT, PT, R10, R5, RZ ?WAIT2_END_GROUP;
LEA R8, P1, R22, UR6, 0x2 &req={1} ?WAIT4_END_GROUP;
LEA.HI.X R9, R22, UR7, R23, 0x2, P1 ?trans1;
IMAD.WIDE R12, R15, 0x4, R12 &req={0} ?trans1;
IADD.64 R14, R16, R16 ?WAIT3_END_GROUP;
LDG.E R25, desc[UR4][R8.64+0x4] &wr=0x3 ?trans1;
IADD.64 R16, R16, R14 ?trans2;
IMAD.WIDE R22, R6, 0x4, R12 ?trans1;
LEA R18, P1, R14.reuse, R12.reuse, 0x2 ?trans1;
LDG.E R4, desc[UR4][R12.64] &wr=0x4 ?trans2;
IMAD.WIDE.U32 R20, R19, 0x4, R20 &req={2} ?trans1;
LEA.HI.X R19, R14, R13, R15, 0x2, P1 ?trans1;
LDG.E R22, desc[UR4][R22.64] &wr=0x3 ?trans1;
LEA R14, P1, R16, R12, 0x2 ?WAIT3_END_GROUP;
LDG.E R21, desc[UR4][R20.64] &wr=0x4 ?trans1;
LEA.HI.X R15, R16, R13, R17, 0x2, P1 ?WAIT3_END_GROUP;
LDG.E R18, desc[UR4][R18.64] &wr=0x2 ?trans4;
LDG.E R17, desc[UR4][R8.64+0x8] &wr=0x2 ?trans4;
LDG.E R27, desc[UR4][R8.64+0xc] &wr=0x5 ?trans4;
LDG.E R14, desc[UR4][R14.64] &wr=0x5 ?trans1;
IADD3 R5, PT, PT, R5, 0x4, RZ ?trans1;
FFMA R4, R21, R4, R28 &req={4} ?WAIT4_END_GROUP;
FFMA R4, R25, R22, R4 &req={3} ?WAIT4_END_GROUP;
FFMA R4, R17, R18, R4 &req={2} ?WAIT4_END_GROUP;
FFMA R28, R27, R14, R4 &req={5} ?WAIT7_END_GROUP;
@!P0 BRA 0xa60 ?trans5;
ISETP.NE.AND P0, PT, R24, 0x1, PT ?trans1;
LDC.64 R16, c[0x0][0x388] &wr=0x0 ?trans1;
LOP3.LUT R2, R2, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P1, PT, R2, 0x1, PT ?trans2;
LDC.64 R18, c[0x0][0x380] &wr=0x1 ?trans4;
@P0 MOV R11, RZ ?trans1;
@P0 MOV R20, R5.reuse ?trans1;
@P0 MOV R21, RZ ?trans1;
@P0 IADD3 R23, PT, PT, R10.reuse, R5, RZ ?trans1;
@P0 LDC.64 R12, c[0x0][0x380] &wr=0x2 ?trans3;
@P0 IADD.64 R20, R10, R20 ?WAIT2_END_GROUP;
@P0 IMAD R11, R5.reuse, R6, R0 ?trans1;
@P0 IADD3 R5, PT, PT, R5, 0x2, RZ ?trans2;
LDC.64 R14, c[0x0][0x380] &wr=0x3 ?trans1;
@P0 IMAD.WIDE R16, R11, 0x4, R16 &req={0} ?WAIT7_END_GROUP;
LDC.64 R8, c[0x0][0x388] &wr=0x0 ?trans1;
@P0 IMAD.WIDE.U32 R18, R23, 0x4, R18 &req={1} ?trans1;
@!P1 IADD3 R11, PT, PT, R10, R5, RZ ?trans1;
@P0 LDG.E R2, desc[UR4][R16.64] &wr=0x4 ?trans4;
@P0 LDG.E R19, desc[UR4][R18.64] &wr=0x4 ?trans1;
@P0 LEA R12, P2, R20, R12, 0x2 &req={2} ?WAIT4_END_GROUP;
@P0 LEA.HI.X R13, R20, R13, R21, 0x2, P2 ?trans1;
@!P1 IMAD R21, R5, R6, R0 ?trans2;
@P0 IMAD.WIDE R4, R6, 0x4, R16 ?WAIT3_END_GROUP;
@P0 LDG.E R13, desc[UR4][R12.64+0x4] &wr=0x2 ?trans1;
@!P1 IMAD.WIDE.U32 R14, R11, 0x4, R14 &req={3} ?WAIT3_END_GROUP;
@P0 LDG.E R4, desc[UR4][R4.64] &wr=0x2 ?trans1;
@!P1 IMAD.WIDE R8, R21, 0x4, R8 &req={0} ?WAIT3_END_GROUP;
@!P1 LDG.E R15, desc[UR4][R14.64] &wr=0x3 ?trans4;
@!P1 LDG.E R8, desc[UR4][R8.64] &wr=0x3 ?trans1;
@P0 FFMA R2, R19, R2, R28 &req={4} ?WAIT4_END_GROUP;
@P0 FFMA R28, R13, R4, R2 &req={2} ?WAIT4_END_GROUP;
@!P1 FFMA R28, R15, R8, R28 &req={3} ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD R3, R3, R6, R0 ?WAIT4_END_GROUP;
IMAD.WIDE R2, R3, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R28 ?trans1;
EXIT ?trans5;
BRA 0xab0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: multiply_matrices(float*, float*, float*, int, int, int)
_Z17multiply_matricesPfS_S_iii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x34
s_load_b128 s[4:7], s[0:1], 0x18
v_bfe_u32 v2, v0, 10, 10
v_and_b32_e32 v3, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
v_mad_u64_u32 v[1:2], null, s14, s2, v[3:4]
v_cmp_gt_i32_e32 vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_gt_i32_e64 s2, s6, v1
s_and_b32 s2, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB1_6
s_clause 0x1
s_load_b128 s[8:11], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_cmp_lt_i32 s5, 1
s_cbranch_scc1 .LBB1_4
v_mul_lo_u32 v2, v0, s5
v_mov_b32_e32 v6, 0
v_mov_b32_e32 v4, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s8, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
.LBB1_3:
v_ashrrev_i32_e32 v5, 31, v4
s_add_i32 s5, s5, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_cmp_eq_u32 s5, 0
v_lshlrev_b64 v[7:8], 2, v[4:5]
v_add_nc_u32_e32 v4, s6, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v7, vcc_lo, s10, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s11, v8, vcc_lo
global_load_b32 v5, v[2:3], off
global_load_b32 v7, v[7:8], off
v_add_co_u32 v2, vcc_lo, v2, 4
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v6, v5, v7
s_cbranch_scc0 .LBB1_3
s_branch .LBB1_5
.LBB1_4:
v_mov_b32_e32 v6, 0
.LBB1_5:
v_mad_u64_u32 v[2:3], null, v0, s6, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[0:1], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v6, off
.LBB1_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| multiply_matrices | 4,496 | 1,253 | stackv2-00000-of-00015 |
// Demangled: example(int**)
Function : _Z7examplePPi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R11, SR_TID.X &wr=0x0 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans7;
LDC R5, c[0x0][0x360] &wr=0x1 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
IMAD R5, R5, UR6, RZ &req={1} ?WAIT2_END_GROUP;
IMAD.WIDE.U32 R6, R11, 0x8, R2 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R5, 0x8, R2 ?trans1;
LDG.E.64 R8, desc[UR4][R6.64] &req={2} &wr=0x2 ?trans4;
LDG.E.64 R4, desc[UR4][R2.64] &wr=0x3 ?trans1;
SHF.L.U32 R10, R11, 0x3, RZ ?trans1;
HFMA2 R11, -RZ, RZ, 0, 0 ?WAIT5_END_GROUP;
IADD.64 R10, R2, R10 ?WAIT7_END_GROUP;
LDG.E.64 R10, desc[UR4][R10.64] &wr=0x4 ?trans4;
LDG.E R9, desc[UR4][R8.64] &req={2} &wr=0x2 ?trans4;
LDG.E R4, desc[UR4][R4.64] &req={3} &wr=0x2 ?trans2;
IADD3 R13, PT, PT, R4.reuse, R9.reuse, RZ &req={2} ?trans1;
IMAD R0, R4, R9, RZ ?WAIT5_END_GROUP;
IADD3 R15, PT, PT, R13, R0, RZ ?WAIT5_END_GROUP;
STG.E desc[UR4][R10.64], R15 &req={4} ?trans4;
LDG.E.64 R2, desc[UR4][R2.64] &wr=0x2 ?trans4;
STG.E desc[UR4][R2.64], R13 &req={2} ?trans4;
LDG.E.64 R6, desc[UR4][R6.64] &wr=0x2 ?trans4;
STG.E desc[UR4][R6.64], R0 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x1a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: example(int**)
_Z7examplePPi:
s_load_b64 s[2:3], s[0:1], 0x0
v_dual_mov_b32 v7, 0 :: v_dual_lshlrev_b32 v2, 3, v0
s_load_b32 s0, s[0:1], 0x14
s_waitcnt lgkmcnt(0)
global_load_b64 v[0:1], v2, s[2:3]
s_and_b32 s0, s0, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_mul_i32 s0, s15, s0
s_ashr_i32 s1, s0, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[0:1], s[0:1], 3
s_add_u32 s0, s2, s0
s_addc_u32 s1, s3, s1
global_load_b64 v[2:3], v2, s[0:1]
s_waitcnt vmcnt(1)
global_load_b32 v4, v[0:1], off
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_load_b32 s2, s[0:1], 0x0
s_waitcnt vmcnt(0) lgkmcnt(0)
v_mul_lo_u32 v5, v4, s2
v_add_nc_u32_e32 v4, s2, v4
s_delay_alu instid0(VALU_DEP_1)
v_add_nc_u32_e32 v6, v4, v5
global_store_b32 v[2:3], v6, off
global_store_b32 v7, v4, s[0:1]
global_store_b32 v[0:1], v5, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| example | 747 | 517 | stackv2-00000-of-00015 |
// Demangled: density(double*, double*)
Function : _Z7densityPdS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R7, SR_CTAID.Y &wr=0x0 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC R0, c[0x0][0x374] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans8;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD R7, R0, UR6, R7 &req={0} ?WAIT5_END_GROUP;
LEA R9, R7.reuse, R7, 0x3 ?trans1;
IMAD.WIDE.U32 R2, R7, 0x8, R2 &req={2} ?WAIT5_END_GROUP;
STG.E.64 desc[UR4][R2.64], RZ &req={1} ?trans1;
IMAD.WIDE R4, R9, 0x8, R4 &req={3} ?WAIT5_END_GROUP;
LDG.E.64 R6, desc[UR4][R4.64] &wr=0x2 ?trans2;
DADD R6, RZ, R6 &req={2} &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R2.64], R6 &req={0} &rd=0x0 ?trans4;
LDG.E.64 R8, desc[UR4][R4.64+0x8] &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, R6, R8 &req={2} &wr=0x1 ?trans2;
STG.E.64 desc[UR4][R2.64], R8 &req={1} &rd=0x1 ?trans4;
LDG.E.64 R10, desc[UR4][R4.64+0x10] &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, R8, R10 &req={2} &wr=0x2 ?trans2;
STG.E.64 desc[UR4][R2.64], R10 &req={2} &rd=0x2 ?trans4;
LDG.E.64 R12, desc[UR4][R4.64+0x18] &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, R10, R12 &req={3} &wr=0x3 ?trans2;
STG.E.64 desc[UR4][R2.64], R12 &req={3} &rd=0x3 ?trans4;
LDG.E.64 R14, desc[UR4][R4.64+0x20] &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R14, R12, R14 &req={4} &wr=0x4 ?trans2;
STG.E.64 desc[UR4][R2.64], R14 &req={4} ?trans4;
LDG.E.64 R6, desc[UR4][R4.64+0x28] &req={0} &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R6, R14, R6 &req={4} &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R2.64], R6 &req={0} ?trans4;
LDG.E.64 R8, desc[UR4][R4.64+0x30] &req={1} &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, R6, R8 &req={4} &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R2.64], R8 &req={0} ?trans4;
LDG.E.64 R10, desc[UR4][R4.64+0x38] &req={2} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, R8, R10 &req={2} &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R2.64], R10 &req={0} ?trans4;
LDG.E.64 R12, desc[UR4][R4.64+0x40] &req={3} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, R10, R12 &req={2} &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R2.64], R12 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x400;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: density(double*, double*)
_Z7densityPdS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x14
s_load_b128 s[0:3], s[0:1], 0x0
v_mov_b32_e32 v0, 0
v_mov_b32_e32 v2, 0
v_mov_b32_e32 v3, 0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_mov_b32_e32 v1, v0
s_waitcnt lgkmcnt(0)
s_mul_i32 s6, s4, s14
s_add_i32 s4, s6, s15
s_mul_i32 s15, s15, 9
s_ashr_i32 s5, s4, 31
s_mul_i32 s6, s6, 9
s_lshl_b64 s[4:5], s[4:5], 3
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s0, s0, s4
s_addc_u32 s1, s1, s5
s_add_i32 s4, s6, s15
s_mov_b32 s5, -1
global_store_b64 v0, v[0:1], s[0:1]
.LBB1_1:
s_mov_b32 s6, 0
.LBB1_2:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s8, s4, s6
s_ashr_i32 s9, s8, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[8:9], s[8:9], 3
s_add_u32 s8, s2, s8
s_addc_u32 s9, s3, s9
s_add_i32 s6, s6, 1
global_load_b64 v[4:5], v0, s[8:9]
s_cmp_eq_u32 s6, 3
s_waitcnt vmcnt(0)
v_add_f64 v[2:3], v[4:5], v[2:3]
global_store_b64 v0, v[2:3], s[0:1]
s_cbranch_scc0 .LBB1_2
s_add_i32 s5, s5, 1
s_add_i32 s4, s4, 3
s_cmp_eq_u32 s5, 2
s_cbranch_scc0 .LBB1_1
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| density | 1,460 | 701 | stackv2-00000-of-00015 |
// Demangled: equilibrium(double*, double*, double*)
Function : _Z11equilibriumPdS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R19, SR_CTAID.Y &wr=0x0 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC R0, c[0x0][0x374] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x388] &wr=0x2 ?trans8;
LDC.64 R4, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R19, R0, UR6, R19 &req={0} ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, R19.reuse, R19, RZ ?trans1;
IMAD.WIDE.U32 R2, R19, 0x8, R2 &req={2} ?WAIT5_END_GROUP;
LDG.E.64 R10, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
IMAD.WIDE R4, R7, 0x8, R4 &req={3} ?WAIT5_END_GROUP;
LDG.E.64 R6, desc[UR4][R4.64+0x8] &wr=0x3 ?trans4;
LDG.E.64 R8, desc[UR4][R4.64] &wr=0x4 ?trans1;
UMOV.64 UR10, 0x3f9c71c71c71c71c ?trans1;
UMOV.64 UR6, 0x407c1ffffffffffe ?trans1;
UMOV.64 UR8, 0x4062bfffffffffff ?trans1;
LEA R19, R19, R19, 0x3 ?trans1;
DMUL R16, R10, UR10 &req={2} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R6, R6 &req={3} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, -R8, -R6 &req={4} &rd=0x1 &wr=0x2 ?trans2;
MOV.64 R6, 0x403e000000000000 &req={1} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R8, R10 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R12, UR6 &req={2} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R12, R6, 1 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R12, R14, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R8, -UR8, R10 &req={0} &rd=0x0 &wr=0x1 ?trans2;
LDC.64 R10, c[0x0][0x380] &req={0} &wr=0x0 ?trans2;
IMAD.WIDE R10, R19, 0x8, R10 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R12, R12, R16 &req={1} &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R10.64], R12 &req={0} &rd=0x0 ?trans4;
LDG.E.64 R14, desc[UR4][R4.64] &wr=0x2 ?trans4;
LDG.E.64 R16, desc[UR4][R4.64+0x8] &wr=0x2 ?trans4;
LDG.E.64 R18, desc[UR4][R2.64] &wr=0x3 ?trans1;
UMOV.64 UR12, 0x3fbc71c71c71c71c ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, RZ, R16, -R14 &req={2} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R20, R18, UR12 &req={3} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R14, R6, 1 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R18, R14, UR6 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R14, R18, R16 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R8, -UR8, R16 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R16, R16, R20 &req={1} &wr=0x1 ?trans2;
STG.E.64 desc[UR4][R10.64+0x8], R16 &req={1} &rd=0x1 ?trans4;
LDG.E.64 R12, desc[UR4][R4.64] &req={0} &wr=0x2 ?trans4;
LDG.E.64 R14, desc[UR4][R4.64+0x8] &wr=0x2 ?trans4;
LDG.E.64 R18, desc[UR4][R2.64] &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT5_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, -R12, R14 &req={2} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R20, R18, UR10 &req={3} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R6, 1 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R18, R12, UR6 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R18, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R8, -UR8, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R14, R20 &req={0} &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R10.64+0x10], R14 &req={0} &rd=0x0 ?trans4;
LDG.E.64 R12, desc[UR4][R4.64] &wr=0x2 ?trans4;
LDG.E.64 R16, desc[UR4][R4.64+0x8] &req={1} &wr=0x2 ?trans4;
LDG.E.64 R18, desc[UR4][R2.64] &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT5_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, RZ, R12, -R16 &req={2} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R20, R18, UR12 &req={3} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R12, R6, 1 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R18, R12, UR6 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R12, R18, R16 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R8, -UR8, R16 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R16, R16, R20 &req={1} &wr=0x1 ?trans2;
STG.E.64 desc[UR4][R10.64+0x18], R16 &req={1} &rd=0x1 ?trans4;
LDG.E.64 R14, desc[UR4][R4.64+0x8] &req={0} &wr=0x2 ?trans4;
LDG.E.64 R18, desc[UR4][R2.64] &wr=0x3 ?trans4;
LDG.E.64 R12, desc[UR4][R4.64] &wr=0x4 ?trans1;
UMOV.64 UR14, 0x3fdc71c71c71c71c ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, RZ, R14 &req={2} &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R20, R18, UR14 &req={3} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, RZ, R12, R14 &req={4} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R6, 1 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R18, R12, UR6 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R18, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R8, -UR8, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R14, R20 &req={0} &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R10.64+0x20], R14 &req={0} &rd=0x0 ?trans4;
LDG.E.64 R12, desc[UR4][R4.64] &wr=0x2 ?trans4;
LDG.E.64 R16, desc[UR4][R4.64+0x8] &req={1} &wr=0x2 ?trans4;
LDG.E.64 R18, desc[UR4][R2.64] &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT5_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, RZ, R12, R16 &req={2} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R20, R18, UR12 &req={3} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R12, R6, 1 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R18, R12, UR6 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R12, R18, R16 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R8, -UR8, R16 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R16, R16, R20 &req={1} &wr=0x1 ?trans2;
STG.E.64 desc[UR4][R10.64+0x28], R16 &req={1} &rd=0x1 ?trans4;
LDG.E.64 R12, desc[UR4][R4.64] &wr=0x2 ?trans4;
LDG.E.64 R14, desc[UR4][R4.64+0x8] &req={0} &wr=0x2 ?trans4;
LDG.E.64 R18, desc[UR4][R2.64] &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT5_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, R12, -R14 &req={2} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R20, R18, UR10 &req={3} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R6, 1 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R18, R12, UR6 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R18, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R8, -UR8, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R14, R20 &req={0} &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R10.64+0x30], R14 &req={0} &rd=0x0 ?trans4;
LDG.E.64 R12, desc[UR4][R4.64] &wr=0x2 ?trans4;
LDG.E.64 R16, desc[UR4][R4.64+0x8] &req={1} &wr=0x2 ?trans4;
LDG.E.64 R18, desc[UR4][R2.64] &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT5_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, RZ, R16, R12 &req={2} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R20, R18, UR12 &req={3} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R12, R6, 1 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R18, R12, UR6 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R12, R18, R16 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R8, -UR8, R16 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R16, R16, R20 &req={1} &wr=0x1 ?trans2;
STG.E.64 desc[UR4][R10.64+0x38], R16 &req={1} ?trans4;
LDG.E.64 R12, desc[UR4][R4.64] &wr=0x2 ?trans4;
LDG.E.64 R14, desc[UR4][R4.64+0x8] &req={0} &wr=0x2 ?trans4;
LDG.E.64 R2, desc[UR4][R2.64] &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT5_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, R12, R14 &req={2} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R12, R6, 1 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R12, UR6 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R12, R14, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R18, R2, UR10 &req={3} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R8, -UR8, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R6, R6, R18 &req={0} &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R10.64+0x40], R6 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x1760;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: equilibrium(double*, double*, double*)
_Z11equilibriumPdS_S_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x1c
s_load_b64 s[2:3], s[0:1], 0x10
s_mov_b32 s7, 0x4062bfff
s_mov_b32 s6, -1
v_mov_b32_e32 v2, 0
v_dual_mov_b32 v3, 0xbff00000 :: v_dual_mov_b32 v6, 0
s_waitcnt lgkmcnt(0)
s_mul_i32 s14, s4, s14
s_lshl_b32 s4, s15, 1
s_lshl_b32 s5, s14, 1
s_add_i32 s12, s14, s15
s_add_i32 s4, s5, s4
s_mul_i32 s15, s15, 9
s_ashr_i32 s5, s4, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[4:5], s[4:5], 3
s_add_u32 s4, s2, s4
s_addc_u32 s5, s3, s5
s_load_b128 s[0:3], s[0:1], 0x0
s_load_b128 s[8:11], s[4:5], 0x0
s_ashr_i32 s13, s12, 31
s_waitcnt lgkmcnt(0)
v_mul_f64 v[0:1], s[10:11], s[10:11]
s_mov_b32 s10, 0x1c71c71c
s_delay_alu instid0(VALU_DEP_1)
v_fma_f64 v[0:1], s[8:9], s[8:9], v[0:1]
s_lshl_b64 s[8:9], s[12:13], 3
s_mov_b32 s12, 0x3fbc71c7
s_add_u32 s2, s2, s8
s_addc_u32 s3, s3, s9
s_mov_b32 s8, -2
s_mov_b32 s9, 0x407c1fff
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mul_f64 v[0:1], v[0:1], s[6:7]
s_mul_i32 s7, s14, 9
s_add_i32 s7, s7, s15
.LBB3_1:
v_mov_b32_e32 v4, 0
v_mov_b32_e32 v5, 0xbff00000
s_cmp_eq_u32 s6, 0
s_mov_b32 s14, -1
s_cselect_b32 s13, -1, 0
.LBB3_2:
s_clause 0x1
global_load_b128 v[7:10], v6, s[4:5]
global_load_b64 v[11:12], v6, s[2:3]
s_or_b32 s11, s14, s6
s_cmp_eq_u32 s14, 0
s_cselect_b32 s15, -1, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_or_b32 s15, s13, s15
s_and_b32 s15, s15, exec_lo
s_cselect_b32 s15, s12, 0x3f9c71c7
s_cmp_lg_u32 s11, 0
s_cselect_b32 s11, s15, 0x3fdc71c7
s_add_i32 s14, s14, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s16, s14, s7
s_ashr_i32 s17, s16, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[16:17], s[16:17], 3
s_add_u32 s16, s0, s16
s_addc_u32 s17, s1, s17
s_cmp_eq_u32 s14, 2
s_waitcnt vmcnt(1)
v_mul_f64 v[9:10], v[9:10], v[4:5]
v_add_f64 v[4:5], v[4:5], 1.0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[7:8], v[7:8], v[2:3], v[9:10]
v_fma_f64 v[9:10], 0x403e0000, v[7:8], 1.0
v_mul_f64 v[13:14], v[7:8], s[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_fma_f64 v[7:8], v[7:8], v[13:14], v[9:10]
s_waitcnt vmcnt(0)
v_mul_f64 v[9:10], s[10:11], v[11:12]
v_add_f64 v[7:8], v[7:8], -v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_mul_f64 v[7:8], v[9:10], v[7:8]
global_store_b64 v6, v[7:8], s[16:17]
s_cbranch_scc0 .LBB3_2
v_add_f64 v[2:3], v[2:3], 1.0
s_add_i32 s6, s6, 1
s_add_i32 s7, s7, 3
s_cmp_eq_u32 s6, 2
s_cbranch_scc0 .LBB3_1
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| equilibrium | 5,802 | 1,677 | stackv2-00000-of-00015 |
// Demangled: stream(double*, double*)
Function : _Z6streamPdS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R18, SR_CTAID.Y &wr=0x0 ?trans7;
LDC R8, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x3 ?trans8;
LDC R9, c[0x0][0x374] &wr=0x4 ?trans8;
LDC.64 R6, c[0x0][0x388] &wr=0x5 ?trans1;
IADD3 R0, PT, PT, R18, -0x1, RZ &req={0} ?trans1;
UIADD3 UR5, UPT, UPT, UR4, -0x1, URZ &req={3} ?WAIT2_END_GROUP;
IMAD R19, R9.reuse, UR4, R18 &req={4} ?trans2;
ISETP.GE.U32.AND P0, PT, R0, R9, PT ?trans2;
IMAD R2, R9, UR5, R0 ?trans2;
IMAD R19, R19, 0x9, RZ ?trans1;
ISETP.LE.U32.OR P1, PT, R8, UR5, P0 &req={1} ?trans1;
IMAD R11, R2, 0x9, RZ ?WAIT3_END_GROUP;
IADD3 R5, PT, PT, R19, 0x1, RZ ?trans1;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
IMAD.WIDE R10, R11, 0x8, R6 &req={5} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R5, 0x8, R6 ?WAIT3_END_GROUP;
@!P1 LDG.E.64 R12, desc[UR6][R10.64] &req={2} &wr=0x2 ?trans4;
@P1 LDG.E.64 R14, desc[UR6][R4.64+0x38] &wr=0x3 ?trans1;
ISETP.GE.U32.AND P0, PT, R18, R9, PT ?trans1;
@P1 MOV.64 R16, 0x3feccccccccccccd ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P2, PT, R8, UR5, !P0 ?trans1;
IMAD.WIDE R2, R19, 0x8, R2 &req={0} ?trans2;
@P1 DMUL R12, R14, R16 &req={3} &wr=0x2 ?trans3;
STG.E.64 desc[UR6][R2.64], R12 &req={2} &rd=0x0 ?trans7;
@!P2 LDG.E.64 R14, desc[UR6][R4.64+0x30] &wr=0x2 ?trans1;
@!P2 MOV.64 R16, 0x3feccccccccccccd ?WAIT15_END_GROUP;
NOP ?WAIT8_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P2 DMUL R14, R14, R16 &req={2} &rd=0x1 &wr=0x2 ?trans1;
@P2 LDG.E.64 R14, desc[UR6][R10.64+0x50] &wr=0x2 ?trans1;
IADD3 R16, PT, PT, R18, 0x1, RZ &req={1} ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P1, PT, R16, R9, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P2, PT, R8, UR5, !P1 ?trans1;
STG.E.64 desc[UR6][R2.64+0x8], R14 &req={2} &rd=0x1 ?WAIT12_END_GROUP;
@!P2 LDG.E.64 R16, desc[UR6][R4.64+0x28] &wr=0x2 ?trans1;
@!P2 MOV.64 R18, 0x3feccccccccccccd ?WAIT15_END_GROUP;
NOP ?WAIT8_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P2 DMUL R16, R16, R18 &req={2} &wr=0x2 ?trans1;
@P2 LDG.E.64 R16, desc[UR6][R10.64+0xa0] &wr=0x2 ?trans1;
ISETP.GE.U32.AND P2, PT, R0, R9, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P3, PT, R8, UR4, !P2 ?trans1;
STG.E.64 desc[UR6][R2.64+0x10], R16 &req={2} &rd=0x2 ?WAIT12_END_GROUP;
@!P3 LDG.E.64 R12, desc[UR6][R4.64+0x20] &req={0} &wr=0x3 ?trans1;
@!P3 MOV.64 R18, 0x3feccccccccccccd ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P3 DMUL R12, R12, R18 &req={3} &wr=0x0 ?trans1;
@P3 LDG.E.64 R12, desc[UR6][R4.64+-0x38] &wr=0x0 ?trans1;
ISETP.GT.U32.AND P3, PT, R8, UR4, !P0 ?WAIT3_END_GROUP;
STG.E.64 desc[UR6][R2.64+0x18], R12 &req={0} ?trans10;
@!P3 LDG.E.64 R14, desc[UR6][R4.64+0x18] &req={1} &wr=0x3 ?trans1;
@!P3 MOV.64 R10, 0x3feccccccccccccd ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P3 DMUL R14, R14, R10 &req={3} &wr=0x0 ?trans1;
@P3 LDG.E.64 R14, desc[UR6][R4.64+0x18] &wr=0x0 ?trans1;
ISETP.GT.U32.AND P3, PT, R8, UR4, !P1 ?WAIT3_END_GROUP;
STG.E.64 desc[UR6][R2.64+0x20], R14 &req={0} &rd=0x0 ?trans10;
@!P3 LDG.E.64 R10, desc[UR6][R4.64+0x10] &wr=0x3 ?trans1;
@!P3 MOV.64 R16, 0x3feccccccccccccd &req={2} ?WAIT2_END_GROUP;
UIADD3 UR4, UPT, UPT, UR4, 0x1, URZ ?WAIT6_END_GROUP;
ISETP.GT.U32.AND P2, PT, R8, UR4, !P2 ?WAIT15_END_GROUP;
NOP ?WAIT10_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P3 DMUL R10, R10, R16 &req={3} &wr=0x1 ?trans1;
@P3 LDG.E.64 R10, desc[UR6][R4.64+0x68] &wr=0x1 ?trans1;
IMAD R0, R9, UR4, R0 ?trans1;
@!P2 MOV.64 R14, 0x3feccccccccccccd &req={0} ?WAIT3_END_GROUP;
IMAD R9, R0, 0x9, RZ ?trans1;
STG.E.64 desc[UR6][R2.64+0x28], R10 &req={1} &rd=0x0 ?trans4;
@!P2 LDG.E.64 R12, desc[UR6][R4.64+0x8] &wr=0x2 ?trans1;
IMAD.WIDE R6, R9, 0x8, R6 ?trans1;
ISETP.GT.U32.AND P0, PT, R8, UR4, !P0 ?WAIT15_END_GROUP;
NOP ?WAIT6_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P2 DMUL R12, R12, R14 &req={2} &wr=0x1 ?trans1;
@P2 LDG.E.64 R12, desc[UR6][R6.64+0x30] &wr=0x1 ?trans1;
@!P0 MOV.64 R10, 0x3feccccccccccccd &req={0} ?WAIT3_END_GROUP;
STG.E.64 desc[UR6][R2.64+0x30], R12 &req={1} ?trans4;
@!P0 LDG.E.64 R14, desc[UR6][R4.64] &wr=0x2 ?trans1;
ISETP.GT.U32.AND P1, PT, R8, UR4, !P1 ?WAIT15_END_GROUP;
NOP ?WAIT9_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P0 DMUL R14, R14, R10 &req={2} &rd=0x0 &wr=0x1 ?trans1;
@P0 LDG.E.64 R14, desc[UR6][R6.64+0x80] &wr=0x1 ?trans1;
@!P1 MOV.64 R10, 0x3feccccccccccccd &req={0} ?WAIT3_END_GROUP;
STG.E.64 desc[UR6][R2.64+0x38], R14 &req={1} ?trans4;
@!P1 LDG.E.64 R8, desc[UR6][R4.64+-0x8] &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT10_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 DMUL R8, R8, R10 &req={2} &wr=0x0 ?trans1;
@P1 LDG.E.64 R8, desc[UR6][R6.64+0xd0] &wr=0x0 ?trans4;
STG.E.64 desc[UR6][R2.64+0x40], R8 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x670;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: stream(double*, double*)
_Z6streamPdS_:
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x10
s_load_b128 s[4:7], s[0:1], 0x0
s_add_i32 s12, s14, -1
v_mov_b32_e32 v2, 0
s_mov_b32 s8, 0xcccccccd
s_mov_b32 s1, -1
s_mov_b32 s9, 0x3feccccc
s_mul_i32 s10, s15, 9
s_mov_b32 s17, 0
s_waitcnt lgkmcnt(0)
s_mul_i32 s0, s3, 9
s_delay_alu instid0(SALU_CYCLE_1)
s_mul_i32 s11, s0, s14
s_mul_i32 s13, s0, s12
s_add_i32 s12, s0, 3
s_add_i32 s13, s13, -9
s_add_i32 s16, s11, 8
.LBB0_1:
s_add_i32 s0, s1, s14
s_mov_b32 s21, s16
s_cmp_gt_i32 s0, -1
s_mov_b32 s22, s13
s_cselect_b32 s18, -1, 0
s_cmp_lt_i32 s0, 0
v_cndmask_b32_e64 v0, 0, 1, s18
s_cselect_b32 s18, -1, 0
s_cmp_lt_i32 s0, s2
s_mov_b32 s23, s11
s_cselect_b32 s20, -1, 0
v_cmp_ne_u32_e64 s0, 1, v0
s_add_i32 s19, s10, s17
s_xor_b32 s20, s20, -1
s_mov_b32 s24, -1
.LBB0_2:
s_delay_alu instid0(VALU_DEP_1)
s_and_b32 vcc_lo, exec_lo, s0
s_cbranch_vccnz .LBB0_4
s_add_i32 s25, s15, s24
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
s_cmp_lt_i32 s25, 0
s_cselect_b32 s26, -1, 0
s_or_b32 s26, s20, s26
s_cmp_ge_i32 s25, s3
s_mov_b32 s25, -1
s_cselect_b32 s27, -1, 0
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s26, s26, s27
s_branch .LBB0_5
.LBB0_4:
s_mov_b32 s25, 0
s_mov_b32 s26, s18
.LBB0_5:
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 vcc_lo, exec_lo, s26
s_cbranch_vccnz .LBB0_7
s_add_i32 s26, s10, s21
s_mov_b32 s25, 0
s_ashr_i32 s27, s26, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[26:27], s[26:27], 3
s_add_u32 s26, s6, s26
s_addc_u32 s27, s7, s27
global_load_b64 v[0:1], v2, s[26:27]
s_waitcnt vmcnt(0)
v_mul_f64 v[0:1], v[0:1], s[8:9]
.LBB0_7:
s_and_not1_b32 vcc_lo, exec_lo, s25
s_cbranch_vccnz .LBB0_9
s_add_i32 s26, s19, s22
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_ashr_i32 s27, s26, 31
s_lshl_b64 s[26:27], s[26:27], 3
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s26, s6, s26
s_addc_u32 s27, s7, s27
global_load_b64 v[0:1], v2, s[26:27]
.LBB0_9:
s_add_i32 s26, s10, s23
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_ashr_i32 s27, s26, 31
s_lshl_b64 s[26:27], s[26:27], 3
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s26, s4, s26
s_addc_u32 s27, s5, s27
s_add_i32 s24, s24, 1
s_add_i32 s23, s23, 1
s_add_i32 s22, s22, 10
s_add_i32 s21, s21, -1
s_cmp_eq_u32 s24, 2
s_waitcnt vmcnt(0)
global_store_b64 v2, v[0:1], s[26:27]
s_cbranch_scc0 .LBB0_2
s_add_i32 s1, s1, 1
s_add_i32 s11, s11, 3
s_add_i32 s17, s17, s12
s_add_i32 s16, s16, -3
s_cmp_eq_u32 s1, 2
s_cbranch_scc0 .LBB0_1
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| stream | 2,787 | 1,589 | stackv2-00000-of-00015 |
// Demangled: update(double*, double*, double*)
Function : _Z6updatePdS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R8, SR_CTAID.Y &wr=0x1 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans7;
LDC R3, c[0x0][0x374] &wr=0x1 ?trans8;
LDC.64 R12, c[0x0][0x390] &wr=0x3 ?trans8;
LDC.64 R10, c[0x0][0x388] &wr=0x4 ?trans1;
IMAD R8, R3, UR6, R8 &req={1} ?WAIT4_END_GROUP;
IMAD R8, R8, 0x9, RZ ?WAIT4_END_GROUP;
IMAD.WIDE R12, R8, 0x8, R12 &req={3} ?WAIT5_END_GROUP;
LDG.E.64 R26, desc[UR4][R12.64] &req={2} &wr=0x2 ?trans1;
IMAD.WIDE R10, R8, 0x8, R10 &req={4} ?WAIT5_END_GROUP;
LDG.E.64 R2, desc[UR4][R10.64] &wr=0x2 ?trans1;
MUFU.RCP64H R5, 0.8999996185302734375 &wr=0x1 ?trans1;
MOV.64 R14, 0x3feccccccccccccd ?trans2;
HFMA2 R4, -RZ, RZ, 0, 5.9604644775390625e-08 ?WAIT6_END_GROUP;
DFMA R6, R4, -R14, 1 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R6, R6, R6 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R4, R6, R4 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R6, -R14, 1 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R6, R4, R6 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R26, -R2 &req={2} &wr=0x1 ?trans2;
FSETP.GEU.AND P1, PT, |R19|, 6.5827683646048100446e-37, PT &req={1} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R2, R18, R4 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R2, -R14, R18 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R4, R6, R2 &req={1} &wr=0x1 ?trans2;
FFMA R0, RZ, 1.8499999046325683594, R5 &req={1} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ?trans1;
HFMA2 R3, -RZ, RZ, 1.98046875, -19.1875 ?trans1;
MOV R2, 0xcccccccd ?WAIT11_END_GROUP;
@P0 BRA P1, 0x430 &req={0} ?trans5;
MOV R0, 0x410 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x2200 ?trans5;
MOV R4, R16 ?trans1;
MOV R5, R17 ?WAIT7_END_GROUP;
LDC.64 R6, c[0x0][0x380] &wr=0x0 ?trans1;
DADD R4, R26, -R4 &wr=0x1 ?trans1;
IMAD.WIDE R8, R8, 0x8, R6 &req={0} ?WAIT5_END_GROUP;
STG.E.64 desc[UR4][R8.64], R4 &req={1} &rd=0x0 ?trans4;
LDG.E.64 R26, desc[UR4][R12.64+0x8] &wr=0x2 ?trans4;
LDG.E.64 R6, desc[UR4][R10.64+0x8] &wr=0x2 ?trans1;
MUFU.RCP64H R15, 0.8999996185302734375 &wr=0x1 ?trans1;
MOV.64 R16, 0x3feccccccccccccd ?WAIT2_END_GROUP;
MOV R14, 0x1 ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R14, -R16, 1 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R18, R18, R18 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R14, R18, R14 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R26, -R6 &req={2} &wr=0x1 ?trans2;
FSETP.GEU.AND P1, PT, |R19|, 6.5827683646048100446e-37, PT &req={1} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R14, -R16, 1 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R14, R6, R14 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R4, R14, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R4, -R16, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R14, R6, R4 &req={0} &wr=0x0 ?trans2;
FFMA R0, RZ, 1.8499999046325683594, R5 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA P1, 0x800 ?trans5;
MOV R0, 0x7e0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x2200 ?trans5;
MOV R4, R16 ?trans1;
MOV R5, R17 ?WAIT7_END_GROUP;
DADD R4, R26, -R4 &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R8.64+0x8], R4 &req={0} &rd=0x0 ?trans4;
LDG.E.64 R26, desc[UR4][R12.64+0x10] &wr=0x2 ?trans4;
LDG.E.64 R6, desc[UR4][R10.64+0x10] &wr=0x2 ?trans1;
MUFU.RCP64H R15, 0.8999996185302734375 &wr=0x1 ?trans1;
MOV.64 R16, 0x3feccccccccccccd ?WAIT2_END_GROUP;
MOV R14, 0x1 ?WAIT15_END_GROUP;
NOP ?WAIT5_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R14, -R16, 1 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R18, R18, R18 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R14, R20, R14 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R26, -R6 &req={2} &wr=0x1 ?trans2;
FSETP.GEU.AND P1, PT, |R19|, 6.5827683646048100446e-37, PT &req={1} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R20, -R16, 1 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R20, R6, R20 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R4, R20, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R4, -R16, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R20, R6, R4 &req={0} &wr=0x0 ?trans2;
FFMA R0, RZ, 1.8499999046325683594, R5 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA P1, 0xbb0 ?trans5;
MOV R0, 0xb90 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x2200 ?trans5;
MOV R4, R16 ?trans1;
MOV R5, R17 ?WAIT7_END_GROUP;
DADD R4, R26, -R4 &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R8.64+0x10], R4 &req={0} &rd=0x0 ?trans4;
LDG.E.64 R26, desc[UR4][R12.64+0x18] &wr=0x2 ?trans4;
LDG.E.64 R6, desc[UR4][R10.64+0x18] &wr=0x2 ?trans1;
MUFU.RCP64H R15, 0.8999996185302734375 &wr=0x1 ?trans1;
MOV.64 R16, 0x3feccccccccccccd ?WAIT2_END_GROUP;
MOV R14, 0x1 ?WAIT15_END_GROUP;
NOP ?WAIT5_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R14, -R16, 1 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R18, R18, R18 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R14, R20, R14 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R26, -R6 &req={2} &wr=0x1 ?trans2;
FSETP.GEU.AND P1, PT, |R19|, 6.5827683646048100446e-37, PT &req={1} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R20, -R16, 1 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R20, R6, R20 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R4, R20, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R4, -R16, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R20, R6, R4 &req={0} &wr=0x0 ?trans2;
FFMA R0, RZ, 1.8499999046325683594, R5 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA P1, 0xf60 ?trans5;
MOV R0, 0xf40 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x2200 ?trans5;
MOV R4, R16 ?trans1;
MOV R5, R17 ?WAIT7_END_GROUP;
DADD R4, R26, -R4 &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R8.64+0x18], R4 &req={0} &rd=0x0 ?trans4;
LDG.E.64 R26, desc[UR4][R12.64+0x20] &wr=0x2 ?trans4;
LDG.E.64 R6, desc[UR4][R10.64+0x20] &wr=0x2 ?trans1;
MUFU.RCP64H R15, 0.8999996185302734375 &wr=0x1 ?trans1;
MOV.64 R16, 0x3feccccccccccccd ?WAIT2_END_GROUP;
MOV R14, 0x1 ?WAIT15_END_GROUP;
NOP ?WAIT5_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R14, -R16, 1 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R18, R18, R18 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R14, R20, R14 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R26, -R6 &req={2} &wr=0x1 ?trans2;
FSETP.GEU.AND P1, PT, |R19|, 6.5827683646048100446e-37, PT &req={1} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R20, -R16, 1 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R20, R6, R20 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R4, R20, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R4, -R16, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R20, R6, R4 &req={0} &wr=0x0 ?trans2;
FFMA R0, RZ, 1.8499999046325683594, R5 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA P1, 0x1310 ?trans5;
MOV R0, 0x12f0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x2200 ?trans5;
MOV R4, R16 ?trans1;
MOV R5, R17 ?WAIT7_END_GROUP;
DADD R4, R26, -R4 &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R8.64+0x20], R4 &req={0} &rd=0x0 ?trans4;
LDG.E.64 R26, desc[UR4][R12.64+0x28] &wr=0x2 ?trans4;
LDG.E.64 R6, desc[UR4][R10.64+0x28] &wr=0x2 ?trans1;
MUFU.RCP64H R15, 0.8999996185302734375 &wr=0x1 ?trans1;
MOV.64 R16, 0x3feccccccccccccd ?WAIT2_END_GROUP;
MOV R14, 0x1 ?WAIT15_END_GROUP;
NOP ?WAIT5_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R14, -R16, 1 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R18, R18, R18 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R14, R20, R14 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R26, -R6 &req={2} &wr=0x1 ?trans2;
FSETP.GEU.AND P1, PT, |R19|, 6.5827683646048100446e-37, PT &req={1} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R20, -R16, 1 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R20, R6, R20 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R4, R20, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R4, -R16, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R20, R6, R4 &req={0} &wr=0x0 ?trans2;
FFMA R0, RZ, 1.8499999046325683594, R5 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA P1, 0x16c0 ?trans5;
MOV R0, 0x16a0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x2200 ?trans5;
MOV R4, R16 ?trans1;
MOV R5, R17 ?WAIT7_END_GROUP;
DADD R4, R26, -R4 &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R8.64+0x28], R4 &req={0} &rd=0x0 ?trans4;
LDG.E.64 R26, desc[UR4][R12.64+0x30] &wr=0x2 ?trans4;
LDG.E.64 R6, desc[UR4][R10.64+0x30] &wr=0x2 ?trans1;
MUFU.RCP64H R15, 0.8999996185302734375 &wr=0x1 ?trans1;
MOV.64 R16, 0x3feccccccccccccd ?WAIT2_END_GROUP;
MOV R14, 0x1 ?WAIT15_END_GROUP;
NOP ?WAIT5_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R14, -R16, 1 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R18, R18, R18 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R14, R20, R14 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R26, -R6 &req={2} &wr=0x1 ?trans2;
FSETP.GEU.AND P1, PT, |R19|, 6.5827683646048100446e-37, PT &req={1} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R20, -R16, 1 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R20, R6, R20 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R4, R20, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R4, -R16, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R20, R6, R4 &req={0} &wr=0x0 ?trans2;
FFMA R0, RZ, 1.8499999046325683594, R5 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA P1, 0x1a70 ?trans5;
MOV R0, 0x1a50 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x2200 ?trans5;
MOV R4, R16 ?trans1;
MOV R5, R17 ?WAIT7_END_GROUP;
DADD R4, R26, -R4 &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R8.64+0x30], R4 &req={0} &rd=0x0 ?trans4;
LDG.E.64 R26, desc[UR4][R12.64+0x38] &wr=0x2 ?trans4;
LDG.E.64 R6, desc[UR4][R10.64+0x38] &wr=0x2 ?trans1;
MUFU.RCP64H R15, 0.8999996185302734375 &wr=0x1 ?trans1;
MOV.64 R16, 0x3feccccccccccccd ?WAIT2_END_GROUP;
MOV R14, 0x1 ?WAIT15_END_GROUP;
NOP ?WAIT5_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R14, -R16, 1 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R18, R18, R18 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R14, R20, R14 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R26, -R6 &req={2} &wr=0x1 ?trans2;
FSETP.GEU.AND P1, PT, |R19|, 6.5827683646048100446e-37, PT &req={1} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R20, -R16, 1 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R20, R6, R20 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R4, R20, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R4, -R16, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R20, R6, R4 &req={0} &wr=0x0 ?trans2;
FFMA R0, RZ, 1.8499999046325683594, R5 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA P1, 0x1e20 ?trans5;
MOV R0, 0x1e00 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x2200 ?trans5;
MOV R4, R16 ?trans1;
MOV R5, R17 ?WAIT7_END_GROUP;
DADD R4, R26, -R4 &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R8.64+0x38], R4 &req={0} &rd=0x0 ?trans4;
LDG.E.64 R12, desc[UR4][R12.64+0x40] &wr=0x2 ?trans4;
LDG.E.64 R10, desc[UR4][R10.64+0x40] &wr=0x2 ?trans1;
MUFU.RCP64H R7, 0.8999996185302734375 &wr=0x1 ?trans1;
MOV.64 R14, 0x3feccccccccccccd ?WAIT2_END_GROUP;
MOV R6, 0x1 ?WAIT15_END_GROUP;
NOP ?WAIT5_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R6, -R14, 1 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R16, R16, R16 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R6, R16, R6 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R16, -R14, 1 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R12, -R10 &req={2} &wr=0x1 ?trans2;
FSETP.GEU.AND P1, PT, |R19|, 6.5827683646048100446e-37, PT &req={1} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R16, R6, R16 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R4, R16, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R4, -R14, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R16, R6, R4 &req={0} &wr=0x0 ?trans2;
FFMA R0, RZ, 1.8499999046325683594, R5 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA P1, 0x21d0 ?trans5;
MOV R0, 0x21b0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x2200 ?trans5;
MOV R4, R16 ?trans1;
MOV R5, R17 ?WAIT7_END_GROUP;
DADD R4, R12, -R4 &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R8.64+0x40], R4 &req={0} ?trans1;
EXIT ?trans5;
FSETP.GEU.AND P0, PT, |R3|.reuse, 1.469367938527859385e-39, PT ?trans1;
LOP3.LUT R14, R3, 0x800fffff, RZ, 0xc0, !PT ?trans1;
MOV R6, 0x1 ?trans1;
MOV R20, R18 ?trans2;
LOP3.LUT R15, R14, 0x3ff00000, RZ, 0xfc, !PT ?trans1;
MOV R14, R2 ?WAIT7_END_GROUP;
@!P0 DMUL R14, R2, 8.98846567431157953865e+307 &wr=0x0 ?trans2;
MUFU.RCP64H R7, R15 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R6, -R14, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R4, R4, R4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R6, R4, R6 &req={0} &rd=0x0 &wr=0x1 ?trans2;
LOP3.LUT R7, R3, 0x7ff00000, RZ, 0xc0, !PT &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R4, -R14, 1 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R4, R16, R4 &req={0} &rd=0x0 &wr=0x1 ?trans2;
LOP3.LUT R4, R19, 0x7ff00000, RZ, 0xc0, !PT &req={0} ?trans1;
MOV R5, 0x1ca00000 ?WAIT4_END_GROUP;
ISETP.GE.U32.AND P1, PT, R4, R7, PT ?trans1;
MOV R6, R4 ?WAIT4_END_GROUP;
SEL R21, R5, 0x63400000, !P1 ?trans1;
FSETP.GEU.AND P1, PT, |R19|, 1.469367938527859385e-39, PT ?WAIT4_END_GROUP;
LOP3.LUT R21, R21, 0x800fffff, R19, 0xf8, !PT ?WAIT9_END_GROUP;
@P1 BRA 0x2520 &req={1} ?trans5;
LOP3.LUT R23, R3, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
MOV R22, RZ ?WAIT4_END_GROUP;
ISETP.GE.U32.AND P1, PT, R4, R23, PT ?WAIT5_END_GROUP;
SEL R23, R5, 0x63400000, !P1 ?WAIT5_END_GROUP;
LOP3.LUT R23, R23, 0x80000000, R19, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R23, R23, 0x100000, RZ, 0xfc, !PT ?WAIT6_END_GROUP;
DFMA R20, R20, 2, -R22 &wr=0x0 ?trans2;
LOP3.LUT R6, R21, 0x7ff00000, RZ, 0xc0, !PT &req={0} ?WAIT7_END_GROUP;
@!P0 LOP3.LUT R7, R15, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
DMUL R22, R16, R20 &wr=0x0 ?trans1;
IADD3 R28, PT, PT, R6, -0x1, RZ ?trans2;
IADD3 R29, PT, PT, R7, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R28, 0x7feffffe, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R29, 0x7feffffe, P0 ?WAIT15_END_GROUP;
NOP ?WAIT8_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R24, R22, -R14, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R24, R16, R24, R22 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0x2820 &req={1,0} ?trans5;
LOP3.LUT R7, R3, 0x7ff00000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R6, PT, PT, R4.reuse, -R7.reuse, RZ ?trans1;
ISETP.GE.U32.AND P0, PT, R4, R7, PT ?WAIT4_END_GROUP;
VIMNMX.S32 R6, R6, -0x46a00000, !PT ?trans1;
SEL R5, R5, 0x63400000, !P0 ?WAIT4_END_GROUP;
VIMNMX.S32 R6, R6, 0x46a00000, PT ?WAIT5_END_GROUP;
IADD3 R5, PT, PT, -R5, R6, RZ ?trans1;
MOV R6, RZ ?WAIT3_END_GROUP;
IADD3 R7, PT, PT, R5, 0x7fe00000, RZ ?WAIT6_END_GROUP;
DMUL R16, R24, R6 &wr=0x0 ?trans2;
FSETP.GTU.AND P0, PT, |R17|, 1.469367938527859385e-39, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x2960 ?trans5;
DFMA R20, R24, -R14, R20 &wr=0x0 ?trans1;
MOV R18, RZ ?trans1;
FSETP.NEU.AND P0, PT, R21.reuse, RZ, PT &req={0} ?trans1;
LOP3.LUT R6, R21, 0x80000000, R3, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R19, R6, R7, RZ, 0xfc, !PT ?WAIT8_END_GROUP;
@!P0 BRA 0x2960 ?trans5;
IADD3 R15, PT, PT, -R5.reuse, RZ, RZ ?trans1;
MOV R14, RZ ?trans1;
IADD3 R5, PT, PT, -R5, -0x43300000, RZ ?trans1;
DMUL.RP R18, R24, R18 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R16, -R14, R24 &wr=0x0 ?trans2;
FSETP.NEU.AND P0, PT, |R15|, R5, PT &req={0} ?trans1;
LOP3.LUT R5, R19, R6, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
FSEL R16, R18, R16, !P0 ?trans1;
FSEL R17, R5, R17, !P0 ?trans1;
BRA 0x2960 ?trans6;
DSETP.NAN.AND P0, PT, R18, R18, PT &wr=0x0 ?trans2;
@P0 BRA 0x2940 &req={0} ?trans5;
DSETP.NAN.AND P0, PT, R2, R2, PT &wr=0x0 ?trans2;
@P0 BRA 0x2910 &req={0} ?trans5;
ISETP.NE.AND P0, PT, R6, R7, PT ?trans1;
MOV.64 R16, 0xfff8000000000000 ?WAIT12_END_GROUP;
@!P0 BRA 0x2960 ?trans5;
ISETP.NE.AND P0, PT, R6, 0x7ff00000, PT ?trans1;
LOP3.LUT R17, R19, 0x80000000, R3, 0x48, !PT ?WAIT4_END_GROUP;
ISETP.EQ.OR P0, PT, R7, RZ, !P0 ?WAIT13_END_GROUP;
@P0 LOP3.LUT R4, R17, 0x7ff00000, RZ, 0xfc, !PT ?trans1;
@!P0 MOV R16, RZ ?trans1;
@P0 MOV R16, RZ ?WAIT3_END_GROUP;
@P0 MOV R17, R4 ?trans1;
BRA 0x2960 ?trans6;
LOP3.LUT R17, R3, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R16, R2 ?trans1;
BRA 0x2960 ?trans6;
LOP3.LUT R17, R19, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R16, R18 ?WAIT7_END_GROUP;
MOV R4, R0 ?trans1;
MOV R5, 0x0 ?WAIT4_END_GROUP;
RET.REL.NODEC R4 0x0 ?trans5;
BRA 0x2990;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: update(double*, double*, double*)
_Z6updatePdS_S_:
s_clause 0x2
s_load_b32 s8, s[0:1], 0x1c
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
v_mov_b32_e32 v0, 0
s_mul_i32 s15, s15, 9
s_mov_b32 s2, 0xcccccccd
s_mov_b32 s3, 0xbfeccccc
s_mov_b32 s9, -1
s_waitcnt lgkmcnt(0)
s_mul_i32 s8, s14, s8
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_mul_i32 s8, s8, 9
s_add_i32 s8, s8, s15
.LBB4_1:
s_mov_b32 s10, 0
.LBB4_2:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s12, s8, s10
s_ashr_i32 s13, s12, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[12:13], s[12:13], 3
s_add_u32 s14, s0, s12
s_addc_u32 s15, s1, s13
s_add_u32 s16, s6, s12
s_addc_u32 s17, s7, s13
s_clause 0x1
global_load_b64 v[1:2], v0, s[14:15]
global_load_b64 v[3:4], v0, s[16:17]
s_add_u32 s12, s4, s12
s_addc_u32 s13, s5, s13
s_add_i32 s10, s10, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
s_cmp_eq_u32 s10, 3
s_waitcnt vmcnt(0)
v_add_f64 v[3:4], v[1:2], -v[3:4]
v_div_scale_f64 v[5:6], null, s[2:3], s[2:3], v[3:4]
v_div_scale_f64 v[11:12], vcc_lo, v[3:4], s[2:3], v[3:4]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f64_e32 v[7:8], v[5:6]
s_waitcnt_depctr 0xfff
v_fma_f64 v[9:10], -v[5:6], v[7:8], 1.0
v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[9:10], -v[5:6], v[7:8], 1.0
v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[9:10], v[11:12], v[7:8]
v_fma_f64 v[5:6], -v[5:6], v[9:10], v[11:12]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fmas_f64 v[5:6], v[5:6], v[7:8], v[9:10]
v_div_fixup_f64 v[3:4], v[5:6], s[2:3], v[3:4]
s_delay_alu instid0(VALU_DEP_1)
v_add_f64 v[1:2], v[1:2], v[3:4]
global_store_b64 v0, v[1:2], s[12:13]
s_cbranch_scc0 .LBB4_2
s_add_i32 s9, s9, 1
s_add_i32 s8, s8, 3
s_cmp_eq_u32 s9, 2
s_cbranch_scc0 .LBB4_1
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| update | 12,116 | 1,259 | stackv2-00000-of-00015 |
// Demangled: velocity(double*, double*, double*)
Function : _Z8velocityPdS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R10, SR_CTAID.Y &wr=0x1 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans7;
LDC R7, c[0x0][0x374] &wr=0x1 ?trans8;
LDC.64 R4, c[0x0][0x380] &wr=0x3 ?trans8;
LDC.64 R2, c[0x0][0x390] &wr=0x4 ?trans1;
IMAD R10, R7, UR6, R10 &req={1} ?WAIT4_END_GROUP;
IMAD R9, R10.reuse, 0x9, RZ ?trans1;
IADD3 R7, PT, PT, R10, R10, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R4, R7, 0x8, R4 &req={3} ?WAIT5_END_GROUP;
STG.E.64 desc[UR4][R4.64], RZ &req={2} ?trans1;
IMAD.WIDE R2, R9, 0x8, R2 &req={4} ?WAIT3_END_GROUP;
STG.E.64 desc[UR4][R4.64+0x8], RZ ?trans4;
LDG.E.64 R6, desc[UR4][R2.64] &wr=0x2 ?trans2;
DADD R6, RZ, -R6 &req={2} &wr=0x1 ?trans2;
STG.E.64 desc[UR4][R4.64], R6 &req={1} &rd=0x1 ?trans4;
LDG.E.64 R8, desc[UR4][R2.64] &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, RZ, -R8 &req={2} &wr=0x2 ?trans2;
STG.E.64 desc[UR4][R4.64+0x8], R8 &req={2} &rd=0x2 ?trans4;
LDG.E.64 R12, desc[UR4][R2.64+0x8] &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, R6, -R12 &req={3} &wr=0x3 ?trans2;
STG.E.64 desc[UR4][R4.64], R12 &req={3} &rd=0x3 ?trans4;
LDG.E.64 R14, desc[UR4][R2.64+0x8] &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, RZ, R14, R8 &req={4} &wr=0x4 ?trans2;
STG.E.64 desc[UR4][R4.64+0x8], R14 &req={4} &rd=0x4 ?trans4;
LDG.E.64 R16, desc[UR4][R2.64+0x10] &wr=0x5 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R12, -R16 &req={5} &wr=0x5 ?trans2;
STG.E.64 desc[UR4][R4.64], R16 &req={5} &rd=0x5 ?trans4;
LDG.E.64 R6, desc[UR4][R2.64+0x10] &req={1} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R6, R14, R6 &req={2} &wr=0x1 ?trans2;
STG.E.64 desc[UR4][R4.64+0x8], R6 &req={1} &rd=0x1 ?trans4;
LDG.E.64 R8, desc[UR4][R2.64+0x18] &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, RZ, R8, R16 &req={2} &wr=0x2 ?trans2;
STG.E.64 desc[UR4][R4.64], R8 &req={2} &rd=0x2 ?trans4;
LDG.E.64 R12, desc[UR4][R2.64+0x18] &req={3} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, R6, -R12 &req={3} &wr=0x3 ?trans2;
STG.E.64 desc[UR4][R4.64+0x8], R12 &req={3} &rd=0x3 ?trans4;
LDG.E.64 R14, desc[UR4][R2.64+0x20] &req={4} &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, RZ, R14, R8 &req={4} &wr=0x4 ?trans2;
STG.E.64 desc[UR4][R4.64], R14 &req={4} &rd=0x4 ?trans4;
LDG.E.64 R16, desc[UR4][R2.64+0x20] &req={5} &wr=0x5 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, RZ, R16, R12 &req={5} &wr=0x5 ?trans2;
STG.E.64 desc[UR4][R4.64+0x8], R16 &req={5} &rd=0x5 ?trans4;
LDG.E.64 R6, desc[UR4][R2.64+0x28] &req={1} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, RZ, R6, R14 &req={2} &wr=0x1 ?trans2;
STG.E.64 desc[UR4][R4.64], R6 &req={1} ?trans4;
LDG.E.64 R8, desc[UR4][R2.64+0x28] &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, R16, R8 &req={2} &wr=0x1 ?trans2;
STG.E.64 desc[UR4][R4.64+0x8], R8 &req={1} ?trans4;
LDG.E.64 R12, desc[UR4][R2.64+0x30] &req={3} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, R6, R12 &req={2} &wr=0x1 ?trans2;
STG.E.64 desc[UR4][R4.64], R12 &req={1} &rd=0x1 ?trans4;
LDG.E.64 R14, desc[UR4][R2.64+0x30] &req={4} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R14, R8, -R14 &req={2} &wr=0x2 ?trans2;
STG.E.64 desc[UR4][R4.64+0x8], R14 &req={2} &rd=0x2 ?trans4;
LDG.E.64 R16, desc[UR4][R2.64+0x38] &req={5} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R12, R16 &req={3} &wr=0x3 ?trans2;
STG.E.64 desc[UR4][R4.64], R16 &req={3} &rd=0x3 ?trans1;
LDC.64 R12, c[0x0][0x388] &req={1} &wr=0x1 ?trans3;
LDG.E.64 R6, desc[UR4][R2.64+0x38] &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, RZ, R6, R14 &req={4} &wr=0x4 ?trans2;
STG.E.64 desc[UR4][R4.64+0x8], R18 &req={4} &rd=0x4 ?trans4;
LDG.E.64 R6, desc[UR4][R2.64+0x40] &wr=0x5 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R6, R16, R6 &req={5} &wr=0x5 ?trans2;
STG.E.64 desc[UR4][R4.64], R6 &req={5} &rd=0x4 ?trans4;
LDG.E.64 R8, desc[UR4][R2.64+0x40] &wr=0x5 ?trans1;
IMAD.WIDE.U32 R10, R10, 0x8, R12 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT12_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, R18, R8 &req={5} &wr=0x1 ?trans2;
STG.E.64 desc[UR4][R4.64+0x8], R8 &req={1} &rd=0x4 ?trans4;
LDG.E.64 R14, desc[UR4][R10.64] &req={2} &wr=0x2 ?trans1;
MOV R12, 0x1 ?trans1;
UMOV.64 UR6, 0x3fb999999999999a ?trans1;
MUFU.RCP64H R13, R15 &req={2} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT10_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, -R14, R12, 1 &req={3} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R16, R16, R16 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R12, R16, R12 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, -R14, R16, 1 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R16, R2, R16 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R12, R2, UR6 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, -R14, R12, UR6 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R2, R16, R12 &req={1} &wr=0x1 ?trans2;
FFMA R0, RZ, R15, R3 &req={1} ?trans1;
HFMA2 R13, -RZ, RZ, 1.9306640625, -0.0027332305908203125 ?WAIT4_END_GROUP;
FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ?trans1;
MOV R0, 0x9999999a ?WAIT12_END_GROUP;
@P0 BRA 0xab0 &req={4,0} ?trans5;
MOV R18, 0xab0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xe20 ?trans5;
DMUL R2, R6, R2 &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R4.64], R2 &req={0} &rd=0x0 ?trans4;
LDG.E.64 R10, desc[UR4][R10.64] &wr=0x2 ?trans1;
MOV R6, 0x1 ?trans1;
UMOV.64 UR6, 0x3fb999999999999a ?trans1;
MUFU.RCP64H R7, R11 &req={2} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT10_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, -R10, R6, 1 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R14, R14, R14 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R6, R14, R6 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, -R10, R14, 1 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R14, R6, R14 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R6, UR6 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, -R10, R14, UR6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R6, R2, R14 &req={0} &wr=0x0 ?trans2;
FFMA R6, RZ, R11, R3 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R6|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA 0xdf0 ?trans5;
MOV R14, R10 ?trans1;
MOV R15, R11 ?trans1;
MOV R18, 0xdf0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xe20 ?trans5;
DMUL R2, R8, R2 &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R4.64+0x8], R2 &req={0} ?trans1;
EXIT ?trans5;
FSETP.GEU.AND P0, PT, |R15|.reuse, 1.469367938527859385e-39, PT ?trans1;
LOP3.LUT R2, R15.reuse, 0x800fffff, RZ, 0xc0, !PT ?trans1;
HFMA2 R19, -RZ, RZ, 0.0045166015625, 0 ?trans1;
MOV R16, 0x1 ?trans1;
LOP3.LUT R28, R15, 0x7ff00000, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R3, R2, 0x3ff00000, RZ, 0xfc, !PT ?trans1;
MOV R2, R14 ?trans1;
LOP3.LUT R22, R13, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
MOV R12, R0 ?WAIT4_END_GROUP;
@!P0 DMUL R2, R14, 8.98846567431157953865e+307 &wr=0x0 ?trans1;
ISETP.GE.U32.AND P1, PT, R22, R28, PT ?trans1;
MUFU.RCP64H R17, R3 &req={0} &wr=0x0 ?trans1;
MOV R29, R22 ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R16, -R2, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R20, R20, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R16, R20, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R20, -R2, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R20, R16, R20 &req={0} &rd=0x0 &wr=0x1 ?trans2;
SEL R17, R19, 0x63400000, !P1 &req={0} ?trans1;
FSETP.GEU.AND P1, PT, |R13|, 1.469367938527859385e-39, PT ?trans1;
MOV R16, R12 ?WAIT3_END_GROUP;
LOP3.LUT R17, R17, 0x800fffff, R13, 0xf8, !PT ?WAIT9_END_GROUP;
@P1 BRA 0x1150 &req={1} ?trans5;
LOP3.LUT R23, R15, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
MOV R24, RZ ?WAIT4_END_GROUP;
ISETP.GE.U32.AND P1, PT, R22, R23, PT ?WAIT5_END_GROUP;
SEL R23, R19, 0x63400000, !P1 ?WAIT5_END_GROUP;
LOP3.LUT R23, R23, 0x80000000, R13, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R25, R23, 0x100000, RZ, 0xfc, !PT ?WAIT6_END_GROUP;
DFMA R16, R16, 2, -R24 &wr=0x0 ?trans2;
LOP3.LUT R29, R17, 0x7ff00000, RZ, 0xc0, !PT &req={0} ?WAIT7_END_GROUP;
@!P0 LOP3.LUT R28, R3, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
DMUL R24, R20, R16 &wr=0x0 ?trans1;
IADD3 R23, PT, PT, R29, -0x1, RZ ?trans2;
IADD3 R30, PT, PT, R28, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R23, 0x7feffffe, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R30, 0x7feffffe, P0 ?WAIT15_END_GROUP;
NOP ?WAIT8_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R26, R24, -R2, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R20, R26, R24 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0x1440 &req={1,0} ?trans5;
LOP3.LUT R23, R15, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
MOV R24, RZ ?WAIT3_END_GROUP;
IADD3 R12, PT, PT, R22.reuse, -R23.reuse, RZ ?trans1;
ISETP.GE.U32.AND P0, PT, R22, R23, PT ?WAIT4_END_GROUP;
VIMNMX.S32 R12, R12, -0x46a00000, !PT ?trans1;
SEL R19, R19, 0x63400000, !P0 ?WAIT4_END_GROUP;
VIMNMX.S32 R12, R12, 0x46a00000, PT ?WAIT5_END_GROUP;
IADD3 R12, PT, PT, -R19, R12, RZ ?WAIT4_END_GROUP;
IADD3 R25, PT, PT, R12, 0x7fe00000, RZ ?WAIT6_END_GROUP;
DMUL R22, R20, R24 &wr=0x0 ?trans2;
FSETP.GTU.AND P0, PT, |R23|, 1.469367938527859385e-39, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x1580 ?trans5;
DFMA R2, R20, -R2, R16 &wr=0x0 ?trans1;
MOV R24, RZ ?trans1;
FSETP.NEU.AND P0, PT, R3.reuse, RZ, PT &req={0} ?trans1;
LOP3.LUT R15, R3, 0x80000000, R15, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R25, R15, R25, RZ, 0xfc, !PT ?WAIT8_END_GROUP;
@!P0 BRA 0x1580 ?trans5;
IADD3 R3, PT, PT, -R12, RZ, RZ ?trans1;
MOV R2, RZ ?WAIT6_END_GROUP;
DFMA R2, R22, -R2, R20 &wr=0x0 ?trans2;
IADD3 R2, PT, PT, -R12, -0x43300000, RZ &req={0} ?WAIT5_END_GROUP;
FSETP.NEU.AND P0, PT, |R3|, R2, PT ?WAIT15_END_GROUP;
NOP ?WAIT12_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL.RP R20, R20, R24 &wr=0x0 ?trans2;
LOP3.LUT R15, R21, R15, RZ, 0x3c, !PT &req={0} ?trans1;
FSEL R22, R20, R22, !P0 ?WAIT4_END_GROUP;
FSEL R23, R15, R23, !P0 ?trans1;
BRA 0x1580 ?trans6;
DSETP.NAN.AND P0, PT, R12, R12, PT &wr=0x0 ?trans2;
@P0 BRA 0x1560 &req={0} ?trans5;
DSETP.NAN.AND P0, PT, R14, R14, PT &wr=0x0 ?trans2;
@P0 BRA 0x1530 &req={0} ?trans5;
ISETP.NE.AND P0, PT, R29, R28, PT ?trans1;
MOV.64 R22, 0xfff8000000000000 ?WAIT12_END_GROUP;
@!P0 BRA 0x1580 ?trans5;
ISETP.NE.AND P0, PT, R29, 0x7ff00000, PT ?trans1;
LOP3.LUT R23, R13, 0x80000000, R15, 0x48, !PT ?WAIT4_END_GROUP;
ISETP.EQ.OR P0, PT, R28, RZ, !P0 ?WAIT13_END_GROUP;
@P0 LOP3.LUT R2, R23, 0x7ff00000, RZ, 0xfc, !PT ?trans1;
@!P0 MOV R22, RZ ?trans1;
@P0 MOV R22, RZ ?WAIT3_END_GROUP;
@P0 MOV R23, R2 ?trans1;
BRA 0x1580 ?trans6;
LOP3.LUT R23, R15, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R22, R14 ?trans1;
BRA 0x1580 ?trans6;
LOP3.LUT R23, R13, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R22, R12 ?WAIT7_END_GROUP;
MOV R19, 0x0 ?trans1;
MOV R2, R22 ?trans1;
MOV R3, R23 ?trans2;
RET.REL.NODEC R18 0x0 ?trans5;
BRA 0x15c0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: velocity(double*, double*, double*)
_Z8velocityPdS_S_:
s_clause 0x2
s_load_b32 s8, s[0:1], 0x1c
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x10
s_lshl_b32 s0, s15, 1
v_mov_b32_e32 v0, 0
v_mov_b32_e32 v8, 0
v_dual_mov_b32 v9, 0xbff00000 :: v_dual_mov_b32 v6, 0
s_delay_alu instid0(VALU_DEP_3)
v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v1, v0
v_mov_b32_e32 v7, 0
v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v2, v0
v_mov_b32_e32 v3, v0
s_mul_i32 s9, s15, 9
s_waitcnt lgkmcnt(0)
s_mul_i32 s8, s8, s14
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
s_lshl_b32 s1, s8, 1
s_mul_i32 s10, s8, 9
s_add_i32 s0, s1, s0
s_ashr_i32 s1, s0, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[0:1], s[0:1], 3
s_add_u32 s0, s4, s0
s_addc_u32 s1, s5, s1
s_add_i32 s4, s10, s9
s_mov_b32 s5, -1
global_store_b128 v0, v[0:3], s[0:1]
.LBB2_1:
v_mov_b32_e32 v1, 0
v_mov_b32_e32 v2, 0xbff00000
s_mov_b32 s9, 0
.LBB2_2:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s10, s4, s9
s_ashr_i32 s11, s10, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[10:11], s[10:11], 3
s_add_u32 s10, s2, s10
s_addc_u32 s11, s3, s11
s_add_i32 s9, s9, 1
global_load_b64 v[10:11], v0, s[10:11]
s_cmp_eq_u32 s9, 3
s_waitcnt vmcnt(0)
v_fma_f64 v[6:7], v[10:11], v[8:9], v[6:7]
global_store_b64 v0, v[6:7], s[0:1]
global_load_b64 v[10:11], v0, s[10:11]
s_waitcnt vmcnt(0)
v_fma_f64 v[4:5], v[10:11], v[1:2], v[4:5]
v_add_f64 v[1:2], v[1:2], 1.0
global_store_b64 v0, v[4:5], s[0:1] offset:8
s_cbranch_scc0 .LBB2_2
v_add_f64 v[8:9], v[8:9], 1.0
s_add_i32 s5, s5, 1
s_add_i32 s4, s4, 3
s_cmp_eq_u32 s5, 2
s_cbranch_scc0 .LBB2_1
s_add_i32 s2, s8, s15
v_mov_b32_e32 v14, 0
s_ashr_i32 s3, s2, 31
s_mov_b32 s4, 0x9999999a
s_lshl_b64 s[2:3], s[2:3], 3
s_mov_b32 s5, 0x3fb99999
s_add_u32 s2, s6, s2
s_addc_u32 s3, s7, s3
global_load_b64 v[0:1], v14, s[2:3]
s_waitcnt vmcnt(0)
v_div_scale_f64 v[2:3], null, v[0:1], v[0:1], s[4:5]
v_div_scale_f64 v[12:13], vcc_lo, s[4:5], v[0:1], s[4:5]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f64_e32 v[8:9], v[2:3]
s_waitcnt_depctr 0xfff
v_fma_f64 v[10:11], -v[2:3], v[8:9], 1.0
v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], -v[2:3], v[8:9], 1.0
v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[10:11], v[12:13], v[8:9]
v_fma_f64 v[2:3], -v[2:3], v[10:11], v[12:13]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fmas_f64 v[2:3], v[2:3], v[8:9], v[10:11]
v_div_fixup_f64 v[0:1], v[2:3], v[0:1], s[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_mul_f64 v[0:1], v[6:7], v[0:1]
global_store_b64 v14, v[0:1], s[0:1]
global_load_b64 v[0:1], v14, s[2:3]
s_waitcnt vmcnt(0)
v_div_scale_f64 v[2:3], null, v[0:1], v[0:1], s[4:5]
v_rcp_f64_e32 v[6:7], v[2:3]
s_waitcnt_depctr 0xfff
v_fma_f64 v[8:9], -v[2:3], v[6:7], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
v_fma_f64 v[8:9], -v[2:3], v[6:7], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
v_div_scale_f64 v[8:9], vcc_lo, s[4:5], v[0:1], s[4:5]
v_mul_f64 v[10:11], v[8:9], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[2:3], -v[2:3], v[10:11], v[8:9]
v_div_fmas_f64 v[2:3], v[2:3], v[6:7], v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fixup_f64 v[0:1], v[2:3], v[0:1], s[4:5]
v_mul_f64 v[0:1], v[4:5], v[0:1]
global_store_b64 v14, v[0:1], s[0:1] offset:8
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| velocity | 7,258 | 2,339 | stackv2-00000-of-00015 |
// Demangled: band_matvec(int, int, float*, float*, float*)
Function : _Z11band_matveciiPfS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x380] &wr=0x2 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans2;
IMAD R0, R0, 0x40, R3 &req={1} ?trans1;
MOV R3, UR4 &req={2} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, R3, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R7, c[0x0][0x384] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans1;
HFMA2 R2, -RZ, RZ, 0, 0 ?trans1;
ISETP.GE.AND P0, PT, R7, RZ, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0x9e0 &req={1} ?trans5;
IADD3 R2, PT, PT, R7, R7, RZ ?trans1;
LDC.64 R10, c[0x0][0x388] &wr=0x0 ?trans1;
UMOV UR4, URZ ?WAIT3_END_GROUP;
ISETP.GE.AND P2, PT, R2, 0x7, PT ?trans1;
VIMNMX.S32 R5, RZ, R2, !PT ?trans1;
MOV R2, RZ ?WAIT4_END_GROUP;
LOP3.LUT R4, R5.reuse, 0x6, RZ, 0xc0, !PT ?trans2;
LOP3.LUT P1, RZ, R5, 0x2, RZ, 0xc0, !PT ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P0, PT, R4, 0x3, PT ?trans1;
IADD3 R4, PT, PT, R0, -R7, RZ ?trans1;
@!P2 BRA 0x600 ?trans11;
LDC.64 R14, c[0x0][0x390] &wr=0x1 ?trans1;
IADD3 R7, PT, PT, R5, 0x1, RZ ?trans2;
SHF.R.S32.HI R13, RZ, 0x1f, R3 ?trans1;
UMOV UR4, URZ ?trans1;
MOV R12, R3 ?trans1;
MOV R2, RZ ?trans1;
LOP3.LUT R7, R7, 0x7ffffff8, RZ, 0xc0, !PT ?trans1;
MOV R5, R4 ?trans2;
IADD.64 R16, R12, R12 ?WAIT2_END_GROUP;
MOV R6, R0 ?trans1;
IADD3 R8, PT, PT, -R7, RZ, RZ ?trans1;
IADD.64 R14, R14, 0x10 &req={1} ?WAIT8_END_GROUP;
LDC.64 R18, c[0x0][0x388] &wr=0x1 ?trans8;
LDC R3, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD.WIDE R18, R6, 0x4, R18 &req={1} ?WAIT3_END_GROUP;
LEA R28, P2, R16.reuse, R18, 0x2 ?trans2;
LDG.E R7, desc[UR6][R18.64] &wr=0x3 ?trans1;
IMAD.WIDE R26, R3, 0x4, R18 &req={2} ?trans1;
LEA.HI.X R29, R16, R19, R17, 0x2, P2 ?WAIT4_END_GROUP;
LDG.E R31, desc[UR6][R26.64] &rd=0x1 &wr=0x2 ?trans4;
LDG.E R9, desc[UR6][R28.64] &rd=0x4 &wr=0x5 ?trans1;
IADD.64 R20, R12, R16 ?WAIT4_END_GROUP;
IADD.64 R24, R12, R20 ?WAIT3_END_GROUP;
LEA R34, P2, R20, R18, 0x2 ?trans1;
IADD.64 R22, R12, R24 ?WAIT3_END_GROUP;
LEA.HI.X R35, R20, R19.reuse, R21, 0x2, P2 ?trans2;
LEA R20, P3, R22, R18.reuse, 0x2 ?trans2;
LEA R32, P2, R24, R18, 0x2 ?trans2;
LEA.HI.X R21, R22, R19, R23, 0x2, P3 ?trans1;
IADD.64 R22, R12, R22 ?trans2;
LDG.E R35, desc[UR6][R34.64] &wr=0x5 ?trans1;
LEA.HI.X R33, R24, R19, R25, 0x2, P2 ?trans1;
IADD.64 R26, R12, R22 &req={1} ?WAIT2_END_GROUP;
IMAD.WIDE R28, R5, 0x4, R14 &req={4} ?trans1;
LEA R24, P2, R22.reuse, R18.reuse, 0x2 ?trans1;
LDG.E R21, desc[UR6][R20.64] &wr=0x4 ?trans4;
LDG.E R33, desc[UR6][R32.64] &wr=0x4 ?trans1;
LEA.HI.X R25, R22, R19, R23, 0x2, P2 ?trans2;
LEA R18, P2, R26, R18, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R19, R26, R19, R27, 0x2, P2 ?trans1;
LDG.E R25, desc[UR6][R24.64] &wr=0x4 ?trans4;
LDG.E R27, desc[UR6][R18.64] &wr=0x4 ?trans1;
FSETP.NEU.AND P3, PT, R7, RZ, PT &req={3} ?trans1;
FSETP.NEU.AND P6, PT, R31, RZ, PT &req={2} ?trans1;
FSETP.NEU.AND P5, PT, R9, RZ, PT &req={5} ?WAIT11_END_GROUP;
@P3 LDG.E R22, desc[UR6][R28.64+-0x10] &wr=0x2 ?trans4;
@P6 LDG.E R23, desc[UR6][R28.64+-0xc] &wr=0x3 ?trans4;
@P5 LDG.E R26, desc[UR6][R28.64+-0x8] &wr=0x5 ?trans1;
FSETP.NEU.AND P2, PT, R35, RZ, PT ?trans1;
FSETP.NEU.AND P4, PT, R33, RZ, PT &req={4} ?trans1;
@P3 FFMA R2, R7, R22, R2 &req={2} ?trans1;
FSETP.NEU.AND P3, PT, R21, RZ, PT ?WAIT10_END_GROUP;
@P2 LDG.E R7, desc[UR6][R28.64+-0x4] &wr=0x2 ?trans1;
@P6 FFMA R2, R31, R23, R2 &req={3} ?trans1;
FSETP.NEU.AND P6, PT, R25, RZ, PT ?WAIT3_END_GROUP;
@P5 FFMA R2, R9, R26, R2 &req={5} ?trans1;
FSETP.NEU.AND P5, PT, R27, RZ, PT ?trans1;
@P4 LDG.E R9, desc[UR6][R28.64] &wr=0x3 ?trans4;
@P3 LDG.E R18, desc[UR6][R28.64+0x4] &wr=0x4 ?trans4;
@P6 LDG.E R19, desc[UR6][R28.64+0x8] &wr=0x5 ?trans4;
@P5 LDG.E R23, desc[UR6][R28.64+0xc] &wr=0x5 ?trans1;
IADD3 R8, PT, PT, R8, 0x8, RZ ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
IADD3 R5, PT, PT, R5, 0x8, RZ ?trans1;
IMAD R6, R3, 0x8, R6 ?WAIT2_END_GROUP;
@P2 FFMA R2, R35, R7, R2 &req={2} ?trans1;
ISETP.NE.AND P2, PT, R8, RZ, PT ?WAIT3_END_GROUP;
@P4 FFMA R2, R33, R9, R2 &req={3} ?WAIT4_END_GROUP;
@P3 FFMA R2, R21, R18, R2 &req={4} ?WAIT4_END_GROUP;
@P6 FFMA R2, R25, R19, R2 &req={5} ?WAIT4_END_GROUP;
@P5 FFMA R2, R27, R23, R2 ?trans1;
@P2 BRA 0x240 ?trans6;
@!P0 BRA 0x810 ?trans5;
LDC.64 R14, c[0x0][0x388] &wr=0x1 ?trans1;
SHF.R.S32.HI R7, RZ, 0x1f, R3 ?trans1;
IMAD R5, R3, UR4, R0 ?trans1;
MOV R6, R3 ?WAIT5_END_GROUP;
IADD.64 R12, R6, R6 ?WAIT4_END_GROUP;
IADD.64 R16, R6, R12 ?trans2;
IMAD.WIDE R14, R5, 0x4, R14 &req={1} ?WAIT3_END_GROUP;
LEA R8, P0, R12.reuse, R14.reuse, 0x2 ?trans1;
IMAD.WIDE R6, R3, 0x4, R14 ?trans1;
LDG.E R19, desc[UR6][R14.64] &rd=0x1 &wr=0x2 ?trans2;
LEA.HI.X R9, R12, R15.reuse, R13, 0x2, P0 ?trans2;
LEA R12, P0, R16.reuse, R14, 0x2 ?trans1;
LDG.E R21, desc[UR6][R6.64] &wr=0x3 ?trans3;
LEA.HI.X R13, R16, R15, R17, 0x2, P0 ?trans1;
LDG.E R23, desc[UR6][R8.64] &wr=0x4 ?trans1;
LDC.64 R16, c[0x0][0x390] &wr=0x1 ?trans3;
LDG.E R25, desc[UR6][R12.64] &wr=0x5 ?trans1;
IADD3 R5, PT, PT, R4, UR4, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R14, R5, 0x4, R16 &req={1} ?trans1;
FSETP.NEU.AND P0, PT, R19, RZ, PT &req={2} ?trans1;
FSETP.NEU.AND P2, PT, R21, RZ, PT &req={3} ?trans1;
FSETP.NEU.AND P3, PT, R23, RZ, PT &req={4} ?trans1;
FSETP.NEU.AND P4, PT, R25, RZ, PT &req={5} ?WAIT10_END_GROUP;
@P0 LDG.E R5, desc[UR6][R14.64] &wr=0x2 ?trans4;
@P2 LDG.E R7, desc[UR6][R14.64+0x4] &wr=0x3 ?trans4;
@P3 LDG.E R9, desc[UR6][R14.64+0x8] &wr=0x4 ?trans4;
@P4 LDG.E R13, desc[UR6][R14.64+0xc] &wr=0x5 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
@P0 FFMA R2, R19, R5, R2 &req={2} ?WAIT4_END_GROUP;
@P2 FFMA R2, R21, R7, R2 &req={3} ?WAIT4_END_GROUP;
@P3 FFMA R2, R23, R9, R2 &req={4} ?WAIT4_END_GROUP;
@P4 FFMA R2, R25, R13, R2 &req={5} ?WAIT7_END_GROUP;
@!P1 BRA 0x920 ?trans5;
LDC.64 R6, c[0x0][0x388] &wr=0x1 ?trans1;
IMAD R9, R3, UR4, R0 ?WAIT7_END_GROUP;
LDC.64 R12, c[0x0][0x390] &wr=0x2 ?trans1;
IMAD.WIDE R8, R9, 0x4, R6 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R6, R3, 0x4, R8 ?trans2;
LDG.E R9, desc[UR6][R8.64] &wr=0x3 ?trans4;
LDG.E R7, desc[UR6][R6.64] &wr=0x4 ?trans1;
IADD3 R5, PT, PT, R4, UR4, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R12, R5, 0x4, R12 &req={2} ?trans1;
FSETP.NEU.AND P0, PT, R9, RZ, PT &req={3} ?trans1;
FSETP.NEU.AND P1, PT, R7, RZ, PT &req={4} ?WAIT12_END_GROUP;
@P0 LDG.E R5, desc[UR6][R12.64] &wr=0x2 ?trans4;
@P1 LDG.E R15, desc[UR6][R12.64+0x4] &wr=0x3 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x2, URZ ?trans1;
@P0 FFMA R2, R9, R5, R2 &req={2} ?WAIT4_END_GROUP;
@P1 FFMA R2, R7, R15, R2 &req={3} ?WAIT7_END_GROUP;
IMAD R3, R3, UR4, R0 ?WAIT4_END_GROUP;
IMAD.WIDE R10, R3, 0x4, R10 &req={0} ?WAIT6_END_GROUP;
LDG.E R11, desc[UR6][R10.64] &wr=0x2 ?trans1;
IADD3 R3, PT, PT, R4, UR4, RZ ?trans1;
BSSY.RECONVERGENT B0, 0x9e0 ?trans1;
FSETP.NEU.AND P0, PT, R11, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x9d0 ?trans5;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans2;
IMAD.WIDE R4, R3, 0x4, R4 &req={0} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR6][R4.64] &wr=0x2 ?trans2;
FFMA R2, R11, R5, R2 &req={2} ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R4, c[0x0][0x398] &wr=0x0 ?trans2;
IMAD.WIDE R4, R0, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R2 ?trans1;
EXIT ?trans5;
BRA 0xa20;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: band_matvec(int, int, float*, float*, float*)
_Z11band_matveciiPfS_S_:
s_load_b64 s[2:3], s[0:1], 0x0
v_lshl_add_u32 v0, s15, 6, v0
s_mov_b32 s4, exec_lo
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s2, v0
s_cbranch_execz .LBB3_7
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x8
s_load_b64 s[0:1], s[0:1], 0x18
v_mov_b32_e32 v5, 0
s_cmp_lt_i32 s3, 0
s_cbranch_scc1 .LBB3_6
s_lshl_b32 s8, s3, 1
v_subrev_nc_u32_e32 v1, s3, v0
v_mov_b32_e32 v5, 0
v_mov_b32_e32 v3, v0
s_max_i32 s3, s8, 0
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s3, s3, 1
.LBB3_3:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v4, 31, v3
s_mov_b32 s8, exec_lo
v_lshlrev_b64 v[6:7], 2, v[3:4]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v6, vcc_lo, s4, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
global_load_b32 v4, v[6:7], off
s_waitcnt vmcnt(0)
v_cmpx_neq_f32_e32 0, v4
s_cbranch_execz .LBB3_5
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[1:2]
v_add_co_u32 v6, vcc_lo, s6, v6
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
global_load_b32 v2, v[6:7], off
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v5, v4, v2
.LBB3_5:
s_or_b32 exec_lo, exec_lo, s8
v_add_nc_u32_e32 v3, s2, v3
v_add_nc_u32_e32 v1, 1, v1
s_add_i32 s3, s3, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s3, 0
s_cbranch_scc0 .LBB3_3
.LBB3_6:
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v5, off
.LBB3_7:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| band_matvec | 4,315 | 1,048 | stackv2-00000-of-00015 |
// Demangled: k_csr2_mat_vec_mm(int, int*, int*, float*, float*, float*)
Function : _Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R20, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R19, SR_TID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD R20, R20, UR4, R19 &req={1} ?WAIT5_END_GROUP;
SHF.R.S32.HI R3, RZ, 0x1f, R20 ?WAIT4_END_GROUP;
LEA.HI R3, R3, R20, RZ, 0x5 ?WAIT4_END_GROUP;
SHF.R.S32.HI R18, RZ, 0x5, R3 ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R18, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE R2, R18, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R5, desc[UR6][R2.64] &req={1} &wr=0x2 ?trans4;
LDG.E R4, desc[UR6][R2.64+0x4] &wr=0x3 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR4, 0x400 ?trans1;
LOP3.LUT R20, R20, 0x1f, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B0, 0xf00 ?trans1;
HFMA2 R0, -RZ, RZ, 0, 0 ?trans1;
SHF.R.S32.HI R21, RZ, 0x1f, R18 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={0} ?WAIT6_END_GROUP;
LEA R19, R19, UR4, 0x2 ?WAIT5_END_GROUP;
STS [R19], RZ &rd=0x0 ?trans1;
IADD3 R23, PT, PT, R20, R5, RZ &req={2} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R23, R4, PT &req={3} ?WAIT13_END_GROUP;
@P0 BRA 0xef0 &req={0} ?trans5;
IADD3 R3, PT, PT, R23, 0x20, RZ ?trans2;
LOP3.LUT R5, RZ, R5, RZ, 0x33, !PT ?trans1;
BSSY.RECONVERGENT B1, 0x860 ?trans1;
MOV R0, RZ ?trans1;
VIMNMX.S32 R3, R4, R3, !PT ?WAIT5_END_GROUP;
IADD3 R3, PT, PT, -R20, R3, R5 ?WAIT4_END_GROUP;
LEA.HI R24, R3.reuse, 0x1, RZ, 0x1b ?trans1;
ISETP.GE.U32.AND P0, PT, R3, 0x1e0, PT ?WAIT3_END_GROUP;
LOP3.LUT R25, R24, 0xf, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R25, RZ, PT ?WAIT5_END_GROUP;
@!P0 BRA 0x850 ?trans8;
LDC.64 R4, c[0x0][0x398] &wr=0x0 ?trans1;
LOP3.LUT R22, R24, 0xffffff0, RZ, 0xc0, !PT ?trans1;
MOV R0, RZ ?WAIT3_END_GROUP;
IADD3 R22, PT, PT, -R22, RZ, RZ ?WAIT3_END_GROUP;
LDC.64 R6, c[0x0][0x390] &wr=0x1 ?trans1;
IADD.64 R4, R4, 0x400 &req={0} ?trans2;
IADD.64 R6, R6, 0x400 &req={1} ?WAIT8_END_GROUP;
IMAD.WIDE R12, R23.reuse, 0x4, R6 ?trans1;
LDC.64 R8, c[0x0][0x3a0] &wr=0x0 ?trans4;
LDG.E R35, desc[UR6][R12.64+-0x400] &wr=0x0 ?trans4;
LDG.E R15, desc[UR6][R12.64+-0x380] &wr=0x2 ?trans4;
LDG.E R3, desc[UR6][R12.64+-0x300] &wr=0x3 ?trans4;
LDG.E R27, desc[UR6][R12.64+-0x280] &wr=0x4 ?trans1;
IMAD.WIDE R10, R23, 0x4, R4 ?WAIT3_END_GROUP;
LDG.E R33, desc[UR6][R12.64+-0x200] &wr=0x5 ?trans4;
LDG.E R17, desc[UR6][R10.64+-0x400] &wr=0x5 ?trans4;
LDG.E R30, desc[UR6][R10.64+-0x380] &wr=0x5 ?trans4;
LDG.E R31, desc[UR6][R10.64+-0x300] &wr=0x5 ?trans4;
LDG.E R37, desc[UR6][R12.64+-0x180] &wr=0x5 ?trans4;
LDG.E R29, desc[UR6][R12.64+-0x100] &wr=0x5 ?trans4;
LDG.E R16, desc[UR6][R10.64+-0x280] &wr=0x5 ?trans4;
LDG.E R36, desc[UR6][R12.64+0x80] &wr=0x5 ?trans1;
IMAD.WIDE R34, R35, 0x4, R8 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R14, R15, 0x4, R8.reuse &req={2} ?trans1;
LDG.E R28, desc[UR6][R34.64] &wr=0x2 ?trans3;
IMAD.WIDE R2, R3, 0x4, R8.reuse &req={3} ?trans2;
LDG.E R14, desc[UR6][R14.64] &wr=0x3 ?trans4;
LDG.E R2, desc[UR6][R2.64] &wr=0x3 ?trans1;
IMAD.WIDE R26, R27, 0x4, R8 &req={4} ?WAIT3_END_GROUP;
LDG.E R35, desc[UR6][R12.64+-0x80] &wr=0x4 ?trans4;
LDG.E R27, desc[UR6][R26.64] &wr=0x4 ?trans1;
IMAD.WIDE R32, R33, 0x4, R8 &req={5} ?WAIT3_END_GROUP;
LDG.E R34, desc[UR6][R10.64+-0x180] &wr=0x5 ?trans4;
LDG.E R26, desc[UR6][R10.64+-0x80] &wr=0x5 ?trans1;
FFMA R17, R17, R28, R0 &req={2} ?WAIT3_END_GROUP;
LDG.E R0, desc[UR6][R10.64+-0x200] &wr=0x2 ?trans1;
FFMA R14, R30, R14, R17 &req={3} ?WAIT3_END_GROUP;
LDG.E R17, desc[UR6][R32.64] &wr=0x2 ?trans1;
FFMA R31, R31, R2, R14 ?trans1;
IMAD.WIDE R14, R37, 0x4, R8.reuse ?trans2;
LDG.E R2, desc[UR6][R12.64] &wr=0x3 ?trans2;
IMAD.WIDE R28, R29, 0x4, R8.reuse ?trans2;
LDG.E R3, desc[UR6][R14.64] &rd=0x4 &wr=0x5 ?trans4;
LDG.E R30, desc[UR6][R12.64+0x100] &wr=0x5 ?trans4;
LDG.E R28, desc[UR6][R28.64] &wr=0x5 ?trans1;
IMAD.WIDE R14, R35, 0x4, R8 &req={4} ?WAIT3_END_GROUP;
LDG.E R37, desc[UR6][R10.64+-0x100] &wr=0x4 ?trans1;
FFMA R16, R16, R27, R31 ?WAIT3_END_GROUP;
LDG.E R35, desc[UR6][R12.64+0x180] &wr=0x4 ?trans4;
LDG.E R33, desc[UR6][R14.64] &rd=0x0 &wr=0x4 ?trans4;
LDG.E R27, desc[UR6][R12.64+0x200] &wr=0x4 ?trans4;
LDG.E R31, desc[UR6][R12.64+0x280] &wr=0x4 ?trans4;
LDG.E R29, desc[UR6][R12.64+0x300] &wr=0x4 ?trans4;
LDG.E R32, desc[UR6][R12.64+0x380] &rd=0x1 &wr=0x4 ?trans1;
FFMA R0, R0, R17, R16 &req={2} ?trans1;
IMAD.WIDE R16, R2, 0x4, R8 &req={3} ?WAIT4_END_GROUP;
FFMA R34, R34, R3, R0 &req={5} ?trans1;
IMAD.WIDE R2, R36, 0x4, R8.reuse ?trans1;
LDG.E R16, desc[UR6][R16.64] &wr=0x2 ?trans4;
LDG.E R0, desc[UR6][R10.64] &wr=0x2 ?trans1;
IMAD.WIDE R14, R30, 0x4, R8 &req={0} ?WAIT4_END_GROUP;
FFMA R36, R37, R28, R34 &req={4} ?trans2;
LDG.E R15, desc[UR6][R14.64] &wr=0x3 ?trans4;
LDG.E R28, desc[UR6][R2.64] &rd=0x0 &wr=0x4 ?trans1;
IMAD.WIDE R12, R35, 0x4, R8 &req={1} ?WAIT3_END_GROUP;
LDG.E R37, desc[UR6][R10.64+0x80] &wr=0x4 ?trans1;
FFMA R35, R26, R33, R36 ?WAIT3_END_GROUP;
LDG.E R34, desc[UR6][R10.64+0x100] &wr=0x3 ?trans1;
IMAD.WIDE R26, R27, 0x4, R8 ?WAIT3_END_GROUP;
LDG.E R12, desc[UR6][R12.64] &wr=0x5 ?trans1;
IMAD.WIDE R30, R31, 0x4, R8 ?WAIT3_END_GROUP;
LDG.E R17, desc[UR6][R10.64+0x180] &wr=0x5 ?trans1;
IMAD.WIDE R2, R29, 0x4, R8 &req={0} ?WAIT3_END_GROUP;
LDG.E R27, desc[UR6][R26.64] &wr=0x5 ?trans4;
LDG.E R36, desc[UR6][R10.64+0x200] &wr=0x5 ?trans1;
IMAD.WIDE R32, R32, 0x4, R8 ?WAIT3_END_GROUP;
LDG.E R31, desc[UR6][R30.64] &wr=0x5 ?trans4;
LDG.E R14, desc[UR6][R10.64+0x280] &wr=0x5 ?trans4;
LDG.E R2, desc[UR6][R2.64] &wr=0x5 ?trans4;
LDG.E R9, desc[UR6][R10.64+0x300] &wr=0x5 ?trans4;
LDG.E R8, desc[UR6][R10.64+0x380] &wr=0x5 ?trans4;
LDG.E R32, desc[UR6][R32.64] &wr=0x5 ?trans1;
IADD3 R22, PT, PT, R22, 0x10, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R22, RZ, PT ?trans1;
IADD3 R23, PT, PT, R23, 0x200, RZ ?trans1;
FFMA R0, R0, R16, R35 &req={2} ?WAIT4_END_GROUP;
FFMA R37, R37, R28, R0 &req={4} ?WAIT4_END_GROUP;
FFMA R34, R34, R15, R37 &req={3} ?WAIT4_END_GROUP;
FFMA R17, R17, R12, R34 &req={5} ?WAIT4_END_GROUP;
FFMA R17, R36, R27, R17 ?WAIT4_END_GROUP;
FFMA R14, R14, R31, R17 ?WAIT4_END_GROUP;
FFMA R9, R9, R2, R14 ?WAIT4_END_GROUP;
FFMA R0, R8, R32, R9 ?trans1;
@P0 BRA 0x2e0 ?trans6;
BSYNC.RECONVERGENT B1 ?trans5;
BSSY.RECONVERGENT B1, 0xee0 ?trans4;
@!P1 BRA 0xed0 ?trans5;
ISETP.GE.U32.AND P0, PT, R25, 0x8, PT ?trans1;
LOP3.LUT R26, R24, 0x7, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B2, 0xbc0 ?trans4;
ISETP.NE.AND P1, PT, R26, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0xbb0 ?trans6;
LDC.64 R6, c[0x0][0x390] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x3a0] &wr=0x1 ?trans8;
LDC.64 R4, c[0x0][0x398] &wr=0x2 ?trans1;
IMAD.WIDE R6, R23, 0x4, R6 &req={0} ?WAIT5_END_GROUP;
LDG.E R33, desc[UR6][R6.64] &wr=0x1 ?trans4;
LDG.E R15, desc[UR6][R6.64+0x80] &wr=0x3 ?trans4;
LDG.E R13, desc[UR6][R6.64+0x100] &wr=0x4 ?trans4;
LDG.E R35, desc[UR6][R6.64+0x180] &wr=0x5 ?trans4;
LDG.E R9, desc[UR6][R6.64+0x200] &wr=0x5 ?trans4;
LDG.E R11, desc[UR6][R6.64+0x280] &wr=0x5 ?trans4;
LDG.E R29, desc[UR6][R6.64+0x300] &wr=0x5 ?trans4;
LDG.E R17, desc[UR6][R6.64+0x380] &rd=0x5 &wr=0x5 ?trans1;
IMAD.WIDE R4, R23, 0x4, R4 &req={2} ?WAIT5_END_GROUP;
LDG.E R27, desc[UR6][R4.64] &wr=0x2 ?trans4;
LDG.E R16, desc[UR6][R4.64+0x80] &wr=0x2 ?trans4;
LDG.E R22, desc[UR6][R4.64+0x100] &wr=0x2 ?trans4;
LDG.E R28, desc[UR6][R4.64+0x180] &wr=0x2 ?trans4;
LDG.E R30, desc[UR6][R4.64+0x200] &wr=0x2 ?trans1;
IMAD.WIDE R32, R33, 0x4, R2 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R14, R15, 0x4, R2.reuse &req={3} ?trans1;
LDG.E R25, desc[UR6][R32.64] &wr=0x2 ?trans3;
IMAD.WIDE R12, R13, 0x4, R2.reuse &req={4} ?trans1;
LDG.E R31, desc[UR6][R14.64] &rd=0x0 &wr=0x3 ?trans3;
IMAD.WIDE R6, R35, 0x4, R2.reuse &req={5} ?trans2;
LDG.E R13, desc[UR6][R12.64] &wr=0x4 ?trans2;
IMAD.WIDE R8, R9, 0x4, R2 ?WAIT2_END_GROUP;
LDG.E R7, desc[UR6][R6.64] &wr=0x5 ?trans2;
IMAD.WIDE R10, R11, 0x4, R2.reuse ?trans2;
LDG.E R9, desc[UR6][R8.64] &wr=0x5 ?trans2;
IMAD.WIDE R14, R29, 0x4, R2.reuse &req={0} ?trans2;
LDG.E R10, desc[UR6][R10.64] &wr=0x5 ?trans2;
IMAD.WIDE R2, R17, 0x4, R2 ?WAIT2_END_GROUP;
LDG.E R29, desc[UR6][R4.64+0x280] &wr=0x5 ?trans4;
LDG.E R14, desc[UR6][R14.64] &wr=0x5 ?trans4;
LDG.E R17, desc[UR6][R4.64+0x300] &wr=0x5 ?trans4;
LDG.E R33, desc[UR6][R4.64+0x380] &wr=0x5 ?trans4;
LDG.E R2, desc[UR6][R2.64] &wr=0x5 ?trans1;
IADD3 R23, PT, PT, R23, 0x100, RZ ?trans1;
FFMA R25, R27, R25, R0 &req={2} ?WAIT4_END_GROUP;
FFMA R25, R16, R31, R25 &req={3} ?WAIT4_END_GROUP;
FFMA R13, R22, R13, R25 &req={4} ?WAIT4_END_GROUP;
FFMA R7, R28, R7, R13 &req={5} ?WAIT4_END_GROUP;
FFMA R30, R30, R9, R7 ?WAIT4_END_GROUP;
FFMA R10, R29, R10, R30 ?WAIT4_END_GROUP;
FFMA R10, R17, R14, R10 ?WAIT4_END_GROUP;
FFMA R0, R33, R2, R10 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
@!P1 BRA 0xed0 ?trans5;
ISETP.GE.U32.AND P0, PT, R26, 0x4, PT ?trans1;
LOP3.LUT R24, R24, 0x3, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B2, 0xdd0 ?trans4;
ISETP.NE.AND P1, PT, R24, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0xdc0 ?trans6;
LDC.64 R2, c[0x0][0x390] &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x398] &wr=0x1 ?trans1;
IMAD.WIDE R6, R23, 0x4, R2 &req={0} ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x3a0] &wr=0x0 ?trans1;
LDG.E R9, desc[UR6][R6.64] &wr=0x0 ?trans4;
LDG.E R11, desc[UR6][R6.64+0x80] &wr=0x2 ?trans4;
LDG.E R13, desc[UR6][R6.64+0x100] &wr=0x3 ?trans4;
LDG.E R17, desc[UR6][R6.64+0x180] &wr=0x4 ?trans1;
IMAD.WIDE R4, R23, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
LDG.E R15, desc[UR6][R4.64] &wr=0x5 ?trans4;
LDG.E R14, desc[UR6][R4.64+0x80] &wr=0x5 ?trans4;
LDG.E R7, desc[UR6][R4.64+0x100] &wr=0x5 ?trans4;
LDG.E R6, desc[UR6][R4.64+0x180] &wr=0x5 ?trans1;
IMAD.WIDE R8, R9, 0x4, R2 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R10, R11, 0x4, R2.reuse &req={2} ?trans2;
LDG.E R8, desc[UR6][R8.64] &wr=0x5 ?trans2;
IMAD.WIDE R12, R13, 0x4, R2.reuse &req={3} ?trans2;
LDG.E R10, desc[UR6][R10.64] &wr=0x2 ?trans2;
IMAD.WIDE R2, R17, 0x4, R2 &req={4} ?trans2;
LDG.E R12, desc[UR6][R12.64] &wr=0x3 ?trans4;
LDG.E R2, desc[UR6][R2.64] &wr=0x4 ?trans1;
IADD3 R23, PT, PT, R23, 0x80, RZ ?trans1;
FFMA R15, R15, R8, R0 &req={5} ?WAIT4_END_GROUP;
FFMA R14, R14, R10, R15 &req={2} ?WAIT4_END_GROUP;
FFMA R7, R7, R12, R14 &req={3} ?WAIT4_END_GROUP;
FFMA R0, R6, R2, R7 &req={4} ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
@!P1 BRA 0xed0 ?trans5;
LDC.64 R12, c[0x0][0x3a0] &wr=0x0 ?trans1;
IADD3 R24, PT, PT, -R24, RZ, RZ ?WAIT7_END_GROUP;
LDC.64 R8, c[0x0][0x390] &wr=0x1 ?trans8;
LDC.64 R10, c[0x0][0x398] &wr=0x2 ?trans2;
IMAD.WIDE R2, R23, 0x4, R8 &req={1} ?WAIT6_END_GROUP;
LDG.E R3, desc[UR6][R2.64] &wr=0x3 ?trans1;
IMAD.WIDE R4, R23, 0x4, R10 &req={2} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR6][R4.64] &wr=0x2 ?trans1;
IADD3 R24, PT, PT, R24, 0x1, RZ ?trans1;
IMAD.WIDE R6, R3, 0x4, R12 &req={3,0} ?WAIT6_END_GROUP;
LDG.E R6, desc[UR6][R6.64] &wr=0x2 ?trans1;
ISETP.NE.AND P0, PT, R24, RZ, PT ?trans1;
IADD3 R23, PT, PT, R23, 0x20, RZ ?trans1;
FFMA R0, R5, R6, R0 &req={2} ?WAIT11_END_GROUP;
@P0 BRA 0xe20 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
STS [R19], R0 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
ISETP.GT.U32.AND P2, PT, R20.reuse, 0xf, PT ?trans1;
ISETP.GT.U32.AND P3, PT, R20.reuse, 0x7, PT ?trans1;
ISETP.GT.U32.AND P1, PT, R20.reuse, 0x3, PT ?trans1;
ISETP.GT.U32.AND P0, PT, R20, 0x1, PT ?WAIT10_END_GROUP;
@!P2 LDS R3, [R19+0x40] &wr=0x1 ?trans4;
@!P3 LDS R5, [R19+0x20] &wr=0x2 ?trans4;
@!P1 LDS R7, [R19+0x10] &wr=0x3 ?trans4;
@!P0 LDS R9, [R19+0x8] &wr=0x4 ?trans1;
@!P2 FADD R0, R0, R3 &req={1,0} ?WAIT5_END_GROUP;
@!P2 STS [R19], R0 &rd=0x2 ?trans1;
ISETP.NE.AND P2, PT, R20, RZ, PT ?trans1;
@!P3 FADD R0, R0, R5 &req={2} ?WAIT5_END_GROUP;
@!P3 STS [R19], R0 &rd=0x3 ?trans2;
@!P1 FADD R0, R0, R7 &req={3} ?WAIT5_END_GROUP;
@!P1 STS [R19], R0 &rd=0x4 ?trans2;
@!P0 FADD R0, R0, R9 &req={4} ?WAIT5_END_GROUP;
@!P0 STS [R19], R0 &rd=0x0 ?trans1;
@P2 EXIT ?trans5;
LDS R3, [R19+0x4] &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x3a8] &wr=0x2 ?trans2;
LEA R2, P0, R18, UR4, 0x2 &req={2} ?trans1;
FADD R0, R3, R0 &req={1,0} ?WAIT3_END_GROUP;
LEA.HI.X R3, R18, UR5, R21, 0x2, P0 ?trans2;
STS [R19], R0 ?trans4;
STG.E desc[UR6][R2.64], R0 ?trans1;
EXIT ?trans5;
BRA 0x10a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: k_csr2_mat_vec_mm(int, int*, int*, float*, float*, float*)
_Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_:
s_load_b32 s12, s[0:1], 0x3c
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s12, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[5:6], null, s15, s2, v[0:1]
s_load_b32 s2, s[0:1], 0x0
v_ashrrev_i32_e32 v1, 31, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshrrev_b32_e32 v1, 27, v1
v_add_nc_u32_e32 v1, v5, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 5, v1
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, s2, v1
s_and_saveexec_b32 s2, vcc_lo
s_cbranch_execz .LBB1_12
s_load_b256 s[4:11], s[0:1], 0x8
v_ashrrev_i32_e32 v2, 31, v1
s_load_b64 s[2:3], s[0:1], 0x28
v_and_b32_e32 v9, 31, v5
v_lshlrev_b32_e32 v10, 2, v0
s_mov_b32 s1, exec_lo
v_lshlrev_b64 v[1:2], 2, v[1:2]
v_mov_b32_e32 v11, 0
ds_store_b32 v10, v11
s_waitcnt lgkmcnt(0)
v_add_co_u32 v3, vcc_lo, s4, v1
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v2, vcc_lo
global_load_b64 v[3:4], v[3:4], off
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v12, v3, v9
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_lt_i32_e64 v12, v4
s_cbranch_execz .LBB1_5
v_mad_u16 v0, s15, s12, v0
v_ashrrev_i32_e32 v6, 31, v3
s_mov_b32 s4, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_mov_b32 v11, 0 :: v_dual_and_b32 v0, 31, v0
v_add_co_u32 v5, vcc_lo, v3, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
v_lshlrev_b64 v[7:8], 2, v[5:6]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v5, vcc_lo, s8, v7
v_add_co_ci_u32_e32 v6, vcc_lo, s9, v8, vcc_lo
v_add_co_u32 v7, vcc_lo, s6, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
.LBB1_3:
global_load_b32 v13, v[7:8], off
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v14, 31, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[13:14], 2, v[13:14]
v_add_co_u32 v13, vcc_lo, s10, v13
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v14, vcc_lo, s11, v14, vcc_lo
global_load_b32 v0, v[5:6], off
global_load_b32 v3, v[13:14], off
v_add_nc_u32_e32 v12, 32, v12
v_add_co_u32 v5, vcc_lo, 0x80, v5
v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
v_add_co_u32 v7, vcc_lo, 0x80, v7
v_add_co_ci_u32_e32 v8, vcc_lo, 0, v8, vcc_lo
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v11, v0, v3
v_cmp_ge_i32_e64 s0, v12, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_or_b32 s4, s0, s4
s_and_not1_b32 exec_lo, exec_lo, s4
s_cbranch_execnz .LBB1_3
s_or_b32 exec_lo, exec_lo, s4
ds_store_b32 v10, v11
.LBB1_5:
s_or_b32 exec_lo, exec_lo, s1
s_mov_b32 s0, 16
.LBB1_6:
s_mov_b32 s1, exec_lo
v_cmpx_gt_u32_e64 s0, v9
s_cbranch_execz .LBB1_8
v_lshl_add_u32 v0, s0, 2, v10
ds_load_b32 v0, v0
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v11, v0, v11
ds_store_b32 v10, v11
.LBB1_8:
s_or_b32 exec_lo, exec_lo, s1
s_lshr_b32 s1, s0, 1
s_cmp_lt_u32 s0, 2
s_cbranch_scc1 .LBB1_10
s_mov_b32 s0, s1
s_branch .LBB1_6
.LBB1_10:
v_cmp_eq_u32_e32 vcc_lo, 0, v9
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB1_12
v_add_co_u32 v0, vcc_lo, s2, v1
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v2, vcc_lo
global_store_b32 v[0:1], v11, off
.LBB1_12:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| k_csr2_mat_vec_mm | 7,375 | 1,874 | stackv2-00000-of-00015 |
// Demangled: k_csr_mat_vec_mm(int, int*, int*, float*, float*, float*)
Function : _Z16k_csr_mat_vec_mmiPiS_PfS0_S0_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD R0, R0, UR4, R3 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE R2, R0, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R23, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans4;
LDG.E R4, desc[UR4][R2.64+0x4] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0xe00 ?trans1;
HFMA2 R10, -RZ, RZ, 0, 0 ?trans1;
SHF.R.S32.HI R21, RZ, 0x1f, R0 ?trans1;
ISETP.GE.AND P0, PT, R23, R4, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0xdf0 ?trans5;
IADD3 R22, PT, PT, R4.reuse, -R23.reuse, RZ ?trans2;
IADD3 R4, PT, PT, -R4, R23, RZ ?trans1;
BSSY.RECONVERGENT B1, 0x790 ?trans1;
MOV R10, RZ ?trans1;
LOP3.LUT R28, R22, 0xf, RZ, 0xc0, !PT ?trans2;
ISETP.GT.U32.AND P1, PT, R4, -0x10, PT ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R28, RZ, PT ?WAIT10_END_GROUP;
@P1 BRA 0x780 ?trans5;
LDC.64 R2, c[0x0][0x398] &wr=0x0 ?trans1;
LOP3.LUT R20, R22, 0xfffffff0, RZ, 0xc0, !PT ?trans1;
MOV R10, RZ ?WAIT3_END_GROUP;
IADD3 R20, PT, PT, -R20, RZ, RZ ?WAIT3_END_GROUP;
LDC.64 R4, c[0x0][0x390] &wr=0x1 ?trans1;
IADD.64 R2, R2, 0x20 &req={0} ?trans2;
IADD.64 R4, R4, 0x20 &req={1} ?WAIT8_END_GROUP;
IMAD.WIDE R14, R23.reuse, 0x4, R4 ?trans1;
LDC.64 R8, c[0x0][0x3a0] &wr=0x0 ?trans4;
LDG.E R25, desc[UR4][R14.64+-0x20] &wr=0x0 ?trans4;
LDG.E R13, desc[UR4][R14.64+-0x1c] &wr=0x2 ?trans4;
LDG.E R17, desc[UR4][R14.64+-0x18] &wr=0x3 ?trans1;
IMAD.WIDE R6, R23, 0x4, R2 ?WAIT3_END_GROUP;
LDG.E R33, desc[UR4][R14.64+-0x14] &wr=0x4 ?trans4;
LDG.E R35, desc[UR4][R14.64+-0x10] &wr=0x5 ?trans4;
LDG.E R31, desc[UR4][R6.64+-0x20] &wr=0x4 ?trans4;
LDG.E R19, desc[UR4][R14.64+-0xc] &wr=0x5 ?trans4;
LDG.E R29, desc[UR4][R6.64+-0x1c] &wr=0x5 ?trans4;
LDG.E R27, desc[UR4][R6.64+-0x18] &wr=0x5 ?trans4;
LDG.E R34, desc[UR4][R6.64+-0x14] &wr=0x5 ?trans4;
LDG.E R36, desc[UR4][R14.64+-0x4] &wr=0x5 ?trans4;
LDG.E R37, desc[UR4][R14.64+0x4] &wr=0x5 ?trans1;
IMAD.WIDE R24, R25, 0x4, R8 &req={0} ?WAIT5_END_GROUP;
LDG.E R11, desc[UR4][R24.64] &rd=0x5 &wr=0x5 ?trans1;
IMAD.WIDE R12, R13, 0x4, R8 &req={2} ?WAIT4_END_GROUP;
IMAD.WIDE R16, R17, 0x4, R8.reuse &req={3} ?trans2;
LDG.E R12, desc[UR4][R12.64] &wr=0x2 ?trans4;
LDG.E R17, desc[UR4][R16.64] &wr=0x3 ?trans4;
LDG.E R13, desc[UR4][R14.64+-0x8] &wr=0x3 ?trans1;
IMAD.WIDE R32, R33, 0x4, R8 &req={4} ?WAIT3_END_GROUP;
LDG.E R16, desc[UR4][R6.64+-0xc] &wr=0x4 ?trans1;
IMAD.WIDE R24, R35, 0x4, R8 &req={5} ?WAIT3_END_GROUP;
LDG.E R26, desc[UR4][R32.64] &wr=0x5 ?trans4;
LDG.E R35, desc[UR4][R14.64] &wr=0x4 ?trans1;
IMAD.WIDE R18, R19, 0x4, R8 ?WAIT3_END_GROUP;
LDG.E R32, desc[UR4][R14.64+0x8] &wr=0x4 ?trans4;
LDG.E R33, desc[UR4][R14.64+0x10] &wr=0x4 ?trans1;
FFMA R30, R31, R11, R10 ?WAIT3_END_GROUP;
LDG.E R10, desc[UR4][R24.64] &wr=0x4 ?trans4;
LDG.E R11, desc[UR4][R6.64+-0x10] &wr=0x4 ?trans1;
FFMA R29, R29, R12, R30 &req={2} ?WAIT3_END_GROUP;
LDG.E R30, desc[UR4][R18.64] &rd=0x0 &wr=0x2 ?trans4;
LDG.E R31, desc[UR4][R6.64+-0x8] &wr=0x2 ?trans1;
IMAD.WIDE R12, R13, 0x4, R8 &req={3} ?WAIT3_END_GROUP;
LDG.E R25, desc[UR4][R14.64+0x18] &wr=0x3 ?trans1;
FFMA R19, R27, R17, R29 &req={0} ?WAIT3_END_GROUP;
LDG.E R17, desc[UR4][R14.64+0xc] &wr=0x3 ?trans4;
LDG.E R24, desc[UR4][R12.64] &rd=0x0 &wr=0x3 ?trans4;
LDG.E R27, desc[UR4][R14.64+0x14] &wr=0x3 ?trans4;
LDG.E R29, desc[UR4][R14.64+0x1c] &rd=0x4 &wr=0x3 ?trans1;
FFMA R26, R34, R26, R19 &req={5} ?trans1;
IMAD.WIDE R18, R36, 0x4, R8 ?WAIT2_END_GROUP;
LDG.E R36, desc[UR4][R6.64+0x8] &wr=0x5 ?trans2;
IMAD.WIDE R12, R37, 0x4, R8.reuse &req={0} ?trans2;
LDG.E R37, desc[UR4][R6.64] &wr=0x5 ?trans2;
IMAD.WIDE R14, R32, 0x4, R8 &req={4} ?trans2;
LDG.E R32, desc[UR4][R6.64+0x4] &wr=0x4 ?trans4;
LDG.E R15, desc[UR4][R14.64] &wr=0x4 ?trans4;
LDG.E R14, desc[UR4][R6.64+0x14] &wr=0x4 ?trans1;
FFMA R34, R11, R10, R26 ?trans1;
IMAD.WIDE R10, R35, 0x4, R8 ?WAIT2_END_GROUP;
LDG.E R26, desc[UR4][R18.64] &rd=0x0 &wr=0x4 ?trans4;
LDG.E R35, desc[UR4][R6.64+-0x4] &wr=0x4 ?trans1;
FFMA R30, R16, R30, R34 &req={2} ?WAIT3_END_GROUP;
LDG.E R10, desc[UR4][R10.64] &wr=0x5 ?trans4;
LDG.E R34, desc[UR4][R12.64] &rd=0x1 &wr=0x2 ?trans1;
IMAD.WIDE R16, R17, 0x4, R8 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE R18, R33, 0x4, R8 &req={0} ?trans1;
LDG.E R11, desc[UR4][R6.64+0xc] &wr=0x3 ?trans3;
FFMA R24, R31, R24, R30 ?trans1;
LDG.E R16, desc[UR4][R16.64] &wr=0x3 ?trans1;
IMAD.WIDE R30, R27, 0x4, R8 ?WAIT3_END_GROUP;
LDG.E R18, desc[UR4][R18.64] &wr=0x3 ?trans1;
IMAD.WIDE R12, R25, 0x4, R8 &req={1} ?WAIT3_END_GROUP;
LDG.E R27, desc[UR4][R6.64+0x10] &wr=0x3 ?trans1;
IMAD.WIDE R8, R29, 0x4, R8 ?WAIT3_END_GROUP;
LDG.E R31, desc[UR4][R30.64] &wr=0x3 ?trans4;
LDG.E R12, desc[UR4][R12.64] &wr=0x3 ?trans4;
LDG.E R25, desc[UR4][R6.64+0x18] &wr=0x3 ?trans4;
LDG.E R17, desc[UR4][R6.64+0x1c] &wr=0x3 ?trans4;
LDG.E R8, desc[UR4][R8.64] &wr=0x3 ?trans1;
IADD3 R20, PT, PT, R20, 0x10, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R20, RZ, PT ?trans1;
IADD3 R23, PT, PT, R23, 0x10, RZ ?trans1;
FFMA R24, R35, R26, R24 &req={4} ?WAIT4_END_GROUP;
FFMA R37, R37, R10, R24 &req={5} ?WAIT4_END_GROUP;
FFMA R37, R32, R34, R37 &req={2} ?WAIT4_END_GROUP;
FFMA R36, R36, R15, R37 ?WAIT4_END_GROUP;
FFMA R16, R11, R16, R36 &req={3} ?WAIT4_END_GROUP;
FFMA R27, R27, R18, R16 ?WAIT4_END_GROUP;
FFMA R14, R14, R31, R27 ?WAIT4_END_GROUP;
FFMA R12, R25, R12, R14 ?WAIT4_END_GROUP;
FFMA R10, R17, R8, R12 ?trans1;
@P1 BRA 0x210 ?trans6;
BSYNC.RECONVERGENT B1 ?trans5;
@!P0 BRA 0xdf0 ?trans5;
ISETP.GE.U32.AND P0, PT, R28, 0x8, PT ?trans1;
LOP3.LUT R30, R22, 0x7, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B1, 0xae0 ?trans4;
ISETP.NE.AND P1, PT, R30, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0xad0 ?trans6;
LDC.64 R6, c[0x0][0x390] &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x3a0] &wr=0x1 ?trans8;
LDC.64 R2, c[0x0][0x398] &wr=0x2 ?trans1;
IMAD.WIDE R6, R23, 0x4, R6 &req={0} ?WAIT5_END_GROUP;
LDG.E R33, desc[UR4][R6.64] &wr=0x1 ?trans4;
LDG.E R27, desc[UR4][R6.64+0x4] &wr=0x3 ?trans4;
LDG.E R25, desc[UR4][R6.64+0x8] &wr=0x4 ?trans4;
LDG.E R9, desc[UR4][R6.64+0xc] &wr=0x5 ?trans4;
LDG.E R31, desc[UR4][R6.64+0x10] &wr=0x5 ?trans4;
LDG.E R13, desc[UR4][R6.64+0x14] &wr=0x5 ?trans4;
LDG.E R15, desc[UR4][R6.64+0x18] &wr=0x5 ?trans4;
LDG.E R11, desc[UR4][R6.64+0x1c] &rd=0x5 &wr=0x5 ?trans1;
IMAD.WIDE R2, R23, 0x4, R2 &req={2} ?WAIT5_END_GROUP;
LDG.E R19, desc[UR4][R2.64] &wr=0x2 ?trans4;
LDG.E R29, desc[UR4][R2.64+0x4] &wr=0x2 ?trans4;
LDG.E R16, desc[UR4][R2.64+0x8] &wr=0x2 ?trans4;
LDG.E R18, desc[UR4][R2.64+0xc] &wr=0x2 ?trans4;
LDG.E R20, desc[UR4][R2.64+0x10] &wr=0x2 ?trans4;
LDG.E R28, desc[UR4][R2.64+0x14] &wr=0x2 ?trans1;
IMAD.WIDE R32, R33, 0x4, R4 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R26, R27, 0x4, R4.reuse &req={3} ?trans1;
LDG.E R17, desc[UR4][R32.64] &wr=0x2 ?trans3;
IMAD.WIDE R24, R25, 0x4, R4.reuse &req={4} ?trans2;
LDG.E R26, desc[UR4][R26.64] &wr=0x3 ?trans2;
IMAD.WIDE R6, R9, 0x4, R4.reuse &req={5} ?trans2;
LDG.E R25, desc[UR4][R24.64] &wr=0x4 ?trans2;
IMAD.WIDE R8, R31, 0x4, R4 ?WAIT2_END_GROUP;
LDG.E R7, desc[UR4][R6.64] &wr=0x5 ?trans2;
IMAD.WIDE R12, R13, 0x4, R4.reuse ?trans2;
LDG.E R9, desc[UR4][R8.64] &wr=0x5 ?trans2;
IMAD.WIDE R14, R15, 0x4, R4.reuse ?trans2;
LDG.E R12, desc[UR4][R12.64] &wr=0x5 ?trans2;
IMAD.WIDE R4, R11, 0x4, R4 ?WAIT2_END_GROUP;
LDG.E R14, desc[UR4][R14.64] &wr=0x5 ?trans4;
LDG.E R24, desc[UR4][R2.64+0x18] &wr=0x5 ?trans4;
LDG.E R6, desc[UR4][R2.64+0x1c] &wr=0x5 ?trans4;
LDG.E R4, desc[UR4][R4.64] &wr=0x5 ?trans1;
IADD3 R23, PT, PT, R23, 0x8, RZ ?trans1;
FFMA R10, R19, R17, R10 &req={2} ?WAIT4_END_GROUP;
FFMA R29, R29, R26, R10 &req={3} ?WAIT4_END_GROUP;
FFMA R25, R16, R25, R29 &req={4} ?WAIT4_END_GROUP;
FFMA R7, R18, R7, R25 &req={5} ?WAIT4_END_GROUP;
FFMA R7, R20, R9, R7 ?WAIT4_END_GROUP;
FFMA R7, R28, R12, R7 ?WAIT4_END_GROUP;
FFMA R7, R24, R14, R7 ?WAIT4_END_GROUP;
FFMA R10, R6, R4, R7 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
@!P1 BRA 0xdf0 ?trans5;
ISETP.GE.U32.AND P0, PT, R30, 0x4, PT ?trans1;
LOP3.LUT R22, R22, 0x3, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B1, 0xcf0 ?trans4;
ISETP.NE.AND P1, PT, R22, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0xce0 ?trans6;
LDC.64 R2, c[0x0][0x390] &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x3a0] &wr=0x1 ?trans1;
IMAD.WIDE R6, R23, 0x4, R2 &req={0} ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x398] &wr=0x0 ?trans1;
LDG.E R9, desc[UR4][R6.64] &wr=0x1 ?trans4;
LDG.E R13, desc[UR4][R6.64+0x4] &wr=0x2 ?trans4;
LDG.E R15, desc[UR4][R6.64+0x8] &wr=0x3 ?trans4;
LDG.E R17, desc[UR4][R6.64+0xc] &wr=0x4 ?trans1;
IMAD.WIDE R2, R23, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R11, desc[UR4][R2.64] &wr=0x5 ?trans4;
LDG.E R16, desc[UR4][R2.64+0x4] &wr=0x5 ?trans4;
LDG.E R6, desc[UR4][R2.64+0x8] &wr=0x5 ?trans4;
LDG.E R7, desc[UR4][R2.64+0xc] &wr=0x5 ?trans1;
IMAD.WIDE R8, R9, 0x4, R4 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R12, R13, 0x4, R4.reuse &req={2} ?trans2;
LDG.E R8, desc[UR4][R8.64] &wr=0x5 ?trans2;
IMAD.WIDE R14, R15, 0x4, R4.reuse &req={3} ?trans2;
LDG.E R12, desc[UR4][R12.64] &wr=0x2 ?trans2;
IMAD.WIDE R4, R17, 0x4, R4 &req={4} ?trans2;
LDG.E R14, desc[UR4][R14.64] &wr=0x3 ?trans4;
LDG.E R4, desc[UR4][R4.64] &wr=0x4 ?trans1;
IADD3 R23, PT, PT, R23, 0x4, RZ ?trans1;
FFMA R11, R11, R8, R10 &req={5} ?WAIT4_END_GROUP;
FFMA R11, R16, R12, R11 &req={2} ?WAIT4_END_GROUP;
FFMA R6, R6, R14, R11 &req={3} ?WAIT4_END_GROUP;
FFMA R10, R7, R4, R6 &req={4} ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
@!P1 BRA 0xdf0 ?trans5;
LDC.64 R14, c[0x0][0x3a0] &wr=0x0 ?trans1;
IADD3 R22, PT, PT, -R22, RZ, RZ ?WAIT7_END_GROUP;
LDC.64 R8, c[0x0][0x390] &wr=0x1 ?trans8;
LDC.64 R12, c[0x0][0x398] &wr=0x2 ?trans2;
IMAD.WIDE R2, R23, 0x4, R8 &req={1} ?WAIT6_END_GROUP;
LDG.E R3, desc[UR4][R2.64] &wr=0x3 ?trans1;
IMAD.WIDE R4, R23, 0x4, R12 &req={2} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x2 ?trans1;
IADD3 R22, PT, PT, R22, 0x1, RZ ?trans1;
IMAD.WIDE R6, R3, 0x4, R14 &req={3,0} ?WAIT6_END_GROUP;
LDG.E R6, desc[UR4][R6.64] &wr=0x2 ?trans1;
ISETP.NE.AND P0, PT, R22, RZ, PT ?trans1;
IADD3 R23, PT, PT, R23, 0x1, RZ ?trans1;
FFMA R10, R5, R6, R10 &req={2} ?WAIT11_END_GROUP;
@P0 BRA 0xd40 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU.64 UR6, c[0x0][0x3a8] &wr=0x0 ?trans2;
LEA R2, P0, R0, UR6, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R3, R0, UR7, R21, 0x2, P0 ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R10 ?trans1;
EXIT ?trans5;
BRA 0xe50;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: k_csr_mat_vec_mm(int, int*, int*, float*, float*, float*)
_Z16k_csr_mat_vec_mmiPiS_PfS0_S0_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x3c
s_load_b32 s3, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_6
s_load_b256 s[4:11], s[0:1], 0x8
v_ashrrev_i32_e32 v2, 31, v1
s_load_b64 s[2:3], s[0:1], 0x28
v_mov_b32_e32 v8, 0
s_mov_b32 s1, exec_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
global_load_b64 v[2:3], v[2:3], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e64 v2, v3
s_cbranch_execz .LBB0_5
v_ashrrev_i32_e32 v5, 31, v2
v_mov_b32_e32 v4, v2
v_mov_b32_e32 v8, 0
s_mov_b32 s4, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[4:5]
v_add_co_u32 v4, vcc_lo, s8, v6
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s9, v7, vcc_lo
v_add_co_u32 v6, vcc_lo, s6, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
.LBB0_3:
global_load_b32 v9, v[6:7], off
v_add_nc_u32_e32 v2, 1, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_ge_i32_e64 s0, v2, v3
s_or_b32 s4, s0, s4
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v10, 31, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[9:10], 2, v[9:10]
v_add_co_u32 v9, vcc_lo, s10, v9
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v10, vcc_lo, s11, v10, vcc_lo
global_load_b32 v11, v[4:5], off
global_load_b32 v9, v[9:10], off
v_add_co_u32 v4, vcc_lo, v4, 4
v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
v_add_co_u32 v6, vcc_lo, v6, 4
v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v8, v11, v9
s_and_not1_b32 exec_lo, exec_lo, s4
s_cbranch_execnz .LBB0_3
s_or_b32 exec_lo, exec_lo, s4
.LBB0_5:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s1
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_store_b32 v[0:1], v8, off
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| k_csr_mat_vec_mm | 6,385 | 1,274 | stackv2-00000-of-00015 |
// Demangled: k_ell_mat_vec_mm(int, int, int*, float*, float*, float*)
Function : _Z16k_ell_mat_vec_mmiiPiPfS0_S0_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans2;
MOV R2, UR5 &req={2} ?trans1;
IMAD R0, R0, UR4, R3 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, R2, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R9, c[0x0][0x384] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?trans1;
ISETP.GE.AND P0, PT, R9, 0x1, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0xde0 &req={1} ?trans5;
ISETP.GE.U32.AND P1, PT, R9.reuse, 0x8, PT ?trans1;
LOP3.LUT R4, R9, 0x7, RZ, 0xc0, !PT ?trans1;
UMOV UR4, URZ ?trans1;
MOV R3, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R4, RZ, PT ?WAIT7_END_GROUP;
@!P1 BRA 0x7d0 ?trans6;
SHF.R.S32.HI R11, RZ, 0x1f, R2 ?trans1;
UMOV UR4, URZ ?trans1;
MOV R10, R2 ?trans1;
LOP3.LUT R9, R9, 0x7ffffff8, RZ, 0xc0, !PT ?trans1;
MOV R3, RZ ?trans1;
MOV R5, R0 ?trans2;
IADD.64 R12, R10, R10 ?WAIT3_END_GROUP;
IADD3 R9, PT, PT, -R9, RZ, RZ ?WAIT7_END_GROUP;
LDC.64 R16, c[0x0][0x390] &wr=0x0 ?trans8;
LDC R2, c[0x0][0x380] &wr=0x1 ?trans8;
LDC.64 R20, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD.WIDE R16, R5, 0x4, R16 &req={0} ?WAIT5_END_GROUP;
LDG.E R34, desc[UR6][R16.64] &wr=0x3 ?trans1;
IMAD.WIDE R6, R2, 0x4, R16 &req={1} ?WAIT5_END_GROUP;
LDG.E R33, desc[UR6][R6.64] &wr=0x4 ?trans1;
IADD.64 R24, R10, R12 ?trans2;
IMAD.SHL.U32 R26, R12.reuse, 0x4, RZ ?trans1;
SHF.L.U64.HI R27, R12, 0x2, R13 ?trans1;
IMAD.WIDE R20, R5, 0x4, R20 &req={2} ?trans1;
SHF.L.U64.HI R23, R24, 0x2, R25 ?WAIT3_END_GROUP;
IADD.64 R14, R16, R26 ?trans2;
IMAD.SHL.U32 R22, R24, 0x4, RZ ?WAIT4_END_GROUP;
LDG.E R31, desc[UR6][R14.64] &wr=0x2 ?trans1;
IADD.64 R18, R16, R22 ?trans2;
FSETP.NEU.AND P6, PT, R33, RZ, PT &req={4} ?trans1;
FSETP.NEU.AND P1, PT, R34, RZ, PT &req={3} ?WAIT12_END_GROUP;
@P6 IMAD.WIDE R28, R2, 0x4, R20 ?trans1;
@P1 LDG.E R35, desc[UR6][R20.64] &wr=0x3 ?trans1;
@P6 LDC.64 R36, c[0x0][0x398] &wr=0x0 ?trans4;
@P6 LDG.E R28, desc[UR6][R28.64] &wr=0x0 ?trans4;
@P1 LDC.64 R6, c[0x0][0x398] &wr=0x3 ?trans1;
LDG.E R29, desc[UR6][R18.64] &rd=0x1 &wr=0x4 ?trans1;
FSETP.NEU.AND P5, PT, R31, RZ, PT &req={2} ?trans1;
IADD.64 R24, R10, R24 ?WAIT5_END_GROUP;
SHF.L.U64.HI R15, R24.reuse, 0x2, R25 ?trans1;
IMAD.SHL.U32 R14, R24, 0x4, RZ ?trans1;
IADD.64 R24, R10, R24 ?WAIT5_END_GROUP;
@P5 IADD.64 R26, R20, R26 ?trans2;
IMAD.SHL.U32 R18, R24.reuse, 0x4, RZ &req={1} ?trans1;
SHF.L.U64.HI R19, R24, 0x2, R25 ?trans1;
IADD.64 R24, R10, R24 ?trans2;
@P5 LDG.E R30, desc[UR6][R26.64] &rd=0x1 &wr=0x2 ?trans2;
IADD.64 R26, R16, R18 &req={1} ?WAIT6_END_GROUP;
LDG.E R8, desc[UR6][R26.64] &wr=0x5 ?trans1;
@P6 IMAD.WIDE R36, R28, 0x4, R36 &req={0} ?WAIT5_END_GROUP;
@P6 LDG.E R32, desc[UR6][R36.64] &rd=0x0 &wr=0x2 ?trans1;
FSETP.NEU.AND P4, PT, R29, RZ, PT &req={4} ?trans1;
@P1 IMAD.WIDE R6, R35, 0x4, R6 &req={3} ?trans1;
IADD.64 R36, R16, R14 &req={0} ?WAIT5_END_GROUP;
@P1 LDG.E R6, desc[UR6][R6.64] &wr=0x3 ?trans4;
LDG.E R28, desc[UR6][R36.64] &wr=0x4 ?trans2;
@P4 IADD.64 R22, R20, R22 ?WAIT6_END_GROUP;
@P4 LDG.E R7, desc[UR6][R22.64] &rd=0x0 &wr=0x2 ?trans2;
SHF.L.U64.HI R23, R24.reuse, 0x2, R25 &req={0} ?trans1;
IMAD.SHL.U32 R22, R24, 0x4, RZ ?trans1;
IADD.64 R24, R10, R24 ?WAIT4_END_GROUP;
IADD.64 R26, R16, R22 ?WAIT3_END_GROUP;
SHF.L.U64.HI R25, R24.reuse, 0x2, R25 ?trans1;
IMAD.SHL.U32 R24, R24, 0x4, RZ ?WAIT3_END_GROUP;
LDG.E R26, desc[UR6][R26.64] &wr=0x2 ?trans2;
IADD.64 R16, R16, R24 ?WAIT7_END_GROUP;
LDG.E R16, desc[UR6][R16.64] &wr=0x2 ?trans1;
FSETP.NEU.AND P2, PT, R8, RZ, PT &req={5} ?WAIT13_END_GROUP;
@P2 IADD.64 R18, R20, R18 ?WAIT6_END_GROUP;
@P2 LDG.E R17, desc[UR6][R18.64] &rd=0x0 &wr=0x5 ?trans2;
@P5 LDC.64 R18, c[0x0][0x398] &req={0} &wr=0x0 ?trans1;
FSETP.NEU.AND P3, PT, R28, RZ, PT &req={4} ?trans1;
@P1 FFMA R3, R34, R6, R3 &req={3} ?WAIT12_END_GROUP;
@P3 IADD.64 R14, R20, R14 ?WAIT6_END_GROUP;
@P3 LDG.E R6, desc[UR6][R14.64] &rd=0x1 &wr=0x3 ?trans1;
@P6 FFMA R3, R33, R32, R3 &req={2} ?trans1;
@P4 LDC.64 R14, c[0x0][0x398] &req={1} &wr=0x1 ?trans1;
FSETP.NEU.AND P1, PT, R26, RZ, PT ?trans1;
FSETP.NEU.AND P6, PT, R16, RZ, PT ?WAIT12_END_GROUP;
@P1 IADD.64 R22, R20.reuse, R22 ?trans2;
IADD.64 R20, R20, R24 ?WAIT4_END_GROUP;
@P1 LDG.E R32, desc[UR6][R22.64] &wr=0x2 ?trans4;
@P6 LDG.E R27, desc[UR6][R20.64] &rd=0x0 &wr=0x4 ?trans1;
@P4 IMAD.WIDE R24, R7, 0x4, R14 &req={1} ?trans2;
@P6 LDC.64 R14, c[0x0][0x398] &wr=0x4 ?trans4;
@P4 LDG.E R24, desc[UR6][R24.64] &wr=0x4 ?trans1;
@P5 IMAD.WIDE R20, R30, 0x4, R18 &req={0} ?WAIT3_END_GROUP;
@P1 LDC.64 R22, c[0x0][0x398] &wr=0x2 ?trans2;
@P5 LDG.E R30, desc[UR6][R20.64] &rd=0x0 &wr=0x4 ?trans6;
@P3 LDC.64 R18, c[0x0][0x398] &wr=0x3 ?trans8;
@P2 LDC.64 R20, c[0x0][0x398] &req={0} &wr=0x5 ?trans2;
@P2 IMAD.WIDE R20, R17, 0x4, R20 &req={5} ?WAIT5_END_GROUP;
@P2 LDG.E R17, desc[UR6][R20.64] &wr=0x5 ?trans1;
@P3 IMAD.WIDE R6, R6, 0x4, R18 &req={3} ?WAIT6_END_GROUP;
@P3 LDG.E R6, desc[UR6][R6.64] &wr=0x3 ?trans1;
@P1 IMAD.WIDE R22, R32, 0x4, R22 &req={2} ?WAIT4_END_GROUP;
@P6 IMAD.WIDE R14, R27, 0x4, R14 &req={4} ?trans2;
@P1 LDG.E R22, desc[UR6][R22.64] &wr=0x2 ?trans4;
@P6 LDG.E R14, desc[UR6][R14.64] &wr=0x4 ?trans1;
IADD3 R9, PT, PT, R9, 0x8, RZ ?trans1;
@P5 FFMA R3, R31, R30, R3 ?WAIT4_END_GROUP;
@P4 FFMA R3, R29, R24, R3 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
IMAD R5, R2, 0x8, R5 ?trans2;
@P3 FFMA R3, R28, R6, R3 &req={3} ?WAIT4_END_GROUP;
@P2 FFMA R3, R8, R17, R3 &req={5} ?trans1;
ISETP.NE.AND P2, PT, R9, RZ, PT ?WAIT3_END_GROUP;
@P1 FFMA R3, R26, R22, R3 &req={2} ?WAIT4_END_GROUP;
@P6 FFMA R3, R16, R14, R3 &req={4} ?WAIT6_END_GROUP;
@P2 BRA 0x1c0 ?trans5;
@!P0 BRA 0xde0 ?trans5;
LDC R5, c[0x0][0x384] &wr=0x0 ?trans1;
ISETP.GE.U32.AND P0, PT, R4, 0x4, PT ?trans1;
LOP3.LUT R7, R5, 0x3, RZ, 0xc0, !PT &req={0} ?WAIT5_END_GROUP;
ISETP.NE.AND P4, PT, R7, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0xb30 ?trans6;
LDC.64 R22, c[0x0][0x390] &wr=0x0 ?trans1;
SHF.R.S32.HI R9, RZ, 0x1f, R2 ?trans1;
IMAD R19, R2, UR4, R0 ?trans1;
MOV R8, R2 ?WAIT5_END_GROUP;
IADD.64 R12, R8, R8 ?trans2;
LDC.64 R20, c[0x0][0x388] &wr=0x1 ?trans3;
SHF.L.U64.HI R11, R12.reuse, 0x2, R13 ?trans1;
IMAD.SHL.U32 R10, R12, 0x4, RZ ?trans1;
IADD.64 R12, R8, R12 ?trans2;
IMAD.WIDE R22, R19, 0x4, R22 &req={0} ?WAIT5_END_GROUP;
IADD.64 R8, R10, R22.reuse ?trans2;
IMAD.WIDE R16, R2, 0x4, R22 ?trans1;
SHF.L.U64.HI R15, R12.reuse, 0x2, R13 ?trans1;
LDG.E R6, desc[UR6][R22.64] &wr=0x2 ?trans2;
IMAD.SHL.U32 R14, R12, 0x4, RZ ?trans2;
LDG.E R4, desc[UR6][R16.64] &wr=0x3 ?trans4;
LDG.E R8, desc[UR6][R8.64] &wr=0x4 ?trans1;
IADD.64 R12, R14, R22 ?WAIT7_END_GROUP;
LDG.E R12, desc[UR6][R12.64] &wr=0x5 ?trans1;
IMAD.WIDE R20, R19, 0x4, R20 &req={1} ?WAIT5_END_GROUP;
IADD.64 R24, R14, R20 ?trans2;
FSETP.NEU.AND P0, PT, R6, RZ, PT &req={2} ?trans1;
FSETP.NEU.AND P1, PT, R4, RZ, PT &req={3} ?trans1;
FSETP.NEU.AND P2, PT, R8, RZ, PT &req={4} ?WAIT11_END_GROUP;
@P0 LDG.E R29, desc[UR6][R20.64] &wr=0x2 ?trans1;
@P0 LDC.64 R16, c[0x0][0x398] &wr=0x2 ?trans1;
FSETP.NEU.AND P3, PT, R12, RZ, PT &req={5} ?trans1;
@P1 IMAD.WIDE R18, R2, 0x4, R20 ?trans1;
@P2 IADD.64 R22, R10, R20 ?WAIT5_END_GROUP;
@P1 LDG.E R19, desc[UR6][R18.64] &wr=0x3 ?trans1;
@P1 LDC.64 R26, c[0x0][0x398] &wr=0x3 ?trans3;
@P2 LDG.E R23, desc[UR6][R22.64] &wr=0x4 ?trans4;
@P3 LDG.E R25, desc[UR6][R24.64] &wr=0x5 ?trans1;
@P2 LDC.64 R14, c[0x0][0x398] &wr=0x4 ?trans8;
@P3 LDC.64 R10, c[0x0][0x398] &wr=0x5 ?trans1;
@P0 IMAD.WIDE R16, R29, 0x4, R16 &req={2} ?WAIT6_END_GROUP;
@P0 LDG.E R16, desc[UR6][R16.64] &wr=0x2 ?trans1;
@P1 IMAD.WIDE R20, R19, 0x4, R26 &req={3} ?WAIT4_END_GROUP;
@P2 IMAD.WIDE R14, R23, 0x4, R14 &req={4} ?trans2;
@P1 LDG.E R20, desc[UR6][R20.64] &wr=0x3 ?trans2;
@P3 IMAD.WIDE R10, R25, 0x4, R10 &req={5} ?trans2;
@P2 LDG.E R14, desc[UR6][R14.64] &wr=0x4 ?trans4;
@P3 LDG.E R10, desc[UR6][R10.64] &wr=0x5 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
@P0 FFMA R3, R6, R16, R3 &req={2} ?WAIT4_END_GROUP;
@P1 FFMA R3, R4, R20, R3 &req={3} ?WAIT4_END_GROUP;
@P2 FFMA R3, R8, R14, R3 &req={4} ?WAIT4_END_GROUP;
@P3 FFMA R3, R12, R10, R3 &req={5} ?WAIT7_END_GROUP;
@!P4 BRA 0xde0 ?trans5;
ISETP.NE.AND P0, PT, R7, 0x1, PT ?trans1;
LOP3.LUT R5, R5, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P2, PT, R5, 0x1, PT ?WAIT7_END_GROUP;
@!P0 BRA 0xce0 ?trans6;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD R11, R2, UR4, R0 ?WAIT4_END_GROUP;
IMAD.WIDE R12, R11, 0x4, R4 &req={0} ?WAIT3_END_GROUP;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
IMAD.WIDE R6, R2, 0x4, R12 ?trans2;
LDG.E R12, desc[UR6][R12.64] &wr=0x2 ?trans4;
LDG.E R16, desc[UR6][R6.64] &wr=0x3 ?trans1;
IMAD.WIDE R10, R11, 0x4, R4 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R8, R2, 0x4, R10 ?trans1;
FSETP.NEU.AND P0, PT, R12, RZ, PT &req={2} ?trans1;
FSETP.NEU.AND P1, PT, R16, RZ, PT &req={3} ?WAIT12_END_GROUP;
@P0 LDG.E R11, desc[UR6][R10.64] &wr=0x2 ?trans1;
@P0 LDC.64 R4, c[0x0][0x398] &wr=0x2 ?trans3;
@P1 LDG.E R9, desc[UR6][R8.64] &wr=0x3 ?trans5;
@P1 LDC.64 R14, c[0x0][0x398] &wr=0x3 ?trans1;
@P0 IMAD.WIDE R4, R11, 0x4, R4 &req={2} ?WAIT4_END_GROUP;
@P1 IMAD.WIDE R6, R9, 0x4, R14 &req={3} ?trans2;
@P0 LDG.E R4, desc[UR6][R4.64] &wr=0x2 ?trans4;
@P1 LDG.E R6, desc[UR6][R6.64] &wr=0x3 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x2, URZ ?trans1;
@P0 FFMA R3, R12, R4, R3 &req={2} ?WAIT4_END_GROUP;
@P1 FFMA R3, R16, R6, R3 &req={3} ?WAIT7_END_GROUP;
@P2 BRA 0xde0 ?trans5;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD R9, R2, UR4, R0 ?WAIT7_END_GROUP;
LDC.64 R6, c[0x0][0x388] &wr=0x1 ?trans1;
IMAD.WIDE R4, R9, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
LDG.E R2, desc[UR6][R4.64] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0xde0 ?trans1;
IMAD.WIDE R6, R9, 0x4, R6 &req={1} ?trans1;
FSETP.NEU.AND P0, PT, R2, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0xdd0 ?trans5;
LDG.E R7, desc[UR6][R6.64] &wr=0x2 ?trans1;
LDC.64 R4, c[0x0][0x398] &wr=0x2 ?trans2;
IMAD.WIDE R4, R7, 0x4, R4 &req={2} ?WAIT6_END_GROUP;
LDG.E R4, desc[UR6][R4.64] &wr=0x2 ?trans2;
FFMA R3, R2, R4, R3 &req={2} ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R4, c[0x0][0x3a0] &wr=0x0 ?trans2;
IMAD.WIDE R4, R0, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R3 ?trans1;
EXIT ?trans5;
BRA 0xe20;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: k_ell_mat_vec_mm(int, int, int*, float*, float*, float*)
_Z16k_ell_mat_vec_mmiiPiPfS0_S0_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x34
s_load_b64 s[8:9], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB2_7
s_load_b256 s[0:7], s[0:1], 0x8
v_mov_b32_e32 v0, 0
s_cmp_lt_i32 s9, 1
s_cbranch_scc1 .LBB2_6
v_mov_b32_e32 v2, v1
.LBB2_3:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
s_mov_b32 s10, exec_lo
v_lshlrev_b64 v[3:4], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v5, vcc_lo, s2, v3
v_add_co_ci_u32_e32 v6, vcc_lo, s3, v4, vcc_lo
global_load_b32 v5, v[5:6], off
s_waitcnt vmcnt(0)
v_cmpx_neq_f32_e32 0, v5
s_cbranch_execz .LBB2_5
v_add_co_u32 v3, vcc_lo, s0, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
global_load_b32 v3, v[3:4], off
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 2, v[3:4]
v_add_co_u32 v3, vcc_lo, s4, v3
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
global_load_b32 v3, v[3:4], off
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v0, v5, v3
.LBB2_5:
s_or_b32 exec_lo, exec_lo, s10
v_add_nc_u32_e32 v2, s8, v2
s_add_i32 s9, s9, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s9, 0
s_cbranch_scc0 .LBB2_3
.LBB2_6:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v1, vcc_lo, s6, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
global_store_b32 v[1:2], v0, off
.LBB2_7:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| k_ell_mat_vec_mm | 6,213 | 1,057 | stackv2-00000-of-00015 |
// Demangled: conv(float*, float*, float*)
Function : _Z4convPfS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R3, SR_TID.Y &wr=0x0 ?trans7;
S2UR UR4, SR_CTAID.Y &wr=0x0 ?trans1;
S2R R11, SR_TID.X &wr=0x1 ?trans7;
LDC R0, c[0x0][0x364] &wr=0x0 ?trans8;
S2UR UR5, SR_CTAID.X &wr=0x1 ?trans8;
LDC R10, c[0x0][0x360] &wr=0x1 ?trans1;
IMAD R0, R0, UR4, R3 &req={0} ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD.HI.U32 R8, R0, -0x793e68c5, RZ ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x388] &wr=0x2 ?trans1;
SHF.R.U32.HI R9, RZ, 0x13, R8 ?WAIT5_END_GROUP;
IMAD R13, R9.reuse, 0x1b, RZ ?trans2;
LDC.64 R6, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD R8, R10, UR5, R11 &req={1} ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD R11, R9, -0xf32a4, R0 ?WAIT4_END_GROUP;
IMAD R8, R11, 0x3e6, R8 ?WAIT4_END_GROUP;
IMAD R9, R9, 0xf32a4, R8 ?trans1;
IADD3 R11, PT, PT, R8, R11, R11 ?WAIT3_END_GROUP;
IMAD.WIDE R4, R9, 0x4, R4 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R13, 0x4, R2 &req={2} ?trans1;
LDG.E R0, desc[UR4][R4.64] &req={1} &wr=0x2 ?trans3;
IMAD.WIDE R6, R11, 0x4, R6 &req={3} ?trans1;
LDG.E R8, desc[UR4][R2.64] &wr=0x2 ?trans4;
LDG.E R9, desc[UR4][R6.64] &wr=0x2 ?trans2;
FFMA R9, R9, R8, R0 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R9 &rd=0x0 ?trans4;
LDG.E R0, desc[UR4][R6.64+0x4] &wr=0x2 ?trans4;
LDG.E R8, desc[UR4][R2.64+0x4] &wr=0x2 ?trans2;
FFMA R11, R0, R8, R9 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R11 &rd=0x1 ?trans4;
LDG.E R0, desc[UR4][R6.64+0x8] &wr=0x2 ?trans4;
LDG.E R8, desc[UR4][R2.64+0x8] &wr=0x2 ?trans2;
FFMA R13, R0, R8, R11 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R13 &rd=0x2 ?trans4;
LDG.E R0, desc[UR4][R6.64+0xfa0] &wr=0x0 ?trans4;
LDG.E R8, desc[UR4][R2.64+0xc] &wr=0x0 ?trans2;
FFMA R9, R0, R8, R13 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R9 &rd=0x0 ?trans4;
LDG.E R0, desc[UR4][R6.64+0xfa4] &wr=0x1 ?trans4;
LDG.E R8, desc[UR4][R2.64+0x10] &wr=0x1 ?trans2;
FFMA R11, R0, R8, R9 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R11 &rd=0x1 ?trans4;
LDG.E R0, desc[UR4][R6.64+0xfa8] &wr=0x2 ?trans4;
LDG.E R8, desc[UR4][R2.64+0x14] &wr=0x2 ?trans2;
FFMA R13, R0, R8, R11 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R13 &rd=0x2 ?trans4;
LDG.E R0, desc[UR4][R6.64+0x1f40] &wr=0x0 ?trans4;
LDG.E R8, desc[UR4][R2.64+0x18] &wr=0x0 ?trans2;
FFMA R9, R0, R8, R13 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R9 &rd=0x0 ?trans4;
LDG.E R0, desc[UR4][R6.64+0x1f44] &wr=0x1 ?trans4;
LDG.E R8, desc[UR4][R2.64+0x1c] &wr=0x1 ?trans2;
FFMA R11, R0, R8, R9 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R11 &rd=0x1 ?trans4;
LDG.E R0, desc[UR4][R6.64+0x1f48] &wr=0x2 ?trans4;
LDG.E R8, desc[UR4][R2.64+0x20] &wr=0x2 ?trans2;
FFMA R13, R0, R8, R11 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R13 &rd=0x2 ?trans4;
LDG.E R0, desc[UR4][R6.64+0x3d0900] &wr=0x0 ?trans4;
LDG.E R8, desc[UR4][R2.64+0x24] &wr=0x0 ?trans2;
FFMA R9, R0, R8, R13 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R9 &rd=0x0 ?trans4;
LDG.E R0, desc[UR4][R6.64+0x3d0904] &wr=0x1 ?trans4;
LDG.E R8, desc[UR4][R2.64+0x28] &wr=0x1 ?trans2;
FFMA R11, R0, R8, R9 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R11 &rd=0x1 ?trans4;
LDG.E R0, desc[UR4][R6.64+0x3d0908] &wr=0x2 ?trans4;
LDG.E R8, desc[UR4][R2.64+0x2c] &wr=0x2 ?trans2;
FFMA R13, R0, R8, R11 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R13 &rd=0x2 ?trans4;
LDG.E R0, desc[UR4][R6.64+0x3d18a0] &wr=0x0 ?trans4;
LDG.E R8, desc[UR4][R2.64+0x30] &wr=0x0 ?trans2;
FFMA R9, R0, R8, R13 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R9 &rd=0x0 ?trans4;
LDG.E R0, desc[UR4][R6.64+0x3d18a4] &wr=0x1 ?trans4;
LDG.E R8, desc[UR4][R2.64+0x34] &wr=0x1 ?trans2;
FFMA R11, R0, R8, R9 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R11 &rd=0x1 ?trans4;
LDG.E R0, desc[UR4][R6.64+0x3d18a8] &wr=0x2 ?trans4;
LDG.E R8, desc[UR4][R2.64+0x38] &wr=0x2 ?trans2;
FFMA R13, R0, R8, R11 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R13 &rd=0x2 ?trans4;
LDG.E R0, desc[UR4][R6.64+0x3d2840] &wr=0x0 ?trans4;
LDG.E R8, desc[UR4][R2.64+0x3c] &wr=0x0 ?trans2;
FFMA R9, R0, R8, R13 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R9 &rd=0x0 ?trans4;
LDG.E R0, desc[UR4][R6.64+0x3d2844] &wr=0x1 ?trans4;
LDG.E R8, desc[UR4][R2.64+0x40] &wr=0x1 ?trans2;
FFMA R11, R0, R8, R9 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R11 &rd=0x1 ?trans4;
LDG.E R0, desc[UR4][R6.64+0x3d2848] &wr=0x2 ?trans4;
LDG.E R8, desc[UR4][R2.64+0x44] &wr=0x2 ?trans2;
FFMA R13, R0, R8, R11 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R13 &rd=0x2 ?trans4;
LDG.E R0, desc[UR4][R6.64+0x7a1200] &wr=0x0 ?trans4;
LDG.E R8, desc[UR4][R2.64+0x48] &wr=0x0 ?trans2;
FFMA R9, R0, R8, R13 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R9 &rd=0x0 ?trans4;
LDG.E R0, desc[UR4][R6.64+0x7a1204] &wr=0x1 ?trans4;
LDG.E R8, desc[UR4][R2.64+0x4c] &wr=0x1 ?trans2;
FFMA R11, R0, R8, R9 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R11 &rd=0x1 ?trans4;
LDG.E R0, desc[UR4][R6.64+0x7a1208] &wr=0x2 ?trans4;
LDG.E R8, desc[UR4][R2.64+0x50] &wr=0x2 ?trans2;
FFMA R13, R0, R8, R11 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R13 &rd=0x2 ?trans4;
LDG.E R0, desc[UR4][R6.64+0x7a21a0] &wr=0x0 ?trans4;
LDG.E R8, desc[UR4][R2.64+0x54] &wr=0x0 ?trans2;
FFMA R9, R0, R8, R13 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R9 &rd=0x0 ?trans4;
LDG.E R0, desc[UR4][R6.64+0x7a21a4] &wr=0x1 ?trans4;
LDG.E R8, desc[UR4][R2.64+0x58] &wr=0x1 ?trans2;
FFMA R11, R0, R8, R9 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R11 &rd=0x1 ?trans4;
LDG.E R0, desc[UR4][R6.64+0x7a21a8] &wr=0x2 ?trans4;
LDG.E R8, desc[UR4][R2.64+0x5c] &wr=0x2 ?trans2;
FFMA R13, R0, R8, R11 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R13 &rd=0x2 ?trans4;
LDG.E R0, desc[UR4][R6.64+0x7a3140] &wr=0x0 ?trans4;
LDG.E R8, desc[UR4][R2.64+0x60] &wr=0x0 ?trans2;
FFMA R9, R0, R8, R13 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R9 ?trans4;
LDG.E R0, desc[UR4][R6.64+0x7a3144] &wr=0x1 ?trans4;
LDG.E R8, desc[UR4][R2.64+0x64] &wr=0x1 ?trans2;
FFMA R11, R0, R8, R9 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R11 ?trans4;
LDG.E R0, desc[UR4][R6.64+0x7a3148] &wr=0x2 ?trans4;
LDG.E R8, desc[UR4][R2.64+0x68] &wr=0x2 ?trans2;
FFMA R13, R0, R8, R11 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R13 ?trans1;
EXIT ?trans5;
BRA 0x850;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: conv(float*, float*, float*)
_Z4convPfS_S_:
s_load_b32 s2, s[0:1], 0x24
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_and_b32 s2, s2, 0xffff
v_mad_u64_u32 v[2:3], null, s15, s3, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v1, 0x86c1973b, v2
v_lshrrev_b32_e32 v5, 19, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_u32_u24_e32 v6, 0xf32a4, v5
v_sub_nc_u32_e32 v1, v2, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[3:4], null, s14, s2, v[0:1]
v_mul_lo_u32 v0, 0x3e6, v1
s_load_b64 s[2:3], s[0:1], 0x10
v_mul_u32_u24_e32 v4, 27, v5
v_lshlrev_b32_e32 v7, 2, v4
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_add3_u32 v0, v0, v3, v6
v_mad_u64_u32 v[4:5], null, 0x3e8, v2, v[3:4]
v_mul_lo_u32 v5, 0x3e8, v6
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_sub_nc_u32_e32 v9, v4, v5
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
s_load_b128 s[0:3], s[0:1], 0x0
global_load_b32 v8, v[0:1], off
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, s2, s2, v7
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v3, null, s3, 0, s2
s_mov_b32 s2, 0
.LBB0_1:
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_dual_mov_b32 v10, v9 :: v_dual_mov_b32 v5, v3
v_mov_b32_e32 v4, v2
s_mov_b32 s3, 0
.LBB0_2:
s_delay_alu instid0(VALU_DEP_1)
v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
s_mov_b32 s4, 0
.LBB0_3:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_add_nc_u32_e32 v11, s4, v10
s_add_i32 s4, s4, 1
s_cmp_eq_u32 s4, 3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v12, 31, v11
v_lshlrev_b64 v[11:12], 2, v[11:12]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v11, vcc_lo, s0, v11
v_add_co_ci_u32_e32 v12, vcc_lo, s1, v12, vcc_lo
global_load_b32 v13, v[6:7], off
global_load_b32 v11, v[11:12], off
v_add_co_u32 v6, vcc_lo, v6, 4
v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v8, v11, v13
global_store_b32 v[0:1], v8, off
s_cbranch_scc0 .LBB0_3
v_add_co_u32 v4, vcc_lo, v4, 12
v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
v_add_nc_u32_e32 v10, 0x3e8, v10
s_add_i32 s3, s3, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s3, 3
s_cbranch_scc0 .LBB0_2
v_add_co_u32 v2, vcc_lo, v2, 36
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
v_add_nc_u32_e32 v9, 0xf4240, v9
s_add_i32 s2, s2, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s2, 3
s_cbranch_scc0 .LBB0_1
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| conv | 3,867 | 1,655 | stackv2-00000-of-00015 |
// Demangled: assignment_step(uchar4*, unsigned int, unsigned int, unsigned int)
Function : _Z15assignment_stepP6uchar4jjj
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R7, SR_TID.X &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x388] &wr=0x2 ?trans1;
S2R R6, SR_TID.Y &wr=0x3 ?trans1;
LDCU UR7, c[0x0][0x364] &wr=0x3 ?trans1;
S2R R3, SR_CTAID.Y &wr=0x3 ?trans1;
IMAD R7, R0, UR6, R7 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R7, UR4, PT &req={2} ?trans1;
IMAD R6, R3, UR7, R6 &req={3} ?WAIT12_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R8, c[0x0][0x390] &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R8, RZ, PT &req={0} ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
LDCU UR4, c[0x0][0x374] &wr=0x0 ?trans1;
LOP3.LUT R9, R8.reuse, 0xfffffffc, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R8, R8, 0x3, RZ, 0xc0, !PT ?trans1;
LDCU UR5, c[0x0][0x370] &wr=0x1 ?trans1;
IADD3 R9, PT, PT, -R9, RZ, RZ ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x2 ?trans1;
UIMAD UR4, UR7, UR4, URZ &req={0} ?trans1;
UIMAD UR5, UR6, UR5, URZ &req={1} ?WAIT12_END_GROUP;
LDCU UR6, c[0x0][0x38c] &req={0} &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0xf30 ?trans1;
ISETP.GE.U32.AND P0, PT, R6, UR6, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0xf20 &req={4,3,1} ?trans5;
MOV R10, R6 ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x380] &req={4,0} &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x388] &req={1} &wr=0x1 ?trans7;
LDC R4, c[0x0][0x390] &req={3} &wr=0x3 ?trans1;
IMAD R5, R10, UR6, R7 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR8][R2.64] &req={2} &wr=0x2 ?trans1;
IADD3 R10, PT, PT, R10, UR4, RZ ?trans1;
HFMA2 R15, -RZ, RZ, 0, 0 ?trans1;
ISETP.GE.U32.AND P1, PT, R4, 0x4, PT &req={3} ?trans1;
MOV R13, 0x7f7fffff ?trans2;
ISETP.GE.U32.AND P0, PT, R10, UR7, PT ?trans1;
I2F.U8 R11, R0 &req={2} &rd=0x0 &wr=0x1 ?trans1;
I2F.U8 R12, R0.B1 &rd=0x0 &wr=0x2 ?trans1;
I2F.U8 R14, R0.B2 &rd=0x0 &wr=0x3 ?trans7;
@!P1 BRA 0x9c0 ?trans5;
MOV.64 R4, 0x18 ?trans2;
MOV R13, 0x7f7fffff ?trans1;
MOV R15, RZ ?trans1;
MOV R16, R9 ?WAIT7_END_GROUP;
MOV R17, R4 &req={4} ?trans1;
IADD3 R16, PT, PT, R16, 0x4, RZ ?trans1;
BSSY.RECONVERGENT B1, 0x480 ?trans2;
LDC.64 R18, c[0x3][R17+-0x18] &wr=0x4 ?trans2;
ISETP.NE.AND P1, PT, R16, RZ, PT ?WAIT6_END_GROUP;
LDC R21, c[0x3][R17+-0x10] &wr=0x5 ?trans1;
FADD R19, R12, -R19 &req={4,2} ?trans1;
FADD R18, R11, -R18 &req={1} ?WAIT3_END_GROUP;
FMUL R19, R19, R19 ?trans1;
FADD R0, R14, -R21 &req={5,3,0} ?WAIT3_END_GROUP;
FFMA R19, R18, R18, R19 ?WAIT4_END_GROUP;
FFMA R19, R0, R0, R19 ?WAIT4_END_GROUP;
MUFU.RSQ R18, R19 &rd=0x0 &wr=0x1 ?trans1;
IADD3 R0, PT, PT, R19, -0xd000000, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P2, PT, R0, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P2 BRA 0x430 &req={1,0} ?trans5;
MOV R0, R19 ?trans1;
MOV R23, 0x420 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xf80 ?trans5;
BRA 0x470 ?trans5;
FMUL.FTZ R0, R19, R18 ?trans1;
FMUL.FTZ R18, R18, 0.5 ?WAIT3_END_GROUP;
FFMA R19, -R0, R0, R19 ?WAIT4_END_GROUP;
FFMA R0, R19, R18, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
LDC.64 R18, c[0x3][R17+-0x8] &wr=0x0 ?trans1;
FSETP.GEU.AND P2, PT, R0, R13, PT ?trans1;
BSSY.RECONVERGENT B1, 0x610 ?trans6;
LDC R20, c[0x3][R17+-0xc] &wr=0x1 ?trans6;
@!P2 STG.E.U8 desc[UR8][R2.64+0x3], R15 &rd=0x2 ?trans1;
@!P2 MOV R13, R0 ?trans1;
FADD R18, R12, -R18 &req={0} ?WAIT4_END_GROUP;
FMUL R21, R18, R18 ?trans1;
FADD R18, R14, -R19 ?trans1;
FADD R20, R11, -R20 &req={1} ?WAIT4_END_GROUP;
FFMA R21, R20, R20, R21 ?WAIT4_END_GROUP;
FFMA R21, R18, R18, R21 ?WAIT4_END_GROUP;
MUFU.RSQ R20, R21 &rd=0x2 &wr=0x0 ?trans1;
IADD3 R18, PT, PT, R21, -0xd000000, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P3, PT, R18, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P3 BRA 0x5c0 &req={2,0} ?trans5;
MOV R0, R21 ?trans1;
MOV R23, 0x5b0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xf80 ?trans5;
BRA 0x600 ?trans5;
FMUL.FTZ R0, R21, R20 ?trans1;
FMUL.FTZ R18, R20, 0.5 ?WAIT3_END_GROUP;
FFMA R19, -R0, R0, R21 ?WAIT4_END_GROUP;
FFMA R0, R19, R18, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
LDC.64 R18, c[0x3][R17] &wr=0x0 ?trans1;
FSETP.GEU.AND P2, PT, R0, R13, PT ?trans1;
BSSY.RECONVERGENT B1, 0x7b0 ?trans6;
LDC R23, c[0x3][R17+0x8] &wr=0x1 ?trans6;
@!P2 MOV R13, R0 ?trans1;
FADD R19, R12, -R19 &req={0} ?trans1;
FADD R18, R11, -R18 ?WAIT3_END_GROUP;
FMUL R21, R19, R19 ?trans1;
@!P2 IADD3 R19, PT, PT, R15, 0x1, RZ ?trans1;
FADD R20, R14, -R23 &req={1} ?trans2;
FFMA R21, R18, R18, R21 ?trans2;
@!P2 STG.E.U8 desc[UR8][R2.64+0x3], R19 &rd=0x0 ?trans2;
FFMA R21, R20, R20, R21 ?WAIT4_END_GROUP;
MUFU.RSQ R20, R21 &rd=0x0 &wr=0x1 ?trans1;
IADD3 R18, PT, PT, R21, -0xd000000, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P3, PT, R18, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P3 BRA 0x760 &req={1,0} ?trans5;
MOV R0, R21 ?trans1;
MOV R23, 0x750 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xf80 ?trans5;
BRA 0x7a0 ?trans5;
FMUL.FTZ R0, R21, R20 ?trans1;
FMUL.FTZ R18, R20, 0.5 ?WAIT3_END_GROUP;
FFMA R19, -R0, R0, R21 ?WAIT4_END_GROUP;
FFMA R0, R19, R18, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
LDC.64 R18, c[0x3][R17+0x10] &wr=0x0 ?trans1;
FSETP.GEU.AND P2, PT, R0, R13, PT ?trans1;
BSSY.RECONVERGENT B1, 0x950 ?trans6;
LDC R20, c[0x3][R17+0xc] &wr=0x1 ?trans6;
@!P2 IADD3 R21, PT, PT, R15, 0x2, RZ ?trans1;
@!P2 MOV R13, R0 ?WAIT4_END_GROUP;
@!P2 STG.E.U8 desc[UR8][R2.64+0x3], R21 &rd=0x2 ?trans1;
FADD R18, R12, -R18 &req={0} ?WAIT4_END_GROUP;
FMUL R23, R18, R18 ?trans1;
FADD R18, R14, -R19 ?trans1;
FADD R20, R11, -R20 &req={1} ?WAIT4_END_GROUP;
FFMA R23, R20, R20, R23 ?WAIT4_END_GROUP;
FFMA R23, R18, R18, R23 ?WAIT4_END_GROUP;
MUFU.RSQ R20, R23 &rd=0x2 &wr=0x0 ?trans1;
IADD3 R18, PT, PT, R23, -0xd000000, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P3, PT, R18, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P3 BRA 0x900 &req={2,0} ?trans5;
MOV R0, R23 ?trans1;
MOV R23, 0x8f0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xf80 ?trans5;
BRA 0x940 ?trans5;
FMUL.FTZ R0, R23, R20 ?trans1;
FMUL.FTZ R18, R20, 0.5 ?WAIT3_END_GROUP;
FFMA R17, -R0, R0, R23 ?WAIT4_END_GROUP;
FFMA R0, R17, R18, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
FSETP.GEU.AND P2, PT, R0, R13, PT ?trans1;
IADD.64 R4, R4, 0x30 ?WAIT12_END_GROUP;
@!P2 IADD3 R17, PT, PT, R15.reuse, 0x3, RZ ?trans1;
@!P2 MOV R13, R0 ?trans1;
IADD3 R15, PT, PT, R15, 0x4, RZ ?WAIT3_END_GROUP;
@!P2 STG.E.U8 desc[UR8][R2.64+0x3], R17 &rd=0x4 ?trans1;
@P1 BRA 0x2f0 ?trans5;
ISETP.NE.AND P1, PT, R8, RZ, PT ?WAIT13_END_GROUP;
@!P1 BRA 0xf10 ?trans5;
ISETP.NE.AND P1, PT, R8, 0x1, PT ?WAIT13_END_GROUP;
@!P1 BRA 0xd50 ?trans5;
IMAD R4, R15, 0xc, RZ ?trans1;
BSSY.RECONVERGENT B1, 0xb70 ?trans3;
LDC.64 R16, c[0x3][R4] &req={4} &wr=0x4 ?trans8;
LDC R5, c[0x3][R4+0x8] &wr=0x5 ?trans1;
FADD R17, R12, -R17 &req={4,2} ?trans1;
FADD R16, R11, -R16 &req={1} ?WAIT3_END_GROUP;
FMUL R17, R17, R17 ?trans1;
FADD R0, R14, -R5 &req={5,3,0} ?WAIT3_END_GROUP;
FFMA R17, R16, R16, R17 ?WAIT4_END_GROUP;
FFMA R17, R0, R0, R17 ?WAIT4_END_GROUP;
MUFU.RSQ R16, R17 &rd=0x0 &wr=0x1 ?trans1;
IADD3 R0, PT, PT, R17, -0xd000000, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R0, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P1 BRA 0xb20 &req={1,0} ?trans5;
MOV R0, R17 ?trans1;
MOV R23, 0xb10 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xf80 ?trans5;
BRA 0xb60 ?trans5;
FMUL.FTZ R0, R17, R16 ?trans1;
FMUL.FTZ R16, R16, 0.5 ?WAIT3_END_GROUP;
FFMA R5, -R0, R0, R17 ?WAIT4_END_GROUP;
FFMA R0, R5, R16, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
LDC.64 R18, c[0x3][R4+0x10] &wr=0x0 ?trans1;
FSETP.GEU.AND P1, PT, R0, R13, PT ?trans1;
BSSY.RECONVERGENT B1, 0xd00 ?trans6;
LDC R16, c[0x3][R4+0xc] &wr=0x1 ?trans6;
@!P1 STG.E.U8 desc[UR8][R2.64+0x3], R15 &rd=0x2 ?trans1;
@!P1 MOV R13, R0 ?trans1;
FADD R18, R12, -R18 &req={0} ?WAIT4_END_GROUP;
FMUL R5, R18, R18 ?trans1;
FADD R18, R14, -R19 ?trans1;
FADD R16, R11, -R16 &req={1} ?WAIT4_END_GROUP;
FFMA R5, R16, R16, R5 ?WAIT4_END_GROUP;
FFMA R17, R18, R18, R5 ?WAIT4_END_GROUP;
MUFU.RSQ R16, R17 &rd=0x2 &wr=0x0 ?trans1;
IADD3 R5, PT, PT, R17, -0xd000000, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P2, PT, R5, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P2 BRA 0xcb0 &req={2,0} ?trans5;
MOV R0, R17 ?trans1;
MOV R23, 0xca0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xf80 ?trans5;
BRA 0xcf0 ?trans5;
FMUL.FTZ R0, R17, R16 ?trans1;
FMUL.FTZ R4, R16, 0.5 ?WAIT3_END_GROUP;
FFMA R5, -R0, R0, R17 ?WAIT4_END_GROUP;
FFMA R0, R5, R4, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
FSETP.GEU.AND P1, PT, R0, R13, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R5, PT, PT, R15.reuse, 0x1, RZ ?trans1;
@!P1 MOV R13, R0 ?trans1;
IADD3 R15, PT, PT, R15, 0x2, RZ ?WAIT3_END_GROUP;
@!P1 STG.E.U8 desc[UR8][R2.64+0x3], R5 &rd=0x0 ?trans4;
LDC R0, c[0x0][0x390] &req={0} &wr=0x0 ?trans2;
LOP3.LUT P1, RZ, R0, 0x1, RZ, 0xc0, !PT &req={0} ?WAIT13_END_GROUP;
@!P1 BRA 0xf10 ?trans5;
IMAD R0, R15, 0xc, RZ ?trans1;
BSSY.RECONVERGENT B1, 0xef0 ?trans3;
LDC.64 R4, c[0x3][R0] &wr=0x0 ?trans8;
LDC R17, c[0x3][R0+0x8] &req={4} &wr=0x4 ?trans1;
FADD R5, R12, -R5 &req={2,0} ?trans1;
FADD R4, R11, -R4 &req={1} ?WAIT3_END_GROUP;
FMUL R5, R5, R5 ?trans1;
FADD R14, R14, -R17 &req={4,3} ?WAIT3_END_GROUP;
FFMA R5, R4, R4, R5 ?WAIT4_END_GROUP;
FFMA R5, R14, R14, R5 ?WAIT4_END_GROUP;
MUFU.RSQ R12, R5 &rd=0x0 &wr=0x1 ?trans1;
IADD3 R4, PT, PT, R5, -0xd000000, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R4, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P1 BRA 0xea0 &req={1,0} ?trans5;
MOV R0, R5 ?trans1;
MOV R23, 0xe90 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xf80 ?trans5;
BRA 0xee0 ?trans5;
FMUL.FTZ R0, R5, R12 ?trans1;
FMUL.FTZ R4, R12, 0.5 ?WAIT3_END_GROUP;
FFMA R5, -R0, R0, R5 ?WAIT4_END_GROUP;
FFMA R0, R5, R4, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
FSETP.GEU.AND P1, PT, R0, R13, PT ?WAIT13_END_GROUP;
@!P1 STG.E.U8 desc[UR8][R2.64+0x3], R15 &rd=0x0 ?trans2;
@!P0 BRA 0x1c0 ?trans5;
BSYNC.RECONVERGENT B0 &req={2} ?trans5;
LDCU UR6, c[0x0][0x388] &wr=0x2 ?trans1;
IADD3 R7, PT, PT, R7, UR5, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R7, UR6, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x170 ?trans5;
EXIT ?trans5;
LOP3.LUT P2, RZ, R0, 0x7fffffff, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P2 MOV R18, R0 ?trans1;
@!P2 BRA 0x10b0 ?trans6;
FSETP.GEU.FTZ.AND P2, PT, R0, RZ, PT ?WAIT13_END_GROUP;
@!P2 MOV R18, 0x7fffffff ?trans1;
@!P2 BRA 0x10b0 ?trans6;
FSETP.GTU.FTZ.AND P2, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P2 FADD.FTZ R18, R0, 1 ?trans1;
@P2 BRA 0x10b0 ?trans6;
FSETP.NEU.FTZ.AND P2, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P2 FFMA R19, R0, 1.84467440737095516160e+19, RZ ?WAIT4_END_GROUP;
@P2 MUFU.RSQ R18, R19 &wr=0x0 ?trans2;
@P2 FMUL.FTZ R20, R19, R18 &req={0} ?trans1;
@P2 FMUL.FTZ R22, R18, 0.5 ?trans1;
@!P2 MOV R18, R0 ?trans2;
@P2 FADD.FTZ R21, -R20, -RZ ?WAIT4_END_GROUP;
@P2 FFMA R21, R20, R21, R19 ?WAIT4_END_GROUP;
@P2 FFMA R21, R21, R22, R20 ?WAIT4_END_GROUP;
@P2 FMUL.FTZ R18, R21, 2.3283064365386962891e-10 ?WAIT7_END_GROUP;
MOV R0, R18 ?trans1;
MOV R18, R23 ?trans1;
HFMA2 R19, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R18 0x0 ?trans5;
BRA 0x10f0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: assignment_step(HIP_vector_type<unsigned char, 4u>*, unsigned int, unsigned int, unsigned int)
_Z15assignment_stepP15HIP_vector_typeIhLj4EEjjj:
s_clause 0x1
s_load_b32 s9, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x8
v_and_b32_e32 v3, 0x3ff, v0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_mov_b32 s7, exec_lo
s_and_b32 s8, s9, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s14, s8, v[3:4]
v_cmpx_gt_u32_e64 s4, v1
s_cbranch_execz .LBB0_11
s_load_b64 s[10:11], s[2:3], 0x0
s_load_b64 s[2:3], s[0:1], 0x0
v_bfe_u32 v0, v0, 10, 10
s_lshr_b32 s1, s9, 16
s_cmp_lg_u32 s6, 0
s_mov_b32 s12, 0
s_cselect_b32 s7, -1, 0
v_mad_u64_u32 v[2:3], null, s15, s1, v[0:1]
v_mov_b32_e32 v0, 0
s_delay_alu instid0(VALU_DEP_2)
v_cmp_gt_u32_e64 s0, s5, v2
s_waitcnt lgkmcnt(0)
s_mul_i32 s10, s10, s8
s_mul_i32 s11, s11, s1
.LBB0_2:
s_delay_alu instid0(VALU_DEP_1)
s_and_saveexec_b32 s13, s0
s_cbranch_execz .LBB0_10
v_mov_b32_e32 v5, v2
s_mov_b32 s14, 0
.LBB0_4:
s_and_not1_b32 vcc_lo, exec_lo, s7
s_cbranch_vccnz .LBB0_9
s_delay_alu instid0(VALU_DEP_1)
v_mad_u64_u32 v[3:4], null, v5, s4, v[1:2]
v_dual_mov_b32 v4, v0 :: v_dual_mov_b32 v9, 0x7f7fffff
s_mov_b32 s15, 0
s_getpc_b64 s[8:9]
s_add_u32 s8, s8, dev_mu@rel32@lo+12
s_addc_u32 s9, s9, dev_mu@rel32@hi+20
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 2, v[3:4]
v_add_co_u32 v3, vcc_lo, s2, v3
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
global_load_b32 v8, v[3:4], off
s_waitcnt vmcnt(0)
v_cvt_f32_ubyte0_e32 v6, v8
v_cvt_f32_ubyte1_e32 v7, v8
v_cvt_f32_ubyte2_e32 v8, v8
.LBB0_6:
s_add_u32 s16, s8, -8
s_addc_u32 s17, s9, -1
s_clause 0x1
s_load_b64 s[16:17], s[16:17], 0x0
s_load_b32 s1, s[8:9], 0x0
s_waitcnt lgkmcnt(0)
v_dual_subrev_f32 v10, s17, v7 :: v_dual_subrev_f32 v11, s16, v6
v_subrev_f32_e32 v12, s1, v8
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v10, v10, v10
v_fmac_f32_e32 v10, v11, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v10, v12, v12
v_mul_f32_e32 v11, 0x4f800000, v10
v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v10
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v10, v10, v11, vcc_lo
v_sqrt_f32_e32 v11, v10
s_waitcnt_depctr 0xfff
v_add_nc_u32_e32 v12, -1, v11
v_add_nc_u32_e32 v13, 1, v11
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v14, -v12, v11, v10
v_fma_f32 v15, -v13, v11, v10
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_ge_f32_e64 s1, 0, v14
v_cndmask_b32_e64 v11, v11, v12, s1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_lt_f32_e64 s1, 0, v15
v_cndmask_b32_e64 v11, v11, v13, s1
s_mov_b32 s1, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v12, 0x37800000, v11
v_cndmask_b32_e32 v11, v11, v12, vcc_lo
v_cmp_class_f32_e64 vcc_lo, v10, 0x260
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v10, v11, v10, vcc_lo
v_cmpx_lt_f32_e32 v10, v9
s_cbranch_execz .LBB0_8
v_mov_b32_e32 v11, s15
v_mov_b32_e32 v9, v10
global_store_b8 v[3:4], v11, off offset:3
.LBB0_8:
s_or_b32 exec_lo, exec_lo, s1
s_add_i32 s15, s15, 1
s_add_u32 s8, s8, 12
s_addc_u32 s9, s9, 0
s_cmp_eq_u32 s6, s15
s_cbranch_scc0 .LBB0_6
.LBB0_9:
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v5, s11, v5
v_cmp_le_u32_e32 vcc_lo, s5, v5
s_or_b32 s14, vcc_lo, s14
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s14
s_cbranch_execnz .LBB0_4
.LBB0_10:
s_or_b32 exec_lo, exec_lo, s13
v_add_nc_u32_e32 v1, s10, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_le_u32_e32 vcc_lo, s4, v1
s_or_b32 s12, vcc_lo, s12
s_and_not1_b32 exec_lo, exec_lo, s12
s_cbranch_execnz .LBB0_2
.LBB0_11:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| assignment_step | 6,269 | 2,299 | stackv2-00000-of-00015 |
// Demangled: matrix_transpose(float*)
Function : _Z16matrix_transposePf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R9, SR_TID.X &wr=0x0 ?trans7;
LDC.64 R4, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
S2R R10, SR_TID.Y &wr=0x0 ?trans1;
S2R R11, SR_CTAID.X &wr=0x3 ?trans1;
S2R R13, SR_CTAID.Y &wr=0x4 ?trans1;
IMAD R0, R9, 0x8, R10 &req={0} ?WAIT5_END_GROUP;
LEA R2, R11, R0, 0x4 &req={3} ?WAIT4_END_GROUP;
IADD3 R3, PT, PT, R2, R13, R13 &req={4} ?WAIT5_END_GROUP;
IMAD.WIDE R2, R3, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
LDG.E R6, desc[UR6][R2.64] &req={2} &rd=0x0 &wr=0x2 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
IMAD R0, R13, 0x10, R0 ?WAIT5_END_GROUP;
IADD3 R3, PT, PT, R0, R11, R11 &req={0} ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R2, R3, 0x4, R4 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?WAIT6_END_GROUP;
LEA R7, R9, UR4, 0x3 ?trans2;
LEA R8, R10, UR4, 0x3 ?WAIT3_END_GROUP;
IMAD R7, R10, 0x4, R7 ?trans1;
LEA R8, R9, R8, 0x2 ?WAIT4_END_GROUP;
STS [R7], R6 &req={2} ?trans4;
LDS R8, [R8] &wr=0x0 ?trans4;
STS [R7], R8 &req={0} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R9, [R7] &wr=0x0 ?trans4;
STG.E desc[UR6][R2.64], R9 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x1d0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: matrix_transpose(float*)
_Z16matrix_transposePf:
v_and_b32_e32 v2, 0x3ff, v0
s_lshl_b32 s2, s14, 1
v_bfe_u32 v3, v0, 10, 10
s_load_b64 s[0:1], s[0:1], 0x0
s_lshl_b32 s3, s15, 1
v_add_lshl_u32 v0, s2, v2, 3
v_lshlrev_b32_e32 v4, 2, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add3_u32 v0, s3, v3, v0
v_lshl_add_u32 v4, v3, 3, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b32 v0, v[0:1], off
v_lshlrev_b32_e32 v1, 2, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_lshl_add_u32 v1, v2, 3, v1
s_waitcnt vmcnt(0)
ds_store_b32 v1, v0
ds_load_b32 v4, v4
v_add_lshl_u32 v0, s3, v2, 3
v_add3_u32 v0, s2, v3, v0
s_waitcnt lgkmcnt(0)
ds_store_b32 v1, v4
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
ds_load_b32 v2, v1
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt lgkmcnt(0)
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| matrix_transpose | 721 | 779 | stackv2-00000-of-00015 |
// Demangled: gTest(double*)
Function : _Z5gTestPd
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R7, SR_TID.X &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x0 ?trans6;
LDC.64 R4, c[0x0][0x380] &wr=0x1 ?trans1;
S2R R0, SR_CTAID.X &wr=0x0 ?trans2;
IMAD R7, R0, UR4, R7 &req={0} ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans3;
I2F.F64.U32 R2, R7 &wr=0x0 ?trans1;
IMAD.WIDE.U32 R4, R7, 0x8, R4 &req={1} ?WAIT5_END_GROUP;
STG.E.64 desc[UR4][R4.64], R2 &req={0} ?trans1;
EXIT ?trans5;
BRA 0xb0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: gTest(double*)
_Z5gTestPd:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x14
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_mov_b32_e32 v2, 0
v_cvt_f64_u32_e32 v[3:4], v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 3, v[1:2]
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b64 v[0:1], v[3:4], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| gTest | 325 | 340 | stackv2-00000-of-00015 |
// Demangled: sum(int*, int*, int)
Function : _Z3sumPiS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x390] &wr=0x2 ?trans1;
HFMA2 R4, -RZ, RZ, 0, 0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x3 ?trans1;
IMAD.SHL.U32 R5, R0, 0x100, RZ &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR6, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x5f0 &req={3,0} ?trans5;
IADD3 R2, PT, PT, R5.reuse, 0x100, RZ ?trans2;
IADD3 R8, PT, PT, R5, 0x1, RZ ?trans1;
MOV R4, RZ ?trans2;
VIMNMX.S32 R3, R2, UR6, PT ?WAIT5_END_GROUP;
VIMNMX.S32 R8, R8, R3, !PT ?WAIT5_END_GROUP;
IADD3 R2, PT, PT, R5, -R8, RZ ?trans2;
LOP3.LUT R26, R8, 0xf, RZ, 0xc0, !PT ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P1, PT, R2, -0x10, PT ?trans2;
ISETP.NE.AND P0, PT, R26, RZ, PT ?WAIT11_END_GROUP;
@P1 BRA 0x330 ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
IADD3 R9, PT, PT, -R8, R5, R26 ?trans1;
MOV R4, RZ ?trans1;
IADD.64 R2, R2, 0x20 &req={0} ?WAIT8_END_GROUP;
IMAD.WIDE R6, R5, 0x4, R2 ?WAIT5_END_GROUP;
LDG.E R11, desc[UR4][R6.64+-0x20] &wr=0x2 ?trans4;
LDG.E R10, desc[UR4][R6.64+-0x1c] &wr=0x2 ?trans4;
LDG.E R13, desc[UR4][R6.64+-0x18] &wr=0x3 ?trans4;
LDG.E R12, desc[UR4][R6.64+-0x14] &wr=0x3 ?trans4;
LDG.E R15, desc[UR4][R6.64+-0x10] &wr=0x4 ?trans4;
LDG.E R14, desc[UR4][R6.64+-0xc] &wr=0x4 ?trans4;
LDG.E R17, desc[UR4][R6.64+-0x8] &wr=0x5 ?trans4;
LDG.E R16, desc[UR4][R6.64+-0x4] &wr=0x5 ?trans4;
LDG.E R19, desc[UR4][R6.64] &wr=0x5 ?trans4;
LDG.E R18, desc[UR4][R6.64+0x4] &wr=0x5 ?trans4;
LDG.E R21, desc[UR4][R6.64+0x8] &wr=0x5 ?trans4;
LDG.E R20, desc[UR4][R6.64+0xc] &wr=0x5 ?trans4;
LDG.E R23, desc[UR4][R6.64+0x10] &wr=0x5 ?trans4;
LDG.E R22, desc[UR4][R6.64+0x14] &wr=0x5 ?trans4;
LDG.E R25, desc[UR4][R6.64+0x18] &wr=0x5 ?trans4;
LDG.E R24, desc[UR4][R6.64+0x1c] &wr=0x5 ?trans1;
IADD3 R9, PT, PT, R9, 0x10, RZ ?WAIT2_END_GROUP;
IADD3 R5, PT, PT, R5, 0x10, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P1, PT, R9, RZ, PT ?trans1;
IADD3 R10, PT, PT, R10, R11, R4 &req={2} ?WAIT4_END_GROUP;
IADD3 R10, PT, PT, R12, R13, R10 &req={3} ?WAIT4_END_GROUP;
IADD3 R10, PT, PT, R14, R15, R10 &req={4} ?WAIT4_END_GROUP;
IADD3 R10, PT, PT, R16, R17, R10 &req={5} ?WAIT4_END_GROUP;
IADD3 R10, PT, PT, R18, R19, R10 ?WAIT4_END_GROUP;
IADD3 R10, PT, PT, R20, R21, R10 ?WAIT4_END_GROUP;
IADD3 R10, PT, PT, R22, R23, R10 ?WAIT4_END_GROUP;
IADD3 R4, PT, PT, R24, R25, R10 ?trans1;
@P1 BRA 0x160 ?trans6;
@!P0 BRA 0x5f0 ?trans5;
ISETP.GE.U32.AND P0, PT, R26, 0x8, PT ?trans1;
LOP3.LUT R15, R8, 0x7, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R15, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x470 ?trans6;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans2;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R7, desc[UR4][R2.64] &wr=0x2 ?trans4;
LDG.E R6, desc[UR4][R2.64+0x4] &wr=0x2 ?trans4;
LDG.E R9, desc[UR4][R2.64+0x8] &wr=0x3 ?trans4;
LDG.E R10, desc[UR4][R2.64+0xc] &wr=0x3 ?trans4;
LDG.E R11, desc[UR4][R2.64+0x10] &wr=0x4 ?trans4;
LDG.E R12, desc[UR4][R2.64+0x14] &wr=0x4 ?trans4;
LDG.E R13, desc[UR4][R2.64+0x18] &wr=0x5 ?trans4;
LDG.E R14, desc[UR4][R2.64+0x1c] &wr=0x5 ?trans1;
IADD3 R5, PT, PT, R5, 0x8, RZ ?WAIT2_END_GROUP;
IADD3 R6, PT, PT, R6, R7, R4 &req={2} ?WAIT4_END_GROUP;
IADD3 R6, PT, PT, R10, R9, R6 &req={3} ?WAIT4_END_GROUP;
IADD3 R6, PT, PT, R12, R11, R6 &req={4} ?WAIT4_END_GROUP;
IADD3 R4, PT, PT, R14, R13, R6 &req={5} ?WAIT7_END_GROUP;
@!P1 BRA 0x5f0 ?trans5;
ISETP.GE.U32.AND P0, PT, R15, 0x4, PT ?trans1;
LOP3.LUT R8, R8, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R8, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x550 ?trans6;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans2;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R7, desc[UR4][R2.64] &wr=0x2 ?trans4;
LDG.E R6, desc[UR4][R2.64+0x4] &wr=0x2 ?trans4;
LDG.E R9, desc[UR4][R2.64+0x8] &wr=0x3 ?trans4;
LDG.E R10, desc[UR4][R2.64+0xc] &wr=0x3 ?trans1;
IADD3 R5, PT, PT, R5, 0x4, RZ ?WAIT2_END_GROUP;
IADD3 R4, PT, PT, R6, R7, R4 &req={2} ?WAIT4_END_GROUP;
IADD3 R4, PT, PT, R10, R9, R4 &req={3} ?WAIT7_END_GROUP;
@!P1 BRA 0x5f0 ?trans5;
LDC.64 R6, c[0x0][0x380] &wr=0x0 ?trans1;
IADD3 R8, PT, PT, -R8, RZ, RZ ?WAIT7_END_GROUP;
IMAD.WIDE R2, R5, 0x4, R6 &req={0} ?WAIT6_END_GROUP;
LDG.E R3, desc[UR4][R2.64] &wr=0x2 ?trans1;
IADD3 R8, PT, PT, R8, 0x1, RZ ?trans2;
IADD3 R5, PT, PT, R5, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R8, RZ, PT ?trans1;
IADD3 R4, PT, PT, R3, R4, RZ &req={2} ?WAIT12_END_GROUP;
@P0 BRA 0x580 ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans2;
IMAD.WIDE.U32 R2, R0, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R4 ?trans1;
EXIT ?trans5;
BRA 0x630;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: sum(int*, int*, int)
_Z3sumPiS_i:
s_clause 0x1
s_load_b32 s5, s[0:1], 0x10
s_load_b128 s[0:3], s[0:1], 0x0
s_lshl_b32 s6, s15, 8
s_mov_b32 s4, s15
s_mov_b32 s7, 0
s_waitcnt lgkmcnt(0)
s_cmp_ge_i32 s6, s5
s_cbranch_scc1 .LBB0_3
s_ashr_i32 s7, s6, 31
s_add_i32 s10, s6, 0x100
s_lshl_b64 s[8:9], s[6:7], 2
s_min_i32 s5, s10, s5
s_add_u32 s0, s0, s8
s_addc_u32 s1, s1, s9
s_mov_b32 s7, 0
.LBB0_2:
s_load_b32 s8, s[0:1], 0x0
s_add_i32 s6, s6, 1
s_waitcnt lgkmcnt(0)
s_add_i32 s7, s8, s7
s_add_u32 s0, s0, 4
s_addc_u32 s1, s1, 0
s_cmp_ge_i32 s6, s5
s_cbranch_scc0 .LBB0_2
.LBB0_3:
s_mov_b32 s5, 0
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s7
s_lshl_b64 s[0:1], s[4:5], 2
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s0, s2, s0
s_addc_u32 s1, s3, s1
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| sum | 2,747 | 511 | stackv2-00000-of-00015 |
// Demangled: left_shift_kernel(int*, int)
Function : _Z17left_shift_kernelPii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_TID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x388] &wr=0x2 ?trans2;
UIADD3 UR4, UPT, UPT, UR4, -0x1, URZ &req={2} ?WAIT6_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR4, PT &req={1} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R2, R5, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
LDG.E R5, desc[UR4][R2.64+0x4] &req={2} &wr=0x2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
STG.E desc[UR4][R2.64], R5 &req={2} ?trans2;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
EXIT ?trans5;
BRA 0xe0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: left_shift_kernel(int*, int)
_Z17left_shift_kernelPii:
s_load_b32 s2, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_add_i32 s2, s2, -1
s_delay_alu instid0(SALU_CYCLE_1)
v_cmp_gt_i32_e32 vcc_lo, s2, v0
s_and_saveexec_b32 s2, vcc_lo
s_cbranch_execz .LBB0_2
s_load_b64 s[0:1], s[0:1], 0x0
v_lshlrev_b32_e32 v0, 2, v0
s_waitcnt lgkmcnt(0)
global_load_b32 v1, v0, s[0:1] offset:4
s_waitcnt vmcnt(0)
s_barrier
buffer_gl0_inv
global_store_b32 v0, v1, s[0:1]
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
.LBB0_2:
s_endpgm
| left_shift_kernel | 394 | 250 | stackv2-00000-of-00015 |
// Demangled: bin_search(int*, int*, int*, int*, int*)
Function : _Z10bin_searchPiS_S_S_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans8;
LDC.64 R4, c[0x0][0x390] &wr=0x2 ?trans1;
LDG.E R0, desc[UR4][R2.64] &req={1} &wr=0x3 ?trans4;
LDG.E R13, desc[UR4][R4.64] &req={2} &wr=0x3 ?trans1;
S2R R7, SR_TID.X &wr=0x1 ?trans1;
IADD3 R6, PT, PT, R13, 0x1, -R0 &req={3} ?WAIT4_END_GROUP;
I2FP.F32.S32 R6, R6 ?WAIT5_END_GROUP;
FMUL R6, R6, 0.00390625 ?WAIT4_END_GROUP;
F2I.CEIL.NTZ R15, R6 &wr=0x1 ?trans2;
IMAD R0, R15, R7, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R0, R13, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R10, c[0x0][0x380] &wr=0x0 ?trans8;
LDC.64 R6, c[0x0][0x3a0] &wr=0x1 ?trans2;
LDG.E R14, desc[UR4][R6.64] &req={1} &wr=0x2 ?trans1;
IMAD.WIDE R8, R0, 0x4, R10 &req={0} ?WAIT6_END_GROUP;
LDG.E R9, desc[UR4][R8.64] &wr=0x2 ?trans1;
IADD3 R15, PT, PT, R15, R0, RZ ?trans2;
IADD3 R12, PT, PT, R13, 0x1, RZ ?WAIT5_END_GROUP;
VIMNMX.S32 R15, R15, R12, PT ?trans1;
ISETP.GE.AND P0, PT, R14, R9, PT &req={2} ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
IMAD.WIDE R6, R15, 0x4, R10 ?WAIT6_END_GROUP;
LDG.E R7, desc[UR4][R6.64+-0x4] &wr=0x2 ?trans2;
ISETP.GT.AND P0, PT, R14, R7, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
IADD3 R15, PT, PT, R15, -0x1, RZ ?trans1;
STG.E desc[UR4][R2.64], R0 ?trans4;
STG.E desc[UR4][R4.64], R15 ?trans1;
EXIT ?trans5;
BRA 0x200;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: bin_search(int*, int*, int*, int*, int*)
_Z10bin_searchPiS_S_S_S_:
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_load_b32 s10, s[6:7], 0x0
s_load_b32 s8, s[2:3], 0x0
s_waitcnt lgkmcnt(0)
s_sub_i32 s9, s8, s10
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s9, s9, 1
v_cvt_f32_i32_e32 v1, s9
s_mov_b32 s9, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v1, 0x3b800000, v1
v_ceil_f32_e32 v1, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_i32_f32_e32 v3, v1
v_mad_u64_u32 v[1:2], null, v0, v3, s[10:11]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_ge_i32_e64 s8, v1
s_cbranch_execz .LBB0_4
v_ashrrev_i32_e32 v2, 31, v1
s_load_b64 s[0:1], s[0:1], 0x20
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[4:5], 2, v[1:2]
v_add_co_u32 v4, vcc_lo, s4, v4
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
global_load_b32 v0, v[4:5], off
s_waitcnt lgkmcnt(0)
s_load_b32 s0, s[0:1], 0x0
s_waitcnt vmcnt(0) lgkmcnt(0)
v_cmp_ge_i32_e32 vcc_lo, s0, v0
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_4
v_add_nc_u32_e32 v0, v1, v3
s_add_i32 s8, s8, 1
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_min_i32_e32 v2, s8, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[3:4], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v3, vcc_lo, s4, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
global_load_b32 v0, v[3:4], off offset:-4
s_waitcnt vmcnt(0)
v_cmp_le_i32_e32 vcc_lo, s0, v0
s_and_b32 exec_lo, exec_lo, vcc_lo
v_mov_b32_e32 v0, 0
v_add_nc_u32_e32 v2, -1, v2
s_clause 0x1
global_store_b32 v0, v1, s[6:7]
global_store_b32 v0, v2, s[2:3]
.LBB0_4:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| bin_search | 878 | 1,073 | stackv2-00000-of-00015 |
// Demangled: void tiling_Kernel<16u>(float*, float*, int)
Function : _Z13tiling_KernelILj16EEvPfS0_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR7, c[0x0][0x390] &wr=0x2 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans2;
IMAD R5, R5, 0x10, R3 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R5, UR7, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
S2R R2, SR_CTAID.Y &wr=0x0 ?trans1;
LDC.64 R6, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x2 ?trans1;
IMAD.SHL.U32 R2, R2, 0x10, RZ &req={0} ?WAIT5_END_GROUP;
IADD3 R9, PT, PT, R2, R3, RZ ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R8, R9, 0x4, R6 &req={1} ?WAIT6_END_GROUP;
LDG.E R8, desc[UR8][R8.64] &req={2} &wr=0x2 ?trans1;
IMAD.WIDE.U32 R6, R5, 0x4, R6 ?WAIT5_END_GROUP;
LDG.E R0, desc[UR8][R6.64] &rd=0x0 &wr=0x3 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
UIMAD UR6, UR7, UR7, URZ ?trans2;
IMAD R11, R2, UR7, R5 ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R11.reuse, UR6, PT ?trans1;
IADD3 R22, PT, PT, R11, UR7, RZ ?WAIT4_END_GROUP;
ISETP.EQ.OR P0, PT, R5, R2, P0 ?trans1;
IADD3 R4, PT, PT, R22.reuse, UR7, RZ ?trans1;
ISETP.GE.U32.AND P3, PT, R22, UR6, PT ?WAIT3_END_GROUP;
IADD3 R37, PT, PT, R4.reuse, UR7, RZ ?trans2;
ISETP.EQ.OR P3, PT, R5, R2, P3 ?trans1;
ISETP.GE.U32.AND P6, PT, R4, UR6, PT ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?trans1;
IADD3 R19, PT, PT, R37, UR7, RZ ?WAIT3_END_GROUP;
@!P0 LDC.64 R6, c[0x0][0x388] &req={0} &wr=0x0 ?trans1;
ISETP.EQ.OR P6, PT, R5, R2.reuse, P6 ?trans1;
ISETP.GE.U32.AND P5, PT, R37, UR6, PT ?trans1;
LEA R3, R3, UR4, 0x2 ?trans2;
IADD3 R31, PT, PT, R19.reuse, UR7, RZ ?trans1;
ISETP.GE.U32.AND P4, PT, R19, UR6, PT ?trans1;
ISETP.EQ.OR P5, PT, R5, R2.reuse, P5 ?trans1;
@!P3 LDC.64 R28, c[0x0][0x388] &wr=0x1 ?trans1;
IADD3 R33, PT, PT, R31, UR7, RZ ?trans2;
ISETP.EQ.OR P4, PT, R5, R2, P4 ?WAIT2_END_GROUP;
IADD3 R23, PT, PT, R33.reuse, UR7, RZ ?trans1;
ISETP.GE.U32.AND P1, PT, R33, UR6, PT ?trans2;
@!P6 LDC.64 R14, c[0x0][0x388] &wr=0x4 ?trans2;
ISETP.GE.U32.AND P2, PT, R23, UR6, PT ?trans1;
ISETP.EQ.OR P1, PT, R5, R2, P1 ?trans1;
@!P0 IMAD.WIDE.U32 R6, R11, 0x4, R6 &req={0} ?WAIT3_END_GROUP;
ISETP.EQ.OR P2, PT, R5, R2, P2 ?trans1;
@!P5 LDC.64 R16, c[0x0][0x388] &wr=0x0 ?trans1;
@!P3 IMAD.WIDE.U32 R28, R22, 0x4, R28 &req={1} ?WAIT7_END_GROUP;
@!P4 LDC.64 R12, c[0x0][0x388] &wr=0x1 ?trans1;
@!P6 IMAD.WIDE.U32 R14, R4, 0x4, R14 &req={4} ?WAIT7_END_GROUP;
@!P1 LDC.64 R10, c[0x0][0x388] &wr=0x4 ?trans1;
@!P5 IMAD.WIDE.U32 R16, R37, 0x4, R16 &req={0} ?WAIT4_END_GROUP;
@!P1 IMAD.WIDE.U32 R10, R33, 0x4, R10 &req={4} ?trans1;
STS [R3], R8 &req={2} ?trans2;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P0 LDS R9, [UR4] &wr=0x3 ?trans4;
@!P3 LDS R3, [UR4+0x4] &wr=0x0 ?trans4;
@!P6 LDS R18, [UR4+0x8] &wr=0x2 ?trans4;
@!P5 LDS R20, [UR4+0xc] &wr=0x4 ?trans4;
@!P4 LDS R35, [UR4+0x10] &wr=0x5 ?trans4;
@!P2 LDS R25, [UR4+0x1c] ?trans4;
@!P1 LDS R21, [UR4+0x18] &wr=0x5 ?trans1;
@!P0 FADD R9, R0.reuse, R9 &req={3} ?trans1;
@!P3 FADD R22, R0, R3 &req={0} ?WAIT4_END_GROUP;
@!P0 STG.E desc[UR8][R6.64], R9 &rd=0x0 ?trans1;
ISETP.GE.U32.AND P0, PT, R31, UR6, PT ?trans1;
IADD3 R3, PT, PT, R23, UR7, RZ ?trans1;
@!P6 FADD R37, R0.reuse, R18 &req={2} ?trans1;
@!P4 IMAD.WIDE.U32 R18, R19, 0x4, R12 &req={1} ?trans1;
@!P3 STG.E desc[UR8][R28.64], R22 ?trans1;
ISETP.EQ.OR P0, PT, R5, R2, P0 ?trans1;
IADD3 R4, PT, PT, R3.reuse, UR7, RZ ?trans1;
@!P5 FADD R20, R0.reuse, R20 &req={4} ?trans1;
ISETP.GE.U32.AND P3, PT, R3, UR6, PT ?trans1;
@!P6 STG.E desc[UR8][R14.64], R37 &rd=0x1 ?trans1;
@!P4 FADD R35, R0, R35 &req={5} ?trans1;
@!P2 LDC.64 R6, c[0x0][0x388] &req={0} &wr=0x0 ?trans1;
IADD3 R12, PT, PT, R4, UR7, RZ ?trans1;
@!P5 STG.E desc[UR8][R16.64], R20 ?trans3;
IADD3 R13, PT, PT, R12, UR7, RZ ?WAIT2_END_GROUP;
@!P0 LDS R27, [UR4+0x14] &wr=0x2 ?trans1;
@!P0 LDC.64 R8, c[0x0][0x388] &wr=0x3 ?trans1;
@!P1 FADD R21, R0.reuse, R21 ?trans1;
@!P2 FADD R15, R0, R25 &req={1} ?trans1;
@!P4 STG.E desc[UR8][R18.64], R35 &rd=0x1 ?trans1;
ISETP.EQ.OR P4, PT, R5, R2, P3 ?trans1;
ISETP.GE.U32.AND P3, PT, R4, UR6, PT ?WAIT5_END_GROUP;
ISETP.EQ.OR P3, PT, R5, R2, P3 ?trans1;
@!P2 IMAD.WIDE.U32 R6, R23, 0x4, R6 &req={0} ?trans1;
IADD3 R23, PT, PT, R13, UR7, RZ ?WAIT5_END_GROUP;
@!P4 LDS R22, [UR4+0x20] &wr=0x0 ?trans1;
IADD3 R25, PT, PT, R23, UR7, RZ ?WAIT5_END_GROUP;
@!P3 LDS R24, [UR4+0x24] &wr=0x4 ?trans1;
@!P0 IMAD.WIDE.U32 R8, R31, 0x4, R8 &req={3} ?trans1;
@!P3 LDC.64 R18, c[0x0][0x388] &req={1} &wr=0x1 ?trans1;
IADD3 R37, PT, PT, R25.reuse, UR7, RZ ?trans1;
ISETP.GE.U32.AND P6, PT, R25, UR6, PT ?WAIT4_END_GROUP;
ISETP.GE.U32.AND P5, PT, R37, UR6, PT ?trans1;
ISETP.EQ.OR P6, PT, R5, R2, P6 ?WAIT4_END_GROUP;
ISETP.EQ.OR P5, PT, R5, R2, P5 ?trans1;
@!P0 FADD R27, R0, R27 &req={2} ?WAIT5_END_GROUP;
@!P0 STG.E desc[UR8][R8.64], R27 ?trans1;
ISETP.GE.U32.AND P0, PT, R12, UR6, PT ?WAIT3_END_GROUP;
@!P1 STG.E desc[UR8][R10.64], R21 &rd=0x2 ?trans1;
ISETP.GE.U32.AND P1, PT, R13, UR6, PT ?trans2;
@!P5 LDC.64 R16, c[0x0][0x388] &wr=0x3 ?trans1;
@!P3 IMAD.WIDE.U32 R18, R4, 0x4, R18 &req={1} ?trans1;
@!P2 STG.E desc[UR8][R6.64], R15 &rd=0x1 ?trans1;
ISETP.EQ.OR P2, PT, R5, R2.reuse, P0 ?trans1;
ISETP.GE.U32.AND P0, PT, R23, UR6, PT ?trans1;
ISETP.EQ.OR P1, PT, R5, R2, P1 ?trans1;
@!P6 LDS R31, [UR4+0x34] &wr=0x5 ?trans1;
@!P4 FADD R22, R0, R22 &req={0} ?WAIT2_END_GROUP;
ISETP.EQ.OR P0, PT, R5, R2, P0 ?trans1;
@!P4 LDC.64 R20, c[0x0][0x388] &req={2} &wr=0x0 ?trans1;
@!P5 LDS R29, [UR4+0x38] &wr=0x2 ?trans1;
@!P3 FADD R4, R0, R24 &req={4} ?WAIT4_END_GROUP;
@!P2 LDS R27, [UR4+0x28] &wr=0x4 ?trans2;
@!P2 LDC.64 R6, c[0x0][0x388] &req={1} &wr=0x1 ?trans2;
@!P1 LDS R35, [UR4+0x2c] &wr=0x1 ?trans4;
@!P0 LDS R33, [UR4+0x30] &wr=0x1 ?trans1;
@!P5 IMAD.WIDE.U32 R16, R37, 0x4, R16 &req={3} ?trans1;
@!P1 LDC.64 R8, c[0x0][0x388] &wr=0x3 ?trans8;
@!P0 LDC.64 R10, c[0x0][0x388] &wr=0x4 ?trans1;
@!P4 IMAD.WIDE.U32 R20, R3, 0x4, R20 &req={0} ?trans1;
IADD3 R3, PT, PT, R37, UR7, RZ ?WAIT4_END_GROUP;
@!P4 STG.E desc[UR8][R20.64], R22 &rd=0x0 ?trans1;
ISETP.GE.U32.AND P4, PT, R3, UR6, PT ?trans1;
@!P6 LDC.64 R14, c[0x0][0x388] &wr=0x0 ?trans1;
@!P2 IMAD.WIDE.U32 R6, R12, 0x4, R6 &req={1} ?trans1;
@!P3 STG.E desc[UR8][R18.64], R4 &rd=0x1 ?trans2;
ISETP.EQ.OR P4, PT, R5, R2, P4 ?trans1;
@!P6 FADD R31, R0, R31 &req={5} ?trans1;
@!P1 IMAD.WIDE.U32 R8, R13, 0x4, R8 &req={3} ?WAIT4_END_GROUP;
@!P5 FADD R29, R0.reuse, R29 &req={2} ?trans1;
@!P2 FADD R27, R0, R27 &req={4} ?trans1;
@!P0 IMAD.WIDE.U32 R10, R23, 0x4, R10 ?WAIT4_END_GROUP;
@!P1 FADD R35, R0.reuse, R35 ?trans1;
@!P2 STG.E desc[UR8][R6.64], R27 &rd=0x1 ?trans1;
@!P0 FADD R33, R0, R33 ?WAIT3_END_GROUP;
@!P1 STG.E desc[UR8][R8.64], R35 &rd=0x1 ?trans1;
@!P6 IMAD.WIDE.U32 R14, R25, 0x4, R14 &req={0} ?WAIT3_END_GROUP;
@!P0 STG.E desc[UR8][R10.64], R33 &rd=0x1 ?trans4;
@!P6 STG.E desc[UR8][R14.64], R31 &rd=0x1 ?trans4;
@!P5 STG.E desc[UR8][R16.64], R29 &rd=0x1 ?trans1;
@P4 EXIT ?trans5;
LDS R7, [UR4+0x3c] &req={1} &wr=0x0 ?trans1;
LDC.64 R4, c[0x0][0x388] &wr=0x1 ?trans2;
IMAD.WIDE.U32 R2, R3, 0x4, R4 &req={1} ?WAIT4_END_GROUP;
FADD R7, R0, R7 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR8][R2.64], R7 ?trans1;
EXIT ?trans5;
BRA 0x990;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: void tiling_Kernel<16u>(float*, float*, int)
_Z13tiling_KernelILj16EEvPfS0_i:
s_load_b32 s4, s[0:1], 0x10
v_lshl_add_u32 v1, s14, 4, v0
s_mov_b32 s2, exec_lo
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_u32_e64 s4, v1
s_cbranch_execz .LBB4_33
s_load_b128 s[0:3], s[0:1], 0x0
s_lshl_b32 s6, s15, 4
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v3, s6, v0
s_mul_i32 s5, s4, s4
v_lshl_add_u32 v0, v0, 2, 0
v_mov_b32_e32 v4, v2
v_lshlrev_b64 v[5:6], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 2, v[3:4]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v3, vcc_lo, s0, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
v_add_co_u32 v5, vcc_lo, s0, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
v_cmp_ne_u32_e64 s0, s6, v1
s_clause 0x1
global_load_b32 v7, v[3:4], off
global_load_b32 v5, v[5:6], off
v_mad_u64_u32 v[3:4], null, s6, s4, v[1:2]
v_cmp_eq_u32_e32 vcc_lo, s6, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_gt_u32_e64 s1, s5, v3
s_and_b32 s0, s0, s1
s_waitcnt vmcnt(1)
ds_store_b32 v0, v7
s_waitcnt vmcnt(0) lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB4_3
ds_load_b32 v6, v2
v_mov_b32_e32 v4, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[3:4]
v_add_co_u32 v0, s0, s2, v0
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v1, s0, s3, v1, s0
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v2, v5, v6
global_store_b32 v[0:1], v2, off
.LBB4_3:
s_or_b32 exec_lo, exec_lo, s1
v_add_nc_u32_e32 v0, s4, v3
s_xor_b32 s1, vcc_lo, -1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_gt_u32_e64 s0, s5, v0
s_and_b32 s6, s1, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s0, s6
s_cbranch_execz .LBB4_5
v_mov_b32_e32 v1, 0
ds_load_b32 v3, v1 offset:4
v_lshlrev_b64 v[1:2], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s2, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v3, v5, v3
global_store_b32 v[1:2], v3, off
.LBB4_5:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v0, s4, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_u32_e32 vcc_lo, s5, v0
s_and_b32 s6, s1, vcc_lo
s_and_saveexec_b32 s0, s6
s_cbranch_execz .LBB4_7
v_mov_b32_e32 v1, 0
ds_load_b32 v3, v1 offset:8
v_lshlrev_b64 v[1:2], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s2, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v3, v5, v3
global_store_b32 v[1:2], v3, off
.LBB4_7:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v0, s4, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_u32_e32 vcc_lo, s5, v0
s_and_b32 s6, s1, vcc_lo
s_and_saveexec_b32 s0, s6
s_cbranch_execz .LBB4_9
v_mov_b32_e32 v1, 0
ds_load_b32 v3, v1 offset:12
v_lshlrev_b64 v[1:2], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s2, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v3, v5, v3
global_store_b32 v[1:2], v3, off
.LBB4_9:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v0, s4, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_u32_e32 vcc_lo, s5, v0
s_and_b32 s6, s1, vcc_lo
s_and_saveexec_b32 s0, s6
s_cbranch_execz .LBB4_11
v_mov_b32_e32 v1, 0
ds_load_b32 v3, v1 offset:16
v_lshlrev_b64 v[1:2], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s2, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v3, v5, v3
global_store_b32 v[1:2], v3, off
.LBB4_11:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v0, s4, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_u32_e32 vcc_lo, s5, v0
s_and_b32 s6, s1, vcc_lo
s_and_saveexec_b32 s0, s6
s_cbranch_execz .LBB4_13
v_mov_b32_e32 v1, 0
ds_load_b32 v3, v1 offset:20
v_lshlrev_b64 v[1:2], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s2, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v3, v5, v3
global_store_b32 v[1:2], v3, off
.LBB4_13:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v0, s4, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_u32_e32 vcc_lo, s5, v0
s_and_b32 s6, s1, vcc_lo
s_and_saveexec_b32 s0, s6
s_cbranch_execz .LBB4_15
v_mov_b32_e32 v1, 0
ds_load_b32 v3, v1 offset:24
v_lshlrev_b64 v[1:2], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s2, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v3, v5, v3
global_store_b32 v[1:2], v3, off
.LBB4_15:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v0, s4, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_u32_e32 vcc_lo, s5, v0
s_and_b32 s6, s1, vcc_lo
s_and_saveexec_b32 s0, s6
s_cbranch_execz .LBB4_17
v_mov_b32_e32 v1, 0
ds_load_b32 v3, v1 offset:28
v_lshlrev_b64 v[1:2], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s2, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v3, v5, v3
global_store_b32 v[1:2], v3, off
.LBB4_17:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v0, s4, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_u32_e32 vcc_lo, s5, v0
s_and_b32 s6, s1, vcc_lo
s_and_saveexec_b32 s0, s6
s_cbranch_execz .LBB4_19
v_mov_b32_e32 v1, 0
ds_load_b32 v3, v1 offset:32
v_lshlrev_b64 v[1:2], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s2, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v3, v5, v3
global_store_b32 v[1:2], v3, off
.LBB4_19:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v0, s4, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_u32_e32 vcc_lo, s5, v0
s_and_b32 s6, s1, vcc_lo
s_and_saveexec_b32 s0, s6
s_cbranch_execz .LBB4_21
v_mov_b32_e32 v1, 0
ds_load_b32 v3, v1 offset:36
v_lshlrev_b64 v[1:2], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s2, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v3, v5, v3
global_store_b32 v[1:2], v3, off
.LBB4_21:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v0, s4, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_u32_e32 vcc_lo, s5, v0
s_and_b32 s6, s1, vcc_lo
s_and_saveexec_b32 s0, s6
s_cbranch_execz .LBB4_23
v_mov_b32_e32 v1, 0
ds_load_b32 v3, v1 offset:40
v_lshlrev_b64 v[1:2], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s2, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v3, v5, v3
global_store_b32 v[1:2], v3, off
.LBB4_23:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v0, s4, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_u32_e32 vcc_lo, s5, v0
s_and_b32 s6, s1, vcc_lo
s_and_saveexec_b32 s0, s6
s_cbranch_execz .LBB4_25
v_mov_b32_e32 v1, 0
ds_load_b32 v3, v1 offset:44
v_lshlrev_b64 v[1:2], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s2, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v3, v5, v3
global_store_b32 v[1:2], v3, off
.LBB4_25:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v0, s4, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_u32_e32 vcc_lo, s5, v0
s_and_b32 s6, s1, vcc_lo
s_and_saveexec_b32 s0, s6
s_cbranch_execz .LBB4_27
v_mov_b32_e32 v1, 0
ds_load_b32 v3, v1 offset:48
v_lshlrev_b64 v[1:2], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s2, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v3, v5, v3
global_store_b32 v[1:2], v3, off
.LBB4_27:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v0, s4, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_u32_e32 vcc_lo, s5, v0
s_and_b32 s6, s1, vcc_lo
s_and_saveexec_b32 s0, s6
s_cbranch_execz .LBB4_29
v_mov_b32_e32 v1, 0
ds_load_b32 v3, v1 offset:52
v_lshlrev_b64 v[1:2], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s2, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v3, v5, v3
global_store_b32 v[1:2], v3, off
.LBB4_29:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v0, s4, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_u32_e32 vcc_lo, s5, v0
s_and_b32 s6, s1, vcc_lo
s_and_saveexec_b32 s0, s6
s_cbranch_execz .LBB4_31
v_mov_b32_e32 v1, 0
ds_load_b32 v3, v1 offset:56
v_lshlrev_b64 v[1:2], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s2, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v3, v5, v3
global_store_b32 v[1:2], v3, off
.LBB4_31:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v0, s4, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_u32_e32 vcc_lo, s5, v0
s_and_b32 s0, s1, vcc_lo
s_and_b32 exec_lo, exec_lo, s0
s_cbranch_execz .LBB4_33
v_mov_b32_e32 v1, 0
ds_load_b32 v2, v1 offset:60
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v2, v5, v2
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB4_33:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| void_tiling_Kernel_16u_ | 4,283 | 5,565 | stackv2-00000-of-00015 |
// Demangled: void tiling_Kernel<1u>(float*, float*, int)
Function : _Z13tiling_KernelILj1EEvPfS0_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R6, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR7, c[0x0][0x390] &wr=0x2 ?trans1;
IADD3 R7, PT, PT, R6, UR4, RZ &req={1} ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R7, UR7, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
S2R R8, SR_CTAID.Y &wr=0x0 ?trans1;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x2 ?trans1;
IADD3 R5, PT, PT, R6, R8, RZ &req={0} ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R4, R5, 0x4, R2 &req={1} ?WAIT6_END_GROUP;
LDG.E R4, desc[UR8][R4.64] &req={2} &wr=0x2 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x0 ?trans1;
UIMAD UR6, UR7, UR7, URZ ?trans2;
IMAD R9, R8, UR7, R7 ?trans1;
UMOV UR4, 0x400 ?trans1;
IMAD.WIDE.U32 R2, R7, 0x4, R2 ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P0, PT, R9, UR6, PT ?trans2;
LDG.E R0, desc[UR8][R2.64] &rd=0x1 &wr=0x5 ?trans3;
ISETP.EQ.OR P0, PT, R7, R8, P0 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={0} ?WAIT6_END_GROUP;
LEA R7, R6, UR4, 0x2 ?WAIT5_END_GROUP;
STS [R7], R4 &req={2} &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 EXIT ?trans5;
LDS R5, [UR4] &wr=0x0 ?trans1;
LDC.64 R2, c[0x0][0x388] &req={1} &wr=0x1 ?trans2;
IMAD.WIDE.U32 R2, R9, 0x4, R2 &req={1} ?WAIT4_END_GROUP;
FADD R5, R0, R5 &req={5,0} ?WAIT5_END_GROUP;
STG.E desc[UR8][R2.64], R5 ?trans1;
EXIT ?trans5;
BRA 0x200;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: void tiling_Kernel<1u>(float*, float*, int)
_Z13tiling_KernelILj1EEvPfS0_i:
s_load_b32 s4, s[0:1], 0x10
v_add_nc_u32_e32 v1, s14, v0
s_mov_b32 s2, exec_lo
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_u32_e64 s4, v1
s_cbranch_execz .LBB0_3
s_load_b128 s[0:3], s[0:1], 0x0
v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v3, s15, v0
v_lshl_add_u32 v0, v0, 2, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mov_b32_e32 v4, v2
v_lshlrev_b64 v[5:6], 2, v[1:2]
v_lshlrev_b64 v[3:4], 2, v[3:4]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v3, vcc_lo, s0, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
s_delay_alu instid0(VALU_DEP_4)
v_add_co_u32 v5, vcc_lo, s0, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
v_cmp_ne_u32_e32 vcc_lo, s15, v1
s_clause 0x1
global_load_b32 v7, v[3:4], off
global_load_b32 v5, v[5:6], off
v_mad_u64_u32 v[3:4], null, s15, s4, v[1:2]
s_mul_i32 s4, s4, s4
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_u32_e64 s0, s4, v3
s_delay_alu instid0(VALU_DEP_1)
s_and_b32 s0, vcc_lo, s0
s_waitcnt vmcnt(1)
ds_store_b32 v0, v7
s_waitcnt vmcnt(0) lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_b32 exec_lo, exec_lo, s0
s_cbranch_execz .LBB0_3
ds_load_b32 v6, v2
v_mov_b32_e32 v4, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[3:4]
v_add_co_u32 v0, vcc_lo, s2, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v2, v5, v6
global_store_b32 v[0:1], v2, off
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| void_tiling_Kernel_1u_ | 832 | 898 | stackv2-00000-of-00015 |
// Demangled: void tiling_Kernel<2u>(float*, float*, int)
Function : _Z13tiling_KernelILj2EEvPfS0_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R7, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR7, c[0x0][0x390] &wr=0x2 ?trans1;
S2R R9, SR_TID.X &wr=0x1 ?trans2;
IADD3 R7, PT, PT, R9, R7, R7 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R7, UR7, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
S2R R0, SR_CTAID.Y &wr=0x0 ?trans1;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x2 ?trans1;
IADD3 R0, PT, PT, R0, R0, RZ &req={0} ?WAIT4_END_GROUP;
IADD3 R5, PT, PT, R0, R9, RZ ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R4, R5, 0x4, R2 &req={1} ?WAIT6_END_GROUP;
LDG.E R4, desc[UR8][R4.64] &req={2} &wr=0x2 ?trans1;
IMAD.WIDE.U32 R2, R7, 0x4, R2 ?WAIT5_END_GROUP;
LDG.E R6, desc[UR8][R2.64] &rd=0x0 &wr=0x3 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
UIMAD UR6, UR7, UR7, URZ ?trans2;
IMAD R11, R0, UR7, R7 ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R11.reuse, UR6, PT ?trans1;
IADD3 R13, PT, PT, R11, UR7, RZ ?WAIT4_END_GROUP;
ISETP.EQ.OR P0, PT, R7, R0, P0 ?trans1;
ISETP.GE.U32.AND P1, PT, R13, UR6, PT ?WAIT5_END_GROUP;
ISETP.EQ.OR P1, PT, R7, R0, P1 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?WAIT6_END_GROUP;
@!P0 LDC.64 R2, c[0x0][0x388] &req={0} &wr=0x0 ?trans1;
LEA R9, R9, UR4, 0x2 ?trans1;
@!P0 IMAD.WIDE.U32 R2, R11, 0x4, R2 &req={0} ?WAIT4_END_GROUP;
STS [R9], R4 &req={2} ?trans2;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P0 LDS R5, [UR4] &wr=0x3 ?trans2;
@!P0 FADD R5, R6, R5 &req={3} ?WAIT5_END_GROUP;
@!P0 STG.E desc[UR8][R2.64], R5 &rd=0x0 ?trans1;
@P1 EXIT ?trans5;
LDS R5, [UR4+0x4] &req={0} &wr=0x0 ?trans1;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans2;
IMAD.WIDE.U32 R2, R13, 0x4, R2 &req={1} ?WAIT4_END_GROUP;
FADD R5, R6, R5 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR8][R2.64], R5 ?trans1;
EXIT ?trans5;
BRA 0x290;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: void tiling_Kernel<2u>(float*, float*, int)
_Z13tiling_KernelILj2EEvPfS0_i:
s_load_b32 s4, s[0:1], 0x10
v_lshl_add_u32 v1, s14, 1, v0
s_mov_b32 s2, exec_lo
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_u32_e64 s4, v1
s_cbranch_execz .LBB1_5
s_load_b128 s[0:3], s[0:1], 0x0
s_lshl_b32 s6, s15, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v3, s6, v0
s_mul_i32 s5, s4, s4
v_lshl_add_u32 v0, v0, 2, 0
v_mov_b32_e32 v4, v2
v_lshlrev_b64 v[5:6], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 2, v[3:4]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v3, vcc_lo, s0, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
v_add_co_u32 v5, vcc_lo, s0, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
v_cmp_ne_u32_e64 s0, s6, v1
s_clause 0x1
global_load_b32 v7, v[3:4], off
global_load_b32 v5, v[5:6], off
v_mad_u64_u32 v[3:4], null, s6, s4, v[1:2]
v_cmp_eq_u32_e32 vcc_lo, s6, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_gt_u32_e64 s1, s5, v3
s_and_b32 s0, s0, s1
s_waitcnt vmcnt(1)
ds_store_b32 v0, v7
s_waitcnt vmcnt(0) lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB1_3
ds_load_b32 v6, v2
v_mov_b32_e32 v4, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[3:4]
v_add_co_u32 v0, s0, s2, v0
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v1, s0, s3, v1, s0
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v2, v5, v6
global_store_b32 v[0:1], v2, off
.LBB1_3:
s_or_b32 exec_lo, exec_lo, s1
v_add_nc_u32_e32 v0, s4, v3
s_xor_b32 s1, vcc_lo, -1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_gt_u32_e64 s0, s5, v0
s_and_b32 s0, s1, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 exec_lo, exec_lo, s0
s_cbranch_execz .LBB1_5
v_mov_b32_e32 v1, 0
ds_load_b32 v2, v1 offset:4
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v2, v5, v2
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB1_5:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| void_tiling_Kernel_2u_ | 1,083 | 1,270 | stackv2-00000-of-00015 |
// Demangled: void tiling_Kernel<4u>(float*, float*, int)
Function : _Z13tiling_KernelILj4EEvPfS0_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R9, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR7, c[0x0][0x390] &wr=0x2 ?trans1;
S2R R11, SR_TID.X &wr=0x1 ?trans2;
IMAD R9, R9, 0x4, R11 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R9, UR7, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
S2R R0, SR_CTAID.Y &wr=0x0 ?trans1;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x2 ?trans1;
IMAD.SHL.U32 R0, R0, 0x4, RZ &req={0} ?WAIT5_END_GROUP;
IADD3 R5, PT, PT, R0, R11, RZ ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R4, R5, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
LDG.E R10, desc[UR8][R4.64] &req={2} &wr=0x2 ?trans1;
IMAD.WIDE.U32 R2, R9, 0x4, R2 ?WAIT5_END_GROUP;
LDG.E R8, desc[UR8][R2.64] &rd=0x0 &wr=0x3 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
IMAD R13, R0, UR7, R9 ?trans1;
UIMAD UR6, UR7, UR7, URZ ?WAIT4_END_GROUP;
IADD3 R17, PT, PT, R13.reuse, UR7, RZ ?trans2;
ISETP.GE.U32.AND P1, PT, R13, UR6, PT ?trans2;
IADD3 R19, PT, PT, R17.reuse, UR7, RZ ?trans1;
ISETP.GE.U32.AND P2, PT, R17, UR6, PT ?trans2;
ISETP.EQ.OR P1, PT, R9, R0.reuse, P1 ?trans2;
ISETP.GE.U32.AND P0, PT, R19, UR6, PT ?trans1;
ISETP.EQ.OR P2, PT, R9, R0, P2 ?trans1;
IADD3 R21, PT, PT, R19, UR7, RZ ?WAIT3_END_GROUP;
ISETP.EQ.OR P0, PT, R9, R0, P0 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?trans1;
ISETP.GE.U32.AND P3, PT, R21, UR6, PT ?WAIT4_END_GROUP;
@!P1 LDC.64 R2, c[0x0][0x388] &req={0} &wr=0x0 ?trans1;
LEA R11, R11, UR4, 0x2 ?trans1;
ISETP.EQ.OR P3, PT, R9, R0, P3 ?WAIT6_END_GROUP;
@!P2 LDC.64 R4, c[0x0][0x388] &wr=0x1 ?trans8;
@!P0 LDC.64 R6, c[0x0][0x388] &wr=0x4 ?trans1;
@!P1 IMAD.WIDE.U32 R2, R13, 0x4, R2 &req={0} ?WAIT4_END_GROUP;
@!P2 IMAD.WIDE.U32 R4, R17, 0x4, R4 &req={1} ?WAIT4_END_GROUP;
@!P0 IMAD.WIDE.U32 R6, R19, 0x4, R6 &req={4} ?trans1;
STS [R11], R10 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P1 LDS R15, [UR4] &wr=0x3 ?trans4;
@!P2 LDS R23, [UR4+0x4] &wr=0x0 ?trans4;
@!P0 LDS R25, [UR4+0x8] &wr=0x1 ?trans1;
@!P1 FADD R15, R8.reuse, R15 &req={3} ?trans1;
@!P2 FADD R9, R8, R23 &req={0} ?WAIT4_END_GROUP;
@!P1 STG.E desc[UR8][R2.64], R15 &rd=0x0 ?trans1;
@!P0 FADD R11, R8, R25 &req={1} ?WAIT3_END_GROUP;
@!P2 STG.E desc[UR8][R4.64], R9 &rd=0x0 ?trans4;
@!P0 STG.E desc[UR8][R6.64], R11 &rd=0x0 ?trans1;
@P3 EXIT ?trans5;
LDS R5, [UR4+0xc] &req={0} &wr=0x0 ?trans1;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans2;
IMAD.WIDE.U32 R2, R21, 0x4, R2 &req={1} ?WAIT4_END_GROUP;
FADD R5, R8, R5 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR8][R2.64], R5 ?trans1;
EXIT ?trans5;
BRA 0x390;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: void tiling_Kernel<4u>(float*, float*, int)
_Z13tiling_KernelILj4EEvPfS0_i:
s_load_b32 s4, s[0:1], 0x10
v_lshl_add_u32 v1, s14, 2, v0
s_mov_b32 s2, exec_lo
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_u32_e64 s4, v1
s_cbranch_execz .LBB2_9
s_load_b128 s[0:3], s[0:1], 0x0
s_lshl_b32 s6, s15, 2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v3, s6, v0
s_mul_i32 s5, s4, s4
v_lshl_add_u32 v0, v0, 2, 0
v_mov_b32_e32 v4, v2
v_lshlrev_b64 v[5:6], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 2, v[3:4]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v3, vcc_lo, s0, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
v_add_co_u32 v5, vcc_lo, s0, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
v_cmp_ne_u32_e64 s0, s6, v1
s_clause 0x1
global_load_b32 v7, v[3:4], off
global_load_b32 v5, v[5:6], off
v_mad_u64_u32 v[3:4], null, s6, s4, v[1:2]
v_cmp_eq_u32_e32 vcc_lo, s6, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_gt_u32_e64 s1, s5, v3
s_and_b32 s0, s0, s1
s_waitcnt vmcnt(1)
ds_store_b32 v0, v7
s_waitcnt vmcnt(0) lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB2_3
ds_load_b32 v6, v2
v_mov_b32_e32 v4, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[3:4]
v_add_co_u32 v0, s0, s2, v0
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v1, s0, s3, v1, s0
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v2, v5, v6
global_store_b32 v[0:1], v2, off
.LBB2_3:
s_or_b32 exec_lo, exec_lo, s1
v_add_nc_u32_e32 v0, s4, v3
s_xor_b32 s1, vcc_lo, -1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_gt_u32_e64 s0, s5, v0
s_and_b32 s6, s1, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s0, s6
s_cbranch_execz .LBB2_5
v_mov_b32_e32 v1, 0
ds_load_b32 v3, v1 offset:4
v_lshlrev_b64 v[1:2], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s2, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v3, v5, v3
global_store_b32 v[1:2], v3, off
.LBB2_5:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v0, s4, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_u32_e32 vcc_lo, s5, v0
s_and_b32 s6, s1, vcc_lo
s_and_saveexec_b32 s0, s6
s_cbranch_execz .LBB2_7
v_mov_b32_e32 v1, 0
ds_load_b32 v3, v1 offset:8
v_lshlrev_b64 v[1:2], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s2, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v3, v5, v3
global_store_b32 v[1:2], v3, off
.LBB2_7:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v0, s4, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_u32_e32 vcc_lo, s5, v0
s_and_b32 s0, s1, vcc_lo
s_and_b32 exec_lo, exec_lo, s0
s_cbranch_execz .LBB2_9
v_mov_b32_e32 v1, 0
ds_load_b32 v2, v1 offset:12
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v2, v5, v2
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB2_9:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| void_tiling_Kernel_4u_ | 1,547 | 1,879 | stackv2-00000-of-00015 |
// Demangled: void tiling_Kernel<8u>(float*, float*, int)
Function : _Z13tiling_KernelILj8EEvPfS0_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R18, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR7, c[0x0][0x390] &wr=0x2 ?trans1;
S2R R6, SR_TID.X &wr=0x1 ?trans2;
IMAD R18, R18, 0x8, R6 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R18, UR7, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
S2R R31, SR_CTAID.Y &wr=0x0 ?trans1;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x2 ?trans1;
IMAD.SHL.U32 R31, R31, 0x8, RZ &req={0} ?WAIT5_END_GROUP;
IADD3 R5, PT, PT, R31, R6, RZ ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R4, R5, 0x4, R2 &req={1} ?WAIT6_END_GROUP;
LDG.E R4, desc[UR8][R4.64] &req={2} &wr=0x2 ?trans1;
IMAD.WIDE.U32 R2, R18, 0x4, R2 ?WAIT5_END_GROUP;
LDG.E R0, desc[UR8][R2.64] &rd=0x0 &wr=0x3 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
IMAD R16, R31, UR7, R18 ?trans1;
UIMAD UR6, UR7, UR7, URZ ?WAIT4_END_GROUP;
IADD3 R20, PT, PT, R16.reuse, UR7, RZ ?trans2;
ISETP.GE.U32.AND P1, PT, R16, UR6, PT ?trans2;
IADD3 R37, PT, PT, R20.reuse, UR7, RZ ?trans1;
ISETP.GE.U32.AND P0, PT, R20, UR6, PT ?trans2;
ISETP.EQ.OR P1, PT, R18.reuse, R31.reuse, P1 ?trans1;
IADD3 R35, PT, PT, R37.reuse, UR7, RZ ?trans1;
ISETP.GE.U32.AND P2, PT, R37, UR6, PT ?trans1;
ISETP.EQ.OR P0, PT, R18, R31, P0 ?WAIT2_END_GROUP;
IADD3 R33, PT, PT, R35.reuse, UR7, RZ ?trans1;
ISETP.GE.U32.AND P5, PT, R35, UR6, PT ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?trans1;
ISETP.EQ.OR P2, PT, R18.reuse, R31.reuse, P2 ?trans1;
IADD3 R29, PT, PT, R33.reuse, UR7, RZ ?trans1;
ISETP.GE.U32.AND P6, PT, R33, UR6, PT ?trans1;
ISETP.EQ.OR P5, PT, R18, R31.reuse, P5 ?trans2;
LEA R3, R6, UR4, 0x2 &req={0} ?trans1;
@!P1 LDC.64 R14, c[0x0][0x388] &wr=0x0 ?trans1;
IADD3 R27, PT, PT, R29.reuse, UR7, RZ ?trans1;
ISETP.GE.U32.AND P3, PT, R29, UR6, PT ?trans1;
ISETP.EQ.OR P6, PT, R18, R31, P6 ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P4, PT, R27, UR6, PT ?trans1;
ISETP.EQ.OR P3, PT, R18.reuse, R31.reuse, P3 ?trans1;
@!P0 LDC.64 R12, c[0x0][0x388] &wr=0x1 ?trans3;
ISETP.EQ.OR P4, PT, R18, R31, P4 ?WAIT5_END_GROUP;
@!P2 LDC.64 R10, c[0x0][0x388] &wr=0x4 ?trans8;
@!P5 LDC.64 R8, c[0x0][0x388] &wr=0x5 ?trans1;
@!P1 IMAD.WIDE.U32 R14, R16, 0x4, R14 &req={0} ?trans1;
IADD3 R16, PT, PT, R27, UR7, RZ ?WAIT6_END_GROUP;
@!P6 LDC.64 R6, c[0x0][0x388] &wr=0x0 ?trans1;
@!P0 IMAD.WIDE.U32 R12, R20, 0x4, R12 &req={1} ?WAIT4_END_GROUP;
@!P2 IMAD.WIDE.U32 R10, R37, 0x4, R10 &req={4} ?WAIT4_END_GROUP;
@!P5 IMAD.WIDE.U32 R8, R35, 0x4, R8 &req={5} ?WAIT4_END_GROUP;
@!P6 IMAD.WIDE.U32 R6, R33, 0x4, R6 &req={0} ?trans1;
STS [R3], R4 &req={2} &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans8;
@!P3 LDC.64 R4, c[0x0][0x388] &req={0} &wr=0x0 ?trans8;
@!P4 LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans1;
@!P1 LDS R22, [UR4] &wr=0x3 ?trans4;
@!P0 LDS R24, [UR4+0x4] &wr=0x2 ?trans1;
@!P3 IMAD.WIDE.U32 R4, R29, 0x4, R4 &req={0} ?WAIT3_END_GROUP;
@!P2 LDS R17, [UR4+0x8] &wr=0x0 ?trans4;
@!P5 LDS R25, [UR4+0xc] &wr=0x4 ?trans1;
@!P4 IMAD.WIDE.U32 R2, R27, 0x4, R2 &req={1} ?WAIT3_END_GROUP;
@!P6 LDS R23, [UR4+0x10] &wr=0x1 ?trans4;
@!P3 LDS R21, [UR4+0x14] &wr=0x5 ?trans4;
@!P4 LDS R19, [UR4+0x18] &wr=0x5 ?trans1;
@!P1 FADD R22, R0.reuse, R22 &req={3} ?trans1;
@!P0 FADD R20, R0, R24 &req={2} ?WAIT4_END_GROUP;
@!P1 STG.E desc[UR8][R14.64], R22 &rd=0x2 ?trans1;
ISETP.GE.U32.AND P1, PT, R16, UR6, PT ?trans1;
@!P2 FADD R17, R0, R17 &req={0} ?trans2;
@!P0 STG.E desc[UR8][R12.64], R20 &rd=0x2 ?trans2;
ISETP.EQ.OR P1, PT, R18, R31, P1 ?trans1;
@!P5 FADD R25, R0.reuse, R25 &req={4} ?trans1;
@!P2 STG.E desc[UR8][R10.64], R17 &rd=0x2 ?trans1;
@!P6 FADD R23, R0, R23 &req={1} ?WAIT3_END_GROUP;
@!P5 STG.E desc[UR8][R8.64], R25 &rd=0x2 ?trans1;
@!P3 FADD R21, R0, R21 &req={5} ?WAIT3_END_GROUP;
@!P6 STG.E desc[UR8][R6.64], R23 &rd=0x2 ?trans1;
@!P4 FADD R19, R0, R19 ?WAIT3_END_GROUP;
@!P3 STG.E desc[UR8][R4.64], R21 &rd=0x2 ?trans4;
@!P4 STG.E desc[UR8][R2.64], R19 &rd=0x2 ?trans1;
@P1 EXIT ?trans5;
LDS R5, [UR4+0x1c] &req={2} &wr=0x0 ?trans1;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans2;
IMAD.WIDE.U32 R16, R16, 0x4, R2 &req={1} ?WAIT4_END_GROUP;
FADD R5, R0, R5 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR8][R16.64], R5 ?trans1;
EXIT ?trans5;
BRA 0x590;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: void tiling_Kernel<8u>(float*, float*, int)
_Z13tiling_KernelILj8EEvPfS0_i:
s_load_b32 s4, s[0:1], 0x10
v_lshl_add_u32 v1, s14, 3, v0
s_mov_b32 s2, exec_lo
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_u32_e64 s4, v1
s_cbranch_execz .LBB3_17
s_load_b128 s[0:3], s[0:1], 0x0
s_lshl_b32 s6, s15, 3
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v3, s6, v0
s_mul_i32 s5, s4, s4
v_lshl_add_u32 v0, v0, 2, 0
v_mov_b32_e32 v4, v2
v_lshlrev_b64 v[5:6], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 2, v[3:4]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v3, vcc_lo, s0, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
v_add_co_u32 v5, vcc_lo, s0, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
v_cmp_ne_u32_e64 s0, s6, v1
s_clause 0x1
global_load_b32 v7, v[3:4], off
global_load_b32 v5, v[5:6], off
v_mad_u64_u32 v[3:4], null, s6, s4, v[1:2]
v_cmp_eq_u32_e32 vcc_lo, s6, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_gt_u32_e64 s1, s5, v3
s_and_b32 s0, s0, s1
s_waitcnt vmcnt(1)
ds_store_b32 v0, v7
s_waitcnt vmcnt(0) lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB3_3
ds_load_b32 v6, v2
v_mov_b32_e32 v4, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[3:4]
v_add_co_u32 v0, s0, s2, v0
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v1, s0, s3, v1, s0
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v2, v5, v6
global_store_b32 v[0:1], v2, off
.LBB3_3:
s_or_b32 exec_lo, exec_lo, s1
v_add_nc_u32_e32 v0, s4, v3
s_xor_b32 s1, vcc_lo, -1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_gt_u32_e64 s0, s5, v0
s_and_b32 s6, s1, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s0, s6
s_cbranch_execz .LBB3_5
v_mov_b32_e32 v1, 0
ds_load_b32 v3, v1 offset:4
v_lshlrev_b64 v[1:2], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s2, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v3, v5, v3
global_store_b32 v[1:2], v3, off
.LBB3_5:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v0, s4, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_u32_e32 vcc_lo, s5, v0
s_and_b32 s6, s1, vcc_lo
s_and_saveexec_b32 s0, s6
s_cbranch_execz .LBB3_7
v_mov_b32_e32 v1, 0
ds_load_b32 v3, v1 offset:8
v_lshlrev_b64 v[1:2], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s2, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v3, v5, v3
global_store_b32 v[1:2], v3, off
.LBB3_7:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v0, s4, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_u32_e32 vcc_lo, s5, v0
s_and_b32 s6, s1, vcc_lo
s_and_saveexec_b32 s0, s6
s_cbranch_execz .LBB3_9
v_mov_b32_e32 v1, 0
ds_load_b32 v3, v1 offset:12
v_lshlrev_b64 v[1:2], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s2, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v3, v5, v3
global_store_b32 v[1:2], v3, off
.LBB3_9:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v0, s4, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_u32_e32 vcc_lo, s5, v0
s_and_b32 s6, s1, vcc_lo
s_and_saveexec_b32 s0, s6
s_cbranch_execz .LBB3_11
v_mov_b32_e32 v1, 0
ds_load_b32 v3, v1 offset:16
v_lshlrev_b64 v[1:2], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s2, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v3, v5, v3
global_store_b32 v[1:2], v3, off
.LBB3_11:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v0, s4, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_u32_e32 vcc_lo, s5, v0
s_and_b32 s6, s1, vcc_lo
s_and_saveexec_b32 s0, s6
s_cbranch_execz .LBB3_13
v_mov_b32_e32 v1, 0
ds_load_b32 v3, v1 offset:20
v_lshlrev_b64 v[1:2], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s2, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v3, v5, v3
global_store_b32 v[1:2], v3, off
.LBB3_13:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v0, s4, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_u32_e32 vcc_lo, s5, v0
s_and_b32 s6, s1, vcc_lo
s_and_saveexec_b32 s0, s6
s_cbranch_execz .LBB3_15
v_mov_b32_e32 v1, 0
ds_load_b32 v3, v1 offset:24
v_lshlrev_b64 v[1:2], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s2, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v3, v5, v3
global_store_b32 v[1:2], v3, off
.LBB3_15:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v0, s4, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_u32_e32 vcc_lo, s5, v0
s_and_b32 s0, s1, vcc_lo
s_and_b32 exec_lo, exec_lo, s0
s_cbranch_execz .LBB3_17
v_mov_b32_e32 v1, 0
ds_load_b32 v2, v1 offset:28
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v2, v5, v2
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB3_17:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| void_tiling_Kernel_8u_ | 2,518 | 3,108 | stackv2-00000-of-00015 |
// Demangled: markFilterEdges_gpu(int*, int*, int*, int*, int)
Function : _Z19markFilterEdges_gpuPiS_S_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x3a0] &wr=0x2 ?trans1;
IMAD R0, R0, UR4, R3 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R6, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU UR5, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R8, c[0x0][0x390] &wr=0x3 ?trans1;
LDCU UR12, c[0x0][0x3a0] &wr=0x4 ?trans1;
LDCU.64 UR8, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR10, c[0x0][0x398] &wr=0x0 ?trans1;
UIMAD UR4, UR4, UR5, URZ &req={1} ?WAIT12_END_GROUP;
IMAD.WIDE R2, R0, 0x4, R6 &req={0} ?WAIT6_END_GROUP;
LDG.E R3, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans2;
IMAD.WIDE R4, R3, 0x4, R8 &req={3,2} ?WAIT6_END_GROUP;
LDG.E R4, desc[UR6][R4.64] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x220 ?trans1;
SHF.R.S32.HI R13, RZ, 0x1f, R0 ?trans1;
ISETP.NE.AND P0, PT, R4, -0x1, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x200 ?trans5;
LEA R4, P0, R0, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R5, R0, UR9, R13, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R3, desc[UR6][R4.64] &wr=0x2 ?trans2;
IMAD.WIDE R2, R3, 0x4, R8 &req={2} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR6][R2.64] &wr=0x2 ?trans1;
HFMA2 R11, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
ISETP.NE.AND P0, PT, R2, -0x1, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x210 ?trans5;
MOV R11, RZ ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 &req={4} ?trans5;
LEA R2, P0, R0, UR10, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R3, R0.reuse, UR11, R13, 0x2, P0 ?trans2;
IADD3 R0, PT, PT, R0, UR4, RZ ?WAIT3_END_GROUP;
STG.E desc[UR6][R2.64], R11 &rd=0x1 ?trans2;
ISETP.GE.AND P0, PT, R0, UR12, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x100 &req={1} ?trans5;
EXIT ?trans5;
BRA 0x290;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: markFilterEdges_gpu(int*, int*, int*, int*, int)
_Z19markFilterEdges_gpuPiS_S_S_i:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x34
s_load_b32 s14, s[0:1], 0x20
s_add_u32 s2, s0, 40
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s12, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s12, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s14, v1
s_cbranch_execz .LBB0_7
s_load_b32 s2, s[2:3], 0x0
s_load_b256 s[4:11], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_mov_b32 s1, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
s_waitcnt lgkmcnt(0)
s_mul_i32 s2, s2, s12
s_ashr_i32 s3, s2, 31
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[12:13], s[2:3], 2
.LBB0_2:
s_delay_alu instid0(VALU_DEP_1)
v_add_co_u32 v4, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
s_mov_b32 s3, exec_lo
global_load_b32 v4, v[4:5], off
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v5, 31, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[4:5], 2, v[4:5]
v_add_co_u32 v4, vcc_lo, s8, v4
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s9, v5, vcc_lo
global_load_b32 v0, v[4:5], off
s_waitcnt vmcnt(0)
v_cmp_ne_u32_e64 s0, -1, v0
v_cmpx_eq_u32_e32 -1, v0
s_cbranch_execz .LBB0_4
v_add_co_u32 v4, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
s_and_not1_b32 s0, s0, exec_lo
s_mov_b32 s15, 1
global_load_b32 v4, v[4:5], off
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v5, 31, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[4:5], 2, v[4:5]
v_add_co_u32 v4, vcc_lo, s8, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
v_add_co_ci_u32_e32 v5, vcc_lo, s9, v5, vcc_lo
global_load_b32 v0, v[4:5], off
s_waitcnt vmcnt(0)
v_cmp_ne_u32_e32 vcc_lo, -1, v0
s_and_b32 s16, vcc_lo, exec_lo
s_or_b32 s0, s0, s16
.LBB0_4:
s_or_b32 exec_lo, exec_lo, s3
v_mov_b32_e32 v0, s15
s_and_saveexec_b32 s3, s0
v_mov_b32_e32 v0, 0
s_or_b32 exec_lo, exec_lo, s3
v_add_nc_u32_e32 v1, s2, v1
v_add_co_u32 v4, vcc_lo, s10, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s11, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_le_i32_e32 vcc_lo, s14, v1
v_add_co_u32 v2, s0, v2, s12
v_add_co_ci_u32_e64 v3, s0, s13, v3, s0
s_or_b32 s1, vcc_lo, s1
global_store_b32 v[4:5], v0, off
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execnz .LBB0_2
.LBB0_7:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| markFilterEdges_gpu | 1,133 | 1,388 | stackv2-00000-of-00015 |
// Demangled: gpu_computation(double*, double*, int)
Function : _Z15gpu_computationPdS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_TID.X &wr=0x1 ?trans7;
LDC R4, c[0x0][0x390] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x1c0 ?trans1;
S2R R10, SR_TID.Y &wr=0x3 ?trans6;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R3, c[0x0][0x360] &wr=0x1 ?trans8;
S2UR UR5, SR_CTAID.Y &wr=0x3 ?trans1;
LEA.HI R0, R4, R4, RZ, 0x1 &req={2} ?WAIT4_END_GROUP;
SHF.R.S32.HI R6, RZ, 0x1, R0 ?WAIT3_END_GROUP;
LDC R9, c[0x0][0x364] &wr=0x3 ?trans1;
IADD3 R8, PT, PT, R6, -0x2, RZ ?trans1;
IMAD R3, R3, UR4, R2 &req={1} ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, R3.reuse, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R3, R8, PT ?WAIT4_END_GROUP;
ISETP.NE.AND P1, PT, R7, R6, PT ?trans1;
IMAD R2, R9, UR5, R10 &req={3} ?trans1;
IADD3 R10, PT, PT, R4, -0x1, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R2, 0x1, RZ ?WAIT7_END_GROUP;
@P0 BRA P1, 0x190 &req={0} ?trans5;
ISETP.NE.AND P0, PT, R2, R8, PT ?WAIT5_END_GROUP;
ISETP.EQ.OR P0, PT, R0, R6, !P0 ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R7, R10, P0 ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
BRA 0x1b0 ?trans5;
ISETP.GE.AND P0, PT, R7, R10, PT ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
ISETP.GE.AND P0, PT, R0, R10, PT ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDC.64 R10, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD R3, R2, R4, R3 ?trans1;
SHF.R.S32.HI R5, RZ, 0x1f, R4 ?WAIT3_END_GROUP;
IMAD.WIDE R10, R3, 0x8, R10 &req={0} ?trans2;
IADD.64 R2, R4, R4 ?WAIT3_END_GROUP;
LDG.E.64 R20, desc[UR4][R10.64] &req={1} &wr=0x2 ?trans2;
LEA R28, P0, R2, R10, 0x3 ?trans1;
IMAD.WIDE R26, R4, 0x8, R10 ?trans1;
LDG.E.64 R22, desc[UR4][R10.64+0x8] &wr=0x2 ?trans2;
LEA.HI.X R29, R2, R11, R3, 0x3, P0 ?trans2;
LDG.E.64 R24, desc[UR4][R10.64+0x10] &rd=0x0 &wr=0x3 ?trans4;
LDG.E.64 R18, desc[UR4][R26.64] &wr=0x4 ?trans4;
LDG.E.64 R16, desc[UR4][R26.64+0x8] &wr=0x5 ?trans4;
LDG.E.64 R14, desc[UR4][R26.64+0x10] &wr=0x3 ?trans4;
LDG.E.64 R2, desc[UR4][R28.64] &wr=0x3 ?trans4;
LDG.E.64 R8, desc[UR4][R28.64+0x8] &wr=0x3 ?trans4;
LDG.E.64 R12, desc[UR4][R28.64+0x10] &wr=0x3 ?trans1;
MUFU.RCP64H R31, 9 &wr=0x1 ?trans1;
MOV.64 R34, 0x4022000000000000 ?WAIT2_END_GROUP;
HFMA2 R30, -RZ, RZ, 0, 5.9604644775390625e-08 ?WAIT6_END_GROUP;
DFMA R32, R30, -R34, 1 &req={1} &wr=0x1 ?trans1;
BSSY.RECONVERGENT B0, 0x8a0 ?trans1;
IMAD R0, R0, R4, R7 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R32, R32, R32, R32 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R32, R30, R32, R30 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R32, -R34, 1 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R20, R22 &req={2} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R20, R24 &req={3} &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R20, R18 &req={4} &wr=0x5 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R18, R16 &req={5} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R14, R16, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R2, R14, R2 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R2, R2, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R32, R10, R32 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, R2, R12 &req={0} &wr=0x0 ?trans2;
FSETP.GEU.AND P1, PT, |R13|, 6.5827683646048100446e-37, PT &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R2, R12, R10 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R2, -9, R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R10, R8, R2 &req={0} &wr=0x0 ?trans2;
FFMA R5, RZ, 2.53125, R3 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R5|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA P1, 0x890 ?trans5;
MOV R2, 0x870 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x8e0 ?trans5;
MOV R2, R12 ?trans1;
MOV R3, R13 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans2;
IMAD.WIDE R4, R0, 0x8, R4 &req={0} ?WAIT5_END_GROUP;
STG.E.64 desc[UR4][R4.64], R2 ?trans1;
EXIT ?trans5;
MOV.64 R4, 0x3ff2000000000000 ?trans2;
MOV R11, R13 ?trans1;
HFMA2 R19, -RZ, RZ, 0.0045166015625, 0 ?trans1;
MOV R10, R12 ?trans1;
MUFU.RCP64H R7, R5 &wr=0x0 ?trans1;
HFMA2 R6, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
LOP3.LUT R3, R11.reuse, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B1, 0xfc0 ?trans1;
FSETP.GEU.AND P1, PT, |R11|, 1.469367938527859385e-39, PT ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P0, PT, R3, 0x40200000, PT ?WAIT5_END_GROUP;
SEL R19, R19, 0x63400000, !P0 ?trans1;
DFMA R8, R6, -R4, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R8, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R6, R8, R6 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@!P1 LOP3.LUT R8, R19.reuse, 0x80000000, R11.reuse, 0xf8, !PT &req={0} ?trans2;
LOP3.LUT R7, R19, 0x800fffff, R11, 0xf8, !PT ?trans2;
@!P1 LOP3.LUT R9, R8, 0x100000, RZ, 0xfc, !PT ?trans1;
MOV R6, R10 ?trans1;
@!P1 MOV R8, RZ ?WAIT15_END_GROUP;
NOP ?WAIT11_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R14, -R4, 1 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 DFMA R6, R6, 2, -R8 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R14, R16, R14 &req={0} &rd=0x0 &wr=0x2 ?trans2;
MOV R14, R3 &req={0} ?trans1;
@!P1 LOP3.LUT R14, R7, 0x7ff00000, RZ, 0xc0, !PT &req={1} ?trans1;
HFMA2 R15, -RZ, RZ, 2.0625, 0 ?WAIT3_END_GROUP;
IADD3 R18, PT, PT, R14, -0x1, RZ ?trans2;
IADD3 R20, PT, PT, R15, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R18, 0x7feffffe, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R20, 0x7feffffe, P0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R16, R6 &req={2} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R8, -R4, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R16, R12, R8 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0xeb0 &req={1,0} ?trans5;
IADD3 R3, PT, PT, R3, -0x40200000, RZ ?WAIT5_END_GROUP;
VIMNMX.S32 R3, R3, -0x46a00000, !PT ?WAIT5_END_GROUP;
VIMNMX.S32 R10, R3, 0x46a00000, PT ?WAIT5_END_GROUP;
IADD3 R19, PT, PT, -R19, R10, RZ ?trans1;
MOV R10, RZ ?WAIT3_END_GROUP;
IADD3 R11, PT, PT, R19, 0x7fe00000, RZ ?WAIT6_END_GROUP;
DMUL R12, R8, R10 &wr=0x0 ?trans2;
FSETP.GTU.AND P0, PT, |R13|, 1.469367938527859385e-39, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0xfb0 ?trans5;
DFMA R4, R8, -R4, R6 &wr=0x0 ?trans1;
MOV R10, RZ ?trans1;
FSETP.NEU.AND P0, PT, R5.reuse, RZ, PT &req={0} ?trans1;
LOP3.LUT R3, R5, 0x40220000, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R11, R3, R11, RZ, 0xfc, !PT ?WAIT4_END_GROUP;
@!P0 BRA 0xfb0 ?trans5;
IADD3 R5, PT, PT, -R19.reuse, RZ, RZ ?trans1;
MOV R4, RZ ?trans1;
IADD3 R19, PT, PT, -R19, -0x43300000, RZ ?WAIT5_END_GROUP;
DFMA R4, R12, -R4, R8 &wr=0x0 ?trans2;
FSETP.NEU.AND P0, PT, |R5|, R19, PT &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL.RP R8, R8, R10 &wr=0x0 ?trans2;
LOP3.LUT R3, R9, R3, RZ, 0x3c, !PT &req={0} ?trans1;
FSEL R12, R8, R12, !P0 ?WAIT4_END_GROUP;
FSEL R13, R3, R13, !P0 ?trans1;
BRA 0xfb0 ?trans6;
DSETP.NAN.AND P0, PT, R10, R10, PT &wr=0x0 ?trans2;
@P0 BRA 0xf90 &req={0} ?trans5;
ISETP.NE.AND P0, PT, R14, R15, PT ?trans1;
MOV.64 R12, 0xfff8000000000000 ?WAIT12_END_GROUP;
@!P0 BRA 0xfb0 ?trans5;
ISETP.NE.AND P0, PT, R14, 0x7ff00000, PT ?trans1;
LOP3.LUT R10, R11, 0x40220000, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
ISETP.EQ.OR P0, PT, R15, RZ, !P0 ?trans1;
LOP3.LUT R13, R10, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@P0 LOP3.LUT R3, R13, 0x7ff00000, RZ, 0xfc, !PT ?trans1;
@!P0 MOV R12, RZ ?trans1;
@P0 MOV R12, RZ ?WAIT3_END_GROUP;
@P0 MOV R13, R3 ?trans1;
BRA 0xfb0 ?trans6;
LOP3.LUT R13, R11, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R12, R10 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R2 0x0 ?trans5;
BRA 0xfe0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: gpu_computation(double*, double*, int)
_Z15gpu_computationPdS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s4, s[0:1], 0x10
v_and_b32_e32 v3, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s2, 0xffff
s_lshr_b32 s2, s2, 16
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[1:2], null, s14, s3, v[3:4]
v_bfe_u32 v4, v0, 10, 10
s_lshr_b32 s3, s4, 31
s_add_i32 s3, s4, s3
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
s_ashr_i32 s3, s3, 1
v_add_nc_u32_e32 v0, 1, v1
v_mad_u64_u32 v[2:3], null, s15, s2, v[4:5]
s_add_i32 s7, s3, -1
s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
v_cmp_eq_u32_e32 vcc_lo, s7, v0
v_cmp_eq_u32_e64 s2, s3, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v3, 1, v2
s_or_b32 s2, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_xor_b32 s5, s2, -1
s_and_saveexec_b32 s6, s2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_cmp_ne_u32_e32 vcc_lo, s7, v3
v_cmp_ne_u32_e64 s2, s3, v3
s_and_not1_b32 s3, s5, exec_lo
s_and_b32 s2, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, s2, exec_lo
s_or_b32 s5, s3, s2
s_or_b32 exec_lo, exec_lo, s6
s_and_saveexec_b32 s2, s5
s_cbranch_execz .LBB0_5
v_max_i32_e32 v4, v0, v3
s_add_i32 s2, s4, -1
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_i32_e32 vcc_lo, s2, v4
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_5
v_mul_lo_u32 v16, v2, s4
s_load_b128 s[0:3], s[0:1], 0x0
v_add_nc_u32_e32 v18, 2, v1
v_mul_lo_u32 v14, v3, s4
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_add_nc_u32_e32 v4, v16, v1
v_add_nc_u32_e32 v6, v16, v0
v_add_nc_u32_e32 v8, v16, v18
s_delay_alu instid0(VALU_DEP_4)
v_add_nc_u32_e32 v2, v14, v1
v_add_nc_u32_e32 v10, v14, v0
v_ashrrev_i32_e32 v5, 31, v4
v_ashrrev_i32_e32 v7, 31, v6
v_ashrrev_i32_e32 v9, 31, v8
v_ashrrev_i32_e32 v3, 31, v2
v_ashrrev_i32_e32 v11, 31, v10
v_lshlrev_b64 v[4:5], 3, v[4:5]
v_lshlrev_b64 v[6:7], 3, v[6:7]
v_lshlrev_b64 v[8:9], 3, v[8:9]
v_lshlrev_b64 v[2:3], 3, v[2:3]
v_lshlrev_b64 v[10:11], 3, v[10:11]
v_add_nc_u32_e32 v14, v14, v18
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, vcc_lo, s0, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
v_add_co_u32 v6, vcc_lo, s0, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
v_add_co_u32 v8, vcc_lo, s0, v8
s_clause 0x1
global_load_b64 v[4:5], v[4:5], off
global_load_b64 v[6:7], v[6:7], off
v_add_co_ci_u32_e32 v9, vcc_lo, s1, v9, vcc_lo
v_add_co_u32 v2, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
global_load_b64 v[8:9], v[8:9], off
v_add_co_u32 v12, vcc_lo, s0, v10
v_add_co_ci_u32_e32 v13, vcc_lo, s1, v11, vcc_lo
v_ashrrev_i32_e32 v15, 31, v14
v_lshl_add_u32 v19, s4, 1, v16
s_clause 0x1
global_load_b64 v[12:13], v[12:13], off
global_load_b64 v[2:3], v[2:3], off
v_lshlrev_b64 v[14:15], 3, v[14:15]
v_add_nc_u32_e32 v16, v19, v1
v_add_nc_u32_e32 v0, v19, v0
v_add_nc_u32_e32 v18, v19, v18
s_delay_alu instid0(VALU_DEP_4)
v_add_co_u32 v14, vcc_lo, s0, v14
v_add_co_ci_u32_e32 v15, vcc_lo, s1, v15, vcc_lo
v_ashrrev_i32_e32 v17, 31, v16
v_ashrrev_i32_e32 v1, 31, v0
v_ashrrev_i32_e32 v19, 31, v18
global_load_b64 v[14:15], v[14:15], off
v_lshlrev_b64 v[16:17], 3, v[16:17]
v_lshlrev_b64 v[0:1], 3, v[0:1]
v_lshlrev_b64 v[18:19], 3, v[18:19]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v16, vcc_lo, s0, v16
v_add_co_ci_u32_e32 v17, vcc_lo, s1, v17, vcc_lo
s_delay_alu instid0(VALU_DEP_4)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b64 v[16:17], v[16:17], off
v_add_co_u32 v18, vcc_lo, s0, v18
global_load_b64 v[0:1], v[0:1], off
v_add_co_ci_u32_e32 v19, vcc_lo, s1, v19, vcc_lo
global_load_b64 v[18:19], v[18:19], off
s_waitcnt vmcnt(7)
v_add_f64 v[4:5], v[4:5], v[6:7]
s_waitcnt vmcnt(6)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_f64 v[4:5], v[4:5], v[8:9]
s_waitcnt vmcnt(4)
v_add_f64 v[2:3], v[4:5], v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_f64 v[2:3], v[2:3], v[12:13]
s_waitcnt vmcnt(3)
v_add_f64 v[2:3], v[2:3], v[14:15]
s_waitcnt vmcnt(2)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_f64 v[2:3], v[2:3], v[16:17]
s_waitcnt vmcnt(1)
v_add_f64 v[0:1], v[2:3], v[0:1]
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[0:1], v[0:1], v[18:19]
v_div_scale_f64 v[2:3], null, 0x40220000, 0x40220000, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f64_e32 v[4:5], v[2:3]
s_waitcnt_depctr 0xfff
v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
v_div_scale_f64 v[6:7], vcc_lo, v[0:1], 0x40220000, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[8:9], v[6:7], v[4:5]
v_fma_f64 v[2:3], -v[2:3], v[8:9], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fmas_f64 v[2:3], v[2:3], v[4:5], v[8:9]
v_div_fixup_f64 v[0:1], v[2:3], 0x40220000, v[0:1]
v_add_co_u32 v2, vcc_lo, s2, v10
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v11, vcc_lo
global_store_b64 v[2:3], v[0:1], off
.LBB0_5:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| gpu_computation | 5,092 | 3,238 | stackv2-00000-of-00015 |
// Demangled: cuda_insertion_sort(int*, int)
Function : _Z19cuda_insertion_sortPii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R0, c[0x0][0x388] &wr=0x1 ?trans2;
ISETP.GE.AND P0, PT, R0, 0x2, PT &req={1} ?WAIT13_END_GROUP;
@!P0 EXIT &req={0} ?trans5;
HFMA2 R0, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
MOV R16, RZ ?trans1;
PRMT R2, RZ, 0x7610, R2 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans1;
PRMT R3, RZ, 0x7610, R3 ?WAIT7_END_GROUP;
ISETP.GE.U32.AND P0, PT, R16, 0x7, PT ?trans1;
IADD3 R3, PT, PT, R3, 0x1, RZ ?trans1;
MOV R7, R0 &req={3} ?WAIT11_END_GROUP;
@!P0 BRA 0x520 &req={2,1} ?trans5;
LDC.64 R8, c[0x0][0x380] &wr=0x1 ?trans8;
LDC.64 R4, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R8, R0, 0x4, R8 &req={1} ?WAIT5_END_GROUP;
LDG.E R17, desc[UR4][R8.64] &req={0} &rd=0x0 &wr=0x5 ?trans1;
LOP3.LUT R6, R0.reuse, 0xfffffff8, RZ, 0xc0, !PT ?trans2;
IADD3 R7, PT, PT, R0, -0x4, RZ ?trans2;
IADD3 R6, PT, PT, -R6, RZ, RZ &req={2} ?WAIT7_END_GROUP;
IADD3 R11, PT, PT, R7, 0x3, RZ ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R10, R11, 0x4, R4 ?WAIT5_END_GROUP;
LDG.E R19, desc[UR4][R10.64] &wr=0x2 ?trans1;
IADD3 R9, PT, PT, R7.reuse, 0x4, RZ &req={1,0} ?trans2;
IADD3 R13, PT, PT, R7, 0x2, RZ ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R8, R9, 0x4, R4 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R12, R13, 0x4, R4 ?trans1;
ISETP.GE.AND P0, PT, R17, R19, PT &req={5,2} ?WAIT13_END_GROUP;
@!P0 STG.E desc[UR4][R8.64], R19 &rd=0x0 ?trans4;
@!P0 STG.E desc[UR4][R10.64], R17 ?trans4;
LDG.E R21, desc[UR4][R12.64] &wr=0x2 ?trans1;
IADD3 R15, PT, PT, R7, 0x1, RZ ?trans1;
@!P0 MOV R19, R17 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R14, R15, 0x4, R4 ?trans1;
ISETP.GE.AND P0, PT, R19, R21, PT &req={2} ?WAIT13_END_GROUP;
@!P0 STG.E desc[UR4][R10.64], R21 &rd=0x0 ?trans4;
@!P0 STG.E desc[UR4][R12.64], R19 ?trans4;
LDG.E R23, desc[UR4][R14.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R8, R7, 0x4, R4 ?trans1;
@!P0 MOV R21, R19 &req={0} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R21, R23, PT &req={2} ?WAIT13_END_GROUP;
@!P0 STG.E desc[UR4][R12.64], R23 &rd=0x0 ?trans4;
@!P0 STG.E desc[UR4][R14.64], R21 ?trans4;
LDG.E R17, desc[UR4][R8.64] &wr=0x2 ?trans1;
IADD3 R11, PT, PT, R7, -0x1, RZ ?trans1;
@!P0 MOV R23, R21 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R10, R11, 0x4, R4 ?trans1;
ISETP.GE.AND P0, PT, R23, R17, PT &req={2} ?WAIT13_END_GROUP;
@!P0 STG.E desc[UR4][R14.64], R17 &rd=0x0 ?trans4;
@!P0 STG.E desc[UR4][R8.64], R23 ?trans4;
LDG.E R19, desc[UR4][R10.64] &wr=0x2 ?trans1;
IADD3 R13, PT, PT, R7, -0x2, RZ ?trans1;
@!P0 MOV R17, R23 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R12, R13, 0x4, R4 ?trans1;
ISETP.GE.AND P0, PT, R17, R19, PT &req={2} ?WAIT13_END_GROUP;
@!P0 STG.E desc[UR4][R8.64], R19 &rd=0x0 ?trans4;
@!P0 STG.E desc[UR4][R10.64], R17 ?trans4;
LDG.E R21, desc[UR4][R12.64] &wr=0x2 ?trans1;
IADD3 R15, PT, PT, R7, -0x3, RZ ?trans1;
@!P0 MOV R19, R17 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R14, R15, 0x4, R4 ?trans1;
ISETP.GE.AND P0, PT, R19, R21, PT &req={2} ?WAIT13_END_GROUP;
@!P0 STG.E desc[UR4][R10.64], R21 &rd=0x0 ?trans4;
@!P0 STG.E desc[UR4][R12.64], R19 ?trans4;
LDG.E R18, desc[UR4][R14.64] &wr=0x2 ?trans1;
IADD3 R9, PT, PT, R7, -0x4, RZ ?trans1;
@!P0 MOV R21, R19 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R8, R9, 0x4, R4 ?trans1;
ISETP.GE.AND P0, PT, R21, R18, PT &req={2} ?WAIT13_END_GROUP;
@!P0 STG.E desc[UR4][R12.64], R18 &rd=0x0 ?trans4;
@!P0 STG.E desc[UR4][R14.64], R21 ?trans4;
LDG.E R17, desc[UR4][R8.64] &wr=0x2 ?trans1;
IADD3 R6, PT, PT, R6, 0x8, RZ ?trans2;
IADD3 R7, PT, PT, R7, -0x8, RZ ?trans1;
@!P0 MOV R18, R21 &req={0} ?WAIT2_END_GROUP;
ISETP.NE.AND P1, PT, R6, RZ, PT ?WAIT3_END_GROUP;
ISETP.GE.AND P0, PT, R18, R17, PT &req={2} ?WAIT13_END_GROUP;
@!P0 STG.E desc[UR4][R14.64], R17 &rd=0x0 ?trans4;
@!P0 STG.E desc[UR4][R8.64], R18 &rd=0x1 ?trans1;
@!P0 MOV R17, R18 &req={0} ?trans1;
@P1 BRA 0x140 ?trans6;
IADD3 R7, PT, PT, R7, 0x4, RZ ?WAIT7_END_GROUP;
LOP3.LUT P0, RZ, R0, 0x7, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x960 ?trans5;
LOP3.LUT R5, R3, 0x7, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT P0, RZ, R5.reuse, 0x3, RZ, 0xc0, !PT ?trans2;
IADD3 R4, PT, PT, R5, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P1, PT, R4, 0x3, PT ?WAIT13_END_GROUP;
@!P1 BRA 0x770 ?trans5;
LDC.64 R14, c[0x0][0x380] &wr=0x2 ?trans1;
IADD3 R9, PT, PT, R7.reuse, -0x1, RZ &req={1} ?trans1;
IMAD.WIDE.U32 R4, R7, 0x4, R14 &req={2} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R8, R9, 0x4, R14 ?trans1;
LDG.E R6, desc[UR4][R4.64] &req={0} &wr=0x2 ?trans4;
LDG.E R17, desc[UR4][R8.64] &wr=0x2 ?trans1;
IADD3 R11, PT, PT, R7, -0x2, RZ ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R10, R11, 0x4, R14 ?trans1;
ISETP.GE.AND P1, PT, R6, R17, PT &req={2} ?WAIT13_END_GROUP;
@!P1 STG.E desc[UR4][R4.64], R17 &rd=0x0 ?trans4;
@!P1 STG.E desc[UR4][R8.64], R6 ?trans4;
LDG.E R19, desc[UR4][R10.64] &wr=0x2 ?trans1;
IADD3 R13, PT, PT, R7, -0x3, RZ ?trans1;
@!P1 MOV R17, R6 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R12, R13, 0x4, R14 ?trans1;
ISETP.GE.AND P1, PT, R17, R19, PT &req={2} ?WAIT13_END_GROUP;
@!P1 STG.E desc[UR4][R8.64], R19 &rd=0x0 ?trans4;
@!P1 STG.E desc[UR4][R10.64], R17 ?trans4;
LDG.E R21, desc[UR4][R12.64] &wr=0x2 ?trans1;
IADD3 R7, PT, PT, R7, -0x4, RZ ?trans1;
@!P1 MOV R19, R17 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R7, 0x4, R14 ?trans1;
ISETP.GE.AND P1, PT, R19, R21, PT &req={2} ?WAIT13_END_GROUP;
@!P1 STG.E desc[UR4][R10.64], R21 &rd=0x0 ?trans4;
@!P1 STG.E desc[UR4][R12.64], R19 &rd=0x2 ?trans4;
LDG.E R6, desc[UR4][R4.64] &wr=0x3 ?trans1;
@!P1 MOV R21, R19 &req={0} ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R21, R6, PT &req={3} ?WAIT13_END_GROUP;
@!P1 STG.E desc[UR4][R12.64], R6 &rd=0x2 ?trans4;
@!P1 STG.E desc[UR4][R4.64], R21 &rd=0x2 ?trans2;
@!P0 BRA 0x960 ?trans5;
LOP3.LUT P1, RZ, R2.reuse, 0x3, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R4, R2, 0x1, RZ, 0xc0, !PT &req={2} ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P0, PT, R4, 0x1, PT ?WAIT6_END_GROUP;
@!P1 BRA 0x8c0 ?trans7;
LDC.64 R4, c[0x0][0x380] &wr=0x2 ?trans1;
IADD3 R11, PT, PT, R7.reuse, -0x1, RZ ?trans1;
IMAD.WIDE.U32 R8, R7, 0x4, R4 &req={2,1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R10, R11, 0x4, R4 ?trans1;
LDG.E R6, desc[UR4][R8.64] &req={0} &wr=0x2 ?trans4;
LDG.E R13, desc[UR4][R10.64] &wr=0x2 ?trans1;
IADD3 R7, PT, PT, R7, -0x2, RZ ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R4, R7, 0x4, R4 ?trans1;
ISETP.GE.AND P1, PT, R6, R13, PT &req={2} ?WAIT13_END_GROUP;
@!P1 STG.E desc[UR4][R8.64], R13 &rd=0x0 ?trans4;
@!P1 STG.E desc[UR4][R10.64], R6 &rd=0x2 ?trans4;
LDG.E R12, desc[UR4][R4.64] &wr=0x3 ?trans1;
@!P1 MOV R13, R6 &req={0} ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R13, R12, PT &req={3} ?WAIT13_END_GROUP;
@!P1 STG.E desc[UR4][R10.64], R12 &rd=0x2 ?trans4;
@!P1 STG.E desc[UR4][R4.64], R13 &rd=0x2 ?trans2;
@!P0 BRA 0x960 ?trans5;
LDC.64 R8, c[0x0][0x380] &req={1} &wr=0x1 ?trans1;
IADD3 R11, PT, PT, R7.reuse, -0x1, RZ &req={2} ?trans1;
IMAD.WIDE.U32 R4, R7, 0x4, R8 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R6, R11, 0x4, R8 ?trans2;
LDG.E R9, desc[UR4][R4.64] &req={0} &wr=0x2 ?trans4;
LDG.E R8, desc[UR4][R6.64] &wr=0x2 ?trans2;
ISETP.GE.AND P0, PT, R9, R8, PT &req={2} ?WAIT13_END_GROUP;
@!P0 STG.E desc[UR4][R4.64], R8 &rd=0x3 ?trans4;
@!P0 STG.E desc[UR4][R6.64], R9 &rd=0x3 ?trans2;
LDCU UR6, c[0x0][0x388] &wr=0x4 ?trans1;
IADD3 R0, PT, PT, R0, 0x1, RZ ?trans2;
IADD3 R2, PT, PT, R2, 0x1, RZ ?trans2;
IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R0, UR6, PT &req={4} ?WAIT13_END_GROUP;
@P0 BRA 0x90 ?trans5;
EXIT &req={0} ?trans5;
BRA 0x9d0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: cuda_insertion_sort(int*, int)
_Z19cuda_insertion_sortPii:
s_load_b32 s6, s[0:1], 0x8
s_mov_b32 s7, 2
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s6, 2
s_cbranch_scc1 .LBB0_7
s_load_b64 s[0:1], s[0:1], 0x0
v_mov_b32_e32 v2, 0
s_mov_b32 s8, 1
s_waitcnt lgkmcnt(0)
s_add_u32 s0, s0, 4
s_addc_u32 s1, s1, 0
.LBB0_2:
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b64 s[2:3], s[0:1]
s_mov_b32 s9, s7
.LBB0_3:
global_load_b64 v[0:1], v2, s[2:3] offset:-4
s_add_u32 s4, s2, -4
s_addc_u32 s5, s3, -1
s_waitcnt vmcnt(0)
v_cmp_ge_i32_e32 vcc_lo, v1, v0
s_cbranch_vccnz .LBB0_5
v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v4, v0
global_store_b64 v2, v[3:4], s[2:3] offset:-4
.LBB0_5:
s_add_i32 s9, s9, -1
s_mov_b64 s[2:3], s[4:5]
s_cmp_lt_i32 s9, 2
s_cbranch_scc0 .LBB0_3
s_add_i32 s8, s8, 1
s_add_i32 s7, s7, 1
s_add_u32 s0, s0, 4
s_addc_u32 s1, s1, 0
s_cmp_eq_u32 s8, s6
s_cbranch_scc0 .LBB0_2
.LBB0_7:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| cuda_insertion_sort | 4,374 | 534 | stackv2-00000-of-00015 |
// Demangled: add_me(int*, int*, int*)
Function : _Z6add_mePiS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R0, SR_TID.X &wr=0x0 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC R9, c[0x0][0x360] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans8;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD R9, R9, UR6, R0 &req={0} ?WAIT7_END_GROUP;
LDC.64 R6, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD.WIDE R2, R9, 0x4, R2 &req={2} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
IMAD.WIDE R4, R9, 0x4, R4 &req={3} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE R6, R9, 0x4, R6 &req={0} ?trans1;
IADD3 R9, PT, PT, R2, R5, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x110;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: add_me(int*, int*, int*)
_Z6add_mePiS_S_:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| add_me | 500 | 496 | stackv2-00000-of-00015 |
// Demangled: increment_atomic(int*)
Function : _Z16increment_atomicPi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R5, SR_TID.X &wr=0x0 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x0 ?trans1;
HFMA2 R7, -RZ, RZ, 0, 5.9604644775390625e-08 ?WAIT7_END_GROUP;
LDC R0, c[0x0][0x360] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
IMAD R0, R0, UR4, R5 &req={0} ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans3;
IMAD.HI R4, R0, 0x51eb851f, RZ ?WAIT5_END_GROUP;
SHF.R.U32.HI R5, RZ, 0x1f, R4 ?WAIT4_END_GROUP;
LEA.HI.SX32 R5, R4, R5, 0x1b ?WAIT5_END_GROUP;
IMAD R5, R5, -0x64, R0 ?WAIT4_END_GROUP;
IMAD.WIDE R2, R5, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
REDG.E.ADD.STRONG.GPU desc[UR4][R2.64], R7 &req={0} ?trans1;
EXIT ?trans5;
BRA 0xf0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: increment_atomic(int*)
_Z16increment_atomicPi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x14
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_mul_hi_i32 v0, 0x51eb851f, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshrrev_b32_e32 v2, 31, v0
v_ashrrev_i32_e32 v0, 5, v0
v_add_nc_u32_e32 v0, v0, v2
v_mov_b32_e32 v2, 1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v0, 0x64, v0
v_sub_nc_u32_e32 v0, v1, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_atomic_add_u32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| increment_atomic | 444 | 539 | stackv2-00000-of-00015 |
// Demangled: increment_naive(int*)
Function : _Z15increment_naivePi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R5, SR_TID.X &wr=0x0 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x0 ?trans8;
LDC R0, c[0x0][0x360] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
IMAD R0, R0, UR4, R5 &req={0} ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans3;
IMAD.HI R4, R0, 0x51eb851f, RZ ?WAIT5_END_GROUP;
SHF.R.U32.HI R5, RZ, 0x1f, R4 ?WAIT4_END_GROUP;
LEA.HI.SX32 R5, R4, R5, 0x1b ?WAIT5_END_GROUP;
IMAD R5, R5, -0x64, R0 ?WAIT4_END_GROUP;
IMAD.WIDE R2, R5, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R2.64] &req={0} &wr=0x2 ?trans2;
IADD3 R5, PT, PT, R0, 0x1, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R5 ?trans1;
EXIT ?trans5;
BRA 0x100;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: increment_naive(int*)
_Z15increment_naivePi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x14
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_mul_hi_i32 v0, 0x51eb851f, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshrrev_b32_e32 v2, 31, v0
v_ashrrev_i32_e32 v0, 5, v0
v_add_nc_u32_e32 v0, v0, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v0, 0x64, v0
v_sub_nc_u32_e32 v0, v1, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b32 v2, v[0:1], off
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v2, 1, v2
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| increment_naive | 468 | 567 | stackv2-00000-of-00015 |
// Demangled: add(float const*, float*, int)
Function : _Z3addPKfPfi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R7, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R7, R0, UR4, R7 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD.WIDE R2, R7, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R3, desc[UR4][R2.64] &req={1} &wr=0x3 ?trans1;
IMAD.WIDE R4, R7, 0x4, R4 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R3 &req={3} ?trans1;
EXIT ?trans5;
BRA 0x100;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: add(float const*, float*, int)
_Z3addPKfPfi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[0:3], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| add | 472 | 472 | stackv2-00000-of-00015 |
// Demangled: void testKernel<MyInt8Array>(MyInt8Array*, unsigned int*, unsigned int)
Function : _Z10testKernelI11MyInt8ArrayEvPT_Pjj
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x2 ?trans7;
LDC R7, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R7, R7, UR4, R2 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R7, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.SHL.U32 R2, R2, 0x4, RZ ?trans2;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT3_END_GROUP;
LOP3.LUT R2, R2, 0x1c, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
IADD.64 R2, R2, R4 &req={0} ?trans2;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans5;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
MOV R6, RZ ?trans1;
HFMA2 R9, -RZ, RZ, 0, 0 ?trans1;
MOV R13, RZ ?trans1;
HFMA2 R11, -RZ, RZ, 0, 0 ?trans1;
MOV R17, RZ ?trans1;
IADD3 R6, PT, PT, R6, 0x32, RZ ?trans1;
HFMA2 R15, -RZ, RZ, 0, 0 ?WAIT2_END_GROUP;
HFMA2 R19, -RZ, RZ, 0, 0 ?trans2;
IMAD.SHL.U32 R0, R2, 0x4, RZ &req={2} ?trans2;
IMAD.WIDE.U32 R2, R7, 0x20, R4 &req={0} ?WAIT4_END_GROUP;
HFMA2 R5, -RZ, RZ, 0, 0 ?trans1;
MOV R7, RZ ?trans1;
ISETP.EQ.AND P6, PT, R0.reuse, RZ, PT ?trans1;
ISETP.EQ.AND P5, PT, R0.reuse, 0x4, PT ?trans1;
ISETP.EQ.AND P4, PT, R0.reuse, 0x8, PT ?trans1;
ISETP.EQ.AND P3, PT, R0.reuse, 0xc, PT ?trans1;
ISETP.EQ.AND P2, PT, R0.reuse, 0x10, PT ?trans1;
ISETP.EQ.AND P1, PT, R0.reuse, 0x14, PT ?trans1;
ISETP.EQ.AND P0, PT, R0, 0x18, PT ?WAIT7_END_GROUP;
@P6 MOV R9, R6.reuse ?trans1;
ISETP.EQ.AND P6, PT, R0, 0x1c, PT ?trans1;
@P5 MOV R5, R6.reuse ?trans1;
@P4 MOV R7, R6.reuse ?trans1;
@P3 MOV R11, R6.reuse ?trans1;
@P2 MOV R13, R6.reuse ?trans1;
@P1 MOV R15, R6.reuse ?trans1;
@P0 MOV R17, R6.reuse ?trans1;
STG.E desc[UR4][R2.64], R9 ?trans4;
STG.E desc[UR4][R2.64+0x4], R5 ?trans2;
@P6 MOV R19, R6 ?WAIT2_END_GROUP;
STG.E desc[UR4][R2.64+0x8], R7 ?trans4;
STG.E desc[UR4][R2.64+0xc], R11 ?trans4;
STG.E desc[UR4][R2.64+0x10], R13 ?trans4;
STG.E desc[UR4][R2.64+0x14], R15 ?trans4;
STG.E desc[UR4][R2.64+0x18], R17 ?trans4;
STG.E desc[UR4][R2.64+0x1c], R19 ?trans1;
EXIT ?trans5;
BRA 0x350;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: void testKernel<MyInt8Array>(MyInt8Array*, unsigned int*, unsigned int)
_Z10testKernelI11MyInt8ArrayEvPT_Pjj:
s_clause 0x1
s_load_b32 s4, s[2:3], 0x24
s_load_b32 s5, s[2:3], 0x10
v_and_b32_e32 v3, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[1:2], null, s15, s4, v[3:4]
s_mov_b32 s4, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_u32_e64 s5, v1
s_cbranch_execz .LBB1_2
s_load_b128 s[4:7], s[2:3], 0x0
v_and_b32_e32 v2, 7, v3
s_load_b64 s[0:1], s[0:1], 0x4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
v_lshlrev_b32_e32 v2, 2, v2
s_waitcnt lgkmcnt(0)
global_load_b32 v4, v2, s[6:7]
s_lshr_b32 s0, s0, 16
s_mul_i32 s0, s0, s1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_mul_lo_u32 v2, s0, v3
v_bfe_u32 v3, v0, 10, 10
v_bfe_u32 v0, v0, 20, 10
v_mad_u32_u24 v2, v3, s1, v2
s_delay_alu instid0(VALU_DEP_1)
v_add_lshl_u32 v0, v2, v0, 5
v_mov_b32_e32 v2, 0
ds_store_2addr_b32 v0, v2, v2 offset0:2 offset1:3
ds_store_2addr_b32 v0, v2, v2 offset1:1
ds_store_2addr_b32 v0, v2, v2 offset0:6 offset1:7
ds_store_2addr_b32 v0, v2, v2 offset0:4 offset1:5
s_waitcnt vmcnt(0)
v_lshl_add_u32 v3, v4, 2, v0
ds_load_b32 v4, v3
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v4, 50, v4
ds_store_b32 v3, v4
ds_load_2addr_b32 v[3:4], v0 offset0:4 offset1:5
ds_load_2addr_b32 v[9:10], v0 offset0:2 offset1:3
ds_load_2addr_b32 v[7:8], v0 offset1:1
ds_load_2addr_b32 v[5:6], v0 offset0:6 offset1:7
v_lshlrev_b64 v[0:1], 5, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
s_waitcnt lgkmcnt(1)
global_store_b128 v[0:1], v[7:10], off
s_waitcnt lgkmcnt(0)
global_store_b128 v[0:1], v[3:6], off offset:16
.LBB1_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| void_testKernel_MyInt8Array_ | 1,267 | 1,020 | stackv2-00000-of-00015 |
// Demangled: void testKernel<MyInt8Tuple>(MyInt8Tuple*, unsigned int*, unsigned int)
Function : _Z10testKernelI11MyInt8TupleEvPT_Pjj
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_TID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x2fc] &wr=0x2 ?trans6;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR7, c[0x0][0x390] &wr=0x3 ?trans1;
LDCU UR4, c[0x0][0x2f8] &wr=0x4 ?trans6;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans1;
MOV R3, UR5 &req={2} ?trans1;
MOV R2, UR4 &req={4} ?trans1;
IMAD R0, R0, UR6, R5 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, UR7, PT &req={3} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU.64 UR4, c[0x0][0x388] &wr=0x0 ?trans1;
IMAD.SHL.U32 R18, R5, 0x4, RZ ?trans2;
HFMA2 R19, -RZ, RZ, 0, 0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans2;
LOP3.LUT R18, R18, 0x1c, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
IADD.64 R18, R18, UR4 &req={0} ?WAIT7_END_GROUP;
LDG.E R18, desc[UR6][R18.64] &req={1} &wr=0x2 ?trans1;
IADD.64 R4, R2.reuse, 0x10 ?trans2;
IADD.64 R6, R2.reuse, 0x14 ?trans2;
IADD.64 R8, R2, 0x18 ?trans2;
CS2R R10, SRZ ?trans1;
CS2R R12, SRZ ?trans1;
CS2R R14, SRZ ?trans1;
CS2R R16, SRZ ?trans1;
MOV R22, RZ ?trans1;
ISETP.GT.AND P0, PT, R18, 0x2, PT &req={2} ?WAIT5_END_GROUP;
P2R R23, PR, RZ, 0x1 ?WAIT8_END_GROUP;
ISETP.NE.AND P0, PT, R23, RZ, PT ?trans1;
BSSY.RECONVERGENT B0, 0x450 ?WAIT12_END_GROUP;
@P0 BRA 0x2d0 ?trans5;
ISETP.NE.AND P0, PT, R18, RZ, PT ?trans1;
MOV.64 R20, R2 ?WAIT12_END_GROUP;
@!P0 BRA 0x440 ?trans5;
IADD3 R19, PT, PT, R18, -0x1, RZ ?WAIT5_END_GROUP;
VIMNMX.U32 R19, R19, 0x2, PT ?WAIT5_END_GROUP;
IMAD.SHL.U32 R19, R19, 0x4, RZ ?WAIT4_END_GROUP;
LDC R20, c[0x2][R19] &wr=0x0 ?trans2;
SHF.R.S32.HI R21, RZ, 0x1f, R20 &req={0} ?WAIT4_END_GROUP;
BRX R20 -0x290 ?trans5;
IADD.64 R20, R2, 0x8 ?trans2;
BRA 0x440 ?trans6;
IADD.64 R20, R2, 0x4 ?trans2;
BRA 0x440 ?trans6;
ISETP.GT.AND P0, PT, R18, 0x4, PT ?WAIT13_END_GROUP;
@P0 BRA 0x390 ?trans5;
IADD3 R19, PT, PT, R18, -0x3, RZ ?WAIT5_END_GROUP;
VIMNMX.U32 R19, R19, 0x2, PT ?WAIT5_END_GROUP;
IMAD.SHL.U32 R19, R19, 0x4, RZ ?WAIT4_END_GROUP;
LDC R20, c[0x2][R19+0xc] &wr=0x0 ?trans2;
SHF.R.S32.HI R21, RZ, 0x1f, R20 &req={0} ?WAIT4_END_GROUP;
BRX R20 -0x350 ?trans5;
MOV.64 R20, R4 ?trans2;
BRA 0x440 ?trans6;
IADD.64 R20, R2, 0xc ?trans2;
BRA 0x440 ?trans6;
IADD3 R19, PT, PT, R18, -0x5, RZ ?WAIT5_END_GROUP;
VIMNMX.U32 R19, R19, 0x2, PT ?WAIT5_END_GROUP;
IMAD.SHL.U32 R19, R19, 0x4, RZ ?WAIT4_END_GROUP;
LDC R20, c[0x2][R19+0x18] &wr=0x0 ?trans2;
SHF.R.S32.HI R21, RZ, 0x1f, R20 &req={0} ?WAIT4_END_GROUP;
BRX R20 -0x3f0 ?trans5;
MOV.64 R20, R8 ?trans2;
BRA 0x440 ?trans6;
MOV.64 R20, R6 ?trans2;
BRA 0x440 ?trans6;
IADD.64 R20, R2, 0x1c ?WAIT8_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU UR5, c[0x0][0x2fc] &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0x8c0 ?trans1;
LDCU UR4, c[0x0][0x2f8] &wr=0x0 ?trans2;
IADD.64 R20, R20, -UR4 &req={0} ?WAIT6_END_GROUP;
ISETP.EQ.AND P2, PT, R20.reuse, RZ, PT ?trans1;
ISETP.EQ.AND P0, PT, R20.reuse, 0x4, PT ?trans1;
ISETP.EQ.AND P1, PT, R20.reuse, 0x8, PT ?trans1;
ISETP.EQ.AND P3, PT, R20.reuse, 0x10, PT ?trans1;
ISETP.EQ.AND P4, PT, R20.reuse, 0x14, PT ?trans1;
ISETP.EQ.AND P5, PT, R20.reuse, 0x18, PT ?trans1;
ISETP.EQ.AND P6, PT, R20, 0x1c, PT ?trans1;
P2R R21, PR, RZ, 0x1 ?WAIT6_END_GROUP;
@P2 MOV R19, R10 ?trans1;
ISETP.EQ.AND P2, PT, R20.reuse, 0xc, PT ?trans1;
@P0 MOV R19, R11 ?trans1;
@P1 MOV R19, R12 ?trans1;
ISETP.EQ.AND P0, PT, R20, RZ, PT ?WAIT10_END_GROUP;
@P2 MOV R19, R13 ?trans1;
@P3 MOV R19, R14 ?trans1;
@P4 MOV R19, R15 ?trans1;
@P5 MOV R19, R16 ?trans1;
@P6 MOV R19, R17 ?WAIT5_END_GROUP;
IADD3 R19, PT, PT, R19, 0x1, RZ ?WAIT5_END_GROUP;
@P0 MOV R10, R19.reuse ?trans1;
ISETP.NE.AND P0, PT, R21, RZ, PT ?trans1;
@P1 MOV R12, R19.reuse ?trans1;
@P2 MOV R13, R19.reuse ?trans1;
@P3 MOV R14, R19.reuse ?trans1;
@P4 MOV R15, R19.reuse ?trans1;
@P5 MOV R16, R19.reuse ?trans1;
@P6 MOV R17, R19 ?WAIT7_END_GROUP;
@P0 MOV R11, R19 ?trans1;
ISETP.NE.AND P0, PT, R23, RZ, PT ?WAIT13_END_GROUP;
@P0 BRA 0x740 ?trans5;
ISETP.NE.AND P0, PT, R18, RZ, PT ?trans1;
MOV.64 R20, R2 ?WAIT12_END_GROUP;
@!P0 BRA 0x8b0 ?trans5;
IADD3 R19, PT, PT, R18, -0x1, RZ ?WAIT5_END_GROUP;
VIMNMX.U32 R19, R19, 0x2, PT ?WAIT5_END_GROUP;
IMAD.SHL.U32 R19, R19, 0x4, RZ ?WAIT4_END_GROUP;
LDC R20, c[0x2][R19+0x24] &wr=0x0 ?trans2;
SHF.R.S32.HI R21, RZ, 0x1f, R20 &req={0} ?WAIT4_END_GROUP;
BRX R20 -0x700 ?trans5;
IADD.64 R20, R2, 0x8 ?trans2;
BRA 0x8b0 ?trans6;
IADD.64 R20, R2, 0x4 ?trans2;
BRA 0x8b0 ?trans6;
ISETP.GT.AND P0, PT, R18, 0x4, PT ?WAIT13_END_GROUP;
@P0 BRA 0x810 ?trans5;
IADD3 R19, PT, PT, R18, -0x3, RZ ?WAIT5_END_GROUP;
VIMNMX.U32 R19, R19, 0x2, PT ?WAIT5_END_GROUP;
IMAD.SHL.U32 R19, R19, 0x4, RZ ?WAIT4_END_GROUP;
LDC R20, c[0x2][R19+0x30] &wr=0x0 ?trans2;
SHF.R.S32.HI R21, RZ, 0x1f, R20 &req={0} ?WAIT4_END_GROUP;
BRX R20 -0x7c0 ?trans5;
IADD.64 R4, R2, 0x10 ?WAIT4_END_GROUP;
MOV.64 R20, R4 ?trans2;
BRA 0x8b0 ?trans6;
IADD.64 R20, R2, 0xc ?trans2;
BRA 0x8b0 ?trans6;
ISETP.NE.AND P0, PT, R18, 0x5, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x890 ?trans5;
ISETP.NE.AND P0, PT, R18, 0x6, PT ?WAIT13_END_GROUP;
@!P0 IADD.64 R8, R2, 0x18 ?WAIT4_END_GROUP;
@!P0 MOV.64 R20, R8 ?trans2;
@!P0 BRA 0x8b0 ?trans6;
IADD.64 R20, R2, 0x1c ?trans2;
BRA 0x8b0 ?trans6;
IADD.64 R6, R2, 0x14 ?WAIT4_END_GROUP;
MOV.64 R20, R6 ?WAIT8_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU UR5, c[0x0][0x2fc] &wr=0x0 ?trans1;
IADD3 R22, PT, PT, R22, 0x2, RZ ?trans1;
IADD.64 R20, R20, -UR4 &req={0} ?WAIT6_END_GROUP;
ISETP.EQ.AND P2, PT, R20.reuse, RZ, PT ?trans1;
ISETP.EQ.AND P0, PT, R20.reuse, 0x4, PT ?trans1;
ISETP.EQ.AND P1, PT, R20.reuse, 0x8, PT ?trans1;
ISETP.EQ.AND P3, PT, R20.reuse, 0x10, PT ?trans1;
ISETP.EQ.AND P4, PT, R20.reuse, 0x14, PT ?trans1;
ISETP.EQ.AND P5, PT, R20.reuse, 0x18, PT ?trans1;
ISETP.EQ.AND P6, PT, R20, 0x1c, PT ?trans1;
P2R R21, PR, RZ, 0x1 ?WAIT6_END_GROUP;
@P2 MOV R19, R10 ?trans1;
ISETP.EQ.AND P2, PT, R20.reuse, 0xc, PT ?trans1;
@P0 MOV R19, R11 ?trans1;
@P1 MOV R19, R12 ?trans1;
ISETP.EQ.AND P0, PT, R20, RZ, PT ?WAIT10_END_GROUP;
@P2 MOV R19, R13 ?trans1;
@P3 MOV R19, R14 ?trans1;
@P4 MOV R19, R15 ?trans1;
@P5 MOV R19, R16 ?trans1;
@P6 MOV R19, R17 ?WAIT5_END_GROUP;
IADD3 R19, PT, PT, R19, 0x1, RZ ?WAIT5_END_GROUP;
@P0 MOV R10, R19.reuse ?trans1;
ISETP.NE.AND P0, PT, R21, RZ, PT ?trans1;
@P1 MOV R12, R19.reuse ?trans1;
@P2 MOV R13, R19.reuse ?trans1;
@P3 MOV R14, R19.reuse ?trans1;
@P4 MOV R15, R19.reuse ?trans1;
@P5 MOV R16, R19.reuse ?trans1;
@P6 MOV R17, R19 ?WAIT7_END_GROUP;
@P0 MOV R11, R19 ?trans1;
ISETP.NE.AND P0, PT, R22, 0x32, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1d0 ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans2;
IMAD.WIDE.U32 R2, R0, 0x20, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R10 ?trans4;
STG.E desc[UR6][R2.64+0x4], R11 ?trans4;
STG.E desc[UR6][R2.64+0x8], R12 ?trans4;
STG.E desc[UR6][R2.64+0xc], R13 ?trans4;
STG.E desc[UR6][R2.64+0x10], R14 ?trans4;
STG.E desc[UR6][R2.64+0x14], R15 ?trans4;
STG.E desc[UR6][R2.64+0x18], R16 ?trans4;
STG.E desc[UR6][R2.64+0x1c], R17 ?trans1;
EXIT ?trans5;
BRA 0xb80;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: void testKernel<MyInt8Tuple>(MyInt8Tuple*, unsigned int*, unsigned int)
_Z10testKernelI11MyInt8TupleEvPT_Pjj:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_u32_e64 s3, v1
s_cbranch_execz .LBB0_32
s_load_b128 s[0:3], s[0:1], 0x0
v_and_b32_e32 v0, 7, v0
v_mov_b32_e32 v2, 0
s_delay_alu instid0(VALU_DEP_2)
v_lshlrev_b32_e32 v0, 2, v0
s_waitcnt lgkmcnt(0)
global_load_b32 v0, v0, s[2:3]
s_mov_b32 s2, 50
s_clause 0x7
scratch_store_b32 off, v2, off offset:4
scratch_store_b32 off, v2, off offset:8
scratch_store_b32 off, v2, off offset:12
scratch_store_b32 off, v2, off offset:16
scratch_store_b32 off, v2, off offset:20
scratch_store_b32 off, v2, off offset:24
scratch_store_b32 off, v2, off offset:28
scratch_store_b32 off, v2, off offset:32
.LBB0_2:
s_mov_b32 s4, 0
s_mov_b32 s3, exec_lo
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e32 2, v0
s_xor_b32 s3, exec_lo, s3
s_cbranch_execz .LBB0_18
s_mov_b32 s5, 0
s_mov_b32 s4, exec_lo
v_cmpx_lt_i32_e32 4, v0
s_xor_b32 s4, exec_lo, s4
s_cbranch_execz .LBB0_11
s_mov_b32 s6, 0
s_mov_b32 s5, exec_lo
v_cmpx_lt_i32_e32 5, v0
s_xor_b32 s5, exec_lo, s5
s_cbranch_execz .LBB0_8
s_mov_b32 s6, -1
s_mov_b32 s7, exec_lo
v_cmpx_eq_u32_e32 6, v0
v_mov_b32_e32 v2, 28
s_xor_b32 s6, exec_lo, -1
s_or_b32 exec_lo, exec_lo, s7
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 s6, s6, exec_lo
.LBB0_8:
s_and_not1_saveexec_b32 s5, s5
v_mov_b32_e32 v2, 24
s_or_b32 exec_lo, exec_lo, s5
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 s5, s6, exec_lo
.LBB0_11:
s_and_not1_saveexec_b32 s4, s4
s_cbranch_execz .LBB0_17
s_mov_b32 s6, exec_lo
v_cmpx_lt_i32_e32 3, v0
s_xor_b32 s6, exec_lo, s6
v_mov_b32_e32 v2, 20
s_and_not1_saveexec_b32 s6, s6
v_mov_b32_e32 v2, 16
s_or_b32 exec_lo, exec_lo, s6
.LBB0_17:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s4
s_and_b32 s4, s5, exec_lo
.LBB0_18:
s_and_not1_saveexec_b32 s3, s3
s_cbranch_execz .LBB0_28
s_mov_b32 s5, exec_lo
v_cmpx_lt_i32_e32 0, v0
s_xor_b32 s5, exec_lo, s5
s_cbranch_execz .LBB0_25
s_mov_b32 s6, exec_lo
v_cmpx_lt_i32_e32 1, v0
s_xor_b32 s6, exec_lo, s6
v_mov_b32_e32 v2, 12
s_and_not1_saveexec_b32 s6, s6
v_mov_b32_e32 v2, 8
s_or_b32 exec_lo, exec_lo, s6
.LBB0_25:
s_or_saveexec_b32 s5, s5
s_mov_b32 s6, s4
s_xor_b32 exec_lo, exec_lo, s5
v_cmp_ne_u32_e32 vcc_lo, 0, v0
v_mov_b32_e32 v2, 4
s_and_not1_b32 s6, s4, exec_lo
s_and_b32 s7, vcc_lo, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s6, s6, s7
s_or_b32 exec_lo, exec_lo, s5
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
s_and_not1_b32 s4, s4, exec_lo
s_and_b32 s5, s6, exec_lo
s_or_b32 s4, s4, s5
.LBB0_28:
s_or_b32 exec_lo, exec_lo, s3
s_and_saveexec_b32 s3, s4
v_mov_b32_e32 v2, 32
s_or_b32 exec_lo, exec_lo, s3
scratch_load_b32 v3, v2, off
s_add_i32 s2, s2, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s2, 0
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v3, 1, v3
scratch_store_b32 v2, v3, off
s_cbranch_scc0 .LBB0_2
s_clause 0x7
scratch_load_b32 v3, off, off offset:4
scratch_load_b32 v4, off, off offset:8
scratch_load_b32 v5, off, off offset:12
scratch_load_b32 v6, off, off offset:16
scratch_load_b32 v7, off, off offset:20
scratch_load_b32 v8, off, off offset:24
scratch_load_b32 v9, off, off offset:28
scratch_load_b32 v10, off, off offset:32
v_mov_b32_e32 v2, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 5, v[1:2]
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(4)
global_store_b128 v[0:1], v[3:6], off
s_waitcnt vmcnt(0)
global_store_b128 v[0:1], v[7:10], off offset:16
.LBB0_32:
s_endpgm
| void_testKernel_MyInt8Tuple_ | 4,051 | 1,998 | stackv2-00000-of-00015 |
// Demangled: vecadd(int*, int*, int*)
Function : _Z6vecaddPiS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R9, SR_CTAID.X &wr=0x1 ?trans2;
ISETP.GT.U32.AND P0, PT, R9, 0xfffe, PT &req={1} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans7;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x4 ?trans1;
IMAD.WIDE.U32 R2, R9, 0x4, R2 &req={1} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={2} &wr=0x2 ?trans1;
IMAD.WIDE.U32 R4, R9, 0x4, R4 &req={3} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R6, R9, 0x4, R6 &req={4} ?WAIT4_END_GROUP;
IMAD R9, R2, R5, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x100;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: vecadd(int*, int*, int*)
_Z6vecaddPiS_S_:
s_cmp_gt_i32 s15, 0xfffe
s_cbranch_scc1 .LBB0_2
s_clause 0x1
s_load_b64 s[8:9], s[0:1], 0x10
s_load_b128 s[4:7], s[0:1], 0x0
s_mov_b32 s2, s15
s_ashr_i32 s3, s15, 31
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[0:1], s[2:3], 2
s_waitcnt lgkmcnt(0)
s_add_u32 s2, s8, s0
s_addc_u32 s3, s9, s1
s_add_u32 s6, s6, s0
s_addc_u32 s7, s7, s1
s_add_u32 s0, s4, s0
s_addc_u32 s1, s5, s1
s_load_b32 s0, s[0:1], 0x0
s_load_b32 s1, s[6:7], 0x0
s_waitcnt lgkmcnt(0)
s_mul_i32 s0, s1, s0
s_delay_alu instid0(SALU_CYCLE_1)
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s0
global_store_b32 v0, v1, s[2:3]
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| vecadd | 486 | 399 | stackv2-00000-of-00015 |
// Demangled: fractal(unsigned char*, int, int, int, double, double, int)
Function : _Z7fractalPhiiiddi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R3, c[0x0][0x360] &wr=0x1 ?trans8;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD R2, R3, UR4, R2 &req={1} ?WAIT2_END_GROUP;
IMAD R5, R5, R4, RZ &req={2} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R2, R5, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
IABS R5, R4 ?trans1;
LDCU UR4, c[0x0][0x3a8] &wr=0x0 ?trans1;
IABS R10, R2 ?trans1;
BSSY.RECONVERGENT B0, 0x6b0 ?trans1;
I2F.RP R0, R5 &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x390] &wr=0x2 ?trans1;
MUFU.RCP R0, R0 &req={1} &wr=0x1 ?trans2;
IADD3 R6, PT, PT, R0, 0xffffffe, RZ &req={1} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R7, R6 &rd=0x1 &wr=0x3 ?trans2;
HFMA2 R6, -RZ, RZ, 0, 0 &req={1} ?trans1;
IADD3 R8, PT, PT, RZ, -R7, RZ &req={3} ?WAIT5_END_GROUP;
IMAD R9, R8, R5, RZ ?trans1;
MOV R8, R10 ?WAIT3_END_GROUP;
IMAD.HI.U32 R7, R7, R9, R6 ?WAIT6_END_GROUP;
IMAD.HI.U32 R7, R7, R8, RZ ?WAIT5_END_GROUP;
IADD3 R0, PT, PT, -R7, RZ, RZ ?WAIT5_END_GROUP;
IMAD R0, R5, R0, R8 ?trans1;
MOV.64 R8, 0x3fbcfb549f94855e ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P0, PT, R5, R0, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R0, PT, PT, R0, -R5, RZ ?trans2;
@!P0 IADD3 R7, PT, PT, R7, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R0, R5, PT ?trans1;
LOP3.LUT R0, R2, R4, RZ, 0x3c, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, RZ, PT ?WAIT7_END_GROUP;
@P1 IADD3 R7, PT, PT, R7, 0x1, RZ ?trans1;
ISETP.NE.AND P1, PT, R4, RZ, PT ?WAIT4_END_GROUP;
MOV R0, R7 ?WAIT5_END_GROUP;
@!P0 IADD3 R0, PT, PT, -R0, RZ, RZ ?WAIT4_END_GROUP;
@!P1 LOP3.LUT R0, RZ, R4, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R10, PT, PT, R0.reuse, UR4, RZ &req={0} ?trans1;
LDCU.64 UR4, c[0x0][0x3a0] &wr=0x0 ?trans1;
IADD3 R5, PT, PT, -R0, RZ, RZ ?trans1;
MOV R0, UR6 &req={2} ?trans1;
I2F.F64 R6, R10 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R6, UR4, R8 &req={0} &rd=0x0 &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x398] &wr=0x2 ?trans1;
IMAD R8, R4, R5, R2 &req={0} ?trans1;
MOV.64 R6, 0x3fe7ce703afb7e91 ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64 R4, R8 &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R4, UR4, R6 &req={2} &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R6, -RZ, -R14 &req={1} &rd=0x1 &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R4, -RZ, -R16 &req={3,2,0} &rd=0x1 &wr=0x0 ?trans2;
ISETP.GT.AND P1, PT, R0.reuse, 0x1, PT ?trans1;
DMUL R8, R6, R6 &wr=0x2 ?trans1;
IADD3 R0, PT, PT, R0, -0x1, RZ ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R4, R4, -R8 &req={2,0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R4, R4, R8 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GTU.AND P0, PT, R8, 5, PT &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, R4, R4 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R10, R6, -R14 &req={0} &rd=0x2 &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R4, -R16, R12 &rd=0x2 &wr=0x4 ?trans2;
@!P0 BRA P1, 0x480 &req={4,3,2} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU.64 UR6, c[0x0][0x380] &wr=0x0 ?trans1;
SHF.R.S32.HI R3, RZ, 0x1f, R2 ?WAIT5_END_GROUP;
IADD.64 R2, R2, UR6 &req={0} ?WAIT6_END_GROUP;
STG.E.U8 desc[UR4][R2.64], R0 ?trans1;
EXIT ?trans5;
BRA 0x700;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: fractal(unsigned char*, int, int, int, double, double, int)
_Z7fractalPhiiiddi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x3c
s_load_b128 s[4:7], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mul_i32 s2, s5, s4
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_i32_e32 vcc_lo, s2, v1
s_and_saveexec_b32 s2, vcc_lo
s_cbranch_execz .LBB0_7
s_ashr_i32 s2, s4, 31
s_load_b128 s[8:11], s[0:1], 0x18
s_add_i32 s3, s4, s2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_xor_b32 s3, s3, s2
v_cvt_f32_u32_e32 v0, s3
s_sub_i32 s5, 0, s3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v0, v0
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
v_cvt_u32_f32_e32 v2, v0
v_ashrrev_i32_e32 v0, 31, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_lo_u32 v3, s5, v2
v_add_nc_u32_e32 v4, v1, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_xor_b32_e32 v4, v4, v0
v_mul_hi_u32 v3, v2, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v2, v2, v3
v_mul_hi_u32 v2, v4, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v3, v2, s3
v_sub_nc_u32_e32 v3, v4, v3
v_add_nc_u32_e32 v4, 1, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v5, s3, v3
v_cmp_le_u32_e32 vcc_lo, s3, v3
v_dual_cndmask_b32 v3, v3, v5 :: v_dual_cndmask_b32 v2, v2, v4
v_xor_b32_e32 v5, s2, v0
s_load_b32 s2, s[0:1], 0x28
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cmp_le_u32_e32 vcc_lo, s3, v3
v_add_nc_u32_e32 v4, 1, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v2, v2, v4, vcc_lo
v_xor_b32_e32 v2, v2, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v2, v2, v5
v_mul_lo_u32 v3, v2, s4
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v2, s2, v2
s_mov_b32 s2, 0x9f94855e
s_mov_b32 s4, 0x3afb7e91
s_mov_b32 s3, 0x3fbcfb54
s_mov_b32 s5, 0x3fe7ce70
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v4, v1, v3
v_cvt_f64_i32_e32 v[2:3], v2
v_cvt_f64_i32_e32 v[4:5], v4
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_fma_f64 v[2:3], v[2:3], s[10:11], s[2:3]
s_min_i32 s3, s6, 1
s_mov_b32 s2, 0
s_add_i32 s3, s3, -1
v_fma_f64 v[4:5], v[4:5], s[8:9], s[4:5]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_xor_b32_e32 v7, 0x80000000, v3
v_mov_b32_e32 v6, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_xor_b32_e32 v9, 0x80000000, v5
v_mov_b32_e32 v8, v4
.LBB0_2:
s_or_b32 s4, s4, exec_lo
s_cmp_lt_i32 s6, 2
s_cbranch_scc1 .LBB0_4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_mul_f64 v[10:11], v[8:9], v[8:9]
v_add_f64 v[8:9], v[8:9], v[8:9]
s_and_not1_b32 s4, s4, exec_lo
s_add_i32 s6, s6, -1
v_fma_f64 v[12:13], -v[6:7], v[6:7], v[10:11]
v_fma_f64 v[10:11], v[6:7], v[6:7], v[10:11]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[6:7], v[6:7], v[8:9], -v[2:3]
v_add_f64 v[12:13], v[12:13], -v[4:5]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_nge_f64_e32 vcc_lo, 0x40140000, v[10:11]
v_dual_mov_b32 v8, v12 :: v_dual_mov_b32 v9, v13
s_and_b32 s5, vcc_lo, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s4, s4, s5
s_branch .LBB0_5
.LBB0_4:
s_mov_b32 s6, s3
.LBB0_5:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mov_b32_e32 v10, s6
s_and_b32 s5, exec_lo, s4
s_or_b32 s2, s5, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB0_2
s_or_b32 exec_lo, exec_lo, s2
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
v_add_co_u32 v1, vcc_lo, s0, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v0, vcc_lo
global_store_b8 v[1:2], v10, off
.LBB0_7:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| fractal | 2,137 | 2,328 | stackv2-00000-of-00015 |
// Demangled: column_Kernel(float*, float*, float*, int, int, int)
Function : _Z13column_KernelPfS_S_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.Y &wr=0x1 ?trans7;
LDC R0, c[0x0][0x3a0] &wr=0x2 ?trans1;
LDCU UR4, c[0x0][0x364] &wr=0x1 ?trans1;
BSSY.RECONVERGENT B0, 0x9d0 ?trans1;
S2R R2, SR_CTAID.Y &wr=0x1 ?trans1;
HFMA2 R13, -RZ, RZ, 0, 0 ?trans1;
LDCU UR5, c[0x0][0x39c] &wr=0x2 ?trans1;
IMAD R3, R2, UR4, R3 &req={1} ?trans1;
IADD3 R2, PT, PT, -R0, UR5, RZ &req={2} ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans4;
ISETP.GE.U32.AND P0, PT, R3, R2, PT ?WAIT5_END_GROUP;
ISETP.LT.U32.OR P0, PT, R3, R0, P0 ?WAIT5_END_GROUP;
ISETP.LT.OR P0, PT, R0, RZ, P0 ?WAIT13_END_GROUP;
@P0 BRA 0x9c0 &req={1,0} ?trans5;
S2R R4, SR_TID.X &wr=0x0 ?trans1;
LDCU UR6, c[0x0][0x360] &wr=0x0 ?trans1;
LDC.64 R18, c[0x0][0x388] &wr=0x1 ?trans1;
ISETP.GE.U32.AND P2, PT, R0.reuse, 0x4, PT ?trans1;
S2R R5, SR_CTAID.X &wr=0x0 ?trans1;
IADD3 R2, PT, PT, R0.reuse, R0, RZ ?trans2;
LOP3.LUT R6, R0, 0x1, RZ, 0xc0, !PT ?trans1;
LDCU UR7, c[0x0][0x398] &wr=0x2 ?trans1;
MOV R24, RZ ?trans1;
LDC.64 R16, c[0x0][0x390] &wr=0x3 ?trans1;
LOP3.LUT R2, R2, 0x6, RZ, 0xc0, !PT ?trans1;
ISETP.NE.U32.AND P0, PT, R6, 0x1, PT ?WAIT4_END_GROUP;
ISETP.GE.U32.AND P1, PT, R2, 0x3, PT ?trans1;
IMAD R2, R5, UR6, R4 &req={0} ?trans1;
IADD3 R4, PT, PT, -R0, RZ, RZ ?trans1;
@!P2 BRA 0x660 &req={2} ?trans10;
LDC.64 R14, c[0x0][0x390] &wr=0x0 ?trans1;
IADD3 R6, PT, PT, R3, -R0, RZ ?trans2;
SHF.L.U32 R5, R0, 0x1, RZ ?trans1;
MOV R24, RZ ?trans1;
IADD3 R9, PT, PT, R6.reuse, 0x1, RZ ?trans2;
IADD3 R11, PT, PT, R6.reuse, 0x4, RZ ?trans1;
LDC R7, c[0x0][0x398] &wr=0x2 ?trans1;
IADD3 R13, PT, PT, R6, 0x5, RZ ?trans2;
LOP3.LUT R8, R5, 0x7ffffff8, RZ, 0xc0, !PT ?WAIT2_END_GROUP;
IADD3 R10, PT, PT, R6.reuse, 0x2, RZ ?trans2;
IADD3 R12, PT, PT, R6.reuse, 0x3, RZ ?trans2;
IADD3 R20, PT, PT, R6.reuse, 0x7, RZ ?trans2;
IADD3 R34, PT, PT, R6, 0x6, RZ ?trans2;
IADD3 R8, PT, PT, -R8, RZ, RZ ?trans1;
IMAD.WIDE R14, R0, 0x4, R14 &req={0} ?WAIT5_END_GROUP;
IADD.64 R14, R14, -0xc ?trans2;
IMAD R5, R6, R7.reuse, R2.reuse &req={2} ?trans2;
IMAD R6, R9, R7.reuse, R2.reuse ?trans2;
IMAD R9, R11, R7.reuse, R2.reuse ?trans2;
IMAD R11, R13, R7.reuse, R2.reuse ?trans2;
IMAD R10, R10, R7, R2 ?WAIT2_END_GROUP;
IMAD R12, R12, R7.reuse, R2.reuse ?trans2;
IMAD R13, R20, R7.reuse, R2.reuse ?trans2;
IMAD R34, R34, R7, R2 ?WAIT7_END_GROUP;
LDC.64 R20, c[0x0][0x388] &wr=0x0 ?trans1;
IMAD.WIDE R22, R4, 0x4, RZ ?WAIT5_END_GROUP;
IADD.64 R22, R14, -R22 ?WAIT6_END_GROUP;
LDG.E R25, desc[UR4][R22.64+0xc] &wr=0x2 ?trans4;
LDG.E R26, desc[UR4][R22.64+0x8] &wr=0x4 ?trans4;
LDG.E R36, desc[UR4][R22.64+0x4] &wr=0x5 ?trans1;
IMAD.WIDE.U32 R28, R5, 0x4, R20 &req={0} ?WAIT3_END_GROUP;
LDG.E R37, desc[UR4][R22.64+-0x8] &req={3} &wr=0x3 ?trans1;
IMAD.WIDE.U32 R30, R6, 0x4, R20 ?WAIT3_END_GROUP;
LDG.E R29, desc[UR4][R28.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R32, R10, 0x4, R20 ?WAIT3_END_GROUP;
LDG.E R30, desc[UR4][R30.64] &wr=0x4 ?trans4;
LDG.E R32, desc[UR4][R32.64] &wr=0x5 ?trans4;
LDG.E R33, desc[UR4][R22.64+-0x4] &wr=0x3 ?trans1;
FFMA R25, R29, R25, R24 &req={2} ?WAIT4_END_GROUP;
FFMA R35, R30, R26, R25 &req={4} ?trans1;
IMAD.WIDE.U32 R24, R12, 0x4, R20 ?WAIT4_END_GROUP;
FFMA R35, R32, R36, R35 &req={5} ?trans1;
IMAD.WIDE.U32 R26, R9, 0x4, R20.reuse ?trans1;
LDG.E R36, desc[UR4][R22.64] &wr=0x2 ?trans4;
LDG.E R24, desc[UR4][R24.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R28, R11, 0x4, R20 ?WAIT3_END_GROUP;
LDG.E R26, desc[UR4][R26.64] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R30, R34, 0x4, R20 ?WAIT3_END_GROUP;
LDG.E R28, desc[UR4][R28.64] &wr=0x4 ?trans1;
IMAD.WIDE.U32 R20, R13, 0x4, R20 ?WAIT3_END_GROUP;
LDG.E R30, desc[UR4][R30.64] &wr=0x5 ?trans4;
LDG.E R32, desc[UR4][R22.64+-0xc] &wr=0x5 ?trans4;
LDG.E R25, desc[UR4][R22.64+-0x10] &wr=0x5 ?trans4;
LDG.E R21, desc[UR4][R20.64] &wr=0x5 ?trans1;
IADD3 R8, PT, PT, R8, 0x8, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P2, PT, R8, RZ, PT ?trans1;
IADD3 R4, PT, PT, R4, 0x8, RZ ?trans2;
LEA R5, R7.reuse, R5, 0x3 ?trans2;
LEA R6, R7.reuse, R6, 0x3 ?trans2;
LEA R10, R7.reuse, R10, 0x3 ?trans2;
LEA R12, R7.reuse, R12, 0x3 ?trans2;
LEA R9, R7, R9, 0x3 ?WAIT2_END_GROUP;
LEA R11, R7.reuse, R11, 0x3 ?trans2;
LEA R13, R7.reuse, R13, 0x3 ?trans2;
LEA R34, R7, R34, 0x3 ?trans1;
FFMA R35, R24, R36, R35 &req={2} ?WAIT4_END_GROUP;
FFMA R33, R26, R33, R35 &req={3} ?WAIT4_END_GROUP;
FFMA R33, R28, R37, R33 &req={4} ?WAIT4_END_GROUP;
FFMA R32, R30, R32, R33 &req={5} ?WAIT4_END_GROUP;
FFMA R24, R21, R25, R32 ?trans1;
@P2 BRA 0x370 ?trans6;
@!P1 BRA 0x850 ?trans5;
LDC.64 R6, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR6, c[0x0][0x398] &wr=0x2 ?trans1;
IADD3 R5, PT, PT, R3, R4, RZ ?trans2;
IADD3 R13, PT, PT, -R4, R0, RZ ?trans2;
IADD3 R15, PT, PT, R5.reuse, 0x1, RZ ?trans2;
LDC.64 R8, c[0x0][0x390] &wr=0x4 ?trans1;
IADD3 R21, PT, PT, R5.reuse, 0x2, RZ ?trans2;
IADD3 R23, PT, PT, R5.reuse, 0x3, RZ ?trans1;
IMAD R11, R5, UR6, R2 &req={2} ?WAIT2_END_GROUP;
IMAD R15, R15, UR6, R2.reuse ?trans2;
IMAD R21, R21, UR6, R2 ?trans2;
IMAD.WIDE.U32 R10, R11, 0x4, R6 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R8, R13, 0x4, R8 &req={4} ?trans2;
LDG.E R11, desc[UR4][R10.64] &wr=0x2 ?trans2;
IMAD.WIDE.U32 R12, R15, 0x4, R6 ?trans2;
LDG.E R5, desc[UR4][R8.64] &wr=0x2 ?trans2;
IMAD R23, R23, UR6, R2 ?trans2;
LDG.E R20, desc[UR4][R8.64+-0x4] &wr=0x4 ?trans1;
IMAD.WIDE.U32 R14, R21, 0x4, R6 ?WAIT3_END_GROUP;
LDG.E R12, desc[UR4][R12.64] &wr=0x4 ?trans1;
IMAD.WIDE.U32 R6, R23, 0x4, R6 ?WAIT3_END_GROUP;
LDG.E R14, desc[UR4][R14.64] &wr=0x5 ?trans4;
LDG.E R21, desc[UR4][R8.64+-0x8] &wr=0x5 ?trans4;
LDG.E R6, desc[UR4][R6.64] &req={3} &wr=0x3 ?trans4;
LDG.E R22, desc[UR4][R8.64+-0xc] &wr=0x3 ?trans1;
IADD3 R4, PT, PT, R4, 0x4, RZ ?trans1;
FFMA R5, R11, R5, R24 &req={2} ?WAIT4_END_GROUP;
FFMA R5, R12, R20, R5 &req={4} ?WAIT4_END_GROUP;
FFMA R5, R14, R21, R5 &req={5} ?WAIT4_END_GROUP;
FFMA R24, R6, R22, R5 &req={3} ?WAIT7_END_GROUP;
@!P0 IADD3 R5, PT, PT, R3, R4, RZ ?trans2;
@!P0 IADD3 R7, PT, PT, -R4.reuse, R0, RZ ?trans2;
@!P0 IADD3 R4, PT, PT, R4, 0x2, RZ ?trans2;
@!P0 IADD3 R11, PT, PT, R5.reuse, 0x1, RZ ?trans1;
@!P0 IMAD R9, R5, UR7, R2 ?trans1;
IADD3 R5, PT, PT, R3, R4, RZ ?trans1;
@!P0 IMAD.WIDE R6, R7, 0x4, R16 &req={3} ?trans1;
IADD3 R13, PT, PT, -R4, R0, RZ ?WAIT3_END_GROUP;
@!P0 IMAD R11, R11, UR7, R2 ?trans1;
@!P0 LDG.E R0, desc[UR4][R6.64] &wr=0x2 ?trans1;
@!P0 IMAD.WIDE.U32 R8, R9, 0x4, R18 &req={1} ?WAIT4_END_GROUP;
@!P0 IMAD.WIDE.U32 R10, R11, 0x4, R18 ?trans2;
@!P0 LDG.E R9, desc[UR4][R8.64] &wr=0x2 ?trans2;
IMAD R5, R5, UR7, R2 ?trans2;
IMAD.WIDE R16, R13, 0x4, R16 ?trans1;
@!P0 LDG.E R11, desc[UR4][R10.64] &wr=0x3 ?trans3;
IMAD.WIDE.U32 R18, R5, 0x4, R18 ?trans1;
@!P0 LDG.E R2, desc[UR4][R6.64+-0x4] &wr=0x3 ?trans4;
LDG.E R16, desc[UR4][R16.64] &wr=0x4 ?trans4;
LDG.E R19, desc[UR4][R18.64] &wr=0x4 ?trans1;
@!P0 FFMA R0, R9, R0, R24 &req={2} ?WAIT4_END_GROUP;
@!P0 FFMA R24, R11, R2, R0 &req={3} ?WAIT4_END_GROUP;
FFMA R13, R19, R16, R24 &req={4} ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
S2R R0, SR_TID.X &wr=0x0 ?trans1;
LDCU UR6, c[0x0][0x360] &wr=0x0 ?trans1;
LDC.64 R4, c[0x0][0x380] &wr=0x1 ?trans1;
S2R R7, SR_CTAID.X &wr=0x0 ?trans1;
LDCU UR7, c[0x0][0x398] &wr=0x2 ?trans1;
IMAD R0, R7, UR6, R0 &req={0} ?WAIT4_END_GROUP;
IMAD R3, R3, UR7, R0 &req={2} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R3, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R13 ?trans1;
EXIT ?trans5;
BRA 0xa70;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: column_Kernel(float*, float*, float*, int, int, int)
_Z13column_KernelPfS_S_iii:
s_clause 0x1
s_load_b32 s8, s[0:1], 0x34
s_load_b128 s[4:7], s[0:1], 0x18
v_bfe_u32 v3, v0, 10, 10
s_add_u32 s2, s0, 40
s_addc_u32 s3, s1, 0
v_and_b32_e32 v0, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s7, s8, 16
s_clause 0x1
s_load_b128 s[8:11], s[0:1], 0x0
s_load_b64 s[12:13], s[0:1], 0x10
v_mad_u64_u32 v[1:2], null, s15, s7, v[3:4]
s_sub_i32 s0, s5, s6
v_mov_b32_e32 v4, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_le_u32_e32 vcc_lo, s6, v1
v_cmp_gt_u32_e64 s0, s0, v1
s_and_b32 s0, vcc_lo, s0
s_cmp_gt_i32 s6, -1
s_cselect_b32 s1, -1, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, s0, s1
s_and_saveexec_b32 s5, s0
s_cbranch_execz .LBB1_3
s_load_b32 s0, s[2:3], 0xc
v_subrev_nc_u32_e32 v2, s6, v1
v_mov_b32_e32 v3, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_lo_u32 v2, s4, v2
v_mov_b32_e32 v4, v3
s_waitcnt lgkmcnt(0)
s_and_b32 s0, s0, 0xffff
s_delay_alu instid0(SALU_CYCLE_1)
s_mul_i32 s0, s14, s0
s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
v_add3_u32 v2, v0, v2, s0
s_lshl_b32 s0, s6, 1
.LBB1_2:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
v_lshlrev_b64 v[5:6], 2, v[2:3]
s_ashr_i32 s1, s0, 31
v_add_nc_u32_e32 v2, s4, v2
s_lshl_b64 s[6:7], s[0:1], 2
s_add_u32 s6, s12, s6
s_delay_alu instid0(VALU_DEP_2)
v_add_co_u32 v5, vcc_lo, s10, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s11, v6, vcc_lo
s_addc_u32 s7, s13, s7
s_add_i32 s0, s0, -1
s_load_b32 s1, s[6:7], 0x0
global_load_b32 v5, v[5:6], off
s_cmp_lg_u32 s0, -1
s_waitcnt vmcnt(0) lgkmcnt(0)
v_fmac_f32_e32 v4, s1, v5
s_cbranch_scc1 .LBB1_2
.LBB1_3:
s_or_b32 exec_lo, exec_lo, s5
s_load_b32 s0, s[2:3], 0xc
v_mul_lo_u32 v2, v1, s4
v_mov_b32_e32 v1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s0, s0, 0xffff
s_delay_alu instid0(SALU_CYCLE_1)
s_mul_i32 s14, s14, s0
s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
v_add3_u32 v0, v2, v0, s14
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_add_co_u32 v0, vcc_lo, s8, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
global_store_b32 v[0:1], v4, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| column_Kernel | 4,428 | 1,333 | stackv2-00000-of-00015 |
// Demangled: row_Kernel(float*, float*, float*, int, int, int)
Function : _Z10row_KernelPfS_S_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR5, SR_CTAID.X &wr=0x2 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0xdd0 ?trans1;
HFMA2 R19, -RZ, RZ, 0, 0 ?trans1;
LDCU UR6, c[0x0][0x39c] &wr=0x3 ?trans4;
LDC R10, c[0x0][0x3a0] &wr=0x3 ?trans1;
UIMAD UR4, UR4, UR5, URZ &req={2} ?WAIT6_END_GROUP;
IADD3 R11, PT, PT, R0, UR4, RZ &req={1} ?trans2;
IADD3 R2, PT, PT, -R10, UR6, RZ &req={3} ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans4;
ISETP.GE.U32.AND P0, PT, R11, R2, PT ?WAIT5_END_GROUP;
ISETP.LT.U32.OR P0, PT, R11, R10, P0 ?WAIT5_END_GROUP;
ISETP.LT.OR P0, PT, R10, RZ, P0 ?WAIT13_END_GROUP;
@P0 BRA 0xdc0 &req={1,0} ?trans5;
S2R R3, SR_TID.Y &wr=0x0 ?trans1;
S2UR UR5, SR_CTAID.Y &wr=0x0 ?trans1;
LDCU UR8, c[0x0][0x398] &wr=0x1 ?trans1;
ISETP.GE.U32.AND P0, PT, R10.reuse, 0x8, PT ?trans1;
IADD3 R14, PT, PT, R10.reuse, R10, RZ ?trans2;
IADD3 R13, PT, PT, -R10, RZ, RZ ?trans1;
MOV R19, RZ ?trans2;
LDC R12, c[0x0][0x364] &wr=0x0 ?trans2;
IMAD R12, R12, UR5, R3 &req={0} ?WAIT4_END_GROUP;
IMAD R15, R12, UR8, R11 &req={1} ?trans1;
@!P0 BRA 0x7b0 ?trans6;
IADD3 R2, PT, PT, R14, 0x1, RZ ?trans2;
IADD3 R16, PT, PT, -R10, 0x7, RZ ?trans2;
IADD3 R13, PT, PT, R15, 0x7, -R10 ?trans1;
MOV R19, RZ ?trans1;
LOP3.LUT R2, R2, 0xfffffff0, RZ, 0xc0, !PT ?trans1;
MOV R17, R14 ?WAIT3_END_GROUP;
IADD3 R18, PT, PT, -R2, RZ, RZ ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
IADD3 R27, PT, PT, R13.reuse, -0x7, RZ ?trans2;
IADD3 R7, PT, PT, R13.reuse, -0x6, RZ ?trans2;
IADD3 R9, PT, PT, R13, -0x5, RZ ?WAIT3_END_GROUP;
LDC.64 R2, c[0x0][0x390] &wr=0x1 ?trans1;
IADD3 R23, PT, PT, R13.reuse, -0x4, RZ ?trans2;
IADD3 R21, PT, PT, R13, -0x3, RZ ?trans1;
IMAD.WIDE.U32 R26, R27, 0x4, R4 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R6, R7, 0x4, R4 ?trans1;
LDG.E R34, desc[UR6][R26.64] &wr=0x2 ?trans3;
IMAD.WIDE R2, R17, 0x4, R2 &req={1} ?trans1;
LDG.E R32, desc[UR6][R6.64] &rd=0x0 &wr=0x3 ?trans4;
LDG.E R35, desc[UR6][R2.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R8, R9, 0x4, R4 ?WAIT3_END_GROUP;
LDG.E R33, desc[UR6][R2.64+-0x4] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R22, R23, 0x4, R4 ?WAIT3_END_GROUP;
LDG.E R24, desc[UR6][R8.64] &rd=0x1 &wr=0x4 ?trans4;
LDG.E R31, desc[UR6][R2.64+-0x8] &wr=0x4 ?trans1;
IMAD.WIDE.U32 R20, R21, 0x4, R4.reuse ?trans1;
IADD3 R29, PT, PT, R13, -0x2, RZ ?trans2;
LDG.E R27, desc[UR6][R22.64] &rd=0x5 &wr=0x4 ?trans4;
LDG.E R28, desc[UR6][R2.64+-0xc] &wr=0x4 ?trans1;
IMAD.WIDE.U32 R6, R29, 0x4, R4 &req={0} ?WAIT3_END_GROUP;
LDG.E R25, desc[UR6][R20.64] &rd=0x0 &wr=0x4 ?trans4;
LDG.E R26, desc[UR6][R2.64+-0x10] &wr=0x4 ?trans4;
LDG.E R29, desc[UR6][R6.64] &wr=0x4 ?trans4;
LDG.E R30, desc[UR6][R2.64+-0x14] &wr=0x4 ?trans1;
IADD3 R9, PT, PT, R13, -0x1, RZ &req={1} ?WAIT2_END_GROUP;
IADD3 R37, PT, PT, R13.reuse, 0x1, RZ ?trans1;
IMAD.WIDE.U32 R22, R13, 0x4, R4 &req={5} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R8, R9, 0x4, R4.reuse ?trans2;
LDG.E R22, desc[UR6][R22.64] &wr=0x5 ?trans2;
IMAD.WIDE.U32 R20, R37, 0x4, R4 &req={0} ?trans1;
IADD3 R36, PT, PT, R13, 0x8, RZ ?trans1;
LDG.E R37, desc[UR6][R2.64+-0x34] &wr=0x5 ?trans4;
LDG.E R20, desc[UR6][R20.64] &wr=0x5 ?trans4;
LDG.E R21, desc[UR6][R2.64+-0x24] &wr=0x5 ?trans1;
FFMA R35, R34, R35, R19 &req={2} ?WAIT3_END_GROUP;
LDG.E R19, desc[UR6][R8.64] &rd=0x0 &wr=0x2 ?trans1;
FFMA R33, R32, R33, R35 &req={3} ?trans1;
IADD3 R35, PT, PT, R13.reuse, 0x2, RZ ?trans2;
LDG.E R34, desc[UR6][R2.64+-0x28] &wr=0x3 ?trans1;
FFMA R32, R24, R31, R33 &req={4} ?trans1;
IADD3 R31, PT, PT, R13, 0x3, RZ ?trans2;
LDG.E R24, desc[UR6][R2.64+-0x18] &wr=0x2 ?trans3;
IMAD.WIDE.U32 R8, R31, 0x4, R4 &req={0} ?WAIT4_END_GROUP;
FFMA R28, R27, R28, R32 ?trans1;
LDG.E R31, desc[UR6][R2.64+-0x1c] &wr=0x5 ?trans1;
IMAD.WIDE.U32 R6, R35, 0x4, R4 ?trans1;
IADD3 R27, PT, PT, R13.reuse, 0x4, RZ ?trans2;
IADD3 R33, PT, PT, R13, 0x5, RZ ?trans1;
LDG.E R23, desc[UR6][R8.64] &wr=0x3 ?trans1;
FFMA R26, R25, R26, R28 ?WAIT3_END_GROUP;
LDG.E R32, desc[UR6][R6.64] &rd=0x0 &wr=0x4 ?trans4;
LDG.E R25, desc[UR6][R2.64+-0x20] &wr=0x3 ?trans1;
FFMA R30, R29, R30, R26 ?trans1;
IMAD.WIDE.U32 R26, R27, 0x4, R4.reuse ?trans1;
IADD3 R29, PT, PT, R13.reuse, 0x6, RZ ?trans2;
IADD3 R35, PT, PT, R13, 0x7, RZ ?trans1;
IMAD.WIDE.U32 R6, R33, 0x4, R4 &req={0} ?WAIT2_END_GROUP;
LDG.E R26, desc[UR6][R26.64] &wr=0x4 ?trans2;
IMAD.WIDE.U32 R8, R29, 0x4, R4.reuse ?trans2;
LDG.E R33, desc[UR6][R2.64+-0x2c] &wr=0x4 ?trans2;
IMAD.WIDE.U32 R28, R35, 0x4, R4.reuse ?trans2;
LDG.E R6, desc[UR6][R6.64] &wr=0x4 ?trans4;
LDG.E R35, desc[UR6][R2.64+-0x30] &wr=0x4 ?trans1;
IMAD.WIDE.U32 R4, R36, 0x4, R4 ?WAIT3_END_GROUP;
LDG.E R8, desc[UR6][R8.64] &wr=0x4 ?trans4;
LDG.E R28, desc[UR6][R28.64] &wr=0x4 ?trans4;
LDG.E R27, desc[UR6][R2.64+-0x38] &wr=0x4 ?trans4;
LDG.E R4, desc[UR6][R4.64] &wr=0x4 ?trans4;
LDG.E R7, desc[UR6][R2.64+-0x3c] &wr=0x4 ?trans1;
IADD3 R18, PT, PT, R18, 0x10, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R18, RZ, PT ?trans1;
IADD3 R16, PT, PT, R16, 0x10, RZ ?trans2;
IADD3 R13, PT, PT, R13, 0x10, RZ ?trans2;
IADD3 R17, PT, PT, R17, -0x10, RZ ?trans1;
FFMA R19, R19, R24, R30 &req={2} ?WAIT4_END_GROUP;
FFMA R19, R22, R31, R19 &req={5} ?WAIT4_END_GROUP;
FFMA R19, R20, R25, R19 &req={3} ?WAIT4_END_GROUP;
FFMA R32, R32, R21, R19 &req={4} ?WAIT4_END_GROUP;
FFMA R23, R23, R34, R32 ?WAIT4_END_GROUP;
FFMA R23, R26, R33, R23 ?WAIT4_END_GROUP;
FFMA R23, R6, R35, R23 ?WAIT4_END_GROUP;
FFMA R23, R8, R37, R23 ?WAIT4_END_GROUP;
FFMA R23, R28, R27, R23 ?WAIT4_END_GROUP;
FFMA R19, R4, R7, R23 ?trans1;
@P0 BRA 0x220 ?trans6;
IADD3 R13, PT, PT, R16, -0x7, RZ ?WAIT7_END_GROUP;
LDCU.U16 UR5, c[0x0][0x3a0] &wr=0x0 ?trans1;
LDC.64 R4, c[0x0][0x390] &wr=0x1 ?trans1;
LOP3.LUT R6, R14.reuse, 0xe, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R14, R14, 0x6, RZ, 0xc0, !PT ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P0, PT, R6, 0x7, PT ?trans2;
LDC.64 R2, c[0x0][0x388] &wr=0x2 ?trans1;
ISETP.GE.U32.AND P1, PT, R14, 0x3, PT ?trans1;
USHF.L.U32 UR5, UR5, 0x1, URZ &req={0} ?WAIT4_END_GROUP;
ULOP3.LUT UR5, UR5, 0x2, URZ, 0xe2, !UPT ?WAIT5_END_GROUP;
@!P0 BRA 0xb20 ?trans7;
LDC.64 R8, c[0x0][0x388] &wr=0x0 ?trans1;
IADD3 R31, PT, PT, R15, R13, RZ ?trans2;
IADD3 R17, PT, PT, -R13, R10, RZ ?trans2;
IADD3 R23, PT, PT, R31.reuse, 0x1, RZ ?trans2;
IADD3 R25, PT, PT, R31.reuse, 0x2, RZ ?trans1;
LDC.64 R6, c[0x0][0x390] &wr=0x3 ?trans1;
IADD3 R33, PT, PT, R31.reuse, 0x4, RZ ?trans2;
IADD3 R35, PT, PT, R31.reuse, 0x5, RZ ?trans1;
IMAD.WIDE.U32 R20, R31, 0x4, R8 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R22, R23, 0x4, R8 ?trans1;
LDG.E R14, desc[UR6][R20.64] &rd=0x0 &wr=0x4 ?trans3;
IMAD.WIDE R6, R17, 0x4, R6 &req={3} ?trans1;
IADD3 R17, PT, PT, R31, 0x3, RZ ?trans1;
LDG.E R26, desc[UR6][R22.64] &rd=0x3 &wr=0x5 ?trans4;
LDG.E R18, desc[UR6][R6.64] &wr=0x4 ?trans1;
IMAD.WIDE.U32 R24, R25, 0x4, R8 ?WAIT3_END_GROUP;
LDG.E R27, desc[UR6][R6.64+-0x4] &wr=0x5 ?trans1;
IMAD.WIDE.U32 R16, R17, 0x4, R8 ?WAIT3_END_GROUP;
LDG.E R28, desc[UR6][R24.64] &rd=0x2 &wr=0x5 ?trans1;
IMAD.WIDE.U32 R20, R33, 0x4, R8 &req={0} ?WAIT3_END_GROUP;
LDG.E R29, desc[UR6][R6.64+-0x8] &wr=0x5 ?trans1;
IADD3 R37, PT, PT, R31, 0x6, RZ ?trans1;
IMAD.WIDE.U32 R22, R35, 0x4, R8.reuse &req={3} ?trans2;
LDG.E R16, desc[UR6][R16.64] &wr=0x3 ?trans4;
LDG.E R33, desc[UR6][R6.64+-0xc] &wr=0x3 ?trans1;
IADD3 R30, PT, PT, R31, 0x7, RZ ?trans1;
IMAD.WIDE.U32 R24, R37, 0x4, R8 &req={2} ?WAIT2_END_GROUP;
LDG.E R20, desc[UR6][R20.64] &wr=0x2 ?trans4;
LDG.E R35, desc[UR6][R6.64+-0x10] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R8, R30, 0x4, R8 ?WAIT3_END_GROUP;
LDG.E R22, desc[UR6][R22.64] &wr=0x2 ?trans4;
LDG.E R31, desc[UR6][R6.64+-0x14] &wr=0x2 ?trans4;
LDG.E R24, desc[UR6][R24.64] &wr=0x2 ?trans4;
LDG.E R17, desc[UR6][R6.64+-0x18] &wr=0x2 ?trans4;
LDG.E R8, desc[UR6][R8.64] &wr=0x2 ?trans4;
LDG.E R30, desc[UR6][R6.64+-0x1c] &wr=0x2 ?trans1;
IADD3 R13, PT, PT, R13, 0x8, RZ ?trans1;
FFMA R19, R14, R18, R19 &req={4} ?WAIT4_END_GROUP;
FFMA R19, R26, R27, R19 &req={5} ?WAIT4_END_GROUP;
FFMA R19, R28, R29, R19 ?WAIT4_END_GROUP;
FFMA R19, R16, R33, R19 &req={3} ?WAIT4_END_GROUP;
FFMA R19, R20, R35, R19 &req={2} ?WAIT4_END_GROUP;
FFMA R19, R22, R31, R19 ?WAIT4_END_GROUP;
FFMA R19, R24, R17, R19 ?WAIT4_END_GROUP;
FFMA R19, R8, R30, R19 ?WAIT7_END_GROUP;
@!P1 BRA 0xcc0 ?trans5;
LDC.64 R6, c[0x0][0x388] &wr=0x0 ?trans1;
IADD3 R21, PT, PT, R15, R13, RZ ?trans2;
IADD3 R17, PT, PT, -R13, R10, RZ ?trans2;
IADD3 R23, PT, PT, R21.reuse, 0x1, RZ ?trans2;
IADD3 R25, PT, PT, R21.reuse, 0x2, RZ ?trans1;
LDC.64 R8, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R14, R21, 0x4, R6 &req={0} ?WAIT6_END_GROUP;
LDG.E R14, desc[UR6][R14.64] &wr=0x4 ?trans1;
IMAD.WIDE R8, R17, 0x4, R8 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R16, R23, 0x4, R6.reuse ?trans1;
LDG.E R18, desc[UR6][R8.64] &wr=0x4 ?trans1;
IADD3 R23, PT, PT, R21, 0x3, RZ ?trans2;
IMAD.WIDE.U32 R20, R25, 0x4, R6.reuse ?trans1;
LDG.E R22, desc[UR6][R8.64+-0x4] &wr=0x3 ?trans4;
LDG.E R17, desc[UR6][R16.64] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R6, R23, 0x4, R6 ?WAIT3_END_GROUP;
LDG.E R21, desc[UR6][R20.64] &wr=0x5 ?trans4;
LDG.E R23, desc[UR6][R8.64+-0x8] &wr=0x5 ?trans4;
LDG.E R7, desc[UR6][R6.64] &req={2} &wr=0x2 ?trans4;
LDG.E R24, desc[UR6][R8.64+-0xc] &wr=0x2 ?trans1;
IADD3 R13, PT, PT, R13, 0x4, RZ ?trans1;
FFMA R14, R14, R18, R19 &req={4} ?WAIT4_END_GROUP;
FFMA R14, R17, R22, R14 &req={3} ?WAIT4_END_GROUP;
FFMA R14, R21, R23, R14 &req={5} ?WAIT4_END_GROUP;
FFMA R19, R7, R24, R14 &req={2} ?WAIT7_END_GROUP;
UIADD3 UR5, UPT, UPT, -UR5, URZ, URZ ?trans1;
IADD3 R7, PT, PT, R0, UR4, R13 ?trans1;
IMAD.WIDE R4, R10, 0x4, R4 &req={1} ?WAIT4_END_GROUP;
IMAD R15, R12, UR8, R7 ?trans1;
MOV R0, UR5 ?WAIT7_END_GROUP;
IMAD.WIDE R6, R13, 0x4, RZ ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R8, R15, 0x4, R2 &req={2} ?trans1;
IADD.64 R6, R4, -R6 ?WAIT5_END_GROUP;
LDG.E R8, desc[UR6][R8.64] &wr=0x2 ?trans4;
LDG.E R6, desc[UR6][R6.64] &wr=0x2 ?trans1;
IADD3 R0, PT, PT, R0, 0x1, RZ ?trans2;
IADD3 R13, PT, PT, R13, 0x1, RZ ?trans2;
IADD3 R15, PT, PT, R15, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R0, 0x1, PT ?trans1;
FFMA R19, R8, R6, R19 &req={2} ?WAIT12_END_GROUP;
@P0 BRA 0xd10 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
S2R R5, SR_TID.Y &wr=0x0 ?trans1;
S2UR UR5, SR_CTAID.Y &wr=0x0 ?trans1;
LDCU UR8, c[0x0][0x398] &wr=0x1 ?trans7;
LDC R0, c[0x0][0x364] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD R0, R0, UR5, R5 &req={0} ?WAIT4_END_GROUP;
IMAD R11, R0, UR8, R11 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R11, 0x4, R2 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R19 ?trans1;
EXIT ?trans5;
BRA 0xe70;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: row_Kernel(float*, float*, float*, int, int, int)
_Z10row_KernelPfS_S_iii:
s_clause 0x1
s_load_b32 s8, s[0:1], 0x34
s_load_b128 s[4:7], s[0:1], 0x18
s_add_u32 s2, s0, 40
v_and_b32_e32 v2, 0x3ff, v0
s_addc_u32 s3, s1, 0
v_bfe_u32 v0, v0, 10, 10
v_mov_b32_e32 v4, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s7, s8, 0xffff
s_clause 0x1
s_load_b128 s[8:11], s[0:1], 0x0
s_load_b64 s[12:13], s[0:1], 0x10
s_mul_i32 s14, s14, s7
s_sub_i32 s0, s5, s6
v_add_nc_u32_e32 v1, s14, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_le_u32_e32 vcc_lo, s6, v1
v_cmp_gt_u32_e64 s0, s0, v1
s_and_b32 s0, vcc_lo, s0
s_cmp_gt_i32 s6, -1
s_cselect_b32 s1, -1, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, s0, s1
s_and_saveexec_b32 s5, s0
s_cbranch_execz .LBB0_3
s_load_b32 s0, s[2:3], 0xc
s_waitcnt lgkmcnt(0)
s_lshr_b32 s0, s0, 16
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[3:4], null, s15, s0, v[0:1]
s_lshl_b32 s0, s6, 1
v_mul_lo_u32 v3, v3, s4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add3_u32 v2, v2, v3, s14
v_mov_b32_e32 v3, 0
v_subrev_nc_u32_e32 v2, s6, v2
s_delay_alu instid0(VALU_DEP_2)
v_mov_b32_e32 v4, v3
.LBB0_2:
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
v_lshlrev_b64 v[5:6], 2, v[2:3]
s_ashr_i32 s1, s0, 31
v_add_nc_u32_e32 v2, 1, v2
s_lshl_b64 s[6:7], s[0:1], 2
s_add_u32 s6, s12, s6
s_delay_alu instid0(VALU_DEP_2)
v_add_co_u32 v5, vcc_lo, s10, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s11, v6, vcc_lo
s_addc_u32 s7, s13, s7
s_add_i32 s0, s0, -1
s_load_b32 s1, s[6:7], 0x0
global_load_b32 v5, v[5:6], off
s_cmp_lg_u32 s0, -1
s_waitcnt vmcnt(0) lgkmcnt(0)
v_fmac_f32_e32 v4, s1, v5
s_cbranch_scc1 .LBB0_2
.LBB0_3:
s_or_b32 exec_lo, exec_lo, s5
s_load_b32 s0, s[2:3], 0xc
s_waitcnt lgkmcnt(0)
s_lshr_b32 s0, s0, 16
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, s15, s0, v[0:1]
v_mad_u64_u32 v[5:6], null, v2, s4, v[1:2]
v_mov_b32_e32 v6, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[5:6]
v_add_co_u32 v0, vcc_lo, s8, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
global_store_b32 v[0:1], v4, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| row_Kernel | 6,360 | 1,367 | stackv2-00000-of-00015 |
// Demangled: tiled_column_Kernel(float*, float*, int, int, int)
Function : _Z19tiled_column_KernelPfS_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_TID.Y &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.Y &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x394] &wr=0x2 ?trans1;
S2R R0, SR_TID.X &wr=0x3 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x4 ?trans1;
S2R R11, SR_CTAID.X &wr=0x3 ?trans4;
LDC R10, c[0x0][0x364] &wr=0x1 ?trans8;
LDC R2, c[0x0][0x398] &wr=0x5 ?trans1;
IMAD R3, R10, UR4, R5 &req={1} ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x3 ?trans4;
ISETP.GE.AND P0, PT, R3.reuse, R2, PT &req={5} ?trans1;
IADD3 R4, PT, PT, -R2, UR5, RZ &req={2} ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x1 ?trans4;
ISETP.GE.AND P1, PT, R3, R4, PT ?trans1;
IMAD R4, R11, UR4, R0 &req={3} ?WAIT6_END_GROUP;
@P0 LDC.64 R6, c[0x0][0x388] &wr=0x2 ?trans1;
@P0 IADD3 R12, PT, PT, -R2, RZ, RZ ?trans1;
IMAD R3, R3, UR5, R4 &req={1} ?WAIT6_END_GROUP;
@!P1 LDC.64 R8, c[0x0][0x388] &wr=0x1 ?trans1;
@P0 IMAD R11, R12, UR5, R3.reuse ?trans2;
@!P1 IMAD R13, R2, UR5, R3 ?trans2;
@P0 IMAD.WIDE R6, R11, 0x4, R6 &req={2} ?WAIT6_END_GROUP;
@P0 LDG.E R6, desc[UR6][R6.64] &req={4} &rd=0x2 &wr=0x3 ?trans1;
@!P1 IMAD.WIDE R8, R13, 0x4, R8 &req={1} ?WAIT6_END_GROUP;
@!P1 LDG.E R8, desc[UR6][R8.64] &rd=0x1 &wr=0x4 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x5 ?trans1;
UMOV UR4, 0x400 ?trans1;
IMAD R15, R5, 0x60, R0 ?trans1;
IADD3 R11, PT, PT, R10, R5, RZ ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={5} ?WAIT6_END_GROUP;
@P0 MOV R4, UR4 ?WAIT5_END_GROUP;
@P0 IMAD R13, R15, 0x4, R4 ?trans1;
@!P0 MOV R4, UR4 ?WAIT5_END_GROUP;
@!P0 IMAD R10, R15, 0x4, R4 ?trans2;
IMAD R11, R11, 0x60, R0 ?WAIT4_END_GROUP;
@!P1 IMAD R7, R11.reuse, 0x4, R4 &req={2} ?trans1;
@P1 LEA R11, R11, R4, 0x2 ?trans1;
HFMA2 R9, -RZ, RZ, 0, 0 &req={1} ?trans1;
@P0 STS [R13], R6 &req={3} &rd=0x1 ?trans4;
@!P0 STS [R10], RZ &rd=0x1 ?trans1;
ISETP.GE.AND P0, PT, R2, RZ, PT ?WAIT3_END_GROUP;
@!P1 STS [R7], R8 &req={4} &rd=0x1 ?trans4;
@P1 STS [R11], RZ &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P0 BRA 0x820 &req={0} ?trans5;
ISETP.GE.U32.AND P2, PT, R2.reuse, 0x4, PT ?trans1;
IADD3 R6, PT, PT, R2.reuse, R2, RZ &req={1} ?trans2;
LOP3.LUT R7, R2.reuse, 0x1, RZ, 0xc0, !PT ?trans2;
IADD3 R13, PT, PT, -R2, RZ, RZ ?trans1;
MOV R12, RZ ?trans1;
LOP3.LUT R6, R6, 0x6, RZ, 0xc0, !PT ?trans1;
ISETP.NE.U32.AND P0, PT, R7, 0x1, PT ?WAIT4_END_GROUP;
ISETP.GE.U32.AND P1, PT, R6, 0x3, PT ?trans1;
@!P2 BRA 0x590 ?WAIT12_END_GROUP;
IMAD.SHL.U32 R14, R2, 0x2, RZ ?trans1;
MOV R12, RZ ?trans1;
IMAD.U32 R15, R15, 0x4, R4 ?WAIT3_END_GROUP;
LOP3.LUT R6, R14, 0xfffffff8, RZ, 0xc0, !PT ?trans2;
IADD3 R16, PT, PT, R15, 0x600, RZ ?trans2;
IADD3 R15, PT, PT, -R6, RZ, RZ ?WAIT7_END_GROUP;
LDS R17, [R16+-0x600] &wr=0x0 ?trans1;
SHF.L.U32 R18, R14.reuse, 0x2, RZ ?trans2;
IADD3 R15, PT, PT, R15, 0x8, RZ ?trans1;
LDS R21, [R16+-0x480] &wr=0x1 ?trans1;
LDC R19, c[0x3][R18] &wr=0x0 ?trans1;
IADD3 R13, PT, PT, R13, 0x8, RZ ?trans2;
IADD3 R14, PT, PT, R14, -0x8, RZ ?trans1;
LDS R20, [R16+-0x300] &wr=0x2 ?trans1;
ISETP.NE.AND P2, PT, R15, RZ, PT ?WAIT3_END_GROUP;
LDS R23, [R16+-0x180] &wr=0x3 ?trans1;
LDC.64 R10, c[0x3][R18+-0x8] &wr=0x1 ?trans3;
LDS R22, [R16] &wr=0x4 ?trans4;
LDS R25, [R16+0x180] &wr=0x5 ?trans1;
LDC.64 R8, c[0x3][R18+-0x10] &wr=0x3 ?trans3;
LDS R24, [R16+0x300] &wr=0x2 ?trans4;
LDS R27, [R16+0x480] &rd=0x0 &wr=0x3 ?trans1;
LDC.64 R6, c[0x3][R18+-0x18] &wr=0x5 ?trans1;
IADD3 R16, PT, PT, R16, 0xc00, RZ &req={0} ?trans1;
FFMA R12, R17, R19, R12 ?WAIT4_END_GROUP;
FFMA R11, R21, R11, R12 &req={1} ?trans2;
LDC R12, c[0x3][R18+-0x1c] &wr=0x0 ?trans2;
FFMA R10, R20, R10, R11 &req={2} ?WAIT4_END_GROUP;
FFMA R9, R23, R9, R10 &req={3} ?WAIT4_END_GROUP;
FFMA R8, R22, R8, R9 &req={4} ?WAIT4_END_GROUP;
FFMA R7, R25, R7, R8 &req={5} ?WAIT4_END_GROUP;
FFMA R6, R24, R6, R7 ?WAIT4_END_GROUP;
FFMA R12, R27, R12, R6 &req={0} ?trans1;
@P2 BRA 0x3d0 ?trans6;
IADD3 R6, PT, PT, R5, R2, RZ ?trans1;
@!P1 BRA 0x6d0 ?trans6;
IADD3 R5, PT, PT, R6, R13, RZ ?trans2;
IADD3 R8, PT, PT, -R13.reuse, R2, RZ ?trans2;
IADD3 R13, PT, PT, R13, 0x4, RZ ?trans1;
IMAD R5, R5, 0x60, R0 ?trans2;
IMAD.SHL.U32 R8, R8, 0x4, RZ ?trans2;
IMAD R5, R5, 0x4, R4 ?trans2;
LDC R9, c[0x3][R8] &wr=0x0 ?trans3;
LDS R7, [R5] &wr=0x0 ?trans4;
LDS R10, [R5+0x180] &wr=0x1 ?trans1;
LDC R11, c[0x3][R8+-0x4] &wr=0x1 ?trans3;
LDS R14, [R5+0x300] &wr=0x2 ?trans4;
LDS R16, [R5+0x480] &wr=0x3 ?trans1;
LDC R15, c[0x3][R8+-0x8] &wr=0x2 ?trans8;
LDC R17, c[0x3][R8+-0xc] &wr=0x3 ?trans1;
FFMA R7, R7, R9, R12 &req={0} ?WAIT4_END_GROUP;
FFMA R7, R10, R11, R7 &req={1} ?WAIT4_END_GROUP;
FFMA R7, R14, R15, R7 &req={2} ?WAIT4_END_GROUP;
FFMA R12, R16, R17, R7 &req={3} ?WAIT7_END_GROUP;
@P0 BRA 0x7a0 ?trans5;
IADD3 R5, PT, PT, R6, R13, RZ ?trans2;
IADD3 R8, PT, PT, -R13.reuse, R2, RZ ?trans2;
IADD3 R13, PT, PT, R13, 0x2, RZ ?trans1;
IMAD R5, R5, 0x60, R0 ?trans2;
IMAD.SHL.U32 R8, R8, 0x4, RZ ?WAIT3_END_GROUP;
LEA R5, R5, R4, 0x2 ?trans1;
LDC R9, c[0x3][R8] &wr=0x0 ?trans4;
LDS R7, [R5] &wr=0x0 ?trans4;
LDS R10, [R5+0x180] &wr=0x1 ?trans1;
LDC R11, c[0x3][R8+-0x4] &wr=0x1 ?trans1;
FFMA R7, R7, R9, R12 &req={0} ?WAIT4_END_GROUP;
FFMA R12, R10, R11, R7 &req={1} ?WAIT7_END_GROUP;
IADD3 R5, PT, PT, R6, R13, RZ ?trans2;
IADD3 R2, PT, PT, -R13, R2, RZ ?WAIT3_END_GROUP;
IMAD R5, R5, 0x60, R0 ?trans1;
SHF.L.U32 R2, R2, 0x2, RZ ?WAIT3_END_GROUP;
IMAD R5, R5, 0x4, R4 ?WAIT3_END_GROUP;
LDC R2, c[0x3][R2] &wr=0x0 ?trans3;
LDS R5, [R5] &wr=0x0 ?trans2;
FFMA R9, R5, R2, R12 &req={0} ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans2;
IMAD.WIDE R2, R3, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x860;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: tiled_column_Kernel(float*, float*, int, int, int)
_Z19tiled_column_KernelPfS_iii:
s_clause 0x1
s_load_b32 s8, s[0:1], 0x2c
s_load_b256 s[0:7], s[0:1], 0x0
v_bfe_u32 v1, v0, 10, 10
v_mov_b32_e32 v4, 0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s7, s8, 16
s_and_b32 s8, s8, 0xffff
v_mad_u64_u32 v[2:3], null, s15, s7, v[1:2]
v_and_b32_e32 v3, 0x3ff, v0
s_mul_i32 s14, s14, s8
s_mov_b32 s8, exec_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v5, v2, s4
v_add3_u32 v0, s14, v3, v5
v_mov_b32_e32 v5, 0
v_cmpx_le_i32_e64 s6, v2
s_cbranch_execz .LBB3_2
s_mul_i32 s9, s6, s4
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_subrev_nc_u32_e32 v5, s9, v0
v_ashrrev_i32_e32 v6, 31, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[5:6], 2, v[5:6]
v_add_co_u32 v5, vcc_lo, s2, v5
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v6, vcc_lo, s3, v6, vcc_lo
global_load_b32 v5, v[5:6], off
.LBB3_2:
s_or_b32 exec_lo, exec_lo, s8
v_mul_u32_u24_e32 v6, 0x60, v1
s_sub_i32 s5, s5, s6
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_gt_i32_e32 vcc_lo, s5, v2
v_add_lshl_u32 v6, v6, v3, 2
s_waitcnt vmcnt(0)
ds_store_b32 v6, v5
s_and_saveexec_b32 s5, vcc_lo
s_cbranch_execz .LBB3_4
v_mad_u64_u32 v[4:5], null, s6, s4, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v5, 31, v4
v_lshlrev_b64 v[4:5], 2, v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v4, vcc_lo, s2, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
global_load_b32 v4, v[4:5], off
.LBB3_4:
s_or_b32 exec_lo, exec_lo, s5
v_add_nc_u32_e32 v2, s7, v1
s_cmp_lt_i32 s6, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_u32_u24_e32 v2, 0x60, v2
v_add_lshl_u32 v5, v2, v3, 2
v_mov_b32_e32 v2, 0
s_waitcnt vmcnt(0)
ds_store_b32 v5, v4
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB3_7
v_lshlrev_b32_e32 v2, 2, v3
s_lshl_b32 s2, s6, 1
s_delay_alu instid0(VALU_DEP_1)
v_mad_u32_u24 v1, 0x180, v1, v2
v_mov_b32_e32 v2, 0
.LBB3_6:
s_getpc_b64 s[4:5]
s_add_u32 s4, s4, Filter@rel32@lo+4
s_addc_u32 s5, s5, Filter@rel32@hi+12
s_ashr_i32 s3, s2, 31
ds_load_b32 v3, v1
s_lshl_b64 s[6:7], s[2:3], 2
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s4, s6, s4
s_addc_u32 s5, s7, s5
s_add_i32 s2, s2, -1
s_load_b32 s3, s[4:5], 0x0
v_add_nc_u32_e32 v1, 0x180, v1
s_cmp_lg_u32 s2, -1
s_waitcnt lgkmcnt(0)
v_fmac_f32_e32 v2, s3, v3
s_cbranch_scc1 .LBB3_6
.LBB3_7:
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| tiled_column_Kernel | 3,413 | 1,648 | stackv2-00000-of-00015 |
// Demangled: tiled_row_Kernel(float*, float*, int, int, int)
Function : _Z16tiled_row_KernelPfS_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R10, SR_TID.X &wr=0x1 ?trans7;
LDC R0, c[0x0][0x398] &wr=0x2 ?trans1;
LDCU UR4, c[0x0][0x394] &wr=0x2 ?trans1;
S2R R3, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x3 ?trans1;
S2R R13, SR_TID.Y &wr=0x4 ?trans4;
LDC R8, c[0x0][0x364] &wr=0x4 ?trans1;
LDCU UR8, c[0x0][0x360] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x5 ?trans1;
IMAD R2, R3, UR8, R10 &req={1} ?trans1;
IADD3 R3, PT, PT, -R0, UR4, RZ &req={2} ?WAIT4_END_GROUP;
S2UR UR4, SR_CTAID.Y &wr=0x4 ?trans1;
ISETP.GE.AND P0, PT, R2.reuse, R0, PT ?trans1;
ISETP.GE.AND P1, PT, R2, R3, PT ?WAIT12_END_GROUP;
@P0 LDC.64 R4, c[0x0][0x388] &wr=0x1 ?trans1;
IMAD R3, R8, UR4, R13 &req={4} ?WAIT7_END_GROUP;
@!P1 LDC.64 R6, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD R3, R3, UR5, R2 &req={3} ?WAIT5_END_GROUP;
@P0 IADD3 R9, PT, PT, R3.reuse, -R0.reuse, RZ ?trans2;
@!P1 IADD3 R11, PT, PT, R3, R0, RZ ?WAIT3_END_GROUP;
@P0 IMAD.WIDE R4, R9, 0x4, R4 &req={1} ?WAIT6_END_GROUP;
@P0 LDG.E R4, desc[UR6][R4.64] &req={5} &rd=0x1 &wr=0x3 ?trans1;
@!P1 IMAD.WIDE R6, R11, 0x4, R6 &req={2} ?WAIT6_END_GROUP;
@!P1 LDG.E R6, desc[UR6][R6.64] &rd=0x2 &wr=0x4 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x5 ?trans1;
UMOV UR4, 0x400 ?trans1;
IMAD R11, R13, 0x80, R10 ?trans1;
IADD3 R8, PT, PT, R10, UR8, RZ ?WAIT5_END_GROUP;
IMAD R5, R13, 0x80, R8 &req={1} ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={5} ?WAIT6_END_GROUP;
@P0 MOV R2, UR4 ?WAIT5_END_GROUP;
@P0 IMAD R9, R11, 0x4, R2 ?trans1;
@!P0 MOV R2, UR4 ?WAIT5_END_GROUP;
@!P0 IMAD R8, R11, 0x4, R2.reuse ?trans2;
@!P1 IMAD R7, R5.reuse, 0x4, R2.reuse &req={2} ?trans2;
@P1 IMAD R5, R5, 0x4, R2 ?trans2;
HFMA2 R13, -RZ, RZ, 0, 0 ?trans1;
@P0 STS [R9], R4 &req={3} &rd=0x1 ?trans4;
@!P0 STS [R8], RZ &rd=0x1 ?trans1;
ISETP.GE.AND P0, PT, R0, RZ, PT ?WAIT3_END_GROUP;
@!P1 STS [R7], R6 &req={4} &rd=0x1 ?trans4;
@P1 STS [R5], RZ &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P0 BRA 0x7e0 &req={0} ?trans5;
ISETP.GE.U32.AND P2, PT, R0.reuse, 0x4, PT ?trans1;
IADD3 R4, PT, PT, R0.reuse, R0, RZ &req={1} ?trans2;
LOP3.LUT R5, R0.reuse, 0x1, RZ, 0xc0, !PT ?trans2;
IADD3 R13, PT, PT, -R0, RZ, RZ ?trans1;
MOV R10, RZ ?trans1;
LOP3.LUT R4, R4, 0x6, RZ, 0xc0, !PT ?trans1;
ISETP.NE.U32.AND P0, PT, R5, 0x1, PT ?WAIT4_END_GROUP;
ISETP.GE.U32.AND P1, PT, R4, 0x3, PT ?trans1;
@!P2 BRA 0x580 ?WAIT12_END_GROUP;
IMAD.SHL.U32 R12, R0, 0x2, RZ ?trans1;
MOV R10, RZ ?trans1;
IMAD.U32 R5, R11, 0x4, R2 ?WAIT3_END_GROUP;
LOP3.LUT R4, R12, 0xfffffff8, RZ, 0xc0, !PT ?trans2;
IADD3 R15, PT, PT, R5, 0x10, RZ ?trans2;
IADD3 R14, PT, PT, -R4, RZ, RZ ?WAIT7_END_GROUP;
LDS R17, [R15+-0x10] &wr=0x0 ?trans1;
IMAD.SHL.U32 R16, R12, 0x4, RZ ?trans1;
IADD3 R14, PT, PT, R14, 0x8, RZ ?trans2;
IADD3 R13, PT, PT, R13, 0x8, RZ ?trans1;
LDS R19, [R15+-0xc] &wr=0x1 ?trans1;
LDC R18, c[0x3][R16] &wr=0x0 ?trans1;
IADD3 R12, PT, PT, R12, -0x8, RZ ?trans1;
ISETP.NE.AND P2, PT, R14, RZ, PT ?trans1;
LDS R20, [R15+-0x8] &wr=0x2 ?trans4;
LDS R21, [R15+-0x4] &wr=0x3 ?trans1;
LDC.64 R4, c[0x3][R16+-0x8] &wr=0x1 ?trans3;
LDS R22, [R15] &wr=0x4 ?trans4;
LDS R23, [R15+0x4] &wr=0x5 ?trans1;
LDC.64 R6, c[0x3][R16+-0x10] &wr=0x3 ?trans3;
LDS R24, [R15+0x8] &wr=0x2 ?trans4;
LDS R25, [R15+0xc] &rd=0x0 &wr=0x3 ?trans1;
LDC.64 R8, c[0x3][R16+-0x18] &wr=0x5 ?trans1;
IADD3 R15, PT, PT, R15, 0x20, RZ &req={0} ?trans1;
FFMA R18, R17, R18, R10 ?WAIT6_END_GROUP;
LDC R10, c[0x3][R16+-0x1c] &wr=0x0 ?trans1;
FFMA R5, R19, R5, R18 &req={1} ?WAIT4_END_GROUP;
FFMA R4, R20, R4, R5 &req={2} ?WAIT4_END_GROUP;
FFMA R7, R21, R7, R4 &req={3} ?WAIT4_END_GROUP;
FFMA R6, R22, R6, R7 &req={4} ?WAIT4_END_GROUP;
FFMA R9, R23, R9, R6 &req={5} ?WAIT4_END_GROUP;
FFMA R8, R24, R8, R9 ?WAIT4_END_GROUP;
FFMA R10, R25, R10, R8 &req={0} ?trans1;
@P2 BRA 0x3c0 ?trans6;
IADD3 R4, PT, PT, R11, R0, RZ ?trans1;
@!P1 BRA 0x6b0 ?trans6;
IADD3 R5, PT, PT, R4, R13, RZ ?trans2;
IADD3 R6, PT, PT, -R13.reuse, R0, RZ ?trans2;
IADD3 R13, PT, PT, R13, 0x4, RZ ?trans1;
IMAD R5, R5, 0x4, R2 ?trans2;
IMAD.SHL.U32 R6, R6, 0x4, RZ ?WAIT3_END_GROUP;
LDS R7, [R5] &wr=0x0 ?trans1;
LDC R8, c[0x3][R6] &wr=0x0 ?trans3;
LDS R12, [R5+0x4] &wr=0x1 ?trans4;
LDS R14, [R5+0x8] &wr=0x2 ?trans1;
LDC R9, c[0x3][R6+-0x4] &wr=0x1 ?trans3;
LDS R16, [R5+0xc] &wr=0x3 ?trans5;
LDC R11, c[0x3][R6+-0x8] &wr=0x2 ?trans8;
LDC R15, c[0x3][R6+-0xc] &wr=0x3 ?trans1;
FFMA R7, R7, R8, R10 &req={0} ?WAIT4_END_GROUP;
FFMA R7, R12, R9, R7 &req={1} ?WAIT4_END_GROUP;
FFMA R7, R14, R11, R7 &req={2} ?WAIT4_END_GROUP;
FFMA R10, R16, R15, R7 &req={3} ?WAIT7_END_GROUP;
@P0 BRA 0x770 ?trans5;
IADD3 R5, PT, PT, R4, R13, RZ ?trans2;
IADD3 R6, PT, PT, -R13.reuse, R0, RZ ?trans2;
IADD3 R13, PT, PT, R13, 0x2, RZ ?trans1;
IMAD R5, R5, 0x4, R2 ?trans2;
IMAD.SHL.U32 R6, R6, 0x4, RZ ?WAIT3_END_GROUP;
LDS R7, [R5] &wr=0x0 ?trans1;
LDC R8, c[0x3][R6] &wr=0x0 ?trans3;
LDS R12, [R5+0x4] &wr=0x1 ?trans5;
LDC R9, c[0x3][R6+-0x4] &wr=0x1 ?trans1;
FFMA R7, R7, R8, R10 &req={0} ?WAIT4_END_GROUP;
FFMA R10, R12, R9, R7 &req={1} ?WAIT7_END_GROUP;
IADD3 R5, PT, PT, R4, R13, RZ ?trans2;
IADD3 R0, PT, PT, -R13, R0, RZ ?WAIT3_END_GROUP;
IMAD R5, R5, 0x4, R2 ?trans2;
IMAD.SHL.U32 R0, R0, 0x4, RZ ?WAIT4_END_GROUP;
LDS R5, [R5] &wr=0x0 ?trans2;
LDC R0, c[0x3][R0] &wr=0x0 ?trans2;
FFMA R13, R5, R0, R10 &req={0} ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x380] &req={1} &wr=0x0 ?trans2;
IMAD.WIDE R2, R3, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R13 ?trans1;
EXIT ?trans5;
BRA 0x820;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: tiled_row_Kernel(float*, float*, int, int, int)
_Z16tiled_row_KernelPfS_iii:
s_clause 0x1
s_load_b32 s8, s[0:1], 0x2c
s_load_b256 s[0:7], s[0:1], 0x0
v_bfe_u32 v2, v0, 10, 10
v_and_b32_e32 v3, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s9, s8, 16
s_and_b32 s7, s8, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[6:7], null, s15, s9, v[2:3]
v_mad_u64_u32 v[4:5], null, s14, s7, v[3:4]
v_mad_u64_u32 v[0:1], null, v6, s4, v[4:5]
v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v1, 0
s_mov_b32 s4, exec_lo
v_cmpx_le_i32_e64 s6, v4
s_cbranch_execz .LBB2_2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_subrev_nc_u32_e32 v5, s6, v0
v_ashrrev_i32_e32 v6, 31, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[5:6], 2, v[5:6]
v_add_co_u32 v5, vcc_lo, s2, v5
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v6, vcc_lo, s3, v6, vcc_lo
global_load_b32 v6, v[5:6], off
.LBB2_2:
s_or_b32 exec_lo, exec_lo, s4
v_lshlrev_b32_e32 v5, 7, v2
s_sub_i32 s4, s5, s6
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_gt_i32_e32 vcc_lo, s4, v4
v_add_lshl_u32 v5, v5, v3, 2
s_waitcnt vmcnt(0)
ds_store_b32 v5, v6
s_and_saveexec_b32 s4, vcc_lo
s_cbranch_execz .LBB2_4
v_add_nc_u32_e32 v6, s6, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v7, 31, v6
v_lshlrev_b64 v[6:7], 2, v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v6, vcc_lo, s2, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s3, v7, vcc_lo
global_load_b32 v1, v[6:7], off
.LBB2_4:
s_or_b32 exec_lo, exec_lo, s4
v_lshl_add_u32 v5, s7, 2, v5
v_mov_b32_e32 v4, 0
s_cmp_lt_i32 s6, 0
s_waitcnt vmcnt(0)
ds_store_b32 v5, v1
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB2_7
v_dual_mov_b32 v4, 0 :: v_dual_lshlrev_b32 v1, 2, v3
s_lshl_b32 s2, s6, 1
s_delay_alu instid0(VALU_DEP_1)
v_lshl_add_u32 v1, v2, 9, v1
.LBB2_6:
s_getpc_b64 s[4:5]
s_add_u32 s4, s4, Filter@rel32@lo+4
s_addc_u32 s5, s5, Filter@rel32@hi+12
s_ashr_i32 s3, s2, 31
ds_load_b32 v2, v1
s_lshl_b64 s[6:7], s[2:3], 2
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s4, s6, s4
s_addc_u32 s5, s7, s5
s_add_i32 s2, s2, -1
s_load_b32 s3, s[4:5], 0x0
v_add_nc_u32_e32 v1, 4, v1
s_cmp_lg_u32 s2, -1
s_waitcnt lgkmcnt(0)
v_fmac_f32_e32 v4, s3, v2
s_cbranch_scc1 .LBB2_6
.LBB2_7:
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v4, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| tiled_row_Kernel | 3,313 | 1,541 | stackv2-00000-of-00015 |
// Demangled: matrixMean(float*, float*, int)
Function : _Z10matrixMeanPfS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans6;
S2UR UR5, SR_CTAID.Y &wr=0x2 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x390] &wr=0x3 ?trans1;
S2R R9, SR_TID.Y &wr=0x2 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x4 ?trans4;
LDC R7, c[0x0][0x364] &wr=0x2 ?trans8;
LDC.64 R4, c[0x0][0x380] &wr=0x5 ?trans1;
IMAD R0, R2, UR4, R3 &req={1} ?WAIT2_END_GROUP;
IMAD R3, R7, UR5, R9 &req={2} ?WAIT4_END_GROUP;
IMAD R3, R3, UR6, R0 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R3, 0x4, R4 &req={5} ?WAIT6_END_GROUP;
LDG.E R4, desc[UR8][R4.64] &req={4} &wr=0x2 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
ISETP.GE.U32.AND P0, PT, R7, 0x2, PT ?trans1;
ISETP.NE.AND P2, PT, R9, RZ, PT ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?WAIT6_END_GROUP;
LEA R3, R9, UR4, 0x2 ?WAIT5_END_GROUP;
STS [R3], R4 &req={2} &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P0 BRA 0x290 &req={0} ?trans5;
HFMA2 R0, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
LDCU UR6, c[0x0][0x390] &wr=0x0 ?trans1;
NOP ?WAIT5_END_GROUP;
IADD3 R5, PT, PT, R9, R0, RZ ?trans2;
IADD3 R4, PT, PT, R0, -0x1, R0 &req={1} ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R5, UR6, PT &req={0} ?trans1;
LOP3.LUT P0, RZ, R4, R9, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P1, P0, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@!P0 IMAD R4, R0.reuse, 0x4, R3 ?trans1;
@!P0 LDS R5, [R3] ?trans1;
IADD3 R0, PT, PT, R0, R0, RZ ?WAIT4_END_GROUP;
@!P0 LDS R4, [R4] &wr=0x0 ?trans2;
@!P0 FADD R6, R4, R5 &req={0} ?WAIT5_END_GROUP;
@!P0 STS [R3], R6 &rd=0x2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.U32.AND P0, PT, R0, R7, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1b0 &req={2} ?trans5;
@P2 EXIT ?trans5;
S2UR UR5, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR4, 0x400 ?trans1;
I2FP.F32.S32 R3, UR6 &req={1} ?WAIT4_END_GROUP;
MUFU.RCP R4, R3 &wr=0x1 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={0} ?trans1;
FFMA R5, -R3, R4, 1 &req={1} ?WAIT4_END_GROUP;
FFMA R5, R4, R5, R4 ?WAIT4_END_GROUP;
LDS R0, [UR4] &wr=0x0 ?trans2;
FCHK P0, R0, R3 &req={0} &wr=0x0 ?trans1;
FFMA R4, R0, R5, RZ ?WAIT4_END_GROUP;
FFMA R6, -R3, R4, R0 ?WAIT4_END_GROUP;
FFMA R7, R5, R6, R4 ?trans1;
@!P0 BRA 0x390 &req={0} ?trans6;
MOV R4, 0x390 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x3d0 ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans2;
IMAD.WIDE.U32 R2, R2, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR8][R2.64], R7 ?trans1;
EXIT ?trans5;
SHF.R.U32.HI R6, RZ, 0x17, R3 ?trans2;
SHF.R.U32.HI R5, RZ, 0x17, R0 ?trans2;
LOP3.LUT R6, R6, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R5, R5, 0xff, RZ, 0xc0, !PT ?trans1;
MOV R7, R0 ?trans1;
IADD3 R11, PT, PT, R6, -0x1, RZ ?trans1;
MOV R8, R3 ?trans1;
IADD3 R10, PT, PT, R5, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R11, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R10, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R9, RZ ?trans1;
@!P0 BRA 0x600 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0x9e0 ?trans5;
LOP3.LUT P0, RZ, R8, 0x7fffffff, R7, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x9c0 ?trans5;
FSETP.NEU.FTZ.AND P2, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P1 BRA !P2, 0x9c0 ?trans5;
LOP3.LUT P2, RZ, R7, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P1, P2, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0x9a0 ?trans5;
LOP3.LUT P1, RZ, R8, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x970 ?trans5;
ISETP.GE.AND P0, PT, R10, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R11, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R9, RZ ?trans1;
@!P0 MOV R9, 0xffffffc0 ?trans1;
@!P0 FFMA R7, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R8, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R9, PT, PT, R9, 0x40, RZ ?WAIT7_END_GROUP;
LEA R3, R6, 0xc0800000, 0x17 ?trans2;
IADD3 R5, PT, PT, R5, -0x7f, RZ ?trans2;
IADD3 R3, PT, PT, -R3, R8, RZ ?WAIT3_END_GROUP;
IMAD R0, R5.reuse, -0x800000, R7 ?trans1;
IADD3 R6, PT, PT, R5, 0x7f, -R6 ?trans1;
MUFU.RCP R8, R3 &wr=0x0 ?trans1;
FADD.FTZ R11, -R3, -RZ ?trans2;
IADD3 R6, PT, PT, R6, R9, RZ ?trans2;
FFMA R13, R8, R11, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R10, R8, R13, R8 ?WAIT4_END_GROUP;
FFMA R7, R0, R10, RZ ?WAIT4_END_GROUP;
FFMA R8, R11, R7, R0 ?WAIT4_END_GROUP;
FFMA R13, R10, R8, R7 ?WAIT4_END_GROUP;
FFMA R8, R11, R13, R0 ?WAIT4_END_GROUP;
FFMA R7, R10, R8, R13 ?WAIT5_END_GROUP;
SHF.R.U32.HI R0, RZ, 0x17, R7 ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R9, PT, PT, R0, R6, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R9, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x950 ?trans5;
ISETP.GT.AND P0, PT, R9, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x920 ?trans5;
ISETP.GE.AND P0, PT, R9, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x9f0 ?trans5;
ISETP.GE.AND P0, PT, R9, -0x18, PT ?trans1;
LOP3.LUT R7, R7, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x9f0 ?trans5;
FFMA.RZ R0, R10.reuse, R8.reuse, R13.reuse ?trans1;
IADD3 R6, PT, PT, R9.reuse, 0x20, RZ ?trans1;
FFMA.RM R3, R10, R8, R13 ?trans1;
ISETP.NE.AND P1, PT, R9.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R9, RZ, PT ?trans1;
LOP3.LUT R0, R0, 0x7fffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R5, R0, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R0, R10, R8, R13 ?trans1;
IADD3 R8, PT, PT, -R9, RZ, RZ ?trans2;
SHF.L.U32 R6, R5, R6, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R0, R3, PT ?trans1;
SEL R0, R8, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R6, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R0, RZ, R0, R5 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R6, RZ, 0x1, R0 ?WAIT3_END_GROUP;
SEL R3, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R3, R3, 0x1, R6, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, R0, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R6, PT, PT, R6, R3, RZ ?WAIT4_END_GROUP;
LOP3.LUT R7, R6, R7, RZ, 0xfc, !PT ?trans1;
BRA 0x9f0 ?trans6;
LOP3.LUT R7, R7, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R7, R7, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x9f0 ?trans6;
IMAD R7, R6, 0x800000, R7 ?trans1;
BRA 0x9f0 ?trans6;
LOP3.LUT R7, R8, 0x80000000, R7, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R7, R7, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x9f0 ?trans6;
LOP3.LUT R7, R8, 0x80000000, R7, 0x48, !PT ?trans1;
BRA 0x9f0 ?trans6;
MUFU.RSQ R7, -QNAN &wr=0x0 ?trans1;
BRA 0x9f0 ?trans5;
FADD.FTZ R7, R0, R3 ?WAIT7_END_GROUP;
HFMA2 R5, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R4 0x0 &req={0} ?trans5;
BRA 0xa10;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: matrixMean(float*, float*, int)
_Z10matrixMeanPfS_i:
s_clause 0x1
s_load_b32 s6, s[0:1], 0x24
s_load_b32 s4, s[0:1], 0x10
v_bfe_u32 v1, v0, 10, 10
s_load_b128 s[0:3], s[0:1], 0x0
v_and_b32_e32 v0, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s5, s6, 16
s_and_b32 s6, s6, 0xffff
v_mad_u64_u32 v[2:3], null, s15, s5, v[1:2]
v_mov_b32_e32 v3, 0
s_mul_i32 s6, s14, s6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v2, v2, s4
v_add3_u32 v2, s6, v0, v2
v_lshl_add_u32 v0, v1, 2, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[2:3]
v_add_co_u32 v2, vcc_lo, s0, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
v_cmp_lt_u16_e64 s0, s5, 2
global_load_b32 v2, v[2:3], off
s_and_b32 vcc_lo, exec_lo, s0
s_waitcnt vmcnt(0)
ds_store_b32 v0, v2
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_vccnz .LBB0_5
s_mov_b32 s6, 1
.LBB0_2:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
s_lshl_b32 s1, s6, 1
v_add_nc_u32_e32 v2, s6, v1
s_add_i32 s0, s1, -1
v_and_b32_e32 v3, s0, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_gt_u32_e32 vcc_lo, s4, v2
v_cmp_eq_u32_e64 s0, 0, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s7, vcc_lo, s0
s_and_saveexec_b32 s0, s7
s_cbranch_execz .LBB0_4
v_lshl_add_u32 v2, s6, 2, v0
ds_load_b32 v2, v2
ds_load_b32 v3, v0
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v2, v2, v3
ds_store_b32 v0, v2
.LBB0_4:
s_or_b32 exec_lo, exec_lo, s0
s_cmp_ge_u32 s1, s5
s_mov_b32 s6, s1
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB0_2
.LBB0_5:
s_mov_b32 s0, exec_lo
v_cmpx_eq_u32_e32 0, v1
s_cbranch_execz .LBB0_7
v_mov_b32_e32 v0, 0
v_cvt_f32_i32_e32 v2, s4
s_mov_b32 s15, 0
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[0:1], s[14:15], 2
ds_load_b32 v1, v0
s_add_u32 s0, s2, s0
s_addc_u32 s1, s3, s1
s_waitcnt lgkmcnt(0)
v_div_scale_f32 v3, null, v2, v2, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f32_e32 v4, v3
s_waitcnt_depctr 0xfff
v_fma_f32 v5, -v3, v4, 1.0
v_fmac_f32_e32 v4, v5, v4
v_div_scale_f32 v5, vcc_lo, v1, v2, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v6, v5, v4
v_fma_f32 v7, -v3, v6, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v6, v7, v4
v_fma_f32 v3, -v3, v6, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fmas_f32 v3, v3, v4, v6
v_div_fixup_f32 v1, v3, v2, v1
global_store_b32 v0, v1, s[0:1]
.LBB0_7:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| matrixMean | 3,942 | 1,510 | stackv2-00000-of-00015 |
// Demangled: matrixNorm(float*, float*, float*, float*, int)
Function : _Z10matrixNormPfS_S_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R7, SR_CTAID.Y &wr=0x1 ?trans7;
LDC.64 R8, c[0x0][0x398] &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans1;
S2R R6, SR_TID.Y &wr=0x3 ?trans1;
S2R R11, SR_CTAID.X &wr=0x4 ?trans1;
S2R R0, SR_TID.X &wr=0x4 ?trans1;
LDCU UR6, c[0x0][0x360] &wr=0x4 ?trans1;
LDCU UR8, c[0x0][0x3a0] &wr=0x5 ?trans1;
IMAD.WIDE.U32 R2, R7, 0x4, R8 &req={1} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={2} &wr=0x2 ?trans1;
LDCU UR7, c[0x0][0x364] &wr=0x3 ?trans1;
IMAD R0, R11, UR6, R0 &req={4} ?trans2;
IMAD R7, R7, UR7, R6 &req={3} ?trans1;
FSETP.NEU.AND P0, PT, R2, RZ, PT &req={2} ?WAIT3_END_GROUP;
IMAD R2, R7, UR8, R0 &req={5} ?WAIT10_END_GROUP;
@!P0 LDC.64 R4, c[0x0][0x388] &wr=0x1 ?trans2;
@!P0 IMAD.WIDE.U32 R4, R2, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
@!P0 STG.E desc[UR4][R4.64], RZ &rd=0x1 ?trans1;
@!P0 EXIT &req={0} ?trans5;
LDC.64 R6, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD.WIDE.U32 R8, R11, 0x4, R8 ?WAIT5_END_GROUP;
LDG.E R3, desc[UR4][R8.64] &wr=0x2 ?trans2;
LDC.64 R4, c[0x0][0x380] &req={1} &wr=0x1 ?trans1;
IMAD.WIDE.U32 R6, R11, 0x4, R6 &req={0} ?WAIT6_END_GROUP;
LDG.E R7, desc[UR4][R6.64] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R4, R2, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R4.64] &wr=0x3 ?trans1;
BSSY.RECONVERGENT B0, 0x2a0 ?trans1;
MUFU.RCP R10, R3 &req={2} &wr=0x0 ?trans2;
FFMA R11, -R3, R10, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R11, R10, R11, R10 ?trans1;
FADD R0, R0, -R7 &req={3} ?WAIT4_END_GROUP;
FCHK P0, R0, R3 &wr=0x0 ?trans1;
FFMA R10, R0, R11, RZ ?WAIT4_END_GROUP;
FFMA R8, -R3, R10, R0 ?WAIT4_END_GROUP;
FFMA R11, R11, R8, R10 ?trans1;
@!P0 BRA 0x290 &req={0} ?trans6;
MOV R4, 0x280 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x2e0 ?trans5;
MOV R11, R7 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans2;
IMAD.WIDE.U32 R4, R2, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R11 ?trans1;
EXIT ?trans5;
SHF.R.U32.HI R6, RZ, 0x17, R3 ?trans1;
BSSY.RECONVERGENT B1, 0x940 ?trans1;
SHF.R.U32.HI R5, RZ, 0x17, R0 ?trans2;
LOP3.LUT R6, R6, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R5, R5, 0xff, RZ, 0xc0, !PT ?trans1;
MOV R7, R0 ?trans1;
IADD3 R11, PT, PT, R6, -0x1, RZ ?trans1;
MOV R8, R3 ?trans1;
IADD3 R10, PT, PT, R5, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R11, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R10, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R9, RZ ?trans1;
@!P0 BRA 0x520 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0x920 ?trans5;
LOP3.LUT P0, RZ, R8, 0x7fffffff, R7, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x900 ?trans5;
FSETP.NEU.FTZ.AND P2, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P1 BRA !P2, 0x900 ?trans5;
LOP3.LUT P2, RZ, R7, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P1, P2, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0x8e0 ?trans5;
LOP3.LUT P1, RZ, R8, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x8b0 ?trans5;
ISETP.GE.AND P0, PT, R10, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R11, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R9, RZ ?trans1;
@!P0 MOV R9, 0xffffffc0 ?trans1;
@!P0 FFMA R7, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R8, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R9, PT, PT, R9, 0x40, RZ ?WAIT7_END_GROUP;
LEA R3, R6, 0xc0800000, 0x17 ?trans1;
BSSY.RECONVERGENT B2, 0x8a0 ?trans1;
IADD3 R5, PT, PT, R5, -0x7f, RZ ?trans2;
IADD3 R3, PT, PT, -R3, R8, RZ ?WAIT3_END_GROUP;
IMAD R0, R5.reuse, -0x800000, R7 ?trans1;
IADD3 R6, PT, PT, R5, 0x7f, -R6 ?trans1;
MUFU.RCP R8, R3 &wr=0x0 ?trans1;
FADD.FTZ R11, -R3, -RZ ?trans2;
IADD3 R6, PT, PT, R6, R9, RZ ?trans2;
FFMA R13, R8, R11, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R10, R8, R13, R8 ?WAIT4_END_GROUP;
FFMA R7, R0, R10, RZ ?WAIT4_END_GROUP;
FFMA R8, R11, R7, R0 ?WAIT4_END_GROUP;
FFMA R13, R10, R8, R7 ?WAIT4_END_GROUP;
FFMA R8, R11, R13, R0 ?WAIT4_END_GROUP;
FFMA R7, R10, R8, R13 ?WAIT5_END_GROUP;
SHF.R.U32.HI R0, RZ, 0x17, R7 ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R9, PT, PT, R0, R6, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R9, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x880 ?trans5;
ISETP.GT.AND P0, PT, R9, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x850 ?trans5;
ISETP.GE.AND P0, PT, R9, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x890 ?trans5;
ISETP.GE.AND P0, PT, R9, -0x18, PT ?trans1;
LOP3.LUT R7, R7, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x890 ?trans5;
FFMA.RZ R0, R10.reuse, R8.reuse, R13.reuse ?trans1;
IADD3 R6, PT, PT, R9.reuse, 0x20, RZ ?trans1;
FFMA.RM R3, R10, R8, R13 ?trans1;
ISETP.NE.AND P1, PT, R9.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R9, RZ, PT ?trans1;
LOP3.LUT R0, R0, 0x7fffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R5, R0, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R0, R10, R8, R13 ?trans1;
IADD3 R8, PT, PT, -R9, RZ, RZ ?trans2;
SHF.L.U32 R6, R5, R6, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R0, R3, PT ?trans1;
SEL R0, R8, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R6, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R0, RZ, R0, R5 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R6, RZ, 0x1, R0 ?WAIT3_END_GROUP;
SEL R3, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R3, R3, 0x1, R6, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, R0, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R6, PT, PT, R6, R3, RZ ?WAIT4_END_GROUP;
LOP3.LUT R7, R6, R7, RZ, 0xfc, !PT ?trans1;
BRA 0x890 ?trans6;
LOP3.LUT R7, R7, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R7, R7, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x890 ?trans6;
IMAD R7, R6, 0x800000, R7 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
BRA 0x930 ?trans5;
LOP3.LUT R7, R8, 0x80000000, R7, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R7, R7, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x930 ?trans6;
LOP3.LUT R7, R8, 0x80000000, R7, 0x48, !PT ?trans1;
BRA 0x930 ?trans6;
MUFU.RSQ R7, -QNAN &wr=0x0 ?trans1;
BRA 0x930 ?trans5;
FADD.FTZ R7, R0, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
HFMA2 R5, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R4 0x0 &req={0} ?trans5;
BRA 0x960;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: matrixNorm(float*, float*, float*, float*, int)
_Z10matrixNormPfS_S_S_i:
s_clause 0x2
s_load_b32 s12, s[0:1], 0x34
s_load_b256 s[4:11], s[0:1], 0x0
s_load_b32 s13, s[0:1], 0x20
s_mov_b32 s2, s15
s_mov_b32 s3, 0
v_bfe_u32 v1, v0, 10, 10
s_lshl_b64 s[0:1], s[2:3], 2
v_and_b32_e32 v0, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s15, s12, 16
s_and_b32 s12, s12, 0xffff
s_add_u32 s0, s10, s0
s_addc_u32 s1, s11, s1
v_mad_u64_u32 v[2:3], null, s2, s15, v[1:2]
s_load_b32 s0, s[0:1], 0x0
s_mul_i32 s1, s14, s12
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_lo_u32 v1, v2, s13
v_mov_b32_e32 v2, 0
v_add3_u32 v1, s1, v0, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_cmp_eq_f32_e64 s0, s0, 0
s_and_b32 vcc_lo, exec_lo, s0
s_cbranch_vccnz .LBB2_2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_add_co_u32 v2, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
s_mov_b32 s15, s3
s_lshl_b64 s[0:1], s[14:15], 2
global_load_b32 v2, v[2:3], off
s_add_u32 s2, s8, s0
s_addc_u32 s3, s9, s1
s_add_u32 s0, s10, s0
s_load_b32 s2, s[2:3], 0x0
s_addc_u32 s1, s11, s1
s_load_b32 s0, s[0:1], 0x0
s_waitcnt vmcnt(0) lgkmcnt(0)
v_subrev_f32_e32 v2, s2, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_scale_f32 v3, null, s0, s0, v2
v_rcp_f32_e32 v4, v3
s_waitcnt_depctr 0xfff
v_fma_f32 v5, -v3, v4, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v4, v5, v4
v_div_scale_f32 v5, vcc_lo, v2, s0, v2
v_mul_f32_e32 v6, v5, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v7, -v3, v6, v5
v_fmac_f32_e32 v6, v7, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v3, -v3, v6, v5
v_div_fmas_f32 v3, v3, v4, v6
s_delay_alu instid0(VALU_DEP_1)
v_div_fixup_f32 v2, v3, s0, v2
.LBB2_2:
s_delay_alu instid0(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| matrixNorm | 3,733 | 1,243 | stackv2-00000-of-00015 |
// Demangled: matrixSD(float*, float*, float*, int)
Function : _Z8matrixSDPfS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans6;
S2UR UR5, SR_CTAID.Y &wr=0x2 ?trans1;
S2R R5, SR_TID.X &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x398] &wr=0x3 ?trans1;
S2R R0, SR_TID.Y &wr=0x2 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x4 ?trans4;
LDC R3, c[0x0][0x364] &wr=0x2 ?trans8;
LDC.64 R8, c[0x0][0x388] &wr=0x5 ?trans8;
LDC.64 R6, c[0x0][0x380] &wr=0x0 ?trans1;
IMAD R4, R2, UR4, R5 &req={1} ?WAIT2_END_GROUP;
IMAD R5, R3, UR5, R0 &req={2} ?trans2;
IMAD.WIDE.U32 R8, R2, 0x4, R8 &req={5} ?WAIT4_END_GROUP;
IMAD R5, R5, UR6, R4 &req={3} ?trans2;
LDG.E R9, desc[UR8][R8.64] &req={4} &wr=0x2 ?trans2;
IMAD.WIDE.U32 R6, R5, 0x4, R6 &req={0} ?WAIT5_END_GROUP;
LDG.E R4, desc[UR8][R6.64] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x590 ?trans1;
HFMA2 R5, -RZ, RZ, 1.875, 0 ?trans2;
FADD R4, R4, -R9 &req={2} ?WAIT5_END_GROUP;
FSETP.NEU.AND P0, PT, R4, 1, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x580 ?trans5;
FSETP.NAN.AND P0, PT, |R4|, |R4|, PT ?WAIT13_END_GROUP;
@P0 FADD R5, R4, 2 ?trans1;
@P0 BRA 0x580 ?trans6;
FSETP.GEU.AND P0, PT, |R4|.reuse, 1.175494350822287508e-38, PT ?trans1;
FMUL R5, |R4|, 16777216 ?trans1;
MOV R11, 0x3a2c32e4 ?WAIT4_END_GROUP;
FSEL R5, R5, |R4|, !P0 ?WAIT5_END_GROUP;
IADD3 R6, PT, PT, R5, -0x3f3504f3, RZ ?WAIT4_END_GROUP;
LOP3.LUT R6, R6, 0xff800000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R5, PT, PT, R5, -R6.reuse, RZ ?trans2;
I2FP.F32.S32 R6, R6 ?WAIT3_END_GROUP;
FADD R8, R5.reuse, 1 ?trans1;
FADD R7, R5, -1 ?trans1;
FSEL R5, RZ, -24, P0 ?trans1;
FSETP.NEU.AND P0, PT, |R4|, +INF , PT ?trans2;
FADD R9, R7, R7 ?trans1;
MUFU.RCP R8, R8 &wr=0x0 ?trans1;
FFMA R5, R6, 1.1920928955078125e-07, R5 ?trans1;
FSETP.NEU.AND P0, PT, R4, RZ, P0 ?WAIT13_END_GROUP;
@!P0 FADD R4, R4, R4 ?trans1;
FMUL R10, R8, R9 &req={0} ?WAIT4_END_GROUP;
FADD R9, R7, -R10 ?trans1;
FMUL R6, R10.reuse, R10.reuse ?trans1;
FFMA R14, R10, 1.4426950216293334961, R5 ?trans2;
FADD R12, R9, R9 ?trans1;
FFMA R9, R6.reuse, R11, 0.0032181653659790754318 ?trans1;
FADD R5, R5, -R14 ?trans2;
FFMA R7, R7, -R10, R12 ?trans1;
FFMA R9, R6, R9, 0.018033718690276145935 ?trans1;
FFMA R12, R10, 1.4426950216293334961, R5 ?WAIT2_END_GROUP;
FMUL R7, R8, R7 ?trans1;
FFMA R9, R6, R9, 0.12022458761930465698 ?WAIT3_END_GROUP;
FFMA R5, R7, 1.4426950216293334961, R12 ?trans1;
FMUL R9, R6, R9 ?WAIT3_END_GROUP;
FFMA R8, R10, 1.9251366722983220825e-08, R5 ?trans1;
FMUL R6, R9, 3 ?WAIT4_END_GROUP;
FFMA R6, R7, R6, R8 ?trans1;
HFMA2 R8, -RZ, RZ, 0.64013671875, -15.109375 ?WAIT3_END_GROUP;
FFMA R9, R10, R9, R6 ?WAIT4_END_GROUP;
FADD R5, R14, R9 ?WAIT4_END_GROUP;
FMUL R6, R5, 2 ?trans1;
FADD R14, -R14, R5 ?WAIT3_END_GROUP;
FRND R7, R6 &wr=0x0 ?trans1;
FADD R14, R9, -R14 ?trans1;
FFMA R5, R5, 2, -R6 ?trans1;
FSETP.GEU.AND P2, PT, R6, RZ, PT ?WAIT3_END_GROUP;
FFMA R14, R14, 2, R5 ?trans1;
FADD R5, R6, -R7 &req={0} ?trans1;
FSETP.GT.AND P1, PT, R7, RZ, PT ?WAIT3_END_GROUP;
FADD R5, R5, R14 ?trans2;
SEL R7, RZ, 0x83000000, P1 ?trans1;
FSETP.GT.AND P1, PT, |R6|, 152, PT ?trans1;
FFMA R8, R5, R8, 0.0013391353422775864601 ?WAIT3_END_GROUP;
IADD3 R9, PT, PT, R7, 0x7f000000, RZ ?trans1;
FFMA R10, R5.reuse, R8, 0.0096188392490148544312 ?trans2;
F2I.NTZ R8, R6 &wr=0x0 ?trans2;
FFMA R10, R5, R10, 0.055503588169813156128 ?WAIT4_END_GROUP;
FFMA R10, R5, R10, 0.24022644758224487305 ?WAIT4_END_GROUP;
FFMA R10, R5, R10, 0.69314718246459960938 ?WAIT4_END_GROUP;
FFMA R10, R5, R10, 1 ?trans1;
IMAD R8, R8, 0x800000, -R7 &req={0} ?trans1;
FSEL R5, RZ, +INF , !P2 ?trans2;
FMUL R9, R9, R10 ?WAIT4_END_GROUP;
@!P1 FMUL R5, R8, R9 ?trans1;
@!P0 FADD R5, |R4|, -RZ ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
S2UR UR5, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR4, 0x400 ?trans1;
ISETP.GE.U32.AND P0, PT, R3, 0x2, PT ?trans1;
ISETP.NE.AND P2, PT, R0, RZ, PT ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={0} ?WAIT6_END_GROUP;
LEA R4, R0, UR4, 0x2 ?WAIT5_END_GROUP;
STS [R4], R5 &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P0 BRA 0x730 ?trans5;
MOV R5, 0x1 &req={0} ?trans1;
LDCU UR6, c[0x0][0x398] &wr=0x0 ?trans1;
NOP ?WAIT5_END_GROUP;
IADD3 R6, PT, PT, R0, R5, RZ ?trans2;
IADD3 R7, PT, PT, R5, -0x1, R5 ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R6, UR6, PT &req={0} ?trans1;
LOP3.LUT P0, RZ, R7, R0, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P1, P0, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@!P0 IMAD R6, R5.reuse, 0x4, R4 ?trans1;
@!P0 LDS R7, [R4] ?trans1;
IADD3 R5, PT, PT, R5, R5, RZ ?WAIT4_END_GROUP;
@!P0 LDS R6, [R6] &wr=0x0 ?trans2;
@!P0 FADD R7, R6, R7 &req={0} ?WAIT5_END_GROUP;
@!P0 STS [R4], R7 &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.U32.AND P0, PT, R5, R3, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x650 &req={1} ?trans5;
@P2 EXIT ?trans5;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
I2FP.F32.S32 R3, UR6 ?WAIT4_END_GROUP;
MUFU.RCP R4, R3 &req={0} &wr=0x0 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?trans1;
FFMA R5, -R3, R4, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R5, R4, R5, R4 ?WAIT4_END_GROUP;
LDS R0, [UR4] &wr=0x0 ?trans2;
FCHK P0, R0, R3 &req={0} &wr=0x0 ?trans1;
FFMA R4, R0, R5, RZ ?WAIT4_END_GROUP;
FFMA R6, -R3, R4, R0 ?WAIT4_END_GROUP;
FFMA R4, R5, R6, R4 ?trans1;
@!P0 BRA 0x840 &req={0} ?trans6;
MOV R4, 0x830 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xac0 ?trans5;
MOV R4, R7 ?WAIT7_END_GROUP;
IADD3 R0, PT, PT, R4, -0xd000000, RZ ?trans1;
MUFU.RSQ R5, R4 &rd=0x0 &wr=0x1 ?trans4;
ISETP.GT.U32.AND P0, PT, R0, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x8c0 &req={0} ?trans5;
MOV R0, R4 ?trans1;
MOV R6, 0x8b0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x950 &req={1} ?trans5;
BRA 0x900 ?trans5;
FMUL.FTZ R3, R5.reuse, R4 &req={1} ?trans1;
FMUL.FTZ R0, R5, 0.5 ?WAIT3_END_GROUP;
FFMA R4, -R3, R3, R4 ?WAIT4_END_GROUP;
FFMA R3, R4, R0, R3 ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans2;
LEA R4, P0, R2, R4, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R5, R2, R5, RZ, 0x2, P0 ?WAIT5_END_GROUP;
STG.E desc[UR8][R4.64], R3 ?trans1;
EXIT ?trans5;
LOP3.LUT P0, RZ, R0, 0x7fffffff, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 MOV R3, R0 ?trans1;
@!P0 BRA 0xa90 ?trans6;
FSETP.GEU.FTZ.AND P0, PT, R0, RZ, PT ?WAIT13_END_GROUP;
@!P0 MOV R3, 0x7fffffff ?trans1;
@!P0 BRA 0xa90 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P0 FADD.FTZ R3, R0, 1 ?trans1;
@P0 BRA 0xa90 ?trans6;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@!P0 MOV R3, R0 ?trans1;
@!P0 BRA 0xa90 ?trans6;
FFMA R0, R0, 1.84467440737095516160e+19, RZ ?WAIT4_END_GROUP;
MUFU.RSQ R3, R0 &wr=0x0 ?trans2;
FMUL.FTZ R5, R0, R3 &req={0} ?trans1;
FMUL.FTZ R3, R3, 0.5 ?WAIT3_END_GROUP;
FADD.FTZ R4, -R5, -RZ ?WAIT4_END_GROUP;
FFMA R4, R5, R4, R0 ?WAIT4_END_GROUP;
FFMA R3, R4, R3, R5 ?WAIT4_END_GROUP;
FMUL.FTZ R3, R3, 2.3283064365386962891e-10 ?WAIT7_END_GROUP;
MOV R4, R6 ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R4 0x0 ?trans5;
SHF.R.U32.HI R6, RZ, 0x17, R3 ?trans2;
SHF.R.U32.HI R5, RZ, 0x17, R0 ?trans2;
LOP3.LUT R6, R6, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R5, R5, 0xff, RZ, 0xc0, !PT ?trans1;
MOV R7, R0 ?trans1;
IADD3 R11, PT, PT, R6, -0x1, RZ ?trans1;
MOV R8, R3 ?trans1;
IADD3 R10, PT, PT, R5, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R11, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R10, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R9, RZ ?trans1;
@!P0 BRA 0xcf0 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0x10d0 ?trans5;
LOP3.LUT P0, RZ, R8, 0x7fffffff, R7, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x10b0 ?trans5;
FSETP.NEU.FTZ.AND P2, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P1 BRA !P2, 0x10b0 ?trans5;
LOP3.LUT P2, RZ, R7, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P1, P2, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0x1090 ?trans5;
LOP3.LUT P1, RZ, R8, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x1060 ?trans5;
ISETP.GE.AND P0, PT, R10, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R11, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R9, RZ ?trans1;
@!P0 MOV R9, 0xffffffc0 ?trans1;
@!P0 FFMA R7, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R8, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R9, PT, PT, R9, 0x40, RZ ?WAIT7_END_GROUP;
LEA R3, R6, 0xc0800000, 0x17 ?trans2;
IADD3 R5, PT, PT, R5, -0x7f, RZ ?trans2;
IADD3 R3, PT, PT, -R3, R8, RZ ?WAIT3_END_GROUP;
IMAD R0, R5.reuse, -0x800000, R7 ?trans1;
IADD3 R6, PT, PT, R5, 0x7f, -R6 ?trans1;
MUFU.RCP R8, R3 &wr=0x0 ?trans1;
FADD.FTZ R11, -R3, -RZ ?trans2;
IADD3 R6, PT, PT, R6, R9, RZ ?trans2;
FFMA R13, R8, R11, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R10, R8, R13, R8 ?WAIT4_END_GROUP;
FFMA R7, R0, R10, RZ ?WAIT4_END_GROUP;
FFMA R8, R11, R7, R0 ?WAIT4_END_GROUP;
FFMA R13, R10, R8, R7 ?WAIT4_END_GROUP;
FFMA R8, R11, R13, R0 ?WAIT4_END_GROUP;
FFMA R7, R10, R8, R13 ?WAIT5_END_GROUP;
SHF.R.U32.HI R0, RZ, 0x17, R7 ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R9, PT, PT, R0, R6, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R9, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1040 ?trans5;
ISETP.GT.AND P0, PT, R9, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1010 ?trans5;
ISETP.GE.AND P0, PT, R9, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x10e0 ?trans5;
ISETP.GE.AND P0, PT, R9, -0x18, PT ?trans1;
LOP3.LUT R7, R7, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x10e0 ?trans5;
FFMA.RZ R0, R10.reuse, R8.reuse, R13.reuse ?trans1;
IADD3 R6, PT, PT, R9.reuse, 0x20, RZ ?trans1;
FFMA.RM R3, R10, R8, R13 ?trans1;
ISETP.NE.AND P1, PT, R9.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R9, RZ, PT ?trans1;
LOP3.LUT R0, R0, 0x7fffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R5, R0, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R0, R10, R8, R13 ?trans1;
IADD3 R8, PT, PT, -R9, RZ, RZ ?trans2;
SHF.L.U32 R6, R5, R6, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R0, R3, PT ?trans1;
SEL R0, R8, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R6, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R0, RZ, R0, R5 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R6, RZ, 0x1, R0 ?WAIT3_END_GROUP;
SEL R3, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R3, R3, 0x1, R6, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, R0, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R6, PT, PT, R6, R3, RZ ?WAIT4_END_GROUP;
LOP3.LUT R7, R6, R7, RZ, 0xfc, !PT ?trans1;
BRA 0x10e0 ?trans6;
LOP3.LUT R7, R7, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R7, R7, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x10e0 ?trans6;
IMAD R7, R6, 0x800000, R7 ?trans1;
BRA 0x10e0 ?trans6;
LOP3.LUT R7, R8, 0x80000000, R7, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R7, R7, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x10e0 ?trans6;
LOP3.LUT R7, R8, 0x80000000, R7, 0x48, !PT ?trans1;
BRA 0x10e0 ?trans6;
MUFU.RSQ R7, -QNAN &wr=0x0 ?trans1;
BRA 0x10e0 ?trans5;
FADD.FTZ R7, R0, R3 ?WAIT7_END_GROUP;
HFMA2 R5, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R4 0x0 &req={0} ?trans5;
BRA 0x1100;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: matrixSD(float*, float*, float*, int)
_Z8matrixSDPfS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s6, s[0:1], 0x18
v_bfe_u32 v1, v0, 10, 10
s_load_b128 s[8:11], s[0:1], 0x0
v_and_b32_e32 v0, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s7, s2, 16
s_and_b32 s2, s2, 0xffff
v_mad_u64_u32 v[2:3], null, s15, s7, v[1:2]
v_mov_b32_e32 v3, 0
s_mul_i32 s2, s14, s2
s_mov_b32 s15, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
s_lshl_b64 s[4:5], s[14:15], 2
v_mul_lo_u32 v2, v2, s6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add3_u32 v2, s2, v0, v2
s_add_u32 s2, s10, s4
s_addc_u32 s3, s11, s5
s_load_b32 s2, s[2:3], 0x0
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s8, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
global_load_b32 v0, v[2:3], off
s_waitcnt vmcnt(0) lgkmcnt(0)
v_subrev_f32_e32 v2, s2, v0
s_mov_b32 s2, 0x3e76c4e1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_frexp_mant_f32_e64 v0, |v2|
v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v0
v_cndmask_b32_e64 v3, 0, 1, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ldexp_f32 v0, v0, v3
v_add_f32_e32 v3, 1.0, v0
v_add_f32_e32 v5, -1.0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v7, -1.0, v3
v_sub_f32_e32 v0, v0, v7
v_rcp_f32_e32 v4, v3
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v6, v5, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v8, v3, v6
v_fma_f32 v3, v6, v3, -v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v3, v6, v0
v_add_f32_e32 v0, v8, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_f32_e32 v8, v0, v8
v_sub_f32_e32 v3, v8, v3
v_sub_f32_e32 v7, v5, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_f32_e32 v5, v5, v7
v_sub_f32_e32 v0, v5, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v0, v3, v0
v_add_f32_e32 v0, v7, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v0, v4, v0
v_add_f32_e32 v3, v6, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_f32_e32 v4, v3, v6
v_dual_mul_f32 v5, v3, v3 :: v_dual_sub_f32 v0, v0, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v4, v3, v3, -v5
v_add_f32_e32 v6, v0, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v4, v3, v6
v_add_f32_e32 v6, v5, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fmaak_f32 v7, s2, v6, 0x3e91f4c4
v_sub_f32_e32 v5, v6, v5
v_dual_fmaak_f32 v7, v6, v7, 0x3ecccdef :: v_dual_sub_f32 v4, v4, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v8, v6, v7
v_fma_f32 v5, v6, v7, -v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v5, v4, v7
v_add_f32_e32 v7, v8, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_sub_f32 v8, v7, v8 :: v_dual_add_f32 v9, 0x3f2aaaaa, v7
v_dual_sub_f32 v5, v5, v8 :: v_dual_add_f32 v8, 0xbf2aaaaa, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_dual_add_f32 v5, 0x31739010, v5 :: v_dual_mul_f32 v10, v3, v6
v_sub_f32_e32 v7, v7, v8
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v11, v6, v3, -v10
v_add_f32_e32 v5, v5, v7
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_fmac_f32_e32 v11, v6, v0
v_ldexp_f32 v0, v0, 1
v_dual_fmac_f32 v11, v4, v3 :: v_dual_add_f32 v4, v9, v5
v_ldexp_f32 v3, v3, 1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_add_f32 v6, v10, v11 :: v_dual_sub_f32 v7, v9, v4
v_dual_mul_f32 v8, v6, v4 :: v_dual_add_f32 v5, v5, v7
v_sub_f32_e32 v9, v6, v10
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v7, v6, v4, -v8
v_sub_f32_e32 v9, v11, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_fmac_f32_e32 v7, v6, v5
v_frexp_exp_i32_f32_e32 v5, v2
v_fmac_f32_e32 v7, v9, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_subrev_co_ci_u32_e32 v4, vcc_lo, 0, v5, vcc_lo
v_cmp_eq_f32_e32 vcc_lo, 1.0, v2
v_add_f32_e32 v5, v8, v7
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_f32_i32_e32 v4, v4
v_sub_f32_e32 v8, v5, v8
v_add_f32_e32 v6, v3, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_sub_f32_e32 v7, v7, v8
v_mul_f32_e32 v9, 0x3f317218, v4
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_sub_f32_e32 v3, v6, v3
v_add_f32_e32 v0, v0, v7
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v8, 0x3f317218, v4, -v9
v_dual_sub_f32 v3, v5, v3 :: v_dual_fmamk_f32 v4, v4, 0xb102e308, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_add_f32 v0, v0, v3 :: v_dual_add_f32 v3, v9, v4
v_add_f32_e32 v5, v6, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_f32_e32 v9, v3, v9
v_sub_f32_e32 v4, v4, v9
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v7, v3, v5
v_sub_f32_e32 v8, v7, v3
v_sub_f32_e32 v6, v5, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_f32_e32 v0, v0, v6
v_add_f32_e32 v6, v4, v0
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_f32_e32 v10, v7, v8
v_sub_f32_e32 v5, v5, v8
v_sub_f32_e32 v3, v3, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_f32_e32 v3, v5, v3
v_sub_f32_e32 v5, v6, v4
v_add_f32_e32 v3, v6, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_sub_f32_e32 v6, v6, v5
v_sub_f32_e32 v0, v0, v5
v_add_f32_e32 v8, v7, v3
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_f32_e32 v4, v4, v6
v_sub_f32_e32 v5, v8, v7
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_f32_e32 v0, v0, v4
v_cndmask_b32_e64 v4, 2.0, 1.0, vcc_lo
v_sub_f32_e32 v3, v3, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v0, v0, v3
v_add_f32_e32 v3, v8, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_sub_f32 v5, v3, v8 :: v_dual_mul_f32 v6, v4, v3
v_sub_f32_e32 v0, v0, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_fma_f32 v3, v4, v3, -v6
v_cmp_class_f32_e64 vcc_lo, v6, 0x204
v_fmac_f32_e32 v3, v4, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v0, v6, v3
v_cndmask_b32_e32 v5, v0, v6, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v5
v_cndmask_b32_e64 v7, 0, 0x37000000, vcc_lo
v_sub_f32_e32 v8, v5, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_mul_f32 v9, 0x3fb8aa3b, v8 :: v_dual_sub_f32 v0, v0, v6
v_fma_f32 v10, 0x3fb8aa3b, v8, -v9
v_rndne_f32_e32 v11, v9
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_f32_e32 v0, v3, v0
v_dual_fmamk_f32 v10, v8, 0x32a5705f, v10 :: v_dual_sub_f32 v9, v9, v11
v_cvt_i32_f32_e32 v6, v11
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v9, v9, v10
v_exp_f32_e32 v9, v9
s_waitcnt_depctr 0xfff
v_ldexp_f32 v3, v9, v6
v_mul_f32_e32 v6, 0.5, v4
v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v5|
v_trunc_f32_e32 v5, v4
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_trunc_f32_e32 v9, v6
v_cndmask_b32_e32 v0, 0, v0, vcc_lo
v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v8
v_cmp_neq_f32_e64 s2, v9, v6
v_cndmask_b32_e32 v3, 0, v3, vcc_lo
v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v8
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_dual_add_f32 v0, v7, v0 :: v_dual_cndmask_b32 v3, 0x7f800000, v3
v_cmp_eq_f32_e32 vcc_lo, v5, v4
v_fma_f32 v0, v3, v0, v3
v_cmp_eq_f32_e64 s3, 0x7f800000, v3
s_and_b32 s2, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e64 v4, 1.0, v2, s2
v_cndmask_b32_e64 v0, v0, v3, s3
v_cmp_eq_f32_e64 s3, 0, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_bfi_b32 v0, 0x7fffffff, v0, v4
v_cndmask_b32_e64 v3, 0x7f800000, 0, s3
v_cndmask_b32_e64 v4, 0, v2, s2
v_cmp_class_f32_e64 s2, v2, 0x204
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_cndmask_b32_e32 v5, 0x7fc00000, v0, vcc_lo
v_cmp_gt_f32_e32 vcc_lo, 0, v2
v_bfi_b32 v3, 0x7fffffff, v3, v4
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v0, v0, v5, vcc_lo
s_or_b32 vcc_lo, s3, s2
v_cmp_lt_u16_e64 s2, s7, 2
s_mov_b32 s3, 1
v_cndmask_b32_e32 v3, v0, v3, vcc_lo
v_cmp_o_f32_e32 vcc_lo, v2, v2
v_lshl_add_u32 v0, v1, 2, 0
s_delay_alu instid0(VALU_DEP_3)
v_cndmask_b32_e32 v2, 0x7fc00000, v3, vcc_lo
s_and_b32 vcc_lo, exec_lo, s2
ds_store_b32 v0, v2
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_vccnz .LBB1_4
.LBB1_1:
s_lshl_b32 s8, s3, 1
v_add_nc_u32_e32 v2, s3, v1
s_add_i32 s2, s8, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_and_b32_e32 v3, s2, v1
v_cmp_gt_u32_e32 vcc_lo, s6, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_eq_u32_e64 s2, 0, v3
s_and_b32 s9, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s2, s9
s_cbranch_execz .LBB1_3
v_lshl_add_u32 v2, s3, 2, v0
ds_load_b32 v2, v2
ds_load_b32 v3, v0
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v2, v2, v3
ds_store_b32 v0, v2
.LBB1_3:
s_or_b32 exec_lo, exec_lo, s2
s_cmp_ge_u32 s8, s7
s_mov_b32 s3, s8
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB1_1
.LBB1_4:
s_mov_b32 s2, exec_lo
v_cmpx_eq_u32_e32 0, v1
s_cbranch_execz .LBB1_6
v_mov_b32_e32 v0, 0
v_cvt_f32_i32_e32 v2, s6
ds_load_b32 v1, v0
s_waitcnt lgkmcnt(0)
v_div_scale_f32 v3, null, v2, v2, v1
v_div_scale_f32 v6, vcc_lo, v1, v2, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f32_e32 v4, v3
s_waitcnt_depctr 0xfff
v_fma_f32 v5, -v3, v4, 1.0
v_fmac_f32_e32 v4, v5, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v5, v6, v4
v_fma_f32 v7, -v3, v5, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v5, v7, v4
v_fma_f32 v3, -v3, v5, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fmas_f32 v3, v3, v4, v5
v_div_fixup_f32 v1, v3, v2, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_f32_e32 v2, 0x4f800000, v1
v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v1
v_cndmask_b32_e32 v1, v1, v2, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_sqrt_f32_e32 v2, v1
s_waitcnt_depctr 0xfff
v_add_nc_u32_e32 v3, -1, v2
v_add_nc_u32_e32 v4, 1, v2
v_fma_f32 v5, -v3, v2, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v6, -v4, v2, v1
v_cmp_ge_f32_e64 s2, 0, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_cndmask_b32_e64 v2, v2, v3, s2
s_load_b64 s[2:3], s[0:1], 0x10
v_cmp_lt_f32_e64 s0, 0, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v2, v2, v4, s0
v_mul_f32_e32 v3, 0x37800000, v2
s_delay_alu instid0(VALU_DEP_1)
v_cndmask_b32_e32 v2, v2, v3, vcc_lo
v_cmp_class_f32_e64 vcc_lo, v1, 0x260
s_waitcnt lgkmcnt(0)
s_add_u32 s0, s2, s4
s_addc_u32 s1, s3, s5
v_cndmask_b32_e32 v1, v2, v1, vcc_lo
global_store_b32 v0, v1, s[0:1]
.LBB1_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| matrixSD | 6,556 | 6,783 | stackv2-00000-of-00015 |
// Demangled: void range_transform<double>(unsigned long, double*, double, double)
Function : _Z15range_transformIdEvmPT_S0_S0_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R4, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R5, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R4, R5, UR4, R4 &req={1} ?WAIT5_END_GROUP;
SHF.R.S32.HI R5, RZ, 0x1f, R4 ?WAIT5_END_GROUP;
ISETP.GE.U64.AND P0, PT, R4, UR6, PT &req={2} ?WAIT14_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU.64 UR6, c[0x0][0x388] &wr=0x0 ?trans1;
LDC.64 R8, c[0x0][0x390] &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans7;
LDC.64 R6, c[0x0][0x398] &wr=0x1 ?trans1;
LEA R2, P0, R4, UR6, 0x3 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R3, R4, UR7, R5, 0x3, P0 ?WAIT5_END_GROUP;
LDG.E.64 R4, desc[UR4][R2.64] &req={2} &wr=0x2 ?trans1;
DADD R6, R6, -R8 &req={1} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R4, R6, R8 &req={2} &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R2.64], R4 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x180;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: void range_transform<double>(unsigned long, double*, double, double)
_Z15range_transformIdEvmPT_S0_S0_:
s_clause 0x1
s_load_b32 s8, s[0:1], 0x2c
s_load_b256 s[0:7], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s8, s8, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmp_gt_u64_e32 vcc_lo, s[0:1], v[1:2]
s_and_saveexec_b32 s0, vcc_lo
s_cbranch_execz .LBB1_2
v_lshlrev_b64 v[0:1], 3, v[1:2]
v_add_f64 v[4:5], s[6:7], -s[4:5]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_load_b64 v[2:3], v[0:1], off
s_waitcnt vmcnt(0)
v_fma_f64 v[2:3], v[4:5], v[2:3], s[4:5]
global_store_b64 v[0:1], v[2:3], off
.LBB1_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| void_range_transform_double_ | 640 | 470 | stackv2-00000-of-00015 |
// Demangled: void range_transform<float>(unsigned long, float*, float, float)
Function : _Z15range_transformIfEvmPT_S0_S0_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R4, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R5, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R4, R5, UR4, R4 &req={1} ?WAIT5_END_GROUP;
SHF.R.S32.HI R5, RZ, 0x1f, R4 ?WAIT5_END_GROUP;
ISETP.GE.U64.AND P0, PT, R4, UR6, PT &req={2} ?WAIT14_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU.64 UR6, c[0x0][0x388] &wr=0x0 ?trans1;
LDC.64 R6, c[0x0][0x390] &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans1;
LEA R2, P0, R4, UR6, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R3, R4, UR7, R5, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R5, desc[UR4][R2.64] &req={2} &wr=0x2 ?trans1;
FADD R0, R7, -R6 &req={1} ?WAIT4_END_GROUP;
FFMA R5, R5, R0, R6 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R5 ?trans1;
EXIT ?trans5;
BRA 0x130;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: void range_transform<float>(unsigned long, float*, float, float)
_Z15range_transformIfEvmPT_S0_S0_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_u64_e64 s[4:5], v[1:2]
s_cbranch_execz .LBB0_2
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
global_load_b32 v2, v[0:1], off
s_waitcnt lgkmcnt(0)
v_sub_f32_e64 v3, s1, s0
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_fma_f32 v2, v3, v2, s0
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| void_range_transform_float_ | 551 | 489 | stackv2-00000-of-00015 |
// Demangled: void range_transform_int<int>(unsigned long, unsigned int*, int*, int, int)
Function : _Z19range_transform_intIiEvmPjPT_S1_S1_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R3, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R2, R3, UR4, R2 &req={1} ?WAIT5_END_GROUP;
SHF.R.S32.HI R3, RZ, 0x1f, R2 ?WAIT5_END_GROUP;
ISETP.GE.U64.AND P0, PT, R2, UR6, PT &req={2} ?WAIT14_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU.64 UR4, c[0x0][0x388] &wr=0x0 ?trans1;
SHF.L.U64.HI R3, R2.reuse, 0x2, R3 ?trans1;
IMAD.SHL.U32 R2, R2, 0x4, RZ ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x398] &wr=0x2 ?trans1;
HFMA2 R6, -RZ, RZ, 0, 0 ?trans1;
LDCU.64 UR10, c[0x0][0x390] &wr=0x3 ?trans1;
IADD.64 R4, R2, UR4 &req={0} ?WAIT7_END_GROUP;
LDG.E R4, desc[UR6][R4.64] &req={1} &wr=0x4 ?trans1;
UIADD3 UR4, UPT, UPT, UR9, -UR8, URZ &req={2} ?WAIT4_END_GROUP;
UI2F.U32.RP UR5, UR4 ?trans1;
IADD.64 R2, R2, UR10 &req={3} ?WAIT3_END_GROUP;
IADD3 R9, PT, PT, RZ, -UR4, RZ ?trans1;
ISETP.NE.U32.AND P1, PT, RZ, UR4, PT ?WAIT4_END_GROUP;
MUFU.RCP R0, UR5 &wr=0x0 ?trans2;
IADD3 R0, PT, PT, R0, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R7, R0 &wr=0x0 ?trans2;
IMAD R9, R9, R7, RZ &req={0} ?WAIT4_END_GROUP;
IMAD.HI.U32 R7, R7, R9, R6 ?WAIT6_END_GROUP;
IMAD.HI.U32 R7, R7, R4, RZ &req={4} ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, -R7, RZ, RZ ?WAIT5_END_GROUP;
IMAD R4, R7, UR4, R4 ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R4, UR4, PT ?WAIT13_END_GROUP;
@P0 IADD3 R4, PT, PT, R4, -UR4, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R4, UR4, PT ?WAIT13_END_GROUP;
@P0 IADD3 R4, PT, PT, R4, -UR4, RZ ?trans2;
@!P1 LOP3.LUT R4, RZ, UR4, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R5, PT, PT, R4, UR8, RZ ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R5 ?trans1;
EXIT ?trans5;
BRA 0x270;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: void range_transform_int<int>(unsigned long, unsigned int*, int*, int, int)
_Z19range_transform_intIiEvmPjPT_S1_S1_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b128 s[4:7], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_u64_e64 s[4:5], v[1:2]
s_cbranch_execz .LBB2_2
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_load_b128 s[0:3], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt lgkmcnt(0)
s_sub_i32 s3, s3, s2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cvt_f32_u32_e32 v3, s3
s_sub_i32 s4, 0, s3
v_rcp_iflag_f32_e32 v3, v3
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v3, 0x4f7ffffe, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_u32_f32_e32 v3, v3
v_mul_lo_u32 v4, s4, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v4, v3, v4
v_add_nc_u32_e32 v3, v3, v4
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v3, v2, v3
v_mul_lo_u32 v3, v3, s3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v2, v2, v3
v_subrev_nc_u32_e32 v3, s3, v2
v_cmp_le_u32_e32 vcc_lo, s3, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v2, v2, v3, vcc_lo
v_subrev_nc_u32_e32 v3, s3, v2
v_cmp_le_u32_e32 vcc_lo, s3, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_cndmask_b32_e32 v2, v2, v3, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
v_add_nc_u32_e32 v2, s2, v2
global_store_b32 v[0:1], v2, off
.LBB2_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| void_range_transform_int_int_ | 1,064 | 1,073 | stackv2-00000-of-00015 |
// Demangled: fast_odd_even_sort_kernel(int*, int)
Function : _Z25fast_odd_even_sort_kernelPii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R4, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x388] &wr=0x2 ?trans7;
LDC R11, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R11, UR4, R4 &req={1} ?WAIT5_END_GROUP;
IADD3 R5, PT, PT, R0, R0, RZ ?WAIT4_END_GROUP;
LOP3.LUT R16, R5, 0x1, RZ, 0xfc, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R16, UR6, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R9, desc[UR8][R2.64+0x4] &req={1} &wr=0x2 ?trans4;
LDG.E R8, desc[UR8][R2.64] &wr=0x2 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR4, 0x400 ?trans1;
ISETP.GE.U32.AND P0, PT, R11.reuse, 0x2, PT ?trans1;
IADD3 R0, PT, PT, R11, R11, RZ ?trans1;
HFMA2 R7, -RZ, RZ, 0, 0 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={0} ?WAIT6_END_GROUP;
LEA R6, R4.reuse, UR4, 0x3 ?trans1;
UIADD3 UR4, UPT, UPT, UR6, -0x1, URZ ?trans1;
IADD3 R4, PT, PT, R4, R4, RZ ?WAIT4_END_GROUP;
LOP3.LUT R5, R4, 0x1, RZ, 0xfc, !PT ?trans2;
IADD3 R4, PT, PT, R0, -0x1, RZ ?trans1;
STS.64 [R6], R8 &req={2} &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P0 BRA 0x4c0 ?trans5;
ISETP.GE.U32.AND P0, PT, R5.reuse, R4, PT ?trans1;
LOP3.LUT R8, R0, 0xfffffffc, RZ, 0xc0, !PT &req={0} ?trans1;
ISETP.GE.U32.AND P1, PT, R5, R0, PT ?trans1;
MOV R7, RZ ?trans2;
ISETP.LT.AND P0, PT, R16, UR4, !P0 ?trans1;
IADD3 R8, PT, PT, -R8, RZ, RZ ?WAIT12_END_GROUP;
BSSY.RECONVERGENT B0, 0x2b0 ?trans4;
@P1 BRA 0x2a0 &req={3,2,1,0} ?trans5;
LDS.64 R12, [R6] &wr=0x0 ?trans2;
ISETP.GE.AND P1, PT, R13, R12.reuse, PT &req={0} ?trans1;
MOV R14, R13 ?trans1;
MOV R15, R12 ?WAIT11_END_GROUP;
@!P1 STS.64 [R6], R14 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.U32.AND P1, PT, R5, R0, PT ?WAIT5_END_GROUP;
BSSY.RECONVERGENT B0, 0x350 ?trans4;
@!P0 BRA 0x340 ?trans5;
LDS R9, [R6+0x8] ?trans4;
LDS R10, [R6+0x4] &wr=0x1 ?trans2;
ISETP.GE.AND P2, PT, R9, R10, PT &req={1} ?WAIT13_END_GROUP;
@!P2 STS [R6+0x4], R9 &rd=0x1 ?trans4;
@!P2 STS [R6+0x8], R10 &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x3e0 ?trans4;
@P1 BRA 0x3d0 ?trans5;
LDS.64 R12, [R6] &wr=0x2 ?trans2;
ISETP.GE.AND P2, PT, R13, R12.reuse, PT &req={2} ?trans1;
MOV R14, R13 &req={0} ?trans1;
MOV R15, R12 ?WAIT11_END_GROUP;
@!P2 STS.64 [R6], R14 &rd=0x2 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R8, PT, PT, R8, 0x4, RZ ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans4;
ISETP.NE.AND P3, PT, R8, RZ, PT ?trans2;
BSSY.RECONVERGENT B0, 0x490 ?trans4;
@!P0 BRA 0x480 ?trans7;
LDS R9, [R6+0x8] &req={1} ?trans4;
LDS R10, [R6+0x4] &wr=0x1 ?trans2;
ISETP.GE.AND P2, PT, R9, R10, PT &req={1} ?WAIT13_END_GROUP;
@!P2 STS [R6+0x4], R9 &rd=0x3 ?trans4;
@!P2 STS [R6+0x8], R10 &rd=0x3 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
IADD3 R7, PT, PT, R7, 0x4, RZ ?WAIT5_END_GROUP;
@P3 BRA 0x230 ?trans5;
LOP3.LUT P0, RZ, R0, 0x2, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x6b0 ?trans5;
IMAD.SHL.U32 R8, R11, 0x2, RZ &req={0} ?WAIT5_END_GROUP;
LOP3.LUT R8, R8, 0x2, RZ, 0xe2, !PT ?WAIT4_END_GROUP;
IADD3 R8, PT, PT, -R8, RZ, RZ ?WAIT7_END_GROUP;
LOP3.LUT P0, R9, R7, 0x1, RZ, 0xc0, !PT &req={3,1,0} ?trans1;
BSSY.RECONVERGENT B0, 0x600 ?trans1;
IADD3 R8, PT, PT, R8, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.OR P0, PT, R16, UR4, !P0 ?trans1;
ISETP.NE.AND P1, PT, R9, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R8, RZ, PT ?WAIT3_END_GROUP;
ISETP.GE.U32.OR P0, PT, R5.reuse, R4, P0 ?trans1;
ISETP.GE.U32.OR P1, PT, R5, R0, P1 ?WAIT12_END_GROUP;
@P0 BRA 0x5f0 ?trans5;
LDS R9, [R6+0x8] ?trans4;
LDS R10, [R6+0x4] &wr=0x0 ?trans2;
ISETP.GE.AND P0, PT, R9, R10, PT &req={0} ?WAIT13_END_GROUP;
@!P0 STS [R6+0x4], R9 &rd=0x0 ?trans4;
@!P0 STS [R6+0x8], R10 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BSSY.RECONVERGENT B0, 0x680 ?trans4;
@P1 BRA 0x670 ?trans5;
LDS.64 R10, [R6] &req={0} &wr=0x0 ?trans2;
ISETP.GE.AND P0, PT, R11, R10.reuse, PT &req={0} ?trans1;
MOV R12, R11 ?trans1;
MOV R13, R10 ?WAIT11_END_GROUP;
@!P0 STS.64 [R6], R12 &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
IADD3 R7, PT, PT, R7, 0x1, RZ ?WAIT5_END_GROUP;
@P2 BRA 0x510 ?trans5;
LDS.64 R6, [R6] &req={3,2,1,0} &wr=0x0 ?trans4;
STG.E desc[UR8][R2.64+0x4], R7 &req={0} ?trans4;
STG.E desc[UR8][R2.64], R6 ?trans1;
EXIT ?trans5;
BRA 0x6f0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: fast_odd_even_sort_kernel(int*, int)
_Z25fast_odd_even_sort_kernelPii:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x1c
s_load_b32 s2, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s3, 0xffff
s_mov_b32 s3, exec_lo
s_mul_i32 s15, s15, s4
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_lshl_u32 v1, s15, v0, 1
v_or_b32_e32 v3, 1, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s2, v3
s_cbranch_execz .LBB1_11
s_load_b64 s[0:1], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b32_e32 v5, 3, v0
s_mov_b32 s3, 0
s_cmp_eq_u32 s4, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v1, vcc_lo, s0, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
global_load_b64 v[6:7], v[1:2], off
s_waitcnt vmcnt(0)
ds_store_b64 v5, v[6:7]
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB1_10
v_lshlrev_b32_e32 v0, 1, v0
s_lshl_b32 s4, s4, 1
s_add_i32 s2, s2, -1
s_add_i32 s0, s4, -1
v_cmp_gt_i32_e32 vcc_lo, s2, v3
v_or_b32_e32 v0, 1, v0
s_delay_alu instid0(VALU_DEP_1)
v_cmp_gt_i32_e64 s0, s0, v0
v_cmp_gt_u32_e64 s1, s4, v0
.LBB1_3:
s_and_b32 s2, s3, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
s_cmp_eq_u32 s2, 0
s_cselect_b32 s5, -1, 0
s_cmp_eq_u32 s2, 1
s_cselect_b32 s2, -1, 0
s_and_b32 s2, s2, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, s2, s0
s_and_saveexec_b32 s6, s2
s_cbranch_execz .LBB1_6
ds_load_2addr_b32 v[3:4], v5 offset0:1 offset1:2
s_waitcnt lgkmcnt(0)
v_cmp_lt_i32_e64 s2, v4, v3
s_delay_alu instid0(VALU_DEP_1)
s_and_b32 exec_lo, exec_lo, s2
s_cbranch_execz .LBB1_6
v_mov_b32_e32 v0, v4
ds_store_2addr_b32 v5, v4, v3 offset0:1 offset1:2
.LBB1_6:
s_or_b32 exec_lo, exec_lo, s6
s_and_b32 s2, s5, s1
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s5, s2
s_cbranch_execz .LBB1_9
ds_load_b64 v[3:4], v5
s_waitcnt lgkmcnt(0)
v_cmp_lt_i32_e64 s2, v4, v3
s_delay_alu instid0(VALU_DEP_1)
s_and_b32 exec_lo, exec_lo, s2
s_cbranch_execz .LBB1_9
v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v7, v3
ds_store_b64 v5, v[6:7]
.LBB1_9:
s_or_b32 exec_lo, exec_lo, s5
s_add_i32 s3, s3, 1
s_waitcnt lgkmcnt(0)
s_cmp_eq_u32 s4, s3
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB1_3
.LBB1_10:
ds_load_b64 v[3:4], v5
s_waitcnt lgkmcnt(0)
global_store_b64 v[1:2], v[3:4], off
.LBB1_11:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| fast_odd_even_sort_kernel | 2,590 | 1,343 | stackv2-00000-of-00015 |
// Demangled: odd_even_sort_kernel(int*, int)
Function : _Z20odd_even_sort_kernelPii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_TID.X &wr=0x1 ?trans7;
LDC R8, c[0x0][0x360] &wr=0x2 ?trans1;
LDCU UR5, c[0x0][0x388] &wr=0x3 ?trans1;
HFMA2 R10, -RZ, RZ, 0, 0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x4 ?trans5;
S2UR UR4, SR_CTAID.X &wr=0x5 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
ISETP.GE.U32.AND P0, PT, R8.reuse, 0x2, PT &req={2} ?trans1;
IADD3 R7, PT, PT, R8, R8, RZ ?WAIT4_END_GROUP;
IADD3 R9, PT, PT, R7, -0x1, RZ ?trans2;
IADD3 R4, PT, PT, R5, R5, RZ &req={1} ?trans1;
IMAD R0, R8, UR4, R5 &req={5} ?trans1;
UIADD3 UR4, UPT, UPT, UR5, -0x1, URZ &req={3} ?trans2;
LOP3.LUT R4, R4, 0x1, RZ, 0xfc, !PT ?trans2;
IADD3 R5, PT, PT, R0, R0, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R2, R5.reuse, 0x4, R2 &req={0} ?trans1;
LOP3.LUT R5, R5, 0x1, RZ, 0xfc, !PT ?trans1;
@!P0 BRA 0x420 &req={4} ?trans6;
ISETP.GE.U32.AND P0, PT, R4.reuse, R7, PT ?trans1;
ISETP.GE.U32.AND P1, PT, R4, R9, PT ?trans1;
LOP3.LUT R0, R7, 0xfffffffc, RZ, 0xc0, !PT ?trans1;
MOV R10, RZ ?trans2;
ISETP.LT.AND P0, PT, R5.reuse, UR5, !P0 ?trans1;
ISETP.LT.AND P1, PT, R5, UR4, !P1 ?trans1;
IADD3 R0, PT, PT, -R0, RZ, RZ ?WAIT12_END_GROUP;
BSSY.RECONVERGENT B0, 0x220 ?trans4;
@!P0 BRA 0x210 &req={3,2,1,0} ?trans5;
LDG.E R11, desc[UR6][R2.64+0x4] &wr=0x2 ?trans4;
LDG.E R6, desc[UR6][R2.64] &wr=0x2 ?trans2;
ISETP.GE.AND P2, PT, R11, R6, PT &req={2} ?WAIT13_END_GROUP;
@!P2 STG.E desc[UR6][R2.64+0x4], R6 &rd=0x0 ?trans4;
@!P2 STG.E desc[UR6][R2.64], R11 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x2b0 ?trans4;
@!P1 BRA 0x2a0 ?trans5;
LDG.E R11, desc[UR6][R2.64+0x8] &req={0} &wr=0x2 ?trans4;
LDG.E R6, desc[UR6][R2.64+0x4] &wr=0x2 ?trans2;
ISETP.GE.AND P2, PT, R11, R6, PT &req={2} ?WAIT13_END_GROUP;
@!P2 STG.E desc[UR6][R2.64+0x4], R11 &rd=0x1 ?trans4;
@!P2 STG.E desc[UR6][R2.64+0x8], R6 &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x340 ?trans4;
@!P0 BRA 0x330 ?trans5;
LDG.E R11, desc[UR6][R2.64+0x4] &req={1,0} &wr=0x2 ?trans4;
LDG.E R6, desc[UR6][R2.64] &wr=0x2 ?trans2;
ISETP.GE.AND P2, PT, R11, R6, PT &req={2} ?WAIT13_END_GROUP;
@!P2 STG.E desc[UR6][R2.64+0x4], R6 &rd=0x2 ?trans4;
@!P2 STG.E desc[UR6][R2.64], R11 &rd=0x2 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R0, PT, PT, R0, 0x4, RZ ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans4;
ISETP.NE.AND P3, PT, R0, RZ, PT ?trans2;
BSSY.RECONVERGENT B0, 0x3f0 ?trans4;
@!P1 BRA 0x3e0 ?trans7;
LDG.E R11, desc[UR6][R2.64+0x8] &req={2,1,0} &wr=0x2 ?trans4;
LDG.E R6, desc[UR6][R2.64+0x4] &wr=0x2 ?trans2;
ISETP.GE.AND P2, PT, R11, R6, PT &req={2} ?WAIT13_END_GROUP;
@!P2 STG.E desc[UR6][R2.64+0x4], R11 &rd=0x3 ?trans4;
@!P2 STG.E desc[UR6][R2.64+0x8], R6 &rd=0x3 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
IADD3 R10, PT, PT, R10, 0x4, RZ ?WAIT5_END_GROUP;
@P3 BRA 0x1a0 ?trans5;
LOP3.LUT P0, RZ, R7, 0x2, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
IMAD.SHL.U32 R0, R8, 0x2, RZ ?trans1;
LDCU UR5, c[0x0][0x388] &wr=0x4 ?trans4;
LOP3.LUT R0, R0, 0x2, RZ, 0xe2, !PT ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, -R0, RZ, RZ ?WAIT7_END_GROUP;
LOP3.LUT P0, R6, R10, 0x1, RZ, 0xc0, !PT &req={3,2,1,0} ?trans1;
BSSY.RECONVERGENT B0, 0x580 ?trans1;
ISETP.GE.AND P1, PT, R5.reuse, UR5, PT &req={4} ?trans1;
IADD3 R0, PT, PT, R0, 0x1, RZ ?trans2;
ISETP.GE.OR P0, PT, R5, UR4, !P0 ?trans2;
ISETP.NE.OR P1, PT, R6, RZ, P1 ?trans1;
ISETP.NE.AND P2, PT, R0, RZ, PT ?trans2;
ISETP.GE.U32.OR P0, PT, R4, R9, P0 ?WAIT2_END_GROUP;
ISETP.GE.U32.OR P1, PT, R4, R7, P1 ?WAIT11_END_GROUP;
@P0 BRA 0x570 ?trans5;
LDG.E R11, desc[UR6][R2.64+0x8] &wr=0x2 ?trans4;
LDG.E R6, desc[UR6][R2.64+0x4] &wr=0x2 ?trans2;
ISETP.GE.AND P0, PT, R11, R6, PT &req={2} ?WAIT13_END_GROUP;
@!P0 STG.E desc[UR6][R2.64+0x4], R11 &rd=0x0 ?trans4;
@!P0 STG.E desc[UR6][R2.64+0x8], R6 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BSSY.RECONVERGENT B0, 0x600 ?trans4;
@P1 BRA 0x5f0 ?trans5;
LDG.E R11, desc[UR6][R2.64+0x4] &req={0} &wr=0x2 ?trans4;
LDG.E R6, desc[UR6][R2.64] &wr=0x2 ?trans2;
ISETP.GE.AND P0, PT, R11, R6, PT &req={2} ?WAIT13_END_GROUP;
@!P0 STG.E desc[UR6][R2.64+0x4], R6 &rd=0x1 ?trans4;
@!P0 STG.E desc[UR6][R2.64], R11 &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
IADD3 R10, PT, PT, R10, 0x1, RZ ?WAIT5_END_GROUP;
@P2 BRA 0x480 ?trans5;
EXIT ?trans5;
BRA 0x640;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: odd_even_sort_kernel(int*, int)
_Z20odd_even_sort_kernelPii:
s_load_b32 s2, s[0:1], 0x1c
s_mov_b32 s4, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s2, 0
s_cbranch_scc1 .LBB0_9
s_clause 0x1
s_load_b32 s3, s[0:1], 0x8
s_load_b64 s[0:1], s[0:1], 0x0
s_mul_i32 s15, s15, s2
v_lshl_or_b32 v4, v0, 1, 1
v_add_lshl_u32 v1, s15, v0, 1
s_lshl_b32 s5, s2, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_add_i32 s2, s5, -1
v_ashrrev_i32_e32 v2, 31, v1
v_or_b32_e32 v5, 1, v1
v_cmp_gt_u32_e32 vcc_lo, s2, v4
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
s_waitcnt lgkmcnt(0)
s_add_i32 s2, s3, -1
v_add_co_u32 v0, s0, s0, v2
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v1, s0, s1, v3, s0
v_cmp_gt_i32_e64 s0, s3, v5
v_cmp_gt_i32_e64 s1, s2, v5
v_cmp_gt_u32_e64 s2, s5, v4
.LBB0_2:
s_and_b32 s3, s4, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
s_cmp_eq_u32 s3, 0
s_cselect_b32 s6, -1, 0
s_cmp_eq_u32 s3, 1
s_cselect_b32 s3, -1, 0
s_and_b32 s3, s3, s1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s3, s3, vcc_lo
s_and_saveexec_b32 s7, s3
s_cbranch_execz .LBB0_5
global_load_b64 v[2:3], v[0:1], off offset:4
s_waitcnt vmcnt(0)
v_cmp_lt_i32_e64 s3, v3, v2
s_delay_alu instid0(VALU_DEP_1)
s_and_b32 exec_lo, exec_lo, s3
s_cbranch_execz .LBB0_5
v_mov_b32_e32 v4, v2
global_store_b64 v[0:1], v[3:4], off offset:4
.LBB0_5:
s_or_b32 exec_lo, exec_lo, s7
s_and_b32 s3, s6, s0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s3, s3, s2
s_and_saveexec_b32 s6, s3
s_cbranch_execz .LBB0_8
global_load_b64 v[2:3], v[0:1], off
s_waitcnt vmcnt(0)
v_cmp_lt_i32_e64 s3, v3, v2
s_delay_alu instid0(VALU_DEP_1)
s_and_b32 exec_lo, exec_lo, s3
s_cbranch_execz .LBB0_8
v_mov_b32_e32 v4, v2
global_store_b64 v[0:1], v[3:4], off
.LBB0_8:
s_or_b32 exec_lo, exec_lo, s6
s_add_i32 s4, s4, 1
s_waitcnt_vscnt null, 0x0
s_cmp_eq_u32 s5, s4
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB0_2
.LBB0_9:
s_endpgm
| odd_even_sort_kernel | 2,602 | 1,159 | stackv2-00000-of-00015 |
// Demangled: vectoradd(int*, int*, int*, int)
Function : _Z9vectoraddPiS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R8, c[0x0][0x398] &wr=0x1 ?trans2;
ISETP.GE.AND P0, PT, R8, 0x1, PT &req={1} ?WAIT13_END_GROUP;
@!P0 EXIT &req={0} ?trans5;
ISETP.GE.U32.AND P1, PT, R8.reuse, 0x10, PT ?trans1;
LOP3.LUT R12, R8, 0xf, RZ, 0xc0, !PT ?trans1;
LDCU.64 UR10, c[0x0][0x358] &wr=0x0 ?trans1;
HFMA2 R0, -RZ, RZ, 0, 0 ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R12, RZ, PT ?WAIT7_END_GROUP;
@!P1 BRA 0x5c0 ?trans6;
LDCU.128 UR4, c[0x0][0x380] &wr=0x1 ?trans1;
LOP3.LUT R9, R8, 0x7ffffff0, RZ, 0xc0, !PT ?trans1;
MOV R0, RZ ?trans1;
LDCU.64 UR8, c[0x0][0x390] &wr=0x2 ?trans2;
IADD3 R9, PT, PT, -R9, RZ, RZ ?trans1;
UIADD3.64 UR4, UPT, UPT, UR4, 0x20, URZ &req={1} ?trans1;
UIADD3.64 UR6, UPT, UPT, UR6, 0x20, URZ ?trans1;
UIADD3.64 UR8, UPT, UPT, UR8, 0x20, URZ &req={2} ?WAIT4_END_GROUP;
MOV.64 R2, UR4 ?trans2;
MOV.64 R4, UR6 ?trans2;
MOV.64 R6, UR8 ?WAIT8_END_GROUP;
LDG.E R10, desc[UR10][R2.64+-0x20] &req={0} &wr=0x2 ?trans4;
LDG.E R11, desc[UR10][R4.64+-0x20] &wr=0x2 ?trans2;
IADD3 R11, PT, PT, R10, R11, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR10][R6.64+-0x20], R11 &rd=0x0 ?trans4;
LDG.E R10, desc[UR10][R2.64+-0x1c] &wr=0x2 ?trans4;
LDG.E R13, desc[UR10][R4.64+-0x1c] &wr=0x2 ?trans2;
IADD3 R13, PT, PT, R10, R13, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR10][R6.64+-0x1c], R13 &rd=0x1 ?trans4;
LDG.E R10, desc[UR10][R2.64+-0x18] &wr=0x2 ?trans4;
LDG.E R15, desc[UR10][R4.64+-0x18] &wr=0x2 ?trans2;
IADD3 R15, PT, PT, R10, R15, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR10][R6.64+-0x18], R15 &rd=0x2 ?trans4;
LDG.E R10, desc[UR10][R2.64+-0x14] &wr=0x3 ?trans4;
LDG.E R17, desc[UR10][R4.64+-0x14] &wr=0x3 ?trans2;
IADD3 R17, PT, PT, R10, R17, RZ &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR10][R6.64+-0x14], R17 &rd=0x3 ?trans4;
LDG.E R10, desc[UR10][R2.64+-0x10] &wr=0x4 ?trans4;
LDG.E R11, desc[UR10][R4.64+-0x10] &req={0} &wr=0x4 ?trans2;
IADD3 R11, PT, PT, R10, R11, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR10][R6.64+-0x10], R11 &rd=0x0 ?trans4;
LDG.E R10, desc[UR10][R2.64+-0xc] &wr=0x4 ?trans4;
LDG.E R13, desc[UR10][R4.64+-0xc] &req={1} &wr=0x4 ?trans2;
IADD3 R13, PT, PT, R10, R13, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR10][R6.64+-0xc], R13 &rd=0x1 ?trans4;
LDG.E R10, desc[UR10][R2.64+-0x8] &wr=0x4 ?trans4;
LDG.E R15, desc[UR10][R4.64+-0x8] &req={2} &wr=0x4 ?trans2;
IADD3 R15, PT, PT, R10, R15, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR10][R6.64+-0x8], R15 &rd=0x2 ?trans4;
LDG.E R10, desc[UR10][R2.64+-0x4] &wr=0x4 ?trans4;
LDG.E R17, desc[UR10][R4.64+-0x4] &req={3} &wr=0x4 ?trans2;
IADD3 R17, PT, PT, R10, R17, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR10][R6.64+-0x4], R17 &rd=0x3 ?trans4;
LDG.E R10, desc[UR10][R2.64] &wr=0x4 ?trans4;
LDG.E R11, desc[UR10][R4.64] &req={0} &wr=0x4 ?trans2;
IADD3 R11, PT, PT, R10, R11, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR10][R6.64], R11 &rd=0x0 ?trans4;
LDG.E R10, desc[UR10][R2.64+0x4] &wr=0x4 ?trans4;
LDG.E R13, desc[UR10][R4.64+0x4] &req={1} &wr=0x4 ?trans2;
IADD3 R13, PT, PT, R10, R13, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR10][R6.64+0x4], R13 &rd=0x1 ?trans4;
LDG.E R10, desc[UR10][R2.64+0x8] &wr=0x4 ?trans4;
LDG.E R15, desc[UR10][R4.64+0x8] &req={2} &wr=0x4 ?trans2;
IADD3 R15, PT, PT, R10, R15, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR10][R6.64+0x8], R15 &rd=0x2 ?trans4;
LDG.E R10, desc[UR10][R2.64+0xc] &wr=0x4 ?trans4;
LDG.E R17, desc[UR10][R4.64+0xc] &req={3} &wr=0x4 ?trans2;
IADD3 R17, PT, PT, R10, R17, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR10][R6.64+0xc], R17 &rd=0x3 ?trans4;
LDG.E R10, desc[UR10][R2.64+0x10] &wr=0x4 ?trans4;
LDG.E R11, desc[UR10][R4.64+0x10] &req={0} &wr=0x4 ?trans2;
IADD3 R11, PT, PT, R10, R11, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR10][R6.64+0x10], R11 ?trans4;
LDG.E R10, desc[UR10][R2.64+0x14] &wr=0x4 ?trans4;
LDG.E R13, desc[UR10][R4.64+0x14] &req={1} &wr=0x4 ?trans2;
IADD3 R13, PT, PT, R10, R13, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR10][R6.64+0x14], R13 ?trans4;
LDG.E R10, desc[UR10][R2.64+0x18] &wr=0x4 ?trans4;
LDG.E R15, desc[UR10][R4.64+0x18] &req={2} &wr=0x4 ?trans1;
IADD3 R9, PT, PT, R9, 0x10, RZ ?trans2;
IADD3 R15, PT, PT, R10, R15, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR10][R6.64+0x18], R15 ?trans4;
LDG.E R10, desc[UR10][R2.64+0x1c] &rd=0x0 &wr=0x2 ?trans4;
LDG.E R17, desc[UR10][R4.64+0x1c] &req={3} &rd=0x1 &wr=0x2 ?trans1;
ISETP.NE.AND P1, PT, R9, RZ, PT ?trans1;
IADD3 R0, PT, PT, R0, 0x10, RZ ?trans1;
IADD.64 R2, R2, 0x40 &req={0} ?WAIT2_END_GROUP;
IADD.64 R4, R4, 0x40 &req={1} ?WAIT3_END_GROUP;
IADD3 R17, PT, PT, R10, R17, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR10][R6.64+0x1c], R17 &rd=0x0 ?trans2;
IADD.64 R6, R6, 0x40 &req={0} ?trans2;
@P1 BRA 0x150 ?trans6;
@!P0 EXIT &req={0} ?trans5;
ISETP.GE.U32.AND P0, PT, R12, 0x8, PT ?trans1;
LOP3.LUT R14, R8, 0x7, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R14, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x880 ?trans6;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x388] &wr=0x1 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R2, R0, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R9, desc[UR10][R2.64] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R4, R0, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
LDG.E R10, desc[UR10][R4.64] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R6, R0, 0x4, R6 &req={2} ?trans1;
IADD3 R9, PT, PT, R9, R10, RZ &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR10][R6.64], R9 &rd=0x0 ?trans4;
LDG.E R10, desc[UR10][R2.64+0x4] &wr=0x2 ?trans4;
LDG.E R11, desc[UR10][R4.64+0x4] &wr=0x2 ?trans2;
IADD3 R11, PT, PT, R10, R11, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR10][R6.64+0x4], R11 &rd=0x1 ?trans4;
LDG.E R10, desc[UR10][R2.64+0x8] &wr=0x2 ?trans4;
LDG.E R13, desc[UR10][R4.64+0x8] &wr=0x2 ?trans2;
IADD3 R13, PT, PT, R10, R13, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR10][R6.64+0x8], R13 &rd=0x2 ?trans4;
LDG.E R10, desc[UR10][R2.64+0xc] &wr=0x3 ?trans4;
LDG.E R15, desc[UR10][R4.64+0xc] &wr=0x3 ?trans2;
IADD3 R15, PT, PT, R10, R15, RZ &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR10][R6.64+0xc], R15 &rd=0x3 ?trans4;
LDG.E R9, desc[UR10][R2.64+0x10] &req={0} &wr=0x4 ?trans4;
LDG.E R10, desc[UR10][R4.64+0x10] &wr=0x4 ?trans2;
IADD3 R9, PT, PT, R9, R10, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR10][R6.64+0x10], R9 &rd=0x0 ?trans4;
LDG.E R10, desc[UR10][R2.64+0x14] &wr=0x4 ?trans4;
LDG.E R11, desc[UR10][R4.64+0x14] &req={1} &wr=0x4 ?trans2;
IADD3 R11, PT, PT, R10, R11, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR10][R6.64+0x14], R11 &rd=0x0 ?trans4;
LDG.E R10, desc[UR10][R2.64+0x18] &wr=0x4 ?trans4;
LDG.E R13, desc[UR10][R4.64+0x18] &req={2} &wr=0x4 ?trans2;
IADD3 R13, PT, PT, R10, R13, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR10][R6.64+0x18], R13 &rd=0x0 ?trans4;
LDG.E R10, desc[UR10][R2.64+0x1c] &wr=0x2 ?trans4;
LDG.E R15, desc[UR10][R4.64+0x1c] &req={3} &wr=0x2 ?trans1;
IADD3 R0, PT, PT, R0, 0x8, RZ ?trans2;
IADD3 R15, PT, PT, R10, R15, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR10][R6.64+0x1c], R15 &rd=0x0 ?trans2;
@!P1 EXIT ?trans5;
ISETP.GE.U32.AND P0, PT, R14, 0x4, PT ?trans1;
LOP3.LUT R8, R8, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R8, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0xa40 ?trans6;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans8;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans8;
LDC.64 R6, c[0x0][0x390] &req={0} &wr=0x0 ?trans1;
IMAD.WIDE.U32 R2, R0, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
LDG.E R9, desc[UR10][R2.64] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R4, R0, 0x4, R4 &req={2} ?WAIT5_END_GROUP;
LDG.E R10, desc[UR10][R4.64] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R6, R0, 0x4, R6 &req={0} ?trans1;
IADD3 R9, PT, PT, R9, R10, RZ &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR10][R6.64], R9 &rd=0x1 ?trans4;
LDG.E R10, desc[UR10][R2.64+0x4] &wr=0x2 ?trans4;
LDG.E R11, desc[UR10][R4.64+0x4] &wr=0x2 ?trans2;
IADD3 R11, PT, PT, R10, R11, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR10][R6.64+0x4], R11 &rd=0x1 ?trans4;
LDG.E R10, desc[UR10][R2.64+0x8] &wr=0x2 ?trans4;
LDG.E R13, desc[UR10][R4.64+0x8] &wr=0x2 ?trans2;
IADD3 R13, PT, PT, R10, R13, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR10][R6.64+0x8], R13 &rd=0x1 ?trans4;
LDG.E R10, desc[UR10][R2.64+0xc] &wr=0x2 ?trans4;
LDG.E R15, desc[UR10][R4.64+0xc] &wr=0x2 ?trans1;
IADD3 R0, PT, PT, R0, 0x4, RZ ?trans2;
IADD3 R15, PT, PT, R10, R15, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR10][R6.64+0xc], R15 &rd=0x1 ?trans2;
@!P1 EXIT ?trans5;
LDC.64 R2, c[0x0][0x390] &wr=0x2 ?trans1;
IADD3 R8, PT, PT, -R8, RZ, RZ ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans8;
LDC.64 R6, c[0x0][0x380] &req={1,0} &wr=0x0 ?trans1;
IMAD.WIDE.U32 R2, R0, 0x4, R2 &req={2} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R0, 0x4, R4 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R6, R0, 0x4, R6 &req={0} ?WAIT7_END_GROUP;
LDG.E R0, desc[UR10][R6.64] &rd=0x0 &wr=0x2 ?trans4;
LDG.E R9, desc[UR10][R4.64] &rd=0x1 &wr=0x2 ?trans1;
IADD3 R8, PT, PT, R8, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R8, RZ, PT ?trans1;
IADD.64 R6, R6, 0x4 &req={0} ?trans2;
IADD.64 R4, R4, 0x4 &req={1} ?WAIT3_END_GROUP;
IADD3 R9, PT, PT, R0, R9, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR10][R2.64], R9 &rd=0x0 ?trans2;
IADD.64 R2, R2, 0x4 &req={0} ?trans2;
@P0 BRA 0xac0 ?trans6;
EXIT ?trans5;
BRA 0xb70;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: vectoradd(int*, int*, int*, int)
_Z9vectoraddPiS_S_i:
s_load_b32 s2, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s2, 1
s_cbranch_scc1 .LBB0_3
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
v_mov_b32_e32 v0, 0
.LBB0_2:
s_waitcnt lgkmcnt(0)
s_clause 0x1
global_load_b32 v1, v0, s[4:5]
global_load_b32 v2, v0, s[6:7]
s_add_i32 s2, s2, -1
s_add_u32 s4, s4, 4
s_addc_u32 s5, s5, 0
s_add_u32 s6, s6, 4
s_addc_u32 s7, s7, 0
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v1, v2, v1
global_store_b32 v0, v1, s[0:1]
s_add_u32 s0, s0, 4
s_addc_u32 s1, s1, 0
s_cmp_lg_u32 s2, 0
s_cbranch_scc1 .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| vectoradd | 5,573 | 390 | stackv2-00000-of-00015 |
// Demangled: matrix_mult(int*, int*, int*, int)
Function : _Z11matrix_multPiS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R0, c[0x0][0x398] &wr=0x1 ?trans1;
S2R R23, SR_TID.X &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans1;
HFMA2 R28, -RZ, RZ, 0, 0 ?WAIT5_END_GROUP;
S2UR UR8, SR_CTAID.X &wr=0x4 ?trans1;
ISETP.GE.AND P0, PT, R0, 0x1, PT &req={1} ?WAIT13_END_GROUP;
@!P0 BRA 0x940 &req={4,3,2,0} ?trans5;
ISETP.GE.U32.AND P1, PT, R0.reuse, 0x8, PT ?trans1;
LOP3.LUT R5, R0.reuse, 0x7, RZ, 0xc0, !PT ?trans1;
UMOV UR4, URZ ?trans1;
IMAD R4, R0, UR8, RZ ?trans1;
MOV R28, RZ ?trans2;
ISETP.NE.AND P0, PT, R5, RZ, PT ?WAIT7_END_GROUP;
@!P1 BRA 0x4b0 ?trans6;
LDC.64 R6, c[0x0][0x380] &wr=0x0 ?trans1;
LOP3.LUT R24, R0.reuse, 0x7ffffff8, RZ, 0xc0, !PT ?trans1;
IMAD R29, R0.reuse, 0x3, R23.reuse ?trans1;
IADD3 R25, PT, PT, R23.reuse, R0.reuse, RZ ?trans2;
SHF.L.U32 R22, R0.reuse, 0x3, RZ ?trans1;
IMAD R33, R0.reuse, 0x5, R23.reuse ?trans1;
IADD3 R27, PT, PT, R23, R0, R0 ?trans1;
IMAD R35, R0.reuse, 0x6, R23.reuse ?trans1;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans1;
LEA R31, R0.reuse, R23, 0x2 ?trans1;
IMAD R37, R0, 0x7, R23 ?trans1;
IADD3 R24, PT, PT, -R24, RZ, RZ ?trans1;
UMOV UR4, URZ ?trans1;
IMAD.WIDE.U32 R6, R4, 0x4, R6 &req={0} ?WAIT5_END_GROUP;
IADD.64 R6, R6, 0x10 ?trans2;
IMAD.WIDE.U32 R8, R23, 0x4, R2 &req={1} ?WAIT7_END_GROUP;
LDG.E R15, desc[UR6][R6.64+-0x10] &wr=0x2 ?trans4;
LDG.E R14, desc[UR6][R8.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R20, R25, 0x4, R2 ?WAIT3_END_GROUP;
LDG.E R26, desc[UR6][R6.64+-0xc] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R12, R27, 0x4, R2 ?WAIT3_END_GROUP;
LDG.E R21, desc[UR6][R20.64] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R10, R29, 0x4, R2 ?WAIT3_END_GROUP;
LDG.E R12, desc[UR6][R12.64] &wr=0x4 ?trans4;
LDG.E R30, desc[UR6][R6.64+-0x8] &wr=0x4 ?trans1;
IMAD.WIDE.U32 R16, R33, 0x4, R2 ?WAIT3_END_GROUP;
LDG.E R34, desc[UR6][R10.64] &rd=0x0 &wr=0x5 ?trans4;
LDG.E R32, desc[UR6][R6.64+-0x4] &wr=0x5 ?trans1;
IMAD.WIDE.U32 R18, R35, 0x4, R2 ?WAIT3_END_GROUP;
LDG.E R20, desc[UR6][R6.64] &wr=0x5 ?trans1;
IMAD.WIDE.U32 R10, R37, 0x4, R2 &req={0} ?WAIT3_END_GROUP;
LDG.E R16, desc[UR6][R16.64] &wr=0x5 ?trans4;
LDG.E R13, desc[UR6][R6.64+0x4] &wr=0x5 ?trans4;
LDG.E R18, desc[UR6][R18.64] &wr=0x5 ?trans4;
LDG.E R11, desc[UR6][R10.64] &wr=0x5 ?trans4;
LDG.E R36, desc[UR6][R6.64+0xc] &wr=0x5 ?trans1;
IMAD R28, R15, R14, R28 &req={2} ?WAIT2_END_GROUP;
IMAD.WIDE.U32 R14, R31, 0x4, R2 ?WAIT6_END_GROUP;
LDG.E R14, desc[UR6][R14.64] &wr=0x2 ?trans4;
LDG.E R15, desc[UR6][R6.64+0x8] &rd=0x0 &wr=0x2 ?trans1;
IMAD R21, R26, R21, R28 &req={3} ?trans1;
IADD3 R24, PT, PT, R24, 0x8, RZ ?WAIT3_END_GROUP;
IMAD R21, R30, R12, R21 &req={4} ?trans2;
ISETP.NE.AND P1, PT, R24, RZ, PT ?trans2;
IMAD R21, R32, R34, R21 &req={5} ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
IADD.64 R6, R6, 0x20 &req={0} ?WAIT3_END_GROUP;
IADD3 R25, PT, PT, R22.reuse, R25, RZ ?trans2;
IADD3 R27, PT, PT, R22.reuse, R27, RZ ?trans2;
IADD3 R29, PT, PT, R22.reuse, R29, RZ ?trans2;
IADD3 R31, PT, PT, R22.reuse, R31, RZ ?trans2;
IADD3 R33, PT, PT, R22.reuse, R33, RZ ?trans2;
IADD3 R35, PT, PT, R22, R35, RZ ?WAIT2_END_GROUP;
IADD3 R37, PT, PT, R22.reuse, R37, RZ ?trans1;
IMAD.WIDE.U32 R8, R22, 0x4, R8 ?WAIT4_END_GROUP;
IMAD R14, R20, R14, R21 &req={2} ?WAIT4_END_GROUP;
IMAD R13, R13, R16, R14 ?WAIT4_END_GROUP;
IMAD R13, R15, R18, R13 ?WAIT4_END_GROUP;
IMAD R28, R36, R11, R13 ?trans1;
@P1 BRA 0x1f0 ?trans6;
@!P0 BRA 0x940 ?trans5;
ISETP.GE.U32.AND P1, PT, R5, 0x4, PT ?trans1;
LOP3.LUT R19, R0, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R19, RZ, PT ?WAIT7_END_GROUP;
@!P1 BRA 0x6f0 ?trans6;
LDC.64 R8, c[0x0][0x380] &wr=0x0 ?trans1;
IMAD R11, R0, UR4, R23 ?trans2;
HFMA2 R5, -RZ, RZ, 0, 0 ?trans1;
UMOV UR5, URZ ?trans1;
IADD3 R7, PT, PT, R4.reuse, UR4, RZ ?trans2;
IADD3 R17, PT, PT, R11, R0, RZ ?trans1;
IADD.64 R12, R4, UR4 ?trans2;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans8;
LDC.64 R20, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R8, R7, 0x4, R8 &req={0} ?WAIT6_END_GROUP;
LDG.E R9, desc[UR6][R8.64] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R10, R11, 0x4, R2 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R14, R17.reuse, 0x4, R2 ?trans1;
IADD3 R17, PT, PT, R17, R0, RZ ?trans1;
LDG.E R10, desc[UR6][R10.64] &wr=0x3 ?trans1;
LEA R6, P1, R12, R20, 0x2 &req={2} ?WAIT3_END_GROUP;
LDG.E R14, desc[UR6][R14.64] &wr=0x2 ?trans1;
LEA.HI.X R7, R12, R21, R13, 0x2, P1 ?trans1;
IMAD.WIDE.U32 R12, R17.reuse, 0x4, R2 ?trans1;
IADD3 R21, PT, PT, R17, R0, RZ ?WAIT3_END_GROUP;
LDG.E R16, desc[UR6][R6.64+0x4] &wr=0x2 ?trans2;
IMAD.WIDE.U32 R2, R21, 0x4, R2 ?trans2;
LDG.E R12, desc[UR6][R12.64] &wr=0x4 ?trans4;
LDG.E R18, desc[UR6][R6.64+0x8] &wr=0x4 ?trans4;
LDG.E R2, desc[UR6][R2.64] &wr=0x5 ?trans4;
LDG.E R8, desc[UR6][R6.64+0xc] &wr=0x5 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
IMAD R9, R9, R10, R28 &req={3} ?WAIT4_END_GROUP;
IMAD R9, R16, R14, R9 &req={2} ?WAIT4_END_GROUP;
IMAD R9, R18, R12, R9 &req={4} ?WAIT4_END_GROUP;
IMAD R28, R8, R2, R9 &req={5} ?WAIT7_END_GROUP;
@!P0 BRA 0x940 ?trans5;
ISETP.NE.AND P1, PT, R19, 0x1, PT ?trans1;
LOP3.LUT R2, R0, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P0, PT, R2, 0x1, PT ?WAIT7_END_GROUP;
@!P1 BRA 0x8a0 ?trans6;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
MOV R8, R4 ?trans1;
HFMA2 R9, -RZ, RZ, 0, 0 ?trans1;
UMOV UR5, URZ ?trans1;
IADD3 R13, PT, PT, R4, UR4, RZ ?WAIT3_END_GROUP;
IADD.64 R10, R8, UR4 ?trans2;
LDC.64 R14, c[0x0][0x380] &wr=0x1 ?trans1;
IMAD R9, R0, UR4, R23 ?WAIT5_END_GROUP;
IADD3 R17, PT, PT, R9, R0, RZ ?trans2;
LDC.64 R6, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R2, R13, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R3, desc[UR6][R2.64] &wr=0x3 ?trans1;
LEA R12, P1, R10, R14, 0x2 &req={1} ?WAIT4_END_GROUP;
LEA.HI.X R13, R10, R15, R11, 0x2, P1 ?trans1;
IMAD.WIDE.U32 R8, R9, 0x4, R6 &req={2} ?WAIT5_END_GROUP;
LDG.E R13, desc[UR6][R12.64+0x4] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R6, R17, 0x4, R6 ?WAIT3_END_GROUP;
LDG.E R8, desc[UR6][R8.64] &wr=0x3 ?trans4;
LDG.E R6, desc[UR6][R6.64] &wr=0x2 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x2, URZ ?trans1;
IMAD R28, R3, R8, R28 &req={3} ?WAIT4_END_GROUP;
IMAD R28, R13, R6, R28 &req={2} ?WAIT7_END_GROUP;
@P0 BRA 0x940 ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
IADD3 R5, PT, PT, R4, UR4, RZ ?trans1;
IMAD R9, R0, UR4, R23 ?WAIT6_END_GROUP;
LDC.64 R6, c[0x0][0x388] &wr=0x1 ?trans1;
IMAD.WIDE.U32 R2, R5, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R3, desc[UR6][R2.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R4, R9, 0x4, R6 &req={1} ?WAIT6_END_GROUP;
LDG.E R4, desc[UR6][R4.64] &wr=0x2 ?trans2;
IMAD R28, R3, R4, R28 &req={2} ?WAIT7_END_GROUP;
LDC R0, c[0x0][0x360] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x390] &wr=0x1 ?trans1;
IMAD R23, R0, UR8, R23 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R23, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R28 ?trans1;
EXIT ?trans5;
BRA 0x9a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: matrix_mult(int*, int*, int*, int)
_Z11matrix_multPiS_S_i:
s_clause 0x2
s_load_b32 s8, s[0:1], 0x18
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s8, 1
s_cbranch_scc1 .LBB0_3
v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v2, v0
s_mul_i32 s10, s15, s8
s_mov_b32 s9, s8
s_ashr_i32 s11, s10, 31
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mov_b32_e32 v1, v3
s_lshl_b64 s[10:11], s[10:11], 2
s_add_u32 s4, s4, s10
s_addc_u32 s5, s5, s11
.LBB0_2:
s_delay_alu instid0(VALU_DEP_1)
v_lshlrev_b64 v[4:5], 2, v[2:3]
s_load_b32 s10, s[4:5], 0x0
s_add_i32 s9, s9, -1
s_add_u32 s4, s4, 4
s_addc_u32 s5, s5, 0
s_cmp_eq_u32 s9, 0
v_add_co_u32 v4, vcc_lo, s6, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
global_load_b32 v6, v[4:5], off
s_waitcnt vmcnt(0) lgkmcnt(0)
v_mad_u64_u32 v[4:5], null, v6, s10, v[1:2]
s_delay_alu instid0(VALU_DEP_1)
v_dual_mov_b32 v1, v4 :: v_dual_add_nc_u32 v2, s8, v2
s_cbranch_scc0 .LBB0_2
s_branch .LBB0_4
.LBB0_3:
v_mov_b32_e32 v1, 0
.LBB0_4:
s_load_b32 s0, s[0:1], 0x2c
s_waitcnt lgkmcnt(0)
s_and_b32 s0, s0, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[2:3], null, s15, s0, v[0:1]
v_mov_b32_e32 v3, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[2:3]
v_add_co_u32 v2, vcc_lo, s2, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
global_store_b32 v[2:3], v1, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| matrix_mult | 4,088 | 884 | stackv2-00000-of-00015 |
// Demangled: modulate(float*, int)
Function : _Z8modulatePfi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD R5, R5, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R9, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
IMAD.HI R0, R5, 0x38e38e39, RZ ?WAIT5_END_GROUP;
SHF.R.S32.HI R7, RZ, 0x1, R0 ?WAIT4_END_GROUP;
LEA.HI R0, R0, R7, RZ, 0x1 ?WAIT5_END_GROUP;
IMAD R0, R0, -0x9, R5 ?WAIT5_END_GROUP;
SHF.L.U32 R0, R0, 0x2, RZ ?WAIT6_END_GROUP;
LDC R0, c[0x3][R0] &wr=0x2 ?trans2;
FMUL R9, R0, R9 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x150;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: modulate(float*, int)
_Z8modulatePfi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b32 s3, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_2
v_mul_hi_i32 v0, 0x38e38e39, v1
s_load_b64 s[0:1], s[0:1], 0x0
s_getpc_b64 s[2:3]
s_add_u32 s2, s2, filter_gpu@rel32@lo+4
s_addc_u32 s3, s3, filter_gpu@rel32@hi+12
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshrrev_b32_e32 v2, 31, v0
v_ashrrev_i32_e32 v0, 1, v0
v_add_nc_u32_e32 v0, v0, v2
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshl_add_u32 v0, v0, 3, v0
v_sub_nc_u32_e32 v3, v1, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 2, v[3:4]
v_add_co_u32 v2, vcc_lo, v3, s2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v4, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[0:1], off
s_waitcnt vmcnt(0)
v_mul_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| modulate | 573 | 823 | stackv2-00000-of-00015 |
// Demangled: reduce_kernel(int*, int*)
Function : _Z13reduce_kernelPiS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R9, SR_TID.X &wr=0x1 ?trans7;
LDC R6, c[0x0][0x360] &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans1;
S2R R11, SR_CTAID.X &wr=0x1 ?trans6;
LDC.64 R4, c[0x0][0x388] &wr=0x4 ?trans1;
IADD3 R0, PT, PT, R6, R6, RZ &req={2} ?WAIT5_END_GROUP;
IMAD R3, R0, R11, R9 &req={1} ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, R3.reuse, R6, RZ ?trans1;
IMAD.WIDE.U32 R2, R3, 0x4, R4 &req={4} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R7, 0x4, R4 ?trans2;
LDG.E R2, desc[UR6][R2.64] &req={3} &wr=0x2 ?trans4;
LDG.E R5, desc[UR6][R4.64] &wr=0x2 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
ISETP.GE.U32.AND P1, PT, R6, 0x2, PT ?trans1;
ISETP.NE.AND P0, PT, R9, RZ, PT ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?WAIT6_END_GROUP;
LEA R7, R9, UR4, 0x2 ?trans2;
IADD3 R0, PT, PT, R2, R5, RZ &req={2} ?WAIT5_END_GROUP;
STS [R7], R0 &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P1 BRA 0x230 &req={0} ?trans5;
MOV R0, R6 &req={1} ?WAIT7_END_GROUP;
SHF.R.U32.HI R6, RZ, 0x1, R0 ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P1, PT, R9, R6, PT ?WAIT13_END_GROUP;
@!P1 IMAD R2, R6, 0x4, R7 ?trans1;
@!P1 LDS R3, [R7] ?trans5;
@!P1 LDS R2, [R2] &wr=0x0 ?trans2;
@!P1 IADD3 R4, PT, PT, R2, R3, RZ &req={0} ?WAIT5_END_GROUP;
@!P1 STS [R7], R4 &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P1, PT, R0, 0x3, PT ?trans1;
MOV R0, R6 ?WAIT12_END_GROUP;
@P1 BRA 0x180 &req={0} ?trans5;
@P0 EXIT ?trans5;
S2UR UR5, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR4, 0x400 ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={0} ?trans1;
IMAD.WIDE.U32 R2, R11, 0x4, R2 &req={2} ?WAIT8_END_GROUP;
LDS R5, [UR4] &wr=0x0 ?trans4;
STG.E desc[UR6][R2.64], R5 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x2c0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: reduce_kernel(int*, int*)
_Z13reduce_kernelPiS_:
s_clause 0x1
s_load_b32 s5, s[0:1], 0x1c
s_load_b128 s[0:3], s[0:1], 0x0
s_mov_b32 s4, s15
s_waitcnt lgkmcnt(0)
s_and_b32 s5, s5, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
s_mul_i32 s6, s15, s5
s_cmp_lt_u32 s5, 2
v_lshl_add_u32 v1, s6, 1, v0
v_mov_b32_e32 v2, 0
v_lshlrev_b64 v[3:4], 2, v[1:2]
v_add_nc_u32_e32 v1, s5, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[1:2], 2, v[1:2]
v_add_co_u32 v3, vcc_lo, s2, v3
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
v_add_co_u32 v1, vcc_lo, s2, v1
s_delay_alu instid0(VALU_DEP_4)
v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
s_clause 0x1
global_load_b32 v3, v[3:4], off
global_load_b32 v2, v[1:2], off
v_lshl_add_u32 v1, v0, 2, 0
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v2, v2, v3
ds_store_b32 v1, v2
s_waitcnt lgkmcnt(0)
s_barrier
.LBB0_1:
buffer_gl0_inv
s_cbranch_scc1 .LBB0_5
s_lshr_b32 s2, s5, 1
s_mov_b32 s3, exec_lo
v_cmpx_gt_u32_e64 s2, v0
s_cbranch_execz .LBB0_4
v_lshl_add_u32 v2, s2, 2, v1
ds_load_b32 v2, v2
ds_load_b32 v3, v1
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
ds_store_b32 v1, v2
.LBB0_4:
s_or_b32 exec_lo, exec_lo, s3
s_waitcnt lgkmcnt(0)
s_barrier
s_cmp_lt_u32 s5, 4
s_mov_b32 s5, s2
s_branch .LBB0_1
.LBB0_5:
s_mov_b32 s2, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB0_7
v_mov_b32_e32 v0, 0
s_mov_b32 s5, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[2:3], s[4:5], 2
s_add_u32 s0, s0, s2
ds_load_b32 v1, v0
s_addc_u32 s1, s1, s3
s_waitcnt lgkmcnt(0)
global_store_b32 v0, v1, s[0:1]
.LBB0_7:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| reduce_kernel | 1,072 | 983 | stackv2-00000-of-00015 |
// Demangled: bfs_unoptimized(graphVertices*, int*, int, int*, bool*)
Function : _Z15bfs_unoptimizedP13graphVerticesPiiS1_Pb
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R0, c[0x0][0x390] &wr=0x1 ?trans2;
ISETP.GE.AND P0, PT, R0, 0x1, PT &req={1} ?WAIT13_END_GROUP;
@!P0 EXIT &req={0} ?trans5;
S2R R0, SR_TID.X &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R3, SR_CTAID.X &wr=0x0 ?trans1;
LDCU UR5, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
UIMAD UR5, UR4, UR5, URZ &req={1} ?trans2;
IMAD R0, R3, UR4, R0 &req={0} ?trans1;
UMOV UR4, URZ &req={2} ?WAIT9_END_GROUP;
LDC R2, c[0x0][0x390] &wr=0x0 ?trans1;
IADD3 R3, PT, PT, R0, UR4, RZ ?trans1;
UIADD3 UR4, UPT, UPT, UR5, UR4, URZ ?trans1;
BSSY.RECONVERGENT B0, 0x340 ?trans3;
ISETP.GE.AND P1, PT, R3, R2, PT &req={0} ?trans2;
ISETP.LE.AND P0, PT, R2, UR4, PT ?WAIT11_END_GROUP;
@P1 BRA 0x330 &req={1} ?trans5;
LDC.64 R8, c[0x0][0x380] &wr=0x0 ?trans2;
IMAD.WIDE R8, R3, 0x8, R8 &req={0} ?WAIT5_END_GROUP;
LDG.E R10, desc[UR6][R8.64+0x4] &wr=0x2 ?trans2;
ISETP.GE.AND P1, PT, R10, 0x1, PT &req={2} ?WAIT13_END_GROUP;
@!P1 BRA 0x330 ?trans5;
LDCU.64 UR8, c[0x0][0x398] &wr=0x0 ?trans1;
LDC.64 R6, c[0x0][0x388] &wr=0x1 ?trans1;
SHF.R.S32.HI R12, RZ, 0x1f, R3 ?trans1;
HFMA2 R15, -RZ, RZ, 0, 0 ?trans1;
MOV R14, R10 ?WAIT5_END_GROUP;
LDC.64 R4, c[0x0][0x398] &wr=0x2 ?trans1;
LEA R2, P1, R3, UR8, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R3, R3, UR9, R12, 0x2, P1 ?WAIT9_END_GROUP;
LDG.E R10, desc[UR6][R8.64] &req={1} &wr=0x3 ?trans4;
LDG.E R17, desc[UR6][R2.64] &wr=0x4 ?trans1;
IADD3 R11, PT, PT, R10, R15, RZ &req={3} ?WAIT5_END_GROUP;
IMAD.WIDE R10, R11, 0x4, R6 &req={1} ?WAIT6_END_GROUP;
LDG.E R11, desc[UR6][R10.64] &wr=0x3 ?trans2;
IMAD.WIDE R12, R11, 0x4, R4 &req={3,2} ?WAIT5_END_GROUP;
LDG.E R16, desc[UR6][R12.64] &wr=0x2 ?trans1;
IADD3 R17, PT, PT, R17, 0x1, RZ &req={4} ?trans1;
BSSY.RECONVERGENT B1, 0x310 ?trans1;
IADD3 R15, PT, PT, R15, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.AND P1, PT, R16, R17, PT &req={2} ?WAIT13_END_GROUP;
@!P1 BRA 0x300 ?trans5;
LDC.64 R10, c[0x0][0x3a0] &wr=0x0 ?trans1;
STG.E desc[UR6][R12.64], R17 &rd=0x1 ?trans4;
STG.E.U8 desc[UR6][R10.64], RZ &req={0} &rd=0x1 ?trans4;
LDG.E R14, desc[UR6][R8.64+0x4] &rd=0x1 &wr=0x5 ?trans2;
BSYNC.RECONVERGENT B1 ?trans5;
ISETP.GE.AND P1, PT, R15, R14, PT &req={5} ?WAIT13_END_GROUP;
@!P1 BRA 0x200 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
@!P0 BRA 0xc0 ?trans5;
EXIT ?trans5;
BRA 0x360;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: bfs_unoptimized(graphVertices*, int*, int, int*, bool*)
_Z15bfs_unoptimizedP13graphVerticesPiiS1_Pb:
s_load_b32 s10, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s10, 1
s_cbranch_scc1 .LBB0_9
s_clause 0x3
s_load_b32 s8, s[0:1], 0x34
s_load_b32 s11, s[0:1], 0x28
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b128 s[0:3], s[0:1], 0x18
s_mov_b32 s12, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s8, s8, 0xffff
s_delay_alu instid0(SALU_CYCLE_1)
v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
v_mov_b32_e32 v0, 0
s_mul_i32 s11, s11, s8
.LBB0_2:
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v4, s12, v1
s_mov_b32 s13, exec_lo
v_cmpx_gt_i32_e64 s10, v4
s_cbranch_execz .LBB0_8
v_ashrrev_i32_e32 v5, 31, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 3, v[4:5]
v_add_co_u32 v2, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
global_load_b32 v10, v[2:3], off offset:4
s_waitcnt vmcnt(0)
v_cmp_lt_i32_e32 vcc_lo, 0, v10
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_8
v_lshlrev_b64 v[6:7], 2, v[4:5]
v_add_co_u32 v4, vcc_lo, v2, 4
v_add_co_ci_u32_e32 v5, vcc_lo, 0, v3, vcc_lo
s_mov_b64 s[8:9], 0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v6, vcc_lo, s0, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
s_mov_b32 s14, 0
.LBB0_5:
global_load_b32 v8, v[2:3], off
s_mov_b32 s15, exec_lo
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v9, 31, v8
v_add_co_u32 v8, vcc_lo, s8, v8
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v9, vcc_lo, s9, v9, vcc_lo
v_lshlrev_b64 v[8:9], 2, v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v8, vcc_lo, s6, v8
v_add_co_ci_u32_e32 v9, vcc_lo, s7, v9, vcc_lo
global_load_b32 v8, v[8:9], off
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v9, 31, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[8:9], 2, v[8:9]
v_add_co_u32 v8, vcc_lo, s0, v8
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v9, vcc_lo, s1, v9, vcc_lo
s_clause 0x1
global_load_b32 v11, v[6:7], off
global_load_b32 v12, v[8:9], off
s_waitcnt vmcnt(1)
v_add_nc_u32_e32 v11, 1, v11
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 v12, v11
s_cbranch_execz .LBB0_7
global_store_b32 v[8:9], v11, off
global_load_b32 v10, v[4:5], off
global_store_b8 v0, v0, s[2:3]
.LBB0_7:
s_or_b32 exec_lo, exec_lo, s15
s_add_u32 s8, s8, 1
s_addc_u32 s9, s9, 0
s_waitcnt vmcnt(0)
v_cmp_ge_i32_e32 vcc_lo, s8, v10
s_or_b32 s14, vcc_lo, s14
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s14
s_cbranch_execnz .LBB0_5
.LBB0_8:
s_or_b32 exec_lo, exec_lo, s13
s_add_i32 s12, s12, s11
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_ge_i32 s12, s10
s_cbranch_scc0 .LBB0_2
.LBB0_9:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| bfs_unoptimized | 1,442 | 1,600 | stackv2-00000-of-00015 |
// Demangled: addvecs(double*, double*)
Function : _Z7addvecsPdS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R7, SR_TID.X &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R2, R7, 0x8, R2 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R7, 0x8, R4 &req={2} ?trans2;
LDG.E.64 R2, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans4;
LDG.E.64 R6, desc[UR4][R4.64] &wr=0x2 ?trans2;
DADD R6, R2, R6 &req={2} &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R4.64], R6 &req={0} ?trans1;
EXIT ?trans5;
BRA 0xc0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: addvecs(double*, double*)
_Z7addvecsPdS_:
s_load_b128 s[0:3], s[0:1], 0x0
v_lshlrev_b32_e32 v4, 3, v0
s_waitcnt lgkmcnt(0)
s_clause 0x1
global_load_b64 v[0:1], v4, s[2:3]
global_load_b64 v[2:3], v4, s[0:1]
s_waitcnt vmcnt(0)
v_add_f64 v[0:1], v[0:1], v[2:3]
global_store_b64 v4, v[0:1], s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| addvecs | 378 | 183 | stackv2-00000-of-00015 |
// Demangled: _cuda_parallel_multiplication(int, int*, int)
Function : _Z29_cuda_parallel_multiplicationiPii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R7, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R7, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
LDCU UR8, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R7, R7, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R2, R0, 0x4, R4 &req={1,0} ?WAIT5_END_GROUP;
LDG.E R6, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans1;
IADD3 R0, PT, PT, R7, R0, RZ ?trans1;
WARPSYNC.ALL ?trans5;
NOP ?trans1;
ISETP.GE.AND P0, PT, R0, UR5, PT ?trans1;
IMAD R9, R6, UR8, RZ &req={3,2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R9 &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P0 BRA 0xd0 ?trans5;
EXIT ?trans5;
BRA 0x180;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _cuda_parallel_multiplication(int, int*, int)
_Z29_cuda_parallel_multiplicationiPii:
s_clause 0x1
s_load_b32 s5, s[0:1], 0x24
s_load_b32 s4, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_mov_b32 s6, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s5, s5, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s5, v[0:1]
v_cmpx_gt_i32_e64 s4, v1
s_cbranch_execz .LBB0_3
s_load_b32 s6, s[2:3], 0x0
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x8
s_load_b32 s0, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s6, s5
s_mov_b32 s5, 0
.LBB0_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_add_co_u32 v2, vcc_lo, s2, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s4, v1
global_load_b32 v0, v[2:3], off
s_or_b32 s5, vcc_lo, s5
s_waitcnt vmcnt(0)
v_mul_lo_u32 v0, v0, s0
global_store_b32 v[2:3], v0, off
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_and_not1_b32 exec_lo, exec_lo, s5
s_cbranch_execnz .LBB0_2
.LBB0_3:
s_endpgm
| _cuda_parallel_multiplication | 611 | 650 | stackv2-00000-of-00015 |
// Demangled: kernel(double*, unsigned long long)
Function : _Z6kernelPdy
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?trans1;
S2R R7, SR_TID.X &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD R4, R4, UR4, R7 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.U64.AND P0, PT, R4, UR6, PT &req={2} ?WAIT14_END_GROUP;
@P0 EXIT &req={0} ?trans5;
I2F.F64.U32 R6, R7 &wr=0x0 ?trans1;
MOV R2, 0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
BSSY.RECONVERGENT B0, 0x430 ?trans1;
MUFU.RCP64H R3, R7 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, -R6, R2, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R8, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R2, R8, R2 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, -R6, R8, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R8, R2, R8 &req={0} &rd=0x0 &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U32 R8, R4 &req={0} &wr=0x0 ?trans2;
FSETP.GEU.AND P1, PT, |R9|, 6.5827683646048100446e-37, PT &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R8, R2 &req={2} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, -R6, R10, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R2, R12, R10 &req={0} &wr=0x0 ?trans2;
FFMA R0, RZ, R7, R3 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA P1, 0x420 &req={1} ?trans5;
MOV R0, 0x400 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x480 ?trans5;
MOV R2, R12 ?trans1;
MOV R3, R13 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU.64 UR6, c[0x0][0x380] &wr=0x0 ?trans2;
LEA R6, P0, R4, UR6, 0x3 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R7, R4, UR7, RZ, 0x3, P0 ?WAIT5_END_GROUP;
STG.E.64 desc[UR4][R6.64], R2 ?trans1;
EXIT ?trans5;
FSETP.GEU.AND P0, PT, |R7|.reuse, 1.469367938527859385e-39, PT ?trans1;
LOP3.LUT R2, R7, 0x800fffff, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B1, 0xc40 ?trans1;
FSETP.GEU.AND P2, PT, |R9|.reuse, 1.469367938527859385e-39, PT ?trans1;
MOV R14, 0x1 ?trans1;
LOP3.LUT R3, R2, 0x3ff00000, RZ, 0xfc, !PT ?trans1;
MOV R2, R6 ?trans1;
LOP3.LUT R12, R9, 0x7ff00000, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R21, R7, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
MOV R13, 0x1ca00000 ?WAIT3_END_GROUP;
@!P0 DMUL R2, R6, 8.98846567431157953865e+307 &wr=0x0 ?trans1;
MOV R20, R12 ?trans1;
MUFU.RCP64H R15, R3 &req={0} &wr=0x0 ?trans1;
ISETP.GE.U32.AND P1, PT, R12, R21, PT ?trans1;
@!P2 MOV R16, RZ ?trans1;
@!P0 LOP3.LUT R21, R3, 0x7ff00000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R23, PT, PT, R21, -0x1, RZ ?WAIT15_END_GROUP;
NOP ?WAIT10_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R14, -R2, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R10, R10 &req={0} &rd=0x0 ?trans2;
@!P2 LOP3.LUT R11, R7, 0x7ff00000, RZ, 0xc0, !PT &req={0} ?trans1;
MOV R10, R8 ?WAIT4_END_GROUP;
@!P2 ISETP.GE.U32.AND P3, PT, R12, R11, PT ?trans1;
SEL R11, R13, 0x63400000, !P1 ?WAIT4_END_GROUP;
@!P2 SEL R17, R13, 0x63400000, !P3 ?trans1;
LOP3.LUT R11, R11, 0x800fffff, R9, 0xf8, !PT ?WAIT4_END_GROUP;
@!P2 LOP3.LUT R17, R17, 0x80000000, R9, 0xf8, !PT ?WAIT4_END_GROUP;
@!P2 LOP3.LUT R17, R17, 0x100000, RZ, 0xfc, !PT ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P2 DFMA R10, R10, 2, -R16 &wr=0x0 ?trans2;
@!P2 LOP3.LUT R20, R11, 0x7ff00000, RZ, 0xc0, !PT &req={0} ?WAIT4_END_GROUP;
IADD3 R22, PT, PT, R20, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R22, 0x7feffffe, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R23, 0x7feffffe, P0 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R14, R18, R14 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R18, -R2, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R18, R14, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R16, R14, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R16, -R2, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R14, R18, R16 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0xaf0 &req={1,0} ?trans5;
LOP3.LUT R9, R7, 0x7ff00000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R8, PT, PT, R12.reuse, -R9.reuse, RZ ?trans1;
ISETP.GE.U32.AND P0, PT, R12, R9, PT ?WAIT4_END_GROUP;
VIMNMX.S32 R8, R8, -0x46a00000, !PT ?trans1;
SEL R13, R13, 0x63400000, !P0 ?WAIT4_END_GROUP;
VIMNMX.S32 R8, R8, 0x46a00000, PT ?WAIT5_END_GROUP;
IADD3 R16, PT, PT, -R13, R8, RZ ?trans1;
MOV R8, RZ ?WAIT3_END_GROUP;
IADD3 R9, PT, PT, R16, 0x7fe00000, RZ ?WAIT6_END_GROUP;
DMUL R12, R14, R8 &wr=0x0 ?trans2;
FSETP.GTU.AND P0, PT, |R13|, 1.469367938527859385e-39, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0xc30 ?trans5;
DFMA R2, R14, -R2, R10 &wr=0x0 ?trans1;
MOV R8, RZ ?trans1;
FSETP.NEU.AND P0, PT, R3.reuse, RZ, PT &req={0} ?trans1;
LOP3.LUT R7, R3, 0x80000000, R7, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R9, R7, R9, RZ, 0xfc, !PT ?WAIT8_END_GROUP;
@!P0 BRA 0xc30 ?trans5;
IADD3 R3, PT, PT, -R16, RZ, RZ ?trans1;
MOV R2, RZ ?trans1;
DMUL.RP R8, R14, R8 &wr=0x0 ?trans2;
LOP3.LUT R7, R9, R7, RZ, 0x3c, !PT &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R12, -R2, R14 &wr=0x0 ?trans2;
IADD3 R2, PT, PT, -R16, -0x43300000, RZ &req={0} ?WAIT5_END_GROUP;
FSETP.NEU.AND P0, PT, |R3|, R2, PT ?WAIT5_END_GROUP;
FSEL R12, R8, R12, !P0 ?trans1;
FSEL R13, R7, R13, !P0 ?trans1;
BRA 0xc30 ?trans6;
DSETP.NAN.AND P0, PT, R8, R8, PT &wr=0x0 ?trans2;
@P0 BRA 0xc10 &req={0} ?trans5;
DSETP.NAN.AND P0, PT, R6, R6, PT &wr=0x0 ?trans2;
@P0 BRA 0xbe0 &req={0} ?trans5;
ISETP.NE.AND P0, PT, R20, R21, PT ?trans1;
MOV.64 R12, 0xfff8000000000000 ?WAIT12_END_GROUP;
@!P0 BRA 0xc30 ?trans5;
ISETP.NE.AND P0, PT, R20, 0x7ff00000, PT ?trans1;
LOP3.LUT R13, R9, 0x80000000, R7, 0x48, !PT ?WAIT4_END_GROUP;
ISETP.EQ.OR P0, PT, R21, RZ, !P0 ?WAIT13_END_GROUP;
@P0 LOP3.LUT R2, R13, 0x7ff00000, RZ, 0xfc, !PT ?trans1;
@!P0 MOV R12, RZ ?trans1;
@P0 MOV R12, RZ ?WAIT3_END_GROUP;
@P0 MOV R13, R2 ?trans1;
BRA 0xc30 ?trans6;
LOP3.LUT R13, R7, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R12, R6 ?trans1;
BRA 0xc30 ?trans6;
LOP3.LUT R13, R9, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R12, R8 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R2, R0 ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R2 0x0 ?trans5;
BRA 0xc70;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: kernel(double*, unsigned long long)
_Z6kernelPdy:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x1c
s_load_b128 s[0:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
v_mov_b32_e32 v2, 0
v_cmp_gt_u64_e32 vcc_lo, s[2:3], v[1:2]
s_and_saveexec_b32 s2, vcc_lo
s_cbranch_execz .LBB0_2
v_cvt_f64_u32_e32 v[3:4], v1
v_cvt_f64_u32_e32 v[5:6], v0
v_lshlrev_b64 v[0:1], 3, v[1:2]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_scale_f64 v[7:8], null, v[5:6], v[5:6], v[3:4]
v_rcp_f64_e32 v[9:10], v[7:8]
s_waitcnt_depctr 0xfff
v_fma_f64 v[11:12], -v[7:8], v[9:10], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[9:10], v[9:10], v[11:12], v[9:10]
v_fma_f64 v[11:12], -v[7:8], v[9:10], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fma_f64 v[9:10], v[9:10], v[11:12], v[9:10]
v_div_scale_f64 v[11:12], vcc_lo, v[3:4], v[5:6], v[3:4]
v_mul_f64 v[13:14], v[11:12], v[9:10]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[7:8], -v[7:8], v[13:14], v[11:12]
v_div_fmas_f64 v[7:8], v[7:8], v[9:10], v[13:14]
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_div_fixup_f64 v[3:4], v[7:8], v[5:6], v[3:4]
global_store_b64 v[0:1], v[3:4], off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| kernel | 4,076 | 882 | stackv2-00000-of-00015 |
// Demangled: kernel(int*, int*, int*, int)
Function : _Z6kernelPiS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_CTAID.X &wr=0x1 ?trans7;
LDC R2, c[0x0][0x398] &wr=0x2 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans1;
ISETP.GE.AND P0, PT, R2, 0x1, PT &req={2} ?trans1;
IMAD R3, R3, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R3, R2, !P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
ISETP.GE.U32.AND P1, PT, R2.reuse, 0x10, PT ?trans1;
LOP3.LUT R20, R2, 0xf, RZ, 0xc0, !PT ?trans1;
UMOV UR4, URZ ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x0 ?trans1;
IMAD R0, R3, R2, RZ ?trans2;
ISETP.NE.AND P0, PT, R20, RZ, PT ?WAIT7_END_GROUP;
@!P1 BRA 0x720 ?trans6;
LDC.64 R4, c[0x0][0x390] &wr=0x1 ?trans1;
LOP3.LUT R16, R2, 0x7ffffff0, RZ, 0xc0, !PT ?trans1;
UMOV UR4, URZ ?trans1;
MOV R3, R0 ?trans2;
IADD3 R16, PT, PT, -R16, RZ, RZ ?WAIT3_END_GROUP;
LDC.64 R6, c[0x0][0x388] &wr=0x2 ?trans8;
LDC.64 R8, c[0x0][0x380] &wr=0x3 ?trans1;
IADD.64 R4, R4, 0x20 &req={1} ?trans2;
IADD.64 R6, R6, 0x20 &req={2} ?WAIT2_END_GROUP;
IADD.64 R8, R8, 0x20 &req={3} ?WAIT8_END_GROUP;
IMAD.WIDE R10, R3, 0x4, R4 &req={2} ?WAIT5_END_GROUP;
LDG.E R12, desc[UR6][R10.64+-0x20] &req={0} &wr=0x2 ?trans2;
IADD3 R17, PT, PT, R12, 0x1, RZ &req={2} ?trans1;
IMAD.WIDE R12, R3, 0x4, R6 ?WAIT4_END_GROUP;
STG.E desc[UR6][R10.64+-0x20], R17 &rd=0x0 ?trans4;
LDG.E R19, desc[UR6][R12.64+-0x20] &wr=0x2 ?trans1;
IMAD.WIDE R14, R3, 0x4, R8 ?WAIT5_END_GROUP;
STG.E desc[UR6][R14.64+-0x20], R19 &req={2} &rd=0x1 ?trans4;
LDG.E R18, desc[UR6][R10.64+-0x1c] &wr=0x2 ?trans2;
IADD3 R21, PT, PT, R18, 0x1, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R10.64+-0x1c], R21 &rd=0x2 ?trans4;
LDG.E R23, desc[UR6][R12.64+-0x1c] &wr=0x3 ?trans4;
STG.E desc[UR6][R14.64+-0x1c], R23 &req={3} &rd=0x3 ?trans4;
LDG.E R18, desc[UR6][R10.64+-0x18] &wr=0x4 ?trans2;
IADD3 R25, PT, PT, R18, 0x1, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR6][R10.64+-0x18], R25 &rd=0x4 ?trans4;
LDG.E R17, desc[UR6][R12.64+-0x18] &req={0} &wr=0x5 ?trans4;
STG.E desc[UR6][R14.64+-0x18], R17 &req={5} &rd=0x0 ?trans4;
LDG.E R18, desc[UR6][R10.64+-0x14] &wr=0x1 ?trans2;
IADD3 R19, PT, PT, R18, 0x1, RZ &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R10.64+-0x14], R19 &rd=0x1 ?trans4;
LDG.E R21, desc[UR6][R12.64+-0x14] &req={2} &wr=0x2 ?trans4;
STG.E desc[UR6][R14.64+-0x14], R21 &req={2} &rd=0x2 ?trans4;
LDG.E R18, desc[UR6][R10.64+-0x10] &wr=0x3 ?trans2;
IADD3 R23, PT, PT, R18, 0x1, RZ &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR6][R10.64+-0x10], R23 &rd=0x3 ?trans4;
LDG.E R25, desc[UR6][R12.64+-0x10] &req={4} &wr=0x4 ?trans4;
STG.E desc[UR6][R14.64+-0x10], R25 &req={4} &rd=0x4 ?trans4;
LDG.E R17, desc[UR6][R10.64+-0xc] &req={0} &wr=0x5 ?trans2;
IADD3 R17, PT, PT, R17, 0x1, RZ &req={5} ?WAIT5_END_GROUP;
STG.E desc[UR6][R10.64+-0xc], R17 &rd=0x0 ?trans4;
LDG.E R19, desc[UR6][R12.64+-0xc] &req={1} &wr=0x5 ?trans4;
STG.E desc[UR6][R14.64+-0xc], R19 &req={5} &rd=0x1 ?trans4;
LDG.E R18, desc[UR6][R10.64+-0x8] &wr=0x2 ?trans2;
IADD3 R21, PT, PT, R18, 0x1, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R10.64+-0x8], R21 &rd=0x2 ?trans4;
LDG.E R23, desc[UR6][R12.64+-0x8] &req={3} &wr=0x3 ?trans4;
STG.E desc[UR6][R14.64+-0x8], R23 &req={3} &rd=0x3 ?trans4;
LDG.E R18, desc[UR6][R10.64+-0x4] &wr=0x4 ?trans2;
IADD3 R25, PT, PT, R18, 0x1, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR6][R10.64+-0x4], R25 &rd=0x4 ?trans4;
LDG.E R17, desc[UR6][R12.64+-0x4] &req={0} &wr=0x5 ?trans4;
STG.E desc[UR6][R14.64+-0x4], R17 &req={5} &rd=0x0 ?trans4;
LDG.E R18, desc[UR6][R10.64] &wr=0x1 ?trans2;
IADD3 R19, PT, PT, R18, 0x1, RZ &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R10.64], R19 &rd=0x1 ?trans4;
LDG.E R21, desc[UR6][R12.64] &req={2} &wr=0x2 ?trans4;
STG.E desc[UR6][R14.64], R21 &req={2} &rd=0x2 ?trans4;
LDG.E R18, desc[UR6][R10.64+0x4] &wr=0x3 ?trans2;
IADD3 R23, PT, PT, R18, 0x1, RZ &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR6][R10.64+0x4], R23 &rd=0x3 ?trans4;
LDG.E R25, desc[UR6][R12.64+0x4] &req={4} &wr=0x4 ?trans4;
STG.E desc[UR6][R14.64+0x4], R25 &req={4} &rd=0x4 ?trans4;
LDG.E R17, desc[UR6][R10.64+0x8] &req={0} &wr=0x5 ?trans2;
IADD3 R17, PT, PT, R17, 0x1, RZ &req={5} ?WAIT5_END_GROUP;
STG.E desc[UR6][R10.64+0x8], R17 &rd=0x0 ?trans4;
LDG.E R19, desc[UR6][R12.64+0x8] &req={1} &wr=0x5 ?trans4;
STG.E desc[UR6][R14.64+0x8], R19 &req={5} &rd=0x1 ?trans4;
LDG.E R18, desc[UR6][R10.64+0xc] &wr=0x2 ?trans2;
IADD3 R21, PT, PT, R18, 0x1, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R10.64+0xc], R21 &rd=0x2 ?trans4;
LDG.E R23, desc[UR6][R12.64+0xc] &req={3} &wr=0x3 ?trans4;
STG.E desc[UR6][R14.64+0xc], R23 &req={3} &rd=0x3 ?trans4;
LDG.E R18, desc[UR6][R10.64+0x10] &wr=0x4 ?trans2;
IADD3 R25, PT, PT, R18, 0x1, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR6][R10.64+0x10], R25 &rd=0x4 ?trans4;
LDG.E R17, desc[UR6][R12.64+0x10] &req={0} &wr=0x5 ?trans4;
STG.E desc[UR6][R14.64+0x10], R17 &req={5} &rd=0x0 ?trans4;
LDG.E R18, desc[UR6][R10.64+0x14] &wr=0x1 ?trans2;
IADD3 R19, PT, PT, R18, 0x1, RZ &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R10.64+0x14], R19 &rd=0x1 ?trans4;
LDG.E R21, desc[UR6][R12.64+0x14] &req={2} &wr=0x2 ?trans4;
STG.E desc[UR6][R14.64+0x14], R21 &req={2} &rd=0x2 ?trans4;
LDG.E R18, desc[UR6][R10.64+0x18] &wr=0x3 ?trans2;
IADD3 R23, PT, PT, R18, 0x1, RZ &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR6][R10.64+0x18], R23 &rd=0x2 ?trans4;
LDG.E R25, desc[UR6][R12.64+0x18] &req={4} &wr=0x3 ?trans4;
STG.E desc[UR6][R14.64+0x18], R25 &req={3} &rd=0x2 ?trans4;
LDG.E R17, desc[UR6][R10.64+0x1c] &req={0} &wr=0x3 ?trans1;
IADD3 R16, PT, PT, R16, 0x10, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R16, RZ, PT ?trans1;
IADD3 R17, PT, PT, R17, 0x1, RZ &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR6][R10.64+0x1c], R17 &rd=0x2 ?trans4;
LDG.E R19, desc[UR6][R12.64+0x1c] &req={1} &wr=0x3 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x10, URZ ?trans1;
IADD3 R3, PT, PT, R3, 0x10, RZ ?trans2;
STG.E desc[UR6][R14.64+0x1c], R19 &req={3} &rd=0x2 ?trans1;
@P1 BRA 0x1a0 ?trans8;
@!P0 EXIT &req={0} ?trans5;
ISETP.GE.U32.AND P0, PT, R20, 0x8, PT ?trans1;
LOP3.LUT R12, R2, 0x7, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R12, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0xa70 ?trans6;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans1;
IADD3 R3, PT, PT, R0, UR4, RZ ?WAIT7_END_GROUP;
LDC.64 R6, c[0x0][0x388] &wr=0x1 ?trans1;
IMAD.WIDE R4, R3, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
LDG.E R8, desc[UR6][R4.64] &wr=0x3 ?trans1;
IMAD.WIDE R6, R3.reuse, 0x4, R6 &req={1} ?trans1;
IADD3 R11, PT, PT, R8, 0x1, RZ &req={3,2} ?trans2;
LDC.64 R8, c[0x0][0x380] &wr=0x0 ?trans3;
STG.E desc[UR6][R4.64], R11 &rd=0x1 ?trans4;
LDG.E R13, desc[UR6][R6.64] &wr=0x2 ?trans1;
IMAD.WIDE R8, R3, 0x4, R8 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R8.64], R13 &req={2} &rd=0x0 ?trans4;
LDG.E R3, desc[UR6][R4.64+0x4] &wr=0x2 ?trans2;
IADD3 R3, PT, PT, R3, 0x1, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64+0x4], R3 &rd=0x2 ?trans4;
LDG.E R15, desc[UR6][R6.64+0x4] &wr=0x3 ?trans4;
STG.E desc[UR6][R8.64+0x4], R15 &req={3} &rd=0x3 ?trans4;
LDG.E R10, desc[UR6][R4.64+0x8] &wr=0x1 ?trans2;
IADD3 R11, PT, PT, R10, 0x1, RZ &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64+0x8], R11 &rd=0x1 ?trans4;
LDG.E R17, desc[UR6][R6.64+0x8] &wr=0x4 ?trans4;
STG.E desc[UR6][R8.64+0x8], R17 &req={4} &rd=0x4 ?trans4;
LDG.E R10, desc[UR6][R4.64+0xc] &wr=0x0 ?trans2;
IADD3 R13, PT, PT, R10, 0x1, RZ &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64+0xc], R13 &rd=0x0 ?trans4;
LDG.E R3, desc[UR6][R6.64+0xc] &req={2} &wr=0x2 ?trans4;
STG.E desc[UR6][R8.64+0xc], R3 &req={2} &rd=0x2 ?trans4;
LDG.E R10, desc[UR6][R4.64+0x10] &wr=0x3 ?trans2;
IADD3 R15, PT, PT, R10, 0x1, RZ &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64+0x10], R15 &rd=0x3 ?trans4;
LDG.E R11, desc[UR6][R6.64+0x10] &req={1} &wr=0x5 ?trans4;
STG.E desc[UR6][R8.64+0x10], R11 &req={5} &rd=0x1 ?trans4;
LDG.E R10, desc[UR6][R4.64+0x14] &wr=0x4 ?trans2;
IADD3 R17, PT, PT, R10, 0x1, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64+0x14], R17 &rd=0x4 ?trans4;
LDG.E R13, desc[UR6][R6.64+0x14] &req={0} &wr=0x5 ?trans4;
STG.E desc[UR6][R8.64+0x14], R13 &req={5} &rd=0x0 ?trans4;
LDG.E R3, desc[UR6][R4.64+0x18] &req={2} &wr=0x2 ?trans2;
IADD3 R3, PT, PT, R3, 0x1, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64+0x18], R3 &rd=0x0 ?trans4;
LDG.E R15, desc[UR6][R6.64+0x18] &req={3} &wr=0x2 ?trans4;
STG.E desc[UR6][R8.64+0x18], R15 &req={2} &rd=0x0 ?trans4;
LDG.E R10, desc[UR6][R4.64+0x1c] &wr=0x1 ?trans2;
IADD3 R11, PT, PT, R10, 0x1, RZ &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64+0x1c], R11 &rd=0x0 ?trans4;
LDG.E R17, desc[UR6][R6.64+0x1c] &req={4} &wr=0x2 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?WAIT3_END_GROUP;
STG.E desc[UR6][R8.64+0x1c], R17 &req={2} &rd=0x0 ?trans9;
@!P1 EXIT ?trans5;
ISETP.GE.U32.AND P0, PT, R12, 0x4, PT ?trans1;
LOP3.LUT R14, R2, 0x3, RZ, 0xc0, !PT &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R14, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0xc80 ?trans6;
LDC.64 R2, c[0x0][0x390] &req={0} &wr=0x0 ?trans1;
IADD3 R13, PT, PT, R0, UR4, RZ ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x388] &wr=0x1 ?trans1;
IMAD.WIDE R2, R13, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R6, desc[UR6][R2.64] &wr=0x2 ?trans1;
IMAD.WIDE R4, R13.reuse, 0x4, R4 &req={1} ?trans1;
IADD3 R9, PT, PT, R6, 0x1, RZ &req={2} ?trans2;
LDC.64 R6, c[0x0][0x380] &wr=0x0 ?trans3;
STG.E desc[UR6][R2.64], R9 &rd=0x1 ?trans4;
LDG.E R11, desc[UR6][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE R6, R13, 0x4, R6 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R6.64], R11 &req={2} &rd=0x0 ?trans4;
LDG.E R8, desc[UR6][R2.64+0x4] &wr=0x2 ?trans2;
IADD3 R13, PT, PT, R8, 0x1, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64+0x4], R13 &rd=0x2 ?trans4;
LDG.E R15, desc[UR6][R4.64+0x4] &wr=0x3 ?trans4;
STG.E desc[UR6][R6.64+0x4], R15 &req={3} &rd=0x3 ?trans4;
LDG.E R8, desc[UR6][R2.64+0x8] &wr=0x1 ?trans2;
IADD3 R9, PT, PT, R8, 0x1, RZ &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64+0x8], R9 &rd=0x3 ?trans4;
LDG.E R17, desc[UR6][R4.64+0x8] &wr=0x4 ?trans4;
STG.E desc[UR6][R6.64+0x8], R17 &req={4} &rd=0x3 ?trans4;
LDG.E R8, desc[UR6][R2.64+0xc] &wr=0x0 ?trans2;
IADD3 R11, PT, PT, R8, 0x1, RZ &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64+0xc], R11 &rd=0x3 ?trans4;
LDG.E R13, desc[UR6][R4.64+0xc] &req={2} &wr=0x2 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?WAIT3_END_GROUP;
STG.E desc[UR6][R6.64+0xc], R13 &req={2} &rd=0x3 ?trans9;
@!P1 EXIT ?trans5;
LDC.64 R12, c[0x0][0x390] &req={3,0} &wr=0x0 ?trans1;
IADD3 R15, PT, PT, R0, UR4, RZ ?trans2;
IADD3 R14, PT, PT, -R14, RZ, RZ ?WAIT5_END_GROUP;
LDC.64 R8, c[0x0][0x380] &wr=0x1 ?trans8;
LDC.64 R10, c[0x0][0x388] &wr=0x2 ?trans2;
IMAD.WIDE R6, R15, 0x4, R12 &req={3,0} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR6][R6.64] &wr=0x3 ?trans1;
IMAD.WIDE R4, R15, 0x4, R10 &req={2} ?trans1;
IADD3 R14, PT, PT, R14, 0x1, RZ ?trans2;
IADD3 R17, PT, PT, R0, 0x1, RZ &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR6][R6.64], R17 &rd=0x3 ?trans4;
LDG.E R5, desc[UR6][R4.64] &wr=0x2 ?trans1;
ISETP.NE.AND P0, PT, R14, RZ, PT ?trans1;
IMAD.WIDE R2, R15.reuse, 0x4, R8 &req={1} ?trans1;
IADD3 R15, PT, PT, R15, 0x1, RZ ?WAIT4_END_GROUP;
STG.E desc[UR6][R2.64], R5 &req={2} &rd=0x3 ?trans7;
@P0 BRA 0xce0 ?trans5;
EXIT ?trans5;
BRA 0xdb0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: kernel(int*, int*, int*, int)
_Z6kernelPiS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
s_mov_b32 s3, exec_lo
v_max_i32_e32 v0, 0, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s2, v0
s_cbranch_execz .LBB0_3
s_clause 0x1
s_load_b64 s[8:9], s[0:1], 0x10
s_load_b128 s[4:7], s[0:1], 0x0
v_mul_lo_u32 v0, v1, s2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[4:5], 2, v[0:1]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s8, v4
v_add_co_ci_u32_e32 v1, vcc_lo, s9, v5, vcc_lo
v_add_co_u32 v2, vcc_lo, s6, v4
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v5, vcc_lo
v_add_co_u32 v4, vcc_lo, s4, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
.LBB0_2:
global_load_b32 v6, v[0:1], off
s_add_i32 s2, s2, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lg_u32 s2, 0
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v6, 1, v6
global_store_b32 v[0:1], v6, off
global_load_b32 v6, v[2:3], off
v_add_co_u32 v0, vcc_lo, v0, 4
v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
v_add_co_u32 v2, vcc_lo, v2, 4
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
s_waitcnt vmcnt(0)
global_store_b32 v[4:5], v6, off
v_add_co_u32 v4, vcc_lo, v4, 4
v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
s_cbranch_scc1 .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| kernel | 6,799 | 869 | stackv2-00000-of-00015 |
// Demangled: increment(float*)
Function : _Z9incrementPf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans2;
LDG.E R0, desc[UR4][R2.64] &req={0} &wr=0x2 ?trans2;
FADD R5, R0, 2 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R5 ?trans1;
EXIT ?trans5;
BRA 0x70;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: increment(float*)
_Z9incrementPf:
s_load_b64 s[0:1], s[0:1], 0x0
v_mov_b32_e32 v0, 0
s_waitcnt lgkmcnt(0)
s_load_b32 s2, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
v_add_f32_e64 v1, s2, 2.0
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| increment | 216 | 141 | stackv2-00000-of-00015 |
// Demangled: increment_kernel(int*, int)
Function : _Z16increment_kernelPii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R0, SR_TID.X &wr=0x0 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC R5, c[0x0][0x360] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD R5, R5, UR6, R0 &req={0} ?trans1;
LDCU UR6, c[0x0][0x388] &wr=0x0 ?trans3;
IMAD.WIDE R2, R5, 0x4, R2 &req={2} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R2.64] &req={1} &wr=0x0 ?trans2;
IADD3 R5, PT, PT, R0, UR6, RZ &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R5 ?trans1;
EXIT ?trans5;
BRA 0xd0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: increment_kernel(int*, int)
_Z16increment_kernelPii:
s_load_b32 s2, s[0:1], 0x1c
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s2, 0xffff
s_load_b64 s[2:3], s[0:1], 0x0
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
s_load_b32 s0, s[0:1], 0x8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_load_b32 v2, v[0:1], off
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v2, s0, v2
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| increment_kernel | 375 | 372 | stackv2-00000-of-00015 |
// Demangled: processOnDevice(double*, double*, int)
Function : _Z15processOnDevicePdS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R2, c[0x0][0x390] &wr=0x1 ?trans1;
S2R R4, SR_TID.X &wr=0x2 ?trans1;
S2R R3, SR_TID.Y &wr=0x3 ?trans6;
LDC R5, c[0x0][0x360] &wr=0x2 ?trans8;
S2UR UR4, SR_CTAID.X &wr=0x2 ?trans8;
S2UR UR5, SR_CTAID.Y &wr=0x3 ?trans1;
LEA.HI R0, R2, R2, RZ, 0x1 &req={1} ?WAIT4_END_GROUP;
SHF.R.S32.HI R7, RZ, 0x1, R0 ?WAIT3_END_GROUP;
LDC R6, c[0x0][0x364] &wr=0x3 ?trans1;
IADD3 R9, PT, PT, R7, -0x1, RZ ?WAIT5_END_GROUP;
IMAD R13, R9, R2.reuse, R7 ?trans2;
IMAD R5, R5, UR4, R4 &req={2} ?trans1;
IADD3 R4, PT, PT, R2, -0x1, RZ ?trans1;
IMAD R11, R7, R2.reuse, R9.reuse ?trans2;
IMAD R9, R9, R2, R9 ?trans2;
ISETP.GE.AND P1, PT, R5, R4, PT ?WAIT5_END_GROUP;
ISETP.GT.AND P1, PT, R5, RZ, !P1 ?trans1;
IMAD R6, R6, UR5, R3 &req={3} ?WAIT4_END_GROUP;
IMAD R0, R5, R2, R6 ?trans1;
ISETP.NE.AND P1, PT, R6, RZ, P1 ?WAIT4_END_GROUP;
ISETP.NE.AND P0, PT, R0, R13, PT ?trans1;
ISETP.LT.AND P1, PT, R6, R4, P1 ?WAIT4_END_GROUP;
ISETP.EQ.OR P0, PT, R0, R11, !P0 ?WAIT5_END_GROUP;
ISETP.EQ.OR P0, PT, R0, R9, P0 ?WAIT13_END_GROUP;
@!P0 IMAD R9, R7, R2, R7 ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R0, R9, !P0 ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P1, P0, PT, 0x80, 0x8 ?WAIT13_END_GROUP;
@!P0 EXIT &req={0} ?trans5;
LDC.64 R22, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x380] &wr=0x1 ?trans1;
IMAD R4, R5, R2.reuse, -R2.reuse ?trans2;
HFMA2 R7, -RZ, RZ, 0, 0 ?trans1;
SHF.R.S32.HI R3, RZ, 0x1f, R2 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans1;
SHF.R.S32.HI R5, RZ, 0x1f, R4 ?trans2;
IADD3 R8, PT, PT, R4, R2, R2 ?trans2;
IADD3 R11, PT, PT, R6, R4, RZ ?trans1;
IADD.64 R4, R4, R6 ?WAIT3_END_GROUP;
SHF.R.S32.HI R9, RZ, 0x1f, R8 ?trans2;
LEA R20, P0, R4, UR6, 0x3 &req={1} ?WAIT3_END_GROUP;
IADD.64 R6, R6, R8 ?trans2;
IADD.64 R8, R2, R2 ?trans2;
IMAD.WIDE R22, R11, 0x8, R22 &req={0} ?trans1;
LEA.HI.X R21, R4, UR7, R5, 0x3, P0 ?trans2;
LEA R28, P1, R6, UR6, 0x3 ?trans2;
LEA R24, P2, R8, R22, 0x3 ?trans1;
IMAD.WIDE R2, R2, 0x8, R22 ?trans1;
LEA.HI.X R29, R6, UR7, R7, 0x3, P1 ?trans1;
LDG.E.64 R16, desc[UR4][R22.64] &req={2} &wr=0x2 ?trans1;
LEA.HI.X R25, R8, R23, R9, 0x3, P2 ?WAIT3_END_GROUP;
LDG.E.64 R20, desc[UR4][R20.64+-0x8] &wr=0x2 ?trans4;
LDG.E.64 R18, desc[UR4][R22.64+0x8] &rd=0x0 &wr=0x3 ?trans4;
LDG.E.64 R14, desc[UR4][R2.64+-0x8] &wr=0x4 ?trans4;
LDG.E.64 R12, desc[UR4][R2.64] &wr=0x5 ?trans4;
LDG.E.64 R10, desc[UR4][R2.64+0x8] &wr=0x3 ?trans4;
LDG.E.64 R8, desc[UR4][R28.64+-0x8] &wr=0x3 ?trans4;
LDG.E.64 R6, desc[UR4][R24.64] &wr=0x3 ?trans4;
LDG.E.64 R4, desc[UR4][R24.64+0x8] &wr=0x3 ?trans1;
MUFU.RCP64H R27, 9 &wr=0x0 ?trans1;
MOV.64 R30, 0x4022000000000000 ?WAIT2_END_GROUP;
HFMA2 R26, -RZ, RZ, 0, 5.9604644775390625e-08 ?WAIT6_END_GROUP;
DFMA R22, R26, -R30, 1 &req={0} &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0x940 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, R22, R22, R22 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, R26, R22, R26 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R26, R22, -R30, 1 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R20, R16 &req={2} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R16, R18 &req={3} &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R14, R16, R14 &req={4} &wr=0x5 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, R14, R12 &req={5} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, R12, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, R10, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R6, R8, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R22, R26, R22 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R6, R6, R4 &req={0} &wr=0x0 ?trans2;
FSETP.GEU.AND P1, PT, |R7|, 6.5827683646048100446e-37, PT &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R4, R6, R2 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R4, -9, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R2, R8, R4 &req={0} &wr=0x0 ?trans2;
FFMA R4, RZ, 2.53125, R3 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R4|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA P1, 0x930 ?trans5;
MOV R2, 0x910 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x980 ?trans5;
MOV R2, R12 ?trans1;
MOV R3, R13 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans2;
IMAD.WIDE R4, R0, 0x8, R4 &req={0} ?WAIT5_END_GROUP;
STG.E.64 desc[UR4][R4.64], R2 ?trans1;
EXIT ?trans5;
MOV.64 R4, 0x3ff2000000000000 ?trans2;
HFMA2 R8, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
BSSY.RECONVERGENT B1, 0x1050 ?trans1;
HFMA2 R17, -RZ, RZ, 0.0045166015625, 0 ?trans1;
MUFU.RCP64H R9, R5 &wr=0x0 ?trans1;
HFMA2 R19, -RZ, RZ, 2.0625, 0 ?WAIT5_END_GROUP;
IADD3 R20, PT, PT, R19, -0x1, RZ ?trans1;
DFMA R10, R8, -R4, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R10, R10, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R8, R10, R8 &req={0} &rd=0x0 ?trans2;
MOV R11, R7 &req={0} ?trans1;
MOV R10, R6 ?WAIT4_END_GROUP;
LOP3.LUT R3, R11.reuse, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
FSETP.GEU.AND P1, PT, |R11|, 1.469367938527859385e-39, PT ?trans1;
MOV R6, R10 ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P0, PT, R3, 0x40200000, PT ?trans1;
MOV R16, R3 ?WAIT4_END_GROUP;
SEL R17, R17, 0x63400000, !P0 ?WAIT5_END_GROUP;
@!P1 LOP3.LUT R8, R17.reuse, 0x80000000, R11.reuse, 0xf8, !PT ?trans2;
LOP3.LUT R7, R17, 0x800fffff, R11, 0xf8, !PT ?trans2;
@!P1 LOP3.LUT R9, R8, 0x100000, RZ, 0xfc, !PT ?trans1;
@!P1 MOV R8, RZ ?WAIT15_END_GROUP;
NOP ?WAIT7_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 DFMA R6, R6, 2, -R8 &wr=0x0 ?trans2;
@!P1 LOP3.LUT R16, R7, 0x7ff00000, RZ, 0xc0, !PT &req={0} ?WAIT4_END_GROUP;
IADD3 R18, PT, PT, R16, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R18, 0x7feffffe, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R20, 0x7feffffe, P0 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, -R4, 1 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R14, R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R14, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R8, -R4, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R14, R12, R8 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0xf40 &req={1,0} ?trans5;
IADD3 R3, PT, PT, R3, -0x40200000, RZ ?WAIT5_END_GROUP;
VIMNMX.S32 R3, R3, -0x46a00000, !PT ?WAIT5_END_GROUP;
VIMNMX.S32 R10, R3, 0x46a00000, PT ?WAIT5_END_GROUP;
IADD3 R17, PT, PT, -R17, R10, RZ ?trans1;
MOV R10, RZ ?WAIT3_END_GROUP;
IADD3 R11, PT, PT, R17, 0x7fe00000, RZ ?WAIT6_END_GROUP;
DMUL R12, R8, R10 &wr=0x0 ?trans2;
FSETP.GTU.AND P0, PT, |R13|, 1.469367938527859385e-39, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x1040 ?trans5;
DFMA R4, R8, -R4, R6 &wr=0x0 ?trans1;
MOV R10, RZ ?trans1;
FSETP.NEU.AND P0, PT, R5.reuse, RZ, PT &req={0} ?trans1;
LOP3.LUT R3, R5, 0x40220000, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R11, R3, R11, RZ, 0xfc, !PT ?WAIT4_END_GROUP;
@!P0 BRA 0x1040 ?trans5;
IADD3 R5, PT, PT, -R17.reuse, RZ, RZ ?trans1;
MOV R4, RZ ?trans1;
IADD3 R17, PT, PT, -R17, -0x43300000, RZ ?WAIT5_END_GROUP;
DFMA R4, R12, -R4, R8 &wr=0x0 ?trans2;
FSETP.NEU.AND P0, PT, |R5|, R17, PT &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL.RP R8, R8, R10 &wr=0x0 ?trans2;
LOP3.LUT R3, R9, R3, RZ, 0x3c, !PT &req={0} ?trans1;
FSEL R12, R8, R12, !P0 ?WAIT4_END_GROUP;
FSEL R13, R3, R13, !P0 ?trans1;
BRA 0x1040 ?trans6;
DSETP.NAN.AND P0, PT, R10, R10, PT &wr=0x0 ?trans2;
@P0 BRA 0x1020 &req={0} ?trans5;
ISETP.NE.AND P0, PT, R16, R19, PT ?trans1;
MOV.64 R12, 0xfff8000000000000 ?WAIT12_END_GROUP;
@!P0 BRA 0x1040 ?trans5;
ISETP.NE.AND P0, PT, R16, 0x7ff00000, PT ?trans1;
LOP3.LUT R10, R11, 0x40220000, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
ISETP.EQ.OR P0, PT, R19, RZ, !P0 ?trans1;
LOP3.LUT R13, R10, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@P0 LOP3.LUT R3, R13, 0x7ff00000, RZ, 0xfc, !PT ?trans1;
@!P0 MOV R12, RZ ?trans1;
@P0 MOV R12, RZ ?WAIT3_END_GROUP;
@P0 MOV R13, R3 ?trans1;
BRA 0x1040 ?trans6;
LOP3.LUT R13, R11, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R12, R10 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R2 0x0 ?trans5;
BRA 0x1070;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: processOnDevice(double*, double*, int)
_Z15processOnDevicePdS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s4, s[0:1], 0x10
v_and_b32_e32 v1, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s2, 0xffff
s_lshr_b32 s2, s2, 16
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, s14, s3, v[1:2]
v_bfe_u32 v3, v0, 10, 10
v_mad_u64_u32 v[0:1], null, s15, s2, v[3:4]
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mul_lo_u32 v3, v2, s4
s_lshr_b32 s2, s4, 31
s_add_i32 s2, s4, s2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_ashr_i32 s5, s2, 1
s_add_i32 s2, s5, -1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_add_nc_u32_e32 v1, v3, v0
s_mul_i32 s7, s2, s4
s_add_i32 s3, s7, s2
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmp_ne_u32_e32 vcc_lo, s3, v1
s_mov_b32 s3, -1
s_and_saveexec_b32 s6, vcc_lo
s_mul_i32 s3, s5, s4
s_add_i32 s7, s7, s5
s_add_i32 s2, s3, s2
v_cmp_eq_u32_e32 vcc_lo, s7, v1
v_cmp_eq_u32_e64 s2, s2, v1
s_add_i32 s3, s3, s5
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_eq_u32_e64 s3, s3, v1
s_or_b32 s2, s2, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
s_or_b32 s2, s2, s3
s_delay_alu instid0(SALU_CYCLE_1)
s_or_not1_b32 s3, s2, exec_lo
s_or_b32 exec_lo, exec_lo, s6
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s2, exec_lo
v_cmpx_lt_i32_e32 0, v2
s_cbranch_execz .LBB0_5
v_max_i32_e32 v2, v2, v0
s_add_i32 s2, s4, -1
v_cmp_gt_i32_e32 vcc_lo, 1, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_le_i32_e64 s2, s2, v2
s_or_b32 s2, s2, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_or_b32 s2, s2, s3
s_xor_b32 s2, s2, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 exec_lo, exec_lo, s2
s_cbranch_execz .LBB0_5
v_subrev_nc_u32_e32 v13, s4, v3
s_load_b128 s[0:3], s[0:1], 0x0
v_ashrrev_i32_e32 v14, 31, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
v_ashrrev_i32_e32 v3, 31, v13
v_add_nc_u32_e32 v2, v13, v0
v_add_co_u32 v4, vcc_lo, v13, v0
v_lshl_add_u32 v13, s4, 1, v13
v_add_co_ci_u32_e32 v5, vcc_lo, v3, v14, vcc_lo
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[4:5], 3, v[4:5]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 3, v[2:3]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, vcc_lo, s0, v4
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
v_add_co_u32 v2, vcc_lo, s0, v2
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
s_clause 0x1
global_load_b64 v[15:16], v[4:5], off offset:-8
global_load_b128 v[3:6], v[2:3], off
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[1:2], 3, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v11, vcc_lo, s0, v1
v_add_co_ci_u32_e32 v12, vcc_lo, s1, v2, vcc_lo
s_clause 0x1
global_load_b128 v[7:10], v[11:12], off offset:-8
global_load_b64 v[17:18], v[11:12], off offset:8
v_ashrrev_i32_e32 v12, 31, v13
v_add_co_u32 v11, vcc_lo, v13, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v12, vcc_lo, v12, v14, vcc_lo
v_lshlrev_b64 v[11:12], 3, v[11:12]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v11, vcc_lo, s0, v11
v_add_co_ci_u32_e32 v12, vcc_lo, s1, v12, vcc_lo
global_load_b64 v[19:20], v[11:12], off offset:-8
v_add_nc_u32_e32 v11, v13, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v12, 31, v11
v_lshlrev_b64 v[11:12], 3, v[11:12]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v11, vcc_lo, s0, v11
v_add_co_ci_u32_e32 v12, vcc_lo, s1, v12, vcc_lo
global_load_b128 v[11:14], v[11:12], off
s_waitcnt vmcnt(4)
v_add_f64 v[3:4], v[15:16], v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_f64 v[3:4], v[3:4], v[5:6]
s_waitcnt vmcnt(3)
v_add_f64 v[3:4], v[3:4], v[7:8]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_f64 v[3:4], v[3:4], v[9:10]
s_waitcnt vmcnt(2)
v_add_f64 v[3:4], v[3:4], v[17:18]
s_waitcnt vmcnt(1)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_f64 v[3:4], v[3:4], v[19:20]
s_waitcnt vmcnt(0)
v_add_f64 v[3:4], v[3:4], v[11:12]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[3:4], v[3:4], v[13:14]
v_div_scale_f64 v[5:6], null, 0x40220000, 0x40220000, v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f64_e32 v[7:8], v[5:6]
s_waitcnt_depctr 0xfff
v_fma_f64 v[9:10], -v[5:6], v[7:8], 1.0
v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[9:10], -v[5:6], v[7:8], 1.0
v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8]
v_div_scale_f64 v[9:10], vcc_lo, v[3:4], 0x40220000, v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[11:12], v[9:10], v[7:8]
v_fma_f64 v[5:6], -v[5:6], v[11:12], v[9:10]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_div_fmas_f64 v[5:6], v[5:6], v[7:8], v[11:12]
v_add_co_u32 v0, vcc_lo, s2, v1
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v2, vcc_lo
v_div_fixup_f64 v[3:4], v[5:6], 0x40220000, v[3:4]
global_store_b64 v[0:1], v[3:4], off
.LBB0_5:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| processOnDevice | 5,392 | 3,211 | stackv2-00000-of-00015 |
// Demangled: conv_bnorm_bwd_data_batch_kernel(float const*, int, int, int, float const*, float const*, float const*, float const*, float const*, float, float*)
Function : _Z32conv_bnorm_bwd_data_batch_kernelPKfiiiS0_S0_S0_S0_S0_fPf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC.64 R8, c[0x0][0x388] &wr=0x1 ?trans1;
S2R R11, SR_TID.X &wr=0x2 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x2 ?trans8;
LDC R12, c[0x0][0x360] &wr=0x2 ?trans1;
IMAD.SHL.U32 R5, R9, 0x20, RZ &req={1} ?trans1;
IADD3 R0, PT, PT, R8, 0x1ff, RZ ?WAIT4_END_GROUP;
IABS R10, R5.reuse ?trans2;
SHF.R.S32.HI R3, RZ, 0x1f, R0 ?trans2;
I2F.RP R2, R10 &wr=0x1 ?trans1;
IABS R15, R5 ?trans2;
LEA.HI R0, R3, R0, RZ, 0x9 ?WAIT4_END_GROUP;
SHF.R.S32.HI R0, RZ, 0x9, R0 ?trans1;
IMAD R3, R12, UR4, R11 &req={2} ?trans1;
LDCU UR4, c[0x0][0x390] &wr=0x2 ?trans2;
IABS R4, R0 ?trans1;
MUFU.RCP R2, R2 &req={1} &wr=0x1 ?trans3;
I2F.RP R14, R4 &wr=0x3 ?trans1;
IADD3 R6, PT, PT, R2, 0xffffffe, RZ &req={1} ?trans1;
IMAD R2, R0, R5, RZ ?WAIT3_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R7, R6 &rd=0x1 &wr=0x4 ?trans2;
IABS R16, R2 ?trans1;
MUFU.RCP R14, R14 &req={3} &wr=0x3 ?trans1;
HFMA2 R6, -RZ, RZ, 0, 0 &req={1} ?trans1;
IADD3 R13, PT, PT, RZ, -R7, RZ &req={4} ?WAIT5_END_GROUP;
IMAD R11, R13, R10, RZ ?trans1;
IABS R13, R3 ?WAIT3_END_GROUP;
IMAD.HI.U32 R12, R7, R11, R6 ?trans1;
IADD3 R11, PT, PT, RZ, -R15, RZ ?trans1;
MOV R6, R16 ?trans1;
MOV R7, R13 ?WAIT3_END_GROUP;
I2F.RP R15, R6 &wr=0x1 ?trans1;
MOV R13, R11 ?trans1;
IMAD.HI.U32 R12, R12, R7, RZ ?trans1;
IADD3 R11, PT, PT, R14, 0xffffffe, RZ &req={3} ?WAIT3_END_GROUP;
IMAD R13, R12, R13, R7 ?WAIT3_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R11, R11 ?trans2;
ISETP.GT.U32.AND P1, PT, R10, R13, PT ?trans1;
MUFU.RCP R15, R15 &req={1} &wr=0x1 ?WAIT12_END_GROUP;
@!P1 IADD3 R13, PT, PT, R13, -R10, RZ ?trans2;
@!P1 IADD3 R12, PT, PT, R12, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P0, PT, R13, R10, PT ?trans1;
LOP3.LUT R10, R3, R5, RZ, 0x3c, !PT ?trans2;
IADD3 R13, PT, PT, R15, 0xffffffe, RZ &req={1} ?WAIT3_END_GROUP;
ISETP.GE.AND P1, PT, R10, RZ, PT ?trans1;
IADD3 R15, PT, PT, RZ, -R11, RZ ?trans1;
HFMA2 R10, -RZ, RZ, 0, 0 ?trans1;
F2I.FTZ.U32.TRUNC.NTZ R13, R13 &wr=0x1 ?trans4;
@P0 IADD3 R12, PT, PT, R12, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R5, RZ, PT ?trans1;
IMAD R15, R15, R4, RZ ?WAIT3_END_GROUP;
MOV R14, R12 ?trans1;
IMAD.HI.U32 R10, R11, R15, R10 ?trans1;
IABS R15, R0 ?trans1;
MOV R12, RZ ?trans2;
@!P1 IADD3 R14, PT, PT, -R14, RZ, RZ ?trans2;
IADD3 R15, PT, PT, RZ, -R15, RZ ?trans2;
IADD3 R17, PT, PT, RZ, -R13, RZ &req={1} ?trans2;
@!P0 LOP3.LUT R14, RZ, R5, RZ, 0x33, !PT ?WAIT3_END_GROUP;
IMAD R5, R17, R6, RZ ?trans1;
IABS R11, R14 ?WAIT3_END_GROUP;
IMAD.HI.U32 R12, R13, R5, R12 ?trans1;
IADD3 R13, PT, PT, RZ, -R16, RZ ?trans1;
MOV R5, R11 ?trans1;
MOV R11, R15 ?WAIT3_END_GROUP;
IMAD.HI.U32 R12, R12, R7, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R10, R10, R5, RZ ?WAIT4_END_GROUP;
IMAD R5, R10, R11, R5 ?trans2;
IMAD R7, R12, R13, R7 ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R4, R5, PT ?trans2;
ISETP.GT.U32.AND P1, PT, R6, R7, PT ?WAIT11_END_GROUP;
@!P0 IADD3 R5, PT, PT, R5, -R4, RZ ?trans1;
ISETP.GE.AND P0, PT, R14, RZ, PT ?trans1;
@!P1 IADD3 R7, PT, PT, R7, -R6.reuse, RZ ?trans2;
@!P1 IADD3 R12, PT, PT, R12, 0x1, RZ ?trans1;
ISETP.GT.U32.AND P2, PT, R4, R5, PT ?trans2;
ISETP.GE.U32.AND P3, PT, R7, R6, PT ?trans1;
LOP3.LUT R6, R3, R2, RZ, 0x3c, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R6, RZ, PT ?WAIT5_END_GROUP;
@!P2 IADD3 R5, PT, PT, R5, -R4, RZ ?trans2;
SHF.R.S32.HI R4, RZ, 0x1f, R3 ?trans2;
@P3 IADD3 R12, PT, PT, R12, 0x1, RZ ?trans1;
ISETP.NE.AND P3, PT, R2, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R0, RZ, PT ?trans1;
LEA.HI R4, R4, R3, RZ, 0x5 ?trans2;
MOV R7, R12 ?trans1;
@!P0 IADD3 R5, PT, PT, -R5, RZ, RZ ?WAIT2_END_GROUP;
LOP3.LUT R6, R4, 0xffffffe0, RZ, 0xc0, !PT ?trans2;
@!P1 IADD3 R7, PT, PT, -R7, RZ, RZ ?trans2;
IADD3 R6, PT, PT, R3, -R6, RZ ?trans2;
@!P3 LOP3.LUT R7, RZ, R2, RZ, 0x33, !PT ?trans2;
@!P2 LOP3.LUT R5, RZ, R0, RZ, 0x33, !PT ?WAIT3_END_GROUP;
ISETP.GE.AND P0, PT, R7, UR4, PT &req={2} ?trans2;
IMAD R3, R5, 0x200, R6 ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R3, R8, P0 ?WAIT5_END_GROUP;
ISETP.LT.OR P0, PT, R9, RZ, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
IABS R13, R9 ?trans1;
UI2FP.F32.S32 UR4, UR4 ?trans1;
SHF.R.S32.HI R4, RZ, 0x5, R4 ?trans2;
I2F.RP R0, R13 &wr=0x0 ?trans1;
I2FP.F32.S32 R8, R8 ?trans2;
IABS R12, R4 ?trans1;
ISETP.GE.AND P1, PT, R4, RZ, PT ?trans1;
MUFU.RCP R0, R0 &req={0} &wr=0x0 ?trans2;
IADD3 R10, PT, PT, R0, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R11, R10 &rd=0x0 &wr=0x1 ?trans2;
MOV R10, RZ &req={0} ?trans1;
IADD3 R2, PT, PT, RZ, -R11, RZ &req={1} ?WAIT5_END_GROUP;
IMAD R15, R2, R13, RZ ?trans1;
MOV R2, R12 ?WAIT3_END_GROUP;
IMAD.HI.U32 R11, R11, R15, R10 ?WAIT6_END_GROUP;
IMAD.HI.U32 R11, R11, R2, RZ ?WAIT5_END_GROUP;
IADD3 R11, PT, PT, -R11, RZ, RZ ?WAIT5_END_GROUP;
IMAD R0, R13.reuse, R11, R2 ?trans2;
FMUL R2, R8, UR4 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans2;
ISETP.GT.U32.AND P0, PT, R13, R0, PT ?trans2;
IADD3 R4, PT, PT, R2, 0x1800000, RZ ?WAIT4_END_GROUP;
LOP3.LUT R4, R4, 0x7f800000, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P2, PT, R4, 0x1ffffff, PT ?trans2;
@!P0 IADD3 R0, PT, PT, R0, -R13, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R13, R0, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R0, PT, PT, R0, -R13, RZ ?trans1;
ISETP.NE.AND P0, PT, R9, RZ, PT ?WAIT4_END_GROUP;
MOV R8, R0 ?WAIT5_END_GROUP;
@!P1 IADD3 R8, PT, PT, -R8, RZ, RZ ?WAIT4_END_GROUP;
@!P0 LOP3.LUT R8, RZ, R9, RZ, 0x33, !PT ?trans1;
@P2 BRA 0x860 &req={0} ?trans6;
MOV R0, R2 ?trans1;
MOV R2, 0x840 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xfd0 ?trans5;
MOV R9, R4 ?trans1;
BRA 0x8a0 ?trans6;
MUFU.RCP R9, R2 &wr=0x0 ?trans2;
FFMA R0, R2, R9, -1 &req={0} ?WAIT4_END_GROUP;
FADD.FTZ R0, -R0, -RZ ?WAIT4_END_GROUP;
FFMA R9, R9, R0, R9 ?WAIT7_END_GROUP;
LDC R0, c[0x0][0x388] &wr=0x0 ?trans8;
LDC R2, c[0x0][0x390] &wr=0x1 ?trans1;
IADD3 R0, PT, PT, R0, -0x1, RZ &req={0} ?WAIT4_END_GROUP;
I2FP.F32.S32 R0, R0 ?trans2;
IADD3 R2, PT, PT, R2, -0x1, RZ &req={1} ?WAIT4_END_GROUP;
I2FP.F32.S32 R11, R2 ?WAIT5_END_GROUP;
FMUL R0, R0, R11 ?WAIT5_END_GROUP;
IADD3 R2, PT, PT, R0, 0x1800000, RZ ?WAIT4_END_GROUP;
LOP3.LUT R2, R2, 0x7f800000, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R2, 0x1ffffff, PT ?WAIT13_END_GROUP;
@P0 BRA 0x990 ?trans5;
MOV R2, 0x970 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xfd0 ?trans5;
MOV R10, R4 ?trans1;
BRA 0x9d0 ?trans6;
MUFU.RCP R11, R0 &wr=0x0 ?trans2;
FFMA R2, R0, R11, -1 &req={0} ?WAIT4_END_GROUP;
FADD.FTZ R2, -R2, -RZ ?WAIT4_END_GROUP;
FFMA R10, R11, R2, R11 ?WAIT7_END_GROUP;
LDC.64 R16, c[0x0][0x3b0] &wr=0x0 ?trans1;
LDCU UR6, c[0x0][0x3c0] &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x388] &wr=0x2 ?trans6;
LDC.64 R18, c[0x0][0x3b8] &wr=0x3 ?trans8;
LDC.64 R14, c[0x0][0x3a8] &wr=0x4 ?trans1;
IMAD.WIDE R16, R8, 0x4, R16 &req={0} ?WAIT7_END_GROUP;
LDC.64 R12, c[0x0][0x3a0] &wr=0x0 ?trans1;
LDG.E R16, desc[UR4][R16.64] &wr=0x1 ?trans1;
IMAD.WIDE R18, R8, 0x4, R18 &req={3} ?WAIT6_END_GROUP;
LDG.E R18, desc[UR4][R18.64] &wr=0x3 ?trans1;
IMAD.WIDE R14, R8, 0x4, R14 &req={4} ?WAIT6_END_GROUP;
LDG.E R14, desc[UR4][R14.64] &wr=0x4 ?trans1;
IADD3 R2, PT, PT, R3.reuse, 0x200, RZ ?trans2;
IADD3 R11, PT, PT, R3, 0x20, RZ ?WAIT3_END_GROUP;
VIMNMX.S32 R2, R2, UR8, PT &req={2} ?trans1;
IMAD.WIDE R12, R8, 0x4, R12 &req={0} ?trans1;
LOP3.LUT R4, RZ, R6, RZ, 0x33, !PT ?WAIT3_END_GROUP;
VIMNMX.S32 R11, R2, R11, !PT ?trans1;
LDG.E R0, desc[UR4][R12.64] &rd=0x0 &wr=0x5 ?trans4;
IADD3 R12, PT, PT, R11, R4, RZ &req={0} ?WAIT4_END_GROUP;
LEA.HI R11, R12, 0x1, RZ, 0x1b ?WAIT4_END_GROUP;
LOP3.LUT P1, R20, R11, 0x3, RZ, 0xc0, !PT ?trans1;
IMAD R12, R5, -0x200, R12 ?trans1;
BSSY.RECONVERGENT B0, 0xd50 ?trans1;
IMAD R11, R7, UR9, R8 ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P2, PT, R12, 0x60, PT ?trans1;
FADD R16, R16, UR6 &req={1} ?WAIT5_END_GROUP;
FSETP.GEU.AND P0, PT, |R16|, 1.175494350822287508e-38, PT ?WAIT13_END_GROUP;
@!P0 FMUL R16, R16, 16777216 ?WAIT4_END_GROUP;
MUFU.RSQ R4, R16 &wr=0x0 ?trans1;
FADD R13, R18, R18 &req={3} ?trans1;
FMUL R7, R14, R9 &req={4} ?WAIT3_END_GROUP;
FMUL R8, R13, R10 ?trans1;
@!P0 FMUL R4, R4, 4096 &req={0} ?trans1;
@!P1 BRA 0xd40 ?trans6;
LDC.64 R12, c[0x0][0x3c8] &wr=0x0 ?trans1;
IMAD R6, R11, UR8, R6 ?trans2;
IMAD R3, R20.reuse, 0x20, R3 ?trans2;
IMAD R5, R5, 0x200, R6 ?trans1;
IADD3 R6, PT, PT, -R20, RZ, RZ ?trans2;
LDC.64 R14, c[0x0][0x380] &wr=0x1 ?trans8;
LDC.64 R16, c[0x0][0x398] &wr=0x2 ?trans2;
IMAD.WIDE R20, R5, 0x4, R14 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R22, R5.reuse, 0x4, R16 &req={2} ?trans2;
LDG.E R21, desc[UR4][R20.64] &wr=0x2 ?trans4;
LDG.E R22, desc[UR4][R22.64] &req={3} &wr=0x3 ?trans1;
IMAD.WIDE R18, R5.reuse, 0x4, R12 &req={0} ?trans1;
IADD3 R6, PT, PT, R6, 0x1, RZ ?trans2;
IADD3 R5, PT, PT, R5, 0x20, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R6, RZ, PT ?trans1;
FADD R10, -R0, R21 &req={5,2} ?trans1;
FFMA R9, R4, R22, R7 &req={3} ?WAIT4_END_GROUP;
FFMA R9, R8, R10, R9 ?WAIT5_END_GROUP;
STG.E desc[UR4][R18.64], R9 &rd=0x3 ?trans2;
@P0 BRA 0xc70 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
@!P2 EXIT ?trans5;
LDC.64 R12, c[0x0][0x398] &wr=0x0 ?trans1;
IMAD R5, R11, UR8, R3 ?WAIT7_END_GROUP;
LDC.64 R14, c[0x0][0x380] &wr=0x1 ?trans8;
LDC.64 R16, c[0x0][0x3c8] &wr=0x2 ?trans1;
IADD.64 R12, R12, 0x100 &req={0} ?trans2;
IADD.64 R14, R14, 0x100 &req={1} ?WAIT2_END_GROUP;
IADD.64 R16, R16, 0x100 &req={2} ?WAIT8_END_GROUP;
IMAD.WIDE R18, R5, 0x4, R12 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE R10, R5.reuse, 0x4, R14 ?trans1;
LDG.E R6, desc[UR4][R18.64+-0x100] &wr=0x2 ?trans4;
LDG.E R21, desc[UR4][R10.64+-0x100] &req={1} &wr=0x3 ?trans1;
FFMA R9, R4, R6, R7 &req={2} ?trans1;
FADD R6, -R0, R21 &req={5,3} ?trans1;
IMAD.WIDE R20, R5, 0x4, R16 ?WAIT4_END_GROUP;
FFMA R9, R8, R6, R9 ?WAIT5_END_GROUP;
STG.E desc[UR4][R20.64+-0x100], R9 &rd=0x0 ?trans4;
LDG.E R6, desc[UR4][R18.64+-0x80] &wr=0x2 ?trans4;
LDG.E R25, desc[UR4][R10.64+-0x80] &wr=0x3 ?trans1;
FFMA R23, R4, R6, R7 &req={2} ?trans1;
FADD R25, -R0, R25 &req={3} ?WAIT4_END_GROUP;
FFMA R23, R8, R25, R23 ?WAIT5_END_GROUP;
STG.E desc[UR4][R20.64+-0x80], R23 &rd=0x1 ?trans4;
LDG.E R6, desc[UR4][R18.64] &wr=0x2 ?trans4;
LDG.E R27, desc[UR4][R10.64] &wr=0x3 ?trans1;
FFMA R25, R4, R6, R7 &req={2} ?trans1;
FADD R27, -R0, R27 &req={3} ?WAIT4_END_GROUP;
FFMA R25, R8, R27, R25 ?WAIT5_END_GROUP;
STG.E desc[UR4][R20.64], R25 &rd=0x1 ?trans4;
LDG.E R6, desc[UR4][R18.64+0x80] &wr=0x0 ?trans4;
LDG.E R27, desc[UR4][R10.64+0x80] &wr=0x2 ?trans1;
IADD3 R3, PT, PT, R3, 0x80, RZ ?trans2;
IADD3 R5, PT, PT, R5, 0x80, RZ ?WAIT3_END_GROUP;
ISETP.GE.AND P0, PT, R3, R2, PT ?trans1;
FFMA R9, R4, R6, R7 &req={0} ?trans1;
FADD R27, -R0, R27 &req={2} ?WAIT4_END_GROUP;
FFMA R9, R8, R27, R9 ?WAIT5_END_GROUP;
STG.E desc[UR4][R20.64+0x80], R9 &rd=0x1 ?trans2;
@!P0 BRA 0xdd0 ?trans5;
EXIT ?trans5;
IMAD.SHL.U32 R4, R0, 0x2, RZ ?WAIT5_END_GROUP;
SHF.R.U32.HI R14, RZ, 0x18, R4 ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P0, PT, R14, RZ, PT ?WAIT13_END_GROUP;
@P0 BRA 0x10c0 ?trans5;
IMAD.SHL.U32 R4, R0, 0x2, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R4, RZ, PT ?WAIT13_END_GROUP;
@!P0 MUFU.RCP R4, R0 &rd=0x2 &wr=0x3 ?trans1;
@!P0 BRA 0x12e0 ?trans5;
FFMA R10, R0, 1.84467440737095516160e+19, RZ ?WAIT4_END_GROUP;
MUFU.RCP R11, R10 &wr=0x0 ?trans2;
FFMA R0, R10, R11, -1 &req={2,0} ?WAIT4_END_GROUP;
FADD.FTZ R0, -R0, -RZ ?WAIT4_END_GROUP;
FFMA R0, R11, R0, R11 ?WAIT4_END_GROUP;
FFMA R4, R0, 1.84467440737095516160e+19, RZ &req={3} ?trans1;
BRA 0x12e0 ?trans6;
IADD3 R15, PT, PT, R14, -0xfd, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R15, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x12d0 ?trans5;
LOP3.LUT R4, R0, 0x7fffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R4, R4, 0x3f800000, RZ, 0xfc, !PT ?WAIT4_END_GROUP;
MUFU.RCP R11, R4 &wr=0x0 ?trans2;
FFMA R10, R4, R11, -1 &req={0} ?WAIT4_END_GROUP;
FADD.FTZ R10, -R10, -RZ ?WAIT4_END_GROUP;
FFMA.RM R12, R11.reuse, R10.reuse, R11.reuse ?trans1;
FFMA.RP R11, R11, R10, R11 ?trans1;
HFMA2 R10, -RZ, RZ, 0, 1.78813934326171875e-07 ?WAIT4_END_GROUP;
FSETP.NEU.FTZ.AND P0, PT, R12.reuse, R11, PT ?trans1;
LOP3.LUT R12, R12, 0x7fffff, RZ, 0xc0, !PT ?trans2;
SHF.L.U32 R11, R10, R15, RZ ?trans2;
LOP3.LUT R12, R12, 0x800000, RZ, 0xfc, !PT ?trans1;
SEL R10, RZ, 0xffffffff, !P0 ?WAIT3_END_GROUP;
LOP3.LUT R11, R11, R12, RZ, 0xc0, !PT ?trans2;
IADD3 R13, PT, PT, -R10, RZ, RZ ?trans2;
SHF.R.U32.HI R11, RZ, R15.reuse, R11 ?trans2;
LOP3.LUT P1, RZ, R13, R15, R12, 0xf8, !PT ?trans2;
LOP3.LUT P0, RZ, R11.reuse, 0x1, RZ, 0xc0, !PT ?trans2;
LOP3.LUT P2, RZ, R11, 0x2, RZ, 0xc0, !PT ?WAIT2_END_GROUP;
IADD3 R11, PT, PT, R14, -0xfc, RZ ?trans2;
PLOP3.LUT P0, PT, P0, P1, P2, 0xe0, 0x0 ?trans2;
LOP3.LUT P1, RZ, R0, 0x7fffff, RZ, 0xc0, !PT ?trans2;
SHF.R.U32.HI R11, RZ, R11, R12 ?trans1;
SEL R4, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
IADD3 R4, PT, PT, -R4, RZ, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R4, RZ, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R11, PT, PT, R11, 0x1, RZ ?WAIT5_END_GROUP;
@!P1 IMAD.SHL.U32 R11, R11, 0x2, RZ ?WAIT5_END_GROUP;
LOP3.LUT R4, R11, 0x80000000, R0, 0xf8, !PT ?trans1;
BRA 0x12e0 ?trans6;
MUFU.RCP R4, R0 &rd=0x0 &wr=0x1 ?trans2;
MOV R10, R2 ?trans1;
MOV R11, 0x0 ?WAIT4_END_GROUP;
RET.REL.NODEC R10 0x0 &req={3,2,1,0} ?trans5;
BRA 0x1310;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: conv_bnorm_bwd_data_batch_kernel(float const*, int, int, int, float const*, float const*, float const*, float const*, float const*, float, float*)
_Z32conv_bnorm_bwd_data_batch_kernelPKfiiiS0_S0_S0_S0_S0_fPf:
s_clause 0x1
s_load_b128 s[16:19], s[0:1], 0x8
s_load_b32 s2, s[0:1], 0x5c
s_waitcnt lgkmcnt(0)
s_lshl_b32 s3, s17, 5
s_bfe_i32 s4, s17, 0x1001a
s_and_b32 s2, s2, 0xffff
s_add_i32 s5, s3, s4
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_xor_b32 s5, s5, s4
v_cvt_f32_u32_e32 v1, s5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v1, v1
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v1, 0x4f7ffffe, v1
v_cvt_u32_f32_e32 v3, v1
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_sub_i32 s2, 0, s5
s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
v_mul_lo_u32 v0, s2, v3
s_add_i32 s2, s16, 0x1ff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
s_ashr_i32 s6, s2, 31
v_ashrrev_i32_e32 v4, 31, v1
s_lshr_b32 s6, s6, 23
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
s_add_i32 s2, s2, s6
v_mul_hi_u32 v0, v3, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_nc_u32_e32 v2, v1, v4
s_ashr_i32 s6, s2, 9
s_ashr_i32 s2, s2, 31
s_mul_i32 s3, s3, s6
s_add_i32 s7, s6, s2
v_xor_b32_e32 v2, v2, v4
s_xor_b32 s2, s7, s2
v_add_nc_u32_e32 v0, v3, v0
v_cvt_f32_u32_e32 v5, s2
s_ashr_i32 s6, s3, 31
v_xor_b32_e32 v8, s4, v4
s_add_i32 s3, s3, s6
v_mul_hi_u32 v0, v2, v0
v_rcp_iflag_f32_e32 v5, v5
s_xor_b32 s3, s3, s6
s_sub_i32 s4, 0, s2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_mul_lo_u32 v3, v0, s5
s_waitcnt_depctr 0xfff
v_dual_mul_f32 v5, 0x4f7ffffe, v5 :: v_dual_add_nc_u32 v6, 1, v0
v_sub_nc_u32_e32 v3, v2, v3
v_cmp_le_u32_e32 vcc_lo, s5, v3
v_subrev_nc_u32_e32 v7, s5, v3
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_cndmask_b32_e32 v0, v0, v6, vcc_lo
v_cvt_f32_u32_e32 v6, s3
v_cndmask_b32_e32 v3, v3, v7, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v7, 1, v0
v_rcp_iflag_f32_e32 v6, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_cmp_le_u32_e32 vcc_lo, s5, v3
v_cvt_u32_f32_e32 v3, v5
s_waitcnt_depctr 0xfff
v_dual_cndmask_b32 v0, v0, v7 :: v_dual_mul_f32 v5, 0x4f7ffffe, v6
v_mul_lo_u32 v6, s4, v3
v_xor_b32_e32 v0, v0, v8
s_sub_i32 s4, 0, s3
s_cmp_gt_i32 s17, -1
v_cvt_u32_f32_e32 v5, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_sub_nc_u32_e32 v0, v0, v8
v_mul_hi_u32 v6, v3, v6
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_mul_lo_u32 v8, s4, v5
s_cselect_b32 s4, -1, 0
v_ashrrev_i32_e32 v7, 31, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v3, v3, v6
v_mul_hi_u32 v6, v5, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v5, v5, v6
v_mul_hi_u32 v5, v2, v5
v_add_nc_u32_e32 v0, v0, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v0, v0, v7
v_mul_hi_u32 v3, v0, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v3, v3, s2
v_sub_nc_u32_e32 v0, v0, v3
v_mul_lo_u32 v3, v5, s3
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_subrev_nc_u32_e32 v6, s2, v0
v_cmp_le_u32_e32 vcc_lo, s2, v0
v_sub_nc_u32_e32 v3, v2, v3
v_add_nc_u32_e32 v2, 1, v5
s_delay_alu instid0(VALU_DEP_4)
v_cndmask_b32_e32 v0, v0, v6, vcc_lo
v_lshrrev_b32_e32 v6, 27, v4
v_xor_b32_e32 v4, s6, v4
v_subrev_nc_u32_e32 v8, s3, v3
v_cmp_le_u32_e32 vcc_lo, s3, v3
v_subrev_nc_u32_e32 v9, s2, v0
v_cmp_le_u32_e64 s2, s2, v0
v_cndmask_b32_e32 v5, v5, v2, vcc_lo
v_dual_cndmask_b32 v3, v3, v8 :: v_dual_add_nc_u32 v2, v1, v6
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cndmask_b32_e64 v0, v0, v9, s2
v_add_nc_u32_e32 v6, 1, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_cmp_le_u32_e32 vcc_lo, s3, v3
v_and_b32_e32 v8, 0xffffffe0, v2
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_xor_b32_e32 v0, v0, v7
s_mov_b32 s3, 0
v_cndmask_b32_e32 v3, v5, v6, vcc_lo
v_sub_nc_u32_e32 v1, v1, v8
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_sub_nc_u32_e32 v0, v0, v7
v_xor_b32_e32 v3, v3, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshl_add_u32 v0, v0, 9, v1
v_sub_nc_u32_e32 v1, v3, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_gt_i32_e32 vcc_lo, s16, v0
v_cmp_gt_i32_e64 s2, s18, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, vcc_lo, s2
s_and_b32 s2, s2, s4
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s4, s2
s_cbranch_execz .LBB5_3
s_ashr_i32 s2, s17, 31
v_ashrrev_i32_e32 v2, 5, v2
s_add_i32 s4, s17, s2
s_load_b64 s[12:13], s[0:1], 0x38
s_xor_b32 s2, s4, s2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v5, 31, v2
v_cvt_f32_u32_e32 v3, s2
s_sub_i32 s4, 0, s2
v_add_nc_u32_e32 v2, v2, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v3, v3
v_xor_b32_e32 v2, v2, v5
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v3, 0x4f7ffffe, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_u32_f32_e32 v3, v3
v_mul_lo_u32 v4, s4, v3
s_load_b256 s[4:11], s[0:1], 0x18
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v4, v3, v4
v_add_nc_u32_e32 v3, v3, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v3, v2, v3
v_mul_lo_u32 v3, v3, s2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v2, v2, v3
v_subrev_nc_u32_e32 v3, s2, v2
v_cmp_le_u32_e32 vcc_lo, s2, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v2, v2, v3, vcc_lo
v_subrev_nc_u32_e32 v3, s2, v2
v_cmp_le_u32_e32 vcc_lo, s2, v2
s_add_i32 s2, s16, -1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v2, v2, v3, vcc_lo
v_xor_b32_e32 v2, v2, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v3, v2, v5
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[4:5], 2, v[3:4]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v6, vcc_lo, s10, v4
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, s11, v5, vcc_lo
global_load_b32 v10, v[6:7], off
v_add_co_u32 v6, vcc_lo, s12, v4
v_add_co_ci_u32_e32 v7, vcc_lo, s13, v5, vcc_lo
v_add_co_u32 v8, vcc_lo, s8, v4
v_add_co_ci_u32_e32 v9, vcc_lo, s9, v5, vcc_lo
s_clause 0x1
s_load_b32 s14, s[0:1], 0x40
s_load_b64 s[10:11], s[0:1], 0x48
global_load_b32 v6, v[6:7], off
global_load_b32 v7, v[8:9], off
v_add_co_u32 v4, vcc_lo, s6, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
s_add_i32 s6, s18, -1
v_cvt_f32_i32_e32 v8, s16
v_cvt_f32_i32_e32 v9, s18
global_load_b32 v2, v[4:5], off
v_cvt_f32_i32_e32 v4, s2
v_cvt_f32_i32_e32 v5, s6
s_load_b64 s[6:7], s[0:1], 0x0
v_mul_f32_e32 v8, v8, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f32_e32 v11, v4, v5
v_div_scale_f32 v5, null, v8, v8, 1.0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_div_scale_f32 v4, null, v11, v11, 1.0
v_rcp_f32_e32 v12, v5
v_div_scale_f32 v15, vcc_lo, 1.0, v11, 1.0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_rcp_f32_e32 v9, v4
s_waitcnt_depctr 0xfff
v_fma_f32 v14, -v5, v12, 1.0
v_fma_f32 v13, -v4, v9, 1.0
v_fmac_f32_e32 v9, v13, v9
v_div_scale_f32 v13, s2, 1.0, v8, 1.0
s_waitcnt vmcnt(3) lgkmcnt(0)
v_add_f32_e32 v10, s14, v10
v_fmac_f32_e32 v12, v14, v12
v_mul_f32_e32 v14, v15, v9
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_gt_f32_e64 s0, 0x800000, v10
v_fma_f32 v17, -v4, v14, v15
s_waitcnt vmcnt(2)
v_add_f32_e32 v6, v6, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_dual_fmac_f32 v14, v17, v9 :: v_dual_mul_f32 v17, 0x4b800000, v10
v_mul_f32_e32 v16, v13, v12
v_fma_f32 v4, -v4, v14, v15
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cndmask_b32_e64 v10, v10, v17, s0
v_fma_f32 v18, -v5, v16, v13
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_div_fmas_f32 v9, v4, v9, v14
v_rsq_f32_e32 v10, v10
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_fmac_f32_e32 v16, v18, v12
s_mov_b32 vcc_lo, s2
v_div_fixup_f32 v9, v9, v11, 1.0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v5, -v5, v16, v13
v_mul_f32_e32 v6, v9, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_div_fmas_f32 v12, v5, v12, v16
v_mad_u64_u32 v[4:5], null, v1, s17, v[3:4]
v_add_nc_u32_e32 v1, 0x200, v0
v_div_fixup_f32 v5, v12, v8, 1.0
v_mul_f32_e32 v8, 0x45800000, v10
s_delay_alu instid0(VALU_DEP_3)
v_min_i32_e32 v1, s16, v1
v_mul_lo_u32 v3, v4, s16
s_waitcnt vmcnt(1)
v_mul_f32_e32 v4, v5, v7
v_cndmask_b32_e64 v5, v10, v8, s0
.LBB5_2:
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v7, v3, v0
v_ashrrev_i32_e32 v8, 31, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[7:8], 2, v[7:8]
v_add_co_u32 v9, vcc_lo, s4, v7
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v10, vcc_lo, s5, v8, vcc_lo
v_add_co_u32 v11, vcc_lo, s6, v7
v_add_co_ci_u32_e32 v12, vcc_lo, s7, v8, vcc_lo
v_add_co_u32 v7, s0, s10, v7
global_load_b32 v9, v[9:10], off
global_load_b32 v10, v[11:12], off
v_add_co_ci_u32_e64 v8, s0, s11, v8, s0
s_waitcnt vmcnt(1)
v_fma_f32 v9, v5, v9, v4
s_waitcnt vmcnt(0)
v_sub_f32_e32 v10, v10, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_fmac_f32 v9, v6, v10 :: v_dual_add_nc_u32 v0, 32, v0
v_cmp_ge_i32_e32 vcc_lo, v0, v1
global_store_b32 v[7:8], v9, off
s_or_b32 s3, vcc_lo, s3
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s3
s_cbranch_execnz .LBB5_2
.LBB5_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| conv_bnorm_bwd_data_batch_kernel | 7,720 | 5,816 | stackv2-00000-of-00015 |
// Demangled: conv_diag_affine_white_var_fwd_batch_kernel(float const*, int, int, int, float const*, float const*, float, float*)
Function : _Z43conv_diag_affine_white_var_fwd_batch_kernelPKfiiiS0_S0_fPf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R5, c[0x0][0x388] &wr=0x1 ?trans1;
S2R R6, SR_TID.X &wr=0x2 ?trans7;
LDC R2, c[0x0][0x38c] &wr=0x3 ?trans8;
S2UR UR4, SR_CTAID.X &wr=0x2 ?trans1;
IABS R9, R5 &req={1} ?WAIT7_END_GROUP;
LDC R7, c[0x0][0x360] &wr=0x2 ?trans1;
I2F.RP R0, R9 &wr=0x1 ?trans1;
IMAD R3, R5, R2, RZ &req={3} ?WAIT5_END_GROUP;
IABS R4, R3.reuse ?trans2;
IABS R15, R3 ?trans2;
I2F.RP R8, R4 &wr=0x3 ?trans1;
MUFU.RCP R0, R0 &req={1} &wr=0x1 ?trans1;
MUFU.RCP R8, R8 &req={3} &wr=0x3 ?trans1;
IADD3 R10, PT, PT, R0, 0xffffffe, RZ &req={1} ?trans1;
IMAD R0, R7, UR4, R6 &req={2} ?trans1;
LDCU UR4, c[0x0][0x390] &wr=0x1 ?trans2;
F2I.FTZ.U32.TRUNC.NTZ R11, R10 &rd=0x2 &wr=0x4 ?trans2;
IABS R14, R0 ?WAIT2_END_GROUP;
IADD3 R7, PT, PT, R8, 0xffffffe, RZ &req={3} ?trans2;
IABS R8, R2 ?trans1;
HFMA2 R10, -RZ, RZ, 0, 0 &req={2} ?WAIT3_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R7, R7 &wr=0x2 ?trans1;
IADD3 R12, PT, PT, RZ, -R11, RZ &req={4} ?WAIT5_END_GROUP;
MOV R6, R12 ?WAIT5_END_GROUP;
IMAD R13, R6, R9, RZ ?trans2;
I2F.RP R6, R8 &wr=0x3 ?trans2;
IMAD.HI.U32 R10, R11, R13, R10 ?trans1;
IADD3 R13, PT, PT, RZ, -R7, RZ &req={2} ?WAIT5_END_GROUP;
IMAD.HI.U32 R10, R10, R14, RZ ?WAIT4_END_GROUP;
IMAD R13, R13, R4, RZ ?trans1;
IADD3 R12, PT, PT, -R10, RZ, RZ ?trans1;
MUFU.RCP R11, R6 &req={3} &rd=0x2 &wr=0x3 ?trans4;
IMAD R12, R9, R12, R14 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R9, R12, PT ?trans1;
MOV R6, RZ &req={2} ?WAIT5_END_GROUP;
IMAD.HI.U32 R7, R7, R13, R6 ?trans1;
IADD3 R13, PT, PT, RZ, -R15, RZ ?trans2;
LOP3.LUT R6, R0, R5, RZ, 0x3c, !PT ?trans2;
IADD3 R11, PT, PT, R11, 0xffffffe, RZ &req={3} ?trans2;
@!P0 IADD3 R12, PT, PT, R12, -R9.reuse, RZ ?trans2;
@!P0 IADD3 R10, PT, PT, R10, 0x1, RZ ?trans1;
ISETP.GE.AND P1, PT, R6, RZ, PT ?trans1;
HFMA2 R6, -RZ, RZ, 0, 0 ?trans1;
ISETP.GE.U32.AND P2, PT, R12, R9, PT ?trans1;
IMAD.HI.U32 R9, R7, R14, RZ ?WAIT2_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R7, R11 &wr=0x2 ?trans2;
IMAD R13, R9, R13, R14 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R4, R13, PT ?WAIT3_END_GROUP;
@P2 IADD3 R10, PT, PT, R10, 0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R5, RZ, PT ?trans1;
IADD3 R15, PT, PT, RZ, -R7, RZ &req={2} ?trans2;
@!P1 IADD3 R10, PT, PT, -R10, RZ, RZ ?WAIT6_END_GROUP;
@!P0 IADD3 R13, PT, PT, R13, -R4, RZ ?trans1;
IMAD R11, R15, R8, RZ ?trans1;
@!P0 IADD3 R9, PT, PT, R9, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R3, RZ, PT ?trans1;
@!P2 LOP3.LUT R10, RZ, R5, RZ, 0x33, !PT ?trans1;
IMAD.HI.U32 R6, R7, R11, R6 ?trans1;
ISETP.GE.U32.AND P1, PT, R13, R4, PT ?trans1;
LOP3.LUT R11, R0, R3, RZ, 0x3c, !PT ?trans2;
IABS R4, R10 ?trans2;
LOP3.LUT R5, R2, R5, RZ, 0xfc, !PT ?trans1;
ISETP.GE.AND P2, PT, R11, RZ, PT ?WAIT2_END_GROUP;
MOV R7, R4 ?WAIT5_END_GROUP;
IMAD.HI.U32 R6, R6, R7, RZ ?trans1;
@P1 IADD3 R9, PT, PT, R9, 0x1, RZ ?WAIT4_END_GROUP;
IADD3 R6, PT, PT, -R6, RZ, RZ ?trans2;
@!P2 IADD3 R9, PT, PT, -R9, RZ, RZ ?trans2;
@!P0 LOP3.LUT R9, RZ, R3, RZ, 0x33, !PT ?trans1;
IMAD R7, R8, R6, R7 ?WAIT4_END_GROUP;
ISETP.GE.AND P0, PT, R9, UR4, PT &req={1} ?trans1;
ISETP.GT.U32.AND P1, PT, R8, R7, PT ?WAIT4_END_GROUP;
ISETP.LT.OR P0, PT, R5, RZ, P0 ?WAIT9_END_GROUP;
@!P1 IADD3 R7, PT, PT, R7, -R8, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R8, R7, PT ?trans1;
@P0 EXIT &req={0} ?WAIT12_END_GROUP;
LDC.64 R4, c[0x0][0x3a0] &wr=0x0 ?trans1;
ISETP.GE.AND P2, PT, R10, RZ, PT ?trans1;
ISETP.NE.AND P0, PT, R2, RZ, PT ?trans1;
@!P1 IADD3 R7, PT, PT, R7, -R8, RZ ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans4;
MOV R9, R7 ?trans1;
LDCU UR6, c[0x0][0x3a8] &wr=0x2 ?trans1;
LDC.64 R6, c[0x0][0x380] &wr=0x3 ?trans4;
@!P2 IADD3 R9, PT, PT, -R9, RZ, RZ ?WAIT2_END_GROUP;
@!P0 LOP3.LUT R9, RZ, R2, RZ, 0x33, !PT ?trans2;
LDC.64 R2, c[0x0][0x398] &wr=0x4 ?trans3;
IMAD.WIDE R4, R9, 0x4, R4 &req={0} ?WAIT6_END_GROUP;
LDG.E R4, desc[UR4][R4.64] &req={1} &wr=0x2 ?trans1;
IMAD.WIDE R6, R0, 0x4, R6 &req={3} ?WAIT6_END_GROUP;
LDG.E R7, desc[UR4][R6.64] &wr=0x3 ?trans1;
IMAD.WIDE R2, R9, 0x4, R2 &req={4} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &wr=0x3 ?trans1;
FADD R9, R4, UR6 &req={2} ?trans2;
LDC.64 R4, c[0x0][0x3b0] &wr=0x0 ?trans3;
FSETP.GEU.AND P0, PT, |R9|, 1.175494350822287508e-38, PT ?WAIT13_END_GROUP;
@!P0 FMUL R9, R9, 16777216 ?WAIT4_END_GROUP;
MUFU.RSQ R11, R9 &wr=0x1 ?trans1;
FADD R8, -R2, R7 &req={3} ?trans1;
IMAD.WIDE R4, R0, 0x4, R4 &req={0} ?WAIT4_END_GROUP;
@!P0 FMUL R11, R11, 4096 &req={1} ?WAIT4_END_GROUP;
FMUL R11, R8, R11 ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R11 ?trans1;
EXIT ?trans5;
BRA 0x690;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: conv_diag_affine_white_var_fwd_batch_kernel(float const*, int, int, int, float const*, float const*, float, float*)
_Z43conv_diag_affine_white_var_fwd_batch_kernelPKfiiiS0_S0_fPf:
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x8
s_load_b32 s2, s[0:1], 0x44
s_waitcnt lgkmcnt(0)
s_mul_i32 s3, s5, s4
s_and_b32 s2, s2, 0xffff
s_ashr_i32 s7, s3, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s3, s3, s7
s_xor_b32 s3, s3, s7
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f32_u32_e32 v1, s3
v_rcp_iflag_f32_e32 v1, v1
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v1, 0x4f7ffffe, v1
s_delay_alu instid0(VALU_DEP_1)
v_cvt_u32_f32_e32 v3, v1
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_sub_i32 s2, 0, s3
s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
v_mul_lo_u32 v0, s2, v3
s_or_b32 s2, s5, s4
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
s_cmp_gt_i32 s2, -1
v_ashrrev_i32_e32 v2, 31, v1
s_cselect_b32 s2, -1, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_hi_u32 v4, v3, v0
v_add_nc_u32_e32 v0, v1, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_xor_b32_e32 v0, v0, v2
v_add_nc_u32_e32 v3, v3, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v3, v0, v3
v_mul_lo_u32 v4, v3, s3
v_add_nc_u32_e32 v5, 1, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v4, v0, v4
v_subrev_nc_u32_e32 v6, s3, v4
v_cmp_le_u32_e32 vcc_lo, s3, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_dual_cndmask_b32 v3, v3, v5 :: v_dual_cndmask_b32 v4, v4, v6
v_xor_b32_e32 v6, s7, v2
v_add_nc_u32_e32 v5, 1, v3
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_u32_e32 vcc_lo, s3, v4
v_cndmask_b32_e32 v3, v3, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v3, v3, v6
v_sub_nc_u32_e32 v3, v3, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_i32_e32 vcc_lo, s6, v3
s_and_b32 s2, s2, vcc_lo
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB0_2
s_ashr_i32 s2, s4, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s3, s4, s2
s_xor_b32 s3, s3, s2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cvt_f32_u32_e32 v3, s3
s_sub_i32 s4, 0, s3
v_rcp_iflag_f32_e32 v3, v3
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v3, 0x4f7ffffe, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_u32_f32_e32 v3, v3
v_mul_lo_u32 v4, s4, v3
s_ashr_i32 s4, s5, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s5, s5, s4
s_xor_b32 s4, s5, s4
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_f32_u32_e32 v5, s4
v_mul_hi_u32 v4, v3, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v5, v5
v_add_nc_u32_e32 v3, v3, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_mul_hi_u32 v3, v0, v3
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v5, 0x4f7ffffe, v5
v_mul_lo_u32 v4, v3, s3
v_sub_nc_u32_e32 v0, v0, v4
v_add_nc_u32_e32 v4, 1, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v6, s3, v0
v_cmp_le_u32_e32 vcc_lo, s3, v0
v_dual_cndmask_b32 v3, v3, v4 :: v_dual_cndmask_b32 v0, v0, v6
v_xor_b32_e32 v6, s2, v2
s_sub_i32 s2, 0, s4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v4, 1, v3
v_cmp_le_u32_e32 vcc_lo, s3, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v0, v3, v4, vcc_lo
v_cvt_u32_f32_e32 v3, v5
v_xor_b32_e32 v0, v0, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_lo_u32 v4, s2, v3
s_load_b64 s[2:3], s[0:1], 0x0
v_sub_nc_u32_e32 v0, v0, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_hi_u32 v4, v3, v4
v_ashrrev_i32_e32 v5, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v0, v0, v5
v_add_nc_u32_e32 v3, v3, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v0, v0, v5
v_mul_hi_u32 v3, v0, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v3, v3, s4
v_sub_nc_u32_e32 v0, v0, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v3, s4, v0
v_cmp_le_u32_e32 vcc_lo, s4, v0
v_cndmask_b32_e32 v0, v0, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v3, s4, v0
v_cmp_le_u32_e32 vcc_lo, s4, v0
s_load_b128 s[4:7], s[0:1], 0x18
v_cndmask_b32_e32 v0, v0, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v0, v0, v5
v_sub_nc_u32_e32 v3, v0, v5
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v4, 31, v3
v_lshlrev_b64 v[3:4], 2, v[3:4]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v5, vcc_lo, s6, v3
v_add_co_ci_u32_e32 v6, vcc_lo, s7, v4, vcc_lo
global_load_b32 v7, v[5:6], off
v_add_co_u32 v5, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v6, vcc_lo, s3, v1, vcc_lo
v_add_co_u32 v2, vcc_lo, s4, v3
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v4, vcc_lo
global_load_b32 v4, v[5:6], off
global_load_b32 v2, v[2:3], off
s_clause 0x1
s_load_b32 s2, s[0:1], 0x28
s_load_b64 s[0:1], s[0:1], 0x30
s_waitcnt vmcnt(2) lgkmcnt(0)
v_add_f32_e32 v3, s2, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_mul_f32_e32 v5, 0x4b800000, v3
v_cmp_gt_f32_e32 vcc_lo, 0x800000, v3
s_waitcnt vmcnt(0)
v_dual_cndmask_b32 v3, v3, v5 :: v_dual_sub_f32 v2, v4, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rsq_f32_e32 v3, v3
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v5, 0x45800000, v3
v_cndmask_b32_e32 v3, v3, v5, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_mul_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| conv_diag_affine_white_var_fwd_batch_kernel | 2,700 | 3,456 | stackv2-00000-of-00015 |
// Demangled: estimate_conv_mean_fast2_batch_kernel(float const*, int, int, int, float*)
Function : _Z37estimate_conv_mean_fast2_batch_kernelPKfiiiPf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x2 ?trans1;
LDCU UR6, c[0x0][0x390] &wr=0x3 ?trans1;
BSSY.RECONVERGENT B0, 0xb40 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x4 ?trans4;
S2UR UR4, SR_CTAID.X &wr=0x2 ?trans8;
LDC R11, c[0x0][0x360] &wr=0x2 ?trans1;
IMAD.SHL.U32 R8, R3, 0x20, RZ &req={1} ?trans1;
IADD3 R4, PT, PT, R2, 0x1ff, RZ ?WAIT6_END_GROUP;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
IABS R6, R8.reuse ?trans2;
SHF.R.S32.HI R5, RZ, 0x1f, R4 ?trans2;
I2F.RP R7, R6 &wr=0x5 ?trans1;
IABS R15, R8 ?trans2;
LEA.HI R5, R5, R4, RZ, 0x9 ?trans2;
IADD3 R19, PT, PT, RZ, -R15, RZ ?WAIT2_END_GROUP;
SHF.R.S32.HI R5, RZ, 0x9, R5 ?trans1;
IMAD R4, R11, UR4, R0 &req={2} ?trans1;
UMOV UR4, 0x400 ?trans2;
IABS R10, R5.reuse ?trans1;
IMAD R11, R8, R5, RZ ?trans1;
IABS R14, R4 ?trans1;
MUFU.RCP R7, R7 &req={5} &wr=0x2 ?trans3;
IABS R16, R11 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?trans1;
I2F.RP R9, R10 &wr=0x1 ?trans1;
IADD3 R12, PT, PT, R7, 0xffffffe, RZ &req={2} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R13, R12 &rd=0x2 &wr=0x5 ?trans1;
MUFU.RCP R17, R9 &req={1} &wr=0x1 ?trans1;
HFMA2 R12, -RZ, RZ, 0, 0 &req={2} ?trans1;
IADD3 R7, PT, PT, RZ, -R13, RZ &req={5} ?WAIT5_END_GROUP;
IMAD R7, R7, R6, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R7, R13, R7, R12 ?trans1;
MOV R13, R16 ?trans1;
IABS R12, R3 ?trans2;
IADD3 R17, PT, PT, R17, 0xffffffe, RZ &req={1} ?trans1;
I2F.RP R18, R13 &wr=0x1 ?trans1;
IMAD.HI.U32 R16, R7, R14, RZ ?WAIT4_END_GROUP;
IMAD R9, R16, R19, R14 ?trans1;
I2F.RP R15, R12 &wr=0x2 ?trans4;
ISETP.GT.U32.AND P1, PT, R6, R9, PT ?trans1;
MUFU.RCP R18, R18 &req={1} &wr=0x1 ?WAIT12_END_GROUP;
@!P1 IADD3 R9, PT, PT, R9, -R6, RZ ?trans1;
F2I.FTZ.U32.TRUNC.NTZ R7, R17 &wr=0x5 ?trans1;
@!P1 IADD3 R16, PT, PT, R16, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P0, PT, R9, R6, PT ?trans1;
LOP3.LUT R6, R4, R8, RZ, 0x3c, !PT ?trans1;
MUFU.RCP R15, R15 &req={2} &wr=0x2 ?trans1;
IADD3 R9, PT, PT, R18, 0xffffffe, RZ &req={1} ?WAIT3_END_GROUP;
ISETP.GE.AND P1, PT, R6, RZ, PT ?trans1;
HFMA2 R6, -RZ, RZ, 0, 0 ?trans1;
IABS R18, R5 ?trans2;
IADD3 R17, PT, PT, RZ, -R7, RZ &req={5} ?trans1;
F2I.FTZ.U32.TRUNC.NTZ R9, R9 &wr=0x1 ?trans2;
@P0 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R8, RZ, PT ?trans1;
IMAD R17, R17, R10, RZ ?WAIT4_END_GROUP;
@!P1 IADD3 R16, PT, PT, -R16, RZ, RZ ?trans1;
IMAD.HI.U32 R6, R7, R17, R6 ?trans1;
IADD3 R15, PT, PT, R15, 0xffffffe, RZ &req={2} ?trans2;
SHF.R.S32.HI R17, RZ, 0x1f, R4 ?trans2;
IADD3 R20, PT, PT, RZ, -R9, RZ &req={1} ?trans2;
@!P0 LOP3.LUT R16, RZ, R8, RZ, 0x33, !PT ?trans1;
F2I.FTZ.U32.TRUNC.NTZ R15, R15 &wr=0x1 ?trans1;
MOV R8, RZ ?trans1;
LEA.HI R17, R17, R4, RZ, 0x5 ?trans1;
IMAD R7, R20, R13, RZ ?trans1;
IABS R20, R11 ?WAIT2_END_GROUP;
IABS R19, R16 ?trans1;
IMAD.HI.U32 R9, R9, R7, R8 ?trans1;
IADD3 R8, PT, PT, RZ, -R18, RZ ?trans2;
IADD3 R18, PT, PT, RZ, -R20, RZ ?trans2;
SHF.R.S32.HI R20, RZ, 0x5, R17 ?trans1;
IMAD.HI.U32 R6, R6, R19, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R7, R9, R14, RZ ?trans1;
IADD3 R21, PT, PT, RZ, -R15, RZ &req={1} ?WAIT3_END_GROUP;
IMAD R9, R6, R8, R19 ?trans1;
IABS R6, R20 ?trans1;
IMAD R8, R7, R18, R14 ?trans2;
HFMA2 R14, -RZ, RZ, 0, 0 ?trans2;
IMAD R19, R21, R12, RZ ?trans1;
ISETP.GT.U32.AND P0, PT, R10, R9, PT ?trans1;
ISETP.GT.U32.AND P1, PT, R13, R8, PT ?trans2;
IMAD.HI.U32 R14, R15, R19, R14 ?trans1;
MOV R15, R6 ?WAIT5_END_GROUP;
IMAD.HI.U32 R14, R14, R15, RZ ?WAIT4_END_GROUP;
@!P0 IADD3 R9, PT, PT, R9, -R10, RZ ?trans2;
IADD3 R14, PT, PT, -R14, RZ, RZ ?trans2;
@!P1 IADD3 R8, PT, PT, R8, -R13, RZ ?trans2;
@!P1 IADD3 R7, PT, PT, R7, 0x1, RZ ?trans1;
ISETP.GE.AND P1, PT, R16, RZ, PT ?trans1;
ISETP.GT.U32.AND P4, PT, R10, R9, PT ?trans1;
IMAD R6, R12, R14, R15 ?trans1;
ISETP.GE.U32.AND P3, PT, R8, R13, PT ?trans1;
LOP3.LUT R8, R4, R11, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P2, PT, R12, R6, PT ?trans2;
ISETP.GE.AND P0, PT, R8, RZ, PT ?trans1;
LEA.HI R8, R0, R0, RZ, 0x1b ?WAIT4_END_GROUP;
@!P4 IADD3 R9, PT, PT, R9, -R10, RZ ?trans1;
ISETP.NE.AND P4, PT, R11, RZ, PT ?trans1;
@P3 IADD3 R7, PT, PT, R7, 0x1, RZ ?trans1;
ISETP.NE.AND P3, PT, R5, RZ, PT ?trans1;
LEA R8, R8, UR4, 0x2 ?trans2;
@!P1 IADD3 R9, PT, PT, -R9, RZ, RZ ?trans2;
@!P2 IADD3 R6, PT, PT, R6, -R12, RZ ?trans2;
@!P0 IADD3 R7, PT, PT, -R7, RZ, RZ ?trans1;
ISETP.NE.AND P1, PT, R3, RZ, PT ?WAIT2_END_GROUP;
ISETP.GT.U32.AND P2, PT, R12, R6, PT ?trans1;
@!P4 LOP3.LUT R7, RZ, R11, RZ, 0x33, !PT ?trans2;
@!P3 LOP3.LUT R9, RZ, R5, RZ, 0x33, !PT ?trans1;
ISETP.GE.AND P3, PT, R20, RZ, PT ?trans2;
ISETP.GE.AND P0, PT, R7, UR6, PT &req={3} ?trans2;
IMAD.SHL.U32 R9, R9, 0x200, RZ ?WAIT5_END_GROUP;
@!P2 IADD3 R6, PT, PT, R6, -R12, RZ ?trans1;
ISETP.GE.OR P0, PT, R9, R2, P0 ?WAIT5_END_GROUP;
ISETP.LT.OR P0, PT, R3, RZ, P0 ?trans1;
@!P3 IADD3 R6, PT, PT, -R6, RZ, RZ ?trans2;
@!P1 LOP3.LUT R6, RZ, R3, RZ, 0x33, !PT ?WAIT10_END_GROUP;
@P0 BRA 0xb20 &req={4,0} ?trans5;
LDC.64 R10, c[0x0][0x380] &wr=0x0 ?trans1;
LOP3.LUT R17, R17, 0xffffffe0, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R17, PT, PT, R9, R4, -R17 ?trans1;
IMAD R4, R7, R3, R6 ?WAIT3_END_GROUP;
IADD3 R15, PT, PT, -R17, R2.reuse, RZ ?trans1;
IMAD R5, R4, R2, R17 ?WAIT4_END_GROUP;
ISETP.GE.AND P2, PT, R15.reuse, 0x1, PT ?trans1;
ISETP.GE.AND P1, PT, R15, 0x21, PT ?trans1;
IMAD.WIDE R4, R5, 0x4, R10 &req={0} ?WAIT11_END_GROUP;
@P2 LDG.E R13, desc[UR8][R4.64] &wr=0x2 ?trans4;
@P1 LDG.E R10, desc[UR8][R4.64+0x80] &wr=0x3 ?trans1;
ISETP.GE.AND P0, PT, R15.reuse, 0x41, PT ?trans1;
ISETP.GE.AND P4, PT, R15.reuse, 0x61, PT ?trans1;
ISETP.GE.AND P6, PT, R15.reuse, 0x81, PT ?trans1;
ISETP.GE.AND P5, PT, R15.reuse, 0xa1, PT ?trans1;
ISETP.GE.AND P3, PT, R15, 0xc1, PT ?trans1;
MOV R11, RZ ?WAIT8_END_GROUP;
@P0 LDG.E R12, desc[UR8][R4.64+0x100] &wr=0x4 ?trans4;
@P4 LDG.E R14, desc[UR8][R4.64+0x180] &wr=0x5 ?trans4;
@P6 LDG.E R16, desc[UR8][R4.64+0x200] &wr=0x5 ?trans4;
@P3 LDG.E R18, desc[UR8][R4.64+0x300] &wr=0x5 ?trans1;
@P2 FADD R11, RZ, R13 &req={2} ?trans1;
ISETP.GE.AND P2, PT, R15, 0xe1, PT ?WAIT3_END_GROUP;
@P1 FADD R11, R11, R10 &req={3} ?trans1;
ISETP.GE.AND P1, PT, R15, 0x101, PT ?trans1;
@P5 LDG.E R10, desc[UR8][R4.64+0x280] &wr=0x2 ?trans8;
@P2 LDG.E R20, desc[UR8][R4.64+0x380] &wr=0x3 ?trans4;
@P1 LDG.E R22, desc[UR8][R4.64+0x400] &wr=0x3 ?trans1;
@P0 FADD R11, R11, R12 &req={4} ?trans1;
ISETP.GE.AND P0, PT, R15, 0x121, PT ?WAIT3_END_GROUP;
@P4 FADD R11, R11, R14 &req={5} ?trans1;
ISETP.GE.AND P4, PT, R15, 0x141, PT ?WAIT3_END_GROUP;
@P6 FADD R11, R11, R16 ?trans1;
ISETP.GE.AND P6, PT, R15, 0x161, PT ?WAIT9_END_GROUP;
@P4 LDG.E R12, desc[UR8][R4.64+0x500] &wr=0x4 ?trans4;
@P6 LDG.E R14, desc[UR8][R4.64+0x580] &wr=0x5 ?trans1;
@P5 FADD R11, R11, R10 &req={2} ?trans1;
ISETP.GE.AND P5, PT, R15, 0x181, PT ?trans2;
@P0 LDG.E R10, desc[UR8][R4.64+0x480] &wr=0x2 ?trans1;
@P3 FADD R11, R11, R18 ?trans1;
ISETP.GE.AND P3, PT, R15, 0x1a1, PT ?WAIT3_END_GROUP;
@P2 FADD R11, R11, R20 &req={3} ?trans1;
ISETP.GE.AND P2, PT, R15, 0x1c1, PT ?WAIT3_END_GROUP;
@P1 FADD R11, R11, R22 ?trans1;
ISETP.GE.AND P1, PT, R15, 0x1e1, PT ?trans1;
@P5 LDG.E R16, desc[UR8][R4.64+0x600] &wr=0x3 ?trans4;
@P3 LDG.E R18, desc[UR8][R4.64+0x680] &wr=0x3 ?trans4;
@P2 LDG.E R20, desc[UR8][R4.64+0x700] &wr=0x3 ?trans4;
@P1 LDG.E R22, desc[UR8][R4.64+0x780] &wr=0x3 ?trans1;
@P0 FADD R11, R11, R10 &req={2} ?WAIT4_END_GROUP;
@P4 FADD R11, R11, R12 &req={4} ?WAIT4_END_GROUP;
@P6 FADD R11, R11, R14 &req={5} ?WAIT4_END_GROUP;
@P5 FADD R11, R11, R16 &req={3} ?WAIT4_END_GROUP;
@P3 FADD R11, R11, R18 ?WAIT4_END_GROUP;
@P2 FADD R11, R11, R20 ?WAIT4_END_GROUP;
@P1 FADD R11, R11, R22 ?WAIT5_END_GROUP;
STS [R8], R11 &rd=0x1 ?trans1;
BRA 0xb30 ?trans5;
STS [R8], RZ &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.AND P0, PT, R7, UR6, PT ?trans1;
LOP3.LUT R4, R0.reuse, 0x1, RZ, 0xc0, !PT ?trans2;
LOP3.LUT P1, RZ, R0, 0x3, RZ, 0xc0, !PT ?trans2;
ISETP.GT.AND P0, PT, R3, -0x1, !P0 ?WAIT5_END_GROUP;
ISETP.EQ.U32.OR P2, PT, R4, 0x1, !P0 ?trans1;
PLOP3.LUT P1, PT, P1, P0, PT, 0xf2, 0x2f ?WAIT12_END_GROUP;
@!P2 LDS R3, [R8+0x4] ?trans4;
@!P2 LDS R4, [R8] &wr=0x2 ?trans2;
@!P2 FADD R3, R3, R4 &req={2} ?WAIT5_END_GROUP;
@!P2 STS [R8], R3 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
LOP3.LUT P2, RZ, R0, 0x7, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P2, PT, P2, P0, PT, 0xf2, 0x2f ?trans1;
@!P1 LDS R4, [R8+0x8] ?trans4;
@!P1 LDS R5, [R8] &wr=0x2 ?trans2;
@!P1 FADD R5, R4, R5 &req={2} ?WAIT5_END_GROUP;
@!P1 STS [R8], R5 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
LOP3.LUT P1, RZ, R0, 0xf, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P1, P0, PT, 0xf2, 0x2f ?trans1;
@!P2 LDS R4, [R8+0x10] ?trans4;
@!P2 LDS R7, [R8] &wr=0x2 ?trans2;
@!P2 FADD R7, R4, R7 &req={2} ?WAIT5_END_GROUP;
@!P2 STS [R8], R7 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P1 LDS R3, [R8+0x20] ?trans4;
@!P1 LDS R4, [R8] &wr=0x2 ?trans2;
@!P1 FADD R3, R3, R4 &req={2} ?WAIT5_END_GROUP;
@!P1 STS [R8], R3 &rd=0x2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P0 EXIT ?trans5;
LOP3.LUT P0, RZ, R0, 0x1f, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R9, R2, P0 ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDS R0, [R8] ?trans1;
UI2FP.F32.S32 UR4, UR6 ?trans1;
I2FP.F32.S32 R2, R2 ?trans1;
BSSY.RECONVERGENT B0, 0xe90 ?trans1;
LDS R3, [R8+0x40] &req={2} &wr=0x2 ?trans3;
FMUL R5, R2, UR4 ?WAIT4_END_GROUP;
MUFU.RCP R2, R5 &wr=0x3 ?trans2;
FFMA R7, -R5, R2, 1 &req={3} ?WAIT4_END_GROUP;
FFMA R7, R2, R7, R2 ?trans1;
FADD R0, R0, R3 &req={2} ?WAIT4_END_GROUP;
FCHK P0, R0, R5 &wr=0x2 ?trans1;
FFMA R2, R0, R7, RZ ?WAIT4_END_GROUP;
FFMA R3, -R5, R2, R0 ?WAIT4_END_GROUP;
FFMA R9, R7, R3, R2 ?trans1;
@!P0 BRA 0xe80 &req={2} ?trans6;
MOV R2, 0xe80 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xed0 &req={1,0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R2, c[0x0][0x398] &wr=0x2 ?trans2;
IMAD.WIDE R6, R6, 0x4, R2 &req={2} ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R6.64], R9 ?trans1;
EXIT ?trans5;
SHF.R.U32.HI R4, RZ, 0x17, R5 ?trans1;
BSSY.RECONVERGENT B1, 0x1530 ?trans1;
SHF.R.U32.HI R3, RZ, 0x17, R0 ?trans2;
LOP3.LUT R7, R4, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R4, R3, 0xff, RZ, 0xc0, !PT ?trans1;
MOV R8, R0 ?trans1;
IADD3 R11, PT, PT, R7, -0x1, RZ ?trans2;
IADD3 R10, PT, PT, R4, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R11, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R10, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R9, RZ ?trans1;
@!P0 BRA 0x1110 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R5|, +INF , PT ?trans1;
MOV R3, R5 ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0x1510 ?trans5;
LOP3.LUT P0, RZ, R5, 0x7fffffff, R8, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x14f0 ?trans5;
FSETP.NEU.FTZ.AND P2, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P1, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P0 BRA !P2, 0x14f0 ?trans5;
LOP3.LUT P2, RZ, R8, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P2, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x14d0 ?trans5;
LOP3.LUT P0, RZ, R5, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P1, P0, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x14a0 ?trans5;
ISETP.GE.AND P0, PT, R10, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R11, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R9, RZ ?trans1;
@!P0 MOV R9, 0xffffffc0 ?trans1;
@!P0 FFMA R8, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R5, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R9, PT, PT, R9, 0x40, RZ ?WAIT7_END_GROUP;
LEA R0, R7, 0xc0800000, 0x17 ?trans1;
BSSY.RECONVERGENT B2, 0x1490 ?trans1;
IADD3 R4, PT, PT, R4, -0x7f, RZ ?trans2;
IADD3 R5, PT, PT, -R0, R5, RZ ?WAIT3_END_GROUP;
IMAD R0, R4.reuse, -0x800000, R8 ?trans1;
IADD3 R4, PT, PT, R4, 0x7f, -R7 ?trans1;
MUFU.RCP R3, R5 &wr=0x0 ?trans1;
FADD.FTZ R11, -R5, -RZ ?trans2;
IADD3 R4, PT, PT, R4, R9, RZ ?trans2;
FFMA R10, R3, R11, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R10, R3, R10, R3 ?WAIT4_END_GROUP;
FFMA R3, R0, R10, RZ ?WAIT4_END_GROUP;
FFMA R8, R11, R3, R0 ?WAIT4_END_GROUP;
FFMA R13, R10, R8, R3 ?WAIT4_END_GROUP;
FFMA R8, R11, R13, R0 ?WAIT4_END_GROUP;
FFMA R3, R10, R8, R13 ?WAIT5_END_GROUP;
SHF.R.U32.HI R0, RZ, 0x17, R3 ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R9, PT, PT, R0, R4, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R9, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1470 ?trans5;
ISETP.GT.AND P0, PT, R9, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1440 ?trans5;
ISETP.GE.AND P0, PT, R9, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1480 ?trans5;
ISETP.GE.AND P0, PT, R9, -0x18, PT ?trans1;
LOP3.LUT R3, R3, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x1480 ?trans5;
FFMA.RZ R0, R10.reuse, R8.reuse, R13.reuse ?trans1;
IADD3 R7, PT, PT, R9.reuse, 0x20, RZ ?trans1;
FFMA.RM R5, R10, R8, R13 ?trans1;
ISETP.NE.AND P1, PT, R9.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R9, RZ, PT ?trans1;
LOP3.LUT R0, R0, 0x7fffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R4, R0, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R0, R10, R8, R13 ?trans1;
IADD3 R8, PT, PT, -R9, RZ, RZ ?trans2;
SHF.L.U32 R7, R4, R7, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R0, R5, PT ?trans1;
SEL R5, R8, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R7, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R5, RZ, R5, R4 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R7, RZ, 0x1, R5 ?WAIT3_END_GROUP;
SEL R0, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R0, R0, 0x1, R7, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, R5, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R7, R0, RZ ?WAIT4_END_GROUP;
LOP3.LUT R3, R0, R3, RZ, 0xfc, !PT ?trans1;
BRA 0x1480 ?trans6;
LOP3.LUT R3, R3, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x1480 ?trans6;
IMAD R3, R4, 0x800000, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
BRA 0x1520 ?trans5;
LOP3.LUT R3, R5, 0x80000000, R8, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x1520 ?trans6;
LOP3.LUT R3, R5, 0x80000000, R8, 0x48, !PT ?trans1;
BRA 0x1520 ?trans6;
MUFU.RSQ R3, -QNAN &wr=0x0 ?trans1;
BRA 0x1520 ?trans5;
FADD.FTZ R3, R0, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R9, R3 &req={0} ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R2 0x0 ?trans5;
BRA 0x1560;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: estimate_conv_mean_fast2_batch_kernel(float const*, int, int, int, float*)
_Z37estimate_conv_mean_fast2_batch_kernelPKfiiiPf:
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x8
s_load_b32 s2, s[0:1], 0x2c
s_waitcnt lgkmcnt(0)
s_lshl_b32 s3, s5, 5
s_bfe_i32 s7, s5, 0x1001a
s_and_b32 s2, s2, 0xffff
s_add_i32 s8, s3, s7
s_ashr_i32 s10, s5, 31
s_xor_b32 s8, s8, s7
s_add_i32 s11, s5, s10
v_cvt_f32_u32_e32 v1, s8
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v1, v1
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v1, 0x4f7ffffe, v1
v_cvt_u32_f32_e32 v1, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
s_sub_i32 s2, 0, s8
v_mul_lo_u32 v3, s2, v1
s_add_i32 s2, s4, 0x1ff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
s_ashr_i32 s9, s2, 31
v_ashrrev_i32_e32 v5, 31, v2
s_lshr_b32 s9, s9, 23
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
s_add_i32 s2, s2, s9
v_mul_hi_u32 v3, v1, v3
s_delay_alu instid0(VALU_DEP_2)
v_add_nc_u32_e32 v4, v2, v5
s_xor_b32 s9, s11, s10
s_ashr_i32 s10, s2, 9
s_ashr_i32 s2, s2, 31
s_mul_i32 s3, s3, s10
v_xor_b32_e32 v6, v4, v5
s_add_i32 s11, s10, s2
v_add_nc_u32_e32 v1, v1, v3
s_xor_b32 s2, s11, s2
s_ashr_i32 s10, s3, 31
v_cvt_f32_u32_e32 v7, s2
s_add_i32 s3, s3, s10
v_mul_hi_u32 v1, v6, v1
s_xor_b32 s3, s3, s10
v_cvt_f32_u32_e32 v4, s9
v_rcp_iflag_f32_e32 v7, v7
v_xor_b32_e32 v10, s7, v5
s_sub_i32 s7, 0, s2
s_mov_b32 s11, 0
v_rcp_iflag_f32_e32 v4, v4
v_mul_lo_u32 v3, v1, s8
s_waitcnt_depctr 0xfff
v_dual_mul_f32 v7, 0x4f7ffffe, v7 :: v_dual_add_nc_u32 v8, 1, v1
v_sub_nc_u32_e32 v3, v6, v3
v_mul_f32_e32 v4, 0x4f7ffffe, v4
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cvt_u32_f32_e32 v7, v7
v_subrev_nc_u32_e32 v9, s8, v3
v_cmp_le_u32_e32 vcc_lo, s8, v3
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_cvt_u32_f32_e32 v11, v4
v_cndmask_b32_e32 v1, v1, v8, vcc_lo
v_cndmask_b32_e32 v3, v3, v9, vcc_lo
v_cvt_f32_u32_e32 v8, s3
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v9, 1, v1
v_cmp_le_u32_e32 vcc_lo, s8, v3
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_rcp_iflag_f32_e32 v8, v8
v_cndmask_b32_e32 v1, v1, v9, vcc_lo
v_lshrrev_b32_e32 v9, 27, v5
v_xor_b32_e32 v5, s10, v5
s_delay_alu instid0(VALU_DEP_3)
v_xor_b32_e32 v1, v1, v10
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v3, 0x4f7ffffe, v8
v_mul_lo_u32 v8, s7, v7
s_sub_i32 s7, 0, s3
v_add_nc_u32_e32 v9, v2, v9
v_sub_nc_u32_e32 v1, v1, v10
v_cvt_u32_f32_e32 v10, v3
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v4, 5, v9
v_ashrrev_i32_e32 v3, 31, v1
v_mul_hi_u32 v8, v7, v8
s_delay_alu instid0(VALU_DEP_4)
v_mul_lo_u32 v12, s7, v10
s_sub_i32 s7, 0, s9
v_ashrrev_i32_e32 v9, 31, v9
v_add_nc_u32_e32 v1, v1, v3
v_mul_lo_u32 v13, s7, v11
s_cmp_gt_i32 s5, -1
v_add_nc_u32_e32 v7, v7, v8
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
v_xor_b32_e32 v1, v1, v3
v_mul_hi_u32 v8, v10, v12
s_cselect_b32 s7, -1, 0
v_mul_hi_u32 v12, v11, v13
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_mul_hi_u32 v7, v1, v7
v_add_nc_u32_e32 v13, v4, v9
v_add_nc_u32_e32 v8, v10, v8
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
v_xor_b32_e32 v10, v13, v9
v_add_nc_u32_e32 v11, v11, v12
v_mul_lo_u32 v7, v7, s2
v_mul_hi_u32 v8, v6, v8
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mul_hi_u32 v11, v10, v11
v_sub_nc_u32_e32 v1, v1, v7
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mul_lo_u32 v7, v8, s3
v_mul_lo_u32 v11, v11, s9
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_subrev_nc_u32_e32 v12, s2, v1
v_cmp_le_u32_e32 vcc_lo, s2, v1
v_sub_nc_u32_e32 v6, v6, v7
v_add_nc_u32_e32 v7, 1, v8
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_cndmask_b32_e32 v1, v1, v12, vcc_lo
v_sub_nc_u32_e32 v10, v10, v11
v_subrev_nc_u32_e32 v11, s3, v6
v_cmp_le_u32_e32 vcc_lo, s3, v6
s_delay_alu instid0(VALU_DEP_4)
v_subrev_nc_u32_e32 v12, s2, v1
v_cmp_le_u32_e64 s2, s2, v1
v_cndmask_b32_e32 v7, v8, v7, vcc_lo
v_subrev_nc_u32_e32 v8, s9, v10
v_cndmask_b32_e32 v11, v6, v11, vcc_lo
v_cmp_le_u32_e32 vcc_lo, s9, v10
v_cndmask_b32_e64 v1, v1, v12, s2
v_add_nc_u32_e32 v12, 1, v7
v_cndmask_b32_e32 v8, v10, v8, vcc_lo
v_cmp_le_u32_e32 vcc_lo, s3, v11
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_xor_b32_e32 v6, v1, v3
v_cndmask_b32_e32 v1, v7, v12, vcc_lo
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_subrev_nc_u32_e32 v7, s9, v8
v_cmp_le_u32_e32 vcc_lo, s9, v8
v_sub_nc_u32_e32 v10, v6, v3
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_xor_b32_e32 v1, v1, v5
v_cndmask_b32_e32 v11, v8, v7, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b32_e32 v7, 9, v10
v_sub_nc_u32_e32 v8, v1, v5
v_mov_b32_e32 v5, 0
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_xor_b32_e32 v1, v11, v9
v_cmp_gt_i32_e32 vcc_lo, s4, v7
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cmp_gt_i32_e64 s2, s6, v8
v_sub_nc_u32_e32 v1, v1, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s3, vcc_lo, s2
s_and_b32 s3, s3, s7
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s10, s3
s_cbranch_execz .LBB1_6
v_mad_u64_u32 v[9:10], null, v8, s5, v[1:2]
v_lshlrev_b32_e32 v4, 5, v4
v_lshlrev_b32_e32 v6, 9, v6
s_load_b64 s[8:9], s[0:1], 0x0
v_lshlrev_b32_e32 v3, 9, v3
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v8, v2, v4
v_mul_lo_u32 v5, v9, s4
v_add3_u32 v2, v2, v5, v6
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v5, v8, v7
v_sub_nc_u32_e32 v4, v2, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_sub_nc_u32_e32 v2, s4, v5
v_mov_b32_e32 v5, 0
v_sub_nc_u32_e32 v3, v4, v3
.LBB1_2:
s_mov_b32 s5, exec_lo
s_delay_alu instid0(VALU_DEP_3)
v_cmpx_lt_i32_e64 s11, v2
s_cbranch_execz .LBB1_4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v6, s11, v3
v_ashrrev_i32_e32 v7, 31, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[6:7]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v6, s3, s8, v6
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v7, s3, s9, v7, s3
global_load_b32 v4, v[6:7], off
s_waitcnt vmcnt(0)
v_add_f32_e32 v5, v5, v4
.LBB1_4:
s_or_b32 exec_lo, exec_lo, s5
s_add_i32 s3, s11, 32
s_cmpk_lt_u32 s11, 0x1e0
s_cbranch_scc0 .LBB1_6
s_mov_b32 s11, s3
s_branch .LBB1_2
.LBB1_6:
s_or_b32 exec_lo, exec_lo, s10
v_and_b32_e32 v3, 1, v0
v_lshrrev_b32_e32 v2, 5, v0
s_and_b32 s5, s7, s2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_eq_u32_e64 s3, 0, v3
v_add_lshl_u32 v4, v2, v0, 2
s_delay_alu instid0(VALU_DEP_2)
s_and_b32 s3, s3, s5
ds_store_b32 v4, v5
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_saveexec_b32 s2, s3
s_cbranch_execz .LBB1_8
ds_load_2addr_b32 v[2:3], v4 offset1:1
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v2, v3, v2
ds_store_b32 v4, v2
.LBB1_8:
s_or_b32 exec_lo, exec_lo, s2
v_and_b32_e32 v2, 3, v0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmp_eq_u32_e64 s2, 0, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s3, s2, s5
s_and_saveexec_b32 s2, s3
s_cbranch_execz .LBB1_10
ds_load_2addr_b32 v[2:3], v4 offset1:2
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v2, v3, v2
ds_store_b32 v4, v2
.LBB1_10:
s_or_b32 exec_lo, exec_lo, s2
v_and_b32_e32 v2, 7, v0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmp_eq_u32_e64 s2, 0, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s3, s2, s5
s_and_saveexec_b32 s2, s3
s_cbranch_execz .LBB1_12
ds_load_2addr_b32 v[2:3], v4 offset1:4
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v2, v3, v2
ds_store_b32 v4, v2
.LBB1_12:
s_or_b32 exec_lo, exec_lo, s2
v_and_b32_e32 v2, 15, v0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmp_eq_u32_e64 s2, 0, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s3, s2, s5
s_and_saveexec_b32 s2, s3
s_cbranch_execz .LBB1_14
ds_load_2addr_b32 v[2:3], v4 offset1:8
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v2, v3, v2
ds_store_b32 v4, v2
.LBB1_14:
s_or_b32 exec_lo, exec_lo, s2
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_saveexec_b32 s2, s5
s_cbranch_execz .LBB1_18
v_and_b32_e32 v0, 31, v0
s_mov_b32 s3, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_eq_u32_e64 s2, 0, v0
s_and_b32 s2, s2, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 exec_lo, exec_lo, s2
s_cbranch_execz .LBB1_18
s_load_b64 s[0:1], s[0:1], 0x18
v_ashrrev_i32_e32 v2, 31, v1
ds_load_2addr_b32 v[4:5], v4 offset1:16
v_cvt_f32_i32_e32 v6, s6
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_cvt_f32_i32_e32 v2, s4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_mul_f32_e32 v2, v2, v6
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
v_add_f32_e32 v4, v4, v5
global_load_b32 v3, v[0:1], off
v_div_scale_f32 v5, null, v2, v2, v4
v_rcp_f32_e32 v6, v5
s_waitcnt_depctr 0xfff
v_fma_f32 v7, -v5, v6, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v6, v7, v6
v_div_scale_f32 v7, vcc_lo, v4, v2, v4
v_mul_f32_e32 v8, v7, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v9, -v5, v8, v7
v_fmac_f32_e32 v8, v9, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v5, -v5, v8, v7
v_div_fmas_f32 v5, v5, v6, v8
s_delay_alu instid0(VALU_DEP_1)
v_div_fixup_f32 v4, v5, v2, v4
.LBB1_17:
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_add_f32_e32 v2, v3, v4
global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off glc
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, v2, v3
v_mov_b32_e32 v3, v2
s_or_b32 s3, vcc_lo, s3
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s3
s_cbranch_execnz .LBB1_17
.LBB1_18:
s_endpgm
| estimate_conv_mean_fast2_batch_kernel | 8,462 | 5,883 | stackv2-00000-of-00015 |
// Demangled: radix(int*, int*, int, int)
Function : _Z5radixPiS_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R7, c[0x0][0x394] &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans1;
HFMA2 R4, -RZ, RZ, 0, 0 ?WAIT5_END_GROUP;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans1;
ISETP.GE.AND P0, PT, R7.reuse, RZ, PT &req={1} ?trans1;
IADD3 R5, PT, PT, R7, 0x1, RZ ?trans1;
IMAD.WIDE.U32 R2, R0, 0x4, R2 &req={2} ?WAIT11_END_GROUP;
@!P0 BRA 0x290 &req={3,0} ?trans5;
ISETP.GE.U32.AND P1, PT, R7, 0x3, PT ?trans1;
LDG.E R6, desc[UR6][R2.64] &rd=0x0 &wr=0x5 ?trans1;
LOP3.LUT R4, R5, 0x3, RZ, 0xc0, !PT ?WAIT11_END_GROUP;
@!P1 BRA 0x1a0 &req={0} ?trans5;
LOP3.LUT R10, R5, 0xfffffffc, RZ, 0xc0, !PT ?trans1;
UMOV UR4, URZ ?WAIT6_END_GROUP;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
IMAD.HI R7, R6, 0x68db8bad, RZ &req={5} ?trans1;
MOV R9, R6 ?WAIT4_END_GROUP;
ISETP.NE.AND P1, PT, R10, UR4, PT ?trans1;
SHF.R.U32.HI R8, RZ, 0x1f, R7 ?WAIT4_END_GROUP;
LEA.HI.SX32 R6, R7, R8, 0x14 ?WAIT8_END_GROUP;
@P1 BRA 0x100 ?trans5;
IMAD.HI R7, R9, 0x10624dd3, RZ ?WAIT5_END_GROUP;
SHF.R.U32.HI R8, RZ, 0x1f, R7 ?WAIT4_END_GROUP;
LEA.HI.SX32 R7, R7, R8, 0x1a ?WAIT7_END_GROUP;
ISETP.NE.AND P1, PT, R4, RZ, PT ?WAIT13_END_GROUP;
@!P1 BRA 0x250 ?trans5;
UMOV UR4, URZ ?WAIT5_END_GROUP;
UIADD3 UR4, UPT, UPT, UR4, 0x1, URZ ?trans1;
IMAD.HI R7, R6, 0x66666667, RZ &req={5} ?trans1;
MOV R9, R6 ?WAIT4_END_GROUP;
ISETP.NE.AND P1, PT, R4, UR4, PT ?trans1;
SHF.R.U32.HI R8, RZ, 0x1f, R7 ?WAIT4_END_GROUP;
LEA.HI.SX32 R6, R7, R8, 0x1e ?WAIT8_END_GROUP;
@P1 BRA 0x1d0 ?trans5;
MOV R7, R9 ?WAIT7_END_GROUP;
IMAD.HI R4, R7, 0x66666667, RZ ?WAIT5_END_GROUP;
SHF.R.U32.HI R9, RZ, 0x1f, R4 ?WAIT4_END_GROUP;
LEA.HI.SX32 R4, R4, R9, 0x1e ?WAIT5_END_GROUP;
IMAD R4, R4, -0xa, R7 ?WAIT7_END_GROUP;
LDC R6, c[0x0][0x390] &req={5} &wr=0x0 ?trans2;
ISETP.LT.OR P0, PT, R6, 0x1, !P0 &req={0} ?trans1;
MOV.64 R6, RZ ?WAIT12_END_GROUP;
@P0 BRA 0x990 ?trans5;
LOP3.LUT R16, R5.reuse, 0x3, RZ, 0xc0, !PT ?trans1;
HFMA2 R9, -RZ, RZ, 0, 5.9604644775390625e-07 ?trans1;
LOP3.LUT R5, R5, 0xfffffffc, RZ, 0xc0, !PT ?trans1;
CS2R R6, SRZ ?trans2;
ISETP.NE.AND P0, PT, R16, 0x2, PT ?trans1;
IADD3 R8, PT, PT, -R5, RZ, RZ ?WAIT4_END_GROUP;
SEL R9, R9, 0x64, !P0 ?WAIT8_END_GROUP;
LDC R14, c[0x0][0x394] &wr=0x0 ?trans8;
LDC.64 R12, c[0x0][0x380] &wr=0x1 ?trans1;
ISETP.GE.U32.AND P0, PT, R14, 0x3, PT &req={0} ?trans1;
IMAD.WIDE.U32 R12, R7, 0x4, R12 &req={1} ?WAIT6_END_GROUP;
LDG.E R12, desc[UR6][R12.64] &rd=0x0 &wr=0x5 ?trans6;
@!P0 BRA 0x690 ?trans5;
IADD3 R11, PT, PT, -R5, RZ, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R11, RZ, PT ?trans1;
MOV R11, R8 ?WAIT12_END_GROUP;
@P0 BRA 0x5f0 ?trans5;
IADD3 R13, PT, PT, -R11, RZ, RZ &req={0} ?trans2;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?WAIT3_END_GROUP;
ISETP.GT.AND P1, PT, R13, 0xc, PT ?WAIT13_END_GROUP;
@!P1 BRA 0x520 ?trans5;
PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x80 ?WAIT13_END_GROUP;
IMAD.HI R12, R12, 0x68db8bad, RZ &req={5} ?trans1;
IADD3 R11, PT, PT, R11, 0x10, RZ ?WAIT4_END_GROUP;
SHF.R.U32.HI R13, RZ, 0x1f, R12 ?trans1;
ISETP.GE.AND P1, PT, R11, -0xc, PT ?WAIT3_END_GROUP;
LEA.HI.SX32 R13, R12, R13, 0x14 ?WAIT5_END_GROUP;
IMAD.HI R13, R13, 0x68db8bad, RZ ?WAIT5_END_GROUP;
SHF.R.U32.HI R10, RZ, 0x1f, R13 ?WAIT4_END_GROUP;
LEA.HI.SX32 R10, R13, R10, 0x14 ?WAIT5_END_GROUP;
IMAD.HI R10, R10, 0x68db8bad, RZ ?WAIT5_END_GROUP;
SHF.R.U32.HI R13, RZ, 0x1f, R10 ?WAIT4_END_GROUP;
LEA.HI.SX32 R10, R10, R13, 0x14 ?WAIT5_END_GROUP;
IMAD.HI R12, R10, 0x68db8bad, RZ ?WAIT5_END_GROUP;
SHF.R.U32.HI R13, RZ, 0x1f, R12 ?WAIT4_END_GROUP;
LEA.HI.SX32 R12, R12, R13, 0x14 ?trans1;
@!P1 BRA 0x430 ?trans6;
IADD3 R13, PT, PT, -R11, RZ, RZ ?WAIT5_END_GROUP;
ISETP.GT.AND P1, PT, R13, 0x4, PT ?WAIT13_END_GROUP;
@!P1 BRA 0x5d0 ?trans5;
IMAD.HI R10, R12, 0x68db8bad, RZ &req={5} ?trans1;
PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x80 ?trans2;
IADD3 R11, PT, PT, R11, 0x8, RZ ?trans2;
SHF.R.U32.HI R13, RZ, 0x1f, R10 ?WAIT4_END_GROUP;
LEA.HI.SX32 R10, R10, R13, 0x14 ?WAIT5_END_GROUP;
IMAD.HI R12, R10, 0x68db8bad, RZ ?WAIT5_END_GROUP;
SHF.R.U32.HI R13, RZ, 0x1f, R12 ?WAIT4_END_GROUP;
LEA.HI.SX32 R12, R12, R13, 0x14 ?WAIT7_END_GROUP;
ISETP.NE.OR P0, PT, R11, RZ, P0 ?WAIT13_END_GROUP;
@!P0 BRA 0x660 ?trans5;
IADD3 R11, PT, PT, R11, 0x4, RZ ?trans1;
IMAD.HI R13, R12, 0x68db8bad, RZ &req={5,0} ?trans1;
MOV R10, R12 ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R11, RZ, PT ?trans1;
SHF.R.U32.HI R14, RZ, 0x1f, R13 ?WAIT4_END_GROUP;
LEA.HI.SX32 R12, R13, R14, 0x14 ?WAIT8_END_GROUP;
@P0 BRA 0x5f0 ?trans5;
IMAD.HI R11, R10, 0x10624dd3, RZ ?WAIT5_END_GROUP;
SHF.R.U32.HI R14, RZ, 0x1f, R11 ?WAIT4_END_GROUP;
LEA.HI.SX32 R11, R11, R14, 0x1a ?WAIT7_END_GROUP;
VIMNMX.U32 R13, R16, 0x2, PT &req={0} ?WAIT5_END_GROUP;
IMAD.SHL.U32 R13, R13, 0x4, RZ ?WAIT4_END_GROUP;
LDC R14, c[0x2][R13] &wr=0x0 ?trans2;
SHF.R.S32.HI R15, RZ, 0x1f, R14 &req={0} ?WAIT4_END_GROUP;
BRX R14 -0x6e0 ?trans5;
IABS R18, R9.reuse ?trans2;
IABS R17, R9.reuse ?trans2;
I2F.RP R11, R18 &wr=0x0 ?trans1;
IABS R20, R12 &req={5} ?trans2;
LOP3.LUT R12, R12, R9, RZ, 0x3c, !PT ?trans1;
MUFU.RCP R11, R11 &req={0} &wr=0x0 ?trans2;
IADD3 R14, PT, PT, R11, 0xffffffe, RZ &req={0} ?WAIT2_END_GROUP;
IADD3 R11, PT, PT, RZ, -R17, RZ ?trans2;
F2I.FTZ.U32.TRUNC.NTZ R15, R14 &rd=0x0 &wr=0x1 ?trans2;
HFMA2 R14, -RZ, RZ, 0, 0 &req={0} ?trans1;
IADD3 R13, PT, PT, RZ, -R15, RZ &req={1} ?WAIT5_END_GROUP;
IMAD R13, R13, R18, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R15, R15, R13, R14 ?WAIT6_END_GROUP;
IMAD.HI.U32 R15, R15, R20, RZ ?WAIT4_END_GROUP;
IMAD R11, R15, R11, R20 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R18, R11, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R11, PT, PT, R11, -R18.reuse, RZ ?trans2;
@!P1 IADD3 R15, PT, PT, R15, 0x1, RZ ?trans1;
ISETP.GE.AND P1, PT, R12, RZ, PT ?trans2;
ISETP.GE.U32.AND P0, PT, R11, R18, PT ?WAIT13_END_GROUP;
@P0 IADD3 R15, PT, PT, R15, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R9, RZ, PT ?WAIT4_END_GROUP;
MOV R11, R15 ?WAIT5_END_GROUP;
@!P1 IADD3 R11, PT, PT, -R11, RZ, RZ ?WAIT4_END_GROUP;
@!P0 LOP3.LUT R11, RZ, R9, RZ, 0x33, !PT ?trans1;
BRA 0x890 ?trans6;
MOV R11, R12 &req={5} ?WAIT7_END_GROUP;
IMAD.HI R12, R11, 0x66666667, RZ &req={5} ?trans1;
LDCU UR4, c[0x0][0x390] &wr=0x0 ?trans1;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?WAIT3_END_GROUP;
SHF.R.U32.HI R13, RZ, 0x1f, R12 ?WAIT4_END_GROUP;
LEA.HI.SX32 R12, R12, R13, 0x1e ?WAIT5_END_GROUP;
IMAD R13, R12, -0xa, R11 ?trans1;
IADD3 R12, PT, PT, R6, 0x1, RZ ?WAIT4_END_GROUP;
ISETP.GE.AND P1, PT, R13, R4, PT ?WAIT13_END_GROUP;
@P1 ISETP.NE.AND P2, PT, R13, R4, PT ?WAIT5_END_GROUP;
@P1 ISETP.LT.U32.AND P0, PT, R7.reuse, R0, !P2 ?trans1;
IADD3 R7, PT, PT, R7, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R7, UR4, PT &req={0} ?WAIT7_END_GROUP;
@!P0 IADD3 R12, PT, PT, R6, RZ, RZ ?WAIT5_END_GROUP;
MOV R6, R12 ?trans1;
@P1 BRA 0x340 ?trans6;
HFMA2 R7, -RZ, RZ, 0, 0 ?WAIT7_END_GROUP;
LDG.E R3, desc[UR6][R2.64] &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x388] &wr=0x0 ?trans2;
LEA R4, P0, R6, UR4, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R5, R6, UR5, R7, 0x2, P0 ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R3 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x9f0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: radix(int*, int*, int, int)
_Z5radixPiS_ii:
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x10
v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
s_waitcnt lgkmcnt(0)
global_load_b32 v3, v1, s[4:5]
s_cmp_gt_i32 s3, -1
s_cselect_b32 s1, -1, 0
s_cmp_lt_i32 s3, 0
s_cbranch_scc1 .LBB0_4
s_waitcnt vmcnt(0)
v_mov_b32_e32 v2, v3
s_add_i32 s0, s3, 1
.LBB0_2:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mov_b32_e32 v1, v2
s_add_i32 s0, s0, -1
s_cmp_eq_u32 s0, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_i32 v2, 0x66666667, v1
v_lshrrev_b32_e32 v4, 31, v2
v_ashrrev_i32_e32 v2, 2, v2
s_delay_alu instid0(VALU_DEP_1)
v_add_nc_u32_e32 v2, v2, v4
s_cbranch_scc0 .LBB0_2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v2, v2, 10
v_sub_nc_u32_e32 v2, v1, v2
.LBB0_4:
s_cmp_lt_i32 s2, 1
s_cbranch_scc1 .LBB0_16
v_mov_b32_e32 v1, 0
s_mov_b32 s9, 0
s_add_i32 s3, s3, 1
s_mov_b32 s8, s9
.LBB0_6:
s_and_not1_b32 vcc_lo, exec_lo, s1
s_cbranch_vccnz .LBB0_10
s_lshl_b64 s[10:11], s[8:9], 2
s_mov_b32 s0, s3
s_add_u32 s10, s4, s10
s_addc_u32 s11, s5, s11
s_load_b32 s11, s[10:11], 0x0
.LBB0_8:
s_waitcnt lgkmcnt(0)
s_mov_b32 s10, s11
s_mul_hi_i32 s11, s11, 0x66666667
s_add_i32 s0, s0, -1
s_lshr_b32 s12, s11, 31
s_ashr_i32 s11, s11, 2
s_delay_alu instid0(SALU_CYCLE_1)
s_add_i32 s11, s11, s12
s_cmp_lg_u32 s0, 0
s_cbranch_scc1 .LBB0_8
s_mul_i32 s0, s11, 10
s_delay_alu instid0(SALU_CYCLE_1)
s_sub_i32 s10, s10, s0
.LBB0_10:
s_delay_alu instid0(SALU_CYCLE_1)
v_cmp_lt_i32_e64 s11, s10, v2
s_mov_b32 s12, exec_lo
v_cmpx_ge_i32_e64 s10, v2
v_cmp_eq_u32_e32 vcc_lo, s10, v2
v_cmp_lt_u32_e64 s0, s8, v0
s_and_not1_b32 s11, s11, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, s0, vcc_lo
s_and_b32 s0, s0, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s11, s11, s0
s_or_b32 exec_lo, exec_lo, s12
s_and_saveexec_b32 s0, s11
v_add_nc_u32_e32 v1, 1, v1
s_or_b32 exec_lo, exec_lo, s0
s_add_i32 s8, s8, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lg_u32 s8, s2
s_cbranch_scc1 .LBB0_6
v_ashrrev_i32_e32 v2, 31, v1
s_branch .LBB0_17
.LBB0_16:
v_mov_b32_e32 v1, 0
v_mov_b32_e32 v2, 0
.LBB0_17:
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v0, vcc_lo, s6, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
s_waitcnt vmcnt(0)
global_store_b32 v[0:1], v3, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| radix | 4,176 | 1,490 | stackv2-00000-of-00015 |
// Demangled: kernel_hello(char*, int*)
Function : _Z12kernel_helloPcPi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R2, SR_TID.X &wr=0x0 ?trans7;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT6_END_GROUP;
LDC.64 R6, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R4, R2.reuse, 0x4, R4 &req={0} ?trans1;
IADD.64 R2, R2, R6 &req={2} ?WAIT5_END_GROUP;
LDG.E.U8 R4, desc[UR4][R4.64] &req={1} &wr=0x2 ?trans4;
LDG.E.U8 R7, desc[UR4][R2.64] &wr=0x2 ?trans2;
IADD3 R7, PT, PT, R4, R7, RZ &req={2} ?WAIT5_END_GROUP;
STG.E.U8 desc[UR4][R2.64], R7 ?trans1;
EXIT ?trans5;
BRA 0xd0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: kernel_hello(char*, int*)
_Z12kernel_helloPcPi:
s_load_b128 s[0:3], s[0:1], 0x0
v_lshlrev_b32_e32 v1, 2, v0
s_waitcnt lgkmcnt(0)
global_load_b32 v1, v1, s[2:3]
global_load_u8 v2, v0, s[0:1]
s_waitcnt vmcnt(0)
v_add_nc_u16 v1, v2, v1
global_store_b8 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| kernel_hello | 392 | 158 | stackv2-00000-of-00015 |
// Demangled: reverseWord(char*, char*, int)
Function : _Z11reverseWordPcS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R0, c[0x0][0x390] &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x390] &wr=0x2 ?trans1;
HFMA2 R4, -RZ, RZ, 0, 0 ?trans1;
LDCU.64 UR12, c[0x0][0x358] &wr=0x3 ?trans1;
ISETP.GE.AND P0, PT, R0, 0x1, PT &req={1} ?trans1;
MOV R0, UR4 &req={2} ?WAIT12_END_GROUP;
@!P0 BRA 0x230 &req={3,0} ?trans5;
S2R R8, SR_TID.X &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0x230 ?trans1;
MOV R0, RZ ?trans1;
CS2R R4, SRZ ?trans1;
MOV R6, RZ ?trans1;
LDCU UR7, c[0x0][0x390] &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x390] &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x380] &wr=0x3 ?trans4;
MOV R2, R0 ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT5_END_GROUP;
IADD.64 R2, R2, UR4 &req={3} ?WAIT7_END_GROUP;
LDG.E.U8 R2, desc[UR12][R2.64] &wr=0x3 ?trans1;
BSSY.RELIABLE B1, 0x1d0 ?trans1;
ISETP.NE.AND P0, PT, R2, 0x20, PT &req={3} ?WAIT13_END_GROUP;
@P0 BRA 0x1c0 ?trans5;
ISETP.NE.AND P0, PT, R5, R8, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BREAK.RELIABLE B1 ?trans5;
@!P0 BRA 0x220 ?trans5;
IADD3 R5, PT, PT, R5, 0x1, RZ ?trans1;
MOV R6, R0 ?WAIT7_END_GROUP;
BSYNC.RELIABLE B1 &req={2,1} ?trans5;
IADD3 R0, PT, PT, R0, 0x1, RZ ?trans1;
MOV R4, R6 ?WAIT4_END_GROUP;
ISETP.NE.AND P0, PT, R0, UR6, PT ?WAIT13_END_GROUP;
@P0 BRA 0x100 ?trans5;
MOV R0, UR7 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 &req={2,1} ?trans5;
ISETP.NE.AND P0, PT, R4, RZ, PT ?trans1;
MOV R2, RZ ?trans1;
MOV R3, 0x20 ?WAIT11_END_GROUP;
@P0 LDC.64 R6, c[0x0][0x388] &wr=0x1 ?trans1;
@P0 IADD3 R2, PT, PT, R4, 0x1, RZ ?trans2;
@P0 SHF.R.S32.HI R5, RZ, 0x1f, R4 ?WAIT3_END_GROUP;
ISETP.GE.AND P1, PT, R2, R0, PT ?trans2;
@P0 IADD.64 R4, R4, R6 &req={1} ?WAIT6_END_GROUP;
@P0 STG.E.U8 desc[UR12][R4.64], R3 &rd=0x1 ?trans5;
@P1 EXIT ?trans5;
IADD3 R3, PT, PT, R0, -0x1, RZ &req={1} ?trans2;
IADD3 R4, PT, PT, R2, 0x1, RZ ?trans2;
LOP3.LUT R6, RZ, R2, RZ, 0x33, !PT ?trans1;
LDCU.128 UR4, c[0x0][0x380] &wr=0x1 ?trans1;
BSSY.RECONVERGENT B0, 0x5b0 ?trans1;
VIMNMX.S32 R3, R3, R4, !PT ?WAIT5_END_GROUP;
IADD3 R3, PT, PT, R3, R6, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R3.reuse, RZ, PT ?trans1;
IADD3 R4, PT, PT, R3, -0x1, RZ ?WAIT12_END_GROUP;
@!P0 IADD3 R4, PT, PT, R3, RZ, RZ ?WAIT4_END_GROUP;
SHF.R.U32.HI R4, RZ, 0x1, R4 ?WAIT4_END_GROUP;
IADD3 R5, PT, PT, R4.reuse, 0x1, RZ ?trans2;
@!P0 IADD3 R5, PT, PT, R4, RZ, RZ ?WAIT4_END_GROUP;
IADD3 R3, PT, PT, R5.reuse, 0x1, RZ ?trans1;
ISETP.GE.U32.AND P0, PT, R5, 0x3, PT ?WAIT3_END_GROUP;
LOP3.LUT P1, R3, R3, 0x3, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P1 BRA 0x5a0 &req={1} ?trans5;
LDC.64 R16, c[0x0][0x388] &wr=0x1 ?trans1;
MOV.64 R6, 0xffffffffffffffff ?WAIT7_END_GROUP;
LDC.64 R18, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R4, R16, 0x1, R6 &req={1} ?trans1;
IADD3 R16, PT, PT, -R3, RZ, RZ ?WAIT4_END_GROUP;
IADD3 R17, PT, PT, R5, R17, RZ ?trans1;
IMAD.WIDE.U32 R6, R18, 0x1, R6 &req={2} ?WAIT5_END_GROUP;
IADD3 R19, PT, PT, R7, R19, RZ ?WAIT7_END_GROUP;
SHF.R.S32.HI R9, RZ, 0x1f, R0 &req={1} ?trans1;
MOV R10, R6 ?trans1;
MOV R11, R19 ?trans1;
MOV R8, R0 &req={0} ?WAIT5_END_GROUP;
IADD.64 R10, R8, R10 ?WAIT7_END_GROUP;
LDG.E.U8 R11, desc[UR12][R10.64] &rd=0x0 &wr=0x2 ?trans1;
SHF.R.S32.HI R3, RZ, 0x1f, R2 ?WAIT5_END_GROUP;
IADD.64 R14, R2.reuse, UR6 ?trans2;
IADD.64 R12, R2, UR4 ?trans2;
MOV R10, R4 &req={0} ?trans2;
STG.E.U8 desc[UR12][R14.64], R11 &req={2} &rd=0x0 ?trans4;
LDG.E.U8 R13, desc[UR12][R12.64] &wr=0x2 ?trans1;
IADD3 R16, PT, PT, R16, 0x1, RZ ?WAIT2_END_GROUP;
IADD3 R0, PT, PT, R0, -0x1, RZ ?trans2;
IADD3 R2, PT, PT, R2, 0x1, RZ ?trans1;
ISETP.NE.AND P1, PT, R16, RZ, PT ?trans1;
MOV R11, R17 &req={0} ?WAIT5_END_GROUP;
IADD.64 R8, R8, R10 ?WAIT6_END_GROUP;
STG.E.U8 desc[UR12][R8.64], R13 &req={2} &rd=0x1 ?trans1;
@P1 BRA 0x460 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
@!P0 EXIT ?trans5;
LDCU.128 UR4, c[0x0][0x380] &wr=0x2 ?trans2;
UIADD3.64 UR8, UPT, UPT, UR6, 0x3, URZ &req={2} ?trans1;
UIADD3.64 UR10, UPT, UPT, UR4, 0x3, URZ ?trans1;
UIADD3.64 UR4, UPT, UPT, UR4, -0x2, URZ ?trans1;
UIADD3.64 UR6, UPT, UPT, UR6, -0x2, URZ ?WAIT12_END_GROUP;
SHF.R.S32.HI R11, RZ, 0x1f, R0 &req={2} ?trans1;
MOV R10, R0 ?WAIT5_END_GROUP;
IADD.64 R8, R10, UR4 &req={1,0} ?WAIT6_END_GROUP;
LDG.E.U8 R13, desc[UR12][R8.64+0x1] &wr=0x2 ?trans1;
SHF.R.S32.HI R3, RZ, 0x1f, R2 ?WAIT5_END_GROUP;
IADD.64 R4, R2.reuse, UR8 ?trans2;
IADD.64 R6, R2, UR10 ?WAIT4_END_GROUP;
STG.E.U8 desc[UR12][R4.64+-0x3], R13 &req={2} &rd=0x0 ?trans4;
LDG.E.U8 R3, desc[UR12][R6.64+-0x3] &wr=0x2 ?trans1;
IADD.64 R10, R10, UR6 ?WAIT6_END_GROUP;
STG.E.U8 desc[UR12][R10.64+0x1], R3 &req={2} &rd=0x1 ?trans4;
LDG.E.U8 R15, desc[UR12][R8.64] &wr=0x2 ?trans4;
STG.E.U8 desc[UR12][R4.64+-0x2], R15 &req={2} &rd=0x2 ?trans4;
LDG.E.U8 R17, desc[UR12][R6.64+-0x2] &wr=0x3 ?trans4;
STG.E.U8 desc[UR12][R10.64], R17 &req={3} &rd=0x2 ?trans4;
LDG.E.U8 R19, desc[UR12][R8.64+-0x1] &wr=0x3 ?trans4;
STG.E.U8 desc[UR12][R4.64+-0x1], R19 &req={3} &rd=0x2 ?trans4;
LDG.E.U8 R21, desc[UR12][R6.64+-0x1] &wr=0x3 ?trans4;
STG.E.U8 desc[UR12][R10.64+-0x1], R21 &req={3} &rd=0x2 ?trans4;
LDG.E.U8 R13, desc[UR12][R8.64+-0x2] &req={0} &wr=0x3 ?trans4;
STG.E.U8 desc[UR12][R4.64], R13 &req={3} &rd=0x2 ?trans4;
LDG.E.U8 R3, desc[UR12][R6.64] &req={1} &wr=0x3 ?trans1;
IADD3 R2, PT, PT, R2, 0x4, RZ ?WAIT2_END_GROUP;
IADD3 R0, PT, PT, R0, -0x4, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R2, R0, PT ?trans1;
STG.E.U8 desc[UR12][R10.64+-0x2], R3 &req={3} &rd=0x2 ?WAIT12_END_GROUP;
@!P0 BRA 0x610 ?trans5;
EXIT ?trans5;
BRA 0x7d0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: reverseWord(char*, char*, int)
_Z11reverseWordPcS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x10
s_load_b128 s[4:7], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s2, 1
s_cbranch_scc1 .LBB0_13
v_mov_b32_e32 v3, 0
s_mov_b64 s[0:1], 0
s_mov_b32 s3, 0
s_mov_b32 s11, 0
s_mov_b32 s9, 0
.LBB0_2:
s_add_u32 s12, s4, s0
s_addc_u32 s13, s5, s1
global_load_u8 v1, v3, s[12:13]
s_mov_b32 s13, -1
s_waitcnt vmcnt(0)
v_cmp_ne_u16_e32 vcc_lo, 32, v1
s_cbranch_vccnz .LBB0_6
s_mov_b32 s14, 0
s_mov_b32 s15, exec_lo
v_cmpx_ne_u32_e64 s9, v0
s_mov_b32 s14, exec_lo
s_add_i32 s9, s9, 1
s_mov_b32 s12, s0
s_or_b32 exec_lo, exec_lo, s15
s_mov_b32 s15, -1
s_branch .LBB0_7
.LBB0_6:
s_mov_b32 s14, -1
s_mov_b32 s12, s11
.LBB0_7:
v_dual_mov_b32 v2, s1 :: v_dual_mov_b32 v1, s0
v_mov_b32_e32 v2, s11
s_and_not1_b32 s10, s10, exec_lo
s_and_b32 s15, s15, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s10, s10, s15
s_and_saveexec_b32 s15, s14
s_add_u32 s16, s0, 1
s_addc_u32 s17, s1, 0
s_cmp_eq_u32 s2, s16
v_dual_mov_b32 v2, s1 :: v_dual_mov_b32 v1, s0
v_mov_b32_e32 v2, s11
s_cselect_b32 s0, -1, 0
s_and_not1_b32 s10, s10, exec_lo
s_or_not1_b32 s13, s0, exec_lo
s_mov_b64 s[0:1], s[16:17]
s_or_b32 exec_lo, exec_lo, s15
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
s_and_b32 s11, exec_lo, s13
v_dual_mov_b32 v5, s12 :: v_dual_mov_b32 v4, s2
s_or_b32 s3, s11, s3
s_and_not1_b32 s8, s8, exec_lo
s_and_b32 s11, s10, exec_lo
s_or_b32 s8, s8, s11
s_mov_b32 s11, s12
s_and_not1_b32 exec_lo, exec_lo, s3
s_cbranch_execnz .LBB0_2
s_or_b32 exec_lo, exec_lo, s3
s_and_saveexec_b32 s0, s8
s_delay_alu instid0(SALU_CYCLE_1)
s_xor_b32 s0, exec_lo, s0
v_dual_mov_b32 v4, v1 :: v_dual_mov_b32 v5, v2
s_or_b32 exec_lo, exec_lo, s0
s_branch .LBB0_14
.LBB0_13:
v_dual_mov_b32 v4, s2 :: v_dual_mov_b32 v5, 0
.LBB0_14:
v_mov_b32_e32 v2, 0
s_mov_b32 s0, exec_lo
s_delay_alu instid0(VALU_DEP_2)
v_cmpx_ne_u32_e32 0, v5
s_cbranch_execz .LBB0_16
v_ashrrev_i32_e32 v1, 31, v5
v_add_co_u32 v0, vcc_lo, s6, v5
v_dual_mov_b32 v3, 32 :: v_dual_add_nc_u32 v2, 1, v5
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
global_store_b8 v[0:1], v3, off
.LBB0_16:
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s0, exec_lo
v_cmpx_lt_i32_e64 v2, v4
s_cbranch_execz .LBB0_19
v_ashrrev_i32_e32 v1, 31, v4
v_add_co_u32 v0, vcc_lo, v4, -1
v_ashrrev_i32_e32 v3, 31, v2
s_mov_b32 s1, 0
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v1, vcc_lo, -1, v1, vcc_lo
.LBB0_18:
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v4, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v1, vcc_lo
global_load_u8 v8, v[4:5], off
v_add_co_u32 v4, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
v_add_co_u32 v6, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v3, vcc_lo
s_waitcnt vmcnt(0)
global_store_b8 v[4:5], v8, off
global_load_u8 v8, v[6:7], off
v_add_co_u32 v4, vcc_lo, v0, -1
v_add_co_ci_u32_e32 v5, vcc_lo, -1, v1, vcc_lo
v_add_co_u32 v2, vcc_lo, v2, 1
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
v_add_co_u32 v6, vcc_lo, s6, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_cmp_ge_i32_e64 s0, v2, v0
v_add_co_ci_u32_e32 v7, vcc_lo, s7, v1, vcc_lo
v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5
s_or_b32 s1, s0, s1
s_waitcnt vmcnt(0)
global_store_b8 v[6:7], v8, off
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execnz .LBB0_18
.LBB0_19:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| reverseWord | 3,192 | 1,954 | stackv2-00000-of-00015 |
// Demangled: vectorProd(double const*, double const*, double const*, double const*, double*, int)
Function : _Z10vectorProdPKdS0_S0_S0_Pdi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R45, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R2, SR_TID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x364] &wr=0x2 ?trans1;
S2R R35, SR_CTAID.Y &wr=0x2 ?trans1;
LDCU UR8, c[0x0][0x3a8] &wr=0x3 ?trans1;
S2R R4, SR_TID.Y &wr=0x2 ?trans1;
IMAD R0, R45, UR4, R2 &req={1} ?trans2;
IMAD R3, R35, UR5, R4 &req={2} ?WAIT5_END_GROUP;
VIMNMX.S32 R0, R0, R3, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR8, PT &req={3} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU UR4, c[0x0][0x360] &wr=0x0 ?trans1;
LDC.64 R8, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x364] &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans6;
LDC.64 R10, c[0x0][0x388] &wr=0x4 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x5 ?trans1;
IMAD R45, R45, UR4, R2 &req={0} ?trans1;
ULEA UR4, UR8, 0x2, 0x2 ?trans1;
IMAD R35, R35, UR5, R4 &req={2} ?WAIT3_END_GROUP;
LEA R3, R45.reuse, 0x1, 0x2 ?trans2;
LDC.64 R38, c[0x0][0x398] &wr=0x0 ?trans1;
IMAD.WIDE R26, R45, 0x8, R8 &req={1} ?trans1;
SHF.L.U32 R0, R35, 0x2, RZ ?WAIT5_END_GROUP;
IMAD R0, R3, UR4, R0 ?trans1;
LDC.64 R12, c[0x0][0x3a0] &wr=0x1 ?trans1;
IMAD.WIDE R40, R45, 0x8, R10 &req={4} ?trans1;
LDG.E.64 R26, desc[UR6][R26.64] &req={3} &wr=0x2 ?trans2;
IADD3 R29, PT, PT, R0, 0x1, RZ ?trans1;
IMAD.WIDE.U32 R8, R35, 0x8, R8 ?trans2;
LDG.E.64 R40, desc[UR6][R40.64] &wr=0x3 ?trans1;
IADD3 R23, PT, PT, R29, UR4, RZ ?trans1;
IMAD.WIDE R36, R45, 0x8, R6 &req={5} ?WAIT2_END_GROUP;
LDG.E.64 R8, desc[UR6][R8.64] &wr=0x3 ?trans1;
IADD3 R47, PT, PT, R23, UR4, RZ ?trans1;
IMAD.WIDE.U32 R10, R35.reuse, 0x8, R10 ?trans2;
LDG.E.64 R36, desc[UR6][R36.64] &wr=0x4 ?trans2;
IMAD.WIDE.U32 R6, R35.reuse, 0x8, R6 ?trans2;
LDG.E.64 R10, desc[UR6][R10.64] &wr=0x5 ?trans2;
IMAD.WIDE.U32 R34, R35, 0x8, R38 &req={0} ?WAIT2_END_GROUP;
LDG.E.64 R6, desc[UR6][R6.64] &wr=0x2 ?trans2;
IMAD.WIDE R22, R23, 0x8, R12.reuse &req={1} ?trans2;
LDG.E.64 R34, desc[UR6][R34.64] &wr=0x2 ?trans2;
IMAD.WIDE R14, R47.reuse, 0x8, R12.reuse ?trans2;
LDG.E.64 R50, desc[UR6][R22.64] &wr=0x3 ?trans4;
LDG.E.64 R48, desc[UR6][R22.64+0x8] &wr=0x5 ?trans4;
LDG.E.64 R42, desc[UR6][R22.64+0x10] &wr=0x2 ?trans4;
LDG.E.64 R24, desc[UR6][R22.64+0x18] &wr=0x2 ?trans4;
LDG.E.64 R20, desc[UR6][R14.64] &wr=0x4 ?trans4;
LDG.E.64 R18, desc[UR6][R14.64+0x8] &wr=0x2 ?trans4;
LDG.E.64 R16, desc[UR6][R14.64+0x10] &wr=0x2 ?trans4;
LDG.E.64 R4, desc[UR6][R14.64+0x18] &wr=0x2 ?trans1;
IADD3 R47, PT, PT, R47, UR4, RZ ?trans1;
IMAD.WIDE R28, R29, 0x8, R12 ?WAIT4_END_GROUP;
IMAD.WIDE R38, R45, 0x8, R38 ?trans1;
LDG.E.64 R2, desc[UR6][R28.64] &wr=0x2 ?trans3;
IMAD.WIDE R12, R47, 0x8, R12 ?trans1;
LDG.E.64 R32, desc[UR6][R28.64+0x8] &wr=0x2 ?trans4;
LDG.E.64 R30, desc[UR6][R28.64+0x10] &wr=0x2 ?trans4;
LDG.E.64 R52, desc[UR6][R28.64+0x18] &wr=0x2 ?trans4;
LDG.E.64 R38, desc[UR6][R38.64] &wr=0x2 ?trans4;
LDG.E.64 R44, desc[UR6][R12.64] &wr=0x2 ?trans4;
LDG.E.64 R46, desc[UR6][R12.64+0x8] &wr=0x2 ?trans1;
DFMA R50, R8, R40, R50 &req={3} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R48, R40, R10, R48 &req={5} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R42, R40, R6, R42 &req={2} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R24, R40, R34, R24 &rd=0x0 ?trans2;
LDG.E.64 R40, desc[UR6][R12.64+0x10] &req={0} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R8, R36, R20 &req={4} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R36, R10, R18 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R36, R6, R16 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R36, R34, R4 &rd=0x0 ?trans2;
LDG.E.64 R36, desc[UR6][R12.64+0x18] &req={0} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R26, R8, R2 &wr=0x0 ?trans2;
STG.E.64 desc[UR6][R28.64], R2 &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R32, R26, R10, R32 &wr=0x0 ?trans2;
STG.E.64 desc[UR6][R28.64+0x8], R32 &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R30, R26, R6, R30 &wr=0x0 ?trans2;
STG.E.64 desc[UR6][R28.64+0x10], R30 &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R26, R26, R34, R52 &wr=0x0 ?trans2;
STG.E.64 desc[UR6][R28.64+0x18], R26 &req={0} ?trans4;
STG.E.64 desc[UR6][R22.64], R50 ?trans4;
STG.E.64 desc[UR6][R22.64+0x8], R48 ?trans4;
STG.E.64 desc[UR6][R22.64+0x10], R42 ?trans4;
STG.E.64 desc[UR6][R22.64+0x18], R24 ?trans4;
STG.E.64 desc[UR6][R14.64], R20 ?trans4;
STG.E.64 desc[UR6][R14.64+0x8], R18 ?trans4;
STG.E.64 desc[UR6][R14.64+0x10], R16 ?trans4;
STG.E.64 desc[UR6][R14.64+0x18], R4 ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R38, R44 &wr=0x0 ?trans2;
STG.E.64 desc[UR6][R12.64], R8 &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R46, R38, R10, R46 &wr=0x0 ?trans2;
STG.E.64 desc[UR6][R12.64+0x8], R46 &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R40, R38, R6, R40 &req={2} &wr=0x0 ?trans2;
STG.E.64 desc[UR6][R12.64+0x10], R40 &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R36, R38, R34, R36 &req={3} &wr=0x0 ?trans2;
STG.E.64 desc[UR6][R12.64+0x18], R36 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x9d0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: vectorProd(double const*, double const*, double const*, double const*, double*, int)
_Z10vectorProdPKdS0_S0_S0_Pdi:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x3c
s_load_b32 s2, s[0:1], 0x28
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s4, s3, 16
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[3:4], null, s14, s3, v[1:2]
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
s_mov_b32 s3, exec_lo
v_max_i32_e32 v0, v3, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s2, v0
s_cbranch_execz .LBB0_9
s_lshl_b32 s2, s2, 2
s_load_b64 s[10:11], s[0:1], 0x20
s_or_b32 s8, s2, 2
s_load_b256 s[0:7], s[0:1], 0x0
v_mul_lo_u32 v0, v3, s8
v_lshlrev_b32_e32 v2, 2, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b32_e32 v0, 2, v0
v_add3_u32 v0, v0, s8, v2
v_mov_b32_e32 v2, 16
s_waitcnt lgkmcnt(0)
s_add_u32 s9, s10, 8
s_delay_alu instid0(VALU_DEP_2)
v_mov_b32_e32 v4, v0
s_addc_u32 s10, s11, 0
s_mov_b32 s11, 0
.LBB0_2:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v5, 31, v4
s_mov_b32 s12, 0
v_lshlrev_b64 v[5:6], 3, v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v5, vcc_lo, s9, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s10, v6, vcc_lo
.LBB0_3:
global_load_b64 v[7:8], v[5:6], off
v_add_co_u32 v5, vcc_lo, v5, 8
v_add_nc_u32_e32 v9, s12, v2
v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
s_add_i32 s12, s12, 8
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lg_u32 s12, 32
s_waitcnt vmcnt(0)
scratch_store_b64 v9, v[7:8], off
s_cbranch_scc1 .LBB0_3
v_add_nc_u32_e32 v4, s8, v4
v_add_nc_u32_e32 v2, 32, v2
s_add_i32 s11, s11, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lg_u32 s11, 4
s_cbranch_scc1 .LBB0_2
v_ashrrev_i32_e32 v4, 31, v3
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[9:10], 3, v[3:4]
v_lshlrev_b64 v[17:18], 3, v[1:2]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v1, vcc_lo, s0, v9
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v10, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v3, vcc_lo, s0, v17
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v18, vcc_lo
v_add_co_u32 v5, vcc_lo, s2, v9
v_add_co_ci_u32_e32 v6, vcc_lo, s3, v10, vcc_lo
v_add_co_u32 v11, vcc_lo, s4, v9
v_add_co_ci_u32_e32 v12, vcc_lo, s5, v10, vcc_lo
v_add_co_u32 v13, vcc_lo, s6, v9
v_add_co_ci_u32_e32 v14, vcc_lo, s7, v10, vcc_lo
v_add_co_u32 v19, vcc_lo, s2, v17
v_add_co_ci_u32_e32 v20, vcc_lo, s3, v18, vcc_lo
s_clause 0x1
global_load_b64 v[37:38], v[1:2], off
global_load_b64 v[35:36], v[3:4], off
scratch_load_b128 v[1:4], off, off offset:16
global_load_b64 v[39:40], v[5:6], off
scratch_load_b128 v[5:8], off, off offset:48
global_load_b64 v[41:42], v[11:12], off
scratch_load_b128 v[9:12], off, off offset:80
global_load_b64 v[43:44], v[13:14], off
scratch_load_b128 v[13:16], off, off offset:112
global_load_b64 v[45:46], v[19:20], off
v_add_co_u32 v19, vcc_lo, s4, v17
v_add_co_ci_u32_e32 v20, vcc_lo, s5, v18, vcc_lo
v_add_co_u32 v21, vcc_lo, s6, v17
v_add_co_ci_u32_e32 v22, vcc_lo, s7, v18, vcc_lo
global_load_b64 v[47:48], v[19:20], off
scratch_load_b128 v[17:20], off, off offset:32
global_load_b64 v[49:50], v[21:22], off
s_clause 0x2
scratch_load_b128 v[21:24], off, off offset:64
scratch_load_b128 v[25:28], off, off offset:96
scratch_load_b128 v[29:32], off, off offset:128
s_mov_b32 s0, 0
s_waitcnt vmcnt(13)
v_fma_f64 v[33:34], v[37:38], v[35:36], v[1:2]
s_waitcnt vmcnt(9)
v_fma_f64 v[9:10], v[35:36], v[41:42], v[9:10]
v_fma_f64 v[5:6], v[35:36], v[39:40], v[5:6]
s_waitcnt vmcnt(7)
v_fma_f64 v[13:14], v[35:36], v[43:44], v[13:14]
s_waitcnt vmcnt(6)
v_fma_f64 v[35:36], v[37:38], v[45:46], v[3:4]
v_fma_f64 v[7:8], v[39:40], v[45:46], v[7:8]
v_fma_f64 v[11:12], v[41:42], v[45:46], v[11:12]
v_fma_f64 v[15:16], v[43:44], v[45:46], v[15:16]
v_mov_b32_e32 v3, 16
s_waitcnt vmcnt(4)
v_fma_f64 v[17:18], v[37:38], v[47:48], v[17:18]
s_waitcnt vmcnt(3)
v_fma_f64 v[19:20], v[37:38], v[49:50], v[19:20]
s_waitcnt vmcnt(2)
v_fma_f64 v[21:22], v[39:40], v[47:48], v[21:22]
v_fma_f64 v[23:24], v[39:40], v[49:50], v[23:24]
s_waitcnt vmcnt(1)
v_fma_f64 v[25:26], v[41:42], v[47:48], v[25:26]
v_fma_f64 v[27:28], v[41:42], v[49:50], v[27:28]
s_waitcnt vmcnt(0)
v_fma_f64 v[29:30], v[43:44], v[47:48], v[29:30]
v_fma_f64 v[31:32], v[43:44], v[49:50], v[31:32]
s_clause 0x7
scratch_store_b128 off, v[33:36], off offset:16
scratch_store_b128 off, v[17:20], off offset:32
scratch_store_b128 off, v[5:8], off offset:48
scratch_store_b128 off, v[21:24], off offset:64
scratch_store_b128 off, v[9:12], off offset:80
scratch_store_b128 off, v[25:28], off offset:96
scratch_store_b128 off, v[13:16], off offset:112
scratch_store_b128 off, v[29:32], off offset:128
.LBB0_6:
v_ashrrev_i32_e32 v1, 31, v0
s_mov_b32 s1, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 3, v[0:1]
v_add_co_u32 v1, vcc_lo, s9, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s10, v2, vcc_lo
.LBB0_7:
v_add_nc_u32_e32 v4, s1, v3
s_add_i32 s1, s1, 8
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lg_u32 s1, 32
scratch_load_b64 v[4:5], v4, off
s_waitcnt vmcnt(0)
global_store_b64 v[1:2], v[4:5], off
v_add_co_u32 v1, vcc_lo, v1, 8
v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
s_cbranch_scc1 .LBB0_7
v_add_nc_u32_e32 v0, s8, v0
v_add_nc_u32_e32 v3, 32, v3
s_add_i32 s0, s0, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lg_u32 s0, 4
s_cbranch_scc1 .LBB0_6
.LBB0_9:
s_endpgm
| vectorProd | 3,406 | 3,304 | stackv2-00000-of-00015 |
// Demangled: mult(float*, float*, float*)
Function : _Z4multPfS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R7, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
S2R R2, SR_TID.Y &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans8;
S2UR UR5, SR_CTAID.Y &wr=0x2 ?trans8;
LDC R3, c[0x0][0x364] &wr=0x2 ?trans1;
IMAD R7, R0, UR4, R7 &req={1} ?WAIT2_END_GROUP;
IMAD R0, R3, UR5, R2 &req={2} ?WAIT5_END_GROUP;
VIMNMX.U32 R2, R7, R0, !PT ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R2, 0x3ff, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans1;
SHF.L.U32 R7, R7, 0xa, RZ ?trans1;
HFMA2 R6, -RZ, RZ, 0, 0 ?trans1;
MOV R32, RZ ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans4;
LDC.64 R2, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R4, R7, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
IADD.64 R4, R4, 0x20 ?trans2;
IMAD.WIDE.U32 R2, R0, 0x4, R2 &req={2} ?WAIT5_END_GROUP;
IADD.64 R2, R2, 0x8000 &req={1} ?WAIT8_END_GROUP;
LDG.E R27, desc[UR4][R4.64+-0x20] &wr=0x2 ?trans4;
LDG.E R28, desc[UR4][R2.64+-0x8000] &wr=0x2 ?trans4;
LDG.E R31, desc[UR4][R4.64+-0x1c] &wr=0x3 ?trans4;
LDG.E R30, desc[UR4][R2.64+-0x7000] &wr=0x3 ?trans4;
LDG.E R29, desc[UR4][R4.64+-0x18] &wr=0x4 ?trans4;
LDG.E R26, desc[UR4][R2.64+-0x6000] &wr=0x4 ?trans4;
LDG.E R8, desc[UR4][R4.64+-0x14] &wr=0x5 ?trans4;
LDG.E R9, desc[UR4][R2.64+-0x5000] &wr=0x5 ?trans4;
LDG.E R10, desc[UR4][R4.64+-0x10] &wr=0x5 ?trans4;
LDG.E R11, desc[UR4][R2.64+-0x4000] &wr=0x5 ?trans4;
LDG.E R12, desc[UR4][R4.64+-0xc] &wr=0x5 ?trans4;
LDG.E R13, desc[UR4][R2.64+-0x3000] &wr=0x5 ?trans4;
LDG.E R14, desc[UR4][R4.64+-0x8] &wr=0x5 ?trans4;
LDG.E R15, desc[UR4][R2.64+-0x2000] &wr=0x5 ?trans4;
LDG.E R16, desc[UR4][R4.64+-0x4] &wr=0x5 ?trans4;
LDG.E R17, desc[UR4][R2.64+-0x1000] &wr=0x5 ?trans4;
LDG.E R18, desc[UR4][R4.64] &wr=0x5 ?trans4;
LDG.E R19, desc[UR4][R2.64] &wr=0x5 ?trans4;
LDG.E R20, desc[UR4][R4.64+0x4] &wr=0x5 ?trans4;
LDG.E R21, desc[UR4][R2.64+0x1000] &wr=0x5 ?trans4;
LDG.E R22, desc[UR4][R4.64+0x8] &wr=0x5 ?trans4;
LDG.E R23, desc[UR4][R2.64+0x2000] &wr=0x5 ?trans4;
LDG.E R24, desc[UR4][R4.64+0xc] &wr=0x5 ?trans4;
LDG.E R25, desc[UR4][R2.64+0x3000] &wr=0x5 ?trans4;
LDG.E R33, desc[UR4][R2.64+0x6000] &wr=0x5 ?trans1;
FFMA R28, R27, R28, R6 &req={2} ?WAIT3_END_GROUP;
LDG.E R6, desc[UR4][R4.64+0x10] &wr=0x2 ?trans4;
LDG.E R27, desc[UR4][R2.64+0x4000] &wr=0x2 ?trans1;
FFMA R30, R31, R30, R28 &req={3} ?WAIT3_END_GROUP;
LDG.E R28, desc[UR4][R4.64+0x14] &wr=0x3 ?trans4;
LDG.E R31, desc[UR4][R2.64+0x5000] &wr=0x3 ?trans1;
FFMA R35, R29, R26, R30 &req={4} ?WAIT3_END_GROUP;
LDG.E R30, desc[UR4][R4.64+0x18] &wr=0x4 ?trans4;
LDG.E R26, desc[UR4][R4.64+0x1c] &rd=0x0 &wr=0x4 ?trans4;
LDG.E R29, desc[UR4][R2.64+0x7000] &rd=0x1 &wr=0x4 ?trans1;
FFMA R9, R8, R9, R35 &req={5} ?WAIT4_END_GROUP;
FFMA R9, R10, R11, R9 ?WAIT4_END_GROUP;
FFMA R9, R12, R13, R9 ?WAIT4_END_GROUP;
FFMA R9, R14, R15, R9 ?WAIT4_END_GROUP;
FFMA R9, R16, R17, R9 ?WAIT4_END_GROUP;
FFMA R9, R18, R19, R9 ?trans1;
IADD3 R32, PT, PT, R32, 0x10, RZ ?WAIT3_END_GROUP;
FFMA R9, R20, R21, R9 ?trans2;
ISETP.NE.AND P0, PT, R32, 0x400, PT ?trans2;
FFMA R9, R22, R23, R9 ?WAIT4_END_GROUP;
FFMA R9, R24, R25, R9 ?trans1;
IADD.64 R4, R4, 0x40 &req={0} ?trans2;
IADD.64 R2, R2, 0x10000 &req={1} ?trans2;
FFMA R9, R6, R27, R9 &req={2} ?WAIT4_END_GROUP;
FFMA R9, R28, R31, R9 &req={3} ?WAIT4_END_GROUP;
FFMA R9, R30, R33, R9 &req={4} ?WAIT4_END_GROUP;
FFMA R6, R26, R29, R9 ?trans1;
@P0 BRA 0x160 ?trans6;
LDC.64 R2, c[0x0][0x390] &wr=0x0 ?trans1;
IADD3 R7, PT, PT, R0, R7, RZ ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R2, R7, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R6 ?trans1;
EXIT ?trans5;
BRA 0x500;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: mult(float*, float*, float*)
_Z4multPfS_S_:
s_load_b32 s2, s[0:1], 0x24
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v2, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[3:4], null, s14, s2, v[1:2]
s_mov_b32 s2, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
v_or_b32_e32 v1, v0, v3
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_u32_e32 0x400, v1
s_cbranch_execz .LBB0_4
s_load_b128 s[4:7], s[0:1], 0x0
v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v3, 10, v3
s_load_b64 s[0:1], s[0:1], 0x10
s_mov_b64 s[2:3], 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_mov_b32 v1, v0 :: v_dual_mov_b32 v4, v2
v_lshlrev_b64 v[5:6], 2, v[3:4]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v5, vcc_lo, s4, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
.LBB0_2:
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[7:8], 2, v[1:2]
v_add_co_u32 v9, vcc_lo, v5, s2
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v10, vcc_lo, s3, v6, vcc_lo
s_add_u32 s2, s2, 4
v_add_co_u32 v7, vcc_lo, s6, v7
s_delay_alu instid0(VALU_DEP_4)
v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
s_addc_u32 s3, s3, 0
s_cmpk_eq_i32 s2, 0x1000
global_load_b32 v9, v[9:10], off
global_load_b32 v7, v[7:8], off
s_waitcnt vmcnt(0)
v_dual_fmac_f32 v4, v9, v7 :: v_dual_add_nc_u32 v1, 0x400, v1
s_cbranch_scc0 .LBB0_2
v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, v3, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v4, off
.LBB0_4:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| mult | 2,285 | 1,097 | stackv2-00000-of-00015 |
// Demangled: GPU_FloydWarshall(int, int*, int*, int)
Function : _Z17GPU_FloydWarshalliPiS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_CTAID.Y &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x364] &wr=0x1 ?trans1;
S2R R3, SR_TID.Y &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x360] &wr=0x2 ?trans1;
S2R R2, SR_CTAID.X &wr=0x2 ?trans1;
LDCU UR6, c[0x0][0x398] &wr=0x3 ?trans1;
S2R R5, SR_TID.X &wr=0x2 ?trans1;
IMAD R0, R0, UR4, R3 &req={1} ?trans2;
IMAD R3, R2, UR5, R5 &req={2} ?WAIT5_END_GROUP;
VIMNMX.S32 R2, R0, R3, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R2, UR6, PT &req={3} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R11, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD R9, R0, UR6, R3 ?WAIT6_END_GROUP;
LDC.64 R6, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD R5, R0, UR6, R11 &req={0} ?trans2;
IMAD R11, R11, UR6, R3 ?trans2;
IMAD.WIDE R2, R5, 0x4, R6 &req={2} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R11, 0x4, R6.reuse ?trans2;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans2;
IMAD.WIDE R6, R9, 0x4, R6 ?trans2;
LDG.E R5, desc[UR4][R4.64] &wr=0x2 ?trans4;
LDG.E R0, desc[UR4][R6.64] &wr=0x3 ?trans1;
IADD3 R13, PT, PT, R2, R5, RZ &req={2} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R13, R0, PT &req={3} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDCU.64 UR6, c[0x0][0x390] &wr=0x0 ?trans1;
SHF.R.S32.HI R0, RZ, 0x1f, R11 ?trans1;
STG.E desc[UR4][R6.64], R13 ?trans1;
LEA R2, P0, R11, UR6, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R3, R11, UR7, R0, 0x2, P0 ?WAIT6_END_GROUP;
LDG.E R3, desc[UR4][R2.64] &wr=0x2 ?trans1;
SHF.R.S32.HI R0, RZ, 0x1f, R9 ?trans2;
LEA R4, P0, R9, UR6, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R5, R9, UR7, R0, 0x2, P0 ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R3 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x270;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: GPU_FloydWarshall(int, int*, int*, int)
_Z17GPU_FloydWarshalliPiS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s4, s[0:1], 0x18
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v4, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_and_b32 s2, s2, 0xffff
v_mad_u64_u32 v[2:3], null, s15, s3, v[1:2]
v_mad_u64_u32 v[0:1], null, s14, s2, v[4:5]
s_mov_b32 s2, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_max_i32_e32 v1, v2, v0
v_cmpx_gt_i32_e64 s4, v1
s_cbranch_execz .LBB0_3
s_load_b32 s5, s[0:1], 0x0
v_mul_lo_u32 v5, v2, s4
s_load_b128 s[0:3], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v1, s5, v5
v_add_nc_u32_e32 v5, v5, v0
v_mad_u64_u32 v[3:4], null, s4, s5, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v6, 31, v5
v_lshlrev_b64 v[7:8], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v4, 31, v3
v_add_co_u32 v7, vcc_lo, s0, v7
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[0:1], 2, v[3:4]
v_lshlrev_b64 v[2:3], 2, v[5:6]
v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
v_add_co_u32 v9, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_ci_u32_e32 v10, vcc_lo, s1, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s0, v2
s_clause 0x1
global_load_b32 v6, v[7:8], off
global_load_b32 v7, v[9:10], off
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v3, vcc_lo
global_load_b32 v8, v[4:5], off
s_waitcnt vmcnt(1)
v_add_nc_u32_e32 v6, v7, v6
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmp_lt_i32_e32 vcc_lo, v6, v8
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_3
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_store_b32 v[4:5], v6, off
global_load_b32 v4, v[0:1], off
v_add_co_u32 v0, vcc_lo, s2, v2
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v3, vcc_lo
s_waitcnt vmcnt(0)
global_store_b32 v[0:1], v4, off
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| GPU_FloydWarshall | 1,025 | 1,191 | stackv2-00000-of-00015 |
// Demangled: add_block_sums(unsigned long long*, unsigned long long*, unsigned long long, unsigned long long*)
Function : _Z14add_block_sumsPyS_yS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R4, SR_TID.X &wr=0x0 ?trans7;
LDC.64 R8, c[0x0][0x390] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
S2R R13, SR_CTAID.X &wr=0x3 ?trans6;
LDC.64 R6, c[0x0][0x398] &wr=0x4 ?trans8;
LDC.64 R10, c[0x0][0x380] &wr=0x5 ?trans1;
IADD3 R4, PT, PT, R4, R4, RZ &req={0} ?WAIT5_END_GROUP;
IMAD R4, R13, 0x400, R4 &req={3} ?WAIT5_END_GROUP;
IADD3 R2, PT, PT, R4, 0x1, RZ ?trans2;
SHF.R.S32.HI R5, RZ, 0x1f, R4 ?trans2;
SHF.R.S32.HI R3, RZ, 0x1f, R2 ?WAIT3_END_GROUP;
ISETP.GE.U64.AND P0, PT, R4, R8.reuse, PT &req={1} ?trans2;
IMAD.WIDE R4, R4, 0x8, R10 &req={5} ?trans1;
ISETP.GE.U64.AND P1, PT, R2, R8, PT ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R2, R13, 0x8, R6 &req={4} ?WAIT6_END_GROUP;
LDG.E.64 R2, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans4;
@!P0 LDG.E.64 R6, desc[UR6][R4.64] &wr=0x3 ?trans4;
@!P1 LDG.E.64 R8, desc[UR6][R4.64+0x8] &wr=0x4 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR4, 0x400 ?WAIT2_END_GROUP;
ULEA UR4, UR5, UR4, 0x18 &req={0} ?WAIT9_END_GROUP;
STS.64 [UR4], R2 &req={2} ?trans1;
@!P0 IADD.64 R6, R2.reuse, R6 &req={3} ?trans2;
@!P1 IADD.64 R8, R2, R8 &req={4} ?WAIT4_END_GROUP;
@!P0 STG.E.64 desc[UR6][R4.64], R6 ?trans4;
@!P1 STG.E.64 desc[UR6][R4.64+0x8], R8 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
EXIT ?trans5;
BRA 0x1d0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: add_block_sums(unsigned long long*, unsigned long long*, unsigned long long, unsigned long long*)
_Z14add_block_sumsPyS_yS_:
s_load_b128 s[4:7], s[0:1], 0x10
s_mov_b32 s8, s15
s_ashr_i32 s9, s15, 31
v_lshlrev_b32_e32 v0, 1, v0
s_lshl_b64 s[2:3], s[8:9], 3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshl_add_u32 v2, s8, 10, v0
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 3, v[2:3]
s_waitcnt lgkmcnt(0)
s_add_u32 s6, s6, s2
s_addc_u32 s7, s7, s3
s_load_b64 s[2:3], s[0:1], 0x0
s_load_b64 s[0:1], s[6:7], 0x0
s_mov_b32 s6, exec_lo
v_cmpx_gt_u64_e64 s[4:5], v[2:3]
s_cbranch_execz .LBB1_2
s_waitcnt lgkmcnt(0)
v_add_co_u32 v3, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v4, vcc_lo, s3, v1, vcc_lo
global_load_b64 v[5:6], v[3:4], off
s_waitcnt vmcnt(0)
v_add_co_u32 v5, vcc_lo, v5, s0
v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
global_store_b64 v[3:4], v[5:6], off
.LBB1_2:
s_or_b32 exec_lo, exec_lo, s6
v_or_b32_e32 v2, 1, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_cmp_gt_u64_e32 vcc_lo, s[4:5], v[2:3]
s_and_saveexec_b32 s4, vcc_lo
s_cbranch_execz .LBB1_4
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_load_b64 v[2:3], v[0:1], off offset:8
s_waitcnt vmcnt(0)
v_add_co_u32 v2, vcc_lo, v2, s0
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
global_store_b64 v[0:1], v[2:3], off offset:8
.LBB1_4:
s_or_b32 exec_lo, exec_lo, s4
s_waitcnt lgkmcnt(0)
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_endpgm
| add_block_sums | 832 | 850 | stackv2-00000-of-00015 |
// Demangled: block_scan(unsigned long long*, unsigned long long*, unsigned long long, unsigned long long*)
Function : _Z10block_scanPyS_yS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x390] &wr=0x2 ?trans6;
LDC.64 R2, c[0x0][0x388] &wr=0x3 ?trans1;
S2R R16, SR_TID.X &wr=0x4 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x5 ?trans1;
IMAD.SHL.U32 R7, R0, 0x400, RZ &req={1} ?trans1;
IADD3 R8, PT, PT, R16, R16, RZ &req={4} ?WAIT4_END_GROUP;
IADD3 R4, PT, PT, R7, R8, RZ ?WAIT4_END_GROUP;
SHF.R.S32.HI R5, RZ, 0x1f, R4 ?trans1;
IMAD.WIDE R10, R4, 0x8, R2 &req={3} ?WAIT4_END_GROUP;
ISETP.GE.U64.AND P1, PT, R4, UR8, PT &req={2} ?WAIT14_END_GROUP;
@!P1 LDG.E R9, desc[UR6][R10.64] &req={5} &wr=0x2 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
IADD3 R12, PT, PT, R4, 0x1, RZ ?trans1;
BSSY.RECONVERGENT B0, 0x1d0 ?trans3;
SHF.R.S32.HI R13, RZ, 0x1f, R12 ?WAIT5_END_GROUP;
ISETP.GE.U64.AND P0, PT, R12, UR8, PT ?trans2;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?WAIT6_END_GROUP;
LEA R6, R16, UR4, 0x3 ?WAIT5_END_GROUP;
@!P1 STS [R6], R9 &req={2} &rd=0x1 ?trans4;
@P1 STS [R6], RZ &rd=0x1 ?trans1;
@P0 BRA 0x1b0 &req={0} ?trans5;
LDG.E R11, desc[UR6][R10.64+0x8] &wr=0x2 ?trans4;
STS [R6+0x4], R11 &req={2} &rd=0x2 ?trans1;
BRA 0x1c0 ?trans5;
STS [R6+0x4], RZ &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P2, PT, R16.reuse, 0x1ff, PT ?trans1;
ISETP.GT.U32.AND P3, PT, R16, 0xff, PT ?trans1;
IADD3 R9, PT, PT, R8, 0x1, RZ &req={1} ?trans2;
P2R R15, PR, RZ, 0x1 ?trans1;
ISETP.GT.U32.AND P0, PT, R16.reuse, 0x3f, PT ?trans1;
ISETP.GT.U32.AND P4, PT, R16.reuse, 0x7, PT ?trans1;
LEA R9, R9, UR4, 0x3 ?trans1;
LDCU.64 UR10, c[0x0][0x380] &wr=0x1 ?trans1;
ISETP.GT.U32.AND P5, PT, R16.reuse, 0x3, PT ?trans1;
ISETP.GT.U32.AND P6, PT, R16, 0x1, PT ?trans1;
BSSY.RECONVERGENT B0, 0xc60 ?trans7;
@!P0 LEA R18, R8, UR4, 0x5 ?trans1;
@!P2 LDS.64 R10, [R6] &req={2} &wr=0x2 ?trans2;
@!P2 IADD3 R11, PT, PT, R10, R11, RZ &req={2} ?WAIT5_END_GROUP;
@!P2 STS [R6+0x4], R11 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P2, PT, R16, 0x7f, PT ?WAIT13_END_GROUP;
@!P2 LEA R17, R8, UR4, 0x4 ?trans1;
@!P3 LDS R10, [R9+-0x4] ?trans4;
@!P3 LDS R13, [R9+0x4] &wr=0x2 ?trans2;
@!P3 IADD3 R10, PT, PT, R10, R13, RZ &req={2} ?WAIT5_END_GROUP;
@!P3 STS [R9+0x4], R10 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P3, PT, R16, 0xf, PT ?WAIT5_END_GROUP;
@!P2 LDS R12, [R17+0xc] ?trans4;
@!P2 LDS R13, [R17+0x1c] &wr=0x2 ?trans2;
@!P2 IADD3 R12, PT, PT, R12, R13, RZ &req={2} ?WAIT5_END_GROUP;
@!P2 STS [R17+0x1c], R12 &rd=0x2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P2, PT, R16, 0x1f, PT ?trans1;
@!P3 LEA R17, R8, UR4, 0x7 &req={2} ?WAIT12_END_GROUP;
@!P2 LEA R19, R8, UR4, 0x6 ?trans1;
@!P0 LDS R11, [R18+0x1c] ?trans4;
@!P0 LDS R14, [R18+0x3c] &wr=0x2 ?trans2;
@!P0 IADD3 R11, PT, PT, R11, R14, RZ &req={2} ?WAIT5_END_GROUP;
@!P0 STS [R18+0x3c], R11 &rd=0x2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.NE.AND P0, PT, R16, RZ, PT ?trans1;
@!P4 LEA R18, R8, UR4, 0x8 &req={2} ?WAIT4_END_GROUP;
@!P2 LDS R10, [R19+0x3c] ?trans4;
@!P2 LDS R13, [R19+0x7c] &wr=0x2 ?trans2;
@!P2 IADD3 R10, PT, PT, R10, R13, RZ &req={2} ?WAIT5_END_GROUP;
@!P2 STS [R19+0x7c], R10 &rd=0x2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
@!P5 LEA R19, R8, UR4, 0x9 &req={2} ?WAIT5_END_GROUP;
@!P3 LDS R12, [R17+0x7c] ?trans4;
@!P3 LDS R13, [R17+0xfc] &wr=0x2 ?trans2;
@!P3 IADD3 R12, PT, PT, R12, R13, RZ &req={2} ?WAIT5_END_GROUP;
@!P3 STS [R17+0xfc], R12 &rd=0x2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
@!P6 LEA R17, R8, UR4, 0xa &req={2} ?WAIT5_END_GROUP;
@!P4 LDS R11, [R18+0xfc] ?trans4;
@!P4 LDS R14, [R18+0x1fc] &wr=0x2 ?trans2;
@!P4 IADD3 R11, PT, PT, R11, R14, RZ &req={2} ?WAIT5_END_GROUP;
@!P4 STS [R18+0x1fc], R11 &rd=0x2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
@!P6 LEA R18, R8, UR4, 0xa &req={2} ?WAIT5_END_GROUP;
@!P5 LDS R10, [R19+0x1fc] ?trans4;
@!P5 LDS R13, [R19+0x3fc] &wr=0x2 ?trans2;
@!P5 IADD3 R10, PT, PT, R10, R13, RZ &req={2} ?WAIT5_END_GROUP;
@!P5 STS [R19+0x3fc], R10 &rd=0x2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
@!P4 LEA R19, R8, UR4, 0x8 &req={2} ?WAIT5_END_GROUP;
@!P6 LDS R12, [R17+0x3fc] ?trans4;
@!P6 LDS R13, [R17+0x7fc] &wr=0x2 ?trans2;
@!P6 IADD3 R12, PT, PT, R12, R13, RZ &req={2} ?WAIT5_END_GROUP;
@!P6 STS [R17+0x7fc], R12 &rd=0x2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
@!P5 LEA R17, R8, UR4, 0x9 &req={2} ?WAIT5_END_GROUP;
@!P0 STS [UR4+0xffc], RZ ?trans2;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P0 LDS R11, [UR4+0x7fc] ?trans4;
@!P0 LDS R10, [UR4+0xffc] &wr=0x2 ?trans2;
@!P0 IADD3 R11, PT, PT, R11, R10, RZ &req={2} ?WAIT2_END_GROUP;
@!P0 STS [UR4+0x7fc], R10 ?trans4;
@!P0 STS [UR4+0xffc], R11 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.NE.AND P0, PT, R15, RZ, PT ?WAIT5_END_GROUP;
@!P6 LDS R12, [R18+0x3fc] ?trans4;
@!P6 LDS R13, [R18+0x7fc] &wr=0x2 ?trans2;
@!P6 IADD3 R12, PT, PT, R12, R13, RZ &req={2} ?trans2;
@!P6 STS [R18+0x3fc], R13 ?trans4;
@!P6 STS [R18+0x7fc], R12 &rd=0x2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P6, PT, R16, 0x7f, PT ?trans1;
@!P3 LEA R18, R8, UR4, 0x7 &req={2} ?WAIT4_END_GROUP;
@!P5 LDS R14, [R17+0x1fc] ?trans4;
@!P5 LDS R15, [R17+0x3fc] &wr=0x2 ?trans2;
@!P5 IADD3 R14, PT, PT, R14, R15, RZ &req={2} ?trans2;
@!P5 STS [R17+0x1fc], R15 ?trans4;
@!P5 STS [R17+0x3fc], R14 &rd=0x2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P5, PT, R16, 0x3f, PT ?trans1;
@!P2 LEA R14, R8, UR4, 0x6 &req={2} ?WAIT12_END_GROUP;
@!P5 LEA R15, R8, UR4, 0x5 ?trans1;
@!P4 LDS R10, [R19+0xfc] ?trans4;
@!P4 LDS R11, [R19+0x1fc] &wr=0x2 ?trans2;
@!P4 IADD3 R10, PT, PT, R10, R11, RZ &req={2} ?trans2;
@!P4 STS [R19+0xfc], R11 ?trans4;
@!P4 STS [R19+0x1fc], R10 &rd=0x2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
@!P6 LEA R19, R8, UR4, 0x4 &req={2} ?WAIT5_END_GROUP;
@!P3 LDS R12, [R18+0x7c] ?trans4;
@!P3 LDS R13, [R18+0xfc] &wr=0x2 ?trans2;
@!P3 IADD3 R12, PT, PT, R12, R13, RZ &req={2} ?trans2;
@!P3 STS [R18+0x7c], R13 ?trans4;
@!P3 STS [R18+0xfc], R12 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P2 LDS R11, [R14+0x3c] ?trans4;
@!P2 LDS R10, [R14+0x7c] &wr=0x2 ?trans2;
@!P2 IADD3 R11, PT, PT, R11, R10, RZ &req={2} ?WAIT2_END_GROUP;
@!P2 STS [R14+0x3c], R10 ?trans4;
@!P2 STS [R14+0x7c], R11 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P5 LDS R13, [R15+0x1c] ?trans4;
@!P5 LDS R12, [R15+0x3c] &wr=0x2 ?trans2;
@!P5 IADD3 R13, PT, PT, R13, R12, RZ &req={2} ?WAIT2_END_GROUP;
@!P5 STS [R15+0x1c], R12 ?trans4;
@!P5 STS [R15+0x3c], R13 &rd=0x2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P5, PT, R16, 0xff, PT ?trans1;
@!P0 MOV R15, RZ &req={2} ?WAIT4_END_GROUP;
@!P6 LDS R8, [R19+0xc] ?trans4;
@!P6 LDS R11, [R19+0x1c] &wr=0x2 ?trans2;
@!P6 IADD3 R8, PT, PT, R8, R11, RZ &req={2} ?trans2;
@!P6 STS [R19+0xc], R11 ?trans4;
@!P6 STS [R19+0x1c], R8 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P6, PT, R16, 0x1ff, PT ?WAIT5_END_GROUP;
@!P5 LDS R10, [R9+-0x4] ?trans4;
@!P5 LDS R17, [R9+0x4] &wr=0x2 ?trans2;
@!P5 IADD3 R18, PT, PT, R10, R17, RZ &req={2} ?trans2;
@!P5 STS [R9+-0x4], R17 ?trans1;
LEA R10, P2, R4, UR10, 0x3 &req={1} ?WAIT3_END_GROUP;
@!P5 STS [R9+0x4], R18 ?trans1;
LEA.HI.X R11, R4, UR11, R5, 0x3, P2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P6 LDS.64 R12, [R6] &wr=0x1 ?trans2;
@!P6 IADD3 R21, PT, PT, R12, R13.reuse, RZ &req={1} ?trans1;
MOV R20, R13 ?trans1;
@!P1 MOV R13, RZ ?WAIT4_END_GROUP;
@!P6 STS.64 [R6], R20 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.NE.AND P6, PT, R16, RZ, PT ?WAIT5_END_GROUP;
@!P1 LDS R12, [R6] &wr=0x1 ?trans4;
@!P0 LDS R14, [R6+0x4] &wr=0x2 ?trans4;
@!P1 STG.E.64 desc[UR6][R10.64], R12 &req={1} &rd=0x1 ?trans4;
@!P0 STG.E.64 desc[UR6][R10.64+0x8], R14 &req={2} &rd=0x1 ?trans1;
@P6 BRA 0xc50 ?trans5;
IADD3 R4, PT, PT, R7, 0x3ff, RZ ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?WAIT5_END_GROUP;
ISETP.GE.U64.AND P0, PT, R4, UR8, PT ?WAIT14_END_GROUP;
@P0 BRA 0xc00 ?trans5;
IMAD.WIDE.U32 R4, R7, 0x8, R2 ?trans2;
LDS R2, [UR4+0xffc] &wr=0x2 ?trans1;
LDC.64 R6, c[0x0][0x398] &req={0} &wr=0x0 ?trans3;
LDG.E.64 R4, desc[UR6][R4.64+0x1ff8] &wr=0x2 ?trans1;
MOV R3, RZ ?trans1;
IMAD.WIDE.U32 R6, R0, 0x8, R6 &req={0} ?WAIT4_END_GROUP;
IADD.64 R2, R2, R4 &req={2} ?WAIT6_END_GROUP;
STG.E.64 desc[UR6][R6.64], R2 &rd=0x2 ?trans1;
BRA 0xc50 ?trans5;
LDS R2, [UR4+0xffc] &wr=0x2 ?trans1;
LDC.64 R4, c[0x0][0x398] &wr=0x3 ?trans1;
MOV R3, RZ ?trans1;
IMAD.WIDE.U32 R4, R0, 0x8, R4 &req={3} ?WAIT5_END_GROUP;
STG.E.64 desc[UR6][R4.64], R2 &req={2} &rd=0x3 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
EXIT ?trans5;
BRA 0xc80;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: block_scan(unsigned long long*, unsigned long long*, unsigned long long, unsigned long long*)
_Z10block_scanPyS_yS_:
s_load_b256 s[4:11], s[0:1], 0x0
v_dual_mov_b32 v6, 0 :: v_dual_lshlrev_b32 v5, 1, v0
s_lshl_b32 s3, s15, 10
s_mov_b32 s12, s15
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v3, s3, v5
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 3, v[3:4]
s_waitcnt lgkmcnt(0)
v_cmp_gt_u64_e32 vcc_lo, s[8:9], v[3:4]
v_mov_b32_e32 v4, 0
s_and_saveexec_b32 s1, vcc_lo
s_cbranch_execz .LBB0_2
v_add_co_u32 v7, s0, s6, v1
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v8, s0, s7, v2, s0
global_load_b32 v4, v[7:8], off
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s1
v_or_b32_e32 v7, 1, v3
v_lshlrev_b32_e32 v3, 2, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v8, 31, v7
s_waitcnt vmcnt(0)
ds_store_b32 v3, v4
v_cmp_gt_u64_e64 s0, s[8:9], v[7:8]
s_and_saveexec_b32 s2, s0
s_cbranch_execz .LBB0_4
v_add_co_u32 v6, s1, s6, v1
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v7, s1, s7, v2, s1
global_load_b32 v6, v[6:7], off offset:8
.LBB0_4:
s_or_b32 exec_lo, exec_lo, s2
v_or_b32_e32 v4, 1, v5
s_mov_b32 s2, 1
s_movk_i32 s13, 0x200
s_waitcnt vmcnt(0)
ds_store_b32 v3, v6 offset:4
.LBB0_5:
s_mov_b32 s14, exec_lo
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmpx_gt_u32_e64 s13, v0
s_cbranch_execz .LBB0_7
v_mul_lo_u32 v5, s2, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshl_add_u32 v5, v5, 2, -4
v_lshl_add_u32 v6, s2, 2, v5
ds_load_b32 v5, v5
ds_load_b32 v7, v6
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v5, v7, v5
ds_store_b32 v6, v5
.LBB0_7:
s_or_b32 exec_lo, exec_lo, s14
s_lshr_b32 s1, s13, 1
s_lshl_b32 s2, s2, 1
s_cmp_lt_u32 s13, 2
s_mov_b32 s13, s1
s_cbranch_scc0 .LBB0_5
v_cmp_eq_u32_e64 s1, 0, v0
s_delay_alu instid0(VALU_DEP_1)
s_and_saveexec_b32 s2, s1
s_cbranch_execz .LBB0_10
v_mov_b32_e32 v5, 0
ds_store_b32 v5, v5 offset:4092
.LBB0_10:
s_or_b32 exec_lo, exec_lo, s2
s_mov_b32 s14, 1
s_movk_i32 s13, 0x400
.LBB0_11:
s_delay_alu instid0(SALU_CYCLE_1)
s_lshr_b32 s13, s13, 1
s_mov_b32 s15, exec_lo
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmpx_gt_u32_e64 s14, v0
s_cbranch_execz .LBB0_13
v_mul_u32_u24_e32 v5, s13, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshl_add_u32 v5, v5, 2, -4
v_lshl_add_u32 v6, s13, 2, v5
ds_load_b32 v7, v5
ds_load_b32 v8, v6
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v7, v8, v7
ds_store_b32 v5, v8
ds_store_b32 v6, v7
.LBB0_13:
s_or_b32 exec_lo, exec_lo, s15
s_lshl_b32 s2, s14, 1
s_cmpk_gt_u32 s14, 0x1ff
s_mov_b32 s14, s2
s_cbranch_scc0 .LBB0_11
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_saveexec_b32 s2, vcc_lo
s_cbranch_execz .LBB0_16
ds_load_b32 v4, v3
v_add_co_u32 v6, vcc_lo, s4, v1
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v2, vcc_lo
v_mov_b32_e32 v5, 0
s_waitcnt lgkmcnt(0)
global_store_b64 v[6:7], v[4:5], off
.LBB0_16:
s_or_b32 exec_lo, exec_lo, s2
s_and_saveexec_b32 s2, s0
s_cbranch_execz .LBB0_18
ds_load_b32 v0, v3 offset:4
v_add_co_u32 v3, vcc_lo, s4, v1
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v2, vcc_lo
v_mov_b32_e32 v1, 0
s_waitcnt lgkmcnt(0)
global_store_b64 v[3:4], v[0:1], off offset:8
.LBB0_18:
s_or_b32 exec_lo, exec_lo, s2
s_and_saveexec_b32 s2, s1
s_cbranch_execz .LBB0_22
v_mov_b32_e32 v1, 0
s_or_b32 s0, s3, 0x3ff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_ashr_i32 s1, s0, 31
v_cmp_ge_u64_e64 s3, s[0:1], s[8:9]
ds_load_b32 v0, v1 offset:4092
s_waitcnt lgkmcnt(0)
v_mov_b32_e32 v3, v1
s_and_b32 vcc_lo, exec_lo, s3
v_mov_b32_e32 v2, v0
s_cbranch_vccnz .LBB0_21
s_lshl_b64 s[0:1], s[0:1], 3
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s0, s6, s0
s_addc_u32 s1, s7, s1
global_load_b64 v[2:3], v1, s[0:1]
s_waitcnt vmcnt(0)
v_add_co_u32 v2, vcc_lo, v2, v0
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
.LBB0_21:
s_ashr_i32 s13, s12, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[0:1], s[12:13], 3
s_add_u32 s0, s10, s0
s_addc_u32 s1, s11, s1
global_store_b64 v1, v[2:3], s[0:1]
.LBB0_22:
s_or_b32 exec_lo, exec_lo, s2
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_endpgm
| block_scan | 5,131 | 2,349 | stackv2-00000-of-00015 |
// Demangled: AddIntsCUDA(int*, int*)
Function : _Z11AddIntsCUDAPiS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x380] &wr=0x1 ?trans1;
LDG.E R2, desc[UR4][R2.64] &req={0} &wr=0x2 ?trans4;
LDG.E R7, desc[UR4][R4.64] &req={1} &wr=0x2 ?trans2;
IADD3 R7, PT, PT, R2, R7, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R7 ?trans1;
EXIT ?trans5;
BRA 0x90;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: AddIntsCUDA(int*, int*)
_Z11AddIntsCUDAPiS_:
s_load_b128 s[0:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_load_b32 s2, s[2:3], 0x0
s_load_b32 s3, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_add_i32 s2, s3, s2
s_delay_alu instid0(SALU_CYCLE_1)
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| AddIntsCUDA | 304 | 186 | stackv2-00000-of-00015 |
// Demangled: MatMul_kernel(float*, float*, float*, int)
Function : _Z13MatMul_kernelPfS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R8, SR_CTAID.Y &wr=0x1 ?trans7;
LDC R3, c[0x0][0x398] &wr=0x2 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x3 ?trans1;
HFMA2 R17, -RZ, RZ, 0, 0 ?trans1;
S2R R7, SR_CTAID.X &wr=0x1 ?trans1;
S2R R9, SR_TID.Y &wr=0x4 ?trans4;
LDC.64 R26, c[0x0][0x390] &wr=0x5 ?trans1;
S2R R10, SR_TID.X &wr=0x4 ?trans1;
ISETP.GE.AND P0, PT, R3, 0x20, PT &req={2} ?trans1;
IMAD R0, R8, R3, R7 &req={1} ?WAIT2_END_GROUP;
IMAD R5, R9, R3, R10 &req={4} ?WAIT5_END_GROUP;
LEA R5, R0, R5, 0x5 ?WAIT5_END_GROUP;
IMAD.WIDE R26, R5, 0x4, R26 &req={5} ?trans1;
@!P0 BRA 0x780 &req={3,0} ?trans6;
S2UR UR6, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR4, 0x400 ?trans1;
SHF.R.S32.HI R0, RZ, 0x1f, R3 ?trans1;
UIADD3 UR5, UPT, UPT, UR4, 0x1000, URZ ?trans1;
IMAD R4, R9, R3, R10 ?trans1;
LEA R8, R8, R9, 0x5 ?trans2;
LEA.HI R2, R0, R3.reuse, RZ, 0x5 ?trans1;
LDC.64 R24, c[0x0][0x380] &wr=0x1 ?trans1;
LEA R0, R7, R4, 0x5 ?trans2;
SHF.R.S32.HI R4, RZ, 0x5, R2 ?trans1;
IMAD R2, R8, R3, R10 ?trans1;
MOV R17, RZ ?WAIT3_END_GROUP;
LDC.64 R22, c[0x0][0x388] &wr=0x2 ?trans1;
IADD3 R4, PT, PT, -R4, RZ, RZ ?trans1;
ULEA UR4, UR6, UR4, 0x18 &req={0} ?trans1;
ULEA UR5, UR6, UR5, 0x18 ?WAIT5_END_GROUP;
LEA R20, R9.reuse, UR4, 0x7 ?trans2;
LEA R6, R10.reuse, UR5, 0x2 ?trans2;
LEA R7, R10, R20, 0x2 ?trans2;
LEA R5, R9, R6, 0x7 ?WAIT7_END_GROUP;
IMAD.WIDE R12, R2, 0x4, R24 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R18, R0, 0x4, R22 &req={2} ?trans1;
LDG.E R16, desc[UR8][R12.64] &wr=0x2 ?trans5;
LDG.E R18, desc[UR8][R18.64] &wr=0x3 ?trans1;
IADD3 R4, PT, PT, R4, 0x1, RZ ?trans2;
IADD3 R2, PT, PT, R2, 0x20, RZ ?trans2;
LEA R0, R3, R0, 0x5 ?trans1;
ISETP.NE.AND P0, PT, R4, RZ, PT ?trans1;
STS [R7], R16 &req={2} ?trans4;
STS [R5], R18 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R28, [R6] ?trans4;
LDS.128 R8, [R20] &wr=0x0 ?trans4;
LDS R31, [R6+0x80] &wr=0x1 ?trans4;
LDS R21, [R6+0x100] &wr=0x2 ?trans4;
LDS R32, [R6+0x180] &wr=0x3 ?trans4;
LDS R33, [R6+0x200] ?trans4;
LDS.128 R12, [R20+0x10] &wr=0x4 ?trans4;
LDS R30, [R6+0x280] &wr=0x5 ?trans4;
LDS R29, [R6+0x300] &wr=0x5 ?trans4;
LDS R34, [R6+0x480] ?trans4;
LDS R35, [R6+0x600] ?trans1;
FFMA R8, R8, R28, R17 &req={0} ?WAIT3_END_GROUP;
LDS R28, [R6+0x380] &wr=0x0 ?trans1;
FFMA R8, R31, R9, R8 &req={1} ?WAIT3_END_GROUP;
LDS R31, [R6+0x400] ?trans1;
FFMA R21, R21, R10, R8 &req={2} ?WAIT3_END_GROUP;
LDS.128 R16, [R20+0x20] &wr=0x1 ?trans1;
FFMA R11, R32, R11, R21 &req={3} ?WAIT3_END_GROUP;
LDS R21, [R6+0x500] &wr=0x2 ?trans4;
LDS R32, [R6+0x580] &wr=0x3 ?trans1;
FFMA R11, R12, R33, R11 &req={4} ?WAIT3_END_GROUP;
LDS R33, [R6+0x800] ?trans1;
FFMA R12, R30, R13, R11 &req={5} ?WAIT3_END_GROUP;
LDS.128 R8, [R20+0x30] &wr=0x4 ?trans1;
FFMA R29, R29, R14, R12 ?WAIT3_END_GROUP;
LDS R30, [R6+0x680] &wr=0x5 ?trans1;
FFMA R15, R28, R15, R29 &req={0} ?WAIT3_END_GROUP;
LDS R29, [R6+0x700] &wr=0x0 ?trans4;
LDS R28, [R6+0x780] &wr=0x0 ?trans1;
FFMA R15, R16, R31, R15 &req={1} ?WAIT3_END_GROUP;
LDS R31, [R6+0x900] ?trans1;
FFMA R34, R34, R17, R15 ?WAIT3_END_GROUP;
LDS.128 R12, [R20+0x40] &wr=0x1 ?trans1;
FFMA R21, R21, R18, R34 &req={2} ?WAIT3_END_GROUP;
LDS R34, [R6+0x880] &wr=0x2 ?trans1;
FFMA R19, R32, R19, R21 &req={3} ?WAIT3_END_GROUP;
LDS R32, [R6+0x980] &wr=0x3 ?trans1;
FFMA R19, R8, R35, R19 &req={4} ?WAIT3_END_GROUP;
LDS R35, [R6+0xa00] ?trans1;
FFMA R8, R30, R9, R19 &req={5} ?WAIT3_END_GROUP;
LDS.128 R16, [R20+0x50] &wr=0x4 ?trans4;
LDS R30, [R6+0xa80] &wr=0x5 ?trans4;
LDS R21, [R6+0xb00] &wr=0x5 ?trans1;
FFMA R29, R29, R10, R8 &req={0} ?WAIT4_END_GROUP;
FFMA R11, R28, R11, R29 ?trans2;
LDS R28, [R6+0xb80] &wr=0x0 ?trans4;
LDS R29, [R6+0xc00] ?trans1;
FFMA R11, R12, R33, R11 &req={1} ?WAIT4_END_GROUP;
FFMA R34, R34, R13, R11 &req={2} ?trans2;
LDS.128 R8, [R20+0x60] &wr=0x1 ?trans2;
FFMA R31, R31, R14, R34 ?trans2;
LDS R34, [R6+0xc80] &wr=0x2 ?trans2;
FFMA R15, R32, R15, R31 &req={3} ?trans2;
LDS R31, [R6+0xd00] &wr=0x3 ?trans2;
FFMA R15, R16, R35, R15 &req={4} ?WAIT2_END_GROUP;
LDS R16, [R6+0xd80] &wr=0x4 ?trans2;
FFMA R30, R30, R17, R15 &req={5} ?trans2;
LDS R17, [R6+0xe00] ?trans2;
FFMA R33, R21, R18, R30 ?trans2;
LDS.128 R12, [R20+0x70] &wr=0x5 ?trans4;
LDS R30, [R6+0xe80] &wr=0x5 ?trans4;
LDS R21, [R6+0xf00] &wr=0x5 ?trans1;
FFMA R19, R28, R19, R33 &req={0} ?WAIT3_END_GROUP;
LDS R18, [R6+0xf80] &wr=0x0 ?trans1;
FFMA R19, R8, R29, R19 &req={1} ?WAIT4_END_GROUP;
FFMA R34, R34, R9, R19 &req={2} ?WAIT4_END_GROUP;
FFMA R31, R31, R10, R34 &req={3} ?WAIT4_END_GROUP;
FFMA R11, R16, R11, R31 &req={4} ?WAIT4_END_GROUP;
FFMA R11, R12, R17, R11 &req={5} ?WAIT4_END_GROUP;
FFMA R30, R30, R13, R11 ?WAIT4_END_GROUP;
FFMA R21, R21, R14, R30 ?WAIT4_END_GROUP;
FFMA R17, R18, R15, R21 &req={0} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 BRA 0x230 ?trans5;
STG.E desc[UR8][R26.64], R17 ?trans1;
EXIT ?trans5;
BRA 0x7a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: MatMul_kernel(float*, float*, float*, int)
_Z13MatMul_kernelPfS_S_i:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x18
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
v_bfe_u32 v3, v0, 10, 10
v_and_b32_e32 v2, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_mad_u64_u32 v[0:1], null, v3, s2, v[2:3]
v_mov_b32_e32 v1, 0
s_cmp_lt_i32 s2, 32
s_mul_i32 s3, s15, s2
s_cbranch_scc1 .LBB0_5
v_lshlrev_b32_e32 v1, 2, v2
v_lshlrev_b32_e32 v2, 7, v3
s_ashr_i32 s8, s2, 31
s_mov_b32 s9, 0
s_lshr_b32 s8, s8, 27
v_or_b32_e32 v3, 0x1000, v1
v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v4, v2, v1
s_add_i32 s8, s2, s8
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
s_ashr_i32 s8, s8, 5
v_add_nc_u32_e32 v5, v3, v2
.LBB0_2:
s_add_i32 s10, s9, s3
s_mul_i32 s11, s9, s2
v_lshl_add_u32 v6, s10, 5, v0
s_add_i32 s11, s11, s14
s_mov_b32 s10, 0
v_lshl_add_u32 v8, s11, 5, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v7, 31, v6
v_ashrrev_i32_e32 v9, 31, v8
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[6:7], 2, v[6:7]
v_lshlrev_b64 v[8:9], 2, v[8:9]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v6, vcc_lo, s4, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v8, vcc_lo, s6, v8
v_add_co_ci_u32_e32 v9, vcc_lo, s7, v9, vcc_lo
global_load_b32 v7, v[6:7], off
global_load_b32 v8, v[8:9], off
v_mov_b32_e32 v6, v3
s_waitcnt vmcnt(1)
ds_store_b32 v4, v7
s_waitcnt vmcnt(0)
ds_store_b32 v5, v8
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB0_3:
v_add_nc_u32_e32 v7, s10, v2
s_add_i32 s10, s10, 4
ds_load_b32 v8, v6
ds_load_b32 v7, v7
v_add_nc_u32_e32 v6, 0x80, v6
s_cmpk_eq_i32 s10, 0x80
s_waitcnt lgkmcnt(0)
v_fmac_f32_e32 v1, v7, v8
s_cbranch_scc0 .LBB0_3
s_add_i32 s9, s9, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s9, s8
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB0_2
.LBB0_5:
s_add_i32 s3, s3, s14
s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
v_lshl_add_u32 v2, s3, 5, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
global_store_b32 v[2:3], v1, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| MatMul_kernel | 3,024 | 1,438 | stackv2-00000-of-00015 |
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