sass stringlengths 231 30.8k | rdna stringlengths 69 28.4k | function_name stringlengths 1 85 | sass_tokens int64 90 14.4k ⌀ | rdna_tokens int64 11 14.5k ⌀ | source stringclasses 15
values |
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// Demangled: add_neighbour(int*, int)
Function : _Z13add_neighbourPii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R7, SR_TID.X &wr=0x0 ?trans7;
LDC.64 R4, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans1;
IADD3 R3, PT, PT, R7, UR6, RZ &req={0} ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R2, R3, 0x4, R4 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R7, 0x4, R4 ?trans2;
LDG.E R2, desc[UR4][R2.64] &req={2} &wr=0x2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDG.E R7, desc[UR4][R4.64] &wr=0x2 ?trans2;
IADD3 R7, PT, PT, R2, R7, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R7 ?trans1;
EXIT ?trans5;
BRA 0xe0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: add_neighbour(int*, int)
_Z13add_neighbourPii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x8
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v1, s2, v0
v_lshlrev_b32_e32 v0, 2, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[1:2]
v_add_co_u32 v1, vcc_lo, s0, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
global_load_b32 v1, v[1:2], off
s_waitcnt vmcnt(0)
s_barrier
buffer_gl0_inv
global_load_b32 v2, v0, s[0:1]
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v1, v2, v1
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| add_neighbour | 402 | 348 | stackv2-00000-of-00015 |
// Demangled: kMeansCentroidUpdate(float*, int*, float*, int*)
Function : _Z20kMeansCentroidUpdatePfPiS_S0_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R11, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
IADD3 R1, PT, PT, R1, -0x18, RZ &req={0} ?WAIT7_END_GROUP;
LDC R6, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R14, R6, UR4, R11 &req={1} ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R14, 0x3f, PT ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR10, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD.WIDE R2, R14, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR10][R2.64] &req={1} &wr=0x3 ?trans1;
IMAD.WIDE R4, R14, 0x4, R4 &req={2} ?WAIT6_END_GROUP;
LDG.E R4, desc[UR10][R4.64] &wr=0x2 ?trans1;
S2UR UR7, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR4, 0x400 ?trans2;
UIADD3 UR6, UPT, UPT, UR4, 0x80, URZ ?trans1;
ISETP.NE.AND P0, PT, R11, RZ, PT ?trans1;
BSSY.RECONVERGENT B0, 0x14a0 ?trans1;
SHF.R.S32.HI R15, RZ, 0x1f, R14 ?trans1;
ULEA UR5, UR7, UR4, 0x18 &req={0} ?trans1;
ULEA UR6, UR7, UR6, 0x18 ?WAIT5_END_GROUP;
LEA R7, R11.reuse, UR5, 0x2 ?trans2;
LEA R9, R11, UR6, 0x2 ?WAIT3_END_GROUP;
STS [R7], R2 &req={3} &rd=0x0 ?trans4;
STS [R9], R4 &req={2} &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 BRA 0x1490 ?trans5;
STL.64 [R1], RZ &rd=0x1 ?trans1;
ISETP.GE.U32.AND P0, PT, R6.reuse, 0x4, PT ?trans1;
UMOV UR4, URZ ?trans1;
MOV R0, R1 ?trans1;
STL.64 [R1+0x8], RZ &rd=0x1 ?trans1;
LOP3.LUT R2, R6, 0x3, RZ, 0xc0, !PT &req={0} ?WAIT3_END_GROUP;
STL.64 [R1+0x10], RZ &rd=0x1 ?trans6;
@!P0 BRA 0x1270 ?trans5;
LOP3.LUT R3, R6, 0xfffffffc, RZ, 0xc0, !PT ?trans1;
UIADD3 UR7, UPT, UPT, UR6, 0x8, URZ ?trans1;
UIADD3 UR8, UPT, UPT, UR5, 0x8, URZ ?trans1;
UMOV UR4, URZ ?trans1;
IADD3 R3, PT, PT, -R3, RZ, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R3, RZ, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1010 ?trans5;
IADD3 R4, PT, PT, -R3, RZ, RZ ?trans2;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?WAIT3_END_GROUP;
ISETP.GT.AND P1, PT, R4, 0xc, PT ?WAIT13_END_GROUP;
@!P1 BRA 0xb70 ?trans5;
PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x80 ?WAIT13_END_GROUP;
LDS.64 R4, [UR7+-0x8] &req={4} &wr=0x0 ?trans4;
LDS.64 R6, [UR8+-0x8] &wr=0x2 ?trans4;
LDS.64 R12, [UR7] &wr=0x3 ?trans4;
LDS.64 R16, [UR7+0x8] ?trans1;
IMAD R4, R4, 0x4, R0 &req={0} ?WAIT5_END_GROUP;
LDL R9, [R4] &wr=0x2 ?trans4;
LDL R8, [R4+0xc] &wr=0x4 ?trans1;
IMAD R5, R5, 0x4, R0 ?trans2;
FADD R9, R6, R9 &req={2} ?trans1;
IADD3 R11, PT, PT, R8, 0x1, RZ &req={4} ?WAIT4_END_GROUP;
STL [R4], R9 &rd=0x0 ?trans4;
STL [R4+0xc], R11 ?trans4;
LDL R6, [R5] &wr=0x2 ?trans4;
LDL R8, [R5+0xc] &wr=0x4 ?trans1;
IMAD R12, R12, 0x4, R0 &req={3} ?WAIT3_END_GROUP;
LDS.64 R10, [UR8] &wr=0x3 ?trans1;
FADD R6, R6, R7 &req={2} ?trans1;
IADD3 R8, PT, PT, R8, 0x1, RZ &req={4} ?WAIT4_END_GROUP;
STL [R5], R6 &rd=0x2 ?trans4;
STL [R5+0xc], R8 &rd=0x4 ?trans4;
LDL R7, [R12] &wr=0x3 ?trans4;
LDL R9, [R12+0xc] &req={0} &wr=0x5 ?trans1;
IMAD R13, R13, 0x4, R0 ?WAIT2_END_GROUP;
FADD R7, R10, R7 &req={3} ?trans1;
IADD3 R9, PT, PT, R9, 0x1, RZ &req={5} ?WAIT4_END_GROUP;
STL [R12], R7 &rd=0x0 ?trans4;
STL [R12+0xc], R9 ?trans4;
LDL R4, [R13] &wr=0x3 ?trans4;
LDL R6, [R13+0xc] &req={2} &wr=0x2 ?trans1;
IMAD R16, R16, 0x4, R0 ?WAIT3_END_GROUP;
LDS.64 R8, [UR8+0x8] &wr=0x5 ?trans1;
FADD R4, R4, R11 &req={3} ?trans1;
IMAD R17, R17, 0x4, R0 ?trans2;
LDS.64 R10, [UR7+0x10] &wr=0x3 ?trans1;
IADD3 R6, PT, PT, R6, 0x1, RZ &req={2} ?WAIT3_END_GROUP;
STL [R13], R4 &rd=0x2 ?trans4;
STL [R13+0xc], R6 ?trans4;
LDL R5, [R16] &req={4} &wr=0x5 ?trans4;
LDL R7, [R16+0xc] &req={0} &wr=0x4 ?trans4;
LDS.64 R12, [UR7+0x18] ?trans1;
FADD R5, R8, R5 &req={5} ?trans1;
IADD3 R7, PT, PT, R7, 0x1, RZ &req={4} ?WAIT4_END_GROUP;
STL [R16], R5 &rd=0x0 ?trans4;
STL [R16+0xc], R7 ?trans4;
LDL R8, [R17] &wr=0x4 ?trans4;
LDL R4, [R17+0xc] &req={2} &wr=0x2 ?trans1;
IMAD R10, R10, 0x4, R0 &req={3} ?WAIT3_END_GROUP;
LDS.64 R6, [UR8+0x10] &wr=0x3 ?trans1;
FADD R8, R8, R9 &req={4} ?trans1;
IADD3 R4, PT, PT, R4, 0x1, RZ &req={2} ?WAIT4_END_GROUP;
STL [R17], R8 &rd=0x2 ?trans4;
STL [R17+0xc], R4 ?trans4;
LDL R9, [R10] &wr=0x3 ?trans4;
LDL R5, [R10+0xc] &req={0} &wr=0x4 ?trans1;
IMAD R11, R11, 0x4, R0 ?WAIT2_END_GROUP;
FADD R9, R6, R9 &req={3} ?trans1;
IADD3 R5, PT, PT, R5, 0x1, RZ &req={4} ?WAIT4_END_GROUP;
STL [R10], R9 &rd=0x0 ?trans4;
STL [R10+0xc], R5 ?trans4;
LDL R6, [R11] &wr=0x3 ?trans4;
LDL R8, [R11+0xc] &req={2} &wr=0x2 ?trans1;
IMAD R12, R12, 0x4, R0 ?WAIT3_END_GROUP;
LDS.64 R4, [UR8+0x18] &wr=0x4 ?trans1;
FADD R6, R6, R7 &req={3} ?trans1;
IADD3 R8, PT, PT, R8, 0x1, RZ &req={2} ?WAIT4_END_GROUP;
STL [R11], R6 &rd=0x2 ?trans4;
STL [R11+0xc], R8 ?trans4;
LDL R7, [R12] &wr=0x4 ?trans4;
LDL R9, [R12+0xc] &req={0} &wr=0x3 ?trans1;
IMAD R13, R13, 0x4, R0 ?WAIT3_END_GROUP;
LDS.64 R10, [UR7+0x20] &wr=0x0 ?trans1;
FADD R7, R4, R7 &req={4} ?trans1;
IADD3 R9, PT, PT, R9, 0x1, RZ &req={3} ?WAIT4_END_GROUP;
STL [R12], R7 &rd=0x3 ?trans4;
STL [R12+0xc], R9 ?trans4;
LDL R4, [R13] &wr=0x4 ?trans4;
LDL R6, [R13+0xc] &req={2} &wr=0x2 ?trans1;
IMAD R10, R10, 0x4, R0 &req={0} ?WAIT3_END_GROUP;
LDS.64 R8, [UR8+0x20] &wr=0x0 ?trans1;
FADD R4, R4, R5 &req={4} ?trans1;
IADD3 R6, PT, PT, R6, 0x1, RZ &req={2} ?WAIT4_END_GROUP;
STL [R13], R4 &rd=0x2 ?trans4;
STL [R13+0xc], R6 ?trans4;
LDL R5, [R10] &wr=0x0 ?trans4;
LDL R7, [R10+0xc] &req={3} &wr=0x3 ?trans1;
IMAD R11, R11, 0x4, R0 ?WAIT3_END_GROUP;
LDS.64 R12, [UR7+0x28] &wr=0x4 ?trans1;
FADD R5, R8, R5 &req={0} ?trans1;
IADD3 R7, PT, PT, R7, 0x1, RZ &req={3} ?WAIT4_END_GROUP;
STL [R10], R5 &rd=0x0 ?trans4;
STL [R10+0xc], R7 ?trans4;
LDL R8, [R11] &wr=0x3 ?trans4;
LDL R4, [R11+0xc] &req={2} &wr=0x2 ?trans1;
IMAD R12, R12, 0x4, R0 &req={4} ?WAIT3_END_GROUP;
LDS.64 R6, [UR8+0x28] &wr=0x4 ?trans1;
FADD R8, R8, R9 &req={3} ?trans1;
IADD3 R4, PT, PT, R4, 0x1, RZ &req={2} ?WAIT4_END_GROUP;
STL [R11], R8 &rd=0x2 ?trans4;
STL [R11+0xc], R4 ?trans4;
LDL R9, [R12] &wr=0x4 ?trans4;
LDL R5, [R12+0xc] &req={0} &wr=0x3 ?trans1;
IMAD R13, R13, 0x4, R0 ?WAIT3_END_GROUP;
LDS.64 R10, [UR7+0x30] &wr=0x0 ?trans1;
FADD R9, R6, R9 &req={4} ?trans1;
IADD3 R5, PT, PT, R5, 0x1, RZ &req={3} ?WAIT4_END_GROUP;
STL [R12], R9 &rd=0x3 ?trans4;
STL [R12+0xc], R5 ?trans4;
LDL R6, [R13] &wr=0x4 ?trans4;
LDL R8, [R13+0xc] &req={2} &wr=0x2 ?trans1;
IMAD R10, R10, 0x4, R0 &req={0} ?WAIT3_END_GROUP;
LDS.64 R4, [UR8+0x30] &wr=0x0 ?trans1;
FADD R6, R6, R7 &req={4} ?trans1;
IADD3 R8, PT, PT, R8, 0x1, RZ &req={2} ?WAIT4_END_GROUP;
STL [R13], R6 &rd=0x2 ?trans4;
STL [R13+0xc], R8 &rd=0x4 ?trans4;
LDL R7, [R10] &wr=0x0 ?trans4;
LDL R9, [R10+0xc] &req={3} &wr=0x3 ?trans1;
IMAD R11, R11, 0x4, R0 ?WAIT2_END_GROUP;
FADD R7, R4, R7 &req={0} ?trans1;
IADD3 R9, PT, PT, R9, 0x1, RZ &req={3} ?WAIT4_END_GROUP;
STL [R10], R7 &rd=0x4 ?trans4;
STL [R10+0xc], R9 &rd=0x4 ?trans4;
LDL R4, [R11] &wr=0x3 ?trans4;
LDL R6, [R11+0xc] &req={2} &wr=0x2 ?trans1;
IADD3 R3, PT, PT, R3, 0x10, RZ ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x10, URZ ?trans1;
UIADD3 UR7, UPT, UPT, UR7, 0x40, URZ ?trans1;
UIADD3 UR8, UPT, UPT, UR8, 0x40, URZ ?WAIT2_END_GROUP;
ISETP.GE.AND P1, PT, R3, -0xc, PT ?trans1;
FADD R4, R4, R5 &req={3} ?trans1;
IADD3 R6, PT, PT, R6, 0x1, RZ &req={2} ?WAIT4_END_GROUP;
STL [R11], R4 &rd=0x4 ?trans4;
STL [R11+0xc], R6 &rd=0x4 ?trans3;
@!P1 BRA 0x310 ?trans5;
IADD3 R4, PT, PT, -R3, RZ, RZ &req={4} ?WAIT5_END_GROUP;
ISETP.GT.AND P1, PT, R4, 0x4, PT ?WAIT13_END_GROUP;
@!P1 BRA 0xff0 ?trans5;
LDS.64 R4, [UR7+-0x8] &wr=0x0 ?trans4;
LDS.64 R6, [UR8+-0x8] &wr=0x2 ?trans4;
LDS.64 R12, [UR7] &wr=0x3 ?trans4;
LDS.64 R16, [UR7+0x8] ?trans1;
IMAD R4, R4, 0x4, R0 &req={0} ?WAIT5_END_GROUP;
LDL R9, [R4] &wr=0x2 ?trans4;
LDL R8, [R4+0xc] &wr=0x4 ?trans1;
IMAD R5, R5, 0x4, R0 ?trans2;
FADD R9, R6, R9 &req={2} ?trans1;
IADD3 R11, PT, PT, R8, 0x1, RZ &req={4} ?WAIT4_END_GROUP;
STL [R4], R9 &rd=0x0 ?trans4;
STL [R4+0xc], R11 ?trans4;
LDL R6, [R5] &wr=0x2 ?trans4;
LDL R8, [R5+0xc] &wr=0x4 ?trans1;
IMAD R12, R12, 0x4, R0 &req={3} ?WAIT3_END_GROUP;
LDS.64 R10, [UR8] &wr=0x3 ?trans1;
FADD R6, R6, R7 &req={2} ?trans1;
IADD3 R8, PT, PT, R8, 0x1, RZ &req={4} ?WAIT4_END_GROUP;
STL [R5], R6 &rd=0x2 ?trans4;
STL [R5+0xc], R8 &rd=0x4 ?trans4;
LDL R7, [R12] &wr=0x3 ?trans4;
LDL R9, [R12+0xc] &req={0} &wr=0x5 ?trans1;
IMAD R13, R13, 0x4, R0 ?WAIT2_END_GROUP;
FADD R7, R10, R7 &req={3} ?trans1;
IADD3 R9, PT, PT, R9, 0x1, RZ &req={5} ?WAIT4_END_GROUP;
STL [R12], R7 &rd=0x0 ?trans4;
STL [R12+0xc], R9 ?trans4;
LDL R4, [R13] &wr=0x3 ?trans4;
LDL R6, [R13+0xc] &req={2} &wr=0x2 ?trans1;
IMAD R16, R16, 0x4, R0 ?WAIT3_END_GROUP;
LDS.64 R8, [UR8+0x8] &wr=0x5 ?trans1;
FADD R4, R4, R11 &req={3} ?trans1;
IMAD R17, R17, 0x4, R0 ?trans2;
LDS.64 R10, [UR7+0x10] &wr=0x3 ?trans1;
IADD3 R6, PT, PT, R6, 0x1, RZ &req={2} ?WAIT3_END_GROUP;
STL [R13], R4 &rd=0x2 ?trans4;
STL [R13+0xc], R6 ?trans4;
LDL R5, [R16] &req={4} &wr=0x5 ?trans4;
LDL R7, [R16+0xc] &req={0} &wr=0x4 ?trans1;
FADD R5, R8, R5 &req={5} ?trans1;
IADD3 R7, PT, PT, R7, 0x1, RZ &req={4} ?WAIT4_END_GROUP;
STL [R16], R5 &rd=0x0 ?trans4;
STL [R16+0xc], R7 ?trans4;
LDL R8, [R17] &wr=0x4 ?trans4;
LDL R4, [R17+0xc] &req={2} &wr=0x2 ?trans1;
IMAD R10, R10, 0x4, R0 &req={3} ?WAIT3_END_GROUP;
LDS.64 R6, [UR8+0x10] &wr=0x3 ?trans1;
FADD R8, R8, R9 &req={4} ?trans1;
IADD3 R4, PT, PT, R4, 0x1, RZ &req={2} ?WAIT4_END_GROUP;
STL [R17], R8 &rd=0x2 ?trans4;
STL [R17+0xc], R4 &rd=0x4 ?trans4;
LDL R9, [R10] &wr=0x3 ?trans4;
LDL R5, [R10+0xc] &req={0} &wr=0x5 ?trans1;
IMAD R11, R11, 0x4, R0 ?WAIT2_END_GROUP;
FADD R9, R6, R9 &req={3} ?trans1;
IADD3 R5, PT, PT, R5, 0x1, RZ &req={5} ?WAIT4_END_GROUP;
STL [R10], R9 &rd=0x4 ?trans4;
STL [R10+0xc], R5 &rd=0x4 ?trans4;
LDL R6, [R11] &wr=0x3 ?trans4;
LDL R8, [R11+0xc] &req={2} &wr=0x2 ?trans1;
PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x80 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
IADD3 R3, PT, PT, R3, 0x8, RZ ?trans1;
UIADD3 UR7, UPT, UPT, UR7, 0x20, URZ ?trans1;
UIADD3 UR8, UPT, UPT, UR8, 0x20, URZ ?trans1;
FADD R6, R6, R7 &req={3} ?trans1;
IADD3 R8, PT, PT, R8, 0x1, RZ &req={2} ?WAIT4_END_GROUP;
STL [R11], R6 &rd=0x4 ?trans4;
STL [R11+0xc], R8 &rd=0x4 ?trans2;
ISETP.NE.OR P0, PT, R3, RZ, P0 ?WAIT13_END_GROUP;
@!P0 BRA 0x1270 ?trans5;
LDS.64 R4, [UR7+-0x8] &req={4} &wr=0x0 ?trans4;
LDS.64 R6, [UR8+-0x8] &wr=0x2 ?trans4;
LDS.64 R12, [UR7] &wr=0x3 ?trans1;
IMAD R4, R4, 0x4, R0 &req={0} ?WAIT5_END_GROUP;
LDL R9, [R4] &wr=0x2 ?trans4;
LDL R8, [R4+0xc] &wr=0x4 ?trans1;
IMAD R5, R5, 0x4, R0 ?trans2;
FADD R9, R6, R9 &req={2} ?trans1;
IADD3 R11, PT, PT, R8, 0x1, RZ &req={4} ?WAIT4_END_GROUP;
STL [R4], R9 &rd=0x0 ?trans4;
STL [R4+0xc], R11 ?trans4;
LDL R6, [R5] &wr=0x2 ?trans4;
LDL R8, [R5+0xc] &wr=0x4 ?trans1;
IMAD R12, R12, 0x4, R0 &req={3} ?WAIT3_END_GROUP;
LDS.64 R10, [UR8] &wr=0x3 ?trans1;
FADD R6, R6, R7 &req={2} ?trans1;
IADD3 R8, PT, PT, R8, 0x1, RZ &req={4} ?WAIT4_END_GROUP;
STL [R5], R6 &rd=0x2 ?trans4;
STL [R5+0xc], R8 &rd=0x4 ?trans4;
LDL R7, [R12] &wr=0x3 ?trans4;
LDL R9, [R12+0xc] &req={0} &wr=0x5 ?trans1;
IMAD R13, R13, 0x4, R0 ?WAIT2_END_GROUP;
FADD R7, R10, R7 &req={3} ?trans1;
IADD3 R9, PT, PT, R9, 0x1, RZ &req={5} ?WAIT4_END_GROUP;
STL [R12], R7 &rd=0x4 ?trans4;
STL [R12+0xc], R9 &rd=0x4 ?trans4;
LDL R4, [R13] &wr=0x3 ?trans4;
LDL R6, [R13+0xc] &req={2} &wr=0x2 ?trans1;
IADD3 R3, PT, PT, R3, 0x4, RZ ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
UIADD3 UR7, UPT, UPT, UR7, 0x10, URZ ?trans1;
UIADD3 UR8, UPT, UPT, UR8, 0x10, URZ ?WAIT2_END_GROUP;
ISETP.NE.AND P0, PT, R3, RZ, PT ?trans1;
FADD R4, R4, R11 &req={3} ?trans1;
IADD3 R6, PT, PT, R6, 0x1, RZ &req={2} ?WAIT4_END_GROUP;
STL [R13], R4 &rd=0x4 ?trans4;
STL [R13+0xc], R6 &rd=0x4 ?trans3;
@P0 BRA 0x1010 ?trans5;
ISETP.NE.AND P0, PT, R2, RZ, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x13a0 ?trans5;
IADD3 R2, PT, PT, -R2, RZ, RZ ?trans1;
ULEA UR7, UR4, UR5, 0x2 ?trans1;
ULEA UR4, UR4, UR6, 0x2 ?WAIT12_END_GROUP;
LDS R3, [UR4] &req={0} &wr=0x0 ?trans2;
IMAD R4, R3, 0x4, R0 &req={4,0} ?trans2;
LDS R3, [UR7] &wr=0x0 ?trans4;
LDL R6, [R4] &wr=0x0 ?trans4;
LDL R5, [R4+0xc] &wr=0x2 ?trans1;
IADD3 R2, PT, PT, R2, 0x1, RZ ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
UIADD3 UR7, UPT, UPT, UR7, 0x4, URZ ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R2, RZ, PT ?trans1;
FADD R3, R3, R6 &req={0} ?trans1;
IADD3 R5, PT, PT, R5, 0x1, RZ &req={2} ?WAIT4_END_GROUP;
STL [R4], R3 &rd=0x0 ?trans4;
STL [R4+0xc], R5 &rd=0x0 ?trans3;
@P0 BRA 0x12c0 ?trans5;
LDL.64 R16, [R1] &req={4} &wr=0x2 ?trans1;
LDC.64 R6, c[0x0][0x390] &wr=0x3 ?trans3;
LDL.64 R12, [R1+0x8] &wr=0x4 ?trans4;
LDL.64 R10, [R1+0x10] &wr=0x5 ?trans1;
LDC.64 R8, c[0x0][0x398] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x390] &req={0} &wr=0x2 ?trans8;
LDC.64 R4, c[0x0][0x398] &wr=0x4 ?trans1;
IADD.64 R6, R6, 0x4 &req={3} ?WAIT2_END_GROUP;
IADD.64 R8, R8, 0x4 ?trans2;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR10][R2.64], R16 &req={2} &rd=0x2 ?trans4;
REDG.E.ADD.STRONG.GPU desc[UR10][R4.64], R13 &req={4} &rd=0x2 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR10][R6.64], R17 &rd=0x2 ?trans4;
REDG.E.ADD.STRONG.GPU desc[UR10][R8.64], R10 &req={5} &rd=0x2 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR10][R6.64+0x4], R12 &rd=0x2 ?trans4;
REDG.E.ADD.STRONG.GPU desc[UR10][R8.64+0x4], R11 &rd=0x2 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.AND P0, PT, R14, 0x2, PT ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDCU.128 UR4, c[0x0][0x390] &wr=0x3 ?trans1;
SHF.L.U64.HI R5, R14.reuse, 0x2, R15 &req={2} ?trans1;
IMAD.SHL.U32 R4, R14, 0x4, RZ &req={0} ?WAIT5_END_GROUP;
IADD.64 R2, R4, UR6 &req={3} ?WAIT7_END_GROUP;
LDG.E R2, desc[UR10][R2.64] &wr=0x2 ?trans1;
IADD.64 R4, R4, UR4 ?WAIT6_END_GROUP;
LDG.E R0, desc[UR10][R4.64] &wr=0x3 ?trans1;
BSSY.RECONVERGENT B0, 0x1610 ?trans1;
I2FP.F32.S32 R3, R2 &req={2} ?WAIT4_END_GROUP;
MUFU.RCP R6, R3 &wr=0x0 ?trans1;
FCHK P0, R0, R3 &req={3} &wr=0x2 ?trans1;
FFMA R7, -R3, R6, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R7, R6, R7, R6 ?WAIT4_END_GROUP;
FFMA R6, R0, R7, RZ ?WAIT4_END_GROUP;
FFMA R8, -R3, R6, R0 ?WAIT4_END_GROUP;
FFMA R7, R7, R8, R6 ?trans1;
@!P0 BRA 0x1600 &req={2} ?trans6;
MOV R2, 0x1600 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1630 &req={1} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
STG.E desc[UR10][R4.64], R7 ?trans1;
EXIT ?trans5;
SHF.R.U32.HI R7, RZ, 0x17, R3 ?trans1;
BSSY.RECONVERGENT B1, 0x1c90 ?trans1;
SHF.R.U32.HI R6, RZ, 0x17, R0 ?trans2;
LOP3.LUT R7, R7, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R6, R6, 0xff, RZ, 0xc0, !PT ?trans1;
MOV R8, R0 ?trans1;
IADD3 R12, PT, PT, R7, -0x1, RZ ?trans1;
MOV R9, R3 ?trans1;
IADD3 R11, PT, PT, R6, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R12, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R11, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R10, RZ ?trans1;
@!P0 BRA 0x1870 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0x1c70 ?trans5;
LOP3.LUT P0, RZ, R9, 0x7fffffff, R8, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1c50 ?trans5;
FSETP.NEU.FTZ.AND P2, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P1 BRA !P2, 0x1c50 ?trans5;
LOP3.LUT P2, RZ, R8, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P1, P2, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0x1c30 ?trans5;
LOP3.LUT P1, RZ, R9, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x1c00 ?trans5;
ISETP.GE.AND P0, PT, R11, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R12, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R10, RZ ?trans1;
@!P0 MOV R10, 0xffffffc0 ?trans1;
@!P0 FFMA R8, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R9, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R10, PT, PT, R10, 0x40, RZ ?WAIT7_END_GROUP;
LEA R0, R7, 0xc0800000, 0x17 ?trans1;
BSSY.RECONVERGENT B2, 0x1bf0 ?trans1;
IADD3 R6, PT, PT, R6, -0x7f, RZ ?trans2;
IADD3 R9, PT, PT, -R0, R9, RZ ?WAIT3_END_GROUP;
IMAD R0, R6.reuse, -0x800000, R8 ?trans1;
IADD3 R7, PT, PT, R6, 0x7f, -R7 ?trans1;
MUFU.RCP R3, R9 &wr=0x0 ?trans1;
FADD.FTZ R11, -R9, -RZ ?trans2;
IADD3 R7, PT, PT, R7, R10, RZ ?trans2;
FFMA R12, R3, R11, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R12, R3, R12, R3 ?WAIT4_END_GROUP;
FFMA R3, R0, R12, RZ ?WAIT4_END_GROUP;
FFMA R8, R11, R3, R0 ?WAIT4_END_GROUP;
FFMA R13, R12, R8, R3 ?WAIT4_END_GROUP;
FFMA R8, R11, R13, R0 ?WAIT4_END_GROUP;
FFMA R3, R12, R8, R13 ?WAIT5_END_GROUP;
SHF.R.U32.HI R0, RZ, 0x17, R3 ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R10, PT, PT, R0, R7, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R10, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1bd0 ?trans5;
ISETP.GT.AND P0, PT, R10, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1ba0 ?trans5;
ISETP.GE.AND P0, PT, R10, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1be0 ?trans5;
ISETP.GE.AND P0, PT, R10, -0x18, PT ?trans1;
LOP3.LUT R3, R3, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x1be0 ?trans5;
FFMA.RZ R0, R12, R8.reuse, R13.reuse ?trans1;
IADD3 R9, PT, PT, R10, 0x20, RZ ?trans1;
FFMA.RM R7, R12, R8, R13 ?trans1;
ISETP.NE.AND P1, PT, R10.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R10, RZ, PT ?trans1;
LOP3.LUT R0, R0, 0x7fffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R6, R0, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R0, R12, R8, R13 ?trans1;
IADD3 R8, PT, PT, -R10, RZ, RZ ?trans2;
SHF.L.U32 R9, R6, R9, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R0, R7, PT ?trans1;
SEL R7, R8, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R9, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R7, RZ, R7, R6 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R9, RZ, 0x1, R7 ?WAIT3_END_GROUP;
SEL R0, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R0, R0, 0x1, R9, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, R7, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R9, R0, RZ ?WAIT4_END_GROUP;
LOP3.LUT R3, R0, R3, RZ, 0xfc, !PT ?trans1;
BRA 0x1be0 ?trans6;
LOP3.LUT R3, R3, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x1be0 ?trans6;
IMAD R3, R7, 0x800000, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
BRA 0x1c80 ?trans5;
LOP3.LUT R3, R9, 0x80000000, R8, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x1c80 ?trans6;
LOP3.LUT R3, R9, 0x80000000, R8, 0x48, !PT ?trans1;
BRA 0x1c80 ?trans6;
MUFU.RSQ R3, -QNAN &wr=0x0 ?trans1;
BRA 0x1c80 ?trans5;
FADD.FTZ R3, R0, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R7, R3 &req={0} ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R2 0x0 ?trans5;
BRA 0x1cc0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: kMeansCentroidUpdate(float*, int*, float*, int*)
_Z20kMeansCentroidUpdatePfPiS_S0_:
s_load_b32 s2, s[0:1], 0x2c
s_waitcnt lgkmcnt(0)
s_and_b32 s12, s2, 0xffff
s_mov_b32 s2, exec_lo
v_mad_u64_u32 v[3:4], null, s15, s12, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e32 64, v3
s_cbranch_execz .LBB1_14
s_load_b256 s[0:7], s[0:1], 0x0
v_ashrrev_i32_e32 v4, 31, v3
s_mov_b32 s9, 0
s_mov_b32 s8, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[3:4]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, vcc_lo, s0, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v2, vcc_lo
v_add_co_u32 v6, vcc_lo, s2, v1
v_add_co_ci_u32_e32 v7, vcc_lo, s3, v2, vcc_lo
global_load_b32 v4, v[4:5], off
global_load_b32 v5, v[6:7], off
v_lshlrev_b32_e32 v6, 2, v0
s_waitcnt vmcnt(0)
ds_store_2addr_b32 v6, v5, v4 offset1:32
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB1_12
v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v7, 0
v_mov_b32_e32 v0, 0
s_mov_b32 s2, 0
s_cmp_eq_u32 s12, 0
s_mov_b32 s11, 0
s_mov_b32 s10, 0
s_cbranch_scc1 .LBB1_5
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v7, 0
v_mov_b32_e32 v6, 0
s_mov_b32 s11, s10
s_mov_b32 s9, s10
.LBB1_4:
v_mov_b32_e32 v4, s2
ds_load_2addr_b32 v[4:5], v4 offset1:32
s_waitcnt lgkmcnt(0)
v_readfirstlane_b32 s1, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
s_cmp_eq_u32 s1, 1
s_cselect_b32 s0, -1, 0
s_and_b32 s0, s0, exec_lo
s_cselect_b32 s0, s11, s10
s_cmp_eq_u32 s1, 2
s_cselect_b32 s3, -1, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
s_and_b32 s3, s3, exec_lo
s_cselect_b32 s0, s9, s0
s_add_i32 s3, s0, 1
s_cmp_eq_u32 s1, 2
s_cselect_b32 vcc_lo, -1, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
s_and_b32 s0, vcc_lo, exec_lo
s_cselect_b32 s9, s3, s9
s_cmp_eq_u32 s1, 1
s_cselect_b32 s0, -1, 0
v_cndmask_b32_e64 v4, v0, v7, s0
s_and_b32 s13, s0, exec_lo
s_cselect_b32 s11, s3, s11
s_cmp_eq_u32 s1, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v4, v4, v6, vcc_lo
s_cselect_b32 s1, -1, 0
v_add_f32_e32 v4, v5, v4
s_delay_alu instid0(VALU_DEP_1)
v_cndmask_b32_e64 v0, v0, v4, s1
v_cndmask_b32_e64 v7, v7, v4, s0
v_cndmask_b32_e32 v6, v6, v4, vcc_lo
s_and_b32 s0, s1, exec_lo
s_cselect_b32 s10, s3, s10
s_add_i32 s12, s12, -1
s_add_i32 s2, s2, 4
s_cmp_eq_u32 s12, 0
s_cbranch_scc0 .LBB1_4
.LBB1_5:
v_mov_b32_e32 v8, 0
s_mov_b32 s1, 0
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s0, s1
.LBB1_6:
s_mov_b32 s13, exec_lo
s_mov_b32 s12, exec_lo
v_mbcnt_lo_u32_b32 v4, s13, 0
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_eq_u32_e32 0, v4
s_cbranch_execz .LBB1_9
s_lshl_b64 s[2:3], s[0:1], 2
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s2, s4, s2
s_addc_u32 s3, s5, s3
s_cmp_eq_u32 s0, 1
global_load_b32 v5, v8, s[2:3]
s_cselect_b32 vcc_lo, -1, 0
s_cmp_eq_u32 s0, 2
v_cndmask_b32_e32 v4, v0, v7, vcc_lo
s_cselect_b32 vcc_lo, -1, 0
s_bcnt1_i32_b32 s13, s13
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_f32_ubyte0_e32 v9, s13
v_cndmask_b32_e32 v4, v4, v6, vcc_lo
s_mov_b32 s13, 0
s_delay_alu instid0(VALU_DEP_1)
v_mul_f32_e32 v9, v4, v9
.LBB1_8:
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_add_f32_e32 v4, v5, v9
global_atomic_cmpswap_b32 v4, v8, v[4:5], s[2:3] glc
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, v4, v5
v_mov_b32_e32 v5, v4
s_or_b32 s13, vcc_lo, s13
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s13
s_cbranch_execnz .LBB1_8
.LBB1_9:
s_or_b32 exec_lo, exec_lo, s12
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
s_mov_b32 s3, exec_lo
s_mov_b32 s2, exec_lo
v_mbcnt_lo_u32_b32 v4, s3, 0
v_cmpx_eq_u32_e32 0, v4
s_cbranch_execz .LBB1_11
s_lshl_b64 s[12:13], s[0:1], 2
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s12, s6, s12
s_addc_u32 s13, s7, s13
s_cmp_eq_u32 s0, 1
s_cselect_b32 s14, s11, s10
s_cmp_eq_u32 s0, 2
s_cselect_b32 s14, s9, s14
s_bcnt1_i32_b32 s3, s3
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_mul_i32 s3, s14, s3
v_mov_b32_e32 v4, s3
global_atomic_add_u32 v8, v4, s[12:13]
.LBB1_11:
s_or_b32 exec_lo, exec_lo, s2
s_add_i32 s0, s0, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lg_u32 s0, 3
s_cbranch_scc1 .LBB1_6
.LBB1_12:
s_or_b32 exec_lo, exec_lo, s8
v_cmp_gt_i32_e32 vcc_lo, 3, v3
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB1_14
v_add_co_u32 v3, vcc_lo, s6, v1
v_add_co_ci_u32_e32 v4, vcc_lo, s7, v2, vcc_lo
v_add_co_u32 v0, vcc_lo, s4, v1
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v2, vcc_lo
global_load_b32 v2, v[3:4], off
global_load_b32 v3, v[0:1], off
s_waitcnt vmcnt(1)
v_cvt_f32_i32_e32 v2, v2
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_scale_f32 v4, null, v2, v2, v3
v_rcp_f32_e32 v5, v4
s_waitcnt_depctr 0xfff
v_fma_f32 v6, -v4, v5, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v5, v6, v5
v_div_scale_f32 v6, vcc_lo, v3, v2, v3
v_mul_f32_e32 v7, v6, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v8, -v4, v7, v6
v_fmac_f32_e32 v7, v8, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v4, -v4, v7, v6
v_div_fmas_f32 v4, v4, v5, v7
s_delay_alu instid0(VALU_DEP_1)
v_div_fixup_f32 v2, v4, v2, v3
global_store_b32 v[0:1], v2, off
.LBB1_14:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| kMeansCentroidUpdate | 10,972 | 3,098 | stackv2-00000-of-00015 |
// Demangled: kMeansClusterAssignment(float*, int*, float*)
Function : _Z23kMeansClusterAssignmentPfPiS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R2, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R2, R2, UR4, R3 &req={1} ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R2, 0x3f, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R6, c[0x0][0x390] &wr=0x1 ?trans2;
LDG.E R6, desc[UR4][R6.64] &req={1} &wr=0x2 ?trans1;
IMAD.WIDE R4, R2, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
LDG.E R3, desc[UR4][R4.64] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x1c0 ?trans1;
FADD R0, -R3, R6 &req={2} ?WAIT4_END_GROUP;
FMUL R0, R0, R0 ?WAIT5_END_GROUP;
IADD3 R8, PT, PT, R0, -0xd000000, RZ ?trans1;
MUFU.RSQ R9, R0 &rd=0x0 &wr=0x1 ?trans4;
ISETP.GT.U32.AND P0, PT, R8, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x170 &req={0} ?trans5;
MOV R9, 0x160 &req={1} ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x4a0 ?trans5;
BRA 0x1b0 ?trans5;
FMUL.FTZ R5, R0, R9 &req={1} ?trans1;
FMUL.FTZ R9, R9, 0.5 ?WAIT3_END_GROUP;
FFMA R0, -R5, R5, R0 ?WAIT4_END_GROUP;
FFMA R0, R0, R9, R5 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans2;
LDG.E R4, desc[UR4][R4.64+0x4] &req={0} &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x2f0 ?trans1;
FMNMX R11, R0, +INF , PT ?trans1;
FADD R6, -R3, R4 &req={2} ?WAIT4_END_GROUP;
FMUL R6, R6, R6 ?WAIT4_END_GROUP;
MUFU.RSQ R7, R6 &rd=0x0 &wr=0x1 ?trans1;
IADD3 R8, PT, PT, R6, -0xd000000, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R8, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x2a0 &req={1,0} ?trans5;
MOV R0, R6 ?trans1;
MOV R9, 0x290 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x4a0 ?trans5;
BRA 0x2e0 ?trans5;
FMUL.FTZ R5, R6, R7 ?trans1;
FMUL.FTZ R7, R7, 0.5 ?WAIT3_END_GROUP;
FFMA R0, -R5, R5, R6 ?WAIT4_END_GROUP;
FFMA R0, R0, R7, R5 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans2;
LDG.E R4, desc[UR4][R4.64+0x8] &req={0} &wr=0x2 ?trans1;
FSETP.GEU.AND P0, PT, R0.reuse, R11.reuse, PT ?trans1;
BSSY.RECONVERGENT B0, 0x440 ?trans4;
FSEL R11, R0, R11, !P0 ?trans1;
SEL R10, RZ, 0x1, P0 ?trans1;
FADD R3, -R3, R4 &req={2} ?WAIT4_END_GROUP;
FMUL R3, R3, R3 ?WAIT4_END_GROUP;
MUFU.RSQ R6, R3 &rd=0x0 &wr=0x1 ?trans1;
IADD3 R7, PT, PT, R3, -0xd000000, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R7, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P1 BRA 0x3f0 &req={1,0} ?trans5;
MOV R0, R3 ?trans1;
MOV R9, 0x3e0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x4a0 ?trans5;
BRA 0x430 ?trans5;
FMUL.FTZ R0, R3, R6 ?trans1;
FMUL.FTZ R6, R6, 0.5 ?WAIT3_END_GROUP;
FFMA R3, -R0, R0, R3 ?WAIT4_END_GROUP;
FFMA R0, R3, R6, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
FSETP.GEU.AND P0, PT, R0, R11, PT ?trans1;
IMAD.WIDE R2, R2, 0x4, R4 &req={0} ?WAIT4_END_GROUP;
SEL R5, R10, 0x2, P0 ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R5 ?trans1;
EXIT ?trans5;
LOP3.LUT P0, RZ, R0, 0x7fffffff, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 MOV R4, R0 ?trans1;
@!P0 BRA 0x5d0 ?trans6;
FSETP.GEU.FTZ.AND P0, PT, R0, RZ, PT ?WAIT13_END_GROUP;
@!P0 MOV R4, 0x7fffffff ?trans1;
@!P0 BRA 0x5d0 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P0 FADD.FTZ R4, R0, 1 ?trans1;
@P0 BRA 0x5d0 ?trans6;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P0 FFMA R5, R0, 1.84467440737095516160e+19, RZ ?WAIT4_END_GROUP;
@P0 MUFU.RSQ R4, R5 &wr=0x0 ?trans2;
@P0 FMUL.FTZ R6, R5, R4 &req={0} ?trans1;
@P0 FMUL.FTZ R8, R4, 0.5 ?trans1;
@!P0 MOV R4, R0 ?trans2;
@P0 FADD.FTZ R7, -R6, -RZ ?WAIT4_END_GROUP;
@P0 FFMA R7, R6, R7, R5 ?WAIT4_END_GROUP;
@P0 FFMA R7, R7, R8, R6 ?WAIT4_END_GROUP;
@P0 FMUL.FTZ R4, R7, 2.3283064365386962891e-10 ?WAIT7_END_GROUP;
MOV R0, R4 ?trans1;
MOV R4, R9 ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R4 0x0 ?trans5;
BRA 0x610;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: kMeansClusterAssignment(float*, int*, float*)
_Z23kMeansClusterAssignmentPfPiS_:
s_load_b32 s2, s[0:1], 0x24
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e32 64, v1
s_cbranch_execz .LBB0_4
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x10
v_ashrrev_i32_e32 v2, 31, v1
v_mov_b32_e32 v4, 0x7f800000
s_mov_b32 s1, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
global_load_b32 v3, v[2:3], off
v_mov_b32_e32 v2, 0
.LBB0_2:
s_load_b32 s0, s[2:3], 0x0
s_waitcnt vmcnt(0) lgkmcnt(0)
v_sub_f32_e32 v5, s0, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v5, v5, v5
v_mul_f32_e32 v6, 0x4f800000, v5
v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v5, v5, v6, vcc_lo
v_sqrt_f32_e32 v6, v5
s_waitcnt_depctr 0xfff
v_add_nc_u32_e32 v7, -1, v6
v_add_nc_u32_e32 v8, 1, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v9, -v7, v6, v5
v_fma_f32 v10, -v8, v6, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_ge_f32_e64 s0, 0, v9
v_cndmask_b32_e64 v6, v6, v7, s0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_lt_f32_e64 s0, 0, v10
v_cndmask_b32_e64 v6, v6, v8, s0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v7, 0x37800000, v6
v_cndmask_b32_e32 v6, v6, v7, vcc_lo
v_cmp_class_f32_e64 vcc_lo, v5, 0x260
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v5, v6, v5, vcc_lo
v_cmp_lt_f32_e32 vcc_lo, v5, v4
v_cndmask_b32_e32 v4, v4, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_4)
v_cndmask_b32_e64 v2, v2, s1, vcc_lo
s_add_i32 s1, s1, 1
s_add_u32 s2, s2, 4
s_addc_u32 s3, s3, 0
s_cmp_eq_u32 s1, 3
s_cbranch_scc0 .LBB0_2
v_add_co_u32 v0, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB0_4:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| kMeansClusterAssignment | 2,212 | 1,323 | stackv2-00000-of-00015 |
// Demangled: fillTwoIntegerArraysKernel(int, int, int*, int, int*, int)
Function : _Z26fillTwoIntegerArraysKerneliiPiiS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R0, UR4, R3 &req={1} ?WAIT4_END_GROUP;
IMAD R0, R0, UR7, RZ &req={2} ?WAIT5_END_GROUP;
IADD3 R2, PT, PT, R0, UR7, RZ ?WAIT5_END_GROUP;
VIMNMX.S32 R3, R2, UR6, PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, R3, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
IADD3 R12, PT, PT, R3.reuse, -R0.reuse, RZ ?trans2;
IADD3 R3, PT, PT, -R3, R0, RZ ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0x320 ?trans1;
LOP3.LUT R14, R12, 0x7, RZ, 0xc0, !PT ?trans2;
ISETP.GT.U32.AND P1, PT, R3, -0x8, PT ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R14, RZ, PT ?WAIT10_END_GROUP;
@P1 BRA 0x310 ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans1;
LOP3.LUT R6, R12, 0xfffffff8, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R10, PT, PT, -R6, RZ, RZ ?WAIT3_END_GROUP;
LDC.64 R4, c[0x0][0x398] &wr=0x2 ?trans8;
LDC R11, c[0x0][0x390] &wr=0x3 ?trans8;
LDC R13, c[0x0][0x3a0] &wr=0x4 ?trans1;
IADD.64 R2, R2, 0x10 &req={1} ?WAIT2_END_GROUP;
IADD.64 R4, R4, 0x10 &req={2} ?WAIT8_END_GROUP;
IMAD.WIDE R6, R0, 0x4, R2 &req={1} ?trans1;
IADD3 R10, PT, PT, R10, 0x8, RZ ?WAIT3_END_GROUP;
IMAD.WIDE R8, R0, 0x4, R4 ?trans1;
STG.E desc[UR4][R6.64+-0x10], R11 &req={3,0} &rd=0x1 ?trans1;
ISETP.NE.AND P1, PT, R10, RZ, PT ?trans1;
IADD3 R0, PT, PT, R0, 0x8, RZ ?trans2;
STG.E desc[UR4][R8.64+-0x10], R13 &req={4} &rd=0x1 ?trans4;
STG.E desc[UR4][R6.64+-0xc], R11 &rd=0x1 ?trans4;
STG.E desc[UR4][R8.64+-0xc], R13 &rd=0x1 ?trans4;
STG.E desc[UR4][R6.64+-0x8], R11 &rd=0x1 ?trans4;
STG.E desc[UR4][R8.64+-0x8], R13 &rd=0x1 ?trans4;
STG.E desc[UR4][R6.64+-0x4], R11 &rd=0x1 ?trans4;
STG.E desc[UR4][R8.64+-0x4], R13 &rd=0x1 ?trans4;
STG.E desc[UR4][R6.64], R11 &rd=0x1 ?trans4;
STG.E desc[UR4][R8.64], R13 &rd=0x1 ?trans4;
STG.E desc[UR4][R6.64+0x4], R11 &rd=0x1 ?trans4;
STG.E desc[UR4][R8.64+0x4], R13 &rd=0x1 ?trans4;
STG.E desc[UR4][R6.64+0x8], R11 &rd=0x1 ?trans4;
STG.E desc[UR4][R8.64+0x8], R13 &rd=0x1 ?trans4;
STG.E desc[UR4][R6.64+0xc], R11 &rd=0x1 ?trans4;
STG.E desc[UR4][R8.64+0xc], R13 &rd=0x1 ?trans1;
@P1 BRA 0x1b0 ?trans5;
BSYNC.RECONVERGENT B0 &req={0} ?trans5;
@!P0 EXIT ?trans5;
ISETP.GE.U32.AND P0, PT, R14, 0x4, PT ?trans1;
LOP3.LUT R6, R12, 0x3, RZ, 0xc0, !PT &req={1} ?trans1;
BSSY.RECONVERGENT B0, 0x480 ?trans4;
ISETP.NE.AND P1, PT, R6, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x470 ?trans6;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x398] &wr=0x1 ?trans8;
LDC R7, c[0x0][0x390] &wr=0x2 ?trans8;
LDC R9, c[0x0][0x3a0] &wr=0x3 ?trans1;
IMAD.WIDE R2, R0, 0x4, R2 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R0.reuse, 0x4, R4 &req={1} ?trans1;
IADD3 R0, PT, PT, R0, 0x4, RZ ?trans1;
STG.E desc[UR4][R2.64], R7 &req={2} &rd=0x0 ?trans4;
STG.E desc[UR4][R4.64], R9 &req={3} &rd=0x0 ?trans4;
STG.E desc[UR4][R2.64+0x4], R7 &rd=0x0 ?trans4;
STG.E desc[UR4][R4.64+0x4], R9 &rd=0x0 ?trans4;
STG.E desc[UR4][R2.64+0x8], R7 &rd=0x0 ?trans4;
STG.E desc[UR4][R4.64+0x8], R9 &rd=0x0 ?trans4;
STG.E desc[UR4][R2.64+0xc], R7 &rd=0x0 ?trans4;
STG.E desc[UR4][R4.64+0xc], R9 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
@!P1 EXIT ?trans5;
ISETP.NE.AND P0, PT, R6, 0x1, PT ?trans1;
LOP3.LUT R2, R12, 0x1, RZ, 0xc0, !PT &req={0} ?trans1;
BSSY.RECONVERGENT B0, 0x5a0 ?trans4;
ISETP.NE.U32.AND P1, PT, R2, 0x1, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x590 ?trans6;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x398] &wr=0x1 ?trans8;
LDC R7, c[0x0][0x390] &wr=0x2 ?trans8;
LDC R9, c[0x0][0x3a0] &wr=0x3 ?trans1;
IMAD.WIDE R2, R0, 0x4, R2 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R0.reuse, 0x4, R4 &req={1} ?trans1;
IADD3 R0, PT, PT, R0, 0x2, RZ ?trans1;
STG.E desc[UR4][R2.64], R7 &req={2} &rd=0x0 ?trans4;
STG.E desc[UR4][R4.64], R9 &req={3} &rd=0x0 ?trans4;
STG.E desc[UR4][R2.64+0x4], R7 &rd=0x0 ?trans4;
STG.E desc[UR4][R4.64+0x4], R9 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
@P1 EXIT ?trans5;
LDC.64 R2, c[0x0][0x388] &req={0} &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x398] &wr=0x1 ?trans8;
LDC R7, c[0x0][0x390] &wr=0x2 ?trans8;
LDC R9, c[0x0][0x3a0] &wr=0x3 ?trans1;
IMAD.WIDE R2, R0, 0x4, R2 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R0, 0x4, R4 &req={1} ?trans1;
STG.E desc[UR4][R2.64], R7 &req={2} ?trans4;
STG.E desc[UR4][R4.64], R9 &req={3} ?trans1;
EXIT ?trans5;
BRA 0x640;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: fillTwoIntegerArraysKernel(int, int, int*, int, int*, int)
_Z26fillTwoIntegerArraysKerneliiPiiS_i:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x34
s_load_b64 s[2:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
v_mul_lo_u32 v0, v1, s3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v1, s3, v0
v_min_i32_e32 v5, s2, v1
s_mov_b32 s2, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_lt_i32_e64 v0, v5
s_cbranch_execz .LBB0_3
s_clause 0x3
s_load_b64 s[2:3], s[0:1], 0x8
s_load_b64 s[4:5], s[0:1], 0x18
s_load_b32 s6, s[0:1], 0x10
s_load_b32 s0, s[0:1], 0x20
v_ashrrev_i32_e32 v1, 31, v0
s_mov_b32 s1, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 2, v[0:1]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v1, vcc_lo, s2, v3
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s3, v4, vcc_lo
v_add_co_u32 v3, vcc_lo, s4, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s0
.LBB0_2:
v_add_nc_u32_e32 v0, 1, v0
global_store_b32 v[1:2], v6, off
global_store_b32 v[3:4], v7, off
v_add_co_u32 v1, vcc_lo, v1, 4
v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
v_cmp_ge_i32_e32 vcc_lo, v0, v5
v_add_co_u32 v3, s0, v3, 4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_add_co_ci_u32_e64 v4, s0, 0, v4, s0
s_or_b32 s1, vcc_lo, s1
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execnz .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| fillTwoIntegerArraysKernel | 2,695 | 883 | stackv2-00000-of-00015 |
// Demangled: mean_interpolate_forward(int, int, int, int, int, int const*, int const*, float const*, float*)
Function : _Z24mean_interpolate_forwardiiiiiPKiS0_PKfPf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R0, c[0x0][0x380] &wr=0x1 ?trans2;
ISETP.LE.AND P0, PT, R0, UR4, PT &req={1} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R4, c[0x0][0x398] &wr=0x0 ?trans1;
S2R R14, SR_TID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x38c] &wr=0x2 ?trans1;
LDCU UR6, c[0x0][0x384] &wr=0x2 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x3 ?trans1;
IADD.64 R4, R4, 0x8 &req={0} ?trans2;
UIMAD UR5, UR5, UR6, URZ &req={3,2,1} ?WAIT12_END_GROUP;
ISETP.GE.AND P0, PT, R14, UR5, PT ?trans1;
BSSY.RECONVERGENT B0, 0xee0 ?WAIT12_END_GROUP;
@P0 BRA 0xed0 &req={5,2,1,0} ?trans5;
LDC R2, c[0x0][0x384] &wr=0x0 ?trans1;
MOV R15, R14 ?trans1;
IMAD R2, R2, UR4, RZ &req={0} ?WAIT7_END_GROUP;
LDC R10, c[0x0][0x38c] &req={0} &wr=0x0 ?trans1;
IABS R11, R15 ?trans2;
IABS R9, R10 &req={0} ?WAIT4_END_GROUP;
I2F.RP R0, R9 &wr=0x0 ?trans2;
MUFU.RCP R0, R0 &req={0} &wr=0x0 ?trans2;
IADD3 R6, PT, PT, R0, 0xffffffe, RZ &req={2,1,0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R7, R6 &rd=0x0 &wr=0x1 ?trans2;
HFMA2 R6, -RZ, RZ, 0, 0 &req={0} ?trans1;
IADD3 R8, PT, PT, RZ, -R7, RZ &req={1} ?WAIT5_END_GROUP;
IMAD R3, R8, R9, RZ ?trans1;
MOV R8, R11 ?WAIT3_END_GROUP;
IMAD.HI.U32 R7, R7, R3, R6 ?WAIT6_END_GROUP;
IMAD.HI.U32 R3, R7, R8, RZ ?trans2;
LDC.64 R6, c[0x0][0x3a0] &wr=0x0 ?trans3;
IADD3 R0, PT, PT, -R3, RZ, RZ ?WAIT5_END_GROUP;
IMAD R0, R9, R0, R8 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R9, R0, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R0, PT, PT, R0, -R9, RZ ?trans2;
@!P1 IADD3 R3, PT, PT, R3, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, R9, PT ?trans1;
LOP3.LUT R0, R15, R10, RZ, 0x3c, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R0, RZ, PT ?WAIT7_END_GROUP;
@P0 IADD3 R3, PT, PT, R3, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R10, RZ, PT ?WAIT5_END_GROUP;
@!P1 IADD3 R3, PT, PT, -R3, RZ, RZ ?WAIT8_END_GROUP;
@!P0 LOP3.LUT R3, RZ, R10, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R9, PT, PT, R2, R3, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R6, R9, 0x4, R6 &req={0} ?WAIT5_END_GROUP;
LDG.E R17, desc[UR8][R6.64] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B1, 0xe90 ?trans1;
IADD3 R18, PT, PT, -R3, RZ, RZ ?trans1;
ISETP.GE.AND P0, PT, R17, 0x1, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0xe80 &req={5} ?trans5;
LDC.64 R6, c[0x0][0x3b0] &wr=0x0 ?trans1;
IMAD R3, R2, R10, R15 ?trans1;
LDCU UR6, c[0x0][0x390] &wr=0x1 ?trans3;
IMAD.WIDE R6, R3, 0x4, R6 &req={0} ?WAIT5_END_GROUP;
LDG.E R25, desc[UR8][R6.64] &rd=0x0 &wr=0x5 ?trans1;
ISETP.GE.U32.AND P0, PT, R17, 0x4, PT ?trans1;
IMAD R22, R9, UR6, RZ &req={1} ?trans1;
BSSY.RECONVERGENT B2, 0x9d0 ?trans1;
IMAD R18, R10, R18, R15 ?trans1;
I2FP.F32.U32 R3, R17 ?trans2;
LOP3.LUT R16, R17, 0x3, RZ, 0xc0, !PT ?trans1;
MOV R23, RZ ?WAIT6_END_GROUP;
@!P0 BRA 0x9c0 &req={0} ?trans5;
LDC.64 R8, c[0x0][0x3a8] &wr=0x0 ?trans1;
LOP3.LUT R17, R17, 0x7ffffffc, RZ, 0xc0, !PT ?trans1;
HFMA2 R23, -RZ, RZ, 0, 0 ?trans1;
MOV R19, R22 ?trans2;
IADD3 R17, PT, PT, -R17, RZ, RZ ?WAIT3_END_GROUP;
LDC.64 R10, c[0x0][0x388] &wr=0x1 ?trans4;
IMAD.WIDE R12, R19, 0x4, R4 ?WAIT5_END_GROUP;
LDG.E R21, desc[UR8][R12.64+-0x8] &wr=0x2 ?trans1;
MUFU.RCP R24, R3 &wr=0x3 ?trans1;
IMAD R21, R10, UR4, R21 &req={2,1} ?WAIT4_END_GROUP;
IMAD R21, R21, R11, R18 ?WAIT4_END_GROUP;
IMAD.WIDE R20, R21, 0x4, R8 &req={0} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR8][R20.64] &wr=0x2 ?trans1;
FFMA R27, -R3, R24, 1 &req={3} ?trans1;
BSSY.RECONVERGENT B3, 0x590 ?trans3;
FFMA R27, R24, R27, R24 ?trans1;
FCHK P0, R0, R3 &req={2} &wr=0x0 ?trans3;
FFMA R24, R0, R27, RZ ?WAIT4_END_GROUP;
FFMA R26, -R3, R24, R0 ?WAIT4_END_GROUP;
FFMA R24, R27, R26, R24 ?trans1;
@!P0 BRA 0x580 &req={0} ?trans6;
MOV R24, 0x570 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xf40 &req={5} ?trans5;
MOV R24, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B3 ?trans5;
FADD R25, R24, R25 &req={5} ?WAIT5_END_GROUP;
STG.E desc[UR8][R6.64], R25 &rd=0x0 ?trans4;
LDG.E R21, desc[UR8][R12.64+-0x4] &wr=0x2 ?trans1;
MUFU.RCP R0, R3 &wr=0x1 ?trans1;
IMAD R21, R10, UR4, R21 &req={2} ?WAIT4_END_GROUP;
IMAD R21, R21, R11, R18 ?WAIT4_END_GROUP;
IMAD.WIDE R20, R21, 0x4, R8 ?WAIT6_END_GROUP;
LDG.E R20, desc[UR8][R20.64] &wr=0x2 ?trans1;
FFMA R27, -R3, R0, 1 &req={1} ?trans1;
BSSY.RECONVERGENT B3, 0x6d0 ?trans3;
FFMA R0, R0, R27, R0 ?trans1;
FCHK P0, R20, R3 &req={2} &wr=0x1 ?trans3;
FFMA R24, R0, R20, RZ ?WAIT4_END_GROUP;
FFMA R27, -R3, R24, R20 ?WAIT4_END_GROUP;
FFMA R0, R0, R27, R24 ?trans1;
@!P0 BRA 0x6c0 &req={1,0} ?trans6;
MOV R0, R20 ?trans1;
MOV R24, 0x6c0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xf40 ?trans5;
BSYNC.RECONVERGENT B3 ?trans5;
FADD R25, R25, R0 ?WAIT5_END_GROUP;
STG.E desc[UR8][R6.64], R25 &rd=0x0 ?trans4;
LDG.E R21, desc[UR8][R12.64] &wr=0x2 ?trans1;
MUFU.RCP R0, R3 &wr=0x1 ?trans1;
IMAD R21, R10, UR4, R21 &req={2} ?WAIT4_END_GROUP;
IMAD R21, R21, R11, R18 ?WAIT4_END_GROUP;
IMAD.WIDE R20, R21, 0x4, R8 ?WAIT6_END_GROUP;
LDG.E R20, desc[UR8][R20.64] &wr=0x2 ?trans1;
FFMA R27, -R3, R0, 1 &req={1} ?trans1;
BSSY.RECONVERGENT B3, 0x810 ?trans3;
FFMA R0, R0, R27, R0 ?trans1;
FCHK P0, R20, R3 &req={2} &wr=0x1 ?trans3;
FFMA R24, R0, R20, RZ ?WAIT4_END_GROUP;
FFMA R27, -R3, R24, R20 ?WAIT4_END_GROUP;
FFMA R0, R0, R27, R24 ?trans1;
@!P0 BRA 0x800 &req={1,0} ?trans6;
MOV R0, R20 ?trans1;
MOV R24, 0x800 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xf40 ?trans5;
BSYNC.RECONVERGENT B3 ?trans5;
FADD R25, R25, R0 ?WAIT5_END_GROUP;
STG.E desc[UR8][R6.64], R25 &rd=0x0 ?trans4;
LDG.E R13, desc[UR8][R12.64+0x4] &wr=0x2 ?trans2;
IMAD R0, R10, UR4, R13 &req={2} ?WAIT4_END_GROUP;
IMAD R21, R0, R11, R18 ?WAIT4_END_GROUP;
IMAD.WIDE R20, R21, 0x4, R8 ?WAIT6_END_GROUP;
LDG.E R20, desc[UR8][R20.64] &wr=0x2 ?trans1;
MUFU.RCP R0, R3 &wr=0x1 ?trans1;
BSSY.RECONVERGENT B3, 0x950 ?trans1;
FFMA R27, -R3, R0, 1 &req={1} ?WAIT4_END_GROUP;
FFMA R0, R0, R27, R0 ?trans1;
FCHK P0, R20, R3 &req={2} &wr=0x1 ?trans3;
FFMA R24, R0, R20, RZ ?WAIT4_END_GROUP;
FFMA R27, -R3, R24, R20 ?WAIT4_END_GROUP;
FFMA R0, R0, R27, R24 ?trans1;
@!P0 BRA 0x940 &req={1,0} ?trans6;
MOV R0, R20 ?trans1;
MOV R24, 0x940 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xf40 ?trans5;
BSYNC.RECONVERGENT B3 ?trans5;
FADD R25, R25, R0 ?trans1;
IADD3 R17, PT, PT, R17, 0x4, RZ ?trans2;
IADD3 R23, PT, PT, R23, 0x4, RZ ?trans2;
IADD3 R19, PT, PT, R19, 0x4, RZ ?trans1;
STG.E desc[UR8][R6.64], R25 &rd=0x2 ?trans1;
ISETP.NE.AND P0, PT, R17, RZ, PT ?WAIT13_END_GROUP;
@P0 BRA 0x460 &req={2} ?trans5;
BSYNC.RECONVERGENT B2 ?trans5;
ISETP.NE.AND P0, PT, R16, RZ, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xe80 ?trans5;
LDC.64 R8, c[0x0][0x398] &wr=0x0 ?trans1;
IADD3 R23, PT, PT, R22, R23, RZ ?WAIT7_END_GROUP;
LDC.64 R20, c[0x0][0x388] &wr=0x1 ?trans8;
LDC.64 R10, c[0x0][0x3a8] &wr=0x2 ?trans1;
IMAD.WIDE R8, R23, 0x4, R8 &req={0} ?WAIT5_END_GROUP;
LDG.E R13, desc[UR8][R8.64] &wr=0x1 ?trans1;
MUFU.RCP R0, R3 &wr=0x0 ?trans1;
IMAD R13, R20, UR4, R13 &req={1} ?WAIT4_END_GROUP;
IMAD R13, R13, R21, R18 ?WAIT4_END_GROUP;
IMAD.WIDE R10, R13, 0x4, R10 &req={2} ?WAIT6_END_GROUP;
LDG.E R10, desc[UR8][R10.64] &wr=0x2 ?trans1;
FFMA R13, -R3, R0, 1 &req={0} ?trans1;
BSSY.RECONVERGENT B2, 0xb60 ?trans3;
FFMA R0, R0, R13, R0 ?trans1;
FCHK P0, R10, R3 &req={2} &wr=0x0 ?trans3;
FFMA R12, R0, R10, RZ ?WAIT4_END_GROUP;
FFMA R13, -R3, R12, R10 ?WAIT4_END_GROUP;
FFMA R0, R0, R13, R12 ?trans1;
@!P0 BRA 0xb50 &req={0} ?trans6;
MOV R0, R10 ?trans1;
MOV R24, 0xb50 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xf40 &req={5} ?trans5;
BSYNC.RECONVERGENT B2 ?trans5;
FADD R25, R0, R25 &req={5} ?trans1;
ISETP.NE.AND P0, PT, R16, 0x1, PT ?WAIT4_END_GROUP;
STG.E desc[UR8][R6.64], R25 &rd=0x0 ?trans9;
@!P0 BRA 0xe80 ?trans5;
LDG.E R13, desc[UR8][R8.64+0x4] &wr=0x2 ?trans1;
LDC.64 R20, c[0x0][0x388] &wr=0x2 ?trans8;
LDC.64 R10, c[0x0][0x3a8] &wr=0x1 ?trans1;
IMAD R13, R20, UR4, R13 &req={2} ?WAIT4_END_GROUP;
IMAD R13, R13, R21, R18 ?WAIT4_END_GROUP;
IMAD.WIDE R10, R13, 0x4, R10 &req={1} ?WAIT6_END_GROUP;
LDG.E R10, desc[UR8][R10.64] &wr=0x2 ?trans1;
MUFU.RCP R0, R3 &wr=0x1 ?trans1;
BSSY.RECONVERGENT B2, 0xce0 ?trans1;
FFMA R13, -R3, R0, 1 &req={1} ?WAIT4_END_GROUP;
FFMA R0, R0, R13, R0 ?trans1;
FCHK P0, R10, R3 &req={2} &wr=0x1 ?trans3;
FFMA R12, R0, R10, RZ ?WAIT4_END_GROUP;
FFMA R13, -R3, R12, R10 ?WAIT4_END_GROUP;
FFMA R0, R0, R13, R12 ?trans1;
@!P0 BRA 0xcd0 &req={1} ?trans6;
MOV R0, R10 ?trans1;
MOV R24, 0xcd0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xf40 &req={0} ?trans5;
BSYNC.RECONVERGENT B2 ?trans5;
FADD R25, R25, R0 &req={0} ?trans1;
ISETP.NE.AND P0, PT, R16, 0x2, PT ?WAIT4_END_GROUP;
STG.E desc[UR8][R6.64], R25 &rd=0x1 ?trans9;
@!P0 BRA 0xe80 ?trans5;
LDG.E R9, desc[UR8][R8.64+0x8] &wr=0x2 ?trans1;
LDC.64 R12, c[0x0][0x388] &wr=0x2 ?trans8;
LDC.64 R10, c[0x0][0x3a8] &wr=0x0 ?trans1;
IMAD R0, R12, UR4, R9 &req={2} ?WAIT4_END_GROUP;
IMAD R13, R0, R13, R18 ?WAIT4_END_GROUP;
IMAD.WIDE R10, R13, 0x4, R10 &req={0} ?WAIT6_END_GROUP;
LDG.E R10, desc[UR8][R10.64] &wr=0x2 ?trans1;
MUFU.RCP R0, R3 &wr=0x0 ?trans1;
BSSY.RECONVERGENT B2, 0xe60 ?trans1;
FFMA R13, -R3, R0, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R0, R0, R13, R0 ?trans1;
FCHK P0, R10, R3 &req={2} &wr=0x0 ?trans3;
FFMA R8, R0, R10, RZ ?WAIT4_END_GROUP;
FFMA R9, -R3, R8, R10 ?WAIT4_END_GROUP;
FFMA R0, R0, R9, R8 ?trans1;
@!P0 BRA 0xe50 &req={0} ?trans6;
MOV R0, R10 ?trans1;
MOV R24, 0xe50 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xf40 &req={1} ?trans5;
BSYNC.RECONVERGENT B2 ?trans5;
FADD R25, R25, R0 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR8][R6.64], R25 &rd=0x2 ?trans2;
BSYNC.RECONVERGENT B1 ?trans5;
LDCU UR6, c[0x0][0x360] &wr=0x3 ?trans2;
IADD3 R15, PT, PT, R15, UR6, RZ &req={3} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R15, UR5, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x120 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU UR6, c[0x0][0x370] &wr=0x3 ?trans1;
LDC R0, c[0x0][0x380] &wr=0x4 ?trans1;
UIADD3 UR4, UPT, UPT, UR6, UR4, URZ &req={3} ?WAIT6_END_GROUP;
ISETP.LE.AND P0, PT, R0, UR4, PT &req={4} ?WAIT13_END_GROUP;
@!P0 BRA 0xc0 ?trans5;
EXIT ?trans5;
SHF.R.U32.HI R20, RZ, 0x17, R3 ?trans1;
BSSY.RECONVERGENT B4, 0x1590 ?trans1;
SHF.R.U32.HI R27, RZ, 0x17, R0 ?trans2;
LOP3.LUT R20, R20, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R27, R27, 0xff, RZ, 0xc0, !PT ?trans1;
MOV R29, R3 ?trans1;
IADD3 R28, PT, PT, R20, -0x1, RZ ?trans2;
IADD3 R26, PT, PT, R27, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R28, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R26, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R21, RZ ?trans1;
@!P0 BRA 0x1170 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0x1570 ?trans5;
LOP3.LUT P0, RZ, R29, 0x7fffffff, R0, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1550 ?trans5;
FSETP.NEU.FTZ.AND P2, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P1 BRA !P2, 0x1550 ?trans5;
LOP3.LUT P2, RZ, R0, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P1, P2, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0x1530 ?trans5;
LOP3.LUT P1, RZ, R29, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x1500 ?trans5;
ISETP.GE.AND P0, PT, R26, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R28, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R21, RZ ?trans1;
@!P0 MOV R21, 0xffffffc0 ?trans1;
@!P0 FFMA R0, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R29, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R21, PT, PT, R21, 0x40, RZ ?WAIT7_END_GROUP;
LEA R26, R20, 0xc0800000, 0x17 ?trans1;
BSSY.RECONVERGENT B5, 0x14f0 ?trans1;
IADD3 R27, PT, PT, R27, -0x7f, RZ ?trans2;
IADD3 R28, PT, PT, -R26, R29, RZ ?WAIT3_END_GROUP;
IMAD R0, R27.reuse, -0x800000, R0 ?trans1;
MUFU.RCP R26, R28 &rd=0x0 &wr=0x1 ?trans1;
FADD.FTZ R31, -R28, -RZ ?trans1;
IADD3 R28, PT, PT, R27, 0x7f, -R20 &req={0} ?WAIT4_END_GROUP;
IADD3 R21, PT, PT, R28, R21, RZ ?trans1;
FFMA R29, R26, R31, 1 &req={1} ?WAIT4_END_GROUP;
FFMA R29, R26, R29, R26 ?WAIT4_END_GROUP;
FFMA R26, R0, R29, RZ ?WAIT4_END_GROUP;
FFMA R30, R31, R26, R0 ?WAIT4_END_GROUP;
FFMA R26, R29, R30, R26 ?WAIT4_END_GROUP;
FFMA R31, R31, R26, R0 ?WAIT4_END_GROUP;
FFMA R0, R29, R31, R26 ?WAIT5_END_GROUP;
SHF.R.U32.HI R20, RZ, 0x17, R0 ?WAIT4_END_GROUP;
LOP3.LUT R20, R20, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R20, PT, PT, R20, R21, RZ ?WAIT4_END_GROUP;
IADD3 R27, PT, PT, R20, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R27, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x14d0 ?trans5;
ISETP.GT.AND P0, PT, R20, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x14a0 ?trans5;
ISETP.GE.AND P0, PT, R20, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x14e0 ?trans5;
ISETP.GE.AND P0, PT, R20, -0x18, PT ?trans1;
LOP3.LUT R0, R0, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x14e0 ?trans5;
FFMA.RZ R21, R29.reuse, R31.reuse, R26.reuse ?trans1;
IADD3 R28, PT, PT, R20.reuse, 0x20, RZ ?trans1;
FFMA.RP R27, R29.reuse, R31.reuse, R26.reuse ?trans1;
FFMA.RM R26, R29, R31, R26 ?trans1;
ISETP.NE.AND P1, PT, R20.reuse, RZ, PT ?trans1;
LOP3.LUT R21, R21, 0x7fffff, RZ, 0xc0, !PT ?trans1;
ISETP.NE.AND P2, PT, R20.reuse, RZ, PT ?trans1;
IADD3 R20, PT, PT, -R20, RZ, RZ ?trans2;
LOP3.LUT R21, R21, 0x800000, RZ, 0xfc, !PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, R27, R26, PT ?WAIT3_END_GROUP;
SHF.L.U32 R28, R21, R28, RZ ?trans1;
SEL R20, R20, RZ, P2 ?WAIT4_END_GROUP;
ISETP.NE.AND P1, PT, R28, RZ, P1 ?trans1;
SHF.R.U32.HI R20, RZ, R20, R21 ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R26, RZ, 0x1, R20 ?WAIT3_END_GROUP;
SEL R21, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R21, R21, 0x1, R26, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R21, R21, R20, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R21, PT, PT, R26, R21, RZ ?WAIT4_END_GROUP;
LOP3.LUT R0, R21, R0, RZ, 0xfc, !PT ?trans1;
BRA 0x14e0 ?trans6;
LOP3.LUT R0, R0, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x14e0 ?trans6;
IMAD R0, R21, 0x800000, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B5 ?trans5;
BRA 0x1580 ?trans5;
LOP3.LUT R0, R29, 0x80000000, R0, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x1580 ?trans6;
LOP3.LUT R0, R29, 0x80000000, R0, 0x48, !PT ?trans1;
BRA 0x1580 ?trans6;
MUFU.RSQ R0, -QNAN &wr=0x0 ?trans1;
BRA 0x1580 ?trans5;
FADD.FTZ R0, R0, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B4 ?trans5;
MOV R20, R24 ?trans1;
HFMA2 R21, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R20 0x0 &req={0} ?trans5;
BRA 0x15c0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: mean_interpolate_forward(int, int, int, int, int, int const*, int const*, float const*, float*)
_Z24mean_interpolate_forwardiiiiiPKiS0_PKfPf:
s_load_b128 s[16:19], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_cmp_ge_i32 s15, s16
s_cbranch_scc1 .LBB0_9
s_add_u32 s2, s0, 56
s_addc_u32 s3, s1, 0
s_ashr_i32 s12, s19, 31
s_load_b32 s20, s[0:1], 0x38
s_add_i32 s4, s19, s12
s_load_b32 s14, s[0:1], 0x10
s_xor_b32 s13, s4, s12
s_mul_i32 s21, s19, s17
v_cvt_f32_u32_e32 v1, s13
s_sub_i32 s4, 0, s13
s_mul_i32 s22, s15, s17
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v1, v1
s_waitcnt lgkmcnt(0)
s_mul_i32 s23, s20, s17
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v1, 0x4f7ffffe, v1
v_cvt_u32_f32_e32 v1, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_mul_lo_u32 v2, s4, v1
s_load_b256 s[4:11], s[0:1], 0x18
v_cmp_gt_i32_e64 s0, s21, v0
v_mul_hi_u32 v2, v1, v2
s_delay_alu instid0(VALU_DEP_1)
v_add_nc_u32_e32 v6, v1, v2
.LBB0_2:
s_delay_alu instid0(VALU_DEP_3)
s_and_saveexec_b32 s24, s0
s_cbranch_execz .LBB0_8
s_load_b32 s1, s[2:3], 0xc
v_mov_b32_e32 v7, v0
s_mul_i32 s25, s15, s17
s_mul_i32 s26, s15, s18
s_mul_i32 s27, s25, s19
s_mov_b32 s29, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s28, s1, 0xffff
.LBB0_4:
v_ashrrev_i32_e32 v1, 31, v7
s_mov_b32 s30, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v2, v7, v1
v_xor_b32_e32 v2, v2, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v3, v2, v6
v_mul_lo_u32 v4, v3, s13
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v2, v2, v4
v_add_nc_u32_e32 v4, 1, v3
v_subrev_nc_u32_e32 v5, s13, v2
v_cmp_le_u32_e32 vcc_lo, s13, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cndmask_b32_e32 v4, v3, v4, vcc_lo
v_cndmask_b32_e32 v2, v2, v5, vcc_lo
v_xor_b32_e32 v3, s12, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v5, 1, v4
v_cmp_le_u32_e32 vcc_lo, s13, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v1, v4, v5, vcc_lo
v_xor_b32_e32 v5, v1, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v4, v5, v3
v_add_nc_u32_e32 v1, s25, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s6, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
global_load_b32 v8, v[1:2], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e32 0, v8
s_cbranch_execz .LBB0_7
v_add_nc_u32_e32 v1, s27, v7
v_add_nc_u32_e32 v5, s22, v5
v_mul_lo_u32 v10, v4, s19
s_mov_b32 s31, 0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v2, 31, v1
v_sub_nc_u32_e32 v3, v5, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[1:2], 2, v[1:2]
v_mul_lo_u32 v3, s14, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v1, vcc_lo, s10, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v4, 31, v3
global_load_b32 v9, v[1:2], off
v_lshlrev_b64 v[4:5], 2, v[3:4]
v_sub_nc_u32_e32 v3, v7, v10
v_cvt_f32_i32_e32 v10, v8
v_add_co_u32 v4, vcc_lo, s4, v4
s_delay_alu instid0(VALU_DEP_4)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
.LBB0_6:
global_load_b32 v11, v[4:5], off
v_add_nc_u32_e32 v8, -1, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_eq_u32_e64 s1, 0, v8
s_or_b32 s31, s1, s31
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v13, s26, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[11:12], null, v13, s19, v[3:4]
v_ashrrev_i32_e32 v12, 31, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[11:12], 2, v[11:12]
v_add_co_u32 v11, vcc_lo, s8, v11
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v12, vcc_lo, s9, v12, vcc_lo
global_load_b32 v11, v[11:12], off
s_waitcnt vmcnt(0)
v_div_scale_f32 v12, null, v10, v10, v11
v_div_scale_f32 v15, vcc_lo, v11, v10, v11
v_rcp_f32_e32 v13, v12
s_waitcnt_depctr 0xfff
v_fma_f32 v14, -v12, v13, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v13, v14, v13
v_mul_f32_e32 v14, v15, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v16, -v12, v14, v15
v_fmac_f32_e32 v14, v16, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v12, -v12, v14, v15
v_div_fmas_f32 v12, v12, v13, v14
v_add_co_u32 v4, vcc_lo, v4, 4
v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fixup_f32 v11, v12, v10, v11
v_add_f32_e32 v9, v9, v11
global_store_b32 v[1:2], v9, off
s_and_not1_b32 exec_lo, exec_lo, s31
s_cbranch_execnz .LBB0_6
.LBB0_7:
s_or_b32 exec_lo, exec_lo, s30
v_add_nc_u32_e32 v7, s28, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_le_i32_e32 vcc_lo, s21, v7
s_or_b32 s29, vcc_lo, s29
s_and_not1_b32 exec_lo, exec_lo, s29
s_cbranch_execnz .LBB0_4
.LBB0_8:
s_or_b32 exec_lo, exec_lo, s24
s_add_i32 s15, s20, s15
s_add_i32 s22, s22, s23
s_cmp_ge_i32 s15, s16
s_cbranch_scc0 .LBB0_2
.LBB0_9:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| mean_interpolate_forward | 8,377 | 3,148 | stackv2-00000-of-00015 |
// Demangled: weighted_interpolate_backward(int, int, int, int, int, int const*, int const*, float const*, float const*, float*)
Function : _Z29weighted_interpolate_backwardiiiiiPKiS0_PKfS2_Pf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R0, c[0x0][0x380] &wr=0x1 ?trans2;
ISETP.LE.AND P0, PT, R0, UR4, PT &req={1} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R12, c[0x0][0x398] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x38c] &wr=0x2 ?trans1;
LDCU UR6, c[0x0][0x384] &wr=0x2 ?trans5;
LDC.64 R14, c[0x0][0x3b0] &wr=0x3 ?trans1;
LDCU UR7, c[0x0][0x360] &wr=0x4 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x0 ?trans2;
IADD.64 R12, R12, 0x10 &req={0} ?WAIT2_END_GROUP;
UIMAD UR5, UR5, UR6, URZ &req={2} ?trans1;
IADD.64 R14, R14, 0x10 &req={4,3,1} ?WAIT11_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT ?trans1;
BSSY.RECONVERGENT B1, 0xf10 ?WAIT12_END_GROUP;
@P0 BRA 0xf00 &req={2,1,0} ?trans5;
LDC R3, c[0x0][0x384] &wr=0x0 ?trans1;
MOV R2, R0 ?trans1;
IMAD R3, R3, UR4, RZ &req={0} ?WAIT7_END_GROUP;
LDC R5, c[0x0][0x38c] &req={2,0} &wr=0x0 ?trans1;
IABS R10, R2 ?trans2;
IABS R9, R5 &req={0} ?WAIT4_END_GROUP;
I2F.RP R4, R9 &wr=0x0 ?trans2;
MUFU.RCP R4, R4 &req={0} &wr=0x0 ?trans2;
IADD3 R6, PT, PT, R4, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R7, R6 &req={1} &rd=0x0 &wr=0x1 ?trans2;
HFMA2 R6, -RZ, RZ, 0, 0 &req={0} ?trans1;
IADD3 R8, PT, PT, RZ, -R7, RZ &req={1} ?WAIT5_END_GROUP;
IMAD R11, R8, R9, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R7, R7, R11, R6 ?WAIT6_END_GROUP;
IMAD.HI.U32 R8, R7, R10, RZ ?trans2;
LDC.64 R6, c[0x0][0x3a0] &wr=0x0 ?trans3;
IADD3 R4, PT, PT, -R8, RZ, RZ ?WAIT5_END_GROUP;
IMAD R4, R9, R4, R10 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R9, R4, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R4, PT, PT, R4, -R9, RZ ?trans2;
@!P0 IADD3 R8, PT, PT, R8, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R4, R9, PT ?trans1;
LOP3.LUT R4, R2, R5, RZ, 0x3c, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R4, RZ, PT ?WAIT7_END_GROUP;
@P1 IADD3 R8, PT, PT, R8, 0x1, RZ ?trans1;
ISETP.NE.AND P1, PT, R5, RZ, PT ?WAIT5_END_GROUP;
@!P0 IADD3 R8, PT, PT, -R8, RZ, RZ ?WAIT8_END_GROUP;
@!P1 LOP3.LUT R8, RZ, R5, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R11, PT, PT, R3, R8, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R6, R11, 0x4, R6 &req={0} ?WAIT5_END_GROUP;
LDG.E R4, desc[UR8][R6.64] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0xed0 ?trans1;
IADD3 R8, PT, PT, -R8, RZ, RZ ?trans1;
ISETP.GE.AND P0, PT, R4, 0x1, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0xec0 ?trans5;
LDC.64 R16, c[0x0][0x3a8] &wr=0x0 ?trans1;
LDCU UR6, c[0x0][0x390] &wr=0x1 ?trans1;
ISETP.GE.U32.AND P1, PT, R4.reuse, 0x8, PT ?trans1;
IMAD R7, R3, R5, R2.reuse ?trans1;
BSSY.RECONVERGENT B2, 0x8e0 ?trans1;
IMAD R6, R5, R8, R2 ?trans1;
LOP3.LUT P0, R28, R4, 0x7, RZ, 0xc0, !PT ?trans1;
MOV R9, RZ ?trans1;
IMAD R8, R11, UR6, RZ &req={1} ?trans2;
IMAD.WIDE R16, R7, 0x4, R16 &req={0} ?WAIT5_END_GROUP;
@!P1 BRA 0x8d0 ?trans5;
LOP3.LUT R10, R4, 0x7ffffff8, RZ, 0xc0, !PT ?trans1;
MOV R9, RZ ?trans1;
MOV R7, R8 ?trans2;
IADD3 R10, PT, PT, -R10, RZ, RZ ?WAIT7_END_GROUP;
IMAD.WIDE R22, R7.reuse, 0x4, R12 ?trans1;
LDG.E R26, desc[UR8][R16.64] &req={0} &wr=0x2 ?trans1;
LDC R11, c[0x0][0x388] &wr=0x0 ?trans3;
LDG.E R24, desc[UR8][R22.64+-0x10] &wr=0x0 ?trans1;
IMAD.WIDE R20, R7, 0x4, R14 ?WAIT4_END_GROUP;
LDC.64 R18, c[0x0][0x3b8] &wr=0x1 ?trans1;
LDG.E R25, desc[UR8][R20.64+-0x10] &wr=0x2 ?trans1;
IMAD R24, R11, UR4, R24 &req={0} ?WAIT4_END_GROUP;
IMAD R27, R24, R5, R6 ?trans2;
FMUL R29, R25, R26 &req={2} ?trans2;
IMAD.WIDE R26, R27, 0x4, R18 &req={1} ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R26.64], R29 &rd=0x0 ?trans4;
LDG.E R24, desc[UR8][R22.64+-0xc] &wr=0x2 ?trans4;
LDG.E R25, desc[UR8][R20.64+-0xc] &wr=0x3 ?trans4;
LDG.E R30, desc[UR8][R16.64] &wr=0x3 ?trans1;
IMAD R24, R11, UR4, R24 &req={2} ?WAIT4_END_GROUP;
IMAD R31, R24, R5, R6 ?trans2;
FMUL R33, R25, R30 &req={3} ?trans2;
IMAD.WIDE R24, R31, 0x4, R18 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R24.64], R33 &rd=0x1 ?trans4;
LDG.E R30, desc[UR8][R22.64+-0x8] &wr=0x2 ?trans4;
LDG.E R31, desc[UR8][R20.64+-0x8] &wr=0x3 ?trans4;
LDG.E R26, desc[UR8][R16.64] &req={0} &wr=0x3 ?trans1;
IMAD R30, R11, UR4, R30 &req={2} ?WAIT4_END_GROUP;
IMAD R27, R30, R5, R6 ?trans2;
FMUL R31, R31, R26 &req={3} ?trans2;
IMAD.WIDE R26, R27, 0x4, R18 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R26.64], R31 &rd=0x0 ?trans4;
LDG.E R30, desc[UR8][R22.64+-0x4] &wr=0x2 ?trans4;
LDG.E R29, desc[UR8][R20.64+-0x4] &wr=0x3 ?trans4;
LDG.E R24, desc[UR8][R16.64] &req={1} &wr=0x3 ?trans1;
IMAD R30, R11, UR4, R30 &req={2} ?WAIT4_END_GROUP;
IMAD R25, R30, R5, R6 ?trans2;
FMUL R29, R29, R24 &req={3} ?trans2;
IMAD.WIDE R24, R25, 0x4, R18 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R24.64], R29 &rd=0x1 ?trans4;
LDG.E R30, desc[UR8][R22.64] &wr=0x2 ?trans4;
LDG.E R32, desc[UR8][R20.64] &wr=0x3 ?trans4;
LDG.E R31, desc[UR8][R16.64] &req={0} &wr=0x3 ?trans1;
IMAD R30, R11, UR4, R30 &req={2} ?WAIT4_END_GROUP;
IMAD R27, R30, R5, R6 ?trans2;
FMUL R31, R32, R31 &req={3} ?trans2;
IMAD.WIDE R26, R27, 0x4, R18 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R26.64], R31 &rd=0x0 ?trans4;
LDG.E R30, desc[UR8][R22.64+0x4] &wr=0x2 ?trans4;
LDG.E R32, desc[UR8][R20.64+0x4] &wr=0x3 ?trans4;
LDG.E R29, desc[UR8][R16.64] &req={1} &wr=0x3 ?trans1;
IMAD R30, R11, UR4, R30 &req={2} ?WAIT4_END_GROUP;
IMAD R25, R30, R5, R6 ?trans2;
FMUL R29, R32, R29 &req={3} ?trans2;
IMAD.WIDE R24, R25, 0x4, R18 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R24.64], R29 &rd=0x1 ?trans4;
LDG.E R30, desc[UR8][R22.64+0x8] &wr=0x2 ?trans4;
LDG.E R32, desc[UR8][R20.64+0x8] &wr=0x3 ?trans4;
LDG.E R31, desc[UR8][R16.64] &req={0} &wr=0x3 ?trans1;
IMAD R30, R11, UR4, R30 &req={2} ?WAIT4_END_GROUP;
IMAD R27, R30, R5, R6 ?trans2;
FMUL R31, R32, R31 &req={3} ?trans2;
IMAD.WIDE R26, R27, 0x4, R18 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R26.64], R31 &rd=0x0 ?trans4;
LDG.E R30, desc[UR8][R22.64+0xc] &wr=0x2 ?trans4;
LDG.E R32, desc[UR8][R20.64+0xc] &wr=0x3 ?trans4;
LDG.E R25, desc[UR8][R16.64] &req={1} &wr=0x3 ?trans1;
IADD3 R10, PT, PT, R10, 0x8, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R10, RZ, PT ?trans1;
IADD3 R9, PT, PT, R9, 0x8, RZ ?trans2;
IADD3 R7, PT, PT, R7, 0x8, RZ ?trans1;
IMAD R30, R11, UR4, R30 &req={2} ?WAIT4_END_GROUP;
IMAD R11, R30, R5, R6 ?trans2;
FMUL R25, R32, R25 &req={3} ?trans2;
IMAD.WIDE R18, R11, 0x4, R18 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R18.64], R25 &rd=0x0 ?trans1;
@P1 BRA 0x440 ?trans5;
BSYNC.RECONVERGENT B2 ?trans5;
@!P0 BRA 0xec0 ?trans5;
ISETP.GE.U32.AND P0, PT, R28, 0x4, PT ?trans1;
LOP3.LUT R26, R4, 0x3, RZ, 0xc0, !PT &req={0} ?trans1;
BSSY.RECONVERGENT B2, 0xbd0 ?trans4;
ISETP.NE.AND P1, PT, R26, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0xbc0 ?trans6;
LDC.64 R10, c[0x0][0x398] &wr=0x0 ?trans1;
IADD3 R7, PT, PT, R8, R9, RZ ?trans1;
LDG.E R24, desc[UR8][R16.64] &wr=0x2 ?trans6;
LDC.64 R18, c[0x0][0x3b0] &wr=0x1 ?trans8;
LDC.64 R20, c[0x0][0x3b8] &wr=0x3 ?trans1;
IMAD.WIDE R10, R7, 0x4, R10 &req={0} ?WAIT5_END_GROUP;
LDG.E R22, desc[UR8][R10.64] &wr=0x4 ?trans1;
IMAD.WIDE R18, R7, 0x4, R18 &req={1} ?trans2;
LDC R7, c[0x0][0x388] &wr=0x4 ?trans3;
LDG.E R23, desc[UR8][R18.64] &wr=0x2 ?trans1;
IMAD R22, R7, UR4, R22 &req={4} ?WAIT4_END_GROUP;
IMAD R25, R22, R5, R6 ?trans2;
FMUL R27, R23, R24 &req={2} ?trans2;
IMAD.WIDE R22, R25, 0x4, R20 &req={3} ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R22.64], R27 &rd=0x0 ?trans4;
LDG.E R24, desc[UR8][R10.64+0x4] &wr=0x2 ?trans4;
LDG.E R25, desc[UR8][R18.64+0x4] &wr=0x3 ?trans4;
LDG.E R28, desc[UR8][R16.64] &wr=0x3 ?trans1;
IMAD R24, R7, UR4, R24 &req={2} ?WAIT4_END_GROUP;
IMAD R29, R24, R5, R6 ?trans2;
FMUL R31, R25, R28 &req={3} ?trans2;
IMAD.WIDE R24, R29, 0x4, R20 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R24.64], R31 &rd=0x1 ?trans4;
LDG.E R28, desc[UR8][R10.64+0x8] &wr=0x2 ?trans4;
LDG.E R29, desc[UR8][R18.64+0x8] &wr=0x3 ?trans4;
LDG.E R22, desc[UR8][R16.64] &req={0} &wr=0x3 ?trans1;
IMAD R28, R7, UR4, R28 &req={2} ?WAIT4_END_GROUP;
IMAD R23, R28, R5, R6 ?trans2;
FMUL R29, R29, R22 &req={3} ?trans2;
IMAD.WIDE R22, R23, 0x4, R20 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R22.64], R29 &rd=0x0 ?trans4;
LDG.E R28, desc[UR8][R10.64+0xc] &wr=0x2 ?trans4;
LDG.E R27, desc[UR8][R18.64+0xc] &wr=0x3 ?trans4;
LDG.E R24, desc[UR8][R16.64] &req={1} &wr=0x3 ?trans1;
IMAD R28, R7, UR4, R28 &req={2} ?WAIT4_END_GROUP;
IMAD R7, R28, R5, R6 ?trans2;
FMUL R27, R27, R24 &req={3} ?trans2;
IMAD.WIDE R20, R7, 0x4, R20 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R20.64], R27 &rd=0x0 ?trans1;
IADD3 R9, PT, PT, R9, 0x4, RZ ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
@!P1 BRA 0xec0 ?trans5;
ISETP.NE.AND P0, PT, R26, 0x1, PT ?trans1;
LOP3.LUT R4, R4, 0x1, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B2, 0xdc0 ?trans4;
ISETP.NE.U32.AND P1, PT, R4, 0x1, PT ?WAIT7_END_GROUP;
@!P0 BRA 0xdb0 ?trans6;
LDC.64 R10, c[0x0][0x398] &wr=0x1 ?trans1;
IADD3 R7, PT, PT, R8, R9, RZ ?trans1;
LDG.E R22, desc[UR8][R16.64] &req={0} &wr=0x2 ?trans6;
LDC.64 R18, c[0x0][0x3b0] &wr=0x0 ?trans8;
LDC R25, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD.WIDE R10, R7, 0x4, R10 &req={1} ?WAIT7_END_GROUP;
LDC.64 R20, c[0x0][0x3b8] &wr=0x1 ?trans1;
LDG.E R4, desc[UR8][R10.64] &wr=0x3 ?trans1;
IMAD.WIDE R18, R7, 0x4, R18 &req={0} ?WAIT5_END_GROUP;
LDG.E R7, desc[UR8][R18.64] &wr=0x2 ?trans1;
IMAD R4, R25, UR4, R4 &req={3} ?WAIT4_END_GROUP;
IMAD R23, R4, R5, R6 ?trans2;
FMUL R7, R7, R22 &req={2} ?trans2;
IMAD.WIDE R22, R23, 0x4, R20 &req={1} ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R22.64], R7 &rd=0x1 ?trans4;
LDG.E R10, desc[UR8][R10.64+0x4] &wr=0x2 ?trans4;
LDG.E R4, desc[UR8][R18.64+0x4] &wr=0x3 ?trans4;
LDG.E R27, desc[UR8][R16.64] &wr=0x3 ?trans1;
IMAD R24, R25, UR4, R10 &req={2} ?WAIT4_END_GROUP;
IMAD R25, R24, R5, R6 ?trans2;
FMUL R27, R4, R27 &req={3} ?trans2;
IMAD.WIDE R20, R25, 0x4, R20 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R20.64], R27 &rd=0x1 ?trans1;
IADD3 R9, PT, PT, R9, 0x2, RZ ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
@P1 BRA 0xec0 ?trans5;
LDC.64 R10, c[0x0][0x398] &wr=0x2 ?trans1;
IADD3 R7, PT, PT, R8, R9, RZ &req={1} ?trans1;
LDG.E R17, desc[UR8][R16.64] &wr=0x3 ?trans6;
LDC.64 R18, c[0x0][0x3b0] &wr=0x1 ?trans1;
IMAD.WIDE R8, R7, 0x4, R10 &req={2} ?WAIT6_END_GROUP;
LDG.E R8, desc[UR8][R8.64] &wr=0x2 ?trans1;
IMAD.WIDE R10, R7, 0x4, R18 &req={1} ?trans2;
LDC R7, c[0x0][0x388] &wr=0x2 ?trans4;
LDG.E R10, desc[UR8][R10.64] &wr=0x3 ?trans4;
LDC.64 R18, c[0x0][0x3b8] &wr=0x1 ?trans1;
IMAD R4, R7, UR4, R8 &req={2} ?WAIT4_END_GROUP;
IMAD R5, R4, R5, R6 ?trans2;
FMUL R7, R10, R17 &req={3} ?trans2;
IMAD.WIDE R4, R5, 0x4, R18 &req={1} ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R4.64], R7 &rd=0x2 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R2, PT, PT, R2, UR7, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R2, UR5, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x150 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
LDCU UR6, c[0x0][0x370] &wr=0x3 ?trans1;
LDC R2, c[0x0][0x380] &wr=0x4 ?trans1;
UIADD3 UR4, UPT, UPT, UR6, UR4, URZ &req={3} ?WAIT6_END_GROUP;
ISETP.LE.AND P0, PT, R2, UR4, PT &req={4} ?WAIT13_END_GROUP;
@!P0 BRA 0xf0 ?trans5;
EXIT ?trans5;
BRA 0xf70;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: weighted_interpolate_backward(int, int, int, int, int, int const*, int const*, float const*, float const*, float*)
_Z29weighted_interpolate_backwardiiiiiPKiS0_PKfS2_Pf:
s_load_b128 s[16:19], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_cmp_ge_i32 s15, s16
s_cbranch_scc1 .LBB3_11
s_add_u32 s2, s0, 64
s_addc_u32 s3, s1, 0
s_ashr_i32 s14, s19, 31
s_load_b32 s21, s[0:1], 0x10
s_add_i32 s4, s19, s14
s_mul_i32 s22, s19, s17
s_xor_b32 s20, s4, s14
s_load_b256 s[4:11], s[0:1], 0x18
v_cvt_f32_u32_e32 v1, s20
s_sub_i32 s12, 0, s20
v_cmp_gt_i32_e32 vcc_lo, s22, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v1, v1
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v1, 0x4f7ffffe, v1
v_cvt_u32_f32_e32 v1, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_mul_lo_u32 v2, s12, v1
s_clause 0x1
s_load_b64 s[12:13], s[0:1], 0x38
s_load_b32 s1, s[0:1], 0x40
v_mul_hi_u32 v2, v1, v2
s_delay_alu instid0(VALU_DEP_1)
v_add_nc_u32_e32 v8, v1, v2
.LBB3_2:
s_and_saveexec_b32 s23, vcc_lo
s_cbranch_execz .LBB3_10
s_load_b32 s0, s[2:3], 0xc
v_mov_b32_e32 v9, v0
s_mul_i32 s24, s15, s17
s_mul_i32 s25, s15, s18
s_mul_i32 s26, s24, s19
s_mov_b32 s28, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s27, s0, 0xffff
.LBB3_4:
v_ashrrev_i32_e32 v1, 31, v9
s_mov_b32 s29, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v2, v9, v1
v_xor_b32_e32 v2, v2, v1
v_xor_b32_e32 v1, s14, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v3, v2, v8
v_mul_lo_u32 v4, v3, s20
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v2, v2, v4
v_add_nc_u32_e32 v4, 1, v3
v_subrev_nc_u32_e32 v5, s20, v2
v_cmp_le_u32_e64 s0, s20, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cndmask_b32_e64 v3, v3, v4, s0
v_cndmask_b32_e64 v2, v2, v5, s0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v4, 1, v3
v_cmp_le_u32_e64 s0, s20, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v2, v3, v4, s0
v_xor_b32_e32 v2, v2, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v3, v2, v1
v_add_nc_u32_e32 v1, s24, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[4:5], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v4, s0, s6, v4
v_add_co_ci_u32_e64 v5, s0, s7, v5, s0
global_load_b32 v10, v[4:5], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e32 0, v10
s_cbranch_execz .LBB3_9
v_add_nc_u32_e32 v4, s26, v9
v_mul_lo_u32 v6, v3, s19
v_mul_lo_u32 v11, v1, s21
s_mov_b32 s30, 0
s_mov_b32 s31, 0
v_ashrrev_i32_e32 v5, 31, v4
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v1, v9, v6
v_lshlrev_b64 v[2:3], 2, v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v2, s0, s8, v2
v_add_co_ci_u32_e64 v3, s0, s9, v3, s0
.LBB3_6:
v_add_nc_u32_e32 v4, s31, v11
s_mov_b32 s33, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v5, 31, v4
v_lshlrev_b64 v[4:5], 2, v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v6, s0, s4, v4
v_add_co_ci_u32_e64 v7, s0, s5, v5, s0
v_add_co_u32 v4, s0, s10, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e64 v5, s0, s11, v5, s0
global_load_b32 v6, v[6:7], off
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v12, s25, v6
v_mad_u64_u32 v[6:7], null, v12, s19, v[1:2]
global_load_b32 v12, v[4:5], off
v_ashrrev_i32_e32 v7, 31, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[6:7]
v_add_co_u32 v4, s0, s12, v6
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v5, s0, s13, v7, s0
global_load_b32 v6, v[2:3], off
global_load_b32 v7, v[4:5], off
s_waitcnt vmcnt(1)
v_mul_f32_e32 v12, v12, v6
.LBB3_7:
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_add_f32_e32 v6, v7, v12
global_atomic_cmpswap_b32 v6, v[4:5], v[6:7], off glc
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e64 s0, v6, v7
v_mov_b32_e32 v7, v6
s_or_b32 s33, s0, s33
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s33
s_cbranch_execnz .LBB3_7
s_or_b32 exec_lo, exec_lo, s33
s_add_i32 s31, s31, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_eq_u32_e64 s0, s31, v10
s_or_b32 s30, s0, s30
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s30
s_cbranch_execnz .LBB3_6
.LBB3_9:
s_or_b32 exec_lo, exec_lo, s29
v_add_nc_u32_e32 v9, s27, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_le_i32_e64 s0, s22, v9
s_or_b32 s28, s0, s28
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s28
s_cbranch_execnz .LBB3_4
.LBB3_10:
s_or_b32 exec_lo, exec_lo, s23
s_waitcnt lgkmcnt(0)
s_add_i32 s15, s1, s15
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_ge_i32 s15, s16
s_cbranch_scc0 .LBB3_2
.LBB3_11:
s_endpgm
| weighted_interpolate_backward | 6,635 | 2,885 | stackv2-00000-of-00015 |
// Demangled: weighted_interpolate_forward(int, int, int, int, int, int const*, int const*, float const*, float const*, float*)
Function : _Z28weighted_interpolate_forwardiiiiiPKiS0_PKfS2_Pf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R0, c[0x0][0x380] &wr=0x1 ?trans2;
ISETP.LE.AND P0, PT, R0, UR4, PT &req={1} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x398] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x38c] &wr=0x2 ?trans1;
LDCU UR6, c[0x0][0x384] &wr=0x2 ?trans5;
LDC.64 R4, c[0x0][0x3b0] &wr=0x3 ?trans1;
LDCU UR7, c[0x0][0x360] &wr=0x4 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x0 ?trans2;
IADD.64 R2, R2, 0x8 &req={0} ?WAIT2_END_GROUP;
UIMAD UR5, UR5, UR6, URZ &req={2} ?trans1;
IADD.64 R4, R4, 0x8 &req={4,3,1} ?WAIT11_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT ?trans1;
BSSY.RECONVERGENT B0, 0x990 ?WAIT12_END_GROUP;
@P0 BRA 0x980 &req={5} ?trans5;
LDC R17, c[0x0][0x384] &wr=0x0 ?trans1;
MOV R16, R0 ?trans1;
IMAD R17, R17, UR4, RZ &req={0} ?WAIT7_END_GROUP;
LDC R19, c[0x0][0x38c] &req={0} &wr=0x0 ?trans1;
IABS R11, R16 ?trans2;
IABS R10, R19 &req={0} ?WAIT4_END_GROUP;
I2F.RP R8, R10 &wr=0x0 ?trans2;
MUFU.RCP R8, R8 &req={0} &wr=0x0 ?trans2;
IADD3 R6, PT, PT, R8, 0xffffffe, RZ &req={3,2,1,0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R7, R6 &rd=0x0 &wr=0x1 ?trans2;
HFMA2 R6, -RZ, RZ, 0, 0 &req={0} ?trans1;
IADD3 R9, PT, PT, RZ, -R7, RZ &req={1} ?WAIT5_END_GROUP;
IMAD R9, R9, R10, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R7, R7, R9, R6 ?trans1;
LOP3.LUT R6, R16, R19, RZ, 0x3c, !PT ?WAIT5_END_GROUP;
IMAD.HI.U32 R9, R7, R11, RZ ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, -R9, RZ, RZ ?WAIT5_END_GROUP;
IMAD R7, R10, R7, R11 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R10, R7, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R7, PT, PT, R7, -R10.reuse, RZ ?trans2;
@!P0 IADD3 R9, PT, PT, R9, 0x1, RZ ?trans1;
ISETP.GE.AND P0, PT, R6, RZ, PT ?trans2;
ISETP.GE.U32.AND P1, PT, R7, R10, PT ?trans2;
LDC.64 R6, c[0x0][0x3a0] &wr=0x0 ?trans11;
@P1 IADD3 R9, PT, PT, R9, 0x1, RZ ?trans1;
ISETP.NE.AND P1, PT, R19, RZ, PT ?WAIT3_END_GROUP;
@!P0 IADD3 R9, PT, PT, -R9, RZ, RZ ?WAIT10_END_GROUP;
@!P1 LOP3.LUT R9, RZ, R19, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R11, PT, PT, R17, R9, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R6, R11, 0x4, R6 &req={0} ?WAIT5_END_GROUP;
LDG.E R24, desc[UR8][R6.64] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B1, 0x950 ?trans1;
IADD3 R20, PT, PT, -R9, RZ, RZ ?trans1;
ISETP.GE.AND P0, PT, R24, 0x1, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x940 &req={5} ?trans5;
LDC.64 R6, c[0x0][0x3b8] &wr=0x0 ?trans1;
IMAD R9, R17, R19, R16 ?trans1;
LDCU UR6, c[0x0][0x390] &wr=0x1 ?trans3;
IMAD.WIDE R6, R9, 0x4, R6 &req={0} ?WAIT5_END_GROUP;
LDG.E R21, desc[UR8][R6.64] &rd=0x0 &wr=0x5 ?trans1;
ISETP.GE.U32.AND P1, PT, R24.reuse, 0x4, PT ?trans1;
LOP3.LUT R18, R24, 0x3, RZ, 0xc0, !PT ?trans1;
IMAD R22, R11, UR6, RZ &req={1} ?trans1;
BSSY.RECONVERGENT B2, 0x700 ?trans1;
IMAD R20, R19, R20, R16 ?trans1;
MOV R23, RZ ?trans1;
ISETP.NE.AND P0, PT, R18, RZ, PT ?WAIT7_END_GROUP;
@!P1 BRA 0x6f0 &req={0} ?trans6;
LOP3.LUT R24, R24, 0x7ffffffc, RZ, 0xc0, !PT ?trans1;
MOV R23, RZ ?trans1;
MOV R25, R22 ?trans2;
IADD3 R24, PT, PT, -R24, RZ, RZ ?WAIT7_END_GROUP;
IMAD.WIDE R10, R25, 0x4, R2 ?trans1;
LDC R28, c[0x0][0x388] &wr=0x0 ?trans4;
LDG.E R9, desc[UR8][R10.64+-0x8] &wr=0x0 ?trans4;
LDC.64 R12, c[0x0][0x3a8] &req={1} &wr=0x1 ?trans1;
IMAD R9, R28, UR4, R9 &req={0} ?WAIT4_END_GROUP;
IMAD R15, R9, R19, R20 ?trans2;
IMAD.WIDE R8, R25, 0x4, R4 ?WAIT4_END_GROUP;
IMAD.WIDE R14, R15, 0x4, R12 &req={1} ?trans1;
LDG.E R26, desc[UR8][R8.64+-0x8] &wr=0x2 ?trans5;
LDG.E R14, desc[UR8][R14.64] &wr=0x2 ?trans2;
FFMA R21, R26, R14, R21 &req={5,2} ?WAIT5_END_GROUP;
STG.E desc[UR8][R6.64], R21 &rd=0x0 ?trans4;
LDG.E R27, desc[UR8][R10.64+-0x4] &wr=0x2 ?trans4;
LDG.E R30, desc[UR8][R8.64+-0x4] &wr=0x3 ?trans1;
IMAD R27, R28, UR4, R27 &req={2} ?WAIT4_END_GROUP;
IMAD R27, R27, R19, R20 ?WAIT4_END_GROUP;
IMAD.WIDE R26, R27, 0x4, R12 ?WAIT6_END_GROUP;
LDG.E R26, desc[UR8][R26.64] &wr=0x3 ?trans2;
FFMA R29, R30, R26, R21 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR8][R6.64], R29 &rd=0x1 ?trans4;
LDG.E R15, desc[UR8][R10.64] &wr=0x2 ?trans4;
LDG.E R30, desc[UR8][R8.64] &wr=0x3 ?trans1;
IMAD R15, R28, UR4, R15 &req={2} ?WAIT4_END_GROUP;
IMAD R15, R15, R19, R20 ?WAIT4_END_GROUP;
IMAD.WIDE R14, R15, 0x4, R12 ?WAIT6_END_GROUP;
LDG.E R14, desc[UR8][R14.64] &wr=0x3 ?trans2;
FFMA R31, R30, R14, R29 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR8][R6.64], R31 &rd=0x1 ?trans4;
LDG.E R21, desc[UR8][R10.64+0x4] &req={0} &wr=0x2 ?trans4;
LDG.E R26, desc[UR8][R8.64+0x4] &wr=0x3 ?trans1;
IMAD R21, R28, UR4, R21 &req={2} ?WAIT4_END_GROUP;
IMAD R21, R21, R19, R20 ?WAIT4_END_GROUP;
IMAD.WIDE R12, R21, 0x4, R12 ?WAIT6_END_GROUP;
LDG.E R12, desc[UR8][R12.64] &wr=0x3 ?trans1;
IADD3 R24, PT, PT, R24, 0x4, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R24, RZ, PT ?trans1;
IADD3 R23, PT, PT, R23, 0x4, RZ ?trans2;
IADD3 R25, PT, PT, R25, 0x4, RZ ?trans1;
FFMA R21, R26, R12, R31 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR8][R6.64], R21 &rd=0x1 ?trans4;
@P1 BRA 0x460 ?trans5;
BSYNC.RECONVERGENT B2 ?trans5;
@!P0 BRA 0x940 ?trans5;
LDC.64 R10, c[0x0][0x398] &wr=0x0 ?trans1;
IADD3 R23, PT, PT, R22, R23, RZ ?WAIT7_END_GROUP;
LDC R14, c[0x0][0x388] &wr=0x2 ?trans8;
LDC.64 R12, c[0x0][0x3b0] &wr=0x3 ?trans1;
IMAD.WIDE R10, R23, 0x4, R10 &req={0} ?WAIT7_END_GROUP;
LDC.64 R8, c[0x0][0x3a8] &wr=0x0 ?trans1;
LDG.E R15, desc[UR8][R10.64] &wr=0x2 ?trans1;
IMAD.WIDE R12, R23, 0x4, R12 &req={3} ?WAIT5_END_GROUP;
LDG.E R24, desc[UR8][R12.64] &wr=0x3 ?trans1;
IMAD R15, R14, UR4, R15 &req={2} ?WAIT4_END_GROUP;
IMAD R15, R15, R19, R20 ?WAIT4_END_GROUP;
IMAD.WIDE R22, R15, 0x4, R8 &req={0} ?WAIT6_END_GROUP;
LDG.E R22, desc[UR8][R22.64] &wr=0x3 ?trans1;
ISETP.NE.AND P0, PT, R18, 0x1, PT ?trans1;
FFMA R24, R24, R22, R21 &req={5,3} ?WAIT5_END_GROUP;
STG.E desc[UR8][R6.64], R24 &rd=0x0 ?trans7;
@!P0 BRA 0x940 ?trans5;
LDG.E R15, desc[UR8][R10.64+0x4] &wr=0x2 ?trans2;
IMAD R15, R14, UR4, R15 &req={2} ?WAIT4_END_GROUP;
IMAD R15, R15, R19, R20 ?WAIT4_END_GROUP;
IMAD.WIDE R22, R15, 0x4, R8 ?trans2;
LDG.E R15, desc[UR8][R12.64+0x4] &wr=0x2 ?trans4;
LDG.E R22, desc[UR8][R22.64] &wr=0x2 ?trans1;
ISETP.NE.AND P0, PT, R18, 0x2, PT ?trans1;
FFMA R15, R15, R22, R24 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR8][R6.64], R15 &rd=0x2 ?trans7;
@!P0 BRA 0x940 ?trans5;
LDG.E R11, desc[UR8][R10.64+0x8] &wr=0x3 ?trans4;
LDG.E R12, desc[UR8][R12.64+0x8] &wr=0x4 ?trans1;
IMAD R14, R14, UR4, R11 &req={3} ?WAIT4_END_GROUP;
IMAD R19, R14, R19, R20 ?WAIT4_END_GROUP;
IMAD.WIDE R8, R19, 0x4, R8 ?WAIT6_END_GROUP;
LDG.E R9, desc[UR8][R8.64] &wr=0x4 ?trans2;
FFMA R15, R12, R9, R15 &req={4,2} ?WAIT5_END_GROUP;
STG.E desc[UR8][R6.64], R15 &rd=0x3 ?trans2;
BSYNC.RECONVERGENT B1 ?trans5;
IADD3 R16, PT, PT, R16, UR7, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R16, UR5, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x150 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU UR6, c[0x0][0x370] &wr=0x4 ?trans1;
LDC R6, c[0x0][0x380] &req={3,2,1,0} &wr=0x0 ?trans1;
UIADD3 UR4, UPT, UPT, UR6, UR4, URZ &req={4} ?WAIT6_END_GROUP;
ISETP.LE.AND P0, PT, R6, UR4, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0xf0 ?trans5;
EXIT ?trans5;
BRA 0x9f0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: weighted_interpolate_forward(int, int, int, int, int, int const*, int const*, float const*, float const*, float*)
_Z28weighted_interpolate_forwardiiiiiPKiS0_PKfS2_Pf:
s_load_b128 s[16:19], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_cmp_ge_i32 s15, s16
s_cbranch_scc1 .LBB2_9
s_add_u32 s2, s0, 64
s_addc_u32 s3, s1, 0
s_ashr_i32 s14, s19, 31
s_clause 0x1
s_load_b64 s[12:13], s[0:1], 0x38
s_load_b32 s22, s[0:1], 0x40
s_add_i32 s4, s19, s14
s_load_b32 s21, s[0:1], 0x10
s_xor_b32 s20, s4, s14
s_mul_i32 s23, s19, s17
v_cvt_f32_u32_e32 v1, s20
s_sub_i32 s4, 0, s20
v_cmp_gt_i32_e32 vcc_lo, s23, v0
s_mul_i32 s24, s15, s17
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v1, v1
s_waitcnt lgkmcnt(0)
s_mul_i32 s25, s22, s17
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v1, 0x4f7ffffe, v1
v_cvt_u32_f32_e32 v1, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mul_lo_u32 v2, s4, v1
s_load_b256 s[4:11], s[0:1], 0x18
v_mul_hi_u32 v2, v1, v2
s_delay_alu instid0(VALU_DEP_1)
v_add_nc_u32_e32 v8, v1, v2
.LBB2_2:
s_and_saveexec_b32 s26, vcc_lo
s_cbranch_execz .LBB2_8
s_load_b32 s0, s[2:3], 0xc
v_mov_b32_e32 v9, v0
s_mul_i32 s27, s15, s17
s_mul_i32 s28, s15, s18
s_mul_i32 s29, s27, s19
s_mov_b32 s31, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s30, s0, 0xffff
.LBB2_4:
v_ashrrev_i32_e32 v1, 31, v9
s_mov_b32 s33, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v2, v9, v1
v_xor_b32_e32 v2, v2, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v3, v2, v8
v_mul_lo_u32 v4, v3, s20
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v2, v2, v4
v_add_nc_u32_e32 v4, 1, v3
v_subrev_nc_u32_e32 v5, s20, v2
v_cmp_le_u32_e64 s0, s20, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cndmask_b32_e64 v4, v3, v4, s0
v_cndmask_b32_e64 v2, v2, v5, s0
v_xor_b32_e32 v3, s14, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v5, 1, v4
v_cmp_le_u32_e64 s0, s20, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v1, v4, v5, s0
v_xor_b32_e32 v5, v1, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v4, v5, v3
v_add_nc_u32_e32 v1, s27, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v1, s0, s6, v1
v_add_co_ci_u32_e64 v2, s0, s7, v2, s0
global_load_b32 v10, v[1:2], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e32 0, v10
s_cbranch_execz .LBB2_7
v_add_nc_u32_e32 v1, s29, v9
v_add_nc_u32_e32 v5, s24, v5
s_mov_b32 s34, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v2, 31, v1
v_sub_nc_u32_e32 v3, v5, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[1:2], 2, v[1:2]
v_mul_lo_u32 v5, s21, v3
v_mul_lo_u32 v3, v4, s19
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v1, s0, s12, v1
v_add_co_ci_u32_e64 v2, s0, s13, v2, s0
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_ashrrev_i32_e32 v6, 31, v5
v_sub_nc_u32_e32 v3, v9, v3
global_load_b32 v11, v[1:2], off
v_lshlrev_b64 v[6:7], 2, v[5:6]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v4, s0, s4, v6
v_add_co_ci_u32_e64 v5, s0, s5, v7, s0
v_add_co_u32 v6, s0, s10, v6
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v7, s0, s11, v7, s0
.LBB2_6:
global_load_b32 v12, v[4:5], off
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v14, s28, v12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[12:13], null, v14, s19, v[3:4]
v_ashrrev_i32_e32 v13, 31, v12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[12:13], 2, v[12:13]
v_add_co_u32 v12, s0, s8, v12
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v13, s0, s9, v13, s0
v_add_co_u32 v4, s0, v4, 4
global_load_b32 v14, v[6:7], off
global_load_b32 v12, v[12:13], off
v_add_nc_u32_e32 v10, -1, v10
v_add_co_ci_u32_e64 v5, s0, 0, v5, s0
v_add_co_u32 v6, s0, v6, 4
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v7, s0, 0, v7, s0
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v11, v14, v12
v_cmp_eq_u32_e64 s1, 0, v10
global_store_b32 v[1:2], v11, off
s_or_b32 s34, s1, s34
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s34
s_cbranch_execnz .LBB2_6
.LBB2_7:
s_or_b32 exec_lo, exec_lo, s33
v_add_nc_u32_e32 v9, s30, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_le_i32_e64 s0, s23, v9
s_or_b32 s31, s0, s31
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s31
s_cbranch_execnz .LBB2_4
.LBB2_8:
s_or_b32 exec_lo, exec_lo, s26
s_add_i32 s15, s22, s15
s_add_i32 s24, s24, s25
s_cmp_ge_i32 s15, s16
s_cbranch_scc0 .LBB2_2
.LBB2_9:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| weighted_interpolate_forward | 4,199 | 2,875 | stackv2-00000-of-00015 |
// Demangled: q1(int*, int*, int*)
Function : _Z2q1PiS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x390] &wr=0x1 ?trans2;
LDG.E R2, desc[UR6][R2.64] &req={1} &wr=0x2 ?trans2;
ISETP.GE.AND P0, PT, R2, 0x1, PT &req={2} ?WAIT13_END_GROUP;
@!P0 EXIT &req={0} ?trans5;
S2R R0, SR_TID.X &wr=0x0 ?trans1;
MOV R5, R2 ?trans1;
UMOV UR4, URZ ?trans1;
LOP3.LUT R6, R0.reuse, 0x3fc, RZ, 0xc0, !PT &req={0} ?trans2;
LOP3.LUT R18, R0, 0x3, RZ, 0xc0, !PT ?trans2;
IADD3 R6, PT, PT, -R6, RZ, RZ ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x380] &req={0} &wr=0x0 ?trans1;
IMAD R11, R0, R5, UR4 ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x388] &req={1} &wr=0x1 ?trans1;
IMAD.WIDE R8, R11, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R9, desc[UR6][R8.64] &req={2} &wr=0x2 ?trans1;
ISETP.NE.AND P0, PT, R0, RZ, PT ?trans1;
IMAD.WIDE R10, R11, 0x4, R4 &req={1} ?trans1;
BSSY.RECONVERGENT B0, 0x5e0 ?trans4;
STG.E desc[UR6][R10.64], R9 &req={2} &rd=0x0 ?trans7;
@!P0 BRA 0x5d0 ?trans5;
ISETP.GE.U32.AND P1, PT, R0, 0x4, PT ?trans1;
BSSY.RECONVERGENT B1, 0x400 ?trans1;
ISETP.NE.AND P0, PT, R18, RZ, PT ?WAIT11_END_GROUP;
@!P1 BRA 0x3f0 ?trans5;
LDC.64 R8, c[0x0][0x390] &req={0} &wr=0x0 ?trans1;
MOV R7, R6 ?WAIT7_END_GROUP;
LDG.E R11, desc[UR6][R8.64] &req={2,0} &wr=0x2 ?trans2;
IMAD R13, R11, R0, UR4 &req={2} ?WAIT4_END_GROUP;
IMAD.WIDE R10, R13, 0x4, R2 ?WAIT4_END_GROUP;
IMAD.WIDE R12, R13, 0x4, R4 ?trans2;
LDG.E R10, desc[UR6][R10.64] &wr=0x2 ?trans4;
LDG.E R15, desc[UR6][R12.64] &wr=0x2 ?trans2;
IMAD R19, R10, R15, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R19 &rd=0x0 ?trans4;
LDG.E R15, desc[UR6][R8.64] &wr=0x2 ?trans2;
IMAD R17, R15, R0, UR4 &req={2} ?WAIT4_END_GROUP;
IMAD.WIDE R14, R17, 0x4, R2 ?WAIT4_END_GROUP;
IMAD.WIDE R16, R17, 0x4, R4 ?trans2;
LDG.E R14, desc[UR6][R14.64] &wr=0x2 ?trans4;
LDG.E R21, desc[UR6][R16.64] &wr=0x2 ?trans2;
IMAD R21, R14, R21, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R16.64], R21 &rd=0x1 ?trans4;
LDG.E R11, desc[UR6][R8.64] &wr=0x2 ?trans2;
IMAD R23, R11, R0, UR4 &req={2} ?WAIT4_END_GROUP;
IMAD.WIDE R10, R23, 0x4, R2 ?WAIT4_END_GROUP;
IMAD.WIDE R12, R23, 0x4, R4 &req={0} ?trans2;
LDG.E R10, desc[UR6][R10.64] &wr=0x2 ?trans4;
LDG.E R19, desc[UR6][R12.64] &wr=0x2 ?trans2;
IMAD R19, R10, R19, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R19 &rd=0x2 ?trans4;
LDG.E R15, desc[UR6][R8.64] &wr=0x3 ?trans2;
IMAD R23, R15, R0, UR4 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE R14, R23, 0x4, R2 ?WAIT4_END_GROUP;
IMAD.WIDE R16, R23, 0x4, R4 &req={1} ?trans2;
LDG.E R14, desc[UR6][R14.64] &wr=0x3 ?trans4;
LDG.E R21, desc[UR6][R16.64] &wr=0x3 ?trans1;
IADD3 R7, PT, PT, R7, 0x4, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R7, RZ, PT ?trans1;
IMAD R21, R14, R21, RZ &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR6][R16.64], R21 &rd=0x2 ?trans7;
@P1 BRA 0x1c0 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
@!P0 BRA 0x5d0 ?trans5;
LDC.64 R8, c[0x0][0x390] &req={0} &wr=0x0 ?trans2;
LDG.E R7, desc[UR6][R8.64] &req={0} &wr=0x3 ?trans2;
IMAD R7, R7, R0, UR4 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE R10, R7, 0x4, R2 ?WAIT4_END_GROUP;
IMAD.WIDE R12, R7, 0x4, R4 &req={2} ?trans2;
LDG.E R10, desc[UR6][R10.64] &wr=0x2 ?trans4;
LDG.E R7, desc[UR6][R12.64] &wr=0x2 ?trans1;
ISETP.NE.AND P0, PT, R18, 0x1, PT ?trans1;
IMAD R7, R10, R7, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R7 &rd=0x1 ?trans7;
@!P0 BRA 0x5d0 ?trans5;
LDG.E R7, desc[UR6][R8.64] &req={1} &wr=0x2 ?trans2;
IMAD R7, R7, R0, UR4 &req={2} ?WAIT4_END_GROUP;
IMAD.WIDE R10, R7, 0x4, R2 ?WAIT4_END_GROUP;
IMAD.WIDE R12, R7, 0x4, R4 ?trans2;
LDG.E R10, desc[UR6][R10.64] &wr=0x2 ?trans4;
LDG.E R7, desc[UR6][R12.64] &wr=0x2 ?trans1;
ISETP.NE.AND P0, PT, R18, 0x2, PT ?trans1;
IMAD R7, R10, R7, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R7 &rd=0x3 ?trans7;
@P0 LDG.E R15, desc[UR6][R8.64] &wr=0x2 ?trans2;
@P0 IMAD R15, R15, R0, UR4 &req={2} ?WAIT4_END_GROUP;
@P0 IMAD.WIDE R2, R15, 0x4, R2 ?WAIT4_END_GROUP;
@P0 IMAD.WIDE R4, R15, 0x4, R4 ?trans2;
@P0 LDG.E R2, desc[UR6][R2.64] &wr=0x2 ?trans4;
@P0 LDG.E R15, desc[UR6][R4.64] &wr=0x2 ?trans2;
@P0 IMAD R15, R2, R15, RZ &req={2} ?WAIT5_END_GROUP;
@P0 STG.E desc[UR6][R4.64], R15 &rd=0x3 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R2, c[0x0][0x390] &wr=0x4 ?trans2;
LDG.E R5, desc[UR6][R2.64] &req={4,3} &wr=0x3 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x1, URZ ?WAIT6_END_GROUP;
ISETP.LE.AND P0, PT, R5, UR4, PT &req={3} ?WAIT13_END_GROUP;
@!P0 BRA 0xc0 ?trans5;
EXIT ?trans5;
BRA 0x640;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: q1(int*, int*, int*)
_Z2q1PiS_S_:
s_load_b64 s[2:3], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_load_b32 s8, s[2:3], 0x0
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s8, 1
s_cbranch_scc1 .LBB0_6
s_load_b128 s[4:7], s[0:1], 0x0
v_cmp_ne_u32_e64 s0, 0, v0
v_dual_mov_b32 v2, s8 :: v_dual_mov_b32 v1, 0
s_mov_b32 s8, 0
.LBB0_2:
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[3:4], null, v2, v0, s[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v4, 31, v3
v_lshlrev_b64 v[2:3], 2, v[3:4]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v4, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
v_add_co_u32 v2, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
global_load_b32 v4, v[4:5], off
s_waitcnt vmcnt(0)
global_store_b32 v[2:3], v4, off
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB0_5
v_mov_b32_e32 v2, v0
s_mov_b32 s9, 0
.LBB0_4:
global_load_b32 v5, v1, s[2:3]
v_add_nc_u32_e32 v2, -1, v2
s_waitcnt vmcnt(0)
v_mad_u64_u32 v[3:4], null, v5, v0, s[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v4, 31, v3
v_lshlrev_b64 v[3:4], 2, v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v5, vcc_lo, s4, v3
v_add_co_ci_u32_e32 v6, vcc_lo, s5, v4, vcc_lo
v_add_co_u32 v3, vcc_lo, s6, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
v_cmp_eq_u32_e32 vcc_lo, 0, v2
global_load_b32 v5, v[5:6], off
global_load_b32 v6, v[3:4], off
s_or_b32 s9, vcc_lo, s9
s_waitcnt vmcnt(0)
v_mul_lo_u32 v5, v6, v5
global_store_b32 v[3:4], v5, off
s_and_not1_b32 exec_lo, exec_lo, s9
s_cbranch_execnz .LBB0_4
.LBB0_5:
s_or_b32 exec_lo, exec_lo, s1
global_load_b32 v2, v1, s[2:3]
s_add_i32 s8, s8, 1
s_waitcnt vmcnt(0)
v_cmp_ge_i32_e32 vcc_lo, s8, v2
s_cbranch_vccz .LBB0_2
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| q1 | 2,649 | 1,072 | stackv2-00000-of-00015 |
// Demangled: gpu_matrixadd(int*, int*, int*, int)
Function : _Z13gpu_matrixaddPiS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R3, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x364] &wr=0x2 ?trans1;
S2R R2, SR_TID.Y &wr=0x2 ?trans1;
LDCU UR6, c[0x0][0x398] &wr=0x3 ?trans1;
S2R R5, SR_CTAID.Y &wr=0x2 ?trans1;
IMAD R0, R3, UR4, R0 &req={1} ?trans2;
IMAD R3, R5, UR5, R2 &req={2} ?WAIT4_END_GROUP;
IMAD R9, R3, UR6, R0 &req={3} ?trans1;
VIMNMX.S32 R2, R0, R3, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R2, UR6, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD.WIDE R2, R9, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x4 ?trans1;
IMAD.WIDE R4, R9, 0x4, R4 &req={2} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x4 ?trans1;
IMAD.WIDE R6, R9, 0x4, R6 &req={3} ?trans1;
IADD3 R9, PT, PT, R2, R5, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x1a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: gpu_matrixadd(int*, int*, int*, int)
_Z13gpu_matrixaddPiS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s4, s3, 16
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[0:1], null, s14, s3, v[2:3]
v_mad_u64_u32 v[1:2], null, s15, s4, v[3:4]
s_mov_b32 s3, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_max_i32_e32 v2, v0, v1
v_cmpx_gt_i32_e64 s2, v2
s_cbranch_execz .LBB0_2
s_load_b128 s[4:7], s[0:1], 0x0
v_mad_u64_u32 v[2:3], null, v1, s2, v[0:1]
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[0:1], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| gpu_matrixadd | 711 | 751 | stackv2-00000-of-00015 |
// Demangled: MatAdd(int (*) [22], int (*) [22], int (*) [22])
Function : _Z6MatAddPA22_iS0_S0_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R9, SR_TID.X &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
S2R R11, SR_TID.Y &wr=0x2 ?trans6;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x4 ?trans1;
IMAD.WIDE.U32 R2, R9, 0x58, R2 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R9, 0x58, R4 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R11, 0x4, R2 &req={2} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R11, 0x4, R4 ?trans2;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans4;
LDG.E R5, desc[UR4][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R6, R9, 0x58, R6 &req={4} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R6, R11, 0x4, R6 ?trans1;
IADD3 R9, PT, PT, R2, R5, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x120;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: MatAdd(int (*) [22], int (*) [22], int (*) [22])
_Z6MatAddPA22_iS0_S0_:
s_load_b128 s[4:7], s[0:1], 0x0
v_and_b32_e32 v1, 0x3ff, v0
v_lshrrev_b32_e32 v0, 8, v0
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_mul_u32_u24_e32 v4, 0x58, v1
v_mul_hi_u32_u24_e32 v5, 0x58, v1
v_and_b32_e32 v6, 0xffc, v0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v0, vcc_lo, s4, v4
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v5, vcc_lo
v_add_co_u32 v2, vcc_lo, s6, v4
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v0, vcc_lo, v0, v6
v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v2, vcc_lo, v2, v6
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
global_load_b32 v0, v[0:1], off
global_load_b32 v1, v[2:3], off
v_add_co_u32 v2, vcc_lo, s0, v4
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v5, vcc_lo
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v4, v1, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v0, vcc_lo, v2, v6
v_add_co_ci_u32_e32 v1, vcc_lo, 0, v3, vcc_lo
global_store_b32 v[0:1], v4, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| MatAdd | 548 | 715 | stackv2-00000-of-00015 |
// Demangled: SumaColMatrizKernel(int, int, float*, float*)
Function : _Z19SumaColMatrizKerneliiPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x3 ?trans1;
BSSY.RECONVERGENT B0, 0x4f0 ?trans1;
IMAD R5, R3, R2, RZ &req={2} ?WAIT2_END_GROUP;
HFMA2 R2, -RZ, RZ, 0, 0 ?WAIT3_END_GROUP;
ISETP.GE.AND P0, PT, R0, R5, PT &req={1} ?WAIT13_END_GROUP;
@P0 BRA 0x4e0 &req={3,0} ?trans5;
I2F.U32.RP R8, R3 &wr=0x0 ?trans1;
IADD3 R2, PT, PT, R0, R3, RZ ?trans1;
ISETP.NE.U32.AND P2, PT, R3, RZ, PT ?trans1;
BSSY.RECONVERGENT B1, 0x340 ?trans3;
ISETP.GE.AND P0, PT, R2, R5, PT ?trans1;
VIMNMX.S32 R9, R5, R2, !PT ?WAIT4_END_GROUP;
SEL R4, RZ, 0x1, P0 ?trans1;
MUFU.RCP R8, R8 &req={0} &wr=0x0 ?trans4;
IADD3 R2, PT, PT, R9, -R2, -R4 ?trans2;
IADD3 R6, PT, PT, R8, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R7, R6 &rd=0x0 &wr=0x1 ?trans2;
MOV R6, RZ &req={0} ?trans1;
IADD3 R10, PT, PT, RZ, -R7, RZ &req={1} ?WAIT5_END_GROUP;
IMAD R11, R10, R3, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R7, R7, R11, R6 ?WAIT6_END_GROUP;
IMAD.HI.U32 R7, R7, R2, RZ ?WAIT5_END_GROUP;
IADD3 R6, PT, PT, -R7, RZ, RZ ?WAIT5_END_GROUP;
IMAD R2, R3, R6, R2 ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R2, R3, PT ?WAIT13_END_GROUP;
@P0 IADD3 R2, PT, PT, R2, -R3, RZ ?trans2;
@P0 IADD3 R7, PT, PT, R7, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R2, R3, PT ?WAIT13_END_GROUP;
@P1 IADD3 R7, PT, PT, R7, 0x1, RZ ?trans2;
@!P2 LOP3.LUT R7, RZ, R3, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R4, PT, PT, R4, R7, RZ ?WAIT4_END_GROUP;
IADD3 R2, PT, PT, R4.reuse, 0x1, RZ ?trans1;
ISETP.GE.U32.AND P1, PT, R4, 0x3, PT ?trans1;
MOV R4, R0 ?trans2;
LOP3.LUT P0, R6, R2, 0x3, RZ, 0xc0, !PT ?trans1;
MOV R2, RZ ?WAIT12_END_GROUP;
@!P0 BRA 0x330 ?trans5;
LDC.64 R8, c[0x0][0x388] &wr=0x0 ?trans1;
IADD3 R10, PT, PT, -R6, RZ, RZ ?trans1;
MOV R2, RZ ?trans1;
MOV R4, R0 ?WAIT7_END_GROUP;
IMAD.WIDE R6, R4, 0x4, R8 &req={0} ?WAIT6_END_GROUP;
LDG.E R7, desc[UR4][R6.64] &wr=0x2 ?trans1;
IADD3 R10, PT, PT, R10, 0x1, RZ ?trans2;
IADD3 R4, PT, PT, R4, R3, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R10, RZ, PT ?trans1;
FADD R2, R7, R2 &req={2} ?WAIT12_END_GROUP;
@P0 BRA 0x2c0 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
@!P1 BRA 0x4e0 ?trans5;
LDC.64 R6, c[0x0][0x388] &wr=0x0 ?trans1;
SHF.R.S32.HI R9, RZ, 0x1f, R3 ?trans1;
MOV R8, R3.reuse ?trans1;
IADD3 R21, PT, PT, R3, R3, RZ ?WAIT4_END_GROUP;
IADD.64 R10, R8, R8 ?WAIT4_END_GROUP;
IADD.64 R12, R8, R10 ?trans2;
IMAD.SHL.U32 R8, R10.reuse, 0x4, RZ ?trans1;
SHF.L.U64.HI R9, R10, 0x2, R11 ?trans2;
SHF.L.U64.HI R11, R12.reuse, 0x2, R13 ?trans1;
IMAD.SHL.U32 R10, R12, 0x4, RZ ?WAIT7_END_GROUP;
IMAD.WIDE R18, R4, 0x4, R6 &req={0} ?WAIT5_END_GROUP;
LDG.E R23, desc[UR4][R18.64] &wr=0x2 ?trans1;
IMAD.WIDE R12, R3, 0x4, R18 ?trans1;
IADD.64 R14, R18.reuse, R8 ?trans2;
IADD.64 R16, R18, R10 ?WAIT3_END_GROUP;
LDG.E R12, desc[UR4][R12.64] &wr=0x3 ?trans4;
LDG.E R14, desc[UR4][R14.64] &wr=0x4 ?trans4;
LDG.E R16, desc[UR4][R16.64] &wr=0x5 ?trans1;
IADD3 R4, PT, PT, R21, R4, R21 ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R4, R5, PT ?trans1;
FADD R23, R23, R2 &req={2} ?WAIT4_END_GROUP;
FADD R23, R23, R12 &req={3} ?WAIT4_END_GROUP;
FADD R23, R23, R14 &req={4} ?WAIT4_END_GROUP;
FADD R2, R23, R16 &req={5} ?trans1;
@!P0 BRA 0x3f0 ?trans6;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans2;
IMAD.WIDE.U32 R4, R0, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R2 ?trans1;
EXIT ?trans5;
BRA 0x530;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: SumaColMatrizKernel(int, int, float*, float*)
_Z19SumaColMatrizKerneliiPfS_:
s_clause 0x1
s_load_b64 s[4:5], s[0:1], 0x0
s_load_b128 s[0:3], s[0:1], 0x8
v_dual_mov_b32 v4, 0 :: v_dual_lshlrev_b32 v3, 2, v0
s_mov_b32 s8, exec_lo
s_waitcnt lgkmcnt(0)
s_mul_i32 s4, s5, s4
s_delay_alu instid0(SALU_CYCLE_1)
v_cmpx_gt_i32_e64 s4, v0
s_cbranch_execz .LBB0_4
v_add_co_u32 v1, s0, s0, v3
v_mov_b32_e32 v4, 0
v_add_co_ci_u32_e64 v2, null, s1, 0, s0
s_ashr_i32 s1, s5, 31
s_mov_b32 s0, s5
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[6:7], s[0:1], 2
s_mov_b32 s1, 0
.LBB0_2:
global_load_b32 v5, v[1:2], off
v_add_nc_u32_e32 v0, s5, v0
v_add_co_u32 v1, vcc_lo, v1, s6
v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_le_i32_e64 s0, s4, v0
s_or_b32 s1, s0, s1
s_waitcnt vmcnt(0)
v_add_f32_e32 v4, v4, v5
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execnz .LBB0_2
s_or_b32 exec_lo, exec_lo, s1
.LBB0_4:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s8
global_store_b32 v3, v4, s[2:3]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| SumaColMatrizKernel | 2,027 | 599 | stackv2-00000-of-00015 |
// Demangled: g_exp(float*, float*, int)
Function : _Z5g_expPfS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R7, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x2 ?trans1;
IMAD R7, R7, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE R2, R7, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
HFMA2 R5, -RZ, RZ, 0.96630859375, -0.0022525787353515625 ?trans1;
MOV R9, 0x437c0000 ?WAIT4_END_GROUP;
FFMA.SAT R0, R2, R5, 0.5 &req={2} ?WAIT4_END_GROUP;
FFMA.RM R0, R0, R9, 12582913 ?WAIT4_END_GROUP;
FADD R5, R0.reuse, -12583039 ?trans1;
SHF.L.U32 R0, R0, 0x17, RZ ?WAIT3_END_GROUP;
FFMA R9, R2.reuse, 1.4426950216293334961, -R5 ?trans2;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans2;
FFMA R9, R2, 1.925963033500011079e-08, R9 ?WAIT6_END_GROUP;
MUFU.EX2 R9, R9 &wr=0x1 ?trans1;
IMAD.WIDE R2, R7, 0x4, R4 &req={0} ?WAIT4_END_GROUP;
FMUL R5, R0, R9 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R5 ?trans1;
EXIT ?trans5;
BRA 0x1a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: g_exp(float*, float*, int)
_Z5g_expPfS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[0:3], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_mul_f32_e32 v3, 0x3fb8aa3b, v2
v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v2
v_fma_f32 v4, 0x3fb8aa3b, v2, -v3
v_rndne_f32_e32 v5, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_fmamk_f32 v4, v2, 0x32a5705f, v4 :: v_dual_sub_f32 v3, v3, v5
v_add_f32_e32 v3, v3, v4
v_cvt_i32_f32_e32 v4, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_exp_f32_e32 v3, v3
s_waitcnt_depctr 0xfff
v_ldexp_f32 v3, v3, v4
v_cndmask_b32_e32 v3, 0, v3, vcc_lo
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v2
s_delay_alu instid0(VALU_DEP_4)
v_cndmask_b32_e32 v2, 0x7f800000, v3, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| g_exp | 768 | 869 | stackv2-00000-of-00015 |
// Demangled: g_exp_sum(float*, float*, float*, int, int, int)
Function : _Z9g_exp_sumPfS_S_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_CTAID.X &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x398] &wr=0x2 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R5, SR_TID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x3a0] &wr=0x3 ?trans1;
IMAD R3, R3, R2, RZ &req={2} ?WAIT2_END_GROUP;
IMAD R0, R0, UR4, R5 &req={1} ?trans2;
IMAD R5, R3, UR5, RZ &req={3} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, R5, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R6, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IABS R13, R3 ?trans2;
IABS R5, R2 ?trans1;
LDCU.64 UR6, c[0x0][0x390] &wr=0x2 ?trans1;
IMAD.WIDE R6, R0, 0x4, R6 &req={0} ?WAIT5_END_GROUP;
LDG.E R4, desc[UR4][R6.64] &req={1} &rd=0x0 &wr=0x3 ?trans1;
I2F.RP R10, R13 &wr=0x1 ?trans1;
IABS R14, R0 ?trans1;
ISETP.NE.AND P3, PT, R3, RZ, PT ?trans1;
I2F.RP R11, R5 &wr=0x4 ?trans1;
MUFU.RCP R10, R10 &req={1} &wr=0x1 ?trans1;
MUFU.RCP R11, R11 &req={4} &wr=0x0 ?trans1;
IADD3 R8, PT, PT, R10, 0xffffffe, RZ &req={1} ?trans2;
IABS R10, R3 ?trans2;
F2I.FTZ.U32.TRUNC.NTZ R9, R8 &rd=0x1 &wr=0x4 ?trans2;
IADD3 R10, PT, PT, RZ, -R10, RZ ?WAIT2_END_GROUP;
IADD3 R6, PT, PT, R11, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R7, R6 &rd=0x0 &wr=0x5 ?trans1;
HFMA2 R8, -RZ, RZ, 0, 0 &req={1} ?trans1;
IADD3 R12, PT, PT, RZ, -R9, RZ &req={4} ?trans1;
MOV R6, RZ &req={0} ?WAIT4_END_GROUP;
IMAD R15, R12, R13, RZ ?trans1;
IADD3 R16, PT, PT, RZ, -R7, RZ &req={5} ?WAIT3_END_GROUP;
IMAD.HI.U32 R8, R9, R15, R8 ?trans1;
MOV R9, R14 ?WAIT3_END_GROUP;
IMAD R11, R16, R5, RZ ?trans2;
IMAD.HI.U32 R8, R8, R9, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R6, R7, R11, R6 ?WAIT6_END_GROUP;
IMAD.HI.U32 R7, R6, R9, RZ ?WAIT4_END_GROUP;
IMAD R6, R8, R10, R9 ?trans1;
IADD3 R10, PT, PT, -R7, RZ, RZ ?trans1;
HFMA2 R7, -RZ, RZ, 0.96630859375, -0.0022525787353515625 ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P1, PT, R13, R6, PT ?trans1;
IMAD R10, R5, R10, R9 ?trans1;
MOV R9, 0x437c0000 ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P0, PT, R5, R10, PT ?WAIT7_END_GROUP;
@!P1 IADD3 R6, PT, PT, R6, -R13, RZ ?trans2;
@!P1 IADD3 R8, PT, PT, R8, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P2, PT, R6, R13, PT ?trans1;
@!P0 IADD3 R10, PT, PT, R10, -R5, RZ ?trans2;
LOP3.LUT R6, R0, R3, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R5, R10, PT ?trans2;
ISETP.GE.AND P1, PT, R6, RZ, PT ?WAIT5_END_GROUP;
@P2 IADD3 R8, PT, PT, R8, 0x1, RZ ?trans1;
ISETP.GE.AND P2, PT, R0, RZ, PT ?WAIT5_END_GROUP;
@!P0 IADD3 R10, PT, PT, R10, -R5, RZ ?trans1;
ISETP.NE.AND P0, PT, R2, RZ, PT ?WAIT4_END_GROUP;
MOV R11, R10 ?WAIT5_END_GROUP;
@!P2 IADD3 R11, PT, PT, -R11, RZ, RZ ?WAIT4_END_GROUP;
@!P0 LOP3.LUT R11, RZ, R2, RZ, 0x33, !PT ?trans1;
FFMA.SAT R6, R4, R7, 0.5 &req={3} ?trans1;
MOV R7, R8 ?WAIT3_END_GROUP;
FFMA.RM R6, R6, R9, 12582913 ?trans2;
LDC.64 R8, c[0x0][0x388] &wr=0x0 ?trans1;
@!P1 IADD3 R7, PT, PT, -R7, RZ, RZ ?trans1;
FADD R5, R6, -12583039 ?trans1;
@!P3 LOP3.LUT R7, RZ, R3, RZ, 0x33, !PT ?trans2;
SHF.R.S32.HI R3, RZ, 0x1f, R11 ?trans1;
FFMA R5, R4, 1.4426950216293334961, -R5 ?WAIT4_END_GROUP;
FFMA R10, R4, 1.925963033500011079e-08, R5 ?trans1;
IMAD R4, R7, R2, RZ ?trans1;
MOV R2, R11 ?trans1;
IMAD.SHL.U32 R7, R6, 0x800000, RZ ?WAIT3_END_GROUP;
MUFU.EX2 R10, R10 &wr=0x1 ?trans1;
SHF.R.S32.HI R5, RZ, 0x1f, R4 ?WAIT5_END_GROUP;
IADD.64 R4, R4, R2 ?trans2;
IMAD.WIDE R2, R0, 0x4, R8 &req={0} ?WAIT3_END_GROUP;
LEA R6, P0, R4, UR6, 0x2 &req={2} ?trans1;
FMUL R9, R7, R10 &req={1} ?WAIT3_END_GROUP;
LEA.HI.X R7, R4, UR7, R5, 0x2, P0 ?trans2;
STG.E desc[UR4][R2.64], R9 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x550;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: g_exp_sum(float*, float*, float*, int, int, int)
_Z9g_exp_sumPfS_S_iii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x34
s_load_b128 s[4:7], s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mul_i32 s2, s5, s4
s_mul_i32 s3, s2, s6
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_i32_e32 vcc_lo, s3, v1
s_and_saveexec_b32 s3, vcc_lo
s_cbranch_execz .LBB1_3
s_load_b128 s[8:11], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_ashr_i32 s3, s2, 31
s_ashr_i32 s5, s4, 31
s_add_i32 s2, s2, s3
s_add_i32 s6, s4, s5
v_lshlrev_b64 v[3:4], 2, v[1:2]
s_xor_b32 s2, s2, s3
s_xor_b32 s5, s6, s5
v_cvt_f32_u32_e32 v0, s2
s_sub_i32 s6, 0, s2
v_add_nc_u32_e32 v1, v1, v2
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v0, v0
v_xor_b32_e32 v1, v1, v2
s_waitcnt lgkmcnt(0)
v_add_co_u32 v5, vcc_lo, s8, v3
v_add_co_ci_u32_e32 v6, vcc_lo, s9, v4, vcc_lo
global_load_b32 v7, v[5:6], off
v_cvt_f32_u32_e32 v5, s5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v5, v5
s_waitcnt_depctr 0xfff
v_dual_mul_f32 v0, 0x4f7ffffe, v0 :: v_dual_mul_f32 v5, 0x4f7ffffe, v5
v_cvt_u32_f32_e32 v0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_u32_f32_e32 v5, v5
v_mul_lo_u32 v6, s6, v0
s_sub_i32 s6, 0, s5
s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
v_mul_lo_u32 v8, s6, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v6, v0, v6
v_add_nc_u32_e32 v0, v0, v6
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_hi_u32 v6, v5, v8
v_mul_hi_u32 v0, v1, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v5, v5, v6
v_mul_lo_u32 v6, v0, s2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v1, v6
v_subrev_nc_u32_e32 v9, s2, v6
v_cmp_le_u32_e32 vcc_lo, s2, v6
s_waitcnt vmcnt(0)
v_mul_f32_e32 v10, 0x3fb8aa3b, v7
v_mul_hi_u32 v5, v1, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v5, v5, s5
v_sub_nc_u32_e32 v1, v1, v5
v_cndmask_b32_e32 v5, v6, v9, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_subrev_nc_u32_e32 v9, s5, v1
v_add_nc_u32_e32 v8, 1, v0
v_cndmask_b32_e32 v0, v0, v8, vcc_lo
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_cmp_le_u32_e32 vcc_lo, s2, v5
v_fma_f32 v5, 0x3fb8aa3b, v7, -v10
v_xor_b32_e32 v8, s3, v2
v_dual_fmamk_f32 v5, v7, 0x32a5705f, v5 :: v_dual_add_nc_u32 v6, 1, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v0, v0, v6, vcc_lo
v_cmp_le_u32_e32 vcc_lo, s5, v1
v_rndne_f32_e32 v6, v10
v_dual_cndmask_b32 v1, v1, v9 :: v_dual_sub_f32 v10, v10, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_subrev_nc_u32_e32 v9, s5, v1
v_cmp_le_u32_e32 vcc_lo, s5, v1
v_add_f32_e32 v5, v10, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v1, v1, v9, vcc_lo
v_xor_b32_e32 v0, v0, v8
v_xor_b32_e32 v1, v1, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v0, v0, v8
v_exp_f32_e32 v8, v5
v_sub_nc_u32_e32 v5, v1, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_mul_lo_u32 v0, v0, s4
v_cvt_i32_f32_e32 v2, v6
v_ashrrev_i32_e32 v6, 31, v5
s_waitcnt_depctr 0xfff
v_ldexp_f32 v8, v8, v2
v_add_co_u32 v2, vcc_lo, s10, v3
v_ashrrev_i32_e32 v1, 31, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s11, v4, vcc_lo
v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v7
v_lshlrev_b64 v[5:6], 2, v[5:6]
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_cndmask_b32_e32 v4, 0, v8, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v7
s_mov_b32 s0, 0
v_cndmask_b32_e32 v4, 0x7f800000, v4, vcc_lo
v_add_co_u32 v0, vcc_lo, v0, v5
v_add_co_ci_u32_e32 v1, vcc_lo, v1, v6, vcc_lo
global_store_b32 v[2:3], v4, off
global_load_b32 v3, v[0:1], off
.LBB1_2:
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v3, v4
global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off glc
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, v2, v3
v_mov_b32_e32 v3, v2
s_or_b32 s0, vcc_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s0
s_cbranch_execnz .LBB1_2
.LBB1_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| g_exp_sum | 2,201 | 2,644 | stackv2-00000-of-00015 |
// Demangled: g_gelu(float*, float*, int)
Function : _Z6g_geluPfS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x2 ?trans1;
IMAD R5, R5, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R4, desc[UR4][R2.64] &req={1} &rd=0x0 &wr=0x2 ?trans1;
MOV R10, 0x3c80f082 ?trans1;
HFMA2 R11, -RZ, RZ, 1.875, 0 ?trans1;
LDC.64 R2, c[0x0][0x388] &req={0} &wr=0x0 ?trans2;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT4_END_GROUP;
FMUL R7, R4, R4 &req={2} ?WAIT4_END_GROUP;
FMUL R7, R4, R7 ?WAIT4_END_GROUP;
FFMA R7, R7, 0.044714998453855514526, R4 ?WAIT4_END_GROUP;
FMUL R7, R7, 0.79788452386856079102 ?WAIT4_END_GROUP;
FMUL R0, |R7|.reuse, 2.8853900432586669922 ?trans1;
FMUL R9, R7.reuse, R7 ?trans1;
FSETP.GE.AND P1, PT, |R7|.reuse, 0.60000002384185791016, PT ?trans1;
FSETP.GE.AND P0, PT, |R7|, 9.010913848876953125, PT ?trans2;
FFMA R10, R9.reuse, R10, -0.052303962409496307373 ?trans1;
MUFU.EX2 R0, R0 &wr=0x0 ?trans2;
FADD R6, R0, 1 &req={0} ?trans1;
FFMA R0, R9, R10, 0.1331529766321182251 ?WAIT4_END_GROUP;
FFMA R0, R9.reuse, R0, -0.33332768082618713379 ?trans1;
MUFU.RCP R6, R6 &wr=0x0 ?trans3;
FFMA R0, R9, R0, RZ ?trans1;
FFMA R8, R6, -2, R11 &req={0} ?WAIT5_END_GROUP;
FSEL R8, R8, 1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R8, R8, 0x80000000, R7.reuse, 0xf8, !PT ?trans1;
@!P1 FFMA R8, R7, R0, R7 ?WAIT4_END_GROUP;
FADD R8, R8, 1 ?WAIT4_END_GROUP;
FMUL R7, R8, 0.5 ?WAIT4_END_GROUP;
FMUL R7, R4, R7 ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R7 ?trans1;
EXIT ?trans5;
BRA 0x280;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: g_gelu(float*, float*, int)
_Z6g_geluPfS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB10_6
s_load_b128 s[0:3], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_mul_f32_e32 v3, v2, v2
v_mul_f32_e32 v3, v2, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmamk_f32 v3, v3, 0x3d372713, v2
v_mul_f32_e32 v3, 0x3f4c4229, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_ngt_f32_e64 s0, 0x3f200000, |v3|
s_and_saveexec_b32 s1, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_xor_b32 s0, exec_lo, s1
s_cbranch_execz .LBB10_3
v_add_f32_e64 v4, |v3|, |v3|
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_f32_e32 v5, 0x3fb8aa3b, v4
v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v4
v_rndne_f32_e32 v6, v5
v_fma_f32 v7, 0x3fb8aa3b, v4, -v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_f32_e32 v5, v5, v6
v_fmamk_f32 v7, v4, 0x32a5705f, v7
v_cvt_i32_f32_e32 v6, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v5, v5, v7
v_exp_f32_e32 v5, v5
s_waitcnt_depctr 0xfff
v_ldexp_f32 v5, v5, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v5, 0, v5, vcc_lo
v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v4
v_cndmask_b32_e32 v4, 0x7f800000, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v4, 1.0, v4
v_rcp_f32_e32 v4, v4
s_waitcnt_depctr 0xfff
v_fma_f32 v4, v4, -2.0, 1.0
.LBB10_3:
s_and_not1_saveexec_b32 s0, s0
v_mul_f32_e32 v4, v3, v3
s_mov_b32 s1, 0xbbbac73d
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_fmaak_f32 v5, s1, v4, 0x3ca908c9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmaak_f32 v5, v4, v5, 0xbd5c1c4e
v_fmaak_f32 v5, v4, v5, 0x3e088382
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmaak_f32 v5, v4, v5, 0xbeaaaa99
v_mul_f32_e64 v5, |v3|, v5
s_delay_alu instid0(VALU_DEP_1)
v_fma_f32 v4, v4, v5, |v3|
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_bfi_b32 v3, 0x7fffffff, v4, v3
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
v_add_f32_e32 v3, 1.0, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v3, 0.5, v3
v_mul_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
.LBB10_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| g_gelu | 1,143 | 1,744 | stackv2-00000-of-00015 |
// Demangled: g_layer_mean(float*, float*, int, int)
Function : _Z12g_layer_meanPfS_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R9, SR_CTAID.X &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x390] &wr=0x2 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans2;
IMAD R9, R9, UR4, R0 &req={1} ?WAIT2_END_GROUP;
IMAD R0, R3, R2, RZ &req={2} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R9, R0, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE R4, R9, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R4.64] &req={1} &rd=0x0 &wr=0x2 ?trans1;
IABS R10, R2 ?trans1;
BSSY.RECONVERGENT B0, 0x310 ?trans1;
I2FP.F32.S32 R3, R3 ?trans2;
I2F.RP R8, R10 &wr=0x1 ?trans1;
ISETP.GE.AND P1, PT, R9, RZ, PT ?trans1;
IABS R4, R9 &req={0} ?trans1;
MUFU.RCP R8, R8 &req={1} &wr=0x0 ?trans2;
IADD3 R6, PT, PT, R8, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R7, R6 &rd=0x0 &wr=0x1 ?trans2;
HFMA2 R6, -RZ, RZ, 0, 0 &req={0} ?trans1;
IADD3 R11, PT, PT, RZ, -R7, RZ &req={1} ?WAIT5_END_GROUP;
IMAD R11, R11, R10, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R7, R7, R11, R6 ?trans2;
MUFU.RCP R6, R3 &wr=0x0 ?trans4;
IMAD.HI.U32 R7, R7, R4, RZ ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, -R7, RZ, RZ ?WAIT5_END_GROUP;
IMAD R7, R10.reuse, R7, R4 ?trans2;
LDC.64 R4, c[0x0][0x388] &wr=0x1 ?trans1;
FFMA R9, -R3, R6, 1 &req={0} ?trans2;
ISETP.GT.U32.AND P0, PT, R10, R7, PT ?trans2;
FFMA R9, R6, R9, R6 ?WAIT11_END_GROUP;
@!P0 IADD3 R7, PT, PT, R7, -R10, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R10, R7, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R7, PT, PT, R7, -R10, RZ ?trans1;
ISETP.NE.AND P0, PT, R2, RZ, PT ?WAIT3_END_GROUP;
@!P1 IADD3 R7, PT, PT, -R7, RZ, RZ ?WAIT10_END_GROUP;
@!P0 LOP3.LUT R7, RZ, R2, RZ, 0x33, !PT ?WAIT5_END_GROUP;
IMAD.WIDE R4, R7, 0x4, R4 &req={1} ?trans1;
FCHK P1, R0, R3 &req={2} &wr=0x0 ?trans3;
FFMA R6, R0, R9, RZ ?WAIT4_END_GROUP;
FFMA R2, -R3, R6, R0 ?WAIT4_END_GROUP;
FFMA R9, R9, R2, R6 ?trans1;
@!P1 BRA 0x300 &req={0} ?trans6;
MOV R2, 0x300 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x330 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR4][R4.64], R9 ?trans1;
EXIT ?trans5;
SHF.R.U32.HI R7, RZ, 0x17, R3 ?trans1;
BSSY.RECONVERGENT B1, 0x990 ?trans1;
SHF.R.U32.HI R6, RZ, 0x17, R0 ?trans2;
LOP3.LUT R7, R7, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R6, R6, 0xff, RZ, 0xc0, !PT ?trans1;
MOV R8, R0 ?trans1;
IADD3 R12, PT, PT, R7, -0x1, RZ ?trans1;
MOV R9, R3 ?trans1;
IADD3 R11, PT, PT, R6, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R12, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R11, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R10, RZ ?trans1;
@!P0 BRA 0x570 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0x970 ?trans5;
LOP3.LUT P0, RZ, R9, 0x7fffffff, R8, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x950 ?trans5;
FSETP.NEU.FTZ.AND P2, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P1 BRA !P2, 0x950 ?trans5;
LOP3.LUT P2, RZ, R8, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P1, P2, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0x930 ?trans5;
LOP3.LUT P1, RZ, R9, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x900 ?trans5;
ISETP.GE.AND P0, PT, R11, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R12, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R10, RZ ?trans1;
@!P0 MOV R10, 0xffffffc0 ?trans1;
@!P0 FFMA R8, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R9, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R10, PT, PT, R10, 0x40, RZ ?WAIT7_END_GROUP;
LEA R0, R7, 0xc0800000, 0x17 ?trans1;
BSSY.RECONVERGENT B2, 0x8f0 ?trans1;
IADD3 R6, PT, PT, R6, -0x7f, RZ ?trans2;
IADD3 R9, PT, PT, -R0, R9, RZ ?WAIT3_END_GROUP;
IMAD R0, R6.reuse, -0x800000, R8 ?trans1;
IADD3 R7, PT, PT, R6, 0x7f, -R7 ?trans1;
MUFU.RCP R3, R9 &wr=0x0 ?trans1;
FADD.FTZ R11, -R9, -RZ ?trans2;
IADD3 R7, PT, PT, R7, R10, RZ ?trans2;
FFMA R12, R3, R11, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R12, R3, R12, R3 ?WAIT4_END_GROUP;
FFMA R3, R0, R12, RZ ?WAIT4_END_GROUP;
FFMA R8, R11, R3, R0 ?WAIT4_END_GROUP;
FFMA R13, R12, R8, R3 ?WAIT4_END_GROUP;
FFMA R8, R11, R13, R0 ?WAIT4_END_GROUP;
FFMA R3, R12, R8, R13 ?WAIT5_END_GROUP;
SHF.R.U32.HI R0, RZ, 0x17, R3 ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R10, PT, PT, R0, R7, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R10, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x8d0 ?trans5;
ISETP.GT.AND P0, PT, R10, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x8a0 ?trans5;
ISETP.GE.AND P0, PT, R10, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x8e0 ?trans5;
ISETP.GE.AND P0, PT, R10, -0x18, PT ?trans1;
LOP3.LUT R3, R3, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x8e0 ?trans5;
FFMA.RZ R0, R12, R8.reuse, R13.reuse ?trans1;
IADD3 R9, PT, PT, R10, 0x20, RZ ?trans1;
FFMA.RM R7, R12, R8, R13 ?trans1;
ISETP.NE.AND P1, PT, R10.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R10, RZ, PT ?trans1;
LOP3.LUT R0, R0, 0x7fffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R6, R0, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R0, R12, R8, R13 ?trans1;
IADD3 R8, PT, PT, -R10, RZ, RZ ?trans2;
SHF.L.U32 R9, R6, R9, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R0, R7, PT ?trans1;
SEL R7, R8, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R9, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R7, RZ, R7, R6 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R9, RZ, 0x1, R7 ?WAIT3_END_GROUP;
SEL R0, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R0, R0, 0x1, R9, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, R7, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R9, R0, RZ ?WAIT4_END_GROUP;
LOP3.LUT R3, R0, R3, RZ, 0xfc, !PT ?trans1;
BRA 0x8e0 ?trans6;
LOP3.LUT R3, R3, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x8e0 ?trans6;
IMAD R3, R7, 0x800000, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
BRA 0x980 ?trans5;
LOP3.LUT R3, R9, 0x80000000, R8, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x980 ?trans6;
LOP3.LUT R3, R9, 0x80000000, R8, 0x48, !PT ?trans1;
BRA 0x980 ?trans6;
MUFU.RSQ R3, -QNAN &wr=0x0 ?trans1;
BRA 0x980 ?trans5;
FADD.FTZ R3, R0, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R9, R3 &req={0} ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R2 0x0 ?trans5;
BRA 0x9c0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: g_layer_mean(float*, float*, int, int)
_Z12g_layer_meanPfS_ii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b64 s[2:3], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1)
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
s_mul_i32 s4, s3, s2
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_i32_e32 vcc_lo, s4, v1
s_and_saveexec_b32 s4, vcc_lo
s_cbranch_execz .LBB4_3
s_ashr_i32 s4, s2, 31
v_ashrrev_i32_e32 v2, 31, v1
s_add_i32 s2, s2, s4
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_xor_b32 s2, s2, s4
v_add_nc_u32_e32 v4, v1, v2
v_cvt_f32_u32_e32 v0, s2
s_sub_i32 s4, 0, s2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_xor_b32_e32 v4, v4, v2
v_rcp_iflag_f32_e32 v0, v0
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_u32_f32_e32 v0, v0
v_mul_lo_u32 v3, s4, v0
s_load_b128 s[4:7], s[0:1], 0x0
s_mov_b32 s0, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v3, v0, v3
v_add_nc_u32_e32 v3, v0, v3
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_hi_u32 v3, v4, v3
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
v_mul_lo_u32 v3, v3, s2
global_load_b32 v5, v[0:1], off
v_sub_nc_u32_e32 v0, v4, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v1, s2, v0
v_cmp_le_u32_e32 vcc_lo, s2, v0
v_cndmask_b32_e32 v0, v0, v1, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v1, s2, v0
v_cmp_le_u32_e32 vcc_lo, s2, v0
v_cndmask_b32_e32 v0, v0, v1, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v0, v0, v2
v_sub_nc_u32_e32 v0, v0, v2
v_cvt_f32_i32_e32 v2, s3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
global_load_b32 v3, v[0:1], off
s_waitcnt vmcnt(1)
v_div_scale_f32 v4, null, v2, v2, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f32_e32 v6, v4
s_waitcnt_depctr 0xfff
v_fma_f32 v7, -v4, v6, 1.0
v_fmac_f32_e32 v6, v7, v6
v_div_scale_f32 v7, vcc_lo, v5, v2, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v8, v7, v6
v_fma_f32 v9, -v4, v8, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v8, v9, v6
v_fma_f32 v4, -v4, v8, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fmas_f32 v4, v4, v6, v8
v_div_fixup_f32 v4, v4, v2, v5
.LBB4_2:
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_add_f32_e32 v2, v3, v4
global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off glc
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, v2, v3
v_mov_b32_e32 v3, v2
s_or_b32 s0, vcc_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s0
s_cbranch_execnz .LBB4_2
.LBB4_3:
s_endpgm
| g_layer_mean | 3,842 | 1,831 | stackv2-00000-of-00015 |
// Demangled: g_layer_minus(float*, float*, float*, int, int)
Function : _Z13g_layer_minusPfS_S_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R9, SR_CTAID.X &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x398] &wr=0x2 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans2;
IMAD R9, R9, UR4, R0 &req={1} ?WAIT2_END_GROUP;
IMAD R0, R3, R2, RZ &req={2} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R9, R0, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
IABS R3, R2 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans1;
IABS R8, R9 ?trans2;
I2F.RP R0, R3 &wr=0x1 ?trans2;
MUFU.RCP R0, R0 &req={1} &wr=0x1 ?trans2;
IADD3 R4, PT, PT, R0, 0xffffffe, RZ &req={1} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R5, R4 &rd=0x1 &wr=0x2 ?trans2;
HFMA2 R4, -RZ, RZ, 0, 0 &req={1} ?trans1;
IADD3 R6, PT, PT, RZ, -R5, RZ &req={2} ?WAIT5_END_GROUP;
IMAD R7, R6, R3, RZ ?trans1;
MOV R6, R8 ?WAIT3_END_GROUP;
IMAD.HI.U32 R5, R5, R7, R4 ?WAIT6_END_GROUP;
IMAD.HI.U32 R5, R5, R6, RZ ?WAIT5_END_GROUP;
IADD3 R5, PT, PT, -R5, RZ, RZ ?WAIT5_END_GROUP;
IMAD R0, R3.reuse, R5, R6 ?trans2;
LDC.64 R4, c[0x0][0x380] &wr=0x1 ?trans3;
ISETP.GT.U32.AND P0, PT, R3, R0, PT ?WAIT5_END_GROUP;
LDC.64 R6, c[0x0][0x388] &wr=0x2 ?trans8;
@!P0 IADD3 R0, PT, PT, R0, -R3, RZ ?trans1;
ISETP.GE.AND P0, PT, R9, RZ, PT ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P1, PT, R3, R0, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R0, PT, PT, R0, -R3, RZ ?trans1;
ISETP.NE.AND P1, PT, R2, RZ, PT ?WAIT3_END_GROUP;
@!P0 IADD3 R0, PT, PT, -R0, RZ, RZ ?WAIT10_END_GROUP;
@!P1 LOP3.LUT R0, RZ, R2, RZ, 0x33, !PT ?trans1;
IMAD.WIDE R2, R9, 0x4, R4 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R0, 0x4, R6 &req={2} ?trans2;
LDG.E R2, desc[UR4][R2.64] &req={0} &wr=0x2 ?trans1;
LDC.64 R6, c[0x0][0x390] &wr=0x0 ?trans3;
LDG.E R5, desc[UR4][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE R6, R9, 0x4, R6 &req={0} ?WAIT4_END_GROUP;
FADD R9, R2, -R5 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x2b0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: g_layer_minus(float*, float*, float*, int, int)
_Z13g_layer_minusPfS_S_ii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x2c
s_load_b64 s[2:3], s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_mul_i32 s3, s3, s2
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmp_gt_i32_e32 vcc_lo, s3, v1
s_and_saveexec_b32 s3, vcc_lo
s_cbranch_execz .LBB5_2
s_ashr_i32 s3, s2, 31
v_ashrrev_i32_e32 v2, 31, v1
s_add_i32 s2, s2, s3
s_load_b128 s[4:7], s[0:1], 0x0
s_xor_b32 s2, s2, s3
s_load_b64 s[0:1], s[0:1], 0x10
v_cvt_f32_u32_e32 v0, s2
s_sub_i32 s3, 0, s2
v_add_nc_u32_e32 v4, v1, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v0, v0
v_xor_b32_e32 v4, v4, v2
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_u32_f32_e32 v0, v0
v_mul_lo_u32 v3, s3, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v3, v0, v3
v_add_nc_u32_e32 v0, v0, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v0, v4, v0
v_mul_lo_u32 v0, v0, s2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v0, v4, v0
v_subrev_nc_u32_e32 v3, s2, v0
v_cmp_le_u32_e32 vcc_lo, s2, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v0, v0, v3, vcc_lo
v_subrev_nc_u32_e32 v3, s2, v0
v_cmp_le_u32_e32 vcc_lo, s2, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v0, v0, v3, vcc_lo
v_xor_b32_e32 v0, v0, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v3, v0, v2
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[2:3], 2, v[3:4]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v2, vcc_lo, s6, v2
s_delay_alu instid0(VALU_DEP_4)
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
global_load_b32 v4, v[4:5], off
global_load_b32 v2, v[2:3], off
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_sub_f32_e32 v2, v4, v2
global_store_b32 v[0:1], v2, off
.LBB5_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| g_layer_minus | 1,122 | 1,358 | stackv2-00000-of-00015 |
// Demangled: g_layer_norm_gamma_beta(float*, float*, float*, float*, float*, int, int)
Function : _Z23g_layer_norm_gamma_betaPfS_S_S_S_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R4, SR_CTAID.X &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x3a8] &wr=0x2 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R5, SR_TID.X &wr=0x1 ?trans2;
IMAD R4, R4, UR4, R5 &req={1} ?WAIT2_END_GROUP;
IMAD R5, R3, R2, RZ &req={2} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R4, R5, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
IABS R5, R2 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans1;
IABS R10, R4 ?trans2;
I2F.RP R0, R5 &wr=0x1 ?trans1;
ISETP.GE.AND P1, PT, R4, RZ, PT ?trans1;
MUFU.RCP R0, R0 &req={1} &wr=0x1 ?trans2;
IADD3 R6, PT, PT, R0, 0xffffffe, RZ &req={1} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R7, R6 &rd=0x1 &wr=0x2 ?trans2;
HFMA2 R6, -RZ, RZ, 0, 0 &req={1} ?trans1;
IADD3 R8, PT, PT, RZ, -R7, RZ &req={2} ?WAIT5_END_GROUP;
IMAD R9, R8, R5, RZ ?trans1;
MOV R8, R10 ?WAIT3_END_GROUP;
IMAD.HI.U32 R7, R7, R9, R6 ?WAIT6_END_GROUP;
IMAD.HI.U32 R7, R7, R8, RZ ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, -R7, RZ, RZ ?WAIT5_END_GROUP;
IMAD R0, R5.reuse, R7, R8 ?trans2;
LDC.64 R6, c[0x0][0x390] &wr=0x1 ?trans3;
ISETP.GT.U32.AND P0, PT, R5, R0, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R0, PT, PT, R0, -R5, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R5, R0, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R0, PT, PT, R0, -R5, RZ ?trans1;
ISETP.NE.AND P0, PT, R2, RZ, PT ?WAIT3_END_GROUP;
@!P1 IADD3 R0, PT, PT, -R0, RZ, RZ ?WAIT10_END_GROUP;
@!P0 LOP3.LUT R0, RZ, R2, RZ, 0x33, !PT ?WAIT5_END_GROUP;
IMAD.WIDE R6, R0, 0x4, R6 &req={1} ?WAIT6_END_GROUP;
LDG.E R6, desc[UR4][R6.64] &req={0} &wr=0x2 ?trans1;
I2FP.F32.S32 R3, R3 ?trans1;
BSSY.RECONVERGENT B0, 0x320 ?trans3;
MUFU.RCP R2, R3 &wr=0x0 ?trans2;
FFMA R5, -R3, R2, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R5, R2, R5, R2 ?trans1;
FMUL R0, R6, R6 &req={2} ?WAIT4_END_GROUP;
FCHK P0, R0, R3 &wr=0x0 ?trans1;
FFMA R2, R0, R5, RZ ?WAIT4_END_GROUP;
FFMA R8, -R3, R2, R0 ?WAIT4_END_GROUP;
FFMA R2, R5, R8, R2 ?trans1;
@!P0 BRA 0x310 &req={0} ?trans6;
MOV R2, 0x300 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xae0 ?trans5;
MOV R2, R5 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
FADD R3, R2, 1.1920928955078125e-07 ?trans1;
BSSY.RECONVERGENT B0, 0x410 ?trans3;
MUFU.RSQ R0, R3 &rd=0x0 &wr=0x1 ?trans1;
IADD3 R2, PT, PT, R3, -0xd000000, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R2, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x3c0 &req={1,0} ?trans5;
MOV R8, 0x3a0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x960 ?trans5;
MOV R2, R0 ?trans1;
BRA 0x400 ?trans6;
FMUL.FTZ R2, R3, R0 ?trans1;
FMUL.FTZ R0, R0, 0.5 ?WAIT3_END_GROUP;
FFMA R3, -R2, R2, R3 ?WAIT4_END_GROUP;
FFMA R2, R3, R0, R2 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R0, PT, PT, R2, 0x1800000, RZ ?trans1;
BSSY.RECONVERGENT B0, 0x4e0 ?trans3;
LOP3.LUT R0, R0, 0x7f800000, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R0, 0x1ffffff, PT ?WAIT13_END_GROUP;
@P0 BRA 0x490 ?trans5;
MOV R8, 0x480 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x600 ?trans5;
BRA 0x4d0 ?trans5;
MUFU.RCP R3, R2 &wr=0x0 ?trans2;
FFMA R0, R3, R2, -1 &req={0} ?WAIT4_END_GROUP;
FADD.FTZ R0, -R0, -RZ ?WAIT4_END_GROUP;
FFMA R0, R3, R0, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans8;
LDC.64 R6, c[0x0][0x388] &wr=0x1 ?trans8;
LDC.64 R8, c[0x0][0x398] &wr=0x2 ?trans1;
IMAD.WIDE R2, R4, 0x4, R2 &req={0} ?WAIT7_END_GROUP;
LDC.64 R10, c[0x0][0x3a0] &wr=0x0 ?trans1;
LDG.E R3, desc[UR4][R2.64] &wr=0x3 ?trans1;
IMAD.WIDE R6, R4, 0x4, R6 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R8, R4, 0x4, R8 &req={2} ?WAIT4_END_GROUP;
FMUL R13, R3, R0 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R13 ?trans4;
LDG.E R8, desc[UR4][R8.64] &wr=0x2 ?trans1;
IMAD.WIDE R4, R4, 0x4, R10 &req={0} ?WAIT4_END_GROUP;
FMUL R15, R13, R8 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R15 ?trans4;
LDG.E R4, desc[UR4][R4.64] &wr=0x2 ?trans2;
FADD R3, R15, R4 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R3 ?trans1;
EXIT ?trans5;
IMAD.SHL.U32 R0, R2, 0x2, RZ ?trans1;
BSSY.RECONVERGENT B1, 0x920 ?trans4;
SHF.R.U32.HI R7, RZ, 0x18, R0 ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P0, PT, R7, RZ, PT ?WAIT13_END_GROUP;
@P0 BRA 0x6f0 ?trans5;
IMAD.SHL.U32 R0, R2, 0x2, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R0, RZ, PT ?WAIT13_END_GROUP;
@P0 FFMA R5, R2, 1.84467440737095516160e+19, RZ ?trans1;
@!P0 MUFU.RCP R3, R2 ?trans3;
@P0 MUFU.RCP R0, R5 &wr=0x0 ?trans2;
@P0 FFMA R6, R5, R0, -1 &req={0} ?WAIT4_END_GROUP;
@P0 FADD.FTZ R7, -R6, -RZ ?WAIT4_END_GROUP;
@P0 FFMA R0, R0, R7, R0 ?WAIT4_END_GROUP;
@P0 FFMA R3, R0, 1.84467440737095516160e+19, RZ ?trans1;
BRA 0x910 ?trans6;
IADD3 R9, PT, PT, R7, -0xfd, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R9, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x900 ?trans5;
LOP3.LUT R0, R2, 0x7fffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0x3f800000, RZ, 0xfc, !PT ?WAIT4_END_GROUP;
MUFU.RCP R3, R0 &wr=0x0 ?trans2;
FFMA R5, R0, R3, -1 &req={0} ?WAIT4_END_GROUP;
FADD.FTZ R6, -R5, -RZ ?WAIT4_END_GROUP;
FFMA.RM R5, R3.reuse, R6.reuse, R3.reuse ?trans1;
FFMA.RP R6, R3, R6, R3 ?trans1;
HFMA2 R3, -RZ, RZ, 0, 1.78813934326171875e-07 ?WAIT4_END_GROUP;
FSETP.NEU.FTZ.AND P0, PT, R5.reuse, R6, PT ?trans1;
LOP3.LUT R5, R5, 0x7fffff, RZ, 0xc0, !PT ?trans2;
SHF.L.U32 R6, R3, R9, RZ ?trans2;
LOP3.LUT R5, R5, 0x800000, RZ, 0xfc, !PT ?trans1;
SEL R3, RZ, 0xffffffff, !P0 ?WAIT3_END_GROUP;
LOP3.LUT R6, R6, R5, RZ, 0xc0, !PT ?trans2;
IADD3 R0, PT, PT, -R3, RZ, RZ ?trans2;
SHF.R.U32.HI R6, RZ, R9.reuse, R6 ?trans2;
LOP3.LUT P1, RZ, R0, R9, R5, 0xf8, !PT ?trans2;
LOP3.LUT P0, RZ, R6.reuse, 0x1, RZ, 0xc0, !PT ?trans2;
LOP3.LUT P2, RZ, R6, 0x2, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, P2, 0xe0, 0x0 ?trans2;
LOP3.LUT P1, RZ, R2, 0x7fffff, RZ, 0xc0, !PT ?WAIT3_END_GROUP;
SEL R0, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
IADD3 R0, PT, PT, -R0, RZ, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, RZ, PT ?trans1;
IADD3 R0, PT, PT, R7, -0xfc, RZ ?WAIT4_END_GROUP;
SHF.R.U32.HI R3, RZ, R0, R5 ?WAIT8_END_GROUP;
@!P0 IADD3 R3, PT, PT, R3, 0x1, RZ ?WAIT5_END_GROUP;
@!P1 IMAD.SHL.U32 R3, R3, 0x2, RZ ?WAIT5_END_GROUP;
LOP3.LUT R3, R3, 0x80000000, R2, 0xf8, !PT ?trans1;
BRA 0x910 ?trans6;
MUFU.RCP R3, R2 &rd=0x0 &wr=0x1 ?trans2;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R0, R3 &req={1} ?trans1;
MOV R2, R8 &req={0} ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R2 0x0 ?trans5;
LOP3.LUT P0, RZ, R3, 0x7fffffff, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 MOV R2, R3 ?trans1;
@!P0 BRA 0xaa0 ?trans6;
FSETP.GEU.FTZ.AND P0, PT, R3, RZ, PT ?trans1;
MOV R0, R3 ?WAIT12_END_GROUP;
@!P0 MOV R2, 0x7fffffff ?trans1;
@!P0 BRA 0xaa0 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P0 FADD.FTZ R2, R0, 1 ?trans1;
@P0 BRA 0xaa0 ?trans6;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P0 FFMA R3, R0, 1.84467440737095516160e+19, RZ ?WAIT4_END_GROUP;
@P0 MUFU.RSQ R2, R3 &wr=0x0 ?trans2;
@P0 FMUL.FTZ R6, R3, R2 &req={0} ?trans1;
@P0 FMUL.FTZ R7, R2, 0.5 ?trans1;
@!P0 MOV R2, R0 ?trans2;
@P0 FADD.FTZ R5, -R6, -RZ ?WAIT4_END_GROUP;
@P0 FFMA R5, R6, R5, R3 ?WAIT4_END_GROUP;
@P0 FFMA R5, R5, R7, R6 ?WAIT4_END_GROUP;
@P0 FMUL.FTZ R2, R5, 2.3283064365386962891e-10 ?WAIT7_END_GROUP;
MOV R0, R2 ?trans1;
MOV R2, R8 ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R2 0x0 ?trans5;
SHF.R.U32.HI R6, RZ, 0x17, R3 ?trans1;
BSSY.RECONVERGENT B1, 0x1140 ?trans1;
SHF.R.U32.HI R5, RZ, 0x17, R0 ?trans2;
LOP3.LUT R6, R6, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R10, R5, 0xff, RZ, 0xc0, !PT ?trans1;
MOV R5, R0 ?trans1;
IADD3 R9, PT, PT, R6, -0x1, RZ ?trans1;
MOV R8, R3 ?trans1;
IADD3 R11, PT, PT, R10, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R9, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R11, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R7, RZ ?trans1;
@!P0 BRA 0xd20 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0x1120 ?trans5;
LOP3.LUT P0, RZ, R8, 0x7fffffff, R5, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1100 ?trans5;
FSETP.NEU.FTZ.AND P2, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P1 BRA !P2, 0x1100 ?trans5;
LOP3.LUT P2, RZ, R5, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P1, P2, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0x10e0 ?trans5;
LOP3.LUT P1, RZ, R8, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x10b0 ?trans5;
ISETP.GE.AND P0, PT, R11, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R9, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R7, RZ ?trans1;
@!P0 MOV R7, 0xffffffc0 ?trans1;
@!P0 FFMA R5, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R8, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R7, PT, PT, R7, 0x40, RZ ?WAIT7_END_GROUP;
LEA R3, R6, 0xc0800000, 0x17 ?trans1;
BSSY.RECONVERGENT B2, 0x10a0 ?trans3;
IADD3 R8, PT, PT, -R3, R8, RZ ?trans2;
IADD3 R3, PT, PT, R10, -0x7f, RZ ?trans2;
MUFU.RCP R9, R8 &wr=0x0 ?trans1;
FADD.FTZ R11, -R8, -RZ ?trans2;
IMAD R0, R3.reuse, -0x800000, R5 ?trans1;
IADD3 R6, PT, PT, R3, 0x7f, -R6 ?WAIT4_END_GROUP;
IADD3 R6, PT, PT, R6, R7, RZ ?trans1;
FFMA R10, R9, R11, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R12, R9, R10, R9 ?WAIT4_END_GROUP;
FFMA R5, R0, R12, RZ ?WAIT4_END_GROUP;
FFMA R10, R11, R5, R0 ?WAIT4_END_GROUP;
FFMA R9, R12, R10, R5 ?WAIT4_END_GROUP;
FFMA R10, R11, R9, R0 ?WAIT4_END_GROUP;
FFMA R5, R12, R10, R9 ?WAIT5_END_GROUP;
SHF.R.U32.HI R0, RZ, 0x17, R5 ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R8, PT, PT, R0, R6, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R8, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1080 ?trans5;
ISETP.GT.AND P0, PT, R8, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1050 ?trans5;
ISETP.GE.AND P0, PT, R8, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1090 ?trans5;
ISETP.GE.AND P0, PT, R8, -0x18, PT ?trans1;
LOP3.LUT R5, R5, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x1090 ?trans5;
FFMA.RZ R0, R12, R10.reuse, R9.reuse ?trans1;
IADD3 R7, PT, PT, R8, 0x20, RZ ?trans1;
FFMA.RM R3, R12, R10.reuse, R9.reuse ?trans1;
ISETP.NE.AND P1, PT, R8.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R8, RZ, PT ?trans1;
LOP3.LUT R0, R0, 0x7fffff, RZ, 0xc0, !PT ?trans2;
IADD3 R8, PT, PT, -R8, RZ, RZ ?trans2;
LOP3.LUT R6, R0, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R0, R12, R10, R9 ?WAIT3_END_GROUP;
SHF.L.U32 R7, R6, R7, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R0, R3, PT ?trans1;
SEL R3, R8, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R7, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R3, RZ, R3, R6 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R7, RZ, 0x1, R3 ?WAIT3_END_GROUP;
SEL R0, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R0, R0, 0x1, R7, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, R3, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R7, R0, RZ ?WAIT4_END_GROUP;
LOP3.LUT R5, R0, R5, RZ, 0xfc, !PT ?trans1;
BRA 0x1090 ?trans6;
LOP3.LUT R5, R5, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R5, R5, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x1090 ?trans6;
IMAD R5, R6, 0x800000, R5 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
BRA 0x1130 ?trans5;
LOP3.LUT R5, R8, 0x80000000, R5, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R5, R5, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x1130 ?trans6;
LOP3.LUT R5, R8, 0x80000000, R5, 0x48, !PT ?trans1;
BRA 0x1130 ?trans6;
MUFU.RSQ R5, -QNAN &wr=0x0 ?trans1;
BRA 0x1130 ?trans5;
FADD.FTZ R5, R0, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R2 0x0 &req={0} ?trans5;
BRA 0x1160;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: g_layer_norm_gamma_beta(float*, float*, float*, float*, float*, int, int)
_Z23g_layer_norm_gamma_betaPfS_S_S_S_ii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x3c
s_load_b64 s[2:3], s[0:1], 0x28
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1)
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
s_mul_i32 s4, s3, s2
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_i32_e32 vcc_lo, s4, v1
s_and_saveexec_b32 s4, vcc_lo
s_cbranch_execz .LBB8_2
s_ashr_i32 s4, s2, 31
v_ashrrev_i32_e32 v2, 31, v1
s_add_i32 s2, s2, s4
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_xor_b32 s2, s2, s4
v_add_nc_u32_e32 v4, v1, v2
v_cvt_f32_u32_e32 v0, s2
s_sub_i32 s4, 0, s2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_xor_b32_e32 v4, v4, v2
v_rcp_iflag_f32_e32 v0, v0
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_u32_f32_e32 v0, v0
v_mul_lo_u32 v3, s4, v0
s_clause 0x1
s_load_b256 s[4:11], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x20
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v3, v0, v3
v_add_nc_u32_e32 v0, v0, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v0, v4, v0
v_mul_lo_u32 v0, v0, s2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v0, v4, v0
v_subrev_nc_u32_e32 v3, s2, v0
v_cmp_le_u32_e32 vcc_lo, s2, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v0, v0, v3, vcc_lo
v_subrev_nc_u32_e32 v3, s2, v0
v_cmp_le_u32_e32 vcc_lo, s2, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v0, v0, v3, vcc_lo
v_xor_b32_e32 v0, v0, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v3, v0, v2
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 2, v[3:4]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v3, vcc_lo, s8, v3
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo
v_add_co_u32 v2, vcc_lo, s4, v0
global_load_b32 v4, v[3:4], off
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
global_load_b32 v5, v[2:3], off
v_cvt_f32_i32_e32 v2, s3
s_waitcnt vmcnt(1)
v_mul_f32_e32 v3, v4, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_scale_f32 v4, null, v2, v2, v3
v_rcp_f32_e32 v6, v4
s_waitcnt_depctr 0xfff
v_fma_f32 v7, -v4, v6, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v6, v7, v6
v_div_scale_f32 v8, vcc_lo, v3, v2, v3
v_mul_f32_e32 v7, v8, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v9, -v4, v7, v8
v_fmac_f32_e32 v7, v9, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v4, -v4, v7, v8
v_div_fmas_f32 v4, v4, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fixup_f32 v2, v4, v2, v3
v_add_f32_e32 v2, 0x34000000, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_f32_e32 v3, 0x4f800000, v2
v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v2
v_cndmask_b32_e32 v2, v2, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_sqrt_f32_e32 v3, v2
s_waitcnt_depctr 0xfff
v_add_nc_u32_e32 v4, -1, v3
v_add_nc_u32_e32 v6, 1, v3
v_fma_f32 v7, -v4, v3, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v8, -v6, v3, v2
v_cmp_ge_f32_e64 s2, 0, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cndmask_b32_e64 v3, v3, v4, s2
v_cmp_lt_f32_e64 s2, 0, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v3, v3, v6, s2
v_mul_f32_e32 v4, 0x37800000, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v3, v3, v4, vcc_lo
v_cmp_class_f32_e64 vcc_lo, v2, 0x260
v_cndmask_b32_e32 v2, v3, v2, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_div_scale_f32 v3, null, v2, v2, 1.0
v_div_scale_f32 v7, vcc_lo, 1.0, v2, 1.0
v_rcp_f32_e32 v4, v3
s_waitcnt_depctr 0xfff
v_fma_f32 v6, -v3, v4, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v4, v6, v4
v_mul_f32_e32 v6, v7, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v8, -v3, v6, v7
v_fmac_f32_e32 v6, v8, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v3, -v3, v6, v7
v_div_fmas_f32 v3, v3, v4, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_div_fixup_f32 v4, v3, v2, 1.0
v_add_co_u32 v2, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
s_waitcnt vmcnt(0)
v_mul_f32_e32 v6, v5, v4
v_add_co_u32 v4, vcc_lo, s10, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s11, v1, vcc_lo
global_store_b32 v[2:3], v6, off
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v4, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_mul_f32_e32 v5, v4, v6
global_store_b32 v[2:3], v5, off
global_load_b32 v0, v[0:1], off
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v0, v4, v6
global_store_b32 v[2:3], v0, off
.LBB8_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| g_layer_norm_gamma_beta | 6,713 | 2,999 | stackv2-00000-of-00015 |
// Demangled: g_layer_snrm2(float*, float*, int, int)
Function : _Z13g_layer_snrm2PfS_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R9, SR_CTAID.X &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x390] &wr=0x2 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans2;
IMAD R9, R9, UR4, R0 &req={1} ?WAIT2_END_GROUP;
IMAD R0, R3, R2, RZ &req={2} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R9, R0, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE R4, R9, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R4.64] &req={1} &rd=0x0 &wr=0x2 ?trans1;
IABS R8, R2 ?WAIT4_END_GROUP;
I2F.RP R3, R8 &wr=0x1 ?trans1;
IABS R4, R9 &req={0} ?trans1;
MUFU.RCP R3, R3 &req={1} &wr=0x0 ?trans2;
IADD3 R6, PT, PT, R3, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R7, R6 &rd=0x0 &wr=0x1 ?trans2;
HFMA2 R6, -RZ, RZ, 0, 0 &req={0} ?trans1;
IADD3 R11, PT, PT, RZ, -R7, RZ &req={1} ?WAIT5_END_GROUP;
IMAD R11, R11, R8, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R7, R7, R11, R6 ?WAIT6_END_GROUP;
IMAD.HI.U32 R7, R7, R4, RZ ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, -R7, RZ, RZ ?WAIT5_END_GROUP;
IMAD R3, R8.reuse, R7, R4 ?trans2;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans3;
ISETP.GT.U32.AND P0, PT, R8, R3, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R3, PT, PT, R3, -R8, RZ ?trans1;
ISETP.GE.AND P0, PT, R9, RZ, PT ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P1, PT, R8, R3, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R3, PT, PT, R3, -R8, RZ ?trans1;
ISETP.NE.AND P1, PT, R2, RZ, PT ?WAIT3_END_GROUP;
@!P0 IADD3 R3, PT, PT, -R3, RZ, RZ ?WAIT10_END_GROUP;
@!P1 LOP3.LUT R3, RZ, R2, RZ, 0x33, !PT ?WAIT5_END_GROUP;
IMAD.WIDE R2, R3, 0x4, R4 &req={0} ?WAIT4_END_GROUP;
FMUL R7, R0, R0 &req={2} ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR4][R2.64], R7 ?trans1;
EXIT ?trans5;
BRA 0x270;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: g_layer_snrm2(float*, float*, int, int)
_Z13g_layer_snrm2PfS_ii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b64 s[2:3], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_mul_i32 s3, s3, s2
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmp_gt_i32_e32 vcc_lo, s3, v1
s_and_saveexec_b32 s3, vcc_lo
s_cbranch_execz .LBB7_3
s_ashr_i32 s3, s2, 31
v_ashrrev_i32_e32 v2, 31, v1
s_add_i32 s2, s2, s3
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_xor_b32 s4, s2, s3
v_add_nc_u32_e32 v4, v1, v2
v_cvt_f32_u32_e32 v0, s4
s_sub_i32 s2, 0, s4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_xor_b32_e32 v4, v4, v2
v_rcp_iflag_f32_e32 v0, v0
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_u32_f32_e32 v0, v0
v_mul_lo_u32 v3, s2, v0
s_load_b128 s[0:3], s[0:1], 0x0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v3, v0, v3
v_add_nc_u32_e32 v0, v0, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v0, v4, v0
v_mul_lo_u32 v0, v0, s4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v0, v4, v0
v_subrev_nc_u32_e32 v3, s4, v0
v_cmp_le_u32_e32 vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v0, v0, v3, vcc_lo
v_subrev_nc_u32_e32 v3, s4, v0
v_cmp_le_u32_e32 vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v0, v0, v3, vcc_lo
v_xor_b32_e32 v0, v0, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v0, v0, v2
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_ashrrev_i32_e32 v1, 31, v0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v2, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_mov_b32 s0, 0
global_load_b32 v2, v[2:3], off
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_load_b32 v3, v[0:1], off
s_waitcnt vmcnt(1)
v_mul_f32_e32 v4, v2, v2
.LBB7_2:
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_add_f32_e32 v2, v3, v4
global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off glc
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, v2, v3
v_mov_b32_e32 v3, v2
s_or_b32 s0, vcc_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s0
s_cbranch_execnz .LBB7_2
.LBB7_3:
s_endpgm
| g_layer_snrm2 | 1,054 | 1,435 | stackv2-00000-of-00015 |
// Demangled: g_normalize(float*, float const*, int, int, int)
Function : _Z11g_normalizePfPKfiii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R4, SR_CTAID.X &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x390] &wr=0x2 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R5, SR_TID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x398] &wr=0x3 ?trans1;
IMAD R3, R3, R2, RZ &req={2} ?WAIT2_END_GROUP;
IMAD R4, R4, UR4, R5 &req={1} ?trans2;
IMAD R5, R3, UR5, RZ &req={3} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R4, R5, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
IABS R11, R2 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans1;
IABS R10, R3 ?trans2;
I2F.RP R5, R11 &wr=0x1 ?trans1;
IABS R12, R4 ?trans1;
I2F.RP R0, R10 &wr=0x2 ?trans1;
MUFU.RCP R5, R5 &req={1} &wr=0x1 ?trans1;
MUFU.RCP R0, R0 &req={2} &wr=0x2 ?trans1;
IADD3 R8, PT, PT, R5, 0xffffffe, RZ &req={1} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R9, R8 &rd=0x1 &wr=0x3 ?trans1;
IADD3 R6, PT, PT, R0, 0xffffffe, RZ &req={2} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R7, R6 &rd=0x2 &wr=0x4 ?trans1;
HFMA2 R8, -RZ, RZ, 0, 0 &req={1} ?trans1;
IADD3 R14, PT, PT, RZ, -R9, RZ &req={3} ?trans1;
HFMA2 R6, -RZ, RZ, 0, 0 &req={2} ?WAIT4_END_GROUP;
IMAD R13, R14, R11, RZ ?trans1;
IABS R14, R3 ?trans2;
IADD3 R5, PT, PT, RZ, -R7, RZ &req={4} ?trans1;
IMAD.HI.U32 R8, R9, R13, R8 ?trans1;
MOV R9, R12 ?trans1;
IADD3 R14, PT, PT, RZ, -R14, RZ ?trans2;
IMAD R5, R5, R10, RZ ?trans2;
IMAD.HI.U32 R8, R8, R9, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R6, R7, R5, R6 ?trans1;
IADD3 R8, PT, PT, -R8, RZ, RZ ?trans1;
MOV R5, R14 ?WAIT4_END_GROUP;
IMAD.HI.U32 R0, R6, R9, RZ ?trans2;
LDC.64 R6, c[0x0][0x388] &wr=0x1 ?trans2;
IMAD R8, R11, R8, R9.reuse ?trans2;
IMAD R5, R0, R5, R9 ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P1, PT, R11, R8, PT ?trans2;
ISETP.GT.U32.AND P0, PT, R10, R5, PT ?WAIT11_END_GROUP;
@!P1 IADD3 R8, PT, PT, R8, -R11, RZ ?trans1;
ISETP.GE.AND P1, PT, R4, RZ, PT ?trans1;
@!P0 IADD3 R5, PT, PT, R5, -R10, RZ ?trans2;
@!P0 IADD3 R0, PT, PT, R0, 0x1, RZ ?trans1;
ISETP.GT.U32.AND P2, PT, R11, R8, PT ?trans2;
ISETP.GE.U32.AND P3, PT, R5, R10, PT ?trans1;
LOP3.LUT R5, R4, R3, RZ, 0x3c, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, RZ, PT ?WAIT5_END_GROUP;
@!P2 IADD3 R8, PT, PT, R8, -R11, RZ ?trans1;
ISETP.NE.AND P2, PT, R3, RZ, PT ?trans1;
@P3 IADD3 R0, PT, PT, R0, 0x1, RZ ?trans1;
ISETP.NE.AND P3, PT, R2, RZ, PT ?trans1;
@!P1 IADD3 R8, PT, PT, -R8, RZ, RZ ?WAIT4_END_GROUP;
@!P0 IADD3 R0, PT, PT, -R0, RZ, RZ ?WAIT6_END_GROUP;
@!P2 LOP3.LUT R0, RZ, R3, RZ, 0x33, !PT ?trans2;
@!P3 LOP3.LUT R8, RZ, R2, RZ, 0x33, !PT ?WAIT5_END_GROUP;
IMAD R3, R0, R2, R8 ?WAIT4_END_GROUP;
IMAD.WIDE R2, R3, 0x4, R6 &req={1} ?trans2;
LDC.64 R6, c[0x0][0x380] &wr=0x1 ?trans3;
LDG.E R11, desc[UR4][R2.64] &req={0} &wr=0x2 ?trans1;
IMAD.WIDE R4, R4, 0x4, R6 &req={1} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R4.64] &wr=0x3 ?trans1;
BSSY.RECONVERGENT B0, 0x4d0 ?trans1;
MUFU.RCP R6, R11 &req={2} &wr=0x0 ?trans2;
FFMA R7, -R11, R6, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R7, R6, R7, R6 ?trans1;
FCHK P0, R0, R11 &req={3} &wr=0x0 ?trans3;
FFMA R6, R0, R7, RZ ?WAIT4_END_GROUP;
FFMA R8, -R11, R6, R0 ?WAIT4_END_GROUP;
FFMA R7, R7, R8, R6 ?trans1;
@!P0 BRA 0x4c0 &req={0} ?trans6;
MOV R2, 0x4c0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x4f0 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
STG.E desc[UR4][R4.64], R7 ?trans1;
EXIT ?trans5;
SHF.R.U32.HI R6, RZ, 0x17, R11 ?trans1;
BSSY.RECONVERGENT B1, 0xb60 ?trans1;
SHF.R.U32.HI R3, RZ, 0x17, R0 ?trans2;
LOP3.LUT R15, R6, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R6, R3, 0xff, RZ, 0xc0, !PT ?trans1;
MOV R7, R0 ?trans1;
IADD3 R12, PT, PT, R15, -0x1, RZ ?trans1;
MOV R8, R11 ?trans1;
IADD3 R10, PT, PT, R6, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R12, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R10, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R9, RZ ?trans1;
@!P0 BRA 0x740 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R11|, +INF , PT ?trans1;
MOV R3, R11 ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0xb40 ?trans5;
LOP3.LUT P0, RZ, R8, 0x7fffffff, R7, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0xb20 ?trans5;
FSETP.NEU.FTZ.AND P1, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P2, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P2 BRA !P1, 0xb20 ?trans5;
LOP3.LUT P1, RZ, R7, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P2, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0xb00 ?trans5;
LOP3.LUT P1, RZ, R8, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0xad0 ?trans5;
ISETP.GE.AND P0, PT, R10, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R12, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R9, RZ ?trans1;
@!P0 MOV R9, 0xffffffc0 ?trans1;
@!P0 FFMA R7, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R8, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R9, PT, PT, R9, 0x40, RZ ?WAIT7_END_GROUP;
LEA R3, R15, 0xc0800000, 0x17 ?trans1;
BSSY.RECONVERGENT B2, 0xac0 ?trans1;
IADD3 R6, PT, PT, R6, -0x7f, RZ ?trans2;
IADD3 R3, PT, PT, -R3, R8, RZ ?WAIT3_END_GROUP;
IMAD R0, R6.reuse, -0x800000, R7 ?trans1;
IADD3 R6, PT, PT, R6, 0x7f, -R15 ?trans1;
MUFU.RCP R8, R3 &wr=0x0 ?trans1;
FADD.FTZ R11, -R3, -RZ ?trans2;
IADD3 R6, PT, PT, R6, R9, RZ ?trans2;
FFMA R13, R8, R11, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R10, R8, R13, R8 ?WAIT4_END_GROUP;
FFMA R7, R0, R10, RZ ?WAIT4_END_GROUP;
FFMA R8, R11, R7, R0 ?WAIT4_END_GROUP;
FFMA R13, R10, R8, R7 ?WAIT4_END_GROUP;
FFMA R8, R11, R13, R0 ?WAIT4_END_GROUP;
FFMA R7, R10, R8, R13 ?WAIT5_END_GROUP;
SHF.R.U32.HI R0, RZ, 0x17, R7 ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R11, PT, PT, R0, R6, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R11, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xaa0 ?trans5;
ISETP.GT.AND P0, PT, R11, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0xa70 ?trans5;
ISETP.GE.AND P0, PT, R11, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0xab0 ?trans5;
ISETP.GE.AND P0, PT, R11, -0x18, PT ?trans1;
LOP3.LUT R7, R7, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0xab0 ?trans5;
FFMA.RZ R0, R10.reuse, R8.reuse, R13.reuse ?trans1;
IADD3 R9, PT, PT, R11.reuse, 0x20, RZ ?trans1;
FFMA.RM R3, R10, R8, R13 ?trans1;
ISETP.NE.AND P1, PT, R11.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R11, RZ, PT ?trans1;
LOP3.LUT R0, R0, 0x7fffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R6, R0, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R0, R10, R8, R13 ?trans1;
IADD3 R8, PT, PT, -R11, RZ, RZ ?trans2;
SHF.L.U32 R9, R6, R9, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R0, R3, PT ?trans1;
SEL R3, R8, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R9, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R3, RZ, R3, R6 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R9, RZ, 0x1, R3 ?WAIT3_END_GROUP;
SEL R0, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R0, R0, 0x1, R9, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, R3, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R9, R0, RZ ?WAIT4_END_GROUP;
LOP3.LUT R7, R0, R7, RZ, 0xfc, !PT ?trans1;
BRA 0xab0 ?trans6;
LOP3.LUT R7, R7, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R7, R7, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0xab0 ?trans6;
IMAD R7, R6, 0x800000, R7 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
BRA 0xb50 ?trans5;
LOP3.LUT R7, R8, 0x80000000, R7, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R7, R7, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0xb50 ?trans6;
LOP3.LUT R7, R8, 0x80000000, R7, 0x48, !PT ?trans1;
BRA 0xb50 ?trans6;
MUFU.RSQ R7, -QNAN &wr=0x0 ?trans1;
BRA 0xb50 ?trans5;
FADD.FTZ R7, R0, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R2 0x0 &req={0} ?trans5;
BRA 0xb80;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: g_normalize(float*, float const*, int, int, int)
_Z11g_normalizePfPKfiii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b128 s[4:7], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mul_i32 s2, s5, s4
s_mul_i32 s3, s2, s6
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_i32_e32 vcc_lo, s3, v1
s_and_saveexec_b32 s3, vcc_lo
s_cbranch_execz .LBB2_2
s_ashr_i32 s3, s4, 31
s_ashr_i32 s5, s2, 31
s_add_i32 s6, s4, s3
s_add_i32 s2, s2, s5
s_xor_b32 s3, s6, s3
s_xor_b32 s6, s2, s5
v_cvt_f32_u32_e32 v0, s3
v_cvt_f32_u32_e32 v2, s6
s_sub_i32 s7, 0, s6
s_sub_i32 s2, 0, s3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v0, v0
v_rcp_iflag_f32_e32 v2, v2
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v2, 0x4f7ffffe, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cvt_u32_f32_e32 v3, v2
v_ashrrev_i32_e32 v2, 31, v1
v_mul_lo_u32 v5, s7, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v6, v1, v2
v_xor_b32_e32 v6, v6, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v5, v3, v5
v_dual_mul_f32 v0, 0x4f7ffffe, v0 :: v_dual_add_nc_u32 v3, v3, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_u32_f32_e32 v0, v0
v_mul_hi_u32 v3, v6, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_lo_u32 v4, s2, v0
v_add_nc_u32_e32 v5, 1, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v4, v0, v4
v_add_nc_u32_e32 v0, v0, v4
v_mul_lo_u32 v4, v3, s6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v4, v6, v4
v_subrev_nc_u32_e32 v7, s6, v4
v_cmp_le_u32_e32 vcc_lo, s6, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_dual_cndmask_b32 v3, v3, v5 :: v_dual_cndmask_b32 v4, v4, v7
v_xor_b32_e32 v7, s5, v2
v_add_nc_u32_e32 v5, 1, v3
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_u32_e32 vcc_lo, s6, v4
v_cndmask_b32_e32 v3, v3, v5, vcc_lo
v_mul_hi_u32 v0, v6, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_xor_b32_e32 v3, v3, v7
v_mul_lo_u32 v0, v0, s3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v5, v3, v7
v_sub_nc_u32_e32 v0, v6, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_subrev_nc_u32_e32 v6, s3, v0
v_cmp_le_u32_e64 s2, s3, v0
v_cndmask_b32_e64 v0, v0, v6, s2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v6, s3, v0
v_cmp_le_u32_e32 vcc_lo, s3, v0
s_load_b128 s[0:3], s[0:1], 0x0
v_cndmask_b32_e32 v0, v0, v6, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v0, v0, v2
v_sub_nc_u32_e32 v0, v0, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[3:4], null, v5, s4, v[0:1]
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_ashrrev_i32_e32 v4, 31, v3
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[3:4]
v_add_co_u32 v2, vcc_lo, s2, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
global_load_b32 v4, v[0:1], off
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_div_scale_f32 v3, null, v2, v2, v4
v_rcp_f32_e32 v5, v3
s_waitcnt_depctr 0xfff
v_fma_f32 v6, -v3, v5, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v5, v6, v5
v_div_scale_f32 v6, vcc_lo, v4, v2, v4
v_mul_f32_e32 v7, v6, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v8, -v3, v7, v6
v_fmac_f32_e32 v7, v8, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v3, -v3, v7, v6
v_div_fmas_f32 v3, v3, v5, v7
s_delay_alu instid0(VALU_DEP_1)
v_div_fixup_f32 v2, v3, v2, v4
global_store_b32 v[0:1], v2, off
.LBB2_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| g_normalize | 4,478 | 2,407 | stackv2-00000-of-00015 |
// Demangled: g_score_norm_layer_mask(float*, float, float const*, int, int, int)
Function : _Z23g_score_norm_layer_maskPffPKfiii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R7, SR_CTAID.X &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x398] &wr=0x2 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R2, SR_TID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x3a0] &wr=0x3 ?trans1;
IMAD R0, R5, R4, RZ &req={2} ?WAIT2_END_GROUP;
IMAD R7, R7, UR4, R2 &req={1} ?trans2;
IMAD R2, R0, UR5, RZ &req={3} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, R2, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
IABS R9, R0.reuse ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans1;
IABS R8, R7 ?trans2;
I2F.RP R4, R9 &wr=0x1 ?trans1;
IABS R10, R0 ?trans1;
LDCU UR6, c[0x0][0x388] &wr=0x2 ?trans1;
MUFU.RCP R4, R4 &req={1} &wr=0x1 ?trans2;
IADD3 R2, PT, PT, R4, 0xffffffe, RZ &req={1} ?trans2;
IADD3 R4, PT, PT, RZ, -R10, RZ ?WAIT2_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R3, R2 &rd=0x1 &wr=0x3 ?trans2;
HFMA2 R2, -RZ, RZ, 0, 0 &req={1} ?trans1;
IADD3 R6, PT, PT, RZ, -R3, RZ &req={3} ?WAIT5_END_GROUP;
IMAD R5, R6, R9, RZ ?trans1;
MOV R6, R8 ?WAIT3_END_GROUP;
IMAD.HI.U32 R3, R3, R5, R2 ?WAIT6_END_GROUP;
IMAD.HI.U32 R3, R3, R6, RZ ?WAIT4_END_GROUP;
IMAD R6, R3, R4, R6 ?trans2;
LDC.64 R4, c[0x0][0x390] &wr=0x1 ?trans3;
ISETP.GT.U32.AND P0, PT, R9, R6, PT ?WAIT5_END_GROUP;
LDC.64 R2, c[0x0][0x380] &wr=0x3 ?trans8;
@!P0 IADD3 R6, PT, PT, R6, -R9, RZ ?trans1;
ISETP.GE.AND P0, PT, R7, RZ, PT ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P1, PT, R9, R6, PT ?trans1;
IMAD.WIDE R2, R7, 0x4, R2 &req={3} ?WAIT12_END_GROUP;
@!P1 IADD3 R6, PT, PT, R6, -R9, RZ ?trans1;
ISETP.NE.AND P1, PT, R0, RZ, PT ?WAIT3_END_GROUP;
@!P0 IADD3 R6, PT, PT, -R6, RZ, RZ ?WAIT10_END_GROUP;
@!P1 LOP3.LUT R6, RZ, R0, RZ, 0x33, !PT ?trans2;
LDG.E R0, desc[UR4][R2.64] &req={0} &wr=0x2 ?trans3;
IMAD.WIDE R4, R6, 0x4, R4 &req={1} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x2 ?trans2;
FFMA R7, R0, UR6, -R5 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R7 ?trans1;
EXIT ?trans5;
BRA 0x2d0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: g_score_norm_layer_mask(float*, float, float const*, int, int, int)
_Z23g_score_norm_layer_maskPffPKfiii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x34
s_load_b128 s[4:7], s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mul_i32 s2, s5, s4
s_mul_i32 s3, s2, s6
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_i32_e32 vcc_lo, s3, v1
s_and_saveexec_b32 s3, vcc_lo
s_cbranch_execz .LBB3_2
s_ashr_i32 s3, s2, 31
v_ashrrev_i32_e32 v2, 31, v1
s_add_i32 s2, s2, s3
s_load_b64 s[4:5], s[0:1], 0x10
s_xor_b32 s2, s2, s3
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_cvt_f32_u32_e32 v0, s2
s_sub_i32 s3, 0, s2
v_add_nc_u32_e32 v4, v1, v2
v_rcp_iflag_f32_e32 v0, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_xor_b32_e32 v4, v4, v2
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
v_cvt_u32_f32_e32 v0, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v3, s3, v0
v_mul_hi_u32 v3, v0, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v0, v0, v3
v_mul_hi_u32 v0, v4, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v0, v0, s2
v_sub_nc_u32_e32 v0, v4, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v3, s2, v0
v_cmp_le_u32_e32 vcc_lo, s2, v0
v_cndmask_b32_e32 v0, v0, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_1)
v_subrev_nc_u32_e32 v3, s2, v0
v_cmp_le_u32_e32 vcc_lo, s2, v0
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x0
s_load_b32 s0, s[0:1], 0x8
v_cndmask_b32_e32 v0, v0, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v0, v0, v2
v_sub_nc_u32_e32 v3, v0, v2
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v4, 31, v3
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s2, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
v_lshlrev_b64 v[2:3], 2, v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
global_load_b32 v4, v[0:1], off
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_fma_f32 v2, v4, s0, -v2
global_store_b32 v[0:1], v2, off
.LBB3_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| g_score_norm_layer_mask | 1,153 | 1,402 | stackv2-00000-of-00015 |
// Demangled: g_sqrt(float*, int)
Function : _Z6g_sqrtPfi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD R5, R5, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x1a0 ?trans1;
IADD3 R4, PT, PT, R0, -0xd000000, RZ &req={2} ?trans1;
MUFU.RSQ R5, R0 &rd=0x0 &wr=0x1 ?trans4;
ISETP.GT.U32.AND P0, PT, R4, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x150 &req={0} ?trans5;
MOV R9, 0x130 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1c0 &req={1} ?trans5;
MOV R5, R0 ?trans1;
BRA 0x190 ?trans6;
FMUL.FTZ R7, R0, R5 &req={1} ?trans1;
FMUL.FTZ R5, R5, 0.5 ?WAIT3_END_GROUP;
FFMA R0, -R7, R7, R0 ?WAIT4_END_GROUP;
FFMA R5, R0, R5, R7 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
STG.E desc[UR4][R2.64], R5 ?trans1;
EXIT ?trans5;
LOP3.LUT P0, RZ, R0, 0x7fffffff, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 MOV R4, R0 ?trans1;
@!P0 BRA 0x2f0 ?trans6;
FSETP.GEU.FTZ.AND P0, PT, R0, RZ, PT ?WAIT13_END_GROUP;
@!P0 MOV R4, 0x7fffffff ?trans1;
@!P0 BRA 0x2f0 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P0 FADD.FTZ R4, R0, 1 ?trans1;
@P0 BRA 0x2f0 ?trans6;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P0 FFMA R5, R0, 1.84467440737095516160e+19, RZ ?WAIT4_END_GROUP;
@P0 MUFU.RSQ R4, R5 &wr=0x0 ?trans2;
@P0 FMUL.FTZ R6, R5, R4 &req={0} ?trans1;
@P0 FMUL.FTZ R8, R4, 0.5 ?trans1;
@!P0 MOV R4, R0 ?trans2;
@P0 FADD.FTZ R7, -R6, -RZ ?WAIT4_END_GROUP;
@P0 FFMA R7, R6, R7, R5 ?WAIT4_END_GROUP;
@P0 FFMA R7, R7, R8, R6 ?WAIT4_END_GROUP;
@P0 FMUL.FTZ R4, R7, 2.3283064365386962891e-10 ?WAIT7_END_GROUP;
MOV R0, R4 ?trans1;
MOV R4, R9 ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R4 0x0 ?trans5;
BRA 0x330;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: g_sqrt(float*, int)
_Z6g_sqrtPfi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b32 s3, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB9_2
s_load_b64 s[0:1], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b32 v2, v[0:1], off
s_waitcnt vmcnt(0)
v_mul_f32_e32 v3, 0x4f800000, v2
v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v2
v_cndmask_b32_e32 v2, v2, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_sqrt_f32_e32 v3, v2
s_waitcnt_depctr 0xfff
v_add_nc_u32_e32 v4, -1, v3
v_add_nc_u32_e32 v5, 1, v3
v_fma_f32 v6, -v4, v3, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v7, -v5, v3, v2
v_cmp_ge_f32_e64 s0, 0, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cndmask_b32_e64 v3, v3, v4, s0
v_cmp_lt_f32_e64 s0, 0, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v3, v3, v5, s0
v_mul_f32_e32 v4, 0x37800000, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v3, v3, v4, vcc_lo
v_cmp_class_f32_e64 vcc_lo, v2, 0x260
v_cndmask_b32_e32 v2, v3, v2, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB9_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| g_sqrt | 1,208 | 959 | stackv2-00000-of-00015 |
// Demangled: permute_asian_values(float*, float const*, float const*, float const*, float const*, float, float, float, int, int, int)
Function : _Z20permute_asian_valuesPfPKfS1_S1_S1_fffiii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_TID.X &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x398] &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans7;
LDC.64 R6, c[0x0][0x388] &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x3a8] &wr=0x3 ?trans7;
LDC R3, c[0x0][0x3b8] &wr=0x4 ?trans1;
LDG.E R7, desc[UR4][R6.64] &req={2} &rd=0x2 &wr=0x5 ?trans1;
IMAD.WIDE.U32 R4, R2, 0x4, R4 &req={1} ?WAIT6_END_GROUP;
LDG.E R4, desc[UR4][R4.64] &rd=0x2 &wr=0x5 ?trans1;
ISETP.GE.AND P0, PT, R3, 0x1, PT &req={4} ?WAIT13_END_GROUP;
@!P0 EXIT &req={3,2,0} ?trans5;
LDCU UR8, c[0x0][0x3b0] &wr=0x0 ?trans1;
FMUL R16, R4, UR7 &req={5} ?trans1;
HFMA2 R19, -RZ, RZ, 0, 0 ?trans1;
MOV R21, RZ ?trans2;
FFMA R17, R7, UR6, R16 ?WAIT4_END_GROUP;
FMUL R0, R17, UR8 &req={0} ?WAIT6_END_GROUP;
F2I.TRUNC.NTZ R0, R0 &wr=0x0 ?trans2;
VIMNMX.S32 R3, R0, R3, PT &req={0} ?WAIT5_END_GROUP;
VIMNMX.S32 R4, R3, 0x1, !PT ?WAIT7_END_GROUP;
ISETP.NE.AND P0, PT, R4, R19, PT ?trans1;
LDCU UR7, c[0x0][0x3b8] &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0x4d0 ?trans1;
LDCU UR6, c[0x0][0x3a8] &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x3b0] &wr=0x2 ?trans9;
@P0 BRA 0x4c0 ?trans5;
LDC R5, c[0x0][0x3b4] &wr=0x3 ?trans1;
IADD3 R9, PT, PT, R19.reuse, -0x1, RZ ?trans1;
BSSY.RECONVERGENT B1, 0x4b0 ?trans6;
LDC.64 R10, c[0x0][0x3a0] &wr=0x4 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x5 ?trans8;
LDC.64 R14, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD R0, R19, R5, R2 &req={3} ?WAIT5_END_GROUP;
IADD3 R3, PT, PT, R0, -R5, RZ ?trans2;
LDC.64 R12, c[0x0][0x388] &wr=0x3 ?trans3;
IMAD.WIDE R10, R3, 0x4, R10 &req={4} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R8, R9, 0x4, R6 &req={5} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R6, R19, 0x4, R6 ?WAIT4_END_GROUP;
IMAD.WIDE R4, R5, 0x4, R10 &req={2} ?WAIT7_END_GROUP;
LDG.E R0, desc[UR4][R8.64] &wr=0x2 ?trans4;
LDG.E R3, desc[UR4][R6.64] &wr=0x2 ?trans4;
LDG.E R18, desc[UR4][R10.64] &wr=0x4 ?trans4;
LDG.E R23, desc[UR4][R4.64] &wr=0x4 ?trans1;
BSSY.RECONVERGENT B2, 0x3c0 ?trans1;
FADD R3, -R0, R3 &req={2} ?trans1;
FADD R0, R17, -R0 ?WAIT3_END_GROUP;
MUFU.RCP R20, R3 &wr=0x2 ?trans1;
FADD R23, -R18, R23 &req={4} ?trans1;
FCHK P0, R0, R3 &wr=0x4 ?trans1;
FFMA R25, -R3, R20, 1 &req={2} ?WAIT4_END_GROUP;
FFMA R25, R20, R25, R20 ?WAIT4_END_GROUP;
FFMA R20, R0, R25, RZ ?WAIT4_END_GROUP;
FFMA R22, -R3, R20, R0 ?WAIT4_END_GROUP;
FFMA R20, R25, R22, R20 ?trans1;
@!P0 BRA 0x3b0 &req={4} ?trans6;
MOV R20, 0x3a0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x520 &req={3,1,0} ?trans5;
MOV R20, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 &req={1,0} ?trans5;
IMAD R25, R21, UR9, R2 ?trans2;
FFMA R3, R23, R20, R18 ?trans2;
IMAD.WIDE R22, R25, 0x4, R14 ?WAIT4_END_GROUP;
IMAD.WIDE R24, R21.reuse, 0x4, R12 &req={3} ?trans1;
STG.E desc[UR4][R22.64], R3 &rd=0x2 ?trans5;
LDG.E R25, desc[UR4][R24.64+0x4] &wr=0x3 ?trans1;
IADD3 R21, PT, PT, R21, 0x1, RZ ?trans1;
FFMA R0, R25, UR6, R16 &req={3} ?WAIT4_END_GROUP;
FMUL R0, R0, UR8 ?WAIT6_END_GROUP;
F2I.TRUNC.NTZ R0, R0 &wr=0x0 ?trans2;
VIMNMX.S32 R18, R0, UR7, PT &req={0} ?WAIT5_END_GROUP;
VIMNMX.S32 R18, R18, 0x1, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R18, R19, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x280 &req={2} ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R4, R18 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 &req={2,1,0} ?trans5;
LDCU UR6, c[0x0][0x3b8] &wr=0x0 ?trans1;
IADD3 R19, PT, PT, R19, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R19, UR6, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x150 ?trans5;
EXIT ?trans5;
SHF.R.U32.HI R22, RZ, 0x17, R3 ?trans1;
BSSY.RECONVERGENT B3, 0xb80 ?trans1;
SHF.R.U32.HI R24, RZ, 0x17, R0 ?trans2;
LOP3.LUT R22, R22, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R27, R24, 0xff, RZ, 0xc0, !PT ?trans1;
MOV R25, R0 ?trans1;
IADD3 R29, PT, PT, R22, -0x1, RZ ?trans1;
MOV R26, R3 ?trans1;
IADD3 R28, PT, PT, R27, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R29, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R28, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R24, RZ ?trans1;
@!P0 BRA 0x760 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0xb60 ?trans5;
LOP3.LUT P0, RZ, R26, 0x7fffffff, R25, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0xb40 ?trans5;
FSETP.NEU.FTZ.AND P2, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P1 BRA !P2, 0xb40 ?trans5;
LOP3.LUT P2, RZ, R25, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P1, P2, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0xb20 ?trans5;
LOP3.LUT P1, RZ, R26, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0xaf0 ?trans5;
ISETP.GE.AND P0, PT, R28, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R29, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R24, RZ ?trans1;
@!P0 MOV R24, 0xffffffc0 ?trans1;
@!P0 FFMA R25, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R26, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R24, PT, PT, R24, 0x40, RZ ?WAIT7_END_GROUP;
LEA R3, R22, 0xc0800000, 0x17 ?trans1;
BSSY.RECONVERGENT B4, 0xae0 ?trans1;
IADD3 R27, PT, PT, R27, -0x7f, RZ ?trans2;
IADD3 R28, PT, PT, -R3, R26, RZ ?WAIT3_END_GROUP;
IMAD R0, R27.reuse, -0x800000, R25 ?trans1;
IADD3 R27, PT, PT, R27, 0x7f, -R22 ?trans1;
MUFU.RCP R3, R28 &wr=0x0 ?trans1;
FADD.FTZ R29, -R28, -RZ ?trans2;
IADD3 R27, PT, PT, R27, R24, RZ ?trans2;
FFMA R26, R3, R29, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R3, R3, R26, R3 ?WAIT4_END_GROUP;
FFMA R26, R0, R3, RZ ?WAIT4_END_GROUP;
FFMA R25, R29, R26, R0 ?WAIT4_END_GROUP;
FFMA R26, R3, R25, R26 ?WAIT4_END_GROUP;
FFMA R25, R29, R26, R0 ?WAIT4_END_GROUP;
FFMA R0, R3, R25, R26 ?WAIT5_END_GROUP;
SHF.R.U32.HI R22, RZ, 0x17, R0 ?WAIT4_END_GROUP;
LOP3.LUT R22, R22, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R28, PT, PT, R22, R27, RZ ?WAIT4_END_GROUP;
IADD3 R22, PT, PT, R28, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R22, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xac0 ?trans5;
ISETP.GT.AND P0, PT, R28, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0xa90 ?trans5;
ISETP.GE.AND P0, PT, R28, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0xad0 ?trans5;
ISETP.GE.AND P0, PT, R28, -0x18, PT ?trans1;
LOP3.LUT R0, R0, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0xad0 ?trans5;
FFMA.RZ R22, R3, R25, R26 ?trans1;
IADD3 R27, PT, PT, R28.reuse, 0x20, RZ ?trans1;
ISETP.NE.AND P1, PT, R28.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R28, RZ, PT ?trans2;
LOP3.LUT R22, R22, 0x7fffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R24, R22, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R22, R3.reuse, R25.reuse, R26.reuse ?trans1;
FFMA.RM R3, R3, R25, R26 ?trans1;
IADD3 R25, PT, PT, -R28, RZ, RZ ?trans2;
SHF.L.U32 R27, R24, R27, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R22, R3, PT ?trans1;
SEL R3, R25, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R27, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R3, RZ, R3, R24 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R25, RZ, 0x1, R3 ?WAIT3_END_GROUP;
SEL R22, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R22, R22, 0x1, R25, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R22, R22, R3, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R25, PT, PT, R25, R22, RZ ?WAIT4_END_GROUP;
LOP3.LUT R0, R25, R0, RZ, 0xfc, !PT ?trans1;
BRA 0xad0 ?trans6;
LOP3.LUT R0, R0, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0xad0 ?trans6;
IMAD R0, R27, 0x800000, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B4 ?trans5;
BRA 0xb70 ?trans5;
LOP3.LUT R0, R26, 0x80000000, R25, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0xb70 ?trans6;
LOP3.LUT R0, R26, 0x80000000, R25, 0x48, !PT ?trans1;
BRA 0xb70 ?trans6;
MUFU.RSQ R0, -QNAN &wr=0x0 ?trans1;
BRA 0xb70 ?trans5;
FADD.FTZ R0, R0, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B3 ?trans5;
MOV R24, R20 ?trans1;
HFMA2 R25, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R24 0x0 &req={0} ?trans5;
BRA 0xbb0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: permute_asian_values(float*, float const*, float const*, float const*, float const*, float, float, float, int, int, int)
_Z20permute_asian_valuesPfPKfS1_S1_S1_fffiii:
s_load_b32 s16, s[0:1], 0x38
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s16, 1
s_cbranch_scc1 .LBB2_7
s_load_b256 s[4:11], s[0:1], 0x0
v_dual_mov_b32 v4, 0 :: v_dual_lshlrev_b32 v1, 2, v0
s_waitcnt lgkmcnt(0)
global_load_b32 v1, v1, s[10:11]
s_load_b128 s[12:15], s[0:1], 0x28
s_load_b32 s10, s[6:7], 0x0
s_load_b64 s[2:3], s[0:1], 0x20
s_add_u32 s1, s6, 4
s_addc_u32 s6, s7, 0
s_mov_b32 s7, 0
s_waitcnt vmcnt(0) lgkmcnt(0)
v_mul_f32_e32 v15, s13, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v16, s12, s10, v15
v_mul_f32_e32 v1, s14, v16
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cvt_i32_f32_e32 v2, v1
v_mov_b32_e32 v1, 0
v_minmax_i32 v3, s16, v2, 1
.LBB2_2:
s_mov_b32 s10, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_eq_u32_e64 s7, v3
s_cbranch_execz .LBB2_6
v_mad_u64_u32 v[7:8], null, v3, s15, v[0:1]
v_lshlrev_b64 v[9:10], 2, v[3:4]
v_ashrrev_i32_e32 v2, 31, v1
v_mad_u64_u32 v[5:6], null, s15, v1, v[0:1]
s_mov_b32 s11, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[13:14], 2, v[1:2]
v_subrev_nc_u32_e32 v11, s15, v7
v_ashrrev_i32_e32 v8, 31, v7
v_ashrrev_i32_e32 v12, 31, v11
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[17:18], 2, v[7:8]
v_add_co_u32 v7, vcc_lo, s8, v9
v_add_co_ci_u32_e32 v8, vcc_lo, s9, v10, vcc_lo
v_lshlrev_b64 v[11:12], 2, v[11:12]
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_co_u32 v9, vcc_lo, s2, v17
v_add_co_ci_u32_e32 v10, vcc_lo, s3, v18, vcc_lo
v_add_co_u32 v11, vcc_lo, s2, v11
s_delay_alu instid0(VALU_DEP_4)
v_add_co_ci_u32_e32 v12, vcc_lo, s3, v12, vcc_lo
v_add_co_u32 v13, vcc_lo, s1, v13
v_add_co_ci_u32_e32 v14, vcc_lo, s6, v14, vcc_lo
.LBB2_4:
global_load_b64 v[17:18], v[7:8], off offset:-4
s_clause 0x1
global_load_b32 v2, v[11:12], off
global_load_b32 v19, v[9:10], off
v_add_nc_u32_e32 v1, 1, v1
s_waitcnt vmcnt(2)
v_sub_f32_e32 v20, v16, v17
v_sub_f32_e32 v21, v18, v17
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_div_scale_f32 v6, null, v21, v21, v20
v_div_scale_f32 v22, vcc_lo, v20, v21, v20
v_rcp_f32_e32 v17, v6
s_waitcnt_depctr 0xfff
v_fma_f32 v18, -v6, v17, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v17, v18, v17
v_mul_f32_e32 v18, v22, v17
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v23, -v6, v18, v22
v_fmac_f32_e32 v18, v23, v17
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_fma_f32 v22, -v6, v18, v22
v_ashrrev_i32_e32 v6, 31, v5
v_div_fmas_f32 v22, v22, v17, v18
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[17:18], 2, v[5:6]
s_waitcnt vmcnt(0)
v_dual_sub_f32 v6, v19, v2 :: v_dual_add_nc_u32 v5, s15, v5
v_div_fixup_f32 v19, v22, v21, v20
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v17, vcc_lo, s4, v17
v_add_co_ci_u32_e32 v18, vcc_lo, s5, v18, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v2, v6, v19
global_store_b32 v[17:18], v2, off
global_load_b32 v2, v[13:14], off
v_add_co_u32 v13, s0, v13, 4
v_add_co_ci_u32_e64 v14, s0, 0, v14, s0
s_waitcnt vmcnt(0)
v_fma_f32 v2, s12, v2, v15
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v2, s14, v2
v_cvt_i32_f32_e32 v2, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_minmax_i32 v2, s16, v2, 1
v_cmp_ne_u32_e32 vcc_lo, v2, v3
s_or_b32 s11, vcc_lo, s11
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s11
s_cbranch_execnz .LBB2_4
s_or_b32 exec_lo, exec_lo, s11
v_mov_b32_e32 v3, v2
.LBB2_6:
s_or_b32 exec_lo, exec_lo, s10
s_add_i32 s7, s7, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s7, s16
s_cbranch_scc0 .LBB2_2
.LBB2_7:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| permute_asian_values | 4,696 | 2,333 | stackv2-00000-of-00015 |
// Demangled: transpose(float*, int, int)
Function : _Z9transposePfii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R23, c[0x0][0x388] &wr=0x1 ?trans1;
S2R R3, SR_CgaCtaId &wr=0x2 ?trans1;
MOV R0, 0x400 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans1;
S2R R32, SR_TID.X &wr=0x4 ?trans1;
LOP3.LUT R23, R23, 0xffffffe0, RZ, 0xc0, !PT &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R23, 0x21, PT ?trans1;
LEA R0, R3, R0, 0x18 &req={2} ?trans2;
SHF.R.U32.HI R33, RZ, 0x5, R32 &req={4} ?trans1;
IMAD.SHL.U32 R2, R32.reuse, 0x8, RZ ?trans1;
LOP3.LUT R32, R32, 0x1f, RZ, 0xc0, !PT ?WAIT3_END_GROUP;
IMAD R19, R33, 0x108, R0.reuse ?trans1;
LOP3.LUT R2, R2, 0xf8, RZ, 0xc0, !PT ?trans1;
IMAD R0, R32, 0x108, R0 ?WAIT3_END_GROUP;
IADD3 R19, PT, PT, R19, R2, RZ ?trans1;
IMAD R21, R33, 0x8, R0 ?trans1;
@!P0 BRA 0xed0 &req={3,0} ?trans6;
LDCU UR4, c[0x0][0x38c] &wr=0x0 ?trans1;
LOP3.LUT R17, R33.reuse, 0xc0, RZ, 0xfc, !PT ?trans1;
HFMA2 R0, -RZ, RZ, 0, 0 ?trans1;
LOP3.LUT R15, R33.reuse, 0xa0, RZ, 0xfc, !PT ?trans1;
UMOV UR5, 0x20 ?trans1;
LOP3.LUT R13, R33.reuse, 0x80, RZ, 0xfc, !PT ?trans2;
LOP3.LUT R3, R33.reuse, 0x60, RZ, 0xfc, !PT ?trans2;
LOP3.LUT R5, R33, 0x20, RZ, 0xfc, !PT ?trans2;
PRMT R2, RZ, 0x7610, R2 ?WAIT2_END_GROUP;
PRMT R6, RZ, 0x7610, R6 ?trans1;
IMAD R17, R17, UR4, R32.reuse &req={0} ?trans2;
IMAD R15, R15, UR4, R32.reuse ?trans2;
IMAD R13, R13, UR4, R32.reuse ?trans2;
IMAD R3, R3, UR4, R32.reuse ?trans2;
IMAD R4, R5, UR4, R32 ?WAIT7_END_GROUP;
LDC R5, c[0x0][0x38c] &req={0} &wr=0x0 ?trans1;
ISETP.GE.U32.AND P1, PT, R0.reuse, 0x7, PT ?trans1;
IADD3 R7, PT, PT, R0, 0x1, RZ ?trans1;
UMOV UR4, URZ ?trans1;
IADD3 R6, PT, PT, R6, 0x1, RZ ?WAIT3_END_GROUP;
MOV R0, R7 ?trans1;
IADD3 R7, PT, PT, R33, UR5, RZ ?WAIT4_END_GROUP;
LOP3.LUT P0, RZ, R0, 0x7, RZ, 0xc0, !PT ?trans1;
IMAD R7, R7, R5, R32 &req={0} ?trans1;
@!P1 BRA 0x8b0 &req={3,2,1} ?trans11;
LOP3.LUT R9, R33.reuse, 0xe0, RZ, 0xfc, !PT ?trans1;
IMAD R18, R33.reuse, R5.reuse, R32.reuse ?trans1;
LOP3.LUT R11, R33, 0x40, RZ, 0xfc, !PT ?trans1;
UMOV UR4, URZ ?trans1;
LOP3.LUT R24, R0, 0xfffffff8, RZ, 0xc0, !PT ?trans1;
IMAD R10, R9, R5.reuse, R32.reuse ?trans1;
IADD3 R22, PT, PT, R17, UR5, RZ ?trans1;
IMAD R16, R11, R5, R32 ?trans1;
IADD3 R12, PT, PT, R15, UR5, RZ ?trans2;
IADD3 R14, PT, PT, R13, UR5, RZ ?WAIT2_END_GROUP;
IADD3 R8, PT, PT, R3, UR5, RZ ?trans2;
IADD3 R20, PT, PT, R4, UR5, RZ ?trans1;
MOV R9, R7 ?trans1;
IADD3 R18, PT, PT, R18, UR5, RZ ?trans2;
IADD3 R11, PT, PT, -R24, RZ, RZ ?trans2;
IADD3 R10, PT, PT, R10, UR5, RZ ?trans2;
IADD3 R16, PT, PT, R16, UR5, RZ ?WAIT7_END_GROUP;
LDC.64 R36, c[0x0][0x380] &req={0} &wr=0x0 ?trans2;
IMAD.WIDE R34, R9, 0x4, R36 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R30, R18, 0x4, R36.reuse ?trans1;
LDG.E R24, desc[UR6][R34.64] &wr=0x2 ?trans4;
LDG.E R25, desc[UR6][R30.64] &wr=0x2 ?trans4;
STS.64 [R21], R24 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS.64 R26, [R19] &wr=0x0 ?trans4;
STG.E desc[UR6][R34.64], R27 &req={0} ?trans4;
STG.E desc[UR6][R30.64], R26 &rd=0x0 ?trans4;
LDG.E R28, desc[UR6][R34.64+0x80] &wr=0x2 ?trans1;
IMAD.WIDE R26, R20, 0x4, R36 &req={0} ?WAIT5_END_GROUP;
LDG.E R29, desc[UR6][R26.64] &wr=0x2 ?trans4;
STS.64 [R21], R28 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS.64 R30, [R19] &wr=0x0 ?trans4;
STG.E desc[UR6][R34.64+0x80], R31 &req={0} ?trans4;
STG.E desc[UR6][R26.64], R30 &rd=0x0 ?trans4;
LDG.E R24, desc[UR6][R34.64+0x100] &wr=0x2 ?trans1;
IMAD.WIDE R30, R16, 0x4, R36 &req={0} ?WAIT5_END_GROUP;
LDG.E R25, desc[UR6][R30.64] &wr=0x2 ?trans4;
STS.64 [R21], R24 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS.64 R26, [R19] &wr=0x0 ?trans4;
STG.E desc[UR6][R34.64+0x100], R27 &req={0} ?trans4;
STG.E desc[UR6][R30.64], R26 &rd=0x0 ?trans4;
LDG.E R28, desc[UR6][R34.64+0x180] &wr=0x2 ?trans1;
IMAD.WIDE R26, R8, 0x4, R36 &req={0} ?WAIT5_END_GROUP;
LDG.E R29, desc[UR6][R26.64] &wr=0x2 ?trans4;
STS.64 [R21], R28 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS.64 R30, [R19] &wr=0x0 ?trans4;
STG.E desc[UR6][R34.64+0x180], R31 &req={0} ?trans4;
STG.E desc[UR6][R26.64], R30 &rd=0x0 ?trans4;
LDG.E R24, desc[UR6][R34.64+0x200] &wr=0x2 ?trans1;
IMAD.WIDE R30, R14, 0x4, R36 &req={0} ?WAIT5_END_GROUP;
LDG.E R25, desc[UR6][R30.64] &wr=0x2 ?trans4;
STS.64 [R21], R24 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS.64 R26, [R19] &wr=0x0 ?trans4;
STG.E desc[UR6][R34.64+0x200], R27 &req={0} ?trans4;
STG.E desc[UR6][R30.64], R26 &rd=0x0 ?trans4;
LDG.E R28, desc[UR6][R34.64+0x280] &wr=0x2 ?trans1;
IMAD.WIDE R26, R12, 0x4, R36 &req={0} ?WAIT5_END_GROUP;
LDG.E R29, desc[UR6][R26.64] &wr=0x2 ?trans4;
STS.64 [R21], R28 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS.64 R30, [R19] &wr=0x0 ?trans4;
STG.E desc[UR6][R34.64+0x280], R31 &req={0} ?trans4;
STG.E desc[UR6][R26.64], R30 &rd=0x0 ?trans4;
LDG.E R24, desc[UR6][R34.64+0x300] &wr=0x2 ?trans1;
IMAD.WIDE R30, R22, 0x4, R36 &req={0} ?WAIT5_END_GROUP;
LDG.E R25, desc[UR6][R30.64] &wr=0x2 ?trans1;
IMAD.WIDE R36, R10, 0x4, R36 ?WAIT3_END_GROUP;
STS.64 [R21], R24 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS.64 R26, [R19] &wr=0x0 ?trans4;
STG.E desc[UR6][R34.64+0x300], R27 &req={0} ?trans4;
STG.E desc[UR6][R30.64], R26 ?trans4;
LDG.E R28, desc[UR6][R34.64+0x380] &wr=0x2 ?trans4;
LDG.E R29, desc[UR6][R36.64] &wr=0x2 ?trans1;
IADD3 R11, PT, PT, R11, 0x8, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R11, RZ, PT ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x100, URZ ?trans1;
IADD3 R9, PT, PT, R9, 0x100, RZ ?trans1;
IMAD R18, R5.reuse, 0x100, R18 ?trans2;
IMAD R20, R5.reuse, 0x100, R20 ?trans2;
IMAD R16, R5.reuse, 0x100, R16 ?trans2;
IMAD R8, R5.reuse, 0x100, R8 ?trans2;
IMAD R14, R5, 0x100, R14 ?WAIT2_END_GROUP;
IMAD R12, R5.reuse, 0x100, R12 ?trans2;
IMAD R10, R5.reuse, 0x100, R10 ?trans2;
IMAD R22, R5, 0x100, R22 ?trans1;
STS.64 [R21], R28 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS.64 R30, [R19] &wr=0x0 ?trans4;
STG.E desc[UR6][R34.64+0x380], R31 &req={0} &rd=0x0 ?trans4;
STG.E desc[UR6][R36.64], R30 &rd=0x0 ?trans1;
@P1 BRA 0x3c0 ?trans5;
@!P0 BRA 0xe90 ?trans5;
LOP3.LUT R9, R6, 0x7, RZ, 0xc0, !PT ?trans2;
IADD3 R12, PT, PT, R32, UR5, RZ ?trans2;
LOP3.LUT P1, RZ, R9.reuse, 0x3, RZ, 0xc0, !PT ?trans2;
IADD3 R8, PT, PT, R9, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R8, 0x3, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xbe0 ?trans5;
LDC.64 R8, c[0x0][0x380] &wr=0x1 ?trans1;
IADD3 R14, PT, PT, R33, UR4, RZ ?trans2;
IADD3 R29, PT, PT, R7, UR4, RZ ?WAIT3_END_GROUP;
IMAD R37, R14, R5, R12 &req={0} ?trans2;
IMAD.WIDE R28, R29, 0x4, R8 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R36, R37, 0x4, R8 ?trans1;
LDG.E R24, desc[UR6][R28.64] &wr=0x2 ?trans4;
LDG.E R25, desc[UR6][R36.64] &wr=0x2 ?trans1;
IADD3 R10, PT, PT, R14, 0x20, RZ ?WAIT5_END_GROUP;
IMAD R11, R10, R5, R12 ?WAIT4_END_GROUP;
IMAD.WIDE R10, R11, 0x4, R8 ?trans1;
STS.64 [R21], R24 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS.64 R30, [R19] &wr=0x0 ?trans4;
STG.E desc[UR6][R28.64], R31 &req={0} ?trans4;
STG.E desc[UR6][R36.64], R30 ?trans4;
LDG.E R34, desc[UR6][R28.64+0x80] &wr=0x2 ?trans4;
LDG.E R35, desc[UR6][R10.64] &wr=0x2 ?trans1;
IADD3 R16, PT, PT, R14, 0x40, RZ ?WAIT5_END_GROUP;
IMAD R27, R16, R5, R12 ?WAIT4_END_GROUP;
IMAD.WIDE R26, R27, 0x4, R8 ?trans1;
STS.64 [R21], R34 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS.64 R24, [R19] &wr=0x0 ?trans4;
STG.E desc[UR6][R28.64+0x80], R25 &req={0} ?trans4;
STG.E desc[UR6][R10.64], R24 ?trans4;
LDG.E R30, desc[UR6][R28.64+0x100] &wr=0x2 ?trans4;
LDG.E R31, desc[UR6][R26.64] &wr=0x2 ?trans1;
IADD3 R14, PT, PT, R14, 0x60, RZ ?WAIT5_END_GROUP;
IMAD R37, R14, R5, R12 ?WAIT4_END_GROUP;
IMAD.WIDE R36, R37, 0x4, R8 ?trans1;
STS.64 [R21], R30 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS.64 R34, [R19] &wr=0x0 ?trans4;
STG.E desc[UR6][R28.64+0x100], R35 &req={0} ?trans4;
STG.E desc[UR6][R26.64], R34 ?trans4;
LDG.E R8, desc[UR6][R28.64+0x180] &wr=0x2 ?trans4;
LDG.E R9, desc[UR6][R36.64] &wr=0x2 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x80, URZ ?WAIT3_END_GROUP;
STS.64 [R21], R8 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS.64 R10, [R19] &wr=0x0 ?trans4;
STG.E desc[UR6][R28.64+0x180], R11 &req={0} &rd=0x1 ?trans4;
STG.E desc[UR6][R36.64], R10 &rd=0x1 ?trans2;
@!P1 BRA 0xe90 ?trans5;
LOP3.LUT P0, RZ, R2.reuse, 0x3, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R8, R2, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P1, PT, R8, 0x1, PT ?WAIT6_END_GROUP;
@!P0 BRA 0xdb0 ?trans7;
LDC.64 R8, c[0x0][0x380] &wr=0x2 ?trans1;
IADD3 R14, PT, PT, R33, UR4, RZ ?trans2;
IADD3 R29, PT, PT, R7, UR4, RZ &req={1} ?WAIT3_END_GROUP;
IMAD R31, R14, R5, R12 &req={0} ?trans2;
IMAD.WIDE R28, R29, 0x4, R8 &req={2} ?WAIT4_END_GROUP;
IMAD.WIDE R30, R31, 0x4, R8 ?trans1;
LDG.E R26, desc[UR6][R28.64] &wr=0x2 ?trans4;
LDG.E R27, desc[UR6][R30.64] &wr=0x2 ?trans1;
IADD3 R14, PT, PT, R14, 0x20, RZ ?WAIT5_END_GROUP;
IMAD R25, R14, R5, R12 ?WAIT4_END_GROUP;
IMAD.WIDE R8, R25, 0x4, R8 ?trans1;
STS.64 [R21], R26 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS.64 R10, [R19] &wr=0x0 ?trans4;
STG.E desc[UR6][R28.64], R11 &req={0} ?trans4;
STG.E desc[UR6][R30.64], R10 ?trans4;
LDG.E R24, desc[UR6][R28.64+0x80] &wr=0x2 ?trans4;
LDG.E R25, desc[UR6][R8.64] &wr=0x2 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x40, URZ ?WAIT3_END_GROUP;
STS.64 [R21], R24 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS.64 R26, [R19] &wr=0x0 ?trans4;
STG.E desc[UR6][R28.64+0x80], R27 &req={0} &rd=0x2 ?trans4;
STG.E desc[UR6][R8.64], R26 &rd=0x2 ?trans2;
@!P1 BRA 0xe90 ?trans5;
LDC.64 R8, c[0x0][0x380] &req={2} &wr=0x2 ?trans1;
IADD3 R10, PT, PT, R33, UR4, RZ &req={1} ?trans2;
IADD3 R11, PT, PT, R7, UR4, RZ ?WAIT3_END_GROUP;
IMAD R5, R10, R5, R12 ?trans2;
IMAD.WIDE R10, R11, 0x4, R8 &req={2} ?WAIT4_END_GROUP;
IMAD.WIDE R8, R5, 0x4, R8 ?trans1;
LDG.E R24, desc[UR6][R10.64] &wr=0x2 ?trans4;
LDG.E R25, desc[UR6][R8.64] &wr=0x2 ?trans4;
STS.64 [R21], R24 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS.64 R26, [R19] &wr=0x1 ?trans4;
STG.E desc[UR6][R10.64], R27 &req={1} &rd=0x3 ?trans4;
STG.E desc[UR6][R8.64], R26 &rd=0x3 ?trans2;
UIADD3 UR5, UPT, UPT, UR5, 0x20, URZ ?trans1;
IADD3 R2, PT, PT, R2, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.LE.AND P0, PT, R23, UR5, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x210 ?trans5;
LDCU UR4, c[0x0][0x38c] &wr=0x4 ?trans2;
ULOP3.LUT UR5, UR4, 0xffffffe0, URZ, 0xc0, !UPT &req={4} ?WAIT6_END_GROUP;
VIMNMX.S32 R23, R23, UR5, PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R23, 0x1, PT ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
ISETP.GE.U32.AND P0, PT, R23.reuse, 0x61, PT ?trans1;
IADD3 R0, PT, PT, R23, -0x1, RZ ?trans1;
HFMA2 R6, -RZ, RZ, 0, 0 ?WAIT3_END_GROUP;
LEA.HI R4, R0, 0x1, RZ, 0x1b ?WAIT4_END_GROUP;
LOP3.LUT R0, R4, 0x3, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
@!P0 BRA 0x1f60 ?trans5;
LOP3.LUT R4, R4, 0xffffffc, RZ, 0xc0, !PT ?trans1;
LDC.64 R2, c[0x0][0x380] &wr=0x4 ?trans1;
LOP3.LUT R5, R33.reuse, 0x60, RZ, 0xfc, !PT ?trans1;
ULEA UR5, UR4, 0x80, 0x7 ?trans1;
LOP3.LUT R9, R33.reuse, 0x40, RZ, 0xfc, !PT &req={3,2} ?trans1;
IMAD R11, R33.reuse, UR4, R32.reuse &req={1} ?trans1;
IADD3 R7, PT, PT, -R4, RZ, RZ ?trans2;
LOP3.LUT R13, R33, 0x20, RZ, 0xfc, !PT ?trans1;
IMAD R8, R5, UR4, R32.reuse ?trans1;
MOV R6, RZ ?trans1;
IMAD R9, R9, UR4, R32.reuse ?trans1;
ISETP.GE.AND P0, PT, R7, RZ, PT ?trans1;
IMAD R10, R13, UR4, R32 ?WAIT12_END_GROUP;
@P0 BRA 0x1d30 ?trans5;
IADD3 R4, PT, PT, -R7, RZ, RZ ?trans2;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?WAIT3_END_GROUP;
ISETP.GT.AND P1, PT, R4, 0xc, PT ?WAIT13_END_GROUP;
@!P1 BRA 0x18c0 ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x1 ?trans1;
PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x80 ?WAIT13_END_GROUP;
IMAD.WIDE R16, R11, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
LDG.E R14, desc[UR6][R16.64] &req={2} &wr=0x2 ?trans1;
IADD3 R13, PT, PT, R10, 0x20, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R12, R13, 0x4, R4 ?trans1;
STS [R21], R14 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R23, [R19] &wr=0x1 ?trans4;
STG.E desc[UR6][R16.64], R23 &req={1} ?trans4;
LDG.E R18, desc[UR6][R12.64] &wr=0x2 ?trans1;
IADD3 R15, PT, PT, R9, 0x40, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R14, R15, 0x4, R4 ?trans1;
STS [R21], R18 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R25, [R19] &wr=0x1 ?trans4;
STG.E desc[UR6][R12.64], R25 &req={1} ?trans4;
LDG.E R20, desc[UR6][R14.64] &wr=0x2 ?trans1;
IADD3 R17, PT, PT, R8, 0x60, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R16, R17, 0x4, R4 ?trans1;
STS [R21], R20 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R27, [R19] &wr=0x1 ?trans4;
STG.E desc[UR6][R14.64], R27 &req={1} ?trans4;
LDG.E R22, desc[UR6][R16.64] &wr=0x2 ?trans1;
IADD3 R23, PT, PT, R11, UR5, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R12, R23, 0x4, R4 ?trans1;
STS [R21], R22 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R25, [R19] &wr=0x1 ?trans4;
STG.E desc[UR6][R16.64], R25 &req={1} ?trans4;
LDG.E R20, desc[UR6][R12.64] &wr=0x2 ?trans1;
IADD3 R18, PT, PT, R10, UR5, RZ ?WAIT4_END_GROUP;
IADD3 R11, PT, PT, R18, 0x20, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R10, R11, 0x4, R4 ?trans1;
STS [R21], R20 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R27, [R19] &wr=0x1 ?trans4;
STG.E desc[UR6][R12.64], R27 &req={1} ?trans4;
LDG.E R22, desc[UR6][R10.64] &wr=0x2 ?trans1;
IADD3 R16, PT, PT, R9, UR5, RZ ?WAIT4_END_GROUP;
IADD3 R15, PT, PT, R16, 0x40, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R14, R15, 0x4, R4 ?trans1;
STS [R21], R22 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R25, [R19] &wr=0x1 ?trans4;
STG.E desc[UR6][R10.64], R25 &req={1} ?trans4;
LDG.E R20, desc[UR6][R14.64] &wr=0x2 ?trans1;
IADD3 R17, PT, PT, R8, UR5, RZ ?WAIT4_END_GROUP;
IADD3 R9, PT, PT, R17, 0x60, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R8, R9, 0x4, R4 ?trans1;
STS [R21], R20 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R13, [R19] &wr=0x1 ?trans4;
STG.E desc[UR6][R14.64], R13 &req={1} ?trans4;
LDG.E R12, desc[UR6][R8.64] &wr=0x2 ?trans1;
IADD3 R23, PT, PT, R23, UR5, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R10, R23, 0x4, R4 ?trans1;
STS [R21], R12 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R25, [R19] &wr=0x1 ?trans4;
STG.E desc[UR6][R8.64], R25 &req={1} ?trans4;
LDG.E R20, desc[UR6][R10.64] &wr=0x2 ?trans1;
IADD3 R18, PT, PT, R18, UR5, RZ ?WAIT4_END_GROUP;
IADD3 R13, PT, PT, R18, 0x20, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R12, R13, 0x4, R4 ?trans1;
STS [R21], R20 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R15, [R19] &wr=0x1 ?trans4;
STG.E desc[UR6][R10.64], R15 &req={1} ?trans4;
LDG.E R14, desc[UR6][R12.64] &wr=0x2 ?trans1;
IADD3 R16, PT, PT, R16, UR5, RZ ?WAIT4_END_GROUP;
IADD3 R9, PT, PT, R16, 0x40, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R8, R9, 0x4, R4 ?trans1;
STS [R21], R14 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R25, [R19] &wr=0x1 ?trans4;
STG.E desc[UR6][R12.64], R25 &req={1} ?trans4;
LDG.E R20, desc[UR6][R8.64] &wr=0x2 ?trans1;
IADD3 R17, PT, PT, R17, UR5, RZ ?WAIT4_END_GROUP;
IADD3 R11, PT, PT, R17, 0x60, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R10, R11, 0x4, R4 ?trans1;
STS [R21], R20 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R15, [R19] &wr=0x1 ?trans4;
STG.E desc[UR6][R8.64], R15 &req={1} ?trans4;
LDG.E R14, desc[UR6][R10.64] &wr=0x2 ?trans1;
IADD3 R23, PT, PT, R23, UR5, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R12, R23, 0x4, R4 ?trans1;
STS [R21], R14 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R25, [R19] &wr=0x1 ?trans4;
STG.E desc[UR6][R10.64], R25 &req={1} ?trans4;
LDG.E R20, desc[UR6][R12.64] &wr=0x2 ?trans1;
IADD3 R18, PT, PT, R18, UR5, RZ ?WAIT4_END_GROUP;
IADD3 R9, PT, PT, R18, 0x20, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R8, R9, 0x4, R4 ?trans1;
STS [R21], R20 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R27, [R19] &wr=0x1 ?trans4;
STG.E desc[UR6][R12.64], R27 &req={1} ?trans4;
LDG.E R22, desc[UR6][R8.64] &wr=0x2 ?trans1;
IADD3 R16, PT, PT, R16, UR5, RZ ?WAIT4_END_GROUP;
IADD3 R15, PT, PT, R16, 0x40, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R14, R15, 0x4, R4 ?trans1;
STS [R21], R22 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R11, [R19] &wr=0x1 ?trans4;
STG.E desc[UR6][R8.64], R11 &req={1} ?trans4;
LDG.E R10, desc[UR6][R14.64] &wr=0x2 ?trans1;
IADD3 R17, PT, PT, R17, UR5, RZ ?WAIT4_END_GROUP;
IADD3 R13, PT, PT, R17, 0x60, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R12, R13, 0x4, R4 ?trans1;
STS [R21], R10 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R25, [R19] &wr=0x1 ?trans4;
STG.E desc[UR6][R14.64], R25 &req={1} ?trans4;
LDG.E R20, desc[UR6][R12.64] &wr=0x2 ?trans1;
IADD3 R7, PT, PT, R7, 0x10, RZ ?WAIT2_END_GROUP;
IADD3 R11, PT, PT, R23, UR5, RZ ?trans2;
IADD3 R10, PT, PT, R18, UR5, RZ ?trans2;
IADD3 R9, PT, PT, R16, UR5, RZ ?trans2;
IADD3 R8, PT, PT, R17, UR5, RZ ?trans1;
ISETP.GE.AND P1, PT, R7, -0xc, PT ?trans1;
IADD3 R6, PT, PT, R6, 0x200, RZ ?trans1;
STS [R21], R20 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R27, [R19] &wr=0x1 ?trans4;
STG.E desc[UR6][R12.64], R27 &req={1} &rd=0x2 ?trans1;
@!P1 BRA 0x10c0 ?trans5;
IADD3 R4, PT, PT, -R7, RZ, RZ ?WAIT5_END_GROUP;
ISETP.GT.AND P1, PT, R4, 0x4, PT ?WAIT13_END_GROUP;
@!P1 BRA 0x1d10 ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x1 ?trans2;
IMAD.WIDE R16, R11, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
LDG.E R14, desc[UR6][R16.64] &wr=0x3 ?trans1;
IADD3 R13, PT, PT, R10, 0x20, RZ &req={2} ?WAIT5_END_GROUP;
IMAD.WIDE R12, R13, 0x4, R4 ?trans1;
STS [R21], R14 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R23, [R19] &wr=0x1 ?trans4;
STG.E desc[UR6][R16.64], R23 &req={1} ?trans4;
LDG.E R18, desc[UR6][R12.64] &wr=0x2 ?trans1;
IADD3 R15, PT, PT, R9, 0x40, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R14, R15, 0x4, R4 ?trans1;
STS [R21], R18 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R25, [R19] &wr=0x1 ?trans4;
STG.E desc[UR6][R12.64], R25 &req={1} ?trans4;
LDG.E R20, desc[UR6][R14.64] &wr=0x2 ?trans1;
IADD3 R17, PT, PT, R8, 0x60, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R16, R17, 0x4, R4 ?trans1;
STS [R21], R20 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R27, [R19] &wr=0x1 ?trans4;
STG.E desc[UR6][R14.64], R27 &req={1} ?trans4;
LDG.E R18, desc[UR6][R16.64] &wr=0x2 ?trans1;
IADD3 R23, PT, PT, R11, UR5, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R12, R23, 0x4, R4 ?trans1;
STS [R21], R18 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R25, [R19] &wr=0x1 ?trans4;
STG.E desc[UR6][R16.64], R25 &req={1} ?trans4;
LDG.E R22, desc[UR6][R12.64] &wr=0x2 ?trans1;
IADD3 R20, PT, PT, R10, UR5, RZ ?WAIT4_END_GROUP;
IADD3 R11, PT, PT, R20, 0x20, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R10, R11, 0x4, R4 ?trans1;
STS [R21], R22 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R27, [R19] &wr=0x1 ?trans4;
STG.E desc[UR6][R12.64], R27 &req={1} ?trans4;
LDG.E R18, desc[UR6][R10.64] &wr=0x2 ?trans1;
IADD3 R9, PT, PT, R9, UR5, RZ ?WAIT4_END_GROUP;
IADD3 R15, PT, PT, R9, 0x40, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R14, R15, 0x4, R4 ?trans1;
STS [R21], R18 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R17, [R19] &wr=0x1 ?trans4;
STG.E desc[UR6][R10.64], R17 &req={1} ?trans4;
LDG.E R16, desc[UR6][R14.64] &wr=0x2 ?trans1;
IADD3 R8, PT, PT, R8, UR5, RZ ?WAIT4_END_GROUP;
IADD3 R25, PT, PT, R8, 0x60, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R4, R25, 0x4, R4 ?trans1;
STS [R21], R16 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R13, [R19] &wr=0x1 ?trans4;
STG.E desc[UR6][R14.64], R13 &req={1} ?trans4;
LDG.E R12, desc[UR6][R4.64] &wr=0x2 ?trans1;
PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x80 ?WAIT2_END_GROUP;
IADD3 R6, PT, PT, R6, 0x100, RZ ?trans2;
IADD3 R7, PT, PT, R7, 0x8, RZ ?trans2;
IADD3 R10, PT, PT, R20, UR5, RZ ?trans2;
IADD3 R9, PT, PT, R9, UR5, RZ ?trans2;
IADD3 R8, PT, PT, R8, UR5, RZ ?trans2;
IADD3 R11, PT, PT, R23, UR5, RZ ?trans1;
STS [R21], R12 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R17, [R19] &wr=0x1 ?trans4;
STG.E desc[UR6][R4.64], R17 &req={1} &rd=0x1 ?trans2;
ISETP.NE.OR P0, PT, R7, RZ, P0 ?WAIT13_END_GROUP;
@!P0 BRA 0x1f60 ?trans5;
IMAD.WIDE R14, R11, 0x4, R2 &req={4,1} ?WAIT5_END_GROUP;
LDG.E R12, desc[UR6][R14.64] &req={2} &wr=0x2 ?trans1;
IADD3 R5, PT, PT, R10, 0x20, RZ &req={1} ?WAIT5_END_GROUP;
IMAD.WIDE R4, R5, 0x4, R2 ?trans1;
STS [R21], R12 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R17, [R19] &wr=0x1 ?trans4;
STG.E desc[UR6][R14.64], R17 &req={1} ?trans4;
LDG.E R16, desc[UR6][R4.64] &wr=0x2 ?trans1;
IADD3 R13, PT, PT, R9, 0x40, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R12, R13, 0x4, R2 ?trans1;
STS [R21], R16 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R23, [R19] &wr=0x1 ?trans4;
STG.E desc[UR6][R4.64], R23 &req={1} ?trans4;
LDG.E R18, desc[UR6][R12.64] &wr=0x2 ?trans1;
IADD3 R15, PT, PT, R8, 0x60, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R14, R15, 0x4, R2 ?trans1;
STS [R21], R18 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R17, [R19] &wr=0x1 ?trans4;
STG.E desc[UR6][R12.64], R17 &req={1} ?trans4;
LDG.E R16, desc[UR6][R14.64] &wr=0x2 ?trans1;
IADD3 R7, PT, PT, R7, 0x4, RZ ?WAIT2_END_GROUP;
IADD3 R11, PT, PT, R11, UR5, RZ ?trans2;
IADD3 R10, PT, PT, R10, UR5, RZ ?trans2;
IADD3 R9, PT, PT, R9, UR5, RZ ?trans2;
IADD3 R8, PT, PT, R8, UR5, RZ ?trans1;
ISETP.NE.AND P0, PT, R7, RZ, PT ?trans1;
IADD3 R6, PT, PT, R6, 0x80, RZ ?trans1;
STS [R21], R16 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R5, [R19] &wr=0x1 ?trans4;
STG.E desc[UR6][R14.64], R5 &req={1} &rd=0x1 ?trans1;
@P0 BRA 0x1d30 ?trans5;
ISETP.NE.AND P0, PT, R0, RZ, PT ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
LDC.64 R4, c[0x0][0x380] &req={1} &wr=0x1 ?trans1;
IADD3 R33, PT, PT, R33, R6, RZ ?trans2;
IADD3 R0, PT, PT, -R0, RZ, RZ ?WAIT3_END_GROUP;
IMAD R33, R33, UR4, R6 ?trans1;
ULEA UR4, UR4, 0x20, 0x5 ?WAIT4_END_GROUP;
IADD3 R33, PT, PT, R32, R33, RZ ?WAIT8_END_GROUP;
IMAD.WIDE R2, R33, 0x4, R4 &req={4,1} ?WAIT5_END_GROUP;
LDG.E R6, desc[UR6][R2.64] &wr=0x4 ?trans1;
IADD3 R0, PT, PT, R0, 0x1, RZ ?trans2;
IADD3 R33, PT, PT, R33, UR4, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R0, RZ, PT ?trans1;
STS [R21], R6 &req={4} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R7, [R19] &wr=0x1 ?trans4;
STG.E desc[UR6][R2.64], R7 &req={1} &rd=0x1 ?trans1;
@P0 BRA 0x1fe0 ?trans5;
EXIT ?trans5;
BRA 0x2090;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: transpose(float*, int, int)
_Z9transposePfii:
s_load_b128 s[0:3], s[0:1], 0x0
v_lshrrev_b32_e32 v4, 5, v0
v_and_b32_e32 v0, 31, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b32_e32 v5, 3, v4
v_lshlrev_b32_e32 v6, 3, v0
s_waitcnt lgkmcnt(0)
s_and_not1_b32 s2, s2, 31
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lt_i32 s2, 33
s_cbranch_scc1 .LBB1_5
v_mul_lo_u32 v3, s3, v4
v_or_b32_e32 v7, 32, v4
v_mad_u32_u24 v8, 0x108, v4, v6
s_mov_b32 s4, 32
s_lshl_b32 s5, s3, 5
s_delay_alu instid0(VALU_DEP_2)
v_mad_u64_u32 v[1:2], null, s3, v7, v[0:1]
v_mad_u32_u24 v7, 0x108, v0, v5
v_add3_u32 v9, v3, v0, 32
.LBB1_2:
s_delay_alu instid0(VALU_DEP_1)
v_mov_b32_e32 v2, v9
s_mov_b32 s6, 0
.LBB1_3:
s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
v_add_nc_u32_e32 v10, s6, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_ashrrev_i32_e32 v3, 31, v2
s_add_i32 s6, s6, 32
s_cmp_ge_u32 s6, s4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v11, 31, v10
v_lshlrev_b64 v[12:13], 2, v[2:3]
v_add_nc_u32_e32 v2, s5, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[10:11], 2, v[10:11]
v_add_co_u32 v12, vcc_lo, s0, v12
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v13, vcc_lo, s1, v13, vcc_lo
v_add_co_u32 v10, vcc_lo, s0, v10
s_delay_alu instid0(VALU_DEP_4)
v_add_co_ci_u32_e32 v11, vcc_lo, s1, v11, vcc_lo
s_clause 0x1
global_load_b32 v14, v[10:11], off
global_load_b32 v15, v[12:13], off
s_waitcnt vmcnt(0)
ds_store_b64 v7, v[14:15]
s_waitcnt lgkmcnt(0)
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
ds_load_b64 v[14:15], v8
s_waitcnt lgkmcnt(0)
s_clause 0x1
global_store_b32 v[10:11], v15, off
global_store_b32 v[12:13], v14, off
s_cbranch_scc0 .LBB1_3
v_add_nc_u32_e32 v9, 32, v9
v_add_nc_u32_e32 v1, s5, v1
s_add_i32 s4, s4, 32
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_ge_i32 s4, s2
s_cbranch_scc0 .LBB1_2
.LBB1_5:
s_and_b32 s4, s3, 0xffffffe0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_min_i32 s2, s2, s4
s_cmp_lt_i32 s2, 1
s_cbranch_scc1 .LBB1_8
v_mad_u64_u32 v[1:2], null, s3, v4, v[0:1]
v_mad_u32_u24 v0, 0x108, v0, v5
v_mad_u32_u24 v3, 0x108, v4, v6
s_lshl_b32 s3, s3, 5
s_mov_b32 s4, 0
s_add_i32 s3, s3, 32
.LBB1_7:
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_ashrrev_i32_e32 v2, 31, v1
s_add_i32 s4, s4, 32
s_cmp_ge_i32 s4, s2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[4:5], 2, v[1:2]
v_add_nc_u32_e32 v1, s3, v1
v_add_co_u32 v4, vcc_lo, s0, v4
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
global_load_b32 v2, v[4:5], off
s_waitcnt vmcnt(0)
ds_store_b32 v0, v2
s_waitcnt lgkmcnt(0)
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
ds_load_b32 v2, v3
s_waitcnt lgkmcnt(0)
global_store_b32 v[4:5], v2, off
s_cbranch_scc0 .LBB1_7
.LBB1_8:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| transpose | 12,797 | 1,732 | stackv2-00000-of-00015 |
// Demangled: vector_add_kernel(float*, float const*, float const*)
Function : _Z17vector_add_kernelPfPKfS1_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R9, SR_TID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_CTAID.X &wr=0x1 ?trans2;
IMAD R9, R0, UR4, R9 &req={1} ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R9, 0xff, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x390] &wr=0x2 ?trans8;
LDC.64 R6, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD.WIDE R2, R9, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x4 ?trans1;
IMAD.WIDE R4, R9, 0x4, R4 &req={2} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x4 ?trans1;
IMAD.WIDE R6, R9, 0x4, R6 &req={3} ?WAIT4_END_GROUP;
FADD R9, R2, R5 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x130;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: vector_add_kernel(float*, float const*, float const*)
_Z17vector_add_kernelPfPKfS1_:
s_load_b32 s2, s[0:1], 0x24
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e32 0x100, v1
s_cbranch_execz .LBB0_2
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s6, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s4, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| vector_add_kernel | 541 | 563 | stackv2-00000-of-00015 |
// Demangled: add(double*, double*, double*, double*)
Function : _Z3addPdS_S_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R0, SR_TID.X &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans1;
S2R R9, SR_TID.Y &wr=0x0 ?trans1;
S2R R7, SR_CTAID.X &wr=0x3 ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x4 ?trans1;
S2R R11, SR_CTAID.Y &wr=0x5 ?trans1;
IMAD R0, R0, 0x8, R9 &req={0} ?WAIT6_END_GROUP;
LDC.64 R8, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD R0, R7, 0x20, R0 &req={3} ?WAIT4_END_GROUP;
IMAD R7, R11, 0x4, R0 &req={5} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R7, 0x8, R2 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R7.reuse, 0x8, R4 &req={4} ?trans2;
LDG.E.64 R2, desc[UR4][R2.64] &req={2} &wr=0x2 ?trans4;
LDG.E.64 R4, desc[UR4][R4.64] &wr=0x2 ?trans1;
LDC.64 R10, c[0x0][0x380] &wr=0x1 ?trans8;
LDC.64 R12, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD.WIDE R8, R7, 0x8, R8 &req={0} ?trans1;
DADD R6, R2, R4 &req={2} &wr=0x0 ?trans4;
STG.E.64 desc[UR4][R8.64], R6 &req={0} ?trans2;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDG.E.64 R10, desc[UR4][R10.64] &req={1} &wr=0x2 ?trans4;
LDG.E.64 R12, desc[UR4][R12.64] &req={3} &wr=0x2 ?trans1;
LDC.64 R14, c[0x0][0x390] &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x398] &wr=0x1 ?trans1;
MOV.64 R16, 0x409dfc0000000000 ?WAIT2_END_GROUP;
MOV.64 R18, 0x40c1f78000000000 ?WAIT15_END_GROUP;
NOP ?WAIT6_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R2, R10, R12 &req={2} &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R14.64], R2 &req={0} ?trans4;
STG.E.64 desc[UR4][R4.64], R16 &req={1} ?trans4;
STG.E.64 desc[UR4][R4.64+0x8], R18 ?trans1;
EXIT ?trans5;
BRA 0x230;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: add(double*, double*, double*, double*)
_Z3addPdS_S_S_:
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
s_load_b256 s[0:7], s[0:1], 0x0
s_lshl_b32 s8, s15, 2
s_lshl_b32 s9, s14, 5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshl_add_u32 v0, v1, 3, v0
v_add3_u32 v0, s8, s9, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 3, v[0:1]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s3, v1, vcc_lo
global_load_b64 v[2:3], v[2:3], off
global_load_b64 v[4:5], v[4:5], off
s_waitcnt vmcnt(0)
v_add_f64 v[2:3], v[2:3], v[4:5]
v_add_co_u32 v4, vcc_lo, s4, v0
v_mov_b32_e32 v0, 0
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v1, vcc_lo
global_store_b64 v[4:5], v[2:3], off
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_clause 0x1
global_load_b64 v[1:2], v0, s[0:1]
global_load_b64 v[3:4], v0, s[2:3]
s_waitcnt vmcnt(0)
v_add_f64 v[4:5], v[1:2], v[3:4]
v_dual_mov_b32 v1, 0x409dfc00 :: v_dual_mov_b32 v2, v0
v_mov_b32_e32 v3, 0x40c1f780
s_clause 0x1
global_store_b64 v0, v[4:5], s[4:5]
global_store_b128 v0, v[0:3], s[6:7]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| add | 984 | 763 | stackv2-00000-of-00015 |
// Demangled: __sum_inplace(double2*)
Function : _Z13__sum_inplaceP7double2
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans8;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.U32.AND P0, PT, R0, 0x2, PT &req={1} ?WAIT13_END_GROUP;
@!P0 EXIT &req={0} ?trans5;
S2R R12, SR_TID.X &wr=0x0 ?trans1;
S2UR UR4, SR_CTAID.X &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans8;
LDC.64 R10, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD R13, R0, UR4, R12 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R13, 0x10, R2 &req={2,1} ?WAIT7_END_GROUP;
SHF.R.U32.HI R14, RZ, 0x1, R0 ?trans1;
BSSY.RECONVERGENT B0, 0x180 ?trans4;
ISETP.GE.U32.AND P0, PT, R12, R14, PT ?WAIT13_END_GROUP;
@P0 BRA 0x170 &req={0} ?trans5;
IADD3 R9, PT, PT, R13, R14, RZ ?trans1;
LDG.E.64 R4, desc[UR6][R2.64] &wr=0x2 ?trans4;
IMAD.WIDE.U32 R8, R9, 0x10, R10 &req={3} ?WAIT6_END_GROUP;
LDG.E.64 R8, desc[UR6][R8.64] &wr=0x2 ?trans1;
MOV.64 R6, RZ ?trans2;
DADD R4, R4, R8 &req={2} &wr=0x0 ?trans4;
STG.E.128 desc[UR6][R2.64], R4 &req={0} &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R0, 0x3, PT ?trans1;
MOV R0, R14 ?WAIT12_END_GROUP;
@P0 BRA 0xc0 ?trans5;
EXIT ?trans5;
BRA 0x1d0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: __sum_inplace(HIP_vector_type<double, 2u>*)
_Z13__sum_inplaceP15HIP_vector_typeIdLj2EE:
s_load_b32 s2, s[0:1], 0x14
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lt_u32 s2, 2
s_cbranch_scc1 .LBB1_5
s_load_b64 s[0:1], s[0:1], 0x0
v_mov_b32_e32 v3, 0
v_mad_u64_u32 v[5:6], null, s15, s2, v[0:1]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mov_b32_e32 v6, v3
v_lshlrev_b64 v[1:2], 4, v[5:6]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v6, vcc_lo, s0, v1
v_add_co_ci_u32_e32 v7, vcc_lo, s1, v2, vcc_lo
.LBB1_2:
s_lshr_b32 s3, s2, 1
s_mov_b32 s4, exec_lo
v_cmpx_gt_u32_e64 s3, v0
s_cbranch_execz .LBB1_4
v_add_nc_u32_e32 v2, s3, v5
v_mov_b32_e32 v4, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 4, v[2:3]
v_add_co_u32 v1, vcc_lo, s0, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
s_clause 0x1
global_load_b64 v[8:9], v[6:7], off
global_load_b64 v[1:2], v[1:2], off
s_waitcnt vmcnt(0)
v_add_f64 v[1:2], v[8:9], v[1:2]
global_store_b128 v[6:7], v[1:4], off
.LBB1_4:
s_or_b32 exec_lo, exec_lo, s4
s_cmp_lt_u32 s2, 4
s_mov_b32 s2, s3
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB1_2
.LBB1_5:
s_endpgm
| __sum_inplace | 752 | 733 | stackv2-00000-of-00015 |
// Demangled: __sumcomplex(double2*, double2*)
Function : _Z12__sumcomplexP7double2S0_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R16, SR_TID.X &wr=0x1 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x3 ?trans8;
LDC.64 R8, c[0x0][0x388] &wr=0x4 ?trans1;
IMAD R17, R0, UR6, R16 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R17, 0x10, R2 &req={3} ?WAIT5_END_GROUP;
LDG.E.128 R4, desc[UR4][R2.64] &req={2} &wr=0x2 ?trans1;
ISETP.GE.U32.AND P0, PT, R0, 0x2, PT ?trans1;
IMAD.WIDE.U32 R8, R17, 0x10, R8 &req={4} ?WAIT5_END_GROUP;
STG.E.128 desc[UR4][R8.64], R4 &req={2} &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P0 EXIT &req={0} ?trans5;
LDC.64 R10, c[0x0][0x388] &wr=0x0 ?trans2;
SHF.R.U32.HI R18, RZ, 0x1, R0 ?trans1;
BSSY.RECONVERGENT B0, 0x200 ?trans4;
ISETP.GE.U32.AND P0, PT, R16, R18, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1f0 &req={2} ?trans5;
IADD3 R3, PT, PT, R17, R18, RZ ?trans1;
LDG.E.128 R4, desc[UR4][R8.64] &req={1} &wr=0x2 ?trans4;
IMAD.WIDE.U32 R2, R3, 0x10, R10 &req={0} ?WAIT5_END_GROUP;
LDG.E.128 R12, desc[UR4][R2.64] &wr=0x2 ?trans2;
DADD R4, R4, R12 &req={2} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R6, R6, R14 &wr=0x0 ?trans2;
STG.E.128 desc[UR4][R8.64], R4 &req={0} &rd=0x2 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R0, 0x3, PT ?trans1;
MOV R0, R18 ?WAIT12_END_GROUP;
@P0 BRA 0x100 ?trans5;
EXIT ?trans5;
BRA 0x250;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: __sumcomplex(HIP_vector_type<double, 2u>*, HIP_vector_type<double, 2u>*)
_Z12__sumcomplexP15HIP_vector_typeIdLj2EES1_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x1c
s_load_b128 s[0:3], s[0:1], 0x0
v_mov_b32_e32 v2, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[3:4], null, s15, s4, v[0:1]
v_mov_b32_e32 v4, v2
s_cmp_lt_u32 s4, 2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[4:5], 4, v[3:4]
v_add_co_u32 v6, vcc_lo, s0, v4
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
v_add_co_u32 v4, vcc_lo, s2, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
global_load_b128 v[6:9], v[6:7], off
s_waitcnt vmcnt(0)
global_store_b128 v[4:5], v[6:9], off
s_waitcnt_vscnt null, 0x0
s_barrier
.LBB0_1:
buffer_gl0_inv
s_cbranch_scc1 .LBB0_5
s_lshr_b32 s0, s4, 1
s_mov_b32 s1, exec_lo
v_cmpx_gt_u32_e64 s0, v0
s_cbranch_execz .LBB0_4
v_add_nc_u32_e32 v1, s0, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 4, v[1:2]
v_add_co_u32 v10, vcc_lo, s2, v6
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v11, vcc_lo, s3, v7, vcc_lo
s_clause 0x1
global_load_b128 v[6:9], v[4:5], off
global_load_b128 v[10:13], v[10:11], off
s_waitcnt vmcnt(0)
v_add_f64 v[6:7], v[6:7], v[10:11]
v_add_f64 v[8:9], v[8:9], v[12:13]
global_store_b128 v[4:5], v[6:9], off
.LBB0_4:
s_or_b32 exec_lo, exec_lo, s1
s_waitcnt_vscnt null, 0x0
s_barrier
s_cmp_lt_u32 s4, 4
s_mov_b32 s4, s0
s_branch .LBB0_1
.LBB0_5:
s_endpgm
| __sumcomplex | 924 | 851 | stackv2-00000-of-00015 |
// Demangled: angleKernel(int*, int*, int, double*, double*, double*, int)
Function : _Z11angleKernelPiS_iPdS0_S0_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR5, SR_CgaCtaId &wr=0x2 ?trans1;
UMOV UR4, 0x400 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans6;
LDC R3, c[0x0][0x360] &wr=0x4 ?trans8;
LDC R7, c[0x0][0x3b0] &wr=0x5 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={2} ?WAIT6_END_GROUP;
LEA R2, R0, UR4, 0x3 &req={1} ?WAIT5_END_GROUP;
IMAD R4, R3.reuse, 0x8, R2.reuse &req={4} ?trans1;
STS.64 [R2], RZ &rd=0x1 ?trans1;
IMAD R5, R3, 0x10, R2 ?trans1;
ISETP.GE.AND P0, PT, R7, 0x1, PT &req={5} ?trans2;
STS.64 [R4], RZ &rd=0x1 ?trans4;
STS.64 [R5], RZ &rd=0x1 ?trans7;
@!P0 BRA 0x1d10 &req={3,0} ?trans5;
S2UR UR4, SR_CTAID.X &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0xfe0 ?trans1;
MOV.64 R14, RZ ?trans2;
MOV.64 R20, RZ ?trans2;
MOV.64 R18, RZ ?trans2;
IMAD R8, R3, UR4, R0 &req={0} ?WAIT4_END_GROUP;
IMAD R8, R8, R7, RZ ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, R8.reuse, R7, RZ ?trans2;
IADD3 R6, PT, PT, R8, 0x1, RZ ?WAIT5_END_GROUP;
VIMNMX.S32 R7, R6, R7, !PT ?WAIT5_END_GROUP;
IADD3 R9, PT, PT, R8.reuse, -R7.reuse, RZ ?trans2;
IADD3 R6, PT, PT, -R8, R7, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P1, PT, R9, -0x8, PT ?trans1;
LOP3.LUT R7, R6, 0x7, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R7, RZ, PT ?WAIT7_END_GROUP;
@P1 BRA 0xfd0 ?trans6;
LOP3.LUT R9, R6, 0xfffffff8, RZ, 0xc0, !PT ?trans1;
MOV.64 R14, RZ ?WAIT3_END_GROUP;
IADD3 R9, PT, PT, -R9, RZ, RZ ?WAIT7_END_GROUP;
LDC.64 R16, c[0x0][0x380] &wr=0x0 ?trans8;
LDC.64 R12, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD.WIDE R16, R8, 0x4, R16 &req={0} ?WAIT5_END_GROUP;
LDG.E R35, desc[UR6][R16.64] &wr=0x3 ?trans1;
IMAD.WIDE R12, R8, 0x4, R12 &req={2} ?WAIT3_END_GROUP;
LDG.E R34, desc[UR6][R16.64+0x4] &wr=0x2 ?trans4;
LDG.E R37, desc[UR6][R12.64] &wr=0x4 ?trans4;
LDG.E R33, desc[UR6][R12.64+0x4] &wr=0x5 ?trans4;
LDG.E R31, desc[UR6][R16.64+0x8] &wr=0x2 ?trans4;
LDG.E R32, desc[UR6][R12.64+0x8] &wr=0x2 ?trans4;
LDG.E R29, desc[UR6][R16.64+0xc] &wr=0x2 ?trans4;
LDG.E R30, desc[UR6][R12.64+0xc] &wr=0x2 ?trans4;
LDG.E R27, desc[UR6][R16.64+0x10] &wr=0x2 ?trans4;
LDG.E R28, desc[UR6][R12.64+0x10] &wr=0x2 ?trans4;
LDG.E R11, desc[UR6][R16.64+0x14] &wr=0x2 ?trans4;
LDG.E R26, desc[UR6][R12.64+0x14] &wr=0x2 ?trans4;
LDG.E R10, desc[UR6][R16.64+0x18] &wr=0x2 ?trans4;
LDG.E R36, desc[UR6][R12.64+0x1c] &wr=0x2 ?trans1;
I2F.F64 R22, R35 &req={3} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R22, R22, R20 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64 R24, R37 &req={4} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R22, R24, R18 &req={0} &rd=0x0 &wr=0x3 ?trans2;
LDG.E R22, desc[UR6][R12.64+0x18] &req={0} &rd=0x0 &wr=0x4 ?trans4;
LDG.E R23, desc[UR6][R16.64+0x1c] &rd=0x1 &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64 R34, R34 &req={2} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R24, R24, R14 &rd=0x5 &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64 R24, R33 &req={5} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R34, R24, R18 &req={3} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64 R32, R32 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R24, R24, R14 &req={2} &rd=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64 R24, R31 &req={2} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R34, R34, R20 &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64 R12, R29 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R24, R24, R20 &req={2} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64 R16, R30 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R24, R32, R18 &wr=0x1 ?trans1;
IADD3 R9, PT, PT, R9, 0x8, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R9, RZ, PT ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R32, R32, R14 &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64 R36, R36 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R12, R12, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R12, R16, R18 &req={1} &rd=0x1 &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64 R12, R27 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R16, R16, R14 &req={2} &rd=0x1 &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64 R16, R28 &req={1} &wr=0x3 ?trans1;
IADD3 R8, PT, PT, R8, 0x8, RZ ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R12, R12, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R12, R16, R18 &req={3} &rd=0x1 &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64 R12, R11 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R16, R16, R14 &req={2} &rd=0x1 &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64 R16, R26 &req={1} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R12, R12, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R12, R16, R18 &req={3} &rd=0x1 &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64 R12, R10 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R16, R16, R14 &req={2} &rd=0x4 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64 R16, R22 &req={4} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R12, R12, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R12, R16, R18 &req={3} &rd=0x2 &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64 R12, R23 &req={2} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R16, R16, R14 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R12, R12, R20 &req={0} &rd=0x0 &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R12, R36, R18 &req={3} &rd=0x0 &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R36, R36, R14 &req={1} &rd=0x0 &wr=0x4 ?trans2;
@P1 BRA 0x230 &req={4,3,2,0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
BSSY.RECONVERGENT B0, 0x1ce0 ?trans4;
@!P0 BRA 0x1cd0 ?trans5;
ISETP.GE.U32.AND P0, PT, R7, 0x4, PT ?trans1;
LOP3.LUT R22, R6, 0x3, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B1, 0x1730 ?trans4;
ISETP.NE.AND P1, PT, R22, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x1720 ?trans6;
LDC.64 R26, c[0x0][0x380] &wr=0x0 ?trans8;
LDC.64 R24, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD.WIDE R26, R8, 0x4, R26 &req={0} ?WAIT5_END_GROUP;
LDG.E R28, desc[UR6][R26.64] &wr=0x3 ?trans1;
IMAD.WIDE R24, R8, 0x4, R24 &req={2} ?WAIT3_END_GROUP;
LDG.E R30, desc[UR6][R26.64+0x4] &wr=0x2 ?trans4;
LDG.E R29, desc[UR6][R24.64] &wr=0x4 ?trans4;
LDG.E R23, desc[UR6][R24.64+0x4] &wr=0x5 ?trans4;
LDG.E R11, desc[UR6][R26.64+0x8] &wr=0x2 ?trans4;
LDG.E R10, desc[UR6][R24.64+0x8] &wr=0x2 ?trans4;
LDG.E R7, desc[UR6][R26.64+0xc] &wr=0x2 ?trans4;
LDG.E R9, desc[UR6][R24.64+0xc] &wr=0x2 ?trans1;
IADD3 R8, PT, PT, R8, 0x4, RZ ?trans1;
I2F.F64 R12, R28 &req={3} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R12, R12, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64 R16, R29 &req={4} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R12, R16, R18 &req={3} &rd=0x2 &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64 R12, R30 &req={2} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R16, R16, R14 &rd=0x5 &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64 R16, R23 &req={5} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R12, R12, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R12, R16, R18 &req={3} &rd=0x3 &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64 R12, R11 &req={3} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R16, R16, R14 &req={2} &rd=0x2 &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64 R16, R10 &req={2} &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R12, R12, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R12, R16, R18 &req={4} &rd=0x2 &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64 R12, R7 &req={2} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R16, R16, R14 &req={3} &rd=0x2 &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64 R16, R9 &req={2} &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R12, R12, R20 &req={0} &rd=0x0 &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R12, R16, R18 &req={4} &rd=0x0 &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R16, R16, R14 &req={4,3,2} &rd=0x0 &wr=0x3 ?trans2;
BSYNC.RECONVERGENT B1 ?trans5;
@!P1 BRA 0x1cd0 ?trans5;
LDC.64 R10, c[0x0][0x380] &wr=0x2 ?trans1;
ISETP.NE.AND P0, PT, R22, 0x1, PT ?WAIT7_END_GROUP;
LDC.64 R12, c[0x0][0x388] &req={0} &wr=0x0 ?trans1;
LOP3.LUT R6, R6, 0x1, RZ, 0xc0, !PT ?WAIT7_END_GROUP;
LDC.64 R16, c[0x0][0x380] &wr=0x4 ?trans8;
LDC.64 R22, c[0x0][0x388] &wr=0x5 ?trans1;
@P0 IMAD.WIDE R10, R8, 0x4, R10 &req={2} ?trans1;
ISETP.NE.U32.AND P1, PT, R6, 0x1, PT ?WAIT4_END_GROUP;
@P0 LDG.E R24, desc[UR6][R10.64] &wr=0x2 ?trans4;
@P0 LDG.E R26, desc[UR6][R10.64+0x4] &req={3} &rd=0x2 &wr=0x3 ?trans1;
@P0 IMAD.WIDE R12, R8.reuse, 0x4, R12 &req={0} ?trans1;
@P0 IADD3 R8, PT, PT, R8, 0x2, RZ ?WAIT4_END_GROUP;
@P0 LDG.E R25, desc[UR6][R12.64] &wr=0x3 ?trans1;
@!P1 IMAD.WIDE R6, R8, 0x4, R16 &req={4} ?WAIT3_END_GROUP;
@P0 LDG.E R27, desc[UR6][R12.64+0x4] &rd=0x0 &wr=0x4 ?trans1;
@!P1 IMAD.WIDE R8, R8, 0x4, R22 &req={5} ?WAIT3_END_GROUP;
@!P1 LDG.E R6, desc[UR6][R6.64] &wr=0x5 ?trans4;
@!P1 LDG.E R8, desc[UR6][R8.64] &wr=0x3 ?trans1;
@P0 I2F.F64 R10, R24 &req={2} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@P0 DFMA R16, R10, R10, R20 &req={2} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@P0 I2F.F64 R22, R26 &req={3} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@P0 DFMA R20, R22, R22, R16 &req={2} &rd=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@P0 I2F.F64 R12, R25 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@P0 DFMA R10, R10, R12, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@P0 I2F.F64 R16, R27 &req={4} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@P0 DFMA R12, R12, R12, R14 &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 I2F.F64 R6, R6 &req={5} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@P0 DFMA R18, R22, R16, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 I2F.F64 R8, R8 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@P0 DFMA R14, R16, R16, R12 &req={2} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 DFMA R20, R6, R6, R20 &req={3} &rd=0x4 &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 DFMA R18, R6, R8, R18 &req={0} &rd=0x4 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 DFMA R14, R8, R8, R14 &req={3,2,0} &rd=0x4 &wr=0x2 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
STS.64 [R2], R18 &rd=0x0 ?trans4;
STS.64 [R4], R20 &rd=0x0 ?trans4;
STS.64 [R5], R14 &req={3,2} &rd=0x0 ?trans2;
ISETP.GE.U32.AND P0, PT, R3, 0x2, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1f20 ?trans5;
MOV R6, R3 &req={4} ?WAIT7_END_GROUP;
SHF.R.U32.HI R17, RZ, 0x1, R6 &req={0} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P1, PT, R6, 0x3, PT ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, R17, PT ?trans2;
BSSY.RECONVERGENT B0, 0x1f00 ?trans11;
@P0 BRA 0x1ef0 ?trans5;
IMAD R14, R17, 0x8, R2 ?trans1;
LDS.64 R8, [R2] ?trans3;
IMAD R15, R3.reuse, 0x8, R14.reuse ?trans1;
LDS.64 R6, [R14] &wr=0x0 ?trans1;
IMAD R16, R3, 0x10, R14 ?trans1;
DADD R6, R6, R8 &req={0} &wr=0x0 ?trans2;
STS.64 [R2], R6 &req={0} ?trans4;
LDS.64 R8, [R15] ?trans4;
LDS.64 R10, [R4] &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT9_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, R8, R10 &req={0} &wr=0x0 ?trans2;
STS.64 [R4], R8 &req={0} ?trans4;
LDS.64 R10, [R16] ?trans4;
LDS.64 R12, [R5] &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT9_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, R10, R12 &req={0} &wr=0x0 ?trans2;
STS.64 [R5], R10 &req={0} &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
MOV R6, R17 ?trans1;
@P1 BRA 0x1d40 ?trans6;
ISETP.NE.AND P0, PT, R0, RZ, PT ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDC.64 R6, c[0x0][0x398] &req={4} &wr=0x2 ?trans2;
LDG.E.64 R8, desc[UR6][R6.64] &req={2} &rd=0x2 &wr=0x5 ?trans6;
S2UR UR5, SR_CgaCtaId &wr=0x3 ?trans1;
UMOV UR4, 0x400 ?trans1;
BSSY B0, 0x2020 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={3} ?WAIT9_END_GROUP;
LDS.64 R4, [UR4] &req={2,1,0} &wr=0x0 ?trans3;
DADD R10, R4, R8 &req={5,0} &wr=0x0 ?trans1;
YIELD ?trans5;
ATOMG.E.CAS.64.STRONG.GPU PT, R10, [R6], R8, R10 &req={0} &wr=0x2 ?trans2;
ISETP.NE.S64.AND P0, PT, R8, R10.reuse, PT &req={2} ?trans2;
MOV.64 R8, R10 ?WAIT12_END_GROUP;
@P0 BRA 0x1fb0 ?trans5;
BSYNC B0 ?trans5;
LDC.64 R6, c[0x0][0x3a0] &wr=0x0 ?trans2;
LDG.E.64 R8, desc[UR6][R6.64] &req={0} &rd=0x0 &wr=0x5 ?trans1;
LEA R0, R3, UR4, 0x3 ?trans1;
BSSY B0, 0x20e0 ?trans4;
LDS.64 R4, [R0] &rd=0x0 &wr=0x1 ?trans2;
DADD R10, R4, R8 &req={5,1} &wr=0x1 ?trans1;
YIELD ?trans5;
ATOMG.E.CAS.64.STRONG.GPU PT, R10, [R6], R8, R10 &req={1} &wr=0x2 ?trans2;
ISETP.NE.S64.AND P0, PT, R8, R10.reuse, PT &req={2} ?trans2;
MOV.64 R8, R10 ?WAIT12_END_GROUP;
@P0 BRA 0x2070 ?trans5;
BSYNC B0 ?trans5;
LDC.64 R4, c[0x0][0x3a8] &wr=0x1 ?trans2;
LDG.E.64 R8, desc[UR6][R4.64] &req={1} &rd=0x1 &wr=0x5 ?trans1;
IMAD R3, R3, 0x8, R0 ?WAIT6_END_GROUP;
LDS.64 R2, [R3] &wr=0x2 ?trans2;
DADD R10, R2, R8 &req={5,2} &wr=0x2 ?trans1;
YIELD ?trans5;
ATOMG.E.CAS.64.STRONG.GPU PT, R10, [R4], R8, R10 &req={2} &wr=0x2 ?trans2;
ISETP.NE.S64.AND P0, PT, R8, R10.reuse, PT &req={2} ?trans2;
MOV.64 R8, R10 ?WAIT12_END_GROUP;
@P0 BRA 0x2120 ?trans5;
EXIT ?trans5;
BRA 0x2190;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: angleKernel(int*, int*, int, double*, double*, double*, int)
_Z11angleKernelPiS_iPdS0_S0_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x44
s_load_b32 s2, s[0:1], 0x30
s_mov_b32 s4, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
s_mov_b32 s5, s4
v_lshlrev_b32_e32 v3, 3, v0
v_dual_mov_b32 v1, s4 :: v_dual_mov_b32 v2, s5
v_add_nc_u32_e32 v8, 0, v3
ds_store_b64 v8, v[1:2]
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b32 s5, s3, 3
s_add_i32 s6, s5, 0
s_cmp_lt_i32 s2, 1
v_add_nc_u32_e32 v7, s6, v3
v_add3_u32 v6, s6, s5, v3
ds_store_b64 v7, v[1:2]
ds_store_b64 v6, v[1:2]
s_cbranch_scc1 .LBB0_4
v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
s_load_b128 s[8:11], s[0:1], 0x0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v1, v1, s2
v_ashrrev_i32_e32 v2, 31, v1
v_add_nc_u32_e32 v9, s2, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[4:5], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s8, v4
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s9, v5, vcc_lo
v_add_co_u32 v4, vcc_lo, s10, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s11, v5, vcc_lo
.LBB0_2:
global_load_b32 v10, v[2:3], off
global_load_b32 v12, v[4:5], off
ds_load_b64 v[14:15], v8
v_add_nc_u32_e32 v1, 1, v1
v_add_co_u32 v2, vcc_lo, v2, 4
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_ge_i32_e32 vcc_lo, v1, v9
v_add_co_u32 v4, s2, v4, 4
v_add_co_ci_u32_e64 v5, s2, 0, v5, s2
s_or_b32 s4, vcc_lo, s4
s_waitcnt vmcnt(1)
v_cvt_f64_i32_e32 v[10:11], v10
s_waitcnt vmcnt(0)
v_cvt_f64_i32_e32 v[12:13], v12
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_fma_f64 v[14:15], v[10:11], v[12:13], v[14:15]
ds_store_b64 v8, v[14:15]
ds_load_b64 v[14:15], v7
s_waitcnt lgkmcnt(0)
v_fma_f64 v[10:11], v[10:11], v[10:11], v[14:15]
ds_store_b64 v7, v[10:11]
ds_load_b64 v[10:11], v6
s_waitcnt lgkmcnt(0)
v_fma_f64 v[10:11], v[12:13], v[12:13], v[10:11]
ds_store_b64 v6, v[10:11]
s_and_not1_b32 exec_lo, exec_lo, s4
s_cbranch_execnz .LBB0_2
s_or_b32 exec_lo, exec_lo, s4
.LBB0_4:
s_cmp_lt_u32 s3, 2
s_cbranch_scc1 .LBB0_8
.LBB0_5:
s_lshr_b32 s2, s3, 1
s_mov_b32 s4, exec_lo
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmpx_gt_u32_e64 s2, v0
s_cbranch_execz .LBB0_7
s_lshl_b32 s5, s2, 3
s_delay_alu instid0(SALU_CYCLE_1)
v_add_nc_u32_e32 v1, s5, v8
ds_load_b64 v[1:2], v1
ds_load_b64 v[3:4], v8
s_waitcnt lgkmcnt(0)
v_add_f64 v[1:2], v[1:2], v[3:4]
v_add_nc_u32_e32 v3, s5, v7
ds_store_b64 v8, v[1:2]
ds_load_b64 v[1:2], v3
ds_load_b64 v[3:4], v7
s_waitcnt lgkmcnt(0)
v_add_f64 v[1:2], v[1:2], v[3:4]
v_add_nc_u32_e32 v3, s5, v6
ds_store_b64 v7, v[1:2]
ds_load_b64 v[1:2], v3
ds_load_b64 v[3:4], v6
s_waitcnt lgkmcnt(0)
v_add_f64 v[1:2], v[1:2], v[3:4]
ds_store_b64 v6, v[1:2]
.LBB0_7:
s_or_b32 exec_lo, exec_lo, s4
s_cmp_gt_u32 s3, 3
s_mov_b32 s3, s2
s_cbranch_scc1 .LBB0_5
.LBB0_8:
s_mov_b32 s2, 0
s_mov_b32 s3, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB0_15
s_load_b128 s[4:7], s[0:1], 0x18
v_mov_b32_e32 v9, 0
s_load_b64 s[0:1], s[0:1], 0x28
ds_load_b64 v[4:5], v8
s_waitcnt lgkmcnt(0)
global_load_b64 v[2:3], v9, s[4:5]
.LBB0_10:
s_waitcnt vmcnt(0)
v_add_f64 v[0:1], v[4:5], v[2:3]
global_atomic_cmpswap_b64 v[0:1], v9, v[0:3], s[4:5] glc
s_waitcnt vmcnt(0)
v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[0:1]
v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
s_or_b32 s2, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB0_10
s_or_b32 exec_lo, exec_lo, s2
v_mov_b32_e32 v8, 0
ds_load_b64 v[4:5], v7
s_mov_b32 s2, 0
global_load_b64 v[2:3], v8, s[6:7]
.LBB0_12:
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_f64 v[0:1], v[4:5], v[2:3]
global_atomic_cmpswap_b64 v[0:1], v8, v[0:3], s[6:7] glc
s_waitcnt vmcnt(0)
v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[0:1]
v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
s_or_b32 s2, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB0_12
s_or_b32 exec_lo, exec_lo, s2
v_mov_b32_e32 v7, 0
ds_load_b64 v[4:5], v6
s_mov_b32 s2, 0
global_load_b64 v[2:3], v7, s[0:1]
.LBB0_14:
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_f64 v[0:1], v[4:5], v[2:3]
global_atomic_cmpswap_b64 v[0:1], v7, v[0:3], s[0:1] glc
s_waitcnt vmcnt(0)
v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[0:1]
v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
s_or_b32 s2, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB0_14
.LBB0_15:
s_endpgm
| angleKernel | 9,283 | 2,635 | stackv2-00000-of-00015 |
// Demangled: MatrixMulTiled(int*, int*, int*, int)
Function : _Z14MatrixMulTiledPiS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x398] &wr=0x1 ?trans1;
S2R R29, SR_CTAID.Y &wr=0x2 ?trans6;
LDC.64 R30, c[0x0][0x380] &wr=0x3 ?trans1;
HFMA2 R17, -RZ, RZ, 0, 0 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x4 ?trans1;
S2R R23, SR_TID.Y &wr=0x2 ?trans1;
S2R R2, SR_CTAID.X &wr=0x5 ?trans1;
S2R R25, SR_TID.X &wr=0x5 ?trans1;
MOV R6, UR4 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R6, 0x20, PT ?trans1;
LEA R29, R29, R23, 0x5 &req={2} ?trans2;
LEA R27, R2, R25, 0x5 &req={5} ?WAIT10_END_GROUP;
@!P0 BRA 0x7e0 &req={4} ?trans5;
S2UR UR6, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
SHF.R.S32.HI R3, RZ, 0x1f, R6 ?trans1;
UIADD3 UR5, UPT, UPT, UR4, 0x1000, URZ ?trans1;
IMAD R21, R23, R6.reuse, R25.reuse ?trans1;
MOV R17, RZ ?trans1;
LEA.HI R3, R3, R6.reuse, RZ, 0x5 ?trans1;
IMAD R7, R29, R6, R25 ?trans1;
LDC R0, c[0x0][0x398] &wr=0x2 ?trans1;
LEA R21, R2, R21, 0x5 ?trans2;
SHF.R.S32.HI R20, RZ, 0x5, R3 ?WAIT4_END_GROUP;
IADD3 R20, PT, PT, -R20, RZ, RZ ?trans1;
ULEA UR4, UR6, UR4, 0x18 &req={1} ?trans1;
ULEA UR5, UR6, UR5, 0x18 ?WAIT5_END_GROUP;
LEA R2, R23, UR4, 0x7 ?trans2;
LEA R3, R25.reuse, UR5, 0x2 ?trans2;
LEA R4, R25, R2, 0x2 ?trans2;
LEA R5, R23, R3, 0x7 ?WAIT7_END_GROUP;
MOV R6, R0 &req={2} ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R25, R6.reuse, PT ?trans1;
ISETP.GE.U32.AND P0, PT, R27, R6, PT ?WAIT4_END_GROUP;
ISETP.GE.U32.OR P1, PT, R29, R6.reuse, P1 ?trans1;
ISETP.GE.OR P0, PT, R23, R6, P0 ?WAIT12_END_GROUP;
@!P1 LDC.64 R12, c[0x0][0x388] &wr=0x1 ?trans8;
@!P0 LDC.64 R18, c[0x0][0x390] &wr=0x2 ?trans1;
@!P1 IMAD.WIDE R12, R7, 0x4, R12 &req={1} ?WAIT5_END_GROUP;
@!P1 LDG.E R33, desc[UR8][R12.64] &wr=0x4 ?trans1;
@!P0 IMAD.WIDE.U32 R18, R21, 0x4, R18 &req={2} ?WAIT6_END_GROUP;
@!P0 LDG.E R18, desc[UR8][R18.64] &wr=0x2 ?trans1;
IADD3 R20, PT, PT, R20, 0x1, RZ ?trans2;
IADD3 R25, PT, PT, R25, 0x20, RZ ?trans2;
IADD3 R23, PT, PT, R23, 0x20, RZ ?trans2;
IADD3 R7, PT, PT, R7, 0x20, RZ ?trans2;
LEA R21, R6, R21, 0x5 ?trans1;
@!P1 STS [R4], R33 &req={4} ?trans4;
@!P0 STS [R5], R18 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R16, [R3] ?trans4;
LDS.128 R8, [R2] &wr=0x1 ?trans4;
LDS R22, [R3+0x80] &wr=0x2 ?trans4;
LDS R28, [R3+0x100] &wr=0x4 ?trans4;
LDS R26, [R3+0x180] &wr=0x5 ?trans4;
LDS R37, [R3+0x200] ?trans4;
LDS.128 R12, [R2+0x10] &wr=0x3 ?trans4;
LDS R24, [R3+0x280] &wr=0x0 ?trans4;
LDS R35, [R3+0x300] &wr=0x0 ?trans4;
LDS R33, [R3+0x400] ?trans1;
IMAD R8, R8, R16, R17 &req={1} ?WAIT3_END_GROUP;
LDS.128 R16, [R2+0x20] ?trans1;
IMAD R9, R22, R9, R8 &req={2} ?WAIT3_END_GROUP;
LDS R22, [R3+0x380] &wr=0x1 ?trans1;
IMAD R9, R28, R10, R9 &req={4} ?WAIT3_END_GROUP;
LDS R28, [R3+0x480] &wr=0x2 ?trans1;
IMAD R9, R26, R11, R9 &req={5} ?WAIT3_END_GROUP;
LDS R26, [R3+0x680] ?trans1;
IMAD R9, R12, R37, R9 &req={3} ?WAIT3_END_GROUP;
LDS R12, [R3+0x500] &wr=0x3 ?trans1;
IMAD R9, R24, R13, R9 &req={0} ?WAIT3_END_GROUP;
LDS R24, [R3+0x580] &wr=0x0 ?trans1;
IMAD R14, R35, R14, R9 ?WAIT3_END_GROUP;
LDS R37, [R3+0x600] ?trans4;
LDS.128 R8, [R2+0x30] &wr=0x4 ?trans4;
LDS R35, [R3+0x700] &wr=0x5 ?trans1;
IMAD R14, R22, R15, R14 &req={1} ?WAIT3_END_GROUP;
LDS R22, [R3+0x780] &wr=0x1 ?trans1;
IMAD R14, R16, R33, R14 ?WAIT3_END_GROUP;
LDS R33, [R3+0x800] ?trans1;
IMAD R17, R28, R17, R14 &req={2} ?WAIT3_END_GROUP;
LDS R28, [R3+0x880] ?trans1;
IMAD R17, R12, R18, R17 &req={3} ?WAIT3_END_GROUP;
LDS.128 R12, [R2+0x40] &wr=0x2 ?trans1;
IMAD R17, R24, R19, R17 &req={0} ?WAIT3_END_GROUP;
LDS R24, [R3+0x980] ?trans1;
IMAD R17, R8, R37, R17 &req={4} ?WAIT3_END_GROUP;
LDS R8, [R3+0x900] &wr=0x0 ?trans1;
IMAD R9, R26, R9, R17 ?WAIT3_END_GROUP;
LDS R37, [R3+0xa00] ?trans4;
LDS.128 R16, [R2+0x50] &wr=0x3 ?trans4;
LDS R26, [R3+0xa80] &wr=0x4 ?trans1;
IMAD R9, R35, R10, R9 &req={5} ?WAIT3_END_GROUP;
LDS R35, [R3+0xb00] &wr=0x5 ?trans1;
IMAD R9, R22, R11, R9 &req={1} ?WAIT3_END_GROUP;
LDS R22, [R3+0xb80] &wr=0x1 ?trans1;
IMAD R9, R12, R33, R9 &req={2} ?WAIT3_END_GROUP;
LDS R33, [R3+0xc00] ?trans1;
IMAD R9, R28, R13, R9 ?WAIT4_END_GROUP;
IMAD R14, R8, R14, R9 &req={0} ?trans2;
LDS.128 R8, [R2+0x60] &wr=0x0 ?trans2;
IMAD R14, R24, R15, R14 ?trans2;
LDS R24, [R3+0xc80] &wr=0x2 ?trans2;
IMAD R14, R16, R37, R14 &req={3} ?trans2;
LDS R37, [R3+0xd00] &wr=0x3 ?trans2;
IMAD R14, R26, R17, R14 &req={4} ?WAIT2_END_GROUP;
LDS R16, [R3+0xd80] &wr=0x4 ?trans2;
IMAD R28, R35, R18, R14 &req={5} ?trans2;
LDS R35, [R3+0xe00] ?trans4;
LDS.128 R12, [R2+0x70] &wr=0x5 ?trans4;
LDS R26, [R3+0xe80] &wr=0x5 ?trans4;
LDS R17, [R3+0xf00] &wr=0x5 ?trans4;
LDS R18, [R3+0xf80] &wr=0x5 ?trans1;
IMAD R19, R22, R19, R28 &req={1} ?WAIT4_END_GROUP;
IMAD R8, R8, R33, R19 &req={0} ?WAIT4_END_GROUP;
IMAD R8, R24, R9, R8 &req={2} ?WAIT4_END_GROUP;
IMAD R8, R37, R10, R8 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.NE.AND P0, PT, R20, RZ, PT ?trans2;
IMAD R8, R16, R11, R8 &req={4} ?WAIT4_END_GROUP;
IMAD R8, R12, R35, R8 &req={5} ?WAIT4_END_GROUP;
IMAD R8, R26, R13, R8 ?WAIT4_END_GROUP;
IMAD R17, R17, R14, R8 ?WAIT4_END_GROUP;
IMAD R17, R18, R15, R17 ?trans1;
@P0 BRA 0x200 ?trans6;
IMAD R27, R29, R6, R27 ?WAIT4_END_GROUP;
IMAD.WIDE R30, R27, 0x4, R30 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR8][R30.64], R17 ?trans1;
EXIT ?trans5;
BRA 0x820;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: MatrixMulTiled(int*, int*, int*, int)
_Z14MatrixMulTiledPiS_S_i:
s_clause 0x2
s_load_b32 s8, s[0:1], 0x18
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x10
v_bfe_u32 v2, v0, 10, 10
v_and_b32_e32 v4, 0x3ff, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshl_add_u32 v5, s15, 5, v2
s_waitcnt lgkmcnt(0)
v_mul_lo_u32 v3, v5, s8
s_cmp_gt_i32 s8, 31
s_cbranch_scc1 .LBB1_2
v_mul_lo_u32 v6, v5, s8
s_mov_b32 s0, 0
s_mov_b32 s1, 0
s_branch .LBB1_3
.LBB1_2:
s_mov_b32 s0, -1
.LBB1_3:
v_lshl_add_u32 v0, s14, 5, v4
v_mov_b32_e32 v1, s1
s_and_not1_b32 vcc_lo, exec_lo, s0
s_cbranch_vccnz .LBB1_13
v_lshlrev_b32_e32 v1, 2, v4
v_cmp_gt_i32_e32 vcc_lo, s8, v5
v_lshlrev_b32_e32 v5, 7, v2
s_ashr_i32 s0, s8, 31
s_mov_b32 s10, 0
v_or_b32_e32 v6, 0x1000, v1
s_lshr_b32 s1, s0, 27
v_cmp_gt_i32_e64 s0, s8, v0
v_add_nc_u32_e32 v7, v5, v1
s_add_i32 s1, s8, s1
v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v8, v6, v5
s_ashr_i32 s9, s1, 5
.LBB1_5:
s_lshl_b32 s11, s10, 5
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v9, s11, v4
v_cmp_gt_i32_e64 s1, s8, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s1, vcc_lo, s1
s_and_saveexec_b32 s12, s1
s_cbranch_execz .LBB1_7
v_add_nc_u32_e32 v9, v9, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v10, 31, v9
v_lshlrev_b64 v[9:10], 2, v[9:10]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v9, s1, s6, v9
v_add_co_ci_u32_e64 v10, s1, s7, v10, s1
global_load_b32 v9, v[9:10], off
s_waitcnt vmcnt(0)
ds_store_b32 v7, v9
.LBB1_7:
s_or_b32 exec_lo, exec_lo, s12
v_add_nc_u32_e32 v9, s11, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_gt_i32_e64 s1, s8, v9
s_and_b32 s1, s1, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s11, s1
s_cbranch_execz .LBB1_9
v_mad_u64_u32 v[10:11], null, v9, s8, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v11, 31, v10
v_lshlrev_b64 v[9:10], 2, v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v9, s1, s2, v9
v_add_co_ci_u32_e64 v10, s1, s3, v10, s1
global_load_b32 v9, v[9:10], off
s_waitcnt vmcnt(0)
ds_store_b32 v8, v9
.LBB1_9:
s_or_b32 exec_lo, exec_lo, s11
v_mov_b32_e32 v9, v6
s_mov_b32 s1, 0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB1_10:
v_add_nc_u32_e32 v10, s1, v5
s_add_i32 s1, s1, 4
ds_load_b32 v12, v9
ds_load_b32 v13, v10
v_add_nc_u32_e32 v9, 0x80, v9
s_cmpk_eq_i32 s1, 0x80
s_waitcnt lgkmcnt(0)
v_mad_u64_u32 v[10:11], null, v12, v13, v[1:2]
s_delay_alu instid0(VALU_DEP_1)
v_mov_b32_e32 v1, v10
s_cbranch_scc0 .LBB1_10
s_add_i32 s10, s10, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s10, s9
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB1_5
v_mov_b32_e32 v6, v3
.LBB1_13:
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v2, v6, v0
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[2:3]
v_add_co_u32 v2, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
global_store_b32 v[2:3], v1, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| MatrixMulTiled | 3,236 | 1,910 | stackv2-00000-of-00015 |
// Demangled: MatrixMulTiledMod(int*, int*, int*, int)
Function : _Z17MatrixMulTiledModPiS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R17, SR_TID.Y &wr=0x1 ?trans7;
S2UR UR7, SR_CgaCtaId &wr=0x2 ?trans1;
UMOV UR4, 0x400 ?trans1;
LDCU UR8, c[0x0][0x398] &wr=0x3 ?trans1;
S2R R19, SR_TID.X &wr=0x4 ?trans1;
UIADD3 UR5, UPT, UPT, UR4, 0x1000, URZ ?trans1;
S2R R24, SR_CTAID.Y &wr=0x5 ?trans1;
UIADD3 UR6, UPT, UPT, UR4, 0x2000, URZ ?trans1;
S2R R2, SR_CTAID.X &wr=0x0 ?trans1;
MOV R0, UR8 &req={3} ?trans1;
ULEA UR4, UR7, UR4, 0x18 &req={2} ?trans1;
ULEA UR5, UR7, UR5, 0x18 ?trans1;
ULEA UR6, UR7, UR6, 0x18 ?WAIT4_END_GROUP;
LEA R22, R17.reuse, UR4, 0x7 &req={1} ?trans2;
LEA R20, R17.reuse, UR5, 0x7 ?trans2;
LEA R18, R17, UR6, 0x7 ?trans2;
LEA R21, R19.reuse, R22, 0x2 &req={4} ?trans2;
LEA R20, R19.reuse, R20, 0x2 ?trans2;
LEA R18, R19, R18, 0x2 ?trans1;
STS [R21], RZ &rd=0x1 ?trans1;
LEA R24, R24, R17, 0x5 &req={5} ?WAIT2_END_GROUP;
LEA R23, R2, R19, 0x6 &req={0} ?trans1;
STS [R20], RZ &rd=0x1 ?trans4;
STS [R18], RZ &rd=0x1 ?trans1;
VIMNMX.S32 R3, R24, R23, !PT ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans4;
ISETP.GE.AND P0, PT, R3, R0, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={1} ?trans5;
LDC.64 R26, c[0x0][0x380] &wr=0x0 ?trans1;
ISETP.GE.U32.AND P0, PT, R0, 0x20, PT ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x1 ?trans1;
HFMA2 R25, -RZ, RZ, 0, 0 ?trans1;
MOV R33, RZ ?WAIT10_END_GROUP;
@!P0 BRA 0xd00 ?trans5;
LDC R4, c[0x0][0x398] &wr=0x2 ?trans1;
IMAD R5, R17, R0.reuse, R19.reuse ?trans1;
LEA R7, R19.reuse, UR5, 0x2 ?trans1;
IMAD R16, R0, R0.reuse, RZ ?trans1;
LEA R6, R19, UR6, 0x2 ?trans1;
IMAD R3, R24, R0, R19 ?trans1;
LEA R5, R2, R5, 0x6 ?trans2;
LDC.64 R28, c[0x0][0x388] &wr=0x3 ?trans1;
SHF.R.U32.HI R2, RZ, 0x5, R0 ?trans1;
MOV R33, RZ ?trans1;
MOV R25, RZ ?WAIT2_END_GROUP;
IADD3 R2, PT, PT, -R2, RZ, RZ ?WAIT7_END_GROUP;
MOV R0, R4 &req={2} ?trans1;
IADD3 R15, PT, PT, R5, 0x20, RZ ?trans1;
IMAD.WIDE R10, R3, 0x4, R28 &req={3} ?WAIT3_END_GROUP;
ISETP.GE.AND P1, PT, R17, R0, PT ?trans1;
ISETP.GE.AND P2, PT, R15, R16, PT ?trans1;
ISETP.GE.AND P0, PT, R19, R0, PT ?WAIT11_END_GROUP;
@!P1 LDC.64 R12, c[0x0][0x390] &wr=0x2 ?trans2;
@!P0 LDG.E R10, desc[UR8][R10.64] &req={1} &wr=0x3 ?trans6;
@!P2 LDC.64 R8, c[0x0][0x390] &wr=0x1 ?trans1;
@!P1 IMAD.WIDE.U32 R30, R5, 0x4, R12 &req={2} ?WAIT6_END_GROUP;
@!P1 LDG.E R31, desc[UR8][R30.64] &wr=0x2 ?trans1;
@!P2 IMAD.WIDE R8, R15, 0x4, R8 &req={1} ?WAIT5_END_GROUP;
@!P2 LDG.E R35, desc[UR8][R8.64] &wr=0x4 ?trans4;
@!P0 STS [R21], R10 &req={3} ?trans4;
@!P1 STS [R20], R31 &req={2} ?trans4;
@!P2 STS [R18], R35 &req={4} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS.128 R12, [R22] ?trans4;
LDS R36, [R6] &wr=0x1 ?trans4;
LDS R34, [R7] &wr=0x2 ?trans4;
LDS R8, [R6+0x80] &wr=0x3 ?trans4;
LDS R37, [R7+0x80] &wr=0x4 ?trans4;
LDS R11, [R7+0x100] &wr=0x5 ?trans4;
LDS R9, [R6+0x100] &wr=0x0 ?trans4;
LDS R32, [R7+0x180] &wr=0x0 ?trans4;
LDS R30, [R6+0x180] &wr=0x0 ?trans1;
IMAD R36, R12, R36, R33 &req={1} ?WAIT2_END_GROUP;
IMAD R34, R12, R34, R25 &req={2} ?trans2;
LDS R25, [R6+0x200] ?trans1;
IMAD R8, R8, R13, R36 &req={3} ?WAIT3_END_GROUP;
LDS R12, [R6+0x280] ?trans1;
IMAD R34, R37, R13, R34 &req={4} ?WAIT3_END_GROUP;
LDS R13, [R7+0x200] ?trans1;
IMAD R34, R11, R14.reuse, R34 &req={5} ?trans2;
IMAD R31, R9, R14, R8 &req={0} ?trans2;
LDS.128 R8, [R22+0x10] &wr=0x0 ?trans4;
LDS R14, [R7+0x280] &wr=0x1 ?trans1;
IMAD R34, R32, R15, R34 ?WAIT2_END_GROUP;
IMAD R33, R30, R15, R31 ?trans1;
LDS R32, [R7+0x380] ?trans4;
LDS R31, [R7+0x300] &wr=0x2 ?trans4;
LDS R15, [R6+0x300] &wr=0x3 ?trans4;
LDS R30, [R6+0x380] &wr=0x4 ?trans1;
IMAD R13, R8, R13, R34 &req={0} ?WAIT2_END_GROUP;
IMAD R25, R8, R25, R33 ?trans2;
IMAD R13, R14, R9.reuse, R13 &req={1} ?trans1;
LDS R8, [R6+0x480] ?trans1;
IMAD R12, R12, R9, R25 ?WAIT3_END_GROUP;
LDS R9, [R7+0x400] ?trans1;
IMAD R31, R31, R10, R13 &req={2} ?WAIT3_END_GROUP;
LDS R25, [R6+0x400] ?trans1;
IMAD R33, R15, R10, R12 &req={3} ?WAIT3_END_GROUP;
LDS.128 R12, [R22+0x20] &wr=0x0 ?trans4;
LDS R10, [R7+0x480] &wr=0x1 ?trans1;
IMAD R34, R32, R11.reuse, R31 ?trans2;
IMAD R33, R30, R11, R33 &req={4} ?trans1;
LDS R31, [R7+0x500] &wr=0x2 ?trans4;
LDS R11, [R6+0x500] &wr=0x3 ?trans4;
LDS R32, [R7+0x580] &wr=0x4 ?trans4;
LDS R30, [R6+0x580] &wr=0x5 ?trans1;
IMAD R9, R12, R9, R34 &req={0} ?WAIT2_END_GROUP;
IMAD R25, R12, R25, R33 ?trans2;
IMAD R9, R10, R13.reuse, R9 &req={1} ?trans1;
LDS R12, [R6+0x680] ?trans1;
IMAD R8, R8, R13, R25 ?trans2;
IMAD R31, R31, R14.reuse, R9 &req={2} ?trans1;
LDS R13, [R7+0x600] ?trans1;
IMAD R33, R11, R14, R8 &req={3} ?WAIT3_END_GROUP;
LDS R25, [R6+0x600] ?trans4;
LDS.128 R8, [R22+0x30] &wr=0x0 ?trans4;
LDS R14, [R7+0x680] &wr=0x1 ?trans1;
IMAD R34, R32, R15.reuse, R31 &req={4} ?trans2;
IMAD R33, R30, R15, R33 &req={5} ?trans1;
LDS R31, [R7+0x700] &wr=0x2 ?trans4;
LDS R15, [R6+0x700] &wr=0x3 ?trans4;
LDS R32, [R7+0x780] &wr=0x4 ?trans4;
LDS R30, [R6+0x780] &wr=0x5 ?trans1;
IMAD R13, R8, R13, R34 &req={0} ?WAIT2_END_GROUP;
IMAD R25, R8, R25, R33 ?trans2;
IMAD R13, R14, R9.reuse, R13 &req={1} ?trans1;
LDS R8, [R6+0x880] ?trans1;
IMAD R12, R12, R9, R25 ?trans2;
IMAD R31, R31, R10.reuse, R13 &req={2} ?trans1;
LDS R9, [R7+0x800] ?trans1;
IMAD R33, R15, R10, R12 &req={3} ?WAIT3_END_GROUP;
LDS R25, [R6+0x800] ?trans4;
LDS.128 R12, [R22+0x40] &wr=0x0 ?trans4;
LDS R10, [R7+0x880] &wr=0x1 ?trans1;
IMAD R34, R32, R11.reuse, R31 &req={4} ?trans2;
IMAD R33, R30, R11, R33 &req={5} ?trans1;
LDS R31, [R7+0x900] &wr=0x2 ?trans4;
LDS R11, [R6+0x900] &wr=0x3 ?trans4;
LDS R32, [R7+0x980] &wr=0x4 ?trans4;
LDS R30, [R6+0x980] &wr=0x5 ?trans1;
IMAD R9, R12, R9, R34 &req={0} ?WAIT2_END_GROUP;
IMAD R25, R12, R25, R33 ?trans2;
IMAD R9, R10, R13.reuse, R9 &req={1} ?trans1;
LDS R12, [R6+0xa80] ?trans1;
IMAD R8, R8, R13, R25 ?trans2;
IMAD R31, R31, R14.reuse, R9 &req={2} ?trans1;
LDS R13, [R7+0xa00] ?trans1;
IMAD R33, R11, R14, R8 &req={3} ?WAIT3_END_GROUP;
LDS R25, [R6+0xa00] ?trans4;
LDS.128 R8, [R22+0x50] &wr=0x0 ?trans4;
LDS R14, [R7+0xa80] &wr=0x1 ?trans1;
IMAD R34, R32, R15.reuse, R31 &req={4} ?trans2;
IMAD R33, R30, R15, R33 &req={5} ?trans1;
LDS R31, [R7+0xb00] &wr=0x2 ?trans4;
LDS R15, [R6+0xb00] &wr=0x3 ?trans4;
LDS R32, [R7+0xb80] &wr=0x4 ?trans4;
LDS R30, [R6+0xb80] &wr=0x5 ?trans1;
IMAD R13, R8, R13, R34 &req={0} ?WAIT2_END_GROUP;
IMAD R25, R8, R25, R33 ?trans2;
IMAD R13, R14, R9.reuse, R13 &req={1} ?trans1;
LDS R8, [R6+0xc80] ?trans1;
IMAD R12, R12, R9, R25 ?trans2;
IMAD R31, R31, R10.reuse, R13 &req={2} ?trans1;
LDS R9, [R7+0xc00] ?trans1;
IMAD R34, R15, R10, R12 &req={3} ?WAIT3_END_GROUP;
LDS R25, [R6+0xc00] ?trans4;
LDS.128 R12, [R22+0x60] &wr=0x0 ?trans4;
LDS R10, [R7+0xc80] &wr=0x1 ?trans1;
IMAD R35, R32, R11, R31 &req={4} ?WAIT3_END_GROUP;
LDS R33, [R7+0xd00] &wr=0x2 ?trans4;
LDS R31, [R6+0xd00] &wr=0x3 ?trans1;
IMAD R34, R30, R11, R34 &req={5} ?WAIT3_END_GROUP;
LDS R32, [R7+0xd80] &wr=0x4 ?trans4;
LDS R30, [R6+0xd80] &wr=0x5 ?trans1;
IMAD R9, R12.reuse, R9, R35 &req={0} ?trans2;
IMAD R25, R12, R25, R34 ?trans2;
IMAD R9, R10, R13.reuse, R9 &req={1} ?trans1;
LDS R12, [R6+0xe80] ?trans1;
IMAD R8, R8, R13, R25 ?WAIT2_END_GROUP;
IMAD R33, R33, R14.reuse, R9 &req={2} ?trans1;
LDS R13, [R7+0xe00] ?trans1;
IMAD R31, R31, R14, R8 &req={3} ?WAIT3_END_GROUP;
LDS R25, [R6+0xe00] ?trans4;
LDS.128 R8, [R22+0x70] &wr=0x0 ?trans1;
IMAD R33, R32, R15, R33 &req={4} ?WAIT3_END_GROUP;
LDS R14, [R7+0xe80] &wr=0x1 ?trans1;
IMAD R34, R30, R15, R31 &req={5} ?WAIT3_END_GROUP;
LDS R31, [R7+0xf00] &wr=0x2 ?trans4;
LDS R15, [R6+0xf00] &wr=0x3 ?trans4;
LDS R32, [R7+0xf80] &wr=0x4 ?trans4;
LDS R30, [R6+0xf80] &wr=0x5 ?trans1;
IADD3 R2, PT, PT, R2, 0x1, RZ ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans4;
ISETP.NE.AND P0, PT, R2, RZ, PT ?trans1;
IADD3 R3, PT, PT, R3, 0x20, RZ ?WAIT2_END_GROUP;
IADD3 R17, PT, PT, R17, 0x20, RZ ?trans1;
IMAD R13, R8.reuse, R13, R33 &req={0} ?trans2;
IMAD R25, R8, R25, R34 ?trans2;
IMAD R13, R14, R9.reuse, R13 &req={1} ?trans2;
IMAD R12, R12, R9, R25 ?trans2;
IMAD R13, R31, R10.reuse, R13 &req={2} ?trans2;
IMAD R12, R15, R10, R12 &req={3} ?trans1;
IADD3 R19, PT, PT, R19, 0x20, RZ ?WAIT2_END_GROUP;
LEA R5, R0, R5, 0x5 ?trans1;
IMAD R25, R32, R11.reuse, R13 &req={4} ?trans2;
IMAD R33, R30, R11, R12 &req={5} ?trans1;
@P0 BRA 0x2f0 ?trans6;
IMAD R23, R24, R0, R23 ?WAIT4_END_GROUP;
IMAD.WIDE R26, R23, 0x4, R26 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR8][R26.64], R25 &req={1} ?trans4;
STG.E desc[UR8][R26.64+0x80], R33 ?trans1;
EXIT ?trans5;
BRA 0xd50;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: MatrixMulTiledMod(int*, int*, int*, int)
_Z17MatrixMulTiledModPiS_S_i:
s_load_b32 s2, s[0:1], 0x18
v_and_b32_e32 v5, 0x3ff, v0
v_bfe_u32 v6, v0, 10, 10
s_mov_b32 s3, exec_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b32_e32 v0, 2, v5
v_lshl_add_u32 v1, s15, 5, v6
s_delay_alu instid0(VALU_DEP_2)
v_lshl_add_u32 v7, v6, 7, v0
v_mov_b32_e32 v0, 0
v_lshl_add_u32 v4, s14, 6, v5
ds_store_2addr_stride64_b32 v7, v0, v0 offset1:16
ds_store_b32 v7, v0 offset:8192
v_max_i32_e32 v2, v1, v4
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmpx_gt_i32_e64 s2, v2
s_cbranch_execz .LBB2_13
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
v_mul_lo_u32 v8, v1, s2
v_mov_b32_e32 v1, 0
s_cmp_lt_i32 s2, 32
s_mov_b32 s3, 0
s_cbranch_scc1 .LBB2_12
s_ashr_i32 s8, s2, 31
v_dual_mov_b32 v0, 0 :: v_dual_add_nc_u32 v9, 0x1000, v7
s_lshr_b32 s8, s8, 27
v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v10, 0x2000, v7
v_add_nc_u32_e32 v11, 32, v4
v_lshlrev_b32_e32 v12, 7, v6
v_lshl_or_b32 v13, v5, 2, 0x1000
s_add_i32 s8, s2, s8
s_mul_i32 s9, s2, s2
s_ashr_i32 s8, s8, 5
.LBB2_3:
s_lshl_b32 s10, s3, 5
s_mov_b32 s11, exec_lo
v_add_nc_u32_e32 v2, s10, v5
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s2, v2
s_cbranch_execz .LBB2_5
v_add_nc_u32_e32 v2, v2, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
ds_store_b32 v7, v2
.LBB2_5:
s_or_b32 exec_lo, exec_lo, s11
v_add_nc_u32_e32 v3, s10, v6
s_mov_b32 s10, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_mul_lo_u32 v2, v3, s2
v_cmpx_gt_i32_e64 s2, v3
s_cbranch_execz .LBB2_7
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v14, v2, v4
v_ashrrev_i32_e32 v15, 31, v14
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[14:15], 2, v[14:15]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v14, vcc_lo, s0, v14
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v15, vcc_lo, s1, v15, vcc_lo
global_load_b32 v3, v[14:15], off
s_waitcnt vmcnt(0)
ds_store_b32 v9, v3
.LBB2_7:
s_or_b32 exec_lo, exec_lo, s10
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v2, v11, v2
s_mov_b32 s10, exec_lo
v_cmpx_gt_i32_e64 s9, v2
s_cbranch_execz .LBB2_9
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s0, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
ds_store_b32 v10, v2
.LBB2_9:
s_or_b32 exec_lo, exec_lo, s10
v_mov_b32_e32 v2, v13
s_mov_b32 s10, 0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB2_10:
v_add_nc_u32_e32 v3, s10, v12
s_add_i32 s10, s10, 4
ds_load_2addr_stride64_b32 v[14:15], v2 offset1:16
ds_load_b32 v3, v3
s_cmpk_eq_i32 s10, 0x80
s_waitcnt lgkmcnt(0)
v_mad_u64_u32 v[16:17], null, v14, v3, v[1:2]
v_mad_u64_u32 v[17:18], null, v15, v3, v[0:1]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_dual_mov_b32 v1, v16 :: v_dual_add_nc_u32 v2, 0x80, v2
v_mov_b32_e32 v0, v17
s_cbranch_scc0 .LBB2_10
s_add_i32 s3, s3, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s3, s8
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB2_3
.LBB2_12:
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v2, v8, v4
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
s_clause 0x1
global_store_b32 v[2:3], v1, off
global_store_b32 v[2:3], v0, off offset:128
.LBB2_13:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| MatrixMulTiledMod | 5,204 | 2,323 | stackv2-00000-of-00015 |
// Demangled: matrixMulti(int*, int*, int*, int)
Function : _Z11matrixMultiPiS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.Y &wr=0x1 ?trans7;
LDC R2, c[0x0][0x364] &wr=0x1 ?trans1;
LDCU UR18, c[0x0][0x398] &wr=0x2 ?trans1;
S2R R0, SR_TID.X &wr=0x3 ?trans6;
S2UR UR4, SR_CTAID.Y &wr=0x1 ?trans8;
S2UR UR5, SR_CTAID.X &wr=0x3 ?trans8;
LDC R7, c[0x0][0x360] &wr=0x3 ?trans1;
IMAD R2, R2, UR4, R3 &req={1} ?WAIT2_END_GROUP;
IMAD R7, R7, UR5, R0 &req={3} ?WAIT5_END_GROUP;
VIMNMX.S32 R0, R2, R7, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR18, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
UISETP.GE.U32.AND UP0, UPT, UR18, 0x8, UPT ?trans1;
UMOV UR4, URZ ?trans1;
LDCU.64 UR16, c[0x0][0x358] &wr=0x0 ?trans1;
HFMA2 R0, -RZ, RZ, 0, 0 ?trans2;
IMAD R2, R2, UR18, RZ ?trans1;
PLOP3.LUT P0, PT, PT, PT, UP0, 0x80, 0x8 ?WAIT13_END_GROUP;
@!P0 BRA 0x510 ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x1 ?trans1;
LDCU.64 UR20, c[0x0][0x390] &wr=0x2 ?trans1;
MOV R6, R7 ?trans1;
ULOP3.LUT UR4, UR18, 0x7ffffff8, URZ, 0xc0, !UPT ?WAIT4_END_GROUP;
UIADD3 UR5, UPT, UPT, -UR4, URZ, URZ ?WAIT3_END_GROUP;
UMOV UR4, URZ ?trans1;
UIMAD.WIDE UR6, UR18, 0x1c, UR20 &req={2} ?trans1;
UIMAD.WIDE UR8, UR18, 0x18, UR20 ?trans1;
UIMAD.WIDE UR10, UR18, 0x14, UR20 ?trans1;
UIMAD.WIDE UR12, UR18, 0x10, UR20 ?trans1;
UIMAD.WIDE UR14, UR18, 0xc, UR20 ?trans1;
IMAD.WIDE.U32 R4, R2, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
IADD.64 R4, R4, 0x10 ?WAIT8_END_GROUP;
MOV R21, 0x4 ?trans1;
UIMAD.WIDE UR22, UR18, 0x4, UR20 ?trans1;
HFMA2 R11, -RZ, RZ, 0, 2.384185791015625e-07 ?trans1;
UIMAD.WIDE UR24, UR18, 0x8, UR20 ?trans1;
MOV R9, 0x4 ?trans1;
IMAD.WIDE R20, R6.reuse, R21, UR20 ?trans1;
LDG.E R12, desc[UR16][R4.64+-0x10] &req={0} &wr=0x2 ?trans3;
HFMA2 R19, -RZ, RZ, 0, 2.384185791015625e-07 ?trans2;
IMAD.WIDE R10, R6, R11, UR22 ?trans1;
LDG.E R13, desc[UR16][R20.64] &rd=0x0 &wr=0x2 ?trans1;
MOV R23, 0x4 ?WAIT2_END_GROUP;
IMAD.WIDE R8, R6.reuse, R9, UR24 ?trans1;
LDG.E R14, desc[UR16][R10.64] &rd=0x1 &wr=0x3 ?trans4;
LDG.E R15, desc[UR16][R4.64+-0xc] &wr=0x3 ?trans1;
IMAD.WIDE R18, R6, R19, UR14 ?WAIT4_END_GROUP;
HFMA2 R25, -RZ, RZ, 0, 2.384185791015625e-07 ?trans1;
LDG.E R16, desc[UR16][R8.64] &rd=0x4 &wr=0x5 ?trans1;
IMAD.WIDE R22, R6, R23, UR12 ?WAIT3_END_GROUP;
LDG.E R17, desc[UR16][R4.64+-0x8] &wr=0x5 ?trans1;
IMAD.WIDE R20, R6, R25, UR10 &req={0} ?WAIT3_END_GROUP;
LDG.E R18, desc[UR16][R18.64] &wr=0x5 ?trans4;
LDG.E R24, desc[UR16][R4.64+-0x4] &wr=0x5 ?trans1;
MOV R11, 0x4 &req={1} ?trans1;
IMAD.WIDE R8, R6.reuse, R25, UR8 &req={4} ?trans2;
LDG.E R22, desc[UR16][R22.64] &wr=0x4 ?trans4;
LDG.E R26, desc[UR16][R4.64] &wr=0x4 ?trans1;
IMAD.WIDE R10, R6, R11, UR6 ?WAIT3_END_GROUP;
LDG.E R20, desc[UR16][R20.64] &wr=0x4 ?trans4;
LDG.E R28, desc[UR16][R4.64+0x4] &wr=0x4 ?trans4;
LDG.E R8, desc[UR16][R8.64] &rd=0x0 &wr=0x4 ?trans4;
LDG.E R30, desc[UR16][R4.64+0x8] &wr=0x4 ?trans4;
LDG.E R10, desc[UR16][R10.64] &wr=0x4 ?trans4;
LDG.E R19, desc[UR16][R4.64+0xc] &rd=0x1 &wr=0x4 ?trans1;
UIADD3 UR5, UPT, UPT, UR5, 0x8, URZ ?WAIT6_END_GROUP;
ISETP.NE.AND P0, PT, RZ, UR5, PT ?trans1;
MOV R9, UR18 &req={0} ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
IADD.64 R4, R4, 0x20 &req={1} ?WAIT3_END_GROUP;
IMAD R6, R9, 0x8, R6 ?trans2;
IMAD R12, R12, R13, R0 &req={2} ?WAIT4_END_GROUP;
IMAD R12, R15, R14, R12 &req={3} ?WAIT4_END_GROUP;
IMAD R17, R17, R16, R12 &req={5} ?WAIT4_END_GROUP;
IMAD R17, R24, R18, R17 ?WAIT4_END_GROUP;
IMAD R17, R26, R22, R17 &req={4} ?WAIT4_END_GROUP;
IMAD R17, R28, R20, R17 ?WAIT4_END_GROUP;
IMAD R8, R30, R8, R17 ?WAIT4_END_GROUP;
IMAD R0, R19, R10, R8 ?trans1;
@P0 BRA 0x210 ?trans6;
ULOP3.LUT UR5, UR18, 0x7, URZ, 0xc0, !UPT ?WAIT6_END_GROUP;
ISETP.NE.AND P0, PT, RZ, UR5, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xa70 ?trans5;
UISETP.GE.U32.AND UP0, UPT, UR5, 0x4, UPT ?trans1;
ULOP3.LUT UR6, UR18, 0x3, URZ, 0xc0, !UPT ?WAIT5_END_GROUP;
PLOP3.LUT P1, PT, PT, PT, UP0, 0x80, 0x8 ?trans1;
ISETP.NE.AND P0, PT, RZ, UR6, PT ?WAIT12_END_GROUP;
@!P1 BRA 0x7e0 ?trans5;
LDC.64 R8, c[0x0][0x390] &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x388] &wr=0x2 ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?trans1;
MOV R4, UR4 ?trans1;
MOV R12, UR18 ?trans1;
UMOV UR5, URZ ?trans1;
USHF.R.S32.HI UR7, URZ, 0x1f, UR18 ?trans1;
IADD.64 R18, R2, UR4 ?trans2;
LDC.64 R10, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD R5, R4, UR18, R7 ?trans1;
IADD3 R17, PT, PT, R2, UR4, RZ ?trans1;
MOV R13, UR7 ?WAIT5_END_GROUP;
IADD.64 R14, R12, R12 ?WAIT3_END_GROUP;
LEA R4, P1, R18, UR8, 0x2 &req={2} ?trans1;
IMAD.WIDE R8, R5, 0x4, R8 &req={1} ?WAIT3_END_GROUP;
LEA.HI.X R5, R18, UR9, R19, 0x2, P1 ?trans1;
MOV R19, UR18 ?trans1;
LEA R18, P1, R14, R8, 0x2 ?trans1;
LDG.E R6, desc[UR16][R8.64] &req={0} &wr=0x2 ?trans1;
IMAD.WIDE.U32 R10, R17, 0x4, R10 &req={3} ?trans1;
IADD.64 R16, R12, R14 ?trans2;
LDG.E R21, desc[UR16][R4.64+0x4] &wr=0x3 ?trans1;
IMAD.WIDE R12, R19, 0x4, R8 ?trans1;
LEA.HI.X R19, R14, R9, R15, 0x2, P1 ?trans2;
LDG.E R11, desc[UR16][R10.64] &wr=0x2 ?trans1;
LEA R14, P1, R16, R8, 0x2 ?WAIT3_END_GROUP;
LDG.E R12, desc[UR16][R12.64] &wr=0x3 ?trans1;
LEA.HI.X R15, R16, R9, R17, 0x2, P1 ?WAIT3_END_GROUP;
LDG.E R18, desc[UR16][R18.64] &wr=0x4 ?trans4;
LDG.E R17, desc[UR16][R4.64+0x8] &wr=0x4 ?trans4;
LDG.E R23, desc[UR16][R4.64+0xc] &wr=0x5 ?trans4;
LDG.E R14, desc[UR16][R14.64] &wr=0x5 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
IMAD R6, R11, R6, R0 &req={2} ?WAIT4_END_GROUP;
IMAD R6, R21, R12, R6 &req={3} ?WAIT4_END_GROUP;
IMAD R6, R17, R18, R6 &req={4} ?WAIT4_END_GROUP;
IMAD R0, R23, R14, R6 &req={5} ?WAIT7_END_GROUP;
@!P0 BRA 0xa70 ?trans5;
UISETP.NE.AND UP0, UPT, UR6, 0x1, UPT ?trans1;
ULOP3.LUT UR5, UR18, 0x1, URZ, 0xc0, !UPT ?WAIT4_END_GROUP;
UISETP.NE.U32.AND UP1, UPT, UR5, 0x1, UPT ?trans1;
PLOP3.LUT P1, PT, PT, PT, UP0, 0x80, 0x8 ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, PT, PT, UP1, 0x80, 0x8 ?WAIT8_END_GROUP;
@!P1 BRA 0x9c0 ?trans5;
LDC.64 R8, c[0x0][0x390] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x388] &wr=0x2 ?trans1;
MOV R6, UR4 ?trans1;
MOV R10, R2 ?trans1;
HFMA2 R11, -RZ, RZ, 0, 0 ?trans1;
UMOV UR5, URZ ?trans1;
IADD3 R13, PT, PT, R2, UR4, RZ ?trans1;
IMAD R15, R6, UR18, R7 ?trans1;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans1;
IADD.64 R10, R10, UR4 ?WAIT5_END_GROUP;
LEA R12, P1, R10, UR6, 0x2 &req={2} ?trans1;
IMAD.WIDE R8, R15, 0x4, R8 &req={1} ?trans1;
MOV R15, UR18 ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R4, R13, 0x4, R4 &req={3} ?trans1;
LEA.HI.X R13, R10, UR7, R11, 0x2, P1 ?WAIT3_END_GROUP;
IMAD.WIDE R10, R15, 0x4, R8 ?trans2;
LDG.E R5, desc[UR16][R4.64] &req={0} &wr=0x2 ?trans4;
LDG.E R8, desc[UR16][R8.64] &wr=0x2 ?trans4;
LDG.E R13, desc[UR16][R12.64+0x4] &wr=0x3 ?trans4;
LDG.E R10, desc[UR16][R10.64] &wr=0x3 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x2, URZ ?trans1;
IMAD R0, R5, R8, R0 &req={2} ?WAIT4_END_GROUP;
IMAD R0, R13, R10, R0 &req={3} ?WAIT7_END_GROUP;
@P0 BRA 0xa70 ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x1 ?trans1;
MOV R6, UR4 ?trans1;
IADD3 R11, PT, PT, R2, UR4, RZ ?WAIT4_END_GROUP;
IMAD R13, R6, UR18, R7 ?trans2;
LDC.64 R8, c[0x0][0x390] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R4, R11, 0x4, R4 &req={1} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR16][R4.64] &req={0} &wr=0x3 ?trans1;
IMAD.WIDE R8, R13, 0x4, R8 &req={2} ?WAIT6_END_GROUP;
LDG.E R8, desc[UR16][R8.64] &wr=0x3 ?trans2;
IMAD R0, R5, R8, R0 &req={3} ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x380] &wr=0x1 ?trans1;
IADD3 R3, PT, PT, R7, R2, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R2, R3, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR16][R2.64], R0 &req={0} ?trans1;
EXIT ?trans5;
BRA 0xac0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: matrixMulti(int*, int*, int*, int)
_Z11matrixMultiPiS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v4, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s4, s3, 16
s_and_b32 s3, s3, 0xffff
v_mad_u64_u32 v[2:3], null, s15, s4, v[1:2]
v_mad_u64_u32 v[0:1], null, s14, s3, v[4:5]
s_mov_b32 s3, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_max_i32_e32 v1, v2, v0
v_cmpx_gt_i32_e64 s2, v1
s_cbranch_execz .LBB0_6
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
v_mul_lo_u32 v1, v2, s2
s_cmp_lt_i32 s2, 1
s_cbranch_scc1 .LBB0_4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v2, 31, v1
s_mov_b32 s3, s2
v_mov_b32_e32 v5, v0
v_lshlrev_b64 v[3:4], 2, v[1:2]
v_mov_b32_e32 v2, 0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v3, vcc_lo, s6, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
.LBB0_3:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_ashrrev_i32_e32 v6, 31, v5
s_add_i32 s3, s3, -1
s_cmp_eq_u32 s3, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[5:6]
v_add_co_u32 v6, vcc_lo, s0, v6
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
global_load_b32 v8, v[3:4], off
global_load_b32 v9, v[6:7], off
s_waitcnt vmcnt(0)
v_mad_u64_u32 v[6:7], null, v9, v8, v[2:3]
v_add_co_u32 v3, vcc_lo, v3, 4
v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_dual_mov_b32 v2, v6 :: v_dual_add_nc_u32 v5, s2, v5
s_cbranch_scc0 .LBB0_3
s_branch .LBB0_5
.LBB0_4:
v_mov_b32_e32 v2, 0
.LBB0_5:
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v0, v1, v0
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| matrixMulti | 4,463 | 1,246 | stackv2-00000-of-00015 |
// Demangled: multiply(float**, float**, float**)
Function : _Z8multiplyPPfS0_S0_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R7, SR_CTAID.Y &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x2 ?trans1;
S2R R2, SR_TID.Y &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x364] &wr=0x1 ?trans1;
S2R R0, SR_CTAID.X &wr=0x2 ?trans1;
S2R R3, SR_TID.X &wr=0x2 ?trans1;
IMAD R7, R7, UR5, R2 &req={1} ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R7, 0x3ff, PT ?trans1;
IMAD R0, R0, UR4, R3 &req={2} ?WAIT5_END_GROUP;
ISETP.GT.OR P0, PT, R0, 0x3ff, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
SHF.R.S32.HI R11, RZ, 0x1f, R0 ?trans1;
IMAD.SHL.U32 R6, R0, 0x4, RZ ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans1;
UMOV.64 UR4, URZ ?WAIT4_END_GROUP;
LDC.64 R4, c[0x0][0x390] &wr=0x2 ?trans8;
LDC.64 R8, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R2, R7, 0x8, R2 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R7, 0x8, R4 &req={2} ?trans1;
SHF.L.U64.HI R7, R0, 0x2, R11 ?WAIT3_END_GROUP;
HFMA2 R0, -RZ, RZ, 0, 0 ?trans1;
IADD.64 R8, R8, 0x20 &req={3,1} ?WAIT8_END_GROUP;
LDG.E.64 R10, desc[UR6][R2.64] &req={0} &wr=0x2 ?trans4;
LDG.E.64 R12, desc[UR6][R8.64+-0x20] &wr=0x3 ?trans4;
LDG.E.64 R14, desc[UR6][R4.64] &wr=0x4 ?trans1;
IADD.64 R10, R10, UR4 &req={2} ?trans2;
IADD.64 R12, R6, R12 &req={3} ?WAIT5_END_GROUP;
LDG.E R10, desc[UR6][R10.64] &wr=0x2 ?trans1;
IADD.64 R14, R6, R14 &req={4} ?WAIT3_END_GROUP;
LDG.E R13, desc[UR6][R12.64] &wr=0x2 ?trans4;
LDG.E R17, desc[UR6][R14.64] &wr=0x2 ?trans2;
FFMA R23, R10, R13, R17 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R14.64], R23 &rd=0x0 ?trans4;
LDG.E.64 R16, desc[UR6][R2.64] &wr=0x2 ?trans4;
LDG.E.64 R18, desc[UR6][R8.64+-0x18] &wr=0x3 ?trans4;
LDG.E.64 R20, desc[UR6][R4.64] &wr=0x4 ?trans1;
IADD.64 R16, R16, UR4 &req={2} ?WAIT2_END_GROUP;
IADD.64 R18, R6, R18 &req={3} ?WAIT5_END_GROUP;
LDG.E R16, desc[UR6][R16.64+0x4] &wr=0x2 ?trans1;
IADD.64 R20, R6, R20 &req={4} ?WAIT3_END_GROUP;
LDG.E R19, desc[UR6][R18.64] &wr=0x2 ?trans4;
LDG.E R11, desc[UR6][R20.64] &wr=0x2 ?trans2;
FFMA R25, R16, R19, R11 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R20.64], R25 &rd=0x1 ?trans4;
LDG.E.64 R10, desc[UR6][R2.64] &wr=0x2 ?trans4;
LDG.E.64 R12, desc[UR6][R8.64+-0x10] &wr=0x3 ?trans4;
LDG.E.64 R14, desc[UR6][R4.64] &req={0} &wr=0x4 ?trans1;
IADD.64 R10, R10, UR4 &req={2} ?WAIT2_END_GROUP;
IADD.64 R12, R6, R12 &req={3} ?WAIT5_END_GROUP;
LDG.E R10, desc[UR6][R10.64+0x8] &wr=0x2 ?trans1;
IADD.64 R14, R6, R14 &req={4} ?WAIT3_END_GROUP;
LDG.E R13, desc[UR6][R12.64] &wr=0x2 ?trans4;
LDG.E R17, desc[UR6][R14.64] &wr=0x2 ?trans2;
FFMA R23, R10, R13, R17 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R14.64], R23 &rd=0x0 ?trans4;
LDG.E.64 R16, desc[UR6][R2.64] &wr=0x2 ?trans4;
LDG.E.64 R18, desc[UR6][R8.64+-0x8] &wr=0x3 ?trans4;
LDG.E.64 R20, desc[UR6][R4.64] &req={1} &wr=0x4 ?trans1;
IADD.64 R16, R16, UR4 &req={2} ?WAIT2_END_GROUP;
IADD.64 R18, R6, R18 &req={3} ?WAIT5_END_GROUP;
LDG.E R16, desc[UR6][R16.64+0xc] &wr=0x2 ?trans1;
IADD.64 R20, R6, R20 &req={4} ?WAIT3_END_GROUP;
LDG.E R19, desc[UR6][R18.64] &wr=0x2 ?trans4;
LDG.E R11, desc[UR6][R20.64] &wr=0x2 ?trans2;
FFMA R25, R16, R19, R11 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R20.64], R25 &rd=0x1 ?trans4;
LDG.E.64 R10, desc[UR6][R2.64] &wr=0x2 ?trans4;
LDG.E.64 R12, desc[UR6][R8.64] &wr=0x3 ?trans4;
LDG.E.64 R14, desc[UR6][R4.64] &req={0} &wr=0x4 ?trans1;
IADD.64 R10, R10, UR4 &req={2} ?WAIT2_END_GROUP;
IADD.64 R12, R6, R12 &req={3} ?WAIT5_END_GROUP;
LDG.E R10, desc[UR6][R10.64+0x10] &wr=0x2 ?trans1;
IADD.64 R14, R6, R14 &req={4} ?WAIT3_END_GROUP;
LDG.E R13, desc[UR6][R12.64] &wr=0x2 ?trans4;
LDG.E R17, desc[UR6][R14.64] &wr=0x2 ?trans2;
FFMA R23, R10, R13, R17 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R14.64], R23 &rd=0x0 ?trans4;
LDG.E.64 R16, desc[UR6][R2.64] &wr=0x2 ?trans4;
LDG.E.64 R18, desc[UR6][R8.64+0x8] &wr=0x3 ?trans4;
LDG.E.64 R20, desc[UR6][R4.64] &req={1} &wr=0x4 ?trans1;
IADD.64 R16, R16, UR4 &req={2} ?WAIT2_END_GROUP;
IADD.64 R18, R6, R18 &req={3} ?WAIT5_END_GROUP;
LDG.E R16, desc[UR6][R16.64+0x14] &wr=0x2 ?trans1;
IADD.64 R20, R6, R20 &req={4} ?WAIT3_END_GROUP;
LDG.E R19, desc[UR6][R18.64] &wr=0x2 ?trans4;
LDG.E R11, desc[UR6][R20.64] &wr=0x2 ?trans2;
FFMA R25, R16, R19, R11 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R20.64], R25 &rd=0x1 ?trans4;
LDG.E.64 R10, desc[UR6][R2.64] &wr=0x2 ?trans4;
LDG.E.64 R12, desc[UR6][R8.64+0x10] &wr=0x3 ?trans4;
LDG.E.64 R14, desc[UR6][R4.64] &req={0} &wr=0x4 ?trans1;
IADD.64 R10, R10, UR4 &req={2} ?WAIT2_END_GROUP;
IADD.64 R12, R6, R12 &req={3} ?WAIT5_END_GROUP;
LDG.E R10, desc[UR6][R10.64+0x18] &wr=0x2 ?trans1;
IADD.64 R14, R6, R14 &req={4} ?WAIT3_END_GROUP;
LDG.E R13, desc[UR6][R12.64] &wr=0x2 ?trans4;
LDG.E R17, desc[UR6][R14.64] &wr=0x2 ?trans2;
FFMA R23, R10, R13, R17 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R14.64], R23 &rd=0x0 ?trans4;
LDG.E.64 R16, desc[UR6][R2.64] &wr=0x2 ?trans4;
LDG.E.64 R18, desc[UR6][R8.64+0x18] &wr=0x3 ?trans4;
LDG.E.64 R20, desc[UR6][R4.64] &req={1} &wr=0x4 ?trans1;
IADD.64 R16, R16, UR4 &req={2} ?WAIT2_END_GROUP;
IADD.64 R18, R6, R18 &req={3} ?WAIT5_END_GROUP;
LDG.E R16, desc[UR6][R16.64+0x1c] &wr=0x2 ?trans1;
IADD.64 R20, R6, R20 &req={4} ?WAIT3_END_GROUP;
LDG.E R19, desc[UR6][R18.64] &wr=0x2 ?trans4;
LDG.E R11, desc[UR6][R20.64] &wr=0x2 ?trans1;
IADD3 R0, PT, PT, R0, 0x8, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R0, 0x400, PT ?trans1;
UIADD3.64 UR4, UPT, UPT, UR4, 0x20, URZ ?trans1;
IADD.64 R8, R8, 0x40 ?trans2;
FFMA R11, R16, R19, R11 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R20.64], R11 &rd=0x0 ?trans4;
@P0 BRA 0x180 ?trans5;
EXIT ?trans5;
BRA 0x760;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: multiply(float**, float**, float**)
_Z8multiplyPPfS0_S0_:
s_load_b32 s2, s[0:1], 0x24
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
s_mov_b32 s2, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_max_i32_e32 v2, v0, v1
v_cmpx_gt_i32_e32 0x400, v2
s_cbranch_execz .LBB0_3
s_load_b64 s[2:3], s[0:1], 0x10
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 3, v[1:2]
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v4, vcc_lo, s2, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s3, v3, vcc_lo
s_load_b128 s[0:3], s[0:1], 0x0
global_load_b64 v[4:5], v[4:5], off
s_waitcnt lgkmcnt(0)
v_add_co_u32 v6, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
s_mov_b64 s[0:1], 0
s_waitcnt vmcnt(0)
v_add_co_u32 v2, vcc_lo, v4, v0
v_add_co_ci_u32_e32 v3, vcc_lo, v5, v1, vcc_lo
global_load_b64 v[4:5], v[6:7], off
global_load_b32 v6, v[2:3], off
.LBB0_2:
s_load_b64 s[4:5], s[2:3], 0x0
s_waitcnt vmcnt(1)
v_add_co_u32 v7, vcc_lo, v4, s0
v_add_co_ci_u32_e32 v8, vcc_lo, s1, v5, vcc_lo
s_add_u32 s0, s0, 4
s_addc_u32 s1, s1, 0
s_add_u32 s2, s2, 8
s_addc_u32 s3, s3, 0
s_cmpk_lg_i32 s0, 0x1000
s_waitcnt lgkmcnt(0)
v_add_co_u32 v9, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v10, vcc_lo, s5, v1, vcc_lo
global_load_b32 v7, v[7:8], off
global_load_b32 v8, v[9:10], off
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v6, v7, v8
global_store_b32 v[2:3], v6, off
s_cbranch_scc1 .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| multiply | 3,402 | 1,062 | stackv2-00000-of-00015 |
// Demangled: rng_init(curandStateXORWOW*, int, int)
Function : _Z8rng_initP17curandStateXORWOWii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R9, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x38c] &wr=0x2 ?trans7;
LDC R8, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R8, R8, UR4, R9 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R8, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R0, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
HFMA2 R3, -RZ, RZ, -178.125, -3742 ?trans1;
BSSY.RECONVERGENT B0, 0xf10 ?trans1;
SHF.R.S32.HI R9, RZ, 0x1f, R8 ?WAIT4_END_GROUP;
LDC.64 R6, c[0x0][0x380] &wr=0x2 ?trans1;
ISETP.GT.AND P0, PT, R0.reuse, -0x1, PT &req={0} ?trans1;
LOP3.LUT R0, R0, 0xaad26b49, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
SEL R3, R3, 0x8bf16996, P0 ?trans1;
IMAD R0, R0, 0x4182bed5, RZ ?trans1;
ISETP.NE.AND P0, PT, R8.reuse, RZ, PT ?trans1;
IMAD.WIDE R6, R8, 0x30, R6 &req={2} ?trans2;
IADD3 R11, PT, PT, R3.reuse, 0x1f123bb5, RZ ?trans2;
IADD3 R5, PT, PT, R0.reuse, 0x75bcd15, RZ ?trans2;
IADD3 R4, PT, PT, R3, 0x64f0c9, R0 ?trans2;
LOP3.LUT R10, R0, 0x159a55e5, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
IADD3 R13, PT, PT, R0, 0x583f19, RZ ?trans2;
LOP3.LUT R12, R3, 0x5491333, RZ, 0x3c, !PT ?trans1;
STG.E.64 desc[UR4][R6.64], R4 &req={1} &rd=0x0 ?trans4;
STG.E.64 desc[UR4][R6.64+0x8], R10 &rd=0x0 ?trans4;
STG.E.64 desc[UR4][R6.64+0x10], R12 &rd=0x0 ?trans1;
@!P0 BRA 0xf00 ?trans5;
IADD.64 R10, R6, 0x4 &req={0} ?trans2;
MOV R18, RZ ?WAIT7_END_GROUP;
LOP3.LUT R12, R8, 0x3, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B1, 0xe90 ?trans1;
MOV R13, RZ ?WAIT5_END_GROUP;
ISETP.NE.S64.AND P0, PT, R12, RZ, PT ?WAIT14_END_GROUP;
@!P0 BRA 0xe80 ?trans5;
LDC.64 R14, c[0x4][RZ] &wr=0x0 ?trans1;
HFMA2 R19, -RZ, RZ, 0, 0 ?trans2;
IMAD.WIDE.U32 R14, R18, 0xc80, R14 &req={0} ?WAIT7_END_GROUP;
MOV R21, RZ &req={0} ?trans1;
MOV R23, RZ ?trans1;
CS2R R4, SRZ ?trans1;
CS2R R2, SRZ ?WAIT7_END_GROUP;
IMAD.WIDE.U32 R16, R23, 0x4, R10 ?WAIT5_END_GROUP;
LDG.E R25, desc[UR4][R16.64] &rd=0x0 &wr=0x5 ?trans1;
MOV R27, R23 ?trans1;
IADD3 R23, PT, PT, R23, 0x1, RZ ?trans1;
HFMA2 R0, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
ISETP.NE.AND P0, PT, R23, 0x5, PT ?WAIT5_END_GROUP;
P2R R28, PR, RZ, 0x1 &req={0} ?WAIT8_END_GROUP;
SHF.R.U32.HI R30, RZ, R0, R25 &req={5} ?trans1;
IMAD R16, R27, 0x20, R0 ?WAIT3_END_GROUP;
LOP3.LUT R17, R30, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P0, PT, R17, 0x1, PT ?trans1;
IMAD R17, R16, 0x5, RZ ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R16, R17, 0x4, R14 ?trans1;
R2P PR, R30, 0x7e ?WAIT7_END_GROUP;
@!P0 LDG.E R20, desc[UR4][R16.64] &wr=0x2 ?trans4;
@!P0 LDG.E R24, desc[UR4][R16.64+0x10] &wr=0x3 ?trans4;
@!P0 LDG.E R29, desc[UR4][R16.64+0x4] &wr=0x4 ?trans4;
@!P0 LDG.E R22, desc[UR4][R16.64+0x8] &wr=0x4 ?trans4;
@!P0 LDG.E R31, desc[UR4][R16.64+0xc] &wr=0x4 ?trans4;
@P1 LDG.E R32, desc[UR4][R16.64+0x14] &wr=0x4 ?trans4;
@P2 LDG.E R34, desc[UR4][R16.64+0x28] &wr=0x4 ?trans4;
@P5 LDG.E R36, desc[UR4][R16.64+0x64] &wr=0x4 ?trans4;
@P1 LDG.E R26, desc[UR4][R16.64+0x1c] &wr=0x4 ?trans4;
@P6 LDG.E R35, desc[UR4][R16.64+0x78] &wr=0x4 ?trans4;
@P2 LDG.E R33, desc[UR4][R16.64+0x2c] &wr=0x4 ?trans4;
@P4 LDG.E R37, desc[UR4][R16.64+0x5c] &wr=0x4 ?trans1;
@!P0 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P3 LDG.E R20, desc[UR4][R16.64+0x3c] &wr=0x2 ?trans1;
@!P0 LOP3.LUT R5, R5, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P4 LDG.E R24, desc[UR4][R16.64+0x50] &wr=0x3 ?trans1;
@!P0 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT &req={4} ?WAIT3_END_GROUP;
@P1 LDG.E R29, desc[UR4][R16.64+0x18] &wr=0x4 ?trans1;
@!P0 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P1 LDG.E R22, desc[UR4][R16.64+0x24] &wr=0x4 ?trans1;
@!P0 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P1 LDG.E R31, desc[UR4][R16.64+0x20] &wr=0x4 ?trans1;
@P1 LOP3.LUT R21, R21, R32, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R32, desc[UR4][R16.64+0x30] &wr=0x4 ?trans1;
@P2 LOP3.LUT R21, R21, R34, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R34, desc[UR4][R16.64+0x38] &wr=0x4 ?trans1;
LOP3.LUT P0, RZ, R30, 0x80, RZ, 0xc0, !PT ?trans2;
@P1 LOP3.LUT R3, R3, R26, RZ, 0x3c, !PT ?trans2;
@P4 LDG.E R26, desc[UR4][R16.64+0x60] &wr=0x4 ?trans1;
@P3 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P3 LDG.E R20, desc[UR4][R16.64+0x44] &wr=0x2 ?trans1;
@P4 LOP3.LUT R21, R21, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P4 LDG.E R24, desc[UR4][R16.64+0x58] &wr=0x3 ?trans1;
@P1 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT &req={4} ?trans2;
@P5 LOP3.LUT R21, R21, R36, RZ, 0x3c, !PT ?trans1;
@P2 LDG.E R29, desc[UR4][R16.64+0x34] &wr=0x4 ?trans1;
@P1 LOP3.LUT R5, R5, R22, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P3 LDG.E R22, desc[UR4][R16.64+0x4c] &wr=0x4 ?trans1;
@P1 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P3 LDG.E R31, desc[UR4][R16.64+0x40] &wr=0x4 ?trans1;
@P6 LOP3.LUT R21, R21, R35, RZ, 0x3c, !PT ?trans2;
@P2 LOP3.LUT R2, R2, R33, RZ, 0x3c, !PT ?trans1;
@P4 LDG.E R35, desc[UR4][R16.64+0x54] &wr=0x4 ?trans1;
@P2 LOP3.LUT R5, R5, R34, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P3 LDG.E R33, desc[UR4][R16.64+0x48] &wr=0x4 ?trans1;
@P2 LOP3.LUT R3, R3, R32, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P0 LDG.E R34, desc[UR4][R16.64+0x8c] &wr=0x4 ?trans4;
@P5 LDG.E R32, desc[UR4][R16.64+0x68] &wr=0x4 ?trans1;
@P3 LOP3.LUT R3, R3, R20, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P5 LDG.E R20, desc[UR4][R16.64+0x6c] &wr=0x2 ?trans1;
@P4 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P6 LDG.E R24, desc[UR4][R16.64+0x80] &wr=0x3 ?trans1;
@P2 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT &req={4} ?WAIT3_END_GROUP;
@P5 LDG.E R29, desc[UR4][R16.64+0x70] &wr=0x4 ?trans1;
@P3 LOP3.LUT R5, R5, R22, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P5 LDG.E R22, desc[UR4][R16.64+0x74] &wr=0x4 ?trans1;
@P3 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?trans1;
@P6 LDG.E R31, desc[UR4][R16.64+0x7c] &wr=0x4 ?trans1;
@P4 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R26, desc[UR4][R16.64+0x88] &wr=0x4 ?trans1;
@P3 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R33, desc[UR4][R16.64+0x84] &wr=0x4 ?trans1;
@P0 LOP3.LUT R21, R21, R34, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R4, R4, R37, RZ, 0x3c, !PT ?trans1;
@P0 LDG.E R35, desc[UR4][R16.64+0x90] &wr=0x4 ?trans1;
@P5 LOP3.LUT R2, R2, R32, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P0 LDG.E R32, desc[UR4][R16.64+0x94] &wr=0x4 ?trans4;
@P0 LDG.E R37, desc[UR4][R16.64+0x98] &wr=0x4 ?trans4;
@P0 LDG.E R34, desc[UR4][R16.64+0x9c] &wr=0x4 ?trans1;
@P5 LOP3.LUT R3, R3, R20, RZ, 0x3c, !PT &req={2} ?WAIT4_END_GROUP;
@P6 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={3} ?trans2;
@P5 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT &req={4} ?trans2;
@P5 LOP3.LUT R5, R5, R22, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
@P0 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R3, R3, R32, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R4, R4, R37, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R5, R5, R34, RZ, 0x3c, !PT ?trans2;
R2P PR, R30.B1, 0x7f ?WAIT13_END_GROUP;
@P0 LDG.E R22, desc[UR4][R16.64+0xa8] &wr=0x2 ?trans4;
@P0 LDG.E R24, desc[UR4][R16.64+0xb0] &wr=0x3 ?trans4;
@P0 LDG.E R31, desc[UR4][R16.64+0xac] &wr=0x4 ?trans4;
@P0 LDG.E R29, desc[UR4][R16.64+0xa4] &wr=0x4 ?trans4;
@P0 LDG.E R20, desc[UR4][R16.64+0xa0] &wr=0x4 ?trans4;
@P2 LDG.E R32, desc[UR4][R16.64+0xc8] &wr=0x4 ?trans4;
@P3 LDG.E R34, desc[UR4][R16.64+0xdc] &wr=0x4 ?trans4;
@P4 LDG.E R36, desc[UR4][R16.64+0xf0] &wr=0x4 ?trans4;
@P5 LDG.E R33, desc[UR4][R16.64+0x104] &wr=0x4 ?trans4;
@P1 LDG.E R26, desc[UR4][R16.64+0xc4] &wr=0x4 ?trans4;
@P3 LDG.E R37, desc[UR4][R16.64+0xe8] &wr=0x4 ?trans4;
@P3 LDG.E R35, desc[UR4][R16.64+0xe0] &wr=0x4 ?trans1;
@P0 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P1 LDG.E R22, desc[UR4][R16.64+0xb4] &wr=0x2 ?trans1;
@P0 LOP3.LUT R5, R5, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P1 LDG.E R24, desc[UR4][R16.64+0xbc] &wr=0x3 ?trans1;
@P0 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT &req={4} ?WAIT3_END_GROUP;
@P1 LDG.E R31, desc[UR4][R16.64+0xc0] &wr=0x4 ?trans1;
@P0 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P1 LDG.E R29, desc[UR4][R16.64+0xb8] &wr=0x4 ?trans1;
@P0 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT ?trans2;
LOP3.LUT P0, RZ, R30, 0x8000, RZ, 0xc0, !PT ?trans1;
@P6 LDG.E R20, desc[UR4][R16.64+0x118] &wr=0x4 ?trans4;
@P3 LDG.E R30, desc[UR4][R16.64+0xe4] &wr=0x4 ?trans1;
@P1 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R26, desc[UR4][R16.64+0xd8] &wr=0x4 ?trans1;
@P1 LOP3.LUT R21, R21, R22, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P4 LDG.E R22, desc[UR4][R16.64+0xf8] &wr=0x2 ?trans1;
@P2 LOP3.LUT R21, R21, R32, RZ, 0x3c, !PT ?trans2;
@P1 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={3} ?trans1;
@P3 LDG.E R32, desc[UR4][R16.64+0xec] &wr=0x3 ?trans1;
@P3 LOP3.LUT R21, R21, R34, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R24, desc[UR4][R16.64+0xd0] &wr=0x2 ?trans1;
@P4 LOP3.LUT R21, R21, R36, RZ, 0x3c, !PT ?trans2;
@P1 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT &req={4} ?trans1;
@P0 LDG.E R36, desc[UR4][R16.64+0x12c] &wr=0x4 ?trans1;
@P5 LOP3.LUT R21, R21, R33, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R33, desc[UR4][R16.64+0xd4] &wr=0x3 ?trans1;
@P1 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R31, desc[UR4][R16.64+0xcc] &wr=0x4 ?trans4;
@P4 LDG.E R29, desc[UR4][R16.64+0xfc] &wr=0x4 ?trans4;
@P4 LDG.E R34, desc[UR4][R16.64+0xf4] &wr=0x4 ?trans1;
@P6 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P4 LDG.E R20, desc[UR4][R16.64+0x100] &wr=0x4 ?trans1;
@P2 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P5 LDG.E R26, desc[UR4][R16.64+0x114] &wr=0x4 ?trans1;
@P2 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P5 LDG.E R24, desc[UR4][R16.64+0x10c] &wr=0x2 ?trans1;
@P3 LOP3.LUT R3, R3, R30, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R30, desc[UR4][R16.64+0x128] &wr=0x2 ?trans1;
@P2 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P5 LDG.E R33, desc[UR4][R16.64+0x110] &wr=0x3 ?trans1;
@P2 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT &req={4} ?trans2;
@P3 LOP3.LUT R4, R4, R37, RZ, 0x3c, !PT ?trans1;
@P5 LDG.E R31, desc[UR4][R16.64+0x108] &wr=0x4 ?trans1;
@P3 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT ?trans1;
@P6 LDG.E R35, desc[UR4][R16.64+0x11c] &wr=0x4 ?trans1;
@P4 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R22, desc[UR4][R16.64+0x120] &wr=0x4 ?trans1;
@P0 LOP3.LUT R21, R21, R36, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R29, desc[UR4][R16.64+0x124] &wr=0x4 ?trans1;
@P3 LOP3.LUT R5, R5, R32, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R2, R2, R34, RZ, 0x3c, !PT ?trans1;
@P0 LDG.E R37, desc[UR4][R16.64+0x130] &wr=0x4 ?trans4;
@P0 LDG.E R32, desc[UR4][R16.64+0x134] &wr=0x4 ?trans4;
@P0 LDG.E R34, desc[UR4][R16.64+0x138] &wr=0x4 ?trans4;
@P0 LDG.E R36, desc[UR4][R16.64+0x13c] &wr=0x4 ?trans1;
IADD3 R0, PT, PT, R0, 0x10, RZ ?WAIT2_END_GROUP;
@P4 LOP3.LUT R5, R5, R20, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
ISETP.NE.AND P1, PT, R0, 0x20, PT ?trans1;
@P5 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?trans2;
@P5 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={2} ?trans2;
@P6 LOP3.LUT R5, R5, R30, RZ, 0x3c, !PT ?trans2;
@P5 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT &req={3} ?trans2;
@P5 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT &req={4} ?WAIT4_END_GROUP;
@P6 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R2, R2, R37, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R3, R3, R32, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R4, R4, R34, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
@P0 LOP3.LUT R5, R5, R36, RZ, 0x3c, !PT ?trans1;
@P1 BRA 0x330 ?trans6;
ISETP.NE.AND P2, PT, R28, RZ, PT ?WAIT13_END_GROUP;
@P2 BRA 0x2c0 ?trans5;
STG.E.64 desc[UR4][R6.64+0x8], R2 &rd=0x0 ?trans1;
IADD3 R19, PT, PT, R19, 0x1, RZ ?WAIT3_END_GROUP;
STG.E.64 desc[UR4][R6.64+0x10], R4 &rd=0x0 ?trans2;
ISETP.GE.U32.AND P0, PT, R19, R12, PT ?trans2;
STG.E desc[UR4][R6.64+0x4], R21 &rd=0x0 ?trans11;
@!P0 BRA 0x280 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R2, R8 &req={0} ?trans1;
MOV R3, R9 ?trans1;
SHF.R.U64 R8, R8, 0x2, R9.reuse ?trans2;
SHF.R.U32.HI R9, RZ, 0x2, R9 ?trans2;
ISETP.GT.U64.AND P0, PT, R2, 0x3, PT ?WAIT3_END_GROUP;
IADD3 R18, PT, PT, R18, 0x1, RZ ?WAIT11_END_GROUP;
@P0 BRA 0x200 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
STG.E.64 desc[UR4][R6.64+0x18], RZ ?trans4;
STG.E desc[UR4][R6.64+0x20], RZ ?trans4;
STG.E.64 desc[UR4][R6.64+0x28], RZ ?trans1;
EXIT ?trans5;
BRA 0xf50;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: rng_init(hiprandState*, int, int)
_Z8rng_initP12hiprandStateii:
s_clause 0x1
s_load_b32 s6, s[2:3], 0x1c
s_load_b64 s[4:5], s[2:3], 0x8
v_and_b32_e32 v1, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_and_b32 s6, s6, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[5:6], null, s15, s6, v[1:2]
s_delay_alu instid0(VALU_DEP_1)
v_cmp_gt_i32_e32 vcc_lo, s5, v5
s_and_saveexec_b32 s5, vcc_lo
s_cbranch_execz .LBB0_14
s_load_b64 s[0:1], s[0:1], 0x4
v_bfe_u32 v2, v0, 10, 10
v_bfe_u32 v0, v0, 20, 10
s_xor_b32 s5, s4, 0x2c7f967f
s_mov_b32 s6, 0x8a5d614f
s_mul_i32 s7, s5, 0x493c4aa1
v_ashrrev_i32_e32 v6, 31, v5
s_mov_b32 s18, exec_lo
s_waitcnt lgkmcnt(0)
s_lshr_b32 s0, s0, 16
v_mul_u32_u24_e32 v2, s1, v2
s_mul_i32 s0, s0, s1
s_cmp_gt_i32 s4, -1
v_mul_lo_u32 v1, s0, v1
s_cselect_b32 s6, s6, 0xfa091aa4
s_add_i32 s0, s7, 0x75bcd15
s_xor_b32 s1, s7, 0x159a55e5
s_add_i32 s4, s6, 0x1f123bb5
s_add_i32 s8, s7, 0x583f19
s_xor_b32 s5, s6, 0x5491333
v_mov_b32_e32 v4, s8
v_add3_u32 v2, v1, v2, v0
v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
s_add_i32 s0, s7, s6
s_mov_b32 s7, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mul_lo_u32 v8, v2, 48
s_add_i32 s0, s0, 0x64f0c9
v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v7, s0
v_mov_b32_e32 v3, s5
ds_store_2addr_b64 v8, v[0:1], v[2:3] offset0:3 offset1:4
ds_store_2addr_b32 v8, v7, v4 offset1:10
v_cmpx_ne_u32_e32 0, v5
s_cbranch_execz .LBB0_13
v_mov_b32_e32 v7, v6
v_dual_mov_b32 v6, v5 :: v_dual_add_nc_u32 v9, 24, v8
s_mov_b32 s8, 0
s_getpc_b64 s[14:15]
s_add_u32 s14, s14, _ZL31d_xorwow_sequence_jump_matrices@rel32@lo+4
s_addc_u32 s15, s15, _ZL31d_xorwow_sequence_jump_matrices@rel32@hi+12
.LBB0_3:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_and_b32_e32 v10, 3, v6
s_mov_b32 s19, exec_lo
v_cmpx_ne_u32_e32 0, v10
s_cbranch_execz .LBB0_12
s_mov_b32 s20, 0
s_mov_b32 s21, 0
.LBB0_5:
s_mov_b32 s9, s8
s_mov_b32 s10, s8
s_mov_b32 s11, s8
s_mov_b32 s12, s8
v_dual_mov_b32 v0, s8 :: v_dual_mov_b32 v1, s9
v_dual_mov_b32 v2, s10 :: v_dual_mov_b32 v3, s11
v_mov_b32_e32 v4, s12
s_mov_b64 s[10:11], s[14:15]
s_mov_b32 s9, 0
.LBB0_6:
s_delay_alu instid0(SALU_CYCLE_1)
s_lshr_b32 s0, s9, 3
s_mov_b64 s[12:13], 0
s_and_b32 s0, s0, 0x1ffffffc
s_mov_b64 s[16:17], s[10:11]
v_add_nc_u32_e32 v11, s0, v9
s_and_b32 s0, s9, 31
ds_load_b32 v11, v11
s_waitcnt lgkmcnt(0)
v_bfe_u32 v11, v11, s0, 1
s_delay_alu instid0(VALU_DEP_1)
v_cmp_eq_u32_e32 vcc_lo, 0, v11
.LBB0_7:
s_load_b32 s6, s[16:17], 0x0
s_cmp_eq_u32 s12, 1
s_cselect_b32 s0, -1, 0
s_cmp_eq_u32 s12, 2
v_cndmask_b32_e64 v11, v0, v1, s0
s_cselect_b32 s1, -1, 0
s_cmp_eq_u32 s12, 3
s_cselect_b32 s4, -1, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v11, v11, v2, s1
s_cmp_eq_u32 s12, 4
s_cselect_b32 s5, -1, 0
s_cmp_eq_u32 s12, 0
v_cndmask_b32_e64 v11, v11, v3, s4
s_delay_alu instid0(VALU_DEP_1)
v_cndmask_b32_e64 v11, v11, v4, s5
s_waitcnt lgkmcnt(0)
v_cndmask_b32_e64 v12, s6, 0, vcc_lo
s_cselect_b32 s6, -1, 0
s_add_u32 s12, s12, 1
s_addc_u32 s13, s13, 0
s_add_u32 s16, s16, 4
v_xor_b32_e32 v11, v12, v11
s_addc_u32 s17, s17, 0
s_cmp_eq_u32 s12, 5
s_delay_alu instid0(VALU_DEP_1)
v_cndmask_b32_e64 v4, v4, v11, s5
v_cndmask_b32_e64 v3, v3, v11, s4
v_cndmask_b32_e64 v2, v2, v11, s1
v_cndmask_b32_e64 v1, v1, v11, s0
v_cndmask_b32_e64 v0, v0, v11, s6
s_cbranch_scc0 .LBB0_7
s_add_i32 s9, s9, 1
s_add_u32 s10, s10, 20
s_addc_u32 s11, s11, 0
s_cmpk_lg_i32 s9, 0xa0
s_cbranch_scc1 .LBB0_6
v_mov_b32_e32 v11, v9
s_mov_b64 s[0:1], 0
.LBB0_10:
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s0, 1
s_cselect_b32 vcc_lo, -1, 0
s_cmp_eq_u32 s0, 2
v_cndmask_b32_e32 v12, v0, v1, vcc_lo
s_cselect_b32 vcc_lo, -1, 0
s_cmp_eq_u32 s0, 3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v12, v12, v2, vcc_lo
s_cselect_b32 vcc_lo, -1, 0
s_cmp_eq_u32 s0, 4
v_cndmask_b32_e32 v12, v12, v3, vcc_lo
s_cselect_b32 vcc_lo, -1, 0
s_add_u32 s0, s0, 1
s_addc_u32 s1, s1, 0
s_cmp_eq_u32 s0, 5
v_cndmask_b32_e32 v12, v12, v4, vcc_lo
ds_store_b32 v11, v12
v_add_nc_u32_e32 v11, 4, v11
s_cbranch_scc0 .LBB0_10
s_add_i32 s21, s21, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_eq_u32_e32 vcc_lo, s21, v10
s_or_b32 s20, vcc_lo, s20
s_and_not1_b32 exec_lo, exec_lo, s20
s_cbranch_execnz .LBB0_5
.LBB0_12:
s_or_b32 exec_lo, exec_lo, s19
v_lshrrev_b64 v[0:1], 2, v[6:7]
v_cmp_gt_u64_e32 vcc_lo, 4, v[6:7]
s_add_u32 s14, s14, 0xc80
s_addc_u32 s15, s15, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_dual_mov_b32 v7, v1 :: v_dual_mov_b32 v6, v0
s_or_b32 s7, vcc_lo, s7
s_and_not1_b32 exec_lo, exec_lo, s7
s_cbranch_execnz .LBB0_3
.LBB0_13:
s_or_b32 exec_lo, exec_lo, s18
s_load_b64 s[0:1], s[2:3], 0x0
v_mov_b32_e32 v4, 0
ds_load_2addr_b64 v[0:3], v8 offset0:4 offset1:5
ds_store_2addr_b32 v8, v4, v4 offset0:1 offset1:2
ds_load_2addr_b64 v[9:12], v8 offset0:2 offset1:3
ds_load_2addr_b64 v[13:16], v8 offset1:1
s_waitcnt lgkmcnt(0)
v_mad_i64_i32 v[6:7], null, v5, 48, s[0:1]
s_clause 0x2
global_store_b128 v[6:7], v[0:3], off offset:32
global_store_b128 v[6:7], v[9:12], off offset:16
global_store_b128 v[6:7], v[13:16], off
.LBB0_14:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| rng_init | 8,013 | 3,166 | stackv2-00000-of-00015 |
// Demangled: exclusive_prefix_sum_gpu(int*, int*, int, int)
Function : _Z24exclusive_prefix_sum_gpuPiS_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans1;
LDCU UR8, c[0x0][0x394] &wr=0x2 ?trans1;
LDCU UR5, c[0x0][0x370] &wr=0x3 ?trans1;
IMAD R5, R5, UR4, R0 &req={1} ?trans1;
UIMAD UR4, UR4, UR5, URZ &req={3} ?WAIT4_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR8, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R8, c[0x0][0x390] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x394] &wr=0x2 ?trans1;
ISETP.NE.AND P0, PT, R8, RZ, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x1c0 &req={2,1} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
ISETP.NE.AND P0, PT, R5, RZ, PT ?WAIT7_END_GROUP;
LDC.64 R6, c[0x0][0x388] &wr=0x1 ?trans6;
@P0 IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
@P0 LDG.E R3, desc[UR6][R2.64+-0x4] &wr=0x2 ?trans1;
@!P0 LDC.64 R8, c[0x0][0x388] &wr=0x0 ?trans1;
@P0 IMAD.WIDE R6, R5.reuse, 0x4, R6 &req={1} ?trans1;
IADD3 R5, PT, PT, R5, UR4, RZ ?WAIT4_END_GROUP;
@P0 STG.E desc[UR6][R6.64], R3 &req={2} &rd=0x1 ?trans4;
@!P0 STG.E desc[UR6][R8.64], RZ &req={0} &rd=0x1 ?trans1;
ISETP.GE.AND P0, PT, R5, UR5, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xf0 &req={1} ?trans5;
EXIT ?trans5;
UI2F.U32.RP UR5, UR4 ?trans2;
IADD3 R9, PT, PT, RZ, -UR4, RZ ?trans1;
ISETP.NE.U32.AND P2, PT, RZ, UR4, PT ?trans1;
LDCU.128 UR12, c[0x0][0x380] &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0x500 ?trans4;
MUFU.RCP R0, UR5 &wr=0x1 ?trans2;
LDCU UR5, c[0x0][0x390] &wr=0x2 ?trans1;
IADD3 R2, PT, PT, R0, 0xffffffe, RZ &req={1} ?WAIT2_END_GROUP;
IADD3 R0, PT, PT, R5, UR4, RZ ?trans2;
F2I.FTZ.U32.TRUNC.NTZ R3, R2 &rd=0x1 &wr=0x3 ?trans3;
ISETP.GE.AND P0, PT, R0.reuse, UR8, PT ?trans1;
VIMNMX.S32 R7, R0, UR8, !PT ?trans1;
LDCU UR8, c[0x0][0x394] &wr=0x4 ?trans3;
SEL R4, RZ, 0x1, P0 ?trans1;
HFMA2 R2, -RZ, RZ, 0, 0 &req={1} ?WAIT4_END_GROUP;
IADD3 R7, PT, PT, R7, -R0, -R4 ?trans1;
IMAD R9, R9, R3, RZ &req={3} ?WAIT4_END_GROUP;
IMAD.HI.U32 R6, R3, R9, R2 ?WAIT6_END_GROUP;
IMAD.HI.U32 R3, R6, R7, RZ ?WAIT5_END_GROUP;
IADD3 R0, PT, PT, -R3, RZ, RZ ?WAIT5_END_GROUP;
IMAD R7, R0, UR4, R7 ?trans2;
LDC R0, c[0x0][0x390] &wr=0x1 ?trans3;
ISETP.GE.U32.AND P0, PT, R7, UR4, PT ?WAIT13_END_GROUP;
@P0 IADD3 R7, PT, PT, R7, -UR4, RZ ?trans2;
@P0 IADD3 R3, PT, PT, R3, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R7, UR4, PT ?WAIT13_END_GROUP;
@P1 IADD3 R3, PT, PT, R3, 0x1, RZ ?trans2;
@!P2 LOP3.LUT R3, RZ, UR4, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R3, PT, PT, R4, R3, RZ ?WAIT4_END_GROUP;
IADD3 R2, PT, PT, R3.reuse, 0x1, RZ ?trans1;
ISETP.GE.U32.AND P0, PT, R3, 0x3, PT ?WAIT3_END_GROUP;
LOP3.LUT P1, R2, R2, 0x3, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P1 BRA 0x4f0 &req={4,2,1,0} ?trans5;
LDC.64 R14, c[0x0][0x380] &wr=0x0 ?trans1;
IADD3 R4, PT, PT, -R2, RZ, RZ ?trans1;
IMAD.WIDE R2, R8, 0x4, RZ ?WAIT6_END_GROUP;
LDC.64 R12, c[0x0][0x388] &wr=0x1 ?trans2;
ISETP.GE.AND P1, PT, R5.reuse, UR5, PT ?trans1;
IMAD.WIDE R10, R5, 0x4, R14 &req={0} ?WAIT12_END_GROUP;
@P1 IADD.64 R6, -R2, R10 ?trans2;
@P1 LDG.E R17, desc[UR6][R10.64] &wr=0x2 ?trans5;
@P1 LDG.E R6, desc[UR6][R6.64] &wr=0x2 ?trans1;
IMAD.WIDE R8, R5, 0x4, R12 &req={1} ?trans1;
@P1 IADD3 R17, PT, PT, R6, R17, RZ &req={2} ?WAIT5_END_GROUP;
@P1 STG.E desc[UR6][R8.64], R17 &rd=0x2 ?trans4;
@!P1 LDG.E R19, desc[UR6][R10.64] &wr=0x3 ?trans1;
IADD3 R4, PT, PT, R4, 0x1, RZ ?trans2;
IADD3 R5, PT, PT, R5, UR4, RZ ?trans1;
@!P1 STG.E desc[UR6][R8.64], R19 &req={3} &rd=0x2 ?trans2;
ISETP.NE.AND P1, PT, R4, RZ, PT ?WAIT13_END_GROUP;
@P1 BRA 0x410 &req={2} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
@!P0 EXIT ?trans5;
ISETP.GE.AND P0, PT, R5, R0, PT ?WAIT13_END_GROUP;
@P0 IADD3 R9, PT, PT, R5, -R0, RZ &req={1} ?trans1;
@P0 MOV.64 R2, UR12 ?WAIT6_END_GROUP;
@P0 IMAD.WIDE R8, R9, 0x4, R2 ?WAIT4_END_GROUP;
@P0 IMAD.WIDE R10, R0, 0x4, R8 ?trans2;
@P0 LDG.E R8, desc[UR6][R8.64] &wr=0x2 ?trans4;
@P0 LDG.E R11, desc[UR6][R10.64] &wr=0x2 ?trans1;
@P0 MOV.64 R6, UR14 ?trans2;
@!P0 MOV.64 R2, UR12 ?WAIT4_END_GROUP;
@P0 IMAD.WIDE R12, R5, 0x4, R6 ?WAIT4_END_GROUP;
@!P0 IMAD.WIDE R14, R5.reuse, 0x4, R2 ?trans1;
IADD3 R23, PT, PT, R5, UR4, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R23, R0, PT ?trans1;
@P0 IADD3 R19, PT, PT, R8, R11, RZ &req={2} ?WAIT5_END_GROUP;
@P0 STG.E desc[UR6][R12.64], R19 &rd=0x0 ?trans4;
@!P0 LDG.E R15, desc[UR6][R14.64] &wr=0x2 ?trans3;
@P1 IADD3 R9, PT, PT, R23, -R0, RZ ?trans1;
@!P0 MOV.64 R6, UR14 ?WAIT4_END_GROUP;
@P1 IMAD.WIDE R8, R9, 0x4, R2 ?WAIT4_END_GROUP;
@!P0 IMAD.WIDE R16, R5, 0x4, R6 ?WAIT4_END_GROUP;
@P1 IMAD.WIDE R4, R0, 0x4, R8 ?trans1;
@!P0 STG.E desc[UR6][R16.64], R15 &req={2} &rd=0x1 ?trans4;
@P1 LDG.E R8, desc[UR6][R8.64] &wr=0x2 ?trans4;
@P1 LDG.E R5, desc[UR6][R4.64] &wr=0x2 ?trans1;
@P1 IMAD.WIDE R10, R23, 0x4, R6 ?WAIT4_END_GROUP;
@!P1 IMAD.WIDE R12, R23.reuse, 0x4, R2 &req={0} ?trans1;
IADD3 R25, PT, PT, R23, UR4, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R25, R0, PT ?trans1;
@P1 IADD3 R19, PT, PT, R8, R5, RZ &req={2} ?WAIT5_END_GROUP;
@P1 STG.E desc[UR6][R10.64], R19 &rd=0x0 ?trans4;
@!P1 LDG.E R13, desc[UR6][R12.64] &wr=0x2 ?trans3;
@P0 IADD3 R21, PT, PT, R25, -R0, RZ ?trans1;
@!P1 IMAD.WIDE R16, R23, 0x4, R6 &req={1} ?WAIT4_END_GROUP;
@P0 IMAD.WIDE R14, R21, 0x4, R2 ?WAIT4_END_GROUP;
@P0 IMAD.WIDE R4, R0, 0x4, R14 ?trans1;
@!P1 STG.E desc[UR6][R16.64], R13 &req={2} &rd=0x1 ?trans4;
@P0 LDG.E R14, desc[UR6][R14.64] &wr=0x2 ?trans4;
@P0 LDG.E R5, desc[UR6][R4.64] &wr=0x2 ?trans1;
@P0 IMAD.WIDE R8, R25, 0x4, R6 ?WAIT4_END_GROUP;
@!P0 IMAD.WIDE R10, R25.reuse, 0x4, R2 &req={0} ?trans1;
IADD3 R23, PT, PT, R25, UR4, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R23, R0, PT ?trans1;
@P0 IADD3 R19, PT, PT, R14, R5, RZ &req={2} ?WAIT5_END_GROUP;
@P0 STG.E desc[UR6][R8.64], R19 &rd=0x0 ?trans4;
@!P0 LDG.E R11, desc[UR6][R10.64] &wr=0x2 ?trans3;
@P1 IADD3 R21, PT, PT, R23, -R0, RZ ?trans1;
@!P0 IMAD.WIDE R16, R25, 0x4, R6 &req={1} ?WAIT4_END_GROUP;
@P1 IMAD.WIDE R12, R21, 0x4, R2 ?WAIT4_END_GROUP;
@P1 IMAD.WIDE R14, R0, 0x4, R12 ?trans1;
@!P0 STG.E desc[UR6][R16.64], R11 &req={2} &rd=0x1 ?trans4;
@P1 LDG.E R12, desc[UR6][R12.64] &wr=0x2 ?trans4;
@P1 LDG.E R15, desc[UR6][R14.64] &wr=0x2 ?trans1;
@P1 IMAD.WIDE R8, R23, 0x4, R6 &req={0} ?WAIT4_END_GROUP;
@!P1 IMAD.WIDE R2, R23, 0x4, R2 ?trans1;
@P1 IADD3 R19, PT, PT, R12, R15, RZ &req={2} ?WAIT5_END_GROUP;
@P1 STG.E desc[UR6][R8.64], R19 &rd=0x1 ?trans4;
@!P1 LDG.E R3, desc[UR6][R2.64] &wr=0x2 ?trans1;
@!P1 IMAD.WIDE R6, R23.reuse, 0x4, R6 ?trans1;
IADD3 R5, PT, PT, R23, UR4, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR8, PT ?trans1;
@!P1 STG.E desc[UR6][R6.64], R3 &req={2} &rd=0x1 ?WAIT12_END_GROUP;
@!P0 BRA 0x510 ?trans5;
EXIT ?trans5;
BRA 0x900;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: exclusive_prefix_sum_gpu(int*, int*, int, int)
_Z24exclusive_prefix_sum_gpuPiS_ii:
s_clause 0x1
s_load_b32 s6, s[0:1], 0x24
s_load_b64 s[2:3], s[0:1], 0x10
s_add_u32 s4, s0, 24
s_addc_u32 s5, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s8, s6, 0xffff
s_mov_b32 s6, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_16
s_load_b32 s9, s[4:5], 0x0
s_load_b128 s[4:7], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_cmp_lg_u32 s2, 0
s_mov_b32 s10, s2
s_cselect_b32 s12, -1, 0
s_ashr_i32 s11, s2, 31
v_lshlrev_b64 v[2:3], 2, v[1:2]
s_lshl_b64 s[14:15], s[10:11], 2
v_mov_b32_e32 v0, 0
s_mov_b32 s1, 0
s_waitcnt lgkmcnt(0)
s_mul_i32 s8, s9, s8
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_ashr_i32 s9, s8, 31
s_lshl_b64 s[10:11], s[8:9], 2
s_sub_u32 s9, s4, s14
s_subb_u32 s13, s5, s15
.LBB0_2:
s_and_b32 vcc_lo, exec_lo, s12
s_cbranch_vccz .LBB0_8
s_mov_b32 s0, exec_lo
v_cmpx_le_i32_e64 s2, v1
s_xor_b32 s0, exec_lo, s0
s_cbranch_execz .LBB0_5
v_add_co_u32 v4, vcc_lo, s9, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s13, v3, vcc_lo
v_add_co_u32 v6, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v3, vcc_lo
s_clause 0x1
global_load_b32 v4, v[4:5], off
global_load_b32 v5, v[6:7], off
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v6, v5, v4
v_add_co_u32 v4, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
global_store_b32 v[4:5], v6, off
.LBB0_5:
s_and_not1_saveexec_b32 s0, s0
s_cbranch_execz .LBB0_7
v_add_co_u32 v4, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
global_load_b32 v6, v[4:5], off
v_add_co_u32 v4, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
s_waitcnt vmcnt(0)
global_store_b32 v[4:5], v6, off
.LBB0_7:
s_or_b32 exec_lo, exec_lo, s0
s_mov_b32 s0, 0
s_branch .LBB0_9
.LBB0_8:
s_mov_b32 s0, -1
.LBB0_9:
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 vcc_lo, exec_lo, s0
s_cbranch_vccnz .LBB0_15
s_mov_b32 s0, exec_lo
v_cmpx_ne_u32_e32 0, v1
s_xor_b32 s0, exec_lo, s0
s_cbranch_execz .LBB0_12
v_add_co_u32 v4, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
global_load_b32 v6, v[4:5], off offset:-4
v_add_co_u32 v4, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
s_waitcnt vmcnt(0)
global_store_b32 v[4:5], v6, off
.LBB0_12:
s_and_not1_saveexec_b32 s0, s0
s_cbranch_execz .LBB0_14
global_store_b32 v0, v0, s[6:7]
.LBB0_14:
s_or_b32 exec_lo, exec_lo, s0
.LBB0_15:
v_add_nc_u32_e32 v1, s8, v1
v_add_co_u32 v2, s0, v2, s10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v3, s0, s11, v3, s0
v_cmp_le_i32_e32 vcc_lo, s3, v1
s_or_b32 s1, vcc_lo, s1
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execnz .LBB0_2
.LBB0_16:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| exclusive_prefix_sum_gpu | 3,964 | 1,588 | stackv2-00000-of-00015 |
// Demangled: recurrentKernel()
Function : _Z15recurrentKernelv
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
EXIT ?trans5;
BRA 0x20;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: recurrentKernel()
_Z15recurrentKernelv:
s_endpgm
| recurrentKernel | 94 | 14 | stackv2-00000-of-00015 |
// Demangled: fun1(float*, float*)
Function : _Z4fun1PfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R9, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R9, R9, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R9, 0x1, PT ?WAIT13_END_GROUP;
@!P0 EXIT &req={0} ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IADD3 R7, PT, PT, R9.reuse, -0x1, RZ ?trans1;
IMAD.WIDE.U32 R2, R9, 0x4, R4 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R7, 0x4, R4 ?trans2;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
LDC.64 R6, c[0x0][0x380] &wr=0x0 ?trans3;
LDG.E R5, desc[UR4][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R6, R9, 0x4, R6 &req={0} ?WAIT4_END_GROUP;
FADD R9, R2, R5 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x130;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: fun1(float*, float*)
_Z4fun1PfS_:
s_load_b32 s2, s[0:1], 0x1c
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_lt_i32_e32 0, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[0:3], s[0:1], 0x0
v_mov_b32_e32 v2, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s2, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b64 v[2:3], v[2:3], off offset:-4
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v3, v2
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| fun1 | 535 | 461 | stackv2-00000-of-00015 |
// Demangled: get_pooled_idx(int, int, int, int, int const*, int*, int*)
Function : _Z14get_pooled_idxiiiiPKiPiS1_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x388] &wr=0x2 ?trans7;
LDC R8, c[0x0][0x360] &wr=0x1 ?trans1;
MOV R13, UR5 &req={2} ?trans1;
IMAD R8, R8, UR4, R3 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R8, R13, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R0, c[0x0][0x384] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.Y &wr=0x2 ?trans1;
ISETP.GE.AND P0, PT, R0, 0x1, PT &req={0} ?trans1;
HFMA2 R0, -RZ, RZ, 0, 0 ?WAIT12_END_GROUP;
@!P0 BRA 0x2c0 &req={2,1} ?trans5;
LDC R15, c[0x0][0x38c] &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0x2c0 ?trans1;
IMAD R9, R13, UR4, R8 ?trans1;
MOV R11, RZ ?trans1;
MOV R0, RZ ?trans1;
LDCU UR5, c[0x0][0x388] &wr=0x1 ?trans3;
LDC R10, c[0x0][0x384] &wr=0x2 ?trans8;
LDC.64 R6, c[0x0][0x398] &wr=0x3 ?trans8;
LDC.64 R4, c[0x0][0x390] &req={1} &wr=0x4 ?trans2;
MOV R13, UR5 ?trans1;
IMAD R3, R10, UR4, R11 &req={2} ?WAIT4_END_GROUP;
IMAD R3, R3, R13, R8 ?WAIT4_END_GROUP;
IMAD.WIDE R2, R3, 0x4, R4 &req={4} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR6][R2.64] &wr=0x2 ?trans1;
BSSY.RELIABLE B1, 0x280 ?trans1;
ISETP.NE.AND P0, PT, R2, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x270 ?trans5;
ISETP.GE.AND P0, PT, R0, R15, PT &req={0} ?WAIT13_END_GROUP;
@P0 BREAK.RELIABLE B1 ?trans5;
@P0 BRA 0x2b0 ?trans5;
IMAD R3, R9, R15, R0 ?trans1;
IADD3 R0, PT, PT, R0, 0x1, RZ ?WAIT3_END_GROUP;
IMAD.WIDE R2, R3, 0x4, R6 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R11 &rd=0x1 ?trans2;
BSYNC.RELIABLE B1 ?trans5;
IADD3 R11, PT, PT, R11, 0x1, RZ &req={1} ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R11, R10, PT ?WAIT13_END_GROUP;
@P0 BRA 0x180 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
ISETP.NE.AND P0, PT, R0, RZ, PT ?WAIT13_END_GROUP;
@!P0 LDC.64 R2, c[0x0][0x3a0] &wr=0x1 ?trans1;
@!P0 IMAD R7, R13, UR4, R8 &req={3} ?trans1;
@!P0 MOV R5, 0x1 ?WAIT3_END_GROUP;
@!P0 IMAD.WIDE R2, R7, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
@!P0 STG.E desc[UR6][R2.64], R5 &rd=0x1 ?trans1;
@!P0 EXIT ?trans5;
LDCU UR5, c[0x0][0x38c] &wr=0x2 ?trans2;
MOV R11, UR5 &req={2} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, R11, PT ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
IADD3 R2, PT, PT, -R0, R11, RZ &req={1} ?trans1;
IMAD R7, R13, UR4, R8 ?trans1;
LDCU UR4, c[0x0][0x38c] &wr=0x1 ?trans1;
BSSY.RECONVERGENT B0, 0x630 ?trans1;
MOV R6, R0 ?trans1;
LOP3.LUT P0, R10, R2, 0x3, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x620 ?trans5;
IABS R15, R0.reuse &req={0} ?trans1;
LDC.64 R2, c[0x0][0x398] &wr=0x0 ?trans1;
IMAD R13, R7, R11, R0 ?trans1;
IADD3 R10, PT, PT, -R10, RZ, RZ ?trans1;
I2F.RP R6, R15 &wr=0x2 ?trans2;
MUFU.RCP R6, R6 &req={2} &wr=0x2 ?trans2;
IADD3 R4, PT, PT, R6, 0xffffffe, RZ &req={2} ?trans1;
MOV R6, R0 ?WAIT3_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R5, R4 &rd=0x2 &wr=0x3 ?trans2;
HFMA2 R4, -RZ, RZ, 0, 0 &req={2} ?trans1;
IADD3 R8, PT, PT, RZ, -R5, RZ &req={3} ?WAIT5_END_GROUP;
IMAD R9, R8, R15, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R12, R5, R9, R4 &req={0} ?WAIT7_END_GROUP;
IABS R4, R0 ?trans2;
IABS R5, R6 &req={2} ?trans1;
ISETP.GE.AND P1, PT, R6, RZ, PT ?trans1;
IADD3 R8, PT, PT, RZ, -R4, RZ ?trans1;
MOV R11, UR4 &req={1} ?trans2;
IMAD.HI.U32 R4, R12, R5, RZ ?WAIT4_END_GROUP;
IMAD R4, R4, R8, R5 ?trans1;
IABS R5, R0 ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P0, PT, R15, R4, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R4, PT, PT, R4, -R5, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R15, R4, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R4, PT, PT, R4, -R5, RZ ?WAIT4_END_GROUP;
@!P1 IADD3 R4, PT, PT, -R4, RZ, RZ ?WAIT5_END_GROUP;
IMAD R5, R7, R11, R4 ?WAIT4_END_GROUP;
IMAD.WIDE R4, R5, 0x4, R2 ?WAIT6_END_GROUP;
LDG.E R5, desc[UR6][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE R8, R13.reuse, 0x4, R2 ?trans1;
IADD3 R10, PT, PT, R10, 0x1, RZ ?trans2;
IADD3 R6, PT, PT, R6, 0x1, RZ ?trans2;
IADD3 R13, PT, PT, R13, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R10, RZ, PT ?trans1;
STG.E desc[UR6][R8.64], R5 &req={2} &rd=0x2 ?WAIT12_END_GROUP;
@P0 BRA 0x4b0 ?trans5;
BSYNC.RECONVERGENT B0 &req={1} ?trans5;
IADD3 R2, PT, PT, R0, -R11, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R2, -0x4, PT ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
IABS R8, R0.reuse &req={2} ?trans1;
LDC.64 R4, c[0x0][0x398] &wr=0x1 ?trans1;
ISETP.NE.AND P0, PT, R0, RZ, PT ?trans1;
IMAD R11, R7, R11, R6 ?trans1;
I2F.RP R9, R8 &wr=0x2 ?trans1;
LOP3.LUT R10, RZ, R0, RZ, 0x33, !PT ?trans1;
LDCU UR4, c[0x0][0x38c] &wr=0x3 ?trans3;
LDC.64 R2, c[0x0][0x398] &wr=0x4 ?trans1;
MUFU.RCP R9, R9 &req={2} &wr=0x2 ?trans1;
IADD.64 R4, R4, 0x8 &req={1} ?WAIT3_END_GROUP;
IADD3 R12, PT, PT, R9, 0xffffffe, RZ &req={2} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R13, R12 &rd=0x1 &wr=0x2 ?trans2;
HFMA2 R12, -RZ, RZ, 0, 0 &req={1} ?trans1;
IADD3 R15, PT, PT, RZ, -R13, RZ &req={2,0} ?WAIT5_END_GROUP;
IMAD R15, R15, R8, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R9, R13, R15, R12 &req={4,3} ?WAIT7_END_GROUP;
IABS R13, R0 &req={0} ?trans2;
IABS R12, R6 ?trans2;
IABS R15, R0 ?trans2;
IADD3 R14, PT, PT, RZ, -R13, RZ ?trans1;
IMAD.HI.U32 R13, R9, R12, RZ ?trans1;
ISETP.GE.AND P2, PT, R6, RZ, PT ?trans1;
LOP3.LUT R16, RZ, R0, RZ, 0x33, !PT ?trans2;
IMAD R13, R13, R14, R12 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R8, R13, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R13, PT, PT, R13, -R15, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R8, R13, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R13, PT, PT, R13, -R15, RZ ?trans1;
ISETP.NE.AND P1, PT, R0, RZ, PT ?WAIT3_END_GROUP;
@!P2 IADD3 R13, PT, PT, -R13, RZ, RZ ?WAIT5_END_GROUP;
SEL R12, R16, R13, !P1 ?WAIT5_END_GROUP;
IMAD R19, R7, UR4, R12 ?WAIT4_END_GROUP;
IMAD.WIDE R18, R19, 0x4, R2 ?WAIT5_END_GROUP;
LDG.E R21, desc[UR6][R18.64] &rd=0x0 &wr=0x2 ?trans1;
I2F.RP R22, R15 &wr=0x1 ?trans1;
IADD3 R20, PT, PT, R6, 0x1, RZ ?WAIT4_END_GROUP;
IABS R24, R20 ?trans1;
ISETP.GE.AND P3, PT, R20, RZ, PT ?trans1;
MUFU.RCP R22, R22 &req={1} &wr=0x1 ?trans2;
IADD3 R23, PT, PT, R22, 0xffffffe, RZ &req={1} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R13, R23 &wr=0x1 ?trans2;
IADD3 R12, PT, PT, RZ, -R13, RZ &req={1} ?WAIT5_END_GROUP;
IMAD R17, R12, R15, RZ ?trans1;
MOV R12, RZ ?WAIT5_END_GROUP;
IMAD.HI.U32 R17, R13, R17, R12 ?trans1;
MOV R12, R24 ?WAIT5_END_GROUP;
IMAD.HI.U32 R13, R17, R12, RZ ?WAIT4_END_GROUP;
IMAD R12, R13, R14, R12 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P2, PT, R15, R12, PT ?WAIT13_END_GROUP;
@!P2 IADD3 R12, PT, PT, R12, -R15, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P2, PT, R15, R12, PT ?WAIT13_END_GROUP;
@!P2 IADD3 R12, PT, PT, R12, -R15, RZ ?WAIT4_END_GROUP;
@!P3 IADD3 R12, PT, PT, -R12, RZ, RZ ?WAIT5_END_GROUP;
SEL R12, R16, R12, !P1 ?WAIT5_END_GROUP;
IMAD R19, R7, UR4, R12 &req={0} ?trans2;
IMAD.WIDE R12, R11, 0x4, R4 ?WAIT4_END_GROUP;
IMAD.WIDE R18, R19, 0x4, R2 ?trans1;
STG.E desc[UR6][R12.64+-0x8], R21 &req={2} &rd=0x0 ?trans4;
LDG.E R23, desc[UR6][R18.64] &rd=0x1 &wr=0x2 ?trans1;
IADD3 R20, PT, PT, R6, 0x2, RZ ?WAIT4_END_GROUP;
IABS R22, R20 ?trans1;
ISETP.GE.AND P3, PT, R20, RZ, PT ?WAIT4_END_GROUP;
IMAD.HI.U32 R25, R17, R22, RZ ?WAIT4_END_GROUP;
IMAD R22, R25, R14, R22 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P2, PT, R15, R22, PT ?WAIT13_END_GROUP;
@!P2 IADD3 R22, PT, PT, R22, -R15, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P2, PT, R15, R22, PT ?WAIT13_END_GROUP;
@!P2 IADD3 R22, PT, PT, R22, -R15, RZ ?WAIT4_END_GROUP;
@!P3 IADD3 R22, PT, PT, -R22, RZ, RZ ?WAIT5_END_GROUP;
SEL R16, R16, R22, !P1 ?WAIT5_END_GROUP;
IMAD R19, R7, UR4, R16 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R18, R19, 0x4, R2 ?trans1;
IADD3 R16, PT, PT, R6, 0x3, RZ ?trans1;
STG.E desc[UR6][R12.64+-0x4], R23 &req={2} &rd=0x0 ?trans4;
LDG.E R19, desc[UR6][R18.64] &wr=0x2 ?trans1;
IABS R20, R16 ?trans1;
ISETP.GE.AND P2, PT, R16, RZ, PT ?WAIT4_END_GROUP;
IMAD.HI.U32 R17, R17, R20, RZ ?WAIT4_END_GROUP;
IMAD R14, R17, R14, R20 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R15, R14, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R14, PT, PT, R14, -R15, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R15, R14, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R14, PT, PT, R14, -R15, RZ ?WAIT4_END_GROUP;
@!P2 IADD3 R14, PT, PT, -R14, RZ, RZ ?WAIT5_END_GROUP;
SEL R14, R10, R14, !P0 ?WAIT5_END_GROUP;
IMAD R15, R7, UR4, R14 ?WAIT4_END_GROUP;
IMAD.WIDE R14, R15, 0x4, R2 ?trans1;
STG.E desc[UR6][R12.64], R19 &req={2} &rd=0x0 ?trans5;
LDG.E R15, desc[UR6][R14.64] &wr=0x2 ?trans1;
IADD3 R6, PT, PT, R6, 0x4, RZ ?trans2;
IADD3 R11, PT, PT, R11, 0x4, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P1, PT, R6, UR4, PT ?trans1;
STG.E desc[UR6][R12.64+0x4], R15 &req={2} &rd=0x0 ?WAIT12_END_GROUP;
@P1 BRA 0x760 ?trans5;
EXIT ?trans5;
BRA 0xc50;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: get_pooled_idx(int, int, int, int, int const*, int*, int*)
_Z14get_pooled_idxiiiiPKiPiS1_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x34
s_load_b128 s[4:7], s[0:1], 0x4
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
s_mul_i32 s14, s14, s2
s_mov_b32 s2, exec_lo
v_add_nc_u32_e32 v1, s14, v0
v_cmpx_gt_i32_e64 s5, v1
s_cbranch_execz .LBB1_19
s_clause 0x1
s_load_b128 s[8:11], s[0:1], 0x10
s_load_b64 s[2:3], s[0:1], 0x20
s_cmp_lt_i32 s4, 1
s_cbranch_scc1 .LBB1_11
s_mul_i32 s0, s15, s5
v_mov_b32_e32 v4, 0
v_add_nc_u32_e32 v2, s0, v1
s_mul_i32 s0, s0, s4
s_mov_b32 s1, 0
s_delay_alu instid0(VALU_DEP_1)
v_mul_lo_u32 v5, v2, s6
v_add3_u32 v2, s14, s0, v0
s_mov_b32 s0, 0
.LBB1_3:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
s_mov_b32 s7, -1
s_mov_b32 s13, -1
s_mov_b32 s12, exec_lo
v_lshlrev_b64 v[6:7], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v6, vcc_lo, s8, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s9, v7, vcc_lo
global_load_b32 v0, v[6:7], off
s_waitcnt vmcnt(0)
v_cmpx_ne_u32_e32 0, v0
s_cbranch_execz .LBB1_7
s_mov_b32 s13, 0
s_mov_b32 s14, exec_lo
v_cmpx_gt_i32_e64 s6, v4
s_cbranch_execz .LBB1_6
v_add_nc_u32_e32 v6, v4, v5
v_mov_b32_e32 v0, s1
v_add_nc_u32_e32 v4, 1, v4
s_mov_b32 s13, exec_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v7, 31, v6
v_lshlrev_b64 v[6:7], 2, v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v6, vcc_lo, s10, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s11, v7, vcc_lo
global_store_b32 v[6:7], v0, off
.LBB1_6:
s_or_b32 exec_lo, exec_lo, s14
s_delay_alu instid0(SALU_CYCLE_1)
s_or_not1_b32 s13, s13, exec_lo
.LBB1_7:
s_or_b32 exec_lo, exec_lo, s12
s_and_saveexec_b32 s12, s13
s_add_i32 s1, s1, 1
v_add_nc_u32_e32 v2, s5, v2
s_cmp_eq_u32 s4, s1
s_cselect_b32 s7, -1, 0
s_delay_alu instid0(SALU_CYCLE_1)
s_or_not1_b32 s7, s7, exec_lo
s_or_b32 exec_lo, exec_lo, s12
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s7, exec_lo, s7
s_or_b32 s0, s7, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s0
s_cbranch_execnz .LBB1_3
s_or_b32 exec_lo, exec_lo, s0
s_branch .LBB1_12
.LBB1_11:
v_mov_b32_e32 v4, 0
.LBB1_12:
s_mov_b32 s0, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_ne_u32_e32 0, v4
s_xor_b32 s1, exec_lo, s0
s_cbranch_execz .LBB1_17
s_mov_b32 s4, exec_lo
v_cmpx_gt_i32_e64 s6, v4
s_cbranch_execz .LBB1_16
v_ashrrev_i32_e32 v0, 31, v4
s_mov_b32 s7, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v2, v4, v0
v_xor_b32_e32 v2, v2, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_cvt_f32_u32_e32 v0, v2
v_mad_u64_u32 v[5:6], null, s15, s5, v[1:2]
v_sub_nc_u32_e32 v1, 0, v2
v_rcp_iflag_f32_e32 v0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mul_lo_u32 v3, v5, s6
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
v_cvt_u32_f32_e32 v5, v0
v_add_nc_u32_e32 v0, v4, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_lo_u32 v6, v1, v5
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_mul_hi_u32 v6, v5, v6
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v0, vcc_lo, s10, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_add_nc_u32_e32 v5, v5, v6
.LBB1_15:
v_ashrrev_i32_e32 v6, 31, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v7, v4, v6
v_add_nc_u32_e32 v4, 1, v4
v_xor_b32_e32 v7, v7, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v8, v7, v5
v_mul_lo_u32 v8, v8, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v7, v7, v8
v_sub_nc_u32_e32 v8, v7, v2
v_cmp_ge_u32_e32 vcc_lo, v7, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v7, v7, v8, vcc_lo
v_sub_nc_u32_e32 v8, v7, v2
v_cmp_ge_u32_e32 vcc_lo, v7, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v7, v7, v8, vcc_lo
v_xor_b32_e32 v7, v7, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v7, v6
v_add_nc_u32_e32 v6, v6, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v7, 31, v6
v_lshlrev_b64 v[6:7], 2, v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v6, vcc_lo, s10, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s11, v7, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s6, v4
global_load_b32 v6, v[6:7], off
s_or_b32 s7, vcc_lo, s7
s_waitcnt vmcnt(0)
global_store_b32 v[0:1], v6, off
v_add_co_u32 v0, s0, v0, 4
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v1, s0, 0, v1, s0
s_and_not1_b32 exec_lo, exec_lo, s7
s_cbranch_execnz .LBB1_15
.LBB1_16:
s_or_b32 exec_lo, exec_lo, s4
.LBB1_17:
s_and_not1_saveexec_b32 s0, s1
s_cbranch_execz .LBB1_19
v_mad_u64_u32 v[2:3], null, s15, s5, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[0:1], 2, v[2:3]
v_mov_b32_e32 v2, 1
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB1_19:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| get_pooled_idx | 4,871 | 3,158 | stackv2-00000-of-00015 |
// Demangled: roipool3d_forward(int, int, int, int, int, float const*, int const*, float const*, float*, int*)
Function : _Z17roipool3d_forwardiiiiiPKfPKiS0_PfPi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR7, c[0x0][0x390] &wr=0x2 ?trans1;
S2R R13, SR_CTAID.Z &wr=0x3 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x3 ?trans5;
S2UR UR6, SR_CTAID.Y &wr=0x4 ?trans8;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans8;
LDC R4, c[0x0][0x388] &wr=0x4 ?trans1;
IMAD R0, R0, UR4, R3 &req={1} ?trans1;
ISETP.LE.AND P0, PT, R4, UR6, PT &req={4} ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R0, UR7, P0 &req={2} ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R13, UR5, P0 &req={3} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x3b8] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD R7, R13, R4, UR6 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R7, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R2, RZ, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDC.64 R4, c[0x0][0x3a0] &wr=0x0 ?trans1;
IMAD R7, R7, UR7, R0 ?trans1;
LDCU UR6, c[0x0][0x384] &wr=0x1 ?trans6;
LDC.64 R10, c[0x0][0x398] &wr=0x2 ?trans8;
LDC R6, c[0x0][0x38c] &wr=0x3 ?trans1;
IMAD.WIDE R4, R7, 0x4, R4 &req={0} ?WAIT6_END_GROUP;
LDG.E R4, desc[UR4][R4.64] &wr=0x1 ?trans2;
IMAD R13, R13, UR6, R4 &req={1} ?WAIT4_END_GROUP;
IMAD R3, R13, 0x3, RZ ?WAIT4_END_GROUP;
IMAD.WIDE R10, R3, 0x4, R10 &req={2} ?trans2;
LDC.64 R2, c[0x0][0x3b0] &wr=0x0 ?trans3;
LDG.E R15, desc[UR4][R10.64] &wr=0x2 ?trans1;
IADD3 R0, PT, PT, R6, 0x3, RZ &req={3} ?WAIT5_END_GROUP;
IMAD R9, R7, R0, RZ ?WAIT4_END_GROUP;
IMAD.WIDE R4, R9, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R15 &req={2} &rd=0x0 ?trans4;
LDG.E R7, desc[UR4][R10.64+0x4] &wr=0x2 ?trans1;
ISETP.GE.AND P0, PT, R6, 0x1, PT ?WAIT3_END_GROUP;
STG.E desc[UR4][R4.64+0x4], R7 &req={2} &rd=0x0 ?trans4;
LDG.E R17, desc[UR4][R10.64+0x8] &wr=0x2 ?trans4;
STG.E desc[UR4][R4.64+0x8], R17 &req={2} &rd=0x0 ?trans2;
@!P0 EXIT ?trans5;
ISETP.GE.U32.AND P1, PT, R6.reuse, 0x10, PT ?trans1;
LOP3.LUT R18, R6, 0xf, RZ, 0xc0, !PT ?trans1;
HFMA2 R7, -RZ, RZ, 0, 0 &req={0} ?trans2;
IMAD R0, R13, R6, RZ ?trans1;
SHF.R.S32.HI R8, RZ, 0x1f, R9 ?trans1;
ISETP.NE.AND P0, PT, R18, RZ, PT ?WAIT7_END_GROUP;
@!P1 BRA 0x630 ?trans6;
LDCU.64 UR6, c[0x0][0x3b0] &wr=0x0 ?trans1;
LDC.64 R10, c[0x0][0x3a8] &wr=0x1 ?trans1;
LOP3.LUT R14, R6, 0x7ffffff0, RZ, 0xc0, !PT ?trans1;
MOV R7, RZ ?trans1;
MOV R17, R0 ?trans2;
IADD3 R16, PT, PT, -R14, RZ, RZ ?trans2;
LEA R12, P1, R9, UR6, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R13, R9, UR7, R8, 0x2, P1 ?trans1;
IADD.64 R10, R10, 0x20 &req={1} ?WAIT4_END_GROUP;
IADD.64 R12, R12, 0x24 ?WAIT8_END_GROUP;
IMAD.WIDE R14, R17, 0x4, R10 ?WAIT5_END_GROUP;
LDG.E R19, desc[UR4][R14.64+-0x20] &wr=0x2 ?trans4;
STG.E desc[UR4][R12.64+-0x18], R19 &req={2} &rd=0x0 ?trans4;
LDG.E R21, desc[UR4][R14.64+-0x1c] &wr=0x2 ?trans4;
STG.E desc[UR4][R12.64+-0x14], R21 &req={2} &rd=0x1 ?trans4;
LDG.E R23, desc[UR4][R14.64+-0x18] &wr=0x2 ?trans4;
STG.E desc[UR4][R12.64+-0x10], R23 &req={2} &rd=0x2 ?trans4;
LDG.E R25, desc[UR4][R14.64+-0x14] &wr=0x3 ?trans4;
STG.E desc[UR4][R12.64+-0xc], R25 &req={3} &rd=0x3 ?trans4;
LDG.E R27, desc[UR4][R14.64+-0x10] &wr=0x4 ?trans4;
STG.E desc[UR4][R12.64+-0x8], R27 &req={4} &rd=0x4 ?trans4;
LDG.E R29, desc[UR4][R14.64+-0xc] &wr=0x5 ?trans4;
STG.E desc[UR4][R12.64+-0x4], R29 &req={5} &rd=0x5 ?trans4;
LDG.E R19, desc[UR4][R14.64+-0x8] &req={0} &wr=0x2 ?trans4;
STG.E desc[UR4][R12.64], R19 &req={2} &rd=0x0 ?trans4;
LDG.E R21, desc[UR4][R14.64+-0x4] &req={1} &wr=0x2 ?trans4;
STG.E desc[UR4][R12.64+0x4], R21 &req={2} &rd=0x1 ?trans4;
LDG.E R23, desc[UR4][R14.64] &wr=0x2 ?trans4;
STG.E desc[UR4][R12.64+0x8], R23 &req={2} &rd=0x2 ?trans4;
LDG.E R25, desc[UR4][R14.64+0x4] &req={3} &wr=0x3 ?trans4;
STG.E desc[UR4][R12.64+0xc], R25 &req={3} &rd=0x3 ?trans4;
LDG.E R27, desc[UR4][R14.64+0x8] &req={4} &wr=0x4 ?trans4;
STG.E desc[UR4][R12.64+0x10], R27 &req={4} ?trans4;
LDG.E R29, desc[UR4][R14.64+0xc] &req={5} &wr=0x4 ?trans4;
STG.E desc[UR4][R12.64+0x14], R29 &req={4} ?trans4;
LDG.E R19, desc[UR4][R14.64+0x10] &req={0} &wr=0x4 ?trans4;
STG.E desc[UR4][R12.64+0x18], R19 &req={4} ?trans4;
LDG.E R21, desc[UR4][R14.64+0x14] &req={1} &wr=0x4 ?trans4;
STG.E desc[UR4][R12.64+0x1c], R21 &req={4} ?trans4;
LDG.E R23, desc[UR4][R14.64+0x18] &req={2} &wr=0x2 ?trans1;
IADD3 R16, PT, PT, R16, 0x10, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R16, RZ, PT ?trans1;
STG.E desc[UR4][R12.64+0x20], R23 &req={2} ?trans4;
LDG.E R25, desc[UR4][R14.64+0x1c] &req={3} &wr=0x2 ?trans1;
IADD3 R7, PT, PT, R7, 0x10, RZ ?trans2;
IADD3 R17, PT, PT, R17, 0x10, RZ ?trans1;
STG.E desc[UR4][R12.64+0x24], R25 &req={2} &rd=0x0 ?trans2;
IADD.64 R12, R12, 0x40 &req={0} ?WAIT2_END_GROUP;
@P1 BRA 0x3c0 ?trans6;
@!P0 EXIT ?trans5;
ISETP.GE.U32.AND P0, PT, R18, 0x8, PT ?trans1;
LOP3.LUT R14, R6, 0x7, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R14, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x7d0 ?trans6;
LDC.64 R10, c[0x0][0x3a8] &wr=0x0 ?trans1;
IADD3 R13, PT, PT, R0, R7, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R10, R13, 0x4, R10 &req={0} ?WAIT5_END_GROUP;
LDG.E R15, desc[UR4][R10.64] &wr=0x2 ?trans1;
IMAD.WIDE R12, R7, 0x4, R4 ?WAIT5_END_GROUP;
STG.E desc[UR4][R12.64+0xc], R15 &req={2} &rd=0x0 ?trans4;
LDG.E R17, desc[UR4][R10.64+0x4] &wr=0x2 ?trans4;
STG.E desc[UR4][R12.64+0x10], R17 &req={2} &rd=0x1 ?trans4;
LDG.E R19, desc[UR4][R10.64+0x8] &wr=0x2 ?trans4;
STG.E desc[UR4][R12.64+0x14], R19 &req={2} &rd=0x2 ?trans4;
LDG.E R21, desc[UR4][R10.64+0xc] &wr=0x3 ?trans4;
STG.E desc[UR4][R12.64+0x18], R21 &req={3} &rd=0x2 ?trans4;
LDG.E R23, desc[UR4][R10.64+0x10] &wr=0x3 ?trans4;
STG.E desc[UR4][R12.64+0x1c], R23 &req={3} &rd=0x2 ?trans4;
LDG.E R25, desc[UR4][R10.64+0x14] &wr=0x3 ?trans4;
STG.E desc[UR4][R12.64+0x20], R25 &req={3} &rd=0x2 ?trans4;
LDG.E R15, desc[UR4][R10.64+0x18] &req={0} &wr=0x3 ?trans4;
STG.E desc[UR4][R12.64+0x24], R15 &req={3} &rd=0x2 ?trans4;
LDG.E R17, desc[UR4][R10.64+0x1c] &req={1} &wr=0x3 ?trans1;
IADD3 R7, PT, PT, R7, 0x8, RZ ?WAIT3_END_GROUP;
STG.E desc[UR4][R12.64+0x28], R17 &req={3} &rd=0x2 ?trans4;
@!P1 EXIT ?trans5;
ISETP.GE.U32.AND P0, PT, R14, 0x4, PT ?trans1;
LOP3.LUT R6, R6, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R6, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x8f0 ?trans6;
LDC.64 R10, c[0x0][0x3a8] &wr=0x0 ?trans1;
IADD3 R13, PT, PT, R0, R7, RZ &req={2} ?WAIT5_END_GROUP;
IMAD.WIDE R10, R13, 0x4, R10 &req={0} ?WAIT5_END_GROUP;
LDG.E R13, desc[UR4][R10.64] &wr=0x2 ?trans1;
IMAD.WIDE R4, R7, 0x4, R4 ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64+0xc], R13 &req={2} &rd=0x0 ?trans4;
LDG.E R15, desc[UR4][R10.64+0x4] &wr=0x2 ?trans4;
STG.E desc[UR4][R4.64+0x10], R15 &req={2} &rd=0x0 ?trans4;
LDG.E R17, desc[UR4][R10.64+0x8] &wr=0x2 ?trans4;
STG.E desc[UR4][R4.64+0x14], R17 &req={2} &rd=0x0 ?trans4;
LDG.E R19, desc[UR4][R10.64+0xc] &wr=0x2 ?trans1;
IADD3 R7, PT, PT, R7, 0x4, RZ ?WAIT3_END_GROUP;
STG.E desc[UR4][R4.64+0x18], R19 &req={2} &rd=0x0 ?trans4;
@!P1 EXIT ?trans5;
LDC.64 R10, c[0x0][0x3a8] &wr=0x1 ?trans1;
SHF.L.U64.HI R5, R9.reuse, 0x2, R8 &req={0} ?trans1;
IMAD.SHL.U32 R4, R9, 0x4, RZ ?trans1;
IADD3 R6, PT, PT, -R6, RZ, RZ ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R4, R7, 0x4, R4 ?trans1;
IADD3 R7, PT, PT, R0, R7, RZ ?WAIT4_END_GROUP;
IADD.64 R4, R4, R2 ?WAIT4_END_GROUP;
IADD.64 R4, R4, 0xc ?WAIT8_END_GROUP;
IMAD.WIDE R2, R7, 0x4, R10 &req={1} ?WAIT6_END_GROUP;
LDG.E R3, desc[UR4][R2.64] &wr=0x3 ?trans1;
IADD3 R6, PT, PT, R6, 0x1, RZ ?trans2;
IADD3 R7, PT, PT, R7, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R6, RZ, PT ?trans1;
STG.E desc[UR4][R4.64], R3 &req={3} &rd=0x0 ?trans2;
IADD.64 R4, R4, 0x4 &req={0} ?WAIT10_END_GROUP;
@P0 BRA 0x980 ?trans5;
EXIT ?trans5;
BRA 0xa10;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: roipool3d_forward(int, int, int, int, int, float const*, int const*, float const*, float*, int*)
_Z17roipool3d_forwardiiiiiPKfPKiS0_PfPi:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x4c
s_load_b32 s16, s[0:1], 0x10
s_load_b128 s[8:11], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s13, s2, v[0:1]
s_cmp_lt_i32 s14, s10
s_cselect_b32 s2, -1, 0
v_cmp_gt_i32_e32 vcc_lo, s16, v1
s_and_b32 s2, s2, vcc_lo
s_cmp_lt_i32 s15, s8
s_cselect_b32 s3, -1, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, s3, s2
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB2_7
s_load_b64 s[2:3], s[0:1], 0x38
s_mul_i32 s4, s15, s10
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s12, s4, s14
s_ashr_i32 s13, s12, 31
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[4:5], s[12:13], 2
s_waitcnt lgkmcnt(0)
s_add_u32 s2, s2, s4
s_addc_u32 s3, s3, s5
s_load_b32 s2, s[2:3], 0x0
s_waitcnt lgkmcnt(0)
s_cmp_lg_u32 s2, 0
s_cbranch_scc1 .LBB2_7
s_load_b256 s[0:7], s[0:1], 0x18
v_mad_u64_u32 v[2:3], null, s12, s16, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[0:1], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
s_add_i32 s2, s11, 3
global_load_b32 v3, v[0:1], off
s_waitcnt vmcnt(0)
v_mad_u64_u32 v[0:1], null, s15, s9, v[3:4]
v_mul_lo_u32 v1, v2, s2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshl_add_u32 v3, v0, 1, v0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v4, 31, v3
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[5:6], 2, v[3:4]
v_add_co_u32 v3, vcc_lo, s6, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v4, vcc_lo, s7, v2, vcc_lo
v_add_co_u32 v5, vcc_lo, s0, v5
s_delay_alu instid0(VALU_DEP_4)
v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
s_mov_b64 s[0:1], 0
.LBB2_3:
s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
v_add_co_u32 v7, vcc_lo, v5, s0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v8, vcc_lo, s1, v6, vcc_lo
global_load_b32 v9, v[7:8], off
v_add_co_u32 v7, vcc_lo, v3, s0
v_add_co_ci_u32_e32 v8, vcc_lo, s1, v4, vcc_lo
s_add_u32 s0, s0, 4
s_addc_u32 s1, s1, 0
s_cmp_eq_u32 s0, 12
s_waitcnt vmcnt(0)
global_store_b32 v[7:8], v9, off
s_cbranch_scc0 .LBB2_3
s_cmp_lt_i32 s11, 1
s_cbranch_scc1 .LBB2_7
v_mul_lo_u32 v3, v0, s11
v_add_co_u32 v0, vcc_lo, v1, s6
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v2, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v0, vcc_lo, v0, 12
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
v_lshlrev_b64 v[2:3], 2, v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
.LBB2_6:
global_load_b32 v4, v[2:3], off
v_add_co_u32 v2, vcc_lo, v2, 4
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
s_add_i32 s11, s11, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lg_u32 s11, 0
s_waitcnt vmcnt(0)
global_store_b32 v[0:1], v4, off
v_add_co_u32 v0, vcc_lo, v0, 4
v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
s_cbranch_scc1 .LBB2_6
.LBB2_7:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| roipool3d_forward | 4,708 | 2,033 | stackv2-00000-of-00015 |
// Demangled: borderPrimeCount(int*, int*, int)
Function : _Z16borderPrimeCountPiS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_TID.Y &wr=0x1 ?trans7;
S2UR UR5, SR_CTAID.Y ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x2 ?trans1;
S2R R7, SR_TID.X &wr=0x3 ?trans1;
LDCU UR8, c[0x0][0x360] &wr=0x3 ?trans5;
S2UR UR6, SR_CTAID.X &wr=0x2 ?trans8;
LDC R0, c[0x0][0x364] &wr=0x1 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x4 ?trans1;
UIMAD UR4, UR4, UR5, UR6 &req={2} ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC R6, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD R0, R0, UR4, R5 &req={1} ?WAIT4_END_GROUP;
IMAD R7, R0, UR8, R7 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R7, 0x4, R2 &req={4} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR6][R2.64] &req={2} &rd=0x1 &wr=0x5 ?trans1;
BSSY.RECONVERGENT B0, 0x300 ?trans1;
IADD3 R0, PT, PT, R6, -0x1, RZ &req={0} ?WAIT5_END_GROUP;
IMAD R4, R0, R6, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, R4, PT ?WAIT5_END_GROUP;
ISETP.LT.OR P0, PT, R7, R6, P0 ?WAIT13_END_GROUP;
@P0 BRA 0x2f0 &req={1} ?trans5;
IABS R8, R6 ?trans2;
IABS R10, R7 ?trans2;
I2F.RP R3, R8 &wr=0x0 ?trans2;
MUFU.RCP R3, R3 &req={0} &wr=0x0 ?trans2;
IADD3 R4, PT, PT, R3, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R5, R4 &rd=0x0 &wr=0x1 ?trans2;
HFMA2 R4, -RZ, RZ, 0, 0 &req={0} ?trans1;
IADD3 R9, PT, PT, RZ, -R5, RZ &req={1} ?WAIT5_END_GROUP;
IMAD R9, R9, R8, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R5, R5, R9, R4 ?trans1;
MOV R9, R10 ?WAIT5_END_GROUP;
IMAD.HI.U32 R5, R5, R9, RZ ?WAIT5_END_GROUP;
IADD3 R5, PT, PT, -R5, RZ, RZ ?WAIT5_END_GROUP;
IMAD R3, R8, R5, R9 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R8, R3, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R3, PT, PT, R3, -R8, RZ ?trans1;
ISETP.GE.AND P0, PT, R7, RZ, PT ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P1, PT, R8, R3, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R3, PT, PT, R3, -R8, RZ ?trans1;
ISETP.NE.AND P1, PT, R6, RZ, PT ?WAIT3_END_GROUP;
@!P0 IADD3 R3, PT, PT, -R3, RZ, RZ ?WAIT10_END_GROUP;
@!P1 LOP3.LUT R3, RZ, R6, RZ, 0x33, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R3.reuse, R0, PT ?trans1;
ISETP.NE.AND P1, PT, R3, RZ, PT ?WAIT13_END_GROUP;
@P0 EXIT P1 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
I2FP.F32.S32 R0, R2 &req={5} ?trans1;
BSSY.RECONVERGENT B0, 0x3f0 ?trans3;
MUFU.RSQ R3, R0 &rd=0x0 &wr=0x1 ?trans1;
IADD3 R4, PT, PT, R0, -0xd000000, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R4, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x3a0 &req={1,0} ?trans5;
MOV R8, 0x380 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x6e0 ?trans5;
MOV R0, R3 ?trans1;
BRA 0x3e0 ?trans6;
FMUL.FTZ R5, R0, R3 ?trans1;
FMUL.FTZ R3, R3, 0.5 ?WAIT3_END_GROUP;
FFMA R0, -R5, R5, R0 ?WAIT4_END_GROUP;
FFMA R0, R0, R3, R5 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
FSETP.GE.AND P1, PT, R0, 2, PT ?trans1;
BSSY.RECONVERGENT B0, 0x640 ?trans1;
PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x80 ?WAIT11_END_GROUP;
@!P1 BRA 0x630 ?trans5;
HFMA2 R11, -RZ, RZ, 0, 1.1920928955078125e-07 ?trans1;
IABS R6, R2 ?WAIT7_END_GROUP;
IABS R8, R11.reuse ?trans2;
IABS R9, R11 ?trans2;
I2F.RP R3, R8 &wr=0x0 ?trans2;
IADD3 R10, PT, PT, RZ, -R9, RZ ?trans1;
MUFU.RCP R3, R3 &req={0} &wr=0x0 ?trans2;
IADD3 R4, PT, PT, R3, 0xffffffe, RZ &req={0} ?trans2;
IABS R3, R2 ?WAIT2_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R5, R4 &rd=0x0 &wr=0x1 ?trans2;
MOV R4, RZ &req={0} ?trans1;
IADD3 R7, PT, PT, RZ, -R5, RZ &req={1} ?WAIT5_END_GROUP;
IMAD R7, R7, R8, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R5, R5, R7, R4 ?WAIT6_END_GROUP;
IMAD.HI.U32 R5, R5, R6, RZ ?WAIT4_END_GROUP;
IMAD R5, R5, R10, R3 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R8, R5, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R5, PT, PT, R5, -R8, RZ ?trans1;
ISETP.GE.AND P0, PT, R2, RZ, PT ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P1, PT, R8, R5, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R5, PT, PT, R5, -R8, RZ ?trans1;
ISETP.NE.AND P1, PT, R11, RZ, PT ?WAIT3_END_GROUP;
@!P0 IADD3 R5, PT, PT, -R5, RZ, RZ ?trans2;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?WAIT8_END_GROUP;
@!P1 LOP3.LUT R5, RZ, R11, RZ, 0x33, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R5, RZ, PT ?WAIT13_END_GROUP;
@!P1 BRA 0x630 ?trans5;
IADD3 R11, PT, PT, R11, 0x1, RZ ?WAIT4_END_GROUP;
I2FP.F32.U32 R3, R11 ?WAIT5_END_GROUP;
FSETP.GE.AND P0, PT, R0, R3, PT ?WAIT13_END_GROUP;
@P0 BRA 0x450 ?trans5;
PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x80 ?WAIT13_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
ISETP.LT.OR P0, PT, R2, 0x2, P0 ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
S2R R0, SR_LANEID &wr=0x0 ?trans1;
VOTEU.ANY UR4, UPT, PT ?trans1;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans1;
UFLO.U32 UR5, UR4 ?trans2;
POPC R5, UR4 &wr=0x1 ?trans4;
ISETP.EQ.U32.AND P0, PT, R0, UR5, PT &req={0} ?WAIT13_END_GROUP;
@P0 REDG.E.ADD.STRONG.GPU desc[UR6][R2.64], R5 &req={1} ?trans1;
EXIT ?trans5;
LOP3.LUT P0, RZ, R0, 0x7fffffff, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 MOV R3, R0 ?trans1;
@!P0 BRA 0x810 ?trans6;
FSETP.GEU.FTZ.AND P0, PT, R0, RZ, PT ?WAIT13_END_GROUP;
@!P0 MOV R3, 0x7fffffff ?trans1;
@!P0 BRA 0x810 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P0 FADD.FTZ R3, R0, 1 ?trans1;
@P0 BRA 0x810 ?trans6;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P0 FFMA R4, R0, 1.84467440737095516160e+19, RZ ?WAIT4_END_GROUP;
@P0 MUFU.RSQ R3, R4 &wr=0x0 ?trans2;
@P0 FMUL.FTZ R5, R4, R3 &req={0} ?trans1;
@P0 FMUL.FTZ R7, R3, 0.5 ?trans1;
@!P0 MOV R3, R0 ?trans2;
@P0 FADD.FTZ R6, -R5, -RZ ?WAIT4_END_GROUP;
@P0 FFMA R6, R5, R6, R4 ?WAIT4_END_GROUP;
@P0 FFMA R6, R6, R7, R5 ?WAIT4_END_GROUP;
@P0 FMUL.FTZ R3, R6, 2.3283064365386962891e-10 ?WAIT7_END_GROUP;
MOV R4, R8 ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R4 0x0 ?trans5;
BRA 0x840;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: borderPrimeCount(int*, int*, int)
_Z16borderPrimeCountPiS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x18
s_load_b32 s3, s[0:1], 0x24
v_bfe_u32 v1, v0, 10, 10
s_load_b32 s8, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_mul_i32 s2, s2, s15
s_lshr_b32 s4, s3, 16
s_add_i32 s2, s2, s14
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, s2, s4, v[1:2]
v_and_b32_e32 v3, 0x3ff, v0
s_and_b32 s2, s3, 0xffff
s_load_b128 s[4:7], s[0:1], 0x0
v_mad_u64_u32 v[0:1], null, v2, s2, v[3:4]
s_mov_b32 s2, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v1, 31, v0
v_cmp_gt_i32_e64 s1, s8, v0
v_lshlrev_b64 v[2:3], 2, v[0:1]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
global_load_b32 v2, v[2:3], off
v_cmpx_le_i32_e64 s8, v0
s_cbranch_execz .LBB0_4
s_add_i32 s0, s8, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_mul_i32 s4, s0, s8
v_cmp_le_i32_e64 s3, s4, v0
v_cmp_gt_i32_e32 vcc_lo, s4, v0
s_and_saveexec_b32 s4, vcc_lo
s_cbranch_execz .LBB0_3
s_ashr_i32 s5, s8, 31
s_and_not1_b32 s3, s3, exec_lo
s_add_i32 s8, s8, s5
v_add_nc_u32_e32 v0, v0, v1
s_xor_b32 s5, s8, s5
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cvt_f32_u32_e32 v3, s5
s_sub_i32 s8, 0, s5
v_xor_b32_e32 v0, v0, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v3, v3
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v3, 0x4f7ffffe, v3
v_cvt_u32_f32_e32 v3, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v4, s8, v3
v_mul_hi_u32 v4, v3, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v3, v3, v4
v_mul_hi_u32 v3, v0, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v3, v3, s5
v_sub_nc_u32_e32 v0, v0, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v3, s5, v0
v_cmp_le_u32_e32 vcc_lo, s5, v0
v_cndmask_b32_e32 v0, v0, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v3, s5, v0
v_cmp_le_u32_e32 vcc_lo, s5, v0
v_cndmask_b32_e32 v0, v0, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v0, v0, v1
v_sub_nc_u32_e32 v0, v0, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_eq_u32_e32 vcc_lo, 0, v0
v_cmp_eq_u32_e64 s0, s0, v0
s_or_b32 s0, vcc_lo, s0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, s0, exec_lo
s_or_b32 s3, s3, s0
.LBB0_3:
s_or_b32 exec_lo, exec_lo, s4
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
s_and_not1_b32 s0, s1, exec_lo
s_and_b32 s1, s3, exec_lo
s_or_b32 s1, s0, s1
.LBB0_4:
s_or_b32 exec_lo, exec_lo, s2
s_and_saveexec_b32 s0, s1
s_cbranch_execz .LBB0_14
s_waitcnt vmcnt(0)
v_cvt_f32_i32_e32 v0, v2
s_mov_b32 s2, -1
s_mov_b32 s1, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_f32_e32 v1, 0x4f800000, v0
v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v0
v_cndmask_b32_e32 v0, v0, v1, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_sqrt_f32_e32 v1, v0
s_waitcnt_depctr 0xfff
v_add_nc_u32_e32 v3, -1, v1
v_add_nc_u32_e32 v4, 1, v1
v_fma_f32 v5, -v3, v1, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v6, -v4, v1, v0
v_cmp_ge_f32_e64 s0, 0, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cndmask_b32_e64 v1, v1, v3, s0
v_cmp_lt_f32_e64 s0, 0, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v1, v1, v4, s0
s_mov_b32 s0, exec_lo
v_mul_f32_e32 v3, 0x37800000, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v1, v1, v3, vcc_lo
v_cmp_class_f32_e64 vcc_lo, v0, 0x260
v_cndmask_b32_e32 v0, v1, v0, vcc_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_le_f32_e32 2.0, v0
s_cbranch_execz .LBB0_11
v_ashrrev_i32_e32 v1, 31, v2
s_mov_b32 s2, 2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v3, v2, v1
v_xor_b32_e32 v3, v3, v1
.LBB0_7:
v_cvt_f32_u32_e32 v4, s2
s_sub_i32 s8, 0, s2
s_and_not1_b32 s5, s5, exec_lo
s_or_b32 s4, s4, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v4, v4
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v4, 0x4f7ffffe, v4
v_cvt_u32_f32_e32 v4, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v5, s8, v4
v_mul_hi_u32 v5, v4, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v4, v4, v5
v_mul_hi_u32 v4, v3, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v4, v4, s2
v_sub_nc_u32_e32 v4, v3, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v5, s2, v4
v_cmp_le_u32_e32 vcc_lo, s2, v4
v_cndmask_b32_e32 v4, v4, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v5, s2, v4
v_cmp_le_u32_e32 vcc_lo, s2, v4
v_cndmask_b32_e32 v4, v4, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v4, v4, v1
v_sub_nc_u32_e32 v4, v4, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_ne_u32_e32 vcc_lo, 0, v4
s_and_b32 s8, vcc_lo, exec_lo
s_or_b32 s5, s5, s8
s_and_saveexec_b32 s8, vcc_lo
s_add_i32 s2, s2, 1
s_and_not1_b32 s4, s4, exec_lo
v_cvt_f32_i32_e32 v4, s2
s_or_b32 s5, s5, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_nge_f32_e32 vcc_lo, v0, v4
s_and_b32 s9, vcc_lo, exec_lo
s_or_b32 s4, s4, s9
s_or_b32 exec_lo, exec_lo, s8
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s8, exec_lo, s4
s_or_b32 s1, s8, s1
s_and_not1_b32 s3, s3, exec_lo
s_and_b32 s8, s5, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s3, s3, s8
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execnz .LBB0_7
s_or_b32 exec_lo, exec_lo, s1
s_delay_alu instid0(SALU_CYCLE_1)
s_or_not1_b32 s2, s3, exec_lo
.LBB0_11:
s_or_b32 exec_lo, exec_lo, s0
v_cmp_lt_i32_e32 vcc_lo, 1, v2
s_and_b32 s0, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 exec_lo, exec_lo, s0
s_cbranch_execz .LBB0_14
s_mov_b32 s0, exec_lo
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mbcnt_lo_u32_b32 v0, s0, 0
v_cmp_eq_u32_e32 vcc_lo, 0, v0
s_and_b32 s1, exec_lo, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 exec_lo, s1
s_cbranch_execz .LBB0_14
s_bcnt1_i32_b32 s0, s0
s_delay_alu instid0(SALU_CYCLE_1)
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s0
global_atomic_add_u32 v0, v1, s[6:7]
.LBB0_14:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| borderPrimeCount | 3,116 | 3,839 | stackv2-00000-of-00015 |
// Demangled: cuda_add(int const*, int const*, int*)
Function : _Z8cuda_addPKiS0_Pi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R9, SR_TID.X &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x360] &wr=0x0 ?trans1;
S2R R0, SR_CTAID.X &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x4 ?trans1;
IMAD R9, R0, UR6, R9 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R9, 0x4, R2 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R9.reuse, 0x4, R4 &req={3} ?trans2;
LDG.E R2, desc[UR4][R2.64] &req={2} &wr=0x2 ?trans4;
LDG.E R5, desc[UR4][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R6, R9, 0x4, R6 &req={4} ?trans1;
IADD3 R9, PT, PT, R2, R5, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x110;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: cuda_add(int const*, int const*, int*)
_Z8cuda_addPKiS0_Pi:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_mov_b32_e32 v2, 0
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| cuda_add | 513 | 479 | stackv2-00000-of-00015 |
// Demangled: Action_noImage_center_GPU(double*, double*, double*, double, int, int, int)
Function : _Z25Action_noImage_center_GPUPdS_S_diii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R4, SR_TID.X &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x3a0] &wr=0x2 ?trans8;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R7, c[0x0][0x3a8] &wr=0x1 ?trans1;
IMAD R5, R3, R2, RZ &req={2} ?WAIT2_END_GROUP;
IMAD R2, R7, UR4, R4 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R2, R5, PT ?WAIT5_END_GROUP;
ISETP.GE.U32.OR P0, PT, R4, R7, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R12, c[0x0][0x390] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD R5, R2, 0x3, RZ ?WAIT6_END_GROUP;
LDC.64 R20, c[0x0][0x388] &wr=0x1 ?trans2;
LDG.E.64 R8, desc[UR6][R20.64] &req={1} &wr=0x2 ?trans4;
LDG.E.64 R10, desc[UR6][R20.64+0x8] &wr=0x3 ?trans1;
IMAD.WIDE R12, R5, 0x8, R12 &req={0} ?WAIT3_END_GROUP;
LDG.E.64 R6, desc[UR6][R20.64+0x10] &wr=0x4 ?trans4;
LDG.E.64 R14, desc[UR6][R12.64] &wr=0x2 ?trans4;
LDG.E.64 R16, desc[UR6][R12.64+0x8] &wr=0x3 ?trans4;
LDG.E.64 R18, desc[UR6][R12.64+0x10] &rd=0x0 &wr=0x4 ?trans1;
I2F.U32.RP R5, R3 &wr=0x1 ?trans2;
MUFU.RCP R5, R5 &req={1} &wr=0x1 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x5 ?trans1;
ISETP.NE.U32.AND P2, PT, R3, RZ, PT ?trans1;
UMOV UR4, 0x400 ?WAIT2_END_GROUP;
ULEA UR4, UR5, UR4, 0x18 &req={5} ?trans1;
DADD R8, R8, -R14 &req={2} &rd=0x1 ?trans2;
IADD3 R14, PT, PT, R5, 0xffffffe, RZ &req={1} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R15, R14 &rd=0x1 &wr=0x2 ?trans2;
MOV R14, RZ &req={1} ?trans1;
IADD3 R0, PT, PT, RZ, -R15, RZ &req={2} ?WAIT5_END_GROUP;
IMAD R13, R0, R3, RZ &req={0} ?WAIT4_END_GROUP;
IMAD.HI.U32 R15, R15, R13, R14 ?WAIT6_END_GROUP;
IMAD.HI.U32 R0, R15, R2, RZ ?WAIT15_END_GROUP;
NOP ?WAIT10_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, R10, -R16 &req={3} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R10, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R8, R8, R10 &req={0} &rd=0x0 ?trans2;
IADD3 R8, PT, PT, -R0, RZ, RZ &req={0} ?WAIT5_END_GROUP;
IMAD R8, R3, R8, R2 ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R8, R3, PT ?WAIT13_END_GROUP;
@P0 IADD3 R8, PT, PT, R8, -R3, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P1, PT, R8, R3, PT ?trans1;
@P0 IADD3 R0, PT, PT, R0, 0x1, RZ ?WAIT12_END_GROUP;
@P1 IADD3 R0, PT, PT, R0, 0x1, RZ ?trans2;
@!P2 LOP3.LUT R0, RZ, R3, RZ, 0x33, !PT ?WAIT5_END_GROUP;
IMAD R5, R0, R3, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R2, R5, PT ?trans1;
IMAD.SHL.U32 R2, R4, 0x8, RZ ?WAIT8_END_GROUP;
DADD R6, R6, -R18 &req={4} &wr=0x0 ?trans1;
IADD3 R4, PT, PT, R2, UR4, RZ ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R6, R6, R10 &req={0} &wr=0x0 ?trans2;
STS.64 [R2+UR4], R10 &req={0} &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 EXIT ?trans5;
LDCU.64 UR8, c[0x0][0x398] &wr=0x1 ?trans1;
ISETP.GE.AND P0, PT, R3, 0x1, PT ?trans1;
MOV.64 R8, UR8 &req={1} ?WAIT12_END_GROUP;
@!P0 BRA 0x1a00 ?trans5;
ISETP.GE.U32.AND P1, PT, R3.reuse, 0x10, PT ?trans1;
LOP3.LUT R12, R3, 0xf, RZ, 0xc0, !PT ?trans1;
MOV R7, RZ ?WAIT4_END_GROUP;
ISETP.NE.AND P0, PT, R12, RZ, PT ?WAIT7_END_GROUP;
@!P1 BRA 0x1040 ?trans6;
LOP3.LUT R6, R3, 0x7ffffff0, RZ, 0xc0, !PT ?trans1;
HFMA2 R7, -RZ, RZ, 0, 0 ?trans1;
IADD3 R5, PT, PT, R4, 0x40, RZ ?trans2;
IADD3 R6, PT, PT, -R6, RZ, RZ ?WAIT7_END_GROUP;
LDS.64 R14, [R5+-0x40] &wr=0x1 ?trans1;
MOV R16, R9 ?trans1;
IADD3 R6, PT, PT, R6, 0x10, RZ ?trans2;
IADD3 R7, PT, PT, R7, 0x10, RZ ?trans1;
LDS.64 R10, [R5+-0x38] &req={0} &wr=0x0 ?trans1;
DSETP.MIN.AND P1, P2, R14, R8, PT &req={1} &wr=0x1 ?trans1;
MOV R13, R15 ?trans1;
SEL R14, R14, R8, P1 &req={1} ?trans2;
LDS.64 R8, [R5+-0x30] &wr=0x1 ?trans2;
FSEL R13, R13, R16, P1 ?trans1;
@P2 LOP3.LUT R13, R16, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R16, R11 &req={0} ?WAIT4_END_GROUP;
MOV R15, R13 ?WAIT5_END_GROUP;
MOV R13, R15 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.MIN.AND P1, P2, R14, R10, PT &wr=0x0 ?trans2;
SEL R14, R14, R10, P1 &req={0} ?trans1;
FSEL R13, R13, R16, P1 ?trans1;
LDS.64 R10, [R5+-0x28] &wr=0x0 ?trans1;
@P2 LOP3.LUT R13, R16, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R16, R9 &req={1} ?WAIT4_END_GROUP;
MOV R15, R13 ?WAIT5_END_GROUP;
MOV R13, R15 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.MIN.AND P1, P2, R14, R8, PT &wr=0x1 ?trans2;
SEL R14, R14, R8, P1 &req={1} ?trans1;
FSEL R13, R13, R16, P1 ?trans1;
LDS.64 R8, [R5+-0x20] &wr=0x1 ?trans1;
@P2 LOP3.LUT R13, R16, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R16, R11 &req={0} ?WAIT4_END_GROUP;
MOV R15, R13 ?WAIT5_END_GROUP;
MOV R13, R15 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.MIN.AND P1, P2, R14, R10, PT &wr=0x0 ?trans2;
SEL R14, R14, R10, P1 &req={0} ?trans1;
FSEL R13, R13, R16, P1 ?trans1;
LDS.64 R10, [R5+-0x18] &wr=0x0 ?trans1;
@P2 LOP3.LUT R13, R16, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R16, R9 &req={1} ?WAIT4_END_GROUP;
MOV R15, R13 ?WAIT5_END_GROUP;
MOV R13, R15 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.MIN.AND P1, P2, R14, R8, PT &wr=0x1 ?trans2;
SEL R14, R14, R8, P1 &req={1} ?trans1;
FSEL R13, R13, R16, P1 ?trans1;
LDS.64 R8, [R5+-0x10] &wr=0x1 ?trans1;
@P2 LOP3.LUT R13, R16, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R16, R11 &req={0} ?WAIT4_END_GROUP;
MOV R15, R13 ?WAIT5_END_GROUP;
MOV R13, R15 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.MIN.AND P1, P2, R14, R10, PT &wr=0x0 ?trans2;
SEL R14, R14, R10, P1 &req={0} ?trans1;
FSEL R13, R13, R16, P1 ?trans1;
LDS.64 R10, [R5+-0x8] &wr=0x0 ?trans1;
@P2 LOP3.LUT R13, R16, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R16, R9 &req={1} ?WAIT4_END_GROUP;
MOV R15, R13 ?WAIT5_END_GROUP;
MOV R13, R15 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.MIN.AND P1, P2, R14, R8, PT &wr=0x1 ?trans2;
SEL R14, R14, R8, P1 &req={1} ?trans1;
FSEL R13, R13, R16, P1 ?trans1;
LDS.64 R8, [R5] &wr=0x1 ?trans1;
@P2 LOP3.LUT R13, R16, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R16, R11 &req={0} ?WAIT4_END_GROUP;
MOV R15, R13 ?WAIT5_END_GROUP;
MOV R13, R15 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.MIN.AND P1, P2, R14, R10, PT &wr=0x0 ?trans2;
SEL R14, R14, R10, P1 &req={0} ?trans1;
FSEL R13, R13, R16, P1 ?trans1;
LDS.64 R10, [R5+0x8] &wr=0x0 ?trans1;
@P2 LOP3.LUT R13, R16, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R16, R9 &req={1} ?WAIT4_END_GROUP;
MOV R15, R13 ?WAIT5_END_GROUP;
MOV R13, R15 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.MIN.AND P1, P2, R14, R8, PT &wr=0x1 ?trans2;
SEL R14, R14, R8, P1 &req={1} ?trans1;
FSEL R13, R13, R16, P1 ?trans1;
LDS.64 R8, [R5+0x10] &wr=0x1 ?trans1;
@P2 LOP3.LUT R13, R16, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R16, R11 &req={0} ?WAIT4_END_GROUP;
MOV R15, R13 ?WAIT5_END_GROUP;
MOV R13, R15 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.MIN.AND P1, P2, R14, R10, PT &wr=0x0 ?trans2;
SEL R14, R14, R10, P1 &req={0} ?trans1;
FSEL R13, R13, R16, P1 ?trans1;
LDS.64 R10, [R5+0x18] &wr=0x0 ?trans1;
@P2 LOP3.LUT R13, R16, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R16, R9 &req={1} ?WAIT4_END_GROUP;
MOV R15, R13 ?WAIT5_END_GROUP;
MOV R13, R15 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.MIN.AND P1, P2, R14, R8, PT &wr=0x1 ?trans2;
SEL R14, R14, R8, P1 &req={1} ?trans1;
FSEL R13, R13, R16, P1 ?trans1;
LDS.64 R8, [R5+0x20] &wr=0x1 ?trans1;
@P2 LOP3.LUT R13, R16, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R16, R11 &req={0} ?WAIT4_END_GROUP;
MOV R15, R13 ?WAIT5_END_GROUP;
MOV R13, R15 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.MIN.AND P1, P2, R14, R10, PT &wr=0x0 ?trans2;
SEL R14, R14, R10, P1 &req={0} ?trans1;
FSEL R13, R13, R16, P1 ?trans1;
LDS.64 R10, [R5+0x28] &wr=0x0 ?trans1;
@P2 LOP3.LUT R13, R16, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R16, R9 &req={1} ?WAIT4_END_GROUP;
MOV R15, R13 ?WAIT5_END_GROUP;
MOV R13, R15 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.MIN.AND P1, P2, R14, R8, PT &wr=0x1 ?trans2;
SEL R14, R14, R8, P1 &req={1} ?trans1;
FSEL R13, R13, R16, P1 ?trans1;
LDS.64 R8, [R5+0x30] &wr=0x1 ?trans1;
@P2 LOP3.LUT R13, R16, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R16, R11 &req={0} ?WAIT4_END_GROUP;
MOV R15, R13 ?WAIT5_END_GROUP;
MOV R13, R15 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.MIN.AND P1, P2, R14, R10, PT &wr=0x0 ?trans2;
SEL R14, R14, R10, P1 &req={0} ?trans1;
FSEL R13, R13, R16, P1 ?trans1;
LDS.64 R10, [R5+0x38] &rd=0x0 &wr=0x2 ?trans1;
@P2 LOP3.LUT R13, R16, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R16, R9 &req={1} ?WAIT4_END_GROUP;
MOV R15, R13 ?trans1;
IADD3 R5, PT, PT, R5, 0x80, RZ &req={0} ?WAIT4_END_GROUP;
MOV R13, R15 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.MIN.AND P1, P2, R14, R8, PT &wr=0x0 ?trans2;
FSEL R13, R13, R16, P1 &req={0} ?trans1;
@P2 LOP3.LUT R13, R16, 0x80000, RZ, 0xfc, !PT ?trans1;
SEL R8, R14, R8, P1 ?trans1;
ISETP.NE.AND P1, PT, R6, RZ, PT ?trans1;
MOV R14, R11 &req={2} ?trans2;
MOV R9, R13 ?WAIT5_END_GROUP;
MOV R13, R9 ?WAIT15_END_GROUP;
NOP ?WAIT6_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.MIN.AND P2, P3, R8, R10, PT &wr=0x0 ?trans2;
FSEL R13, R13, R14, P2 &req={0} ?trans1;
@P3 LOP3.LUT R13, R14, 0x80000, RZ, 0xfc, !PT ?trans1;
SEL R8, R8, R10, P2 ?WAIT4_END_GROUP;
MOV R9, R13 ?trans1;
@P1 BRA 0x520 ?trans6;
@!P0 BRA 0x1a00 ?trans5;
ISETP.GE.U32.AND P1, PT, R12, 0x8, PT ?trans1;
LOP3.LUT R6, R3, 0x7, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R6, RZ, PT ?WAIT7_END_GROUP;
@!P1 BRA 0x1600 ?trans6;
IMAD R5, R7.reuse, 0x8, R4 ?trans1;
MOV R14, R9 ?trans1;
IADD3 R7, PT, PT, R7, 0x8, RZ ?WAIT3_END_GROUP;
LDS.64 R12, [R5] &wr=0x1 ?trans4;
LDS.64 R10, [R5+0x8] &req={0} &wr=0x0 ?trans1;
DSETP.MIN.AND P1, P2, R8, R12, PT &req={1} &wr=0x1 ?trans1;
MOV R15, R13 ?trans1;
SEL R12, R8, R12, P1 &req={1} ?trans2;
LDS.64 R8, [R5+0x10] &wr=0x1 ?trans2;
FSEL R17, R14, R15, P1 ?trans1;
@P2 LOP3.LUT R17, R15, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R15, R11 &req={0} ?WAIT4_END_GROUP;
MOV R13, R17 ?WAIT5_END_GROUP;
MOV R14, R13 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.MIN.AND P1, P2, R12, R10, PT &wr=0x0 ?trans2;
SEL R12, R12, R10, P1 &req={0} ?trans1;
FSEL R17, R14, R15, P1 ?trans1;
LDS.64 R10, [R5+0x18] &wr=0x0 ?trans1;
@P2 LOP3.LUT R17, R15, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R15, R9 &req={1} ?WAIT4_END_GROUP;
MOV R13, R17 ?WAIT5_END_GROUP;
MOV R14, R13 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.MIN.AND P1, P2, R12, R8, PT &wr=0x1 ?trans2;
SEL R12, R12, R8, P1 &req={1} ?trans1;
FSEL R17, R14, R15, P1 ?trans1;
LDS.64 R8, [R5+0x20] &wr=0x1 ?trans1;
@P2 LOP3.LUT R17, R15, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R15, R11 &req={0} ?WAIT4_END_GROUP;
MOV R13, R17 ?WAIT5_END_GROUP;
MOV R14, R13 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.MIN.AND P1, P2, R12, R10, PT &wr=0x0 ?trans2;
SEL R12, R12, R10, P1 &req={0} ?trans1;
FSEL R17, R14, R15, P1 ?trans1;
LDS.64 R10, [R5+0x28] &wr=0x0 ?trans1;
@P2 LOP3.LUT R17, R15, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R15, R9 &req={1} ?WAIT4_END_GROUP;
MOV R13, R17 ?WAIT5_END_GROUP;
MOV R14, R13 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.MIN.AND P1, P2, R12, R8, PT &wr=0x1 ?trans2;
SEL R12, R12, R8, P1 &req={1} ?trans1;
FSEL R17, R14, R15, P1 ?trans1;
LDS.64 R8, [R5+0x30] &wr=0x1 ?trans1;
@P2 LOP3.LUT R17, R15, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R15, R11 &req={0} ?WAIT4_END_GROUP;
MOV R13, R17 ?WAIT5_END_GROUP;
MOV R14, R13 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.MIN.AND P1, P2, R12, R10, PT &wr=0x0 ?trans2;
SEL R10, R12, R10, P1 &req={0} ?trans1;
FSEL R17, R14, R15, P1 ?trans1;
LDS.64 R12, [R5+0x38] &wr=0x0 ?trans1;
@P2 LOP3.LUT R17, R15, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R15, R9 &req={1} ?WAIT4_END_GROUP;
MOV R11, R17 ?WAIT5_END_GROUP;
MOV R14, R11 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.MIN.AND P1, P2, R10, R8, PT &wr=0x1 ?trans2;
FSEL R17, R14, R15, P1 &req={1} ?trans1;
@P2 LOP3.LUT R17, R15, 0x80000, RZ, 0xfc, !PT ?trans1;
SEL R8, R10, R8, P1 ?trans1;
MOV R10, R13 &req={0} ?WAIT3_END_GROUP;
MOV R9, R17 ?WAIT5_END_GROUP;
MOV R5, R9 ?WAIT15_END_GROUP;
NOP ?WAIT6_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.MIN.AND P1, P2, R8, R12, PT &wr=0x0 ?trans2;
FSEL R5, R5, R10, P1 &req={0} ?trans1;
@P2 LOP3.LUT R5, R10, 0x80000, RZ, 0xfc, !PT ?trans1;
SEL R8, R8, R12, P1 ?WAIT4_END_GROUP;
MOV R9, R5 ?WAIT7_END_GROUP;
@!P0 BRA 0x1a00 ?trans5;
ISETP.GE.U32.AND P1, PT, R6, 0x4, PT ?trans1;
LOP3.LUT R3, R3, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R3, RZ, PT ?WAIT7_END_GROUP;
@!P1 BRA 0x1900 ?trans6;
IMAD R6, R7.reuse, 0x8, R4 ?trans1;
MOV R12, R9 ?trans1;
IADD3 R7, PT, PT, R7, 0x4, RZ ?WAIT3_END_GROUP;
LDS.64 R10, [R6] &req={0} &wr=0x0 ?trans4;
LDS.64 R4, [R6+0x8] &wr=0x1 ?trans1;
MOV R13, R11 &req={0} ?trans1;
DSETP.MIN.AND P1, P2, R8, R10, PT &wr=0x0 ?trans2;
SEL R10, R8, R10, P1 &req={0} ?trans2;
LDS.64 R8, [R6+0x10] &wr=0x0 ?trans1;
FSEL R15, R12, R13, P1 ?trans1;
@P2 LOP3.LUT R15, R13, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R13, R5 &req={1} ?WAIT4_END_GROUP;
MOV R11, R15 ?WAIT5_END_GROUP;
MOV R12, R11 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.MIN.AND P1, P2, R10, R4, PT &wr=0x1 ?trans2;
SEL R4, R10, R4, P1 &req={1} ?trans1;
FSEL R15, R12, R13, P1 ?trans1;
LDS.64 R10, [R6+0x18] &wr=0x1 ?trans1;
@P2 LOP3.LUT R15, R13, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R13, R9 &req={0} ?WAIT4_END_GROUP;
MOV R5, R15 ?WAIT5_END_GROUP;
MOV R12, R5 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.MIN.AND P1, P2, R4, R8, PT &wr=0x0 ?trans2;
FSEL R15, R12, R13, P1 &req={0} ?trans1;
@P2 LOP3.LUT R15, R13, 0x80000, RZ, 0xfc, !PT ?trans1;
SEL R4, R4, R8, P1 ?trans1;
MOV R9, R11 &req={1} ?WAIT3_END_GROUP;
MOV R5, R15 ?WAIT5_END_GROUP;
MOV R6, R5 ?WAIT15_END_GROUP;
NOP ?WAIT6_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.MIN.AND P1, P2, R4, R10, PT &wr=0x0 ?trans2;
FSEL R13, R6, R9, P1 &req={0} ?trans1;
@P2 LOP3.LUT R13, R9, 0x80000, RZ, 0xfc, !PT ?trans1;
SEL R8, R4, R10, P1 ?WAIT4_END_GROUP;
MOV R9, R13 ?WAIT7_END_GROUP;
@!P0 BRA 0x1a00 ?trans5;
IMAD R2, R7, 0x8, R2 &req={0} ?trans1;
IADD3 R5, PT, PT, -R3, RZ, RZ ?WAIT4_END_GROUP;
IADD3 R4, PT, PT, R2, UR4, RZ ?WAIT7_END_GROUP;
LDS.64 R2, [R4] &rd=0x0 &wr=0x1 ?trans1;
IADD3 R5, PT, PT, R5, 0x1, RZ ?trans1;
MOV R7, R9 ?WAIT4_END_GROUP;
ISETP.NE.AND P0, PT, R5, RZ, PT ?trans1;
IADD3 R4, PT, PT, R4, 0x8, RZ &req={0} ?trans1;
MOV R6, R3 &req={1} ?trans1;
DSETP.MIN.AND P1, P2, R2, R8, PT &wr=0x0 ?trans2;
SEL R8, R2, R8, P1 &req={0} ?trans2;
FSEL R11, R6, R7, P1 ?trans1;
@P2 LOP3.LUT R11, R7, 0x80000, RZ, 0xfc, !PT ?WAIT5_END_GROUP;
MOV R9, R11 ?trans1;
@P0 BRA 0x1940 ?trans6;
LDC.64 R2, c[0x0][0x380] &req={0} &wr=0x0 ?trans2;
IMAD.WIDE R2, R0, 0x8, R2 &req={0} ?WAIT5_END_GROUP;
STG.E.64 desc[UR6][R2.64], R8 ?trans1;
EXIT ?trans5;
BRA 0x1a40;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: Action_noImage_center_GPU(double*, double*, double*, double, int, int, int)
_Z25Action_noImage_center_GPUPdS_S_diii:
s_load_b128 s[8:11], s[0:1], 0x20
s_waitcnt lgkmcnt(0)
v_mad_u64_u32 v[1:2], null, s15, s10, v[0:1]
s_mul_i32 s2, s9, s8
v_cmp_gt_u32_e32 vcc_lo, s10, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_gt_i32_e64 s2, s2, v1
s_and_b32 s2, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB0_6
s_load_b256 s[0:7], s[0:1], 0x0
v_lshl_add_u32 v2, v1, 1, v1
v_cvt_f32_u32_e32 v8, s9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v3, 31, v2
v_rcp_iflag_f32_e32 v8, v8
s_delay_alu instid0(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 3, v[2:3]
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v8, 0x4f7ffffe, v8
s_waitcnt lgkmcnt(0)
v_add_co_u32 v6, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v3, vcc_lo
s_clause 0x1
global_load_b128 v[2:5], v[6:7], off
global_load_b64 v[6:7], v[6:7], off offset:16
s_clause 0x1
s_load_b128 s[12:15], s[2:3], 0x0
s_load_b64 s[2:3], s[2:3], 0x10
s_waitcnt vmcnt(1) lgkmcnt(0)
v_add_f64 v[4:5], s[14:15], -v[4:5]
v_add_f64 v[2:3], s[12:13], -v[2:3]
s_waitcnt vmcnt(0)
v_add_f64 v[6:7], s[2:3], -v[6:7]
s_sub_i32 s2, 0, s9
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[4:5], v[4:5], v[4:5]
v_fma_f64 v[2:3], v[2:3], v[2:3], v[4:5]
v_cvt_u32_f32_e32 v4, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v5, s2, v4
v_mul_hi_u32 v5, v4, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v4, v4, v5
v_mul_hi_u32 v8, v1, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_lo_u32 v9, v8, s9
v_fma_f64 v[4:5], v[6:7], v[6:7], v[2:3]
v_sub_nc_u32_e32 v2, v1, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v6, s9, v2
v_cmp_le_u32_e32 vcc_lo, s9, v2
v_dual_cndmask_b32 v2, v2, v6 :: v_dual_add_nc_u32 v3, 1, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v3, v8, v3, vcc_lo
v_cmp_le_u32_e32 vcc_lo, s9, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v6, 1, v3
v_dual_cndmask_b32 v2, v3, v6 :: v_dual_lshlrev_b32 v3, 3, v0
s_delay_alu instid0(VALU_DEP_1)
v_mul_lo_u32 v6, v2, s9
ds_store_b64 v3, v[4:5]
s_waitcnt lgkmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, v1, v6
s_barrier
buffer_gl0_inv
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_6
v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
s_cmp_lt_i32 s9, 1
s_cbranch_scc1 .LBB0_5
v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
.LBB0_4:
ds_load_b64 v[4:5], v3
v_max_f64 v[0:1], v[0:1], v[0:1]
v_add_nc_u32_e32 v3, 8, v3
s_add_i32 s9, s9, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
s_cmp_lg_u32 s9, 0
s_waitcnt lgkmcnt(0)
v_max_f64 v[4:5], v[4:5], v[4:5]
v_min_f64 v[0:1], v[0:1], v[4:5]
s_cbranch_scc1 .LBB0_4
.LBB0_5:
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 3, v[2:3]
v_add_co_u32 v2, vcc_lo, s0, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
global_store_b64 v[2:3], v[0:1], off
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| Action_noImage_center_GPU | 8,608 | 1,861 | stackv2-00000-of-00015 |
// Demangled: transitive_closure_stage1_kernel(unsigned int*, int)
Function : _Z32transitive_closure_stage1_kernelPji
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R7, SR_TID.Y &wr=0x1 ?trans7;
LDC R0, c[0x0][0x388] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
S2R R9, SR_TID.X &wr=0x3 ?trans6;
LDC.64 R2, c[0x0][0x380] &wr=0x4 ?trans1;
IMAD R4, R0, 0x8, R7 &req={1} ?WAIT2_END_GROUP;
IMAD R5, R0, 0x8, R9 &req={3} ?WAIT4_END_GROUP;
IMAD R5, R4, 0x40, R5 ?WAIT4_END_GROUP;
IMAD.WIDE R2, R5, 0x4, R2 &req={4} ?WAIT5_END_GROUP;
LDG.E R5, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
BSSY.RECONVERGENT B0, 0x1f0 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?WAIT6_END_GROUP;
LEA R6, R7, UR4, 0x5 ?WAIT5_END_GROUP;
IMAD R4, R9, 0x4, R6 ?WAIT5_END_GROUP;
STS [R4], R5 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R7, [R4] &wr=0x1 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={1} ?trans1;
LEA R7, R9, UR4, 0x2 ?WAIT12_END_GROUP;
@P0 BRA 0x1e0 &req={0} ?trans5;
LDS R5, [R6] &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R5, RZ, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0x1e0 ?trans5;
LDS R5, [R7] &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R5, RZ, PT &req={0} ?WAIT13_END_GROUP;
@P0 LEA R5, R0, 0x2, 0x3 ?WAIT5_END_GROUP;
@P0 STS [R4], R5 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x2c0 ?trans1;
LDS R5, [R4] &req={0} &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R5, RZ, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x2b0 ?trans5;
LDS R5, [R6+0x4] &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R5, RZ, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0x2b0 ?trans5;
LDS R5, [R7+0x20] &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R5, RZ, PT &req={0} ?WAIT13_END_GROUP;
@P0 LEA R5, R0, 0x3, 0x3 ?WAIT5_END_GROUP;
@P0 STS [R4], R5 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x390 ?trans1;
LDS R5, [R4] &req={0} &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R5, RZ, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x380 ?trans5;
LDS R5, [R6+0x8] &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R5, RZ, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0x380 ?trans5;
LDS R5, [R7+0x40] &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R5, RZ, PT &req={0} ?WAIT13_END_GROUP;
@P0 LEA R5, R0, 0x4, 0x3 ?WAIT5_END_GROUP;
@P0 STS [R4], R5 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x460 ?trans1;
LDS R5, [R4] &req={0} &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R5, RZ, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x450 ?trans5;
LDS R5, [R6+0xc] &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R5, RZ, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0x450 ?trans5;
LDS R5, [R7+0x60] &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R5, RZ, PT &req={0} ?WAIT13_END_GROUP;
@P0 LEA R5, R0, 0x5, 0x3 ?WAIT5_END_GROUP;
@P0 STS [R4], R5 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x530 ?trans1;
LDS R5, [R4] &req={0} &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R5, RZ, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x520 ?trans5;
LDS R5, [R6+0x10] &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R5, RZ, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0x520 ?trans5;
LDS R5, [R7+0x80] &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R5, RZ, PT &req={0} ?WAIT13_END_GROUP;
@P0 LEA R5, R0, 0x6, 0x3 ?WAIT5_END_GROUP;
@P0 STS [R4], R5 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x600 ?trans1;
LDS R5, [R4] &req={0} &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R5, RZ, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x5f0 ?trans5;
LDS R5, [R6+0x14] &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R5, RZ, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0x5f0 ?trans5;
LDS R5, [R7+0xa0] &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R5, RZ, PT &req={0} ?WAIT13_END_GROUP;
@P0 LEA R5, R0, 0x7, 0x3 ?WAIT5_END_GROUP;
@P0 STS [R4], R5 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x6d0 ?trans1;
LDS R5, [R4] &req={0} &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R5, RZ, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x6c0 ?trans5;
LDS R5, [R6+0x18] &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R5, RZ, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0x6c0 ?trans5;
LDS R5, [R7+0xc0] &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R5, RZ, PT &req={0} ?WAIT13_END_GROUP;
@P0 LEA R5, R0, 0x8, 0x3 ?WAIT5_END_GROUP;
@P0 STS [R4], R5 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x7a0 ?trans1;
LDS R5, [R4] &req={0} &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R5, RZ, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x790 ?trans5;
LDS R6, [R6+0x1c] &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R6, RZ, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0x790 ?trans5;
LDS R7, [R7+0xe0] &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={0} ?WAIT13_END_GROUP;
@P0 LEA R5, R0, 0x9, 0x3 ?WAIT5_END_GROUP;
@P0 STS [R4], R5 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R5, [R4] &req={0} &wr=0x0 ?trans4;
STG.E desc[UR6][R2.64], R5 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x7e0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: transitive_closure_stage1_kernel(unsigned int*, int)
_Z32transitive_closure_stage1_kernelPji:
s_load_b32 s2, s[0:1], 0x8
v_bfe_u32 v3, v0, 10, 10
v_and_b32_e32 v2, 0x3ff, v0
s_load_b64 s[0:1], s[0:1], 0x0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_lshlrev_b32_e32 v4, 5, v3
s_waitcnt lgkmcnt(0)
s_lshl_b32 s2, s2, 3
v_add_lshl_u32 v0, s2, v3, 6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add3_u32 v0, s2, v2, v0
v_lshlrev_b32_e32 v2, 2, v2
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v3, v4, v2
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_mov_b32 s0, 0
s_or_b32 s1, s2, 2
global_load_b32 v5, v[0:1], off
s_waitcnt vmcnt(0)
ds_store_b32 v3, v5
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB0_1:
ds_load_b32 v5, v3
s_mov_b32 s2, exec_lo
s_waitcnt lgkmcnt(0)
v_cmpx_eq_u32_e32 0, v5
s_cbranch_execz .LBB0_5
v_add_nc_u32_e32 v5, s0, v4
ds_load_b32 v5, v5
s_waitcnt lgkmcnt(0)
v_cmp_ne_u32_e32 vcc_lo, 0, v5
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_5
ds_load_b32 v5, v2
s_waitcnt lgkmcnt(0)
v_cmp_ne_u32_e32 vcc_lo, 0, v5
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_5
v_mov_b32_e32 v5, s1
ds_store_b32 v3, v5
.LBB0_5:
s_or_b32 exec_lo, exec_lo, s2
v_add_nc_u32_e32 v2, 32, v2
s_add_i32 s0, s0, 4
s_add_i32 s1, s1, 1
s_cmp_eq_u32 s0, 32
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB0_1
ds_load_b32 v2, v3
s_waitcnt lgkmcnt(0)
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| transitive_closure_stage1_kernel | 2,843 | 935 | stackv2-00000-of-00015 |
// Demangled: vecAddKernel(float*, float*, float*)
Function : _Z12vecAddKernelPfS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R9, SR_TID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_CTAID.X &wr=0x1 ?trans2;
IMAD R9, R0, UR4, R9 &req={1} ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R9, 0x3e7, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD.WIDE R2, R9, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x4 ?trans1;
IMAD.WIDE R4, R9, 0x4, R4 &req={2} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x4 ?trans1;
IMAD.WIDE R6, R9, 0x4, R6 &req={3} ?WAIT4_END_GROUP;
FADD R9, R2, R5 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x130;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: vecAddKernel(float*, float*, float*)
_Z12vecAddKernelPfS_S_:
s_load_b32 s2, s[0:1], 0x24
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e32 0x3e8, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[4:7], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| vecAddKernel | 542 | 554 | stackv2-00000-of-00015 |
// Demangled: VecAdd(int*, int*, int*)
Function : _Z6VecAddPiS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R9, SR_TID.X &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R2, R9, 0x4, R2 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R9.reuse, 0x4, R4 &req={2} ?trans2;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans4;
LDG.E R5, desc[UR4][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R6, R9, 0x4, R6 &req={3} ?trans1;
IADD3 R9, PT, PT, R2, R5, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0xe0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: VecAdd(int*, int*, int*)
_Z6VecAddPiS_S_:
s_load_b128 s[4:7], s[0:1], 0x0
v_lshlrev_b32_e32 v0, 2, v0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_clause 0x1
global_load_b32 v1, v0, s[4:5]
global_load_b32 v2, v0, s[6:7]
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v1, v2, v1
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| VecAdd | 425 | 192 | stackv2-00000-of-00015 |
// Demangled: cudaMergeSort(int*, int*, int, int, int, dim3*, dim3*)
Function : _Z13cudaMergeSortPiS_iiiP4dim3S1_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x3a0] &wr=0x1 ?trans8;
LDC.64 R4, c[0x0][0x3a8] &wr=0x2 ?trans1;
S2R R11, SR_TID.X &wr=0x3 ?trans1;
S2R R10, SR_TID.Y &wr=0x3 ?trans1;
S2R R14, SR_CTAID.Z &wr=0x4 ?trans1;
S2R R12, SR_TID.Z &wr=0x5 ?trans4;
S2UR UR9, SR_CTAID.Y &wr=0x4 ?trans1;
LDCU.64 UR4, c[0x0][0x390] &wr=0x0 ?trans1;
LDG.E R0, desc[UR6][R2.64] &req={1} &wr=0x3 ?trans4;
LDG.E R7, desc[UR6][R2.64+0x4] &wr=0x4 ?trans2;
S2UR UR8, SR_CTAID.X &wr=0x1 ?trans2;
LDG.E R9, desc[UR6][R4.64+0x4] &req={2} &wr=0x2 ?trans4;
LDG.E R6, desc[UR6][R2.64+0x8] &rd=0x0 &wr=0x5 ?trans2;
LDC R13, c[0x0][0x398] &wr=0x0 ?trans2;
LDG.E R8, desc[UR6][R4.64+0x8] &wr=0x1 ?trans1;
IMAD R3, R13, UR4, RZ &req={0} ?WAIT2_END_GROUP;
IMAD R10, R0.reuse, R10, R11 &req={3} ?trans2;
IMAD R7, R0, R7, RZ &req={4} ?trans2;
IMAD R9, R9, R14, UR9 &req={2} ?trans2;
IMAD R10, R7.reuse, R12, R10 &req={5} ?trans2;
IMAD R6, R7, R6, RZ ?trans2;
IMAD R9, R8, R9, UR8 &req={1} ?WAIT4_END_GROUP;
IMAD R6, R6, R9, R10 ?WAIT4_END_GROUP;
IMAD R3, R6, R3, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R3, UR5, PT ?WAIT5_END_GROUP;
ISETP.LT.OR P0, PT, R13, 0x1, P0 ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
HFMA2 R16, -RZ, RZ, 0, 0 ?trans1;
MOV R13, R3 ?trans1;
USHF.R.S32.HI UR4, URZ, 0x1, UR4 ?WAIT12_END_GROUP;
LDC.64 R6, c[0x0][0x390] &req={1,0} &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0x4b0 ?trans1;
IADD3 R12, PT, PT, R13, R6, RZ &req={0} ?WAIT5_END_GROUP;
VIMNMX.S32 R14, R12, R7, PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R13, R14, PT ?WAIT13_END_GROUP;
@P0 BRA 0x4a0 &req={2} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
IADD3 R0, PT, PT, R13, UR4, RZ ?trans1;
MOV R17, R13 ?WAIT4_END_GROUP;
VIMNMX.S32 R0, R0, R7, PT ?trans2;
LDC.64 R4, c[0x0][0x388] &wr=0x1 ?trans3;
MOV R15, R0 ?WAIT7_END_GROUP;
ISETP.GE.AND P0, PT, R17, R0, PT ?trans1;
BSSY.RECONVERGENT B1, 0x470 ?trans1;
IMAD.WIDE R8, R13, 0x4, R4 &req={2,1} ?WAIT11_END_GROUP;
@!P0 BRA 0x330 &req={0} ?trans5;
IMAD.WIDE R6, R15, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R11, desc[UR6][R6.64] &rd=0x0 &wr=0x5 ?trans1;
BRA 0x440 ?trans5;
ISETP.GE.AND P0, PT, R15, R14, PT ?trans1;
BSSY.RELIABLE B2, 0x410 ?WAIT12_END_GROUP;
@!P0 BRA 0x390 ?trans5;
IMAD.WIDE R6, R17, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R7, desc[UR6][R6.64] &rd=0x0 &wr=0x5 ?trans1;
BRA 0x400 ?trans5;
IMAD.WIDE R6, R17, 0x4, R2 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R10, R15, 0x4, R2 ?trans2;
LDG.E R7, desc[UR6][R6.64] &wr=0x2 ?trans4;
LDG.E R11, desc[UR6][R10.64] &wr=0x2 ?trans2;
ISETP.GE.AND P0, PT, R7, R11, PT &req={2} ?WAIT13_END_GROUP;
@P0 BREAK.RELIABLE B2 ?trans5;
@P0 BRA 0x440 ?trans5;
BSYNC.RELIABLE B2 ?trans5;
STG.E desc[UR6][R8.64], R7 &req={5} &rd=0x1 ?trans1;
IADD3 R17, PT, PT, R17, 0x1, RZ ?trans1;
BRA 0x460 ?trans6;
STG.E desc[UR6][R8.64], R11 &req={5} &rd=0x2 ?trans1;
IADD3 R15, PT, PT, R15, 0x1, RZ ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
IADD3 R13, PT, PT, R13, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R13, R14, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x2c0 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU UR5, c[0x0][0x398] &wr=0x3 ?trans1;
IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
MOV R13, R12 ?trans1;
LDCU UR8, c[0x0][0x394] &wr=0x4 ?trans3;
ISETP.GE.AND P0, PT, R16, UR5, PT &req={3} ?trans1;
ISETP.LT.AND P1, PT, R12, UR8, PT &req={4} ?WAIT13_END_GROUP;
@!P0 BRA P1, 0x200 ?trans5;
EXIT ?trans5;
BRA 0x530;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: cudaMergeSort(int*, int*, int, int, int, dim3*, dim3*)
_Z13cudaMergeSortPiS_iiiP4dim3S1_:
s_load_b256 s[4:11], s[0:1], 0x10
v_bfe_u32 v1, v0, 20, 10
s_waitcnt lgkmcnt(0)
s_load_b64 s[2:3], s[10:11], 0x4
s_clause 0x1
s_load_b32 s7, s[8:9], 0x8
s_load_b64 s[8:9], s[8:9], 0x0
s_waitcnt lgkmcnt(0)
s_mul_i32 s2, s2, s15
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s2, s2, s14
s_mul_i32 s2, s2, s3
s_delay_alu instid0(SALU_CYCLE_1)
s_add_i32 s2, s2, s13
s_cmp_gt_i32 s6, 0
v_mad_u64_u32 v[2:3], null, s2, s7, v[1:2]
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
s_mul_i32 s2, s6, s4
s_mov_b32 s7, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[3:4], null, v2, s9, v[1:2]
v_mad_u64_u32 v[1:2], null, v3, s8, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mul_lo_u32 v0, s2, v1
s_cselect_b32 s2, -1, 0
v_cmp_gt_i32_e32 vcc_lo, s5, v0
s_and_b32 s2, s2, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB0_17
s_load_b128 s[8:11], s[0:1], 0x0
v_ashrrev_i32_e32 v1, 31, v0
s_ashr_i32 s1, s4, 1
s_cmp_gt_i32 s4, 0
s_mov_b32 s2, s4
s_cselect_b32 s12, -1, 0
v_lshlrev_b64 v[1:2], 2, v[0:1]
s_ashr_i32 s3, s4, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
s_lshl_b64 s[2:3], s[2:3], 2
s_waitcnt lgkmcnt(0)
v_add_co_u32 v1, vcc_lo, s10, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
s_mov_b32 s10, 0
.LBB0_2:
v_add_nc_u32_e32 v9, s4, v0
s_and_not1_b32 vcc_lo, exec_lo, s12
s_cbranch_vccnz .LBB0_16
v_add_nc_u32_e32 v3, s1, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_min_i32_e32 v11, s5, v9
v_mov_b32_e32 v5, v0
s_mov_b32 s11, 0
v_min_i32_e32 v10, s5, v3
v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v3, v1
s_delay_alu instid0(VALU_DEP_2)
v_mov_b32_e32 v7, v10
.LBB0_4:
s_mov_b32 s0, 0
s_mov_b32 s13, exec_lo
v_cmpx_ge_i32_e64 v5, v10
s_xor_b32 s13, exec_lo, s13
s_cbranch_execz .LBB0_6
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v8, 31, v7
s_mov_b32 s0, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[12:13], 2, v[7:8]
v_add_co_u32 v12, vcc_lo, s8, v12
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v13, vcc_lo, s9, v13, vcc_lo
global_load_b32 v8, v[12:13], off
.LBB0_6:
s_or_saveexec_b32 s13, s13
s_mov_b32 s14, 0
s_xor_b32 exec_lo, exec_lo, s13
s_cbranch_execz .LBB0_10
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v6, 31, v5
v_cmp_ge_i32_e64 s14, v7, v11
s_mov_b32 s16, s0
s_mov_b32 s15, exec_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[12:13], 2, v[5:6]
v_add_co_u32 v12, vcc_lo, s8, v12
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v13, vcc_lo, s9, v13, vcc_lo
global_load_b32 v6, v[12:13], off
v_cmpx_lt_i32_e64 v7, v11
s_cbranch_execz .LBB0_9
s_waitcnt vmcnt(1)
v_ashrrev_i32_e32 v8, 31, v7
s_and_not1_b32 s16, s0, exec_lo
s_or_b32 s14, s14, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[12:13], 2, v[7:8]
v_add_co_u32 v12, vcc_lo, s8, v12
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
v_add_co_ci_u32_e32 v13, vcc_lo, s9, v13, vcc_lo
global_load_b32 v8, v[12:13], off
s_waitcnt vmcnt(0)
v_cmp_ge_i32_e32 vcc_lo, v6, v8
s_and_b32 s17, vcc_lo, exec_lo
s_or_b32 s16, s16, s17
.LBB0_9:
s_or_b32 exec_lo, exec_lo, s15
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 s0, s0, exec_lo
s_and_b32 s15, s16, exec_lo
s_and_b32 s14, s14, exec_lo
s_or_b32 s0, s0, s15
.LBB0_10:
s_or_b32 exec_lo, exec_lo, s13
s_and_saveexec_b32 s13, s0
s_cbranch_execz .LBB0_12
v_add_nc_u32_e32 v12, 1, v7
s_and_not1_b32 s14, s14, exec_lo
s_waitcnt vmcnt(0)
global_store_b32 v[3:4], v8, off
.LBB0_12:
s_or_b32 exec_lo, exec_lo, s13
s_and_saveexec_b32 s0, s14
s_cbranch_execz .LBB0_14
v_dual_mov_b32 v12, v7 :: v_dual_add_nc_u32 v5, 1, v5
s_waitcnt vmcnt(0)
global_store_b32 v[3:4], v6, off
.LBB0_14:
s_or_b32 exec_lo, exec_lo, s0
v_dual_mov_b32 v7, v12 :: v_dual_add_nc_u32 v0, 1, v0
v_add_co_u32 v3, s0, v3, 4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v4, s0, 0, v4, s0
v_cmp_ge_i32_e32 vcc_lo, v0, v11
s_or_b32 s11, vcc_lo, s11
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s11
s_cbranch_execnz .LBB0_4
s_or_b32 exec_lo, exec_lo, s11
.LBB0_16:
s_add_i32 s10, s10, 1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
v_cmp_le_i32_e32 vcc_lo, s5, v9
s_cmp_ge_i32 s10, s6
v_mov_b32_e32 v0, v9
s_cselect_b32 s0, -1, 0
s_or_b32 s0, s0, vcc_lo
v_add_co_u32 v1, vcc_lo, v1, s2
v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
s_and_b32 s0, exec_lo, s0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_or_b32 s7, s0, s7
s_and_not1_b32 exec_lo, exec_lo, s7
s_cbranch_execnz .LBB0_2
.LBB0_17:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| cudaMergeSort | 2,048 | 2,778 | stackv2-00000-of-00015 |
// Demangled: matrixMul(int*, int*, int*, int)
Function : _Z9matrixMulPiS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.Y &wr=0x1 ?trans7;
LDC R2, c[0x0][0x364] &wr=0x1 ?trans1;
LDCU UR18, c[0x0][0x398] &wr=0x2 ?trans1;
S2R R0, SR_TID.X &wr=0x3 ?trans6;
S2UR UR4, SR_CTAID.Y &wr=0x1 ?trans8;
S2UR UR5, SR_CTAID.X &wr=0x3 ?trans8;
LDC R7, c[0x0][0x360] &wr=0x3 ?trans1;
IMAD R2, R2, UR4, R3 &req={1} ?WAIT2_END_GROUP;
IMAD R7, R7, UR5, R0 &req={3} ?WAIT5_END_GROUP;
VIMNMX.S32 R0, R2, R7, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR18, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
UISETP.GE.U32.AND UP0, UPT, UR18, 0x8, UPT ?trans1;
UMOV UR4, URZ ?trans1;
LDCU.64 UR16, c[0x0][0x358] &wr=0x0 ?trans1;
HFMA2 R0, -RZ, RZ, 0, 0 ?trans2;
IMAD R2, R2, UR18, RZ ?trans1;
PLOP3.LUT P0, PT, PT, PT, UP0, 0x80, 0x8 ?WAIT13_END_GROUP;
@!P0 BRA 0x510 ?trans5;
LDCU.128 UR20, c[0x0][0x380] &wr=0x1 ?trans1;
MOV R6, R7 ?trans1;
ULOP3.LUT UR4, UR18, 0x7ffffff8, URZ, 0xc0, !UPT ?WAIT4_END_GROUP;
UIADD3 UR5, UPT, UPT, -UR4, URZ, URZ ?WAIT3_END_GROUP;
UMOV UR4, URZ ?trans1;
MOV.64 R4, UR20 &req={1} ?trans2;
UIMAD.WIDE UR6, UR18, 0x1c, UR22 ?trans1;
UIMAD.WIDE UR8, UR18, 0x18, UR22 ?trans1;
UIMAD.WIDE UR10, UR18, 0x14, UR22 ?trans1;
UIMAD.WIDE UR12, UR18, 0x10, UR22 ?trans1;
IMAD.WIDE.U32 R4, R2, 0x4, R4 ?trans1;
UIMAD.WIDE UR14, UR18, 0xc, UR22 ?WAIT4_END_GROUP;
IADD.64 R4, R4, 0x10 ?WAIT8_END_GROUP;
MOV R21, 0x4 ?trans1;
UIMAD.WIDE UR20, UR18, 0x4, UR22 ?trans1;
HFMA2 R11, -RZ, RZ, 0, 2.384185791015625e-07 ?trans1;
UIMAD.WIDE UR24, UR18, 0x8, UR22 ?trans1;
MOV R9, 0x4 ?trans1;
IMAD.WIDE R20, R6.reuse, R21, UR22 ?trans1;
LDG.E R12, desc[UR16][R4.64+-0x10] &req={0} &wr=0x2 ?trans3;
HFMA2 R19, -RZ, RZ, 0, 2.384185791015625e-07 ?trans2;
IMAD.WIDE R10, R6, R11, UR20 ?trans1;
LDG.E R13, desc[UR16][R20.64] &rd=0x0 &wr=0x2 ?trans1;
MOV R23, 0x4 ?WAIT2_END_GROUP;
IMAD.WIDE R8, R6.reuse, R9, UR24 ?trans1;
LDG.E R14, desc[UR16][R10.64] &rd=0x1 &wr=0x3 ?trans4;
LDG.E R15, desc[UR16][R4.64+-0xc] &wr=0x3 ?trans1;
IMAD.WIDE R18, R6, R19, UR14 ?WAIT4_END_GROUP;
HFMA2 R25, -RZ, RZ, 0, 2.384185791015625e-07 ?trans1;
LDG.E R16, desc[UR16][R8.64] &rd=0x4 &wr=0x5 ?trans1;
IMAD.WIDE R22, R6, R23, UR12 ?WAIT3_END_GROUP;
LDG.E R17, desc[UR16][R4.64+-0x8] &wr=0x5 ?trans1;
IMAD.WIDE R20, R6, R25, UR10 &req={0} ?WAIT3_END_GROUP;
LDG.E R18, desc[UR16][R18.64] &wr=0x5 ?trans4;
LDG.E R24, desc[UR16][R4.64+-0x4] &wr=0x5 ?trans1;
MOV R11, 0x4 &req={1} ?trans1;
IMAD.WIDE R8, R6.reuse, R25, UR8 &req={4} ?trans2;
LDG.E R22, desc[UR16][R22.64] &wr=0x4 ?trans4;
LDG.E R26, desc[UR16][R4.64] &wr=0x4 ?trans1;
IMAD.WIDE R10, R6, R11, UR6 ?WAIT3_END_GROUP;
LDG.E R20, desc[UR16][R20.64] &wr=0x4 ?trans4;
LDG.E R28, desc[UR16][R4.64+0x4] &wr=0x4 ?trans4;
LDG.E R8, desc[UR16][R8.64] &rd=0x0 &wr=0x4 ?trans4;
LDG.E R30, desc[UR16][R4.64+0x8] &wr=0x4 ?trans4;
LDG.E R10, desc[UR16][R10.64] &wr=0x4 ?trans4;
LDG.E R19, desc[UR16][R4.64+0xc] &rd=0x1 &wr=0x4 ?trans1;
UIADD3 UR5, UPT, UPT, UR5, 0x8, URZ ?WAIT6_END_GROUP;
ISETP.NE.AND P0, PT, RZ, UR5, PT ?trans1;
MOV R9, UR18 &req={0} ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
IADD.64 R4, R4, 0x20 &req={1} ?WAIT3_END_GROUP;
IMAD R6, R9, 0x8, R6 ?trans2;
IMAD R12, R12, R13, R0 &req={2} ?WAIT4_END_GROUP;
IMAD R12, R15, R14, R12 &req={3} ?WAIT4_END_GROUP;
IMAD R17, R17, R16, R12 &req={5} ?WAIT4_END_GROUP;
IMAD R17, R24, R18, R17 ?WAIT4_END_GROUP;
IMAD R17, R26, R22, R17 &req={4} ?WAIT4_END_GROUP;
IMAD R17, R28, R20, R17 ?WAIT4_END_GROUP;
IMAD R8, R30, R8, R17 ?WAIT4_END_GROUP;
IMAD R0, R19, R10, R8 ?trans1;
@P0 BRA 0x210 ?trans6;
ULOP3.LUT UR5, UR18, 0x7, URZ, 0xc0, !UPT ?WAIT6_END_GROUP;
ISETP.NE.AND P0, PT, RZ, UR5, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xa80 ?trans5;
UISETP.GE.U32.AND UP0, UPT, UR5, 0x4, UPT ?trans1;
ULOP3.LUT UR6, UR18, 0x3, URZ, 0xc0, !UPT ?WAIT5_END_GROUP;
PLOP3.LUT P1, PT, PT, PT, UP0, 0x80, 0x8 ?trans1;
ISETP.NE.AND P0, PT, RZ, UR6, PT ?WAIT12_END_GROUP;
@!P1 BRA 0x7e0 ?trans5;
LDC.64 R8, c[0x0][0x388] &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x380] &wr=0x2 ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?trans1;
MOV R4, UR4 ?trans1;
MOV R12, UR18 ?trans1;
UMOV UR5, URZ ?trans1;
USHF.R.S32.HI UR7, URZ, 0x1f, UR18 ?trans1;
IADD.64 R18, R2, UR4 ?trans2;
LDC.64 R10, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD R5, R4, UR18, R7 ?trans1;
IADD3 R17, PT, PT, R2, UR4, RZ ?trans1;
MOV R13, UR7 ?WAIT5_END_GROUP;
IADD.64 R14, R12, R12 ?WAIT3_END_GROUP;
LEA R4, P1, R18, UR8, 0x2 &req={2} ?trans1;
IMAD.WIDE R8, R5, 0x4, R8 &req={1} ?WAIT3_END_GROUP;
LEA.HI.X R5, R18, UR9, R19, 0x2, P1 ?trans1;
MOV R19, UR18 ?trans1;
LEA R18, P1, R14, R8, 0x2 ?trans1;
LDG.E R6, desc[UR16][R8.64] &req={0} &wr=0x2 ?trans1;
IMAD.WIDE.U32 R10, R17, 0x4, R10 &req={3} ?trans1;
IADD.64 R16, R12, R14 ?trans2;
LDG.E R21, desc[UR16][R4.64+0x4] &wr=0x3 ?trans1;
IMAD.WIDE R12, R19, 0x4, R8 ?trans1;
LEA.HI.X R19, R14, R9, R15, 0x2, P1 ?trans2;
LDG.E R11, desc[UR16][R10.64] &wr=0x2 ?trans1;
LEA R14, P1, R16, R8, 0x2 ?WAIT3_END_GROUP;
LDG.E R12, desc[UR16][R12.64] &wr=0x3 ?trans1;
LEA.HI.X R15, R16, R9, R17, 0x2, P1 ?WAIT3_END_GROUP;
LDG.E R18, desc[UR16][R18.64] &wr=0x4 ?trans4;
LDG.E R17, desc[UR16][R4.64+0x8] &wr=0x4 ?trans4;
LDG.E R23, desc[UR16][R4.64+0xc] &wr=0x5 ?trans4;
LDG.E R14, desc[UR16][R14.64] &wr=0x5 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
IMAD R6, R11, R6, R0 &req={2} ?WAIT4_END_GROUP;
IMAD R6, R21, R12, R6 &req={3} ?WAIT4_END_GROUP;
IMAD R6, R17, R18, R6 &req={4} ?WAIT4_END_GROUP;
IMAD R0, R23, R14, R6 &req={5} ?WAIT7_END_GROUP;
@!P0 BRA 0xa80 ?trans5;
UISETP.NE.AND UP0, UPT, UR6, 0x1, UPT ?trans1;
ULOP3.LUT UR5, UR18, 0x1, URZ, 0xc0, !UPT ?trans1;
MOV R6, UR4 ?WAIT3_END_GROUP;
UISETP.NE.U32.AND UP1, UPT, UR5, 0x1, UPT ?trans1;
PLOP3.LUT P1, PT, PT, PT, UP0, 0x80, 0x8 ?WAIT5_END_GROUP;
@UP0 LDCU.128 UR8, c[0x0][0x380] &wr=0x1 ?trans1;
PLOP3.LUT P2, PT, PT, PT, UP1, 0x80, 0x8 ?trans1;
@UP0 LDCU.64 UR12, c[0x0][0x380] &wr=0x2 ?trans3;
@!UP1 LDCU.128 UR20, c[0x0][0x380] &wr=0x3 ?trans3;
@P1 MOV R4, R2 ?trans1;
@P1 MOV R5, RZ ?trans1;
@P1 IADD3 R15, PT, PT, R2, UR4, RZ ?trans1;
@UP0 UMOV UR6, UR4 ?trans1;
@UP0 UMOV UR7, URZ ?trans1;
@UP0 UIADD3 UR4, UPT, UPT, UR4, 0x2, URZ ?trans1;
@P1 IADD.64 R8, R4, UR6 ?WAIT2_END_GROUP;
@P1 IMAD R5, R6, UR18, R7 ?trans1;
MOV.64 R10, UR8 &req={1} ?trans2;
MOV.64 R12, UR10 ?trans2;
MOV R6, UR4 ?trans1;
@P1 LEA R4, P0, R8, UR12, 0x2 &req={2} ?trans1;
@P1 IMAD.WIDE.U32 R10, R15, 0x4, R10 ?trans1;
MOV R15, UR18 ?WAIT3_END_GROUP;
@P1 IMAD.WIDE R12, R5, 0x4, R12 ?trans1;
@P1 LEA.HI.X R5, R8, UR13, R9, 0x2, P0 ?trans1;
@P1 LDG.E R23, desc[UR16][R10.64] &req={0} &rd=0x0 &wr=0x2 ?trans1;
MOV.64 R8, UR20 &req={3} ?WAIT3_END_GROUP;
@!P2 IADD3 R19, PT, PT, R2, UR4, RZ ?trans1;
MOV.64 R16, UR22 ?trans2;
@P1 IMAD.WIDE R14, R15, 0x4, R12 ?trans1;
@P1 LDG.E R4, desc[UR16][R4.64+0x4] &wr=0x3 ?trans3;
@!P2 IMAD R21, R6, UR18, R7 ?trans1;
@P1 LDG.E R12, desc[UR16][R12.64] &wr=0x2 ?trans1;
@!P2 IMAD.WIDE.U32 R8, R19, 0x4, R8 ?WAIT3_END_GROUP;
@P1 LDG.E R14, desc[UR16][R14.64] &wr=0x3 ?trans1;
@!P2 IMAD.WIDE R10, R21, 0x4, R16 &req={0} ?WAIT3_END_GROUP;
@!P2 LDG.E R9, desc[UR16][R8.64] &wr=0x4 ?trans4;
@!P2 LDG.E R10, desc[UR16][R10.64] &wr=0x4 ?trans1;
@P1 IMAD R23, R23, R12, R0 &req={2} ?WAIT4_END_GROUP;
@P1 IMAD R0, R4, R14, R23 &req={3} ?WAIT4_END_GROUP;
@!P2 IMAD R0, R9, R10, R0 &req={4} ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x390] &wr=0x1 ?trans1;
IADD3 R3, PT, PT, R7, R2, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R2, R3, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR16][R2.64], R0 &req={0} ?trans1;
EXIT ?trans5;
BRA 0xad0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: matrixMul(int*, int*, int*, int)
_Z9matrixMulPiS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v4, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s4, s3, 16
s_and_b32 s3, s3, 0xffff
v_mad_u64_u32 v[2:3], null, s15, s4, v[1:2]
v_mad_u64_u32 v[0:1], null, s14, s3, v[4:5]
s_mov_b32 s3, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_max_i32_e32 v1, v2, v0
v_cmpx_gt_i32_e64 s2, v1
s_cbranch_execz .LBB0_6
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
v_mul_lo_u32 v1, v2, s2
s_cmp_lt_i32 s2, 1
s_cbranch_scc1 .LBB0_4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v2, 31, v1
s_mov_b32 s3, s2
v_mov_b32_e32 v5, v0
v_lshlrev_b64 v[3:4], 2, v[1:2]
v_mov_b32_e32 v2, 0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v3, vcc_lo, s4, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
.LBB0_3:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_ashrrev_i32_e32 v6, 31, v5
s_add_i32 s3, s3, -1
s_cmp_eq_u32 s3, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[5:6]
v_add_co_u32 v6, vcc_lo, s6, v6
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
global_load_b32 v8, v[3:4], off
global_load_b32 v9, v[6:7], off
s_waitcnt vmcnt(0)
v_mad_u64_u32 v[6:7], null, v9, v8, v[2:3]
v_add_co_u32 v3, vcc_lo, v3, 4
v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_dual_mov_b32 v2, v6 :: v_dual_add_nc_u32 v5, s2, v5
s_cbranch_scc0 .LBB0_3
s_branch .LBB0_5
.LBB0_4:
v_mov_b32_e32 v2, 0
.LBB0_5:
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v0, v1, v0
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| matrixMul | 4,508 | 1,245 | stackv2-00000-of-00015 |
// Demangled: compute_d(int*, int*, int*, int)
Function : _Z9compute_dPiS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R7, c[0x0][0x360] &wr=0x1 ?trans8;
LDC R6, c[0x0][0x398] &wr=0x2 ?trans1;
IMAD R7, R7, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, R6, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LEA.HI R0, R6, R6, RZ, 0x1 ?trans1;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0x170 ?trans2;
SHF.R.S32.HI R4, RZ, 0x1, R0 ?trans1;
IMAD.HI R0, R7, 0x66666667, RZ ?WAIT4_END_GROUP;
ISETP.GE.AND P0, PT, R7, R4, PT ?trans1;
SHF.R.U32.HI R5, RZ, 0x1f, R0 ?WAIT12_END_GROUP;
@!P0 IADD3 R11, PT, PT, R7, 0x1, RZ ?trans1;
@!P0 BRA 0x160 ?trans6;
LOP3.LUT R8, R6, 0x80000001, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R8, 0x1, PT ?WAIT5_END_GROUP;
ISETP.NE.OR P0, PT, R7, R4, P0 ?WAIT13_END_GROUP;
@!P0 IADD3 R11, PT, PT, R7.reuse, 0x1, RZ ?trans2;
@P0 IADD3 R11, PT, PT, -R7, R6, RZ ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU.64 UR6, c[0x0][0x388] &wr=0x1 ?trans1;
LEA.HI.SX32 R0, R0, R5, 0x1e ?trans1;
IMAD.SHL.U32 R4, R7.reuse, 0x4, RZ ?trans1;
SHF.R.S32.HI R6, RZ, 0x1f, R7 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans1;
IMAD.WIDE R2, R7.reuse, 0x4, R2 &req={0} ?trans2;
SHF.L.U64.HI R5, R7, 0x2, R6 ?trans2;
IMAD R0, R0, -0xa, R7 ?WAIT5_END_GROUP;
IADD3 R9, PT, PT, R0, 0x1, RZ ?trans1;
IADD.64 R6, R4.reuse, UR6 &req={1} ?trans2;
LDCU.64 UR6, c[0x0][0x390] &wr=0x0 ?trans2;
STG.E desc[UR4][R2.64], R9 &req={2} ?trans4;
STG.E desc[UR4][R6.64], R11 ?trans4;
LDG.E R0, desc[UR4][R2.64] &wr=0x2 ?trans1;
IADD.64 R4, R4, UR6 &req={0} ?WAIT2_END_GROUP;
IMAD R13, R0, R11, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R13 ?trans1;
EXIT ?trans5;
BRA 0x290;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: compute_d(int*, int*, int*, int)
_Z9compute_dPiS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s8, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB0_10
v_mul_hi_i32 v0, 0x66666667, v1
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x10
s_lshr_b32 s0, s8, 31
s_mov_b32 s1, exec_lo
s_add_i32 s0, s8, s0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
s_ashr_i32 s0, s0, 1
v_lshrrev_b32_e32 v2, 31, v0
v_ashrrev_i32_e32 v0, 2, v0
v_add_nc_u32_e32 v0, v0, v2
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_lo_u32 v0, v0, 10
v_lshlrev_b64 v[3:4], 2, v[1:2]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v5, vcc_lo, s4, v3
v_sub_nc_u32_e32 v0, v1, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v6, vcc_lo, s5, v4, vcc_lo
v_add_nc_u32_e32 v0, 1, v0
global_store_b32 v[5:6], v0, off
v_cmpx_le_i32_e64 s0, v1
s_xor_b32 s1, exec_lo, s1
s_cbranch_execz .LBB0_7
s_and_b32 s4, s8, 0x80000001
v_cmp_ne_u32_e32 vcc_lo, s0, v1
v_add_co_u32 v7, s0, s6, v3
s_cmp_lg_u32 s4, 1
v_add_co_ci_u32_e64 v8, s0, s7, v4, s0
s_cselect_b32 s0, -1, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_or_b32 s0, s0, vcc_lo
s_and_saveexec_b32 s4, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_xor_b32 s0, exec_lo, s4
s_cbranch_execz .LBB0_4
v_sub_nc_u32_e32 v0, s8, v1
global_store_b32 v[7:8], v0, off
.LBB0_4:
s_and_not1_saveexec_b32 s0, s0
s_cbranch_execz .LBB0_6
v_add_nc_u32_e32 v0, 1, v1
global_store_b32 v[7:8], v0, off
.LBB0_6:
s_or_b32 exec_lo, exec_lo, s0
.LBB0_7:
s_and_not1_saveexec_b32 s0, s1
s_cbranch_execz .LBB0_9
v_add_nc_u32_e32 v0, 1, v1
v_add_co_u32 v1, vcc_lo, s6, v3
v_add_co_ci_u32_e32 v2, vcc_lo, s7, v4, vcc_lo
global_store_b32 v[1:2], v0, off
.LBB0_9:
s_or_b32 exec_lo, exec_lo, s0
global_load_b32 v1, v[5:6], off
s_waitcnt vmcnt(0)
v_mul_lo_u32 v2, v0, v1
v_add_co_u32 v0, vcc_lo, s2, v3
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v4, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB0_10:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| compute_d | 1,090 | 1,321 | stackv2-00000-of-00015 |
// Demangled: prova2()
Function : _Z6prova2v
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_CTAID.X &wr=0x1 ?trans1;
S2R R5, SR_TID.X &wr=0x1 ?trans2;
IMAD R0, R0, 0x20, R5 &req={1} ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R0, 0x3f, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R3, c[0x0][0x370] &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0xe0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans2;
MOV R7, R0 ?trans1;
IMAD R0, R3, 0x20, R0 &req={0} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, 0x40, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x90 ?trans5;
BSYNC.RECONVERGENT B0 &req={1} ?trans5;
LDC.64 R2, c[0x4][0x8] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x4][0x10] &wr=0x1 ?trans1;
IMAD.WIDE R2, R7, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R3, desc[UR4][R2.64] &wr=0x2 ?trans1;
LEA R4, P0, R5, UR6, 0x2 &req={1} ?WAIT4_END_GROUP;
LEA.HI.X R5, R5, UR7, RZ, 0x2, P0 ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R3 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x160;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: prova2()
_Z6prova2v:
v_lshl_add_u32 v1, s15, 5, v0
s_mov_b32 s2, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e32 64, v1
s_cbranch_execz .LBB0_4
s_load_b32 s0, s[0:1], 0x0
s_mov_b32 s1, 0
s_waitcnt lgkmcnt(0)
s_lshl_b32 s0, s0, 5
.LBB0_2:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v1, s0, v1
v_cmp_lt_i32_e32 vcc_lo, 63, v1
s_or_b32 s1, vcc_lo, s1
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execnz .LBB0_2
s_or_b32 exec_lo, exec_lo, s1
v_subrev_nc_u32_e32 v1, s0, v1
s_getpc_b64 s[0:1]
s_add_u32 s0, s0, F_array@rel32@lo+4
s_addc_u32 s1, s1, F_array@rel32@hi+12
v_lshlrev_b32_e32 v0, 2, v0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[1:2]
v_add_co_u32 v1, vcc_lo, v1, s0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
s_getpc_b64 s[0:1]
s_add_u32 s0, s0, Ouptput@rel32@lo+4
s_addc_u32 s1, s1, Ouptput@rel32@hi+12
global_load_b32 v1, v[1:2], off
s_waitcnt vmcnt(0)
global_store_b32 v0, v1, s[0:1]
.LBB0_4:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| prova2 | 572 | 654 | stackv2-00000-of-00015 |
// Demangled: cal_hist(float*, int*, int, int)
Function : _Z8cal_histPfPiii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R5, R0, UR4, R5 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
HFMA2 R9, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
F2I.TRUNC.NTZ R7, R2 &req={2} &wr=0x0 ?trans2;
IMAD.WIDE R4, R7, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
REDG.E.ADD.STRONG.GPU desc[UR4][R4.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x120;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: cal_hist(float*, int*, int, int)
_Z8cal_histPfPiii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[0:3], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_mov_b32_e32 v2, 1
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b32 v0, v[0:1], off
s_waitcnt vmcnt(0)
v_cvt_i32_f32_e32 v0, v0
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_add_co_u32 v0, vcc_lo, s2, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_atomic_add_u32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| cal_hist | 540 | 618 | stackv2-00000-of-00015 |
// Demangled: multiply_matrices_kernel(matrix_t, matrix_t, matrix_t)
Function : _Z24multiply_matrices_kernel8matrix_tS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
S2R R5, SR_TID.X &wr=0x2 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x2 ?trans8;
LDC R4, c[0x0][0x360] &wr=0x2 ?trans1;
ISETP.NE.S64.AND P0, PT, R2, RZ, PT &req={1} ?WAIT2_END_GROUP;
IMAD R4, R4, UR4, R5 &req={2} ?WAIT12_END_GROUP;
@!P0 EXIT &req={0} ?trans5;
S2R R9, SR_TID.Y &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x364] &wr=0x0 ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?trans1;
ISETP.GE.U64.AND P1, PT, R2, 0x8, PT ?trans2;
S2R R0, SR_CTAID.Y &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x3b0] &wr=0x1 ?trans1;
MOV R23, RZ ?trans1;
HFMA2 R11, -RZ, RZ, 0, 0 ?trans1;
LDCU.64 UR14, c[0x0][0x380] &wr=0x2 ?trans1;
LDCU.64 UR8, c[0x0][0x3c0] &wr=0x3 ?trans1;
LDCU.64 UR16, c[0x0][0x358] &wr=0x4 ?trans1;
ULOP3.LUT UR5, UR14, 0x7, URZ, 0xc0, !UPT &req={2} ?WAIT6_END_GROUP;
MOV R22, UR5 ?trans1;
IMAD R9, R0, UR4, R9 &req={0} ?trans1;
UMOV.64 UR4, URZ ?WAIT3_END_GROUP;
ISETP.NE.S64.AND P0, PT, R22, RZ, PT ?trans2;
IMAD.WIDE.U32 R6, R9, UR6, R4 &req={1} ?WAIT4_END_GROUP;
IMAD R3, R9, UR7, R7 ?trans1;
LEA R2, P2, R6, UR8, 0x2 &req={3} ?WAIT4_END_GROUP;
LEA.HI.X R3, R6, UR9, R3, 0x2, P2 ?trans1;
IMAD.WIDE.U32 R6, R9, UR14, RZ ?WAIT4_END_GROUP;
IMAD R9, R9, UR15, R7 ?trans1;
@!P1 BRA 0x5e0 &req={4} ?trans6;
LDCU.128 UR8, c[0x0][0x390] &wr=0x0 ?trans1;
MOV R11, RZ ?trans1;
LDCU.64 UR4, c[0x0][0x3a8] &wr=0x1 ?trans1;
LEA R14, P2, R6.reuse, UR8, 0x2 &req={0} ?trans1;
USHF.L.U64.HI UR12, UR10, 0x5, UR11 ?trans1;
USHF.L.U64.HI UR7, UR10, 0x2, UR11 ?trans1;
USHF.L.U32 UR11, UR10, 0x5, URZ ?trans1;
LEA.HI.X R15, R6, UR9, R9, 0x2, P2 ?trans1;
USHF.L.U32 UR6, UR10, 0x2, URZ ?trans1;
LEA R12, P1, R4, UR4, 0x2 &req={1} ?trans1;
ULOP3.LUT UR10, UR14, 0xfffffff8, URZ, 0xc0, !UPT ?WAIT2_END_GROUP;
IADD.64 R14, R14, 0x10 ?WAIT3_END_GROUP;
LEA.HI.X R13, R4, UR5, RZ, 0x2, P1 ?trans1;
UMOV.64 UR4, URZ ?WAIT6_END_GROUP;
LDG.E R0, desc[UR16][R14.64+-0x10] &wr=0x2 ?trans4;
LDG.E R10, desc[UR16][R12.64] &wr=0x2 ?trans2;
FFMA R21, R0, R10, R11 &req={2} ?trans1;
IADD.64 R10, R12, UR6 &req={1} ?WAIT4_END_GROUP;
STG.E desc[UR16][R2.64], R21 &rd=0x0 ?trans4;
LDG.E R0, desc[UR16][R14.64+-0xc] &wr=0x2 ?trans4;
LDG.E R16, desc[UR16][R10.64] &wr=0x2 ?trans2;
FFMA R25, R0, R16, R21 &req={2} ?trans1;
IADD.64 R16, R10, UR6 ?WAIT4_END_GROUP;
STG.E desc[UR16][R2.64], R25 &rd=0x1 ?trans4;
LDG.E R0, desc[UR16][R14.64+-0x8] &wr=0x2 ?trans4;
LDG.E R18, desc[UR16][R16.64] &wr=0x2 ?trans2;
FFMA R27, R0, R18, R25 &req={2} ?trans1;
IADD.64 R18, R16, UR6 ?WAIT4_END_GROUP;
STG.E desc[UR16][R2.64], R27 &rd=0x2 ?trans4;
LDG.E R0, desc[UR16][R14.64+-0x4] &wr=0x0 ?trans4;
LDG.E R20, desc[UR16][R18.64] &wr=0x0 ?trans1;
IADD.64 R10, R18, UR6 ?trans2;
FFMA R21, R0, R20, R27 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR16][R2.64], R21 &rd=0x0 ?trans4;
LDG.E R0, desc[UR16][R14.64] &wr=0x1 ?trans4;
LDG.E R20, desc[UR16][R10.64] &wr=0x1 ?trans1;
IADD.64 R16, R10, UR6 ?trans2;
FFMA R25, R0, R20, R21 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR16][R2.64], R25 &rd=0x1 ?trans4;
LDG.E R0, desc[UR16][R14.64+0x4] &wr=0x2 ?trans4;
LDG.E R20, desc[UR16][R16.64] &wr=0x2 ?trans1;
IADD.64 R18, R16, UR6 ?trans2;
FFMA R27, R0, R20, R25 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR16][R2.64], R27 &rd=0x1 ?trans4;
LDG.E R0, desc[UR16][R14.64+0x8] &wr=0x2 ?trans4;
LDG.E R24, desc[UR16][R18.64] &wr=0x2 ?trans1;
IADD.64 R20, R18, UR6 &req={0} ?trans2;
UIADD3.64 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
UMOV UR8, UR10 ?trans1;
UMOV UR9, UR15 ?WAIT2_END_GROUP;
UIADD3.64 UR8, UPT, UPT, UR4, -UR8, URZ ?trans1;
FFMA R29, R0, R24, R27 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR16][R2.64], R29 &rd=0x1 ?trans4;
LDG.E R20, desc[UR16][R20.64] &wr=0x2 ?trans4;
LDG.E R0, desc[UR16][R14.64+0xc] &rd=0x0 &wr=0x2 ?trans1;
ISETP.NE.S64.AND P1, PT, RZ, UR8, PT ?trans2;
UMOV UR8, UR11 ?trans1;
UMOV UR9, UR12 ?WAIT2_END_GROUP;
IADD.64 R12, R12, UR8 ?trans2;
IADD.64 R14, R14, 0x20 &req={0} ?trans2;
FFMA R11, R0, R20, R29 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR16][R2.64], R11 &rd=0x1 ?trans1;
@P1 BRA 0x2d0 ?trans5;
@!P0 EXIT ?trans5;
LDC.64 R12, c[0x0][0x398] &wr=0x0 ?trans1;
ISETP.GE.U64.AND P1, PT, R22, 0x4, PT ?trans2;
ULOP3.LUT UR6, UR14, 0x3, URZ, 0xc0, !UPT ?trans1;
HFMA2 R25, -RZ, RZ, 0, 0 &req={1} ?WAIT5_END_GROUP;
MOV R24, UR6 ?WAIT5_END_GROUP;
ISETP.NE.S64.AND P0, PT, R24, RZ, PT ?trans2;
@!P1 BRA 0x8c0 ?WAIT12_END_GROUP;
LDCU.64 UR6, c[0x0][0x390] &wr=0x1 ?trans1;
IMAD R0, R12.reuse, UR5, RZ &req={0} ?trans1;
MOV R8, R6 ?trans1;
IMAD.WIDE.U32 R18, R12, UR4, R4 ?trans1;
LDCU.64 UR8, c[0x0][0x3a8] &wr=0x0 ?trans3;
IMAD R17, R13, UR4, R0 ?trans1;
IADD.64 R20, R8, UR4 ?WAIT4_END_GROUP;
IADD3 R17, PT, PT, R19, R17, RZ ?trans2;
LEA R14, P1, R20, UR6, 0x2 &req={1} ?trans2;
LEA R16, P2, R18, UR8, 0x2 &req={0} ?trans2;
LEA.HI.X R15, R20, UR7, R21, 0x2, P1 ?trans2;
LEA.HI.X R17, R18, UR9, R17, 0x2, P2 ?WAIT3_END_GROUP;
LDG.E R0, desc[UR16][R14.64] &wr=0x2 ?trans4;
LDG.E R10, desc[UR16][R16.64] &wr=0x2 ?trans1;
IMAD.SHL.U32 R21, R13, 0x4, RZ ?trans2;
IMAD.WIDE.U32 R18, R12, 0x4, RZ ?WAIT5_END_GROUP;
IADD3 R19, PT, PT, R19, R21, RZ ?WAIT5_END_GROUP;
IADD.64 R18, R16, R18 ?trans2;
FFMA R11, R0, R10, R11 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR16][R2.64], R11 &rd=0x0 ?trans4;
LDG.E R18, desc[UR16][R18.64] &wr=0x2 ?trans4;
LDG.E R0, desc[UR16][R14.64+0x4] &wr=0x2 ?trans1;
LEA R20, P1, R12, R16, 0x3 ?WAIT4_END_GROUP;
LEA.HI.X R21, R12, R17, R13, 0x3, P1 ?trans1;
FFMA R23, R0, R18, R11 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR16][R2.64], R23 &rd=0x1 ?trans4;
LDG.E R20, desc[UR16][R20.64] &wr=0x2 ?trans4;
LDG.E R0, desc[UR16][R14.64+0x8] &wr=0x2 ?trans1;
IMAD R27, R13, 0xc, RZ ?trans2;
IMAD.WIDE.U32 R16, R12, 0xc, R16 ?WAIT5_END_GROUP;
IADD3 R17, PT, PT, R17, R27, RZ ?trans1;
FFMA R19, R0, R20, R23 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR16][R2.64], R19 &rd=0x1 ?trans4;
LDG.E R0, desc[UR16][R14.64+0xc] &wr=0x2 ?trans4;
LDG.E R11, desc[UR16][R16.64] &req={0} &wr=0x2 ?trans1;
UIADD3.64 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
FFMA R11, R0, R11, R19 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR16][R2.64], R11 &rd=0x1 ?trans6;
@!P0 EXIT ?trans5;
ISETP.NE.S64.AND P0, PT, R24, 0x1, PT ?WAIT14_END_GROUP;
@!P0 BRA 0xa70 ?trans5;
LDCU.64 UR6, c[0x0][0x390] &wr=0x2 ?trans1;
IMAD R0, R12.reuse, UR5, RZ &req={0} ?trans1;
MOV R14, R6 ?trans1;
MOV R15, R9 ?trans1;
LDCU.64 UR8, c[0x0][0x3a8] &wr=0x0 ?trans1;
IMAD.WIDE.U32 R18, R12, UR4, R4 &req={1} ?WAIT3_END_GROUP;
IADD.64 R14, R14, UR4 ?trans2;
IMAD R17, R13, UR4, R0 ?WAIT5_END_GROUP;
IADD3 R19, PT, PT, R19, R17, RZ ?trans2;
LEA R16, P0, R14, UR6, 0x2 &req={2} ?trans2;
LEA R20, P1, R18, UR8, 0x2 &req={0} ?trans2;
LEA.HI.X R17, R14, UR7, R15, 0x2, P0 ?trans2;
LEA.HI.X R21, R18, UR9, R19, 0x2, P1 ?WAIT3_END_GROUP;
LDG.E R0, desc[UR16][R16.64] &wr=0x2 ?trans4;
LDG.E R10, desc[UR16][R20.64] &wr=0x2 ?trans1;
LEA R14, P0, R12, R20, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R15, R12, R21, R13, 0x2, P0 ?trans1;
FFMA R19, R0, R10, R11 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR16][R2.64], R19 &rd=0x2 ?trans4;
LDG.E R0, desc[UR16][R16.64+0x4] &wr=0x3 ?trans4;
LDG.E R14, desc[UR16][R14.64] &wr=0x3 ?trans1;
UIADD3.64 UR4, UPT, UPT, UR4, 0x2, URZ ?trans1;
FFMA R11, R0, R14, R19 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR16][R2.64], R11 &rd=0x2 ?trans6;
ULOP3.LUT UR6, UR14, 0x1, URZ, 0xc0, !UPT ?trans1;
HFMA2 R15, -RZ, RZ, 0, 0 ?WAIT5_END_GROUP;
MOV R14, UR6 ?WAIT5_END_GROUP;
ISETP.NE.U64.AND P0, PT, R14, 0x1, PT ?WAIT14_END_GROUP;
@P0 EXIT ?trans5;
LDCU.64 UR6, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R0, R12.reuse, UR5, RZ &req={0} ?trans1;
MOV R7, R9 ?trans1;
IMAD.WIDE.U32 R8, R12, UR4, R4 ?trans1;
LDCU.64 UR8, c[0x0][0x3a8] &wr=0x0 ?trans3;
IMAD R13, R13, UR4, R0 ?trans1;
IADD.64 R4, R6, UR4 ?WAIT4_END_GROUP;
IADD3 R9, PT, PT, R9, R13, RZ ?trans2;
LEA R6, P0, R4, UR6, 0x2 &req={3} ?trans2;
LEA R12, P1, R8, UR8, 0x2 &req={0} ?trans2;
LEA.HI.X R7, R4, UR7, R5, 0x2, P0 ?trans2;
LEA.HI.X R13, R8, UR9, R9, 0x2, P1 ?WAIT3_END_GROUP;
LDG.E R6, desc[UR16][R6.64] &wr=0x3 ?trans4;
LDG.E R12, desc[UR16][R12.64] &wr=0x3 ?trans2;
FFMA R11, R6, R12, R11 &req={3,2,1} ?WAIT5_END_GROUP;
STG.E desc[UR16][R2.64], R11 ?trans1;
EXIT ?trans5;
BRA 0xbd0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: multiply_matrices_kernel(matrix_t, matrix_t, matrix_t)
_Z24multiply_matrices_kernel8matrix_tS_S_:
s_load_b64 s[2:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_cmp_eq_u64 s[2:3], 0
s_cbranch_scc1 .LBB0_3
s_clause 0x1
s_load_b32 s8, s[0:1], 0x54
s_load_b128 s[4:7], s[0:1], 0x28
v_bfe_u32 v1, v0, 10, 10
s_load_b64 s[12:13], s[0:1], 0x40
s_waitcnt lgkmcnt(0)
s_lshr_b32 s9, s8, 16
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[2:3], null, s15, s9, v[1:2]
v_and_b32_e32 v3, 0x3ff, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[4:5], null, s2, v2, 0
v_mad_u64_u32 v[6:7], null, s6, v2, 0
s_and_b32 s6, s8, 0xffff
s_load_b128 s[8:11], s[0:1], 0x10
v_mad_u64_u32 v[0:1], null, s14, s6, v[3:4]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mov_b32_e32 v3, v5
v_mov_b32_e32 v5, v7
v_mov_b32_e32 v1, 0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mad_u64_u32 v[7:8], null, s3, v2, v[3:4]
v_mad_u64_u32 v[10:11], null, s7, v2, v[5:6]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[8:9], 2, v[0:1]
v_mov_b32_e32 v5, v7
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mov_b32_e32 v7, v10
v_add_co_u32 v2, vcc_lo, s4, v8
s_delay_alu instid0(VALU_DEP_3)
v_lshlrev_b64 v[4:5], 2, v[4:5]
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v9, vcc_lo
v_add_co_u32 v0, vcc_lo, s12, v8
v_lshlrev_b64 v[6:7], 2, v[6:7]
v_add_co_ci_u32_e32 v8, vcc_lo, s13, v9, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, vcc_lo, s8, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s9, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_4)
v_add_co_u32 v6, vcc_lo, v0, v6
v_add_co_ci_u32_e32 v7, vcc_lo, v8, v7, vcc_lo
s_lshl_b64 s[0:1], s[10:11], 2
.LBB0_2:
global_load_b32 v0, v[4:5], off
global_load_b32 v8, v[2:3], off
v_add_co_u32 v4, vcc_lo, v4, 4
v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
v_add_co_u32 v2, vcc_lo, v2, s0
s_add_u32 s2, s2, -1
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
s_addc_u32 s3, s3, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u64 s[2:3], 0
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v1, v0, v8
global_store_b32 v[6:7], v1, off
s_cbranch_scc0 .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| multiply_matrices_kernel | 4,920 | 1,284 | stackv2-00000-of-00015 |
// Demangled: MatMul(int*, int*, int*, int, int)
Function : _Z6MatMulPiS_S_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R8, c[0x0][0x39c] &wr=0x1 ?trans1;
S2R R9, SR_CTAID.X &wr=0x2 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x2 ?trans1;
S2R R6, SR_TID.X &wr=0x2 ?trans1;
LDCU UR6, c[0x0][0x398] &wr=0x3 ?trans1;
IABS R0, R8 &req={1} ?WAIT2_END_GROUP;
LOP3.LUT R13, RZ, R8.reuse, RZ, 0x33, !PT ?trans2;
I2F.RP R4, R0 &wr=0x1 ?trans1;
IMAD R9, R9, UR4, R6 &req={2} ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans4;
IABS R11, R9 ?trans1;
MUFU.RCP R4, R4 &req={1} &wr=0x1 ?trans1;
ISETP.GE.AND P2, PT, R9, R8, PT ?trans1;
IADD3 R2, PT, PT, R4, 0xffffffe, RZ &req={1} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R3, R2 &rd=0x1 &wr=0x4 ?trans2;
HFMA2 R2, -RZ, RZ, 0, 0 &req={1} ?trans1;
IADD3 R5, PT, PT, RZ, -R3, RZ &req={4} ?WAIT5_END_GROUP;
IMAD R5, R5, R0, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R3, R3, R5, R2 ?WAIT6_END_GROUP;
IMAD.HI.U32 R4, R3, R11, RZ ?WAIT5_END_GROUP;
IADD3 R2, PT, PT, -R4, RZ, RZ ?WAIT5_END_GROUP;
IMAD R11, R0, R2, R11 ?trans1;
LOP3.LUT R2, R9, R8, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P0, PT, R0, R11, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R11, PT, PT, R11, -R0.reuse, RZ ?trans2;
@!P0 IADD3 R4, PT, PT, R4, 0x1, RZ ?trans1;
ISETP.GE.AND P0, PT, R2, RZ, PT ?trans2;
@!P2 LDC.64 R2, c[0x0][0x390] &wr=0x1 ?trans1;
ISETP.GE.U32.AND P1, PT, R11, R0, PT ?WAIT13_END_GROUP;
@P1 IADD3 R4, PT, PT, R4, 0x1, RZ ?trans1;
ISETP.NE.AND P1, PT, R8, RZ, PT ?WAIT3_END_GROUP;
@!P0 IADD3 R4, PT, PT, -R4, RZ, RZ ?trans1;
@!P2 IMAD.WIDE R2, R9, 0x4, R2 &req={1} ?WAIT4_END_GROUP;
SEL R15, R13, R4, !P1 ?trans1;
IMAD R4, R8, UR6, RZ &req={3} ?trans1;
@!P2 STG.E desc[UR4][R2.64], RZ &req={2} &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans2;
ISETP.GE.AND P0, PT, R15, UR6, PT ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R9, R4, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={1,0} ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans8;
LDC.64 R6, c[0x0][0x388] &wr=0x1 ?trans8;
LDC.64 R2, c[0x0][0x390] &wr=0x2 ?trans1;
IMAD.WIDE R4, R15, 0x4, R4 &req={0} ?WAIT6_END_GROUP;
LDG.E R4, desc[UR4][R4.64] &wr=0x3 ?trans1;
IMAD.WIDE R6, R9, 0x4, R6 &req={1} ?WAIT6_END_GROUP;
LDG.E R7, desc[UR4][R6.64] &wr=0x3 ?trans1;
ISETP.GE.AND P2, PT, R9, RZ, PT ?trans1;
ISETP.GT.U32.AND P0, PT, R0, R11, PT ?trans1;
IADD3 R0, PT, PT, R11, -R0, RZ ?WAIT5_END_GROUP;
SEL R0, R0, R11, !P0 ?WAIT6_END_GROUP;
@!P2 IADD3 R0, PT, PT, -R0, RZ, RZ ?WAIT5_END_GROUP;
SEL R13, R13, R0, !P1 ?WAIT5_END_GROUP;
IMAD.WIDE R2, R13, 0x4, R2 &req={2} ?WAIT4_END_GROUP;
IMAD R9, R4, R7, RZ &req={3} ?WAIT5_END_GROUP;
REDG.E.ADD.STRONG.GPU desc[UR4][R2.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x3a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: MatMul(int*, int*, int*, int, int)
_Z6MatMulPiS_S_ii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b128 s[4:7], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_ashrrev_i32_e32 v2, 31, v1
v_cmpx_gt_i32_e64 s7, v1
s_cbranch_execz .LBB0_2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[3:4], 2, v[1:2]
v_mov_b32_e32 v0, 0
v_add_co_u32 v3, vcc_lo, s4, v3
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
global_store_b32 v[3:4], v0, off
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s2
s_ashr_i32 s2, s7, 31
v_add_nc_u32_e32 v4, v1, v2
s_add_i32 s3, s7, s2
s_waitcnt_vscnt null, 0x0
s_xor_b32 s3, s3, s2
s_barrier
v_cvt_f32_u32_e32 v0, s3
s_sub_i32 s8, 0, s3
v_xor_b32_e32 v4, v4, v2
buffer_gl0_inv
v_rcp_iflag_f32_e32 v0, v0
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_u32_f32_e32 v0, v0
v_mul_lo_u32 v3, s8, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v3, v0, v3
v_add_nc_u32_e32 v0, v0, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v0, v4, v0
v_mul_lo_u32 v3, v0, s3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v3, v4, v3
v_add_nc_u32_e32 v4, 1, v0
v_subrev_nc_u32_e32 v5, s3, v3
v_cmp_le_u32_e32 vcc_lo, s3, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_dual_cndmask_b32 v3, v3, v5 :: v_dual_cndmask_b32 v0, v0, v4
v_xor_b32_e32 v5, s2, v2
s_mul_i32 s2, s7, s6
v_cmp_le_u32_e32 vcc_lo, s3, v3
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v4, 1, v0
v_cndmask_b32_e32 v0, v0, v4, vcc_lo
v_cmp_gt_i32_e32 vcc_lo, s2, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v0, v0, v5
v_sub_nc_u32_e32 v3, v0, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_gt_i32_e64 s2, s6, v3
s_and_b32 s2, s2, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB0_4
s_load_b128 s[0:3], s[0:1], 0x0
v_ashrrev_i32_e32 v4, 31, v3
v_lshlrev_b64 v[6:7], 2, v[1:2]
v_mul_lo_u32 v0, v3, s7
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[4:5], 2, v[3:4]
v_sub_nc_u32_e32 v0, v1, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v1, 31, v0
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, vcc_lo, s0, v4
s_delay_alu instid0(VALU_DEP_4)
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
v_add_co_u32 v6, vcc_lo, s2, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s3, v7, vcc_lo
v_lshlrev_b64 v[0:1], 2, v[0:1]
global_load_b32 v2, v[4:5], off
global_load_b32 v4, v[6:7], off
v_add_co_u32 v0, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
s_waitcnt vmcnt(0)
v_mul_lo_u32 v2, v4, v2
global_atomic_add_u32 v[0:1], v2, off
.LBB0_4:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| MatMul | 1,536 | 1,750 | stackv2-00000-of-00015 |
// Demangled: vector_add(float*, float*, float*, int)
Function : _Z10vector_addPfS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R8, c[0x0][0x398] &wr=0x1 ?trans2;
ISETP.GE.AND P0, PT, R8, 0x1, PT &req={1} ?WAIT13_END_GROUP;
@!P0 EXIT &req={0} ?trans5;
ISETP.GE.U32.AND P1, PT, R8.reuse, 0x10, PT ?trans1;
LOP3.LUT R12, R8, 0xf, RZ, 0xc0, !PT ?trans1;
LDCU.64 UR12, c[0x0][0x358] &wr=0x0 ?trans1;
HFMA2 R0, -RZ, RZ, 0, 0 ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R12, RZ, PT ?WAIT7_END_GROUP;
@!P1 BRA 0x5c0 ?trans6;
LDCU.128 UR8, c[0x0][0x380] &wr=0x1 ?trans1;
LOP3.LUT R9, R8, 0x7ffffff0, RZ, 0xc0, !PT ?trans1;
MOV R0, RZ ?trans1;
LDCU.64 UR6, c[0x0][0x390] &wr=0x2 ?trans2;
IADD3 R9, PT, PT, -R9, RZ, RZ ?trans1;
UIADD3.64 UR4, UPT, UPT, UR10, 0x20, URZ &req={1} ?trans1;
UIADD3.64 UR8, UPT, UPT, UR8, 0x20, URZ ?trans1;
UIADD3.64 UR6, UPT, UPT, UR6, 0x20, URZ &req={2} ?WAIT4_END_GROUP;
MOV.64 R2, UR4 ?trans2;
MOV.64 R6, UR8 ?trans2;
MOV.64 R4, UR6 ?WAIT8_END_GROUP;
LDG.E R10, desc[UR12][R2.64+-0x20] &req={0} &wr=0x2 ?trans4;
LDG.E R11, desc[UR12][R4.64+-0x20] &wr=0x2 ?trans2;
FADD R11, R10, R11 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR12][R6.64+-0x20], R11 &rd=0x0 ?trans4;
LDG.E R10, desc[UR12][R2.64+-0x1c] &wr=0x2 ?trans4;
LDG.E R13, desc[UR12][R4.64+-0x1c] &wr=0x2 ?trans2;
FADD R13, R10, R13 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR12][R6.64+-0x1c], R13 &rd=0x1 ?trans4;
LDG.E R10, desc[UR12][R2.64+-0x18] &wr=0x2 ?trans4;
LDG.E R15, desc[UR12][R4.64+-0x18] &wr=0x2 ?trans2;
FADD R15, R10, R15 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR12][R6.64+-0x18], R15 &rd=0x2 ?trans4;
LDG.E R10, desc[UR12][R2.64+-0x14] &wr=0x3 ?trans4;
LDG.E R17, desc[UR12][R4.64+-0x14] &wr=0x3 ?trans2;
FADD R17, R10, R17 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR12][R6.64+-0x14], R17 &rd=0x3 ?trans4;
LDG.E R10, desc[UR12][R2.64+-0x10] &wr=0x4 ?trans4;
LDG.E R11, desc[UR12][R4.64+-0x10] &req={0} &wr=0x4 ?trans2;
FADD R11, R10, R11 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR12][R6.64+-0x10], R11 &rd=0x0 ?trans4;
LDG.E R10, desc[UR12][R2.64+-0xc] &wr=0x4 ?trans4;
LDG.E R13, desc[UR12][R4.64+-0xc] &req={1} &wr=0x4 ?trans2;
FADD R13, R10, R13 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR12][R6.64+-0xc], R13 &rd=0x1 ?trans4;
LDG.E R10, desc[UR12][R2.64+-0x8] &wr=0x4 ?trans4;
LDG.E R15, desc[UR12][R4.64+-0x8] &req={2} &wr=0x4 ?trans2;
FADD R15, R10, R15 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR12][R6.64+-0x8], R15 &rd=0x2 ?trans4;
LDG.E R10, desc[UR12][R2.64+-0x4] &wr=0x4 ?trans4;
LDG.E R17, desc[UR12][R4.64+-0x4] &req={3} &wr=0x4 ?trans2;
FADD R17, R10, R17 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR12][R6.64+-0x4], R17 &rd=0x3 ?trans4;
LDG.E R10, desc[UR12][R2.64] &wr=0x4 ?trans4;
LDG.E R11, desc[UR12][R4.64] &req={0} &wr=0x4 ?trans2;
FADD R11, R10, R11 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR12][R6.64], R11 &rd=0x0 ?trans4;
LDG.E R10, desc[UR12][R2.64+0x4] &wr=0x4 ?trans4;
LDG.E R13, desc[UR12][R4.64+0x4] &req={1} &wr=0x4 ?trans2;
FADD R13, R10, R13 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR12][R6.64+0x4], R13 &rd=0x1 ?trans4;
LDG.E R10, desc[UR12][R2.64+0x8] &wr=0x4 ?trans4;
LDG.E R15, desc[UR12][R4.64+0x8] &req={2} &wr=0x4 ?trans2;
FADD R15, R10, R15 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR12][R6.64+0x8], R15 &rd=0x2 ?trans4;
LDG.E R10, desc[UR12][R2.64+0xc] &wr=0x4 ?trans4;
LDG.E R17, desc[UR12][R4.64+0xc] &req={3} &wr=0x4 ?trans2;
FADD R17, R10, R17 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR12][R6.64+0xc], R17 &rd=0x3 ?trans4;
LDG.E R10, desc[UR12][R2.64+0x10] &wr=0x4 ?trans4;
LDG.E R11, desc[UR12][R4.64+0x10] &req={0} &wr=0x4 ?trans2;
FADD R11, R10, R11 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR12][R6.64+0x10], R11 ?trans4;
LDG.E R10, desc[UR12][R2.64+0x14] &wr=0x4 ?trans4;
LDG.E R13, desc[UR12][R4.64+0x14] &req={1} &wr=0x4 ?trans2;
FADD R13, R10, R13 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR12][R6.64+0x14], R13 ?trans4;
LDG.E R10, desc[UR12][R2.64+0x18] &wr=0x4 ?trans4;
LDG.E R15, desc[UR12][R4.64+0x18] &req={2} &wr=0x4 ?trans1;
IADD3 R9, PT, PT, R9, 0x10, RZ ?trans1;
FADD R15, R10, R15 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR12][R6.64+0x18], R15 ?trans4;
LDG.E R10, desc[UR12][R2.64+0x1c] &rd=0x0 &wr=0x2 ?trans4;
LDG.E R17, desc[UR12][R4.64+0x1c] &req={3} &rd=0x1 &wr=0x2 ?trans1;
ISETP.NE.AND P1, PT, R9, RZ, PT ?trans1;
IADD3 R0, PT, PT, R0, 0x10, RZ ?trans1;
IADD.64 R2, R2, 0x40 &req={0} ?WAIT2_END_GROUP;
IADD.64 R4, R4, 0x40 &req={1} ?trans2;
FADD R17, R10, R17 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR12][R6.64+0x1c], R17 &rd=0x0 ?trans2;
IADD.64 R6, R6, 0x40 &req={0} ?trans2;
@P1 BRA 0x150 ?trans6;
@!P0 EXIT &req={0} ?trans5;
ISETP.GE.U32.AND P0, PT, R12, 0x8, PT ?trans1;
LOP3.LUT R14, R8, 0x7, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R14, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x880 ?trans6;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x390] &wr=0x1 ?trans8;
LDC.64 R6, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R2, R0, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R9, desc[UR12][R2.64] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R4, R0, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
LDG.E R10, desc[UR12][R4.64] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R6, R0, 0x4, R6 &req={2} ?WAIT4_END_GROUP;
FADD R9, R9, R10 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR12][R6.64], R9 &rd=0x0 ?trans4;
LDG.E R10, desc[UR12][R2.64+0x4] &wr=0x2 ?trans4;
LDG.E R11, desc[UR12][R4.64+0x4] &wr=0x2 ?trans2;
FADD R11, R10, R11 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR12][R6.64+0x4], R11 &rd=0x1 ?trans4;
LDG.E R10, desc[UR12][R2.64+0x8] &wr=0x2 ?trans4;
LDG.E R13, desc[UR12][R4.64+0x8] &wr=0x2 ?trans2;
FADD R13, R10, R13 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR12][R6.64+0x8], R13 &rd=0x2 ?trans4;
LDG.E R10, desc[UR12][R2.64+0xc] &wr=0x3 ?trans4;
LDG.E R15, desc[UR12][R4.64+0xc] &wr=0x3 ?trans2;
FADD R15, R10, R15 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR12][R6.64+0xc], R15 &rd=0x3 ?trans4;
LDG.E R9, desc[UR12][R2.64+0x10] &req={0} &wr=0x4 ?trans4;
LDG.E R10, desc[UR12][R4.64+0x10] &wr=0x4 ?trans2;
FADD R9, R9, R10 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR12][R6.64+0x10], R9 &rd=0x0 ?trans4;
LDG.E R10, desc[UR12][R2.64+0x14] &wr=0x4 ?trans4;
LDG.E R11, desc[UR12][R4.64+0x14] &req={1} &wr=0x4 ?trans2;
FADD R11, R10, R11 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR12][R6.64+0x14], R11 &rd=0x0 ?trans4;
LDG.E R10, desc[UR12][R2.64+0x18] &wr=0x4 ?trans4;
LDG.E R13, desc[UR12][R4.64+0x18] &req={2} &wr=0x4 ?trans2;
FADD R13, R10, R13 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR12][R6.64+0x18], R13 &rd=0x0 ?trans4;
LDG.E R10, desc[UR12][R2.64+0x1c] &wr=0x2 ?trans4;
LDG.E R15, desc[UR12][R4.64+0x1c] &req={3} &wr=0x2 ?trans1;
IADD3 R0, PT, PT, R0, 0x8, RZ ?trans1;
FADD R15, R10, R15 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR12][R6.64+0x1c], R15 &rd=0x0 ?trans2;
@!P1 EXIT ?trans5;
ISETP.GE.U32.AND P0, PT, R14, 0x4, PT ?trans1;
LOP3.LUT R8, R8, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R8, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0xa40 ?trans6;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans8;
LDC.64 R4, c[0x0][0x390] &wr=0x2 ?trans8;
LDC.64 R6, c[0x0][0x380] &req={0} &wr=0x0 ?trans1;
IMAD.WIDE.U32 R2, R0, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
LDG.E R9, desc[UR12][R2.64] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R4, R0, 0x4, R4 &req={2} ?WAIT5_END_GROUP;
LDG.E R10, desc[UR12][R4.64] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R6, R0, 0x4, R6 &req={0} ?WAIT4_END_GROUP;
FADD R9, R9, R10 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR12][R6.64], R9 &rd=0x1 ?trans4;
LDG.E R10, desc[UR12][R2.64+0x4] &wr=0x2 ?trans4;
LDG.E R11, desc[UR12][R4.64+0x4] &wr=0x2 ?trans2;
FADD R11, R10, R11 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR12][R6.64+0x4], R11 &rd=0x1 ?trans4;
LDG.E R10, desc[UR12][R2.64+0x8] &wr=0x2 ?trans4;
LDG.E R13, desc[UR12][R4.64+0x8] &wr=0x2 ?trans2;
FADD R13, R10, R13 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR12][R6.64+0x8], R13 &rd=0x1 ?trans4;
LDG.E R10, desc[UR12][R2.64+0xc] &wr=0x2 ?trans4;
LDG.E R15, desc[UR12][R4.64+0xc] &wr=0x2 ?trans1;
IADD3 R0, PT, PT, R0, 0x4, RZ ?trans1;
FADD R15, R10, R15 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR12][R6.64+0xc], R15 &rd=0x1 ?trans2;
@!P1 EXIT ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans1;
IADD3 R8, PT, PT, -R8, RZ, RZ ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x390] &wr=0x3 ?trans8;
LDC.64 R6, c[0x0][0x388] &req={1,0} &wr=0x0 ?trans1;
IMAD.WIDE.U32 R2, R0, 0x4, R2 &req={2} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R0, 0x4, R4 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R6, R0, 0x4, R6 &req={0} ?WAIT7_END_GROUP;
LDG.E R0, desc[UR12][R6.64] &rd=0x0 &wr=0x2 ?trans4;
LDG.E R9, desc[UR12][R4.64] &rd=0x1 &wr=0x2 ?trans1;
IADD3 R8, PT, PT, R8, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R8, RZ, PT ?trans1;
IADD.64 R6, R6, 0x4 &req={0} ?trans2;
IADD.64 R4, R4, 0x4 &req={1} ?trans2;
FADD R9, R0, R9 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR12][R2.64], R9 &rd=0x0 ?trans2;
IADD.64 R2, R2, 0x4 &req={0} ?trans2;
@P0 BRA 0xac0 ?trans6;
EXIT ?trans5;
BRA 0xb70;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: vector_add(float*, float*, float*, int)
_Z10vector_addPfS_S_i:
s_load_b32 s2, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s2, 1
s_cbranch_scc1 .LBB0_3
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
v_mov_b32_e32 v0, 0
.LBB0_2:
s_waitcnt lgkmcnt(0)
s_clause 0x1
global_load_b32 v1, v0, s[6:7]
global_load_b32 v2, v0, s[0:1]
s_add_i32 s2, s2, -1
s_add_u32 s6, s6, 4
s_addc_u32 s7, s7, 0
s_add_u32 s0, s0, 4
s_addc_u32 s1, s1, 0
s_waitcnt vmcnt(0)
v_add_f32_e32 v1, v1, v2
global_store_b32 v0, v1, s[4:5]
s_add_u32 s4, s4, 4
s_addc_u32 s5, s5, 0
s_cmp_eq_u32 s2, 0
s_cbranch_scc0 .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| vector_add | 5,344 | 390 | stackv2-00000-of-00015 |
// Demangled: helloWorldKernel()
Function : _Z16helloWorldKernelv
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x4][0x8] &wr=0x1 ?trans1;
MOV R2, 0x0 ?trans1;
CS2R R6, SRZ ?WAIT5_END_GROUP;
LDC.64 R2, c[0x4][R2] &wr=0x2 ?trans1;
MOV R4, UR4 &req={1} ?trans1;
MOV R5, UR5 ?WAIT7_END_GROUP;
LEPC R20, 0x90 ?WAIT7_END_GROUP;
CALL.ABS.NOINC R2 &req={2,0} ?trans5;
EXIT ?trans5;
BRA 0xa0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: helloWorldKernel()
_Z16helloWorldKernelv:
s_load_b64 s[4:5], s[0:1], 0x50
v_mbcnt_lo_u32_b32 v4, -1, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_readfirstlane_b32 s2, v4
v_mov_b32_e32 v6, 0
v_mov_b32_e32 v7, 0
s_mov_b32 s32, 0
v_cmp_eq_u32_e64 s2, s2, v4
s_delay_alu instid0(VALU_DEP_1)
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB1_6
v_mov_b32_e32 v0, 0
s_mov_b32 s6, exec_lo
s_waitcnt lgkmcnt(0)
global_load_b64 v[8:9], v0, s[4:5] offset:24 glc
s_waitcnt vmcnt(0)
buffer_gl1_inv
buffer_gl0_inv
s_clause 0x1
global_load_b64 v[1:2], v0, s[4:5] offset:40
global_load_b64 v[5:6], v0, s[4:5]
s_waitcnt vmcnt(1)
v_and_b32_e32 v1, v1, v8
v_and_b32_e32 v2, v2, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_hi_u32 v3, v1, 24
v_mul_lo_u32 v2, v2, 24
v_mul_lo_u32 v1, v1, 24
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v2, v3, v2
s_waitcnt vmcnt(0)
v_add_co_u32 v1, vcc_lo, v5, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
global_load_b64 v[6:7], v[1:2], off glc
s_waitcnt vmcnt(0)
global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[4:5] offset:24 glc
s_waitcnt vmcnt(0)
buffer_gl1_inv
buffer_gl0_inv
v_cmpx_ne_u64_e64 v[6:7], v[8:9]
s_cbranch_execz .LBB1_5
s_mov_b32 s7, 0
.LBB1_3:
s_sleep 1
s_clause 0x1
global_load_b64 v[1:2], v0, s[4:5] offset:40
global_load_b64 v[10:11], v0, s[4:5]
v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
s_waitcnt vmcnt(1)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_and_b32_e32 v1, v1, v8
v_and_b32_e32 v7, v2, v9
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
v_mov_b32_e32 v1, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
v_mov_b32_e32 v6, v2
global_load_b64 v[6:7], v[5:6], off glc
s_waitcnt vmcnt(0)
global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[4:5] offset:24 glc
s_waitcnt vmcnt(0)
buffer_gl1_inv
buffer_gl0_inv
v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
s_or_b32 s7, vcc_lo, s7
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s7
s_cbranch_execnz .LBB1_3
s_or_b32 exec_lo, exec_lo, s7
.LBB1_5:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s6
.LBB1_6:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s3
v_mov_b32_e32 v5, 0
v_readfirstlane_b32 s6, v6
v_readfirstlane_b32 s7, v7
s_mov_b32 s12, exec_lo
s_waitcnt lgkmcnt(0)
s_clause 0x1
global_load_b64 v[8:9], v5, s[4:5] offset:40
global_load_b128 v[0:3], v5, s[4:5]
s_waitcnt vmcnt(1)
v_readfirstlane_b32 s8, v8
v_readfirstlane_b32 s9, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b64 s[8:9], s[6:7], s[8:9]
s_mul_i32 s3, s9, 24
s_mul_hi_u32 s10, s8, 24
s_mul_i32 s11, s8, 24
s_and_saveexec_b32 s13, s2
s_cbranch_execz .LBB1_8
v_dual_mov_b32 v6, s12 :: v_dual_mov_b32 v7, v5
s_add_i32 s12, s10, s3
s_waitcnt vmcnt(0)
v_add_co_u32 v10, vcc_lo, v0, s11
v_add_co_ci_u32_e32 v11, vcc_lo, s12, v1, vcc_lo
v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
global_store_b128 v[10:11], v[6:9], off offset:8
.LBB1_8:
s_or_b32 exec_lo, exec_lo, s13
s_lshl_b64 s[8:9], s[8:9], 12
v_lshlrev_b64 v[6:7], 6, v[4:5]
s_waitcnt vmcnt(0)
v_add_co_u32 v2, vcc_lo, v2, s8
v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
s_mov_b32 s12, 0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_u32 v8, vcc_lo, v2, v6
s_mov_b32 s13, s12
s_mov_b32 s14, s12
s_mov_b32 s15, s12
v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
v_mov_b32_e32 v6, v5
v_dual_mov_b32 v10, s12 :: v_dual_mov_b32 v13, s15
v_dual_mov_b32 v11, s13 :: v_dual_mov_b32 v12, s14
s_clause 0x3
global_store_b128 v[8:9], v[4:7], off
global_store_b128 v[8:9], v[10:13], off offset:16
global_store_b128 v[8:9], v[10:13], off offset:32
global_store_b128 v[8:9], v[10:13], off offset:48
s_and_saveexec_b32 s8, s2
s_cbranch_execz .LBB1_15
v_mov_b32_e32 v10, 0
s_mov_b32 s9, exec_lo
s_clause 0x1
global_load_b64 v[13:14], v10, s[4:5] offset:32 glc
global_load_b64 v[2:3], v10, s[4:5] offset:40
v_dual_mov_b32 v11, s6 :: v_dual_mov_b32 v12, s7
s_waitcnt vmcnt(0)
v_and_b32_e32 v3, s7, v3
v_and_b32_e32 v2, s6, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_lo_u32 v3, v3, 24
v_mul_hi_u32 v4, v2, 24
v_mul_lo_u32 v2, v2, 24
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v3, v4, v3
v_add_co_u32 v6, vcc_lo, v0, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo
global_store_b64 v[6:7], v[13:14], off
s_waitcnt_vscnt null, 0x0
global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[4:5] offset:32 glc
s_waitcnt vmcnt(0)
v_cmpx_ne_u64_e64 v[4:5], v[13:14]
s_cbranch_execz .LBB1_11
.LBB1_10:
v_dual_mov_b32 v2, s6 :: v_dual_mov_b32 v3, s7
s_sleep 1
global_store_b64 v[6:7], v[4:5], off
s_waitcnt_vscnt null, 0x0
global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[4:5] offset:32 glc
s_waitcnt vmcnt(0)
v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
s_or_b32 s12, vcc_lo, s12
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s12
s_cbranch_execnz .LBB1_10
.LBB1_11:
s_or_b32 exec_lo, exec_lo, s9
v_mov_b32_e32 v5, 0
s_mov_b32 s12, exec_lo
s_mov_b32 s9, exec_lo
v_mbcnt_lo_u32_b32 v4, s12, 0
global_load_b64 v[2:3], v5, s[4:5] offset:16
v_cmpx_eq_u32_e32 0, v4
s_cbranch_execz .LBB1_13
s_bcnt1_i32_b32 s12, s12
s_delay_alu instid0(SALU_CYCLE_1)
v_mov_b32_e32 v4, s12
s_waitcnt vmcnt(0)
global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB1_13:
s_or_b32 exec_lo, exec_lo, s9
s_waitcnt vmcnt(0)
global_load_b64 v[4:5], v[2:3], off offset:16
s_waitcnt vmcnt(0)
v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
s_cbranch_vccnz .LBB1_15
global_load_b32 v2, v[2:3], off offset:24
v_mov_b32_e32 v3, 0
s_waitcnt vmcnt(0)
v_readfirstlane_b32 s9, v2
s_waitcnt_vscnt null, 0x0
global_store_b64 v[4:5], v[2:3], off
s_and_b32 m0, s9, 0xff
s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_15:
s_or_b32 exec_lo, exec_lo, s8
s_add_i32 s10, s10, s3
v_add_co_u32 v0, vcc_lo, v0, s11
v_add_co_ci_u32_e32 v1, vcc_lo, s10, v1, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, v0, 20
v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_16:
v_mov_b32_e32 v2, 1
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB1_18
global_load_b32 v2, v[0:1], off glc
s_waitcnt vmcnt(0)
buffer_gl1_inv
buffer_gl0_inv
v_and_b32_e32 v2, 1, v2
.LBB1_18:
s_or_b32 exec_lo, exec_lo, s3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_readfirstlane_b32 s3, v2
s_cmp_eq_u32 s3, 0
s_cbranch_scc1 .LBB1_20
s_mov_b32 s3, 0
s_sleep 1
s_branch .LBB1_21
.LBB1_20:
s_mov_b32 s3, -1
.LBB1_21:
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 vcc_lo, exec_lo, s3
s_cbranch_vccnz .LBB1_16
global_load_b64 v[0:1], v[8:9], off
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB1_26
v_mov_b32_e32 v8, 0
s_clause 0x2
global_load_b64 v[4:5], v8, s[4:5] offset:40
global_load_b64 v[9:10], v8, s[4:5] offset:24 glc
global_load_b64 v[6:7], v8, s[4:5]
s_waitcnt vmcnt(2)
v_add_co_u32 v11, vcc_lo, v4, 1
v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, v11, s6
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v12, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
v_and_b32_e32 v5, v3, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_and_b32_e32 v4, v2, v4
v_mul_lo_u32 v5, v5, 24
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_hi_u32 v11, v4, 24
v_mul_lo_u32 v4, v4, 24
v_add_nc_u32_e32 v5, v11, v5
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_co_u32 v6, vcc_lo, v6, v4
v_mov_b32_e32 v4, v9
v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
v_mov_b32_e32 v5, v10
global_store_b64 v[6:7], v[9:10], off
s_waitcnt_vscnt null, 0x0
global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[4:5] offset:24 glc
s_waitcnt vmcnt(0)
v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB1_26
s_mov_b32 s2, 0
.LBB1_25:
s_sleep 1
global_store_b64 v[6:7], v[4:5], off
s_waitcnt_vscnt null, 0x0
global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[4:5] offset:24 glc
s_waitcnt vmcnt(0)
v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
s_or_b32 s2, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB1_25
.LBB1_26:
s_or_b32 exec_lo, exec_lo, s3
s_getpc_b64 s[2:3]
s_add_u32 s2, s2, .str@rel32@lo+4
s_addc_u32 s3, s3, .str@rel32@hi+12
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
s_cmp_lg_u64 s[2:3], 0
v_mov_b32_e32 v6, 1
s_cselect_b32 s6, 22, 0
v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s6
s_mov_b64 s[8:9], s[0:1]
s_getpc_b64 s[4:5]
s_add_u32 s4, s4, __ockl_printf_append_string_n@rel32@lo+4
s_addc_u32 s5, s5, __ockl_printf_append_string_n@rel32@hi+12
s_delay_alu instid0(SALU_CYCLE_1)
s_swappc_b64 s[30:31], s[4:5]
s_endpgm
| helloWorldKernel | 243 | 5,059 | stackv2-00000-of-00015 |
// Demangled: helloWorldwithThreadKernel()
Function : _Z26helloWorldwithThreadKernelv
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R8, SR_CTAID.X &wr=0x1 ?trans1;
IADD3 R1, PT, PT, R1, -0x8, RZ &req={0} ?trans1;
LDCU UR4, c[0x0][0x2f8] &wr=0x0 ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?trans1;
S2R R9, SR_TID.X &wr=0x1 ?trans1;
MOV R0, 0x0 ?trans1;
LDCU UR5, c[0x0][0x2fc] &wr=0x0 ?trans1;
MOV R2, R1 ?trans1;
LDCU.64 UR6, c[0x4][0x10] &wr=0x2 ?trans4;
IADD.64 R6, R2, UR4 &req={0} ?WAIT2_END_GROUP;
LDC.64 R2, c[0x4][R0] &rd=0x0 &wr=0x3 ?trans1;
MOV R4, UR6 &req={2} ?trans1;
MOV R5, UR7 ?trans1;
STL.64 [R1], R8 &req={1} &rd=0x0 ?trans6;
LEPC R20, 0x110 ?WAIT7_END_GROUP;
CALL.ABS.NOINC R2 &req={3,0} ?trans5;
EXIT ?trans5;
BRA 0x120;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: helloWorldwithThreadKernel()
_Z26helloWorldwithThreadKernelv:
s_load_b64 s[20:21], s[0:1], 0x50
v_mbcnt_lo_u32_b32 v39, -1, 0
v_mov_b32_e32 v6, 0
v_dual_mov_b32 v38, v0 :: v_dual_mov_b32 v7, 0
s_mov_b32 s18, s15
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mov_b32_e32 v4, v39
v_readfirstlane_b32 s2, v4
s_mov_b32 s32, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_eq_u32_e64 s2, s2, v4
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB2_6
v_mov_b32_e32 v0, 0
s_mov_b32 s4, exec_lo
s_waitcnt lgkmcnt(0)
global_load_b64 v[8:9], v0, s[20:21] offset:24 glc
s_waitcnt vmcnt(0)
buffer_gl1_inv
buffer_gl0_inv
s_clause 0x1
global_load_b64 v[1:2], v0, s[20:21] offset:40
global_load_b64 v[5:6], v0, s[20:21]
s_waitcnt vmcnt(1)
v_and_b32_e32 v1, v1, v8
v_and_b32_e32 v2, v2, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_hi_u32 v3, v1, 24
v_mul_lo_u32 v2, v2, 24
v_mul_lo_u32 v1, v1, 24
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v2, v3, v2
s_waitcnt vmcnt(0)
v_add_co_u32 v1, vcc_lo, v5, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
global_load_b64 v[6:7], v[1:2], off glc
s_waitcnt vmcnt(0)
global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
s_waitcnt vmcnt(0)
buffer_gl1_inv
buffer_gl0_inv
v_cmpx_ne_u64_e64 v[6:7], v[8:9]
s_cbranch_execz .LBB2_5
s_mov_b32 s5, 0
.LBB2_3:
s_sleep 1
s_clause 0x1
global_load_b64 v[1:2], v0, s[20:21] offset:40
global_load_b64 v[10:11], v0, s[20:21]
v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
s_waitcnt vmcnt(1)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_and_b32_e32 v1, v1, v8
v_and_b32_e32 v7, v2, v9
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
v_mov_b32_e32 v1, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
v_mov_b32_e32 v6, v2
global_load_b64 v[6:7], v[5:6], off glc
s_waitcnt vmcnt(0)
global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
s_waitcnt vmcnt(0)
buffer_gl1_inv
buffer_gl0_inv
v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
s_or_b32 s5, vcc_lo, s5
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s5
s_cbranch_execnz .LBB2_3
s_or_b32 exec_lo, exec_lo, s5
.LBB2_5:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s4
.LBB2_6:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s3
v_mov_b32_e32 v5, 0
v_readfirstlane_b32 s4, v6
v_readfirstlane_b32 s5, v7
s_mov_b32 s10, exec_lo
s_waitcnt lgkmcnt(0)
s_clause 0x1
global_load_b64 v[8:9], v5, s[20:21] offset:40
global_load_b128 v[0:3], v5, s[20:21]
s_waitcnt vmcnt(1)
v_readfirstlane_b32 s6, v8
v_readfirstlane_b32 s7, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b64 s[6:7], s[4:5], s[6:7]
s_mul_i32 s3, s7, 24
s_mul_hi_u32 s8, s6, 24
s_mul_i32 s9, s6, 24
s_and_saveexec_b32 s11, s2
s_cbranch_execz .LBB2_8
v_dual_mov_b32 v6, s10 :: v_dual_mov_b32 v7, v5
s_add_i32 s10, s8, s3
s_waitcnt vmcnt(0)
v_add_co_u32 v10, vcc_lo, v0, s9
v_add_co_ci_u32_e32 v11, vcc_lo, s10, v1, vcc_lo
v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
global_store_b128 v[10:11], v[6:9], off offset:8
.LBB2_8:
s_or_b32 exec_lo, exec_lo, s11
s_lshl_b64 s[6:7], s[6:7], 12
v_lshlrev_b64 v[6:7], 6, v[4:5]
s_waitcnt vmcnt(0)
v_add_co_u32 v2, vcc_lo, v2, s6
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
s_mov_b32 s12, 0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_u32 v8, vcc_lo, v2, v6
s_mov_b32 s13, s12
s_mov_b32 s14, s12
s_mov_b32 s15, s12
v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
v_mov_b32_e32 v6, v5
v_dual_mov_b32 v10, s12 :: v_dual_mov_b32 v13, s15
v_dual_mov_b32 v11, s13 :: v_dual_mov_b32 v12, s14
s_clause 0x3
global_store_b128 v[8:9], v[4:7], off
global_store_b128 v[8:9], v[10:13], off offset:16
global_store_b128 v[8:9], v[10:13], off offset:32
global_store_b128 v[8:9], v[10:13], off offset:48
s_and_saveexec_b32 s6, s2
s_cbranch_execz .LBB2_16
v_mov_b32_e32 v10, 0
s_mov_b32 s7, exec_lo
s_clause 0x1
global_load_b64 v[13:14], v10, s[20:21] offset:32 glc
global_load_b64 v[2:3], v10, s[20:21] offset:40
v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v12, s5
s_waitcnt vmcnt(0)
v_and_b32_e32 v3, s5, v3
v_and_b32_e32 v2, s4, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_lo_u32 v3, v3, 24
v_mul_hi_u32 v4, v2, 24
v_mul_lo_u32 v2, v2, 24
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v3, v4, v3
v_add_co_u32 v6, vcc_lo, v0, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo
global_store_b64 v[6:7], v[13:14], off
s_waitcnt_vscnt null, 0x0
global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[20:21] offset:32 glc
s_waitcnt vmcnt(0)
v_cmpx_ne_u64_e64 v[4:5], v[13:14]
s_cbranch_execz .LBB2_12
s_mov_b32 s10, 0
.LBB2_11:
v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v3, s5
s_sleep 1
global_store_b64 v[6:7], v[4:5], off
s_waitcnt_vscnt null, 0x0
global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[20:21] offset:32 glc
s_waitcnt vmcnt(0)
v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
s_or_b32 s10, vcc_lo, s10
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s10
s_cbranch_execnz .LBB2_11
.LBB2_12:
s_or_b32 exec_lo, exec_lo, s7
v_mov_b32_e32 v5, 0
s_mov_b32 s10, exec_lo
s_mov_b32 s7, exec_lo
v_mbcnt_lo_u32_b32 v4, s10, 0
global_load_b64 v[2:3], v5, s[20:21] offset:16
v_cmpx_eq_u32_e32 0, v4
s_cbranch_execz .LBB2_14
s_bcnt1_i32_b32 s10, s10
s_delay_alu instid0(SALU_CYCLE_1)
v_mov_b32_e32 v4, s10
s_waitcnt vmcnt(0)
global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB2_14:
s_or_b32 exec_lo, exec_lo, s7
s_waitcnt vmcnt(0)
global_load_b64 v[4:5], v[2:3], off offset:16
s_waitcnt vmcnt(0)
v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
s_cbranch_vccnz .LBB2_16
global_load_b32 v2, v[2:3], off offset:24
v_mov_b32_e32 v3, 0
s_waitcnt vmcnt(0)
v_readfirstlane_b32 s7, v2
s_waitcnt_vscnt null, 0x0
global_store_b64 v[4:5], v[2:3], off
s_and_b32 m0, s7, 0xff
s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_16:
s_or_b32 exec_lo, exec_lo, s6
s_add_i32 s8, s8, s3
v_add_co_u32 v0, vcc_lo, v0, s9
v_add_co_ci_u32_e32 v1, vcc_lo, s8, v1, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, v0, 20
v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_17:
v_mov_b32_e32 v2, 1
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB2_19
global_load_b32 v2, v[0:1], off glc
s_waitcnt vmcnt(0)
buffer_gl1_inv
buffer_gl0_inv
v_and_b32_e32 v2, 1, v2
.LBB2_19:
s_or_b32 exec_lo, exec_lo, s3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_readfirstlane_b32 s3, v2
s_cmp_eq_u32 s3, 0
s_cbranch_scc1 .LBB2_21
s_mov_b32 s3, 0
s_sleep 1
s_branch .LBB2_22
.LBB2_21:
s_mov_b32 s3, -1
.LBB2_22:
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 vcc_lo, exec_lo, s3
s_cbranch_vccnz .LBB2_17
global_load_b64 v[0:1], v[8:9], off
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB2_27
v_mov_b32_e32 v8, 0
s_clause 0x2
global_load_b64 v[4:5], v8, s[20:21] offset:40
global_load_b64 v[9:10], v8, s[20:21] offset:24 glc
global_load_b64 v[6:7], v8, s[20:21]
s_waitcnt vmcnt(2)
v_add_co_u32 v11, vcc_lo, v4, 1
v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, v11, s4
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v12, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
v_and_b32_e32 v5, v3, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_and_b32_e32 v4, v2, v4
v_mul_lo_u32 v5, v5, 24
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_hi_u32 v11, v4, 24
v_mul_lo_u32 v4, v4, 24
v_add_nc_u32_e32 v5, v11, v5
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_co_u32 v6, vcc_lo, v6, v4
v_mov_b32_e32 v4, v9
v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
v_mov_b32_e32 v5, v10
global_store_b64 v[6:7], v[9:10], off
s_waitcnt_vscnt null, 0x0
global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[20:21] offset:24 glc
s_waitcnt vmcnt(0)
v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB2_27
s_mov_b32 s2, 0
.LBB2_26:
s_sleep 1
global_store_b64 v[6:7], v[4:5], off
s_waitcnt_vscnt null, 0x0
global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[20:21] offset:24 glc
s_waitcnt vmcnt(0)
v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
s_or_b32 s2, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB2_26
.LBB2_27:
s_or_b32 exec_lo, exec_lo, s3
s_getpc_b64 s[2:3]
s_add_u32 s2, s2, .str.1@rel32@lo+4
s_addc_u32 s3, s3, .str.1@rel32@hi+12
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
s_cmp_lg_u64 s[2:3], 0
v_mov_b32_e32 v6, 0
s_cselect_b32 s6, 43, 0
v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s6
s_mov_b64 s[8:9], s[0:1]
s_getpc_b64 s[4:5]
s_add_u32 s4, s4, __ockl_printf_append_string_n@rel32@lo+4
s_addc_u32 s5, s5, __ockl_printf_append_string_n@rel32@hi+12
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
s_swappc_b64 s[30:31], s[4:5]
v_mov_b32_e32 v2, v39
v_mov_b32_e32 v8, 0
v_mov_b32_e32 v9, 0
v_readfirstlane_b32 s0, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_eq_u32_e64 s0, s0, v2
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB2_33
v_mov_b32_e32 v3, 0
s_mov_b32 s2, exec_lo
global_load_b64 v[6:7], v3, s[20:21] offset:24 glc
s_waitcnt vmcnt(0)
buffer_gl1_inv
buffer_gl0_inv
s_clause 0x1
global_load_b64 v[4:5], v3, s[20:21] offset:40
global_load_b64 v[8:9], v3, s[20:21]
s_waitcnt vmcnt(1)
v_and_b32_e32 v4, v4, v6
v_and_b32_e32 v5, v5, v7
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_hi_u32 v10, v4, 24
v_mul_lo_u32 v5, v5, 24
v_mul_lo_u32 v4, v4, 24
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v5, v10, v5
s_waitcnt vmcnt(0)
v_add_co_u32 v4, vcc_lo, v8, v4
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo
global_load_b64 v[4:5], v[4:5], off glc
s_waitcnt vmcnt(0)
global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[20:21] offset:24 glc
s_waitcnt vmcnt(0)
buffer_gl1_inv
buffer_gl0_inv
v_cmpx_ne_u64_e64 v[8:9], v[6:7]
s_cbranch_execz .LBB2_32
s_mov_b32 s3, 0
.LBB2_30:
s_sleep 1
s_clause 0x1
global_load_b64 v[4:5], v3, s[20:21] offset:40
global_load_b64 v[10:11], v3, s[20:21]
v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9
s_waitcnt vmcnt(1)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_and_b32_e32 v4, v4, v6
v_and_b32_e32 v5, v5, v7
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[8:9], null, v4, 24, v[10:11]
v_mov_b32_e32 v4, v9
s_delay_alu instid0(VALU_DEP_1)
v_mad_u64_u32 v[9:10], null, v5, 24, v[4:5]
global_load_b64 v[4:5], v[8:9], off glc
s_waitcnt vmcnt(0)
global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[20:21] offset:24 glc
s_waitcnt vmcnt(0)
buffer_gl1_inv
buffer_gl0_inv
v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7]
s_or_b32 s3, vcc_lo, s3
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s3
s_cbranch_execnz .LBB2_30
s_or_b32 exec_lo, exec_lo, s3
.LBB2_32:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s2
.LBB2_33:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s1
v_mov_b32_e32 v3, 0
v_readfirstlane_b32 s2, v8
v_readfirstlane_b32 s3, v9
s_mov_b32 s8, exec_lo
s_clause 0x1
global_load_b64 v[10:11], v3, s[20:21] offset:40
global_load_b128 v[4:7], v3, s[20:21]
s_waitcnt vmcnt(1)
v_readfirstlane_b32 s4, v10
v_readfirstlane_b32 s5, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b64 s[4:5], s[2:3], s[4:5]
s_mul_i32 s1, s5, 24
s_mul_hi_u32 s6, s4, 24
s_mul_i32 s7, s4, 24
s_and_saveexec_b32 s9, s0
s_cbranch_execz .LBB2_35
v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, v3
s_add_i32 s8, s6, s1
s_waitcnt vmcnt(0)
v_add_co_u32 v12, vcc_lo, v4, s7
v_add_co_ci_u32_e32 v13, vcc_lo, s8, v5, vcc_lo
v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1
global_store_b128 v[12:13], v[8:11], off offset:8
.LBB2_35:
s_or_b32 exec_lo, exec_lo, s9
s_lshl_b64 s[4:5], s[4:5], 12
v_lshlrev_b64 v[8:9], 6, v[2:3]
s_waitcnt vmcnt(0)
v_add_co_u32 v2, vcc_lo, v6, s4
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
s_mov_b32 s8, 0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_u32 v6, vcc_lo, v2, v8
s_mov_b32 s9, s8
s_mov_b32 s10, s8
s_mov_b32 s11, s8
v_and_or_b32 v0, 0xffffff1f, v0, 32
v_add_co_ci_u32_e32 v7, vcc_lo, v7, v9, vcc_lo
v_mov_b32_e32 v2, s18
v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v11, s11
v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v10, s10
s_clause 0x3
global_store_b128 v[6:7], v[0:3], off
global_store_b128 v[6:7], v[8:11], off offset:16
global_store_b128 v[6:7], v[8:11], off offset:32
global_store_b128 v[6:7], v[8:11], off offset:48
s_and_saveexec_b32 s4, s0
s_cbranch_execz .LBB2_43
v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
v_mov_b32_e32 v12, s3
s_clause 0x1
global_load_b64 v[13:14], v10, s[20:21] offset:32 glc
global_load_b64 v[0:1], v10, s[20:21] offset:40
s_waitcnt vmcnt(0)
v_readfirstlane_b32 s8, v0
v_readfirstlane_b32 s9, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b64 s[8:9], s[8:9], s[2:3]
s_mul_i32 s5, s9, 24
s_mul_hi_u32 s9, s8, 24
s_mul_i32 s8, s8, 24
s_add_i32 s9, s9, s5
v_add_co_u32 v8, vcc_lo, v4, s8
v_add_co_ci_u32_e32 v9, vcc_lo, s9, v5, vcc_lo
s_mov_b32 s5, exec_lo
global_store_b64 v[8:9], v[13:14], off
s_waitcnt_vscnt null, 0x0
global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[20:21] offset:32 glc
s_waitcnt vmcnt(0)
v_cmpx_ne_u64_e64 v[2:3], v[13:14]
s_cbranch_execz .LBB2_39
s_mov_b32 s8, 0
.LBB2_38:
v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
s_sleep 1
global_store_b64 v[8:9], v[2:3], off
s_waitcnt_vscnt null, 0x0
global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[20:21] offset:32 glc
s_waitcnt vmcnt(0)
v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
s_or_b32 s8, vcc_lo, s8
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s8
s_cbranch_execnz .LBB2_38
.LBB2_39:
s_or_b32 exec_lo, exec_lo, s5
v_mov_b32_e32 v3, 0
s_mov_b32 s8, exec_lo
s_mov_b32 s5, exec_lo
v_mbcnt_lo_u32_b32 v2, s8, 0
global_load_b64 v[0:1], v3, s[20:21] offset:16
v_cmpx_eq_u32_e32 0, v2
s_cbranch_execz .LBB2_41
s_bcnt1_i32_b32 s8, s8
s_delay_alu instid0(SALU_CYCLE_1)
v_mov_b32_e32 v2, s8
s_waitcnt vmcnt(0)
global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB2_41:
s_or_b32 exec_lo, exec_lo, s5
s_waitcnt vmcnt(0)
global_load_b64 v[2:3], v[0:1], off offset:16
s_waitcnt vmcnt(0)
v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
s_cbranch_vccnz .LBB2_43
global_load_b32 v0, v[0:1], off offset:24
v_mov_b32_e32 v1, 0
s_waitcnt vmcnt(0)
v_readfirstlane_b32 s5, v0
s_waitcnt_vscnt null, 0x0
global_store_b64 v[2:3], v[0:1], off
s_and_b32 m0, s5, 0xff
s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_43:
s_or_b32 exec_lo, exec_lo, s4
s_add_i32 s6, s6, s1
v_add_co_u32 v0, vcc_lo, v4, s7
v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, v0, 20
v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_44:
v_mov_b32_e32 v2, 1
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB2_46
global_load_b32 v2, v[0:1], off glc
s_waitcnt vmcnt(0)
buffer_gl1_inv
buffer_gl0_inv
v_and_b32_e32 v2, 1, v2
.LBB2_46:
s_or_b32 exec_lo, exec_lo, s1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_readfirstlane_b32 s1, v2
s_cmp_eq_u32 s1, 0
s_cbranch_scc1 .LBB2_48
s_mov_b32 s1, 0
s_sleep 1
s_branch .LBB2_49
.LBB2_48:
s_mov_b32 s1, -1
.LBB2_49:
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 vcc_lo, exec_lo, s1
s_cbranch_vccnz .LBB2_44
global_load_b64 v[36:37], v[6:7], off
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB2_54
v_mov_b32_e32 v6, 0
s_clause 0x2
global_load_b64 v[2:3], v6, s[20:21] offset:40
global_load_b64 v[7:8], v6, s[20:21] offset:24 glc
global_load_b64 v[4:5], v6, s[20:21]
s_waitcnt vmcnt(2)
v_add_co_u32 v9, vcc_lo, v2, 1
v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, v9, s2
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
v_and_b32_e32 v3, v1, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_and_b32_e32 v2, v0, v2
v_mul_lo_u32 v3, v3, 24
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_hi_u32 v9, v2, 24
v_mul_lo_u32 v2, v2, 24
v_add_nc_u32_e32 v3, v9, v3
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_co_u32 v4, vcc_lo, v4, v2
v_mov_b32_e32 v2, v7
v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
v_mov_b32_e32 v3, v8
global_store_b64 v[4:5], v[7:8], off
s_waitcnt_vscnt null, 0x0
global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[20:21] offset:24 glc
s_waitcnt vmcnt(0)
v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB2_54
s_mov_b32 s0, 0
.LBB2_53:
s_sleep 1
global_store_b64 v[4:5], v[2:3], off
s_waitcnt_vscnt null, 0x0
global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[20:21] offset:24 glc
s_waitcnt vmcnt(0)
v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
s_or_b32 s0, vcc_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s0
s_cbranch_execnz .LBB2_53
.LBB2_54:
s_or_b32 exec_lo, exec_lo, s1
v_readfirstlane_b32 s0, v39
v_mov_b32_e32 v4, 0
v_mov_b32_e32 v5, 0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_eq_u32_e64 s0, s0, v39
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB2_60
v_mov_b32_e32 v0, 0
s_mov_b32 s2, exec_lo
global_load_b64 v[6:7], v0, s[20:21] offset:24 glc
s_waitcnt vmcnt(0)
buffer_gl1_inv
buffer_gl0_inv
s_clause 0x1
global_load_b64 v[1:2], v0, s[20:21] offset:40
global_load_b64 v[3:4], v0, s[20:21]
s_waitcnt vmcnt(1)
v_and_b32_e32 v1, v1, v6
v_and_b32_e32 v2, v2, v7
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_hi_u32 v5, v1, 24
v_mul_lo_u32 v2, v2, 24
v_mul_lo_u32 v1, v1, 24
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v2, v5, v2
s_waitcnt vmcnt(0)
v_add_co_u32 v1, vcc_lo, v3, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, v4, v2, vcc_lo
global_load_b64 v[4:5], v[1:2], off glc
s_waitcnt vmcnt(0)
global_atomic_cmpswap_b64 v[4:5], v0, v[4:7], s[20:21] offset:24 glc
s_waitcnt vmcnt(0)
buffer_gl1_inv
buffer_gl0_inv
v_cmpx_ne_u64_e64 v[4:5], v[6:7]
s_cbranch_execz .LBB2_59
s_mov_b32 s3, 0
.LBB2_57:
s_sleep 1
s_clause 0x1
global_load_b64 v[1:2], v0, s[20:21] offset:40
global_load_b64 v[8:9], v0, s[20:21]
v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
s_waitcnt vmcnt(1)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_and_b32_e32 v1, v1, v6
s_waitcnt vmcnt(0)
v_mad_u64_u32 v[3:4], null, v1, 24, v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_mov_b32 v1, v4 :: v_dual_and_b32 v2, v2, v7
v_mad_u64_u32 v[4:5], null, v2, 24, v[1:2]
global_load_b64 v[4:5], v[3:4], off glc
s_waitcnt vmcnt(0)
global_atomic_cmpswap_b64 v[4:5], v0, v[4:7], s[20:21] offset:24 glc
s_waitcnt vmcnt(0)
buffer_gl1_inv
buffer_gl0_inv
v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
s_or_b32 s3, vcc_lo, s3
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s3
s_cbranch_execnz .LBB2_57
s_or_b32 exec_lo, exec_lo, s3
.LBB2_59:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s2
.LBB2_60:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s1
v_mov_b32_e32 v40, 0
v_readfirstlane_b32 s2, v4
v_readfirstlane_b32 s3, v5
s_mov_b32 s8, exec_lo
s_clause 0x1
global_load_b64 v[6:7], v40, s[20:21] offset:40
global_load_b128 v[0:3], v40, s[20:21]
s_waitcnt vmcnt(1)
v_readfirstlane_b32 s4, v6
v_readfirstlane_b32 s5, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b64 s[4:5], s[2:3], s[4:5]
s_mul_i32 s1, s5, 24
s_mul_hi_u32 s6, s4, 24
s_mul_i32 s7, s4, 24
s_and_saveexec_b32 s9, s0
s_cbranch_execz .LBB2_62
v_dual_mov_b32 v4, s8 :: v_dual_mov_b32 v5, v40
s_add_i32 s8, s6, s1
s_waitcnt vmcnt(0)
v_add_co_u32 v8, vcc_lo, v0, s7
v_add_co_ci_u32_e32 v9, vcc_lo, s8, v1, vcc_lo
v_dual_mov_b32 v6, 2 :: v_dual_mov_b32 v7, 1
global_store_b128 v[8:9], v[4:7], off offset:8
.LBB2_62:
s_or_b32 exec_lo, exec_lo, s9
s_lshl_b64 s[4:5], s[4:5], 12
v_lshlrev_b64 v[4:5], 6, v[39:40]
s_waitcnt vmcnt(0)
v_add_co_u32 v2, vcc_lo, v2, s4
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
s_mov_b32 s8, 0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_u32 v6, vcc_lo, v2, v4
s_mov_b32 s9, s8
s_mov_b32 s10, s8
s_mov_b32 s11, s8
v_and_or_b32 v36, 0xffffff1d, v36, 34
v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
v_dual_mov_b32 v39, v40 :: v_dual_mov_b32 v2, s8
v_dual_mov_b32 v3, s9 :: v_dual_mov_b32 v4, s10
v_mov_b32_e32 v5, s11
s_clause 0x3
global_store_b128 v[6:7], v[36:39], off
global_store_b128 v[6:7], v[2:5], off offset:16
global_store_b128 v[6:7], v[2:5], off offset:32
global_store_b128 v[6:7], v[2:5], off offset:48
s_and_saveexec_b32 s4, s0
s_cbranch_execz .LBB2_70
v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v9, s2
v_mov_b32_e32 v10, s3
s_clause 0x1
global_load_b64 v[11:12], v8, s[20:21] offset:32 glc
global_load_b64 v[2:3], v8, s[20:21] offset:40
s_waitcnt vmcnt(0)
v_readfirstlane_b32 s8, v2
v_readfirstlane_b32 s9, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b64 s[8:9], s[8:9], s[2:3]
s_mul_i32 s5, s9, 24
s_mul_hi_u32 s9, s8, 24
s_mul_i32 s8, s8, 24
s_add_i32 s9, s9, s5
v_add_co_u32 v6, vcc_lo, v0, s8
v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
s_mov_b32 s5, exec_lo
global_store_b64 v[6:7], v[11:12], off
s_waitcnt_vscnt null, 0x0
global_atomic_cmpswap_b64 v[4:5], v8, v[9:12], s[20:21] offset:32 glc
s_waitcnt vmcnt(0)
v_cmpx_ne_u64_e64 v[4:5], v[11:12]
s_cbranch_execz .LBB2_66
s_mov_b32 s8, 0
.LBB2_65:
v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
s_sleep 1
global_store_b64 v[6:7], v[4:5], off
s_waitcnt_vscnt null, 0x0
global_atomic_cmpswap_b64 v[2:3], v8, v[2:5], s[20:21] offset:32 glc
s_waitcnt vmcnt(0)
v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
s_or_b32 s8, vcc_lo, s8
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s8
s_cbranch_execnz .LBB2_65
.LBB2_66:
s_or_b32 exec_lo, exec_lo, s5
v_mov_b32_e32 v5, 0
s_mov_b32 s8, exec_lo
s_mov_b32 s5, exec_lo
v_mbcnt_lo_u32_b32 v4, s8, 0
global_load_b64 v[2:3], v5, s[20:21] offset:16
v_cmpx_eq_u32_e32 0, v4
s_cbranch_execz .LBB2_68
s_bcnt1_i32_b32 s8, s8
s_delay_alu instid0(SALU_CYCLE_1)
v_mov_b32_e32 v4, s8
s_waitcnt vmcnt(0)
global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB2_68:
s_or_b32 exec_lo, exec_lo, s5
s_waitcnt vmcnt(0)
global_load_b64 v[4:5], v[2:3], off offset:16
s_waitcnt vmcnt(0)
v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
s_cbranch_vccnz .LBB2_70
global_load_b32 v2, v[2:3], off offset:24
v_mov_b32_e32 v3, 0
s_waitcnt vmcnt(0)
v_readfirstlane_b32 s5, v2
s_waitcnt_vscnt null, 0x0
global_store_b64 v[4:5], v[2:3], off
s_and_b32 m0, s5, 0xff
s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_70:
s_or_b32 exec_lo, exec_lo, s4
s_add_i32 s6, s6, s1
v_add_co_u32 v0, vcc_lo, v0, s7
v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, v0, 20
v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_71:
v_mov_b32_e32 v2, 1
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB2_73
global_load_b32 v2, v[0:1], off glc
s_waitcnt vmcnt(0)
buffer_gl1_inv
buffer_gl0_inv
v_and_b32_e32 v2, 1, v2
.LBB2_73:
s_or_b32 exec_lo, exec_lo, s1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_readfirstlane_b32 s1, v2
s_cmp_eq_u32 s1, 0
s_cbranch_scc1 .LBB2_75
s_mov_b32 s1, 0
s_sleep 1
s_branch .LBB2_76
.LBB2_75:
s_mov_b32 s1, -1
.LBB2_76:
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 vcc_lo, exec_lo, s1
s_cbranch_vccnz .LBB2_71
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB2_81
v_mov_b32_e32 v6, 0
s_clause 0x2
global_load_b64 v[2:3], v6, s[20:21] offset:40
global_load_b64 v[7:8], v6, s[20:21] offset:24 glc
global_load_b64 v[4:5], v6, s[20:21]
s_waitcnt vmcnt(2)
v_add_co_u32 v9, vcc_lo, v2, 1
v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, v9, s2
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
v_and_b32_e32 v3, v1, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_and_b32_e32 v2, v0, v2
v_mul_lo_u32 v3, v3, 24
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_hi_u32 v9, v2, 24
v_mul_lo_u32 v2, v2, 24
v_add_nc_u32_e32 v3, v9, v3
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_co_u32 v4, vcc_lo, v4, v2
v_mov_b32_e32 v2, v7
v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
v_mov_b32_e32 v3, v8
global_store_b64 v[4:5], v[7:8], off
s_waitcnt_vscnt null, 0x0
global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[20:21] offset:24 glc
s_waitcnt vmcnt(0)
v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB2_81
s_mov_b32 s0, 0
.LBB2_80:
s_sleep 1
global_store_b64 v[4:5], v[2:3], off
s_waitcnt_vscnt null, 0x0
global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[20:21] offset:24 glc
s_waitcnt vmcnt(0)
v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
s_or_b32 s0, vcc_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s0
s_cbranch_execnz .LBB2_80
.LBB2_81:
s_endpgm
| helloWorldwithThreadKernel | 446 | 14,327 | stackv2-00000-of-00015 |
// Demangled: gpuppsltpose(float2*, float2*, float, int, int, int, int, int, int, int)
Function : _Z12gpuppsltposeP6float2S0_fiiiiiii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x3a0] &wr=0x1 ?trans1;
S2R R13, SR_TID.Y &wr=0x2 ?trans1;
LDCU.64 UR10, c[0x0][0x398] &wr=0x3 ?trans1;
S2R R10, SR_TID.X &wr=0x4 ?trans1;
LDCU UR6, c[0x0][0x360] &wr=0x5 ?trans4;
S2UR UR7, SR_CTAID.Y &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x364] &wr=0x0 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x0 ?trans6;
LDC R0, c[0x0][0x394] &wr=0x4 ?trans8;
S2UR UR5, SR_CTAID.X &wr=0x5 ?trans1;
IADD3 R3, PT, PT, R3, -0x1, RZ &req={1} ?WAIT4_END_GROUP;
IADD3 R5, PT, PT, -R3, RZ, RZ ?trans1;
UIMAD UR4, UR4, UR7, URZ &req={0} ?WAIT4_END_GROUP;
IMAD R4, R5, R2, UR10 &req={3} ?trans2;
IADD3 R9, PT, PT, R13, UR4, RZ &req={2} ?trans1;
IMAD R0, R5, UR11, R0 &req={4} ?trans2;
VIMNMX.S32 R5, RZ, R4, !PT ?WAIT3_END_GROUP;
VIMNMX.S32 R0, RZ, R0, !PT ?trans2;
VIMNMX.S32 R6, R5, R2, PT ?trans1;
UIMAD UR5, UR6, UR5, URZ &req={5} ?trans2;
VIMNMX.S32 R0, R0, UR11, PT ?trans2;
ISETP.GE.AND P0, PT, R9, R6, PT ?trans2;
IADD3 R7, PT, PT, R10, UR5, RZ ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R7, R0, P0 ?WAIT13_END_GROUP;
@!P0 LDC R11, c[0x0][0x3a8] &wr=0x0 ?trans1;
@!P0 IMAD R8, R3, UR11, R7 ?WAIT7_END_GROUP;
@!P0 LDC.64 R4, c[0x0][0x380] &wr=0x1 ?trans1;
@!P0 IMAD R9, R9, R11, R8 &req={0} ?WAIT4_END_GROUP;
@!P0 IMAD.WIDE R4, R9, 0x8, R4 &req={1} ?WAIT6_END_GROUP;
@!P0 LDG.E.64 R4, desc[UR8][R4.64] &wr=0x2 ?trans1;
IADD3 R11, PT, PT, R10, UR4, RZ ?trans1;
UIADD3 UR4, UPT, UPT, UR6, 0x1, URZ ?trans1;
@!P0 MOV R7, 0x400 ?trans1;
@!P0 S2R R8, SR_CgaCtaId &wr=0x0 ?trans1;
IADD3 R9, PT, PT, R13, UR5, RZ ?trans1;
ISETP.GE.AND P1, PT, R11, R6, PT ?trans2;
@!P0 IMAD R6, R13, UR4, R10 ?WAIT3_END_GROUP;
ISETP.GE.OR P1, PT, R9, R0, P1 ?trans1;
@!P0 LEA R7, R8, R7, 0x18 &req={0} ?WAIT5_END_GROUP;
@!P0 IMAD R6, R6, 0x8, R7 ?WAIT5_END_GROUP;
@!P0 STS.64 [R6], R4 &req={2} &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P1 EXIT ?trans5;
S2UR UR6, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR5, 0x400 ?trans1;
IMAD R0, R10, UR4, R13 ?trans2;
IMAD R2, R3, R2, R11 ?WAIT4_END_GROUP;
LDC.64 R4, c[0x0][0x388] &req={0} &wr=0x0 ?trans1;
ULEA UR5, UR6, UR5, 0x18 &req={1} ?trans1;
LDCU UR6, c[0x0][0x3ac] &wr=0x1 ?trans5;
LEA R0, R0, UR5, 0x3 ?WAIT5_END_GROUP;
LDS.64 R6, [R0] &wr=0x2 ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x2 ?trans1;
IMAD R3, R9, UR6, R2 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R3, 0x8, R4 &req={0} ?WAIT4_END_GROUP;
FMUL R6, R6, UR5 &req={2} ?trans1;
FMUL R7, R7, UR5 ?WAIT5_END_GROUP;
STG.E.64 desc[UR8][R2.64], R6 ?trans1;
EXIT ?trans5;
BRA 0x3c0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: gpuppsltpose(HIP_vector_type<float, 2u>*, HIP_vector_type<float, 2u>*, float, int, int, int, int, int, int, int)
_Z12gpuppsltposeP15HIP_vector_typeIfLj2EES1_fiiiiiii:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x3c
s_load_b256 s[4:11], s[0:1], 0x10
s_load_b128 s[16:19], s[0:1], 0x0
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s0, s2, 16
s_add_i32 s1, s9, -1
s_and_b32 s2, s2, 0xffff
s_mul_i32 s9, s1, s7
s_mul_i32 s1, s1, s8
s_mul_i32 s14, s14, s2
s_mul_i32 s15, s15, s0
s_sub_i32 s0, s5, s9
s_sub_i32 s3, s6, s1
v_add_nc_u32_e32 v2, s14, v1
v_add_nc_u32_e32 v3, s15, v0
s_max_i32 s0, s0, 0
s_max_i32 s5, s3, 0
s_min_i32 s3, s0, s7
s_min_i32 s5, s5, s8
v_cmp_gt_i32_e32 vcc_lo, s3, v2
v_cmp_gt_i32_e64 s0, s5, v3
s_add_i32 s2, s2, 1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s6, vcc_lo, s0
s_and_saveexec_b32 s0, s6
s_cbranch_execz .LBB2_2
v_mul_lo_u32 v3, v3, s10
v_mad_u32_u24 v4, s2, v0, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshl_add_u32 v4, v4, 3, 0
v_add3_u32 v2, v2, s9, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[2:3], 3, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s16, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s17, v3, vcc_lo
global_load_b64 v[2:3], v[2:3], off
s_waitcnt vmcnt(0)
ds_store_b64 v4, v[2:3]
.LBB2_2:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v3, s14, v0
v_add_nc_u32_e32 v2, s15, v1
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmp_gt_i32_e32 vcc_lo, s3, v3
v_cmp_gt_i32_e64 s0, s5, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, vcc_lo, s0
s_and_saveexec_b32 s3, s0
s_cbranch_execz .LBB2_4
v_mad_u32_u24 v0, s2, v1, v0
v_mul_lo_u32 v3, v3, s11
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshl_add_u32 v0, v0, 3, 0
v_add3_u32 v2, v2, s1, v3
ds_load_b64 v[0:1], v0
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 3, v[2:3]
v_add_co_u32 v2, vcc_lo, s18, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s19, v3, vcc_lo
s_waitcnt lgkmcnt(0)
v_dual_mul_f32 v0, s4, v0 :: v_dual_mul_f32 v1, s4, v1
global_store_b64 v[2:3], v[0:1], off
.LBB2_4:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| gpuppsltpose | 1,531 | 1,347 | stackv2-00000-of-00015 |
// Demangled: gpuppsltposen(float2*, float2*, float, int, int, int, int, int, int, int, int)
Function : _Z13gpuppsltposenP6float2S0_fiiiiiiii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x3a0] &wr=0x1 ?trans1;
S2R R2, SR_TID.Y &wr=0x2 ?trans1;
LDCU.64 UR14, c[0x0][0x398] &wr=0x3 ?trans1;
BSSY.RECONVERGENT B0, 0xb90 ?trans1;
S2R R0, SR_TID.X &wr=0x4 ?trans1;
LDCU UR12, c[0x0][0x360] &wr=0x5 ?trans3;
S2UR UR6, SR_CTAID.Y &wr=0x0 ?trans1;
LDCU UR5, c[0x0][0x364] &wr=0x0 ?trans1;
LDCU.64 UR10, c[0x0][0x358] &wr=0x0 ?trans6;
LDC R6, c[0x0][0x394] &wr=0x4 ?trans8;
S2UR UR4, SR_CTAID.X &wr=0x0 ?trans1;
IADD3 R11, PT, PT, R5, -0x1, RZ &req={1} ?trans1;
UIADD3 UR8, UPT, UPT, UR12, 0x1, URZ &req={5} ?WAIT3_END_GROUP;
IADD3 R3, PT, PT, -R11, RZ, RZ ?WAIT3_END_GROUP;
LDC R10, c[0x0][0x3a8] &wr=0x1 ?trans1;
UIMAD UR5, UR5, UR6, URZ &req={0} ?trans1;
IMAD R5, R3, R4, UR14 &req={3} ?WAIT5_END_GROUP;
IADD3 R9, PT, PT, R2, UR5, RZ &req={2} ?trans1;
IMAD R3, R3, UR15, R6 &req={4} ?trans1;
VIMNMX.S32 R5, RZ, R5, !PT ?WAIT4_END_GROUP;
VIMNMX.S32 R3, RZ, R3, !PT ?trans1;
VIMNMX.S32 R8, R5, R4, PT ?trans1;
UIMAD UR4, UR12, UR4, URZ ?WAIT3_END_GROUP;
VIMNMX.S32 R6, R3, UR15, PT ?trans1;
ISETP.GE.AND P0, PT, R9, R8, PT ?trans2;
IADD3 R7, PT, PT, R0, UR4, RZ ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R7, R6, P0 ?WAIT5_END_GROUP;
ISETP.LT.OR P0, PT, R10, 0x1, P0 &req={1} ?WAIT13_END_GROUP;
@P0 BRA 0xb80 ?trans5;
ISETP.GE.U32.AND P0, PT, R10, 0x8, PT ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?trans2;
IMAD R5, R2, R10, RZ ?WAIT10_END_GROUP;
@!P0 BRA 0x6a0 ?trans5;
LDC R32, c[0x0][0x3ac] &wr=0x0 ?trans1;
UMOV UR6, 0x400 ?trans1;
IMAD R21, R5, UR8, R0 ?trans1;
LOP3.LUT R20, R10, 0x7ffffff8, RZ, 0xc0, !PT ?trans1;
ULEA UR9, UR12, 0x8, 0x3 ?WAIT4_END_GROUP;
S2UR UR7, SR_CgaCtaId &wr=0x1 ?trans1;
SHF.R.S32.HI R33, RZ, 0x1f, R32 &req={0} ?trans1;
IMAD R3, R10, R32, RZ ?WAIT4_END_GROUP;
IADD.64 R12, R32, R32 ?trans2;
IMAD R3, R9, R3, R0 ?trans1;
ULEA UR6, UR7, UR6, 0x18 &req={1} ?trans1;
IADD.64 R14, R32, R12 ?trans2;
IMAD.SHL.U32 R30, R12.reuse, 0x8, RZ ?trans1;
SHF.L.U64.HI R31, R12, 0x3, R13 ?trans1;
IADD.64 R16, R32, R14 ?trans2;
IMAD.SHL.U32 R28, R14.reuse, 0x8, RZ ?trans1;
SHF.L.U64.HI R29, R14, 0x3, R15 ?trans1;
IADD.64 R12, R32, R16 ?WAIT2_END_GROUP;
IMAD.SHL.U32 R26, R16.reuse, 0x8, RZ ?trans1;
SHF.L.U64.HI R27, R16, 0x3, R17 ?trans1;
IADD.64 R16, R32, R12 ?trans2;
IMAD.SHL.U32 R14, R12.reuse, 0x8, RZ ?trans1;
SHF.L.U64.HI R15, R12, 0x3, R13 ?trans1;
IADD.64 R12, R32, R16 ?WAIT3_END_GROUP;
IADD3 R24, PT, PT, R3, UR4, RZ ?trans2;
SHF.L.U64.HI R17, R16.reuse, 0x3, R17 ?trans1;
IMAD.SHL.U32 R16, R16, 0x8, RZ ?trans1;
SHF.L.U64.HI R19, R12.reuse, 0x3, R13 ?trans1;
IMAD.SHL.U32 R18, R12, 0x8, RZ ?trans1;
MOV R3, RZ ?trans1;
IADD3 R12, PT, PT, -R20, RZ, RZ ?trans2;
LEA R13, R21, UR6, 0x3 ?trans1;
IMAD R24, R11, UR15, R24 ?WAIT7_END_GROUP;
LDC.64 R34, c[0x0][0x380] &req={0} &wr=0x0 ?trans2;
IMAD.WIDE R34, R24, 0x8, R34 &req={0} ?WAIT5_END_GROUP;
LDG.E.64 R22, desc[UR10][R34.64] &wr=0x2 ?trans1;
IMAD.WIDE R20, R32, 0x8, R34 ?WAIT6_END_GROUP;
LDG.E.64 R20, desc[UR10][R20.64] &wr=0x3 ?trans4;
STS.64 [R13], R22 &req={2} &rd=0x0 ?trans4;
STS.64 [R13+UR9], R20 &req={3} &rd=0x1 ?trans1;
IADD.64 R22, R34.reuse, R28 &req={0} ?trans2;
IADD.64 R20, R34, R30 &req={1} ?WAIT5_END_GROUP;
LDG.E.64 R22, desc[UR10][R22.64] &wr=0x2 ?trans4;
LDG.E.64 R20, desc[UR10][R20.64] &wr=0x3 ?trans1;
IADD3 R36, PT, PT, R13, UR9, RZ ?WAIT4_END_GROUP;
IADD3 R25, PT, PT, R36, UR9, RZ ?trans1;
STS.64 [R36+UR9], R20 &req={3} &rd=0x0 ?trans4;
STS.64 [R25+UR9], R22 &req={2} &rd=0x1 ?trans1;
IADD.64 R20, R34.reuse, R26 &req={0} ?trans2;
IADD.64 R22, R34, R14 &req={1} ?WAIT5_END_GROUP;
LDG.E.64 R20, desc[UR10][R20.64] &wr=0x2 ?trans4;
LDG.E.64 R22, desc[UR10][R22.64] &wr=0x3 ?trans1;
IADD3 R37, PT, PT, R25, UR9, RZ ?WAIT4_END_GROUP;
IADD3 R25, PT, PT, R37, UR9, RZ ?trans1;
LDC R36, c[0x0][0x360] &wr=0x0 ?trans1;
STS.64 [R37+UR9], R20 &req={2} &rd=0x1 ?trans4;
STS.64 [R25+UR9], R22 &req={3} &rd=0x2 ?trans1;
IADD.64 R20, R34.reuse, R16 &req={1} ?trans2;
IADD.64 R22, R34, R18 &req={2} ?WAIT5_END_GROUP;
LDG.E.64 R20, desc[UR10][R20.64] &wr=0x2 ?trans4;
LDG.E.64 R22, desc[UR10][R22.64] &wr=0x3 ?trans1;
IADD3 R12, PT, PT, R12, 0x8, RZ ?trans2;
IADD3 R34, PT, PT, R25, UR9, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R12, RZ, PT ?trans1;
IADD3 R35, PT, PT, R34, UR9, RZ ?trans1;
IMAD R13, R36, 0x40, R13 &req={0} ?trans1;
IADD3 R3, PT, PT, R3, 0x8, RZ ?trans1;
IMAD R24, R32, 0x8, R24 ?WAIT3_END_GROUP;
IADD3 R13, PT, PT, R13, 0x40, RZ ?trans1;
STS.64 [R34+UR9], R20 &req={2} &rd=0x0 ?trans4;
STS.64 [R35+UR9], R22 &req={3} &rd=0x0 ?trans1;
@P0 BRA 0x430 ?trans5;
LOP3.LUT P0, R12, R10, 0x7, RZ, 0xc0, !PT ?trans1;
IMAD R7, R11, UR15, R7 ?WAIT12_END_GROUP;
@!P0 BRA 0xb80 ?trans5;
ISETP.GE.U32.AND P1, PT, R12, 0x4, PT ?trans1;
LOP3.LUT P0, R24, R10, 0x3, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P1 BRA 0x940 ?trans5;
LDC R18, c[0x0][0x3ac] &wr=0x1 ?trans1;
IMAD R12, R9, R10, R3 ?WAIT7_END_GROUP;
LDC.64 R20, c[0x0][0x380] &req={0} &wr=0x0 ?trans1;
SHF.R.S32.HI R19, RZ, 0x1f, R18 &req={1} ?trans1;
IMAD R13, R12, R18, R7 ?WAIT4_END_GROUP;
IADD.64 R16, R18, R18 ?trans2;
IMAD.WIDE R20, R13, 0x8, R20 &req={0} ?trans2;
IADD.64 R22, R18, R16 ?WAIT3_END_GROUP;
LEA R14, P1, R16, R20.reuse, 0x3 ?trans1;
IMAD.WIDE R18, R18, 0x8, R20 ?trans1;
LEA R12, P2, R22, R20, 0x3 ?trans2;
LEA.HI.X R15, R16, R21.reuse, R17, 0x3, P1 ?trans2;
LEA.HI.X R13, R22, R21, R23, 0x3, P2 ?trans1;
LDG.E.64 R16, desc[UR10][R20.64] &rd=0x0 &wr=0x2 ?trans4;
LDG.E.64 R18, desc[UR10][R18.64] &wr=0x3 ?trans4;
LDG.E.64 R14, desc[UR10][R14.64] &wr=0x4 ?trans4;
LDG.E.64 R12, desc[UR10][R12.64] &wr=0x5 ?trans1;
S2UR UR7, SR_CgaCtaId &wr=0x1 ?trans1;
IADD3 R23, PT, PT, R5, R3, RZ ?trans1;
UMOV UR6, 0x400 ?trans1;
IADD3 R3, PT, PT, R3, 0x4, RZ ?WAIT3_END_GROUP;
IMAD R22, R23.reuse, UR8, R0 ?trans1;
IADD3 R25, PT, PT, R23.reuse, 0x2, RZ ?trans1;
LDC R27, c[0x0][0x360] &wr=0x0 ?trans1;
IADD3 R23, PT, PT, R23, 0x3, RZ ?WAIT3_END_GROUP;
IMAD R25, R25, UR8, R0.reuse ?trans2;
IMAD R23, R23, UR8, R0 ?trans1;
ULEA UR6, UR7, UR6, 0x18 &req={1} ?WAIT6_END_GROUP;
LEA R22, R22, UR6, 0x3 ?trans2;
LEA R25, R25, UR6, 0x3 ?trans2;
LEA R23, R23, UR6, 0x3 ?trans1;
IMAD R20, R27, 0x8, R22 &req={0} ?trans1;
STS.64 [R22], R16 &req={2} &rd=0x1 ?trans4;
STS.64 [R20+0x8], R18 &req={3} &rd=0x1 ?trans4;
STS.64 [R25], R14 &req={4} &rd=0x1 ?trans4;
STS.64 [R23], R12 &req={5} &rd=0x1 ?trans2;
@!P0 BRA 0xb80 ?trans5;
ISETP.NE.AND P0, PT, R24, 0x1, PT ?trans1;
LOP3.LUT R12, R10, 0x1, RZ, 0xc0, !PT &req={1} ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P1, PT, R12, 0x1, PT ?WAIT7_END_GROUP;
@P0 LDC R23, c[0x0][0x3ac] &req={0} &wr=0x0 ?trans1;
@P0 IMAD R16, R9, R10, R3 ?trans1;
@P0 IADD3 R19, PT, PT, R5, R3, RZ ?trans2;
@P0 IADD3 R3, PT, PT, R3, 0x2, RZ ?WAIT4_END_GROUP;
@P0 LDC.64 R14, c[0x0][0x380] &wr=0x1 ?trans8;
@!P1 LDC R17, c[0x0][0x3ac] &wr=0x2 ?trans8;
@!P1 LDC.64 R12, c[0x0][0x380] &wr=0x3 ?trans1;
@P0 IMAD R21, R16, R23, R7 &req={0} ?WAIT2_END_GROUP;
@!P1 IMAD R16, R9, R10, R3 ?trans2;
@P0 IMAD.WIDE R20, R21, 0x8, R14 &req={1} ?WAIT4_END_GROUP;
@P0 IMAD.WIDE R14, R23, 0x8, R20 ?WAIT4_END_GROUP;
@!P1 IMAD R17, R16, R17, R7 &req={2} ?trans2;
@P0 LDG.E.64 R14, desc[UR10][R14.64] &wr=0x2 ?trans2;
@!P1 IMAD.WIDE R16, R17, 0x8, R12 &req={3} ?trans2;
@P0 LDG.E.64 R12, desc[UR10][R20.64] &wr=0x3 ?trans4;
@!P1 LDG.E.64 R16, desc[UR10][R16.64] &wr=0x4 ?trans1;
@P0 S2R R18, SR_CgaCtaId &wr=0x0 ?trans1;
@!P1 S2R R22, SR_CgaCtaId &wr=0x1 ?trans1;
LDC R9, c[0x0][0x360] &wr=0x5 ?trans1;
@P0 MOV R7, 0x400 ?trans1;
@!P1 IADD3 R3, PT, PT, R5, R3, RZ ?trans1;
@!P1 MOV R5, 0x400 ?trans1;
@P0 IMAD R19, R19, UR8, R0 ?WAIT3_END_GROUP;
@!P1 IMAD R3, R3, UR8, R0 ?trans1;
@P0 LEA R18, R18, R7, 0x18 &req={0} ?trans2;
@!P1 LEA R22, R22, R5, 0x18 &req={1} ?WAIT3_END_GROUP;
@P0 IMAD R18, R19, 0x8, R18 ?WAIT4_END_GROUP;
@P0 IMAD R5, R9, 0x8, R18 &req={5} ?trans2;
@!P1 IMAD R3, R3, 0x8, R22 ?trans1;
@P0 STS.64 [R18], R12 &req={3} &rd=0x3 ?trans4;
@P0 STS.64 [R5+0x8], R14 &req={2} &rd=0x3 ?trans4;
@!P1 STS.64 [R3], R16 &req={4} &rd=0x3 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R3, PT, PT, R0, UR5, RZ &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
IADD3 R5, PT, PT, R2, UR4, RZ ?WAIT3_END_GROUP;
ISETP.GE.AND P0, PT, R3, R8, PT ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R5, R6, P0 ?WAIT5_END_GROUP;
ISETP.LT.OR P0, PT, R10, 0x1, P0 ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
ISETP.GE.U32.AND P0, PT, R10.reuse, 0x4, PT ?trans1;
LOP3.LUT R6, R10, 0x3, RZ, 0xc0, !PT ?trans1;
UMOV UR4, URZ ?trans1;
IMAD R7, R0, R10, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P1, PT, R6, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x1020 ?trans6;
LDC R8, c[0x0][0x3b0] &wr=0x2 ?trans1;
UMOV UR4, 0x400 ?trans1;
IADD3 R26, PT, PT, R7, 0x3, RZ ?trans1;
LDCU UR7, c[0x0][0x390] &wr=0x3 ?trans4;
IMAD R26, R26, UR8, RZ ?trans1;
S2UR UR6, SR_CgaCtaId &wr=0x4 ?trans1;
IMAD R14, R10, R8, RZ &req={2,1} ?trans1;
SHF.R.S32.HI R9, RZ, 0x1f, R8 ?WAIT3_END_GROUP;
IMAD R18, R5, R14, R0 ?WAIT3_END_GROUP;
LDC.64 R14, c[0x0][0x388] &wr=0x1 ?trans1;
IADD.64 R12, R8, R8 ?WAIT3_END_GROUP;
IADD3 R18, PT, PT, R18, UR5, RZ ?trans1;
IMAD R0, R7, UR8, RZ ?trans1;
IADD.64 R16, R8, R12 ?trans2;
IMAD.SHL.U32 R30, R12.reuse, 0x8, RZ ?trans1;
SHF.L.U64.HI R31, R12, 0x3, R13 ?trans1;
ULEA UR4, UR6, UR4, 0x18 &req={4} ?trans1;
LOP3.LUT R12, R10, 0x7ffffffc, RZ, 0xc0, !PT ?trans1;
IMAD.SHL.U32 R0, R0, 0x8, RZ ?trans1;
IADD3 R13, PT, PT, R7, 0x2, RZ ?trans2;
SHF.L.U64.HI R17, R16.reuse, 0x3, R17 ?trans1;
IMAD.SHL.U32 R16, R16, 0x8, RZ ?trans1;
IADD3 R12, PT, PT, -R12, RZ, RZ ?trans1;
IMAD R28, R11, R4, R18 ?trans1;
LEA R27, R2, UR4, 0x3 ?trans1;
IMAD R13, R13, UR8, RZ ?trans1;
UMOV UR4, URZ &req={3} ?WAIT6_END_GROUP;
LDC R29, c[0x0][0x360] &req={2} &wr=0x2 ?trans1;
IADD3 R34, PT, PT, R0, R27, RZ &req={0} ?trans1;
IMAD R20, R26, 0x8, R27 ?trans1;
IADD3 R12, PT, PT, R12, 0x4, RZ ?trans1;
IMAD.WIDE R32, R28, 0x8, R14 &req={1} ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
LDS.64 R24, [R34] &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R12, RZ, PT ?trans1;
IMAD R28, R8, 0x4, R28 ?trans1;
LDS.64 R20, [R20] &wr=0x1 ?trans1;
IMAD R18, R29, 0x8, R0 &req={2} ?WAIT5_END_GROUP;
IADD3 R35, PT, PT, R18, R27, RZ ?trans1;
IMAD R18, R13, 0x8, R27.reuse ?trans2;
IMAD R27, R29, 0x20, R27 ?trans2;
LDS.64 R22, [R35+0x8] &wr=0x2 ?trans3;
IADD3 R27, PT, PT, R27, 0x20, RZ ?trans1;
LDS.64 R18, [R18] &wr=0x3 ?trans1;
FMUL R24, R24, UR7 &req={0} ?trans1;
FMUL R25, R25, UR7 ?trans1;
FMUL R20, R20, UR7 &req={1} ?trans1;
FMUL R21, R21, UR7 ?WAIT3_END_GROUP;
STG.E.64 desc[UR10][R32.64], R24 &rd=0x0 ?trans2;
IMAD.WIDE R24, R8, 0x8, R32 &req={0} ?WAIT4_END_GROUP;
FMUL R22, R22, UR7 &req={2} ?trans1;
FMUL R23, R23, UR7 ?trans1;
FMUL R18, R18, UR7 &req={3} ?trans1;
FMUL R19, R19, UR7 ?WAIT3_END_GROUP;
STG.E.64 desc[UR10][R24.64], R22 &rd=0x0 ?trans2;
IADD.64 R22, R32.reuse, R30 &req={0} ?trans2;
IADD.64 R32, R32, R16 ?WAIT4_END_GROUP;
STG.E.64 desc[UR10][R22.64], R18 &rd=0x2 ?trans4;
STG.E.64 desc[UR10][R32.64], R20 &rd=0x2 ?trans1;
@P0 BRA 0xe10 ?trans5;
@!P1 EXIT ?trans5;
ISETP.NE.AND P0, PT, R6, 0x1, PT ?trans1;
LOP3.LUT R0, R10, 0x1, RZ, 0xc0, !PT ?trans1;
IMAD R4, R11, R4, R3 ?WAIT4_END_GROUP;
ISETP.NE.U32.AND P1, PT, R0, 0x1, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x1200 ?trans6;
S2UR UR6, SR_CgaCtaId &wr=0x3 ?trans1;
IADD3 R3, PT, PT, R7, UR4, RZ ?trans1;
UMOV UR5, 0x400 ?trans1;
IMAD R11, R5, R10, UR4 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x2, URZ ?trans2;
IMAD R3, R3, UR8, R2 ?trans2;
LDC R0, c[0x0][0x360] &wr=0x4 ?trans8;
LDC R13, c[0x0][0x3b0] &req={1} &wr=0x1 ?trans1;
ULEA UR5, UR6, UR5, 0x18 &req={3} ?WAIT7_END_GROUP;
LDC.64 R8, c[0x0][0x388] &wr=0x3 ?trans1;
LEA R3, R3, UR5, 0x3 ?WAIT5_END_GROUP;
IMAD R17, R0, 0x8, R3 &req={4} ?trans1;
LDS.64 R14, [R3] &wr=0x4 ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x4 ?trans1;
IMAD R11, R11, R13, R4 &req={1} ?WAIT3_END_GROUP;
LDS.64 R16, [R17+0x8] &wr=0x1 ?trans1;
IMAD.WIDE R8, R11, 0x8, R8 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE R12, R13, 0x8, R8 ?WAIT4_END_GROUP;
FMUL R14, R14, UR5 &req={4} ?trans1;
FMUL R15, R15, UR5 ?trans1;
FMUL R16, R16, UR5 &req={1} ?trans1;
FMUL R17, R17, UR5 ?WAIT3_END_GROUP;
STG.E.64 desc[UR10][R8.64], R14 &rd=0x3 ?trans4;
STG.E.64 desc[UR10][R12.64], R16 &rd=0x3 ?trans2;
@P1 EXIT ?trans5;
S2UR UR6, SR_CgaCtaId &wr=0x4 ?trans1;
IADD3 R7, PT, PT, R7, UR4, RZ ?trans1;
UMOV UR5, 0x400 ?trans1;
IMAD R5, R5, R10, UR4 ?WAIT3_END_GROUP;
IMAD R7, R7, UR8, R2 ?trans2;
LDC.64 R2, c[0x0][0x388] &wr=0x5 ?trans1;
ULEA UR5, UR6, UR5, 0x18 &req={4} ?trans1;
LDCU UR6, c[0x0][0x3b0] &wr=0x4 ?trans5;
LEA R7, R7, UR5, 0x3 ?WAIT5_END_GROUP;
LDCU UR5, c[0x0][0x390] &wr=0x0 ?trans1;
LDS.64 R6, [R7] &wr=0x0 ?trans1;
IMAD R5, R5, UR6, R4 &req={4} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R5, 0x8, R2 &req={5} ?WAIT4_END_GROUP;
FMUL R4, R6, UR5 &req={0} ?trans1;
FMUL R5, R7, UR5 ?WAIT5_END_GROUP;
STG.E.64 desc[UR10][R2.64], R4 ?trans1;
EXIT ?trans5;
BRA 0x1320;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: gpuppsltposen(HIP_vector_type<float, 2u>*, HIP_vector_type<float, 2u>*, float, int, int, int, int, int, int, int, int)
_Z13gpuppsltposenP15HIP_vector_typeIfLj2EES1_fiiiiiiii:
s_clause 0x3
s_load_b32 s3, s[0:1], 0x44
s_load_b256 s[4:11], s[0:1], 0x10
s_load_b32 s2, s[0:1], 0x30
s_load_b128 s[16:19], s[0:1], 0x0
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s0, s3, 16
s_add_i32 s12, s9, -1
s_and_b32 s1, s3, 0xffff
s_mul_i32 s9, s12, s7
s_mul_i32 s3, s12, s8
s_mul_i32 s14, s14, s1
s_mul_i32 s15, s15, s0
s_sub_i32 s0, s5, s9
s_sub_i32 s5, s6, s3
v_add_nc_u32_e32 v3, s14, v1
v_add_nc_u32_e32 v2, s15, v0
s_max_i32 s0, s0, 0
s_max_i32 s5, s5, 0
s_min_i32 s6, s0, s7
s_min_i32 s7, s5, s8
v_cmp_gt_i32_e32 vcc_lo, s6, v3
v_cmp_gt_i32_e64 s0, s7, v2
s_add_i32 s5, s1, 1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
s_and_b32 s0, vcc_lo, s0
s_cmp_gt_i32 s10, 0
s_cselect_b32 s8, -1, 0
s_and_b32 s12, s0, s8
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s0, s12
s_cbranch_execz .LBB3_3
v_mul_lo_u32 v3, v0, s10
s_mul_i32 s12, s11, s10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_mul_lo_u32 v5, v3, s5
v_mad_u64_u32 v[3:4], null, s12, v2, v[1:2]
v_lshlrev_b32_e32 v2, 3, v1
s_lshl_b32 s12, s1, 3
v_lshlrev_b32_e32 v4, 3, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add3_u32 v4, v4, v2, 0
v_add3_u32 v2, s14, s9, v3
s_add_i32 s9, s12, 8
s_mov_b32 s12, s10
.LBB3_2:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_ashrrev_i32_e32 v3, 31, v2
s_add_i32 s12, s12, -1
s_cmp_lg_u32 s12, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[5:6], 3, v[2:3]
v_add_nc_u32_e32 v2, s11, v2
v_add_co_u32 v5, vcc_lo, s16, v5
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v6, vcc_lo, s17, v6, vcc_lo
global_load_b64 v[5:6], v[5:6], off
s_waitcnt vmcnt(0)
ds_store_b64 v4, v[5:6]
v_add_nc_u32_e32 v4, s9, v4
s_cbranch_scc1 .LBB3_2
.LBB3_3:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v2, s14, v0
v_add_nc_u32_e32 v3, s15, v1
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmp_gt_i32_e32 vcc_lo, s6, v2
v_cmp_gt_i32_e64 s0, s7, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, vcc_lo, s0
s_and_b32 s0, s0, s8
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s6, s0
s_cbranch_execz .LBB3_6
v_mul_lo_u32 v3, v1, s10
s_mul_i32 s0, s2, s10
v_lshlrev_b32_e32 v0, 3, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_mul_lo_u32 v5, v3, s5
v_mad_u64_u32 v[3:4], null, s0, v2, v[1:2]
s_lshl_b32 s0, s1, 3
s_add_i32 s0, s0, 8
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b32_e32 v1, 3, v5
v_add3_u32 v2, v1, v0, 0
s_delay_alu instid0(VALU_DEP_3)
v_add3_u32 v0, s15, s3, v3
.LBB3_5:
ds_load_b64 v[3:4], v2
v_ashrrev_i32_e32 v1, 31, v0
v_add_nc_u32_e32 v2, s0, v2
s_add_i32 s10, s10, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
s_cmp_lg_u32 s10, 0
v_lshlrev_b64 v[5:6], 3, v[0:1]
v_add_nc_u32_e32 v0, s2, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v5, vcc_lo, s18, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s19, v6, vcc_lo
s_waitcnt lgkmcnt(0)
v_dual_mul_f32 v3, s4, v3 :: v_dual_mul_f32 v4, s4, v4
global_store_b64 v[5:6], v[3:4], off
s_cbranch_scc1 .LBB3_5
.LBB3_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| gpuppsltposen | 7,782 | 1,985 | stackv2-00000-of-00015 |
// Demangled: gpuppsmtposes(float2*, float2*, float, int, int, int, int, int, int, int, int)
Function : _Z13gpuppsmtposesP6float2S0_fiiiiiiii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
S2UR UR4, SR_CTAID.Y &wr=0x1 ?trans8;
LDC R6, c[0x0][0x3a4] &wr=0x1 ?trans2;
ISETP.LE.AND P0, PT, R6, UR4, PT &req={1} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R0, c[0x0][0x3a0] &wr=0x0 ?trans1;
UIADD3 UR5, UPT, UPT, UR4, -0x1, URZ ?trans1;
IADD3 R0, PT, PT, R0, -0x1, RZ &req={0} ?WAIT4_END_GROUP;
IADD3 R4, PT, PT, R0.reuse, R0, RZ ?trans2;
IADD3 R2, PT, PT, -R0, UR4, RZ ?WAIT3_END_GROUP;
ISETP.GE.AND P0, PT, R4, R6, PT ?trans1;
SHF.R.S32.HI R3, RZ, 0x1f, R2 ?WAIT4_END_GROUP;
SEL R5, R6, RZ, P0 ?trans1;
LOP3.LUT R3, R3, R6, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R5, PT, PT, R4, -R5, RZ ?trans2;
IADD3 R3, PT, PT, R2, R3, RZ ?WAIT3_END_GROUP;
ISETP.LT.AND P0, PT, R5, UR4, PT ?trans2;
ISETP.NE.AND P1, PT, R3, R0, PT ?trans1;
MOV R0, UR5 ?WAIT10_END_GROUP;
@!P0 IADD3 R0, PT, PT, RZ, UR4, RZ ?trans2;
@!P1 EXIT ?trans5;
LDCU.64 UR4, c[0x0][0x398] &wr=0x0 ?trans1;
S2R R11, SR_TID.X &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x394] &wr=0x2 ?trans1;
S2R R4, SR_CTAID.X &wr=0x3 ?trans1;
IMAD R3, R3, UR4, RZ &req={0} ?WAIT5_END_GROUP;
IADD3 R2, PT, PT, -R3, UR6, RZ &req={2} ?WAIT5_END_GROUP;
VIMNMX.S32 R2, RZ, R2, !PT ?WAIT5_END_GROUP;
VIMNMX.S32 R10, R2, UR4, PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R11, R10, PT &req={1} ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R4, UR5, P0 &req={3} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDCU.64 UR8, c[0x0][0x3a8] &wr=0x0 ?trans1;
LDC.64 R6, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans6;
LDC.64 R8, c[0x0][0x388] &wr=0x4 ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x1 ?trans1;
IMAD R5, R0, UR8, RZ &req={0} ?WAIT2_END_GROUP;
IMAD R0, R4, UR9, R3 ?trans2;
IMAD R14, R10, R4, R5 &req={3,2} ?WAIT7_END_GROUP;
IADD3 R3, PT, PT, R0, R11, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R2, R3, 0x8, R6 &req={1} ?WAIT6_END_GROUP;
LDG.E.64 R2, desc[UR6][R2.64] &wr=0x2 ?trans1;
IADD3 R5, PT, PT, R14, R11, RZ &req={0} ?trans2;
IADD3 R11, PT, PT, R11, UR4, RZ ?WAIT3_END_GROUP;
IMAD.WIDE R4, R5, 0x8, R8 &req={4} ?trans2;
ISETP.GE.AND P0, PT, R11, R10, PT ?trans2;
FMUL R12, R2, UR5 &req={2} ?trans1;
FMUL R13, R3, UR5 ?WAIT5_END_GROUP;
STG.E.64 desc[UR6][R4.64], R12 &rd=0x0 ?trans5;
@!P0 BRA 0x290 ?trans5;
EXIT ?trans5;
BRA 0x350;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: gpuppsmtposes(HIP_vector_type<float, 2u>*, HIP_vector_type<float, 2u>*, float, int, int, int, int, int, int, int, int)
_Z13gpuppsmtposesP15HIP_vector_typeIfLj2EES1_fiiiiiiii:
s_load_b256 s[4:11], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_cmp_ge_i32 s15, s9
s_cbranch_scc1 .LBB0_6
s_add_i32 s8, s8, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_sub_i32 s2, s15, s8
s_ashr_i32 s3, s2, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s3, s3, s9
s_add_i32 s2, s3, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s2, s8
s_cbranch_scc1 .LBB0_6
s_cmp_ge_i32 s14, s7
s_cbranch_scc1 .LBB0_6
s_mul_i32 s7, s2, s6
s_mov_b32 s3, 0
s_sub_i32 s2, s5, s7
s_mov_b32 s5, exec_lo
s_max_i32 s2, s2, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_min_i32 s2, s2, s6
v_cmpx_gt_i32_e64 s2, v0
s_cbranch_execz .LBB0_6
s_clause 0x1
s_load_b32 s5, s[0:1], 0x44
s_load_b128 s[16:19], s[0:1], 0x0
s_lshl_b32 s6, s8, 1
s_mul_i32 s1, s2, s14
s_cmp_ge_i32 s6, s9
s_cselect_b32 s0, s9, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
s_sub_i32 s0, s6, s0
s_mul_i32 s6, s14, s11
s_cmp_gt_i32 s15, s0
s_cselect_b32 s0, -1, 0
s_cmp_lg_u32 s0, 0
s_subb_u32 s0, s15, 0
s_add_i32 s6, s6, s7
s_mul_i32 s0, s0, s10
s_delay_alu instid0(SALU_CYCLE_1)
s_add_i32 s1, s1, s0
s_waitcnt lgkmcnt(0)
s_and_b32 s5, s5, 0xffff
.LBB0_5:
v_add_nc_u32_e32 v1, s6, v0
v_add_nc_u32_e32 v3, s1, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v2, 31, v1
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[1:2], 3, v[1:2]
v_lshlrev_b64 v[3:4], 3, v[3:4]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v1, vcc_lo, s16, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s17, v2, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v3, s0, s18, v3
v_add_co_ci_u32_e64 v4, s0, s19, v4, s0
global_load_b64 v[1:2], v[1:2], off
s_waitcnt vmcnt(0)
v_dual_mul_f32 v1, s4, v1 :: v_dual_add_nc_u32 v0, s5, v0
s_delay_alu instid0(VALU_DEP_1)
v_cmp_le_i32_e32 vcc_lo, s2, v0
v_mul_f32_e32 v2, s4, v2
s_or_b32 s3, vcc_lo, s3
global_store_b64 v[3:4], v[1:2], off
s_and_not1_b32 exec_lo, exec_lo, s3
s_cbranch_execnz .LBB0_5
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| gpuppsmtposes | 1,355 | 1,297 | stackv2-00000-of-00015 |
// Demangled: gpuppsmtposesn(float2*, float2*, float, int, int, int, int, int, int, int, int, int)
Function : _Z14gpuppsmtposesnP6float2S0_fiiiiiiiii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
S2UR UR9, SR_CTAID.Y &wr=0x1 ?trans1;
LDCU UR8, c[0x0][0x3a4] &wr=0x1 ?trans2;
UISETP.GE.AND UP0, UPT, UR9, UR8, UPT &req={1} ?WAIT6_END_GROUP;
PLOP3.LUT P0, PT, PT, PT, UP0, 0x80, 0x8 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU UR4, c[0x0][0x3a0] &wr=0x0 ?trans1;
UIADD3 UR12, UPT, UPT, UR9, -0x1, URZ ?trans1;
UIADD3 UR4, UPT, UPT, UR4, -0x1, URZ &req={0} ?WAIT4_END_GROUP;
UIADD3 UR5, UPT, UPT, -UR4, UR9, URZ ?trans1;
UIADD3 UR7, UPT, UPT, UR4, UR4, URZ ?WAIT3_END_GROUP;
USHF.R.S32.HI UR6, URZ, 0x1f, UR5 ?trans1;
UISETP.GE.AND UP0, UPT, UR7, UR8, UPT ?WAIT3_END_GROUP;
ULOP3.LUT UR6, UR6, UR8, URZ, 0xc0, !UPT ?trans1;
USEL UR8, UR8, URZ, UP0 ?WAIT3_END_GROUP;
UIADD3 UR6, UPT, UPT, UR5, UR6, URZ ?trans1;
UIADD3 UR8, UPT, UPT, UR7, -UR8, URZ ?WAIT3_END_GROUP;
UISETP.NE.AND UP1, UPT, UR6, UR4, UPT ?trans1;
UISETP.GT.AND UP0, UPT, UR9, UR8, UPT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, PT, PT, UP1, 0x80, 0x8 ?WAIT6_END_GROUP;
@!UP0 UIADD3 UR12, UPT, UPT, UR9, URZ, URZ ?WAIT7_END_GROUP;
@!P0 EXIT ?trans5;
LDCU.64 UR8, c[0x0][0x398] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans1;
S2UR UR20, SR_CTAID.X &wr=0x2 ?trans1;
LDCU UR4, c[0x0][0x394] &wr=0x3 ?trans1;
UIMAD UR6, UR6, UR8, URZ &req={0} ?trans1;
MOV R2, UR9 ?WAIT3_END_GROUP;
UIADD3 UR4, UPT, UPT, -UR6, UR4, URZ &req={3} ?WAIT4_END_GROUP;
UVIMNMX.S32 UR4, URZ, UR4, !UPT ?WAIT4_END_GROUP;
UVIMNMX.S32 UR7, UR4, UR8, UPT ?WAIT6_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR7, PT &req={1} ?WAIT5_END_GROUP;
ISETP.LE.OR P0, PT, R2, UR20, P0 &req={2} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDCU.64 UR10, c[0x0][0x3a8] &wr=0x0 ?trans2;
UISETP.GE.AND UP0, UPT, UR10, 0x1, UPT &req={0} ?WAIT6_END_GROUP;
PLOP3.LUT P0, PT, PT, PT, UP0, 0x80, 0x8 ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
LDCU UR4, c[0x0][0x3b0] &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0x10b0 ?trans1;
UIMAD UR8, UR10, UR11, URZ ?trans1;
UIMAD UR9, UR12, UR11, URZ ?trans1;
LDCU UR21, c[0x0][0x360] &wr=0x1 ?trans1;
LDCU.64 UR22, c[0x0][0x358] &wr=0x2 ?trans1;
LDCU UR24, c[0x0][0x390] &wr=0x3 ?trans1;
UIMAD UR5, UR20, UR4, URZ &req={0} ?trans1;
UIMAD UR11, UR12, UR8, URZ ?trans1;
UIMAD UR9, UR7, UR20, UR9 ?trans2;
UIMAD UR10, UR5, UR10, UR6 ?trans1;
USHF.R.S32.HI UR5, URZ, 0x1f, UR4 ?WAIT4_END_GROUP;
UIADD3.64 UR14, UPT, UPT, UR4, UR4, URZ ?WAIT4_END_GROUP;
UIADD3.64 UR4, UPT, UPT, UR4, UR14, URZ ?trans1;
USHF.L.U64.HI UR17, UR14, 0x3, UR15 ?trans1;
USHF.L.U32 UR16, UR14, 0x3, URZ ?trans2;
USHF.L.U64.HI UR19, UR4, 0x3, UR5 ?trans1;
USHF.L.U32 UR18, UR4, 0x3, URZ &req={3,2,1} ?WAIT12_END_GROUP;
LDCU UR13, c[0x0][0x3a8] &req={0} &wr=0x0 ?trans1;
HFMA2 R4, -RZ, RZ, 0, 0 ?trans1;
UISETP.GE.U32.AND UP0, UPT, UR13, 0x8, UPT &req={0} ?WAIT6_END_GROUP;
PLOP3.LUT P0, PT, PT, PT, UP0, 0x80, 0x8 ?WAIT13_END_GROUP;
@!P0 BRA 0xb10 &req={2,1} ?trans5;
LDCU UR4, c[0x0][0x3b0] &wr=0x0 ?trans1;
LDCU UR12, c[0x0][0x3a8] &wr=0x1 ?trans1;
UIMAD UR8, UR20, UR13, 0x2 ?WAIT4_END_GROUP;
UIMAD UR8, UR7, UR8, UR11 ?trans1;
USHF.R.S32.HI UR5, URZ, 0x1f, UR4 &req={0} ?trans2;
MOV R6, UR4 ?trans1;
UIMAD UR4, UR20, UR13, 0x7 ?trans2;
IADD3 R12, PT, PT, R0, UR8, RZ ?trans1;
UIMAD UR14, UR20, UR12, 0x6 &req={1} ?trans1;
UIMAD UR15, UR20, UR12, 0x5 ?trans1;
MOV R7, UR5 ?trans1;
UIMAD UR5, UR20, UR13, 0x4 ?trans1;
UIMAD UR4, UR7, UR4, UR11 ?trans1;
UIMAD UR14, UR7, UR14, UR11 ?trans1;
UIMAD UR15, UR7, UR15, UR11 ?trans1;
IADD.64 R2, R6, R6 ?WAIT2_END_GROUP;
UIMAD UR5, UR7, UR5, UR11 ?trans1;
IADD3 R13, PT, PT, R0, UR4, RZ ?trans1;
IADD.64 R2, R6, R2 ?WAIT3_END_GROUP;
IADD3 R10, PT, PT, R0, UR15, RZ ?trans1;
IADD.64 R8, R6, R2 ?WAIT3_END_GROUP;
IADD3 R11, PT, PT, R0, UR5, RZ ?trans1;
IADD.64 R2, R6, R8 ?trans2;
IMAD.SHL.U32 R28, R8.reuse, 0x8, RZ ?trans1;
SHF.L.U64.HI R29, R8, 0x3, R9 ?trans1;
IADD.64 R4, R6.reuse, R2 ?trans2;
MOV R9, UR13 ?trans1;
ULOP3.LUT UR13, UR12, 0x7ffffff8, URZ, 0xc0, !UPT ?trans1;
IADD.64 R6, R6, R4 ?trans2;
UIMAD UR12, UR20, UR12, 0x3 ?trans1;
SHF.L.U64.HI R17, R4, 0x3, R5 ?trans1;
UIADD3 UR13, UPT, UPT, -UR13, URZ, URZ ?trans1;
LDC R5, c[0x0][0x3b0] &wr=0x0 ?trans1;
UIMAD UR12, UR7, UR12, UR11 ?trans1;
IMAD R9, R9, UR9, R0 ?trans1;
SHF.L.U64.HI R15, R2.reuse, 0x3, R3 ?trans1;
IMAD.SHL.U32 R14, R2, 0x8, RZ ?trans1;
SHF.L.U32 R16, R4, 0x3, RZ ?trans1;
IMAD.SHL.U32 R18, R6.reuse, 0x8, RZ ?trans1;
SHF.L.U64.HI R19, R6, 0x3, R7 ?WAIT2_END_GROUP;
IADD3 R2, PT, PT, R0.reuse, UR10, RZ ?trans1;
MOV R4, RZ ?trans1;
IADD3 R8, PT, PT, R9, UR7, RZ ?trans2;
IADD3 R6, PT, PT, R0.reuse, UR14, RZ ?trans2;
IADD3 R3, PT, PT, R0, UR12, RZ ?trans1;
MOV R7, UR13 ?WAIT7_END_GROUP;
LDC.64 R30, c[0x0][0x380] &wr=0x1 ?trans8;
LDC.64 R20, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD.WIDE R30, R2, 0x8, R30 &req={1} ?WAIT5_END_GROUP;
LDG.E.64 R22, desc[UR22][R30.64] &wr=0x3 ?trans1;
IMAD.WIDE R36, R5, 0x8, R30 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R34, R9, 0x8, R20 &req={2} ?WAIT4_END_GROUP;
FMUL R22, R22, UR24 &req={3} ?trans1;
FMUL R23, R23, UR24 ?WAIT5_END_GROUP;
STG.E.64 desc[UR22][R34.64], R22 &rd=0x0 ?trans4;
LDG.E.64 R24, desc[UR22][R36.64] &rd=0x1 &wr=0x2 ?trans1;
IADD.64 R32, R30, UR16 ?trans2;
IMAD.WIDE R36, R8, 0x8, R20 &req={1} ?WAIT4_END_GROUP;
FMUL R24, R24, UR24 &req={2} ?trans1;
FMUL R25, R25, UR24 ?WAIT5_END_GROUP;
STG.E.64 desc[UR22][R36.64], R24 &rd=0x1 ?trans4;
LDG.E.64 R26, desc[UR22][R32.64] &rd=0x2 &wr=0x3 ?trans1;
IMAD.WIDE R34, R12, 0x8, R20 &req={0} ?trans1;
IADD.64 R32, R30, UR18 &req={2} ?WAIT3_END_GROUP;
FMUL R26, R26, UR24 &req={3} ?trans1;
FMUL R27, R27, UR24 ?WAIT5_END_GROUP;
STG.E.64 desc[UR22][R34.64], R26 &rd=0x0 ?trans4;
LDG.E.64 R22, desc[UR22][R32.64] &wr=0x2 ?trans1;
IMAD.WIDE R36, R3, 0x8, R20 &req={1} ?trans1;
IADD.64 R34, R30, R28 &req={0} ?WAIT3_END_GROUP;
FMUL R22, R22, UR24 &req={2} ?trans1;
FMUL R23, R23, UR24 ?WAIT5_END_GROUP;
STG.E.64 desc[UR22][R36.64], R22 &rd=0x0 ?trans4;
LDG.E.64 R24, desc[UR22][R34.64] &wr=0x2 ?trans1;
IMAD.WIDE R32, R11, 0x8, R20 ?trans1;
IADD.64 R36, R30, R14 &req={0} ?WAIT3_END_GROUP;
FMUL R24, R24, UR24 &req={2} ?trans1;
FMUL R25, R25, UR24 ?WAIT5_END_GROUP;
STG.E.64 desc[UR22][R32.64], R24 &rd=0x0 ?trans4;
LDG.E.64 R26, desc[UR22][R36.64] &wr=0x2 ?trans1;
IMAD.WIDE R34, R10, 0x8, R20 ?trans1;
IADD.64 R32, R30, R16 &req={0} ?WAIT3_END_GROUP;
FMUL R26, R26, UR24 &req={2} ?trans1;
FMUL R27, R27, UR24 ?WAIT5_END_GROUP;
STG.E.64 desc[UR22][R34.64], R26 &rd=0x0 ?trans4;
LDG.E.64 R22, desc[UR22][R32.64] &wr=0x2 ?trans1;
IMAD.WIDE R36, R6, 0x8, R20 ?trans1;
IADD.64 R30, R30, R18 ?WAIT3_END_GROUP;
FMUL R22, R22, UR24 &req={2} ?trans1;
FMUL R23, R23, UR24 ?WAIT5_END_GROUP;
STG.E.64 desc[UR22][R36.64], R22 &rd=0x1 ?trans4;
LDG.E.64 R24, desc[UR22][R30.64] &wr=0x2 ?trans1;
IADD3 R7, PT, PT, R7, 0x8, RZ ?trans1;
IMAD.WIDE R20, R13, 0x8, R20 ?trans1;
MOV R26, UR7 &req={0} ?trans1;
MOV R27, UR7 ?trans1;
MOV R33, UR7 ?trans1;
ISETP.NE.AND P0, PT, R7, RZ, PT ?trans1;
MOV R32, UR7 ?trans1;
LEA R13, R26, R13, 0x3 ?trans1;
IMAD R6, R27, 0x8, R6 ?trans1;
MOV R22, UR7 &req={1} ?trans1;
MOV R23, UR7 ?trans1;
LEA R10, R33, R10, 0x3 ?trans1;
IMAD R11, R32, 0x8, R11 ?trans1;
LEA R8, R27, R8, 0x3 ?WAIT2_END_GROUP;
LEA R3, R22, R3, 0x3 ?trans1;
IMAD R12, R23, 0x8, R12 ?trans1;
IADD3 R4, PT, PT, R4, 0x8, RZ ?trans2;
LEA R2, R5, R2, 0x3 ?trans1;
FMUL R24, R24, UR24 &req={2} ?trans1;
FMUL R25, R25, UR24 ?WAIT5_END_GROUP;
STG.E.64 desc[UR22][R20.64], R24 &rd=0x0 ?trans2;
MOV R20, UR7 &req={0} ?WAIT5_END_GROUP;
IMAD R9, R20, 0x8, R9 ?trans1;
@P0 BRA 0x6b0 ?trans6;
LDC R8, c[0x0][0x3a8] &wr=0x0 ?trans2;
LOP3.LUT R2, R8, 0x7, RZ, 0xc0, !PT &req={0} ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R2, RZ, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1070 ?trans5;
IADD3 R2, PT, PT, R2, -0x1, RZ ?trans1;
LDC R5, c[0x0][0x3a8] &wr=0x0 ?trans1;
LOP3.LUT R8, R8, 0x3, RZ, 0xc0, !PT ?trans2;
IADD3 R3, PT, PT, R0, UR6, RZ ?trans1;
ISETP.GE.U32.AND P0, PT, R2, 0x3, PT ?trans1;
IADD3 R2, PT, PT, R0, UR11, RZ ?trans1;
ISETP.NE.AND P1, PT, R8, RZ, PT ?WAIT11_END_GROUP;
@!P0 BRA 0xe20 ?trans5;
LDC R16, c[0x0][0x3b0] &wr=0x1 ?trans1;
IMAD R9, R5, UR20, R4 &req={0} ?trans1;
LDCU UR4, c[0x0][0x390] &wr=0x0 ?trans6;
LDC.64 R10, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD R7, R9, R16, R3 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R10, R7, 0x8, R10 &req={2} ?WAIT3_END_GROUP;
LDC.64 R6, c[0x0][0x388] &wr=0x1 ?trans2;
LDG.E.64 R14, desc[UR22][R10.64] &wr=0x0 ?trans1;
IMAD R17, R9, UR7, R2 ?WAIT4_END_GROUP;
IMAD.WIDE R12, R17, 0x8, R6 &req={1} ?WAIT4_END_GROUP;
FMUL R20, R14, UR4 &req={0} ?trans1;
FMUL R21, R15, UR4 ?trans1;
IMAD.WIDE R14, R16, 0x8, R10 ?WAIT4_END_GROUP;
STG.E.64 desc[UR22][R12.64], R20 &rd=0x0 ?trans4;
LDG.E.64 R14, desc[UR22][R14.64] &wr=0x2 ?trans1;
IADD3 R17, PT, PT, R17, UR7, RZ ?trans1;
IADD.64 R18, R10, UR16 ?WAIT4_END_GROUP;
IMAD.WIDE R16, R17, 0x8, R6 ?WAIT4_END_GROUP;
FMUL R22, R14, UR4 &req={2} ?trans1;
FMUL R23, R15, UR4 ?WAIT5_END_GROUP;
STG.E.64 desc[UR22][R16.64], R22 &rd=0x1 ?trans4;
LDG.E.64 R18, desc[UR22][R18.64] &wr=0x2 ?trans1;
IADD3 R25, PT, PT, R9, 0x2, RZ ?trans1;
IADD.64 R12, R10, UR18 &req={0} ?WAIT4_END_GROUP;
IMAD R25, R25, UR7, R2 ?WAIT4_END_GROUP;
IMAD.WIDE R10, R25, 0x8, R6 ?WAIT4_END_GROUP;
FMUL R14, R18, UR4 &req={2} ?trans1;
FMUL R15, R19, UR4 ?WAIT5_END_GROUP;
STG.E.64 desc[UR22][R10.64], R14 &rd=0x2 ?trans4;
LDG.E.64 R12, desc[UR22][R12.64] &wr=0x1 ?trans1;
IADD3 R9, PT, PT, R9, 0x3, RZ ?trans2;
IADD3 R4, PT, PT, R4, 0x4, RZ ?WAIT3_END_GROUP;
IMAD R9, R9, UR7, R2 ?WAIT4_END_GROUP;
IMAD.WIDE R6, R9, 0x8, R6 ?WAIT4_END_GROUP;
FMUL R16, R12, UR4 &req={1} ?trans1;
FMUL R17, R13, UR4 ?WAIT5_END_GROUP;
STG.E.64 desc[UR22][R6.64], R16 &rd=0x2 ?trans2;
@!P1 BRA 0x1070 ?trans5;
ISETP.NE.AND P0, PT, R8, 0x1, PT ?trans1;
LDC.64 R6, c[0x0][0x380] &req={2} &wr=0x1 ?WAIT12_END_GROUP;
@P0 LDC R17, c[0x0][0x3b0] &wr=0x2 ?trans1;
@P0 IMAD R10, R5, UR20, R4 &req={0} ?WAIT7_END_GROUP;
@P0 LDC R19, c[0x0][0x390] &wr=0x0 ?trans1;
@P0 IMAD R9, R10, R17, R3 &req={2} ?WAIT4_END_GROUP;
@P0 IMAD.WIDE R8, R9, 0x8, R6 &req={1} ?WAIT3_END_GROUP;
LDC.64 R6, c[0x0][0x388] &wr=0x1 ?trans2;
@P0 LDG.E.64 R12, desc[UR22][R8.64] &wr=0x0 ?trans1;
@P0 IMAD R21, R10, UR7, R2 ?WAIT4_END_GROUP;
@P0 IMAD.WIDE R10, R21, 0x8, R6 &req={1} ?trans1;
LOP3.LUT P1, RZ, R5, 0x1, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@P1 LDC R16, c[0x0][0x3b0] &wr=0x1 ?trans1;
@P0 FMUL R14, R12, R19.reuse &req={0} ?trans1;
@P0 FMUL R15, R13, R19 ?trans1;
@P0 IMAD.WIDE R12, R17, 0x8, R8 ?WAIT5_END_GROUP;
LDC.64 R8, c[0x0][0x380] &wr=0x0 ?trans1;
@P0 STG.E.64 desc[UR22][R10.64], R14 &rd=0x2 ?trans4;
@P0 LDG.E.64 R12, desc[UR22][R12.64] &wr=0x3 ?trans1;
@P0 IADD3 R4, PT, PT, R4, 0x2, RZ ?trans2;
@P0 IADD3 R21, PT, PT, R21, UR7, RZ ?WAIT3_END_GROUP;
@P1 IMAD R18, R5, UR20, R4 ?trans2;
@P0 IMAD.WIDE R6, R21, 0x8, R6 ?trans1;
@P1 LDC R10, c[0x0][0x390] &req={2} &wr=0x2 ?trans3;
@P1 IMAD R5, R18, R16, R3 &req={1} ?WAIT4_END_GROUP;
@P1 IMAD.WIDE R4, R5, 0x8, R8 &req={0} ?trans2;
LDC.64 R8, c[0x0][0x388] &wr=0x0 ?trans2;
@P0 FMUL R16, R12, R19.reuse &req={3} ?trans1;
@P0 FMUL R17, R13, R19 ?WAIT5_END_GROUP;
@P0 STG.E.64 desc[UR22][R6.64], R16 &rd=0x1 ?trans4;
@P1 LDG.E.64 R4, desc[UR22][R4.64] &wr=0x2 ?trans1;
@P1 IMAD R3, R18, UR7, R2 ?WAIT4_END_GROUP;
@P1 IMAD.WIDE R2, R3, 0x8, R8 &req={0} ?WAIT4_END_GROUP;
@P1 FMUL R8, R4, R10.reuse &req={2} ?trans1;
@P1 FMUL R9, R5, R10 ?WAIT5_END_GROUP;
@P1 STG.E.64 desc[UR22][R2.64], R8 &rd=0x1 ?trans2;
IADD3 R0, PT, PT, R0, UR21, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR7, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x380 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
EXIT ?trans5;
BRA 0x10c0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: gpuppsmtposesn(HIP_vector_type<float, 2u>*, HIP_vector_type<float, 2u>*, float, int, int, int, int, int, int, int, int, int)
_Z14gpuppsmtposesnP15HIP_vector_typeIfLj2EES1_fiiiiiiiii:
s_load_b256 s[4:11], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_cmp_ge_i32 s15, s9
s_cbranch_scc1 .LBB1_8
s_load_b32 s12, s[0:1], 0x30
s_add_i32 s2, s8, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_sub_i32 s3, s15, s2
s_ashr_i32 s8, s3, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s8, s8, s9
s_add_i32 s8, s8, s3
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s8, s2
s_cbranch_scc1 .LBB1_8
s_cmp_ge_i32 s14, s7
s_cbranch_scc1 .LBB1_8
s_mul_i32 s8, s8, s6
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_sub_i32 s3, s5, s8
s_max_i32 s3, s3, 0
s_delay_alu instid0(SALU_CYCLE_1)
s_min_i32 s5, s3, s6
s_mov_b32 s6, 0
s_mov_b32 s3, exec_lo
v_cmpx_gt_i32_e64 s5, v0
s_cbranch_execz .LBB1_8
s_lshl_b32 s2, s2, 1
s_mul_i32 s13, s14, s5
s_cmp_ge_i32 s2, s9
s_waitcnt lgkmcnt(0)
s_mul_i32 s14, s14, s12
s_cselect_b32 s3, s9, 0
s_load_b32 s9, s[0:1], 0x44
s_sub_i32 s2, s2, s3
s_mul_i32 s14, s14, s10
s_cmp_gt_i32 s15, s2
s_load_b128 s[0:3], s[0:1], 0x0
s_cselect_b32 s7, -1, 0
v_add3_u32 v6, s8, s14, v0
s_cmp_lg_u32 s7, 0
s_subb_u32 s7, s15, 0
s_cmp_gt_i32 s10, 0
s_mul_i32 s11, s11, s7
s_cselect_b32 s7, -1, 0
s_add_i32 s13, s13, s11
s_delay_alu instid0(SALU_CYCLE_1)
v_mad_u64_u32 v[1:2], null, s10, s13, v[0:1]
s_waitcnt lgkmcnt(0)
s_and_b32 s8, s9, 0xffff
.LBB1_5:
v_mov_b32_e32 v2, v6
s_delay_alu instid0(VALU_DEP_2)
v_mov_b32_e32 v4, v1
s_and_not1_b32 vcc_lo, exec_lo, s7
s_mov_b32 s9, s10
s_cbranch_vccnz .LBB1_7
.LBB1_6:
v_ashrrev_i32_e32 v3, 31, v2
v_ashrrev_i32_e32 v5, 31, v4
s_add_i32 s9, s9, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
s_cmp_lg_u32 s9, 0
v_lshlrev_b64 v[7:8], 3, v[2:3]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[9:10], 3, v[4:5]
v_add_nc_u32_e32 v4, s5, v4
v_add_nc_u32_e32 v2, s12, v2
v_add_co_u32 v7, vcc_lo, s0, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
v_add_co_u32 v9, vcc_lo, s2, v9
v_add_co_ci_u32_e32 v10, vcc_lo, s3, v10, vcc_lo
global_load_b64 v[7:8], v[7:8], off
s_waitcnt vmcnt(0)
v_dual_mul_f32 v7, s4, v7 :: v_dual_mul_f32 v8, s4, v8
global_store_b64 v[9:10], v[7:8], off
s_cbranch_scc1 .LBB1_6
.LBB1_7:
v_add_nc_u32_e32 v0, s8, v0
v_add_nc_u32_e32 v1, s8, v1
v_add_nc_u32_e32 v6, s8, v6
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_le_i32_e32 vcc_lo, s5, v0
s_or_b32 s6, vcc_lo, s6
s_and_not1_b32 exec_lo, exec_lo, s6
s_cbranch_execnz .LBB1_5
.LBB1_8:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| gpuppsmtposesn | 6,784 | 1,520 | stackv2-00000-of-00015 |
// Demangled: evolve9ptgpu(double*, double*, double*, double*, int, double, double, double)
Function : _Z12evolve9ptgpuPdS_S_S_iddd
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans8;
LDC R3, c[0x0][0x3a0] &wr=0x2 ?trans1;
IMAD R0, R0, UR4, R5 &req={1} ?WAIT2_END_GROUP;
IMAD R2, R3, R3, RZ &req={2} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, R2, PT ?WAIT5_END_GROUP;
ISETP.LT.OR P0, PT, R0, RZ, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
IABS R11, R3 ?trans1;
BSSY.RECONVERGENT B0, 0x340 ?trans1;
IABS R9, R0 ?trans2;
I2F.RP R6, R11 &wr=0x0 ?trans1;
ISETP.GE.AND P2, PT, R0, RZ, PT ?trans1;
ISETP.NE.AND P1, PT, R3, RZ, PT ?trans1;
MUFU.RCP R6, R6 &req={0} &wr=0x0 ?trans2;
IADD3 R4, PT, PT, R6, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R5, R4 &rd=0x0 &wr=0x1 ?trans2;
HFMA2 R4, -RZ, RZ, 0, 0 &req={0} ?trans1;
IADD3 R8, PT, PT, RZ, -R5, RZ &req={1} ?WAIT5_END_GROUP;
IMAD R7, R8, R11, RZ ?trans1;
MOV R8, R9 ?trans1;
IADD3 R9, PT, PT, R2, -R3, RZ ?trans2;
IMAD.HI.U32 R5, R5, R7, R4 ?WAIT6_END_GROUP;
IMAD.HI.U32 R7, R5, R8, RZ ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, -R7, RZ, RZ ?WAIT5_END_GROUP;
IMAD R6, R11, R7, R8 ?trans1;
LOP3.LUT R7, RZ, R3, RZ, 0x33, !PT ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P0, PT, R11, R6, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R6, PT, PT, R6, -R11, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R11, R6, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R6, PT, PT, R6, -R11, RZ ?trans2;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?trans2;
@!P2 IADD3 R6, PT, PT, -R6, RZ, RZ ?WAIT5_END_GROUP;
SEL R6, R7, R6, !P1 ?WAIT5_END_GROUP;
ISETP.NE.AND P2, PT, R6, RZ, PT ?WAIT13_END_GROUP;
@!P2 BRA 0x330 ?trans5;
IADD3 R4, PT, PT, R0, 0x1, RZ ?WAIT4_END_GROUP;
IABS R2, R4 ?trans1;
ISETP.GE.AND P2, PT, R4, RZ, PT ?WAIT4_END_GROUP;
IMAD.HI.U32 R5, R5, R2, RZ ?WAIT5_END_GROUP;
IADD3 R5, PT, PT, -R5, RZ, RZ ?WAIT5_END_GROUP;
IMAD R2, R11, R5, R2 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R11, R2, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R2, PT, PT, R2, -R11, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R11, R2, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R2, PT, PT, R2, -R11, RZ ?WAIT4_END_GROUP;
@!P2 IADD3 R2, PT, PT, -R2, RZ, RZ ?WAIT5_END_GROUP;
SEL R2, R7, R2, !P1 ?WAIT5_END_GROUP;
ISETP.EQ.AND P0, PT, R2, RZ, PT ?WAIT13_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
ISETP.LT.OR P0, PT, R0.reuse, R3, P0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans4;
ISETP.LT.AND P0, PT, R0, R9, !P0 ?WAIT13_END_GROUP;
@!P0 LDC.64 R4, c[0x0][0x380] &wr=0x1 ?trans2;
@!P0 IMAD.WIDE.U32 R4, R0, 0x8, R4 &req={1} ?WAIT5_END_GROUP;
@!P0 STG.E.64 desc[UR4][R4.64], RZ &req={0} &rd=0x0 ?trans1;
@!P0 EXIT ?trans5;
LDC.64 R16, c[0x0][0x388] &wr=0x1 ?trans1;
IADD3 R5, PT, PT, R0, -R3, RZ &req={0} ?WAIT7_END_GROUP;
LDC.64 R8, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD.WIDE.U32 R6, R0, 0x8, R16 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R16, R5, 0x8, R16 ?trans1;
LDG.E.64 R10, desc[UR4][R6.64+0x8] &wr=0x2 ?trans3;
IMAD.WIDE R12, R3, 0x8, R6 ?trans1;
LDG.E.64 R4, desc[UR4][R6.64+-0x8] &wr=0x2 ?trans3;
IMAD.WIDE.U32 R8, R0, 0x8, R8 &req={0} ?trans1;
LDG.E.64 R14, desc[UR4][R12.64] &wr=0x3 ?trans4;
LDG.E.64 R18, desc[UR4][R16.64] &wr=0x4 ?trans4;
LDG.E.64 R2, desc[UR4][R6.64] &rd=0x0 &wr=0x5 ?trans4;
LDG.E.64 R8, desc[UR4][R8.64] &wr=0x3 ?trans4;
LDG.E.64 R20, desc[UR4][R16.64+-0x8] &wr=0x3 ?trans1;
LDC.64 R6, c[0x0][0x3a8] &req={0} &wr=0x0 ?trans3;
LDG.E.64 R22, desc[UR4][R16.64+0x8] &wr=0x3 ?trans4;
LDG.E.64 R24, desc[UR4][R12.64+-0x8] &wr=0x3 ?trans4;
LDG.E.64 R26, desc[UR4][R12.64+0x8] &rd=0x1 &wr=0x3 ?trans1;
DMUL R6, R6, R6 &req={0} ?trans1;
UMOV.64 UR6, 0x3fb999999999999a ?trans1;
BSSY.RECONVERGENT B0, 0xbd0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R4, R4, R10 &req={2} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R4, R4, R14 &req={3} &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R4, R18 &req={4} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R4, R2, R2 &req={5} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R4, R4, -R8 &req={0} &rd=0x0 ?trans2;
MUFU.RCP64H R9, R7 &req={0} &wr=0x0 ?trans1;
MOV R8, 0x1 ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R20, R22 &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, -R6, R8, 1 &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R20, R24 &req={2} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R10, R10 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R20, R26 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R8, R12, R8 &req={1} &rd=0x1 ?trans2;
LDC.64 R8, c[0x0][0x3b0] &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R20, 0.25, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R2, -5, R10 &req={0} &wr=0x0 ?trans2;
FSETP.GEU.AND P1, PT, |R11|, 6.5827683646048100446e-37, PT &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, -R6, R12, 1 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R12, R2, R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R12, R10, R2 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, -R6, R12, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R2, R14, R12 &req={0} &wr=0x0 ?trans2;
FFMA R12, RZ, R7, R3 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R12|, 1.469367938527859385e-39, PT ?WAIT15_END_GROUP;
NOP ?WAIT12_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R8, R8 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R8, UR6 &req={0} &wr=0x0 ?trans2;
@P0 BRA P1, 0xbc0 &req={0} ?trans5;
MOV R12, 0xbc0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xd70 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R10, c[0x0][0x398] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x3b8] &wr=0x1 ?trans1;
IMAD.WIDE.U32 R10, R0, 0x8, R10 &req={0} ?WAIT6_END_GROUP;
LDG.E.64 R10, desc[UR4][R10.64] &wr=0x2 ?trans1;
F2F.F32.F64 R6, UR6 &req={1} &wr=0x0 ?trans2;
FMUL R12, R6, -1.4426950216293334961 &req={0} ?WAIT5_END_GROUP;
FSETP.GEU.AND P0, PT, R12, -126, PT ?WAIT13_END_GROUP;
@!P0 FMUL R12, R12, 0.5 ?WAIT4_END_GROUP;
MUFU.EX2 R13, R12 &wr=0x0 ?trans2;
@!P0 FMUL R13, R13, R13 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT8_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R6, R13 &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R6, -R10, R2 &req={2} &rd=0x0 &wr=0x1 ?trans2;
LDC.64 R2, c[0x0][0x380] &req={0} &wr=0x0 ?trans2;
IMAD.WIDE.U32 R2, R0, 0x8, R2 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R8, R6, R4 &req={1} &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R2.64], R4 &req={0} ?trans1;
EXIT ?trans5;
FSETP.GEU.AND P2, PT, |R11|.reuse, 1.469367938527859385e-39, PT ?trans1;
LOP3.LUT R13, R11, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B1, 0x1550 ?trans1;
LOP3.LUT R22, R7.reuse, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
MOV R16, 0x1ca00000 ?trans1;
FSETP.GEU.AND P0, PT, |R7|.reuse, 1.469367938527859385e-39, PT ?trans1;
LOP3.LUT R2, R7, 0x800fffff, RZ, 0xc0, !PT ?trans2;
ISETP.GE.U32.AND P1, PT, R13, R22, PT ?trans1;
MOV R23, R13 ?trans1;
LOP3.LUT R3, R2, 0x3ff00000, RZ, 0xfc, !PT ?WAIT3_END_GROUP;
@!P2 LOP3.LUT R14, R7, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
SEL R15, R16.reuse, 0x63400000, !P1 ?trans1;
@!P2 MOV R24, RZ ?trans1;
MOV R2, R6 ?trans2;
@!P2 ISETP.GE.U32.AND P3, PT, R13, R14, PT ?trans1;
MOV R14, R10 ?trans1;
LOP3.LUT R15, R15, 0x800fffff, R11, 0xf8, !PT ?trans1;
MOV R18, 0x1 ?trans2;
@!P2 SEL R17, R16, 0x63400000, !P3 ?trans1;
@!P0 DMUL R2, R6, 8.98846567431157953865e+307 &wr=0x0 ?trans2;
MUFU.RCP64H R19, R3 &req={0} &wr=0x0 ?trans1;
@!P0 LOP3.LUT R22, R3, 0x7ff00000, RZ, 0xc0, !PT ?WAIT2_END_GROUP;
@!P2 LOP3.LUT R17, R17, 0x80000000, R11, 0xf8, !PT ?trans2;
IADD3 R26, PT, PT, R22, -0x1, RZ ?trans2;
@!P2 LOP3.LUT R25, R17, 0x100000, RZ, 0xfc, !PT ?WAIT15_END_GROUP;
NOP ?WAIT10_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P2 DFMA R14, R14, 2, -R24 &wr=0x1 ?trans2;
@!P2 LOP3.LUT R23, R15, 0x7ff00000, RZ, 0xc0, !PT &req={1} ?WAIT4_END_GROUP;
IADD3 R17, PT, PT, R23, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R17, 0x7feffffe, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R26, 0x7feffffe, P0 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R18, -R2, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R20, R20, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R18, R20, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R20, -R2, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R20, R18, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R20, R18, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R24, R20, -R2, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R18, R24, R20 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0x1400 &req={1,0} ?trans5;
LOP3.LUT R20, R7, 0x7ff00000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R10, PT, PT, R13.reuse, -R20.reuse, RZ ?trans1;
ISETP.GE.U32.AND P0, PT, R13, R20, PT ?WAIT4_END_GROUP;
VIMNMX.S32 R10, R10, -0x46a00000, !PT ?trans1;
SEL R13, R16, 0x63400000, !P0 ?WAIT4_END_GROUP;
VIMNMX.S32 R10, R10, 0x46a00000, PT ?WAIT5_END_GROUP;
IADD3 R13, PT, PT, -R13, R10, RZ ?trans1;
MOV R10, RZ ?WAIT3_END_GROUP;
IADD3 R11, PT, PT, R13, 0x7fe00000, RZ ?WAIT6_END_GROUP;
DMUL R16, R18, R10 &wr=0x0 ?trans2;
FSETP.GTU.AND P0, PT, |R17|, 1.469367938527859385e-39, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x1540 ?trans5;
DFMA R2, R18, -R2, R14 &wr=0x0 ?trans1;
MOV R10, RZ ?trans1;
FSETP.NEU.AND P0, PT, R3.reuse, RZ, PT &req={0} ?trans1;
LOP3.LUT R7, R3, 0x80000000, R7, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R11, R7, R11, RZ, 0xfc, !PT ?WAIT8_END_GROUP;
@!P0 BRA 0x1540 ?trans5;
IADD3 R3, PT, PT, -R13.reuse, RZ, RZ ?trans1;
MOV R2, RZ ?trans1;
IADD3 R13, PT, PT, -R13, -0x43300000, RZ ?trans1;
DMUL.RP R10, R18, R10 &wr=0x0 ?trans2;
LOP3.LUT R7, R11, R7, RZ, 0x3c, !PT &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R16, -R2, R18 &wr=0x0 ?trans2;
FSETP.NEU.AND P0, PT, |R3|, R13, PT &req={0} ?WAIT5_END_GROUP;
FSEL R16, R10, R16, !P0 ?trans1;
FSEL R17, R7, R17, !P0 ?trans1;
BRA 0x1540 ?trans6;
DSETP.NAN.AND P0, PT, R10, R10, PT &wr=0x0 ?trans2;
@P0 BRA 0x1520 &req={0} ?trans5;
DSETP.NAN.AND P0, PT, R6, R6, PT &wr=0x0 ?trans2;
@P0 BRA 0x14f0 &req={0} ?trans5;
ISETP.NE.AND P0, PT, R23, R22, PT ?trans1;
MOV.64 R16, 0xfff8000000000000 ?WAIT12_END_GROUP;
@!P0 BRA 0x1540 ?trans5;
ISETP.NE.AND P0, PT, R23, 0x7ff00000, PT ?trans1;
LOP3.LUT R17, R11, 0x80000000, R7, 0x48, !PT ?WAIT4_END_GROUP;
ISETP.EQ.OR P0, PT, R22, RZ, !P0 ?WAIT13_END_GROUP;
@P0 LOP3.LUT R2, R17, 0x7ff00000, RZ, 0xfc, !PT ?trans1;
@!P0 MOV R16, RZ ?trans1;
@P0 MOV R16, RZ ?WAIT3_END_GROUP;
@P0 MOV R17, R2 ?trans1;
BRA 0x1540 ?trans6;
LOP3.LUT R17, R7, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R16, R6 ?trans1;
BRA 0x1540 ?trans6;
LOP3.LUT R17, R11, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R16, R10 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
HFMA2 R13, -RZ, RZ, 0, 0 ?trans1;
MOV R2, R16 ?trans1;
MOV R3, R17 ?trans2;
RET.REL.NODEC R12 0x0 ?trans5;
BRA 0x1590;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: evolve9ptgpu(double*, double*, double*, double*, int, double, double, double)
_Z12evolve9ptgpuPdS_S_S_iddd:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x4c
s_load_b32 s12, s[0:1], 0x20
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_mul_i32 s16, s12, s12
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_lt_i32_e32 vcc_lo, -1, v1
v_cmp_gt_i32_e64 s2, s16, v1
s_and_b32 s2, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB0_10
s_ashr_i32 s13, s12, 31
v_ashrrev_i32_e32 v4, 31, v1
s_add_i32 s2, s12, s13
s_load_b256 s[4:11], s[0:1], 0x0
s_xor_b32 s3, s2, s13
s_mov_b32 s14, exec_lo
v_cvt_f32_u32_e32 v0, s3
s_sub_i32 s2, 0, s3
v_add_nc_u32_e32 v3, v1, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v0, v0
v_xor_b32_e32 v3, v3, v4
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_u32_f32_e32 v0, v0
v_mul_lo_u32 v2, s2, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v2, v0, v2
v_add_nc_u32_e32 v0, v0, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v2, v3, v0
v_mul_lo_u32 v2, v2, s3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v2, v3, v2
v_subrev_nc_u32_e32 v3, s3, v2
v_cmp_le_u32_e32 vcc_lo, s3, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v2, v2, v3, vcc_lo
v_subrev_nc_u32_e32 v3, s3, v2
v_cmp_le_u32_e32 vcc_lo, s3, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v2, v2, v3, vcc_lo
v_xor_b32_e32 v2, v2, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v2, v2, v4
v_cmp_eq_u32_e64 s2, 0, v2
v_cmpx_ne_u32_e32 0, v2
s_cbranch_execz .LBB0_7
v_add_nc_u32_e32 v2, 1, v1
s_mov_b32 s17, -1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_add_nc_u32_e32 v2, v2, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v2, v2, v3
v_mul_hi_u32 v0, v2, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v0, v0, s3
v_sub_nc_u32_e32 v0, v2, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v2, s3, v0
v_cmp_le_u32_e32 vcc_lo, s3, v0
v_cndmask_b32_e32 v0, v0, v2, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_subrev_nc_u32_e32 v2, s3, v0
v_cmp_le_u32_e32 vcc_lo, s3, v0
v_cmp_gt_i32_e64 s3, s12, v1
v_cndmask_b32_e32 v0, v0, v2, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v0, v0, v3
v_sub_nc_u32_e32 v0, v0, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_eq_u32_e32 vcc_lo, 0, v0
s_or_b32 s3, s3, vcc_lo
s_xor_b32 s18, s3, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s15, s18
s_cbranch_execz .LBB0_6
s_sub_i32 s16, s16, s12
s_delay_alu instid0(SALU_CYCLE_1)
v_cmp_gt_i32_e32 vcc_lo, s16, v1
s_and_saveexec_b32 s16, vcc_lo
s_cbranch_execz .LBB0_5
v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, v1
v_subrev_nc_u32_e32 v5, s12, v1
s_xor_b32 s17, exec_lo, -1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[15:16], 3, v[1:2]
v_lshlrev_b64 v[3:4], 3, v[3:4]
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v6, 31, v5
s_waitcnt lgkmcnt(0)
v_add_co_u32 v7, vcc_lo, s6, v15
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[5:6], 3, v[5:6]
v_add_co_ci_u32_e32 v8, vcc_lo, s7, v16, vcc_lo
v_add_co_u32 v11, vcc_lo, s6, v3
v_add_co_ci_u32_e32 v12, vcc_lo, s7, v4, vcc_lo
v_add_co_u32 v9, vcc_lo, s6, v5
v_add_co_ci_u32_e32 v10, vcc_lo, s7, v6, vcc_lo
s_clause 0x3
global_load_b128 v[3:6], v[7:8], off
global_load_b64 v[17:18], v[11:12], off offset:-8
global_load_b64 v[19:20], v[9:10], off offset:8
global_load_b128 v[7:10], v[9:10], off offset:-8
s_lshl_b64 s[6:7], s[12:13], 3
s_delay_alu instid0(SALU_CYCLE_1)
v_add_co_u32 v21, vcc_lo, v11, s6
v_add_co_ci_u32_e32 v22, vcc_lo, s7, v12, vcc_lo
s_clause 0x1
global_load_b128 v[11:14], v[21:22], off offset:-8
global_load_b64 v[21:22], v[21:22], off offset:8
s_clause 0x1
s_load_b128 s[20:23], s[0:1], 0x28
s_load_b64 s[0:1], s[0:1], 0x38
s_waitcnt lgkmcnt(0)
v_cvt_f32_f64_e32 v0, s[0:1]
s_mov_b32 s0, 0x9999999a
s_mov_b32 s1, 0x3fb99999
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v0, 0xbfb8aa3b, v0
v_exp_f32_e32 v0, v0
s_waitcnt vmcnt(4)
v_add_f64 v[5:6], v[17:18], v[5:6]
s_waitcnt vmcnt(2)
v_add_f64 v[7:8], v[7:8], v[19:20]
s_waitcnt vmcnt(1)
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_f64 v[5:6], v[5:6], v[13:14]
v_add_co_u32 v13, vcc_lo, s8, v15
v_add_f64 v[7:8], v[7:8], v[11:12]
v_add_co_ci_u32_e32 v14, vcc_lo, s9, v16, vcc_lo
v_add_co_u32 v15, vcc_lo, s10, v15
v_add_co_ci_u32_e32 v16, vcc_lo, s11, v16, vcc_lo
global_load_b64 v[13:14], v[13:14], off
global_load_b64 v[15:16], v[15:16], off
v_add_f64 v[5:6], v[5:6], v[9:10]
s_waitcnt vmcnt(2)
v_add_f64 v[7:8], v[7:8], v[21:22]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_fma_f64 v[5:6], 0x3fd00000, v[7:8], v[5:6]
v_mul_f64 v[7:8], s[20:21], s[20:21]
v_fma_f64 v[5:6], 0xc0140000, v[3:4], v[5:6]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_div_scale_f64 v[9:10], null, v[7:8], v[7:8], v[5:6]
v_div_scale_f64 v[19:20], vcc_lo, v[5:6], v[7:8], v[5:6]
v_rcp_f64_e32 v[11:12], v[9:10]
s_waitcnt_depctr 0xfff
v_fma_f64 v[17:18], -v[9:10], v[11:12], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[11:12], v[11:12], v[17:18], v[11:12]
v_fma_f64 v[17:18], -v[9:10], v[11:12], 1.0
s_waitcnt vmcnt(1)
v_fma_f64 v[3:4], v[3:4], 2.0, -v[13:14]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[11:12], v[11:12], v[17:18], v[11:12]
v_mul_f64 v[17:18], v[19:20], v[11:12]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[9:10], -v[9:10], v[17:18], v[19:20]
v_div_fmas_f64 v[9:10], v[9:10], v[11:12], v[17:18]
v_mul_f64 v[11:12], s[22:23], s[22:23]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_div_fixup_f64 v[5:6], v[9:10], v[7:8], v[5:6]
v_cvt_f64_f32_e32 v[7:8], v0
v_mul_f64 v[9:10], v[11:12], s[0:1]
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[5:6], -v[15:16], v[7:8], v[5:6]
v_fma_f64 v[5:6], v[9:10], v[5:6], v[3:4]
.LBB0_5:
s_or_b32 exec_lo, exec_lo, s16
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
s_and_not1_b32 s0, s3, exec_lo
s_and_b32 s1, s17, exec_lo
s_or_b32 s3, s0, s1
.LBB0_6:
s_or_b32 exec_lo, exec_lo, s15
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
s_and_not1_b32 s0, s2, exec_lo
s_and_b32 s1, s3, exec_lo
s_or_b32 s2, s0, s1
.LBB0_7:
s_or_b32 exec_lo, exec_lo, s14
s_delay_alu instid0(VALU_DEP_2)
s_and_saveexec_b32 s0, s2
v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v2, 0
v_mov_b32_e32 v6, 0
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 3, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
global_store_b64 v[0:1], v[5:6], off
.LBB0_10:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| evolve9ptgpu | 7,067 | 4,385 | stackv2-00000-of-00015 |
// Demangled: evolvegpu(double*, double*, double*, double*, int, double, double, double)
Function : _Z9evolvegpuPdS_S_S_iddd
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans8;
LDC R5, c[0x0][0x3a0] &wr=0x2 ?trans1;
IMAD R0, R0, UR4, R3 &req={1} ?WAIT2_END_GROUP;
IMAD R4, R5, R5, RZ &req={2} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, R4, PT ?WAIT5_END_GROUP;
ISETP.LT.OR P0, PT, R0, RZ, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
IABS R11, R5 ?trans1;
BSSY.RECONVERGENT B0, 0x340 ?trans1;
IABS R9, R0 ?trans2;
I2F.RP R6, R11 &wr=0x0 ?trans1;
ISETP.GE.AND P2, PT, R0, RZ, PT ?trans1;
ISETP.NE.AND P1, PT, R5, RZ, PT ?trans1;
MUFU.RCP R6, R6 &req={0} &wr=0x0 ?trans2;
IADD3 R2, PT, PT, R6, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R3, R2 &rd=0x0 &wr=0x1 ?trans2;
HFMA2 R2, -RZ, RZ, 0, 0 &req={0} ?trans1;
IADD3 R8, PT, PT, RZ, -R3, RZ &req={1} ?WAIT5_END_GROUP;
IMAD R7, R8, R11, RZ ?trans1;
MOV R8, R9 ?trans1;
IADD3 R9, PT, PT, R4, -R5, RZ ?trans2;
IMAD.HI.U32 R3, R3, R7, R2 ?WAIT6_END_GROUP;
IMAD.HI.U32 R7, R3, R8, RZ ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, -R7, RZ, RZ ?WAIT5_END_GROUP;
IMAD R6, R11, R7, R8 ?trans1;
LOP3.LUT R7, RZ, R5, RZ, 0x33, !PT ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P0, PT, R11, R6, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R6, PT, PT, R6, -R11, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R11, R6, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R6, PT, PT, R6, -R11, RZ ?trans2;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?trans2;
@!P2 IADD3 R6, PT, PT, -R6, RZ, RZ ?WAIT5_END_GROUP;
SEL R6, R7, R6, !P1 ?WAIT5_END_GROUP;
ISETP.NE.AND P2, PT, R6, RZ, PT ?WAIT13_END_GROUP;
@!P2 BRA 0x330 ?trans5;
IADD3 R4, PT, PT, R0, 0x1, RZ ?WAIT4_END_GROUP;
IABS R2, R4 ?trans1;
ISETP.GE.AND P2, PT, R4, RZ, PT ?WAIT4_END_GROUP;
IMAD.HI.U32 R3, R3, R2, RZ ?WAIT5_END_GROUP;
IADD3 R3, PT, PT, -R3, RZ, RZ ?WAIT5_END_GROUP;
IMAD R2, R11, R3, R2 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R11, R2, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R2, PT, PT, R2, -R11, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R11, R2, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R2, PT, PT, R2, -R11, RZ ?WAIT4_END_GROUP;
@!P2 IADD3 R2, PT, PT, -R2, RZ, RZ ?WAIT5_END_GROUP;
SEL R2, R7, R2, !P1 ?WAIT5_END_GROUP;
ISETP.EQ.AND P0, PT, R2, RZ, PT ?WAIT13_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
ISETP.LT.OR P0, PT, R0.reuse, R5, P0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans4;
ISETP.LT.AND P0, PT, R0, R9, !P0 ?WAIT13_END_GROUP;
@!P0 LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans2;
@!P0 IMAD.WIDE.U32 R2, R0, 0x8, R2 &req={1} ?WAIT5_END_GROUP;
@!P0 STG.E.64 desc[UR4][R2.64], RZ &req={0} &rd=0x0 ?trans1;
@!P0 EXIT ?trans5;
LDC.64 R16, c[0x0][0x388] &wr=0x1 ?trans8;
LDC.64 R10, c[0x0][0x390] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R8, R0, 0x8, R16 &req={1} ?WAIT5_END_GROUP;
LDG.E.64 R6, desc[UR4][R8.64+-0x8] &wr=0x3 ?trans1;
IMAD.WIDE R14, R5, 0x8, R8 ?WAIT3_END_GROUP;
LDG.E.64 R12, desc[UR4][R8.64+0x8] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R10, R0, 0x8, R10 &req={2} ?WAIT3_END_GROUP;
LDG.E.64 R14, desc[UR4][R14.64] &wr=0x2 ?trans1;
IADD3 R5, PT, PT, R0, -R5, RZ ?WAIT3_END_GROUP;
LDG.E.64 R2, desc[UR4][R8.64] &req={0} &wr=0x4 ?trans2;
IMAD.WIDE R16, R5, 0x8, R16 ?trans2;
LDG.E.64 R10, desc[UR4][R10.64] &wr=0x5 ?trans4;
LDG.E.64 R16, desc[UR4][R16.64] &wr=0x2 ?trans1;
UMOV.64 UR6, 0x3fb999999999999a ?trans1;
BSSY.RECONVERGENT B0, 0xa50 ?trans1;
DADD R6, R6, R12 &req={3} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, R6, R14 &req={2} &rd=0x0 ?trans2;
LDC.64 R6, c[0x0][0x3a8] &req={0} &wr=0x0 ?trans1;
MOV R14, 0x1 ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R6, R6, R6 &req={0} &wr=0x0 ?trans2;
MUFU.RCP64H R15, R7 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R4, R2, R2 &req={4} &wr=0x5 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R4, R4, -R10 &req={5} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, -R6, R14, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, R12, R16 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R10, R10, R10 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R2, -4, R8 &req={1} &wr=0x0 ?trans2;
FSETP.GEU.AND P1, PT, |R9|, 6.5827683646048100446e-37, PT &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R14, R10, R14 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, -R6, R10, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R10, R2, R10 &req={0} &rd=0x0 &wr=0x1 ?trans2;
LDC.64 R10, c[0x0][0x3b0] &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R12, R8, R2 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, -R6, R12, R8 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R2, R14, R12 &req={1} &wr=0x1 ?trans2;
FFMA R12, RZ, R7, R3 &req={1} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R12|, 1.469367938527859385e-39, PT ?WAIT15_END_GROUP;
NOP ?WAIT12_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R10, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R10, UR6 &req={0} &wr=0x0 ?trans2;
@P0 BRA P1, 0xa40 &req={0} ?trans5;
MOV R12, 0xa40 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xbf0 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R8, c[0x0][0x398] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x3b8] &wr=0x1 ?trans1;
IMAD.WIDE.U32 R8, R0, 0x8, R8 &req={0} ?WAIT6_END_GROUP;
LDG.E.64 R8, desc[UR4][R8.64] &wr=0x2 ?trans1;
F2F.F32.F64 R6, UR6 &req={1} &wr=0x0 ?trans2;
FMUL R12, R6, -1.4426950216293334961 &req={0} ?WAIT5_END_GROUP;
FSETP.GEU.AND P0, PT, R12, -126, PT ?WAIT13_END_GROUP;
@!P0 FMUL R12, R12, 0.5 ?WAIT4_END_GROUP;
MUFU.EX2 R13, R12 &wr=0x0 ?trans2;
@!P0 FMUL R13, R13, R13 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT8_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R6, R13 &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R6, R8, R2 &req={2} &rd=0x0 &wr=0x1 ?trans2;
LDC.64 R2, c[0x0][0x380] &req={0} &wr=0x0 ?trans2;
IMAD.WIDE.U32 R2, R0, 0x8, R2 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R10, R6, R4 &req={1} &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R2.64], R4 &req={0} ?trans1;
EXIT ?trans5;
FSETP.GEU.AND P2, PT, |R9|.reuse, 1.469367938527859385e-39, PT ?trans1;
LOP3.LUT R13, R9, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B1, 0x13d0 ?trans1;
LOP3.LUT R22, R7.reuse, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
MOV R16, 0x1ca00000 ?trans1;
FSETP.GEU.AND P0, PT, |R7|.reuse, 1.469367938527859385e-39, PT ?trans1;
LOP3.LUT R2, R7, 0x800fffff, RZ, 0xc0, !PT ?trans2;
ISETP.GE.U32.AND P1, PT, R13, R22, PT ?trans1;
MOV R23, R13 ?trans1;
LOP3.LUT R3, R2, 0x3ff00000, RZ, 0xfc, !PT ?WAIT3_END_GROUP;
@!P2 LOP3.LUT R14, R7, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
SEL R15, R16.reuse, 0x63400000, !P1 ?trans1;
@!P2 MOV R24, RZ ?trans1;
MOV R2, R6 ?trans2;
@!P2 ISETP.GE.U32.AND P3, PT, R13, R14, PT ?trans1;
MOV R14, R8 ?trans1;
LOP3.LUT R15, R15, 0x800fffff, R9, 0xf8, !PT ?trans1;
MOV R18, 0x1 ?trans2;
@!P2 SEL R17, R16, 0x63400000, !P3 ?trans1;
@!P0 DMUL R2, R6, 8.98846567431157953865e+307 &wr=0x0 ?trans2;
MUFU.RCP64H R19, R3 &req={0} &wr=0x0 ?trans1;
@!P0 LOP3.LUT R22, R3, 0x7ff00000, RZ, 0xc0, !PT ?WAIT2_END_GROUP;
@!P2 LOP3.LUT R17, R17, 0x80000000, R9, 0xf8, !PT ?trans2;
IADD3 R26, PT, PT, R22, -0x1, RZ ?trans2;
@!P2 LOP3.LUT R25, R17, 0x100000, RZ, 0xfc, !PT ?WAIT15_END_GROUP;
NOP ?WAIT10_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P2 DFMA R14, R14, 2, -R24 &wr=0x1 ?trans2;
@!P2 LOP3.LUT R23, R15, 0x7ff00000, RZ, 0xc0, !PT &req={1} ?WAIT4_END_GROUP;
IADD3 R17, PT, PT, R23, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R17, 0x7feffffe, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R26, 0x7feffffe, P0 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R18, -R2, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R20, R20, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R18, R20, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R20, -R2, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R20, R18, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R20, R18, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R24, R20, -R2, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R18, R24, R20 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0x1280 &req={1,0} ?trans5;
LOP3.LUT R20, R7, 0x7ff00000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R8, PT, PT, R13.reuse, -R20.reuse, RZ ?trans1;
ISETP.GE.U32.AND P0, PT, R13, R20, PT ?WAIT4_END_GROUP;
VIMNMX.S32 R8, R8, -0x46a00000, !PT ?trans1;
SEL R13, R16, 0x63400000, !P0 ?WAIT4_END_GROUP;
VIMNMX.S32 R8, R8, 0x46a00000, PT ?WAIT5_END_GROUP;
IADD3 R13, PT, PT, -R13, R8, RZ ?trans1;
MOV R8, RZ ?WAIT3_END_GROUP;
IADD3 R9, PT, PT, R13, 0x7fe00000, RZ ?WAIT6_END_GROUP;
DMUL R16, R18, R8 &wr=0x0 ?trans2;
FSETP.GTU.AND P0, PT, |R17|, 1.469367938527859385e-39, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x13c0 ?trans5;
DFMA R2, R18, -R2, R14 &wr=0x0 ?trans1;
MOV R8, RZ ?trans1;
FSETP.NEU.AND P0, PT, R3.reuse, RZ, PT &req={0} ?trans1;
LOP3.LUT R7, R3, 0x80000000, R7, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R9, R7, R9, RZ, 0xfc, !PT ?WAIT8_END_GROUP;
@!P0 BRA 0x13c0 ?trans5;
IADD3 R3, PT, PT, -R13.reuse, RZ, RZ ?trans1;
MOV R2, RZ ?trans1;
IADD3 R13, PT, PT, -R13, -0x43300000, RZ ?trans1;
DMUL.RP R8, R18, R8 &wr=0x0 ?trans2;
LOP3.LUT R7, R9, R7, RZ, 0x3c, !PT &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R16, -R2, R18 &wr=0x0 ?trans2;
FSETP.NEU.AND P0, PT, |R3|, R13, PT &req={0} ?WAIT5_END_GROUP;
FSEL R16, R8, R16, !P0 ?trans1;
FSEL R17, R7, R17, !P0 ?trans1;
BRA 0x13c0 ?trans6;
DSETP.NAN.AND P0, PT, R8, R8, PT &wr=0x0 ?trans2;
@P0 BRA 0x13a0 &req={0} ?trans5;
DSETP.NAN.AND P0, PT, R6, R6, PT &wr=0x0 ?trans2;
@P0 BRA 0x1370 &req={0} ?trans5;
ISETP.NE.AND P0, PT, R23, R22, PT ?trans1;
MOV.64 R16, 0xfff8000000000000 ?WAIT12_END_GROUP;
@!P0 BRA 0x13c0 ?trans5;
ISETP.NE.AND P0, PT, R23, 0x7ff00000, PT ?trans1;
LOP3.LUT R17, R9, 0x80000000, R7, 0x48, !PT ?WAIT4_END_GROUP;
ISETP.EQ.OR P0, PT, R22, RZ, !P0 ?WAIT13_END_GROUP;
@P0 LOP3.LUT R2, R17, 0x7ff00000, RZ, 0xfc, !PT ?trans1;
@!P0 MOV R16, RZ ?trans1;
@P0 MOV R16, RZ ?WAIT3_END_GROUP;
@P0 MOV R17, R2 ?trans1;
BRA 0x13c0 ?trans6;
LOP3.LUT R17, R7, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R16, R6 ?trans1;
BRA 0x13c0 ?trans6;
LOP3.LUT R17, R9, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R16, R8 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
HFMA2 R13, -RZ, RZ, 0, 0 ?trans1;
MOV R2, R16 ?trans1;
MOV R3, R17 ?trans2;
RET.REL.NODEC R12 0x0 ?trans5;
BRA 0x1410;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: evolvegpu(double*, double*, double*, double*, int, double, double, double)
_Z9evolvegpuPdS_S_S_iddd:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x4c
s_load_b32 s13, s[0:1], 0x20
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mul_i32 s15, s13, s13
v_cmp_lt_i32_e32 vcc_lo, -1, v1
v_cmp_gt_i32_e64 s2, s15, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, vcc_lo, s2
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB1_10
s_ashr_i32 s2, s13, 31
v_ashrrev_i32_e32 v3, 31, v1
s_add_i32 s3, s13, s2
s_load_b256 s[4:11], s[0:1], 0x0
s_xor_b32 s3, s3, s2
s_mov_b32 s12, exec_lo
v_cvt_f32_u32_e32 v0, s3
s_sub_i32 s2, 0, s3
v_add_nc_u32_e32 v4, v1, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v0, v0
v_xor_b32_e32 v4, v4, v3
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_u32_f32_e32 v0, v0
v_mul_lo_u32 v2, s2, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v2, v0, v2
v_add_nc_u32_e32 v0, v0, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v2, v4, v0
v_mul_lo_u32 v2, v2, s3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v2, v4, v2
v_subrev_nc_u32_e32 v4, s3, v2
v_cmp_le_u32_e32 vcc_lo, s3, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v2, v2, v4, vcc_lo
v_subrev_nc_u32_e32 v4, s3, v2
v_cmp_le_u32_e32 vcc_lo, s3, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v2, v2, v4, vcc_lo
v_xor_b32_e32 v2, v2, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v2, v2, v3
v_cmp_eq_u32_e64 s2, 0, v2
v_cmpx_ne_u32_e32 0, v2
s_cbranch_execz .LBB1_7
v_add_nc_u32_e32 v2, 1, v1
s_mov_b32 s16, -1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_add_nc_u32_e32 v2, v2, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v2, v2, v3
v_mul_hi_u32 v0, v2, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v0, v0, s3
v_sub_nc_u32_e32 v0, v2, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v2, s3, v0
v_cmp_le_u32_e32 vcc_lo, s3, v0
v_cndmask_b32_e32 v0, v0, v2, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_subrev_nc_u32_e32 v2, s3, v0
v_cmp_le_u32_e32 vcc_lo, s3, v0
v_cmp_gt_i32_e64 s3, s13, v1
v_cndmask_b32_e32 v0, v0, v2, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v0, v0, v3
v_sub_nc_u32_e32 v0, v0, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_eq_u32_e32 vcc_lo, 0, v0
s_or_b32 s3, s3, vcc_lo
s_xor_b32 s17, s3, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s14, s17
s_cbranch_execz .LBB1_6
s_sub_i32 s15, s15, s13
s_delay_alu instid0(SALU_CYCLE_1)
v_cmp_gt_i32_e32 vcc_lo, s15, v1
s_and_saveexec_b32 s15, vcc_lo
s_cbranch_execz .LBB1_5
v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v11, s13, v1
v_subrev_nc_u32_e32 v13, s13, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[7:8], 3, v[1:2]
v_ashrrev_i32_e32 v12, 31, v11
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v14, 31, v13
v_lshlrev_b64 v[11:12], 3, v[11:12]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
v_add_co_u32 v3, vcc_lo, s6, v7
v_add_co_ci_u32_e32 v4, vcc_lo, s7, v8, vcc_lo
v_lshlrev_b64 v[13:14], 3, v[13:14]
v_add_co_u32 v11, vcc_lo, s6, v11
s_clause 0x1
global_load_b64 v[9:10], v[3:4], off offset:8
global_load_b128 v[3:6], v[3:4], off offset:-8
v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
v_add_co_u32 v13, vcc_lo, s6, v13
v_add_co_ci_u32_e32 v14, vcc_lo, s7, v14, vcc_lo
global_load_b64 v[11:12], v[11:12], off
v_add_co_u32 v15, vcc_lo, s8, v7
global_load_b64 v[13:14], v[13:14], off
s_clause 0x1
s_load_b128 s[16:19], s[0:1], 0x28
s_load_b64 s[0:1], s[0:1], 0x38
v_add_co_ci_u32_e32 v16, vcc_lo, s9, v8, vcc_lo
v_add_co_u32 v7, vcc_lo, s10, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s11, v8, vcc_lo
global_load_b64 v[15:16], v[15:16], off
global_load_b64 v[7:8], v[7:8], off
s_waitcnt lgkmcnt(0)
v_cvt_f32_f64_e32 v0, s[0:1]
s_mov_b32 s0, 0x9999999a
s_mov_b32 s1, 0x3fb99999
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v0, 0xbfb8aa3b, v0
v_exp_f32_e32 v0, v0
s_waitcnt vmcnt(4)
v_add_f64 v[3:4], v[3:4], v[9:10]
v_mul_f64 v[9:10], s[16:17], s[16:17]
s_xor_b32 s16, exec_lo, -1
s_waitcnt vmcnt(3)
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_f64 v[3:4], v[3:4], v[11:12]
s_waitcnt vmcnt(2)
v_add_f64 v[3:4], v[3:4], v[13:14]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_fma_f64 v[3:4], v[5:6], -4.0, v[3:4]
s_waitcnt vmcnt(1)
v_fma_f64 v[5:6], v[5:6], 2.0, -v[15:16]
v_div_scale_f64 v[11:12], null, v[9:10], v[9:10], v[3:4]
v_div_scale_f64 v[19:20], vcc_lo, v[3:4], v[9:10], v[3:4]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f64_e32 v[13:14], v[11:12]
s_waitcnt_depctr 0xfff
v_fma_f64 v[17:18], -v[11:12], v[13:14], 1.0
v_fma_f64 v[13:14], v[13:14], v[17:18], v[13:14]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[17:18], -v[11:12], v[13:14], 1.0
v_fma_f64 v[13:14], v[13:14], v[17:18], v[13:14]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[17:18], v[19:20], v[13:14]
v_fma_f64 v[11:12], -v[11:12], v[17:18], v[19:20]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_div_fmas_f64 v[11:12], v[11:12], v[13:14], v[17:18]
v_mul_f64 v[13:14], s[18:19], s[18:19]
v_div_fixup_f64 v[3:4], v[11:12], v[9:10], v[3:4]
v_cvt_f64_f32_e32 v[9:10], v0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_f64 v[11:12], v[13:14], s[0:1]
s_waitcnt vmcnt(0)
v_fma_f64 v[3:4], v[7:8], v[9:10], v[3:4]
s_delay_alu instid0(VALU_DEP_1)
v_fma_f64 v[3:4], v[11:12], v[3:4], v[5:6]
.LBB1_5:
s_or_b32 exec_lo, exec_lo, s15
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
s_and_not1_b32 s0, s3, exec_lo
s_and_b32 s1, s16, exec_lo
s_or_b32 s3, s0, s1
.LBB1_6:
s_or_b32 exec_lo, exec_lo, s14
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
s_and_not1_b32 s0, s2, exec_lo
s_and_b32 s1, s3, exec_lo
s_or_b32 s2, s0, s1
.LBB1_7:
s_or_b32 exec_lo, exec_lo, s12
s_delay_alu instid0(VALU_DEP_2)
s_and_saveexec_b32 s0, s2
v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v2, 0
v_mov_b32_e32 v4, 0
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 3, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
global_store_b64 v[0:1], v[3:4], off
.LBB1_10:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| evolvegpu | 6,647 | 4,148 | stackv2-00000-of-00015 |
// Demangled: mylog(double*)
Function : _Z5mylogPd
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_TID.X &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R2, R5, 0x8, R2 &req={1} ?WAIT5_END_GROUP;
LDG.E.64 R4, desc[UR4][R2.64] &req={2} &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0xb80 ?trans1;
MOV R9, 0xfffffc01 ?trans1;
ISETP.GT.AND P0, PT, R5, 0xfffff, PT &req={2} ?trans1;
MOV.64 R6, R4 ?trans2;
MOV R0, R5 ?WAIT10_END_GROUP;
@!P0 DMUL R6, R6, 1.80143985094819840000e+16 &wr=0x1 ?trans1;
@!P0 MOV R9, 0xfffffbcb ?trans1;
@!P0 MOV R0, R7 &req={1} ?trans1;
@!P0 MOV R4, R6 ?WAIT4_END_GROUP;
IADD3 R5, PT, PT, R0, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R5, 0x7feffffe, PT ?WAIT13_END_GROUP;
@P1 BRA 0xb20 &req={0} ?trans5;
LOP3.LUT R5, R0.reuse, 0xfffff, RZ, 0xc0, !PT ?trans1;
UMOV.64 UR6, 0x4330000080000000 ?trans1;
LEA.HI R0, R0, R9, RZ, 0xc ?trans2;
LOP3.LUT R5, R5, 0x3ff00000, RZ, 0xfc, !PT ?trans1;
MOV R6, RZ ?WAIT4_END_GROUP;
ISETP.GE.U32.AND P0, PT, R5, 0x3ff6a09f, PT ?WAIT13_END_GROUP;
@P0 IADD3 R7, PT, PT, R5, -0x100000, RZ ?trans2;
@P0 IADD3 R0, PT, PT, R0, 0x1, RZ ?WAIT3_END_GROUP;
@P0 MOV R5, R7 ?WAIT6_END_GROUP;
DADD R14, R4, 1 &wr=0x0 ?trans2;
MUFU.RCP64H R7, R15 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, R4, -1 &rd=0x1 ?trans2;
LOP3.LUT R4, R0, 0x80000000, RZ, 0x3c, !PT &req={1} ?trans1;
MOV R5, 0x43300000 ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, -R14, R6, 1 &req={0} &rd=0x0 &wr=0x1 ?trans2;
MOV.64 R14, 0x3ed0ee258b7a8b04 &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R8, R8 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R4, R4, -UR6 ?trans1;
UMOV.64 UR6, 0x3fe62e42fefa39ef ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R6, R8, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R12, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R12, R16, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R4, UR6, R8 &req={0} ?trans1;
UMOV.64 UR6, 0x3eb1380b3ae80f1e ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R8, R8 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R10, UR6, R14 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3fe62e42fefa39ef ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R4, -UR6, R6 ?trans1;
UMOV.64 UR6, 0x3ef3b2669f02676f ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R10, R14, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3f1745cba9ab0956 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R10, R14, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3f3c71c72d1b5154 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R10, R14, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3f624924923be72d ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R10, R14, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3f8999999999a3c4 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R10, R14, UR6 &req={0} ?trans1;
UMOV.64 UR6, 0x3fb5555555555554 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R12, -R8 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R12, -R8, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R10, R14, UR6 &wr=0x1 ?trans1;
UMOV.64 UR6, 0x3c7abc9e3b39803f ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R18, R16, R18 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R10, R14 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, -R8, R20 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R8, R14, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R14, R14, -R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R4, UR6, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R6, R6, R14 &req={0} &rd=0x0 &wr=0x1 ?trans2;
BRA 0xb70 &req={1,0} ?trans5;
MOV.64 R4, 0x7ff0000000000000 ?WAIT3_END_GROUP;
LOP3.LUT P0, RZ, R7, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
DFMA R6, R6, R4, +INF &wr=0x0 ?trans2;
FSEL R6, R6, RZ, P0 &req={0} ?trans1;
FSEL R7, R7, -QNAN , P0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
STG.E.64 desc[UR4][R2.64], R6 ?trans1;
EXIT ?trans5;
BRA 0xba0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: mylog(double*)
_Z5mylogPd:
s_load_b64 s[0:1], s[0:1], 0x0
v_lshlrev_b32_e32 v20, 3, v0
s_mov_b32 s3, 0x3fe55555
s_mov_b32 s2, 0x55555555
s_mov_b32 s4, 0x6b47b09a
s_mov_b32 s6, 0xbf559e2b
s_mov_b32 s5, 0x3fc38538
s_mov_b32 s7, 0x3fc3ab76
s_waitcnt lgkmcnt(0)
global_load_b64 v[0:1], v20, s[0:1]
s_waitcnt vmcnt(0)
v_frexp_mant_f64_e32 v[2:3], v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[2:3]
s_mov_b32 s2, 0x55555780
v_cndmask_b32_e64 v4, 0, 1, vcc_lo
v_ldexp_f64 v[2:3], v[2:3], v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_f64 v[4:5], v[2:3], 1.0
v_add_f64 v[10:11], v[2:3], -1.0
v_rcp_f64_e32 v[6:7], v[4:5]
v_add_f64 v[12:13], v[4:5], -1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_add_f64 v[2:3], v[2:3], -v[12:13]
s_waitcnt_depctr 0xfff
v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
v_fma_f64 v[6:7], v[8:9], v[6:7], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
v_fma_f64 v[6:7], v[8:9], v[6:7], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[8:9], v[10:11], v[6:7]
v_mul_f64 v[14:15], v[4:5], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[4:5], v[8:9], v[4:5], -v[14:15]
v_fma_f64 v[2:3], v[8:9], v[2:3], v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[4:5], v[14:15], v[2:3]
v_add_f64 v[12:13], v[10:11], -v[4:5]
v_add_f64 v[14:15], v[4:5], -v[14:15]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[10:11], v[10:11], -v[12:13]
v_add_f64 v[2:3], v[14:15], -v[2:3]
v_frexp_exp_i32_f64_e32 v14, v[0:1]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[4:5], v[10:11], -v[4:5]
v_add_f64 v[2:3], v[2:3], v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[2:3], v[12:13], v[2:3]
v_mul_f64 v[2:3], v[6:7], v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[4:5], v[8:9], v[2:3]
v_mul_f64 v[6:7], v[4:5], v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_fma_f64 v[10:11], v[6:7], s[6:7], s[4:5]
s_mov_b32 s4, 0xd7f4df2e
s_mov_b32 s5, 0x3fc7474d
v_mul_f64 v[12:13], v[4:5], v[6:7]
v_fma_f64 v[10:11], v[6:7], v[10:11], s[4:5]
s_mov_b32 s4, 0x16291751
s_mov_b32 s5, 0x3fcc71c0
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_fma_f64 v[10:11], v[6:7], v[10:11], s[4:5]
s_mov_b32 s4, 0x9b27acf1
s_mov_b32 s5, 0x3fd24924
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_fma_f64 v[10:11], v[6:7], v[10:11], s[4:5]
s_mov_b32 s4, 0x998ef7b6
s_mov_b32 s5, 0x3fd99999
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_fma_f64 v[10:11], v[6:7], v[10:11], s[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
v_fma_f64 v[6:7], v[6:7], v[10:11], s[2:3]
v_ldexp_f64 v[10:11], v[4:5], 1
v_add_f64 v[4:5], v[4:5], -v[8:9]
s_mov_b32 s2, 0xfefa39ef
s_mov_b32 s3, 0x3fe62e42
v_mul_f64 v[6:7], v[12:13], v[6:7]
v_subrev_co_ci_u32_e32 v12, vcc_lo, 0, v14, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_f64 v[2:3], v[2:3], -v[4:5]
v_cmp_class_f64_e64 vcc_lo, v[0:1], 0x204
v_cvt_f64_i32_e32 v[12:13], v12
v_add_f64 v[8:9], v[10:11], v[6:7]
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_ldexp_f64 v[2:3], v[2:3], 1
v_mul_f64 v[14:15], v[12:13], s[2:3]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[4:5], v[8:9], -v[10:11]
v_fma_f64 v[10:11], v[12:13], s[2:3], -v[14:15]
s_mov_b32 s2, 0x3b39803f
s_mov_b32 s3, 0x3c7abc9e
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[4:5], v[6:7], -v[4:5]
v_fma_f64 v[6:7], v[12:13], s[2:3], v[10:11]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[2:3], v[2:3], v[4:5]
v_add_f64 v[4:5], v[14:15], v[6:7]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[10:11], v[8:9], v[2:3]
v_add_f64 v[14:15], v[4:5], -v[14:15]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_f64 v[12:13], v[4:5], v[10:11]
v_add_f64 v[8:9], v[10:11], -v[8:9]
v_add_f64 v[6:7], v[6:7], -v[14:15]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[16:17], v[12:13], -v[4:5]
v_add_f64 v[2:3], v[2:3], -v[8:9]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_f64 v[18:19], v[12:13], -v[16:17]
v_add_f64 v[8:9], v[10:11], -v[16:17]
v_add_f64 v[10:11], v[6:7], v[2:3]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[4:5], v[4:5], -v[18:19]
v_add_f64 v[4:5], v[8:9], v[4:5]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[8:9], v[10:11], -v[6:7]
v_add_f64 v[4:5], v[10:11], v[4:5]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_f64 v[10:11], v[10:11], -v[8:9]
v_add_f64 v[2:3], v[2:3], -v[8:9]
v_add_f64 v[14:15], v[12:13], v[4:5]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[6:7], v[6:7], -v[10:11]
v_add_f64 v[8:9], v[14:15], -v[12:13]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[2:3], v[2:3], v[6:7]
v_add_f64 v[4:5], v[4:5], -v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[2:3], v[2:3], v[4:5]
v_add_f64 v[2:3], v[14:15], v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_dual_cndmask_b32 v3, v3, v1 :: v_dual_cndmask_b32 v2, v2, v0
v_cmp_ngt_f64_e32 vcc_lo, 0, v[0:1]
v_cndmask_b32_e32 v3, 0x7ff80000, v3, vcc_lo
v_cmp_nge_f64_e32 vcc_lo, 0, v[0:1]
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_cndmask_b32_e32 v2, 0, v2, vcc_lo
v_cmp_neq_f64_e32 vcc_lo, 0, v[0:1]
v_cndmask_b32_e32 v3, 0xfff00000, v3, vcc_lo
global_store_b64 v20, v[2:3], s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| mylog | 3,019 | 3,759 | stackv2-00000-of-00015 |
// Demangled: adicionarKernel(double*, double const*)
Function : _Z15adicionarKernelPdPKd
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R2, R0, 0x8, R2 &req={1} ?WAIT6_END_GROUP;
LDG.E.64 R2, desc[UR4][R2.64] &req={2} &wr=0x2 ?trans1;
MOV.64 R10, 0x3fd8000000000000 ?trans2;
BSSY.RECONVERGENT B0, 0x3b0 ?trans1;
DFMA R4, R2, 4, RZ &req={2} &wr=0x1 ?trans2;
MUFU.RSQ64H R7, R5 &req={1} &wr=0x1 ?trans1;
IADD3 R6, PT, PT, R5, -0x3500000, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R6, 0x7ca00000, PT ?WAIT15_END_GROUP;
NOP ?WAIT11_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R6, R6 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R4, -R8, 1 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R8, R10, 0.5 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R6, R8 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R10, R8, R6 &req={1} &wr=0x1 ?trans2;
IADD3 R15, PT, PT, R9, -0x100000, RZ &req={1} ?trans1;
MOV R14, R8 ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R4, R8 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, -R10, R4 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R12, R14, R10 &req={1} &rd=0x1 &wr=0x2 ?trans2;
@!P0 BRA 0x3a0 &req={2,1,0} ?trans5;
MOV R2, 0x380 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x400 ?trans5;
MOV R2, R6 ?trans1;
MOV R3, R7 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans1;
DMUL R2, R2, 0.5 &wr=0x1 ?trans1;
IMAD.WIDE.U32 R4, R0, 0x8, R4 &req={0} ?WAIT5_END_GROUP;
STG.E.64 desc[UR4][R4.64], R2 &req={1} ?trans1;
EXIT ?trans5;
ISETP.GE.U32.AND P1, PT, R6, -0x3400000, PT ?trans1;
MOV R9, R15 ?trans1;
BSSY.RECONVERGENT B1, 0x8a0 ?trans11;
@P1 DFMA.RM R8, R12, R8, R10 &wr=0x0 ?trans2;
@P1 IADD.64 R6, R8, 0x1 &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@P1 DFMA.RP R10, -R8, R6, R4 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@P1 DSETP.GT.AND P0, PT, R10, RZ, PT &req={0} &wr=0x0 ?trans2;
@P1 FSEL R6, R6, R8, P0 &req={0} ?trans1;
@P1 FSEL R7, R7, R9, P0 ?trans1;
@P1 BRA 0x890 ?trans6;
DSETP.NE.AND P0, PT, R4, RZ, PT &wr=0x0 ?trans2;
@!P0 BRA 0x880 &req={0} ?trans5;
ISETP.GE.AND P0, PT, R5, RZ, PT ?WAIT13_END_GROUP;
@!P0 MOV.64 R6, 0xfff8000000000000 ?trans2;
@!P0 BRA 0x890 ?trans6;
ISETP.GT.AND P0, PT, R5, 0x7fefffff, PT ?WAIT13_END_GROUP;
@P0 BRA 0x880 ?trans5;
DMUL R4, R4, 8.11296384146066816958e+31 &wr=0x0 ?trans1;
MOV R6, RZ ?trans1;
MUFU.RSQ64H R7, R5 &req={0} &wr=0x0 ?trans1;
MOV.64 R10, 0x3fd8000000000000 ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R6, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R4, -R8, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R8, R10, 0.5 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R6, R8 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R10, R8, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R6, R4, R8 &req={0} &rd=0x0 &wr=0x1 ?trans2;
IADD3 R9, PT, PT, R9, -0x100000, RZ &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R6, -R6, R4 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R8, R10, R6 &req={0} &wr=0x0 ?trans2;
IADD3 R7, PT, PT, R7, -0x3500000, RZ &req={0} ?trans1;
BRA 0x890 ?trans6;
DADD R6, R4, R4 &rd=0x0 &wr=0x1 ?trans2;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R3, 0x0 ?WAIT4_END_GROUP;
RET.REL.NODEC R2 0x0 &req={1,0} ?trans5;
BRA 0x8c0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: adicionarKernel(double*, double const*)
_Z15adicionarKernelPdPKd:
s_load_b128 s[0:3], s[0:1], 0x0
v_lshlrev_b32_e32 v8, 3, v0
s_waitcnt lgkmcnt(0)
global_load_b64 v[0:1], v8, s[2:3]
s_waitcnt vmcnt(0)
v_fma_f64 v[0:1], v[0:1], 4.0, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[0:1]
v_cndmask_b32_e64 v2, 0, 1, vcc_lo
v_lshlrev_b32_e32 v2, 8, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ldexp_f64 v[0:1], v[0:1], v2
v_rsq_f64_e32 v[2:3], v[0:1]
s_waitcnt_depctr 0xfff
v_mul_f64 v[4:5], v[0:1], v[2:3]
v_mul_f64 v[2:3], v[2:3], 0.5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[6:7], -v[2:3], v[4:5], 0.5
v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
v_fma_f64 v[2:3], v[2:3], v[6:7], v[2:3]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[6:7], -v[4:5], v[4:5], v[0:1]
v_fma_f64 v[4:5], v[6:7], v[2:3], v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[6:7], -v[4:5], v[4:5], v[0:1]
v_fma_f64 v[2:3], v[6:7], v[2:3], v[4:5]
v_cndmask_b32_e64 v4, 0, 0xffffff80, vcc_lo
v_cmp_class_f64_e64 vcc_lo, v[0:1], 0x260
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ldexp_f64 v[2:3], v[2:3], v4
v_dual_cndmask_b32 v1, v3, v1 :: v_dual_cndmask_b32 v0, v2, v0
s_delay_alu instid0(VALU_DEP_1)
v_mul_f64 v[0:1], v[0:1], 0.5
global_store_b64 v8, v[0:1], s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| adicionarKernel | 2,384 | 888 | stackv2-00000-of-00015 |
// Demangled: inputKernel(float*, int)
Function : _Z11inputKernelPfi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x388] &wr=0x2 ?trans1;
S2R R5, SR_TID.Y &wr=0x3 ?trans6;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans8;
S2UR UR5, SR_CTAID.Y &wr=0x3 ?trans8;
LDC R2, c[0x0][0x364] &wr=0x3 ?trans1;
IMAD R0, R0, UR4, R3 &req={1} ?WAIT2_END_GROUP;
IMAD R3, R2, UR5, R5 &req={3} ?WAIT4_END_GROUP;
IMAD R5, R3, 0xa, R0 ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR6, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
I2FP.F32.S32 R5, R5 ?WAIT5_END_GROUP;
FADD R5, R0, R5 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R5 ?trans1;
EXIT ?trans5;
BRA 0x150;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: inputKernel(float*, int)
_Z11inputKernelPfi:
s_load_b32 s2, s[0:1], 0x1c
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_and_b32 s2, s2, 0xffff
v_mad_u64_u32 v[2:3], null, s15, s3, v[1:2]
s_load_b32 s3, s[0:1], 0x8
s_mul_i32 s14, s14, s2
s_mov_b32 s2, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v1, v2, 10
v_add3_u32 v0, s14, v0, v1
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s3, v0
s_cbranch_execz .LBB0_2
s_load_b64 s[0:1], s[0:1], 0x0
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[1:2], 2, v[0:1]
v_cvt_f32_i32_e32 v0, v0
s_waitcnt lgkmcnt(0)
v_add_co_u32 v1, vcc_lo, s0, v1
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
global_load_b32 v3, v[1:2], off
s_waitcnt vmcnt(0)
v_add_f32_e32 v0, v3, v0
global_store_b32 v[1:2], v0, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| inputKernel | 552 | 583 | stackv2-00000-of-00015 |
// Demangled: k(s_t*, s_t*)
Function : _Z1kP3s_tS0_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R17, SR_TID.X &wr=0x0 ?trans7;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R4, R17, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
LDG.E.U8 R7, desc[UR4][R4.64] &req={1} &wr=0x3 ?trans4;
LDG.E.U8 R9, desc[UR4][R4.64+0x1] &wr=0x4 ?trans4;
LDG.E.U8 R11, desc[UR4][R4.64+0x2] &wr=0x5 ?trans4;
LDG.E.U8 R13, desc[UR4][R4.64+0x3] &wr=0x5 ?trans4;
LDG.E.U8 R15, desc[UR4][R4.64+0x4] &wr=0x5 ?trans1;
IMAD.WIDE.U32 R2, R17, 0x4, R2 &req={2} ?WAIT5_END_GROUP;
STG.E.U8 desc[UR4][R2.64], R7 &req={3} ?trans4;
STG.E.U8 desc[UR4][R2.64+0x1], R9 &req={4} ?trans4;
STG.E.U8 desc[UR4][R2.64+0x2], R11 &req={5} ?trans4;
STG.E.U8 desc[UR4][R2.64+0x3], R13 ?trans4;
STG.E.U8 desc[UR4][R2.64+0x4], R15 ?trans1;
EXIT ?trans5;
BRA 0x120;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: k(s_t*, s_t*)
_Z1kP3s_tS0_:
s_load_b128 s[0:3], s[0:1], 0x0
v_lshlrev_b32_e32 v0, 2, v0
s_waitcnt lgkmcnt(0)
global_load_b32 v1, v0, s[0:1]
s_waitcnt vmcnt(0)
global_store_b32 v0, v1, s[2:3]
global_load_u8 v1, v0, s[0:1] offset:4
s_waitcnt vmcnt(0)
global_store_b8 v0, v1, s[2:3] offset:4
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| k | 586 | 177 | stackv2-00000-of-00015 |
// Demangled: boxsum_stage1(int, int*)
Function : _Z13boxsum_stage1iPi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R8, SR_TID.X &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x380] &wr=0x2 ?trans6;
LDC R0, c[0x0][0x370] &wr=0x3 ?trans1;
S2R R9, SR_CTAID.X &wr=0x1 ?trans2;
IMAD R2, R9, 0x80, R8 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R2, UR6, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={3,0} ?trans5;
IMAD.SHL.U32 R0, R0, 0x80, RZ ?trans1;
MOV R13, R2 ?trans1;
HFMA2 R2, -RZ, RZ, 0, 0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans1;
I2F.U32.RP R7, R0 &wr=0x1 ?trans1;
IADD3 R11, PT, PT, RZ, -R0, RZ ?trans2;
IADD3 R4, PT, PT, R0.reuse, R13, RZ ?trans1;
ISETP.NE.U32.AND P2, PT, R0, RZ, PT ?trans1;
BSSY.RECONVERGENT B0, 0x350 ?trans3;
ISETP.GE.AND P0, PT, R4.reuse, UR6, PT ?trans1;
VIMNMX.S32 R5, R4, UR6, !PT ?WAIT4_END_GROUP;
SEL R6, RZ, 0x1, P0 ?trans1;
MUFU.RCP R7, R7 &req={1} &wr=0x1 ?trans4;
IADD3 R5, PT, PT, R5, -R4, -R6 ?trans2;
IADD3 R3, PT, PT, R7, 0xffffffe, RZ &req={1} ?WAIT6_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R3, R3 &wr=0x1 ?trans2;
IMAD R11, R11, R3, RZ &req={1} ?WAIT4_END_GROUP;
IMAD.HI.U32 R2, R3, R11, R2 ?WAIT6_END_GROUP;
IMAD.HI.U32 R7, R2, R5, RZ ?WAIT5_END_GROUP;
IADD3 R2, PT, PT, -R7, RZ, RZ ?WAIT5_END_GROUP;
IMAD R5, R0, R2, R5 ?trans2;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans3;
ISETP.GE.U32.AND P0, PT, R5, R0, PT ?WAIT13_END_GROUP;
@P0 IADD3 R5, PT, PT, -R0, R5, RZ ?trans2;
@P0 IADD3 R7, PT, PT, R7, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R5, R0, PT ?WAIT13_END_GROUP;
@P1 IADD3 R7, PT, PT, R7, 0x1, RZ ?trans2;
@!P2 LOP3.LUT R7, RZ, R0, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R6, PT, PT, R6, R7, RZ ?WAIT4_END_GROUP;
IADD3 R4, PT, PT, R6.reuse, 0x1, RZ ?trans1;
ISETP.GE.U32.AND P1, PT, R6, 0x3, PT ?WAIT3_END_GROUP;
LOP3.LUT P0, R7, R4, 0x3, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x340 &req={1,0} ?trans5;
LDCU.64 UR8, c[0x0][0x388] &wr=0x0 ?trans1;
IMAD.WIDE.U32 R4, R8, 0x4, RZ ?trans1;
IADD3 R6, PT, PT, -R7, RZ, RZ ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R4, R9, 0x200, R4 ?WAIT5_END_GROUP;
IADD.64 R4, R4, UR8 &req={0} ?WAIT8_END_GROUP;
IADD3 R6, PT, PT, R6, 0x1, RZ ?trans1;
STG.E desc[UR4][R4.64], RZ &rd=0x0 ?trans1;
IADD3 R13, PT, PT, R0, R13, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R6, RZ, PT ?trans1;
IMAD.WIDE.U32 R4, R0, 0x4, R4 &req={0} ?WAIT12_END_GROUP;
@P0 BRA 0x2e0 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
@!P1 EXIT ?trans5;
IADD3 R7, PT, PT, R0, R13, RZ ?trans1;
IMAD.WIDE.U32 R4, R13, 0x4, R2 ?WAIT3_END_GROUP;
IADD3 R9, PT, PT, R0.reuse, R7, RZ ?trans1;
IMAD.WIDE.U32 R6, R7, 0x4, R2.reuse ?trans1;
STG.E desc[UR4][R4.64], RZ &rd=0x0 ?trans2;
IADD3 R15, PT, PT, R0.reuse, R9, RZ ?trans1;
IMAD.WIDE.U32 R8, R9, 0x4, R2.reuse ?trans1;
STG.E desc[UR4][R6.64], RZ &rd=0x0 ?trans3;
IMAD.WIDE.U32 R10, R15, 0x4, R2 ?trans1;
STG.E desc[UR4][R8.64], RZ &rd=0x0 ?trans1;
IADD3 R13, PT, PT, R0, R15, RZ ?WAIT3_END_GROUP;
STG.E desc[UR4][R10.64], RZ &rd=0x0 ?trans2;
ISETP.GE.AND P0, PT, R13, UR6, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x360 &req={0} ?trans5;
EXIT ?trans5;
BRA 0x450;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: boxsum_stage1(int, int*)
_ZL13boxsum_stage1iPi:
s_load_b32 s6, s[0:1], 0x0
s_lshl_b32 s2, s15, 7
s_mov_b32 s3, exec_lo
v_add_nc_u32_e32 v2, s2, v0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s6, v2
s_cbranch_execz .LBB0_3
s_clause 0x1
s_load_b32 s3, s[0:1], 0x10
s_load_b64 s[0:1], s[0:1], 0x8
s_ashr_i32 s4, s2, 31
v_add_co_u32 v0, s2, s2, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e64 v1, null, s4, 0, s2
v_mov_b32_e32 v3, 0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_waitcnt lgkmcnt(0)
s_lshl_b32 s2, s3, 7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_ashr_i32 s3, s2, 31
s_mov_b32 s1, 0
s_lshl_b64 s[4:5], s[2:3], 2
.LBB0_2:
v_add_nc_u32_e32 v2, s2, v2
global_store_b32 v[0:1], v3, off
v_add_co_u32 v0, s0, v0, s4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_add_co_ci_u32_e64 v1, s0, s5, v1, s0
v_cmp_le_i32_e32 vcc_lo, s6, v2
s_or_b32 s1, vcc_lo, s1
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execnz .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| boxsum_stage1 | 1,754 | 675 | stackv2-00000-of-00015 |
// Demangled: boxsum_stage2(int, int*, int*, int*)
Function : _Z13boxsum_stage2iPiS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R17, c[0x0][0x380] &wr=0x2 ?trans8;
LDC R13, c[0x0][0x370] &wr=0x3 ?trans1;
USHF.L.U32 UR4, UR4, 0x7, URZ &req={1} ?WAIT6_END_GROUP;
ISETP.LE.AND P0, PT, R17, UR4, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={3,0} ?trans5;
IMAD.SHL.U32 R0, R13, 0x80, RZ ?trans1;
S2R R12, SR_TID.X &wr=0x0 ?trans1;
S2UR UR6, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR5, 0x400 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x2 ?trans1;
VIMNMX.U32 R7, R0, 0x1, !PT ?trans1;
BSSY.RECONVERGENT B0, 0x610 ?trans1;
LDCU.64 UR10, c[0x0][0x388] &wr=0x3 ?trans2;
I2F.U32.RP R8, R7 &wr=0x4 ?trans1;
IADD3 R9, PT, PT, RZ, -R7, RZ ?trans1;
ISETP.NE.U32.AND P2, PT, R7, RZ, PT ?trans1;
LDCU UR14, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU UR7, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR12, c[0x0][0x390] &wr=0x0 ?trans1;
MUFU.RCP R8, R8 &req={4} &wr=0x4 ?trans1;
ULEA UR5, UR6, UR5, 0x18 &req={1} ?trans1;
IADD3 R15, PT, PT, R12, UR4, RZ &req={0} ?WAIT2_END_GROUP;
IADD3 R2, PT, PT, R12, R17, RZ ?trans2;
IADD3 R3, PT, PT, R0, R15, RZ ?trans2;
IADD3 R4, PT, PT, R8, 0xffffffe, RZ &req={4} ?WAIT3_END_GROUP;
ISETP.GE.AND P0, PT, R3, R2, PT ?trans1;
VIMNMX.S32 R6, R2, R3, !PT ?trans1;
F2I.FTZ.U32.TRUNC.NTZ R5, R4 &rd=0x0 &wr=0x1 ?trans3;
SEL R16, RZ, 0x1, P0 ?WAIT5_END_GROUP;
IADD3 R6, PT, PT, R6, -R3, -R16 ?trans1;
HFMA2 R4, -RZ, RZ, 0, 0 &req={0} ?trans2;
IMAD R9, R9, R5, RZ &req={1} ?WAIT4_END_GROUP;
IMAD.HI.U32 R5, R5, R9, R4 ?WAIT6_END_GROUP;
IMAD.HI.U32 R5, R5, R6, RZ ?WAIT5_END_GROUP;
IADD3 R3, PT, PT, -R5, RZ, RZ ?WAIT5_END_GROUP;
IMAD R6, R7, R3, R6 ?trans2;
IMAD R3, R12, 0x4c, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P0, PT, R6, R7, PT ?trans2;
LOP3.LUT R3, R3, 0x1fc, RZ, 0xc0, !PT ?WAIT11_END_GROUP;
@P0 IADD3 R6, PT, PT, -R7, R6, RZ ?trans2;
@P0 IADD3 R5, PT, PT, R5, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R6, R7, PT ?WAIT13_END_GROUP;
@P1 IADD3 R5, PT, PT, R5, 0x1, RZ ?trans2;
@!P2 LOP3.LUT R5, RZ, R7, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R16, PT, PT, R16, R5, RZ ?trans1;
MOV R5, R15 ?WAIT3_END_GROUP;
IADD3 R4, PT, PT, R16, 0x1, RZ ?WAIT4_END_GROUP;
LOP3.LUT P0, R14, R4, 0x3, RZ, 0xc0, !PT ?trans2;
LEA R4, R12, UR5, 0x2 ?WAIT11_END_GROUP;
@!P0 BRA 0x600 &req={3,2} ?trans5;
LDC.64 R6, c[0x0][0x398] &wr=0x0 ?trans1;
IMAD R5, R14.reuse, R13, RZ ?trans1;
IADD3 R17, PT, PT, R17, -UR4, RZ ?trans2;
IADD3 R14, PT, PT, -R14, RZ, RZ ?trans1;
IMAD R5, R5, 0x80, R12 ?trans2;
IMAD.WIDE.U32 R12, R15, 0x4, RZ ?trans1;
LDC.64 R8, c[0x0][0x390] &wr=0x1 ?trans2;
IADD3 R5, PT, PT, R5, UR4, RZ ?WAIT6_END_GROUP;
LDC.64 R10, c[0x0][0x398] &wr=0x2 ?trans2;
ISETP.GE.AND P0, PT, R17, 0x80, PT ?trans1;
IADD3 R14, PT, PT, R14, 0x1, RZ ?trans1;
BSSY.RECONVERGENT B1, 0x5c0 ?trans4;
ISETP.NE.AND P1, PT, R14, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x520 &req={3,0} ?trans6;
IADD.64 R18, R12, UR10 ?WAIT6_END_GROUP;
LDG.E R23, desc[UR8][R18.64] &wr=0x3 ?trans1;
WARPSYNC.ALL ?trans5;
NOP ?trans1;
HFMA2 R27, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
STS [R4], R23 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R21, [R3+UR5] &wr=0x3 ?trans2;
IMAD.WIDE R20, R21, 0x4, R6 &req={3,0} ?WAIT6_END_GROUP;
ATOMG.E.ADD.STRONG.GPU PT, R20, desc[UR8][R20.64], R27 &wr=0x3 ?trans1;
IADD.64 R18, R12, UR12 ?WAIT3_END_GROUP;
STS [R3+UR5+0x200], R20 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R25, [R4+0x200] &wr=0x0 ?trans4;
STG.E desc[UR8][R18.64], R25 &req={0} &rd=0x0 ?trans1;
BRA 0x5b0 ?trans5;
ISETP.GE.AND P0, PT, R15, UR7, PT ?WAIT13_END_GROUP;
@P0 BRA 0x5b0 ?trans5;
IADD.64 R20, R12, UR10 ?WAIT6_END_GROUP;
LDG.E R19, desc[UR8][R20.64] &wr=0x3 ?trans1;
MOV R25, 0x1 ?trans1;
IMAD.WIDE R18, R19, 0x4, R10 &req={3,2} ?WAIT6_END_GROUP;
ATOMG.E.ADD.STRONG.GPU PT, R19, desc[UR8][R18.64], R25 &wr=0x2 ?trans1;
IADD.64 R22, R12, R8 &req={1} ?WAIT6_END_GROUP;
STG.E desc[UR8][R22.64], R19 &req={2} &rd=0x3 ?trans2;
BSYNC.RECONVERGENT B1 ?trans5;
IADD3 R15, PT, PT, R0.reuse, R15, RZ ?trans1;
IMAD.WIDE.U32 R12, R0.reuse, 0x4, R12 ?trans1;
IADD3 R17, PT, PT, -R0, R17, RZ ?trans1;
@P1 BRA 0x3d0 ?trans6;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R6, c[0x0][0x388] &req={0} &wr=0x0 ?trans1;
ISETP.GE.U32.AND P0, PT, R16, 0x3, PT ?WAIT7_END_GROUP;
LDC.64 R8, c[0x0][0x398] &req={1} &wr=0x1 ?trans8;
LDC.64 R10, c[0x0][0x390] &req={2} &wr=0x2 ?trans8;
LDC.64 R12, c[0x0][0x390] &wr=0x4 ?trans8;
LDC.64 R14, c[0x0][0x398] &wr=0x3 ?trans1;
@!P0 EXIT ?trans5;
IADD3 R16, PT, PT, R2, -R5, RZ &req={3,0} ?trans1;
BSSY.RECONVERGENT B0, 0x860 ?trans4;
ISETP.GT.AND P0, PT, R16, 0x7f, PT ?WAIT13_END_GROUP;
@P0 BRA 0x760 ?trans5;
ISETP.GE.AND P0, PT, R5, UR14, PT ?WAIT13_END_GROUP;
@P0 BRA 0x850 ?trans5;
IMAD.WIDE.U32 R16, R5, 0x4, R6 &req={0} ?WAIT6_END_GROUP;
LDG.E R17, desc[UR8][R16.64] &wr=0x5 ?trans1;
HFMA2 R23, -RZ, RZ, 0, 5.9604644775390625e-08 &req={3} ?trans2;
IMAD.WIDE R18, R17, 0x4, R14 &req={5} ?WAIT6_END_GROUP;
ATOMG.E.ADD.STRONG.GPU PT, R19, desc[UR8][R18.64], R23 &wr=0x3 ?trans1;
IMAD.WIDE.U32 R20, R5, 0x4, R12 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR8][R20.64], R19 &req={3} &rd=0x0 ?trans1;
BRA 0x850 ?trans5;
IMAD.WIDE.U32 R18, R5, 0x4, R6 &req={3,0} ?WAIT5_END_GROUP;
LDG.E R21, desc[UR8][R18.64] &wr=0x3 ?trans1;
WARPSYNC.ALL ?trans5;
NOP ?trans1;
MOV R25, 0x1 ?trans1;
STS [R4], R21 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R17, [R3+UR5] &wr=0x0 ?trans2;
IMAD.WIDE R16, R17, 0x4, R8 &req={1,0} ?WAIT6_END_GROUP;
ATOMG.E.ADD.STRONG.GPU PT, R16, desc[UR8][R16.64], R25 &wr=0x3 ?trans1;
IMAD.WIDE.U32 R18, R5, 0x4, R10 &req={2} ?WAIT3_END_GROUP;
STS [R3+UR5+0x200], R16 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R23, [R4+0x200] &wr=0x0 ?trans4;
STG.E desc[UR8][R18.64], R23 &req={0} &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R23, PT, PT, R0, R5, RZ &req={3,0} ?trans1;
BSSY.RECONVERGENT B0, 0xa50 ?trans3;
IADD3 R5, PT, PT, R2, -R23, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, 0x80, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x9b0 ?trans5;
IMAD.WIDE.U32 R16, R23, 0x4, R6 ?WAIT5_END_GROUP;
LDG.E R5, desc[UR8][R16.64] &wr=0x3 ?trans1;
WARPSYNC.ALL ?trans5;
NOP ?trans1;
HFMA2 R25, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
STS [R4], R5 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R19, [R3+UR5] &wr=0x0 ?trans2;
IMAD.WIDE R18, R19, 0x4, R8 &req={1,0} ?WAIT6_END_GROUP;
ATOMG.E.ADD.STRONG.GPU PT, R18, desc[UR8][R18.64], R25 &wr=0x3 ?trans1;
IMAD.WIDE.U32 R16, R23, 0x4, R10 &req={2} ?WAIT3_END_GROUP;
STS [R3+UR5+0x200], R18 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R21, [R4+0x200] &wr=0x0 ?trans4;
STG.E desc[UR8][R16.64], R21 &req={0} &rd=0x3 ?trans1;
BRA 0xa40 ?trans5;
ISETP.GE.AND P0, PT, R23, UR14, PT ?WAIT13_END_GROUP;
@P0 BRA 0xa40 ?trans5;
IMAD.WIDE.U32 R18, R23, 0x4, R6 ?WAIT5_END_GROUP;
LDG.E R17, desc[UR8][R18.64] &wr=0x3 ?trans1;
MOV R5, 0x1 ?trans1;
IMAD.WIDE R16, R17, 0x4, R14 &req={3} ?WAIT6_END_GROUP;
ATOMG.E.ADD.STRONG.GPU PT, R17, desc[UR8][R16.64], R5 &wr=0x3 ?trans1;
IMAD.WIDE.U32 R20, R23, 0x4, R12 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR8][R20.64], R17 &req={3} &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R23, PT, PT, R0, R23, RZ ?trans1;
BSSY.RECONVERGENT B0, 0xc40 ?trans3;
IADD3 R5, PT, PT, R2, -R23, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, 0x80, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xba0 ?trans5;
IMAD.WIDE.U32 R16, R23, 0x4, R6 &req={3,0} ?WAIT5_END_GROUP;
LDG.E R5, desc[UR8][R16.64] &wr=0x3 ?trans1;
WARPSYNC.ALL ?trans5;
NOP ?trans1;
HFMA2 R25, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
STS [R4], R5 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R19, [R3+UR5] &wr=0x0 ?trans2;
IMAD.WIDE R18, R19, 0x4, R8 &req={1,0} ?WAIT6_END_GROUP;
ATOMG.E.ADD.STRONG.GPU PT, R18, desc[UR8][R18.64], R25 &wr=0x3 ?trans1;
IMAD.WIDE.U32 R16, R23, 0x4, R10 &req={2} ?WAIT3_END_GROUP;
STS [R3+UR5+0x200], R18 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R21, [R4+0x200] &wr=0x0 ?trans4;
STG.E desc[UR8][R16.64], R21 &req={0} &rd=0x0 ?trans1;
BRA 0xc30 ?trans5;
ISETP.GE.AND P0, PT, R23, UR14, PT ?WAIT13_END_GROUP;
@P0 BRA 0xc30 ?trans5;
IMAD.WIDE.U32 R18, R23, 0x4, R6 ?WAIT5_END_GROUP;
LDG.E R17, desc[UR8][R18.64] &req={3,0} &wr=0x3 ?trans1;
MOV R5, 0x1 ?trans1;
IMAD.WIDE R16, R17, 0x4, R14 &req={3} ?WAIT6_END_GROUP;
ATOMG.E.ADD.STRONG.GPU PT, R17, desc[UR8][R16.64], R5 &wr=0x3 ?trans1;
IMAD.WIDE.U32 R20, R23, 0x4, R12 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR8][R20.64], R17 &req={3} &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R23, PT, PT, R0, R23, RZ ?trans1;
BSSY.RECONVERGENT B0, 0xe30 ?trans3;
IADD3 R5, PT, PT, R2, -R23, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, 0x80, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xd90 ?trans5;
IMAD.WIDE.U32 R16, R23, 0x4, R6 &req={3,0} ?WAIT5_END_GROUP;
LDG.E R5, desc[UR8][R16.64] &wr=0x3 ?trans1;
WARPSYNC.ALL ?trans5;
NOP ?trans1;
HFMA2 R25, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
STS [R4], R5 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R19, [R3+UR5] &wr=0x0 ?trans2;
IMAD.WIDE R18, R19, 0x4, R8 &req={1,0} ?WAIT6_END_GROUP;
ATOMG.E.ADD.STRONG.GPU PT, R18, desc[UR8][R18.64], R25 &wr=0x3 ?trans1;
IMAD.WIDE.U32 R16, R23, 0x4, R10 &req={2} ?WAIT3_END_GROUP;
STS [R3+UR5+0x200], R18 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R21, [R4+0x200] &wr=0x0 ?trans4;
STG.E desc[UR8][R16.64], R21 &req={0} &rd=0x0 ?trans1;
BRA 0xe20 ?trans5;
ISETP.GE.AND P0, PT, R23, UR14, PT ?WAIT13_END_GROUP;
@P0 BRA 0xe20 ?trans5;
IMAD.WIDE.U32 R18, R23, 0x4, R6 ?WAIT5_END_GROUP;
LDG.E R17, desc[UR8][R18.64] &req={3,0} &wr=0x3 ?trans1;
MOV R5, 0x1 ?trans1;
IMAD.WIDE R16, R17, 0x4, R14 &req={3} ?WAIT6_END_GROUP;
ATOMG.E.ADD.STRONG.GPU PT, R17, desc[UR8][R16.64], R5 &wr=0x3 ?trans1;
IMAD.WIDE.U32 R20, R23, 0x4, R12 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR8][R20.64], R17 &req={3} &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R5, PT, PT, R0, R23, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, R2, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x680 ?trans5;
EXIT ?trans5;
BRA 0xe70;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: boxsum_stage2(int, int*, int*, int*)
_ZL13boxsum_stage2iPiS_S_:
s_load_b32 s10, s[0:1], 0x0
s_lshl_b32 s12, s15, 7
s_waitcnt lgkmcnt(0)
s_cmp_le_i32 s10, s12
s_cbranch_scc1 .LBB1_13
v_mul_u32_u24_e32 v1, 19, v0
v_lshlrev_b32_e32 v2, 2, v0
s_clause 0x2
s_load_b32 s13, s[0:1], 0x20
s_load_b128 s[4:7], s[0:1], 0x8
s_load_b64 s[2:3], s[0:1], 0x18
v_dual_mov_b32 v15, 1 :: v_dual_add_nc_u32 v14, s10, v0
v_add_nc_u32_e32 v0, s12, v0
v_cmp_ne_u32_e32 vcc_lo, -1, v2
v_and_b32_e32 v1, 0x7f, v1
v_add_nc_u32_e32 v8, 0x200, v2
s_mov_b64 s[8:9], src_shared_base
s_mov_b32 s11, 0
v_cndmask_b32_e32 v2, 0, v2, vcc_lo
v_lshlrev_b32_e32 v4, 2, v1
v_ashrrev_i32_e32 v1, 31, v0
v_cndmask_b32_e64 v3, 0, s9, vcc_lo
v_cmp_ne_u32_e32 vcc_lo, -1, v8
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_or_b32_e32 v6, 0x200, v4
v_lshlrev_b64 v[10:11], 2, v[0:1]
v_cmp_ne_u32_e64 s0, -1, v4
v_cndmask_b32_e32 v8, 0, v8, vcc_lo
v_cndmask_b32_e64 v9, 0, s9, vcc_lo
v_cmp_ne_u32_e64 s1, -1, v6
s_waitcnt lgkmcnt(0)
s_lshl_b32 s8, s13, 7
v_add_co_u32 v10, vcc_lo, s4, v10
v_cndmask_b32_e64 v4, 0, v4, s0
v_cndmask_b32_e64 v5, 0, s9, s0
v_cndmask_b32_e64 v6, 0, v6, s1
v_cndmask_b32_e64 v7, 0, s9, s1
v_add_co_ci_u32_e32 v11, vcc_lo, s5, v11, vcc_lo
s_ashr_i32 s9, s8, 31
s_sub_i32 s1, s10, s12
s_lshl_b64 s[4:5], s[8:9], 2
.LBB1_2:
s_cmpk_gt_i32 s1, 0x7f
s_cbranch_scc0 .LBB1_4
global_load_b32 v12, v[10:11], off
s_mov_b32 s12, 0
s_mov_b32 s0, -1
s_waitcnt vmcnt(0)
flat_store_b32 v[2:3], v12 dlc
s_waitcnt_vscnt null, 0x0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
flat_load_b32 v12, v[4:5] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_ashrrev_i32_e32 v13, 31, v12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[12:13], 2, v[12:13]
v_add_co_u32 v12, vcc_lo, s2, v12
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v13, vcc_lo, s3, v13, vcc_lo
global_atomic_add_u32 v12, v[12:13], v15, off glc
s_waitcnt vmcnt(0)
flat_store_b32 v[6:7], v12 dlc
s_waitcnt_vscnt null, 0x0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
flat_load_b32 v16, v[8:9] glc dlc
s_waitcnt vmcnt(0)
s_branch .LBB1_5
.LBB1_4:
s_mov_b32 s0, 0
s_mov_b32 s12, -1
.LBB1_5:
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 vcc_lo, exec_lo, s12
s_cbranch_vccnz .LBB1_9
s_mov_b32 s12, exec_lo
v_cmpx_gt_i32_e64 s10, v0
s_cbranch_execz .LBB1_8
global_load_b32 v12, v[10:11], off
s_or_b32 s0, s0, exec_lo
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v13, 31, v12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[12:13], 2, v[12:13]
v_add_co_u32 v12, vcc_lo, s2, v12
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v13, vcc_lo, s3, v13, vcc_lo
s_waitcnt lgkmcnt(0)
global_atomic_add_u32 v16, v[12:13], v15, off glc
v_ashrrev_i32_e32 v13, 31, v0
v_mov_b32_e32 v12, v0
.LBB1_8:
s_or_b32 exec_lo, exec_lo, s12
s_branch .LBB1_10
.LBB1_9:
v_dual_mov_b32 v13, v1 :: v_dual_mov_b32 v12, v0
.LBB1_10:
s_and_saveexec_b32 s12, s0
s_cbranch_execz .LBB1_12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[12:13], 2, v[12:13]
v_add_co_u32 v12, vcc_lo, s6, v12
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v13, vcc_lo, s7, v13, vcc_lo
s_waitcnt vmcnt(0) lgkmcnt(0)
global_store_b32 v[12:13], v16, off
.LBB1_12:
s_or_b32 exec_lo, exec_lo, s12
v_add_co_u32 v0, vcc_lo, v0, s8
v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
v_add_co_u32 v10, s0, v10, s4
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
v_cmp_ge_i32_e32 vcc_lo, v0, v14
v_add_co_ci_u32_e64 v11, s0, s5, v11, s0
s_sub_i32 s1, s1, s8
s_or_b32 s11, vcc_lo, s11
s_and_not1_b32 exec_lo, exec_lo, s11
s_cbranch_execnz .LBB1_2
.LBB1_13:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| boxsum_stage2 | 5,795 | 2,175 | stackv2-00000-of-00015 |
// Demangled: boxsum_stage3(int, int*, int*)
Function : _Z13boxsum_stage3iPiS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R3, c[0x0][0x380] &wr=0x2 ?trans8;
LDC R0, c[0x0][0x370] &wr=0x3 ?trans1;
USHF.L.U32 UR4, UR4, 0x7, URZ &req={1} ?WAIT6_END_GROUP;
ISETP.LE.AND P0, PT, R3, UR4, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={3,0} ?trans5;
IMAD.SHL.U32 R0, R0, 0x80, RZ ?trans1;
S2R R2, SR_TID.X &wr=0x0 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans2;
VIMNMX.U32 R10, R0, 0x1, !PT ?trans1;
LDCU UR9, c[0x0][0x380] &wr=0x3 ?trans3;
I2F.U32.RP R11, R10 &wr=0x4 ?trans1;
IADD3 R13, PT, PT, RZ, -R10, RZ ?trans1;
ISETP.NE.U32.AND P2, PT, R10, RZ, PT ?trans1;
LDCU UR8, c[0x0][0x380] &wr=0x0 ?trans1;
MUFU.RCP R11, R11 &req={4} &wr=0x4 ?trans1;
IADD3 R5, PT, PT, R2, UR4, RZ &req={0} ?WAIT2_END_GROUP;
IADD3 R3, PT, PT, R2, R3, RZ ?trans1;
UMOV UR4, 0x400 ?trans2;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?trans1;
IADD3 R4, PT, PT, R0, R5, RZ ?trans2;
IADD3 R6, PT, PT, R11, 0xffffffe, RZ &req={4} ?WAIT3_END_GROUP;
ISETP.GE.AND P0, PT, R4, R3, PT ?trans1;
VIMNMX.S32 R9, R3, R4, !PT ?trans1;
F2I.FTZ.U32.TRUNC.NTZ R7, R6 &rd=0x0 &wr=0x1 ?trans3;
SEL R8, RZ, 0x1, P0 ?WAIT5_END_GROUP;
IADD3 R9, PT, PT, R9, -R4, -R8 ?trans1;
HFMA2 R6, -RZ, RZ, 0, 0 &req={0} ?trans2;
IMAD R11, R13, R7, RZ &req={1} ?WAIT4_END_GROUP;
IMAD.HI.U32 R12, R7, R11, R6 ?WAIT6_END_GROUP;
IMAD.HI.U32 R7, R12, R9, RZ ?WAIT5_END_GROUP;
IADD3 R4, PT, PT, -R7, RZ, RZ ?WAIT5_END_GROUP;
IMAD R9, R10, R4, R9 ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R9, R10, PT ?WAIT13_END_GROUP;
@P0 IADD3 R9, PT, PT, -R10, R9, RZ ?trans2;
@P0 IADD3 R7, PT, PT, R7, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R9, R10, PT ?WAIT13_END_GROUP;
@P1 IADD3 R7, PT, PT, R7, 0x1, RZ ?trans2;
@!P2 LOP3.LUT R7, RZ, R10, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R8, PT, PT, R8, R7, RZ ?WAIT4_END_GROUP;
IADD3 R4, PT, PT, R8, 0x1, RZ ?WAIT4_END_GROUP;
LOP3.LUT P0, R9, R4, 0x3, RZ, 0xc0, !PT ?trans2;
LEA R4, R2, UR4, 0x2 ?WAIT11_END_GROUP;
@!P0 BRA 0x690 &req={3,2} ?trans5;
LDC.64 R6, c[0x0][0x388] &wr=0x0 ?trans1;
IADD3 R9, PT, PT, -R9, RZ, RZ ?trans1;
IMAD.WIDE.U32 R6, R5, 0x4, R6 &req={0} ?WAIT7_END_GROUP;
WARPSYNC.ALL ?trans5;
NOP ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.AND P0, PT, R5, UR8, PT ?trans1;
MOV R11, RZ &req={0} ?WAIT12_END_GROUP;
@!P0 LDG.E R11, desc[UR6][R6.64] &wr=0x2 ?trans1;
ISETP.GT.U32.AND P0, PT, R2, 0x3f, PT ?trans1;
IADD3 R9, PT, PT, R9, 0x1, RZ ?trans1;
BSSY.RECONVERGENT B0, 0x660 ?trans4;
ISETP.NE.AND P1, PT, R9, RZ, PT ?trans1;
STS [R4], R11 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P0 LDS R10, [R4+0x100] ?trans4;
@!P0 LDS R13, [R4] &wr=0x0 ?trans2;
@!P0 IADD3 R13, PT, PT, R10, R13, RZ &req={0} ?WAIT5_END_GROUP;
@!P0 STS [R4], R13 &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R2, 0x1f, PT ?WAIT13_END_GROUP;
@P0 BRA 0x650 &req={0} ?trans5;
LDS R10, [R4+0x80] ?trans1;
ISETP.NE.AND P0, PT, R2, RZ, PT ?WAIT3_END_GROUP;
LDS R11, [R4] &wr=0x0 ?trans10;
@!P0 S2R R19, SR_CgaCtaId &wr=0x1 ?trans1;
@!P0 MOV R12, 0x400 ?trans1;
IADD3 R11, PT, PT, R10, R11, RZ &req={0} ?WAIT4_END_GROUP;
@!P0 LEA R12, R19, R12, 0x18 &req={1} ?trans2;
@!P0 SHF.R.U32.HI R19, RZ, 0x7, R5 ?trans1;
STS [R4], R11 ?trans4;
LDS R10, [R4+0x40] ?trans4;
LDS R13, [R4] &wr=0x0 ?trans2;
IADD3 R13, PT, PT, R10, R13, RZ &req={0} ?WAIT5_END_GROUP;
STS [R4], R13 ?trans4;
LDS R10, [R4+0x20] ?trans4;
LDS R15, [R4] &wr=0x0 ?trans2;
IADD3 R15, PT, PT, R10, R15, RZ &req={0} ?WAIT5_END_GROUP;
STS [R4], R15 ?trans4;
LDS R10, [R4+0x10] ?trans4;
LDS R17, [R4] &wr=0x0 ?trans2;
IADD3 R17, PT, PT, R10, R17, RZ &req={0} ?WAIT5_END_GROUP;
STS [R4], R17 ?trans4;
LDS R10, [R4+0x8] ?trans4;
LDS R11, [R4] &wr=0x0 ?trans2;
IADD3 R13, PT, PT, R10, R11, RZ &req={0} ?WAIT5_END_GROUP;
STS [R4], R13 ?trans4;
LDS R10, [R4+0x4] ?trans4;
LDS R11, [R4] &wr=0x0 ?trans2;
IADD3 R15, PT, PT, R10, R11, RZ &req={0} ?WAIT2_END_GROUP;
@!P0 LDC.64 R10, c[0x0][0x390] &wr=0x0 ?trans3;
STS [R4], R15 ?trans4;
@!P0 LDS R17, [R12] &wr=0x1 ?trans1;
@!P0 IMAD.WIDE.U32 R10, R19, 0x4, R10 &req={0} ?WAIT5_END_GROUP;
@!P0 STG.E desc[UR6][R10.64], R17 &req={1} &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
IMAD.WIDE.U32 R6, R0.reuse, 0x4, R6 ?trans1;
IADD3 R5, PT, PT, R0, R5, RZ ?trans1;
@P1 BRA 0x310 ?trans6;
LDC.64 R6, c[0x0][0x388] &wr=0x1 ?trans1;
ISETP.GE.U32.AND P0, PT, R8, 0x3, PT ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
WARPSYNC.ALL ?trans5;
NOP ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.AND P1, PT, R5, UR9, PT ?trans1;
HFMA2 R11, -RZ, RZ, 0, 0 &req={4,3,2,0} ?trans1;
ISETP.GT.U32.AND P0, PT, R2, 0x3f, PT ?WAIT3_END_GROUP;
BSSY.RECONVERGENT B0, 0x770 ?trans8;
@P1 BRA 0x760 ?trans5;
IMAD.WIDE.U32 R8, R5, 0x4, R6 &req={1} ?WAIT5_END_GROUP;
LDG.E R11, desc[UR6][R8.64] &rd=0x0 &wr=0x5 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
STS [R4], R11 &req={5} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P1, PT, R2, 0x1f, PT ?trans1;
IADD3 R9, PT, PT, R0, R5, RZ &req={0} ?trans1;
MOV R19, RZ ?WAIT3_END_GROUP;
BSSY.RECONVERGENT B0, 0xa60 ?trans1;
ISETP.GE.AND P2, PT, R9, UR9, PT ?trans1;
@!P0 LDS R8, [R4+0x100] ?trans4;
@!P0 LDS R13, [R4] &wr=0x0 ?trans2;
@!P0 IADD3 R13, PT, PT, R8, R13, RZ &req={0} ?WAIT5_END_GROUP;
@!P0 STS [R4], R13 &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P1 BRA 0xa50 ?trans5;
LDS R8, [R4+0x80] ?trans1;
ISETP.NE.AND P3, PT, R2, RZ, PT ?WAIT3_END_GROUP;
LDS R11, [R4] &wr=0x2 ?trans10;
@!P3 S2R R21, SR_CgaCtaId &wr=0x3 ?trans1;
@!P3 MOV R10, 0x400 ?trans1;
@!P3 SHF.R.U32.HI R5, RZ, 0x7, R5 ?WAIT2_END_GROUP;
IADD3 R11, PT, PT, R8, R11, RZ &req={2} ?WAIT5_END_GROUP;
STS [R4], R11 ?trans4;
LDS R8, [R4+0x40] ?trans4;
LDS R13, [R4] &req={0} &wr=0x0 ?trans2;
IADD3 R13, PT, PT, R8, R13, RZ &req={0} ?WAIT5_END_GROUP;
STS [R4], R13 ?trans4;
LDS R8, [R4+0x20] ?trans4;
LDS R15, [R4] &wr=0x0 ?trans2;
IADD3 R15, PT, PT, R8, R15, RZ &req={0} ?WAIT5_END_GROUP;
STS [R4], R15 ?trans4;
LDS R8, [R4+0x10] ?trans4;
LDS R17, [R4] &wr=0x0 ?trans2;
IADD3 R17, PT, PT, R8, R17, RZ &req={0} ?WAIT5_END_GROUP;
STS [R4], R17 &rd=0x3 ?trans4;
LDS R8, [R4+0x8] ?trans4;
LDS R11, [R4] &wr=0x0 ?trans1;
@!P3 LEA R17, R21, R10, 0x18 &req={3} ?trans2;
IADD3 R13, PT, PT, R8, R11, RZ &req={0} ?WAIT5_END_GROUP;
STS [R4], R13 ?trans4;
LDS R8, [R4+0x4] ?trans4;
LDS R11, [R4] &wr=0x0 ?trans2;
IADD3 R15, PT, PT, R8, R11, RZ &req={0} ?WAIT2_END_GROUP;
@!P3 LDC.64 R10, c[0x0][0x390] &wr=0x0 ?trans3;
STS [R4], R15 ?trans4;
@!P3 LDS R17, [R17] &wr=0x2 ?trans1;
@!P3 IMAD.WIDE.U32 R10, R5, 0x4, R10 &req={0} ?WAIT5_END_GROUP;
@!P3 STG.E desc[UR6][R10.64], R17 &req={2} &rd=0x2 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0xac0 ?trans4;
@P2 BRA 0xab0 ?trans5;
IMAD.WIDE.U32 R10, R9, 0x4, R6 &req={2,1} ?WAIT5_END_GROUP;
LDG.E R19, desc[UR6][R10.64] &rd=0x3 &wr=0x5 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
STS [R4], R19 &req={5} ?trans1;
IADD3 R5, PT, PT, R0, R9, RZ ?trans1;
BSSY.RECONVERGENT B0, 0xda0 ?trans1;
HFMA2 R21, -RZ, RZ, 0, 0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans2;
ISETP.GE.AND P2, PT, R5, UR9, PT ?WAIT4_END_GROUP;
@!P0 LDS R8, [R4+0x100] ?trans4;
@!P0 LDS R11, [R4] &req={3,2} &wr=0x2 ?trans2;
@!P0 IADD3 R11, PT, PT, R8, R11, RZ &req={2} ?WAIT5_END_GROUP;
@!P0 STS [R4], R11 &rd=0x2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P1 BRA 0xd90 ?trans5;
LDS R8, [R4+0x80] ?trans1;
ISETP.NE.AND P3, PT, R2, RZ, PT ?WAIT3_END_GROUP;
LDS R11, [R4] &req={2} &wr=0x2 ?trans10;
@!P3 S2R R19, SR_CgaCtaId &wr=0x3 ?trans1;
@!P3 MOV R10, 0x400 ?trans1;
@!P3 SHF.R.U32.HI R9, RZ, 0x7, R9 ?WAIT2_END_GROUP;
IADD3 R11, PT, PT, R8, R11, RZ &req={2} ?WAIT5_END_GROUP;
STS [R4], R11 ?trans4;
LDS R8, [R4+0x40] ?trans4;
LDS R13, [R4] &req={0} &wr=0x0 ?trans2;
IADD3 R13, PT, PT, R8, R13, RZ &req={0} ?WAIT5_END_GROUP;
STS [R4], R13 ?trans4;
LDS R8, [R4+0x20] ?trans4;
LDS R15, [R4] &wr=0x0 ?trans2;
IADD3 R15, PT, PT, R8, R15, RZ &req={0} ?WAIT5_END_GROUP;
STS [R4], R15 ?trans4;
LDS R8, [R4+0x10] ?trans4;
LDS R17, [R4] &wr=0x0 ?trans2;
IADD3 R17, PT, PT, R8, R17, RZ &req={0} ?WAIT5_END_GROUP;
STS [R4], R17 &rd=0x3 ?trans4;
LDS R8, [R4+0x8] ?trans4;
LDS R11, [R4] &wr=0x0 ?trans1;
@!P3 LEA R17, R19, R10, 0x18 &req={3} ?trans2;
IADD3 R13, PT, PT, R8, R11, RZ &req={0} ?WAIT5_END_GROUP;
STS [R4], R13 ?trans4;
LDS R8, [R4+0x4] ?trans4;
LDS R11, [R4] &wr=0x0 ?trans2;
IADD3 R15, PT, PT, R8, R11, RZ &req={0} ?WAIT2_END_GROUP;
@!P3 LDC.64 R10, c[0x0][0x390] &wr=0x0 ?trans3;
STS [R4], R15 ?trans4;
@!P3 LDS R17, [R17] &wr=0x2 ?trans1;
@!P3 IMAD.WIDE.U32 R8, R9, 0x4, R10 &req={0} ?WAIT5_END_GROUP;
@!P3 STG.E desc[UR6][R8.64], R17 &req={2} &rd=0x3 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0xe00 ?trans4;
@P2 BRA 0xdf0 ?trans5;
IMAD.WIDE.U32 R8, R5, 0x4, R6 &req={3,1} ?WAIT5_END_GROUP;
LDG.E R21, desc[UR6][R8.64] &rd=0x4 &wr=0x5 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
STS [R4], R21 &req={5} ?trans1;
IADD3 R9, PT, PT, R0, R5, RZ &req={4,3} ?trans1;
BSSY.RECONVERGENT B0, 0x10e0 ?trans1;
MOV R19, RZ ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans2;
ISETP.GE.AND P2, PT, R9, UR9, PT ?WAIT4_END_GROUP;
@!P0 LDS R8, [R4+0x100] ?trans4;
@!P0 LDS R11, [R4] &req={2} &wr=0x2 ?trans2;
@!P0 IADD3 R11, PT, PT, R8, R11, RZ &req={2} ?WAIT5_END_GROUP;
@!P0 STS [R4], R11 &rd=0x2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P1 BRA 0x10d0 ?trans5;
LDS R8, [R4+0x80] ?trans1;
ISETP.NE.AND P3, PT, R2, RZ, PT ?WAIT3_END_GROUP;
LDS R11, [R4] &req={2} &wr=0x2 ?trans10;
@!P3 S2R R21, SR_CgaCtaId &wr=0x3 ?trans1;
@!P3 MOV R10, 0x400 ?trans1;
@!P3 SHF.R.U32.HI R5, RZ, 0x7, R5 ?WAIT2_END_GROUP;
IADD3 R11, PT, PT, R8, R11, RZ &req={2} ?WAIT5_END_GROUP;
STS [R4], R11 ?trans4;
LDS R8, [R4+0x40] ?trans4;
LDS R13, [R4] &req={0} &wr=0x0 ?trans2;
IADD3 R13, PT, PT, R8, R13, RZ &req={0} ?WAIT5_END_GROUP;
STS [R4], R13 ?trans4;
LDS R8, [R4+0x20] ?trans4;
LDS R15, [R4] &wr=0x0 ?trans2;
IADD3 R15, PT, PT, R8, R15, RZ &req={0} ?WAIT5_END_GROUP;
STS [R4], R15 ?trans4;
LDS R8, [R4+0x10] ?trans4;
LDS R17, [R4] &wr=0x0 ?trans2;
IADD3 R17, PT, PT, R8, R17, RZ &req={0} ?WAIT5_END_GROUP;
STS [R4], R17 &rd=0x3 ?trans4;
LDS R8, [R4+0x8] ?trans4;
LDS R11, [R4] &wr=0x0 ?trans1;
@!P3 LEA R17, R21, R10, 0x18 &req={3} ?trans2;
IADD3 R13, PT, PT, R8, R11, RZ &req={0} ?WAIT5_END_GROUP;
STS [R4], R13 ?trans4;
LDS R8, [R4+0x4] ?trans4;
LDS R11, [R4] &wr=0x0 ?trans2;
IADD3 R15, PT, PT, R8, R11, RZ &req={0} ?WAIT2_END_GROUP;
@!P3 LDC.64 R10, c[0x0][0x390] &wr=0x0 ?trans3;
STS [R4], R15 ?trans4;
@!P3 LDS R17, [R17] &wr=0x2 ?trans1;
@!P3 IMAD.WIDE.U32 R10, R5, 0x4, R10 &req={0} ?WAIT5_END_GROUP;
@!P3 STG.E desc[UR6][R10.64], R17 &req={2} &rd=0x3 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x1140 ?trans4;
@P2 BRA 0x1130 ?trans5;
IMAD.WIDE.U32 R10, R9, 0x4, R6 &req={3,2,1} ?WAIT5_END_GROUP;
LDG.E R19, desc[UR6][R10.64] &rd=0x4 &wr=0x5 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
STS [R4], R19 &req={5} ?trans1;
BSSY.RECONVERGENT B0, 0x13f0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P0 LDS R5, [R4+0x100] ?trans4;
@!P0 LDS R8, [R4] &wr=0x0 ?trans2;
@!P0 IADD3 R5, PT, PT, R5, R8, RZ &req={0} ?WAIT5_END_GROUP;
@!P0 STS [R4], R5 &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P1 BRA 0x13e0 ?trans5;
LDS R5, [R4+0x80] &req={0} ?trans1;
ISETP.NE.AND P0, PT, R2, RZ, PT ?WAIT3_END_GROUP;
LDS R8, [R4] &wr=0x0 ?trans10;
@!P0 S2R R17, SR_CgaCtaId &req={3} &wr=0x3 ?trans1;
@!P0 MOV R10, 0x400 &req={4} ?trans1;
IADD3 R5, PT, PT, R5, R8, RZ &req={0} ?WAIT5_END_GROUP;
STS [R4], R5 ?trans4;
LDS R8, [R4+0x40] ?trans4;
LDS R11, [R4] &req={2} &wr=0x0 ?trans2;
IADD3 R11, PT, PT, R8, R11, RZ &req={0} ?WAIT5_END_GROUP;
STS [R4], R11 ?trans4;
LDS R8, [R4+0x20] ?trans4;
LDS R13, [R4] &wr=0x0 ?trans2;
IADD3 R13, PT, PT, R8, R13, RZ &req={0} ?WAIT5_END_GROUP;
STS [R4], R13 ?trans4;
LDS R8, [R4+0x10] ?trans4;
LDS R15, [R4] &wr=0x0 ?trans2;
IADD3 R15, PT, PT, R8, R15, RZ &req={0} ?WAIT5_END_GROUP;
STS [R4], R15 &rd=0x3 ?trans4;
LDS R5, [R4+0x8] ?trans4;
LDS R8, [R4] &wr=0x0 ?trans1;
@!P0 LEA R15, R17, R10, 0x18 &req={3} ?trans2;
@!P0 SHF.R.U32.HI R17, RZ, 0x7, R9 ?WAIT2_END_GROUP;
IADD3 R5, PT, PT, R5, R8, RZ &req={0} ?WAIT5_END_GROUP;
STS [R4], R5 ?trans4;
LDS R8, [R4+0x4] ?trans4;
LDS R11, [R4] &wr=0x0 ?trans2;
IADD3 R13, PT, PT, R8, R11, RZ &req={0} ?WAIT2_END_GROUP;
@!P0 LDC.64 R10, c[0x0][0x390] &wr=0x0 ?trans3;
STS [R4], R13 ?trans4;
@!P0 LDS R15, [R15] &wr=0x2 ?trans1;
@!P0 IMAD.WIDE.U32 R10, R17, 0x4, R10 &req={0} ?WAIT5_END_GROUP;
@!P0 STG.E desc[UR6][R10.64], R15 &req={2} &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R5, PT, PT, R0, R9, RZ &req={0} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, R3, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x6c0 ?trans5;
EXIT ?trans5;
BRA 0x1430;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: boxsum_stage3(int, int*, int*)
_ZL13boxsum_stage3iPiS_:
s_load_b32 s10, s[0:1], 0x0
s_lshl_b32 s2, s15, 7
s_waitcnt lgkmcnt(0)
s_cmp_ge_i32 s2, s10
s_cbranch_scc1 .LBB2_11
v_lshlrev_b32_e32 v2, 2, v0
s_clause 0x1
s_load_b32 s8, s[0:1], 0x18
s_load_b128 s[4:7], s[0:1], 0x8
v_add_nc_u32_e32 v1, s2, v0
s_mov_b64 s[2:3], src_shared_base
s_delay_alu instid0(SALU_CYCLE_1)
v_dual_mov_b32 v3, s3 :: v_dual_add_nc_u32 v22, s10, v0
v_cmp_ne_u32_e64 s1, -1, v2
v_add_nc_u32_e32 v8, 0x80, v2
v_add_nc_u32_e32 v6, 0x100, v2
v_add_nc_u32_e32 v12, 32, v2
v_add_nc_u32_e32 v10, 64, v2
v_cndmask_b32_e64 v4, 0, v2, s1
v_cndmask_b32_e64 v5, 0, s3, s1
v_cmp_ne_u32_e64 s1, -1, v8
v_cmp_ne_u32_e64 s2, -1, v6
v_add_nc_u32_e32 v14, 16, v2
v_add_nc_u32_e32 v16, 8, v2
v_add_nc_u32_e32 v18, 4, v2
v_cndmask_b32_e64 v8, 0, v8, s1
v_cndmask_b32_e64 v9, 0, s3, s1
v_cmp_ne_u32_e64 s1, -1, v12
v_ashrrev_i32_e32 v2, 31, v1
v_cndmask_b32_e64 v6, 0, v6, s2
v_cndmask_b32_e64 v7, 0, s3, s2
v_cmp_ne_u32_e64 s2, -1, v10
v_cndmask_b32_e64 v12, 0, v12, s1
v_cndmask_b32_e64 v13, 0, s3, s1
v_cmp_ne_u32_e64 s1, -1, v14
v_lshlrev_b64 v[20:21], 2, v[1:2]
v_cndmask_b32_e64 v10, 0, v10, s2
v_cndmask_b32_e64 v11, 0, s3, s2
v_cmp_ne_u32_e64 s2, -1, v16
v_cndmask_b32_e64 v14, 0, v14, s1
v_cndmask_b32_e64 v15, 0, s3, s1
v_cmp_ne_u32_e64 s1, -1, v18
s_waitcnt lgkmcnt(0)
s_lshl_b32 s8, s8, 7
v_cndmask_b32_e64 v16, 0, v16, s2
v_cndmask_b32_e64 v17, 0, s3, s2
v_add_co_u32 v20, s2, s4, v20
v_cmp_gt_u32_e32 vcc_lo, 64, v0
v_cmp_gt_u32_e64 s0, 32, v0
v_cndmask_b32_e64 v18, 0, v18, s1
v_cndmask_b32_e64 v19, 0, s3, s1
v_cmp_eq_u32_e64 s1, 0, v0
v_add_co_ci_u32_e64 v21, s2, s5, v21, s2
v_mov_b32_e32 v2, 0
s_ashr_i32 s9, s8, 31
s_mov_b32 s11, 0
s_lshl_b64 s[4:5], s[8:9], 2
.LBB2_2:
v_mov_b32_e32 v0, 0
s_mov_b32 s3, exec_lo
s_waitcnt lgkmcnt(0)
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
v_cmpx_gt_i32_e64 s10, v1
s_cbranch_execz .LBB2_4
global_load_b32 v0, v[20:21], off
.LBB2_4:
s_or_b32 exec_lo, exec_lo, s3
s_waitcnt vmcnt(0)
flat_store_b32 v[4:5], v0 dlc
s_waitcnt_vscnt null, 0x0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_saveexec_b32 s2, vcc_lo
s_cbranch_execz .LBB2_6
flat_load_b32 v0, v[6:7] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v23, v[4:5] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_nc_u32_e32 v0, v23, v0
flat_store_b32 v[4:5], v0 dlc
s_waitcnt_vscnt null, 0x0
.LBB2_6:
s_or_b32 exec_lo, exec_lo, s2
s_waitcnt lgkmcnt(0)
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_and_saveexec_b32 s2, s0
s_cbranch_execz .LBB2_8
flat_load_b32 v0, v[8:9] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v23, v[4:5] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_nc_u32_e32 v0, v23, v0
flat_store_b32 v[4:5], v0 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v0, v[10:11] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v23, v[4:5] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_nc_u32_e32 v0, v23, v0
flat_store_b32 v[4:5], v0 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v0, v[12:13] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v23, v[4:5] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_nc_u32_e32 v0, v23, v0
flat_store_b32 v[4:5], v0 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v0, v[14:15] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v23, v[4:5] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_nc_u32_e32 v0, v23, v0
flat_store_b32 v[4:5], v0 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v0, v[16:17] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v23, v[4:5] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_nc_u32_e32 v0, v23, v0
flat_store_b32 v[4:5], v0 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v0, v[18:19] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v23, v[4:5] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_nc_u32_e32 v0, v23, v0
flat_store_b32 v[4:5], v0 dlc
s_waitcnt_vscnt null, 0x0
.LBB2_8:
s_or_b32 exec_lo, exec_lo, s2
s_and_saveexec_b32 s3, s1
s_cbranch_execz .LBB2_10
flat_load_b32 v0, v[2:3] glc dlc
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v23, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshrrev_b32_e32 v23, 25, v23
v_add_nc_u32_e32 v23, v1, v23
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v23, 7, v23
v_ashrrev_i32_e32 v24, 31, v23
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[23:24], 2, v[23:24]
v_add_co_u32 v23, s2, s6, v23
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v24, s2, s7, v24, s2
s_waitcnt lgkmcnt(0)
global_store_b32 v[23:24], v0, off
.LBB2_10:
s_or_b32 exec_lo, exec_lo, s3
v_add_nc_u32_e32 v1, s8, v1
v_add_co_u32 v20, s3, v20, s4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v21, s3, s5, v21, s3
v_cmp_ge_i32_e64 s2, v1, v22
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_or_b32 s11, s2, s11
s_and_not1_b32 exec_lo, exec_lo, s11
s_cbranch_execnz .LBB2_2
.LBB2_11:
s_endpgm
| boxsum_stage3 | 7,416 | 2,852 | stackv2-00000-of-00015 |
// Demangled: boxsum_stage4(int, int*)
Function : _Z13boxsum_stage4iPi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans2;
ISETP.NE.AND P0, PT, RZ, UR4, PT &req={1} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDCU UR4, c[0x0][0x380] &wr=0x1 ?trans2;
MOV R7, UR4 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, 0x1, PT ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
S2R R0, SR_TID.X &wr=0x1 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x2 ?trans1;
UMOV UR4, 0x400 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans1;
HFMA2 R6, -RZ, RZ, 0, 0 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={2} ?trans1;
IADD3 R2, PT, PT, R0.reuse, 0x80, RZ &req={1} ?trans2;
IADD3 R3, PT, PT, R0.reuse, R7, RZ ?trans2;
LOP3.LUT R5, RZ, R0.reuse, RZ, 0x33, !PT ?trans1;
MOV R8, R0 ?trans1;
LEA R4, R0, UR4, 0x2 ?trans1;
VIMNMX.S32 R2, R2, R3, !PT ?WAIT5_END_GROUP;
IADD3 R5, PT, PT, R2, R5, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R5, 0x80, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x990 &req={3} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans1;
LEA.HI R6, R5, 0x1, RZ, 0x19 ?trans1;
MOV R8, R0 ?WAIT3_END_GROUP;
LOP3.LUT R9, R6, 0x3fffffe, RZ, 0xc0, !PT ?trans1;
MOV R6, RZ ?trans2;
LDC R7, c[0x0][0x380] &wr=0x2 ?trans1;
IADD3 R9, PT, PT, -R9, RZ, RZ ?trans1;
IMAD.WIDE.U32 R2, R0, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
IADD.64 R2, R2, 0x200 ?WAIT8_END_GROUP;
ISETP.GE.AND P5, PT, R8, R7, PT &req={2} ?trans1;
ISETP.NE.AND P0, PT, R0, RZ, PT ?trans1;
WARPSYNC.ALL ?trans5;
NOP ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
HFMA2 R11, -RZ, RZ, 0, 0 ?trans1;
P2R R10, PR, RZ, 0x1 ?WAIT4_END_GROUP;
BSSY.RECONVERGENT B0, 0x2b0 ?trans4;
@P5 BRA 0x2a0 ?trans5;
LDG.E R11, desc[UR6][R2.64+-0x200] &rd=0x1 &wr=0x5 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
STS [R4], R11 &req={5} ?trans1;
ISETP.GE.U32.AND P6, PT, R0.reuse, 0x2, PT ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.U32.AND P1, PT, R0.reuse, 0x8, PT ?trans1;
ISETP.GE.U32.AND P2, PT, R0.reuse, 0x10, PT ?trans1;
ISETP.GE.U32.AND P3, PT, R0.reuse, 0x20, PT ?trans1;
ISETP.GE.U32.AND P4, PT, R0, 0x40, PT ?WAIT4_END_GROUP;
S2UR UR5, SR_CgaCtaId &wr=0x2 ?trans1;
UMOV UR4, 0x400 ?trans1;
BSSY.RECONVERGENT B0, 0x670 ?trans1;
@P0 LDS R10, [R4+-0x4] &wr=0x3 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={2} ?trans1;
@P0 IADD3 R11, PT, PT, R11, R10, RZ &req={3} ?WAIT3_END_GROUP;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
P2R R10, PR, RZ, 0x40 ?trans1;
ISETP.GE.U32.AND P0, PT, R0, 0x4, PT ?WAIT4_END_GROUP;
STS [R4], R11 ?trans2;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P6 LDS R10, [R4+-0x8] &wr=0x2 ?trans2;
@P6 IADD3 R11, PT, PT, R11, R10, RZ &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
STS [R4], R11 ?trans2;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 LDS R10, [R4+-0x10] &wr=0x2 ?trans2;
@P0 IADD3 R11, PT, PT, R11, R10, RZ &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
STS [R4], R11 ?trans2;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P1 LDS R10, [R4+-0x20] &wr=0x2 ?trans2;
@P1 IADD3 R11, PT, PT, R11, R10, RZ &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
STS [R4], R11 ?trans2;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P2 LDS R10, [R4+-0x40] &wr=0x2 ?trans2;
@P2 IADD3 R11, PT, PT, R11, R10, RZ &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
STS [R4], R11 ?trans2;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P3 LDS R10, [R4+-0x80] &wr=0x2 ?trans2;
@P3 IADD3 R11, PT, PT, R11, R10, RZ &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
STS [R4], R11 ?trans2;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P4 LDS R10, [R4+-0x100] &wr=0x2 ?trans2;
@P4 IADD3 R11, PT, PT, R11, R10, RZ &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
IADD3 R10, PT, PT, R8, 0x80, RZ ?WAIT5_END_GROUP;
STS [R4], R11 &rd=0x2 ?trans2;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
MOV R11, RZ &req={2} ?WAIT5_END_GROUP;
@!P5 LDS R13, [R4] &wr=0x2 ?trans4;
LDS R15, [UR4+0x1fc] &wr=0x3 ?trans1;
@!P5 IADD3 R13, PT, PT, R13, R6.reuse, RZ &req={2} ?trans2;
IADD3 R15, PT, PT, R15, R6, RZ &req={3} ?WAIT3_END_GROUP;
@!P5 STG.E desc[UR6][R2.64+-0x200], R13 &rd=0x2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.AND P5, PT, R10, R7, PT ?WAIT13_END_GROUP;
@P5 BRA 0x660 &req={2} ?trans5;
LDG.E R11, desc[UR6][R2.64] &rd=0x2 &wr=0x5 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
STS [R4], R11 &req={5} ?trans1;
P2R R10, PR, RZ, 0x20 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.NE.AND P5, PT, R0, RZ, PT ?trans1;
IADD3 R9, PT, PT, R9, 0x2, RZ ?trans2;
IADD3 R8, PT, PT, R8, 0x100, RZ ?WAIT10_END_GROUP;
@P5 LDS R6, [R4+-0x4] &wr=0x3 ?trans2;
@P5 IADD3 R11, PT, PT, R11, R6, RZ &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.NE.AND P5, PT, R10, RZ, PT ?WAIT5_END_GROUP;
STS [R4], R11 ?trans2;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P6 LDS R6, [R4+-0x8] &wr=0x3 ?trans2;
@P6 IADD3 R11, PT, PT, R11, R6, RZ &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
STS [R4], R11 ?trans2;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 LDS R6, [R4+-0x10] &wr=0x3 ?trans2;
@P0 IADD3 R11, PT, PT, R11, R6, RZ &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.NE.AND P0, PT, R9, RZ, PT ?WAIT5_END_GROUP;
STS [R4], R11 ?trans2;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P1 LDS R6, [R4+-0x20] &wr=0x3 ?trans2;
@P1 IADD3 R11, PT, PT, R11, R6, RZ &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
STS [R4], R11 ?trans2;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P2 LDS R6, [R4+-0x40] &wr=0x3 ?trans2;
@P2 IADD3 R11, PT, PT, R11, R6, RZ &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
STS [R4], R11 ?trans2;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P3 LDS R6, [R4+-0x80] &wr=0x3 ?trans2;
@P3 IADD3 R11, PT, PT, R11, R6, RZ &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
STS [R4], R11 ?trans2;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P4 LDS R6, [R4+-0x100] &wr=0x3 ?trans2;
@P4 IADD3 R11, PT, PT, R11, R6, RZ &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
STS [R4], R11 ?trans2;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P5 LDS R6, [R4] &wr=0x3 ?trans4;
LDS R10, [UR4+0x1fc] &wr=0x4 ?trans1;
@!P5 IADD3 R13, PT, PT, R15, R6, RZ &req={3} ?WAIT2_END_GROUP;
IADD3 R6, PT, PT, R15, R10, RZ &req={4} ?WAIT3_END_GROUP;
@!P5 STG.E desc[UR6][R2.64], R13 &rd=0x3 ?trans2;
IADD.64 R2, R2, 0x400 &req={3,2,1} ?trans2;
@P0 BRA 0x200 ?trans6;
LOP3.LUT P0, RZ, R5, 0x80, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans1;
ISETP.GE.AND P0, PT, R8, R7, PT ?trans1;
WARPSYNC.ALL ?trans5;
NOP ?trans1;
BSSY.RECONVERGENT B0, 0xa70 ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.NE.AND P1, PT, R0, RZ, PT ?trans1;
IMAD.WIDE.U32 R2, R8, 0x4, R2 &req={1} ?WAIT4_END_GROUP;
@P0 BRA 0xa60 ?trans8;
LDG.E R5, desc[UR6][R2.64] &rd=0x1 &wr=0x5 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
STS [R4], R5 &req={5} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.U32.AND P2, PT, R0, 0x2, PT ?WAIT5_END_GROUP;
@P1 LDS R8, [R4+-0x4] &wr=0x2 ?trans2;
@P1 IADD3 R5, PT, PT, R5, R8, RZ &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.U32.AND P1, PT, R0, 0x4, PT ?WAIT5_END_GROUP;
STS [R4], R5 ?trans2;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P2 LDS R8, [R4+-0x8] &wr=0x2 ?trans2;
@P2 IADD3 R5, PT, PT, R5, R8, RZ &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.U32.AND P2, PT, R0, 0x8, PT ?WAIT5_END_GROUP;
STS [R4], R5 ?trans2;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P1 LDS R8, [R4+-0x10] &wr=0x2 ?trans2;
@P1 IADD3 R5, PT, PT, R5, R8, RZ &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.U32.AND P1, PT, R0, 0x10, PT ?WAIT5_END_GROUP;
STS [R4], R5 ?trans2;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P2 LDS R8, [R4+-0x20] &wr=0x2 ?trans2;
@P2 IADD3 R5, PT, PT, R5, R8, RZ &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.U32.AND P2, PT, R0, 0x20, PT ?WAIT5_END_GROUP;
STS [R4], R5 ?trans2;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P1 LDS R8, [R4+-0x40] &wr=0x2 ?trans2;
@P1 IADD3 R5, PT, PT, R5, R8, RZ &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.U32.AND P1, PT, R0, 0x40, PT ?WAIT5_END_GROUP;
STS [R4], R5 ?trans2;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P2 LDS R8, [R4+-0x80] &wr=0x2 ?trans2;
@P2 IADD3 R5, PT, PT, R5, R8, RZ &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
STS [R4], R5 ?trans2;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P1 LDS R0, [R4+-0x100] &wr=0x2 ?trans2;
@P1 IADD3 R5, PT, PT, R5, R0, RZ &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
STS [R4], R5 ?trans2;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P0 LDS R7, [R4] &wr=0x2 ?trans4;
LDS R0, [UR4+0x1fc] ?trans1;
@!P0 IADD3 R7, PT, PT, R7, R6, RZ &req={2} ?WAIT5_END_GROUP;
@!P0 STG.E desc[UR6][R2.64], R7 ?trans1;
EXIT ?trans5;
BRA 0xd70;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: boxsum_stage4(int, int*)
_ZL13boxsum_stage4iPi:
s_cmp_lg_u32 s15, 0
s_cbranch_scc1 .LBB3_12
s_load_b32 s4, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s4, 1
s_cbranch_scc1 .LBB3_12
s_load_b64 s[2:3], s[0:1], 0x8
s_mov_b64 s[0:1], src_shared_base
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_dual_mov_b32 v4, s1 :: v_dual_lshlrev_b32 v1, 2, v0
v_dual_mov_b32 v8, 0 :: v_dual_add_nc_u32 v7, s4, v0
v_mov_b32_e32 v3, 0x1fc
v_cmp_ne_u32_e32 vcc_lo, -1, v1
v_mov_b32_e32 v5, v0
s_mov_b32 s5, 0
v_dual_mov_b32 v6, 0 :: v_dual_cndmask_b32 v1, 0, v1
v_cndmask_b32_e64 v2, 0, s1, vcc_lo
.LBB3_3:
s_delay_alu instid0(VALU_DEP_3)
v_cmp_gt_i32_e32 vcc_lo, s4, v5
v_mov_b32_e32 v9, 0
s_waitcnt lgkmcnt(0)
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_and_saveexec_b32 s6, vcc_lo
s_cbranch_execz .LBB3_5
v_lshlrev_b64 v[9:10], 2, v[5:6]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v9, s0, s2, v9
v_add_co_ci_u32_e64 v10, s0, s3, v10, s0
global_load_b32 v9, v[9:10], off
.LBB3_5:
s_or_b32 exec_lo, exec_lo, s6
s_mov_b32 s6, 1
s_waitcnt vmcnt(0)
flat_store_b32 v[1:2], v9 dlc
s_waitcnt_vscnt null, 0x0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB3_6:
s_mov_b32 s7, exec_lo
v_cmpx_le_u32_e64 s6, v0
s_cbranch_execz .LBB3_8
v_subrev_nc_u32_e32 v10, s6, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b32_e32 v10, 2, v10
v_cmp_ne_u32_e64 s0, -1, v10
s_delay_alu instid0(VALU_DEP_1)
v_cndmask_b32_e64 v10, 0, v10, s0
v_cndmask_b32_e64 v11, 0, s1, s0
flat_load_b32 v10, v[10:11] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_nc_u32_e32 v9, v10, v9
.LBB3_8:
s_or_b32 exec_lo, exec_lo, s7
s_lshl_b32 s0, s6, 1
s_cmp_lt_u32 s6, 64
s_mov_b32 s6, s0
s_barrier
buffer_gl0_inv
flat_store_b32 v[1:2], v9 dlc
s_waitcnt_vscnt null, 0x0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB3_6
s_and_saveexec_b32 s0, vcc_lo
s_cbranch_execz .LBB3_11
flat_load_b32 v11, v[1:2] glc dlc
s_waitcnt vmcnt(0)
v_lshlrev_b64 v[9:10], 2, v[5:6]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v9, vcc_lo, s2, v9
v_add_co_ci_u32_e32 v10, vcc_lo, s3, v10, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v11, v11, v8
global_store_b32 v[9:10], v11, off
.LBB3_11:
s_or_b32 exec_lo, exec_lo, s0
flat_load_b32 v9, v[3:4] glc dlc
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v5, 0x80, v5
s_delay_alu instid0(VALU_DEP_1)
v_cmp_ge_i32_e32 vcc_lo, v5, v7
s_or_b32 s5, vcc_lo, s5
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v8, v9, v8
s_and_not1_b32 exec_lo, exec_lo, s5
s_cbranch_execnz .LBB3_3
.LBB3_12:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| boxsum_stage4 | 4,671 | 1,461 | stackv2-00000-of-00015 |
// Demangled: boxsum_stage5(int, int*, int*)
Function : _Z13boxsum_stage5iPiS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R10, SR_CTAID.X &wr=0x1 ?trans7;
S2UR UR5, SR_CgaCtaId &wr=0x2 ?trans1;
LDCU UR7, c[0x0][0x380] &wr=0x3 ?trans1;
S2R R0, SR_TID.X &wr=0x4 ?trans1;
UMOV UR4, 0x400 ?WAIT2_END_GROUP;
ULEA UR4, UR5, UR4, 0x18 &req={2} ?trans1;
IMAD.SHL.U32 R7, R10, 0x80, RZ &req={1} ?WAIT5_END_GROUP;
LEA R2, R0, UR4, 0x2 &req={4} ?trans1;
ISETP.GE.AND P0, PT, R7, UR7, PT &req={3} ?WAIT4_END_GROUP;
STS [R2+0x4], RZ &rd=0x1 ?trans4;
STS [R2+0x404], RZ &rd=0x1 ?trans5;
@P0 EXIT &req={0} ?trans5;
IADD3 R8, PT, PT, R7, R0, RZ ?trans2;
IADD3 R3, PT, PT, R0, UR7, RZ ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x0 ?trans1;
IADD3 R6, PT, PT, R8, 0x1c00, RZ ?trans1;
LDCU UR12, c[0x0][0x380] &wr=0x2 ?trans4;
VIMNMX.S32 R5, R3, R6, !PT ?WAIT5_END_GROUP;
IADD3 R4, PT, PT, R5, -0x1c00, -R0 ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R4, R7, PT ?WAIT5_END_GROUP;
SEL R5, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
IADD3 R4, PT, PT, R4, -R7, -R5 ?WAIT4_END_GROUP;
SHF.R.U32.HI R7, RZ, 0xa, R4 ?trans1;
HFMA2 R4, -RZ, RZ, 0, 0 ?WAIT5_END_GROUP;
IMAD.HI.U32 R7, R7, 0x24924925, R4 ?WAIT5_END_GROUP;
LOP3.LUT R4, R7.reuse, 0x1, RZ, 0xc0, !PT ?trans1;
ISETP.NE.AND P0, PT, R7, RZ, PT ?WAIT4_END_GROUP;
ISETP.NE.U32.AND P1, PT, R4, 0x1, PT ?WAIT13_END_GROUP;
@!P1 BRA 0x520 &req={2,0} ?trans5;
ISETP.NE.AND P1, PT, R0, RZ, PT ?trans1;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
WARPSYNC.ALL ?trans5;
NOP ?trans2;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.AND P2, PT, R8, UR7, PT ?trans1;
MOV R7, RZ ?WAIT6_END_GROUP;
@!P1 LDC.64 R12, c[0x0][0x390] &wr=0x2 ?trans1;
@!P1 IMAD.SHL.U32 R10, R10, 0x4, RZ ?trans1;
@!P1 MOV R11, RZ ?WAIT4_END_GROUP;
@!P1 LOP3.LUT R10, R10, 0x7fffffc, RZ, 0xc0, !PT ?trans1;
IMAD.WIDE.U32 R4, R8, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
@!P2 LDG.E R7, desc[UR8][R4.64] &wr=0x3 ?trans1;
@!P1 IADD.64 R8, R10, R12 &req={2} ?WAIT7_END_GROUP;
@!P1 LDG.E R8, desc[UR8][R8.64] &wr=0x2 ?trans4;
@!P1 STS [UR4], R8 &req={2} ?trans4;
STS [R2+0x204], R7 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R10, [R2+0x200] &wr=0x0 ?trans2;
IADD3 R11, PT, PT, R10, R7, RZ &req={0} ?WAIT5_END_GROUP;
STS [R2+0x604], R11 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R10, [R2+0x5fc] &wr=0x0 ?trans2;
IADD3 R13, PT, PT, R11, R10, RZ &req={0} ?WAIT5_END_GROUP;
STS [R2+0x204], R13 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R8, [R2+0x1f4] &wr=0x0 ?trans2;
IADD3 R9, PT, PT, R13, R8, RZ &req={0} ?WAIT5_END_GROUP;
STS [R2+0x604], R9 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R8, [R2+0x5e4] &wr=0x0 ?trans2;
IADD3 R11, PT, PT, R9, R8, RZ &req={0} ?WAIT5_END_GROUP;
STS [R2+0x204], R11 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R8, [R2+0x1c4] &wr=0x0 ?trans2;
IADD3 R13, PT, PT, R11, R8, RZ &req={0} ?WAIT5_END_GROUP;
STS [R2+0x604], R13 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R8, [R2+0x584] &wr=0x0 ?trans2;
IADD3 R9, PT, PT, R13, R8, RZ &req={0} ?WAIT5_END_GROUP;
STS [R2+0x204], R9 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R8, [R2+0x104] &wr=0x0 ?trans2;
IADD3 R11, PT, PT, R9, R8, RZ &req={0} ?WAIT5_END_GROUP;
STS [R2+0x604], R11 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R8, [UR4] ?trans4;
LDS R10, [UR4+0x800] &wr=0x0 ?trans2;
@!P2 IADD3 R7, PT, PT, R10, R7, RZ &req={0} ?WAIT4_END_GROUP;
@!P2 IADD3 R7, PT, PT, -R7, R11, R8 ?WAIT5_END_GROUP;
@!P2 STG.E desc[UR8][R4.64], R7 &rd=0x0 ?trans1;
MOV R8, R6 ?WAIT7_END_GROUP;
@!P0 EXIT ?trans5;
LDC.64 R6, c[0x0][0x388] &req={0} &wr=0x0 ?trans1;
LDCU.64 UR10, c[0x0][0x390] &wr=0x2 ?trans1;
SHF.R.U32.HI R4, RZ, 0x5, R8 ?trans1;
MOV R5, RZ ?trans1;
ISETP.NE.AND P0, PT, R0, RZ, PT ?trans2;
LOP3.LUT R4, R4, 0x7fffffc, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
IADD.64 R4, R4, UR10 &req={2} ?trans2;
IMAD.WIDE.U32 R6, R8, 0x4, R6 &req={0} ?WAIT7_END_GROUP;
WARPSYNC.ALL ?trans5;
NOP ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.AND P1, PT, R8, UR12, PT ?trans1;
HFMA2 R13, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
@!P0 LDG.E R9, desc[UR8][R4.64] &wr=0x2 ?trans8;
@!P1 LDG.E R13, desc[UR8][R6.64] &wr=0x3 ?trans1;
S2UR UR6, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR5, 0x400 ?WAIT2_END_GROUP;
ULEA UR5, UR6, UR5, 0x18 &req={0} ?WAIT9_END_GROUP;
@!P0 STS [UR5], R9 &req={2} ?trans1;
ISETP.NE.AND P0, PT, R0, RZ, PT ?WAIT3_END_GROUP;
STS [R2+0x204], R13 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R10, [R2+0x200] &wr=0x0 ?trans2;
IADD3 R11, PT, PT, R10, R13, RZ &req={0} ?WAIT5_END_GROUP;
STS [R2+0x604], R11 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R10, [R2+0x5fc] &wr=0x0 ?trans2;
IADD3 R15, PT, PT, R11, R10, RZ &req={0} ?WAIT5_END_GROUP;
STS [R2+0x204], R15 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R10, [R2+0x1f4] &wr=0x0 ?trans2;
IADD3 R9, PT, PT, R15, R10, RZ &req={0} ?WAIT5_END_GROUP;
STS [R2+0x604], R9 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R10, [R2+0x5e4] &wr=0x0 ?trans2;
IADD3 R11, PT, PT, R9, R10, RZ &req={0} ?WAIT5_END_GROUP;
STS [R2+0x204], R11 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R10, [R2+0x1c4] &wr=0x0 ?trans2;
IADD3 R15, PT, PT, R11, R10, RZ &req={0} ?WAIT5_END_GROUP;
STS [R2+0x604], R15 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R10, [R2+0x584] &wr=0x0 ?trans2;
IADD3 R9, PT, PT, R15, R10, RZ &req={0} ?trans2;
IADD3 R15, PT, PT, R8, 0x1c00, RZ ?WAIT3_END_GROUP;
STS [R2+0x204], R9 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.AND P2, PT, R15, UR12, PT ?WAIT5_END_GROUP;
LDS R10, [R2+0x104] &wr=0x0 ?trans2;
IADD3 R17, PT, PT, R9, R10, RZ &req={0} ?trans2;
@!P0 SHF.R.U32.HI R9, RZ, 0x7, R15 ?trans1;
@!P0 LDC.64 R10, c[0x0][0x390] &wr=0x0 ?trans2;
STS [R2+0x604], R17 ?trans6;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
@!P0 IMAD.WIDE.U32 R10, R9, 0x4, R10 &req={0} ?trans1;
MOV R9, RZ ?WAIT4_END_GROUP;
LDS R12, [UR5] ?trans4;
LDS R14, [UR5+0x800] &wr=0x0 ?trans2;
@!P1 IADD3 R13, PT, PT, R14, R13, RZ &req={0} ?WAIT4_END_GROUP;
@!P1 IADD3 R13, PT, PT, -R13, R17, R12 ?WAIT5_END_GROUP;
@!P1 STG.E desc[UR8][R6.64], R13 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P0 LDG.E R10, desc[UR8][R10.64] &wr=0x2 ?trans4;
@!P2 LDG.E R9, desc[UR8][R6.64+0x7000] &wr=0x3 ?trans1;
IADD3 R8, PT, PT, R8, 0x3800, RZ ?trans1;
IADD.64 R4, R4, 0x1c0 ?WAIT4_END_GROUP;
ISETP.GE.AND P1, PT, R8, R3, PT ?trans1;
@!P0 STS [UR5], R10 &req={2} ?trans4;
STS [R2+0x204], R9 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R12, [R2+0x200] &wr=0x0 ?trans2;
IADD3 R15, PT, PT, R12, R9, RZ &req={0} ?WAIT5_END_GROUP;
STS [R2+0x604], R15 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R12, [R2+0x5fc] &wr=0x0 ?trans2;
IADD3 R13, PT, PT, R15, R12, RZ &req={0} ?WAIT5_END_GROUP;
STS [R2+0x204], R13 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R10, [R2+0x1f4] &wr=0x0 ?trans2;
IADD3 R11, PT, PT, R13, R10, RZ &req={0} ?WAIT5_END_GROUP;
STS [R2+0x604], R11 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R10, [R2+0x5e4] &wr=0x0 ?trans2;
IADD3 R15, PT, PT, R11, R10, RZ &req={0} ?WAIT5_END_GROUP;
STS [R2+0x204], R15 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R10, [R2+0x1c4] &wr=0x0 ?trans2;
IADD3 R13, PT, PT, R15, R10, RZ &req={0} ?WAIT5_END_GROUP;
STS [R2+0x604], R13 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R10, [R2+0x584] &wr=0x0 ?trans2;
IADD3 R11, PT, PT, R13, R10, RZ &req={0} ?WAIT5_END_GROUP;
STS [R2+0x204], R11 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R10, [R2+0x104] &wr=0x0 ?trans2;
IADD3 R15, PT, PT, R11, R10, RZ &req={0} ?WAIT5_END_GROUP;
STS [R2+0x604], R15 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R10, [UR5] ?trans4;
LDS R12, [UR5+0x800] &wr=0x0 ?trans2;
@!P2 IADD3 R9, PT, PT, R12, R9, RZ &req={0} ?WAIT4_END_GROUP;
@!P2 IADD3 R9, PT, PT, -R9, R15, R10 ?WAIT5_END_GROUP;
@!P2 STG.E desc[UR8][R6.64+0x7000], R9 &rd=0x0 ?trans2;
IADD.64 R6, R6, 0xe000 &req={0} ?trans2;
@!P1 BRA 0x5b0 ?trans6;
EXIT ?trans5;
BRA 0xbd0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: boxsum_stage5(int, int*, int*)
_ZL13boxsum_stage5iPiS_:
v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v4, 2, v0
s_load_b32 s3, s[0:1], 0x0
s_mov_b64 s[8:9], src_shared_base
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v2, 4, v4
v_cmp_ne_u32_e32 vcc_lo, -1, v2
v_dual_cndmask_b32 v2, 0, v2 :: v_dual_add_nc_u32 v3, 0x404, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_ne_u32_e64 s2, -1, v3
v_cndmask_b32_e64 v5, 0, v3, s2
v_cndmask_b32_e64 v3, 0, s9, vcc_lo
v_cndmask_b32_e64 v6, 0, s9, s2
s_lshl_b32 s2, s15, 7
flat_store_b32 v[2:3], v1 dlc
s_waitcnt_vscnt null, 0x0
flat_store_b32 v[5:6], v1 dlc
s_waitcnt_vscnt null, 0x0
s_waitcnt lgkmcnt(0)
s_cmp_ge_i32 s2, s3
s_cbranch_scc1 .LBB4_9
v_add_nc_u32_e32 v2, 0x204, v4
s_load_b128 s[4:7], s[0:1], 0x8
v_add_nc_u32_e32 v27, s3, v0
v_add_nc_u32_e32 v3, s2, v0
v_cmp_eq_u32_e32 vcc_lo, 0, v0
v_cmp_ne_u32_e64 s0, -1, v2
v_add_nc_u32_e32 v0, 0x604, v4
v_add_nc_u32_e32 v7, 0x200, v4
v_add_nc_u32_e32 v11, 0x5fc, v4
v_add_nc_u32_e32 v15, 0x5e4, v4
v_cndmask_b32_e64 v5, 0, v2, s0
v_mov_b32_e32 v2, s9
v_cndmask_b32_e64 v6, 0, s9, s0
v_cmp_ne_u32_e64 s0, -1, v0
v_cmp_ne_u32_e64 s1, -1, v7
v_add_nc_u32_e32 v19, 0x584, v4
v_add_nc_u32_e32 v21, 0x104, v4
v_mov_b32_e32 v25, 0x800
v_cndmask_b32_e64 v9, 0, v0, s0
v_add_nc_u32_e32 v0, 0x1f4, v4
v_cndmask_b32_e64 v10, 0, s9, s0
v_cndmask_b32_e64 v7, 0, v7, s1
v_cndmask_b32_e64 v8, 0, s9, s1
v_cmp_ne_u32_e64 s1, -1, v11
v_cmp_ne_u32_e64 s0, -1, v0
s_mov_b32 s2, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e64 v11, 0, v11, s1
v_cndmask_b32_e64 v13, 0, v0, s0
v_add_nc_u32_e32 v0, 0x1c4, v4
v_ashrrev_i32_e32 v4, 31, v3
v_cndmask_b32_e64 v14, 0, s9, s0
v_cndmask_b32_e64 v12, 0, s9, s1
v_cmp_ne_u32_e64 s1, -1, v15
v_cmp_ne_u32_e64 s0, -1, v0
v_lshlrev_b64 v[23:24], 2, v[3:4]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cndmask_b32_e64 v15, 0, v15, s1
v_cndmask_b32_e64 v17, 0, v0, s0
v_cndmask_b32_e64 v18, 0, s9, s0
v_cmp_ne_u32_e64 s0, -1, v21
v_cndmask_b32_e64 v16, 0, s9, s1
v_cmp_ne_u32_e64 s1, -1, v19
s_delay_alu instid0(VALU_DEP_3)
v_cndmask_b32_e64 v21, 0, v21, s0
v_cndmask_b32_e64 v22, 0, s9, s0
s_waitcnt lgkmcnt(0)
v_add_co_u32 v23, s0, s4, v23
v_cndmask_b32_e64 v19, 0, v19, s1
v_cndmask_b32_e64 v20, 0, s9, s1
v_add_co_ci_u32_e64 v24, s0, s5, v24, s0
.LBB4_2:
s_waitcnt lgkmcnt(0)
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_and_saveexec_b32 s1, vcc_lo
s_cbranch_execz .LBB4_4
v_ashrrev_i32_e32 v0, 31, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshrrev_b32_e32 v0, 25, v0
v_add_nc_u32_e32 v0, v3, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v28, 7, v0
v_ashrrev_i32_e32 v29, 31, v28
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[28:29], 2, v[28:29]
v_add_co_u32 v28, s0, s6, v28
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v29, s0, s7, v29, s0
global_load_b32 v0, v[28:29], off
s_waitcnt vmcnt(0)
flat_store_b32 v[1:2], v0 dlc
s_waitcnt_vscnt null, 0x0
.LBB4_4:
s_or_b32 exec_lo, exec_lo, s1
v_cmp_gt_i32_e64 s0, s3, v3
v_mov_b32_e32 v0, 0
s_delay_alu instid0(VALU_DEP_2)
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB4_6
global_load_b32 v0, v[23:24], off
.LBB4_6:
s_or_b32 exec_lo, exec_lo, s1
s_waitcnt vmcnt(0)
flat_store_b32 v[5:6], v0 dlc
s_waitcnt_vscnt null, 0x0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
flat_load_b32 v4, v[7:8] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_nc_u32_e32 v4, v4, v0
flat_store_b32 v[9:10], v4 dlc
s_waitcnt_vscnt null, 0x0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
flat_load_b32 v26, v[11:12] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_nc_u32_e32 v4, v26, v4
flat_store_b32 v[5:6], v4 dlc
s_waitcnt_vscnt null, 0x0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
flat_load_b32 v26, v[13:14] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_nc_u32_e32 v4, v26, v4
flat_store_b32 v[9:10], v4 dlc
s_waitcnt_vscnt null, 0x0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
flat_load_b32 v26, v[15:16] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_nc_u32_e32 v4, v26, v4
flat_store_b32 v[5:6], v4 dlc
s_waitcnt_vscnt null, 0x0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
flat_load_b32 v26, v[17:18] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_nc_u32_e32 v4, v26, v4
flat_store_b32 v[9:10], v4 dlc
s_waitcnt_vscnt null, 0x0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
flat_load_b32 v26, v[19:20] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_nc_u32_e32 v4, v26, v4
flat_store_b32 v[5:6], v4 dlc
s_waitcnt_vscnt null, 0x0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
flat_load_b32 v26, v[21:22] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_nc_u32_e32 v4, v26, v4
v_mov_b32_e32 v26, v2
flat_store_b32 v[9:10], v4 dlc
s_waitcnt_vscnt null, 0x0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
flat_load_b32 v28, v[1:2] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v26, v[25:26] glc dlc
s_waitcnt vmcnt(0)
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB4_8
s_waitcnt lgkmcnt(1)
v_add_nc_u32_e32 v4, v4, v28
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v0, v0, v26
s_delay_alu instid0(VALU_DEP_1)
v_sub_nc_u32_e32 v0, v4, v0
global_store_b32 v[23:24], v0, off
.LBB4_8:
s_or_b32 exec_lo, exec_lo, s1
v_add_nc_u32_e32 v3, 0x1c00, v3
v_add_co_u32 v23, s1, 0x7000, v23
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v24, s1, 0, v24, s1
v_cmp_ge_i32_e64 s0, v3, v27
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_or_b32 s2, s0, s2
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB4_2
.LBB4_9:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| boxsum_stage5 | 4,469 | 3,296 | stackv2-00000-of-00015 |
// Demangled: boxsum_stage6(int, int*, int*, int*)
Function : _Z13boxsum_stage6iPiS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R11, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x380] &wr=0x2 ?trans1;
S2R R9, SR_TID.X &wr=0x3 ?trans1;
IMAD.SHL.U32 R5, R11, 0x80, RZ &req={1} ?WAIT5_END_GROUP;
IADD3 R0, PT, PT, R5, R9, RZ &req={3} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR4, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
IADD3 R2, PT, PT, R0, 0x1c00, RZ ?trans1;
BSSY.RECONVERGENT B0, 0x300 ?trans4;
VIMNMX.S32 R2, R2, UR4, !PT ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans4;
IADD3 R2, PT, PT, R2, -0x1c00, -R9 ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R2, R5, PT ?WAIT5_END_GROUP;
SEL R3, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
IADD3 R2, PT, PT, R2, -R5, -R3 ?WAIT4_END_GROUP;
SHF.R.U32.HI R7, RZ, 0xa, R2 ?trans1;
HFMA2 R2, -RZ, RZ, 0, 0 ?WAIT5_END_GROUP;
IMAD.HI.U32 R7, R7, 0x24924925, R2 ?WAIT5_END_GROUP;
IADD3 R2, PT, PT, R7.reuse, 0x1, RZ ?trans1;
ISETP.GE.U32.AND P0, PT, R7, 0x3, PT ?WAIT3_END_GROUP;
LOP3.LUT P1, R8, R2, 0x3, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P1 BRA 0x2f0 &req={0} ?trans5;
LDCU.64 UR6, c[0x0][0x388] &wr=0x0 ?trans1;
IMAD R0, R8.reuse, 0x1c00, RZ ?trans1;
IADD3 R8, PT, PT, -R8, RZ, RZ ?trans1;
IMAD.WIDE.U32 R2, R9.reuse, 0x4, RZ ?trans1;
LDCU.64 UR8, c[0x0][0x390] &wr=0x1 ?trans2;
LOP3.LUT R0, R9, R0, RZ, 0xfc, !PT ?trans1;
IMAD.WIDE.U32 R2, R11, 0x200, R2 ?WAIT3_END_GROUP;
IADD3 R0, PT, PT, R5, R0, RZ ?trans2;
IADD.64 R4, R2.reuse, UR6 &req={0} ?trans2;
IADD.64 R2, R2, UR8 &req={1} ?WAIT8_END_GROUP;
LDG.E R11, desc[UR4][R4.64] &wr=0x2 ?trans1;
MOV R9, RZ ?WAIT3_END_GROUP;
LDG.E R10, desc[UR4][R2.64] &wr=0x3 ?trans1;
ISETP.GE.AND P1, PT, R11, 0x1, PT &req={2} ?WAIT13_END_GROUP;
@P1 LDC.64 R6, c[0x0][0x398] &wr=0x0 ?trans2;
@P1 IMAD.WIDE.U32 R6, R11, 0x4, R6 &req={0} ?WAIT5_END_GROUP;
@P1 LDG.E R9, desc[UR4][R6.64] &wr=0x3 ?trans1;
IADD3 R8, PT, PT, R8, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R8, RZ, PT ?trans1;
IADD.64 R4, R4, 0x7000 ?WAIT3_END_GROUP;
IADD3 R9, PT, PT, R10, R9, RZ &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R9 &rd=0x0 ?trans2;
IADD.64 R2, R2, 0x7000 &req={0} ?trans2;
@P1 BRA 0x210 ?trans6;
BSYNC.RECONVERGENT B0 ?trans5;
@!P0 EXIT ?trans5;
LDCU.64 UR6, c[0x0][0x390] &wr=0x0 ?trans1;
MOV.64 R4, 0xe000 ?trans2;
LDCU.64 UR8, c[0x0][0x388] &wr=0x1 ?trans4;
IMAD.WIDE.U32 R4, R0, 0x4, R4 ?trans1;
LDCU UR10, c[0x0][0x380] &wr=0x2 ?trans4;
IADD.64 R2, R4, UR6 &req={0} ?WAIT2_END_GROUP;
IADD.64 R4, R4, UR8 &req={1} ?WAIT8_END_GROUP;
LDG.E R9, desc[UR4][R4.64+-0xe000] &wr=0x3 ?trans1;
HFMA2 R8, -RZ, RZ, 0, 0 ?WAIT3_END_GROUP;
LDG.E R11, desc[UR4][R2.64+-0xe000] &wr=0x4 ?trans1;
ISETP.GE.AND P0, PT, R9, 0x1, PT &req={3} ?WAIT13_END_GROUP;
@P0 LDC.64 R6, c[0x0][0x398] &wr=0x0 ?trans2;
@P0 IMAD.WIDE.U32 R6, R9, 0x4, R6 &req={0} ?WAIT5_END_GROUP;
@P0 LDG.E R8, desc[UR4][R6.64] &wr=0x4 ?trans2;
IADD3 R11, PT, PT, R11, R8, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64+-0xe000], R11 &rd=0x0 ?trans4;
LDG.E R13, desc[UR4][R4.64+-0x7000] &wr=0x3 ?trans1;
MOV R10, RZ ?WAIT3_END_GROUP;
LDG.E R11, desc[UR4][R2.64] &req={0} &wr=0x4 ?trans1;
ISETP.GE.AND P0, PT, R13, 0x1, PT &req={3} ?WAIT13_END_GROUP;
@P0 LDC.64 R8, c[0x0][0x398] &wr=0x0 ?trans2;
@P0 IMAD.WIDE.U32 R8, R13, 0x4, R8 &req={0} ?trans2;
LDG.E R13, desc[UR4][R2.64+-0x7000] &wr=0x3 ?trans4;
@P0 LDG.E R10, desc[UR4][R8.64] &wr=0x3 ?trans2;
IADD3 R13, PT, PT, R13, R10, RZ &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64+-0x7000], R13 &rd=0x0 ?trans4;
LDG.E R15, desc[UR4][R4.64] &wr=0x3 ?trans1;
HFMA2 R10, -RZ, RZ, 0, 0 ?WAIT3_END_GROUP;
LDG.E R13, desc[UR4][R2.64+0x7000] &req={0} &wr=0x5 ?trans1;
ISETP.GE.AND P0, PT, R15, 0x1, PT &req={3} ?WAIT13_END_GROUP;
@P0 LDC.64 R6, c[0x0][0x398] &wr=0x0 ?trans2;
@P0 IMAD.WIDE.U32 R6, R15, 0x4, R6 &req={0} ?WAIT5_END_GROUP;
@P0 LDG.E R10, desc[UR4][R6.64] &wr=0x4 ?trans2;
IADD3 R11, PT, PT, R11, R10, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R11 ?trans4;
LDG.E R15, desc[UR4][R4.64+0x7000] &wr=0x3 ?trans1;
MOV R10, RZ ?trans1;
ISETP.GE.AND P0, PT, R15, 0x1, PT &req={3} ?WAIT13_END_GROUP;
@P0 LDC.64 R8, c[0x0][0x398] &wr=0x0 ?trans2;
@P0 IMAD.WIDE.U32 R8, R15, 0x4, R8 &req={0} ?WAIT5_END_GROUP;
@P0 LDG.E R10, desc[UR4][R8.64] &wr=0x5 ?trans1;
IADD3 R0, PT, PT, R0, 0x7000, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR10, PT &req={2} ?trans1;
IADD.64 R4, R4, 0x1c000 ?WAIT3_END_GROUP;
IADD3 R13, PT, PT, R13, R10, RZ &req={5} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64+0x7000], R13 &rd=0x0 ?trans2;
IADD.64 R2, R2, 0x1c000 &req={0} ?trans2;
@!P0 BRA 0x380 ?trans6;
EXIT ?trans5;
BRA 0x620;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: boxsum_stage6(int, int*, int*, int*)
_ZL13boxsum_stage6iPiS_S_:
s_load_b32 s4, s[0:1], 0x0
s_lshl_b32 s2, s15, 7
s_mov_b32 s3, exec_lo
v_add_nc_u32_e32 v6, s2, v0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s4, v6
s_cbranch_execz .LBB5_5
s_load_b128 s[8:11], s[0:1], 0x8
s_ashr_i32 s3, s2, 31
v_add_co_u32 v0, s2, s2, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e64 v1, null, s3, 0, s2
s_load_b64 s[2:3], s[0:1], 0x18
s_mov_b32 s1, 0
v_lshlrev_b64 v[4:5], 2, v[0:1]
v_mov_b32_e32 v1, 0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v2, vcc_lo, s10, v4
v_add_co_ci_u32_e32 v3, vcc_lo, s11, v5, vcc_lo
v_add_co_u32 v4, vcc_lo, s8, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s9, v5, vcc_lo
.LBB5_2:
global_load_b32 v0, v[4:5], off
global_load_b32 v7, v[2:3], off
v_mov_b32_e32 v8, 0
s_mov_b32 s0, exec_lo
s_waitcnt vmcnt(1)
v_cmpx_lt_i32_e32 0, v0
s_cbranch_execz .LBB5_4
v_lshlrev_b64 v[8:9], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v8, vcc_lo, s2, v8
v_add_co_ci_u32_e32 v9, vcc_lo, s3, v9, vcc_lo
global_load_b32 v8, v[8:9], off
.LBB5_4:
s_or_b32 exec_lo, exec_lo, s0
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v0, v8, v7
v_add_nc_u32_e32 v6, 0x1c00, v6
v_add_co_u32 v4, s0, 0x7000, v4
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v5, s0, 0, v5, s0
global_store_b32 v[2:3], v0, off
v_add_co_u32 v2, vcc_lo, 0x7000, v2
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s4, v6
s_or_b32 s1, vcc_lo, s1
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execnz .LBB5_2
.LBB5_5:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| boxsum_stage6 | 2,748 | 982 | stackv2-00000-of-00015 |
// Demangled: boxsum_stage7(int, int*, int*, float (*) [4], float (*) [4], int*, float (*) [4], float (*) [4])
Function : _Z13boxsum_stage7iPiS_PA4_fS1_S_S1_S1_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R0, c[0x0][0x380] &wr=0x2 ?trans1;
USHF.L.U32 UR4, UR4, 0x7, URZ &req={1} ?WAIT6_END_GROUP;
ISETP.LE.AND P0, PT, R0, UR4, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
S2R R15, SR_TID.X &wr=0x0 ?trans1;
LDC.64 R2, c[0x0][0x3a0] &wr=0x1 ?trans1;
LDCU.128 UR8, c[0x0][0x3b0] &wr=0x2 ?trans1;
HFMA2 R9, -RZ, RZ, 0, 0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans5;
LDC.64 R4, c[0x0][0x398] &wr=0x4 ?trans1;
IMAD.SHL.U32 R8, R15.reuse, 0x4, RZ &req={0} ?trans1;
IADD3 R0, PT, PT, R15.reuse, R0, RZ ?trans1;
IMAD.WIDE.U32 R2, R15.reuse, -0xc, R2 &req={1} ?trans1;
IADD3 R17, PT, PT, R15, UR4, RZ ?WAIT2_END_GROUP;
LOP3.LUT R8, R8, 0xc, RZ, 0xc0, !PT ?trans1;
IMAD.WIDE.U32 R4, R15, -0xc, R4 &req={4} ?trans1;
IADD3 R19, PT, PT, R3, -R15, RZ ?WAIT3_END_GROUP;
IADD.64 R6, R8.reuse, UR8 &req={2} ?trans2;
IADD.64 R8, R8, UR10 ?WAIT3_END_GROUP;
IADD3 R21, PT, PT, -R15, R5, RZ &req={3} ?WAIT7_END_GROUP;
LDCU UR4, c[0x0][0x380] &req={0} &wr=0x0 ?trans1;
MOV R23, RZ &req={2} ?trans1;
ISETP.GE.AND P0, PT, R17, UR4, PT &req={0} ?WAIT13_END_GROUP;
@!P0 LDC.64 R10, c[0x0][0x388] &wr=0x0 ?trans2;
@!P0 IMAD.WIDE.U32 R10, R17, 0x4, R10 &req={0} ?WAIT5_END_GROUP;
@!P0 LDG.E R23, desc[UR6][R10.64] &req={1} &rd=0x0 &wr=0x5 ?trans2;
WARPSYNC.ALL ?trans5;
NOP ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans8;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
UMOV UR4, 0x400 ?WAIT2_END_GROUP;
@!P0 LDC.64 R10, c[0x0][0x390] &req={0} &wr=0x0 ?trans8;
@!P0 LDC.64 R12, c[0x0][0x3a8] &wr=0x2 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?WAIT6_END_GROUP;
LEA R16, R15, UR4, 0x2 ?trans1;
@!P0 IMAD.WIDE.U32 R10, R17, 0x4, R10 &req={0} ?WAIT4_END_GROUP;
STS [R16], R23 &req={5} &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P0 LDG.E R11, desc[UR6][R10.64] &wr=0x3 ?trans1;
IADD3 R14, PT, PT, R0, -R17, RZ ?trans1;
@!P0 IMAD.WIDE R12, R23, 0x4, R12 &req={2} ?trans1;
BSSY.RECONVERGENT B0, 0x8b0 ?trans3;
VIMNMX.S32 R14, R14, 0x80, PT ?WAIT5_END_GROUP;
IMAD.SHL.U32 R14, R14, 0x4, RZ ?trans1;
@!P0 STG.E desc[UR6][R12.64], R11 &req={3} &rd=0x0 ?trans4;
ISETP.GE.AND P0, PT, R15, R14, PT ?WAIT13_END_GROUP;
@P0 BRA 0x8a0 &req={0} ?trans5;
IADD3 R10, PT, PT, R14, -R15.reuse, RZ ?trans2;
LOP3.LUT R16, R15, 0x3fc, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B1, 0x660 ?trans1;
MOV R18, R2 ?trans1;
MOV R20, R4 ?trans1;
ISETP.GT.AND P1, PT, R10, 0x180, PT ?trans1;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?trans1;
MOV R23, R15 ?trans1;
IADD3 R16, PT, PT, R16, UR4, RZ ?trans1;
IMAD.WIDE.U32 R12, R17, 0x10, R18 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R10, R17, 0x10, R20 ?WAIT5_END_GROUP;
@!P1 BRA 0x650 ?trans5;
PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x80 ?trans2;
IADD3 R18, PT, PT, R14, -0x180, RZ ?WAIT11_END_GROUP;
LDG.E R33, desc[UR6][R10.64] &wr=0x2 ?trans4;
LDG.E R35, desc[UR6][R12.64] &req={0} &wr=0x3 ?trans4;
LDS R25, [R16] &wr=0x0 ?trans4;
LDS R27, [R16] &wr=0x1 ?trans4;
LDS R29, [R16+0x80] &wr=0x4 ?trans4;
LDS R31, [R16+0x80] &wr=0x5 ?trans1;
IMAD.WIDE R24, R25, 0x10, R6 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R26, R27, 0x10, R8 &req={1} ?trans1;
STG.E desc[UR6][R24.64], R33 &req={2} &rd=0x0 ?trans4;
STG.E desc[UR6][R26.64], R35 &req={3} ?trans4;
LDG.E R37, desc[UR6][R10.64+0x200] &wr=0x2 ?trans4;
LDG.E R20, desc[UR6][R12.64+0x200] &wr=0x3 ?trans1;
IMAD.WIDE R28, R29, 0x10, R6 &req={4} ?WAIT3_END_GROUP;
LDS R25, [R16+0x100] &wr=0x1 ?trans1;
IMAD.WIDE R30, R31, 0x10, R8 &req={5} ?WAIT3_END_GROUP;
LDS R27, [R16+0x100] &wr=0x4 ?trans4;
STG.E desc[UR6][R28.64], R37 &req={2} &rd=0x2 ?trans4;
STG.E desc[UR6][R30.64], R20 &req={3} ?trans4;
LDG.E R22, desc[UR6][R10.64+0x400] &wr=0x3 ?trans4;
LDG.E R33, desc[UR6][R12.64+0x400] &req={0} &wr=0x5 ?trans1;
IMAD.WIDE R24, R25, 0x10, R6 &req={1} ?WAIT3_END_GROUP;
LDS R29, [R16+0x180] &wr=0x0 ?trans1;
IMAD.WIDE R26, R27, 0x10, R8 &req={4} ?WAIT3_END_GROUP;
LDS R31, [R16+0x180] &rd=0x1 &wr=0x4 ?trans4;
STG.E desc[UR6][R24.64], R22 &req={3} &rd=0x3 ?trans4;
STG.E desc[UR6][R26.64], R33 &req={5} &rd=0x3 ?trans4;
LDG.E R35, desc[UR6][R10.64+0x600] &rd=0x5 &wr=0x3 ?trans4;
LDG.E R37, desc[UR6][R12.64+0x600] &req={2} &rd=0x2 &wr=0x3 ?trans1;
IMAD.WIDE R28, R29, 0x10, R6 &req={0} ?trans1;
IADD3 R23, PT, PT, R23, 0x200, RZ ?WAIT2_END_GROUP;
IADD3 R16, PT, PT, R16, 0x200, RZ &req={1} ?trans1;
IMAD.WIDE R30, R31, 0x10, R8 &req={4} ?trans1;
IADD.64 R10, R10, 0x800 &req={5} ?trans2;
ISETP.GE.AND P1, PT, R23, R18, PT ?trans1;
IADD.64 R12, R12, 0x800 &req={2} ?trans2;
STG.E desc[UR6][R28.64], R35 &req={3} &rd=0x0 ?trans4;
STG.E desc[UR6][R30.64], R37 &rd=0x0 ?trans6;
@!P1 BRA 0x3f0 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
IADD3 R18, PT, PT, R14, -R23, RZ ?trans1;
BSSY.RECONVERGENT B1, 0x800 ?trans4;
ISETP.GT.AND P1, PT, R18, 0x80, PT ?WAIT13_END_GROUP;
@!P1 BRA 0x7f0 ?trans5;
LDG.E R33, desc[UR6][R10.64] &wr=0x2 ?trans4;
LDG.E R35, desc[UR6][R12.64] &req={0} &wr=0x3 ?trans4;
LDS R25, [R16] &wr=0x0 ?trans4;
LDS R29, [R16] &wr=0x1 ?trans4;
LDS R27, [R16+0x80] &wr=0x4 ?trans4;
LDS R31, [R16+0x80] &wr=0x5 ?trans1;
IMAD.WIDE R24, R25, 0x10, R6 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R28, R29, 0x10, R8 &req={1} ?trans1;
STG.E desc[UR6][R24.64], R33 &req={2} &rd=0x1 ?trans4;
STG.E desc[UR6][R28.64], R35 &req={3} &rd=0x1 ?trans4;
LDG.E R37, desc[UR6][R10.64+0x200] &rd=0x0 &wr=0x2 ?trans4;
LDG.E R18, desc[UR6][R12.64+0x200] &rd=0x3 &wr=0x2 ?trans1;
IMAD.WIDE R26, R27, 0x10, R6 &req={4} ?trans1;
PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x80 ?WAIT2_END_GROUP;
IADD3 R23, PT, PT, R23, 0x100, RZ ?trans1;
IMAD.WIDE R30, R31, 0x10, R8 &req={5} ?trans1;
IADD.64 R10, R10, 0x400 &req={0} ?WAIT3_END_GROUP;
IADD3 R16, PT, PT, R16, 0x100, RZ ?trans1;
IADD.64 R12, R12, 0x400 &req={3} ?trans2;
STG.E desc[UR6][R26.64], R37 &req={2} &rd=0x1 ?trans4;
STG.E desc[UR6][R30.64], R18 &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B1 ?trans5;
ISETP.LT.OR P0, PT, R23, R14, P0 ?WAIT13_END_GROUP;
@!P0 BRA 0x8a0 ?trans5;
LDG.E R11, desc[UR6][R10.64] &wr=0x2 ?trans4;
LDG.E R13, desc[UR6][R12.64] &wr=0x3 ?trans4;
LDS R23, [R16] &wr=0x4 ?trans4;
LDS R25, [R16] &req={1} &wr=0x1 ?trans1;
IMAD.WIDE R22, R23, 0x10, R6 &req={4} ?WAIT4_END_GROUP;
IMAD.WIDE R24, R25, 0x10, R8 &req={1} ?trans1;
STG.E desc[UR6][R22.64], R11 &req={2} &rd=0x2 ?trans4;
STG.E desc[UR6][R24.64], R13 &req={3} &rd=0x2 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R17, PT, PT, R17, 0x1c00, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R17, R0, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x160 ?trans5;
EXIT ?trans5;
BRA 0x8f0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: boxsum_stage7(int, int*, int*, float (*) [4], float (*) [4], int*, float (*) [4], float (*) [4])
_ZL13boxsum_stage7iPiS_PA4_fS1_S_S1_S1_:
s_load_b32 s16, s[0:1], 0x0
s_lshl_b32 s2, s15, 7
s_waitcnt lgkmcnt(0)
s_cmp_ge_i32 s2, s16
s_cbranch_scc1 .LBB6_10
v_add_nc_u32_e32 v1, s2, v0
s_clause 0x2
s_load_b256 s[4:11], s[0:1], 0x8
s_load_b128 s[12:15], s[0:1], 0x28
s_load_b64 s[2:3], s[0:1], 0x38
v_lshlrev_b32_e32 v3, 2, v0
v_mul_hi_u32_u24_e32 v6, 12, v0
s_mov_b64 s[0:1], src_shared_base
v_ashrrev_i32_e32 v2, 31, v1
v_and_b32_e32 v9, 3, v0
v_cmp_ne_u32_e32 vcc_lo, -1, v3
v_add_nc_u32_e32 v13, s16, v0
v_and_b32_e32 v14, 0x3fc, v0
v_lshlrev_b64 v[4:5], 4, v[1:2]
v_mul_u32_u24_e32 v2, 12, v0
v_cndmask_b32_e32 v3, 0, v3, vcc_lo
v_lshlrev_b32_e32 v15, 2, v9
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_co_u32 v2, s0, v4, v2
v_sub_co_ci_u32_e64 v8, s0, v5, v6, s0
v_cndmask_b32_e64 v4, 0, s1, vcc_lo
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v5, vcc_lo, s8, v2
v_add_co_ci_u32_e32 v6, vcc_lo, s9, v8, vcc_lo
v_add_co_u32 v7, vcc_lo, s10, v2
v_add_co_ci_u32_e32 v8, vcc_lo, s11, v8, vcc_lo
s_mov_b32 s8, 0
.LBB6_2:
v_cmp_gt_i32_e32 vcc_lo, s16, v1
v_ashrrev_i32_e32 v2, 31, v1
v_mov_b32_e32 v9, 0
s_and_saveexec_b32 s9, vcc_lo
s_cbranch_execz .LBB6_4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[9:10], 2, v[1:2]
v_add_co_u32 v9, s0, s4, v9
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v10, s0, s5, v10, s0
global_load_b32 v9, v[9:10], off
.LBB6_4:
s_or_b32 exec_lo, exec_lo, s9
s_waitcnt vmcnt(0)
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
flat_store_b32 v[3:4], v9 dlc
s_waitcnt_vscnt null, 0x0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_saveexec_b32 s0, vcc_lo
s_cbranch_execz .LBB6_6
v_lshlrev_b64 v[10:11], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v10, vcc_lo, s6, v10
v_add_co_ci_u32_e32 v11, vcc_lo, s7, v11, vcc_lo
global_load_b32 v2, v[10:11], off
v_ashrrev_i32_e32 v10, 31, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[9:10], 2, v[9:10]
v_add_co_u32 v9, vcc_lo, s12, v9
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v10, vcc_lo, s13, v10, vcc_lo
s_waitcnt vmcnt(0)
global_store_b32 v[9:10], v2, off
.LBB6_6:
s_or_b32 exec_lo, exec_lo, s0
v_sub_nc_u32_e32 v2, v0, v1
s_mov_b32 s9, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v2, s16, v2
v_min_i32_e32 v2, 0x80, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b32_e32 v2, 2, v2
v_cmpx_lt_i32_e64 v0, v2
s_cbranch_execz .LBB6_9
v_mov_b32_e32 v10, v8
v_dual_mov_b32 v12, v6 :: v_dual_mov_b32 v17, v0
v_dual_mov_b32 v16, v14 :: v_dual_mov_b32 v9, v7
v_mov_b32_e32 v11, v5
s_mov_b32 s10, 0
.LBB6_8:
s_delay_alu instid0(VALU_DEP_2)
v_cmp_ne_u32_e32 vcc_lo, -1, v16
global_load_b32 v22, v[11:12], off
global_load_b32 v23, v[9:10], off
v_add_nc_u32_e32 v17, 0x80, v17
v_cndmask_b32_e64 v19, 0, s1, vcc_lo
v_cndmask_b32_e32 v18, 0, v16, vcc_lo
v_add_nc_u32_e32 v16, 0x80, v16
flat_load_b32 v20, v[18:19] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_ashrrev_i32_e32 v21, 31, v20
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[20:21], 4, v[20:21]
v_add_co_u32 v20, vcc_lo, s14, v20
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v21, vcc_lo, s15, v21, vcc_lo
v_add_co_u32 v20, vcc_lo, v20, v15
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v21, vcc_lo, 0, v21, vcc_lo
v_add_co_u32 v11, vcc_lo, 0x200, v11
v_add_co_ci_u32_e32 v12, vcc_lo, 0, v12, vcc_lo
global_store_b32 v[20:21], v22, off
flat_load_b32 v18, v[18:19] glc dlc
s_waitcnt vmcnt(0)
v_add_co_u32 v9, vcc_lo, 0x200, v9
v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
s_waitcnt lgkmcnt(0)
v_ashrrev_i32_e32 v19, 31, v18
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[18:19], 4, v[18:19]
v_add_co_u32 v18, vcc_lo, s2, v18
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v19, vcc_lo, s3, v19, vcc_lo
v_cmp_ge_i32_e32 vcc_lo, v17, v2
v_add_co_u32 v18, s0, v18, v15
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v19, s0, 0, v19, s0
s_or_b32 s10, vcc_lo, s10
global_store_b32 v[18:19], v23, off
s_and_not1_b32 exec_lo, exec_lo, s10
s_cbranch_execnz .LBB6_8
.LBB6_9:
s_or_b32 exec_lo, exec_lo, s9
v_add_nc_u32_e32 v1, 0x1c00, v1
v_add_co_u32 v5, vcc_lo, 0x1c000, v5
v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_ge_i32_e32 vcc_lo, v1, v13
v_add_co_u32 v7, s0, 0x1c000, v7
v_add_co_ci_u32_e64 v8, s0, 0, v8, s0
s_or_b32 s8, vcc_lo, s8
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s8
s_cbranch_execnz .LBB6_2
.LBB6_10:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| boxsum_stage7 | 3,969 | 2,840 | stackv2-00000-of-00015 |
// Demangled: add(int*, int*, int*, int)
Function : _Z3addPiS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R8, c[0x0][0x398] &wr=0x1 ?trans1;
S2R R9, SR_CTAID.X &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x3 ?trans1;
HFMA2 R20, -RZ, RZ, 0, 0 ?trans1;
ISETP.GE.AND P0, PT, R8, 0x1, PT &req={1} ?WAIT13_END_GROUP;
@!P0 BRA 0xa40 &req={3,2,0} ?trans5;
ISETP.GE.U32.AND P1, PT, R8.reuse, 0x10, PT ?trans1;
LOP3.LUT R5, R8, 0xf, RZ, 0xc0, !PT ?trans1;
IMAD R4, R9, R8, RZ ?trans1;
MOV R11, RZ ?trans1;
MOV R20, RZ ?trans2;
ISETP.NE.AND P0, PT, R5, RZ, PT ?WAIT7_END_GROUP;
@!P1 BRA 0x4c0 ?trans6;
LDC.64 R6, c[0x0][0x380] &wr=0x0 ?trans1;
LOP3.LUT R0, R8, 0x7ffffff0, RZ, 0xc0, !PT ?trans1;
MOV R11, RZ ?WAIT3_END_GROUP;
IADD3 R0, PT, PT, -R0, RZ, RZ ?WAIT3_END_GROUP;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans1;
IMAD.WIDE.U32 R6, R4, 0x4, R6 &req={0} ?WAIT5_END_GROUP;
IADD.64 R6, R6, 0x20 ?trans2;
IADD.64 R2, R2, 0x20 &req={1} ?WAIT8_END_GROUP;
LDG.E R23, desc[UR4][R6.64+-0x20] &wr=0x2 ?trans4;
LDG.E R22, desc[UR4][R2.64+-0x20] &wr=0x2 ?trans4;
LDG.E R30, desc[UR4][R6.64+-0x1c] &wr=0x3 ?trans4;
LDG.E R32, desc[UR4][R2.64+-0x1c] &wr=0x3 ?trans4;
LDG.E R31, desc[UR4][R6.64+-0x18] &wr=0x4 ?trans4;
LDG.E R28, desc[UR4][R2.64+-0x18] &wr=0x4 ?trans4;
LDG.E R26, desc[UR4][R6.64+-0x14] &wr=0x5 ?trans4;
LDG.E R29, desc[UR4][R2.64+-0x14] &wr=0x5 ?trans4;
LDG.E R24, desc[UR4][R6.64+-0x10] &wr=0x5 ?trans4;
LDG.E R27, desc[UR4][R2.64+-0x10] &wr=0x5 ?trans4;
LDG.E R18, desc[UR4][R6.64+-0xc] &wr=0x5 ?trans4;
LDG.E R21, desc[UR4][R2.64+-0xc] &wr=0x5 ?trans4;
LDG.E R16, desc[UR4][R6.64+-0x8] &wr=0x5 ?trans4;
LDG.E R19, desc[UR4][R2.64+-0x8] &wr=0x5 ?trans4;
LDG.E R14, desc[UR4][R6.64+-0x4] &wr=0x5 ?trans4;
LDG.E R17, desc[UR4][R2.64+-0x4] &wr=0x5 ?trans4;
LDG.E R12, desc[UR4][R6.64] &wr=0x5 ?trans4;
LDG.E R15, desc[UR4][R2.64] &wr=0x5 ?trans4;
LDG.E R10, desc[UR4][R6.64+0x4] &wr=0x5 ?trans4;
LDG.E R13, desc[UR4][R2.64+0x4] &wr=0x5 ?trans4;
LDG.E R25, desc[UR4][R2.64+0x8] &wr=0x5 ?trans4;
LDG.E R33, desc[UR4][R2.64+0x18] &wr=0x5 ?trans1;
IMAD R23, R23, R22, R20 &req={2} ?WAIT3_END_GROUP;
LDG.E R22, desc[UR4][R6.64+0x8] &wr=0x2 ?trans4;
LDG.E R20, desc[UR4][R6.64+0xc] &wr=0x2 ?trans1;
IMAD R30, R30, R32, R23 &req={3} ?WAIT3_END_GROUP;
LDG.E R23, desc[UR4][R2.64+0xc] &wr=0x3 ?trans1;
IMAD R30, R31, R28, R30 &req={4} ?WAIT3_END_GROUP;
LDG.E R28, desc[UR4][R6.64+0x10] &wr=0x4 ?trans4;
LDG.E R31, desc[UR4][R2.64+0x10] &wr=0x4 ?trans1;
IMAD R30, R26, R29, R30 &req={5} ?WAIT3_END_GROUP;
LDG.E R26, desc[UR4][R6.64+0x14] &wr=0x5 ?trans4;
LDG.E R29, desc[UR4][R2.64+0x14] &wr=0x5 ?trans1;
IMAD R32, R24, R27, R30 ?WAIT3_END_GROUP;
LDG.E R30, desc[UR4][R6.64+0x18] &wr=0x5 ?trans4;
LDG.E R24, desc[UR4][R6.64+0x1c] &rd=0x0 &wr=0x5 ?trans4;
LDG.E R27, desc[UR4][R2.64+0x1c] &rd=0x1 &wr=0x5 ?trans1;
IMAD R18, R18, R21, R32 ?WAIT4_END_GROUP;
IMAD R16, R16, R19, R18 ?WAIT4_END_GROUP;
IMAD R14, R14, R17, R16 ?WAIT4_END_GROUP;
IMAD R12, R12, R15, R14 ?trans1;
IADD3 R0, PT, PT, R0, 0x10, RZ ?WAIT3_END_GROUP;
IMAD R10, R10, R13, R12 ?trans2;
ISETP.NE.AND P1, PT, R0, RZ, PT ?trans1;
IADD.64 R6, R6, 0x40 &req={0} ?trans2;
IADD.64 R2, R2, 0x40 &req={1} ?WAIT3_END_GROUP;
IADD3 R11, PT, PT, R11, 0x10, RZ ?trans1;
IMAD R10, R22, R25, R10 &req={2} ?WAIT4_END_GROUP;
IMAD R10, R20, R23, R10 &req={3} ?WAIT4_END_GROUP;
IMAD R10, R28, R31, R10 &req={4} ?WAIT4_END_GROUP;
IMAD R10, R26, R29, R10 &req={5} ?WAIT4_END_GROUP;
IMAD R10, R30, R33, R10 ?WAIT4_END_GROUP;
IMAD R20, R24, R27, R10 ?trans1;
@P1 BRA 0x160 ?trans6;
@!P0 BRA 0xa40 ?trans5;
ISETP.GE.U32.AND P1, PT, R5, 0x8, PT ?trans1;
LOP3.LUT R18, R8, 0x7, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R18, RZ, PT ?WAIT7_END_GROUP;
@!P1 BRA 0x760 ?trans6;
LDC.64 R12, c[0x0][0x380] &wr=0x0 ?trans1;
MOV R2, R11.reuse ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?trans1;
MOV R5, RZ ?trans1;
IADD3 R17, PT, PT, R4, R11, RZ ?WAIT4_END_GROUP;
LDC.64 R22, c[0x0][0x380] &wr=0x1 ?trans1;
IADD.64 R14, R2, R4 ?WAIT7_END_GROUP;
LDC.64 R6, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R12, R17, 0x4, R12 &req={0} ?WAIT6_END_GROUP;
LDG.E R13, desc[UR4][R12.64] &wr=0x3 ?trans1;
LEA R2, P1, R14, R22, 0x2 &req={1} ?WAIT4_END_GROUP;
LEA.HI.X R3, R14, R23, R15, 0x2, P1 ?trans1;
IMAD.WIDE.U32 R6, R11, 0x4, R6 &req={2} ?WAIT4_END_GROUP;
LDG.E R15, desc[UR4][R2.64+0x4] &wr=0x2 ?trans4;
LDG.E R0, desc[UR4][R6.64] &wr=0x3 ?trans4;
LDG.E R10, desc[UR4][R6.64+0x4] &wr=0x2 ?trans4;
LDG.E R14, desc[UR4][R6.64+0x8] &wr=0x4 ?trans4;
LDG.E R17, desc[UR4][R2.64+0x8] &wr=0x4 ?trans4;
LDG.E R16, desc[UR4][R6.64+0xc] &wr=0x5 ?trans4;
LDG.E R19, desc[UR4][R2.64+0xc] &wr=0x5 ?trans4;
LDG.E R22, desc[UR4][R6.64+0x10] &wr=0x5 ?trans4;
LDG.E R21, desc[UR4][R2.64+0x10] &wr=0x5 ?trans4;
LDG.E R24, desc[UR4][R6.64+0x14] &wr=0x5 ?trans4;
LDG.E R23, desc[UR4][R2.64+0x14] &wr=0x5 ?trans4;
LDG.E R12, desc[UR4][R6.64+0x18] &wr=0x5 ?trans4;
LDG.E R25, desc[UR4][R2.64+0x18] &wr=0x5 ?trans4;
LDG.E R26, desc[UR4][R6.64+0x1c] &wr=0x5 ?trans4;
LDG.E R27, desc[UR4][R2.64+0x1c] &wr=0x5 ?trans1;
IADD3 R11, PT, PT, R11, 0x8, RZ ?trans1;
IMAD R0, R13, R0, R20 &req={3} ?WAIT4_END_GROUP;
IMAD R0, R15, R10, R0 &req={2} ?WAIT4_END_GROUP;
IMAD R0, R17, R14, R0 &req={4} ?WAIT4_END_GROUP;
IMAD R0, R19, R16, R0 &req={5} ?WAIT4_END_GROUP;
IMAD R0, R21, R22, R0 ?WAIT4_END_GROUP;
IMAD R0, R23, R24, R0 ?WAIT4_END_GROUP;
IMAD R0, R25, R12, R0 ?WAIT4_END_GROUP;
IMAD R20, R27, R26, R0 ?WAIT7_END_GROUP;
@!P0 BRA 0xa40 ?trans5;
ISETP.GE.U32.AND P1, PT, R18, 0x4, PT ?trans1;
LOP3.LUT R8, R8, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R8, RZ, PT ?WAIT7_END_GROUP;
@!P1 BRA 0x950 ?trans6;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
MOV R6, R11.reuse ?trans1;
HFMA2 R7, -RZ, RZ, 0, 0 ?trans1;
MOV R14, R4 ?trans1;
HFMA2 R15, -RZ, RZ, 0, 0 ?trans1;
IADD3 R17, PT, PT, R4, R11, RZ ?WAIT3_END_GROUP;
LDC.64 R18, c[0x0][0x380] &wr=0x1 ?trans1;
IADD.64 R14, R6, R14 ?WAIT7_END_GROUP;
LDC.64 R12, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R2, R17, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R3, desc[UR4][R2.64] &wr=0x3 ?trans1;
LEA R6, P1, R14, R18, 0x2 &req={1} ?WAIT4_END_GROUP;
LEA.HI.X R7, R14, R19, R15, 0x2, P1 ?trans1;
IMAD.WIDE.U32 R12, R11, 0x4, R12 &req={2} ?WAIT4_END_GROUP;
LDG.E R15, desc[UR4][R6.64+0x4] &wr=0x2 ?trans4;
LDG.E R0, desc[UR4][R12.64] &wr=0x3 ?trans4;
LDG.E R10, desc[UR4][R12.64+0x4] &wr=0x2 ?trans4;
LDG.E R14, desc[UR4][R12.64+0x8] &wr=0x4 ?trans4;
LDG.E R17, desc[UR4][R6.64+0x8] &wr=0x4 ?trans4;
LDG.E R16, desc[UR4][R12.64+0xc] &wr=0x5 ?trans4;
LDG.E R19, desc[UR4][R6.64+0xc] &wr=0x5 ?trans1;
IADD3 R11, PT, PT, R11, 0x4, RZ ?trans1;
IMAD R0, R3, R0, R20 &req={3} ?WAIT4_END_GROUP;
IMAD R0, R15, R10, R0 &req={2} ?WAIT4_END_GROUP;
IMAD R0, R17, R14, R0 &req={4} ?WAIT4_END_GROUP;
IMAD R20, R19, R16, R0 &req={5} ?WAIT7_END_GROUP;
@!P0 BRA 0xa40 ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
IADD3 R5, PT, PT, R4, R11, RZ ?trans2;
IADD3 R8, PT, PT, -R8, RZ, RZ ?WAIT5_END_GROUP;
LDC.64 R6, c[0x0][0x380] &wr=0x1 ?trans1;
IMAD.WIDE.U32 R2, R11, 0x4, R2 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R5, 0x4, R6 &req={1} ?WAIT7_END_GROUP;
LDG.E R7, desc[UR4][R4.64] &rd=0x0 &wr=0x2 ?trans4;
LDG.E R0, desc[UR4][R2.64] &rd=0x1 &wr=0x2 ?trans1;
IADD3 R8, PT, PT, R8, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R8, RZ, PT ?trans1;
IADD.64 R4, R4, 0x4 &req={0} ?trans2;
IADD.64 R2, R2, 0x4 &req={1} ?trans2;
IMAD R20, R7, R0, R20 &req={2} ?WAIT8_END_GROUP;
@P0 BRA 0x9c0 ?trans5;
LDC.64 R2, c[0x0][0x390] &wr=0x0 ?trans2;
IMAD.WIDE.U32 R2, R9, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R20 ?trans1;
EXIT ?trans5;
BRA 0xa80;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: add(int*, int*, int*, int)
_Z3addPiS_S_i:
s_clause 0x2
s_load_b32 s3, s[0:1], 0x18
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_mov_b32 s2, s15
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s3, 1
s_cbranch_scc1 .LBB0_3
s_mul_i32 s8, s2, s3
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_ashr_i32 s9, s8, 31
s_lshl_b64 s[8:9], s[8:9], 2
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s4, s4, s8
s_addc_u32 s5, s5, s9
s_mov_b32 s8, 0
.LBB0_2:
s_load_b32 s9, s[4:5], 0x0
s_load_b32 s10, s[6:7], 0x0
s_add_i32 s3, s3, -1
s_waitcnt lgkmcnt(0)
s_mul_i32 s9, s10, s9
s_delay_alu instid0(SALU_CYCLE_1)
s_add_i32 s8, s9, s8
s_add_u32 s4, s4, 4
s_addc_u32 s5, s5, 0
s_add_u32 s6, s6, 4
s_addc_u32 s7, s7, 0
s_cmp_eq_u32 s3, 0
s_cbranch_scc0 .LBB0_2
s_branch .LBB0_4
.LBB0_3:
s_mov_b32 s8, 0
.LBB0_4:
s_ashr_i32 s3, s2, 31
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s8
s_lshl_b64 s[2:3], s[2:3], 2
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s0, s0, s2
s_addc_u32 s1, s1, s3
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| add | 4,638 | 642 | stackv2-00000-of-00015 |
// Demangled: matrixMulKernelTiled(float*, float*, float*, int, int, int)
Function : _Z20matrixMulKernelTiledPfS_S_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R9, c[0x0][0x398] &wr=0x1 ?trans1;
S2R R24, SR_CTAID.Y &wr=0x2 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x3 ?trans1;
HFMA2 R17, -RZ, RZ, 0, 0 ?trans1;
S2R R21, SR_TID.Y &wr=0x2 ?trans1;
S2R R5, SR_CTAID.X &wr=0x4 ?trans1;
S2R R22, SR_TID.X &wr=0x4 ?trans1;
ISETP.GE.AND P0, PT, R9, 0x20, PT &req={1} ?trans1;
LEA R24, R24, R21, 0x5 &req={2} ?WAIT2_END_GROUP;
LEA R23, R5, R22, 0x5 &req={4} ?WAIT10_END_GROUP;
@!P0 BRA 0x840 &req={3,0} ?trans5;
S2UR UR6, SR_CgaCtaId &wr=0x0 ?trans1;
LDCU UR7, c[0x0][0x3a0] &wr=0x1 ?trans1;
SHF.R.S32.HI R0, RZ, 0x1f, R9 ?trans1;
IMAD R6, R24, R9.reuse, R22 ?trans1;
MOV R17, RZ ?trans1;
LDCU UR10, c[0x0][0x39c] &wr=0x2 ?trans1;
LEA.HI R0, R0, R9, RZ, 0x5 ?trans2;
LDC R3, c[0x0][0x3a0] &wr=0x3 ?trans1;
UMOV UR4, 0x400 ?trans1;
SHF.R.S32.HI R7, RZ, 0x5, R0 ?trans1;
UIADD3 UR5, UPT, UPT, UR4, 0x1000, URZ ?trans1;
LDCU.64 UR12, c[0x0][0x398] &wr=0x4 ?trans2;
IADD3 R7, PT, PT, -R7, RZ, RZ ?trans1;
IMAD R20, R21, UR7, R22 &req={1} ?trans1;
ISETP.GE.AND P0, PT, R23, UR7, PT ?trans1;
ULEA UR4, UR6, UR4, 0x18 &req={0} ?trans1;
ULEA UR5, UR6, UR5, 0x18 ?WAIT2_END_GROUP;
LEA R20, R5, R20, 0x5 ?trans1;
ISETP.LT.AND P0, PT, R24, UR10, !P0 &req={2} ?trans2;
LEA R2, R21.reuse, UR4, 0x7 ?trans2;
LEA R0, R22.reuse, UR5, 0x2 ?trans2;
LEA R4, R22, R2, 0x2 ?trans2;
LEA R5, R21, R0, 0x7 &req={4} ?WAIT7_END_GROUP;
ISETP.GE.AND P2, PT, R22, UR12, PT ?trans1;
ISETP.GE.U32.AND P1, PT, R23, UR12, PT ?trans1;
CS2R R12, SRZ &req={0} ?WAIT3_END_GROUP;
ISETP.GE.OR P2, PT, R24, UR13, P2 ?trans1;
ISETP.GE.OR P1, PT, R21, UR12, P1 ?WAIT12_END_GROUP;
@!P2 LDC.64 R8, c[0x0][0x380] &wr=0x0 ?trans8;
@!P1 LDC.64 R10, c[0x0][0x388] &wr=0x1 ?trans1;
@!P2 IMAD.WIDE R8, R6, 0x4, R8 &req={0} ?WAIT5_END_GROUP;
@!P2 LDG.E R13, desc[UR8][R8.64] &wr=0x2 ?trans1;
@!P1 IMAD.WIDE R10, R20, 0x4, R10 &req={1} ?WAIT5_END_GROUP;
@!P1 LDG.E R12, desc[UR8][R10.64] &wr=0x4 ?trans1;
BSSY.RECONVERGENT B0, 0x7c0 ?trans3;
STS [R4], R13 &req={2} &rd=0x0 ?trans4;
STS [R5], R12 &req={4} &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P0 BRA 0x7b0 ?trans5;
LDS R16, [R0] ?trans4;
LDS.128 R8, [R2] &wr=0x1 ?trans4;
LDS R29, [R0+0x80] &wr=0x2 ?trans4;
LDS R25, [R0+0x100] &wr=0x4 ?trans4;
LDS R34, [R0+0x180] &wr=0x5 ?trans4;
LDS R33, [R0+0x200] ?trans4;
LDS.128 R12, [R2+0x10] &req={0} &wr=0x0 ?trans4;
LDS R26, [R0+0x280] &wr=0x3 ?trans4;
LDS R27, [R0+0x300] &wr=0x3 ?trans4;
LDS R30, [R0+0x380] &wr=0x3 ?trans4;
LDS R31, [R0+0x400] ?trans1;
FFMA R8, R8, R16, R17 &req={1} ?WAIT3_END_GROUP;
LDS R28, [R0+0x480] ?trans1;
FFMA R8, R29, R9, R8 &req={2} ?WAIT3_END_GROUP;
LDS.128 R16, [R2+0x20] &wr=0x1 ?trans1;
FFMA R25, R25, R10, R8 &req={4} ?WAIT3_END_GROUP;
LDS R29, [R0+0x500] &wr=0x2 ?trans1;
FFMA R35, R34, R11, R25 &req={5} ?WAIT3_END_GROUP;
LDS R32, [R0+0x580] &wr=0x4 ?trans4;
LDS R25, [R0+0x600] ?trans1;
FFMA R33, R12, R33, R35 &req={0} ?WAIT3_END_GROUP;
LDS.128 R8, [R2+0x30] &wr=0x0 ?trans1;
FFMA R12, R26, R13, R33 &req={3} ?WAIT3_END_GROUP;
LDS R34, [R0+0x980] ?trans1;
FFMA R13, R27, R14, R12 ?WAIT3_END_GROUP;
LDS R26, [R0+0x680] &wr=0x3 ?trans1;
FFMA R13, R30, R15, R13 ?WAIT3_END_GROUP;
LDS R27, [R0+0x700] &wr=0x5 ?trans4;
LDS R30, [R0+0x780] &wr=0x5 ?trans1;
FFMA R33, R16, R31, R13 &req={1} ?WAIT3_END_GROUP;
LDS R31, [R0+0x800] ?trans1;
FFMA R16, R28, R17, R33 ?WAIT3_END_GROUP;
LDS.128 R12, [R2+0x40] &wr=0x1 ?trans1;
FFMA R17, R29, R18, R16 &req={2} ?WAIT3_END_GROUP;
LDS R28, [R0+0x880] &wr=0x2 ?trans1;
FFMA R17, R32, R19, R17 &req={4} ?WAIT3_END_GROUP;
LDS R29, [R0+0x900] &wr=0x4 ?trans1;
FFMA R25, R8, R25, R17 &req={0} ?WAIT3_END_GROUP;
LDS R33, [R0+0xa00] ?trans4;
LDS.128 R16, [R2+0x50] &wr=0x0 ?trans1;
FFMA R26, R26, R9, R25 &req={3} ?WAIT3_END_GROUP;
LDS R32, [R0+0xa80] &wr=0x3 ?trans1;
FFMA R27, R27, R10, R26 &req={5} ?WAIT3_END_GROUP;
LDS R25, [R0+0xb00] &wr=0x5 ?trans1;
FFMA R11, R30, R11, R27 ?WAIT3_END_GROUP;
LDS R26, [R0+0xb80] &wr=0x5 ?trans4;
LDS R27, [R0+0xc00] ?trans4;
LDS R30, [R0+0xd80] ?trans1;
FFMA R31, R12, R31, R11 &req={1} ?WAIT3_END_GROUP;
LDS.128 R8, [R2+0x60] &wr=0x1 ?trans1;
FFMA R12, R28, R13, R31 &req={2} ?WAIT3_END_GROUP;
LDS R28, [R0+0xc80] &wr=0x2 ?trans1;
FFMA R13, R29, R14, R12 &req={4} ?WAIT3_END_GROUP;
LDS R29, [R0+0xd00] &wr=0x4 ?trans1;
FFMA R13, R34, R15, R13 ?WAIT3_END_GROUP;
LDS R31, [R0+0xe00] ?trans1;
FFMA R33, R16, R33, R13 &req={0} ?WAIT3_END_GROUP;
LDS.128 R12, [R2+0x70] &wr=0x0 ?trans1;
FFMA R34, R32, R17, R33 &req={3} ?WAIT3_END_GROUP;
LDS R32, [R0+0xe80] &wr=0x3 ?trans1;
FFMA R25, R25, R18, R34 &req={5} ?WAIT3_END_GROUP;
LDS R17, [R0+0xf00] &wr=0x5 ?trans1;
FFMA R19, R26, R19, R25 ?WAIT3_END_GROUP;
LDS R16, [R0+0xf80] &wr=0x5 ?trans1;
FFMA R19, R8, R27, R19 &req={1} ?WAIT4_END_GROUP;
FFMA R28, R28, R9, R19 &req={2} ?WAIT4_END_GROUP;
FFMA R29, R29, R10, R28 &req={4} ?WAIT4_END_GROUP;
FFMA R11, R30, R11, R29 ?WAIT4_END_GROUP;
FFMA R11, R12, R31, R11 &req={0} ?WAIT4_END_GROUP;
FFMA R32, R32, R13, R11 &req={3} ?WAIT4_END_GROUP;
FFMA R17, R17, R14, R32 &req={5} ?WAIT4_END_GROUP;
FFMA R17, R16, R15, R17 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R7, PT, PT, R7, 0x1, RZ ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
IADD3 R22, PT, PT, R22, 0x20, RZ ?trans2;
IADD3 R21, PT, PT, R21, 0x20, RZ ?trans2;
IADD3 R6, PT, PT, R6, 0x20, RZ ?trans1;
ISETP.NE.AND P1, PT, R7, RZ, PT ?trans1;
LEA R20, R3, R20, 0x5 &req={3} ?WAIT12_END_GROUP;
@P1 BRA 0x230 ?trans5;
LDCU UR4, c[0x0][0x3a0] &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x39c] &wr=0x2 ?trans1;
ISETP.GE.AND P0, PT, R23, UR4, PT &req={1} ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R24, UR5, P0 &req={2} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDC.64 R2, c[0x0][0x390] &wr=0x1 ?trans1;
IMAD R23, R24, UR4, R23 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R23, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR8][R2.64], R17 ?trans1;
EXIT ?trans5;
BRA 0x8e0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: matrixMulKernelTiled(float*, float*, float*, int, int, int)
_Z20matrixMulKernelTiledPfS_S_iii:
s_clause 0x2
s_load_b128 s[4:7], s[0:1], 0x18
s_load_b128 s[8:11], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x10
v_bfe_u32 v2, v0, 10, 10
v_dual_mov_b32 v4, 0 :: v_dual_and_b32 v3, 0x3ff, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshl_add_u32 v1, s15, 5, v2
v_lshl_add_u32 v0, s14, 5, v3
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_gt_i32_e32 vcc_lo, s5, v1
v_cmp_gt_i32_e64 s1, s6, v0
s_cmp_lt_i32 s4, 32
s_cbranch_scc1 .LBB0_10
v_lshlrev_b32_e32 v4, 2, v3
v_lshlrev_b32_e32 v5, 7, v2
s_ashr_i32 s0, s4, 31
v_mul_lo_u32 v6, v1, s4
s_lshr_b32 s7, s0, 27
v_or_b32_e32 v7, 0x1000, v4
v_cmp_gt_i32_e64 s0, s4, v0
v_add_nc_u32_e32 v8, v5, v4
v_mov_b32_e32 v4, 0
s_add_i32 s7, s4, s7
v_add_nc_u32_e32 v9, v7, v5
s_ashr_i32 s7, s7, 5
s_and_b32 s12, vcc_lo, s1
s_mov_b32 s13, 0
.LBB0_2:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b32 s14, s13, 5
v_dual_mov_b32 v10, 0 :: v_dual_add_nc_u32 v11, s14, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_gt_i32_e64 s1, s4, v11
s_and_b32 s1, vcc_lo, s1
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s15, s1
s_cbranch_execz .LBB0_4
v_add_nc_u32_e32 v10, v11, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v11, 31, v10
v_lshlrev_b64 v[10:11], 2, v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v10, s1, s8, v10
v_add_co_ci_u32_e64 v11, s1, s9, v11, s1
global_load_b32 v10, v[10:11], off
.LBB0_4:
s_or_b32 exec_lo, exec_lo, s15
v_dual_mov_b32 v12, 0 :: v_dual_add_nc_u32 v11, s14, v2
s_waitcnt vmcnt(0)
ds_store_b32 v8, v10
v_cmp_gt_i32_e64 s1, s4, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s1, s1, s0
s_and_saveexec_b32 s14, s1
s_cbranch_execz .LBB0_6
v_mad_u64_u32 v[12:13], null, v11, s6, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v13, 31, v12
v_lshlrev_b64 v[10:11], 2, v[12:13]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v10, s1, s10, v10
v_add_co_ci_u32_e64 v11, s1, s11, v11, s1
global_load_b32 v12, v[10:11], off
.LBB0_6:
s_or_b32 exec_lo, exec_lo, s14
s_waitcnt vmcnt(0)
ds_store_b32 v9, v12
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_saveexec_b32 s1, s12
s_cbranch_execz .LBB0_9
v_mov_b32_e32 v10, v7
s_mov_b32 s14, 0
.LBB0_8:
s_delay_alu instid0(SALU_CYCLE_1)
v_add_nc_u32_e32 v11, s14, v5
s_add_i32 s14, s14, 4
ds_load_b32 v12, v10
ds_load_b32 v11, v11
v_add_nc_u32_e32 v10, 0x80, v10
s_cmpk_lg_i32 s14, 0x80
s_waitcnt lgkmcnt(0)
v_fmac_f32_e32 v4, v11, v12
s_cbranch_scc1 .LBB0_8
.LBB0_9:
s_or_b32 exec_lo, exec_lo, s1
s_add_i32 s13, s13, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s13, s7
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB0_2
.LBB0_10:
v_cmp_gt_i32_e32 vcc_lo, s5, v1
v_cmp_gt_i32_e64 s0, s6, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, vcc_lo, s0
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB0_12
v_mad_u64_u32 v[2:3], null, v1, s6, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[0:1], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_store_b32 v[0:1], v4, off
.LBB0_12:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| matrixMulKernelTiled | 3,594 | 2,052 | stackv2-00000-of-00015 |
// Demangled: matrix(int, float*, float*, float*)
Function : _Z6matrixiPfS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R14, SR_CTAID.X &wr=0x1 ?trans7;
LDC R0, c[0x0][0x380] &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x3 ?trans1;
HFMA2 R15, -RZ, RZ, 0, 0 ?trans1;
S2R R16, SR_CTAID.Y &wr=0x4 ?trans1;
S2R R19, SR_TID.Y &wr=0x4 ?trans4;
LDC.64 R2, c[0x0][0x398] &wr=0x5 ?trans1;
S2R R17, SR_TID.X &wr=0x1 ?trans1;
ISETP.GE.AND P0, PT, R0, 0x20, PT &req={2} ?trans1;
LEA R4, R16, R19, 0x5 &req={4} ?WAIT2_END_GROUP;
LEA R5, R14, R17, 0x5 &req={1} ?WAIT5_END_GROUP;
IMAD R5, R4, R0, R5 ?WAIT4_END_GROUP;
IMAD.WIDE R2, R5, 0x4, R2 &req={5} ?trans1;
@!P0 BRA 0x900 &req={3,0} ?trans6;
S2R R12, SR_CgaCtaId &wr=0x0 ?trans1;
LDC.64 R4, c[0x0][0x388] &wr=0x1 ?trans1;
MOV R8, 0x400 ?trans1;
SHF.R.S32.HI R11, RZ, 0x1f, R0 ?trans1;
IMAD R13, R19, R0, R17 ?trans1;
MOV R15, RZ ?trans2;
IADD3 R9, PT, PT, R8, 0x1080, RZ ?trans2;
LDC.64 R6, c[0x0][0x390] &wr=0x2 ?trans1;
LEA R13, R14, R13, 0x5 ?WAIT2_END_GROUP;
LEA R10, R12.reuse, R8, 0x18 &req={0} ?trans2;
LEA.HI R8, R11, R0, RZ, 0x5 ?trans2;
LEA R11, R12, R9, 0x18 ?trans1;
IMAD R10, R19, 0x84, R10 ?trans1;
SHF.R.S32.HI R8, RZ, 0x5, R8 ?trans2;
LEA R9, R16, R19, 0x5 ?trans2;
LEA R11, R17, R11, 0x2 ?WAIT2_END_GROUP;
IADD3 R12, PT, PT, -R8, RZ, RZ ?trans1;
IMAD R9, R9, R0, R17 ?trans1;
LEA R14, R17, R10, 0x2 ?trans1;
IMAD R8, R19, 0x84, R11 ?WAIT7_END_GROUP;
IMAD.WIDE R16, R9, 0x4, R4 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R18, R13, 0x4, R6 &req={2} ?trans2;
LDG.E R17, desc[UR4][R16.64] &wr=0x2 ?trans4;
LDG.E R19, desc[UR4][R18.64] &wr=0x3 ?trans1;
IADD3 R12, PT, PT, R12, 0x1, RZ ?trans2;
IADD3 R9, PT, PT, R9, 0x20, RZ ?trans2;
LEA R13, R0, R13, 0x5 ?trans1;
ISETP.NE.AND P0, PT, R12, RZ, PT ?trans1;
STS [R14], R17 &req={2} ?trans4;
STS [R8], R19 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R22, [R10] ?trans4;
LDS R21, [R11] &wr=0x0 ?trans4;
LDS R30, [R10+0x4] ?trans4;
LDS R29, [R11+0x84] &wr=0x1 ?trans4;
LDS R34, [R10+0x8] ?trans4;
LDS R33, [R11+0x108] &wr=0x2 ?trans4;
LDS R25, [R10+0xc] ?trans4;
LDS R26, [R11+0x18c] &wr=0x3 ?trans4;
LDS R27, [R10+0x10] ?trans4;
LDS R28, [R11+0x210] &wr=0x4 ?trans4;
LDS R19, [R10+0x14] ?trans4;
LDS R20, [R11+0x294] &wr=0x5 ?trans1;
FFMA R21, R22, R21, R15 &req={0} ?WAIT3_END_GROUP;
LDS R31, [R10+0x18] ?trans4;
LDS R32, [R11+0x318] &wr=0x0 ?trans1;
FFMA R21, R30, R29, R21 &req={1} ?WAIT3_END_GROUP;
LDS R23, [R10+0x1c] ?trans4;
LDS R24, [R11+0x39c] &wr=0x1 ?trans1;
FFMA R34, R34, R33, R21 &req={2} ?WAIT3_END_GROUP;
LDS R15, [R10+0x20] ?trans4;
LDS R18, [R11+0x420] &wr=0x2 ?trans1;
FFMA R34, R25, R26, R34 &req={3} ?WAIT3_END_GROUP;
LDS R16, [R10+0x24] ?trans4;
LDS R17, [R11+0x4a4] &wr=0x3 ?trans1;
FFMA R34, R27, R28, R34 &req={4} ?WAIT3_END_GROUP;
LDS R21, [R10+0x28] ?trans4;
LDS R22, [R11+0x528] &wr=0x4 ?trans1;
FFMA R20, R19, R20, R34 &req={5} ?WAIT3_END_GROUP;
LDS R25, [R10+0x2c] ?trans4;
LDS R26, [R11+0x5ac] &wr=0x5 ?trans1;
FFMA R32, R31, R32, R20 &req={0} ?WAIT3_END_GROUP;
LDS R29, [R10+0x30] ?trans4;
LDS R30, [R11+0x630] &wr=0x0 ?trans1;
FFMA R32, R23, R24, R32 &req={1} ?WAIT3_END_GROUP;
LDS R27, [R10+0x34] ?trans4;
LDS R28, [R11+0x6b4] &wr=0x1 ?trans1;
FFMA R31, R15, R18, R32 &req={2} ?WAIT3_END_GROUP;
LDS R20, [R10+0x38] ?trans4;
LDS R19, [R11+0x738] &wr=0x2 ?trans1;
FFMA R32, R16, R17, R31 &req={3} ?WAIT3_END_GROUP;
LDS R23, [R10+0x3c] ?trans4;
LDS R24, [R11+0x7bc] &wr=0x3 ?trans1;
FFMA R32, R21, R22, R32 &req={4} ?WAIT3_END_GROUP;
LDS R15, [R10+0x40] ?trans4;
LDS R18, [R11+0x840] &wr=0x4 ?trans1;
FFMA R32, R25, R26, R32 &req={5} ?WAIT3_END_GROUP;
LDS R17, [R10+0x44] ?trans4;
LDS R16, [R11+0x8c4] &wr=0x5 ?trans1;
FFMA R32, R29, R30, R32 &req={0} ?WAIT3_END_GROUP;
LDS R22, [R10+0x48] ?trans4;
LDS R21, [R11+0x948] &wr=0x0 ?trans1;
FFMA R33, R27, R28, R32 &req={1} ?WAIT3_END_GROUP;
LDS R26, [R10+0x4c] ?trans4;
LDS R25, [R11+0x9cc] &wr=0x1 ?trans1;
FFMA R20, R20, R19, R33 &req={2} ?WAIT3_END_GROUP;
LDS R30, [R10+0x50] ?trans4;
LDS R29, [R11+0xa50] &wr=0x2 ?trans1;
FFMA R24, R23, R24, R20 &req={3} ?WAIT3_END_GROUP;
LDS R32, [R10+0x54] ?trans4;
LDS R31, [R11+0xad4] &wr=0x3 ?trans1;
FFMA R24, R15, R18, R24 &req={4} ?WAIT3_END_GROUP;
LDS R28, [R10+0x58] ?trans4;
LDS R27, [R11+0xb58] &wr=0x4 ?trans1;
FFMA R23, R17, R16, R24 &req={5} ?WAIT3_END_GROUP;
LDS R20, [R10+0x5c] ?trans4;
LDS R19, [R11+0xbdc] &wr=0x5 ?trans1;
FFMA R23, R22, R21, R23 &req={0} ?WAIT3_END_GROUP;
LDS R15, [R10+0x60] ?trans4;
LDS R18, [R11+0xc60] &wr=0x0 ?trans1;
FFMA R25, R26, R25, R23 &req={1} ?WAIT3_END_GROUP;
LDS R16, [R10+0x64] ?trans4;
LDS R17, [R11+0xce4] &wr=0x1 ?trans1;
FFMA R29, R30, R29, R25 &req={2} ?WAIT3_END_GROUP;
LDS R21, [R10+0x68] ?trans4;
LDS R22, [R11+0xd68] &wr=0x2 ?trans1;
FFMA R31, R32, R31, R29 &req={3} ?WAIT3_END_GROUP;
LDS R23, [R10+0x6c] ?trans4;
LDS R24, [R11+0xdec] &wr=0x3 ?trans1;
FFMA R33, R28, R27, R31 &req={4} ?WAIT3_END_GROUP;
LDS R25, [R10+0x70] ?trans4;
LDS R26, [R11+0xe70] &wr=0x4 ?trans1;
FFMA R20, R20, R19, R33 &req={5} ?WAIT3_END_GROUP;
LDS R29, [R10+0x74] ?trans4;
LDS R30, [R11+0xef4] &wr=0x5 ?trans1;
FFMA R15, R15, R18, R20 &req={0} ?WAIT3_END_GROUP;
LDS R31, [R10+0x78] ?trans4;
LDS R32, [R11+0xf78] &wr=0x0 ?trans1;
FFMA R16, R16, R17, R15 &req={1} ?WAIT3_END_GROUP;
LDS R27, [R10+0x7c] ?trans4;
LDS R28, [R11+0xffc] &wr=0x1 ?trans1;
FFMA R16, R21, R22, R16 &req={2} ?WAIT4_END_GROUP;
FFMA R16, R23, R24, R16 &req={3} ?WAIT4_END_GROUP;
FFMA R16, R25, R26, R16 &req={4} ?WAIT4_END_GROUP;
FFMA R16, R29, R30, R16 &req={5} ?WAIT4_END_GROUP;
FFMA R16, R31, R32, R16 &req={0} ?WAIT4_END_GROUP;
FFMA R15, R27, R28, R16 &req={1} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 BRA 0x230 ?trans5;
STG.E desc[UR4][R2.64], R15 ?trans1;
EXIT ?trans5;
BRA 0x920;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: matrix(int, float*, float*, float*)
_Z6matrixiPfS_S_:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
s_load_b64 s[0:1], s[0:1], 0x18
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v3, 0x3ff, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshl_add_u32 v2, s15, 5, v1
v_lshl_add_u32 v0, s14, 5, v3
s_waitcnt lgkmcnt(0)
s_cmp_gt_i32 s2, 31
s_cbranch_scc1 .LBB0_2
v_lshl_add_u32 v4, s14, 5, v3
s_mov_b32 s8, 0
s_mov_b32 s3, 0
s_branch .LBB0_3
.LBB0_2:
s_mov_b32 s8, -1
.LBB0_3:
v_mul_lo_u32 v2, v2, s2
s_and_not1_b32 vcc_lo, exec_lo, s8
s_cbranch_vccnz .LBB0_9
v_lshlrev_b32_e32 v7, 2, v3
s_ashr_i32 s3, s2, 31
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_dual_mov_b32 v3, 0 :: v_dual_add_nc_u32 v4, v2, v3
s_lshr_b32 s3, s3, 27
v_add_nc_u32_e32 v5, 0x1080, v7
v_mul_u32_u24_e32 v6, 0x84, v1
v_mad_u32_u24 v7, 0x84, v1, v7
s_add_i32 s3, s2, s3
s_mov_b32 s8, 0
v_mad_u32_u24 v8, 0x84, v1, v5
s_ashr_i32 s3, s3, 5
.LBB0_5:
s_lshl_b32 s9, s8, 5
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v10, s9, v1
v_add_nc_u32_e32 v9, s9, v4
s_mov_b32 s9, 0
v_mad_u64_u32 v[11:12], null, v10, s2, v[0:1]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v10, 31, v9
v_lshlrev_b64 v[9:10], 2, v[9:10]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v12, 31, v11
v_add_co_u32 v9, vcc_lo, s4, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[11:12], 2, v[11:12]
v_add_co_ci_u32_e32 v10, vcc_lo, s5, v10, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v11, vcc_lo, s6, v11
v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
global_load_b32 v10, v[9:10], off
global_load_b32 v11, v[11:12], off
v_mov_b32_e32 v9, v5
s_waitcnt vmcnt(1)
ds_store_b32 v7, v10
s_waitcnt vmcnt(0)
ds_store_b32 v8, v11
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB0_6:
v_add_nc_u32_e32 v10, s9, v6
s_add_i32 s9, s9, 4
ds_load_b32 v11, v9
ds_load_b32 v10, v10
v_add_nc_u32_e32 v9, 0x84, v9
s_cmpk_eq_i32 s9, 0x80
s_waitcnt lgkmcnt(0)
v_fmac_f32_e32 v3, v10, v11
s_cbranch_scc0 .LBB0_6
s_add_i32 s8, s8, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s8, s3
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB0_5
v_mov_b32_e32 v4, v0
s_branch .LBB0_10
.LBB0_9:
v_mov_b32_e32 v3, s3
.LBB0_10:
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v0, v4, v2
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v3, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| matrix | 3,589 | 1,664 | stackv2-00000-of-00015 |
// Demangled: cuMatMul(double*, double*, double*, int*)
Function : _Z8cuMatMulPdS_S_Pi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans7;
LDC.64 R4, c[0x0][0x398] &wr=0x3 ?trans8;
LDC R17, c[0x0][0x360] &wr=0x1 ?trans8;
LDC.64 R2, c[0x0][0x390] &wr=0x4 ?trans1;
IMAD R17, R17, UR6, R0 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R17, 0x8, R2 &req={4} ?WAIT5_END_GROUP;
STG.E.64 desc[UR4][R2.64], RZ &req={2} &rd=0x1 ?trans4;
LDG.E R0, desc[UR4][R4.64] &req={3} &wr=0x2 ?trans2;
ISETP.GE.AND P0, PT, R0, 0x1, PT &req={2} ?WAIT13_END_GROUP;
@!P0 EXIT &req={1,0} ?trans5;
LDC.64 R12, c[0x0][0x380] &wr=0x0 ?trans1;
MOV.64 R6, RZ ?trans2;
HFMA2 R19, -RZ, RZ, 0, 0 ?WAIT5_END_GROUP;
LDC.64 R14, c[0x0][0x388] &wr=0x1 ?trans2;
IMAD R11, R19.reuse, R0, R17 ?trans2;
IMAD.WIDE.U32 R8, R19, 0x8, R12 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R10, R11, 0x8, R14 &req={1} ?trans2;
LDG.E.64 R8, desc[UR4][R8.64] &wr=0x2 ?trans4;
LDG.E.64 R10, desc[UR4][R10.64] &wr=0x2 ?trans1;
IADD3 R19, PT, PT, R19, 0x1, RZ ?trans1;
DFMA R6, R8, R10, R6 &req={2} &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R2.64], R6 &req={0} &rd=0x2 ?trans4;
LDG.E R0, desc[UR4][R4.64] &wr=0x3 ?trans2;
ISETP.GE.AND P0, PT, R19, R0, PT &req={3} ?WAIT13_END_GROUP;
@!P0 BRA 0x110 &req={2} ?trans5;
EXIT ?trans5;
BRA 0x1d0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: cuMatMul(double*, double*, double*, int*)
_Z8cuMatMulPdS_S_Pi:
s_clause 0x1
s_load_b32 s8, s[0:1], 0x2c
s_load_b256 s[0:7], s[0:1], 0x0
v_mov_b32_e32 v3, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_mov_b32_e32 v4, v3
s_waitcnt lgkmcnt(0)
s_and_b32 s8, s8, 0xffff
s_load_b32 s6, s[6:7], 0x0
v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[5:6], 3, v[1:2]
v_add_co_u32 v5, vcc_lo, s4, v5
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s6, 1
global_store_b64 v[5:6], v[3:4], off
s_cbranch_scc1 .LBB0_3
v_mov_b32_e32 v7, 0
v_mov_b32_e32 v8, 0
s_mov_b32 s4, s6
.LBB0_2:
v_ashrrev_i32_e32 v2, 31, v1
s_add_i32 s4, s4, -1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[9:10], 3, v[1:2]
v_add_nc_u32_e32 v1, s6, v1
v_add_co_u32 v9, vcc_lo, s2, v9
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v10, vcc_lo, s3, v10, vcc_lo
global_load_b64 v[11:12], v3, s[0:1]
global_load_b64 v[9:10], v[9:10], off
s_add_u32 s0, s0, 8
s_addc_u32 s1, s1, 0
s_cmp_eq_u32 s4, 0
s_waitcnt vmcnt(0)
v_fma_f64 v[7:8], v[11:12], v[9:10], v[7:8]
global_store_b64 v[5:6], v[7:8], off
s_cbranch_scc0 .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| cuMatMul | 841 | 800 | stackv2-00000-of-00015 |
// Demangled: race(int volatile*, unsigned long, int, int*)
Function : _Z4racePVimiPi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_TID.X &wr=0x1 ?trans7;
LDC R0, c[0x0][0x390] &wr=0x2 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R3, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x388] &wr=0x3 ?trans1;
ISETP.GE.AND P1, PT, R0, 0x1, PT &req={2} ?trans1;
IMAD R2, R3, UR4, R2 &req={1} ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans4;
SHF.R.S32.HI R3, RZ, 0x1f, R2 ?WAIT5_END_GROUP;
ISETP.GT.U64.AND P0, PT, R2, UR6, PT &req={3} ?WAIT6_END_GROUP;
SEL R6, R2, RZ, !P0 ?trans1;
@!P1 BRA 0xe10 &req={0} ?trans7;
ISETP.GE.U32.AND P1, PT, R0.reuse, 0x10, PT ?trans1;
LOP3.LUT R14, R0, 0xf, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R14, RZ, PT ?WAIT7_END_GROUP;
@!P1 BRA 0x790 ?trans6;
LOP3.LUT R4, R0, 0x7ffffff0, RZ, 0xc0, !PT ?trans1;
LDCU.128 UR8, c[0x0][0x380] &wr=0x0 ?trans3;
IADD3 R4, PT, PT, -R4, RZ, RZ ?WAIT7_END_GROUP;
SHF.R.S32.HI R7, RZ, 0x1f, R6 &req={5} ?trans1;
IMAD R5, R3, UR10, RZ &req={0} ?WAIT4_END_GROUP;
IMAD R5, R2.reuse, UR11, R5 ?trans2;
IMAD.WIDE.U32 R6, R2, UR10, R6 ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, R7, R5, RZ ?trans2;
LEA R8, P1, R6, UR8, 0x2 &req={2} ?WAIT4_END_GROUP;
LEA.HI.X R9, R6, UR9, R7, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E.STRONG.SYS R6, desc[UR4][R8.64] &req={1} &wr=0x2 ?trans2;
SHF.R.S32.HI R7, RZ, 0x1f, R6 &req={2} ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R6, R2, UR10, R6 ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, R5, R7, RZ ?trans2;
LEA R10, P1, R6, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R11, R6, UR9, R7, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E.STRONG.SYS R6, desc[UR4][R10.64] &wr=0x2 ?trans2;
SHF.R.S32.HI R7, RZ, 0x1f, R6 &req={2} ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R6, R2, UR10, R6 ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, R5, R7, RZ ?trans2;
LEA R12, P1, R6, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R13, R6, UR9, R7, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E.STRONG.SYS R6, desc[UR4][R12.64] &wr=0x2 ?trans2;
SHF.R.S32.HI R7, RZ, 0x1f, R6 &req={2} ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R6, R2, UR10, R6 ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, R5, R7, RZ ?trans2;
LEA R8, P1, R6, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R9, R6, UR9, R7, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E.STRONG.SYS R6, desc[UR4][R8.64] &wr=0x2 ?trans2;
SHF.R.S32.HI R7, RZ, 0x1f, R6 &req={2} ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R6, R2, UR10, R6 ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, R5, R7, RZ ?trans2;
LEA R10, P1, R6, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R11, R6, UR9, R7, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E.STRONG.SYS R6, desc[UR4][R10.64] &wr=0x2 ?trans2;
SHF.R.S32.HI R7, RZ, 0x1f, R6 &req={2} ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R6, R2, UR10, R6 ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, R5, R7, RZ ?trans2;
LEA R12, P1, R6, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R13, R6, UR9, R7, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E.STRONG.SYS R6, desc[UR4][R12.64] &wr=0x2 ?trans2;
SHF.R.S32.HI R7, RZ, 0x1f, R6 &req={2} ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R6, R2, UR10, R6 ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, R5, R7, RZ ?trans2;
LEA R8, P1, R6, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R9, R6, UR9, R7, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E.STRONG.SYS R6, desc[UR4][R8.64] &wr=0x2 ?trans2;
SHF.R.S32.HI R7, RZ, 0x1f, R6 &req={2} ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R6, R2, UR10, R6 ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, R5, R7, RZ ?trans2;
LEA R10, P1, R6, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R11, R6, UR9, R7, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E.STRONG.SYS R6, desc[UR4][R10.64] &wr=0x2 ?trans2;
SHF.R.S32.HI R7, RZ, 0x1f, R6 &req={2} ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R6, R2, UR10, R6 ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, R5, R7, RZ ?trans2;
LEA R12, P1, R6, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R13, R6, UR9, R7, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E.STRONG.SYS R6, desc[UR4][R12.64] &wr=0x2 ?trans2;
SHF.R.S32.HI R7, RZ, 0x1f, R6 &req={2} ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R6, R2, UR10, R6 ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, R5, R7, RZ ?trans2;
LEA R8, P1, R6, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R9, R6, UR9, R7, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E.STRONG.SYS R6, desc[UR4][R8.64] &wr=0x2 ?trans2;
SHF.R.S32.HI R7, RZ, 0x1f, R6 &req={2} ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R6, R2, UR10, R6 ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, R5, R7, RZ ?trans2;
LEA R10, P1, R6, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R11, R6, UR9, R7, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E.STRONG.SYS R6, desc[UR4][R10.64] &wr=0x2 ?trans2;
SHF.R.S32.HI R7, RZ, 0x1f, R6 &req={2} ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R6, R2, UR10, R6 ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, R5, R7, RZ ?trans2;
LEA R12, P1, R6, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R13, R6, UR9, R7, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E.STRONG.SYS R6, desc[UR4][R12.64] &wr=0x2 ?trans2;
SHF.R.S32.HI R7, RZ, 0x1f, R6 &req={2} ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R6, R2, UR10, R6 ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, R5, R7, RZ ?trans2;
LEA R8, P1, R6, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R9, R6, UR9, R7, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E.STRONG.SYS R6, desc[UR4][R8.64] &wr=0x2 ?trans2;
SHF.R.S32.HI R7, RZ, 0x1f, R6 &req={2} ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R6, R2, UR10, R6 ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, R5, R7, RZ ?trans2;
LEA R10, P1, R6, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R11, R6, UR9, R7, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E.STRONG.SYS R6, desc[UR4][R10.64] &wr=0x2 ?trans2;
SHF.R.S32.HI R7, RZ, 0x1f, R6 &req={2} ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R6, R2, UR10, R6 ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, R5, R7, RZ ?trans2;
LEA R12, P1, R6, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R13, R6, UR9, R7, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E.STRONG.SYS R6, desc[UR4][R12.64] &wr=0x2 ?trans1;
IADD3 R4, PT, PT, R4, 0x10, RZ ?trans2;
SHF.R.S32.HI R7, RZ, 0x1f, R6 &req={2} ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R6, R2, UR10, R6 ?WAIT5_END_GROUP;
IADD3 R5, PT, PT, R5, R7, RZ ?trans2;
LEA R8, P1, R6, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R9, R6, UR9, R5, 0x2, P1 ?trans1;
ISETP.NE.AND P1, PT, R4, RZ, PT ?WAIT4_END_GROUP;
LDG.E.STRONG.SYS R6, desc[UR4][R8.64] &rd=0x2 &wr=0x5 ?trans9;
@P1 BRA 0x140 ?trans5;
@!P0 BRA 0xe10 ?trans5;
ISETP.GE.U32.AND P1, PT, R14, 0x8, PT ?trans1;
LOP3.LUT R5, R0, 0x7, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R5, RZ, PT ?WAIT7_END_GROUP;
@!P1 BRA 0xb10 ?trans6;
LDCU.128 UR8, c[0x0][0x380] &wr=0x0 ?trans1;
SHF.R.S32.HI R7, RZ, 0x1f, R6.reuse &req={5} ?trans1;
IMAD R9, R3, UR10, RZ &req={2,0} ?trans2;
IMAD.WIDE.U32 R6, R2, UR10, R6 ?WAIT4_END_GROUP;
IMAD R4, R2, UR11, R9 ?trans1;
LEA R8, P1, R6, UR8, 0x2 ?WAIT4_END_GROUP;
IADD3 R7, PT, PT, R4, R7, RZ ?WAIT4_END_GROUP;
LEA.HI.X R9, R6, UR9, R7, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E.STRONG.SYS R6, desc[UR4][R8.64] &req={1} &wr=0x2 ?trans2;
SHF.R.S32.HI R7, RZ, 0x1f, R6 &req={2} ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R6, R2, UR10, R6 ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, R4, R7, RZ ?trans2;
LEA R10, P1, R6, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R11, R6, UR9, R7, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E.STRONG.SYS R6, desc[UR4][R10.64] &wr=0x2 ?trans2;
SHF.R.S32.HI R7, RZ, 0x1f, R6 &req={2} ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R6, R2, UR10, R6 ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, R4, R7, RZ ?trans2;
LEA R12, P1, R6, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R13, R6, UR9, R7, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E.STRONG.SYS R6, desc[UR4][R12.64] &wr=0x2 ?trans2;
SHF.R.S32.HI R7, RZ, 0x1f, R6 &req={2} ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R6, R2, UR10, R6 ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, R4, R7, RZ ?trans2;
LEA R8, P1, R6, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R9, R6, UR9, R7, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E.STRONG.SYS R6, desc[UR4][R8.64] &wr=0x2 ?trans2;
SHF.R.S32.HI R7, RZ, 0x1f, R6 &req={2} ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R6, R2, UR10, R6 ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, R4, R7, RZ ?trans2;
LEA R10, P1, R6, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R11, R6, UR9, R7, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E.STRONG.SYS R6, desc[UR4][R10.64] &wr=0x2 ?trans2;
SHF.R.S32.HI R7, RZ, 0x1f, R6 &req={2} ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R6, R2, UR10, R6 ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, R4, R7, RZ ?trans2;
LEA R12, P1, R6, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R13, R6, UR9, R7, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E.STRONG.SYS R6, desc[UR4][R12.64] &wr=0x2 ?trans2;
SHF.R.S32.HI R7, RZ, 0x1f, R6 &req={2} ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R6, R2, UR10, R6 ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, R4, R7, RZ ?trans2;
LEA R8, P1, R6, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R9, R6, UR9, R7, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E.STRONG.SYS R6, desc[UR4][R8.64] &wr=0x2 ?trans2;
SHF.R.S32.HI R7, RZ, 0x1f, R6 &req={2} ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R6, R2, UR10, R6 ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, R4, R7, RZ ?trans2;
LEA R10, P1, R6, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R11, R6, UR9, R7, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E.STRONG.SYS R6, desc[UR4][R10.64] &rd=0x0 &wr=0x5 ?trans4;
@!P0 BRA 0xe10 ?trans5;
ISETP.GE.U32.AND P1, PT, R5, 0x4, PT ?trans1;
LOP3.LUT R0, R0, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R0, RZ, PT ?WAIT7_END_GROUP;
@!P1 BRA 0xd20 ?trans6;
LDCU.128 UR8, c[0x0][0x380] &wr=0x3 ?trans1;
SHF.R.S32.HI R5, RZ, 0x1f, R6 &req={5} ?trans1;
MOV R4, R6 ?trans1;
IMAD R7, R3, UR10, RZ &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R2, UR10, R4 ?WAIT4_END_GROUP;
IMAD R13, R2, UR11, R7 ?trans1;
LEA R10, P1, R4, UR8, 0x2 &req={0} ?WAIT4_END_GROUP;
IADD3 R5, PT, PT, R13, R5, RZ ?WAIT4_END_GROUP;
LEA.HI.X R11, R4, UR9, R5, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E.STRONG.SYS R4, desc[UR4][R10.64] &req={1} &wr=0x3 ?trans2;
SHF.R.S32.HI R5, RZ, 0x1f, R4 &req={3} ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R4, R2, UR10, R4 ?WAIT5_END_GROUP;
IADD3 R5, PT, PT, R13, R5, RZ ?trans2;
LEA R6, P1, R4, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R7, R4, UR9, R5, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E.STRONG.SYS R4, desc[UR4][R6.64] &wr=0x3 ?trans2;
SHF.R.S32.HI R5, RZ, 0x1f, R4 &req={3} ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R4, R2, UR10, R4 ?WAIT5_END_GROUP;
IADD3 R5, PT, PT, R13, R5, RZ ?trans2;
LEA R8, P1, R4, UR8, 0x2 &req={2} ?WAIT4_END_GROUP;
LEA.HI.X R9, R4, UR9, R5, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E.STRONG.SYS R4, desc[UR4][R8.64] &wr=0x2 ?trans2;
SHF.R.S32.HI R5, RZ, 0x1f, R4 &req={2} ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R4, R2, UR10, R4 ?WAIT5_END_GROUP;
IADD3 R5, PT, PT, R13, R5, RZ ?trans2;
LEA R10, P1, R4, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R11, R4, UR9, R5, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E.STRONG.SYS R6, desc[UR4][R10.64] &rd=0x3 &wr=0x5 ?trans4;
@!P0 BRA 0xe10 ?trans5;
IADD3 R0, PT, PT, -R0, RZ, RZ ?trans1;
LDCU.128 UR8, c[0x0][0x380] &wr=0x4 ?trans6;
SHF.R.S32.HI R5, RZ, 0x1f, R6 &req={5} ?trans1;
IMAD R7, R3, UR10, RZ &req={4,1} ?trans1;
MOV R4, R6 ?WAIT3_END_GROUP;
IMAD R7, R2.reuse, UR11, R7 ?trans2;
IMAD.WIDE.U32 R4, R2, UR10, R4 ?trans1;
IADD3 R0, PT, PT, R0, 0x1, RZ ?WAIT4_END_GROUP;
IADD3 R7, PT, PT, R5, R7, RZ ?trans2;
LEA R6, P0, R4, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R7, R4, UR9, R7, 0x2, P0 ?trans1;
ISETP.NE.AND P0, PT, R0, RZ, PT ?WAIT4_END_GROUP;
LDG.E.STRONG.SYS R6, desc[UR4][R6.64] &req={1} &rd=0x1 &wr=0x5 ?trans9;
@P0 BRA 0xd50 ?trans5;
LDCU.64 UR6, c[0x0][0x398] &wr=0x4 ?trans2;
LEA R4, P0, R2, UR6, 0x2 &req={4} ?WAIT4_END_GROUP;
LEA.HI.X R5, R2, UR7, R3, 0x2, P0 ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R6 &req={5,1} ?trans1;
EXIT ?trans5;
BRA 0xe60;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: race(int volatile*, unsigned long, int, int*)
_Z4racePVimiPi:
s_clause 0x2
s_load_b32 s3, s[0:1], 0x2c
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b32 s2, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
s_cmp_lt_i32 s2, 1
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmp_ge_u64_e32 vcc_lo, s[6:7], v[1:2]
v_cndmask_b32_e32 v3, 0, v1, vcc_lo
s_cbranch_scc1 .LBB0_3
v_mul_lo_u32 v0, v2, s6
v_mul_lo_u32 v6, v1, s7
v_mad_u64_u32 v[4:5], null, v1, s6, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add3_u32 v5, v5, v6, v0
v_lshlrev_b64 v[4:5], 2, v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s4, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
.LBB0_2:
s_waitcnt lgkmcnt(0)
v_ashrrev_i32_e32 v4, 31, v3
s_add_i32 s2, s2, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_cmp_eq_u32 s2, 0
v_lshlrev_b64 v[3:4], 2, v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v3, vcc_lo, v0, v3
v_add_co_ci_u32_e32 v4, vcc_lo, v5, v4, vcc_lo
flat_load_b32 v3, v[3:4] glc dlc
s_waitcnt vmcnt(0)
s_cbranch_scc0 .LBB0_2
.LBB0_3:
s_load_b64 s[0:1], s[0:1], 0x18
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v3, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| race | 6,305 | 905 | stackv2-00000-of-00015 |
// Demangled: calculateNewCentroids(float*, float*, float*, float*, int*, int*)
Function : _Z21calculateNewCentroidsPfS_S_S_PiS0_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_TID.X &wr=0x1 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans7;
LDC R3, c[0x0][0x360] &wr=0x1 ?trans8;
LDC.64 R6, c[0x0][0x3a0] &wr=0x3 ?trans8;
LDC.64 R4, c[0x0][0x390] &wr=0x4 ?trans1;
IMAD R2, R3, UR6, R2 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R6, R2, 0x4, R6 &req={3} ?WAIT6_END_GROUP;
LDG.E R6, desc[UR4][R6.64] &req={2} &wr=0x2 ?trans1;
IMAD.WIDE R4, R2, 0x4, R4 &req={4} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R4.64] &wr=0x3 ?trans1;
BSSY.RECONVERGENT B0, 0x1a0 ?trans1;
I2FP.F32.S32 R3, R6 &req={2} ?WAIT4_END_GROUP;
MUFU.RCP R8, R3 &wr=0x1 ?trans1;
FCHK P0, R0, R3 &req={3} &wr=0x2 ?trans1;
FFMA R9, -R3, R8, 1 &req={1} ?WAIT4_END_GROUP;
FFMA R9, R8, R9, R8 ?WAIT4_END_GROUP;
FFMA R8, R0, R9, RZ ?WAIT4_END_GROUP;
FFMA R10, -R3, R8, R0 ?WAIT4_END_GROUP;
FFMA R11, R9, R10, R8 ?trans1;
@!P0 BRA 0x190 &req={2,0} ?trans6;
MOV R4, 0x180 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x350 ?trans5;
MOV R11, R7 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans8;
LDC.64 R8, c[0x0][0x3a8] &wr=0x1 ?trans8;
LDC.64 R6, c[0x0][0x398] &wr=0x2 ?trans1;
IMAD.WIDE R4, R2, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R11 &rd=0x0 ?trans1;
IMAD.WIDE R8, R2, 0x4, R8 &req={1} ?WAIT6_END_GROUP;
LDG.E R8, desc[UR4][R8.64] &wr=0x3 ?trans1;
IMAD.WIDE R6, R2, 0x4, R6 &req={2} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R6.64] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x310 ?trans1;
I2FP.F32.S32 R3, R8 &req={3} ?WAIT4_END_GROUP;
MUFU.RCP R10, R3 &wr=0x1 ?trans1;
FCHK P0, R0, R3 &req={2} &wr=0x2 ?trans1;
FFMA R13, -R3, R10, 1 &req={1} ?WAIT4_END_GROUP;
FFMA R13, R10, R13, R10 ?WAIT4_END_GROUP;
FFMA R10, R0, R13, RZ ?WAIT4_END_GROUP;
FFMA R12, -R3, R10, R0 ?WAIT4_END_GROUP;
FFMA R13, R13, R12, R10 ?trans1;
@!P0 BRA 0x300 &req={2,0} ?trans6;
MOV R4, 0x2f0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x350 ?trans5;
MOV R13, R7 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans2;
IMAD.WIDE R2, R2, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R13 ?trans1;
EXIT ?trans5;
SHF.R.U32.HI R6, RZ, 0x17, R3 ?trans1;
BSSY.RECONVERGENT B1, 0x990 ?trans1;
SHF.R.U32.HI R5, RZ, 0x17, R0 ?trans2;
LOP3.LUT R10, R6, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R8, R5, 0xff, RZ, 0xc0, !PT ?trans2;
IADD3 R7, PT, PT, R10, -0x1, RZ ?trans2;
IADD3 R6, PT, PT, R8, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R7, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R6, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R5, RZ ?trans1;
@!P0 BRA 0x570 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0x970 ?trans5;
LOP3.LUT P0, RZ, R3, 0x7fffffff, R0, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x950 ?trans5;
FSETP.NEU.FTZ.AND P2, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P1 BRA !P2, 0x950 ?trans5;
LOP3.LUT P2, RZ, R0, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P1, P2, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0x930 ?trans5;
LOP3.LUT P1, RZ, R3, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x900 ?trans5;
ISETP.GE.AND P0, PT, R6, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R7, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R5, RZ ?trans1;
@!P0 MOV R5, 0xffffffc0 ?trans1;
@!P0 FFMA R0, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R3, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R5, PT, PT, R5, 0x40, RZ ?WAIT7_END_GROUP;
LEA R6, R10, 0xc0800000, 0x17 ?trans1;
BSSY.RECONVERGENT B2, 0x8f0 ?trans3;
IADD3 R6, PT, PT, -R6, R3, RZ ?trans2;
IADD3 R3, PT, PT, R8, -0x7f, RZ ?trans2;
MUFU.RCP R7, R6 &rd=0x0 &wr=0x1 ?trans1;
FADD.FTZ R9, -R6, -RZ ?trans2;
IMAD R0, R3.reuse, -0x800000, R0 ?trans1;
IADD3 R6, PT, PT, R3, 0x7f, -R10 &req={0} ?WAIT4_END_GROUP;
IADD3 R6, PT, PT, R6, R5, RZ ?trans1;
FFMA R8, R7, R9, 1 &req={1} ?WAIT4_END_GROUP;
FFMA R12, R7, R8, R7 ?WAIT4_END_GROUP;
FFMA R7, R0, R12, RZ ?WAIT4_END_GROUP;
FFMA R8, R9, R7, R0 ?WAIT4_END_GROUP;
FFMA R11, R12, R8, R7 ?WAIT4_END_GROUP;
FFMA R8, R9, R11, R0 ?WAIT4_END_GROUP;
FFMA R7, R12, R8, R11 ?WAIT5_END_GROUP;
SHF.R.U32.HI R0, RZ, 0x17, R7 ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R9, PT, PT, R0, R6, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R9, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x8d0 ?trans5;
ISETP.GT.AND P0, PT, R9, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x8a0 ?trans5;
ISETP.GE.AND P0, PT, R9, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x8e0 ?trans5;
ISETP.GE.AND P0, PT, R9, -0x18, PT ?trans1;
LOP3.LUT R7, R7, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x8e0 ?trans5;
FFMA.RZ R0, R12.reuse, R8.reuse, R11.reuse ?trans1;
IADD3 R6, PT, PT, R9.reuse, 0x20, RZ ?trans1;
FFMA.RM R3, R12, R8, R11 ?trans1;
ISETP.NE.AND P1, PT, R9.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R9, RZ, PT ?trans1;
LOP3.LUT R0, R0, 0x7fffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R5, R0, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R0, R12, R8, R11 ?trans1;
IADD3 R8, PT, PT, -R9, RZ, RZ ?trans2;
SHF.L.U32 R6, R5, R6, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R0, R3, PT ?trans1;
SEL R0, R8, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R6, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R0, RZ, R0, R5 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R6, RZ, 0x1, R0 ?WAIT3_END_GROUP;
SEL R3, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R3, R3, 0x1, R6, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, R0, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R6, PT, PT, R6, R3, RZ ?WAIT4_END_GROUP;
LOP3.LUT R7, R6, R7, RZ, 0xfc, !PT ?trans1;
BRA 0x8e0 ?trans6;
LOP3.LUT R7, R7, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R7, R7, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x8e0 ?trans6;
IMAD R7, R6, 0x800000, R7 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
BRA 0x980 ?trans5;
LOP3.LUT R0, R3, 0x80000000, R0, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R7, R0, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x980 ?trans6;
LOP3.LUT R7, R3, 0x80000000, R0, 0x48, !PT ?trans1;
BRA 0x980 ?trans6;
MUFU.RSQ R7, -QNAN &wr=0x0 ?trans1;
BRA 0x980 ?trans5;
FADD.FTZ R7, R0, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
HFMA2 R5, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R4 0x0 &req={0} ?trans5;
BRA 0x9b0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: calculateNewCentroids(float*, float*, float*, float*, int*, int*)
_Z21calculateNewCentroidsPfS_S_S_PiS0_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x3c
s_load_b128 s[8:11], s[0:1], 0x20
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_load_b256 s[0:7], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v2, vcc_lo, s8, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s9, v1, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v1, vcc_lo
global_load_b32 v2, v[2:3], off
global_load_b32 v8, v[4:5], off
s_waitcnt vmcnt(1)
v_cvt_f32_i32_e32 v9, v2
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_div_scale_f32 v4, null, v9, v9, v8
v_div_scale_f32 v5, vcc_lo, v8, v9, v8
v_rcp_f32_e32 v6, v4
s_waitcnt_depctr 0xfff
v_fma_f32 v2, -v4, v6, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v6, v2, v6
v_mul_f32_e32 v7, v5, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v2, -v4, v7, v5
v_fmac_f32_e32 v7, v2, v6
v_add_co_u32 v2, s0, s0, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v3, s0, s1, v1, s0
v_fma_f32 v10, -v4, v7, v5
v_add_co_u32 v4, s0, s10, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v5, s0, s11, v1, s0
v_div_fmas_f32 v10, v10, v6, v7
v_add_co_u32 v6, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v7, vcc_lo, s7, v1, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_div_fixup_f32 v8, v10, v9, v8
global_load_b32 v4, v[4:5], off
global_store_b32 v[2:3], v8, off
global_load_b32 v2, v[6:7], off
s_waitcnt vmcnt(1)
v_cvt_f32_i32_e32 v3, v4
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_div_scale_f32 v4, null, v3, v3, v2
v_div_scale_f32 v7, vcc_lo, v2, v3, v2
v_rcp_f32_e32 v5, v4
s_waitcnt_depctr 0xfff
v_fma_f32 v6, -v4, v5, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v5, v6, v5
v_mul_f32_e32 v6, v7, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v8, -v4, v6, v7
v_fmac_f32_e32 v6, v8, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v4, -v4, v6, v7
v_div_fmas_f32 v4, v4, v5, v6
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_div_fixup_f32 v2, v4, v3, v2
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| calculateNewCentroids | 3,819 | 1,510 | stackv2-00000-of-00015 |
// Demangled: generate_normal_kernel(curandStateXORWOW*, float*, float*)
Function : _Z22generate_normal_kernelP17curandStateXORWOWPfS1_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R12, SR_TID.X &wr=0x1 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans7;
LDC R5, c[0x0][0x360] &wr=0x1 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD R12, R5, UR6, R12 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R12, 0x30, R2 &req={3} ?WAIT5_END_GROUP;
LDG.E.64 R22, desc[UR4][R2.64+0x18] &req={2} &wr=0x2 ?trans4;
LDG.E.64 R4, desc[UR4][R2.64+0x28] &rd=0x1 &wr=0x5 ?trans4;
LDG.E.64 R10, desc[UR4][R2.64] &rd=0x1 &wr=0x5 ?trans4;
LDG.E.64 R6, desc[UR4][R2.64+0x8] &rd=0x1 &wr=0x5 ?trans4;
LDG.E.64 R8, desc[UR4][R2.64+0x10] &rd=0x1 &wr=0x5 ?trans1;
BSSY.RECONVERGENT B0, 0x5e0 ?trans1;
SHF.R.S32.HI R15, RZ, 0x1f, R12 ?trans1;
ISETP.NE.AND P0, PT, R22, 0x1, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x560 &req={1,0} ?trans5;
SHF.R.U32.HI R0, RZ, 0x2, R11 &req={5} ?trans1;
IMAD.SHL.U32 R14, R9, 0x10, RZ ?trans1;
MOV R17, 0x3e055027 ?trans1;
BSSY.RECONVERGENT B1, 0x500 ?trans1;
LOP3.LUT R0, R0, R11, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
IADD3 R11, PT, PT, R0, R0, RZ ?WAIT4_END_GROUP;
LOP3.LUT R11, R9, R14, R11, 0x96, !PT ?WAIT4_END_GROUP;
LOP3.LUT R13, R11, R0, RZ, 0x3c, !PT ?trans1;
HFMA2 R11, -RZ, RZ, 0.1171875, 0 ?WAIT3_END_GROUP;
IADD3 R0, PT, PT, R10.reuse, 0x587c5, R13 ?trans2;
IADD3 R10, PT, PT, R10, 0xb0f8a, RZ ?trans2;
I2FP.F32.U32 R0, R0 ?WAIT5_END_GROUP;
FFMA R0, R0, R11, 1.1641532182693481445e-10 ?WAIT5_END_GROUP;
FSETP.GEU.AND P0, PT, R0, 1.175494350822287508e-38, PT ?WAIT13_END_GROUP;
@!P0 FMUL R0, R0, 8388608 ?WAIT5_END_GROUP;
IADD3 R11, PT, PT, R0, -0x3f2aaaab, RZ ?WAIT4_END_GROUP;
LOP3.LUT R11, R11, 0xff800000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R14, PT, PT, R0, -R11, RZ ?WAIT5_END_GROUP;
FADD R16, R14, -1 ?trans1;
FSEL R14, RZ, -23, P0 ?trans1;
ISETP.GT.U32.AND P0, PT, R0, 0x7f7fffff, PT ?trans2;
FFMA R17, R16, -R17, 0.14084610342979431152 ?WAIT4_END_GROUP;
FFMA R17, R16, R17, -0.12148627638816833496 ?WAIT4_END_GROUP;
FFMA R17, R16, R17, 0.13980610668659210205 ?WAIT4_END_GROUP;
FFMA R17, R16, R17, -0.16684235632419586182 ?WAIT4_END_GROUP;
FFMA R17, R16, R17, 0.20012299716472625732 ?WAIT4_END_GROUP;
FFMA R17, R16, R17, -0.24999669194221496582 ?WAIT4_END_GROUP;
FFMA R17, R16, R17, 0.33333182334899902344 ?WAIT4_END_GROUP;
FFMA R19, R16.reuse, R17, -0.5 ?trans1;
I2FP.F32.S32 R17, R11 ?trans2;
SHF.R.U32.HI R11, RZ, 0x2, R6 ?trans1;
FMUL R19, R16.reuse, R19 ?trans2;
FFMA R14, R17, 1.1920928955078125e-07, R14 ?trans1;
MOV R17, 0x7f800000 ?trans1;
FFMA R19, R16, R19, R16 ?trans1;
LOP3.LUT R11, R11, R6, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
FFMA R14, R14, 0.69314718246459960938, R19 ?trans1;
@P0 FFMA R14, R0.reuse, R17, +INF ?trans1;
FSETP.NEU.AND P0, PT, R0, RZ, PT ?trans1;
IADD3 R6, PT, PT, R11, R11, RZ ?trans1;
IMAD.SHL.U32 R0, R13, 0x10, RZ ?trans2;
FMUL R14, R14, -2 ?WAIT3_END_GROUP;
LOP3.LUT R0, R11, R6, R0, 0x96, !PT ?trans2;
FSEL R19, R14, +INF , P0 ?trans2;
LOP3.LUT R17, R0, R13, RZ, 0x3c, !PT ?trans2;
MUFU.RSQ R6, R19 &rd=0x0 &wr=0x1 ?trans1;
IADD3 R11, PT, PT, R19, -0xd000000, RZ ?trans2;
IADD3 R0, PT, PT, R17, R10, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R11, 0x727fffff, PT ?trans1;
HFMA2 R11, -RZ, RZ, 0.1495361328125, 0.0004794597625732421875 ?trans1;
I2FP.F32.U32 R0, R0 ?WAIT5_END_GROUP;
FFMA R14, R0, R11, 7.314590599882819788e-10 ?WAIT6_END_GROUP;
@!P0 BRA 0x4b0 &req={1,0} ?trans5;
MOV R0, R19 ?trans1;
MOV R25, 0x490 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xc00 ?trans5;
MOV R0, R6 ?trans1;
BRA 0x4f0 ?trans6;
FMUL.FTZ R0, R19, R6 ?trans1;
FMUL.FTZ R6, R6, 0.5 ?WAIT3_END_GROUP;
FFMA R11, -R0, R0, R19 ?WAIT4_END_GROUP;
FFMA R0, R11, R6, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
FMUL.RZ R6, R14, 0.15915493667125701904 ?WAIT4_END_GROUP;
MUFU.SIN R11, R6 &wr=0x0 ?trans1;
MUFU.COS R19, R6 &wr=0x1 ?trans1;
FMUL R25, R11, R0.reuse &req={0} ?trans1;
FMUL R27, R19, R0 &req={1} ?trans1;
BRA 0x5d0 ?trans6;
LDG.E R27, desc[UR4][R2.64+0x20] &wr=0x2 ?trans1;
MOV R17, R9 &req={5} ?trans1;
MOV R13, R8 ?trans1;
MOV R9, R7 ?trans1;
MOV R8, R6 ?trans1;
MOV R7, R11 ?trans1;
MOV R25, R27 &req={2} ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU.64 UR6, c[0x0][0x388] &wr=0x0 ?trans1;
SHF.L.U64.HI R15, R12.reuse, 0x2, R15 ?trans1;
IMAD.SHL.U32 R14, R12, 0x4, RZ ?trans1;
ISETP.NE.AND P0, PT, R22, 0x1, PT ?trans1;
BSSY.RECONVERGENT B0, 0xb40 ?trans1;
HFMA2 R22, -RZ, RZ, 0, 0 ?trans1;
MOV R11, R27 ?trans1;
MOV R19, R17 ?trans1;
MOV R18, R13 ?trans1;
MOV R29, R9 ?trans1;
IADD.64 R20, R14, UR6 &req={0} ?WAIT6_END_GROUP;
STG.E desc[UR4][R20.64], R25 &rd=0x0 ?trans1;
@P0 BRA 0xb30 ?trans5;
SHF.R.U32.HI R0, RZ, 0x2, R7 ?trans1;
IMAD.SHL.U32 R6, R17, 0x10, RZ ?trans1;
MOV R11, 0x3e055027 ?trans1;
BSSY.RECONVERGENT B1, 0xaa0 ?trans1;
LOP3.LUT R0, R0, R7, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
IADD3 R7, PT, PT, R0, R0, RZ ?WAIT4_END_GROUP;
LOP3.LUT R7, R17, R6, R7, 0x96, !PT ?WAIT4_END_GROUP;
LOP3.LUT R18, R7, R0, RZ, 0x3c, !PT ?trans1;
MOV R7, 0x2f800000 ?WAIT3_END_GROUP;
IADD3 R0, PT, PT, R10.reuse, 0x587c5, R18 ?trans2;
IADD3 R10, PT, PT, R10, 0xb0f8a, RZ ?trans2;
I2FP.F32.U32 R0, R0 ?WAIT5_END_GROUP;
FFMA R0, R0, R7, 1.1641532182693481445e-10 ?WAIT5_END_GROUP;
FSETP.GEU.AND P0, PT, R0, 1.175494350822287508e-38, PT ?WAIT13_END_GROUP;
@!P0 FMUL R0, R0, 8388608 ?WAIT5_END_GROUP;
IADD3 R6, PT, PT, R0, -0x3f2aaaab, RZ ?WAIT4_END_GROUP;
LOP3.LUT R7, R6, 0xff800000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R6, PT, PT, R0, -R7, RZ ?WAIT5_END_GROUP;
FADD R12, R6, -1 ?trans1;
FSEL R6, RZ, -23, P0 ?trans1;
ISETP.GT.U32.AND P0, PT, R0, 0x7f7fffff, PT ?trans2;
FFMA R11, R12, -R11, 0.14084610342979431152 ?WAIT4_END_GROUP;
FFMA R11, R12, R11, -0.12148627638816833496 ?WAIT4_END_GROUP;
FFMA R11, R12, R11, 0.13980610668659210205 ?WAIT4_END_GROUP;
FFMA R11, R12, R11, -0.16684235632419586182 ?WAIT4_END_GROUP;
FFMA R11, R12, R11, 0.20012299716472625732 ?WAIT4_END_GROUP;
FFMA R11, R12, R11, -0.24999669194221496582 ?WAIT4_END_GROUP;
FFMA R11, R12, R11, 0.33333182334899902344 ?WAIT4_END_GROUP;
FFMA R19, R12.reuse, R11, -0.5 ?trans1;
I2FP.F32.S32 R11, R7 ?trans2;
SHF.R.U32.HI R7, RZ, 0x2, R8 ?trans1;
FMUL R19, R12.reuse, R19 ?trans2;
FFMA R6, R11, 1.1920928955078125e-07, R6 ?trans1;
MOV R11, 0x7f800000 ?trans1;
FFMA R19, R12, R19, R12 ?trans1;
LOP3.LUT R7, R7, R8, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
FFMA R19, R6, 0.69314718246459960938, R19 ?trans1;
@P0 FFMA R19, R0.reuse, R11, +INF ?trans1;
FSETP.NEU.AND P0, PT, R0, RZ, PT ?trans1;
IADD3 R6, PT, PT, R7, R7, RZ ?trans1;
IMAD.SHL.U32 R0, R18, 0x10, RZ ?trans2;
FMUL R19, R19, -2 ?trans1;
MOV R11, 0x30c90fdb ?trans2;
LOP3.LUT R7, R7, R6, R0, 0x96, !PT ?trans2;
FSEL R8, R19, +INF , P0 ?WAIT2_END_GROUP;
LOP3.LUT R19, R7, R18, RZ, 0x3c, !PT ?trans2;
MUFU.RSQ R7, R8 &rd=0x1 &wr=0x2 ?trans1;
IADD3 R6, PT, PT, R8, -0xd000000, RZ ?trans2;
IADD3 R0, PT, PT, R10, R19, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R6, 0x727fffff, PT ?trans1;
I2FP.F32.U32 R0, R0 ?WAIT5_END_GROUP;
FFMA R12, R0, R11, 7.314590599882819788e-10 ?WAIT7_END_GROUP;
@!P0 BRA 0xa50 &req={2,1} ?trans5;
MOV R0, R8 ?trans1;
MOV R25, 0xa30 &req={0} ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xc00 ?trans5;
MOV R27, R6 ?trans1;
BRA 0xa90 ?trans6;
FMUL.FTZ R27, R8, R7 ?trans1;
FMUL.FTZ R6, R7, 0.5 ?WAIT3_END_GROUP;
FFMA R0, -R27, R27, R8 ?WAIT4_END_GROUP;
FFMA R27, R0, R6, R27 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
FMUL.RZ R12, R12, 0.15915493667125701904 ?trans1;
HFMA2 R22, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
MOV R29, R17 ?trans1;
MOV R8, R13 ?trans1;
MUFU.SIN R0, R12 &wr=0x1 ?trans1;
MOV R7, R9 ?trans1;
MUFU.COS R6, R12 &wr=0x2 ?trans1;
FMUL R11, R0, R27.reuse &req={1} ?trans1;
FMUL R27, R6, R27 &req={2} ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU.64 UR6, c[0x0][0x390] &wr=0x1 ?trans1;
MOV R6, R10 ?trans1;
MOV R28, R8 ?trans1;
IADD.64 R14, R14, UR6 &req={1} ?WAIT6_END_GROUP;
STG.E desc[UR4][R14.64], R11 ?trans4;
STG.E.64 desc[UR4][R2.64], R6 ?trans4;
STG.E.64 desc[UR4][R2.64+0x8], R28 ?trans4;
STG.E.64 desc[UR4][R2.64+0x10], R18 ?trans4;
STG.E.64 desc[UR4][R2.64+0x18], R22 ?trans4;
STG.E.64 desc[UR4][R2.64+0x28], R4 ?trans4;
STG.E desc[UR4][R2.64+0x20], R27 ?trans1;
EXIT ?trans5;
LOP3.LUT P0, RZ, R0, 0x7fffffff, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 MOV R6, R0 ?trans1;
@!P0 BRA 0xd30 ?trans6;
FSETP.GEU.FTZ.AND P0, PT, R0, RZ, PT ?WAIT13_END_GROUP;
@!P0 MOV R6, 0x7fffffff ?trans1;
@!P0 BRA 0xd30 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P0 FADD.FTZ R6, R0, 1 ?trans1;
@P0 BRA 0xd30 ?trans6;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P0 FFMA R11, R0, 1.84467440737095516160e+19, RZ ?WAIT4_END_GROUP;
@P0 MUFU.RSQ R6, R11 &wr=0x0 ?trans2;
@P0 FMUL.FTZ R16, R11, R6 &req={0} ?trans1;
@P0 FMUL.FTZ R24, R6, 0.5 ?trans1;
@!P0 MOV R6, R0 ?trans2;
@P0 FADD.FTZ R20, -R16, -RZ ?WAIT4_END_GROUP;
@P0 FFMA R21, R16, R20, R11 ?WAIT4_END_GROUP;
@P0 FFMA R21, R21, R24, R16 ?WAIT4_END_GROUP;
@P0 FMUL.FTZ R6, R21, 2.3283064365386962891e-10 ?WAIT7_END_GROUP;
MOV R20, R25 ?trans1;
HFMA2 R21, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R20 0x0 ?trans5;
BRA 0xd60;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: generate_normal_kernel(hiprandState*, float*, float*)
_Z22generate_normal_kernelP12hiprandStatePfS1_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[14:15], null, s15, s2, v[0:1]
s_load_b64 s[2:3], s[0:1], 0x10
v_mad_i64_i32 v[8:9], null, v14, 48, s[4:5]
v_ashrrev_i32_e32 v15, 31, v14
s_mov_b32 s4, exec_lo
s_clause 0x3
global_load_b128 v[4:7], v[8:9], off
global_load_b128 v[0:3], v[8:9], off offset:24
global_load_b64 v[10:11], v[8:9], off offset:40
global_load_b64 v[12:13], v[8:9], off offset:16
s_waitcnt vmcnt(3)
v_cmp_ne_u32_e32 vcc_lo, 0, v5
s_waitcnt vmcnt(2)
v_dual_mov_b32 v16, v2 :: v_dual_mov_b32 v17, v7
v_cmpx_eq_u32_e32 0, v5
s_cbranch_execz .LBB1_2
v_lshrrev_b32_e32 v5, 2, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_xor_b32_e32 v0, v5, v0
s_waitcnt vmcnt(1)
v_lshlrev_b32_e32 v5, 4, v10
v_lshlrev_b32_e32 v7, 1, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v5, v7, v5
v_xor3_b32 v5, v5, v0, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add3_u32 v0, v4, v5, 0x587c5
v_add_nc_u32_e32 v4, 0xb0f8a, v4
v_cvt_f32_u32_e32 v0, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmaak_f32 v0, 0x2f800000, v0, 0x2f800000
v_cmp_gt_f32_e64 s0, 0x800000, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v7, 1.0, 0x4f800000, s0
v_mul_f32_e32 v0, v0, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_log_f32_e32 v0, v0
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v7, 0x3f317217, v0
v_fma_f32 v16, 0x3f317217, v0, -v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmamk_f32 v16, v0, 0x3377d1cf, v16
v_add_f32_e32 v7, v7, v16
v_cndmask_b32_e64 v16, 0, 0x41b17218, s0
v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v0, v0, v7, s0
v_lshrrev_b32_e32 v7, 2, v1
v_xor_b32_e32 v1, v7, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_sub_f32 v0, v0, v16 :: v_dual_lshlrev_b32 v7, 1, v1
v_mul_f32_e32 v0, -2.0, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mul_f32_e32 v16, 0x4f800000, v0
v_cmp_gt_f32_e64 s0, 0xf800000, v0
v_cndmask_b32_e64 v0, v0, v16, s0
v_lshlrev_b32_e32 v16, 4, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sqrt_f32_e32 v17, v0
v_xor_b32_e32 v7, v7, v16
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_xor3_b32 v18, v7, v1, v5
s_waitcnt_depctr 0xfff
v_add_nc_u32_e32 v1, -1, v17
v_add_nc_u32_e32 v16, 1, v17
v_fma_f32 v19, -v1, v17, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v20, -v16, v17, v0
v_cmp_ge_f32_e64 s1, 0, v19
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cndmask_b32_e64 v1, v17, v1, s1
v_cmp_lt_f32_e64 s1, 0, v20
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v1, v1, v16, s1
v_mul_f32_e32 v16, 0x37800000, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v1, v1, v16, s0
v_cmp_class_f32_e64 s0, v0, 0x260
v_cndmask_b32_e64 v19, v1, v0, s0
v_mov_b32_e32 v1, v3
v_mov_b32_e32 v3, v5
v_add_nc_u32_e32 v7, v18, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f32_u32_e32 v7, v7
v_fmaak_f32 v7, 0x30c90fdb, v7, 0x30c90fdb
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v7, 0.15915494, v7
v_sin_f32_e32 v17, v7
v_cos_f32_e32 v7, v7
v_mov_b32_e32 v16, v10
v_mov_b32_e32 v0, v2
s_waitcnt_depctr 0xfff
v_dual_mov_b32 v10, v18 :: v_dual_mul_f32 v17, v19, v17
v_mul_f32_e32 v7, v19, v7
.LBB1_2:
s_or_b32 exec_lo, exec_lo, s4
v_lshlrev_b64 v[14:15], 2, v[14:15]
v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v2, v16
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mov_b32_e32 v18, v7
v_add_co_u32 v19, s0, s6, v14
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v20, s0, s7, v15, s0
global_store_b32 v[19:20], v17, off
s_and_saveexec_b32 s1, vcc_lo
s_cbranch_execz .LBB1_4
v_lshrrev_b32_e32 v2, 2, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_xor_b32_e32 v0, v2, v0
s_waitcnt vmcnt(1)
v_lshlrev_b32_e32 v2, 4, v10
v_lshlrev_b32_e32 v5, 1, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v2, v5, v2
v_xor3_b32 v7, v2, v0, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add3_u32 v0, v4, v7, 0x587c5
v_cvt_f32_u32_e32 v0, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmaak_f32 v0, 0x2f800000, v0, 0x2f800000
v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
v_cndmask_b32_e64 v2, 1.0, 0x4f800000, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v0, v0, v2
v_log_f32_e32 v0, v0
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v2, 0x3f317217, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v5, 0x3f317217, v0, -v2
v_fmamk_f32 v5, v0, 0x3377d1cf, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_add_f32_e32 v2, v2, v5
v_cndmask_b32_e64 v5, 0, 0x41b17218, vcc_lo
v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|
v_cndmask_b32_e32 v0, v0, v2, vcc_lo
v_lshrrev_b32_e32 v2, 2, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_f32_e32 v0, v0, v5
v_xor_b32_e32 v1, v2, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v0, -2.0, v0
v_mul_f32_e32 v5, 0x4f800000, v0
v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_cndmask_b32_e32 v0, v0, v5, vcc_lo
v_lshlrev_b32_e32 v2, 1, v1
v_lshlrev_b32_e32 v5, 4, v7
v_sqrt_f32_e32 v17, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v2, v2, v5
v_xor3_b32 v19, v2, v1, v7
s_waitcnt_depctr 0xfff
v_add_nc_u32_e32 v1, -1, v17
v_add_nc_u32_e32 v5, 1, v17
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v18, -v1, v17, v0
v_fma_f32 v20, -v5, v17, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_ge_f32_e64 s0, 0, v18
v_cndmask_b32_e64 v1, v17, v1, s0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_lt_f32_e64 s0, 0, v20
v_cndmask_b32_e64 v1, v1, v5, s0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v5, 0x37800000, v1
v_dual_cndmask_b32 v1, v1, v5 :: v_dual_add_nc_u32 v4, 0xb0f8a, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v2, v19, v4
v_cmp_class_f32_e64 vcc_lo, v0, 0x260
v_mov_b32_e32 v5, 1
v_cvt_f32_u32_e32 v2, v2
v_cndmask_b32_e32 v21, v1, v0, vcc_lo
v_mov_b32_e32 v1, v3
v_dual_mov_b32 v3, v7 :: v_dual_mov_b32 v0, v16
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmaak_f32 v2, 0x30c90fdb, v2, 0x30c90fdb
v_mul_f32_e32 v2, 0.15915494, v2
s_delay_alu instid0(VALU_DEP_1)
v_cos_f32_e32 v20, v2
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v7, v21, v20
v_sin_f32_e32 v17, v2
v_mov_b32_e32 v2, v10
v_mov_b32_e32 v10, v19
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v18, v21, v17
.LBB1_4:
s_or_b32 exec_lo, exec_lo, s1
s_waitcnt lgkmcnt(0)
v_add_co_u32 v14, vcc_lo, s2, v14
v_add_co_ci_u32_e32 v15, vcc_lo, s3, v15, vcc_lo
global_store_b32 v[14:15], v18, off
global_store_b128 v[8:9], v[4:7], off
s_waitcnt vmcnt(0)
s_clause 0x2
global_store_b64 v[8:9], v[12:13], off offset:16
global_store_b128 v[8:9], v[0:3], off offset:24
global_store_b64 v[8:9], v[10:11], off offset:40
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| generate_normal_kernel | 5,597 | 4,613 | stackv2-00000-of-00015 |
// Demangled: mapFunction(int*, float*, float*, float*, float*, int)
Function : _Z11mapFunctionPiPfS0_S0_S0_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R21, c[0x0][0x3a8] &wr=0x1 ?trans1;
S2R R11, SR_TID.X &wr=0x2 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x3 ?trans1;
HFMA2 R17, -RZ, RZ, 0, 0 ?WAIT5_END_GROUP;
S2UR UR4, SR_CTAID.X &wr=0x2 ?trans8;
LDC R0, c[0x0][0x360] &wr=0x2 ?trans1;
ISETP.GE.AND P0, PT, R21, 0x1, PT &req={1} ?trans1;
IMAD R11, R0, UR4, R11 &req={2} ?WAIT12_END_GROUP;
@!P0 BRA 0x19c0 &req={3,0} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x398] &wr=0x1 ?trans1;
IMAD.WIDE R2, R11, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R10, desc[UR8][R2.64] &rd=0x0 &wr=0x5 ?trans1;
IMAD.WIDE R4, R11, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
LDG.E R9, desc[UR8][R4.64] &rd=0x0 &wr=0x5 ?trans1;
ISETP.GE.U32.AND P0, PT, R21.reuse, 0x8, PT ?trans1;
LOP3.LUT R19, R21, 0x7, RZ, 0xc0, !PT ?trans1;
MOV R18, 0x7f7fffff ?trans1;
MOV R8, RZ ?trans1;
MOV R17, RZ ?WAIT9_END_GROUP;
@!P0 BRA 0xdc0 &req={0} ?trans5;
LDCU.64 UR4, c[0x0][0x390] &wr=0x0 ?trans1;
HFMA2 R8, -RZ, RZ, 0, 0 ?trans1;
LOP3.LUT R21, R21, 0x7ffffff8, RZ, 0xc0, !PT ?trans1;
LDCU.64 UR6, c[0x0][0x3a0] &wr=0x1 ?trans1;
MOV R18, 0x7f7fffff ?trans1;
UIADD3.64 UR4, UPT, UPT, UR4, 0x10, URZ &req={0} ?trans1;
UIADD3.64 UR6, UPT, UPT, UR6, 0x10, URZ &req={1} ?WAIT5_END_GROUP;
MOV.64 R2, UR4 ?trans2;
MOV.64 R4, UR6 ?WAIT8_END_GROUP;
LDG.E R0, desc[UR8][R4.64+-0x10] &wr=0x2 ?trans4;
LDG.E R7, desc[UR8][R2.64+-0x10] &wr=0x3 ?trans1;
BSSY.RECONVERGENT B0, 0x330 ?trans1;
FADD R0, -R9, R0 &req={5,2} ?trans1;
FADD R7, -R10, R7 &req={3} ?WAIT3_END_GROUP;
FMUL R0, R0, R0 ?WAIT4_END_GROUP;
FFMA R12, R7, R7, R0 ?WAIT4_END_GROUP;
MUFU.RSQ R7, R12 &rd=0x0 &wr=0x1 ?trans1;
IADD3 R0, PT, PT, R12, -0xd000000, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R0, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x2e0 &req={1,0} ?trans5;
MOV R0, R12 ?trans1;
MOV R6, 0x2d0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1a00 ?trans5;
BRA 0x320 ?trans5;
FMUL.FTZ R13, R12, R7 ?trans1;
FMUL.FTZ R6, R7, 0.5 ?WAIT3_END_GROUP;
FFMA R0, -R13, R13, R12 ?WAIT4_END_GROUP;
FFMA R13, R0, R6, R13 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDG.E R0, desc[UR8][R4.64+-0xc] &wr=0x2 ?trans4;
LDG.E R7, desc[UR8][R2.64+-0xc] &wr=0x3 ?trans1;
FSETP.GEU.AND P0, PT, R13.reuse, R18.reuse, PT ?trans1;
BSSY.RECONVERGENT B0, 0x4a0 ?trans4;
FSEL R18, R13, R18, !P0 ?trans1;
SEL R17, R8, R17, !P0 ?trans1;
FADD R0, -R9, R0 &req={2} ?trans1;
FADD R7, -R10, R7 &req={3} ?WAIT3_END_GROUP;
FMUL R0, R0, R0 ?WAIT4_END_GROUP;
FFMA R12, R7, R7, R0 ?WAIT4_END_GROUP;
MUFU.RSQ R7, R12 &rd=0x0 &wr=0x1 ?trans1;
IADD3 R0, PT, PT, R12, -0xd000000, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R0, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P1 BRA 0x450 &req={1,0} ?trans5;
MOV R0, R12 ?trans1;
MOV R6, 0x440 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1a00 ?trans5;
BRA 0x490 ?trans5;
FMUL.FTZ R13, R12, R7 ?trans1;
FMUL.FTZ R6, R7, 0.5 ?WAIT3_END_GROUP;
FFMA R0, -R13, R13, R12 ?WAIT4_END_GROUP;
FFMA R13, R0, R6, R13 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDG.E R0, desc[UR8][R4.64+-0x8] &wr=0x2 ?trans4;
LDG.E R7, desc[UR8][R2.64+-0x8] &wr=0x3 ?trans1;
FSETP.GEU.AND P0, PT, R13.reuse, R18.reuse, PT ?trans1;
BSSY.RECONVERGENT B0, 0x610 ?trans4;
FSEL R18, R13, R18, !P0 ?WAIT8_END_GROUP;
@!P0 IADD3 R17, PT, PT, R8, 0x1, RZ ?trans1;
FADD R0, -R9, R0 &req={2} ?trans1;
FADD R7, -R10, R7 &req={3} ?WAIT3_END_GROUP;
FMUL R0, R0, R0 ?WAIT4_END_GROUP;
FFMA R12, R7, R7, R0 ?WAIT4_END_GROUP;
MUFU.RSQ R7, R12 &rd=0x0 &wr=0x1 ?trans1;
IADD3 R0, PT, PT, R12, -0xd000000, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R0, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P1 BRA 0x5c0 &req={1,0} ?trans5;
MOV R0, R12 ?trans1;
MOV R6, 0x5b0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1a00 ?trans5;
BRA 0x600 ?trans5;
FMUL.FTZ R13, R12, R7 ?trans1;
FMUL.FTZ R6, R7, 0.5 ?WAIT3_END_GROUP;
FFMA R0, -R13, R13, R12 ?WAIT4_END_GROUP;
FFMA R13, R0, R6, R13 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDG.E R0, desc[UR8][R4.64+-0x4] &wr=0x2 ?trans4;
LDG.E R7, desc[UR8][R2.64+-0x4] &wr=0x3 ?trans1;
FSETP.GEU.AND P0, PT, R13.reuse, R18.reuse, PT ?trans1;
BSSY.RECONVERGENT B0, 0x780 ?trans4;
FSEL R18, R13, R18, !P0 ?WAIT8_END_GROUP;
@!P0 IADD3 R17, PT, PT, R8, 0x2, RZ ?trans1;
FADD R0, -R9, R0 &req={2} ?trans1;
FADD R7, -R10, R7 &req={3} ?WAIT3_END_GROUP;
FMUL R0, R0, R0 ?WAIT4_END_GROUP;
FFMA R12, R7, R7, R0 ?WAIT4_END_GROUP;
MUFU.RSQ R7, R12 &rd=0x0 &wr=0x1 ?trans1;
IADD3 R0, PT, PT, R12, -0xd000000, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R0, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P1 BRA 0x730 &req={1,0} ?trans5;
MOV R0, R12 ?trans1;
MOV R6, 0x720 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1a00 ?trans5;
BRA 0x770 ?trans5;
FMUL.FTZ R13, R12, R7 ?trans1;
FMUL.FTZ R6, R7, 0.5 ?WAIT3_END_GROUP;
FFMA R0, -R13, R13, R12 ?WAIT4_END_GROUP;
FFMA R13, R0, R6, R13 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDG.E R0, desc[UR8][R4.64] &wr=0x2 ?trans4;
LDG.E R7, desc[UR8][R2.64] &wr=0x3 ?trans1;
FSETP.GEU.AND P0, PT, R13.reuse, R18.reuse, PT ?trans1;
BSSY.RECONVERGENT B0, 0x8f0 ?trans4;
FSEL R18, R13, R18, !P0 ?WAIT8_END_GROUP;
@!P0 IADD3 R17, PT, PT, R8, 0x3, RZ ?trans1;
FADD R0, -R9, R0 &req={2} ?trans1;
FADD R7, -R10, R7 &req={3} ?WAIT3_END_GROUP;
FMUL R0, R0, R0 ?WAIT4_END_GROUP;
FFMA R12, R7, R7, R0 ?WAIT4_END_GROUP;
MUFU.RSQ R7, R12 &rd=0x0 &wr=0x1 ?trans1;
IADD3 R0, PT, PT, R12, -0xd000000, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R0, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P1 BRA 0x8a0 &req={1,0} ?trans5;
MOV R0, R12 ?trans1;
MOV R6, 0x890 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1a00 ?trans5;
BRA 0x8e0 ?trans5;
FMUL.FTZ R13, R12, R7 ?trans1;
FMUL.FTZ R6, R7, 0.5 ?WAIT3_END_GROUP;
FFMA R0, -R13, R13, R12 ?WAIT4_END_GROUP;
FFMA R13, R0, R6, R13 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDG.E R0, desc[UR8][R4.64+0x4] &wr=0x2 ?trans4;
LDG.E R7, desc[UR8][R2.64+0x4] &wr=0x3 ?trans1;
FSETP.GEU.AND P0, PT, R13.reuse, R18.reuse, PT ?trans1;
BSSY.RECONVERGENT B0, 0xa60 ?trans4;
FSEL R18, R13, R18, !P0 ?WAIT8_END_GROUP;
@!P0 IADD3 R17, PT, PT, R8, 0x4, RZ ?trans1;
FADD R0, -R9, R0 &req={2} ?trans1;
FADD R7, -R10, R7 &req={3} ?WAIT3_END_GROUP;
FMUL R0, R0, R0 ?WAIT4_END_GROUP;
FFMA R12, R7, R7, R0 ?WAIT4_END_GROUP;
MUFU.RSQ R7, R12 &rd=0x0 &wr=0x1 ?trans1;
IADD3 R0, PT, PT, R12, -0xd000000, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R0, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P1 BRA 0xa10 &req={1,0} ?trans5;
MOV R0, R12 ?trans1;
MOV R6, 0xa00 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1a00 ?trans5;
BRA 0xa50 ?trans5;
FMUL.FTZ R13, R12, R7 ?trans1;
FMUL.FTZ R6, R7, 0.5 ?WAIT3_END_GROUP;
FFMA R0, -R13, R13, R12 ?WAIT4_END_GROUP;
FFMA R13, R0, R6, R13 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDG.E R0, desc[UR8][R4.64+0x8] &wr=0x2 ?trans4;
LDG.E R7, desc[UR8][R2.64+0x8] &wr=0x3 ?trans1;
FSETP.GEU.AND P0, PT, R13.reuse, R18.reuse, PT ?trans1;
BSSY.RECONVERGENT B0, 0xbd0 ?trans4;
FSEL R18, R13, R18, !P0 ?WAIT8_END_GROUP;
@!P0 IADD3 R17, PT, PT, R8, 0x5, RZ ?trans1;
FADD R0, -R9, R0 &req={2} ?trans1;
FADD R7, -R10, R7 &req={3} ?WAIT3_END_GROUP;
FMUL R0, R0, R0 ?WAIT4_END_GROUP;
FFMA R12, R7, R7, R0 ?WAIT4_END_GROUP;
MUFU.RSQ R7, R12 &rd=0x0 &wr=0x1 ?trans1;
IADD3 R0, PT, PT, R12, -0xd000000, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R0, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P1 BRA 0xb80 &req={1,0} ?trans5;
MOV R0, R12 ?trans1;
MOV R6, 0xb70 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1a00 ?trans5;
BRA 0xbc0 ?trans5;
FMUL.FTZ R13, R12, R7 ?trans1;
FMUL.FTZ R6, R7, 0.5 ?WAIT3_END_GROUP;
FFMA R0, -R13, R13, R12 ?WAIT4_END_GROUP;
FFMA R13, R0, R6, R13 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDG.E R0, desc[UR8][R4.64+0xc] &wr=0x2 ?trans4;
LDG.E R7, desc[UR8][R2.64+0xc] &wr=0x3 ?trans1;
FSETP.GEU.AND P0, PT, R13.reuse, R18.reuse, PT ?trans1;
BSSY.RECONVERGENT B0, 0xd40 ?trans4;
FSEL R18, R13, R18, !P0 ?WAIT8_END_GROUP;
@!P0 IADD3 R17, PT, PT, R8, 0x6, RZ ?trans1;
FADD R0, -R9, R0 &req={2} ?trans1;
FADD R7, -R10, R7 &req={3} ?WAIT3_END_GROUP;
FMUL R0, R0, R0 ?WAIT4_END_GROUP;
FFMA R12, R7, R7, R0 ?WAIT4_END_GROUP;
MUFU.RSQ R7, R12 &rd=0x0 &wr=0x1 ?trans1;
IADD3 R0, PT, PT, R12, -0xd000000, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R0, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P1 BRA 0xcf0 &req={1,0} ?trans5;
MOV R0, R12 ?trans1;
MOV R6, 0xce0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1a00 ?trans5;
BRA 0xd30 ?trans5;
FMUL.FTZ R13, R12, R7 ?trans1;
FMUL.FTZ R6, R7, 0.5 ?WAIT3_END_GROUP;
FFMA R0, -R13, R13, R12 ?WAIT4_END_GROUP;
FFMA R13, R0, R6, R13 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
FSETP.GEU.AND P0, PT, R13, R18.reuse, PT ?trans1;
IADD.64 R2, R2, 0x20 ?trans2;
IADD.64 R4, R4, 0x20 ?trans2;
FSEL R18, R13, R18, !P0 ?WAIT8_END_GROUP;
@!P0 IADD3 R17, PT, PT, R8.reuse, 0x7, RZ ?trans2;
IADD3 R8, PT, PT, R8, 0x8, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R8, R21, PT ?WAIT13_END_GROUP;
@P1 BRA 0x1f0 ?trans5;
ISETP.NE.AND P0, PT, R19, RZ, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x19c0 ?trans5;
LDC R0, c[0x0][0x3a8] &wr=0x0 ?trans1;
ISETP.GE.U32.AND P0, PT, R19, 0x4, PT ?trans1;
LOP3.LUT R19, R0, 0x3, RZ, 0xc0, !PT &req={0} ?WAIT12_END_GROUP;
@!P0 BRA 0x1460 ?trans5;
LDC.64 R2, c[0x0][0x3a0] &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x390] &wr=0x1 ?trans1;
IMAD.WIDE.U32 R2, R8, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR8][R2.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R4, R8, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
LDG.E R7, desc[UR8][R4.64] &wr=0x3 ?trans1;
BSSY.RECONVERGENT B0, 0xfa0 ?trans1;
FADD R0, -R9, R0 &req={5,2} ?WAIT4_END_GROUP;
FMUL R0, R0, R0 ?trans1;
FADD R7, -R10, R7 &req={3} ?WAIT4_END_GROUP;
FFMA R12, R7, R7, R0 ?WAIT5_END_GROUP;
IADD3 R0, PT, PT, R12, -0xd000000, RZ ?trans1;
MUFU.RSQ R7, R12 &rd=0x0 &wr=0x1 ?trans4;
ISETP.GT.U32.AND P0, PT, R0, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xf50 &req={0} ?trans5;
MOV R0, R12 ?trans1;
MOV R6, 0xf40 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1a00 &req={1} ?trans5;
BRA 0xf90 ?trans5;
FMUL.FTZ R13, R12, R7 &req={1} ?trans1;
FMUL.FTZ R6, R7, 0.5 ?WAIT3_END_GROUP;
FFMA R0, -R13, R13, R12 ?WAIT4_END_GROUP;
FFMA R13, R0, R6, R13 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDG.E R0, desc[UR8][R2.64+0x4] &wr=0x2 ?trans4;
LDG.E R7, desc[UR8][R4.64+0x4] &wr=0x3 ?trans1;
FSETP.GEU.AND P0, PT, R13, R18, PT ?trans1;
BSSY.RECONVERGENT B0, 0x1120 ?trans1;
IADD3 R20, PT, PT, R8, 0x1, RZ ?WAIT3_END_GROUP;
FSEL R18, R13, R18, !P0 ?trans1;
SEL R17, R8, R17, !P0 ?trans1;
FADD R0, -R9, R0 &req={2} ?trans1;
FADD R7, -R10, R7 &req={3} ?WAIT3_END_GROUP;
FMUL R0, R0, R0 ?WAIT4_END_GROUP;
FFMA R12, R7, R7, R0 ?WAIT4_END_GROUP;
MUFU.RSQ R7, R12 &rd=0x0 &wr=0x1 ?trans1;
IADD3 R0, PT, PT, R12, -0xd000000, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R0, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P1 BRA 0x10d0 &req={1,0} ?trans5;
MOV R0, R12 ?trans1;
MOV R6, 0x10c0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1a00 ?trans5;
BRA 0x1110 ?trans5;
FMUL.FTZ R13, R12, R7 ?trans1;
FMUL.FTZ R6, R7, 0.5 ?WAIT3_END_GROUP;
FFMA R0, -R13, R13, R12 ?WAIT4_END_GROUP;
FFMA R13, R0, R6, R13 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDG.E R0, desc[UR8][R2.64+0x8] &wr=0x2 ?trans4;
LDG.E R7, desc[UR8][R4.64+0x8] &wr=0x3 ?trans1;
FSETP.GEU.AND P0, PT, R13.reuse, R18.reuse, PT ?trans1;
BSSY.RECONVERGENT B0, 0x12a0 ?trans4;
SEL R17, R20, R17, !P0 ?trans1;
FSEL R18, R13, R18, !P0 ?trans1;
IADD3 R20, PT, PT, R8, 0x2, RZ ?trans1;
FADD R0, -R9, R0 &req={2} ?trans1;
FADD R7, -R10, R7 &req={3} ?WAIT3_END_GROUP;
FMUL R0, R0, R0 ?WAIT4_END_GROUP;
FFMA R12, R7, R7, R0 ?WAIT4_END_GROUP;
MUFU.RSQ R7, R12 &rd=0x0 &wr=0x1 ?trans1;
IADD3 R0, PT, PT, R12, -0xd000000, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R0, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P1 BRA 0x1250 &req={1,0} ?trans5;
MOV R0, R12 ?trans1;
MOV R6, 0x1240 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1a00 ?trans5;
BRA 0x1290 ?trans5;
FMUL.FTZ R13, R12, R7 ?trans1;
FMUL.FTZ R6, R7, 0.5 ?WAIT3_END_GROUP;
FFMA R0, -R13, R13, R12 ?WAIT4_END_GROUP;
FFMA R13, R0, R6, R13 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDG.E R2, desc[UR8][R2.64+0xc] &wr=0x2 ?trans4;
LDG.E R5, desc[UR8][R4.64+0xc] &rd=0x0 &wr=0x3 ?trans1;
FSETP.GEU.AND P0, PT, R13.reuse, R18.reuse, PT ?trans1;
BSSY.RECONVERGENT B0, 0x1420 ?trans4;
SEL R17, R20, R17, !P0 ?trans1;
FSEL R18, R13, R18, !P0 ?trans1;
IADD3 R4, PT, PT, R8, 0x3, RZ &req={0} ?trans1;
FADD R6, -R9, R2 &req={2} ?trans1;
FADD R0, -R10, R5 &req={3} ?WAIT3_END_GROUP;
FMUL R7, R6, R6 ?WAIT4_END_GROUP;
FFMA R6, R0, R0, R7 ?WAIT4_END_GROUP;
MUFU.RSQ R7, R6 &rd=0x0 &wr=0x1 ?trans1;
IADD3 R0, PT, PT, R6, -0xd000000, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R0, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P1 BRA 0x13d0 &req={1,0} ?trans5;
MOV R0, R6 ?trans1;
MOV R6, 0x13c0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1a00 ?trans5;
BRA 0x1410 ?trans5;
FMUL.FTZ R13, R6, R7 ?trans1;
FMUL.FTZ R2, R7, 0.5 ?WAIT3_END_GROUP;
FFMA R0, -R13, R13, R6 ?WAIT4_END_GROUP;
FFMA R13, R0, R2, R13 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
FSETP.GEU.AND P0, PT, R13, R18, PT ?trans1;
IADD3 R8, PT, PT, R8, 0x4, RZ ?WAIT4_END_GROUP;
SEL R17, R4, R17, !P0 ?trans1;
FSEL R18, R13, R18, !P0 ?WAIT7_END_GROUP;
ISETP.NE.AND P0, PT, R19, RZ, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x19c0 ?trans5;
ISETP.NE.AND P0, PT, R19, 0x1, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x17e0 ?trans5;
LDC.64 R2, c[0x0][0x3a0] &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x390] &wr=0x1 ?trans1;
IMAD.WIDE.U32 R2, R8, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR8][R2.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R4, R8, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
LDG.E R7, desc[UR8][R4.64] &wr=0x3 ?trans1;
BSSY.RECONVERGENT B0, 0x1620 ?trans1;
FADD R0, -R9, R0 &req={5,2} ?WAIT4_END_GROUP;
FMUL R0, R0, R0 ?trans1;
FADD R7, -R10, R7 &req={3} ?WAIT4_END_GROUP;
FFMA R12, R7, R7, R0 ?WAIT5_END_GROUP;
IADD3 R0, PT, PT, R12, -0xd000000, RZ ?trans1;
MUFU.RSQ R7, R12 &rd=0x0 &wr=0x1 ?trans4;
ISETP.GT.U32.AND P0, PT, R0, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x15d0 &req={0} ?trans5;
MOV R0, R12 ?trans1;
MOV R6, 0x15c0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1a00 &req={1} ?trans5;
BRA 0x1610 ?trans5;
FMUL.FTZ R13, R12, R7 &req={1} ?trans1;
FMUL.FTZ R6, R7, 0.5 ?WAIT3_END_GROUP;
FFMA R0, -R13, R13, R12 ?WAIT4_END_GROUP;
FFMA R13, R0, R6, R13 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDG.E R2, desc[UR8][R2.64+0x4] &wr=0x2 ?trans4;
LDG.E R5, desc[UR8][R4.64+0x4] &wr=0x3 ?trans1;
FSETP.GEU.AND P0, PT, R13, R18, PT ?trans1;
BSSY.RECONVERGENT B0, 0x17a0 ?trans1;
IADD3 R20, PT, PT, R8, 0x1, RZ ?WAIT3_END_GROUP;
FSEL R18, R13, R18, !P0 ?trans1;
SEL R17, R8, R17, !P0 ?trans1;
FADD R6, -R9, R2 &req={2} ?trans1;
FADD R0, -R10, R5 &req={3} ?WAIT3_END_GROUP;
FMUL R7, R6, R6 ?WAIT4_END_GROUP;
FFMA R6, R0, R0, R7 ?WAIT4_END_GROUP;
MUFU.RSQ R7, R6 &rd=0x0 &wr=0x1 ?trans1;
IADD3 R0, PT, PT, R6, -0xd000000, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R0, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P1 BRA 0x1750 &req={1,0} ?trans5;
MOV R0, R6 ?trans1;
MOV R6, 0x1740 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1a00 ?trans5;
BRA 0x1790 ?trans5;
FMUL.FTZ R13, R6, R7 ?trans1;
FMUL.FTZ R2, R7, 0.5 ?WAIT3_END_GROUP;
FFMA R0, -R13, R13, R6 ?WAIT4_END_GROUP;
FFMA R13, R0, R2, R13 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
FSETP.GEU.AND P0, PT, R13, R18, PT ?trans1;
IADD3 R8, PT, PT, R8, 0x2, RZ ?WAIT4_END_GROUP;
SEL R17, R20, R17, !P0 ?trans1;
FSEL R18, R13, R18, !P0 ?WAIT7_END_GROUP;
LDC R0, c[0x0][0x3a8] &wr=0x0 ?trans2;
LOP3.LUT R0, R0, 0x1, RZ, 0xc0, !PT &req={0} ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P0, PT, R0, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x19c0 ?trans5;
LDC.64 R4, c[0x0][0x3a0] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x390] &wr=0x1 ?trans1;
IMAD.WIDE.U32 R4, R8, 0x4, R4 &req={0} ?WAIT6_END_GROUP;
LDG.E R4, desc[UR8][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R2, R8, 0x4, R2 &req={1} ?WAIT6_END_GROUP;
LDG.E R3, desc[UR8][R2.64] &wr=0x3 ?trans1;
BSSY.RECONVERGENT B0, 0x19a0 ?trans1;
FADD R9, -R9, R4 &req={5,2} ?WAIT4_END_GROUP;
FMUL R9, R9, R9 ?trans1;
FADD R10, -R10, R3 &req={3} ?WAIT4_END_GROUP;
FFMA R10, R10, R10, R9 ?WAIT5_END_GROUP;
IADD3 R0, PT, PT, R10, -0xd000000, RZ ?trans1;
MUFU.RSQ R7, R10 &rd=0x0 &wr=0x1 ?trans4;
ISETP.GT.U32.AND P0, PT, R0, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1950 &req={0} ?trans5;
MOV R0, R10 ?trans1;
MOV R6, 0x1940 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1a00 &req={1} ?trans5;
BRA 0x1990 ?trans5;
FMUL.FTZ R13, R10, R7 &req={1} ?trans1;
FMUL.FTZ R2, R7, 0.5 ?WAIT3_END_GROUP;
FFMA R0, -R13, R13, R10 ?WAIT4_END_GROUP;
FFMA R13, R0, R2, R13 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
FSETP.GEU.AND P0, PT, R13, R18, PT ?WAIT5_END_GROUP;
SEL R17, R8, R17, !P0 ?WAIT8_END_GROUP;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans2;
IMAD.WIDE R2, R11, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR8][R2.64], R17 ?trans1;
EXIT ?trans5;
LOP3.LUT P0, RZ, R0, 0x7fffffff, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 MOV R13, R0 ?trans1;
@!P0 BRA 0x1b30 ?trans6;
FSETP.GEU.FTZ.AND P0, PT, R0, RZ, PT ?WAIT13_END_GROUP;
@!P0 MOV R13, 0x7fffffff ?trans1;
@!P0 BRA 0x1b30 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P0 FADD.FTZ R13, R0, 1 ?trans1;
@P0 BRA 0x1b30 ?trans6;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P0 FFMA R14, R0, 1.84467440737095516160e+19, RZ ?WAIT4_END_GROUP;
@P0 MUFU.RSQ R15, R14 &wr=0x0 ?trans2;
@P0 FMUL.FTZ R7, R14, R15 &req={0} ?trans1;
@P0 FMUL.FTZ R12, R15, 0.5 ?WAIT3_END_GROUP;
@P0 FADD.FTZ R13, -R7, -RZ ?WAIT4_END_GROUP;
@P0 FFMA R16, R7, R13, R14 ?trans1;
@!P0 MOV R13, R0 ?WAIT3_END_GROUP;
@P0 FFMA R12, R16, R12, R7 ?WAIT4_END_GROUP;
@P0 FMUL.FTZ R13, R12, 2.3283064365386962891e-10 ?WAIT7_END_GROUP;
HFMA2 R7, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R6 0x0 ?trans5;
BRA 0x1b50;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: mapFunction(int*, float*, float*, float*, float*, int)
_Z11mapFunctionPiPfS0_S0_S0_i:
s_clause 0x3
s_load_b32 s13, s[0:1], 0x3c
s_load_b64 s[2:3], s[0:1], 0x20
s_load_b32 s12, s[0:1], 0x28
s_load_b256 s[4:11], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s0, s13, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
s_cmp_lt_i32 s12, 1
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_cbranch_scc1 .LBB2_3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s10, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s11, v1, vcc_lo
s_mov_b32 s1, 0
global_load_b32 v3, v[2:3], off
global_load_b32 v4, v[4:5], off
v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v5, 0x7f7fffff
.LBB2_2:
s_load_b32 s0, s[2:3], 0x0
s_load_b32 s6, s[8:9], 0x0
s_waitcnt vmcnt(0) lgkmcnt(0)
v_dual_sub_f32 v6, s0, v4 :: v_dual_sub_f32 v7, s6, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v6, v6, v6
v_fmac_f32_e32 v6, v7, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_f32_e32 v7, 0x4f800000, v6
v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v6
v_cndmask_b32_e32 v6, v6, v7, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_sqrt_f32_e32 v7, v6
s_waitcnt_depctr 0xfff
v_add_nc_u32_e32 v8, -1, v7
v_add_nc_u32_e32 v9, 1, v7
v_fma_f32 v10, -v8, v7, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v11, -v9, v7, v6
v_cmp_ge_f32_e64 s0, 0, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cndmask_b32_e64 v7, v7, v8, s0
v_cmp_lt_f32_e64 s0, 0, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v7, v7, v9, s0
v_mul_f32_e32 v8, 0x37800000, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v7, v7, v8, vcc_lo
v_cmp_class_f32_e64 vcc_lo, v6, 0x260
v_cndmask_b32_e32 v6, v7, v6, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_cmp_lt_f32_e32 vcc_lo, v6, v5
v_cndmask_b32_e32 v5, v5, v6, vcc_lo
v_cndmask_b32_e64 v2, v2, s1, vcc_lo
s_add_i32 s1, s1, 1
s_add_u32 s8, s8, 4
s_addc_u32 s9, s9, 0
s_add_u32 s2, s2, 4
s_addc_u32 s3, s3, 0
s_cmp_eq_u32 s12, s1
s_cbranch_scc0 .LBB2_2
s_branch .LBB2_4
.LBB2_3:
v_mov_b32_e32 v2, 0
.LBB2_4:
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v0, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| mapFunction | 9,944 | 1,553 | stackv2-00000-of-00015 |
// Demangled: reduce(int*, float*, float*, float*, float*, int*, int*)
Function : _Z6reducePiPfS0_S0_S0_S_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R11, SR_TID.X &wr=0x0 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans8;
LDC.64 R6, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD R11, R0, UR6, R11 &req={0} ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x398] &wr=0x0 ?trans1;
IMAD.WIDE R2, R11, 0x4, R2 &req={2} ?WAIT7_END_GROUP;
LDC.64 R8, c[0x0][0x390] &wr=0x2 ?trans1;
LDG.E R17, desc[UR4][R2.64] &req={1} &wr=0x0 ?trans1;
IMAD.WIDE R6, R11, 0x4, R6 &req={3} ?WAIT6_END_GROUP;
LDC.64 R12, c[0x0][0x3a8] &wr=0x1 ?trans1;
LDG.E R19, desc[UR4][R6.64] &wr=0x3 ?trans7;
LDC.64 R14, c[0x0][0x3b0] &wr=0x4 ?trans1;
IMAD.WIDE R8, R11, 0x4, R8 &req={2} ?WAIT7_END_GROUP;
LDC.64 R10, c[0x0][0x3a0] &wr=0x2 ?trans1;
IMAD.WIDE R4, R17, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR4][R4.64], R19 &req={3} ?trans4;
LDG.E R9, desc[UR4][R8.64] &wr=0x3 ?trans1;
IMAD.WIDE R2, R17, 0x4, R10 &req={2} ?WAIT4_END_GROUP;
HFMA2 R21, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans2;
IMAD.WIDE R6, R17, 0x4, R12 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R10, R17, 0x4, R14 &req={4} ?trans1;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR4][R2.64], R9 &req={3} ?trans4;
REDG.E.ADD.STRONG.GPU desc[UR4][R6.64], R21 ?trans4;
REDG.E.ADD.STRONG.GPU desc[UR4][R10.64], R21 ?trans1;
EXIT ?trans5;
BRA 0x1d0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: reduce(int*, float*, float*, float*, float*, int*, int*)
_Z6reducePiPfS0_S0_S0_S_S_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x44
s_load_b256 s[4:11], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_co_u32 v0, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v3, vcc_lo
v_add_co_u32 v6, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
global_load_b32 v0, v[0:1], off
s_load_b256 s[0:7], s[0:1], 0x20
s_waitcnt lgkmcnt(0)
s_mov_b32 s6, 0
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_add_co_u32 v4, vcc_lo, s10, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s11, v1, vcc_lo
global_load_b32 v8, v[6:7], off
global_load_b32 v7, v[4:5], off
.LBB3_1:
s_waitcnt vmcnt(0)
v_add_f32_e32 v6, v7, v8
global_atomic_cmpswap_b32 v6, v[4:5], v[6:7], off glc
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, v6, v7
v_mov_b32_e32 v7, v6
s_or_b32 s6, vcc_lo, s6
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s6
s_cbranch_execnz .LBB3_1
s_or_b32 exec_lo, exec_lo, s6
v_add_co_u32 v4, vcc_lo, s8, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s9, v3, vcc_lo
v_add_co_u32 v2, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
s_mov_b32 s0, 0
global_load_b32 v6, v[4:5], off
global_load_b32 v5, v[2:3], off
.LBB3_3:
s_waitcnt vmcnt(0)
v_add_f32_e32 v4, v5, v6
global_atomic_cmpswap_b32 v4, v[2:3], v[4:5], off glc
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, v4, v5
v_mov_b32_e32 v5, v4
s_or_b32 s0, vcc_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s0
s_cbranch_execnz .LBB3_3
s_or_b32 exec_lo, exec_lo, s0
v_add_co_u32 v2, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s4, v0
v_mov_b32_e32 v4, 1
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
global_atomic_add_u32 v[2:3], v4, off
global_atomic_add_u32 v[0:1], v4, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| reduce | 904 | 1,217 | stackv2-00000-of-00015 |
// Demangled: setup_kernel(curandStateXORWOW*)
Function : _Z12setup_kernelP17curandStateXORWOW
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R8, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
HFMA2 R3, -RZ, RZ, -178.125, -3742 ?trans1;
BSSY.RECONVERGENT B0, 0xee0 ?trans6;
LDC R9, c[0x0][0x360] &wr=0x1 ?trans8;
LDC.64 R6, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD R8, R9, UR4, R8 &req={1} ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans4;
IADD3 R0, PT, PT, R8.reuse, 0x7, RZ ?trans1;
ISETP.GT.AND P0, PT, R8.reuse, -0x8, PT ?trans1;
SHF.R.S32.HI R9, RZ, 0x1f, R8 ?trans1;
IMAD.WIDE R6, R8, 0x30, R6 &req={2} ?trans1;
LOP3.LUT R0, R0, 0xaad26b49, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
SEL R3, R3, 0x8bf16996, P0 ?trans1;
ISETP.NE.AND P0, PT, R8, RZ, PT ?trans2;
IMAD R0, R0, 0x4182bed5, RZ ?trans2;
IADD3 R5, PT, PT, R3.reuse, 0x1f123bb5, RZ ?trans2;
LOP3.LUT R10, R3.reuse, 0x5491333, RZ, 0x3c, !PT ?trans2;
IADD3 R2, PT, PT, R3, 0x64f0c9, R0 ?trans2;
LOP3.LUT R4, R0, 0x159a55e5, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
IADD3 R3, PT, PT, R0.reuse, 0x75bcd15, RZ ?trans2;
IADD3 R11, PT, PT, R0, 0x583f19, RZ ?trans1;
STG.E.64 desc[UR4][R6.64+0x8], R4 &req={1} &rd=0x1 ?trans4;
STG.E.64 desc[UR4][R6.64], R2 &rd=0x1 ?trans4;
STG.E.64 desc[UR4][R6.64+0x10], R10 &rd=0x1 ?trans1;
@!P0 BRA 0xed0 &req={0} ?trans5;
IADD.64 R10, R6, 0x4 &req={1} ?trans2;
MOV R18, RZ ?WAIT7_END_GROUP;
LOP3.LUT R12, R8, 0x3, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B1, 0xe60 ?trans1;
MOV R13, RZ ?WAIT5_END_GROUP;
ISETP.NE.S64.AND P0, PT, R12, RZ, PT ?WAIT14_END_GROUP;
@!P0 BRA 0xe50 ?trans5;
LDC.64 R14, c[0x4][RZ] &wr=0x0 ?trans1;
HFMA2 R19, -RZ, RZ, 0, 0 ?trans2;
IMAD.WIDE.U32 R14, R18, 0xc80, R14 &req={0} ?WAIT7_END_GROUP;
MOV R21, RZ &req={0} ?trans1;
MOV R23, RZ ?trans1;
CS2R R4, SRZ ?trans1;
CS2R R2, SRZ ?WAIT7_END_GROUP;
IMAD.WIDE.U32 R16, R23, 0x4, R10 ?WAIT5_END_GROUP;
LDG.E R25, desc[UR4][R16.64] &rd=0x0 &wr=0x5 ?trans1;
MOV R27, R23 ?trans1;
IADD3 R23, PT, PT, R23, 0x1, RZ ?trans1;
HFMA2 R0, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
ISETP.NE.AND P0, PT, R23, 0x5, PT ?WAIT5_END_GROUP;
P2R R28, PR, RZ, 0x1 &req={0} ?WAIT8_END_GROUP;
SHF.R.U32.HI R30, RZ, R0, R25 &req={5} ?trans1;
IMAD R16, R27, 0x20, R0 ?WAIT3_END_GROUP;
LOP3.LUT R17, R30, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P0, PT, R17, 0x1, PT ?trans1;
IMAD R17, R16, 0x5, RZ ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R16, R17, 0x4, R14 ?trans1;
R2P PR, R30, 0x7e ?WAIT7_END_GROUP;
@!P0 LDG.E R20, desc[UR4][R16.64] &wr=0x2 ?trans4;
@!P0 LDG.E R24, desc[UR4][R16.64+0x10] &wr=0x3 ?trans4;
@!P0 LDG.E R29, desc[UR4][R16.64+0x4] &wr=0x4 ?trans4;
@!P0 LDG.E R22, desc[UR4][R16.64+0x8] &wr=0x4 ?trans4;
@!P0 LDG.E R31, desc[UR4][R16.64+0xc] &wr=0x4 ?trans4;
@P1 LDG.E R32, desc[UR4][R16.64+0x14] &wr=0x4 ?trans4;
@P2 LDG.E R34, desc[UR4][R16.64+0x28] &wr=0x4 ?trans4;
@P5 LDG.E R36, desc[UR4][R16.64+0x64] &wr=0x4 ?trans4;
@P1 LDG.E R26, desc[UR4][R16.64+0x1c] &wr=0x4 ?trans4;
@P6 LDG.E R35, desc[UR4][R16.64+0x78] &wr=0x4 ?trans4;
@P2 LDG.E R33, desc[UR4][R16.64+0x2c] &wr=0x4 ?trans4;
@P4 LDG.E R37, desc[UR4][R16.64+0x5c] &wr=0x4 ?trans1;
@!P0 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P3 LDG.E R20, desc[UR4][R16.64+0x3c] &wr=0x2 ?trans1;
@!P0 LOP3.LUT R5, R5, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P4 LDG.E R24, desc[UR4][R16.64+0x50] &wr=0x3 ?trans1;
@!P0 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT &req={4} ?WAIT3_END_GROUP;
@P1 LDG.E R29, desc[UR4][R16.64+0x18] &wr=0x4 ?trans1;
@!P0 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P1 LDG.E R22, desc[UR4][R16.64+0x24] &wr=0x4 ?trans1;
@!P0 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P1 LDG.E R31, desc[UR4][R16.64+0x20] &wr=0x4 ?trans1;
@P1 LOP3.LUT R21, R21, R32, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R32, desc[UR4][R16.64+0x30] &wr=0x4 ?trans1;
@P2 LOP3.LUT R21, R21, R34, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R34, desc[UR4][R16.64+0x38] &wr=0x4 ?trans1;
LOP3.LUT P0, RZ, R30, 0x80, RZ, 0xc0, !PT ?trans2;
@P1 LOP3.LUT R3, R3, R26, RZ, 0x3c, !PT ?trans2;
@P4 LDG.E R26, desc[UR4][R16.64+0x60] &wr=0x4 ?trans1;
@P3 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P3 LDG.E R20, desc[UR4][R16.64+0x44] &wr=0x2 ?trans1;
@P4 LOP3.LUT R21, R21, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P4 LDG.E R24, desc[UR4][R16.64+0x58] &wr=0x3 ?trans1;
@P1 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT &req={4} ?trans2;
@P5 LOP3.LUT R21, R21, R36, RZ, 0x3c, !PT ?trans1;
@P2 LDG.E R29, desc[UR4][R16.64+0x34] &wr=0x4 ?trans1;
@P1 LOP3.LUT R5, R5, R22, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P3 LDG.E R22, desc[UR4][R16.64+0x4c] &wr=0x4 ?trans1;
@P1 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P3 LDG.E R31, desc[UR4][R16.64+0x40] &wr=0x4 ?trans1;
@P6 LOP3.LUT R21, R21, R35, RZ, 0x3c, !PT ?trans2;
@P2 LOP3.LUT R2, R2, R33, RZ, 0x3c, !PT ?trans1;
@P4 LDG.E R35, desc[UR4][R16.64+0x54] &wr=0x4 ?trans1;
@P2 LOP3.LUT R5, R5, R34, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P3 LDG.E R33, desc[UR4][R16.64+0x48] &wr=0x4 ?trans1;
@P2 LOP3.LUT R3, R3, R32, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P0 LDG.E R34, desc[UR4][R16.64+0x8c] &wr=0x4 ?trans4;
@P5 LDG.E R32, desc[UR4][R16.64+0x68] &wr=0x4 ?trans1;
@P3 LOP3.LUT R3, R3, R20, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P5 LDG.E R20, desc[UR4][R16.64+0x6c] &wr=0x2 ?trans1;
@P4 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P6 LDG.E R24, desc[UR4][R16.64+0x80] &wr=0x3 ?trans1;
@P2 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT &req={4} ?WAIT3_END_GROUP;
@P5 LDG.E R29, desc[UR4][R16.64+0x70] &wr=0x4 ?trans1;
@P3 LOP3.LUT R5, R5, R22, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P5 LDG.E R22, desc[UR4][R16.64+0x74] &wr=0x4 ?trans1;
@P3 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?trans1;
@P6 LDG.E R31, desc[UR4][R16.64+0x7c] &wr=0x4 ?trans1;
@P4 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R26, desc[UR4][R16.64+0x88] &wr=0x4 ?trans1;
@P3 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R33, desc[UR4][R16.64+0x84] &wr=0x4 ?trans1;
@P0 LOP3.LUT R21, R21, R34, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R4, R4, R37, RZ, 0x3c, !PT ?trans1;
@P0 LDG.E R35, desc[UR4][R16.64+0x90] &wr=0x4 ?trans1;
@P5 LOP3.LUT R2, R2, R32, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P0 LDG.E R32, desc[UR4][R16.64+0x94] &wr=0x4 ?trans4;
@P0 LDG.E R37, desc[UR4][R16.64+0x98] &wr=0x4 ?trans4;
@P0 LDG.E R34, desc[UR4][R16.64+0x9c] &wr=0x4 ?trans1;
@P5 LOP3.LUT R3, R3, R20, RZ, 0x3c, !PT &req={2} ?WAIT4_END_GROUP;
@P6 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={3} ?trans2;
@P5 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT &req={4} ?trans2;
@P5 LOP3.LUT R5, R5, R22, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
@P0 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R3, R3, R32, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R4, R4, R37, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R5, R5, R34, RZ, 0x3c, !PT ?trans2;
R2P PR, R30.B1, 0x7f ?WAIT13_END_GROUP;
@P0 LDG.E R22, desc[UR4][R16.64+0xa8] &wr=0x2 ?trans4;
@P0 LDG.E R24, desc[UR4][R16.64+0xb0] &wr=0x3 ?trans4;
@P0 LDG.E R31, desc[UR4][R16.64+0xac] &wr=0x4 ?trans4;
@P0 LDG.E R29, desc[UR4][R16.64+0xa4] &wr=0x4 ?trans4;
@P0 LDG.E R20, desc[UR4][R16.64+0xa0] &wr=0x4 ?trans4;
@P2 LDG.E R32, desc[UR4][R16.64+0xc8] &wr=0x4 ?trans4;
@P3 LDG.E R34, desc[UR4][R16.64+0xdc] &wr=0x4 ?trans4;
@P4 LDG.E R36, desc[UR4][R16.64+0xf0] &wr=0x4 ?trans4;
@P5 LDG.E R33, desc[UR4][R16.64+0x104] &wr=0x4 ?trans4;
@P1 LDG.E R26, desc[UR4][R16.64+0xc4] &wr=0x4 ?trans4;
@P3 LDG.E R37, desc[UR4][R16.64+0xe8] &wr=0x4 ?trans4;
@P3 LDG.E R35, desc[UR4][R16.64+0xe0] &wr=0x4 ?trans1;
@P0 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P1 LDG.E R22, desc[UR4][R16.64+0xb4] &wr=0x2 ?trans1;
@P0 LOP3.LUT R5, R5, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P1 LDG.E R24, desc[UR4][R16.64+0xbc] &wr=0x3 ?trans1;
@P0 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT &req={4} ?WAIT3_END_GROUP;
@P1 LDG.E R31, desc[UR4][R16.64+0xc0] &wr=0x4 ?trans1;
@P0 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P1 LDG.E R29, desc[UR4][R16.64+0xb8] &wr=0x4 ?trans1;
@P0 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT ?trans2;
LOP3.LUT P0, RZ, R30, 0x8000, RZ, 0xc0, !PT ?trans1;
@P6 LDG.E R20, desc[UR4][R16.64+0x118] &wr=0x4 ?trans4;
@P3 LDG.E R30, desc[UR4][R16.64+0xe4] &wr=0x4 ?trans1;
@P1 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R26, desc[UR4][R16.64+0xd8] &wr=0x4 ?trans1;
@P1 LOP3.LUT R21, R21, R22, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P4 LDG.E R22, desc[UR4][R16.64+0xf8] &wr=0x2 ?trans1;
@P2 LOP3.LUT R21, R21, R32, RZ, 0x3c, !PT ?trans2;
@P1 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={3} ?trans1;
@P3 LDG.E R32, desc[UR4][R16.64+0xec] &wr=0x3 ?trans1;
@P3 LOP3.LUT R21, R21, R34, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R24, desc[UR4][R16.64+0xd0] &wr=0x2 ?trans1;
@P4 LOP3.LUT R21, R21, R36, RZ, 0x3c, !PT ?trans2;
@P1 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT &req={4} ?trans1;
@P0 LDG.E R36, desc[UR4][R16.64+0x12c] &wr=0x4 ?trans1;
@P5 LOP3.LUT R21, R21, R33, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R33, desc[UR4][R16.64+0xd4] &wr=0x3 ?trans1;
@P1 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R31, desc[UR4][R16.64+0xcc] &wr=0x4 ?trans4;
@P4 LDG.E R29, desc[UR4][R16.64+0xfc] &wr=0x4 ?trans4;
@P4 LDG.E R34, desc[UR4][R16.64+0xf4] &wr=0x4 ?trans1;
@P6 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P4 LDG.E R20, desc[UR4][R16.64+0x100] &wr=0x4 ?trans1;
@P2 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P5 LDG.E R26, desc[UR4][R16.64+0x114] &wr=0x4 ?trans1;
@P2 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P5 LDG.E R24, desc[UR4][R16.64+0x10c] &wr=0x2 ?trans1;
@P3 LOP3.LUT R3, R3, R30, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R30, desc[UR4][R16.64+0x128] &wr=0x2 ?trans1;
@P2 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P5 LDG.E R33, desc[UR4][R16.64+0x110] &wr=0x3 ?trans1;
@P2 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT &req={4} ?trans2;
@P3 LOP3.LUT R4, R4, R37, RZ, 0x3c, !PT ?trans1;
@P5 LDG.E R31, desc[UR4][R16.64+0x108] &wr=0x4 ?trans1;
@P3 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT ?trans1;
@P6 LDG.E R35, desc[UR4][R16.64+0x11c] &wr=0x4 ?trans1;
@P4 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R22, desc[UR4][R16.64+0x120] &wr=0x4 ?trans1;
@P0 LOP3.LUT R21, R21, R36, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R29, desc[UR4][R16.64+0x124] &wr=0x4 ?trans1;
@P3 LOP3.LUT R5, R5, R32, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R2, R2, R34, RZ, 0x3c, !PT ?trans1;
@P0 LDG.E R37, desc[UR4][R16.64+0x130] &wr=0x4 ?trans4;
@P0 LDG.E R32, desc[UR4][R16.64+0x134] &wr=0x4 ?trans4;
@P0 LDG.E R34, desc[UR4][R16.64+0x138] &wr=0x4 ?trans4;
@P0 LDG.E R36, desc[UR4][R16.64+0x13c] &wr=0x4 ?trans1;
IADD3 R0, PT, PT, R0, 0x10, RZ ?WAIT2_END_GROUP;
@P4 LOP3.LUT R5, R5, R20, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
ISETP.NE.AND P1, PT, R0, 0x20, PT ?trans1;
@P5 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?trans2;
@P5 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={2} ?trans2;
@P6 LOP3.LUT R5, R5, R30, RZ, 0x3c, !PT ?trans2;
@P5 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT &req={3} ?trans2;
@P5 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT &req={4} ?WAIT4_END_GROUP;
@P6 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R2, R2, R37, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R3, R3, R32, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R4, R4, R34, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
@P0 LOP3.LUT R5, R5, R36, RZ, 0x3c, !PT ?trans1;
@P1 BRA 0x300 ?trans6;
ISETP.NE.AND P2, PT, R28, RZ, PT ?WAIT13_END_GROUP;
@P2 BRA 0x290 ?trans5;
STG.E.64 desc[UR4][R6.64+0x8], R2 &rd=0x0 ?trans1;
IADD3 R19, PT, PT, R19, 0x1, RZ ?WAIT3_END_GROUP;
STG.E.64 desc[UR4][R6.64+0x10], R4 &rd=0x0 ?trans2;
ISETP.GE.U32.AND P0, PT, R19, R12, PT ?trans2;
STG.E desc[UR4][R6.64+0x4], R21 &rd=0x0 ?trans11;
@!P0 BRA 0x250 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R2, R8 &req={0} ?trans1;
MOV R3, R9 ?trans1;
SHF.R.U64 R8, R8, 0x2, R9.reuse ?trans2;
SHF.R.U32.HI R9, RZ, 0x2, R9 ?trans2;
ISETP.GT.U64.AND P0, PT, R2, 0x3, PT ?WAIT3_END_GROUP;
IADD3 R18, PT, PT, R18, 0x1, RZ ?WAIT11_END_GROUP;
@P0 BRA 0x1d0 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
STG.E.64 desc[UR4][R6.64+0x18], RZ ?trans4;
STG.E desc[UR4][R6.64+0x20], RZ ?trans4;
STG.E.64 desc[UR4][R6.64+0x28], RZ ?trans1;
EXIT ?trans5;
BRA 0xf20;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: setup_kernel(hiprandState*)
_Z12setup_kernelP12hiprandState:
s_load_b32 s4, s[2:3], 0x14
s_load_b64 s[0:1], s[0:1], 0x4
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
v_bfe_u32 v0, v0, 20, 10
v_mov_b32_e32 v4, 0x8a5d614f
s_mov_b32 s7, 0
s_mov_b32 s18, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_lshr_b32 s0, s0, 16
v_mad_u64_u32 v[5:6], null, s15, s4, v[1:2]
s_mul_i32 s0, s0, s1
v_mul_u32_u24_e32 v3, s1, v3
v_mul_lo_u32 v1, s0, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v2, 7, v5
v_cmp_lt_i32_e32 vcc_lo, -8, v5
v_ashrrev_i32_e32 v6, 31, v5
v_xor_b32_e32 v2, 0x2c7f967f, v2
v_cndmask_b32_e32 v4, 0xfa091aa4, v4, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_mul_lo_u32 v7, 0x493c4aa1, v2
v_add3_u32 v2, v1, v3, v0
v_add_nc_u32_e32 v0, 0x1f123bb5, v4
v_xor_b32_e32 v1, 0x5491333, v4
s_delay_alu instid0(VALU_DEP_3)
v_mul_lo_u32 v8, v2, 48
v_add_nc_u32_e32 v2, 0x75bcd15, v7
v_xor_b32_e32 v3, 0x159a55e5, v7
v_add_nc_u32_e32 v9, 0x583f19, v7
v_add3_u32 v4, v4, v7, 0x64f0c9
ds_store_2addr_b64 v8, v[2:3], v[0:1] offset0:3 offset1:4
ds_store_2addr_b32 v8, v4, v9 offset1:10
v_cmpx_ne_u32_e32 0, v5
s_cbranch_execz .LBB0_12
v_mov_b32_e32 v7, v6
v_dual_mov_b32 v6, v5 :: v_dual_add_nc_u32 v9, 24, v8
s_mov_b32 s8, 0
s_getpc_b64 s[14:15]
s_add_u32 s14, s14, _ZL31d_xorwow_sequence_jump_matrices@rel32@lo+4
s_addc_u32 s15, s15, _ZL31d_xorwow_sequence_jump_matrices@rel32@hi+12
.LBB0_2:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_and_b32_e32 v10, 3, v6
s_mov_b32 s19, exec_lo
v_cmpx_ne_u32_e32 0, v10
s_cbranch_execz .LBB0_11
s_mov_b32 s20, 0
s_mov_b32 s21, 0
.LBB0_4:
s_mov_b32 s9, s8
s_mov_b32 s10, s8
s_mov_b32 s11, s8
s_mov_b32 s12, s8
v_dual_mov_b32 v0, s8 :: v_dual_mov_b32 v1, s9
v_dual_mov_b32 v2, s10 :: v_dual_mov_b32 v3, s11
v_mov_b32_e32 v4, s12
s_mov_b64 s[10:11], s[14:15]
s_mov_b32 s9, 0
.LBB0_5:
s_delay_alu instid0(SALU_CYCLE_1)
s_lshr_b32 s0, s9, 3
s_mov_b64 s[12:13], 0
s_and_b32 s0, s0, 0x1ffffffc
s_mov_b64 s[16:17], s[10:11]
v_add_nc_u32_e32 v11, s0, v9
s_and_b32 s0, s9, 31
ds_load_b32 v11, v11
s_waitcnt lgkmcnt(0)
v_bfe_u32 v11, v11, s0, 1
s_delay_alu instid0(VALU_DEP_1)
v_cmp_eq_u32_e32 vcc_lo, 0, v11
.LBB0_6:
s_load_b32 s6, s[16:17], 0x0
s_cmp_eq_u32 s12, 1
s_cselect_b32 s0, -1, 0
s_cmp_eq_u32 s12, 2
v_cndmask_b32_e64 v11, v0, v1, s0
s_cselect_b32 s1, -1, 0
s_cmp_eq_u32 s12, 3
s_cselect_b32 s4, -1, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v11, v11, v2, s1
s_cmp_eq_u32 s12, 4
s_cselect_b32 s5, -1, 0
s_cmp_eq_u32 s12, 0
v_cndmask_b32_e64 v11, v11, v3, s4
s_delay_alu instid0(VALU_DEP_1)
v_cndmask_b32_e64 v11, v11, v4, s5
s_waitcnt lgkmcnt(0)
v_cndmask_b32_e64 v12, s6, 0, vcc_lo
s_cselect_b32 s6, -1, 0
s_add_u32 s12, s12, 1
s_addc_u32 s13, s13, 0
s_add_u32 s16, s16, 4
v_xor_b32_e32 v11, v12, v11
s_addc_u32 s17, s17, 0
s_cmp_eq_u32 s12, 5
s_delay_alu instid0(VALU_DEP_1)
v_cndmask_b32_e64 v4, v4, v11, s5
v_cndmask_b32_e64 v3, v3, v11, s4
v_cndmask_b32_e64 v2, v2, v11, s1
v_cndmask_b32_e64 v1, v1, v11, s0
v_cndmask_b32_e64 v0, v0, v11, s6
s_cbranch_scc0 .LBB0_6
s_add_i32 s9, s9, 1
s_add_u32 s10, s10, 20
s_addc_u32 s11, s11, 0
s_cmpk_lg_i32 s9, 0xa0
s_cbranch_scc1 .LBB0_5
v_mov_b32_e32 v11, v9
s_mov_b64 s[0:1], 0
.LBB0_9:
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s0, 1
s_cselect_b32 vcc_lo, -1, 0
s_cmp_eq_u32 s0, 2
v_cndmask_b32_e32 v12, v0, v1, vcc_lo
s_cselect_b32 vcc_lo, -1, 0
s_cmp_eq_u32 s0, 3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v12, v12, v2, vcc_lo
s_cselect_b32 vcc_lo, -1, 0
s_cmp_eq_u32 s0, 4
v_cndmask_b32_e32 v12, v12, v3, vcc_lo
s_cselect_b32 vcc_lo, -1, 0
s_add_u32 s0, s0, 1
s_addc_u32 s1, s1, 0
s_cmp_eq_u32 s0, 5
v_cndmask_b32_e32 v12, v12, v4, vcc_lo
ds_store_b32 v11, v12
v_add_nc_u32_e32 v11, 4, v11
s_cbranch_scc0 .LBB0_9
s_add_i32 s21, s21, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_eq_u32_e32 vcc_lo, s21, v10
s_or_b32 s20, vcc_lo, s20
s_and_not1_b32 exec_lo, exec_lo, s20
s_cbranch_execnz .LBB0_4
.LBB0_11:
s_or_b32 exec_lo, exec_lo, s19
v_lshrrev_b64 v[0:1], 2, v[6:7]
v_cmp_gt_u64_e32 vcc_lo, 4, v[6:7]
s_add_u32 s14, s14, 0xc80
s_addc_u32 s15, s15, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_dual_mov_b32 v7, v1 :: v_dual_mov_b32 v6, v0
s_or_b32 s7, vcc_lo, s7
s_and_not1_b32 exec_lo, exec_lo, s7
s_cbranch_execnz .LBB0_2
.LBB0_12:
s_or_b32 exec_lo, exec_lo, s18
s_load_b64 s[0:1], s[2:3], 0x0
v_mov_b32_e32 v4, 0
ds_load_2addr_b64 v[0:3], v8 offset0:4 offset1:5
ds_store_2addr_b32 v8, v4, v4 offset0:1 offset1:2
ds_load_2addr_b64 v[9:12], v8 offset0:2 offset1:3
ds_load_2addr_b64 v[13:16], v8 offset1:1
s_waitcnt lgkmcnt(0)
v_mad_i64_i32 v[6:7], null, v5, 48, s[0:1]
s_clause 0x2
global_store_b128 v[6:7], v[0:3], off offset:32
global_store_b128 v[6:7], v[9:12], off offset:16
global_store_b128 v[6:7], v[13:16], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| setup_kernel | 7,938 | 3,054 | stackv2-00000-of-00015 |
// Demangled: square(float*, float*)
Function : _Z6squarePfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R7, SR_TID.X &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R2, R7, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x3 ?trans1;
IMAD.WIDE.U32 R4, R7, 0x4, R4 &req={2} ?WAIT4_END_GROUP;
FMUL R7, R2, R2 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R7 ?trans1;
EXIT ?trans5;
BRA 0xb0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: square(float*, float*)
_Z6squarePfS_:
s_load_b128 s[0:3], s[0:1], 0x0
v_lshlrev_b32_e32 v0, 2, v0
s_waitcnt lgkmcnt(0)
global_load_b32 v1, v0, s[2:3]
s_waitcnt vmcnt(0)
v_mul_f32_e32 v1, v1, v1
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| square | 336 | 143 | stackv2-00000-of-00015 |
// Demangled: sumOne(int, int*, int*, int*)
Function : _Z6sumOneiPiS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x2 ?trans6;
LDC R19, c[0x0][0x370] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B2, 0xf60 ?trans1;
S2R R17, SR_TID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x3 ?trans1;
HFMA2 R18, -RZ, RZ, 0, 0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x4 ?trans1;
IMAD R19, R19, UR4, RZ &req={2} ?WAIT2_END_GROUP;
IMAD R6, R0, UR4, R17 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R6, UR5, PT &req={3} ?WAIT13_END_GROUP;
@P0 BRA 0xf50 &req={4,0} ?trans5;
I2F.U32.RP R8, R19 &wr=0x0 ?trans1;
IADD3 R4, PT, PT, R19.reuse, R6, RZ ?trans2;
IADD3 R9, PT, PT, RZ, -R19, RZ ?trans1;
ISETP.NE.U32.AND P2, PT, R19, RZ, PT ?trans1;
BSSY.RECONVERGENT B1, 0xe70 ?trans1;
MOV R18, RZ ?trans1;
ISETP.GE.AND P0, PT, R4.reuse, UR5, PT ?trans1;
VIMNMX.S32 R5, R4, UR5, !PT ?WAIT4_END_GROUP;
SEL R7, RZ, 0x1, P0 ?trans1;
MUFU.RCP R8, R8 &req={0} &wr=0x0 ?trans4;
IADD3 R4, PT, PT, R5, -R4, -R7 ?trans2;
IADD3 R2, PT, PT, R8, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R3, R2 &rd=0x0 &wr=0x1 ?trans2;
MOV R2, RZ &req={0} ?trans1;
IMAD R9, R9, R3, RZ &req={1} ?WAIT4_END_GROUP;
IMAD.HI.U32 R3, R3, R9, R2 ?WAIT6_END_GROUP;
IMAD.HI.U32 R2, R3, R4, RZ ?WAIT5_END_GROUP;
IADD3 R3, PT, PT, -R2, RZ, RZ ?WAIT5_END_GROUP;
IMAD R4, R19, R3, R4 ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R4, R19, PT ?WAIT13_END_GROUP;
@P0 IADD3 R4, PT, PT, -R19, R4, RZ ?trans2;
@P0 IADD3 R2, PT, PT, R2, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R4, R19, PT ?WAIT13_END_GROUP;
@P1 IADD3 R2, PT, PT, R2, 0x1, RZ ?trans2;
@!P2 LOP3.LUT R2, RZ, R19, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R2, PT, PT, R7, R2, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R2.reuse, 0x3, PT ?trans1;
IADD3 R2, PT, PT, R2, 0x1, RZ ?WAIT4_END_GROUP;
LOP3.LUT R16, R2, 0x3, RZ, 0xc0, !PT ?WAIT8_END_GROUP;
@!P0 BRA 0xe60 ?trans5;
LOP3.LUT R20, R2, 0xfffffffc, RZ, 0xc0, !PT ?trans1;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
BSSY.RELIABLE B0, 0xcd0 ?trans1;
MOV R18, RZ ?trans1;
IADD3 R20, PT, PT, -R20, RZ, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R20, RZ, PT ?WAIT13_END_GROUP;
@P0 BRA 0xcc0 ?trans5;
IADD3 R2, PT, PT, -R20, RZ, RZ ?trans1;
BSSY.RECONVERGENT B3, 0x950 ?trans1;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?WAIT3_END_GROUP;
ISETP.GT.AND P1, PT, R2, 0xc, PT ?WAIT13_END_GROUP;
@!P1 BRA 0x940 ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans1;
PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x80 ?WAIT13_END_GROUP;
IMAD.WIDE R8, R6, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
LDG.E R32, desc[UR6][R8.64] &rd=0x1 &wr=0x2 ?trans1;
IMAD.WIDE R10, R19, 0x4, R8 ?WAIT5_END_GROUP;
LDG.E R21, desc[UR6][R10.64] &rd=0x3 &wr=0x4 ?trans1;
IMAD.WIDE R12, R19.reuse, 0x4, R10 ?trans1;
IADD3 R6, PT, PT, R19, R6, R19 ?WAIT4_END_GROUP;
LDG.E R22, desc[UR6][R12.64] &rd=0x5 &wr=0x4 ?trans1;
IMAD.WIDE R14, R19.reuse, 0x4, R12 ?trans1;
IADD3 R24, PT, PT, R19, R6, R19 ?WAIT4_END_GROUP;
LDG.E R23, desc[UR6][R14.64] &rd=0x0 &wr=0x4 ?trans1;
IMAD.WIDE R6, R24, 0x4, R2 ?WAIT5_END_GROUP;
LDG.E R29, desc[UR6][R6.64] &rd=0x0 &wr=0x4 ?trans1;
IMAD.WIDE R8, R19, 0x4, R6 &req={1} ?WAIT5_END_GROUP;
LDG.E R28, desc[UR6][R8.64] &wr=0x4 ?trans1;
IMAD.WIDE R10, R19.reuse, 0x4, R8 &req={3} ?trans1;
IADD3 R24, PT, PT, R19, R24, R19 ?WAIT4_END_GROUP;
LDG.E R27, desc[UR6][R10.64] &rd=0x1 &wr=0x3 ?trans1;
IMAD.WIDE R34, R19.reuse, 0x4, R10 ?trans1;
IADD3 R31, PT, PT, R19, R24, R19 ?WAIT4_END_GROUP;
LDG.E R26, desc[UR6][R34.64] &wr=0x3 ?trans1;
IMAD.WIDE R12, R31, 0x4, R2 &req={5} ?WAIT5_END_GROUP;
LDG.E R25, desc[UR6][R12.64] &rd=0x5 &wr=0x3 ?trans1;
IMAD.WIDE R14, R19, 0x4, R12 &req={0} ?WAIT5_END_GROUP;
LDG.E R24, desc[UR6][R14.64] &rd=0x0 &wr=0x3 ?trans1;
IMAD.WIDE R6, R19.reuse, 0x4, R14 ?trans1;
IADD3 R10, PT, PT, R19, R31, R19 &req={1} ?WAIT4_END_GROUP;
LDG.E R30, desc[UR6][R6.64] &rd=0x1 &wr=0x3 ?trans1;
IMAD.WIDE R8, R19.reuse, 0x4, R6 ?trans1;
IADD3 R31, PT, PT, R19, R10, R19 ?WAIT5_END_GROUP;
LDG.E R8, desc[UR6][R8.64] &rd=0x0 &wr=0x3 ?trans1;
IMAD.WIDE R10, R31, 0x4, R2 ?WAIT5_END_GROUP;
LDG.E R33, desc[UR6][R10.64] &rd=0x1 &wr=0x3 ?trans1;
IMAD.WIDE R12, R19, 0x4, R10 &req={5} ?WAIT5_END_GROUP;
LDG.E R34, desc[UR6][R12.64] &wr=0x5 ?trans1;
IMAD.WIDE R14, R19, 0x4, R12 &req={0} ?WAIT5_END_GROUP;
LDG.E R35, desc[UR6][R14.64] &wr=0x5 ?trans1;
IMAD.WIDE R6, R19, 0x4, R14 &req={1} ?WAIT6_END_GROUP;
LDG.E R6, desc[UR6][R6.64] &rd=0x0 &wr=0x5 ?trans1;
IADD3 R9, PT, PT, R18, 0x1, RZ ?trans2;
IADD3 R20, PT, PT, R20, 0x10, RZ ?trans1;
ISETP.NE.AND P1, PT, R32, 0x1, PT &req={2} ?trans1;
ISETP.NE.AND P2, PT, R21, 0x1, PT &req={4} ?WAIT12_END_GROUP;
@P1 IADD3 R9, PT, PT, R18, RZ, RZ ?trans1;
ISETP.NE.AND P1, PT, R22, 0x1, PT ?WAIT3_END_GROUP;
IADD3 R10, PT, PT, R9.reuse, 0x1, RZ ?trans2;
@P2 IADD3 R10, PT, PT, R9, RZ, RZ ?trans1;
ISETP.NE.AND P2, PT, R23, 0x1, PT ?WAIT3_END_GROUP;
IADD3 R9, PT, PT, R10, 0x1, RZ ?WAIT4_END_GROUP;
@P1 IADD3 R9, PT, PT, R10, RZ, RZ ?trans1;
ISETP.NE.AND P1, PT, R29, 0x1, PT ?WAIT3_END_GROUP;
IADD3 R7, PT, PT, R9.reuse, 0x1, RZ &req={0} ?trans2;
@P2 IADD3 R7, PT, PT, R9, RZ, RZ ?trans1;
ISETP.NE.AND P2, PT, R28, 0x1, PT ?WAIT3_END_GROUP;
IADD3 R9, PT, PT, R7, 0x1, RZ ?WAIT4_END_GROUP;
@P1 IADD3 R9, PT, PT, R7, RZ, RZ ?trans1;
ISETP.NE.AND P1, PT, R27, 0x1, PT &req={3} ?WAIT3_END_GROUP;
IADD3 R7, PT, PT, R9.reuse, 0x1, RZ ?trans2;
@P2 IADD3 R7, PT, PT, R9, RZ, RZ ?trans1;
ISETP.NE.AND P2, PT, R26, 0x1, PT ?WAIT3_END_GROUP;
IADD3 R9, PT, PT, R7, 0x1, RZ ?WAIT4_END_GROUP;
@P1 IADD3 R9, PT, PT, R7, RZ, RZ ?trans1;
ISETP.NE.AND P1, PT, R25, 0x1, PT ?WAIT3_END_GROUP;
IADD3 R7, PT, PT, R9.reuse, 0x1, RZ ?trans2;
@P2 IADD3 R7, PT, PT, R9, RZ, RZ ?trans1;
ISETP.NE.AND P2, PT, R24, 0x1, PT ?WAIT3_END_GROUP;
IADD3 R9, PT, PT, R7, 0x1, RZ ?WAIT4_END_GROUP;
@P1 IADD3 R9, PT, PT, R7, RZ, RZ ?trans1;
ISETP.NE.AND P1, PT, R30, 0x1, PT ?WAIT3_END_GROUP;
IADD3 R7, PT, PT, R9.reuse, 0x1, RZ ?trans2;
@P2 IADD3 R7, PT, PT, R9, RZ, RZ ?trans1;
ISETP.NE.AND P2, PT, R8, 0x1, PT ?WAIT3_END_GROUP;
IADD3 R9, PT, PT, R7, 0x1, RZ ?WAIT4_END_GROUP;
@P1 IADD3 R9, PT, PT, R7, RZ, RZ ?trans1;
ISETP.NE.AND P1, PT, R33, 0x1, PT ?WAIT3_END_GROUP;
IADD3 R7, PT, PT, R9.reuse, 0x1, RZ ?trans2;
@P2 IADD3 R7, PT, PT, R9, RZ, RZ ?trans1;
ISETP.NE.AND P2, PT, R34, 0x1, PT &req={5} ?WAIT3_END_GROUP;
IADD3 R8, PT, PT, R7, 0x1, RZ ?WAIT4_END_GROUP;
@P1 IADD3 R8, PT, PT, R7, RZ, RZ ?trans1;
ISETP.NE.AND P1, PT, R35, 0x1, PT ?WAIT3_END_GROUP;
IADD3 R7, PT, PT, R8.reuse, 0x1, RZ ?trans2;
@P2 IADD3 R7, PT, PT, R8, RZ, RZ ?trans1;
ISETP.NE.AND P2, PT, R6, 0x1, PT ?trans1;
IADD3 R6, PT, PT, R19, R31, R19.reuse ?trans2;
IADD3 R8, PT, PT, R7, 0x1, RZ ?trans2;
IADD3 R6, PT, PT, R19, R6, R19 ?trans2;
@P1 IADD3 R8, PT, PT, R7, RZ, RZ ?trans1;
ISETP.GE.AND P1, PT, R20, -0xc, PT ?WAIT3_END_GROUP;
IADD3 R18, PT, PT, R8.reuse, 0x1, RZ ?trans2;
@P2 IADD3 R18, PT, PT, R8, RZ, RZ ?WAIT8_END_GROUP;
@!P1 BRA 0x390 ?trans5;
BSYNC.RECONVERGENT B3 ?trans5;
IADD3 R2, PT, PT, -R20, RZ, RZ ?trans1;
BSSY.RECONVERGENT B3, 0xc90 ?trans4;
ISETP.GT.AND P1, PT, R2, 0x4, PT ?WAIT13_END_GROUP;
@!P1 BRA 0xc80 ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans2;
IMAD.WIDE R8, R6, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
LDG.E R27, desc[UR6][R8.64] &rd=0x1 &wr=0x2 ?trans1;
IMAD.WIDE R10, R19, 0x4, R8 ?WAIT5_END_GROUP;
LDG.E R21, desc[UR6][R10.64] &rd=0x3 &wr=0x4 ?trans1;
IMAD.WIDE R12, R19.reuse, 0x4, R10 ?trans1;
IADD3 R6, PT, PT, R19, R6, R19 ?WAIT4_END_GROUP;
LDG.E R22, desc[UR6][R12.64] &rd=0x5 &wr=0x4 ?trans1;
IMAD.WIDE R14, R19.reuse, 0x4, R12 ?trans1;
IADD3 R23, PT, PT, R19, R6, R19 ?WAIT5_END_GROUP;
LDG.E R14, desc[UR6][R14.64] &wr=0x4 ?trans1;
IMAD.WIDE R2, R23, 0x4, R2 ?WAIT5_END_GROUP;
LDG.E R24, desc[UR6][R2.64] &wr=0x4 ?trans1;
IMAD.WIDE R6, R19, 0x4, R2 ?WAIT5_END_GROUP;
LDG.E R25, desc[UR6][R6.64] &rd=0x0 &wr=0x4 ?trans1;
IMAD.WIDE R8, R19, 0x4, R6 &req={1} ?WAIT5_END_GROUP;
LDG.E R26, desc[UR6][R8.64] &wr=0x4 ?trans1;
IMAD.WIDE R10, R19, 0x4, R8 &req={3} ?WAIT6_END_GROUP;
LDG.E R10, desc[UR6][R10.64] &wr=0x3 ?trans1;
IADD3 R12, PT, PT, R18, 0x1, RZ &req={5} ?trans2;
IADD3 R6, PT, PT, R19.reuse, R23, R19.reuse &req={0} ?trans2;
IADD3 R20, PT, PT, R20, 0x8, RZ ?trans2;
IADD3 R6, PT, PT, R19, R6, R19 ?trans1;
ISETP.NE.AND P0, PT, R27, 0x1, PT &req={2} ?trans1;
ISETP.NE.AND P1, PT, R21, 0x1, PT &req={4} ?WAIT12_END_GROUP;
@P0 IADD3 R12, PT, PT, R18, RZ, RZ ?trans1;
ISETP.NE.AND P0, PT, R22, 0x1, PT ?WAIT3_END_GROUP;
IADD3 R2, PT, PT, R12.reuse, 0x1, RZ ?trans2;
@P1 IADD3 R2, PT, PT, R12, RZ, RZ ?trans1;
ISETP.NE.AND P1, PT, R14, 0x1, PT ?WAIT3_END_GROUP;
IADD3 R3, PT, PT, R2, 0x1, RZ ?WAIT4_END_GROUP;
@P0 IADD3 R3, PT, PT, R2, RZ, RZ ?trans1;
ISETP.NE.AND P0, PT, R24, 0x1, PT ?WAIT3_END_GROUP;
IADD3 R2, PT, PT, R3.reuse, 0x1, RZ ?trans2;
@P1 IADD3 R2, PT, PT, R3, RZ, RZ ?trans1;
ISETP.NE.AND P1, PT, R25, 0x1, PT ?WAIT3_END_GROUP;
IADD3 R3, PT, PT, R2, 0x1, RZ ?WAIT4_END_GROUP;
@P0 IADD3 R3, PT, PT, R2, RZ, RZ ?trans1;
ISETP.NE.AND P0, PT, R26, 0x1, PT ?WAIT3_END_GROUP;
IADD3 R2, PT, PT, R3.reuse, 0x1, RZ ?trans2;
@P1 IADD3 R2, PT, PT, R3, RZ, RZ ?trans1;
ISETP.NE.AND P1, PT, R10, 0x1, PT &req={3} ?WAIT3_END_GROUP;
IADD3 R3, PT, PT, R2, 0x1, RZ ?WAIT4_END_GROUP;
@P0 IADD3 R3, PT, PT, R2, RZ, RZ ?trans2;
PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x80 ?trans2;
IADD3 R18, PT, PT, R3.reuse, 0x1, RZ ?trans2;
@P1 IADD3 R18, PT, PT, R3, RZ, RZ ?WAIT9_END_GROUP;
BSYNC.RECONVERGENT B3 ?trans5;
ISETP.NE.OR P0, PT, R20, RZ, P0 ?WAIT13_END_GROUP;
@!P0 BREAK.RELIABLE B0 ?trans5;
@!P0 BRA 0xe60 ?trans5;
BSYNC.RELIABLE B0 ?trans5;
IMAD.WIDE R2, R6, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
LDG.E R7, desc[UR6][R2.64] &wr=0x2 ?trans1;
IMAD.WIDE R8, R19, 0x4, R2 ?WAIT5_END_GROUP;
LDG.E R14, desc[UR6][R8.64] &wr=0x3 ?trans1;
IMAD.WIDE R10, R19, 0x4, R8 ?WAIT5_END_GROUP;
LDG.E R15, desc[UR6][R10.64] &wr=0x4 ?trans1;
IMAD.WIDE R12, R19, 0x4, R10 ?WAIT6_END_GROUP;
LDG.E R12, desc[UR6][R12.64] &wr=0x5 ?trans1;
IADD3 R20, PT, PT, R20, 0x4, RZ ?trans2;
IADD3 R6, PT, PT, R19, R6, R19 ?WAIT4_END_GROUP;
IADD3 R6, PT, PT, R19, R6, R19 ?trans1;
ISETP.NE.AND P0, PT, R7, 0x1, PT &req={2} ?trans1;
IADD3 R7, PT, PT, R18, 0x1, RZ ?trans1;
ISETP.NE.AND P1, PT, R14, 0x1, PT &req={3} ?WAIT11_END_GROUP;
@P0 IADD3 R7, PT, PT, R18, RZ, RZ ?trans1;
ISETP.NE.AND P0, PT, R15, 0x1, PT &req={4} ?WAIT3_END_GROUP;
IADD3 R2, PT, PT, R7.reuse, 0x1, RZ ?trans2;
@P1 IADD3 R2, PT, PT, R7, RZ, RZ ?trans1;
ISETP.NE.AND P1, PT, R12, 0x1, PT &req={5} ?WAIT3_END_GROUP;
IADD3 R3, PT, PT, R2, 0x1, RZ ?WAIT4_END_GROUP;
@P0 IADD3 R3, PT, PT, R2, RZ, RZ ?trans1;
ISETP.NE.AND P0, PT, R20, RZ, PT ?WAIT3_END_GROUP;
IADD3 R18, PT, PT, R3.reuse, 0x1, RZ ?trans2;
@P1 IADD3 R18, PT, PT, R3, RZ, RZ ?WAIT8_END_GROUP;
@P0 BRA 0xcd0 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
ISETP.NE.AND P0, PT, R16, RZ, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xf50 ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans1;
IADD3 R16, PT, PT, -R16, RZ, RZ ?WAIT7_END_GROUP;
IMAD.WIDE R4, R6, 0x4, R2 &req={1,0} ?WAIT6_END_GROUP;
LDG.E R4, desc[UR6][R4.64] &wr=0x2 ?trans1;
IADD3 R16, PT, PT, R16, 0x1, RZ ?trans2;
IADD3 R7, PT, PT, R18, 0x1, RZ ?trans2;
IADD3 R6, PT, PT, R19, R6, RZ ?trans1;
ISETP.NE.AND P1, PT, R16, RZ, PT ?trans1;
ISETP.NE.AND P0, PT, R4, 0x1, PT &req={2} ?WAIT13_END_GROUP;
@P0 IADD3 R7, PT, PT, R18, RZ, RZ ?WAIT5_END_GROUP;
MOV R18, R7 ?trans1;
@P1 BRA 0xeb0 ?trans6;
BSYNC.RECONVERGENT B2 ?trans5;
WARPSYNC.ALL ?trans5;
NOP ?trans1;
S2R R4, SR_LANEID &req={0} &wr=0x0 ?trans1;
REDUX.SUM UR8, R18 &wr=0x1 ?trans8;
LDC.64 R2, c[0x0][0x390] &wr=0x2 ?trans1;
VOTEU.ANY UR4, UPT, PT ?trans1;
ISETP.NE.AND P0, PT, R17, RZ, PT ?trans1;
UFLO.U32 UR4, UR4 ?trans1;
IMAD.WIDE.U32 R2, R0, 0x4, R2 &req={2} ?trans1;
MOV R5, UR8 &req={1} ?WAIT4_END_GROUP;
ISETP.EQ.U32.AND P1, PT, R4, UR4, PT &req={0} ?WAIT13_END_GROUP;
@P1 REDG.E.ADD.STRONG.GPU desc[UR6][R2.64], R5 &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 EXIT ?trans5;
LDG.E R3, desc[UR6][R2.64] &req={0} &wr=0x2 ?trans1;
LDC.64 R4, c[0x0][0x398] &wr=0x2 ?trans3;
REDG.E.ADD.STRONG.GPU desc[UR6][R4.64], R3 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x1080;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: sumOne(int, int*, int*, int*)
_Z6sumOneiPiS_S_:
s_clause 0x3
s_load_b32 s10, s[0:1], 0x2c
s_load_b32 s9, s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x18
s_load_b128 s[4:7], s[0:1], 0x8
s_add_u32 s0, s0, 32
s_mov_b32 s8, s15
s_addc_u32 s1, s1, 0
v_mov_b32_e32 v4, 0
s_mov_b32 s12, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s10, s10, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s8, s10, v[0:1]
v_cmpx_gt_i32_e64 s9, v1
s_cbranch_execz .LBB0_4
s_load_b32 s0, s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
v_mov_b32_e32 v4, 0
s_mov_b32 s1, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_co_u32 v2, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
s_waitcnt lgkmcnt(0)
s_mul_i32 s10, s0, s10
s_ashr_i32 s11, s10, 31
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[4:5], s[10:11], 2
.LBB0_2:
global_load_b32 v5, v[2:3], off
v_add_nc_u32_e32 v1, s10, v1
v_add_co_u32 v2, vcc_lo, v2, s4
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_cmp_le_i32_e32 vcc_lo, s9, v1
s_or_b32 s1, vcc_lo, s1
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e64 s0, 1, v5
v_add_co_ci_u32_e64 v4, s0, 0, v4, s0
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execnz .LBB0_2
s_or_b32 exec_lo, exec_lo, s1
.LBB0_4:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s12
s_mov_b32 s0, exec_lo
s_mov_b32 s4, 0
.LBB0_5:
s_ctz_i32_b32 s1, s0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_readlane_b32 s5, v4, s1
s_lshl_b32 s1, 1, s1
s_and_not1_b32 s0, s0, s1
s_delay_alu instid0(VALU_DEP_1)
s_add_i32 s4, s4, s5
s_cmp_lg_u32 s0, 0
s_cbranch_scc1 .LBB0_5
s_mov_b32 s9, 0
v_mbcnt_lo_u32_b32 v1, exec_lo, 0
s_lshl_b64 s[0:1], s[8:9], 2
s_mov_b32 s5, exec_lo
s_add_u32 s0, s6, s0
s_addc_u32 s1, s7, s1
v_cmpx_eq_u32_e32 0, v1
s_xor_b32 s5, exec_lo, s5
s_cbranch_execz .LBB0_8
v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v2, s4
global_atomic_add_u32 v1, v2, s[0:1]
.LBB0_8:
s_or_b32 exec_lo, exec_lo, s5
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_mov_b32 s4, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB0_11
s_mov_b32 s4, exec_lo
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mbcnt_lo_u32_b32 v0, s4, 0
v_cmp_eq_u32_e32 vcc_lo, 0, v0
s_and_b32 s5, exec_lo, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 exec_lo, s5
s_cbranch_execz .LBB0_11
v_mov_b32_e32 v0, 0
global_load_b32 v1, v0, s[0:1]
s_bcnt1_i32_b32 s0, s4
s_waitcnt vmcnt(0)
v_mul_lo_u32 v1, v1, s0
global_atomic_add_u32 v0, v1, s[2:3]
.LBB0_11:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| sumOne | 6,903 | 1,565 | stackv2-00000-of-00015 |
// Demangled: bitonic_sort_step(int*, int, int, int)
Function : _Z17bitonic_sort_stepPiiii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R0, c[0x0][0x390] &wr=0x2 ?trans1;
USHF.L.U32 UR4, UR4, 0xa, URZ &req={1} ?WAIT6_END_GROUP;
ISETP.LE.AND P0, PT, R0, UR4, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
S2R R6, SR_TID.X &wr=0x0 ?trans1;
S2UR UR6, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR5, 0x400 ?trans1;
LDCU UR7, c[0x0][0x370] &wr=0x2 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x3 ?trans1;
ULEA UR5, UR6, UR5, 0x18 &req={1} ?WAIT6_END_GROUP;
LEA R0, R6, UR5, 0x2 &req={3,2,0} ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x380] &req={0} &wr=0x0 ?trans1;
IADD3 R5, PT, PT, R6, UR4, RZ ?WAIT7_END_GROUP;
LDC R4, c[0x0][0x38c] &wr=0x1 ?trans8;
LDC R7, c[0x0][0x390] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R2, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R5, desc[UR8][R2.64] &wr=0x3 ?trans1;
ULEA UR4, UR7, UR4, 0xa ?trans1;
ISETP.GE.AND P1, PT, R4, 0x2, PT &req={1} ?WAIT5_END_GROUP;
ISETP.LE.AND P0, PT, R7, UR4, PT &req={2} ?trans1;
STS [R0], R5 &req={3} &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P1 BRA 0x350 ?trans5;
LDCU UR6, c[0x0][0x38c] &wr=0x1 ?trans1;
LDCU UR10, c[0x0][0x38c] &wr=0x2 ?trans2;
MOV R8, UR6 &req={1} ?trans1;
USHF.R.U32.HI UR6, URZ, 0x1, UR6 ?trans1;
BSSY.RECONVERGENT B0, 0x320 ?trans5;
LOP3.LUT R5, R6, UR6, RZ, 0x3c, !PT &req={0} ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R5, R6, PT ?WAIT13_END_GROUP;
@!P1 BRA 0x310 ?trans5;
LOP3.LUT P1, RZ, R6, UR10, RZ, 0xc0, !PT &req={2} ?WAIT13_END_GROUP;
@!P1 BRA 0x2b0 ?trans5;
LEA R5, R5, UR5, 0x2 ?trans1;
LDS R4, [R0] ?trans4;
LDS R7, [R5] &wr=0x0 ?trans2;
ISETP.GE.AND P1, PT, R4, R7, PT &req={0} ?WAIT13_END_GROUP;
@P1 BRA 0x310 ?trans5;
STS [R0], R7 &rd=0x1 ?trans4;
STS [R5], R4 &rd=0x1 ?trans1;
BRA 0x310 ?trans5;
LEA R7, R5, UR5, 0x2 ?trans1;
LDS R4, [R0] ?trans4;
LDS R5, [R7] &wr=0x0 ?trans2;
ISETP.GT.AND P1, PT, R4, R5, PT &req={0} ?WAIT13_END_GROUP;
@P1 STS [R0], R5 &rd=0x0 ?trans4;
@P1 STS [R7], R4 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 &req={2} ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P1, PT, R8, 0x3, PT ?WAIT13_END_GROUP;
@P1 BRA 0x1b0 ?trans5;
LDS R5, [R0] &req={1,0} &wr=0x0 ?trans4;
STG.E desc[UR8][R2.64], R5 &req={0} &rd=0x0 ?trans1;
@!P0 BRA 0xd0 ?trans5;
EXIT ?trans5;
BRA 0x390;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: bitonic_sort_step(int*, int, int, int)
_Z17bitonic_sort_stepPiiii:
s_load_b64 s[2:3], s[0:1], 0xc
s_lshl_b32 s4, s15, 10
s_waitcnt lgkmcnt(0)
s_cmp_ge_i32 s4, s3
s_cbranch_scc1 .LBB1_12
s_clause 0x1
s_load_b64 s[6:7], s[0:1], 0x0
s_load_b32 s5, s[0:1], 0x18
s_lshr_b32 s0, s2, 31
v_lshlrev_b32_e32 v3, 2, v0
v_and_b32_e32 v1, s2, v0
s_add_i32 s0, s2, s0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
s_ashr_i32 s1, s0, 1
s_cmp_gt_i32 s2, 1
v_cmp_ne_u32_e64 s0, 0, v1
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, s2, s6, v3
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v5, null, s7, 0, s2
s_cselect_b32 s2, -1, 0
s_lshl_b32 s6, s5, 10
.LBB1_2:
s_ashr_i32 s5, s4, 31
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[8:9], s[4:5], 2
s_mov_b32 s5, s1
v_add_co_u32 v1, vcc_lo, v4, s8
v_add_co_ci_u32_e32 v2, vcc_lo, s9, v5, vcc_lo
s_and_not1_b32 vcc_lo, exec_lo, s2
global_load_b32 v6, v[1:2], off
s_waitcnt vmcnt(0)
ds_store_b32 v3, v6
s_waitcnt lgkmcnt(0)
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_cbranch_vccnz .LBB1_11
.LBB1_3:
v_xor_b32_e32 v6, s5, v0
s_mov_b32 s7, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_u32_e64 v6, v0
s_cbranch_execz .LBB1_10
v_lshlrev_b32_e32 v6, 2, v6
s_mov_b32 s8, 0
ds_load_b32 v7, v3
ds_load_b32 v8, v6
s_and_saveexec_b32 s9, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_xor_b32 s9, exec_lo, s9
s_cbranch_execz .LBB1_6
s_waitcnt lgkmcnt(0)
v_cmp_lt_i32_e32 vcc_lo, v7, v8
s_and_b32 s8, vcc_lo, exec_lo
.LBB1_6:
s_and_not1_saveexec_b32 s9, s9
s_cbranch_execz .LBB1_8
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, v7, v8
s_and_not1_b32 s8, s8, exec_lo
s_and_b32 s10, vcc_lo, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s8, s8, s10
.LBB1_8:
s_or_b32 exec_lo, exec_lo, s9
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 exec_lo, exec_lo, s8
s_cbranch_execz .LBB1_10
s_waitcnt lgkmcnt(0)
ds_store_b32 v3, v8
ds_store_b32 v6, v7
.LBB1_10:
s_or_b32 exec_lo, exec_lo, s7
s_lshr_b32 s7, s5, 1
s_cmp_gt_u32 s5, 1
s_mov_b32 s5, s7
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB1_3
.LBB1_11:
ds_load_b32 v6, v3
s_add_i32 s4, s4, s6
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_ge_i32 s4, s3
s_waitcnt lgkmcnt(0)
global_store_b32 v[1:2], v6, off
s_cbranch_scc0 .LBB1_2
.LBB1_12:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| bitonic_sort_step | 1,359 | 1,263 | stackv2-00000-of-00015 |
// Demangled: kernel_bitonic_merge_step(int*, int, bool, bool)
Function : _Z25kernel_bitonic_merge_stepPiibb
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC.U8 R2, c[0x0][0x38c] &wr=0x1 ?trans1;
S2R R6, SR_TID.X &wr=0x2 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x3 ?trans6;
LDC R0, c[0x0][0x370] &wr=0x4 ?trans8;
S2UR UR4, SR_CTAID.X &wr=0x0 ?trans1;
PRMT R2, R2, 0x8880, RZ &req={1} ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R2, RZ, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xae0 &req={4,3,2,0} ?trans5;
LDC R7, c[0x0][0x388] &wr=0x0 ?trans1;
USHF.L.U32 UR4, UR4, 0xa, URZ ?WAIT4_END_GROUP;
UIADD3 UR5, UPT, UPT, UR4, 0x200, URZ ?trans1;
IADD3 R7, PT, PT, R7, -0x400, RZ &req={0} ?WAIT5_END_GROUP;
ISETP.LE.AND P0, PT, R7, UR5, PT ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LOP3.LUT R9, R6.reuse, 0x80, RZ, 0x3c, !PT ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x0 ?trans1;
LOP3.LUT R11, R6.reuse, 0x40, RZ, 0x3c, !PT ?trans1;
IMAD.SHL.U32 R8, R6.reuse, 0x4, RZ ?trans1;
LOP3.LUT R3, R6.reuse, 0x20, RZ, 0x3c, !PT ?trans1;
ISETP.GT.U32.AND P1, PT, R9, R6.reuse, PT ?trans2;
ISETP.GT.U32.AND P2, PT, R11, R6.reuse, PT ?trans1;
MOV R13, UR4 ?trans1;
ISETP.GT.U32.AND P0, PT, R3, R6, PT ?trans1;
LOP3.LUT R3, R6.reuse, 0x10, RZ, 0x3c, !PT ?trans1;
UMOV UR4, 0x400 ?trans1;
P2R R2, PR, RZ, 0x2 ?trans1;
ISETP.GT.U32.AND P1, PT, R6, 0x1ff, PT ?trans1;
P2R R2, PR, RZ, 0x4 ?WAIT2_END_GROUP;
LOP3.LUT R17, R6.reuse, 0x4, RZ, 0x3c, !PT ?trans2;
SEL R2, R6.reuse, RZ, P1 ?trans1;
SEL R15, R6.reuse, 0x5ff, !P1 ?trans1;
ISETP.GT.U32.AND P1, PT, R3, R6.reuse, PT ?trans1;
LOP3.LUT R5, R6, 0x8, RZ, 0x3c, !PT ?trans1;
ISETP.GT.U32.AND P3, PT, R17, R6, PT ?trans2;
IADD3 R15, PT, PT, -R2, R15, R13 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={0} ?trans1;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LOP3.LUT R17, R6, 0x200, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
LOP3.LUT R19, R6.reuse, 0x2, RZ, 0x3c, !PT ?trans1;
ISETP.GT.U32.AND P2, PT, R5, R6.reuse, PT ?trans1;
LOP3.LUT R5, R6.reuse, 0x1, RZ, 0x3c, !PT ?trans1;
ISETP.GT.U32.AND P6, PT, R17, R6.reuse, PT ?trans2;
ISETP.GT.U32.AND P4, PT, R19, R6, PT ?trans1;
LOP3.LUT R19, R6, 0x100, RZ, 0x3c, !PT ?trans2;
LOP3.LUT R10, R8.reuse, 0x200, RZ, 0x3c, !PT ?trans2;
LOP3.LUT R12, R8, 0x100, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
LOP3.LUT R14, R8.reuse, 0x80, RZ, 0x3c, !PT ?trans2;
LOP3.LUT R16, R8.reuse, 0x40, RZ, 0x3c, !PT ?trans2;
LOP3.LUT R18, R8.reuse, 0x20, RZ, 0x3c, !PT ?trans2;
LOP3.LUT R20, R8.reuse, 0x10, RZ, 0x3c, !PT ?trans2;
LOP3.LUT R21, R8.reuse, 0x8, RZ, 0x3c, !PT ?trans2;
LOP3.LUT R22, R8, 0x4, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
IADD3 R23, PT, PT, R13, R6.reuse, RZ ?trans1;
ISETP.GT.U32.AND P5, PT, R5, R6, PT ?trans1;
P2R R4, PR, RZ, 0x40 ?WAIT12_END_GROUP;
IADD3 R5, PT, PT, R15, 0x200, RZ &req={1} ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R4, R5, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR8][R4.64] &wr=0x2 ?trans1;
ISETP.GT.U32.AND P6, PT, R17, R6, PT ?trans1;
BSSY.RECONVERGENT B0, 0x4a0 ?trans2;
STS [R8+UR4], R5 &req={2} &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans9;
@!P6 BRA 0x490 ?trans5;
S2UR UR6, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR5, 0x400 ?trans1;
LDS R4, [R8+UR4] ?trans1;
ULEA UR5, UR6, UR5, 0x18 &req={1} ?WAIT6_END_GROUP;
LEA R5, R17, UR5, 0x2 &req={0} ?WAIT5_END_GROUP;
LDS R25, [R5] &wr=0x0 ?trans2;
ISETP.GT.AND P6, PT, R4, R25, PT &req={0} ?WAIT13_END_GROUP;
@P6 STS [R8+UR4], R25 &rd=0x1 ?trans4;
@P6 STS [R5], R4 &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P6, PT, R19, R6, PT ?WAIT5_END_GROUP;
BSSY.RECONVERGENT B0, 0x580 ?trans8;
@!P6 BRA 0x570 ?trans5;
S2UR UR6, SR_CgaCtaId &wr=0x2 ?trans1;
UMOV UR5, 0x400 ?trans1;
LDS R4, [R8+UR4] &req={1} ?trans1;
ULEA UR5, UR6, UR5, 0x18 &req={2} ?WAIT6_END_GROUP;
LEA R5, R19, UR5, 0x2 &req={0} ?WAIT5_END_GROUP;
LDS R25, [R5] &wr=0x0 ?trans2;
ISETP.GT.AND P6, PT, R4, R25, PT &req={0} ?WAIT13_END_GROUP;
@P6 STS [R8+UR4], R25 &rd=0x2 ?trans4;
@P6 STS [R5], R4 &rd=0x2 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P6, PT, R9, R6, PT ?WAIT5_END_GROUP;
BSSY.RECONVERGENT B0, 0x620 ?trans8;
@!P6 BRA 0x610 ?trans5;
LDS R5, [R8+UR4] &req={2,1,0} ?trans4;
LDS R4, [R10+UR4] &wr=0x0 ?trans2;
ISETP.GT.AND P6, PT, R5, R4, PT &req={0} ?WAIT13_END_GROUP;
@P6 STS [R8+UR4], R4 &rd=0x3 ?trans4;
@P6 STS [R10+UR4], R5 &rd=0x3 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P6, PT, R11, R6, PT ?WAIT5_END_GROUP;
BSSY.RECONVERGENT B0, 0x6c0 ?trans8;
@!P6 BRA 0x6b0 ?trans5;
LDS R5, [R8+UR4] &req={3,2,1,0} ?trans4;
LDS R4, [R12+UR4] &wr=0x0 ?trans2;
ISETP.GT.AND P6, PT, R5, R4, PT &req={0} ?WAIT13_END_GROUP;
@P6 STS [R8+UR4], R4 &rd=0x4 ?trans4;
@P6 STS [R12+UR4], R5 &rd=0x4 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x750 ?trans4;
@!P0 BRA 0x740 ?trans5;
LDS R5, [R8+UR4] &req={4,3,2,1,0} ?trans4;
LDS R4, [R14+UR4] &wr=0x0 ?trans2;
ISETP.GT.AND P6, PT, R5, R4, PT &req={0} ?WAIT13_END_GROUP;
@P6 STS [R8+UR4], R4 &rd=0x0 ?trans4;
@P6 STS [R14+UR4], R5 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x7e0 ?trans4;
@!P1 BRA 0x7d0 ?trans5;
LDS R5, [R8+UR4] &req={4,3,2,1,0} ?trans4;
LDS R4, [R16+UR4] &wr=0x0 ?trans2;
ISETP.GT.AND P6, PT, R5, R4, PT &req={0} ?WAIT13_END_GROUP;
@P6 STS [R8+UR4], R4 &rd=0x0 ?trans4;
@P6 STS [R16+UR4], R5 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x870 ?trans4;
@!P2 BRA 0x860 ?trans5;
LDS R5, [R8+UR4] &req={4,3,2,1,0} ?trans4;
LDS R4, [R18+UR4] &wr=0x0 ?trans2;
ISETP.GT.AND P6, PT, R5, R4, PT &req={0} ?WAIT13_END_GROUP;
@P6 STS [R8+UR4], R4 &rd=0x0 ?trans4;
@P6 STS [R18+UR4], R5 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x900 ?trans4;
@!P3 BRA 0x8f0 ?trans5;
LDS R5, [R8+UR4] &req={4,3,2,1,0} ?trans4;
LDS R4, [R20+UR4] &wr=0x0 ?trans2;
ISETP.GT.AND P6, PT, R5, R4, PT &req={0} ?WAIT13_END_GROUP;
@P6 STS [R8+UR4], R4 &rd=0x0 ?trans4;
@P6 STS [R20+UR4], R5 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x990 ?trans4;
@!P4 BRA 0x980 ?trans5;
LDS R4, [R8+UR4] &req={4,3,2,1,0} ?trans4;
LDS R5, [R21+UR4] &wr=0x0 ?trans2;
ISETP.GT.AND P6, PT, R4, R5, PT &req={0} ?WAIT13_END_GROUP;
@P6 STS [R8+UR4], R5 &rd=0x0 ?trans4;
@P6 STS [R21+UR4], R4 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0xa20 ?trans4;
@!P5 BRA 0xa10 ?trans5;
LDS R5, [R8+UR4] &req={4,3,2,1,0} ?trans4;
LDS R4, [R22+UR4] &wr=0x0 ?trans2;
ISETP.GT.AND P6, PT, R5, R4, PT &req={0} ?WAIT13_END_GROUP;
@P6 STS [R8+UR4], R4 &rd=0x0 ?trans4;
@P6 STS [R22+UR4], R5 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
IADD3 R5, PT, PT, R23, 0x200, RZ &req={4,3,2,1,0} ?trans1;
IMAD R13, R0.reuse, 0x400, R13 ?trans2;
IMAD R15, R0, 0x400, R15 ?trans2;
IMAD.WIDE.U32 R4, R5, 0x4, R2 ?trans1;
IADD3 R24, PT, PT, R13, 0x200, RZ ?WAIT3_END_GROUP;
IMAD R23, R0, 0x400, R23 ?trans2;
ISETP.GE.AND P6, PT, R24, R7, PT ?trans1;
LDS R25, [R8+UR4] &wr=0x0 ?trans4;
STG.E desc[UR8][R4.64], R25 &req={0} &rd=0x1 ?trans8;
@!P6 BRA 0x380 ?trans5;
EXIT ?trans5;
LDC R2, c[0x0][0x388] &wr=0x0 ?trans1;
USHF.L.U32 UR4, UR4, 0xa, URZ ?WAIT6_END_GROUP;
ISETP.LE.AND P0, PT, R2, UR4, PT &req={0} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LOP3.LUT R21, R6.reuse, 0x100, RZ, 0x3c, !PT ?trans1;
S2UR UR6, SR_CgaCtaId &wr=0x0 ?trans1;
LOP3.LUT R23, R6.reuse, 0x80, RZ, 0x3c, !PT ?trans1;
IMAD.SHL.U32 R10, R6.reuse, 0x4, RZ ?trans1;
LOP3.LUT R25, R6.reuse, 0x40, RZ, 0x3c, !PT ?trans1;
UMOV UR5, 0x400 ?trans1;
ISETP.GT.U32.AND P1, PT, R21, R6.reuse, PT ?trans1;
ISETP.GT.U32.AND P0, PT, R23, R6, PT ?trans1;
LOP3.LUT R3, R6.reuse, 0x20, RZ, 0x3c, !PT ?trans1;
LDCU UR7, c[0x0][0x388] &wr=0x1 ?trans1;
LOP3.LUT R7, R6, 0x8, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
P2R R2, PR, RZ, 0x2 ?trans1;
ISETP.GT.U32.AND P1, PT, R25, R6.reuse, PT ?trans1;
P2R R2, PR, RZ, 0x1 ?trans1;
ISETP.GT.U32.AND P0, PT, R3, R6.reuse, PT ?trans1;
ISETP.GT.U32.AND P3, PT, R6.reuse, 0x1ff, PT ?trans2;
P2R R2, PR, RZ, 0x2 ?trans2;
LOP3.LUT R3, R6.reuse, 0x4, RZ, 0x3c, !PT ?trans1;
ISETP.GT.U32.AND P2, PT, R7, R6, PT ?trans1;
SEL R7, R6.reuse, RZ, P3 ?trans1;
SEL R8, R6, 0x5ff, !P3 ?WAIT2_END_GROUP;
ISETP.GT.U32.AND P3, PT, R3, R6.reuse, PT ?trans1;
LOP3.LUT R5, R6.reuse, 0x10, RZ, 0x3c, !PT ?trans1;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans1;
LOP3.LUT R11, R6.reuse, 0x200, RZ, 0x3c, !PT ?trans1;
ULEA UR5, UR6, UR5, 0x18 &req={0} ?trans1;
LOP3.LUT R27, R6.reuse, 0x1, RZ, 0x3c, !PT ?trans1;
ISETP.GT.U32.AND P1, PT, R5, R6.reuse, PT ?trans1;
LOP3.LUT R5, R6, 0x2, RZ, 0x3c, !PT ?trans1;
ISETP.GT.U32.AND P6, PT, R11, R6, PT ?trans1;
MOV R9, UR4 ?trans1;
LOP3.LUT R12, R10, 0x400, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
LOP3.LUT R13, R10.reuse, 0x200, RZ, 0x3c, !PT ?trans2;
LOP3.LUT R14, R10.reuse, 0x100, RZ, 0x3c, !PT ?trans2;
LOP3.LUT R15, R10.reuse, 0x80, RZ, 0x3c, !PT ?trans2;
LOP3.LUT R16, R10.reuse, 0x40, RZ, 0x3c, !PT ?trans2;
LOP3.LUT R17, R10.reuse, 0x20, RZ, 0x3c, !PT ?trans2;
LOP3.LUT R18, R10, 0x10, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
LOP3.LUT R19, R10.reuse, 0x8, RZ, 0x3c, !PT ?trans2;
LOP3.LUT R20, R10, 0x4, RZ, 0x3c, !PT ?trans1;
ISETP.GT.U32.AND P4, PT, R5, R6.reuse, PT ?trans1;
ISETP.GT.U32.AND P5, PT, R27, R6, PT ?trans1;
P2R R4, PR, RZ, 0x40 &req={1} ?WAIT12_END_GROUP;
IADD3 R5, PT, PT, R8, R9, -R7 &req={0} ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R4, R5, 0x4, R2 &req={2} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR8][R4.64] &wr=0x2 ?trans1;
ISETP.GT.U32.AND P6, PT, R11, R6, PT ?trans1;
BSSY.RECONVERGENT B0, 0xec0 ?trans2;
STS [R10+UR5], R5 &req={2} &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans9;
@!P6 BRA 0xeb0 ?trans5;
LEA R27, R11, UR5, 0x2 ?trans1;
LDS R4, [R10+UR5] ?trans4;
LDS R5, [R27] &req={0} &wr=0x0 ?trans2;
ISETP.GT.AND P6, PT, R4, R5, PT &req={0} ?WAIT13_END_GROUP;
@P6 STS [R10+UR5], R5 &rd=0x1 ?trans4;
@P6 STS [R27], R4 &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P6, PT, R21, R6, PT ?WAIT5_END_GROUP;
BSSY.RECONVERGENT B0, 0xf60 ?trans8;
@!P6 BRA 0xf50 ?trans5;
LDS R5, [R10+UR5] &req={1,0} ?trans4;
LDS R4, [R12+UR5] &wr=0x0 ?trans2;
ISETP.GT.AND P6, PT, R5, R4, PT &req={0} ?WAIT13_END_GROUP;
@P6 STS [R10+UR5], R4 &rd=0x2 ?trans4;
@P6 STS [R12+UR5], R5 &rd=0x2 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P6, PT, R23, R6, PT ?WAIT5_END_GROUP;
BSSY.RECONVERGENT B0, 0x1000 ?trans8;
@!P6 BRA 0xff0 ?trans5;
LDS R4, [R10+UR5] &req={2,1} ?trans4;
LDS R5, [R13+UR5] &req={0} &wr=0x0 ?trans2;
ISETP.GT.AND P6, PT, R4, R5, PT &req={0} ?WAIT13_END_GROUP;
@P6 STS [R10+UR5], R5 &rd=0x3 ?trans4;
@P6 STS [R13+UR5], R4 &rd=0x3 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P6, PT, R25, R6, PT ?WAIT5_END_GROUP;
BSSY.RECONVERGENT B0, 0x10a0 ?trans8;
@!P6 BRA 0x1090 ?trans5;
LDS R5, [R10+UR5] &req={3,2,1,0} ?trans4;
LDS R4, [R14+UR5] &wr=0x0 ?trans2;
ISETP.GT.AND P6, PT, R5, R4, PT &req={0} ?WAIT13_END_GROUP;
@P6 STS [R10+UR5], R4 &rd=0x4 ?trans4;
@P6 STS [R14+UR5], R5 &rd=0x4 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x1130 ?trans4;
@!P0 BRA 0x1120 ?trans5;
LDS R4, [R10+UR5] &req={4,3,2,1} ?trans4;
LDS R5, [R15+UR5] &req={0} &wr=0x0 ?trans2;
ISETP.GT.AND P6, PT, R4, R5, PT &req={0} ?WAIT13_END_GROUP;
@P6 STS [R10+UR5], R5 &rd=0x0 ?trans4;
@P6 STS [R15+UR5], R4 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x11c0 ?trans4;
@!P1 BRA 0x11b0 ?trans5;
LDS R5, [R10+UR5] &req={4,3,2,1,0} ?trans4;
LDS R4, [R16+UR5] &wr=0x0 ?trans2;
ISETP.GT.AND P6, PT, R5, R4, PT &req={0} ?WAIT13_END_GROUP;
@P6 STS [R10+UR5], R4 &rd=0x0 ?trans4;
@P6 STS [R16+UR5], R5 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x1250 ?trans4;
@!P2 BRA 0x1240 ?trans5;
LDS R4, [R10+UR5] &req={4,3,2,1,0} ?trans4;
LDS R5, [R17+UR5] &wr=0x0 ?trans2;
ISETP.GT.AND P6, PT, R4, R5, PT &req={0} ?WAIT13_END_GROUP;
@P6 STS [R10+UR5], R5 &rd=0x0 ?trans4;
@P6 STS [R17+UR5], R4 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x12e0 ?trans4;
@!P3 BRA 0x12d0 ?trans5;
LDS R5, [R10+UR5] &req={4,3,2,1,0} ?trans4;
LDS R4, [R18+UR5] &wr=0x0 ?trans2;
ISETP.GT.AND P6, PT, R5, R4, PT &req={0} ?WAIT13_END_GROUP;
@P6 STS [R10+UR5], R4 &rd=0x0 ?trans4;
@P6 STS [R18+UR5], R5 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x1370 ?trans4;
@!P4 BRA 0x1360 ?trans5;
LDS R4, [R10+UR5] &req={4,3,2,1,0} ?trans4;
LDS R5, [R19+UR5] &wr=0x0 ?trans2;
ISETP.GT.AND P6, PT, R4, R5, PT &req={0} ?WAIT13_END_GROUP;
@P6 STS [R10+UR5], R5 &rd=0x0 ?trans4;
@P6 STS [R19+UR5], R4 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x1400 ?trans4;
@!P5 BRA 0x13f0 ?trans5;
LDS R5, [R10+UR5] &req={4,3,2,1,0} ?trans4;
LDS R4, [R20+UR5] &wr=0x0 ?trans2;
ISETP.GT.AND P6, PT, R5, R4, PT &req={0} ?WAIT13_END_GROUP;
@P6 STS [R10+UR5], R4 &rd=0x0 ?trans4;
@P6 STS [R20+UR5], R5 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
IADD3 R5, PT, PT, R6, R9, RZ &req={4,3,2,1,0} ?trans1;
IMAD R9, R0, 0x400, R9 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R5, 0x4, R2 ?trans1;
ISETP.GE.AND P6, PT, R9, UR7, PT ?trans1;
LDS R27, [R10+UR5] &wr=0x0 ?trans4;
STG.E desc[UR8][R4.64], R27 &req={0} &rd=0x0 ?trans8;
@!P6 BRA 0xdd0 ?trans5;
EXIT ?trans5;
BRA 0x1490;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: kernel_bitonic_merge_step(int*, int, bool, bool)
_Z25kernel_bitonic_merge_stepPiibb:
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b32 s8, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s0, s7, 1
s_lshl_b32 s7, s15, 10
s_cmp_eq_u32 s0, 0
s_mov_b32 s0, -1
s_cbranch_scc0 .LBB0_10
s_cmp_ge_i32 s7, s6
s_cbranch_scc1 .LBB0_9
v_sub_nc_u32_e32 v1, 0x5ff, v0
v_cmp_lt_u32_e32 vcc_lo, 0x1ff, v0
v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v3, 2, v0
v_lshlrev_b32_e32 v4, 2, v0
s_lshl_b32 s9, s8, 10
v_cndmask_b32_e32 v1, v0, v1, vcc_lo
s_mov_b32 s0, s7
s_delay_alu instid0(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[1:2]
.LBB0_3:
s_ashr_i32 s1, s0, 31
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[2:3], s[0:1], 2
s_movk_i32 s1, 0x200
s_add_u32 s2, s4, s2
s_addc_u32 s3, s5, s3
v_add_co_u32 v5, vcc_lo, s2, v1
v_add_co_ci_u32_e32 v6, vcc_lo, s3, v2, vcc_lo
global_load_b32 v5, v[5:6], off
s_waitcnt vmcnt(0)
ds_store_b32 v3, v5
s_waitcnt lgkmcnt(0)
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
.LBB0_4:
v_xor_b32_e32 v5, s1, v0
s_mov_b32 s10, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_u32_e64 v5, v0
s_cbranch_execz .LBB0_7
v_lshlrev_b32_e32 v5, 2, v5
ds_load_b32 v6, v3
ds_load_b32 v7, v5
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, v6, v7
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_7
ds_store_b32 v3, v7
ds_store_b32 v5, v6
.LBB0_7:
s_or_b32 exec_lo, exec_lo, s10
s_lshr_b32 s10, s1, 1
s_cmp_lt_u32 s1, 2
s_mov_b32 s1, s10
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB0_4
ds_load_b32 v5, v3
s_add_i32 s0, s0, s9
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_ge_i32 s0, s6
s_waitcnt lgkmcnt(0)
global_store_b32 v4, v5, s[2:3]
s_cbranch_scc0 .LBB0_3
.LBB0_9:
s_mov_b32 s0, 0
.LBB0_10:
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 vcc_lo, exec_lo, s0
s_cbranch_vccnz .LBB0_19
s_or_b32 s0, s7, 0x200
s_addk_i32 s6, 0xfc00
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_ge_i32 s0, s6
s_cbranch_scc1 .LBB0_19
v_sub_nc_u32_e32 v1, 0x5ff, v0
v_cmp_lt_u32_e32 vcc_lo, 0x1ff, v0
v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v3, 2, v0
v_lshlrev_b32_e32 v4, 2, v0
s_lshl_b32 s7, s8, 10
v_cndmask_b32_e32 v1, v0, v1, vcc_lo
s_delay_alu instid0(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[1:2]
.LBB0_13:
s_ashr_i32 s1, s0, 31
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[2:3], s[0:1], 2
s_movk_i32 s1, 0x200
s_add_u32 s2, s4, s2
s_addc_u32 s3, s5, s3
v_add_co_u32 v5, vcc_lo, s2, v1
v_add_co_ci_u32_e32 v6, vcc_lo, s3, v2, vcc_lo
global_load_b32 v5, v[5:6], off
s_waitcnt vmcnt(0)
ds_store_b32 v3, v5
s_waitcnt lgkmcnt(0)
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
.LBB0_14:
v_xor_b32_e32 v5, s1, v0
s_mov_b32 s8, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_u32_e64 v5, v0
s_cbranch_execz .LBB0_17
v_lshlrev_b32_e32 v5, 2, v5
ds_load_b32 v6, v3
ds_load_b32 v7, v5
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, v6, v7
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_17
ds_store_b32 v3, v7
ds_store_b32 v5, v6
.LBB0_17:
s_or_b32 exec_lo, exec_lo, s8
s_lshr_b32 s8, s1, 1
s_cmp_lt_u32 s1, 2
s_mov_b32 s1, s8
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB0_14
ds_load_b32 v5, v3
s_add_i32 s0, s0, s7
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_ge_i32 s0, s6
s_waitcnt lgkmcnt(0)
global_store_b32 v4, v5, s[2:3]
s_cbranch_scc0 .LBB0_13
.LBB0_19:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| kernel_bitonic_merge_step | 7,947 | 1,898 | stackv2-00000-of-00015 |
// Demangled: findMMinMax(vect*, vect*, vect*, vect*, int)
Function : _Z11findMMinMaxP4vectS0_S0_S0_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x250 ?trans1;
HFMA2 R10, -RZ, RZ, 7.62939453125e-06, 0 ?trans1;
S2R R0, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x3a0] &wr=0x3 ?trans1;
HFMA2 R11, -RZ, RZ, 7.62939453125e-06, 0 ?trans1;
MOV R12, 0x7f7fffff ?trans1;
MOV R13, 0x7f7fffff ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x4 ?trans1;
MOV R8, UR4 &req={2} ?trans1;
IMAD R2, R0, UR4, R3 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R2, UR5, PT &req={3} ?WAIT13_END_GROUP;
@P0 BRA 0x240 &req={4,0} ?trans5;
LDCU UR4, c[0x0][0x370] &wr=0x0 ?trans1;
MOV R13, 0x7f7fffff ?trans1;
MOV R11, 0x800000 ?trans1;
MOV R10, 0x800000 ?trans1;
MOV R12, 0x7f7fffff ?trans1;
IMAD R17, R8, UR4, RZ &req={0} ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans8;
LDC.64 R6, c[0x0][0x398] &wr=0x1 ?trans1;
IMAD.WIDE R4, R2, 0x8, R4 &req={0} ?WAIT5_END_GROUP;
LDG.E R9, desc[UR8][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE R6, R2, 0x8, R6 &req={1} ?WAIT3_END_GROUP;
LDG.E R14, desc[UR8][R4.64+0x4] &wr=0x3 ?trans4;
LDG.E R15, desc[UR8][R6.64] &wr=0x4 ?trans4;
LDG.E R16, desc[UR8][R6.64+0x4] &wr=0x5 ?trans1;
IADD3 R2, PT, PT, R17, R2, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R2, UR5, PT ?trans1;
FMNMX R12, R9, R12, PT &req={2} ?trans1;
FMNMX R13, R14, R13, PT &req={3} ?trans1;
FMNMX R10, R15, R10, !PT &req={4} ?trans1;
FMNMX R11, R16, R11, !PT &req={5} ?WAIT9_END_GROUP;
@!P0 BRA 0x150 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
S2UR UR6, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR4, 0x400 ?trans2;
UIADD3 UR5, UPT, UPT, UR4, 0x100, URZ ?trans1;
ULEA UR4, UR6, UR4, 0x18 &req={0} ?WAIT3_END_GROUP;
ULEA UR5, UR6, UR5, 0x18 ?WAIT3_END_GROUP;
LEA R2, R3, UR4, 0x3 ?WAIT3_END_GROUP;
LEA R4, R3, UR5, 0x3 ?trans2;
STS.64 [R2], R12 &rd=0x0 ?trans4;
STS.64 [R4], R10 &rd=0x0 ?trans2;
SHF.R.U32.HI R13, RZ, 0x1, R8 &req={0} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P1, PT, R8, 0x3, PT ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P0, PT, R3, R13, PT ?trans2;
BSSY.RECONVERGENT B0, 0x470 ?trans11;
@P0 BRA 0x460 ?trans5;
IMAD R6, R13.reuse, 0x8, R2 ?trans1;
LDS R5, [R2] ?trans1;
IMAD R9, R13, 0x8, R4 ?WAIT3_END_GROUP;
LDS R8, [R6] &wr=0x0 ?trans2;
FMNMX R5, R5, R8, PT &req={0} ?trans2;
LDS R8, [R2+0x4] ?trans4;
STS [R2], R5 ?trans4;
LDS R7, [R6+0x4] &wr=0x0 ?trans2;
FMNMX R7, R7, R8, PT &req={0} ?WAIT5_END_GROUP;
STS [R2+0x4], R7 ?trans4;
LDS R8, [R4] ?trans4;
LDS R11, [R9] &wr=0x0 ?trans4;
LDS R15, [R4+0x4] ?trans1;
FMNMX R11, R8, R11, !PT &req={0} ?WAIT5_END_GROUP;
STS [R4], R11 ?trans4;
LDS R8, [R9+0x4] &wr=0x0 ?trans2;
FMNMX R5, R8, R15, !PT &req={0} ?WAIT5_END_GROUP;
STS [R4+0x4], R5 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
MOV R8, R13 ?trans1;
@P1 BRA 0x2e0 ?trans6;
ISETP.NE.AND P0, PT, R3, RZ, PT ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans8;
LDC.64 R4, c[0x0][0x388] &req={0} &wr=0x0 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?trans1;
IMAD.WIDE.U32 R2, R0, 0x8, R2 &req={2} ?WAIT8_END_GROUP;
LDS.64 R6, [UR4] &wr=0x1 ?trans4;
LDS.64 R8, [UR4+0x100] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R4, R0, 0x8, R4 &req={0} ?WAIT3_END_GROUP;
STG.E desc[UR8][R2.64], R6 &req={1} ?trans4;
STG.E desc[UR8][R2.64+0x4], R7 ?trans4;
STG.E desc[UR8][R4.64], R8 &req={2} ?trans4;
STG.E desc[UR8][R4.64+0x4], R9 ?trans1;
EXIT ?trans5;
BRA 0x590;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: findMMinMax(vect*, vect*, vect*, vect*, int)
_Z11findMMinMaxP4vectS0_S0_S0_i:
s_clause 0x2
s_load_b32 s3, s[0:1], 0x34
s_load_b32 s12, s[0:1], 0x20
s_load_b256 s[4:11], s[0:1], 0x0
s_add_u32 s0, s0, 40
s_mov_b32 s2, s15
s_addc_u32 s1, s1, 0
v_mov_b32_e32 v2, 0x800000
v_dual_mov_b32 v4, 0x7f7fffff :: v_dual_mov_b32 v3, 0x7f7fffff
s_mov_b32 s13, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[5:6], null, s2, s3, v[0:1]
v_mov_b32_e32 v1, 0x800000
v_cmpx_gt_i32_e64 s12, v5
s_cbranch_execz .LBB1_4
s_load_b32 s1, s[0:1], 0x0
v_dual_mov_b32 v2, 0x800000 :: v_dual_mov_b32 v1, 0x800000
v_dual_mov_b32 v4, 0x7f7fffff :: v_dual_mov_b32 v3, 0x7f7fffff
s_mov_b32 s0, 0
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s1, s3
.LBB1_2:
v_ashrrev_i32_e32 v6, 31, v5
v_dual_max_f32 v3, v3, v3 :: v_dual_max_f32 v4, v4, v4
v_dual_max_f32 v1, v1, v1 :: v_dual_max_f32 v2, v2, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 3, v[5:6]
v_add_co_u32 v8, vcc_lo, s8, v6
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v9, vcc_lo, s9, v7, vcc_lo
v_add_co_u32 v6, vcc_lo, s10, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s11, v7, vcc_lo
global_load_b64 v[8:9], v[8:9], off
global_load_b64 v[6:7], v[6:7], off
s_waitcnt vmcnt(1)
v_dual_max_f32 v8, v8, v8 :: v_dual_add_nc_u32 v5, s1, v5
s_waitcnt vmcnt(0)
v_dual_max_f32 v9, v9, v9 :: v_dual_max_f32 v6, v6, v6
v_max_f32_e32 v7, v7, v7
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cmp_le_i32_e32 vcc_lo, s12, v5
v_dual_min_f32 v4, v4, v9 :: v_dual_min_f32 v3, v3, v8
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_dual_max_f32 v2, v2, v7 :: v_dual_max_f32 v1, v1, v6
s_or_b32 s0, vcc_lo, s0
s_and_not1_b32 exec_lo, exec_lo, s0
s_cbranch_execnz .LBB1_2
s_or_b32 exec_lo, exec_lo, s0
.LBB1_4:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
s_or_b32 exec_lo, exec_lo, s13
v_lshlrev_b32_e32 v5, 3, v0
v_add_nc_u32_e32 v6, 0x100, v5
ds_store_2addr_b64 v5, v[1:2], v[3:4] offset1:32
.LBB1_5:
s_lshr_b32 s0, s3, 1
s_mov_b32 s1, exec_lo
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmpx_gt_u32_e64 s0, v0
s_cbranch_execz .LBB1_7
s_lshl_b32 s8, s0, 3
s_delay_alu instid0(SALU_CYCLE_1)
v_add_nc_u32_e32 v3, s8, v6
v_add_nc_u32_e32 v7, s8, v5
ds_load_b64 v[1:2], v6
ds_load_b64 v[3:4], v3
ds_load_b64 v[7:8], v7
ds_load_b64 v[9:10], v5
s_waitcnt lgkmcnt(3)
v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v1, v1, v1
s_waitcnt lgkmcnt(1)
v_dual_max_f32 v8, v8, v8 :: v_dual_max_f32 v3, v3, v3
s_waitcnt lgkmcnt(0)
v_max_f32_e32 v10, v10, v10
v_dual_max_f32 v4, v4, v4 :: v_dual_max_f32 v7, v7, v7
v_max_f32_e32 v9, v9, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_dual_min_f32 v1, v1, v3 :: v_dual_min_f32 v2, v2, v4
v_dual_max_f32 v4, v10, v8 :: v_dual_max_f32 v3, v9, v7
ds_store_b64 v6, v[1:2]
ds_store_b64 v5, v[3:4]
.LBB1_7:
s_or_b32 exec_lo, exec_lo, s1
s_cmp_gt_u32 s3, 3
s_mov_b32 s3, s0
s_cbranch_scc1 .LBB1_5
s_mov_b32 s3, 0
s_mov_b32 s0, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB1_10
v_mov_b32_e32 v4, 0
s_lshl_b64 s[0:1], s[2:3], 3
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s2, s6, s0
s_addc_u32 s3, s7, s1
ds_load_2addr_b64 v[0:3], v4 offset1:32
s_add_u32 s0, s4, s0
s_addc_u32 s1, s5, s1
s_waitcnt lgkmcnt(0)
s_clause 0x1
global_store_b64 v4, v[2:3], s[0:1]
global_store_b64 v4, v[0:1], s[2:3]
.LBB1_10:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| findMMinMax | 2,090 | 1,989 | stackv2-00000-of-00015 |
// Demangled: findMinMax(vect*, vect*, vect*, int)
Function : _Z10findMinMaxP4vectS0_S0_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R15, SR_TID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x220 ?trans1;
HFMA2 R8, -RZ, RZ, 7.62939453125e-06, 0 ?trans1;
S2R R0, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x398] &wr=0x3 ?trans1;
HFMA2 R9, -RZ, RZ, 7.62939453125e-06, 0 ?trans1;
MOV R10, 0x7f7fffff ?trans1;
MOV R11, 0x7f7fffff ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x4 ?trans1;
MOV R6, UR4 &req={2} ?trans1;
IMAD R2, R0, UR4, R15 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R2, UR5, PT &req={3} ?WAIT13_END_GROUP;
@P0 BRA 0x210 &req={4,0} ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
MOV R7, R2 ?trans1;
MOV R11, 0x7f7fffff ?trans1;
MOV R9, 0x800000 ?trans1;
MOV R8, 0x800000 ?trans1;
MOV R10, 0x7f7fffff ?trans1;
IMAD R14, R6, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R2, R7, 0x8, R4 &req={0} ?WAIT5_END_GROUP;
LDG.E R13, desc[UR8][R2.64] &wr=0x2 ?trans4;
LDG.E R12, desc[UR8][R2.64+0x4] &wr=0x3 ?trans1;
IADD3 R7, PT, PT, R14, R7, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, UR5, PT ?trans1;
FMNMX R10, R13.reuse, R10, PT &req={2} ?trans1;
FMNMX R8, R13, R8, !PT ?trans1;
FMNMX R11, R12.reuse, R11, PT &req={3} ?trans1;
FMNMX R9, R12, R9, !PT ?WAIT9_END_GROUP;
@!P0 BRA 0x170 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
S2UR UR6, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR4, 0x400 ?trans2;
UIADD3 UR5, UPT, UPT, UR4, 0x100, URZ ?trans1;
ULEA UR4, UR6, UR4, 0x18 &req={0} ?WAIT3_END_GROUP;
ULEA UR5, UR6, UR5, 0x18 ?WAIT3_END_GROUP;
LEA R2, R15, UR4, 0x3 ?WAIT3_END_GROUP;
LEA R3, R15, UR5, 0x3 ?trans2;
STS.64 [R2], R10 &rd=0x0 ?trans4;
STS.64 [R3], R8 &rd=0x0 ?trans2;
SHF.R.U32.HI R10, RZ, 0x1, R6 &req={0} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P1, PT, R6, 0x3, PT ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P0, PT, R15, R10, PT ?trans2;
BSSY.RECONVERGENT B0, 0x440 ?trans11;
@P0 BRA 0x430 ?trans5;
IMAD R5, R10.reuse, 0x8, R2 ?trans1;
LDS R4, [R2] ?trans1;
IMAD R6, R10, 0x8, R3 ?WAIT3_END_GROUP;
LDS R7, [R5] &wr=0x0 ?trans4;
LDS R9, [R2+0x4] ?trans1;
FMNMX R7, R4, R7, PT &req={0} ?WAIT5_END_GROUP;
STS [R2], R7 ?trans4;
LDS R4, [R5+0x4] &wr=0x0 ?trans2;
FMNMX R9, R4, R9, PT &req={0} ?WAIT5_END_GROUP;
STS [R2+0x4], R9 ?trans4;
LDS R4, [R3] ?trans4;
LDS R11, [R6] &wr=0x0 ?trans2;
FMNMX R4, R4, R11, !PT &req={0} ?WAIT2_END_GROUP;
LDS R11, [R3+0x4] ?trans4;
STS [R3], R4 ?trans4;
LDS R8, [R6+0x4] &wr=0x0 ?trans2;
FMNMX R8, R8, R11, !PT &req={0} ?WAIT5_END_GROUP;
STS [R3+0x4], R8 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
MOV R6, R10 ?trans1;
@P1 BRA 0x2b0 ?trans6;
ISETP.NE.AND P0, PT, R15, RZ, PT ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x388] &req={0} &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x390] &wr=0x2 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?trans1;
IMAD.WIDE.U32 R2, R0, 0x8, R2 &req={0} ?WAIT8_END_GROUP;
LDS.64 R6, [UR4] &wr=0x0 ?trans4;
LDS.64 R8, [UR4+0x100] &wr=0x1 ?trans1;
IMAD.WIDE.U32 R4, R0, 0x8, R4 &req={2} ?WAIT3_END_GROUP;
STG.E desc[UR8][R2.64], R6 &req={0} ?trans4;
STG.E desc[UR8][R2.64+0x4], R7 ?trans4;
STG.E desc[UR8][R4.64], R8 &req={1} ?trans4;
STG.E desc[UR8][R4.64+0x4], R9 ?trans1;
EXIT ?trans5;
BRA 0x560;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: findMinMax(vect*, vect*, vect*, int)
_Z10findMinMaxP4vectS0_S0_i:
s_clause 0x3
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s10, s[0:1], 0x18
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[8:9], s[0:1], 0x10
s_add_u32 s0, s0, 32
s_mov_b32 s2, s15
s_addc_u32 s1, s1, 0
v_mov_b32_e32 v2, 0x800000
v_dual_mov_b32 v4, 0x7f7fffff :: v_dual_mov_b32 v3, 0x7f7fffff
s_mov_b32 s11, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[5:6], null, s2, s3, v[0:1]
v_mov_b32_e32 v1, 0x800000
v_cmpx_gt_i32_e64 s10, v5
s_cbranch_execz .LBB0_4
s_load_b32 s1, s[0:1], 0x0
v_dual_mov_b32 v2, 0x800000 :: v_dual_mov_b32 v1, 0x800000
v_dual_mov_b32 v4, 0x7f7fffff :: v_dual_mov_b32 v3, 0x7f7fffff
s_mov_b32 s0, 0
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s1, s3
.LBB0_2:
v_ashrrev_i32_e32 v6, 31, v5
v_dual_max_f32 v3, v3, v3 :: v_dual_max_f32 v4, v4, v4
v_dual_max_f32 v1, v1, v1 :: v_dual_max_f32 v2, v2, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 3, v[5:6]
v_add_co_u32 v6, vcc_lo, s4, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
global_load_b64 v[6:7], v[6:7], off
s_waitcnt vmcnt(0)
v_dual_max_f32 v6, v6, v6 :: v_dual_add_nc_u32 v5, s1, v5
v_max_f32_e32 v7, v7, v7
v_cmp_le_i32_e32 vcc_lo, s10, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_dual_min_f32 v3, v3, v6 :: v_dual_min_f32 v4, v4, v7
v_dual_max_f32 v1, v1, v6 :: v_dual_max_f32 v2, v2, v7
s_or_b32 s0, vcc_lo, s0
s_and_not1_b32 exec_lo, exec_lo, s0
s_cbranch_execnz .LBB0_2
s_or_b32 exec_lo, exec_lo, s0
.LBB0_4:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
s_or_b32 exec_lo, exec_lo, s11
v_lshlrev_b32_e32 v5, 3, v0
v_add_nc_u32_e32 v6, 0x100, v5
ds_store_2addr_b64 v5, v[1:2], v[3:4] offset1:32
.LBB0_5:
s_lshr_b32 s0, s3, 1
s_mov_b32 s1, exec_lo
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmpx_gt_u32_e64 s0, v0
s_cbranch_execz .LBB0_7
s_lshl_b32 s4, s0, 3
s_delay_alu instid0(SALU_CYCLE_1)
v_add_nc_u32_e32 v3, s4, v6
v_add_nc_u32_e32 v7, s4, v5
ds_load_b64 v[1:2], v6
ds_load_b64 v[3:4], v3
ds_load_b64 v[7:8], v7
ds_load_b64 v[9:10], v5
s_waitcnt lgkmcnt(3)
v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v1, v1, v1
s_waitcnt lgkmcnt(1)
v_dual_max_f32 v8, v8, v8 :: v_dual_max_f32 v3, v3, v3
s_waitcnt lgkmcnt(0)
v_max_f32_e32 v10, v10, v10
v_dual_max_f32 v4, v4, v4 :: v_dual_max_f32 v7, v7, v7
v_max_f32_e32 v9, v9, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_dual_min_f32 v1, v1, v3 :: v_dual_min_f32 v2, v2, v4
v_dual_max_f32 v4, v10, v8 :: v_dual_max_f32 v3, v9, v7
ds_store_b64 v6, v[1:2]
ds_store_b64 v5, v[3:4]
.LBB0_7:
s_or_b32 exec_lo, exec_lo, s1
s_cmp_gt_u32 s3, 3
s_mov_b32 s3, s0
s_cbranch_scc1 .LBB0_5
s_mov_b32 s3, 0
s_mov_b32 s0, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB0_10
v_mov_b32_e32 v4, 0
s_lshl_b64 s[0:1], s[2:3], 3
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s2, s8, s0
s_addc_u32 s3, s9, s1
ds_load_2addr_b64 v[0:3], v4 offset1:32
s_add_u32 s0, s6, s0
s_addc_u32 s1, s7, s1
s_waitcnt lgkmcnt(0)
s_clause 0x1
global_store_b64 v4, v[2:3], s[0:1]
global_store_b64 v4, v[0:1], s[2:3]
.LBB0_10:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| findMinMax | 1,962 | 1,890 | stackv2-00000-of-00015 |
// Demangled: kmeans_centroid_sum(float*, int*, float*, int*, int, int, int)
Function : _Z19kmeans_centroid_sumPfPiS_S0_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x3a0] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R6, R0, UR4, R2 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R6, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R3, c[0x0][0x3a8] &wr=0x0 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x1 ?trans1;
ISETP.GE.AND P0, PT, R3, 0x1, PT &req={0} ?trans1;
IMAD R4, R0, R3, RZ ?WAIT12_END_GROUP;
@!P0 BRA 0x8b0 &req={1} ?trans5;
ISETP.GE.U32.AND P0, PT, R3.reuse, 0x10, PT ?trans1;
LOP3.LUT R25, R3, 0xf, RZ, 0xc0, !PT ?trans1;
UMOV UR4, URZ ?trans1;
IMAD R5, R6, R3.reuse, RZ ?trans2;
IMAD R7, R2, R3, RZ ?trans1;
ISETP.NE.AND P1, PT, R25, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x460 ?trans6;
S2UR UR5, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR4, 0x400 ?trans1;
LOP3.LUT R10, R3, 0x7ffffff0, RZ, 0xc0, !PT ?trans1;
MOV R15, R5 ?WAIT3_END_GROUP;
IADD3 R12, PT, PT, -R10, RZ, RZ ?trans2;
LDC.64 R8, c[0x0][0x380] &wr=0x1 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={0} ?WAIT6_END_GROUP;
LEA R11, R7, UR4, 0x2 ?trans1;
UMOV UR4, URZ ?trans1;
IADD.64 R8, R8, 0x20 &req={1} ?WAIT3_END_GROUP;
IADD3 R13, PT, PT, R11, 0x20, RZ ?WAIT7_END_GROUP;
IMAD.WIDE R10, R15, 0x4, R8 ?WAIT5_END_GROUP;
LDG.E R14, desc[UR8][R10.64+-0x20] &wr=0x2 ?trans4;
LDG.E R16, desc[UR8][R10.64+-0x1c] &wr=0x3 ?trans4;
LDG.E R18, desc[UR8][R10.64+-0x18] &wr=0x4 ?trans4;
LDG.E R20, desc[UR8][R10.64+-0x14] &wr=0x5 ?trans4;
LDG.E R22, desc[UR8][R10.64+-0x10] &wr=0x5 ?trans4;
LDG.E R24, desc[UR8][R10.64+-0xc] &wr=0x5 ?trans4;
LDG.E R26, desc[UR8][R10.64+-0x8] &wr=0x5 ?trans4;
LDG.E R28, desc[UR8][R10.64+-0x4] &wr=0x5 ?trans4;
LDG.E R30, desc[UR8][R10.64] &wr=0x5 ?trans4;
LDG.E R32, desc[UR8][R10.64+0x4] &wr=0x5 ?trans4;
LDG.E R34, desc[UR8][R10.64+0x8] &wr=0x5 ?trans4;
LDG.E R36, desc[UR8][R10.64+0xc] &wr=0x5 ?trans4;
LDG.E R17, desc[UR8][R10.64+0x10] &wr=0x5 ?trans4;
LDG.E R19, desc[UR8][R10.64+0x14] &wr=0x5 ?trans4;
LDG.E R21, desc[UR8][R10.64+0x18] &wr=0x5 ?trans4;
LDG.E R23, desc[UR8][R10.64+0x1c] &wr=0x5 ?trans1;
IADD3 R12, PT, PT, R12, 0x10, RZ ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x10, URZ ?trans1;
IADD3 R15, PT, PT, R15, 0x10, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R12, RZ, PT ?trans1;
STS [R13+-0x20], R14 &req={2} ?trans4;
STS [R13+-0x1c], R16 &req={3} ?trans4;
STS [R13+-0x18], R18 &req={4} ?trans4;
STS [R13+-0x14], R20 &req={5} ?trans4;
STS [R13+-0x10], R22 ?trans4;
STS [R13+-0xc], R24 ?trans4;
STS [R13+-0x8], R26 ?trans4;
STS [R13+-0x4], R28 ?trans4;
STS [R13], R30 ?trans4;
STS [R13+0x4], R32 ?trans4;
STS [R13+0x8], R34 ?trans4;
STS [R13+0xc], R36 ?trans4;
STS [R13+0x10], R17 ?trans4;
STS [R13+0x14], R19 ?trans4;
STS [R13+0x18], R21 ?trans4;
STS [R13+0x1c], R23 &rd=0x0 ?trans2;
IADD3 R13, PT, PT, R13, 0x40, RZ &req={0} ?trans1;
@P0 BRA 0x1f0 ?trans6;
@!P1 BRA 0x8b0 ?trans5;
ISETP.GE.U32.AND P0, PT, R25, 0x8, PT ?trans1;
LOP3.LUT R13, R3, 0x7, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R13, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x640 ?trans6;
LDC.64 R8, c[0x0][0x380] &wr=0x0 ?trans1;
IADD3 R11, PT, PT, R5, UR4, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R8, R11, 0x4, R8 &req={0} ?WAIT5_END_GROUP;
LDG.E R10, desc[UR8][R8.64] &wr=0x2 ?trans4;
LDG.E R12, desc[UR8][R8.64+0x4] &wr=0x3 ?trans4;
LDG.E R14, desc[UR8][R8.64+0x8] &wr=0x4 ?trans4;
LDG.E R16, desc[UR8][R8.64+0xc] &wr=0x5 ?trans4;
LDG.E R18, desc[UR8][R8.64+0x10] &wr=0x5 ?trans4;
LDG.E R20, desc[UR8][R8.64+0x14] &wr=0x5 ?trans4;
LDG.E R22, desc[UR8][R8.64+0x18] &wr=0x5 ?trans4;
LDG.E R24, desc[UR8][R8.64+0x1c] &wr=0x5 ?trans1;
S2UR UR6, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR5, 0x400 ?trans1;
IADD3 R11, PT, PT, R7, UR4, RZ ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
ULEA UR5, UR6, UR5, 0x18 &req={0} ?WAIT6_END_GROUP;
LEA R11, R11, UR5, 0x2 ?WAIT5_END_GROUP;
STS [R11], R10 &req={2} &rd=0x0 ?trans4;
STS [R11+0x4], R12 &req={3} &rd=0x0 ?trans4;
STS [R11+0x8], R14 &req={4} &rd=0x0 ?trans4;
STS [R11+0xc], R16 &req={5} &rd=0x0 ?trans4;
STS [R11+0x10], R18 &rd=0x0 ?trans4;
STS [R11+0x14], R20 &rd=0x0 ?trans4;
STS [R11+0x18], R22 &rd=0x0 ?trans4;
STS [R11+0x1c], R24 &rd=0x0 ?trans2;
@!P1 BRA 0x8b0 ?trans5;
ISETP.GE.U32.AND P0, PT, R13, 0x4, PT ?trans1;
LOP3.LUT R12, R3, 0x3, RZ, 0xc0, !PT &req={0} ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R12, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x7a0 ?trans6;
LDC.64 R8, c[0x0][0x380] &wr=0x0 ?trans1;
IADD3 R11, PT, PT, R5, UR4, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R8, R11, 0x4, R8 &req={0} ?WAIT5_END_GROUP;
LDG.E R10, desc[UR8][R8.64] &wr=0x2 ?trans4;
LDG.E R14, desc[UR8][R8.64+0x4] &wr=0x3 ?trans4;
LDG.E R16, desc[UR8][R8.64+0x8] &wr=0x4 ?trans4;
LDG.E R18, desc[UR8][R8.64+0xc] &wr=0x5 ?trans1;
S2UR UR6, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR5, 0x400 ?trans1;
IADD3 R11, PT, PT, R7, UR4, RZ ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
ULEA UR5, UR6, UR5, 0x18 &req={0} ?WAIT6_END_GROUP;
LEA R11, R11, UR5, 0x2 ?WAIT5_END_GROUP;
STS [R11], R10 &req={2} &rd=0x0 ?trans4;
STS [R11+0x4], R14 &req={3} &rd=0x0 ?trans4;
STS [R11+0x8], R16 &req={4} &rd=0x0 ?trans4;
STS [R11+0xc], R18 &req={5} &rd=0x0 ?trans2;
@!P1 BRA 0x8b0 ?trans5;
S2UR UR6, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR5, 0x400 ?trans1;
IADD3 R7, PT, PT, R7, UR4, RZ ?trans2;
IADD3 R5, PT, PT, R5, UR4, RZ ?trans2;
IADD3 R12, PT, PT, -R12, RZ, RZ ?trans2;
LDC.64 R10, c[0x0][0x380] &req={0} &wr=0x0 ?trans1;
ULEA UR5, UR6, UR5, 0x18 &req={1} ?WAIT6_END_GROUP;
LEA R7, R7, UR5, 0x2 ?WAIT7_END_GROUP;
IMAD.WIDE R8, R5, 0x4, R10 &req={0} ?WAIT6_END_GROUP;
LDG.E R8, desc[UR8][R8.64] &wr=0x2 ?trans1;
IADD3 R12, PT, PT, R12, 0x1, RZ ?trans2;
IADD3 R5, PT, PT, R5, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R12, RZ, PT ?trans1;
STS [R7], R8 &req={2} &rd=0x0 ?trans2;
IADD3 R7, PT, PT, R7, 0x4, RZ &req={0} ?WAIT10_END_GROUP;
@P0 BRA 0x830 ?trans5;
LDC.64 R8, c[0x0][0x388] &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x3a4] &wr=0x2 ?trans1;
IMAD.WIDE R8, R6, 0x4, R8 &req={1} ?WAIT6_END_GROUP;
LDG.E R8, desc[UR8][R8.64] &wr=0x3 ?trans1;
MOV R5, 0x400 ?trans1;
IMAD R11, R3, UR4, RZ &req={2,0} ?trans1;
S2R R6, SR_CgaCtaId &wr=0x0 ?trans4;
ISETP.GE.U32.AND P0, PT, R2, R11, PT ?trans1;
LEA R5, R6, R5, 0x18 &req={0} ?WAIT5_END_GROUP;
IMAD R7, R4, 0x4, R5 ?WAIT4_END_GROUP;
IMAD R11, R2, 0x4, R7 ?WAIT5_END_GROUP;
STS [R11], R8 &req={3} &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 EXIT ?trans5;
I2F.U32.RP R6, R3 &wr=0x1 ?trans1;
ISETP.NE.U32.AND P2, PT, R3, RZ, PT ?trans1;
LOP3.LUT R17, R0, 0x7, RZ, 0xc0, !PT ?trans1;
MUFU.RCP R6, R6 &req={1} &wr=0x1 ?trans2;
IADD3 R8, PT, PT, R6, 0xffffffe, RZ &req={1,0} ?trans1;
MOV R6, RZ ?WAIT3_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R9, R8 &rd=0x0 &wr=0x1 ?trans2;
HFMA2 R8, -RZ, RZ, 0, 0 &req={0} ?trans1;
IADD3 R4, PT, PT, RZ, -R9, RZ &req={1} ?WAIT5_END_GROUP;
IMAD R11, R4, R3, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R9, R9, R11, R8 ?WAIT6_END_GROUP;
IMAD.HI.U32 R4, R9, R2, RZ ?WAIT5_END_GROUP;
IADD3 R10, PT, PT, -R4, RZ, RZ ?WAIT5_END_GROUP;
IMAD R10, R3, R10, R2 ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R10, R3, PT ?WAIT13_END_GROUP;
@P0 IADD3 R10, PT, PT, R10, -R3.reuse, RZ ?trans2;
@P0 IADD3 R4, PT, PT, R4, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R17, RZ, PT ?trans2;
ISETP.GE.U32.AND P1, PT, R10, R3, PT ?WAIT13_END_GROUP;
@P1 IADD3 R4, PT, PT, R4, 0x1, RZ ?trans1;
ISETP.GE.U32.AND P1, PT, R0, 0x8, PT ?trans1;
@!P2 LOP3.LUT R4, RZ, R3, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R9, PT, PT, -R4, RZ, RZ ?WAIT5_END_GROUP;
IMAD R9, R3, R9, R2 ?trans1;
CS2R R2, SRZ ?trans2;
@!P1 BRA 0x1040 ?trans5;
LOP3.LUT R10, R0, 0xfffffff8, RZ, 0xc0, !PT ?trans2;
IADD3 R8, PT, PT, R7, 0x10, RZ ?trans1;
MOV R3, RZ ?trans1;
MOV R6, RZ ?trans1;
IADD3 R10, PT, PT, -R10, RZ, RZ ?WAIT7_END_GROUP;
LDS R11, [R8+-0x10] &wr=0x0 ?trans1;
IADD3 R10, PT, PT, R10, 0x8, RZ ?WAIT3_END_GROUP;
LDS R13, [R8+-0xc] &wr=0x1 ?trans4;
LDS R15, [R8] &wr=0x2 ?trans4;
LDS R19, [R8+0x4] &wr=0x3 ?trans4;
LDS R21, [R8+0x8] ?trans4;
LDS R23, [R8+0xc] ?trans1;
ISETP.NE.AND P1, PT, R11, R4, PT &req={0} ?WAIT3_END_GROUP;
LDS R11, [R8+-0x8] &wr=0x0 ?trans1;
ISETP.NE.AND P6, PT, R13, R4, PT &req={1} ?WAIT3_END_GROUP;
LDS R13, [R8+-0x4] &rd=0x1 &wr=0x4 ?trans1;
ISETP.NE.AND P3, PT, R15, R4.reuse, PT &req={2} ?trans1;
ISETP.NE.AND P2, PT, R19, R4, PT &req={3} ?WAIT4_END_GROUP;
@!P1 LDC R12, c[0x0][0x3a8] &wr=0x2 ?trans1;
@!P1 IADD3 R2, PT, PT, R2, 0x1, RZ ?trans2;
IADD3 R8, PT, PT, R8, 0x20, RZ &req={1} ?trans2;
@!P6 IADD3 R14, PT, PT, R6, 0x1, RZ ?trans2;
@!P6 IADD3 R2, PT, PT, R2, 0x1, RZ ?trans1;
@!P6 LDC R16, c[0x0][0x3a8] &wr=0x1 ?trans1;
@!P2 IADD3 R18, PT, PT, R6, 0x5, RZ ?WAIT7_END_GROUP;
@!P3 LDC R15, c[0x0][0x3a8] &wr=0x3 ?trans1;
@!P1 IMAD R12, R6, R12, R9 &req={2} ?WAIT7_END_GROUP;
@!P2 LDC R19, c[0x0][0x3a8] &wr=0x2 ?trans1;
@!P1 IMAD R12, R12, 0x4, R5 ?trans1;
ISETP.NE.AND P5, PT, R11, R4, PT &req={0} ?trans1;
@!P6 IMAD R14, R14, R16, R9 &req={1} ?trans1;
ISETP.NE.AND P4, PT, R13, R4, PT &req={4} ?WAIT3_END_GROUP;
@!P1 LDS R12, [R12] &wr=0x0 ?trans1;
@!P3 IADD3 R16, PT, PT, R6, 0x4, RZ ?trans1;
@!P6 IMAD R14, R14, 0x4, R5 ?WAIT4_END_GROUP;
@!P3 IMAD R16, R16, R15, R9 &req={3} ?trans2;
@!P6 LDS R14, [R14] &wr=0x1 ?trans1;
@!P5 LDC R11, c[0x0][0x3a8] &wr=0x3 ?trans1;
@!P3 IMAD R16, R16, 0x4, R5 ?trans1;
@!P5 IADD3 R2, PT, PT, R2, 0x1, RZ ?trans1;
@!P2 IMAD R18, R18, R19, R9 &req={2} ?WAIT4_END_GROUP;
@!P3 LDS R16, [R16] ?trans1;
@!P4 LDC R13, c[0x0][0x3a8] &wr=0x2 ?trans1;
@!P4 IADD3 R2, PT, PT, R2, 0x1, RZ ?trans1;
@!P2 IMAD R18, R18, 0x4, R5 ?WAIT3_END_GROUP;
@!P3 IADD3 R2, PT, PT, R2, 0x1, RZ ?WAIT3_END_GROUP;
@!P2 LDS R18, [R18] ?trans1;
@!P2 IADD3 R2, PT, PT, R2, 0x1, RZ ?trans1;
@!P1 FADD R3, R3, R12 &req={0} ?trans1;
ISETP.NE.AND P1, PT, R21, R4, PT ?trans1;
@!P5 IADD3 R12, PT, PT, R6, 0x2, RZ ?WAIT5_END_GROUP;
@!P5 IMAD R12, R12, R11, R9 &req={3} ?trans2;
@!P6 FADD R3, R3, R14 &req={1} ?trans1;
ISETP.NE.AND P6, PT, R23, R4, PT ?trans1;
@!P4 IADD3 R14, PT, PT, R6, 0x3, RZ ?trans1;
@!P5 IMAD R12, R12, 0x4, R5 ?trans2;
@!P1 LDC R21, c[0x0][0x3a8] &wr=0x0 ?trans2;
@!P4 IMAD R14, R14, R13, R9 &req={2} ?trans1;
@!P1 IADD3 R20, PT, PT, R6, 0x6, RZ ?trans1;
@!P5 LDS R12, [R12] &wr=0x1 ?trans1;
@!P1 IADD3 R2, PT, PT, R2, 0x1, RZ ?trans1;
@!P4 IMAD R14, R14, 0x4, R5 ?WAIT3_END_GROUP;
@!P6 LDC R23, c[0x0][0x3a8] &wr=0x2 ?trans1;
@!P6 IADD3 R22, PT, PT, R6.reuse, 0x7, RZ ?trans2;
IADD3 R6, PT, PT, R6, 0x8, RZ ?trans1;
@!P4 LDS R14, [R14] &wr=0x3 ?trans1;
@!P6 IADD3 R2, PT, PT, R2, 0x1, RZ ?trans1;
@!P1 IMAD R20, R20, R21, R9 &req={0} ?WAIT4_END_GROUP;
@!P1 IMAD R20, R20, 0x4, R5 ?trans2;
@!P6 IMAD R22, R22, R23, R9 &req={2} ?WAIT4_END_GROUP;
@!P1 LDS R20, [R20] &wr=0x0 ?trans1;
@!P6 IMAD R22, R22, 0x4, R5 ?WAIT6_END_GROUP;
@!P6 LDS R22, [R22] &wr=0x2 ?trans1;
@!P5 FADD R3, R3, R12 &req={1} ?WAIT4_END_GROUP;
@!P4 FADD R3, R3, R14 &req={3} ?WAIT4_END_GROUP;
@!P3 FADD R3, R3, R16 ?WAIT4_END_GROUP;
@!P2 FADD R3, R3, R18 ?trans1;
ISETP.NE.AND P2, PT, R10, RZ, PT ?WAIT3_END_GROUP;
@!P1 FADD R3, R3, R20 &req={0} ?WAIT4_END_GROUP;
@!P6 FADD R3, R3, R22 &req={2} ?WAIT6_END_GROUP;
@P2 BRA 0xb80 ?trans5;
@!P0 BRA 0x1500 ?trans5;
ISETP.GE.U32.AND P0, PT, R17, 0x4, PT ?trans1;
LOP3.LUT R16, R0, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P4, PT, R16, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x12e0 ?trans6;
IMAD R12, R6, 0x4, R7 ?WAIT5_END_GROUP;
LDS R11, [R12] &wr=0x0 ?trans4;
LDS R13, [R12+0x4] &wr=0x1 ?trans4;
LDS R15, [R12+0x8] &wr=0x2 ?trans4;
LDS R17, [R12+0xc] &wr=0x3 ?trans1;
ISETP.NE.AND P0, PT, R11, R4.reuse, PT &req={0} ?trans1;
ISETP.NE.AND P1, PT, R13, R4.reuse, PT &req={1} ?trans1;
ISETP.NE.AND P2, PT, R15, R4.reuse, PT &req={2} ?trans1;
ISETP.NE.AND P3, PT, R17, R4, PT &req={3} ?WAIT10_END_GROUP;
@!P0 LDC R8, c[0x0][0x3a8] &wr=0x0 ?trans1;
@!P0 IADD3 R2, PT, PT, R2, 0x1, RZ ?trans2;
@!P1 IADD3 R10, PT, PT, R6, 0x1, RZ ?trans2;
@!P1 IADD3 R2, PT, PT, R2, 0x1, RZ ?WAIT3_END_GROUP;
@!P1 LDC R11, c[0x0][0x3a8] &wr=0x1 ?trans1;
@!P2 IADD3 R12, PT, PT, R6, 0x2, RZ ?trans2;
@!P2 IADD3 R2, PT, PT, R2, 0x1, RZ ?trans2;
@!P3 IADD3 R14, PT, PT, R6, 0x3, RZ ?WAIT3_END_GROUP;
@!P2 LDC R13, c[0x0][0x3a8] &wr=0x2 ?trans1;
@!P3 IADD3 R2, PT, PT, R2, 0x1, RZ ?WAIT7_END_GROUP;
@!P3 LDC R15, c[0x0][0x3a8] &wr=0x3 ?trans1;
@!P0 IMAD R8, R6.reuse, R8, R9 &req={0} ?trans1;
IADD3 R6, PT, PT, R6, 0x4, RZ ?WAIT3_END_GROUP;
@!P0 IMAD R8, R8, 0x4, R5 ?trans2;
@!P1 IMAD R10, R10, R11, R9 &req={1} ?WAIT4_END_GROUP;
@!P0 LDS R8, [R8] &wr=0x0 ?trans1;
@!P1 IMAD R10, R10, 0x4, R5 ?trans2;
@!P2 IMAD R12, R12, R13, R9 &req={2} ?WAIT4_END_GROUP;
@!P1 LDS R10, [R10] &wr=0x1 ?trans1;
@!P2 IMAD R12, R12, 0x4, R5 ?trans2;
@!P3 IMAD R14, R14, R15, R9 &req={3} ?WAIT4_END_GROUP;
@!P2 LDS R12, [R12] &wr=0x2 ?trans1;
@!P3 IMAD R14, R14, 0x4, R5 ?WAIT6_END_GROUP;
@!P3 LDS R14, [R14] &wr=0x3 ?trans1;
@!P0 FADD R3, R3, R8 &req={0} ?WAIT4_END_GROUP;
@!P1 FADD R3, R3, R10 &req={1} ?WAIT4_END_GROUP;
@!P2 FADD R3, R3, R12 &req={2} ?WAIT4_END_GROUP;
@!P3 FADD R3, R3, R14 &req={3} ?WAIT7_END_GROUP;
@!P4 BRA 0x1500 ?trans5;
ISETP.NE.AND P0, PT, R16, 0x1, PT ?trans1;
LOP3.LUT R0, R0, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P2, PT, R0, 0x1, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x1460 ?trans6;
IMAD R0, R6, 0x4, R7 ?WAIT5_END_GROUP;
LDS R11, [R0] &wr=0x0 ?trans4;
LDS R13, [R0+0x4] &wr=0x1 ?trans1;
ISETP.NE.AND P0, PT, R11, R4.reuse, PT &req={0} ?trans1;
ISETP.NE.AND P1, PT, R13, R4, PT &req={1} ?WAIT12_END_GROUP;
@!P0 LDC R8, c[0x0][0x3a8] &wr=0x0 ?trans1;
@!P0 IADD3 R2, PT, PT, R2, 0x1, RZ ?trans2;
@!P1 IADD3 R10, PT, PT, R6, 0x1, RZ ?trans2;
@!P1 IADD3 R2, PT, PT, R2, 0x1, RZ ?WAIT3_END_GROUP;
@!P1 LDC R11, c[0x0][0x3a8] &wr=0x1 ?trans1;
@!P0 IMAD R8, R6.reuse, R8, R9 &req={0} ?trans1;
IADD3 R6, PT, PT, R6, 0x2, RZ ?WAIT3_END_GROUP;
@!P0 IMAD R8, R8, 0x4, R5 ?trans2;
@!P1 IMAD R10, R10, R11, R9 &req={1} ?WAIT4_END_GROUP;
@!P0 LDS R8, [R8] &wr=0x0 ?trans1;
@!P1 IMAD R10, R10, 0x4, R5 ?WAIT6_END_GROUP;
@!P1 LDS R10, [R10] &wr=0x1 ?trans1;
@!P0 FADD R3, R3, R8 &req={0} ?WAIT4_END_GROUP;
@!P1 FADD R3, R3, R10 &req={1} ?WAIT7_END_GROUP;
@P2 BRA 0x1500 ?trans5;
IMAD R7, R6, 0x4, R7 ?WAIT6_END_GROUP;
LDS R7, [R7] &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R7, R4, PT &req={0} ?WAIT13_END_GROUP;
@!P0 LDC R0, c[0x0][0x3a8] &wr=0x0 ?trans1;
@!P0 IADD3 R2, PT, PT, R2, 0x1, RZ ?trans1;
@!P0 IMAD R6, R6, R0, R9 &req={0} ?WAIT4_END_GROUP;
@!P0 IMAD R6, R6, 0x4, R5 ?WAIT6_END_GROUP;
@!P0 LDS R6, [R6] &wr=0x0 ?trans2;
@!P0 FADD R3, R3, R6 &req={0} ?WAIT7_END_GROUP;
LDC.64 R6, c[0x0][0x390] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x3a8] &wr=0x1 ?trans1;
ISETP.NE.AND P0, PT, R9, RZ, PT ?trans1;
IMAD R5, R4, UR4, R9 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R6, R5, 0x4, R6 &req={0} ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R6.64], R3 &rd=0x0 ?trans3;
@P0 EXIT ?trans5;
LDC.64 R6, c[0x0][0x398] &req={0} &wr=0x0 ?trans2;
IMAD.WIDE.U32 R4, R4, 0x4, R6 &req={0} ?WAIT5_END_GROUP;
REDG.E.ADD.STRONG.GPU desc[UR8][R4.64], R2 ?trans1;
EXIT ?trans5;
BRA 0x15b0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: kmeans_centroid_sum(float*, int*, float*, int*, int, int, int)
_Z19kmeans_centroid_sumPfPiS_S0_iii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x3c
s_load_b128 s[8:11], s[0:1], 0x20
s_waitcnt lgkmcnt(0)
s_and_b32 s11, s2, 0xffff
s_mov_b32 s2, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s11, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB1_15
s_load_b256 s[0:7], s[0:1], 0x0
s_cmp_lt_i32 s10, 1
s_cbranch_scc1 .LBB1_4
v_mul_lo_u32 v2, v1, s10
v_mul_lo_u32 v4, v0, s10
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v3, 31, v2
v_lshl_add_u32 v4, v4, 2, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s0, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
s_mov_b32 s0, s10
.LBB1_3:
global_load_b32 v5, v[2:3], off
v_add_co_u32 v2, vcc_lo, v2, 4
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
s_add_i32 s0, s0, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s0, 0
s_waitcnt vmcnt(0)
ds_store_b32 v4, v5
v_add_nc_u32_e32 v4, 4, v4
s_cbranch_scc0 .LBB1_3
.LBB1_4:
v_ashrrev_i32_e32 v2, 31, v1
s_waitcnt lgkmcnt(0)
s_mul_i32 s0, s11, s10
s_mul_i32 s1, s10, s9
s_lshl_b32 s0, s0, 2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
s_add_i32 s0, s0, 0
v_lshlrev_b64 v[1:2], 2, v[1:2]
v_add_co_u32 v1, vcc_lo, s2, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
v_cmp_gt_u32_e32 vcc_lo, s1, v0
global_load_b32 v1, v[1:2], off
v_lshl_add_u32 v2, v0, 2, s0
s_waitcnt vmcnt(0)
ds_store_b32 v2, v1
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB1_15
v_cvt_f32_u32_e32 v1, s10
s_sub_i32 s1, 0, s10
s_cmp_eq_u32 s11, 0
v_mov_b32_e32 v5, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v1, v1
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v1, 0x4f7ffffe, v1
v_cvt_u32_f32_e32 v1, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v2, s1, v1
v_mul_hi_u32 v2, v1, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v1, v1, v2
v_mul_hi_u32 v1, v0, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_lo_u32 v2, v1, s10
v_add_nc_u32_e32 v3, 1, v1
v_sub_nc_u32_e32 v2, v0, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v4, s10, v2
v_cmp_le_u32_e32 vcc_lo, s10, v2
v_dual_cndmask_b32 v2, v2, v4 :: v_dual_cndmask_b32 v1, v1, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_u32_e32 vcc_lo, s10, v2
v_add_nc_u32_e32 v3, 1, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v4, v1, v3, vcc_lo
v_mul_lo_u32 v1, v4, s10
s_delay_alu instid0(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v0, v1
s_cbranch_scc1 .LBB1_10
s_delay_alu instid0(VALU_DEP_1)
v_lshl_add_u32 v1, v6, 2, 0
v_mov_b32_e32 v5, 0
v_mov_b32_e32 v7, 0
s_lshl_b32 s1, s10, 2
.LBB1_7:
v_mov_b32_e32 v2, s0
s_mov_b32 s2, exec_lo
ds_load_b32 v2, v2
s_waitcnt lgkmcnt(0)
v_cmpx_eq_u32_e64 v2, v4
s_cbranch_execz .LBB1_9
ds_load_b32 v2, v1
v_add_nc_u32_e32 v5, 1, v5
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v7, v7, v2
.LBB1_9:
s_or_b32 exec_lo, exec_lo, s2
v_add_nc_u32_e32 v1, s1, v1
s_add_i32 s11, s11, -1
s_add_i32 s0, s0, 4
s_cmp_eq_u32 s11, 0
s_cbranch_scc0 .LBB1_7
s_branch .LBB1_11
.LBB1_10:
v_mov_b32_e32 v7, 0
.LBB1_11:
v_lshlrev_b32_e32 v0, 2, v0
global_load_b32 v3, v0, s[4:5]
v_add_co_u32 v0, s0, s4, v0
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v1, null, s5, 0, s0
s_mov_b32 s0, 0
.LBB1_12:
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v3, v7
global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off glc
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, v2, v3
v_mov_b32_e32 v3, v2
s_or_b32 s0, vcc_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s0
s_cbranch_execnz .LBB1_12
s_or_b32 exec_lo, exec_lo, s0
v_cmp_eq_u32_e32 vcc_lo, 0, v6
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB1_15
v_lshlrev_b32_e32 v0, 2, v4
global_atomic_add_u32 v0, v5, s[6:7]
.LBB1_15:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| kmeans_centroid_sum | 8,954 | 2,395 | stackv2-00000-of-00015 |
// Demangled: kmeans_centroid_update(float*, int*, int, int)
Function : _Z22kmeans_centroid_updatePfPiii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R9, SR_TID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x390] &wr=0x2 ?trans2;
UIMAD UR4, UR5, UR4, URZ &req={2} ?WAIT6_END_GROUP;
ISETP.GE.U32.AND P0, PT, R9, UR4, PT &req={1} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
UI2F.U32.RP UR4, UR5 ?trans1;
HFMA2 R2, -RZ, RZ, 0, 0 ?trans1;
ISETP.NE.U32.AND P2, PT, RZ, UR5, PT ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans6;
MUFU.RCP R0, UR4 &wr=0x2 ?trans2;
IADD3 R0, PT, PT, R0, 0xffffffe, RZ &req={2} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R3, R0 &wr=0x2 ?trans2;
IADD3 R5, PT, PT, RZ, -R3, RZ &req={2} ?WAIT5_END_GROUP;
IMAD R5, R5, UR5, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R2, R3, R5, R2 ?WAIT6_END_GROUP;
IMAD.HI.U32 R7, R2, R9, RZ ?trans2;
LDC.64 R2, c[0x0][0x388] &wr=0x2 ?trans3;
IADD3 R4, PT, PT, -R7, RZ, RZ ?WAIT5_END_GROUP;
IMAD R4, R4, UR5, R9 ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R4, UR5, PT ?WAIT13_END_GROUP;
@P0 IADD3 R4, PT, PT, R4, -UR5, RZ ?trans2;
@P0 IADD3 R7, PT, PT, R7, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R4, UR5, PT ?trans2;
LDC.64 R4, c[0x0][0x380] &wr=0x3 ?trans11;
@P1 IADD3 R7, PT, PT, R7, 0x1, RZ ?WAIT2_END_GROUP;
@!P2 LOP3.LUT R7, RZ, UR5, RZ, 0x33, !PT ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R2, R7.reuse, 0x4, R2 &req={2} ?trans1;
IADD3 R0, PT, PT, -R7, RZ, RZ ?WAIT5_END_GROUP;
LDG.E R2, desc[UR6][R2.64] &req={1} &wr=0x2 ?trans1;
IMAD R0, R0, UR5, R9 ?WAIT4_END_GROUP;
IMAD R7, R7, UR5, R0 ?WAIT4_END_GROUP;
IMAD.WIDE R4, R7, 0x4, R4 &req={3} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR6][R4.64] &wr=0x3 ?trans1;
BSSY.RECONVERGENT B0, 0x2f0 ?trans1;
I2FP.F32.S32 R3, R2 &req={2} ?WAIT4_END_GROUP;
MUFU.RCP R6, R3 &wr=0x1 ?trans1;
FCHK P0, R0, R3 &req={3} &wr=0x2 ?trans1;
FFMA R7, -R3, R6, 1 &req={1} ?WAIT4_END_GROUP;
FFMA R7, R6, R7, R6 ?WAIT4_END_GROUP;
FFMA R2, R0, R7, RZ ?WAIT4_END_GROUP;
FFMA R6, -R3, R2, R0 ?WAIT4_END_GROUP;
FFMA R7, R7, R6, R2 ?trans1;
@!P0 BRA 0x2e0 &req={2} ?trans6;
MOV R2, 0x2e0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x310 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
STG.E desc[UR6][R4.64], R7 ?trans1;
EXIT ?trans5;
SHF.R.U32.HI R7, RZ, 0x17, R3 ?trans1;
BSSY.RECONVERGENT B1, 0x970 ?trans1;
SHF.R.U32.HI R6, RZ, 0x17, R0 ?trans2;
LOP3.LUT R7, R7, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R6, R6, 0xff, RZ, 0xc0, !PT ?trans1;
MOV R8, R0 ?trans1;
IADD3 R12, PT, PT, R7, -0x1, RZ ?trans1;
MOV R9, R3 ?trans1;
IADD3 R11, PT, PT, R6, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R12, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R11, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R10, RZ ?trans1;
@!P0 BRA 0x550 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0x950 ?trans5;
LOP3.LUT P0, RZ, R9, 0x7fffffff, R8, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x930 ?trans5;
FSETP.NEU.FTZ.AND P2, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P1 BRA !P2, 0x930 ?trans5;
LOP3.LUT P2, RZ, R8, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P1, P2, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0x910 ?trans5;
LOP3.LUT P1, RZ, R9, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x8e0 ?trans5;
ISETP.GE.AND P0, PT, R11, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R12, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R10, RZ ?trans1;
@!P0 MOV R10, 0xffffffc0 ?trans1;
@!P0 FFMA R8, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R9, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R10, PT, PT, R10, 0x40, RZ ?WAIT7_END_GROUP;
LEA R0, R7, 0xc0800000, 0x17 ?trans1;
BSSY.RECONVERGENT B2, 0x8d0 ?trans1;
IADD3 R6, PT, PT, R6, -0x7f, RZ ?trans2;
IADD3 R9, PT, PT, -R0, R9, RZ ?WAIT3_END_GROUP;
IMAD R0, R6.reuse, -0x800000, R8 ?trans1;
IADD3 R7, PT, PT, R6, 0x7f, -R7 ?trans1;
MUFU.RCP R3, R9 &wr=0x0 ?trans1;
FADD.FTZ R11, -R9, -RZ ?trans2;
IADD3 R7, PT, PT, R7, R10, RZ ?trans2;
FFMA R12, R3, R11, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R12, R3, R12, R3 ?WAIT4_END_GROUP;
FFMA R3, R0, R12, RZ ?WAIT4_END_GROUP;
FFMA R8, R11, R3, R0 ?WAIT4_END_GROUP;
FFMA R13, R12, R8, R3 ?WAIT4_END_GROUP;
FFMA R8, R11, R13, R0 ?WAIT4_END_GROUP;
FFMA R3, R12, R8, R13 ?WAIT5_END_GROUP;
SHF.R.U32.HI R0, RZ, 0x17, R3 ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R10, PT, PT, R0, R7, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R10, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x8b0 ?trans5;
ISETP.GT.AND P0, PT, R10, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x880 ?trans5;
ISETP.GE.AND P0, PT, R10, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x8c0 ?trans5;
ISETP.GE.AND P0, PT, R10, -0x18, PT ?trans1;
LOP3.LUT R3, R3, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x8c0 ?trans5;
FFMA.RZ R0, R12, R8.reuse, R13.reuse ?trans1;
IADD3 R9, PT, PT, R10, 0x20, RZ ?trans1;
FFMA.RM R7, R12, R8, R13 ?trans1;
ISETP.NE.AND P1, PT, R10.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R10, RZ, PT ?trans1;
LOP3.LUT R0, R0, 0x7fffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R6, R0, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R0, R12, R8, R13 ?trans1;
IADD3 R8, PT, PT, -R10, RZ, RZ ?trans2;
SHF.L.U32 R9, R6, R9, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R0, R7, PT ?trans1;
SEL R7, R8, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R9, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R7, RZ, R7, R6 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R9, RZ, 0x1, R7 ?WAIT3_END_GROUP;
SEL R0, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R0, R0, 0x1, R9, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, R7, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R9, R0, RZ ?WAIT4_END_GROUP;
LOP3.LUT R3, R0, R3, RZ, 0xfc, !PT ?trans1;
BRA 0x8c0 ?trans6;
LOP3.LUT R3, R3, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x8c0 ?trans6;
IMAD R3, R7, 0x800000, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
BRA 0x960 ?trans5;
LOP3.LUT R3, R9, 0x80000000, R8, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x960 ?trans6;
LOP3.LUT R3, R9, 0x80000000, R8, 0x48, !PT ?trans1;
BRA 0x960 ?trans6;
MUFU.RSQ R3, -QNAN &wr=0x0 ?trans1;
BRA 0x960 ?trans5;
FADD.FTZ R3, R0, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R7, R3 &req={0} ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R2 0x0 ?trans5;
BRA 0x9a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: kmeans_centroid_update(float*, int*, int, int)
_Z22kmeans_centroid_updatePfPiii:
s_load_b64 s[2:3], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_mul_i32 s2, s3, s2
s_delay_alu instid0(SALU_CYCLE_1)
v_cmp_gt_u32_e32 vcc_lo, s2, v0
s_and_saveexec_b32 s2, vcc_lo
s_cbranch_execz .LBB2_2
v_cvt_f32_u32_e32 v1, s3
s_sub_i32 s2, 0, s3
s_load_b128 s[4:7], s[0:1], 0x0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v1, v1
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v1, 0x4f7ffffe, v1
v_cvt_u32_f32_e32 v1, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v2, s2, v1
v_mul_hi_u32 v2, v1, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v1, v1, v2
v_mul_hi_u32 v1, v0, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_lo_u32 v2, v1, s3
v_add_nc_u32_e32 v3, 1, v1
v_sub_nc_u32_e32 v2, v0, v2
v_lshlrev_b32_e32 v0, 2, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v4, s3, v2
v_cmp_le_u32_e32 vcc_lo, s3, v2
v_dual_cndmask_b32 v1, v1, v3 :: v_dual_cndmask_b32 v2, v2, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v3, 1, v1
v_cmp_le_u32_e32 vcc_lo, s3, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v1, v1, v3, vcc_lo
v_lshlrev_b32_e32 v1, 2, v1
s_waitcnt lgkmcnt(0)
global_load_b32 v1, v1, s[6:7]
global_load_b32 v2, v0, s[4:5]
s_waitcnt vmcnt(1)
v_cvt_f32_i32_e32 v1, v1
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_scale_f32 v3, null, v1, v1, v2
v_rcp_f32_e32 v4, v3
s_waitcnt_depctr 0xfff
v_fma_f32 v5, -v3, v4, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v4, v5, v4
v_div_scale_f32 v5, vcc_lo, v2, v1, v2
v_mul_f32_e32 v6, v5, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v7, -v3, v6, v5
v_fmac_f32_e32 v6, v7, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v3, -v3, v6, v5
v_div_fmas_f32 v3, v3, v4, v6
s_delay_alu instid0(VALU_DEP_1)
v_div_fixup_f32 v1, v3, v1, v2
global_store_b32 v0, v1, s[4:5]
.LBB2_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| kmeans_centroid_update | 3,788 | 1,254 | stackv2-00000-of-00015 |
// Demangled: kmeans_cluster_assignment(float*, int*, float*, int, int, int)
Function : _Z25kmeans_cluster_assignmentPfPiS_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x398] &wr=0x2 ?trans7;
LDC R6, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R6, R6, UR4, R3 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R6, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R3, c[0x0][0x39c] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans1;
MOV R7, 0xffffffff ?trans1;
ISETP.GE.AND P0, PT, R3, 0x1, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0xf00 &req={1} ?trans5;
LDC R9, c[0x0][0x3a0] &wr=0x0 ?trans2;
ISETP.GE.AND P0, PT, R9, 0x1, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0xae0 ?trans5;
LOP3.LUT R29, R9.reuse, 0x7, RZ, 0xc0, !PT ?trans1;
HFMA2 R12, -RZ, RZ, 0, 0 ?trans1;
LOP3.LUT R11, R9.reuse, 0x7ffffff8, RZ, 0xc0, !PT ?trans1;
IMAD R8, R6, R9, RZ ?trans1;
LOP3.LUT R9, R9, 0x3, RZ, 0xc0, !PT ?trans1;
MOV R10, 0x7f800000 ?trans1;
MOV R7, 0xffffffff ?trans1;
IADD3 R11, PT, PT, -R11, RZ, RZ ?trans2;
IADD3 R30, PT, PT, R29, -0x1, RZ ?WAIT7_END_GROUP;
LDC R15, c[0x0][0x3a0] &wr=0x0 ?trans1;
UMOV UR4, URZ ?trans1;
ISETP.NE.AND P1, PT, R29, RZ, PT ?trans1;
MOV R13, RZ ?trans1;
ISETP.GE.U32.AND P0, PT, R15, 0x8, PT &req={0} ?trans1;
IMAD R0, R12, R15, RZ ?WAIT12_END_GROUP;
@!P0 BRA 0x4f0 ?trans5;
LDC.64 R2, c[0x0][0x390] &wr=0x0 ?trans1;
MOV R13, RZ ?trans1;
MOV R14, R8 ?trans1;
MOV R16, R11 ?trans1;
UMOV UR4, URZ ?trans1;
IMAD.WIDE.U32 R2, R0, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
IADD.64 R2, R2, 0x10 ?WAIT8_END_GROUP;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans1;
LDG.E R32, desc[UR6][R2.64+-0x10] &wr=0x2 ?trans4;
LDG.E R34, desc[UR6][R2.64+-0xc] &wr=0x3 ?trans4;
LDG.E R26, desc[UR6][R2.64+-0x8] &wr=0x4 ?trans4;
LDG.E R23, desc[UR6][R2.64+-0x4] &wr=0x5 ?trans4;
LDG.E R21, desc[UR6][R2.64] &wr=0x2 ?trans4;
LDG.E R19, desc[UR6][R2.64+0x4] &wr=0x2 ?trans1;
IMAD.WIDE R4, R14, 0x4, R4 &req={0} ?WAIT3_END_GROUP;
LDG.E R17, desc[UR6][R2.64+0x8] &wr=0x2 ?trans4;
LDG.E R31, desc[UR6][R4.64] &wr=0x2 ?trans4;
LDG.E R33, desc[UR6][R4.64+0x4] &wr=0x3 ?trans4;
LDG.E R25, desc[UR6][R4.64+0x8] &wr=0x4 ?trans4;
LDG.E R24, desc[UR6][R4.64+0xc] &wr=0x5 ?trans4;
LDG.E R22, desc[UR6][R4.64+0x10] &wr=0x5 ?trans4;
LDG.E R20, desc[UR6][R4.64+0x14] &wr=0x5 ?trans4;
LDG.E R18, desc[UR6][R4.64+0x18] &wr=0x5 ?trans4;
LDG.E R28, desc[UR6][R4.64+0x1c] &wr=0x5 ?trans4;
LDG.E R27, desc[UR6][R2.64+0xc] &rd=0x0 &wr=0x5 ?trans1;
IADD3 R16, PT, PT, R16, 0x8, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R16, RZ, PT ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
IADD3 R14, PT, PT, R14, 0x8, RZ ?trans1;
IADD.64 R2, R2, 0x20 &req={0} ?trans2;
FADD R32, R31, -R32 &req={2} ?WAIT4_END_GROUP;
FFMA R13, R32, R32, R13 ?trans1;
FADD R34, R33, -R34 &req={3} ?trans1;
FADD R26, R25, -R26 &req={4} ?WAIT3_END_GROUP;
FFMA R13, R34, R34, R13 ?trans1;
FADD R24, R24, -R23 &req={5} ?WAIT3_END_GROUP;
FFMA R13, R26, R26, R13 ?trans1;
FADD R22, R22, -R21 ?WAIT3_END_GROUP;
FFMA R13, R24, R24, R13 ?trans1;
FADD R20, R20, -R19 ?WAIT3_END_GROUP;
FFMA R13, R22, R22, R13 ?trans1;
FADD R18, R18, -R17 ?WAIT3_END_GROUP;
FFMA R13, R20, R20, R13 ?WAIT4_END_GROUP;
FFMA R13, R18, R18, R13 ?trans1;
FADD R28, R28, -R27 ?WAIT4_END_GROUP;
FFMA R13, R28, R28, R13 ?trans1;
@P0 BRA 0x270 ?trans6;
@!P1 BRA 0x960 ?trans5;
ISETP.GE.U32.AND P0, PT, R30, 0x3, PT ?trans1;
ISETP.NE.AND P1, PT, R9, RZ, PT ?WAIT12_END_GROUP;
@!P0 BRA 0x710 ?trans5;
LDC.64 R18, c[0x0][0x390] &wr=0x0 ?trans1;
MOV R2, R0 ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?trans1;
UMOV UR5, URZ ?trans1;
IADD3 R23, PT, PT, R0, UR4, RZ ?trans2;
IADD3 R21, PT, PT, R8, UR4, RZ ?trans1;
IADD.64 R2, R2, UR4 ?trans2;
LDC.64 R16, c[0x0][0x380] &wr=0x1 ?trans8;
LDC.64 R4, c[0x0][0x390] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R18, R23, 0x4, R18 &req={0} ?WAIT6_END_GROUP;
LDG.E R19, desc[UR6][R18.64] &wr=0x3 ?trans1;
IMAD.WIDE R16, R21, 0x4, R16 &req={1} ?WAIT5_END_GROUP;
LDG.E R20, desc[UR6][R16.64+0x8] &wr=0x4 ?trans1;
LEA R4, P0, R2, R4, 0x2 &req={2} ?WAIT3_END_GROUP;
LDG.E R22, desc[UR6][R16.64+0xc] &wr=0x2 ?trans1;
LEA.HI.X R5, R2, R5, R3, 0x2, P0 ?WAIT3_END_GROUP;
LDG.E R2, desc[UR6][R16.64] &wr=0x3 ?trans4;
LDG.E R3, desc[UR6][R16.64+0x4] &wr=0x5 ?trans4;
LDG.E R14, desc[UR6][R4.64+0x4] &wr=0x5 ?trans4;
LDG.E R21, desc[UR6][R4.64+0x8] &wr=0x4 ?trans4;
LDG.E R23, desc[UR6][R4.64+0xc] &wr=0x2 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
FADD R2, R2, -R19 &req={3} ?WAIT4_END_GROUP;
FFMA R2, R2, R2, R13 ?trans1;
FADD R3, R3, -R14 &req={5} ?WAIT4_END_GROUP;
FFMA R2, R3, R3, R2 ?trans1;
FADD R21, R20, -R21 &req={4} ?trans1;
FADD R23, R22, -R23 &req={2} ?WAIT3_END_GROUP;
FFMA R2, R21, R21, R2 ?WAIT4_END_GROUP;
FFMA R13, R23, R23, R2 ?WAIT7_END_GROUP;
@!P1 BRA 0x960 ?trans5;
ISETP.NE.AND P0, PT, R9, 0x1, PT ?trans1;
LOP3.LUT P1, RZ, R15, 0x1, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x8b0 ?trans5;
LDC.64 R16, c[0x0][0x390] &wr=0x0 ?trans1;
MOV R4, R0 ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?trans1;
UMOV UR5, URZ ?trans1;
IADD3 R21, PT, PT, R0, UR4, RZ ?trans2;
IADD3 R19, PT, PT, R8, UR4, RZ ?trans1;
IADD.64 R4, R4, UR4 ?trans2;
LDC.64 R14, c[0x0][0x380] &wr=0x1 ?trans8;
LDC.64 R2, c[0x0][0x390] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R16, R21, 0x4, R16 &req={0} ?WAIT6_END_GROUP;
LDG.E R17, desc[UR6][R16.64] &wr=0x3 ?trans1;
IMAD.WIDE R14, R19, 0x4, R14 &req={1} ?trans1;
LEA R2, P0, R4, R2, 0x2 &req={2} ?WAIT4_END_GROUP;
LEA.HI.X R3, R4, R3, R5, 0x2, P0 ?trans2;
LDG.E R4, desc[UR6][R14.64] &wr=0x3 ?trans4;
LDG.E R2, desc[UR6][R2.64+0x4] &wr=0x2 ?trans4;
LDG.E R5, desc[UR6][R14.64+0x4] &wr=0x2 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x2, URZ ?trans1;
FADD R4, R4, -R17 &req={3} ?WAIT4_END_GROUP;
FFMA R13, R4, R4, R13 ?trans1;
FADD R4, R5, -R2 &req={2} ?WAIT4_END_GROUP;
FFMA R13, R4, R4, R13 ?WAIT7_END_GROUP;
@!P1 BRA 0x960 ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
IADD3 R15, PT, PT, R8, UR4, RZ ?trans2;
IADD3 R17, PT, PT, R0, UR4, RZ ?WAIT5_END_GROUP;
LDC.64 R4, c[0x0][0x390] &wr=0x1 ?trans1;
IMAD.WIDE R2, R15, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR6][R2.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R4, R17, 0x4, R4 &req={1} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR6][R4.64] &wr=0x2 ?trans2;
FADD R0, R2, -R5 &req={2} ?WAIT4_END_GROUP;
FFMA R13, R0, R0, R13 ?WAIT7_END_GROUP;
IADD3 R0, PT, PT, R13, -0xd000000, RZ ?trans1;
MUFU.RSQ R2, R13 &rd=0x0 &wr=0x1 ?trans1;
BSSY.RECONVERGENT B0, 0xa50 ?trans3;
ISETP.GT.U32.AND P0, PT, R0, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xa00 &req={0} ?trans5;
MOV R0, R13 ?trans1;
MOV R14, 0x9e0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xf40 &req={1} ?trans5;
MOV R3, R0 ?trans1;
BRA 0xa40 ?trans6;
FMUL.FTZ R0, R2.reuse, R13 &req={1} ?trans1;
FMUL.FTZ R2, R2, 0.5 ?WAIT3_END_GROUP;
FFMA R3, -R0, R0, R13 ?WAIT4_END_GROUP;
FFMA R3, R3, R2, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU UR4, c[0x0][0x39c] &wr=0x0 ?trans1;
IADD3 R0, PT, PT, R12, 0x1, RZ ?trans1;
FSETP.GEU.AND P0, PT, R3, R10, PT ?WAIT5_END_GROUP;
FSEL R10, R3, R10, !P0 ?trans1;
SEL R7, R12, R7, !P0 ?trans1;
ISETP.NE.AND P1, PT, R0, UR4, PT &req={0} ?WAIT13_END_GROUP;
@!P1 BRA 0xf00 ?trans5;
MOV R12, R0 ?trans1;
BRA 0x190 ?trans6;
ISETP.GE.U32.AND P0, PT, R3.reuse, 0x4, PT ?trans1;
HFMA2 R2, -RZ, RZ, 0, 0 ?trans1;
LOP3.LUT R4, R3, 0x3, RZ, 0xc0, !PT ?trans1;
MOV R0, 0x7f800000 ?trans1;
MOV R7, 0xffffffff ?WAIT9_END_GROUP;
@!P0 BRA 0xe60 ?trans5;
LOP3.LUT R3, R3, 0x7ffffffc, RZ, 0xc0, !PT ?trans1;
UMOV UR4, URZ ?trans1;
MOV R0, 0x7f800000 ?trans1;
MOV R7, 0xffffffff ?trans1;
MOV R2, RZ ?trans1;
ISETP.GT.AND P0, PT, R3, RZ, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xdf0 ?trans5;
IADD3 R5, PT, PT, R3, -UR4, RZ ?trans2;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?WAIT3_END_GROUP;
ISETP.GT.AND P1, PT, R5, 0xc, PT ?WAIT13_END_GROUP;
@!P1 BRA 0xd10 ?trans5;
PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x80 ?trans2;
IADD3 R5, PT, PT, R3, -0xc, RZ ?WAIT11_END_GROUP;
FSETP.GT.AND P3, PT, R0, RZ, PT ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x10, URZ ?WAIT4_END_GROUP;
FSEL R0, R0, RZ, !P3 ?trans1;
SEL R7, R2, R7, P3 ?WAIT4_END_GROUP;
FSETP.GT.AND P1, PT, R0, RZ, PT ?WAIT5_END_GROUP;
FSEL R0, R0, RZ, !P1 ?WAIT5_END_GROUP;
FSETP.GT.AND P2, PT, R0, RZ, PT ?WAIT3_END_GROUP;
@P1 IADD3 R7, PT, PT, R2, 0x4, RZ ?trans1;
ISETP.LE.AND P1, PT, R5, UR4, PT ?trans1;
FSEL R0, R0, RZ, !P2 ?WAIT5_END_GROUP;
FSETP.GT.AND P3, PT, R0, RZ, PT ?WAIT3_END_GROUP;
@P2 IADD3 R7, PT, PT, R2, 0x8, RZ ?trans2;
FSEL R0, R0, RZ, !P3 ?WAIT8_END_GROUP;
@P3 IADD3 R7, PT, PT, R2.reuse, 0xc, RZ ?trans2;
IADD3 R2, PT, PT, R2, 0x10, RZ ?trans1;
@!P1 BRA 0xc10 ?trans6;
IADD3 R5, PT, PT, R3, -UR4, RZ ?WAIT5_END_GROUP;
ISETP.GT.AND P1, PT, R5, 0x4, PT ?WAIT13_END_GROUP;
@!P1 BRA 0xdd0 ?trans5;
FSETP.GT.AND P1, PT, R0, RZ, PT ?trans1;
PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x80 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?WAIT3_END_GROUP;
FSEL R0, R0, RZ, !P1 ?trans1;
SEL R7, R2, R7, P1 ?WAIT4_END_GROUP;
FSETP.GT.AND P2, PT, R0, RZ, PT ?WAIT5_END_GROUP;
FSEL R0, R0, RZ, !P2 ?WAIT8_END_GROUP;
@P2 IADD3 R7, PT, PT, R2.reuse, 0x4, RZ ?trans2;
IADD3 R2, PT, PT, R2, 0x8, RZ ?WAIT7_END_GROUP;
ISETP.NE.OR P0, PT, R3, UR4, P0 ?WAIT13_END_GROUP;
@!P0 BRA 0xe60 ?trans5;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
FSETP.GT.AND P1, PT, R0, RZ, PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R3, UR4, PT ?trans1;
SEL R7, R2, R7, P1 ?trans1;
FSEL R0, R0, RZ, !P1 ?trans1;
IADD3 R2, PT, PT, R2, 0x4, RZ ?WAIT10_END_GROUP;
@P0 BRA 0xdf0 ?trans5;
ISETP.NE.AND P0, PT, R4, RZ, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xf00 ?trans5;
UMOV UR4, URZ ?WAIT5_END_GROUP;
UIADD3 UR4, UPT, UPT, UR4, 0x1, URZ ?trans1;
FSETP.GT.AND P1, PT, R0, RZ, PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R4, UR4, PT ?trans1;
SEL R7, R2, R7, P1 ?trans1;
FSEL R0, R0, RZ, !P1 ?trans1;
IADD3 R2, PT, PT, R2, 0x1, RZ ?WAIT10_END_GROUP;
@P0 BRA 0xe90 ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans2;
IMAD.WIDE R2, R6, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R7 ?trans1;
EXIT ?trans5;
LOP3.LUT P0, RZ, R0, 0x7fffffff, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 MOV R2, R0 ?trans1;
@!P0 BRA 0x1070 ?trans6;
FSETP.GEU.FTZ.AND P0, PT, R0, RZ, PT ?WAIT13_END_GROUP;
@!P0 MOV R2, 0x7fffffff ?trans1;
@!P0 BRA 0x1070 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P0 FADD.FTZ R2, R0, 1 ?trans1;
@P0 BRA 0x1070 ?trans6;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P0 FFMA R3, R0, 1.84467440737095516160e+19, RZ ?WAIT4_END_GROUP;
@P0 MUFU.RSQ R2, R3 &wr=0x0 ?trans2;
@P0 FMUL.FTZ R4, R3, R2 &req={0} ?trans1;
@P0 FMUL.FTZ R13, R2, 0.5 ?trans1;
@!P0 MOV R2, R0 ?trans2;
@P0 FADD.FTZ R5, -R4, -RZ ?WAIT4_END_GROUP;
@P0 FFMA R5, R4, R5, R3 ?WAIT4_END_GROUP;
@P0 FFMA R5, R5, R13, R4 ?WAIT4_END_GROUP;
@P0 FMUL.FTZ R2, R5, 2.3283064365386962891e-10 ?WAIT7_END_GROUP;
MOV R0, R2 ?trans1;
MOV R2, R14 ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R2 0x0 ?trans5;
BRA 0x10b0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: kmeans_cluster_assignment(float*, int*, float*, int, int, int)
_Z25kmeans_cluster_assignmentPfPiS_iii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x34
s_load_b128 s[8:11], s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB0_10
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x10
s_cmp_lt_i32 s9, 1
s_cbranch_scc1 .LBB0_8
v_mul_lo_u32 v2, v1, s10
v_mov_b32_e32 v0, -1
v_mov_b32_e32 v6, 0x7f800000
s_mov_b32 s13, 0
s_cmp_gt_i32 s10, 0
s_mov_b32 s12, s13
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
s_cselect_b32 s4, -1, 0
s_mov_b32 s5, s13
.LBB0_3:
s_and_not1_b32 vcc_lo, exec_lo, s4
s_cbranch_vccnz .LBB0_6
v_mov_b32_e32 v5, v3
s_lshl_b64 s[0:1], s[12:13], 2
v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v4, v2
s_add_u32 s0, s2, s0
s_addc_u32 s1, s3, s1
s_mov_b32 s8, s10
.LBB0_5:
global_load_b32 v8, v[4:5], off
s_load_b32 s11, s[0:1], 0x0
v_add_co_u32 v4, vcc_lo, v4, 4
s_add_i32 s8, s8, -1
v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
s_add_u32 s0, s0, 4
s_addc_u32 s1, s1, 0
s_cmp_eq_u32 s8, 0
s_waitcnt vmcnt(0) lgkmcnt(0)
v_subrev_f32_e32 v8, s11, v8
s_delay_alu instid0(VALU_DEP_1)
v_fmac_f32_e32 v7, v8, v8
s_cbranch_scc0 .LBB0_5
s_branch .LBB0_7
.LBB0_6:
v_mov_b32_e32 v7, 0
.LBB0_7:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_mul_f32_e32 v4, 0x4f800000, v7
v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v7
s_add_i32 s12, s12, s10
v_cndmask_b32_e32 v4, v7, v4, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_sqrt_f32_e32 v5, v4
s_waitcnt_depctr 0xfff
v_add_nc_u32_e32 v7, -1, v5
v_add_nc_u32_e32 v8, 1, v5
v_fma_f32 v9, -v7, v5, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v10, -v8, v5, v4
v_cmp_ge_f32_e64 s0, 0, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cndmask_b32_e64 v5, v5, v7, s0
v_cmp_lt_f32_e64 s0, 0, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v5, v5, v8, s0
v_mul_f32_e32 v7, 0x37800000, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v5, v5, v7, vcc_lo
v_cmp_class_f32_e64 vcc_lo, v4, 0x260
v_cndmask_b32_e32 v4, v5, v4, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_cmp_lt_f32_e32 vcc_lo, v4, v6
v_cndmask_b32_e32 v6, v6, v4, vcc_lo
v_cndmask_b32_e64 v0, v0, s5, vcc_lo
s_add_i32 s5, s5, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s5, s9
s_cbranch_scc0 .LBB0_3
s_branch .LBB0_9
.LBB0_8:
v_mov_b32_e32 v0, -1
.LBB0_9:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v1, vcc_lo, s6, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
global_store_b32 v[1:2], v0, off
.LBB0_10:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| kmeans_cluster_assignment | 6,303 | 1,914 | stackv2-00000-of-00015 |
// Demangled: vecMultiply(int*)
Function : _Z11vecMultiplyPi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R5, SR_TID.X &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE.U32 R2, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans2;
IADD3 R5, PT, PT, R0, R0, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R5 ?trans1;
EXIT ?trans5;
BRA 0x90;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: vecMultiply(int*)
_Z11vecMultiplyPi:
s_load_b64 s[0:1], s[0:1], 0x0
v_lshlrev_b32_e32 v0, 2, v0
s_waitcnt lgkmcnt(0)
global_load_b32 v1, v0, s[0:1]
s_waitcnt vmcnt(0)
v_lshlrev_b32_e32 v1, 1, v1
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| vecMultiply | 288 | 145 | stackv2-00000-of-00015 |
// Demangled: gpu_timestep(Particle*, float)
Function : _Z12gpu_timestepP8Particlef
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R5, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R5, R5, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R5, 0xf423f, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R2, R5, 0x18, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R2.64+0xc] &req={1} &wr=0x2 ?trans4;
LDG.E R5, desc[UR4][R2.64] &wr=0x2 ?trans4;
LDG.E R4, desc[UR4][R2.64+0x10] &wr=0x3 ?trans4;
LDG.E R7, desc[UR4][R2.64+0x4] &wr=0x3 ?trans4;
LDG.E R6, desc[UR4][R2.64+0x14] &wr=0x4 ?trans4;
LDG.E R9, desc[UR4][R2.64+0x8] &wr=0x4 ?trans1;
FFMA R5, R0, UR6, R5 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R5 ?trans1;
FFMA R7, R4, UR6, R7 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64+0x4], R7 ?trans1;
FFMA R9, R6, UR6, R9 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64+0x8], R9 ?trans1;
EXIT ?trans5;
BRA 0x180;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: gpu_timestep(Particle*, float)
_Z12gpu_timestepP8Particlef:
s_load_b32 s2, s[0:1], 0x1c
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_u32_e32 0xf4240, v1
s_cbranch_execz .LBB0_2
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x0
s_load_b32 s0, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
v_mad_u64_u32 v[4:5], null, v1, 24, s[2:3]
s_clause 0x1
global_load_b128 v[0:3], v[4:5], off
global_load_b64 v[6:7], v[4:5], off offset:16
s_waitcnt vmcnt(1)
v_fma_f32 v0, s0, v3, v0
s_waitcnt vmcnt(0)
v_fma_f32 v1, s0, v6, v1
v_fmac_f32_e32 v2, s0, v7
global_store_b96 v[4:5], v[0:2], off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| gpu_timestep | 695 | 421 | stackv2-00000-of-00015 |
// Demangled: foo(int*)
Function : _Z3fooPi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
EXIT ?trans5;
BRA 0x20;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: foo(int*)
_Z3fooPi:
s_endpgm
| foo | 91 | 11 | stackv2-00000-of-00015 |
// Demangled: GPU(int, int, int, int*, int, int, int, int, int*, int*)
Function : _Z3GPUiiiPiiiiiS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R3, c[0x0][0x39c] &wr=0x1 ?trans2;
ISETP.GE.AND P0, PT, R3, 0x1, PT &req={1} ?WAIT13_END_GROUP;
@!P0 EXIT &req={0} ?trans5;
S2R R14, SR_TID.X &wr=0x0 ?trans1;
LDCU UR7, c[0x0][0x384] &wr=0x1 ?trans1;
ISETP.GE.U32.AND P0, PT, R3.reuse, 0x4, PT ?trans1;
LOP3.LUT R2, R3, 0x3, RZ, 0xc0, !PT ?trans1;
LDCU.64 UR10, c[0x0][0x358] &wr=0x2 ?trans1;
UMOV UR4, URZ ?trans1;
UMOV UR5, 0x1 ?trans1;
LOP3.LUT R0, RZ, R14, RZ, 0x33, !PT &req={0} ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R0, UR7, RZ &req={1} ?WAIT4_END_GROUP;
@!P0 BRA 0xad0 &req={2} ?trans5;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans1;
LDCU UR5, c[0x0][0x3a0] &wr=0x1 ?trans1;
LOP3.LUT R3, R3, 0x7ffffffc, RZ, 0xc0, !PT ?trans1;
LDCU UR13, c[0x0][0x398] &wr=0x2 ?trans5;
LDC.64 R6, c[0x0][0x3a8] &wr=0x3 ?trans1;
LDCU UR8, c[0x0][0x384] &wr=0x4 ?trans1;
LDCU.64 UR16, c[0x0][0x3a0] &wr=0x0 ?trans6;
LDC.64 R8, c[0x0][0x3b0] &wr=0x0 ?trans1;
UMOV UR4, URZ ?trans1;
UMOV UR6, 0x2 ?trans1;
UIADD3 UR5, UPT, UPT, UR7, -UR5, URZ &req={1} ?WAIT12_END_GROUP;
UIADD3 UR9, UPT, UPT, UR6, -0x1, URZ ?trans1;
UIADD3 UR7, UPT, UPT, UR4, 0x1, URZ ?trans1;
BSSY.RECONVERGENT B0, 0x3d0 ?trans2;
UISETP.GT.AND UP1, UPT, UR9, UR17, UPT &req={0} ?trans1;
UISETP.GT.AND UP0, UPT, UR9, UR16, UPT ?WAIT10_END_GROUP;
@UP1 UIADD3 UR7, UPT, UPT, UR4, URZ, URZ ?trans1;
UIADD3 UR4, UPT, UPT, UR5, 0x1, URZ ?WAIT3_END_GROUP;
UIADD3 UR12, UPT, UPT, UR7, -0x1, URZ ?trans1;
@!UP0 UIADD3 UR12, UPT, UPT, UR7, URZ, URZ ?WAIT3_END_GROUP;
UMOV UR7, UR8 &req={4} ?trans2;
USEL UR4, UR4, UR7, UP0 ?trans1;
ISETP.GE.AND P0, PT, R14, UR12, PT ?WAIT13_END_GROUP;
@P0 BRA 0x3c0 &req={2,1} ?trans5;
UVIMNMX.S32 UR14, UR9, UR16, UPT ?trans1;
IADD3 R16, PT, PT, R14, UR4, RZ ?WAIT5_END_GROUP;
IADD3 R15, PT, PT, R0, UR14, RZ ?WAIT5_END_GROUP;
IMAD R11, R16, UR13, R15 &req={2} ?WAIT5_END_GROUP;
IADD3 R13, PT, PT, R11.reuse, -UR13, RZ ?trans1;
IMAD.WIDE R10, R11, 0x4, R4 ?WAIT4_END_GROUP;
IMAD.WIDE R12, R13, 0x4, R4 ?trans1;
LDG.E R17, desc[UR10][R10.64+-0x4] &wr=0x2 ?trans4;
LDG.E R18, desc[UR10][R12.64] &wr=0x2 ?trans1;
IADD3 R19, PT, PT, R15, -UR7, RZ ?trans2;
IADD3 R21, PT, PT, R16, -UR7, RZ ?trans1;
VIMNMX.S32 R15, R17, R18, !PT &req={2} ?trans2;
IMAD.WIDE R16, R19, 0x4, R6 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE R18, R21, 0x4, R8 ?trans1;
STG.E desc[UR10][R10.64], R15 &rd=0x0 ?trans4;
LDG.E R16, desc[UR10][R16.64] &wr=0x2 ?trans4;
LDG.E R19, desc[UR10][R18.64] &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R16, R19, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x3c0 &req={0} ?trans5;
LDG.E R12, desc[UR10][R12.64+-0x4] &wr=0x2 ?trans2;
IADD3 R15, PT, PT, R12, 0x1, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR10][R10.64], R15 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 &req={2} ?trans5;
UISETP.GT.AND UP1, UPT, UR6, UR17, UPT ?trans1;
UISETP.GT.AND UP0, UPT, UR6, UR16, UPT ?trans1;
UIADD3 UR4, UPT, UPT, UR12, 0x1, URZ ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x610 ?trans2;
@UP1 UIADD3 UR4, UPT, UPT, UR12, URZ, URZ ?trans1;
UIADD3 UR12, UPT, UPT, UR6, 0x1, URZ ?WAIT3_END_GROUP;
UIADD3 UR9, UPT, UPT, UR4, -0x1, URZ ?trans1;
@!UP0 UIADD3 UR9, UPT, UPT, UR4, URZ, URZ ?trans1;
UIADD3 UR4, UPT, UPT, UR5, 0x2, URZ ?WAIT4_END_GROUP;
USEL UR4, UR4, UR7, UP0 ?trans1;
ISETP.GE.AND P0, PT, R14, UR9, PT ?WAIT13_END_GROUP;
@P0 BRA 0x600 ?trans5;
UVIMNMX.S32 UR14, UR6, UR16, UPT ?trans1;
IADD3 R16, PT, PT, R14, UR4, RZ ?WAIT5_END_GROUP;
IADD3 R15, PT, PT, R0, UR14, RZ &req={0} ?WAIT5_END_GROUP;
IMAD R11, R16, UR13, R15 ?WAIT5_END_GROUP;
IADD3 R13, PT, PT, R11.reuse, -UR13, RZ ?trans1;
IMAD.WIDE R10, R11, 0x4, R4 ?WAIT4_END_GROUP;
IMAD.WIDE R12, R13, 0x4, R4 ?trans1;
LDG.E R17, desc[UR10][R10.64+-0x4] &wr=0x2 ?trans4;
LDG.E R18, desc[UR10][R12.64] &wr=0x2 ?trans1;
IADD3 R19, PT, PT, R15, -UR7, RZ ?trans2;
IADD3 R21, PT, PT, R16, -UR7, RZ ?trans1;
VIMNMX.S32 R15, R17, R18, !PT &req={2} ?trans2;
IMAD.WIDE R16, R19, 0x4, R6 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE R18, R21, 0x4, R8 ?trans1;
STG.E desc[UR10][R10.64], R15 &rd=0x1 ?trans4;
LDG.E R16, desc[UR10][R16.64] &wr=0x2 ?trans4;
LDG.E R19, desc[UR10][R18.64] &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R16, R19, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x600 &req={1} ?trans5;
LDG.E R12, desc[UR10][R12.64+-0x4] &wr=0x2 ?trans2;
IADD3 R15, PT, PT, R12, 0x1, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR10][R10.64], R15 &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
UISETP.GT.AND UP1, UPT, UR12, UR17, UPT ?trans1;
UISETP.GT.AND UP0, UPT, UR12, UR16, UPT ?trans1;
UIADD3 UR4, UPT, UPT, UR9, 0x1, URZ ?trans1;
UIADD3 UR15, UPT, UPT, UR6, 0x2, URZ ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x850 ?trans1;
@UP1 UIADD3 UR4, UPT, UPT, UR9, URZ, URZ ?WAIT4_END_GROUP;
UIADD3 UR9, UPT, UPT, UR4, -0x1, URZ ?trans1;
@!UP0 UIADD3 UR9, UPT, UPT, UR4, URZ, URZ ?trans1;
UIADD3 UR4, UPT, UPT, UR5, 0x3, URZ ?WAIT4_END_GROUP;
USEL UR4, UR4, UR7, UP0 ?trans1;
ISETP.GE.AND P0, PT, R14, UR9, PT ?WAIT13_END_GROUP;
@P0 BRA 0x840 ?trans5;
UVIMNMX.S32 UR14, UR12, UR16, UPT ?trans1;
IADD3 R16, PT, PT, R14, UR4, RZ ?WAIT5_END_GROUP;
IADD3 R15, PT, PT, R0, UR14, RZ &req={1,0} ?WAIT5_END_GROUP;
IMAD R11, R16, UR13, R15 ?WAIT5_END_GROUP;
IADD3 R13, PT, PT, R11.reuse, -UR13, RZ ?trans1;
IMAD.WIDE R10, R11, 0x4, R4 ?WAIT4_END_GROUP;
IMAD.WIDE R12, R13, 0x4, R4 ?trans1;
LDG.E R17, desc[UR10][R10.64+-0x4] &wr=0x2 ?trans4;
LDG.E R18, desc[UR10][R12.64] &wr=0x2 ?trans1;
IADD3 R19, PT, PT, R15, -UR7, RZ ?trans2;
IADD3 R21, PT, PT, R16, -UR7, RZ ?trans1;
VIMNMX.S32 R15, R17, R18, !PT &req={2} ?trans2;
IMAD.WIDE R16, R19, 0x4, R6 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE R18, R21, 0x4, R8 ?trans1;
STG.E desc[UR10][R10.64], R15 &rd=0x2 ?trans4;
LDG.E R16, desc[UR10][R16.64] &wr=0x3 ?trans4;
LDG.E R19, desc[UR10][R18.64] &wr=0x3 ?trans2;
ISETP.NE.AND P0, PT, R16, R19, PT &req={3} ?WAIT13_END_GROUP;
@P0 BRA 0x840 &req={2} ?trans5;
LDG.E R12, desc[UR10][R12.64+-0x4] &wr=0x2 ?trans2;
IADD3 R15, PT, PT, R12, 0x1, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR10][R10.64], R15 &rd=0x2 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
UISETP.GT.AND UP1, UPT, UR15, UR17, UPT ?trans1;
UISETP.GT.AND UP0, UPT, UR15, UR16, UPT ?trans1;
UIADD3 UR12, UPT, UPT, UR9, 0x1, URZ ?trans1;
UIADD3 UR5, UPT, UPT, UR5, 0x4, URZ ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0xa80 ?trans1;
@UP1 UIADD3 UR12, UPT, UPT, UR9, URZ, URZ ?WAIT4_END_GROUP;
UIADD3 UR4, UPT, UPT, UR12, -0x1, URZ ?trans1;
@!UP0 UIADD3 UR4, UPT, UPT, UR12, URZ, URZ ?trans1;
USEL UR12, UR5, UR7, UP0 ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R14, UR4, PT ?WAIT13_END_GROUP;
@P0 BRA 0xa70 ?trans5;
UVIMNMX.S32 UR9, UR16, UR15, UPT ?trans1;
IADD3 R16, PT, PT, R14, UR12, RZ ?WAIT5_END_GROUP;
IADD3 R15, PT, PT, R0, UR9, RZ &req={2,1,0} ?WAIT5_END_GROUP;
IMAD R11, R16, UR13, R15 ?WAIT5_END_GROUP;
IADD3 R13, PT, PT, R11.reuse, -UR13, RZ ?trans1;
IMAD.WIDE R10, R11, 0x4, R4 ?WAIT4_END_GROUP;
IMAD.WIDE R12, R13, 0x4, R4 ?trans1;
LDG.E R17, desc[UR10][R10.64+-0x4] &wr=0x2 ?trans4;
LDG.E R18, desc[UR10][R12.64] &wr=0x2 ?trans1;
IADD3 R19, PT, PT, R15, -UR7, RZ ?trans2;
IADD3 R21, PT, PT, R16, -UR7, RZ ?trans1;
VIMNMX.S32 R15, R17, R18, !PT &req={2} ?trans2;
IMAD.WIDE R16, R19, 0x4, R6 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE R18, R21, 0x4, R8 ?trans1;
STG.E desc[UR10][R10.64], R15 &rd=0x4 ?trans4;
LDG.E R16, desc[UR10][R16.64] &wr=0x2 ?trans4;
LDG.E R19, desc[UR10][R18.64] &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R16, R19, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0xa70 &req={4} ?trans5;
LDG.E R12, desc[UR10][R12.64+-0x4] &wr=0x2 ?trans2;
IADD3 R15, PT, PT, R12, 0x1, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR10][R10.64], R15 &rd=0x4 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.NE.AND P0, PT, R3, UR15, PT ?trans1;
UIADD3 UR6, UPT, UPT, UR6, 0x4, URZ ?WAIT12_END_GROUP;
@P0 BRA 0x190 ?trans5;
UIADD3 UR5, UPT, UPT, UR6, -0x1, URZ ?WAIT12_END_GROUP;
ISETP.NE.AND P0, PT, R2, RZ, PT ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans1;
LDCU UR6, c[0x0][0x3a0] &wr=0x5 ?trans1;
IADD3 R15, PT, PT, -R2, RZ, RZ &req={4,2,1,0} ?trans1;
LDCU UR14, c[0x0][0x398] &wr=0x0 ?trans5;
LDC.64 R6, c[0x0][0x3a8] &req={3} &wr=0x1 ?trans1;
LDCU UR9, c[0x0][0x384] &wr=0x2 ?trans1;
LDCU.64 UR12, c[0x0][0x3a0] &wr=0x3 ?trans6;
LDC.64 R8, c[0x0][0x3b0] &wr=0x4 ?trans1;
UIADD3 UR6, UPT, UPT, -UR6, UR5, UR7 &req={5} ?WAIT12_END_GROUP;
UISETP.GT.AND UP1, UPT, UR5, UR13, UPT &req={3} ?trans1;
UISETP.GT.AND UP0, UPT, UR5, UR12, UPT ?trans1;
UIADD3 UR7, UPT, UPT, UR4, 0x1, URZ ?trans1;
BSSY.RECONVERGENT B0, 0xd90 ?trans8;
@UP1 UIADD3 UR7, UPT, UPT, UR4, URZ, URZ ?WAIT4_END_GROUP;
UIADD3 UR4, UPT, UPT, UR7, -0x1, URZ ?trans1;
@!UP0 UIADD3 UR4, UPT, UPT, UR7, URZ, URZ ?WAIT6_END_GROUP;
ISETP.GE.AND P0, PT, R14, UR4, PT ?WAIT13_END_GROUP;
@P0 BRA 0xd80 ?trans5;
UVIMNMX.S32 UR7, UR5, UR12, UPT ?trans1;
USEL UR8, UR6, UR9, UP0 &req={2} ?WAIT5_END_GROUP;
IADD3 R12, PT, PT, R0, UR7, RZ ?trans2;
IADD3 R13, PT, PT, R14, UR8, RZ ?WAIT5_END_GROUP;
IMAD R3, R13, UR14, R12 &req={0} ?WAIT5_END_GROUP;
IADD3 R11, PT, PT, R3.reuse, -UR14, RZ ?trans1;
IMAD.WIDE R2, R3, 0x4, R4 ?WAIT4_END_GROUP;
IMAD.WIDE R10, R11, 0x4, R4 ?trans1;
LDG.E R16, desc[UR10][R2.64+-0x4] &wr=0x2 ?trans4;
LDG.E R17, desc[UR10][R10.64] &wr=0x2 ?trans1;
IADD3 R21, PT, PT, R12, -UR9, RZ ?trans2;
IADD3 R23, PT, PT, R13, -UR9, RZ ?WAIT3_END_GROUP;
IMAD.WIDE R12, R21, 0x4, R6 &req={1} ?trans1;
VIMNMX.S32 R19, R16, R17, !PT &req={2} ?WAIT3_END_GROUP;
IMAD.WIDE R16, R23, 0x4, R8 &req={4} ?trans2;
STG.E desc[UR10][R2.64], R19 &rd=0x3 ?trans4;
LDG.E R12, desc[UR10][R12.64] &wr=0x2 ?trans4;
LDG.E R17, desc[UR10][R16.64] &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R12, R17, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0xd80 &req={3} ?trans5;
LDG.E R10, desc[UR10][R10.64+-0x4] &wr=0x2 ?trans2;
IADD3 R13, PT, PT, R10, 0x1, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR10][R2.64], R13 &rd=0x3 ?trans2;
BSYNC.RECONVERGENT B0 &req={2,0} ?trans5;
IADD3 R15, PT, PT, R15, 0x1, RZ ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
UIADD3 UR5, UPT, UPT, UR5, 0x1, URZ ?trans1;
UIADD3 UR6, UPT, UPT, UR6, 0x1, URZ ?trans2;
ISETP.NE.AND P0, PT, R15, RZ, PT ?WAIT13_END_GROUP;
@P0 BRA 0xb80 ?trans5;
EXIT ?trans5;
BRA 0xe00;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: GPU(int, int, int, int*, int, int, int, int, int*, int*)
_Z3GPUiiiPiiiiiS_S_:
s_load_b128 s[4:7], s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s5, 1
s_cbranch_scc1 .LBB0_6
s_clause 0x2
s_load_b32 s10, s[0:1], 0x4
s_load_b64 s[8:9], s[0:1], 0x10
s_load_b128 s[0:3], s[0:1], 0x28
v_not_b32_e32 v5, v0
s_mov_b32 s12, 0
s_mov_b32 s15, 0
s_waitcnt lgkmcnt(0)
s_add_i32 s11, s10, 1
s_add_i32 s13, s6, s10
s_sub_i32 s14, s11, s6
.LBB0_2:
s_mov_b32 s17, s12
s_add_i32 s12, s12, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
s_cmp_le_i32 s12, s7
s_cselect_b32 s16, -1, 0
s_cmp_lg_u32 s16, 0
s_mov_b32 s16, exec_lo
s_addc_u32 s15, s15, 0
s_cmp_gt_i32 s12, s6
s_cselect_b32 s18, -1, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
s_cmp_lg_u32 s18, 0
s_subb_u32 s15, s15, 0
v_cmpx_gt_i32_e64 s15, v0
s_cbranch_execz .LBB0_5
s_add_i32 s19, s11, s17
s_and_b32 s20, s18, exec_lo
s_cselect_b32 s19, s13, s19
s_add_i32 s17, s14, s17
s_and_b32 s18, s18, exec_lo
s_cselect_b32 s17, s17, s10
v_add_nc_u32_e32 v6, s19, v5
v_add_nc_u32_e32 v7, s17, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[1:2], null, v7, s4, v[6:7]
v_subrev_nc_u32_e32 v6, s10, v6
v_subrev_nc_u32_e32 v8, s10, v7
v_ashrrev_i32_e32 v7, 31, v6
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_subrev_nc_u32_e32 v3, s4, v1
v_ashrrev_i32_e32 v2, 31, v1
v_ashrrev_i32_e32 v9, 31, v8
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[6:7], 2, v[6:7]
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[1:2], 2, v[1:2]
v_lshlrev_b64 v[8:9], 2, v[8:9]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[3:4], 2, v[3:4]
v_add_co_u32 v1, vcc_lo, s8, v1
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo
v_add_co_u32 v3, vcc_lo, s8, v3
s_delay_alu instid0(VALU_DEP_4)
v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo
v_add_co_u32 v6, vcc_lo, s0, v6
s_clause 0x1
global_load_b32 v10, v[1:2], off offset:-4
global_load_b32 v11, v[3:4], off
v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
v_add_co_u32 v8, vcc_lo, s2, v8
v_add_co_ci_u32_e32 v9, vcc_lo, s3, v9, vcc_lo
s_waitcnt vmcnt(0)
v_max_i32_e32 v10, v10, v11
global_store_b32 v[1:2], v10, off
global_load_b32 v6, v[6:7], off
global_load_b32 v7, v[8:9], off
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, v6, v7
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_5
global_load_b32 v3, v[3:4], off offset:-4
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v3, 1, v3
global_store_b32 v[1:2], v3, off
.LBB0_5:
s_or_b32 exec_lo, exec_lo, s16
s_cmp_lg_u32 s5, s12
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_2
.LBB0_6:
s_endpgm
| GPU | 5,909 | 1,626 | stackv2-00000-of-00015 |
// Demangled: vectorAdd(int*, int*, int*, int)
Function : _Z9vectorAddPiS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R9, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x398] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R9, R0, UR4, R9 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R9, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD.WIDE R2, R9, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x4 ?trans1;
IMAD.WIDE R4, R9, 0x4, R4 &req={2} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x4 ?trans1;
IMAD.WIDE R6, R9, 0x4, R6 &req={3} ?trans1;
IADD3 R9, PT, PT, R2, R5, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x140;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: vectorAdd(int*, int*, int*, int)
_Z9vectorAddPiS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[4:7], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| vectorAdd | 572 | 576 | stackv2-00000-of-00015 |
// Demangled: kernel_add(int*, int*, int*)
Function : _Z10kernel_addPiS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R9, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R9, R9, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R9, 0x7f, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD.WIDE R2, R9, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x4 ?trans1;
IMAD.WIDE R4, R9, 0x4, R4 &req={2} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x4 ?trans1;
IMAD.WIDE R6, R9, 0x4, R6 &req={3} ?trans1;
IADD3 R9, PT, PT, R2, R5, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x130;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: kernel_add(int*, int*, int*)
_Z10kernel_addPiS_S_:
s_load_b32 s2, s[0:1], 0x24
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e32 0x80, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[4:7], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| kernel_add | 544 | 552 | stackv2-00000-of-00015 |
// Demangled: test_Prog(int*, int)
Function : _Z9test_ProgPii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R0, c[0x0][0x388] &wr=0x1 ?trans2;
ISETP.GE.AND P0, PT, R0, 0x2, PT &req={1} ?WAIT13_END_GROUP;
@!P0 EXIT &req={0} ?trans5;
S2R R9, SR_TID.X &wr=0x0 ?trans1;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU UR6, c[0x0][0x388] &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans1;
MOV R0, UR6 &req={1} ?trans1;
IMAD.WIDE.U32 R2, R9, 0x4, R2 &req={2,0} ?WAIT7_END_GROUP;
SHF.R.U32.HI R6, RZ, 0x1, R0 ?trans1;
BSSY.RECONVERGENT B0, 0x150 ?trans1;
ISETP.GT.U32.AND P1, PT, R0, 0x3, PT ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P0, PT, R9, R6, PT ?WAIT13_END_GROUP;
@P0 BRA 0x140 &req={0} ?trans5;
IMAD.WIDE.U32 R4, R6, 0x4, R2 ?trans1;
LDG.E R7, desc[UR4][R2.64] &wr=0x2 ?trans5;
LDG.E R4, desc[UR4][R4.64] &wr=0x2 ?trans2;
IADD3 R7, PT, PT, R4, R7, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R7 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
MOV R0, R6 ?trans1;
@P1 BRA 0xa0 ?trans6;
EXIT ?trans5;
BRA 0x180;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: test_Prog(int*, int)
_Z9test_ProgPii:
s_load_b32 s2, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s2, 2
s_cbranch_scc1 .LBB0_5
s_load_b64 s[0:1], s[0:1], 0x0
v_lshlrev_b32_e32 v1, 2, v0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v1, s0, s0, v1
v_add_co_ci_u32_e64 v2, null, s1, 0, s0
s_mov_b32 s1, 0
.LBB0_2:
s_lshr_b32 s0, s2, 1
s_mov_b32 s3, exec_lo
v_cmpx_gt_u32_e64 s0, v0
s_cbranch_execz .LBB0_4
s_lshl_b64 s[4:5], s[0:1], 2
s_delay_alu instid0(SALU_CYCLE_1)
v_add_co_u32 v3, vcc_lo, v1, s4
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v2, vcc_lo
s_clause 0x1
global_load_b32 v3, v[3:4], off
global_load_b32 v4, v[1:2], off
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v3, v4, v3
global_store_b32 v[1:2], v3, off
.LBB0_4:
s_or_b32 exec_lo, exec_lo, s3
s_cmp_lt_u32 s2, 4
s_mov_b32 s2, s0
s_cbranch_scc0 .LBB0_2
.LBB0_5:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| test_Prog | 625 | 512 | stackv2-00000-of-00015 |
// Demangled: foo_device(int*)
Function : _Z10foo_devicePi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R5, SR_TID.X &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE.U32 R2, R5, 0x4, R2 &req={0} ?WAIT4_END_GROUP;
IMAD R5, R5, 0x7, RZ ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R5 &req={1} ?trans1;
EXIT ?trans5;
BRA 0x80;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: foo_device(int*)
_Z10foo_devicePi:
s_load_b64 s[0:1], s[0:1], 0x0
v_mul_u32_u24_e32 v1, 7, v0
v_lshlrev_b32_e32 v0, 2, v0
s_waitcnt lgkmcnt(0)
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| foo_device | 255 | 120 | stackv2-00000-of-00015 |
// Demangled: exclusive_prefix_sum_gpu(int*, int*, int, int)
Function : _Z24exclusive_prefix_sum_gpuPiS_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R13, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR8, c[0x0][0x390] &wr=0x2 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x360] &wr=0x3 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x3 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x4 ?trans1;
ISETP.NE.AND P0, PT, RZ, UR8, PT &req={2} ?trans1;
UIMAD UR4, UR5, UR4, URZ &req={3} ?trans2;
IMAD R13, R13, UR5, R0 &req={1} ?WAIT10_END_GROUP;
@!P0 BRA 0x210 &req={4} ?trans5;
LDCU UR5, c[0x0][0x394] &wr=0x1 ?trans1;
LDC.64 R8, c[0x0][0x380] &wr=0x2 ?trans1;
LDCU UR9, c[0x0][0x394] &wr=0x3 ?trans1;
LDCU UR8, c[0x0][0x390] &wr=0x4 ?trans6;
LDC.64 R10, c[0x0][0x388] &wr=0x0 ?trans1;
ISETP.GE.AND P0, PT, R13, UR5, PT &req={1} ?WAIT13_END_GROUP;
@P0 EXIT &req={4,3} ?trans5;
ISETP.GT.AND P0, PT, R13.reuse, UR8, PT ?trans1;
IMAD.WIDE R2, R13, 0x4, R8 &req={2} ?WAIT12_END_GROUP;
@P0 IADD3 R5, PT, PT, R13, -UR8, RZ ?trans1;
@P0 LDG.E R0, desc[UR6][R2.64] &wr=0x2 ?trans4;
@P0 IMAD.WIDE R4, R5, 0x4, R8 ?WAIT6_END_GROUP;
@P0 LDG.E R5, desc[UR6][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE R6, R13, 0x4, R10 &req={0} ?trans1;
@P0 IADD3 R15, PT, PT, R0, R5, RZ &req={2} ?WAIT5_END_GROUP;
@P0 STG.E desc[UR6][R6.64], R15 &rd=0x1 ?trans4;
@!P0 LDG.E R17, desc[UR6][R2.64] &wr=0x2 ?trans1;
IADD3 R13, PT, PT, R13, UR4, RZ ?WAIT3_END_GROUP;
@!P0 STG.E desc[UR6][R6.64], R17 &req={2} &rd=0x1 ?trans2;
ISETP.GE.AND P0, PT, R13, UR9, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x120 &req={1} ?trans5;
EXIT ?trans5;
LDCU UR5, c[0x0][0x394] &wr=0x1 ?trans1;
LDCU UR8, c[0x0][0x394] &wr=0x2 ?trans1;
ISETP.GE.AND P0, PT, R13, UR5, PT &req={1} ?WAIT13_END_GROUP;
@P0 EXIT &req={2} ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x1 ?trans1;
ISETP.NE.AND P0, PT, R13, RZ, PT ?WAIT7_END_GROUP;
LDC.64 R6, c[0x0][0x388] &wr=0x2 ?trans8;
@!P0 LDC.64 R2, c[0x0][0x388] &wr=0x3 ?trans2;
@!P0 STG.E desc[UR6][R2.64], RZ &req={3} &rd=0x3 ?trans1;
@P0 IMAD.WIDE R4, R13, 0x4, R4 &req={1} ?WAIT6_END_GROUP;
@P0 LDG.E R5, desc[UR6][R4.64+-0x4] &wr=0x4 ?trans1;
@P0 IMAD.WIDE R6, R13.reuse, 0x4, R6 &req={2} ?trans1;
IADD3 R13, PT, PT, R13, UR4, RZ ?WAIT4_END_GROUP;
@P0 STG.E desc[UR6][R6.64], R5 &req={4} &rd=0x3 ?trans1;
ISETP.GE.AND P0, PT, R13, UR8, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x250 &req={3} ?trans5;
EXIT ?trans5;
BRA 0x320;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: exclusive_prefix_sum_gpu(int*, int*, int, int)
_Z24exclusive_prefix_sum_gpuPiS_ii:
s_clause 0x3
s_load_b32 s8, s[0:1], 0x24
s_load_b64 s[2:3], s[0:1], 0x10
s_load_b32 s9, s[0:1], 0x18
s_load_b128 s[4:7], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s0, s8, 0xffff
s_cmp_eq_u32 s2, 0
v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
s_mul_i32 s8, s9, s0
s_delay_alu instid0(VALU_DEP_1)
v_cmp_gt_i32_e32 vcc_lo, s3, v1
s_cbranch_scc1 .LBB0_7
s_and_saveexec_b32 s1, vcc_lo
s_cbranch_execz .LBB0_6
v_ashrrev_i32_e32 v2, 31, v1
v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v0, v1
s_ashr_i32 s9, s8, 31
s_sub_i32 s2, 0, s2
s_delay_alu instid0(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 2, v[1:2]
s_lshl_b64 s[10:11], s[8:9], 2
s_mov_b32 s9, 0
.LBB0_3:
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v6, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v3, vcc_lo
v_add_nc_u32_e32 v4, s2, v0
s_mov_b32 s0, exec_lo
global_load_b32 v6, v[6:7], off
v_cmpx_lt_i32_e32 0, v4
s_cbranch_execz .LBB0_5
v_lshlrev_b64 v[7:8], 2, v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v7, vcc_lo, s4, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
global_load_b32 v4, v[7:8], off
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v6, v4, v6
.LBB0_5:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v0, s8, v0
v_add_co_u32 v7, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v8, vcc_lo, s7, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_le_i32_e32 vcc_lo, s3, v0
v_add_co_u32 v2, s0, v2, s10
v_add_co_ci_u32_e64 v3, s0, s11, v3, s0
s_or_b32 s9, vcc_lo, s9
s_waitcnt vmcnt(0)
global_store_b32 v[7:8], v6, off
s_and_not1_b32 exec_lo, exec_lo, s9
s_cbranch_execnz .LBB0_3
.LBB0_6:
s_or_b32 exec_lo, exec_lo, s1
s_mov_b32 s0, 0
s_branch .LBB0_8
.LBB0_7:
s_mov_b32 s0, -1
.LBB0_8:
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 vcc_lo, exec_lo, s0
s_cbranch_vccnz .LBB0_16
s_mov_b32 s0, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_16
v_ashrrev_i32_e32 v2, 31, v1
s_add_u32 s1, s4, -4
v_mov_b32_e32 v0, 0
s_addc_u32 s2, s5, -1
s_ashr_i32 s9, s8, 31
v_lshlrev_b64 v[2:3], 2, v[1:2]
s_lshl_b64 s[4:5], s[8:9], 2
s_mov_b32 s9, 0
.LBB0_11:
s_mov_b32 s0, exec_lo
v_cmpx_ne_u32_e32 0, v1
s_xor_b32 s0, exec_lo, s0
s_cbranch_execz .LBB0_13
v_add_co_u32 v4, vcc_lo, s1, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s2, v3, vcc_lo
global_load_b32 v6, v[4:5], off
v_add_co_u32 v4, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
s_waitcnt vmcnt(0)
global_store_b32 v[4:5], v6, off
.LBB0_13:
s_and_not1_saveexec_b32 s0, s0
s_cbranch_execz .LBB0_15
global_store_b32 v0, v0, s[6:7]
.LBB0_15:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v1, s8, v1
v_add_co_u32 v2, s0, v2, s4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v3, s0, s5, v3, s0
v_cmp_le_i32_e32 vcc_lo, s3, v1
s_or_b32 s9, vcc_lo, s9
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s9
s_cbranch_execnz .LBB0_11
.LBB0_16:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| exclusive_prefix_sum_gpu | 1,412 | 1,721 | stackv2-00000-of-00015 |
// Demangled: AddFromUI(float*, float, float, int, int, int, int)
Function : _Z9AddFromUIPfffiiii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_TID.Y &wr=0x1 ?trans7;
LDC R3, c[0x0][0x360] &wr=0x2 ?trans1;
LDCU.128 UR4, c[0x0][0x390] &wr=0x3 ?trans1;
S2R R0, SR_TID.X &wr=0x2 ?trans6;
S2UR UR9, SR_CTAID.Y &wr=0x1 ?trans8;
LDC R5, c[0x0][0x364] &wr=0x1 ?trans8;
S2UR UR8, SR_CTAID.X &wr=0x2 ?trans1;
IMAD R2, R5, UR9, R2 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R2.reuse, UR7, PT &req={3} ?trans1;
UIADD3 UR7, UPT, UPT, UR5, -0x5, URZ ?trans1;
UIADD3 UR5, UPT, UPT, UR5, 0x5, URZ ?trans1;
IMAD R0, R3, UR8, R0 &req={2} ?trans2;
SEL R5, R2, RZ, !P1 ?WAIT3_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR6, PT ?trans1;
UIADD3 UR6, UPT, UPT, UR4, -0x5, URZ ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x5, URZ ?WAIT3_END_GROUP;
SEL R0, R0, RZ, !P0 ?trans1;
ISETP.GT.AND P0, PT, R5, UR7, PT ?trans1;
LDCU UR7, c[0x0][0x370] &wr=0x1 ?trans4;
ISETP.LE.OR P0, PT, R0, UR6, !P0 ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R0, UR4, P0 ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R5, UR5, P0 ?trans1;
IMAD R4, R3, UR7, RZ &req={1} ?WAIT12_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD R5, R5, R4, R0 ?WAIT6_END_GROUP;
LDC.64 R6, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R5, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans2;
FFMA R5, R6, R7, R5 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R5 ?trans1;
EXIT ?trans5;
BRA 0x220;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: AddFromUI(float*, float*, int, float, int, int)
_Z9AddFromUIPfS_ifii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x2c
s_load_b32 s8, s[0:1], 0x20
s_add_u32 s2, s0, 32
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s9, s4, 16
s_and_b32 s10, s4, 0xffff
s_cmp_lt_u32 s14, s8
s_cselect_b32 s4, 12, 18
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_mov_b32_e32 v1, s4
global_load_u16 v5, v1, s[2:3]
s_load_b256 s[0:7], s[0:1], 0x0
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
v_mad_u64_u32 v[2:3], null, s14, s10, v[1:2]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[3:4], null, s15, s9, v[0:1]
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, s6, v2
v_cndmask_b32_e32 v0, 0, v2, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_cmp_gt_i32_e32 vcc_lo, s7, v3
v_cndmask_b32_e32 v3, 0, v3, vcc_lo
s_waitcnt vmcnt(0)
v_mul_lo_u32 v4, s8, v5
v_mad_u64_u32 v[1:2], null, v4, v3, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshl_add_u32 v3, v1, 2, s4
v_ashrrev_i32_e32 v2, 31, v1
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_lshlrev_b64 v[3:4], 2, v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s2, v3
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v4, vcc_lo
s_delay_alu instid0(VALU_DEP_4)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[0:1], off
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v3, s5, v2
global_store_b32 v[0:1], v3, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| AddFromUI | 882 | 979 | stackv2-00000-of-00015 |
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