sass stringlengths 231 30.8k | rdna stringlengths 69 28.4k | function_name stringlengths 1 85 | sass_tokens int64 90 14.4k ⌀ | rdna_tokens int64 11 14.5k ⌀ | source stringclasses 15
values |
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// Demangled: AddObstacleVelocity(float*, float*, float*, float, int, int)
Function : _Z19AddObstacleVelocityPfS_S_fii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R6, SR_TID.Y &wr=0x0 ?trans7;
LDC R9, c[0x0][0x360] &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x398] &wr=0x2 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans1;
LDCU UR7, c[0x0][0x3a0] &wr=0x3 ?trans5;
S2UR UR5, SR_CTAID.Y &wr=0x0 ?trans8;
LDC R3, c[0x0][0x364] &wr=0x0 ?trans1;
LDCU UR6, c[0x0][0x370] &wr=0x4 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC.64 R4, c[0x0][0x380] &wr=0x5 ?trans1;
IMAD R6, R3, UR5, R6 &req={0} ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x390] &wr=0x0 ?trans1;
ISETP.GE.AND P1, PT, R6.reuse, UR7, PT &req={3} ?trans1;
IMAD R0, R9.reuse, UR4, R0 &req={1} ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans3;
SEL R7, R6, RZ, !P1 ?trans1;
IMAD R6, R9, UR6, RZ &req={4} ?trans1;
ISETP.GE.AND P0, PT, R0, UR9, PT &req={2} ?WAIT5_END_GROUP;
SEL R0, R0, RZ, !P0 ?WAIT5_END_GROUP;
IMAD R9, R7, R6, R0 ?WAIT4_END_GROUP;
IMAD.WIDE R4, R9.reuse, 0x4, R4 &req={5} ?trans1;
SHF.L.U32 R7, R9, 0x2, RZ ?WAIT4_END_GROUP;
LDG.E R11, desc[UR4][R4.64] &req={1} &wr=0x2 ?trans1;
IMAD.WIDE R2, R7, 0x4, R2 &req={0} ?trans2;
LDC.64 R6, c[0x0][0x388] &wr=0x0 ?trans3;
LDG.E R0, desc[UR4][R2.64+0x8] &wr=0x2 ?trans1;
IMAD.WIDE R6, R9, 0x4, R6 &req={0} ?WAIT4_END_GROUP;
FFMA R11, R0, UR8, R11 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R11 ?trans4;
LDG.E R0, desc[UR4][R2.64+0x4] &wr=0x2 ?trans4;
LDG.E R9, desc[UR4][R6.64] &wr=0x2 ?trans2;
FFMA R9, R0, UR8, R9 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x230;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: AddObstacleVelocity(float*, float*, float*, float, int, int)
_Z19AddObstacleVelocityPfS_S_fii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x34
s_load_b32 s8, s[0:1], 0x28
s_add_u32 s2, s0, 40
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s9, s4, 16
s_and_b32 s10, s4, 0xffff
s_cmp_lt_u32 s14, s8
s_cselect_b32 s4, 12, 18
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_mov_b32_e32 v1, s4
s_load_b128 s[4:7], s[0:1], 0x18
global_load_u16 v5, v1, s[2:3]
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
v_mad_u64_u32 v[2:3], null, s14, s10, v[1:2]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[3:4], null, s15, s9, v[0:1]
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, s5, v2
v_cndmask_b32_e32 v0, 0, v2, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_cmp_gt_i32_e32 vcc_lo, s6, v3
v_cndmask_b32_e32 v3, 0, v3, vcc_lo
s_waitcnt vmcnt(0)
v_mul_lo_u32 v4, s8, v5
s_clause 0x1
s_load_b128 s[8:11], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, v4, v3, v[0:1]
v_lshlrev_b32_e32 v3, 2, v1
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v4, 31, v3
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 2, v[3:4]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, vcc_lo, s8, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v5, vcc_lo, s9, v1, vcc_lo
v_add_co_u32 v2, vcc_lo, s0, v2
s_delay_alu instid0(VALU_DEP_4)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
v_add_co_u32 v0, vcc_lo, s10, v0
global_load_b32 v6, v[4:5], off
global_load_b32 v7, v[2:3], off offset:8
v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v6, s4, v7
global_store_b32 v[4:5], v6, off
global_load_b32 v2, v[2:3], off offset:4
global_load_b32 v3, v[0:1], off
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v3, s4, v2
global_store_b32 v[0:1], v3, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| AddObstacleVelocity | 946 | 1,188 | stackv2-00000-of-00015 |
// Demangled: AddSource(float*, float*, float, int, int)
Function : _Z9AddSourcePfS_fii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R0, SR_TID.X &wr=0x0 ?trans7;
LDC R9, c[0x0][0x360] &wr=0x0 ?trans1;
LDCU.64 UR8, c[0x0][0x390] &wr=0x1 ?trans1;
S2R R6, SR_TID.Y &wr=0x2 ?trans1;
LDCU UR7, c[0x0][0x398] &wr=0x3 ?trans5;
S2UR UR4, SR_CTAID.X &wr=0x0 ?trans8;
S2UR UR5, SR_CTAID.Y &wr=0x2 ?trans8;
LDC R7, c[0x0][0x364] &wr=0x2 ?trans1;
LDCU UR6, c[0x0][0x370] &wr=0x4 ?trans7;
LDC.64 R2, c[0x0][0x388] &wr=0x5 ?trans1;
IMAD R0, R9, UR4, R0 &req={0} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0.reuse, UR9, PT &req={1} ?trans2;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans3;
SEL R0, R0, RZ, !P0 ?trans1;
IMAD R6, R7, UR5, R6 &req={2} ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans4;
ISETP.GE.AND P1, PT, R6, UR7, PT &req={3} ?WAIT5_END_GROUP;
SEL R7, R6, RZ, !P1 ?trans1;
IMAD R6, R9, UR6, RZ &req={4} ?WAIT4_END_GROUP;
IMAD R7, R7, R6, R0 ?WAIT4_END_GROUP;
IMAD.WIDE R2, R7, 0x4, R2 &req={5} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R7, 0x4, R4 &req={0} ?trans2;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans4;
LDG.E R7, desc[UR4][R4.64] &wr=0x2 ?trans2;
FFMA R7, R2, UR8, R7 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R7 ?trans1;
EXIT ?trans5;
BRA 0x1c0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: AddSource(float*, float*, float, int, int)
_Z9AddSourcePfS_fii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x2c
s_load_b32 s8, s[0:1], 0x20
s_add_u32 s2, s0, 32
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s9, s4, 16
s_and_b32 s10, s4, 0xffff
s_cmp_lt_u32 s14, s8
s_cselect_b32 s4, 12, 18
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_mov_b32_e32 v1, s4
global_load_u16 v5, v1, s[2:3]
s_load_b256 s[0:7], s[0:1], 0x0
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
v_mad_u64_u32 v[2:3], null, s14, s10, v[1:2]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[3:4], null, s15, s9, v[0:1]
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, s5, v2
v_cndmask_b32_e32 v0, 0, v2, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_cmp_gt_i32_e32 vcc_lo, s6, v3
v_cndmask_b32_e32 v3, 0, v3, vcc_lo
s_waitcnt vmcnt(0)
v_mul_lo_u32 v4, s8, v5
v_mad_u64_u32 v[1:2], null, v4, v3, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[0:1], off
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v3, s4, v2
global_store_b32 v[0:1], v3, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| AddSource | 745 | 864 | stackv2-00000-of-00015 |
// Demangled: Advect(float*, float*, float*, float*, float*, float*, float*, float, float, int, int)
Function : _Z6AdvectPfS_S_S_S_S_S_ffii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR10, c[0x0][0x3c0] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x760 ?trans1;
S2R R2, SR_TID.Y &wr=0x3 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x4 ?trans4;
LDC R5, c[0x0][0x360] &wr=0x1 ?trans8;
S2UR UR6, SR_CTAID.Y &wr=0x3 ?trans1;
UIADD3 UR5, UPT, UPT, UR10, -0x2, URZ &req={2} ?WAIT7_END_GROUP;
LDC R3, c[0x0][0x364] &wr=0x3 ?trans1;
IMAD R0, R5, UR4, R0 &req={1} ?trans1;
UIADD3 UR4, UPT, UPT, UR11, -0x2, URZ ?WAIT4_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR10, PT ?trans1;
IMAD R2, R3, UR6, R2 &req={3} ?WAIT4_END_GROUP;
SEL R3, R0, RZ, !P0 ?trans1;
LDCU UR6, c[0x0][0x370] &wr=0x1 ?trans1;
ISETP.GE.AND P1, PT, R2, UR11, PT ?WAIT3_END_GROUP;
ISETP.GE.AND P0, PT, R3, UR5, PT ?trans2;
SEL R10, R2, RZ, !P1 ?WAIT3_END_GROUP;
ISETP.LT.OR P0, PT, R3, 0x2, P0 ?WAIT5_END_GROUP;
ISETP.LT.U32.OR P0, PT, R10, 0x2, P0 ?trans1;
IMAD R2, R5, UR6, RZ &req={1} ?WAIT4_END_GROUP;
ISETP.GE.OR P0, PT, R10.reuse, UR4, P0 ?trans1;
IMAD R0, R10, R2, R3 ?WAIT12_END_GROUP;
@P0 BRA 0x750 &req={4,0} ?trans5;
LDC.64 R4, c[0x0][0x3a0] &wr=0x0 ?trans1;
SHF.L.U32 R7, R0, 0x2, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R4, R7, 0x4, R4 &req={0} ?WAIT6_END_GROUP;
LDG.E R4, desc[UR8][R4.64] &wr=0x2 ?trans2;
FSETP.GEU.AND P0, PT, R4, 1, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x750 ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x3b8] &wr=0x1 ?trans7;
LDC.64 R6, c[0x0][0x388] &wr=0x2 ?trans1;
UI2FP.F32.S32 UR4, UR10 ?trans1;
I2FP.F32.U32 R3, R3 ?WAIT2_END_GROUP;
I2FP.F32.U32 R10, R10 ?WAIT4_END_GROUP;
LDC.64 R12, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD.WIDE R4, R0, 0x4, R4 &req={0} ?WAIT6_END_GROUP;
LDG.E R4, desc[UR8][R4.64] &wr=0x4 ?trans1;
IMAD.WIDE R6, R0, 0x4, R6 &req={2} ?WAIT6_END_GROUP;
LDG.E R7, desc[UR8][R6.64] &wr=0x2 ?trans1;
F2F.F64.F32 R8, UR4 &wr=0x0 ?trans1;
UI2FP.F32.S32 UR4, UR5 ?WAIT4_END_GROUP;
UFMUL UR4, UR4, UR6 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT14_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, R8, -2 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, R8, 0.5 &req={0} &wr=0x0 ?trans1;
FFMA R14, R4, -UR4, R3 &req={4} ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R4, R14 &wr=0x0 ?trans1;
FFMA R7, R7, -UR4, R10 &req={2} ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GEU.AND P0, PT, R8, R4, PT &req={0} &wr=0x0 ?trans1;
FMNMX.NAN R6, R7, 0.5, !PT ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P0 F2F.F32.F64 R14, R8 &req={0} &wr=0x0 ?trans1;
F2I.TRUNC.NTZ R3, R6 ?trans1;
F2I.TRUNC.NTZ R15, R14 &req={0} &wr=0x0 ?trans2;
IMAD R7, R2, R3, R15 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R10, R7, 0x4, R12 &req={3} ?trans1;
IADD3 R19, PT, PT, R2, R7, RZ ?WAIT4_END_GROUP;
LDG.E R21, desc[UR8][R10.64+0x4] &wr=0x2 ?trans1;
IMAD.WIDE R12, R19, 0x4, R12 ?WAIT3_END_GROUP;
LDG.E R17, desc[UR8][R10.64] &wr=0x3 ?trans4;
LDG.E R18, desc[UR8][R12.64+0x4] &wr=0x4 ?trans4;
LDG.E R16, desc[UR8][R12.64] &rd=0x0 &wr=0x5 ?trans1;
I2FP.F32.S32 R5, R3 ?trans2;
LDC.64 R2, c[0x0][0x3a8] &wr=0x1 ?trans3;
FADD R6, R6, -R5 ?WAIT5_END_GROUP;
LDC.64 R4, c[0x0][0x398] &wr=0x1 ?trans1;
FADD R8, -R6, 1 ?trans1;
I2FP.F32.S32 R15, R15 ?WAIT5_END_GROUP;
FADD R15, R14, -R15 ?trans1;
LDC.64 R12, c[0x0][0x3b0] &req={0} &wr=0x0 ?trans3;
FADD R9, -R15, 1 ?trans1;
IMAD.WIDE R2, R0, 0x4, R2 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R10, R19, 0x4, R4 ?WAIT4_END_GROUP;
IMAD.WIDE R4, R7, 0x4, R4 ?WAIT4_END_GROUP;
FMUL R21, R8.reuse, R21 &req={2} ?trans1;
FMUL R17, R8, R17 &req={3} ?WAIT3_END_GROUP;
FFMA R18, R6.reuse, R18, R21 &req={4} ?trans1;
FFMA R16, R6, R16, R17 &req={5} ?WAIT3_END_GROUP;
FMUL R18, R15, R18 ?WAIT4_END_GROUP;
FFMA R16, R9, R16, R18 ?WAIT4_END_GROUP;
FMUL R17, R16, UR7 ?WAIT5_END_GROUP;
STG.E desc[UR8][R2.64], R17 &rd=0x0 ?trans4;
LDG.E R21, desc[UR8][R10.64+0x4] &wr=0x2 ?trans4;
LDG.E R7, desc[UR8][R4.64] &wr=0x3 ?trans4;
LDG.E R19, desc[UR8][R4.64+0x4] &wr=0x4 ?trans4;
LDG.E R14, desc[UR8][R10.64] &wr=0x5 ?trans1;
IMAD.WIDE R2, R0, 0x4, R12 &req={0} ?WAIT4_END_GROUP;
FMUL R21, R6, R21 &req={2} ?trans1;
FMUL R7, R8, R7 &req={3} ?WAIT3_END_GROUP;
FFMA R8, R8, R19, R21 &req={4} ?trans1;
FFMA R14, R6, R14, R7 &req={5} ?WAIT3_END_GROUP;
FMUL R8, R15, R8 ?WAIT4_END_GROUP;
FFMA R8, R9, R14, R8 ?WAIT4_END_GROUP;
FMUL R7, R8, UR7 ?WAIT5_END_GROUP;
STG.E desc[UR8][R2.64], R7 ?trans1;
EXIT ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R2, c[0x0][0x3a8] &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x3b0] &wr=0x1 ?trans1;
IMAD.WIDE R2, R0, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR8][R2.64], RZ ?trans1;
IMAD.WIDE R4, R0, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR8][R4.64], RZ ?trans1;
EXIT ?trans5;
BRA 0x7d0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: Advect(float*, float*, float*, float*, float*, float, float, int, int)
_Z6AdvectPfS_S_S_S_ffii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x44
s_load_b32 s12, s[0:1], 0x38
s_add_u32 s2, s0, 56
s_addc_u32 s3, s1, 0
s_load_b128 s[16:19], s[0:1], 0x28
s_waitcnt lgkmcnt(0)
s_lshr_b32 s5, s4, 16
s_and_b32 s4, s4, 0xffff
s_cmp_lt_u32 s14, s12
s_cselect_b32 s6, 12, 18
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_mov_b32_e32 v1, s6
global_load_u16 v6, v1, s[2:3]
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
v_mad_u64_u32 v[2:3], null, s14, s4, v[1:2]
s_delay_alu instid0(VALU_DEP_2)
v_mad_u64_u32 v[4:5], null, s15, s5, v[0:1]
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x20
s_load_b256 s[4:11], s[0:1], 0x0
s_mov_b32 s1, 0
s_mov_b32 s14, exec_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_cmp_gt_i32_e32 vcc_lo, s18, v2
v_cndmask_b32_e32 v2, 0, v2, vcc_lo
v_cmp_gt_i32_e32 vcc_lo, s19, v4
v_cmp_gt_i32_e64 s13, 2, v2
v_cndmask_b32_e32 v4, 0, v4, vcc_lo
s_waitcnt vmcnt(0)
v_mul_lo_u32 v3, s12, v6
s_delay_alu instid0(VALU_DEP_1)
v_mad_u64_u32 v[0:1], null, v3, v4, v[2:3]
v_cmpx_lt_i32_e32 1, v2
s_cbranch_execz .LBB16_4
s_add_i32 s12, s18, -2
v_cmp_lt_i32_e32 vcc_lo, 1, v4
s_add_i32 s1, s19, -2
v_cmp_gt_i32_e64 s0, s12, v2
v_cmp_gt_i32_e64 s1, s1, v4
s_delay_alu instid0(VALU_DEP_2)
s_and_b32 s0, s0, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
s_and_b32 s19, s0, s1
s_mov_b32 s0, 0
s_xor_b32 s1, s19, -1
s_and_saveexec_b32 s15, s19
s_cbranch_execz .LBB16_3
v_lshlrev_b32_e32 v5, 2, v0
s_and_not1_b32 s1, s1, exec_lo
s_mov_b32 s0, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v6, 31, v5
v_lshlrev_b64 v[5:6], 2, v[5:6]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v5, vcc_lo, s10, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s11, v6, vcc_lo
global_load_b32 v1, v[5:6], off
s_waitcnt vmcnt(0)
v_cmp_ngt_f32_e32 vcc_lo, 1.0, v1
s_and_b32 s10, vcc_lo, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s1, s1, s10
.LBB16_3:
s_or_b32 exec_lo, exec_lo, s15
s_waitcnt lgkmcnt(0)
s_and_not1_b32 s10, s13, exec_lo
s_and_b32 s11, s1, exec_lo
s_and_b32 s1, s0, exec_lo
s_or_b32 s13, s10, s11
.LBB16_4:
s_or_b32 exec_lo, exec_lo, s14
s_delay_alu instid0(VALU_DEP_2)
v_ashrrev_i32_e32 v1, 31, v0
s_waitcnt lgkmcnt(0)
s_and_saveexec_b32 s10, s13
s_mov_b32 s0, 0
s_and_not1_b32 s1, s1, exec_lo
s_or_b32 exec_lo, exec_lo, s10
v_mov_b32_e32 v5, s0
s_and_saveexec_b32 s0, s1
s_cbranch_execz .LBB16_8
v_lshlrev_b64 v[5:6], 2, v[0:1]
v_cvt_f32_i32_e32 v2, v2
v_cvt_f32_i32_e32 v4, v4
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v7, vcc_lo, s4, v5
v_add_co_ci_u32_e32 v8, vcc_lo, s5, v6, vcc_lo
v_add_co_u32 v5, vcc_lo, s6, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
global_load_b32 v7, v[7:8], off
v_cvt_f32_i32_e32 v8, s12
global_load_b32 v9, v[5:6], off
v_cvt_f32_i32_e32 v5, s18
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f64_f32_e32 v[5:6], v5
v_add_f64 v[5:6], v[5:6], -2.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[5:6], v[5:6], 0.5
v_cvt_f32_f64_e32 v11, v[5:6]
v_mul_f32_e32 v10, s16, v8
s_waitcnt vmcnt(1)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_fma_f32 v2, -v10, v7, v2
s_waitcnt vmcnt(0)
v_fma_f32 v4, -v10, v9, v4
v_cvt_f64_f32_e32 v[7:8], v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_cmp_ngt_f32_e32 vcc_lo, 0.5, v4
v_cndmask_b32_e32 v10, 0.5, v4, vcc_lo
v_cmp_lt_f64_e32 vcc_lo, v[5:6], v[7:8]
v_cndmask_b32_e32 v11, v2, v11, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_i32_f32_e32 v13, v11
v_add_nc_u32_e32 v5, 1, v13
v_cvt_i32_f32_e32 v12, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v4, v3, v12
v_add_nc_u32_e32 v2, v4, v13
v_add_nc_u32_e32 v7, v4, v3
v_add_nc_u32_e32 v4, v4, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v3, 31, v2
v_add_nc_u32_e32 v8, v7, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_ashrrev_i32_e32 v5, 31, v4
v_add_nc_u32_e32 v6, v7, v13
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_ashrrev_i32_e32 v9, 31, v8
v_lshlrev_b64 v[4:5], 2, v[4:5]
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_ashrrev_i32_e32 v7, 31, v6
v_add_co_u32 v2, vcc_lo, s8, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_4)
v_add_co_u32 v4, vcc_lo, s8, v4
v_lshlrev_b64 v[8:9], 2, v[8:9]
v_add_co_ci_u32_e32 v5, vcc_lo, s9, v5, vcc_lo
v_lshlrev_b64 v[6:7], 2, v[6:7]
s_clause 0x1
global_load_b32 v14, v[2:3], off
global_load_b32 v15, v[4:5], off
v_add_co_u32 v2, vcc_lo, s8, v8
v_add_co_ci_u32_e32 v3, vcc_lo, s9, v9, vcc_lo
v_add_co_u32 v4, vcc_lo, s8, v6
v_add_co_ci_u32_e32 v5, vcc_lo, s9, v7, vcc_lo
s_clause 0x1
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_cvt_f32_i32_e32 v4, v12
v_cvt_f32_i32_e32 v6, v13
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_f32_e32 v4, v10, v4
v_dual_sub_f32 v5, 1.0, v4 :: v_dual_sub_f32 v6, v11, v6
s_waitcnt vmcnt(2)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_mul_f32_e32 v7, v15, v5
v_mul_f32_e32 v5, v14, v5
s_waitcnt vmcnt(1)
v_dual_fmac_f32 v7, v2, v4 :: v_dual_sub_f32 v2, 1.0, v6
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fmac_f32_e32 v5, v3, v4
v_mul_f32_e32 v3, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v3, v2, v5
v_mul_f32_e32 v5, s17, v3
.LBB16_8:
s_or_b32 exec_lo, exec_lo, s0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_store_b32 v[0:1], v5, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| Advect | 2,314 | 3,507 | stackv2-00000-of-00015 |
// Demangled: ApplyBuoyancy(float*, float*, float*, float*, float*, float*, float, float, float, float, int, int)
Function : _Z13ApplyBuoyancyPfS_S_S_S_S_ffffii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x3c0] &wr=0x2 ?trans1;
S2R R2, SR_TID.Y &wr=0x3 ?trans6;
LDC R5, c[0x0][0x360] &wr=0x1 ?trans8;
S2UR UR7, SR_CTAID.Y &wr=0x3 ?trans8;
LDC R3, c[0x0][0x364] &wr=0x3 ?trans1;
IMAD R0, R5, UR6, R0 &req={1} ?trans1;
LDCU UR6, c[0x0][0x370] &wr=0x1 ?trans4;
ISETP.GE.AND P0, PT, R0, UR4, PT &req={2} ?trans1;
UIADD3 UR4, UPT, UPT, UR4, -0x2, URZ ?WAIT4_END_GROUP;
SEL R0, R0, RZ, !P0 ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR4, PT ?trans1;
IMAD R2, R3, UR7, R2 &req={3} ?trans1;
UIADD3 UR4, UPT, UPT, UR5, -0x2, URZ ?WAIT3_END_GROUP;
ISETP.LT.OR P0, PT, R0, 0x2, P0 ?trans1;
ISETP.GE.AND P1, PT, R2, UR5, PT ?WAIT5_END_GROUP;
SEL R3, R2, RZ, !P1 ?trans1;
IMAD R2, R5, UR6, RZ &req={1} ?WAIT4_END_GROUP;
ISETP.LT.U32.OR P0, PT, R3, 0x2, P0 ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R3, UR4, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R6, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD R13, R3, R2, R0 ?trans1;
LDCU UR6, c[0x0][0x3b0] &wr=0x2 ?trans5;
LDC.64 R2, c[0x0][0x3a0] &wr=0x3 ?trans8;
LDC.64 R8, c[0x0][0x388] &wr=0x4 ?trans1;
IMAD.WIDE R6, R13, 0x4, R6 &req={0} ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x3a8] &wr=0x0 ?trans1;
LDG.E R7, desc[UR4][R6.64] &req={1} &wr=0x5 ?trans1;
IMAD.WIDE R2, R13, 0x4, R2 &req={3} ?WAIT6_END_GROUP;
LDC.64 R10, c[0x0][0x390] &wr=0x1 ?trans1;
IMAD.WIDE R8, R13.reuse, 0x4, R8 &req={4} ?trans1;
STG.E desc[UR4][R2.64], R7 &req={5} &rd=0x3 ?trans5;
LDG.E R9, desc[UR4][R8.64] &wr=0x4 ?trans1;
IMAD.WIDE R4, R13, 0x4, R4 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R10, R13, 0x4, R10 &req={1} ?trans1;
STG.E desc[UR4][R4.64], R9 &req={4} &rd=0x3 ?trans5;
LDG.E R10, desc[UR4][R10.64] &wr=0x2 ?trans2;
FSETP.GT.AND P0, PT, R10, UR6, PT &req={2} ?WAIT13_END_GROUP;
@!P0 EXIT &req={3} ?trans5;
LDCU.64 UR8, c[0x0][0x398] &wr=0x0 ?trans1;
SHF.R.S32.HI R0, RZ, 0x1f, R13 ?trans1;
LDCU UR7, c[0x0][0x3b4] &wr=0x1 ?trans1;
LEA R6, P0, R13, UR8, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R7, R13, UR9, R0, 0x2, P0 ?trans1;
LDCU.64 UR8, c[0x0][0x3b8] &wr=0x0 ?trans1;
LDG.E R0, desc[UR4][R2.64] &wr=0x2 ?trans4;
LDG.E R6, desc[UR4][R6.64] &wr=0x3 ?trans1;
FADD R10, R10, -UR6 ?WAIT4_END_GROUP;
FMUL R10, R10, UR9 &req={0} ?trans1;
FMUL R9, R6, UR8 &req={3} ?WAIT4_END_GROUP;
FFMA R11, R10, UR7, -R9 &req={1} ?WAIT4_END_GROUP;
FFMA R13, RZ, R11, R0 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R13 ?trans4;
LDG.E R8, desc[UR4][R4.64] &wr=0x2 ?trans1;
F2F.F64.F32 R6, R11 ?trans1;
UMOV.64 UR8, 0x3fb999999999999a ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R8, R8 &req={2} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R6, UR8, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R7, R6 &req={0} &wr=0x0 ?trans2;
STG.E desc[UR4][R4.64], R7 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x4d0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: ApplyBuoyancy(float*, float*, float*, float*, float*, float*, float, float, float, float, int, int)
_Z13ApplyBuoyancyPfS_S_S_S_S_ffffii:
s_clause 0x1
s_load_b32 s6, s[0:1], 0x54
s_load_b64 s[2:3], s[0:1], 0x40
v_and_b32_e32 v1, 0x3ff, v0
s_add_u32 s4, s0, 0x48
s_addc_u32 s5, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s7, s6, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, s14, s7, v[1:2]
s_mov_b32 s7, exec_lo
v_cmp_gt_i32_e32 vcc_lo, s2, v2
v_cndmask_b32_e32 v1, 0, v2, vcc_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_lt_i32_e32 1, v1
s_cbranch_execz .LBB18_4
v_bfe_u32 v0, v0, 10, 10
s_lshr_b32 s6, s6, 16
s_load_b128 s[16:19], s[0:1], 0x30
s_add_i32 s2, s2, -2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, s15, s6, v[0:1]
v_cmp_gt_i32_e32 vcc_lo, s3, v2
s_add_i32 s3, s3, -2
v_cndmask_b32_e32 v0, 0, v2, vcc_lo
v_cmp_gt_i32_e32 vcc_lo, s2, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cmp_lt_i32_e64 s2, 1, v0
v_cmp_gt_i32_e64 s3, s3, v0
s_and_b32 s2, vcc_lo, s2
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
s_and_b32 s2, s2, s3
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 exec_lo, exec_lo, s2
s_cbranch_execz .LBB18_4
s_load_b32 s2, s[4:5], 0x0
s_waitcnt lgkmcnt(0)
s_cmp_lt_u32 s14, s2
s_cselect_b32 s3, 12, 18
s_delay_alu instid0(SALU_CYCLE_1)
v_mov_b32_e32 v2, s3
global_load_u16 v2, v2, s[4:5]
s_load_b256 s[4:11], s[0:1], 0x0
s_waitcnt vmcnt(0)
v_mul_lo_u32 v4, s2, v2
s_load_b128 s[0:3], s[0:1], 0x20
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, v4, v0, v[1:2]
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[4:5], 2, v[2:3]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s4, v4
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v5, vcc_lo
v_add_co_u32 v2, vcc_lo, s0, v4
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v5, vcc_lo
global_load_b32 v6, v[0:1], off
v_add_co_u32 v0, vcc_lo, s6, v4
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v5, vcc_lo
s_waitcnt vmcnt(0)
global_store_b32 v[2:3], v6, off
global_load_b32 v8, v[0:1], off
v_add_co_u32 v0, vcc_lo, s2, v4
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v5, vcc_lo
v_add_co_u32 v6, vcc_lo, s8, v4
v_add_co_ci_u32_e32 v7, vcc_lo, s9, v5, vcc_lo
s_waitcnt vmcnt(0)
global_store_b32 v[0:1], v8, off
global_load_b32 v6, v[6:7], off
s_waitcnt vmcnt(0)
v_cmp_lt_f32_e32 vcc_lo, s16, v6
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB18_4
v_add_co_u32 v4, vcc_lo, s10, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s11, v5, vcc_lo
s_mov_b32 s0, 0x9999999a
s_mov_b32 s1, 0x3fb99999
global_load_b32 v4, v[4:5], off
global_load_b32 v5, v[2:3], off
v_subrev_f32_e32 v6, s16, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mul_f32_e32 v6, s19, v6
s_waitcnt vmcnt(1)
v_mul_f32_e32 v4, s18, v4
v_fma_f32 v4, v6, s17, -v4
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_fmac_f32_e32 v5, 0, v4
global_store_b32 v[2:3], v5, off
global_load_b32 v5, v[0:1], off
v_cvt_f64_f32_e32 v[2:3], v4
s_waitcnt vmcnt(0)
v_cvt_f64_f32_e32 v[4:5], v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[2:3], v[2:3], s[0:1], v[4:5]
v_cvt_f32_f64_e32 v2, v[2:3]
global_store_b32 v[0:1], v2, off
.LBB18_4:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| ApplyBuoyancy | 1,847 | 1,902 | stackv2-00000-of-00015 |
// Demangled: ClearArray(float*, float, int, int)
Function : _Z10ClearArrayPffii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R0, SR_TID.X &wr=0x0 ?trans7;
LDC R7, c[0x0][0x360] &wr=0x0 ?trans1;
LDCU UR7, c[0x0][0x390] &wr=0x1 ?trans1;
S2R R4, SR_TID.Y &wr=0x2 ?trans6;
S2UR UR4, SR_CTAID.X &wr=0x0 ?trans8;
S2UR UR5, SR_CTAID.Y &wr=0x2 ?trans8;
LDC R5, c[0x0][0x364] &wr=0x2 ?trans1;
LDCU UR6, c[0x0][0x370] &wr=0x3 ?trans7;
LDC.64 R8, c[0x0][0x388] &wr=0x4 ?trans1;
IMAD R0, R7, UR4, R0 &req={0} ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
IMAD R4, R5, UR5, R4 &req={2} ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans4;
ISETP.GE.AND P1, PT, R4, UR7, PT &req={1} ?trans1;
ISETP.GE.AND P0, PT, R0, R9, PT &req={4} ?WAIT4_END_GROUP;
SEL R5, R4, RZ, !P1 ?trans1;
IMAD R4, R7, UR6, RZ &req={3} ?trans1;
SEL R0, R0, RZ, !P0 ?WAIT5_END_GROUP;
IMAD R5, R5, R4, R0 ?WAIT4_END_GROUP;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R8 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x170;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: ClearArray(int*, float, int, int)
_Z10ClearArrayPifii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x18
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s9, s4, 16
s_and_b32 s10, s4, 0xffff
s_cmp_lt_u32 s14, s8
s_cselect_b32 s4, 12, 18
s_delay_alu instid0(SALU_CYCLE_1)
v_mov_b32_e32 v1, s4
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x8
s_load_b64 s[0:1], s[0:1], 0x0
global_load_u16 v5, v1, s[2:3]
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[2:3], null, s14, s10, v[1:2]
v_mad_u64_u32 v[3:4], null, s15, s9, v[0:1]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_cmp_gt_i32_e32 vcc_lo, s5, v2
v_cndmask_b32_e32 v0, 0, v2, vcc_lo
v_cmp_gt_i32_e32 vcc_lo, s6, v3
v_cndmask_b32_e32 v3, 0, v3, vcc_lo
s_waitcnt vmcnt(0)
v_mul_lo_u32 v4, s8, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, v4, v3, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_cvt_i32_f32_e32 v2, s4
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| ClearArray | 640 | 801 | stackv2-00000-of-00015 |
// Demangled: ComputeDivergence(float*, float*, float*, float*, int, int)
Function : _Z17ComputeDivergencePfS_S_S_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x3a0] &wr=0x2 ?trans1;
S2R R3, SR_TID.Y &wr=0x3 ?trans6;
LDC R5, c[0x0][0x360] &wr=0x1 ?trans8;
S2UR UR7, SR_CTAID.Y &wr=0x3 ?trans8;
LDC R2, c[0x0][0x364] &wr=0x3 ?trans1;
IMAD R0, R5, UR6, R0 &req={1} ?trans1;
LDCU UR6, c[0x0][0x370] &wr=0x1 ?trans4;
ISETP.GE.AND P0, PT, R0, UR4, PT &req={2} ?trans1;
UIADD3 UR4, UPT, UPT, UR4, -0x2, URZ ?trans1;
IMAD R3, R2, UR7, R3 &req={3} ?WAIT3_END_GROUP;
SEL R2, R0, RZ, !P0 ?trans1;
IMAD R4, R5, UR6, RZ &req={1} ?trans1;
ISETP.GE.AND P1, PT, R3, UR5, PT ?WAIT3_END_GROUP;
ISETP.GE.AND P0, PT, R2, UR4, PT ?trans1;
UIADD3 UR5, UPT, UPT, UR5, -0x2, URZ ?trans1;
SEL R3, R3, RZ, !P1 ?WAIT3_END_GROUP;
ISETP.LT.OR P0, PT, R2, 0x2, P0 ?WAIT5_END_GROUP;
ISETP.LT.U32.OR P0, PT, R3, 0x2, P0 ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R3, UR5, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R6, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD R3, R3, R4, RZ ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans4;
IADD3 R0, PT, PT, R2, R3.reuse, RZ ?trans2;
IADD3 R3, PT, PT, R4, R3, RZ ?trans1;
LDC.64 R14, c[0x0][0x380] &wr=0x2 ?trans1;
IADD3 R21, PT, PT, R0, 0x1, RZ ?WAIT2_END_GROUP;
IADD3 R5, PT, PT, R3, -R4, -R4 ?trans2;
IADD3 R17, PT, PT, R2.reuse, R3, RZ ?trans1;
IMAD.SHL.U32 R9, R21, 0x4, RZ ?trans1;
IADD3 R19, PT, PT, R2, R5, RZ ?WAIT3_END_GROUP;
IMAD.SHL.U32 R5, R17, 0x4, RZ ?trans2;
IMAD.SHL.U32 R3, R19, 0x4, RZ ?trans2;
IMAD.WIDE R8, R9, 0x4, R6 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R5, 0x4, R6.reuse ?trans1;
LDG.E R11, desc[UR6][R8.64] &req={1} &wr=0x3 ?trans4;
LDG.E R10, desc[UR6][R8.64+-0x20] &wr=0x4 ?trans1;
IMAD.WIDE R6, R3, 0x4, R6 ?WAIT3_END_GROUP;
LDG.E R2, desc[UR6][R4.64] &wr=0x5 ?trans4;
LDG.E R3, desc[UR6][R6.64] &wr=0x2 ?trans1;
FSETP.GT.AND P2, PT, R11, RZ, PT &req={3} ?trans1;
FSETP.GT.AND P3, PT, R10, RZ, PT &req={4} ?trans1;
FSETP.GT.AND P0, PT, R2, RZ, PT &req={5} ?trans1;
FSETP.GT.AND P1, PT, R3, RZ, PT &req={2} ?WAIT10_END_GROUP;
@P2 LDG.E R2, desc[UR6][R8.64+0x8] &wr=0x2 ?trans4;
@P3 LDG.E R3, desc[UR6][R8.64+-0x18] &wr=0x2 ?trans4;
@P0 LDG.E R16, desc[UR6][R4.64+0x4] &wr=0x3 ?trans1;
@!P0 LDC.64 R10, c[0x0][0x388] &wr=0x0 ?trans3;
@P1 LDG.E R18, desc[UR6][R6.64+0x4] &rd=0x1 &wr=0x4 ?trans1;
IMAD.WIDE R14, R21, 0x4, R14 ?WAIT4_END_GROUP;
@!P1 LDC.64 R12, c[0x0][0x388] &wr=0x5 ?trans1;
@!P0 IMAD.WIDE R10, R17, 0x4, R10 &req={0} ?WAIT4_END_GROUP;
@!P1 IMAD.WIDE R12, R19, 0x4, R12 &req={5} ?trans1;
@!P2 LDG.E R2, desc[UR6][R14.64] &wr=0x2 ?trans4;
@!P3 LDG.E R3, desc[UR6][R14.64+-0x8] &wr=0x2 ?trans4;
@!P0 LDG.E R16, desc[UR6][R10.64] &wr=0x3 ?trans4;
@!P1 LDG.E R18, desc[UR6][R12.64] &wr=0x4 ?trans1;
UI2FP.F32.S32 UR4, UR4 ?trans1;
HFMA2 R6, -RZ, RZ, 0, 5.9604644775390625e-08 &req={1} ?trans1;
BSSY.RECONVERGENT B0, 0x7c0 ?trans7;
F2F.F64.F32 R4, UR4 &wr=0x0 ?trans2;
MUFU.RCP64H R7, R5 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, -R4, R6, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R8, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R6, R8, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, -R4, R8, 1 &req={0} &wr=0x0 ?trans1;
FADD R3, -R3, R2 &req={2} ?WAIT4_END_GROUP;
FADD R3, R3, R16 &req={3} ?WAIT4_END_GROUP;
FADD R18, R3, -R18 &req={4} ?WAIT15_END_GROUP;
NOP ?WAIT10_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R2, R18 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R8, R6, R8 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R2, 0.5 &req={1} &wr=0x0 ?trans2;
FSETP.GEU.AND P1, PT, |R15|, 6.5827683646048100446e-37, PT &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R2, R14, R6 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, -R4, R2, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R6, R8, R2 &req={0} &wr=0x0 ?trans2;
FFMA R6, RZ, R5, R3 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R6|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA P1, 0x7b0 ?trans5;
MOV R10, 0x7b0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x810 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R4, c[0x0][0x398] &wr=0x0 ?trans1;
F2F.F32.F64 R3, R2 &wr=0x1 ?trans1;
IMAD.WIDE R4, R0, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R3 &req={1} ?trans1;
EXIT ?trans5;
FSETP.GEU.AND P0, PT, |R5|.reuse, 1.469367938527859385e-39, PT ?trans1;
LOP3.LUT R2, R5.reuse, 0x800fffff, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B1, 0xff0 ?trans1;
MOV R12, 0x1 ?trans1;
LOP3.LUT R20, R5, 0x7ff00000, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R3, R2, 0x3ff00000, RZ, 0xfc, !PT ?trans1;
MOV R2, R4 ?WAIT6_END_GROUP;
@!P0 DMUL R2, R4, 8.98846567431157953865e+307 &wr=0x0 ?trans2;
MUFU.RCP64H R13, R3 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R12, -R2, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R6, R6, R6 &req={0} &rd=0x0 ?trans2;
MOV R7, R15 &req={0} ?trans1;
MOV R6, R14 ?trans1;
HFMA2 R14, -RZ, RZ, 0.0045166015625, 0 ?WAIT3_END_GROUP;
FSETP.GEU.AND P2, PT, |R7|.reuse, 1.469367938527859385e-39, PT ?trans1;
LOP3.LUT R11, R7, 0x7ff00000, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P1, PT, R11, R20, PT ?trans1;
MOV R21, R11 ?trans1;
@!P0 LOP3.LUT R20, R3, 0x7ff00000, RZ, 0xc0, !PT ?WAIT3_END_GROUP;
SEL R9, R14, 0x63400000, !P1 ?trans2;
@!P2 LOP3.LUT R8, R5, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
@!P2 MOV R16, RZ ?trans2;
LOP3.LUT R9, R9, 0x800fffff, R7, 0xf8, !PT ?trans2;
@!P2 ISETP.GE.U32.AND P3, PT, R11, R8, PT ?trans1;
MOV R8, R6 ?trans1;
IADD3 R22, PT, PT, R20, -0x1, RZ ?WAIT3_END_GROUP;
@!P2 SEL R15, R14, 0x63400000, !P3 ?WAIT5_END_GROUP;
@!P2 LOP3.LUT R15, R15, 0x80000000, R7, 0xf8, !PT ?WAIT4_END_GROUP;
@!P2 LOP3.LUT R17, R15, 0x100000, RZ, 0xfc, !PT ?WAIT15_END_GROUP;
NOP ?WAIT10_END_GROUP;
@!P2 DFMA R8, R8, 2, -R16 &wr=0x0 ?trans2;
@!P2 LOP3.LUT R21, R9, 0x7ff00000, RZ, 0xc0, !PT &req={0} ?WAIT4_END_GROUP;
IADD3 R15, PT, PT, R21, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R15, 0x7feffffe, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R22, 0x7feffffe, P0 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R12, R18, R12 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R18, -R2, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R18, R12, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R16, R12, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R16, -R2, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R12, R18, R16 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0xea0 &req={1,0} ?trans5;
LOP3.LUT R16, R5, 0x7ff00000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R6, PT, PT, R11.reuse, -R16.reuse, RZ ?trans1;
ISETP.GE.U32.AND P0, PT, R11, R16, PT ?WAIT4_END_GROUP;
VIMNMX.S32 R6, R6, -0x46a00000, !PT ?trans1;
SEL R11, R14, 0x63400000, !P0 ?WAIT4_END_GROUP;
VIMNMX.S32 R6, R6, 0x46a00000, PT ?WAIT5_END_GROUP;
IADD3 R11, PT, PT, -R11, R6, RZ ?trans1;
MOV R6, RZ ?WAIT3_END_GROUP;
IADD3 R7, PT, PT, R11, 0x7fe00000, RZ ?WAIT6_END_GROUP;
DMUL R14, R12, R6 &wr=0x0 ?trans2;
FSETP.GTU.AND P0, PT, |R15|, 1.469367938527859385e-39, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0xfe0 ?trans5;
DFMA R2, R12, -R2, R8 &wr=0x0 ?trans1;
MOV R6, RZ ?trans1;
FSETP.NEU.AND P0, PT, R3.reuse, RZ, PT &req={0} ?trans1;
LOP3.LUT R5, R3, 0x80000000, R5, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R7, R5, R7, RZ, 0xfc, !PT ?WAIT8_END_GROUP;
@!P0 BRA 0xfe0 ?trans5;
IADD3 R3, PT, PT, -R11, RZ, RZ ?trans1;
MOV R2, RZ ?trans1;
DMUL.RP R6, R12, R6 &wr=0x0 ?trans2;
LOP3.LUT R5, R7, R5, RZ, 0x3c, !PT &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R14, -R2, R12 &wr=0x0 ?trans2;
IADD3 R2, PT, PT, -R11, -0x43300000, RZ &req={0} ?WAIT5_END_GROUP;
FSETP.NEU.AND P0, PT, |R3|, R2, PT ?WAIT5_END_GROUP;
FSEL R14, R6, R14, !P0 ?trans1;
FSEL R15, R5, R15, !P0 ?trans1;
BRA 0xfe0 ?trans6;
DSETP.NAN.AND P0, PT, R6, R6, PT &wr=0x0 ?trans2;
@P0 BRA 0xfc0 &req={0} ?trans5;
DSETP.NAN.AND P0, PT, R4, R4, PT &wr=0x0 ?trans2;
@P0 BRA 0xf90 &req={0} ?trans5;
ISETP.NE.AND P0, PT, R21, R20, PT ?trans1;
MOV.64 R14, 0xfff8000000000000 ?WAIT12_END_GROUP;
@!P0 BRA 0xfe0 ?trans5;
ISETP.NE.AND P0, PT, R21, 0x7ff00000, PT ?trans1;
LOP3.LUT R15, R7, 0x80000000, R5, 0x48, !PT ?WAIT4_END_GROUP;
ISETP.EQ.OR P0, PT, R20, RZ, !P0 ?WAIT13_END_GROUP;
@P0 LOP3.LUT R2, R15, 0x7ff00000, RZ, 0xfc, !PT ?trans1;
@!P0 MOV R14, RZ ?trans1;
@P0 MOV R14, RZ ?WAIT3_END_GROUP;
@P0 MOV R15, R2 ?trans1;
BRA 0xfe0 ?trans6;
LOP3.LUT R15, R5, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R14, R4 ?trans1;
BRA 0xfe0 ?trans6;
LOP3.LUT R15, R7, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R14, R6 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
HFMA2 R11, -RZ, RZ, 0, 0 ?trans1;
MOV R2, R14 ?trans1;
MOV R3, R15 ?trans2;
RET.REL.NODEC R10 0x0 ?trans5;
BRA 0x1030;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: ComputeDivergence(float*, float*, float*, float*, int, int)
_Z17ComputeDivergencePfS_S_S_ii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x34
s_load_b64 s[2:3], s[0:1], 0x20
v_and_b32_e32 v1, 0x3ff, v0
s_add_u32 s6, s0, 40
s_addc_u32 s7, s1, 0
v_bfe_u32 v0, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s5, s4, 16
s_and_b32 s4, s4, 0xffff
s_add_i32 s12, s2, -2
v_mad_u64_u32 v[2:3], null, s14, s4, v[1:2]
v_mad_u64_u32 v[3:4], null, s15, s5, v[0:1]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_cmp_gt_i32_e32 vcc_lo, s2, v2
v_cndmask_b32_e32 v0, 0, v2, vcc_lo
v_cmp_gt_i32_e32 vcc_lo, s3, v3
s_add_i32 s3, s3, -2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_cmp_lt_i32_e64 s4, 1, v0
v_cndmask_b32_e32 v1, 0, v3, vcc_lo
v_cmp_gt_i32_e32 vcc_lo, s12, v0
v_cmp_lt_i32_e64 s2, 1, v1
v_cmp_gt_i32_e64 s3, s3, v1
s_delay_alu instid0(VALU_DEP_2)
s_and_b32 s2, vcc_lo, s2
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
s_and_b32 s2, s2, s3
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, s4, s2
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB19_2
s_load_b32 s2, s[6:7], 0x0
s_waitcnt lgkmcnt(0)
s_cmp_lt_u32 s14, s2
s_cselect_b32 s3, 12, 18
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_mov_b32_e32 v2, s3
global_load_u16 v2, v2, s[6:7]
s_load_b256 s[4:11], s[0:1], 0x0
s_waitcnt vmcnt(0)
v_mul_lo_u32 v2, s2, v2
v_mul_lo_u32 v1, v2, v1
v_lshlrev_b32_e32 v3, 1, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v2, v1, v2
v_add_nc_u32_e32 v1, v1, v0
v_add_nc_u32_e32 v18, v2, v0
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_sub_nc_u32_e32 v3, v2, v3
v_add_nc_u32_e32 v20, -1, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b32_e32 v2, 2, v18
v_add_nc_u32_e32 v0, v3, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b32_e32 v6, 2, v20
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b32_e32 v8, 2, v0
v_ashrrev_i32_e32 v7, 31, v6
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[10:11], 2, v[2:3]
v_or_b32_e32 v2, 1, v2
v_add_nc_u32_e32 v19, 1, v1
v_ashrrev_i32_e32 v9, 31, v8
v_lshlrev_b64 v[14:15], 2, v[6:7]
v_lshlrev_b32_e32 v4, 2, v19
s_delay_alu instid0(VALU_DEP_3)
v_lshlrev_b64 v[16:17], 2, v[8:9]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v9, vcc_lo, s8, v10
v_add_co_ci_u32_e32 v10, vcc_lo, s9, v11, vcc_lo
v_ashrrev_i32_e32 v5, 31, v4
global_load_b32 v3, v[9:10], off
v_lshlrev_b64 v[12:13], 2, v[4:5]
v_or_b32_e32 v4, 2, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v11, vcc_lo, s8, v12
v_add_co_ci_u32_e32 v12, vcc_lo, s9, v13, vcc_lo
v_add_co_u32 v9, vcc_lo, s8, v16
v_add_co_ci_u32_e32 v10, vcc_lo, s9, v17, vcc_lo
v_add_co_u32 v13, vcc_lo, s8, v14
v_add_co_ci_u32_e32 v14, vcc_lo, s9, v15, vcc_lo
s_clause 0x2
global_load_b32 v5, v[11:12], off
global_load_b32 v7, v[9:10], off
global_load_b32 v9, v[13:14], off
v_dual_mov_b32 v10, s9 :: v_dual_mov_b32 v11, s8
v_or_b32_e32 v12, 2, v6
v_or_b32_e32 v6, 1, v8
s_waitcnt vmcnt(3)
v_cmp_lt_f32_e32 vcc_lo, 0, v3
v_cndmask_b32_e32 v13, s7, v10, vcc_lo
v_cndmask_b32_e32 v2, v18, v2, vcc_lo
v_cndmask_b32_e32 v14, s6, v11, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_waitcnt vmcnt(2)
v_cmp_lt_f32_e32 vcc_lo, 0, v5
s_waitcnt vmcnt(1)
v_cmp_lt_f32_e64 s0, 0, v7
s_waitcnt vmcnt(0)
v_cmp_lt_f32_e64 s1, 0, v9
v_cndmask_b32_e32 v4, v19, v4, vcc_lo
v_cndmask_b32_e32 v15, s4, v11, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_cndmask_b32_e64 v8, v20, v12, s1
v_cndmask_b32_e64 v6, v0, v6, s0
v_cndmask_b32_e32 v12, s5, v10, vcc_lo
v_ashrrev_i32_e32 v5, 31, v4
v_cndmask_b32_e64 v16, s4, v11, s1
v_ashrrev_i32_e32 v9, 31, v8
v_cndmask_b32_e64 v0, s7, v10, s0
v_cndmask_b32_e64 v10, s5, v10, s1
v_lshlrev_b64 v[4:5], 2, v[4:5]
v_ashrrev_i32_e32 v7, 31, v6
v_lshlrev_b64 v[8:9], 2, v[8:9]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v4, vcc_lo, v15, v4
v_add_co_ci_u32_e32 v5, vcc_lo, v12, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v8, vcc_lo, v16, v8
v_add_co_ci_u32_e32 v9, vcc_lo, v10, v9, vcc_lo
v_add_co_u32 v2, vcc_lo, v14, v2
v_lshlrev_b64 v[6:7], 2, v[6:7]
v_add_co_ci_u32_e32 v3, vcc_lo, v13, v3, vcc_lo
v_cndmask_b32_e64 v10, s6, v11, s0
global_load_b32 v4, v[4:5], off
global_load_b32 v5, v[8:9], off
global_load_b32 v8, v[2:3], off
v_add_co_u32 v2, vcc_lo, v10, v6
v_add_co_ci_u32_e32 v3, vcc_lo, v0, v7, vcc_lo
global_load_b32 v0, v[2:3], off
s_waitcnt vmcnt(2)
v_sub_f32_e32 v2, v4, v5
s_waitcnt vmcnt(1)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_f32_e32 v2, v8, v2
s_waitcnt vmcnt(0)
v_sub_f32_e32 v0, v2, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cvt_f64_f32_e32 v[2:3], v0
v_cvt_f32_i32_e32 v0, s12
v_cvt_f64_f32_e32 v[4:5], v0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[2:3], v[2:3], 0.5
v_div_scale_f64 v[6:7], null, v[4:5], v[4:5], v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f64_e32 v[8:9], v[6:7]
s_waitcnt_depctr 0xfff
v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
v_div_scale_f64 v[10:11], vcc_lo, v[2:3], v[4:5], v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[12:13], v[10:11], v[8:9]
v_fma_f64 v[6:7], -v[6:7], v[12:13], v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fmas_f64 v[6:7], v[6:7], v[8:9], v[12:13]
v_div_fixup_f64 v[2:3], v[6:7], v[4:5], v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cvt_f32_f64_e32 v3, v[2:3]
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s10, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
global_store_b32 v[0:1], v3, off
.LBB19_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| ComputeDivergence | 5,630 | 3,782 | stackv2-00000-of-00015 |
// Demangled: DrawSquare(float*, float, int, int)
Function : _Z10DrawSquarePffii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x38c] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x220 ?trans1;
S2R R4, SR_TID.Y &wr=0x3 ?trans1;
LDCU UR7, c[0x0][0x390] &wr=0x4 ?trans4;
LDC R9, c[0x0][0x360] &wr=0x1 ?trans8;
S2UR UR5, SR_CTAID.Y &wr=0x3 ?trans1;
I2FP.F32.S32 R7, UR6 &req={2} ?WAIT4_END_GROUP;
MUFU.RCP R2, R7 &wr=0x2 ?trans3;
LDC R5, c[0x0][0x364] &wr=0x3 ?trans1;
IMAD R0, R9, UR4, R0 &req={1} ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans4;
ISETP.GE.AND P0, PT, R0, UR6, PT ?WAIT5_END_GROUP;
SEL R3, R0, RZ, !P0 ?WAIT5_END_GROUP;
I2FP.F32.S32 R0, R3 ?trans1;
IMAD R4, R5, UR5, R4 &req={3} ?trans2;
FFMA R5, -R7, R2, 1 &req={2} ?trans1;
FCHK P0, R0, R7 &wr=0x2 ?trans3;
FFMA R5, R2, R5, R2 ?trans1;
ISETP.GE.AND P1, PT, R4, UR7, PT &req={4} ?trans1;
IMAD R2, R9, UR4, RZ &req={1} ?trans2;
FFMA R6, R0, R5, RZ ?WAIT2_END_GROUP;
SEL R4, R4, RZ, !P1 ?trans2;
FFMA R8, -R7, R6, R0 ?WAIT3_END_GROUP;
IMAD R2, R4, R2, R3 ?trans2;
FFMA R5, R5, R8, R6 ?trans1;
@!P0 BRA 0x210 &req={2,0} ?trans6;
MOV R3, R7 ?trans1;
MOV R6, 0x200 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x580 ?trans5;
MOV R5, R9 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU UR4, c[0x0][0x390] &wr=0x0 ?trans1;
I2FP.F32.U32 R0, R4 ?trans1;
BSSY.RECONVERGENT B0, 0x320 ?trans1;
I2FP.F32.S32 R3, UR4 &req={0} ?WAIT4_END_GROUP;
MUFU.RCP R6, R3 &wr=0x0 ?trans1;
FCHK P0, R0, R3 &wr=0x1 ?trans1;
FFMA R7, -R3, R6, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R7, R6, R7, R6 ?WAIT4_END_GROUP;
FFMA R4, R0, R7, RZ ?WAIT4_END_GROUP;
FFMA R6, -R3, R4, R0 ?WAIT4_END_GROUP;
FFMA R6, R7, R6, R4 ?trans1;
@!P0 BRA 0x310 &req={1} ?trans6;
MOV R6, 0x300 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x580 ?trans5;
MOV R6, R9 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
F2F.F64.F32 R4, R5 &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fdccccccccccccd ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GT.AND P0, PT, R4, UR4, PT &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fdfae147ae147ae ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R6, R6 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GT.AND P1, PT, R6, UR4, PT &req={1} &wr=0x1 ?trans1;
UMOV.64 UR4, 0x3fed70a3d70a3d71 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.LT.AND P0, PT, R4, UR4, P0 &req={0} ?trans1;
UMOV.64 UR4, 0x3fe051eb851eb852 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.LT.AND P1, PT, R6, UR4, P1 &req={1} &wr=0x0 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0x80, 0x8 &req={0} ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC R7, c[0x0][0x388] &wr=0x1 ?trans1;
IMAD.WIDE R2, R2, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R7 &req={1} ?trans1;
EXIT ?trans5;
SHF.R.U32.HI R8, RZ, 0x17, R3 ?trans1;
BSSY.RECONVERGENT B1, 0xbc0 ?trans1;
SHF.R.U32.HI R7, RZ, 0x17, R0 ?trans2;
LOP3.LUT R12, R8, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R10, R7, 0xff, RZ, 0xc0, !PT ?trans2;
IADD3 R9, PT, PT, R12, -0x1, RZ ?trans2;
IADD3 R8, PT, PT, R10, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R9, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R8, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R7, RZ ?trans1;
@!P0 BRA 0x7a0 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0xba0 ?trans5;
LOP3.LUT P0, RZ, R3, 0x7fffffff, R0, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0xb80 ?trans5;
FSETP.NEU.FTZ.AND P2, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P1 BRA !P2, 0xb80 ?trans5;
LOP3.LUT P2, RZ, R0, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P1, P2, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0xb60 ?trans5;
LOP3.LUT P1, RZ, R3, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0xb30 ?trans5;
ISETP.GE.AND P0, PT, R8, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R9, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R7, RZ ?trans1;
@!P0 MOV R7, 0xffffffc0 ?trans1;
@!P0 FFMA R0, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R3, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R7, PT, PT, R7, 0x40, RZ ?WAIT7_END_GROUP;
LEA R8, R12, 0xc0800000, 0x17 ?trans1;
BSSY.RECONVERGENT B2, 0xb20 ?trans3;
IADD3 R8, PT, PT, -R8, R3, RZ ?trans2;
IADD3 R3, PT, PT, R10, -0x7f, RZ ?trans2;
MUFU.RCP R9, R8 &rd=0x0 &wr=0x1 ?trans1;
FADD.FTZ R11, -R8, -RZ ?trans2;
IMAD R0, R3.reuse, -0x800000, R0 ?trans1;
IADD3 R8, PT, PT, R3, 0x7f, -R12 &req={0} ?WAIT4_END_GROUP;
IADD3 R8, PT, PT, R8, R7, RZ ?trans1;
FFMA R10, R9, R11, 1 &req={1} ?WAIT4_END_GROUP;
FFMA R14, R9, R10, R9 ?WAIT4_END_GROUP;
FFMA R9, R0, R14, RZ ?WAIT4_END_GROUP;
FFMA R10, R11, R9, R0 ?WAIT4_END_GROUP;
FFMA R13, R14, R10, R9 ?WAIT4_END_GROUP;
FFMA R10, R11, R13, R0 ?WAIT4_END_GROUP;
FFMA R9, R14, R10, R13 ?WAIT5_END_GROUP;
SHF.R.U32.HI R0, RZ, 0x17, R9 ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R11, PT, PT, R0, R8, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R11, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xb00 ?trans5;
ISETP.GT.AND P0, PT, R11, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0xad0 ?trans5;
ISETP.GE.AND P0, PT, R11, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0xb10 ?trans5;
ISETP.GE.AND P0, PT, R11, -0x18, PT ?trans1;
LOP3.LUT R9, R9, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0xb10 ?trans5;
FFMA.RZ R0, R14.reuse, R10.reuse, R13.reuse ?trans1;
IADD3 R8, PT, PT, R11.reuse, 0x20, RZ ?trans1;
FFMA.RM R3, R14, R10, R13 ?trans1;
ISETP.NE.AND P1, PT, R11.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R11, RZ, PT ?trans1;
LOP3.LUT R0, R0, 0x7fffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R7, R0, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R0, R14, R10, R13 ?trans1;
IADD3 R10, PT, PT, -R11, RZ, RZ ?trans2;
SHF.L.U32 R8, R7, R8, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R0, R3, PT ?trans1;
SEL R0, R10, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R8, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R0, RZ, R0, R7 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R8, RZ, 0x1, R0 ?WAIT3_END_GROUP;
SEL R3, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R3, R3, 0x1, R8, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, R0, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R8, PT, PT, R8, R3, RZ ?WAIT4_END_GROUP;
LOP3.LUT R9, R8, R9, RZ, 0xfc, !PT ?trans1;
BRA 0xb10 ?trans6;
LOP3.LUT R9, R9, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R9, R9, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0xb10 ?trans6;
IMAD R9, R8, 0x800000, R9 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
BRA 0xbb0 ?trans5;
LOP3.LUT R0, R3, 0x80000000, R0, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R9, R0, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0xbb0 ?trans6;
LOP3.LUT R9, R3, 0x80000000, R0, 0x48, !PT ?trans1;
BRA 0xbb0 ?trans6;
MUFU.RSQ R9, -QNAN &wr=0x0 ?trans1;
BRA 0xbb0 ?trans5;
FADD.FTZ R9, R0, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
HFMA2 R7, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R6 0x0 &req={0} ?trans5;
BRA 0xbe0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: DrawSquare(float*, float, int, int)
_Z10DrawSquarePffii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x8
v_and_b32_e32 v1, 0x3ff, v0
s_add_u32 s8, s0, 24
s_addc_u32 s9, s1, 0
s_mov_b32 s10, 0xcccccccd
s_mov_b32 s11, 0x3fdccccc
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, s14, s2, v[1:2]
s_mov_b32 s2, 0xd70a3d71
s_mov_b32 s3, 0x3fed70a3
v_cmp_gt_i32_e32 vcc_lo, s5, v2
v_cndmask_b32_e32 v1, 0, v2, vcc_lo
v_cvt_f32_i32_e32 v2, s5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f32_i32_e32 v3, v1
v_div_scale_f32 v4, null, v2, v2, v3
v_div_scale_f32 v7, vcc_lo, v3, v2, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f32_e32 v5, v4
s_waitcnt_depctr 0xfff
v_fma_f32 v6, -v4, v5, 1.0
v_fmac_f32_e32 v5, v6, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v6, v7, v5
v_fma_f32 v8, -v4, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v6, v8, v5
v_fma_f32 v4, -v4, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fmas_f32 v4, v4, v5, v6
v_div_fixup_f32 v2, v4, v2, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f64_f32_e32 v[2:3], v2
v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[2:3]
v_cmp_lt_f64_e64 s2, s[10:11], v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, vcc_lo, s2
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB0_3
s_load_b32 s2, s[8:9], 0xc
v_bfe_u32 v0, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s2, s2, 16
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
s_mov_b32 s2, 0x851eb852
s_mov_b32 s3, 0x3fe051eb
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_cmp_gt_i32_e32 vcc_lo, s6, v2
v_cndmask_b32_e32 v0, 0, v2, vcc_lo
v_cvt_f32_i32_e32 v2, s6
s_mov_b32 s6, 0x7ae147ae
s_mov_b32 s7, 0x3fdfae14
v_cvt_f32_i32_e32 v3, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_div_scale_f32 v4, null, v2, v2, v3
v_div_scale_f32 v7, vcc_lo, v3, v2, v3
v_rcp_f32_e32 v5, v4
s_waitcnt_depctr 0xfff
v_fma_f32 v6, -v4, v5, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v5, v6, v5
v_mul_f32_e32 v6, v7, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v8, -v4, v6, v7
v_fmac_f32_e32 v6, v8, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v4, -v4, v6, v7
v_div_fmas_f32 v4, v4, v5, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fixup_f32 v2, v4, v2, v3
v_cvt_f64_f32_e32 v[2:3], v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[2:3]
v_cmp_lt_f64_e64 s2, s[6:7], v[2:3]
s_and_b32 s2, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 exec_lo, exec_lo, s2
s_cbranch_execz .LBB0_3
s_load_b32 s2, s[8:9], 0x0
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_cmp_lt_u32 s14, s2
v_mul_lo_u32 v0, s2, v0
s_cselect_b32 s3, 12, 18
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_mov_b32_e32 v2, s3
global_load_u16 v4, v2, s[8:9]
s_waitcnt vmcnt(0)
v_mad_u64_u32 v[2:3], null, v0, v4, v[1:2]
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[0:1], 2, v[2:3]
v_mov_b32_e32 v2, s4
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| DrawSquare | 4,247 | 2,151 | stackv2-00000-of-00015 |
// Demangled: Jacobi(float*, float*, float*, float*, int, int)
Function : _Z6JacobiPfS_S_S_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_TID.X &wr=0x1 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x3a0] &wr=0x2 ?trans1;
S2R R3, SR_TID.Y &wr=0x3 ?trans6;
LDC R5, c[0x0][0x360] &wr=0x1 ?trans8;
S2UR UR7, SR_CTAID.Y &wr=0x3 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, -0x2, URZ &req={2} ?WAIT7_END_GROUP;
LDC R0, c[0x0][0x364] &wr=0x3 ?trans1;
IMAD R2, R5, UR6, R2 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R2, UR4, PT ?trans1;
UIADD3 UR4, UPT, UPT, UR5, -0x2, URZ ?WAIT4_END_GROUP;
ISETP.LT.OR P0, PT, R2, 0x2, P0 ?trans1;
IMAD R3, R0, UR7, R3 &req={3} ?WAIT5_END_GROUP;
ISETP.LT.U32.OR P0, PT, R3, 0x2, P0 ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R3, UR4, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU UR4, c[0x0][0x370] &wr=0x0 ?trans1;
LDC.64 R6, c[0x0][0x390] &wr=0x1 ?trans1;
IMAD R4, R5, UR4, RZ &req={0} ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans3;
IMAD R0, R3.reuse, R4.reuse, R2 ?trans2;
IMAD R3, R3, R4, R4 ?WAIT3_END_GROUP;
IADD3 R17, PT, PT, R0, 0x1, RZ ?trans2;
IADD3 R5, PT, PT, R3, -R4, -R4 ?trans2;
IADD3 R13, PT, PT, R2.reuse, R3, RZ ?trans2;
SHF.L.U32 R11, R17, 0x2, RZ ?trans2;
IADD3 R15, PT, PT, R2, R5, RZ ?trans2;
SHF.L.U32 R3, R13, 0x2, RZ ?trans1;
IMAD.WIDE R10, R11, 0x4, R6 &req={1} ?trans1;
LDC.64 R4, c[0x0][0x380] &wr=0x1 ?trans1;
SHF.L.U32 R9, R15, 0x2, RZ ?WAIT3_END_GROUP;
LDG.E R2, desc[UR4][R10.64] &req={0} &wr=0x2 ?trans2;
IMAD.WIDE R8, R9, 0x4, R6.reuse ?trans2;
LDG.E R12, desc[UR4][R10.64+-0x20] &wr=0x3 ?trans2;
IMAD.WIDE R6, R3, 0x4, R6 ?trans2;
LDG.E R8, desc[UR4][R8.64] &wr=0x4 ?trans4;
LDG.E R6, desc[UR4][R6.64] &wr=0x5 ?trans1;
IADD3 R19, PT, PT, R0, -0x1, RZ ?trans1;
FSETP.GT.AND P0, PT, R2, RZ, PT &req={2} ?WAIT2_END_GROUP;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
FSETP.GT.AND P1, PT, R12, RZ, PT &req={3} ?trans2;
SEL R11, R0, R17, P0 ?trans1;
FSETP.GT.AND P0, PT, R8, RZ, PT &req={4} ?trans2;
SEL R19, R0, R19, P1 ?trans2;
IMAD.WIDE R10, R11, 0x4, R4 &req={1} ?trans1;
FSETP.GT.AND P1, PT, R6, RZ, PT &req={5} ?trans1;
SEL R7, R0, R15, P0 ?WAIT2_END_GROUP;
IMAD.WIDE R8, R19, 0x4, R4.reuse ?trans2;
LDG.E R10, desc[UR4][R10.64] &wr=0x2 ?trans1;
SEL R13, R0.reuse, R13, P1 ?trans1;
IMAD.WIDE R6, R7, 0x4, R4.reuse ?trans2;
LDG.E R9, desc[UR4][R8.64] &wr=0x2 ?trans2;
IMAD.WIDE R4, R13, 0x4, R4 ?trans2;
LDG.E R6, desc[UR4][R6.64] &wr=0x3 ?trans1;
LDC.64 R12, c[0x0][0x398] &wr=0x1 ?trans1;
IMAD.WIDE R2, R0, 0x4, R2 &req={0} ?WAIT2_END_GROUP;
LDG.E R4, desc[UR4][R4.64] &wr=0x4 ?trans4;
LDG.E R2, desc[UR4][R2.64] &wr=0x5 ?trans1;
FADD R15, R10, R9 &req={2} ?trans1;
IMAD.WIDE R8, R0, 0x4, R12 &req={1} ?WAIT4_END_GROUP;
FADD R15, R6, R15 &req={3} ?WAIT4_END_GROUP;
FADD R15, R4, R15 &req={4} ?WAIT4_END_GROUP;
FADD R15, -R2, R15 &req={5} ?WAIT4_END_GROUP;
FMUL R15, R15, 0.25 ?WAIT5_END_GROUP;
STG.E desc[UR4][R8.64], R15 ?trans1;
EXIT ?trans5;
BRA 0x430;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: Jacobi(float*, float*, float*, float*, int, int)
_Z6JacobiPfS_S_S_ii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x34
s_load_b64 s[2:3], s[0:1], 0x20
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_add_u32 s6, s0, 40
s_addc_u32 s7, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s8, s4, 0xffff
s_lshr_b32 s5, s4, 16
v_mad_u64_u32 v[0:1], null, s14, s8, v[2:3]
v_mad_u64_u32 v[1:2], null, s15, s5, v[3:4]
s_add_i32 s2, s2, -2
s_add_i32 s3, s3, -2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_cmp_gt_i32_e32 vcc_lo, s2, v0
v_cmp_lt_i32_e64 s4, 1, v0
v_cmp_lt_i32_e64 s2, 1, v1
v_cmp_gt_i32_e64 s3, s3, v1
s_delay_alu instid0(VALU_DEP_2)
s_and_b32 s2, vcc_lo, s2
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
s_and_b32 s2, s2, s3
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, s4, s2
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB20_2
s_load_b32 s2, s[6:7], 0x0
s_waitcnt lgkmcnt(0)
s_cmp_lt_u32 s14, s2
v_mul_lo_u32 v9, v1, s2
s_cselect_b32 s3, 12, 18
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_mov_b32_e32 v2, s3
global_load_u16 v6, v2, s[6:7]
s_waitcnt vmcnt(0)
v_mul_lo_u32 v2, s2, v6
s_load_b256 s[0:7], s[0:1], 0x0
v_mad_u64_u32 v[3:4], null, v2, v1, v[2:3]
v_mad_u64_u32 v[4:5], null, v9, v6, v[0:1]
v_lshlrev_b32_e32 v1, 1, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_sub_nc_u32_e32 v1, v3, v1
v_add_nc_u32_e32 v11, 1, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v13, v1, v0
v_add_nc_u32_e32 v10, v3, v0
v_lshlrev_b32_e32 v3, 2, v11
v_add_nc_u32_e32 v12, -1, v4
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_lshlrev_b32_e32 v7, 2, v13
v_lshlrev_b32_e32 v1, 2, v10
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_ashrrev_i32_e32 v4, 31, v3
v_lshlrev_b32_e32 v5, 2, v12
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_ashrrev_i32_e32 v8, 31, v7
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[3:4], 2, v[3:4]
v_ashrrev_i32_e32 v6, 31, v5
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[7:8], 2, v[7:8]
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[5:6], 2, v[5:6]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v1, vcc_lo, s4, v1
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
v_add_co_u32 v3, vcc_lo, s4, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
global_load_b32 v14, v[1:2], off
v_add_co_u32 v1, vcc_lo, s4, v7
v_add_co_ci_u32_e32 v2, vcc_lo, s5, v8, vcc_lo
v_add_co_u32 v5, vcc_lo, s4, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
s_clause 0x2
global_load_b32 v4, v[3:4], off
global_load_b32 v7, v[1:2], off
global_load_b32 v6, v[5:6], off
v_mad_u64_u32 v[1:2], null, v9, s8, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
s_waitcnt vmcnt(3)
v_cmp_lt_f32_e32 vcc_lo, 0, v14
v_cndmask_b32_e32 v3, v10, v1, vcc_lo
s_waitcnt vmcnt(2)
v_cmp_lt_f32_e32 vcc_lo, 0, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v4, 31, v3
v_cndmask_b32_e32 v5, v11, v1, vcc_lo
s_waitcnt vmcnt(1)
v_cmp_lt_f32_e32 vcc_lo, 0, v7
v_lshlrev_b64 v[3:4], 2, v[3:4]
v_cndmask_b32_e32 v7, v13, v1, vcc_lo
s_waitcnt vmcnt(0)
v_cmp_lt_f32_e32 vcc_lo, 0, v6
v_ashrrev_i32_e32 v6, 31, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v8, 31, v7
v_cndmask_b32_e32 v9, v12, v1, vcc_lo
v_lshlrev_b64 v[5:6], 2, v[5:6]
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[7:8], 2, v[7:8]
v_ashrrev_i32_e32 v10, 31, v9
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_co_u32 v5, vcc_lo, s0, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
v_lshlrev_b64 v[9:10], 2, v[9:10]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v9, vcc_lo, s0, v9
v_add_co_ci_u32_e32 v10, vcc_lo, s1, v10, vcc_lo
v_add_co_u32 v7, vcc_lo, s0, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
s_clause 0x1
global_load_b32 v5, v[5:6], off
global_load_b32 v6, v[9:10], off
v_add_co_u32 v3, vcc_lo, s0, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
s_clause 0x1
global_load_b32 v7, v[7:8], off
global_load_b32 v4, v[3:4], off
v_add_co_u32 v2, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(3)
v_add_f32_e32 v3, v5, v6
s_waitcnt vmcnt(2)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_f32_e32 v3, v7, v3
s_waitcnt vmcnt(1)
v_add_f32_e32 v3, v4, v3
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_f32_e32 v2, v3, v2
v_mul_f32_e32 v2, 0x3e800000, v2
global_store_b32 v[0:1], v2, off
.LBB20_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| Jacobi | 1,738 | 2,934 | stackv2-00000-of-00015 |
// Demangled: MakeColor(float*, int*, int, int)
Function : _Z9MakeColorPfPiii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R0, SR_TID.X &wr=0x0 ?trans7;
LDC R7, c[0x0][0x360] &wr=0x0 ?trans1;
LDCU.64 UR8, c[0x0][0x390] &wr=0x1 ?trans1;
S2R R4, SR_TID.Y &wr=0x2 ?trans6;
S2UR UR4, SR_CTAID.X &wr=0x0 ?trans8;
S2UR UR5, SR_CTAID.Y &wr=0x2 ?trans8;
LDC R5, c[0x0][0x364] &wr=0x2 ?trans1;
LDCU UR6, c[0x0][0x370] &wr=0x3 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x4 ?trans1;
IMAD R0, R7, UR4, R0 &req={0} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR8, PT &req={1} ?WAIT5_END_GROUP;
SEL R0, R0, RZ, !P0 ?trans1;
IMAD R4, R5, UR5, R4 &req={2} ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans4;
ISETP.GE.AND P1, PT, R4, UR9, PT ?WAIT5_END_GROUP;
SEL R5, R4, RZ, !P1 ?trans1;
IMAD R4, R7, UR6, RZ &req={3} ?WAIT4_END_GROUP;
IMAD R7, R5, R4, R0 ?trans2;
LDC.64 R4, c[0x0][0x388] &wr=0x1 ?trans2;
IMAD.WIDE R2, R7, 0x4, R2 &req={4} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={0} &wr=0x2 ?trans1;
IMAD.WIDE R4, R7, 0x4, R4 &req={1} ?WAIT4_END_GROUP;
FMUL R0, R2, 255 &req={2} ?WAIT6_END_GROUP;
F2I.TRUNC.NTZ R0, R0 &wr=0x0 ?trans2;
VIMNMX.S32 R6, RZ, R0, !PT &req={0} ?WAIT5_END_GROUP;
VIMNMX.S32 R6, R6, 0xff, PT ?WAIT5_END_GROUP;
IMAD R6, R6, 0x10101, RZ ?WAIT5_END_GROUP;
LOP3.LUT R7, R6, 0xff000000, RZ, 0xfc, !PT ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R7 ?trans1;
EXIT ?trans5;
BRA 0x1f0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: MakeColor(float*, float*, float*, float*, float*, int, int)
_Z9MakeColorPfS_S_S_S_ii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x3c
s_load_b32 s5, s[0:1], 0x30
s_add_u32 s2, s0, 48
s_addc_u32 s3, s1, 0
s_load_b128 s[8:11], s[0:1], 0x20
s_waitcnt lgkmcnt(0)
s_lshr_b32 s6, s4, 16
s_and_b32 s4, s4, 0xffff
s_cmp_lt_u32 s14, s5
s_cselect_b32 s7, 12, 18
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_mov_b32_e32 v1, s7
global_load_u16 v5, v1, s[2:3]
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
v_mad_u64_u32 v[2:3], null, s14, s4, v[1:2]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[3:4], null, s15, s6, v[0:1]
v_cmp_gt_i32_e32 vcc_lo, s10, v2
v_cndmask_b32_e32 v0, 0, v2, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_cmp_gt_i32_e32 vcc_lo, s11, v3
v_cndmask_b32_e32 v2, 0, v3, vcc_lo
s_waitcnt vmcnt(0)
v_mul_lo_u32 v1, s5, v5
s_load_b256 s[0:7], s[0:1], 0x0
v_mad_u64_u32 v[4:5], null, v1, v2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v5, 31, v4
v_lshlrev_b64 v[0:1], 2, v[4:5]
v_lshlrev_b32_e32 v4, 2, v4
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v2, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
v_add_co_u32 v5, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v6, vcc_lo, s3, v1, vcc_lo
v_add_co_u32 v7, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v8, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v9, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v10, vcc_lo, s7, v1, vcc_lo
global_load_b32 v2, v[2:3], off
global_load_b32 v1, v[5:6], off
global_load_b32 v0, v[7:8], off
global_load_b32 v3, v[9:10], off
v_ashrrev_i32_e32 v5, 31, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[4:5], 2, v[4:5]
v_add_co_u32 v4, vcc_lo, s8, v4
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s9, v5, vcc_lo
s_waitcnt vmcnt(0)
global_store_b128 v[4:5], v[0:3], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| MakeColor | 813 | 1,160 | stackv2-00000-of-00015 |
// Demangled: MakeSource(int*, float*, int, int)
Function : _Z10MakeSourcePiPfii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
LDC R7, c[0x0][0x360] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x390] &wr=0x2 ?trans1;
S2R R3, SR_TID.Y &wr=0x3 ?trans6;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
S2UR UR5, SR_CTAID.Y &wr=0x3 ?trans8;
LDC R2, c[0x0][0x364] &wr=0x3 ?trans1;
LDCU UR8, c[0x0][0x370] &wr=0x4 ?trans7;
LDC.64 R4, c[0x0][0x380] &wr=0x5 ?trans1;
IMAD R0, R7, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR6, PT &req={2} ?trans1;
IMAD R3, R2, UR5, R3 &req={3} ?WAIT4_END_GROUP;
SEL R2, R0, RZ, !P0 ?trans1;
IMAD R0, R7, UR8, RZ &req={4} ?trans1;
ISETP.GE.AND P1, PT, R3.reuse, UR7, PT ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans4;
SEL R3, R3, RZ, !P1 ?WAIT5_END_GROUP;
IMAD R2, R3, R0, R2 ?WAIT4_END_GROUP;
IMAD.WIDE R4, R2, 0x4, R4 &req={5} ?WAIT5_END_GROUP;
LDG.E.U8 R0, desc[UR6][R4.64+0x2] &req={1} &wr=0x2 ?trans1;
UMOV UR5, 0x3b808081 ?trans1;
UMOV UR4, 0x437f0000 ?trans1;
BSSY.RECONVERGENT B1, 0x230 ?trans1;
UFFMA UR4, UR5, -UR4, 1 ?WAIT4_END_GROUP;
UFFMA UR4, UR4, UR5, 0.0039215688593685626984 ?trans1;
I2FP.F32.U32 R0, R0 &req={2} ?WAIT4_END_GROUP;
FCHK P0, R0, 255 &wr=0x1 ?trans1;
FFMA R3, R0, UR4, RZ ?WAIT4_END_GROUP;
FFMA R6, R3, -255, R0 ?WAIT4_END_GROUP;
FFMA R7, R6, UR4, R3 ?trans1;
@!P0 BRA 0x220 &req={1,0} ?trans6;
MOV R4, 0x220 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x270 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans2;
IMAD.WIDE R2, R2, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R7 ?trans1;
EXIT ?trans5;
SHF.R.U32.HI R3, RZ, 0x17, R0 ?trans1;
BSSY.RECONVERGENT B0, 0x850 ?trans4;
BSSY.RELIABLE B2, 0x440 ?trans1;
MOV R5, R0 ?trans1;
LOP3.LUT R3, R3, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R7, PT, PT, R3, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R7, 0xfd, !PT ?WAIT13_END_GROUP;
@!P0 MOV R6, RZ ?trans1;
@!P0 BRA 0x430 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P0 BREAK.RELIABLE B2 ?trans5;
@P0 BRA 0x830 ?trans5;
HFMA2 R6, -RZ, RZ, 3.748046875, 0 ?WAIT5_END_GROUP;
LOP3.LUT P0, RZ, R6, 0x7fffffff, R5, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BREAK.RELIABLE B2 ?trans5;
@!P0 BRA 0x810 ?trans5;
LOP3.LUT P0, RZ, R5, 0x7fffffff, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 BREAK.RELIABLE B2 ?trans5;
@!P0 BRA 0x7f0 ?trans5;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?trans1;
LOP3.LUT P1, RZ, R6, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BREAK.RELIABLE B2 ?trans5;
@P0 BRA 0x7c0 ?trans5;
ISETP.GE.AND P0, PT, R7, RZ, PT ?WAIT13_END_GROUP;
@P0 MOV R6, RZ ?trans1;
@!P0 FFMA R5, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P0 MOV R6, 0xffffffc0 ?WAIT7_END_GROUP;
BSYNC.RELIABLE B2 ?trans5;
UMOV UR4, 0x437f0000 ?trans1;
IADD3 R3, PT, PT, R3, -0x7f, RZ ?trans1;
UIADD3 UR4, UPT, UPT, UR4, -0x3800000, URZ ?trans1;
BSSY.RECONVERGENT B2, 0x7b0 ?trans3;
IMAD R0, R3, -0x800000, R5 ?trans1;
IADD3 R6, PT, PT, R6, -0x7, R3 ?trans1;
FADD.FTZ R9, -RZ, -UR4 ?WAIT3_END_GROUP;
MUFU.RCP R7, UR4 &wr=0x0 ?trans2;
FFMA R8, R7, R9, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R7, R7, R8, R7 ?WAIT4_END_GROUP;
FFMA R8, R0, R7, RZ ?WAIT4_END_GROUP;
FFMA R5, R9, R8, R0 ?WAIT4_END_GROUP;
FFMA R8, R7, R5, R8 ?WAIT4_END_GROUP;
FFMA R9, R9, R8, R0 ?WAIT4_END_GROUP;
FFMA R5, R7, R9, R8 ?WAIT5_END_GROUP;
SHF.R.U32.HI R0, RZ, 0x17, R5 ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R10, PT, PT, R0, R6, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R10, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x790 ?trans5;
ISETP.GT.AND P0, PT, R10, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x760 ?trans5;
ISETP.GE.AND P0, PT, R10, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x7a0 ?trans5;
ISETP.GE.AND P0, PT, R10, -0x18, PT ?trans1;
LOP3.LUT R5, R5, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x7a0 ?trans5;
FFMA.RZ R0, R7, R9, R8 ?trans1;
IADD3 R6, PT, PT, R10.reuse, 0x20, RZ ?trans1;
ISETP.NE.AND P1, PT, R10.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R10, RZ, PT ?trans2;
LOP3.LUT R0, R0, 0x7fffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R0, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R0, R7.reuse, R9.reuse, R8.reuse ?trans1;
FFMA.RM R7, R7, R9, R8 ?trans1;
IADD3 R8, PT, PT, -R10, RZ, RZ ?trans2;
SHF.L.U32 R6, R3, R6, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R0, R7, PT ?trans1;
SEL R0, R8, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R6, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R0, RZ, R0, R3 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R6, RZ, 0x1, R0 ?WAIT3_END_GROUP;
SEL R3, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R3, R3, 0x1, R6, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, R0, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R6, PT, PT, R6, R3, RZ ?WAIT4_END_GROUP;
LOP3.LUT R5, R6, R5, RZ, 0xfc, !PT ?trans1;
BRA 0x7a0 ?trans6;
LOP3.LUT R5, R5, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R5, R5, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x7a0 ?trans6;
IMAD R5, R6, 0x800000, R5 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
BRA 0x840 ?trans5;
LOP3.LUT R5, R6, 0x80000000, R5, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R5, R5, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x840 ?trans6;
LOP3.LUT R5, R6, 0x80000000, R5, 0x48, !PT ?trans1;
BRA 0x840 ?trans6;
MUFU.RSQ R5, -QNAN &wr=0x0 ?trans1;
BRA 0x840 ?trans5;
FADD.FTZ R5, R0, 255 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
MOV R7, R5 &req={0} ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R4 0x0 ?trans5;
BRA 0x880;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: MakeSource(int*, int*, int, int)
_Z10MakeSourcePiS_ii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s5, s[0:1], 0x18
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s6, s4, 16
s_and_b32 s4, s4, 0xffff
s_cmp_lt_u32 s14, s5
s_cselect_b32 s7, 12, 18
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_mov_b32_e32 v1, s7
global_load_u16 v5, v1, s[2:3]
s_load_b64 s[2:3], s[0:1], 0x10
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
v_mad_u64_u32 v[2:3], null, s14, s4, v[1:2]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[3:4], null, s15, s6, v[0:1]
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, s2, v2
v_cndmask_b32_e32 v0, 0, v2, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_cmp_gt_i32_e32 vcc_lo, s3, v3
s_load_b128 s[0:3], s[0:1], 0x0
v_cndmask_b32_e32 v3, 0, v3, vcc_lo
s_waitcnt vmcnt(0)
v_mul_lo_u32 v4, s5, v5
v_mad_u64_u32 v[1:2], null, v4, v3, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_and_b32_e32 v2, 1, v2
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| MakeSource | 700 | 878 | stackv2-00000-of-00015 |
// Demangled: MapArray(float*, float, int, int)
Function : _Z8MapArrayPffii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R0, SR_TID.X &wr=0x0 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x0 ?trans1;
LDCU.64 UR8, c[0x0][0x388] &wr=0x1 ?trans1;
S2R R4, SR_TID.Y &wr=0x2 ?trans1;
LDCU UR7, c[0x0][0x390] &wr=0x3 ?trans5;
LDC R7, c[0x0][0x360] &wr=0x0 ?trans8;
S2UR UR5, SR_CTAID.Y &wr=0x2 ?trans8;
LDC R5, c[0x0][0x364] &wr=0x2 ?trans1;
LDCU UR6, c[0x0][0x370] &wr=0x4 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x5 ?trans1;
IMAD R0, R7, UR4, R0 &req={0} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR9, PT &req={1} ?WAIT5_END_GROUP;
SEL R0, R0, RZ, !P0 ?trans1;
IMAD R4, R5, UR5, R4 &req={2} ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans3;
I2FP.F32.S32 R6, R0 ?trans1;
ISETP.GE.AND P1, PT, R4, UR7, PT &req={3} ?WAIT5_END_GROUP;
SEL R5, R4, RZ, !P1 ?trans1;
IMAD R4, R7, UR6, RZ &req={4} ?trans2;
FMUL R7, R6, UR8 ?trans2;
IMAD R5, R5, R4, R0 ?WAIT4_END_GROUP;
IMAD.WIDE R2, R5, 0x4, R2 &req={5} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R7 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x190;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: MapArray(float*, float, int, int)
_Z8MapArrayPffii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x18
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s9, s4, 16
s_and_b32 s10, s4, 0xffff
s_cmp_lt_u32 s14, s8
s_cselect_b32 s4, 12, 18
s_delay_alu instid0(SALU_CYCLE_1)
v_mov_b32_e32 v1, s4
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x8
s_load_b64 s[0:1], s[0:1], 0x0
global_load_u16 v5, v1, s[2:3]
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[2:3], null, s14, s10, v[1:2]
v_mad_u64_u32 v[3:4], null, s15, s9, v[0:1]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_cmp_gt_i32_e32 vcc_lo, s5, v2
v_cndmask_b32_e32 v0, 0, v2, vcc_lo
v_cmp_gt_i32_e32 vcc_lo, s6, v3
v_cndmask_b32_e32 v3, 0, v3, vcc_lo
s_waitcnt vmcnt(0)
v_mul_lo_u32 v4, s8, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[1:2], null, v4, v3, v[0:1]
v_cvt_f32_i32_e32 v3, v0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_mul_f32_e32 v2, s4, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| MapArray | 645 | 835 | stackv2-00000-of-00015 |
// Demangled: SetBoundary(int, float*, float*, int, int)
Function : _Z11SetBoundaryiPfS_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.Y &wr=0x1 ?trans7;
LDC R6, c[0x0][0x360] &wr=0x2 ?trans1;
S2R R7, SR_TID.X &wr=0x2 ?trans7;
S2UR UR5, SR_CTAID.Y &wr=0x1 ?trans8;
LDC R5, c[0x0][0x364] &wr=0x1 ?trans8;
S2UR UR4, SR_CTAID.X &wr=0x2 ?trans8;
LDC.64 R2, c[0x0][0x398] &wr=0x3 ?trans8;
LDC R9, c[0x0][0x370] &wr=0x4 ?trans1;
IMAD R0, R5, UR5, R0 &req={1} ?WAIT2_END_GROUP;
IMAD R7, R6, UR4, R7 &req={2} ?WAIT5_END_GROUP;
LDC.64 R4, c[0x0][0x390] &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans1;
ISETP.GE.AND P1, PT, R0, R3, PT &req={3} ?trans1;
ISETP.GE.AND P0, PT, R7, R2, PT ?WAIT4_END_GROUP;
SEL R10, R0, RZ, !P1 ?trans1;
SEL R12, R7, RZ, !P0 ?trans1;
IMAD R9, R6, R9, RZ &req={4} ?WAIT4_END_GROUP;
IMAD R19, R10, R9, RZ ?WAIT5_END_GROUP;
IADD3 R0, PT, PT, R12, R19, RZ ?WAIT4_END_GROUP;
SHF.L.U32 R7, R0, 0x2, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R4, R7, 0x4, R4 &req={1} ?trans2;
LDC.64 R6, c[0x0][0x388] &wr=0x1 ?trans4;
LDG.E R4, desc[UR4][R4.64] &req={2} &wr=0x2 ?trans1;
ISETP.NE.AND P0, PT, R0, RZ, PT ?trans1;
ISETP.NE.AND P5, PT, R12, RZ, PT ?trans1;
IADD3 R8, PT, PT, R3, -0x1, RZ ?trans2;
IADD3 R13, PT, PT, R2, -0x1, RZ ?trans1;
ISETP.NE.AND P3, PT, R10.reuse, RZ, PT ?trans1;
BSSY.RECONVERGENT B0, 0x2c0 ?trans1;
ISETP.NE.AND P1, PT, R10, R8, PT ?WAIT2_END_GROUP;
ISETP.NE.AND P4, PT, R12, R13, PT ?WAIT4_END_GROUP;
@!P0 LDC.64 R10, c[0x0][0x388] &wr=0x3 ?trans1;
@!P0 IMAD.WIDE R14, R9, 0x4, R6 &req={1} ?trans1;
FSETP.GT.AND P2, PT, R4, RZ, PT &req={2} ?WAIT3_END_GROUP;
IMAD.WIDE R4, R0, 0x4, R6 ?WAIT10_END_GROUP;
@!P2 BRA P5, 0x2b0 &req={3,0} ?trans5;
IMAD.WIDE R16, R19, 0x4, R6 ?trans1;
LDC R18, c[0x0][0x380] &wr=0x0 ?trans5;
LDG.E R16, desc[UR4][R16.64+0x4] &wr=0x2 ?trans1;
ISETP.NE.AND P5, PT, R18, 0x1, PT &req={0} ?trans1;
FADD R21, -R16, -RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R21 &rd=0x0 ?trans7;
BSYNC.RECONVERGENT B0 ?trans5;
BSSY.RECONVERGENT B0, 0x360 ?trans4;
@!P2 BRA P4, 0x350 ?trans5;
IADD3 R17, PT, PT, R19, -0x2, R2 ?trans1;
LDC R18, c[0x0][0x380] &wr=0x1 ?trans4;
IMAD.WIDE R16, R17, 0x4, R6 ?WAIT6_END_GROUP;
LDG.E R16, desc[UR4][R16.64] &wr=0x2 ?trans1;
ISETP.NE.AND P4, PT, R18, 0x1, PT &req={1} ?trans1;
FADD R19, -R16, -RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R19 &rd=0x1 ?trans7;
BSYNC.RECONVERGENT B0 ?trans5;
BSSY.RECONVERGENT B0, 0x400 ?trans4;
@!P2 BRA P3, 0x3f0 ?trans5;
IADD3 R17, PT, PT, R12, R9, RZ ?trans1;
LDC R18, c[0x0][0x380] &wr=0x2 ?trans4;
IMAD.WIDE R16, R17, 0x4, R6 ?WAIT6_END_GROUP;
LDG.E R16, desc[UR4][R16.64] &wr=0x3 ?trans1;
ISETP.NE.AND P3, PT, R18, 0x2, PT &req={2} ?trans1;
FADD R19, -R16, -RZ &req={3,1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R19 &rd=0x2 ?trans7;
BSYNC.RECONVERGENT B0 ?trans5;
BSSY.RECONVERGENT B0, 0x4b0 ?trans4;
@!P2 BRA P1, 0x4a0 ?trans5;
IADD3 R16, PT, PT, R3, -0x2, RZ ?WAIT5_END_GROUP;
IMAD R17, R9, R16, R12 ?trans2;
LDC R12, c[0x0][0x380] &wr=0x3 ?trans2;
IMAD.WIDE R16, R17, 0x4, R6 ?WAIT6_END_GROUP;
LDG.E R16, desc[UR4][R16.64] &wr=0x4 ?trans1;
ISETP.NE.AND P1, PT, R12, 0x2, PT &req={3} ?trans1;
FADD R19, -R16, -RZ &req={4,2,1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R19 &rd=0x3 ?trans7;
BSYNC.RECONVERGENT B0 ?trans5;
@!P0 LDG.E R15, desc[UR4][R14.64] &wr=0x4 ?trans4;
@!P0 LDG.E R12, desc[UR4][R10.64+0x4] &wr=0x4 ?trans1;
IMAD R17, R2, R3, -R2 ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R0, R17, PT ?WAIT13_END_GROUP;
@!P1 IMAD R16, R9, R8, RZ ?WAIT5_END_GROUP;
@!P1 IADD3 R19, PT, PT, -R9, R16, RZ &req={3,2,1} ?trans1;
@!P1 IMAD.WIDE R16, R16, 0x4, R6 ?WAIT4_END_GROUP;
@!P1 IMAD.WIDE R18, R19, 0x4, R6 ?WAIT4_END_GROUP;
@!P0 FADD R12, R12, R15 &req={4} ?WAIT4_END_GROUP;
@!P0 FMUL R21, R12, 0.5 &req={0} ?WAIT5_END_GROUP;
@!P0 STG.E desc[UR4][R10.64], R21 &rd=0x0 ?trans4;
@!P1 LDG.E R16, desc[UR4][R16.64+0x4] &wr=0x2 ?trans4;
@!P1 LDG.E R19, desc[UR4][R18.64] &wr=0x2 ?trans1;
IMAD R15, R2, R3, -0x1 ?trans1;
ISETP.NE.AND P0, PT, R0.reuse, R13, PT ?trans1;
BSSY.RECONVERGENT B0, 0x690 ?trans3;
ISETP.NE.AND P2, PT, R0, R15, PT ?trans1;
@!P1 FADD R3, R16, R19 &req={2} ?WAIT4_END_GROUP;
@!P1 FMUL R3, R3, 0.5 ?WAIT5_END_GROUP;
@!P1 STG.E desc[UR4][R4.64], R3 &rd=0x0 ?trans1;
@P0 BRA 0x680 ?trans5;
IADD3 R15, PT, PT, R9, R0, RZ ?trans1;
IMAD.WIDE R10, R2, 0x4, R6 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R14, R15, 0x4, R6 ?trans2;
LDG.E R10, desc[UR4][R10.64+-0x8] &wr=0x2 ?trans4;
LDG.E R15, desc[UR4][R14.64] &wr=0x2 ?trans2;
FADD R0, R10, R15 &req={2} ?WAIT4_END_GROUP;
FMUL R3, R0, 0.5 ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R3 &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
@P2 EXIT ?trans5;
IMAD R2, R9.reuse, R8.reuse, R2 ?trans2;
IMAD R8, R9, R8, -R9 ?WAIT3_END_GROUP;
IADD3 R3, PT, PT, R2, -0x2, RZ &req={1,0} ?trans2;
IADD3 R13, PT, PT, R13, R8, RZ ?WAIT3_END_GROUP;
IMAD.WIDE R2, R3, 0x4, R6 ?WAIT4_END_GROUP;
IMAD.WIDE R6, R13, 0x4, R6 ?trans2;
LDG.E R2, desc[UR4][R2.64] &wr=0x2 ?trans4;
LDG.E R7, desc[UR4][R6.64] &wr=0x2 ?trans2;
FADD R0, R2, R7 &req={2} ?WAIT4_END_GROUP;
FMUL R9, R0, 0.5 ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x760;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: SetBoundary(int, float*, float*, int, int)
_Z11SetBoundaryiPfS_ii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x2c
s_load_b32 s5, s[0:1], 0x20
s_add_u32 s2, s0, 32
s_addc_u32 s3, s1, 0
s_load_b64 s[8:9], s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_lshr_b32 s6, s4, 16
s_and_b32 s4, s4, 0xffff
s_cmp_lt_u32 s14, s5
s_cselect_b32 s7, 12, 18
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_mov_b32_e32 v1, s7
global_load_u16 v6, v1, s[2:3]
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
v_mad_u64_u32 v[2:3], null, s15, s6, v[1:2]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[4:5], null, s14, s4, v[0:1]
s_waitcnt vmcnt(0)
v_readfirstlane_b32 s2, v6
s_mul_i32 s2, s5, s2
s_load_b128 s[4:7], s[0:1], 0x8
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_cmp_gt_i32_e32 vcc_lo, s9, v2
v_cndmask_b32_e32 v5, 0, v2, vcc_lo
v_cmp_gt_i32_e32 vcc_lo, s8, v4
v_cndmask_b32_e32 v2, 0, v4, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_lo_u32 v3, v5, s2
v_cmp_eq_u32_e64 s0, 0, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v0, v3, v2
v_lshlrev_b32_e32 v6, 2, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v7, 31, v6
v_lshlrev_b64 v[6:7], 2, v[6:7]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v6, vcc_lo, s6, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
global_load_b32 v1, v[6:7], off
s_waitcnt vmcnt(0)
v_cmp_lt_f32_e32 vcc_lo, 0, v1
v_ashrrev_i32_e32 v1, 31, v0
s_or_b32 s0, s0, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB1_2
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[3:4]
v_add_co_u32 v6, s0, s4, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e64 v7, s0, s5, v7, s0
global_load_b32 v4, v[6:7], off offset:4
v_lshlrev_b64 v[6:7], 2, v[0:1]
v_add_co_u32 v6, s0, s4, v6
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v7, s0, s5, v7, s0
s_waitcnt vmcnt(0)
v_xor_b32_e32 v4, 0x80000000, v4
global_store_b32 v[6:7], v4, off
.LBB1_2:
s_or_b32 exec_lo, exec_lo, s1
s_add_i32 s6, s8, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_eq_u32_e64 s0, s6, v2
s_or_b32 s0, s0, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB1_4
v_add3_u32 v3, s8, -2, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v4, 31, v3
v_lshlrev_b64 v[3:4], 2, v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v3, s0, s4, v3
v_add_co_ci_u32_e64 v4, s0, s5, v4, s0
global_load_b32 v6, v[3:4], off
v_lshlrev_b64 v[3:4], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v3, s0, s4, v3
v_add_co_ci_u32_e64 v4, s0, s5, v4, s0
s_waitcnt vmcnt(0)
v_xor_b32_e32 v6, 0x80000000, v6
global_store_b32 v[3:4], v6, off
.LBB1_4:
s_or_b32 exec_lo, exec_lo, s1
v_cmp_eq_u32_e64 s0, 0, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_or_b32 s0, s0, vcc_lo
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB1_6
v_add_nc_u32_e32 v3, s2, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v4, 31, v3
v_lshlrev_b64 v[3:4], 2, v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v3, s0, s4, v3
v_add_co_ci_u32_e64 v4, s0, s5, v4, s0
global_load_b32 v6, v[3:4], off
v_lshlrev_b64 v[3:4], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v3, s0, s4, v3
v_add_co_ci_u32_e64 v4, s0, s5, v4, s0
s_waitcnt vmcnt(0)
v_xor_b32_e32 v6, 0x80000000, v6
global_store_b32 v[3:4], v6, off
.LBB1_6:
s_or_b32 exec_lo, exec_lo, s1
s_add_i32 s1, s9, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_eq_u32_e64 s0, s1, v5
s_or_b32 s3, s0, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s0, s3
s_cbranch_execz .LBB1_8
s_add_i32 s3, s9, -2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[3:4], null, s2, s3, v[2:3]
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[3:4]
v_add_co_u32 v2, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
global_load_b32 v4, v[2:3], off
v_lshlrev_b64 v[2:3], 2, v[0:1]
v_add_co_u32 v2, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
s_waitcnt vmcnt(0)
v_xor_b32_e32 v4, 0x80000000, v4
global_store_b32 v[2:3], v4, off
.LBB1_8:
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s0, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB1_10
s_ashr_i32 s3, s2, 31
v_mov_b32_e32 v2, 0
s_lshl_b64 s[10:11], s[2:3], 2
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s10, s4, s10
s_addc_u32 s11, s5, s11
s_clause 0x1
global_load_b32 v3, v2, s[4:5] offset:4
global_load_b32 v4, v2, s[10:11]
s_waitcnt vmcnt(0)
v_add_f32_e32 v3, v3, v4
s_delay_alu instid0(VALU_DEP_1)
v_mul_f32_e32 v3, 0.5, v3
global_store_b32 v2, v3, s[4:5]
.LBB1_10:
s_or_b32 exec_lo, exec_lo, s0
s_mul_i32 s3, s9, s8
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_sub_i32 s0, s3, s8
v_cmp_eq_u32_e32 vcc_lo, s0, v0
s_mul_i32 s0, s2, s1
s_and_saveexec_b32 s7, vcc_lo
s_cbranch_execz .LBB1_12
s_ashr_i32 s1, s0, 31
v_mov_b32_e32 v2, 0
s_lshl_b64 s[10:11], s[0:1], 2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
s_add_u32 s10, s4, s10
s_addc_u32 s11, s5, s11
s_sub_i32 s12, s0, s2
s_ashr_i32 s13, s12, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[12:13], s[12:13], 2
s_add_u32 s12, s4, s12
s_addc_u32 s13, s5, s13
s_clause 0x1
global_load_b32 v3, v2, s[10:11] offset:4
global_load_b32 v2, v2, s[12:13]
s_waitcnt vmcnt(0)
v_add_f32_e32 v4, v3, v2
v_lshlrev_b64 v[2:3], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f32_e32 v4, 0.5, v4
v_add_co_u32 v2, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
global_store_b32 v[2:3], v4, off
.LBB1_12:
s_or_b32 exec_lo, exec_lo, s7
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s1, exec_lo
v_cmpx_eq_u32_e64 s6, v0
s_cbranch_execz .LBB1_14
v_add_nc_u32_e32 v2, s2, v0
s_ashr_i32 s9, s8, 31
v_mov_b32_e32 v4, 0
s_lshl_b64 s[10:11], s[8:9], 2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
s_add_u32 s10, s4, s10
v_ashrrev_i32_e32 v3, 31, v2
s_addc_u32 s11, s5, s11
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
s_clause 0x1
global_load_b32 v4, v4, s[10:11] offset:-8
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_add_f32_e32 v4, v4, v2
v_lshlrev_b64 v[2:3], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f32_e32 v4, 0.5, v4
v_add_co_u32 v2, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
global_store_b32 v[2:3], v4, off
.LBB1_14:
s_or_b32 exec_lo, exec_lo, s1
s_add_i32 s3, s3, -1
s_mov_b32 s1, exec_lo
v_cmpx_eq_u32_e64 s3, v0
s_cbranch_execz .LBB1_16
s_add_i32 s1, s8, s0
v_mov_b32_e32 v2, 0
s_add_i32 s8, s1, -2
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_ashr_i32 s9, s8, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[8:9], s[8:9], 2
s_add_u32 s8, s4, s8
s_addc_u32 s9, s5, s9
s_sub_i32 s0, s0, s2
v_add_co_u32 v0, vcc_lo, s4, v0
s_add_i32 s0, s0, s6
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
s_ashr_i32 s1, s0, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[0:1], s[0:1], 2
s_add_u32 s0, s4, s0
s_addc_u32 s1, s5, s1
s_clause 0x1
global_load_b32 v3, v2, s[8:9]
global_load_b32 v2, v2, s[0:1]
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v3, v2
s_delay_alu instid0(VALU_DEP_1)
v_mul_f32_e32 v2, 0.5, v2
global_store_b32 v[0:1], v2, off
.LBB1_16:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| SetBoundary | 2,995 | 4,758 | stackv2-00000-of-00015 |
// Demangled: SetFromUI(float*, float*, float*, int, int)
Function : _Z9SetFromUIPfS_S_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
LDC R7, c[0x0][0x360] &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x398] &wr=0x2 ?trans1;
S2R R4, SR_TID.Y &wr=0x3 ?trans6;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
S2UR UR5, SR_CTAID.Y &wr=0x3 ?trans8;
LDC R3, c[0x0][0x364] &wr=0x3 ?trans1;
LDCU UR6, c[0x0][0x370] &wr=0x4 ?trans1;
IMAD R0, R7, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR8, PT &req={2} ?WAIT5_END_GROUP;
SEL R0, R0, RZ, !P0 ?trans1;
IMAD R4, R3, UR5, R4 &req={3} ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
LDC.64 R2, c[0x0][0x390] &wr=0x2 ?trans3;
ISETP.GE.AND P1, PT, R4, UR9, PT ?WAIT5_END_GROUP;
SEL R5, R4, RZ, !P1 ?trans1;
IMAD R4, R7, UR6, RZ &req={4} ?WAIT4_END_GROUP;
IMAD R7, R5, R4, R0 ?WAIT5_END_GROUP;
SHF.L.U32 R5, R7, 0x2, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R2, R5, 0x4, R2 &req={2} ?WAIT5_END_GROUP;
LDG.E R9, desc[UR4][R2.64+0x8] &req={1} &wr=0x2 ?trans4;
LDG.E R11, desc[UR4][R2.64+0x4] &wr=0x3 ?trans1;
FSETP.GT.AND P0, PT, R9, RZ, PT &req={2} ?trans1;
FSETP.GT.AND P1, PT, R11, RZ, PT &req={3} ?WAIT12_END_GROUP;
@P0 LDC.64 R4, c[0x0][0x380] &wr=0x1 ?trans2;
@P0 IMAD.WIDE R4, R7, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
@P0 STG.E desc[UR4][R4.64], R9 &rd=0x1 ?trans1;
@!P1 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans2;
IMAD.WIDE R2, R7, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R11 ?trans1;
EXIT ?trans5;
BRA 0x210;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: SetFromUI(float*, float*, float*, int, int)
_Z9SetFromUIPfS_S_ii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x2c
s_load_b32 s8, s[0:1], 0x20
s_add_u32 s2, s0, 32
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s9, s4, 16
s_and_b32 s10, s4, 0xffff
s_cmp_lt_u32 s14, s8
s_cselect_b32 s4, 12, 18
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_mov_b32_e32 v1, s4
global_load_u16 v5, v1, s[2:3]
s_load_b256 s[0:7], s[0:1], 0x0
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
v_mad_u64_u32 v[2:3], null, s14, s10, v[1:2]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[3:4], null, s15, s9, v[0:1]
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, s6, v2
v_cndmask_b32_e32 v0, 0, v2, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_cmp_gt_i32_e32 vcc_lo, s7, v3
v_cndmask_b32_e32 v4, 0, v3, vcc_lo
s_waitcnt vmcnt(0)
v_mul_lo_u32 v1, s8, v5
v_mad_u64_u32 v[2:3], null, v1, v4, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b32_e32 v0, 2, v2
v_ashrrev_i32_e32 v3, 31, v2
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 2, v[2:3]
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
s_mov_b32 s4, exec_lo
global_load_b64 v[0:1], v[0:1], off offset:4
s_waitcnt vmcnt(0)
v_cmpx_lt_f32_e32 0, v1
s_cbranch_execz .LBB9_2
v_add_co_u32 v4, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v3, vcc_lo
global_store_b32 v[4:5], v1, off
.LBB9_2:
s_or_b32 exec_lo, exec_lo, s4
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s0, exec_lo
v_cmpx_lt_f32_e32 0, v0
s_cbranch_execz .LBB9_4
v_add_co_u32 v1, vcc_lo, s2, v2
v_add_co_ci_u32_e32 v2, vcc_lo, s3, v3, vcc_lo
global_store_b32 v[1:2], v0, off
.LBB9_4:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| SetFromUI | 906 | 1,117 | stackv2-00000-of-00015 |
// Demangled: SubtractGradient(float*, float*, float*, float*, float*, float*, int, int)
Function : _Z16SubtractGradientPfS_S_S_S_S_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x3b0] &wr=0x2 ?trans1;
S2R R2, SR_TID.Y &wr=0x3 ?trans6;
LDC R3, c[0x0][0x360] &wr=0x1 ?trans8;
S2UR UR7, SR_CTAID.Y &wr=0x3 ?trans8;
LDC R5, c[0x0][0x364] &wr=0x3 ?trans1;
IMAD R0, R3, UR6, R0 &req={1} ?trans1;
LDCU UR6, c[0x0][0x370] &wr=0x1 ?trans4;
ISETP.GE.AND P0, PT, R0, UR4, PT &req={2} ?trans1;
UIADD3 UR4, UPT, UPT, UR4, -0x2, URZ ?WAIT4_END_GROUP;
SEL R0, R0, RZ, !P0 ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0.reuse, UR4, PT ?trans1;
IMAD R2, R5, UR7, R2 &req={3} ?trans2;
IMAD R3, R3, UR6, RZ &req={1} ?trans2;
ISETP.LT.OR P0, PT, R0, 0x2, P0 ?trans1;
ISETP.GE.AND P1, PT, R2.reuse, UR5, PT ?trans1;
UIADD3 UR5, UPT, UPT, UR5, -0x2, URZ ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans3;
SEL R2, R2, RZ, !P1 ?WAIT5_END_GROUP;
ISETP.LT.U32.OR P0, PT, R2.reuse, 0x2, P0 ?trans1;
IMAD R4, R2, R3, RZ ?WAIT4_END_GROUP;
ISETP.GE.OR P0, PT, R2, UR5, P0 ?trans1;
IADD3 R2, PT, PT, R0, R4, RZ ?WAIT12_END_GROUP;
@P0 BRA 0x550 &req={1,0} ?trans5;
LDC.64 R12, c[0x0][0x398] &wr=0x0 ?trans1;
IADD3 R4, PT, PT, R3, R4, RZ ?trans2;
IADD3 R19, PT, PT, R2, 0x1, RZ ?trans2;
IADD3 R5, PT, PT, R4, -R3, -R3 ?WAIT3_END_GROUP;
IMAD.SHL.U32 R15, R19, 0x4, RZ ?trans1;
IADD3 R3, PT, PT, R0.reuse, R4, RZ ?trans1;
LDC.64 R8, c[0x0][0x390] &wr=0x1 ?trans1;
IADD3 R17, PT, PT, R0, R5, RZ ?WAIT3_END_GROUP;
IMAD.SHL.U32 R11, R3, 0x4, RZ ?trans2;
IMAD.SHL.U32 R5, R17, 0x4, RZ ?trans2;
LDC.64 R6, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD.WIDE R14, R15, 0x4, R12 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R10, R11, 0x4, R12.reuse ?trans1;
LDG.E R16, desc[UR6][R14.64] &wr=0x3 ?trans3;
IMAD.WIDE R12, R5, 0x4, R12 ?trans1;
LDG.E R0, desc[UR6][R14.64+-0x20] &wr=0x4 ?trans1;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans3;
LDG.E R10, desc[UR6][R10.64] &wr=0x5 ?trans4;
LDG.E R12, desc[UR6][R12.64] &wr=0x2 ?trans1;
IADD3 R21, PT, PT, R2, -0x1, RZ ?trans1;
FSETP.GT.AND P2, PT, R16, RZ, PT &req={3} ?trans1;
FSETP.GT.AND P3, PT, R0, RZ, PT &req={4} ?WAIT4_END_GROUP;
SEL R19, R2, R19, P2 ?trans1;
FSETP.GT.AND P0, PT, R10, RZ, PT &req={5} ?trans1;
SEL R15, R2, R21, P3 ?trans1;
FSETP.GT.AND P1, PT, R12, RZ, PT &req={2} ?WAIT3_END_GROUP;
SEL R11, R2.reuse, R3, P0 ?trans1;
IMAD.WIDE R12, R19, 0x4, R8 &req={1} ?trans1;
SEL R17, R2, R17, P1 ?WAIT3_END_GROUP;
IMAD.WIDE R14, R15, 0x4, R8.reuse ?trans2;
LDG.E R12, desc[UR6][R12.64] &wr=0x2 ?trans2;
IMAD.WIDE R10, R11, 0x4, R8.reuse ?trans2;
LDG.E R15, desc[UR6][R14.64] &wr=0x2 ?trans2;
IMAD.WIDE R8, R17, 0x4, R8 ?trans2;
LDG.E R10, desc[UR6][R10.64] &wr=0x3 ?trans2;
IMAD.WIDE R16, R2, 0x4, R6 ?WAIT2_END_GROUP;
LDG.E R9, desc[UR6][R8.64] &wr=0x3 ?trans1;
LDC.64 R6, c[0x0][0x3a0] &wr=0x1 ?trans1;
IMAD.WIDE R18, R2, 0x4, R4 &req={0} ?trans2;
LDG.E R16, desc[UR6][R16.64] &wr=0x4 ?trans4;
LDG.E R3, desc[UR6][R18.64] &wr=0x5 ?trans1;
LDC.64 R4, c[0x0][0x3a8] &wr=0x0 ?trans1;
FSET.BF.LEU.AND R0, R0, RZ, PT ?trans1;
UI2FP.F32.S32 UR5, UR4 ?WAIT4_END_GROUP;
FSEL R0, R0, RZ, !P2 ?trans1;
UFMUL UR5, UR5, 0.5 ?WAIT4_END_GROUP;
FSEL R0, R0, RZ, !P1 ?WAIT5_END_GROUP;
FSEL R0, R0, RZ, !P0 ?trans1;
IMAD.WIDE R6, R2, 0x4, R6 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R2, 0x4, R4 &req={0} ?WAIT4_END_GROUP;
FADD R15, R12, -R15 &req={2} ?trans1;
FADD R10, R10, -R9 &req={3} ?WAIT3_END_GROUP;
FFMA R15, R15, -UR5, R16 &req={4} ?trans1;
FFMA R3, R10, -UR5, R3 &req={5} ?WAIT3_END_GROUP;
FFMA R15, R0.reuse, R15, RZ ?trans1;
FFMA R3, R0, R3, RZ ?WAIT4_END_GROUP;
STG.E desc[UR6][R6.64], R15 ?trans4;
STG.E desc[UR6][R4.64], R3 ?trans1;
EXIT ?trans5;
LDC.64 R4, c[0x0][0x3a0] &wr=0x0 ?trans8;
LDC.64 R6, c[0x0][0x3a8] &wr=0x1 ?trans1;
IMAD.WIDE R4, R2, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], RZ ?trans1;
IMAD.WIDE R6, R2, 0x4, R6 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R6.64], RZ ?trans1;
EXIT ?trans5;
BRA 0x5c0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: SubtractGradient(float*, float*, float*, float*, float*, float*, int, int)
_Z16SubtractGradientPfS_S_S_S_S_ii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x44
s_load_b32 s12, s[0:1], 0x38
s_add_u32 s2, s0, 56
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s5, s4, 16
s_and_b32 s13, s4, 0xffff
s_cmp_lt_u32 s14, s12
s_cselect_b32 s4, 12, 18
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_mov_b32_e32 v1, s4
global_load_u16 v4, v1, s[2:3]
s_load_b64 s[2:3], s[0:1], 0x30
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
v_mad_u64_u32 v[2:3], null, s15, s5, v[1:2]
s_delay_alu instid0(VALU_DEP_2)
v_mad_u64_u32 v[5:6], null, s14, s13, v[0:1]
s_clause 0x1
s_load_b128 s[16:19], s[0:1], 0x20
s_load_b256 s[4:11], s[0:1], 0x0
s_mov_b32 s14, 0
s_mov_b32 s15, exec_lo
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, s3, v2
v_cndmask_b32_e32 v1, 0, v2, vcc_lo
v_cmp_gt_i32_e32 vcc_lo, s2, v5
v_cndmask_b32_e32 v2, 0, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_cmp_gt_i32_e64 s13, 2, v2
s_waitcnt vmcnt(0)
v_mul_lo_u32 v3, s12, v4
v_mul_lo_u32 v4, v3, v1
s_delay_alu instid0(VALU_DEP_1)
v_add_nc_u32_e32 v0, v4, v2
v_cmpx_lt_i32_e32 1, v2
s_add_i32 s12, s2, -2
s_add_i32 s0, s3, -2
v_cmp_le_i32_e32 vcc_lo, s12, v2
v_cmp_le_i32_e64 s0, s0, v1
v_cmp_gt_i32_e64 s1, 2, v1
s_mov_b32 s14, exec_lo
s_delay_alu instid0(VALU_DEP_2)
s_or_b32 s0, vcc_lo, s0
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
s_or_b32 s0, s0, s1
s_and_not1_b32 s1, s13, exec_lo
s_and_b32 s0, s0, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s13, s1, s0
s_or_b32 exec_lo, exec_lo, s15
v_ashrrev_i32_e32 v1, 31, v0
s_and_saveexec_b32 s0, s13
s_cbranch_execz .LBB21_4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[5:6], 2, v[0:1]
v_mov_b32_e32 v7, 0
s_mov_b32 s1, 0
s_and_not1_b32 s14, s14, exec_lo
v_add_co_u32 v5, vcc_lo, s16, v5
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v6, vcc_lo, s17, v6, vcc_lo
global_store_b32 v[5:6], v7, off
.LBB21_4:
s_or_b32 exec_lo, exec_lo, s0
v_mov_b32_e32 v5, s1
s_and_saveexec_b32 s13, s14
s_cbranch_execz .LBB21_6
v_add_nc_u32_e32 v4, v4, v3
v_add_nc_u32_e32 v11, 1, v0
v_add_nc_u32_e32 v12, -1, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v10, v4, v2
v_lshlrev_b32_e32 v3, 1, v3
v_lshlrev_b32_e32 v6, 2, v12
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_sub_nc_u32_e32 v3, v4, v3
v_lshlrev_b32_e32 v4, 2, v11
v_ashrrev_i32_e32 v7, 31, v6
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_add_nc_u32_e32 v13, v3, v2
v_lshlrev_b32_e32 v2, 2, v10
v_ashrrev_i32_e32 v5, 31, v4
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[6:7], 2, v[6:7]
v_lshlrev_b32_e32 v8, 2, v13
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[4:5], 2, v[4:5]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v9, 31, v8
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[8:9], 2, v[8:9]
v_add_co_u32 v2, vcc_lo, s10, v2
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
v_add_co_u32 v4, vcc_lo, s10, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s11, v5, vcc_lo
global_load_b32 v14, v[2:3], off
v_add_co_u32 v2, vcc_lo, s10, v8
v_add_co_ci_u32_e32 v3, vcc_lo, s11, v9, vcc_lo
v_add_co_u32 v6, vcc_lo, s10, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s11, v7, vcc_lo
s_clause 0x2
global_load_b32 v3, v[2:3], off
global_load_b32 v5, v[4:5], off
global_load_b32 v7, v[6:7], off
s_waitcnt vmcnt(3)
v_cmp_lt_f32_e32 vcc_lo, 0, v14
v_cndmask_b32_e32 v2, v10, v0, vcc_lo
s_waitcnt vmcnt(2)
v_cmp_lt_f32_e64 s0, 0, v3
s_waitcnt vmcnt(1)
v_cmp_lt_f32_e64 s1, 0, v5
s_waitcnt vmcnt(0)
v_cmp_lt_f32_e64 s2, 0, v7
v_ashrrev_i32_e32 v3, 31, v2
v_cndmask_b32_e64 v4, v13, v0, s0
v_cndmask_b32_e64 v6, v11, v0, s1
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_cndmask_b32_e64 v8, v12, v0, s2
v_lshlrev_b64 v[2:3], 2, v[2:3]
v_lshlrev_b64 v[10:11], 2, v[0:1]
v_ashrrev_i32_e32 v5, 31, v4
v_ashrrev_i32_e32 v7, 31, v6
v_ashrrev_i32_e32 v9, 31, v8
s_or_b32 s0, vcc_lo, s0
v_add_co_u32 v2, s3, s8, v2
v_lshlrev_b64 v[4:5], 2, v[4:5]
v_lshlrev_b64 v[6:7], 2, v[6:7]
v_add_co_ci_u32_e64 v3, s3, s9, v3, s3
v_lshlrev_b64 v[8:9], 2, v[8:9]
s_or_b32 s0, s0, s1
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v4, s3, s8, v4
v_add_co_ci_u32_e64 v5, s3, s9, v5, s3
v_add_co_u32 v6, s3, s8, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e64 v7, s3, s9, v7, s3
v_add_co_u32 v8, s3, s8, v8
v_add_co_ci_u32_e64 v9, s3, s9, v9, s3
v_add_co_u32 v12, s3, s4, v10
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v13, s3, s5, v11, s3
s_clause 0x3
global_load_b32 v14, v[2:3], off
global_load_b32 v4, v[4:5], off
global_load_b32 v5, v[6:7], off
global_load_b32 v6, v[8:9], off
v_add_co_u32 v2, s3, s6, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e64 v3, s3, s7, v11, s3
global_load_b32 v7, v[12:13], off
global_load_b32 v8, v[2:3], off
v_cvt_f32_i32_e32 v2, s12
s_or_b32 s0, s0, s2
v_mul_f32_e32 v2, -0.5, v2
s_waitcnt vmcnt(2)
v_dual_sub_f32 v4, v14, v4 :: v_dual_sub_f32 v3, v5, v6
v_cndmask_b32_e64 v5, 1.0, 0, s0
s_waitcnt vmcnt(1)
s_delay_alu instid0(VALU_DEP_2)
v_fmac_f32_e32 v7, v2, v3
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v8, v2, v4
v_add_co_u32 v2, vcc_lo, s16, v10
v_add_co_ci_u32_e32 v3, vcc_lo, s17, v11, vcc_lo
v_fma_f32 v4, v5, v7, 0
s_delay_alu instid0(VALU_DEP_4)
v_fma_f32 v5, v5, v8, 0
global_store_b32 v[2:3], v4, off
.LBB21_6:
s_or_b32 exec_lo, exec_lo, s13
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s18, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s19, v1, vcc_lo
global_store_b32 v[0:1], v5, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| SubtractGradient | 2,338 | 3,545 | stackv2-00000-of-00015 |
// Demangled: getSum(float*, float, int, int)
Function : _Z6getSumPffii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
EXIT ?trans5;
BRA 0x20;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: getSum(float*, float, int, int)
_Z6getSumPffii:
s_endpgm
| getSum | 94 | 14 | stackv2-00000-of-00015 |
// Demangled: vorticityConfinement(float*, float*, float*, float*, float*, float, float, int, int)
Function : _Z20vorticityConfinementPfS_S_S_S_ffii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x3b0] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x9d0 ?trans1;
S2R R2, SR_TID.Y &wr=0x3 ?trans5;
LDC R5, c[0x0][0x360] &wr=0x1 ?trans8;
S2UR UR5, SR_CTAID.Y &wr=0x3 ?trans8;
LDC R3, c[0x0][0x364] &wr=0x3 ?trans1;
IMAD R0, R5, UR4, R0 &req={1} ?trans1;
UIADD3 UR4, UPT, UPT, UR6, -0x2, URZ &req={2} ?WAIT4_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR6, PT ?WAIT5_END_GROUP;
SEL R0, R0, RZ, !P0 ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0.reuse, UR4, PT ?trans1;
IMAD R2, R3, UR5, R2 &req={3} ?trans1;
LDCU UR5, c[0x0][0x370] &wr=0x1 ?trans3;
ISETP.LT.OR P0, PT, R0, 0x2, P0 ?trans1;
ISETP.GE.AND P1, PT, R2.reuse, UR7, PT ?trans1;
UIADD3 UR4, UPT, UPT, UR7, -0x2, URZ ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans3;
SEL R2, R2, RZ, !P1 ?WAIT5_END_GROUP;
ISETP.LT.U32.OR P0, PT, R2, 0x2, P0 ?trans1;
IMAD R5, R5, UR5, RZ &req={1} ?WAIT4_END_GROUP;
ISETP.GE.OR P0, PT, R2.reuse, UR4, P0 ?trans1;
IMAD R8, R2, R5, RZ ?WAIT5_END_GROUP;
IADD3 R4, PT, PT, R0, R8, RZ ?WAIT7_END_GROUP;
@P0 BRA 0x9c0 &req={2,0} ?trans5;
LDC.64 R2, c[0x0][0x3a0] &wr=0x0 ?trans1;
IMAD.SHL.U32 R7, R4, 0x4, RZ ?WAIT4_END_GROUP;
IMAD.WIDE R2, R7, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR6][R2.64] &wr=0x2 ?trans2;
FSETP.GEU.AND P0, PT, R2, 1, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x9c0 ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
IADD3 R9, PT, PT, R5, R8, RZ ?trans2;
IADD3 R8, PT, PT, R0, 0x1, RZ ?trans2;
IADD3 R10, PT, PT, R9, -R5, -R5 ?WAIT3_END_GROUP;
LDC.64 R6, c[0x0][0x380] &wr=0x1 ?trans1;
IADD3 R9, PT, PT, R8.reuse, R9, RZ ?trans1;
IMAD R12, R5, 0x3, R10 ?trans1;
IADD3 R11, PT, PT, R8, R10, RZ ?WAIT3_END_GROUP;
IMAD R5, R5, -0x4, R12 ?trans1;
IADD3 R13, PT, PT, R0, R12, RZ ?trans2;
IADD3 R23, PT, PT, R4, 0x2, RZ ?trans2;
IADD3 R19, PT, PT, R0, R5, RZ ?trans1;
IMAD.WIDE R16, R9, 0x4, R2 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R20, R11, 0x4, R2 ?trans1;
LDG.E R5, desc[UR6][R16.64] &wr=0x2 ?trans3;
IMAD.WIDE R14, R4, 0x4, R6.reuse &req={1} ?trans1;
LDG.E R24, desc[UR6][R16.64+-0x8] &wr=0x2 ?trans3;
IMAD.WIDE R8, R9, 0x4, R6.reuse ?trans1;
LDG.E R26, desc[UR6][R20.64+-0x8] &wr=0x3 ?trans3;
IMAD.WIDE R12, R13, 0x4, R6.reuse ?trans1;
LDG.E R0, desc[UR6][R14.64] &wr=0x4 ?trans3;
IMAD.WIDE R18, R19, 0x4, R6.reuse ?trans1;
LDG.E R16, desc[UR6][R8.64+-0x8] &wr=0x5 ?trans3;
IMAD.WIDE R6, R11, 0x4, R6 ?trans1;
LDG.E R13, desc[UR6][R12.64] &rd=0x0 &wr=0x4 ?trans3;
IMAD.WIDE R10, R23, 0x4, R2 ?trans1;
LDG.E R19, desc[UR6][R18.64] &wr=0x3 ?trans4;
LDG.E R23, desc[UR6][R20.64] &wr=0x5 ?trans4;
LDG.E R14, desc[UR6][R10.64] &wr=0x5 ?trans4;
LDG.E R15, desc[UR6][R10.64+-0x8] &wr=0x5 ?trans4;
LDG.E R22, desc[UR6][R10.64+-0x10] &wr=0x5 ?trans4;
LDG.E R2, desc[UR6][R8.64] &wr=0x5 ?trans4;
LDG.E R3, desc[UR6][R6.64] &wr=0x5 ?trans4;
LDG.E R17, desc[UR6][R6.64+-0x8] &wr=0x5 ?trans1;
BSSY.RECONVERGENT B1, 0x670 ?trans1;
FADD R5, R5, -R24 &req={2} ?WAIT4_END_GROUP;
FMUL R12, R5, 0.5 &req={0} ?trans1;
FADD R13, R13, -R0 &req={4} ?trans1;
FADD R19, R0, -R19 &req={3} ?trans1;
FADD R23, R23, -R26 &req={5} ?WAIT4_END_GROUP;
FMUL R0, R23, 0.5 ?trans1;
FADD R14, R14, -R15 ?trans1;
FADD R22, R15, -R22 ?trans1;
FFMA R12, R13, 0.5, -R12 ?trans1;
FFMA R19, R19, 0.5, -R0 ?trans2;
FMUL R5, R22, 0.5 ?trans1;
FADD R2, R2, -R3 ?trans1;
FMUL R3, R14, 0.5 ?trans1;
FADD R16, R16, -R17 ?WAIT3_END_GROUP;
FFMA R2, R2, 0.5, -R3 ?trans1;
FADD R0, |R12|, -|R19| ?trans1;
FFMA R5, R16, 0.5, -R5 ?WAIT3_END_GROUP;
FMUL R0, R0, 0.5 ?trans1;
FADD R2, |R2|, -|R5| ?WAIT3_END_GROUP;
FMUL R3, R0, R0 ?trans1;
FMUL R2, R2, 0.5 ?WAIT4_END_GROUP;
FFMA R3, R2, R2, R3 ?WAIT5_END_GROUP;
IADD3 R5, PT, PT, R3, -0xd000000, RZ ?trans1;
MUFU.RSQ R12, R3 &rd=0x0 &wr=0x1 ?trans4;
ISETP.GT.U32.AND P0, PT, R5, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x620 &req={0} ?trans5;
MOV R16, 0x600 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xa40 &req={1} ?trans5;
MOV R3, R5 ?trans1;
BRA 0x660 ?trans6;
FMUL.FTZ R14, R3, R12 &req={1} ?trans1;
FMUL.FTZ R12, R12, 0.5 ?WAIT3_END_GROUP;
FFMA R3, -R14, R14, R3 ?WAIT4_END_GROUP;
FFMA R3, R3, R12, R14 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
LDC.64 R12, c[0x0][0x398] &wr=0x0 ?trans1;
LDG.E R14, desc[UR6][R10.64+-0x4] &wr=0x2 ?trans4;
LDG.E R15, desc[UR6][R10.64+-0xc] &wr=0x2 ?trans4;
LDG.E R8, desc[UR6][R8.64+-0x4] &wr=0x3 ?trans4;
LDG.E R7, desc[UR6][R6.64+-0x4] &rd=0x1 &wr=0x3 ?trans1;
IMAD.WIDE R12, R4, 0x4, R12 &req={0} ?WAIT5_END_GROUP;
LDG.E R5, desc[UR6][R12.64] &rd=0x0 &wr=0x5 ?trans1;
FADD R3, R3, 9.9999999747524270788e-07 ?trans1;
BSSY.RECONVERGENT B1, 0x800 ?trans3;
MUFU.RCP R16, R3 &wr=0x4 ?trans1;
FCHK P0, R2, R3 &wr=0x0 ?trans1;
FFMA R17, -R3, R16, 1 &req={4} ?WAIT4_END_GROUP;
FFMA R17, R16, R17, R16 ?WAIT4_END_GROUP;
FFMA R16, R2, R17, RZ ?WAIT4_END_GROUP;
FFMA R6, -R3, R16, R2 &req={1} ?WAIT4_END_GROUP;
FFMA R17, R17, R6, R16 ?trans1;
FADD R14, R14, -R15 &req={2} ?trans1;
FADD R8, R8, -R7 &req={3} ?WAIT3_END_GROUP;
FMUL R7, R14, 0.5 ?WAIT4_END_GROUP;
FFMA R6, R8, 0.5, -R7 ?trans1;
@!P0 BRA 0x7f0 &req={0} ?trans6;
MOV R8, 0x7e0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xba0 &req={5} ?trans5;
MOV R17, R2 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
LDC.64 R8, c[0x0][0x390] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x3a8] &wr=0x1 ?trans1;
FMUL R17, R6, R17 ?WAIT4_END_GROUP;
FMUL R2, R17, UR5 &req={1} ?WAIT4_END_GROUP;
FFMA R11, R2, UR4, R5 &req={5} ?trans1;
IMAD.WIDE R4, R4, 0x4, R8 &req={0} ?WAIT4_END_GROUP;
STG.E desc[UR6][R12.64], R11 &rd=0x0 ?trans4;
LDG.E R7, desc[UR6][R4.64] &rd=0x0 &wr=0x5 ?trans1;
MUFU.RCP R2, R3 &wr=0x1 ?trans1;
BSSY.RECONVERGENT B1, 0x960 ?trans1;
FCHK P0, R0, R3 &wr=0x2 ?trans1;
FFMA R9, -R3, R2, 1 &req={1} ?WAIT4_END_GROUP;
FFMA R15, R2, R9, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R15, RZ ?WAIT4_END_GROUP;
FFMA R9, -R3, R2, R0 ?WAIT4_END_GROUP;
FFMA R9, R15, R9, R2 ?trans1;
@!P0 BRA 0x950 &req={2,0} ?trans6;
MOV R2, R0 ?trans1;
MOV R8, 0x940 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xba0 &req={5} ?trans5;
MOV R9, R2 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
LDCU.64 UR4, c[0x0][0x3a8] &wr=0x0 ?trans1;
FMUL R9, R6, R9 ?WAIT4_END_GROUP;
FMUL R0, R9, UR5 &req={0} ?WAIT4_END_GROUP;
FFMA R7, -R0, UR4, R7 &req={5} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R7 ?trans1;
EXIT ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R2, c[0x0][0x390] &wr=0x0 ?trans8;
LDC.64 R6, c[0x0][0x398] &wr=0x1 ?trans1;
IMAD.WIDE R2, R4, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], RZ ?trans1;
IMAD.WIDE R6, R4, 0x4, R6 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R6.64], RZ ?trans1;
EXIT ?trans5;
LOP3.LUT P0, RZ, R3, 0x7fffffff, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 MOV R5, R3 ?trans1;
@!P0 BRA 0xb70 ?trans6;
FSETP.GEU.FTZ.AND P0, PT, R3, RZ, PT ?WAIT13_END_GROUP;
@!P0 MOV R5, 0x7fffffff ?trans1;
@!P0 BRA 0xb70 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R3|, +INF , PT ?WAIT13_END_GROUP;
@P0 FADD.FTZ R5, R3, 1 ?trans1;
@P0 BRA 0xb70 ?trans6;
FSETP.NEU.FTZ.AND P0, PT, |R3|, +INF , PT ?WAIT13_END_GROUP;
@P0 FFMA R12, R3, 1.84467440737095516160e+19, RZ ?WAIT4_END_GROUP;
@P0 MUFU.RSQ R5, R12 &wr=0x0 ?trans2;
@P0 FMUL.FTZ R13, R12, R5 &req={0} ?trans1;
@P0 FMUL.FTZ R15, R5, 0.5 ?trans1;
@!P0 MOV R5, R3 ?trans2;
@P0 FADD.FTZ R14, -R13, -RZ ?WAIT4_END_GROUP;
@P0 FFMA R14, R13, R14, R12 ?WAIT4_END_GROUP;
@P0 FFMA R14, R14, R15, R13 ?WAIT4_END_GROUP;
@P0 FMUL.FTZ R5, R14, 2.3283064365386962891e-10 ?WAIT7_END_GROUP;
MOV R12, R16 ?trans1;
HFMA2 R13, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R12 0x0 ?trans5;
SHF.R.U32.HI R10, RZ, 0x17, R3 ?trans1;
BSSY.RECONVERGENT B2, 0x11f0 ?trans1;
SHF.R.U32.HI R9, RZ, 0x17, R2 ?trans2;
LOP3.LUT R18, R10, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R16, R9, 0xff, RZ, 0xc0, !PT ?trans1;
MOV R9, R3 ?trans1;
IADD3 R14, PT, PT, R18, -0x1, RZ ?trans2;
IADD3 R11, PT, PT, R16, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R14, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R11, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R10, RZ ?trans1;
@!P0 BRA 0xdd0 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R2|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0x11d0 ?trans5;
LOP3.LUT P0, RZ, R9, 0x7fffffff, R2, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x11b0 ?trans5;
FSETP.NEU.FTZ.AND P2, PT, |R2|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R2|, +INF , PT ?WAIT12_END_GROUP;
@!P1 BRA !P2, 0x11b0 ?trans5;
LOP3.LUT P2, RZ, R2, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P1, P2, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0x1190 ?trans5;
LOP3.LUT P1, RZ, R9, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x1160 ?trans5;
ISETP.GE.AND P0, PT, R11, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R14, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R10, RZ ?trans1;
@!P0 MOV R10, 0xffffffc0 ?trans1;
@!P0 FFMA R2, R2, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R9, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R10, PT, PT, R10, 0x40, RZ ?WAIT7_END_GROUP;
LEA R14, R18, 0xc0800000, 0x17 ?trans1;
BSSY.RECONVERGENT B3, 0x1150 ?trans3;
IADD3 R14, PT, PT, -R14, R9, RZ ?trans2;
IADD3 R9, PT, PT, R16, -0x7f, RZ ?trans2;
MUFU.RCP R11, R14 &wr=0x0 ?trans1;
FADD.FTZ R15, -R14, -RZ ?trans2;
IMAD R2, R9, -0x800000, R2 ?WAIT2_END_GROUP;
FFMA R16, R11, R15, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R20, R11, R16, R11 ?WAIT4_END_GROUP;
FFMA R11, R2, R20, RZ ?WAIT4_END_GROUP;
FFMA R16, R15, R11, R2 ?WAIT4_END_GROUP;
FFMA R17, R20, R16, R11 ?trans1;
IADD3 R11, PT, PT, R9, 0x7f, -R18 ?WAIT3_END_GROUP;
FFMA R16, R15, R17, R2 ?trans1;
IADD3 R11, PT, PT, R11, R10, RZ ?WAIT3_END_GROUP;
FFMA R2, R20, R16, R17 ?WAIT5_END_GROUP;
SHF.R.U32.HI R9, RZ, 0x17, R2 ?WAIT4_END_GROUP;
LOP3.LUT R9, R9, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R15, PT, PT, R9, R11, RZ ?WAIT4_END_GROUP;
IADD3 R9, PT, PT, R15, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R9, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1130 ?trans5;
ISETP.GT.AND P0, PT, R15, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1100 ?trans5;
ISETP.GE.AND P0, PT, R15, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1140 ?trans5;
ISETP.GE.AND P0, PT, R15, -0x18, PT ?trans1;
LOP3.LUT R2, R2, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x1140 ?trans5;
FFMA.RZ R9, R20.reuse, R16.reuse, R17.reuse ?trans1;
IADD3 R14, PT, PT, R15.reuse, 0x20, RZ ?trans1;
FFMA.RM R10, R20.reuse, R16.reuse, R17.reuse ?trans1;
ISETP.NE.AND P1, PT, R15.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R15, RZ, PT ?trans1;
LOP3.LUT R9, R9, 0x7fffff, RZ, 0xc0, !PT ?trans2;
IADD3 R15, PT, PT, -R15, RZ, RZ ?trans2;
LOP3.LUT R11, R9, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R9, R20, R16, R17 ?WAIT3_END_GROUP;
SHF.L.U32 R14, R11, R14, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R9, R10, PT ?trans1;
SEL R10, R15, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R14, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R10, RZ, R10, R11 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R14, RZ, 0x1, R10 ?WAIT3_END_GROUP;
SEL R9, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R9, R9, 0x1, R14, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R9, R9, R10, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R9, PT, PT, R14, R9, RZ ?WAIT4_END_GROUP;
LOP3.LUT R2, R9, R2, RZ, 0xfc, !PT ?trans1;
BRA 0x1140 ?trans6;
LOP3.LUT R2, R2, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R2, R2, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x1140 ?trans6;
IMAD R2, R11, 0x800000, R2 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B3 ?trans5;
BRA 0x11e0 ?trans5;
LOP3.LUT R2, R9, 0x80000000, R2, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R2, R2, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x11e0 ?trans6;
LOP3.LUT R2, R9, 0x80000000, R2, 0x48, !PT ?trans1;
BRA 0x11e0 ?trans6;
MUFU.RSQ R2, -QNAN &wr=0x0 ?trans1;
BRA 0x11e0 ?trans5;
FADD.FTZ R2, R2, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
HFMA2 R9, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R8 0x0 &req={0} ?trans5;
BRA 0x1210;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: vorticityConfinement(float*, float*, float*, float*, float*, float, float, int, int)
_Z20vorticityConfinementPfS_S_S_S_ffii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x44
s_load_b32 s12, s[0:1], 0x38
s_add_u32 s2, s0, 56
s_addc_u32 s3, s1, 0
s_load_b128 s[16:19], s[0:1], 0x28
s_waitcnt lgkmcnt(0)
s_lshr_b32 s5, s4, 16
s_and_b32 s13, s4, 0xffff
s_cmp_lt_u32 s14, s12
s_cselect_b32 s4, 12, 18
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_mov_b32_e32 v1, s4
global_load_u16 v4, v1, s[2:3]
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
v_mad_u64_u32 v[2:3], null, s15, s5, v[1:2]
s_delay_alu instid0(VALU_DEP_2)
v_mad_u64_u32 v[5:6], null, s14, s13, v[0:1]
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x20
s_load_b256 s[4:11], s[0:1], 0x0
s_mov_b32 s0, 0
s_mov_b32 s13, exec_lo
s_delay_alu instid0(VALU_DEP_2)
v_cmp_gt_i32_e32 vcc_lo, s19, v2
v_cndmask_b32_e32 v1, 0, v2, vcc_lo
v_cmp_gt_i32_e32 vcc_lo, s18, v5
v_cndmask_b32_e32 v2, 0, v5, vcc_lo
s_waitcnt vmcnt(0)
v_mul_lo_u32 v3, s12, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_gt_i32_e64 s12, 2, v2
v_mul_lo_u32 v4, v3, v1
s_delay_alu instid0(VALU_DEP_1)
v_add_nc_u32_e32 v0, v4, v2
v_cmpx_lt_i32_e32 1, v2
s_cbranch_execz .LBB17_4
s_add_i32 s0, s18, -2
v_cmp_lt_i32_e32 vcc_lo, 1, v1
s_add_i32 s1, s19, -2
v_cmp_gt_i32_e64 s0, s0, v2
v_cmp_gt_i32_e64 s1, s1, v1
s_delay_alu instid0(VALU_DEP_2)
s_and_b32 s0, s0, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
s_and_b32 s15, s0, s1
s_mov_b32 s0, 0
s_xor_b32 s1, s15, -1
s_and_saveexec_b32 s14, s15
s_cbranch_execz .LBB17_3
v_lshlrev_b32_e32 v5, 2, v0
s_and_not1_b32 s1, s1, exec_lo
s_mov_b32 s0, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v6, 31, v5
v_lshlrev_b64 v[5:6], 2, v[5:6]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v5, vcc_lo, s2, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s3, v6, vcc_lo
global_load_b32 v1, v[5:6], off
s_waitcnt vmcnt(0)
v_cmp_ngt_f32_e32 vcc_lo, 1.0, v1
s_and_b32 s2, vcc_lo, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s1, s1, s2
.LBB17_3:
s_or_b32 exec_lo, exec_lo, s14
s_waitcnt lgkmcnt(0)
s_and_not1_b32 s2, s12, exec_lo
s_and_b32 s1, s1, exec_lo
s_and_b32 s0, s0, exec_lo
s_or_b32 s12, s2, s1
.LBB17_4:
s_or_b32 exec_lo, exec_lo, s13
s_delay_alu instid0(VALU_DEP_2)
v_ashrrev_i32_e32 v1, 31, v0
s_and_saveexec_b32 s1, s12
s_cbranch_execz .LBB17_6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[5:6], 2, v[0:1]
v_mov_b32_e32 v9, 0
s_and_not1_b32 s0, s0, exec_lo
s_waitcnt lgkmcnt(0)
v_add_co_u32 v7, vcc_lo, s8, v5
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v8, vcc_lo, s9, v6, vcc_lo
v_add_co_u32 v5, vcc_lo, s10, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s11, v6, vcc_lo
global_store_b32 v[7:8], v9, off
global_store_b32 v[5:6], v9, off
.LBB17_6:
s_or_b32 exec_lo, exec_lo, s1
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB17_8
v_add_nc_u32_e32 v22, v4, v3
v_lshlrev_b32_e32 v5, 1, v3
v_add_nc_u32_e32 v9, 1, v2
v_add_nc_u32_e32 v4, 2, v0
v_add_nc_u32_e32 v15, -2, v0
v_lshlrev_b64 v[11:12], 2, v[0:1]
v_sub_nc_u32_e32 v8, v22, v5
v_add_nc_u32_e32 v6, v22, v9
v_ashrrev_i32_e32 v5, 31, v4
v_ashrrev_i32_e32 v16, 31, v15
v_add_nc_u32_e32 v1, -1, v2
v_add_nc_u32_e32 v9, v8, v9
v_ashrrev_i32_e32 v7, 31, v6
v_lshlrev_b64 v[4:5], 2, v[4:5]
v_lshlrev_b64 v[15:16], 2, v[15:16]
v_add_nc_u32_e32 v13, v22, v1
v_ashrrev_i32_e32 v10, 31, v9
v_lshlrev_b64 v[6:7], 2, v[6:7]
v_add_nc_u32_e32 v22, v22, v2
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, vcc_lo, s6, v4
v_lshlrev_b64 v[9:10], 2, v[9:10]
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
v_add_co_u32 v6, vcc_lo, s4, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_add_co_u32 v9, vcc_lo, s4, v9
v_add_co_ci_u32_e32 v10, vcc_lo, s5, v10, vcc_lo
v_add_co_u32 v17, vcc_lo, s6, v11
v_mad_u64_u32 v[19:20], null, v3, 3, v[8:9]
v_add_co_ci_u32_e32 v18, vcc_lo, s7, v12, vcc_lo
s_clause 0x1
global_load_b32 v32, v[4:5], off
global_load_b64 v[4:5], v[17:18], off
v_ashrrev_i32_e32 v14, 31, v13
v_add_nc_u32_e32 v17, v19, v2
v_add_co_u32 v15, vcc_lo, s6, v15
v_add_co_ci_u32_e32 v16, vcc_lo, s7, v16, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_ashrrev_i32_e32 v18, 31, v17
v_lshlrev_b64 v[13:14], 2, v[13:14]
v_ashrrev_i32_e32 v23, 31, v22
global_load_b32 v33, v[15:16], off
v_add_nc_u32_e32 v15, -1, v22
v_lshlrev_b64 v[17:18], 2, v[17:18]
v_add_nc_u32_e32 v20, v8, v1
v_add_co_u32 v13, vcc_lo, s4, v13
s_delay_alu instid0(VALU_DEP_4)
v_ashrrev_i32_e32 v16, 31, v15
v_add_co_ci_u32_e32 v14, vcc_lo, s5, v14, vcc_lo
v_add_co_u32 v17, vcc_lo, s4, v17
v_lshlrev_b64 v[22:23], 2, v[22:23]
v_add_co_ci_u32_e32 v18, vcc_lo, s5, v18, vcc_lo
v_add_co_u32 v24, vcc_lo, s4, v11
v_lshlrev_b64 v[15:16], 2, v[15:16]
v_lshlrev_b32_e32 v1, 2, v3
v_add_co_ci_u32_e32 v25, vcc_lo, s5, v12, vcc_lo
v_add_co_u32 v26, vcc_lo, s6, v22
v_add_co_ci_u32_e32 v27, vcc_lo, s7, v23, vcc_lo
v_add_co_u32 v15, vcc_lo, s6, v15
v_sub_nc_u32_e32 v3, v19, v1
v_add_co_ci_u32_e32 v16, vcc_lo, s7, v16, vcc_lo
v_add_nc_u32_e32 v1, v8, v2
s_delay_alu instid0(VALU_DEP_3)
v_add_nc_u32_e32 v28, v3, v2
s_clause 0x1
global_load_b32 v3, v[26:27], off offset:4
global_load_b32 v34, v[15:16], off
v_add_nc_u32_e32 v30, -1, v1
v_ashrrev_i32_e32 v2, 31, v1
v_ashrrev_i32_e32 v29, 31, v28
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v31, 31, v30
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[15:16], 2, v[28:29]
v_lshlrev_b64 v[26:27], 2, v[30:31]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v28, vcc_lo, s6, v1
v_add_co_ci_u32_e32 v29, vcc_lo, s7, v2, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v26, vcc_lo, s6, v26
v_add_co_ci_u32_e32 v27, vcc_lo, s7, v27, vcc_lo
v_add_co_u32 v15, vcc_lo, s4, v15
v_add_co_ci_u32_e32 v16, vcc_lo, s5, v16, vcc_lo
s_clause 0x1
global_load_b32 v28, v[28:29], off offset:4
global_load_b32 v26, v[26:27], off
s_waitcnt vmcnt(2)
v_sub_f32_e32 v3, v3, v34
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mul_f32_e32 v3, 0.5, v3
v_ashrrev_i32_e32 v21, 31, v20
v_lshlrev_b64 v[20:21], 2, v[20:21]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v19, vcc_lo, s4, v20
v_add_co_ci_u32_e32 v20, vcc_lo, s5, v21, vcc_lo
s_clause 0x6
global_load_b32 v17, v[17:18], off
global_load_b32 v18, v[24:25], off
global_load_b32 v15, v[15:16], off
global_load_b32 v16, v[6:7], off
global_load_b32 v10, v[9:10], off
global_load_b32 v13, v[13:14], off
global_load_b32 v14, v[19:20], off
s_waitcnt vmcnt(7)
v_dual_sub_f32 v19, v28, v26 :: v_dual_add_nc_u32 v6, -1, v0
s_delay_alu instid0(VALU_DEP_1)
v_mul_f32_e32 v19, 0.5, v19
s_waitcnt vmcnt(5)
v_sub_f32_e32 v17, v17, v18
s_waitcnt vmcnt(4)
v_sub_f32_e32 v15, v18, v15
v_ashrrev_i32_e32 v7, 31, v6
s_waitcnt vmcnt(2)
v_sub_f32_e32 v10, v16, v10
v_fma_f32 v3, v17, 0.5, -v3
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[6:7]
v_add_co_u32 v6, vcc_lo, s6, v6
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
v_add_co_u32 v8, vcc_lo, s4, v22
v_add_co_ci_u32_e32 v9, vcc_lo, s5, v23, vcc_lo
v_add_co_u32 v0, vcc_lo, s4, v1
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v2, vcc_lo
global_load_b32 v6, v[6:7], off
s_clause 0x1
global_load_b32 v2, v[8:9], off
global_load_b32 v7, v[0:1], off
v_add_co_u32 v0, vcc_lo, s10, v11
v_add_co_ci_u32_e32 v1, vcc_lo, s11, v12, vcc_lo
v_sub_f32_e32 v9, v32, v4
s_waitcnt vmcnt(3)
v_dual_sub_f32 v4, v4, v33 :: v_dual_sub_f32 v13, v13, v14
global_load_b32 v8, v[0:1], off
v_fma_f32 v14, v15, 0.5, -v19
v_dual_mul_f32 v9, 0.5, v9 :: v_dual_mul_f32 v4, 0.5, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_f32_e64 v3, |v3|, |v14|
v_fma_f32 v9, v10, 0.5, -v9
s_waitcnt vmcnt(1)
v_dual_sub_f32 v5, v5, v6 :: v_dual_sub_f32 v2, v2, v7
v_fma_f32 v4, v13, 0.5, -v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f32_e32 v5, 0.5, v5
v_sub_f32_e64 v4, |v9|, |v4|
v_mul_f32_e32 v9, 0.5, v3
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v5, v2, 0.5, -v5
v_dual_mul_f32 v3, 0.5, v4 :: v_dual_mul_f32 v4, v9, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v4, v3, v3
v_mul_f32_e32 v10, 0x4f800000, v4
v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v4, v4, v10, vcc_lo
v_sqrt_f32_e32 v10, v4
s_waitcnt_depctr 0xfff
v_add_nc_u32_e32 v13, -1, v10
v_add_nc_u32_e32 v14, 1, v10
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v15, -v13, v10, v4
v_fma_f32 v16, -v14, v10, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_ge_f32_e64 s0, 0, v15
v_cndmask_b32_e64 v10, v10, v13, s0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_lt_f32_e64 s0, 0, v16
v_cndmask_b32_e64 v10, v10, v14, s0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v13, 0x37800000, v10
v_cndmask_b32_e32 v10, v10, v13, vcc_lo
v_cmp_class_f32_e64 vcc_lo, v4, 0x260
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v4, v10, v4, vcc_lo
v_add_f32_e32 v4, 0x358637bd, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_div_scale_f32 v10, null, v4, v4, v3
v_div_scale_f32 v15, vcc_lo, v3, v4, v3
v_rcp_f32_e32 v13, v10
s_waitcnt_depctr 0xfff
v_fma_f32 v14, -v10, v13, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v13, v14, v13
v_mul_f32_e32 v14, v15, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v16, -v10, v14, v15
v_fmac_f32_e32 v14, v16, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v6, -v10, v14, v15
v_div_fmas_f32 v6, v6, v13, v14
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fixup_f32 v2, v6, v4, v3
v_mul_f32_e32 v2, v5, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mul_f32_e32 v2, s17, v2
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v8, s16, v2
v_add_co_u32 v2, vcc_lo, s8, v11
v_add_co_ci_u32_e32 v3, vcc_lo, s9, v12, vcc_lo
global_store_b32 v[0:1], v8, off
v_div_scale_f32 v1, null, v4, v4, v9
global_load_b32 v0, v[2:3], off
v_rcp_f32_e32 v6, v1
s_waitcnt_depctr 0xfff
v_fma_f32 v7, -v1, v6, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v6, v7, v6
v_div_scale_f32 v7, vcc_lo, v9, v4, v9
v_mul_f32_e32 v8, v7, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v10, -v1, v8, v7
v_fmac_f32_e32 v8, v10, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v1, -v1, v8, v7
v_div_fmas_f32 v1, v1, v6, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fixup_f32 v1, v1, v4, v9
v_mul_f32_e32 v1, v1, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mul_f32_e32 v1, s17, v1
s_waitcnt vmcnt(0)
v_fma_f32 v0, -v1, s16, v0
global_store_b32 v[2:3], v0, off
.LBB17_8:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| vorticityConfinement | 7,044 | 6,699 | stackv2-00000-of-00015 |
// Demangled: dvc_ScaLBL_D3Q19_GreyIMRT_Init(double*, int, double)
Function : _Z30dvc_ScaLBL_D3Q19_GreyIMRT_InitPdid
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x388] &wr=0x1 ?trans2;
MOV R0, UR4 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, -0x3ffff, PT ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
S2R R8, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR10, c[0x0][0x390] &wr=0x2 ?trans1;
IADD3 R4, PT, PT, R0, 0x3ffff, RZ ?trans2;
SHF.R.S32.HI R3, RZ, 0x1f, R0 ?trans1;
S2R R2, SR_TID.X &wr=0x3 ?trans1;
MOV.64 R10, 0x3fe5555555555556 ?trans2;
ISETP.GE.U32.AND P0, PT, R4, 0x7ffff, PT ?trans1;
LEA.HI R3, R3, R0, RZ, 0x12 ?trans1;
LDCU UR6, c[0x0][0x360] &wr=0x4 ?trans3;
SHF.R.S32.HI R3, RZ, 0x12, R3 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x5 ?trans1;
UMOV UR4, URZ ?trans1;
DADD R10, -R10, UR10 &req={2} &wr=0x2 ?trans2;
IMAD R4, R3, R8, R8 &req={1} ?WAIT3_END_GROUP;
@!P0 BRA 0xc80 &req={5,4,2} ?trans5;
LDC R5, c[0x0][0x388] &wr=0x1 ?trans1;
IMAD R33, R8, UR6, RZ ?trans1;
SHF.R.S32.HI R9, RZ, 0x1f, R0 ?trans1;
UIADD3 UR5, UPT, UPT, UR6, UR6, URZ ?trans1;
MOV R8, R0 ?trans1;
IADD3 R13, PT, PT, R3, 0x1, RZ ?trans2;
IADD3 R37, PT, PT, R4, 0x1, RZ ?trans1;
UMOV UR4, URZ ?trans1;
LDC.64 R6, c[0x0][0x380] &wr=0x2 ?trans1;
IADD.64 R14, R8, R8 ?WAIT2_END_GROUP;
IMAD R33, R13.reuse, R33, R2.reuse &req={3} ?trans1;
LOP3.LUT R32, R13, 0xfffffffe, RZ, 0xc0, !PT ?trans1;
IADD.64 R12, R8, R14 ?trans2;
IMAD R37, R37, UR6, R2 ?trans1;
SHF.L.U64.HI R15, R14.reuse, 0x3, R15 ?trans1;
IMAD.SHL.U32 R14, R14, 0x8, RZ ?trans1;
IADD3 R32, PT, PT, -R32, RZ, RZ ?trans2;
SHF.L.U64.HI R17, R12.reuse, 0x3, R13 ?trans1;
IMAD.SHL.U32 R16, R12, 0x8, RZ ?WAIT7_END_GROUP;
MOV R0, R5 &req={1} ?trans1;
IADD3 R32, PT, PT, R32, 0x2, RZ ?trans1;
BSSY.RECONVERGENT B0, 0x750 ?trans3;
ISETP.GE.AND P2, PT, R33, R0.reuse, PT ?trans1;
ISETP.NE.AND P0, PT, R32, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R37, R0, PT ?WAIT11_END_GROUP;
@P2 BRA 0x740 &req={4,3} ?trans5;
IMAD.WIDE R30, R33, 0x8, R6 &req={2} ?trans1;
IADD.64 R22, R8, R12 ?trans2;
MOV.64 R18, 0x3fac71c71c71c71c ?trans2;
IADD.64 R26, R30, R14 ?trans2;
IMAD.WIDE R34, R0, 0x8, R30 ?trans1;
LEA R28, P2, R22, R30, 0x3 ?trans1;
IADD.64 R20, R8, R22 ?trans2;
STG.E.64 desc[UR8][R30.64], R10 ?trans1;
IADD.64 R24, R30, R16 ?WAIT3_END_GROUP;
STG.E.64 desc[UR8][R34.64], R18 ?trans1;
LEA.HI.X R29, R22, R31.reuse, R23, 0x3, P2 ?trans2;
LEA R22, P2, R20.reuse, R30, 0x3 ?trans1;
STG.E.64 desc[UR8][R26.64], R18 &rd=0x1 ?trans3;
LEA.HI.X R23, R20, R31, R21, 0x3, P2 ?trans1;
STG.E.64 desc[UR8][R24.64], R18 &rd=0x2 ?trans4;
STG.E.64 desc[UR8][R28.64], R18 ?trans4;
STG.E.64 desc[UR8][R22.64], R18 &rd=0x3 ?trans1;
IADD.64 R26, R8, R20 &req={1} ?WAIT4_END_GROUP;
IADD.64 R24, R8, R26 &req={2} ?WAIT3_END_GROUP;
LEA R20, P2, R26, R30.reuse, 0x3 ?trans2;
LEA R34, P3, R24, R30, 0x3 ?trans2;
LEA.HI.X R21, R26, R31, R27, 0x3, P2 ?trans1;
IADD.64 R22, R8, R24 &req={3} ?WAIT3_END_GROUP;
LEA.HI.X R35, R24, R31, R25, 0x3, P3 ?trans1;
STG.E.64 desc[UR8][R20.64], R18 &rd=0x1 ?trans1;
LEA R28, P2, R22, R30, 0x3 ?WAIT4_END_GROUP;
LEA.HI.X R29, R22, R31, R23, 0x3, P2 ?trans1;
IADD.64 R18, R8.reuse, R22 &req={1} ?trans2;
MOV.64 R20, 0x3f9c71c71c71c723 ?trans2;
IADD.64 R26, R8, R18 ?WAIT3_END_GROUP;
LEA R24, P2, R18.reuse, R30, 0x3 ?trans1;
STG.E.64 desc[UR8][R34.64], R20 ?trans3;
LEA.HI.X R25, R18, R31, R19, 0x3, P2 ?trans1;
IADD.64 R18, R8, R26 ?trans2;
STG.E.64 desc[UR8][R28.64], R20 ?trans1;
LEA R22, P2, R26, R30, 0x3 ?WAIT3_END_GROUP;
STG.E.64 desc[UR8][R24.64], R20 &rd=0x1 ?trans1;
LEA.HI.X R23, R26, R31, R27, 0x3, P2 ?trans2;
LEA R26, P2, R18, R30, 0x3 ?WAIT3_END_GROUP;
STG.E.64 desc[UR8][R22.64], R20 &rd=0x2 ?trans1;
LEA.HI.X R27, R18, R31, R19, 0x3, P2 ?WAIT5_END_GROUP;
STG.E.64 desc[UR8][R26.64], R20 &rd=0x3 ?trans1;
IADD.64 R24, R8, R18 &req={1} ?WAIT5_END_GROUP;
LEA R18, P2, R24, R30, 0x3 ?trans1;
IADD.64 R22, R8, R24 &req={2} ?WAIT3_END_GROUP;
LEA.HI.X R19, R24, R31, R25, 0x3, P2 ?trans2;
LEA R28, P2, R22, R30, 0x3 ?trans1;
IADD.64 R26, R8, R22 &req={3} ?trans2;
STG.E.64 desc[UR8][R18.64], R20 &rd=0x1 ?trans1;
LEA.HI.X R29, R22, R31, R23, 0x3, P2 ?trans2;
LEA R34, P3, R26, R30, 0x3 ?WAIT3_END_GROUP;
STG.E.64 desc[UR8][R28.64], R20 &rd=0x2 ?trans1;
LEA.HI.X R35, R26, R31, R27, 0x3, P3 ?trans1;
IADD.64 R26, R8, R26 ?WAIT4_END_GROUP;
STG.E.64 desc[UR8][R34.64], R20 &rd=0x3 ?trans1;
LEA R24, P2, R26, R30, 0x3 ?trans1;
IADD.64 R18, R8, R26 &req={1} ?WAIT3_END_GROUP;
LEA.HI.X R25, R26, R31, R27, 0x3, P2 ?trans2;
LEA R22, P3, R18, R30, 0x3 ?trans1;
IADD.64 R28, R8, R18 &req={2} ?trans2;
STG.E.64 desc[UR8][R24.64], R20 &rd=0x3 ?trans1;
LEA.HI.X R23, R18, R31, R19, 0x3, P3 ?trans1;
IADD.64 R26, R8, R28 ?WAIT3_END_GROUP;
LEA R18, P2, R28.reuse, R30.reuse, 0x3 ?trans1;
STG.E.64 desc[UR8][R22.64], R20 &rd=0x3 ?trans3;
LEA.HI.X R19, R28, R31, R29, 0x3, P2 ?trans2;
LEA R28, P2, R26, R30, 0x3 ?WAIT3_END_GROUP;
STG.E.64 desc[UR8][R18.64], R20 &rd=0x3 ?trans1;
LEA.HI.X R29, R26, R31, R27, 0x3, P2 ?WAIT5_END_GROUP;
STG.E.64 desc[UR8][R28.64], R20 &rd=0x3 ?trans4;
BSYNC.RECONVERGENT B0 ?trans5;
BSSY.RECONVERGENT B0, 0xc40 ?trans4;
@P1 BRA 0xc30 ?trans5;
SHF.R.S32.HI R9, RZ, 0x1f, R0 ?trans1;
IMAD.WIDE R18, R37, 0x8, R6 &req={3,2} ?trans1;
MOV R8, R0 ?trans1;
MOV.64 R34, 0x3fac71c71c71c71c ?WAIT3_END_GROUP;
STG.E.64 desc[UR8][R18.64], R10 ?trans1;
IADD.64 R20, R8, R8 ?WAIT4_END_GROUP;
IADD.64 R12, R8, R20 ?WAIT3_END_GROUP;
LEA R30, P1, R20, R18, 0x3 ?trans1;
IADD.64 R22, R8, R12 ?WAIT3_END_GROUP;
LEA.HI.X R31, R20, R19, R21, 0x3, P1 ?trans1;
IMAD.WIDE R20, R0, 0x8, R18 ?trans1;
LEA R24, P1, R12, R18, 0x3 ?WAIT4_END_GROUP;
LEA.HI.X R25, R12, R19, R13, 0x3, P1 ?trans1;
STG.E.64 desc[UR8][R20.64], R34 &rd=0x1 ?trans1;
LEA R28, P1, R22, R18, 0x3 ?WAIT3_END_GROUP;
STG.E.64 desc[UR8][R30.64], R34 ?trans1;
LEA.HI.X R29, R22, R19, R23, 0x3, P1 ?WAIT3_END_GROUP;
STG.E.64 desc[UR8][R24.64], R34 &rd=0x2 ?trans4;
STG.E.64 desc[UR8][R28.64], R34 &rd=0x3 ?trans1;
IADD.64 R20, R8, R22 &req={1} ?WAIT5_END_GROUP;
LEA R26, P1, R20, R18, 0x3 ?trans1;
IADD.64 R24, R8, R20 &req={2} ?WAIT3_END_GROUP;
LEA.HI.X R27, R20, R19, R21, 0x3, P1 ?trans1;
IADD.64 R22, R8, R24 ?WAIT3_END_GROUP;
LEA R20, P1, R24, R18.reuse, 0x3 ?trans1;
STG.E.64 desc[UR8][R26.64], R34 &rd=0x1 ?trans1;
LEA R30, P2, R22, R18, 0x3 ?trans2;
LEA.HI.X R21, R24, R19.reuse, R25, 0x3, P1 ?trans2;
LEA.HI.X R31, R22, R19, R23, 0x3, P2 ?trans1;
IADD.64 R22, R8.reuse, R22 ?trans2;
STG.E.64 desc[UR8][R20.64], R34 &rd=0x2 ?trans2;
IADD.64 R28, R8, R22 &req={3} ?WAIT3_END_GROUP;
LEA R24, P1, R22, R18, 0x3 ?WAIT4_END_GROUP;
LEA.HI.X R25, R22, R19, R23, 0x3, P1 ?trans1;
IADD.64 R22, R8, R28 ?WAIT3_END_GROUP;
LEA R26, P1, R28, R18, 0x3 &req={1} ?trans1;
MOV.64 R20, 0x3f9c71c71c71c723 &req={2} ?WAIT3_END_GROUP;
LEA.HI.X R27, R28, R19.reuse, R29, 0x3, P1 ?trans2;
LEA R34, P1, R22.reuse, R18, 0x3 ?trans1;
STG.E.64 desc[UR8][R30.64], R20 ?trans3;
LEA.HI.X R35, R22, R19, R23, 0x3, P1 ?trans1;
STG.E.64 desc[UR8][R24.64], R20 &rd=0x1 ?trans4;
STG.E.64 desc[UR8][R26.64], R20 ?trans4;
STG.E.64 desc[UR8][R34.64], R20 ?trans1;
IADD.64 R24, R8, R22 &req={1} ?WAIT4_END_GROUP;
IADD.64 R22, R8, R24 ?WAIT3_END_GROUP;
LEA R28, P1, R24, R18, 0x3 ?WAIT4_END_GROUP;
LEA.HI.X R29, R24, R19, R25, 0x3, P1 ?trans1;
IADD.64 R24, R8, R22 ?WAIT3_END_GROUP;
LEA R30, P1, R22.reuse, R18.reuse, 0x3 ?trans1;
STG.E.64 desc[UR8][R28.64], R20 &rd=0x1 ?trans3;
LEA.HI.X R31, R22, R19, R23, 0x3, P1 ?trans2;
LEA R22, P1, R24, R18, 0x3 ?WAIT3_END_GROUP;
STG.E.64 desc[UR8][R30.64], R20 ?trans1;
LEA.HI.X R23, R24, R19, R25, 0x3, P1 ?trans1;
IADD.64 R28, R8, R24 &req={1} ?WAIT4_END_GROUP;
STG.E.64 desc[UR8][R22.64], R20 &rd=0x1 ?trans1;
IADD.64 R24, R8, R28 ?WAIT3_END_GROUP;
LEA R26, P1, R28, R18, 0x3 ?WAIT4_END_GROUP;
LEA.HI.X R27, R28, R19, R29, 0x3, P1 ?trans2;
LEA R34, P1, R24, R18, 0x3 ?trans1;
IADD.64 R22, R8, R24 &req={1} ?trans2;
STG.E.64 desc[UR8][R26.64], R20 &rd=0x1 ?trans1;
LEA.HI.X R35, R24, R19, R25, 0x3, P1 ?trans2;
LEA R24, P1, R22, R18, 0x3 ?WAIT3_END_GROUP;
STG.E.64 desc[UR8][R34.64], R20 &rd=0x4 ?trans1;
LEA.HI.X R25, R22, R19, R23, 0x3, P1 ?WAIT5_END_GROUP;
STG.E.64 desc[UR8][R24.64], R20 &rd=0x4 ?trans1;
IADD.64 R26, R8, R22 &req={1} ?WAIT4_END_GROUP;
IADD.64 R28, R8, R26 ?WAIT3_END_GROUP;
LEA R30, P2, R26, R18.reuse, 0x3 ?trans2;
LEA R18, P1, R28, R18, 0x3 ?trans2;
LEA.HI.X R31, R26, R19.reuse, R27, 0x3, P2 ?trans2;
LEA.HI.X R19, R28, R19, R29, 0x3, P1 ?WAIT3_END_GROUP;
STG.E.64 desc[UR8][R30.64], R20 &rd=0x4 ?trans4;
STG.E.64 desc[UR8][R18.64], R20 &rd=0x4 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
UIADD3 UR4, UPT, UPT, UR4, 0x2, URZ ?trans1;
IADD3 R37, PT, PT, R37, UR5, RZ ?trans2;
IADD3 R33, PT, PT, R33, UR5, RZ ?trans1;
@P0 BRA 0x270 ?trans8;
LOP3.LUT R3, R3, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P0, PT, R3, 0x1, PT ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
IADD3 R3, PT, PT, R4, UR4, RZ ?WAIT5_END_GROUP;
IMAD R7, R3, UR6, R2 &req={3,2} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, R0, PT ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x1 ?trans1;
SHF.R.S32.HI R3, RZ, 0x1f, R0 ?trans1;
MOV R2, R0 ?WAIT5_END_GROUP;
IADD.64 R16, R2, R2 ?WAIT4_END_GROUP;
IADD.64 R18, R2, R16 &req={4} ?WAIT4_END_GROUP;
IADD.64 R20, R2, R18 ?WAIT4_END_GROUP;
IADD.64 R22, R2, R20 ?trans2;
IMAD.WIDE R4, R7, 0x8, R4 &req={1} ?trans1;
MOV.64 R6, 0x3fac71c71c71c71c ?WAIT3_END_GROUP;
LEA R12, P0, R16, R4.reuse, 0x3 ?trans1;
STG.E.64 desc[UR8][R4.64], R10 &rd=0x1 ?trans1;
LEA R14, P1, R18, R4.reuse, 0x3 ?trans1;
IMAD.WIDE R8, R0, 0x8, R4 ?trans1;
LEA.HI.X R13, R16, R5.reuse, R17, 0x3, P0 ?trans2;
LEA R16, P0, R20, R4, 0x3 ?trans2;
LEA.HI.X R15, R18, R5.reuse, R19, 0x3, P1 ?trans1;
STG.E.64 desc[UR8][R8.64], R6 &rd=0x2 ?trans1;
LEA.HI.X R17, R20, R5, R21, 0x3, P0 ?trans1;
IADD.64 R20, R2, R22 ?WAIT2_END_GROUP;
STG.E.64 desc[UR8][R12.64], R6 &rd=0x3 ?trans1;
LEA R18, P0, R22, R4, 0x3 ?trans1;
IADD.64 R24, R2, R20 ?trans2;
STG.E.64 desc[UR8][R14.64], R6 &rd=0x4 ?trans1;
LEA R10, P1, R20, R4, 0x3 &req={1} ?trans2;
LEA.HI.X R19, R22, R5, R23, 0x3, P0 ?trans1;
IADD.64 R22, R2, R24 ?trans2;
STG.E.64 desc[UR8][R16.64], R6 &rd=0x1 ?trans1;
LEA.HI.X R11, R20, R5, R21, 0x3, P1 ?trans1;
MOV.64 R8, 0x3f9c71c71c71c723 &req={2} ?WAIT2_END_GROUP;
STG.E.64 desc[UR8][R18.64], R6 &rd=0x2 ?trans1;
LEA R20, P0, R24, R4, 0x3 ?WAIT3_END_GROUP;
STG.E.64 desc[UR8][R10.64], R6 ?trans1;
LEA.HI.X R21, R24, R5, R25, 0x3, P0 ?trans1;
IADD.64 R24, R2, R22 ?WAIT3_END_GROUP;
LEA R12, P0, R22.reuse, R4, 0x3 &req={3} ?trans1;
STG.E.64 desc[UR8][R20.64], R8 &rd=0x3 ?trans3;
LEA.HI.X R13, R22, R5, R23, 0x3, P0 ?trans1;
IADD.64 R22, R2, R24 ?WAIT3_END_GROUP;
LEA R14, P0, R24, R4, 0x3 &req={4} ?trans1;
IADD.64 R26, R2, R22 ?trans2;
STG.E.64 desc[UR8][R12.64], R8 &rd=0x4 ?trans1;
LEA R16, P1, R22, R4, 0x3 &req={1} ?trans2;
LEA.HI.X R15, R24, R5.reuse, R25, 0x3, P0 ?trans2;
LEA.HI.X R17, R22, R5, R23, 0x3, P1 ?trans1;
IADD.64 R22, R2, R26 ?trans2;
STG.E.64 desc[UR8][R14.64], R8 &rd=0x1 ?trans1;
LEA R18, P0, R26, R4, 0x3 &req={2} ?trans1;
IADD.64 R20, R2, R22 &req={3} ?WAIT2_END_GROUP;
STG.E.64 desc[UR8][R16.64], R8 ?trans1;
LEA.HI.X R19, R26, R5, R27, 0x3, P0 ?trans1;
IADD.64 R24, R2, R20 ?WAIT3_END_GROUP;
LEA R10, P1, R20, R4.reuse, 0x3 ?trans1;
STG.E.64 desc[UR8][R18.64], R8 &rd=0x2 ?trans1;
LEA R6, P0, R22, R4, 0x3 ?trans2;
LEA.HI.X R11, R20, R5, R21, 0x3, P1 ?trans1;
IADD.64 R20, R2, R24 ?WAIT3_END_GROUP;
LEA.HI.X R7, R22, R5, R23, 0x3, P0 ?trans1;
IADD.64 R22, R2, R20 ?WAIT3_END_GROUP;
LEA R12, P0, R24.reuse, R4, 0x3 &req={4} ?trans1;
STG.E.64 desc[UR8][R6.64], R8 ?trans3;
LEA.HI.X R13, R24, R5, R25, 0x3, P0 ?trans1;
IADD.64 R24, R2, R22 ?trans2;
STG.E.64 desc[UR8][R10.64], R8 ?trans1;
LEA R14, P0, R20, R4, 0x3 &req={1} ?trans1;
IADD.64 R18, R2, R24 &req={2} ?trans2;
STG.E.64 desc[UR8][R12.64], R8 ?trans1;
LEA.HI.X R15, R20, R5, R21, 0x3, P0 ?WAIT2_END_GROUP;
LEA R16, P0, R22, R4.reuse, 0x3 ?trans2;
LEA R2, P1, R24, R4.reuse, 0x3 ?trans1;
STG.E.64 desc[UR8][R14.64], R8 ?trans1;
LEA.HI.X R17, R22, R5.reuse, R23, 0x3, P0 ?trans2;
LEA R4, P0, R18, R4, 0x3 ?trans2;
LEA.HI.X R3, R24, R5.reuse, R25, 0x3, P1 ?trans1;
STG.E.64 desc[UR8][R16.64], R8 ?trans1;
LEA.HI.X R5, R18, R5, R19, 0x3, P0 ?WAIT3_END_GROUP;
STG.E.64 desc[UR8][R2.64], R8 ?trans4;
STG.E.64 desc[UR8][R4.64], R8 ?trans1;
EXIT ?trans5;
BRA 0x11d0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: dvc_ScaLBL_D3Q19_GreyIMRT_Init(double*, int, double)
_Z30dvc_ScaLBL_D3Q19_GreyIMRT_InitPdid:
s_load_b32 s2, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s2, 0xfffc0001
s_cbranch_scc1 .LBB6_5
s_clause 0x1
s_load_b64 s[4:5], s[0:1], 0x10
s_load_b32 s8, s[0:1], 0x24
s_mov_b32 s6, 0x55555556
s_mov_b32 s7, 0xbfe55555
s_ashr_i32 s3, s2, 31
s_load_b64 s[0:1], s[0:1], 0x0
s_lshl_b32 s12, s2, 1
s_mul_i32 s13, s2, 3
s_lshl_b32 s14, s2, 2
s_mul_i32 s16, s2, 6
s_mul_i32 s17, s2, 7
s_lshl_b32 s18, s2, 3
s_mul_i32 s19, s2, 9
s_mul_i32 s20, s2, 10
s_mul_i32 s21, s2, 11
s_mul_i32 s22, s2, 12
s_mul_i32 s23, s2, 13
s_mul_i32 s24, s2, 14
s_mul_i32 s25, s2, 15
s_lshl_b32 s26, s2, 4
s_waitcnt lgkmcnt(0)
v_add_f64 v[1:2], s[4:5], s[6:7]
s_lshr_b32 s4, s3, 14
s_and_b32 s11, s8, 0xffff
s_add_i32 s4, s2, s4
s_mov_b32 s6, 0x1c71c723
s_ashr_i32 s4, s4, 18
s_mov_b32 s7, 0x3f9c71c7
s_add_i32 s10, s4, 1
s_mov_b32 s4, 0x1c71c71c
s_mul_i32 s15, s15, s10
s_mov_b32 s5, 0x3fac71c7
s_mul_i32 s27, s2, 17
s_mul_i32 s28, s2, 18
s_lshl_b64 s[8:9], s[2:3], 3
s_delay_alu instid0(VALU_DEP_1)
v_mad_u64_u32 v[3:4], null, s15, s11, v[0:1]
s_mul_i32 s15, s2, 5
.LBB6_2:
s_mov_b32 s3, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s2, v3
s_cbranch_execz .LBB6_4
v_ashrrev_i32_e32 v4, 31, v3
v_dual_mov_b32 v10, s5 :: v_dual_add_nc_u32 v5, s12, v3
v_add_nc_u32_e32 v11, s13, v3
v_mov_b32_e32 v9, s4
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[7:8], 3, v[3:4]
v_ashrrev_i32_e32 v6, 31, v5
v_add_nc_u32_e32 v15, s16, v3
v_ashrrev_i32_e32 v12, 31, v11
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[4:5], 3, v[5:6]
v_add_nc_u32_e32 v6, s14, v3
v_add_co_u32 v7, vcc_lo, s0, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
v_lshlrev_b64 v[11:12], 3, v[11:12]
v_add_co_u32 v13, vcc_lo, v7, s8
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v14, vcc_lo, s9, v8, vcc_lo
s_clause 0x1
global_store_b64 v[7:8], v[1:2], off
global_store_b64 v[13:14], v[9:10], off
v_add_nc_u32_e32 v13, s15, v3
v_add_co_u32 v4, vcc_lo, s0, v4
v_ashrrev_i32_e32 v7, 31, v6
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
v_add_co_u32 v11, vcc_lo, s0, v11
v_ashrrev_i32_e32 v14, 31, v13
v_add_co_ci_u32_e32 v12, vcc_lo, s1, v12, vcc_lo
v_lshlrev_b64 v[6:7], 3, v[6:7]
v_ashrrev_i32_e32 v16, 31, v15
s_clause 0x1
global_store_b64 v[4:5], v[9:10], off
global_store_b64 v[11:12], v[9:10], off
v_lshlrev_b64 v[4:5], 3, v[13:14]
v_add_nc_u32_e32 v13, s17, v3
v_add_nc_u32_e32 v8, s19, v3
v_add_co_u32 v6, vcc_lo, s0, v6
v_lshlrev_b64 v[11:12], 3, v[15:16]
v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
v_add_nc_u32_e32 v15, s18, v3
v_add_co_u32 v4, vcc_lo, s0, v4
v_ashrrev_i32_e32 v14, 31, v13
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
v_add_co_u32 v11, vcc_lo, s0, v11
v_ashrrev_i32_e32 v16, 31, v15
v_add_co_ci_u32_e32 v12, vcc_lo, s1, v12, vcc_lo
global_store_b64 v[6:7], v[9:10], off
v_lshlrev_b64 v[6:7], 3, v[13:14]
s_clause 0x1
global_store_b64 v[4:5], v[9:10], off
global_store_b64 v[11:12], v[9:10], off
v_mov_b32_e32 v11, s7
v_lshlrev_b64 v[4:5], 3, v[15:16]
v_ashrrev_i32_e32 v9, 31, v8
v_add_nc_u32_e32 v12, s20, v3
v_add_co_u32 v6, vcc_lo, s0, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
v_add_nc_u32_e32 v14, s21, v3
v_add_co_u32 v4, vcc_lo, s0, v4
v_mov_b32_e32 v10, s6
v_ashrrev_i32_e32 v13, 31, v12
v_lshlrev_b64 v[8:9], 3, v[8:9]
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
v_ashrrev_i32_e32 v15, 31, v14
s_clause 0x1
global_store_b64 v[6:7], v[10:11], off
global_store_b64 v[4:5], v[10:11], off
v_lshlrev_b64 v[4:5], 3, v[12:13]
v_add_co_u32 v6, vcc_lo, s0, v8
v_add_nc_u32_e32 v12, s22, v3
v_add_co_ci_u32_e32 v7, vcc_lo, s1, v9, vcc_lo
v_lshlrev_b64 v[8:9], 3, v[14:15]
v_add_nc_u32_e32 v14, s23, v3
v_add_co_u32 v4, vcc_lo, s0, v4
v_ashrrev_i32_e32 v13, 31, v12
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
v_add_co_u32 v8, vcc_lo, s0, v8
v_ashrrev_i32_e32 v15, 31, v14
v_add_co_ci_u32_e32 v9, vcc_lo, s1, v9, vcc_lo
global_store_b64 v[6:7], v[10:11], off
v_lshlrev_b64 v[6:7], 3, v[12:13]
s_clause 0x1
global_store_b64 v[4:5], v[10:11], off
global_store_b64 v[8:9], v[10:11], off
v_lshlrev_b64 v[4:5], 3, v[14:15]
v_add_nc_u32_e32 v8, s24, v3
v_add_nc_u32_e32 v12, s25, v3
v_add_nc_u32_e32 v14, s26, v3
v_add_co_u32 v6, vcc_lo, s0, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
v_ashrrev_i32_e32 v9, 31, v8
v_add_co_u32 v4, vcc_lo, s0, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
v_ashrrev_i32_e32 v13, 31, v12
v_ashrrev_i32_e32 v15, 31, v14
global_store_b64 v[6:7], v[10:11], off
v_lshlrev_b64 v[6:7], 3, v[8:9]
v_add_nc_u32_e32 v8, s27, v3
global_store_b64 v[4:5], v[10:11], off
v_lshlrev_b64 v[4:5], 3, v[12:13]
v_lshlrev_b64 v[12:13], 3, v[14:15]
v_add_nc_u32_e32 v14, s28, v3
v_ashrrev_i32_e32 v9, 31, v8
v_add_co_u32 v6, vcc_lo, s0, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
s_delay_alu instid0(VALU_DEP_4)
v_ashrrev_i32_e32 v15, 31, v14
v_add_co_u32 v4, vcc_lo, s0, v4
v_lshlrev_b64 v[8:9], 3, v[8:9]
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
v_add_co_u32 v12, vcc_lo, s0, v12
v_lshlrev_b64 v[14:15], 3, v[14:15]
v_add_co_ci_u32_e32 v13, vcc_lo, s1, v13, vcc_lo
v_add_co_u32 v8, vcc_lo, s0, v8
v_add_co_ci_u32_e32 v9, vcc_lo, s1, v9, vcc_lo
s_delay_alu instid0(VALU_DEP_4)
v_add_co_u32 v14, vcc_lo, s0, v14
v_add_co_ci_u32_e32 v15, vcc_lo, s1, v15, vcc_lo
s_clause 0x4
global_store_b64 v[6:7], v[10:11], off
global_store_b64 v[4:5], v[10:11], off
global_store_b64 v[12:13], v[10:11], off
global_store_b64 v[8:9], v[10:11], off
global_store_b64 v[14:15], v[10:11], off
.LBB6_4:
s_or_b32 exec_lo, exec_lo, s3
v_add_nc_u32_e32 v3, s11, v3
s_add_i32 s10, s10, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s10, 0
s_cbranch_scc0 .LBB6_2
.LBB6_5:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| dvc_ScaLBL_D3Q19_GreyIMRT_Init | 7,580 | 3,627 | stackv2-00000-of-00015 |
// Demangled: grayscale(float4*, int, int)
Function : _Z9grayscaleP6float4ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.Y &wr=0x1 ?trans1;
LDCU UR7, c[0x0][0x360] &wr=0x2 ?trans6;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
S2R R5, SR_TID.X &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x388] &wr=0x3 ?trans6;
LDC R0, c[0x0][0x364] &wr=0x1 ?trans1;
UIMAD UR4, UR5, UR4, URZ &req={3} ?trans1;
IMAD R0, R0, UR6, R3 &req={1} ?WAIT4_END_GROUP;
IMAD R5, R0, UR7, R5 &req={2} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR4, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE R2, R5, 0x10, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E.128 R8, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
UMOV.64 UR6, 0x3fe3333333333333 ?trans1;
MOV R15, RZ ?trans1;
F2F.F64.F32 R4, R9 &req={2} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R6, R4, UR6 &req={0} &rd=0x0 &wr=0x1 ?trans1;
UMOV.64 UR6, 0x3fd3333333333333 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R4, R8 &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R4, UR6, R6 &req={1} &rd=0x0 &wr=0x1 ?trans1;
UMOV.64 UR6, 0x3fb999999999999a ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R6, R10 &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R6, UR6, R4 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R12, R4 &req={0} &wr=0x0 ?trans2;
MOV R13, R12.reuse &req={0} ?trans1;
MOV R14, R12 ?WAIT5_END_GROUP;
STG.E.128 desc[UR4][R2.64], R12 ?trans1;
EXIT ?trans5;
BRA 0x370;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: grayscale(HIP_vector_type<float, 4u>*, int, int)
_Z9grayscaleP15HIP_vector_typeIfLj4EEii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x1c
s_load_b64 s[2:3], s[0:1], 0x8
v_bfe_u32 v1, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s5, s4, 16
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, s15, s5, v[1:2]
v_and_b32_e32 v3, 0x3ff, v0
s_mul_i32 s2, s3, s2
v_mad_u64_u32 v[0:1], null, v2, s4, v[3:4]
s_delay_alu instid0(VALU_DEP_1)
v_cmp_gt_i32_e32 vcc_lo, s2, v0
s_and_saveexec_b32 s2, vcc_lo
s_cbranch_execz .LBB0_2
s_load_b64 s[0:1], s[0:1], 0x0
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 4, v[0:1]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v1, vcc_lo
s_mov_b32 s1, 0x3fe33333
s_mov_b32 s0, 0x33333333
global_load_b96 v[0:2], v[4:5], off
s_waitcnt vmcnt(0)
v_cvt_f64_f32_e32 v[6:7], v1
v_cvt_f64_f32_e32 v[0:1], v0
v_cvt_f64_f32_e32 v[2:3], v2
s_delay_alu instid0(VALU_DEP_3)
v_mul_f64 v[6:7], v[6:7], s[0:1]
s_mov_b32 s1, 0x3fd33333
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_fma_f64 v[0:1], v[0:1], s[0:1], v[6:7]
s_mov_b32 s0, 0x9999999a
s_mov_b32 s1, 0x3fb99999
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_fma_f64 v[0:1], v[2:3], s[0:1], v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f32_f64_e32 v0, v[0:1]
v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v2, v0
v_mov_b32_e32 v1, v0
global_store_b128 v[4:5], v[0:3], off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| grayscale | 1,049 | 966 | stackv2-00000-of-00015 |
// Demangled: kernel_RadixSort(unsigned int*, unsigned int*, unsigned int*, unsigned int)
Function : _Z16kernel_RadixSortPjS_S_j
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R11, SR_CTAID.X &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x360] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans5;
LDC.64 R4, c[0x0][0x390] &wr=0x3 ?trans8;
LDC.64 R8, c[0x0][0x388] &wr=0x4 ?trans1;
IMAD R11, R11, UR6, R0 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R6, R11, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
LDG.E R19, desc[UR4][R6.64] &req={2} &wr=0x2 ?trans1;
IMAD.WIDE.U32 R4, R11, 0x4, R4 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R8, R11, 0x4, R8 &req={4} ?trans1;
LOP3.LUT P1, R0, R19, 0x1, RZ, 0xc0, !PT &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R0, RZ, PT ?WAIT8_END_GROUP;
@P1 STG.E desc[UR4][R4.64], R19 ?trans4;
@!P1 STG.E desc[UR4][R8.64], R19 &rd=0x0 ?trans4;
@P0 LDG.E R15, desc[UR4][R4.64] &wr=0x2 ?trans1;
@P1 MOV R0, RZ ?trans1;
@!P1 MOV R0, 0x20 ?WAIT5_END_GROUP;
@P0 IADD3 R13, PT, PT, R11, R0, RZ ?WAIT5_END_GROUP;
@P0 IMAD.WIDE.U32 R12, R13, 0x4, R2 ?WAIT5_END_GROUP;
@P0 STG.E desc[UR4][R12.64], R15 &req={2} &rd=0x1 ?trans4;
@P0 LDG.E R17, desc[UR4][R6.64] &wr=0x2 ?trans4;
@!P0 LDG.E R17, desc[UR4][R8.64] &wr=0x2 ?trans2;
LOP3.LUT P1, R0, R17, 0x2, RZ, 0xc0, !PT &req={2} ?WAIT2_END_GROUP;
@!P0 STG.E desc[UR4][R6.64], R17 ?trans3;
ISETP.NE.AND P2, PT, R0, RZ, PT ?WAIT8_END_GROUP;
@P1 STG.E desc[UR4][R4.64], R17 ?trans4;
@!P1 STG.E desc[UR4][R8.64], R17 ?trans4;
@!P2 LDG.E R19, desc[UR4][R8.64] &req={0} &wr=0x2 ?trans1;
@P1 MOV R0, RZ ?trans1;
@!P1 MOV R0, 0x20 ?WAIT5_END_GROUP;
@P2 IADD3 R13, PT, PT, R11, R0, RZ &req={1} ?trans1;
@!P2 STG.E desc[UR4][R6.64], R19 &req={2} ?trans4;
@P2 LDG.E R21, desc[UR4][R4.64] &wr=0x2 ?trans1;
@P2 IMAD.WIDE.U32 R12, R13, 0x4, R2 ?WAIT5_END_GROUP;
@P2 STG.E desc[UR4][R12.64], R21 &req={2} &rd=0x0 ?trans4;
@P2 LDG.E R19, desc[UR4][R6.64] &wr=0x2 ?trans2;
LOP3.LUT P0, R0, R19, 0x4, RZ, 0xc0, !PT &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R0, RZ, PT ?WAIT8_END_GROUP;
@P0 STG.E desc[UR4][R4.64], R19 ?trans4;
@!P0 STG.E desc[UR4][R8.64], R19 ?trans4;
@!P1 LDG.E R15, desc[UR4][R8.64] &wr=0x2 ?trans1;
@P0 MOV R0, RZ ?trans1;
@!P0 MOV R0, 0x20 ?WAIT5_END_GROUP;
@P1 IADD3 R13, PT, PT, R11, R0, RZ &req={0} ?trans1;
@!P1 STG.E desc[UR4][R6.64], R15 &req={2} ?trans4;
@P1 LDG.E R17, desc[UR4][R4.64] &wr=0x2 ?trans1;
@P1 IMAD.WIDE.U32 R12, R13, 0x4, R2 ?WAIT5_END_GROUP;
@P1 STG.E desc[UR4][R12.64], R17 &req={2} &rd=0x0 ?trans4;
@P1 LDG.E R15, desc[UR4][R6.64] &wr=0x2 ?trans2;
LOP3.LUT P0, R0, R15, 0x8, RZ, 0xc0, !PT &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R0, RZ, PT ?WAIT8_END_GROUP;
@P0 STG.E desc[UR4][R4.64], R15 ?trans4;
@!P0 STG.E desc[UR4][R8.64], R15 ?trans4;
@!P1 LDG.E R21, desc[UR4][R8.64] &wr=0x2 ?trans1;
@P0 MOV R0, RZ ?trans1;
@!P0 MOV R0, 0x20 ?WAIT5_END_GROUP;
@P1 IADD3 R13, PT, PT, R11, R0, RZ &req={0} ?trans1;
@!P1 STG.E desc[UR4][R6.64], R21 &req={2} &rd=0x0 ?trans4;
@P1 LDG.E R19, desc[UR4][R4.64] &wr=0x2 ?trans1;
@P1 IMAD.WIDE.U32 R12, R13, 0x4, R2 ?WAIT5_END_GROUP;
@P1 STG.E desc[UR4][R12.64], R19 &req={2} &rd=0x1 ?trans4;
LDG.E R17, desc[UR4][R6.64] &wr=0x2 ?trans2;
LOP3.LUT P1, R0, R17, 0x10, RZ, 0xc0, !PT &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R0, RZ, PT ?WAIT8_END_GROUP;
@P1 STG.E desc[UR4][R4.64], R17 ?trans4;
@!P1 STG.E desc[UR4][R8.64], R17 &rd=0x2 ?trans4;
@P0 LDG.E R21, desc[UR4][R4.64] &req={0} &wr=0x3 ?trans1;
@P1 MOV R0, RZ ?trans1;
@!P1 MOV R0, 0x20 ?WAIT5_END_GROUP;
@P0 IADD3 R15, PT, PT, R11, R0, RZ ?WAIT5_END_GROUP;
@P0 IMAD.WIDE.U32 R14, R15, 0x4, R2 ?WAIT5_END_GROUP;
@P0 STG.E desc[UR4][R14.64], R21 &req={3} &rd=0x0 ?trans4;
@P0 LDG.E R19, desc[UR4][R6.64] &req={1} &wr=0x3 ?trans4;
@!P0 LDG.E R19, desc[UR4][R8.64] &wr=0x3 ?trans2;
LOP3.LUT P1, R0, R19, 0x20, RZ, 0xc0, !PT &req={3} ?WAIT2_END_GROUP;
@!P0 STG.E desc[UR4][R6.64], R19 ?trans3;
ISETP.NE.AND P2, PT, R0, RZ, PT ?WAIT8_END_GROUP;
@P1 STG.E desc[UR4][R4.64], R19 ?trans4;
@!P1 STG.E desc[UR4][R8.64], R19 ?trans4;
@!P2 LDG.E R23, desc[UR4][R8.64] &wr=0x3 ?trans1;
@P1 MOV R0, RZ ?trans1;
@!P1 MOV R0, 0x20 ?WAIT5_END_GROUP;
@P2 IADD3 R13, PT, PT, R11, R0, RZ ?trans1;
@!P2 STG.E desc[UR4][R6.64], R23 &req={3} ?trans4;
@P2 LDG.E R17, desc[UR4][R4.64] &req={2} &wr=0x2 ?trans1;
@P2 IMAD.WIDE.U32 R12, R13, 0x4, R2 ?WAIT5_END_GROUP;
@P2 STG.E desc[UR4][R12.64], R17 &req={2} &rd=0x1 ?trans4;
@P2 LDG.E R23, desc[UR4][R6.64] &wr=0x2 ?trans2;
LOP3.LUT P0, R0, R23, 0x40, RZ, 0xc0, !PT &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R0, RZ, PT ?WAIT8_END_GROUP;
@P0 STG.E desc[UR4][R4.64], R23 ?trans4;
@!P0 STG.E desc[UR4][R8.64], R23 &rd=0x2 ?trans4;
@!P1 LDG.E R21, desc[UR4][R8.64] &req={0} &wr=0x3 ?trans1;
@P0 MOV R0, RZ ?trans1;
@!P0 MOV R0, 0x20 ?WAIT5_END_GROUP;
@P1 IADD3 R13, PT, PT, R11, R0, RZ &req={1} ?trans1;
@!P1 STG.E desc[UR4][R6.64], R21 &req={3} ?trans4;
@P1 LDG.E R15, desc[UR4][R4.64] &wr=0x3 ?trans1;
@P1 IMAD.WIDE.U32 R12, R13, 0x4, R2 ?WAIT5_END_GROUP;
@P1 STG.E desc[UR4][R12.64], R15 &req={3} &rd=0x0 ?trans4;
@P1 LDG.E R21, desc[UR4][R6.64] &wr=0x3 ?trans2;
LOP3.LUT P0, R0, R21, 0x80, RZ, 0xc0, !PT &req={3} ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R0, RZ, PT ?WAIT8_END_GROUP;
@P0 STG.E desc[UR4][R4.64], R21 ?trans4;
@!P0 STG.E desc[UR4][R8.64], R21 &rd=0x1 ?trans4;
@!P1 LDG.E R23, desc[UR4][R8.64] &req={2} &wr=0x2 ?trans1;
@P0 MOV R0, RZ ?trans1;
@!P0 MOV R0, 0x20 ?WAIT5_END_GROUP;
@P1 IADD3 R13, PT, PT, R11, R0, RZ &req={0} ?trans1;
@!P1 STG.E desc[UR4][R6.64], R23 &req={2} &rd=0x0 ?trans4;
@P1 LDG.E R17, desc[UR4][R4.64] &wr=0x2 ?trans1;
@P1 IMAD.WIDE.U32 R12, R13, 0x4, R2 ?WAIT5_END_GROUP;
@P1 STG.E desc[UR4][R12.64], R17 &req={2} ?trans4;
LDG.E R19, desc[UR4][R6.64] &wr=0x2 ?trans2;
LOP3.LUT P1, R0, R19, 0x100, RZ, 0xc0, !PT &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R0, RZ, PT ?WAIT8_END_GROUP;
@P1 STG.E desc[UR4][R4.64], R19 ?trans4;
@!P1 STG.E desc[UR4][R8.64], R19 &rd=0x2 ?trans4;
@P0 LDG.E R21, desc[UR4][R4.64] &req={1} &wr=0x3 ?trans1;
@P1 MOV R0, RZ ?trans1;
@!P1 MOV R0, 0x20 ?WAIT5_END_GROUP;
@P0 IADD3 R15, PT, PT, R11, R0, RZ ?WAIT5_END_GROUP;
@P0 IMAD.WIDE.U32 R14, R15, 0x4, R2 ?WAIT5_END_GROUP;
@P0 STG.E desc[UR4][R14.64], R21 &req={3} &rd=0x1 ?trans4;
@P0 LDG.E R23, desc[UR4][R6.64] &req={0} &wr=0x3 ?trans4;
@!P0 LDG.E R23, desc[UR4][R8.64] &wr=0x3 ?trans2;
LOP3.LUT P1, R0, R23, 0x200, RZ, 0xc0, !PT &req={3} ?WAIT2_END_GROUP;
@!P0 STG.E desc[UR4][R6.64], R23 ?trans3;
ISETP.NE.AND P2, PT, R0, RZ, PT ?WAIT8_END_GROUP;
@P1 STG.E desc[UR4][R4.64], R23 ?trans4;
@!P1 STG.E desc[UR4][R8.64], R23 ?trans4;
@!P2 LDG.E R19, desc[UR4][R8.64] &req={2} &wr=0x2 ?trans1;
@P1 MOV R0, RZ ?trans1;
@!P1 MOV R0, 0x20 ?WAIT5_END_GROUP;
@P2 IADD3 R13, PT, PT, R11, R0, RZ ?trans1;
@!P2 STG.E desc[UR4][R6.64], R19 &req={2} ?trans4;
@P2 LDG.E R17, desc[UR4][R4.64] &wr=0x2 ?trans1;
@P2 IMAD.WIDE.U32 R12, R13, 0x4, R2 ?WAIT5_END_GROUP;
@P2 STG.E desc[UR4][R12.64], R17 &req={2} &rd=0x0 ?trans4;
@P2 LDG.E R19, desc[UR4][R6.64] &wr=0x2 ?trans2;
LOP3.LUT P0, R0, R19, 0x400, RZ, 0xc0, !PT &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R0, RZ, PT ?WAIT8_END_GROUP;
@P0 STG.E desc[UR4][R4.64], R19 ?trans4;
@!P0 STG.E desc[UR4][R8.64], R19 ?trans4;
@!P1 LDG.E R21, desc[UR4][R8.64] &req={1} &wr=0x2 ?trans1;
@P0 MOV R0, RZ ?trans1;
@!P0 MOV R0, 0x20 ?WAIT5_END_GROUP;
@P1 IADD3 R13, PT, PT, R11, R0, RZ &req={0} ?trans1;
@!P1 STG.E desc[UR4][R6.64], R21 &req={2} ?trans4;
@P1 LDG.E R15, desc[UR4][R4.64] &wr=0x2 ?trans1;
@P1 IMAD.WIDE.U32 R12, R13, 0x4, R2 ?WAIT5_END_GROUP;
@P1 STG.E desc[UR4][R12.64], R15 &req={2} &rd=0x0 ?trans4;
@P1 LDG.E R21, desc[UR4][R6.64] &wr=0x2 ?trans2;
LOP3.LUT P0, R0, R21, 0x800, RZ, 0xc0, !PT &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R0, RZ, PT ?WAIT8_END_GROUP;
@P0 STG.E desc[UR4][R4.64], R21 ?trans4;
@!P0 STG.E desc[UR4][R8.64], R21 &rd=0x1 ?trans4;
@!P1 LDG.E R23, desc[UR4][R8.64] &wr=0x2 ?trans1;
@P0 MOV R0, RZ ?trans1;
@!P0 MOV R0, 0x20 ?WAIT5_END_GROUP;
@P1 IADD3 R13, PT, PT, R11, R0, RZ &req={0} ?trans1;
@!P1 STG.E desc[UR4][R6.64], R23 &req={2} &rd=0x0 ?trans4;
@P1 LDG.E R17, desc[UR4][R4.64] &wr=0x2 ?trans1;
@P1 IMAD.WIDE.U32 R12, R13, 0x4, R2 ?WAIT5_END_GROUP;
@P1 STG.E desc[UR4][R12.64], R17 &req={2} ?trans4;
LDG.E R19, desc[UR4][R6.64] &wr=0x2 ?trans2;
LOP3.LUT P1, R0, R19, 0x1000, RZ, 0xc0, !PT &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R0, RZ, PT ?WAIT8_END_GROUP;
@P1 STG.E desc[UR4][R4.64], R19 ?trans4;
@!P1 STG.E desc[UR4][R8.64], R19 &rd=0x2 ?trans4;
@P0 LDG.E R21, desc[UR4][R4.64] &req={1} &wr=0x3 ?trans1;
@P1 MOV R0, RZ ?trans1;
@!P1 MOV R0, 0x20 ?WAIT5_END_GROUP;
@P0 IADD3 R15, PT, PT, R11, R0, RZ ?WAIT5_END_GROUP;
@P0 IMAD.WIDE.U32 R14, R15, 0x4, R2 ?WAIT5_END_GROUP;
@P0 STG.E desc[UR4][R14.64], R21 &req={3} &rd=0x1 ?trans4;
@P0 LDG.E R23, desc[UR4][R6.64] &req={0} &wr=0x3 ?trans4;
@!P0 LDG.E R23, desc[UR4][R8.64] &wr=0x3 ?trans2;
LOP3.LUT P1, R0, R23, 0x2000, RZ, 0xc0, !PT &req={3} ?WAIT2_END_GROUP;
@!P0 STG.E desc[UR4][R6.64], R23 ?trans3;
ISETP.NE.AND P2, PT, R0, RZ, PT ?WAIT8_END_GROUP;
@P1 STG.E desc[UR4][R4.64], R23 ?trans4;
@!P1 STG.E desc[UR4][R8.64], R23 ?trans4;
@!P2 LDG.E R19, desc[UR4][R8.64] &req={2} &wr=0x2 ?trans1;
@P1 MOV R0, RZ ?trans1;
@!P1 MOV R0, 0x20 ?WAIT5_END_GROUP;
@P2 IADD3 R13, PT, PT, R11, R0, RZ ?trans1;
@!P2 STG.E desc[UR4][R6.64], R19 &req={2} ?trans4;
@P2 LDG.E R17, desc[UR4][R4.64] &wr=0x2 ?trans1;
@P2 IMAD.WIDE.U32 R12, R13, 0x4, R2 ?WAIT5_END_GROUP;
@P2 STG.E desc[UR4][R12.64], R17 &req={2} &rd=0x0 ?trans4;
@P2 LDG.E R19, desc[UR4][R6.64] &wr=0x2 ?trans2;
LOP3.LUT P0, R0, R19, 0x4000, RZ, 0xc0, !PT &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R0, RZ, PT ?WAIT8_END_GROUP;
@P0 STG.E desc[UR4][R4.64], R19 ?trans4;
@!P0 STG.E desc[UR4][R8.64], R19 ?trans4;
@!P1 LDG.E R21, desc[UR4][R8.64] &req={1} &wr=0x2 ?trans1;
@P0 MOV R0, RZ ?trans1;
@!P0 MOV R0, 0x20 ?WAIT5_END_GROUP;
@P1 IADD3 R13, PT, PT, R11, R0, RZ &req={0} ?trans1;
@!P1 STG.E desc[UR4][R6.64], R21 &req={2} ?trans4;
@P1 LDG.E R15, desc[UR4][R4.64] &wr=0x2 ?trans1;
@P1 IMAD.WIDE.U32 R12, R13, 0x4, R2 ?WAIT5_END_GROUP;
@P1 STG.E desc[UR4][R12.64], R15 &req={2} &rd=0x0 ?trans4;
@P1 LDG.E R21, desc[UR4][R6.64] &wr=0x2 ?trans2;
LOP3.LUT P0, R0, R21, 0x8000, RZ, 0xc0, !PT &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R0, RZ, PT ?WAIT8_END_GROUP;
@P0 STG.E desc[UR4][R4.64], R21 ?trans4;
@!P0 STG.E desc[UR4][R8.64], R21 &rd=0x1 ?trans4;
@!P1 LDG.E R23, desc[UR4][R8.64] &wr=0x2 ?trans1;
@P0 MOV R0, RZ ?trans1;
@!P0 MOV R0, 0x20 ?WAIT5_END_GROUP;
@P1 IADD3 R13, PT, PT, R11, R0, RZ &req={0} ?trans1;
@!P1 STG.E desc[UR4][R6.64], R23 &req={2} &rd=0x0 ?trans4;
@P1 LDG.E R17, desc[UR4][R4.64] &wr=0x2 ?trans1;
@P1 IMAD.WIDE.U32 R12, R13, 0x4, R2 ?WAIT5_END_GROUP;
@P1 STG.E desc[UR4][R12.64], R17 &req={2} ?trans4;
LDG.E R19, desc[UR4][R6.64] &wr=0x2 ?trans2;
LOP3.LUT P1, R0, R19, 0x10000, RZ, 0xc0, !PT &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R0, RZ, PT ?WAIT8_END_GROUP;
@P1 STG.E desc[UR4][R4.64], R19 ?trans4;
@!P1 STG.E desc[UR4][R8.64], R19 &rd=0x2 ?trans4;
@P0 LDG.E R21, desc[UR4][R4.64] &req={1} &wr=0x3 ?trans1;
@P1 MOV R0, RZ ?trans1;
@!P1 MOV R0, 0x20 ?WAIT5_END_GROUP;
@P0 IADD3 R15, PT, PT, R11, R0, RZ ?WAIT5_END_GROUP;
@P0 IMAD.WIDE.U32 R14, R15, 0x4, R2 ?WAIT5_END_GROUP;
@P0 STG.E desc[UR4][R14.64], R21 &req={3} &rd=0x1 ?trans4;
@P0 LDG.E R23, desc[UR4][R6.64] &req={0} &wr=0x3 ?trans4;
@!P0 LDG.E R23, desc[UR4][R8.64] &wr=0x3 ?trans2;
LOP3.LUT P1, R0, R23, 0x20000, RZ, 0xc0, !PT &req={3} ?WAIT2_END_GROUP;
@!P0 STG.E desc[UR4][R6.64], R23 ?trans3;
ISETP.NE.AND P2, PT, R0, RZ, PT ?WAIT8_END_GROUP;
@P1 STG.E desc[UR4][R4.64], R23 ?trans4;
@!P1 STG.E desc[UR4][R8.64], R23 ?trans4;
@!P2 LDG.E R19, desc[UR4][R8.64] &req={2} &wr=0x2 ?trans1;
@P1 MOV R0, RZ ?trans1;
@!P1 MOV R0, 0x20 ?WAIT5_END_GROUP;
@P2 IADD3 R13, PT, PT, R11, R0, RZ ?trans1;
@!P2 STG.E desc[UR4][R6.64], R19 &req={2} ?trans4;
@P2 LDG.E R17, desc[UR4][R4.64] &wr=0x2 ?trans1;
@P2 IMAD.WIDE.U32 R12, R13, 0x4, R2 ?WAIT5_END_GROUP;
@P2 STG.E desc[UR4][R12.64], R17 &req={2} &rd=0x0 ?trans4;
@P2 LDG.E R19, desc[UR4][R6.64] &wr=0x2 ?trans2;
LOP3.LUT P0, R0, R19, 0x40000, RZ, 0xc0, !PT &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R0, RZ, PT ?WAIT8_END_GROUP;
@P0 STG.E desc[UR4][R4.64], R19 ?trans4;
@!P0 STG.E desc[UR4][R8.64], R19 ?trans4;
@!P1 LDG.E R21, desc[UR4][R8.64] &req={1} &wr=0x2 ?trans1;
@P0 MOV R0, RZ ?trans1;
@!P0 MOV R0, 0x20 ?WAIT5_END_GROUP;
@P1 IADD3 R13, PT, PT, R11, R0, RZ &req={0} ?trans1;
@!P1 STG.E desc[UR4][R6.64], R21 &req={2} ?trans4;
@P1 LDG.E R15, desc[UR4][R4.64] &wr=0x2 ?trans1;
@P1 IMAD.WIDE.U32 R12, R13, 0x4, R2 ?WAIT5_END_GROUP;
@P1 STG.E desc[UR4][R12.64], R15 &req={2} &rd=0x0 ?trans4;
@P1 LDG.E R21, desc[UR4][R6.64] &wr=0x2 ?trans2;
LOP3.LUT P0, R0, R21, 0x80000, RZ, 0xc0, !PT &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R0, RZ, PT ?WAIT8_END_GROUP;
@P0 STG.E desc[UR4][R4.64], R21 ?trans4;
@!P0 STG.E desc[UR4][R8.64], R21 &rd=0x1 ?trans4;
@!P1 LDG.E R23, desc[UR4][R8.64] &wr=0x2 ?trans1;
@P0 MOV R0, RZ ?trans1;
@!P0 MOV R0, 0x20 ?WAIT5_END_GROUP;
@P1 IADD3 R13, PT, PT, R11, R0, RZ &req={0} ?trans1;
@!P1 STG.E desc[UR4][R6.64], R23 &req={2} &rd=0x0 ?trans4;
@P1 LDG.E R17, desc[UR4][R4.64] &wr=0x2 ?trans1;
@P1 IMAD.WIDE.U32 R12, R13, 0x4, R2 ?WAIT5_END_GROUP;
@P1 STG.E desc[UR4][R12.64], R17 &req={2} ?trans4;
LDG.E R19, desc[UR4][R6.64] &wr=0x2 ?trans2;
LOP3.LUT P1, R0, R19, 0x100000, RZ, 0xc0, !PT &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R0, RZ, PT ?WAIT8_END_GROUP;
@P1 STG.E desc[UR4][R4.64], R19 ?trans4;
@!P1 STG.E desc[UR4][R8.64], R19 &rd=0x2 ?trans4;
@P0 LDG.E R21, desc[UR4][R4.64] &req={1} &wr=0x3 ?trans1;
@P1 MOV R0, RZ ?trans1;
@!P1 MOV R0, 0x20 ?WAIT5_END_GROUP;
@P0 IADD3 R15, PT, PT, R11, R0, RZ ?WAIT5_END_GROUP;
@P0 IMAD.WIDE.U32 R14, R15, 0x4, R2 ?WAIT5_END_GROUP;
@P0 STG.E desc[UR4][R14.64], R21 &req={3} &rd=0x1 ?trans4;
@P0 LDG.E R23, desc[UR4][R6.64] &req={0} &wr=0x3 ?trans4;
@!P0 LDG.E R23, desc[UR4][R8.64] &wr=0x3 ?trans2;
LOP3.LUT P1, R0, R23, 0x200000, RZ, 0xc0, !PT &req={3} ?WAIT2_END_GROUP;
@!P0 STG.E desc[UR4][R6.64], R23 ?trans3;
ISETP.NE.AND P2, PT, R0, RZ, PT ?WAIT8_END_GROUP;
@P1 STG.E desc[UR4][R4.64], R23 ?trans4;
@!P1 STG.E desc[UR4][R8.64], R23 ?trans4;
@!P2 LDG.E R19, desc[UR4][R8.64] &req={2} &wr=0x2 ?trans1;
@P1 MOV R0, RZ ?trans1;
@!P1 MOV R0, 0x20 ?WAIT5_END_GROUP;
@P2 IADD3 R13, PT, PT, R11, R0, RZ ?trans1;
@!P2 STG.E desc[UR4][R6.64], R19 &req={2} ?trans4;
@P2 LDG.E R17, desc[UR4][R4.64] &wr=0x2 ?trans1;
@P2 IMAD.WIDE.U32 R12, R13, 0x4, R2 ?WAIT5_END_GROUP;
@P2 STG.E desc[UR4][R12.64], R17 &req={2} &rd=0x0 ?trans4;
@P2 LDG.E R19, desc[UR4][R6.64] &wr=0x2 ?trans2;
LOP3.LUT P0, R0, R19, 0x400000, RZ, 0xc0, !PT &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R0, RZ, PT ?WAIT8_END_GROUP;
@P0 STG.E desc[UR4][R4.64], R19 ?trans4;
@!P0 STG.E desc[UR4][R8.64], R19 ?trans4;
@!P1 LDG.E R21, desc[UR4][R8.64] &req={1} &wr=0x2 ?trans1;
@P0 MOV R0, RZ ?trans1;
@!P0 MOV R0, 0x20 ?WAIT5_END_GROUP;
@P1 IADD3 R13, PT, PT, R11, R0, RZ &req={0} ?trans1;
@!P1 STG.E desc[UR4][R6.64], R21 &req={2} ?trans4;
@P1 LDG.E R15, desc[UR4][R4.64] &wr=0x2 ?trans1;
@P1 IMAD.WIDE.U32 R12, R13, 0x4, R2 ?WAIT5_END_GROUP;
@P1 STG.E desc[UR4][R12.64], R15 &req={2} &rd=0x0 ?trans4;
@P1 LDG.E R21, desc[UR4][R6.64] &wr=0x2 ?trans2;
LOP3.LUT P0, R0, R21, 0x800000, RZ, 0xc0, !PT &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R0, RZ, PT ?WAIT8_END_GROUP;
@P0 STG.E desc[UR4][R4.64], R21 ?trans4;
@!P0 STG.E desc[UR4][R8.64], R21 &rd=0x1 ?trans4;
@!P1 LDG.E R23, desc[UR4][R8.64] &wr=0x2 ?trans1;
@P0 MOV R0, RZ ?trans1;
@!P0 MOV R0, 0x20 ?WAIT5_END_GROUP;
@P1 IADD3 R13, PT, PT, R11, R0, RZ &req={0} ?trans1;
@!P1 STG.E desc[UR4][R6.64], R23 &req={2} &rd=0x0 ?trans4;
@P1 LDG.E R17, desc[UR4][R4.64] &wr=0x2 ?trans1;
@P1 IMAD.WIDE.U32 R12, R13, 0x4, R2 ?WAIT5_END_GROUP;
@P1 STG.E desc[UR4][R12.64], R17 &req={2} ?trans4;
LDG.E R19, desc[UR4][R6.64] &wr=0x2 ?trans2;
LOP3.LUT P1, R0, R19, 0x1000000, RZ, 0xc0, !PT &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R0, RZ, PT ?WAIT8_END_GROUP;
@P1 STG.E desc[UR4][R4.64], R19 ?trans4;
@!P1 STG.E desc[UR4][R8.64], R19 &rd=0x2 ?trans4;
@P0 LDG.E R21, desc[UR4][R4.64] &req={1} &wr=0x3 ?trans1;
@P1 MOV R0, RZ ?trans1;
@!P1 MOV R0, 0x20 ?WAIT5_END_GROUP;
@P0 IADD3 R15, PT, PT, R11, R0, RZ ?WAIT5_END_GROUP;
@P0 IMAD.WIDE.U32 R14, R15, 0x4, R2 ?WAIT5_END_GROUP;
@P0 STG.E desc[UR4][R14.64], R21 &req={3} &rd=0x1 ?trans4;
@P0 LDG.E R23, desc[UR4][R6.64] &req={0} &wr=0x3 ?trans4;
@!P0 LDG.E R23, desc[UR4][R8.64] &wr=0x3 ?trans2;
LOP3.LUT P1, R0, R23, 0x2000000, RZ, 0xc0, !PT &req={3} ?WAIT2_END_GROUP;
@!P0 STG.E desc[UR4][R6.64], R23 ?trans3;
ISETP.NE.AND P2, PT, R0, RZ, PT ?WAIT8_END_GROUP;
@P1 STG.E desc[UR4][R4.64], R23 ?trans4;
@!P1 STG.E desc[UR4][R8.64], R23 ?trans4;
@!P2 LDG.E R19, desc[UR4][R8.64] &req={2} &wr=0x2 ?trans1;
@P1 MOV R0, RZ ?trans1;
@!P1 MOV R0, 0x20 ?WAIT5_END_GROUP;
@P2 IADD3 R13, PT, PT, R11, R0, RZ ?trans1;
@!P2 STG.E desc[UR4][R6.64], R19 &req={2} ?trans4;
@P2 LDG.E R17, desc[UR4][R4.64] &wr=0x2 ?trans1;
@P2 IMAD.WIDE.U32 R12, R13, 0x4, R2 ?WAIT5_END_GROUP;
@P2 STG.E desc[UR4][R12.64], R17 &req={2} &rd=0x0 ?trans4;
@P2 LDG.E R19, desc[UR4][R6.64] &wr=0x2 ?trans2;
LOP3.LUT P0, R0, R19, 0x4000000, RZ, 0xc0, !PT &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R0, RZ, PT ?WAIT8_END_GROUP;
@P0 STG.E desc[UR4][R4.64], R19 ?trans4;
@!P0 STG.E desc[UR4][R8.64], R19 ?trans4;
@!P1 LDG.E R21, desc[UR4][R8.64] &req={1} &wr=0x2 ?trans1;
@P0 MOV R0, RZ ?trans1;
@!P0 MOV R0, 0x20 ?WAIT5_END_GROUP;
@P1 IADD3 R13, PT, PT, R11, R0, RZ &req={0} ?trans1;
@!P1 STG.E desc[UR4][R6.64], R21 &req={2} ?trans4;
@P1 LDG.E R15, desc[UR4][R4.64] &wr=0x2 ?trans1;
@P1 IMAD.WIDE.U32 R12, R13, 0x4, R2 ?WAIT5_END_GROUP;
@P1 STG.E desc[UR4][R12.64], R15 &req={2} &rd=0x0 ?trans4;
@P1 LDG.E R21, desc[UR4][R6.64] &wr=0x2 ?trans2;
LOP3.LUT P0, R0, R21, 0x8000000, RZ, 0xc0, !PT &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R0, RZ, PT ?WAIT8_END_GROUP;
@P0 STG.E desc[UR4][R4.64], R21 ?trans4;
@!P0 STG.E desc[UR4][R8.64], R21 &rd=0x1 ?trans4;
@!P1 LDG.E R23, desc[UR4][R8.64] &wr=0x2 ?trans1;
@P0 MOV R0, RZ ?trans1;
@!P0 MOV R0, 0x20 ?WAIT5_END_GROUP;
@P1 IADD3 R13, PT, PT, R11, R0, RZ &req={0} ?trans1;
@!P1 STG.E desc[UR4][R6.64], R23 &req={2} &rd=0x0 ?trans4;
@P1 LDG.E R17, desc[UR4][R4.64] &wr=0x2 ?trans1;
@P1 IMAD.WIDE.U32 R12, R13, 0x4, R2 ?WAIT5_END_GROUP;
@P1 STG.E desc[UR4][R12.64], R17 &req={2} ?trans4;
LDG.E R19, desc[UR4][R6.64] &wr=0x2 ?trans2;
LOP3.LUT P1, R0, R19, 0x10000000, RZ, 0xc0, !PT &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R0, RZ, PT ?WAIT8_END_GROUP;
@P1 STG.E desc[UR4][R4.64], R19 ?trans4;
@!P1 STG.E desc[UR4][R8.64], R19 &rd=0x2 ?trans4;
@P0 LDG.E R21, desc[UR4][R4.64] &req={1} &wr=0x3 ?trans1;
@P1 MOV R0, RZ ?trans1;
@!P1 MOV R0, 0x20 ?WAIT5_END_GROUP;
@P0 IADD3 R15, PT, PT, R11, R0, RZ ?WAIT5_END_GROUP;
@P0 IMAD.WIDE.U32 R14, R15, 0x4, R2 ?WAIT5_END_GROUP;
@P0 STG.E desc[UR4][R14.64], R21 &req={3} &rd=0x1 ?trans4;
@P0 LDG.E R23, desc[UR4][R6.64] &req={0} &wr=0x3 ?trans4;
@!P0 LDG.E R23, desc[UR4][R8.64] &wr=0x3 ?trans2;
LOP3.LUT P1, R0, R23, 0x20000000, RZ, 0xc0, !PT &req={3} ?WAIT2_END_GROUP;
@!P0 STG.E desc[UR4][R6.64], R23 ?trans3;
ISETP.NE.AND P2, PT, R0, RZ, PT ?WAIT8_END_GROUP;
@P1 STG.E desc[UR4][R4.64], R23 ?trans4;
@!P1 STG.E desc[UR4][R8.64], R23 ?trans4;
@!P2 LDG.E R19, desc[UR4][R8.64] &req={2} &wr=0x2 ?trans1;
@P1 MOV R0, RZ ?trans1;
@!P1 MOV R0, 0x20 ?WAIT5_END_GROUP;
@P2 IADD3 R13, PT, PT, R11, R0, RZ ?trans1;
@!P2 STG.E desc[UR4][R6.64], R19 &req={2} ?trans4;
@P2 LDG.E R17, desc[UR4][R4.64] &wr=0x2 ?trans1;
@P2 IMAD.WIDE.U32 R12, R13, 0x4, R2 ?WAIT5_END_GROUP;
@P2 STG.E desc[UR4][R12.64], R17 &req={2} &rd=0x0 ?trans4;
@P2 LDG.E R19, desc[UR4][R6.64] &wr=0x2 ?trans2;
LOP3.LUT P0, R0, R19, 0x40000000, RZ, 0xc0, !PT &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R0, RZ, PT ?WAIT8_END_GROUP;
@P0 STG.E desc[UR4][R4.64], R19 ?trans4;
@!P0 STG.E desc[UR4][R8.64], R19 &rd=0x2 ?trans4;
@!P1 LDG.E R21, desc[UR4][R8.64] &req={1} &wr=0x3 ?trans1;
@P0 MOV R0, RZ ?trans1;
@!P0 MOV R0, 0x20 ?WAIT5_END_GROUP;
@P1 IADD3 R13, PT, PT, R11, R0, RZ &req={0} ?trans1;
@!P1 STG.E desc[UR4][R6.64], R21 &req={3} ?trans4;
@P1 LDG.E R15, desc[UR4][R4.64] &wr=0x3 ?trans1;
@P1 IMAD.WIDE.U32 R12, R13, 0x4, R2 ?WAIT5_END_GROUP;
@P1 STG.E desc[UR4][R12.64], R15 &req={3} ?trans4;
@P1 LDG.E R21, desc[UR4][R6.64] &wr=0x3 ?trans2;
LOP3.LUT P0, R0, R21, 0x80000000, RZ, 0xc0, !PT &req={3} ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R0, RZ, PT ?WAIT8_END_GROUP;
@P0 STG.E desc[UR4][R4.64], R21 ?trans4;
@!P0 STG.E desc[UR4][R8.64], R21 ?trans4;
@!P1 LDG.E R19, desc[UR4][R8.64] &req={2} &wr=0x2 ?trans1;
@P0 MOV R0, RZ ?trans1;
@!P0 MOV R0, 0x20 ?WAIT5_END_GROUP;
@P1 IADD3 R11, PT, PT, R11, R0, RZ ?trans1;
@!P1 STG.E desc[UR4][R6.64], R19 &req={2} ?trans4;
@P1 LDG.E R17, desc[UR4][R4.64] &wr=0x2 ?trans1;
@P1 IMAD.WIDE.U32 R2, R11, 0x4, R2 ?WAIT5_END_GROUP;
@P1 STG.E desc[UR4][R2.64], R17 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
EXIT ?trans5;
BRA 0x1ae0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: kernel_RadixSort(unsigned int*, unsigned int*, unsigned int*, unsigned int)
_Z16kernel_RadixSortPjS_S_j:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x2c
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
v_mov_b32_e32 v6, s6
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v5, s7
s_mov_b32 s2, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
global_load_b32 v4, v[2:3], off
.LBB0_1:
s_waitcnt vmcnt(0)
v_bfe_u32 v7, v4, s2, 1
s_add_i32 s2, s2, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_cmp_lg_u32 s2, 32
v_cmp_eq_u32_e32 vcc_lo, 0, v7
v_cndmask_b32_e32 v7, s0, v6, vcc_lo
v_cndmask_b32_e32 v8, s1, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v7, vcc_lo, v7, v0
v_add_co_ci_u32_e32 v8, vcc_lo, v8, v1, vcc_lo
global_store_b32 v[7:8], v4, off
global_store_b32 v[2:3], v4, off
s_cbranch_scc1 .LBB0_1
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_endpgm
| kernel_RadixSort | 12,459 | 633 | stackv2-00000-of-00015 |
// Demangled: Sum(float*, float*, float*, int*)
Function : _Z3SumPfS_S_Pi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x398] &wr=0x1 ?trans2;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans6;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
LDC R9, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R9, R9, UR6, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R9, R2, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x388] &wr=0x1 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x2 ?trans1;
IMAD.WIDE R2, R9, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &wr=0x3 ?trans1;
IMAD.WIDE R4, R9, 0x4, R4 &req={1} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x3 ?trans1;
IMAD.WIDE R6, R9, 0x4, R6 &req={2} ?WAIT4_END_GROUP;
FADD R9, R2, R5 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x150;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: Sum(float*, float*, float*, int*)
_Z3SumPfS_S_Pi:
s_clause 0x1
s_load_b256 s[4:11], s[0:1], 0x0
s_load_b32 s0, s[0:1], 0x2c
s_waitcnt lgkmcnt(0)
s_load_b32 s1, s[10:11], 0x0
s_and_b32 s0, s0, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
s_mov_b32 s0, exec_lo
s_waitcnt lgkmcnt(0)
v_cmpx_gt_i32_e64 s1, v1
s_cbranch_execz .LBB0_2
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s8, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| Sum | 594 | 553 | stackv2-00000-of-00015 |
// Demangled: copy_arr(int*, int*, int)
Function : _Z8copy_arrPiS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x2 ?trans7;
LDC R7, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R7, R7, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD.WIDE R2, R7, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R3, desc[UR4][R2.64] &req={1} &wr=0x3 ?trans1;
IMAD.WIDE R4, R7, 0x4, R4 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R3 &req={3} ?trans1;
EXIT ?trans5;
BRA 0x100;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: copy_arr(int*, int*, int)
_Z8copy_arrPiS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB1_2
s_load_b128 s[0:3], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
global_store_b32 v[0:1], v2, off
.LBB1_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| copy_arr | 472 | 472 | stackv2-00000-of-00015 |
// Demangled: populate_child_parent(float*, int*, int*, int*, int*, int*, int*, bool*, int)
Function : _Z21populate_child_parentPfPiS0_S0_S0_S0_S0_Pbi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x3c0] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R0, UR4, R3 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x398] &wr=0x2 ?trans1;
IMAD.WIDE R6, R0, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R6, desc[UR4][R6.64] &req={1} &wr=0x3 ?trans1;
SHF.R.S32.HI R11, RZ, 0x1f, R0 ?trans1;
IMAD.WIDE R4, R0, 0x4, R4 &req={2} ?WAIT5_END_GROUP;
LDG.E R19, desc[UR4][R4.64] &wr=0x2 ?trans1;
ISETP.NE.AND P0, PT, R6, -0x1, PT &req={3} ?WAIT13_END_GROUP;
@!P0 LDC.64 R8, c[0x0][0x390] &wr=0x0 ?trans2;
@!P0 LEA R8, P1, R0, R8, 0x2 &req={0} ?WAIT4_END_GROUP;
@!P0 LEA.HI.X R9, R0, R9, R11, 0x2, P1 ?WAIT5_END_GROUP;
@!P0 LDG.E R8, desc[UR4][R8.64] &wr=0x3 ?trans2;
ISETP.EQ.AND P0, PT, R8, -0x1, !P0 &req={3} ?WAIT5_END_GROUP;
ISETP.EQ.OR P0, PT, R0, R19, !P0 &req={2} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans1;
SHF.R.S32.HI R6, RZ, 0x1f, R19 ?trans1;
IMAD.SHL.U32 R12, R19.reuse, 0x4, RZ ?trans1;
SHF.L.U64.HI R9, R0.reuse, 0x2, R11 ?trans1;
IMAD.SHL.U32 R8, R0, 0x4, RZ ?trans1;
SHF.L.U64.HI R13, R19, 0x2, R6 ?WAIT3_END_GROUP;
LDC.64 R10, c[0x0][0x3b8] &wr=0x1 ?trans1;
HFMA2 R17, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
LDCU.64 UR6, c[0x0][0x3b0] &wr=0x2 ?trans4;
STG.E.U8 desc[UR4][R10.64], R17 &req={1} &rd=0x1 ?trans1;
IADD.64 R14, R12, R4.reuse &req={0} ?trans2;
IADD.64 R6, R8, R4 ?WAIT5_END_GROUP;
LDG.E R15, desc[UR4][R14.64] &wr=0x3 ?trans4;
LDG.E R16, desc[UR4][R6.64] &wr=0x3 ?trans2;
FSETP.GTU.AND P0, PT, R16, R15, PT &req={3} ?WAIT13_END_GROUP;
@!P0 IADD.64 R2, R12.reuse, R2 ?trans2;
@P0 LDC.64 R16, c[0x0][0x390] &req={1} &wr=0x0 ?trans4;
@!P0 LDG.E R18, desc[UR4][R2.64] &wr=0x3 ?trans1;
@P0 IADD.64 R12, R12, R16 &req={0} ?WAIT6_END_GROUP;
@P0 LDG.E R18, desc[UR4][R12.64] &wr=0x3 ?trans1;
IADD.64 R8, R8, UR6 &req={2} ?trans2;
ISETP.NE.AND P0, PT, R18, -0x1, PT &req={3} ?WAIT5_END_GROUP;
SEL R19, R19, R18, !P0 ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R0, R19, PT ?trans1;
STG.E desc[UR4][R8.64], R19 &rd=0x0 ?WAIT12_END_GROUP;
@!P0 EXIT &req={0} ?trans5;
IMAD.WIDE R4, R19, 0x4, R4 ?trans1;
LDG.E R6, desc[UR4][R6.64] &wr=0x2 ?trans5;
LDG.E R5, desc[UR4][R4.64] &wr=0x2 ?trans1;
SHF.R.S32.HI R8, RZ, 0x1f, R19 ?trans1;
FSETP.GTU.AND P0, PT, R6, R5, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x400 ?trans5;
LDCU.64 UR6, c[0x0][0x3a0] &wr=0x0 ?trans2;
LEA R2, P0, R19, UR6, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R3, R19, UR7, R8, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R4, desc[UR4][R2.64] &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R4, -0x1, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
STG.E desc[UR4][R2.64], R0 ?trans1;
EXIT ?trans5;
LDCU.64 UR6, c[0x0][0x3a8] &wr=0x0 ?trans2;
LEA R2, P0, R19, UR6, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R3, R19, UR7, R8, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R4, desc[UR4][R2.64] &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R4, -0x1, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
STG.E desc[UR4][R2.64], R0 ?trans1;
EXIT ?trans5;
BRA 0x480;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: populate_child_parent(float*, int*, int*, int*, int*, int*, int*, bool*, int)
_Z21populate_child_parentPfPiS0_S0_S0_S0_S0_Pbi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x54
s_load_b32 s3, s[0:1], 0x40
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_10
s_load_b512 s[4:19], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, vcc_lo, s6, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
global_load_b32 v0, v[4:5], off
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, -1, v0
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_10
v_add_co_u32 v4, vcc_lo, s8, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s9, v3, vcc_lo
v_add_co_u32 v6, vcc_lo, s10, v2
v_add_co_ci_u32_e32 v7, vcc_lo, s11, v3, vcc_lo
global_load_b32 v0, v[4:5], off
global_load_b32 v4, v[6:7], off
s_waitcnt vmcnt(1)
v_cmp_eq_u32_e32 vcc_lo, -1, v0
s_waitcnt vmcnt(0)
v_cmp_ne_u32_e64 s0, v1, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, vcc_lo, s0
s_and_b32 exec_lo, exec_lo, s0
s_cbranch_execz .LBB0_10
v_ashrrev_i32_e32 v5, 31, v4
v_add_co_u32 v7, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v8, vcc_lo, s5, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[5:6], 2, v[4:5]
v_add_co_u32 v9, vcc_lo, s4, v5
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v10, vcc_lo, s5, v6, vcc_lo
s_clause 0x1
global_load_b32 v0, v[7:8], off
global_load_b32 v7, v[9:10], off
v_dual_mov_b32 v8, s9 :: v_dual_mov_b32 v9, s8
s_waitcnt vmcnt(0)
v_cmp_nle_f32_e32 vcc_lo, v0, v7
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cndmask_b32_e32 v7, s7, v8, vcc_lo
v_cndmask_b32_e32 v8, s6, v9, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v5, vcc_lo, v8, v5
v_add_co_ci_u32_e32 v6, vcc_lo, v7, v6, vcc_lo
v_mov_b32_e32 v7, 1
global_load_b32 v5, v[5:6], off
v_mov_b32_e32 v6, 0
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, -1, v5
v_cndmask_b32_e32 v4, v5, v4, vcc_lo
v_add_co_u32 v2, vcc_lo, s16, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s17, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_cmp_ne_u32_e32 vcc_lo, v1, v4
global_store_b8 v6, v7, s[18:19]
global_store_b32 v[2:3], v4, off
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_10
v_ashrrev_i32_e32 v5, 31, v4
s_mov_b32 s0, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[4:5], 2, v[4:5]
v_add_co_u32 v2, vcc_lo, s4, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v5, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_cmp_le_f32_e32 vcc_lo, v0, v2
s_and_saveexec_b32 s1, vcc_lo
s_xor_b32 s1, exec_lo, s1
s_cbranch_execz .LBB0_6
v_add_co_u32 v2, vcc_lo, s12, v4
v_add_co_ci_u32_e32 v3, vcc_lo, s13, v5, vcc_lo
global_load_b32 v0, v[2:3], off
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, -1, v0
s_and_b32 s0, vcc_lo, exec_lo
.LBB0_6:
s_and_not1_saveexec_b32 s1, s1
s_cbranch_execz .LBB0_8
v_add_co_u32 v2, vcc_lo, s14, v4
v_add_co_ci_u32_e32 v3, vcc_lo, s15, v5, vcc_lo
s_and_not1_b32 s0, s0, exec_lo
global_load_b32 v0, v[2:3], off
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, -1, v0
s_and_b32 s2, vcc_lo, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s0, s0, s2
.LBB0_8:
s_or_b32 exec_lo, exec_lo, s1
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 exec_lo, exec_lo, s0
s_cbranch_execz .LBB0_10
global_store_b32 v[2:3], v1, off
.LBB0_10:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| populate_child_parent | 2,007 | 2,019 | stackv2-00000-of-00015 |
// Demangled: detectEdge(int*, int*, int*, int)
Function : _Z10detectEdgePiS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans8;
LDC.64 R6, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD R0, R0, UR6, R3 &req={1} ?WAIT5_END_GROUP;
IADD3 R3, PT, PT, R0.reuse, -0x65, RZ ?trans2;
IADD3 R5, PT, PT, R0, -0x1, RZ ?WAIT3_END_GROUP;
IMAD.WIDE R2, R3, 0x4, R6 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE R6, R5, 0x4, R6 ?trans1;
LDG.E R14, desc[UR4][R2.64+0x4] &req={2} &wr=0x2 ?trans4;
LDG.E R5, desc[UR4][R2.64] &wr=0x2 ?trans4;
LDG.E R15, desc[UR4][R2.64+0x8] &wr=0x2 ?trans4;
LDG.E R16, desc[UR4][R6.64] &wr=0x3 ?trans4;
LDG.E R4, desc[UR4][R6.64+0x4] &wr=0x3 ?trans4;
LDG.E R18, desc[UR4][R6.64+0x8] &wr=0x4 ?trans4;
LDG.E R17, desc[UR4][R2.64+0x320] &wr=0x4 ?trans4;
LDG.E R20, desc[UR4][R2.64+0x324] &wr=0x5 ?trans4;
LDG.E R19, desc[UR4][R2.64+0x328] &wr=0x5 ?trans1;
MUFU.RCP64H R9, -10 &wr=0x1 ?trans1;
MOV.64 R12, 0x4024000000000000 ?WAIT2_END_GROUP;
HFMA2 R8, -RZ, RZ, 0, 5.9604644775390625e-08 ?WAIT6_END_GROUP;
DFMA R10, R8, R12, 1 &req={1} &wr=0x1 ?trans1;
BSSY.RECONVERGENT B0, 0x4c0 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R10, R10, R10 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R8, R10, R8 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R10, R12, 1 &req={1} &wr=0x1 ?trans1;
IADD3 R5, PT, PT, R15, R14, R5 &req={2} ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R10, R8, R10 &req={1} &rd=0x5 &wr=0x1 ?trans1;
IADD3 R5, PT, PT, R4, R16, R5 &req={3} ?WAIT4_END_GROUP;
IADD3 R5, PT, PT, R17, R18, R5 &req={4} ?WAIT4_END_GROUP;
IADD3 R10, PT, PT, R19, R20, R5 &req={5} ?WAIT15_END_GROUP;
NOP ?WAIT10_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64 R10, R10 &wr=0x2 ?trans2;
FSETP.GEU.AND P1, PT, |R11|, 6.5827683646048100446e-37, PT &req={2} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R2, R10, R8 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R2, 10, R10 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R8, R6, R2 &req={1} &wr=0x1 ?trans2;
FFMA R5, RZ, -2.5625, R3 &req={1} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R5|, 1.469367938527859385e-39, PT ?trans1;
SHF.R.S32.HI R5, RZ, 0x1f, R0 ?WAIT12_END_GROUP;
@P0 BRA P1, 0x4b0 &req={0} ?trans5;
MOV R6, 0x4b0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x5b0 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
I2FP.F32.S32 R7, R4 ?trans1;
F2F.F32.F64 R2, R2 &wr=0x0 ?trans4;
FADD R7, R2, R7 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R7|, 111665000, PT ?WAIT13_END_GROUP;
@P0 LDC.64 R6, c[0x0][0x390] &wr=0x0 ?trans1;
@P0 MOV R9, 0x633864 ?trans1;
@P0 LEA R6, P1, R0, R6, 0x2 &req={0} ?WAIT4_END_GROUP;
@P0 LEA.HI.X R7, R0, R7, R5, 0x2, P1 ?WAIT5_END_GROUP;
@P0 STG.E desc[UR4][R6.64], R9 &rd=0x0 ?trans1;
@P0 EXIT ?trans5;
LDCU.64 UR6, c[0x0][0x390] &wr=0x1 ?trans2;
LEA R2, P0, R0, UR6, 0x2 &req={1} ?WAIT4_END_GROUP;
LEA.HI.X R3, R0, UR7, R5, 0x2, P0 ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], RZ ?trans1;
EXIT ?trans5;
MOV.64 R2, 0xbff4000000000000 ?trans2;
FSETP.GEU.AND P1, PT, |R11|.reuse, 1.469367938527859385e-39, PT ?trans1;
LOP3.LUT R7, R11, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
HFMA2 R8, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
MUFU.RCP64H R9, R3 &wr=0x0 ?trans1;
MOV R19, 0x1ca00000 ?trans1;
HFMA2 R21, -RZ, RZ, 2.0625, 0 ?trans1;
ISETP.GE.U32.AND P0, PT, R7, 0x40200000, PT ?trans1;
MOV R18, R7 ?trans1;
BSSY.RECONVERGENT B1, 0xc70 ?trans2;
IADD3 R22, PT, PT, R21, -0x1, RZ ?trans1;
SEL R19, R19, 0x63400000, !P0 ?trans1;
DFMA R12, R8, -R2, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R12, R12, R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R8, R12, R8 &req={0} &rd=0x0 ?trans2;
@!P1 LOP3.LUT R12, R19.reuse, 0x80000000, R11.reuse, 0xf8, !PT &req={0} ?trans2;
LOP3.LUT R9, R19, 0x800fffff, R11, 0xf8, !PT ?trans2;
@!P1 LOP3.LUT R13, R12, 0x100000, RZ, 0xfc, !PT ?trans1;
MOV R8, R10 ?trans1;
@!P1 MOV R12, RZ ?WAIT15_END_GROUP;
NOP ?WAIT11_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 DFMA R8, R8, 2, -R12 &wr=0x0 ?trans2;
@!P1 LOP3.LUT R18, R9, 0x7ff00000, RZ, 0xc0, !PT &req={0} ?WAIT4_END_GROUP;
IADD3 R20, PT, PT, R18, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R20, 0x7feffffe, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R22, 0x7feffffe, P0 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R14, -R2, 1 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R14, R16, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R12, R16, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, -R2, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R16, R14, R12 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0xb60 &req={1,0} ?trans5;
IADD3 R7, PT, PT, R7, -0x40200000, RZ ?WAIT5_END_GROUP;
VIMNMX.S32 R7, R7, -0x46a00000, !PT ?WAIT5_END_GROUP;
VIMNMX.S32 R10, R7, 0x46a00000, PT ?WAIT5_END_GROUP;
IADD3 R19, PT, PT, -R19, R10, RZ ?trans1;
MOV R10, RZ ?WAIT3_END_GROUP;
IADD3 R11, PT, PT, R19, 0x7fe00000, RZ ?WAIT6_END_GROUP;
DMUL R14, R12, R10 &wr=0x0 ?trans2;
FSETP.GTU.AND P0, PT, |R15|, 1.469367938527859385e-39, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0xc60 ?trans5;
DFMA R2, R12, -R2, R8 &wr=0x0 ?trans1;
MOV R10, RZ ?trans1;
FSETP.NEU.AND P0, PT, R3.reuse, RZ, PT &req={0} ?trans1;
LOP3.LUT R2, R3, 0xc0240000, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
LOP3.LUT R7, R2, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R11, R7, R11, RZ, 0xfc, !PT ?WAIT4_END_GROUP;
@!P0 BRA 0xc60 ?trans5;
IADD3 R3, PT, PT, -R19.reuse, RZ, RZ ?trans1;
MOV R2, RZ ?trans1;
IADD3 R19, PT, PT, -R19, -0x43300000, RZ ?trans1;
DMUL.RP R10, R12, R10 &wr=0x0 ?trans2;
LOP3.LUT R7, R11, R7, RZ, 0x3c, !PT &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R14, -R2, R12 &wr=0x0 ?trans2;
FSETP.NEU.AND P0, PT, |R3|, R19, PT &req={0} ?WAIT5_END_GROUP;
FSEL R14, R10, R14, !P0 ?trans1;
FSEL R15, R7, R15, !P0 ?trans1;
BRA 0xc60 ?trans6;
DSETP.NAN.AND P0, PT, R10, R10, PT &wr=0x0 ?trans2;
@P0 BRA 0xc40 &req={0} ?trans5;
ISETP.NE.AND P0, PT, R18, R21, PT ?trans1;
MOV.64 R14, 0xfff8000000000000 ?WAIT12_END_GROUP;
@!P0 BRA 0xc60 ?trans5;
ISETP.NE.AND P0, PT, R18, 0x7ff00000, PT ?trans1;
LOP3.LUT R10, R11, 0xc0240000, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
ISETP.EQ.OR P0, PT, R21, RZ, !P0 ?trans1;
LOP3.LUT R15, R10, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@P0 LOP3.LUT R2, R15, 0x7ff00000, RZ, 0xfc, !PT ?trans1;
@!P0 MOV R14, RZ ?trans1;
@P0 MOV R14, RZ ?WAIT3_END_GROUP;
@P0 MOV R15, R2 ?trans1;
BRA 0xc60 ?trans6;
LOP3.LUT R15, R11, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R14, R10 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
HFMA2 R7, -RZ, RZ, 0, 0 ?trans1;
MOV R2, R14 ?trans1;
MOV R3, R15 ?trans2;
RET.REL.NODEC R6 0x0 ?trans5;
BRA 0xcb0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: detectEdge(int*, int*, int*, int)
_Z10detectEdgePiS_S_i:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x2c
s_load_b64 s[2:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
v_mov_b32_e32 v0, 0
s_mov_b32 s4, -1
v_add_nc_u32_e32 v2, 0xffffff9b, v1
.LBB0_1:
s_mov_b32 s5, 0
.LBB0_2:
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_add_nc_u32_e32 v3, s5, v2
s_add_i32 s5, s5, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_cmp_eq_u32 s5, 3
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 2, v[3:4]
v_add_co_u32 v3, vcc_lo, s2, v3
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
global_load_b32 v3, v[3:4], off
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v0, v3, v0
s_cbranch_scc0 .LBB0_2
v_add_nc_u32_e32 v2, 0x64, v2
s_add_i32 s4, s4, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s4, 2
s_cbranch_scc0 .LBB0_1
v_cvt_f64_i32_e32 v[3:4], v0
v_ashrrev_i32_e32 v2, 31, v1
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v11, vcc_lo, s2, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v12, vcc_lo, s3, v1, vcc_lo
global_load_b32 v13, v[11:12], off
v_div_scale_f64 v[5:6], null, 0xc0240000, 0xc0240000, v[3:4]
v_div_scale_f64 v[11:12], vcc_lo, v[3:4], 0xc0240000, v[3:4]
v_rcp_f64_e32 v[7:8], v[5:6]
s_waitcnt_depctr 0xfff
v_fma_f64 v[9:10], -v[5:6], v[7:8], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8]
v_fma_f64 v[9:10], -v[5:6], v[7:8], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8]
v_mul_f64 v[9:10], v[11:12], v[7:8]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[5:6], -v[5:6], v[9:10], v[11:12]
v_div_fmas_f64 v[5:6], v[5:6], v[7:8], v[9:10]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fixup_f64 v[2:3], v[5:6], 0xc0240000, v[3:4]
v_cvt_f32_f64_e32 v2, v[2:3]
s_waitcnt vmcnt(0)
v_cvt_f32_i32_e32 v3, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v2, v3, v2
v_cmp_lt_f32_e64 s2, 0x4cd4fbed, |v2|
s_delay_alu instid0(VALU_DEP_1)
v_cndmask_b32_e64 v2, 0, 0x633864, s2
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| detectEdge | 4,398 | 1,571 | stackv2-00000-of-00015 |
// Demangled: vecAdd(int*, int*, int*, int)
Function : _Z6vecAddPiS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R0, SR_TID.X &wr=0x0 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC R9, c[0x0][0x360] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans8;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD R9, R9, UR6, R0 &req={0} ?WAIT7_END_GROUP;
LDC.64 R6, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD.WIDE R2, R9, 0x4, R2 &req={2} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
IMAD.WIDE R4, R9, 0x4, R4 &req={3} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE R6, R9, 0x4, R6 &req={0} ?trans1;
IADD3 R9, PT, PT, R2, R5, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x110;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: vecAdd(int*, int*, int*, int)
_Z6vecAddPiS_S_i:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x2c
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| vecAdd | 501 | 497 | stackv2-00000-of-00015 |
// Demangled: kernel(float*, unsigned long, unsigned long, unsigned long)
Function : _Z6kernelPfmmm
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R4, SR_TID.Y &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.Y &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x390] &wr=0x2 ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?WAIT6_END_GROUP;
LDC R13, c[0x0][0x364] &wr=0x1 ?trans2;
IMAD R4, R13, UR4, R4 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.U64.AND P0, PT, R4, UR6, PT &req={2} ?WAIT14_END_GROUP;
@P0 EXIT &req={0} ?trans5;
S2R R3, SR_TID.X &wr=0x0 ?trans1;
S2UR UR4, SR_CTAID.X &wr=0x0 ?trans1;
MOV R0, R4 ?trans1;
MOV R14, 0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x1 ?trans5;
LDC R12, c[0x0][0x360] &wr=0x0 ?trans1;
LDCU UR5, c[0x0][0x370] &wr=0x2 ?trans1;
LDCU UR6, c[0x0][0x374] &wr=0x3 ?trans2;
IMAD R13, R13, UR6, RZ &req={3} ?WAIT2_END_GROUP;
IMAD R2, R12.reuse, UR4, R3 &req={0} ?trans2;
IMAD R12, R12, UR5, RZ &req={2} ?WAIT3_END_GROUP;
SHF.R.S32.HI R3, RZ, 0x1f, R2 &req={1} ?WAIT7_END_GROUP;
LDC.64 R8, c[0x0][0x398] &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0x2d0 ?trans1;
ISETP.GE.U64.AND P0, PT, R2, R8, PT &req={0} ?WAIT14_END_GROUP;
@P0 BRA 0x2c0 ?trans5;
LDC.64 R6, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x388] &wr=0x1 ?trans1;
MOV R15, R2 ?trans1;
IMAD R5, R5, UR4, RZ &req={1} ?trans2;
IMAD.WIDE.U32 R10, R4, UR4, R6 &req={0} ?WAIT4_END_GROUP;
IMAD R7, R4, UR5, R5 ?trans1;
MOV.64 R4, R2 ?WAIT4_END_GROUP;
IADD3 R17, PT, PT, R11, R7, RZ ?WAIT7_END_GROUP;
LEA R6, P0, R4, R10, 0x2 ?trans2;
IADD3 R15, PT, PT, R12, R15, RZ ?trans2;
LEA.HI.X R7, R4, R17, R5, 0x2, P0 ?trans2;
I2FP.F32.S32 R5, R14 ?trans2;
SHF.R.S32.HI R16, RZ, 0x1f, R15 ?trans1;
MOV R4, R15 ?trans2;
STG.E desc[UR8][R6.64], R5 &rd=0x0 ?trans1;
IADD3 R14, PT, PT, R14, 0x1, RZ ?trans1;
MOV R5, R16 &req={0} ?WAIT5_END_GROUP;
ISETP.GE.U64.AND P0, PT, R4, R8, PT ?WAIT14_END_GROUP;
@!P0 BRA 0x210 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU.64 UR4, c[0x0][0x390] &wr=0x0 ?trans1;
IADD3 R0, PT, PT, R13, R0, RZ ?WAIT4_END_GROUP;
SHF.R.S32.HI R5, RZ, 0x1f, R0 ?trans1;
MOV R4, R0 ?WAIT5_END_GROUP;
ISETP.GE.U64.AND P0, PT, R4, UR4, PT &req={0} ?WAIT14_END_GROUP;
@!P0 BRA 0x150 ?trans5;
EXIT ?trans5;
BRA 0x340;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: kernel(float*, unsigned long, unsigned long, unsigned long)
_Z6kernelPfmmm:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b256 s[4:11], s[0:1], 0x0
v_bfe_u32 v3, v0, 10, 10
s_add_u32 s0, s0, 32
s_addc_u32 s1, s1, 0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_mov_b32 s2, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
v_cmpx_gt_u64_e64 s[8:9], v[1:2]
s_cbranch_execz .LBB0_7
s_clause 0x1
s_load_b32 s2, s[0:1], 0xc
s_load_b64 s[0:1], s[0:1], 0x0
v_and_b32_e32 v0, 0x3ff, v0
s_mov_b32 s12, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_mul_i32 s3, s1, s3
v_mad_u64_u32 v[3:4], null, s14, s2, v[0:1]
s_add_i32 s14, s14, s0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_mad_u64_u32 v[5:6], null, s14, s2, v[0:1]
v_mov_b32_e32 v0, 1
s_mul_i32 s2, s0, s2
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_1)
v_cmp_gt_u64_e32 vcc_lo, s[10:11], v[3:4]
.LBB0_2:
s_and_saveexec_b32 s13, vcc_lo
s_cbranch_execz .LBB0_6
v_mad_u64_u32 v[6:7], null, v1, s6, s[4:5]
v_mul_lo_u32 v9, v1, s7
v_mul_lo_u32 v2, v2, s6
v_dual_mov_b32 v8, v5 :: v_dual_mov_b32 v11, v4
v_mov_b32_e32 v10, v3
s_mov_b32 s14, 0
s_delay_alu instid0(VALU_DEP_3)
v_add3_u32 v7, v2, v7, v9
.LBB0_4:
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v9, 31, v8
v_lshlrev_b64 v[12:13], 2, v[10:11]
v_cvt_f32_i32_e32 v2, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_dual_mov_b32 v11, v9 :: v_dual_add_nc_u32 v0, 1, v0
v_cmp_le_u64_e64 s0, s[10:11], v[8:9]
v_add_co_u32 v12, s1, v6, v12
v_mov_b32_e32 v10, v8
v_add_co_ci_u32_e64 v13, s1, v7, v13, s1
v_add_nc_u32_e32 v8, s2, v8
s_or_b32 s14, s0, s14
global_store_b32 v[12:13], v2, off
s_and_not1_b32 exec_lo, exec_lo, s14
s_cbranch_execnz .LBB0_4
s_or_b32 exec_lo, exec_lo, s14
.LBB0_6:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
s_or_b32 exec_lo, exec_lo, s13
v_add_nc_u32_e32 v1, s3, v1
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_le_u64_e64 s0, s[8:9], v[1:2]
s_or_b32 s12, s0, s12
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s12
s_cbranch_execnz .LBB0_2
.LBB0_7:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| kernel | 1,263 | 1,356 | stackv2-00000-of-00015 |
// Demangled: build_table(table_t*)
Function : _Z11build_tableP7table_t
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_CTAID.X &wr=0x1 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans2;
IMAD R2, R2, 0x100, R3 &req={1} ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R2, 0x30d40, PT ?WAIT5_END_GROUP;
ISETP.EQ.OR P0, PT, R2, RZ, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
I2F.F64 R4, R2 &wr=0x0 ?trans1;
MOV.64 R10, 0x3fd8000000000000 ?trans2;
BSSY.RECONVERGENT B0, 0x3a0 ?trans1;
IADD3 R6, PT, PT, R5, -0x3500000, RZ &req={0} ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R6, 0x7ca00000, PT ?trans1;
MUFU.RSQ64H R7, R5 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT9_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R6, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R4, -R8, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R8, R10, 0.5 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R6, R8 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R10, R8, R6 &req={0} &wr=0x0 ?trans2;
IADD3 R17, PT, PT, R9, -0x100000, RZ &req={0} ?trans1;
MOV R16, R8 ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R4, R8 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, -R10, R4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R16, R10 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@!P0 BRA 0x390 &req={1,0} ?trans5;
MOV R0, 0x390 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1770 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
MUFU.RCP64H R7, R15 &wr=0x0 ?trans1;
IADD3 R6, PT, PT, R15, 0x300402, RZ ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
BSSY.RECONVERGENT B0, 0x5c0 ?trans3;
FSETP.GEU.AND P0, PT, |R6|, 5.8789094863358348022e-39, PT ?trans1;
DFMA R8, R6, -R14, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R8, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R6, R8, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R8, -R14, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R10, R8 &req={0} &rd=0x0 &wr=0x2 ?trans2;
@P0 BRA 0x5b0 &req={2,1,0} ?trans5;
LOP3.LUT R0, R15, 0x7fffffff, RZ, 0xc0, !PT ?trans1;
MOV R12, R14 ?trans1;
MOV R13, R15 ?trans2;
IADD3 R3, PT, PT, R0, -0x100000, RZ ?trans1;
MOV R0, 0x5b0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1140 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R6, c[0x0][0x380] &wr=0x0 ?trans1;
ISETP.GT.AND P0, PT, R5, 0xfffff, PT ?trans1;
MOV R0, R5 ?trans1;
BSSY.RECONVERGENT B0, 0x1120 ?trans1;
IMAD.WIDE R2, R2, 0x10, R6 &req={0} ?trans1;
MOV R6, R4 ?WAIT9_END_GROUP;
@!P0 DMUL R4, R4, 1.80143985094819840000e+16 &wr=0x0 ?trans1;
MOV R7, 0xfffffc01 ?trans1;
@!P0 MOV R0, R5 &req={0} ?trans1;
STG.E.64 desc[UR4][R2.64], R8 &rd=0x0 ?trans1;
@!P0 MOV R7, 0xfffffbcb ?trans1;
@!P0 MOV R6, R4 ?trans2;
IADD3 R10, PT, PT, R0, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R10, 0x7feffffe, PT ?WAIT13_END_GROUP;
@P1 BRA 0x10c0 &req={0} ?trans5;
LOP3.LUT R4, R0.reuse, 0xfffff, RZ, 0xc0, !PT ?trans1;
UMOV.64 UR6, 0x4330000080000000 ?trans1;
LEA.HI R0, R0, R7, RZ, 0xc ?trans2;
LOP3.LUT R5, R4, 0x3ff00000, RZ, 0xfc, !PT ?trans1;
MOV R4, R6 ?trans1;
MOV R6, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P0, PT, R5, 0x3ff6a09f, PT ?WAIT13_END_GROUP;
@P0 IADD3 R9, PT, PT, R5, -0x100000, RZ ?trans2;
@P0 IADD3 R0, PT, PT, R0, 0x1, RZ ?WAIT3_END_GROUP;
@P0 MOV R5, R9 ?WAIT6_END_GROUP;
DADD R14, R4, 1 &wr=0x0 ?trans2;
MUFU.RCP64H R7, R15 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, R4, -1 &rd=0x1 ?trans2;
LOP3.LUT R4, R0, 0x80000000, RZ, 0x3c, !PT &req={1} ?trans1;
MOV R5, 0x43300000 ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, -R14, R6, 1 &req={0} &rd=0x0 &wr=0x1 ?trans2;
MOV.64 R14, 0x3ed0ee258b7a8b04 &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R8, R8 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R4, R4, -UR6 ?trans1;
UMOV.64 UR6, 0x3fe62e42fefa39ef ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R6, R8, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R12, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R12, R16, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R4, UR6, R8 &req={0} ?trans1;
UMOV.64 UR6, 0x3eb1380b3ae80f1e ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R8, R8 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R10, UR6, R14 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3fe62e42fefa39ef ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R4, -UR6, R6 ?trans1;
UMOV.64 UR6, 0x3ef3b2669f02676f ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R10, R14, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3f1745cba9ab0956 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R10, R14, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3f3c71c72d1b5154 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R10, R14, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3f624924923be72d ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R10, R14, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3f8999999999a3c4 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R10, R14, UR6 &req={0} ?trans1;
UMOV.64 UR6, 0x3fb5555555555554 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R12, -R8 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R12, -R8, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R10, R14, UR6 &wr=0x1 ?trans1;
UMOV.64 UR6, 0x3c7abc9e3b39803f ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R18, R16, R18 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R10, R14 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, -R8, R20 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R8, R14, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R14, R14, -R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R4, UR6, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R6, R6, R14 &req={0} &rd=0x0 &wr=0x1 ?trans2;
BRA 0x1110 &req={1,0} ?trans5;
MOV.64 R6, 0x7ff0000000000000 ?WAIT3_END_GROUP;
LOP3.LUT P0, RZ, R5, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
DFMA R4, R4, R6, +INF &wr=0x0 ?trans2;
FSEL R6, R4, RZ, P0 &req={0} ?trans1;
FSEL R7, R5, -QNAN , P0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
STG.E.64 desc[UR4][R2.64+0x8], R6 ?trans1;
EXIT ?trans5;
DSETP.GTU.AND P0, PT, |R12|, +INF , PT &wr=0x0 ?trans1;
BSSY.RECONVERGENT B1, 0x1720 ?trans4;
@P0 BRA 0x16f0 &req={0} ?trans5;
LOP3.LUT R8, R13, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R6, PT, PT, R8, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R6, 0x7fefffff, PT ?WAIT13_END_GROUP;
@P0 LOP3.LUT R7, R13, 0x7ff00000, RZ, 0x3c, !PT ?trans1;
@P0 MOV R6, RZ ?trans1;
@P0 BRA 0x1710 ?trans6;
ISETP.GE.U32.AND P0, PT, R8, 0x1000001, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x14d0 ?trans5;
IADD3 R7, PT, PT, R13, -0x3fe00000, RZ ?trans1;
MOV R6, R12 ?trans1;
MOV R8, R3 ?trans2;
MUFU.RCP64H R9, R7 &wr=0x0 ?trans4;
DFMA R10, -R6, R8, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R10, R10, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R8, R10, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, -R6, R10, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R10, R8, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R8, 2.2250738585072013831e-308 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, -R12, R8, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R10, R10, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R8, R10, R8 &req={0} &rd=0x0 &wr=0x1 ?trans2;
BRA 0x1710 &req={1,0} ?trans5;
DMUL R8, R12, 8.11296384146066816958e+31 &wr=0x0 ?trans1;
MOV R6, R3 ?trans1;
MUFU.RCP64H R7, R9 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, -R8, R6, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R10, R10, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R6, R10, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, -R8, R10, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R10, R6, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R6, R6, 8.11296384146066816958e+31 &req={0} &wr=0x0 ?trans2;
BRA 0x1710 &req={0} ?trans5;
LOP3.LUT R7, R13, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R6, R12 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R8, R6 ?trans1;
MOV R9, R7 ?trans1;
MOV R6, R0 ?trans1;
HFMA2 R7, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R6 0x0 ?trans5;
ISETP.GE.U32.AND P1, PT, R6, -0x3400000, PT ?trans1;
MOV R9, R17 ?trans1;
MOV R6, R4 ?trans1;
MOV R7, R5 ?trans1;
BSSY.RECONVERGENT B1, 0x1c30 ?trans9;
@P1 DFMA.RM R8, R12, R8, R10 &wr=0x0 ?trans2;
@P1 IADD.64 R10, R8, 0x1 &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@P1 DFMA.RP R12, -R8, R10, R6 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@P1 DSETP.GT.AND P0, PT, R12, RZ, PT &req={0} &wr=0x0 ?trans2;
@P1 FSEL R8, R10, R8, P0 &req={0} ?trans1;
@P1 FSEL R9, R11, R9, P0 ?trans1;
@P1 BRA 0x1c20 ?trans6;
DSETP.NE.AND P0, PT, R6, RZ, PT &wr=0x0 ?trans2;
@!P0 BRA 0x1c10 &req={0} ?trans5;
ISETP.GE.AND P0, PT, R7, RZ, PT ?WAIT13_END_GROUP;
@!P0 MOV.64 R8, 0xfff8000000000000 ?trans2;
@!P0 BRA 0x1c20 ?trans6;
ISETP.GT.AND P0, PT, R7, 0x7fefffff, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1c10 ?trans5;
DMUL R6, R6, 8.11296384146066816958e+31 &wr=0x0 ?trans1;
MOV R8, RZ ?trans1;
MUFU.RSQ64H R9, R7 &req={0} &wr=0x0 ?trans1;
MOV.64 R12, 0x3fd8000000000000 ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R8, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R6, -R10, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, 0.5 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R8, R10 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R12, R10, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R6, R10 &req={0} &rd=0x0 &wr=0x1 ?trans2;
IADD3 R11, PT, PT, R11, -0x100000, RZ &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R8, -R8, R6 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R10, R12, R8 &req={0} &wr=0x0 ?trans2;
IADD3 R9, PT, PT, R9, -0x3500000, RZ &req={0} ?trans1;
BRA 0x1c20 ?trans6;
DADD R8, R6, R6 &rd=0x0 &wr=0x1 ?trans2;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R6, R0 &req={0} ?trans1;
HFMA2 R7, -RZ, RZ, 0, 0 ?trans1;
MOV R14, R8 &req={1} ?trans1;
MOV R15, R9 ?trans2;
RET.REL.NODEC R6 0x0 ?trans5;
BRA 0x1c80;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: build_table(table_t*)
_Z11build_tableP7table_t:
v_lshl_add_u32 v0, s15, 8, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_ne_u32_e32 vcc_lo, 0, v0
v_cmp_gt_i32_e64 s2, 0x30d41, v0
s_and_b32 s2, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB0_2
v_cvt_f64_i32_e32 v[1:2], v0
s_mov_b32 s5, 0x3fe55555
s_mov_b32 s4, 0x55555555
s_mov_b32 s2, 0x6b47b09a
s_mov_b32 s6, 0xbf559e2b
s_mov_b32 s3, 0x3fc38538
s_mov_b32 s7, 0x3fc3ab76
s_load_b64 s[0:1], s[0:1], 0x0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_frexp_mant_f64_e32 v[3:4], v[1:2]
v_frexp_exp_i32_f64_e32 v21, v[1:2]
v_cmp_gt_f64_e32 vcc_lo, s[4:5], v[3:4]
s_mov_b32 s4, 0x55555780
v_cndmask_b32_e64 v5, 0, 1, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ldexp_f64 v[3:4], v[3:4], v5
v_add_f64 v[5:6], v[3:4], 1.0
v_add_f64 v[11:12], v[3:4], -1.0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_rcp_f64_e32 v[7:8], v[5:6]
v_add_f64 v[13:14], v[5:6], -1.0
v_add_f64 v[3:4], v[3:4], -v[13:14]
s_waitcnt_depctr 0xfff
v_fma_f64 v[9:10], -v[5:6], v[7:8], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[7:8], v[9:10], v[7:8], v[7:8]
v_fma_f64 v[9:10], -v[5:6], v[7:8], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[7:8], v[9:10], v[7:8], v[7:8]
v_mul_f64 v[9:10], v[11:12], v[7:8]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[15:16], v[5:6], v[9:10]
v_fma_f64 v[5:6], v[9:10], v[5:6], -v[15:16]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[3:4], v[9:10], v[3:4], v[5:6]
v_add_f64 v[5:6], v[15:16], v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_f64 v[13:14], v[11:12], -v[5:6]
v_add_f64 v[15:16], v[5:6], -v[15:16]
v_add_f64 v[11:12], v[11:12], -v[13:14]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[3:4], v[15:16], -v[3:4]
v_add_f64 v[5:6], v[11:12], -v[5:6]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[3:4], v[3:4], v[5:6]
v_add_f64 v[3:4], v[13:14], v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[3:4], v[7:8], v[3:4]
v_add_f64 v[5:6], v[9:10], v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[7:8], v[5:6], v[5:6]
v_fma_f64 v[11:12], v[7:8], s[6:7], s[2:3]
s_mov_b32 s2, 0xd7f4df2e
s_mov_b32 s3, 0x3fc7474d
s_mov_b32 s6, 0x9b27acf1
s_mov_b32 s7, 0x3fd24924
v_mul_f64 v[19:20], v[5:6], v[7:8]
s_delay_alu instid0(VALU_DEP_2)
v_fma_f64 v[11:12], v[7:8], v[11:12], s[2:3]
s_mov_b32 s2, 0x16291751
s_mov_b32 s3, 0x3fcc71c0
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_fma_f64 v[11:12], v[7:8], v[11:12], s[2:3]
v_cmp_gt_f64_e64 s2, 0x10000000, v[1:2]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[11:12], v[7:8], v[11:12], s[6:7]
v_cndmask_b32_e64 v13, 0, 1, s2
s_mov_b32 s6, 0x998ef7b6
s_mov_b32 s7, 0x3fd99999
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b32_e32 v13, 8, v13
v_ldexp_f64 v[13:14], v[1:2], v13
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[11:12], v[7:8], v[11:12], s[6:7]
v_rsq_f64_e32 v[15:16], v[13:14]
s_delay_alu instid0(VALU_DEP_1)
v_fma_f64 v[7:8], v[7:8], v[11:12], s[4:5]
v_ldexp_f64 v[11:12], v[5:6], 1
v_add_f64 v[5:6], v[5:6], -v[9:10]
s_mov_b32 s4, 0xfefa39ef
s_mov_b32 s5, 0x3fe62e42
s_waitcnt_depctr 0xfff
v_mul_f64 v[17:18], v[13:14], v[15:16]
v_mul_f64 v[15:16], v[15:16], 0.5
v_mul_f64 v[7:8], v[19:20], v[7:8]
v_subrev_co_ci_u32_e32 v19, vcc_lo, 0, v21, vcc_lo
v_add_f64 v[3:4], v[3:4], -v[5:6]
v_cmp_class_f64_e64 vcc_lo, v[13:14], 0x260
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
v_cvt_f64_i32_e32 v[19:20], v19
v_fma_f64 v[1:2], -v[15:16], v[17:18], 0.5
v_add_f64 v[9:10], v[11:12], v[7:8]
v_ldexp_f64 v[3:4], v[3:4], 1
v_mul_f64 v[21:22], v[19:20], s[4:5]
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
v_fma_f64 v[17:18], v[17:18], v[1:2], v[17:18]
v_fma_f64 v[1:2], v[15:16], v[1:2], v[15:16]
v_add_f64 v[5:6], v[9:10], -v[11:12]
v_fma_f64 v[11:12], v[19:20], s[4:5], -v[21:22]
s_mov_b32 s4, 0x3b39803f
s_mov_b32 s5, 0x3c7abc9e
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[15:16], -v[17:18], v[17:18], v[13:14]
v_add_f64 v[5:6], v[7:8], -v[5:6]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[11:12], v[19:20], s[4:5], v[11:12]
v_fma_f64 v[15:16], v[15:16], v[1:2], v[17:18]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[3:4], v[3:4], v[5:6]
v_add_f64 v[5:6], v[21:22], v[11:12]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[7:8], -v[15:16], v[15:16], v[13:14]
v_add_f64 v[19:20], v[5:6], -v[21:22]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
v_fma_f64 v[1:2], v[7:8], v[1:2], v[15:16]
v_add_f64 v[7:8], v[9:10], v[3:4]
v_cndmask_b32_e64 v15, 0, 0xffffff80, s2
v_add_f64 v[11:12], v[11:12], -v[19:20]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_ldexp_f64 v[1:2], v[1:2], v15
v_add_f64 v[15:16], v[5:6], v[7:8]
v_add_f64 v[9:10], v[7:8], -v[9:10]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_dual_cndmask_b32 v2, v2, v14 :: v_dual_cndmask_b32 v1, v1, v13
v_add_f64 v[13:14], v[15:16], -v[5:6]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[3:4], v[3:4], -v[9:10]
v_div_scale_f64 v[17:18], null, v[1:2], v[1:2], 1.0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_add_f64 v[21:22], v[15:16], -v[13:14]
v_add_f64 v[7:8], v[7:8], -v[13:14]
v_add_f64 v[13:14], v[11:12], v[3:4]
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_rcp_f64_e32 v[23:24], v[17:18]
v_add_f64 v[5:6], v[5:6], -v[21:22]
s_waitcnt_depctr 0xfff
v_fma_f64 v[9:10], -v[17:18], v[23:24], 1.0
v_add_f64 v[5:6], v[7:8], v[5:6]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
v_fma_f64 v[7:8], v[23:24], v[9:10], v[23:24]
v_add_f64 v[9:10], v[13:14], -v[11:12]
v_div_scale_f64 v[23:24], vcc_lo, 1.0, v[1:2], 1.0
v_add_f64 v[5:6], v[13:14], v[5:6]
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_fma_f64 v[19:20], -v[17:18], v[7:8], 1.0
v_add_f64 v[13:14], v[13:14], -v[9:10]
v_add_f64 v[3:4], v[3:4], -v[9:10]
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_f64 v[21:22], v[15:16], v[5:6]
v_fma_f64 v[7:8], v[7:8], v[19:20], v[7:8]
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[9:10], v[11:12], -v[13:14]
v_add_f64 v[11:12], v[21:22], -v[15:16]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mul_f64 v[13:14], v[23:24], v[7:8]
v_add_f64 v[3:4], v[3:4], v[9:10]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[5:6], v[5:6], -v[11:12]
v_fma_f64 v[9:10], -v[17:18], v[13:14], v[23:24]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[3:4], v[3:4], v[5:6]
v_div_fmas_f64 v[5:6], v[9:10], v[7:8], v[13:14]
v_cmp_lt_i32_e32 vcc_lo, -1, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[7:8], v[21:22], v[3:4]
v_div_fixup_f64 v[2:3], v[5:6], v[1:2], 1.0
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[4:5], 4, v[0:1]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, s0, s0, v4
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v1, s0, s1, v5, s0
v_cndmask_b32_e32 v4, 0, v7, vcc_lo
v_cndmask_b32_e32 v5, 0x7ff80000, v8, vcc_lo
global_store_b128 v[0:1], v[2:5], off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| build_table | 7,382 | 4,971 | stackv2-00000-of-00015 |
// Demangled: MatMulKernel(Matrix, Matrix, Matrix)
Function : _Z12MatMulKernel6MatrixS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R0, c[0x0][0x380] &wr=0x1 ?trans1;
S2R R2, SR_TID.Y &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans1;
HFMA2 R22, -RZ, RZ, 0, 0 ?trans1;
S2R R3, SR_TID.X &wr=0x4 ?trans4;
LDC R29, c[0x0][0x364] &wr=0x2 ?trans8;
S2UR UR4, SR_CTAID.Y &wr=0x2 ?trans8;
S2UR UR5, SR_CTAID.X &wr=0x4 ?trans1;
ISETP.GE.AND P0, PT, R0, 0x1, PT &req={1} ?WAIT7_END_GROUP;
LDC R28, c[0x0][0x360] &wr=0x4 ?trans1;
IMAD R29, R29, UR4, R2 &req={2} ?trans2;
IMAD R28, R28, UR5, R3 &req={4} ?WAIT3_END_GROUP;
@!P0 BRA 0xa50 &req={3,0} ?trans5;
ISETP.GE.U32.AND P1, PT, R0.reuse, 0x8, PT ?trans1;
LOP3.LUT R17, R0, 0x7, RZ, 0xc0, !PT ?trans1;
UMOV UR4, URZ ?trans1;
IMAD R16, R29, R0, RZ ?trans1;
MOV R22, RZ ?trans2;
ISETP.NE.AND P0, PT, R17, RZ, PT ?WAIT7_END_GROUP;
@!P1 BRA 0x580 ?trans6;
LDC R14, c[0x0][0x390] &wr=0x0 ?trans1;
LOP3.LUT R30, R0, 0x7ffffff8, RZ, 0xc0, !PT ?trans1;
UMOV UR4, URZ ?trans1;
MOV R22, RZ ?trans1;
MOV R31, R28 ?trans1;
IADD3 R30, PT, PT, -R30, RZ, RZ ?WAIT3_END_GROUP;
LDC.64 R18, c[0x0][0x388] &wr=0x1 ?trans1;
SHF.R.S32.HI R15, RZ, 0x1f, R14 &req={0} ?WAIT5_END_GROUP;
IADD.64 R2, R14, R14 ?trans2;
IMAD.WIDE.U32 R18, R16, 0x4, R18 &req={1} ?trans2;
IADD.64 R4, R14, R2 ?WAIT3_END_GROUP;
SHF.L.U64.HI R13, R2, 0x2, R3 ?trans1;
IADD.64 R6, R14, R4 ?trans2;
IMAD.SHL.U32 R12, R2, 0x4, RZ ?trans1;
SHF.L.U64.HI R11, R4, 0x2, R5 ?trans1;
IADD.64 R2, R14, R6 ?trans2;
IMAD.SHL.U32 R10, R4, 0x4, RZ ?trans1;
SHF.L.U64.HI R9, R6, 0x2, R7 ?trans1;
IADD.64 R4, R14, R2 ?trans2;
IMAD.SHL.U32 R8, R6, 0x4, RZ ?trans1;
IADD.64 R18, R18, 0x10 ?WAIT2_END_GROUP;
IADD.64 R20, R14, R4 ?trans2;
IMAD.SHL.U32 R6, R2.reuse, 0x4, RZ ?trans1;
SHF.L.U64.HI R7, R2, 0x2, R3 ?trans2;
SHF.L.U64.HI R5, R4.reuse, 0x2, R5 ?trans1;
IMAD.SHL.U32 R4, R4, 0x4, RZ ?trans1;
SHF.L.U64.HI R3, R20.reuse, 0x2, R21 ?trans1;
IMAD.SHL.U32 R2, R20, 0x4, RZ ?WAIT7_END_GROUP;
LDC.64 R26, c[0x0][0x398] &wr=0x0 ?trans1;
LDG.E R23, desc[UR6][R18.64+-0x10] &wr=0x2 ?trans4;
LDG.E R35, desc[UR6][R18.64+-0xc] &wr=0x3 ?trans4;
LDG.E R37, desc[UR6][R18.64+-0x8] &wr=0x4 ?trans4;
LDG.E R36, desc[UR6][R18.64+-0x4] &wr=0x5 ?trans1;
IMAD.WIDE R26, R31, 0x4, R26 &req={0} ?WAIT5_END_GROUP;
LDG.E R34, desc[UR6][R26.64] &wr=0x2 ?trans1;
IMAD.WIDE R24, R14, 0x4, R26 ?trans1;
IADD.64 R20, R26, R12 ?WAIT5_END_GROUP;
LDG.E R24, desc[UR6][R24.64] &wr=0x3 ?trans1;
IADD.64 R32, R26, R10 ?WAIT3_END_GROUP;
LDG.E R20, desc[UR6][R20.64] &wr=0x4 ?trans4;
LDG.E R33, desc[UR6][R32.64] &wr=0x5 ?trans4;
LDG.E R32, desc[UR6][R18.64+0x4] &wr=0x5 ?trans1;
FFMA R34, R23, R34, R22 &req={2} ?WAIT4_END_GROUP;
FFMA R35, R35, R24, R34 &req={3} ?WAIT4_END_GROUP;
FFMA R35, R37, R20, R35 &req={4} ?trans1;
IADD.64 R20, R26.reuse, R8 ?trans2;
IADD.64 R22, R26, R6 ?trans2;
FFMA R34, R36, R33, R35 &req={5} ?trans1;
IADD.64 R24, R26.reuse, R4 ?trans2;
LDG.E R20, desc[UR6][R20.64] &wr=0x2 ?trans4;
LDG.E R33, desc[UR6][R18.64] &wr=0x2 ?trans1;
IADD.64 R26, R26, R2 ?WAIT3_END_GROUP;
LDG.E R23, desc[UR6][R22.64] &wr=0x3 ?trans4;
LDG.E R24, desc[UR6][R24.64] &wr=0x4 ?trans4;
LDG.E R35, desc[UR6][R18.64+0x8] &wr=0x4 ?trans4;
LDG.E R26, desc[UR6][R26.64] &wr=0x5 ?trans4;
LDG.E R37, desc[UR6][R18.64+0xc] &rd=0x0 &wr=0x5 ?trans1;
IADD3 R30, PT, PT, R30, 0x8, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R30, RZ, PT ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
IMAD R31, R14, 0x8, R31 ?trans1;
IADD.64 R18, R18, 0x20 &req={0} ?trans2;
FFMA R33, R33, R20, R34 &req={2} ?WAIT4_END_GROUP;
FFMA R32, R32, R23, R33 &req={3} ?WAIT4_END_GROUP;
FFMA R32, R35, R24, R32 &req={4} ?WAIT4_END_GROUP;
FFMA R22, R37, R26, R32 &req={5} ?trans1;
@P1 BRA 0x310 ?trans6;
@!P0 BRA 0xa50 ?trans5;
ISETP.GE.U32.AND P1, PT, R17, 0x4, PT ?trans1;
LOP3.LUT R19, R0, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R19, RZ, PT ?WAIT7_END_GROUP;
@!P1 BRA 0x7f0 ?trans6;
LDC R12, c[0x0][0x390] &wr=0x0 ?trans1;
LDCU.64 UR8, c[0x0][0x388] &wr=0x1 ?trans1;
HFMA2 R17, -RZ, RZ, 0, 0 ?trans1;
IADD3 R7, PT, PT, R16, UR4, RZ ?trans1;
UMOV UR5, URZ ?WAIT3_END_GROUP;
IADD.64 R8, R16, UR4 ?trans2;
LDC.64 R4, c[0x0][0x398] &wr=0x2 ?trans8;
LDC.64 R10, c[0x0][0x388] &wr=0x3 ?trans1;
LEA R2, P1, R8, UR8, 0x2 &req={1} ?trans1;
IMAD R3, R12, UR4, R28 &req={0} ?trans1;
SHF.R.S32.HI R13, RZ, 0x1f, R12 ?WAIT5_END_GROUP;
IADD.64 R14, R12, R12 ?trans2;
IMAD.WIDE R4, R3, 0x4, R4 &req={2} ?trans1;
LEA.HI.X R3, R8, UR9, R9, 0x2, P1 ?trans1;
IADD.64 R8, R12, R14 ?WAIT3_END_GROUP;
LEA R6, P1, R14, R4.reuse, 0x2 ?trans1;
IMAD.WIDE R12, R12, 0x4, R4 ?trans1;
LDG.E R18, desc[UR6][R4.64] &wr=0x2 ?trans3;
IMAD.WIDE.U32 R10, R7, 0x4, R10 &req={3} ?trans1;
LEA.HI.X R7, R14, R5, R15, 0x2, P1 ?trans1;
LDG.E R12, desc[UR6][R12.64] &wr=0x3 ?trans1;
LEA R14, P1, R8, R4, 0x2 ?WAIT3_END_GROUP;
LDG.E R11, desc[UR6][R10.64] &wr=0x2 ?trans1;
LEA.HI.X R15, R8, R5, R9, 0x2, P1 ?WAIT3_END_GROUP;
LDG.E R20, desc[UR6][R2.64+0x4] &wr=0x3 ?trans4;
LDG.E R6, desc[UR6][R6.64] &wr=0x4 ?trans4;
LDG.E R8, desc[UR6][R2.64+0x8] &wr=0x4 ?trans4;
LDG.E R9, desc[UR6][R2.64+0xc] &wr=0x5 ?trans4;
LDG.E R14, desc[UR6][R14.64] &wr=0x5 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
FFMA R11, R11, R18, R22 &req={2} ?WAIT4_END_GROUP;
FFMA R11, R20, R12, R11 &req={3} ?WAIT4_END_GROUP;
FFMA R8, R8, R6, R11 &req={4} ?WAIT4_END_GROUP;
FFMA R22, R9, R14, R8 &req={5} ?WAIT7_END_GROUP;
@!P0 BRA 0xa50 ?trans5;
ISETP.NE.AND P1, PT, R19, 0x1, PT ?trans1;
LOP3.LUT R0, R0, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P0, PT, R0, 0x1, PT ?WAIT7_END_GROUP;
@!P1 BRA 0x9a0 ?trans6;
LDC R11, c[0x0][0x390] &wr=0x0 ?trans1;
LDCU.64 UR8, c[0x0][0x388] &wr=0x1 ?trans1;
MOV R6, R16 ?trans1;
HFMA2 R7, -RZ, RZ, 0, 0 ?trans1;
IADD3 R9, PT, PT, R16, UR4, RZ ?trans1;
UMOV UR5, URZ ?WAIT3_END_GROUP;
LDC.64 R4, c[0x0][0x398] &wr=0x2 ?trans1;
IADD.64 R6, R6, UR4 ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x388] &wr=0x3 ?trans1;
LEA R8, P1, R6, UR8, 0x2 &req={1} ?trans1;
IMAD R13, R11, UR4, R28 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R13, 0x4, R4 &req={2} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R9, 0x4, R2 &req={3} ?trans1;
LEA.HI.X R9, R6, UR9, R7, 0x2, P1 ?WAIT3_END_GROUP;
IMAD.WIDE R6, R11, 0x4, R4 ?trans2;
LDG.E R3, desc[UR6][R2.64] &wr=0x2 ?trans4;
LDG.E R4, desc[UR6][R4.64] &wr=0x2 ?trans4;
LDG.E R9, desc[UR6][R8.64+0x4] &wr=0x3 ?trans4;
LDG.E R6, desc[UR6][R6.64] &wr=0x3 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x2, URZ ?trans1;
FFMA R22, R3, R4, R22 &req={2} ?WAIT4_END_GROUP;
FFMA R22, R9, R6, R22 &req={3} ?WAIT7_END_GROUP;
@P0 BRA 0xa50 ?trans5;
LDC R7, c[0x0][0x390] &wr=0x0 ?trans1;
IADD3 R17, PT, PT, R16, UR4, RZ ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans8;
LDC.64 R4, c[0x0][0x398] &wr=0x2 ?trans1;
IMAD R7, R7, UR4, R28 &req={0} ?trans2;
IMAD.WIDE.U32 R2, R17, 0x4, R2 &req={1} ?WAIT6_END_GROUP;
LDG.E R3, desc[UR6][R2.64] &wr=0x3 ?trans1;
IMAD.WIDE R4, R7, 0x4, R4 &req={2} ?WAIT6_END_GROUP;
LDG.E R4, desc[UR6][R4.64] &wr=0x3 ?trans2;
FFMA R22, R3, R4, R22 &req={3} ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x3a8] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x3a0] &wr=0x1 ?trans2;
IMAD R29, R29, UR4, R28 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R29, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R22 ?trans1;
EXIT ?trans5;
BRA 0xab0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: MatMulKernel(Matrix, Matrix, Matrix)
_Z12MatMulKernel6MatrixS_S_:
s_clause 0x2
s_load_b32 s4, s[0:1], 0x3c
s_load_b32 s6, s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x28
v_bfe_u32 v2, v0, 10, 10
v_and_b32_e32 v3, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s5, s4, 16
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(VALU_DEP_1)
v_mad_u64_u32 v[0:1], null, s15, s5, v[2:3]
v_mad_u64_u32 v[1:2], null, s14, s4, v[3:4]
s_cmp_lt_i32 s6, 1
s_cbranch_scc1 .LBB0_3
s_load_b64 s[8:9], s[0:1], 0x8
s_delay_alu instid0(VALU_DEP_2)
v_mul_lo_u32 v2, v0, s6
s_clause 0x1
s_load_b32 s7, s[0:1], 0x10
s_load_b64 s[4:5], s[0:1], 0x18
v_mov_b32_e32 v6, 0
v_mov_b32_e32 v4, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s8, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
.LBB0_2:
v_ashrrev_i32_e32 v5, 31, v4
s_add_i32 s6, s6, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_cmp_eq_u32 s6, 0
v_lshlrev_b64 v[7:8], 2, v[4:5]
v_add_nc_u32_e32 v4, s7, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v7, vcc_lo, s4, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
global_load_b32 v5, v[2:3], off
global_load_b32 v7, v[7:8], off
v_add_co_u32 v2, vcc_lo, v2, 4
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v6, v5, v7
s_cbranch_scc0 .LBB0_2
s_branch .LBB0_4
.LBB0_3:
v_mov_b32_e32 v6, 0
.LBB0_4:
s_load_b32 s0, s[0:1], 0x20
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, v0, s0, v[1:2]
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[2:3]
v_add_co_u32 v0, vcc_lo, s2, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_store_b32 v[0:1], v6, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| MatMulKernel | 4,415 | 1,186 | stackv2-00000-of-00015 |
// Demangled: MatAdd(float*, float*, float*)
Function : _Z6MatAddPfS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x388] &wr=0x1 ?trans1;
LDG.E R2, desc[UR4][R2.64] &req={0} &wr=0x2 ?trans4;
LDG.E R5, desc[UR4][R4.64] &req={1} &wr=0x2 ?trans3;
LDC.64 R6, c[0x0][0x390] &wr=0x0 ?trans1;
FADD R9, R2, R5 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 &req={0} ?trans1;
EXIT ?trans5;
BRA 0xa0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: MatAdd(float*, float*, float*)
_Z6MatAddPfS_S_:
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
v_mov_b32_e32 v0, 0
s_waitcnt lgkmcnt(0)
s_load_b32 s2, s[4:5], 0x0
s_load_b32 s3, s[6:7], 0x0
s_waitcnt lgkmcnt(0)
v_add_f32_e64 v1, s2, s3
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| MatAdd | 325 | 192 | stackv2-00000-of-00015 |
// Demangled: kernel(float*, float*, int, int)
Function : _Z6kernelPfS_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R6, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x390] &wr=0x2 ?trans1;
S2R R4, SR_TID.Y &wr=0x3 ?trans6;
LDC R9, c[0x0][0x360] &wr=0x1 ?trans8;
S2UR UR5, SR_CTAID.Y &wr=0x3 ?trans8;
LDC R5, c[0x0][0x364] &wr=0x3 ?trans1;
IMAD R0, R9, UR4, R6 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR9, PT &req={2} ?trans1;
IMAD R5, R5, UR5, R4 &req={3} ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R5, UR8, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD R7, R5, UR8, R0 ?WAIT4_END_GROUP;
IMAD.WIDE R2, R7, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR6][R2.64] &req={1} &wr=0x2 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x0 ?trans1;
IMAD R0, R9.reuse, R4, RZ ?trans1;
UMOV UR4, 0x400 ?trans1;
ISETP.GE.U32.AND P0, PT, R9, 0x2, PT ?trans1;
ISETP.NE.AND P1, PT, R6, RZ, PT ?trans2;
IADD3 R4, PT, PT, R0, R6, RZ ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={0} ?WAIT6_END_GROUP;
LEA R7, R4, UR4, 0x2 ?WAIT5_END_GROUP;
STS [R7], R2 &req={2} &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P0 BRA 0x290 ?trans5;
SHF.R.U32.HI R3, RZ, 0x1, R9 ?trans1;
IMAD R0, R6, R9, R6 ?WAIT7_END_GROUP;
ISETP.GE.U32.AND P0, PT, R6, R3, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R2, PT, PT, R0, R3, RZ &req={0} ?trans1;
@!P0 LDS R5, [R7] ?trans1;
IADD3 R3, PT, PT, R3, 0x1, RZ ?trans2;
@!P0 LEA R2, R2, UR4, 0x2 ?WAIT6_END_GROUP;
@!P0 LDS R2, [R2] &wr=0x0 ?trans2;
@!P0 FADD R4, R2, R5 &req={1,0} ?WAIT5_END_GROUP;
@!P0 STS [R7], R4 &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BRA 0x1f0 ?trans5;
@P1 EXIT ?trans5;
LEA R0, R0, UR4, 0x2 ?trans1;
LDC.64 R2, c[0x0][0x388] &req={0} &wr=0x0 ?trans4;
LDS R7, [R0] &wr=0x1 ?trans1;
IMAD.WIDE.U32 R2, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R2.64], R7 &req={1} ?trans1;
EXIT ?trans5;
BRA 0x300;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: kernel(float*, float*, int, int)
_Z6kernelPfS_ii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b64 s[4:5], s[0:1], 0x10
v_bfe_u32 v3, v0, 10, 10
v_and_b32_e32 v2, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_and_b32 s6, s2, 0xffff
v_mad_u64_u32 v[0:1], null, s15, s3, v[3:4]
v_mad_u64_u32 v[4:5], null, s14, s6, v[2:3]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_gt_i32_e32 vcc_lo, s4, v0
v_cmp_gt_i32_e64 s2, s5, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, s2, vcc_lo
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB0_13
s_load_b128 s[0:3], s[0:1], 0x0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[5:6], null, v0, s4, v[4:5]
s_cmp_lt_u32 s6, 2
v_ashrrev_i32_e32 v6, 31, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[4:5], 2, v[5:6]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, vcc_lo, s0, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
s_mov_b32 s0, -1
global_load_b32 v5, v[4:5], off
v_mul_u32_u24_e32 v4, s6, v3
v_add_lshl_u32 v1, v4, v2, 2
s_waitcnt vmcnt(0)
ds_store_b32 v1, v5
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_9
s_add_i32 s0, s6, 1
s_mov_b32 s1, 0
v_mul_u32_u24_e32 v3, s0, v2
s_lshr_b32 s0, s6, 1
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_add_lshl_u32 v3, v3, s0, 2
.LBB0_3:
v_cmp_le_u32_e64 s4, s0, v2
s_mov_b32 s5, exec_lo
v_cmpx_gt_u32_e64 s0, v2
s_cbranch_execz .LBB0_5
ds_load_b32 v5, v3
ds_load_b32 v6, v1
s_or_b32 s4, s4, exec_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v5, v5, v6
ds_store_b32 v1, v5
.LBB0_5:
s_or_b32 exec_lo, exec_lo, s5
s_mov_b32 s6, -1
s_and_saveexec_b32 s5, s4
s_cbranch_execz .LBB0_7
v_add_nc_u32_e32 v3, 4, v3
s_add_i32 s0, s0, 1
s_xor_b32 s6, exec_lo, -1
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB0_7:
s_or_b32 exec_lo, exec_lo, s5
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s4, exec_lo, s6
s_or_b32 s1, s4, s1
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execnz .LBB0_3
s_or_b32 exec_lo, exec_lo, s1
s_mov_b32 s0, 0
.LBB0_9:
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 vcc_lo, exec_lo, s0
s_cbranch_vccz .LBB0_13
v_cmp_eq_u32_e32 vcc_lo, 0, v2
s_mov_b32 s0, 0
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_13
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b32_e32 v2, 2, v4
s_delay_alu instid0(VALU_DEP_2)
v_lshlrev_b64 v[0:1], 2, v[0:1]
ds_load_b32 v4, v2
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_load_b32 v3, v[0:1], off
.LBB0_12:
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_f32_e32 v2, v3, v4
global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off glc
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, v2, v3
v_mov_b32_e32 v3, v2
s_or_b32 s0, vcc_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s0
s_cbranch_execnz .LBB0_12
.LBB0_13:
s_endpgm
| kernel | 1,169 | 1,680 | stackv2-00000-of-00015 |
// Demangled: kernelFunc(float*, float*, cuComplex*, float*, float*, cuComplex*, int, int, int)
Function : _Z10kernelFuncPfS_P9cuComplexS_S_S1_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R0, c[0x0][0x3b4] &wr=0x1 ?trans1;
S2R R30, SR_TID.X &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans1;
HFMA2 R20, -RZ, RZ, 0, 0 ?WAIT5_END_GROUP;
S2UR UR4, SR_CTAID.Y &wr=0x2 ?trans8;
LDC R3, c[0x0][0x360] &wr=0x2 ?trans1;
ISETP.GE.AND P0, PT, R0, 0x1, PT &req={1} ?WAIT7_END_GROUP;
S2UR UR8, SR_CTAID.X &wr=0x1 ?trans1;
IMAD R30, R3, UR4, R30 &req={2} ?WAIT5_END_GROUP;
@!P0 BRA 0xa20 &req={3,0} ?trans5;
ISETP.GE.U32.AND P0, PT, R0.reuse, 0x8, PT ?trans1;
LOP3.LUT R17, R0.reuse, 0x7, RZ, 0xc0, !PT ?trans1;
UMOV UR4, URZ ?trans1;
IMAD R16, R0, UR8, RZ &req={1} ?trans1;
MOV R20, RZ ?trans2;
ISETP.NE.AND P1, PT, R17, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x550 ?trans6;
LDC R14, c[0x0][0x3b8] &wr=0x0 ?trans1;
LOP3.LUT R31, R0, 0x7ffffff8, RZ, 0xc0, !PT ?trans1;
UMOV UR4, URZ ?trans1;
MOV R33, R30 ?trans2;
IADD3 R31, PT, PT, -R31, RZ, RZ ?WAIT3_END_GROUP;
LDC.64 R18, c[0x0][0x380] &wr=0x1 ?trans1;
SHF.R.S32.HI R15, RZ, 0x1f, R14 &req={0} ?WAIT5_END_GROUP;
IADD.64 R2, R14, R14 ?trans2;
IMAD.WIDE.U32 R18, R16, 0x4, R18 &req={1} ?trans2;
IADD.64 R4, R14, R2 ?WAIT3_END_GROUP;
SHF.L.U64.HI R13, R2, 0x2, R3 ?trans1;
IADD.64 R6, R14, R4 ?trans2;
IADD.64 R18, R18, 0x10 ?WAIT3_END_GROUP;
SHF.L.U32 R12, R2, 0x2, RZ ?trans1;
IADD.64 R2, R14, R6 ?WAIT3_END_GROUP;
SHF.L.U64.HI R11, R4.reuse, 0x2, R5 ?trans2;
SHF.L.U32 R10, R4, 0x2, RZ ?trans1;
IADD.64 R4, R14, R2 ?WAIT3_END_GROUP;
SHF.L.U64.HI R9, R6, 0x2, R7 ?trans1;
IADD.64 R20, R14, R4 ?WAIT3_END_GROUP;
SHF.L.U32 R8, R6, 0x2, RZ ?trans2;
SHF.L.U64.HI R7, R2.reuse, 0x2, R3 ?trans2;
SHF.L.U32 R6, R2, 0x2, RZ ?trans2;
SHF.L.U64.HI R5, R4, 0x2, R5 ?trans2;
SHF.L.U64.HI R3, R20.reuse, 0x2, R21 ?trans2;
SHF.L.U32 R2, R20, 0x2, RZ ?WAIT2_END_GROUP;
SHF.L.U32 R4, R4, 0x2, RZ ?trans1;
MOV R20, RZ ?WAIT7_END_GROUP;
LDC.64 R28, c[0x0][0x388] &wr=0x0 ?trans1;
LDG.E R21, desc[UR6][R18.64+-0x10] &wr=0x2 ?trans4;
LDG.E R24, desc[UR6][R18.64+-0xc] &wr=0x3 ?trans4;
LDG.E R32, desc[UR6][R18.64+-0x8] &wr=0x4 ?trans1;
IMAD.WIDE R28, R33, 0x4, R28 &req={0} ?WAIT5_END_GROUP;
LDG.E R22, desc[UR6][R28.64] &wr=0x2 ?trans1;
IMAD.WIDE R34, R14, 0x4, R28 ?trans1;
IADD.64 R36, R28, R12 ?WAIT5_END_GROUP;
LDG.E R34, desc[UR6][R34.64] &wr=0x3 ?trans4;
LDG.E R36, desc[UR6][R36.64] &wr=0x4 ?trans1;
IADD.64 R26, R28, R4 ?WAIT3_END_GROUP;
LDG.E R35, desc[UR6][R18.64+-0x4] &wr=0x5 ?trans4;
LDG.E R26, desc[UR6][R26.64] &wr=0x5 ?trans4;
LDG.E R37, desc[UR6][R18.64+0x8] &wr=0x5 ?trans1;
FFMA R21, R21, R22, R20 &req={2} ?WAIT4_END_GROUP;
FFMA R21, R24, R34, R21 &req={3} ?trans1;
IADD.64 R22, R28.reuse, R8 ?trans2;
IADD.64 R24, R28, R6 ?trans2;
FFMA R32, R32, R36, R21 &req={4} ?trans1;
IADD.64 R20, R28.reuse, R10 ?trans2;
LDG.E R23, desc[UR6][R22.64] &wr=0x2 ?trans4;
LDG.E R34, desc[UR6][R18.64] &wr=0x2 ?trans4;
LDG.E R21, desc[UR6][R20.64] &wr=0x5 ?trans1;
IADD.64 R28, R28, R2 ?WAIT3_END_GROUP;
LDG.E R25, desc[UR6][R24.64] &wr=0x3 ?trans4;
LDG.E R36, desc[UR6][R18.64+0x4] &wr=0x3 ?trans4;
LDG.E R29, desc[UR6][R28.64] &wr=0x4 ?trans4;
LDG.E R20, desc[UR6][R18.64+0xc] &rd=0x0 &wr=0x4 ?trans1;
IADD3 R31, PT, PT, R31, 0x8, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R31, RZ, PT ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
LEA R33, R14, R33, 0x3 ?trans1;
IADD.64 R18, R18, 0x20 &req={0} ?trans2;
FFMA R35, R35, R21, R32 &req={5} ?WAIT4_END_GROUP;
FFMA R35, R34, R23, R35 &req={2} ?WAIT4_END_GROUP;
FFMA R36, R36, R25, R35 &req={3} ?WAIT4_END_GROUP;
FFMA R37, R37, R26, R36 ?WAIT4_END_GROUP;
FFMA R20, R20, R29, R37 &req={4} ?trans1;
@P0 BRA 0x2e0 ?trans6;
@!P1 BRA 0xa20 ?trans5;
ISETP.GE.U32.AND P1, PT, R17, 0x4, PT ?trans1;
LOP3.LUT R21, R0, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R21, RZ, PT ?WAIT7_END_GROUP;
@!P1 BRA 0x7c0 ?trans6;
LDC.64 R12, c[0x0][0x380] &wr=0x0 ?trans1;
IADD3 R5, PT, PT, R16, UR4, RZ ?trans1;
HFMA2 R17, -RZ, RZ, 0, 0 ?trans1;
UMOV UR5, URZ ?WAIT4_END_GROUP;
IADD.64 R14, R16, UR4 ?trans2;
LDC R4, c[0x0][0x3b8] &wr=0x1 ?trans8;
LDC.64 R6, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R12, R5, 0x4, R12 &req={0} ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDG.E R13, desc[UR6][R12.64] &wr=0x3 ?trans1;
SHF.R.S32.HI R5, RZ, 0x1f, R4 &req={1} ?trans1;
IMAD R9, R4, UR4, R30 ?WAIT4_END_GROUP;
IADD.64 R18, R4, R4 ?trans2;
IMAD.WIDE R6, R9, 0x4, R6 &req={2} ?trans2;
IADD.64 R10, R4, R18 ?WAIT3_END_GROUP;
LEA R8, P2, R18, R6, 0x2 ?trans2;
LEA R2, P1, R14, R2, 0x2 &req={0} ?trans1;
IMAD.WIDE R4, R4, 0x4, R6 ?trans1;
LEA.HI.X R9, R18, R7, R19, 0x2, P2 ?trans2;
LEA.HI.X R3, R14, R3, R15, 0x2, P1 ?trans1;
LDG.E R18, desc[UR6][R6.64] &wr=0x3 ?trans1;
LEA R14, P1, R10, R6, 0x2 ?WAIT3_END_GROUP;
LDG.E R4, desc[UR6][R4.64] &wr=0x2 ?trans1;
LEA.HI.X R15, R10, R7, R11, 0x2, P1 ?WAIT3_END_GROUP;
LDG.E R22, desc[UR6][R2.64+0x4] &wr=0x2 ?trans4;
LDG.E R8, desc[UR6][R8.64] &wr=0x4 ?trans4;
LDG.E R10, desc[UR6][R2.64+0x8] &wr=0x4 ?trans4;
LDG.E R14, desc[UR6][R14.64] &wr=0x5 ?trans4;
LDG.E R11, desc[UR6][R2.64+0xc] &wr=0x5 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
FFMA R13, R13, R18, R20 &req={3} ?WAIT4_END_GROUP;
FFMA R13, R22, R4, R13 &req={2} ?WAIT4_END_GROUP;
FFMA R10, R10, R8, R13 &req={4} ?WAIT4_END_GROUP;
FFMA R20, R11, R14, R10 &req={5} ?WAIT7_END_GROUP;
@!P0 BRA 0xa20 ?trans5;
ISETP.NE.AND P0, PT, R21, 0x1, PT ?trans1;
LOP3.LUT R0, R0, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P1, PT, R0, 0x1, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x970 ?trans6;
LDC R11, c[0x0][0x3b8] &wr=0x0 ?trans1;
MOV R6, R16 ?trans1;
HFMA2 R7, -RZ, RZ, 0, 0 ?trans1;
UMOV UR5, URZ ?trans1;
IADD3 R9, PT, PT, R16, UR4, RZ ?WAIT3_END_GROUP;
IADD.64 R6, R6, UR4 ?trans2;
LDC.64 R4, c[0x0][0x388] &wr=0x1 ?trans8;
LDC.64 R14, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD R13, R11, UR4, R30 &req={0} ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
IMAD.WIDE R4, R13, 0x4, R4 &req={1} ?trans1;
LEA R8, P0, R6, R14, 0x2 &req={2} ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R2, R9, 0x4, R2 &req={0} ?trans1;
LEA.HI.X R9, R6, R15, R7, 0x2, P0 ?WAIT3_END_GROUP;
IMAD.WIDE R6, R11, 0x4, R4 ?trans2;
LDG.E R3, desc[UR6][R2.64] &wr=0x2 ?trans4;
LDG.E R4, desc[UR6][R4.64] &wr=0x2 ?trans4;
LDG.E R9, desc[UR6][R8.64+0x4] &wr=0x3 ?trans4;
LDG.E R6, desc[UR6][R6.64] &wr=0x3 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x2, URZ ?trans1;
FFMA R20, R3, R4, R20 &req={2} ?WAIT4_END_GROUP;
FFMA R20, R9, R6, R20 &req={3} ?WAIT7_END_GROUP;
@P1 BRA 0xa20 ?trans5;
LDC R7, c[0x0][0x3b8] &wr=0x0 ?trans1;
IADD3 R17, PT, PT, R16, UR4, RZ ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans8;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD R7, R7, UR4, R30 &req={0} ?trans2;
IMAD.WIDE.U32 R2, R17, 0x4, R2 &req={1} ?WAIT6_END_GROUP;
LDG.E R3, desc[UR6][R2.64] &wr=0x3 ?trans1;
IMAD.WIDE R4, R7, 0x4, R4 &req={2} ?WAIT6_END_GROUP;
LDG.E R4, desc[UR6][R4.64] &wr=0x3 ?trans2;
FFMA R20, R3, R4, R20 &req={3} ?WAIT7_END_GROUP;
FADD R0, R20.reuse, 0.70709997415542602539 ?trans1;
FADD R20, R20, -0.70709997415542602539 ?trans1;
MOV R5, 0x3bbb989d ?trans1;
MOV R6, 0x437c0000 ?trans1;
FFMA R0, R0, R0, 0.49999037384986877441 ?trans1;
FFMA R3, R20, R20, 0.49999037384986877441 ?trans1;
LDC R19, c[0x0][0x3b8] &wr=0x0 ?trans4;
FSETP.GT.AND P0, PT, R3, R0, PT ?WAIT5_END_GROUP;
FSEL R2, R3, R0, P0 ?WAIT5_END_GROUP;
FADD R0, R0, -R2.reuse ?trans1;
FADD R2, R3, -R2 ?WAIT3_END_GROUP;
FFMA.SAT R4, R0, R5.reuse, 0.5 ?trans1;
FFMA.SAT R5, R2, R5, 0.5 ?WAIT3_END_GROUP;
FFMA.RM R4, R4, R6.reuse, 12582913 ?trans1;
FFMA.RM R5, R5, R6, 12582913 ?WAIT3_END_GROUP;
FADD R3, R4.reuse, -12583039 ?trans1;
FADD R7, R5, -12583039 ?trans1;
SHF.L.U32 R4, R4, 0x17, RZ ?trans2;
FFMA R3, R0, 1.4426950216293334961, -R3 ?trans1;
FFMA R7, R2, 1.4426950216293334961, -R7 ?WAIT3_END_GROUP;
FFMA R3, R0, 1.925963033500011079e-08, R3 ?trans1;
FFMA R7, R2, 1.925963033500011079e-08, R7 ?trans1;
SHF.L.U32 R0, R5, 0x17, RZ ?WAIT4_END_GROUP;
MUFU.EX2 R3, R3 &wr=0x2 ?trans1;
MUFU.EX2 R7, R7 &wr=0x3 ?trans1;
FMUL R6, R4, R3 &req={2} ?WAIT4_END_GROUP;
FMUL R5, R6, -0.70709997415542602539 ?trans1;
FMUL R0, R0, R7 &req={3} ?WAIT3_END_GROUP;
FADD R2, RZ, R5.reuse ?trans1;
FFMA R4, R6, 0.70709997415542602539, R5 ?trans1;
FFMA R9, R0.reuse, 0.70709997415542602539, RZ ?trans2;
FADD R5, R5, R2 ?trans1;
FFMA R3, R0, -0.70709997415542602539, RZ ?trans1;
FADD R4, R4, R9 ?trans2;
FFMA R2, R0, 0.70709997415542602539, R5 ?trans2;
FADD R7, R4, R3 ?WAIT2_END_GROUP;
FADD R9, R9, R2 ?trans1;
LDC.64 R4, c[0x0][0x390] &wr=0x2 ?trans1;
FADD R8, R7.reuse, 0.70709997415542602539 ?trans1;
FADD R10, R7, -0.70709997415542602539 ?WAIT3_END_GROUP;
FMUL R15, R8, R8 ?trans1;
FADD R8, R9, 0.70709997415542602539 ?trans2;
LDC.64 R2, c[0x0][0x3a8] &wr=0x3 ?trans1;
FMUL R11, R10, R10 ?trans1;
FFMA R17, R8, R8, R15 ?WAIT3_END_GROUP;
FFMA R13, R8, R8, R11 ?trans1;
FADD R8, R9, -0.70709997415542602539 ?trans1;
FMUL R17, R6, R17 ?WAIT3_END_GROUP;
FFMA R11, R8, R8.reuse, R11 ?trans1;
FFMA R13, R6, R13, R17 ?trans1;
IMAD R17, R19, UR8, R30 &req={1,0} ?trans2;
FFMA R15, R8, R8, R15 ?trans1;
FFMA R6, R0, R11, R13 ?trans1;
IMAD.WIDE R4, R17, 0x8, R4 &req={2} ?WAIT4_END_GROUP;
FFMA R15, R0, R15, R6 ?trans1;
STG.E desc[UR6][R4.64+0x4], R7 ?trans1;
IMAD.WIDE R2, R17, 0x8, R2 &req={3} ?WAIT3_END_GROUP;
STG.E desc[UR6][R4.64], R9 ?trans4;
STG.E desc[UR6][R2.64+0x4], RZ ?trans4;
STG.E desc[UR6][R2.64], R15 ?trans1;
EXIT ?trans5;
BRA 0xdf0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: kernelFunc(float*, float*, hipComplex*, float*, float*, hipComplex*, int, int, int)
_Z10kernelFuncPfS_P10hipComplexS_S_S1_iii:
s_clause 0x3
s_load_b32 s10, s[0:1], 0x4c
s_load_b64 s[8:9], s[0:1], 0x34
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s10, s10, 0xffff
s_cmp_lt_i32 s8, 1
v_mad_u64_u32 v[1:2], null, s15, s10, v[0:1]
s_cbranch_scc1 .LBB0_3
s_mul_i32 s10, s14, s8
v_mov_b32_e32 v0, 0
s_ashr_i32 s11, s10, 31
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mov_b32_e32 v2, v1
s_lshl_b64 s[10:11], s[10:11], 2
s_add_u32 s4, s4, s10
s_addc_u32 s5, s5, s11
.LBB0_2:
s_delay_alu instid0(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
s_load_b32 s10, s[4:5], 0x0
s_add_i32 s8, s8, -1
s_add_u32 s4, s4, 4
s_addc_u32 s5, s5, 0
v_lshlrev_b64 v[3:4], 2, v[2:3]
v_add_nc_u32_e32 v2, s9, v2
s_cmp_lg_u32 s8, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v3, vcc_lo, s6, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
global_load_b32 v3, v[3:4], off
s_waitcnt vmcnt(0) lgkmcnt(0)
v_fmac_f32_e32 v0, s10, v3
s_cbranch_scc1 .LBB0_2
s_branch .LBB0_4
.LBB0_3:
v_mov_b32_e32 v0, 0
.LBB0_4:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_add_f32_e32 v2, 0x3f350481, v0
v_add_f32_e32 v0, 0xbf350481, v0
s_load_b64 s[0:1], s[0:1], 0x28
v_fmaak_f32 v2, v2, v2, 0x3efffebd
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmaak_f32 v0, v0, v0, 0x3efffebd
v_cmp_gt_f32_e32 vcc_lo, v0, v2
v_cndmask_b32_e32 v3, v2, v0, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_f32_e32 v2, v2, v3
v_mul_f32_e32 v4, 0x3fb8aa3b, v2
v_sub_f32_e32 v0, v0, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_rndne_f32_e32 v5, v4
v_mul_f32_e32 v6, 0x3fb8aa3b, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_fma_f32 v7, 0x3fb8aa3b, v0, -v6
v_rndne_f32_e32 v8, v6
v_fmac_f32_e32 v7, 0x32a5705f, v0
v_fma_f32 v3, 0x3fb8aa3b, v2, -v4
v_sub_f32_e32 v4, v4, v5
v_cvt_i32_f32_e32 v5, v5
v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v2
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v3, 0x32a5705f, v2
v_dual_add_f32 v3, v4, v3 :: v_dual_sub_f32 v4, v6, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_exp_f32_e32 v3, v3
s_waitcnt_depctr 0xfff
v_ldexp_f32 v3, v3, v5
v_cvt_i32_f32_e32 v5, v8
v_cndmask_b32_e32 v3, 0, v3, vcc_lo
v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v6, 0x7f800000, v3, vcc_lo
v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v0
v_fma_f32 v3, 0xbf350481, v6, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_fmac_f32 v3, 0xbf350481, v6 :: v_dual_add_f32 v4, v4, v7
v_exp_f32_e32 v4, v4
s_waitcnt_depctr 0xfff
v_ldexp_f32 v4, v4, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_cndmask_b32_e32 v2, 0, v4, vcc_lo
v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v0
v_mul_f32_e32 v0, 0xbf350481, v6
v_cndmask_b32_e32 v8, 0x7f800000, v2, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fmac_f32_e32 v0, 0x3f350481, v6
v_fma_f32 v2, 0x3f350481, v8, 0
v_fmac_f32_e32 v3, 0x3f350481, v8
v_fma_f32 v4, 0xbf350481, v8, 0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v0, v0, v2
v_dual_add_f32 v2, v2, v3 :: v_dual_add_f32 v3, v4, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_4)
v_add_f32_e32 v0, 0x3f350481, v2
v_mad_u64_u32 v[4:5], null, s14, s9, v[1:2]
v_add_f32_e32 v1, 0xbf350481, v2
v_add_f32_e32 v9, 0x3f350481, v3
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_dual_add_f32 v7, 0xbf350481, v3 :: v_dual_mul_f32 v0, v0, v0
v_mul_f32_e32 v11, v1, v1
v_ashrrev_i32_e32 v5, 31, v4
v_mov_b32_e32 v1, 0
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
v_fma_f32 v10, v7, v7, v0
v_fmac_f32_e32 v0, v9, v9
v_fma_f32 v7, v7, v7, v11
v_fmac_f32_e32 v11, v9, v9
v_lshlrev_b64 v[4:5], 3, v[4:5]
v_mul_f32_e32 v0, v6, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fmac_f32_e32 v0, v6, v10
v_add_co_u32 v6, vcc_lo, s2, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_fmac_f32_e32 v0, v8, v7
v_add_co_ci_u32_e32 v7, vcc_lo, s3, v5, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, vcc_lo, s0, v4
v_fmac_f32_e32 v0, v8, v11
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
global_store_b64 v[6:7], v[2:3], off
global_store_b64 v[4:5], v[0:1], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| kernelFunc | 5,775 | 2,802 | stackv2-00000-of-00015 |
// Demangled: horizShared2D(int*, int*, int, int, int)
Function : _Z13horizShared2DPiS_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R13, SR_TID.Y &wr=0x1 ?trans7;
LDC R10, c[0x0][0x360] &wr=0x2 ?trans1;
LDCU UR5, c[0x0][0x398] &wr=0x3 ?trans7;
S2UR UR4, SR_CTAID.Y &wr=0x1 ?trans8;
LDC R0, c[0x0][0x364] &wr=0x1 ?trans2;
IMAD R0, R0, UR4, R13 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={3} ?WAIT13_END_GROUP;
@P0 EXIT &req={2,0} ?trans5;
S2R R17, SR_TID.X &wr=0x0 ?trans1;
S2UR UR4, SR_CTAID.X &wr=0x0 ?trans1;
LDCU UR8, c[0x0][0x394] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R2, c[0x0][0x380] &wr=0x3 ?trans8;
LDC R12, c[0x0][0x390] &wr=0x4 ?trans1;
IMAD R7, R0, UR8, RZ &req={1} ?WAIT5_END_GROUP;
IADD3 R11, PT, PT, R7, UR8, RZ ?WAIT4_END_GROUP;
IADD3 R4, PT, PT, R11, -0x1, RZ ?trans1;
IMAD R0, R10, UR4, R17 &req={0} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0.reuse, UR8, PT ?trans1;
IADD3 R9, PT, PT, R0, R7, RZ ?WAIT5_END_GROUP;
SEL R5, R9, R4, !P0 ?WAIT5_END_GROUP;
IMAD.WIDE R4, R5, 0x4, R2 &req={3} ?WAIT6_END_GROUP;
LDG.E R4, desc[UR6][R4.64] &req={2} &wr=0x2 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x0 ?trans1;
IADD3 R6, PT, PT, R10, R12.reuse, R12 &req={4} ?trans1;
UMOV UR4, 0x400 ?trans1;
ISETP.GE.AND P1, PT, R17, R12, PT ?trans1;
BSSY.RECONVERGENT B0, 0x360 ?trans1;
ISETP.GE.AND P0, PT, R0, UR8, PT ?trans1;
IMAD R8, R6, R13, RZ ?WAIT5_END_GROUP;
IADD3 R6, PT, PT, R8, R12, R17 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={0} ?WAIT6_END_GROUP;
LEA R13, R6, UR4, 0x2 ?WAIT5_END_GROUP;
STS [R13], R4 &req={2} &rd=0x0 ?trans1;
@P1 BRA 0x350 ?trans5;
IADD3 R4, PT, PT, R0.reuse, R10, RZ &req={0} ?trans1;
ISETP.GE.U32.AND P1, PT, R0, R12, PT ?WAIT4_END_GROUP;
ISETP.GE.AND P2, PT, R4, UR8, PT ?WAIT9_END_GROUP;
@P1 IADD3 R7, PT, PT, R9, -R12, RZ ?WAIT4_END_GROUP;
@!P2 IADD3 R15, PT, PT, R9, R10, RZ ?trans1;
IMAD.WIDE R4, R7, 0x4, R2 ?WAIT4_END_GROUP;
@!P2 IMAD.WIDE R6, R15, 0x4, R2.reuse ?trans2;
LDG.E R4, desc[UR6][R4.64] &wr=0x2 ?trans2;
@P2 IMAD.WIDE R2, R11, 0x4, R2 ?trans2;
@!P2 LDG.E R6, desc[UR6][R6.64] &wr=0x3 ?trans4;
@P2 LDG.E R2, desc[UR6][R2.64+-0x4] &wr=0x4 ?trans1;
IADD3 R8, PT, PT, R8, R17, RZ ?trans1;
IMAD R15, R10, 0x4, R13 ?WAIT3_END_GROUP;
LEA R11, R8, UR4, 0x2 ?WAIT5_END_GROUP;
STS [R11], R4 &req={2} &rd=0x1 ?trans4;
@!P2 STS [R15], R6 &req={3} &rd=0x1 ?trans4;
@P2 STS [R15], R2 &req={4} &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 EXIT ?trans5;
LDS R13, [R13+0x14] &req={0} &wr=0x0 ?trans1;
LDC.64 R2, c[0x0][0x388] &req={1} &wr=0x1 ?trans2;
IMAD.WIDE R2, R9, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R13 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x3d0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: horizShared2D(int*, int*, int, int, int)
_Z13horizShared2DPiS_iii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b128 s[8:11], s[0:1], 0x10
v_bfe_u32 v5, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[1:2], null, s15, s3, v[5:6]
s_mov_b32 s3, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s10, v1
s_cbranch_execz .LBB1_13
s_load_b128 s[4:7], s[0:1], 0x0
v_and_b32_e32 v2, 0x3ff, v0
s_and_b32 s1, s2, 0xffff
s_mov_b32 s2, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[3:4], null, s14, s1, v[2:3]
v_mul_lo_u32 v4, v1, s9
v_cmp_gt_i32_e32 vcc_lo, s9, v3
s_delay_alu instid0(VALU_DEP_2)
v_add_nc_u32_e32 v0, v4, v3
v_cmpx_le_i32_e64 s9, v3
s_xor_b32 s2, exec_lo, s2
s_cbranch_execz .LBB1_3
s_mov_b32 s0, s9
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[6:7], null, s9, v1, s[0:1]
v_ashrrev_i32_e32 v7, 31, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[6:7]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v1, s0, s4, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e64 v7, s0, s5, v7, s0
v_add_co_u32 v6, s0, v1, -4
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v7, s0, -1, v7, s0
.LBB1_3:
s_or_saveexec_b32 s2, s2
v_ashrrev_i32_e32 v1, 31, v0
s_xor_b32 exec_lo, exec_lo, s2
s_cbranch_execz .LBB1_5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[0:1]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v6, s0, s4, v6
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v7, s0, s5, v7, s0
.LBB1_5:
s_or_b32 exec_lo, exec_lo, s2
global_load_b32 v7, v[6:7], off
s_lshl_b32 s0, s8, 1
s_mov_b32 s2, exec_lo
s_add_i32 s0, s0, s1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v6, s0, v5
v_add3_u32 v5, v2, s8, v6
s_delay_alu instid0(VALU_DEP_1)
v_lshl_add_u32 v5, v5, 2, 0
s_waitcnt vmcnt(0)
ds_store_b32 v5, v7
v_cmpx_gt_i32_e64 s8, v2
s_cbranch_execz .LBB1_11
v_subrev_nc_u32_e32 v7, s8, v0
v_cmp_gt_i32_e64 s0, s8, v3
v_add_nc_u32_e32 v2, v6, v2
v_add_nc_u32_e32 v3, s1, v3
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cndmask_b32_e64 v7, v7, v4, s0
v_lshl_add_u32 v2, v2, 2, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v8, 31, v7
v_lshlrev_b64 v[7:8], 2, v[7:8]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v7, s0, s4, v7
v_add_co_ci_u32_e64 v8, s0, s5, v8, s0
v_cmp_le_i32_e64 s0, s9, v3
global_load_b32 v7, v[7:8], off
s_waitcnt vmcnt(0)
ds_store_b32 v2, v7
s_and_saveexec_b32 s3, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_xor_b32 s3, exec_lo, s3
v_add_nc_u32_e32 v2, s9, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v2, s0, s4, v2
v_add_co_ci_u32_e64 v3, s0, s5, v3, s0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v2, s0, v2, -4
v_add_co_ci_u32_e64 v3, s0, -1, v3, s0
s_and_not1_saveexec_b32 s3, s3
v_add_nc_u32_e32 v2, s1, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v2, s0, s4, v2
v_add_co_ci_u32_e64 v3, s0, s5, v3, s0
s_or_b32 exec_lo, exec_lo, s3
global_load_b32 v2, v[2:3], off
v_lshl_add_u32 v3, s1, 2, v5
s_waitcnt vmcnt(0)
ds_store_b32 v3, v2
.LBB1_11:
s_or_b32 exec_lo, exec_lo, s2
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB1_13
ds_load_b32 v2, v5 offset:20
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
s_waitcnt lgkmcnt(0)
global_store_b32 v[0:1], v2, off
.LBB1_13:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| horizShared2D | 1,557 | 2,328 | stackv2-00000-of-00015 |
// Demangled: shared1D(int*, int*, int, int)
Function : _Z8shared1DPiS_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R13, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans7;
LDC R12, c[0x0][0x360] &wr=0x1 ?trans8;
LDC.64 R14, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R0, R12, UR4, R13 &req={1} ?trans1;
LDCU.64 UR4, c[0x0][0x380] &wr=0x1 ?trans4;
ISETP.GE.AND P0, PT, R0, R15, PT &req={3} ?trans1;
IADD3 R2, PT, PT, R15, -0x1, RZ ?WAIT4_END_GROUP;
SHF.R.S32.HI R3, RZ, 0x1f, R2 ?WAIT8_END_GROUP;
@!P0 MOV R2, R0 ?trans1;
@!P0 MOV R3, RZ ?WAIT4_END_GROUP;
LEA R4, P0, R2, UR4, 0x2 &req={1} ?WAIT4_END_GROUP;
LEA.HI.X R5, R2, UR5, R3, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R4, desc[UR6][R4.64] &req={2} &wr=0x2 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
IADD3 R2, PT, PT, R13.reuse, R14.reuse, RZ ?trans1;
ISETP.GE.AND P1, PT, R13, R14, PT ?trans1;
BSSY.RECONVERGENT B0, 0x2d0 ?trans1;
ISETP.GE.AND P0, PT, R0, R15, PT ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?WAIT6_END_GROUP;
LEA R11, R2, UR4, 0x2 ?WAIT5_END_GROUP;
STS [R11], R4 &req={2} &rd=0x1 ?trans1;
@P1 BRA 0x2c0 &req={0} ?trans5;
LDC.64 R8, c[0x0][0x380] &wr=0x0 ?trans1;
ISETP.GE.U32.AND P1, PT, R0, R14, PT ?WAIT13_END_GROUP;
@P1 IADD3 R3, PT, PT, R0, -R14, RZ ?WAIT5_END_GROUP;
@P1 IMAD.WIDE.U32 R2, R3, 0x4, R8 &req={0} ?WAIT5_END_GROUP;
@P1 LDG.E R10, desc[UR6][R2.64] &wr=0x2 ?trans1;
IADD3 R6, PT, PT, R0, R12, RZ ?trans1;
@!P1 LDC.64 R4, c[0x0][0x380] &req={1} &wr=0x0 ?trans4;
ISETP.GE.AND P2, PT, R6, R15, PT ?WAIT13_END_GROUP;
@!P2 IMAD.WIDE.U32 R6, R6, 0x4, R8 ?WAIT4_END_GROUP;
@P2 IMAD.WIDE R8, R15, 0x4, R8 ?trans2;
@!P2 LDG.E R6, desc[UR6][R6.64] &wr=0x3 ?trans4;
@P2 LDG.E R8, desc[UR6][R8.64+-0x4] &wr=0x4 ?trans4;
@!P1 LDG.E R10, desc[UR6][R4.64] &req={0} &wr=0x2 ?trans1;
LEA R13, R13, UR4, 0x2 ?trans1;
IMAD R15, R12, 0x4, R11 ?WAIT4_END_GROUP;
STS [R13], R10 &req={2} &rd=0x0 ?trans4;
@!P2 STS [R15], R6 &req={3} &rd=0x0 ?trans4;
@P2 STS [R15], R8 &req={4} &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 EXIT ?trans5;
LDS R11, [R11+0x14] &req={1} &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x388] &wr=0x2 ?trans2;
LEA R2, P0, R0, UR4, 0x2 &req={2} ?WAIT4_END_GROUP;
LEA.HI.X R3, R0, UR5, RZ, 0x2, P0 ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R11 &req={1} ?trans1;
EXIT ?trans5;
BRA 0x350;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: shared1D(int*, int*, int, int)
_Z8shared1DPiS_ii:
s_clause 0x2
s_load_b32 s8, s[0:1], 0x24
s_load_b64 s[2:3], s[0:1], 0x10
s_load_b128 s[4:7], s[0:1], 0x0
s_mov_b32 s10, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s1, s8, 0xffff
s_ashr_i32 s9, s3, 31
v_mad_u64_u32 v[3:4], null, s15, s1, v[0:1]
s_mov_b32 s8, s3
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[8:9], s[8:9], 2
s_add_u32 s0, s4, s8
s_addc_u32 s9, s5, s9
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v4, 31, v3
s_add_u32 s8, s0, -4
s_addc_u32 s9, s9, -1
v_lshlrev_b64 v[1:2], 2, v[3:4]
v_add_nc_u32_e32 v4, s2, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshl_add_u32 v4, v4, 2, 0
v_add_co_u32 v5, vcc_lo, s4, v1
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v6, vcc_lo, s5, v2, vcc_lo
v_cmp_gt_i32_e32 vcc_lo, s3, v3
v_cndmask_b32_e32 v8, s9, v6, vcc_lo
s_delay_alu instid0(VALU_DEP_4)
v_cndmask_b32_e32 v7, s8, v5, vcc_lo
global_load_b32 v7, v[7:8], off
s_waitcnt vmcnt(0)
ds_store_b32 v4, v7
v_cmpx_gt_i32_e64 s2, v0
s_cbranch_execz .LBB0_2
v_subrev_nc_u32_e32 v7, s2, v3
v_dual_mov_b32 v8, 0 :: v_dual_add_nc_u32 v3, s1, v3
s_lshl_b32 s2, s1, 2
v_lshl_add_u32 v0, v0, 2, 0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_max_i32_e32 v7, 0, v7
v_add_co_u32 v10, s0, v5, s2
v_add_co_ci_u32_e64 v9, s0, 0, v6, s0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[5:6], 2, v[7:8]
v_cmp_gt_i32_e64 s0, s3, v3
v_cndmask_b32_e64 v7, s9, v9, s0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v8, s1, s4, v5
v_add_co_ci_u32_e64 v9, s1, s5, v6, s1
v_cndmask_b32_e64 v6, s8, v10, s0
global_load_b32 v3, v[8:9], off
global_load_b32 v5, v[6:7], off
v_add_nc_u32_e32 v6, s2, v4
s_waitcnt vmcnt(1)
ds_store_b32 v0, v3
s_waitcnt vmcnt(0)
ds_store_b32 v6, v5
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s10
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_saveexec_b32 s0, vcc_lo
s_cbranch_execz .LBB0_4
ds_load_b32 v3, v4 offset:20
v_add_co_u32 v0, vcc_lo, s6, v1
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v2, vcc_lo
s_waitcnt lgkmcnt(0)
global_store_b32 v[0:1], v3, off
.LBB0_4:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| shared1D | 1,417 | 1,309 | stackv2-00000-of-00015 |
// Demangled: vertShared2D(int*, int*, int, int, int)
Function : _Z12vertShared2DPiS_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R4, c[0x0][0x360] &wr=0x1 ?trans1;
LDCU UR8, c[0x0][0x364] &wr=0x2 ?trans7;
LDC R15, c[0x0][0x394] &wr=0x3 ?trans1;
IMAD R8, R4, UR4, R5 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R8, R15, PT &req={3} ?WAIT13_END_GROUP;
@P0 EXIT &req={2,0} ?trans5;
S2R R14, SR_TID.Y &wr=0x0 ?trans1;
LDCU UR9, c[0x0][0x398] &wr=0x1 ?trans1;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans1;
S2R R9, SR_CTAID.Y &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans1;
LDCU UR10, c[0x0][0x390] &wr=0x4 ?trans1;
UIADD3 UR4, UPT, UPT, UR9, -0x1, URZ &req={1} ?WAIT6_END_GROUP;
IMAD R11, R15, UR4, R8 ?trans2;
IMAD R9, R9, UR8, R14 &req={0} ?WAIT4_END_GROUP;
IMAD R0, R9.reuse, R15, R8 ?trans1;
ISETP.GE.AND P0, PT, R9, UR9, PT ?WAIT5_END_GROUP;
SEL R7, R0, R11, !P0 ?WAIT5_END_GROUP;
IMAD.WIDE R6, R7, 0x4, R2 &req={2} ?WAIT6_END_GROUP;
LDG.E R6, desc[UR6][R6.64] &req={3} &wr=0x2 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x0 ?trans1;
IADD3 R10, PT, PT, R14.reuse, UR10, RZ &req={4} ?trans1;
UMOV UR4, 0x400 ?trans1;
ISETP.GE.AND P1, PT, R14, UR10, PT ?trans1;
BSSY.RECONVERGENT B0, 0x3e0 ?trans1;
ISETP.GE.AND P0, PT, R9, UR9, PT ?trans1;
IMAD R12, R10, R4, R5 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={0} ?WAIT6_END_GROUP;
LEA R13, R12, UR4, 0x2 ?WAIT5_END_GROUP;
STS [R13], R6 &req={2} &rd=0x0 ?trans1;
@P1 BRA 0x3d0 ?trans5;
LDCU.64 UR12, c[0x0][0x380] &wr=0x1 ?trans1;
ISETP.GE.U32.AND P2, PT, R9.reuse, UR10, PT ?trans1;
IADD3 R6, PT, PT, R9, UR8, RZ &req={0} ?trans2;
IADD3 R7, PT, PT, -R15, RZ, RZ ?WAIT3_END_GROUP;
ISETP.GE.AND P1, PT, R6, UR9, PT ?trans2;
IMAD R9, R7, UR10, R0 ?trans1;
MOV R6, R8 ?trans1;
HFMA2 R7, -RZ, RZ, 0, 0 ?WAIT3_END_GROUP;
SHF.R.S32.HI R12, RZ, 0x1f, R9 ?trans1;
@P2 MOV R6, R9 ?WAIT4_END_GROUP;
@P2 MOV R7, R12 ?trans1;
LEA R8, P2, R6, UR12, 0x2 &req={1} ?trans1;
@!P1 IMAD R13, R15, UR8, R0 ?WAIT3_END_GROUP;
LEA.HI.X R9, R6, UR13, R7, 0x2, P2 ?trans1;
@!P1 IMAD.WIDE R6, R13, 0x4, R2 ?WAIT4_END_GROUP;
@P1 IMAD.WIDE R2, R11, 0x4, R2 ?trans1;
LDG.E R8, desc[UR6][R8.64] &wr=0x2 ?trans4;
@!P1 LDG.E R6, desc[UR6][R6.64] &wr=0x3 ?trans4;
@P1 LDG.E R2, desc[UR6][R2.64] &wr=0x4 ?trans1;
IADD3 R12, PT, PT, R10, UR8, RZ ?trans1;
IMAD R11, R14, R4, R5 ?WAIT4_END_GROUP;
IMAD R12, R12, R4, R5 ?trans1;
LEA R11, R11, UR4, 0x2 ?WAIT4_END_GROUP;
LEA R13, R12, UR4, 0x2 ?trans1;
STS [R11], R8 &req={2} &rd=0x1 ?trans4;
@!P1 STS [R13], R6 &req={3} &rd=0x1 ?trans4;
@P1 STS [R13], R2 &req={4} &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 EXIT ?trans5;
IADD3 R10, PT, PT, R10, 0x5, RZ ?trans1;
LDC.64 R2, c[0x0][0x388] &req={1} &wr=0x1 ?trans4;
IMAD R10, R10, R4, R5 ?WAIT5_END_GROUP;
LEA R10, R10, UR4, 0x2 ?WAIT5_END_GROUP;
LDS R5, [R10] &wr=0x2 ?trans1;
IMAD.WIDE R2, R0, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R5 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x480;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: vertShared2D(int*, int*, int, int, int)
_Z12vertShared2DPiS_iii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b128 s[8:11], s[0:1], 0x10
v_and_b32_e32 v2, 0x3ff, v0
s_mov_b32 s4, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s2, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[5:6], null, s14, s3, v[2:3]
s_delay_alu instid0(VALU_DEP_1)
v_mov_b32_e32 v4, v5
v_cmpx_gt_i32_e64 s9, v5
s_cbranch_execz .LBB2_9
v_bfe_u32 v3, v0, 10, 10
s_lshr_b32 s11, s2, 16
s_mov_b32 s4, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[6:7], null, s15, s11, v[3:4]
v_mad_u64_u32 v[0:1], null, v6, s9, v[5:6]
v_cmp_gt_i32_e32 vcc_lo, s10, v6
s_delay_alu instid0(VALU_DEP_2)
v_mov_b32_e32 v7, v0
v_cmpx_le_i32_e64 s10, v6
s_add_i32 s2, s10, -1
s_delay_alu instid0(SALU_CYCLE_1)
v_mad_u64_u32 v[7:8], null, s2, s9, v[5:6]
s_or_b32 exec_lo, exec_lo, s4
s_load_b128 s[4:7], s[0:1], 0x0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v8, 31, v7
s_mov_b32 s1, exec_lo
v_lshlrev_b64 v[7:8], 2, v[7:8]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v7, s0, s4, v7
v_add_co_ci_u32_e64 v8, s0, s5, v8, s0
global_load_b32 v10, v[7:8], off
v_add_nc_u32_e32 v7, s8, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[8:9], null, v7, s3, v[2:3]
v_lshl_add_u32 v1, v8, 2, 0
s_waitcnt vmcnt(0)
ds_store_b32 v1, v10
v_cmpx_gt_i32_e64 s8, v3
s_cbranch_execz .LBB2_7
s_mov_b32 s2, exec_lo
v_cmpx_le_i32_e64 s8, v6
s_mul_i32 s0, s9, s8
s_delay_alu instid0(SALU_CYCLE_1)
v_subrev_nc_u32_e32 v4, s0, v0
s_or_b32 exec_lo, exec_lo, s2
v_add_nc_u32_e32 v6, s11, v6
v_dual_mov_b32 v8, s11 :: v_dual_add_nc_u32 v7, s11, v7
s_add_i32 s2, s10, -1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_gt_i32_e64 s0, s10, v6
v_cndmask_b32_e64 v6, s2, v8, s0
v_cndmask_b32_e64 v5, v5, v0, s0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[8:9], null, v6, s9, v[5:6]
v_ashrrev_i32_e32 v5, 31, v4
v_lshlrev_b64 v[4:5], 2, v[4:5]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v9, 31, v8
v_add_co_u32 v4, s0, s4, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[8:9], 2, v[8:9]
v_add_co_ci_u32_e64 v5, s0, s5, v5, s0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v8, s0, s4, v8
v_add_co_ci_u32_e64 v9, s0, s5, v9, s0
s_clause 0x1
global_load_b32 v6, v[4:5], off
global_load_b32 v8, v[8:9], off
v_mad_u64_u32 v[4:5], null, v7, s3, v[2:3]
v_mad_u32_u24 v2, v3, s3, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshl_add_u32 v2, v2, 2, 0
v_lshl_add_u32 v3, v4, 2, 0
s_waitcnt vmcnt(1)
ds_store_b32 v2, v6
s_waitcnt vmcnt(0)
ds_store_b32 v3, v8
.LBB2_7:
s_or_b32 exec_lo, exec_lo, s1
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB2_9
v_mad_u64_u32 v[2:3], null, s3, 20, v[1:2]
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
ds_load_b32 v2, v2
v_add_co_u32 v0, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
s_waitcnt lgkmcnt(0)
global_store_b32 v[0:1], v2, off
.LBB2_9:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| vertShared2D | 1,772 | 1,929 | stackv2-00000-of-00015 |
// Demangled: kernel_bottom_right_processing(int*, int*, int, int, int)
Function : _Z30kernel_bottom_right_processingPiS_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R12, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x2 ?trans7;
LDC R3, c[0x0][0x360] &wr=0x1 ?trans8;
LDC.64 R14, c[0x0][0x390] &wr=0x3 ?trans8;
LDC.64 R8, c[0x0][0x388] &wr=0x4 ?trans1;
IMAD R0, R3, UR4, R12 &req={1} ?trans1;
LDCU.64 UR4, c[0x0][0x380] &wr=0x1 ?trans6;
LDC.64 R10, c[0x0][0x380] &wr=0x5 ?trans1;
IADD3 R5, PT, PT, -R0, -0x2, R14 &req={3} ?WAIT2_END_GROUP;
IADD3 R4, PT, PT, -R15, R0, R14.reuse ?trans2;
SHF.R.S32.HI R3, RZ, 0x1f, R14 ?trans1;
MOV R2, R14.reuse ?trans2;
IMAD R4, R5, R14, R4 ?WAIT4_END_GROUP;
IMAD.WIDE R8, R4, 0x4, R8 &req={4} ?trans1;
SHF.R.S32.HI R5, RZ, 0x1f, R4 ?WAIT5_END_GROUP;
IADD.64 R2, -R2, R4 ?trans2;
LDG.E R8, desc[UR8][R8.64+-0x8] &req={2} &rd=0x2 &wr=0x3 ?trans3;
LEA R6, P0, R2, UR4, 0x2 &req={1} ?WAIT4_END_GROUP;
LEA.HI.X R7, R2, UR5, R3, 0x2, P0 ?trans1;
ISETP.NE.AND P0, PT, R12, RZ, PT ?trans1;
IMAD.WIDE R2, R4, 0x4, R10 &req={5} ?WAIT3_END_GROUP;
LDG.E R5, desc[UR8][R6.64+-0xc] &wr=0x3 ?trans4;
LDG.E R4, desc[UR8][R6.64+-0x8] &wr=0x4 ?trans5;
@!P0 LDG.E R10, desc[UR8][R2.64+-0xc] &wr=0x5 ?trans1;
S2UR UR6, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?WAIT2_END_GROUP;
UIADD3 UR5, UPT, UPT, UR4, 0x1000, URZ ?trans1;
ISETP.GT.AND P1, PT, R0, R15, PT ?trans1;
ULEA UR4, UR6, UR4, 0x18 &req={1} ?trans2;
ULEA UR5, UR6, UR5, 0x18 ?WAIT4_END_GROUP;
LEA R0, R12.reuse, UR4, 0x2 ?trans2;
LEA R9, R12, UR5, 0x2 &req={2} ?trans2;
IADD3 R5, PT, PT, R5, R8, RZ &req={3} ?WAIT5_END_GROUP;
STS [R0], R5 &rd=0x1 ?trans4;
STS [R9+0x4], R4 &req={4} &rd=0x1 ?trans4;
@!P0 STS [UR4+0x1000], R10 &req={5} &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P1 EXIT &req={0} ?trans5;
LDS R4, [R9+0x4] &req={1} &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x398] &wr=0x0 ?trans3;
LDS R6, [R9] &wr=0x1 ?trans4;
LDS R0, [R0] &wr=0x2 ?trans1;
IADD3 R5, PT, PT, R4, -UR4, RZ &req={0} ?trans2;
IADD3 R6, PT, PT, R6, -UR4, RZ &req={1} ?WAIT3_END_GROUP;
VIMNMX.S32 R5, R0, R5, !PT &req={2} ?WAIT5_END_GROUP;
VIMNMX.S32 R5, R6, R5, !PT ?WAIT5_END_GROUP;
STG.E desc[UR8][R2.64+-0x8], R5 ?trans1;
EXIT ?trans5;
BRA 0x320;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: kernel_bottom_right_processing(int*, int*, int, int, int)
_Z30kernel_bottom_right_processingPiS_iii:
s_clause 0x1
s_load_b32 s8, s[0:1], 0x2c
s_load_b256 s[0:7], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s7, s8, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s7, v[0:1]
s_sub_i32 s7, s4, s5
v_sub_nc_u32_e32 v2, s4, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v2, -2, v2
v_mul_lo_u32 v2, v2, s4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add3_u32 v2, s7, v1, v2
s_ashr_i32 s7, s4, 31
v_ashrrev_i32_e32 v3, 31, v2
v_sub_co_u32 v4, vcc_lo, v2, s4
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
v_lshlrev_b64 v[2:3], 2, v[2:3]
v_lshlrev_b64 v[4:5], 2, v[4:5]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v6, vcc_lo, s2, v2
v_add_co_ci_u32_e32 v7, vcc_lo, s3, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v4, vcc_lo, s0, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
s_mov_b32 s2, exec_lo
global_load_b32 v7, v[6:7], off offset:-8
global_load_b64 v[5:6], v[4:5], off offset:-12
v_lshlrev_b32_e32 v4, 2, v0
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v5, v7, v5
ds_store_b32 v4, v5 offset:4112
ds_store_b32 v4, v6 offset:4
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB3_2
v_add_co_u32 v5, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v6, vcc_lo, s1, v3, vcc_lo
global_load_b32 v0, v[5:6], off offset:-12
v_mov_b32_e32 v5, 0
s_waitcnt vmcnt(0)
ds_store_b32 v5, v0
.LBB3_2:
s_or_b32 exec_lo, exec_lo, s2
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_mov_b32 s2, exec_lo
v_cmpx_ge_i32_e64 s5, v1
s_cbranch_execz .LBB3_4
ds_load_2addr_b32 v[0:1], v4 offset1:1
v_add_nc_u32_e32 v4, 0x1010, v4
ds_load_b32 v4, v4
s_waitcnt lgkmcnt(1)
v_subrev_nc_u32_e32 v1, s6, v1
v_subrev_nc_u32_e32 v0, s6, v0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_max3_i32 v4, v4, v1, v0
v_add_co_u32 v0, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v3, vcc_lo
global_store_b32 v[0:1], v4, off offset:-8
.LBB3_4:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| kernel_bottom_right_processing | 1,339 | 1,201 | stackv2-00000-of-00015 |
// Demangled: kernel_init_input_itemsets(int*, int, int)
Function : _Z26kernel_init_input_itemsetsPiii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R7, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x388] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R7, R0, UR4, R7 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, UR6, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU UR7, c[0x0][0x38c] &wr=0x1 ?trans1;
IADD3 R9, PT, PT, RZ, -R7, RZ ?trans1;
IMAD R3, R7, UR6, RZ ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans3;
IMAD R9, R9, UR7, RZ &req={1} ?trans2;
IMAD.WIDE R2, R3, 0x4, R4 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R7, 0x4, R4 ?trans1;
STG.E desc[UR4][R2.64], R9 &req={2} ?trans4;
STG.E desc[UR4][R4.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x130;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: kernel_init_input_itemsets(int*, int, int)
_Z26kernel_init_input_itemsetsPiii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x1c
s_load_b64 s[2:3], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
s_mov_b32 s4, exec_lo
v_cmpx_gt_i32_e64 s2, v1
s_cbranch_execz .LBB1_2
s_load_b64 s[0:1], s[0:1], 0x0
v_mul_lo_u32 v3, v1, s2
v_ashrrev_i32_e32 v2, 31, v1
v_mul_lo_u32 v5, v1, s3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v5, 0, v5
v_lshlrev_b64 v[3:4], 2, v[3:4]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s0, v3
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v4, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_clause 0x1
global_store_b32 v[2:3], v5, off
global_store_b32 v[0:1], v5, off
.LBB1_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| kernel_init_input_itemsets | 510 | 616 | stackv2-00000-of-00015 |
// Demangled: kernel_init_reference(int*, int*, int*, int, int)
Function : _Z21kernel_init_referencePiS_S_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R11, SR_TID.X &wr=0x1 ?trans7;
LDC R3, c[0x0][0x364] &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x398] &wr=0x3 ?trans1;
S2R R0, SR_TID.Y &wr=0x2 ?trans6;
S2UR UR5, SR_CTAID.X &wr=0x1 ?trans8;
LDC R2, c[0x0][0x360] &wr=0x1 ?trans8;
S2UR UR4, SR_CTAID.Y &wr=0x2 ?trans1;
IMAD R11, R2, UR5, R11 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R11, UR7, PT &req={3} ?trans1;
IMAD R0, R3, UR4, R0 &req={2} ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R0, UR6, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD R0, R0, UR7, RZ ?WAIT6_END_GROUP;
LDC.64 R6, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD.WIDE R2, R0, 0x4, R4 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R11, 0x4, R4 ?trans2;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x3 ?trans4;
LDG.E R5, desc[UR4][R4.64] &wr=0x3 ?trans2;
IMAD R9, R2, 0x18, R5 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE R6, R9, 0x4, R6 &req={2} ?trans2;
LDC.64 R8, c[0x0][0x380] &wr=0x0 ?trans4;
LDG.E R7, desc[UR4][R6.64] &wr=0x2 ?trans1;
IADD3 R11, PT, PT, R11, R0, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R8, R11, 0x4, R8 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R8.64], R7 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x1d0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: kernel_init_reference(int*, int*, int*, int, int)
_Z21kernel_init_referencePiS_S_ii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x2c
s_load_b64 s[2:3], s[0:1], 0x18
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v4, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s5, s4, 16
s_and_b32 s4, s4, 0xffff
v_mad_u64_u32 v[2:3], null, s15, s5, v[1:2]
v_mad_u64_u32 v[0:1], null, s14, s4, v[4:5]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_gt_i32_e32 vcc_lo, s2, v2
v_cmp_gt_i32_e64 s2, s3, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, vcc_lo, s2
s_and_saveexec_b32 s4, s2
s_cbranch_execz .LBB0_2
s_load_b64 s[4:5], s[0:1], 0x10
v_mul_lo_u32 v2, v2, s3
v_ashrrev_i32_e32 v1, 31, v0
s_load_b128 s[0:3], s[0:1], 0x0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[5:6], 2, v[0:1]
v_ashrrev_i32_e32 v3, 31, v2
v_add_nc_u32_e32 v0, v2, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 2, v[2:3]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v3, vcc_lo, s4, v3
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
v_add_co_u32 v5, vcc_lo, s4, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
s_clause 0x1
global_load_b32 v7, v[3:4], off
global_load_b32 v1, v[5:6], off
s_waitcnt vmcnt(0)
v_mad_u64_u32 v[3:4], null, v7, 24, v[1:2]
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 2, v[3:4]
v_add_co_u32 v3, vcc_lo, s2, v3
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b32 v3, v[3:4], off
s_waitcnt vmcnt(0)
global_store_b32 v[0:1], v3, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| kernel_init_reference | 792 | 1,105 | stackv2-00000-of-00015 |
// Demangled: kernel_top_left_processing(int*, int*, int, int, int)
Function : _Z26kernel_top_left_processingPiS_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R12, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x2 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x3 ?trans7;
LDC R5, c[0x0][0x360] &wr=0x2 ?trans8;
LDC.64 R14, c[0x0][0x390] &wr=0x4 ?trans8;
LDC.64 R6, c[0x0][0x388] &wr=0x5 ?trans1;
ISETP.NE.AND P0, PT, R12, RZ, PT &req={1} ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
IMAD R0, R5, UR4, R12 &req={2} ?WAIT4_END_GROUP;
IMAD R4, R0, R14, R14 &req={4} ?WAIT5_END_GROUP;
IADD3 R9, PT, PT, R4, R15, -R0 ?trans2;
LOP3.LUT R4, RZ, R14, RZ, 0x33, !PT ?trans2;
IADD3 R5, PT, PT, R9, 0x1, RZ ?WAIT4_END_GROUP;
IADD3 R11, PT, PT, R5.reuse, R4, RZ ?trans1;
IMAD.WIDE R6, R5, 0x4, R6 &req={5} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R11, 0x4, R2.reuse &req={1} ?trans2;
LDG.E R7, desc[UR8][R6.64] &req={3} &rd=0x1 &wr=0x2 ?trans2;
IMAD.WIDE R2, R9, 0x4, R2 ?trans2;
LDG.E R8, desc[UR8][R4.64] &wr=0x2 ?trans4;
LDG.E R9, desc[UR8][R2.64] &wr=0x3 ?trans4;
@!P0 LDG.E R10, desc[UR8][R4.64+0x4] &wr=0x4 ?trans1;
S2UR UR6, SR_CgaCtaId &wr=0x5 ?trans1;
UMOV UR4, 0x400 ?trans1;
ISETP.GT.AND P1, PT, R0, R15, PT ?trans1;
UIADD3 UR5, UPT, UPT, UR4, 0x1000, URZ ?trans1;
ULEA UR4, UR6, UR4, 0x18 &req={5} ?WAIT3_END_GROUP;
ULEA UR5, UR6, UR5, 0x18 ?WAIT3_END_GROUP;
LEA R0, R12, UR4, 0x2 ?WAIT3_END_GROUP;
LEA R6, R12, UR5, 0x2 &req={1} ?trans2;
IADD3 R7, PT, PT, R8, R7, RZ &req={2} ?WAIT5_END_GROUP;
STS [R0], R7 &rd=0x1 ?trans4;
STS [R6+0x4], R9 &req={3} &rd=0x1 ?trans4;
@!P0 STS [UR4+0x1000], R10 &req={4} &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P1 EXIT &req={0} ?trans5;
LDS R4, [R6+0x4] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x398] &wr=0x0 ?trans3;
LDS R7, [R6] &req={1} &wr=0x1 ?trans4;
LDS R0, [R0] &wr=0x2 ?trans1;
IADD3 R5, PT, PT, R4, -UR4, RZ &req={0} ?trans2;
IADD3 R7, PT, PT, R7, -UR4, RZ &req={1} ?WAIT3_END_GROUP;
VIMNMX.S32 R4, R0, R5, !PT &req={2} ?WAIT5_END_GROUP;
VIMNMX.S32 R7, R7, R4, !PT ?WAIT5_END_GROUP;
STG.E desc[UR8][R2.64+0x4], R7 ?trans1;
EXIT ?trans5;
BRA 0x2e0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: kernel_top_left_processing(int*, int*, int, int, int)
_Z26kernel_top_left_processingPiS_iii:
s_clause 0x1
s_load_b32 s8, s[0:1], 0x2c
s_load_b256 s[0:7], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s7, s8, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s7, v[0:1]
s_ashr_i32 s7, s4, 31
v_mad_u64_u32 v[2:3], null, s4, v1, s[4:5]
v_sub_nc_u32_e32 v3, s5, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add3_u32 v4, v3, v2, 1
v_ashrrev_i32_e32 v5, 31, v4
v_sub_co_u32 v2, vcc_lo, v4, s4
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_co_ci_u32_e32 v3, vcc_lo, s7, v5, vcc_lo
v_lshlrev_b64 v[5:6], 2, v[4:5]
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v7, vcc_lo, s2, v5
v_add_co_ci_u32_e32 v8, vcc_lo, s3, v6, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v2, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
s_mov_b32 s2, exec_lo
global_load_b32 v7, v[7:8], off
global_load_b32 v8, v[2:3], off offset:-4
v_add_co_u32 v2, vcc_lo, s0, v5
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v6, vcc_lo
v_lshlrev_b32_e32 v5, 2, v0
global_load_b32 v6, v[2:3], off offset:-4
s_waitcnt vmcnt(1)
v_add_nc_u32_e32 v7, v7, v8
ds_store_b32 v5, v7 offset:4112
s_waitcnt vmcnt(0)
ds_store_b32 v5, v6 offset:4
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB2_2
v_subrev_nc_u32_e32 v6, s4, v4
v_mov_b32_e32 v4, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v7, 31, v6
v_lshlrev_b64 v[6:7], 2, v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v6, vcc_lo, s0, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
global_load_b32 v0, v[6:7], off
s_waitcnt vmcnt(0)
ds_store_b32 v4, v0
.LBB2_2:
s_or_b32 exec_lo, exec_lo, s2
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_mov_b32 s0, exec_lo
v_cmpx_ge_i32_e64 s5, v1
s_cbranch_execz .LBB2_4
ds_load_2addr_b32 v[0:1], v5 offset1:1
v_add_nc_u32_e32 v4, 0x1010, v5
ds_load_b32 v4, v4
s_waitcnt lgkmcnt(1)
v_subrev_nc_u32_e32 v1, s6, v1
v_subrev_nc_u32_e32 v0, s6, v0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_max3_i32 v0, v4, v1, v0
global_store_b32 v[2:3], v0, off
.LBB2_4:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| kernel_top_left_processing | 1,229 | 1,290 | stackv2-00000-of-00015 |
// Demangled: add(int*, int*, int*)
Function : _Z3addPiS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R15, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R15, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R0, 0x9fff, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R12, c[0x0][0x390] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R8, c[0x0][0x380] &wr=0x3 ?trans8;
LDC.64 R10, c[0x0][0x388] &wr=0x4 ?trans1;
IMAD R15, R15, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R2, R0, 0x4, R8 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R0.reuse, 0x4, R10 &req={4} ?trans2;
LDG.E R2, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans4;
LDG.E R5, desc[UR6][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE R6, R0, 0x4, R12 &req={1,0} ?trans1;
IADD3 R0, PT, PT, R15, R0, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, 0xa000, PT ?trans1;
IADD3 R17, PT, PT, R2, R5, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R6.64], R17 &rd=0x1 ?trans7;
@!P0 BRA 0xd0 ?trans5;
EXIT ?trans5;
BRA 0x180;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: add(int*, int*, int*)
_Z3addPiS_S_:
s_load_b32 s4, s[0:1], 0x24
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s8, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e32 0xa000, v1
s_cbranch_execz .LBB0_3
s_load_b32 s9, s[2:3], 0x0
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s9, s8
s_mov_b32 s8, 0
.LBB0_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
v_add_co_u32 v6, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
v_cmp_lt_i32_e32 vcc_lo, 0x9fff, v1
global_load_b32 v0, v[4:5], off
global_load_b32 v4, v[6:7], off
v_add_co_u32 v2, s0, s2, v2
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v3, s0, s3, v3, s0
s_or_b32 s8, vcc_lo, s8
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v0, v4, v0
global_store_b32 v[2:3], v0, off
s_and_not1_b32 exec_lo, exec_lo, s8
s_cbranch_execnz .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| add | 682 | 716 | stackv2-00000-of-00015 |
// Demangled: scanTheadInformationGPU(float*, int, int, int)
Function : _Z23scanTheadInformationGPUPfiii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_TID.Y &wr=0x1 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x2 ?trans1;
LDCU.64 UR8, c[0x0][0x388] &wr=0x3 ?trans1;
S2R R3, SR_TID.X &wr=0x2 ?trans1;
LDCU UR7, c[0x0][0x390] &wr=0x4 ?trans1;
S2R R7, SR_TID.Z &wr=0x5 ?trans4;
S2UR UR5, SR_CTAID.Y &wr=0x1 ?trans8;
LDC R4, c[0x0][0x364] &wr=0x1 ?trans8;
S2UR UR4, SR_CTAID.X &wr=0x2 ?trans8;
S2UR UR6, SR_CTAID.Z &wr=0x5 ?trans8;
LDC R2, c[0x0][0x368] &wr=0x5 ?trans1;
IMAD R4, R4, UR5, R5 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R4, UR9, PT &req={3} ?trans1;
IMAD R0, R0, UR4, R3 &req={2} ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R0, UR8, P0 ?trans1;
IMAD R5, R2, UR6, R7 &req={5} ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R5, UR7, P0 &req={4} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
IMAD R5, R5, UR9, R4 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans3;
IMAD R5, R5, UR8, R0 ?WAIT5_END_GROUP;
IADD3 R0, PT, PT, -R5.reuse, RZ, RZ ?trans1;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT3_END_GROUP;
I2FP.F32.S32 R5, R0 ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R5 &req={1} ?trans1;
EXIT ?trans5;
BRA 0x1c0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: scanTheadInformationGPU(float*, int, int, int)
_Z23scanTheadInformationGPUPfiii:
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x8
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
v_bfe_u32 v4, v0, 20, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s7, s2, 16
s_and_b32 s2, s2, 0xffff
s_and_b32 s3, s3, 0xffff
v_mad_u64_u32 v[0:1], null, s13, s2, v[2:3]
v_mad_u64_u32 v[1:2], null, s14, s7, v[3:4]
v_mad_u64_u32 v[2:3], null, s15, s3, v[4:5]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cmp_gt_i32_e32 vcc_lo, s4, v0
v_cmp_gt_i32_e64 s2, s5, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_gt_i32_e64 s3, s6, v2
s_and_b32 s2, vcc_lo, s2
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
s_and_b32 s2, s2, s3
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB0_2
v_mad_u64_u32 v[3:4], null, v2, s5, v[1:2]
s_load_b64 s[0:1], s[0:1], 0x0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, v3, s4, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
v_sub_nc_u32_e32 v3, 0, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_cvt_f32_i32_e32 v2, v3
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| scanTheadInformationGPU | 723 | 847 | stackv2-00000-of-00015 |
// Demangled: gpu_matrix_mult(int*, int*, int*, int, int, int)
Function : _Z15gpu_matrix_multPiS_S_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.Y &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.Y &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x398] &wr=0x2 ?trans1;
S2R R5, SR_TID.X &wr=0x3 ?trans6;
LDC R0, c[0x0][0x364] &wr=0x1 ?trans8;
S2UR UR5, SR_CTAID.X &wr=0x3 ?trans8;
LDC R2, c[0x0][0x360] &wr=0x3 ?trans8;
LDC R6, c[0x0][0x3a0] &wr=0x4 ?trans1;
IMAD R0, R0, UR4, R3 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR6, PT &req={2} ?trans1;
IMAD R3, R2, UR5, R5 &req={3} ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R3, R6, P0 &req={4} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R5, c[0x0][0x39c] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
HFMA2 R28, -RZ, RZ, 0, 0 ?trans1;
ISETP.GE.AND P0, PT, R5, 0x1, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0xa40 &req={1} ?trans5;
ISETP.GE.U32.AND P0, PT, R5.reuse, 0x8, PT ?trans1;
LOP3.LUT R2, R5, 0x7, RZ, 0xc0, !PT ?trans1;
IMAD R10, R0, R5, RZ ?trans1;
MOV R4, RZ ?trans1;
MOV R28, RZ ?trans2;
ISETP.NE.AND P1, PT, R2, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x5b0 ?trans6;
SHF.R.S32.HI R7, RZ, 0x1f, R6 ?trans1;
LDC.64 R8, c[0x0][0x380] &wr=0x0 ?trans1;
LOP3.LUT R32, R5, 0x7ffffff8, RZ, 0xc0, !PT ?trans1;
MOV R4, RZ ?trans2;
IADD.64 R12, R6, R6 ?trans2;
MOV R33, R3 ?trans1;
IADD3 R32, PT, PT, -R32, RZ, RZ ?trans1;
IADD.64 R14, R6, R12 ?WAIT3_END_GROUP;
SHF.L.U64.HI R13, R12, 0x2, R13 ?trans1;
IADD.64 R16, R6, R14 ?trans2;
IMAD.SHL.U32 R12, R12, 0x4, RZ ?trans1;
SHF.L.U64.HI R15, R14, 0x2, R15 ?trans1;
IADD.64 R18, R6, R16 ?trans2;
IMAD.SHL.U32 R14, R14, 0x4, RZ ?trans1;
SHF.L.U64.HI R17, R16, 0x2, R17 ?trans1;
IADD.64 R20, R6, R18 ?trans2;
IMAD.SHL.U32 R16, R16, 0x4, RZ ?trans1;
SHF.L.U64.HI R19, R18, 0x2, R19 ?trans1;
IMAD.WIDE.U32 R8, R10, 0x4, R8 &req={0} ?trans1;
IADD.64 R22, R6, R20 ?WAIT3_END_GROUP;
SHF.L.U64.HI R21, R20, 0x2, R21 ?trans1;
IADD.64 R8, R8, 0x10 ?trans2;
IMAD.SHL.U32 R18, R18, 0x4, RZ ?trans1;
SHF.L.U64.HI R23, R22, 0x2, R23 ?trans1;
IMAD.SHL.U32 R20, R20, 0x4, RZ ?trans2;
IMAD.SHL.U32 R22, R22, 0x4, RZ ?WAIT7_END_GROUP;
LDC.64 R30, c[0x0][0x388] &wr=0x0 ?trans1;
LDG.E R36, desc[UR4][R8.64+-0x10] &wr=0x2 ?trans4;
LDG.E R37, desc[UR4][R8.64+-0x4] &wr=0x3 ?trans1;
IMAD.WIDE R30, R33, 0x4, R30 &req={0} ?WAIT5_END_GROUP;
IADD.64 R24, R30, R14 ?trans2;
IMAD.WIDE R34, R6, 0x4, R30 ?trans1;
LDG.E R29, desc[UR4][R30.64] &wr=0x2 ?trans1;
IADD.64 R26, R30, R12 ?WAIT3_END_GROUP;
LDG.E R24, desc[UR4][R24.64] &wr=0x3 ?trans4;
LDG.E R35, desc[UR4][R34.64] &wr=0x4 ?trans4;
LDG.E R26, desc[UR4][R26.64] &wr=0x5 ?trans4;
LDG.E R25, desc[UR4][R8.64+-0x8] &wr=0x5 ?trans4;
LDG.E R34, desc[UR4][R8.64+-0xc] &wr=0x4 ?trans1;
IMAD R29, R36, R29, R28 &req={2} ?WAIT4_END_GROUP;
IMAD R29, R34, R35, R29 &req={4} ?trans2;
LDG.E R34, desc[UR4][R8.64] &wr=0x2 ?trans2;
IMAD R26, R25, R26, R29 &req={5} ?trans1;
IADD.64 R28, R30, R16 ?trans2;
LDG.E R35, desc[UR4][R8.64+0x4] &wr=0x4 ?trans1;
IMAD R36, R37, R24, R26 &req={3} ?trans1;
IADD.64 R26, R30.reuse, R18 ?trans2;
IADD.64 R24, R30, R20 ?WAIT2_END_GROUP;
LDG.E R29, desc[UR4][R28.64] &wr=0x2 ?trans1;
IADD.64 R30, R30, R22 ?WAIT3_END_GROUP;
LDG.E R26, desc[UR4][R26.64] &wr=0x4 ?trans4;
LDG.E R24, desc[UR4][R24.64] &wr=0x3 ?trans4;
LDG.E R37, desc[UR4][R8.64+0x8] &wr=0x3 ?trans4;
LDG.E R30, desc[UR4][R30.64] &wr=0x5 ?trans4;
LDG.E R25, desc[UR4][R8.64+0xc] &rd=0x0 &wr=0x5 ?trans1;
IADD3 R32, PT, PT, R32, 0x8, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R32, RZ, PT ?trans1;
IADD3 R4, PT, PT, R4, 0x8, RZ ?trans1;
IMAD R33, R6, 0x8, R33 ?trans1;
IADD.64 R8, R8, 0x20 &req={0} ?trans2;
IMAD R34, R34, R29, R36 &req={2} ?WAIT4_END_GROUP;
IMAD R34, R35, R26, R34 &req={4} ?WAIT4_END_GROUP;
IMAD R34, R37, R24, R34 &req={3} ?WAIT4_END_GROUP;
IMAD R28, R25, R30, R34 &req={5} ?trans1;
@P0 BRA 0x340 ?trans6;
@!P1 BRA 0xa40 ?trans5;
ISETP.GE.U32.AND P1, PT, R2, 0x4, PT ?trans1;
LOP3.LUT R24, R5, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R24, RZ, PT ?WAIT7_END_GROUP;
@!P1 BRA 0x830 ?trans6;
LDC.64 R12, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x380] &wr=0x1 ?trans1;
HFMA2 R11, -RZ, RZ, 0, 0 ?trans1;
MOV R8, R4 ?trans1;
HFMA2 R9, -RZ, RZ, 0, 0 ?trans2;
IMAD R15, R4, R6, R3 ?trans1;
SHF.R.S32.HI R17, RZ, 0x1f, R6 ?trans1;
LDC.64 R20, c[0x0][0x380] &wr=0x2 ?trans1;
IADD.64 R22, R10, R8 ?trans2;
MOV R16, R6 ?trans1;
IADD3 R19, PT, PT, R10, R4, RZ ?WAIT2_END_GROUP;
LEA R8, P1, R22, UR6, 0x2 &req={1} ?WAIT4_END_GROUP;
LEA.HI.X R9, R22, UR7, R23, 0x2, P1 ?trans1;
IMAD.WIDE R12, R15, 0x4, R12 &req={0} ?trans1;
IADD.64 R14, R16, R16 ?WAIT3_END_GROUP;
LDG.E R25, desc[UR4][R8.64+0x4] &wr=0x3 ?trans1;
IADD.64 R16, R16, R14 ?trans2;
IMAD.WIDE R22, R6, 0x4, R12 ?trans1;
LEA R18, P1, R14.reuse, R12.reuse, 0x2 ?trans1;
LDG.E R2, desc[UR4][R12.64] &wr=0x4 ?trans2;
IMAD.WIDE.U32 R20, R19, 0x4, R20 &req={2} ?trans1;
LEA.HI.X R19, R14, R13, R15, 0x2, P1 ?trans1;
LDG.E R22, desc[UR4][R22.64] &wr=0x3 ?trans1;
LEA R14, P1, R16, R12, 0x2 ?WAIT3_END_GROUP;
LDG.E R21, desc[UR4][R20.64] &wr=0x4 ?trans1;
LEA.HI.X R15, R16, R13, R17, 0x2, P1 ?WAIT3_END_GROUP;
LDG.E R18, desc[UR4][R18.64] &wr=0x2 ?trans4;
LDG.E R17, desc[UR4][R8.64+0x8] &wr=0x2 ?trans4;
LDG.E R27, desc[UR4][R8.64+0xc] &wr=0x5 ?trans4;
LDG.E R14, desc[UR4][R14.64] &wr=0x5 ?trans1;
IADD3 R4, PT, PT, R4, 0x4, RZ ?trans1;
IMAD R2, R21, R2, R28 &req={4} ?WAIT4_END_GROUP;
IMAD R2, R25, R22, R2 &req={3} ?WAIT4_END_GROUP;
IMAD R2, R17, R18, R2 &req={2} ?WAIT4_END_GROUP;
IMAD R28, R27, R14, R2 &req={5} ?WAIT7_END_GROUP;
@!P0 BRA 0xa40 ?trans5;
ISETP.NE.AND P0, PT, R24, 0x1, PT ?trans1;
LDC.64 R16, c[0x0][0x388] &wr=0x0 ?trans1;
LOP3.LUT R5, R5, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P1, PT, R5, 0x1, PT ?trans2;
LDC.64 R18, c[0x0][0x380] &wr=0x1 ?trans4;
@P0 MOV R11, RZ ?trans1;
@P0 MOV R5, RZ ?trans1;
@P0 IADD3 R23, PT, PT, R10.reuse, R4.reuse, RZ ?trans2;
@P0 LDC.64 R12, c[0x0][0x380] &wr=0x2 ?trans2;
@P0 IADD.64 R20, R10, R4 ?WAIT2_END_GROUP;
@P0 IMAD R5, R4.reuse, R6, R3 ?trans1;
@P0 IADD3 R4, PT, PT, R4, 0x2, RZ ?WAIT3_END_GROUP;
LDC.64 R14, c[0x0][0x380] &wr=0x3 ?trans1;
@P0 IMAD.WIDE R16, R5, 0x4, R16 &req={0} ?WAIT7_END_GROUP;
LDC.64 R8, c[0x0][0x388] &wr=0x0 ?trans1;
@P0 IMAD.WIDE.U32 R18, R23, 0x4, R18 &req={1} ?trans1;
@!P1 IADD3 R11, PT, PT, R10, R4, RZ ?trans1;
@P0 LDG.E R2, desc[UR4][R16.64] &wr=0x4 ?trans4;
@P0 LDG.E R19, desc[UR4][R18.64] &wr=0x4 ?trans1;
@P0 LEA R12, P2, R20, R12, 0x2 &req={2} ?WAIT4_END_GROUP;
@P0 LEA.HI.X R13, R20, R13, R21, 0x2, P2 ?trans1;
@!P1 IMAD R21, R4, R6, R3 ?trans2;
@P0 IMAD.WIDE R4, R6, 0x4, R16 ?WAIT3_END_GROUP;
@P0 LDG.E R13, desc[UR4][R12.64+0x4] &wr=0x2 ?trans1;
@!P1 IMAD.WIDE.U32 R14, R11, 0x4, R14 &req={3} ?WAIT3_END_GROUP;
@P0 LDG.E R4, desc[UR4][R4.64] &wr=0x2 ?trans1;
@!P1 IMAD.WIDE R8, R21, 0x4, R8 &req={0} ?WAIT3_END_GROUP;
@!P1 LDG.E R15, desc[UR4][R14.64] &wr=0x3 ?trans4;
@!P1 LDG.E R8, desc[UR4][R8.64] &wr=0x3 ?trans1;
@P0 IMAD R2, R19, R2, R28 &req={4} ?WAIT4_END_GROUP;
@P0 IMAD R28, R13, R4, R2 &req={2} ?WAIT4_END_GROUP;
@!P1 IMAD R28, R15, R8, R28 &req={3} ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD R3, R0, R6, R3 ?WAIT4_END_GROUP;
IMAD.WIDE R2, R3, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R28 ?trans1;
EXIT ?trans5;
BRA 0xa90;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: gpu_matrix_mult(int*, int*, int*, int, int, int)
_Z15gpu_matrix_multPiS_S_iii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x34
s_load_b128 s[4:7], s[0:1], 0x18
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_gt_i32_e32 vcc_lo, s6, v0
v_cmp_gt_i32_e64 s2, s4, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, s2, vcc_lo
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB0_6
s_clause 0x1
s_load_b128 s[8:11], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_cmp_lt_i32 s5, 1
s_cbranch_scc1 .LBB0_4
v_mul_lo_u32 v2, v1, s5
v_mov_b32_e32 v5, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[3:4], 2, v[2:3]
v_mov_b32_e32 v2, 0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v3, vcc_lo, s8, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo
.LBB0_3:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_ashrrev_i32_e32 v6, 31, v5
s_add_i32 s5, s5, -1
s_cmp_eq_u32 s5, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[5:6]
v_add_co_u32 v6, vcc_lo, s10, v6
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, s11, v7, vcc_lo
global_load_b32 v8, v[3:4], off
global_load_b32 v9, v[6:7], off
s_waitcnt vmcnt(0)
v_mad_u64_u32 v[6:7], null, v9, v8, v[2:3]
v_add_co_u32 v3, vcc_lo, v3, 4
v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_dual_mov_b32 v2, v6 :: v_dual_add_nc_u32 v5, s6, v5
s_cbranch_scc0 .LBB0_3
s_branch .LBB0_5
.LBB0_4:
v_mov_b32_e32 v2, 0
.LBB0_5:
v_mad_u64_u32 v[3:4], null, v1, s6, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v4, 31, v3
v_lshlrev_b64 v[0:1], 2, v[3:4]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| gpu_matrix_mult | 4,458 | 1,315 | stackv2-00000-of-00015 |
// Demangled: gpu_matrix_transpose(int*, int*, unsigned int, unsigned int)
Function : _Z20gpu_matrix_transposePiS_jj
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_TID.Y &wr=0x1 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x390] &wr=0x3 ?trans1;
S2R R3, SR_TID.X &wr=0x2 ?trans6;
S2UR UR5, SR_CTAID.Y &wr=0x1 ?trans8;
LDC R7, c[0x0][0x364] &wr=0x1 ?trans8;
S2UR UR4, SR_CTAID.X &wr=0x2 ?trans1;
IMAD R7, R7, UR5, R2 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R7, UR6, PT &req={3} ?trans1;
IMAD R0, R0, UR4, R3 &req={2} ?WAIT5_END_GROUP;
ISETP.GE.U32.OR P0, PT, R0, UR7, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD R5, R7, UR7, R0 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R5, 0x4, R2 &req={0} ?trans2;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans4;
LDG.E R3, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
IMAD R7, R0, UR6, R7 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R7, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R3 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x170;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: gpu_matrix_transpose(int*, int*, unsigned int, unsigned int)
_Z20gpu_matrix_transposePiS_jj:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b64 s[4:5], s[0:1], 0x10
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_gt_u32_e32 vcc_lo, s5, v0
v_cmp_gt_u32_e64 s2, s4, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, vcc_lo, s2
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB2_2
s_load_b128 s[0:3], s[0:1], 0x0
v_mad_u64_u32 v[2:3], null, v1, s5, v[0:1]
v_mov_b32_e32 v3, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[4:5], 2, v[2:3]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, vcc_lo, s0, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
global_load_b32 v2, v[4:5], off
s_waitcnt vmcnt(0)
v_mad_u64_u32 v[4:5], null, v0, s4, v[1:2]
v_mov_b32_e32 v5, v3
v_lshlrev_b64 v[0:1], 2, v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB2_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| gpu_matrix_transpose | 627 | 801 | stackv2-00000-of-00015 |
// Demangled: gpu_square_matrix_mult(int*, int*, int*, int)
Function : _Z22gpu_square_matrix_multPiS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R2, c[0x0][0x370] &wr=0x1 ?trans1;
S2R R23, SR_CTAID.Y &wr=0x2 ?trans1;
LDCU UR7, c[0x0][0x398] &wr=0x3 ?trans1;
HFMA2 R31, -RZ, RZ, 0, 0 ?trans1;
S2R R0, SR_TID.Y &wr=0x2 ?trans1;
UMOV UR4, 0x400 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x4 ?trans2;
S2UR UR6, SR_CgaCtaId &wr=0x5 ?trans1;
S2R R10, SR_TID.X &wr=0x0 ?trans1;
UIADD3 UR5, UPT, UPT, UR4, 0x400, URZ ?trans1;
S2R R8, SR_CTAID.X &wr=0x0 ?trans1;
MOV R27, UR7 &req={3} ?trans1;
ISETP.NE.AND P0, PT, R2, 0x1, PT &req={1} ?WAIT4_END_GROUP;
IMAD R20, R27, R27, RZ ?trans1;
ULEA UR4, UR6, UR4, 0x18 &req={5} ?trans1;
ULEA UR5, UR6, UR5, 0x18 ?trans1;
LEA R23, R23, R0, 0x4 &req={2} ?WAIT4_END_GROUP;
LEA R19, R0, UR4, 0x6 ?trans1;
UMOV UR4, URZ ?trans1;
LEA R17, R10.reuse, UR5, 0x2 &req={0} ?trans1;
IMAD R21, R23, R27, R10 ?trans1;
LEA R18, R10, R19, 0x2 ?trans2;
LEA R22, R8, R10, 0x4 ?trans2;
LEA R16, R0, R17, 0x6 ?trans1;
@!P0 BRA 0x910 &req={4} ?trans6;
LDC R4, c[0x0][0x398] &wr=0x0 ?trans1;
IADD3 R6, PT, PT, R0.reuse, 0x10, RZ ?trans1;
IMAD R3, R0, R27.reuse, R10.reuse ?trans1;
LOP3.LUT R5, R2, 0xfffffffe, RZ, 0xc0, !PT ?trans1;
UMOV UR4, 0x10 ?trans1;
MOV R31, RZ ?trans1;
IMAD R7, R6, R27, R10 ?trans1;
LEA R6, R8, R3, 0x4 ?trans1;
LDC.64 R24, c[0x0][0x380] &wr=0x1 ?trans1;
MOV R3, R21 ?trans1;
IADD3 R5, PT, PT, -R5, RZ, RZ ?WAIT2_END_GROUP;
LEA R7, R8, R7, 0x4 ?WAIT7_END_GROUP;
ISETP.GE.AND P1, PT, R6, R20.reuse, PT ?trans1;
ISETP.GE.AND P0, PT, R3.reuse, R20, PT ?trans1;
MOV R35, RZ ?trans1;
HFMA2 R37, -RZ, RZ, 0, 0 ?trans2;
IMAD.WIDE R26, R3, 0x4, R24 &req={1} ?WAIT8_END_GROUP;
@!P1 LDC.64 R8, c[0x0][0x388] &wr=0x1 ?trans1;
@!P0 LDG.E R35, desc[UR8][R26.64] &wr=0x2 ?trans1;
@!P1 IMAD.WIDE R28, R6, 0x4, R8 &req={1} ?WAIT5_END_GROUP;
@!P1 LDG.E R37, desc[UR8][R28.64] &wr=0x3 ?trans1;
ISETP.GE.AND P1, PT, R7, R20, PT ?WAIT3_END_GROUP;
STS [R18], R35 &req={2} ?trans4;
STS [R16], R37 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R32, [R17] ?trans4;
LDS.128 R12, [R19] &wr=0x1 ?trans4;
LDS R34, [R17+0x40] &wr=0x2 ?trans4;
LDS R36, [R17+0x80] &wr=0x3 ?trans4;
LDS R30, [R17+0xc0] &wr=0x4 ?trans4;
LDS R33, [R17+0x100] ?trans4;
LDS.128 R8, [R19+0x10] &wr=0x5 ?trans4;
LDS R28, [R17+0x140] &wr=0x0 ?trans4;
LDS R29, [R17+0x180] &wr=0x0 ?trans4;
LDS R35, [R17+0x280] ?trans1;
IMAD R12, R12, R32, R31 &req={1} ?WAIT3_END_GROUP;
LDS R32, [R17+0x1c0] &wr=0x1 ?trans1;
IMAD R13, R34, R13, R12 &req={2} ?WAIT3_END_GROUP;
LDS R31, [R17+0x200] ?trans1;
IMAD R13, R36, R14, R13 &req={3} ?WAIT4_END_GROUP;
IMAD R34, R30, R15, R13 &req={4} ?trans2;
LDS.128 R12, [R19+0x20] &wr=0x2 ?trans4;
LDS R30, [R17+0x240] &wr=0x3 ?trans1;
IMAD R8, R8, R33, R34 &req={5} ?WAIT3_END_GROUP;
LDS R34, [R17+0x2c0] &wr=0x4 ?trans1;
IMAD R8, R28, R9, R8 &req={0} ?WAIT3_END_GROUP;
LDS R33, [R17+0x380] ?trans1;
IMAD R8, R29, R10, R8 ?trans1;
IADD3 R9, PT, PT, R3, 0x10, RZ ?WAIT3_END_GROUP;
IMAD R8, R32, R11, R8 &req={1} ?trans2;
ISETP.GE.AND P0, PT, R9, R20, PT ?trans1;
LDS R32, [R17+0x3c0] ?trans1;
IMAD R8, R12, R31, R8 &req={2} ?WAIT3_END_GROUP;
LDS R31, [R17+0x300] ?trans1;
IMAD R36, R30, R13, R8 &req={3} ?trans2;
@!P1 LDC.64 R12, c[0x0][0x388] &wr=0x0 ?trans1;
LDS R30, [R17+0x340] ?trans4;
LDS.128 R8, [R19+0x30] &wr=0x1 ?trans1;
HFMA2 R37, -RZ, RZ, 0, 0 ?trans2;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
@!P1 IMAD.WIDE R28, R7, 0x4, R12 &req={0} ?trans1;
MOV R13, RZ ?WAIT4_END_GROUP;
@!P0 LDG.E R37, desc[UR8][R26.64+0x40] &wr=0x2 ?trans4;
@!P1 LDG.E R13, desc[UR8][R28.64] &wr=0x3 ?trans1;
IMAD R14, R35, R14, R36 ?WAIT4_END_GROUP;
IMAD R34, R34, R15, R14 &req={4} ?WAIT4_END_GROUP;
IMAD R8, R8, R31, R34 &req={1} ?WAIT4_END_GROUP;
IMAD R8, R30, R9, R8 ?WAIT4_END_GROUP;
IMAD R8, R33, R10, R8 ?WAIT4_END_GROUP;
IMAD R32, R32, R11, R8 ?trans1;
IADD3 R5, PT, PT, R5, 0x2, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R5, RZ, PT ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x20, URZ ?trans1;
IADD3 R3, PT, PT, R3, 0x20, RZ ?trans1;
STS [R18], R37 &req={2} ?trans4;
STS [R16], R13 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R35, [R17] ?trans4;
LDS.128 R12, [R19] &wr=0x0 ?trans4;
LDS R26, [R17+0x40] &wr=0x1 ?trans4;
LDS R31, [R17+0x80] &wr=0x2 ?trans4;
LDS R34, [R17+0xc0] &wr=0x3 ?trans4;
LDS R29, [R17+0x100] ?trans4;
LDS.128 R8, [R19+0x10] &wr=0x4 ?trans4;
LDS R28, [R17+0x140] &wr=0x5 ?trans4;
LDS R27, [R17+0x180] &wr=0x5 ?trans4;
LDS R30, [R17+0x1c0] &wr=0x5 ?trans4;
LDS R33, [R17+0x300] ?trans1;
IMAD R12, R12, R35, R32 &req={0} ?WAIT3_END_GROUP;
LDS R32, [R17+0x340] ?trans1;
IMAD R12, R26, R13, R12 &req={1} ?WAIT3_END_GROUP;
LDS R26, [R17+0x240] ?trans1;
IMAD R12, R31, R14, R12 &req={2} ?WAIT3_END_GROUP;
LDS R31, [R17+0x200] ?trans1;
IMAD R34, R34, R15, R12 &req={3} ?WAIT3_END_GROUP;
LDS.128 R12, [R19+0x20] &wr=0x0 ?trans1;
IMAD R8, R8, R29, R34 &req={4} ?WAIT3_END_GROUP;
LDS R29, [R17+0x280] &wr=0x1 ?trans1;
IMAD R8, R28, R9, R8 &req={5} ?WAIT3_END_GROUP;
LDS R28, [R17+0x2c0] &wr=0x2 ?trans1;
IMAD R8, R27, R10, R8 ?WAIT3_END_GROUP;
LDS R27, [R17+0x380] ?trans1;
IMAD R34, R30, R11, R8 ?WAIT3_END_GROUP;
LDS.128 R8, [R19+0x30] &wr=0x3 ?trans4;
LDS R30, [R17+0x3c0] &wr=0x4 ?trans1;
IMAD R12, R12, R31, R34 &req={0} ?WAIT4_END_GROUP;
IMAD R12, R26, R13, R12 ?WAIT4_END_GROUP;
IMAD R12, R29, R14, R12 &req={1} ?WAIT4_END_GROUP;
IMAD R12, R28, R15, R12 &req={2} ?WAIT4_END_GROUP;
IMAD R8, R8, R33, R12 &req={3} ?WAIT4_END_GROUP;
IMAD R8, R32, R9, R8 ?WAIT4_END_GROUP;
IMAD R8, R27, R10, R8 ?trans1;
MOV R27, R4 ?WAIT3_END_GROUP;
IMAD R31, R30, R11, R8 &req={4} ?trans2;
LEA R6, R27.reuse, R6, 0x5 ?trans2;
LEA R7, R27, R7, 0x5 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 BRA 0x260 ?trans5;
UIADD3 UR4, UPT, UPT, UR4, -0x10, URZ ?WAIT12_END_GROUP;
LOP3.LUT R2, R2, 0x1, RZ, 0xc0, !PT ?trans1;
VIMNMX.S32 R4, R23, R22, !PT ?WAIT4_END_GROUP;
ISETP.NE.U32.AND P1, PT, R2, 0x1, PT ?trans1;
ISETP.GE.AND P0, PT, R4, R27, PT ?WAIT12_END_GROUP;
@P1 BRA 0xcb0 ?trans5;
IADD3 R0, PT, PT, R0, UR4, RZ ?trans2;
IADD3 R21, PT, PT, R21, UR4, RZ ?trans1;
HFMA2 R15, -RZ, RZ, 0, 0 ?trans1;
MOV R25, RZ ?trans1;
IMAD R3, R0, R27, R22 ?trans2;
ISETP.GE.AND P1, PT, R21, R20, PT ?WAIT3_END_GROUP;
ISETP.GE.AND P2, PT, R3, R20, PT ?WAIT10_END_GROUP;
@!P1 LDC.64 R8, c[0x0][0x380] &wr=0x0 ?trans8;
@!P2 LDC.64 R12, c[0x0][0x388] &wr=0x1 ?trans1;
@!P1 IMAD.WIDE R8, R21, 0x4, R8 &req={0} ?WAIT5_END_GROUP;
@!P1 LDG.E R15, desc[UR8][R8.64] &wr=0x2 ?trans1;
@!P2 IMAD.WIDE R12, R3, 0x4, R12 &req={1} ?WAIT5_END_GROUP;
@!P2 LDG.E R25, desc[UR8][R12.64] &wr=0x3 ?trans4;
STS [R18], R15 &req={2} ?trans4;
STS [R16], R25 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R24, [R17] ?trans4;
LDS.128 R4, [R19] &wr=0x0 ?trans4;
LDS R26, [R17+0x40] &wr=0x1 ?trans4;
LDS R28, [R17+0x80] &wr=0x2 ?trans4;
LDS R20, [R17+0xc0] &wr=0x3 ?trans4;
LDS R3, [R17+0x100] ?trans4;
LDS.128 R8, [R19+0x10] &wr=0x4 ?trans4;
LDS R0, [R17+0x140] &wr=0x5 ?trans4;
LDS R21, [R17+0x180] &wr=0x5 ?trans4;
LDS R2, [R17+0x1c0] &wr=0x5 ?trans4;
LDS R25, [R17+0x200] ?trans4;
LDS.128 R12, [R19+0x20] &wr=0x5 ?trans1;
IMAD R4, R4, R24, R31 &req={0} ?WAIT3_END_GROUP;
LDS R16, [R17+0x240] &wr=0x0 ?trans1;
IMAD R5, R26, R5, R4 &req={1} ?WAIT3_END_GROUP;
LDS R33, [R17+0x280] &wr=0x1 ?trans1;
IMAD R6, R28, R6, R5 &req={2} ?WAIT3_END_GROUP;
LDS R4, [R17+0x2c0] &wr=0x2 ?trans1;
IMAD R7, R20, R7, R6 &req={3} ?WAIT3_END_GROUP;
LDS R5, [R17+0x300] ?trans4;
LDS.128 R28, [R19+0x30] &wr=0x3 ?trans1;
IMAD R3, R8, R3, R7 &req={4} ?WAIT3_END_GROUP;
LDS R6, [R17+0x340] &wr=0x4 ?trans1;
IMAD R0, R0, R9, R3 &req={5} ?WAIT3_END_GROUP;
LDS R7, [R17+0x380] &wr=0x5 ?trans4;
LDS R3, [R17+0x3c0] &wr=0x5 ?trans1;
IMAD R0, R21, R10, R0 ?WAIT4_END_GROUP;
IMAD R0, R2, R11, R0 ?WAIT4_END_GROUP;
IMAD R0, R12, R25, R0 ?WAIT4_END_GROUP;
IMAD R0, R16, R13, R0 &req={0} ?WAIT4_END_GROUP;
IMAD R0, R33, R14, R0 &req={1} ?WAIT4_END_GROUP;
IMAD R0, R4, R15, R0 &req={2} ?WAIT4_END_GROUP;
IMAD R0, R28, R5, R0 &req={3} ?WAIT4_END_GROUP;
IMAD R29, R6, R29, R0 &req={4} ?WAIT4_END_GROUP;
IMAD R30, R7, R30, R29 &req={5} ?WAIT4_END_GROUP;
IMAD R31, R3, R31, R30 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 EXIT ?trans5;
LDC.64 R2, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD R23, R23, R27, R22 ?WAIT4_END_GROUP;
IMAD.WIDE R2, R23, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR8][R2.64], R31 ?trans1;
EXIT ?trans5;
BRA 0xd10;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: gpu_square_matrix_mult(int*, int*, int*, int)
_Z22gpu_square_matrix_multPiS_S_i:
s_clause 0x3
s_load_b32 s3, s[0:1], 0x20
s_load_b32 s2, s[0:1], 0x18
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
v_bfe_u32 v6, v0, 10, 10
v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v4, 0x3ff, v0
s_mov_b32 s8, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshl_add_u32 v5, s15, 4, v6
v_lshl_add_u32 v0, s14, 4, v4
s_waitcnt lgkmcnt(0)
s_cmp_eq_u32 s3, 0
s_cbranch_scc1 .LBB1_9
v_lshlrev_b32_e32 v1, 2, v4
v_lshlrev_b32_e32 v7, 6, v6
v_mad_u64_u32 v[2:3], null, v5, s2, v[4:5]
s_mul_i32 s9, s2, s2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v8, 0x400, v1
v_add_nc_u32_e32 v9, v7, v1
s_delay_alu instid0(VALU_DEP_2)
v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v10, v8, v7
.LBB1_2:
s_lshl_b32 s10, s8, 4
v_mov_b32_e32 v11, 0
v_add_nc_u32_e32 v3, s10, v2
s_mov_b32 s11, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s9, v3
s_cbranch_execz .LBB1_4
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 2, v[3:4]
v_add_co_u32 v3, vcc_lo, s4, v3
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
global_load_b32 v11, v[3:4], off
.LBB1_4:
s_or_b32 exec_lo, exec_lo, s11
v_add_nc_u32_e32 v12, s10, v6
s_mov_b32 s10, exec_lo
s_waitcnt vmcnt(0)
ds_store_b32 v9, v11
v_mad_u64_u32 v[3:4], null, v12, s2, v[0:1]
v_mov_b32_e32 v4, 0
s_delay_alu instid0(VALU_DEP_2)
v_cmpx_gt_i32_e64 s9, v3
s_cbranch_execz .LBB1_6
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 2, v[3:4]
v_add_co_u32 v3, vcc_lo, s6, v3
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
global_load_b32 v4, v[3:4], off
.LBB1_6:
s_or_b32 exec_lo, exec_lo, s10
v_mov_b32_e32 v3, v8
s_mov_b32 s10, 0
s_waitcnt vmcnt(0)
ds_store_b32 v10, v4
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB1_7:
v_add_nc_u32_e32 v4, s10, v7
s_add_i32 s10, s10, 4
ds_load_b32 v13, v3
ds_load_b32 v4, v4
v_add_nc_u32_e32 v3, 64, v3
s_cmp_eq_u32 s10, 64
s_waitcnt lgkmcnt(0)
v_mad_u64_u32 v[11:12], null, v13, v4, v[1:2]
s_delay_alu instid0(VALU_DEP_1)
v_mov_b32_e32 v1, v11
s_cbranch_scc0 .LBB1_7
s_add_i32 s8, s8, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s8, s3
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB1_2
.LBB1_9:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_max_i32_e32 v2, v5, v0
s_mov_b32 s3, exec_lo
v_cmpx_gt_i32_e64 s2, v2
s_cbranch_execz .LBB1_11
v_mad_u64_u32 v[2:3], null, v5, s2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
global_store_b32 v[2:3], v1, off
.LBB1_11:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| gpu_square_matrix_mult | 5,068 | 1,720 | stackv2-00000-of-00015 |
// Demangled: reduce(int*, int*)
Function : _Z6reducePiS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans7;
LDC R5, c[0x0][0x360] &wr=0x1 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD R5, R5, UR4, R0 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R5, 0x4, R2 &req={3} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR6][R2.64] &req={2} &rd=0x1 &wr=0x2 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x3 ?trans1;
UMOV UR4, 0x400 ?trans1;
ISETP.GT.U32.AND P0, PT, R0.reuse, 0x1ff, PT ?trans1;
ISETP.GT.U32.AND P1, PT, R0, 0xff, PT ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={3} ?WAIT6_END_GROUP;
LEA R5, R0, UR4, 0x2 ?WAIT5_END_GROUP;
@!P0 IMAD R4, R0.reuse, 0x4, R5.reuse ?trans2;
@!P1 IMAD R3, R0, 0xc, R5 &req={1} ?trans1;
STS [R5], R2 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P0 LDS R6, [R4+0x4] ?trans4;
@!P0 LDS R7, [R4] &wr=0x1 ?trans2;
@!P0 IADD3 R7, PT, PT, R6, R7, RZ &req={1} ?WAIT5_END_GROUP;
@!P0 STS [R4], R7 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R0, 0x7f, PT ?WAIT13_END_GROUP;
@!P0 IMAD R2, R0, 0x1c, R5 ?trans1;
@!P1 LDS R6, [R3+0x8] ?trans4;
@!P1 LDS R9, [R3] &wr=0x1 ?trans2;
@!P1 IADD3 R6, PT, PT, R6, R9, RZ &req={1} ?WAIT5_END_GROUP;
@!P1 STS [R3], R6 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P1, PT, R0, 0x3f, PT ?WAIT13_END_GROUP;
@!P1 IMAD R4, R0, 0x3c, R5 ?trans1;
@!P0 LDS R8, [R2+0x10] ?trans4;
@!P0 LDS R9, [R2] &wr=0x1 ?trans2;
@!P0 IADD3 R9, PT, PT, R8, R9, RZ &req={1} ?WAIT5_END_GROUP;
@!P0 STS [R2], R9 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R0, 0x1f, PT ?WAIT13_END_GROUP;
@!P0 IMAD R3, R0, 0x7c, R5 ?trans1;
@!P1 LDS R7, [R4+0x20] ?trans4;
@!P1 LDS R8, [R4] &wr=0x1 ?trans2;
@!P1 IADD3 R7, PT, PT, R7, R8, RZ &req={1} ?WAIT5_END_GROUP;
@!P1 STS [R4], R7 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P1, PT, R0, 0xf, PT ?WAIT13_END_GROUP;
@!P1 IMAD R2, R0, 0xfc, R5 ?trans1;
@!P0 LDS R6, [R3+0x40] ?trans4;
@!P0 LDS R11, [R3] &wr=0x1 ?trans2;
@!P0 IADD3 R6, PT, PT, R6, R11, RZ &req={1} ?WAIT5_END_GROUP;
@!P0 STS [R3], R6 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R0, 0x7, PT ?WAIT13_END_GROUP;
@!P0 IMAD R4, R0, 0x1fc, R5 ?trans1;
@!P1 LDS R8, [R2+0x80] ?trans4;
@!P1 LDS R9, [R2] &wr=0x1 ?trans2;
@!P1 IADD3 R9, PT, PT, R8, R9, RZ &req={1} ?WAIT5_END_GROUP;
@!P1 STS [R2], R9 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P1, PT, R0, 0x3, PT ?WAIT13_END_GROUP;
@!P1 IMAD R3, R0, 0x3fc, R5 ?trans1;
@!P0 LDS R7, [R4+0x100] ?trans4;
@!P0 LDS R8, [R4] &wr=0x1 ?trans2;
@!P0 IADD3 R7, PT, PT, R7, R8, RZ &req={1} ?WAIT5_END_GROUP;
@!P0 STS [R4], R7 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R0, 0x1, PT ?WAIT13_END_GROUP;
@!P0 IMAD R5, R0, 0x7fc, R5 ?trans1;
@!P1 LDS R6, [R3+0x200] ?trans4;
@!P1 LDS R11, [R3] &wr=0x1 ?trans2;
@!P1 IADD3 R6, PT, PT, R6, R11, RZ &req={1} ?WAIT5_END_GROUP;
@!P1 STS [R3], R6 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.NE.AND P1, PT, R0, RZ, PT ?WAIT5_END_GROUP;
@!P0 LDS R2, [R5+0x400] ?trans4;
@!P0 LDS R9, [R5] &wr=0x1 ?trans2;
@!P0 IADD3 R2, PT, PT, R2, R9, RZ &req={1} ?WAIT5_END_GROUP;
@!P0 STS [R5], R2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P1 LDS R0, [UR4+0x800] ?trans4;
@!P1 LDS R7, [UR4] &wr=0x1 ?trans2;
@!P1 IADD3 R0, PT, PT, R0, R7, RZ &req={1} ?WAIT5_END_GROUP;
@!P1 STS [UR4], R0 &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P1 EXIT &req={0} ?trans5;
LDS R5, [UR4] &wr=0x0 ?trans1;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans3;
REDG.E.ADD.STRONG.GPU desc[UR6][R2.64], R5 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x590;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: reduce(int*, int*)
_Z6reducePiS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x1c
s_load_b128 s[0:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[1:2]
v_add_co_u32 v1, vcc_lo, s0, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
s_mov_b32 s0, 1
global_load_b32 v1, v[1:2], off
v_lshlrev_b32_e32 v2, 2, v0
s_waitcnt vmcnt(0)
ds_store_b32 v2, v1
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB0_1:
s_lshl_b32 s1, s0, 1
s_mov_b32 s4, exec_lo
v_mul_lo_u32 v1, s1, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v2, s0, v1
v_cmpx_gt_u32_e32 0x400, v2
s_cbranch_execz .LBB0_3
v_lshlrev_b32_e32 v1, 2, v1
s_delay_alu instid0(VALU_DEP_1)
v_lshl_add_u32 v2, s0, 2, v1
ds_load_b32 v2, v2
ds_load_b32 v3, v1
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
ds_store_b32 v1, v2
.LBB0_3:
s_or_b32 exec_lo, exec_lo, s4
s_cmpk_gt_u32 s0, 0x1ff
s_mov_b32 s0, s1
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB0_1
s_mov_b32 s0, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB0_7
s_mov_b32 s0, exec_lo
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mbcnt_lo_u32_b32 v0, s0, 0
v_cmp_eq_u32_e32 vcc_lo, 0, v0
s_and_b32 s1, exec_lo, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 exec_lo, s1
s_cbranch_execz .LBB0_7
v_mov_b32_e32 v0, 0
s_bcnt1_i32_b32 s0, s0
ds_load_b32 v1, v0
s_waitcnt lgkmcnt(0)
v_mul_lo_u32 v1, v1, s0
global_atomic_add_u32 v0, v1, s[2:3]
.LBB0_7:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| reduce | 2,123 | 979 | stackv2-00000-of-00015 |
// Demangled: colourCountFunc(int*, int, int*)
Function : _Z15colourCountFuncPiiS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD R5, R5, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans1;
LDG.E R3, desc[UR4][R2.64] &req={1} &wr=0x0 ?trans1;
HFMA2 R7, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans2;
IMAD.WIDE R4, R3, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64+-0x4], R7 ?trans1;
EXIT ?trans5;
BRA 0x110;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: colourCountFunc(int*, int, int*)
_Z15colourCountFuncPiiS_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_load_b64 s[2:3], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_mov_b32_e32 v2, 1
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s2, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_load_b32 v0, v[0:1], off
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v2, off offset:-4
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| colourCountFunc | 515 | 609 | stackv2-00000-of-00015 |
// Demangled: colourMinMax(int*, int*, int*, int, int, int*, int)
Function : _Z12colourMinMaxPiS_S_iiS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x398] &wr=0x2 ?trans1;
IMAD R0, R0, UR4, R3 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x3a0] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE R2, R0, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R4, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R4, RZ, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDCU.64 UR6, c[0x0][0x380] &wr=0x0 ?trans1;
SHF.R.S32.HI R5, RZ, 0x1f, R0 ?trans1;
IMAD.SHL.U32 R4, R0, 0x4, RZ ?WAIT3_END_GROUP;
SHF.L.U64.HI R5, R0, 0x2, R5 ?WAIT5_END_GROUP;
IADD.64 R6, R4, UR6 &req={0} ?trans2;
LDCU.64 UR6, c[0x0][0x390] &wr=0x0 ?trans4;
LDG.E R15, desc[UR4][R6.64] &wr=0x2 ?trans4;
LDG.E R12, desc[UR4][R6.64+0x4] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x5e0 ?trans1;
PLOP3.LUT P1, PT, PT, PT, PT, 0x8, 0x80 ?WAIT2_END_GROUP;
PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x80 ?trans1;
IADD.64 R10, R4, UR6 &req={0} ?trans2;
ISETP.GE.AND P2, PT, R15, R12, PT &req={2} ?WAIT13_END_GROUP;
@P2 BRA 0x5d0 ?trans5;
LDG.E R13, desc[UR4][R10.64] &rd=0x0 &wr=0x5 ?trans1;
LDC.64 R8, c[0x0][0x3a0] &wr=0x1 ?trans1;
HFMA2 R18, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
BSSY.RECONVERGENT B1, 0x590 ?trans1;
MOV R20, 0x1 ?trans1;
MOV R19, R15 ?WAIT4_END_GROUP;
LDC.64 R6, c[0x0][0x390] &wr=0x2 ?trans8;
LDC.64 R4, c[0x0][0x388] &req={0} &wr=0x3 ?trans2;
IMAD.WIDE R14, R19, 0x4, R4 &req={3} ?WAIT5_END_GROUP;
LDG.E R21, desc[UR4][R14.64] &wr=0x3 ?trans1;
LOP3.LUT P1, RZ, R20, 0xff, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B2, 0x570 ?trans1;
IADD3 R19, PT, PT, R19, 0x1, RZ ?WAIT3_END_GROUP;
BSSY.RELIABLE B3, 0x4d0 ?trans1;
PLOP3.LUT P0, PT, P1, PT, PT, 0x8, 0x80 ?trans2;
PRMT R20, RZ, 0x7610, R20 ?trans1;
ISETP.NE.AND P2, PT, R19, R12, PT ?trans1;
IMAD.WIDE R16, R21, 0x4, R8 &req={3,1} ?WAIT4_END_GROUP;
IMAD.WIDE R10, R21, 0x4, R6 &req={2} ?trans1;
@!P1 BRA 0x430 ?trans7;
LDG.E R14, desc[UR4][R16.64+-0x4] &wr=0x2 ?trans1;
HFMA2 R20, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
ISETP.NE.AND P1, PT, R14, RZ, PT &req={2} ?WAIT13_END_GROUP;
@P1 BRA 0x430 ?trans5;
LDG.E R14, desc[UR4][R10.64+-0x4] &wr=0x2 ?trans2;
ISETP.GE.AND P1, PT, R14, R13, PT &req={5,2} ?WAIT13_END_GROUP;
@!P1 BRA 0x430 ?trans5;
IADD3 R15, PT, PT, R21, -0x1, RZ ?trans1;
ISETP.EQ.AND P1, PT, R14, R13, PT ?trans1;
MOV R20, 0x1 ?WAIT3_END_GROUP;
ISETP.GE.AND P0, PT, R0, R15, PT ?WAIT13_END_GROUP;
@!P0 BREAK.RELIABLE P1, B3 ?trans5;
@!P0 BRA P1, 0x560 ?trans5;
LOP3.LUT P0, RZ, R18, 0xff, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?trans2;
PLOP3.LUT P1, PT, PT, PT, PT, 0x8, 0x80 ?trans2;
PRMT R20, RZ, 0x7610, R20 ?trans1;
BRA 0x490 ?trans10;
LOP3.LUT P1, RZ, R18, 0xff, RZ, 0xc0, !PT ?trans2;
PRMT R18, RZ, 0x7610, R18 ?WAIT11_END_GROUP;
@!P1 BREAK.RELIABLE B3 ?trans5;
@!P1 BRA 0x560 ?trans5;
LDG.E R16, desc[UR4][R16.64+-0x4] &wr=0x2 ?trans2;
ISETP.NE.AND P1, PT, R16, RZ, PT &req={2} ?WAIT13_END_GROUP;
@P1 BREAK.RELIABLE B3 ?trans5;
HFMA2 R18, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
@P1 BRA 0x560 ?trans6;
BSYNC.RELIABLE B3 ?trans5;
LDG.E R10, desc[UR4][R10.64+-0x4] &wr=0x2 ?trans2;
ISETP.GT.AND P1, PT, R10, R13, PT &req={5,2} ?WAIT13_END_GROUP;
@P1 BRA 0x560 ?trans5;
ISETP.GE.AND P1, PT, R0, R21, PT ?WAIT5_END_GROUP;
ISETP.NE.OR P3, PT, R10.reuse, R13.reuse, !P1 ?trans1;
ISETP.NE.OR P1, PT, R10, R13, !P1 ?WAIT4_END_GROUP;
SEL R20, R20, 0x1, !P3 ?trans1;
SEL R18, RZ, 0x1, P3 ?WAIT8_END_GROUP;
@P0 EXIT P1 ?trans5;
BSYNC.RECONVERGENT B2 ?trans5;
@P2 BRA 0x240 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
PRMT R0, R20, 0x9910, RZ ?trans2;
LOP3.LUT P0, RZ, R18, 0xff, RZ, 0xc0, !PT ?WAIT3_END_GROUP;
ISETP.EQ.AND P1, PT, R0, RZ, PT ?trans1;
PLOP3.LUT P0, PT, P0, PT, PT, 0x8, 0x80 ?WAIT13_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
WARPSYNC.ALL ?trans5;
NOP ?trans1;
@!P1 LDC R5, c[0x0][0x3a8] &wr=0x0 ?trans1;
S2R R0, SR_LANEID &wr=0x1 ?trans1;
BSSY.RECONVERGENT B0, 0x690 ?trans1;
@!P1 STG.E desc[UR4][R2.64], R5 &req={0} &rd=0x0 ?trans3;
@!P1 BRA 0x680 &req={1} ?trans5;
@!P0 LDC R5, c[0x0][0x3a8] &req={0} &wr=0x0 ?trans2;
@!P0 IADD3 R5, PT, PT, R5, 0x1, RZ &req={0} ?WAIT5_END_GROUP;
@!P0 STG.E desc[UR4][R2.64], R5 &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
VOTEU.ANY UR6, UPT, PT ?trans1;
LDC.64 R2, c[0x4][0x40] &req={1,0} &wr=0x0 ?trans1;
UFLO.U32 UR7, UR6 ?trans2;
POPC R5, UR6 &wr=0x0 ?trans4;
ISETP.EQ.U32.AND P0, PT, R0, UR7, PT ?WAIT13_END_GROUP;
@P0 REDG.E.ADD.STRONG.GPU desc[UR4][R2.64], R5 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x700;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: colourMinMax(int*, int*, int*, int, int, int*, int)
_Z12colourMinMaxPiS_S_iiS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x3c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v2
s_cbranch_execz .LBB2_31
s_load_b64 s[2:3], s[0:1], 0x20
v_ashrrev_i32_e32 v3, 31, v2
s_mov_b32 s8, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[5:6], 2, v[2:3]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s2, v5
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v6, vcc_lo
global_load_b32 v3, v[0:1], off
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, 0, v3
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB2_31
s_load_b128 s[4:7], s[0:1], 0x0
s_mov_b32 s9, -1
s_waitcnt lgkmcnt(0)
v_add_co_u32 v3, vcc_lo, s4, v5
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v6, vcc_lo
s_mov_b32 s5, -1
s_mov_b32 s4, exec_lo
global_load_b64 v[3:4], v[3:4], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e64 v3, v4
s_cbranch_execz .LBB2_22
s_load_b64 s[8:9], s[0:1], 0x10
s_add_u32 s5, s2, -4
s_addc_u32 s3, s3, -1
s_mov_b32 s2, -1
s_mov_b32 s15, -1
s_waitcnt lgkmcnt(0)
v_add_co_u32 v5, vcc_lo, s8, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s9, v6, vcc_lo
s_add_u32 s8, s8, -4
s_addc_u32 s9, s9, -1
global_load_b32 v10, v[5:6], off
v_ashrrev_i32_e32 v6, 31, v3
v_mov_b32_e32 v5, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[5:6], 2, v[5:6]
v_add_co_u32 v5, vcc_lo, s6, v5
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
s_mov_b32 s6, 0
.LBB2_4:
global_load_b32 v7, v[5:6], off
s_xor_b32 s18, s2, -1
s_mov_b32 s20, 0
s_and_saveexec_b32 s19, s2
s_cbranch_execz .LBB2_10
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v8, 31, v7
s_mov_b32 s2, -1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[8:9], 2, v[7:8]
v_add_co_u32 v11, vcc_lo, s5, v8
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v12, vcc_lo, s3, v9, vcc_lo
global_load_b32 v11, v[11:12], off
s_waitcnt vmcnt(0)
v_cmp_ne_u32_e64 s17, 0, v11
v_cmp_eq_u32_e32 vcc_lo, 0, v11
s_and_saveexec_b32 s16, vcc_lo
s_cbranch_execz .LBB2_9
v_add_co_u32 v8, vcc_lo, s8, v8
v_add_co_ci_u32_e32 v9, vcc_lo, s9, v9, vcc_lo
s_mov_b32 s21, exec_lo
global_load_b32 v8, v[8:9], off
s_waitcnt vmcnt(0)
v_cmp_lt_i32_e64 s20, v8, v10
v_cmpx_ge_i32_e64 v8, v10
s_cbranch_execz .LBB2_8
v_add_nc_u32_e32 v9, -1, v7
v_cmp_eq_u32_e32 vcc_lo, v8, v10
s_xor_b32 s22, s15, -1
s_and_not1_b32 s20, s20, exec_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_lt_i32_e64 s2, v2, v9
s_and_b32 s23, vcc_lo, s2
s_xor_b32 s2, exec_lo, -1
s_or_b32 s22, s23, s22
v_cndmask_b32_e64 v11, 1, 4, s23
s_xor_b32 s24, s22, -1
s_and_b32 s22, s15, exec_lo
s_and_b32 s24, s24, exec_lo
s_and_b32 s23, s23, exec_lo
s_or_b32 s20, s20, s24
.LBB2_8:
s_or_b32 exec_lo, exec_lo, s21
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 s17, s17, exec_lo
s_and_b32 s20, s20, exec_lo
s_or_not1_b32 s2, s2, exec_lo
s_and_b32 s22, s22, exec_lo
s_and_b32 s21, s23, exec_lo
s_or_b32 s17, s17, s20
.LBB2_9:
s_or_b32 exec_lo, exec_lo, s16
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 s20, s2, exec_lo
s_and_not1_b32 s2, s18, exec_lo
s_and_b32 s18, s17, exec_lo
s_and_b32 s16, s22, exec_lo
s_and_b32 s17, s21, exec_lo
s_or_b32 s18, s2, s18
.LBB2_10:
s_or_b32 exec_lo, exec_lo, s19
s_and_saveexec_b32 s19, s18
s_cbranch_execz .LBB2_16
v_mov_b32_e32 v11, 0
s_mov_b32 s2, 0
s_and_saveexec_b32 s18, s15
s_cbranch_execz .LBB2_15
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v8, 31, v7
s_mov_b32 s2, -1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[8:9], 2, v[7:8]
v_add_co_u32 v11, vcc_lo, s5, v8
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v12, vcc_lo, s3, v9, vcc_lo
global_load_b32 v11, v[11:12], off
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, 0, v11
v_mov_b32_e32 v11, 0
s_and_saveexec_b32 s15, vcc_lo
s_cbranch_execz .LBB2_14
v_add_co_u32 v8, vcc_lo, s8, v8
v_add_co_ci_u32_e32 v9, vcc_lo, s9, v9, vcc_lo
v_cmp_ge_i32_e32 vcc_lo, v2, v7
s_xor_b32 s21, s20, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v7, 0, 1, s21
global_load_b32 v8, v[8:9], off
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e64 s2, v8, v10
s_and_b32 s2, s2, vcc_lo
v_cmp_gt_i32_e32 vcc_lo, v8, v10
v_cndmask_b32_e64 v7, v7, 4, s2
s_or_b32 s2, vcc_lo, s2
s_delay_alu instid0(VALU_DEP_1)
v_cndmask_b32_e64 v11, v7, 0, vcc_lo
s_or_not1_b32 s2, s2, exec_lo
.LBB2_14:
s_or_b32 exec_lo, exec_lo, s15
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 s2, s2, exec_lo
.LBB2_15:
s_or_b32 exec_lo, exec_lo, s18
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 s15, s17, exec_lo
s_and_b32 s17, s20, exec_lo
s_and_not1_b32 s16, s16, exec_lo
s_and_b32 s2, s2, exec_lo
s_or_b32 s17, s15, s17
s_or_b32 s16, s16, s2
.LBB2_16:
s_or_b32 exec_lo, exec_lo, s19
s_mov_b32 s18, -1
s_mov_b32 s19, -1
s_mov_b32 s21, exec_lo
v_cmpx_gt_i32_e32 4, v11
v_cmp_eq_u32_e32 vcc_lo, 0, v11
s_mov_b32 s2, -1
s_and_b32 s20, s16, exec_lo
s_and_b32 s15, s17, exec_lo
s_or_not1_b32 s19, vcc_lo, exec_lo
s_or_b32 exec_lo, exec_lo, s21
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 s14, s14, exec_lo
s_and_b32 s20, s20, exec_lo
s_and_not1_b32 s13, s13, exec_lo
s_and_b32 s15, s15, exec_lo
s_and_not1_b32 s12, s12, exec_lo
s_and_b32 s2, s2, exec_lo
s_or_b32 s14, s14, s20
s_or_b32 s13, s13, s15
s_or_b32 s12, s12, s2
s_and_saveexec_b32 s20, s19
s_cbranch_execz .LBB2_20
v_add_nc_u32_e32 v3, 1, v3
v_add_co_u32 v5, vcc_lo, v5, 4
v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_cmp_ge_i32_e32 vcc_lo, v3, v4
s_and_not1_b32 s14, s14, exec_lo
s_and_b32 s15, s16, exec_lo
s_and_not1_b32 s13, s13, exec_lo
s_and_b32 s2, s17, exec_lo
s_or_b32 s14, s14, s15
s_or_b32 s13, s13, s2
s_and_not1_b32 s12, s12, exec_lo
s_or_not1_b32 s18, vcc_lo, exec_lo
.LBB2_20:
s_or_b32 exec_lo, exec_lo, s20
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s16, exec_lo, s18
s_or_b32 s6, s16, s6
s_and_not1_b32 s11, s11, exec_lo
s_and_b32 s16, s14, exec_lo
s_and_not1_b32 s10, s10, exec_lo
s_or_b32 s11, s11, s16
s_and_b32 s16, s13, exec_lo
s_and_not1_b32 s7, s7, exec_lo
s_and_b32 s17, s12, exec_lo
s_or_b32 s10, s10, s16
s_or_b32 s7, s7, s17
s_and_not1_b32 exec_lo, exec_lo, s6
s_cbranch_execnz .LBB2_4
s_or_b32 exec_lo, exec_lo, s6
s_delay_alu instid0(SALU_CYCLE_1)
s_or_not1_b32 s5, s11, exec_lo
s_or_not1_b32 s9, s10, exec_lo
s_and_b32 s8, s7, exec_lo
.LBB2_22:
s_or_b32 exec_lo, exec_lo, s4
s_mov_b32 s2, -1
s_xor_b32 s3, s8, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 exec_lo, exec_lo, s3
s_cbranch_execz .LBB2_31
s_load_b32 s1, s[0:1], 0x28
s_xor_b32 s3, s9, -1
s_waitcnt lgkmcnt(0)
v_mov_b32_e32 v2, s1
s_and_saveexec_b32 s0, s3
s_cbranch_execz .LBB2_27
s_mov_b32 s2, 0
s_and_saveexec_b32 s4, s5
s_mov_b32 s2, exec_lo
s_add_i32 s3, s1, 1
s_or_b32 exec_lo, exec_lo, s4
v_mov_b32_e32 v2, s3
s_or_not1_b32 s2, s2, exec_lo
.LBB2_27:
s_or_b32 exec_lo, exec_lo, s0
s_and_saveexec_b32 s0, s2
s_cbranch_execz .LBB2_29
global_store_b32 v[0:1], v2, off
.LBB2_29:
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_mov_b32 s0, exec_lo
v_mbcnt_lo_u32_b32 v0, s0, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_eq_u32_e32 vcc_lo, 0, v0
s_and_b32 s1, exec_lo, vcc_lo
s_mov_b32 exec_lo, s1
s_cbranch_execz .LBB2_31
s_bcnt1_i32_b32 s2, s0
s_delay_alu instid0(SALU_CYCLE_1)
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
s_getpc_b64 s[0:1]
s_add_u32 s0, s0, d_count@rel32@lo+4
s_addc_u32 s1, s1, d_count@rel32@hi+12
global_atomic_add_u32 v0, v1, s[0:1]
.LBB2_31:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| colourMinMax | 2,836 | 4,405 | stackv2-00000-of-00015 |
// Demangled: degreeCalc(int*, int*, int*, int, int)
Function : _Z10degreeCalcPiS_S_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R7, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x398] &wr=0x2 ?trans1;
IMAD R7, R7, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x390] &wr=0x2 ?trans1;
IMAD.WIDE R2, R7, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R2.64] &req={1} &wr=0x3 ?trans4;
LDG.E R9, desc[UR4][R2.64+0x4] &wr=0x3 ?trans1;
IMAD.WIDE R4, R7, 0x4, R4 &req={2} ?trans1;
IADD3 R9, PT, PT, -R0, R9, RZ &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x120;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: degreeCalc(int*, int*, int*, int, int)
_Z10degreeCalcPiS_S_ii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB5_2
s_load_b64 s[2:3], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s2, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b64 v[2:3], v[2:3], off
s_waitcnt vmcnt(0)
v_sub_nc_u32_e32 v2, v3, v2
global_store_b32 v[0:1], v2, off
.LBB5_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| degreeCalc | 526 | 518 | stackv2-00000-of-00015 |
// Demangled: randomNumbering(curandStateXORWOW*, int*, int, int)
Function : _Z15randomNumberingP17curandStateXORWOWPiii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R0, SR_CTAID.X &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x0 ?trans1;
S2R R5, SR_TID.X &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans5;
LDC.64 R16, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD R0, R0, UR4, R5 &req={0} ?trans1;
LDCU UR4, c[0x0][0x394] &wr=0x0 ?trans3;
IMAD.WIDE R2, R0, 0x30, R2 &req={1} ?WAIT5_END_GROUP;
LDG.E.64 R10, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans4;
LDG.E.64 R6, desc[UR6][R2.64+0x10] &wr=0x4 ?trans4;
LDG.E.64 R4, desc[UR6][R2.64+0x8] &wr=0x5 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, -0x1, URZ &req={0} ?WAIT9_END_GROUP;
I2F.F64 R8, UR4 &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3feffffde7210be9 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, R8, UR4 &req={0} &wr=0x0 ?trans1;
SHF.R.U32.HI R12, RZ, 0x2, R11 &req={2} ?trans2;
IADD3 R10, PT, PT, R10, 0x587c5, RZ ?trans2;
LOP3.LUT R12, R12, R11, RZ, 0x3c, !PT ?trans1;
IMAD.SHL.U32 R14, R7, 0x10, RZ &req={4} ?trans1;
MOV R19, R6 ?trans1;
MOV R18, R5 &req={5} ?trans1;
IADD3 R11, PT, PT, R12, R12, RZ ?WAIT4_END_GROUP;
STG.E.64 desc[UR6][R2.64+0x8], R18 ?trans1;
LOP3.LUT R11, R7, R14, R11, 0x96, !PT ?trans1;
MOV R14, 0x2f800000 ?WAIT3_END_GROUP;
LOP3.LUT R13, R11, R12, RZ, 0x3c, !PT ?trans1;
MOV R12, R7 ?WAIT3_END_GROUP;
IADD3 R11, PT, PT, R13, R10, RZ ?trans2;
STG.E.64 desc[UR6][R2.64+0x10], R12 ?trans2;
I2FP.F32.U32 R11, R11 ?WAIT5_END_GROUP;
FFMA R14, R11, R14, 1.1641532182693481445e-10 ?trans1;
MOV R11, R4 ?trans1;
IMAD.WIDE R4, R0, 0x4, R16 &req={3} ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R14, R14 &wr=0x0 ?trans1;
STG.E.64 desc[UR6][R2.64], R10 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R8, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R8, R8 &req={0} &wr=0x0 ?trans2;
FADD R15, R8, 1 &req={0} ?WAIT6_END_GROUP;
F2I.TRUNC.NTZ R15, R15 &wr=0x0 ?trans2;
STG.E desc[UR6][R4.64], R15 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x390;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: randomNumbering(hiprandState*, int*, int, int)
_Z15randomNumberingP12hiprandStatePiii:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b32 s0, s[0:1], 0x14
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_add_i32 s0, s0, -1
v_mad_u64_u32 v[5:6], null, s15, s2, v[0:1]
v_cvt_f64_i32_e32 v[9:10], s0
s_mov_b32 s0, 0xe7210be9
s_mov_b32 s1, 0x3feffffd
s_delay_alu instid0(VALU_DEP_2)
v_mad_i64_i32 v[7:8], null, v5, 48, s[4:5]
s_clause 0x2
global_load_b128 v[0:3], v[7:8], off offset:24
global_load_b32 v4, v[7:8], off offset:40
global_load_b32 v6, v[7:8], off
v_add_f64 v[9:10], v[9:10], s[0:1]
s_waitcnt vmcnt(2)
v_lshrrev_b32_e32 v11, 2, v0
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v13, 0x587c5, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_xor_b32_e32 v0, v11, v0
v_lshlrev_b32_e32 v11, 4, v4
v_lshlrev_b32_e32 v12, 1, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v11, v12, v11
v_xor3_b32 v0, v11, v0, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v6, v0, v13
v_cvt_f32_u32_e32 v6, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmaak_f32 v6, 0x2f800000, v6, 0x2f800000
v_cvt_f64_f32_e32 v[11:12], v6
v_ashrrev_i32_e32 v6, 31, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[5:6], 2, v[5:6]
v_add_co_u32 v5, vcc_lo, s6, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
v_mul_f64 v[9:10], v[9:10], v[11:12]
v_cvt_f32_f64_e32 v9, v[9:10]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v9, 1.0, v9
v_cvt_i32_f32_e32 v9, v9
s_clause 0x2
global_store_b32 v[7:8], v13, off
global_store_b128 v[7:8], v[1:4], off offset:24
global_store_b32 v[7:8], v0, off offset:40
global_store_b32 v[5:6], v9, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| randomNumbering | 1,316 | 1,123 | stackv2-00000-of-00015 |
// Demangled: setup_kernel(curandStateXORWOW*, unsigned long)
Function : _Z12setup_kernelP17curandStateXORWOWm
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R8, SR_CTAID.X &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x388] &wr=0x2 ?trans1;
LDCU UR6, c[0x0][0x360] &wr=0x1 ?trans1;
BSSY.RECONVERGENT B0, 0xed0 ?trans1;
S2R R9, SR_TID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x3 ?trans4;
LDC.64 R6, c[0x0][0x380] &wr=0x4 ?trans1;
LOP3.LUT R0, R2, 0xaad26b49, RZ, 0x3c, !PT &req={2} ?WAIT2_END_GROUP;
LOP3.LUT R2, R3, 0xf7dcefdd, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
IMAD R0, R0, 0x4182bed5, RZ ?trans2;
IMAD R3, R2, -0x658354e5, RZ ?WAIT3_END_GROUP;
IADD3 R5, PT, PT, R0, 0x75bcd15, RZ ?trans1;
IMAD R8, R8, UR6, R9 &req={1} ?trans1;
IADD3 R4, PT, PT, R0.reuse, 0x64f0c9, R3 ?trans2;
LOP3.LUT R10, R0, 0x159a55e5, RZ, 0x3c, !PT ?trans1;
IMAD.WIDE R6, R8, 0x30, R6 &req={4} ?trans1;
IADD3 R13, PT, PT, R0, 0x583f19, RZ ?trans2;
IADD3 R11, PT, PT, R3.reuse, 0x1f123bb5, RZ ?trans2;
LOP3.LUT R12, R3, 0x5491333, RZ, 0x3c, !PT ?trans1;
STG.E.64 desc[UR4][R6.64], R4 &req={3} &rd=0x1 ?trans1;
ISETP.NE.AND P0, PT, R8, RZ, PT ?trans1;
SHF.R.S32.HI R9, RZ, 0x1f, R8 ?WAIT2_END_GROUP;
STG.E.64 desc[UR4][R6.64+0x8], R10 &rd=0x1 ?trans4;
STG.E.64 desc[UR4][R6.64+0x10], R12 &rd=0x1 ?trans6;
@!P0 BRA 0xec0 &req={0} ?trans5;
IADD.64 R10, R6, 0x4 &req={1} ?trans2;
HFMA2 R18, -RZ, RZ, 0, 0 ?WAIT7_END_GROUP;
LOP3.LUT R12, R8, 0x3, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B1, 0xe50 ?trans1;
MOV R13, RZ ?WAIT5_END_GROUP;
ISETP.NE.S64.AND P0, PT, R12, RZ, PT ?WAIT14_END_GROUP;
@!P0 BRA 0xe40 ?trans5;
LDC.64 R14, c[0x4][RZ] &wr=0x0 ?trans1;
MOV R19, RZ ?trans1;
IMAD.WIDE.U32 R14, R18, 0xc80, R14 &req={0} ?WAIT7_END_GROUP;
HFMA2 R21, -RZ, RZ, 0, 0 &req={0} ?trans1;
MOV R23, RZ ?trans1;
CS2R R4, SRZ ?trans1;
CS2R R2, SRZ ?WAIT7_END_GROUP;
IMAD.WIDE.U32 R16, R23, 0x4, R10 ?WAIT5_END_GROUP;
LDG.E R25, desc[UR4][R16.64] &rd=0x0 &wr=0x5 ?trans1;
MOV R27, R23 ?trans1;
IADD3 R23, PT, PT, R23, 0x1, RZ ?trans1;
MOV R0, RZ ?WAIT4_END_GROUP;
ISETP.NE.AND P0, PT, R23, 0x5, PT ?WAIT5_END_GROUP;
P2R R28, PR, RZ, 0x1 &req={0} ?WAIT8_END_GROUP;
SHF.R.U32.HI R30, RZ, R0, R25 &req={5} ?trans1;
IMAD R16, R27, 0x20, R0 ?WAIT3_END_GROUP;
LOP3.LUT R17, R30, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P0, PT, R17, 0x1, PT ?trans1;
IMAD R17, R16, 0x5, RZ ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R16, R17, 0x4, R14 ?trans1;
R2P PR, R30, 0x7e ?WAIT7_END_GROUP;
@!P0 LDG.E R20, desc[UR4][R16.64] &wr=0x2 ?trans4;
@!P0 LDG.E R24, desc[UR4][R16.64+0x10] &wr=0x3 ?trans4;
@!P0 LDG.E R29, desc[UR4][R16.64+0x4] &wr=0x4 ?trans4;
@!P0 LDG.E R22, desc[UR4][R16.64+0x8] &wr=0x4 ?trans4;
@!P0 LDG.E R31, desc[UR4][R16.64+0xc] &wr=0x4 ?trans4;
@P1 LDG.E R32, desc[UR4][R16.64+0x14] &wr=0x4 ?trans4;
@P2 LDG.E R34, desc[UR4][R16.64+0x28] &wr=0x4 ?trans4;
@P5 LDG.E R36, desc[UR4][R16.64+0x64] &wr=0x4 ?trans4;
@P1 LDG.E R26, desc[UR4][R16.64+0x1c] &wr=0x4 ?trans4;
@P6 LDG.E R35, desc[UR4][R16.64+0x78] &wr=0x4 ?trans4;
@P2 LDG.E R33, desc[UR4][R16.64+0x2c] &wr=0x4 ?trans4;
@P4 LDG.E R37, desc[UR4][R16.64+0x5c] &wr=0x4 ?trans1;
@!P0 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P3 LDG.E R20, desc[UR4][R16.64+0x3c] &wr=0x2 ?trans1;
@!P0 LOP3.LUT R5, R5, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P4 LDG.E R24, desc[UR4][R16.64+0x50] &wr=0x3 ?trans1;
@!P0 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT &req={4} ?WAIT3_END_GROUP;
@P1 LDG.E R29, desc[UR4][R16.64+0x18] &wr=0x4 ?trans1;
@!P0 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P1 LDG.E R22, desc[UR4][R16.64+0x24] &wr=0x4 ?trans1;
@!P0 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P1 LDG.E R31, desc[UR4][R16.64+0x20] &wr=0x4 ?trans1;
@P1 LOP3.LUT R21, R21, R32, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R32, desc[UR4][R16.64+0x30] &wr=0x4 ?trans1;
@P2 LOP3.LUT R21, R21, R34, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R34, desc[UR4][R16.64+0x38] &wr=0x4 ?trans1;
LOP3.LUT P0, RZ, R30, 0x80, RZ, 0xc0, !PT ?trans2;
@P1 LOP3.LUT R3, R3, R26, RZ, 0x3c, !PT ?trans2;
@P4 LDG.E R26, desc[UR4][R16.64+0x60] &wr=0x4 ?trans1;
@P3 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P3 LDG.E R20, desc[UR4][R16.64+0x44] &wr=0x2 ?trans1;
@P4 LOP3.LUT R21, R21, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P4 LDG.E R24, desc[UR4][R16.64+0x58] &wr=0x3 ?trans1;
@P1 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT &req={4} ?trans2;
@P5 LOP3.LUT R21, R21, R36, RZ, 0x3c, !PT ?trans1;
@P2 LDG.E R29, desc[UR4][R16.64+0x34] &wr=0x4 ?trans1;
@P1 LOP3.LUT R5, R5, R22, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P3 LDG.E R22, desc[UR4][R16.64+0x4c] &wr=0x4 ?trans1;
@P1 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P3 LDG.E R31, desc[UR4][R16.64+0x40] &wr=0x4 ?trans1;
@P6 LOP3.LUT R21, R21, R35, RZ, 0x3c, !PT ?trans2;
@P2 LOP3.LUT R2, R2, R33, RZ, 0x3c, !PT ?trans1;
@P4 LDG.E R35, desc[UR4][R16.64+0x54] &wr=0x4 ?trans1;
@P2 LOP3.LUT R5, R5, R34, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P3 LDG.E R33, desc[UR4][R16.64+0x48] &wr=0x4 ?trans1;
@P2 LOP3.LUT R3, R3, R32, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P0 LDG.E R34, desc[UR4][R16.64+0x8c] &wr=0x4 ?trans4;
@P5 LDG.E R32, desc[UR4][R16.64+0x68] &wr=0x4 ?trans1;
@P3 LOP3.LUT R3, R3, R20, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P5 LDG.E R20, desc[UR4][R16.64+0x6c] &wr=0x2 ?trans1;
@P4 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P6 LDG.E R24, desc[UR4][R16.64+0x80] &wr=0x3 ?trans1;
@P2 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT &req={4} ?WAIT3_END_GROUP;
@P5 LDG.E R29, desc[UR4][R16.64+0x70] &wr=0x4 ?trans1;
@P3 LOP3.LUT R5, R5, R22, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P5 LDG.E R22, desc[UR4][R16.64+0x74] &wr=0x4 ?trans1;
@P3 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?trans1;
@P6 LDG.E R31, desc[UR4][R16.64+0x7c] &wr=0x4 ?trans1;
@P4 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R26, desc[UR4][R16.64+0x88] &wr=0x4 ?trans1;
@P3 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R33, desc[UR4][R16.64+0x84] &wr=0x4 ?trans1;
@P0 LOP3.LUT R21, R21, R34, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R4, R4, R37, RZ, 0x3c, !PT ?trans1;
@P0 LDG.E R35, desc[UR4][R16.64+0x90] &wr=0x4 ?trans1;
@P5 LOP3.LUT R2, R2, R32, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P0 LDG.E R32, desc[UR4][R16.64+0x94] &wr=0x4 ?trans4;
@P0 LDG.E R37, desc[UR4][R16.64+0x98] &wr=0x4 ?trans4;
@P0 LDG.E R34, desc[UR4][R16.64+0x9c] &wr=0x4 ?trans1;
@P5 LOP3.LUT R3, R3, R20, RZ, 0x3c, !PT &req={2} ?WAIT4_END_GROUP;
@P6 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={3} ?trans2;
@P5 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT &req={4} ?trans2;
@P5 LOP3.LUT R5, R5, R22, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
@P0 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R3, R3, R32, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R4, R4, R37, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R5, R5, R34, RZ, 0x3c, !PT ?trans2;
R2P PR, R30.B1, 0x7f ?WAIT13_END_GROUP;
@P0 LDG.E R22, desc[UR4][R16.64+0xa8] &wr=0x2 ?trans4;
@P0 LDG.E R24, desc[UR4][R16.64+0xb0] &wr=0x3 ?trans4;
@P0 LDG.E R31, desc[UR4][R16.64+0xac] &wr=0x4 ?trans4;
@P0 LDG.E R29, desc[UR4][R16.64+0xa4] &wr=0x4 ?trans4;
@P0 LDG.E R20, desc[UR4][R16.64+0xa0] &wr=0x4 ?trans4;
@P2 LDG.E R32, desc[UR4][R16.64+0xc8] &wr=0x4 ?trans4;
@P3 LDG.E R34, desc[UR4][R16.64+0xdc] &wr=0x4 ?trans4;
@P4 LDG.E R36, desc[UR4][R16.64+0xf0] &wr=0x4 ?trans4;
@P5 LDG.E R33, desc[UR4][R16.64+0x104] &wr=0x4 ?trans4;
@P1 LDG.E R26, desc[UR4][R16.64+0xc4] &wr=0x4 ?trans4;
@P3 LDG.E R37, desc[UR4][R16.64+0xe8] &wr=0x4 ?trans4;
@P3 LDG.E R35, desc[UR4][R16.64+0xe0] &wr=0x4 ?trans1;
@P0 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P1 LDG.E R22, desc[UR4][R16.64+0xb4] &wr=0x2 ?trans1;
@P0 LOP3.LUT R5, R5, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P1 LDG.E R24, desc[UR4][R16.64+0xbc] &wr=0x3 ?trans1;
@P0 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT &req={4} ?WAIT3_END_GROUP;
@P1 LDG.E R31, desc[UR4][R16.64+0xc0] &wr=0x4 ?trans1;
@P0 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P1 LDG.E R29, desc[UR4][R16.64+0xb8] &wr=0x4 ?trans1;
@P0 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT ?trans2;
LOP3.LUT P0, RZ, R30, 0x8000, RZ, 0xc0, !PT ?trans1;
@P6 LDG.E R20, desc[UR4][R16.64+0x118] &wr=0x4 ?trans4;
@P3 LDG.E R30, desc[UR4][R16.64+0xe4] &wr=0x4 ?trans1;
@P1 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R26, desc[UR4][R16.64+0xd8] &wr=0x4 ?trans1;
@P1 LOP3.LUT R21, R21, R22, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P4 LDG.E R22, desc[UR4][R16.64+0xf8] &wr=0x2 ?trans1;
@P2 LOP3.LUT R21, R21, R32, RZ, 0x3c, !PT ?trans2;
@P1 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={3} ?trans1;
@P3 LDG.E R32, desc[UR4][R16.64+0xec] &wr=0x3 ?trans1;
@P3 LOP3.LUT R21, R21, R34, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R24, desc[UR4][R16.64+0xd0] &wr=0x2 ?trans1;
@P4 LOP3.LUT R21, R21, R36, RZ, 0x3c, !PT ?trans2;
@P1 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT &req={4} ?trans1;
@P0 LDG.E R36, desc[UR4][R16.64+0x12c] &wr=0x4 ?trans1;
@P5 LOP3.LUT R21, R21, R33, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R33, desc[UR4][R16.64+0xd4] &wr=0x3 ?trans1;
@P1 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R31, desc[UR4][R16.64+0xcc] &wr=0x4 ?trans4;
@P4 LDG.E R29, desc[UR4][R16.64+0xfc] &wr=0x4 ?trans4;
@P4 LDG.E R34, desc[UR4][R16.64+0xf4] &wr=0x4 ?trans1;
@P6 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P4 LDG.E R20, desc[UR4][R16.64+0x100] &wr=0x4 ?trans1;
@P2 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P5 LDG.E R26, desc[UR4][R16.64+0x114] &wr=0x4 ?trans1;
@P2 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P5 LDG.E R24, desc[UR4][R16.64+0x10c] &wr=0x2 ?trans1;
@P3 LOP3.LUT R3, R3, R30, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R30, desc[UR4][R16.64+0x128] &wr=0x2 ?trans1;
@P2 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P5 LDG.E R33, desc[UR4][R16.64+0x110] &wr=0x3 ?trans1;
@P2 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT &req={4} ?trans2;
@P3 LOP3.LUT R4, R4, R37, RZ, 0x3c, !PT ?trans1;
@P5 LDG.E R31, desc[UR4][R16.64+0x108] &wr=0x4 ?trans1;
@P3 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT ?trans1;
@P6 LDG.E R35, desc[UR4][R16.64+0x11c] &wr=0x4 ?trans1;
@P4 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R22, desc[UR4][R16.64+0x120] &wr=0x4 ?trans1;
@P0 LOP3.LUT R21, R21, R36, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R29, desc[UR4][R16.64+0x124] &wr=0x4 ?trans1;
@P3 LOP3.LUT R5, R5, R32, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R2, R2, R34, RZ, 0x3c, !PT ?trans1;
@P0 LDG.E R37, desc[UR4][R16.64+0x130] &wr=0x4 ?trans4;
@P0 LDG.E R32, desc[UR4][R16.64+0x134] &wr=0x4 ?trans4;
@P0 LDG.E R34, desc[UR4][R16.64+0x138] &wr=0x4 ?trans4;
@P0 LDG.E R36, desc[UR4][R16.64+0x13c] &wr=0x4 ?trans1;
IADD3 R0, PT, PT, R0, 0x10, RZ ?WAIT2_END_GROUP;
@P4 LOP3.LUT R5, R5, R20, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
ISETP.NE.AND P1, PT, R0, 0x20, PT ?trans1;
@P5 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?trans2;
@P5 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={2} ?trans2;
@P6 LOP3.LUT R5, R5, R30, RZ, 0x3c, !PT ?trans2;
@P5 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT &req={3} ?trans2;
@P5 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT &req={4} ?WAIT4_END_GROUP;
@P6 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R2, R2, R37, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R3, R3, R32, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R4, R4, R34, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
@P0 LOP3.LUT R5, R5, R36, RZ, 0x3c, !PT ?trans1;
@P1 BRA 0x2f0 ?trans6;
ISETP.NE.AND P2, PT, R28, RZ, PT ?WAIT13_END_GROUP;
@P2 BRA 0x280 ?trans5;
STG.E.64 desc[UR4][R6.64+0x8], R2 &rd=0x0 ?trans1;
IADD3 R19, PT, PT, R19, 0x1, RZ ?WAIT3_END_GROUP;
STG.E.64 desc[UR4][R6.64+0x10], R4 &rd=0x0 ?trans2;
ISETP.GE.U32.AND P0, PT, R19, R12, PT ?trans2;
STG.E desc[UR4][R6.64+0x4], R21 &rd=0x0 ?trans11;
@!P0 BRA 0x240 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R2, R8 &req={0} ?trans1;
MOV R3, R9 ?trans1;
SHF.R.U64 R8, R8, 0x2, R9.reuse ?trans2;
SHF.R.U32.HI R9, RZ, 0x2, R9 ?trans2;
ISETP.GT.U64.AND P0, PT, R2, 0x3, PT ?WAIT3_END_GROUP;
IADD3 R18, PT, PT, R18, 0x1, RZ ?WAIT11_END_GROUP;
@P0 BRA 0x1c0 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
STG.E.64 desc[UR4][R6.64+0x18], RZ ?trans4;
STG.E desc[UR4][R6.64+0x20], RZ ?trans4;
STG.E.64 desc[UR4][R6.64+0x28], RZ ?trans1;
EXIT ?trans5;
BRA 0xf10;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: setup_kernel(hiprandState*, unsigned long)
_Z12setup_kernelP12hiprandStatem:
s_load_b64 s[0:1], s[0:1], 0x4
s_clause 0x1
s_load_b32 s4, s[2:3], 0x1c
s_load_b128 s[16:19], s[2:3], 0x0
v_bfe_u32 v2, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s0, s0, 16
s_delay_alu instid0(VALU_DEP_1)
v_mul_u32_u24_e32 v2, s1, v2
s_mul_i32 s0, s0, s1
s_xor_b32 s1, s19, 0xa03697cb
s_xor_b32 s3, s18, 0x2c7f967f
s_mul_i32 s5, s1, 0x7b99840d
s_and_b32 s2, s4, 0xffff
s_mul_i32 s4, s3, 0x493c4aa1
s_xor_b32 s3, s5, 0x5491333
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 20, 10
s_xor_b32 s1, s4, 0x159a55e5
s_add_i32 s6, s4, 0x583f19
s_mov_b32 s18, exec_lo
v_mul_lo_u32 v3, s0, v1
v_mad_u64_u32 v[5:6], null, s15, s2, v[1:2]
s_add_i32 s0, s4, 0x75bcd15
s_add_i32 s2, s5, 0x1f123bb5
s_add_i32 s4, s4, s5
s_mov_b32 s5, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_add3_u32 v4, v3, v2, v0
v_mov_b32_e32 v2, s2
v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
s_add_i32 s0, s4, 0x64f0c9
v_mul_lo_u32 v8, v4, 48
v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v4, s6
v_ashrrev_i32_e32 v6, 31, v5
v_mov_b32_e32 v7, s0
ds_store_2addr_b64 v8, v[0:1], v[2:3] offset0:3 offset1:4
ds_store_2addr_b32 v8, v7, v4 offset1:10
v_cmpx_ne_u32_e32 0, v5
s_cbranch_execz .LBB3_12
v_mov_b32_e32 v7, v6
v_dual_mov_b32 v6, v5 :: v_dual_add_nc_u32 v9, 24, v8
s_mov_b32 s8, 0
s_getpc_b64 s[6:7]
s_add_u32 s6, s6, _ZL31d_xorwow_sequence_jump_matrices@rel32@lo+4
s_addc_u32 s7, s7, _ZL31d_xorwow_sequence_jump_matrices@rel32@hi+12
.LBB3_2:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_and_b32_e32 v10, 3, v6
s_mov_b32 s19, exec_lo
v_cmpx_ne_u32_e32 0, v10
s_cbranch_execz .LBB3_11
s_mov_b32 s20, 0
s_mov_b32 s21, 0
.LBB3_4:
s_mov_b32 s9, s8
s_mov_b32 s10, s8
s_mov_b32 s11, s8
s_mov_b32 s12, s8
v_dual_mov_b32 v0, s8 :: v_dual_mov_b32 v1, s9
v_dual_mov_b32 v2, s10 :: v_dual_mov_b32 v3, s11
v_mov_b32_e32 v4, s12
s_mov_b64 s[10:11], s[6:7]
s_mov_b32 s9, 0
.LBB3_5:
s_delay_alu instid0(SALU_CYCLE_1)
s_lshr_b32 s0, s9, 3
s_mov_b64 s[12:13], 0
s_and_b32 s0, s0, 0x1ffffffc
s_mov_b64 s[14:15], s[10:11]
v_add_nc_u32_e32 v11, s0, v9
s_and_b32 s0, s9, 31
ds_load_b32 v11, v11
s_waitcnt lgkmcnt(0)
v_bfe_u32 v11, v11, s0, 1
s_delay_alu instid0(VALU_DEP_1)
v_cmp_eq_u32_e32 vcc_lo, 0, v11
.LBB3_6:
s_load_b32 s4, s[14:15], 0x0
s_cmp_eq_u32 s12, 1
s_cselect_b32 s0, -1, 0
s_cmp_eq_u32 s12, 2
v_cndmask_b32_e64 v11, v0, v1, s0
s_cselect_b32 s1, -1, 0
s_cmp_eq_u32 s12, 3
s_cselect_b32 s2, -1, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v11, v11, v2, s1
s_cmp_eq_u32 s12, 4
s_cselect_b32 s3, -1, 0
s_cmp_eq_u32 s12, 0
v_cndmask_b32_e64 v11, v11, v3, s2
s_delay_alu instid0(VALU_DEP_1)
v_cndmask_b32_e64 v11, v11, v4, s3
s_waitcnt lgkmcnt(0)
v_cndmask_b32_e64 v12, s4, 0, vcc_lo
s_cselect_b32 s4, -1, 0
s_add_u32 s12, s12, 1
s_addc_u32 s13, s13, 0
s_add_u32 s14, s14, 4
v_xor_b32_e32 v11, v12, v11
s_addc_u32 s15, s15, 0
s_cmp_eq_u32 s12, 5
s_delay_alu instid0(VALU_DEP_1)
v_cndmask_b32_e64 v4, v4, v11, s3
v_cndmask_b32_e64 v3, v3, v11, s2
v_cndmask_b32_e64 v2, v2, v11, s1
v_cndmask_b32_e64 v1, v1, v11, s0
v_cndmask_b32_e64 v0, v0, v11, s4
s_cbranch_scc0 .LBB3_6
s_add_i32 s9, s9, 1
s_add_u32 s10, s10, 20
s_addc_u32 s11, s11, 0
s_cmpk_lg_i32 s9, 0xa0
s_cbranch_scc1 .LBB3_5
v_mov_b32_e32 v11, v9
s_mov_b64 s[0:1], 0
.LBB3_9:
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s0, 1
s_cselect_b32 vcc_lo, -1, 0
s_cmp_eq_u32 s0, 2
v_cndmask_b32_e32 v12, v0, v1, vcc_lo
s_cselect_b32 vcc_lo, -1, 0
s_cmp_eq_u32 s0, 3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v12, v12, v2, vcc_lo
s_cselect_b32 vcc_lo, -1, 0
s_cmp_eq_u32 s0, 4
v_cndmask_b32_e32 v12, v12, v3, vcc_lo
s_cselect_b32 vcc_lo, -1, 0
s_add_u32 s0, s0, 1
s_addc_u32 s1, s1, 0
s_cmp_eq_u32 s0, 5
v_cndmask_b32_e32 v12, v12, v4, vcc_lo
ds_store_b32 v11, v12
v_add_nc_u32_e32 v11, 4, v11
s_cbranch_scc0 .LBB3_9
s_add_i32 s21, s21, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_eq_u32_e32 vcc_lo, s21, v10
s_or_b32 s20, vcc_lo, s20
s_and_not1_b32 exec_lo, exec_lo, s20
s_cbranch_execnz .LBB3_4
.LBB3_11:
s_or_b32 exec_lo, exec_lo, s19
v_lshrrev_b64 v[0:1], 2, v[6:7]
v_cmp_gt_u64_e32 vcc_lo, 4, v[6:7]
s_add_u32 s6, s6, 0xc80
s_addc_u32 s7, s7, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_dual_mov_b32 v7, v1 :: v_dual_mov_b32 v6, v0
s_or_b32 s5, vcc_lo, s5
s_and_not1_b32 exec_lo, exec_lo, s5
s_cbranch_execnz .LBB3_2
.LBB3_12:
s_or_b32 exec_lo, exec_lo, s18
v_mov_b32_e32 v4, 0
ds_load_2addr_b64 v[0:3], v8 offset0:4 offset1:5
v_mad_i64_i32 v[6:7], null, v5, 48, s[16:17]
ds_store_2addr_b32 v8, v4, v4 offset0:1 offset1:2
ds_load_2addr_b64 v[9:12], v8 offset0:2 offset1:3
ds_load_2addr_b64 v[13:16], v8 offset1:1
s_waitcnt lgkmcnt(3)
global_store_b128 v[6:7], v[0:3], off offset:32
s_waitcnt lgkmcnt(1)
global_store_b128 v[6:7], v[9:12], off offset:16
s_waitcnt lgkmcnt(0)
global_store_b128 v[6:7], v[13:16], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| setup_kernel | 7,935 | 3,054 | stackv2-00000-of-00015 |
// Demangled: GrepKernel(char*, bool*, char*, unsigned int*)
Function : _Z10GrepKernelPcPbS_Pj
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_TID.X &wr=0x1 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans7;
LDC R3, c[0x0][0x370] &wr=0x1 ?trans8;
LDC.64 R4, c[0x0][0x398] &wr=0x3 ?trans1;
IMAD R2, R3, UR6, R2 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R2, 0x4, R4 &req={3} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R4.64+0x8] &req={2} &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R0, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 EXIT &req={0} ?trans5;
LDG.E R7, desc[UR4][R4.64+0x4] &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x390] &wr=0x0 ?trans3;
LDG.E R0, desc[UR4][R4.64] &wr=0x2 ?trans1;
LDCU.64 UR10, c[0x0][0x390] &wr=0x1 ?trans1;
SHF.R.S32.HI R3, RZ, 0x1f, R2 ?trans1;
ISETP.NE.AND P0, PT, R7, R0, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x970 &req={1,0} ?trans5;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans2;
LDG.E.U8 R4, desc[UR4][R4.64] &req={0} &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x9c0 ?trans1;
ISETP.NE.AND P0, PT, R4, 0x5e, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x590 ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans1;
HFMA2 R13, -RZ, RZ, 0, 0 ?trans1;
IADD3 R10, PT, PT, R7, -R0, RZ ?trans2;
PRMT R11, RZ, 0x7610, R11 ?trans1;
MOV R15, RZ ?WAIT7_END_GROUP;
IADD3 R6, PT, PT, R0, R13, RZ ?trans1;
MOV R7, RZ ?WAIT5_END_GROUP;
IADD.64 R8, R6, R4 &req={0} ?WAIT6_END_GROUP;
LDG.E.U8 R14, desc[UR4][R8.64] &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R14, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x970 ?trans5;
SHF.R.S32.HI R9, RZ, 0x1f, R15 ?trans1;
MOV R8, R15 ?WAIT5_END_GROUP;
IADD.64 R8, R8, UR6 ?WAIT6_END_GROUP;
LDG.E.U8 R17, desc[UR4][R8.64] &wr=0x2 ?trans1;
BSSY.RELIABLE B1, 0x550 ?trans1;
MOV R12, R15 ?trans1;
ISETP.NE.AND P0, PT, R14, R17, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x300 ?trans5;
ISETP.NE.AND P0, PT, R15, RZ, PT ?trans1;
LOP3.LUT R16, R11, 0xff, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.EQ.OR P0, PT, R16, 0x1, !P0 ?WAIT5_END_GROUP;
ISETP.EQ.OR P0, PT, R14, 0x2e, P0 ?WAIT13_END_GROUP;
@P0 BRA 0x320 ?trans5;
BRA 0x390 ?trans5;
ISETP.NE.AND P0, PT, R17, 0x2e, PT ?WAIT13_END_GROUP;
@P0 BRA 0x390 ?trans5;
LDG.E.U8 R8, desc[UR4][R8.64+0x1] &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R8, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BREAK.RELIABLE B1 ?trans5;
@!P0 BRA 0x9b0 ?trans5;
HFMA2 R11, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
IADD3 R15, PT, PT, R15, 0x1, RZ ?trans1;
BRA 0x540 ?trans6;
LOP3.LUT R11, R11, 0xff, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R11, 0x1, PT ?trans1;
PRMT R11, RZ, 0x7610, R11 ?WAIT12_END_GROUP;
@P0 BRA 0x540 ?trans5;
ISETP.NE.AND P0, PT, R17, 0x2a, PT ?trans1;
MOV R15, RZ ?WAIT12_END_GROUP;
@!P0 BRA 0x470 ?trans5;
ISETP.NE.AND P0, PT, R17, 0x24, PT ?WAIT13_END_GROUP;
@P0 BRA 0x540 ?trans5;
IADD3 R7, PT, PT, R13, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R7, R10, PT ?WAIT13_END_GROUP;
@!P0 BREAK.RELIABLE B1 ?trans5;
@!P0 BRA 0x9b0 ?trans5;
BRA 0x540 ?trans5;
ISETP.NE.AND P0, PT, R14, 0x20, PT ?trans1;
BSSY.RECONVERGENT B2, 0x540 ?WAIT12_END_GROUP;
@!P0 BRA 0x530 ?trans5;
IADD3 R6, PT, PT, R6, 0x1, RZ ?trans1;
HFMA2 R7, -RZ, RZ, 0, 0 ?trans1;
LDG.E.U8 R9, desc[UR4][R8.64+0x1] &wr=0x2 ?trans4;
IADD.64 R6, R6, R4 ?WAIT7_END_GROUP;
LDG.E.U8 R6, desc[UR4][R6.64] &wr=0x2 ?trans1;
IADD3 R15, PT, PT, R12, 0x1, RZ ?trans1;
MOV R11, 0x1 ?trans1;
ISETP.NE.AND P0, PT, R9, R6, PT &req={2} ?WAIT13_END_GROUP;
@P0 IADD3 R15, PT, PT, R12, RZ, RZ ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
BSYNC.RELIABLE B1 ?trans5;
IADD3 R13, PT, PT, R13, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R13, R10, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1c0 ?trans5;
BRA 0x970 ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans1;
HFMA2 R10, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
IADD3 R14, PT, PT, R7, -R0, RZ ?trans1;
HFMA2 R13, -RZ, RZ, 0, 0 ?trans1;
MOV R11, 0x1 ?WAIT7_END_GROUP;
IADD3 R6, PT, PT, R0, R13, RZ ?trans1;
MOV R7, RZ ?WAIT5_END_GROUP;
IADD.64 R8, R6, R4 &req={0} ?WAIT6_END_GROUP;
LDG.E.U8 R12, desc[UR4][R8.64] &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R12, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x970 ?trans5;
SHF.R.S32.HI R9, RZ, 0x1f, R11 ?trans1;
MOV R8, R11 ?WAIT5_END_GROUP;
IADD.64 R8, R8, UR10 ?WAIT6_END_GROUP;
LDG.E.U8 R15, desc[UR4][R8.64] &wr=0x2 ?trans1;
BSSY.RELIABLE B1, 0x940 ?trans1;
ISETP.NE.AND P0, PT, R12, R15, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x710 ?trans5;
ISETP.NE.AND P0, PT, R11, RZ, PT ?trans1;
LOP3.LUT R16, R10, 0xff, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.EQ.OR P0, PT, R16, 0x1, !P0 ?WAIT5_END_GROUP;
ISETP.EQ.OR P0, PT, R12, 0x2e, P0 ?WAIT13_END_GROUP;
@P0 BRA 0x8d0 ?trans5;
BRA 0x730 ?trans5;
ISETP.NE.AND P0, PT, R15, 0x2e, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x8d0 ?trans5;
LOP3.LUT R10, R10, 0xff, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R10, 0x1, PT ?trans1;
PRMT R10, RZ, 0x7610, R10 ?WAIT12_END_GROUP;
@P0 BRA 0x930 ?trans5;
ISETP.NE.AND P0, PT, R15, 0x24, PT ?WAIT13_END_GROUP;
@P0 BRA 0x7f0 ?trans5;
IADD3 R6, PT, PT, R13, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R6, R14, PT ?WAIT13_END_GROUP;
@!P0 BREAK.RELIABLE B1 ?trans5;
@!P0 BRA 0x9b0 ?trans5;
HFMA2 R11, -RZ, RZ, 0, 0 ?trans1;
BRA 0x930 ?trans6;
ISETP.NE.AND P0, PT, R12, 0x20, PT ?WAIT5_END_GROUP;
ISETP.NE.OR P0, PT, R15, 0x2a, !P0 ?WAIT13_END_GROUP;
@P0 BRA 0x970 ?trans5;
IADD3 R6, PT, PT, R6, 0x1, RZ ?trans1;
MOV R7, RZ ?trans1;
LDG.E.U8 R8, desc[UR4][R8.64+0x1] &wr=0x2 ?trans4;
IADD.64 R6, R6, R4 ?WAIT7_END_GROUP;
LDG.E.U8 R7, desc[UR4][R6.64] &wr=0x2 ?trans1;
IADD3 R12, PT, PT, R11, 0x1, RZ ?trans1;
HFMA2 R10, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
ISETP.NE.AND P0, PT, R8, R7, PT &req={2} ?WAIT13_END_GROUP;
@P0 IADD3 R12, PT, PT, R11, RZ, RZ ?WAIT5_END_GROUP;
MOV R11, R12 ?trans1;
BRA 0x930 ?trans6;
LDG.E.U8 R8, desc[UR4][R8.64+0x1] &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R8, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BREAK.RELIABLE B1 ?trans5;
@!P0 BRA 0x9b0 ?trans5;
HFMA2 R10, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
IADD3 R11, PT, PT, R11, 0x1, RZ ?WAIT7_END_GROUP;
BSYNC.RELIABLE B1 ?trans5;
IADD3 R13, PT, PT, R13, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R13, R14, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x5e0 ?trans5;
LDCU.64 UR8, c[0x0][0x388] &wr=0x0 ?trans2;
IADD.64 R2, R2, UR8 &req={0} ?WAIT6_END_GROUP;
STG.E.U8 desc[UR4][R2.64], RZ ?trans1;
EXIT ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU.64 UR8, c[0x0][0x388] &wr=0x0 ?trans1;
MOV R0, 0x1 ?trans1;
IADD.64 R2, R2, UR8 &req={0} ?WAIT6_END_GROUP;
STG.E.U8 desc[UR4][R2.64], R0 ?trans1;
EXIT ?trans5;
BRA 0xa10;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: GrepKernel(char*, bool*, char*, unsigned int*)
_Z10GrepKernelPcPbS_Pj:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x20
s_load_b256 s[4:11], s[0:1], 0x0
s_mov_b32 s0, exec_lo
s_waitcnt lgkmcnt(0)
v_mad_u64_u32 v[1:2], null, s2, s15, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[3:4], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v3, vcc_lo, s10, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s11, v4, vcc_lo
global_load_b32 v0, v[3:4], off offset:8
s_waitcnt vmcnt(0)
v_cmpx_ne_u32_e32 0, v0
s_cbranch_execz .LBB0_28
global_load_b64 v[3:4], v[3:4], off
v_mov_b32_e32 v8, 0
s_mov_b32 s3, exec_lo
s_waitcnt vmcnt(0)
v_cmpx_ne_u32_e64 v4, v3
s_cbranch_execz .LBB0_27
v_mov_b32_e32 v0, 0
s_mov_b32 s10, 0
s_mov_b32 s11, 0
global_load_u8 v5, v0, s[8:9]
v_sub_nc_u32_e32 v0, v4, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v6, -1, v0
s_waitcnt vmcnt(0)
v_cmp_eq_u16_e64 s16, 0x5e, v5
v_cmp_ne_u16_e32 vcc_lo, 0x5e, v5
v_cndmask_b32_e64 v7, 0, 1, s16
.LBB0_3:
v_dual_mov_b32 v8, 0 :: v_dual_add_nc_u32 v9, s11, v3
s_and_not1_b32 s13, s13, exec_lo
s_or_b32 s12, s12, exec_lo
s_mov_b32 s14, exec_lo
global_load_u8 v10, v9, s[4:5]
s_waitcnt vmcnt(0)
v_cmpx_ne_u16_e32 0, v10
s_cbranch_execz .LBB0_25
v_ashrrev_i32_e32 v5, 31, v7
v_add_co_u32 v4, s0, s8, v7
s_xor_b32 s15, s16, -1
v_mov_b32_e32 v8, 0
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e64 v5, s0, s9, v5, s0
v_cmp_ne_u32_e64 s0, 0, v7
global_load_u8 v11, v[4:5], off
s_and_b32 s0, s15, s0
s_mov_b32 s15, 0
s_waitcnt vmcnt(0)
v_cmp_ne_u16_e64 s1, v10, v11
v_cmp_ne_u16_e64 s2, 46, v11
s_delay_alu instid0(VALU_DEP_2)
s_or_b32 s0, s1, s0
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
s_and_b32 s0, s2, s0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_saveexec_b32 s2, s0
s_xor_b32 s2, exec_lo, s2
s_cbranch_execz .LBB0_20
v_mov_b32_e32 v8, 0
s_mov_b32 s0, -1
s_mov_b32 s17, 0
s_and_saveexec_b32 s15, s16
s_cbranch_execz .LBB0_19
s_mov_b32 s16, 0
s_mov_b32 s18, 0
s_mov_b32 s1, 0
s_mov_b32 s17, exec_lo
v_cmpx_lt_i16_e32 41, v11
s_xor_b32 s17, exec_lo, s17
s_cbranch_execz .LBB0_12
s_mov_b32 s19, -1
s_mov_b32 s18, exec_lo
v_cmpx_eq_u16_e32 42, v11
s_cbranch_execz .LBB0_11
v_cmp_eq_u16_e64 s0, 32, v10
s_mov_b32 s19, 0
s_mov_b32 s20, exec_lo
v_cmpx_ne_u16_e32 32, v10
s_xor_b32 s20, exec_lo, s20
s_cbranch_execz .LBB0_10
v_add_nc_u32_e32 v8, 1, v9
s_mov_b32 s19, exec_lo
global_load_u8 v4, v[4:5], off offset:1
global_load_u8 v5, v8, s[4:5]
v_add_nc_u32_e32 v8, 1, v7
s_waitcnt vmcnt(0)
v_cmp_eq_u16_e64 s1, v4, v5
s_delay_alu instid0(VALU_DEP_1)
v_cndmask_b32_e64 v7, v7, v8, s1
.LBB0_10:
s_or_b32 exec_lo, exec_lo, s20
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 s1, s19, exec_lo
s_or_not1_b32 s19, s0, exec_lo
.LBB0_11:
s_or_b32 exec_lo, exec_lo, s18
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 s1, s1, exec_lo
s_and_b32 s18, s19, exec_lo
.LBB0_12:
s_and_not1_saveexec_b32 s17, s17
v_cmp_ne_u16_e64 s0, 36, v11
s_and_not1_b32 s18, s18, exec_lo
s_mov_b32 s16, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, s0, exec_lo
s_or_b32 s18, s18, s0
s_or_b32 exec_lo, exec_lo, s17
s_mov_b32 s17, s1
s_and_saveexec_b32 s0, s18
s_delay_alu instid0(SALU_CYCLE_1)
s_xor_b32 s0, exec_lo, s0
s_and_not1_b32 s17, s1, exec_lo
s_and_b32 s1, vcc_lo, exec_lo
v_mov_b32_e32 v7, 0
s_or_b32 s1, s17, s1
s_and_not1_b32 s16, s16, exec_lo
s_or_b32 exec_lo, exec_lo, s0
v_mov_b32_e32 v8, 0
s_and_saveexec_b32 s0, s16
s_delay_alu instid0(SALU_CYCLE_1)
s_xor_b32 s16, exec_lo, s0
v_cmp_ne_u32_e64 s0, s11, v6
v_dual_mov_b32 v8, 1 :: v_dual_mov_b32 v7, 0
s_and_not1_b32 s1, s1, exec_lo
s_and_not1_b32 s17, s17, exec_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, s0, exec_lo
s_or_b32 s1, s1, s0
s_or_b32 exec_lo, exec_lo, s16
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 s17, s17, exec_lo
s_or_not1_b32 s0, s1, exec_lo
.LBB0_19:
s_or_b32 exec_lo, exec_lo, s15
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 s1, s17, exec_lo
s_and_b32 s15, s0, exec_lo
.LBB0_20:
s_and_not1_saveexec_b32 s2, s2
s_cbranch_execz .LBB0_22
global_load_u8 v4, v[4:5], off offset:1
v_dual_mov_b32 v8, 1 :: v_dual_add_nc_u32 v7, 1, v7
s_and_not1_b32 s15, s15, exec_lo
s_or_b32 s1, s1, exec_lo
s_waitcnt vmcnt(0)
v_cmp_ne_u16_e64 s0, 0, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, s0, exec_lo
s_or_b32 s15, s15, s0
.LBB0_22:
s_or_b32 exec_lo, exec_lo, s2
s_mov_b32 s0, -1
s_and_saveexec_b32 s16, s15
s_add_i32 s11, s11, 1
v_mov_b32_e32 v8, 0
v_cmp_ge_u32_e64 s0, s11, v0
s_and_b32 s2, s1, exec_lo
s_delay_alu instid0(VALU_DEP_1)
s_or_not1_b32 s0, s0, exec_lo
s_or_b32 exec_lo, exec_lo, s16
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 s1, s13, exec_lo
s_and_b32 s2, s2, exec_lo
s_and_not1_b32 s12, s12, exec_lo
s_and_b32 s0, s0, exec_lo
s_or_b32 s13, s1, s2
s_or_b32 s12, s12, s0
.LBB0_25:
s_or_b32 exec_lo, exec_lo, s14
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, exec_lo, s12
s_or_b32 s10, s0, s10
s_and_not1_b32 s0, s16, exec_lo
s_and_b32 s1, s13, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s16, s0, s1
s_and_not1_b32 exec_lo, exec_lo, s10
s_cbranch_execnz .LBB0_3
s_or_b32 exec_lo, exec_lo, s10
.LBB0_27:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s3
v_add_co_u32 v0, vcc_lo, s6, v1
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v2, vcc_lo
global_store_b8 v[0:1], v8, off
.LBB0_28:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| GrepKernel | 3,802 | 3,098 | stackv2-00000-of-00015 |
// Demangled: hashKernel(char*, int, int*, int*)
Function : _Z10hashKernelPciPiS0_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_TID.X &wr=0x1 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans8;
LDC.64 R2, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R0, R0, UR6, R5 &req={1} ?trans1;
LDCU.64 UR6, c[0x0][0x380] &wr=0x1 ?trans3;
IMAD.WIDE R2, R0, 0x4, R2 &req={3} ?WAIT5_END_GROUP;
LDG.E R6, desc[UR4][R2.64] &req={2} &wr=0x2 ?trans4;
LDG.E R7, desc[UR4][R2.64+0x4] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0xf90 ?trans1;
HFMA2 R4, -RZ, RZ, -1.69277191162109375e-05, -0.005634307861328125 ?trans1;
SHF.R.S32.HI R5, RZ, 0x1f, R0 ?trans1;
ISETP.GE.AND P0, PT, R6, R7, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0xf80 &req={1,0} ?trans5;
IADD3 R2, PT, PT, R6, 0x4, RZ ?trans2;
LOP3.LUT R3, RZ, R6, RZ, 0x33, !PT ?trans1;
BSSY.RECONVERGENT B1, 0x870 ?trans1;
MOV R4, 0x811c9dc5 ?trans1;
VIMNMX.S32 R2, R7, R2, !PT ?WAIT5_END_GROUP;
IADD3 R2, PT, PT, R2, R3, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P1, PT, R2.reuse, 0x3c, PT ?trans1;
LEA.HI R7, R2, 0x1, RZ, 0x1e ?WAIT4_END_GROUP;
LOP3.LUT R26, R7, 0xf, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R26, RZ, PT ?WAIT3_END_GROUP;
@!P1 BRA 0x860 ?trans10;
LOP3.LUT R8, R7, 0x7ffffff0, RZ, 0xc0, !PT ?trans1;
MOV R4, 0x811c9dc5 ?WAIT3_END_GROUP;
IADD3 R8, PT, PT, -R8, RZ, RZ ?WAIT7_END_GROUP;
SHF.R.S32.HI R3, RZ, 0x1f, R6 ?trans1;
MOV R2, R6 ?WAIT5_END_GROUP;
IADD.64 R2, R2, UR6 ?WAIT6_END_GROUP;
LDG.E R23, desc[UR4][R2.64] &wr=0x2 ?trans4;
LDG.E R25, desc[UR4][R2.64+0x4] &wr=0x3 ?trans4;
LDG.E R21, desc[UR4][R2.64+0x8] &wr=0x4 ?trans4;
LDG.E R20, desc[UR4][R2.64+0xc] &wr=0x5 ?trans4;
LDG.E R19, desc[UR4][R2.64+0x10] &wr=0x5 ?trans4;
LDG.E R18, desc[UR4][R2.64+0x14] &wr=0x5 ?trans4;
LDG.E R17, desc[UR4][R2.64+0x18] &wr=0x5 ?trans4;
LDG.E R16, desc[UR4][R2.64+0x1c] &wr=0x5 ?trans4;
LDG.E R15, desc[UR4][R2.64+0x20] &wr=0x5 ?trans4;
LDG.E R14, desc[UR4][R2.64+0x24] &wr=0x5 ?trans4;
LDG.E R13, desc[UR4][R2.64+0x28] &wr=0x5 ?trans4;
LDG.E R12, desc[UR4][R2.64+0x2c] &wr=0x5 ?trans4;
LDG.E R11, desc[UR4][R2.64+0x30] &wr=0x5 ?trans4;
LDG.E R10, desc[UR4][R2.64+0x34] &wr=0x5 ?trans4;
LDG.E R9, desc[UR4][R2.64+0x38] &wr=0x5 ?trans4;
LDG.E R22, desc[UR4][R2.64+0x3c] &rd=0x4 &wr=0x5 ?trans1;
IADD3 R8, PT, PT, R8, 0x10, RZ ?WAIT2_END_GROUP;
IADD3 R6, PT, PT, R6, 0x40, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P1, PT, R8, RZ, PT ?trans1;
IADD3 R4, PT, PT, R23.reuse, R4, RZ &req={2} ?trans1;
VIMNMX.U32 R24, R23, 0x1, !PT ?WAIT3_END_GROUP;
LOP3.LUT R4, R4, R23, RZ, 0x3c, !PT ?trans1;
VIMNMX.U32 R2, R21, 0x1, !PT &req={4} ?WAIT3_END_GROUP;
IADD3 R4, PT, PT, -R23, R4, RZ ?trans1;
IMAD R23, R24, 0x1000193, RZ ?trans2;
IMAD R2, R2, 0x1000193, RZ ?trans2;
IMAD R4, R4, R23, R25 &req={3} ?trans1;
VIMNMX.U32 R23, R25, 0x1, !PT ?trans1;
VIMNMX.U32 R3, R19, 0x1, !PT &req={5} ?WAIT3_END_GROUP;
LOP3.LUT R4, R4, R25, RZ, 0x3c, !PT ?trans1;
IMAD R23, R23, 0x1000193, RZ ?trans2;
IMAD R3, R3, 0x1000193, RZ ?trans1;
IADD3 R4, PT, PT, -R25, R4, RZ ?WAIT5_END_GROUP;
IMAD R4, R4, R23, R21 ?WAIT5_END_GROUP;
LOP3.LUT R4, R4, R21, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
IADD3 R21, PT, PT, -R21, R4, RZ ?WAIT5_END_GROUP;
IMAD R21, R21, R2, R20 ?trans1;
VIMNMX.U32 R2, R20, 0x1, !PT ?WAIT4_END_GROUP;
LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT ?trans1;
IMAD R2, R2, 0x1000193, RZ ?WAIT3_END_GROUP;
IADD3 R20, PT, PT, -R20, R21, RZ ?WAIT5_END_GROUP;
IMAD R2, R20, R2, R19 ?WAIT5_END_GROUP;
LOP3.LUT R2, R2, R19, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
IADD3 R19, PT, PT, -R19, R2, RZ ?trans1;
VIMNMX.U32 R2, R18, 0x1, !PT ?WAIT4_END_GROUP;
IMAD R3, R19, R3, R18 ?trans2;
IMAD R2, R2, 0x1000193, RZ ?WAIT3_END_GROUP;
LOP3.LUT R3, R3, R18, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
IADD3 R18, PT, PT, -R18, R3, RZ ?trans1;
VIMNMX.U32 R3, R17, 0x1, !PT ?WAIT4_END_GROUP;
IMAD R2, R18, R2, R17 ?trans2;
IMAD R3, R3, 0x1000193, RZ ?WAIT3_END_GROUP;
LOP3.LUT R2, R2, R17, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
IADD3 R17, PT, PT, -R17, R2, RZ ?trans1;
VIMNMX.U32 R2, R16, 0x1, !PT ?WAIT4_END_GROUP;
IMAD R3, R17, R3, R16 ?trans2;
IMAD R2, R2, 0x1000193, RZ ?WAIT3_END_GROUP;
LOP3.LUT R3, R3, R16, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
IADD3 R16, PT, PT, -R16, R3, RZ ?trans1;
VIMNMX.U32 R3, R15, 0x1, !PT ?WAIT4_END_GROUP;
IMAD R2, R16, R2, R15 ?trans2;
IMAD R3, R3, 0x1000193, RZ ?WAIT3_END_GROUP;
LOP3.LUT R2, R2, R15, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
IADD3 R15, PT, PT, -R15, R2, RZ ?trans1;
VIMNMX.U32 R2, R14, 0x1, !PT ?WAIT4_END_GROUP;
IMAD R3, R15, R3, R14 ?trans2;
IMAD R2, R2, 0x1000193, RZ ?WAIT3_END_GROUP;
LOP3.LUT R3, R3, R14, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
IADD3 R14, PT, PT, -R14, R3, RZ ?trans1;
VIMNMX.U32 R3, R13, 0x1, !PT ?WAIT4_END_GROUP;
IMAD R2, R14, R2, R13 ?trans2;
IMAD R3, R3, 0x1000193, RZ ?WAIT3_END_GROUP;
LOP3.LUT R2, R2, R13, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
IADD3 R13, PT, PT, -R13, R2, RZ ?trans1;
VIMNMX.U32 R2, R12, 0x1, !PT ?WAIT4_END_GROUP;
IMAD R3, R13, R3, R12 ?trans2;
IMAD R2, R2, 0x1000193, RZ ?WAIT3_END_GROUP;
LOP3.LUT R3, R3, R12, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
IADD3 R12, PT, PT, -R12, R3, RZ ?trans1;
VIMNMX.U32 R3, R11, 0x1, !PT ?WAIT4_END_GROUP;
IMAD R2, R12, R2, R11 ?trans2;
IMAD R3, R3, 0x1000193, RZ ?WAIT3_END_GROUP;
LOP3.LUT R2, R2, R11, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
IADD3 R11, PT, PT, -R11, R2, RZ ?trans1;
VIMNMX.U32 R2, R10, 0x1, !PT ?WAIT4_END_GROUP;
IMAD R3, R11, R3, R10 ?trans2;
IMAD R2, R2, 0x1000193, RZ ?WAIT3_END_GROUP;
LOP3.LUT R3, R3, R10, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
IADD3 R10, PT, PT, -R10, R3, RZ ?trans1;
VIMNMX.U32 R3, R9, 0x1, !PT ?WAIT4_END_GROUP;
IMAD R2, R10, R2, R9 ?trans2;
IMAD R3, R3, 0x1000193, RZ ?WAIT3_END_GROUP;
LOP3.LUT R2, R2, R9, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
IADD3 R9, PT, PT, -R9, R2, RZ ?trans1;
VIMNMX.U32 R2, R22, 0x1, !PT ?WAIT4_END_GROUP;
IMAD R3, R9, R3, R22 ?WAIT5_END_GROUP;
LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
IADD3 R3, PT, PT, -R22, R3, RZ ?WAIT5_END_GROUP;
IMAD R2, R3, R2, RZ ?WAIT4_END_GROUP;
IMAD R4, R2, 0x1000193, RZ ?trans1;
@P1 BRA 0x1e0 ?trans6;
BSYNC.RECONVERGENT B1 ?trans5;
@!P0 BRA 0xf80 ?trans5;
ISETP.GE.U32.AND P0, PT, R26, 0x8, PT ?trans1;
LOP3.LUT R17, R7, 0x7, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B1, 0xc40 ?trans4;
ISETP.NE.AND P1, PT, R17, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0xc30 ?trans6;
LDCU.64 UR8, c[0x0][0x380] &wr=0x0 ?trans1;
SHF.R.S32.HI R3, RZ, 0x1f, R6 ?trans1;
MOV R2, R6 ?WAIT5_END_GROUP;
IADD.64 R10, R2, UR8 &req={0} ?WAIT6_END_GROUP;
LDG.E R13, desc[UR4][R10.64] &wr=0x2 ?trans4;
LDG.E R14, desc[UR4][R10.64+0x4] &wr=0x3 ?trans4;
LDG.E R15, desc[UR4][R10.64+0x8] &wr=0x4 ?trans4;
LDG.E R16, desc[UR4][R10.64+0xc] &wr=0x5 ?trans4;
LDG.E R8, desc[UR4][R10.64+0x10] &wr=0x5 ?trans4;
LDG.E R3, desc[UR4][R10.64+0x14] &wr=0x5 ?trans4;
LDG.E R2, desc[UR4][R10.64+0x18] &wr=0x5 ?trans4;
LDG.E R9, desc[UR4][R10.64+0x1c] &rd=0x4 &wr=0x5 ?trans1;
IADD3 R6, PT, PT, R6, 0x20, RZ ?WAIT2_END_GROUP;
IADD3 R4, PT, PT, R4, R13, RZ &req={2} ?trans1;
VIMNMX.U32 R12, R13, 0x1, !PT ?WAIT3_END_GROUP;
LOP3.LUT R4, R4, R13, RZ, 0x3c, !PT ?trans1;
VIMNMX.U32 R10, R15, 0x1, !PT &req={4} ?WAIT3_END_GROUP;
IADD3 R4, PT, PT, -R13, R4, RZ ?trans1;
IMAD R13, R12, 0x1000193, RZ ?trans2;
IMAD R11, R10, 0x1000193, RZ ?trans2;
IMAD R13, R4, R13, R14 &req={3} ?trans1;
VIMNMX.U32 R4, R14, 0x1, !PT ?WAIT4_END_GROUP;
LOP3.LUT R13, R13, R14, RZ, 0x3c, !PT ?trans1;
IMAD R4, R4, 0x1000193, RZ ?WAIT3_END_GROUP;
IADD3 R13, PT, PT, -R14, R13, RZ ?WAIT5_END_GROUP;
IMAD R4, R13, R4, R15 ?WAIT5_END_GROUP;
LOP3.LUT R4, R4, R15, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
IADD3 R4, PT, PT, -R15, R4, RZ ?WAIT5_END_GROUP;
IMAD R11, R4, R11, R16 &req={5} ?trans1;
VIMNMX.U32 R4, R16, 0x1, !PT ?WAIT4_END_GROUP;
LOP3.LUT R11, R11, R16, RZ, 0x3c, !PT ?trans1;
IMAD R4, R4, 0x1000193, RZ ?WAIT3_END_GROUP;
IADD3 R11, PT, PT, -R16, R11, RZ ?WAIT5_END_GROUP;
IMAD R11, R11, R4, R8 ?trans1;
VIMNMX.U32 R4, R8, 0x1, !PT ?WAIT4_END_GROUP;
LOP3.LUT R11, R11, R8, RZ, 0x3c, !PT ?trans1;
IMAD R4, R4, 0x1000193, RZ ?WAIT3_END_GROUP;
IADD3 R8, PT, PT, -R8, R11, RZ ?WAIT5_END_GROUP;
IMAD R4, R8, R4, R3 ?trans1;
VIMNMX.U32 R8, R3, 0x1, !PT ?WAIT4_END_GROUP;
LOP3.LUT R4, R4, R3, RZ, 0x3c, !PT ?trans1;
IMAD R8, R8, 0x1000193, RZ ?WAIT3_END_GROUP;
IADD3 R3, PT, PT, -R3, R4, RZ ?trans1;
VIMNMX.U32 R4, R2, 0x1, !PT ?WAIT4_END_GROUP;
IMAD R3, R3, R8, R2 ?trans2;
IMAD R4, R4, 0x1000193, RZ ?WAIT3_END_GROUP;
LOP3.LUT R3, R3, R2, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
IADD3 R2, PT, PT, -R2, R3, RZ ?trans1;
VIMNMX.U32 R3, R9, 0x1, !PT ?WAIT4_END_GROUP;
IMAD R2, R2, R4, R9 ?WAIT5_END_GROUP;
LOP3.LUT R2, R2, R9, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
IADD3 R2, PT, PT, -R9, R2, RZ ?WAIT5_END_GROUP;
IMAD R2, R2, R3, RZ ?WAIT4_END_GROUP;
IMAD R4, R2, 0x1000193, RZ ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
@!P1 BRA 0xf80 ?trans5;
ISETP.GE.U32.AND P0, PT, R17, 0x4, PT ?trans1;
LOP3.LUT R8, R7, 0x3, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B1, 0xe80 ?trans4;
ISETP.NE.AND P1, PT, R8, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0xe70 ?trans6;
LDCU.64 UR8, c[0x0][0x380] &wr=0x0 ?trans1;
SHF.R.S32.HI R7, RZ, 0x1f, R6 ?WAIT5_END_GROUP;
IADD.64 R2, R6, UR8 &req={0} ?WAIT6_END_GROUP;
LDG.E R7, desc[UR4][R2.64] &wr=0x2 ?trans4;
LDG.E R10, desc[UR4][R2.64+0x4] &wr=0x3 ?trans4;
LDG.E R11, desc[UR4][R2.64+0x8] &wr=0x4 ?trans4;
LDG.E R12, desc[UR4][R2.64+0xc] &rd=0x4 &wr=0x5 ?trans1;
IADD3 R6, PT, PT, R6, 0x10, RZ ?WAIT2_END_GROUP;
IADD3 R4, PT, PT, R4, R7, RZ &req={2} ?trans1;
VIMNMX.U32 R9, R7, 0x1, !PT ?WAIT3_END_GROUP;
LOP3.LUT R4, R4, R7, RZ, 0x3c, !PT ?trans2;
IMAD R9, R9, 0x1000193, RZ ?trans1;
VIMNMX.U32 R2, R11, 0x1, !PT &req={4} ?trans1;
IADD3 R4, PT, PT, -R7, R4, RZ ?WAIT4_END_GROUP;
IMAD R3, R2, 0x1000193, RZ ?trans2;
IMAD R9, R4, R9, R10 &req={3} ?trans1;
VIMNMX.U32 R4, R10, 0x1, !PT ?WAIT4_END_GROUP;
LOP3.LUT R9, R9, R10, RZ, 0x3c, !PT ?trans1;
IMAD R4, R4, 0x1000193, RZ ?WAIT3_END_GROUP;
IADD3 R9, PT, PT, -R10, R9, RZ ?WAIT5_END_GROUP;
IMAD R4, R9, R4, R11 ?WAIT5_END_GROUP;
LOP3.LUT R4, R4, R11, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
IADD3 R4, PT, PT, -R11, R4, RZ ?WAIT5_END_GROUP;
IMAD R3, R4, R3, R12 &req={5} ?trans1;
VIMNMX.U32 R4, R12, 0x1, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, R12, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
IADD3 R3, PT, PT, -R12, R3, RZ ?WAIT5_END_GROUP;
IMAD R4, R3, R4, RZ ?WAIT4_END_GROUP;
IMAD R4, R4, 0x1000193, RZ ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
@!P1 BRA 0xf80 ?trans5;
IADD3 R8, PT, PT, -R8, RZ, RZ ?WAIT7_END_GROUP;
LDCU.64 UR8, c[0x0][0x380] &wr=0x0 ?trans1;
SHF.R.S32.HI R7, RZ, 0x1f, R6 ?WAIT5_END_GROUP;
IADD.64 R2, R6, UR8 &req={0} ?WAIT7_END_GROUP;
LDG.E R3, desc[UR4][R2.64] &wr=0x2 ?trans1;
IADD3 R8, PT, PT, R8, 0x1, RZ ?trans2;
IADD3 R6, PT, PT, R6, 0x4, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R8, RZ, PT ?trans1;
IADD3 R4, PT, PT, R3.reuse, R4, RZ &req={2} ?trans1;
VIMNMX.U32 R7, R3, 0x1, !PT ?WAIT3_END_GROUP;
LOP3.LUT R4, R4, R3, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
IADD3 R4, PT, PT, -R3, R4, RZ ?WAIT5_END_GROUP;
IMAD R4, R4, R7, RZ ?WAIT4_END_GROUP;
IMAD R4, R4, 0x1000193, RZ ?trans1;
@P0 BRA 0xea0 ?trans6;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU.64 UR8, c[0x0][0x398] &wr=0x0 ?trans2;
LEA R2, P0, R0, UR8, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R3, R0, UR9, R5, 0x2, P0 ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R4 ?trans1;
EXIT ?trans5;
BRA 0xfe0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: hashKernel(char*, int, int*, int*)
_Z10hashKernelPciPiS0_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b128 s[4:7], s[0:1], 0x10
v_mov_b32_e32 v4, 0x811c9dc5
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
global_load_b64 v[2:3], v[2:3], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e64 v2, v3
s_cbranch_execz .LBB0_4
s_load_b64 s[0:1], s[0:1], 0x0
v_mov_b32_e32 v4, 0x811c9dc5
s_mov_b32 s3, 0
.LBB0_2:
v_ashrrev_i32_e32 v6, 31, v2
s_waitcnt lgkmcnt(0)
v_add_co_u32 v5, vcc_lo, s0, v2
v_add_nc_u32_e32 v2, 4, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
v_cmp_ge_i32_e32 vcc_lo, v2, v3
global_load_b32 v5, v[5:6], off
s_or_b32 s3, vcc_lo, s3
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v4, v5, v4
v_max_u32_e32 v6, 1, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v4, v4, v5
v_sub_nc_u32_e32 v4, v4, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v4, v6, v4
v_mul_lo_u32 v4, 0x1000193, v4
s_and_not1_b32 exec_lo, exec_lo, s3
s_cbranch_execnz .LBB0_2
s_or_b32 exec_lo, exec_lo, s3
.LBB0_4:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s2
v_add_co_u32 v0, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
global_store_b32 v[0:1], v4, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| hashKernel | 6,732 | 962 | stackv2-00000-of-00015 |
// Demangled: backprop_mean_pool(float*, float*, int*, int*, int, int)
Function : _Z18backprop_mean_poolPfS_PiS0_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans8;
LDC R0, c[0x0][0x3a0] &wr=0x1 ?trans2;
ISETP.LE.AND P0, PT, R0, UR6, PT &req={1} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
S2R R4, SR_TID.X &wr=0x0 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
MOV R6, UR6 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x2 ?trans5;
LDC R5, c[0x0][0x370] &wr=0x3 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?WAIT6_END_GROUP;
LEA R7, R4, UR4, 0x2 &req={2,0} ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x390] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x3a0] &wr=0x1 ?trans7;
LDC.64 R10, c[0x0][0x398] &wr=0x2 ?trans8;
LDC.64 R12, c[0x0][0x380] &wr=0x4 ?trans1;
IMAD.WIDE R2, R6, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR8][R2.64] &req={3} &wr=0x3 ?trans1;
IMAD.WIDE R10, R6, 0x4, R10 &req={2} ?WAIT6_END_GROUP;
LDG.E R11, desc[UR8][R10.64] &wr=0x3 ?trans1;
IMAD R9, R6, UR5, R4 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R12, R9, 0x4, R12 &req={4} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR8][R12.64] &req={5} &rd=0x0 &wr=0x5 ?trans1;
IADD3 R6, PT, PT, R5, R6, RZ ?trans1;
BSSY.RECONVERGENT B0, 0x350 ?trans4;
ISETP.GE.AND P2, PT, R6, UR4, PT ?trans1;
IADD3 R8, PT, PT, R2, R11, RZ &req={3} ?trans1;
IMAD R9, R11, UR5, R4 ?WAIT4_END_GROUP;
IMAD R8, R8, UR5, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R9, R8, PT ?WAIT13_END_GROUP;
@P0 BRA 0x340 &req={0} ?trans5;
I2FP.F32.S32 R11, R2 ?trans1;
BSSY.RECONVERGENT B1, 0x2d0 ?trans3;
MUFU.RCP R2, R11 &wr=0x0 ?trans1;
FCHK P0, R0, R11 &req={5} &wr=0x1 ?trans1;
FFMA R3, -R11, R2, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R3, R2, R3, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R3, RZ ?WAIT4_END_GROUP;
FFMA R10, -R11, R2, R0 ?WAIT4_END_GROUP;
FFMA R13, R3, R10, R2 ?trans1;
@!P0 BRA 0x2c0 &req={1} ?trans6;
MOV R10, 0x2c0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x380 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
LDC R12, c[0x0][0x3a4] &wr=0x0 ?trans8;
LDC.64 R10, c[0x0][0x388] &wr=0x1 ?trans2;
IMAD.WIDE R2, R9.reuse, 0x4, R10 &req={1} ?trans1;
IADD3 R9, PT, PT, R9, R12, RZ &req={0} ?WAIT4_END_GROUP;
STG.E desc[UR8][R2.64], R13 &rd=0x2 ?trans1;
ISETP.GE.AND P0, PT, R9, R8, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x2f0 &req={2} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
@!P2 BRA 0xd0 ?trans5;
STS [R7], R0 &req={5} ?trans1;
EXIT ?trans5;
SHF.R.U32.HI R3, RZ, 0x17, R11 ?trans1;
BSSY.RECONVERGENT B2, 0x9e0 ?trans1;
SHF.R.U32.HI R2, RZ, 0x17, R0 ?trans2;
LOP3.LUT R18, R3, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R15, R2, 0xff, RZ, 0xc0, !PT ?trans1;
MOV R2, R0 ?trans1;
IADD3 R14, PT, PT, R18, -0x1, RZ ?trans2;
IADD3 R13, PT, PT, R15, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R14, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R13, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R12, RZ ?trans1;
@!P0 BRA 0x5c0 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R11|, +INF , PT ?trans1;
MOV R3, R11 ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0x9c0 ?trans5;
LOP3.LUT P0, RZ, R11, 0x7fffffff, R2, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x9a0 ?trans5;
FSETP.NEU.FTZ.AND P3, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P1 BRA !P3, 0x9a0 ?trans5;
LOP3.LUT P3, RZ, R2, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P1, P3, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0x980 ?trans5;
LOP3.LUT P1, RZ, R11, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x950 ?trans5;
ISETP.GE.AND P0, PT, R13, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R14, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R12, RZ ?trans1;
@!P0 MOV R12, 0xffffffc0 ?trans1;
@!P0 FFMA R2, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R11, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R12, PT, PT, R12, 0x40, RZ ?WAIT7_END_GROUP;
LEA R14, R18, 0xc0800000, 0x17 ?trans1;
BSSY.RECONVERGENT B3, 0x940 ?trans1;
IADD3 R3, PT, PT, R15, -0x7f, RZ ?trans2;
IADD3 R14, PT, PT, -R14, R11, RZ ?WAIT3_END_GROUP;
IMAD R2, R3.reuse, -0x800000, R2 ?trans1;
IADD3 R3, PT, PT, R3, 0x7f, -R18 ?trans1;
MUFU.RCP R11, R14 &wr=0x0 ?trans1;
FADD.FTZ R13, -R14, -RZ ?trans2;
IADD3 R3, PT, PT, R3, R12, RZ ?trans2;
FFMA R16, R11, R13, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R20, R11, R16, R11 ?WAIT4_END_GROUP;
FFMA R11, R2, R20, RZ ?WAIT4_END_GROUP;
FFMA R16, R13, R11, R2 ?WAIT4_END_GROUP;
FFMA R15, R20, R16, R11 ?WAIT4_END_GROUP;
FFMA R16, R13, R15, R2 ?WAIT4_END_GROUP;
FFMA R11, R20, R16, R15 ?WAIT5_END_GROUP;
SHF.R.U32.HI R2, RZ, 0x17, R11 ?WAIT4_END_GROUP;
LOP3.LUT R2, R2, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R14, PT, PT, R2, R3, RZ ?WAIT4_END_GROUP;
IADD3 R2, PT, PT, R14, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R2, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x920 ?trans5;
ISETP.GT.AND P0, PT, R14, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x8f0 ?trans5;
ISETP.GE.AND P0, PT, R14, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x930 ?trans5;
ISETP.GE.AND P0, PT, R14, -0x18, PT ?trans1;
LOP3.LUT R11, R11, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x930 ?trans5;
FFMA.RZ R2, R20, R16.reuse, R15.reuse ?trans1;
IADD3 R13, PT, PT, R14, 0x20, RZ ?trans1;
FFMA.RM R3, R20, R16.reuse, R15.reuse ?trans1;
ISETP.NE.AND P1, PT, R14.reuse, RZ, PT ?trans1;
ISETP.NE.AND P3, PT, R14, RZ, PT ?trans1;
LOP3.LUT R2, R2, 0x7fffff, RZ, 0xc0, !PT ?trans2;
IADD3 R14, PT, PT, -R14, RZ, RZ ?trans2;
LOP3.LUT R12, R2, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R2, R20, R16, R15 ?WAIT3_END_GROUP;
SHF.L.U32 R13, R12, R13, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R2, R3, PT ?trans1;
SEL R3, R14, RZ, P3 ?trans2;
ISETP.NE.AND P1, PT, R13, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R3, RZ, R3, R12 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R13, RZ, 0x1, R3 ?WAIT3_END_GROUP;
SEL R2, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R2, R2, 0x1, R13, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R2, R2, R3, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R2, PT, PT, R13, R2, RZ ?WAIT4_END_GROUP;
LOP3.LUT R11, R2, R11, RZ, 0xfc, !PT ?trans1;
BRA 0x930 ?trans6;
LOP3.LUT R11, R11, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R11, R11, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x930 ?trans6;
IMAD R11, R3, 0x800000, R11 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B3 ?trans5;
BRA 0x9d0 ?trans5;
LOP3.LUT R11, R11, 0x80000000, R2, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R11, R11, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x9d0 ?trans6;
LOP3.LUT R11, R11, 0x80000000, R2, 0x48, !PT ?trans1;
BRA 0x9d0 ?trans6;
MUFU.RSQ R11, -QNAN &wr=0x0 ?trans1;
BRA 0x9d0 ?trans5;
FADD.FTZ R11, R0, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
MOV R13, R11 &req={0} ?trans1;
HFMA2 R11, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R10 0x0 ?trans5;
BRA 0xa10;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: backprop_mean_pool(float*, float*, int*, int*, int, int)
_Z18backprop_mean_poolPfS_PiS0_ii:
s_load_b64 s[12:13], s[0:1], 0x20
s_waitcnt lgkmcnt(0)
s_cmp_ge_i32 s15, s12
s_cbranch_scc1 .LBB0_6
s_clause 0x1
s_load_b256 s[4:11], s[0:1], 0x0
s_load_b32 s1, s[0:1], 0x28
v_mov_b32_e32 v4, 0
s_mov_b32 s2, s15
s_ashr_i32 s15, s13, 31
s_mov_b32 s14, s13
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[14:15], s[14:15], 2
.LBB0_2:
s_ashr_i32 s3, s2, 31
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[16:17], s[2:3], 2
s_waitcnt lgkmcnt(0)
s_add_u32 s18, s8, s16
s_addc_u32 s19, s9, s17
s_add_u32 s16, s10, s16
s_addc_u32 s17, s11, s17
s_load_b32 s3, s[16:17], 0x0
s_load_b32 s0, s[18:19], 0x0
s_mov_b32 s16, exec_lo
s_waitcnt lgkmcnt(0)
v_mad_u64_u32 v[1:2], null, s3, s13, v[0:1]
s_add_i32 s3, s3, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_mul_i32 s3, s3, s13
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_5
v_mad_u64_u32 v[2:3], null, s2, s13, v[0:1]
v_mov_b32_e32 v3, v4
v_cvt_f32_i32_e32 v6, s0
s_mov_b32 s17, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[2:3]
v_add_co_u32 v2, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
global_load_b32 v5, v[2:3], off
s_waitcnt vmcnt(0)
v_div_scale_f32 v2, null, v6, v6, v5
v_div_scale_f32 v8, vcc_lo, v5, v6, v5
v_rcp_f32_e32 v3, v2
s_waitcnt_depctr 0xfff
v_fma_f32 v7, -v2, v3, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v3, v7, v3
v_mul_f32_e32 v7, v8, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v9, -v2, v7, v8
v_fmac_f32_e32 v7, v9, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_fma_f32 v8, -v2, v7, v8
v_ashrrev_i32_e32 v2, 31, v1
v_div_fmas_f32 v7, v8, v3, v7
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_div_fixup_f32 v5, v7, v6, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v2, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
.LBB0_4:
v_add_nc_u32_e32 v1, s13, v1
global_store_b32 v[2:3], v5, off
v_add_co_u32 v2, s0, v2, s14
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_add_co_ci_u32_e64 v3, s0, s15, v3, s0
v_cmp_le_i32_e32 vcc_lo, s3, v1
s_or_b32 s17, vcc_lo, s17
s_and_not1_b32 exec_lo, exec_lo, s17
s_cbranch_execnz .LBB0_4
.LBB0_5:
s_or_b32 exec_lo, exec_lo, s16
s_add_i32 s2, s1, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_ge_i32 s2, s12
s_cbranch_scc0 .LBB0_2
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| backprop_mean_pool | 4,016 | 1,560 | stackv2-00000-of-00015 |
// Demangled: KrnlDmmyCalc(float*, float*, float*)
Function : _Z12KrnlDmmyCalcPfS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R0, SR_TID.X &wr=0x0 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC R9, c[0x0][0x360] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans8;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD R9, R9, UR6, R0 &req={0} ?WAIT7_END_GROUP;
LDC.64 R6, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD.WIDE R2, R9, 0x4, R2 &req={2} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
IMAD.WIDE R4, R9, 0x4, R4 &req={3} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE R6, R9, 0x4, R6 &req={0} ?WAIT4_END_GROUP;
FADD R9, R2, R5 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x110;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: KrnlDmmyCalc(float*, float*, float*)
_Z12KrnlDmmyCalcPfS_S_:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| KrnlDmmyCalc | 500 | 501 | stackv2-00000-of-00015 |
// Demangled: KrnlDmmyInit(float*, float*, float*)
Function : _Z12KrnlDmmyInitPfS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R0, SR_TID.X &wr=0x0 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC R7, c[0x0][0x360] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans8;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD R7, R7, UR6, R0 &req={0} ?WAIT5_END_GROUP;
IADD3 R0, PT, PT, R7.reuse, 0x1, RZ ?trans1;
IMAD.WIDE R2, R7, 0x4, R2 &req={2} ?WAIT3_END_GROUP;
I2FP.F32.S32 R9, R0 ?trans1;
IMAD.WIDE R4, R7, 0x4, R4 &req={3} ?trans1;
I2FP.F32.S32 R7, R7 ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R7 &req={1} ?trans4;
STG.E desc[UR4][R4.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x100;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: KrnlDmmyInit(float*, float*, float*)
_Z12KrnlDmmyInitPfS_S_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b128 s[0:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
v_add_nc_u32_e32 v0, 1, v1
v_cvt_f32_i32_e32 v4, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_cvt_f32_i32_e32 v5, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v0, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v3, vcc_lo
v_add_co_u32 v2, vcc_lo, s2, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
global_store_b32 v[0:1], v4, off
global_store_b32 v[2:3], v5, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| KrnlDmmyInit | 451 | 463 | stackv2-00000-of-00015 |
// Demangled: count_sort(int*, int*, int)
Function : _Z10count_sortPiS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x370] &wr=0x2 ?trans7;
LDC R2, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R3, R0, UR4, R3 &req={1} ?WAIT2_END_GROUP;
IMAD R0, R0, UR5, RZ &req={2} ?WAIT3_END_GROUP;
ISETP.GE.AND P0, PT, R3, R2, PT &req={3} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
ISETP.GT.AND P0, PT, R2, RZ, PT ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?WAIT12_END_GROUP;
@P0 BRA 0x160 ?trans5;
LDC.64 R8, c[0x0][0x380] &wr=0x1 ?trans8;
LDC.64 R6, c[0x0][0x388] &wr=0x2 ?trans2;
IMAD.WIDE R4, R3, 0x4, R8 &req={3,1} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &req={0} &wr=0x3 ?trans1;
IADD3 R3, PT, PT, R0, R3, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R3, R2, PT ?trans1;
STG.E desc[UR4][R6.64], R5 &req={3,2} &rd=0x3 ?WAIT12_END_GROUP;
@!P0 BRA 0xf0 ?trans5;
EXIT ?trans5;
LOP3.LUT R12, R2.reuse, 0x7, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R16, R2.reuse, 0x3, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R2, R2, 0x7ffffff8, RZ, 0xc0, !PT ?trans2;
IADD3 R4, PT, PT, R12, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P1, PT, R4, 0x3, PT ?WAIT13_END_GROUP;
LDCU.64 UR6, c[0x0][0x380] &req={1} &wr=0x1 ?trans1;
LDC R7, c[0x0][0x390] &wr=0x2 ?trans1;
MOV.64 R4, UR6 &req={1} ?WAIT6_END_GROUP;
IMAD.WIDE R10, R3, 0x4, R4 ?WAIT5_END_GROUP;
LDG.E R6, desc[UR4][R10.64] &req={0} &rd=0x0 &wr=0x5 ?trans1;
ISETP.GE.U32.AND P0, PT, R7, 0x8, PT &req={2} ?trans1;
HFMA2 R8, -RZ, RZ, 0, 0 ?trans1;
MOV R7, RZ ?WAIT11_END_GROUP;
@!P0 BRA 0x830 &req={0} ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans1;
MOV R8, RZ ?trans1;
MOV R7, RZ ?WAIT7_END_GROUP;
IMAD.WIDE.U32 R14, R7, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
LDG.E R17, desc[UR4][R14.64] &wr=0x2 ?trans4;
LDG.E R19, desc[UR4][R14.64+0x4] &wr=0x3 ?trans4;
LDG.E R21, desc[UR4][R14.64+0x8] &wr=0x4 ?trans4;
LDG.E R23, desc[UR4][R14.64+0xc] &wr=0x3 ?trans4;
LDG.E R25, desc[UR4][R14.64+0x10] &wr=0x3 ?trans4;
LDG.E R13, desc[UR4][R14.64+0x14] &wr=0x3 ?trans4;
LDG.E R11, desc[UR4][R14.64+0x18] &wr=0x3 ?trans4;
LDG.E R9, desc[UR4][R14.64+0x1c] &rd=0x0 &wr=0x4 ?trans1;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?trans1;
ISETP.GE.AND P3, PT, R17, R6, PT &req={5,2} ?WAIT13_END_GROUP;
@P3 ISETP.NE.AND P2, PT, R17, R6, PT ?trans1;
IADD3 R17, PT, PT, R8, 0x1, RZ ?WAIT4_END_GROUP;
@P3 ISETP.LT.AND P2, PT, R7, R3, !P2 ?trans1;
@P3 MOV R10, R17 ?WAIT4_END_GROUP;
@P3 PLOP3.LUT P0, PT, P2, PT, PT, 0x80, 0x8 ?trans1;
ISETP.GE.AND P2, PT, R19, R6, PT &req={3} ?WAIT12_END_GROUP;
@!P0 IADD3 R10, PT, PT, R8, RZ, RZ ?trans2;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?trans1;
@P2 ISETP.NE.AND P4, PT, R19, R6.reuse, PT ?trans1;
@P2 IADD3 R8, PT, PT, R7, 0x1, RZ ?trans1;
@!P3 MOV R10, R17 ?trans1;
ISETP.GE.AND P3, PT, R21, R6, PT &req={4} ?WAIT3_END_GROUP;
@P2 ISETP.LT.AND P4, PT, R8, R3, !P4 ?trans1;
IADD3 R14, PT, PT, R10, 0x1, RZ &req={0} ?WAIT4_END_GROUP;
@P2 PLOP3.LUT P0, PT, P4, PT, PT, 0x80, 0x8 ?trans1;
@P2 MOV R8, R14 ?WAIT4_END_GROUP;
@P3 ISETP.NE.AND P4, PT, R21, R6, PT ?WAIT8_END_GROUP;
@!P0 IADD3 R8, PT, PT, R10, RZ, RZ ?trans2;
@P3 IADD3 R10, PT, PT, R7, 0x2, RZ ?trans2;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?trans1;
@!P2 MOV R8, R14 ?trans1;
ISETP.GE.AND P2, PT, R23, R6, PT ?trans1;
@P3 ISETP.LT.AND P4, PT, R10, R3, !P4 ?WAIT3_END_GROUP;
IADD3 R14, PT, PT, R8, 0x1, RZ ?trans2;
@P3 PLOP3.LUT P0, PT, P4, PT, PT, 0x80, 0x8 ?WAIT3_END_GROUP;
@P3 MOV R10, R14 ?WAIT4_END_GROUP;
@P2 ISETP.NE.AND P4, PT, R23, R6, PT ?WAIT6_END_GROUP;
@!P0 IADD3 R10, PT, PT, R8, RZ, RZ ?trans2;
@P2 IADD3 R8, PT, PT, R7, 0x3, RZ ?trans2;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?trans1;
@!P3 MOV R10, R14 ?trans1;
ISETP.GE.AND P3, PT, R25, R6, PT ?trans1;
@P2 ISETP.LT.AND P4, PT, R8, R3, !P4 ?WAIT3_END_GROUP;
IADD3 R14, PT, PT, R10, 0x1, RZ ?trans2;
@P2 PLOP3.LUT P0, PT, P4, PT, PT, 0x80, 0x8 ?WAIT3_END_GROUP;
@P2 MOV R8, R14 ?WAIT4_END_GROUP;
@P3 ISETP.NE.AND P4, PT, R25, R6, PT ?WAIT6_END_GROUP;
@!P0 IADD3 R8, PT, PT, R10, RZ, RZ ?trans2;
@P3 IADD3 R10, PT, PT, R7, 0x4, RZ ?trans2;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?trans1;
@!P2 MOV R8, R14 ?trans1;
ISETP.GE.AND P2, PT, R13, R6, PT ?trans1;
@P3 ISETP.LT.AND P4, PT, R10, R3, !P4 ?WAIT3_END_GROUP;
IADD3 R14, PT, PT, R8, 0x1, RZ ?trans2;
@P3 PLOP3.LUT P0, PT, P4, PT, PT, 0x80, 0x8 ?WAIT3_END_GROUP;
@P3 MOV R10, R14 ?WAIT4_END_GROUP;
@P2 ISETP.NE.AND P4, PT, R13, R6, PT ?WAIT6_END_GROUP;
@!P0 IADD3 R10, PT, PT, R8, RZ, RZ ?trans2;
@P2 IADD3 R8, PT, PT, R7, 0x5, RZ ?trans2;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?trans1;
@!P3 MOV R10, R14 ?trans1;
ISETP.GE.AND P3, PT, R11, R6, PT ?trans1;
@P2 ISETP.LT.AND P4, PT, R8, R3, !P4 ?WAIT3_END_GROUP;
IADD3 R13, PT, PT, R10, 0x1, RZ ?trans2;
@P2 PLOP3.LUT P0, PT, P4, PT, PT, 0x80, 0x8 ?WAIT3_END_GROUP;
@P2 MOV R8, R13 ?WAIT4_END_GROUP;
@P3 ISETP.NE.AND P4, PT, R11, R6, PT ?WAIT6_END_GROUP;
@!P0 IADD3 R8, PT, PT, R10, RZ, RZ ?trans2;
@P3 IADD3 R10, PT, PT, R7, 0x6, RZ ?trans2;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?trans1;
@!P2 MOV R8, R13 ?trans1;
ISETP.GE.AND P2, PT, R9, R6, PT ?trans1;
@P3 ISETP.LT.AND P4, PT, R10, R3, !P4 ?WAIT3_END_GROUP;
IADD3 R11, PT, PT, R8, 0x1, RZ ?trans2;
@P3 PLOP3.LUT P0, PT, P4, PT, PT, 0x80, 0x8 ?WAIT3_END_GROUP;
@P3 MOV R10, R11 ?WAIT4_END_GROUP;
@P2 ISETP.NE.AND P4, PT, R9, R6, PT ?WAIT6_END_GROUP;
@!P0 IADD3 R10, PT, PT, R8, RZ, RZ ?trans2;
@P2 IADD3 R8, PT, PT, R7.reuse, 0x7, RZ ?trans2;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?trans1;
@!P3 MOV R10, R11 ?trans1;
IADD3 R7, PT, PT, R7, 0x8, RZ ?trans1;
@P2 ISETP.LT.AND P4, PT, R8, R3, !P4 ?WAIT3_END_GROUP;
IADD3 R9, PT, PT, R10, 0x1, RZ ?trans2;
@P2 PLOP3.LUT P0, PT, P4, PT, PT, 0x80, 0x8 ?WAIT3_END_GROUP;
@P2 MOV R8, R9 ?WAIT10_END_GROUP;
@!P0 IADD3 R8, PT, PT, R10, RZ, RZ ?trans1;
ISETP.NE.AND P0, PT, R7, R2, PT ?trans1;
@!P2 MOV R8, R9 ?WAIT12_END_GROUP;
@P0 BRA 0x270 ?trans5;
MOV R7, R2 ?WAIT7_END_GROUP;
ISETP.NE.AND P0, PT, R12, RZ, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xdc0 ?trans5;
ISETP.NE.AND P2, PT, R16, RZ, PT ?trans1;
@!P1 BRA 0xb40 ?WAIT12_END_GROUP;
IMAD.WIDE.U32 R10, R7, 0x4, R4 ?WAIT5_END_GROUP;
LDG.E R9, desc[UR4][R10.64] &wr=0x2 ?trans4;
LDG.E R15, desc[UR4][R10.64+0x4] &wr=0x3 ?trans4;
LDG.E R17, desc[UR4][R10.64+0x8] &wr=0x4 ?trans4;
LDG.E R19, desc[UR4][R10.64+0xc] &rd=0x0 &wr=0x3 ?trans1;
PLOP3.LUT P3, PT, PT, PT, PT, 0x80, 0x8 ?WAIT2_END_GROUP;
IADD3 R13, PT, PT, R8, 0x1, RZ ?trans1;
ISETP.GE.AND P0, PT, R9, R6, PT &req={5,2} ?WAIT13_END_GROUP;
@P0 ISETP.NE.AND P4, PT, R9, R6, PT ?trans1;
@P0 MOV R9, R13 ?WAIT4_END_GROUP;
@P0 ISETP.LT.AND P4, PT, R7, R3, !P4 ?WAIT5_END_GROUP;
@P0 PLOP3.LUT P3, PT, P4, PT, PT, 0x80, 0x8 ?trans1;
ISETP.GE.AND P4, PT, R15, R6, PT &req={3} ?WAIT12_END_GROUP;
@!P3 IADD3 R9, PT, PT, R8, RZ, RZ ?trans1;
@!P0 MOV R9, R13 ?trans1;
@P4 ISETP.NE.AND P3, PT, R15, R6, PT ?trans1;
@P4 IADD3 R8, PT, PT, R7, 0x1, RZ ?trans2;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?trans2;
IADD3 R11, PT, PT, R9, 0x1, RZ &req={0} ?trans1;
@P4 ISETP.LT.AND P3, PT, R8, R3, !P3 ?WAIT4_END_GROUP;
@P4 MOV R8, R11 ?trans1;
@P4 PLOP3.LUT P0, PT, P3, PT, PT, 0x80, 0x8 ?trans1;
ISETP.GE.AND P3, PT, R17, R6, PT &req={4} ?WAIT12_END_GROUP;
@!P0 IADD3 R8, PT, PT, R9, RZ, RZ ?trans1;
@!P4 MOV R8, R11 ?trans1;
@P3 ISETP.NE.AND P0, PT, R17, R6, PT ?trans1;
@P3 IADD3 R10, PT, PT, R7, 0x2, RZ ?trans2;
PLOP3.LUT P4, PT, PT, PT, PT, 0x80, 0x8 ?WAIT3_END_GROUP;
@P3 ISETP.LT.AND P0, PT, R10, R3, !P0 ?trans1;
IADD3 R10, PT, PT, R8, 0x1, RZ ?WAIT4_END_GROUP;
@P3 PLOP3.LUT P4, PT, P0, PT, PT, 0x80, 0x8 ?trans1;
ISETP.GE.AND P0, PT, R19, R6, PT ?trans1;
@P3 MOV R9, R10 ?WAIT11_END_GROUP;
@!P4 IADD3 R9, PT, PT, R8, RZ, RZ ?trans1;
@!P3 MOV R9, R10 ?trans1;
@P0 ISETP.NE.AND P4, PT, R19, R6, PT ?trans1;
@P0 IADD3 R8, PT, PT, R7, 0x3, RZ ?trans2;
PLOP3.LUT P3, PT, PT, PT, PT, 0x80, 0x8 ?trans2;
IADD3 R10, PT, PT, R9, 0x1, RZ ?trans2;
IADD3 R7, PT, PT, R7, 0x4, RZ ?trans1;
@P0 ISETP.LT.AND P4, PT, R8, R3, !P4 ?WAIT2_END_GROUP;
@P0 MOV R8, R10 ?WAIT3_END_GROUP;
@P0 PLOP3.LUT P3, PT, P4, PT, PT, 0x80, 0x8 ?WAIT13_END_GROUP;
@!P3 IADD3 R8, PT, PT, R9, RZ, RZ ?trans1;
@!P0 MOV R8, R10 ?WAIT7_END_GROUP;
@!P2 BRA 0xdc0 ?trans5;
LDC R9, c[0x0][0x390] &wr=0x0 ?trans1;
ISETP.NE.AND P0, PT, R16, 0x1, PT ?trans1;
LOP3.LUT P2, RZ, R9, 0x1, RZ, 0xc0, !PT &req={0} ?WAIT12_END_GROUP;
@!P0 BRA 0xd00 ?trans5;
IMAD.WIDE.U32 R10, R7, 0x4, R4 ?WAIT5_END_GROUP;
LDG.E R9, desc[UR4][R10.64] &wr=0x2 ?trans4;
LDG.E R13, desc[UR4][R10.64+0x4] &wr=0x3 ?trans1;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?trans2;
IADD3 R14, PT, PT, R8, 0x1, RZ ?trans1;
ISETP.GE.AND P4, PT, R9, R6, PT &req={5,2} ?WAIT13_END_GROUP;
@P4 ISETP.NE.AND P3, PT, R9, R6, PT ?trans1;
@P4 MOV R9, R14 ?WAIT4_END_GROUP;
@P4 ISETP.LT.AND P3, PT, R7, R3, !P3 ?WAIT5_END_GROUP;
@P4 PLOP3.LUT P0, PT, P3, PT, PT, 0x80, 0x8 ?trans1;
ISETP.GE.AND P3, PT, R13, R6, PT &req={3} ?WAIT12_END_GROUP;
@!P0 IADD3 R9, PT, PT, R8, RZ, RZ ?trans1;
@!P4 MOV R9, R14 ?trans1;
@P3 ISETP.NE.AND P0, PT, R13, R6, PT ?trans1;
@P3 IADD3 R8, PT, PT, R7, 0x1, RZ ?trans2;
PLOP3.LUT P4, PT, PT, PT, PT, 0x80, 0x8 ?trans2;
IADD3 R10, PT, PT, R9, 0x1, RZ ?trans2;
IADD3 R7, PT, PT, R7, 0x2, RZ ?trans1;
@P3 ISETP.LT.AND P0, PT, R8, R3, !P0 ?WAIT2_END_GROUP;
@P3 MOV R8, R10 ?WAIT3_END_GROUP;
@P3 PLOP3.LUT P4, PT, P0, PT, PT, 0x80, 0x8 ?WAIT13_END_GROUP;
@!P4 IADD3 R8, PT, PT, R9, RZ, RZ ?trans1;
@!P3 MOV R8, R10 ?WAIT7_END_GROUP;
@!P2 BRA 0xdc0 ?trans5;
IMAD.WIDE.U32 R4, R7, 0x4, R4 ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x2 ?trans1;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?trans1;
ISETP.GE.AND P3, PT, R5, R6, PT &req={5,2} ?WAIT13_END_GROUP;
@P3 ISETP.NE.AND P2, PT, R5, R6, PT ?WAIT5_END_GROUP;
@P3 ISETP.LT.AND P2, PT, R7, R3, !P2 ?trans1;
@P3 IADD3 R7, PT, PT, R8, 0x1, RZ ?WAIT4_END_GROUP;
@P3 PLOP3.LUT P0, PT, P2, PT, PT, 0x80, 0x8 ?WAIT13_END_GROUP;
@!P0 IADD3 R7, PT, PT, R8, RZ, RZ ?WAIT5_END_GROUP;
@P3 MOV R8, R7 ?WAIT5_END_GROUP;
@!P3 IADD3 R8, PT, PT, R8, 0x1, RZ ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR6, c[0x0][0x390] &wr=0x1 ?trans1;
IADD3 R3, PT, PT, R0, R3, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R3, UR6, PT &req={1} ?trans1;
IMAD.WIDE R8, R8, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R8.64], R6 &req={5} &rd=0x1 ?trans7;
@!P0 BRA 0x1b0 ?trans5;
EXIT ?trans5;
BRA 0xe40;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: count_sort(int*, int*, int)
_Z10count_sortPiS_i:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x10
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s10, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s10, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB0_6
s_load_b32 s2, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x0
v_mov_b32_e32 v0, 0
s_cmp_gt_i32 s8, 0
s_mov_b32 s11, 0
s_cselect_b32 s9, -1, 0
s_waitcnt lgkmcnt(0)
s_mul_i32 s10, s2, s10
.LBB0_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_co_u32 v2, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
s_and_not1_b32 vcc_lo, exec_lo, s9
global_load_b32 v4, v[2:3], off
v_mov_b32_e32 v2, 0
s_cbranch_vccnz .LBB0_5
v_mov_b32_e32 v2, 0
s_mov_b32 s12, 0
s_mov_b64 s[2:3], s[4:5]
.LBB0_4:
global_load_b32 v3, v0, s[2:3]
v_cmp_lt_i32_e32 vcc_lo, s12, v1
s_add_i32 s12, s12, 1
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e64 s0, v3, v4
v_cmp_lt_i32_e64 s1, v3, v4
s_delay_alu instid0(VALU_DEP_2)
s_and_b32 s0, vcc_lo, s0
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
s_or_b32 vcc_lo, s1, s0
s_add_u32 s2, s2, 4
v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
s_addc_u32 s3, s3, 0
s_cmp_lg_u32 s8, s12
s_cbranch_scc1 .LBB0_4
.LBB0_5:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v3, 31, v2
v_add_nc_u32_e32 v1, s10, v1
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cmp_le_i32_e32 vcc_lo, s8, v1
s_or_b32 s11, vcc_lo, s11
v_add_co_u32 v2, s0, s6, v2
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
s_waitcnt vmcnt(0)
global_store_b32 v[2:3], v4, off
s_and_not1_b32 exec_lo, exec_lo, s11
s_cbranch_execnz .LBB0_2
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| count_sort | 6,049 | 1,142 | stackv2-00000-of-00015 |
// Demangled: simulateParticlesKernel(Particle*, float3, int, int)
Function : _Z23simulateParticlesKernelP8Particle6float3ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x394] &wr=0x2 ?trans7;
LDC R5, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R5, R5, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R5, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R10, c[0x0][0x398] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
ISETP.GE.AND P0, PT, R10, 0x1, PT &req={0} ?WAIT13_END_GROUP;
@!P0 EXIT &req={1} ?trans5;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans1;
ISETP.GE.U32.AND P1, PT, R10.reuse, 0x4, PT ?trans1;
IMAD.WIDE R2, R5, 0x18, R2 ?trans1;
LOP3.LUT R0, R10, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R0, RZ, PT ?trans1;
LDG.E R5, desc[UR4][R2.64+0xc] &req={0} &rd=0x0 &wr=0x5 ?trans4;
LDG.E R7, desc[UR4][R2.64+0x10] &rd=0x0 &wr=0x5 ?trans4;
LDG.E R9, desc[UR4][R2.64+0x14] &rd=0x0 &wr=0x5 ?trans4;
LDG.E R4, desc[UR4][R2.64] &rd=0x0 &wr=0x5 ?trans4;
LDG.E R6, desc[UR4][R2.64+0x4] &rd=0x0 &wr=0x5 ?trans4;
LDG.E R8, desc[UR4][R2.64+0x8] &rd=0x0 &wr=0x5 ?trans1;
@!P1 BRA 0x370 ?trans5;
LOP3.LUT R10, R10, 0x7ffffffc, RZ, 0xc0, !PT ?trans1;
LDCU UR8, c[0x0][0x390] &wr=0x1 ?trans3;
IADD3 R10, PT, PT, -R10, RZ, RZ ?trans1;
LDCU.64 UR6, c[0x0][0x388] &wr=0x2 ?trans6;
IADD3 R10, PT, PT, R10, 0x4, RZ ?trans1;
FADD R5, R5, UR6 &req={5,2} ?trans1;
FADD R7, R7, UR7 ?trans1;
FADD R9, R9, UR8 &req={1} ?trans2;
FADD R4, R5, R4 ?trans1;
FADD R6, R7, R6 ?trans1;
FADD R8, R9, R8 ?trans1;
ISETP.NE.AND P1, PT, R10, RZ, PT ?trans1;
FADD R5, R5, UR6 ?trans1;
FADD R7, R7, UR7 ?trans1;
FADD R9, R9, UR8 ?WAIT2_END_GROUP;
FADD R4, R4, R5 ?trans1;
FADD R6, R6, R7 ?trans1;
FADD R8, R8, R9 ?trans1;
FADD R5, R5, UR6 ?trans1;
FADD R7, R7, UR7 ?trans1;
FADD R9, R9, UR8 ?trans2;
FADD R4, R4, R5 ?trans1;
FADD R6, R6, R7 ?trans1;
FADD R8, R8, R9 ?trans1;
FADD R5, R5, UR6 ?trans1;
FADD R7, R7, UR7 ?trans1;
FADD R9, R9, UR8 ?WAIT2_END_GROUP;
FADD R4, R4, R5 ?trans1;
FADD R6, R6, R7 ?trans1;
FADD R8, R8, R9 ?trans1;
@P1 BRA 0x1c0 ?trans6;
@!P0 BRA 0x440 ?trans5;
IADD3 R0, PT, PT, -R0, RZ, RZ ?trans1;
LDCU UR8, c[0x0][0x390] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x388] &wr=0x2 ?trans5;
IADD3 R0, PT, PT, R0, 0x1, RZ ?trans1;
FADD R5, R5, UR6 &req={5,2} ?trans1;
FADD R7, R7, UR7 ?trans1;
FADD R9, R9, UR8 &req={1} ?trans2;
ISETP.NE.AND P0, PT, R0, RZ, PT ?trans1;
FADD R4, R5, R4 ?trans1;
FADD R6, R7, R6 ?trans1;
FADD R8, R9, R8 ?WAIT10_END_GROUP;
@P0 BRA 0x3b0 ?trans5;
STG.E desc[UR4][R2.64+0xc], R5 &req={5} ?trans4;
STG.E desc[UR4][R2.64+0x10], R7 ?trans4;
STG.E desc[UR4][R2.64+0x14], R9 ?trans4;
STG.E desc[UR4][R2.64], R4 ?trans4;
STG.E desc[UR4][R2.64+0x4], R6 ?trans4;
STG.E desc[UR4][R2.64+0x8], R8 ?trans1;
EXIT ?trans5;
BRA 0x4b0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: simulateParticlesKernel(Particle*, HIP_vector_type<float, 3u>, int, int)
_Z23simulateParticlesKernelP8Particle15HIP_vector_typeIfLj3EEii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b128 s[4:7], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[4:5], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_ge_i32_e64 s7, v4
s_cbranch_execz .LBB0_5
s_load_b32 s2, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s2, 1
s_cbranch_scc1 .LBB0_5
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
v_mad_i64_i32 v[5:6], null, v4, 24, s[0:1]
s_clause 0x1
global_load_b128 v[0:3], v[5:6], off
global_load_b64 v[7:8], v[5:6], off offset:16
.LBB0_3:
s_waitcnt vmcnt(0)
v_dual_add_f32 v3, s4, v3 :: v_dual_add_f32 v8, s6, v8
v_add_f32_e32 v7, s5, v7
s_add_i32 s2, s2, -1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f32_e32 v0, v3, v0
v_dual_add_f32 v2, v8, v2 :: v_dual_add_f32 v1, v7, v1
s_cmp_lg_u32 s2, 0
s_cbranch_scc1 .LBB0_3
v_mad_i64_i32 v[9:10], null, v4, 24, s[0:1]
s_clause 0x1
global_store_b64 v[9:10], v[7:8], off offset:16
global_store_b128 v[5:6], v[0:3], off
.LBB0_5:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| simulateParticlesKernel | 1,685 | 661 | stackv2-00000-of-00015 |
// Demangled: addVectors(int*, int*, int*)
Function : _Z10addVectorsPiS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R15, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R15, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R0, 0xf423f, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R12, c[0x0][0x390] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R8, c[0x0][0x380] &wr=0x3 ?trans8;
LDC.64 R10, c[0x0][0x388] &wr=0x4 ?trans1;
IMAD R15, R15, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R2, R0, 0x4, R8 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R0.reuse, 0x4, R10 &req={4} ?trans2;
LDG.E R2, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans4;
LDG.E R5, desc[UR6][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE R6, R0, 0x4, R12 &req={1,0} ?trans1;
IADD3 R0, PT, PT, R15, R0, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, 0xf4240, PT ?trans1;
IADD3 R17, PT, PT, R2, R5, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R6.64], R17 &rd=0x1 ?trans7;
@!P0 BRA 0xd0 ?trans5;
EXIT ?trans5;
BRA 0x180;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: addVectors(int*, int*, int*)
_Z10addVectorsPiS_S_:
s_load_b32 s4, s[0:1], 0x24
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s8, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e32 0xf4240, v1
s_cbranch_execz .LBB0_3
s_load_b32 s9, s[2:3], 0x0
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s9, s8
s_mov_b32 s8, 0
.LBB0_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
v_add_co_u32 v6, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
v_cmp_lt_i32_e32 vcc_lo, 0xf423f, v1
global_load_b32 v0, v[4:5], off
global_load_b32 v4, v[6:7], off
v_add_co_u32 v2, s0, s2, v2
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v3, s0, s3, v3, s0
s_or_b32 s8, vcc_lo, s8
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v0, v4, v0
global_store_b32 v[2:3], v0, off
s_and_not1_b32 exec_lo, exec_lo, s8
s_cbranch_execnz .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| addVectors | 687 | 721 | stackv2-00000-of-00015 |
// Demangled: ATAkernel(double*, double*)
Function : _Z9ATAkernelPdS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_CTAID.Y &wr=0x1 ?trans7;
S2UR UR7, SR_CTAID.X &wr=0x1 ?trans2;
ISETP.LE.U32.AND P0, PT, R0, UR7, PT &req={1} ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
S2R R9, SR_TID.Y &wr=0x1 ?trans1;
LDC R3, c[0x0][0x364] &wr=0x1 ?trans1;
MOV R10, 0xf0 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x2 ?trans1;
S2R R7, SR_TID.X &wr=0x3 ?trans5;
LDC R2, c[0x0][0x360] &wr=0x4 ?trans1;
IMAD R13, R0, R3, R9 &req={1} ?trans1;
LOP3.LUT R4, R2.reuse, 0xffff, RZ, 0xc0, !PT &req={4} ?trans1;
IMAD R12, R2, UR7, R7 &req={3,2} ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xff0 &req={0} ?trans5;
S2UR UR6, SR_CgaCtaId &wr=0x0 ?trans1;
LDCU.64 UR10, c[0x0][0x380] &wr=0x1 ?trans1;
IMAD.WIDE.U32 R4, R12, 0x8, RZ ?trans1;
MOV.64 R14, RZ ?trans2;
UMOV UR4, 0x400 ?trans1;
IMAD.WIDE.U32 R10, R13, 0x8, RZ ?trans1;
UIADD3 UR5, UPT, UPT, UR4, 0x2000, URZ ?WAIT3_END_GROUP;
HFMA2 R21, -RZ, RZ, 0, 0 ?trans1;
LOP3.LUT R20, R20, 0xffff, RZ, 0xc0, !PT ?trans1;
IMAD.WIDE.U32 R4, R9, 0x2000, R4 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R10, R7, 0x2000, R10 ?trans1;
IADD.64 R18, R4, UR10 &req={1} ?WAIT4_END_GROUP;
IADD.64 R16, R10, UR10 ?trans2;
ULEA UR4, UR6, UR4, 0x18 &req={0} ?trans1;
ULEA UR5, UR6, UR5, 0x18 ?WAIT5_END_GROUP;
LEA R5, R9, UR4, 0x8 ?trans2;
LEA R6, R7, UR5, 0x3 ?WAIT3_END_GROUP;
IMAD R7, R7, 0x8, R5 ?trans2;
IMAD R4, R9, 0x100, R6 ?WAIT7_END_GROUP;
LDG.E.64 R22, desc[UR8][R16.64] &rd=0x0 &wr=0x2 ?trans4;
LDG.E.64 R24, desc[UR8][R18.64] &rd=0x1 &wr=0x3 ?trans1;
IADD.64 R20, R20, -0x1 ?trans2;
IMAD.WIDE.U32 R16, R2, 0x2000, R16 &req={0} ?WAIT4_END_GROUP;
ISETP.NE.S64.AND P0, PT, R20, RZ, PT ?trans2;
IMAD.WIDE.U32 R18, R3, 0x2000, R18 &req={1} ?trans1;
STS.64 [R7], R22 &req={2} ?trans4;
STS.64 [R4], R24 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS.64 R26, [R6+0x100] ?trans4;
LDS.128 R8, [R5] &wr=0x0 ?trans4;
LDS.64 R28, [R6+0x200] ?trans4;
LDS.64 R22, [R6+0x300] ?trans4;
LDS.64 R24, [R6+0x400] ?trans1;
DMUL R26, R26, R10 &req={0} &rd=0x0 &wr=0x1 ?trans3;
LDS.64 R10, [R6] &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R26, R8, R10, R26 &req={1} &rd=0x0 &wr=0x1 ?trans2;
LDS.128 R8, [R5+0x10] &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R28, R26 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, R22, R10, R8 &req={0} &rd=0x0 &wr=0x1 ?trans2;
LDS.128 R8, [R5+0x20] &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R24, R22 &req={1} &rd=0x0 &wr=0x1 ?trans2;
LDS.64 R22, [R6+0x500] &req={0} &wr=0x1 ?trans4;
LDS.64 R24, [R6+0x600] ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, R22, R10, R8 &req={1} &rd=0x0 &wr=0x1 ?trans2;
LDS.128 R8, [R5+0x30] &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R24, R22 &req={1} &rd=0x0 &wr=0x1 ?trans2;
LDS.64 R22, [R6+0x700] &req={0} &wr=0x1 ?trans4;
LDS.64 R24, [R6+0x800] ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, R22, R10, R8 &req={1} &rd=0x0 &wr=0x1 ?trans2;
LDS.128 R8, [R5+0x40] &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R24, R22 &req={1} &rd=0x0 &wr=0x1 ?trans2;
LDS.64 R22, [R6+0x900] &req={0} &wr=0x1 ?trans4;
LDS.64 R24, [R6+0xa00] ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, R22, R10, R8 &req={1} &rd=0x0 &wr=0x1 ?trans2;
LDS.128 R8, [R5+0x50] &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R24, R22 &req={1} &rd=0x0 &wr=0x1 ?trans2;
LDS.64 R22, [R6+0xb00] &req={0} &wr=0x1 ?trans4;
LDS.64 R24, [R6+0xc00] ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, R22, R10, R8 &req={1} &rd=0x0 &wr=0x1 ?trans2;
LDS.128 R8, [R5+0x60] &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R24, R22 &req={1} &rd=0x0 &wr=0x1 ?trans2;
LDS.64 R22, [R6+0xd00] &req={0} &wr=0x1 ?trans4;
LDS.64 R24, [R6+0xe00] ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, R22, R10, R8 &req={1} &rd=0x0 &wr=0x1 ?trans2;
LDS.128 R8, [R5+0x70] &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R24, R22 &req={1} &rd=0x0 &wr=0x1 ?trans2;
LDS.64 R22, [R6+0xf00] &req={0} &wr=0x1 ?trans4;
LDS.64 R24, [R6+0x1000] ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, R22, R10, R8 &req={1} &rd=0x0 &wr=0x1 ?trans2;
LDS.128 R8, [R5+0x80] &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R24, R22 &req={1} &rd=0x0 &wr=0x1 ?trans2;
LDS.64 R22, [R6+0x1100] &req={0} &wr=0x1 ?trans4;
LDS.64 R24, [R6+0x1200] ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, R22, R10, R8 &req={1} &rd=0x0 &wr=0x1 ?trans2;
LDS.128 R8, [R5+0x90] &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R24, R22 &req={1} &rd=0x0 &wr=0x1 ?trans2;
LDS.64 R22, [R6+0x1300] &req={0} &wr=0x1 ?trans4;
LDS.64 R24, [R6+0x1400] ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, R22, R10, R8 &req={1} &rd=0x0 &wr=0x1 ?trans2;
LDS.128 R8, [R5+0xa0] &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R24, R22 &req={1} &rd=0x0 &wr=0x1 ?trans2;
LDS.64 R22, [R6+0x1500] &req={0} &wr=0x1 ?trans4;
LDS.64 R24, [R6+0x1600] ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, R22, R10, R8 &req={1} &rd=0x0 &wr=0x1 ?trans2;
LDS.128 R8, [R5+0xb0] &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R24, R22 &req={1} &rd=0x0 &wr=0x1 ?trans2;
LDS.64 R22, [R6+0x1700] &req={0} &wr=0x1 ?trans4;
LDS.64 R24, [R6+0x1800] ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, R22, R10, R8 &req={1} &rd=0x0 &wr=0x1 ?trans2;
LDS.128 R8, [R5+0xc0] &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R24, R22 &req={1} &rd=0x0 &wr=0x1 ?trans2;
LDS.64 R22, [R6+0x1900] &req={0} &wr=0x1 ?trans4;
LDS.64 R24, [R6+0x1a00] ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, R22, R10, R8 &req={1} &rd=0x0 &wr=0x1 ?trans2;
LDS.128 R8, [R5+0xd0] &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R24, R22 &req={1} &rd=0x0 &wr=0x1 ?trans2;
LDS.64 R22, [R6+0x1b00] &req={0} &wr=0x1 ?trans4;
LDS.64 R24, [R6+0x1c00] ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, R22, R10, R8 &req={1} &rd=0x0 &wr=0x1 ?trans2;
LDS.128 R8, [R5+0xe0] &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R24, R22 &req={1} &rd=0x0 &wr=0x1 ?trans2;
LDS.64 R22, [R6+0x1d00] &req={0} &wr=0x1 ?trans4;
LDS.64 R24, [R6+0x1e00] ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, R22, R10, R8 &req={1} &rd=0x0 &wr=0x1 ?trans2;
LDS.128 R8, [R5+0xf0] &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R24, R22 &req={1} &rd=0x0 &wr=0x1 ?trans2;
LDS.64 R22, [R6+0x1f00] &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R22, R10, R8 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R14, R8, R14 &req={0} &rd=0x0 &wr=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 BRA 0x220 &req={1,0} ?trans5;
LDCU.64 UR4, c[0x0][0x388] &wr=0x0 ?trans1;
LEA R3, P0, R13, R12, 0xa ?WAIT4_END_GROUP;
LEA.HI.X R4, R13, RZ, RZ, 0xa, P0 ?trans1;
ISETP.LT.U32.AND P0, PT, R0, UR7, PT ?trans1;
LEA R2, P1, R3, UR4, 0x3 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R3, R3, UR5, R4, 0x3, P1 ?WAIT5_END_GROUP;
STG.E.64 desc[UR8][R2.64], R14 &rd=0x0 ?trans3;
@!P0 EXIT ?trans5;
LEA R13, P0, R12, R13, 0xa ?WAIT4_END_GROUP;
LEA.HI.X R12, R12, RZ, RZ, 0xa, P0 ?trans2;
LEA R2, P0, R13, UR4, 0x3 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R3, R13, UR5, R12, 0x3, P0 ?WAIT5_END_GROUP;
STG.E.64 desc[UR8][R2.64], R14 ?trans1;
EXIT ?trans5;
I2F.U16 R5, R4 &wr=0x0 ?trans1;
MOV R6, 0x4b800000 ?trans1;
FSETP.GEU.AND P1, PT, |R5|.reuse, 1.175494350822287508e-38, PT &req={0} ?trans1;
FSETP.GT.AND P0, PT, |R5|, 8.50705917302346158658e+37, PT ?WAIT4_END_GROUP;
FSEL R6, R6, 1, !P1 ?WAIT5_END_GROUP;
FSEL R6, R6, 0.25, !P0 ?trans1;
ISETP.NE.U32.AND P0, PT, R4, RZ, PT ?trans1;
MOV R4, R10 ?WAIT3_END_GROUP;
FMUL R8, R5, R6 ?WAIT4_END_GROUP;
MUFU.RCP R5, R8 &wr=0x0 ?trans2;
FMUL R6, R6, R5 &req={0} ?trans1;
I2FP.F32.U32.RZ R5, 0x400 ?WAIT4_END_GROUP;
IADD3 R6, PT, PT, R6, 0x2, RZ ?WAIT5_END_GROUP;
FMUL.RZ R6, R5, R6 ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?WAIT5_END_GROUP;
F2I.U32.TRUNC.NTZ R6, R6 &wr=0x0 ?trans2;
LOP3.LUT R20, R6, 0xffff, RZ, 0xc0, !PT &req={0} ?trans1;
@!P0 MOV R20, 0xffffffff ?trans1;
RET.REL.NODEC R4 0x0 ?trans6;
BRA 0x1120;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: ATAkernel(double*, double*)
_Z9ATAkernelPdS_:
s_cmp_lt_u32 s14, s15
s_cbranch_scc1 .LBB0_6
s_clause 0x1
s_load_b32 s6, s[0:1], 0x1c
s_load_b128 s[0:3], s[0:1], 0x0
v_bfe_u32 v12, v0, 10, 10
v_and_b32_e32 v10, 0x3ff, v0
v_mov_b32_e32 v8, 0
v_mov_b32_e32 v9, 0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s5, s6, 16
s_and_b32 s4, s6, 0xffff
v_mad_u64_u32 v[4:5], null, s15, s5, v[12:13]
v_mov_b32_e32 v5, 0
v_mad_u64_u32 v[0:1], null, s14, s4, v[10:11]
v_cmp_lt_u16_e64 s6, 0x400, s6
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_mov_b32_e32 v1, v5
v_lshlrev_b64 v[2:3], 3, v[4:5]
s_and_b32 vcc_lo, exec_lo, s6
s_delay_alu instid0(VALU_DEP_2)
v_lshlrev_b64 v[6:7], 3, v[0:1]
s_cbranch_vccnz .LBB0_4
v_cvt_f32_u32_e32 v14, s4
v_dual_mov_b32 v8, 0 :: v_dual_lshlrev_b32 v15, 3, v10
v_dual_mov_b32 v11, v5 :: v_dual_lshlrev_b32 v16, 8, v12
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_rcp_iflag_f32_e32 v13, v14
v_lshlrev_b32_e32 v10, 13, v10
v_dual_mov_b32 v9, 0 :: v_dual_lshlrev_b32 v12, 13, v12
v_add_nc_u32_e32 v17, v16, v15
v_or_b32_e32 v18, 0x2000, v15
s_and_b32 s5, 0xffff, s5
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(TRANS32_DEP_1)
v_add_co_u32 v12, vcc_lo, v12, v6
v_add_co_ci_u32_e32 v15, vcc_lo, 0, v7, vcc_lo
v_mul_f32_e32 v13, 0x44800000, v13
v_add_co_u32 v10, vcc_lo, v10, v2
v_add_co_ci_u32_e32 v20, vcc_lo, 0, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_trunc_f32_e32 v13, v13
v_add_co_u32 v12, vcc_lo, s0, v12
v_add_nc_u32_e32 v19, v18, v16
s_lshl_b32 s6, s4, 13
v_fma_f32 v21, -v13, v14, 0x44800000
v_cvt_u32_f32_e32 v22, v13
v_add_co_ci_u32_e32 v13, vcc_lo, s1, v15, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cmp_ge_f32_e64 vcc_lo, |v21|, v14
v_add_co_ci_u32_e32 v21, vcc_lo, 0, v22, vcc_lo
v_add_co_u32 v14, vcc_lo, s0, v10
v_add_co_ci_u32_e32 v15, vcc_lo, s1, v20, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_and_b32_e32 v10, 0xffff, v21
v_add_nc_u32_e32 v20, 0x800, v18
v_add_nc_u32_e32 v21, 0x1000, v18
v_add_nc_u32_e32 v22, 0x1800, v18
s_lshl_b32 s1, s5, 13
s_mov_b64 s[4:5], 0
.LBB0_3:
global_load_b64 v[23:24], v[14:15], off
global_load_b64 v[25:26], v[12:13], off
s_add_u32 s4, s4, 1
v_add_co_u32 v12, vcc_lo, v12, s1
s_addc_u32 s5, s5, 0
v_add_co_ci_u32_e32 v13, vcc_lo, 0, v13, vcc_lo
v_cmp_ge_u64_e32 vcc_lo, s[4:5], v[10:11]
v_add_co_u32 v14, s0, v14, s6
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v15, s0, 0, v15, s0
s_waitcnt vmcnt(1)
ds_store_b64 v17, v[23:24]
s_waitcnt vmcnt(0)
ds_store_b64 v19, v[25:26]
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
ds_load_2addr_b64 v[23:26], v18 offset1:32
ds_load_b128 v[27:30], v16
ds_load_b128 v[31:34], v16 offset:16
s_and_b32 vcc_lo, exec_lo, vcc_lo
s_waitcnt lgkmcnt(1)
v_mul_f64 v[25:26], v[29:30], v[25:26]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_fma_f64 v[27:28], v[27:28], v[23:24], v[25:26]
ds_load_2addr_b64 v[23:26], v18 offset0:64 offset1:96
s_waitcnt lgkmcnt(0)
v_fma_f64 v[23:24], v[31:32], v[23:24], v[27:28]
v_fma_f64 v[35:36], v[33:34], v[25:26], v[23:24]
ds_load_2addr_b64 v[23:26], v18 offset0:128 offset1:160
ds_load_b128 v[27:30], v16 offset:32
ds_load_b128 v[31:34], v16 offset:48
s_waitcnt lgkmcnt(1)
v_fma_f64 v[23:24], v[27:28], v[23:24], v[35:36]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_fma_f64 v[27:28], v[29:30], v[25:26], v[23:24]
ds_load_2addr_b64 v[23:26], v18 offset0:192 offset1:224
s_waitcnt lgkmcnt(0)
v_fma_f64 v[23:24], v[31:32], v[23:24], v[27:28]
v_fma_f64 v[35:36], v[33:34], v[25:26], v[23:24]
ds_load_2addr_b64 v[23:26], v20 offset1:32
ds_load_b128 v[27:30], v16 offset:64
ds_load_b128 v[31:34], v16 offset:80
s_waitcnt lgkmcnt(1)
v_fma_f64 v[23:24], v[27:28], v[23:24], v[35:36]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_fma_f64 v[27:28], v[29:30], v[25:26], v[23:24]
ds_load_2addr_b64 v[23:26], v20 offset0:64 offset1:96
s_waitcnt lgkmcnt(0)
v_fma_f64 v[23:24], v[31:32], v[23:24], v[27:28]
v_fma_f64 v[35:36], v[33:34], v[25:26], v[23:24]
ds_load_2addr_b64 v[23:26], v20 offset0:128 offset1:160
ds_load_b128 v[27:30], v16 offset:96
ds_load_b128 v[31:34], v16 offset:112
s_waitcnt lgkmcnt(1)
v_fma_f64 v[23:24], v[27:28], v[23:24], v[35:36]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_fma_f64 v[27:28], v[29:30], v[25:26], v[23:24]
ds_load_2addr_b64 v[23:26], v20 offset0:192 offset1:224
s_waitcnt lgkmcnt(0)
v_fma_f64 v[23:24], v[31:32], v[23:24], v[27:28]
v_fma_f64 v[35:36], v[33:34], v[25:26], v[23:24]
ds_load_2addr_b64 v[23:26], v21 offset1:32
ds_load_b128 v[27:30], v16 offset:128
ds_load_b128 v[31:34], v16 offset:144
s_waitcnt lgkmcnt(1)
v_fma_f64 v[23:24], v[27:28], v[23:24], v[35:36]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_fma_f64 v[27:28], v[29:30], v[25:26], v[23:24]
ds_load_2addr_b64 v[23:26], v21 offset0:64 offset1:96
s_waitcnt lgkmcnt(0)
v_fma_f64 v[23:24], v[31:32], v[23:24], v[27:28]
v_fma_f64 v[35:36], v[33:34], v[25:26], v[23:24]
ds_load_2addr_b64 v[23:26], v21 offset0:128 offset1:160
ds_load_b128 v[27:30], v16 offset:160
ds_load_b128 v[31:34], v16 offset:176
s_waitcnt lgkmcnt(1)
v_fma_f64 v[23:24], v[27:28], v[23:24], v[35:36]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_fma_f64 v[27:28], v[29:30], v[25:26], v[23:24]
ds_load_2addr_b64 v[23:26], v21 offset0:192 offset1:224
s_waitcnt lgkmcnt(0)
v_fma_f64 v[23:24], v[31:32], v[23:24], v[27:28]
v_fma_f64 v[35:36], v[33:34], v[25:26], v[23:24]
ds_load_2addr_b64 v[23:26], v22 offset1:32
ds_load_b128 v[27:30], v16 offset:192
ds_load_b128 v[31:34], v16 offset:208
s_waitcnt lgkmcnt(1)
v_fma_f64 v[23:24], v[27:28], v[23:24], v[35:36]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_fma_f64 v[27:28], v[29:30], v[25:26], v[23:24]
ds_load_2addr_b64 v[23:26], v22 offset0:64 offset1:96
s_waitcnt lgkmcnt(0)
v_fma_f64 v[23:24], v[31:32], v[23:24], v[27:28]
v_fma_f64 v[35:36], v[33:34], v[25:26], v[23:24]
ds_load_2addr_b64 v[23:26], v22 offset0:128 offset1:160
ds_load_b128 v[27:30], v16 offset:224
ds_load_b128 v[31:34], v16 offset:240
s_waitcnt lgkmcnt(1)
v_fma_f64 v[23:24], v[27:28], v[23:24], v[35:36]
s_delay_alu instid0(VALU_DEP_1)
v_fma_f64 v[27:28], v[29:30], v[25:26], v[23:24]
ds_load_2addr_b64 v[23:26], v22 offset0:192 offset1:224
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_fma_f64 v[23:24], v[31:32], v[23:24], v[27:28]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[23:24], v[33:34], v[25:26], v[23:24]
v_add_f64 v[8:9], v[8:9], v[23:24]
s_cbranch_vccz .LBB0_3
.LBB0_4:
v_lshlrev_b64 v[4:5], 13, v[4:5]
s_cmp_gt_u32 s14, s15
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v4, vcc_lo, s2, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v4, vcc_lo, v4, v6
v_add_co_ci_u32_e32 v5, vcc_lo, v5, v7, vcc_lo
global_store_b64 v[4:5], v[8:9], off
s_cbranch_scc0 .LBB0_6
v_lshlrev_b64 v[0:1], 13, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, v0, v2
v_add_co_ci_u32_e32 v1, vcc_lo, v1, v3, vcc_lo
global_store_b64 v[0:1], v[8:9], off
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| ATAkernel | 5,540 | 4,626 | stackv2-00000-of-00015 |
// Demangled: pooling(float*, float*, int)
Function : _Z7poolingPfS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R3, SR_CTAID.X &wr=0x1 ?trans2;
IMAD R0, R3, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R0, 0x270ff, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R11, c[0x0][0x390] &wr=0x0 ?trans1;
IABS R8, R0 ?trans1;
LDCU.64 UR6, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans1;
IABS R5, R11 &req={0} ?WAIT4_END_GROUP;
I2F.RP R4, R5 &wr=0x0 ?trans2;
MUFU.RCP R4, R4 &req={0} &wr=0x0 ?trans2;
IADD3 R2, PT, PT, R4, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R3, R2 &rd=0x0 &wr=0x3 ?trans2;
HFMA2 R2, -RZ, RZ, 0, 0 &req={0} ?trans1;
IADD3 R6, PT, PT, RZ, -R3, RZ &req={3} ?WAIT5_END_GROUP;
IMAD R7, R6, R5, RZ ?trans1;
MOV R6, R8 ?WAIT3_END_GROUP;
IMAD.HI.U32 R3, R3, R7, R2 ?trans1;
LOP3.LUT R2, R0, R11, RZ, 0x3c, !PT ?WAIT5_END_GROUP;
IMAD.HI.U32 R3, R3, R6, RZ ?WAIT5_END_GROUP;
IADD3 R4, PT, PT, -R3, RZ, RZ ?WAIT5_END_GROUP;
IMAD R4, R5, R4, R6 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R5, R4, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R4, PT, PT, R4, -R5.reuse, RZ ?trans2;
@!P0 IADD3 R3, PT, PT, R3, 0x1, RZ ?trans1;
ISETP.GE.AND P0, PT, R2, RZ, PT ?trans2;
ISETP.GE.U32.AND P1, PT, R4, R5, PT ?WAIT13_END_GROUP;
@P1 IADD3 R3, PT, PT, R3, 0x1, RZ ?trans1;
ISETP.NE.AND P1, PT, R11, RZ, PT ?WAIT3_END_GROUP;
@!P0 IADD3 R3, PT, PT, -R3, RZ, RZ ?WAIT10_END_GROUP;
@!P1 LOP3.LUT R3, RZ, R11, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R4, PT, PT, -R3.reuse, RZ, RZ ?trans1;
IMAD R3, R3, 0x3, RZ ?WAIT4_END_GROUP;
IMAD R4, R11, R4, R0 ?trans2;
IMAD R2, R3, R11, R11 ?trans2;
IMAD R4, R4, 0x3, RZ ?WAIT3_END_GROUP;
SHF.R.S32.HI R3, RZ, 0x1f, R2 ?trans2;
SHF.R.S32.HI R5, RZ, 0x1f, R4 ?WAIT5_END_GROUP;
IADD.64 R8, R2, R4 ?WAIT5_END_GROUP;
LEA R6, P0, R8, UR6, 0x2 &req={1} ?WAIT4_END_GROUP;
LEA.HI.X R7, R8, UR7, R9, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R8, desc[UR4][R6.64+0x4] &req={2} &wr=0x2 ?trans4;
LDG.E R9, desc[UR4][R6.64+0x8] &wr=0x3 ?trans1;
IADD3 R2, PT, PT, R2, R11, RZ ?WAIT4_END_GROUP;
SHF.R.S32.HI R3, RZ, 0x1f, R2 ?WAIT5_END_GROUP;
IADD.64 R2, R4, R2 ?WAIT5_END_GROUP;
LEA R4, P0, R2, UR6, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R5, R2, UR7, R3, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R10, desc[UR4][R4.64+0x4] &wr=0x4 ?trans4;
LDG.E R11, desc[UR4][R4.64+0x8] &wr=0x5 ?trans1;
FMNMX R8, RZ, R8, !PT &req={2} ?WAIT4_END_GROUP;
F2I.TRUNC.NTZ R12, R8 &wr=0x0 ?trans2;
I2FP.F32.S32 R2, R12 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, R9, R2, PT &req={3} ?WAIT13_END_GROUP;
@P0 F2I.TRUNC.NTZ R12, R9 &wr=0x0 ?trans2;
I2FP.F32.S32 R3, R12 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, R10, R3, PT &req={4} ?WAIT13_END_GROUP;
@P0 F2I.TRUNC.NTZ R12, R10 &wr=0x0 ?trans2;
I2FP.F32.S32 R2, R12 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, R11, R2, PT &req={5} ?trans2;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans11;
@P0 F2I.TRUNC.NTZ R12, R11 &wr=0x1 ?trans1;
IMAD.WIDE R2, R0, 0x4, R2 &req={0} ?trans1;
I2FP.F32.S32 R5, R12 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R5 ?trans1;
EXIT ?trans5;
BRA 0x450;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: pooling(float*, float*, int)
_Z7poolingPfS_i:
s_load_b32 s2, s[0:1], 0x24
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e32 0x27100, v1
s_cbranch_execz .LBB1_4
s_load_b32 s4, s[0:1], 0x10
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v4, v1, v2
v_xor_b32_e32 v4, v4, v2
s_waitcnt lgkmcnt(0)
s_ashr_i32 s2, s4, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s3, s4, s2
s_xor_b32 s3, s3, s2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cvt_f32_u32_e32 v0, s3
s_sub_i32 s5, 0, s3
v_rcp_iflag_f32_e32 v0, v0
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_u32_f32_e32 v0, v0
v_mul_lo_u32 v3, s5, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v3, v0, v3
v_add_nc_u32_e32 v0, v0, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v0, v4, v0
v_mul_lo_u32 v3, v0, s3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v3, v4, v3
v_add_nc_u32_e32 v4, 1, v0
v_subrev_nc_u32_e32 v5, s3, v3
v_cmp_le_u32_e32 vcc_lo, s3, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_dual_cndmask_b32 v3, v3, v5 :: v_dual_cndmask_b32 v0, v0, v4
v_xor_b32_e32 v5, s2, v2
v_cmp_le_u32_e32 vcc_lo, s3, v3
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v4, 1, v0
s_load_b128 s[0:3], s[0:1], 0x0
v_cndmask_b32_e32 v0, v0, v4, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v0, v0, v5
v_sub_nc_u32_e32 v0, v0, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v0, v0, s4
v_mad_u64_u32 v[3:4], null, v0, 3, s[4:5]
v_sub_nc_u32_e32 v0, v1, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshl_add_u32 v0, v0, 1, v0
v_add_nc_u32_e32 v5, s4, v3
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v6, 31, v0
v_ashrrev_i32_e32 v7, 31, v5
v_add_co_u32 v3, vcc_lo, v3, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_add_co_ci_u32_e32 v4, vcc_lo, v4, v6, vcc_lo
v_add_co_u32 v5, vcc_lo, v5, v0
v_add_co_ci_u32_e32 v6, vcc_lo, v7, v6, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[3:4], 2, v[3:4]
v_mov_b32_e32 v0, 0
v_lshlrev_b64 v[5:6], 2, v[5:6]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v3, vcc_lo, s0, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v5, vcc_lo, s0, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
s_clause 0x1
global_load_b64 v[3:4], v[3:4], off offset:4
global_load_b64 v[5:6], v[5:6], off offset:4
s_mov_b64 s[0:1], 0
.LBB1_2:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_cmp_eq_u32 s0, 1
v_cvt_f32_i32_e32 v8, v0
s_cselect_b32 vcc_lo, -1, 0
s_cmp_eq_u32 s0, 2
s_waitcnt vmcnt(1)
v_cndmask_b32_e32 v7, v3, v4, vcc_lo
s_cselect_b32 vcc_lo, -1, 0
s_cmp_eq_u32 s0, 3
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cndmask_b32_e32 v7, v7, v5, vcc_lo
s_cselect_b32 vcc_lo, -1, 0
s_add_u32 s0, s0, 1
s_addc_u32 s1, s1, 0
s_cmp_lg_u32 s0, 4
v_cndmask_b32_e32 v7, v7, v6, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cvt_i32_f32_e32 v9, v7
v_cmp_gt_f32_e32 vcc_lo, v7, v8
v_cndmask_b32_e32 v0, v0, v9, vcc_lo
s_cbranch_scc1 .LBB1_2
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_f32_i32_e32 v3, v0
v_add_co_u32 v0, vcc_lo, s2, v1
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v2, vcc_lo
global_store_b32 v[0:1], v3, off
.LBB1_4:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| pooling | 1,816 | 2,338 | stackv2-00000-of-00015 |
// Demangled: max(int*, int*)
Function : _Z3maxPiS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
S2R R9, SR_TID.X &wr=0x1 ?trans7;
LDC.64 R6, c[0x0][0x380] &wr=0x1 ?trans1;
LDG.E R3, desc[UR6][R2.64] &req={0} &wr=0x2 ?trans7;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R6, R9, 0x4, R6 &req={1} ?trans1;
STG.E desc[UR6][R4.64], R3 &req={2} ?trans5;
LDG.E R6, desc[UR6][R6.64] &wr=0x2 ?trans1;
VOTEU.ANY UR4, UPT, PT ?WAIT2_END_GROUP;
UFLO.U32 UR4, UR4 ?trans1;
S2R R0, SR_LANEID &wr=0x0 ?trans5;
ISETP.EQ.U32.AND P0, PT, R0, UR4, PT &req={0} ?trans1;
REDUX.MIN.S32 UR5, R6 &req={2} &wr=0x0 ?trans2;
MOV R9, UR5 &req={0} ?WAIT10_END_GROUP;
@P0 REDG.E.MIN.S32.STRONG.GPU desc[UR6][R4.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x120;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: max(int*, int*)
_Z3maxPiS_:
s_load_b128 s[0:3], s[0:1], 0x0
v_lshlrev_b32_e32 v0, 2, v0
s_mov_b32 s4, exec_lo
s_waitcnt lgkmcnt(0)
s_load_b32 s5, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v2, s5
global_store_b32 v1, v2, s[2:3]
global_load_b32 v0, v0, s[0:1]
s_brev_b32 s0, -2
.LBB0_1:
s_ctz_i32_b32 s1, s4
s_waitcnt vmcnt(0)
v_readlane_b32 s5, v0, s1
s_lshl_b32 s1, 1, s1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_and_not1_b32 s4, s4, s1
s_min_i32 s0, s0, s5
s_cmp_lg_u32 s4, 0
s_cbranch_scc1 .LBB0_1
v_mbcnt_lo_u32_b32 v0, exec_lo, 0
s_mov_b32 s1, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_eq_u32_e32 0, v0
s_xor_b32 s1, exec_lo, s1
s_cbranch_execz .LBB0_4
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s0
global_atomic_min_i32 v0, v1, s[2:3]
.LBB0_4:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| max | 504 | 478 | stackv2-00000-of-00015 |
// Demangled: prob_idx(Index*)
Function : _Z8prob_idxP5Index
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R7, SR_CTAID.X &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x360] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans1;
IMAD R5, R7, UR6, R0 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R5, 0x8, R2 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R7 &req={2} ?trans4;
STG.E desc[UR4][R2.64+0x4], R0 ?trans1;
EXIT ?trans5;
BRA 0xb0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: prob_idx(Index*)
_Z8prob_idxP5Index:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x14
s_load_b64 s[0:1], s[0:1], 0x0
v_dual_mov_b32 v3, s15 :: v_dual_mov_b32 v4, v0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 3, v[1:2]
v_add_co_u32 v1, vcc_lo, s0, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
global_store_b64 v[1:2], v[3:4], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| prob_idx | 325 | 350 | stackv2-00000-of-00015 |
// Demangled: convolutionColumnGPU(float*, float*, int, int, int)
Function : _Z20convolutionColumnGPUPfS_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans6;
LDC.64 R2, c[0x0][0x388] &wr=0x2 ?trans1;
S2R R5, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR8, c[0x0][0x390] &wr=0x3 ?trans1;
S2R R4, SR_TID.Y &wr=0x4 ?trans1;
LDCU UR5, c[0x0][0x364] &wr=0x4 ?trans4;
LDC R11, c[0x0][0x398] &wr=0x5 ?trans1;
S2R R7, SR_CTAID.Y &wr=0x4 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x0 ?trans1;
IMAD R0, R5, UR4, R0 &req={1} ?trans1;
MOV R5, UR8 &req={3} ?trans1;
IMAD R4, R7, UR5, R4 &req={4} ?WAIT4_END_GROUP;
IMAD R0, R4, R5, R0 ?WAIT4_END_GROUP;
IMAD.WIDE R2, R0, 0x4, R2 &req={2} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR6][R2.64] &req={0} &wr=0x2 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR4, 0x400 ?trans1;
ISETP.GE.AND P0, PT, R11, RZ, PT &req={5} ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={0} ?WAIT6_END_GROUP;
LEA R7, R0, UR4, 0x2 ?WAIT5_END_GROUP;
STS [R7], R2 &req={2} &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P0 EXIT ?trans5;
IABS R7, R5 &req={0} ?trans1;
LDCU.64 UR8, c[0x0][0x380] &wr=0x0 ?trans1;
IABS R8, R0 ?trans2;
I2F.RP R4, R7 &wr=0x1 ?trans1;
ISETP.GE.U32.AND P2, PT, R11, 0x2, PT ?trans1;
MUFU.RCP R4, R4 &req={1} &wr=0x1 ?trans2;
IADD3 R2, PT, PT, R4, 0xffffffe, RZ &req={1} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R3, R2 &rd=0x1 &wr=0x2 ?trans2;
HFMA2 R2, -RZ, RZ, 0, 0 &req={1} ?trans1;
IADD3 R6, PT, PT, RZ, -R3, RZ &req={2} ?WAIT5_END_GROUP;
IMAD R9, R6, R7, RZ ?trans1;
MOV R6, R8 ?WAIT3_END_GROUP;
IMAD.HI.U32 R3, R3, R9, R2 ?trans1;
LOP3.LUT R2, R0, R5, RZ, 0x3c, !PT ?trans2;
IADD3 R9, PT, PT, -R11, RZ, RZ ?WAIT3_END_GROUP;
IMAD.HI.U32 R3, R3, R6, RZ ?WAIT5_END_GROUP;
IADD3 R4, PT, PT, -R3, RZ, RZ ?WAIT5_END_GROUP;
IMAD R4, R7, R4, R6 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R7, R4, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R4, PT, PT, R4, -R7.reuse, RZ ?trans2;
@!P1 IADD3 R3, PT, PT, R3, 0x1, RZ ?trans1;
ISETP.GE.AND P1, PT, R2, RZ, PT ?trans1;
LEA R2, P3, R0, UR8, 0x2 &req={0} ?trans1;
ISETP.GE.U32.AND P0, PT, R4, R7, PT ?trans1;
HFMA2 R7, -RZ, RZ, 0, 0 ?WAIT12_END_GROUP;
@P0 IADD3 R3, PT, PT, R3, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R5, RZ, PT ?WAIT4_END_GROUP;
MOV R4, R3 ?trans1;
SHF.R.S32.HI R3, RZ, 0x1f, R0 ?WAIT4_END_GROUP;
LEA.HI.X R3, R0, UR9, R3, 0x2, P3 ?trans2;
@!P1 IADD3 R4, PT, PT, -R4, RZ, RZ ?trans2;
@!P0 LOP3.LUT R4, RZ, R5, RZ, 0x33, !PT ?trans1;
@!P2 BRA 0xdc0 ?trans6;
LDC R9, c[0x0][0x390] &wr=0x0 ?trans1;
IADD3 R10, PT, PT, R4, -R11.reuse, RZ ?trans2;
IADD3 R17, PT, PT, R11.reuse, R11, RZ ?trans2;
IADD3 R8, PT, PT, -R11, 0x1, RZ ?trans1;
MOV R7, RZ ?trans1;
LDCU UR5, c[0x0][0x394] &wr=0x1 ?trans1;
IADD3 R12, PT, PT, R10.reuse, 0x3, RZ ?trans2;
IADD3 R14, PT, PT, R10, 0x2, RZ ?WAIT2_END_GROUP;
LOP3.LUT R11, R17, 0xfffffffc, RZ, 0xc0, !PT ?trans1;
IMAD R6, R10, R5.reuse, R5 ?trans2;
IMAD R12, R12, R5.reuse, RZ ?trans2;
IMAD R14, R14, R5.reuse, RZ ?trans1;
IADD3 R11, PT, PT, -R11, RZ, RZ ?trans1;
IMAD R16, R10, R5, RZ ?WAIT7_END_GROUP;
ISETP.GE.AND P3, PT, R10.reuse, UR5, PT &req={1} ?trans1;
IADD3 R5, PT, PT, R10.reuse, 0x1, RZ ?trans2;
IADD3 R13, PT, PT, R10.reuse, 0x2, RZ ?trans2;
IADD3 R15, PT, PT, R10.reuse, 0x3, RZ ?trans1;
BSSY.RECONVERGENT B0, 0x730 ?trans1;
ISETP.LT.OR P3, PT, R10, RZ, P3 ?trans1;
ISETP.GE.AND P0, PT, R5, UR5, PT ?trans1;
ISETP.GE.AND P1, PT, R13, UR5, PT ?trans1;
ISETP.GE.AND P2, PT, R15, UR5, PT ?WAIT3_END_GROUP;
ISETP.LT.OR P0, PT, R5, RZ, P0 ?trans1;
ISETP.LT.OR P1, PT, R13, RZ, P1 ?trans1;
ISETP.LT.OR P2, PT, R15, RZ, P2 ?trans1;
IMAD.SHL.U32 R5, R17, 0x4, RZ ?WAIT4_END_GROUP;
@P3 BRA 0x720 ?trans8;
IABS R13, R9 &req={0} ?trans2;
IABS R22, R0 ?trans2;
I2F.RP R15, R13 &wr=0x0 ?trans2;
MUFU.RCP R15, R15 &req={0} &wr=0x0 ?trans2;
IADD3 R18, PT, PT, R15, 0xffffffe, RZ &req={0} ?trans2;
LDC R15, c[0x3][R5] &wr=0x0 ?trans2;
F2I.FTZ.U32.TRUNC.NTZ R19, R18 &rd=0x1 &wr=0x2 ?trans2;
MOV R18, RZ &req={1} ?trans1;
IADD3 R20, PT, PT, RZ, -R19, RZ &req={2} ?WAIT5_END_GROUP;
IMAD R21, R20, R13, RZ ?trans1;
MOV R20, R22 ?WAIT3_END_GROUP;
IMAD.HI.U32 R21, R19, R21, R18 ?WAIT6_END_GROUP;
IMAD.HI.U32 R21, R21, R20, RZ ?WAIT5_END_GROUP;
IADD3 R21, PT, PT, -R21, RZ, RZ ?WAIT5_END_GROUP;
IMAD R20, R13, R21, R20 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P3, PT, R13, R20, PT ?WAIT13_END_GROUP;
@!P3 IADD3 R20, PT, PT, R20, -R13, RZ ?trans1;
ISETP.GE.AND P3, PT, R0, RZ, PT ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P4, PT, R13, R20, PT ?WAIT13_END_GROUP;
@!P4 IADD3 R20, PT, PT, R20, -R13, RZ ?trans1;
ISETP.NE.AND P4, PT, R9, RZ, PT ?WAIT4_END_GROUP;
MOV R13, R20 ?WAIT5_END_GROUP;
@!P3 IADD3 R13, PT, PT, -R13, RZ, RZ ?WAIT4_END_GROUP;
@!P4 LOP3.LUT R13, RZ, R9, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R13, PT, PT, R13, R16, RZ ?WAIT4_END_GROUP;
LEA R13, R13, UR4, 0x2 ?WAIT5_END_GROUP;
LDS R18, [R13] &wr=0x0 ?trans2;
FFMA R7, R18, R15, R7 &req={0} ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
BSSY.RECONVERGENT B0, 0x920 ?trans4;
@P0 BRA 0x910 ?trans5;
IABS R13, R9 &req={0} ?trans2;
IABS R22, R0 ?trans2;
I2F.RP R15, R13 &wr=0x0 ?trans1;
ISETP.GE.AND P3, PT, R0, RZ, PT ?trans1;
MUFU.RCP R15, R15 &req={0} &wr=0x0 ?trans2;
IADD3 R18, PT, PT, R15, 0xffffffe, RZ &req={0} ?trans2;
LDC R15, c[0x3][R5+-0x4] &wr=0x0 ?trans2;
F2I.FTZ.U32.TRUNC.NTZ R19, R18 &rd=0x1 &wr=0x2 ?trans2;
HFMA2 R18, -RZ, RZ, 0, 0 &req={1} ?trans1;
IADD3 R20, PT, PT, RZ, -R19, RZ &req={2} ?WAIT5_END_GROUP;
IMAD R21, R20, R13, RZ ?trans1;
MOV R20, R22 ?WAIT3_END_GROUP;
IMAD.HI.U32 R21, R19, R21, R18 ?WAIT6_END_GROUP;
IMAD.HI.U32 R21, R21, R20, RZ ?WAIT5_END_GROUP;
IADD3 R21, PT, PT, -R21, RZ, RZ ?WAIT5_END_GROUP;
IMAD R20, R13, R21, R20 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R13, R20, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R20, PT, PT, R20, -R13, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R13, R20, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R20, PT, PT, R20, -R13, RZ ?trans1;
ISETP.NE.AND P0, PT, R9, RZ, PT ?WAIT4_END_GROUP;
MOV R13, R20 ?WAIT5_END_GROUP;
@!P3 IADD3 R13, PT, PT, -R13, RZ, RZ ?WAIT4_END_GROUP;
@!P0 LOP3.LUT R13, RZ, R9, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R13, PT, PT, R13, R6, RZ ?WAIT4_END_GROUP;
LEA R13, R13, UR4, 0x2 ?WAIT5_END_GROUP;
LDS R18, [R13] &wr=0x0 ?trans2;
FFMA R7, R18, R15, R7 &req={0} ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
BSSY.RECONVERGENT B0, 0xb10 ?trans4;
@P1 BRA 0xb00 ?trans5;
IABS R13, R9 &req={0} ?trans2;
IABS R22, R0 ?trans2;
I2F.RP R15, R13 &wr=0x0 ?trans1;
ISETP.GE.AND P1, PT, R0, RZ, PT ?trans1;
MUFU.RCP R15, R15 &req={0} &wr=0x0 ?trans2;
IADD3 R18, PT, PT, R15, 0xffffffe, RZ &req={0} ?trans2;
LDC R15, c[0x3][R5+-0x8] &wr=0x0 ?trans2;
F2I.FTZ.U32.TRUNC.NTZ R19, R18 &rd=0x1 &wr=0x2 ?trans2;
HFMA2 R18, -RZ, RZ, 0, 0 &req={1} ?trans1;
IADD3 R20, PT, PT, RZ, -R19, RZ &req={2} ?WAIT5_END_GROUP;
IMAD R21, R20, R13, RZ ?trans1;
MOV R20, R22 ?WAIT3_END_GROUP;
IMAD.HI.U32 R21, R19, R21, R18 ?WAIT6_END_GROUP;
IMAD.HI.U32 R21, R21, R20, RZ ?WAIT5_END_GROUP;
IADD3 R21, PT, PT, -R21, RZ, RZ ?WAIT5_END_GROUP;
IMAD R20, R13, R21, R20 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R13, R20, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R20, PT, PT, R20, -R13, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R13, R20, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R20, PT, PT, R20, -R13, RZ ?trans1;
ISETP.NE.AND P0, PT, R9, RZ, PT ?WAIT4_END_GROUP;
MOV R13, R20 ?WAIT5_END_GROUP;
@!P1 IADD3 R13, PT, PT, -R13, RZ, RZ ?WAIT4_END_GROUP;
@!P0 LOP3.LUT R13, RZ, R9, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R13, PT, PT, R13, R14, RZ ?WAIT4_END_GROUP;
LEA R13, R13, UR4, 0x2 ?WAIT5_END_GROUP;
LDS R18, [R13] &wr=0x0 ?trans2;
FFMA R7, R18, R15, R7 &req={0} ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
BSSY.RECONVERGENT B0, 0xd00 ?trans4;
@P2 BRA 0xcf0 ?trans5;
IABS R13, R9 &req={0} ?trans1;
LDC R5, c[0x3][R5+-0xc] &wr=0x0 ?trans1;
IABS R22, R0 ?trans2;
I2F.RP R15, R13 &wr=0x1 ?trans1;
ISETP.GE.AND P1, PT, R0, RZ, PT ?trans1;
MUFU.RCP R15, R15 &req={1} &wr=0x1 ?trans2;
IADD3 R18, PT, PT, R15, 0xffffffe, RZ &req={1} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R19, R18 &rd=0x1 &wr=0x2 ?trans2;
HFMA2 R18, -RZ, RZ, 0, 0 &req={1} ?trans1;
IADD3 R20, PT, PT, RZ, -R19, RZ &req={2} ?WAIT5_END_GROUP;
IMAD R21, R20, R13, RZ ?trans1;
MOV R20, R22 ?WAIT3_END_GROUP;
IMAD.HI.U32 R21, R19, R21, R18 ?WAIT6_END_GROUP;
IMAD.HI.U32 R21, R21, R20, RZ ?WAIT5_END_GROUP;
IADD3 R21, PT, PT, -R21, RZ, RZ ?WAIT5_END_GROUP;
IMAD R20, R13, R21, R20 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R13, R20, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R20, PT, PT, R20, -R13, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R13, R20, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R20, PT, PT, R20, -R13, RZ ?trans1;
ISETP.NE.AND P0, PT, R9, RZ, PT ?WAIT4_END_GROUP;
MOV R13, R20 ?WAIT5_END_GROUP;
@!P1 IADD3 R13, PT, PT, -R13, RZ, RZ ?WAIT4_END_GROUP;
@!P0 LOP3.LUT R13, RZ, R9, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R13, PT, PT, R13, R12, RZ ?WAIT4_END_GROUP;
LEA R13, R13, UR4, 0x2 ?WAIT5_END_GROUP;
LDS R18, [R13] &wr=0x0 ?trans2;
FFMA R7, R18, R5, R7 &req={0} ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R11, PT, PT, R11, 0x4, RZ ?trans1;
MOV R5, R9 &req={0} ?trans1;
IADD3 R8, PT, PT, R8, 0x4, RZ ?trans2;
IADD3 R17, PT, PT, R17, -0x4, RZ ?trans2;
IADD3 R10, PT, PT, R10, 0x4, RZ ?trans1;
ISETP.NE.AND P0, PT, R11, RZ, PT ?trans1;
IMAD R12, R5.reuse, 0x4, R12 ?trans2;
IMAD R14, R5, 0x4, R14 ?WAIT2_END_GROUP;
IMAD R6, R5.reuse, 0x4, R6 ?trans2;
IMAD R16, R5, 0x4, R16 ?WAIT6_END_GROUP;
@P0 BRA 0x480 ?trans5;
IADD3 R9, PT, PT, R8, -0x1, RZ ?WAIT7_END_GROUP;
LDC R6, c[0x0][0x398] &wr=0x0 ?trans2;
LOP3.LUT R8, R6, 0x1, RZ, 0xc0, !PT &req={0} ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P0, PT, R8, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1280 ?trans5;
LDCU UR5, c[0x0][0x394] &wr=0x0 ?trans1;
IADD3 R11, PT, PT, R9.reuse, R4, RZ ?trans2;
IADD3 R8, PT, PT, -R9, R6, RZ ?trans1;
BSSY.RECONVERGENT B0, 0x1080 ?trans1;
IADD3 R10, PT, PT, R11, 0x1, RZ ?WAIT3_END_GROUP;
IMAD.SHL.U32 R8, R8, 0x4, RZ ?trans1;
ISETP.GE.AND P0, PT, R11, UR5, PT &req={0} ?trans1;
ISETP.GE.AND P2, PT, R10, UR5, PT ?WAIT4_END_GROUP;
ISETP.LT.OR P1, PT, R11, RZ, P0 ?trans1;
ISETP.LT.OR P0, PT, R10, RZ, P2 ?WAIT12_END_GROUP;
@P1 BRA 0x1070 ?trans5;
IABS R14, R5 ?trans2;
IABS R16, R0 ?trans2;
I2F.RP R15, R14 &wr=0x0 ?trans1;
ISETP.GE.AND P2, PT, R0, RZ, PT ?trans1;
MUFU.RCP R15, R15 &req={0} &wr=0x0 ?trans2;
IADD3 R12, PT, PT, R15, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R13, R12 &rd=0x0 &wr=0x1 ?trans2;
HFMA2 R12, -RZ, RZ, 0, 0 &req={0} ?trans1;
IADD3 R17, PT, PT, RZ, -R13, RZ &req={1} ?WAIT5_END_GROUP;
IMAD R17, R17, R14, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R17, R13, R17, R12 ?trans1;
MOV R13, R16 ?WAIT5_END_GROUP;
IMAD.HI.U32 R17, R17, R13, RZ ?WAIT5_END_GROUP;
IADD3 R17, PT, PT, -R17, RZ, RZ ?WAIT5_END_GROUP;
IMAD R13, R14, R17, R13 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R14, R13, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R13, PT, PT, R13, -R14, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R14, R13, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R13, PT, PT, R13, -R14, RZ ?trans1;
ISETP.NE.AND P1, PT, R5, RZ, PT ?WAIT4_END_GROUP;
MOV R12, R13 ?WAIT5_END_GROUP;
@!P2 IADD3 R12, PT, PT, -R12, RZ, RZ ?WAIT4_END_GROUP;
@!P1 LOP3.LUT R12, RZ, R5, RZ, 0x33, !PT ?WAIT5_END_GROUP;
IMAD R12, R11, R5, R12 ?trans2;
LDC R11, c[0x3][R8] &wr=0x0 ?trans3;
LEA R12, R12, UR4, 0x2 ?WAIT6_END_GROUP;
LDS R12, [R12] &wr=0x0 ?trans2;
FFMA R7, R12, R11, R7 &req={0} ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
BSSY.RECONVERGENT B0, 0x1270 ?trans4;
@P0 BRA 0x1260 ?trans5;
IABS R11, R5 ?trans1;
LDC R8, c[0x3][R8+-0x4] &wr=0x0 ?trans1;
IABS R17, R0 ?trans2;
I2F.RP R14, R11 &wr=0x1 ?trans1;
ISETP.GE.AND P1, PT, R0, RZ, PT ?trans1;
MUFU.RCP R14, R14 &req={1} &wr=0x1 ?trans2;
IADD3 R12, PT, PT, R14, 0xffffffe, RZ &req={1} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R13, R12 &rd=0x1 &wr=0x2 ?trans2;
HFMA2 R12, -RZ, RZ, 0, 0 &req={1} ?trans1;
IADD3 R16, PT, PT, RZ, -R13, RZ &req={2} ?WAIT5_END_GROUP;
IMAD R15, R16, R11, RZ ?trans1;
MOV R16, R17 ?WAIT3_END_GROUP;
IMAD.HI.U32 R15, R13, R15, R12 ?WAIT6_END_GROUP;
IMAD.HI.U32 R15, R15, R16, RZ ?WAIT5_END_GROUP;
IADD3 R15, PT, PT, -R15, RZ, RZ ?WAIT5_END_GROUP;
IMAD R16, R11, R15, R16 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R11, R16, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R16, PT, PT, R16, -R11, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R11, R16, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R16, PT, PT, R16, -R11, RZ ?trans1;
ISETP.NE.AND P0, PT, R5, RZ, PT ?WAIT4_END_GROUP;
MOV R11, R16 ?WAIT5_END_GROUP;
@!P1 IADD3 R11, PT, PT, -R11, RZ, RZ ?WAIT4_END_GROUP;
@!P0 LOP3.LUT R11, RZ, R5, RZ, 0x33, !PT ?WAIT5_END_GROUP;
IMAD R10, R10, R5, R11 ?WAIT5_END_GROUP;
LEA R10, R10, UR4, 0x2 ?WAIT6_END_GROUP;
LDS R10, [R10] &wr=0x0 ?trans2;
FFMA R7, R10, R8, R7 &req={0} ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R9, PT, PT, R9, 0x2, RZ ?WAIT7_END_GROUP;
LDCU UR5, c[0x0][0x394] &wr=0x0 ?trans1;
IADD3 R4, PT, PT, R4, R9, RZ ?trans1;
BSSY.RECONVERGENT B0, 0x14d0 ?trans4;
ISETP.GE.AND P0, PT, R4, UR5, PT &req={0} ?WAIT5_END_GROUP;
ISETP.LT.OR P0, PT, R4, RZ, P0 ?WAIT13_END_GROUP;
@P0 BRA 0x14c0 ?trans5;
IABS R8, R5 ?trans2;
IABS R14, R0 ?trans2;
I2F.RP R12, R8 &wr=0x0 ?trans1;
ISETP.GE.AND P1, PT, R0, RZ, PT ?trans1;
IADD3 R6, PT, PT, -R9, R6, RZ ?WAIT5_END_GROUP;
IMAD.SHL.U32 R6, R6, 0x4, RZ ?WAIT6_END_GROUP;
LDC R6, c[0x3][R6] &wr=0x1 ?trans1;
MUFU.RCP R12, R12 &req={0} &wr=0x0 ?trans2;
IADD3 R10, PT, PT, R12, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R11, R10 &rd=0x0 &wr=0x2 ?trans2;
HFMA2 R10, -RZ, RZ, 0, 0 &req={0} ?trans1;
IADD3 R13, PT, PT, RZ, -R11, RZ &req={2} ?WAIT5_END_GROUP;
IMAD R13, R13, R8, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R13, R11, R13, R10 ?trans1;
MOV R11, R14 ?WAIT5_END_GROUP;
IMAD.HI.U32 R13, R13, R11, RZ ?WAIT5_END_GROUP;
IADD3 R13, PT, PT, -R13, RZ, RZ ?WAIT5_END_GROUP;
IMAD R11, R8, R13, R11 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R8, R11, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R11, PT, PT, R11, -R8, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R8, R11, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R11, PT, PT, R11, -R8, RZ ?trans1;
ISETP.NE.AND P0, PT, R5, RZ, PT ?WAIT4_END_GROUP;
MOV R0, R11 ?WAIT5_END_GROUP;
@!P1 IADD3 R0, PT, PT, -R0, RZ, RZ ?WAIT4_END_GROUP;
@!P0 LOP3.LUT R0, RZ, R5, RZ, 0x33, !PT ?WAIT5_END_GROUP;
IMAD R0, R4, R5, R0 ?WAIT5_END_GROUP;
LEA R0, R0, UR4, 0x2 ?WAIT6_END_GROUP;
LDS R0, [R0] &wr=0x1 ?trans2;
FFMA R7, R0, R6, R7 &req={1} ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
STG.E desc[UR6][R2.64], R7 ?trans1;
EXIT ?trans5;
BRA 0x14f0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: convolutionColumnGPU(float*, float*, int, int, int)
_Z20convolutionColumnGPUPfS_iii:
s_clause 0x1
s_load_b32 s8, s[0:1], 0x2c
s_load_b256 s[0:7], s[0:1], 0x0
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s7, s8, 16
s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[2:3], null, s15, s7, v[1:2]
s_and_b32 s7, s8, 0xffff
s_cmp_lt_i32 s6, 0
s_mul_i32 s14, s14, s7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v1, v2, s4
v_add3_u32 v2, s14, v0, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[0:1], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v3, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v4, vcc_lo, s3, v1, vcc_lo
global_load_b32 v3, v[3:4], off
v_lshl_add_u32 v4, v2, 2, 0
s_waitcnt vmcnt(0)
ds_store_b32 v4, v3
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB2_5
s_ashr_i32 s2, s4, 31
v_ashrrev_i32_e32 v5, 31, v2
s_add_i32 s3, s4, s2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_xor_b32 s3, s3, s2
v_cvt_f32_u32_e32 v3, s3
s_sub_i32 s7, 0, s3
v_add_nc_u32_e32 v6, v2, v5
v_lshlrev_b32_e32 v2, 2, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_rcp_iflag_f32_e32 v3, v3
v_xor_b32_e32 v6, v6, v5
v_xor_b32_e32 v5, s2, v5
s_mul_i32 s2, s6, s4
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b32 s2, s2, 2
v_subrev_nc_u32_e32 v2, s2, v2
s_lshl_b32 s2, s6, 1
s_waitcnt_depctr 0xfff
v_dual_mul_f32 v3, 0x4f7ffffe, v3 :: v_dual_add_nc_u32 v2, 0, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_u32_f32_e32 v3, v3
v_mul_lo_u32 v4, s7, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v4, v3, v4
v_add_nc_u32_e32 v3, v3, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v3, v6, v3
v_mul_lo_u32 v4, v3, s3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v4, v6, v4
v_add_nc_u32_e32 v6, 1, v3
v_subrev_nc_u32_e32 v7, s3, v4
v_cmp_le_u32_e32 vcc_lo, s3, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_cndmask_b32 v4, v4, v7 :: v_dual_cndmask_b32 v3, v3, v6
v_cmp_le_u32_e32 vcc_lo, s3, v4
v_mov_b32_e32 v4, 0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v6, 1, v3
v_cndmask_b32_e32 v3, v3, v6, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_xor_b32_e32 v3, v3, v5
s_lshl_b32 s1, s4, 2
v_sub_nc_u32_e32 v3, v3, v5
s_delay_alu instid0(VALU_DEP_1)
v_subrev_nc_u32_e32 v3, s6, v3
.LBB2_2:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_lt_i32_e32 vcc_lo, -1, v3
v_cmp_gt_i32_e64 s0, s5, v3
s_and_b32 s3, vcc_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s0, s3
s_cbranch_execz .LBB2_4
s_getpc_b64 s[6:7]
s_add_u32 s6, s6, d_Filter@rel32@lo+4
s_addc_u32 s7, s7, d_Filter@rel32@hi+12
s_ashr_i32 s3, s2, 31
ds_load_b32 v5, v2
s_lshl_b64 s[8:9], s[2:3], 2
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s6, s8, s6
s_addc_u32 s7, s9, s7
s_load_b32 s3, s[6:7], 0x0
s_waitcnt lgkmcnt(0)
v_fmac_f32_e32 v4, s3, v5
.LBB2_4:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v3, 1, v3
v_add_nc_u32_e32 v2, s1, v2
s_add_i32 s2, s2, -1
global_store_b32 v[0:1], v4, off
s_cmp_lg_u32 s2, -1
s_cbranch_scc1 .LBB2_2
.LBB2_5:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| convolutionColumnGPU | 8,190 | 2,049 | stackv2-00000-of-00015 |
// Demangled: matrix_multiply(float*, float*, float*, int, unsigned long)
Function : _Z15matrix_multiplyPfS_S_im
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R20, SR_TID.Y &wr=0x1 ?trans7;
S2UR UR8, SR_CTAID.Y &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x3a0] &wr=0x2 ?trans1;
HFMA2 R25, -RZ, RZ, 0, 0 ?trans1;
S2R R24, SR_TID.X &wr=0x3 ?trans1;
MOV R9, RZ ?trans1;
LDCU.64 UR12, c[0x0][0x3a0] &wr=0x3 ?trans3;
LDC R19, c[0x0][0x364] &wr=0x1 ?trans1;
UMOV UR6, 0x400 ?trans1;
LDCU.64 UR10, c[0x0][0x358] &wr=0x4 ?trans1;
LDCU.64 UR14, c[0x0][0x3a0] &wr=0x0 ?trans5;
S2UR UR7, SR_CgaCtaId &wr=0x5 ?trans1;
UIADD3.64 UR4, UPT, UPT, UR4, -0x1, URZ &req={2} ?WAIT7_END_GROUP;
S2UR UR9, SR_CTAID.X &wr=0x2 ?trans8;
LDC R3, c[0x0][0x360] &wr=0x2 ?trans1;
IMAD R18, R19, UR8, R20 &req={1} ?trans2;
HFMA2 R19, -RZ, RZ, 0, 0 ?WAIT2_END_GROUP;
IMAD.WIDE.U32 R16, R18.reuse, UR12, R24 &req={3} ?trans1;
USHF.R.U64 UR12, UR4, 0x4, UR5 ?trans1;
ULEA UR8, UR7, UR6, 0x18 &req={5} ?trans1;
UIADD3 UR6, UPT, UPT, UR6, 0x400, URZ ?trans1;
IMAD R21, R18, UR13, R17 ?WAIT3_END_GROUP;
ULEA UR6, UR7, UR6, 0x18 ?trans1;
LEA R22, R20, UR8, 0x6 ?trans1;
USHF.R.U32.HI UR7, URZ, 0x4, UR5 ?WAIT3_END_GROUP;
UMOV.64 UR4, URZ ?trans1;
LEA R23, R24.reuse, UR6, 0x2 ?trans1;
IMAD R25, R24, 0x4, R22 ?trans1;
UMOV UR6, URZ ?trans1;
IMAD R2, R3, UR9, R24 &req={2} ?trans2;
IMAD R0, R20, 0x40, R23 ?WAIT3_END_GROUP;
SHF.R.S32.HI R3, RZ, 0x1f, R2 &req={4,0} ?WAIT7_END_GROUP;
MOV R4, R20 ?trans1;
MOV R5, RZ ?trans1;
MOV R10, UR6 ?trans1;
MOV R8, RZ ?WAIT3_END_GROUP;
IMNMX.U64 PT, PT, R6, R2, R4, !PT, !PT ?trans2;
MOV R4, R24 ?trans2;
ISETP.GE.U64.AND P1, PT, R6, UR14, PT ?WAIT3_END_GROUP;
IMNMX.U64 PT, PT, R4, R18, R4, !PT, !PT ?WAIT4_END_GROUP;
ISETP.GE.U64.AND P0, PT, R4, UR14, PT ?WAIT7_END_GROUP;
@!P1 LDC.64 R12, c[0x0][0x3a0] &wr=0x0 ?trans7;
@!P0 MOV R11, RZ ?trans1;
@!P0 LDC.64 R6, c[0x0][0x380] &wr=0x1 ?trans1;
@!P0 MOV R14, R16 ?trans1;
@!P0 MOV R15, R21 ?WAIT5_END_GROUP;
@!P0 IADD.64 R10, R10, R14 ?trans2;
@!P1 LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans1;
@!P1 MOV R14, R2 ?trans1;
@!P1 MOV R15, R3 ?WAIT4_END_GROUP;
@!P1 IMAD.WIDE.U32 R14, R20, R12, R14 &req={0} ?WAIT4_END_GROUP;
@!P1 IMAD R13, R20, R13, R15 ?trans1;
@!P0 LEA R6, P2, R10, R6, 0x2 &req={1} ?WAIT4_END_GROUP;
@!P0 LEA.HI.X R7, R10, R7, R11, 0x2, P2 ?trans1;
MOV R11, RZ ?trans1;
@!P1 LEA R26, P3, R14, R4, 0x2 &req={2} ?WAIT3_END_GROUP;
@!P0 LDG.E R8, desc[UR10][R6.64] &wr=0x2 ?trans1;
@!P1 LEA.HI.X R27, R14, R5, R13, 0x2, P3 ?WAIT5_END_GROUP;
@!P1 LDG.E R11, desc[UR10][R26.64] &wr=0x3 ?trans1;
UIADD3.64 UR4, UPT, UPT, UR4, 0x1, URZ ?trans1;
UIADD3 UR6, UPT, UPT, UR6, 0x10, URZ ?trans1;
IADD3 R24, PT, PT, R24, 0x10, RZ ?trans2;
IADD3 R20, PT, PT, R20, 0x10, RZ ?trans1;
STS [R25], R8 &req={2} ?trans4;
STS [R0], R11 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R10, [R23] ?trans4;
LDS.128 R12, [R22] &wr=0x0 ?trans4;
LDS R33, [R23+0x40] &wr=0x1 ?trans4;
LDS R32, [R23+0x80] &wr=0x2 ?trans4;
LDS R30, [R23+0xc0] &wr=0x3 ?trans4;
LDS R31, [R23+0x100] ?trans4;
LDS.128 R4, [R22+0x10] &wr=0x4 ?trans4;
LDS R28, [R23+0x140] &wr=0x5 ?trans4;
LDS R29, [R23+0x180] &wr=0x5 ?trans4;
LDS R26, [R23+0x1c0] &wr=0x5 ?trans4;
LDS R27, [R23+0x200] ?trans1;
FFMA R10, R12, R10, R9 &req={0} ?WAIT4_END_GROUP;
FFMA R13, R33, R13, R10 &req={1} ?trans2;
LDS.128 R8, [R22+0x20] &wr=0x0 ?trans2;
FFMA R13, R32, R14, R13 &req={2} ?trans2;
LDS R33, [R23+0x340] ?trans2;
FFMA R13, R30, R15, R13 &req={3} ?trans2;
LDS R30, [R23+0x240] &wr=0x1 ?trans2;
FFMA R13, R4, R31, R13 &req={4} ?WAIT2_END_GROUP;
LDS R31, [R23+0x280] &wr=0x2 ?trans4;
LDS R4, [R23+0x2c0] &wr=0x3 ?trans1;
FFMA R28, R28, R5, R13 &req={5} ?WAIT3_END_GROUP;
LDS R5, [R23+0x300] ?trans4;
LDS.128 R12, [R22+0x30] &wr=0x4 ?trans1;
FFMA R29, R29, R6, R28 ?WAIT3_END_GROUP;
LDS R6, [R23+0x3c0] ?trans1;
FFMA R29, R26, R7, R29 ?WAIT3_END_GROUP;
LDS R7, [R23+0x380] &wr=0x5 ?trans1;
FFMA R27, R8, R27, R29 &req={0} ?WAIT4_END_GROUP;
FFMA R30, R30, R9, R27 &req={1} ?WAIT4_END_GROUP;
FFMA R31, R31, R10, R30 &req={2} ?WAIT4_END_GROUP;
FFMA R11, R4, R11, R31 &req={3} ?trans1;
MOV R4, UR12 ?WAIT3_END_GROUP;
FFMA R12, R12, R5, R11 &req={4} ?trans1;
MOV R5, UR7 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans4;
ISETP.GE.U64.AND P0, PT, R4, UR4, PT ?trans2;
FFMA R12, R33, R13, R12 ?WAIT4_END_GROUP;
FFMA R7, R7, R14, R12 &req={5} ?WAIT4_END_GROUP;
FFMA R9, R6, R15, R7 ?WAIT4_END_GROUP;
@P0 BRA 0x210 ?trans5;
IMNMX.U64 PT, PT, R4, R18, R2, !PT, !PT ?WAIT4_END_GROUP;
ISETP.GE.U64.AND P0, PT, R4, UR14, PT ?WAIT14_END_GROUP;
@P0 EXIT ?trans5;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x398] &wr=0x1 ?trans2;
IMAD R3, R18, UR4, R2 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R3, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR10][R2.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x750;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: matrix_multiply(float*, float*, float*, int, unsigned long)
_Z15matrix_multiplyPfS_S_im:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x34
s_load_b64 s[4:5], s[0:1], 0x20
v_bfe_u32 v3, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
s_clause 0x1
s_load_b128 s[8:11], s[0:1], 0x0
s_load_b64 s[6:7], s[0:1], 0x10
v_dual_mov_b32 v6, 0 :: v_dual_lshlrev_b32 v7, 6, v3
v_lshlrev_b32_e32 v15, 2, v0
s_delay_alu instid0(VALU_DEP_1)
v_add_nc_u32_e32 v8, 0x400, v15
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_and_b32 s2, s2, 0xffff
v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
s_add_u32 s12, s4, -1
s_addc_u32 s13, s5, -1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
v_ashrrev_i32_e32 v2, 31, v1
v_mul_lo_u32 v9, v1, s5
v_mad_u64_u32 v[11:12], null, v1, s4, 0
v_mad_u64_u32 v[4:5], null, s14, s2, v[0:1]
v_mul_lo_u32 v10, v2, s4
v_cmp_gt_u64_e64 s2, s[4:5], v[1:2]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v5, 31, v4
v_add3_u32 v12, v12, v9, v10
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[13:14], 2, v[4:5]
v_cmp_gt_u64_e64 s3, s[4:5], v[4:5]
v_lshlrev_b64 v[11:12], 2, v[11:12]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s8, v11
v_add_co_ci_u32_e32 v5, vcc_lo, s9, v12, vcc_lo
v_add_co_u32 v11, vcc_lo, s10, v13
v_add_co_ci_u32_e32 v12, vcc_lo, s11, v14, vcc_lo
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v13, vcc_lo, v2, v15
v_add_co_ci_u32_e32 v14, vcc_lo, 0, v5, vcc_lo
v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v9, v7, v15
v_add_nc_u32_e32 v10, v8, v7
s_mov_b32 s9, 0
s_lshr_b64 s[10:11], s[12:13], 4
s_mov_b32 s8, s9
.LBB0_1:
v_mov_b32_e32 v5, 0
s_and_saveexec_b32 s14, s2
s_cbranch_execz .LBB0_5
s_lshl_b32 s12, s8, 4
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v5, s12, v0
v_cmp_gt_u64_e32 vcc_lo, s[4:5], v[5:6]
v_mov_b32_e32 v5, 0
s_and_saveexec_b32 s15, vcc_lo
s_cbranch_execz .LBB0_4
s_mov_b32 s13, s9
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[12:13], s[12:13], 2
v_add_co_u32 v15, vcc_lo, v13, s12
v_add_co_ci_u32_e32 v16, vcc_lo, s13, v14, vcc_lo
global_load_b32 v5, v[15:16], off
.LBB0_4:
s_or_b32 exec_lo, exec_lo, s15
.LBB0_5:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s14
v_mov_b32_e32 v15, 0
s_waitcnt vmcnt(0)
ds_store_b32 v9, v5
s_and_saveexec_b32 s12, s3
s_cbranch_execz .LBB0_9
v_lshl_add_u32 v5, s8, 4, v3
v_mov_b32_e32 v15, 0
s_mov_b32 s13, exec_lo
s_delay_alu instid0(VALU_DEP_2)
v_cmpx_gt_u64_e64 s[4:5], v[5:6]
s_cbranch_execz .LBB0_8
v_mad_u64_u32 v[15:16], null, v5, s4, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[17:18], null, v5, s5, v[16:17]
v_mov_b32_e32 v16, v17
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[15:16], 2, v[15:16]
v_add_co_u32 v15, vcc_lo, v11, v15
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v16, vcc_lo, v12, v16, vcc_lo
global_load_b32 v15, v[15:16], off
.LBB0_8:
s_or_b32 exec_lo, exec_lo, s13
.LBB0_9:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s12
v_mov_b32_e32 v5, v8
s_mov_b32 s12, 0
s_waitcnt vmcnt(0)
ds_store_b32 v10, v15
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB0_10:
v_add_nc_u32_e32 v15, s12, v7
s_add_i32 s12, s12, 4
ds_load_b32 v16, v5
ds_load_b32 v15, v15
v_add_nc_u32_e32 v5, 64, v5
s_cmp_eq_u32 s12, 64
s_waitcnt lgkmcnt(0)
v_fmac_f32_e32 v2, v15, v16
s_cbranch_scc0 .LBB0_10
s_add_i32 s8, s8, 1
s_delay_alu instid0(SALU_CYCLE_1)
v_cmp_lt_u64_e64 s12, s[10:11], s[8:9]
s_barrier
buffer_gl0_inv
s_and_b32 vcc_lo, exec_lo, s12
s_cbranch_vccz .LBB0_1
s_and_b32 s2, s2, s3
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB0_14
s_load_b32 s0, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
v_mad_u64_u32 v[5:6], null, v1, s0, v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v6, 31, v5
v_lshlrev_b64 v[0:1], 2, v[5:6]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB0_14:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| matrix_multiply | 2,865 | 2,478 | stackv2-00000-of-00015 |
// Demangled: cudasync(float*, float*, int*, int*, int*)
Function : _Z8cudasyncPfS_PiS0_S0_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x3a0] &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x2 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x2 ?trans8;
LDC R11, c[0x0][0x360] &wr=0x2 ?trans1;
LDG.E R13, desc[UR4][R2.64] &req={1} &wr=0x3 ?trans7;
LDC.64 R4, c[0x0][0x380] &wr=0x1 ?trans8;
LDC.64 R8, c[0x0][0x388] &wr=0x4 ?trans1;
IMAD R11, R11, UR6, R0 &req={2} ?WAIT4_END_GROUP;
IMAD R7, R13, 0x190, R11 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R7, 0x4, R4 &req={1} ?WAIT6_END_GROUP;
LDG.E R4, desc[UR4][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE R6, R13, 0x4, R8 &req={4} ?WAIT6_END_GROUP;
LDG.E R7, desc[UR4][R6.64] &wr=0x3 ?trans1;
BSSY.RECONVERGENT B0, 0x230 ?trans1;
FSETP.NEU.AND P0, PT, R4.reuse, RZ, PT &req={2} ?trans1;
FADD R15, R4, R7 &req={3} ?WAIT12_END_GROUP;
@!P0 BRA 0x220 &req={0} ?trans5;
LDC.64 R2, c[0x0][0x398] &wr=0x0 ?trans2;
IMAD.WIDE R2, R11, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R2, 0x1, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x220 ?trans5;
SHF.R.S32.HI R0, RZ, 0x1f, R11 ?trans1;
IMAD.SHL.U32 R2, R11, 0x4, RZ ?WAIT3_END_GROUP;
SHF.L.U64.HI R3, R11, 0x2, R0 ?WAIT5_END_GROUP;
IADD.64 R4, R2, R8 ?WAIT6_END_GROUP;
LDG.E R0, desc[UR4][R4.64] &wr=0x2 ?trans2;
FSETP.GEU.AND P0, PT, R15, R0, PT &req={2} ?WAIT13_END_GROUP;
@!P0 LDC.64 R6, c[0x0][0x390] &wr=0x0 ?trans1;
@!P0 STG.E desc[UR4][R4.64], R15 &rd=0x1 ?trans1;
@!P0 IADD.64 R2, R2, R6 &req={0} ?WAIT6_END_GROUP;
@!P0 STG.E desc[UR4][R2.64], R13 &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
EXIT ?trans5;
BRA 0x250;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: cudasync(float*, float*, int*, int*, int*)
_Z8cudasyncPfS_PiS0_S0_:
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x20
s_load_b32 s4, s[0:1], 0x34
s_waitcnt lgkmcnt(0)
s_load_b32 s8, s[2:3], 0x0
s_and_b32 s2, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_load_b256 s[0:7], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
v_mad_u64_u32 v[2:3], null, 0x190, s8, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
s_mov_b32 s0, exec_lo
global_load_b32 v4, v[2:3], off
s_waitcnt vmcnt(0)
v_cmpx_neq_f32_e32 0, v4
s_cbranch_execz .LBB1_4
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v2, vcc_lo, s6, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_cmp_ne_u32_e32 vcc_lo, 1, v2
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB1_4
v_add_co_u32 v2, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
s_ashr_i32 s9, s8, 31
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[6:7], s[8:9], 2
global_load_b32 v5, v[2:3], off
s_add_u32 s2, s2, s6
s_addc_u32 s3, s3, s7
s_load_b32 s1, s[2:3], 0x0
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v4, s1, v4
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmp_lt_f32_e32 vcc_lo, v4, v5
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB1_4
v_add_co_u32 v0, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
v_mov_b32_e32 v5, s8
global_store_b32 v[2:3], v4, off
global_store_b32 v[0:1], v5, off
.LBB1_4:
s_or_b32 exec_lo, exec_lo, s0
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_endpgm
| cudasync | 1,031 | 1,065 | stackv2-00000-of-00015 |
// Demangled: nearestNode(float*, int*, int*, int)
Function : _Z11nearestNodePfPiS0_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R6, c[0x0][0x398] &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans1;
MOV R10, 0xffffffff ?trans1;
ISETP.GE.AND P0, PT, R6, 0x1, PT &req={1} ?WAIT13_END_GROUP;
@!P0 BRA 0x10d0 &req={2,0} ?trans5;
ISETP.GE.U32.AND P0, PT, R6.reuse, 0x4, PT ?trans1;
HFMA2 R0, -RZ, RZ, 7.76171875, 32 ?trans1;
LOP3.LUT R11, R6, 0x3, RZ, 0xc0, !PT ?trans1;
HFMA2 R13, -RZ, RZ, 0, 0 ?trans1;
MOV R10, 0xffffffff ?WAIT9_END_GROUP;
@!P0 BRA 0xfa0 ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LOP3.LUT R13, R6, 0x7ffffffc, RZ, 0xc0, !PT ?trans1;
MOV R0, 0x47c35000 ?trans1;
MOV R10, 0xffffffff ?trans1;
MOV R15, RZ ?trans2;
ISETP.GT.AND P0, PT, R13, RZ, PT ?trans2;
LDC.64 R4, c[0x0][0x388] &wr=0x1 ?trans11;
@!P0 BRA 0xda0 ?trans5;
IADD3 R6, PT, PT, R13, -R15, RZ ?trans2;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?WAIT3_END_GROUP;
ISETP.GT.AND P1, PT, R6, 0xc, PT ?WAIT13_END_GROUP;
@!P1 BRA 0x960 ?trans5;
LDC.64 R6, c[0x0][0x380] &wr=0x2 ?trans1;
PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x80 ?trans2;
IADD3 R12, PT, PT, R13, -0xc, RZ ?WAIT5_END_GROUP;
LDC.64 R8, c[0x0][0x388] &wr=0x3 ?trans6;
IMAD.WIDE.U32 R16, R15, 0x4, R6 &req={2} ?WAIT5_END_GROUP;
LDG.E R19, desc[UR4][R16.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R20, R15, 0x4, R8 &req={3} ?WAIT3_END_GROUP;
LDG.E R23, desc[UR4][R16.64+0x4] &wr=0x3 ?trans4;
LDG.E R25, desc[UR4][R16.64+0xc] &wr=0x4 ?trans1;
FSETP.GEU.AND P6, PT, R19, R0, PT &req={2} ?WAIT13_END_GROUP;
@!P6 LDG.E R14, desc[UR4][R20.64] &wr=0x2 ?trans2;
@!P6 ISETP.NE.AND P5, PT, R14, 0x1, PT &req={2} ?WAIT5_END_GROUP;
@!P6 FSEL R0, R0, R19, !P5 ?trans2;
LDG.E R19, desc[UR4][R16.64+0x8] &wr=0x2 ?trans3;
FSETP.GEU.AND P1, PT, R23, R0, PT &req={3} ?WAIT13_END_GROUP;
@!P1 LDG.E R14, desc[UR4][R20.64+0x4] &wr=0x3 ?trans2;
@!P1 ISETP.NE.AND P2, PT, R14, 0x1, PT &req={3} ?WAIT5_END_GROUP;
@!P1 FSEL R0, R0, R23, !P2 ?WAIT5_END_GROUP;
FSETP.GEU.AND P2, PT, R19, R0, PT &req={2} ?WAIT13_END_GROUP;
@!P2 LDG.E R22, desc[UR4][R20.64+0x8] &wr=0x2 ?trans1;
IADD3 R23, PT, PT, R15, 0x4, RZ ?trans1;
@!P2 ISETP.NE.AND P3, PT, R22, 0x1, PT &req={2} ?WAIT5_END_GROUP;
@!P2 FSEL R0, R0, R19, !P3 ?WAIT5_END_GROUP;
FSETP.GEU.AND P3, PT, R25, R0, PT &req={4} ?trans1;
IMAD.WIDE.U32 R18, R23, 0x4, R6 ?WAIT5_END_GROUP;
LDG.E R27, desc[UR4][R18.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R16, R23, 0x4, R8 ?WAIT3_END_GROUP;
LDG.E R29, desc[UR4][R18.64+0x4] &wr=0x3 ?trans4;
@!P3 LDG.E R24, desc[UR4][R20.64+0xc] &wr=0x4 ?trans1;
@!P6 SEL R10, R10, R15, !P5 ?WAIT3_END_GROUP;
LDG.E R21, desc[UR4][R18.64+0x8] &wr=0x5 ?trans1;
@!P3 ISETP.NE.AND P4, PT, R24, 0x1, PT &req={4} ?WAIT5_END_GROUP;
@!P3 FSEL R0, R0, R25, !P4 ?WAIT5_END_GROUP;
FSETP.GEU.AND P4, PT, R27, R0, PT &req={2} ?WAIT13_END_GROUP;
@!P4 LDG.E R25, desc[UR4][R16.64] &wr=0x2 ?trans1;
ISETP.NE.AND P6, PT, R14, 0x1, !P1 ?WAIT13_END_GROUP;
@P6 IADD3 R10, PT, PT, R15, 0x1, RZ ?trans1;
@!P4 ISETP.NE.AND P5, PT, R25, 0x1, PT &req={2} ?WAIT5_END_GROUP;
@!P4 FSEL R0, R0, R27, !P5 ?trans1;
ISETP.NE.AND P1, PT, R22, 0x1, !P2 ?trans1;
LDG.E R27, desc[UR4][R18.64+0xc] &wr=0x2 ?trans3;
FSETP.GEU.AND P6, PT, R29, R0, PT &req={3} ?WAIT13_END_GROUP;
@!P6 LDG.E R14, desc[UR4][R16.64+0x4] &wr=0x3 ?trans1;
@P1 IADD3 R10, PT, PT, R15, 0x2, RZ ?trans1;
@!P6 ISETP.NE.AND P1, PT, R14, 0x1, PT &req={3} ?WAIT5_END_GROUP;
@!P6 FSEL R0, R0, R29, !P1 ?WAIT5_END_GROUP;
FSETP.GEU.AND P1, PT, R21, R0, PT &req={5} ?WAIT13_END_GROUP;
@!P1 LDG.E R22, desc[UR4][R16.64+0x8] &wr=0x3 ?trans1;
ISETP.NE.AND P2, PT, R24, 0x1, !P3 ?WAIT13_END_GROUP;
@P2 IADD3 R10, PT, PT, R15.reuse, 0x3, RZ ?trans2;
IADD3 R25, PT, PT, R15, 0x8, RZ ?trans1;
@!P1 ISETP.NE.AND P2, PT, R22, 0x1, PT &req={3} ?WAIT5_END_GROUP;
@!P1 FSEL R0, R0, R21, !P2 ?WAIT5_END_GROUP;
FSETP.GEU.AND P2, PT, R27, R0, PT &req={2} ?trans1;
IMAD.WIDE.U32 R20, R25, 0x4, R6 ?WAIT5_END_GROUP;
LDG.E R29, desc[UR4][R20.64] &wr=0x2 ?trans7;
@!P2 LDG.E R24, desc[UR4][R16.64+0xc] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R18, R25, 0x4, R8 ?trans1;
@!P4 SEL R10, R10, R23, !P5 ?trans2;
LDG.E R17, desc[UR4][R20.64+0x8] &wr=0x4 ?trans1;
@!P2 ISETP.NE.AND P3, PT, R24, 0x1, PT &req={3} ?WAIT5_END_GROUP;
@!P2 FSEL R0, R0, R27, !P3 ?trans2;
LDG.E R27, desc[UR4][R20.64+0x4] &wr=0x3 ?trans3;
FSETP.GEU.AND P3, PT, R29, R0, PT &req={2} ?WAIT13_END_GROUP;
@!P3 LDG.E R26, desc[UR4][R18.64] &wr=0x2 ?trans1;
ISETP.NE.AND P5, PT, R14, 0x1, !P6 ?WAIT13_END_GROUP;
@P5 IADD3 R10, PT, PT, R15, 0x5, RZ ?trans1;
@!P3 ISETP.NE.AND P4, PT, R26, 0x1, PT &req={2} ?WAIT5_END_GROUP;
@!P3 FSEL R0, R0, R29, !P4 ?WAIT5_END_GROUP;
FSETP.GEU.AND P5, PT, R27, R0, PT &req={3} ?WAIT13_END_GROUP;
@!P5 LDG.E R14, desc[UR4][R18.64+0x4] &wr=0x2 ?trans1;
ISETP.NE.AND P6, PT, R22, 0x1, !P1 ?WAIT13_END_GROUP;
@P6 IADD3 R10, PT, PT, R15, 0x6, RZ ?trans1;
@!P5 ISETP.NE.AND P6, PT, R14, 0x1, PT &req={2} ?WAIT5_END_GROUP;
@!P5 FSEL R0, R0, R27, !P6 ?trans2;
LDG.E R27, desc[UR4][R20.64+0xc] &wr=0x2 ?trans3;
FSETP.GEU.AND P6, PT, R17, R0, PT &req={4} ?WAIT13_END_GROUP;
@!P6 LDG.E R26, desc[UR4][R18.64+0x8] &wr=0x3 ?trans1;
ISETP.NE.AND P1, PT, R24, 0x1, !P2 ?WAIT13_END_GROUP;
@P1 IADD3 R10, PT, PT, R15.reuse, 0x7, RZ ?trans2;
IADD3 R29, PT, PT, R15, 0xc, RZ ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R22, R29, 0x4, R6 ?WAIT5_END_GROUP;
LDG.E R31, desc[UR4][R22.64] &wr=0x4 ?trans4;
LDG.E R21, desc[UR4][R22.64+0x4] &wr=0x5 ?trans1;
@!P6 ISETP.NE.AND P1, PT, R26, 0x1, PT &req={3} ?WAIT5_END_GROUP;
@!P6 FSEL R0, R0, R17, !P1 ?WAIT5_END_GROUP;
FSETP.GEU.AND P1, PT, R27, R0, PT &req={2} ?WAIT13_END_GROUP;
@!P1 LDG.E R24, desc[UR4][R18.64+0xc] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R16, R29, 0x4, R8 ?trans1;
@!P3 SEL R10, R10, R25, !P4 ?trans2;
LDG.E R19, desc[UR4][R22.64+0x8] &wr=0x3 ?trans1;
@!P1 ISETP.NE.AND P2, PT, R24, 0x1, PT &req={2} ?WAIT5_END_GROUP;
@!P1 FSEL R0, R0, R27, !P2 ?WAIT5_END_GROUP;
FSETP.GEU.AND P2, PT, R31, R0, PT &req={4} ?WAIT13_END_GROUP;
@!P2 LDG.E R20, desc[UR4][R16.64] &wr=0x2 ?trans1;
ISETP.NE.AND P3, PT, R14, 0x1, !P5 ?WAIT13_END_GROUP;
@P3 IADD3 R10, PT, PT, R15, 0x9, RZ ?trans1;
@!P2 ISETP.NE.AND P4, PT, R20, 0x1, PT &req={2} ?WAIT5_END_GROUP;
@!P2 FSEL R0, R0, R31, !P4 ?WAIT5_END_GROUP;
FSETP.GEU.AND P3, PT, R21, R0, PT &req={5} ?WAIT13_END_GROUP;
@!P3 LDG.E R14, desc[UR4][R16.64+0x4] &wr=0x2 ?trans1;
ISETP.NE.AND P5, PT, R26, 0x1, !P6 ?WAIT13_END_GROUP;
@P5 IADD3 R10, PT, PT, R15, 0xa, RZ ?trans1;
@!P3 ISETP.NE.AND P5, PT, R14, 0x1, PT &req={2} ?WAIT5_END_GROUP;
@!P3 FSEL R0, R0, R21, !P5 ?trans2;
LDG.E R21, desc[UR4][R22.64+0xc] &wr=0x2 ?trans3;
FSETP.GEU.AND P5, PT, R19, R0, PT &req={3} ?WAIT13_END_GROUP;
@!P5 LDG.E R18, desc[UR4][R16.64+0x8] &wr=0x3 ?trans1;
ISETP.NE.AND P6, PT, R24, 0x1, !P1 ?WAIT13_END_GROUP;
@P6 IADD3 R10, PT, PT, R15, 0xb, RZ ?trans1;
@!P5 ISETP.NE.AND P6, PT, R18, 0x1, PT &req={3} ?WAIT5_END_GROUP;
@!P5 FSEL R0, R0, R19, !P6 ?WAIT5_END_GROUP;
FSETP.GEU.AND P6, PT, R21, R0, PT &req={2} ?WAIT13_END_GROUP;
@!P6 LDG.E R19, desc[UR4][R16.64+0xc] &wr=0x2 ?trans1;
ISETP.NE.AND P1, PT, R14, 0x1, !P3 ?trans1;
@!P2 SEL R10, R10, R29, !P4 ?trans1;
ISETP.NE.AND P2, PT, R18, 0x1, !P5 ?WAIT11_END_GROUP;
@P1 IADD3 R10, PT, PT, R15.reuse, 0xd, RZ ?trans2;
@P2 IADD3 R10, PT, PT, R15, 0xe, RZ ?trans1;
ISETP.NE.AND P1, PT, R19, 0x1, !P6 &req={2} ?WAIT13_END_GROUP;
@P1 IADD3 R10, PT, PT, R15.reuse, 0xf, RZ ?trans2;
IADD3 R15, PT, PT, R15, 0x10, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P2, PT, R15, R12, PT ?trans1;
@!P6 ISETP.NE.AND P1, PT, R19, 0x1, PT ?WAIT5_END_GROUP;
@!P6 FSEL R0, R0, R21, !P1 ?WAIT7_END_GROUP;
@!P2 BRA 0x1c0 ?trans5;
IADD3 R6, PT, PT, R13, -R15, RZ ?WAIT5_END_GROUP;
ISETP.GT.AND P1, PT, R6, 0x4, PT ?WAIT13_END_GROUP;
@!P1 BRA 0xd80 ?trans5;
LDC.64 R8, c[0x0][0x380] &wr=0x2 ?trans8;
LDC.64 R6, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R18, R15, 0x4, R8 &req={2} ?WAIT5_END_GROUP;
LDG.E R21, desc[UR4][R18.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R16, R15, 0x4, R6 &req={3} ?WAIT3_END_GROUP;
LDG.E R23, desc[UR4][R18.64+0x4] &wr=0x3 ?trans1;
FSETP.GEU.AND P5, PT, R21, R0, PT &req={2} ?WAIT13_END_GROUP;
@!P5 LDG.E R12, desc[UR4][R16.64] &wr=0x2 ?trans2;
@!P5 ISETP.NE.AND P6, PT, R12, 0x1, PT &req={2} ?WAIT5_END_GROUP;
@!P5 FSEL R0, R0, R21, !P6 ?trans2;
LDG.E R21, desc[UR4][R18.64+0x8] &wr=0x2 ?trans3;
FSETP.GEU.AND P1, PT, R23, R0, PT &req={3} ?WAIT13_END_GROUP;
@!P1 LDG.E R12, desc[UR4][R16.64+0x4] &wr=0x3 ?trans2;
@!P1 ISETP.NE.AND P0, PT, R12, 0x1, PT &req={3} ?WAIT5_END_GROUP;
@!P1 FSEL R0, R0, R23, !P0 ?trans2;
LDG.E R23, desc[UR4][R18.64+0xc] &wr=0x3 ?trans3;
FSETP.GEU.AND P0, PT, R21, R0, PT &req={2} ?WAIT13_END_GROUP;
@!P0 LDG.E R14, desc[UR4][R16.64+0x8] &wr=0x2 ?trans2;
@!P0 ISETP.NE.AND P2, PT, R14, 0x1, PT &req={2} ?WAIT5_END_GROUP;
@!P0 FSEL R0, R0, R21, !P2 ?WAIT5_END_GROUP;
FSETP.GEU.AND P2, PT, R23, R0, PT &req={3} ?trans1;
IADD3 R21, PT, PT, R15, 0x4, RZ ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R8, R21, 0x4, R8 ?WAIT5_END_GROUP;
LDG.E R25, desc[UR4][R8.64] &wr=0x2 ?trans4;
@!P2 LDG.E R20, desc[UR4][R16.64+0xc] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R6, R21, 0x4, R6 ?WAIT3_END_GROUP;
LDG.E R19, desc[UR4][R8.64+0x4] &wr=0x4 ?trans1;
@!P5 SEL R10, R10, R15, !P6 ?WAIT3_END_GROUP;
LDG.E R17, desc[UR4][R8.64+0x8] &wr=0x5 ?trans1;
@!P2 ISETP.NE.AND P3, PT, R20, 0x1, PT &req={3} ?WAIT5_END_GROUP;
@!P2 FSEL R0, R0, R23, !P3 ?WAIT5_END_GROUP;
FSETP.GEU.AND P3, PT, R25, R0, PT &req={2} ?WAIT13_END_GROUP;
@!P3 LDG.E R18, desc[UR4][R6.64] &wr=0x2 ?trans2;
@!P3 ISETP.NE.AND P4, PT, R18, 0x1, PT &req={2} ?WAIT5_END_GROUP;
@!P3 FSEL R0, R0, R25, !P4 ?WAIT5_END_GROUP;
FSETP.GEU.AND P5, PT, R19, R0, PT &req={4} ?WAIT13_END_GROUP;
@!P5 LDG.E R16, desc[UR4][R6.64+0x4] &wr=0x2 ?trans1;
ISETP.NE.AND P6, PT, R12, 0x1, !P1 ?WAIT13_END_GROUP;
@P6 IADD3 R10, PT, PT, R15, 0x1, RZ ?trans1;
@!P5 ISETP.NE.AND P6, PT, R16, 0x1, PT &req={2} ?WAIT5_END_GROUP;
@!P5 FSEL R0, R0, R19, !P6 ?trans2;
LDG.E R19, desc[UR4][R8.64+0xc] &wr=0x2 ?trans3;
FSETP.GEU.AND P6, PT, R17, R0, PT &req={5} ?WAIT13_END_GROUP;
@!P6 LDG.E R12, desc[UR4][R6.64+0x8] &wr=0x3 ?trans1;
ISETP.NE.AND P1, PT, R14, 0x1, !P0 ?WAIT13_END_GROUP;
@P1 IADD3 R10, PT, PT, R15, 0x2, RZ ?trans1;
@!P6 ISETP.NE.AND P1, PT, R12, 0x1, PT &req={3} ?WAIT5_END_GROUP;
@!P6 FSEL R0, R0, R17, !P1 ?WAIT5_END_GROUP;
FSETP.GEU.AND P1, PT, R19, R0, PT &req={2} ?WAIT13_END_GROUP;
@!P1 LDG.E R14, desc[UR4][R6.64+0xc] &wr=0x2 ?trans1;
ISETP.NE.AND P0, PT, R20, 0x1, !P2 ?trans1;
ISETP.NE.AND P2, PT, R12, 0x1, !P6 ?WAIT12_END_GROUP;
@P0 IADD3 R10, PT, PT, R15, 0x3, RZ ?trans1;
ISETP.NE.AND P0, PT, R16, 0x1, !P5 ?WAIT4_END_GROUP;
@!P3 SEL R10, R10, R21, !P4 ?trans1;
IADD3 R15, PT, PT, R21, 0x4, RZ ?WAIT8_END_GROUP;
@P0 IADD3 R10, PT, PT, R21.reuse, 0x1, RZ ?trans2;
@P2 IADD3 R10, PT, PT, R21, 0x2, RZ ?trans2;
PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x80 ?trans1;
ISETP.NE.AND P3, PT, R14.reuse, 0x1, !P1 &req={2} ?trans1;
@!P1 ISETP.NE.AND P2, PT, R14, 0x1, PT ?WAIT5_END_GROUP;
@!P1 FSEL R0, R0, R19, !P2 ?WAIT7_END_GROUP;
@P3 IADD3 R10, PT, PT, R21, 0x3, RZ ?WAIT7_END_GROUP;
ISETP.NE.OR P0, PT, R15, R13, P0 ?WAIT13_END_GROUP;
@!P0 BRA 0xfa0 ?trans5;
IMAD.WIDE.U32 R6, R15, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R17, desc[UR4][R6.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R8, R15, 0x4, R4 &req={1} ?WAIT3_END_GROUP;
LDG.E R19, desc[UR4][R6.64+0x4] &wr=0x3 ?trans1;
FSETP.GEU.AND P3, PT, R17, R0, PT &req={2} ?WAIT13_END_GROUP;
@!P3 LDG.E R12, desc[UR4][R8.64] &wr=0x2 ?trans2;
@!P3 ISETP.NE.AND P2, PT, R12, 0x1, PT &req={2} ?WAIT5_END_GROUP;
@!P3 FSEL R0, R0, R17, !P2 ?trans2;
LDG.E R17, desc[UR4][R6.64+0x8] &wr=0x2 ?trans3;
FSETP.GEU.AND P1, PT, R19, R0, PT &req={3} ?WAIT13_END_GROUP;
@!P1 LDG.E R12, desc[UR4][R8.64+0x4] &wr=0x3 ?trans2;
@!P1 ISETP.NE.AND P0, PT, R12, 0x1, PT &req={3} ?WAIT5_END_GROUP;
@!P1 FSEL R0, R0, R19, !P0 ?trans2;
LDG.E R19, desc[UR4][R6.64+0xc] &wr=0x3 ?trans3;
FSETP.GEU.AND P4, PT, R17, R0, PT &req={2} ?WAIT13_END_GROUP;
@!P4 LDG.E R14, desc[UR4][R8.64+0x8] &wr=0x2 ?trans2;
@!P4 ISETP.NE.AND P0, PT, R14, 0x1, PT &req={2} ?WAIT5_END_GROUP;
@!P4 FSEL R0, R0, R17, !P0 ?WAIT5_END_GROUP;
FSETP.GEU.AND P0, PT, R19, R0, PT &req={3} ?WAIT13_END_GROUP;
@!P0 LDG.E R16, desc[UR4][R8.64+0xc] &wr=0x2 ?trans1;
ISETP.NE.AND P5, PT, R12, 0x1, !P1 ?trans1;
@!P3 SEL R10, R10, R15, !P2 ?trans1;
ISETP.NE.AND P2, PT, R14, 0x1, !P4 ?WAIT11_END_GROUP;
@P5 IADD3 R10, PT, PT, R15.reuse, 0x1, RZ ?trans2;
@P2 IADD3 R10, PT, PT, R15, 0x2, RZ ?trans1;
ISETP.NE.AND P1, PT, R16, 0x1, !P0 &req={2} ?WAIT13_END_GROUP;
@P1 IADD3 R10, PT, PT, R15.reuse, 0x3, RZ ?trans2;
IADD3 R15, PT, PT, R15, 0x4, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P2, PT, R15, R13, PT ?trans1;
@!P0 ISETP.NE.AND P1, PT, R16, 0x1, PT ?WAIT5_END_GROUP;
@!P0 FSEL R0, R0, R19, !P1 ?WAIT7_END_GROUP;
@P2 BRA 0xda0 ?trans5;
ISETP.NE.AND P0, PT, R11, RZ, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x10d0 ?trans5;
LDC.64 R2, c[0x0][0x388] &req={0} &wr=0x0 ?trans1;
IADD3 R11, PT, PT, -R11, RZ, RZ ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x380] &req={1} &wr=0x1 ?trans1;
IMAD.WIDE.U32 R2, R13, 0x4, R2 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R13, 0x4, R4 &req={1} ?WAIT7_END_GROUP;
LDG.E R7, desc[UR4][R4.64] &wr=0x2 ?trans1;
IADD3 R11, PT, PT, R11, 0x1, RZ ?trans1;
FSETP.GEU.AND P0, PT, R7, R0, PT &req={2} ?WAIT13_END_GROUP;
@!P0 LDG.E R6, desc[UR4][R2.64] &rd=0x0 &wr=0x2 ?trans1;
ISETP.NE.AND P2, PT, R11, RZ, PT ?trans1;
IADD.64 R4, R4, 0x4 ?trans2;
IADD.64 R2, R2, 0x4 &req={0} ?trans2;
@!P0 ISETP.NE.AND P1, PT, R6, 0x1, PT &req={2} ?WAIT5_END_GROUP;
@!P0 SEL R10, R10, R13, !P1 ?trans1;
@!P0 FSEL R0, R0, R7, !P1 ?trans1;
IADD3 R13, PT, PT, R13, 0x1, RZ ?trans1;
@P2 BRA 0x1010 ?trans6;
LDC.64 R4, c[0x0][0x388] &req={1} &wr=0x1 ?trans8;
LDC.64 R2, c[0x0][0x390] &req={0} &wr=0x0 ?trans1;
HFMA2 R7, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
STG.E desc[UR4][R2.64], R10 &req={0} ?trans1;
IMAD.WIDE R4, R10, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R7 ?trans1;
EXIT ?trans5;
BRA 0x1140;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: nearestNode(float*, int*, int*, int)
_Z11nearestNodePfPiS0_i:
s_clause 0x2
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b32 s3, s[0:1], 0x18
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s3, 1
s_cbranch_scc1 .LBB0_5
v_mov_b32_e32 v0, 0x47c35000
s_mov_b32 s8, s6
s_mov_b32 s9, s7
s_mov_b32 s2, -1
s_mov_b32 s10, 0
.LBB0_2:
s_load_b32 s11, s[4:5], 0x0
s_waitcnt lgkmcnt(0)
v_cmp_nlt_f32_e32 vcc_lo, s11, v0
s_cbranch_vccnz .LBB0_4
s_load_b32 s12, s[8:9], 0x0
s_waitcnt lgkmcnt(0)
s_cmp_eq_u32 s12, 1
s_cselect_b32 vcc_lo, -1, 0
v_cndmask_b32_e32 v0, s11, v0, vcc_lo
s_and_b32 s11, vcc_lo, exec_lo
s_cselect_b32 s2, s2, s10
.LBB0_4:
s_add_i32 s10, s10, 1
s_add_u32 s4, s4, 4
s_addc_u32 s5, s5, 0
s_add_u32 s8, s8, 4
s_addc_u32 s9, s9, 0
s_cmp_lg_u32 s3, s10
s_cbranch_scc1 .LBB0_2
s_branch .LBB0_6
.LBB0_5:
s_mov_b32 s2, -1
.LBB0_6:
s_delay_alu instid0(SALU_CYCLE_1)
s_ashr_i32 s3, s2, 31
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
s_lshl_b64 s[2:3], s[2:3], 2
v_mov_b32_e32 v2, 1
s_add_u32 s2, s6, s2
s_addc_u32 s3, s7, s3
s_clause 0x1
global_store_b32 v0, v1, s[0:1]
global_store_b32 v0, v2, s[2:3]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| nearestNode | 8,224 | 700 | stackv2-00000-of-00015 |
// Demangled: calculate(double*, double, double, long long)
Function : _Z9calculatePdddx
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R2, c[0x0][0x360] &wr=0x1 ?trans8;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD R2, R2, UR4, R3 &req={1} ?trans1;
LDCU.128 UR4, c[0x0][0x390] &wr=0x1 ?trans3;
I2F.F64 R12, R2 &wr=0x2 ?trans1;
SHF.R.S32.HI R3, RZ, 0x1f, R2 ?WAIT5_END_GROUP;
ISETP.GE.S64.AND P0, PT, R2, UR6, PT &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R12, UR4, R4 &req={2} &rd=0x1 &wr=0x2 ?trans2;
@P0 EXIT &req={2,1,0} ?trans5;
DADD R4, -RZ, |R12| &rd=0x0 &wr=0x1 ?trans1;
BSSY.RECONVERGENT B0, 0x160 ?trans1;
MOV R0, 0x150 ?trans1;
UMOV UR4, URZ ?trans1;
UMOV UR5, 0x40100000 &req={1,0} ?WAIT5_END_GROUP;
CALL.REL.NOINC 0x12d0 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
DADD R6, R12, 4 &wr=0x0 ?trans1;
MOV R14, R4 ?trans1;
LOP3.LUT R6, R7, 0x7ff00000, RZ, 0xc0, !PT &req={0} ?trans1;
BSSY.RECONVERGENT B0, 0x340 ?trans1;
MOV R15, R5 ?trans1;
ISETP.GE.AND P1, PT, R13, RZ, PT ?trans2;
ISETP.NE.AND P0, PT, R6, 0x7ff00000, PT ?WAIT15_END_GROUP;
NOP ?WAIT12_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.NEU.AND P2, PT, R12, RZ, PT &wr=0x0 ?trans2;
@!P2 MOV.64 R14, RZ &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R4, -RZ, |R12| &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0x330 &req={1,0} ?trans5;
DSETP.NAN.AND P0, PT, R12, R12, PT &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@P0 DADD R14, R12, 4 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0x330 &req={1,0} ?trans5;
ISETP.NE.AND P0, PT, R12, RZ, PT ?trans1;
LOP3.LUT R0, R13, 0x7fffffff, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.OR P0, PT, R0, 0x7ff00000, P0 ?WAIT13_END_GROUP;
@!P0 MOV.64 R14, 0x7ff0000000000000 ?WAIT8_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
BSSY.RECONVERGENT B0, 0x390 ?trans1;
MOV R0, 0x380 ?trans1;
UMOV UR5, 0x40080000 ?WAIT6_END_GROUP;
CALL.REL.NOINC 0x12d0 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
DADD R6, R12, 3 &wr=0x0 ?trans1;
LOP3.LUT R0, R5, 0x80000000, RZ, 0x3c, !PT ?trans1;
BSSY.RECONVERGENT B0, 0x590 ?trans1;
LOP3.LUT R6, R7, 0x7ff00000, RZ, 0xc0, !PT &req={0} ?trans1;
@!P2 MOV R4, RZ ?trans2;
FSEL R5, R0, R5, !P1 ?trans1;
@!P2 MOV R5, R13 ?trans1;
ISETP.NE.AND P0, PT, R6, 0x7ff00000, PT ?WAIT15_END_GROUP;
NOP ?WAIT11_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.NEU.AND P3, PT, R12, 1, PT &rd=0x0 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, -RZ, |R12| &rd=0x0 &wr=0x2 ?trans2;
@P0 BRA 0x580 &req={2,1,0} ?trans5;
DSETP.NAN.AND P0, PT, R12, R12, PT &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@P0 DADD R4, R12, 3 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0x580 &req={1,0} ?trans5;
ISETP.NE.AND P0, PT, R12, RZ, PT ?trans1;
LOP3.LUT R0, R13, 0x7fffffff, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.OR P0, PT, R0, 0x7ff00000, P0 ?WAIT13_END_GROUP;
@!P0 MOV R0, 0xfff00000 ?trans1;
@!P0 MOV R4, RZ ?WAIT4_END_GROUP;
@!P0 SEL R5, R0, 0x7ff00000, !P1 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
DMUL R4, R4, 4 &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0x6c0 ?trans1;
MOV R0, 0x6b0 ?trans1;
UMOV UR5, 0x40000000 ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R14, 5, R4 &req={0} &rd=0x0 &wr=0x1 ?trans2;
MOV R4, R8 &req={0} ?trans1;
MOV R5, R9 ?trans1;
FSEL R14, R14, RZ, P3 &req={1} ?trans1;
FSEL R15, R15, 2.53125, P3 ?WAIT15_END_GROUP;
NOP ?WAIT14_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.NEU.AND P1, PT, R12, RZ, PT &rd=0x0 &wr=0x1 ?trans2;
CALL.REL.NOINC 0x12d0 &req={1,0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
DADD R6, R12, 2 &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0x870 ?trans1;
LOP3.LUT R6, R7, 0x7ff00000, RZ, 0xc0, !PT &req={0} ?trans1;
@!P1 MOV.64 R4, RZ ?WAIT4_END_GROUP;
ISETP.NE.AND P0, PT, R6, 0x7ff00000, PT ?WAIT15_END_GROUP;
NOP ?WAIT12_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.NEU.AND P2, PT, R12, 1, PT &rd=0x0 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R14, R12, R14 &rd=0x0 &wr=0x2 ?trans2;
@P0 BRA 0x860 &req={2,1,0} ?trans5;
DSETP.NAN.AND P0, PT, R12, R12, PT &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@P0 DADD R4, R12, 2 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0x860 &req={1,0} ?trans5;
ISETP.NE.AND P0, PT, R12, RZ, PT ?trans1;
LOP3.LUT R0, R13, 0x7fffffff, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.OR P0, PT, R0, 0x7ff00000, P0 ?WAIT13_END_GROUP;
@!P0 MOV.64 R4, 0x7ff0000000000000 ?WAIT8_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU.64 UR6, c[0x0][0x390] &wr=0x0 ?trans1;
DMUL R4, R4, 10 &wr=0x1 ?trans1;
BSSY.RECONVERGENT B0, 0xa00 ?trans1;
FSEL R6, R4, RZ, P2 &req={1} ?trans1;
FSEL R7, R5, 2.5625, P2 ?trans1;
MOV R0, 0x9f0 ?trans1;
UMOV UR5, 0x40100000 ?WAIT15_END_GROUP;
NOP ?WAIT14_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, R12, UR6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, -RZ, |R12| &req={0} &wr=0x0 ?trans2;
MOV R4, R8 &req={0} ?trans1;
MOV R5, R9 ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R14, R14, -R6 &rd=0x0 &wr=0x1 ?trans2;
CALL.REL.NOINC 0x12d0 &req={1,0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
DADD R6, R12, 4 &wr=0x0 ?trans1;
MOV R16, R4 ?trans1;
LOP3.LUT R6, R7, 0x7ff00000, RZ, 0xc0, !PT &req={0} ?trans1;
BSSY.RECONVERGENT B0, 0xbe0 ?trans1;
MOV R17, R5 ?trans1;
ISETP.GE.AND P1, PT, R13, RZ, PT ?trans2;
ISETP.NE.AND P0, PT, R6, 0x7ff00000, PT ?WAIT15_END_GROUP;
NOP ?WAIT12_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.NEU.AND P2, PT, R12, RZ, PT &wr=0x0 ?trans2;
@!P2 MOV.64 R16, RZ &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R4, -RZ, |R12| &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0xbd0 &req={1,0} ?trans5;
DSETP.NAN.AND P0, PT, R12, R12, PT &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@P0 DADD R16, R12, 4 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0xbd0 &req={1,0} ?trans5;
ISETP.NE.AND P0, PT, R12, RZ, PT ?trans1;
LOP3.LUT R0, R13, 0x7fffffff, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.OR P0, PT, R0, 0x7ff00000, P0 ?WAIT13_END_GROUP;
@!P0 MOV.64 R16, 0x7ff0000000000000 ?WAIT8_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
BSSY.RECONVERGENT B0, 0xc30 ?trans1;
MOV R0, 0xc20 ?trans1;
UMOV UR5, 0x40080000 ?WAIT6_END_GROUP;
CALL.REL.NOINC 0x12d0 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
DADD R6, R12, 3 &wr=0x0 ?trans1;
LOP3.LUT R0, R5, 0x80000000, RZ, 0x3c, !PT ?trans1;
BSSY.RECONVERGENT B0, 0xe30 ?trans1;
LOP3.LUT R6, R7, 0x7ff00000, RZ, 0xc0, !PT &req={0} ?trans1;
@!P2 MOV R4, RZ ?trans2;
FSEL R5, R0, R5, !P1 ?trans1;
@!P2 MOV R5, R13 ?trans1;
ISETP.NE.AND P0, PT, R6, 0x7ff00000, PT ?WAIT15_END_GROUP;
NOP ?WAIT11_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.NEU.AND P3, PT, R12, 1, PT &rd=0x0 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, -RZ, |R12| &rd=0x0 &wr=0x2 ?trans2;
@P0 BRA 0xe20 &req={2,1,0} ?trans5;
DSETP.NAN.AND P0, PT, R12, R12, PT &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@P0 DADD R4, R12, 3 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0xe20 &req={1,0} ?trans5;
ISETP.NE.AND P0, PT, R12, RZ, PT ?trans1;
LOP3.LUT R0, R13, 0x7fffffff, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.OR P0, PT, R0, 0x7ff00000, P0 ?WAIT13_END_GROUP;
@!P0 MOV R0, 0xfff00000 ?trans1;
@!P0 MOV R4, RZ ?WAIT4_END_GROUP;
@!P0 SEL R5, R0, 0x7ff00000, !P1 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
DMUL R4, R4, 4 &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0xf60 ?trans1;
MOV R0, 0xf50 ?trans1;
UMOV UR5, 0x40000000 ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R16, 5, R4 &req={0} &rd=0x0 &wr=0x1 ?trans2;
MOV R4, R8 &req={0} ?trans1;
MOV R5, R9 ?trans1;
FSEL R16, R16, RZ, P3 &req={1} ?trans1;
FSEL R17, R17, 2.53125, P3 ?WAIT15_END_GROUP;
NOP ?WAIT14_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.NEU.AND P1, PT, R12, RZ, PT &rd=0x0 &wr=0x1 ?trans2;
CALL.REL.NOINC 0x12d0 &req={1,0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
DADD R6, R12, 2 &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0x1110 ?trans1;
LOP3.LUT R6, R7, 0x7ff00000, RZ, 0xc0, !PT &req={0} ?trans1;
@!P1 MOV.64 R4, RZ ?WAIT4_END_GROUP;
ISETP.NE.AND P0, PT, R6, 0x7ff00000, PT ?WAIT15_END_GROUP;
NOP ?WAIT12_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.NEU.AND P2, PT, R12, 1, PT &rd=0x0 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R12, R16 &rd=0x0 &wr=0x2 ?trans2;
@P0 BRA 0x1100 &req={2,1,0} ?trans5;
DSETP.NAN.AND P0, PT, R12, R12, PT &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@P0 DADD R4, R12, 2 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0x1100 &req={1,0} ?trans5;
ISETP.NE.AND P0, PT, R12, RZ, PT ?trans1;
LOP3.LUT R12, R13, 0x7fffffff, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.OR P0, PT, R12, 0x7ff00000, P0 ?WAIT13_END_GROUP;
@!P0 MOV.64 R4, 0x7ff0000000000000 ?WAIT8_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU.64 UR4, c[0x0][0x390] &wr=0x0 ?trans1;
DMUL R4, R4, 10 &wr=0x1 ?trans2;
FSEL R4, R4, RZ, P2 &req={1} ?trans1;
FSEL R5, R5, 2.5625, P2 ?trans1;
LDCU.64 UR6, c[0x0][0x380] &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R16, -R4 &rd=0x1 &wr=0x2 ?trans2;
LEA R4, P0, R2, UR6, 0x3 &req={1} ?WAIT4_END_GROUP;
LEA.HI.X R5, R2, UR7, R3, 0x3, P0 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R14, R14, R16 &req={2} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R14, UR4 &req={0} &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R14, 0.5 &req={0} &wr=0x1 ?trans2;
STG.E.64 desc[UR4][R4.64], R14 &req={1} ?trans1;
EXIT ?trans5;
ISETP.GT.U32.AND P0, PT, R5, 0xfffff, PT ?trans1;
MOV R6, R5 ?trans1;
UMOV.64 UR6, 0x4330000080000000 ?trans1;
UMOV.64 UR8, 0x3fe62e42fefa39ef ?WAIT10_END_GROUP;
@!P0 DMUL R10, R4, 1.80143985094819840000e+16 &wr=0x0 ?trans2;
@!P0 MOV R6, R11 &req={0} ?trans1;
@!P0 MOV R4, R10 ?trans1;
SHF.R.U32.HI R5, RZ, 0x14, R5 ?trans2;
@!P0 LEA.HI R5, R11, 0xffffffca, RZ, 0xc ?trans2;
LOP3.LUT R6, R6, 0x800fffff, RZ, 0xc0, !PT ?trans1;
MOV R10, RZ ?WAIT3_END_GROUP;
LOP3.LUT R7, R6, 0x3ff00000, RZ, 0xfc, !PT ?trans1;
MOV R6, R4 ?trans1;
IADD3 R4, PT, PT, R5, -0x3ff, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P3, PT, R7, 0x3ff6a09f, PT ?WAIT13_END_GROUP;
@P3 IADD3 R9, PT, PT, R7, -0x100000, RZ ?trans2;
@P3 IADD3 R4, PT, PT, R5, -0x3fe, RZ ?trans1;
HFMA2 R5, -RZ, RZ, 3.59375, 0 ?trans2;
@P3 MOV R7, R9 ?trans1;
LOP3.LUT R4, R4, 0x80000000, RZ, 0x3c, !PT ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
DADD R18, R6, 1 &wr=0x0 ?trans2;
MUFU.RCP64H R11, R19 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, R6, -1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, -R18, R10, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R6, R6, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R10, R6, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R6, R8, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R8, R10, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R8, -R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R20, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, -R6, R20 &req={0} &rd=0x0 &wr=0x1 ?trans2;
MOV.64 R20, 0x3ed0f5d241ad3b5a &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R22, R6, R6 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R10, R8 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R6, R22 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R24, R6, R6, -R22 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R6, R22, -R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, R8, R22, R18 &req={0} &rd=0x0 ?trans2;
IADD3 R19, PT, PT, R9, 0x100000, RZ &req={0} ?trans1;
MOV R18, R8 ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R4, R4, -UR6 ?trans1;
UMOV.64 UR6, 0x3eb0f5ff7d2cafe2 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R24, R6, R18, R24 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R18, R6, R6 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R18, UR6, R20 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3ef3b20a75488a3f ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R18, R20, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3f1745cde4faecd5 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R18, R20, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3f3c71c7258a578b ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R18, R20, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3f6249249242b910 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R18, R20, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3f89999999999dfb ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R18, R20, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3fb5555555555555 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, R6, R24, R22 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R24, R18, R20, UR6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R26, -R24, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3c46a4cb00b9e7b0 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R26, R18, R20, R26 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R26, R26, -UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3fe62e42fefa39ef ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R24, R26 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R24, R24, -R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R24, R26, R24 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R20, R18, R10 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R26, R18, R10, -R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, R18, R22, R26 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, R24, R10, R22 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, R20, R22 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R6, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R20, -R10 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R6, R6, -R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R22, R20 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R6, R10, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R6, R20, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, R8, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, R18, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, -R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R4, UR6, R10 &wr=0x1 ?trans1;
UMOV.64 UR6, 0x3c7abc9e3b39803f ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R8, R18 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R4, -UR8, R6 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, -R10, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, R18, -R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R4, UR6, R8 &req={0} &wr=0x0 ?trans1;
UIADD3 UR7, UPT, UPT, UR5, UR5, URZ ?trans1;
ULOP3.LUT UR6, UR5, 0xff0fffff, URZ, 0xc0, !UPT ?WAIT3_END_GROUP;
UISETP.GT.U32.AND UP0, UPT, UR7, -0x2000001, UPT ?WAIT4_END_GROUP;
USEL UR7, UR6, UR5, UP0 ?WAIT3_END_GROUP;
UMOV UR6, UR4 ?WAIT15_END_GROUP;
NOP ?WAIT7_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R4, R6, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R6, R6, -R4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R4, UR6 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R6, R8, R6 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R4, UR6, -R10 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R6, UR6, R4 &req={0} &rd=0x0 &wr=0x1 ?trans1;
UMOV.64 UR6, 0x3c7abc9e3b39803f ?trans1;
MOV.64 R6, 0x3ff71547652b82fe &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R4, R10, R8 &req={1} &wr=0x0 ?trans2;
FSETP.GEU.AND P0, PT, |R5|, 4.1917929649353027344, PT &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, R10, -R4 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R4, R6, 6.75539944105574400000e+15 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, R8, R10 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, R6, -6.75539944105574400000e+15 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, -UR8, R4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R10, -UR6, R18 &req={0} &rd=0x0 &wr=0x1 ?trans1;
UMOV.64 UR6, 0x3e5ade1569ce2bdf ?trans1;
MOV.64 R18, 0x3e928af3fca213ea &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, UR6, R18 &req={1} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3ec71dee62401315 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3efa01997c89eb71 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3f2a01a014761f65 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3f56c16c1852b7af ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3f81111111122322 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3fa55555555502a1 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3fc5555555555511 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3fe000000000000b ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, UR6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, 1 &req={0} &wr=0x0 ?trans2;
IMAD R11, R6, 0x100000, R19 &req={0} ?trans1;
MOV R10, R18 ?trans1;
@!P0 BRA 0x2f50 ?trans6;
FSETP.GEU.AND P3, PT, |R5|, 4.2275390625, PT ?trans1;
DSETP.GEU.AND P0, PT, R4, RZ, PT ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, R4, +INF &rd=0x0 &wr=0x1 ?trans2;
@!P3 LEA.HI R4, R6, R6, RZ, 0x1 &req={0} ?trans1;
FSEL R10, R10, RZ, P0 &req={1} ?trans1;
FSEL R11, R11, RZ, P0 ?trans2;
@!P3 SHF.R.S32.HI R5, RZ, 0x1, R4 ?trans1;
@!P3 MOV R4, R18 ?WAIT3_END_GROUP;
@!P3 IADD3 R6, PT, PT, R6, -R5, RZ ?trans1;
@!P3 IMAD R5, R5, 0x100000, R19 ?WAIT3_END_GROUP;
@!P3 LEA R7, R6, 0x3ff00000, 0x14 ?trans1;
@!P3 MOV R6, RZ ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P3 DMUL R10, R4, R6 &rd=0x0 &wr=0x1 ?trans2;
LOP3.LUT R4, R11.reuse, 0x7fffffff, RZ, 0xc0, !PT &req={1,0} ?trans1;
DFMA R8, R8, R10, R10 &wr=0x0 ?trans1;
ISETP.NE.AND P0, PT, R10, RZ, PT ?trans1;
MOV R6, R0 ?trans1;
MOV R7, 0x0 ?trans1;
ISETP.NE.AND P3, PT, R4, 0x7ff00000, PT ?trans2;
FSEL R5, R10, R8, !P0 &req={0} ?trans1;
FSEL R11, R11, R9, !P0 ?WAIT4_END_GROUP;
FSEL R4, R5, R8, !P3 ?trans1;
FSEL R5, R11, R9, !P3 ?trans1;
RET.REL.NODEC R6 0x0 ?trans6;
BRA 0x3000;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: calculate(double*, double, double, long long)
_Z9calculatePdddx:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b256 s[16:23], s[0:1], 0x0
s_mov_b32 s32, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s0, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[44:45], null, s15, s0, v[0:1]
s_mov_b32 s0, exec_lo
v_ashrrev_i32_e32 v45, 31, v44
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i64_e64 s[22:23], v[44:45]
s_cbranch_execz .LBB1_2
v_cvt_f64_i32_e32 v[0:1], v44
s_getpc_b64 s[10:11]
s_add_u32 s10, s10, _Z11polynominald@rel32@lo+4
s_addc_u32 s11, s11, _Z11polynominald@rel32@hi+12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[40:41], v[0:1], s[20:21], s[18:19]
v_dual_mov_b32 v0, v40 :: v_dual_mov_b32 v1, v41
s_swappc_b64 s[30:31], s[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_dual_mov_b32 v42, v0 :: v_dual_mov_b32 v43, v1
v_add_f64 v[0:1], v[40:41], s[20:21]
s_swappc_b64 s[30:31], s[10:11]
v_add_f64 v[0:1], v[42:43], v[0:1]
v_lshlrev_b64 v[2:3], 3, v[44:45]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s16, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s17, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[0:1], v[0:1], s[20:21]
v_mul_f64 v[0:1], v[0:1], 0.5
global_store_b64 v[2:3], v[0:1], off
.LBB1_2:
s_endpgm
| calculate | 12,637 | 818 | stackv2-00000-of-00015 |
// Demangled: kernel_sum(int*, int*, int*, int)
Function : _Z10kernel_sumPiS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R9, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x398] &wr=0x2 ?trans1;
IMAD R9, R9, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R9, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD.WIDE R2, R9, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x4 ?trans1;
IMAD.WIDE R4, R9, 0x4, R4 &req={2} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x4 ?trans1;
IMAD.WIDE R6, R9, 0x4, R6 &req={3} ?trans1;
IADD3 R9, PT, PT, R2, R5, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x140;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: kernel_sum(int*, int*, int*, int)
_Z10kernel_sumPiS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[4:7], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| kernel_sum | 574 | 577 | stackv2-00000-of-00015 |
// Demangled: mat_add(float*, float*, float*)
Function : _Z7mat_addPfS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R7, SR_TID.X &wr=0x0 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
S2R R9, SR_TID.Y &wr=0x2 ?trans6;
LDC R0, c[0x0][0x360] &wr=0x0 ?trans8;
S2UR UR7, SR_CTAID.Y &wr=0x2 ?trans8;
LDC R6, c[0x0][0x364] &wr=0x2 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD R0, R0, UR6, R7 &req={0} ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
IMAD R7, R6, UR7, R9 &req={2} ?WAIT5_END_GROUP;
LEA R9, R7, R0, 0x8 ?trans2;
LDC.64 R6, c[0x0][0x390] &wr=0x2 ?trans3;
IMAD.WIDE R2, R9, 0x4, R2 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R9.reuse, 0x4, R4 &req={0} ?trans2;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x3 ?trans4;
LDG.E R5, desc[UR4][R4.64] &wr=0x3 ?trans1;
IMAD.WIDE R6, R9, 0x4, R6 &req={2} ?WAIT4_END_GROUP;
FADD R9, R2, R5 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x160;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: mat_add(float*, float*, float*)
_Z7mat_addPfS_S_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_and_b32 s2, s2, 0xffff
s_mul_i32 s15, s15, s3
s_mul_i32 s14, s14, s2
v_add_lshl_u32 v1, s15, v1, 8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add3_u32 v0, s14, v0, v1
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| mat_add | 596 | 595 | stackv2-00000-of-00015 |
// Demangled: multMatriz(float*, float*, float*, int)
Function : _Z10multMatrizPfS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_TID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x2 ?trans6;
S2UR UR5, SR_CTAID.X &wr=0x1 ?trans1;
S2R R0, SR_TID.Y &wr=0x3 ?trans1;
LDCU UR9, c[0x0][0x398] &wr=0x4 ?trans6;
LDC R3, c[0x0][0x360] &wr=0x1 ?trans1;
LDCU UR7, c[0x0][0x364] &wr=0x0 ?trans7;
S2UR UR6, SR_CTAID.Y &wr=0x3 ?trans8;
LDC R5, c[0x0][0x364] &wr=0x3 ?trans1;
IMAD R2, R3, UR5, R2 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R2, UR9, PT &req={4} ?trans1;
IMAD R0, R5, UR6, R0 &req={3} ?WAIT12_END_GROUP;
@P0 EXIT &req={2,0} ?trans5;
LDCU UR5, c[0x0][0x370] &wr=0x0 ?trans1;
ISETP.NE.AND P0, PT, RZ, UR9, PT ?trans1;
LDCU.64 UR12, c[0x0][0x358] &wr=0x1 ?trans1;
UIMAD UR4, UR4, UR5, URZ &req={0} ?WAIT11_END_GROUP;
@P0 BRA 0x1b0 ?trans5;
ISETP.GE.AND P0, PT, R0, UR9, PT ?WAIT13_END_GROUP;
@!P0 LDC.64 R6, c[0x0][0x390] &wr=0x0 ?trans2;
@!P0 IMAD.WIDE R4, R2.reuse, 0x4, R6 &req={0} ?trans1;
IADD3 R2, PT, PT, R2, UR4, RZ ?WAIT4_END_GROUP;
@!P0 STG.E desc[UR12][R4.64], RZ &req={1} &rd=0x2 ?trans1;
ISETP.GE.AND P1, PT, R2, RZ, PT ?WAIT13_END_GROUP;
@!P1 BRA 0x150 &req={2} ?trans5;
EXIT ?trans5;
LDCU UR8, c[0x0][0x374] &wr=0x0 ?trans1;
HFMA2 R32, -RZ, RZ, 0, 0 ?trans1;
ULOP3.LUT UR11, UR9, 0x7, URZ, 0xc0, !UPT ?trans1;
UIADD3 UR10, UPT, UPT, UR9, -0x1, URZ ?trans1;
ULOP3.LUT UR6, UR9, 0xfffffff8, URZ, 0xc0, !UPT ?trans1;
ULOP3.LUT UR5, UR9, 0x3, URZ, 0xc0, !UPT ?trans1;
UIADD3 UR9, UPT, UPT, UR11, -0x1, URZ ?trans1;
UISETP.GE.U32.AND UP0, UPT, UR10, 0x7, UPT ?trans1;
UIADD3 UR6, UPT, UPT, -UR6, URZ, URZ ?trans2;
UISETP.GE.U32.AND UP1, UPT, UR9, 0x3, UPT ?trans1;
UIMAD UR7, UR7, UR8, URZ &req={0} ?WAIT12_END_GROUP;
LDCU UR8, c[0x0][0x398] &req={0} &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0xd00 ?trans1;
MOV R5, UR8 &req={0} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, R5, PT ?WAIT13_END_GROUP;
@P0 BRA 0xcf0 ?trans5;
IADD3 R4, PT, PT, R2.reuse, R5.reuse, RZ ?trans2;
IADD3 R6, PT, PT, R2, R5, R5 ?trans1;
IMAD R7, R5.reuse, 0x3, R2.reuse ?trans1;
MOV R12, R0 ?trans1;
IMAD R8, R5.reuse, 0x4, R2.reuse ?trans2;
IMAD R9, R5.reuse, 0x5, R2.reuse ?trans2;
IMAD R10, R5.reuse, 0x6, R2.reuse ?trans2;
IMAD R11, R5, 0x7, R2 ?WAIT7_END_GROUP;
LDCU UR8, c[0x0][0x398] &req={0} &wr=0x0 ?trans1;
PLOP3.LUT P1, PT, PT, PT, UP0, 0x80, 0x8 ?trans1;
HFMA2 R26, -RZ, RZ, 0, 0 ?trans1;
MOV R5, UR8 &req={0} ?WAIT5_END_GROUP;
IMAD R13, R12.reuse, R5, RZ ?trans1;
IADD3 R12, PT, PT, R12, UR7, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R12, R5, PT ?trans1;
@!P1 BRA 0x850 ?WAIT12_END_GROUP;
MOV R14, 0x3 ?trans1;
MOV R15, UR6 ?trans1;
MOV R3, R13 ?trans1;
MOV R24, R2 ?trans1;
MOV R25, R11 ?trans1;
MOV R26, R10 ?trans1;
MOV R27, R9 ?trans1;
MOV R28, R8 ?trans1;
MOV R29, R7 ?trans1;
MOV R23, R6 ?trans1;
MOV R22, R4 ?WAIT7_END_GROUP;
LDC.64 R16, c[0x0][0x380] &wr=0x0 ?trans1;
IADD3 R21, PT, PT, R3, 0x1, RZ ?WAIT7_END_GROUP;
LDC.64 R18, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R20, R21, 0x4, R16 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R34, R3, 0x4, R16 ?trans1;
LDG.E R33, desc[UR12][R20.64] &req={1} &rd=0x0 &wr=0x3 ?trans3;
IMAD.WIDE.U32 R30, R24, 0x4, R18.reuse &req={2} ?trans2;
LDG.E R35, desc[UR12][R34.64] &wr=0x2 ?trans4;
LDG.E R30, desc[UR12][R30.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R20, R22, 0x4, R18 &req={0} ?WAIT5_END_GROUP;
LDG.E R36, desc[UR12][R20.64] &rd=0x0 &wr=0x3 ?trans1;
IADD3 R37, PT, PT, R3, 0x2, RZ ?trans1;
IMAD.WIDE.U32 R20, R29, 0x4, R18 &req={0} ?WAIT6_END_GROUP;
LDG.E R20, desc[UR12][R20.64] &wr=0x4 ?trans1;
FFMA R32, R35, R30, R32 &req={2} ?trans1;
IADD3 R35, PT, PT, R3, 0x3, RZ ?WAIT3_END_GROUP;
FFMA R30, R33, R36, R32 &req={3} ?trans1;
IMAD.WIDE.U32 R32, R37, 0x4, R16 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R36, R23, 0x4, R18 ?trans2;
LDG.E R33, desc[UR12][R32.64] &wr=0x2 ?trans2;
IMAD.WIDE.U32 R34, R35, 0x4, R16 ?trans2;
LDG.E R36, desc[UR12][R36.64] &wr=0x2 ?trans4;
LDG.E R34, desc[UR12][R34.64] &wr=0x4 ?trans1;
FFMA R31, R33, R36, R30 &req={2} ?WAIT4_END_GROUP;
FFMA R30, R34, R20, R31 &req={4} ?trans1;
IADD3 R31, PT, PT, R3.reuse, 0x5, RZ ?trans2;
IADD3 R33, PT, PT, R3, 0x4, RZ ?trans1;
IMAD.WIDE.U32 R34, R28, 0x4, R18 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R20, R31, 0x4, R16.reuse ?trans2;
LDG.E R34, desc[UR12][R34.64] &rd=0x0 &wr=0x2 ?trans2;
IMAD.WIDE.U32 R32, R33, 0x4, R16 ?trans2;
LDG.E R31, desc[UR12][R20.64] &rd=0x1 &wr=0x3 ?trans2;
IMAD.WIDE.U32 R36, R27, 0x4, R18 ?trans2;
LDG.E R33, desc[UR12][R32.64] &wr=0x2 ?trans1;
IADD3 R35, PT, PT, R3, 0x7, RZ &req={0} ?WAIT2_END_GROUP;
IADD3 R21, PT, PT, R3, 0x6, RZ &req={1} ?trans1;
LDG.E R32, desc[UR12][R36.64] &rd=0x0 &wr=0x3 ?trans4;
IMAD.WIDE.U32 R20, R21, 0x4, R16 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R16, R35, 0x4, R16 ?trans2;
LDG.E R20, desc[UR12][R20.64] &wr=0x4 ?trans2;
IMAD.WIDE.U32 R36, R26, 0x4, R18.reuse &req={0} ?trans2;
LDG.E R16, desc[UR12][R16.64] &wr=0x5 ?trans2;
IMAD.WIDE.U32 R18, R25, 0x4, R18 ?trans2;
LDG.E R37, desc[UR12][R36.64] &wr=0x4 ?trans4;
LDG.E R18, desc[UR12][R18.64] &wr=0x5 ?trans1;
IADD3 R15, PT, PT, R15, 0x8, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R15, RZ, PT ?trans1;
IADD3 R14, PT, PT, R14, 0x8, RZ ?trans2;
IADD3 R3, PT, PT, R3, 0x8, RZ ?trans1;
IMAD R22, R5.reuse, 0x8, R22 ?trans1;
LEA R28, R5.reuse, R28, 0x3 ?trans1;
IMAD R23, R5.reuse, 0x8, R23 ?trans1;
LEA R25, R5.reuse, R25, 0x3 ?trans1;
IMAD R29, R5.reuse, 0x8, R29 ?trans2;
IMAD R27, R5, 0x8, R27 ?WAIT2_END_GROUP;
IMAD R26, R5.reuse, 0x8, R26 ?trans2;
IMAD R24, R5, 0x8, R24 ?trans2;
FFMA R30, R33, R34, R30 &req={2} ?WAIT4_END_GROUP;
FFMA R31, R31, R32, R30 &req={3} ?WAIT4_END_GROUP;
FFMA R31, R20, R37, R31 &req={4} ?WAIT4_END_GROUP;
FFMA R32, R16, R18, R31 &req={5} ?trans1;
@P1 BRA 0x460 ?trans6;
IADD3 R26, PT, PT, R14, -0x3, RZ ?WAIT7_END_GROUP;
ISETP.NE.AND P1, PT, RZ, UR11, PT ?WAIT13_END_GROUP;
@!P1 BRA 0xca0 ?trans5;
PLOP3.LUT P2, PT, PT, PT, UP1, 0x80, 0x8 ?trans1;
ISETP.NE.AND P1, PT, RZ, UR5, PT ?WAIT12_END_GROUP;
@!P2 BRA 0xa90 ?trans5;
LDC.64 R18, c[0x0][0x380] &wr=0x0 ?trans1;
IMAD R28, R26, R5, R2 ?trans1;
IADD3 R3, PT, PT, R13, R26, RZ ?WAIT4_END_GROUP;
IADD3 R20, PT, PT, R28, R5.reuse, RZ ?trans2;
IADD3 R15, PT, PT, R3.reuse, 0x1, RZ ?trans1;
LDC.64 R16, c[0x0][0x388] &wr=0x2 ?trans1;
IADD3 R23, PT, PT, R3, 0x2, RZ ?trans2;
IADD3 R24, PT, PT, R20, R5, RZ ?WAIT4_END_GROUP;
IADD3 R27, PT, PT, R24, R5, RZ ?trans1;
IMAD.WIDE.U32 R30, R3.reuse, 0x4, R18 &req={0} ?trans1;
IADD3 R3, PT, PT, R3, 0x3, RZ ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R14, R15, 0x4, R18 ?trans2;
LDG.E R31, desc[UR12][R30.64] &req={1} &wr=0x3 ?trans2;
IMAD.WIDE.U32 R28, R28, 0x4, R16.reuse &req={2} ?trans2;
LDG.E R14, desc[UR12][R14.64] &wr=0x2 ?trans2;
IMAD.WIDE.U32 R20, R20, 0x4, R16 ?trans2;
LDG.E R28, desc[UR12][R28.64] &wr=0x3 ?trans2;
IMAD.WIDE.U32 R22, R23, 0x4, R18 ?WAIT2_END_GROUP;
LDG.E R20, desc[UR12][R20.64] &wr=0x2 ?trans2;
IMAD.WIDE.U32 R24, R24, 0x4, R16 ?trans2;
LDG.E R23, desc[UR12][R22.64] &wr=0x4 ?trans2;
IMAD.WIDE.U32 R18, R3, 0x4, R18 ?trans2;
LDG.E R24, desc[UR12][R24.64] &wr=0x4 ?trans2;
IMAD.WIDE.U32 R16, R27, 0x4, R16 ?WAIT2_END_GROUP;
LDG.E R19, desc[UR12][R18.64] &wr=0x5 ?trans4;
LDG.E R16, desc[UR12][R16.64] &wr=0x5 ?trans1;
IADD3 R26, PT, PT, R26, 0x4, RZ ?trans1;
FFMA R31, R31, R28, R32 &req={3} ?WAIT4_END_GROUP;
FFMA R14, R14, R20, R31 &req={2} ?WAIT4_END_GROUP;
FFMA R14, R23, R24, R14 &req={4} ?WAIT4_END_GROUP;
FFMA R32, R19, R16, R14 &req={5} ?WAIT7_END_GROUP;
@!P1 BRA 0xca0 ?trans5;
UISETP.NE.AND UP2, UPT, UR5, 0x1, UPT ?trans1;
LDC.64 R14, c[0x0][0x380] &wr=0x0 ?trans1;
LOP3.LUT P1, RZ, R5, 0x1, RZ, 0xc0, !PT ?trans1;
HFMA2 R19, -RZ, RZ, 0, 2.384185791015625e-07 ?trans1;
MOV R24, 0x4 ?trans1;
MOV R21, 0x4 ?trans1;
PLOP3.LUT P2, PT, PT, PT, UP2, 0x80, 0x8 ?trans1;
HFMA2 R23, -RZ, RZ, 0, 2.384185791015625e-07 ?trans2;
LDC.64 R16, c[0x0][0x388] &wr=0x2 ?trans2;
@UP2 LDCU.128 UR16, c[0x0][0x380] &wr=0x3 ?trans8;
@P2 IADD3 R3, PT, PT, R13, R26, RZ ?trans1;
@P2 IMAD R18, R26.reuse, R5, R2 ?trans1;
@P2 IADD3 R26, PT, PT, R26, 0x2, RZ ?WAIT2_END_GROUP;
@P2 IADD3 R20, PT, PT, R3.reuse, 0x1, RZ ?trans2;
@P2 IADD3 R22, PT, PT, R18, R5, RZ ?trans1;
@P2 IMAD.WIDE.U32 R24, R3, R24, UR16 &req={3} ?trans1;
@P1 IADD3 R3, PT, PT, R13, R26, RZ ?WAIT3_END_GROUP;
@P2 IMAD.WIDE.U32 R18, R18, R19, UR18 ?trans2;
@P2 LDG.E R25, desc[UR12][R24.64] &req={1} &wr=0x3 ?trans2;
@P2 IMAD.WIDE.U32 R20, R20, R21, UR16 ?trans2;
@P2 LDG.E R18, desc[UR12][R18.64] &wr=0x3 ?trans2;
@P2 IMAD.WIDE.U32 R22, R22, R23, UR18 ?trans2;
@P2 LDG.E R20, desc[UR12][R20.64] &wr=0x4 ?trans2;
@P1 IMAD R27, R26, R5, R2 ?WAIT2_END_GROUP;
@P1 IMAD.WIDE.U32 R14, R3, 0x4, R14 &req={0} ?trans1;
@P2 LDG.E R22, desc[UR12][R22.64] &wr=0x4 ?trans3;
@P1 IMAD.WIDE.U32 R16, R27, 0x4, R16 &req={2} ?trans2;
@P1 LDG.E R15, desc[UR12][R14.64] &wr=0x2 ?trans4;
@P1 LDG.E R16, desc[UR12][R16.64] &wr=0x2 ?trans1;
@P2 FFMA R25, R25, R18, R32 &req={3} ?WAIT4_END_GROUP;
@P2 FFMA R32, R20, R22, R25 &req={4} ?WAIT4_END_GROUP;
@P1 FFMA R32, R15, R16, R32 &req={2} ?WAIT7_END_GROUP;
LDC.64 R14, c[0x0][0x390] &wr=0x0 ?trans1;
IADD3 R13, PT, PT, R13, R2, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R14, R13, 0x4, R14 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR12][R14.64], R32 &req={1} &rd=0x0 ?trans1;
@!P0 BRA 0x330 ?trans5;
BSYNC.RECONVERGENT B0 &req={1} ?trans5;
IADD3 R2, PT, PT, R2, UR4, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R2, R5, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x260 ?trans5;
EXIT ?trans5;
BRA 0xd40;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: multMatriz(float*, float*, float*, int)
_Z10multMatrizPfS_S_i:
s_clause 0x1
s_load_b32 s9, s[0:1], 0x2c
s_load_b32 s8, s[0:1], 0x18
v_and_b32_e32 v3, 0x3ff, v0
s_add_u32 s2, s0, 32
s_addc_u32 s3, s1, 0
s_mov_b32 s4, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s12, s9, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s14, s12, v[3:4]
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB0_11
s_load_b64 s[16:17], s[2:3], 0x0
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x10
v_bfe_u32 v0, v0, 10, 10
s_lshr_b32 s1, s9, 16
v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v7, 0
s_cmp_lg_u32 s8, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, s15, s1, v[0:1]
s_mov_b32 s9, 0
s_cselect_b32 s10, -1, 0
v_mul_lo_u32 v0, s8, v2
v_cmp_gt_i32_e64 s0, s8, v2
s_waitcnt lgkmcnt(0)
s_mul_i32 s11, s17, s1
s_mul_i32 s12, s16, s12
s_mul_i32 s13, s11, s8
.LBB0_2:
s_and_saveexec_b32 s14, s0
s_cbranch_execz .LBB0_10
v_dual_mov_b32 v8, v0 :: v_dual_mov_b32 v9, v2
s_mov_b32 s15, 0
.LBB0_4:
s_and_not1_b32 vcc_lo, exec_lo, s10
s_cbranch_vccnz .LBB0_7
s_delay_alu instid0(VALU_DEP_1)
v_mul_lo_u32 v10, v9, s8
v_mov_b32_e32 v5, v1
s_mov_b32 s1, 0
.LBB0_6:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_dual_mov_b32 v6, v4 :: v_dual_add_nc_u32 v3, s1, v8
s_add_i32 s1, s1, 1
s_cmp_eq_u32 s8, s1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[11:12], 2, v[3:4]
v_lshlrev_b64 v[13:14], 2, v[5:6]
v_add_nc_u32_e32 v5, s8, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v11, vcc_lo, s4, v11
v_add_co_ci_u32_e32 v12, vcc_lo, s5, v12, vcc_lo
s_delay_alu instid0(VALU_DEP_4)
v_add_co_u32 v13, vcc_lo, s6, v13
v_add_co_ci_u32_e32 v14, vcc_lo, s7, v14, vcc_lo
global_load_b32 v3, v[11:12], off
global_load_b32 v6, v[13:14], off
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v7, v3, v6
s_cbranch_scc0 .LBB0_6
s_branch .LBB0_8
.LBB0_7:
v_mov_b32_e32 v10, 0
.LBB0_8:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v5, v10, v1
v_add_nc_u32_e32 v9, s11, v9
v_add_nc_u32_e32 v8, s13, v8
v_ashrrev_i32_e32 v6, 31, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_i32_e32 vcc_lo, s8, v9
v_lshlrev_b64 v[5:6], 2, v[5:6]
s_or_b32 s15, vcc_lo, s15
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v5, s1, s2, v5
v_add_co_ci_u32_e64 v6, s1, s3, v6, s1
global_store_b32 v[5:6], v7, off
s_and_not1_b32 exec_lo, exec_lo, s15
s_cbranch_execnz .LBB0_4
s_or_b32 exec_lo, exec_lo, s15
.LBB0_10:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
s_or_b32 exec_lo, exec_lo, s14
v_add_nc_u32_e32 v1, s12, v1
v_cmp_le_i32_e32 vcc_lo, s8, v1
s_or_b32 s9, vcc_lo, s9
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s9
s_cbranch_execnz .LBB0_2
.LBB0_11:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| multMatriz | 5,629 | 1,717 | stackv2-00000-of-00015 |
// Demangled: gpuAdd(int*, int*, int*)
Function : _Z6gpuAddPiS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x388] &wr=0x1 ?trans1;
LDG.E R2, desc[UR4][R2.64] &req={0} &wr=0x2 ?trans4;
LDG.E R5, desc[UR4][R4.64] &req={1} &wr=0x2 ?trans3;
LDC.64 R6, c[0x0][0x390] &wr=0x0 ?trans1;
IADD3 R9, PT, PT, R2, R5, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 &req={0} ?trans1;
EXIT ?trans5;
BRA 0xa0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: gpuAdd(int*, int*, int*)
_Z6gpuAddPiS_S_:
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_load_b32 s2, s[4:5], 0x0
s_load_b32 s3, s[6:7], 0x0
s_waitcnt lgkmcnt(0)
s_add_i32 s2, s3, s2
s_delay_alu instid0(SALU_CYCLE_1)
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| gpuAdd | 332 | 212 | stackv2-00000-of-00015 |
// Demangled: gpu(float*, float*, int)
Function : _Z3gpuPfS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R7, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x2 ?trans1;
IMAD R7, R7, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD.WIDE R2, R7, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x3 ?trans1;
IMAD.WIDE R4, R7, 0x4, R4 &req={2} ?WAIT4_END_GROUP;
FMUL R7, R2, R2 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R7 ?trans1;
EXIT ?trans5;
BRA 0x110;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: gpu(float*, float*, int)
_Z3gpuPfS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[0:3], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_mul_f32_e32 v2, v2, v2
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| gpu | 487 | 489 | stackv2-00000-of-00015 |
// Demangled: vadd(float const*, float const*, float*, int)
Function : _Z4vaddPKfS0_Pfi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R9, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x398] &wr=0x2 ?trans1;
IMAD R9, R9, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R9, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD.WIDE R2, R9, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x4 ?trans1;
IMAD.WIDE R4, R9, 0x4, R4 &req={2} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x4 ?trans1;
IMAD.WIDE R6, R9, 0x4, R6 &req={3} ?WAIT4_END_GROUP;
FADD R9, R2, R5 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x140;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: vadd(float const*, float const*, float*, int)
_Z4vaddPKfS0_Pfi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[4:7], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| vadd | 569 | 577 | stackv2-00000-of-00015 |
// Demangled: findNearestVertexKernelOne(int*, int*, int*, int*, int*, int, int)
Function : _Z26findNearestVertexKernelOnePiS_S_S_S_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_CTAID.X &wr=0x1 ?trans7;
S2UR UR7, SR_CgaCtaId &wr=0x2 ?trans1;
LDCU UR6, c[0x0][0x3ac] &wr=0x3 ?trans1;
HFMA2 R2, -RZ, RZ, 0, 0.027587890625 ?trans1;
S2R R4, SR_TID.X &wr=0x4 ?trans1;
UMOV UR4, 0x400 ?WAIT2_END_GROUP;
UIADD3 UR5, UPT, UPT, UR4, 0x1000, URZ ?trans1;
UIADD3 UR6, UPT, UPT, UR6, -0x1, URZ &req={3} ?trans1;
ULEA UR4, UR7, UR4, 0x18 &req={2} ?trans2;
ULEA UR5, UR7, UR5, 0x18 ?trans1;
IMAD.SHL.U32 R3, R0, 0x400, RZ &req={1} ?WAIT3_END_GROUP;
LEA R6, R4.reuse, UR4, 0x2 &req={4} ?trans2;
LOP3.LUT R7, R3, R4, RZ, 0xfc, !PT ?trans2;
LEA R5, R4, UR5, 0x2 ?trans1;
STS [R6], RZ &rd=0x1 ?trans2;
ISETP.GE.AND P0, PT, R7, UR6, PT ?trans2;
STS [R5], R2 &rd=0x1 ?trans11;
@P0 EXIT &req={1,0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R10, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R8, R7, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R9, desc[UR6][R8.64] &req={1} &wr=0x3 ?trans1;
IMAD.WIDE.U32 R10, R7, 0x4, R10 &req={2} ?WAIT6_END_GROUP;
LDG.E R10, desc[UR6][R10.64] &wr=0x2 ?trans1;
ISETP.GT.U32.AND P0, PT, R4, 0x1ff, PT ?trans1;
BSSY.RECONVERGENT B0, 0x330 ?trans2;
STS [R6], R9 &req={3} &rd=0x0 ?trans4;
STS [R5], R10 &req={2} &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 BRA 0x320 ?trans5;
LDS R7, [R6] &wr=0x1 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={1} ?WAIT13_END_GROUP;
@!P0 BRA 0x2d0 ?trans5;
LDS R7, [R6+0x800] &wr=0x1 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={1} ?WAIT13_END_GROUP;
@!P0 BRA 0x320 ?trans5;
LDS R8, [R5] ?trans4;
LDS R9, [R5+0x800] &req={0} &wr=0x0 ?trans2;
ISETP.GT.AND P0, PT, R8, R9, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0x320 ?trans5;
STS [R6], R7 &rd=0x1 ?trans4;
STS [R5], R9 &rd=0x1 ?trans1;
BRA 0x320 ?trans5;
LDS R7, [R6+0x800] &wr=0x1 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={1} ?WAIT13_END_GROUP;
@P0 STS [R6], R7 ?trans4;
@P0 LDS R8, [R5+0x800] &wr=0x1 ?trans4;
@P0 STS [R5], R8 &req={1} &rd=0x2 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R4, 0xff, PT ?WAIT5_END_GROUP;
BSSY.RECONVERGENT B0, 0x4a0 ?trans8;
@P0 BRA 0x490 ?trans5;
LDS R7, [R6] &req={1} &wr=0x1 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={1} ?WAIT13_END_GROUP;
@!P0 BRA 0x440 ?trans5;
LDS R7, [R6+0x400] &wr=0x1 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={1} ?WAIT13_END_GROUP;
@!P0 BRA 0x490 ?trans5;
LDS R8, [R5] &req={2} ?trans4;
LDS R9, [R5+0x400] &req={0} &wr=0x0 ?trans2;
ISETP.GT.AND P0, PT, R8, R9, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0x490 ?trans5;
STS [R6], R7 &rd=0x3 ?trans4;
STS [R5], R9 &rd=0x3 ?trans1;
BRA 0x490 ?trans5;
LDS R7, [R6+0x400] &wr=0x1 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={1} ?WAIT13_END_GROUP;
@P0 STS [R6], R7 ?trans4;
@P0 LDS R8, [R5+0x400] &req={2} &wr=0x1 ?trans4;
@P0 STS [R5], R8 &req={1} &rd=0x4 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R4, 0x7f, PT ?WAIT5_END_GROUP;
BSSY.RECONVERGENT B0, 0x610 ?trans8;
@P0 BRA 0x600 ?trans5;
LDS R7, [R6] &req={3,1} &wr=0x1 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={1} ?WAIT13_END_GROUP;
@!P0 BRA 0x5b0 ?trans5;
LDS R7, [R6+0x200] &wr=0x1 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={1} ?WAIT13_END_GROUP;
@!P0 BRA 0x600 ?trans5;
LDS R8, [R5] &req={4,2} ?trans4;
LDS R9, [R5+0x200] &req={0} &wr=0x0 ?trans2;
ISETP.GT.AND P0, PT, R8, R9, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0x600 ?trans5;
STS [R6], R7 &rd=0x0 ?trans4;
STS [R5], R9 &rd=0x0 ?trans1;
BRA 0x600 ?trans5;
LDS R7, [R6+0x200] &wr=0x1 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={1} ?WAIT13_END_GROUP;
@P0 STS [R6], R7 ?trans4;
@P0 LDS R8, [R5+0x200] &req={4,2} &wr=0x1 ?trans4;
@P0 STS [R5], R8 &req={1} &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R4, 0x3f, PT ?WAIT5_END_GROUP;
BSSY.RECONVERGENT B0, 0x780 ?trans8;
@P0 BRA 0x770 ?trans5;
LDS R7, [R6] &req={3,1,0} &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0x720 ?trans5;
LDS R7, [R6+0x100] &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0x770 ?trans5;
LDS R8, [R5] &req={4,2} ?trans4;
LDS R9, [R5+0x100] &wr=0x0 ?trans2;
ISETP.GT.AND P0, PT, R8, R9, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0x770 ?trans5;
STS [R6], R7 &rd=0x0 ?trans4;
STS [R5], R9 &rd=0x0 ?trans1;
BRA 0x770 ?trans5;
LDS R7, [R6+0x100] &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={0} ?WAIT13_END_GROUP;
@P0 STS [R6], R7 ?trans4;
@P0 LDS R8, [R5+0x100] &req={4,2} &wr=0x0 ?trans4;
@P0 STS [R5], R8 &req={0} &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R4, 0x1f, PT ?WAIT5_END_GROUP;
BSSY.RECONVERGENT B0, 0x8f0 ?trans8;
@P0 BRA 0x8e0 ?trans5;
LDS R7, [R6] &req={3,1,0} &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0x890 ?trans5;
LDS R7, [R6+0x80] &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0x8e0 ?trans5;
LDS R8, [R5] &req={4,2} ?trans4;
LDS R9, [R5+0x80] &wr=0x0 ?trans2;
ISETP.GT.AND P0, PT, R8, R9, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0x8e0 ?trans5;
STS [R6], R7 &rd=0x0 ?trans4;
STS [R5], R9 &rd=0x0 ?trans1;
BRA 0x8e0 ?trans5;
LDS R7, [R6+0x80] &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={0} ?WAIT13_END_GROUP;
@P0 STS [R6], R7 ?trans4;
@P0 LDS R8, [R5+0x80] &req={4,2} &wr=0x0 ?trans4;
@P0 STS [R5], R8 &req={0} &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R4, 0xf, PT ?WAIT5_END_GROUP;
BSSY.RECONVERGENT B0, 0xa60 ?trans8;
@P0 BRA 0xa50 ?trans5;
LDS R7, [R6] &req={3,1,0} &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0xa00 ?trans5;
LDS R7, [R6+0x40] &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0xa50 ?trans5;
LDS R8, [R5] &req={4,2} ?trans4;
LDS R9, [R5+0x40] &wr=0x0 ?trans2;
ISETP.GT.AND P0, PT, R8, R9, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0xa50 ?trans5;
STS [R6], R7 &rd=0x0 ?trans4;
STS [R5], R9 &rd=0x0 ?trans1;
BRA 0xa50 ?trans5;
LDS R7, [R6+0x40] &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={0} ?WAIT13_END_GROUP;
@P0 STS [R6], R7 ?trans4;
@P0 LDS R8, [R5+0x40] &req={4,2} &wr=0x0 ?trans4;
@P0 STS [R5], R8 &req={0} &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R4, 0x7, PT ?WAIT5_END_GROUP;
BSSY.RECONVERGENT B0, 0xbd0 ?trans8;
@P0 BRA 0xbc0 ?trans5;
LDS R7, [R6] &req={3,1,0} &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0xb70 ?trans5;
LDS R7, [R6+0x20] &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0xbc0 ?trans5;
LDS R8, [R5] &req={4,2} ?trans4;
LDS R9, [R5+0x20] &wr=0x0 ?trans2;
ISETP.GT.AND P0, PT, R8, R9, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0xbc0 ?trans5;
STS [R6], R7 &rd=0x0 ?trans4;
STS [R5], R9 &rd=0x0 ?trans1;
BRA 0xbc0 ?trans5;
LDS R7, [R6+0x20] &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={0} ?WAIT13_END_GROUP;
@P0 STS [R6], R7 ?trans4;
@P0 LDS R8, [R5+0x20] &req={4,2} &wr=0x0 ?trans4;
@P0 STS [R5], R8 &req={0} &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R4, 0x3, PT ?WAIT5_END_GROUP;
BSSY.RECONVERGENT B0, 0xd40 ?trans8;
@P0 BRA 0xd30 ?trans5;
LDS R7, [R6] &req={3,1,0} &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0xce0 ?trans5;
LDS R7, [R6+0x10] &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0xd30 ?trans5;
LDS R8, [R5] &req={4,2} ?trans4;
LDS R9, [R5+0x10] &wr=0x0 ?trans2;
ISETP.GT.AND P0, PT, R8, R9, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0xd30 ?trans5;
STS [R6], R7 &rd=0x0 ?trans4;
STS [R5], R9 &rd=0x0 ?trans1;
BRA 0xd30 ?trans5;
LDS R7, [R6+0x10] &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={0} ?WAIT13_END_GROUP;
@P0 STS [R6], R7 ?trans4;
@P0 LDS R8, [R5+0x10] &req={4,2} &wr=0x0 ?trans4;
@P0 STS [R5], R8 &req={0} &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R4, 0x1, PT ?WAIT5_END_GROUP;
BSSY.RECONVERGENT B0, 0xeb0 ?trans8;
@P0 BRA 0xea0 ?trans5;
LDS R7, [R6] &req={3,1,0} &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0xe50 ?trans5;
LDS R7, [R6+0x8] &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0xea0 ?trans5;
LDS R8, [R5] &req={4,2} ?trans4;
LDS R9, [R5+0x8] &wr=0x0 ?trans2;
ISETP.GT.AND P0, PT, R8, R9, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0xea0 ?trans5;
STS [R6], R7 &rd=0x0 ?trans4;
STS [R5], R9 &rd=0x0 ?trans1;
BRA 0xea0 ?trans5;
LDS R7, [R6+0x8] &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={0} ?WAIT13_END_GROUP;
@P0 STS [R6], R7 ?trans4;
@P0 LDS R8, [R5+0x8] &req={4,2} &wr=0x0 ?trans4;
@P0 STS [R5], R8 &req={0} &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.NE.AND P0, PT, R4, RZ, PT ?WAIT5_END_GROUP;
BSSY.RECONVERGENT B0, 0x1010 ?trans8;
@P0 BRA 0x1000 ?trans5;
LDS R4, [R6] &wr=0x5 ?trans4;
LDS R7, [UR4+0x4] &req={3,1,0} &wr=0x0 ?trans1;
ISETP.NE.AND P1, PT, R4, RZ, PT &req={5} ?WAIT13_END_GROUP;
@!P1 BRA 0xfc0 &req={0} ?trans5;
ISETP.NE.AND P1, PT, R7, RZ, PT ?WAIT13_END_GROUP;
@!P1 BRA 0x1000 ?trans5;
LDS R4, [R5] ?trans4;
LDS R8, [UR4+0x1004] &req={4,2} &wr=0x0 ?trans2;
ISETP.GT.AND P1, PT, R4, R8, PT &req={0} ?WAIT13_END_GROUP;
@!P1 BRA 0x1000 ?trans5;
STS [R6], R7 &rd=0x0 ?trans4;
STS [R5], R8 &rd=0x0 ?trans1;
BRA 0x1000 ?trans5;
ISETP.NE.AND P1, PT, R7, RZ, PT ?WAIT13_END_GROUP;
@P1 STS [R6], R7 ?trans4;
@P1 LDS R4, [UR4+0x1004] &wr=0x0 ?trans4;
@P1 STS [R5], R4 &req={0} &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 EXIT ?trans5;
LDC R4, c[0x0][0x3a8] &req={0} &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R4, RZ, PT &req={0} ?WAIT13_END_GROUP;
@!P0 LDS R7, [UR4] &req={3,1} &wr=0x0 ?trans1;
@!P0 LDC.64 R4, c[0x0][0x3a0] &req={4,2} &wr=0x1 ?trans1;
@!P0 IMAD.WIDE R2, R7, 0x4, R2 &req={0} ?trans2;
@!P0 STG.E desc[UR6][R4.64], R7 &req={1} &rd=0x0 ?trans4;
@!P0 STG.E desc[UR6][R2.64+-0x4], RZ &rd=0x0 ?trans1;
@!P0 EXIT ?trans5;
LDS R9, [UR4] &wr=0x1 ?trans1;
LDC.64 R2, c[0x0][0x390] &req={0} &wr=0x0 ?trans3;
LDS R7, [UR4+0x1000] &wr=0x2 ?trans5;
LDC.64 R4, c[0x0][0x398] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R2, R0, 0x4, R2 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R0, 0x4, R4 &req={3} ?trans1;
STG.E desc[UR6][R2.64], R9 &req={1} ?trans4;
STG.E desc[UR6][R4.64], R7 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x1140;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: findNearestVertexKernelOne(int*, int*, int*, int*, int*, int, int)
_Z26findNearestVertexKernelOnePiS_S_S_S_ii:
s_load_b64 s[12:13], s[0:1], 0x28
s_mov_b32 s2, s15
v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v3, 2, v0
v_lshl_or_b32 v1, s2, 10, v0
v_mov_b32_e32 v4, 0x2710
ds_store_2addr_stride64_b32 v3, v2, v4 offset1:16
s_waitcnt lgkmcnt(0)
s_add_i32 s3, s13, -1
s_delay_alu instid0(SALU_CYCLE_1)
v_cmp_gt_i32_e32 vcc_lo, s3, v1
s_and_saveexec_b32 s3, vcc_lo
s_cbranch_execz .LBB1_22
s_load_b256 s[4:11], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, vcc_lo, s4, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v2, vcc_lo
v_add_co_u32 v1, vcc_lo, s6, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
s_load_b64 s[6:7], s[0:1], 0x20
global_load_b32 v4, v[4:5], off
global_load_b32 v2, v[1:2], off
v_or_b32_e32 v1, 0x1000, v3
s_movk_i32 s1, 0x200
s_waitcnt vmcnt(1)
ds_store_b32 v3, v4
s_waitcnt vmcnt(0)
ds_store_b32 v1, v2
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB1_2:
s_mov_b32 s3, exec_lo
v_cmpx_gt_u32_e64 s1, v0
s_cbranch_execz .LBB1_15
v_lshl_add_u32 v2, s1, 2, v3
s_mov_b32 s13, 0
s_mov_b32 s14, exec_lo
ds_load_b32 v5, v3
ds_load_b32 v4, v2
s_waitcnt lgkmcnt(0)
v_cmp_ne_u32_e32 vcc_lo, 0, v4
v_cmpx_ne_u32_e32 0, v5
s_xor_b32 s14, exec_lo, s14
s_cbranch_execz .LBB1_9
s_mov_b32 s0, 0
s_and_saveexec_b32 s13, vcc_lo
s_cbranch_execz .LBB1_8
v_lshl_add_u32 v2, s1, 2, v1
s_mov_b32 s15, 0
s_mov_b32 s16, exec_lo
ds_load_b32 v5, v1
ds_load_b32 v2, v2
s_waitcnt lgkmcnt(0)
v_cmpx_gt_i32_e64 v5, v2
s_cbranch_execz .LBB1_7
s_mov_b32 s15, exec_lo
ds_store_b32 v3, v4
.LBB1_7:
s_or_b32 exec_lo, exec_lo, s16
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 s0, s15, exec_lo
.LBB1_8:
s_or_b32 exec_lo, exec_lo, s13
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 s13, s0, exec_lo
.LBB1_9:
s_and_not1_saveexec_b32 s0, s14
s_cbranch_execz .LBB1_13
s_mov_b32 s14, s13
s_and_saveexec_b32 s15, vcc_lo
s_cbranch_execz .LBB1_12
v_lshl_add_u32 v2, s1, 2, v1
s_or_b32 s14, s13, exec_lo
ds_store_b32 v3, v4
ds_load_b32 v2, v2
.LBB1_12:
s_or_b32 exec_lo, exec_lo, s15
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
s_and_not1_b32 s13, s13, exec_lo
s_and_b32 s14, s14, exec_lo
s_or_b32 s13, s13, s14
.LBB1_13:
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 exec_lo, exec_lo, s13
s_cbranch_execz .LBB1_15
s_waitcnt lgkmcnt(0)
ds_store_b32 v1, v2
.LBB1_15:
s_or_b32 exec_lo, exec_lo, s3
s_lshr_b32 s0, s1, 1
s_cmp_gt_u32 s1, 1
s_mov_b32 s1, s0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB1_2
v_cmp_eq_u32_e32 vcc_lo, 0, v0
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB1_22
v_mov_b32_e32 v1, 0
s_cmp_lg_u32 s12, 0
ds_load_b32 v0, v1
s_cbranch_scc0 .LBB1_19
ds_load_b32 v2, v1 offset:4096
s_mov_b32 s3, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[0:1], s[2:3], 2
s_add_u32 s8, s8, s0
s_addc_u32 s9, s9, s1
s_add_u32 s0, s10, s0
s_addc_u32 s1, s11, s1
s_waitcnt lgkmcnt(1)
global_store_b32 v1, v0, s[8:9]
s_waitcnt lgkmcnt(0)
global_store_b32 v1, v2, s[0:1]
s_branch .LBB1_20
.LBB1_19:
s_mov_b32 s3, -1
.LBB1_20:
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 vcc_lo, exec_lo, s3
s_cbranch_vccnz .LBB1_22
s_waitcnt lgkmcnt(0)
v_ashrrev_i32_e32 v1, 31, v0
v_mov_b32_e32 v3, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[0:1]
v_add_co_u32 v1, vcc_lo, s4, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
global_store_b32 v3, v0, s[6:7]
global_store_b32 v[1:2], v3, off offset:-4
.LBB1_22:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| findNearestVertexKernelOne | 6,170 | 2,079 | stackv2-00000-of-00015 |
// Demangled: findNearestVertexKernelTwo(int*, int*, int*, int*, int*, int*)
Function : _Z26findNearestVertexKernelTwoPiS_S_S_S_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x398] &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x3 ?trans1;
BSSY.RECONVERGENT B0, 0x1f0 ?trans6;
LDC.64 R4, c[0x0][0x3a0] &wr=0x4 ?trans1;
ISETP.GT.U32.AND P0, PT, R0.reuse, 0x1ff, PT &req={1} ?trans1;
IMAD.WIDE.U32 R2, R0, 0x4, R2 &req={2} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R0, 0x4, R4 &req={4} ?WAIT8_END_GROUP;
@P0 BRA 0x1e0 &req={3,0} ?trans5;
LDG.E R6, desc[UR4][R2.64] &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R6, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x180 ?trans5;
LDG.E R7, desc[UR4][R2.64+0x800] &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x1e0 ?trans5;
LDG.E R6, desc[UR4][R4.64] &wr=0x2 ?trans4;
LDG.E R9, desc[UR4][R4.64+0x800] &wr=0x2 ?trans2;
ISETP.GT.AND P0, PT, R6, R9, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x1e0 ?trans5;
STG.E desc[UR4][R2.64], R7 &rd=0x0 ?trans4;
LDG.E R9, desc[UR4][R4.64+0x800] &wr=0x2 ?trans4;
STG.E desc[UR4][R4.64], R9 &req={2} &rd=0x0 ?trans1;
BRA 0x1e0 ?trans5;
LDG.E R7, desc[UR4][R2.64+0x800] &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x1e0 ?trans5;
STG.E desc[UR4][R2.64], R7 &rd=0x1 ?trans4;
LDG.E R9, desc[UR4][R4.64+0x800] &wr=0x2 ?trans4;
STG.E desc[UR4][R4.64], R9 &req={2} &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R0, 0xff, PT ?WAIT5_END_GROUP;
BSSY.RECONVERGENT B0, 0x380 ?trans8;
@P0 BRA 0x370 ?trans5;
LDG.E R6, desc[UR4][R2.64] &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R6, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x310 ?trans5;
LDG.E R7, desc[UR4][R2.64+0x400] &req={1,0} &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x370 ?trans5;
LDG.E R6, desc[UR4][R4.64] &wr=0x2 ?trans4;
LDG.E R9, desc[UR4][R4.64+0x400] &wr=0x2 ?trans2;
ISETP.GT.AND P0, PT, R6, R9, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x370 ?trans5;
STG.E desc[UR4][R2.64], R7 &rd=0x2 ?trans4;
LDG.E R9, desc[UR4][R4.64+0x400] &wr=0x3 ?trans4;
STG.E desc[UR4][R4.64], R9 &req={3} &rd=0x2 ?trans1;
BRA 0x370 ?trans5;
LDG.E R7, desc[UR4][R2.64+0x400] &req={1,0} &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x370 ?trans5;
STG.E desc[UR4][R2.64], R7 &rd=0x3 ?trans4;
LDG.E R9, desc[UR4][R4.64+0x400] &wr=0x2 ?trans4;
STG.E desc[UR4][R4.64], R9 &req={2} &rd=0x3 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R0, 0x7f, PT ?WAIT5_END_GROUP;
BSSY.RECONVERGENT B0, 0x510 ?trans8;
@P0 BRA 0x500 ?trans5;
LDG.E R6, desc[UR4][R2.64] &wr=0x4 ?trans2;
ISETP.NE.AND P0, PT, R6, RZ, PT &req={4} ?WAIT13_END_GROUP;
@!P0 BRA 0x4a0 ?trans5;
LDG.E R7, desc[UR4][R2.64+0x200] &req={3,2,1,0} &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x500 ?trans5;
LDG.E R6, desc[UR4][R4.64] &wr=0x2 ?trans4;
LDG.E R9, desc[UR4][R4.64+0x200] &wr=0x2 ?trans2;
ISETP.GT.AND P0, PT, R6, R9, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x500 ?trans5;
STG.E desc[UR4][R2.64], R7 &rd=0x4 ?trans4;
LDG.E R9, desc[UR4][R4.64+0x200] &wr=0x2 ?trans4;
STG.E desc[UR4][R4.64], R9 &req={2} &rd=0x4 ?trans1;
BRA 0x500 ?trans5;
LDG.E R7, desc[UR4][R2.64+0x200] &req={3,2,1,0} &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x500 ?trans5;
STG.E desc[UR4][R2.64], R7 &rd=0x0 ?trans4;
LDG.E R9, desc[UR4][R4.64+0x200] &wr=0x2 ?trans4;
STG.E desc[UR4][R4.64], R9 &req={2} &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R0, 0x3f, PT ?WAIT5_END_GROUP;
BSSY.RECONVERGENT B0, 0x6a0 ?trans8;
@P0 BRA 0x690 ?trans5;
LDG.E R6, desc[UR4][R2.64] &wr=0x5 ?trans2;
ISETP.NE.AND P0, PT, R6, RZ, PT &req={5} ?WAIT13_END_GROUP;
@!P0 BRA 0x630 ?trans5;
LDG.E R7, desc[UR4][R2.64+0x100] &req={4,3,2,1,0} &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x690 ?trans5;
LDG.E R6, desc[UR4][R4.64] &wr=0x2 ?trans4;
LDG.E R9, desc[UR4][R4.64+0x100] &wr=0x2 ?trans2;
ISETP.GT.AND P0, PT, R6, R9, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x690 ?trans5;
STG.E desc[UR4][R2.64], R7 &rd=0x0 ?trans4;
LDG.E R9, desc[UR4][R4.64+0x100] &wr=0x2 ?trans4;
STG.E desc[UR4][R4.64], R9 &req={2} &rd=0x0 ?trans1;
BRA 0x690 ?trans5;
LDG.E R7, desc[UR4][R2.64+0x100] &req={4,3,2,1,0} &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x690 ?trans5;
STG.E desc[UR4][R2.64], R7 &rd=0x0 ?trans4;
LDG.E R9, desc[UR4][R4.64+0x100] &wr=0x2 ?trans4;
STG.E desc[UR4][R4.64], R9 &req={2} &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R0, 0x1f, PT ?WAIT5_END_GROUP;
BSSY.RECONVERGENT B0, 0x830 ?trans8;
@P0 BRA 0x820 ?trans5;
LDG.E R6, desc[UR4][R2.64] &wr=0x5 ?trans2;
ISETP.NE.AND P0, PT, R6, RZ, PT &req={5} ?WAIT13_END_GROUP;
@!P0 BRA 0x7c0 ?trans5;
LDG.E R7, desc[UR4][R2.64+0x80] &req={4,3,2,1,0} &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x820 ?trans5;
LDG.E R6, desc[UR4][R4.64] &wr=0x2 ?trans4;
LDG.E R9, desc[UR4][R4.64+0x80] &wr=0x2 ?trans2;
ISETP.GT.AND P0, PT, R6, R9, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x820 ?trans5;
STG.E desc[UR4][R2.64], R7 &rd=0x0 ?trans4;
LDG.E R9, desc[UR4][R4.64+0x80] &wr=0x2 ?trans4;
STG.E desc[UR4][R4.64], R9 &req={2} &rd=0x0 ?trans1;
BRA 0x820 ?trans5;
LDG.E R7, desc[UR4][R2.64+0x80] &req={4,3,2,1,0} &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x820 ?trans5;
STG.E desc[UR4][R2.64], R7 &rd=0x0 ?trans4;
LDG.E R9, desc[UR4][R4.64+0x80] &wr=0x2 ?trans4;
STG.E desc[UR4][R4.64], R9 &req={2} &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R0, 0xf, PT ?WAIT5_END_GROUP;
BSSY.RECONVERGENT B0, 0x9c0 ?trans8;
@P0 BRA 0x9b0 ?trans5;
LDG.E R6, desc[UR4][R2.64] &wr=0x5 ?trans2;
ISETP.NE.AND P0, PT, R6, RZ, PT &req={5} ?WAIT13_END_GROUP;
@!P0 BRA 0x950 ?trans5;
LDG.E R7, desc[UR4][R2.64+0x40] &req={4,3,2,1,0} &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x9b0 ?trans5;
LDG.E R6, desc[UR4][R4.64] &wr=0x2 ?trans4;
LDG.E R9, desc[UR4][R4.64+0x40] &wr=0x2 ?trans2;
ISETP.GT.AND P0, PT, R6, R9, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x9b0 ?trans5;
STG.E desc[UR4][R2.64], R7 &rd=0x0 ?trans4;
LDG.E R9, desc[UR4][R4.64+0x40] &wr=0x2 ?trans4;
STG.E desc[UR4][R4.64], R9 &req={2} &rd=0x0 ?trans1;
BRA 0x9b0 ?trans5;
LDG.E R7, desc[UR4][R2.64+0x40] &req={4,3,2,1,0} &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x9b0 ?trans5;
STG.E desc[UR4][R2.64], R7 &rd=0x0 ?trans4;
LDG.E R9, desc[UR4][R4.64+0x40] &wr=0x2 ?trans4;
STG.E desc[UR4][R4.64], R9 &req={2} &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R0, 0x7, PT ?WAIT5_END_GROUP;
BSSY.RECONVERGENT B0, 0xb50 ?trans8;
@P0 BRA 0xb40 ?trans5;
LDG.E R6, desc[UR4][R2.64] &wr=0x5 ?trans2;
ISETP.NE.AND P0, PT, R6, RZ, PT &req={5} ?WAIT13_END_GROUP;
@!P0 BRA 0xae0 ?trans5;
LDG.E R7, desc[UR4][R2.64+0x20] &req={4,3,2,1,0} &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0xb40 ?trans5;
LDG.E R6, desc[UR4][R4.64] &wr=0x2 ?trans4;
LDG.E R9, desc[UR4][R4.64+0x20] &wr=0x2 ?trans2;
ISETP.GT.AND P0, PT, R6, R9, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0xb40 ?trans5;
STG.E desc[UR4][R2.64], R7 &rd=0x0 ?trans4;
LDG.E R9, desc[UR4][R4.64+0x20] &wr=0x2 ?trans4;
STG.E desc[UR4][R4.64], R9 &req={2} &rd=0x0 ?trans1;
BRA 0xb40 ?trans5;
LDG.E R7, desc[UR4][R2.64+0x20] &req={4,3,2,1,0} &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0xb40 ?trans5;
STG.E desc[UR4][R2.64], R7 &rd=0x0 ?trans4;
LDG.E R9, desc[UR4][R4.64+0x20] &wr=0x2 ?trans4;
STG.E desc[UR4][R4.64], R9 &req={2} &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R0, 0x3, PT ?WAIT5_END_GROUP;
BSSY.RECONVERGENT B0, 0xce0 ?trans8;
@P0 BRA 0xcd0 ?trans5;
LDG.E R6, desc[UR4][R2.64] &wr=0x5 ?trans2;
ISETP.NE.AND P0, PT, R6, RZ, PT &req={5} ?WAIT13_END_GROUP;
@!P0 BRA 0xc70 ?trans5;
LDG.E R7, desc[UR4][R2.64+0x10] &req={4,3,2,1,0} &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0xcd0 ?trans5;
LDG.E R6, desc[UR4][R4.64] &wr=0x2 ?trans4;
LDG.E R9, desc[UR4][R4.64+0x10] &wr=0x2 ?trans2;
ISETP.GT.AND P0, PT, R6, R9, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0xcd0 ?trans5;
STG.E desc[UR4][R2.64], R7 &rd=0x0 ?trans4;
LDG.E R9, desc[UR4][R4.64+0x10] &wr=0x2 ?trans4;
STG.E desc[UR4][R4.64], R9 &req={2} &rd=0x0 ?trans1;
BRA 0xcd0 ?trans5;
LDG.E R7, desc[UR4][R2.64+0x10] &req={4,3,2,1,0} &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0xcd0 ?trans5;
STG.E desc[UR4][R2.64], R7 &rd=0x0 ?trans4;
LDG.E R9, desc[UR4][R4.64+0x10] &wr=0x2 ?trans4;
STG.E desc[UR4][R4.64], R9 &req={2} &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R0, 0x1, PT ?WAIT5_END_GROUP;
BSSY.RECONVERGENT B0, 0xe70 ?trans8;
@P0 BRA 0xe60 ?trans5;
LDG.E R6, desc[UR4][R2.64] &wr=0x5 ?trans2;
ISETP.NE.AND P0, PT, R6, RZ, PT &req={5} ?WAIT13_END_GROUP;
@!P0 BRA 0xe00 ?trans5;
LDG.E R7, desc[UR4][R2.64+0x8] &req={4,3,2,1,0} &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0xe60 ?trans5;
LDG.E R6, desc[UR4][R4.64] &wr=0x2 ?trans4;
LDG.E R9, desc[UR4][R4.64+0x8] &wr=0x2 ?trans2;
ISETP.GT.AND P0, PT, R6, R9, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0xe60 ?trans5;
STG.E desc[UR4][R2.64], R7 &rd=0x0 ?trans4;
LDG.E R9, desc[UR4][R4.64+0x8] &wr=0x2 ?trans4;
STG.E desc[UR4][R4.64], R9 &req={2} &rd=0x0 ?trans1;
BRA 0xe60 ?trans5;
LDG.E R7, desc[UR4][R2.64+0x8] &req={4,3,2,1,0} &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0xe60 ?trans5;
STG.E desc[UR4][R2.64], R7 &rd=0x0 ?trans4;
LDG.E R9, desc[UR4][R4.64+0x8] &wr=0x2 ?trans4;
STG.E desc[UR4][R4.64], R9 &req={2} &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.NE.AND P0, PT, R0, RZ, PT ?WAIT5_END_GROUP;
BSSY.RECONVERGENT B0, 0x1040 ?trans8;
@P0 BRA 0x1030 ?trans5;
LDG.E R0, desc[UR4][R2.64] &wr=0x5 ?trans2;
ISETP.NE.AND P1, PT, R0, RZ, PT &req={5} ?WAIT13_END_GROUP;
@P1 BRA 0xf70 ?trans5;
LDC.64 R6, c[0x0][0x398] &req={4,3,2,1,0} &wr=0x0 ?trans2;
LDG.E R9, desc[UR4][R6.64+0x4] &req={0} &wr=0x2 ?trans2;
ISETP.NE.AND P1, PT, R9, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P1 BRA 0x1030 ?trans5;
LDC.64 R6, c[0x0][0x3a0] &wr=0x0 ?trans1;
STG.E desc[UR4][R2.64], R9 &rd=0x1 ?trans4;
LDG.E R7, desc[UR4][R6.64+0x4] &req={0} &wr=0x2 ?trans4;
STG.E desc[UR4][R4.64], R7 &req={2} &rd=0x1 ?trans1;
BRA 0x1030 ?trans5;
LDC.64 R6, c[0x0][0x398] &req={4,3,2,1,0} &wr=0x0 ?trans2;
LDG.E R9, desc[UR4][R6.64+0x4] &req={0} &wr=0x2 ?trans2;
ISETP.NE.AND P1, PT, R9, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P1 BRA 0x1030 ?trans5;
LDC.64 R6, c[0x0][0x3a0] &wr=0x0 ?trans1;
LDG.E R11, desc[UR4][R4.64] &wr=0x2 ?trans4;
LDG.E R0, desc[UR4][R6.64+0x4] &req={0} &wr=0x2 ?trans2;
ISETP.GT.AND P1, PT, R11, R0, PT &req={2} ?WAIT13_END_GROUP;
@!P1 BRA 0x1030 ?trans5;
STG.E desc[UR4][R2.64], R9 &rd=0x0 ?trans4;
LDG.E R7, desc[UR4][R6.64+0x4] &wr=0x2 ?trans4;
STG.E desc[UR4][R4.64], R7 &req={2} &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 EXIT ?trans5;
LDC.64 R6, c[0x0][0x398] &req={4,3,2,1,0} &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x388] &wr=0x1 ?trans1;
LDG.E R7, desc[UR4][R6.64] &req={0} &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x3a8] &wr=0x0 ?trans1;
IMAD.WIDE R4, R7, 0x4, R4 &req={1} ?trans1;
STG.E desc[UR4][R2.64], R7 &req={0} ?trans4;
STG.E desc[UR4][R4.64+-0x4], RZ ?trans1;
EXIT ?trans5;
BRA 0x10e0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: findNearestVertexKernelTwo(int*, int*, int*, int*, int*, int*)
_Z26findNearestVertexKernelTwoPiS_S_S_S_S_:
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x18
s_load_b64 s[8:9], s[0:1], 0x28
v_lshlrev_b32_e32 v3, 2, v0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v1, s2, s4, v3
v_add_co_ci_u32_e64 v2, null, s5, 0, s2
v_add_co_u32 v3, s2, s6, v3
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v4, null, s7, 0, s2
s_movk_i32 s6, 0x200
.LBB2_1:
s_mov_b32 s3, exec_lo
v_cmpx_gt_u32_e64 s6, v0
s_cbranch_execz .LBB2_12
s_ashr_i32 s7, s6, 31
s_mov_b32 s12, exec_lo
s_lshl_b64 s[10:11], s[6:7], 2
s_mov_b32 s7, 0
v_add_co_u32 v5, vcc_lo, v1, s10
v_add_co_ci_u32_e32 v6, vcc_lo, s11, v2, vcc_lo
s_clause 0x1
global_load_b32 v8, v[1:2], off
global_load_b32 v7, v[5:6], off
s_waitcnt vmcnt(0)
v_cmp_ne_u32_e32 vcc_lo, 0, v7
v_cmpx_ne_u32_e32 0, v8
s_xor_b32 s12, exec_lo, s12
s_cbranch_execz .LBB2_6
s_mov_b32 s2, 0
s_and_saveexec_b32 s7, vcc_lo
s_cbranch_execz .LBB2_5
v_add_co_u32 v5, s2, v3, s10
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v6, s2, s11, v4, s2
s_clause 0x1
global_load_b32 v8, v[3:4], off
global_load_b32 v9, v[5:6], off
s_waitcnt vmcnt(0)
v_cmp_gt_i32_e64 s2, v8, v9
s_delay_alu instid0(VALU_DEP_1)
s_and_b32 s2, s2, exec_lo
.LBB2_5:
s_or_b32 exec_lo, exec_lo, s7
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 s7, s2, exec_lo
.LBB2_6:
s_and_not1_saveexec_b32 s2, s12
s_cbranch_execz .LBB2_10
s_mov_b32 s12, s7
s_and_saveexec_b32 s13, vcc_lo
v_add_co_u32 v5, vcc_lo, v3, s10
v_add_co_ci_u32_e32 v6, vcc_lo, s11, v4, vcc_lo
s_or_b32 s12, s7, exec_lo
s_or_b32 exec_lo, exec_lo, s13
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
s_and_not1_b32 s7, s7, exec_lo
s_and_b32 s10, s12, exec_lo
s_or_b32 s7, s7, s10
.LBB2_10:
s_or_b32 exec_lo, exec_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 exec_lo, exec_lo, s7
s_cbranch_execz .LBB2_12
global_store_b32 v[1:2], v7, off
global_load_b32 v5, v[5:6], off
s_waitcnt vmcnt(0)
global_store_b32 v[3:4], v5, off
.LBB2_12:
s_or_b32 exec_lo, exec_lo, s3
s_lshr_b32 s2, s6, 1
s_cmp_lt_u32 s6, 2
s_mov_b32 s6, s2
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB2_1
s_mov_b32 s2, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB2_15
v_mov_b32_e32 v3, 0
s_load_b64 s[0:1], s[0:1], 0x8
global_load_b32 v0, v3, s[4:5]
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[0:1]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v1, vcc_lo, s0, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
global_store_b32 v3, v0, s[8:9]
global_store_b32 v[1:2], v3, off offset:-4
.LBB2_15:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| findNearestVertexKernelTwo | 6,968 | 1,509 | stackv2-00000-of-00015 |
// Demangled: updateMSTList(int, int, int*, int*, int*, int*, int*, int*)
Function : _Z13updateMSTListiiPiS_S_S_S_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x380] &wr=0x3 ?trans1;
USHF.L.U32 UR4, UR4, 0xa, URZ &req={2} ?WAIT6_END_GROUP;
LOP3.LUT R0, R0, UR4, RZ, 0xfc, !PT &req={1} ?WAIT4_END_GROUP;
IADD3 R7, PT, PT, R0, UR6, RZ &req={3} ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R7, UR7, PT ?WAIT5_END_GROUP;
ISETP.LT.OR P0, PT, R0, RZ, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x390] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE R2, R7, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R4, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans2;
SHF.R.S32.HI R5, RZ, 0x1f, R4 &req={2} ?WAIT5_END_GROUP;
ISETP.NE.S64.AND P0, PT, R4, RZ, PT ?WAIT14_END_GROUP;
@!P0 EXIT ?trans5;
LDCU.64 UR6, c[0x0][0x3a8] &wr=0x0 ?trans1;
SHF.L.U64.HI R3, R4.reuse, 0x2, R5 ?trans1;
IMAD.SHL.U32 R2, R4, 0x4, RZ ?WAIT5_END_GROUP;
IADD.64 R4, R2, UR6 &req={0} ?WAIT7_END_GROUP;
LDG.E R4, desc[UR4][R4.64+-0x4] &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R4, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
LDCU.64 UR8, c[0x0][0x398] &wr=0x0 ?trans1;
SHF.R.S32.HI R0, RZ, 0x1f, R7 ?trans1;
LDCU.64 UR6, c[0x0][0x3b0] &wr=0x1 ?trans1;
LEA R6, P0, R7, UR8, 0x2 &req={0} ?trans1;
IADD.64 R4, R2, UR6 &req={1} ?WAIT3_END_GROUP;
LEA.HI.X R7, R7, UR9, R0, 0x2, P0 ?WAIT3_END_GROUP;
LDG.E R0, desc[UR4][R4.64+-0x4] &wr=0x2 ?trans4;
LDG.E R9, desc[UR4][R6.64] &wr=0x2 ?trans2;
ISETP.GT.AND P0, PT, R0, R9, PT &req={2} ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
LDC.64 R6, c[0x0][0x388] &wr=0x0 ?trans1;
STG.E desc[UR4][R4.64+-0x4], R9 ?trans1;
LDCU.64 UR6, c[0x0][0x3a0] &wr=0x1 ?trans3;
LDG.E R7, desc[UR4][R6.64] &req={0} &wr=0x2 ?trans1;
IADD.64 R2, R2, UR6 &req={1} ?WAIT6_END_GROUP;
STG.E desc[UR4][R2.64+-0x4], R7 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x290;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: updateMSTList(int, int, int*, int*, int*, int*, int*, int*)
_Z13updateMSTListiiPiS_S_S_S_S_:
s_load_b64 s[2:3], s[0:1], 0x0
v_lshl_or_b32 v1, s15, 10, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_cmp_lt_i32_e32 vcc_lo, -1, v1
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v0, s2, v1
v_cmp_ge_i32_e64 s2, s3, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, vcc_lo, s2
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB0_5
s_load_b256 s[4:11], s[0:1], 0x8
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[0:1]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s6, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v3, vcc_lo
global_load_b32 v0, v[0:1], off
s_waitcnt vmcnt(0)
v_cmp_ne_u32_e32 vcc_lo, 0, v0
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_5
s_load_b128 s[0:3], s[0:1], 0x28
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v1, vcc_lo
global_load_b32 v4, v[4:5], off offset:-4
s_waitcnt vmcnt(0)
v_cmp_ne_u32_e32 vcc_lo, 0, v4
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_5
v_add_co_u32 v4, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s3, v1, vcc_lo
v_add_co_u32 v2, vcc_lo, s8, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
global_load_b32 v6, v[4:5], off offset:-4
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, v6, v2
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_5
v_mov_b32_e32 v3, 0
global_store_b32 v[4:5], v2, off offset:-4
v_add_co_u32 v0, vcc_lo, s10, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
global_load_b32 v2, v3, s[4:5]
s_waitcnt vmcnt(0)
global_store_b32 v[0:1], v2, off offset:-4
.LBB0_5:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| updateMSTList | 1,141 | 1,058 | stackv2-00000-of-00015 |
// Demangled: calPi(double*)
Function : _Z5calPiPd
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
HFMA2 R4, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
BSSY.RECONVERGENT B0, 0x3d0 ?trans6;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R0, UR4, R3 &req={1} ?WAIT5_END_GROUP;
IADD3 R6, PT, PT, R0, R0, RZ ?WAIT4_END_GROUP;
IADD3 R2, PT, PT, R6, 0x2, RZ ?WAIT6_END_GROUP;
I2F.F64 R2, R2 &wr=0x1 ?trans2;
MUFU.RCP64H R5, R3 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, -R2, R4, 1 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R8, R8 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R4, R8, R4 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, -R2, R8, 1 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R8, R4, R8 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R4, 4 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, -R2, R8, 4 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R4, R10, R8 &req={1} &wr=0x1 ?trans2;
FFMA R7, RZ, R3, R5 &req={1} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R7|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA 0x3c0 &req={0} ?trans5;
MOV R4, R2 ?trans1;
MOV R5, R3 ?trans1;
MOV R10, RZ ?trans1;
MOV R11, 0x40100000 ?trans1;
MOV R12, 0x3c0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xb90 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R8, PT, PT, R6, 0x3, RZ ?trans1;
MOV R2, 0x1 ?trans1;
FSETP.GEU.AND P1, PT, |R5|, 6.5827683646048100446e-37, PT ?trans1;
BSSY.RECONVERGENT B0, 0x770 ?trans3;
I2F.F64 R8, R8 &wr=0x0 ?trans2;
MUFU.RCP64H R3, R9 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, -R8, R2, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R10, R10, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R2, R10, R2 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, -R8, R10, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R10, R2, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R2, R4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, -R8, R10, R4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R2, R12, R10 &req={0} &wr=0x0 ?trans2;
FFMA R7, RZ, R9, R3 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R7|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA P1, 0x760 ?trans5;
MOV R10, R4 ?trans1;
MOV R11, R5 ?trans1;
MOV R4, R8 ?trans1;
MOV R5, R9 ?trans1;
MOV R12, 0x740 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xb90 ?trans5;
MOV R2, R4 ?trans1;
MOV R3, R5 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R6, PT, PT, R6, 0x4, RZ ?trans1;
HFMA2 R4, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
FSETP.GEU.AND P1, PT, |R3|, 6.5827683646048100446e-37, PT ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0xb00 ?trans2;
I2F.F64 R6, R6 &wr=0x1 ?trans2;
MUFU.RCP64H R5, R7 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, -R6, R4, 1 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R8, R8 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R4, R8, R4 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, -R6, R8, 1 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R8, R4, R8 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R4, R2 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, -R6, R8, R2 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R4, R10, R8 &req={1} &wr=0x1 ?trans2;
FFMA R8, RZ, R7, R5 &req={1} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R8|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA P1, 0xaf0 &req={0} ?trans5;
MOV R10, R2 ?trans1;
MOV R11, R3 ?trans1;
MOV R4, R6 ?trans1;
MOV R5, R7 ?trans1;
MOV R12, 0xaf0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xb90 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R6, c[0x0][0x380] &wr=0x0 ?trans1;
LOP3.LUT R2, R0, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P0, PT, R2, 0x1, PT ?trans1;
DADD R2, -RZ, -R4 &wr=0x1 ?trans4;
FSEL R4, R2, R4, !P0 &req={1} ?trans1;
FSEL R5, R3, R5, !P0 ?trans1;
IMAD.WIDE R2, R0, 0x8, R6 &req={0} ?WAIT5_END_GROUP;
STG.E.64 desc[UR4][R2.64], R4 ?trans1;
EXIT ?trans5;
MOV R9, R11 ?trans1;
MOV R8, R10 ?trans1;
LOP3.LUT R20, R5.reuse, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
HFMA2 R13, -RZ, RZ, 0.0045166015625, 0 ?trans1;
FSETP.GEU.AND P0, PT, |R5|, 1.469367938527859385e-39, PT ?trans1;
FSETP.GEU.AND P2, PT, |R9|.reuse, 1.469367938527859385e-39, PT ?trans1;
LOP3.LUT R7, R9, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B1, 0x1390 ?trans1;
LOP3.LUT R2, R5, 0x800fffff, RZ, 0xc0, !PT ?trans1;
MOV R14, 0x1 ?trans2;
ISETP.GE.U32.AND P1, PT, R7, R20, PT ?trans1;
LOP3.LUT R3, R2, 0x3ff00000, RZ, 0xfc, !PT ?trans1;
MOV R2, R4 ?trans1;
MOV R21, R7 ?WAIT2_END_GROUP;
SEL R11, R13, 0x63400000, !P1 ?trans2;
@!P2 LOP3.LUT R10, R5, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
@!P2 MOV R18, RZ ?trans2;
LOP3.LUT R11, R11, 0x800fffff, R9, 0xf8, !PT ?trans1;
@!P0 DMUL R2, R4, 8.98846567431157953865e+307 &wr=0x0 ?trans1;
@!P2 ISETP.GE.U32.AND P3, PT, R7, R10, PT ?trans1;
MOV R10, R8 ?trans1;
MUFU.RCP64H R15, R3 &req={0} &wr=0x0 ?trans1;
@!P0 LOP3.LUT R20, R3, 0x7ff00000, RZ, 0xc0, !PT ?WAIT2_END_GROUP;
@!P2 SEL R19, R13, 0x63400000, !P3 ?trans2;
IADD3 R23, PT, PT, R20, -0x1, RZ ?WAIT3_END_GROUP;
@!P2 LOP3.LUT R19, R19, 0x80000000, R9, 0xf8, !PT ?WAIT4_END_GROUP;
@!P2 LOP3.LUT R19, R19, 0x100000, RZ, 0xfc, !PT ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P2 DFMA R10, R10, 2, -R18 &wr=0x1 ?trans2;
@!P2 LOP3.LUT R21, R11, 0x7ff00000, RZ, 0xc0, !PT &req={1} ?WAIT4_END_GROUP;
IADD3 R22, PT, PT, R21, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R22, 0x7feffffe, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R23, 0x7feffffe, P0 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R14, -R2, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R16, R16, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R14, R16, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R16, -R2, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R16, R14, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R16, R14, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R16, -R2, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R14, R18, R16 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0x1240 &req={1,0} ?trans5;
LOP3.LUT R16, R5, 0x7ff00000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R8, PT, PT, R7.reuse, -R16.reuse, RZ ?trans1;
ISETP.GE.U32.AND P0, PT, R7, R16, PT ?WAIT4_END_GROUP;
VIMNMX.S32 R8, R8, -0x46a00000, !PT ?trans1;
SEL R7, R13, 0x63400000, !P0 ?WAIT4_END_GROUP;
VIMNMX.S32 R8, R8, 0x46a00000, PT ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, -R7, R8, RZ ?trans1;
MOV R8, RZ ?WAIT3_END_GROUP;
IADD3 R9, PT, PT, R7, 0x7fe00000, RZ ?WAIT6_END_GROUP;
DMUL R16, R14, R8 &wr=0x0 ?trans2;
FSETP.GTU.AND P0, PT, |R17|, 1.469367938527859385e-39, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x1380 ?trans5;
DFMA R2, R14, -R2, R10 &wr=0x0 ?trans1;
MOV R8, RZ ?trans1;
FSETP.NEU.AND P0, PT, R3.reuse, RZ, PT &req={0} ?trans1;
LOP3.LUT R5, R3, 0x80000000, R5, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R9, R5, R9, RZ, 0xfc, !PT ?WAIT8_END_GROUP;
@!P0 BRA 0x1380 ?trans5;
IADD3 R3, PT, PT, -R7, RZ, RZ ?trans1;
MOV R2, RZ ?trans1;
DMUL.RP R8, R14, R8 &wr=0x0 ?trans2;
LOP3.LUT R5, R9, R5, RZ, 0x3c, !PT &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R16, -R2, R14 &wr=0x0 ?trans2;
IADD3 R2, PT, PT, -R7, -0x43300000, RZ &req={0} ?WAIT5_END_GROUP;
FSETP.NEU.AND P0, PT, |R3|, R2, PT ?WAIT5_END_GROUP;
FSEL R16, R8, R16, !P0 ?trans1;
FSEL R17, R5, R17, !P0 ?trans1;
BRA 0x1380 ?trans6;
DSETP.NAN.AND P0, PT, R8, R8, PT &wr=0x0 ?trans2;
@P0 BRA 0x1360 &req={0} ?trans5;
DSETP.NAN.AND P0, PT, R4, R4, PT &wr=0x0 ?trans2;
@P0 BRA 0x1330 &req={0} ?trans5;
ISETP.NE.AND P0, PT, R21, R20, PT ?trans1;
MOV.64 R16, 0xfff8000000000000 ?WAIT12_END_GROUP;
@!P0 BRA 0x1380 ?trans5;
ISETP.NE.AND P0, PT, R21, 0x7ff00000, PT ?trans1;
LOP3.LUT R17, R9, 0x80000000, R5, 0x48, !PT ?WAIT4_END_GROUP;
ISETP.EQ.OR P0, PT, R20, RZ, !P0 ?WAIT13_END_GROUP;
@P0 LOP3.LUT R2, R17, 0x7ff00000, RZ, 0xfc, !PT ?trans1;
@!P0 MOV R16, RZ ?trans1;
@P0 MOV R16, RZ ?WAIT3_END_GROUP;
@P0 MOV R17, R2 ?trans1;
BRA 0x1380 ?trans6;
LOP3.LUT R17, R5, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R16, R4 ?trans1;
BRA 0x1380 ?trans6;
LOP3.LUT R17, R9, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R16, R8 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
HFMA2 R13, -RZ, RZ, 0, 0 ?trans1;
MOV R4, R16 ?trans1;
MOV R5, R17 ?trans2;
RET.REL.NODEC R12 0x0 ?trans5;
BRA 0x13d0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: calPi(double*)
_Z5calPiPd:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x14
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_lshlrev_b32_e32 v0, 1, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v2, 2, v0
v_cvt_f64_i32_e32 v[2:3], v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_div_scale_f64 v[4:5], null, v[2:3], v[2:3], 4.0
v_div_scale_f64 v[10:11], vcc_lo, 4.0, v[2:3], 4.0
v_rcp_f64_e32 v[6:7], v[4:5]
s_waitcnt_depctr 0xfff
v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
v_mul_f64 v[8:9], v[10:11], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[4:5], -v[4:5], v[8:9], v[10:11]
v_div_fmas_f64 v[4:5], v[4:5], v[6:7], v[8:9]
v_add_nc_u32_e32 v6, 3, v0
v_add_nc_u32_e32 v0, 4, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_cvt_f64_i32_e32 v[6:7], v6
v_div_fixup_f64 v[2:3], v[4:5], v[2:3], 4.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_div_scale_f64 v[4:5], null, v[6:7], v[6:7], v[2:3]
v_div_scale_f64 v[12:13], vcc_lo, v[2:3], v[6:7], v[2:3]
v_rcp_f64_e32 v[8:9], v[4:5]
s_waitcnt_depctr 0xfff
v_fma_f64 v[10:11], -v[4:5], v[8:9], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
v_fma_f64 v[10:11], -v[4:5], v[8:9], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
v_mul_f64 v[10:11], v[12:13], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[4:5], -v[4:5], v[10:11], v[12:13]
v_div_fmas_f64 v[4:5], v[4:5], v[8:9], v[10:11]
v_cvt_f64_i32_e32 v[8:9], v0
v_and_b32_e32 v0, 1, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fixup_f64 v[2:3], v[4:5], v[6:7], v[2:3]
v_div_scale_f64 v[4:5], null, v[8:9], v[8:9], v[2:3]
v_div_scale_f64 v[12:13], vcc_lo, v[2:3], v[8:9], v[2:3]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f64_e32 v[6:7], v[4:5]
s_waitcnt_depctr 0xfff
v_fma_f64 v[10:11], -v[4:5], v[6:7], 1.0
v_fma_f64 v[6:7], v[6:7], v[10:11], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], -v[4:5], v[6:7], 1.0
v_fma_f64 v[6:7], v[6:7], v[10:11], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[10:11], v[12:13], v[6:7]
v_fma_f64 v[4:5], -v[4:5], v[10:11], v[12:13]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_div_fmas_f64 v[4:5], v[4:5], v[6:7], v[10:11]
v_cmp_eq_u32_e32 vcc_lo, 0, v0
v_div_fixup_f64 v[3:4], v[4:5], v[8:9], v[2:3]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[0:1], 3, v[1:2]
v_cndmask_b32_e32 v3, v3, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v5, 0x80000000, v4
v_cndmask_b32_e32 v4, v5, v4, vcc_lo
s_delay_alu instid0(VALU_DEP_4)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b64 v[0:1], v[3:4], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| calPi | 5,856 | 2,143 | stackv2-00000-of-00015 |
// Demangled: stencil1d(int*, int*)
Function : _Z9stencil1dPiS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R7, SR_TID.X &wr=0x0 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x3 ?trans1;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={0} ?trans1;
IMAD R5, R0, UR4, R7 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R5, 0x4, R2 &req={3} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR6][R2.64+0x4] &req={2} &wr=0x2 ?trans4;
@!P0 LDG.E R4, desc[UR6][R2.64] &wr=0x3 ?trans4;
@!P0 LDG.E R6, desc[UR6][R2.64+0x14] &wr=0x4 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR4, 0x400 ?trans1;
SHF.R.S32.HI R12, RZ, 0x1f, R5 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={0} ?WAIT6_END_GROUP;
LEA R7, R7, UR4, 0x2 ?WAIT5_END_GROUP;
STS [R7+0x4], R0 &req={2} ?trans4;
@!P0 STS [UR4], R4 &req={3} ?trans4;
@!P0 STS [UR4+0x14], R6 &req={4} ?trans1;
LDCU.64 UR4, c[0x0][0x388] &wr=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
LEA R2, P0, R5, UR4, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R3, R5, UR5, R12, 0x2, P0 ?trans1;
LDS R8, [R7] ?trans4;
LDS R9, [R7+0x4] ?trans4;
LDS R10, [R7+0x8] &wr=0x0 ?trans2;
IADD3 R9, PT, PT, R10, R9, R8 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x1e0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: stencil1d(int*, int*)
_Z9stencil1dPiS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x1c
s_load_b128 s[0:3], s[0:1], 0x0
v_lshlrev_b32_e32 v5, 2, v0
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[1:2]
v_add_co_u32 v3, vcc_lo, s0, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v2, vcc_lo
s_mov_b32 s0, exec_lo
global_load_b32 v6, v[3:4], off offset:4
s_waitcnt vmcnt(0)
ds_store_b32 v5, v6 offset:4
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB0_2
s_clause 0x1
global_load_b32 v0, v[3:4], off
global_load_b32 v3, v[3:4], off offset:20
v_mov_b32_e32 v4, 0
s_waitcnt vmcnt(0)
ds_store_2addr_b32 v4, v0, v3 offset1:5
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
ds_load_2addr_b32 v[3:4], v5 offset1:1
ds_load_b32 v0, v5 offset:8
s_waitcnt lgkmcnt(0)
v_add3_u32 v3, v4, v3, v0
v_add_co_u32 v0, vcc_lo, s2, v1
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v2, vcc_lo
global_store_b32 v[0:1], v3, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| stencil1d | 786 | 658 | stackv2-00000-of-00015 |
// Demangled: matrixTransposeUnrolled(int const*, int*)
Function : _Z23matrixTransposeUnrolledPKiPi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R8, SR_TID.Y &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans1;
S2R R15, SR_CTAID.Y &wr=0x1 ?trans1;
S2R R13, SR_CTAID.X &wr=0x4 ?trans1;
S2R R6, SR_TID.X &wr=0x4 ?trans1;
IMAD R5, R15, 0x20, R8 &req={1} ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R5.reuse, 0x7ff, PT ?trans1;
ISETP.GT.U32.AND P3, PT, R5.reuse, 0x7f7, PT ?trans1;
ISETP.GT.U32.AND P2, PT, R5, 0x7ef, PT ?trans1;
IMAD R0, R13, 0x20, R6 &req={4} ?trans1;
ISETP.GT.U32.AND P1, PT, R5, 0x7e7, PT ?WAIT3_END_GROUP;
IMAD R5, R5, 0x800, R0 ?trans1;
ISETP.GT.OR P0, PT, R0.reuse, 0x7ff, P0 ?trans1;
ISETP.GT.OR P3, PT, R0.reuse, 0x7ff, P3 ?trans1;
ISETP.GT.OR P2, PT, R0.reuse, 0x7ff, P2 ?trans1;
ISETP.GT.OR P1, PT, R0, 0x7ff, P1 ?trans1;
IMAD.WIDE R2, R5, 0x4, R2 &req={2} ?WAIT9_END_GROUP;
@!P0 LDG.E R5, desc[UR6][R2.64] &req={3} &wr=0x2 ?trans4;
@!P3 LDG.E R7, desc[UR6][R2.64+0x10000] &wr=0x3 ?trans4;
@!P2 LDG.E R9, desc[UR6][R2.64+0x20000] &wr=0x4 ?trans4;
@!P1 LDG.E R11, desc[UR6][R2.64+0x30000] &rd=0x1 &wr=0x5 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR4, 0x400 ?trans1;
IMAD R4, R15, 0x20, R6 ?WAIT2_END_GROUP;
IMAD R13, R13, 0x20, R8 ?WAIT5_END_GROUP;
ISETP.GT.AND P5, PT, R13.reuse, 0x7ff, PT ?trans1;
ISETP.GT.AND P6, PT, R13.reuse, 0x7f7, PT ?trans1;
ISETP.GT.AND P4, PT, R13, 0x7ef, PT ?trans1;
LDC.64 R2, c[0x0][0x388] &req={1} &wr=0x1 ?trans2;
ISETP.GT.U32.OR P5, PT, R4.reuse, 0x7ff, P5 ?trans1;
ISETP.GT.U32.OR P6, PT, R4.reuse, 0x7ff, P6 ?trans1;
ISETP.GT.U32.OR P4, PT, R4, 0x7ff, P4 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={0} ?WAIT6_END_GROUP;
LEA R0, R6, UR4, 0x2 ?WAIT5_END_GROUP;
IMAD R6, R6, 0x80, R0.reuse ?trans2;
IMAD R0, R8.reuse, 0x84, R0 ?trans2;
IMAD R6, R8, 0x4, R6 ?WAIT3_END_GROUP;
@!P0 STS [R0], R5 &req={2} ?trans1;
ISETP.GT.AND P0, PT, R13.reuse, 0x7e7, PT ?trans1;
IMAD R13, R13, 0x800, R4 ?trans2;
@!P3 STS [R0+0x420], R7 &req={3} ?trans2;
ISETP.GT.U32.OR P0, PT, R4, 0x7ff, P0 ?trans1;
IMAD.WIDE R2, R13, 0x4, R2 &req={1} ?trans1;
@!P2 STS [R0+0x840], R9 &req={4} ?trans4;
@!P1 STS [R0+0xc60], R11 &req={5} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P5 LDS R15, [R6] &wr=0x0 ?trans4;
@!P6 LDS R17, [R6+0x20] &wr=0x1 ?trans4;
@!P4 LDS R19, [R6+0x40] &wr=0x2 ?trans4;
@!P5 STG.E desc[UR6][R2.64], R15 &req={0} &rd=0x0 ?trans4;
@!P6 STG.E desc[UR6][R2.64+0x10000], R17 &req={1} &rd=0x0 ?trans4;
@!P4 STG.E desc[UR6][R2.64+0x20000], R19 &req={2} &rd=0x0 ?trans1;
@P0 EXIT ?trans5;
LDS R5, [R6+0x60] &wr=0x1 ?trans4;
STG.E desc[UR6][R2.64+0x30000], R5 &req={1} ?trans1;
EXIT ?trans5;
BRA 0x3a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: matrixTransposeUnrolled(int const*, int*)
_Z23matrixTransposeUnrolledPKiPi:
s_load_b128 s[4:7], s[0:1], 0x0
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
s_lshl_b32 s1, s14, 5
s_lshl_b32 s2, s15, 5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v3, s1, v1
v_add_nc_u32_e32 v4, s2, v0
v_lshlrev_b32_e32 v2, 2, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cmp_gt_i32_e32 vcc_lo, 0x800, v3
v_cmp_gt_i32_e64 s0, 0x800, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, vcc_lo, s0
s_and_saveexec_b32 s3, s0
s_cbranch_execz .LBB0_2
v_lshl_add_u32 v5, v4, 11, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v6, 31, v5
v_lshlrev_b64 v[5:6], 2, v[5:6]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v5, s0, s4, v5
v_add_co_ci_u32_e64 v6, s0, s5, v6, s0
global_load_b32 v5, v[5:6], off
v_mad_u32_u24 v6, 0x84, v0, v2
s_waitcnt vmcnt(0)
ds_store_b32 v6, v5
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s3
v_cmp_gt_i32_e64 s0, 0x7f8, v4
v_lshlrev_b32_e32 v5, 11, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, vcc_lo, s0
s_and_saveexec_b32 s3, s0
s_cbranch_execz .LBB0_4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add3_u32 v6, v5, v3, 0x4000
v_ashrrev_i32_e32 v7, 31, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[6:7]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v6, s0, s4, v6
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v7, s0, s5, v7, s0
global_load_b32 v6, v[6:7], off
v_mad_u32_u24 v7, 0x84, v0, v2
s_waitcnt vmcnt(0)
ds_store_b32 v7, v6 offset:1056
.LBB0_4:
s_or_b32 exec_lo, exec_lo, s3
v_cmp_gt_i32_e64 s0, 0x7f0, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, vcc_lo, s0
s_and_saveexec_b32 s3, s0
s_cbranch_execz .LBB0_6
v_add3_u32 v6, v5, v3, 0x8000
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v7, 31, v6
v_lshlrev_b64 v[6:7], 2, v[6:7]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v6, s0, s4, v6
v_add_co_ci_u32_e64 v7, s0, s5, v7, s0
global_load_b32 v6, v[6:7], off
v_mad_u32_u24 v7, 0x84, v0, v2
s_waitcnt vmcnt(0)
ds_store_b32 v7, v6 offset:2112
.LBB0_6:
s_or_b32 exec_lo, exec_lo, s3
v_cmp_gt_i32_e64 s0, 0x7e8, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s3, vcc_lo, s0
s_and_saveexec_b32 s0, s3
s_cbranch_execz .LBB0_8
v_add3_u32 v3, v5, v3, 0xc000
v_mad_u32_u24 v2, 0x84, v0, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v4, 31, v3
v_lshlrev_b64 v[3:4], 2, v[3:4]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v3, vcc_lo, s4, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
global_load_b32 v3, v[3:4], off
s_waitcnt vmcnt(0)
ds_store_b32 v2, v3 offset:3168
.LBB0_8:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v2, s2, v1
v_add_nc_u32_e32 v3, s1, v0
v_lshlrev_b32_e32 v0, 2, v0
s_waitcnt lgkmcnt(0)
s_barrier
v_cmp_gt_i32_e32 vcc_lo, 0x800, v2
v_cmp_gt_i32_e64 s0, 0x800, v3
buffer_gl0_inv
s_and_b32 s0, vcc_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB0_10
v_mad_u32_u24 v5, 0x84, v1, v0
v_lshl_add_u32 v4, v3, 11, v2
ds_load_b32 v6, v5
v_ashrrev_i32_e32 v5, 31, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[4:5], 2, v[4:5]
v_add_co_u32 v4, s0, s6, v4
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v5, s0, s7, v5, s0
s_waitcnt lgkmcnt(0)
global_store_b32 v[4:5], v6, off
.LBB0_10:
s_or_b32 exec_lo, exec_lo, s1
v_cmp_gt_i32_e64 s0, 0x7f8, v3
v_lshlrev_b32_e32 v4, 11, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, vcc_lo, s0
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB0_12
v_mad_u32_u24 v6, 0x84, v1, v0
v_add3_u32 v5, v4, v2, 0x4000
ds_load_b32 v7, v6 offset:32
v_ashrrev_i32_e32 v6, 31, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[5:6], 2, v[5:6]
v_add_co_u32 v5, s0, s6, v5
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v6, s0, s7, v6, s0
s_waitcnt lgkmcnt(0)
global_store_b32 v[5:6], v7, off
.LBB0_12:
s_or_b32 exec_lo, exec_lo, s1
v_cmp_gt_i32_e64 s0, 0x7f0, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, vcc_lo, s0
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB0_14
v_mad_u32_u24 v6, 0x84, v1, v0
v_add3_u32 v5, v4, v2, 0x8000
ds_load_b32 v7, v6 offset:64
v_ashrrev_i32_e32 v6, 31, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[5:6], 2, v[5:6]
v_add_co_u32 v5, s0, s6, v5
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v6, s0, s7, v6, s0
s_waitcnt lgkmcnt(0)
global_store_b32 v[5:6], v7, off
.LBB0_14:
s_or_b32 exec_lo, exec_lo, s1
v_cmp_gt_i32_e64 s0, 0x7e8, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, vcc_lo, s0
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB0_16
v_mad_u32_u24 v1, 0x84, v1, v0
v_add3_u32 v0, v4, v2, 0xc000
ds_load_b32 v2, v1 offset:96
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_add_co_u32 v0, vcc_lo, s6, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
s_waitcnt lgkmcnt(0)
global_store_b32 v[0:1], v2, off
.LBB0_16:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| matrixTransposeUnrolled | 1,633 | 3,207 | stackv2-00000-of-00015 |
// Demangled: primer_kernel()
Function : _Z13primer_kernelv
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
EXIT ?trans5;
BRA 0x20;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: primer_kernel()
_Z13primer_kernelv:
s_endpgm
| primer_kernel | 93 | 13 | stackv2-00000-of-00015 |
// Demangled: dim(float*, float*)
Function : _Z3dimPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R7, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R7, R7, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R7, 0xfff, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans1;
LDC.64 R4, c[0x0][0x380] &wr=0x1 ?trans8;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans2;
LDG.E R3, desc[UR4][R2.64] &req={0} &wr=0x2 ?trans1;
IMAD.WIDE R4, R7, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R4.64] &wr=0x3 ?trans1;
BSSY.RECONVERGENT B0, 0x190 ?trans1;
MUFU.RCP R6, R3 &req={2} &wr=0x0 ?trans1;
FCHK P0, R0, R3 &req={3} &wr=0x1 ?trans1;
FFMA R7, -R3, R6, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R7, R6, R7, R6 ?WAIT4_END_GROUP;
FFMA R6, R0, R7, RZ ?WAIT4_END_GROUP;
FFMA R8, -R3, R6, R0 ?WAIT4_END_GROUP;
FFMA R7, R7, R8, R6 ?trans1;
@!P0 BRA 0x180 &req={1} ?trans6;
MOV R2, 0x180 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1b0 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
STG.E desc[UR4][R4.64], R7 ?trans1;
EXIT ?trans5;
SHF.R.U32.HI R7, RZ, 0x17, R3 ?trans1;
BSSY.RECONVERGENT B1, 0x810 ?trans1;
SHF.R.U32.HI R6, RZ, 0x17, R0 ?trans2;
LOP3.LUT R7, R7, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R6, R6, 0xff, RZ, 0xc0, !PT ?trans1;
MOV R8, R0 ?trans1;
IADD3 R12, PT, PT, R7, -0x1, RZ ?trans1;
MOV R9, R3 ?trans1;
IADD3 R11, PT, PT, R6, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R12, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R11, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R10, RZ ?trans1;
@!P0 BRA 0x3f0 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0x7f0 ?trans5;
LOP3.LUT P0, RZ, R9, 0x7fffffff, R8, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x7d0 ?trans5;
FSETP.NEU.FTZ.AND P2, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P1 BRA !P2, 0x7d0 ?trans5;
LOP3.LUT P2, RZ, R8, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P1, P2, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0x7b0 ?trans5;
LOP3.LUT P1, RZ, R9, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x780 ?trans5;
ISETP.GE.AND P0, PT, R11, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R12, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R10, RZ ?trans1;
@!P0 MOV R10, 0xffffffc0 ?trans1;
@!P0 FFMA R8, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R9, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R10, PT, PT, R10, 0x40, RZ ?WAIT7_END_GROUP;
LEA R0, R7, 0xc0800000, 0x17 ?trans1;
BSSY.RECONVERGENT B2, 0x770 ?trans1;
IADD3 R6, PT, PT, R6, -0x7f, RZ ?trans2;
IADD3 R9, PT, PT, -R0, R9, RZ ?WAIT3_END_GROUP;
IMAD R0, R6.reuse, -0x800000, R8 ?trans1;
IADD3 R7, PT, PT, R6, 0x7f, -R7 ?trans1;
MUFU.RCP R3, R9 &wr=0x0 ?trans1;
FADD.FTZ R11, -R9, -RZ ?trans2;
IADD3 R7, PT, PT, R7, R10, RZ ?trans2;
FFMA R12, R3, R11, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R12, R3, R12, R3 ?WAIT4_END_GROUP;
FFMA R3, R0, R12, RZ ?WAIT4_END_GROUP;
FFMA R8, R11, R3, R0 ?WAIT4_END_GROUP;
FFMA R13, R12, R8, R3 ?WAIT4_END_GROUP;
FFMA R8, R11, R13, R0 ?WAIT4_END_GROUP;
FFMA R3, R12, R8, R13 ?WAIT5_END_GROUP;
SHF.R.U32.HI R0, RZ, 0x17, R3 ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R10, PT, PT, R0, R7, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R10, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x750 ?trans5;
ISETP.GT.AND P0, PT, R10, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x720 ?trans5;
ISETP.GE.AND P0, PT, R10, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x760 ?trans5;
ISETP.GE.AND P0, PT, R10, -0x18, PT ?trans1;
LOP3.LUT R3, R3, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x760 ?trans5;
FFMA.RZ R0, R12, R8.reuse, R13.reuse ?trans1;
IADD3 R9, PT, PT, R10, 0x20, RZ ?trans1;
FFMA.RM R7, R12, R8, R13 ?trans1;
ISETP.NE.AND P1, PT, R10.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R10, RZ, PT ?trans1;
LOP3.LUT R0, R0, 0x7fffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R6, R0, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R0, R12, R8, R13 ?trans1;
IADD3 R8, PT, PT, -R10, RZ, RZ ?trans2;
SHF.L.U32 R9, R6, R9, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R0, R7, PT ?trans1;
SEL R7, R8, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R9, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R7, RZ, R7, R6 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R9, RZ, 0x1, R7 ?WAIT3_END_GROUP;
SEL R0, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R0, R0, 0x1, R9, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, R7, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R9, R0, RZ ?WAIT4_END_GROUP;
LOP3.LUT R3, R0, R3, RZ, 0xfc, !PT ?trans1;
BRA 0x760 ?trans6;
LOP3.LUT R3, R3, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x760 ?trans6;
IMAD R3, R7, 0x800000, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
BRA 0x800 ?trans5;
LOP3.LUT R3, R9, 0x80000000, R8, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x800 ?trans6;
LOP3.LUT R3, R9, 0x80000000, R8, 0x48, !PT ?trans1;
BRA 0x800 ?trans6;
MUFU.RSQ R3, -QNAN &wr=0x0 ?trans1;
BRA 0x800 ?trans5;
FADD.FTZ R3, R0, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R7, R3 &req={0} ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R2 0x0 ?trans5;
BRA 0x840;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: dim(float*, float*)
_Z3dimPfS_:
s_load_b32 s2, s[0:1], 0x1c
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e32 0x1000, v1
s_cbranch_execz .LBB2_2
s_load_b128 s[0:3], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_load_b32 s0, s[2:3], 0x0
global_load_b32 v2, v[0:1], off
s_waitcnt vmcnt(0) lgkmcnt(0)
v_div_scale_f32 v3, null, s0, s0, v2
v_rcp_f32_e32 v4, v3
s_waitcnt_depctr 0xfff
v_fma_f32 v5, -v3, v4, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v4, v5, v4
v_div_scale_f32 v5, vcc_lo, v2, s0, v2
v_mul_f32_e32 v6, v5, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v7, -v3, v6, v5
v_fmac_f32_e32 v6, v7, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v3, -v3, v6, v5
v_div_fmas_f32 v3, v3, v4, v6
s_delay_alu instid0(VALU_DEP_1)
v_div_fixup_f32 v2, v3, s0, v2
global_store_b32 v[0:1], v2, off
.LBB2_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| dim | 3,219 | 781 | stackv2-00000-of-00015 |
// Demangled: normalization(float*, float*, float, float)
Function : _Z13normalizationPfS_ff
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R2, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R2, R2, UR4, R3 &req={1} ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R2, 0xfff, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R8, c[0x0][0x390] &wr=0x2 ?trans1;
IMAD.WIDE R4, R2, 0x4, R4 &req={0} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &req={1} &wr=0x3 ?trans1;
BSSY.RECONVERGENT B0, 0x190 ?trans1;
MUFU.RCP R6, R9 &req={2} &wr=0x0 ?trans2;
FFMA R3, R6, -R9, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R3, R6, R3, R6 ?trans1;
FADD R0, R5, -R8 &req={3} ?WAIT4_END_GROUP;
FCHK P0, R0, R9 &wr=0x0 ?trans1;
FFMA R6, R0, R3, RZ ?WAIT4_END_GROUP;
FFMA R7, R6, -R9, R0 ?WAIT4_END_GROUP;
FFMA R7, R3, R7, R6 ?trans1;
@!P0 BRA 0x180 &req={0} ?trans6;
MOV R4, 0x180 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1d0 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans2;
IMAD.WIDE R2, R2, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R7 ?trans1;
EXIT ?trans5;
LDC R3, c[0x0][0x394] &wr=0x0 ?trans1;
SHF.R.U32.HI R5, RZ, 0x17, R0 ?trans1;
LDCU UR6, c[0x0][0x394] &wr=0x1 ?trans1;
BSSY.RECONVERGENT B1, 0x850 ?trans1;
MOV R7, R0 ?trans1;
LOP3.LUT R5, R5, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R10, PT, PT, R5, -0x1, RZ ?trans1;
MOV R8, UR6 &req={1} ?trans1;
SHF.R.U32.HI R6, RZ, 0x17, R3 &req={0} ?WAIT4_END_GROUP;
LOP3.LUT R6, R6, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R11, PT, PT, R6, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R11, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R10, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R9, RZ ?trans1;
@!P0 BRA 0x430 ?trans6;
FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0x830 ?trans5;
LOP3.LUT P0, RZ, R8, 0x7fffffff, R7, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x810 ?trans5;
FSETP.NEU.FTZ.AND P2, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P1 BRA !P2, 0x810 ?trans5;
LOP3.LUT P2, RZ, R7, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P1, P2, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0x7f0 ?trans5;
LOP3.LUT P1, RZ, R8, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x7c0 ?trans5;
ISETP.GE.AND P0, PT, R10, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R11, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R9, RZ ?trans1;
@!P0 MOV R9, 0xffffffc0 ?trans1;
@!P0 FFMA R7, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R8, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R9, PT, PT, R9, 0x40, RZ ?WAIT7_END_GROUP;
LEA R3, R6, 0xc0800000, 0x17 ?trans1;
BSSY.RECONVERGENT B2, 0x7b0 ?trans1;
IADD3 R5, PT, PT, R5, -0x7f, RZ ?trans2;
IADD3 R3, PT, PT, -R3, R8, RZ ?WAIT3_END_GROUP;
IMAD R0, R5.reuse, -0x800000, R7 ?trans1;
IADD3 R6, PT, PT, R5, 0x7f, -R6 ?trans1;
MUFU.RCP R8, R3 &wr=0x0 ?trans1;
FADD.FTZ R11, -R3, -RZ ?trans2;
IADD3 R6, PT, PT, R6, R9, RZ ?trans2;
FFMA R13, R8, R11, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R10, R8, R13, R8 ?WAIT4_END_GROUP;
FFMA R7, R0, R10, RZ ?WAIT4_END_GROUP;
FFMA R8, R11, R7, R0 ?WAIT4_END_GROUP;
FFMA R13, R10, R8, R7 ?WAIT4_END_GROUP;
FFMA R8, R11, R13, R0 ?WAIT4_END_GROUP;
FFMA R7, R10, R8, R13 ?WAIT5_END_GROUP;
SHF.R.U32.HI R0, RZ, 0x17, R7 ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R9, PT, PT, R0, R6, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R9, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x790 ?trans5;
ISETP.GT.AND P0, PT, R9, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x760 ?trans5;
ISETP.GE.AND P0, PT, R9, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x7a0 ?trans5;
ISETP.GE.AND P0, PT, R9, -0x18, PT ?trans1;
LOP3.LUT R7, R7, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x7a0 ?trans5;
FFMA.RZ R0, R10.reuse, R8.reuse, R13.reuse ?trans1;
IADD3 R6, PT, PT, R9.reuse, 0x20, RZ ?trans1;
FFMA.RM R3, R10, R8, R13 ?trans1;
ISETP.NE.AND P1, PT, R9.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R9, RZ, PT ?trans1;
LOP3.LUT R0, R0, 0x7fffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R5, R0, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R0, R10, R8, R13 ?trans1;
IADD3 R8, PT, PT, -R9, RZ, RZ ?trans2;
SHF.L.U32 R6, R5, R6, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R0, R3, PT ?trans1;
SEL R0, R8, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R6, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R0, RZ, R0, R5 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R6, RZ, 0x1, R0 ?WAIT3_END_GROUP;
SEL R3, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R3, R3, 0x1, R6, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, R0, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R6, PT, PT, R6, R3, RZ ?WAIT4_END_GROUP;
LOP3.LUT R7, R6, R7, RZ, 0xfc, !PT ?trans1;
BRA 0x7a0 ?trans6;
LOP3.LUT R7, R7, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R7, R7, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x7a0 ?trans6;
IMAD R7, R6, 0x800000, R7 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
BRA 0x840 ?trans5;
LOP3.LUT R7, R8, 0x80000000, R7, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R7, R7, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x840 ?trans6;
LOP3.LUT R7, R8, 0x80000000, R7, 0x48, !PT ?trans1;
BRA 0x840 ?trans6;
MUFU.RSQ R7, -QNAN &wr=0x0 ?trans1;
BRA 0x840 ?trans5;
FADD.FTZ R7, R0, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
HFMA2 R5, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R4 0x0 &req={0} ?trans5;
BRA 0x870;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: normalization(float*, float*, float, float)
_Z13normalizationPfS_ff:
s_load_b32 s2, s[0:1], 0x24
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e32 0x1000, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[4:7], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_subrev_f32_e32 v2, s0, v2
v_div_scale_f32 v3, null, s1, s1, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f32_e32 v4, v3
s_waitcnt_depctr 0xfff
v_fma_f32 v5, -v3, v4, 1.0
v_fmac_f32_e32 v4, v5, v4
v_div_scale_f32 v5, vcc_lo, v2, s1, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v6, v5, v4
v_fma_f32 v7, -v3, v6, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v6, v7, v4
v_fma_f32 v3, -v3, v6, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_div_fmas_f32 v3, v3, v4, v6
v_add_co_u32 v0, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
v_div_fixup_f32 v2, v3, s1, v2
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| normalization | 3,312 | 865 | stackv2-00000-of-00015 |
// Demangled: gpuSort(int*, unsigned long)
Function : _Z7gpuSortPim
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R13, SR_TID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans6;
LDC.64 R8, c[0x0][0x388] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x170 ?trans1;
S2R R0, SR_CTAID.X &wr=0x1 ?trans6;
LDC.64 R10, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD R13, R0, UR4, R13 &req={1} ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans3;
IMAD.WIDE.U32 R2, R13, 0x2, RZ ?WAIT3_END_GROUP;
LOP3.LUT R4, R2.reuse, 0x1, RZ, 0xfc, !PT ?trans2;
IADD.64 R6, R2, 0x2 ?trans2;
MOV R5, R3 ?trans1;
IMAD.WIDE.U32 R2, R13, 0x8, R10 &req={3} ?WAIT3_END_GROUP;
ISETP.GE.U64.AND P2, PT, R6, R8.reuse, PT &req={2} ?trans2;
ISETP.GE.U64.AND P0, PT, R4, R8, PT ?WAIT14_END_GROUP;
@P0 BRA 0x160 &req={1,0} ?trans5;
LDG.E R5, desc[UR4][R2.64] &wr=0x2 ?trans4;
LDG.E R0, desc[UR4][R2.64+0x4] &wr=0x2 ?trans2;
ISETP.GT.AND P1, PT, R5, R0, PT &req={2} ?WAIT13_END_GROUP;
@P1 STG.E desc[UR4][R2.64], R0 &rd=0x0 ?trans4;
@P1 STG.E desc[UR4][R2.64+0x4], R5 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BSSY.RECONVERGENT B0, 0x1f0 ?trans4;
@P2 BRA 0x1e0 ?trans5;
LDG.E R0, desc[UR4][R2.64+0x4] &req={0} &wr=0x2 ?trans4;
LDG.E R5, desc[UR4][R2.64+0x8] &wr=0x2 ?trans2;
ISETP.GT.AND P1, PT, R0, R5, PT &req={2} ?WAIT13_END_GROUP;
@P1 STG.E desc[UR4][R2.64+0x4], R5 &rd=0x1 ?trans4;
@P1 STG.E desc[UR4][R2.64+0x8], R0 &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
@P0 EXIT ?trans5;
LDG.E R5, desc[UR4][R2.64] &req={1,0} &wr=0x2 ?trans4;
LDG.E R0, desc[UR4][R2.64+0x4] &wr=0x2 ?trans2;
ISETP.GT.AND P0, PT, R5, R0, PT &req={2} ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
STG.E desc[UR4][R2.64], R0 ?trans4;
STG.E desc[UR4][R2.64+0x4], R5 ?trans1;
EXIT ?trans5;
BRA 0x270;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: gpuSort(int*, unsigned long)
_Z7gpuSortPim:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b128 s[4:7], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s0, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
v_mov_b32_e32 v2, 0
v_lshlrev_b64 v[2:3], 1, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mov_b32_e32 v1, v3
v_or_b32_e32 v0, 1, v2
s_delay_alu instid0(VALU_DEP_1)
v_cmp_gt_u64_e32 vcc_lo, s[6:7], v[0:1]
v_lshlrev_b64 v[0:1], 2, v[2:3]
s_and_saveexec_b32 s1, vcc_lo
s_cbranch_execz .LBB0_3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v4, s0, s4, v0
v_add_co_ci_u32_e64 v5, s0, s5, v1, s0
global_load_b64 v[6:7], v[4:5], off
s_waitcnt vmcnt(0)
v_cmp_gt_i32_e64 s0, v6, v7
s_delay_alu instid0(VALU_DEP_1)
s_and_b32 exec_lo, exec_lo, s0
s_cbranch_execz .LBB0_3
v_mov_b32_e32 v8, v6
global_store_b64 v[4:5], v[7:8], off
.LBB0_3:
s_or_b32 exec_lo, exec_lo, s1
v_add_co_u32 v2, s0, v2, 2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e64 v3, s0, 0, v3, s0
s_mov_b32 s1, exec_lo
v_cmpx_gt_u64_e64 s[6:7], v[2:3]
s_cbranch_execz .LBB0_6
v_add_co_u32 v2, s0, s4, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e64 v3, s0, s5, v1, s0
global_load_b64 v[4:5], v[2:3], off offset:4
s_waitcnt vmcnt(0)
v_cmp_gt_i32_e64 s0, v4, v5
s_and_b32 exec_lo, exec_lo, s0
s_cbranch_execz .LBB0_6
v_mov_b32_e32 v6, v4
global_store_b64 v[2:3], v[5:6], off offset:4
.LBB0_6:
s_or_b32 exec_lo, exec_lo, s1
s_and_saveexec_b32 s0, vcc_lo
s_cbranch_execz .LBB0_9
v_add_co_u32 v0, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
global_load_b64 v[2:3], v[0:1], off
s_waitcnt vmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, v2, v3
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_9
v_mov_b32_e32 v4, v2
global_store_b64 v[0:1], v[3:4], off
.LBB0_9:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| gpuSort | 1,028 | 1,090 | stackv2-00000-of-00015 |
// Demangled: blockMatching_kernel(int, int, unsigned char*, int, unsigned char*, int, int, int, DataOut*)
Function : _Z20blockMatching_kerneliiPhiS_iiiP7DataOut
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC.64 R6, c[0x0][0x380] &wr=0x1 ?trans1;
S2R R2, SR_CTAID.X &wr=0x2 ?trans1;
LDCU UR10, c[0x0][0x360] &wr=0x2 ?trans1;
MOV.64 R10, 0x430c6bf526340000 ?WAIT2_END_GROUP;
S2R R3, SR_TID.X &wr=0x2 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x3 ?trans1;
IADD3 R4, PT, PT, R6, -R7, RZ &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R4, RZ, PT ?trans1;
IMAD R5, R2, UR10, R3 &req={2} ?WAIT12_END_GROUP;
@!P0 BRA 0xb90 &req={3,0} ?trans5;
LDCU.64 UR6, c[0x0][0x398] &wr=0x0 ?trans1;
LDCU.64 UR12, c[0x0][0x388] &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x3a8] &wr=0x2 ?trans1;
ISETP.NE.S64.AND P0, PT, RZ, UR6, PT &req={0} ?trans2;
ISETP.NE.S64.AND P1, PT, RZ, UR12, PT &req={1} ?WAIT3_END_GROUP;
IADD3 R6, PT, PT, -R7, UR4, RZ &req={2} ?WAIT11_END_GROUP;
@P0 BRA P1, 0x220 ?trans5;
ISETP.GE.AND P0, PT, R4, R7, PT ?trans1;
MOV.64 R10, RZ ?trans2;
HFMA2 R13, -RZ, RZ, 0, 0 ?trans1;
MOV R12, R5 ?WAIT9_END_GROUP;
@!P0 BRA 0xb90 ?trans5;
LDCU UR4, c[0x0][0x384] &wr=0x0 ?trans2;
MOV R0, UR4 &req={0} ?WAIT7_END_GROUP;
DSETP.GT.AND P0, PT, R10, RZ, PT &wr=0x0 ?trans2;
SEL R13, R0.reuse, R13, P0 &req={0} ?trans1;
IADD3 R0, PT, PT, R0, R7, RZ ?trans1;
FSEL R10, R10, RZ, !P0 ?trans1;
FSEL R11, R11, RZ, !P0 ?trans1;
SEL R12, R5, R12, P0 ?trans2;
ISETP.GT.AND P1, PT, R0, R4, PT ?WAIT13_END_GROUP;
@!P1 BRA 0x190 ?trans5;
BRA 0xb90 ?trans5;
LDCU UR5, c[0x0][0x3a4] &wr=0x0 ?trans1;
ISETP.GT.AND P0, PT, R6, -0x1, PT ?trans1;
UIMAD UR4, UR4, UR5, URZ &req={0} ?trans2;
IADD3 R7, PT, PT, -R7, UR5, RZ ?WAIT7_END_GROUP;
I2F.F64 R14, UR4 &wr=0x0 ?trans3;
@P0 BRA 0x430 ?trans5;
MOV R18, R14 &req={0} ?trans1;
MOV R19, R15 ?trans1;
CS2R R20, SRZ ?trans1;
MOV R0, 0x2d0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xe50 ?trans5;
LDCU UR6, c[0x0][0x384] &wr=0x0 ?trans1;
MOV R6, R24 ?trans1;
MOV R7, R25 ?trans1;
UMOV.64 UR4, 0x430c6bf526340000 ?WAIT5_END_GROUP;
DSETP.GEU.AND P0, PT, R6, UR4, PT &wr=0x1 ?trans2;
FSEL R10, R24, 6.2450045135165055399e-16, !P0 &req={1} ?trans1;
FSEL R11, R25, 140.4217071533203125, !P0 ?trans1;
SEL R13, R13, RZ, P0 ?trans1;
SEL R12, R5, R12, !P0 ?trans1;
ISETP.GE.AND P1, PT, R4, UR6, PT &req={0} ?WAIT13_END_GROUP;
@!P1 BRA 0xb90 ?trans5;
LDCU UR4, c[0x0][0x384] &wr=0x0 ?trans2;
MOV R0, UR4 &req={0} ?WAIT7_END_GROUP;
DSETP.GEU.AND P0, PT, R6, R10, PT &wr=0x0 ?trans2;
SEL R13, R0.reuse, R13, !P0 &req={0} ?trans1;
IADD3 R0, PT, PT, R0, UR6, RZ ?trans1;
FSEL R10, R6, R10, !P0 ?trans1;
FSEL R11, R7, R11, !P0 ?trans1;
SEL R12, R5, R12, !P0 ?trans2;
ISETP.GT.AND P1, PT, R0, R4, PT ?WAIT13_END_GROUP;
@!P1 BRA 0x3a0 ?trans5;
BRA 0xb90 ?trans5;
ISETP.GE.AND P0, PT, R7, RZ, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xa70 ?trans5;
MOV.64 R10, 0x430c6bf526340000 ?trans2;
HFMA2 R8, -RZ, RZ, 0, 0 ?WAIT7_END_GROUP;
MOV.64 R18, RZ ?trans2;
UMOV UR4, URZ ?WAIT6_END_GROUP;
LDCU UR6, c[0x0][0x3a0] &wr=0x1 ?trans1;
LDC.64 R24, c[0x0][0x398] &wr=0x2 ?trans1;
IADD3 R9, PT, PT, R5, UR4, RZ ?trans1;
LDCU UR11, c[0x0][0x384] &wr=0x3 ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x4 ?trans1;
LDCU.64 UR12, c[0x0][0x388] &wr=0x0 ?trans1;
UIMAD UR6, UR4, UR6, URZ &req={1} ?trans1;
UIADD3 UR4, UPT, UPT, UR4, UR11, URZ &req={3} ?trans1;
IMAD R9, R9, UR5, R8 &req={4} ?trans1;
UMOV UR5, URZ ?WAIT4_END_GROUP;
ISETP.LT.AND P1, PT, R6, UR4, PT &req={0} ?WAIT13_END_GROUP;
USHF.R.S32.HI UR7, URZ, 0x1f, UR6 ?trans1;
SHF.R.S32.HI R17, RZ, 0x1f, R9 ?trans1;
MOV R16, R9 ?WAIT5_END_GROUP;
IADD.64 R20, R16, UR12 ?trans2;
IADD.64 R16, R24, UR6 &req={2} ?WAIT5_END_GROUP;
LDG.E.U8 R20, desc[UR8][R20.64] &wr=0x2 ?trans4;
LDG.E.U8 R17, desc[UR8][R16.64] &wr=0x2 ?trans1;
UIADD3 UR5, UPT, UPT, UR5, UR11, URZ ?trans1;
UIADD3 UR6, UPT, UPT, UR6, UR11, URZ ?trans2;
IADD3 R9, PT, PT, R9, UR11, RZ ?WAIT3_END_GROUP;
ISETP.LT.AND P0, PT, R7, UR5, PT ?trans1;
IADD3 R0, PT, PT, -R20, R17, RZ &req={2} ?WAIT5_END_GROUP;
IMAD R22, R0, R0, RZ ?WAIT6_END_GROUP;
I2F.F64.U32 R22, R22 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R22, R18 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@!P0 BRA 0x540 &req={1,0} ?trans5;
@!P1 BRA 0x490 ?trans5;
MUFU.RCP64H R17, R15 &wr=0x0 ?trans1;
MOV R16, 0x1 ?trans1;
FSETP.GEU.AND P1, PT, |R19|, 6.5827683646048100446e-37, PT ?trans1;
BSSY.RECONVERGENT B0, 0x9d0 ?trans4;
DFMA R20, R16, -R14, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R20, R20, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R16, R20, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R20, -R14, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R20, R16, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R20, R18, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, R20, -R14, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R16, R22, R20 &req={0} &wr=0x0 ?trans2;
FFMA R0, RZ, R15, R17 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA P1, 0x9c0 ?trans5;
MOV R20, R18 ?trans1;
MOV R21, R19 ?trans1;
MOV R18, R14 ?trans1;
MOV R19, R15 ?trans1;
MOV R0, 0x9a0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xe50 ?trans5;
MOV R16, R24 ?trans1;
MOV R17, R25 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDC R9, c[0x0][0x384] &wr=0x0 ?trans1;
DSETP.GEU.AND P0, PT, R16, R10, PT &wr=0x1 ?trans2;
SEL R13, R8, R13, !P0 &req={1} ?trans1;
FSEL R10, R16, R10, !P0 ?trans1;
FSEL R11, R17, R11, !P0 ?trans1;
SEL R12, R5, R12, !P0 ?trans1;
IADD3 R8, PT, PT, R8, R9, RZ &req={0} ?WAIT5_END_GROUP;
ISETP.GT.AND P1, PT, R8, R4, PT ?WAIT13_END_GROUP;
@!P1 BRA 0x470 ?trans5;
BRA 0xb90 ?trans5;
MOV R18, R14 &req={0} ?trans1;
MOV R19, R15 ?trans1;
CS2R R20, SRZ ?trans1;
MOV R0, 0xac0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xe50 ?trans5;
LDC R9, c[0x0][0x384] &wr=0x0 ?trans1;
MOV.64 R10, 0x430c6bf526340000 ?trans2;
HFMA2 R0, -RZ, RZ, 0, 0 ?trans1;
MOV R6, R24 ?trans1;
MOV R7, R25 ?WAIT7_END_GROUP;
DSETP.GEU.AND P0, PT, R6, R10, PT &wr=0x1 ?trans2;
SEL R13, R0.reuse, R13, !P0 &req={1} ?trans1;
IADD3 R0, PT, PT, R0, R9, RZ &req={0} ?trans1;
FSEL R10, R6, R10, !P0 ?trans1;
FSEL R11, R7, R11, !P0 ?trans1;
SEL R12, R5, R12, !P0 ?trans2;
ISETP.GT.AND P1, PT, R0, R4, PT ?WAIT13_END_GROUP;
@!P1 BRA 0xb10 ?trans5;
LDC R0, c[0x0][0x364] &wr=0x0 ?trans1;
UMOV UR4, 0x400 ?WAIT7_END_GROUP;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
IMAD R0, R0, UR10, RZ &req={0} ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, 0x2, PT ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?WAIT6_END_GROUP;
LEA R5, R5, UR4, 0x4 ?WAIT5_END_GROUP;
STS.64 [R5], R10 &rd=0x0 ?trans4;
STS.64 [R5+0x8], R12 &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P0 BRA 0xd90 ?trans5;
UMOV UR5, 0x1 ?WAIT5_END_GROUP;
MOV R10, UR5 &req={0} ?trans1;
UIADD3 UR5, UPT, UPT, UR5, UR5, URZ ?trans1;
BSSY.RECONVERGENT B0, 0xd60 ?trans5;
IMAD R9, R3, UR5, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R9, R0, PT ?WAIT13_END_GROUP;
@P0 BRA 0xd50 &req={1} ?trans5;
LEA R11, R9.reuse, UR4, 0x4 ?trans2;
IADD3 R9, PT, PT, R9, R10, RZ ?WAIT3_END_GROUP;
IMAD R8, R10, 0x10, R11 ?trans1;
LDS.64 R4, [R11] ?trans4;
LDS.64 R6, [R8] &wr=0x0 ?trans2;
DSETP.GT.AND P0, PT, R4, R6, PT &req={0} &wr=0x0 ?trans2;
ISETP.GE.U32.OR P0, PT, R9, R0, !P0 &req={0} ?WAIT13_END_GROUP;
@!P0 LDS.64 R4, [R8+0x8] &wr=0x0 ?trans4;
@!P0 STS.64 [R11], R6 &rd=0x1 ?trans4;
@!P0 STS.64 [R11+0x8], R4 &req={0} &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.LE.U32.AND P0, PT, R0, UR5, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xc50 ?trans5;
ISETP.NE.AND P0, PT, R3, RZ, PT ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
S2UR UR5, SR_CgaCtaId &wr=0x2 ?trans1;
UMOV UR4, 0x400 ?WAIT7_END_GROUP;
LDC.64 R6, c[0x0][0x3b0] &req={1} &wr=0x1 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={2} ?trans1;
IMAD.WIDE.U32 R2, R2, 0x10, R6 &req={1} ?WAIT8_END_GROUP;
LDS.64 R4, [UR4] &req={0} &wr=0x0 ?trans4;
LDS.64 R8, [UR4+0x8] &wr=0x1 ?trans4;
STG.E.64 desc[UR8][R2.64], R4 &req={0} ?trans4;
STG.E.64 desc[UR8][R2.64+0x8], R8 &req={1} ?trans1;
EXIT ?trans5;
FSETP.GEU.AND P2, PT, |R21|.reuse, 1.469367938527859385e-39, PT ?trans1;
LOP3.LUT R9, R21, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B1, 0x1630 ?trans1;
LOP3.LUT R32, R19.reuse, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
MOV R30, 0x1ca00000 ?trans1;
FSETP.GEU.AND P0, PT, |R19|.reuse, 1.469367938527859385e-39, PT ?trans1;
LOP3.LUT R16, R19, 0x800fffff, RZ, 0xc0, !PT ?trans2;
ISETP.GE.U32.AND P1, PT, R9, R32, PT ?trans1;
MOV R31, R9 ?trans1;
LOP3.LUT R17, R16, 0x3ff00000, RZ, 0xfc, !PT ?WAIT3_END_GROUP;
@!P2 LOP3.LUT R22, R19, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
SEL R23, R30.reuse, 0x63400000, !P1 ?trans1;
@!P2 MOV R28, RZ ?trans1;
MOV R16, R18 ?trans2;
@!P2 ISETP.GE.U32.AND P3, PT, R9, R22, PT ?trans1;
MOV R22, R20 ?trans1;
LOP3.LUT R23, R23, 0x800fffff, R21, 0xf8, !PT ?trans1;
MOV R24, 0x1 ?trans2;
@!P2 SEL R29, R30, 0x63400000, !P3 ?trans1;
@!P0 DMUL R16, R18, 8.98846567431157953865e+307 &wr=0x0 ?trans2;
MUFU.RCP64H R25, R17 &req={0} &wr=0x0 ?trans1;
@!P0 LOP3.LUT R32, R17, 0x7ff00000, RZ, 0xc0, !PT ?WAIT2_END_GROUP;
@!P2 LOP3.LUT R29, R29, 0x80000000, R21, 0xf8, !PT ?trans2;
IADD3 R34, PT, PT, R32, -0x1, RZ ?trans2;
@!P2 LOP3.LUT R29, R29, 0x100000, RZ, 0xfc, !PT ?WAIT15_END_GROUP;
NOP ?WAIT10_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P2 DFMA R22, R22, 2, -R28 &wr=0x1 ?trans2;
@!P2 LOP3.LUT R31, R23, 0x7ff00000, RZ, 0xc0, !PT &req={1} ?WAIT4_END_GROUP;
IADD3 R33, PT, PT, R31, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R33, 0x7feffffe, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R34, 0x7feffffe, P0 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R26, R24, -R16, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R26, R26, R26, R26 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R26, R24, R26, R24 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R24, R26, -R16, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R24, R26, R24, R26 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R26, R24, R22 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R28, R26, -R16, R22 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R28, R24, R28, R26 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0x14e0 &req={1,0} ?trans5;
LOP3.LUT R24, R19, 0x7ff00000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R20, PT, PT, R9.reuse, -R24.reuse, RZ ?trans1;
ISETP.GE.U32.AND P0, PT, R9, R24, PT ?WAIT4_END_GROUP;
VIMNMX.S32 R20, R20, -0x46a00000, !PT ?trans1;
SEL R9, R30, 0x63400000, !P0 ?WAIT4_END_GROUP;
VIMNMX.S32 R20, R20, 0x46a00000, PT ?WAIT5_END_GROUP;
IADD3 R9, PT, PT, -R9, R20, RZ ?trans1;
MOV R20, RZ ?WAIT3_END_GROUP;
IADD3 R21, PT, PT, R9, 0x7fe00000, RZ ?WAIT6_END_GROUP;
DMUL R24, R28, R20 &wr=0x0 ?trans2;
FSETP.GTU.AND P0, PT, |R25|, 1.469367938527859385e-39, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x1620 ?trans5;
DFMA R16, R28, -R16, R22 &wr=0x0 ?trans1;
MOV R20, RZ ?trans1;
FSETP.NEU.AND P0, PT, R17.reuse, RZ, PT &req={0} ?trans1;
LOP3.LUT R19, R17, 0x80000000, R19, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R21, R19, R21, RZ, 0xfc, !PT ?WAIT8_END_GROUP;
@!P0 BRA 0x1620 ?trans5;
IADD3 R17, PT, PT, -R9.reuse, RZ, RZ ?trans1;
MOV R16, RZ ?trans1;
IADD3 R9, PT, PT, -R9, -0x43300000, RZ ?trans1;
DMUL.RP R20, R28, R20 &wr=0x0 ?trans2;
LOP3.LUT R19, R21, R19, RZ, 0x3c, !PT &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R24, -R16, R28 &wr=0x0 ?trans2;
FSETP.NEU.AND P0, PT, |R17|, R9, PT &req={0} ?WAIT5_END_GROUP;
FSEL R24, R20, R24, !P0 ?trans1;
FSEL R25, R19, R25, !P0 ?trans1;
BRA 0x1620 ?trans6;
DSETP.NAN.AND P0, PT, R20, R20, PT &wr=0x0 ?trans2;
@P0 BRA 0x1600 &req={0} ?trans5;
DSETP.NAN.AND P0, PT, R18, R18, PT &wr=0x0 ?trans2;
@P0 BRA 0x15d0 &req={0} ?trans5;
ISETP.NE.AND P0, PT, R31, R32, PT ?trans1;
MOV.64 R24, 0xfff8000000000000 ?WAIT12_END_GROUP;
@!P0 BRA 0x1620 ?trans5;
ISETP.NE.AND P0, PT, R31, 0x7ff00000, PT ?trans1;
LOP3.LUT R25, R21, 0x80000000, R19, 0x48, !PT ?WAIT4_END_GROUP;
ISETP.EQ.OR P0, PT, R32, RZ, !P0 ?WAIT13_END_GROUP;
@P0 LOP3.LUT R9, R25, 0x7ff00000, RZ, 0xfc, !PT ?trans1;
@!P0 MOV R24, RZ ?trans1;
@P0 MOV R24, RZ ?WAIT3_END_GROUP;
@P0 MOV R25, R9 ?trans1;
BRA 0x1620 ?trans6;
LOP3.LUT R25, R19, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R24, R18 ?trans1;
BRA 0x1620 ?trans6;
LOP3.LUT R25, R21, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R24, R20 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R16, R0 ?trans1;
HFMA2 R17, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R16 0x0 ?trans5;
BRA 0x1660;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: blockMatching_kernel(int, int, unsigned char*, int, unsigned char*, int, int, int, DataOut*)
_Z20blockMatching_kerneliiPhiS_iiiP7DataOut:
s_clause 0x1
s_load_b32 s5, s[0:1], 0x44
s_load_b64 s[6:7], s[0:1], 0x0
s_add_u32 s2, s0, 56
s_mov_b32 s4, s15
s_addc_u32 s3, s1, 0
s_mov_b32 s12, 0x26340000
s_mov_b32 s13, 0x430c6bf5
s_mov_b32 s14, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s5, s5, 0xffff
s_sub_i32 s6, s6, s7
v_mad_u64_u32 v[1:2], null, s4, s5, v[0:1]
s_cmp_lt_i32 s6, 0
s_cbranch_scc1 .LBB0_11
s_clause 0x2
s_load_b128 s[24:27], s[0:1], 0x20
s_load_b64 s[8:9], s[0:1], 0x8
s_load_b64 s[10:11], s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_load_b32 s27, s[0:1], 0x10
v_mov_b32_e32 v8, 0
s_mov_b32 s21, s7
s_mov_b32 s23, s7
s_mul_i32 s15, s26, s25
s_cmp_lg_u64 s[8:9], 0
v_cvt_f64_i32_e32 v[2:3], s15
s_cselect_b32 s16, -1, 0
s_cmp_lg_u64 s[10:11], 0
s_waitcnt lgkmcnt(0)
v_mul_lo_u32 v7, s27, v1
s_cselect_b32 s17, -1, 0
s_sub_i32 s15, s26, s7
s_and_b32 s16, s16, s17
s_cmp_gt_i32 s15, -1
v_mov_b32_e32 v4, s12
s_cselect_b32 s17, -1, 0
s_sub_i32 s18, s25, s7
v_dual_mov_b32 v5, s13 :: v_dual_mov_b32 v10, v8
v_mov_b32_e32 v9, v7
s_cmp_gt_i32 s18, -1
s_mul_i32 s22, s24, s7
s_cselect_b32 s19, -1, 0
s_ashr_i32 s20, s7, 31
s_mul_i32 s24, s27, s7
.LBB0_2:
v_mov_b32_e32 v11, 0
v_mov_b32_e32 v12, 0
s_and_not1_b32 vcc_lo, exec_lo, s16
s_cbranch_vccnz .LBB0_10
v_mov_b32_e32 v11, 0
v_mov_b32_e32 v12, 0
s_and_not1_b32 vcc_lo, exec_lo, s17
s_cbranch_vccnz .LBB0_9
v_dual_mov_b32 v11, 0 :: v_dual_mov_b32 v14, v10
v_dual_mov_b32 v12, 0 :: v_dual_mov_b32 v13, v9
s_mov_b32 s25, 0
s_mov_b32 s26, 0
.LBB0_5:
s_and_not1_b32 vcc_lo, exec_lo, s19
s_cbranch_vccnz .LBB0_8
s_ashr_i32 s12, s25, 31
s_add_u32 s27, s10, s25
s_addc_u32 s28, s11, s12
s_mov_b64 s[12:13], 0
.LBB0_7:
s_delay_alu instid0(SALU_CYCLE_1)
v_add_nc_u32_e32 v15, s12, v13
s_add_u32 s30, s27, s12
s_addc_u32 s31, s28, s13
s_add_u32 s12, s12, s21
s_addc_u32 s13, s13, s20
v_ashrrev_i32_e32 v16, 31, v15
v_add_co_u32 v15, vcc_lo, s8, v15
s_cmp_gt_i32 s12, s18
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v16, vcc_lo, s9, v16, vcc_lo
global_load_u8 v17, v8, s[30:31]
global_load_u8 v15, v[15:16], off
s_waitcnt vmcnt(0)
v_sub_nc_u32_e32 v15, v17, v15
v_mul_i32_i24_e32 v15, v15, v15
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f64_i32_e32 v[15:16], v15
v_add_f64 v[11:12], v[11:12], v[15:16]
s_cbranch_scc0 .LBB0_7
.LBB0_8:
v_add_co_u32 v13, vcc_lo, v13, s24
v_add_co_ci_u32_e32 v14, vcc_lo, 0, v14, vcc_lo
s_add_i32 s26, s26, s7
s_add_i32 s25, s25, s22
s_cmp_gt_i32 s26, s15
s_cbranch_scc0 .LBB0_5
.LBB0_9:
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_scale_f64 v[13:14], null, v[2:3], v[2:3], v[11:12]
v_rcp_f64_e32 v[15:16], v[13:14]
s_waitcnt_depctr 0xfff
v_fma_f64 v[17:18], -v[13:14], v[15:16], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[15:16], v[15:16], v[17:18], v[15:16]
v_fma_f64 v[17:18], -v[13:14], v[15:16], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fma_f64 v[15:16], v[15:16], v[17:18], v[15:16]
v_div_scale_f64 v[17:18], vcc_lo, v[11:12], v[2:3], v[11:12]
v_mul_f64 v[19:20], v[17:18], v[15:16]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[13:14], -v[13:14], v[19:20], v[17:18]
v_div_fmas_f64 v[13:14], v[13:14], v[15:16], v[19:20]
s_delay_alu instid0(VALU_DEP_1)
v_div_fixup_f64 v[11:12], v[13:14], v[2:3], v[11:12]
.LBB0_10:
s_delay_alu instid0(VALU_DEP_1)
v_cmp_lt_f64_e32 vcc_lo, v[11:12], v[4:5]
v_dual_cndmask_b32 v5, v5, v12 :: v_dual_cndmask_b32 v4, v4, v11
v_cndmask_b32_e32 v6, v6, v1, vcc_lo
v_cndmask_b32_e64 v7, v7, s14, vcc_lo
v_add_co_u32 v9, vcc_lo, v9, s23
v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
s_add_i32 s14, s14, s7
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_gt_i32 s14, s6
s_cbranch_scc0 .LBB0_2
s_branch .LBB0_12
.LBB0_11:
v_dual_mov_b32 v4, s12 :: v_dual_mov_b32 v5, s13
.LBB0_12:
s_delay_alu instid0(VALU_DEP_2)
v_lshlrev_b32_e32 v1, 4, v1
ds_store_2addr_b64 v1, v[4:5], v[6:7] offset1:1
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_load_b32 s2, s[2:3], 0xc
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_mul_i32 s3, s3, s5
s_cmp_lt_u32 s3, 2
s_cbranch_scc1 .LBB0_18
s_mov_b32 s5, 1
.LBB0_14:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
s_mov_b32 s2, s5
s_lshl_b32 s5, s5, 1
s_mov_b32 s6, exec_lo
v_mul_lo_u32 v2, s5, v0
v_cmpx_gt_u32_e64 s3, v2
s_cbranch_execz .LBB0_17
v_lshlrev_b32_e32 v1, 4, v2
v_add_nc_u32_e32 v2, s2, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshl_add_u32 v3, s2, 4, v1
v_cmp_gt_u32_e64 s2, s3, v2
ds_load_b64 v[4:5], v1
ds_load_b64 v[6:7], v3
s_waitcnt lgkmcnt(0)
v_cmp_gt_f64_e32 vcc_lo, v[4:5], v[6:7]
s_and_b32 s2, s2, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 exec_lo, exec_lo, s2
s_cbranch_execz .LBB0_17
ds_load_b128 v[2:5], v3
s_waitcnt lgkmcnt(0)
ds_store_b128 v1, v[2:5]
.LBB0_17:
s_or_b32 exec_lo, exec_lo, s6
s_cmp_ge_u32 s5, s3
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB0_14
.LBB0_18:
s_mov_b32 s5, 0
s_mov_b32 s2, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB0_20
v_mov_b32_e32 v4, 0
s_load_b64 s[0:1], s[0:1], 0x30
s_lshl_b64 s[2:3], s[4:5], 4
ds_load_b128 v[0:3], v4
s_waitcnt lgkmcnt(0)
s_add_u32 s0, s0, s2
s_addc_u32 s1, s1, s3
global_store_b128 v4, v[0:3], s[0:1]
.LBB0_20:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| blockMatching_kernel | 7,724 | 3,337 | stackv2-00000-of-00015 |
// Demangled: dot_produce(float const*, float const*, float*, int)
Function : _Z11dot_producePKfS0_Pfi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_CTAID.X &wr=0x1 ?trans7;
LDC R9, c[0x0][0x360] &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x2 ?trans1;
S2R R6, SR_TID.X &wr=0x1 ?trans6;
LDC.64 R2, c[0x0][0x380] &wr=0x3 ?trans8;
LDC.64 R4, c[0x0][0x388] &wr=0x4 ?trans1;
IMAD R7, R9, R0, R6 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R7, 0x4, R2 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R7, 0x4, R4 &req={4} ?trans2;
LDG.E R2, desc[UR8][R2.64] &req={2} &wr=0x2 ?trans4;
LDG.E R5, desc[UR8][R4.64] &wr=0x2 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
ISETP.NE.AND P0, PT, R6, RZ, PT ?trans1;
ULEA UR5, UR5, UR4, 0x18 &req={1} ?WAIT6_END_GROUP;
LEA R7, R6, UR5, 0x2 ?trans1;
FMUL R6, R2, R5 &req={2} ?WAIT5_END_GROUP;
STS [R7], R6 &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 EXIT &req={0} ?trans5;
LDS R16, [UR5] &wr=0x0 ?trans1;
ISETP.GE.U32.AND P0, PT, R9, 0x2, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x6e0 ?trans5;
IADD3 R2, PT, PT, R9, -0x2, RZ ?trans1;
UMOV UR4, 0x1 ?WAIT4_END_GROUP;
ISETP.GE.U32.AND P0, PT, R2, 0xf, PT ?trans1;
IADD3 R2, PT, PT, R9, -0x1, RZ ?WAIT4_END_GROUP;
LOP3.LUT R20, R2, 0xf, RZ, 0xc0, !PT ?WAIT8_END_GROUP;
@!P0 BRA 0x3d0 ?trans5;
LOP3.LUT R3, R2, 0xfffffff0, RZ, 0xc0, !PT ?trans1;
UIADD3 UR6, UPT, UPT, UR5, 0x20, URZ ?trans1;
UMOV UR4, URZ ?trans2;
IADD3 R3, PT, PT, -R3, RZ, RZ ?WAIT9_END_GROUP;
LDS.128 R12, [UR6+-0x20] &wr=0x2 ?trans1;
IADD3 R3, PT, PT, R3, 0x10, RZ ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x10, URZ ?trans2;
LDS.128 R4, [UR6+-0x10] &req={1} &wr=0x1 ?trans2;
ISETP.NE.AND P0, PT, R3, RZ, PT ?trans2;
LDS.128 R8, [UR6] &wr=0x3 ?trans1;
FADD R13, R13, R16 &req={2,0} ?WAIT3_END_GROUP;
LDS.128 R16, [UR6+0x10] &wr=0x0 ?trans1;
FADD R14, R13, R14 ?WAIT4_END_GROUP;
FADD R15, R14, R15 ?WAIT4_END_GROUP;
FADD R4, R15, R4 &req={1} ?WAIT4_END_GROUP;
FADD R5, R5, R4 ?WAIT4_END_GROUP;
FADD R6, R6, R5 ?trans2;
LDS R5, [UR6+0x20] &wr=0x1 ?trans1;
UIADD3 UR6, UPT, UPT, UR6, 0x40, URZ ?trans1;
FADD R7, R7, R6 ?WAIT4_END_GROUP;
FADD R8, R7, R8 &req={3} ?WAIT4_END_GROUP;
FADD R9, R9, R8 ?WAIT4_END_GROUP;
FADD R10, R10, R9 ?WAIT4_END_GROUP;
FADD R11, R11, R10 ?WAIT4_END_GROUP;
FADD R16, R11, R16 &req={0} ?WAIT4_END_GROUP;
FADD R17, R17, R16 ?WAIT4_END_GROUP;
FADD R18, R18, R17 ?WAIT4_END_GROUP;
FADD R18, R19, R18 ?WAIT4_END_GROUP;
FADD R16, R18, R5 &req={1} ?trans1;
@P0 BRA 0x220 ?trans6;
UIADD3 UR4, UPT, UPT, UR4, 0x1, URZ ?WAIT12_END_GROUP;
ISETP.NE.AND P0, PT, R20, RZ, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x6d0 ?trans5;
ISETP.GE.U32.AND P0, PT, R20, 0x8, PT ?trans1;
LOP3.LUT R5, R2, 0x7, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R5, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x550 ?trans6;
ULEA UR6, UR4, UR5, 0x2 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?WAIT8_END_GROUP;
LDS R3, [UR6] &wr=0x2 ?trans4;
LDS R4, [UR6+0x4] &wr=0x3 ?trans4;
LDS R6, [UR6+0x8] &req={1} &wr=0x1 ?trans4;
LDS R8, [UR6+0xc] &wr=0x4 ?trans4;
LDS R10, [UR6+0x10] &wr=0x5 ?trans4;
LDS R12, [UR6+0x14] &wr=0x0 ?trans4;
LDS R14, [UR6+0x18] &wr=0x0 ?trans4;
LDS R18, [UR6+0x1c] &wr=0x0 ?trans2;
FADD R3, R16, R3 &req={2,0} ?WAIT4_END_GROUP;
FADD R3, R3, R4 &req={3} ?WAIT4_END_GROUP;
FADD R3, R3, R6 &req={1} ?WAIT4_END_GROUP;
FADD R3, R3, R8 &req={4} ?WAIT4_END_GROUP;
FADD R3, R3, R10 &req={5} ?WAIT4_END_GROUP;
FADD R3, R3, R12 ?WAIT4_END_GROUP;
FADD R3, R3, R14 ?WAIT4_END_GROUP;
FADD R16, R3, R18 ?WAIT7_END_GROUP;
@!P1 BRA 0x6d0 ?trans5;
ISETP.GE.U32.AND P0, PT, R5, 0x4, PT ?trans1;
LOP3.LUT R2, R2, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R2, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x640 ?trans6;
ULEA UR6, UR4, UR5, 0x2 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?WAIT8_END_GROUP;
LDS R3, [UR6] &wr=0x2 ?trans4;
LDS R4, [UR6+0x4] &wr=0x3 ?trans4;
LDS R6, [UR6+0x8] &req={1} &wr=0x1 ?trans4;
LDS R8, [UR6+0xc] &wr=0x4 ?trans1;
FADD R3, R16, R3 &req={2,0} ?WAIT4_END_GROUP;
FADD R3, R3, R4 &req={3} ?WAIT4_END_GROUP;
FADD R3, R3, R6 &req={1} ?WAIT4_END_GROUP;
FADD R16, R3, R8 &req={4} ?WAIT7_END_GROUP;
@!P1 BRA 0x6d0 ?trans5;
IADD3 R2, PT, PT, -R2, RZ, RZ ?trans1;
ULEA UR4, UR4, UR5, 0x2 ?WAIT12_END_GROUP;
LDS R3, [UR4] &wr=0x2 ?trans1;
IADD3 R2, PT, PT, R2, 0x1, RZ ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?WAIT4_END_GROUP;
ISETP.NE.AND P0, PT, R2, RZ, PT ?trans1;
FADD R16, R3, R16 &req={2,0} ?WAIT12_END_GROUP;
@P0 BRA 0x670 ?trans5;
STS [UR5], R16 &req={0} &rd=0x2 ?trans2;
LDC.64 R2, c[0x0][0x390] &wr=0x3 ?trans2;
IMAD.WIDE.U32 R2, R0, 0x4, R2 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR8][R2.64], R16 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x720;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: dot_produce(float const*, float const*, float*, int)
_Z11dot_producePKfS0_Pfi:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b128 s[4:7], s[0:1], 0x0
s_mov_b32 s2, s15
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s2, s3, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[1:2]
v_add_co_u32 v3, vcc_lo, s4, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v2, vcc_lo
v_add_co_u32 v1, vcc_lo, s6, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
s_mov_b32 s4, exec_lo
global_load_b32 v3, v[3:4], off
global_load_b32 v1, v[1:2], off
v_lshl_add_u32 v2, v0, 2, 0
s_waitcnt vmcnt(0)
v_mul_f32_e32 v1, v3, v1
ds_store_b32 v2, v1
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB0_6
v_mov_b32_e32 v0, 0
s_load_b64 s[0:1], s[0:1], 0x10
s_cmp_lt_u32 s3, 2
ds_load_b32 v0, v0
s_cbranch_scc1 .LBB0_5
s_add_i32 s4, 0, 4
s_add_i32 s3, s3, -1
.LBB0_3:
v_mov_b32_e32 v1, s4
s_add_i32 s3, s3, -1
s_add_i32 s4, s4, 4
s_cmp_eq_u32 s3, 0
ds_load_b32 v1, v1
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v0, v1, v0
s_cbranch_scc0 .LBB0_3
v_mov_b32_e32 v1, 0
ds_store_b32 v1, v0
.LBB0_5:
s_mov_b32 s3, 0
v_mov_b32_e32 v1, 0
s_lshl_b64 s[2:3], s[2:3], 2
s_waitcnt lgkmcnt(0)
s_add_u32 s0, s0, s2
s_addc_u32 s1, s1, s3
global_store_b32 v1, v0, s[0:1]
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| dot_produce | 2,643 | 868 | stackv2-00000-of-00015 |
// Demangled: sumall_kernel_global(float*, float*)
Function : _Z20sumall_kernel_globalPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R6, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x2 ?trans8;
LDC R0, c[0x0][0x360] &wr=0x2 ?trans2;
IMAD R7, R0, UR4, RZ &req={2} ?WAIT5_END_GROUP;
IADD3 R9, PT, PT, R7, R6, RZ &req={1} ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R9, 0x1ffff, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
ISETP.GE.U32.AND P0, PT, R0, 0x2, PT ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?WAIT12_END_GROUP;
@!P0 BRA 0x1d0 ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans2;
IMAD.WIDE R2, R9, 0x4, R2 &req={1} ?WAIT7_END_GROUP;
SHF.R.U32.HI R13, RZ, 0x1, R0 ?trans1;
BSSY.RECONVERGENT B0, 0x190 ?trans3;
IADD3 R4, PT, PT, R9, R13, RZ ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R4, 0x1ffff, PT ?WAIT5_END_GROUP;
ISETP.GE.U32.OR P0, PT, R6, R13, P0 ?WAIT13_END_GROUP;
@P0 BRA 0x180 &req={1} ?trans5;
IMAD.WIDE.U32 R4, R13, 0x4, R2 ?trans1;
LDG.E R11, desc[UR4][R2.64] &req={0} &wr=0x2 ?trans5;
LDG.E R4, desc[UR4][R4.64] &wr=0x2 ?trans2;
FADD R11, R4, R11 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R11 &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 &req={0} ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R0, 0x3, PT ?trans1;
MOV R0, R13 ?WAIT12_END_GROUP;
@P0 BRA 0xd0 ?trans5;
ISETP.NE.AND P0, PT, R6, RZ, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &req={1} &wr=0x0 ?trans2;
IMAD.WIDE R2, R7, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R3, desc[UR4][R2.64] &wr=0x2 ?trans1;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans3;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR4][R4.64], R3 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x250;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: sumall_kernel_global(float*, float*)
_Z20sumall_kernel_globalPfS_:
s_load_b32 s2, s[0:1], 0x1c
s_mov_b32 s4, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_mul_i32 s2, s15, s3
v_add_nc_u32_e32 v1, s2, v0
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e32 0x20000, v1
s_cbranch_execz .LBB1_10
s_load_b128 s[4:7], s[0:1], 0x0
s_cmp_lt_u32 s3, 2
s_cbranch_scc1 .LBB1_6
v_ashrrev_i32_e32 v2, 31, v1
s_mov_b32 s9, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
.LBB1_3:
s_lshr_b32 s8, s3, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v4, s8, v1
v_cmp_gt_u32_e32 vcc_lo, s8, v0
v_cmp_gt_i32_e64 s0, 0x20000, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s1, vcc_lo, s0
s_and_saveexec_b32 s0, s1
s_cbranch_execz .LBB1_5
s_lshl_b64 s[10:11], s[8:9], 2
s_delay_alu instid0(SALU_CYCLE_1)
v_add_co_u32 v4, vcc_lo, v2, s10
v_add_co_ci_u32_e32 v5, vcc_lo, s11, v3, vcc_lo
s_clause 0x1
global_load_b32 v4, v[4:5], off
global_load_b32 v5, v[2:3], off
s_waitcnt vmcnt(0)
v_add_f32_e32 v4, v4, v5
global_store_b32 v[2:3], v4, off
.LBB1_5:
s_or_b32 exec_lo, exec_lo, s0
s_cmp_gt_u32 s3, 3
s_mov_b32 s3, s8
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB1_3
.LBB1_6:
v_cmp_eq_u32_e32 vcc_lo, 0, v0
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB1_10
s_mov_b32 s0, exec_lo
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mbcnt_lo_u32_b32 v0, s0, 0
v_cmp_eq_u32_e32 vcc_lo, 0, v0
s_and_b32 s1, exec_lo, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 exec_lo, s1
s_cbranch_execz .LBB1_10
s_ashr_i32 s3, s2, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[2:3], s[2:3], 2
s_waitcnt lgkmcnt(0)
s_add_u32 s2, s4, s2
s_addc_u32 s3, s5, s3
s_bcnt1_i32_b32 s0, s0
v_cvt_f32_ubyte0_e32 v3, s0
v_mov_b32_e32 v2, 0
s_mov_b32 s0, 0
s_clause 0x1
global_load_b32 v0, v2, s[2:3]
global_load_b32 v1, v2, s[6:7]
s_waitcnt vmcnt(1)
v_mul_f32_e32 v3, v0, v3
.LBB1_9:
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_add_f32_e32 v0, v1, v3
global_atomic_cmpswap_b32 v0, v2, v[0:1], s[6:7] glc
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, v0, v1
v_mov_b32_e32 v1, v0
s_or_b32 s0, vcc_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s0
s_cbranch_execnz .LBB1_9
.LBB1_10:
s_endpgm
| sumall_kernel_global | 958 | 1,434 | stackv2-00000-of-00015 |
// Demangled: sumall_kernel_shared(float*, float*)
Function : _Z20sumall_kernel_sharedPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R9, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
HFMA2 R4, -RZ, RZ, 0, 0 ?WAIT6_END_GROUP;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R5, R0, UR4, R9 &req={1} ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R5, 0x1ffff, PT ?WAIT13_END_GROUP;
@!P0 LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans2;
@!P0 IMAD.WIDE R2, R5, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
@!P0 LDG.E R4, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans2;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?WAIT6_END_GROUP;
LEA R7, R9, UR4, 0x2 ?WAIT5_END_GROUP;
STS [R7], R4 &req={2} &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 EXIT &req={0} ?trans5;
ISETP.GE.U32.AND P0, PT, R0, 0x2, PT ?trans1;
ISETP.NE.AND P1, PT, R9, RZ, PT ?WAIT12_END_GROUP;
@!P0 BRA 0x220 ?trans5;
SHF.R.U32.HI R6, RZ, 0x1, R0 ?WAIT4_END_GROUP;
IADD3 R2, PT, PT, R5, R6, RZ ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R2, 0x1ffff, PT ?WAIT5_END_GROUP;
ISETP.GE.U32.OR P0, PT, R9, R6, P0 ?WAIT13_END_GROUP;
@!P0 IMAD R2, R6, 0x4, R7 ?trans1;
@!P0 LDS R3, [R7] ?trans5;
@!P0 LDS R2, [R2] &wr=0x0 ?trans2;
@!P0 FADD R4, R2, R3 &req={1,0} ?WAIT5_END_GROUP;
@!P0 STS [R7], R4 &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R0, 0x3, PT ?trans1;
MOV R0, R6 ?WAIT12_END_GROUP;
@P0 BRA 0x150 &req={0} ?trans5;
@P1 EXIT ?trans5;
S2UR UR5, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR4, 0x400 ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x388] &wr=0x2 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={0} ?WAIT9_END_GROUP;
LDS R5, [UR4] &wr=0x2 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R2.64], R5 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x2a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: sumall_kernel_shared(float*, float*)
_Z20sumall_kernel_sharedPfS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x1c
s_load_b128 s[0:3], s[0:1], 0x0
v_mov_b32_e32 v3, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
v_cmp_gt_i32_e32 vcc_lo, 0x20000, v1
s_and_saveexec_b32 s5, vcc_lo
s_cbranch_execz .LBB0_2
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_co_u32 v2, s0, s0, v2
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v3, s0, s1, v3, s0
global_load_b32 v3, v[2:3], off
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s5
v_lshlrev_b32_e32 v2, 2, v0
s_waitcnt vmcnt(0)
ds_store_b32 v2, v3
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_saveexec_b32 s0, vcc_lo
s_cbranch_execz .LBB0_11
s_cmp_lt_u32 s4, 2
s_cbranch_scc1 .LBB0_7
.LBB0_4:
s_lshr_b32 s1, s4, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v3, s1, v1
v_cmp_gt_u32_e32 vcc_lo, s1, v0
v_cmp_gt_i32_e64 s0, 0x20000, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s5, vcc_lo, s0
s_and_saveexec_b32 s0, s5
s_cbranch_execz .LBB0_6
v_lshl_add_u32 v3, s1, 2, v2
ds_load_b32 v3, v3
ds_load_b32 v4, v2
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v3, v3, v4
ds_store_b32 v2, v3
.LBB0_6:
s_or_b32 exec_lo, exec_lo, s0
s_cmp_gt_u32 s4, 3
s_mov_b32 s4, s1
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_4
.LBB0_7:
v_cmp_eq_u32_e32 vcc_lo, 0, v0
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_11
s_mov_b32 s0, exec_lo
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mbcnt_lo_u32_b32 v0, s0, 0
v_cmp_eq_u32_e32 vcc_lo, 0, v0
s_and_b32 s1, exec_lo, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 exec_lo, s1
s_cbranch_execz .LBB0_11
s_bcnt1_i32_b32 s0, s0
s_load_b32 s1, s[2:3], 0x0
v_cvt_f32_ubyte0_e32 v1, s0
v_mov_b32_e32 v2, 0
s_mov_b32 s0, 0
ds_load_b32 v0, v2
s_waitcnt lgkmcnt(0)
v_mul_f32_e32 v3, v0, v1
v_mov_b32_e32 v1, s1
.LBB0_10:
s_delay_alu instid0(VALU_DEP_1)
v_add_f32_e32 v0, v1, v3
global_atomic_cmpswap_b32 v0, v2, v[0:1], s[2:3] glc
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, v0, v1
v_mov_b32_e32 v1, v0
s_or_b32 s0, vcc_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s0
s_cbranch_execnz .LBB0_10
.LBB0_11:
s_endpgm
| sumall_kernel_shared | 1,034 | 1,336 | stackv2-00000-of-00015 |
// Demangled: vecAddKernel(float*, float*, float*, int)
Function : _Z12vecAddKernelPfS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R9, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x398] &wr=0x2 ?trans1;
IMAD R9, R9, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R9, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD.WIDE R2, R9, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x4 ?trans1;
IMAD.WIDE R4, R9, 0x4, R4 &req={2} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x4 ?trans1;
IMAD.WIDE R6, R9, 0x4, R6 &req={3} ?WAIT4_END_GROUP;
FADD R9, R2, R5 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x140;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: vecAddKernel(float*, float*, float*, int)
_Z12vecAddKernelPfS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[4:7], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| vecAddKernel | 570 | 578 | stackv2-00000-of-00015 |
// Demangled: hid2vis(float*, float*, float*)
Function : _Z7hid2visPfS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R11, SR_TID.X &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU UR6, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_TID.Y &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x4 ?trans1;
IMAD.WIDE.U32 R2, R11, 0x4, R2 &req={0} ?WAIT4_END_GROUP;
IMAD R9, R0, UR6, R11 &req={1} ?trans2;
LDG.E R2, desc[UR4][R2.64] &req={2} &wr=0x2 ?trans2;
IMAD.WIDE.U32 R4, R9, 0x4, R4 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R6, R0, 0x4, R6 &req={4} ?trans2;
LDG.E R5, desc[UR4][R4.64] &wr=0x2 ?trans4;
LDG.E R9, desc[UR4][R6.64] &wr=0x2 ?trans2;
FFMA R9, R2, R5, R9 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x120;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: hid2vis(float*, float*, float*)
_Z7hid2visPfS_S_:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_lshlrev_b32_e32 v3, 2, v0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
v_mul_u32_u24_e32 v2, s2, v1
v_lshlrev_b32_e32 v1, 2, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_lshl_u32 v0, v2, v0, 2
global_load_b32 v2, v3, s[4:5]
global_load_b32 v0, v0, s[6:7]
global_load_b32 v3, v1, s[0:1]
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v3, v2, v0
global_store_b32 v1, v3, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| hid2vis | 532 | 395 | stackv2-00000-of-00015 |
// Demangled: learning(float*, float*, float*, float*, float*)
Function : _Z8learningPfS_S_S_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R13, SR_TID.Y &wr=0x0 ?trans7;
LDC.64 R6, c[0x0][0x398] &wr=0x0 ?trans1;
LDCU UR6, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R15, SR_TID.X &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x3 ?trans5;
LDC.64 R8, c[0x0][0x3a0] &wr=0x2 ?trans8;
LDC.64 R2, c[0x0][0x388] &wr=0x4 ?trans8;
LDC.64 R4, c[0x0][0x390] &wr=0x5 ?trans1;
IMAD.WIDE.U32 R6, R13, 0x4, R6 &req={0} ?WAIT7_END_GROUP;
LDC.64 R10, c[0x0][0x380] &wr=0x0 ?trans1;
IMAD.WIDE.U32 R8, R15, 0x4, R8 &req={2} ?trans1;
LDG.E R6, desc[UR4][R6.64] &req={3} &wr=0x2 ?trans3;
IMAD.WIDE.U32 R2, R13.reuse, 0x4, R2 &req={4} ?trans2;
LDG.E R9, desc[UR4][R8.64] &wr=0x2 ?trans2;
IMAD R13, R13, UR6, R15 &req={1} ?trans2;
LDG.E R2, desc[UR4][R2.64] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R4, R15, 0x4, R4 &req={5} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R10, R13, 0x4, R10 &req={0} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R10.64] &wr=0x4 ?trans1;
FMUL R13, R6, R9 &req={2} ?WAIT4_END_GROUP;
FFMA R13, R2, R5, -R13 &req={3} ?WAIT4_END_GROUP;
FADD R13, R13, R0 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R10.64], R13 ?trans1;
EXIT ?trans5;
BRA 0x1a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: learning(float*, float*, float*, float*, float*)
_Z8learningPfS_S_S_S_:
s_clause 0x2
s_load_b256 s[4:11], s[0:1], 0x0
s_load_b32 s2, s[0:1], 0x34
s_load_b64 s[0:1], s[0:1], 0x20
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
v_lshlrev_b32_e32 v2, 2, v1
s_waitcnt lgkmcnt(0)
global_load_b32 v4, v2, s[10:11]
v_lshlrev_b32_e32 v3, 2, v0
s_and_b32 s2, s2, 0xffff
v_mul_u32_u24_e32 v1, s2, v1
global_load_b32 v5, v3, s[0:1]
v_add_lshl_u32 v0, v1, v0, 2
s_waitcnt vmcnt(0)
v_mul_f32_e32 v4, v4, v5
global_load_b32 v2, v2, s[6:7]
global_load_b32 v3, v3, s[8:9]
global_load_b32 v1, v0, s[4:5]
s_waitcnt vmcnt(1)
v_fma_f32 v2, v2, v3, -v4
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_add_f32_e32 v1, v1, v2
global_store_b32 v0, v1, s[4:5]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| learning | 769 | 483 | stackv2-00000-of-00015 |
// Demangled: vis2hid(float*, float*, float*)
Function : _Z7vis2hidPfS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R11, SR_TID.Y &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU UR6, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x4 ?trans1;
IMAD.WIDE.U32 R2, R11, 0x4, R2 &req={0} ?WAIT4_END_GROUP;
IMAD R9, R11, UR6, R0 &req={1} ?trans2;
LDG.E R2, desc[UR4][R2.64] &req={2} &wr=0x2 ?trans2;
IMAD.WIDE.U32 R4, R9, 0x4, R4 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R6, R0, 0x4, R6 &req={4} ?trans2;
LDG.E R5, desc[UR4][R4.64] &wr=0x2 ?trans4;
LDG.E R9, desc[UR4][R6.64] &wr=0x2 ?trans2;
FFMA R9, R2, R5, R9 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x120;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: vis2hid(float*, float*, float*)
_Z7vis2hidPfS_S_:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
v_mul_u32_u24_e32 v2, s2, v1
v_lshlrev_b32_e32 v1, 2, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_lshl_u32 v2, v2, v0, 2
v_lshlrev_b32_e32 v0, 2, v0
global_load_b32 v1, v1, s[4:5]
global_load_b32 v2, v2, s[6:7]
global_load_b32 v3, v0, s[0:1]
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v3, v1, v2
global_store_b32 v0, v3, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| vis2hid | 532 | 387 | stackv2-00000-of-00015 |
// Demangled: nothingKernel()
Function : _Z13nothingKernelv
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
EXIT ?trans5;
BRA 0x20;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: nothingKernel()
_Z13nothingKernelv:
s_endpgm
| nothingKernel | 93 | 13 | stackv2-00000-of-00015 |
// Demangled: matrixMul(int*, int*, int*, int)
Function : _Z9matrixMulPiS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
LDCU UR18, c[0x0][0x398] &wr=0x1 ?trans1;
S2R R3, SR_TID.Y &wr=0x2 ?trans6;
LDC R0, c[0x0][0x364] &wr=0x2 ?trans1;
HFMA2 R26, -RZ, RZ, 0, 0 ?trans1;
LDCU.64 UR16, c[0x0][0x358] &wr=0x3 ?trans1;
S2R R2, SR_TID.X &wr=0x4 ?trans5;
S2UR UR4, SR_CTAID.Y &wr=0x2 ?trans8;
S2UR UR5, SR_CTAID.X &wr=0x4 ?trans1;
UISETP.GE.AND UP0, UPT, UR18, 0x1, UPT &req={1} ?WAIT6_END_GROUP;
PLOP3.LUT P0, PT, PT, PT, UP0, 0x80, 0x8 ?trans1;
LDC R25, c[0x0][0x360] &wr=0x4 ?trans1;
IMAD R0, R0, UR4, R3 &req={2} ?trans2;
IMAD R25, R25, UR5, R2 &req={4} ?WAIT9_END_GROUP;
@!P0 BRA 0xa30 &req={3,0} ?trans5;
UISETP.GE.U32.AND UP0, UPT, UR18, 0x8, UPT ?trans1;
ULOP3.LUT UR7, UR18, 0x7, URZ, 0xc0, !UPT ?trans2;
IMAD R4, R0, UR18, RZ ?trans1;
MOV R24, RZ ?trans1;
MOV R26, RZ ?trans1;
PLOP3.LUT P0, PT, PT, PT, UP0, 0x80, 0x8 ?trans1;
ISETP.NE.AND P1, PT, RZ, UR7, PT ?WAIT12_END_GROUP;
@!P0 BRA 0x510 ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
USHF.L.U32 UR4, UR18, 0x1, URZ ?trans1;
ULOP3.LUT UR6, UR18, 0x7ffffff8, URZ, 0xc0, !UPT ?trans1;
MOV R24, RZ ?trans1;
MOV R27, R25 ?trans1;
UIMAD.WIDE.U32 UR4, UR4, 0x4, URZ ?trans1;
UIADD3 UR6, UPT, UPT, -UR6, URZ, URZ ?trans2;
LDC.64 R6, c[0x0][0x388] &wr=0x1 ?trans1;
UIMAD.WIDE.U32 UR8, UR18, 0x14, UR4 ?trans1;
UIMAD.WIDE.U32 UR10, UR18, 0x10, UR4 ?trans1;
UIMAD.WIDE.U32 UR12, UR18, 0xc, UR4 ?trans1;
UIMAD.WIDE.U32 UR14, UR18, 0x8, UR4 ?trans1;
IMAD.WIDE.U32 R2, R4, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
IADD.64 R2, R2, 0x10 ?trans2;
IADD.64 R8, R6.reuse, UR8 &req={1} ?trans2;
IADD.64 R10, R6.reuse, UR10 ?trans2;
IADD.64 R12, R6.reuse, UR12 ?trans2;
IADD.64 R14, R6, UR14 ?WAIT8_END_GROUP;
IMAD.WIDE R20, R27, 0x4, R6 ?trans1;
MOV R17, UR18 ?trans1;
LDG.E R29, desc[UR16][R2.64+-0x10] &wr=0x2 ?trans4;
IMAD.WIDE.U32 R16, R17, 0x4, R20 ?trans1;
LDG.E R30, desc[UR16][R20.64] &wr=0x2 ?trans1;
IADD.64 R22, R20, UR4 ?WAIT3_END_GROUP;
LDG.E R31, desc[UR16][R16.64] &rd=0x0 &wr=0x3 ?trans1;
IADD.64 R36, R16, UR4 ?WAIT3_END_GROUP;
LDG.E R28, desc[UR16][R2.64+-0xc] &wr=0x3 ?trans4;
LDG.E R32, desc[UR16][R22.64] &rd=0x1 &wr=0x4 ?trans1;
IMAD.WIDE R16, R27, 0x4, R14 &req={0} ?WAIT3_END_GROUP;
LDG.E R35, desc[UR16][R2.64+-0x8] &wr=0x4 ?trans1;
IMAD.WIDE R18, R27, 0x4, R12 ?WAIT3_END_GROUP;
LDG.E R34, desc[UR16][R36.64] &wr=0x5 ?trans4;
LDG.E R33, desc[UR16][R2.64+-0x4] &wr=0x5 ?trans1;
IMAD.WIDE R20, R27, 0x4, R10 ?WAIT3_END_GROUP;
LDG.E R16, desc[UR16][R16.64] &wr=0x5 ?trans1;
IMAD.WIDE R22, R27, 0x4, R8 &req={1} ?WAIT3_END_GROUP;
LDG.E R18, desc[UR16][R18.64] &wr=0x5 ?trans4;
LDG.E R37, desc[UR16][R2.64+0x4] &wr=0x5 ?trans4;
LDG.E R17, desc[UR16][R2.64] &wr=0x5 ?trans4;
LDG.E R20, desc[UR16][R20.64] &wr=0x5 ?trans4;
LDG.E R19, desc[UR16][R2.64+0x8] &wr=0x5 ?trans4;
LDG.E R23, desc[UR16][R22.64] &wr=0x5 ?trans4;
LDG.E R36, desc[UR16][R2.64+0xc] &rd=0x0 &wr=0x5 ?trans1;
UIADD3 UR6, UPT, UPT, UR6, 0x8, URZ ?WAIT6_END_GROUP;
ISETP.NE.AND P0, PT, RZ, UR6, PT ?trans1;
IADD3 R24, PT, PT, R24, 0x8, RZ ?trans1;
IADD.64 R2, R2, 0x20 &req={0} ?trans2;
IMAD R29, R29, R30, R26 &req={2} ?WAIT4_END_GROUP;
IMAD R28, R28, R31, R29 &req={3} ?WAIT4_END_GROUP;
IMAD R28, R35, R32, R28 &req={4} ?WAIT4_END_GROUP;
IMAD R28, R33, R34, R28 &req={5} ?WAIT4_END_GROUP;
IMAD R16, R17, R16, R28 ?WAIT4_END_GROUP;
IMAD R16, R37, R18, R16 ?trans1;
MOV R18, UR18 ?WAIT3_END_GROUP;
IMAD R16, R19, R20, R16 ?trans2;
IMAD R27, R18, 0x8, R27 ?trans2;
IMAD R26, R36, R23, R16 ?trans1;
@P0 BRA 0x290 ?trans6;
@!P1 BRA 0xa30 ?trans5;
UISETP.GE.U32.AND UP0, UPT, UR7, 0x4, UPT ?trans1;
ULOP3.LUT UR4, UR18, 0x3, URZ, 0xc0, !UPT ?WAIT5_END_GROUP;
PLOP3.LUT P1, PT, PT, PT, UP0, 0x80, 0x8 ?trans1;
ISETP.NE.AND P0, PT, RZ, UR4, PT ?WAIT12_END_GROUP;
@!P1 BRA 0x7d0 ?trans5;
LDC.64 R8, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x380] &wr=0x1 ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?trans1;
MOV R2, R24.reuse ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?trans1;
UIADD3 UR5, UPT, UPT, UR18, UR18, URZ ?trans1;
IADD3 R11, PT, PT, R4, R24, RZ ?trans1;
IMAD R13, R24, UR18, R25 ?trans1;
LDC.64 R6, c[0x0][0x388] &wr=0x2 ?trans1;
IADD.64 R16, R4, R2 ?trans2;
MOV R10, UR18 ?trans1;
MOV R14, UR5 ?trans1;
HFMA2 R15, -RZ, RZ, 0, 0 ?WAIT2_END_GROUP;
IMAD.WIDE.U32 R8, R11, 0x4, R8 &req={0} ?trans1;
MOV R11, RZ ?WAIT5_END_GROUP;
IADD.64 R14, R10, R14 ?trans2;
IMAD.WIDE R2, R13, 0x4, R6 &req={2} ?trans1;
MOV R13, UR18 ?trans1;
LEA R6, P1, R16.reuse, UR6, 0x2 &req={1} ?trans1;
LDG.E R9, desc[UR16][R8.64] &wr=0x2 ?trans1;
MOV R11, UR5 ?trans2;
IMAD.WIDE.U32 R12, R13, 0x4, R2 ?trans1;
LEA.HI.X R7, R16, UR7, R17, 0x2, P1 ?trans1;
LDG.E R18, desc[UR16][R2.64] &wr=0x2 ?trans1;
LEA R16, P1, R14, R2, 0x2 ?trans1;
IMAD.WIDE.U32 R10, R11, 0x4, R2 ?WAIT2_END_GROUP;
LDG.E R12, desc[UR16][R12.64] &wr=0x3 ?trans1;
LEA.HI.X R17, R14, R3, R15, 0x2, P1 ?WAIT3_END_GROUP;
LDG.E R20, desc[UR16][R6.64+0x4] &wr=0x3 ?trans4;
LDG.E R10, desc[UR16][R10.64] &wr=0x4 ?trans4;
LDG.E R14, desc[UR16][R6.64+0x8] &wr=0x4 ?trans4;
LDG.E R22, desc[UR16][R6.64+0xc] &wr=0x5 ?trans4;
LDG.E R16, desc[UR16][R16.64] &wr=0x5 ?trans1;
IADD3 R24, PT, PT, R24, 0x4, RZ ?trans1;
IMAD R9, R9, R18, R26 &req={2} ?WAIT4_END_GROUP;
IMAD R9, R20, R12, R9 &req={3} ?WAIT4_END_GROUP;
IMAD R9, R14, R10, R9 &req={4} ?WAIT4_END_GROUP;
IMAD R26, R22, R16, R9 &req={5} ?WAIT7_END_GROUP;
@!P0 BRA 0xa30 ?trans5;
MOV R2, UR4 ?trans1;
ULOP3.LUT UR4, UR18, 0x1, URZ, 0xc0, !UPT ?trans1;
LDC.64 R10, c[0x0][0x388] &wr=0x0 ?trans3;
ISETP.NE.AND P0, PT, R2, 0x1, PT ?trans1;
UISETP.NE.U32.AND UP0, UPT, UR4, 0x1, UPT ?WAIT4_END_GROUP;
LDC.64 R6, c[0x0][0x380] &wr=0x1 ?trans2;
PLOP3.LUT P2, PT, PT, PT, UP0, 0x80, 0x8 ?WAIT5_END_GROUP;
@!UP0 LDCU.128 UR4, c[0x0][0x380] &wr=0x2 ?trans1;
@P0 LDC.64 R2, c[0x0][0x380] &wr=0x3 ?trans1;
@P0 IADD3 R19, PT, PT, R4, R24.reuse, RZ ?trans1;
@P0 IMAD R21, R24.reuse, UR18, R25 ?trans1;
@P0 MOV R8, R24 ?trans1;
@P0 IADD3 R24, PT, PT, R24, 0x2, RZ ?trans1;
@P0 MOV R9, RZ ?trans1;
@P0 MOV R5, RZ ?trans1;
@P0 IMAD.WIDE R10, R21, 0x4, R10 &req={0} ?trans1;
@!P2 IADD3 R17, PT, PT, R4, R24, RZ ?WAIT3_END_GROUP;
@P0 IADD.64 R12, R4, R8 ?trans2;
@P0 IMAD.WIDE.U32 R8, R19, 0x4, R6 &req={1} ?trans1;
MOV.64 R14, UR4 &req={2} ?trans2;
MOV.64 R6, UR6 ?WAIT4_END_GROUP;
@!P2 IMAD.WIDE.U32 R4, R17, 0x4, R14 ?trans1;
MOV R17, UR18 ?trans1;
@P0 LEA R2, P1, R12, R2, 0x2 &req={3} ?trans1;
@P0 LDG.E R9, desc[UR16][R8.64] &wr=0x2 ?trans1;
@!P2 IMAD R15, R24, UR18, R25 ?trans2;
@P0 LEA.HI.X R3, R12, R3, R13, 0x2, P1 ?trans1;
@P0 IMAD.WIDE.U32 R12, R17, 0x4, R10 ?trans1;
@!P2 LDG.E R5, desc[UR16][R4.64] &wr=0x3 ?trans4;
@P0 LDG.E R10, desc[UR16][R10.64] &wr=0x2 ?trans1;
@!P2 IMAD.WIDE R6, R15, 0x4, R6 ?WAIT3_END_GROUP;
@P0 LDG.E R3, desc[UR16][R2.64+0x4] &wr=0x4 ?trans4;
@P0 LDG.E R12, desc[UR16][R12.64] &wr=0x4 ?trans4;
@!P2 LDG.E R6, desc[UR16][R6.64] &wr=0x3 ?trans1;
@P0 IMAD R14, R9, R10, R26 &req={2} ?WAIT4_END_GROUP;
@P0 IMAD R26, R3, R12, R14 &req={4} ?WAIT4_END_GROUP;
@!P2 IMAD R26, R5, R6, R26 &req={3} ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD R25, R0, UR18, R25 ?WAIT4_END_GROUP;
IMAD.WIDE R2, R25, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR16][R2.64], R26 ?trans1;
EXIT ?trans5;
BRA 0xa80;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: matrixMul(int*, int*, int*, int)
_Z9matrixMulPiS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
v_bfe_u32 v1, v0, 10, 10
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s8, s3, 16
s_and_b32 s3, s3, 0xffff
v_mad_u64_u32 v[2:3], null, s15, s8, v[1:2]
v_and_b32_e32 v3, 0x3ff, v0
s_cmp_lt_i32 s2, 1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mad_u64_u32 v[0:1], null, s14, s3, v[3:4]
v_mul_lo_u32 v1, v2, s2
s_cbranch_scc1 .LBB0_3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v2, 31, v1
s_mov_b32 s3, s2
v_mov_b32_e32 v5, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[3:4], 2, v[1:2]
v_mov_b32_e32 v2, 0
v_add_co_u32 v3, vcc_lo, s4, v3
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
.LBB0_2:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_ashrrev_i32_e32 v6, 31, v5
s_add_i32 s3, s3, -1
s_cmp_eq_u32 s3, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[5:6]
v_add_co_u32 v6, vcc_lo, s6, v6
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
global_load_b32 v8, v[3:4], off
global_load_b32 v9, v[6:7], off
s_waitcnt vmcnt(0)
v_mad_u64_u32 v[6:7], null, v9, v8, v[2:3]
v_add_co_u32 v3, vcc_lo, v3, 4
v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_dual_mov_b32 v2, v6 :: v_dual_add_nc_u32 v5, s2, v5
s_cbranch_scc0 .LBB0_2
s_branch .LBB0_4
.LBB0_3:
v_mov_b32_e32 v2, 0
.LBB0_4:
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v0, v1, v0
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| matrixMul | 4,380 | 1,178 | stackv2-00000-of-00015 |
// Demangled: mat_add(float const*, float const*, float*)
Function : _Z7mat_addPKfS0_Pf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R9, SR_TID.X &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x380] &wr=0x2 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R2, R9, 0x4, R2 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R9.reuse, 0x4, R4 &req={2} ?trans2;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans4;
LDG.E R5, desc[UR4][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R6, R9, 0x4, R6 &req={3} ?WAIT4_END_GROUP;
FADD R9, R2, R5 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0xe0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: mat_add(float const*, float const*, float*)
_Z7mat_addPKfS0_Pf:
s_load_b128 s[4:7], s[0:1], 0x0
v_lshlrev_b32_e32 v0, 2, v0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_clause 0x1
global_load_b32 v1, v0, s[6:7]
global_load_b32 v2, v0, s[4:5]
s_waitcnt vmcnt(0)
v_add_f32_e32 v1, v1, v2
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| mat_add | 422 | 194 | stackv2-00000-of-00015 |
// Demangled: mat_mult(float const*, float const*, float*, int)
Function : _Z8mat_multPKfS0_Pfi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R0, c[0x0][0x398] &wr=0x1 ?trans1;
S2R R18, SR_TID.X &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans1;
IABS R6, R0 &req={1} ?trans1;
ISETP.GE.AND P1, PT, R0, 0x1, PT ?WAIT3_END_GROUP;
I2F.RP R4, R6 &wr=0x1 ?trans1;
IABS R17, R18 &req={2} ?trans1;
ISETP.GE.AND P2, PT, R18, RZ, PT ?trans1;
MUFU.RCP R4, R4 &req={1} &wr=0x1 ?trans2;
IADD3 R2, PT, PT, R4, 0xffffffe, RZ &req={1} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R3, R2 &rd=0x1 &wr=0x2 ?trans2;
HFMA2 R2, -RZ, RZ, 0, 0 &req={1} ?trans1;
IADD3 R5, PT, PT, RZ, -R3, RZ &req={2} ?WAIT5_END_GROUP;
IMAD R5, R5, R6, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R3, R3, R5, R2 ?trans2;
LDC.64 R4, c[0x0][0x390] &wr=0x1 ?trans4;
IMAD.HI.U32 R3, R3, R17, RZ ?WAIT5_END_GROUP;
IADD3 R3, PT, PT, -R3, RZ, RZ ?WAIT5_END_GROUP;
IMAD R17, R6, R3, R17 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R6, R17, PT ?trans1;
IMAD.WIDE.U32 R4, R18, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], RZ &req={3} &rd=0x1 ?trans7;
@!P0 IADD3 R17, PT, PT, R17, -R6, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R6, R17, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R17, PT, PT, R17, -R6, RZ ?trans1;
ISETP.NE.AND P0, PT, R0, RZ, PT ?trans1;
@!P1 EXIT &req={1,0} ?WAIT12_END_GROUP;
@!P2 IADD3 R17, PT, PT, -R17, RZ, RZ ?trans1;
ISETP.GE.U32.AND P2, PT, R0.reuse, 0x8, PT ?trans1;
LOP3.LUT R24, R0, 0x7, RZ, 0xc0, !PT ?trans1;
UMOV UR4, URZ ?trans1;
@!P0 LOP3.LUT R17, RZ, R0, RZ, 0x33, !PT ?trans1;
MOV R13, RZ ?trans2;
ISETP.NE.AND P1, PT, R24, RZ, PT ?trans1;
IADD3 R18, PT, PT, -R17, R18, RZ ?WAIT6_END_GROUP;
@!P2 BRA 0x6a0 ?trans6;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LOP3.LUT R16, R0.reuse, 0x7ffffff8, RZ, 0xc0, !PT ?trans1;
IMAD.SHL.U32 R20, R0.reuse, 0x8, RZ ?trans1;
IADD3 R31, PT, PT, R17.reuse, R0.reuse, RZ ?trans2;
IADD3 R19, PT, PT, R17, R0, R0 ?trans1;
IMAD R21, R0.reuse, 0x3, R17.reuse ?trans1;
MOV R13, RZ ?trans1;
IMAD R23, R0.reuse, 0x4, R17.reuse ?trans1;
MOV R22, R18 ?trans1;
IMAD R25, R0, 0x5, R17.reuse ?trans1;
IADD3 R16, PT, PT, -R16, RZ, RZ ?trans1;
IMAD R27, R0.reuse, 0x6, R17.reuse ?trans1;
UMOV UR4, URZ ?trans1;
IMAD R29, R0, 0x7, R17 ?WAIT2_END_GROUP;
IMAD.WIDE.U32 R6, R17, 0x4, R2 &req={0} ?WAIT7_END_GROUP;
LDC.64 R8, c[0x0][0x380] &wr=0x0 ?trans1;
LDG.E R11, desc[UR6][R6.64] &wr=0x2 ?trans1;
IMAD.WIDE R8, R22, 0x4, R8 &req={0} ?WAIT5_END_GROUP;
LDG.E R10, desc[UR6][R8.64] &wr=0x2 ?trans2;
FFMA R33, R10, R11, R13 &req={2,1} ?trans1;
IMAD.WIDE.U32 R10, R31, 0x4, R2 ?WAIT4_END_GROUP;
STG.E desc[UR6][R4.64], R33 &rd=0x0 ?trans4;
LDG.E R10, desc[UR6][R10.64] &wr=0x2 ?trans4;
LDG.E R12, desc[UR6][R8.64+0x4] &wr=0x2 ?trans2;
FFMA R35, R12, R10, R33 &req={2} ?trans1;
IMAD.WIDE.U32 R12, R19, 0x4, R2 ?WAIT4_END_GROUP;
STG.E desc[UR6][R4.64], R35 &rd=0x1 ?trans4;
LDG.E R12, desc[UR6][R12.64] &wr=0x2 ?trans4;
LDG.E R14, desc[UR6][R8.64+0x8] &wr=0x2 ?trans2;
FFMA R37, R14, R12, R35 &req={2} ?trans1;
IMAD.WIDE.U32 R14, R21, 0x4, R2 ?WAIT4_END_GROUP;
STG.E desc[UR6][R4.64], R37 &rd=0x2 ?trans4;
LDG.E R14, desc[UR6][R14.64] &wr=0x0 ?trans4;
LDG.E R10, desc[UR6][R8.64+0xc] &wr=0x0 ?trans2;
FFMA R33, R10, R14, R37 &req={0} ?trans1;
IMAD.WIDE.U32 R10, R23, 0x4, R2 ?WAIT4_END_GROUP;
STG.E desc[UR6][R4.64], R33 &rd=0x0 ?trans4;
LDG.E R10, desc[UR6][R10.64] &wr=0x1 ?trans4;
LDG.E R12, desc[UR6][R8.64+0x10] &wr=0x1 ?trans2;
FFMA R35, R12, R10, R33 &req={1} ?trans1;
IMAD.WIDE.U32 R12, R25, 0x4, R2 ?WAIT4_END_GROUP;
STG.E desc[UR6][R4.64], R35 &rd=0x1 ?trans4;
LDG.E R12, desc[UR6][R12.64] &wr=0x2 ?trans4;
LDG.E R14, desc[UR6][R8.64+0x14] &wr=0x2 ?trans2;
FFMA R37, R14, R12, R35 &req={2} ?trans1;
IMAD.WIDE.U32 R14, R27, 0x4, R2 ?WAIT4_END_GROUP;
STG.E desc[UR6][R4.64], R37 &rd=0x1 ?trans4;
LDG.E R14, desc[UR6][R14.64] &wr=0x0 ?trans4;
LDG.E R10, desc[UR6][R8.64+0x18] &wr=0x0 ?trans1;
IADD3 R16, PT, PT, R16, 0x8, RZ ?trans1;
FFMA R33, R10, R14, R37 &req={0} ?trans1;
IMAD.WIDE.U32 R10, R29, 0x4, R2 ?WAIT4_END_GROUP;
STG.E desc[UR6][R4.64], R33 &rd=0x1 ?trans4;
LDG.E R26, desc[UR6][R8.64+0x1c] &wr=0x2 ?trans4;
LDG.E R10, desc[UR6][R10.64] &wr=0x2 ?trans1;
ISETP.NE.AND P0, PT, R16, RZ, PT ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
IADD3 R31, PT, PT, R20, R31, RZ ?WAIT2_END_GROUP;
IADD3 R19, PT, PT, R20.reuse, R19, RZ ?trans2;
IADD3 R21, PT, PT, R20.reuse, R21, RZ ?trans2;
IADD3 R23, PT, PT, R20.reuse, R23, RZ ?trans2;
IADD3 R25, PT, PT, R20.reuse, R25, RZ ?trans2;
IADD3 R27, PT, PT, R20.reuse, R27, RZ ?trans2;
IADD3 R29, PT, PT, R20.reuse, R29, RZ ?trans1;
IMAD.WIDE.U32 R6, R20, 0x4, R6 ?trans1;
IADD3 R22, PT, PT, R22, 0x8, RZ ?WAIT3_END_GROUP;
FFMA R13, R26, R10, R33 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R13 &rd=0x1 ?trans1;
@P0 BRA 0x340 ?trans5;
@!P1 EXIT ?trans5;
ISETP.GE.U32.AND P0, PT, R24, 0x4, PT ?trans1;
LOP3.LUT R16, R0, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R16, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x8c0 ?trans6;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
IADD3 R11, PT, PT, R18, UR4, RZ ?trans1;
IMAD R15, R0, UR4, R17 ?WAIT6_END_GROUP;
LDC.64 R6, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R8, R15, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R8, desc[UR6][R8.64] &wr=0x3 ?trans1;
IMAD.WIDE R6, R11, 0x4, R6 &req={2} ?WAIT5_END_GROUP;
LDG.E R10, desc[UR6][R6.64] &wr=0x3 ?trans1;
IADD3 R15, PT, PT, R15, R0, RZ ?trans1;
FFMA R13, R10, R8, R13 &req={3,1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R10, R15.reuse, 0x4, R2 ?trans1;
STG.E desc[UR6][R4.64], R13 &rd=0x0 ?trans5;
LDG.E R10, desc[UR6][R10.64] &wr=0x2 ?trans4;
LDG.E R12, desc[UR6][R6.64+0x4] &wr=0x2 ?trans1;
IADD3 R21, PT, PT, R15, R0, RZ ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R14, R21, 0x4, R2 ?WAIT4_END_GROUP;
FFMA R19, R12, R10, R13 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R19 &rd=0x2 ?trans4;
LDG.E R14, desc[UR6][R14.64] &wr=0x3 ?trans4;
LDG.E R8, desc[UR6][R6.64+0x8] &wr=0x3 ?trans1;
IADD3 R21, PT, PT, R21, R0, RZ ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R2, R21, 0x4, R2 ?WAIT4_END_GROUP;
FFMA R9, R8, R14, R19 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R9 &rd=0x2 ?trans4;
LDG.E R8, desc[UR6][R6.64+0xc] &wr=0x0 ?trans4;
LDG.E R2, desc[UR6][R2.64] &wr=0x0 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
FFMA R13, R8, R2, R9 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R13 &rd=0x2 ?trans6;
@!P1 EXIT ?trans5;
ISETP.NE.AND P0, PT, R16, 0x1, PT ?trans1;
LOP3.LUT R2, R0, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P1, PT, R2, 0x1, PT ?WAIT7_END_GROUP;
@!P0 BRA 0xa20 ?trans6;
LDC.64 R6, c[0x0][0x388] &wr=0x0 ?trans1;
IADD3 R11, PT, PT, R18, UR4, RZ ?trans1;
IMAD R15, R0, UR4, R17 ?WAIT6_END_GROUP;
LDC.64 R2, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R8, R15, 0x4, R6 &req={2,0} ?WAIT6_END_GROUP;
LDG.E R8, desc[UR6][R8.64] &wr=0x2 ?trans1;
IMAD.WIDE R2, R11, 0x4, R2 &req={3} ?WAIT5_END_GROUP;
LDG.E R10, desc[UR6][R2.64] &wr=0x2 ?trans1;
IADD3 R15, PT, PT, R15, R0, RZ ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R6, R15, 0x4, R6 ?WAIT4_END_GROUP;
FFMA R11, R10, R8, R13 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R11 &rd=0x0 ?trans4;
LDG.E R10, desc[UR6][R2.64+0x4] &wr=0x2 ?trans4;
LDG.E R6, desc[UR6][R6.64] &wr=0x2 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x2, URZ ?trans1;
FFMA R13, R10, R6, R11 &req={2,1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R13 &rd=0x0 ?trans6;
@P1 EXIT ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x3 ?trans1;
IADD3 R9, PT, PT, R18, UR4, RZ &req={2} ?trans1;
IMAD R17, R0, UR4, R17 ?WAIT6_END_GROUP;
LDC.64 R6, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD.WIDE R2, R9, 0x4, R2 &req={3} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR6][R2.64] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R6, R17, 0x4, R6 &req={2} ?WAIT6_END_GROUP;
LDG.E R6, desc[UR6][R6.64] &wr=0x3 ?trans2;
FFMA R13, R2, R6, R13 &req={3,1,0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R13 ?trans1;
EXIT ?trans5;
BRA 0xae0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: mat_mult(float const*, float const*, float*, int)
_Z8mat_multPKfS0_Pfi:
s_clause 0x1
s_load_b32 s6, s[0:1], 0x18
s_load_b64 s[4:5], s[0:1], 0x10
v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v3, 2, v0
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s6, 1
global_store_b32 v3, v2, s[4:5]
s_cbranch_scc1 .LBB2_3
s_ashr_i32 s2, s6, 31
v_add_co_u32 v3, s4, s4, v3
s_add_i32 s3, s6, s2
v_mov_b32_e32 v5, v2
s_xor_b32 s7, s3, s2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cvt_f32_u32_e32 v1, s7
s_sub_i32 s2, 0, s7
v_rcp_iflag_f32_e32 v1, v1
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v1, 0x4f7ffffe, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_u32_f32_e32 v1, v1
v_mul_lo_u32 v4, s2, v1
s_load_b128 s[0:3], s[0:1], 0x0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v4, v1, v4
v_add_nc_u32_e32 v1, v1, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v1, v0, v1
v_mul_lo_u32 v1, v1, s7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v1, v0, v1
v_subrev_nc_u32_e32 v4, s7, v1
v_cmp_le_u32_e32 vcc_lo, s7, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v1, v1, v4, vcc_lo
v_subrev_nc_u32_e32 v4, s7, v1
v_cmp_le_u32_e32 vcc_lo, s7, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v1, v1, v4, vcc_lo
v_add_co_ci_u32_e64 v4, null, s5, 0, s4
s_mov_b32 s4, 0
v_sub_nc_u32_e32 v0, v0, v1
.LBB2_2:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
v_add_nc_u32_e32 v6, s4, v0
v_lshlrev_b64 v[8:9], 2, v[1:2]
v_add_nc_u32_e32 v1, s6, v1
s_add_i32 s4, s4, 1
s_cmp_eq_u32 s6, s4
v_ashrrev_i32_e32 v7, 31, v6
s_waitcnt lgkmcnt(0)
v_add_co_u32 v8, vcc_lo, s2, v8
v_add_co_ci_u32_e32 v9, vcc_lo, s3, v9, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[6:7]
v_add_co_u32 v6, vcc_lo, s0, v6
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
global_load_b32 v8, v[8:9], off
global_load_b32 v6, v[6:7], off
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v5, v6, v8
global_store_b32 v[3:4], v5, off
s_cbranch_scc0 .LBB2_2
.LBB2_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| mat_mult | 4,621 | 1,285 | stackv2-00000-of-00015 |
// Demangled: mat_sub(float const*, float const*, float*)
Function : _Z7mat_subPKfS0_Pf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R9, SR_TID.X &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R2, R9, 0x4, R2 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R9.reuse, 0x4, R4 &req={2} ?trans2;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans4;
LDG.E R5, desc[UR4][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R6, R9, 0x4, R6 &req={3} ?WAIT4_END_GROUP;
FADD R9, R2, -R5 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0xe0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: mat_sub(float const*, float const*, float*)
_Z7mat_subPKfS0_Pf:
s_load_b128 s[4:7], s[0:1], 0x0
v_lshlrev_b32_e32 v0, 2, v0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_clause 0x1
global_load_b32 v1, v0, s[4:5]
global_load_b32 v2, v0, s[6:7]
s_waitcnt vmcnt(0)
v_sub_f32_e32 v1, v1, v2
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| mat_sub | 423 | 194 | stackv2-00000-of-00015 |
// Demangled: void consumer_kernel<float, false>(float*, float const volatile*, unsigned int const volatile*, unsigned int)
Function : _Z15consumer_kernelIfLb0EEvPT_PVKS0_PVKjj
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R0, c[0x0][0x398] &wr=0x1 ?trans2;
ISETP.NE.AND P0, PT, R0, RZ, PT &req={1} ?WAIT13_END_GROUP;
@!P0 EXIT &req={0} ?trans5;
S2R R7, SR_TID.X &wr=0x0 ?trans1;
LDC R6, c[0x0][0x360] &wr=0x1 ?trans1;
ISETP.GE.U32.AND P1, PT, R0.reuse, 0x8, PT ?trans1;
LOP3.LUT R10, R0, 0x7, RZ, 0xc0, !PT ?trans1;
S2R R9, SR_CTAID.X &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x3 ?trans1;
HFMA2 R8, -RZ, RZ, 0, 0 ?trans2;
ISETP.NE.AND P0, PT, R10, RZ, PT ?trans1;
I2FP.F32.U32 R11, R7 &req={0} ?WAIT6_END_GROUP;
@!P1 BRA 0x3e0 &req={3} ?trans6;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LOP3.LUT R13, R0, 0xfffffff8, RZ, 0xc0, !PT ?trans1;
IMAD R15, R9.reuse, R0.reuse, 0x7 &req={2} ?trans1;
MOV R8, RZ ?trans1;
IMAD R17, R9.reuse, R0.reuse, 0x6 ?trans2;
IMAD R27, R9, R0.reuse, 0x5 ?trans1;
IADD3 R26, PT, PT, -R13, RZ, RZ ?trans1;
IMAD R31, R9.reuse, R0.reuse, 0x4 ?trans2;
IMAD R35, R9, R0, 0x3 ?WAIT2_END_GROUP;
IMAD R4, R9.reuse, R0.reuse, 0x2 ?trans2;
IMAD R5, R9.reuse, R0, 0x1 ?trans2;
IMAD R12, R9, R6.reuse, RZ &req={1} ?trans2;
IMAD R15, R15, R6.reuse, R7.reuse ?trans2;
IMAD R17, R17, R6.reuse, R7.reuse ?trans2;
IMAD R27, R27, R6, R7 ?WAIT2_END_GROUP;
IMAD R31, R31, R6.reuse, R7.reuse ?trans2;
IMAD R35, R35, R6.reuse, R7.reuse ?trans2;
IMAD R37, R4, R6.reuse, R7.reuse ?trans2;
IMAD R14, R5, R6, R7.reuse ?trans2;
IMAD R16, R12, R0, R7 ?WAIT7_END_GROUP;
IADD3 R26, PT, PT, R26, 0x8, RZ ?trans1;
IMAD.WIDE.U32 R32, R16, 0x4, R2.reuse &req={3,0} ?trans1;
IADD3 R8, PT, PT, R8, 0x8, RZ ?trans2;
LEA R16, R6, R16, 0x3 ?trans1;
ISETP.NE.AND P1, PT, R26, RZ, PT ?trans1;
IMAD.WIDE.U32 R28, R14, 0x4, R2.reuse ?trans1;
STG.E desc[UR4][R32.64], R11 &rd=0x3 ?trans1;
LEA R14, R6.reuse, R14, 0x3 ?trans2;
IMAD.WIDE.U32 R18, R37, 0x4, R2 ?trans1;
STG.E desc[UR4][R28.64], R11 &rd=0x3 ?trans1;
LEA R37, R6, R37, 0x3 ?WAIT2_END_GROUP;
IMAD.WIDE.U32 R4, R35, 0x4, R2.reuse ?trans1;
STG.E desc[UR4][R18.64], R11 &rd=0x3 ?trans1;
LEA R35, R6.reuse, R35, 0x3 ?trans2;
IMAD.WIDE.U32 R12, R31, 0x4, R2.reuse ?trans1;
STG.E desc[UR4][R4.64], R11 &rd=0x3 ?trans1;
LEA R31, R6.reuse, R31, 0x3 ?trans2;
IMAD.WIDE.U32 R20, R27, 0x4, R2 ?trans1;
STG.E desc[UR4][R12.64], R11 &rd=0x3 ?trans1;
LEA R27, R6, R27, 0x3 ?WAIT2_END_GROUP;
IMAD.WIDE.U32 R22, R17, 0x4, R2.reuse ?trans1;
STG.E desc[UR4][R20.64], R11 &rd=0x3 ?trans1;
LEA R17, R6.reuse, R17, 0x3 ?trans2;
IMAD.WIDE.U32 R24, R15, 0x4, R2 ?trans1;
STG.E desc[UR4][R22.64], R11 &rd=0x3 ?trans1;
LEA R15, R6, R15, 0x3 ?WAIT3_END_GROUP;
STG.E desc[UR4][R24.64], R11 &rd=0x3 ?trans1;
@P1 BRA 0x220 ?trans5;
@!P0 EXIT ?trans5;
ISETP.GE.U32.AND P0, PT, R10, 0x4, PT ?trans1;
LOP3.LUT R16, R0, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R16, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x550 ?trans6;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
IMAD R4, R9, R0, R8 &req={3,2} ?trans1;
IADD3 R8, PT, PT, R8, 0x4, RZ ?WAIT3_END_GROUP;
IMAD R5, R4.reuse, R6.reuse, R7.reuse &req={1} ?trans1;
IADD3 R10, PT, PT, R4.reuse, 0x1, RZ ?trans2;
IADD3 R12, PT, PT, R4.reuse, 0x2, RZ ?trans2;
IADD3 R14, PT, PT, R4, 0x3, RZ ?trans1;
IMAD R13, R10, R6.reuse, R7.reuse ?trans2;
IMAD R15, R12, R6.reuse, R7.reuse ?trans2;
IMAD R17, R14, R6, R7 ?WAIT2_END_GROUP;
IMAD.WIDE.U32 R4, R5, 0x4, R2 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R12, R13, 0x4, R2.reuse ?trans1;
STG.E desc[UR4][R4.64], R11 &rd=0x0 ?trans3;
IMAD.WIDE.U32 R14, R15, 0x4, R2.reuse ?trans1;
STG.E desc[UR4][R12.64], R11 &rd=0x0 ?trans3;
IMAD.WIDE.U32 R2, R17, 0x4, R2 ?trans1;
STG.E desc[UR4][R14.64], R11 &rd=0x0 ?trans4;
STG.E desc[UR4][R2.64], R11 &rd=0x0 ?trans2;
@!P1 EXIT ?trans5;
ISETP.NE.AND P0, PT, R16, 0x1, PT ?trans1;
LOP3.LUT R2, R0, 0x1, RZ, 0xc0, !PT &req={0} ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P1, PT, R2, 0x1, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x640 ?trans6;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
IMAD R4, R9, R0, R8 &req={3,2} ?trans1;
IADD3 R8, PT, PT, R8, 0x2, RZ ?WAIT3_END_GROUP;
IMAD R5, R4.reuse, R6, R7 &req={1} ?trans1;
IADD3 R10, PT, PT, R4, 0x1, RZ ?WAIT5_END_GROUP;
IMAD R13, R10, R6, R7 ?trans2;
IMAD.WIDE.U32 R4, R5, 0x4, R2 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R13, 0x4, R2 ?trans1;
STG.E desc[UR4][R4.64], R11 &rd=0x0 ?trans4;
STG.E desc[UR4][R2.64], R11 &rd=0x0 ?trans2;
@P1 EXIT ?trans5;
LDC.64 R2, c[0x0][0x380] &req={0} &wr=0x0 ?trans1;
IMAD R0, R9, R0, R8 &req={2} ?WAIT4_END_GROUP;
IMAD R7, R0, R6, R7 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R7, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R11 ?trans1;
EXIT ?trans5;
BRA 0x6b0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: void consumer_kernel<float, false>(float*, float const volatile*, unsigned int const volatile*, unsigned int)
_Z15consumer_kernelIfLb0EEvPT_PVKS0_PVKjj:
s_load_b32 s2, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_cmp_eq_u32 s2, 0
s_cbranch_scc1 .LBB1_3
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b64 s[0:1], s[0:1], 0x0
s_mul_i32 s15, s15, s2
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1)
v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
v_cvt_f32_u32_e32 v0, v0
v_mov_b32_e32 v2, 0
.LBB1_2:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_lshlrev_b64 v[3:4], 2, v[1:2]
v_add_nc_u32_e32 v1, s3, v1
s_add_i32 s2, s2, -1
s_cmp_eq_u32 s2, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v3, vcc_lo, s0, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
global_store_b32 v[3:4], v0, off
s_cbranch_scc0 .LBB1_2
.LBB1_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| void_consumer_kernel_float__false_ | 2,715 | 488 | stackv2-00000-of-00015 |
// Demangled: void producer_kernel<float, false>(float*, float volatile*, unsigned int volatile*, unsigned int)
Function : _Z15producer_kernelIfLb0EEvPT_PVS0_PVjj
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x398] &wr=0x1 ?trans7;
LDC R2, c[0x0][0x360] &wr=0x2 ?trans1;
ISETP.NE.AND P0, PT, RZ, UR4, PT &req={1} ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
S2R R4, SR_TID.X &wr=0x3 ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?trans1;
MOV R7, RZ ?trans1;
HFMA2 R9, -RZ, RZ, 0, 0 ?trans1;
I2FP.F32.U32 R3, R2 &req={2} ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x2 ?trans2;
S2UR UR5, SR_CgaCtaId &wr=0x4 ?trans1;
IMAD R6, R2, UR6, RZ &req={1} ?WAIT4_END_GROUP;
IMAD R6, R6, UR4, RZ ?trans1;
UMOV UR4, 0x400 ?trans2;
ULEA UR4, UR5, UR4, 0x18 &req={4} ?trans2;
IADD.64 R6, R6, R4 &req={3} ?WAIT4_END_GROUP;
LEA R8, R4, UR4, 0x2 &req={2} ?WAIT7_END_GROUP;
LDCU.64 UR4, c[0x0][0x380] &req={1} &wr=0x1 ?trans1;
IMAD R10, R2, R9, RZ &req={2} ?trans1;
MOV R11, RZ ?WAIT5_END_GROUP;
IADD.64 R10, R6, R10 ?WAIT5_END_GROUP;
LEA R12, P0, R10, UR4, 0x2 &req={1} ?WAIT4_END_GROUP;
LEA.HI.X R13, R10, UR5, R11, 0x2, P0 ?WAIT6_END_GROUP;
LDG.E R13, desc[UR8][R12.64] &wr=0x2 ?trans1;
ISETP.GE.U32.AND P1, PT, R2, 0x2, PT ?trans1;
ISETP.NE.AND P0, PT, R4, RZ, PT ?trans2;
STS [R8], R13 &req={2} &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans9;
@!P1 BRA 0x2b0 ?trans5;
MOV R0, R2 ?WAIT7_END_GROUP;
SHF.R.U32.HI R13, RZ, 0x1, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P1, PT, R4, R13, PT ?WAIT13_END_GROUP;
@!P1 IMAD R10, R13, 0x4, R8 ?trans1;
@!P1 LDS R11, [R8] ?trans5;
@!P1 LDS R10, [R10] &wr=0x1 ?trans2;
@!P1 FADD R11, R10, R11 &req={1} ?WAIT5_END_GROUP;
@!P1 STS [R8], R11 &rd=0x2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P1, PT, R0, 0x3, PT ?trans1;
MOV R0, R13 ?WAIT12_END_GROUP;
@P1 BRA 0x200 &req={2} ?trans5;
BSSY.RECONVERGENT B0, 0x410 ?trans4;
@P0 BRA 0x400 ?trans5;
S2UR UR5, SR_CgaCtaId &wr=0x2 ?trans1;
UMOV UR4, 0x400 ?trans1;
MUFU.RCP R10, R3 &wr=0x3 ?trans2;
FFMA R11, -R3, R10, 1 &req={3} ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={2} ?WAIT3_END_GROUP;
FFMA R11, R10, R11, R10 ?WAIT6_END_GROUP;
LDS R0, [UR4] &wr=0x2 ?trans2;
FCHK P0, R0, R3 &req={2} &wr=0x2 ?trans1;
FFMA R10, R0, R11, RZ ?WAIT4_END_GROUP;
FFMA R12, -R3, R10, R0 ?WAIT4_END_GROUP;
FFMA R13, R11, R12, R10 &req={1} ?trans1;
@!P0 BRA 0x3b0 &req={2} ?trans6;
MOV R10, 0x3b0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x460 &req={0} ?trans5;
LDC R0, c[0x0][0x398] &wr=0x1 ?trans8;
LDC.64 R10, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD R15, R0, UR6, R9 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R10, R15, 0x4, R10 &req={2} ?WAIT5_END_GROUP;
STG.E.STRONG.SYS desc[UR8][R10.64], R13 &rd=0x2 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU UR4, c[0x0][0x398] &wr=0x3 ?trans1;
IADD3 R9, PT, PT, R9, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R9, UR4, PT &req={3} ?WAIT13_END_GROUP;
@P0 BRA 0x130 ?trans5;
EXIT ?trans5;
SHF.R.U32.HI R12, RZ, 0x17, R3 ?trans1;
BSSY.RECONVERGENT B1, 0xac0 ?trans1;
SHF.R.U32.HI R11, RZ, 0x17, R0 ?trans2;
LOP3.LUT R12, R12, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R11, R11, 0xff, RZ, 0xc0, !PT ?trans1;
MOV R13, R0 ?trans1;
IADD3 R17, PT, PT, R12, -0x1, RZ ?trans1;
MOV R14, R3 ?trans1;
IADD3 R16, PT, PT, R11, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R17, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R16, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R15, RZ ?trans1;
@!P0 BRA 0x6a0 ?trans6;
FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0xaa0 ?trans5;
LOP3.LUT P0, RZ, R14, 0x7fffffff, R13, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0xa80 ?trans5;
FSETP.NEU.FTZ.AND P2, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P1 BRA !P2, 0xa80 ?trans5;
LOP3.LUT P2, RZ, R13, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P1, P2, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0xa60 ?trans5;
LOP3.LUT P1, RZ, R14, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0xa30 ?trans5;
ISETP.GE.AND P0, PT, R16, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R17, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R15, RZ ?trans1;
@!P0 MOV R15, 0xffffffc0 ?trans1;
@!P0 FFMA R13, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R14, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R15, PT, PT, R15, 0x40, RZ ?WAIT7_END_GROUP;
LEA R17, R12, 0xc0800000, 0x17 ?trans1;
BSSY.RECONVERGENT B2, 0xa20 ?trans1;
IADD3 R11, PT, PT, R11, -0x7f, RZ ?trans2;
IADD3 R17, PT, PT, -R17, R14, RZ ?WAIT3_END_GROUP;
IMAD R0, R11.reuse, -0x800000, R13 ?trans1;
IADD3 R12, PT, PT, R11, 0x7f, -R12 ?trans1;
MUFU.RCP R14, R17 &wr=0x0 ?trans1;
FADD.FTZ R19, -R17, -RZ ?trans2;
IADD3 R12, PT, PT, R12, R15, RZ ?trans2;
FFMA R21, R14, R19, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R16, R14, R21, R14 ?WAIT4_END_GROUP;
FFMA R13, R0, R16, RZ ?WAIT4_END_GROUP;
FFMA R14, R19, R13, R0 ?WAIT4_END_GROUP;
FFMA R21, R16, R14, R13 ?WAIT4_END_GROUP;
FFMA R14, R19, R21, R0 ?WAIT4_END_GROUP;
FFMA R13, R16, R14, R21 ?WAIT5_END_GROUP;
SHF.R.U32.HI R0, RZ, 0x17, R13 ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R17, PT, PT, R0, R12, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R17, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xa00 ?trans5;
ISETP.GT.AND P0, PT, R17, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x9d0 ?trans5;
ISETP.GE.AND P0, PT, R17, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0xa10 ?trans5;
ISETP.GE.AND P0, PT, R17, -0x18, PT ?trans1;
LOP3.LUT R13, R13, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0xa10 ?trans5;
FFMA.RZ R0, R16.reuse, R14.reuse, R21.reuse ?trans1;
IADD3 R15, PT, PT, R17.reuse, 0x20, RZ ?trans1;
FFMA.RM R11, R16, R14, R21 ?trans1;
ISETP.NE.AND P1, PT, R17.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R17, RZ, PT ?trans1;
LOP3.LUT R0, R0, 0x7fffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R12, R0, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R0, R16, R14, R21 ?trans1;
IADD3 R14, PT, PT, -R17, RZ, RZ ?trans2;
SHF.L.U32 R15, R12, R15, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R0, R11, PT ?trans1;
SEL R11, R14, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R15, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R11, RZ, R11, R12 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R15, RZ, 0x1, R11 ?WAIT3_END_GROUP;
SEL R0, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R0, R0, 0x1, R15, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, R11, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R15, R0, RZ ?WAIT4_END_GROUP;
LOP3.LUT R13, R0, R13, RZ, 0xfc, !PT ?trans1;
BRA 0xa10 ?trans6;
LOP3.LUT R13, R13, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R13, R13, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0xa10 ?trans6;
IMAD R13, R12, 0x800000, R13 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
BRA 0xab0 ?trans5;
LOP3.LUT R13, R14, 0x80000000, R13, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R13, R13, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0xab0 ?trans6;
LOP3.LUT R13, R14, 0x80000000, R13, 0x48, !PT ?trans1;
BRA 0xab0 ?trans6;
MUFU.RSQ R13, -QNAN &wr=0x0 ?trans1;
BRA 0xab0 ?trans5;
FADD.FTZ R13, R0, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
HFMA2 R11, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R10 0x0 &req={0} ?trans5;
BRA 0xae0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: void producer_kernel<float, false>(float*, float volatile*, unsigned int volatile*, unsigned int)
_Z15producer_kernelIfLb0EEvPT_PVS0_PVjj:
s_load_b32 s8, s[0:1], 0x18
s_mov_b32 s3, 0
s_waitcnt lgkmcnt(0)
s_cmp_eq_u32 s8, 0
s_cbranch_scc1 .LBB0_9
s_clause 0x1
s_load_b32 s12, s[0:1], 0x2c
s_load_b128 s[4:7], s[0:1], 0x0
s_mul_i32 s1, s15, s8
v_lshlrev_b32_e32 v3, 2, v0
v_cmp_eq_u32_e64 s0, 0, v0
v_mov_b32_e32 v5, 0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_add_nc_u32_e32 v1, 0, v3
s_waitcnt lgkmcnt(0)
s_and_b32 s9, s12, 0xffff
s_mul_i32 s2, s1, s9
v_cvt_f32_u32_e32 v2, s9
s_lshl_b64 s[10:11], s[2:3], 2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
s_add_u32 s2, s4, s10
s_addc_u32 s4, s5, s11
v_add_co_u32 v3, s2, s2, v3
v_add_co_ci_u32_e64 v4, null, s4, 0, s2
s_cmp_gt_u32 s9, 1
s_mov_b32 s10, 0
s_cselect_b32 s4, -1, 0
s_bfe_u32 s5, s12, 0xf0001
.LBB0_2:
s_mul_i32 s2, s10, s9
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[12:13], s[2:3], 2
s_mov_b32 s2, s5
v_add_co_u32 v6, vcc_lo, v3, s12
v_add_co_ci_u32_e32 v7, vcc_lo, s13, v4, vcc_lo
s_and_not1_b32 vcc_lo, exec_lo, s4
global_load_b32 v6, v[6:7], off
s_waitcnt vmcnt(0)
ds_store_b32 v1, v6
s_waitcnt lgkmcnt(0)
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_cbranch_vccnz .LBB0_6
.LBB0_3:
s_mov_b32 s11, exec_lo
v_cmpx_gt_u32_e64 s2, v0
s_cbranch_execz .LBB0_5
v_lshl_add_u32 v6, s2, 2, v1
ds_load_b32 v6, v6
ds_load_b32 v7, v1
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v6, v6, v7
ds_store_b32 v1, v6
.LBB0_5:
s_or_b32 exec_lo, exec_lo, s11
s_lshr_b32 s11, s2, 1
s_cmp_gt_u32 s2, 1
s_mov_b32 s2, s11
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_3
.LBB0_6:
s_and_saveexec_b32 s11, s0
s_cbranch_execz .LBB0_8
ds_load_b32 v6, v5
s_add_i32 s2, s10, s1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[12:13], s[2:3], 2
s_add_u32 s12, s6, s12
s_addc_u32 s13, s7, s13
s_waitcnt lgkmcnt(0)
v_div_scale_f32 v7, null, v2, v2, v6
v_div_scale_f32 v10, vcc_lo, v6, v2, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f32_e32 v8, v7
s_waitcnt_depctr 0xfff
v_fma_f32 v9, -v7, v8, 1.0
v_fmac_f32_e32 v8, v9, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v9, v10, v8
v_fma_f32 v11, -v7, v9, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v9, v11, v8
v_fma_f32 v7, -v7, v9, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fmas_f32 v7, v7, v8, v9
v_div_fixup_f32 v8, v7, v2, v6
v_dual_mov_b32 v6, s12 :: v_dual_mov_b32 v7, s13
flat_store_b32 v[6:7], v8 dlc
s_waitcnt_vscnt null, 0x0
.LBB0_8:
s_or_b32 exec_lo, exec_lo, s11
s_add_i32 s10, s10, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s10, s8
s_cbranch_scc0 .LBB0_2
.LBB0_9:
s_endpgm
| void_producer_kernel_float__false_ | 4,273 | 1,599 | stackv2-00000-of-00015 |
// Demangled: add_matrix(float*, float*, float*, int, float, float)
Function : _Z10add_matrixPfS_S_iff
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x398] &wr=0x2 ?trans1;
S2R R2, SR_TID.Y &wr=0x3 ?trans6;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
S2UR UR5, SR_CTAID.Y &wr=0x3 ?trans8;
LDC R5, c[0x0][0x364] &wr=0x3 ?trans1;
IMAD R0, R0, UR4, R3 &req={1} ?WAIT2_END_GROUP;
IMAD R5, R5, UR5, R2 &req={3} ?WAIT5_END_GROUP;
VIMNMX.S32 R2, R0, R5, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R2, UR6, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU UR4, c[0x0][0x3a0] &wr=0x0 ?trans1;
IADD3 R2, PT, PT, R0, 0x1, RZ ?trans2;
IADD3 R3, PT, PT, R5.reuse, 0x1, RZ ?trans1;
IMAD R5, R5, UR6, R0 ?trans1;
LDCU UR7, c[0x0][0x39c] &wr=0x1 ?trans1;
I2FP.F32.S32 R2, R2 ?trans2;
I2FP.F32.U32 R3, R3 ?WAIT5_END_GROUP;
FMUL R2, R2, R3 ?WAIT4_END_GROUP;
FMUL R4, R2, UR4 &req={0} ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans1;
LDC.64 R2, c[0x0][0x390] &wr=0x2 ?trans2;
FMUL.RZ R4, R4, 0.15915493667125701904 ?WAIT6_END_GROUP;
MUFU.SIN R4, R4 &wr=0x1 ?trans1;
IMAD.WIDE R2, R5, 0x4, R2 &req={2} ?WAIT4_END_GROUP;
FMUL R5, R4, UR7 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R5 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x1e0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: add_matrix(float*, float*, float*, int, float, float)
_Z10add_matrixPfS_S_iff:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x34
s_load_b128 s[4:7], s[0:1], 0x18
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
s_mov_b32 s2, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_max_i32_e32 v2, v0, v1
v_cmpx_gt_i32_e64 s4, v2
s_cbranch_execz .LBB0_2
v_add_nc_u32_e32 v2, 1, v0
v_add_nc_u32_e32 v3, 1, v1
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_f32_i32_e32 v2, v2
v_cvt_f32_i32_e32 v3, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v2, v2, v3
v_mul_f32_e32 v4, s6, v2
v_mad_u64_u32 v[2:3], null, v1, s4, v[0:1]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f32_e32 v0, 0.15915494, v4
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sin_f32_e32 v4, v0
v_lshlrev_b64 v[0:1], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_add_co_u32 v0, vcc_lo, s0, v0
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v2, s5, v4
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| add_matrix | 765 | 835 | stackv2-00000-of-00015 |
// Demangled: kernel(int*, int*)
Function : _Z6kernelPiS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R9, SR_TID.X &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans7;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R2, R9, 0x4, R2 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R9.reuse, 0x4, R4 &req={3} ?trans2;
LDG.E R2, desc[UR4][R2.64] &req={2} &wr=0x2 ?trans4;
LDG.E R7, desc[UR4][R4.64] &wr=0x2 ?trans1;
LOP3.LUT R0, R9, 0x20, RZ, 0xfc, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R0, 0x3f, PT ?trans1;
IADD3 R7, PT, PT, R2, R7, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R7 &rd=0x1 ?trans7;
@!P0 EXIT &req={0} ?trans5;
HFMA2 R3, -RZ, RZ, 0, 6.6220760345458984375e-05 ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64+0x4], R3 ?trans1;
EXIT ?trans5;
BRA 0x110;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: kernel(int*, int*)
_Z6kernelPiS_:
s_load_b128 s[0:3], s[0:1], 0x0
v_lshlrev_b32_e32 v1, 2, v0
v_and_b32_e32 v0, 0x3df, v0
s_waitcnt lgkmcnt(0)
s_clause 0x1
global_load_b32 v2, v1, s[0:1]
global_load_b32 v3, v1, s[2:3]
s_mov_b32 s0, exec_lo
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
global_store_b32 v1, v2, s[2:3]
v_cmpx_ne_u32_e32 31, v0
s_cbranch_execz .LBB0_2
v_add_co_u32 v0, s0, s2, v1
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v1, null, s3, 0, s0
v_mov_b32_e32 v2, 0x457
global_store_b32 v[0:1], v2, off offset:4
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| kernel | 531 | 327 | stackv2-00000-of-00015 |
// Demangled: initializeAnts(ant*, curandStateXORWOW*, float*, int)
Function : _Z14initializeAntsP3antP17curandStateXORWOWPfi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R9, SR_TID.X &wr=0x0 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
MOV R15, 0xffffffff ?trans1;
HFMA2 R17, -RZ, RZ, 7.609375, 2 ?WAIT5_END_GROUP;
LDC R0, c[0x0][0x398] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x3 ?trans8;
LDC.64 R4, c[0x0][0x388] &wr=0x4 ?trans1;
IMAD R9, R0, UR6, R9 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R9, 0x50, R2 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64+0xc], RZ &req={1} ?trans1;
IMAD.WIDE R6, R9, 0x4, R6 &req={3} ?WAIT3_END_GROUP;
STG.E desc[UR4][R2.64+0x10], RZ ?trans4;
STG.E desc[UR4][R2.64+0x14], RZ ?trans1;
IMAD.WIDE R4, R9, 0x30, R4 &req={4} ?WAIT3_END_GROUP;
STG.E desc[UR4][R2.64+0x18], RZ ?trans4;
STG.E desc[UR4][R2.64+0x1c], RZ ?trans4;
STG.E desc[UR4][R2.64+0x20], RZ ?trans4;
STG.E desc[UR4][R2.64+0x24], RZ ?trans4;
STG.E desc[UR4][R2.64+0x28], RZ ?trans4;
STG.E desc[UR4][R2.64+0x2c], R15 ?trans4;
STG.E desc[UR4][R2.64+0x30], R15 ?trans4;
STG.E desc[UR4][R2.64+0x34], R15 ?trans4;
STG.E desc[UR4][R2.64+0x38], R15 ?trans4;
STG.E desc[UR4][R2.64+0x3c], R15 ?trans4;
STG.E desc[UR4][R2.64+0x40], R15 ?trans4;
STG.E desc[UR4][R2.64+0x44], R15 ?trans4;
STG.E desc[UR4][R2.64+0x48], R15 ?trans4;
STG.E desc[UR4][R6.64], R17 &rd=0x0 ?trans4;
LDG.E.64 R8, desc[UR4][R4.64] &wr=0x2 ?trans4;
LDG.E.64 R12, desc[UR4][R4.64+0x10] &wr=0x3 ?trans4;
LDG.E.64 R10, desc[UR4][R4.64+0x8] &wr=0x4 ?trans1;
HFMA2 R7, -RZ, RZ, 0, 0 &req={0} ?trans1;
SHF.R.U32.HI R0, RZ, 0x2, R9 &req={2} ?WAIT2_END_GROUP;
IADD3 R8, PT, PT, R8, 0x587c5, RZ ?trans2;
LOP3.LUT R0, R0, R9, RZ, 0x3c, !PT ?trans1;
IMAD.SHL.U32 R9, R13, 0x10, RZ &req={3} ?trans1;
MOV R18, R13 ?trans1;
MOV R17, R12 ?trans1;
MOV R16, R11 &req={4} ?trans1;
IADD3 R14, PT, PT, R0, R0, RZ ?WAIT4_END_GROUP;
STG.E.64 desc[UR4][R4.64+0x8], R16 ?trans1;
LOP3.LUT R14, R0, R14, R9, 0x96, !PT ?trans1;
MOV R9, R10 ?WAIT3_END_GROUP;
LOP3.LUT R19, R14, R13, RZ, 0x3c, !PT ?trans1;
MOV R13, 0x1 ?trans1;
STG.E.64 desc[UR4][R4.64], R8 ?trans2;
IADD3 R0, PT, PT, R19, R8, RZ ?trans2;
STG.E.64 desc[UR4][R4.64+0x10], R18 ?trans3;
IMAD.SHL.U32 R6, R0.reuse, 0x4, RZ ?trans1;
LOP3.LUT R11, R0, 0x7, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R6, R6, 0x1c, RZ, 0xc0, !PT ?trans1;
STG.E desc[UR4][R2.64], R11 ?trans4;
IADD.64 R6, R2, R6 ?trans2;
STG.E desc[UR4][R2.64+0x2c], R11 ?trans4;
STG.E desc[UR4][R6.64+0xc], R13 ?trans4;
STG.E desc[UR4][R2.64+0x4], R15 ?trans4;
STG.E desc[UR4][R2.64+0x8], R13 ?trans4;
STG.E desc[UR4][R2.64+0x4c], RZ ?trans1;
EXIT ?trans5;
BRA 0x3e0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: initializeAnts(ant*, hiprandState*, float*, int)
_Z14initializeAntsP3antP12hiprandStatePfi:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x18
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
v_mov_b32_e32 v5, -1
s_waitcnt lgkmcnt(0)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_mov_b32_e32 v0, 0
s_mov_b64 s[2:3], 0
s_delay_alu instid0(VALU_DEP_2)
v_mad_i64_i32 v[3:4], null, 0x50, v1, s[4:5]
v_ashrrev_i32_e32 v2, 31, v1
.LBB1_1:
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v6, vcc_lo, v3, s2
v_add_co_ci_u32_e32 v7, vcc_lo, s3, v4, vcc_lo
s_add_u32 s2, s2, 4
s_addc_u32 s3, s3, 0
s_cmp_eq_u32 s2, 32
s_clause 0x1
global_store_b32 v[6:7], v0, off offset:12
global_store_b32 v[6:7], v5, off offset:44
s_cbranch_scc0 .LBB1_1
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_mad_i64_i32 v[7:8], null, v1, 48, s[6:7]
v_dual_mov_b32 v0, 0x479c4000 :: v_dual_mov_b32 v15, 0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v2, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
global_store_b32 v[2:3], v0, off
s_clause 0x2
global_load_b128 v[2:5], v[7:8], off offset:24
global_load_b32 v6, v[7:8], off offset:40
global_load_b32 v0, v[7:8], off
s_waitcnt vmcnt(2)
v_lshrrev_b32_e32 v9, 2, v2
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v13, 0x587c5, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_xor_b32_e32 v2, v9, v2
v_lshlrev_b32_e32 v9, 4, v6
v_lshlrev_b32_e32 v10, 1, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v9, v10, v9
v_xor3_b32 v14, v9, v2, v6
v_mov_b32_e32 v2, 1
v_mad_i64_i32 v[9:10], null, 0x50, v1, s[4:5]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_mov_b32 v1, -1 :: v_dual_add_nc_u32 v0, v13, v14
v_and_b32_e32 v0, 7, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b32_e32 v11, 2, v0
v_add_co_u32 v11, vcc_lo, v9, v11
v_add_co_ci_u32_e32 v12, vcc_lo, 0, v10, vcc_lo
s_clause 0x2
global_store_b32 v[7:8], v13, off
global_store_b128 v[7:8], v[3:6], off offset:24
global_store_b32 v[7:8], v14, off offset:40
s_clause 0x3
global_store_b32 v[9:10], v0, off offset:44
global_store_b32 v[11:12], v2, off offset:12
global_store_b32 v[9:10], v15, off offset:76
global_store_b96 v[9:10], v[0:2], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| initializeAnts | 1,641 | 1,317 | stackv2-00000-of-00015 |
// Demangled: restartAnts(ant*, curandStateXORWOW*, float*, int)
Function : _Z11restartAntsP3antP17curandStateXORWOWPfi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R11, SR_TID.X &wr=0x0 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
MOV R7, 0xffffffff ?WAIT6_END_GROUP;
LDC R0, c[0x0][0x398] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans8;
LDC.64 R8, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R11, R0, UR6, R11 &req={0} ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
IMAD.WIDE R2, R11, 0x50, R2 &req={2} ?WAIT5_END_GROUP;
LDG.E R13, desc[UR4][R2.64+0x4c] &req={1} &wr=0x2 ?trans1;
IMAD.WIDE R8, R11, 0x4, R8 &req={3} ?WAIT3_END_GROUP;
STG.E desc[UR4][R2.64+0xc], RZ ?trans4;
STG.E desc[UR4][R2.64+0x10], RZ ?trans4;
STG.E desc[UR4][R2.64+0x14], RZ ?trans4;
STG.E desc[UR4][R2.64+0x18], RZ ?trans4;
STG.E desc[UR4][R2.64+0x1c], RZ ?trans4;
STG.E desc[UR4][R2.64+0x20], RZ ?trans4;
STG.E desc[UR4][R2.64+0x24], RZ ?trans4;
STG.E desc[UR4][R2.64+0x28], RZ ?trans4;
STG.E desc[UR4][R2.64+0x2c], R7 ?trans4;
STG.E desc[UR4][R2.64+0x30], R7 ?trans4;
STG.E desc[UR4][R2.64+0x34], R7 ?trans4;
STG.E desc[UR4][R2.64+0x38], R7 ?trans4;
STG.E desc[UR4][R2.64+0x3c], R7 ?trans4;
STG.E desc[UR4][R2.64+0x40], R7 ?trans4;
STG.E desc[UR4][R2.64+0x44], R7 ?trans4;
STG.E desc[UR4][R2.64+0x48], R7 ?trans4;
LDG.E R0, desc[UR4][R8.64] &wr=0x3 ?trans1;
SHF.R.S32.HI R6, RZ, 0x1f, R11 ?trans1;
IMAD.WIDE.U32 R4, R11, 0x30, R4 &req={0} ?WAIT4_END_GROUP;
IMAD R11, R6, 0x30, RZ ?WAIT5_END_GROUP;
IADD3 R5, PT, PT, R5, R11, RZ ?trans1;
FSETP.GT.AND P0, PT, R13, RZ, PT &req={2} ?WAIT5_END_GROUP;
FSETP.GEU.OR P0, PT, R13, R0, !P0 &req={3} ?WAIT13_END_GROUP;
@!P0 STG.E desc[UR4][R8.64], R13 &rd=0x0 ?trans4;
LDG.E.64 R10, desc[UR4][R4.64] &wr=0x2 ?trans4;
LDG.E.64 R16, desc[UR4][R4.64+0x10] &wr=0x3 ?trans4;
LDG.E.64 R14, desc[UR4][R4.64+0x8] &wr=0x4 ?trans1;
HFMA2 R9, -RZ, RZ, 0, 0 &req={0} ?trans1;
SHF.R.U32.HI R0, RZ, 0x2, R11 &req={2} ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, R11, RZ, 0x3c, !PT ?trans1;
IMAD.SHL.U32 R11, R17, 0x10, RZ &req={3} ?WAIT3_END_GROUP;
IADD3 R6, PT, PT, R0, R0, RZ ?trans2;
IADD3 R10, PT, PT, R10, 0x587c5, RZ ?trans2;
LOP3.LUT R6, R0, R6, R11, 0x96, !PT ?WAIT4_END_GROUP;
LOP3.LUT R21, R6, R17, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R21, R10, RZ ?WAIT5_END_GROUP;
IMAD.SHL.U32 R8, R0, 0x4, RZ ?trans1;
MOV R18, R15 &req={4} ?WAIT4_END_GROUP;
LOP3.LUT R8, R8, 0x1c, RZ, 0xc0, !PT ?trans1;
MOV R19, R16 ?trans1;
MOV R11, R14 ?trans1;
MOV R20, R17 ?trans1;
LOP3.LUT R13, R0, 0x7, RZ, 0xc0, !PT ?trans1;
IADD.64 R8, R2, R8 ?trans2;
MOV R15, 0x1 ?trans1;
STG.E.64 desc[UR4][R4.64+0x8], R18 ?trans4;
STG.E.64 desc[UR4][R4.64], R10 ?trans4;
STG.E.64 desc[UR4][R4.64+0x10], R20 ?trans4;
STG.E desc[UR4][R2.64], R13 ?trans4;
STG.E desc[UR4][R2.64+0x2c], R13 ?trans4;
STG.E desc[UR4][R8.64+0xc], R15 ?trans4;
STG.E desc[UR4][R2.64+0x4], R7 ?trans4;
STG.E desc[UR4][R2.64+0x8], R15 ?trans4;
STG.E desc[UR4][R2.64+0x4c], RZ ?trans1;
EXIT ?trans5;
BRA 0x440;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: restartAnts(ant*, hiprandState*, float*, int)
_Z11restartAntsP3antP12hiprandStatePfi:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x18
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v5, -1
s_waitcnt lgkmcnt(0)
v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
s_mov_b64 s[2:3], 0
s_delay_alu instid0(VALU_DEP_1)
v_mad_i64_i32 v[0:1], null, 0x50, v2, s[4:5]
v_ashrrev_i32_e32 v3, 31, v2
.LBB2_1:
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v6, vcc_lo, v0, s2
v_add_co_ci_u32_e32 v7, vcc_lo, s3, v1, vcc_lo
s_add_u32 s2, s2, 4
s_addc_u32 s3, s3, 0
s_cmp_eq_u32 s2, 32
s_clause 0x1
global_store_b32 v[6:7], v4, off offset:12
global_store_b32 v[6:7], v5, off offset:44
s_cbranch_scc0 .LBB2_1
v_lshlrev_b64 v[3:4], 2, v[2:3]
v_mad_i64_i32 v[0:1], null, 0x50, v2, s[4:5]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v5, vcc_lo, s0, v3
v_add_co_ci_u32_e32 v6, vcc_lo, s1, v4, vcc_lo
global_load_b32 v7, v[0:1], off offset:76
global_load_b32 v3, v[5:6], off
s_waitcnt vmcnt(1)
v_cmp_lt_f32_e32 vcc_lo, 0, v7
s_waitcnt vmcnt(0)
v_cmp_lt_f32_e64 s0, v7, v3
v_add_co_u32 v3, s1, 0x4c, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v4, s1, 0, v1, s1
s_and_b32 s1, vcc_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s0, s1
s_cbranch_execz .LBB2_4
global_store_b32 v[5:6], v7, off
.LBB2_4:
s_or_b32 exec_lo, exec_lo, s0
v_mad_i64_i32 v[13:14], null, v2, 48, s[6:7]
s_clause 0x2
global_load_b128 v[5:8], v[13:14], off offset:24
global_load_b32 v9, v[13:14], off offset:40
global_load_b32 v2, v[13:14], off
v_dual_mov_b32 v17, 0 :: v_dual_mov_b32 v12, 1
s_waitcnt vmcnt(2)
v_lshrrev_b32_e32 v10, 2, v5
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v2, 0x587c5, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_xor_b32_e32 v5, v10, v5
v_lshlrev_b32_e32 v10, 4, v9
v_lshlrev_b32_e32 v11, 1, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_xor_b32_e32 v10, v11, v10
v_mov_b32_e32 v11, -1
v_xor3_b32 v5, v10, v5, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v10, v2, v5
v_and_b32_e32 v10, 7, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b32_e32 v15, 2, v10
v_add_co_u32 v15, vcc_lo, v0, v15
v_add_co_ci_u32_e32 v16, vcc_lo, 0, v1, vcc_lo
s_clause 0x2
global_store_b32 v[13:14], v2, off
global_store_b128 v[13:14], v[6:9], off offset:24
global_store_b32 v[13:14], v5, off offset:40
s_clause 0x3
global_store_b32 v[3:4], v17, off
global_store_b32 v[15:16], v12, off offset:12
global_store_b32 v[0:1], v10, off offset:44
global_store_b96 v[0:1], v[10:12], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| restartAnts | 1,823 | 1,553 | stackv2-00000-of-00015 |
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