sass stringlengths 231 30.8k | rdna stringlengths 69 28.4k | function_name stringlengths 1 85 | sass_tokens int64 90 14.4k ⌀ | rdna_tokens int64 11 14.5k ⌀ | source stringclasses 15 values |
|---|---|---|---|---|---|
// Demangled: ovf_do(int*)
Function : _Z6ovf_doPi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans2;
LDG.E R0, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R0, RZ, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
S2R R7, SR_CTAID.X &wr=0x0 ?trans1;
LDCU UR6, c[0x0][0x360] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x0 ?trans1;
LDCU UR7, c[0x3][0x10] &wr=0x1 ?trans1;
IMAD R7, R7, UR6, R0 &req={0} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, UR7, PT &req={1} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDC.64 R4, c[0x3][0x28] &wr=0x0 ?trans2;
IMAD.WIDE R4, R7, 0x4, R4 &req={0} ?WAIT6_END_GROUP;
LDG.E R4, desc[UR4][R4.64] &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R4, UR7, PT &req={2} ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
LDCU.64 UR6, c[0x3][0x20] &wr=0x0 ?trans1;
SHF.R.S32.HI R0, RZ, 0x1f, R7 ?trans2;
LEA R4, P0, R7, UR6, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R5, R7, UR7, R0, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R4, desc[UR4][R4.64] &wr=0x2 ?trans2;
ISETP.GE.AND P0, PT, R4, 0x1, PT &req={2} ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
HFMA2 R5, -RZ, RZ, 0, 5.9604644775390625e-08 ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R5 ?trans1;
EXIT ?trans5;
BRA 0x1c0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: ovf_do(int*)
_Z6ovf_doPi:
s_load_b64 s[2:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_load_b32 s4, s[2:3], 0x0
s_waitcnt lgkmcnt(0)
s_cmp_lg_u32 s4, 0
s_cbranch_scc0 .LBB5_2
.LBB5_1:
s_endpgm
.LBB5_2:
s_load_b32 s4, s[0:1], 0x14
s_getpc_b64 s[0:1]
s_add_u32 s0, s0, size_shw@rel32@lo+4
s_addc_u32 s1, s1, size_shw@rel32@hi+12
s_load_b32 s0, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s1, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s1, v[0:1]
s_mov_b32 s1, exec_lo
v_cmpx_gt_i32_e64 s0, v1
s_cbranch_execz .LBB5_1
s_getpc_b64 s[4:5]
s_add_u32 s4, s4, HGT@rel32@lo+4
s_addc_u32 s5, s5, HGT@rel32@hi+12
v_ashrrev_i32_e32 v2, 31, v1
s_load_b64 s[4:5], s[4:5], 0x0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_cmp_ne_u32_e32 vcc_lo, s0, v2
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB5_1
s_getpc_b64 s[0:1]
s_add_u32 s0, s0, OVF@rel32@lo+4
s_addc_u32 s1, s1, OVF@rel32@hi+12
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b32 v0, v[0:1], off
s_waitcnt vmcnt(0)
v_cmp_lt_i32_e32 vcc_lo, 0, v0
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB5_1
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 1
global_store_b32 v0, v1, s[2:3]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| ovf_do | 761 | 909 | stackv2-00000-of-00015 |
// Demangled: reset(int*)
Function : _Z5resetPi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans2;
STG.E desc[UR4][R2.64], RZ &req={0} ?trans1;
EXIT ?trans5;
BRA 0x50;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: reset(int*)
_Z5resetPi:
s_load_b64 s[0:1], s[0:1], 0x0
v_mov_b32_e32 v0, 0
s_waitcnt lgkmcnt(0)
global_store_b32 v0, v0, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| reset | 171 | 92 | stackv2-00000-of-00015 |
// Demangled: tag_init()
Function : _Z8tag_initv
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R9, SR_CTAID.X &wr=0x1 ?trans7;
LDC R6, c[0x3][0x10] &wr=0x2 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans2;
IMAD R9, R9, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R9, R6, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R4, c[0x3][0x30] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
MOV R13, 0xfffffc00 ?WAIT6_END_GROUP;
LDC.64 R2, c[0x3][0x18] &wr=0x2 ?trans1;
IMAD.WIDE R4, R9, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
REDG.E.AND.STRONG.GPU desc[UR4][R4.64], R13 &req={1} &rd=0x0 ?trans1;
IMAD.WIDE R2, R9, 0x4, R2 &req={2} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R2.64] &wr=0x2 ?trans1;
SHF.R.S32.HI R7, RZ, 0x1f, R6 ?trans1;
BSSY.RECONVERGENT B0, 0x190 ?trans1;
LEA R10, P1, R6, R2, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R11, R6, R3, R7, 0x2, P1 ?trans1;
ISETP.GE.AND P0, PT, R0, 0x1, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x180 &req={0} ?trans5;
HFMA2 R9, -RZ, RZ, 0, 5.9604644775390625e-08 ?WAIT5_END_GROUP;
REDG.E.OR.STRONG.GPU desc[UR4][R4.64], R9 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
LDG.E R10, desc[UR4][R10.64] &wr=0x2 ?trans1;
IADD.64 R8, R6, R6 &req={0} ?trans2;
BSSY.RECONVERGENT B0, 0x230 ?trans3;
LEA R12, P1, R8, R2, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R13, R8, R3, R9, 0x2, P1 ?trans1;
ISETP.GE.AND P0, PT, R10, 0x1, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x220 ?trans5;
MOV R11, 0x2 ?WAIT5_END_GROUP;
REDG.E.OR.STRONG.GPU desc[UR4][R4.64], R11 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
LDG.E R12, desc[UR4][R12.64] &wr=0x2 ?trans1;
IADD.64 R8, R8, R6 ?trans2;
BSSY.RECONVERGENT B0, 0x2d0 ?trans3;
LEA R10, P1, R8, R2, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R11, R8, R3, R9, 0x2, P1 &req={0} ?trans1;
ISETP.GE.AND P0, PT, R12, 0x1, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x2c0 ?trans5;
HFMA2 R13, -RZ, RZ, 0, 2.384185791015625e-07 ?WAIT5_END_GROUP;
REDG.E.OR.STRONG.GPU desc[UR4][R4.64], R13 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
LDG.E R10, desc[UR4][R10.64] &wr=0x2 ?trans1;
IADD.64 R8, R8, R6 ?trans2;
BSSY.RECONVERGENT B0, 0x370 ?trans3;
LEA R12, P1, R8, R2, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R13, R8, R3, R9, 0x2, P1 &req={0} ?trans1;
ISETP.GE.AND P0, PT, R10, 0x1, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x360 ?trans5;
MOV R11, 0x8 ?WAIT5_END_GROUP;
REDG.E.OR.STRONG.GPU desc[UR4][R4.64], R11 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
LDG.E R12, desc[UR4][R12.64] &wr=0x2 ?trans1;
IADD.64 R8, R8, R6 ?trans2;
BSSY.RECONVERGENT B0, 0x410 ?trans3;
LEA R10, P1, R8, R2, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R11, R8, R3, R9, 0x2, P1 &req={0} ?trans1;
ISETP.GE.AND P0, PT, R12, 0x1, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x400 ?trans5;
HFMA2 R13, -RZ, RZ, 0, 9.5367431640625e-07 ?WAIT5_END_GROUP;
REDG.E.OR.STRONG.GPU desc[UR4][R4.64], R13 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
LDG.E R10, desc[UR4][R10.64] &wr=0x2 ?trans1;
IADD.64 R8, R8, R6 ?trans2;
BSSY.RECONVERGENT B0, 0x4b0 ?trans3;
LEA R12, P1, R8, R2, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R13, R8, R3, R9, 0x2, P1 &req={0} ?trans1;
ISETP.GE.AND P0, PT, R10, 0x1, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x4a0 ?trans5;
MOV R11, 0x20 ?WAIT5_END_GROUP;
REDG.E.OR.STRONG.GPU desc[UR4][R4.64], R11 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
LDG.E R12, desc[UR4][R12.64] &wr=0x2 ?trans1;
IADD.64 R8, R8, R6 ?trans2;
BSSY.RECONVERGENT B0, 0x550 ?trans3;
LEA R10, P1, R8, R2, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R11, R8, R3, R9, 0x2, P1 &req={0} ?trans1;
ISETP.GE.AND P0, PT, R12, 0x1, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x540 ?trans5;
HFMA2 R13, -RZ, RZ, 0, 3.814697265625e-06 ?WAIT5_END_GROUP;
REDG.E.OR.STRONG.GPU desc[UR4][R4.64], R13 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
LDG.E R10, desc[UR4][R10.64] &wr=0x2 ?trans1;
IADD.64 R8, R8, R6 ?trans2;
BSSY.RECONVERGENT B0, 0x5f0 ?trans3;
LEA R12, P1, R8, R2, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R13, R8, R3, R9, 0x2, P1 &req={0} ?trans1;
ISETP.GE.AND P0, PT, R10, 0x1, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x5e0 ?trans5;
MOV R11, 0x80 ?WAIT5_END_GROUP;
REDG.E.OR.STRONG.GPU desc[UR4][R4.64], R11 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
LDG.E R12, desc[UR4][R12.64] &wr=0x2 ?trans1;
IADD.64 R6, R8, R6 ?trans2;
BSSY.RECONVERGENT B0, 0x690 ?trans3;
LEA R2, P1, R6, R2, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R3, R6, R3, R7, 0x2, P1 ?trans1;
ISETP.GE.AND P0, PT, R12, 0x1, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x680 ?trans5;
HFMA2 R7, -RZ, RZ, 0, 1.52587890625e-05 ?WAIT5_END_GROUP;
REDG.E.OR.STRONG.GPU desc[UR4][R4.64], R7 &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
LDG.E R2, desc[UR4][R2.64] &wr=0x2 ?trans2;
ISETP.GE.AND P0, PT, R2, 0x1, PT &req={2} ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
MOV R3, 0x200 ?WAIT5_END_GROUP;
REDG.E.OR.STRONG.GPU desc[UR4][R4.64], R3 ?trans1;
EXIT ?trans5;
BRA 0x6f0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: tag_init()
_Z8tag_initv:
s_load_b32 s3, s[0:1], 0xc
s_getpc_b64 s[0:1]
s_add_u32 s0, s0, size_shw@rel32@lo+4
s_addc_u32 s1, s1, size_shw@rel32@hi+12
s_load_b32 s2, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s0, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, s15, s0, v[0:1]
s_mov_b32 s0, exec_lo
v_cmpx_gt_i32_e64 s2, v2
s_cbranch_execz .LBB1_21
s_getpc_b64 s[0:1]
s_add_u32 s0, s0, TAG@rel32@lo+4
s_addc_u32 s1, s1, TAG@rel32@hi+12
s_getpc_b64 s[4:5]
s_add_u32 s4, s4, FLW@rel32@lo+4
s_addc_u32 s5, s5, FLW@rel32@hi+12
v_ashrrev_i32_e32 v3, 31, v2
s_load_b64 s[6:7], s[0:1], 0x0
s_load_b64 s[0:1], s[4:5], 0x0
v_mov_b32_e32 v5, 0xfffffc00
s_mov_b32 s3, exec_lo
v_lshlrev_b64 v[3:4], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s6, v3
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v4, vcc_lo
v_add_co_u32 v3, vcc_lo, s0, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
global_atomic_and_b32 v[0:1], v5, off
global_load_b32 v3, v[3:4], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e32 0, v3
s_cbranch_execz .LBB1_3
v_mov_b32_e32 v3, 1
global_atomic_or_b32 v[0:1], v3, off
.LBB1_3:
s_or_b32 exec_lo, exec_lo, s3
v_add_nc_u32_e32 v2, s2, v2
s_mov_b32 s3, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[3:4], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v3, vcc_lo, s0, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
global_load_b32 v3, v[3:4], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e32 0, v3
s_cbranch_execz .LBB1_5
v_mov_b32_e32 v3, 2
global_atomic_or_b32 v[0:1], v3, off
.LBB1_5:
s_or_b32 exec_lo, exec_lo, s3
v_add_nc_u32_e32 v2, s2, v2
s_mov_b32 s3, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[3:4], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v3, vcc_lo, s0, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
global_load_b32 v3, v[3:4], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e32 0, v3
s_cbranch_execz .LBB1_7
v_mov_b32_e32 v3, 4
global_atomic_or_b32 v[0:1], v3, off
.LBB1_7:
s_or_b32 exec_lo, exec_lo, s3
v_add_nc_u32_e32 v2, s2, v2
s_mov_b32 s3, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[3:4], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v3, vcc_lo, s0, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
global_load_b32 v3, v[3:4], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e32 0, v3
s_cbranch_execz .LBB1_9
v_mov_b32_e32 v3, 8
global_atomic_or_b32 v[0:1], v3, off
.LBB1_9:
s_or_b32 exec_lo, exec_lo, s3
v_add_nc_u32_e32 v2, s2, v2
s_mov_b32 s3, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[3:4], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v3, vcc_lo, s0, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
global_load_b32 v3, v[3:4], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e32 0, v3
s_cbranch_execz .LBB1_11
v_mov_b32_e32 v3, 16
global_atomic_or_b32 v[0:1], v3, off
.LBB1_11:
s_or_b32 exec_lo, exec_lo, s3
v_add_nc_u32_e32 v2, s2, v2
s_mov_b32 s3, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[3:4], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v3, vcc_lo, s0, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
global_load_b32 v3, v[3:4], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e32 0, v3
s_cbranch_execz .LBB1_13
v_mov_b32_e32 v3, 32
global_atomic_or_b32 v[0:1], v3, off
.LBB1_13:
s_or_b32 exec_lo, exec_lo, s3
v_add_nc_u32_e32 v2, s2, v2
s_mov_b32 s3, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[3:4], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v3, vcc_lo, s0, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
global_load_b32 v3, v[3:4], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e32 0, v3
s_cbranch_execz .LBB1_15
v_mov_b32_e32 v3, 64
global_atomic_or_b32 v[0:1], v3, off
.LBB1_15:
s_or_b32 exec_lo, exec_lo, s3
v_add_nc_u32_e32 v2, s2, v2
s_mov_b32 s3, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[3:4], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v3, vcc_lo, s0, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
global_load_b32 v3, v[3:4], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e32 0, v3
s_cbranch_execz .LBB1_17
v_mov_b32_e32 v3, 0x80
global_atomic_or_b32 v[0:1], v3, off
.LBB1_17:
s_or_b32 exec_lo, exec_lo, s3
v_add_nc_u32_e32 v2, s2, v2
s_mov_b32 s3, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[3:4], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v3, vcc_lo, s0, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
global_load_b32 v3, v[3:4], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e32 0, v3
s_cbranch_execz .LBB1_19
v_mov_b32_e32 v3, 0x100
global_atomic_or_b32 v[0:1], v3, off
.LBB1_19:
s_or_b32 exec_lo, exec_lo, s3
v_add_nc_u32_e32 v2, s2, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_cmp_lt_i32_e32 vcc_lo, 0, v2
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB1_21
v_mov_b32_e32 v2, 0x200
global_atomic_or_b32 v[0:1], v2, off
.LBB1_21:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| tag_init | 2,816 | 3,363 | stackv2-00000-of-00015 |
// Demangled: saxpy(int, int, int*, int*)
Function : _Z5saxpyiiPiS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R0, SR_TID.X &wr=0x0 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
HFMA2 R7, -RZ, RZ, 0, 5.9604644775390625e-07 ?WAIT6_END_GROUP;
LDC R5, c[0x0][0x360] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x390] &wr=0x2 ?trans1;
IMAD R5, R5, UR6, R0 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R5, 0x4, R2 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R7 &req={1} ?trans1;
EXIT ?trans5;
BRA 0xb0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: saxpy(int, int, int*, int*)
_Z5saxpyiiPiS_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_mov_b32_e32 v2, 10
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| saxpy | 343 | 341 | stackv2-00000-of-00015 |
// Demangled: addSleep(int*, int*)
Function : _Z8addSleepPiS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans2;
LDG.E R2, desc[UR6][R2.64] &req={1} &wr=0x2 ?trans1;
UMOV UR4, URZ ?trans1;
I2FP.F32.S32 R0, R2 &req={2,0} ?WAIT7_END_GROUP;
UI2FP.F32.U32 UR5, UR4 ?trans2;
MOV R5, UR4 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x1, URZ ?WAIT3_END_GROUP;
FSETP.LEU.AND P0, PT, R0, UR5, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x60 ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans2;
STG.E desc[UR6][R2.64], R5 &req={0} ?trans1;
EXIT ?trans5;
BRA 0xe0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: addSleep(int*, int*)
_Z8addSleepPiS_:
s_load_b128 s[0:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_load_b32 s0, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
v_cvt_f32_i32_e32 v0, s0
s_mov_b32 s0, -1
.LBB0_1:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s0, s0, 1
v_cvt_f32_i32_e32 v1, s0
s_delay_alu instid0(VALU_DEP_1)
v_cmp_lt_f32_e32 vcc_lo, v1, v0
s_cbranch_vccnz .LBB0_1
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s0
global_store_b32 v0, v1, s[2:3]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| addSleep | 372 | 280 | stackv2-00000-of-00015 |
// Demangled: calc_dd_coeff(double, double, double, double const*, double const*, double*, double*, double*)
Function : _Z13calc_dd_coeffdddPKdS0_PdS1_S1_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x3e0 ?trans1;
UMOV UR5, 0x40000000 ?WAIT5_END_GROUP;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R0, UR4, R3 &req={1} ?WAIT5_END_GROUP;
LOP3.LUT P0, RZ, R0, UR4, RZ, 0xfc, !PT ?trans1;
UMOV UR4, URZ ?WAIT12_END_GROUP;
@P0 BRA 0x3d0 &req={2,0} ?trans5;
LDCU UR8, c[0x0][0x384] &wr=0x0 ?trans1;
LDC.64 R6, c[0x0][0x380] &wr=0x1 ?trans1;
HFMA2 R2, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
MUFU.RCP64H R3, UR8 &req={0} &wr=0x1 ?trans5;
DFMA R4, R2, -R6, 1 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R4, R4, R4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R2, R4, R2 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R4, -R6, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R4, R2, R4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R4, R2, 2 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R4, -R6, 2 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R2, R6, R4 &req={0} &wr=0x0 ?trans2;
FFMA R4, RZ, UR8, R3 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R4|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA 0x3b0 ?trans5;
LDCU.64 UR8, c[0x0][0x380] &wr=0x0 ?trans1;
MOV R4, 0x3b0 ?trans1;
MOV R2, UR8 &req={0} ?trans1;
MOV R3, UR9 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xb00 ?trans5;
LDC.64 R4, c[0x0][0x3a8] &wr=0x0 ?trans2;
STG.E.64 desc[UR6][R4.64], R2 &req={0} &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU UR8, c[0x0][0x38c] &wr=0x1 ?trans1;
LDC.64 R6, c[0x0][0x388] &wr=0x2 ?trans1;
MOV R2, 0x1 &req={0} ?trans1;
MUFU.RCP64H R3, UR8 &req={1} &wr=0x2 ?trans5;
DFMA R4, R2, -R6, 1 &req={2} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R4, R4, R4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R2, R4, R2 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R4, -R6, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R4, R2, R4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R4, R2, 2 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R4, -R6, 2 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R2, R6, R4 &req={0} &wr=0x0 ?trans2;
FFMA R4, RZ, UR8, R3 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R4|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA 0x6e0 ?trans5;
LDCU.64 UR8, c[0x0][0x388] &wr=0x0 ?trans1;
MOV R4, 0x6e0 ?trans1;
MOV R2, UR8 &req={0} ?trans1;
MOV R3, UR9 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xb00 ?trans5;
LDC.64 R4, c[0x0][0x398] &wr=0x0 ?trans1;
LDCU UR8, c[0x0][0x394] &wr=0x1 ?trans7;
LDC.64 R10, c[0x0][0x390] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R4, R0, 0x8, R4 &req={0} ?WAIT6_END_GROUP;
LDG.E.64.CONSTANT R4, desc[UR6][R4.64] &wr=0x3 ?trans2;
DMUL R6, R4, R2 &req={3} &rd=0x0 &wr=0x3 ?trans2;
LDC.64 R4, c[0x0][0x3b0] &req={0} &wr=0x0 ?trans1;
MUFU.RCP64H R3, UR8 &req={1} &wr=0x2 ?trans1;
MOV R2, 0x1 ?trans1;
IMAD.WIDE.U32 R4, R0, 0x8, R4 &req={0} ?WAIT5_END_GROUP;
STG.E.64 desc[UR6][R4.64], R6 &req={3} &rd=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT9_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R2, -R10, 1 &req={2} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R8, R8 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R2, R8, R2 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R8, -R10, 1 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R8, R2, R8 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R2, 2 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R8, -R10, 2 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R2, R10, R8 &req={1} &wr=0x1 ?trans2;
FFMA R8, RZ, UR8, R3 &req={1} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R8|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA 0xa80 &req={0} ?trans5;
LDCU.64 UR8, c[0x0][0x390] &wr=0x0 ?trans1;
MOV R4, 0xa80 ?trans1;
MOV R2, UR8 &req={0} ?trans1;
MOV R3, UR9 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xb00 ?trans5;
LDC.64 R4, c[0x0][0x3a0] &wr=0x0 ?trans8;
LDC.64 R6, c[0x0][0x3b8] &wr=0x1 ?trans1;
IMAD.WIDE.U32 R4, R0, 0x8, R4 &req={0} ?WAIT6_END_GROUP;
LDG.E.64.CONSTANT R4, desc[UR6][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R6, R0, 0x8, R6 &req={1} ?trans1;
DMUL R2, R4, R2 &req={2} &wr=0x0 ?trans4;
STG.E.64 desc[UR6][R6.64], R2 &req={0} ?trans1;
EXIT ?trans5;
FSETP.GEU.AND P0, PT, |R3|.reuse, 1.469367938527859385e-39, PT ?trans1;
LOP3.LUT R6, R3.reuse, 0x800fffff, RZ, 0xc0, !PT ?trans1;
MOV R8, 0x1 ?trans1;
LOP3.LUT R21, R3, 0x7ff00000, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R7, R6, 0x3ff00000, RZ, 0xfc, !PT ?trans1;
MOV R6, R2 ?trans1;
MOV R19, 0x1ca00000 ?WAIT6_END_GROUP;
@!P0 DMUL R6, R2, 8.98846567431157953865e+307 &wr=0x0 ?trans2;
MUFU.RCP64H R9, R7 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R8, -R6, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R10, R10, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R8, R10, R8 &req={0} &rd=0x0 &wr=0x1 ?trans2;
MOV R9, UR5 &req={0} ?trans1;
MOV R8, UR4 ?WAIT4_END_GROUP;
LOP3.LUT R18, R9, 0x7ff00000, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P1, PT, R18, R21, PT ?trans1;
MOV R20, R18 ?WAIT15_END_GROUP;
NOP ?WAIT6_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, -R6, 1 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, R10 &req={0} &rd=0x0 &wr=0x1 ?trans2;
SEL R11, R19, 0x63400000, !P1 &req={0} ?trans1;
FSETP.GEU.AND P1, PT, |R9|, 1.469367938527859385e-39, PT ?trans1;
MOV R10, R8 ?WAIT3_END_GROUP;
LOP3.LUT R11, R11, 0x800fffff, R9, 0xf8, !PT ?WAIT9_END_GROUP;
@P1 BRA 0xe30 &req={1} ?trans5;
LOP3.LUT R5, R3, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
MOV R14, RZ ?WAIT4_END_GROUP;
ISETP.GE.U32.AND P1, PT, R18, R5, PT ?WAIT5_END_GROUP;
SEL R5, R19, 0x63400000, !P1 ?WAIT5_END_GROUP;
LOP3.LUT R5, R5, 0x80000000, R9, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R15, R5, 0x100000, RZ, 0xfc, !PT ?WAIT6_END_GROUP;
DFMA R10, R10, 2, -R14 &wr=0x0 ?trans2;
LOP3.LUT R20, R11, 0x7ff00000, RZ, 0xc0, !PT &req={0} ?WAIT7_END_GROUP;
MOV R5, R21 ?trans1;
@!P0 LOP3.LUT R5, R7, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
DMUL R14, R12, R10 &wr=0x0 ?trans1;
IADD3 R21, PT, PT, R20, -0x1, RZ ?trans1;
BSSY.RECONVERGENT B1, 0x12a0 ?trans1;
IADD3 R22, PT, PT, R5, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R21, 0x7feffffe, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R22, 0x7feffffe, P0 ?WAIT15_END_GROUP;
NOP ?WAIT8_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R14, -R6, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R12, R16, R14 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0x1150 &req={1,0} ?trans5;
LOP3.LUT R9, R3, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
MOV R8, RZ ?WAIT3_END_GROUP;
IADD3 R5, PT, PT, R18.reuse, -R9.reuse, RZ ?trans1;
ISETP.GE.U32.AND P0, PT, R18, R9, PT ?WAIT4_END_GROUP;
VIMNMX.S32 R5, R5, -0x46a00000, !PT ?trans1;
SEL R16, R19, 0x63400000, !P0 ?WAIT4_END_GROUP;
VIMNMX.S32 R5, R5, 0x46a00000, PT ?WAIT5_END_GROUP;
IADD3 R16, PT, PT, -R16, R5, RZ ?WAIT4_END_GROUP;
IADD3 R9, PT, PT, R16, 0x7fe00000, RZ ?WAIT6_END_GROUP;
DMUL R14, R12, R8 &wr=0x0 ?trans2;
FSETP.GTU.AND P0, PT, |R15|, 1.469367938527859385e-39, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x1290 ?trans5;
DFMA R6, R12, -R6, R10 &wr=0x0 ?trans1;
MOV R8, RZ ?trans1;
FSETP.NEU.AND P0, PT, R7.reuse, RZ, PT &req={0} ?trans1;
LOP3.LUT R5, R7, 0x80000000, R3, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R9, R5, R9, RZ, 0xfc, !PT ?WAIT8_END_GROUP;
@!P0 BRA 0x1290 ?trans5;
IADD3 R3, PT, PT, -R16, RZ, RZ ?trans1;
MOV R2, RZ ?trans1;
DMUL.RP R8, R12, R8 &wr=0x0 ?trans2;
LOP3.LUT R5, R9, R5, RZ, 0x3c, !PT &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R14, -R2, R12 &wr=0x0 ?trans2;
IADD3 R2, PT, PT, -R16, -0x43300000, RZ &req={0} ?WAIT5_END_GROUP;
FSETP.NEU.AND P0, PT, |R3|, R2, PT ?WAIT5_END_GROUP;
FSEL R14, R8, R14, !P0 ?trans1;
FSEL R15, R5, R15, !P0 ?trans1;
BRA 0x1290 ?trans6;
DSETP.NAN.AND P0, PT, R8, R8, PT &wr=0x0 ?trans2;
@P0 BRA 0x1270 &req={0} ?trans5;
DSETP.NAN.AND P0, PT, R2, R2, PT &wr=0x0 ?trans2;
@P0 BRA 0x1240 &req={0} ?trans5;
ISETP.NE.AND P0, PT, R20, R5, PT ?trans1;
MOV.64 R14, 0xfff8000000000000 ?WAIT12_END_GROUP;
@!P0 BRA 0x1290 ?trans5;
ISETP.NE.AND P0, PT, R20, 0x7ff00000, PT ?trans1;
LOP3.LUT R15, R9, 0x80000000, R3, 0x48, !PT ?WAIT4_END_GROUP;
ISETP.EQ.OR P0, PT, R5, RZ, !P0 ?WAIT13_END_GROUP;
@P0 LOP3.LUT R2, R15, 0x7ff00000, RZ, 0xfc, !PT ?trans1;
@!P0 MOV R14, RZ ?trans1;
@P0 MOV R14, RZ ?WAIT3_END_GROUP;
@P0 MOV R15, R2 ?trans1;
BRA 0x1290 ?trans6;
LOP3.LUT R15, R3, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R14, R2 ?trans1;
BRA 0x1290 ?trans6;
LOP3.LUT R15, R9, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R14, R8 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
HFMA2 R5, -RZ, RZ, 0, 0 ?trans1;
MOV R2, R14 ?trans1;
MOV R3, R15 ?trans2;
RET.REL.NODEC R4 0x0 ?trans5;
BRA 0x12e0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: calc_dd_coeff(double, double, double, double const*, double const*, double*, double*, double*)
_Z13calc_dd_coeffdddPKdS0_PdS1_S1_:
s_clause 0x3
s_load_b32 s12, s[0:1], 0x4c
s_load_b256 s[4:11], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x20
s_load_b128 s[16:19], s[0:1], 0x30
s_waitcnt lgkmcnt(0)
s_and_b32 s12, s12, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s12, v[0:1]
s_mov_b32 s12, exec_lo
v_or_b32_e32 v0, s15, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB0_2
v_div_scale_f64 v[2:3], null, s[4:5], s[4:5], 2.0
s_load_b64 s[0:1], s[0:1], 0x28
v_mov_b32_e32 v0, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f64_e32 v[4:5], v[2:3]
s_waitcnt_depctr 0xfff
v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
v_div_scale_f64 v[6:7], vcc_lo, 2.0, s[4:5], 2.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[8:9], v[6:7], v[4:5]
v_fma_f64 v[2:3], -v[2:3], v[8:9], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fmas_f64 v[2:3], v[2:3], v[4:5], v[8:9]
v_div_fixup_f64 v[2:3], v[2:3], s[4:5], 2.0
s_waitcnt lgkmcnt(0)
global_store_b64 v0, v[2:3], s[0:1]
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s12
v_div_scale_f64 v[3:4], null, s[6:7], s[6:7], 2.0
v_div_scale_f64 v[5:6], null, s[8:9], s[8:9], 2.0
v_mov_b32_e32 v2, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 3, v[1:2]
v_add_co_u32 v11, vcc_lo, s10, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v12, vcc_lo, s11, v1, vcc_lo
v_add_co_u32 v13, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v14, vcc_lo, s3, v1, vcc_lo
global_load_b64 v[11:12], v[11:12], off
global_load_b64 v[13:14], v[13:14], off
v_div_scale_f64 v[19:20], vcc_lo, 2.0, s[6:7], 2.0
v_rcp_f64_e32 v[7:8], v[3:4]
v_rcp_f64_e32 v[9:10], v[5:6]
s_waitcnt_depctr 0xfff
v_fma_f64 v[15:16], -v[3:4], v[7:8], 1.0
v_fma_f64 v[17:18], -v[5:6], v[9:10], 1.0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[7:8], v[7:8], v[15:16], v[7:8]
v_fma_f64 v[9:10], v[9:10], v[17:18], v[9:10]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[15:16], -v[3:4], v[7:8], 1.0
v_fma_f64 v[17:18], -v[5:6], v[9:10], 1.0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_fma_f64 v[7:8], v[7:8], v[15:16], v[7:8]
v_div_scale_f64 v[15:16], s0, 2.0, s[8:9], 2.0
v_fma_f64 v[9:10], v[9:10], v[17:18], v[9:10]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f64 v[17:18], v[19:20], v[7:8]
v_mul_f64 v[21:22], v[15:16], v[9:10]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[2:3], -v[3:4], v[17:18], v[19:20]
v_fma_f64 v[4:5], -v[5:6], v[21:22], v[15:16]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_div_fmas_f64 v[2:3], v[2:3], v[7:8], v[17:18]
s_mov_b32 vcc_lo, s0
v_div_fmas_f64 v[4:5], v[4:5], v[9:10], v[21:22]
v_add_co_u32 v6, vcc_lo, s16, v0
v_add_co_ci_u32_e32 v7, vcc_lo, s17, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s18, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s19, v1, vcc_lo
v_div_fixup_f64 v[2:3], v[2:3], s[6:7], 2.0
v_div_fixup_f64 v[4:5], v[4:5], s[8:9], 2.0
s_waitcnt vmcnt(1)
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_f64 v[2:3], v[2:3], v[11:12]
s_waitcnt vmcnt(0)
v_mul_f64 v[4:5], v[4:5], v[13:14]
global_store_b64 v[6:7], v[2:3], off
global_store_b64 v[0:1], v[4:5], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| calc_dd_coeff | 5,909 | 2,233 | stackv2-00000-of-00015 |
// Demangled: vecAddP(float*, float*, float*, int)
Function : _Z7vecAddPPfS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R9, SR_TID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x398] &wr=0x2 ?trans1;
IMAD R9, R0, UR4, R9 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R9, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD.WIDE R2, R9, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x4 ?trans1;
IMAD.WIDE R4, R9, 0x4, R4 &req={2} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x4 ?trans1;
IMAD.WIDE R6, R9, 0x4, R6 &req={3} ?WAIT4_END_GROUP;
FADD R9, R2, R5 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x140;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: vecAddP(float*, float*, float*, int)
_Z7vecAddPPfS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[4:7], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| vecAddP | 568 | 576 | stackv2-00000-of-00015 |
// Demangled: gpu_hidden_error_kernel_function(float*, int, float*, int, float*, float*)
Function : _Z32gpu_hidden_error_kernel_functionPfiS_iS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R15, SR_TID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD R15, R0, UR4, R15 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R15, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x3a8] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R12, c[0x0][0x390] &wr=0x1 ?trans8;
LDC.64 R4, c[0x0][0x3a0] &wr=0x2 ?trans8;
LDC.64 R10, c[0x0][0x380] &wr=0x3 ?trans1;
LDG.E R12, desc[UR4][R12.64+0x4] &req={1} &wr=0x4 ?trans1;
IMAD.WIDE R2, R15, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &wr=0x5 ?trans1;
IMAD.WIDE R4, R15, 0x4, R4 &req={2} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x4 ?trans1;
IMAD.WIDE R10, R15, 0x4, R10 &req={3} ?trans1;
F2F.F64.F32 R6, R2 &req={5} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, -R6, 1 &req={0} &wr=0x0 ?trans1;
FMUL R0, R12, R5 &req={4} ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R6, R8 &req={0} &rd=0x0 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R6, R0 &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R6, R8, R6 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R7, R6 &req={0} &wr=0x0 ?trans2;
STG.E desc[UR4][R10.64], R7 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x300;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: gpu_hidden_error_kernel_function(float*, int, float*, int, float*, float*)
_Z32gpu_hidden_error_kernel_functionPfiS_iS_S_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x3c
s_load_b32 s3, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB3_2
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x20
s_load_b64 s[2:3], s[0:1], 0x10
v_ashrrev_i32_e32 v2, 31, v1
s_load_b64 s[0:1], s[0:1], 0x0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s6, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
s_load_b32 s2, s[2:3], 0x4
global_load_b32 v4, v[2:3], off
v_add_co_u32 v2, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b32 v6, v[2:3], off
s_waitcnt vmcnt(1)
v_cvt_f64_f32_e32 v[2:3], v4
s_waitcnt vmcnt(0) lgkmcnt(0)
v_mul_f32_e32 v6, s2, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[4:5], -v[2:3], 1.0
v_mul_f64 v[2:3], v[4:5], v[2:3]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f64_f32_e32 v[4:5], v6
v_mul_f64 v[2:3], v[2:3], v[4:5]
s_delay_alu instid0(VALU_DEP_1)
v_cvt_f32_f64_e32 v2, v[2:3]
global_store_b32 v[0:1], v2, off
.LBB3_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| gpu_hidden_error_kernel_function | 997 | 857 | stackv2-00000-of-00015 |
// Demangled: gpu_output_error_kernel_function(float*, float*, float*, int, float*)
Function : _Z32gpu_output_error_kernel_functionPfS_S_iS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R13, SR_TID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x398] &wr=0x2 ?trans1;
IMAD R13, R0, UR4, R13 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R13, UR5, PT &req={2} ?WAIT5_END_GROUP;
ISETP.EQ.OR P0, PT, R13, RZ, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x390] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R8, c[0x0][0x388] &wr=0x2 ?trans8;
LDC.64 R10, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD.WIDE R2, R13, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x4 ?trans1;
IMAD.WIDE R8, R13, 0x4, R8 &req={2} ?WAIT6_END_GROUP;
LDG.E R9, desc[UR4][R8.64] &wr=0x2 ?trans1;
IMAD.WIDE R10, R13, 0x4, R10 &req={3} ?trans1;
F2F.F64.F32 R4, R2 &req={4} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R6, -R4, 1 &req={0} &wr=0x0 ?trans1;
FADD R0, -R2, R9 &req={2} ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R6, R4, R6 &req={0} &rd=0x0 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R4, R0 &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R4, R6, R4 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R5, R4 &req={0} &wr=0x0 ?trans2;
STG.E desc[UR4][R10.64], R5 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x2f0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: gpu_output_error_kernel_function(float*, float*, float*, int, float*)
_Z32gpu_output_error_kernel_functionPfS_S_iS_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x34
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_cmp_ne_u32_e32 vcc_lo, 0, v1
v_cmp_gt_i32_e64 s2, s3, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, vcc_lo, s2
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB1_2
s_load_b64 s[2:3], s[0:1], 0x10
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s2, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
s_load_b128 s[0:3], s[0:1], 0x0
global_load_b32 v6, v[2:3], off
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b32 v7, v[2:3], off
s_waitcnt vmcnt(1)
v_cvt_f64_f32_e32 v[2:3], v6
s_waitcnt vmcnt(0)
v_sub_f32_e32 v6, v7, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[4:5], -v[2:3], 1.0
v_mul_f64 v[2:3], v[4:5], v[2:3]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f64_f32_e32 v[4:5], v6
v_mul_f64 v[2:3], v[2:3], v[4:5]
s_delay_alu instid0(VALU_DEP_1)
v_cvt_f32_f64_e32 v2, v[2:3]
global_store_b32 v[0:1], v2, off
.LBB1_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| gpu_output_error_kernel_function | 944 | 880 | stackv2-00000-of-00015 |
// Demangled: gpu_weight_adjust_function(float*, int, float*, int, float*)
Function : _Z26gpu_weight_adjust_functionPfiS_iS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x398] &wr=0x2 ?trans1;
IMAD R3, R0, UR4, R3 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R3, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R10, c[0x0][0x380] &wr=0x1 ?trans8;
LDC.64 R8, c[0x0][0x3a0] &wr=0x2 ?trans1;
LDG.E R10, desc[UR4][R10.64+0x4] &req={1} &wr=0x3 ?trans1;
IMAD.WIDE R4, R3, 0x4, R4 &req={0} ?WAIT6_END_GROUP;
LDG.E R4, desc[UR4][R4.64] &wr=0x4 ?trans1;
IMAD.WIDE R8, R3, 0x4, R8 &req={2} ?WAIT5_END_GROUP;
LDG.E R13, desc[UR4][R8.64] &wr=0x2 ?trans1;
UMOV.64 UR6, 0x3fd3333333333333 ?trans1;
F2F.F64.F32 R2, R10 &req={3} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R2, R2, UR6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R6, R4 &req={4} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R2, R6, RZ &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R2, R2 &req={0} &wr=0x2 ?trans2;
FADD R13, R2, R13 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R8.64], R13 ?trans1;
EXIT ?trans5;
BRA 0x2a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: gpu_weight_adjust_function(float*, int, float*, int, float*)
_Z26gpu_weight_adjust_functionPfiS_iS_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x34
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB4_2
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x10
s_load_b64 s[4:5], s[0:1], 0x20
v_ashrrev_i32_e32 v2, 31, v1
s_load_b64 s[0:1], s[0:1], 0x0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s2, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
global_load_b32 v4, v[2:3], off
s_load_b32 s0, s[0:1], 0x4
global_load_b32 v6, v[0:1], off
s_waitcnt lgkmcnt(0)
v_cvt_f64_f32_e32 v[2:3], s0
s_mov_b32 s0, 0x33333333
s_mov_b32 s1, 0x3fd33333
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mul_f64 v[2:3], v[2:3], s[0:1]
s_waitcnt vmcnt(1)
v_cvt_f64_f32_e32 v[4:5], v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[2:3], v[2:3], v[4:5], 0
v_cvt_f32_f64_e32 v2, v[2:3]
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_add_f32_e32 v2, v6, v2
global_store_b32 v[0:1], v2, off
.LBB4_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| gpu_weight_adjust_function | 892 | 825 | stackv2-00000-of-00015 |
// Demangled: kernel_bpnn_layerforward(float*, float*, float*, int, int)
Function : _Z24kernel_bpnn_layerforwardPfS_S_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_TID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R3, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x398] &wr=0x2 ?trans1;
IMAD R0, R3, UR4, R2 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R6, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR10, c[0x0][0x358] &wr=0x1 ?trans7;
S2UR UR9, SR_CgaCtaId &wr=0x2 ?trans1;
UMOV UR6, 0x400 ?WAIT7_END_GROUP;
LDC R5, c[0x0][0x39c] &wr=0x3 ?trans1;
IMAD.WIDE R6, R0, 0x4, R6 &req={0} ?WAIT6_END_GROUP;
LDG.E R6, desc[UR10][R6.64] &req={1} &wr=0x4 ?trans1;
ULEA UR4, UR9, UR6, 0x18 &req={2} ?WAIT6_END_GROUP;
LEA R3, R2, UR4, 0x2 ?trans1;
ISETP.GE.AND P0, PT, R5, 0x1, PT &req={3} ?WAIT4_END_GROUP;
STS [R3], R6 &req={4} &rd=0x0 ?trans9;
@!P0 BRA 0xa10 ?trans5;
ISETP.GE.U32.AND P0, PT, R5.reuse, 0x8, PT ?trans1;
LOP3.LUT R16, R5, 0x7, RZ, 0xc0, !PT ?trans1;
HFMA2 R4, -RZ, RZ, 0, 0 ?trans2;
IMAD R9, R0, R5.reuse, RZ ?trans2;
IMAD R7, R2, R5, RZ ?trans1;
ISETP.NE.AND P1, PT, R16, RZ, PT ?WAIT6_END_GROUP;
@!P0 BRA 0x540 ?trans7;
LDC.64 R12, c[0x0][0x390] &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x388] &wr=0x2 ?trans1;
LOP3.LUT R6, R5, 0x7ffffff8, RZ, 0xc0, !PT &req={0} ?trans1;
MOV R4, RZ ?trans1;
UIADD3 UR7, UPT, UPT, UR6, 0x800, URZ ?trans1;
UIADD3 UR8, UPT, UPT, UR6, 0x9800, URZ ?trans1;
MOV R17, R9 ?trans1;
IADD3 R6, PT, PT, -R6, RZ, RZ ?trans1;
ULEA UR7, UR9, UR7, 0x18 ?trans1;
ULEA UR8, UR9, UR8, 0x18 ?WAIT4_END_GROUP;
UIADD3 UR8, UPT, UPT, UR8, 0x10, URZ ?trans1;
LEA R8, R7, UR7, 0x2 ?trans1;
UIADD3.64 UR4, UPT, UPT, UR4, 0x10, URZ &req={2} ?WAIT3_END_GROUP;
IADD3 R8, PT, PT, R8, 0x10, RZ ?trans1;
IADD.64 R12, R12, 0x10 &req={1} ?trans2;
MOV.64 R10, UR4 ?WAIT8_END_GROUP;
IMAD.WIDE R14, R17, 0x4, R12 ?WAIT5_END_GROUP;
LDG.E R19, desc[UR10][R14.64+-0x10] &wr=0x2 ?trans4;
STG.E desc[UR10][R10.64+-0x10], RZ ?trans4;
LDG.E R21, desc[UR10][R14.64+-0xc] &wr=0x3 ?trans4;
STG.E desc[UR10][R10.64+-0xc], RZ ?trans4;
LDG.E R23, desc[UR10][R14.64+-0x8] &wr=0x4 ?trans4;
STG.E desc[UR10][R10.64+-0x8], RZ ?trans4;
LDG.E R25, desc[UR10][R14.64+-0x4] &wr=0x5 ?trans4;
STG.E desc[UR10][R10.64+-0x4], RZ ?trans4;
LDG.E R27, desc[UR10][R14.64] &wr=0x5 ?trans4;
STG.E desc[UR10][R10.64], RZ ?trans4;
LDG.E R29, desc[UR10][R14.64+0x4] &wr=0x5 ?trans4;
STG.E desc[UR10][R10.64+0x4], RZ ?trans4;
LDG.E R31, desc[UR10][R14.64+0x8] &wr=0x5 ?trans4;
STG.E desc[UR10][R10.64+0x8], RZ ?trans4;
LDG.E R33, desc[UR10][R14.64+0xc] &wr=0x5 ?trans1;
IADD3 R6, PT, PT, R6, 0x8, RZ ?WAIT2_END_GROUP;
IADD3 R4, PT, PT, R4, 0x8, RZ ?trans2;
IADD3 R17, PT, PT, R17, 0x8, RZ ?trans1;
STG.E desc[UR10][R10.64+0xc], RZ &rd=0x0 ?trans1;
ISETP.NE.AND P0, PT, R6, RZ, PT ?trans1;
IADD.64 R10, R10, 0x20 &req={0} ?trans2;
STS [R8+-0x10], R19 &req={2} ?trans4;
STS [UR8+-0x10], RZ ?trans4;
STS [R8+-0xc], R21 &req={3} ?trans4;
STS [UR8+-0xc], RZ ?trans4;
STS [R8+-0x8], R23 &req={4} ?trans4;
STS [UR8+-0x8], RZ ?trans4;
STS [R8+-0x4], R25 &req={5} ?trans4;
STS [UR8+-0x4], RZ ?trans4;
STS [R8], R27 ?trans4;
STS [UR8], RZ ?trans4;
STS [R8+0x4], R29 ?trans4;
STS [UR8+0x4], RZ ?trans4;
STS [R8+0x8], R31 ?trans4;
STS [UR8+0x8], RZ ?trans4;
STS [R8+0xc], R33 &rd=0x0 ?trans4;
STS [UR8+0xc], RZ ?trans1;
UIADD3 UR8, UPT, UPT, UR8, 0x20, URZ ?trans1;
IADD3 R8, PT, PT, R8, 0x20, RZ &req={0} ?trans1;
@P0 BRA 0x2b0 ?trans10;
@!P1 BRA 0xa10 ?trans5;
ISETP.GE.U32.AND P0, PT, R16, 0x4, PT ?trans1;
LOP3.LUT R17, R5, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R17, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x760 ?trans6;
LDC.64 R10, c[0x0][0x390] &wr=0x1 ?trans1;
IADD3 R15, PT, PT, R9, R4, RZ ?WAIT7_END_GROUP;
LDC.64 R12, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD.WIDE R10, R15, 0x4, R10 &req={1} ?WAIT5_END_GROUP;
LDG.E R6, desc[UR10][R10.64] &req={0} &wr=0x3 ?trans1;
IMAD.WIDE.U32 R12, R4, 0x4, R12 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR10][R12.64], RZ &rd=0x1 ?trans4;
LDG.E R14, desc[UR10][R10.64+0x4] &wr=0x2 ?trans4;
STG.E desc[UR10][R12.64+0x4], RZ &rd=0x1 ?trans4;
LDG.E R16, desc[UR10][R10.64+0x8] &wr=0x4 ?trans4;
STG.E desc[UR10][R12.64+0x8], RZ &rd=0x1 ?trans4;
LDG.E R18, desc[UR10][R10.64+0xc] &wr=0x5 ?trans1;
UIADD3 UR4, UPT, UPT, UR6, 0x800, URZ ?trans1;
UIADD3 UR5, UPT, UPT, UR6, 0x9800, URZ ?trans1;
IADD3 R8, PT, PT, R7, R4, RZ ?WAIT2_END_GROUP;
ULEA UR4, UR9, UR4, 0x18 ?trans1;
ULEA UR5, UR9, UR5, 0x18 ?WAIT5_END_GROUP;
LEA R15, R8, UR4, 0x2 ?trans2;
LEA R8, R4.reuse, UR5, 0x2 ?trans1;
STG.E desc[UR10][R12.64+0xc], RZ &rd=0x1 ?trans1;
IADD3 R4, PT, PT, R4, 0x4, RZ ?WAIT3_END_GROUP;
STS [R15], R6 &req={3} &rd=0x1 ?trans4;
STS [R8], RZ &rd=0x1 ?trans4;
STS [R15+0x4], R14 &req={2} &rd=0x1 ?trans4;
STS [R8+0x4], RZ &rd=0x1 ?trans4;
STS [R15+0x8], R16 &req={4} &rd=0x1 ?trans4;
STS [R8+0x8], RZ &rd=0x1 ?trans4;
STS [R15+0xc], R18 &req={5} &rd=0x1 ?trans4;
STS [R8+0xc], RZ &rd=0x1 ?trans2;
@!P1 BRA 0xa10 ?trans5;
ISETP.NE.AND P0, PT, R17, 0x1, PT ?trans1;
LOP3.LUT R6, R5, 0x1, RZ, 0xc0, !PT &req={1,0} ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P1, PT, R6, 0x1, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x900 ?trans6;
LDC.64 R10, c[0x0][0x390] &wr=0x0 ?trans1;
IADD3 R15, PT, PT, R9, R4, RZ ?WAIT7_END_GROUP;
LDC.64 R12, c[0x0][0x388] &wr=0x1 ?trans1;
IMAD.WIDE R10, R15, 0x4, R10 &req={0} ?WAIT5_END_GROUP;
LDG.E R6, desc[UR10][R10.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R12, R4, 0x4, R12 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR10][R12.64], RZ &rd=0x0 ?trans4;
LDG.E R8, desc[UR10][R10.64+0x4] &wr=0x3 ?trans1;
UIADD3 UR4, UPT, UPT, UR6, 0x800, URZ ?trans1;
UIADD3 UR5, UPT, UPT, UR6, 0x9800, URZ ?trans1;
IADD3 R14, PT, PT, R7, R4, RZ ?trans2;
ULEA UR4, UR9, UR4, 0x18 ?trans1;
ULEA UR5, UR9, UR5, 0x18 ?WAIT5_END_GROUP;
LEA R15, R14, UR4, 0x2 ?trans2;
LEA R14, R4.reuse, UR5, 0x2 ?trans1;
STG.E desc[UR10][R12.64+0x4], RZ &rd=0x0 ?trans1;
IADD3 R4, PT, PT, R4, 0x2, RZ ?WAIT3_END_GROUP;
STS [R15], R6 &req={2} &rd=0x0 ?trans4;
STS [R14], RZ &rd=0x0 ?trans4;
STS [R15+0x4], R8 &req={3} &rd=0x0 ?trans4;
STS [R14+0x4], RZ &rd=0x0 ?trans2;
@P1 BRA 0xa10 ?trans5;
LDC.64 R10, c[0x0][0x390] &wr=0x1 ?trans1;
IADD3 R9, PT, PT, R9, R4, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R8, R9, 0x4, R10 &req={1,0} ?trans2;
LDC.64 R10, c[0x0][0x388] &wr=0x0 ?trans4;
LDG.E R8, desc[UR10][R8.64] &wr=0x2 ?trans1;
UIADD3 UR4, UPT, UPT, UR6, 0x800, URZ ?trans1;
UIADD3 UR5, UPT, UPT, UR6, 0x9800, URZ ?trans1;
IADD3 R7, PT, PT, R7, R4, RZ ?trans2;
ULEA UR4, UR9, UR4, 0x18 ?trans1;
ULEA UR5, UR9, UR5, 0x18 ?WAIT5_END_GROUP;
LEA R13, R7, UR4, 0x2 ?trans1;
IMAD.WIDE.U32 R6, R4.reuse, 0x4, R10 &req={0} ?trans1;
LEA R4, R4, UR5, 0x2 ?WAIT4_END_GROUP;
STG.E desc[UR10][R6.64], RZ &rd=0x3 ?trans4;
STS [R13], R8 &req={2} &rd=0x3 ?trans4;
STS [R4], RZ &rd=0x3 ?trans2;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.AND P0, PT, R5, 0x2, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x17b0 ?trans5;
IADD3 R4, PT, PT, R5, -0x2, RZ &req={3} ?trans1;
UMOV UR4, 0x1 ?WAIT4_END_GROUP;
ISETP.GE.U32.AND P0, PT, R4, 0x7, PT ?trans1;
IADD3 R4, PT, PT, R5, -0x1, RZ ?trans1;
IMAD R5, R2, R5, RZ ?WAIT3_END_GROUP;
LOP3.LUT R10, R4, 0x7, RZ, 0xc0, !PT ?WAIT8_END_GROUP;
@!P0 BRA 0x10c0 ?trans5;
UIADD3 UR4, UPT, UPT, UR6, 0x800, URZ ?trans1;
UIADD3 UR6, UPT, UPT, UR6, 0x9800, URZ ?trans1;
LOP3.LUT R6, R4, 0xfffffff8, RZ, 0xc0, !PT &req={1,0} ?trans2;
ULEA UR4, UR9, UR4, 0x18 ?trans1;
ULEA UR6, UR9, UR6, 0x18 ?trans1;
IADD3 R6, PT, PT, -R6, RZ, RZ ?WAIT3_END_GROUP;
UIADD3 UR5, UPT, UPT, UR6, 0x10, URZ ?trans1;
LEA R7, R5, UR4, 0x2 ?trans1;
UMOV UR4, URZ ?WAIT3_END_GROUP;
IADD3 R7, PT, PT, R7, 0x10, RZ ?WAIT7_END_GROUP;
LDS R8, [R3] ?trans1;
BSSY.RECONVERGENT B0, 0xbf0 ?trans3;
LDS R9, [R7+-0xc] &wr=0x0 ?trans2;
FMUL R11, R8, R9 &req={0} ?WAIT7_END_GROUP;
LDS R8, [UR5+-0xc] &wr=0x0 ?trans1;
MOV R12, UR5 ?trans1;
FADD R9, R11, R8 &req={0} ?WAIT5_END_GROUP;
ATOMS.CAST.SPIN P0, [R12+-0xc], R8, R9 &wr=0x0 ?trans2;
@!P0 BRA 0xb90 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDS R8, [R3] ?trans1;
BSSY.RECONVERGENT B0, 0xc90 ?trans3;
LDS R9, [R7+-0x8] &wr=0x0 ?trans2;
FMUL R11, R8, R9 &req={0} ?WAIT7_END_GROUP;
LDS R8, [UR5+-0x8] &wr=0x0 ?trans1;
MOV R12, UR5 ?trans1;
FADD R9, R11, R8 &req={0} ?WAIT5_END_GROUP;
ATOMS.CAST.SPIN P0, [R12+-0x8], R8, R9 &wr=0x0 ?trans2;
@!P0 BRA 0xc30 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDS R8, [R3] ?trans1;
BSSY.RECONVERGENT B0, 0xd30 ?trans3;
LDS R9, [R7+-0x4] &wr=0x0 ?trans2;
FMUL R11, R8, R9 &req={0} ?WAIT7_END_GROUP;
LDS R8, [UR5+-0x4] &wr=0x0 ?trans1;
MOV R12, UR5 ?trans1;
FADD R9, R11, R8 &req={0} ?WAIT5_END_GROUP;
ATOMS.CAST.SPIN P0, [R12+-0x4], R8, R9 &wr=0x0 ?trans2;
@!P0 BRA 0xcd0 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDS R8, [R3] ?trans1;
BSSY.RECONVERGENT B0, 0xdd0 ?trans3;
LDS R9, [R7] &wr=0x0 ?trans2;
FMUL R11, R8, R9 &req={0} ?WAIT7_END_GROUP;
LDS R8, [UR5] &wr=0x0 ?trans1;
MOV R12, UR5 ?trans1;
FADD R9, R11, R8 &req={0} ?WAIT5_END_GROUP;
ATOMS.CAST.SPIN P0, [R12], R8, R9 &wr=0x0 ?trans2;
@!P0 BRA 0xd70 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDS R8, [R3] ?trans1;
BSSY.RECONVERGENT B0, 0xe70 ?trans3;
LDS R9, [R7+0x4] &wr=0x0 ?trans2;
FMUL R11, R8, R9 &req={0} ?WAIT7_END_GROUP;
LDS R8, [UR5+0x4] &wr=0x0 ?trans1;
MOV R12, UR5 ?trans1;
FADD R9, R11, R8 &req={0} ?WAIT5_END_GROUP;
ATOMS.CAST.SPIN P0, [R12+0x4], R8, R9 &wr=0x0 ?trans2;
@!P0 BRA 0xe10 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDS R8, [R3] ?trans1;
BSSY.RECONVERGENT B0, 0xf10 ?trans3;
LDS R9, [R7+0x8] &wr=0x0 ?trans2;
FMUL R11, R8, R9 &req={0} ?WAIT7_END_GROUP;
LDS R8, [UR5+0x8] &wr=0x0 ?trans1;
MOV R12, UR5 ?trans1;
FADD R9, R11, R8 &req={0} ?WAIT5_END_GROUP;
ATOMS.CAST.SPIN P0, [R12+0x8], R8, R9 &wr=0x0 ?trans2;
@!P0 BRA 0xeb0 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDS R8, [R3] ?trans1;
BSSY.RECONVERGENT B0, 0xfb0 ?trans3;
LDS R9, [R7+0xc] &wr=0x0 ?trans2;
FMUL R11, R8, R9 &req={0} ?WAIT7_END_GROUP;
LDS R8, [UR5+0xc] &wr=0x0 ?trans1;
MOV R12, UR5 ?trans1;
FADD R9, R11, R8 &req={0} ?WAIT5_END_GROUP;
ATOMS.CAST.SPIN P0, [R12+0xc], R8, R9 &wr=0x0 ?trans2;
@!P0 BRA 0xf50 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDS R8, [R3] ?trans1;
BSSY.RECONVERGENT B0, 0x1050 ?trans3;
LDS R9, [R7+0x10] &wr=0x0 ?trans2;
FMUL R11, R8, R9 &req={0} ?WAIT7_END_GROUP;
LDS R8, [UR5+0x10] &wr=0x0 ?trans1;
MOV R12, UR5 ?trans1;
FADD R9, R11, R8 &req={0} ?WAIT5_END_GROUP;
ATOMS.CAST.SPIN P0, [R12+0x10], R8, R9 &wr=0x0 ?trans2;
@!P0 BRA 0xff0 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R6, PT, PT, R6, 0x8, RZ ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
UIADD3 UR5, UPT, UPT, UR5, 0x20, URZ ?trans1;
IADD3 R7, PT, PT, R7, 0x20, RZ ?trans2;
ISETP.NE.AND P0, PT, R6, RZ, PT ?WAIT13_END_GROUP;
@P0 BRA 0xb50 ?trans5;
UIADD3 UR4, UPT, UPT, UR4, 0x1, URZ ?WAIT12_END_GROUP;
ISETP.NE.AND P0, PT, R10, RZ, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x17b0 ?trans5;
ISETP.GE.U32.AND P0, PT, R10, 0x4, PT ?trans1;
LOP3.LUT R11, R4, 0x3, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x1430 ?trans5;
S2UR UR7, SR_CgaCtaId &wr=0x2 ?trans1;
UMOV UR5, 0x400 ?trans1;
IADD3 R6, PT, PT, R5, UR4, RZ &req={1,0} ?trans1;
UIADD3 UR6, UPT, UPT, UR5, 0x800, URZ ?trans1;
UIADD3 UR5, UPT, UPT, UR5, 0x9800, URZ ?trans1;
BSSY.RECONVERGENT B0, 0x1240 ?trans2;
ULEA UR6, UR7, UR6, 0x18 &req={2} ?trans1;
ULEA UR5, UR7, UR5, 0x18 ?WAIT4_END_GROUP;
ULEA UR5, UR4, UR5, 0x2 ?trans1;
LEA R8, R6, UR6, 0x2 ?trans2;
LDS R6, [R3] ?trans4;
LDS R7, [R8] &wr=0x0 ?trans2;
FMUL R9, R6, R7 &req={0} ?WAIT7_END_GROUP;
LDS R6, [UR5] &wr=0x0 ?trans1;
MOV R10, UR5 ?trans1;
FADD R7, R9, R6 &req={0} ?WAIT5_END_GROUP;
ATOMS.CAST.SPIN P0, [R10], R6, R7 &wr=0x0 ?trans2;
@!P0 BRA 0x11e0 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDS R6, [R3] ?trans1;
BSSY.RECONVERGENT B0, 0x12e0 ?trans3;
LDS R7, [R8+0x4] &wr=0x0 ?trans2;
FMUL R9, R6, R7 &req={0} ?WAIT7_END_GROUP;
LDS R6, [UR5+0x4] &wr=0x0 ?trans1;
MOV R10, UR5 ?trans1;
FADD R7, R9, R6 &req={0} ?WAIT5_END_GROUP;
ATOMS.CAST.SPIN P0, [R10+0x4], R6, R7 &wr=0x0 ?trans2;
@!P0 BRA 0x1280 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDS R6, [R3] ?trans1;
BSSY.RECONVERGENT B0, 0x1380 ?trans3;
LDS R7, [R8+0x8] &wr=0x0 ?trans2;
FMUL R9, R6, R7 &req={0} ?WAIT7_END_GROUP;
LDS R6, [UR5+0x8] &wr=0x0 ?trans1;
MOV R10, UR5 ?trans1;
FADD R7, R9, R6 &req={0} ?WAIT5_END_GROUP;
ATOMS.CAST.SPIN P0, [R10+0x8], R6, R7 &wr=0x0 ?trans2;
@!P0 BRA 0x1320 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDS R7, [R8+0xc] ?trans1;
BSSY.RECONVERGENT B0, 0x1420 ?trans3;
LDS R6, [R3] &wr=0x0 ?trans2;
FMUL R9, R6, R7 &req={0} ?WAIT7_END_GROUP;
LDS R6, [UR5+0xc] &wr=0x0 ?trans1;
MOV R8, UR5 ?trans1;
FADD R7, R9, R6 &req={0} ?WAIT5_END_GROUP;
ATOMS.CAST.SPIN P0, [R8+0xc], R6, R7 &wr=0x0 ?trans2;
@!P0 BRA 0x13c0 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?WAIT12_END_GROUP;
ISETP.NE.AND P0, PT, R11, RZ, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x17b0 ?trans5;
ISETP.NE.AND P0, PT, R11, 0x1, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1650 ?trans5;
S2UR UR7, SR_CgaCtaId &wr=0x2 ?trans1;
UMOV UR5, 0x400 ?trans1;
IADD3 R6, PT, PT, R5, UR4, RZ &req={1,0} ?trans1;
UIADD3 UR6, UPT, UPT, UR5, 0x800, URZ ?trans1;
UIADD3 UR5, UPT, UPT, UR5, 0x9800, URZ ?trans1;
BSSY.RECONVERGENT B0, 0x15a0 ?trans2;
ULEA UR6, UR7, UR6, 0x18 &req={2} ?trans1;
ULEA UR5, UR7, UR5, 0x18 ?WAIT4_END_GROUP;
ULEA UR5, UR4, UR5, 0x2 ?trans1;
LEA R8, R6, UR6, 0x2 ?trans2;
LDS R6, [R3] ?trans4;
LDS R7, [R8] &wr=0x0 ?trans2;
FMUL R9, R6, R7 &req={0} ?WAIT7_END_GROUP;
LDS R6, [UR5] &wr=0x0 ?trans1;
MOV R10, UR5 ?trans1;
FADD R7, R9, R6 &req={0} ?WAIT5_END_GROUP;
ATOMS.CAST.SPIN P0, [R10], R6, R7 &wr=0x0 ?trans2;
@!P0 BRA 0x1540 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDS R7, [R8+0x4] ?trans1;
BSSY.RECONVERGENT B0, 0x1640 ?trans3;
LDS R6, [R3] &wr=0x0 ?trans2;
FMUL R9, R6, R7 &req={0} ?WAIT7_END_GROUP;
LDS R6, [UR5+0x4] &wr=0x0 ?trans1;
MOV R8, UR5 ?trans1;
FADD R7, R9, R6 &req={0} ?WAIT5_END_GROUP;
ATOMS.CAST.SPIN P0, [R8+0x4], R6, R7 &wr=0x0 ?trans2;
@!P0 BRA 0x15e0 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
UIADD3 UR4, UPT, UPT, UR4, 0x2, URZ ?WAIT12_END_GROUP;
LOP3.LUT R4, R4, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P0, PT, R4, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x17b0 ?trans5;
S2UR UR7, SR_CgaCtaId &wr=0x2 ?trans1;
UMOV UR5, 0x400 ?trans1;
IADD3 R5, PT, PT, R5, UR4, RZ ?trans1;
UIADD3 UR6, UPT, UPT, UR5, 0x800, URZ ?trans1;
LDS R3, [R3] &req={0} ?trans1;
UIADD3 UR5, UPT, UPT, UR5, 0x9800, URZ ?trans1;
BSSY.RECONVERGENT B0, 0x17b0 ?trans1;
ULEA UR6, UR7, UR6, 0x18 &req={2} ?trans2;
ULEA UR5, UR7, UR5, 0x18 ?WAIT4_END_GROUP;
ULEA UR5, UR4, UR5, 0x2 ?trans1;
LEA R5, R5, UR6, 0x2 ?WAIT5_END_GROUP;
LDS R4, [R5] &wr=0x0 ?trans2;
FMUL R7, R3, R4 &req={0} ?WAIT7_END_GROUP;
LDS R4, [UR5] &wr=0x0 ?trans1;
MOV R3, UR5 ?trans1;
FADD R5, R7, R4 &req={0} ?WAIT5_END_GROUP;
ATOMS.CAST.SPIN P0, [R3], R4, R5 &wr=0x0 ?trans2;
@!P0 BRA 0x1750 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDC R3, c[0x0][0x39c] &req={0} &wr=0x0 ?trans8;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.AND P0, PT, R3, 0x2, PT &req={0} ?WAIT5_END_GROUP;
ISETP.NE.OR P0, PT, R2, RZ, !P0 ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
IADD3 R2, PT, PT, R3, -0x2, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R2, 0x7, PT ?trans1;
IADD3 R2, PT, PT, R3, -0x1, RZ ?trans1;
HFMA2 R3, -RZ, RZ, 0, 5.9604644775390625e-08 ?WAIT3_END_GROUP;
LOP3.LUT R26, R2, 0x7, RZ, 0xc0, !PT ?WAIT8_END_GROUP;
@!P0 BRA 0x1b60 ?trans5;
S2UR UR7, SR_CgaCtaId &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x388] &wr=0x2 ?trans1;
LOP3.LUT R3, R2, 0xfffffff8, RZ, 0xc0, !PT ?trans1;
ISETP.NE.AND P0, PT, R0.reuse, RZ, PT ?trans1;
UMOV UR6, 0x400 ?trans1;
ISETP.NE.AND P1, PT, R0, RZ, PT ?trans1;
UIADD3 UR6, UPT, UPT, UR6, 0x9800, URZ ?trans1;
MOV R24, RZ ?trans1;
IADD3 R3, PT, PT, -R3, RZ, RZ ?trans1;
UIADD3.64 UR4, UPT, UPT, UR4, 0x10, URZ &req={2} ?trans1;
ULEA UR6, UR7, UR6, 0x18 &req={0} ?WAIT5_END_GROUP;
MOV.64 R12, UR4 &req={3,1} ?trans2;
UIADD3 UR6, UPT, UPT, UR6, 0x10, URZ ?WAIT12_END_GROUP;
LDS.128 R8, [UR6+-0x10] &wr=0x0 ?trans1;
@!P0 LDC.64 R14, c[0x0][0x388] &wr=0x1 ?trans3;
LDS.128 R4, [UR6] &wr=0x2 ?trans4;
LDS R25, [UR6+0x10] &wr=0x3 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR10][R12.64+-0xc], R9 &req={0} &rd=0x0 ?trans4;
@!P0 STG.E desc[UR10][R14.64], RZ &req={1} &rd=0x1 ?trans1;
PLOP3.LUT P0, PT, P1, PT, PT, 0x80, 0x8 ?WAIT3_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR10][R12.64+-0x8], R10 ?trans10;
@!P0 LDC.64 R16, c[0x0][0x388] &wr=0x4 ?trans8;
@!P0 LDC.64 R18, c[0x0][0x388] &wr=0x5 ?trans8;
@!P0 LDC.64 R20, c[0x0][0x388] &wr=0x2 ?trans1;
@!P0 STG.E desc[UR10][R16.64], RZ &req={4} ?trans7;
@!P0 LDC.64 R8, c[0x0][0x388] &req={0} &wr=0x0 ?trans8;
@!P0 LDC.64 R14, c[0x0][0x388] &req={1} &wr=0x1 ?trans1;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR10][R12.64+-0x4], R11 &rd=0x4 ?trans7;
@!P0 LDC.64 R22, c[0x0][0x388] &wr=0x3 ?trans1;
@!P0 STG.E desc[UR10][R18.64], RZ &req={5} ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR10][R12.64], R4 &req={2} ?trans4;
@!P0 STG.E desc[UR10][R20.64], RZ ?trans1;
@!P0 LDC.64 R10, c[0x0][0x388] &req={4} &wr=0x2 ?trans3;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR10][R12.64+0x4], R5 ?trans4;
@!P0 STG.E desc[UR10][R8.64], RZ &req={0} ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR10][R12.64+0x8], R6 ?trans4;
@!P0 STG.E desc[UR10][R14.64], RZ &req={1} ?trans1;
IADD3 R3, PT, PT, R3, 0x8, RZ ?WAIT3_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR10][R12.64+0xc], R7 ?trans4;
@!P0 STG.E desc[UR10][R22.64], RZ &req={3} ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR10][R12.64+0x10], R25 &rd=0x0 ?trans4;
@!P0 STG.E desc[UR10][R10.64], RZ &req={2} &rd=0x1 ?trans1;
ISETP.NE.AND P2, PT, R3, RZ, PT ?trans1;
UIADD3 UR6, UPT, UPT, UR6, 0x20, URZ ?trans1;
IADD3 R24, PT, PT, R24, 0x8, RZ ?trans1;
IADD.64 R12, R12, 0x20 &req={0} ?WAIT10_END_GROUP;
@P2 BRA 0x1930 &req={1} ?trans5;
IADD3 R3, PT, PT, R24, 0x1, RZ ?WAIT7_END_GROUP;
ISETP.NE.AND P0, PT, R26, RZ, PT ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
ISETP.GE.U32.AND P0, PT, R26, 0x4, PT ?trans1;
LOP3.LUT R14, R2, 0x3, RZ, 0xc0, !PT &req={1} ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R14, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x1d50 ?trans6;
S2R R5, SR_CgaCtaId &wr=0x0 ?trans1;
MOV R4, 0x400 &req={3} ?trans1;
ISETP.NE.AND P0, PT, R0, RZ, PT ?WAIT4_END_GROUP;
IADD3 R4, PT, PT, R4, 0x9800, RZ ?WAIT9_END_GROUP;
@!P0 LDC.64 R6, c[0x0][0x388] &wr=0x1 ?trans8;
@!P0 LDC.64 R8, c[0x0][0x388] &wr=0x2 ?trans8;
@!P0 LDC.64 R10, c[0x0][0x388] &wr=0x3 ?trans1;
LEA R4, R5, R4, 0x18 &req={0} ?WAIT5_END_GROUP;
IMAD R12, R3.reuse, 0x4, R4 ?trans2;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans3;
LDS R15, [R12] &wr=0x4 ?trans4;
LDS R17, [R12+0x4] &wr=0x5 ?trans4;
LDS R19, [R12+0x8] &wr=0x1 ?trans4;
LDS R21, [R12+0xc] &rd=0x0 &wr=0x1 ?trans2;
IMAD.WIDE.U32 R4, R3.reuse, 0x4, R4 &req={0} ?trans1;
@!P0 LDC.64 R12, c[0x0][0x388] &wr=0x0 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR10][R4.64], R15 &req={4} &rd=0x4 ?trans4;
@!P0 STG.E desc[UR10][R6.64], RZ &req={1} &rd=0x4 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR10][R4.64+0x4], R17 &req={5} &rd=0x4 ?trans4;
@!P0 STG.E desc[UR10][R8.64], RZ &req={2} &rd=0x4 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR10][R4.64+0x8], R19 &rd=0x4 ?trans4;
@!P0 STG.E desc[UR10][R10.64], RZ &req={3} &rd=0x4 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR10][R4.64+0xc], R21 &rd=0x4 ?trans1;
IADD3 R3, PT, PT, R3, 0x4, RZ ?WAIT3_END_GROUP;
@!P0 STG.E desc[UR10][R12.64], RZ &req={0} &rd=0x4 ?trans4;
@!P1 EXIT ?trans5;
ISETP.NE.AND P0, PT, R14, 0x1, PT ?trans1;
LOP3.LUT R2, R2, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P1, PT, R2, 0x1, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x1eb0 ?trans6;
S2R R5, SR_CgaCtaId &req={4} &wr=0x0 ?trans1;
MOV R2, 0x400 ?trans1;
ISETP.NE.AND P0, PT, R0, RZ, PT ?WAIT4_END_GROUP;
IADD3 R2, PT, PT, R2, 0x9800, RZ ?WAIT9_END_GROUP;
@!P0 LDC.64 R6, c[0x0][0x388] &req={3} &wr=0x1 ?trans1;
LEA R2, R5, R2, 0x18 &req={0} ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
IMAD R2, R3, 0x4, R2 ?WAIT5_END_GROUP;
LDS R11, [R2] &wr=0x2 ?trans4;
LDS R13, [R2+0x4] &wr=0x3 ?trans1;
@!P0 LDC.64 R8, c[0x0][0x388] &wr=0x4 ?trans1;
IMAD.WIDE.U32 R4, R3.reuse, 0x4, R4 &req={0} ?trans1;
IADD3 R3, PT, PT, R3, 0x2, RZ ?WAIT4_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR10][R4.64], R11 &req={2} &rd=0x0 ?trans4;
@!P0 STG.E desc[UR10][R6.64], RZ &req={1} &rd=0x0 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR10][R4.64+0x4], R13 &req={3} &rd=0x0 ?trans4;
@!P0 STG.E desc[UR10][R8.64], RZ &req={4} &rd=0x0 ?trans2;
@P1 EXIT ?trans5;
S2R R5, SR_CgaCtaId &req={4,0} &wr=0x0 ?trans1;
MOV R2, 0x400 ?WAIT5_END_GROUP;
IADD3 R2, PT, PT, R2, 0x9800, RZ ?WAIT4_END_GROUP;
LEA R2, R5, R2, 0x18 &req={0} ?trans2;
LDC.64 R4, c[0x0][0x388] &req={3} &wr=0x0 ?trans3;
IMAD R6, R3, 0x4, R2 ?WAIT5_END_GROUP;
LDS R7, [R6] &wr=0x1 ?trans1;
ISETP.NE.AND P0, PT, R0, RZ, PT ?trans1;
IMAD.WIDE.U32 R2, R3, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR10][R2.64], R7 &req={1} &rd=0x0 ?trans7;
@P0 EXIT ?trans5;
LDC.64 R2, c[0x0][0x388] &req={0} &wr=0x0 ?trans2;
STG.E desc[UR10][R2.64], RZ &req={0} ?trans1;
EXIT ?trans5;
BRA 0x1fa0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: kernel_bpnn_layerforward(float*, float*, float*, int, int)
_Z24kernel_bpnn_layerforwardPfS_S_ii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x2c
s_load_b64 s[2:3], s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
v_cmp_gt_i32_e32 vcc_lo, s2, v1
s_and_saveexec_b32 s2, vcc_lo
s_cbranch_execz .LBB0_19
s_load_b128 s[4:7], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
v_mul_lo_u32 v4, v0, s3
v_lshlrev_b32_e32 v5, 2, v0
s_cmp_lt_i32 s3, 1
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
ds_store_b32 v5, v2 offset:36864
s_cbranch_scc1 .LBB0_4
s_load_b64 s[0:1], s[0:1], 0x10
v_mul_lo_u32 v2, v1, s3
v_dual_mov_b32 v7, 0 :: v_dual_lshlrev_b32 v6, 2, v4
s_mov_b32 s2, s3
s_mov_b32 s4, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
s_mov_b64 s[0:1], s[6:7]
.LBB0_3:
global_load_b32 v8, v[2:3], off
v_add_co_u32 v2, vcc_lo, v2, 4
v_dual_mov_b32 v10, s4 :: v_dual_add_nc_u32 v9, s4, v6
s_add_i32 s2, s2, -1
s_add_i32 s4, s4, 4
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
global_store_b32 v7, v7, s[0:1]
s_add_u32 s0, s0, 4
s_addc_u32 s1, s1, 0
s_cmp_lg_u32 s2, 0
ds_store_b32 v10, v7 offset:38912
s_waitcnt vmcnt(0)
ds_store_b32 v9, v8
s_cbranch_scc1 .LBB0_3
.LBB0_4:
s_cmp_gt_i32 s3, 1
s_waitcnt lgkmcnt(0)
s_waitcnt_vscnt null, 0x0
s_cselect_b32 s0, -1, 0
s_cmp_lt_i32 s3, 2
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_11
v_or_b32_e32 v2, 0x9000, v5
s_mov_b32 s1, 1
ds_load_b32 v2, v2
.LBB0_6:
v_add_lshl_u32 v3, s1, v4, 2
s_mov_b32 s2, exec_lo
ds_load_b32 v3, v3
s_waitcnt lgkmcnt(0)
v_mul_f32_e32 v5, v2, v3
v_bfrev_b32_e32 v3, 1
.LBB0_7:
s_ctz_i32_b32 s4, s2
s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
v_readlane_b32 s5, v5, s4
s_lshl_b32 s4, 1, s4
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_not1_b32 s2, s2, s4
s_cmp_lg_u32 s2, 0
s_delay_alu instid0(VALU_DEP_1)
v_add_f32_e32 v3, s5, v3
s_cbranch_scc1 .LBB0_7
v_mbcnt_lo_u32_b32 v5, exec_lo, 0
s_mov_b32 s2, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_eq_u32_e32 0, v5
s_xor_b32 s2, exec_lo, s2
s_cbranch_execz .LBB0_10
s_lshl_b32 s4, s1, 2
s_delay_alu instid0(SALU_CYCLE_1)
v_mov_b32_e32 v5, s4
ds_add_f32 v5, v3 offset:38912
.LBB0_10:
s_or_b32 exec_lo, exec_lo, s2
s_add_i32 s1, s1, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lg_u32 s1, s3
s_cbranch_scc1 .LBB0_6
.LBB0_11:
v_cmp_eq_u32_e32 vcc_lo, 0, v0
s_mov_b32 s5, 0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_b32 s0, vcc_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 exec_lo, exec_lo, s0
s_cbranch_execz .LBB0_19
v_cmp_eq_u32_e32 vcc_lo, 0, v1
v_mov_b32_e32 v2, 0
s_mov_b32 s4, 1
.LBB0_13:
s_mov_b32 s2, exec_lo
s_mov_b32 s1, exec_lo
v_mbcnt_lo_u32_b32 v0, s2, 0
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB0_16
s_lshl_b64 s[8:9], s[4:5], 2
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s8, s6, s8
s_addc_u32 s9, s7, s9
s_lshl_b32 s0, s4, 2
global_load_b32 v1, v2, s[8:9]
v_mov_b32_e32 v0, s0
s_bcnt1_i32_b32 s0, s2
s_mov_b32 s2, 0
v_cvt_f32_ubyte0_e32 v3, s0
ds_load_b32 v0, v0 offset:38912
s_waitcnt lgkmcnt(0)
v_mul_f32_e32 v3, v0, v3
.LBB0_15:
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_add_f32_e32 v0, v1, v3
global_atomic_cmpswap_b32 v0, v2, v[0:1], s[8:9] glc
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e64 s0, v0, v1
v_mov_b32_e32 v1, v0
s_or_b32 s2, s0, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB0_15
.LBB0_16:
s_or_b32 exec_lo, exec_lo, s1
s_and_saveexec_b32 s0, vcc_lo
s_cbranch_execz .LBB0_18
global_store_b32 v2, v2, s[6:7]
.LBB0_18:
s_or_b32 exec_lo, exec_lo, s0
s_add_i32 s4, s4, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lg_u32 s4, s3
s_cbranch_scc1 .LBB0_13
.LBB0_19:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| kernel_bpnn_layerforward | 12,310 | 2,440 | stackv2-00000-of-00015 |
// Demangled: kernel_squash(float*, int)
Function : _Z13kernel_squashPfi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_TID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD R5, R0, UR4, R5 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR5, PT &req={2} ?WAIT5_END_GROUP;
ISETP.LT.OR P0, PT, R5, 0x1, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE.U32 R2, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
HFMA2 R5, -RZ, RZ, 0.96630859375, -0.0022525787353515625 ?trans1;
MOV R7, 0x437c0000 ?trans1;
BSSY.RECONVERGENT B0, 0x3f0 ?trans3;
FFMA.SAT R4, R0, -R5, 0.5 &req={2} ?WAIT4_END_GROUP;
FFMA.RM R4, R4, R7, 12582913 ?WAIT4_END_GROUP;
FADD R5, R4.reuse, -12583039 ?trans1;
IMAD.SHL.U32 R4, R4, 0x800000, RZ ?WAIT3_END_GROUP;
FFMA R5, R0, -1.4426950216293334961, -R5 ?WAIT4_END_GROUP;
FFMA R0, R0, -1.925963033500011079e-08, R5 ?WAIT4_END_GROUP;
MUFU.EX2 R5, R0 &wr=0x0 ?trans2;
FMUL R12, R4, R5 &req={0} ?WAIT4_END_GROUP;
F2F.F64.F32 R4, R12 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R4, R4, 1 &req={0} &wr=0x0 ?trans2;
IADD3 R6, PT, PT, R5, 0x300402, RZ &req={0} ?WAIT5_END_GROUP;
FSETP.GEU.AND P0, PT, |R6|, 5.8789094863358348022e-39, PT ?trans1;
MUFU.RCP64H R7, R5 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT11_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, -R4, R6, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R8, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R6, R8, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, -R4, R8, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R10, R8 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0x3e0 &req={1,0} ?trans5;
LOP3.LUT R0, R5, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R8, PT, PT, R0, -0x100000, RZ ?trans1;
MOV R0, 0x3e0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x420 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
F2F.F32.F64 R9, R8 &wr=0x0 ?trans2;
STG.E desc[UR4][R2.64], R9 &req={0} ?trans1;
EXIT ?trans5;
DSETP.GTU.AND P0, PT, |R4|, +INF , PT &wr=0x0 ?trans1;
BSSY.RECONVERGENT B1, 0x9f0 ?trans4;
@P0 BRA 0x9c0 &req={0} ?trans5;
LOP3.LUT R9, R5, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R6, PT, PT, R9, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R6, 0x7fefffff, PT ?WAIT13_END_GROUP;
@P0 LOP3.LUT R7, R5, 0x7ff00000, RZ, 0x3c, !PT ?trans1;
@P0 MOV R6, RZ ?trans1;
@P0 BRA 0x9e0 ?trans6;
ISETP.GE.U32.AND P0, PT, R9, 0x1000001, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x7a0 ?trans5;
IADD3 R7, PT, PT, R5, -0x3fe00000, RZ ?trans1;
MOV R6, R4 ?WAIT3_END_GROUP;
MUFU.RCP64H R9, R7 &wr=0x0 ?trans3;
DFMA R10, -R6, R8, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R10, R10, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R8, R10, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, -R6, R10, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R10, R8, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R8, 2.2250738585072013831e-308 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, -R4, R8, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R4, R4, R4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R8, R4, R8 &req={0} &rd=0x0 &wr=0x1 ?trans2;
BRA 0x9e0 &req={1,0} ?trans5;
DMUL R4, R4, 8.11296384146066816958e+31 &wr=0x0 ?trans1;
MOV R6, R8 ?trans1;
MUFU.RCP64H R7, R5 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, -R4, R6, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R8, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R6, R8, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, -R4, R8, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R8, R6, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R6, R6, 8.11296384146066816958e+31 &req={0} &wr=0x0 ?trans2;
BRA 0x9e0 &req={0} ?trans5;
LOP3.LUT R7, R5, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R6, R4 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R4, R0 ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?trans1;
MOV R8, R6 ?trans1;
MOV R9, R7 ?trans2;
RET.REL.NODEC R4 0x0 ?trans5;
BRA 0xa40;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: kernel_squash(float*, int)
_Z13kernel_squashPfi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b32 s3, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_cmp_lt_i32_e32 vcc_lo, 0, v1
v_cmp_gt_i32_e64 s2, s3, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, vcc_lo, s2
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB2_2
s_load_b64 s[0:1], s[0:1], 0x0
v_mov_b32_e32 v2, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b32 v2, v[0:1], off
s_waitcnt vmcnt(0)
v_mul_f32_e32 v3, 0xbfb8aa3b, v2
v_cmp_nlt_f32_e32 vcc_lo, 0x42ce8ed0, v2
v_fma_f32 v4, 0xbfb8aa3b, v2, -v3
v_rndne_f32_e32 v5, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_fmamk_f32 v4, v2, 0xb2a5705f, v4 :: v_dual_sub_f32 v3, v3, v5
v_add_f32_e32 v3, v3, v4
v_cvt_i32_f32_e32 v4, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_exp_f32_e32 v3, v3
s_waitcnt_depctr 0xfff
v_ldexp_f32 v3, v3, v4
v_cndmask_b32_e32 v3, 0, v3, vcc_lo
v_cmp_ngt_f32_e32 vcc_lo, 0xc2b17218, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v2, 0x7f800000, v3, vcc_lo
v_cvt_f64_f32_e32 v[2:3], v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[2:3], v[2:3], 1.0
v_div_scale_f64 v[4:5], null, v[2:3], v[2:3], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f64_e32 v[6:7], v[4:5]
s_waitcnt_depctr 0xfff
v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
v_div_scale_f64 v[8:9], vcc_lo, 1.0, v[2:3], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[10:11], v[8:9], v[6:7]
v_fma_f64 v[4:5], -v[4:5], v[10:11], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fmas_f64 v[4:5], v[4:5], v[6:7], v[10:11]
v_div_fixup_f64 v[2:3], v[4:5], v[2:3], 1.0
s_delay_alu instid0(VALU_DEP_1)
v_cvt_f32_f64_e32 v2, v[2:3]
global_store_b32 v[0:1], v2, off
.LBB2_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| kernel_squash | 2,971 | 1,478 | stackv2-00000-of-00015 |
// Demangled: fun(int)
Function : _Z3funi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
LDCU UR36, c[0x0][0x380] &wr=0x1 ?trans1;
MOV R18, 0x8 ?WAIT6_END_GROUP;
LDC.64 R2, c[0x4][R18] &rd=0x2 &wr=0x3 ?trans1;
UIMAD.WIDE UR36, UR36, 0x8, URZ &req={1} ?WAIT6_END_GROUP;
MOV.64 R6, UR36 ?trans2;
MOV.64 R4, UR36 ?WAIT4_END_GROUP;
MOV R5, R7 &req={2} ?WAIT7_END_GROUP;
LEPC R20, 0xa0 ?WAIT7_END_GROUP;
CALL.ABS.NOINC R2 &req={3,0} ?trans5;
MOV.64 R6, UR36 ?trans2;
MOV.64 R8, UR36 ?trans2;
LDC.64 R2, c[0x4][R18] &rd=0x0 &wr=0x1 ?trans1;
MOV R16, R4 ?trans1;
MOV R17, R5 ?trans1;
MOV R4, R6 ?trans1;
MOV R5, R9 ?WAIT7_END_GROUP;
LEPC R20, 0x130 ?WAIT7_END_GROUP;
CALL.ABS.NOINC R2 &req={1,0} ?trans5;
ISETP.NE.S64.AND P0, PT, R16, RZ, PT ?WAIT14_END_GROUP;
@!P0 BRA 0x210 ?trans5;
LDCU UR8, c[0x0][0x380] &wr=0x0 ?trans1;
MOV.64 R2, 0x400921fb4d12d84a ?trans2;
MOV.64 R6, 0x4005bf0a87427f01 ?trans2;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans1;
USHF.R.S32.HI UR5, URZ, 0x1f, UR8 &req={0} ?trans1;
USHF.L.U32 UR4, UR8, 0x3, URZ ?WAIT3_END_GROUP;
USHF.L.U64.HI UR5, UR8, 0x3, UR5 ?WAIT6_END_GROUP;
IADD.64 R16, R16, UR4 ?trans2;
IADD.64 R4, R4, UR4 ?WAIT4_END_GROUP;
ST.E.64 desc[UR6][R16.64+-0x8], R2 &req={1} ?trans4;
ST.E.64 desc[UR6][R4.64+-0x8], R6 ?trans1;
EXIT ?trans5;
LDCU.64 UR4, c[0x4][0x18] &wr=0x0 ?trans1;
MOV R2, 0x0 ?trans1;
CS2R R6, SRZ ?WAIT5_END_GROUP;
LDC.64 R2, c[0x4][R2] &wr=0x1 ?trans1;
MOV R4, UR4 &req={0} ?trans1;
MOV R5, UR5 ?WAIT7_END_GROUP;
LEPC R20, 0x290 ?WAIT7_END_GROUP;
CALL.ABS.NOINC R2 &req={1} ?trans5;
EXIT ?trans5;
BRA 0x2a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: fun(int)
_Z3funi:
s_load_b32 s46, s[0:1], 0x0
s_mov_b32 s3, 0
s_mov_b32 s32, 0
s_waitcnt lgkmcnt(0)
s_mov_b32 s2, s46
s_ashr_i32 s47, s46, 31
s_lshl_b64 s[2:3], s[2:3], 3
v_cmp_gt_i64_e64 s5, s[46:47], -1
v_cmp_gt_u64_e64 s4, s[2:3], 1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
s_and_b32 s4, s4, exec_lo
s_cselect_b32 s3, s3, 0
s_cselect_b32 s2, s2, 1
s_and_b32 s4, s5, exec_lo
s_cselect_b32 s33, s2, -1
s_cselect_b32 s45, s3, -1
s_delay_alu instid0(SALU_CYCLE_1)
v_dual_mov_b32 v0, s33 :: v_dual_mov_b32 v1, s45
s_add_u32 s8, s0, 8
s_addc_u32 s9, s1, 0
s_getpc_b64 s[48:49]
s_add_u32 s48, s48, __ockl_dm_alloc@rel32@lo+4
s_addc_u32 s49, s49, __ockl_dm_alloc@rel32@hi+12
s_delay_alu instid0(SALU_CYCLE_1)
s_swappc_b64 s[30:31], s[48:49]
v_dual_mov_b32 v41, v0 :: v_dual_mov_b32 v42, v1
v_dual_mov_b32 v0, s33 :: v_dual_mov_b32 v1, s45
s_swappc_b64 s[30:31], s[48:49]
s_lshl_b64 s[0:1], s[46:47], 3
v_mov_b32_e32 v4, 0x4d12d84a
v_add_co_u32 v2, vcc_lo, v41, s0
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v42, vcc_lo
v_add_co_u32 v0, vcc_lo, v0, s0
v_mov_b32_e32 v5, 0x400921fb
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
v_mov_b32_e32 v6, 0x87427f01
v_mov_b32_e32 v7, 0x4005bf0a
global_store_b64 v[2:3], v[4:5], off offset:-8
global_store_b64 v[0:1], v[6:7], off offset:-8
s_endpgm
| fun | 919 | 789 | stackv2-00000-of-00015 |
// Demangled: laplacian(int, double*, double*)
Function : _Z9laplacianiPdS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R5, c[0x0][0x380] &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x530 ?trans6;
S2UR UR4, SR_CTAID.X &wr=0x2 ?trans8;
LDC R7, c[0x0][0x360] &wr=0x2 ?trans1;
IABS R9, R5 &req={1} ?WAIT4_END_GROUP;
I2F.RP R4, R9 &wr=0x1 ?trans1;
IMAD R0, R7, UR4, R0 &req={2} ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans1;
MUFU.RCP R4, R4 &req={1} &wr=0x1 ?trans3;
IABS R8, R0 ?trans2;
IADD3 R2, PT, PT, R4, 0xffffffe, RZ &req={1} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R3, R2 &rd=0x1 &wr=0x3 ?trans2;
HFMA2 R2, -RZ, RZ, 0, 0 &req={1} ?trans1;
IADD3 R6, PT, PT, RZ, -R3, RZ &req={3} ?WAIT5_END_GROUP;
IMAD R7, R6, R9, RZ ?trans1;
MOV R6, R8 ?WAIT3_END_GROUP;
IMAD.HI.U32 R3, R3, R7, R2 ?WAIT4_END_GROUP;
IMAD R7, R5, R5, RZ ?trans2;
IMAD.HI.U32 R4, R3, R6, RZ ?WAIT3_END_GROUP;
ISETP.GE.AND P2, PT, R0, R7, PT ?trans2;
IADD3 R3, PT, PT, -R4, RZ, RZ ?WAIT5_END_GROUP;
IMAD R2, R9, R3, R6 ?trans1;
LOP3.LUT R6, R0, R5, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P1, PT, R9, R2, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R2, PT, PT, R2, -R9.reuse, RZ ?trans2;
@!P1 IADD3 R4, PT, PT, R4, 0x1, RZ ?trans1;
ISETP.GE.AND P1, PT, R6, RZ, PT ?trans2;
ISETP.GE.U32.AND P0, PT, R2, R9, PT ?trans2;
LDC.64 R2, c[0x0][0x390] &wr=0x1 ?trans11;
@P0 IADD3 R4, PT, PT, R4, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R5, RZ, PT ?WAIT4_END_GROUP;
MOV R9, R4 ?WAIT5_END_GROUP;
@!P1 IADD3 R9, PT, PT, -R9, RZ, RZ ?trans1;
IMAD.WIDE R2, R0, 0x8, R2 &req={1} ?WAIT3_END_GROUP;
@!P0 LOP3.LUT R9, RZ, R5, RZ, 0x33, !PT ?trans1;
@P2 BRA 0x520 &req={2,0} ?trans6;
IADD3 R4, PT, PT, -R9, RZ, RZ ?WAIT5_END_GROUP;
IMAD R11, R5, R4, R0 ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R11, RZ, PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R9, RZ, P0 ?WAIT13_END_GROUP;
@!P0 MOV.64 R6, 0x3ff0000000000000 ?WAIT6_END_GROUP;
@!P0 STG.E.64 desc[UR4][R2.64], R6 &rd=0x0 ?trans1;
@!P0 BRA 0x520 ?trans5;
LDC.64 R16, c[0x0][0x388] &wr=0x1 ?trans1;
IADD3 R4, PT, PT, R5, -0x1, RZ ?trans1;
ISETP.GE.AND P2, PT, R9, 0x1, PT ?trans1;
ISETP.GE.AND P0, PT, R11, 0x1, PT ?trans1;
IADD3 R13, PT, PT, R0, -0x1, RZ ?trans1;
MOV.64 R6, RZ &req={0} ?trans2;
ISETP.GE.AND P3, PT, R9, R4.reuse, PT ?trans1;
ISETP.GE.AND P1, PT, R11, R4, PT ?trans1;
MOV.64 R8, RZ ?trans2;
MOV.64 R10, RZ ?WAIT2_END_GROUP;
MOV.64 R14, RZ ?WAIT3_END_GROUP;
@P2 IADD3 R19, PT, PT, R0, -R5, RZ ?WAIT4_END_GROUP;
@!P3 IADD3 R21, PT, PT, R0, R5, RZ ?trans1;
IMAD.WIDE R4, R13, 0x8, R16 &req={1} ?WAIT4_END_GROUP;
@P2 IMAD.WIDE R12, R19, 0x8, R16.reuse ?trans1;
@P0 LDG.E.64 R6, desc[UR4][R4.64] &wr=0x2 ?trans3;
@!P3 IMAD.WIDE R16, R21, 0x8, R16 ?trans1;
@!P1 LDG.E.64 R8, desc[UR4][R4.64+0x10] &wr=0x2 ?trans4;
@P2 LDG.E.64 R10, desc[UR4][R12.64] &wr=0x3 ?trans4;
@!P3 LDG.E.64 R14, desc[UR4][R16.64] &wr=0x4 ?trans1;
DADD R6, R8, R6 &req={2} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R6, R6, R10 &req={3} &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R14, R6, R14 &req={4} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R14, 0.25 &req={0} &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R2.64], R14 &req={0} &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDCU.64 UR6, c[0x0][0x388] &wr=0x2 ?trans1;
LDG.E.64 R2, desc[UR4][R2.64] &req={1,0} &wr=0x3 ?trans1;
SHF.R.S32.HI R5, RZ, 0x1f, R0 ?trans2;
LEA R4, P0, R0, UR6, 0x3 &req={2} ?WAIT4_END_GROUP;
LEA.HI.X R5, R0, UR7, R5, 0x3, P0 ?WAIT5_END_GROUP;
STG.E.64 desc[UR4][R4.64], R2 &req={3} ?trans1;
EXIT ?trans5;
BRA 0x5b0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: laplacian(int, double*, double*)
_Z9laplacianiPdS_:
s_clause 0x2
s_load_b32 s3, s[0:1], 0x24
s_load_b32 s2, s[0:1], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s0, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1)
v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
s_mul_i32 s0, s2, s2
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmp_le_i32_e32 vcc_lo, s0, v1
v_ashrrev_i32_e32 v2, 31, v1
s_and_saveexec_b32 s0, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_xor_b32 s0, exec_lo, s0
s_and_not1_saveexec_b32 s1, s0
s_cbranch_execz .LBB0_14
s_ashr_i32 s0, s2, 31
v_add_nc_u32_e32 v4, v1, v2
s_add_i32 s3, s2, s0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_xor_b32 s3, s3, s0
v_xor_b32_e32 v4, v4, v2
v_cvt_f32_u32_e32 v0, s3
s_sub_i32 s8, 0, s3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v0, v0
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
v_cvt_u32_f32_e32 v0, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v3, s8, v0
v_mul_hi_u32 v3, v0, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v0, v0, v3
v_mul_hi_u32 v0, v4, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v3, v0, s3
v_sub_nc_u32_e32 v3, v4, v3
v_add_nc_u32_e32 v4, 1, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v5, s3, v3
v_cmp_le_u32_e32 vcc_lo, s3, v3
v_dual_cndmask_b32 v3, v3, v5 :: v_dual_cndmask_b32 v0, v0, v4
v_xor_b32_e32 v5, s0, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cmp_le_u32_e32 vcc_lo, s3, v3
v_add_nc_u32_e32 v4, 1, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v0, v0, v4, vcc_lo
v_xor_b32_e32 v0, v0, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v0, v0, v5
v_mul_lo_u32 v11, v0, s2
v_cmp_ne_u32_e64 s0, 0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_ne_u32_e32 vcc_lo, v1, v11
s_and_b32 s0, s0, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_saveexec_b32 s3, s0
s_xor_b32 s0, exec_lo, s3
s_cbranch_execz .LBB0_11
v_mov_b32_e32 v3, 0
v_mov_b32_e32 v4, 0
v_sub_nc_u32_e32 v12, v1, v11
s_mov_b32 s3, exec_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
v_cmpx_lt_i32_e32 0, v12
s_cbranch_execz .LBB0_4
v_add_nc_u32_e32 v5, -1, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v6, 31, v5
v_lshlrev_b64 v[5:6], 3, v[5:6]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v5, vcc_lo, s4, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
global_load_b64 v[5:6], v[5:6], off
.LBB0_4:
s_or_b32 exec_lo, exec_lo, s3
s_add_i32 s3, s2, -1
s_mov_b32 s8, exec_lo
v_cmpx_gt_i32_e64 s3, v12
s_cbranch_execz .LBB0_6
v_lshlrev_b64 v[3:4], 3, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v3, vcc_lo, s4, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
global_load_b64 v[3:4], v[3:4], off offset:8
.LBB0_6:
s_or_b32 exec_lo, exec_lo, s8
v_mov_b32_e32 v7, 0
v_mov_b32_e32 v8, 0
s_mov_b32 s8, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_dual_mov_b32 v10, v8 :: v_dual_mov_b32 v9, v7
v_cmpx_lt_i32_e32 0, v0
s_cbranch_execz .LBB0_8
v_subrev_nc_u32_e32 v9, s2, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v9, v12, v9
v_ashrrev_i32_e32 v10, 31, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[9:10], 3, v[9:10]
v_add_co_u32 v9, vcc_lo, s4, v9
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v10, vcc_lo, s5, v10, vcc_lo
global_load_b64 v[9:10], v[9:10], off
.LBB0_8:
s_or_b32 exec_lo, exec_lo, s8
v_cmp_gt_i32_e32 vcc_lo, s3, v0
s_and_saveexec_b32 s3, vcc_lo
s_cbranch_execz .LBB0_10
v_add_nc_u32_e32 v7, s2, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v8, 31, v7
v_lshlrev_b64 v[7:8], 3, v[7:8]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v7, vcc_lo, s4, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
global_load_b64 v[7:8], v[7:8], off
.LBB0_10:
s_or_b32 exec_lo, exec_lo, s3
s_waitcnt vmcnt(0)
v_add_f64 v[3:4], v[5:6], v[3:4]
v_lshlrev_b64 v[5:6], 3, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v5, vcc_lo, s6, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[3:4], v[3:4], v[9:10]
v_add_f64 v[3:4], v[3:4], v[7:8]
s_delay_alu instid0(VALU_DEP_1)
v_ldexp_f64 v[3:4], v[3:4], -2
global_store_b64 v[5:6], v[3:4], off
.LBB0_11:
s_and_not1_saveexec_b32 s0, s0
s_cbranch_execz .LBB0_13
v_lshlrev_b64 v[3:4], 3, v[1:2]
v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v6, 0x3ff00000
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v3, vcc_lo, s6, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
global_store_b64 v[3:4], v[5:6], off
.LBB0_13:
s_or_b32 exec_lo, exec_lo, s0
.LBB0_14:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s1
v_lshlrev_b64 v[0:1], 3, v[1:2]
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
v_add_co_u32 v2, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
global_load_b64 v[2:3], v[2:3], off
s_waitcnt vmcnt(0)
global_store_b64 v[0:1], v[2:3], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| laplacian | 2,146 | 3,163 | stackv2-00000-of-00015 |
// Demangled: CalculatePointsIntheCircle(int*, int)
Function : _Z26CalculatePointsIntheCirclePii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R8, SR_TID.X &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x388] &wr=0x2 ?trans1;
S2R R3, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR7, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R9, SR_TID.Y &wr=0x3 ?trans1;
LDCU UR8, c[0x0][0x364] &wr=0x3 ?trans1;
S2R R2, SR_CTAID.Y &wr=0x3 ?trans1;
UIMAD.WIDE UR4, UR6, 0x10624dd3, URZ &req={2} ?WAIT4_END_GROUP;
USHF.R.U32.HI UR4, URZ, 0x1f, UR5 ?WAIT4_END_GROUP;
ULEA.HI.SX32 UR4, UR5, UR4, 0x1a ?WAIT4_END_GROUP;
UIMAD UR4, UR4, -0x3e8, UR6 ?trans1;
IMAD R0, R3, UR7, R8 &req={1} ?trans2;
IMAD R3, R2, UR8, R9 &req={3} ?WAIT4_END_GROUP;
IMAD R0, R3, UR4, R0 ?WAIT5_END_GROUP;
LOP3.LUT R0, R0, 0xaad26b49, RZ, 0x3c, !PT ?WAIT5_END_GROUP;
IMAD R0, R0, 0x4182bed5, RZ ?WAIT5_END_GROUP;
IADD3 R2, PT, PT, R0, 0x75bcd15, RZ ?WAIT4_END_GROUP;
SHF.R.U32.HI R3, RZ, 0x2, R2 ?WAIT4_END_GROUP;
LOP3.LUT R4, R3, R2, RZ, 0x3c, !PT ?trans2;
IADD3 R3, PT, PT, R0.reuse, 0x583f19, RZ ?trans2;
LOP3.LUT R2, R0, 0x159a55e5, RZ, 0x3c, !PT ?trans2;
IADD3 R5, PT, PT, R4, R4, RZ ?trans1;
IMAD.SHL.U32 R6, R3, 0x10, RZ ?trans1;
SHF.R.U32.HI R7, RZ, 0x2, R2 ?WAIT4_END_GROUP;
LOP3.LUT R5, R3, R6, R5, 0x96, !PT ?trans2;
LOP3.LUT R7, R7, 0x159a55e5, R0, 0x96, !PT ?trans2;
LOP3.LUT R5, R5, R4, RZ, 0x3c, !PT ?trans2;
IADD3 R3, PT, PT, R7, R7, RZ ?WAIT3_END_GROUP;
IMAD.SHL.U32 R2, R5, 0x10, RZ ?WAIT5_END_GROUP;
LOP3.LUT R2, R7, R3, R2, 0x96, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R2, R5, RZ, 0x3c, !PT ?trans1;
HFMA2 R2, -RZ, RZ, 0.1171875, 0 ?WAIT3_END_GROUP;
IADD3 R3, PT, PT, R0.reuse, -0x25fe145e, R3 ?trans2;
IADD3 R0, PT, PT, R0, -0x26039c23, R5 ?trans2;
I2FP.F32.U32 R3, R3 ?trans2;
I2FP.F32.U32 R0, R0 ?WAIT3_END_GROUP;
FFMA R3, R3, R2.reuse, 1.1641532182693481445e-10 ?trans2;
FFMA R0, R0, R2, 1.1641532182693481445e-10 ?trans2;
FMUL R3, R3, R3 ?WAIT4_END_GROUP;
FFMA R3, R0, R0, R3 ?WAIT5_END_GROUP;
FSETP.GTU.AND P0, PT, R3, 1, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD R5, R8, 0x20, R9 ?trans1;
MOV R7, 0x1 ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R2, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
REDG.E.ADD.STRONG.GPU desc[UR4][R2.64], R7 &req={1} ?trans1;
EXIT ?trans5;
BRA 0x320;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: CalculatePointsIntheCircle(int*, int)
_Z26CalculatePointsIntheCirclePii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b32 s3, s[0:1], 0x8
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s4, s2, 16
s_mul_hi_i32 s5, s3, 0x10624dd3
v_mad_u64_u32 v[2:3], null, s15, s4, v[1:2]
s_lshr_b32 s4, s5, 31
s_ashr_i32 s5, s5, 6
s_and_b32 s2, s2, 0xffff
s_add_i32 s4, s5, s4
s_mul_i32 s14, s14, s2
s_mulk_i32 s4, 0x3e8
s_mov_b32 s2, exec_lo
s_sub_i32 s3, s3, s4
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v2, v2, s3
v_add3_u32 v2, s14, v0, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v2, 0x2c7f967f, v2
v_mul_lo_u32 v2, 0x493c4aa1, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v3, 0x75bcd15, v2
v_add_nc_u32_e32 v5, 0x583f19, v2
v_xor_b32_e32 v7, 0x159a55e5, v2
v_lshrrev_b32_e32 v4, 2, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
v_xor_b32_e32 v3, v4, v3
v_lshlrev_b32_e32 v4, 4, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b32_e32 v6, 1, v3
v_xor_b32_e32 v4, v4, v6
v_lshrrev_b32_e32 v6, 2, v7
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_xor3_b32 v3, v4, v5, v3
v_xor_b32_e32 v4, v6, v7
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b32_e32 v5, 4, v3
v_lshlrev_b32_e32 v6, 1, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v5, v6, v5
v_xor3_b32 v4, v5, v4, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add3_u32 v4, v2, v4, 0x8acd61a2
v_add3_u32 v2, v2, v3, 0x8ac7d9dd
v_cvt_f32_u32_e32 v3, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f32_u32_e32 v2, v2
v_dual_fmaak_f32 v3, 0x2f800000, v3, 0x2f800000 :: v_dual_fmaak_f32 v2, 0x2f800000, v2, 0x2f800000
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v3, v3, v3
v_fmac_f32_e32 v3, v2, v2
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_ge_f32_e32 1.0, v3
s_cbranch_execz .LBB0_2
s_load_b64 s[0:1], s[0:1], 0x0
v_lshlrev_b32_e32 v0, 5, v0
s_delay_alu instid0(VALU_DEP_1)
v_add_lshl_u32 v0, v0, v1, 2
v_mov_b32_e32 v1, 1
s_waitcnt lgkmcnt(0)
global_atomic_add_u32 v0, v1, s[0:1]
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| CalculatePointsIntheCircle | 1,396 | 1,431 | stackv2-00000-of-00015 |
// Demangled: sumArraysZeroCopyUVA(float*, float*, float*, int)
Function : _Z20sumArraysZeroCopyUVAPfS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x398] &wr=0x2 ?trans7;
LDC R9, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R9, R9, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R9, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD.WIDE R2, R9, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x4 ?trans1;
IMAD.WIDE R4, R9, 0x4, R4 &req={2} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x4 ?trans1;
IMAD.WIDE R6, R9, 0x4, R6 &req={3} ?WAIT4_END_GROUP;
FADD R9, R2, R5 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x140;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: sumArraysZeroCopyUVA(float*, float*, float*, int)
_Z20sumArraysZeroCopyUVAPfS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[4:7], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| sumArraysZeroCopyUVA | 571 | 580 | stackv2-00000-of-00015 |
// Demangled: areDivisible(int, int, int, int*, bool*)
Function : _Z12areDivisibleiiiPiPb
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R7, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R6, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R6, R6, UR4, R7 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R6, UR7, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R0, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR8, c[0x0][0x398] &wr=0x1 ?trans1;
SHF.R.S32.HI R7, RZ, 0x1f, R6 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans4;
IADD.64 R2, R6, UR8 &req={1} ?trans2;
ISETP.GE.AND P0, PT, R0, 0x1, PT &req={0} ?WAIT4_END_GROUP;
STG.E.U8 desc[UR4][R2.64], RZ &req={2} &rd=0x0 ?trans9;
@!P0 EXIT &req={0} ?trans5;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans1;
IADD3 R0, PT, PT, R6, UR6, RZ ?trans1;
HFMA2 R11, -RZ, RZ, 0, 0 ?trans1;
LDCU UR7, c[0x0][0x388] &wr=0x1 ?trans2;
IABS R12, R0 ?WAIT7_END_GROUP;
IMAD.WIDE.U32 R6, R11, 0x4, R4 &req={0} ?WAIT6_END_GROUP;
LDG.E R7, desc[UR4][R6.64] &wr=0x2 ?trans1;
IADD3 R11, PT, PT, R11, 0x1, RZ ?trans2;
IABS R14, R7.reuse &req={2} ?trans2;
IABS R15, R7 ?trans2;
I2F.RP R10, R14 &wr=0x0 ?trans2;
IADD3 R6, PT, PT, RZ, -R15, RZ ?trans1;
MUFU.RCP R10, R10 &req={0} &wr=0x0 ?trans2;
IADD3 R8, PT, PT, R10, 0xffffffe, RZ &req={0} ?WAIT2_END_GROUP;
IABS R10, R0 ?trans2;
F2I.FTZ.U32.TRUNC.NTZ R9, R8 &rd=0x0 &wr=0x2 ?trans2;
MOV R8, RZ &req={0} ?trans1;
IADD3 R13, PT, PT, RZ, -R9, RZ &req={2} ?WAIT5_END_GROUP;
IMAD R13, R13, R14, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R9, R9, R13, R8 ?WAIT6_END_GROUP;
IMAD.HI.U32 R9, R9, R12, RZ ?WAIT4_END_GROUP;
IMAD R9, R9, R6, R10 ?trans1;
MOV R6, 0x1 ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P0, PT, R14, R9, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R9, PT, PT, R9, -R14, RZ ?trans1;
ISETP.GE.AND P0, PT, R0, RZ, PT ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P1, PT, R14, R9, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R9, PT, PT, R9, -R14, RZ ?trans1;
ISETP.NE.AND P1, PT, R7, RZ, PT ?WAIT3_END_GROUP;
@!P0 IADD3 R9, PT, PT, -R9, RZ, RZ ?WAIT10_END_GROUP;
@!P1 LOP3.LUT R9, RZ, R7.reuse, RZ, 0x33, !PT ?trans1;
IMAD R7, R7, R7, RZ ?trans1;
ISETP.GE.AND P1, PT, R11, UR7, PT &req={1} ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R9, RZ, PT ?WAIT13_END_GROUP;
@!P0 STG.E.U8 desc[UR4][R2.64], R6 &rd=0x0 ?trans1;
ISETP.GT.AND P0, PT, R7, R0, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
@!P1 BRA 0x150 ?trans5;
EXIT ?trans5;
BRA 0x370;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: areDivisible(int, int, int, int*, bool*)
_Z12areDivisibleiiiPiPb:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b128 s[4:7], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s5, v2
s_cbranch_execz .LBB0_6
s_load_b128 s[0:3], s[0:1], 0x10
v_ashrrev_i32_e32 v1, 31, v2
v_mov_b32_e32 v3, 0
s_cmp_lt_i32 s6, 1
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s2, v2
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
s_mov_b32 s2, 0
global_store_b8 v[0:1], v3, off
s_cbranch_scc1 .LBB0_6
v_dual_mov_b32 v5, 1 :: v_dual_add_nc_u32 v2, s4, v2
s_add_i32 s3, s6, -1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_add_nc_u32_e32 v4, v2, v3
s_delay_alu instid0(VALU_DEP_1)
v_xor_b32_e32 v4, v4, v3
.LBB0_3:
s_load_b32 s4, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_ashr_i32 s5, s4, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s6, s4, s5
s_xor_b32 s5, s6, s5
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cvt_f32_u32_e32 v6, s5
s_sub_i32 s6, 0, s5
v_rcp_iflag_f32_e32 v6, v6
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v6, 0x4f7ffffe, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_u32_f32_e32 v6, v6
v_mul_lo_u32 v7, s6, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v7, v6, v7
v_add_nc_u32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v6, v4, v6
v_mul_lo_u32 v6, v6, s5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v4, v6
v_subrev_nc_u32_e32 v7, s5, v6
v_cmp_le_u32_e32 vcc_lo, s5, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v6, v6, v7, vcc_lo
v_subrev_nc_u32_e32 v7, s5, v6
v_cmp_le_u32_e32 vcc_lo, s5, v6
s_mov_b32 s5, exec_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v6, v6, v7, vcc_lo
v_xor_b32_e32 v6, v6, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v6, v3
v_cmpx_eq_u32_e32 0, v6
s_cbranch_execz .LBB0_5
global_store_b8 v[0:1], v5, off
.LBB0_5:
s_or_b32 exec_lo, exec_lo, s5
s_mul_i32 s4, s4, s4
s_cmp_eq_u32 s3, 0
v_cmp_gt_i32_e32 vcc_lo, s4, v2
s_cselect_b32 s4, -1, 0
s_add_i32 s3, s3, -1
s_or_b32 s4, vcc_lo, s4
s_add_u32 s0, s0, 4
s_addc_u32 s1, s1, 0
s_and_b32 s4, exec_lo, s4
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_or_b32 s2, s4, s2
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB0_3
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| areDivisible | 1,392 | 1,541 | stackv2-00000-of-00015 |
// Demangled: arrayadd(int*, int*, int*)
Function : _Z8arrayaddPiS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R9, SR_TID.Y &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans1;
S2R R0, SR_TID.X &wr=0x0 ?trans6;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x4 ?trans1;
IADD3 R9, PT, PT, R0, R9, R9 &req={0} ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R2, R9, 0x4, R2 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R9.reuse, 0x4, R4 &req={3} ?trans2;
LDG.E R2, desc[UR4][R2.64] &req={2} &wr=0x2 ?trans4;
LDG.E R5, desc[UR4][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R6, R9, 0x4, R6 &req={4} ?trans1;
IADD3 R9, PT, PT, R2, R5, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x100;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: arrayadd(int*, int*, int*)
_Z8arrayaddPiS_S_:
s_load_b128 s[4:7], s[0:1], 0x0
v_lshrrev_b32_e32 v1, 9, v0
v_and_b32_e32 v0, 0x3ff, v0
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_and_b32_e32 v1, 0x7fe, v1
v_add_lshl_u32 v0, v1, v0, 2
s_waitcnt lgkmcnt(0)
s_clause 0x1
global_load_b32 v1, v0, s[4:5]
global_load_b32 v2, v0, s[6:7]
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v1, v2, v1
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| arrayadd | 488 | 284 | stackv2-00000-of-00015 |
// Demangled: cudasum(int*, int*, int*)
Function : _Z7cudasumPiS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R9, SR_TID.X &wr=0x0 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans8;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD R9, R0, UR6, R9 &req={0} ?WAIT7_END_GROUP;
LDC.64 R6, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD.WIDE R2, R9, 0x4, R2 &req={2} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
IMAD.WIDE R4, R9, 0x4, R4 &req={3} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE R6, R9, 0x4, R6 &req={0} ?trans1;
IADD3 R9, PT, PT, R2, R5, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x110;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: cudasum(int*, int*, int*)
_Z7cudasumPiS_S_:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| cudasum | 501 | 497 | stackv2-00000-of-00015 |
// Demangled: kernel_min(int*, int*)
Function : _Z10kernel_minPiS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R4, SR_TID.X &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R7, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans1;
IMAD R5, R7, UR4, R4 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R5, 0x4, R2 &req={2} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR6][R2.64] &req={3} &rd=0x1 &wr=0x2 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x3 ?trans1;
UMOV UR4, 0x400 ?trans1;
ISETP.GT.U32.AND P0, PT, R4.reuse, 0xff, PT ?trans1;
BSSY.RECONVERGENT B0, 0x1d0 ?trans1;
ISETP.GT.U32.AND P6, PT, R4.reuse, 0x7f, PT ?trans1;
ISETP.GT.U32.AND P5, PT, R4.reuse, 0x3f, PT ?trans1;
ISETP.GT.U32.AND P4, PT, R4.reuse, 0x1f, PT ?trans1;
ISETP.GT.U32.AND P3, PT, R4.reuse, 0xf, PT ?trans1;
ISETP.GT.U32.AND P2, PT, R4.reuse, 0x7, PT ?trans1;
ISETP.GT.U32.AND P1, PT, R4, 0x3, PT ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={3} ?WAIT6_END_GROUP;
LEA R3, R4, UR4, 0x2 &req={1} ?WAIT5_END_GROUP;
STS [R3], R2 &req={2} &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 BRA 0x1c0 &req={0} ?trans5;
LDS R0, [R3] ?trans4;
LDS R2, [R3+0x400] &req={1} &wr=0x0 ?trans2;
ISETP.GT.AND P0, PT, R0, R2, PT &req={0} ?WAIT13_END_GROUP;
@P0 STS [R3], R2 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R4, 0x1, PT ?WAIT5_END_GROUP;
BSSY.RECONVERGENT B0, 0x260 ?trans4;
@P6 BRA 0x250 ?trans5;
LDS R0, [R3] ?trans4;
LDS R2, [R3+0x200] &req={1,0} &wr=0x0 ?trans2;
ISETP.GT.AND P6, PT, R0, R2, PT &req={0} ?WAIT13_END_GROUP;
@P6 STS [R3], R2 &rd=0x2 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.NE.AND P6, PT, R4, RZ, PT ?WAIT5_END_GROUP;
BSSY.RECONVERGENT B0, 0x2f0 ?trans4;
@P5 BRA 0x2e0 ?trans5;
LDS R0, [R3] ?trans4;
LDS R2, [R3+0x100] &req={2,1,0} &wr=0x0 ?trans2;
ISETP.GT.AND P5, PT, R0, R2, PT &req={0} ?WAIT13_END_GROUP;
@P5 STS [R3], R2 &rd=0x3 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x370 ?trans4;
@P4 BRA 0x360 ?trans5;
LDS R0, [R3] ?trans4;
LDS R2, [R3+0x80] &req={3,2,1,0} &wr=0x0 ?trans2;
ISETP.GT.AND P4, PT, R0, R2, PT &req={0} ?WAIT13_END_GROUP;
@P4 STS [R3], R2 &rd=0x4 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x3f0 ?trans4;
@P3 BRA 0x3e0 ?trans5;
LDS R0, [R3] ?trans4;
LDS R2, [R3+0x40] &req={4,3,2,1,0} &wr=0x0 ?trans2;
ISETP.GT.AND P3, PT, R0, R2, PT &req={0} ?WAIT13_END_GROUP;
@P3 STS [R3], R2 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x470 ?trans4;
@P2 BRA 0x460 ?trans5;
LDS R0, [R3] ?trans4;
LDS R2, [R3+0x20] &req={4,3,2,1,0} &wr=0x0 ?trans2;
ISETP.GT.AND P2, PT, R0, R2, PT &req={0} ?WAIT13_END_GROUP;
@P2 STS [R3], R2 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x4f0 ?trans4;
@P1 BRA 0x4e0 ?trans5;
LDS R0, [R3] ?trans4;
LDS R2, [R3+0x10] &req={4,3,2,1,0} &wr=0x0 ?trans2;
ISETP.GT.AND P1, PT, R0, R2, PT &req={0} ?WAIT13_END_GROUP;
@P1 STS [R3], R2 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x570 ?trans4;
@P0 BRA 0x560 ?trans5;
LDS R0, [R3] ?trans4;
LDS R2, [R3+0x8] &req={4,3,2,1,0} &wr=0x0 ?trans2;
ISETP.GT.AND P0, PT, R0, R2, PT &req={0} ?WAIT13_END_GROUP;
@P0 STS [R3], R2 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x5f0 ?trans4;
@P6 BRA 0x5e0 ?trans5;
LDS R0, [R3] ?trans4;
LDS R2, [UR4+0x4] &req={4,3,2,1,0} &wr=0x0 ?trans2;
ISETP.GT.AND P0, PT, R0, R2, PT &req={0} ?WAIT13_END_GROUP;
@P0 STS [R3], R2 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P6 EXIT ?trans5;
LDS R5, [UR4] &wr=0x5 ?trans1;
LDC.64 R2, c[0x0][0x388] &req={4,3,2,1,0} &wr=0x0 ?trans2;
IMAD.WIDE.U32 R2, R7, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R5 &req={5} ?trans1;
EXIT ?trans5;
BRA 0x660;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: kernel_min(int*, int*)
_Z10kernel_minPiS_:
s_clause 0x1
s_load_b32 s5, s[0:1], 0x1c
s_load_b128 s[0:3], s[0:1], 0x0
s_mov_b32 s4, s15
s_waitcnt lgkmcnt(0)
s_and_b32 s5, s5, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s4, s5, v[0:1]
v_mov_b32_e32 v2, 0
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s0, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
s_movk_i32 s0, 0x100
global_load_b32 v2, v[1:2], off
v_lshlrev_b32_e32 v1, 2, v0
s_waitcnt vmcnt(0)
ds_store_b32 v1, v2
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB0_1:
s_mov_b32 s1, exec_lo
v_cmpx_gt_u32_e64 s0, v0
s_cbranch_execz .LBB0_4
v_lshl_add_u32 v2, s0, 2, v1
ds_load_b32 v3, v1
ds_load_b32 v2, v2
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, v3, v2
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_4
ds_store_b32 v1, v2
.LBB0_4:
s_or_b32 exec_lo, exec_lo, s1
s_lshr_b32 s1, s0, 1
s_cmp_lt_u32 s0, 2
s_mov_b32 s0, s1
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB0_1
s_mov_b32 s5, 0
s_mov_b32 s0, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB0_7
v_mov_b32_e32 v0, 0
s_lshl_b64 s[0:1], s[4:5], 2
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s0, s2, s0
s_addc_u32 s1, s3, s1
ds_load_b32 v1, v0
s_waitcnt lgkmcnt(0)
global_store_b32 v0, v1, s[0:1]
.LBB0_7:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| kernel_min | 2,286 | 805 | stackv2-00000-of-00015 |
// Demangled: mediumKernel(int*, int*, int*, int, int*, int)
Function : _Z12mediumKernelPiS_S_iS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R9, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x398] &wr=0x2 ?trans7;
LDC R6, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R6, R6, UR4, R9 &req={1} ?WAIT5_END_GROUP;
SHF.R.U32.HI R3, RZ, 0x5, R6 ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R3, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE.U32 R4, R3, 0x4, R4 &req={0} ?WAIT6_END_GROUP;
LDC.64 R2, c[0x0][0x3a0] &wr=0x0 ?trans1;
LDG.E R0, desc[UR6][R4.64] &req={1} &wr=0x0 ?trans2;
IMAD.WIDE R2, R0, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R7, desc[UR6][R2.64] &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDCU.64 UR4, c[0x0][0x380] &wr=0x0 ?trans1;
SHF.R.S32.HI R5, RZ, 0x1f, R0 ?trans2;
LEA R10, P0, R0, UR4, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R11, R0, UR5, R5, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R7, desc[UR6][R10.64+0x4] &wr=0x2 ?trans4;
LDG.E R8, desc[UR6][R10.64] &wr=0x2 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x0 ?trans1;
LOP3.LUT R6, R6, 0x1f, RZ, 0xc0, !PT ?trans1;
UMOV UR4, 0x400 ?trans1;
HFMA2 R12, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
BSSY.RECONVERGENT B0, 0x770 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={0} ?trans1;
LDCU UR5, c[0x0][0x3a8] &wr=0x0 ?trans5;
LEA.HI R4, R9, UR4, RZ, 0x1b ?WAIT5_END_GROUP;
STS.U8 [R4], R12 &rd=0x1 ?trans1;
LDCU UR4, c[0x0][0x3a8] &wr=0x3 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
IADD3 R5, PT, PT, R7, -R8, RZ &req={2} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R6, R5, PT ?WAIT13_END_GROUP;
@P0 BRA 0x760 &req={3,1,0} ?trans5;
LDG.E R9, desc[UR6][R10.64] &rd=0x0 &wr=0x5 ?trans1;
LOP3.LUT R8, RZ, R8, RZ, 0x33, !PT ?trans1;
BSSY.RECONVERGENT B1, 0x430 ?trans3;
IADD3 R7, PT, PT, -R6, R7, R8 ?WAIT4_END_GROUP;
LEA.HI R8, R7, 0x1, RZ, 0x1b ?WAIT4_END_GROUP;
LOP3.LUT P0, R17, R8, 0x3, RZ, 0xc0, !PT ?trans1;
MOV R8, R6 ?WAIT12_END_GROUP;
@!P0 BRA 0x420 &req={0} ?trans5;
LDC.64 R14, c[0x0][0x3a0] &wr=0x0 ?trans1;
IMAD R8, R17.reuse, 0x20, R6 ?trans1;
IADD3 R16, PT, PT, -R17, RZ, RZ ?trans2;
IADD3 R17, PT, PT, R6, R9, RZ &req={5} ?WAIT4_END_GROUP;
LDC.64 R12, c[0x0][0x388] &wr=0x1 ?trans3;
IMAD.WIDE R10, R17, 0x4, R12 &req={1} ?WAIT6_END_GROUP;
LDG.E R11, desc[UR6][R10.64] &wr=0x2 ?trans1;
IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
BSSY.RECONVERGENT B2, 0x400 ?trans4;
ISETP.NE.AND P1, PT, R16, RZ, PT ?trans1;
ISETP.GE.AND P0, PT, R11, R0, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x3f0 ?trans5;
IMAD.WIDE R10, R11, 0x4, R14 &req={0} ?WAIT6_END_GROUP;
LDG.E R10, desc[UR6][R10.64] &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R10, UR4, PT &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R10, RZ, P0 ?WAIT13_END_GROUP;
@!P0 STS.U8 [R4], RZ &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B2 ?trans5;
IADD3 R17, PT, PT, R17, 0x20, RZ ?trans1;
@P1 BRA 0x330 ?trans6;
BSYNC.RECONVERGENT B1 ?trans5;
ISETP.GE.U32.AND P0, PT, R7, 0x60, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x760 ?trans5;
LDC.64 R12, c[0x0][0x388] &wr=0x2 ?trans1;
IADD3 R9, PT, PT, R9, R8, RZ &req={5} ?WAIT7_END_GROUP;
LDC.64 R10, c[0x0][0x3a0] &wr=0x3 ?trans1;
IADD.64 R12, R12, 0x100 &req={2} ?WAIT8_END_GROUP;
IMAD.WIDE R14, R9, 0x4, R12 &req={0} ?WAIT5_END_GROUP;
LDG.E R7, desc[UR6][R14.64+-0x100] &req={2} &wr=0x2 ?trans4;
LDG.E R17, desc[UR6][R14.64+-0x80] &req={4} &wr=0x4 ?trans4;
LDG.E R19, desc[UR6][R14.64] &wr=0x5 ?trans4;
LDG.E R21, desc[UR6][R14.64+0x80] &req={3} &wr=0x3 ?trans1;
IADD3 R8, PT, PT, R8, 0x80, RZ ?trans1;
BSSY.RECONVERGENT B1, 0x5c0 ?trans4;
ISETP.GE.AND P1, PT, R8, R5, PT ?trans1;
ISETP.GE.AND P0, PT, R7, R0.reuse, PT &req={2} ?trans1;
ISETP.GE.AND P2, PT, R17, R0.reuse, PT &req={4} ?trans1;
ISETP.GE.AND P3, PT, R19, R0.reuse, PT &req={5} ?trans1;
ISETP.GE.AND P4, PT, R21, R0, PT &req={3} ?WAIT10_END_GROUP;
@!P0 BRA 0x5b0 ?trans5;
IMAD.WIDE R14, R7, 0x4, R10 ?WAIT6_END_GROUP;
LDG.E R14, desc[UR6][R14.64] &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R14, UR5, PT &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R14, RZ, P0 ?WAIT13_END_GROUP;
@!P0 STS.U8 [R4], RZ &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B1 ?trans5;
BSSY.RECONVERGENT B1, 0x640 ?trans4;
@!P2 BRA 0x630 ?trans5;
IMAD.WIDE R14, R17, 0x4, R10 ?WAIT6_END_GROUP;
LDG.E R14, desc[UR6][R14.64] &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R14, UR5, PT &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R14, RZ, P0 ?WAIT13_END_GROUP;
@!P0 STS.U8 [R4], RZ &rd=0x2 ?trans2;
BSYNC.RECONVERGENT B1 ?trans5;
BSSY.RECONVERGENT B1, 0x6c0 ?trans4;
@!P3 BRA 0x6b0 ?trans5;
IMAD.WIDE R14, R19, 0x4, R10 ?WAIT6_END_GROUP;
LDG.E R14, desc[UR6][R14.64] &wr=0x3 ?trans2;
ISETP.NE.AND P0, PT, R14, UR5, PT &req={3} ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R14, RZ, P0 ?WAIT13_END_GROUP;
@!P0 STS.U8 [R4], RZ &rd=0x3 ?trans2;
BSYNC.RECONVERGENT B1 ?trans5;
BSSY.RECONVERGENT B1, 0x740 ?trans4;
@!P4 BRA 0x730 ?trans5;
IMAD.WIDE R14, R21, 0x4, R10 ?WAIT6_END_GROUP;
LDG.E R14, desc[UR6][R14.64] &wr=0x4 ?trans2;
ISETP.NE.AND P0, PT, R14, UR5, PT &req={4} ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R14, RZ, P0 ?WAIT13_END_GROUP;
@!P0 STS.U8 [R4], RZ &rd=0x4 ?trans2;
BSYNC.RECONVERGENT B1 ?trans5;
IADD3 R9, PT, PT, R9, 0x80, RZ ?trans1;
@!P1 BRA 0x490 ?trans6;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.NE.AND P0, PT, R6, RZ, PT ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDS.U8 R4, [R4] &req={4,3,2,1,0} &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R4, 0x1, PT &req={0} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDC R5, c[0x0][0x3a8] &wr=0x0 ?trans2;
STG.E desc[UR6][R2.64], R5 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x800;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: mediumKernel(int*, int*, int*, int, int*, int)
_Z12mediumKernelPiS_S_iS_i:
s_clause 0x1
s_load_b32 s8, s[0:1], 0x3c
s_load_b32 s2, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s8, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[5:6], null, s15, s3, v[0:1]
v_lshrrev_b32_e32 v1, 5, v5
s_delay_alu instid0(VALU_DEP_1)
v_cmp_gt_u32_e32 vcc_lo, s2, v1
s_and_saveexec_b32 s2, vcc_lo
s_cbranch_execz .LBB0_11
s_clause 0x1
s_load_b64 s[4:5], s[0:1], 0x10
s_load_b64 s[2:3], s[0:1], 0x20
v_lshlrev_b32_e32 v1, 2, v1
s_waitcnt lgkmcnt(0)
global_load_b32 v3, v1, s[4:5]
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[3:4]
v_add_co_u32 v1, vcc_lo, s2, v6
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s3, v7, vcc_lo
global_load_b32 v4, v[1:2], off
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, 0, v4
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_11
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b32 s1, s[0:1], 0x28
v_lshrrev_b32_e32 v4, 5, v0
v_and_b32_e32 v9, 31, v5
s_delay_alu instid0(VALU_DEP_2)
v_add_nc_u32_e32 v8, 0, v4
v_mov_b32_e32 v4, 1
ds_store_b8 v8, v4
s_waitcnt lgkmcnt(0)
v_add_co_u32 v6, vcc_lo, s4, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
s_mov_b32 s4, exec_lo
global_load_b64 v[10:11], v[6:7], off
s_waitcnt vmcnt(0)
s_barrier
buffer_gl0_inv
v_sub_nc_u32_e32 v10, v11, v10
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_lt_i32_e64 v9, v10
s_cbranch_execz .LBB0_8
global_load_b32 v4, v[6:7], off
v_mad_u16 v0, s15, s8, v0
s_mov_b32 s5, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_dual_mov_b32 v11, v9 :: v_dual_and_b32 v0, 31, v0
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v5, 31, v4
v_add_co_u32 v4, vcc_lo, v4, v0
v_mov_b32_e32 v0, 0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
v_lshlrev_b64 v[4:5], 2, v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v4, vcc_lo, s6, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
.LBB0_4:
global_load_b32 v6, v[4:5], off
s_mov_b32 s6, exec_lo
s_waitcnt vmcnt(0)
v_cmpx_ge_i32_e64 v6, v3
s_cbranch_execz .LBB0_7
v_ashrrev_i32_e32 v7, 31, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[6:7]
v_add_co_u32 v6, vcc_lo, s2, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v7, vcc_lo, s3, v7, vcc_lo
global_load_b32 v6, v[6:7], off
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, 0, v6
v_cmp_eq_u32_e64 s0, s1, v6
s_or_b32 s0, vcc_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 exec_lo, exec_lo, s0
s_cbranch_execz .LBB0_7
ds_store_b8 v8, v0
.LBB0_7:
s_or_b32 exec_lo, exec_lo, s6
v_add_nc_u32_e32 v11, 32, v11
v_add_co_u32 v4, s0, 0x80, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v5, s0, 0, v5, s0
v_cmp_ge_i32_e32 vcc_lo, v11, v10
s_or_b32 s5, vcc_lo, s5
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s5
s_cbranch_execnz .LBB0_4
.LBB0_8:
s_or_b32 exec_lo, exec_lo, s4
v_cmp_eq_u32_e32 vcc_lo, 0, v9
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_11
ds_load_u8 v0, v8
s_waitcnt lgkmcnt(0)
v_cmp_ne_u16_e32 vcc_lo, 0, v0
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_11
v_mov_b32_e32 v0, s1
global_store_b32 v[1:2], v0, off
.LBB0_11:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| mediumKernel | 3,286 | 1,957 | stackv2-00000-of-00015 |
// Demangled: mandel_numpoints(int*)
Function : _Z16mandel_numpointsPi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
MUFU.RCP64H R7, 2000 &wr=0x1 ?trans1;
MOV.64 R10, 0x409f400000000000 ?trans2;
HFMA2 R6, -RZ, RZ, 0, 5.9604644775390625e-08 ?WAIT4_END_GROUP;
S2UR UR4, SR_CTAID.X &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x450 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x2 ?trans1;
DFMA R2, R6, -R10, 1 &req={1} &wr=0x1 ?trans7;
LDC R13, c[0x0][0x364] &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT12_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R2, R2, R2 &req={1} &rd=0x1 ?trans2;
S2R R3, SR_TID.X &req={1} &wr=0x2 ?trans2;
IMAD R0, R0, UR4, R3 &req={2} ?trans1;
S2UR UR4, SR_CTAID.Y &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT14_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64 R2, R0 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R4, R2, 2.5 &req={1} &wr=0x1 ?trans2;
FSETP.GEU.AND P1, PT, |R5|, 6.5827683646048100446e-37, PT &req={1} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R6, R8, R6 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R8, -R10, 1 &req={1} &rd=0x1 &wr=0x2 ?trans2;
S2R R10, SR_TID.Y &req={1} &wr=0x3 ?trans2;
IMAD R13, R13, UR4, R10 &req={3} ?trans1;
UMOV UR4, URZ ?WAIT15_END_GROUP;
NOP ?WAIT14_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R8, R2, R8 &req={2} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R6, R4, R2 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R6, -2000, R4 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R2, R8, R6 &req={1} &wr=0x1 ?trans2;
FFMA R6, RZ, 4.9765625, R3 &req={1} ?trans1;
MOV R7, 0x409f4000 ?WAIT4_END_GROUP;
FSETP.GT.AND P0, PT, |R6|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA P1, 0x440 &req={0} ?trans5;
MOV R8, R4 ?trans1;
MOV R9, R5 ?trans1;
MOV R12, 0x420 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1ec0 ?trans5;
MOV R2, R16 ?trans1;
MOV R3, R17 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
DADD R4, R2, -2 &rd=0x0 ?trans1;
MOV.64 R10, 0x409f400000000000 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U32 R2, R13 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR8, 0x3e7ad7f29abcaf48 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans1;
BSSY.RECONVERGENT B0, 0x8a0 ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R2, 1.125 &req={0} &rd=0x0 &wr=0x2 ?trans2;
HFMA2 R2, -RZ, RZ, 0, 5.9604644775390625e-08 &req={0} ?trans1;
MUFU.RCP64H R3, 2000 &wr=0x0 ?trans1;
FSETP.GEU.AND P1, PT, |R9|, 6.5827683646048100446e-37, PT &req={2} ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R2, -R10, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R14, R14, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R2, R14, R2 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R14, -R10, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R14, R10, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R2, R14, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R2, -2000, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R14, R10, R2 &req={0} &wr=0x0 ?trans2;
FFMA R6, RZ, 4.9765625, R3 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R6|, 1.469367938527859385e-39, PT ?WAIT15_END_GROUP;
NOP ?WAIT12_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R4, R4, UR8 &wr=0x0 ?trans2;
@P0 BRA P1, 0x890 &req={1,0} ?trans5;
MOV R12, 0x870 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1ec0 ?trans5;
MOV R2, R16 ?trans1;
MOV R3, R17 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
UMOV.64 UR4, 0x3e7ad7f29abcaf48 ?trans1;
IMAD R13, R13, 0x7d0, R0 ?trans1;
DADD R2, R2, UR4 &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0x1e90 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R6, R2, R2 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R4, R2 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R4, R4, -R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R8, 2, R2 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, R4, R6 &req={0} &rd=0x0 &wr=0x2 ?trans2;
LDC.64 R6, c[0x0][0x380] &req={0} &wr=0x0 ?trans2;
IMAD.WIDE R6, R13, 0x4, R6 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R6.64], RZ &rd=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT10_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R16, R14, R14 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R8, R8 &req={2} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R10, R16 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GT.AND P0, PT, R18, 4, PT &req={1} &wr=0x1 ?trans2;
@P0 BRA 0x1e80 &req={1,0} ?trans5;
MOV.64 R12, R8 ?trans2;
MOV.64 R8, R10 ?trans2;
MOV.64 R10, R16 ?trans2;
MOV R0, RZ ?WAIT7_END_GROUP;
DADD R8, -R10, R8 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R12, R14, R12 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, R4, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R12, 2, R2 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R10, R10 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R12, R12 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R8, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GT.AND P0, PT, R16, 4, PT &req={0} &wr=0x0 ?trans2;
@P0 BRA 0x1e80 &req={0} ?trans5;
DADD R8, R8, -R14 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R10, R12 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, R4, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R10, 2, R2 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R12, R12 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R10, R10 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R8, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GT.AND P0, PT, R16, 4, PT &req={0} &wr=0x0 ?trans2;
@P0 BRA 0x1e80 &req={0} ?trans5;
DADD R8, R8, -R14 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R12, R10 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, R4, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R10, 2, R2 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R12, R12 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R10, R10 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R8, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GT.AND P0, PT, R16, 4, PT &req={0} &wr=0x0 ?trans2;
@P0 BRA 0x1e80 &req={0} ?trans5;
DADD R8, R8, -R14 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R12, R10 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, R4, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R10, 2, R2 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R12, R12 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R10, R10 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R8, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GT.AND P0, PT, R16, 4, PT &req={0} &wr=0x0 ?trans2;
@P0 BRA 0x1e80 &req={0} ?trans5;
DADD R8, R8, -R14 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R12, R10 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, R4, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R10, 2, R2 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R12, R12 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R10, R10 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R8, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GT.AND P0, PT, R16, 4, PT &req={0} &wr=0x0 ?trans2;
@P0 BRA 0x1e80 &req={0} ?trans5;
DADD R8, R8, -R14 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R12, R10 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, R4, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R10, 2, R2 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R12, R12 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R10, R10 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R8, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GT.AND P0, PT, R16, 4, PT &req={0} &wr=0x0 ?trans2;
@P0 BRA 0x1e80 &req={0} ?trans5;
DADD R8, R8, -R14 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R12, R10 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R14, R4, R8 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R10, 2, R2 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R10, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R14, R14, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GT.AND P0, PT, R12, 4, PT &req={0} &wr=0x0 ?trans2;
@P0 BRA 0x1e80 &req={0} ?trans5;
IADD3 R0, PT, PT, R0, 0x8, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R0, 0x7d0, PT ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
DFMA R8, R14, R14, -R8 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R14, R10 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, R4, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R14, 2, R2 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R12, R12 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R14, R14 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R8, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GT.AND P0, PT, R16, 4, PT &req={0} &wr=0x0 ?trans2;
@!P0 BRA 0xc20 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
MOV R3, 0x1 ?WAIT5_END_GROUP;
STG.E desc[UR6][R6.64], R3 ?trans1;
EXIT ?trans5;
FSETP.GEU.AND P2, PT, |R9|.reuse, 1.469367938527859385e-39, PT ?trans1;
LOP3.LUT R17, R9, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B1, 0x26b0 ?trans1;
LOP3.LUT R18, R7.reuse, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
MOV R16, 0x1ca00000 ?trans1;
FSETP.GEU.AND P0, PT, |R7|.reuse, 1.469367938527859385e-39, PT ?trans1;
LOP3.LUT R3, R7, 0x800fffff, RZ, 0xc0, !PT ?trans2;
ISETP.GE.U32.AND P1, PT, R17, R18, PT ?trans1;
MOV R2, UR4 ?trans1;
MOV R6, UR4 ?trans1;
LOP3.LUT R3, R3, 0x3ff00000, RZ, 0xfc, !PT ?WAIT2_END_GROUP;
@!P2 LOP3.LUT R10, R7, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
SEL R11, R16.reuse, 0x63400000, !P1 ?trans1;
@!P2 MOV R22, RZ ?trans1;
MOV R14, 0x1 ?trans2;
@!P2 ISETP.GE.U32.AND P3, PT, R17, R10, PT ?trans1;
MOV R10, R8 ?trans1;
LOP3.LUT R11, R11, 0x800fffff, R9, 0xf8, !PT ?trans1;
@!P0 DMUL R2, R6, 8.98846567431157953865e+307 &wr=0x0 ?trans2;
@!P2 SEL R19, R16, 0x63400000, !P3 ?trans1;
MUFU.RCP64H R15, R3 &req={0} &wr=0x0 ?trans1;
@!P0 LOP3.LUT R18, R3, 0x7ff00000, RZ, 0xc0, !PT ?WAIT3_END_GROUP;
@!P2 LOP3.LUT R19, R19, 0x80000000, R9, 0xf8, !PT ?trans2;
IADD3 R25, PT, PT, R18, -0x1, RZ ?trans2;
@!P2 LOP3.LUT R23, R19, 0x100000, RZ, 0xfc, !PT ?trans1;
MOV R19, R17 ?WAIT15_END_GROUP;
NOP ?WAIT7_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P2 DFMA R10, R10, 2, -R22 &wr=0x1 ?trans2;
@!P2 LOP3.LUT R19, R11, 0x7ff00000, RZ, 0xc0, !PT &req={1} ?WAIT4_END_GROUP;
IADD3 R24, PT, PT, R19, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R24, 0x7feffffe, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R25, 0x7feffffe, P0 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R14, -R2, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R20, R20, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R14, R20, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R14, -R2, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R14, R20, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R22, R14, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R22, -R2, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R14, R20, R22 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0x2560 &req={1,0} ?trans5;
LOP3.LUT R18, R7, 0x7ff00000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R8, PT, PT, R17.reuse, -R18.reuse, RZ ?trans1;
ISETP.GE.U32.AND P0, PT, R17, R18, PT ?WAIT4_END_GROUP;
VIMNMX.S32 R8, R8, -0x46a00000, !PT ?trans1;
SEL R9, R16, 0x63400000, !P0 ?WAIT4_END_GROUP;
VIMNMX.S32 R8, R8, 0x46a00000, PT ?WAIT5_END_GROUP;
IADD3 R18, PT, PT, -R9, R8, RZ ?trans1;
MOV R8, RZ ?WAIT3_END_GROUP;
IADD3 R9, PT, PT, R18, 0x7fe00000, RZ ?WAIT6_END_GROUP;
DMUL R16, R14, R8 &wr=0x0 ?trans2;
FSETP.GTU.AND P0, PT, |R17|, 1.469367938527859385e-39, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x26a0 ?trans5;
DFMA R2, R14, -R2, R10 &wr=0x0 ?trans1;
MOV R8, RZ ?trans1;
FSETP.NEU.AND P0, PT, R3.reuse, RZ, PT &req={0} ?trans1;
LOP3.LUT R11, R3, 0x80000000, R7, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R9, R11, R9, RZ, 0xfc, !PT ?WAIT8_END_GROUP;
@!P0 BRA 0x26a0 ?trans5;
IADD3 R3, PT, PT, -R18, RZ, RZ ?trans1;
MOV R2, RZ ?trans1;
DMUL.RP R8, R14, R8 &wr=0x0 ?trans2;
LOP3.LUT R11, R9, R11, RZ, 0x3c, !PT &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R16, -R2, R14 &wr=0x0 ?trans2;
IADD3 R2, PT, PT, -R18, -0x43300000, RZ &req={0} ?WAIT5_END_GROUP;
FSETP.NEU.AND P0, PT, |R3|, R2, PT ?WAIT5_END_GROUP;
FSEL R16, R8, R16, !P0 ?trans1;
FSEL R17, R11, R17, !P0 ?trans1;
BRA 0x26a0 ?trans6;
DSETP.NAN.AND P0, PT, R8, R8, PT &wr=0x0 ?trans2;
@P0 BRA 0x2680 &req={0} ?trans5;
DSETP.NAN.AND P0, PT, R6, R6, PT &wr=0x0 ?trans2;
@P0 BRA 0x2650 &req={0} ?trans5;
ISETP.NE.AND P0, PT, R19, R18, PT ?trans1;
MOV.64 R16, 0xfff8000000000000 ?WAIT12_END_GROUP;
@!P0 BRA 0x26a0 ?trans5;
ISETP.NE.AND P0, PT, R19, 0x7ff00000, PT ?trans1;
LOP3.LUT R17, R9, 0x80000000, R7, 0x48, !PT ?WAIT4_END_GROUP;
ISETP.EQ.OR P0, PT, R18, RZ, !P0 ?WAIT13_END_GROUP;
@P0 LOP3.LUT R2, R17, 0x7ff00000, RZ, 0xfc, !PT ?trans1;
@!P0 MOV R16, RZ ?trans1;
@P0 MOV R16, RZ ?WAIT3_END_GROUP;
@P0 MOV R17, R2 ?trans1;
BRA 0x26a0 ?trans6;
LOP3.LUT R17, R7, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R16, R6 ?trans1;
BRA 0x26a0 ?trans6;
LOP3.LUT R17, R9, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R16, R8 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R2, R12 ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R2 0x0 ?trans5;
BRA 0x26e0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: mandel_numpoints(int*)
_Z16mandel_numpointsPi:
s_load_b32 s2, s[0:1], 0x14
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s2, 0xffff
s_lshr_b32 s2, s2, 16
v_mad_u64_u32 v[6:7], null, s14, s3, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f64_i32_e32 v[1:2], v6
v_mad_u64_u32 v[7:8], null, s15, s2, v[0:1]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f64 v[0:1], 0x40040000, v[1:2]
v_cvt_f64_i32_e32 v[3:4], v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mul_f64 v[2:3], 0x3ff20000, v[3:4]
v_div_scale_f64 v[4:5], null, 0x409f4000, 0x409f4000, v[0:1]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_div_scale_f64 v[8:9], null, 0x409f4000, 0x409f4000, v[2:3]
v_rcp_f64_e32 v[10:11], v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_rcp_f64_e32 v[12:13], v[8:9]
s_waitcnt_depctr 0xfff
v_fma_f64 v[14:15], -v[4:5], v[10:11], 1.0
v_fma_f64 v[16:17], -v[8:9], v[12:13], 1.0
v_fma_f64 v[10:11], v[10:11], v[14:15], v[10:11]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[12:13], v[12:13], v[16:17], v[12:13]
v_fma_f64 v[14:15], -v[4:5], v[10:11], 1.0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[16:17], -v[8:9], v[12:13], 1.0
v_fma_f64 v[10:11], v[10:11], v[14:15], v[10:11]
v_div_scale_f64 v[14:15], vcc_lo, v[0:1], 0x409f4000, v[0:1]
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_fma_f64 v[12:13], v[12:13], v[16:17], v[12:13]
v_div_scale_f64 v[16:17], s2, v[2:3], 0x409f4000, v[2:3]
v_mul_f64 v[18:19], v[14:15], v[10:11]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f64 v[20:21], v[16:17], v[12:13]
v_fma_f64 v[4:5], -v[4:5], v[18:19], v[14:15]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[8:9], -v[8:9], v[20:21], v[16:17]
v_div_fmas_f64 v[4:5], v[4:5], v[10:11], v[18:19]
v_mov_b32_e32 v10, 0
s_mov_b32 vcc_lo, s2
s_mov_b32 s2, 0x9abcaf48
s_mov_b32 s3, 0x3e7ad7f2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_div_fmas_f64 v[8:9], v[8:9], v[12:13], v[20:21]
v_div_fixup_f64 v[0:1], v[4:5], 0x409f4000, v[0:1]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_div_fixup_f64 v[2:3], v[8:9], 0x409f4000, v[2:3]
v_add_f64 v[0:1], v[0:1], -2.0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[2:3], v[2:3], s[2:3]
v_add_f64 v[4:5], v[0:1], s[2:3]
v_mad_u64_u32 v[0:1], null, 0x7d0, v7, v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_movk_i32 s1, 0x7d0
s_mov_b32 s0, 0
global_store_b32 v[0:1], v10, off
v_dual_mov_b32 v7, v3 :: v_dual_mov_b32 v6, v2
v_dual_mov_b32 v9, v5 :: v_dual_mov_b32 v8, v4
.LBB0_1:
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f64 v[10:11], v[6:7], v[6:7]
v_mul_f64 v[6:7], v[8:9], v[6:7]
s_or_b32 s3, s3, exec_lo
s_or_b32 s4, s4, exec_lo
s_mov_b32 s5, exec_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[8:9], v[8:9], v[8:9], -v[10:11]
v_fma_f64 v[6:7], v[6:7], 2.0, v[2:3]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[8:9], v[4:5], v[8:9]
v_mul_f64 v[10:11], v[6:7], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[8:9], v[8:9], v[10:11]
v_cmpx_nlt_f64_e32 4.0, v[10:11]
s_add_i32 s1, s1, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s1, 0
s_cselect_b32 s6, -1, 0
s_and_not1_b32 s4, s4, exec_lo
s_and_b32 s6, s6, exec_lo
s_and_not1_b32 s3, s3, exec_lo
s_or_b32 s4, s4, s6
s_or_b32 exec_lo, exec_lo, s5
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s5, exec_lo, s4
s_or_b32 s0, s5, s0
s_and_not1_b32 s2, s2, exec_lo
s_and_b32 s5, s3, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s2, s2, s5
s_and_not1_b32 exec_lo, exec_lo, s0
s_cbranch_execnz .LBB0_1
s_or_b32 exec_lo, exec_lo, s0
s_and_saveexec_b32 s0, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_xor_b32 s0, exec_lo, s0
s_cbranch_execz .LBB0_6
v_mov_b32_e32 v2, 1
global_store_b32 v[0:1], v2, off
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| mandel_numpoints | 9,826 | 2,719 | stackv2-00000-of-00015 |
// Demangled: SleepKernel(long, bool)
Function : _Z11SleepKernellb
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
CS2UR UR4, SR_CLOCKLO ?trans1;
LDCU.64 UR6, c[0x0][0x380] &wr=0x1 ?trans1;
NOP ?WAIT10_END_GROUP;
CS2R R2, SR_CLOCKLO ?WAIT6_END_GROUP;
IADD.64 R2, R2, -UR4 ?WAIT6_END_GROUP;
ISETP.GE.S64.AND P0, PT, R2, UR6, PT &req={1} ?WAIT14_END_GROUP;
@!P0 BRA 0x40 ?trans5;
LDC.U8 R0, c[0x0][0x388] &wr=0x1 ?trans2;
PRMT R0, R0, 0x8880, RZ &req={1} ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R0, RZ, PT ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans1;
NOP ?trans1;
CS2R R2, SR_CLOCKLO ?WAIT6_END_GROUP;
IADD.64 R2, R2, -UR4 ?trans2;
LDC.64 R4, c[0x4][RZ] &wr=0x1 ?trans4;
STG.E.64 desc[UR6][R4.64], R2 &req={1} ?trans1;
EXIT ?trans5;
BRA 0x130;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: SleepKernel(long, bool)
_Z11SleepKernellb:
s_load_b64 s[2:3], s[0:1], 0x0
s_getreg_b32 s4, hwreg(HW_REG_SHADER_CYCLES, 0, 20)
.LBB0_1:
s_getreg_b32 s5, hwreg(HW_REG_SHADER_CYCLES, 0, 20)
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
s_sub_u32 s6, s5, s4
s_subb_u32 s7, 0, 0
s_waitcnt lgkmcnt(0)
v_cmp_lt_i64_e64 s5, s[6:7], s[2:3]
s_and_b32 vcc_lo, exec_lo, s5
s_cbranch_vccnz .LBB0_1
s_load_b32 s0, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_bitcmp0_b32 s0, 0
s_cbranch_scc1 .LBB0_4
s_getreg_b32 s0, hwreg(HW_REG_SHADER_CYCLES, 0, 20)
s_delay_alu instid0(SALU_CYCLE_1)
s_sub_u32 s0, s0, s4
s_subb_u32 s1, 0, 0
v_mov_b32_e32 v0, s0
v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s1
s_getpc_b64 s[2:3]
s_add_u32 s2, s2, diff@rel32@lo+4
s_addc_u32 s3, s3, diff@rel32@hi+12
global_store_b64 v2, v[0:1], s[2:3]
.LBB0_4:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| SleepKernel | 450 | 483 | stackv2-00000-of-00015 |
// Demangled: dataset_parse(int*, int*, int*)
Function : _Z13dataset_parsePiS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R3, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R3, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R0, 0x100509, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IADD3 R5, PT, PT, R0, R0, RZ ?WAIT6_END_GROUP;
LDC.64 R8, c[0x0][0x388] &wr=0x2 ?trans1;
HFMA2 R19, -RZ, RZ, 0, 5.9604644775390625e-08 ?WAIT7_END_GROUP;
LDC.64 R10, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R5, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans2;
IMAD.WIDE R4, R5, 0x4, R8 &req={2} ?WAIT6_END_GROUP;
ATOMG.E.ADD.STRONG.GPU PT, R4, desc[UR4][R4.64+-0x4], R19 &wr=0x2 ?trans4;
LDG.E R7, desc[UR4][R2.64] &wr=0x2 ?trans4;
LDG.E R13, desc[UR4][R2.64+0x4] &wr=0x4 ?trans1;
IMAD R7, R7, 0x157, R4 &req={2} ?trans2;
IMAD.WIDE R8, R13, 0x4, R8 &req={4} ?WAIT3_END_GROUP;
IADD3 R7, PT, PT, R7, -0x157, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R6, R7, 0x4, R10 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R13 ?trans4;
ATOMG.E.ADD.STRONG.GPU PT, R8, desc[UR4][R8.64+-0x4], R19 &wr=0x2 ?trans4;
LDG.E R17, desc[UR4][R2.64+0x4] &wr=0x2 ?trans4;
LDG.E R15, desc[UR4][R2.64] &wr=0x3 ?trans1;
IMAD R17, R17, 0x157, R8 &req={2} ?WAIT5_END_GROUP;
IADD3 R5, PT, PT, R17, -0x157, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R4, R5, 0x4, R10 ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R15 &req={3} ?trans1;
EXIT ?trans5;
BRA 0x200;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: dataset_parse(int*, int*, int*)
_Z13dataset_parsePiS_S_:
s_load_b32 s2, s[0:1], 0x24
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e32 0x10050a, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[4:7], s[0:1], 0x0
v_lshlrev_b32_e32 v0, 1, v1
v_mov_b32_e32 v8, 1
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
global_load_b32 v2, v[0:1], off
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[2:3]
v_add_co_u32 v2, vcc_lo, s6, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
global_atomic_add_u32 v4, v[2:3], v8, off offset:-4 glc
global_load_b64 v[2:3], v[0:1], off
s_waitcnt vmcnt(0)
v_mul_lo_u32 v2, 0x157, v2
v_ashrrev_i32_e32 v7, 31, v3
v_mov_b32_e32 v6, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[6:7], 2, v[6:7]
v_add3_u32 v4, v4, v2, 0xfffffea9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v5, 31, v4
v_lshlrev_b64 v[4:5], 2, v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v4, vcc_lo, s0, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
v_add_co_u32 v6, vcc_lo, s6, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
global_store_b32 v[4:5], v3, off
global_atomic_add_u32 v2, v[6:7], v8, off offset:-4 glc
global_load_b64 v[0:1], v[0:1], off
s_waitcnt vmcnt(0)
v_mul_lo_u32 v1, 0x157, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add3_u32 v1, v2, v1, 0xfffffea9
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[1:2]
v_add_co_u32 v1, vcc_lo, s0, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
global_store_b32 v[1:2], v0, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| dataset_parse | 968 | 1,282 | stackv2-00000-of-00015 |
// Demangled: output_parse(int*, int*, int*)
Function : _Z12output_parsePiS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R8, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
IADD3 R1, PT, PT, R1, -0x13880, RZ &req={0} ?WAIT7_END_GROUP;
LDC R3, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R8, R3, UR4, R8 &req={1} ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R8, 0x4d697, PT ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
STL.128 [R1], RZ &rd=0x0 ?trans1;
MOV.64 R4, 0x10 ?trans2;
HFMA2 R3, -RZ, RZ, 0, 0 ?trans1;
STL.128 [R1+0x10], RZ &rd=0x0 ?trans1;
MOV R2, R1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans2;
STL.128 [R1+0x20], RZ &rd=0x0 ?trans4;
STL.128 [R1+0x30], RZ &rd=0x0 ?trans2;
IMAD.U32 R0, R4.reuse, 0x4, R1 &req={2} ?trans1;
IADD.64 R4, R4, 0x68 ?WAIT4_END_GROUP;
STL.128 [R0], RZ &rd=0x2 ?trans2;
ISETP.GE.U64.AND P0, PT, R4, 0x2710, PT ?trans2;
STL.128 [R0+0x10], RZ &rd=0x2 ?trans4;
STL.128 [R0+0x20], RZ &rd=0x2 ?trans4;
STL.128 [R0+0x30], RZ &rd=0x2 ?trans4;
STL.128 [R0+0x40], RZ &rd=0x2 ?trans4;
STL.128 [R0+0x50], RZ &rd=0x2 ?trans4;
STL.128 [R0+0x60], RZ &rd=0x2 ?trans4;
STL.128 [R0+0x70], RZ &rd=0x2 ?trans4;
STL.128 [R0+0x80], RZ &rd=0x2 ?trans4;
STL.128 [R0+0x90], RZ &rd=0x2 ?trans4;
STL.128 [R0+0xa0], RZ &rd=0x2 ?trans4;
STL.128 [R0+0xb0], RZ &rd=0x2 ?trans4;
STL.128 [R0+0xc0], RZ &rd=0x2 ?trans4;
STL.128 [R0+0xd0], RZ &rd=0x2 ?trans4;
STL.128 [R0+0xe0], RZ &rd=0x2 ?trans4;
STL.128 [R0+0xf0], RZ &rd=0x2 ?trans4;
STL.128 [R0+0x100], RZ &rd=0x2 ?trans4;
STL.128 [R0+0x110], RZ &rd=0x2 ?trans4;
STL.128 [R0+0x120], RZ &rd=0x2 ?trans4;
STL.128 [R0+0x130], RZ &rd=0x2 ?trans4;
STL.128 [R0+0x140], RZ &rd=0x2 ?trans4;
STL.128 [R0+0x150], RZ &rd=0x2 ?trans4;
STL.128 [R0+0x160], RZ &rd=0x2 ?trans4;
STL.128 [R0+0x170], RZ &rd=0x2 ?trans4;
STL.128 [R0+0x180], RZ &rd=0x2 ?trans4;
STL.128 [R0+0x190], RZ &rd=0x2 ?trans1;
@!P0 BRA 0x100 ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans2;
IMAD.WIDE R4, R8, 0x4, R4 &req={3} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R4.64] &req={2,1} &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x680 ?trans1;
IADD.64 R10, R2, 0x9c40 ?trans2;
MOV R11, RZ ?trans1;
SHF.R.S32.HI R9, RZ, 0x1f, R8 ?trans1;
ISETP.GE.AND P0, PT, R0, 0x1, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x670 ?trans5;
HFMA2 R7, -RZ, RZ, 0, 0 ?trans2;
IMAD R4, R8, 0x157, RZ ?trans1;
IADD3 R5, PT, PT, -R0, RZ, RZ ?trans1;
MOV R11, RZ ?WAIT7_END_GROUP;
LDC.64 R16, c[0x0][0x380] &req={1} &wr=0x1 ?trans1;
IADD3 R13, PT, PT, R4, R7, RZ ?WAIT7_END_GROUP;
LDC.64 R14, c[0x0][0x388] &req={2} &wr=0x2 ?trans1;
IMAD.WIDE R12, R13, 0x4, R16 &req={1} ?WAIT5_END_GROUP;
LDG.E R19, desc[UR4][R12.64] &wr=0x2 ?trans2;
IMAD.WIDE R14, R19, 0x4, R14 &req={2} ?WAIT5_END_GROUP;
LDG.E R21, desc[UR4][R14.64+-0x4] &wr=0x2 ?trans1;
IADD3 R7, PT, PT, R7, 0x1, RZ ?trans1;
BSSY.RECONVERGENT B1, 0x660 ?trans4;
ISETP.NE.AND P0, PT, R7, R0, PT ?trans1;
ISETP.GE.AND P1, PT, R21, 0x1, PT &req={2} ?WAIT13_END_GROUP;
@!P1 BRA 0x650 ?trans5;
IMAD.WIDE R12, R4, 0x4, R16 ?WAIT5_END_GROUP;
LDG.E R18, desc[UR4][R12.64] &rd=0x1 &wr=0x5 ?trans1;
HFMA2 R14, -RZ, RZ, 0, 2.0444393157958984375e-05 ?trans1;
MOV R6, RZ ?WAIT4_END_GROUP;
IMAD R19, R19, R14, -0x157 ?WAIT7_END_GROUP;
LDC.64 R12, c[0x0][0x380] &req={2,1} &wr=0x1 ?trans1;
IADD3 R15, PT, PT, R19, R6, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R12, R15, 0x4, R12 &req={1} ?WAIT5_END_GROUP;
LDG.E R23, desc[UR4][R12.64] &wr=0x2 ?trans1;
IADD3 R6, PT, PT, R6, 0x1, RZ ?trans1;
BSSY.RECONVERGENT B2, 0x640 ?trans4;
ISETP.NE.AND P1, PT, R6, R21, PT ?trans1;
ISETP.NE.AND P2, PT, R18, R23, PT &req={5,2} ?WAIT13_END_GROUP;
@!P2 BRA 0x600 ?trans5;
LDC.64 R12, c[0x0][0x380] &wr=0x1 ?trans1;
MOV R17, R4 ?trans1;
MOV R16, R5 ?WAIT7_END_GROUP;
IADD3 R16, PT, PT, R16, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P2, PT, R16, RZ, PT ?WAIT13_END_GROUP;
@!P2 BRA 0x630 ?trans5;
IADD3 R17, PT, PT, R17, 0x1, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R14, R17, 0x4, R12 &req={1} ?WAIT6_END_GROUP;
LDG.E R14, desc[UR4][R14.64] &wr=0x2 ?trans2;
ISETP.NE.AND P2, PT, R14, R23, PT &req={2} ?WAIT13_END_GROUP;
@P2 BRA 0x580 ?trans5;
IMAD R12, R11.reuse, 0x4, R2 ?trans1;
IADD3 R11, PT, PT, R11, 0x1, RZ ?WAIT4_END_GROUP;
STL [R12], R23 &rd=0x2 ?trans3;
BSYNC.RECONVERGENT B2 ?trans5;
@P1 BRA 0x4c0 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
@P0 BRA 0x3b0 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
STL.128 [R1+0x9c40], RZ &rd=0x3 ?trans1;
IADD.64 R6, R2, 0x9c80 ?trans2;
MOV.64 R4, 0x10 ?trans2;
STL.128 [R1+0x9c50], RZ &rd=0x3 ?trans4;
STL.128 [R1+0x9c60], RZ &rd=0x3 ?trans4;
STL.128 [R1+0x9c70], RZ &rd=0x3 ?trans2;
MOV R0, R6 &req={4} ?trans1;
IADD.64 R4, R4, 0x9c ?trans2;
IADD.64 R6, R6, 0x270 ?trans2;
STL.128 [R0], RZ &rd=0x4 ?trans2;
ISETP.GE.U64.AND P0, PT, R4, 0x2710, PT ?trans2;
STL.128 [R0+0x10], RZ &rd=0x4 ?trans4;
STL.128 [R0+0x20], RZ &rd=0x4 ?trans4;
STL.128 [R0+0x30], RZ &rd=0x4 ?trans4;
STL.128 [R0+0x40], RZ &rd=0x4 ?trans4;
STL.128 [R0+0x50], RZ &rd=0x4 ?trans4;
STL.128 [R0+0x60], RZ &rd=0x4 ?trans4;
STL.128 [R0+0x70], RZ &rd=0x4 ?trans4;
STL.128 [R0+0x80], RZ &rd=0x4 ?trans4;
STL.128 [R0+0x90], RZ &rd=0x4 ?trans4;
STL.128 [R0+0xa0], RZ &rd=0x4 ?trans4;
STL.128 [R0+0xb0], RZ &rd=0x4 ?trans4;
STL.128 [R0+0xc0], RZ &rd=0x4 ?trans4;
STL.128 [R0+0xd0], RZ &rd=0x4 ?trans4;
STL.128 [R0+0xe0], RZ &rd=0x4 ?trans4;
STL.128 [R0+0xf0], RZ &rd=0x4 ?trans4;
STL.128 [R0+0x100], RZ &rd=0x4 ?trans4;
STL.128 [R0+0x110], RZ &rd=0x4 ?trans4;
STL.128 [R0+0x120], RZ &rd=0x4 ?trans4;
STL.128 [R0+0x130], RZ &rd=0x4 ?trans4;
STL.128 [R0+0x140], RZ &rd=0x4 ?trans4;
STL.128 [R0+0x150], RZ &rd=0x4 ?trans4;
STL.128 [R0+0x160], RZ &rd=0x4 ?trans4;
STL.128 [R0+0x170], RZ &rd=0x4 ?trans4;
STL.128 [R0+0x180], RZ &rd=0x4 ?trans4;
STL.128 [R0+0x190], RZ &rd=0x4 ?trans4;
STL.128 [R0+0x1a0], RZ &rd=0x4 ?trans4;
STL.128 [R0+0x1b0], RZ &rd=0x4 ?trans4;
STL.128 [R0+0x1c0], RZ &rd=0x4 ?trans4;
STL.128 [R0+0x1d0], RZ &rd=0x4 ?trans4;
STL.128 [R0+0x1e0], RZ &rd=0x4 ?trans4;
STL.128 [R0+0x1f0], RZ &rd=0x4 ?trans4;
STL.128 [R0+0x200], RZ &rd=0x4 ?trans4;
STL.128 [R0+0x210], RZ &rd=0x4 ?trans4;
STL.128 [R0+0x220], RZ &rd=0x4 ?trans4;
STL.128 [R0+0x230], RZ &rd=0x4 ?trans4;
STL.128 [R0+0x240], RZ &rd=0x4 ?trans4;
STL.128 [R0+0x250], RZ &rd=0x4 ?trans4;
STL.128 [R0+0x260], RZ &rd=0x4 ?trans1;
@!P0 BRA 0x6e0 ?trans5;
LDL R0, [R1] &req={4} &wr=0x4 ?trans1;
ISETP.GE.AND P0, PT, R11, 0x2, PT ?trans1;
BSSY.RECONVERGENT B0, 0xbe0 ?trans1;
HFMA2 R4, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
STL [R1+0x9c40], R0 &req={4} &rd=0x4 ?trans10;
@!P0 BRA 0xbd0 ?trans5;
MOV R0, 0x1 &req={4} ?trans1;
MOV R4, 0x1 ?WAIT7_END_GROUP;
ISETP.GE.AND P1, PT, R4, 0x1, PT ?trans1;
IMAD R5, R0.reuse, 0x4, R2 &req={4,1} ?trans1;
IADD3 R0, PT, PT, R0, 0x1, RZ ?trans1;
BSSY.RECONVERGENT B1, 0xb40 ?trans1;
MOV R7, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R0, R11, PT ?WAIT6_END_GROUP;
@!P1 BRA 0xb30 ?trans7;
LDL R13, [R5] &req={1} &rd=0x1 &wr=0x5 ?trans1;
HFMA2 R7, -RZ, RZ, 0, 0 ?WAIT7_END_GROUP;
IMAD R6, R7, 0x4, R10 ?WAIT6_END_GROUP;
LDL R6, [R6] &wr=0x4 ?trans2;
ISETP.NE.AND P1, PT, R13, R6, PT &req={5,4} ?WAIT13_END_GROUP;
@!P1 BRA 0xb30 ?trans5;
IADD3 R7, PT, PT, R7, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R7, R4, PT ?WAIT13_END_GROUP;
@P1 BRA 0xab0 ?trans5;
MOV R7, R4 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
ISETP.NE.AND P1, PT, R7, R4, PT ?trans1;
BSSY.RECONVERGENT B1, 0xbc0 ?WAIT12_END_GROUP;
@P1 BRA 0xbb0 ?trans5;
LDL R5, [R5] &req={1} &wr=0x4 ?trans1;
IMAD R6, R4.reuse, 0x4, R10 ?trans1;
IADD3 R4, PT, PT, R4, 0x1, RZ ?WAIT4_END_GROUP;
STL [R6], R5 &req={4} &rd=0x4 ?trans3;
BSYNC.RECONVERGENT B1 ?trans5;
@P0 BRA 0xa20 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU.64 UR6, c[0x0][0x390] &wr=0x5 ?trans2;
LEA R2, P0, R8, UR6, 0x2 &req={5} ?WAIT4_END_GROUP;
LEA.HI.X R3, R8, UR7, R9, 0x2, P0 ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R4 ?trans1;
EXIT ?trans5;
BRA 0xc30;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: output_parse(int*, int*, int*)
_Z12output_parsePiS_S_:
s_load_b32 s2, s[0:1], 0x24
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e32 0x4d698, v2
s_cbranch_execz .LBB1_32
v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v1, 0
s_mov_b64 s[2:3], 0
.LBB1_2:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
s_add_u32 s2, s2, 1
s_addc_u32 s3, s3, 0
scratch_store_b8 v0, v1, off
v_cmp_gt_u64_e64 s4, 0x9c40, s[2:3]
v_add_nc_u32_e32 v0, 1, v0
s_and_b32 vcc_lo, exec_lo, s4
s_cbranch_vccnz .LBB1_2
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x10
v_ashrrev_i32_e32 v3, 31, v2
v_mov_b32_e32 v9, 0
s_mov_b32 s8, 0
s_mov_b32 s1, exec_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[2:3]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v3, vcc_lo, s6, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v4, vcc_lo, s7, v1, vcc_lo
global_load_b32 v10, v[3:4], off
v_mov_b32_e32 v3, 0
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e32 0, v10
s_cbranch_execz .LBB1_17
v_mul_lo_u32 v2, 0x157, v2
v_mov_b32_e32 v9, 0
s_add_u32 s6, s6, -4
s_movk_i32 s9, 0x157
s_addc_u32 s7, s7, -1
s_mov_b32 s10, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[3:4], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v3, vcc_lo, s4, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
.LBB1_5:
v_add_nc_u32_e32 v5, s10, v2
s_mov_b32 s11, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v6, 31, v5
v_lshlrev_b64 v[5:6], 2, v[5:6]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v5, vcc_lo, s4, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
global_load_b32 v7, v[5:6], off
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v8, 31, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[5:6], 2, v[7:8]
v_add_co_u32 v5, vcc_lo, s6, v5
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
global_load_b32 v8, v[5:6], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e32 0, v8
s_cbranch_execz .LBB1_15
v_mad_u64_u32 v[5:6], null, v7, s9, 0xfffffffffffffea9
s_mov_b32 s12, 0
s_mov_b32 s13, 0
.LBB1_7:
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_add_nc_u32_e32 v6, s13, v5
v_mov_b32_e32 v12, v10
s_mov_b32 s14, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v7, 31, v6
v_lshlrev_b64 v[6:7], 2, v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v6, vcc_lo, s4, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
global_load_b32 v11, v[6:7], off
v_dual_mov_b32 v7, v4 :: v_dual_mov_b32 v6, v3
.LBB1_8:
global_load_b32 v13, v[6:7], off
s_or_b32 s16, s16, exec_lo
s_or_b32 s17, s17, exec_lo
s_mov_b32 s18, exec_lo
s_waitcnt vmcnt(0)
v_cmpx_ne_u32_e64 v13, v11
v_add_nc_u32_e32 v12, -1, v12
v_add_co_u32 v6, s0, v6, 4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v7, s0, 0, v7, s0
v_cmp_eq_u32_e32 vcc_lo, 0, v12
s_and_not1_b32 s0, s17, exec_lo
s_and_not1_b32 s16, s16, exec_lo
s_and_b32 s17, vcc_lo, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s17, s0, s17
s_or_b32 exec_lo, exec_lo, s18
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, exec_lo, s17
s_or_b32 s14, s0, s14
s_and_not1_b32 s0, s15, exec_lo
s_and_b32 s15, s16, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s15, s0, s15
s_and_not1_b32 exec_lo, exec_lo, s14
s_cbranch_execnz .LBB1_8
s_or_b32 exec_lo, exec_lo, s14
s_and_saveexec_b32 s0, s15
s_delay_alu instid0(SALU_CYCLE_1)
s_xor_b32 s0, exec_lo, s0
s_cbranch_execz .LBB1_13
v_lshl_add_u32 v6, v9, 2, 16
v_add_nc_u32_e32 v9, 1, v9
scratch_store_b32 v6, v11, off
.LBB1_13:
s_or_b32 exec_lo, exec_lo, s0
s_add_i32 s13, s13, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_eq_u32_e32 vcc_lo, s13, v8
s_or_b32 s12, vcc_lo, s12
s_and_not1_b32 exec_lo, exec_lo, s12
s_cbranch_execnz .LBB1_7
s_or_b32 exec_lo, exec_lo, s12
.LBB1_15:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s11
s_add_i32 s10, s10, 1
v_cmp_eq_u32_e32 vcc_lo, s10, v10
s_or_b32 s8, vcc_lo, s8
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s8
s_cbranch_execnz .LBB1_5
s_or_b32 exec_lo, exec_lo, s8
scratch_load_b32 v3, off, off offset:16
.LBB1_17:
s_or_b32 exec_lo, exec_lo, s1
v_mov_b32_e32 v2, 0x9c50
v_mov_b32_e32 v4, 0
s_mov_b64 s[0:1], 0
.LBB1_18:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
s_add_u32 s0, s0, 1
s_addc_u32 s1, s1, 0
scratch_store_b8 v2, v4, off
v_cmp_gt_u64_e64 s4, 0x9c40, s[0:1]
v_add_nc_u32_e32 v2, 1, v2
s_and_b32 vcc_lo, exec_lo, s4
s_cbranch_vccnz .LBB1_18
v_mov_b32_e32 v2, 1
s_mov_b32 s0, 0x9c50
s_mov_b32 s1, 1
s_waitcnt vmcnt(0)
scratch_store_b32 off, v3, s0
s_mov_b32 s0, exec_lo
v_cmpx_lt_i32_e32 1, v9
s_cbranch_execz .LBB1_31
v_dual_mov_b32 v2, 1 :: v_dual_mov_b32 v3, 1
s_mov_b32 s4, 0
.LBB1_21:
v_mov_b32_e32 v6, 0
s_mov_b32 s5, exec_lo
s_delay_alu instid0(VALU_DEP_2)
v_cmpx_lt_i32_e32 0, v3
s_cbranch_execz .LBB1_27
s_lshl_b32 s6, s1, 2
v_mov_b32_e32 v5, 0x9c50
s_add_i32 s6, s6, 16
s_mov_b32 s7, 0
scratch_load_b32 v4, off, s6
s_mov_b32 s6, 0
.LBB1_23:
scratch_load_b32 v6, v5, off
s_or_b32 s8, s8, exec_lo
s_waitcnt vmcnt(0)
v_cmp_ne_u32_e32 vcc_lo, v4, v6
v_mov_b32_e32 v6, s7
s_and_saveexec_b32 s9, vcc_lo
s_add_i32 s7, s7, 1
v_dual_mov_b32 v6, v3 :: v_dual_add_nc_u32 v5, 4, v5
v_cmp_eq_u32_e32 vcc_lo, s7, v3
s_and_not1_b32 s8, s8, exec_lo
s_and_b32 s10, vcc_lo, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s8, s8, s10
s_or_b32 exec_lo, exec_lo, s9
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s9, exec_lo, s8
s_or_b32 s6, s9, s6
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s6
s_cbranch_execnz .LBB1_23
s_or_b32 exec_lo, exec_lo, s6
.LBB1_27:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s5
s_mov_b32 s5, exec_lo
v_cmpx_eq_u32_e64 v6, v3
s_cbranch_execz .LBB1_29
s_lshl_b32 s6, s1, 2
v_add_nc_u32_e32 v2, 1, v2
s_add_i32 s6, s6, 16
v_lshl_add_u32 v5, v3, 2, 0x9c50
scratch_load_b32 v4, off, s6
v_mov_b32_e32 v3, v2
s_waitcnt vmcnt(0)
scratch_store_b32 v5, v4, off
.LBB1_29:
s_or_b32 exec_lo, exec_lo, s5
s_add_i32 s1, s1, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_eq_u32_e32 vcc_lo, s1, v9
s_or_b32 s4, vcc_lo, s4
s_and_not1_b32 exec_lo, exec_lo, s4
s_cbranch_execnz .LBB1_21
s_or_b32 exec_lo, exec_lo, s4
.LBB1_31:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s0
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB1_32:
s_endpgm
| output_parse | 4,845 | 3,913 | stackv2-00000-of-00015 |
// Demangled: addVectorsInto(float*, float*, float*, int)
Function : _Z14addVectorsIntoPfS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x398] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x370] &wr=0x3 ?trans1;
IMAD R3, R0, UR4, R3 &req={1} ?WAIT2_END_GROUP;
IMAD R0, R0, UR5, RZ &req={3} ?WAIT3_END_GROUP;
ISETP.GE.AND P0, PT, R3, UR6, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
I2F.U32.RP R8, R0 &wr=0x0 ?trans1;
IADD3 R2, PT, PT, R0.reuse, R3, RZ ?trans2;
IADD3 R9, PT, PT, RZ, -R0, RZ ?trans1;
ISETP.NE.U32.AND P2, PT, R0, RZ, PT ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
BSSY.RECONVERGENT B0, 0x380 ?trans1;
ISETP.GE.AND P0, PT, R2.reuse, UR6, PT ?trans1;
VIMNMX.S32 R7, R2, UR6, !PT ?WAIT4_END_GROUP;
SEL R6, RZ, 0x1, P0 ?trans1;
MUFU.RCP R8, R8 &req={0} &wr=0x0 ?trans4;
IADD3 R7, PT, PT, R7, -R2, -R6 ?trans2;
IADD3 R4, PT, PT, R8, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R5, R4 &rd=0x0 &wr=0x2 ?trans2;
HFMA2 R4, -RZ, RZ, 0, 0 &req={0} ?trans2;
IMAD R9, R9, R5, RZ &req={2} ?WAIT4_END_GROUP;
IMAD.HI.U32 R8, R5, R9, R4 ?WAIT6_END_GROUP;
IMAD.HI.U32 R5, R8, R7, RZ ?WAIT5_END_GROUP;
IADD3 R2, PT, PT, -R5, RZ, RZ ?WAIT5_END_GROUP;
IMAD R7, R0, R2, R7 ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R7, R0, PT ?WAIT13_END_GROUP;
@P0 IADD3 R7, PT, PT, -R0, R7, RZ ?trans2;
@P0 IADD3 R5, PT, PT, R5, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R7, R0, PT ?WAIT13_END_GROUP;
@P1 IADD3 R5, PT, PT, R5, 0x1, RZ ?trans2;
@!P2 LOP3.LUT R5, RZ, R0, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R5, PT, PT, R6, R5, RZ ?WAIT4_END_GROUP;
IADD3 R2, PT, PT, R5.reuse, 0x1, RZ ?trans1;
ISETP.GE.U32.AND P1, PT, R5, 0x3, PT ?WAIT3_END_GROUP;
LOP3.LUT P0, R2, R2, 0x3, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x370 &req={1} ?trans5;
LDC.64 R12, c[0x0][0x390] &wr=0x0 ?trans1;
IADD3 R2, PT, PT, -R2, RZ, RZ ?WAIT7_END_GROUP;
LDC.64 R10, c[0x0][0x380] &wr=0x1 ?trans8;
LDC.64 R14, c[0x0][0x388] &wr=0x2 ?trans2;
IMAD.WIDE R6, R3, 0x4, R12 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R8, R3.reuse, 0x4, R14 &req={2} ?trans2;
LDG.E R7, desc[UR4][R6.64] &wr=0x2 ?trans4;
LDG.E R8, desc[UR4][R8.64] &wr=0x2 ?trans1;
IMAD.WIDE R4, R3, 0x4, R10 &req={3,1} ?trans1;
IADD3 R2, PT, PT, R2, 0x1, RZ ?trans2;
IADD3 R3, PT, PT, R0, R3, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R2, RZ, PT ?trans1;
FADD R17, R8, R7 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R17 &rd=0x3 ?trans7;
@P0 BRA 0x2c0 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
@!P1 EXIT ?trans5;
LDC.64 R4, c[0x0][0x388] &req={3} &wr=0x0 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x1 ?trans1;
IMAD.WIDE R10, R3, 0x4, R4 &req={0} ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans1;
LDG.E R2, desc[UR4][R10.64] &req={2} &wr=0x2 ?trans1;
IMAD.WIDE R12, R3, 0x4, R6 &req={1} ?WAIT5_END_GROUP;
LDG.E R7, desc[UR4][R12.64] &wr=0x2 ?trans1;
IMAD.WIDE R16, R3, 0x4, R4 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R0, 0x4, R10 ?WAIT4_END_GROUP;
FADD R19, R2, R7 &req={2} ?trans1;
IMAD.WIDE R6, R0, 0x4, R12 ?WAIT4_END_GROUP;
STG.E desc[UR4][R16.64], R19 &rd=0x0 ?trans4;
LDG.E R2, desc[UR4][R4.64] &wr=0x2 ?trans4;
LDG.E R15, desc[UR4][R6.64] &wr=0x2 ?trans1;
IMAD.WIDE R8, R0, 0x4, R16 ?WAIT4_END_GROUP;
IMAD.WIDE R10, R0, 0x4, R4 ?WAIT4_END_GROUP;
IMAD.WIDE R12, R0, 0x4, R6 ?WAIT4_END_GROUP;
FADD R21, R2, R15 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R8.64], R21 &rd=0x1 ?trans4;
LDG.E R2, desc[UR4][R10.64] &wr=0x2 ?trans4;
LDG.E R23, desc[UR4][R12.64] &wr=0x2 ?trans1;
IMAD.WIDE R14, R0, 0x4, R8 ?WAIT4_END_GROUP;
IMAD.WIDE R4, R0, 0x4, R10 ?WAIT4_END_GROUP;
IMAD.WIDE R6, R0, 0x4, R12 ?WAIT4_END_GROUP;
FADD R23, R2, R23 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R14.64], R23 &rd=0x2 ?trans4;
LDG.E R4, desc[UR4][R4.64] &wr=0x1 ?trans4;
LDG.E R7, desc[UR4][R6.64] &wr=0x1 ?trans1;
IMAD.WIDE R16, R0.reuse, 0x4, R14 &req={0} ?trans1;
IADD3 R3, PT, PT, R0, R3, R0 ?WAIT4_END_GROUP;
IADD3 R3, PT, PT, R0, R3, R0 ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R3, UR6, PT ?trans1;
FADD R9, R4, R7 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R16.64], R9 &rd=0x2 ?trans7;
@!P0 BRA 0x390 ?trans5;
EXIT ?trans5;
BRA 0x5d0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: addVectorsInto(float*, float*, float*, int)
_Z14addVectorsIntoPfS_S_i:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x2c
s_load_b32 s12, s[0:1], 0x18
s_add_u32 s2, s0, 32
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s8, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s12, v1
s_cbranch_execz .LBB1_3
s_load_b32 s9, s[2:3], 0x0
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x10
v_ashrrev_i32_e32 v2, 31, v1
s_mov_b32 s1, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
s_waitcnt lgkmcnt(0)
s_mul_i32 s8, s9, s8
s_ashr_i32 s9, s8, 31
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[10:11], s[8:9], 2
.LBB1_2:
s_delay_alu instid0(VALU_DEP_1)
v_add_co_u32 v4, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
v_add_co_u32 v6, vcc_lo, s2, v2
v_add_co_ci_u32_e32 v7, vcc_lo, s3, v3, vcc_lo
global_load_b32 v0, v[4:5], off
global_load_b32 v6, v[6:7], off
v_add_nc_u32_e32 v1, s8, v1
v_add_co_u32 v4, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
v_add_co_u32 v2, vcc_lo, v2, s10
v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
s_waitcnt vmcnt(0)
v_add_f32_e32 v0, v0, v6
v_cmp_le_i32_e64 s0, s12, v1
global_store_b32 v[4:5], v0, off
s_or_b32 s1, s0, s1
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execnz .LBB1_2
.LBB1_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| addVectorsInto | 2,418 | 845 | stackv2-00000-of-00015 |
// Demangled: initWith(float, float*, int)
Function : _Z8initWithfPfi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x390] &wr=0x2 ?trans7;
LDC R3, c[0x0][0x360] &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x370] &wr=0x3 ?trans1;
IMAD R2, R3, UR4, R2 &req={1} ?WAIT2_END_GROUP;
IMAD R0, R3, UR5, RZ &req={3} ?WAIT3_END_GROUP;
ISETP.GE.AND P0, PT, R2, UR6, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
I2F.U32.RP R7, R0 &wr=0x0 ?trans1;
MOV R13, R2 ?trans1;
IADD3 R9, PT, PT, RZ, -R0, RZ ?trans1;
HFMA2 R2, -RZ, RZ, 0, 0 ?trans1;
ISETP.NE.U32.AND P2, PT, R0.reuse, RZ, PT ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IADD3 R4, PT, PT, R0, R13, RZ ?trans1;
BSSY.RECONVERGENT B0, 0x330 ?trans4;
ISETP.GE.AND P0, PT, R4.reuse, UR6, PT ?trans1;
VIMNMX.S32 R5, R4, UR6, !PT ?trans1;
MUFU.RCP R7, R7 &req={0} &wr=0x0 ?trans3;
SEL R6, RZ, 0x1, P0 ?WAIT5_END_GROUP;
IADD3 R5, PT, PT, R5, -R4, -R6 ?trans2;
IADD3 R3, PT, PT, R7, 0xffffffe, RZ &req={0} ?WAIT6_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R3, R3 &wr=0x0 ?trans2;
IMAD R9, R9, R3, RZ &req={0} ?WAIT4_END_GROUP;
IMAD.HI.U32 R2, R3, R9, R2 ?WAIT6_END_GROUP;
IMAD.HI.U32 R3, R2, R5, RZ ?WAIT5_END_GROUP;
IADD3 R2, PT, PT, -R3, RZ, RZ ?WAIT5_END_GROUP;
IMAD R5, R0, R2, R5 ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R5, R0, PT ?WAIT13_END_GROUP;
@P0 IADD3 R5, PT, PT, -R0, R5, RZ ?trans2;
@P0 IADD3 R3, PT, PT, R3, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R5, R0, PT ?WAIT13_END_GROUP;
@P1 IADD3 R3, PT, PT, R3, 0x1, RZ ?trans2;
@!P2 LOP3.LUT R3, RZ, R0, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R3, PT, PT, R6, R3, RZ ?WAIT4_END_GROUP;
IADD3 R2, PT, PT, R3.reuse, 0x1, RZ ?trans1;
ISETP.GE.U32.AND P1, PT, R3, 0x3, PT ?WAIT3_END_GROUP;
LOP3.LUT P0, R2, R2, 0x3, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x320 &req={1} ?trans5;
LDC R7, c[0x0][0x380] &wr=0x0 ?trans1;
IADD3 R6, PT, PT, -R2, RZ, RZ ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x388] &wr=0x1 ?trans2;
IMAD.WIDE R2, R13, 0x4, R4 &req={1} ?trans1;
IADD3 R6, PT, PT, R6, 0x1, RZ ?trans2;
IADD3 R13, PT, PT, R0, R13, RZ ?trans2;
STG.E desc[UR4][R2.64], R7 &req={0} &rd=0x2 ?trans1;
ISETP.NE.AND P0, PT, R6, RZ, PT ?WAIT13_END_GROUP;
@P0 BRA 0x2c0 &req={2} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
@!P1 EXIT ?trans5;
LDC R15, c[0x0][0x380] &wr=0x0 ?trans8;
LDC.64 R8, c[0x0][0x388] &wr=0x1 ?trans2;
IMAD.WIDE R10, R13, 0x4, R8 &req={2,1} ?trans1;
IADD3 R13, PT, PT, R0, R13, R0 ?WAIT4_END_GROUP;
STG.E desc[UR4][R10.64], R15 &req={0} &rd=0x2 ?trans1;
IMAD.WIDE R2, R0.reuse, 0x4, R10 ?trans1;
IADD3 R13, PT, PT, R0, R13, R0 ?WAIT4_END_GROUP;
STG.E desc[UR4][R2.64], R15 &rd=0x2 ?trans1;
IMAD.WIDE R4, R0, 0x4, R2 ?trans1;
ISETP.GE.AND P0, PT, R13, UR6, PT ?WAIT4_END_GROUP;
STG.E desc[UR4][R4.64], R15 &rd=0x2 ?trans1;
IMAD.WIDE R6, R0, 0x4, R4 ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R15 &rd=0x2 ?trans3;
@!P0 BRA 0x360 ?trans5;
EXIT ?trans5;
BRA 0x430;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: initWith(float, float*, int)
_Z8initWithfPfi:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s6, s[0:1], 0x10
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_mov_b32 s5, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
v_cmpx_gt_i32_e64 s6, v1
s_cbranch_execz .LBB0_3
s_load_b32 s2, s[2:3], 0x0
s_clause 0x1
s_load_b64 s[8:9], s[0:1], 0x8
s_load_b32 s0, s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_mov_b32 s1, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
s_waitcnt lgkmcnt(0)
s_mul_i32 s2, s2, s4
v_add_co_u32 v2, vcc_lo, s8, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
v_mov_b32_e32 v0, s0
s_ashr_i32 s3, s2, 31
s_lshl_b64 s[4:5], s[2:3], 2
.LBB0_2:
v_add_nc_u32_e32 v1, s2, v1
global_store_b32 v[2:3], v0, off
v_add_co_u32 v2, s0, v2, s4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_add_co_ci_u32_e64 v3, s0, s5, v3, s0
v_cmp_le_i32_e32 vcc_lo, s6, v1
s_or_b32 s1, vcc_lo, s1
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execnz .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| initWith | 1,707 | 735 | stackv2-00000-of-00015 |
// Demangled: sum(float*)
Function : _Z3sumPf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x2 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x3 ?trans1;
UMOV UR6, 0x1 ?trans1;
UI2FP.F32.U32 UR4, UR4 &req={2} ?trans1;
I2FP.F32.U32 R6, R0.reuse &req={1} ?trans2;
IADD3 R0, PT, PT, R0, R0, RZ &req={3} ?WAIT9_END_GROUP;
FSETP.LT.AND P0, PT, R6, UR4, PT ?WAIT13_END_GROUP;
@P0 LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
@P0 IMAD R5, R0, UR6, RZ ?WAIT5_END_GROUP;
@P0 IADD3 R7, PT, PT, R5.reuse, UR6, RZ ?trans1;
@P0 IMAD.WIDE.U32 R4, R5, 0x4, R2 &req={1} ?WAIT4_END_GROUP;
@P0 IMAD.WIDE.U32 R2, R7, 0x4, R2 ?trans2;
@P0 LDG.E R7, desc[UR8][R4.64] &wr=0x2 ?trans4;
@P0 LDG.E R2, desc[UR8][R2.64] &wr=0x2 ?trans1;
UFMUL UR5, UR4, 0.5 ?trans1;
UFSETP.NEU.AND UP0, UPT, UR4, 1, UPT ?trans1;
UIADD3 UR6, UPT, UPT, UR6, UR6, URZ ?trans2;
UF2I.CEIL.NTZ UR5, UR5 ?WAIT4_END_GROUP;
UI2FP.F32.S32 UR5, UR5 ?WAIT4_END_GROUP;
UFSEL UR4, UR5, URZ, UP0 ?trans1;
@P0 FADD R7, R2, R7 &req={2} ?WAIT5_END_GROUP;
@P0 STG.E desc[UR8][R4.64], R7 &rd=0x1 ?trans1;
FSETP.LT.AND P0, PT, RZ, UR4, PT ?WAIT13_END_GROUP;
@P0 BRA 0x80 &req={1} ?trans5;
EXIT ?trans5;
BRA 0x1b0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: sum(float*)
_Z3sumPf:
s_load_b32 s2, s[0:1], 0x14
s_waitcnt lgkmcnt(0)
v_cmp_eq_u16_e64 s3, s2, 0
s_delay_alu instid0(VALU_DEP_1)
s_and_b32 vcc_lo, exec_lo, s3
s_cbranch_vccnz .LBB0_5
s_load_b64 s[0:1], s[0:1], 0x0
s_and_b32 s2, 0xffff, s2
v_cvt_f32_i32_e32 v2, v0
v_cvt_f32_u32_e32 v3, s2
v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v4, 1, v0
s_mov_b32 s2, 1
.LBB0_2:
s_mov_b32 s3, exec_lo
s_delay_alu instid0(VALU_DEP_2)
v_cmpx_gt_f32_e32 v3, v2
s_cbranch_execz .LBB0_4
v_mul_lo_u32 v5, v4, s2
v_mov_b32_e32 v6, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v0, s2, v5
v_lshlrev_b64 v[5:6], 2, v[5:6]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[7:8], 2, v[0:1]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v7, vcc_lo, s0, v7
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
v_add_co_u32 v5, vcc_lo, s0, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
s_clause 0x1
global_load_b32 v0, v[7:8], off
global_load_b32 v7, v[5:6], off
s_waitcnt vmcnt(0)
v_add_f32_e32 v0, v0, v7
global_store_b32 v[5:6], v0, off
.LBB0_4:
s_or_b32 exec_lo, exec_lo, s3
v_mul_f32_e32 v0, 0.5, v3
v_cmp_neq_f32_e32 vcc_lo, 1.0, v3
s_lshl_b32 s2, s2, 1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ceil_f32_e32 v0, v0
v_cvt_i32_f32_e32 v0, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f32_i32_e32 v0, v0
v_cndmask_b32_e32 v3, 0, v0, vcc_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmp_lt_f32_e32 vcc_lo, 0, v3
s_cbranch_vccnz .LBB0_2
.LBB0_5:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| sum | 714 | 944 | stackv2-00000-of-00015 |
// Demangled: bconv2d_16x16_kernel(float*, float*, float*, float*, int, int)
Function : _Z20bconv2d_16x16_kernelPfS_S_S_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R0, c[0x0][0x3a4] &wr=0x1 ?trans1;
LDCU UR9, c[0x0][0x364] &wr=0x2 ?trans1;
LDCU UR5, c[0x0][0x370] &wr=0x3 ?trans6;
LDC R11, c[0x0][0x360] &wr=0x4 ?trans1;
ISETP.GE.AND P0, PT, R0, 0x1, PT &req={1} ?WAIT13_END_GROUP;
@!P0 EXIT &req={4,3,2,0} ?trans5;
S2R R7, SR_TID.Y &wr=0x0 ?trans1;
S2UR UR8, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
IMAD R0, R11, UR5, RZ ?trans1;
S2R R8, SR_TID.X &wr=0x2 ?trans1;
LDCU UR6, c[0x0][0x374] &wr=0x3 ?trans1;
S2R R2, SR_CTAID.Y &wr=0x4 ?trans3;
S2UR UR12, SR_CTAID.X &wr=0x5 ?trans1;
UIADD3 UR5, UPT, UPT, UR4, 0x800, URZ ?trans1;
UIADD3 UR7, UPT, UPT, UR4, 0x400, URZ ?trans1;
LDCU.64 UR10, c[0x0][0x358] &wr=0x0 ?trans1;
UIMAD UR6, UR9, UR6, URZ &req={3} ?trans1;
ULEA UR4, UR8, UR4, 0x18 &req={1} ?trans1;
ULEA UR5, UR8, UR5, 0x18 ?trans1;
ULEA UR7, UR8, UR7, 0x18 ?WAIT4_END_GROUP;
LEA R4, R7.reuse, UR4, 0x6 &req={0} ?trans1;
UMOV UR4, URZ ?trans1;
LEA R5, R7.reuse, UR5, 0x7 ?trans2;
LEA R9, R7.reuse, R8.reuse, 0x5 &req={2} ?trans2;
LEA R6, R7, UR7, 0x6 ?trans2;
LEA R9, R9, UR5, 0x2 ?trans1;
IMAD R2, R2, UR9, R7 &req={4} ?trans1;
LEA R3, R7, R8, 0x4 ?trans1;
IMAD R7, R11, UR12, R8 &req={5} ?trans1;
LEA R4, R8, R4, 0x2 ?WAIT2_END_GROUP;
LEA R5, R8.reuse, R5, 0x2 ?trans2;
LEA R6, R8, R6, 0x2 ?trans2;
IADD3 R8, PT, PT, R0, R11, RZ ?trans2;
IADD3 R9, PT, PT, R9, 0x20, RZ ?WAIT7_END_GROUP;
LDC R10, c[0x0][0x3a0] &req={1} &wr=0x0 ?trans1;
STS [R5], RZ &rd=0x1 ?trans1;
HFMA2 R15, -RZ, RZ, 0, 0 ?WAIT3_END_GROUP;
STS [R5+0x40], RZ &rd=0x1 ?trans4;
STS [R5+0x800], RZ &rd=0x1 ?trans4;
STS [R5+0x840], RZ &rd=0x1 ?trans1;
ISETP.GE.AND P0, PT, R10, 0x1, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0xdc0 &req={1} ?trans5;
MOV R11, RZ ?WAIT7_END_GROUP;
LDC R10, c[0x0][0x3a4] &wr=0x0 ?trans1;
IMAD R16, R11, UR6, R2 ?trans1;
LDCU UR8, c[0x0][0x3a0] &wr=0x1 ?trans3;
IMAD R19, R0, R16, R7 ?WAIT3_END_GROUP;
LDC.64 R12, c[0x0][0x388] &wr=0x2 ?trans8;
LDC.64 R14, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD R10, R11, R10, UR4 &req={0} ?WAIT5_END_GROUP;
LEA R17, R10, R3, 0x8 ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R12, R17, 0x4, R12 &req={2} ?WAIT4_END_GROUP;
IMAD.WIDE R14, R19, 0x4, R14 &req={3} ?trans2;
LDG.E R13, desc[UR10][R12.64] &rd=0x0 &wr=0x2 ?trans4;
LDG.E R15, desc[UR10][R14.64] &wr=0x3 ?trans1;
S2UR UR7, SR_CgaCtaId &wr=0x4 ?trans1;
IADD3 R11, PT, PT, R11, 0x1, RZ ?trans1;
UMOV UR5, 0x400 ?trans1;
MOV R10, 0x3c0 ?trans1;
MOV R12, R9 &req={0} ?WAIT2_END_GROUP;
ISETP.NE.AND P0, PT, R11, UR8, PT &req={1} ?trans1;
ULEA UR5, UR7, UR5, 0x18 &req={4} ?WAIT4_END_GROUP;
UIADD3 UR5, UPT, UPT, UR5, 0x3fc, URZ ?trans1;
STS [R4], R13 &req={2} &rd=0x0 ?trans4;
STS [R6], R15 &req={3} &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R13, [R6] &req={0} ?trans1;
BSSY.RECONVERGENT B0, 0x4d0 ?trans3;
LDS R14, [UR5] &wr=0x0 ?trans2;
FMUL R13, R13, R14 &req={0} ?WAIT7_END_GROUP;
LDS R14, [R12+-0x20] &wr=0x0 ?trans2;
FADD R15, R13, R14 &req={0} ?WAIT5_END_GROUP;
ATOMS.CAST.SPIN P1, [R12+-0x20], R14, R15 &wr=0x0 ?trans2;
@!P1 BRA 0x480 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDS R13, [R6] ?trans1;
BSSY.RECONVERGENT B0, 0x560 ?trans3;
LDS R14, [UR5+-0x4] &wr=0x0 ?trans2;
FMUL R13, R13, R14 &req={0} ?WAIT7_END_GROUP;
LDS R14, [R12+-0x1c] &wr=0x0 ?trans2;
FADD R15, R13, R14 &req={0} ?WAIT5_END_GROUP;
ATOMS.CAST.SPIN P1, [R12+-0x1c], R14, R15 &wr=0x0 ?trans2;
@!P1 BRA 0x510 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDS R13, [R6] ?trans1;
BSSY.RECONVERGENT B0, 0x5f0 ?trans3;
LDS R14, [UR5+-0x8] &wr=0x0 ?trans2;
FMUL R13, R13, R14 &req={0} ?WAIT7_END_GROUP;
LDS R14, [R12+-0x18] &wr=0x0 ?trans2;
FADD R15, R13, R14 &req={0} ?WAIT5_END_GROUP;
ATOMS.CAST.SPIN P1, [R12+-0x18], R14, R15 &wr=0x0 ?trans2;
@!P1 BRA 0x5a0 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDS R13, [R6] ?trans1;
BSSY.RECONVERGENT B0, 0x680 ?trans3;
LDS R14, [UR5+-0xc] &wr=0x0 ?trans2;
FMUL R13, R13, R14 &req={0} ?WAIT7_END_GROUP;
LDS R14, [R12+-0x14] &wr=0x0 ?trans2;
FADD R15, R13, R14 &req={0} ?WAIT5_END_GROUP;
ATOMS.CAST.SPIN P1, [R12+-0x14], R14, R15 &wr=0x0 ?trans2;
@!P1 BRA 0x630 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDS R13, [R6] ?trans1;
BSSY.RECONVERGENT B0, 0x710 ?trans3;
LDS R14, [UR5+-0x10] &wr=0x0 ?trans2;
FMUL R13, R13, R14 &req={0} ?WAIT7_END_GROUP;
LDS R14, [R12+-0x10] &wr=0x0 ?trans2;
FADD R15, R13, R14 &req={0} ?WAIT5_END_GROUP;
ATOMS.CAST.SPIN P1, [R12+-0x10], R14, R15 &wr=0x0 ?trans2;
@!P1 BRA 0x6c0 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDS R13, [R6] ?trans1;
BSSY.RECONVERGENT B0, 0x7a0 ?trans3;
LDS R14, [UR5+-0x14] &wr=0x0 ?trans2;
FMUL R13, R13, R14 &req={0} ?WAIT7_END_GROUP;
LDS R14, [R12+-0xc] &wr=0x0 ?trans2;
FADD R15, R13, R14 &req={0} ?WAIT5_END_GROUP;
ATOMS.CAST.SPIN P1, [R12+-0xc], R14, R15 &wr=0x0 ?trans2;
@!P1 BRA 0x750 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDS R13, [R6] ?trans1;
BSSY.RECONVERGENT B0, 0x830 ?trans3;
LDS R14, [UR5+-0x18] &wr=0x0 ?trans2;
FMUL R13, R13, R14 &req={0} ?WAIT7_END_GROUP;
LDS R14, [R12+-0x8] &wr=0x0 ?trans2;
FADD R15, R13, R14 &req={0} ?WAIT5_END_GROUP;
ATOMS.CAST.SPIN P1, [R12+-0x8], R14, R15 &wr=0x0 ?trans2;
@!P1 BRA 0x7e0 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDS R13, [R6] ?trans1;
BSSY.RECONVERGENT B0, 0x8c0 ?trans3;
LDS R14, [UR5+-0x1c] &wr=0x0 ?trans2;
FMUL R13, R13, R14 &req={0} ?WAIT7_END_GROUP;
LDS R14, [R12+-0x4] &wr=0x0 ?trans2;
FADD R15, R13, R14 &req={0} ?WAIT5_END_GROUP;
ATOMS.CAST.SPIN P1, [R12+-0x4], R14, R15 &wr=0x0 ?trans2;
@!P1 BRA 0x870 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDS R13, [R6] ?trans1;
BSSY.RECONVERGENT B0, 0x950 ?trans3;
LDS R14, [UR5+-0x20] &wr=0x0 ?trans2;
FMUL R13, R13, R14 &req={0} ?WAIT7_END_GROUP;
LDS R14, [R12] &wr=0x0 ?trans2;
FADD R15, R13, R14 &req={0} ?WAIT5_END_GROUP;
ATOMS.CAST.SPIN P1, [R12], R14, R15 &wr=0x0 ?trans2;
@!P1 BRA 0x900 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDS R13, [R6] ?trans1;
BSSY.RECONVERGENT B0, 0x9e0 ?trans3;
LDS R14, [UR5+-0x24] &wr=0x0 ?trans2;
FMUL R13, R13, R14 &req={0} ?WAIT7_END_GROUP;
LDS R14, [R12+0x4] &wr=0x0 ?trans2;
FADD R15, R13, R14 &req={0} ?WAIT5_END_GROUP;
ATOMS.CAST.SPIN P1, [R12+0x4], R14, R15 &wr=0x0 ?trans2;
@!P1 BRA 0x990 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDS R13, [R6] ?trans1;
BSSY.RECONVERGENT B0, 0xa70 ?trans3;
LDS R14, [UR5+-0x28] &wr=0x0 ?trans2;
FMUL R13, R13, R14 &req={0} ?WAIT7_END_GROUP;
LDS R14, [R12+0x8] &wr=0x0 ?trans2;
FADD R15, R13, R14 &req={0} ?WAIT5_END_GROUP;
ATOMS.CAST.SPIN P1, [R12+0x8], R14, R15 &wr=0x0 ?trans2;
@!P1 BRA 0xa20 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDS R13, [R6] ?trans1;
BSSY.RECONVERGENT B0, 0xb00 ?trans3;
LDS R14, [UR5+-0x2c] &wr=0x0 ?trans2;
FMUL R13, R13, R14 &req={0} ?WAIT7_END_GROUP;
LDS R14, [R12+0xc] &wr=0x0 ?trans2;
FADD R15, R13, R14 &req={0} ?WAIT5_END_GROUP;
ATOMS.CAST.SPIN P1, [R12+0xc], R14, R15 &wr=0x0 ?trans2;
@!P1 BRA 0xab0 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDS R13, [R6] ?trans1;
BSSY.RECONVERGENT B0, 0xb90 ?trans3;
LDS R14, [UR5+-0x30] &wr=0x0 ?trans2;
FMUL R13, R13, R14 &req={0} ?WAIT7_END_GROUP;
LDS R14, [R12+0x10] &wr=0x0 ?trans2;
FADD R15, R13, R14 &req={0} ?WAIT5_END_GROUP;
ATOMS.CAST.SPIN P1, [R12+0x10], R14, R15 &wr=0x0 ?trans2;
@!P1 BRA 0xb40 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDS R13, [R6] ?trans1;
BSSY.RECONVERGENT B0, 0xc20 ?trans3;
LDS R14, [UR5+-0x34] &wr=0x0 ?trans2;
FMUL R13, R13, R14 &req={0} ?WAIT7_END_GROUP;
LDS R14, [R12+0x14] &wr=0x0 ?trans2;
FADD R15, R13, R14 &req={0} ?WAIT5_END_GROUP;
ATOMS.CAST.SPIN P1, [R12+0x14], R14, R15 &wr=0x0 ?trans2;
@!P1 BRA 0xbd0 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDS R13, [R6] ?trans1;
BSSY.RECONVERGENT B0, 0xcb0 ?trans3;
LDS R14, [UR5+-0x38] &wr=0x0 ?trans2;
FMUL R13, R13, R14 &req={0} ?WAIT7_END_GROUP;
LDS R14, [R12+0x18] &wr=0x0 ?trans2;
FADD R15, R13, R14 &req={0} ?WAIT5_END_GROUP;
ATOMS.CAST.SPIN P1, [R12+0x18], R14, R15 &wr=0x0 ?trans2;
@!P1 BRA 0xc60 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDS R13, [R6] ?trans1;
BSSY.RECONVERGENT B0, 0xd40 ?trans3;
LDS R14, [UR5+-0x3c] &wr=0x0 ?trans2;
FMUL R13, R13, R14 &req={0} ?WAIT7_END_GROUP;
LDS R14, [R12+0x1c] &wr=0x0 ?trans2;
FADD R15, R13, R14 &req={0} ?WAIT5_END_GROUP;
ATOMS.CAST.SPIN P1, [R12+0x1c], R14, R15 &wr=0x0 ?trans2;
@!P1 BRA 0xcf0 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R10, PT, PT, R10, -0x40, RZ ?trans1;
UIADD3 UR5, UPT, UPT, UR5, -0x40, URZ ?trans1;
IADD3 R12, PT, PT, R12, 0x80, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P1, PT, R10, -0x40, PT ?WAIT13_END_GROUP;
@P1 BRA 0x440 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 BRA 0x2d0 ?trans5;
LDS R15, [R5] &rd=0x0 &wr=0x1 ?trans2;
LDC R13, c[0x0][0x364] &wr=0x2 ?trans1;
LDS R17, [R5+0x40] &wr=0x3 ?trans4;
LDS R19, [R5+0x800] &wr=0x4 ?trans3;
LDC.64 R10, c[0x0][0x398] &wr=0x5 ?trans1;
LDS R21, [R5+0x840] &wr=0x0 ?trans7;
LDC R14, c[0x0][0x3a4] &wr=0x1 ?trans1;
IADD3 R13, PT, PT, R13, UR6, RZ &req={2} ?WAIT5_END_GROUP;
IMAD R13, R13, UR4, R2 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x1, URZ ?WAIT3_END_GROUP;
IMAD R13, R8, R13, R7 ?WAIT4_END_GROUP;
IMAD.WIDE R10, R13, 0x4, R10 &req={5} ?trans1;
SHF.L.U32 R13, R8, 0x4, RZ ?trans1;
ISETP.NE.AND P0, PT, R14, UR4, PT &req={1} ?WAIT3_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR10][R10.64], R15 &rd=0x1 ?trans1;
IMAD.WIDE R12, R13, 0x4, R10 ?WAIT3_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR10][R10.64+0x40], R17 &req={3} &rd=0x1 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR10][R12.64], R19 &req={4} &rd=0x1 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR10][R12.64+0x40], R21 &req={0} &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 BRA 0x240 ?trans5;
EXIT ?trans5;
BRA 0xf10;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: bconv2d_16x16_kernel(float*, float*, float*, float*, int, int)
_Z20bconv2d_16x16_kernelPfS_S_S_ii:
s_load_b64 s[2:3], s[0:1], 0x20
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s3, 1
s_cbranch_scc1 .LBB25_19
s_clause 0x1
s_load_b32 s11, s[0:1], 0x34
s_load_b64 s[8:9], s[0:1], 0x28
v_and_b32_e32 v5, 0x3ff, v0
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x18
v_bfe_u32 v0, v0, 10, 10
v_mov_b32_e32 v1, 0
s_mov_b32 s10, 0
v_lshlrev_b32_e32 v2, 2, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshl_add_u32 v12, v0, 4, v5
v_lshl_add_u32 v3, v0, 6, v2
v_lshl_add_u32 v13, v0, 7, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v14, 0x1400, v3
v_add_nc_u32_e32 v15, 0x1000, v3
v_add_nc_u32_e32 v16, 0x800, v13
s_waitcnt lgkmcnt(0)
s_and_b32 s17, s11, 0xffff
s_lshr_b32 s16, s11, 16
s_mul_i32 s11, s8, s17
v_mad_u64_u32 v[2:3], null, s15, s16, v[0:1]
s_add_i32 s13, s11, s17
s_cmp_gt_i32 s2, 0
v_mad_u64_u32 v[3:4], null, s14, s17, v[5:6]
s_cselect_b32 s14, -1, 0
s_lshl_b32 s8, s13, 4
s_mul_i32 s12, s9, s16
s_ashr_i32 s9, s8, 31
s_add_i32 s15, s12, s16
s_lshl_b64 s[8:9], s[8:9], 2
.LBB25_2:
v_mov_b32_e32 v6, v1
v_mov_b32_e32 v7, v1
v_mov_b32_e32 v4, v1
v_mov_b32_e32 v5, v1
s_and_not1_b32 vcc_lo, exec_lo, s14
ds_store_2addr_b32 v13, v1, v1 offset1:16
ds_store_2addr_b32 v16, v1, v1 offset1:16
s_cbranch_vccnz .LBB25_10
s_mov_b32 s16, 0
.LBB25_4:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[4:5], null, s12, s16, v[2:3]
s_mul_i32 s17, s16, s3
s_add_i32 s17, s17, s10
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshl_add_u32 v0, s17, 8, v12
s_mov_b32 s17, 0
v_mad_u64_u32 v[5:6], null, s11, v4, v[3:4]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[7:8], 2, v[0:1]
v_ashrrev_i32_e32 v6, 31, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[4:5], 2, v[5:6]
v_add_co_u32 v6, vcc_lo, s6, v7
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v7, vcc_lo, s7, v8, vcc_lo
v_add_co_u32 v4, vcc_lo, s4, v4
s_delay_alu instid0(VALU_DEP_4)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
global_load_b32 v0, v[6:7], off
global_load_b32 v4, v[4:5], off
s_waitcnt vmcnt(1)
ds_store_b32 v14, v0
s_waitcnt vmcnt(0)
ds_store_b32 v15, v4
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
ds_load_b32 v0, v15
v_mov_b32_e32 v4, v13
.LBB25_5:
s_delay_alu instid0(VALU_DEP_1)
v_mov_b32_e32 v5, v4
s_xor_b32 s18, s17, 15
s_mov_b32 s19, 0
s_lshl_b32 s18, s18, 6
.LBB25_6:
s_xor_b32 s20, s19, 15
s_add_i32 s19, s19, 1
s_lshl_b32 s20, s20, 2
s_delay_alu instid0(SALU_CYCLE_1)
s_add_i32 s20, s18, s20
s_cmp_eq_u32 s19, 16
v_mov_b32_e32 v6, s20
ds_load_b32 v6, v6 offset:5120
s_waitcnt lgkmcnt(0)
v_mul_f32_e32 v6, v0, v6
ds_add_f32 v5, v6
v_add_nc_u32_e32 v5, 4, v5
s_cbranch_scc0 .LBB25_6
v_add_nc_u32_e32 v4, 0x80, v4
s_add_i32 s17, s17, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s17, 16
s_cbranch_scc0 .LBB25_5
s_add_i32 s16, s16, 1
s_waitcnt lgkmcnt(0)
s_cmp_eq_u32 s16, s2
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB25_4
ds_load_2addr_b32 v[6:7], v13 offset1:16
ds_load_2addr_b32 v[4:5], v16 offset1:16
.LBB25_10:
v_mad_u64_u32 v[8:9], null, s15, s10, v[2:3]
s_mov_b32 s16, 0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[9:10], null, v8, s13, v[3:4]
v_ashrrev_i32_e32 v10, 31, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[8:9], 2, v[9:10]
v_add_co_u32 v8, vcc_lo, s0, v8
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v9, vcc_lo, s1, v9, vcc_lo
global_load_b32 v11, v[8:9], off
.LBB25_11:
s_waitcnt vmcnt(0)
v_add_f32_e32 v10, v11, v6
global_atomic_cmpswap_b32 v0, v[8:9], v[10:11], off glc
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, v0, v11
v_mov_b32_e32 v11, v0
s_or_b32 s16, vcc_lo, s16
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s16
s_cbranch_execnz .LBB25_11
s_or_b32 exec_lo, exec_lo, s16
global_load_b32 v11, v[8:9], off offset:64
s_mov_b32 s16, 0
.LBB25_13:
s_waitcnt vmcnt(0)
v_add_f32_e32 v10, v11, v7
global_atomic_cmpswap_b32 v0, v[8:9], v[10:11], off offset:64 glc
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, v0, v11
v_mov_b32_e32 v11, v0
s_or_b32 s16, vcc_lo, s16
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s16
s_cbranch_execnz .LBB25_13
s_or_b32 exec_lo, exec_lo, s16
v_add_co_u32 v6, vcc_lo, v8, s8
v_add_co_ci_u32_e32 v7, vcc_lo, s9, v9, vcc_lo
s_mov_b32 s16, 0
global_load_b32 v9, v[6:7], off
.LBB25_15:
s_waitcnt vmcnt(0)
v_add_f32_e32 v8, v9, v4
global_atomic_cmpswap_b32 v0, v[6:7], v[8:9], off glc
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, v0, v9
v_mov_b32_e32 v9, v0
s_or_b32 s16, vcc_lo, s16
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s16
s_cbranch_execnz .LBB25_15
s_or_b32 exec_lo, exec_lo, s16
global_load_b32 v9, v[6:7], off offset:64
s_mov_b32 s16, 0
.LBB25_17:
s_waitcnt vmcnt(0)
v_add_f32_e32 v8, v9, v5
global_atomic_cmpswap_b32 v0, v[6:7], v[8:9], off offset:64 glc
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, v0, v9
v_mov_b32_e32 v9, v0
s_or_b32 s16, vcc_lo, s16
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s16
s_cbranch_execnz .LBB25_17
s_or_b32 exec_lo, exec_lo, s16
s_add_i32 s10, s10, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s10, s3
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB25_2
.LBB25_19:
s_endpgm
| bconv2d_16x16_kernel | 5,683 | 3,189 | stackv2-00000-of-00015 |
// Demangled: broadcast_kernel(float*, float*)
Function : _Z16broadcast_kernelPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R0, SR_TID.X &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x2 ?trans8;
LDC R7, c[0x0][0x360] &wr=0x2 ?trans8;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R2, R0, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R3, desc[UR4][R2.64] &req={1} &wr=0x4 ?trans1;
IMAD R7, R7, UR6, R0 &req={2} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R7, 0x4, R4 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R3 &req={4} ?trans1;
EXIT ?trans5;
BRA 0xd0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: broadcast_kernel(float*, float*)
_Z16broadcast_kernelPfS_:
s_load_b128 s[4:7], s[0:1], 0x0
v_lshlrev_b32_e32 v1, 2, v0
s_load_b32 s0, s[0:1], 0x1c
s_waitcnt lgkmcnt(0)
global_load_b32 v3, v1, s[4:5]
s_and_b32 s0, s0, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v0, vcc_lo, s6, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
s_waitcnt vmcnt(0)
global_store_b32 v[0:1], v3, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| broadcast_kernel | 387 | 362 | stackv2-00000-of-00015 |
// Demangled: channel_max_kernel(float*, float*, int)
Function : _Z18channel_max_kernelPfS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_CTAID.Y &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x374] &wr=0x2 ?trans6;
LDC R29, c[0x0][0x370] &wr=0x2 ?trans1;
S2R R2, SR_TID.X &wr=0x3 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x4 ?trans6;
S2UR UR8, SR_CTAID.X &wr=0x1 ?trans8;
LDC R3, c[0x0][0x390] &wr=0x0 ?trans8;
LDC.64 R26, c[0x0][0x380] &wr=0x4 ?trans1;
IMAD R5, R29, UR5, RZ &req={2} ?WAIT2_END_GROUP;
IMAD R7, R29, R0, UR8 &req={1} ?trans2;
IMAD R6, R5, R2, RZ &req={3} ?trans1;
ISETP.GE.AND P0, PT, R3, 0x2, PT &req={0} ?WAIT3_END_GROUP;
IMAD R4, R6, R3, R7 ?WAIT4_END_GROUP;
IMAD.WIDE R8, R4, 0x4, R26 &req={4} ?trans1;
IADD3 R7, PT, PT, R6, R7, RZ ?WAIT4_END_GROUP;
LDG.E R25, desc[UR6][R8.64] &rd=0x0 &wr=0x5 ?trans1;
@!P0 BRA 0xd90 ?trans5;
IADD3 R6, PT, PT, R3.reuse, -0x2, RZ ?trans1;
UMOV UR4, 0x1 ?trans1;
IADD3 R8, PT, PT, R3, -0x1, RZ &req={0} ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P0, PT, R6, 0xf, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x8f0 ?trans5;
IMAD R9, R2, R3.reuse, 0x2 ?trans1;
LOP3.LUT R23, R8, 0xfffffff0, RZ, 0xc0, !PT ?trans1;
IMAD R13, R2.reuse, R3.reuse, 0x3 ?trans1;
UMOV UR4, URZ ?trans1;
IMAD R33, R2.reuse, R3.reuse, 0x4 ?trans2;
IMAD R35, R2.reuse, R3.reuse, 0x5 ?trans1;
IADD3 R23, PT, PT, -R23, RZ, RZ ?trans1;
IMAD R6, R2.reuse, R3.reuse, 0xb ?trans2;
IMAD R21, R2, R3, 0xd ?WAIT2_END_GROUP;
IMAD R37, R2.reuse, R3.reuse, 0x6 ?trans2;
IMAD R18, R2.reuse, R3.reuse, 0x7 ?trans2;
IMAD R20, R2.reuse, R3.reuse, 0x8 ?trans2;
IMAD R22, R2.reuse, R3.reuse, 0x9 ?trans2;
IMAD R24, R2.reuse, R3.reuse, 0xa ?trans2;
IMAD R31, R2, R3, 0xc ?WAIT2_END_GROUP;
IMAD R19, R2.reuse, R3.reuse, 0xe ?trans2;
IMAD R17, R2.reuse, R3.reuse, 0xf ?trans2;
IMAD R15, R2.reuse, R3.reuse, 0x10 ?trans2;
IMAD R11, R2, R3, 0x1 ?trans2;
IMAD R10, R9, UR5, R0.reuse ?trans2;
IMAD R12, R13, UR5, R0 ?WAIT2_END_GROUP;
IMAD R14, R33, UR5, R0.reuse ?trans2;
IMAD R13, R35, UR5, R0.reuse ?trans2;
IMAD R9, R6, UR5, R0.reuse ?trans2;
IMAD R34, R21, UR5, R0.reuse ?trans2;
IMAD R16, R37, UR5, R0.reuse ?trans2;
IMAD R18, R18, UR5, R0 ?WAIT2_END_GROUP;
IMAD R20, R20, UR5, R0.reuse ?trans2;
IMAD R22, R22, UR5, R0.reuse ?trans2;
IMAD R24, R24, UR5, R0.reuse ?trans2;
IMAD R36, R31, UR5, R0.reuse ?trans2;
IMAD R32, R19, UR5, R0.reuse ?trans2;
IMAD R30, R17, UR5, R0 ?WAIT2_END_GROUP;
IMAD R28, R15, UR5, R0.reuse ?trans2;
IMAD R6, R11, UR5, R0 ?trans2;
IMAD R21, R10, R29.reuse, UR8 ?trans2;
IMAD R10, R12, R29.reuse, UR8 ?trans2;
IMAD R12, R14, R29.reuse, UR8 ?trans2;
IMAD R14, R13, R29, UR8 ?WAIT2_END_GROUP;
IMAD R16, R16, R29.reuse, UR8 ?trans2;
IMAD R18, R18, R29.reuse, UR8 ?trans2;
IMAD R20, R20, R29.reuse, UR8 ?trans2;
IMAD R22, R22, R29.reuse, UR8 ?trans2;
IMAD R24, R24, R29.reuse, UR8 ?trans2;
IMAD R9, R9, R29, UR8 ?WAIT2_END_GROUP;
IMAD R11, R36, R29.reuse, UR8 ?trans2;
IMAD R13, R34, R29.reuse, UR8 ?trans2;
IMAD R15, R32, R29.reuse, UR8 ?trans2;
IMAD R17, R30, R29.reuse, UR8 ?trans2;
IMAD R19, R28, R29.reuse, UR8 ?trans2;
IMAD R6, R6, R29, UR8 ?WAIT7_END_GROUP;
IMAD.WIDE.U32 R30, R6, 0x4, R26 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R32, R21, 0x4, R26.reuse ?trans2;
LDG.E R31, desc[UR6][R30.64] &wr=0x2 ?trans4;
LDG.E R30, desc[UR6][R32.64] &rd=0x0 &wr=0x3 ?trans2;
IMAD.WIDE.U32 R32, R10, 0x4, R26 &req={0} ?WAIT5_END_GROUP;
LDG.E R34, desc[UR6][R32.64] &rd=0x0 &wr=0x4 ?trans1;
IMAD.WIDE.U32 R36, R12, 0x4, R26 ?WAIT5_END_GROUP;
LDG.E R35, desc[UR6][R36.64] &rd=0x3 &wr=0x4 ?trans1;
IMAD.WIDE.U32 R28, R14, 0x4, R26 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R32, R20, 0x4, R26 &req={0} ?WAIT6_END_GROUP;
LDG.E R32, desc[UR6][R32.64] &wr=0x4 ?trans1;
FMNMX R31, R31, R25, !PT &req={5,2} ?WAIT3_END_GROUP;
LDG.E R25, desc[UR6][R28.64] &rd=0x0 &wr=0x2 ?trans2;
FMNMX R37, R31, R30, !PT &req={3} ?trans1;
IMAD.WIDE.U32 R28, R16, 0x4, R26 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R30, R18, 0x4, R26.reuse ?trans2;
LDG.E R28, desc[UR6][R28.64] &wr=0x3 ?trans4;
LDG.E R30, desc[UR6][R30.64] &rd=0x0 &wr=0x3 ?trans1;
FMNMX R34, R37, R34, !PT &req={4} ?trans1;
IMAD.WIDE.U32 R36, R22, 0x4, R26 ?WAIT6_END_GROUP;
LDG.E R36, desc[UR6][R36.64] &wr=0x4 ?trans1;
FMNMX R31, R34, R35, !PT &req={0} ?trans1;
IMAD.WIDE.U32 R34, R24, 0x4, R26 ?WAIT6_END_GROUP;
LDG.E R34, desc[UR6][R34.64] &wr=0x4 ?trans1;
FMNMX R25, R31, R25, !PT &req={2} ?WAIT5_END_GROUP;
FMNMX R25, R25, R28, !PT &req={3} ?WAIT5_END_GROUP;
FMNMX R25, R25, R30, !PT ?trans1;
IMAD.WIDE.U32 R30, R9, 0x4, R26 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R28, R11, 0x4, R26.reuse ?trans2;
LDG.E R30, desc[UR6][R30.64] &wr=0x2 ?trans1;
FMNMX R25, R25, R32, !PT ?trans1;
IMAD.WIDE.U32 R32, R13, 0x4, R26.reuse ?trans2;
LDG.E R28, desc[UR6][R28.64] &rd=0x4 &wr=0x3 ?trans2;
FMNMX R29, R25, R36, !PT &req={4} ?trans1;
IMAD.WIDE.U32 R36, R15, 0x4, R26.reuse ?trans1;
LDG.E R25, desc[UR6][R32.64] &rd=0x0 &wr=0x4 ?trans5;
LDG.E R36, desc[UR6][R36.64] &wr=0x4 ?trans1;
FMNMX R29, R29, R34, !PT ?trans1;
IMAD.WIDE.U32 R32, R17, 0x4, R26 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R34, R19, 0x4, R26 ?trans2;
LDG.E R32, desc[UR6][R32.64] &wr=0x4 ?trans4;
LDG.E R34, desc[UR6][R34.64] &wr=0x4 ?trans1;
IADD3 R23, PT, PT, R23, 0x10, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R23, RZ, PT ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x10, URZ ?trans1;
LEA R6, R5.reuse, R6, 0x4 ?trans2;
LEA R21, R5.reuse, R21, 0x4 ?trans2;
LEA R10, R5.reuse, R10, 0x4 ?trans2;
LEA R12, R5.reuse, R12, 0x4 ?trans2;
LEA R14, R5, R14, 0x4 ?WAIT2_END_GROUP;
LEA R16, R5.reuse, R16, 0x4 ?trans2;
LEA R18, R5.reuse, R18, 0x4 ?trans2;
LEA R20, R5.reuse, R20, 0x4 ?trans2;
LEA R22, R5.reuse, R22, 0x4 ?trans2;
LEA R24, R5.reuse, R24, 0x4 ?trans2;
LEA R9, R5, R9, 0x4 ?WAIT2_END_GROUP;
LEA R11, R5.reuse, R11, 0x4 ?trans2;
LEA R13, R5.reuse, R13, 0x4 ?trans2;
LEA R15, R5.reuse, R15, 0x4 ?trans2;
LEA R17, R5.reuse, R17, 0x4 ?trans2;
LEA R19, R5, R19, 0x4 ?trans1;
FMNMX R29, R29, R30, !PT &req={2} ?WAIT5_END_GROUP;
FMNMX R28, R29, R28, !PT &req={3} ?WAIT5_END_GROUP;
FMNMX R25, R28, R25, !PT &req={4} ?WAIT5_END_GROUP;
FMNMX R25, R25, R36, !PT ?WAIT5_END_GROUP;
FMNMX R25, R25, R32, !PT ?WAIT5_END_GROUP;
FMNMX R25, R25, R34, !PT ?trans1;
@P0 BRA 0x4a0 ?trans6;
UIADD3 UR4, UPT, UPT, UR4, 0x1, URZ ?WAIT12_END_GROUP;
LOP3.LUT P0, R6, R8, 0xf, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0xd90 ?trans5;
ISETP.GE.U32.AND P0, PT, R6, 0x8, PT ?trans1;
LOP3.LUT R22, R8, 0x7, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R22, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0xb60 ?trans6;
IMAD R12, R5, UR4, R4 ?WAIT5_END_GROUP;
IADD3 R14, PT, PT, R5, R12, RZ ?trans1;
IMAD.WIDE.U32 R12, R12, 0x4, R26 ?WAIT3_END_GROUP;
IADD3 R16, PT, PT, R5.reuse, R14, RZ ?trans1;
IMAD.WIDE.U32 R14, R14, 0x4, R26.reuse ?trans1;
LDG.E R6, desc[UR6][R12.64] &rd=0x0 &wr=0x2 ?trans2;
IADD3 R18, PT, PT, R5.reuse, R16, RZ ?trans1;
IMAD.WIDE.U32 R16, R16, 0x4, R26.reuse ?trans1;
LDG.E R9, desc[UR6][R14.64] &rd=0x1 &wr=0x3 ?trans2;
IADD3 R20, PT, PT, R5.reuse, R18, RZ ?trans1;
IMAD.WIDE.U32 R18, R18, 0x4, R26.reuse ?trans2;
LDG.E R17, desc[UR6][R16.64] &wr=0x4 ?trans1;
IADD3 R23, PT, PT, R5, R20, RZ ?trans1;
IMAD.WIDE.U32 R20, R20, 0x4, R26 ?WAIT2_END_GROUP;
LDG.E R19, desc[UR6][R18.64] &wr=0x4 ?trans2;
IMAD.WIDE.U32 R10, R23, 0x4, R26.reuse ?trans1;
IADD3 R23, PT, PT, R5, R23, RZ ?trans1;
LDG.E R21, desc[UR6][R20.64] &wr=0x4 ?trans4;
IMAD.WIDE.U32 R12, R23, 0x4, R26.reuse &req={0} ?trans1;
IADD3 R15, PT, PT, R5, R23, RZ &req={1} ?trans1;
LDG.E R11, desc[UR6][R10.64] &wr=0x4 ?trans4;
IMAD.WIDE.U32 R14, R15, 0x4, R26 ?trans1;
LDG.E R13, desc[UR6][R12.64] &wr=0x4 ?trans5;
LDG.E R15, desc[UR6][R14.64] &wr=0x4 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
FMNMX R6, R25, R6, !PT &req={5,2} ?WAIT5_END_GROUP;
FMNMX R6, R6, R9, !PT &req={3} ?WAIT5_END_GROUP;
FMNMX R6, R6, R17, !PT &req={4} ?WAIT5_END_GROUP;
FMNMX R6, R6, R19, !PT ?WAIT5_END_GROUP;
FMNMX R6, R6, R21, !PT ?WAIT5_END_GROUP;
FMNMX R6, R6, R11, !PT ?WAIT5_END_GROUP;
FMNMX R6, R6, R13, !PT ?WAIT5_END_GROUP;
FMNMX R25, R6, R15, !PT ?WAIT7_END_GROUP;
@!P1 BRA 0xd90 ?trans5;
ISETP.GE.U32.AND P0, PT, R22, 0x4, PT ?trans1;
LOP3.LUT R6, R8, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R6, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0xcc0 ?trans6;
IMAD R4, R5, UR4, R4 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R8, R4, 0x4, R26 ?trans1;
IADD3 R12, PT, PT, R5, R4, RZ ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R10, R12, 0x4, R26.reuse ?trans1;
IADD3 R4, PT, PT, R5.reuse, R12, RZ ?trans1;
LDG.E R8, desc[UR6][R8.64] &wr=0x2 ?trans4;
IMAD.WIDE.U32 R12, R4, 0x4, R26.reuse ?trans1;
IADD3 R15, PT, PT, R5, R4, RZ ?trans1;
LDG.E R10, desc[UR6][R10.64] &wr=0x3 ?trans4;
IMAD.WIDE.U32 R14, R15, 0x4, R26 ?trans1;
LDG.E R12, desc[UR6][R12.64] &wr=0x4 ?trans5;
LDG.E R14, desc[UR6][R14.64] &wr=0x4 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
FMNMX R25, R25, R8, !PT &req={5,2} ?WAIT5_END_GROUP;
FMNMX R25, R25, R10, !PT &req={3} ?WAIT5_END_GROUP;
FMNMX R25, R25, R12, !PT &req={4} ?WAIT5_END_GROUP;
FMNMX R25, R25, R14, !PT ?WAIT7_END_GROUP;
@!P1 BRA 0xd90 ?trans5;
LDC R4, c[0x0][0x370] &wr=0x0 ?trans1;
IMAD R3, R2, R3, UR4 ?trans1;
IADD3 R6, PT, PT, -R6, RZ, RZ ?WAIT3_END_GROUP;
IMAD R3, R3, UR5, R0 ?WAIT4_END_GROUP;
IMAD R0, R3, R4, UR8 &req={0} ?WAIT7_END_GROUP;
IMAD.WIDE.U32 R2, R0, 0x4, R26 ?WAIT6_END_GROUP;
LDG.E R2, desc[UR6][R2.64] &wr=0x2 ?trans1;
IADD3 R6, PT, PT, R6, 0x1, RZ ?trans2;
IADD3 R0, PT, PT, R5, R0, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R6, RZ, PT ?trans1;
FMNMX R25, R2, R25, !PT &req={5,2} ?WAIT12_END_GROUP;
@P0 BRA 0xd20 ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans2;
IMAD.WIDE R2, R7, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R25 &req={5} ?trans1;
EXIT ?trans5;
BRA 0xdd0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: channel_max_kernel(float*, float*, int)
_Z18channel_max_kernelPfS_i:
s_clause 0x2
s_load_b64 s[6:7], s[0:1], 0x18
s_load_b32 s8, s[0:1], 0x10
s_load_b128 s[0:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_mul_i32 s5, s6, s7
s_mul_i32 s4, s6, s15
v_mul_lo_u32 v2, s5, v0
s_add_i32 s4, s4, s14
s_cmp_lt_i32 s8, 2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[3:4], null, v2, s8, s[4:5]
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 2, v[3:4]
v_add_co_u32 v3, vcc_lo, s0, v3
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
global_load_b32 v3, v[3:4], off
s_cbranch_scc1 .LBB8_3
v_mul_lo_u32 v0, v0, s8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v0, s7, v0
v_add3_u32 v4, s15, s7, v0
s_delay_alu instid0(VALU_DEP_1)
v_mad_u64_u32 v[0:1], null, s6, v4, s[14:15]
v_mov_b32_e32 v1, 0
s_add_i32 s6, s8, -1
.LBB8_2:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_lshlrev_b64 v[4:5], 2, v[0:1]
v_add_nc_u32_e32 v0, s5, v0
s_add_i32 s6, s6, -1
s_cmp_eq_u32 s6, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v4, vcc_lo, s0, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
global_load_b32 v4, v[4:5], off
s_waitcnt vmcnt(0)
v_dual_max_f32 v3, v3, v3 :: v_dual_max_f32 v4, v4, v4
s_delay_alu instid0(VALU_DEP_1)
v_max_f32_e32 v3, v3, v4
s_cbranch_scc0 .LBB8_2
.LBB8_3:
v_add_nc_u32_e32 v0, s4, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
s_waitcnt vmcnt(0)
global_store_b32 v[0:1], v3, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| channel_max_kernel | 5,595 | 1,065 | stackv2-00000-of-00015 |
// Demangled: channel_subtract_kernel(float*, float*, float*, int)
Function : _Z23channel_subtract_kernelPfS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R9, SR_TID.X &wr=0x0 ?trans7;
S2UR UR6, SR_CTAID.Z &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
S2R R8, SR_CTAID.Y &wr=0x2 ?trans1;
S2R R11, SR_CTAID.X &wr=0x3 ?trans5;
LDC R0, c[0x0][0x360] &wr=0x0 ?trans8;
LDC R7, c[0x0][0x374] &wr=0x2 ?trans1;
LDCU UR7, c[0x0][0x370] &wr=0x3 ?trans7;
LDC.64 R4, c[0x0][0x388] &wr=0x4 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x5 ?trans1;
IMAD R0, R0, UR6, R9 &req={0} ?WAIT2_END_GROUP;
IMAD R6, R7, UR6, R8.reuse &req={2} ?trans2;
IMAD R0, R0, R7, R8 ?trans2;
IMAD R7, R6, UR7, R11.reuse &req={3} ?trans2;
IMAD R9, R0, UR7, R11 ?trans2;
IMAD.WIDE R4, R7, 0x4, R4 &req={4} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &req={1} &wr=0x2 ?trans1;
IMAD.WIDE R2, R9, 0x4, R2 &req={5} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &wr=0x2 ?trans1;
HFMA2 R7, -RZ, RZ, 0.96630859375, -0.0022525787353515625 ?trans1;
MOV R11, 0x437c0000 ?trans1;
FADD R0, R2, -R5 &req={2} ?WAIT4_END_GROUP;
FFMA.SAT R6, R0, R7, 0.5 ?WAIT4_END_GROUP;
FFMA.RM R8, R6, R11, 12582913 ?WAIT4_END_GROUP;
FADD R7, R8, -12583039 ?WAIT4_END_GROUP;
FFMA R11, R0.reuse, 1.4426950216293334961, -R7 ?trans2;
LDC.64 R6, c[0x0][0x390] &wr=0x0 ?trans2;
FFMA R11, R0, 1.925963033500011079e-08, R11 ?WAIT6_END_GROUP;
MUFU.EX2 R11, R11 &wr=0x1 ?trans1;
SHF.L.U32 R8, R8, 0x17, RZ ?trans1;
IMAD.WIDE R2, R9, 0x4, R6 &req={0} ?WAIT4_END_GROUP;
FMUL R5, R8, R11 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R5 ?trans1;
EXIT ?trans5;
BRA 0x230;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: channel_subtract_kernel(float*, float*, float*, int)
_Z23channel_subtract_kernelPfS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b64 s[8:9], s[0:1], 0x20
s_mov_b32 s2, s13
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
v_mad_u64_u32 v[2:3], null, v1, s9, s[14:15]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[0:1], null, v2, s8, s[2:3]
s_mul_i32 s3, s9, s15
s_add_i32 s3, s3, s14
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_mul_i32 s3, s3, s8
s_add_i32 s2, s3, s13
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_ashrrev_i32_e32 v1, 31, v0
s_ashr_i32 s3, s2, 31
s_lshl_b64 s[2:3], s[2:3], 2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_add_u32 s2, s6, s2
s_addc_u32 s3, s7, s3
s_load_b32 s2, s[2:3], 0x0
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0) lgkmcnt(0)
v_subrev_f32_e32 v2, s2, v2
v_mul_f32_e32 v3, 0x3fb8aa3b, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fma_f32 v4, 0x3fb8aa3b, v2, -v3
v_rndne_f32_e32 v5, v3
v_sub_f32_e32 v3, v3, v5
v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v2
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmamk_f32 v4, v2, 0x32a5705f, v4
v_add_f32_e32 v3, v3, v4
v_cvt_i32_f32_e32 v4, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_exp_f32_e32 v3, v3
s_waitcnt_depctr 0xfff
v_ldexp_f32 v3, v3, v4
v_cndmask_b32_e32 v3, 0, v3, vcc_lo
v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v2
s_delay_alu instid0(VALU_DEP_2)
v_cndmask_b32_e32 v2, 0x7f800000, v3, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| channel_subtract_kernel | 980 | 1,227 | stackv2-00000-of-00015 |
// Demangled: channel_sum_kernel(float*, float*, int)
Function : _Z18channel_sum_kernelPfS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R0, c[0x0][0x390] &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x374] &wr=0x2 ?trans1;
S2R R3, SR_TID.X &wr=0x3 ?trans1;
HFMA2 R7, -RZ, RZ, 0, 0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x4 ?trans1;
S2R R5, SR_CTAID.Y &wr=0x0 ?trans3;
LDC R2, c[0x0][0x370] &wr=0x2 ?trans8;
S2UR UR8, SR_CTAID.X &wr=0x0 ?trans1;
ISETP.GE.AND P0, PT, R0, 0x1, PT &req={1} ?trans1;
IMAD R6, R2, UR5, RZ &req={2} ?WAIT12_END_GROUP;
@!P0 BRA 0xd80 &req={4,3,0} ?trans5;
ISETP.GE.U32.AND P0, PT, R0, 0x10, PT ?trans1;
UMOV UR4, URZ ?trans1;
MOV R7, RZ ?WAIT11_END_GROUP;
@!P0 BRA 0x890 ?trans5;
LDC.64 R24, c[0x0][0x380] &wr=0x0 ?trans1;
IMAD R4, R3.reuse, R0.reuse, 0x1 ?trans1;
LOP3.LUT R18, R0, 0x7ffffff0, RZ, 0xc0, !PT ?trans1;
IMAD R8, R3.reuse, R0.reuse, 0x2 ?trans1;
MOV R7, RZ ?trans1;
IMAD R14, R3.reuse, R0.reuse, 0x3 ?trans1;
UMOV UR4, URZ ?trans1;
IMAD R16, R3.reuse, R0.reuse, 0x4 ?trans1;
IADD3 R18, PT, PT, -R18, RZ, RZ ?trans1;
IMAD R20, R3, R0, 0x5 ?trans2;
IMAD R9, R4, UR5, R5 ?WAIT2_END_GROUP;
IMAD R22, R3.reuse, R0.reuse, 0x6 ?trans2;
IMAD R11, R8, UR5, R5.reuse ?trans2;
IMAD R26, R3.reuse, R0.reuse, 0x7 ?trans2;
IMAD R13, R14, UR5, R5.reuse ?trans2;
IMAD R28, R3, R0, 0x8 ?trans2;
IMAD R15, R16, UR5, R5 ?WAIT2_END_GROUP;
IMAD R30, R3, R0, 0x9 ?trans2;
IMAD R17, R20, UR5, R5 ?trans2;
IMAD R16, R9, R2, UR8 ?trans2;
IMAD R32, R3.reuse, R0.reuse, 0xa ?trans2;
IMAD R34, R3.reuse, R0.reuse, 0xb ?trans2;
IMAD R36, R3, R0, 0xc ?WAIT2_END_GROUP;
IMAD R35, R3.reuse, R0.reuse, 0xd ?trans2;
IMAD R12, R3.reuse, R0.reuse, 0xe ?trans2;
IMAD R10, R3.reuse, R0, 0xf ?trans2;
IMAD R27, R3, UR5, RZ ?trans2;
IMAD R19, R22, UR5, R5 ?trans2;
IMAD R9, R11, R2, UR8 ?WAIT2_END_GROUP;
IMAD R21, R26, UR5, R5.reuse ?trans2;
IMAD R11, R13, R2.reuse, UR8 ?trans2;
IMAD R23, R28, UR5, R5.reuse ?trans2;
IMAD R13, R15, R2.reuse, UR8 ?trans2;
IMAD R4, R30, UR5, R5 ?trans2;
IMAD R15, R17, R2, UR8 ?WAIT2_END_GROUP;
IMAD R33, R32, UR5, R5.reuse ?trans2;
IMAD R37, R34, UR5, R5.reuse ?trans2;
IMAD R8, R36, UR5, R5.reuse ?trans2;
IMAD R35, R35, UR5, R5.reuse ?trans2;
IMAD R31, R12, UR5, R5.reuse ?trans2;
IMAD R29, R10, UR5, R5 ?WAIT2_END_GROUP;
IMAD R27, R27, R0, R5 ?trans2;
IMAD R17, R19, R2.reuse, UR8 ?trans2;
IMAD R19, R21, R2.reuse, UR8 ?trans2;
IMAD R21, R23, R2.reuse, UR8 ?trans2;
IMAD R23, R4, R2.reuse, UR8 ?trans2;
IMAD R33, R33, R2, UR8 ?WAIT2_END_GROUP;
IMAD R37, R37, R2.reuse, UR8 ?trans2;
IMAD R8, R8, R2.reuse, UR8 ?trans2;
IMAD R10, R35, R2.reuse, UR8 ?trans2;
IMAD R12, R31, R2.reuse, UR8 ?trans2;
IMAD R14, R29, R2.reuse, UR8 ?trans2;
IMAD R4, R27, R2, UR8 &req={0} ?WAIT7_END_GROUP;
IMAD.WIDE.U32 R26, R4, 0x4, R24 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R34, R16, 0x4, R24.reuse ?trans1;
LDG.E R20, desc[UR6][R26.64] &rd=0x0 &wr=0x2 ?trans3;
IMAD.WIDE.U32 R30, R9, 0x4, R24.reuse ?trans1;
LDG.E R32, desc[UR6][R34.64] &wr=0x3 ?trans3;
IMAD.WIDE.U32 R28, R11, 0x4, R24.reuse ?trans1;
LDG.E R22, desc[UR6][R30.64] &rd=0x1 &wr=0x4 ?trans3;
IMAD.WIDE.U32 R26, R13, 0x4, R24 &req={0} ?WAIT2_END_GROUP;
LDG.E R28, desc[UR6][R28.64] &wr=0x5 ?trans2;
IMAD.WIDE.U32 R30, R15, 0x4, R24.reuse &req={1} ?trans2;
LDG.E R29, desc[UR6][R26.64] &rd=0x0 &wr=0x5 ?trans4;
LDG.E R36, desc[UR6][R30.64] &rd=0x1 &wr=0x5 ?trans1;
IMAD.WIDE.U32 R26, R17, 0x4, R24 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R34, R19, 0x4, R24.reuse ?trans2;
LDG.E R26, desc[UR6][R26.64] &wr=0x5 ?trans4;
LDG.E R34, desc[UR6][R34.64] &wr=0x5 ?trans1;
IMAD.WIDE.U32 R30, R21, 0x4, R24 &req={1} ?WAIT6_END_GROUP;
LDG.E R30, desc[UR6][R30.64] &wr=0x5 ?trans1;
FADD R7, R20, R7 &req={2} ?WAIT4_END_GROUP;
FADD R7, R7, R32 &req={3} ?WAIT4_END_GROUP;
FADD R7, R7, R22 &req={4} ?WAIT4_END_GROUP;
FADD R28, R7, R28 &req={5} ?WAIT4_END_GROUP;
FADD R7, R28, R29 ?trans1;
IMAD.WIDE.U32 R28, R23, 0x4, R24 ?WAIT4_END_GROUP;
FADD R36, R7, R36 ?trans2;
LDG.E R7, desc[UR6][R28.64] &rd=0x0 &wr=0x2 ?trans2;
IMAD.WIDE.U32 R28, R33, 0x4, R24 &req={0} ?WAIT4_END_GROUP;
FADD R35, R36, R26 ?trans1;
IMAD.WIDE.U32 R26, R37, 0x4, R24 ?trans1;
LDG.E R20, desc[UR6][R28.64] &wr=0x3 ?trans3;
FADD R32, R35, R34 ?trans1;
LDG.E R22, desc[UR6][R26.64] &rd=0x0 &wr=0x4 ?trans1;
IMAD.WIDE.U32 R34, R10, 0x4, R24 ?WAIT5_END_GROUP;
LDG.E R31, desc[UR6][R34.64] &rd=0x1 &wr=0x5 ?trans1;
IMAD.WIDE.U32 R26, R8, 0x4, R24 &req={0} ?WAIT5_END_GROUP;
LDG.E R36, desc[UR6][R26.64] &wr=0x5 ?trans1;
IMAD.WIDE.U32 R34, R12, 0x4, R24 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R28, R14, 0x4, R24 ?trans2;
LDG.E R34, desc[UR6][R34.64] &wr=0x5 ?trans4;
LDG.E R28, desc[UR6][R28.64] &wr=0x5 ?trans1;
FADD R30, R32, R30 ?trans1;
IADD3 R18, PT, PT, R18, 0x10, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R18, RZ, PT ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x10, URZ ?trans1;
LEA R4, R6.reuse, R4, 0x4 ?trans2;
LEA R16, R6.reuse, R16, 0x4 ?trans2;
LEA R9, R6.reuse, R9, 0x4 ?trans2;
LEA R11, R6.reuse, R11, 0x4 ?trans2;
LEA R13, R6, R13, 0x4 ?WAIT2_END_GROUP;
LEA R15, R6.reuse, R15, 0x4 ?trans2;
LEA R17, R6.reuse, R17, 0x4 ?trans2;
LEA R19, R6.reuse, R19, 0x4 ?trans2;
LEA R21, R6.reuse, R21, 0x4 ?trans2;
LEA R23, R6.reuse, R23, 0x4 ?trans2;
LEA R33, R6, R33, 0x4 ?WAIT2_END_GROUP;
LEA R37, R6.reuse, R37, 0x4 ?trans2;
LEA R8, R6.reuse, R8, 0x4 ?trans2;
LEA R10, R6.reuse, R10, 0x4 ?trans2;
LEA R12, R6.reuse, R12, 0x4 ?trans2;
LEA R14, R6, R14, 0x4 ?trans1;
FADD R7, R30, R7 &req={2} ?WAIT4_END_GROUP;
FADD R7, R7, R20 &req={3} ?WAIT4_END_GROUP;
FADD R7, R7, R22 &req={4} ?WAIT4_END_GROUP;
FADD R36, R7, R36 &req={5} ?WAIT4_END_GROUP;
FADD R31, R36, R31 ?WAIT4_END_GROUP;
FADD R31, R31, R34 ?WAIT4_END_GROUP;
FADD R7, R31, R28 ?trans1;
@P0 BRA 0x450 ?trans6;
LOP3.LUT P0, R4, R0, 0xf, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0xd80 ?trans5;
ISETP.GE.U32.AND P0, PT, R4, 0x8, PT ?trans1;
LOP3.LUT R10, R0, 0x7, RZ, 0xc0, !PT ?trans1;
IMAD R11, R6, R3, RZ ?trans2;
IMAD R4, R2, R5, UR8 ?trans2;
ISETP.NE.AND P1, PT, R10, RZ, PT ?trans2;
IMAD R11, R11, R0, R4 ?WAIT5_END_GROUP;
@!P0 BRA 0xb40 ?trans6;
LDC.64 R8, c[0x0][0x380] &wr=0x0 ?trans1;
IMAD R15, R6, UR4, R11 ?WAIT5_END_GROUP;
IADD3 R17, PT, PT, R6, R15, RZ ?WAIT4_END_GROUP;
IADD3 R19, PT, PT, R6, R17, RZ ?WAIT4_END_GROUP;
IADD3 R21, PT, PT, R6, R19, RZ ?trans1;
IMAD.WIDE.U32 R14, R15, 0x4, R8 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R16, R17, 0x4, R8.reuse ?trans1;
LDG.E R4, desc[UR6][R14.64] &rd=0x0 &wr=0x2 ?trans1;
IADD3 R23, PT, PT, R6.reuse, R21, RZ ?trans2;
IMAD.WIDE.U32 R18, R19, 0x4, R8.reuse ?trans2;
LDG.E R17, desc[UR6][R16.64] &wr=0x3 ?trans1;
IADD3 R13, PT, PT, R6.reuse, R23, RZ ?trans1;
IMAD.WIDE.U32 R20, R21, 0x4, R8.reuse ?trans2;
LDG.E R19, desc[UR6][R18.64] &wr=0x4 ?trans2;
IMAD.WIDE.U32 R22, R23, 0x4, R8.reuse ?trans1;
IADD3 R25, PT, PT, R6, R13, RZ ?trans1;
LDG.E R21, desc[UR6][R20.64] &wr=0x5 ?trans2;
IMAD.WIDE.U32 R12, R13, 0x4, R8 ?WAIT2_END_GROUP;
LDG.E R23, desc[UR6][R22.64] &wr=0x5 ?trans1;
IADD3 R27, PT, PT, R6, R25, RZ ?trans1;
IMAD.WIDE.U32 R14, R25, 0x4, R8.reuse &req={0} ?trans2;
LDG.E R13, desc[UR6][R12.64] &wr=0x5 ?trans2;
IMAD.WIDE.U32 R8, R27, 0x4, R8 ?trans2;
LDG.E R15, desc[UR6][R14.64] &wr=0x5 ?trans4;
LDG.E R9, desc[UR6][R8.64] &wr=0x5 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
FADD R4, R7, R4 &req={2} ?WAIT4_END_GROUP;
FADD R4, R4, R17 &req={3} ?WAIT4_END_GROUP;
FADD R4, R4, R19 &req={4} ?WAIT4_END_GROUP;
FADD R4, R4, R21 &req={5} ?WAIT4_END_GROUP;
FADD R4, R4, R23 ?WAIT4_END_GROUP;
FADD R4, R4, R13 ?WAIT4_END_GROUP;
FADD R4, R4, R15 ?WAIT4_END_GROUP;
FADD R7, R4, R9 ?WAIT7_END_GROUP;
@!P1 BRA 0xd80 ?trans5;
ISETP.GE.U32.AND P0, PT, R10, 0x4, PT ?trans1;
LOP3.LUT R4, R0, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R4, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0xcb0 ?trans6;
LDC.64 R8, c[0x0][0x380] &wr=0x0 ?trans1;
IMAD R11, R6, UR4, R11 ?WAIT5_END_GROUP;
IADD3 R13, PT, PT, R6, R11, RZ ?WAIT4_END_GROUP;
IADD3 R15, PT, PT, R6, R13, RZ ?WAIT4_END_GROUP;
IADD3 R17, PT, PT, R6, R15, RZ ?trans1;
IMAD.WIDE.U32 R10, R11, 0x4, R8 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R12, R13, 0x4, R8.reuse ?trans2;
LDG.E R10, desc[UR6][R10.64] &wr=0x2 ?trans2;
IMAD.WIDE.U32 R14, R15, 0x4, R8.reuse ?trans2;
LDG.E R12, desc[UR6][R12.64] &wr=0x3 ?trans2;
IMAD.WIDE.U32 R8, R17, 0x4, R8 ?trans2;
LDG.E R14, desc[UR6][R14.64] &wr=0x4 ?trans4;
LDG.E R8, desc[UR6][R8.64] &wr=0x5 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
FADD R7, R7, R10 &req={2} ?WAIT4_END_GROUP;
FADD R7, R7, R12 &req={3} ?WAIT4_END_GROUP;
FADD R7, R7, R14 &req={4} ?WAIT4_END_GROUP;
FADD R7, R7, R8 &req={5} ?WAIT7_END_GROUP;
@!P1 BRA 0xd80 ?trans5;
LDC.64 R10, c[0x0][0x380] &wr=0x0 ?trans1;
IMAD R0, R3, R0, UR4 ?trans1;
IADD3 R4, PT, PT, -R4, RZ, RZ ?WAIT3_END_GROUP;
IMAD R9, R0, UR5, R5 ?WAIT4_END_GROUP;
IMAD R13, R9, R2, UR8 ?WAIT7_END_GROUP;
IMAD.WIDE.U32 R8, R13, 0x4, R10 &req={0} ?WAIT6_END_GROUP;
LDG.E R8, desc[UR6][R8.64] &wr=0x2 ?trans1;
IADD3 R4, PT, PT, R4, 0x1, RZ ?trans2;
IADD3 R13, PT, PT, R6, R13, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R4, RZ, PT ?trans1;
FADD R7, R8, R7 &req={2} ?WAIT12_END_GROUP;
@P0 BRA 0xd10 ?trans5;
LDC.64 R8, c[0x0][0x388] &wr=0x0 ?trans1;
IMAD R2, R2, R5, UR8 ?WAIT4_END_GROUP;
IMAD R3, R6, R3, R2 ?WAIT4_END_GROUP;
IMAD.WIDE R2, R3, 0x4, R8 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R7 ?trans1;
EXIT ?trans5;
BRA 0xde0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: channel_sum_kernel(float*, float*, int)
_Z18channel_sum_kernelPfS_i:
s_clause 0x1
s_load_b64 s[8:9], s[0:1], 0x18
s_load_b32 s5, s[0:1], 0x10
s_mov_b32 s6, s15
s_mov_b32 s7, 0
s_waitcnt lgkmcnt(0)
s_mul_i32 s10, s8, s15
s_cmp_gt_i32 s5, 0
s_cbranch_scc1 .LBB7_2
s_add_i32 s4, s10, s14
s_mov_b32 s11, 0
s_branch .LBB7_3
.LBB7_2:
s_mov_b32 s7, -1
.LBB7_3:
s_load_b128 s[0:3], s[0:1], 0x0
s_and_not1_b32 vcc_lo, exec_lo, s7
s_mul_i32 s7, s8, s9
s_cbranch_vccnz .LBB7_6
v_mul_lo_u32 v1, v0, s9
s_add_i32 s4, s10, s14
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[3:4], null, v1, s5, s[6:7]
v_mad_u64_u32 v[1:2], null, s8, v3, s[14:15]
v_mov_b32_e32 v2, 0
s_delay_alu instid0(VALU_DEP_1)
v_mov_b32_e32 v3, v2
.LBB7_5:
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_lshlrev_b64 v[4:5], 2, v[1:2]
v_add_nc_u32_e32 v1, s7, v1
s_add_i32 s5, s5, -1
s_cmp_eq_u32 s5, 0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2)
v_add_co_u32 v4, vcc_lo, s0, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
global_load_b32 v4, v[4:5], off
s_waitcnt vmcnt(0)
v_add_f32_e32 v3, v3, v4
s_cbranch_scc0 .LBB7_5
s_branch .LBB7_7
.LBB7_6:
v_mov_b32_e32 v3, s11
.LBB7_7:
v_mad_u64_u32 v[1:2], null, s7, v0, s[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_store_b32 v[0:1], v3, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| channel_sum_kernel | 5,381 | 935 | stackv2-00000-of-00015 |
// Demangled: conv2d_16x16_kernel(float*, float*, float*, float*, int, int)
Function : _Z19conv2d_16x16_kernelPfS_S_S_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R8, c[0x0][0x3a4] &wr=0x1 ?trans1;
S2R R7, SR_TID.Y &wr=0x2 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x3 ?trans1;
S2R R20, SR_TID.X &wr=0x4 ?trans5;
LDC R0, c[0x0][0x364] &wr=0x5 ?trans1;
LDCU UR5, c[0x0][0x370] &wr=0x0 ?trans7;
LDC R3, c[0x0][0x360] &wr=0x0 ?trans1;
LDCU UR7, c[0x0][0x374] &wr=0x5 ?trans7;
S2UR UR4, SR_CTAID.Y &wr=0x2 ?trans1;
ISETP.GE.AND P0, PT, R8, 0x1, PT &req={1} ?WAIT7_END_GROUP;
S2UR UR6, SR_CTAID.X &wr=0x4 ?trans1;
IMAD R21, R0, UR7, RZ &req={5} ?trans2;
IMAD R24, R3, UR5, RZ &req={0} ?WAIT5_END_GROUP;
IADD3 R22, PT, PT, R24, R3, RZ ?trans1;
IMAD R26, R0, UR4, R7 &req={2} ?trans2;
IMAD R25, R3, UR6, R20 &req={4} ?WAIT4_END_GROUP;
IMAD R23, R26, R24, R25 ?trans2;
IMAD R24, R24, R21, RZ ?trans1;
@!P0 BRA 0xb20 &req={3} ?trans6;
ISETP.GE.U32.AND P1, PT, R8.reuse, 0x10, PT ?trans1;
LOP3.LUT R9, R8, 0xf, RZ, 0xc0, !PT ?trans1;
HFMA2 R6, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
ISETP.NE.AND P0, PT, R9, RZ, PT ?WAIT7_END_GROUP;
@!P1 BRA 0x630 ?trans6;
LOP3.LUT R16, R8, 0x7ffffff0, RZ, 0xc0, !PT ?trans1;
UMOV UR4, URZ ?trans1;
MOV R6, RZ ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x390] &req={0} &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x398] &wr=0x1 ?trans1;
IMAD.WIDE.U32 R4, R6, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
LDG.E R17, desc[UR8][R4.64] &wr=0x2 ?trans1;
IMAD R13, R24, R6, R23 ?WAIT4_END_GROUP;
IMAD.WIDE R10, R13, 0x4, R2 &req={1} ?trans1;
IADD3 R15, PT, PT, R24, R13, RZ ?WAIT4_END_GROUP;
STG.E desc[UR8][R10.64], R17 &req={2} &rd=0x0 ?trans4;
LDG.E R19, desc[UR8][R4.64+0x4] &wr=0x2 ?trans1;
IMAD.WIDE R12, R15, 0x4, R2 ?trans1;
IADD3 R29, PT, PT, R24, R15, RZ ?WAIT4_END_GROUP;
STG.E desc[UR8][R12.64], R19 &req={2} &rd=0x1 ?trans4;
LDG.E R27, desc[UR8][R4.64+0x8] &wr=0x2 ?trans1;
IMAD.WIDE R14, R29, 0x4, R2 ?trans1;
IADD3 R29, PT, PT, R24, R29, RZ ?WAIT4_END_GROUP;
STG.E desc[UR8][R14.64], R27 &req={2} &rd=0x2 ?trans4;
LDG.E R31, desc[UR8][R4.64+0xc] &wr=0x3 ?trans1;
IMAD.WIDE R10, R29, 0x4, R2 &req={0} ?trans1;
IADD3 R29, PT, PT, R24, R29, RZ ?WAIT4_END_GROUP;
STG.E desc[UR8][R10.64], R31 &req={3} &rd=0x0 ?trans4;
LDG.E R17, desc[UR8][R4.64+0x10] &wr=0x3 ?trans1;
IMAD.WIDE R12, R29, 0x4, R2 &req={1} ?trans1;
IADD3 R29, PT, PT, R24, R29, RZ ?WAIT4_END_GROUP;
STG.E desc[UR8][R12.64], R17 &req={3} &rd=0x1 ?trans4;
LDG.E R19, desc[UR8][R4.64+0x14] &wr=0x3 ?trans1;
IMAD.WIDE R14, R29, 0x4, R2 &req={2} ?trans1;
IADD3 R29, PT, PT, R24, R29, RZ ?WAIT4_END_GROUP;
STG.E desc[UR8][R14.64], R19 &req={3} &rd=0x2 ?trans4;
LDG.E R27, desc[UR8][R4.64+0x18] &wr=0x3 ?trans1;
IMAD.WIDE R10, R29, 0x4, R2 &req={0} ?trans1;
IADD3 R29, PT, PT, R24, R29, RZ ?WAIT4_END_GROUP;
STG.E desc[UR8][R10.64], R27 &req={3} &rd=0x0 ?trans4;
LDG.E R31, desc[UR8][R4.64+0x1c] &wr=0x3 ?trans1;
IMAD.WIDE R12, R29, 0x4, R2 &req={1} ?trans1;
IADD3 R29, PT, PT, R24, R29, RZ ?WAIT4_END_GROUP;
STG.E desc[UR8][R12.64], R31 &req={3} &rd=0x1 ?trans4;
LDG.E R17, desc[UR8][R4.64+0x20] &wr=0x3 ?trans1;
IMAD.WIDE R14, R29, 0x4, R2 &req={2} ?trans1;
IADD3 R29, PT, PT, R24, R29, RZ ?WAIT4_END_GROUP;
STG.E desc[UR8][R14.64], R17 &req={3} &rd=0x2 ?trans4;
LDG.E R19, desc[UR8][R4.64+0x24] &wr=0x3 ?trans1;
IMAD.WIDE R10, R29, 0x4, R2 &req={0} ?trans1;
IADD3 R29, PT, PT, R24, R29, RZ ?WAIT4_END_GROUP;
STG.E desc[UR8][R10.64], R19 &req={3} &rd=0x0 ?trans4;
LDG.E R27, desc[UR8][R4.64+0x28] &wr=0x3 ?trans1;
IMAD.WIDE R12, R29, 0x4, R2 &req={1} ?trans1;
IADD3 R29, PT, PT, R24, R29, RZ ?WAIT4_END_GROUP;
STG.E desc[UR8][R12.64], R27 &req={3} &rd=0x1 ?trans4;
LDG.E R31, desc[UR8][R4.64+0x2c] &wr=0x3 ?trans1;
IMAD.WIDE R14, R29, 0x4, R2 &req={2} ?trans1;
IADD3 R29, PT, PT, R24, R29, RZ ?WAIT4_END_GROUP;
STG.E desc[UR8][R14.64], R31 &req={3} &rd=0x2 ?trans4;
LDG.E R17, desc[UR8][R4.64+0x30] &wr=0x3 ?trans1;
IMAD.WIDE R10, R29, 0x4, R2 &req={0} ?trans1;
IADD3 R29, PT, PT, R24, R29, RZ ?WAIT4_END_GROUP;
STG.E desc[UR8][R10.64], R17 &req={3} &rd=0x0 ?trans4;
LDG.E R19, desc[UR8][R4.64+0x34] &wr=0x3 ?trans1;
IMAD.WIDE R12, R29, 0x4, R2 &req={1} ?trans1;
IADD3 R29, PT, PT, R24, R29, RZ ?WAIT4_END_GROUP;
STG.E desc[UR8][R12.64], R19 &req={3} &rd=0x0 ?trans4;
LDG.E R27, desc[UR8][R4.64+0x38] &wr=0x3 ?trans1;
IMAD.WIDE R14, R29, 0x4, R2 &req={2} ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x10, URZ ?trans1;
IADD3 R29, PT, PT, R24, R29, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R16, UR4, PT ?trans1;
STG.E desc[UR8][R14.64], R27 &req={3} &rd=0x0 ?trans4;
LDG.E R31, desc[UR8][R4.64+0x3c] &wr=0x2 ?trans1;
IMAD.WIDE R2, R29, 0x4, R2 ?trans1;
IADD3 R6, PT, PT, R6, 0x10, RZ ?WAIT4_END_GROUP;
STG.E desc[UR8][R2.64], R31 &req={2} &rd=0x0 ?trans2;
@P1 BRA 0x1c0 ?trans5;
@!P0 BRA 0xb20 ?trans5;
ISETP.GE.U32.AND P0, PT, R9, 0x8, PT ?trans1;
LOP3.LUT R16, R8, 0x7, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R16, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x8c0 ?trans6;
LDC.64 R4, c[0x0][0x390] &wr=0x1 ?trans8;
LDC.64 R2, c[0x0][0x398] &req={0} &wr=0x0 ?trans1;
IMAD.WIDE.U32 R4, R6, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
LDG.E R9, desc[UR8][R4.64] &wr=0x2 ?trans1;
IMAD R13, R24, R6, R23 ?WAIT4_END_GROUP;
IMAD.WIDE R10, R13, 0x4, R2 &req={0} ?trans1;
IADD3 R15, PT, PT, R24, R13, RZ ?WAIT4_END_GROUP;
STG.E desc[UR8][R10.64], R9 &req={2} &rd=0x0 ?trans4;
LDG.E R17, desc[UR8][R4.64+0x4] &wr=0x2 ?trans1;
IMAD.WIDE R12, R15, 0x4, R2 ?trans1;
IADD3 R27, PT, PT, R24, R15, RZ ?WAIT4_END_GROUP;
STG.E desc[UR8][R12.64], R17 &req={2} &rd=0x1 ?trans4;
LDG.E R19, desc[UR8][R4.64+0x8] &wr=0x2 ?trans1;
IMAD.WIDE R14, R27, 0x4, R2 ?trans1;
IADD3 R27, PT, PT, R24, R27, RZ ?WAIT4_END_GROUP;
STG.E desc[UR8][R14.64], R19 &req={2} &rd=0x2 ?trans4;
LDG.E R29, desc[UR8][R4.64+0xc] &wr=0x3 ?trans1;
IMAD.WIDE R10, R27, 0x4, R2 &req={0} ?trans1;
IADD3 R27, PT, PT, R24, R27, RZ ?WAIT4_END_GROUP;
STG.E desc[UR8][R10.64], R29 &req={3} &rd=0x0 ?trans4;
LDG.E R9, desc[UR8][R4.64+0x10] &wr=0x3 ?trans1;
IMAD.WIDE R12, R27, 0x4, R2 &req={1} ?trans1;
IADD3 R27, PT, PT, R24, R27, RZ ?WAIT4_END_GROUP;
STG.E desc[UR8][R12.64], R9 &req={3} &rd=0x1 ?trans4;
LDG.E R17, desc[UR8][R4.64+0x14] &wr=0x3 ?trans1;
IMAD.WIDE R14, R27, 0x4, R2 &req={2} ?trans1;
IADD3 R27, PT, PT, R24, R27, RZ ?WAIT4_END_GROUP;
STG.E desc[UR8][R14.64], R17 &req={3} &rd=0x1 ?trans4;
LDG.E R19, desc[UR8][R4.64+0x18] &wr=0x2 ?trans1;
IMAD.WIDE R10, R27, 0x4, R2 &req={0} ?trans1;
IADD3 R27, PT, PT, R24, R27, RZ ?WAIT4_END_GROUP;
STG.E desc[UR8][R10.64], R19 &req={2} &rd=0x1 ?trans4;
LDG.E R29, desc[UR8][R4.64+0x1c] &wr=0x2 ?trans1;
IMAD.WIDE R2, R27, 0x4, R2 ?trans1;
IADD3 R6, PT, PT, R6, 0x8, RZ ?WAIT4_END_GROUP;
STG.E desc[UR8][R2.64], R29 &req={2} &rd=0x1 ?trans3;
@!P1 BRA 0xb20 ?trans5;
ISETP.GE.U32.AND P0, PT, R16, 0x4, PT ?trans1;
LOP3.LUT R8, R8, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R8, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0xa50 ?trans6;
LDC.64 R4, c[0x0][0x390] &wr=0x2 ?trans8;
LDC.64 R2, c[0x0][0x398] &req={1,0} &wr=0x0 ?trans1;
IMAD.WIDE.U32 R4, R6, 0x4, R4 &req={2} ?WAIT5_END_GROUP;
LDG.E R9, desc[UR8][R4.64] &wr=0x2 ?trans1;
IMAD R13, R24, R6, R23 ?WAIT4_END_GROUP;
IMAD.WIDE R10, R13, 0x4, R2 &req={0} ?trans1;
IADD3 R15, PT, PT, R24, R13, RZ ?WAIT4_END_GROUP;
STG.E desc[UR8][R10.64], R9 &req={2} &rd=0x2 ?trans4;
LDG.E R17, desc[UR8][R4.64+0x4] &wr=0x3 ?trans1;
IMAD.WIDE R12, R15, 0x4, R2 ?trans1;
IADD3 R29, PT, PT, R24, R15, RZ ?WAIT4_END_GROUP;
STG.E desc[UR8][R12.64], R17 &req={3} &rd=0x2 ?trans4;
LDG.E R19, desc[UR8][R4.64+0x8] &wr=0x3 ?trans1;
IMAD.WIDE R14, R29, 0x4, R2 ?trans1;
IADD3 R29, PT, PT, R24, R29, RZ ?WAIT4_END_GROUP;
STG.E desc[UR8][R14.64], R19 &req={3} &rd=0x2 ?trans4;
LDG.E R27, desc[UR8][R4.64+0xc] &wr=0x3 ?trans1;
IMAD.WIDE R2, R29, 0x4, R2 ?trans1;
IADD3 R6, PT, PT, R6, 0x4, RZ ?WAIT4_END_GROUP;
STG.E desc[UR8][R2.64], R27 &req={3} &rd=0x2 ?trans3;
@!P1 BRA 0xb20 ?trans5;
LDC.64 R2, c[0x0][0x390] &req={2,1,0} &wr=0x0 ?trans1;
UMOV UR4, URZ ?WAIT7_END_GROUP;
LDC.64 R10, c[0x0][0x398] &wr=0x1 ?trans2;
IMAD.WIDE.U32 R4, R6, 0x4, R2 &req={3,0} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR8][R4.64] &wr=0x2 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x1, URZ ?trans1;
IMAD R13, R24, R6, R23 ?trans1;
IADD3 R6, PT, PT, R6, 0x1, RZ ?WAIT3_END_GROUP;
IMAD.WIDE R12, R13, 0x4, R10 &req={1} ?trans1;
ISETP.NE.AND P0, PT, R8, UR4, PT ?WAIT4_END_GROUP;
STG.E desc[UR8][R12.64], R5 &req={2} &rd=0x3 ?trans9;
@P0 BRA 0xa90 ?trans5;
LDC R2, c[0x0][0x3a0] &req={2,1,0} &wr=0x0 ?trans8;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.AND P0, PT, R2, 0x1, PT &req={0} ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
S2UR UR7, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR4, 0x400 ?trans1;
LEA R2, R7, R20, 0x5 ?trans1;
UIADD3 UR5, UPT, UPT, UR4, 0x400, URZ ?trans1;
IADD3 R21, PT, PT, R21, R0, RZ ?trans2;
LEA R6, R7, R20, 0x4 ?trans1;
ULEA UR6, UR7, UR4, 0x18 &req={0} ?trans1;
ULEA UR5, UR7, UR5, 0x18 ?trans2;
UMOV UR4, URZ ?WAIT3_END_GROUP;
LEA R5, R7.reuse, UR6, 0x6 &req={3} ?trans2;
LEA R2, R2, UR5, 0x2 ?trans2;
LEA R3, R7, UR5, 0x7 ?trans2;
LEA R0, R20.reuse, R5, 0x2 ?trans2;
LEA R20, R20, R3, 0x2 ?trans2;
SHF.L.U32 R7, R22, 0x4, RZ ?WAIT2_END_GROUP;
IADD3 R2, PT, PT, R2, 0x80, RZ ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x380] &req={1} &wr=0x0 ?trans1;
IMAD R3, R21, UR4, R26 ?WAIT4_END_GROUP;
IMAD R3, R22, R3, R25 ?WAIT3_END_GROUP;
LDC R10, c[0x0][0x3a4] &wr=0x1 ?trans1;
IMAD.WIDE R4, R3, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
LDG.E R3, desc[UR8][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE R8, R7, 0x4, R4 ?WAIT3_END_GROUP;
LDG.E R11, desc[UR8][R4.64+0x40] &wr=0x3 ?trans4;
LDG.E R13, desc[UR8][R8.64] &wr=0x4 ?trans4;
LDG.E R15, desc[UR8][R8.64+0x40] &wr=0x5 ?trans1;
ISETP.GE.AND P0, PT, R10, 0x1, PT &req={1} ?WAIT3_END_GROUP;
STS [R20], R3 &req={2} &rd=0x0 ?trans4;
STS [R20+0x40], R11 &req={3} &rd=0x0 ?trans4;
STS [R20+0x800], R13 &req={4} &rd=0x0 ?trans4;
STS [R20+0x840], R15 &req={5} &rd=0x0 ?trans1;
@!P0 BRA 0x13b0 ?trans5;
HFMA2 R3, -RZ, RZ, 0, 0 &req={0} ?WAIT7_END_GROUP;
LDC R4, c[0x0][0x3a0] &req={1} &wr=0x0 ?trans8;
LDC.64 R8, c[0x0][0x388] &wr=0x1 ?trans1;
IMAD R5, R3, R4, UR4 &req={0} ?WAIT5_END_GROUP;
LEA R5, R5, R6, 0x8 ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R8, R5, 0x4, R8 &req={1} ?WAIT6_END_GROUP;
LDG.E R9, desc[UR8][R8.64] &wr=0x2 ?trans1;
MOV R17, RZ ?trans1;
MOV R4, 0x40 ?trans1;
MOV R5, R2 ?trans1;
UIADD3 UR5, UPT, UPT, UR6, 0x40, URZ ?trans1;
STS [R0], R9 &req={2} &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans10;
LDS R16, [R5+-0x80] ?trans1;
IADD3 R4, PT, PT, R4, 0x80, RZ ?WAIT3_END_GROUP;
LDS.128 R8, [UR5+-0x40] &req={0} &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R4, 0x440, PT ?trans2;
LDS R19, [R5+-0x7c] &wr=0x1 ?trans4;
LDS R27, [R5+-0x78] &wr=0x2 ?trans4;
LDS R32, [R5+-0x74] &wr=0x3 ?trans4;
LDS R33, [R5+-0x70] ?trans4;
LDS.128 R12, [UR5+-0x30] &wr=0x4 ?trans4;
LDS R30, [R5+-0x6c] &wr=0x5 ?trans4;
LDS R29, [R5+-0x68] &wr=0x5 ?trans4;
LDS R28, [R5+-0x64] &wr=0x5 ?trans4;
LDS R31, [R5+-0x60] ?trans1;
FFMA R8, R16, R8, R17 &req={0} ?WAIT3_END_GROUP;
LDS R34, [R5+-0x5c] ?trans1;
FFMA R8, R19, R9, R8 &req={1} ?WAIT3_END_GROUP;
LDS R35, [R5+-0x50] ?trans1;
FFMA R27, R27, R10, R8 &req={2} ?WAIT3_END_GROUP;
LDS.128 R16, [UR5+-0x20] &wr=0x0 ?trans1;
FFMA R32, R32, R11, R27 &req={3} ?WAIT3_END_GROUP;
LDS R27, [R5+-0x58] &wr=0x1 ?trans4;
LDS.128 R8, [UR5+-0x10] ?trans1;
FFMA R33, R33, R12, R32 &req={4} ?WAIT3_END_GROUP;
LDS R32, [R5+-0x54] &wr=0x2 ?trans1;
FFMA R12, R30, R13, R33 &req={5} ?WAIT3_END_GROUP;
LDS R30, [R5+-0x4c] &wr=0x3 ?trans1;
FFMA R29, R29, R14, R12 ?WAIT3_END_GROUP;
LDS R33, [R5] ?trans1;
FFMA R28, R28, R15, R29 ?WAIT3_END_GROUP;
LDS R29, [R5+-0x48] &wr=0x4 ?trans4;
LDS.128 R12, [UR5] ?trans1;
FFMA R31, R31, R16, R28 &req={0} ?WAIT3_END_GROUP;
LDS R28, [R5+-0x44] &wr=0x0 ?trans1;
FFMA R34, R34, R17, R31 ?WAIT3_END_GROUP;
LDS R31, [R5+0x8] ?trans1;
FFMA R27, R27, R18, R34 &req={1} ?WAIT3_END_GROUP;
LDS R34, [R5+0x4] &wr=0x1 ?trans1;
FFMA R32, R32, R19, R27 &req={2} ?WAIT3_END_GROUP;
LDS.128 R16, [UR5+0x10] ?trans1;
FFMA R35, R35, R8, R32 ?WAIT3_END_GROUP;
LDS R32, [R5+0xc] &wr=0x2 ?trans1;
FFMA R8, R30, R9, R35 &req={3} ?WAIT3_END_GROUP;
LDS R35, [R5+0x10] &wr=0x3 ?trans1;
FFMA R29, R29, R10, R8 &req={4} ?WAIT3_END_GROUP;
LDS R30, [R5+0x14] &wr=0x4 ?trans4;
LDS R27, [R5+0x18] &wr=0x5 ?trans1;
FFMA R28, R28, R11, R29 &req={0} ?WAIT3_END_GROUP;
LDS R29, [R5+0x20] ?trans1;
FFMA R33, R33, R12, R28 ?WAIT3_END_GROUP;
LDS R28, [R5+0x1c] &wr=0x0 ?trans1;
FFMA R34, R34, R13, R33 &req={1} ?WAIT3_END_GROUP;
LDS.128 R8, [UR5+0x20] &wr=0x1 ?trans1;
FFMA R31, R31, R14, R34 ?WAIT3_END_GROUP;
LDS R34, [R5+0x24] &wr=0x1 ?trans1;
FFMA R32, R32, R15, R31 &req={2} ?WAIT3_END_GROUP;
LDS R31, [R5+0x28] &wr=0x2 ?trans1;
FFMA R35, R35, R16, R32 &req={3} ?WAIT3_END_GROUP;
LDS R16, [R5+0x2c] &wr=0x3 ?trans1;
FFMA R30, R30, R17, R35 &req={4} ?WAIT3_END_GROUP;
LDS R17, [R5+0x30] ?trans1;
FFMA R33, R27, R18, R30 &req={5} ?WAIT3_END_GROUP;
LDS.128 R12, [UR5+0x30] &wr=0x4 ?trans1;
UIADD3 UR5, UPT, UPT, UR5, 0x80, URZ ?WAIT3_END_GROUP;
LDS R30, [R5+0x34] &wr=0x5 ?trans4;
LDS R27, [R5+0x38] &wr=0x5 ?trans4;
LDS R18, [R5+0x3c] &rd=0x1 &wr=0x5 ?trans1;
FFMA R28, R28, R19, R33 &req={0} ?WAIT4_END_GROUP;
FFMA R29, R29, R8, R28 &req={1} ?trans1;
IADD3 R5, PT, PT, R5, 0x100, RZ ?WAIT3_END_GROUP;
FFMA R34, R34, R9, R29 ?WAIT4_END_GROUP;
FFMA R31, R31, R10, R34 &req={2} ?WAIT4_END_GROUP;
FFMA R16, R16, R11, R31 &req={3} ?WAIT4_END_GROUP;
FFMA R17, R17, R12, R16 &req={4} ?WAIT4_END_GROUP;
FFMA R30, R30, R13, R17 &req={5} ?WAIT4_END_GROUP;
FFMA R27, R27, R14, R30 ?WAIT4_END_GROUP;
FFMA R17, R18, R15, R27 ?trans1;
@P0 BRA 0xe30 ?trans6;
LDC.64 R4, c[0x0][0x398] &wr=0x0 ?trans1;
IMAD R9, R24, R3, R23 ?trans1;
LDCU UR5, c[0x0][0x3a4] &wr=0x1 ?trans3;
IMAD.WIDE R4, R9, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
LDG.E R8, desc[UR8][R4.64] &wr=0x2 ?trans1;
IADD3 R3, PT, PT, R3, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R3, UR5, PT &req={1} ?trans1;
FADD R17, R17, R8 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR8][R4.64], R17 &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 BRA 0xd70 ?trans5;
LDC R3, c[0x0][0x3a0] &req={0} &wr=0x0 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x1, URZ ?WAIT6_END_GROUP;
ISETP.NE.AND P0, PT, R3, UR4, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0xc60 ?trans5;
EXIT ?trans5;
BRA 0x1400;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: conv2d_16x16_kernel(float*, float*, float*, float*, int, int)
_Z19conv2d_16x16_kernelPfS_S_S_ii:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x34
s_load_b128 s[16:19], s[0:1], 0x20
s_load_b256 s[4:11], s[0:1], 0x0
v_bfe_u32 v4, v0, 10, 10
v_and_b32_e32 v5, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s0, s2, 16
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(VALU_DEP_1)
v_mad_u64_u32 v[0:1], null, s15, s0, v[4:5]
v_mad_u64_u32 v[1:2], null, s14, s2, v[5:6]
s_mul_i32 s12, s18, s2
s_cmp_gt_i32 s17, 0
s_mul_i32 s13, s19, s0
s_cselect_b32 s3, -1, 0
s_cmp_lt_i32 s17, 1
s_mul_i32 s1, s13, s12
s_delay_alu instid0(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, s12, v0, v[1:2]
s_cbranch_scc1 .LBB24_3
s_delay_alu instid0(VALU_DEP_1)
v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v6, v2
s_mov_b32 s14, s17
.LBB24_2:
global_load_b32 v9, v3, s[8:9]
v_ashrrev_i32_e32 v7, 31, v6
s_add_i32 s14, s14, -1
s_add_u32 s8, s8, 4
s_addc_u32 s9, s9, 0
s_cmp_eq_u32 s14, 0
v_lshlrev_b64 v[7:8], 2, v[6:7]
v_add_nc_u32_e32 v6, s1, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v7, vcc_lo, s10, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s11, v8, vcc_lo
s_waitcnt vmcnt(0)
global_store_b32 v[7:8], v9, off
s_cbranch_scc0 .LBB24_2
.LBB24_3:
s_cmp_lt_i32 s16, 1
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB24_13
v_lshlrev_b32_e32 v3, 2, v5
v_lshlrev_b32_e32 v7, 6, v4
v_cndmask_b32_e64 v8, 0, 1, s3
s_add_i32 s8, s12, s2
s_add_i32 s9, s13, s0
v_lshl_add_u32 v6, v4, 7, v3
s_lshl_b32 s2, s8, 4
v_lshl_add_u32 v5, v4, 4, v5
v_mov_b32_e32 v4, 0
v_add3_u32 v7, v7, v3, 0x1000
v_cmp_ne_u32_e64 s0, 1, v8
v_add_nc_u32_e32 v8, 0x800, v6
s_ashr_i32 s3, s2, 31
s_mov_b32 s12, 0
s_lshl_b64 s[2:3], s[2:3], 2
.LBB24_5:
v_mad_u64_u32 v[9:10], null, s9, s12, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[10:11], null, v9, s8, v[1:2]
v_ashrrev_i32_e32 v11, 31, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[9:10], 2, v[10:11]
v_add_co_u32 v9, vcc_lo, s4, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v10, vcc_lo, s5, v10, vcc_lo
v_add_co_u32 v11, vcc_lo, v9, s2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v12, vcc_lo, s3, v10, vcc_lo
s_and_b32 vcc_lo, exec_lo, s0
s_clause 0x3
global_load_b32 v3, v[9:10], off
global_load_b32 v9, v[9:10], off offset:64
global_load_b32 v10, v[11:12], off
global_load_b32 v11, v[11:12], off offset:64
s_waitcnt vmcnt(2)
ds_store_2addr_b32 v6, v3, v9 offset1:16
s_waitcnt vmcnt(0)
ds_store_2addr_b32 v8, v10, v11 offset1:16
s_cbranch_vccnz .LBB24_12
s_mov_b32 s13, 0
.LBB24_7:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
s_mul_i32 s14, s13, s16
s_mov_b32 s15, 0
s_add_i32 s14, s14, s12
v_lshl_add_u32 v3, s14, 8, v5
s_movk_i32 s14, 0x1000
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[9:10], 2, v[3:4]
v_mov_b32_e32 v3, 0
v_add_co_u32 v9, vcc_lo, s6, v9
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo
global_load_b32 v10, v[9:10], off
v_mov_b32_e32 v9, v6
s_waitcnt vmcnt(0)
ds_store_b32 v7, v10
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB24_8:
s_mov_b32 s18, 0
.LBB24_9:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s19, s14, s18
v_dual_mov_b32 v11, s19 :: v_dual_add_nc_u32 v10, s18, v9
s_add_i32 s18, s18, 4
ds_load_b32 v10, v10
ds_load_b32 v11, v11
s_cmp_eq_u32 s18, 64
s_waitcnt lgkmcnt(0)
v_fmac_f32_e32 v3, v10, v11
s_cbranch_scc0 .LBB24_9
v_add_nc_u32_e32 v9, 0x80, v9
s_add_i32 s15, s15, 1
s_add_i32 s14, s14, 64
s_cmp_eq_u32 s15, 16
s_cbranch_scc0 .LBB24_8
v_mad_u64_u32 v[9:10], null, s13, s1, v[2:3]
s_add_i32 s13, s13, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_cmp_eq_u32 s13, s17
v_ashrrev_i32_e32 v10, 31, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[9:10], 2, v[9:10]
v_add_co_u32 v9, vcc_lo, s10, v9
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v10, vcc_lo, s11, v10, vcc_lo
global_load_b32 v11, v[9:10], off
s_waitcnt vmcnt(0)
v_add_f32_e32 v3, v3, v11
global_store_b32 v[9:10], v3, off
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB24_7
.LBB24_12:
s_add_i32 s12, s12, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s12, s16
s_cbranch_scc0 .LBB24_5
.LBB24_13:
s_endpgm
| conv2d_16x16_kernel | 8,482 | 2,610 | stackv2-00000-of-00015 |
// Demangled: design_2_image_kernel(float*, float*)
Function : _Z21design_2_image_kernelPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_TID.Y &wr=0x1 ?trans7;
S2UR UR5, SR_CTAID.Y &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x2 ?trans1;
S2R R7, SR_CTAID.X &wr=0x3 ?trans1;
S2R R6, SR_TID.X &wr=0x3 ?trans5;
LDC R0, c[0x0][0x364] &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x4 ?trans1;
LDCU UR7, c[0x0][0x360] &wr=0x4 ?trans6;
LDC.64 R2, c[0x0][0x380] &wr=0x5 ?trans1;
UIMAD UR6, UR4, UR7, URZ &req={4} ?trans1;
IMAD R0, R0, UR5, R5 &req={1} ?trans1;
UIADD3 UR5, UPT, UPT, UR4, 0x1, URZ ?trans1;
UIMAD UR4, UR4, UR7, UR7 ?WAIT3_END_GROUP;
IADD3 R4, PT, PT, R0, -0x8, RZ ?trans1;
IMAD R5, R7, UR7, R6 &req={3} ?trans1;
IADD.64 R2, R2, 0x20 &req={5} ?WAIT3_END_GROUP;
IMAD R4, R4, UR5, R7 ?trans2;
IMAD R5, R0, UR6, R5 ?trans2;
HFMA2 R0, -RZ, RZ, 0, 0 ?trans2;
IMAD R6, R4, UR7, R6 ?trans2;
IMAD.SHL.U32 R7, R5, 0x100, RZ &req={2,0} ?WAIT7_END_GROUP;
IMAD.WIDE R10, R7, 0x4, R2 &req={4} ?trans1;
LDC.64 R8, c[0x0][0x388] &wr=0x0 ?trans4;
LDG.E R13, desc[UR8][R10.64+-0x20] &wr=0x2 ?trans1;
IADD3 R5, PT, PT, R6, -0x8, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R4, R5, 0x4, R8 &req={0} ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R4.64], R13 &req={2} &rd=0x0 ?trans4;
LDG.E R15, desc[UR8][R10.64+-0x1c] &wr=0x2 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R4.64+0x4], R15 &req={2} &rd=0x1 ?trans4;
LDG.E R17, desc[UR8][R10.64+-0x18] &wr=0x2 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R4.64+0x8], R17 &req={2} &rd=0x2 ?trans4;
LDG.E R19, desc[UR8][R10.64+-0x14] &wr=0x3 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R4.64+0xc], R19 &req={3} &rd=0x3 ?trans4;
LDG.E R21, desc[UR8][R10.64+-0x10] &wr=0x4 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R4.64+0x10], R21 &req={4} &rd=0x4 ?trans4;
LDG.E R23, desc[UR8][R10.64+-0xc] &wr=0x5 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R4.64+0x14], R23 &req={5} &rd=0x5 ?trans4;
LDG.E R13, desc[UR8][R10.64+-0x8] &req={0} &wr=0x2 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R4.64+0x18], R13 &req={2} ?trans4;
LDG.E R15, desc[UR8][R10.64+-0x4] &req={1} &wr=0x2 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R4.64+0x1c], R15 &req={2} ?trans4;
LDG.E R17, desc[UR8][R10.64] &wr=0x2 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R4.64+0x20], R17 &req={2} &rd=0x0 ?trans4;
LDG.E R19, desc[UR8][R10.64+0x4] &req={3} &wr=0x2 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R4.64+0x24], R19 &req={2} &rd=0x1 ?trans4;
LDG.E R21, desc[UR8][R10.64+0x8] &req={4} &wr=0x2 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R4.64+0x28], R21 &req={2} &rd=0x2 ?trans4;
LDG.E R23, desc[UR8][R10.64+0xc] &req={5} &wr=0x3 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R4.64+0x2c], R23 &req={3} &rd=0x3 ?trans4;
LDG.E R25, desc[UR8][R10.64+0x10] &wr=0x4 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R4.64+0x30], R25 &req={4} ?trans4;
LDG.E R27, desc[UR8][R10.64+0x14] &wr=0x4 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R4.64+0x34], R27 &req={4} ?trans4;
LDG.E R17, desc[UR8][R10.64+0x18] &req={0} &wr=0x4 ?trans1;
IADD3 R13, PT, PT, R7, 0x10, RZ ?WAIT3_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R4.64+0x38], R17 &req={4} &rd=0x0 ?trans4;
LDG.E R19, desc[UR8][R10.64+0x1c] &req={1} &wr=0x4 ?trans1;
IMAD.WIDE R12, R13, 0x4, R2 ?trans1;
IADD3 R6, PT, PT, R6, UR4, RZ ?WAIT4_END_GROUP;
IADD3 R15, PT, PT, R6, -0x8, RZ ?trans1;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R4.64+0x3c], R19 &req={4} &rd=0x1 ?trans4;
LDG.E R21, desc[UR8][R12.64+-0x20] &req={2} &wr=0x2 ?trans1;
IMAD.WIDE R14, R15, 0x4, R8 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R14.64], R21 &req={2} &rd=0x2 ?trans4;
LDG.E R23, desc[UR8][R12.64+-0x1c] &req={3} &wr=0x3 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R14.64+0x4], R23 &req={3} &rd=0x3 ?trans4;
LDG.E R11, desc[UR8][R12.64+-0x18] &wr=0x4 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R14.64+0x8], R11 &req={4} &rd=0x4 ?trans4;
LDG.E R17, desc[UR8][R12.64+-0x14] &req={0} &wr=0x5 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R14.64+0xc], R17 &req={5} &rd=0x0 ?trans4;
LDG.E R5, desc[UR8][R12.64+-0x10] &req={1} &wr=0x5 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R14.64+0x10], R5 &req={5} &rd=0x1 ?trans4;
LDG.E R19, desc[UR8][R12.64+-0xc] &wr=0x5 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R14.64+0x14], R19 &req={5} &rd=0x5 ?trans4;
LDG.E R21, desc[UR8][R12.64+-0x8] &req={2} &wr=0x2 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R14.64+0x18], R21 &req={2} &rd=0x2 ?trans4;
LDG.E R23, desc[UR8][R12.64+-0x4] &req={3} &wr=0x3 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R14.64+0x1c], R23 &req={3} &rd=0x3 ?trans4;
LDG.E R11, desc[UR8][R12.64] &req={4} &wr=0x4 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R14.64+0x20], R11 &req={4} &rd=0x4 ?trans4;
LDG.E R17, desc[UR8][R12.64+0x4] &req={0} &wr=0x2 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R14.64+0x24], R17 &req={2} &rd=0x0 ?trans4;
LDG.E R5, desc[UR8][R12.64+0x8] &req={1} &wr=0x2 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R14.64+0x28], R5 &req={2} &rd=0x1 ?trans4;
LDG.E R19, desc[UR8][R12.64+0xc] &req={5} &wr=0x2 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R14.64+0x2c], R19 &req={2} &rd=0x2 ?trans4;
LDG.E R21, desc[UR8][R12.64+0x10] &wr=0x5 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R14.64+0x30], R21 &req={5} &rd=0x5 ?trans4;
LDG.E R23, desc[UR8][R12.64+0x14] &req={3} &wr=0x3 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R14.64+0x34], R23 &req={3} ?trans4;
LDG.E R25, desc[UR8][R12.64+0x18] &wr=0x3 ?trans1;
IADD3 R11, PT, PT, R7, 0x20, RZ &req={4} ?WAIT3_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R14.64+0x38], R25 &req={3} ?trans4;
LDG.E R27, desc[UR8][R12.64+0x1c] &wr=0x3 ?trans1;
IMAD.WIDE R10, R11, 0x4, R2 ?trans1;
IADD3 R6, PT, PT, R6, UR4, RZ ?WAIT4_END_GROUP;
IADD3 R17, PT, PT, R6, -0x8, RZ &req={0} ?trans1;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R14.64+0x3c], R27 &req={3} &rd=0x0 ?trans4;
LDG.E R5, desc[UR8][R10.64+-0x20] &req={1} &wr=0x3 ?trans1;
IMAD.WIDE R16, R17, 0x4, R8 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R16.64], R5 &req={3} &rd=0x1 ?trans4;
LDG.E R19, desc[UR8][R10.64+-0x1c] &req={2} &wr=0x2 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R16.64+0x4], R19 &req={2} &rd=0x2 ?trans4;
LDG.E R13, desc[UR8][R10.64+-0x18] &wr=0x3 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R16.64+0x8], R13 &req={3} &rd=0x3 ?trans4;
LDG.E R21, desc[UR8][R10.64+-0x14] &req={5} &wr=0x4 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R16.64+0xc], R21 &req={4} &rd=0x4 ?trans4;
LDG.E R15, desc[UR8][R10.64+-0x10] &req={0} &wr=0x5 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R16.64+0x10], R15 &req={5} &rd=0x0 ?trans4;
LDG.E R23, desc[UR8][R10.64+-0xc] &wr=0x5 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R16.64+0x14], R23 &req={5} &rd=0x5 ?trans4;
LDG.E R5, desc[UR8][R10.64+-0x8] &req={1} &wr=0x2 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R16.64+0x18], R5 &req={2} ?trans4;
LDG.E R19, desc[UR8][R10.64+-0x4] &wr=0x2 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R16.64+0x1c], R19 &req={2} &rd=0x1 ?trans4;
LDG.E R13, desc[UR8][R10.64] &req={3} &wr=0x2 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R16.64+0x20], R13 &req={2} ?trans4;
LDG.E R21, desc[UR8][R10.64+0x4] &req={4} &wr=0x2 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R16.64+0x24], R21 &req={2} &rd=0x2 ?trans4;
LDG.E R15, desc[UR8][R10.64+0x8] &req={0} &wr=0x3 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R16.64+0x28], R15 &req={3} &rd=0x0 ?trans4;
LDG.E R23, desc[UR8][R10.64+0xc] &req={5} &wr=0x3 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R16.64+0x2c], R23 &req={3} ?trans4;
LDG.E R25, desc[UR8][R10.64+0x10] &wr=0x3 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R16.64+0x30], R25 &req={3} ?trans4;
LDG.E R19, desc[UR8][R10.64+0x14] &req={1} &wr=0x3 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R16.64+0x34], R19 &req={3} &rd=0x1 ?trans4;
LDG.E R27, desc[UR8][R10.64+0x18] &wr=0x3 ?trans1;
IADD3 R5, PT, PT, R7, 0x30, RZ ?WAIT3_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R16.64+0x38], R27 &req={3} ?trans4;
LDG.E R21, desc[UR8][R10.64+0x1c] &req={2} &wr=0x2 ?trans1;
IMAD.WIDE R4, R5, 0x4, R2 ?trans1;
IADD3 R6, PT, PT, R6, UR4, RZ ?WAIT4_END_GROUP;
IADD3 R13, PT, PT, R6, -0x8, RZ ?trans1;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R16.64+0x3c], R21 &req={2} &rd=0x2 ?trans4;
LDG.E R15, desc[UR8][R4.64+-0x20] &req={0} &wr=0x3 ?trans1;
IMAD.WIDE R8, R13, 0x4, R8 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R8.64], R15 &req={3} &rd=0x0 ?trans4;
LDG.E R13, desc[UR8][R4.64+-0x1c] &wr=0x3 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R8.64+0x4], R13 &req={3} &rd=0x3 ?trans4;
LDG.E R11, desc[UR8][R4.64+-0x18] &wr=0x4 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R8.64+0x8], R11 &req={4} &rd=0x4 ?trans4;
LDG.E R19, desc[UR8][R4.64+-0x14] &req={1} &wr=0x5 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R8.64+0xc], R19 &req={5} &rd=0x1 ?trans4;
LDG.E R17, desc[UR8][R4.64+-0x10] &req={2} &wr=0x2 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R8.64+0x10], R17 &req={2} &rd=0x2 ?trans4;
LDG.E R21, desc[UR8][R4.64+-0xc] &wr=0x5 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R8.64+0x14], R21 &req={5} &rd=0x5 ?trans4;
LDG.E R15, desc[UR8][R4.64+-0x8] &req={0} &wr=0x2 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R8.64+0x18], R15 &req={2} &rd=0x0 ?trans4;
LDG.E R13, desc[UR8][R4.64+-0x4] &req={3} &wr=0x2 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R8.64+0x1c], R13 &req={2} &rd=0x2 ?trans4;
LDG.E R11, desc[UR8][R4.64] &req={4} &wr=0x3 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R8.64+0x20], R11 &req={3} &rd=0x3 ?trans4;
LDG.E R19, desc[UR8][R4.64+0x4] &req={1} &wr=0x4 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R8.64+0x24], R19 &req={4} &rd=0x1 ?trans4;
LDG.E R17, desc[UR8][R4.64+0x8] &wr=0x4 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R8.64+0x28], R17 &req={4} &rd=0x4 ?trans4;
LDG.E R21, desc[UR8][R4.64+0xc] &req={5} &wr=0x5 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R8.64+0x2c], R21 &req={5} &rd=0x4 ?trans4;
LDG.E R15, desc[UR8][R4.64+0x10] &req={0} &wr=0x5 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R8.64+0x30], R15 &req={5} &rd=0x4 ?trans4;
LDG.E R13, desc[UR8][R4.64+0x14] &req={2} &wr=0x2 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R8.64+0x34], R13 &req={2} &rd=0x4 ?trans4;
LDG.E R11, desc[UR8][R4.64+0x18] &req={3} &wr=0x2 ?trans1;
IADD3 R0, PT, PT, R0, 0x4, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R0, 0x10, PT ?trans1;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R8.64+0x38], R11 &req={2} &rd=0x4 ?trans4;
LDG.E R19, desc[UR8][R4.64+0x1c] &req={1} &wr=0x2 ?trans1;
IADD3 R6, PT, PT, R6, UR4, RZ ?trans2;
IADD3 R7, PT, PT, R7, 0x40, RZ ?trans1;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR8][R8.64+0x3c], R19 &req={2} &rd=0x4 ?trans4;
@P0 BRA 0x160 ?trans5;
EXIT ?trans5;
BRA 0xaf0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: design_2_image_kernel(float*, float*)
_Z21design_2_image_kernelPfS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x1c
s_load_b32 s5, s[0:1], 0x10
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s2, s4, 16
s_and_b32 s4, s4, 0xffff
v_mad_u64_u32 v[2:3], null, s15, s2, v[1:2]
s_load_b128 s[0:3], s[0:1], 0x0
s_mul_i32 s6, s5, s4
v_mad_u64_u32 v[3:4], null, s14, s4, v[0:1]
s_add_i32 s5, s5, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
s_mul_i32 s4, s5, s4
v_mul_lo_u32 v1, s6, v2
v_add_nc_u32_e32 v6, -8, v2
s_mov_b32 s5, 0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v0, -8, v3
v_add_lshl_u32 v7, v3, v1, 8
.LBB32_1:
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v3, s5, v6
v_lshl_add_u32 v8, s5, 4, v7
s_mov_b32 s6, 0
s_delay_alu instid0(VALU_DEP_2)
v_mad_u64_u32 v[1:2], null, s4, v3, v[0:1]
.LBB32_2:
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v2, s6, v8
v_add_nc_u32_e32 v4, s6, v1
s_mov_b32 s7, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v3, 31, v2
v_ashrrev_i32_e32 v5, 31, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 2, v[2:3]
v_lshlrev_b64 v[4:5], 2, v[4:5]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v9, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v10, vcc_lo, s1, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v2, vcc_lo, s2, v4
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v5, vcc_lo
global_load_b32 v9, v[9:10], off
global_load_b32 v5, v[2:3], off
.LBB32_3:
s_waitcnt vmcnt(0)
v_add_f32_e32 v4, v5, v9
global_atomic_cmpswap_b32 v4, v[2:3], v[4:5], off glc
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, v4, v5
v_mov_b32_e32 v5, v4
s_or_b32 s7, vcc_lo, s7
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s7
s_cbranch_execnz .LBB32_3
s_or_b32 exec_lo, exec_lo, s7
s_add_i32 s6, s6, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s6, 16
s_cbranch_scc0 .LBB32_2
s_add_i32 s5, s5, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s5, 16
s_cbranch_scc0 .LBB32_1
s_endpgm
| design_2_image_kernel | 6,630 | 1,278 | stackv2-00000-of-00015 |
// Demangled: didentity_kernel(float*, float*, float*)
Function : _Z16didentity_kernelPfS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R0, SR_TID.X &wr=0x0 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC R7, c[0x0][0x360] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans8;
LDC.64 R4, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R7, R7, UR6, R0 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R7, 0x4, R2 &req={2} ?WAIT6_END_GROUP;
LDG.E R3, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
IMAD.WIDE R4, R7, 0x4, R4 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R3 &req={2} ?trans1;
EXIT ?trans5;
BRA 0xd0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: didentity_kernel(float*, float*, float*)
_Z16didentity_kernelPfS_S_:
s_load_b32 s2, s[0:1], 0x24
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s2, 0xffff
s_load_b64 s[2:3], s[0:1], 0x0
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| didentity_kernel | 386 | 407 | stackv2-00000-of-00015 |
// Demangled: diff_kernel(float*, float*, float*)
Function : _Z11diff_kernelPfS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R0, SR_TID.X &wr=0x0 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC R9, c[0x0][0x360] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans8;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD R9, R9, UR6, R0 &req={0} ?WAIT7_END_GROUP;
LDC.64 R6, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD.WIDE R2, R9, 0x4, R2 &req={2} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
IMAD.WIDE R4, R9, 0x4, R4 &req={3} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE R6, R9, 0x4, R6 &req={0} ?WAIT4_END_GROUP;
FADD R9, R2, -R5 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x110;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: diff_kernel(float*, float*, float*)
_Z11diff_kernelPfS_S_:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_sub_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| diff_kernel | 497 | 497 | stackv2-00000-of-00015 |
// Demangled: div_kernel(float*, float*, float*, int)
Function : _Z10div_kernelPfS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x398] &wr=0x2 ?trans7;
LDC R2, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R2, R2, UR4, R3 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R2, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R6, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD.WIDE R6, R2, 0x4, R6 &req={0} ?WAIT5_END_GROUP;
LDG.E R3, desc[UR4][R6.64] &req={1} &wr=0x3 ?trans1;
IMAD.WIDE R4, R2, 0x4, R4 &req={2} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R4.64] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x1c0 ?trans1;
MUFU.RCP R8, R3 &req={3} &wr=0x0 ?trans1;
FCHK P0, R0, R3 &req={2} &wr=0x1 ?trans1;
FFMA R9, -R3, R8, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R9, R8, R9, R8 ?WAIT4_END_GROUP;
FFMA R8, R0, R9, RZ ?WAIT4_END_GROUP;
FFMA R10, -R3, R8, R0 ?WAIT4_END_GROUP;
FFMA R9, R9, R10, R8 ?trans1;
@!P0 BRA 0x1b0 &req={1} ?trans6;
MOV R4, 0x1a0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x200 ?trans5;
MOV R9, R7 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans2;
IMAD.WIDE R2, R2, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R9 ?trans1;
EXIT ?trans5;
SHF.R.U32.HI R6, RZ, 0x17, R3 ?trans1;
BSSY.RECONVERGENT B1, 0x860 ?trans1;
SHF.R.U32.HI R5, RZ, 0x17, R0 ?trans2;
LOP3.LUT R6, R6, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R5, R5, 0xff, RZ, 0xc0, !PT ?trans1;
MOV R7, R0 ?trans1;
IADD3 R11, PT, PT, R6, -0x1, RZ ?trans1;
MOV R8, R3 ?trans1;
IADD3 R10, PT, PT, R5, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R11, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R10, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R9, RZ ?trans1;
@!P0 BRA 0x440 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0x840 ?trans5;
LOP3.LUT P0, RZ, R8, 0x7fffffff, R7, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x820 ?trans5;
FSETP.NEU.FTZ.AND P2, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P1 BRA !P2, 0x820 ?trans5;
LOP3.LUT P2, RZ, R7, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P1, P2, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0x800 ?trans5;
LOP3.LUT P1, RZ, R8, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x7d0 ?trans5;
ISETP.GE.AND P0, PT, R10, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R11, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R9, RZ ?trans1;
@!P0 MOV R9, 0xffffffc0 ?trans1;
@!P0 FFMA R7, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R8, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R9, PT, PT, R9, 0x40, RZ ?WAIT7_END_GROUP;
LEA R3, R6, 0xc0800000, 0x17 ?trans1;
BSSY.RECONVERGENT B2, 0x7c0 ?trans1;
IADD3 R5, PT, PT, R5, -0x7f, RZ ?trans2;
IADD3 R3, PT, PT, -R3, R8, RZ ?WAIT3_END_GROUP;
IMAD R0, R5.reuse, -0x800000, R7 ?trans1;
IADD3 R6, PT, PT, R5, 0x7f, -R6 ?trans1;
MUFU.RCP R8, R3 &wr=0x0 ?trans1;
FADD.FTZ R11, -R3, -RZ ?trans2;
IADD3 R6, PT, PT, R6, R9, RZ ?trans2;
FFMA R13, R8, R11, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R10, R8, R13, R8 ?WAIT4_END_GROUP;
FFMA R7, R0, R10, RZ ?WAIT4_END_GROUP;
FFMA R8, R11, R7, R0 ?WAIT4_END_GROUP;
FFMA R13, R10, R8, R7 ?WAIT4_END_GROUP;
FFMA R8, R11, R13, R0 ?WAIT4_END_GROUP;
FFMA R7, R10, R8, R13 ?WAIT5_END_GROUP;
SHF.R.U32.HI R0, RZ, 0x17, R7 ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R9, PT, PT, R0, R6, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R9, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x7a0 ?trans5;
ISETP.GT.AND P0, PT, R9, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x770 ?trans5;
ISETP.GE.AND P0, PT, R9, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x7b0 ?trans5;
ISETP.GE.AND P0, PT, R9, -0x18, PT ?trans1;
LOP3.LUT R7, R7, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x7b0 ?trans5;
FFMA.RZ R0, R10.reuse, R8.reuse, R13.reuse ?trans1;
IADD3 R6, PT, PT, R9.reuse, 0x20, RZ ?trans1;
FFMA.RM R3, R10, R8, R13 ?trans1;
ISETP.NE.AND P1, PT, R9.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R9, RZ, PT ?trans1;
LOP3.LUT R0, R0, 0x7fffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R5, R0, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R0, R10, R8, R13 ?trans1;
IADD3 R8, PT, PT, -R9, RZ, RZ ?trans2;
SHF.L.U32 R6, R5, R6, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R0, R3, PT ?trans1;
SEL R0, R8, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R6, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R0, RZ, R0, R5 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R6, RZ, 0x1, R0 ?WAIT3_END_GROUP;
SEL R3, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R3, R3, 0x1, R6, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, R0, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R6, PT, PT, R6, R3, RZ ?WAIT4_END_GROUP;
LOP3.LUT R7, R6, R7, RZ, 0xfc, !PT ?trans1;
BRA 0x7b0 ?trans6;
LOP3.LUT R7, R7, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R7, R7, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x7b0 ?trans6;
IMAD R7, R6, 0x800000, R7 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
BRA 0x850 ?trans5;
LOP3.LUT R7, R8, 0x80000000, R7, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R7, R7, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x850 ?trans6;
LOP3.LUT R7, R8, 0x80000000, R7, 0x48, !PT ?trans1;
BRA 0x850 ?trans6;
MUFU.RSQ R7, -QNAN &wr=0x0 ?trans1;
BRA 0x850 ?trans5;
FADD.FTZ R7, R0, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
HFMA2 R5, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R4 0x0 &req={0} ?trans5;
BRA 0x880;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: div_kernel(float*, float*, float*, int)
_Z10div_kernelPfS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB1_2
s_load_b128 s[4:7], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
s_waitcnt vmcnt(0)
v_div_scale_f32 v4, null, v3, v3, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f32_e32 v5, v4
s_waitcnt_depctr 0xfff
v_fma_f32 v6, -v4, v5, 1.0
v_fmac_f32_e32 v5, v6, v5
v_div_scale_f32 v6, vcc_lo, v2, v3, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v7, v6, v5
v_fma_f32 v8, -v4, v7, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v7, v8, v5
v_fma_f32 v4, -v4, v7, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_div_fmas_f32 v4, v4, v5, v7
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
v_div_fixup_f32 v2, v4, v3, v2
global_store_b32 v[0:1], v2, off
.LBB1_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| div_kernel | 3,342 | 912 | stackv2-00000-of-00015 |
// Demangled: dlogistic_kernel(float*, float*, float*, int)
Function : _Z16dlogistic_kernelPfS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x398] &wr=0x2 ?trans7;
LDC R13, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R13, R13, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R13, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans8;
LDC.64 R10, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD.WIDE R4, R13, 0x4, R4 &req={0} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &req={1} &wr=0x4 ?trans1;
IMAD.WIDE R2, R13, 0x4, R2 &req={2} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &wr=0x2 ?trans1;
IMAD.WIDE R10, R13, 0x4, R10 &req={3} ?trans1;
F2F.F64.F32 R6, R5 &req={4} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, -R6, 1 &req={0} &rd=0x0 &wr=0x1 ?trans1;
FMUL R0, R2, R5 &req={2} ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R6, R0 &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R6, R6, R8 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R7, R6 &req={0} &wr=0x0 ?trans2;
STG.E desc[UR4][R10.64], R7 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x290;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: dlogistic_kernel(float*, float*, float*, int)
_Z16dlogistic_kernelPfS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB6_2
s_load_b128 s[4:7], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s6, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
global_load_b32 v4, v[2:3], off
v_add_co_u32 v2, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b32 v5, v[2:3], off
s_waitcnt vmcnt(1)
v_cvt_f64_f32_e32 v[2:3], v4
s_waitcnt vmcnt(0)
v_mul_f32_e32 v4, v5, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cvt_f64_f32_e32 v[4:5], v4
v_add_f64 v[2:3], -v[2:3], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[2:3], v[2:3], v[4:5]
v_cvt_f32_f64_e32 v2, v[2:3]
global_store_b32 v[0:1], v2, off
.LBB6_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| dlogistic_kernel | 868 | 762 | stackv2-00000-of-00015 |
// Demangled: drelu_kernel(float*, float*, float*, int)
Function : _Z12drelu_kernelPfS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x398] &wr=0x2 ?trans7;
LDC R7, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R7, R7, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x390] &wr=0x2 ?trans1;
IMAD.WIDE R2, R7, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x3 ?trans1;
IMAD.WIDE R4, R7, 0x4, R4 &req={2} ?trans1;
FSET.BF.GT.AND R7, R2, 1, PT &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R7 ?trans1;
EXIT ?trans5;
BRA 0x110;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: drelu_kernel(float*, float*, float*, int)
_Z12drelu_kernelPfS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB16_2
s_load_b64 s[2:3], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s2, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_cmp_lt_f32_e32 vcc_lo, 1.0, v2
v_cndmask_b32_e64 v2, 0, 1.0, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB16_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| drelu_kernel | 496 | 546 | stackv2-00000-of-00015 |
// Demangled: dsoftmax_kernel(float*, float*, float*)
Function : _Z15dsoftmax_kernelPfS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R0, SR_TID.X &wr=0x0 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC R7, c[0x0][0x360] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans8;
LDC.64 R4, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R7, R7, UR6, R0 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R7, 0x4, R2 &req={2} ?WAIT6_END_GROUP;
LDG.E R3, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
IMAD.WIDE R4, R7, 0x4, R4 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R3 &req={2} ?trans1;
EXIT ?trans5;
BRA 0xd0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: dsoftmax_kernel(float*, float*, float*)
_Z15dsoftmax_kernelPfS_S_:
s_load_b32 s2, s[0:1], 0x24
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s2, 0xffff
s_load_b64 s[2:3], s[0:1], 0x0
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| dsoftmax_kernel | 386 | 407 | stackv2-00000-of-00015 |
// Demangled: dsoftplus_kernel(float*, float*, float*)
Function : _Z16dsoftplus_kernelPfS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_TID.X &wr=0x1 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD R0, R0, UR6, R5 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R0, 0x4, R2 &req={3} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={2} &wr=0x2 ?trans1;
HFMA2 R5, -RZ, RZ, 0.96630859375, -0.0022525787353515625 ?trans1;
MOV R7, 0x437c0000 ?trans1;
BSSY.RECONVERGENT B0, 0x3b0 ?trans3;
FFMA.SAT R4, R2, -R5, 0.5 &req={2} ?WAIT4_END_GROUP;
FFMA.RM R4, R4, R7, 12582913 ?WAIT4_END_GROUP;
FADD R5, R4.reuse, -12583039 ?trans1;
IMAD.SHL.U32 R4, R4, 0x800000, RZ ?WAIT3_END_GROUP;
FFMA R5, R2, -1.4426950216293334961, -R5 ?WAIT4_END_GROUP;
FFMA R10, R2, -1.925963033500011079e-08, R5 ?WAIT4_END_GROUP;
MUFU.EX2 R5, R10 &wr=0x1 ?trans2;
FMUL R11, R4, R5 &req={1} ?WAIT4_END_GROUP;
F2F.F64.F32 R2, R11 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R4, R2, 1 &req={1} &wr=0x1 ?trans2;
IADD3 R2, PT, PT, R5, 0x300402, RZ &req={1} ?WAIT5_END_GROUP;
FSETP.GEU.AND P0, PT, |R2|, 5.8789094863358348022e-39, PT ?trans1;
MUFU.RCP64H R3, R5 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT11_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, -R4, R2, 1 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R6, R6, R6 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R2, R6, R2 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, -R4, R6, 1 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R6, R8, R6 &req={1} &rd=0x1 &wr=0x2 ?trans2;
@P0 BRA 0x3a0 &req={2,1,0} ?trans5;
LOP3.LUT R2, R5, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R8, PT, PT, R2, -0x100000, RZ ?trans1;
MOV R2, 0x3a0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x400 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R2, c[0x0][0x390] &wr=0x0 ?trans1;
F2F.F32.F64 R7, R6 &wr=0x1 ?trans1;
IMAD.WIDE R2, R0, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R7 &req={1} ?trans1;
EXIT ?trans5;
DSETP.GTU.AND P0, PT, |R4|, +INF , PT &wr=0x0 ?trans1;
BSSY.RECONVERGENT B1, 0x9d0 ?trans4;
@P0 BRA 0x9a0 &req={0} ?trans5;
LOP3.LUT R3, R5, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R6, PT, PT, R3, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R6, 0x7fefffff, PT ?WAIT13_END_GROUP;
@P0 LOP3.LUT R7, R5, 0x7ff00000, RZ, 0x3c, !PT ?trans1;
@P0 MOV R6, RZ ?trans1;
@P0 BRA 0x9c0 ?trans6;
ISETP.GE.U32.AND P0, PT, R3, 0x1000001, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x780 ?trans5;
IADD3 R7, PT, PT, R5, -0x3fe00000, RZ ?trans1;
MOV R6, R4 ?WAIT3_END_GROUP;
MUFU.RCP64H R9, R7 &wr=0x0 ?trans3;
DFMA R10, -R6, R8, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R10, R10, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R8, R10, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, -R6, R10, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R10, R8, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R8, 2.2250738585072013831e-308 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, -R4, R8, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R4, R4, R4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R8, R4, R8 &req={0} &rd=0x0 &wr=0x1 ?trans2;
BRA 0x9c0 &req={1,0} ?trans5;
DMUL R4, R4, 8.11296384146066816958e+31 &wr=0x0 ?trans1;
MOV R6, R8 ?trans1;
MUFU.RCP64H R7, R5 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, -R4, R6, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R8, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R6, R8, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, -R4, R8, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R8, R6, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R6, R6, 8.11296384146066816958e+31 &req={0} &wr=0x0 ?trans2;
BRA 0x9c0 &req={0} ?trans5;
LOP3.LUT R7, R5, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R6, R4 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R3, 0x0 ?WAIT4_END_GROUP;
RET.REL.NODEC R2 0x0 ?trans5;
BRA 0x9f0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: dsoftplus_kernel(float*, float*, float*)
_Z16dsoftplus_kernelPfS_S_:
s_load_b32 s2, s[0:1], 0x24
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s2, 0xffff
s_load_b64 s[2:3], s[0:1], 0x0
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_mul_f32_e32 v3, 0xbfb8aa3b, v2
v_cmp_nlt_f32_e32 vcc_lo, 0x42ce8ed0, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fma_f32 v4, 0xbfb8aa3b, v2, -v3
v_rndne_f32_e32 v5, v3
v_dual_fmamk_f32 v4, v2, 0xb2a5705f, v4 :: v_dual_sub_f32 v3, v3, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_f32_e32 v3, v3, v4
v_cvt_i32_f32_e32 v4, v5
v_exp_f32_e32 v3, v3
s_waitcnt_depctr 0xfff
v_ldexp_f32 v3, v3, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v3, 0, v3, vcc_lo
v_cmp_ngt_f32_e32 vcc_lo, 0xc2b17218, v2
v_cndmask_b32_e32 v2, 0x7f800000, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f64_f32_e32 v[2:3], v2
v_add_f64 v[2:3], v[2:3], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_scale_f64 v[4:5], null, v[2:3], v[2:3], 1.0
v_rcp_f64_e32 v[6:7], v[4:5]
s_waitcnt_depctr 0xfff
v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
v_div_scale_f64 v[8:9], vcc_lo, 1.0, v[2:3], 1.0
v_mul_f64 v[10:11], v[8:9], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[4:5], -v[4:5], v[10:11], v[8:9]
v_div_fmas_f64 v[4:5], v[4:5], v[6:7], v[10:11]
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fixup_f64 v[2:3], v[4:5], v[2:3], 1.0
v_cvt_f32_f64_e32 v2, v[2:3]
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| dsoftplus_kernel | 2,889 | 1,401 | stackv2-00000-of-00015 |
// Demangled: dtanh_kernel(float*, float*, float*)
Function : _Z12dtanh_kernelPfS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R0, SR_TID.X &wr=0x0 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC R13, c[0x0][0x360] &wr=0x0 ?trans8;
LDC.64 R6, c[0x0][0x388] &wr=0x2 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD R13, R13, UR6, R0 &req={0} ?WAIT7_END_GROUP;
LDC.64 R10, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD.WIDE R6, R13, 0x4, R6 &req={2} ?WAIT6_END_GROUP;
LDG.E R6, desc[UR4][R6.64] &req={1} &wr=0x2 ?trans1;
IMAD.WIDE R2, R13, 0x4, R2 &req={3} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &wr=0x3 ?trans1;
IMAD.WIDE R10, R13, 0x4, R10 &req={0} ?WAIT4_END_GROUP;
FMUL R0, R6, R6 &req={2} ?WAIT4_END_GROUP;
F2F.F64.F32 R4, R0 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, -R4, 1 &req={0} &rd=0x3 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R4, R2 &req={3} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R4, R4, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R5, R4 &req={0} &wr=0x0 ?trans2;
STG.E desc[UR4][R10.64], R5 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x260;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: dtanh_kernel(float*, float*, float*)
_Z12dtanh_kernelPfS_S_:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v2, vcc_lo, s6, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
global_load_b32 v4, v[2:3], off
v_add_co_u32 v2, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b32 v5, v[2:3], off
s_waitcnt vmcnt(1)
v_mul_f32_e32 v2, v4, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_cvt_f64_f32_e32 v[2:3], v2
s_waitcnt vmcnt(0)
v_cvt_f64_f32_e32 v[4:5], v5
v_add_f64 v[2:3], -v[2:3], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[2:3], v[2:3], v[4:5]
v_cvt_f32_f64_e32 v2, v[2:3]
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| dtanh_kernel | 777 | 683 | stackv2-00000-of-00015 |
// Demangled: iconv2d_16x16_kernel(float*, float*, float*, int, int)
Function : _Z20iconv2d_16x16_kernelPfS_S_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R0, c[0x0][0x398] &wr=0x1 ?trans1;
LDCU UR9, c[0x0][0x364] &wr=0x2 ?trans1;
LDCU UR5, c[0x0][0x370] &wr=0x3 ?trans1;
ISETP.GE.AND P0, PT, R0, 0x1, PT &req={1} ?WAIT13_END_GROUP;
@!P0 EXIT &req={3,2,0} ?trans5;
S2R R0, SR_TID.Y &wr=0x0 ?trans1;
LDC R3, c[0x0][0x360] &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x374] &wr=0x2 ?trans1;
S2R R5, SR_TID.X &wr=0x0 ?trans1;
UMOV UR4, 0x400 ?trans1;
LDCU.64 UR10, c[0x0][0x358] &wr=0x3 ?trans1;
S2R R25, SR_CTAID.Y &wr=0x4 ?trans3;
S2UR UR7, SR_CgaCtaId &wr=0x5 ?trans8;
S2UR UR12, SR_CTAID.X &wr=0x0 ?trans1;
UIMAD UR8, UR9, UR6, URZ &req={2} ?trans1;
UIMAD UR6, UR9, UR6, UR9 ?trans1;
IMAD R24, R3, UR5, RZ &req={1} ?trans1;
UIADD3 UR5, UPT, UPT, UR4, 0x1000, URZ ?WAIT4_END_GROUP;
IADD3 R22, PT, PT, R24, R3, RZ ?trans1;
ULEA UR4, UR7, UR4, 0x18 &req={5} ?trans1;
ULEA UR5, UR7, UR5, 0x18 ?trans1;
LEA R6, R0.reuse, R5.reuse, 0x5 &req={0} ?trans2;
LEA R7, R0, R5, 0x4 ?trans2;
LEA R6, R6, UR4, 0x2 ?trans1;
IMAD R25, R25, UR9, R0 &req={4} ?trans1;
LEA R21, R0.reuse, UR4, 0x7 ?trans1;
IMAD R23, R3, UR12, R5 ?trans1;
LEA R20, R0, UR5, 0x6 ?trans1;
IMAD R3, R22, UR6, RZ ?trans1;
LEA R21, R5, R21, 0x2 ?trans1;
IMAD R0, R25, R22, R23 ?trans1;
LEA R20, R5, R20, 0x2 ?trans1;
UMOV UR4, URZ ?trans1;
IADD3 R6, PT, PT, R6, 0x80, RZ &req={3} ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x380] &req={1} &wr=0x0 ?trans1;
IMAD R11, R3, UR4, R0 ?WAIT5_END_GROUP;
LEA R9, R22, R11, 0x4 ?WAIT5_END_GROUP;
IMAD.WIDE R8, R9, 0x4, R4 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R11, 0x4, R4 ?trans1;
LDG.E R12, desc[UR10][R8.64] &wr=0x2 ?trans1;
LDC R11, c[0x0][0x39c] &wr=0x0 ?trans3;
LDG.E R14, desc[UR10][R8.64+0x40] &wr=0x3 ?trans4;
LDG.E R2, desc[UR10][R4.64] &wr=0x4 ?trans4;
LDG.E R10, desc[UR10][R4.64+0x40] &wr=0x5 ?trans1;
ISETP.GE.AND P0, PT, R11, 0x1, PT &req={0} ?WAIT3_END_GROUP;
STS [R21+0x800], R12 &req={2} &rd=0x0 ?trans4;
STS [R21+0x840], R14 &req={3} &rd=0x0 ?trans4;
STS [R21], R2 &req={4} &rd=0x0 ?trans4;
STS [R21+0x40], R10 &req={5} &rd=0x0 ?trans1;
@!P0 BRA 0x990 ?trans5;
HFMA2 R2, -RZ, RZ, 0, 0 &req={0} ?WAIT7_END_GROUP;
LDC.64 R8, c[0x0][0x388] &wr=0x0 ?trans1;
IMAD R4, R2, UR8, R25 &req={1} ?WAIT4_END_GROUP;
IMAD R5, R24, R4, R23 ?WAIT4_END_GROUP;
IMAD.WIDE R8, R5, 0x4, R8 &req={0} ?WAIT6_END_GROUP;
LDG.E R9, desc[UR10][R8.64] &wr=0x2 ?trans1;
MOV R17, RZ ?trans1;
MOV R4, 0x40 ?trans1;
MOV R5, R6 ?trans1;
UIADD3 UR6, UPT, UPT, UR5, 0x40, URZ ?trans1;
STS [R20], R9 &req={2} &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans10;
LDS R16, [R5+-0x80] ?trans1;
IADD3 R4, PT, PT, R4, 0x80, RZ ?WAIT3_END_GROUP;
LDS.128 R8, [UR6+-0x40] &req={0} &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R4, 0x440, PT ?trans2;
LDS R19, [R5+-0x7c] &wr=0x1 ?trans4;
LDS R27, [R5+-0x78] &wr=0x2 ?trans4;
LDS R28, [R5+-0x74] &wr=0x3 ?trans4;
LDS R31, [R5+-0x70] ?trans4;
LDS.128 R12, [UR6+-0x30] &wr=0x4 ?trans4;
LDS R26, [R5+-0x6c] &wr=0x5 ?trans4;
LDS R29, [R5+-0x68] &wr=0x5 ?trans4;
LDS R30, [R5+-0x64] &wr=0x5 ?trans4;
LDS R33, [R5+-0x60] ?trans1;
FFMA R8, R16, R8, R17 &req={0} ?WAIT3_END_GROUP;
LDS R32, [R5+-0x5c] ?trans1;
FFMA R8, R19, R9, R8 &req={1} ?WAIT3_END_GROUP;
LDS R34, [R5+0x4] ?trans1;
FFMA R9, R27, R10, R8 &req={2} ?WAIT3_END_GROUP;
LDS.128 R16, [UR6+-0x20] &wr=0x0 ?trans1;
FFMA R8, R28, R11, R9 &req={3} ?WAIT3_END_GROUP;
LDS R27, [R5+-0x58] &wr=0x1 ?trans4;
LDS R28, [R5+-0x54] &wr=0x2 ?trans1;
FFMA R35, R31, R12, R8 &req={4} ?WAIT3_END_GROUP;
LDS R31, [R5+-0x50] ?trans1;
FFMA R26, R26, R13, R35 &req={5} ?WAIT3_END_GROUP;
LDS.128 R8, [UR6+-0x10] &wr=0x3 ?trans1;
FFMA R29, R29, R14, R26 ?WAIT3_END_GROUP;
LDS R26, [R5+-0x4c] &wr=0x4 ?trans1;
FFMA R30, R30, R15, R29 ?WAIT3_END_GROUP;
LDS R29, [R5+-0x48] &wr=0x5 ?trans4;
LDS.128 R12, [UR6] ?trans1;
FFMA R33, R33, R16, R30 &req={0} ?WAIT3_END_GROUP;
LDS R30, [R5+-0x44] &wr=0x0 ?trans1;
FFMA R32, R32, R17, R33 ?WAIT3_END_GROUP;
LDS R33, [R5] &wr=0x0 ?trans1;
FFMA R17, R27, R18, R32 &req={1} ?WAIT3_END_GROUP;
LDS R27, [R5+0x8] &wr=0x1 ?trans1;
FFMA R16, R28, R19, R17 &req={2} ?WAIT3_END_GROUP;
LDS R28, [R5+0xc] &wr=0x2 ?trans1;
FFMA R35, R31, R8, R16 &req={3} ?WAIT3_END_GROUP;
LDS R32, [R5+0x14] ?trans1;
FFMA R26, R26, R9, R35 &req={4} ?WAIT3_END_GROUP;
LDS R31, [R5+0x10] ?trans1;
FFMA R9, R29, R10, R26 &req={5} ?WAIT3_END_GROUP;
LDS.128 R16, [UR6+0x10] &wr=0x3 ?trans4;
LDS R29, [R5+0x18] &wr=0x4 ?trans4;
LDS R26, [R5+0x1c] &wr=0x5 ?trans1;
FFMA R30, R30, R11, R9 &req={0} ?WAIT3_END_GROUP;
LDS.128 R8, [UR6+0x20] ?trans1;
FFMA R33, R33, R12, R30 ?WAIT3_END_GROUP;
LDS R30, [R5+0x24] ?trans1;
FFMA R34, R34, R13, R33 ?WAIT3_END_GROUP;
LDS R33, [R5+0x20] &wr=0x0 ?trans1;
FFMA R27, R27, R14, R34 &req={1} ?WAIT4_END_GROUP;
FFMA R28, R28, R15, R27 &req={2} ?trans2;
LDS R27, [R5+0x28] &wr=0x1 ?trans4;
LDS.128 R12, [UR6+0x30] ?trans1;
UIADD3 UR6, UPT, UPT, UR6, 0x80, URZ ?trans1;
FFMA R31, R31, R16, R28 &req={3} ?trans2;
LDS R16, [R5+0x2c] &wr=0x2 ?trans2;
FFMA R32, R32, R17, R31 ?WAIT2_END_GROUP;
LDS R31, [R5+0x30] &wr=0x3 ?trans2;
FFMA R29, R29, R18, R32 &req={4} ?trans2;
LDS R28, [R5+0x34] &wr=0x4 ?trans2;
FFMA R26, R26, R19, R29 &req={5} ?trans2;
LDS R17, [R5+0x38] &wr=0x5 ?trans4;
LDS R18, [R5+0x3c] &rd=0x0 &wr=0x5 ?trans2;
FFMA R33, R33, R8, R26 &req={0} ?trans1;
IADD3 R5, PT, PT, R5, 0x100, RZ ?WAIT3_END_GROUP;
FFMA R30, R30, R9, R33 ?WAIT4_END_GROUP;
FFMA R27, R27, R10, R30 &req={1} ?WAIT4_END_GROUP;
FFMA R16, R16, R11, R27 &req={2} ?WAIT4_END_GROUP;
FFMA R31, R31, R12, R16 &req={3} ?WAIT4_END_GROUP;
FFMA R28, R28, R13, R31 &req={4} ?WAIT4_END_GROUP;
FFMA R17, R17, R14, R28 &req={5} ?WAIT4_END_GROUP;
FFMA R17, R18, R15, R17 ?trans1;
@P0 BRA 0x3f0 ?trans6;
LDC R9, c[0x0][0x398] &wr=0x0 ?trans1;
LDCU UR6, c[0x0][0x39c] &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x390] &wr=0x2 ?trans1;
IMAD R8, R2, R9, UR4 &req={0} ?WAIT5_END_GROUP;
LEA R9, R8, R7, 0x8 ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R4, R9, 0x4, R4 &req={2} ?WAIT5_END_GROUP;
LDG.E R8, desc[UR10][R4.64] &wr=0x2 ?trans1;
IADD3 R2, PT, PT, R2, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R2, UR6, PT &req={1} ?trans1;
FADD R17, R17, R8 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR10][R4.64], R17 &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 BRA 0x340 ?trans5;
LDC R2, c[0x0][0x398] &req={0} &wr=0x0 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x1, URZ ?WAIT6_END_GROUP;
ISETP.NE.AND P0, PT, R2, UR4, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x230 ?trans5;
EXIT ?trans5;
BRA 0x9e0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: iconv2d_16x16_kernel(float*, float*, float*, int, int)
_Z20iconv2d_16x16_kernelPfS_S_ii:
s_load_b64 s[2:3], s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s2, 1
s_cbranch_scc1 .LBB26_10
s_clause 0x1
s_load_b32 s10, s[0:1], 0x2c
s_load_b64 s[12:13], s[0:1], 0x20
v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v6, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[8:9], s[0:1], 0x10
v_lshlrev_b32_e32 v7, 2, v6
v_lshlrev_b32_e32 v8, 6, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s16, s10, 16
s_and_b32 s0, s10, 0xffff
v_mad_u64_u32 v[2:3], null, s15, s16, v[0:1]
v_mad_u64_u32 v[3:4], null, s14, s0, v[6:7]
s_mul_i32 s1, s12, s0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
s_add_i32 s11, s1, s0
s_add_i32 s0, s13, 1
s_lshl_b32 s10, s11, 4
s_cmp_gt_i32 s3, 0
v_mad_u64_u32 v[4:5], null, s11, v2, v[3:4]
s_cselect_b32 s12, -1, 0
v_lshl_add_u32 v5, v0, 4, v6
v_cndmask_b32_e64 v9, 0, 1, s12
v_lshl_add_u32 v6, v0, 7, v7
v_add3_u32 v7, v8, v7, 0x1000
s_mul_i32 s12, s0, s16
v_add_nc_u32_e32 v8, 16, v4
v_cmp_ne_u32_e64 s0, 1, v9
v_add_nc_u32_e32 v9, 0x800, v6
s_mul_i32 s11, s12, s11
s_mov_b32 s12, 0
s_mul_i32 s13, s13, s16
.LBB26_2:
s_mul_i32 s14, s11, s12
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_add_nc_u32_e32 v10, s14, v4
v_add_nc_u32_e32 v12, s14, v8
s_add_i32 s15, s14, s10
v_add_nc_u32_e32 v14, s15, v4
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v11, 31, v10
v_ashrrev_i32_e32 v13, 31, v12
v_add_nc_u32_e32 v16, s15, v8
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_ashrrev_i32_e32 v15, 31, v14
v_lshlrev_b64 v[10:11], 2, v[10:11]
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[12:13], 2, v[12:13]
v_ashrrev_i32_e32 v17, 31, v16
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[14:15], 2, v[14:15]
v_add_co_u32 v10, vcc_lo, s4, v10
v_add_co_ci_u32_e32 v11, vcc_lo, s5, v11, vcc_lo
v_add_co_u32 v12, vcc_lo, s4, v12
v_lshlrev_b64 v[16:17], 2, v[16:17]
v_add_co_ci_u32_e32 v13, vcc_lo, s5, v13, vcc_lo
v_add_co_u32 v14, vcc_lo, s4, v14
v_add_co_ci_u32_e32 v15, vcc_lo, s5, v15, vcc_lo
s_delay_alu instid0(VALU_DEP_4)
v_add_co_u32 v16, vcc_lo, s4, v16
v_add_co_ci_u32_e32 v17, vcc_lo, s5, v17, vcc_lo
s_clause 0x3
global_load_b32 v0, v[10:11], off
global_load_b32 v10, v[12:13], off
global_load_b32 v11, v[14:15], off
global_load_b32 v12, v[16:17], off
s_and_b32 vcc_lo, exec_lo, s0
s_waitcnt vmcnt(2)
ds_store_2addr_b32 v6, v0, v10 offset1:16
s_waitcnt vmcnt(0)
ds_store_2addr_b32 v9, v11, v12 offset1:16
s_cbranch_vccnz .LBB26_9
s_mov_b32 s14, 0
.LBB26_4:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[10:11], null, s13, s14, v[2:3]
v_mov_b32_e32 v0, v6
s_movk_i32 s15, 0x1000
s_mov_b32 s16, 0
v_mad_u64_u32 v[11:12], null, s1, v10, v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v12, 31, v11
v_lshlrev_b64 v[10:11], 2, v[11:12]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v10, vcc_lo, s6, v10
v_add_co_ci_u32_e32 v11, vcc_lo, s7, v11, vcc_lo
global_load_b32 v11, v[10:11], off
v_mov_b32_e32 v10, 0
s_waitcnt vmcnt(0)
ds_store_b32 v7, v11
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB26_5:
s_mov_b32 s17, 0
.LBB26_6:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s18, s15, s17
v_dual_mov_b32 v12, s18 :: v_dual_add_nc_u32 v11, s17, v0
s_add_i32 s17, s17, 4
ds_load_b32 v11, v11
ds_load_b32 v12, v12
s_cmp_eq_u32 s17, 64
s_waitcnt lgkmcnt(0)
v_fmac_f32_e32 v10, v11, v12
s_cbranch_scc0 .LBB26_6
v_add_nc_u32_e32 v0, 0x80, v0
s_add_i32 s16, s16, 1
s_add_i32 s15, s15, 64
s_cmp_eq_u32 s16, 16
s_cbranch_scc0 .LBB26_5
s_mul_i32 s15, s14, s2
s_add_i32 s14, s14, 1
s_add_i32 s15, s15, s12
s_cmp_eq_u32 s14, s3
v_lshl_add_u32 v0, s15, 8, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[11:12], 2, v[0:1]
v_add_co_u32 v11, vcc_lo, s8, v11
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v12, vcc_lo, s9, v12, vcc_lo
global_load_b32 v0, v[11:12], off
s_waitcnt vmcnt(0)
v_add_f32_e32 v0, v10, v0
global_store_b32 v[11:12], v0, off
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB26_4
.LBB26_9:
s_add_i32 s12, s12, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s12, s2
s_cbranch_scc0 .LBB26_2
.LBB26_10:
s_endpgm
| iconv2d_16x16_kernel | 3,916 | 2,695 | stackv2-00000-of-00015 |
// Demangled: iconv2d_h_bias_16x16_kernel(float*, float*, int)
Function : _Z27iconv2d_h_bias_16x16_kernelPfS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R0, c[0x0][0x390] &wr=0x1 ?trans2;
ISETP.GE.AND P0, PT, R0, 0x1, PT &req={1} ?WAIT13_END_GROUP;
@!P0 EXIT &req={0} ?trans5;
S2R R4, SR_TID.Y &wr=0x0 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
HFMA2 R20, -RZ, RZ, 0, 0 ?trans1;
S2R R9, SR_CTAID.Y &wr=0x0 ?trans1;
S2R R7, SR_TID.X &wr=0x2 ?trans4;
S2UR UR8, SR_CTAID.X &wr=0x3 ?trans8;
LDC R5, c[0x0][0x370] &wr=0x3 ?trans1;
LDCU UR6, c[0x0][0x364] &wr=0x0 ?trans1;
LDCU UR9, c[0x0][0x360] &wr=0x2 ?trans6;
LDC.64 R2, c[0x0][0x380] &wr=0x4 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?trans1;
IMAD R0, R9, UR6, R4 &req={0} ?WAIT5_END_GROUP;
LEA R4, R4, UR4, 0x6 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x0 ?trans1;
IMAD R0, R0, R5, UR8 &req={3} ?WAIT4_END_GROUP;
IMAD R5, R0, UR9, R7 &req={2} ?trans1;
LEA R0, R7, R4, 0x2 ?WAIT3_END_GROUP;
IMAD.WIDE R2, R5, 0x4, R2 &req={4,0} ?WAIT7_END_GROUP;
LDG.E R5, desc[UR6][R2.64] &wr=0x2 ?trans1;
MOV R7, RZ ?trans1;
MOV R21, 0x80 ?trans2;
STS [R0], R5 &req={2} &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS.128 R8, [R21+UR4+-0x80] &wr=0x1 ?trans4;
LDS.128 R16, [R21+UR4+-0x70] &wr=0x2 ?trans4;
LDS.128 R12, [R21+UR4+-0x60] &wr=0x3 ?trans1;
FADD R8, R8, R7 &req={1} ?WAIT3_END_GROUP;
LDS.128 R4, [R21+UR4+-0x50] &req={0} &wr=0x0 ?trans1;
FADD R9, R8, R9 ?WAIT4_END_GROUP;
FADD R10, R9, R10 ?WAIT4_END_GROUP;
FADD R11, R10, R11 ?WAIT4_END_GROUP;
FADD R16, R11, R16 &req={2} ?trans2;
LDS.128 R8, [R21+UR4+-0x40] &wr=0x1 ?trans2;
FADD R17, R16, R17 ?WAIT4_END_GROUP;
FADD R18, R17, R18 ?WAIT4_END_GROUP;
FADD R19, R18, R19 ?WAIT4_END_GROUP;
FADD R12, R19, R12 &req={3} ?trans2;
LDS.128 R16, [R21+UR4+-0x30] &wr=0x2 ?trans2;
FADD R13, R12, R13 ?WAIT4_END_GROUP;
FADD R14, R13, R14 ?WAIT4_END_GROUP;
FADD R15, R14, R15 ?WAIT4_END_GROUP;
FADD R4, R15, R4 &req={0} ?trans2;
LDS.128 R12, [R21+UR4+-0x20] &wr=0x0 ?trans2;
FADD R5, R4, R5 ?WAIT4_END_GROUP;
FADD R6, R5, R6 ?WAIT4_END_GROUP;
FADD R7, R6, R7 ?WAIT4_END_GROUP;
FADD R8, R7, R8 &req={1} ?trans2;
LDS.128 R4, [R21+UR4+-0x10] &wr=0x1 ?trans2;
FADD R9, R8, R9 ?WAIT4_END_GROUP;
FADD R10, R9, R10 ?WAIT4_END_GROUP;
FADD R11, R10, R11 ?WAIT4_END_GROUP;
FADD R16, R11, R16 &req={2} ?trans2;
LDS.128 R8, [R21+UR4] &wr=0x2 ?trans2;
FADD R17, R16, R17 ?WAIT4_END_GROUP;
FADD R18, R17, R18 ?WAIT4_END_GROUP;
FADD R19, R18, R19 ?WAIT4_END_GROUP;
FADD R12, R19, R12 &req={0} ?trans2;
LDS.128 R16, [R21+UR4+0x10] &wr=0x0 ?trans2;
FADD R13, R12, R13 ?WAIT4_END_GROUP;
FADD R14, R13, R14 ?WAIT4_END_GROUP;
FADD R15, R14, R15 ?WAIT4_END_GROUP;
FADD R4, R15, R4 &req={1} ?trans2;
LDS.128 R12, [R21+UR4+0x20] &wr=0x1 ?trans2;
FADD R5, R4, R5 ?WAIT4_END_GROUP;
FADD R6, R5, R6 ?WAIT4_END_GROUP;
FADD R7, R6, R7 ?WAIT4_END_GROUP;
FADD R8, R7, R8 &req={2} ?trans2;
LDS.128 R4, [R21+UR4+0x30] &wr=0x2 ?trans2;
FADD R9, R8, R9 ?WAIT4_END_GROUP;
FADD R10, R9, R10 ?WAIT4_END_GROUP;
FADD R11, R10, R11 ?WAIT4_END_GROUP;
FADD R16, R11, R16 &req={0} ?trans2;
LDS.128 R8, [R21+UR4+0x40] &wr=0x0 ?trans2;
FADD R17, R16, R17 ?WAIT4_END_GROUP;
FADD R18, R17, R18 ?WAIT4_END_GROUP;
FADD R19, R18, R19 ?WAIT4_END_GROUP;
FADD R12, R19, R12 &req={1} ?trans2;
LDS.128 R16, [R21+UR4+0x50] &wr=0x1 ?trans2;
FADD R13, R12, R13 ?WAIT4_END_GROUP;
FADD R14, R13, R14 ?WAIT4_END_GROUP;
FADD R15, R14, R15 ?WAIT4_END_GROUP;
FADD R4, R15, R4 &req={2} ?trans2;
LDS.128 R12, [R21+UR4+0x60] &wr=0x2 ?trans2;
FADD R5, R4, R5 ?WAIT4_END_GROUP;
FADD R6, R5, R6 ?WAIT4_END_GROUP;
FADD R7, R6, R7 ?WAIT4_END_GROUP;
FADD R8, R7, R8 &req={0} ?trans2;
LDS.128 R4, [R21+UR4+0x70] &rd=0x0 &wr=0x3 ?trans2;
FADD R9, R8, R9 ?WAIT4_END_GROUP;
FADD R10, R9, R10 ?trans1;
IADD3 R21, PT, PT, R21, 0x100, RZ &req={0} ?WAIT3_END_GROUP;
FADD R11, R10, R11 ?trans2;
ISETP.NE.AND P0, PT, R21, 0x480, PT ?trans2;
FADD R16, R11, R16 &req={1} ?WAIT4_END_GROUP;
FADD R17, R16, R17 ?WAIT4_END_GROUP;
FADD R18, R17, R18 ?WAIT4_END_GROUP;
FADD R19, R18, R19 ?WAIT4_END_GROUP;
FADD R12, R19, R12 &req={2} ?WAIT4_END_GROUP;
FADD R13, R12, R13 ?WAIT4_END_GROUP;
FADD R14, R13, R14 ?WAIT4_END_GROUP;
FADD R15, R14, R15 ?WAIT4_END_GROUP;
FADD R4, R15, R4 &req={3} ?WAIT4_END_GROUP;
FADD R5, R4, R5 ?WAIT4_END_GROUP;
FADD R6, R5, R6 ?WAIT4_END_GROUP;
FADD R7, R6, R7 ?trans1;
@P0 BRA 0x1c0 ?trans6;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x1 ?trans1;
IMAD.WIDE.U32 R4, R20, 0x4, R4 &req={0} ?WAIT6_END_GROUP;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
IADD3 R20, PT, PT, R20, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R20, UR5, PT &req={1} ?trans1;
STG.E desc[UR6][R4.64], R7 &rd=0x0 ?WAIT12_END_GROUP;
@P0 BRA 0x170 &req={0} ?trans5;
EXIT ?trans5;
BRA 0x780;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: iconv2d_h_bias_16x16_kernel(float*, float*, int)
_Z27iconv2d_h_bias_16x16_kernelPfS_i:
s_load_b32 s4, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s4, 1
s_cbranch_scc1 .LBB28_7
s_clause 0x1
s_load_b32 s5, s[0:1], 0x24
s_load_b32 s2, s[0:1], 0x18
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s5, 16
s_and_b32 s5, s5, 0xffff
v_mad_u64_u32 v[2:3], null, s15, s3, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[3:4], null, v2, s2, s[14:15]
s_load_b128 s[0:3], s[0:1], 0x0
v_mad_u64_u32 v[4:5], null, v3, s5, v[0:1]
v_lshlrev_b32_e32 v0, 2, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshl_add_u32 v2, v1, 6, v0
v_ashrrev_i32_e32 v5, 31, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 2, v[4:5]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v3
v_mov_b32_e32 v3, 0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v4, vcc_lo
s_mov_b32 s1, 0
s_mov_b32 s0, s1
.LBB28_2:
global_load_b32 v5, v[0:1], off
v_mov_b32_e32 v4, 0
s_mov_b32 s5, 0
s_mov_b32 s6, 0
s_waitcnt vmcnt(0)
ds_store_b32 v2, v5
s_waitcnt lgkmcnt(0)
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
.LBB28_3:
s_mov_b32 s7, 0
.LBB28_4:
s_delay_alu instid0(SALU_CYCLE_1)
s_add_i32 s8, s5, s7
s_add_i32 s7, s7, 4
v_mov_b32_e32 v5, s8
s_cmp_eq_u32 s7, 64
ds_load_b32 v5, v5
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v4, v4, v5
s_cbranch_scc0 .LBB28_4
s_add_i32 s6, s6, 1
s_add_i32 s5, s5, 64
s_cmp_eq_u32 s6, 16
s_cbranch_scc0 .LBB28_3
s_lshl_b64 s[6:7], s[0:1], 2
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s6, s2, s6
s_addc_u32 s7, s3, s7
s_add_i32 s0, s0, 1
s_barrier
s_cmp_eq_u32 s0, s4
buffer_gl0_inv
global_store_b32 v3, v4, s[6:7]
s_cbranch_scc0 .LBB28_2
.LBB28_7:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| iconv2d_h_bias_16x16_kernel | 2,735 | 1,107 | stackv2-00000-of-00015 |
// Demangled: iconv2d_h_bias_16x16_naive_kernel(float*, float*, int)
Function : _Z33iconv2d_h_bias_16x16_naive_kernelPfS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.Y &wr=0x1 ?trans7;
LDC R9, c[0x0][0x390] &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans1;
HFMA2 R4, -RZ, RZ, 0, 0 ?trans1;
S2R R5, SR_CTAID.X &wr=0x4 ?trans1;
S2R R7, SR_TID.X &wr=0x5 ?trans4;
S2UR UR4, SR_CTAID.Y &wr=0x1 ?trans8;
LDC R0, c[0x0][0x364] &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x370] &wr=0x4 ?trans1;
LDCU UR8, c[0x0][0x360] &wr=0x5 ?trans1;
ISETP.GE.AND P0, PT, R9, 0x1, PT &req={2} ?trans1;
IMAD R0, R0, UR4, R3 &req={1} ?WAIT4_END_GROUP;
IMAD R0, R0, UR5, R5 &req={4} ?WAIT4_END_GROUP;
IMAD R0, R0, UR8, R7 &req={5} ?WAIT4_END_GROUP;
@!P0 BRA 0x790 &req={3,0} ?trans5;
ISETP.GE.U32.AND P1, PT, R9.reuse, 0x10, PT ?trans1;
LOP3.LUT R18, R9, 0xf, RZ, 0xc0, !PT ?trans1;
UMOV UR4, URZ ?trans1;
IMAD R5, R0, R9, RZ ?trans1;
MOV R4, RZ ?trans2;
ISETP.NE.AND P0, PT, R18, RZ, PT ?WAIT7_END_GROUP;
@!P1 BRA 0x440 ?trans6;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LOP3.LUT R12, R9, 0x7ffffff0, RZ, 0xc0, !PT ?trans1;
UMOV UR4, URZ ?trans1;
MOV R4, RZ ?trans1;
MOV R11, R5 ?trans1;
IADD3 R12, PT, PT, -R12, RZ, RZ ?trans1;
IADD.64 R2, R2, 0x20 &req={0} ?WAIT8_END_GROUP;
IMAD.WIDE R6, R11, 0x4, R2 ?WAIT5_END_GROUP;
LDG.E R17, desc[UR6][R6.64+-0x20] &wr=0x2 ?trans4;
LDG.E R16, desc[UR6][R6.64+-0x1c] &wr=0x3 ?trans4;
LDG.E R19, desc[UR6][R6.64+-0x18] &wr=0x4 ?trans4;
LDG.E R21, desc[UR6][R6.64+-0x14] &wr=0x5 ?trans4;
LDG.E R23, desc[UR6][R6.64+-0x10] &wr=0x5 ?trans4;
LDG.E R25, desc[UR6][R6.64+-0xc] &wr=0x5 ?trans4;
LDG.E R27, desc[UR6][R6.64+-0x8] &wr=0x5 ?trans4;
LDG.E R29, desc[UR6][R6.64+-0x4] &wr=0x5 ?trans4;
LDG.E R31, desc[UR6][R6.64] &wr=0x5 ?trans4;
LDG.E R33, desc[UR6][R6.64+0x4] &wr=0x5 ?trans4;
LDG.E R35, desc[UR6][R6.64+0x8] &wr=0x5 ?trans4;
LDG.E R14, desc[UR6][R6.64+0xc] &wr=0x5 ?trans4;
LDG.E R13, desc[UR6][R6.64+0x10] &wr=0x5 ?trans4;
LDG.E R8, desc[UR6][R6.64+0x14] &wr=0x5 ?trans4;
LDG.E R10, desc[UR6][R6.64+0x18] &wr=0x5 ?trans4;
LDG.E R15, desc[UR6][R6.64+0x1c] &wr=0x5 ?trans1;
IADD3 R12, PT, PT, R12, 0x10, RZ ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x10, URZ ?trans1;
IADD3 R11, PT, PT, R11, 0x10, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P1, PT, R12, RZ, PT ?trans1;
FADD R17, R17, R4 &req={2} ?WAIT4_END_GROUP;
FADD R16, R17, R16 &req={3} ?WAIT4_END_GROUP;
FADD R16, R16, R19 &req={4} ?WAIT4_END_GROUP;
FADD R16, R16, R21 &req={5} ?WAIT4_END_GROUP;
FADD R16, R16, R23 ?WAIT4_END_GROUP;
FADD R16, R16, R25 ?WAIT4_END_GROUP;
FADD R16, R16, R27 ?WAIT4_END_GROUP;
FADD R16, R16, R29 ?WAIT4_END_GROUP;
FADD R16, R16, R31 ?WAIT4_END_GROUP;
FADD R16, R16, R33 ?WAIT4_END_GROUP;
FADD R35, R16, R35 ?WAIT4_END_GROUP;
FADD R14, R35, R14 ?WAIT4_END_GROUP;
FADD R13, R14, R13 ?WAIT4_END_GROUP;
FADD R13, R13, R8 ?WAIT4_END_GROUP;
FADD R10, R13, R10 ?WAIT4_END_GROUP;
FADD R4, R10, R15 ?trans1;
@P1 BRA 0x1e0 ?trans6;
@!P0 BRA 0x790 ?trans5;
ISETP.GE.U32.AND P0, PT, R18, 0x8, PT ?trans1;
LOP3.LUT R8, R9, 0x7, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R8, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x5d0 ?trans6;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
IADD3 R7, PT, PT, R5, UR4, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R2, R7, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R7, desc[UR6][R2.64] &wr=0x2 ?trans4;
LDG.E R6, desc[UR6][R2.64+0x4] &wr=0x3 ?trans4;
LDG.E R11, desc[UR6][R2.64+0x8] &wr=0x4 ?trans4;
LDG.E R13, desc[UR6][R2.64+0xc] &wr=0x5 ?trans4;
LDG.E R15, desc[UR6][R2.64+0x10] &wr=0x5 ?trans4;
LDG.E R17, desc[UR6][R2.64+0x14] &wr=0x5 ?trans4;
LDG.E R19, desc[UR6][R2.64+0x18] &wr=0x5 ?trans4;
LDG.E R21, desc[UR6][R2.64+0x1c] &wr=0x5 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
FADD R7, R4, R7 &req={2} ?WAIT4_END_GROUP;
FADD R6, R7, R6 &req={3} ?WAIT4_END_GROUP;
FADD R6, R6, R11 &req={4} ?WAIT4_END_GROUP;
FADD R6, R6, R13 &req={5} ?WAIT4_END_GROUP;
FADD R6, R6, R15 ?WAIT4_END_GROUP;
FADD R6, R6, R17 ?WAIT4_END_GROUP;
FADD R6, R6, R19 ?WAIT4_END_GROUP;
FADD R4, R6, R21 ?WAIT7_END_GROUP;
@!P1 BRA 0x790 ?trans5;
ISETP.GE.U32.AND P0, PT, R8, 0x4, PT ?trans1;
LOP3.LUT R9, R9, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R9, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x6e0 ?trans6;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
IADD3 R7, PT, PT, R5, UR4, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R2, R7, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R7, desc[UR6][R2.64] &wr=0x2 ?trans4;
LDG.E R6, desc[UR6][R2.64+0x4] &wr=0x3 ?trans4;
LDG.E R11, desc[UR6][R2.64+0x8] &wr=0x4 ?trans4;
LDG.E R13, desc[UR6][R2.64+0xc] &wr=0x5 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
FADD R7, R4, R7 &req={2} ?WAIT4_END_GROUP;
FADD R6, R7, R6 &req={3} ?WAIT4_END_GROUP;
FADD R6, R6, R11 &req={4} ?WAIT4_END_GROUP;
FADD R4, R6, R13 &req={5} ?WAIT7_END_GROUP;
@!P1 BRA 0x790 ?trans5;
LDC.64 R6, c[0x0][0x380] &wr=0x0 ?trans1;
IADD3 R5, PT, PT, R5, UR4, RZ ?trans2;
IADD3 R9, PT, PT, -R9, RZ, RZ ?WAIT7_END_GROUP;
IMAD.WIDE R2, R5, 0x4, R6 &req={0} ?WAIT6_END_GROUP;
LDG.E R3, desc[UR6][R2.64] &wr=0x2 ?trans1;
IADD3 R9, PT, PT, R9, 0x1, RZ ?trans2;
IADD3 R5, PT, PT, R5, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R9, RZ, PT ?trans1;
FADD R4, R3, R4 &req={2} ?WAIT12_END_GROUP;
@P0 BRA 0x720 ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans2;
IMAD.WIDE R2, R0, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R4 ?trans1;
EXIT ?trans5;
BRA 0x7d0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: iconv2d_h_bias_16x16_naive_kernel(float*, float*, int)
_Z33iconv2d_h_bias_16x16_naive_kernelPfS_i:
s_clause 0x1
s_load_b32 s5, s[0:1], 0x24
s_load_b32 s6, s[0:1], 0x18
v_bfe_u32 v1, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s2, s5, 16
s_and_b32 s5, s5, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, s15, s2, v[1:2]
s_clause 0x1
s_load_b32 s4, s[0:1], 0x10
s_load_b128 s[0:3], s[0:1], 0x0
v_mad_u64_u32 v[3:4], null, v2, s6, s[14:15]
v_and_b32_e32 v2, 0x3ff, v0
s_delay_alu instid0(VALU_DEP_1)
v_mad_u64_u32 v[0:1], null, v3, s5, v[2:3]
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s4, 1
s_cbranch_scc1 .LBB30_3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_lo_u32 v1, v0, s4
v_mov_b32_e32 v3, 0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[1:2]
v_add_co_u32 v1, vcc_lo, s0, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
.LBB30_2:
global_load_b32 v4, v[1:2], off
v_add_co_u32 v1, vcc_lo, v1, 4
v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
s_add_i32 s4, s4, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s4, 0
s_waitcnt vmcnt(0)
v_add_f32_e32 v3, v3, v4
s_cbranch_scc0 .LBB30_2
s_branch .LBB30_4
.LBB30_3:
v_mov_b32_e32 v3, 0
.LBB30_4:
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_store_b32 v[0:1], v3, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| iconv2d_h_bias_16x16_naive_kernel | 3,130 | 963 | stackv2-00000-of-00015 |
// Demangled: iconv2d_v_bias_16x16_kernel(float*, float*, int)
Function : _Z27iconv2d_v_bias_16x16_kernelPfS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R0, c[0x0][0x390] &wr=0x1 ?trans2;
ISETP.GE.AND P0, PT, R0, 0x1, PT &req={1} ?WAIT13_END_GROUP;
@!P0 EXIT &req={0} ?trans5;
S2R R7, SR_TID.X &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
LDC R0, c[0x0][0x370] &wr=0x1 ?trans1;
S2R R4, SR_CTAID.X &wr=0x0 ?trans1;
LDCU UR6, c[0x0][0x364] &wr=0x2 ?trans1;
S2R R6, SR_TID.Y &wr=0x2 ?trans5;
S2UR UR5, SR_CgaCtaId &wr=0x3 ?trans1;
S2R R9, SR_CTAID.Y &wr=0x2 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x4 ?trans1;
IMAD R0, R0, UR4, RZ &req={1} ?WAIT2_END_GROUP;
IMAD R5, R4, UR4, R7 &req={0} ?trans1;
UMOV UR4, 0x400 ?trans2;
ULEA UR4, UR5, UR4, 0x18 &req={3} ?trans1;
IMAD R4, R9, UR6, R6 &req={2} ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x0 ?trans3;
IMAD R5, R0, R4, R5 ?trans1;
LEA R4, R6, R7, 0x5 ?WAIT3_END_GROUP;
IMAD.WIDE R2, R5, 0x4, R2 &req={4} ?trans1;
SHF.L.U32 R5, R0, 0x4, RZ ?trans2;
LEA R0, R6, R7, 0x4 ?trans1;
HFMA2 R7, -RZ, RZ, 0, 0 ?trans1;
LEA R6, R4, UR4, 0x2 ?trans1;
IMAD.WIDE R4, R5, 0x4, R2 ?WAIT7_END_GROUP;
LDG.E R9, desc[UR6][R2.64] &req={1,0} &wr=0x2 ?trans4;
LDG.E R11, desc[UR6][R2.64+0x40] &wr=0x3 ?trans4;
LDG.E R13, desc[UR6][R4.64] &wr=0x4 ?trans4;
LDG.E R15, desc[UR6][R4.64+0x40] &wr=0x5 ?trans1;
MOV R17, RZ ?trans1;
UMOV UR4, 0x80 ?WAIT2_END_GROUP;
STS [R6], R9 &req={2} &rd=0x0 ?trans4;
STS [R6+0x40], R11 &req={3} &rd=0x0 ?trans4;
STS [R6+0x800], R13 &req={4} &rd=0x0 ?trans4;
STS [R6+0x840], R15 &req={5} &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R8, [R6+UR4+-0x80] &wr=0x1 ?trans4;
LDS R9, [R6+UR4+-0x7c] &req={0} &wr=0x0 ?trans4;
LDS R11, [R6+UR4+-0x78] &wr=0x2 ?trans4;
LDS R13, [R6+UR4+-0x74] &wr=0x3 ?trans4;
LDS R15, [R6+UR4+-0x70] &wr=0x4 ?trans4;
LDS R19, [R6+UR4+-0x6c] &wr=0x5 ?trans4;
LDS R21, [R6+UR4+-0x68] &wr=0x5 ?trans4;
LDS R23, [R6+UR4+-0x64] &wr=0x5 ?trans4;
LDS R25, [R6+UR4+-0x60] &wr=0x5 ?trans4;
LDS R27, [R6+UR4+-0x5c] &wr=0x5 ?trans1;
FADD R8, R8, R17 &req={1} ?WAIT3_END_GROUP;
LDS R10, [R6+UR4+0x3c] ?trans1;
FADD R8, R8, R9 &req={0} ?WAIT3_END_GROUP;
LDS R17, [R6+UR4+-0x58] &wr=0x0 ?trans1;
FADD R8, R8, R11 &req={2} ?WAIT3_END_GROUP;
LDS R9, [R6+UR4+-0x54] &wr=0x1 ?trans1;
FADD R8, R8, R13 &req={3} ?WAIT3_END_GROUP;
LDS R11, [R6+UR4+-0x50] &wr=0x2 ?trans1;
FADD R8, R8, R15 &req={4} ?WAIT3_END_GROUP;
LDS R13, [R6+UR4+-0x4c] &wr=0x3 ?trans1;
FADD R8, R8, R19 &req={5} ?WAIT3_END_GROUP;
LDS R15, [R6+UR4+-0x48] &wr=0x4 ?trans1;
FADD R8, R8, R21 ?WAIT3_END_GROUP;
LDS R19, [R6+UR4+-0x44] &wr=0x5 ?trans1;
FADD R8, R8, R23 ?WAIT3_END_GROUP;
LDS R21, [R6+UR4] &wr=0x5 ?trans1;
FADD R8, R8, R25 ?WAIT3_END_GROUP;
LDS R23, [R6+UR4+0x4] &wr=0x5 ?trans1;
FADD R8, R8, R27 ?WAIT3_END_GROUP;
LDS R25, [R6+UR4+0x8] &wr=0x5 ?trans4;
LDS R27, [R6+UR4+0xc] &wr=0x5 ?trans1;
FADD R8, R8, R17 &req={0} ?WAIT3_END_GROUP;
LDS R17, [R6+UR4+0x10] &wr=0x0 ?trans1;
FADD R8, R8, R9 &req={1} ?WAIT3_END_GROUP;
LDS R9, [R6+UR4+0x14] &wr=0x1 ?trans1;
FADD R8, R8, R11 &req={2} ?WAIT3_END_GROUP;
LDS R11, [R6+UR4+0x18] &wr=0x2 ?trans1;
FADD R8, R8, R13 &req={3} ?WAIT3_END_GROUP;
LDS R13, [R6+UR4+0x1c] &wr=0x3 ?trans1;
FADD R8, R8, R15 &req={4} ?WAIT3_END_GROUP;
LDS R15, [R6+UR4+0x20] &wr=0x4 ?trans1;
FADD R8, R8, R19 &req={5} ?WAIT3_END_GROUP;
LDS R19, [R6+UR4+0x24] &wr=0x5 ?trans1;
FADD R8, R8, R21 ?WAIT3_END_GROUP;
LDS R21, [R6+UR4+0x28] &wr=0x5 ?trans1;
FADD R8, R8, R23 ?WAIT3_END_GROUP;
LDS R23, [R6+UR4+0x2c] &wr=0x5 ?trans1;
FADD R8, R8, R25 ?WAIT3_END_GROUP;
LDS R25, [R6+UR4+0x30] &wr=0x5 ?trans1;
FADD R8, R8, R27 ?WAIT3_END_GROUP;
LDS R27, [R6+UR4+0x34] &wr=0x5 ?trans1;
FADD R8, R8, R17 &req={0} ?WAIT3_END_GROUP;
LDS R17, [R6+UR4+0x38] &wr=0x0 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x100, URZ ?trans1;
FADD R8, R8, R9 &req={1} ?WAIT3_END_GROUP;
UISETP.NE.AND UP0, UPT, UR4, 0x880, UPT ?trans1;
FADD R8, R8, R11 &req={2} ?WAIT4_END_GROUP;
FADD R8, R8, R13 &req={3} ?trans1;
PLOP3.LUT P0, PT, PT, PT, UP0, 0x80, 0x8 ?WAIT3_END_GROUP;
FADD R8, R8, R15 &req={4} ?WAIT4_END_GROUP;
FADD R8, R8, R19 &req={5} ?WAIT4_END_GROUP;
FADD R8, R8, R21 ?WAIT4_END_GROUP;
FADD R8, R8, R23 ?WAIT4_END_GROUP;
FADD R8, R8, R25 ?WAIT4_END_GROUP;
FADD R8, R8, R27 ?WAIT4_END_GROUP;
FADD R17, R8, R17 &req={0} ?WAIT4_END_GROUP;
FADD R17, R17, R10 ?trans1;
@P0 BRA 0x260 ?trans6;
LDCU UR4, c[0x0][0x390] &wr=0x0 ?trans1;
LDC.64 R8, c[0x0][0x388] &wr=0x1 ?trans1;
LEA R11, R7.reuse, R0, 0x8 ?trans2;
IADD3 R7, PT, PT, R7, 0x1, RZ ?WAIT5_END_GROUP;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.NE.AND P0, PT, R7, UR4, PT &req={0} ?trans1;
IMAD.WIDE.U32 R8, R11, 0x4, R8 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R8.64], R17 &rd=0x1 ?trans7;
@P0 BRA 0x1b0 ?trans5;
EXIT ?trans5;
BRA 0x740;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: iconv2d_v_bias_16x16_kernel(float*, float*, int)
_Z27iconv2d_v_bias_16x16_kernelPfS_i:
s_load_b32 s4, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s4, 1
s_cbranch_scc1 .LBB27_7
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x18
v_bfe_u32 v2, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s5, s2, 16
s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[3:4], null, s15, s5, v[2:3]
s_and_b32 s5, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
s_mul_i32 s6, s3, s5
s_load_b128 s[0:3], s[0:1], 0x0
s_mul_i32 s14, s14, s5
v_mul_lo_u32 v1, s6, v3
s_lshl_b32 s6, s6, 4
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_ashr_i32 s7, s6, 31
v_add3_u32 v3, s14, v0, v1
v_mov_b32_e32 v1, 0
v_lshlrev_b32_e32 v5, 2, v0
v_lshl_add_u32 v6, v2, 4, v0
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v4, 31, v3
v_lshl_add_u32 v7, v2, 7, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[3:4], 2, v[3:4]
v_add_nc_u32_e32 v8, 0x800, v7
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v2, vcc_lo, s0, v3
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v4, vcc_lo
s_lshl_b64 s[0:1], s[6:7], 2
s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
v_add_co_u32 v4, vcc_lo, v2, s0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v3, vcc_lo
s_mov_b32 s0, 0
.LBB27_2:
s_clause 0x3
global_load_b32 v10, v[2:3], off
global_load_b32 v11, v[2:3], off offset:64
global_load_b32 v12, v[4:5], off
global_load_b32 v13, v[4:5], off offset:64
v_dual_mov_b32 v0, v7 :: v_dual_mov_b32 v9, 0
s_mov_b32 s1, 0
s_waitcnt vmcnt(2)
ds_store_2addr_b32 v7, v10, v11 offset1:16
s_waitcnt vmcnt(0)
ds_store_2addr_b32 v8, v12, v13 offset1:16
s_waitcnt lgkmcnt(0)
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
.LBB27_3:
s_mov_b32 s5, 0
.LBB27_4:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_add_nc_u32_e32 v10, s5, v0
s_add_i32 s5, s5, 4
s_cmp_eq_u32 s5, 64
ds_load_b32 v10, v10
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v9, v9, v10
s_cbranch_scc0 .LBB27_4
v_add_nc_u32_e32 v0, 0x80, v0
s_add_i32 s1, s1, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s1, 16
s_cbranch_scc0 .LBB27_3
v_lshl_add_u32 v0, s0, 8, v6
s_add_i32 s0, s0, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
s_cmp_eq_u32 s0, s4
s_barrier
v_lshlrev_b64 v[10:11], 2, v[0:1]
buffer_gl0_inv
v_add_co_u32 v10, vcc_lo, s2, v10
v_add_co_ci_u32_e32 v11, vcc_lo, s3, v11, vcc_lo
global_store_b32 v[10:11], v9, off
s_cbranch_scc0 .LBB27_2
.LBB27_7:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| iconv2d_v_bias_16x16_kernel | 2,830 | 1,547 | stackv2-00000-of-00015 |
// Demangled: iconv2d_v_bias_16x16_naive_kernel(float*, float*, int, int)
Function : _Z33iconv2d_v_bias_16x16_naive_kernelPfS_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.Y &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.Y &wr=0x1 ?trans1;
HFMA2 R6, -RZ, RZ, 0, 0 ?trans1;
MOV R34, RZ ?trans1;
S2R R5, SR_CTAID.X &wr=0x2 ?trans1;
S2R R7, SR_TID.X &wr=0x3 ?trans4;
LDC R0, c[0x0][0x364] &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x370] &wr=0x2 ?trans1;
LDCU UR6, c[0x0][0x360] &wr=0x3 ?trans1;
IMAD R0, R0, UR4, R3 &req={1} ?WAIT5_END_GROUP;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
IMAD R0, R0, UR5, R5 &req={2} ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans3;
IMAD R0, R0, UR6, R7 &req={3} ?WAIT5_END_GROUP;
SHF.R.S32.HI R5, RZ, 0x1f, R0 ?WAIT4_END_GROUP;
LEA.HI R5, R5, R0, RZ, 0x4 ?WAIT4_END_GROUP;
LOP3.LUT R5, R5, 0xfffffff0, RZ, 0xc0, !PT ?trans1;
IADD.64 R2, R2, 0x80 &req={1} ?WAIT3_END_GROUP;
IADD3 R7, PT, PT, R0, R5, RZ &req={2,0} ?WAIT7_END_GROUP;
IMAD.WIDE R4, R7, 0x4, R2 ?WAIT5_END_GROUP;
LDG.E R31, desc[UR4][R4.64+-0x80] &wr=0x2 ?trans4;
LDG.E R30, desc[UR4][R4.64+-0x7c] &wr=0x3 ?trans4;
LDG.E R32, desc[UR4][R4.64+-0x78] &wr=0x4 ?trans4;
LDG.E R29, desc[UR4][R4.64+-0x74] &wr=0x5 ?trans4;
LDG.E R28, desc[UR4][R4.64+-0x70] &wr=0x5 ?trans4;
LDG.E R8, desc[UR4][R4.64+-0x6c] &wr=0x5 ?trans4;
LDG.E R9, desc[UR4][R4.64+-0x68] &wr=0x5 ?trans4;
LDG.E R10, desc[UR4][R4.64+-0x64] &wr=0x5 ?trans4;
LDG.E R11, desc[UR4][R4.64+-0x60] &wr=0x5 ?trans4;
LDG.E R12, desc[UR4][R4.64+-0x5c] &wr=0x5 ?trans4;
LDG.E R13, desc[UR4][R4.64+-0x58] &wr=0x5 ?trans4;
LDG.E R14, desc[UR4][R4.64+-0x54] &wr=0x5 ?trans4;
LDG.E R15, desc[UR4][R4.64+-0x50] &wr=0x5 ?trans4;
LDG.E R16, desc[UR4][R4.64+-0x4c] &wr=0x5 ?trans4;
LDG.E R17, desc[UR4][R4.64+-0x48] &wr=0x5 ?trans4;
LDG.E R18, desc[UR4][R4.64+-0x44] &wr=0x5 ?trans4;
LDG.E R19, desc[UR4][R4.64] &wr=0x5 ?trans4;
LDG.E R20, desc[UR4][R4.64+0x4] &wr=0x5 ?trans4;
LDG.E R21, desc[UR4][R4.64+0x8] &wr=0x5 ?trans4;
LDG.E R22, desc[UR4][R4.64+0xc] &wr=0x5 ?trans4;
LDG.E R23, desc[UR4][R4.64+0x10] &wr=0x5 ?trans4;
LDG.E R24, desc[UR4][R4.64+0x14] &wr=0x5 ?trans4;
LDG.E R25, desc[UR4][R4.64+0x18] &wr=0x5 ?trans4;
LDG.E R26, desc[UR4][R4.64+0x1c] &wr=0x5 ?trans4;
LDG.E R27, desc[UR4][R4.64+0x20] &wr=0x5 ?trans1;
FADD R31, R31, R6 &req={2} ?WAIT3_END_GROUP;
LDG.E R6, desc[UR4][R4.64+0x24] &wr=0x2 ?trans1;
FADD R31, R31, R30 &req={3} ?WAIT3_END_GROUP;
LDG.E R30, desc[UR4][R4.64+0x28] &wr=0x3 ?trans1;
FADD R32, R31, R32 &req={4} ?WAIT3_END_GROUP;
LDG.E R31, desc[UR4][R4.64+0x2c] &wr=0x4 ?trans1;
FADD R33, R32, R29 &req={5} ?WAIT3_END_GROUP;
LDG.E R29, desc[UR4][R4.64+0x30] &wr=0x5 ?trans1;
FADD R35, R33, R28 ?WAIT3_END_GROUP;
LDG.E R28, desc[UR4][R4.64+0x34] &wr=0x5 ?trans4;
LDG.E R32, desc[UR4][R4.64+0x38] &wr=0x5 ?trans4;
LDG.E R33, desc[UR4][R4.64+0x3c] &wr=0x5 ?trans1;
FADD R8, R35, R8 ?trans1;
IADD3 R34, PT, PT, R34, 0x2, RZ ?WAIT2_END_GROUP;
IADD3 R7, PT, PT, R7, 0x40, RZ ?trans1;
FADD R9, R8, R9 ?trans2;
ISETP.NE.AND P0, PT, R34, 0x10, PT ?trans2;
FADD R10, R9, R10 ?WAIT4_END_GROUP;
FADD R11, R10, R11 ?WAIT4_END_GROUP;
FADD R12, R11, R12 ?WAIT4_END_GROUP;
FADD R13, R12, R13 ?WAIT4_END_GROUP;
FADD R14, R13, R14 ?WAIT4_END_GROUP;
FADD R15, R14, R15 ?WAIT4_END_GROUP;
FADD R16, R15, R16 ?WAIT4_END_GROUP;
FADD R17, R16, R17 ?WAIT4_END_GROUP;
FADD R18, R17, R18 ?WAIT4_END_GROUP;
FADD R19, R18, R19 ?WAIT4_END_GROUP;
FADD R20, R19, R20 ?WAIT4_END_GROUP;
FADD R21, R20, R21 ?WAIT4_END_GROUP;
FADD R22, R21, R22 ?WAIT4_END_GROUP;
FADD R23, R22, R23 ?WAIT4_END_GROUP;
FADD R24, R23, R24 ?WAIT4_END_GROUP;
FADD R25, R24, R25 ?WAIT4_END_GROUP;
FADD R26, R25, R26 ?WAIT4_END_GROUP;
FADD R27, R26, R27 ?WAIT4_END_GROUP;
FADD R27, R27, R6 &req={2} ?WAIT4_END_GROUP;
FADD R30, R27, R30 &req={3} ?WAIT4_END_GROUP;
FADD R30, R30, R31 &req={4} ?WAIT4_END_GROUP;
FADD R29, R30, R29 &req={5} ?WAIT4_END_GROUP;
FADD R29, R29, R28 ?WAIT4_END_GROUP;
FADD R32, R29, R32 ?WAIT4_END_GROUP;
FADD R6, R32, R33 ?trans1;
@P0 BRA 0x140 ?trans6;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans2;
IMAD.WIDE R2, R0, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R6 ?trans1;
EXIT ?trans5;
BRA 0x5d0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: iconv2d_v_bias_16x16_naive_kernel(float*, float*, int, int)
_Z33iconv2d_v_bias_16x16_naive_kernelPfS_ii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x18
v_bfe_u32 v1, v0, 10, 10
s_mov_b32 s6, 0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s4, s2, 16
s_and_b32 s2, s2, 0xffff
v_mad_u64_u32 v[2:3], null, s15, s4, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[3:4], null, v2, s3, s[14:15]
v_and_b32_e32 v2, 0x3ff, v0
v_mov_b32_e32 v4, 0
v_mad_u64_u32 v[0:1], null, v3, s2, v[2:3]
s_load_b128 s[0:3], s[0:1], 0x0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshrrev_b32_e32 v2, 28, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v2, v0, v2
v_and_b32_e32 v2, -16, v2
s_delay_alu instid0(VALU_DEP_1)
v_add_nc_u32_e32 v2, v0, v2
.LBB29_1:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
s_mov_b64 s[4:5], 0
v_lshlrev_b64 v[5:6], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v3, vcc_lo, s0, v5
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v6, vcc_lo
.LBB29_2:
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v6, vcc_lo, v3, s4
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v5, vcc_lo
s_add_u32 s4, s4, 4
s_addc_u32 s5, s5, 0
s_cmp_eq_u32 s4, 64
global_load_b32 v6, v[6:7], off
s_waitcnt vmcnt(0)
v_add_f32_e32 v4, v4, v6
s_cbranch_scc0 .LBB29_2
v_add_nc_u32_e32 v2, 32, v2
s_add_i32 s6, s6, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s6, 16
s_cbranch_scc0 .LBB29_1
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_store_b32 v[0:1], v4, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| iconv2d_v_bias_16x16_naive_kernel | 2,454 | 1,091 | stackv2-00000-of-00015 |
// Demangled: identity_kernel(float*, float*)
Function : _Z15identity_kernelPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R0, SR_TID.X &wr=0x0 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC R7, c[0x0][0x360] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans8;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD R7, R7, UR6, R0 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R7, 0x4, R2 &req={2} ?WAIT6_END_GROUP;
LDG.E R3, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
IMAD.WIDE R4, R7, 0x4, R4 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R3 &req={2} ?trans1;
EXIT ?trans5;
BRA 0xd0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: identity_kernel(float*, float*)
_Z15identity_kernelPfS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x1c
s_load_b128 s[0:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v2, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| identity_kernel | 384 | 394 | stackv2-00000-of-00015 |
// Demangled: image_2_design_kernel(float*, float*)
Function : _Z21image_2_design_kernelPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R19, SR_TID.Y &wr=0x1 ?trans7;
LDC R8, c[0x0][0x364] &wr=0x1 ?trans1;
LDCU UR8, c[0x0][0x370] &wr=0x2 ?trans1;
S2R R0, SR_TID.X &wr=0x3 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x4 ?trans5;
S2UR UR4, SR_CTAID.Y &wr=0x1 ?trans8;
S2UR UR5, SR_CTAID.X &wr=0x3 ?trans8;
LDC R10, c[0x0][0x360] &wr=0x3 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x5 ?trans1;
IMAD R8, R8, UR4, R19 &req={1} ?WAIT2_END_GROUP;
IMAD R9, R10.reuse, UR5, R0 &req={3} ?trans2;
IMAD R5, R10, UR8, R10 &req={2} ?WAIT4_END_GROUP;
IMAD R7, R8, R5, R9 ?trans1;
SHF.L.U32 R5, R5, 0x4, RZ ?WAIT3_END_GROUP;
IMAD.WIDE R2, R7, 0x4, R2 &req={5} ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans4;
LDG.E R11, desc[UR6][R2.64] &req={4} &wr=0x2 ?trans1;
IMAD.WIDE R4, R5, 0x4, R2 ?WAIT3_END_GROUP;
LDG.E R13, desc[UR6][R2.64+0x40] &rd=0x3 &wr=0x4 ?trans1;
UMOV UR4, 0x400 ?trans1;
LEA R0, R19, R0, 0x5 ?trans1;
LDC.64 R6, c[0x0][0x388] &wr=0x5 ?trans1;
LDG.E R15, desc[UR6][R4.64] &wr=0x4 ?trans4;
LDG.E R17, desc[UR6][R4.64+0x40] &wr=0x4 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?WAIT6_END_GROUP;
LEA R0, R0, UR4, 0x2 ?trans1;
IMAD R2, R10, UR8, RZ &req={3} ?WAIT4_END_GROUP;
IMAD R9, R8, R2, R9 ?trans1;
IADD.64 R2, R6, 0x20 &req={5} ?WAIT4_END_GROUP;
SHF.L.U32 R9, R9, 0x8, RZ ?trans1;
UMOV UR4, 0x20 ?trans1;
STS [R0], R11 &req={2} &rd=0x1 ?trans4;
STS [R0+0x40], R13 &req={4} &rd=0x1 ?trans4;
STS [R0+0x800], R15 &rd=0x1 ?trans4;
STS [R0+0x840], R17 &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 &req={0} ?trans6;
LDS R11, [R0+UR4+-0x1c] &req={1} &wr=0x0 ?trans1;
IMAD.WIDE R4, R9, 0x4, R2 ?WAIT3_END_GROUP;
LDS R13, [R0+UR4+-0x18] &wr=0x1 ?trans4;
LDS R15, [R0+UR4+-0x14] &wr=0x2 ?trans4;
LDS R17, [R0+UR4+-0x10] &wr=0x3 ?trans4;
LDS R7, [R0+UR4+-0x20] &wr=0x4 ?trans4;
LDS R19, [R0+UR4] &wr=0x5 ?trans4;
LDS R6, [R0+UR4+-0xc] &wr=0x0 ?trans4;
LDS R36, [R0+UR4+-0x8] &wr=0x1 ?trans4;
LDS R23, [R0+UR4+-0x4] &wr=0x2 ?trans4;
LDS R21, [R0+UR4+0x4] &wr=0x3 ?trans4;
LDS R24, [R0+UR4+0x8] &wr=0x4 ?trans4;
LDS R26, [R0+UR4+0xc] &wr=0x4 ?trans4;
LDS R25, [R0+UR4+0x10] &wr=0x4 ?trans4;
LDS R27, [R0+UR4+0x14] &wr=0x4 ?trans4;
LDS R29, [R0+UR4+0x18] &wr=0x4 ?trans4;
LDS R31, [R0+UR4+0x1c] &wr=0x4 ?trans4;
STG.E desc[UR6][R4.64+-0x1c], R11 &req={0} ?trans4;
STG.E desc[UR6][R4.64+-0x18], R13 &req={1} ?trans4;
STG.E desc[UR6][R4.64+-0x14], R15 &req={2} ?trans4;
STG.E desc[UR6][R4.64+-0x10], R17 &req={3} ?trans4;
LDS R33, [R0+UR4+0x60] &wr=0x0 ?trans4;
LDS R35, [R0+UR4+0x64] &wr=0x1 ?trans4;
LDS R37, [R0+UR4+0x68] &wr=0x2 ?trans4;
LDS R14, [R0+UR4+0x6c] &wr=0x3 ?trans4;
LDS R16, [R0+UR4+0x70] &wr=0x0 ?trans4;
LDS R18, [R0+UR4+0x74] &wr=0x0 ?trans4;
LDS R20, [R0+UR4+0x78] &wr=0x0 ?trans4;
LDS R22, [R0+UR4+0x7c] &wr=0x0 ?trans4;
LDS R28, [R0+UR4+0x80] &wr=0x0 ?trans4;
LDS R30, [R0+UR4+0x84] &wr=0x0 ?trans4;
LDS R32, [R0+UR4+0x88] &wr=0x0 ?trans4;
LDS R34, [R0+UR4+0x8c] &wr=0x0 ?trans4;
LDS R11, [R0+UR4+0x90] &wr=0x0 ?trans4;
LDS R13, [R0+UR4+0x94] &wr=0x0 ?trans4;
LDS R15, [R0+UR4+0x98] &wr=0x0 ?trans4;
LDS R17, [R0+UR4+0x9c] &wr=0x0 ?trans4;
LDS R12, [R0+UR4+0xe8] &wr=0x0 ?trans4;
LDS R8, [R0+UR4+0xe0] &wr=0x0 ?trans4;
LDS R10, [R0+UR4+0xe4] &wr=0x0 ?trans4;
STG.E desc[UR6][R4.64+-0x20], R7 &req={4} &rd=0x4 ?trans4;
STG.E desc[UR6][R4.64], R19 &req={5} &rd=0x5 ?trans4;
STG.E desc[UR6][R4.64+-0xc], R6 &rd=0x1 ?trans1;
IADD3 R7, PT, PT, R9, 0x10, RZ &req={4} ?WAIT3_END_GROUP;
STG.E desc[UR6][R4.64+-0x8], R36 ?trans1;
IADD3 R19, PT, PT, R9, 0x20, RZ &req={5} ?WAIT3_END_GROUP;
STG.E desc[UR6][R4.64+-0x4], R23 ?trans1;
IMAD.WIDE R6, R7, 0x4, R2 &req={1} ?WAIT3_END_GROUP;
STG.E desc[UR6][R4.64+0x4], R21 ?trans4;
STG.E desc[UR6][R4.64+0x8], R24 ?trans4;
STG.E desc[UR6][R4.64+0xc], R26 ?trans4;
STG.E desc[UR6][R4.64+0x10], R25 ?trans4;
STG.E desc[UR6][R4.64+0x14], R27 ?trans4;
STG.E desc[UR6][R4.64+0x18], R29 ?trans4;
STG.E desc[UR6][R4.64+0x1c], R31 &rd=0x1 ?trans4;
STG.E desc[UR6][R6.64+-0x20], R33 &req={0} ?trans4;
STG.E desc[UR6][R6.64+-0x1c], R35 ?trans1;
IMAD.WIDE R4, R19, 0x4, R2 &req={1} ?WAIT3_END_GROUP;
STG.E desc[UR6][R6.64+-0x18], R37 &req={2} ?trans4;
STG.E desc[UR6][R6.64+-0x14], R14 &req={3} ?trans4;
STG.E desc[UR6][R6.64+-0x10], R16 ?trans4;
STG.E desc[UR6][R6.64+-0xc], R18 ?trans4;
STG.E desc[UR6][R6.64+-0x8], R20 ?trans4;
STG.E desc[UR6][R6.64+-0x4], R22 ?trans4;
STG.E desc[UR6][R6.64], R28 ?trans4;
STG.E desc[UR6][R6.64+0x4], R30 ?trans4;
STG.E desc[UR6][R6.64+0x8], R32 ?trans4;
STG.E desc[UR6][R6.64+0xc], R34 ?trans4;
STG.E desc[UR6][R6.64+0x10], R11 ?trans4;
STG.E desc[UR6][R6.64+0x14], R13 ?trans4;
STG.E desc[UR6][R6.64+0x18], R15 ?trans4;
STG.E desc[UR6][R6.64+0x1c], R17 &rd=0x0 ?trans4;
STG.E desc[UR6][R4.64+-0x18], R12 ?trans4;
LDS R36, [R0+UR4+0xec] &wr=0x1 ?trans4;
STG.E desc[UR6][R4.64+-0x20], R8 ?trans1;
IADD3 R7, PT, PT, R9, 0x30, RZ &req={0} ?WAIT2_END_GROUP;
IADD3 R9, PT, PT, R9, 0x40, RZ ?trans1;
STG.E desc[UR6][R4.64+-0x1c], R10 ?trans2;
IMAD.WIDE R6, R7, 0x4, R2 ?trans2;
LDS R14, [R0+UR4+0xf0] &wr=0x0 ?trans4;
LDS R16, [R0+UR4+0xf4] &wr=0x2 ?trans4;
LDS R18, [R0+UR4+0xf8] &wr=0x3 ?trans4;
LDS R20, [R0+UR4+0xfc] &wr=0x4 ?trans4;
LDS R22, [R0+UR4+0x100] &wr=0x5 ?trans4;
LDS R24, [R0+UR4+0x104] &wr=0x0 ?trans4;
LDS R26, [R0+UR4+0x108] &wr=0x0 ?trans4;
LDS R28, [R0+UR4+0x10c] &wr=0x0 ?trans4;
LDS R30, [R0+UR4+0x110] &wr=0x0 ?trans4;
LDS R32, [R0+UR4+0x114] &wr=0x0 ?trans4;
LDS R34, [R0+UR4+0x118] &wr=0x0 ?trans4;
LDS R12, [R0+UR4+0x11c] &wr=0x0 ?trans4;
LDS R11, [R0+UR4+0x160] &wr=0x0 ?trans4;
LDS R13, [R0+UR4+0x164] &wr=0x0 ?trans4;
LDS R15, [R0+UR4+0x168] &wr=0x0 ?trans4;
LDS R17, [R0+UR4+0x16c] &wr=0x0 ?trans4;
LDS R19, [R0+UR4+0x170] &wr=0x0 ?trans4;
LDS R21, [R0+UR4+0x174] &wr=0x0 ?trans4;
LDS R23, [R0+UR4+0x178] &wr=0x0 ?trans4;
LDS R25, [R0+UR4+0x17c] &wr=0x0 ?trans4;
LDS R27, [R0+UR4+0x180] &wr=0x2 ?trans4;
LDS R29, [R0+UR4+0x184] &wr=0x3 ?trans4;
LDS R31, [R0+UR4+0x188] &wr=0x4 ?trans4;
LDS R33, [R0+UR4+0x18c] &wr=0x5 ?trans4;
LDS R35, [R0+UR4+0x190] &wr=0x5 ?trans4;
LDS R37, [R0+UR4+0x194] &wr=0x5 ?trans4;
LDS R8, [R0+UR4+0x198] &wr=0x5 ?trans4;
LDS R10, [R0+UR4+0x19c] &wr=0x5 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x200, URZ ?WAIT3_END_GROUP;
STG.E desc[UR6][R4.64+-0x14], R36 &req={1} &rd=0x1 ?trans1;
UISETP.NE.AND UP0, UPT, UR4, 0x820, UPT ?WAIT3_END_GROUP;
STG.E desc[UR6][R4.64+-0x10], R14 &req={0} &rd=0x1 ?trans3;
PLOP3.LUT P0, PT, PT, PT, UP0, 0x80, 0x8 ?trans1;
STG.E desc[UR6][R4.64+-0xc], R16 &req={2} &rd=0x1 ?trans4;
STG.E desc[UR6][R4.64+-0x8], R18 &req={3} &rd=0x1 ?trans4;
STG.E desc[UR6][R4.64+-0x4], R20 &req={4} &rd=0x1 ?trans4;
STG.E desc[UR6][R4.64], R22 &req={5} &rd=0x1 ?trans4;
STG.E desc[UR6][R4.64+0x4], R24 &rd=0x1 ?trans4;
STG.E desc[UR6][R4.64+0x8], R26 &rd=0x1 ?trans4;
STG.E desc[UR6][R4.64+0xc], R28 &rd=0x1 ?trans4;
STG.E desc[UR6][R4.64+0x10], R30 &rd=0x1 ?trans4;
STG.E desc[UR6][R4.64+0x14], R32 &rd=0x1 ?trans4;
STG.E desc[UR6][R4.64+0x18], R34 &rd=0x1 ?trans4;
STG.E desc[UR6][R4.64+0x1c], R12 &rd=0x1 ?trans4;
STG.E desc[UR6][R6.64+-0x20], R11 &rd=0x1 ?trans4;
STG.E desc[UR6][R6.64+-0x1c], R13 &rd=0x1 ?trans4;
STG.E desc[UR6][R6.64+-0x18], R15 &rd=0x1 ?trans4;
STG.E desc[UR6][R6.64+-0x14], R17 &rd=0x1 ?trans4;
STG.E desc[UR6][R6.64+-0x10], R19 &rd=0x1 ?trans4;
STG.E desc[UR6][R6.64+-0xc], R21 &rd=0x1 ?trans4;
STG.E desc[UR6][R6.64+-0x8], R23 &rd=0x1 ?trans4;
STG.E desc[UR6][R6.64+-0x4], R25 &rd=0x1 ?trans4;
STG.E desc[UR6][R6.64], R27 &rd=0x1 ?trans4;
STG.E desc[UR6][R6.64+0x4], R29 &rd=0x1 ?trans4;
STG.E desc[UR6][R6.64+0x8], R31 &rd=0x1 ?trans4;
STG.E desc[UR6][R6.64+0xc], R33 &rd=0x1 ?trans4;
STG.E desc[UR6][R6.64+0x10], R35 &rd=0x1 ?trans4;
STG.E desc[UR6][R6.64+0x14], R37 &rd=0x1 ?trans4;
STG.E desc[UR6][R6.64+0x18], R8 &rd=0x1 ?trans4;
STG.E desc[UR6][R6.64+0x1c], R10 &rd=0x1 ?trans1;
@P0 BRA 0x250 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
EXIT ?trans5;
BRA 0xb30;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: image_2_design_kernel(float*, float*)
_Z21image_2_design_kernelPfS_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b32 s6, s[0:1], 0x10
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_and_b32 s7, s2, 0xffff
v_mad_u64_u32 v[2:3], null, s15, s3, v[1:2]
v_mad_u64_u32 v[3:4], null, s14, s7, v[0:1]
s_add_i32 s4, s6, 1
s_load_b128 s[0:3], s[0:1], 0x0
s_mul_i32 s4, s4, s7
s_mul_i32 s6, s6, s7
v_lshlrev_b32_e32 v0, 2, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[4:5], null, s4, v2, v[3:4]
s_lshl_b32 s4, s4, 4
v_mul_lo_u32 v2, s6, v2
s_ashr_i32 s5, s4, 31
v_ashrrev_i32_e32 v5, 31, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_lshl_u32 v2, v3, v2, 8
v_lshlrev_b64 v[4:5], 2, v[4:5]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v3, 31, v2
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, vcc_lo, s0, v4
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
s_lshl_b64 s[0:1], s[4:5], 2
s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
v_add_co_u32 v6, vcc_lo, v4, s0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
s_clause 0x3
global_load_b32 v8, v[4:5], off
global_load_b32 v5, v[4:5], off offset:64
global_load_b32 v9, v[6:7], off
global_load_b32 v6, v[6:7], off offset:64
v_lshl_add_u32 v4, v1, 7, v0
v_lshlrev_b64 v[0:1], 2, v[2:3]
s_mov_b32 s0, 0
s_delay_alu instid0(VALU_DEP_2)
v_add_nc_u32_e32 v2, 0x800, v4
s_waitcnt vmcnt(2)
ds_store_2addr_b32 v4, v8, v5 offset1:16
s_waitcnt vmcnt(0)
ds_store_2addr_b32 v2, v9, v6 offset1:16
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB31_1:
s_delay_alu instid0(VALU_DEP_1)
v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
s_mov_b32 s1, 0
.LBB31_2:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_add_nc_u32_e32 v5, s1, v4
s_add_i32 s1, s1, 4
s_cmp_eq_u32 s1, 64
ds_load_b32 v5, v5
s_waitcnt lgkmcnt(0)
global_store_b32 v[2:3], v5, off
v_add_co_u32 v2, vcc_lo, v2, 4
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
s_cbranch_scc0 .LBB31_2
v_add_co_u32 v0, vcc_lo, v0, 64
v_add_nc_u32_e32 v4, 0x80, v4
v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
s_add_i32 s0, s0, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s0, 16
s_cbranch_scc0 .LBB31_1
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_endpgm
| image_2_design_kernel | 5,013 | 1,415 | stackv2-00000-of-00015 |
// Demangled: logistic_kernel(float*, float*, int)
Function : _Z15logistic_kernelPfS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R0, UR4, R3 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE R2, R0, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
HFMA2 R5, -RZ, RZ, 0.96630859375, -0.0022525787353515625 ?trans1;
MOV R7, 0x437c0000 ?trans1;
BSSY.RECONVERGENT B0, 0x3e0 ?trans3;
FFMA.SAT R4, R2, -R5, 0.5 &req={2} ?WAIT4_END_GROUP;
FFMA.RM R4, R4, R7, 12582913 ?WAIT4_END_GROUP;
FADD R5, R4.reuse, -12583039 ?trans1;
IMAD.SHL.U32 R4, R4, 0x800000, RZ ?WAIT3_END_GROUP;
FFMA R5, R2, -1.4426950216293334961, -R5 ?WAIT4_END_GROUP;
FFMA R10, R2, -1.925963033500011079e-08, R5 ?WAIT4_END_GROUP;
MUFU.EX2 R5, R10 &wr=0x0 ?trans2;
FMUL R11, R4, R5 &req={0} ?WAIT4_END_GROUP;
F2F.F64.F32 R2, R11 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R4, R2, 1 &req={0} &wr=0x0 ?trans2;
IADD3 R2, PT, PT, R5, 0x300402, RZ &req={0} ?WAIT5_END_GROUP;
FSETP.GEU.AND P0, PT, |R2|, 5.8789094863358348022e-39, PT ?trans1;
MUFU.RCP64H R3, R5 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT11_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, -R4, R2, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R6, R6, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R2, R6, R2 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, -R4, R6, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R6, R8, R6 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0x3d0 &req={1,0} ?trans5;
LOP3.LUT R2, R5, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R8, PT, PT, R2, -0x100000, RZ ?trans1;
MOV R2, 0x3d0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x430 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
F2F.F32.F64 R7, R6 &wr=0x1 ?trans1;
IMAD.WIDE R2, R0, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R7 &req={1} ?trans1;
EXIT ?trans5;
DSETP.GTU.AND P0, PT, |R4|, +INF , PT &wr=0x0 ?trans1;
BSSY.RECONVERGENT B1, 0xa00 ?trans4;
@P0 BRA 0x9d0 &req={0} ?trans5;
LOP3.LUT R3, R5, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R6, PT, PT, R3, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R6, 0x7fefffff, PT ?WAIT13_END_GROUP;
@P0 LOP3.LUT R7, R5, 0x7ff00000, RZ, 0x3c, !PT ?trans1;
@P0 MOV R6, RZ ?trans1;
@P0 BRA 0x9f0 ?trans6;
ISETP.GE.U32.AND P0, PT, R3, 0x1000001, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x7b0 ?trans5;
IADD3 R7, PT, PT, R5, -0x3fe00000, RZ ?trans1;
MOV R6, R4 ?WAIT3_END_GROUP;
MUFU.RCP64H R9, R7 &wr=0x0 ?trans3;
DFMA R10, -R6, R8, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R10, R10, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R8, R10, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, -R6, R10, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R10, R8, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R8, 2.2250738585072013831e-308 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, -R4, R8, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R4, R4, R4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R8, R4, R8 &req={0} &rd=0x0 &wr=0x1 ?trans2;
BRA 0x9f0 &req={1,0} ?trans5;
DMUL R4, R4, 8.11296384146066816958e+31 &wr=0x0 ?trans1;
MOV R6, R8 ?trans1;
MUFU.RCP64H R7, R5 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, -R4, R6, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R8, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R6, R8, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, -R4, R8, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R8, R6, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R6, R6, 8.11296384146066816958e+31 &req={0} &wr=0x0 ?trans2;
BRA 0x9f0 &req={0} ?trans5;
LOP3.LUT R7, R5, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R6, R4 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R3, 0x0 ?WAIT4_END_GROUP;
RET.REL.NODEC R2 0x0 ?trans5;
BRA 0xa20;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: logistic_kernel(float*, float*, int)
_Z15logistic_kernelPfS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB5_2
s_load_b128 s[0:3], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_mul_f32_e32 v3, 0xbfb8aa3b, v2
v_cmp_nlt_f32_e32 vcc_lo, 0x42ce8ed0, v2
v_fma_f32 v4, 0xbfb8aa3b, v2, -v3
v_rndne_f32_e32 v5, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_fmamk_f32 v4, v2, 0xb2a5705f, v4 :: v_dual_sub_f32 v3, v3, v5
v_add_f32_e32 v3, v3, v4
v_cvt_i32_f32_e32 v4, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_exp_f32_e32 v3, v3
s_waitcnt_depctr 0xfff
v_ldexp_f32 v3, v3, v4
v_cndmask_b32_e32 v3, 0, v3, vcc_lo
v_cmp_ngt_f32_e32 vcc_lo, 0xc2b17218, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v2, 0x7f800000, v3, vcc_lo
v_cvt_f64_f32_e32 v[2:3], v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[2:3], v[2:3], 1.0
v_div_scale_f64 v[4:5], null, v[2:3], v[2:3], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f64_e32 v[6:7], v[4:5]
s_waitcnt_depctr 0xfff
v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
v_div_scale_f64 v[8:9], vcc_lo, 1.0, v[2:3], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[10:11], v[8:9], v[6:7]
v_fma_f64 v[4:5], -v[4:5], v[10:11], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_div_fmas_f64 v[4:5], v[4:5], v[6:7], v[10:11]
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
v_div_fixup_f64 v[2:3], v[4:5], v[2:3], 1.0
s_delay_alu instid0(VALU_DEP_1)
v_cvt_f32_f64_e32 v2, v[2:3]
global_store_b32 v[0:1], v2, off
.LBB5_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| logistic_kernel | 2,965 | 1,468 | stackv2-00000-of-00015 |
// Demangled: mosaic_kernel(float*, float*, int, int)
Function : _Z13mosaic_kernelPfS_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R4, SR_CTAID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.Y &wr=0x1 ?trans1;
S2R R6, SR_TID.Y &wr=0x2 ?trans1;
S2R R7, SR_CTAID.Z &wr=0x3 ?trans6;
LDC.64 R10, c[0x0][0x390] &wr=0x4 ?trans1;
S2R R8, SR_TID.X &wr=0x5 ?trans7;
LDC R5, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x378] &wr=0x3 ?trans1;
LDCU UR6, c[0x0][0x364] &wr=0x4 ?trans1;
LDCU UR7, c[0x0][0x360] &wr=0x0 ?trans1;
IADD3 R0, PT, PT, R11, UR6, RZ &req={4} ?trans1;
IMAD R3, R5, UR4, R4 &req={1} ?WAIT4_END_GROUP;
IMAD R2, R0, UR4, R6 &req={2} ?trans1;
ISETP.GE.U32.AND P0, PT, R3, R10, PT ?trans1;
IADD3 R0, PT, PT, R11, UR7, RZ &req={0} ?trans1;
IMAD R3, R3, UR5, R7 &req={3} ?trans2;
IMAD R5, R2, R5, R4 ?trans2;
IMAD R3, R3, UR6, R6 ?trans2;
IMAD R0, R0, R5, R8.reuse &req={5} ?trans2;
IMAD R5, R3, UR7, R8 ?WAIT2_END_GROUP;
IMAD R7, R0, UR5, R7 ?trans1;
@P0 EXIT ?trans6;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
LDG.E R3, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
IMAD.WIDE R4, R7, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R3 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x1f0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: mosaic_kernel(float*, float*, int, int)
_Z13mosaic_kernelPfS_ii:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x18
s_load_b64 s[6:7], s[0:1], 0x10
s_add_u32 s8, s0, 24
s_addc_u32 s9, s1, 0
s_waitcnt lgkmcnt(0)
s_mul_i32 s5, s3, s14
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s5, s5, s13
s_cmp_ge_u32 s5, s6
s_cbranch_scc1 .LBB23_2
s_mov_b32 s4, s13
s_load_b64 s[12:13], s[8:9], 0x8
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
s_load_b128 s[8:11], s[0:1], 0x0
s_mov_b32 s2, s15
s_waitcnt lgkmcnt(0)
s_mul_i32 s5, s12, s5
s_lshr_b32 s6, s13, 16
s_add_i32 s5, s5, s15
s_and_b32 s0, s13, 0xffff
v_mad_u64_u32 v[2:3], null, s5, s6, v[1:2]
s_add_i32 s6, s6, s7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[3:4], null, v2, s0, v[0:1]
s_add_i32 s0, s0, s7
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[3:4]
v_add_co_u32 v2, vcc_lo, s8, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
global_load_b32 v5, v[2:3], off
v_mad_u64_u32 v[2:3], null, s6, s14, v[1:2]
v_mad_u64_u32 v[3:4], null, v2, s3, s[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, v3, s0, v[0:1]
v_mad_u64_u32 v[2:3], null, v1, s12, s[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[0:1], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s10, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
s_waitcnt vmcnt(0)
global_store_b32 v[0:1], v5, off
.LBB23_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| mosaic_kernel | 796 | 1,033 | stackv2-00000-of-00015 |
// Demangled: mosaic_orig_kernel(float*, float*, int, int)
Function : _Z18mosaic_orig_kernelPfS_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R4, SR_CTAID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.Y &wr=0x1 ?trans1;
S2R R6, SR_TID.Y &wr=0x2 ?trans1;
S2R R7, SR_TID.Z &wr=0x3 ?trans6;
LDC.64 R10, c[0x0][0x390] &wr=0x4 ?trans1;
S2R R8, SR_TID.X &wr=0x5 ?trans7;
LDC R5, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x368] &wr=0x3 ?trans1;
LDCU UR6, c[0x0][0x364] &wr=0x4 ?trans1;
LDCU UR7, c[0x0][0x360] &wr=0x0 ?trans1;
IADD3 R0, PT, PT, R11, UR6, RZ &req={4} ?trans1;
IMAD R3, R5, UR4, R4 &req={1} ?WAIT4_END_GROUP;
IMAD R2, R0, UR4, R6 &req={2} ?trans1;
ISETP.GE.U32.AND P0, PT, R3, R10, PT ?trans1;
IADD3 R0, PT, PT, R11, UR7, RZ &req={0} ?trans1;
IMAD R3, R3, UR5, R7 &req={3} ?trans2;
IMAD R5, R2, R5, R4 ?trans2;
IMAD R3, R3, UR6, R6 ?trans2;
IMAD R0, R0, R5, R8.reuse &req={5} ?trans2;
IMAD R5, R3, UR7, R8 ?WAIT2_END_GROUP;
IMAD R7, R0, UR5, R7 ?trans1;
@P0 EXIT ?trans6;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
LDG.E R3, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
IMAD.WIDE R4, R7, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R3 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x1f0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: mosaic_orig_kernel(float*, float*, int, int)
_Z18mosaic_orig_kernelPfS_ii:
s_clause 0x1
s_load_b32 s6, s[0:1], 0x18
s_load_b64 s[2:3], s[0:1], 0x10
s_add_u32 s4, s0, 24
s_addc_u32 s5, s1, 0
s_waitcnt lgkmcnt(0)
s_mul_i32 s7, s6, s15
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s7, s7, s14
s_cmp_ge_u32 s7, s2
s_cbranch_scc1 .LBB22_2
s_load_b64 s[4:5], s[4:5], 0xc
v_bfe_u32 v1, v0, 20, 10
s_load_b128 s[8:11], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s5, 0xffff
s_lshr_b32 s5, s4, 16
v_mad_u64_u32 v[2:3], null, s7, s2, v[1:2]
v_bfe_u32 v3, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
s_and_b32 s0, s4, 0xffff
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[4:5], null, v2, s5, v[3:4]
s_add_i32 s5, s5, s3
v_mad_u64_u32 v[5:6], null, v4, s0, v[0:1]
s_add_i32 s0, s0, s3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v6, 31, v5
v_lshlrev_b64 v[4:5], 2, v[5:6]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v4, vcc_lo, s8, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s9, v5, vcc_lo
global_load_b32 v6, v[4:5], off
v_mad_u64_u32 v[4:5], null, s5, s15, v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, v4, s6, s[14:15]
v_mad_u64_u32 v[3:4], null, v2, s0, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[4:5], null, v3, s2, v[1:2]
v_ashrrev_i32_e32 v5, 31, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[4:5]
v_add_co_u32 v0, vcc_lo, s10, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
s_waitcnt vmcnt(0)
global_store_b32 v[0:1], v6, off
.LBB22_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| mosaic_orig_kernel | 796 | 1,053 | stackv2-00000-of-00015 |
// Demangled: mult_kernel(float*, float*, float*, int)
Function : _Z11mult_kernelPfS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x398] &wr=0x2 ?trans7;
LDC R9, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R9, R9, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R9, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD.WIDE R2, R9, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x4 ?trans1;
IMAD.WIDE R4, R9, 0x4, R4 &req={2} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x4 ?trans1;
IMAD.WIDE R6, R9, 0x4, R6 &req={3} ?WAIT4_END_GROUP;
FMUL R9, R2, R5 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x140;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: mult_kernel(float*, float*, float*, int)
_Z11mult_kernelPfS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[4:7], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_mul_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| mult_kernel | 568 | 577 | stackv2-00000-of-00015 |
// Demangled: sample_kernel(float*, float*, float*)
Function : _Z13sample_kernelPfS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans7;
LDC R9, c[0x0][0x360] &wr=0x1 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x3 ?trans8;
LDC.64 R4, c[0x0][0x388] &wr=0x4 ?trans1;
IMAD R9, R9, UR6, R0 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R9, 0x4, R2 &req={3} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={2} &wr=0x2 ?trans1;
IMAD.WIDE R4, R9, 0x4, R4 &req={4} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x2 ?trans1;
SHF.R.S32.HI R0, RZ, 0x1f, R9 ?trans1;
FSETP.GT.AND P0, PT, R2, R5, PT &req={2} ?WAIT13_END_GROUP;
@P0 LDC.64 R6, c[0x0][0x390] &wr=0x1 ?trans1;
@P0 MOV R11, 0x3f800000 ?trans1;
@P0 LEA R6, P1, R9, R6, 0x2 &req={1} ?WAIT4_END_GROUP;
@P0 LEA.HI.X R7, R9, R7, R0, 0x2, P1 ?WAIT5_END_GROUP;
@P0 STG.E desc[UR4][R6.64], R11 &rd=0x1 ?trans1;
@P0 EXIT &req={0} ?trans5;
LDCU.64 UR6, c[0x0][0x390] &wr=0x0 ?trans2;
LEA R2, P0, R9, UR6, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R3, R9, UR7, R0, 0x2, P0 ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], RZ ?trans1;
EXIT ?trans5;
BRA 0x190;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: sample_kernel(float*, float*, float*)
_Z13sample_kernelPfS_S_:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
s_waitcnt vmcnt(0)
v_cmp_gt_f32_e32 vcc_lo, v2, v3
v_cndmask_b32_e64 v2, 0, 1.0, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| sample_kernel | 734 | 524 | stackv2-00000-of-00015 |
// Demangled: softmax_divide_kernel(float*, float*, int)
Function : _Z21softmax_divide_kernelPfS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R8, SR_CTAID.Y &wr=0x1 ?trans7;
LDC R6, c[0x0][0x360] &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x3 ?trans1;
S2R R11, SR_CTAID.X &wr=0x4 ?trans1;
S2R R9, SR_TID.X &wr=0x2 ?trans5;
S2UR UR6, SR_CTAID.Z &wr=0x1 ?trans8;
LDC R7, c[0x0][0x374] &wr=0x1 ?trans1;
LDCU UR7, c[0x0][0x370] &wr=0x4 ?trans7;
LDC.64 R2, c[0x0][0x388] &wr=0x5 ?trans1;
IMAD R0, R7, UR6, R8 &req={1} ?WAIT4_END_GROUP;
IMAD R5, R0, UR7, R11 &req={4} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R5, 0x4, R2 &req={5} ?trans2;
LDC.64 R4, c[0x0][0x380] &wr=0x1 ?trans2;
IMAD R0, R6, UR6, R9 &req={2} ?trans2;
LDG.E R3, desc[UR4][R2.64] &req={3} &wr=0x2 ?trans2;
IMAD R0, R0, R7, R8 ?WAIT4_END_GROUP;
IMAD R7, R0, UR7, R11 ?WAIT4_END_GROUP;
IMAD.WIDE R4, R7, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R4.64] &wr=0x3 ?trans1;
BSSY.RECONVERGENT B0, 0x200 ?trans1;
MUFU.RCP R6, R3 &req={2} &wr=0x1 ?trans2;
FFMA R7, -R3, R6, 1 &req={1} ?WAIT4_END_GROUP;
FFMA R7, R6, R7, R6 ?trans1;
FCHK P0, R0, R3 &req={3} &wr=0x1 ?trans3;
FFMA R6, R0, R7, RZ ?WAIT4_END_GROUP;
FFMA R2, -R3, R6, R0 ?WAIT4_END_GROUP;
FFMA R7, R7, R2, R6 ?trans1;
@!P0 BRA 0x1f0 &req={1,0} ?trans6;
MOV R2, 0x1f0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x220 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
STG.E desc[UR4][R4.64], R7 ?trans1;
EXIT ?trans5;
SHF.R.U32.HI R7, RZ, 0x17, R3 ?trans1;
BSSY.RECONVERGENT B1, 0x880 ?trans1;
SHF.R.U32.HI R6, RZ, 0x17, R0 ?trans2;
LOP3.LUT R7, R7, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R6, R6, 0xff, RZ, 0xc0, !PT ?trans1;
MOV R8, R0 ?trans1;
IADD3 R12, PT, PT, R7, -0x1, RZ ?trans1;
MOV R9, R3 ?trans1;
IADD3 R11, PT, PT, R6, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R12, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R11, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R10, RZ ?trans1;
@!P0 BRA 0x460 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0x860 ?trans5;
LOP3.LUT P0, RZ, R9, 0x7fffffff, R8, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x840 ?trans5;
FSETP.NEU.FTZ.AND P2, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P1 BRA !P2, 0x840 ?trans5;
LOP3.LUT P2, RZ, R8, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P1, P2, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0x820 ?trans5;
LOP3.LUT P1, RZ, R9, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x7f0 ?trans5;
ISETP.GE.AND P0, PT, R11, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R12, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R10, RZ ?trans1;
@!P0 MOV R10, 0xffffffc0 ?trans1;
@!P0 FFMA R8, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R9, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R10, PT, PT, R10, 0x40, RZ ?WAIT7_END_GROUP;
LEA R0, R7, 0xc0800000, 0x17 ?trans1;
BSSY.RECONVERGENT B2, 0x7e0 ?trans1;
IADD3 R6, PT, PT, R6, -0x7f, RZ ?trans2;
IADD3 R9, PT, PT, -R0, R9, RZ ?WAIT3_END_GROUP;
IMAD R0, R6.reuse, -0x800000, R8 ?trans1;
IADD3 R7, PT, PT, R6, 0x7f, -R7 ?trans1;
MUFU.RCP R3, R9 &wr=0x0 ?trans1;
FADD.FTZ R11, -R9, -RZ ?trans2;
IADD3 R7, PT, PT, R7, R10, RZ ?trans2;
FFMA R12, R3, R11, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R12, R3, R12, R3 ?WAIT4_END_GROUP;
FFMA R3, R0, R12, RZ ?WAIT4_END_GROUP;
FFMA R8, R11, R3, R0 ?WAIT4_END_GROUP;
FFMA R13, R12, R8, R3 ?WAIT4_END_GROUP;
FFMA R8, R11, R13, R0 ?WAIT4_END_GROUP;
FFMA R3, R12, R8, R13 ?WAIT5_END_GROUP;
SHF.R.U32.HI R0, RZ, 0x17, R3 ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R10, PT, PT, R0, R7, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R10, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x7c0 ?trans5;
ISETP.GT.AND P0, PT, R10, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x790 ?trans5;
ISETP.GE.AND P0, PT, R10, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x7d0 ?trans5;
ISETP.GE.AND P0, PT, R10, -0x18, PT ?trans1;
LOP3.LUT R3, R3, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x7d0 ?trans5;
FFMA.RZ R0, R12, R8.reuse, R13.reuse ?trans1;
IADD3 R9, PT, PT, R10, 0x20, RZ ?trans1;
FFMA.RM R7, R12, R8, R13 ?trans1;
ISETP.NE.AND P1, PT, R10.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R10, RZ, PT ?trans1;
LOP3.LUT R0, R0, 0x7fffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R6, R0, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R0, R12, R8, R13 ?trans1;
IADD3 R8, PT, PT, -R10, RZ, RZ ?trans2;
SHF.L.U32 R9, R6, R9, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R0, R7, PT ?trans1;
SEL R7, R8, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R9, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R7, RZ, R7, R6 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R9, RZ, 0x1, R7 ?WAIT3_END_GROUP;
SEL R0, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R0, R0, 0x1, R9, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, R7, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R9, R0, RZ ?WAIT4_END_GROUP;
LOP3.LUT R3, R0, R3, RZ, 0xfc, !PT ?trans1;
BRA 0x7d0 ?trans6;
LOP3.LUT R3, R3, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x7d0 ?trans6;
IMAD R3, R7, 0x800000, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
BRA 0x870 ?trans5;
LOP3.LUT R3, R9, 0x80000000, R8, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x870 ?trans6;
LOP3.LUT R3, R9, 0x80000000, R8, 0x48, !PT ?trans1;
BRA 0x870 ?trans6;
MUFU.RSQ R3, -QNAN &wr=0x0 ?trans1;
BRA 0x870 ?trans5;
FADD.FTZ R3, R0, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R7, R3 &req={0} ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R2 0x0 ?trans5;
BRA 0x8b0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: softmax_divide_kernel(float*, float*, int)
_Z21softmax_divide_kernelPfS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b64 s[6:7], s[0:1], 0x18
s_mov_b32 s4, s13
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_load_b128 s[0:3], s[0:1], 0x0
v_mad_u64_u32 v[2:3], null, v1, s7, s[14:15]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[0:1], null, v2, s6, s[4:5]
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_mul_i32 s0, s7, s15
s_add_i32 s0, s0, s14
global_load_b32 v2, v[0:1], off
s_mul_i32 s0, s0, s6
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s0, s0, s13
s_ashr_i32 s1, s0, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[0:1], s[0:1], 2
s_add_u32 s0, s2, s0
s_addc_u32 s1, s3, s1
s_load_b32 s0, s[0:1], 0x0
s_waitcnt vmcnt(0) lgkmcnt(0)
v_div_scale_f32 v3, null, s0, s0, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f32_e32 v4, v3
s_waitcnt_depctr 0xfff
v_fma_f32 v5, -v3, v4, 1.0
v_fmac_f32_e32 v4, v5, v4
v_div_scale_f32 v5, vcc_lo, v2, s0, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v6, v5, v4
v_fma_f32 v7, -v3, v6, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v6, v7, v4
v_fma_f32 v3, -v3, v6, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fmas_f32 v3, v3, v4, v6
v_div_fixup_f32 v2, v3, s0, v2
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| softmax_divide_kernel | 3,397 | 1,077 | stackv2-00000-of-00015 |
// Demangled: softmax_naive_kernel(float*, float*)
Function : _Z20softmax_naive_kernelPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans8;
LDC.64 R4, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD R2, R0, UR6, RZ &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R18, R2, 0x4, R4 &req={3} ?WAIT6_END_GROUP;
LDG.E R18, desc[UR4][R18.64] &req={2} &rd=0x1 &wr=0x5 ?trans1;
ISETP.GE.U32.AND P0, PT, R0, 0x2, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xa00 &req={1,0} ?trans5;
IADD3 R3, PT, PT, R0.reuse, -0x2, RZ ?trans2;
IADD3 R16, PT, PT, R0, -0x1, RZ ?trans1;
HFMA2 R19, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans2;
ISETP.GE.U32.AND P0, PT, R3, 0xf, PT ?trans1;
LOP3.LUT R31, R16, 0xf, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x590 ?trans5;
LOP3.LUT R3, R16, 0xfffffff0, RZ, 0xc0, !PT ?trans1;
MOV R19, 0x8 ?trans1;
MOV R17, R2 ?trans2;
IADD3 R3, PT, PT, -R3, RZ, RZ ?WAIT7_END_GROUP;
IADD3 R7, PT, PT, R17.reuse, 0x1, RZ ?trans2;
IADD3 R29, PT, PT, R17.reuse, 0x2, RZ ?trans2;
IADD3 R9, PT, PT, R17, 0x3, RZ ?trans1;
IMAD.WIDE.U32 R6, R7, 0x4, R4 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R28, R29, 0x4, R4.reuse ?trans1;
LDG.E R21, desc[UR4][R6.64] &rd=0x0 &wr=0x2 ?trans1;
IADD3 R15, PT, PT, R17, 0x4, RZ ?trans2;
IMAD.WIDE.U32 R8, R9, 0x4, R4.reuse ?trans2;
LDG.E R28, desc[UR4][R28.64] &wr=0x3 ?trans1;
IADD3 R35, PT, PT, R17, 0x5, RZ ?trans1;
IMAD.WIDE.U32 R14, R15, 0x4, R4.reuse ?trans2;
LDG.E R27, desc[UR4][R8.64] &rd=0x1 &wr=0x4 ?trans1;
IADD3 R37, PT, PT, R17, 0x6, RZ ?trans1;
IMAD.WIDE.U32 R34, R35, 0x4, R4 ?WAIT2_END_GROUP;
LDG.E R26, desc[UR4][R14.64] &rd=0x0 &wr=0x4 ?trans1;
IADD3 R13, PT, PT, R17, 0x7, RZ ?trans1;
IMAD.WIDE.U32 R36, R37, 0x4, R4.reuse ?trans2;
LDG.E R25, desc[UR4][R34.64] &wr=0x4 ?trans1;
IADD3 R11, PT, PT, R17, 0x8, RZ ?trans1;
IMAD.WIDE.U32 R12, R13, 0x4, R4.reuse ?trans2;
LDG.E R24, desc[UR4][R36.64] &wr=0x4 ?trans1;
IADD3 R33, PT, PT, R17, 0x9, RZ ?trans1;
IMAD.WIDE.U32 R10, R11, 0x4, R4 ?WAIT2_END_GROUP;
LDG.E R23, desc[UR4][R12.64] &wr=0x4 ?trans1;
IADD3 R7, PT, PT, R17, 0xa, RZ &req={0} ?trans1;
IMAD.WIDE.U32 R32, R33, 0x4, R4.reuse ?trans2;
LDG.E R22, desc[UR4][R10.64] &rd=0x0 &wr=0x4 ?trans1;
IADD3 R9, PT, PT, R17, 0xb, RZ &req={1} ?trans1;
IMAD.WIDE.U32 R6, R7, 0x4, R4.reuse ?trans2;
LDG.E R20, desc[UR4][R32.64] &rd=0x1 &wr=0x4 ?trans1;
IADD3 R15, PT, PT, R17, 0xc, RZ ?trans1;
IMAD.WIDE.U32 R8, R9, 0x4, R4 ?WAIT2_END_GROUP;
LDG.E R29, desc[UR4][R6.64] &rd=0x1 &wr=0x4 ?trans2;
IMAD.WIDE.U32 R14, R15, 0x4, R4 ?trans1;
IADD3 R11, PT, PT, R17.reuse, 0xd, RZ &req={0} ?trans1;
LDG.E R30, desc[UR4][R8.64] &rd=0x0 &wr=0x4 ?trans1;
IADD3 R13, PT, PT, R17, 0xe, RZ ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R10, R11, 0x4, R4.reuse ?trans1;
LDG.E R14, desc[UR4][R14.64] &wr=0x4 ?trans1;
IADD3 R33, PT, PT, R17, 0xf, RZ &req={1} ?trans2;
IMAD.WIDE.U32 R12, R13, 0x4, R4.reuse ?trans2;
LDG.E R10, desc[UR4][R10.64] &wr=0x4 ?trans1;
IADD3 R17, PT, PT, R17, 0x10, RZ ?trans1;
IMAD.WIDE.U32 R6, R33, 0x4, R4.reuse ?trans2;
LDG.E R12, desc[UR4][R12.64] &wr=0x4 ?trans2;
IMAD.WIDE.U32 R8, R17, 0x4, R4 &req={0} ?WAIT2_END_GROUP;
LDG.E R6, desc[UR4][R6.64] &wr=0x4 ?trans4;
LDG.E R8, desc[UR4][R8.64] &wr=0x4 ?trans1;
IADD3 R3, PT, PT, R3, 0x10, RZ ?trans2;
IADD3 R19, PT, PT, R19, 0x10, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R3, RZ, PT ?trans1;
FMNMX R21, R21, R18, !PT &req={5,2} ?WAIT5_END_GROUP;
FMNMX R28, R21, R28, !PT &req={3} ?WAIT5_END_GROUP;
FMNMX R27, R28, R27, !PT &req={4} ?WAIT5_END_GROUP;
FMNMX R26, R27, R26, !PT ?WAIT5_END_GROUP;
FMNMX R25, R26, R25, !PT ?WAIT5_END_GROUP;
FMNMX R24, R25, R24, !PT ?WAIT5_END_GROUP;
FMNMX R23, R24, R23, !PT ?WAIT5_END_GROUP;
FMNMX R23, R23, R22, !PT ?WAIT5_END_GROUP;
FMNMX R20, R23, R20, !PT ?WAIT5_END_GROUP;
FMNMX R29, R20, R29, !PT ?WAIT5_END_GROUP;
FMNMX R29, R29, R30, !PT ?WAIT5_END_GROUP;
FMNMX R29, R29, R14, !PT ?WAIT5_END_GROUP;
FMNMX R29, R29, R10, !PT ?WAIT5_END_GROUP;
FMNMX R29, R29, R12, !PT ?WAIT5_END_GROUP;
FMNMX R29, R29, R6, !PT ?WAIT5_END_GROUP;
FMNMX R18, R29, R8, !PT ?trans1;
@P0 BRA 0x140 ?trans6;
IADD3 R19, PT, PT, R19, -0x7, RZ ?WAIT7_END_GROUP;
ISETP.NE.AND P0, PT, R31, RZ, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xa00 ?trans5;
ISETP.GE.U32.AND P0, PT, R31, 0x8, PT ?trans1;
LOP3.LUT R21, R16, 0x7, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R21, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x800 ?trans6;
IADD3 R17, PT, PT, R2, R19, RZ ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R6, R17.reuse, 0x4, R4.reuse ?trans1;
IADD3 R9, PT, PT, R17.reuse, 0x1, RZ ?trans2;
IADD3 R11, PT, PT, R17, 0x2, RZ ?trans2;
LDG.E R3, desc[UR4][R6.64] &rd=0x0 &wr=0x2 ?trans1;
IMAD.WIDE.U32 R8, R9, 0x4, R4 ?trans1;
IADD3 R13, PT, PT, R17, 0x3, RZ ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R10, R11, 0x4, R4.reuse ?trans1;
LDG.E R20, desc[UR4][R8.64] &wr=0x3 ?trans1;
IADD3 R15, PT, PT, R17, 0x4, RZ ?trans2;
IMAD.WIDE.U32 R12, R13, 0x4, R4.reuse ?trans1;
LDG.E R22, desc[UR4][R10.64] &rd=0x1 &wr=0x4 ?trans1;
IADD3 R23, PT, PT, R17, 0x5, RZ ?trans2;
IMAD.WIDE.U32 R14, R15, 0x4, R4.reuse ?trans2;
LDG.E R12, desc[UR4][R12.64] &wr=0x4 ?trans2;
IMAD.WIDE.U32 R6, R23, 0x4, R4 &req={0} ?trans1;
IADD3 R23, PT, PT, R17.reuse, 0x6, RZ ?trans1;
LDG.E R14, desc[UR4][R14.64] &wr=0x4 ?trans1;
IADD3 R11, PT, PT, R17, 0x7, RZ &req={1} ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R8, R23, 0x4, R4.reuse ?trans1;
LDG.E R6, desc[UR4][R6.64] &wr=0x4 ?trans3;
IMAD.WIDE.U32 R10, R11, 0x4, R4 ?trans2;
LDG.E R8, desc[UR4][R8.64] &wr=0x4 ?trans4;
LDG.E R10, desc[UR4][R10.64] &wr=0x4 ?trans1;
IADD3 R19, PT, PT, R19, 0x8, RZ ?trans1;
FMNMX R3, R18, R3, !PT &req={5,2} ?WAIT5_END_GROUP;
FMNMX R3, R3, R20, !PT &req={3} ?WAIT5_END_GROUP;
FMNMX R3, R3, R22, !PT &req={4} ?WAIT5_END_GROUP;
FMNMX R3, R3, R12, !PT ?WAIT5_END_GROUP;
FMNMX R3, R3, R14, !PT ?WAIT5_END_GROUP;
FMNMX R3, R3, R6, !PT ?WAIT5_END_GROUP;
FMNMX R3, R3, R8, !PT ?WAIT5_END_GROUP;
FMNMX R18, R3, R10, !PT ?WAIT7_END_GROUP;
@!P1 BRA 0xa00 ?trans5;
ISETP.GE.U32.AND P0, PT, R21, 0x4, PT ?trans1;
LOP3.LUT R16, R16, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R16, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x960 ?trans6;
IADD3 R3, PT, PT, R2, R19, RZ ?WAIT4_END_GROUP;
IADD3 R9, PT, PT, R3.reuse, 0x1, RZ ?trans1;
IMAD.WIDE.U32 R6, R3.reuse, 0x4, R4 ?trans1;
IADD3 R11, PT, PT, R3, 0x2, RZ ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R8, R9, 0x4, R4.reuse ?trans2;
LDG.E R7, desc[UR4][R6.64] &wr=0x2 ?trans1;
IADD3 R13, PT, PT, R3, 0x3, RZ ?trans1;
IMAD.WIDE.U32 R10, R11, 0x4, R4.reuse ?trans2;
LDG.E R9, desc[UR4][R8.64] &wr=0x3 ?trans2;
IMAD.WIDE.U32 R12, R13, 0x4, R4 ?trans2;
LDG.E R11, desc[UR4][R10.64] &wr=0x4 ?trans4;
LDG.E R13, desc[UR4][R12.64] &wr=0x4 ?trans1;
IADD3 R19, PT, PT, R19, 0x4, RZ ?trans1;
FMNMX R18, R18, R7, !PT &req={5,2} ?WAIT5_END_GROUP;
FMNMX R18, R18, R9, !PT &req={3} ?WAIT5_END_GROUP;
FMNMX R18, R18, R11, !PT &req={4} ?WAIT5_END_GROUP;
FMNMX R18, R18, R13, !PT ?WAIT7_END_GROUP;
@!P1 BRA 0xa00 ?trans5;
IADD3 R19, PT, PT, R2, R19, RZ ?trans2;
IADD3 R16, PT, PT, -R16, RZ, RZ ?WAIT7_END_GROUP;
IMAD.WIDE.U32 R6, R19, 0x4, R4 ?WAIT6_END_GROUP;
LDG.E R7, desc[UR4][R6.64] &wr=0x2 ?trans1;
IADD3 R16, PT, PT, R16, 0x1, RZ ?trans2;
IADD3 R19, PT, PT, R19, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R16, RZ, PT ?trans1;
FMNMX R18, R7, R18, !PT &req={5,2} ?WAIT12_END_GROUP;
@P0 BRA 0x990 ?trans5;
S2R R3, SR_TID.X &wr=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
IADD3 R3, PT, PT, R2, R3, RZ &req={0} ?WAIT5_END_GROUP;
IMAD.WIDE R4, R3, 0x4, R4 ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x2 ?trans1;
MOV R7, 0x3bbb989d ?trans1;
HFMA2 R9, -RZ, RZ, 3.7421875, 0 ?trans1;
ISETP.GE.U32.AND P0, PT, R0, 0x10, PT ?trans1;
MOV R23, RZ ?trans1;
FADD R18, R5, -R18 &req={5,2} ?WAIT4_END_GROUP;
FFMA.SAT R6, R18, R7, 0.5 ?WAIT4_END_GROUP;
FFMA.RM R8, R6, R9, 12582913 ?WAIT4_END_GROUP;
FADD R7, R8.reuse, -12583039 ?trans1;
IMAD.SHL.U32 R8, R8, 0x800000, RZ ?WAIT3_END_GROUP;
FFMA R9, R18.reuse, 1.4426950216293334961, -R7 ?trans2;
LDC.64 R6, c[0x0][0x388] &wr=0x0 ?trans2;
FFMA R18, R18, 1.925963033500011079e-08, R9 ?WAIT4_END_GROUP;
MUFU.EX2 R9, R18 &wr=0x1 ?trans1;
IMAD.WIDE R4, R3, 0x4, R6 &req={0} ?WAIT4_END_GROUP;
FMUL R11, R8, R9 &req={1} ?trans1;
HFMA2 R9, -RZ, RZ, 0, 0 ?trans1;
LOP3.LUT R3, R0, 0xf, RZ, 0xc0, !PT ?WAIT3_END_GROUP;
STG.E desc[UR4][R4.64], R11 &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P0 BRA 0x1030 ?trans5;
LOP3.LUT R22, R0, 0xfffffff0, RZ, 0xc0, !PT ?trans1;
MOV R23, RZ ?trans1;
MOV R20, 0x7 ?trans1;
MOV R21, R2 ?trans1;
IADD3 R22, PT, PT, -R22, RZ, RZ ?WAIT7_END_GROUP;
IADD3 R13, PT, PT, R21.reuse, 0x1, RZ ?trans1;
IMAD.WIDE.U32 R8, R21.reuse, 0x4, R6 ?trans1;
IADD3 R15, PT, PT, R21, 0x2, RZ ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R12, R13, 0x4, R6.reuse ?trans1;
LDG.E R24, desc[UR4][R8.64] &rd=0x1 &wr=0x2 ?trans1;
IADD3 R17, PT, PT, R21, 0x3, RZ ?trans2;
IMAD.WIDE.U32 R14, R15, 0x4, R6.reuse ?trans1;
LDG.E R25, desc[UR4][R12.64] &rd=0x3 &wr=0x4 ?trans1;
IADD3 R19, PT, PT, R21, 0x4, RZ ?trans2;
IMAD.WIDE.U32 R16, R17, 0x4, R6 ?trans1;
LDG.E R26, desc[UR4][R14.64] &rd=0x5 &wr=0x4 ?trans1;
IADD3 R11, PT, PT, R21, 0x5, RZ &req={0} ?WAIT2_END_GROUP;
IMAD.WIDE.U32 R18, R19, 0x4, R6.reuse ?trans1;
LDG.E R27, desc[UR4][R16.64] &rd=0x0 &wr=0x4 ?trans1;
IADD3 R29, PT, PT, R21, 0x6, RZ ?trans2;
IMAD.WIDE.U32 R10, R11, 0x4, R6.reuse ?trans1;
LDG.E R28, desc[UR4][R18.64] &rd=0x0 &wr=0x4 ?trans1;
IADD3 R9, PT, PT, R21, 0x7, RZ &req={1} ?trans2;
IMAD.WIDE.U32 R12, R29, 0x4, R6.reuse &req={3} ?trans2;
LDG.E R29, desc[UR4][R10.64] &rd=0x1 &wr=0x3 ?trans1;
IADD3 R31, PT, PT, R21, 0x8, RZ ?trans1;
IMAD.WIDE.U32 R14, R9, 0x4, R6 &req={5} ?WAIT2_END_GROUP;
LDG.E R30, desc[UR4][R12.64] &rd=0x5 &wr=0x3 ?trans1;
IADD3 R9, PT, PT, R21, 0x9, RZ ?trans1;
IMAD.WIDE.U32 R16, R31, 0x4, R6.reuse &req={0} ?trans1;
IADD3 R33, PT, PT, R21, 0xa, RZ ?trans1;
LDG.E R31, desc[UR4][R14.64] &rd=0x0 &wr=0x3 ?trans2;
IMAD.WIDE.U32 R8, R9, 0x4, R6.reuse ?trans1;
IADD3 R19, PT, PT, R21, 0xb, RZ ?trans1;
LDG.E R32, desc[UR4][R16.64] &rd=0x0 &wr=0x3 ?trans2;
IMAD.WIDE.U32 R10, R33, 0x4, R6.reuse &req={1} ?trans1;
IADD3 R35, PT, PT, R21, 0xc, RZ ?trans1;
LDG.E R33, desc[UR4][R8.64] &rd=0x1 &wr=0x3 ?trans2;
IMAD.WIDE.U32 R12, R19, 0x4, R6.reuse &req={5} ?trans1;
IADD3 R19, PT, PT, R21, 0xd, RZ ?trans1;
LDG.E R10, desc[UR4][R10.64] &wr=0x5 ?trans2;
IMAD.WIDE.U32 R14, R35, 0x4, R6.reuse &req={0} ?trans1;
IADD3 R35, PT, PT, R21, 0xe, RZ ?trans1;
LDG.E R12, desc[UR4][R12.64] &wr=0x5 ?trans2;
IMAD.WIDE.U32 R16, R19, 0x4, R6.reuse ?trans1;
IADD3 R19, PT, PT, R21, 0xf, RZ ?trans1;
LDG.E R14, desc[UR4][R14.64] &wr=0x5 ?trans2;
IMAD.WIDE.U32 R8, R35, 0x4, R6 &req={1} ?WAIT2_END_GROUP;
LDG.E R16, desc[UR4][R16.64] &wr=0x5 ?trans2;
IMAD.WIDE.U32 R18, R19, 0x4, R6 ?trans2;
LDG.E R8, desc[UR4][R8.64] &wr=0x5 ?trans4;
LDG.E R18, desc[UR4][R18.64] &wr=0x5 ?trans1;
IADD3 R22, PT, PT, R22, 0x10, RZ ?trans2;
IADD3 R20, PT, PT, R20, 0x10, RZ ?WAIT2_END_GROUP;
IADD3 R21, PT, PT, R21, 0x10, RZ ?trans1;
ISETP.NE.AND P0, PT, R22, RZ, PT ?trans1;
FADD R24, R24, R23 &req={2} ?WAIT4_END_GROUP;
FADD R25, R24, R25 &req={4} ?WAIT4_END_GROUP;
FADD R26, R25, R26 ?WAIT4_END_GROUP;
FADD R27, R26, R27 ?WAIT4_END_GROUP;
FADD R28, R27, R28 ?WAIT4_END_GROUP;
FADD R29, R28, R29 &req={3} ?WAIT4_END_GROUP;
FADD R30, R29, R30 ?WAIT4_END_GROUP;
FADD R31, R30, R31 ?WAIT4_END_GROUP;
FADD R32, R31, R32 ?WAIT4_END_GROUP;
FADD R33, R32, R33 ?WAIT4_END_GROUP;
FADD R33, R33, R10 &req={5} ?WAIT4_END_GROUP;
FADD R33, R33, R12 ?WAIT4_END_GROUP;
FADD R33, R33, R14 ?WAIT4_END_GROUP;
FADD R33, R33, R16 ?WAIT4_END_GROUP;
FADD R33, R33, R8 ?WAIT4_END_GROUP;
FADD R23, R33, R18 ?trans1;
@P0 BRA 0xbe0 ?trans6;
IADD3 R9, PT, PT, R20, -0x7, RZ ?WAIT7_END_GROUP;
ISETP.NE.AND P0, PT, R3, RZ, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x14a0 ?trans5;
ISETP.GE.U32.AND P0, PT, R3, 0x8, PT ?trans1;
LOP3.LUT R22, R0, 0x7, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R22, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x12a0 ?trans6;
IADD3 R3, PT, PT, R2, R9, RZ ?WAIT4_END_GROUP;
IADD3 R13, PT, PT, R3.reuse, 0x1, RZ ?trans1;
IMAD.WIDE.U32 R10, R3.reuse, 0x4, R6.reuse &req={0} ?trans1;
IADD3 R15, PT, PT, R3.reuse, 0x2, RZ ?trans2;
IADD3 R17, PT, PT, R3, 0x3, RZ ?trans1;
IMAD.WIDE.U32 R12, R13, 0x4, R6.reuse ?trans1;
LDG.E R8, desc[UR4][R10.64] &rd=0x0 &wr=0x2 ?trans3;
IMAD.WIDE.U32 R14, R15, 0x4, R6 ?trans1;
LDG.E R25, desc[UR4][R12.64] &rd=0x1 &wr=0x3 ?trans1;
IADD3 R19, PT, PT, R3, 0x4, RZ ?WAIT2_END_GROUP;
IMAD.WIDE.U32 R16, R17, 0x4, R6.reuse ?trans1;
IADD3 R21, PT, PT, R3, 0x5, RZ ?trans1;
LDG.E R15, desc[UR4][R14.64] &wr=0x4 ?trans2;
IMAD.WIDE.U32 R18, R19, 0x4, R6.reuse ?trans1;
IADD3 R27, PT, PT, R3, 0x6, RZ ?trans1;
LDG.E R17, desc[UR4][R16.64] &wr=0x5 ?trans2;
IMAD.WIDE.U32 R10, R21, 0x4, R6.reuse &req={0} ?trans1;
IADD3 R21, PT, PT, R3, 0x7, RZ ?trans1;
LDG.E R19, desc[UR4][R18.64] &wr=0x5 ?trans2;
IMAD.WIDE.U32 R12, R27, 0x4, R6 &req={1} ?WAIT2_END_GROUP;
LDG.E R11, desc[UR4][R10.64] &wr=0x5 ?trans2;
IMAD.WIDE.U32 R20, R21, 0x4, R6 ?trans2;
LDG.E R13, desc[UR4][R12.64] &wr=0x5 ?trans4;
LDG.E R21, desc[UR4][R20.64] &wr=0x5 ?trans1;
IADD3 R9, PT, PT, R9, 0x8, RZ ?trans1;
FADD R8, R23, R8 &req={2} ?WAIT4_END_GROUP;
FADD R8, R8, R25 &req={3} ?WAIT4_END_GROUP;
FADD R8, R8, R15 &req={4} ?WAIT4_END_GROUP;
FADD R8, R8, R17 &req={5} ?WAIT4_END_GROUP;
FADD R8, R8, R19 ?WAIT4_END_GROUP;
FADD R8, R8, R11 ?WAIT4_END_GROUP;
FADD R8, R8, R13 ?WAIT4_END_GROUP;
FADD R23, R8, R21 ?WAIT7_END_GROUP;
@!P1 BRA 0x14a0 ?trans5;
ISETP.GE.U32.AND P0, PT, R22, 0x4, PT ?trans1;
LOP3.LUT R0, R0, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R0, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x1400 ?trans6;
IADD3 R3, PT, PT, R2, R9, RZ ?WAIT4_END_GROUP;
IADD3 R13, PT, PT, R3.reuse, 0x1, RZ ?trans1;
IMAD.WIDE.U32 R10, R3.reuse, 0x4, R6 &req={0} ?trans1;
IADD3 R15, PT, PT, R3, 0x2, RZ ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R12, R13, 0x4, R6.reuse ?trans1;
IADD3 R17, PT, PT, R3, 0x3, RZ ?trans1;
LDG.E R10, desc[UR4][R10.64] &wr=0x2 ?trans2;
IMAD.WIDE.U32 R14, R15, 0x4, R6.reuse ?trans2;
LDG.E R12, desc[UR4][R12.64] &wr=0x3 ?trans2;
IMAD.WIDE.U32 R16, R17, 0x4, R6 ?trans2;
LDG.E R14, desc[UR4][R14.64] &wr=0x4 ?trans4;
LDG.E R16, desc[UR4][R16.64] &wr=0x5 ?trans1;
IADD3 R9, PT, PT, R9, 0x4, RZ ?trans1;
FADD R23, R23, R10 &req={2} ?WAIT4_END_GROUP;
FADD R23, R23, R12 &req={3} ?WAIT4_END_GROUP;
FADD R23, R23, R14 &req={4} ?WAIT4_END_GROUP;
FADD R23, R23, R16 &req={5} ?WAIT7_END_GROUP;
@!P1 BRA 0x14a0 ?trans5;
IADD3 R9, PT, PT, R2, R9, RZ ?trans2;
IADD3 R0, PT, PT, -R0, RZ, RZ ?WAIT7_END_GROUP;
IMAD.WIDE.U32 R2, R9, 0x4, R6 ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &wr=0x2 ?trans1;
IADD3 R0, PT, PT, R0, 0x1, RZ ?trans2;
IADD3 R9, PT, PT, R9, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R0, RZ, PT ?trans1;
FADD R23, R2, R23 &req={2} ?WAIT12_END_GROUP;
@P0 BRA 0x1430 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDG.E R0, desc[UR4][R4.64] &wr=0x2 ?trans1;
MUFU.RCP R2, R23 &wr=0x1 ?trans1;
BSSY.RECONVERGENT B0, 0x15a0 ?trans1;
FFMA R3, R2, -R23, 1 &req={1} ?WAIT4_END_GROUP;
FFMA R3, R2, R3, R2 ?trans1;
FCHK P0, R0, R23 &req={2} &wr=0x1 ?trans3;
FFMA R2, R0, R3, RZ ?WAIT4_END_GROUP;
FFMA R6, R2, -R23, R0 ?WAIT4_END_GROUP;
FFMA R3, R3, R6, R2 ?trans1;
@!P0 BRA 0x1590 &req={1} ?trans6;
MOV R3, R23 ?trans1;
MOV R2, 0x1580 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x15c0 &req={0} ?trans5;
MOV R3, R7 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
STG.E desc[UR4][R4.64], R3 ?trans1;
EXIT ?trans5;
SHF.R.U32.HI R7, RZ, 0x17, R3 ?trans1;
BSSY.RECONVERGENT B1, 0x1c10 ?trans1;
SHF.R.U32.HI R6, RZ, 0x17, R0 ?trans2;
LOP3.LUT R13, R7, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R6, R6, 0xff, RZ, 0xc0, !PT ?trans1;
MOV R7, R0 ?trans1;
IADD3 R10, PT, PT, R13, -0x1, RZ ?trans2;
IADD3 R9, PT, PT, R6, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R10, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R9, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R8, RZ ?trans1;
@!P0 BRA 0x17f0 ?trans6;
FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0x1bf0 ?trans5;
LOP3.LUT P0, RZ, R3, 0x7fffffff, R7, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1bd0 ?trans5;
FSETP.NEU.FTZ.AND P2, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P1 BRA !P2, 0x1bd0 ?trans5;
LOP3.LUT P2, RZ, R7, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P1, P2, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0x1bb0 ?trans5;
LOP3.LUT P1, RZ, R3, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x1b80 ?trans5;
ISETP.GE.AND P0, PT, R9, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R10, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R8, RZ ?trans1;
@!P0 MOV R8, 0xffffffc0 ?trans1;
@!P0 FFMA R7, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R3, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R8, PT, PT, R8, 0x40, RZ ?WAIT7_END_GROUP;
LEA R0, R13, 0xc0800000, 0x17 ?trans1;
BSSY.RECONVERGENT B2, 0x1b70 ?trans1;
IADD3 R6, PT, PT, R6, -0x7f, RZ ?trans2;
IADD3 R3, PT, PT, -R0, R3, RZ ?WAIT3_END_GROUP;
IMAD R0, R6.reuse, -0x800000, R7 ?trans1;
MUFU.RCP R9, R3 &rd=0x0 &wr=0x1 ?trans1;
FADD.FTZ R11, -R3, -RZ ?trans1;
IADD3 R3, PT, PT, R6, 0x7f, -R13 &req={0} ?WAIT4_END_GROUP;
IADD3 R3, PT, PT, R3, R8, RZ ?trans1;
FFMA R10, R9, R11, 1 &req={1} ?WAIT4_END_GROUP;
FFMA R12, R9, R10, R9 ?WAIT4_END_GROUP;
FFMA R7, R0, R12, RZ ?WAIT4_END_GROUP;
FFMA R10, R11, R7, R0 ?WAIT4_END_GROUP;
FFMA R15, R12, R10, R7 ?WAIT4_END_GROUP;
FFMA R10, R11, R15, R0 ?WAIT4_END_GROUP;
FFMA R7, R12, R10, R15 ?WAIT5_END_GROUP;
SHF.R.U32.HI R0, RZ, 0x17, R7 ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R8, PT, PT, R0, R3, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R8, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1b50 ?trans5;
ISETP.GT.AND P0, PT, R8, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1b20 ?trans5;
ISETP.GE.AND P0, PT, R8, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1b60 ?trans5;
ISETP.GE.AND P0, PT, R8, -0x18, PT ?trans1;
LOP3.LUT R7, R7, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x1b60 ?trans5;
FFMA.RZ R0, R12, R10.reuse, R15.reuse ?trans1;
IADD3 R9, PT, PT, R8, 0x20, RZ ?trans1;
FFMA.RM R3, R12, R10.reuse, R15.reuse ?trans1;
ISETP.NE.AND P1, PT, R8.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R8, RZ, PT ?trans1;
LOP3.LUT R0, R0, 0x7fffff, RZ, 0xc0, !PT ?trans2;
IADD3 R8, PT, PT, -R8, RZ, RZ ?trans2;
LOP3.LUT R6, R0, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R0, R12, R10, R15 ?WAIT3_END_GROUP;
SHF.L.U32 R9, R6, R9, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R0, R3, PT ?trans1;
SEL R3, R8, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R9, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R3, RZ, R3, R6 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R9, RZ, 0x1, R3 ?WAIT3_END_GROUP;
SEL R0, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R0, R0, 0x1, R9, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, R3, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R9, R0, RZ ?WAIT4_END_GROUP;
LOP3.LUT R7, R0, R7, RZ, 0xfc, !PT ?trans1;
BRA 0x1b60 ?trans6;
LOP3.LUT R7, R7, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R7, R7, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x1b60 ?trans6;
IMAD R7, R3, 0x800000, R7 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
BRA 0x1c00 ?trans5;
LOP3.LUT R7, R3, 0x80000000, R7, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R7, R7, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x1c00 ?trans6;
LOP3.LUT R7, R3, 0x80000000, R7, 0x48, !PT ?trans1;
BRA 0x1c00 ?trans6;
MUFU.RSQ R7, -QNAN &wr=0x0 ?trans1;
BRA 0x1c00 ?trans5;
FADD.FTZ R7, R0, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R2 0x0 &req={0} ?trans5;
BRA 0x1c30;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: softmax_naive_kernel(float*, float*)
_Z20softmax_naive_kernelPfS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x1c
s_load_b128 s[0:3], s[0:1], 0x0
s_mov_b32 s7, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
s_mov_b32 s5, s7
s_waitcnt lgkmcnt(0)
s_and_b32 s8, s4, 0xffff
s_mul_i32 s4, s15, s8
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[10:11], s[4:5], 2
s_add_u32 s10, s0, s10
s_addc_u32 s11, s1, s11
s_cmp_lt_u32 s8, 2
s_load_b32 s5, s[10:11], 0x0
s_waitcnt lgkmcnt(0)
v_mov_b32_e32 v1, s5
s_cbranch_scc1 .LBB11_3
v_mov_b32_e32 v1, s5
s_add_i32 s5, s8, -1
s_add_i32 s6, s4, 1
.LBB11_2:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_lshl_b64 s[10:11], s[6:7], 2
v_max_f32_e32 v1, v1, v1
s_add_u32 s10, s0, s10
s_addc_u32 s11, s1, s11
s_add_i32 s5, s5, -1
s_load_b32 s9, s[10:11], 0x0
s_add_i32 s6, s6, 1
s_cmp_eq_u32 s5, 0
s_waitcnt lgkmcnt(0)
v_max_f32_e64 v2, s9, s9
s_delay_alu instid0(VALU_DEP_1)
v_max_f32_e32 v1, v1, v2
s_cbranch_scc0 .LBB11_2
.LBB11_3:
v_add_nc_u32_e32 v2, s4, v0
s_barrier
buffer_gl0_inv
s_mov_b32 s5, 0
v_ashrrev_i32_e32 v3, 31, v2
s_cmp_eq_u32 s8, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[2:3]
v_add_co_u32 v4, vcc_lo, s0, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v3, vcc_lo
global_load_b32 v0, v[4:5], off
s_waitcnt vmcnt(0)
v_sub_f32_e32 v4, v0, v1
v_mul_f32_e32 v0, 0x3fb8aa3b, v4
v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_fma_f32 v1, 0x3fb8aa3b, v4, -v0
v_rndne_f32_e32 v5, v0
v_fmamk_f32 v1, v4, 0x32a5705f, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_f32_e32 v0, v0, v5
v_add_f32_e32 v0, v0, v1
v_cvt_i32_f32_e32 v1, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_exp_f32_e32 v0, v0
s_waitcnt_depctr 0xfff
v_ldexp_f32 v0, v0, v1
v_cndmask_b32_e32 v5, 0, v0, vcc_lo
v_add_co_u32 v0, vcc_lo, s2, v2
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v3, vcc_lo
v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v4
s_delay_alu instid0(VALU_DEP_4)
v_cndmask_b32_e32 v2, 0x7f800000, v5, vcc_lo
global_store_b32 v[0:1], v2, off
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB11_6
v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v2, 0
.LBB11_5:
s_lshl_b64 s[0:1], s[4:5], 2
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s0, s2, s0
s_addc_u32 s1, s3, s1
s_add_i32 s8, s8, -1
global_load_b32 v4, v3, s[0:1]
s_add_i32 s4, s4, 1
s_cmp_eq_u32 s8, 0
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v2, v4
s_cbranch_scc0 .LBB11_5
s_branch .LBB11_7
.LBB11_6:
v_mov_b32_e32 v2, 0
.LBB11_7:
s_barrier
buffer_gl0_inv
global_load_b32 v3, v[0:1], off
s_waitcnt vmcnt(0)
v_div_scale_f32 v4, null, v2, v2, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f32_e32 v5, v4
s_waitcnt_depctr 0xfff
v_fma_f32 v6, -v4, v5, 1.0
v_fmac_f32_e32 v5, v6, v5
v_div_scale_f32 v6, vcc_lo, v3, v2, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v7, v6, v5
v_fma_f32 v8, -v4, v7, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v7, v8, v5
v_fma_f32 v4, -v4, v7, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fmas_f32 v4, v4, v5, v7
v_div_fixup_f32 v2, v4, v2, v3
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| softmax_naive_kernel | 11,593 | 2,024 | stackv2-00000-of-00015 |
// Demangled: softplus_kernel(float*, float*)
Function : _Z15softplus_kernelPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_TID.X &wr=0x1 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD R0, R0, UR6, R5 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R0, 0x4, R2 &req={3} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={2} &wr=0x2 ?trans1;
HFMA2 R5, -RZ, RZ, 0.96630859375, -0.0022525787353515625 ?trans1;
MOV R7, 0x437c0000 ?trans1;
BSSY.RECONVERGENT B0, 0xcf0 ?trans1;
MOV R9, 0xfffffc01 ?trans2;
FFMA.SAT R4, R2, R5, 0.5 &req={2} ?WAIT4_END_GROUP;
FFMA.RM R4, R4, R7, 12582913 ?WAIT4_END_GROUP;
FADD R5, R4.reuse, -12583039 ?trans1;
IMAD.SHL.U32 R4, R4, 0x800000, RZ ?WAIT3_END_GROUP;
FFMA R5, R2, 1.4426950216293334961, -R5 ?WAIT4_END_GROUP;
FFMA R6, R2, 1.925963033500011079e-08, R5 ?WAIT4_END_GROUP;
MUFU.EX2 R5, R6 &wr=0x1 ?trans2;
FMUL R7, R4, R5 &req={1} ?WAIT4_END_GROUP;
F2F.F64.F32 R2, R7 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R2, R2, 1 &req={1} &wr=0x1 ?trans2;
ISETP.GT.AND P0, PT, R3, 0xfffff, PT &req={1} ?trans1;
MOV.64 R4, R2 ?trans2;
MOV R8, R3 ?WAIT10_END_GROUP;
@!P0 MOV R9, 0xfffffbcb ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P0 DMUL R4, R4, 1.80143985094819840000e+16 &wr=0x1 ?trans2;
@!P0 MOV R8, R5 &req={1} ?trans1;
@!P0 MOV R2, R4 ?WAIT4_END_GROUP;
IADD3 R3, PT, PT, R8, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R3, 0x7feffffe, PT ?trans1;
SHF.R.S32.HI R3, RZ, 0x1f, R0 ?WAIT12_END_GROUP;
@P1 BRA 0xc90 &req={0} ?trans5;
LOP3.LUT R4, R8, 0xfffff, RZ, 0xc0, !PT ?trans1;
UMOV.64 UR6, 0x4330000080000000 ?trans1;
MOV R6, RZ ?trans2;
LOP3.LUT R5, R4, 0x3ff00000, RZ, 0xfc, !PT ?trans1;
MOV R4, R2 ?WAIT4_END_GROUP;
ISETP.GE.U32.AND P0, PT, R5, 0x3ff6a09f, PT ?WAIT13_END_GROUP;
@P0 IADD3 R7, PT, PT, R5, -0x100000, RZ ?WAIT5_END_GROUP;
@P0 MOV R5, R7 ?WAIT6_END_GROUP;
DADD R14, R4, 1 &wr=0x0 ?trans2;
MUFU.RCP64H R7, R15 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, R4, -1 &rd=0x1 ?trans2;
LEA.HI R4, R8, R9, RZ, 0xc &req={1} ?trans1;
MOV R5, 0x43300000 ?WAIT3_END_GROUP;
@P0 IADD3 R4, PT, PT, R4, 0x1, RZ ?WAIT4_END_GROUP;
LOP3.LUT R4, R4, 0x80000000, RZ, 0x3c, !PT ?WAIT15_END_GROUP;
NOP ?WAIT9_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, -R14, R6, 1 &req={0} &rd=0x0 &wr=0x1 ?trans2;
MOV.64 R14, 0x3ed0ee258b7a8b04 &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R8, R8 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R4, R4, -UR6 ?trans1;
UMOV.64 UR6, 0x3fe62e42fefa39ef ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R6, R8, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R12, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R12, R16, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R4, UR6, R8 &req={0} ?trans1;
UMOV.64 UR6, 0x3eb1380b3ae80f1e ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R8, R8 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R10, UR6, R14 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3fe62e42fefa39ef ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R4, -UR6, R6 ?trans1;
UMOV.64 UR6, 0x3ef3b2669f02676f ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R10, R14, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3f1745cba9ab0956 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R10, R14, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3f3c71c72d1b5154 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R10, R14, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3f624924923be72d ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R10, R14, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3f8999999999a3c4 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R10, R14, UR6 &req={0} ?trans1;
UMOV.64 UR6, 0x3fb5555555555554 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R12, -R8 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R12, -R8, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R10, R14, UR6 &wr=0x1 ?trans1;
UMOV.64 UR6, 0x3c7abc9e3b39803f ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R18, R16, R18 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R10, R14 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, -R8, R20 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R8, R14, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R14, R14, -R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R4, UR6, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R6, R6, R14 &req={0} &rd=0x0 &wr=0x1 ?trans2;
BRA 0xce0 &req={1,0} ?trans5;
MOV.64 R6, 0x7ff0000000000000 ?WAIT3_END_GROUP;
LOP3.LUT P0, RZ, R5, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
DFMA R4, R4, R6, +INF &wr=0x0 ?trans2;
FSEL R6, R4, RZ, P0 &req={0} ?trans1;
FSEL R7, R5, -QNAN , P0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU.64 UR6, c[0x0][0x388] &wr=0x0 ?trans1;
F2F.F32.F64 R7, R6 &wr=0x1 ?trans1;
LEA R2, P0, R0, UR6, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R3, R0, UR7, R3, 0x2, P0 ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R7 &req={1} ?trans1;
EXIT ?trans5;
BRA 0xd50;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: softplus_kernel(float*, float*)
_Z15softplus_kernelPfS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x1c
s_load_b128 s[0:3], s[0:1], 0x0
s_mov_b32 s6, 0xbf559e2b
s_mov_b32 s7, 0x3fc3ab76
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
s_mov_b32 s4, 0x6b47b09a
s_mov_b32 s5, 0x3fc38538
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v2, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
s_mov_b32 s1, 0x3fe55555
s_mov_b32 s0, 0x55555555
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_mul_f32_e32 v3, 0x3fb8aa3b, v2
v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fma_f32 v4, 0x3fb8aa3b, v2, -v3
v_rndne_f32_e32 v5, v3
v_dual_fmamk_f32 v4, v2, 0x32a5705f, v4 :: v_dual_sub_f32 v3, v3, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_f32_e32 v3, v3, v4
v_cvt_i32_f32_e32 v4, v5
v_exp_f32_e32 v3, v3
s_waitcnt_depctr 0xfff
v_ldexp_f32 v3, v3, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v3, 0, v3, vcc_lo
v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v2
v_cndmask_b32_e32 v2, 0x7f800000, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f64_f32_e32 v[2:3], v2
v_add_f64 v[2:3], v[2:3], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_frexp_mant_f64_e32 v[4:5], v[2:3]
v_cmp_gt_f64_e32 vcc_lo, s[0:1], v[4:5]
s_mov_b32 s0, 0x55555780
v_cndmask_b32_e64 v6, 0, 1, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ldexp_f64 v[4:5], v[4:5], v6
v_add_f64 v[6:7], v[4:5], 1.0
v_add_f64 v[12:13], v[4:5], -1.0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_rcp_f64_e32 v[8:9], v[6:7]
v_add_f64 v[14:15], v[6:7], -1.0
v_add_f64 v[4:5], v[4:5], -v[14:15]
s_waitcnt_depctr 0xfff
v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[8:9], v[10:11], v[8:9], v[8:9]
v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[8:9], v[10:11], v[8:9], v[8:9]
v_mul_f64 v[10:11], v[12:13], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[16:17], v[6:7], v[10:11]
v_fma_f64 v[6:7], v[10:11], v[6:7], -v[16:17]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[4:5], v[10:11], v[4:5], v[6:7]
v_add_f64 v[6:7], v[16:17], v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_f64 v[14:15], v[12:13], -v[6:7]
v_add_f64 v[16:17], v[6:7], -v[16:17]
v_add_f64 v[12:13], v[12:13], -v[14:15]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_f64 v[4:5], v[16:17], -v[4:5]
v_frexp_exp_i32_f64_e32 v16, v[2:3]
v_add_f64 v[6:7], v[12:13], -v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[4:5], v[4:5], v[6:7]
v_add_f64 v[4:5], v[14:15], v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[4:5], v[8:9], v[4:5]
v_add_f64 v[6:7], v[10:11], v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[8:9], v[6:7], v[6:7]
v_fma_f64 v[12:13], v[8:9], s[6:7], s[4:5]
s_mov_b32 s4, 0xd7f4df2e
s_mov_b32 s5, 0x3fc7474d
v_mul_f64 v[14:15], v[6:7], v[8:9]
s_delay_alu instid0(VALU_DEP_2)
v_fma_f64 v[12:13], v[8:9], v[12:13], s[4:5]
s_mov_b32 s4, 0x16291751
s_mov_b32 s5, 0x3fcc71c0
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_fma_f64 v[12:13], v[8:9], v[12:13], s[4:5]
s_mov_b32 s4, 0x9b27acf1
s_mov_b32 s5, 0x3fd24924
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_fma_f64 v[12:13], v[8:9], v[12:13], s[4:5]
s_mov_b32 s4, 0x998ef7b6
s_mov_b32 s5, 0x3fd99999
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_fma_f64 v[12:13], v[8:9], v[12:13], s[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
v_fma_f64 v[8:9], v[8:9], v[12:13], s[0:1]
v_ldexp_f64 v[12:13], v[6:7], 1
v_add_f64 v[6:7], v[6:7], -v[10:11]
s_mov_b32 s0, 0xfefa39ef
s_mov_b32 s1, 0x3fe62e42
v_mul_f64 v[8:9], v[14:15], v[8:9]
v_subrev_co_ci_u32_e32 v14, vcc_lo, 0, v16, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_f64 v[4:5], v[4:5], -v[6:7]
v_cmp_eq_f64_e32 vcc_lo, 0x7ff00000, v[2:3]
v_cvt_f64_i32_e32 v[14:15], v14
v_add_f64 v[10:11], v[12:13], v[8:9]
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_ldexp_f64 v[4:5], v[4:5], 1
v_mul_f64 v[16:17], v[14:15], s[0:1]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[6:7], v[10:11], -v[12:13]
v_fma_f64 v[12:13], v[14:15], s[0:1], -v[16:17]
s_mov_b32 s0, 0x3b39803f
s_mov_b32 s1, 0x3c7abc9e
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[6:7], v[8:9], -v[6:7]
v_fma_f64 v[8:9], v[14:15], s[0:1], v[12:13]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[4:5], v[4:5], v[6:7]
v_add_f64 v[6:7], v[16:17], v[8:9]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[12:13], v[10:11], v[4:5]
v_add_f64 v[16:17], v[6:7], -v[16:17]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_f64 v[14:15], v[6:7], v[12:13]
v_add_f64 v[10:11], v[12:13], -v[10:11]
v_add_f64 v[8:9], v[8:9], -v[16:17]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[18:19], v[14:15], -v[6:7]
v_add_f64 v[4:5], v[4:5], -v[10:11]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_f64 v[20:21], v[14:15], -v[18:19]
v_add_f64 v[10:11], v[12:13], -v[18:19]
v_add_f64 v[12:13], v[8:9], v[4:5]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[6:7], v[6:7], -v[20:21]
v_add_f64 v[6:7], v[10:11], v[6:7]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[10:11], v[12:13], -v[8:9]
v_add_f64 v[6:7], v[12:13], v[6:7]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_f64 v[12:13], v[12:13], -v[10:11]
v_add_f64 v[4:5], v[4:5], -v[10:11]
v_add_f64 v[16:17], v[14:15], v[6:7]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[8:9], v[8:9], -v[12:13]
v_add_f64 v[10:11], v[16:17], -v[14:15]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[4:5], v[4:5], v[8:9]
v_add_f64 v[6:7], v[6:7], -v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[4:5], v[4:5], v[6:7]
v_add_f64 v[4:5], v[16:17], v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_dual_cndmask_b32 v4, v4, v2 :: v_dual_cndmask_b32 v5, v5, v3
v_cmp_neq_f64_e32 vcc_lo, 0, v[2:3]
v_cndmask_b32_e32 v3, 0xfff00000, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_cndmask_b32_e32 v2, 0, v4, vcc_lo
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
v_cvt_f32_f64_e32 v2, v[2:3]
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| softplus_kernel | 3,644 | 4,503 | stackv2-00000-of-00015 |
// Demangled: sqrt_kernel(float*, float*, int)
Function : _Z11sqrt_kernelPfS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x2 ?trans7;
LDC R5, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R5, R5, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x190 ?trans1;
IADD3 R4, PT, PT, R0, -0xd000000, RZ &req={2} ?trans1;
MUFU.RSQ R7, R0 &rd=0x0 &wr=0x1 ?trans4;
ISETP.GT.U32.AND P0, PT, R4, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x140 &req={0} ?trans5;
MOV R9, 0x130 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1d0 &req={1} ?trans5;
BRA 0x180 ?trans5;
FMUL.FTZ R3, R0, R7 &req={1} ?trans1;
FMUL.FTZ R7, R7, 0.5 ?WAIT3_END_GROUP;
FFMA R0, -R3, R3, R0 ?WAIT4_END_GROUP;
FFMA R7, R0, R7, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans2;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R7 ?trans1;
EXIT ?trans5;
LOP3.LUT P0, RZ, R0, 0x7fffffff, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 MOV R2, R0 ?trans1;
@!P0 BRA 0x300 ?trans6;
FSETP.GEU.FTZ.AND P0, PT, R0, RZ, PT ?WAIT13_END_GROUP;
@!P0 MOV R2, 0x7fffffff ?trans1;
@!P0 BRA 0x300 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P0 FADD.FTZ R2, R0, 1 ?trans1;
@P0 BRA 0x300 ?trans6;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P0 FFMA R3, R0, 1.84467440737095516160e+19, RZ ?WAIT4_END_GROUP;
@P0 MUFU.RSQ R2, R3 &wr=0x0 ?trans2;
@P0 FMUL.FTZ R4, R3, R2 &req={0} ?trans1;
@P0 FMUL.FTZ R8, R2, 0.5 ?trans1;
@!P0 MOV R2, R0 ?trans2;
@P0 FADD.FTZ R6, -R4, -RZ ?WAIT4_END_GROUP;
@P0 FFMA R7, R4, R6, R3 ?WAIT4_END_GROUP;
@P0 FFMA R7, R7, R8, R4 ?WAIT4_END_GROUP;
@P0 FMUL.FTZ R2, R7, 2.3283064365386962891e-10 ?WAIT7_END_GROUP;
MOV R7, R2 ?trans1;
MOV R2, R9 ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R2 0x0 ?trans5;
BRA 0x340;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: sqrt_kernel(float*, float*, int)
_Z11sqrt_kernelPfS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB4_2
s_load_b128 s[0:3], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_mul_f32_e32 v3, 0x4f800000, v2
v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v2
v_cndmask_b32_e32 v2, v2, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_sqrt_f32_e32 v3, v2
s_waitcnt_depctr 0xfff
v_add_nc_u32_e32 v4, -1, v3
v_add_nc_u32_e32 v5, 1, v3
v_fma_f32 v6, -v4, v3, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v7, -v5, v3, v2
v_cmp_ge_f32_e64 s0, 0, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cndmask_b32_e64 v3, v3, v4, s0
v_cmp_lt_f32_e64 s0, 0, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v3, v3, v5, s0
v_mul_f32_e32 v4, 0x37800000, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
v_cndmask_b32_e32 v3, v3, v4, vcc_lo
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
v_cmp_class_f32_e64 vcc_lo, v2, 0x260
v_cndmask_b32_e32 v2, v3, v2, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB4_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| sqrt_kernel | 1,256 | 1,010 | stackv2-00000-of-00015 |
// Demangled: tanh_kernel(float*, float*)
Function : _Z11tanh_kernelPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R0, SR_TID.X &wr=0x0 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC R7, c[0x0][0x360] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans8;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD R7, R7, UR6, R0 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R7, 0x4, R2 &req={2} ?WAIT5_END_GROUP;
LDG.E R6, desc[UR4][R2.64] &req={1} &rd=0x3 &wr=0x2 ?trans1;
MOV R10, 0x3c80f082 ?trans1;
HFMA2 R9, -RZ, RZ, 1.875, 0 ?trans2;
IMAD.WIDE R2, R7, 0x4, R4 &req={3} ?WAIT4_END_GROUP;
FMUL R0, |R6|.reuse, 2.8853900432586669922 &req={2} ?trans1;
FMUL R11, R6.reuse, R6 ?trans1;
FSETP.GE.AND P1, PT, |R6|.reuse, 0.60000002384185791016, PT ?trans1;
FSETP.GE.AND P0, PT, |R6|, 9.010913848876953125, PT ?trans2;
FFMA R10, R11.reuse, R10, -0.052303962409496307373 ?trans1;
MUFU.EX2 R0, R0 &wr=0x0 ?trans2;
FADD R8, R0, 1 &req={0} ?trans1;
FFMA R0, R11, R10, 0.1331529766321182251 ?WAIT4_END_GROUP;
FFMA R0, R11.reuse, R0, -0.33332768082618713379 ?trans1;
MUFU.RCP R8, R8 &wr=0x0 ?trans3;
FFMA R11, R11, R0, RZ ?trans1;
FFMA R9, R8, -2, R9 &req={0} ?WAIT5_END_GROUP;
FSEL R9, R9, 1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R9, R9, 0x80000000, R6.reuse, 0xf8, !PT ?trans1;
@!P1 FFMA R9, R6, R11, R6 ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x1e0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: tanh_kernel(float*, float*)
_Z11tanh_kernelPfS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x1c
s_load_b128 s[0:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v2, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_cmp_ngt_f32_e64 s0, 0x3f200000, |v2|
s_and_saveexec_b32 s1, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_xor_b32 s0, exec_lo, s1
s_cbranch_execz .LBB13_2
v_add_f32_e64 v3, |v2|, |v2|
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_f32_e32 v4, 0x3fb8aa3b, v3
v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v3
v_rndne_f32_e32 v5, v4
v_fma_f32 v6, 0x3fb8aa3b, v3, -v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_f32_e32 v4, v4, v5
v_fmamk_f32 v6, v3, 0x32a5705f, v6
v_cvt_i32_f32_e32 v5, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v4, v4, v6
v_exp_f32_e32 v4, v4
s_waitcnt_depctr 0xfff
v_ldexp_f32 v4, v4, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v4, 0, v4, vcc_lo
v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v3
v_cndmask_b32_e32 v3, 0x7f800000, v4, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v3, 1.0, v3
v_rcp_f32_e32 v3, v3
s_waitcnt_depctr 0xfff
v_fma_f32 v3, v3, -2.0, 1.0
.LBB13_2:
s_and_not1_saveexec_b32 s0, s0
v_mul_f32_e32 v3, v2, v2
s_mov_b32 s1, 0xbbbac73d
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_fmaak_f32 v4, s1, v3, 0x3ca908c9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmaak_f32 v4, v3, v4, 0xbd5c1c4e
v_fmaak_f32 v4, v3, v4, 0x3e088382
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmaak_f32 v4, v3, v4, 0xbeaaaa99
v_mul_f32_e64 v4, |v2|, v4
s_delay_alu instid0(VALU_DEP_1)
v_fma_f32 v3, v3, v4, |v2|
s_or_b32 exec_lo, exec_lo, s0
v_add_co_u32 v0, vcc_lo, s2, v0
s_delay_alu instid0(VALU_DEP_2)
v_bfi_b32 v2, 0x7fffffff, v3, v2
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| tanh_kernel | 893 | 1,401 | stackv2-00000-of-00015 |
// Demangled: pub_topic(float*, float)
Function : _Z9pub_topicPff
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R5, SR_TID.X &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x388] &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x3 ?trans1;
I2FP.F32.U32 R0, R5 &req={0} ?trans1;
IMAD.WIDE.U32 R2, R5, 0x4, R2 &req={1} ?WAIT4_END_GROUP;
FADD R5, R0, UR6 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R5 &req={3} ?trans1;
EXIT ?trans5;
BRA 0xa0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: pub_topic(float*, float)
_Z9pub_topicPff:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x8
s_load_b64 s[0:1], s[0:1], 0x0
v_cvt_f32_i32_e32 v1, v0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_dual_add_f32 v1, s2, v1 :: v_dual_lshlrev_b32 v0, 2, v0
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| pub_topic | 301 | 172 | stackv2-00000-of-00015 |
// Demangled: VecAdd(double*, double*, double*)
Function : _Z6VecAddPdS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R7, SR_TID.X &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans8;
LDC.64 R8, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R2, R7, 0x8, R2 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R7.reuse, 0x8, R4 &req={2} ?trans2;
LDG.E.64 R2, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans4;
LDG.E.64 R4, desc[UR4][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R8, R7, 0x8, R8 &req={3} ?trans1;
DADD R6, R2, R4 &req={2} &wr=0x0 ?trans4;
STG.E.64 desc[UR4][R8.64], R6 &req={0} ?trans1;
EXIT ?trans5;
BRA 0xe0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: VecAdd(double*, double*, double*)
_Z6VecAddPdS_S_:
s_load_b128 s[4:7], s[0:1], 0x0
v_lshlrev_b32_e32 v4, 3, v0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_clause 0x1
global_load_b64 v[0:1], v4, s[4:5]
global_load_b64 v[2:3], v4, s[6:7]
s_waitcnt vmcnt(0)
v_add_f64 v[0:1], v[0:1], v[2:3]
global_store_b64 v4, v[0:1], s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| VecAdd | 436 | 207 | stackv2-00000-of-00015 |
// Demangled: gpu_Heat(float*, float*, float*, int)
Function : _Z8gpu_HeatPfS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x398] &wr=0x2 ?trans1;
S2R R5, SR_TID.Y &wr=0x3 ?trans6;
S2UR UR5, SR_CTAID.X &wr=0x1 ?trans8;
S2UR UR6, SR_CTAID.Y &wr=0x3 ?trans8;
LDC R4, c[0x0][0x364] &wr=0x3 ?trans1;
IMAD R0, R0, UR5, R3 &req={1} ?trans1;
UIADD3 UR5, UPT, UPT, UR4, -0x1, URZ &req={2} ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R0, 0x1, RZ ?trans1;
IMAD R4, R4, UR6, R5 &req={3} ?WAIT5_END_GROUP;
IADD3 R3, PT, PT, R4, 0x1, RZ ?WAIT5_END_GROUP;
VIMNMX.S32 R3, R0, R3, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R3, UR5, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R12, c[0x0][0x380] &wr=0x0 ?trans1;
IMAD R2, R0, UR4, RZ ?trans1;
LDCU.64 UR8, c[0x0][0x380] &wr=0x1 ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?WAIT3_END_GROUP;
SHF.R.S32.HI R3, RZ, 0x1f, R2 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
USHF.R.S32.HI UR5, URZ, 0x1f, UR4 ?WAIT3_END_GROUP;
IADD.64 R6, R2, R4 ?WAIT3_END_GROUP;
IADD3 R5, PT, PT, R4, R2, RZ ?trans2;
SHF.L.U64.HI R3, R6.reuse, 0x2, R7 ?trans1;
IMAD.SHL.U32 R2, R6.reuse, 0x4, RZ ?trans1;
IADD.64 R14, R6.reuse, UR4 ?trans2;
IADD.64 R8, R6, -UR4 ?trans2;
IMAD.WIDE R4, R5, 0x4, R12 &req={0} ?trans1;
LEA R10, P0, R14, UR8, 0x2 &req={1} ?trans1;
IADD.64 R6, R2, R12 ?WAIT3_END_GROUP;
LEA.HI.X R11, R14, UR9, R15, 0x2, P0 ?trans1;
LDG.E R4, desc[UR6][R4.64] &req={2} &wr=0x2 ?trans1;
LEA R12, P0, R8, UR8, 0x2 ?WAIT3_END_GROUP;
LDG.E R15, desc[UR6][R6.64+0x8] &wr=0x2 ?trans1;
LEA.HI.X R13, R8, UR9, R9, 0x2, P0 ?trans1;
LDCU.64 UR8, c[0x0][0x390] &wr=0x0 ?trans1;
LDC.64 R8, c[0x0][0x388] &wr=0x1 ?trans1;
LDG.E R10, desc[UR6][R10.64+0x4] &wr=0x3 ?trans4;
LDG.E R12, desc[UR6][R12.64+0x4] &wr=0x4 ?trans1;
IADD.64 R8, R2, R8 &req={1} ?trans2;
FADD R15, R4, R15 &req={2} ?WAIT4_END_GROUP;
FADD R15, R15, R10 &req={3} ?WAIT4_END_GROUP;
FADD R15, R15, R12 &req={4} ?WAIT4_END_GROUP;
FMUL R15, R15, 0.25 ?WAIT5_END_GROUP;
STG.E desc[UR6][R8.64+0x4], R15 ?trans4;
LDG.E R6, desc[UR6][R6.64+0x4] &wr=0x2 ?trans1;
IADD.64 R2, R2, UR8 &req={0} ?trans2;
FADD R0, R15, -R6 &req={2} ?WAIT4_END_GROUP;
FMUL R5, R0, R0 ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64+0x4], R5 ?trans1;
EXIT ?trans5;
BRA 0x350;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: gpu_Heat(float*, float*, float*, int)
_Z8gpu_HeatPfS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
v_bfe_u32 v3, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s4, s3, 16
s_and_b32 s3, s3, 0xffff
v_mad_u64_u32 v[1:2], null, s15, s4, v[3:4]
s_mul_i32 s14, s14, s3
s_add_i32 s3, s2, -1
v_add3_u32 v2, v0, s14, 1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v0, 1, v1
v_max_i32_e32 v3, v2, v0
s_delay_alu instid0(VALU_DEP_1)
v_cmp_gt_i32_e32 vcc_lo, s3, v3
s_and_saveexec_b32 s3, vcc_lo
s_cbranch_execz .LBB0_2
v_mul_lo_u32 v2, v2, s2
s_load_b128 s[4:7], s[0:1], 0x0
s_ashr_i32 s3, s2, 31
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v1, v2, v1
v_add_nc_u32_e32 v3, v0, v2
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v4, 31, v3
v_subrev_nc_u32_e32 v0, s2, v3
s_lshl_b64 s[2:3], s[2:3], 2
v_lshlrev_b64 v[5:6], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[2:3], 2, v[3:4]
v_ashrrev_i32_e32 v1, 31, v0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v4, vcc_lo, s4, v5
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v6, vcc_lo
s_delay_alu instid0(VALU_DEP_4)
v_add_co_u32 v6, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v3, vcc_lo
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_clause 0x1
global_load_b32 v8, v[4:5], off
global_load_b32 v9, v[6:7], off offset:4
v_add_co_u32 v4, vcc_lo, v6, s2
v_add_co_ci_u32_e32 v5, vcc_lo, s3, v7, vcc_lo
v_add_co_u32 v0, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
s_clause 0x1
global_load_b32 v4, v[4:5], off
global_load_b32 v0, v[0:1], off
s_waitcnt vmcnt(2)
v_add_f32_e32 v1, v8, v9
s_waitcnt vmcnt(1)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_f32_e32 v1, v1, v4
s_waitcnt vmcnt(0)
v_add_f32_e32 v4, v1, v0
v_add_co_u32 v0, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_mul_f32_e32 v5, 0x3e800000, v4
global_store_b32 v[0:1], v5, off
global_load_b32 v0, v[6:7], off
s_waitcnt vmcnt(0)
v_fma_f32 v4, 0x3e800000, v4, -v0
v_add_co_u32 v0, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_mul_f32_e32 v2, v4, v4
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| gpu_Heat | 1,380 | 1,448 | stackv2-00000-of-00015 |
// Demangled: gpu_reduction(float*, float*)
Function : _Z13gpu_reductionPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R7, SR_TID.X &wr=0x1 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
S2R R8, SR_CTAID.X &wr=0x1 ?trans6;
LDC.64 R2, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD R5, R8, R0, R7 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R5, 0x4, R2 &req={3} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
ISETP.GE.U32.AND P1, PT, R0, 0x42, PT ?trans1;
ISETP.GT.U32.AND P0, PT, R7, 0x1f, PT ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?WAIT6_END_GROUP;
LEA R5, R7, UR4, 0x2 ?WAIT5_END_GROUP;
STS [R5], R2 &req={2} &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P1 BRA 0x1d0 &req={0} ?trans5;
SHF.R.U32.HI R6, RZ, 0x1, R0 ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P1, PT, R7, R6, PT ?WAIT13_END_GROUP;
@!P1 LEA R2, R6, R5, 0x2 &req={1} ?trans1;
@!P1 LDS R3, [R5] ?trans5;
@!P1 LDS R2, [R2] &wr=0x0 ?trans2;
@!P1 FADD R4, R2, R3 &req={0} ?WAIT5_END_GROUP;
@!P1 STS [R5], R4 &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P1, PT, R0, 0x83, PT ?trans1;
MOV R0, R6 ?WAIT12_END_GROUP;
@P1 BRA 0x120 &req={0} ?trans5;
@P0 EXIT ?trans5;
LDS R0, [R5+0x80] ?trans1;
ISETP.NE.AND P0, PT, R7, RZ, PT ?WAIT3_END_GROUP;
LDS R3, [R5] &wr=0x0 ?trans2;
FADD R0, R0, R3 &req={0} ?WAIT5_END_GROUP;
STS [R5], R0 ?trans4;
LDS R2, [R5+0x40] &req={1} ?trans4;
LDS R3, [R5] &wr=0x0 ?trans2;
FADD R2, R2, R3 &req={0} ?WAIT5_END_GROUP;
STS [R5], R2 ?trans4;
LDS R3, [R5+0x20] ?trans4;
LDS R4, [R5] &wr=0x0 ?trans2;
FADD R4, R3, R4 &req={0} ?WAIT5_END_GROUP;
STS [R5], R4 ?trans4;
LDS R3, [R5+0x10] ?trans4;
LDS R6, [R5] &wr=0x0 ?trans2;
FADD R6, R3, R6 &req={0} ?WAIT5_END_GROUP;
STS [R5], R6 ?trans4;
LDS R0, [R5+0x8] ?trans4;
LDS R3, [R5] &wr=0x0 ?trans2;
FADD R0, R0, R3 &req={0} ?WAIT5_END_GROUP;
STS [R5], R0 ?trans4;
LDS R2, [R5+0x4] ?trans4;
LDS R3, [R5] &wr=0x0 ?trans2;
FADD R2, R2, R3 &req={0} ?WAIT5_END_GROUP;
STS [R5], R2 &rd=0x0 ?trans1;
@P0 EXIT ?trans5;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x388] &req={0} &wr=0x0 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?trans1;
IMAD.WIDE.U32 R2, R8, 0x4, R2 &req={0} ?WAIT8_END_GROUP;
LDS R5, [UR4] &wr=0x0 ?trans4;
STG.E desc[UR6][R2.64], R5 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x400;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: gpu_reduction(float*, float*)
_Z13gpu_reductionPfS_:
s_clause 0x1
s_load_b32 s5, s[0:1], 0x1c
s_load_b128 s[0:3], s[0:1], 0x0
s_mov_b32 s4, s15
s_waitcnt lgkmcnt(0)
s_and_b32 s5, s5, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s4, s5, v[0:1]
v_mov_b32_e32 v2, 0
s_cmpk_lt_u32 s5, 0x42
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s0, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
global_load_b32 v2, v[1:2], off
v_lshl_add_u32 v1, v0, 2, 0
s_waitcnt vmcnt(0)
ds_store_b32 v1, v2
s_waitcnt lgkmcnt(0)
s_barrier
.LBB1_1:
buffer_gl0_inv
s_cbranch_scc1 .LBB1_5
s_lshr_b32 s0, s5, 1
s_mov_b32 s1, exec_lo
v_cmpx_gt_u32_e64 s0, v0
s_cbranch_execz .LBB1_4
v_lshl_add_u32 v2, s0, 2, v1
ds_load_b32 v2, v2
ds_load_b32 v3, v1
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v2, v2, v3
ds_store_b32 v1, v2
.LBB1_4:
s_or_b32 exec_lo, exec_lo, s1
s_waitcnt lgkmcnt(0)
s_barrier
s_cmpk_lt_u32 s5, 0x84
s_mov_b32 s5, s0
s_branch .LBB1_1
.LBB1_5:
s_mov_b32 s1, exec_lo
v_cmpx_gt_u32_e32 32, v0
s_cbranch_execz .LBB1_7
v_add_nc_u32_e32 v2, 0x80, v1
v_cmp_ne_u32_e64 s0, -1, v1
s_mov_b64 s[6:7], src_shared_base
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_ne_u32_e32 vcc_lo, -1, v2
v_cndmask_b32_e64 v3, 0, s7, s0
v_cndmask_b32_e32 v4, 0, v2, vcc_lo
v_cndmask_b32_e64 v5, 0, s7, vcc_lo
v_cndmask_b32_e64 v2, 0, v1, s0
flat_load_b32 v5, v[4:5] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v6, v[2:3] glc dlc
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v4, 64, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmp_ne_u32_e32 vcc_lo, -1, v4
v_cndmask_b32_e32 v4, 0, v4, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v6, v5, v6
v_cndmask_b32_e64 v5, 0, s7, vcc_lo
flat_store_b32 v[2:3], v6 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v5, v[4:5] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v6, v[2:3] glc dlc
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v4, 32, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmp_ne_u32_e32 vcc_lo, -1, v4
v_cndmask_b32_e32 v4, 0, v4, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v6, v5, v6
v_cndmask_b32_e64 v5, 0, s7, vcc_lo
flat_store_b32 v[2:3], v6 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v5, v[4:5] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v6, v[2:3] glc dlc
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v4, 16, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmp_ne_u32_e32 vcc_lo, -1, v4
v_cndmask_b32_e32 v4, 0, v4, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v6, v5, v6
v_cndmask_b32_e64 v5, 0, s7, vcc_lo
flat_store_b32 v[2:3], v6 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v5, v[4:5] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v6, v[2:3] glc dlc
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v4, 8, v1
v_add_nc_u32_e32 v1, 4, v1
s_delay_alu instid0(VALU_DEP_2)
v_cmp_ne_u32_e32 vcc_lo, -1, v4
v_cndmask_b32_e32 v4, 0, v4, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v6, v5, v6
v_cndmask_b32_e64 v5, 0, s7, vcc_lo
v_cmp_ne_u32_e32 vcc_lo, -1, v1
flat_store_b32 v[2:3], v6 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v5, v[4:5] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v6, v[2:3] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_dual_cndmask_b32 v4, 0, v1 :: v_dual_add_f32 v1, v5, v6
v_cndmask_b32_e64 v5, 0, s7, vcc_lo
flat_store_b32 v[2:3], v1 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v1, v[4:5] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v4, v[2:3] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_f32_e32 v1, v1, v4
flat_store_b32 v[2:3], v1 dlc
s_waitcnt_vscnt null, 0x0
.LBB1_7:
s_or_b32 exec_lo, exec_lo, s1
s_mov_b32 s5, 0
s_mov_b32 s0, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB1_9
v_mov_b32_e32 v0, 0
s_lshl_b64 s[0:1], s[4:5], 2
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s0, s2, s0
s_addc_u32 s1, s3, s1
ds_load_b32 v1, v0
s_waitcnt lgkmcnt(0)
global_store_b32 v0, v1, s[0:1]
.LBB1_9:
s_endpgm
| gpu_reduction | 1,400 | 2,172 | stackv2-00000-of-00015 |
// Demangled: PixelToCluster(unsigned char*, int, int, int, int*)
Function : _Z14PixelToClusterPhiiiPi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x38c] &wr=0x2 ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x2 ?trans6;
LDC R3, c[0x0][0x360] &wr=0x1 ?trans1;
UIMAD UR4, UR4, UR5, URZ &req={2} ?WAIT4_END_GROUP;
USHF.L.U32 UR4, UR4, 0x2, URZ ?trans1;
IMAD R0, R3, UR6, R0 &req={1} ?WAIT4_END_GROUP;
IMAD.SHL.U32 R0, R0, 0x4, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR4, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R5, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR5, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
LDCU.64 UR8, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD R3, R3, UR5, RZ &req={1} ?trans1;
ISETP.GT.AND P0, PT, R5, 0x1, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x1f0 &req={3,2} ?trans5;
SHF.R.S32.HI R5, RZ, 0x1f, R0 ?trans1;
MOV R4, R0 ?WAIT5_END_GROUP;
IADD.64 R6, R4, UR8 ?WAIT6_END_GROUP;
LDG.E.U8 R2, desc[UR6][R6.64+0x3] &wr=0x2 ?trans1;
IMAD R0, R3, 0x4, R0 ?trans1;
ISETP.NE.AND P0, PT, R2, RZ, PT &req={2} ?WAIT13_END_GROUP;
@P0 LDC.64 R4, c[0x0][0x398] &wr=0x0 ?trans2;
@P0 STG.E desc[UR6][R4.64], RZ &req={0} &rd=0x0 ?trans1;
ISETP.GE.AND P0, PT, R0, UR4, PT ?WAIT3_END_GROUP;
STG.E.U8 desc[UR6][R6.64+0x3], RZ &rd=0x0 ?trans10;
@!P0 BRA 0x130 &req={0} ?trans5;
EXIT ?trans5;
IADD3 R2, PT, PT, R5, 0x3, RZ ?WAIT4_END_GROUP;
LOP3.LUT R4, R2, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R4, 0x1, PT ?trans1;
IADD3 R4, PT, PT, R5.reuse, -0x1, RZ ?trans2;
IADD3 R5, PT, PT, R5, -0x2, RZ ?trans2;
LOP3.LUT R6, R4, 0xfffffffc, RZ, 0xc0, !PT ?WAIT8_END_GROUP;
LDCU.64 UR8, c[0x0][0x380] &req={0} &wr=0x0 ?trans1;
SHF.R.S32.HI R9, RZ, 0x1f, R0 ?trans1;
MOV R8, R0 ?WAIT5_END_GROUP;
IADD.64 R14, R8, UR8 &req={0} ?trans2;
LDCU.128 UR8, c[0x3][URZ] &wr=0x0 ?trans4;
LDG.E.U8 R16, desc[UR6][R14.64] &wr=0x2 ?trans4;
LDG.E.U8 R18, desc[UR6][R14.64+0x1] &wr=0x3 ?trans4;
LDG.E.U8 R20, desc[UR6][R14.64+0x2] &wr=0x4 ?trans1;
ISETP.GE.U32.AND P3, PT, R5, 0x3, PT ?trans1;
IMAD R0, R3, 0x4, R0 ?trans1;
LOP3.LUT P1, RZ, R4, 0x3, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
ISETP.GE.AND P2, PT, R0, UR4, PT ?trans1;
I2F.F64.U16 R16, R16 &req={2} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, -R16, UR8 &req={0} &wr=0x0 ?trans1;
LDCU.64 UR8, c[0x3][0x10] &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R18, R18 &req={3} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, -R18, UR10 &req={2} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R20, R20 &req={4} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R24, -R20, UR8 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R8, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2I.F64.TRUNC R10, R10 &req={0} ?trans1;
HFMA2 R9, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
MOV R8, RZ ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R22, R12, R12 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2I.F64.TRUNC R23, R22 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R24, R24, R24 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2I.F64.TRUNC R24, R24 &req={0} &wr=0x0 ?trans2;
IADD3 R12, PT, PT, R24, R23, R10 &req={0} ?trans1;
@!P3 BRA 0x1400 ?trans6;
MOV R8, RZ ?trans1;
MOV R9, 0x1 ?trans1;
MOV R11, RZ ?WAIT7_END_GROUP;
IMAD.SHL.U32 R24, R9.reuse, 0x4, RZ ?trans1;
IADD3 R10, PT, PT, R9, 0x2, RZ ?trans2;
IADD3 R11, PT, PT, R11, 0x4, RZ ?trans1;
IMAD.SHL.U32 R24, R24, 0x8, RZ ?trans2;
IMAD.SHL.U32 R36, R10, 0x4, RZ ?trans2;
ISETP.NE.AND P6, PT, R11, R6, PT ?trans1;
LDC.64 R28, c[0x3][R24] &wr=0x0 ?trans8;
LDC.64 R22, c[0x3][R24+0x8] &rd=0x1 &wr=0x2 ?trans8;
LDC.64 R34, c[0x3][R24+0x10] &rd=0x1 &wr=0x3 ?trans8;
LDC.64 R32, c[0x3][R24+0x20] &rd=0x1 &wr=0x4 ?trans1;
DADD R28, -R16, R28 &req={0} &wr=0x0 ?trans7;
LDC.64 R30, c[0x3][R24+0x28] &rd=0x1 &wr=0x5 ?trans8;
LDC.64 R24, c[0x3][R24+0x30] &req={1} &wr=0x1 ?trans1;
IMAD.SHL.U32 R36, R36, 0x8, RZ ?WAIT7_END_GROUP;
LDC.64 R26, c[0x3][R36] &rd=0x0 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT11_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R22, -R18, R22 &req={2} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R34, -R20, R34 &req={3} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R28, R28, R28 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2I.F64.TRUNC R29, R28 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R22, R22, R22 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2I.F64.TRUNC R22, R22 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R34, R34, R34 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2I.F64.TRUNC R7, R34 &req={0} &wr=0x0 ?trans2;
IADD3 R29, PT, PT, R7, R22, R29 &req={0} ?WAIT5_END_GROUP;
ISETP.GE.AND P3, PT, R29.reuse, R12.reuse, PT ?trans1;
VIMNMX.S32 R12, R29, R12, PT ?WAIT4_END_GROUP;
SEL R7, R9.reuse, R8, !P3 ?trans1;
IADD3 R8, PT, PT, R9, 0x3, RZ ?WAIT15_END_GROUP;
NOP ?WAIT6_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R32, -R16, R32 &req={4} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R34, R32, R32 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2I.F64.TRUNC R13, R34 &req={0} &rd=0x0 ?trans1;
LDC.64 R32, c[0x3][R36+0x8] &rd=0x2 &wr=0x3 ?trans8;
LDC.64 R36, c[0x3][R36+0x10] &req={2} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT10_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R30, -R18, R30 &req={5} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R34, R30, R30 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2I.F64.TRUNC R31, R34 &req={0} &rd=0x0 ?trans2;
IMAD.SHL.U32 R34, R8, 0x4, RZ &req={0} ?WAIT4_END_GROUP;
IMAD.SHL.U32 R34, R34, 0x8, RZ ?WAIT4_END_GROUP;
LDC.64 R22, c[0x3][R34+0x8] &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT9_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R24, -R20, R24 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R24, R24, R24 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2I.F64.TRUNC R30, R24 &req={1} &rd=0x1 &wr=0x4 ?trans2;
LDC.64 R24, c[0x3][R34] &req={1} &wr=0x1 ?trans1;
IADD3 R13, PT, PT, R30, R31, R13 &req={4} ?WAIT5_END_GROUP;
ISETP.GE.AND P3, PT, R13, R12, PT ?WAIT13_END_GROUP;
@!P3 IADD3 R7, PT, PT, R9.reuse, 0x1, RZ ?trans2;
IADD3 R9, PT, PT, R9, 0x4, RZ ?WAIT15_END_GROUP;
NOP ?WAIT11_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R32, -R18, R32 &req={3} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R32, R32, R32 &req={3} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2I.F64.TRUNC R28, R32 &req={3} &rd=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R24, -R16, R24 &req={1} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R32, R24, R24 &req={3} &rd=0x1 &wr=0x3 ?trans2;
LDC.64 R24, c[0x3][R34+0x10] &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2I.F64.TRUNC R32, R32 &req={3} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R26, -R16, R26 &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R36, -R20, R36 &req={2} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R26, R26, R26 &req={3} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2I.F64.TRUNC R26, R26 &req={2} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R36, R36, R36 &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2I.F64.TRUNC R27, R36 &req={2} &wr=0x2 ?trans2;
IADD3 R27, PT, PT, R27, R28, R26 &req={2} ?trans1;
VIMNMX.S32 R26, R12, R13, PT ?WAIT5_END_GROUP;
VIMNMX.S32 R12, R26, R27, PT ?trans1;
ISETP.GE.AND P4, PT, R27, R26, PT ?WAIT15_END_GROUP;
NOP ?WAIT10_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R22, -R18, R22 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R24, -R20, R24 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R22, R22, R22 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2I.F64.TRUNC R23, R22 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R24, R24, R24 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2I.F64.TRUNC R24, R24 &req={0} &wr=0x0 ?trans2;
IADD3 R13, PT, PT, R24, R23, R32 &req={0} ?WAIT5_END_GROUP;
ISETP.GE.AND P5, PT, R13, R12, PT ?trans1;
VIMNMX.S32 R12, R12, R13, PT ?WAIT12_END_GROUP;
@P5 SEL R8, R10, R7, !P4 ?trans1;
@P6 BRA 0x710 ?trans6;
@!P1 BRA 0x1db0 ?trans5;
LOP3.LUT P4, RZ, R2, 0x1, RZ, 0xc0, !PT ?trans1;
@!P0 BRA 0x1aa0 ?WAIT12_END_GROUP;
IMAD.SHL.U32 R7, R9, 0x4, RZ ?WAIT4_END_GROUP;
IMAD.SHL.U32 R7, R7, 0x8, RZ ?WAIT4_END_GROUP;
LDC.64 R30, c[0x3][R7] &rd=0x0 &wr=0x1 ?trans8;
LDC.64 R26, c[0x3][R7+0x8] &rd=0x0 &wr=0x2 ?trans8;
LDC.64 R10, c[0x3][R7+0x10] &rd=0x0 &wr=0x3 ?trans2;
IADD3 R7, PT, PT, R9, 0x1, RZ &req={0} ?trans1;
DADD R30, -R16, R30 &req={1} &wr=0x0 ?trans4;
IMAD.SHL.U32 R13, R7, 0x4, RZ ?WAIT4_END_GROUP;
IMAD.SHL.U32 R13, R13, 0x8, RZ ?WAIT4_END_GROUP;
LDC.64 R22, c[0x3][R13] &rd=0x1 &wr=0x4 ?trans8;
LDC.64 R24, c[0x3][R13+0x8] &rd=0x1 &wr=0x5 ?trans8;
LDC.64 R28, c[0x3][R13+0x10] &rd=0x1 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT6_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R26, -R18, R26 &req={2} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, -R20, R10 &req={3} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R30, R30, R30 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2I.F64.TRUNC R30, R30 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R26, R26, R26 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2I.F64.TRUNC R27, R26 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R10, R10 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2I.F64.TRUNC R10, R10 &req={0} &wr=0x1 ?trans2;
IADD3 R13, PT, PT, R10, R27, R30 &req={1} ?WAIT5_END_GROUP;
VIMNMX.S32 R26, R12, R13, PT ?trans1;
ISETP.GE.AND P1, PT, R13, R12, PT ?WAIT15_END_GROUP;
NOP ?WAIT11_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R22, -R16, R22 &req={4} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R24, -R18, R24 &req={5} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R28, -R20, R28 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R22, R22, R22 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2I.F64.TRUNC R22, R22 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R24, R24, R24 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2I.F64.TRUNC R25, R24 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R28, R28, R28 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2I.F64.TRUNC R28, R28 &req={0} &wr=0x0 ?trans2;
IADD3 R27, PT, PT, R28, R25, R22 &req={0} ?WAIT5_END_GROUP;
ISETP.GE.AND P3, PT, R27, R26, PT ?trans1;
VIMNMX.S32 R12, R26, R27, PT ?WAIT12_END_GROUP;
@P3 SEL R7, R9.reuse, R8, !P1 ?trans1;
IADD3 R9, PT, PT, R9, 0x2, RZ ?WAIT4_END_GROUP;
MOV R8, R7 ?WAIT7_END_GROUP;
@!P4 BRA 0x1db0 ?trans5;
IMAD.SHL.U32 R7, R9, 0x4, RZ ?WAIT4_END_GROUP;
IMAD.SHL.U32 R7, R7, 0x8, RZ ?WAIT4_END_GROUP;
LDC.64 R10, c[0x3][R7] &wr=0x0 ?trans2;
DADD R10, -R16, R10 &req={0} &rd=0x0 &wr=0x1 ?trans6;
LDC.64 R16, c[0x3][R7+0x8] &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, -R18, R16 &req={0} &rd=0x0 ?trans2;
LDC.64 R18, c[0x3][R7+0x10] &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, -R20, R18 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R10, R10 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2I.F64.TRUNC R10, R10 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R16, R16, R16 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2I.F64.TRUNC R17, R16 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R18, R18, R18 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2I.F64.TRUNC R18, R18 &req={0} &wr=0x0 ?trans2;
IADD3 R7, PT, PT, R18, R17, R10 &req={0} ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R7, R12, PT ?WAIT5_END_GROUP;
SEL R8, R9, R8, !P1 ?WAIT8_END_GROUP;
LDG.E.U8 R7, desc[UR6][R14.64+0x3] &wr=0x2 ?trans2;
ISETP.NE.AND P1, PT, R8, R7, PT &req={2} ?WAIT13_END_GROUP;
@P1 LDC.64 R10, c[0x0][0x398] &wr=0x0 ?trans2;
@P1 STG.E desc[UR6][R10.64], RZ &req={0} &rd=0x0 ?trans4;
STG.E.U8 desc[UR6][R14.64+0x3], R8 &rd=0x0 ?trans1;
@!P2 BRA 0x250 ?trans5;
EXIT ?trans5;
BRA 0x1e20;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: PixelToCluster(unsigned char*, int, int, int, int*)
_Z14PixelToClusterPhiiiPi:
s_clause 0x1
s_load_b32 s8, s[0:1], 0x2c
s_load_b128 s[4:7], s[0:1], 0x8
s_add_u32 s2, s0, 32
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s12, s8, 0xffff
s_mul_i32 s5, s5, s6
s_mul_i32 s15, s15, s12
s_lshl_b32 s5, s5, 2
v_add_lshl_u32 v8, s15, v0, 2
s_mov_b32 s6, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s5, v8
s_cbranch_execz .LBB0_8
s_getpc_b64 s[10:11]
s_add_u32 s10, s10, DevClusterCore@rel32@lo+4
s_addc_u32 s11, s11, DevClusterCore@rel32@hi+12
v_mov_b32_e32 v9, 0
s_load_b32 s13, s[2:3], 0x0
s_clause 0x1
s_load_b64 s[6:7], s[0:1], 0x0
s_load_b64 s[8:9], s[0:1], 0x18
s_clause 0x1
s_load_b128 s[0:3], s[10:11], 0x0
s_load_b64 s[10:11], s[10:11], 0x10
s_cmp_gt_i32 s4, 1
s_mov_b32 s16, 0
s_cselect_b32 s14, -1, 0
s_waitcnt lgkmcnt(0)
s_mul_i32 s13, s13, s12
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b32 s15, s13, 2
.LBB0_2:
v_ashrrev_i32_e32 v1, 31, v8
v_add_co_u32 v0, vcc_lo, s6, v8
v_mov_b32_e32 v10, 0
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
s_and_not1_b32 vcc_lo, exec_lo, s14
s_cbranch_vccnz .LBB0_5
s_clause 0x1
global_load_u16 v2, v[0:1], off
global_load_u8 v3, v[0:1], off offset:2
s_mov_b32 s17, 1
s_getpc_b64 s[12:13]
s_add_u32 s12, s12, DevClusterCore@rel32@lo+52
s_addc_u32 s13, s13, DevClusterCore@rel32@hi+60
s_waitcnt vmcnt(1)
v_and_b32_e32 v4, 0xff, v2
v_bfe_u32 v5, v2, 8, 8
s_waitcnt vmcnt(0)
v_cvt_f64_u32_e32 v[2:3], v3
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_and_b32_e32 v6, 0xffff, v4
v_cvt_f64_u32_e32 v[4:5], v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_cvt_f64_u32_e32 v[6:7], v6
v_add_f64 v[10:11], s[10:11], -v[2:3]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[12:13], s[2:3], -v[4:5]
v_add_f64 v[14:15], s[0:1], -v[6:7]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mul_f64 v[10:11], v[10:11], v[10:11]
v_mul_f64 v[12:13], v[12:13], v[12:13]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mul_f64 v[14:15], v[14:15], v[14:15]
v_cvt_i32_f64_e32 v10, v[10:11]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cvt_i32_f64_e32 v11, v[12:13]
v_cvt_i32_f64_e32 v12, v[14:15]
s_delay_alu instid0(VALU_DEP_1)
v_add3_u32 v11, v11, v12, v10
v_mov_b32_e32 v10, 0
.LBB0_4:
s_add_u32 s18, s12, -16
s_addc_u32 s19, s13, -1
s_clause 0x1
s_load_b128 s[20:23], s[18:19], 0x0
s_load_b64 s[18:19], s[12:13], 0x0
s_waitcnt lgkmcnt(0)
v_add_f64 v[12:13], s[20:21], -v[6:7]
v_add_f64 v[14:15], s[22:23], -v[4:5]
v_add_f64 v[16:17], s[18:19], -v[2:3]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mul_f64 v[12:13], v[12:13], v[12:13]
v_mul_f64 v[14:15], v[14:15], v[14:15]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mul_f64 v[16:17], v[16:17], v[16:17]
v_cvt_i32_f64_e32 v12, v[12:13]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cvt_i32_f64_e32 v13, v[14:15]
v_cvt_i32_f64_e32 v14, v[16:17]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add3_u32 v12, v13, v12, v14
v_cmp_lt_i32_e32 vcc_lo, v12, v11
v_min_i32_e32 v11, v12, v11
v_cndmask_b32_e64 v10, v10, s17, vcc_lo
s_add_i32 s17, s17, 1
s_add_u32 s12, s12, 32
s_addc_u32 s13, s13, 0
s_cmp_eq_u32 s4, s17
s_cbranch_scc0 .LBB0_4
.LBB0_5:
global_load_u8 v2, v[0:1], off offset:3
s_mov_b32 s12, exec_lo
s_waitcnt vmcnt(0)
v_cmpx_ne_u32_e64 v10, v2
s_cbranch_execz .LBB0_7
global_store_b32 v9, v9, s[8:9]
.LBB0_7:
s_or_b32 exec_lo, exec_lo, s12
v_add_nc_u32_e32 v8, s15, v8
global_store_b8 v[0:1], v10, off offset:3
v_cmp_le_i32_e32 vcc_lo, s5, v8
s_or_b32 s16, vcc_lo, s16
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s16
s_cbranch_execnz .LBB0_2
.LBB0_8:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| PixelToCluster | 8,033 | 2,337 | stackv2-00000-of-00015 |
// Demangled: spmv_csr_vector_kernel(int, int const*, int const*, float const*, unsigned long long, float*)
Function : _Z22spmv_csr_vector_kerneliPKiS0_PKfyPf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x380] &wr=0x1 ?trans2;
ISETP.GE.AND P0, PT, R0, UR4, PT &req={1} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x1 ?trans1;
LDCU.64 UR10, c[0x0][0x358] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R4, R0, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
LDG.E R7, desc[UR10][R4.64] &req={2} &wr=0x2 ?trans4;
LDG.E R6, desc[UR10][R4.64+0x4] &wr=0x3 ?trans1;
S2UR UR8, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
BSSY.RECONVERGENT B0, 0x11d0 ?trans1;
S2R R2, SR_TID.X &wr=0x4 ?trans1;
ULEA UR8, UR8, UR4, 0x18 &req={1} ?WAIT6_END_GROUP;
LEA R3, R2, UR8, 0x3 &req={4} ?WAIT5_END_GROUP;
STS.64 [R3], RZ &rd=0x1 ?trans1;
IADD3 R9, PT, PT, R7, R2, RZ &req={2} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R9, R6, PT &req={3} ?WAIT13_END_GROUP;
@P0 BRA 0x11c0 &req={1} ?trans5;
MOV R4, R9 ?trans1;
BSSY.RECONVERGENT B1, 0x9e0 ?trans1;
MOV.64 R20, RZ ?WAIT3_END_GROUP;
IADD3 R5, PT, PT, R4, 0x20, RZ ?WAIT5_END_GROUP;
VIMNMX.S32 R6, R6, R5, !PT ?trans1;
LOP3.LUT R5, RZ, R2, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R5, PT, PT, -R7, R6, R5 ?WAIT4_END_GROUP;
LEA.HI R6, R5.reuse, 0x1, RZ, 0x1b ?trans1;
ISETP.GE.U32.AND P1, PT, R5, 0xe0, PT ?WAIT3_END_GROUP;
LOP3.LUT R7, R6, 0x7, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R7, RZ, PT ?WAIT5_END_GROUP;
@!P1 BRA 0x9d0 ?trans8;
LDC.64 R16, c[0x0][0x398] &wr=0x1 ?trans1;
LOP3.LUT R8, R6, 0xffffff8, RZ, 0xc0, !PT ?trans1;
MOV.64 R20, RZ ?WAIT3_END_GROUP;
IADD3 R8, PT, PT, -R8, RZ, RZ ?WAIT3_END_GROUP;
LDC.64 R18, c[0x0][0x390] &wr=0x2 ?trans1;
IADD.64 R16, R16, 0x200 &req={1} ?trans2;
IADD.64 R18, R18, 0x200 &req={2} ?WAIT8_END_GROUP;
IMAD.WIDE R22, R4, 0x4, R18 ?WAIT5_END_GROUP;
LDG.E R24, desc[UR10][R22.64+-0x200] &wr=0x2 ?trans4;
LDG.E R31, desc[UR10][R22.64+-0x180] &wr=0x3 ?trans4;
LDG.E R29, desc[UR10][R22.64+-0x100] &wr=0x4 ?trans4;
LDG.E R26, desc[UR10][R22.64+-0x80] &wr=0x4 ?trans4;
LDG.E R14, desc[UR10][R22.64] &wr=0x4 ?trans4;
LDG.E R12, desc[UR10][R22.64+0x80] &wr=0x4 ?trans4;
LDG.E R10, desc[UR10][R22.64+0x100] &wr=0x4 ?trans4;
LDG.E R9, desc[UR10][R22.64+0x180] &wr=0x4 ?trans1;
LDCU UR4, c[0x0][0x3a0] &wr=0x2 ?trans1;
UMOV UR5, URZ ?WAIT2_END_GROUP;
TLD.LZ RZ, R24, R24, UR4, 1D, 0x1 &req={2} &wr=0x5 ?trans1;
TLD.LZ RZ, R31, R31, UR4, 1D, 0x1 &req={3} &wr=0x5 ?trans1;
TLD.LZ RZ, R29, R29, UR4, 1D, 0x1 &req={4} ?trans1;
TLD.LZ RZ, R26, R26, UR4, 1D, 0x1 ?trans1;
TLD.LZ RZ, R14, R14, UR4, 1D, 0x1 &wr=0x5 ?trans1;
TLD.LZ RZ, R12, R12, UR4, 1D, 0x1 ?trans1;
TLD.LZ RZ, R10, R10, UR4, 1D, 0x1 ?trans1;
TLD.LZ RZ, R9, R9, UR4, 1D, 0x1 &wr=0x5 ?trans1;
IMAD.WIDE R22, R4, 0x4, R16 ?WAIT5_END_GROUP;
LDG.E R25, desc[UR10][R22.64+-0x200] &wr=0x2 ?trans4;
LDG.E R34, desc[UR10][R22.64+-0x180] &wr=0x3 ?trans4;
LDG.E R30, desc[UR10][R22.64+-0x100] &wr=0x4 ?trans4;
LDG.E R15, desc[UR10][R22.64] &wr=0x4 ?trans4;
LDG.E R27, desc[UR10][R22.64+-0x80] &wr=0x4 ?trans4;
LDG.E R13, desc[UR10][R22.64+0x80] &wr=0x4 ?trans4;
LDG.E R11, desc[UR10][R22.64+0x100] &req={1} &rd=0x1 &wr=0x4 ?trans4;
LDG.E R28, desc[UR10][R22.64+0x180] &wr=0x4 ?trans1;
IADD3 R8, PT, PT, R8, 0x8, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R8, RZ, PT ?trans1;
IADD3 R4, PT, PT, R4, 0x100, RZ ?trans1;
DEPBAR.LE SB5, 0x2 ?WAIT4_END_GROUP;
FMUL R32, R24, R25 &req={2} ?trans1;
FMUL R31, R34, R31 &req={3} ?WAIT3_END_GROUP;
F2F.F64.F32 R24, R32 &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R24, R24, R20 &req={2} &rd=0x2 &wr=0x3 ?trans1;
FMUL R14, R15, R14 &req={5,4} ?trans1;
FMUL R26, R27, R26 ?trans1;
FMUL R9, R28, R9 ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R20, R31 &req={2} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R24, R20 &req={3} &rd=0x2 &wr=0x3 ?trans2;
FMUL R24, R30, R29 &req={2} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R24, R24 &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R20, R24 &req={3} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R22, R26 &req={1} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R20, R22 &req={2} &rd=0x1 &wr=0x2 ?trans2;
FMUL R22, R11, R10 &req={1} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R14, R14 &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R20, R14 &req={2} &rd=0x1 &wr=0x2 ?trans2;
FMUL R15, R13, R12 &req={1} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R12, R15 &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, R20, R12 &req={2} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R10, R22 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, R12, R10 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R20, R9 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R10, R20 &req={1} &wr=0x1 ?trans2;
STS.64 [R3], R20 &req={1} &rd=0x1 ?trans1;
@P1 BRA 0x270 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
@!P0 BRA 0x11c0 ?trans5;
ISETP.GE.U32.AND P0, PT, R7, 0x4, PT ?trans1;
BSSY.RECONVERGENT B1, 0xe10 ?trans1;
LOP3.LUT P1, R6, R6, 0x3, RZ, 0xc0, !PT ?WAIT11_END_GROUP;
@!P0 BRA 0xe00 ?trans5;
LDC.64 R8, c[0x0][0x390] &wr=0x2 ?trans2;
IMAD.WIDE R8, R4, 0x4, R8 &req={2} ?WAIT5_END_GROUP;
LDG.E R7, desc[UR10][R8.64] &wr=0x2 ?trans4;
LDG.E R15, desc[UR10][R8.64+0x80] &wr=0x3 ?trans4;
LDG.E R18, desc[UR10][R8.64+0x100] &wr=0x4 ?trans4;
LDG.E R22, desc[UR10][R8.64+0x180] &wr=0x4 ?trans1;
LDCU UR4, c[0x0][0x3a0] &wr=0x2 ?trans1;
UMOV UR5, URZ ?WAIT2_END_GROUP;
TLD.LZ RZ, R7, R7, UR4, 1D, 0x1 &req={2} &wr=0x5 ?trans1;
TLD.LZ RZ, R16, R15, UR4, 1D, 0x1 &req={3} &wr=0x5 ?trans1;
TLD.LZ RZ, R18, R18, UR4, 1D, 0x1 &req={4} ?trans1;
TLD.LZ RZ, R22, R22, UR4, 1D, 0x1 &wr=0x5 ?trans1;
LDC.64 R10, c[0x0][0x398] &wr=0x2 ?trans2;
IMAD.WIDE R10, R4, 0x4, R10 &req={2} ?WAIT5_END_GROUP;
LDG.E R12, desc[UR10][R10.64] &wr=0x2 ?trans4;
LDG.E R13, desc[UR10][R10.64+0x80] &wr=0x3 ?trans4;
LDG.E R17, desc[UR10][R10.64+0x100] &wr=0x4 ?trans4;
LDG.E R19, desc[UR10][R10.64+0x180] &wr=0x4 ?trans1;
IADD3 R4, PT, PT, R4, 0x80, RZ ?trans1;
DEPBAR.LE SB5, 0x1 ?WAIT4_END_GROUP;
FMUL R14, R7, R12 &req={2} ?trans1;
FMUL R16, R13, R16 &req={3} ?WAIT3_END_GROUP;
F2F.F64.F32 R8, R14 &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, R20, R8 &req={2} &wr=0x2 ?trans1;
FMUL R19, R19, R22 &req={5,4} ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R12, R16 &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, R8, R12 &req={2} &rd=0x2 &wr=0x3 ?trans2;
FMUL R12, R17, R18 &req={2} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R12, R12 &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, R8, R12 &req={3} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R20, R19 &req={1} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R8, R20 &req={2} &wr=0x1 ?trans2;
STS.64 [R3], R20 &req={1} &rd=0x2 ?trans2;
BSYNC.RECONVERGENT B1 ?trans5;
@!P1 BRA 0x11c0 ?trans5;
LDC.64 R8, c[0x0][0x390] &wr=0x3 ?trans1;
ISETP.NE.AND P1, PT, R6, 0x1, PT ?trans1;
LOP3.LUT P0, RZ, R5, 0x20, RZ, 0xc0, !PT ?WAIT6_END_GROUP;
LDC.64 R10, c[0x0][0x398] &wr=0x4 ?trans8;
LDC.64 R12, c[0x0][0x390] &wr=0x1 ?trans1;
@P1 IMAD.WIDE R8, R4, 0x4, R8 &req={3} ?WAIT5_END_GROUP;
@P1 LDG.E R14, desc[UR10][R8.64] &wr=0x3 ?trans1;
@P1 IMAD.WIDE R10, R4.reuse, 0x4, R10 &req={4} ?trans1;
@P1 IADD3 R4, PT, PT, R4, 0x40, RZ ?trans2;
@P1 LDG.E R17, desc[UR10][R8.64+0x80] &wr=0x4 ?trans3;
@!P0 IMAD.WIDE R6, R4, 0x4, R12 &req={1} ?WAIT5_END_GROUP;
@!P0 LDG.E R12, desc[UR10][R6.64] &req={2} &wr=0x2 ?trans1;
VOTEU.ANY UP0, P1 ?trans1;
VOTEU.ALL UP1, P0 ?WAIT4_END_GROUP;
@UP0 LDCU UR4, c[0x0][0x3a0] &wr=0x3 ?trans1;
@!UP1 LDCU UR6, c[0x0][0x3a0] &wr=0x2 ?trans1;
@UP0 UMOV UR5, URZ ?trans1;
@!UP1 UMOV UR7, URZ ?trans1;
@P1 TLD.LZ RZ, R14, R14, UR4, 1D, 0x1 &req={3} ?trans1;
@P1 TLD.LZ RZ, R17, R17, UR4, 1D, 0x1 &req={4} &wr=0x5 ?trans1;
@!P0 TLD.LZ RZ, R13, R12, UR6, 1D, 0x1 &req={2} &wr=0x5 ?trans1;
LDC.64 R8, c[0x0][0x398] &wr=0x1 ?trans1;
@P1 LDG.E R16, desc[UR10][R10.64+0x80] &wr=0x2 ?trans4;
@P1 LDG.E R7, desc[UR10][R10.64] &wr=0x3 ?trans1;
@!P0 IMAD.WIDE R4, R4, 0x4, R8 &req={1} ?WAIT6_END_GROUP;
@!P0 LDG.E R4, desc[UR10][R4.64] &wr=0x4 ?trans1;
DEPBAR.LE SB5, 0x1 ?WAIT4_END_GROUP;
@P1 FMUL R8, R16, R17 &req={2} ?trans1;
@P1 FMUL R15, R14, R7 &req={3} ?WAIT5_END_GROUP;
@P1 F2F.F64.F32 R8, R8 ?trans1;
@!P0 FMUL R13, R4, R13 &req={5,4} ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@P1 F2F.F64.F32 R6, R15 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@P1 DADD R6, R20, R6 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@P1 DADD R20, R6, R8 &req={1} &rd=0x1 &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P0 F2F.F64.F32 R6, R13 &req={1} &wr=0x1 ?trans1;
@P1 STS.64 [R3], R20 &req={2} &rd=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P0 DADD R6, R6, R20 &req={1} &wr=0x1 ?trans2;
@!P0 STS.64 [R3], R6 &req={1} &rd=0x3 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R2.reuse, 0xf, PT ?trans1;
ISETP.GT.U32.AND P1, PT, R2, 0x7, PT ?WAIT12_END_GROUP;
@!P0 LDS.64 R4, [R3+0x80] ?trans4;
@!P0 LDS.64 R6, [R3] &req={3} &wr=0x3 ?trans2;
@!P0 DADD R4, R4, R6 &req={3} &wr=0x3 ?trans2;
@!P0 STS.64 [R3], R4 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R2, 0x3, PT ?WAIT5_END_GROUP;
@!P1 LDS.64 R6, [R3+0x40] ?trans4;
@!P1 LDS.64 R8, [R3] &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT6_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 DADD R6, R6, R8 &req={3} &wr=0x3 ?trans2;
@!P1 STS.64 [R3], R6 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P1, PT, R2, 0x1, PT ?WAIT5_END_GROUP;
@!P0 LDS.64 R8, [R3+0x20] ?trans4;
@!P0 LDS.64 R10, [R3] &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT6_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P0 DADD R8, R8, R10 &req={3} &wr=0x3 ?trans2;
@!P0 STS.64 [R3], R8 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.NE.AND P0, PT, R2, RZ, PT ?WAIT5_END_GROUP;
@!P1 LDS.64 R4, [R3+0x10] ?trans4;
@!P1 LDS.64 R10, [R3] &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT6_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 DADD R4, R4, R10 &req={3} &wr=0x3 ?trans2;
@!P1 STS.64 [R3], R4 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P0 LDS.128 R12, [UR8] &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT10_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P0 DADD R6, R14, R12 &req={3} &wr=0x3 ?trans2;
@!P0 STS.64 [UR8], R6 &req={3} &rd=0x3 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 EXIT ?trans5;
LDC.64 R4, c[0x0][0x3a8] &wr=0x4 ?trans1;
LDS.64 R2, [UR8] &req={2,1} &wr=0x1 ?trans1;
LEA R4, P0, R0, R4, 0x2 &req={4} ?WAIT4_END_GROUP;
LEA.HI.X R5, R0, R5, RZ, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R6, desc[UR10][R4.64] &req={3} &wr=0x2 ?trans2;
F2F.F64.F32 R6, R6 &req={2} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R2, R2, R6 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R3, R2 &req={1} &wr=0x1 ?trans2;
STG.E desc[UR10][R4.64], R3 &req={1} ?trans1;
EXIT ?trans5;
BRA 0x15a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: spmv_csr_vector_kernel(int, int const*, int const*, float const*, __hip_texture*, float*)
_Z22spmv_csr_vector_kerneliPKiS0_PKfP13__hip_texturePf:
s_load_b32 s3, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_cmp_ge_i32 s15, s3
s_cbranch_scc1 .LBB0_16
s_load_b256 s[4:11], s[0:1], 0x8
s_mov_b32 s2, s15
s_ashr_i32 s3, s15, 31
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[2:3], s[2:3], 2
s_waitcnt lgkmcnt(0)
s_add_u32 s4, s4, s2
s_addc_u32 s5, s5, s3
s_load_b64 s[16:17], s[4:5], 0x0
s_load_b64 s[4:5], s[0:1], 0x28
v_mov_b32_e32 v2, 0
s_mov_b32 s1, 0
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v1, s16, v0
s_delay_alu instid0(VALU_DEP_2)
v_dual_mov_b32 v3, v2 :: v_dual_lshlrev_b32 v8, 3, v0
s_mov_b32 s16, exec_lo
ds_store_b64 v8, v[2:3]
v_cmpx_gt_i32_e64 s17, v1
s_cbranch_execz .LBB0_4
v_ashrrev_i32_e32 v2, 31, v1
s_load_b128 s[12:15], s[10:11], 0x0
v_mov_b32_e32 v4, 0
v_mov_b32_e32 v5, 0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[1:2]
v_add_co_u32 v2, vcc_lo, s8, v6
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s9, v7, vcc_lo
v_add_co_u32 v6, vcc_lo, s6, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
.LBB0_3:
global_load_b32 v9, v[6:7], off
global_load_b32 v10, v[2:3], off
v_add_nc_u32_e32 v1, 32, v1
v_add_co_u32 v2, vcc_lo, 0x80, v2
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_le_i32_e32 vcc_lo, s17, v1
v_add_co_u32 v6, s0, 0x80, v6
v_add_co_ci_u32_e64 v7, s0, 0, v7, s0
s_or_b32 s1, vcc_lo, s1
s_waitcnt vmcnt(1) lgkmcnt(0)
buffer_load_format_x v9, v9, s[12:15], 0 idxen
s_waitcnt vmcnt(0)
v_mul_f32_e32 v9, v10, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f64_f32_e32 v[9:10], v9
v_add_f64 v[4:5], v[4:5], v[9:10]
ds_store_b64 v8, v[4:5]
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execnz .LBB0_3
.LBB0_4:
s_or_b32 exec_lo, exec_lo, s16
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s0, exec_lo
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmpx_gt_u32_e32 16, v0
s_cbranch_execz .LBB0_6
ds_load_b64 v[1:2], v8 offset:128
ds_load_b64 v[3:4], v8
s_waitcnt lgkmcnt(0)
v_add_f64 v[1:2], v[1:2], v[3:4]
ds_store_b64 v8, v[1:2]
.LBB0_6:
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s0, exec_lo
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmpx_gt_u32_e32 8, v0
s_cbranch_execz .LBB0_8
ds_load_b64 v[1:2], v8 offset:64
ds_load_b64 v[3:4], v8
s_waitcnt lgkmcnt(0)
v_add_f64 v[1:2], v[1:2], v[3:4]
ds_store_b64 v8, v[1:2]
.LBB0_8:
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s0, exec_lo
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmpx_gt_u32_e32 4, v0
s_cbranch_execz .LBB0_10
ds_load_b64 v[1:2], v8 offset:32
ds_load_b64 v[3:4], v8
s_waitcnt lgkmcnt(0)
v_add_f64 v[1:2], v[1:2], v[3:4]
ds_store_b64 v8, v[1:2]
.LBB0_10:
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s0, exec_lo
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmpx_gt_u32_e32 2, v0
s_cbranch_execz .LBB0_12
ds_load_b64 v[1:2], v8 offset:16
ds_load_b64 v[3:4], v8
s_waitcnt lgkmcnt(0)
v_add_f64 v[1:2], v[1:2], v[3:4]
ds_store_b64 v8, v[1:2]
.LBB0_12:
s_or_b32 exec_lo, exec_lo, s0
v_cmp_eq_u32_e32 vcc_lo, 0, v0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_saveexec_b32 s0, vcc_lo
s_cbranch_execz .LBB0_14
v_mov_b32_e32 v0, 0
ds_load_b64 v[0:1], v0 offset:8
ds_load_b64 v[2:3], v8
s_waitcnt lgkmcnt(0)
v_add_f64 v[0:1], v[0:1], v[2:3]
ds_store_b64 v8, v[0:1]
.LBB0_14:
s_or_b32 exec_lo, exec_lo, s0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_saveexec_b32 s0, vcc_lo
s_cbranch_execz .LBB0_16
s_add_u32 s0, s4, s2
s_addc_u32 s1, s5, s3
ds_load_b64 v[2:3], v8
s_load_b32 s2, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
v_cvt_f64_f32_e32 v[0:1], s2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[0:1], v[2:3], v[0:1]
v_cvt_f32_f64_e32 v0, v[0:1]
v_mov_b32_e32 v1, 0
global_store_b32 v1, v0, s[0:1]
.LBB0_16:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| spmv_csr_vector_kernel | 7,100 | 2,221 | stackv2-00000-of-00015 |
// Demangled: AddTo32(int*, int*, int const*)
Function : _Z7AddTo32PiS_PKi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans7;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans1;
S2R R7, SR_TID.X &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans1;
LDG.E R5, desc[UR4][R4.64] &req={0} &wr=0x2 ?trans1;
IMAD.WIDE.U32 R2, R7, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
REDG.E.ADD.STRONG.GPU desc[UR4][R2.64], R5 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x90;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: AddTo32(int*, int*, int const*)
_Z7AddTo32PiS_PKi:
s_load_b128 s[0:3], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_load_b32 s2, s[2:3], 0x0
s_waitcnt lgkmcnt(0)
v_dual_mov_b32 v1, s2 :: v_dual_lshlrev_b32 v0, 2, v0
global_atomic_add_u32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| AddTo32 | 304 | 145 | stackv2-00000-of-00015 |
// Demangled: Return32(int*, int*, int const*)
Function : _Z8Return32PiS_PKi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans7;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans1;
S2R R9, SR_TID.X &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans8;
LDC.64 R6, c[0x0][0x388] &wr=0x2 ?trans1;
LDG.E R5, desc[UR4][R4.64] &req={0} &wr=0x3 ?trans1;
IMAD.WIDE.U32 R2, R9, 0x4, R2 &req={1} ?WAIT6_END_GROUP;
ATOMG.E.ADD.STRONG.GPU PT, R3, desc[UR4][R2.64], R5 &req={3} &wr=0x3 ?trans1;
IMAD.WIDE.U32 R6, R9, 0x4, R6 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R3 &req={3} ?trans1;
EXIT ?trans5;
BRA 0xc0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: Return32(int*, int*, int const*)
_Z8Return32PiS_PKi:
s_load_b64 s[2:3], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_load_b32 s4, s[2:3], 0x0
s_load_b128 s[0:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
v_dual_mov_b32 v1, s4 :: v_dual_lshlrev_b32 v0, 2, v0
global_atomic_add_u32 v1, v0, v1, s[0:1] glc
s_waitcnt vmcnt(0)
global_store_b32 v0, v1, s[2:3]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| Return32 | 393 | 198 | stackv2-00000-of-00015 |
// Demangled: get_negative_columns(float*, int*, int)
Function : _Z20get_negative_columnsPfPii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R7, c[0x0][0x390] &wr=0x1 ?trans1;
S2R R3, SR_TID.X &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x3 ?trans1;
MOV R6, RZ ?WAIT5_END_GROUP;
S2UR UR6, SR_CTAID.X &wr=0x2 ?trans8;
LDC R0, c[0x0][0x360] &wr=0x2 ?trans1;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={1} ?trans1;
IMAD R0, R0, UR6, R3 &req={2} ?WAIT2_END_GROUP;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT10_END_GROUP;
@!P0 BRA 0xa90 &req={3,0} ?trans5;
ISETP.GE.U32.AND P1, PT, R7.reuse, 0x8, PT ?trans1;
LOP3.LUT R20, R7, 0x7, RZ, 0xc0, !PT ?trans1;
IMAD R2, R0, R7, RZ ?trans1;
MOV R21, RZ ?trans1;
MOV.64 R4, RZ ?trans2;
MOV R6, RZ ?trans1;
MOV R12, RZ ?trans1;
ISETP.NE.S64.AND P0, PT, R20, RZ, PT ?WAIT3_END_GROUP;
SHF.R.S32.HI R3, RZ, 0x1f, R2 ?trans2;
@!P1 BRA 0x5a0 ?trans9;
LDCU.64 UR6, c[0x0][0x380] &wr=0x0 ?trans1;
MOV.64 R4, RZ ?trans2;
HFMA2 R6, -RZ, RZ, 0, 0 ?trans1;
SHF.R.S32.HI R9, RZ, 0x1f, R7 ?trans2;
LOP3.LUT R8, R7, 0xfffffff8, RZ, 0xc0, !PT ?trans2;
LEA R10, P1, R2, UR6, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R11, R2, UR7, R3, 0x2, P1 ?WAIT5_END_GROUP;
IADD.64 R10, R10, 0x10 ?WAIT8_END_GROUP;
LDG.E R15, desc[UR4][R10.64+-0x10] &wr=0x2 ?trans4;
LDG.E R14, desc[UR4][R10.64+-0xc] &wr=0x3 ?trans4;
LDG.E R16, desc[UR4][R10.64+-0x8] &wr=0x4 ?trans4;
LDG.E R17, desc[UR4][R10.64+-0x4] &wr=0x5 ?trans4;
LDG.E R18, desc[UR4][R10.64] &wr=0x5 ?trans4;
LDG.E R19, desc[UR4][R10.64+0x4] &wr=0x5 ?trans4;
LDG.E R22, desc[UR4][R10.64+0x8] &wr=0x5 ?trans4;
LDG.E R23, desc[UR4][R10.64+0xc] &rd=0x0 &wr=0x5 ?trans1;
IADD3 R13, PT, PT, R12, 0x1, RZ ?trans1;
IADD.64 R4, R4, 0x8 ?WAIT2_END_GROUP;
IADD.64 R10, R10, 0x20 &req={0} ?trans2;
FSETP.NEU.AND P1, PT, R15.reuse, RZ, PT &req={2} ?trans1;
FSETP.GEU.AND P3, PT, R15, RZ, PT ?trans1;
FSETP.NEU.AND P4, PT, R14, RZ, PT &req={3} ?trans1;
FSETP.NEU.AND P2, PT, R16, RZ, PT &req={4} ?WAIT10_END_GROUP;
@P1 IADD3 R13, PT, PT, R12, RZ, RZ ?trans1;
FSETP.GEU.AND P1, PT, R14, RZ, PT ?trans1;
IADD3 R12, PT, PT, R6.reuse, 0x1, RZ ?trans2;
@P3 IADD3 R12, PT, PT, R6, RZ, RZ ?trans1;
FSETP.GEU.AND P3, PT, R16, RZ, PT ?trans1;
IADD3 R15, PT, PT, R13.reuse, 0x1, RZ ?trans2;
@P4 IADD3 R15, PT, PT, R13, RZ, RZ ?trans1;
FSETP.NEU.AND P4, PT, R17, RZ, PT &req={5} ?trans1;
IADD3 R6, PT, PT, R12, 0x1, RZ ?WAIT2_END_GROUP;
IADD3 R13, PT, PT, R15.reuse, 0x1, RZ ?trans2;
@P2 IADD3 R13, PT, PT, R15, RZ, RZ ?trans1;
FSETP.GEU.AND P2, PT, R17, RZ, PT ?trans1;
@P1 IADD3 R6, PT, PT, R12, RZ, RZ ?trans1;
FSETP.NEU.AND P1, PT, R18, RZ, PT ?trans1;
IADD.64 R16, R4, -R8 ?WAIT3_END_GROUP;
IADD3 R14, PT, PT, R13, 0x1, RZ ?trans2;
IADD3 R12, PT, PT, R6.reuse, 0x1, RZ ?trans2;
@P3 IADD3 R12, PT, PT, R6, RZ, RZ ?trans1;
FSETP.NEU.AND P3, PT, R19, RZ, PT ?trans1;
@P4 IADD3 R14, PT, PT, R13, RZ, RZ ?trans1;
FSETP.GEU.AND P4, PT, R18, RZ, PT ?trans1;
IADD3 R6, PT, PT, R12.reuse, 0x1, RZ ?trans2;
@P2 IADD3 R6, PT, PT, R12, RZ, RZ ?WAIT2_END_GROUP;
IADD3 R13, PT, PT, R14.reuse, 0x1, RZ ?trans2;
@P1 IADD3 R13, PT, PT, R14, RZ, RZ ?trans1;
FSETP.GEU.AND P2, PT, R19, RZ, PT ?trans1;
FSETP.NEU.AND P1, PT, R22, RZ, PT ?trans1;
IADD3 R12, PT, PT, R6, 0x1, RZ ?trans2;
IADD3 R14, PT, PT, R13.reuse, 0x1, RZ ?trans2;
@P3 IADD3 R14, PT, PT, R13, RZ, RZ ?trans1;
FSETP.GEU.AND P3, PT, R22, RZ, PT ?trans1;
@P4 IADD3 R12, PT, PT, R6, RZ, RZ ?WAIT2_END_GROUP;
IADD3 R13, PT, PT, R14, 0x1, RZ ?trans2;
IADD3 R6, PT, PT, R12.reuse, 0x1, RZ ?trans2;
@P2 IADD3 R6, PT, PT, R12, RZ, RZ ?trans2;
@P1 IADD3 R13, PT, PT, R14, RZ, RZ ?trans1;
FSETP.NEU.AND P1, PT, R23.reuse, RZ, PT ?trans1;
FSETP.GEU.AND P2, PT, R23, RZ, PT ?trans1;
IADD3 R14, PT, PT, R6.reuse, 0x1, RZ ?trans2;
@P3 IADD3 R14, PT, PT, R6, RZ, RZ ?trans1;
ISETP.NE.S64.AND P3, PT, R16, RZ, PT ?WAIT3_END_GROUP;
IADD3 R12, PT, PT, R13, 0x1, RZ ?trans2;
IADD3 R6, PT, PT, R14, 0x1, RZ ?WAIT3_END_GROUP;
@P1 IADD3 R12, PT, PT, R13, RZ, RZ ?trans2;
@P2 IADD3 R6, PT, PT, R14, RZ, RZ ?WAIT4_END_GROUP;
@P3 BRA 0x1d0 ?trans5;
@!P0 BRA 0xa80 ?trans5;
ISETP.GE.U64.AND P1, PT, R20, 0x4, PT ?trans2;
MOV R17, RZ ?trans1;
LOP3.LUT R16, R7, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.S64.AND P0, PT, R16, RZ, PT ?WAIT6_END_GROUP;
@!P1 BRA 0x810 ?trans8;
LDCU.64 UR6, c[0x0][0x380] &wr=0x0 ?trans1;
IADD.64 R10, R2, R4 ?WAIT5_END_GROUP;
LEA R8, P1, R10, UR6, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R9, R10, UR7, R11, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E R10, desc[UR4][R8.64] &wr=0x2 ?trans4;
LDG.E R13, desc[UR4][R8.64+0x4] &wr=0x3 ?trans4;
LDG.E R14, desc[UR4][R8.64+0x8] &wr=0x4 ?trans4;
LDG.E R15, desc[UR4][R8.64+0xc] &rd=0x0 &wr=0x5 ?trans1;
IADD3 R11, PT, PT, R6, 0x1, RZ ?trans1;
IADD.64 R4, R4, 0x4 ?WAIT2_END_GROUP;
FSETP.NEU.AND P2, PT, R10.reuse, RZ, PT &req={2} ?trans1;
FSETP.GEU.AND P3, PT, R10, RZ, PT ?trans1;
IADD3 R10, PT, PT, R12, 0x1, RZ ?trans1;
FSETP.NEU.AND P1, PT, R13, RZ, PT &req={3} ?WAIT10_END_GROUP;
@P2 IADD3 R10, PT, PT, R12, RZ, RZ ?trans2;
@P3 IADD3 R11, PT, PT, R6, RZ, RZ ?trans1;
FSETP.GEU.AND P2, PT, R13, RZ, PT ?trans1;
FSETP.NEU.AND P3, PT, R14, RZ, PT &req={4} ?trans1;
IADD3 R6, PT, PT, R10.reuse, 0x1, RZ ?trans2;
@P1 IADD3 R6, PT, PT, R10, RZ, RZ ?trans1;
FSETP.GEU.AND P1, PT, R14, RZ, PT ?trans1;
IADD3 R8, PT, PT, R11, 0x1, RZ &req={0} ?trans2;
IADD3 R9, PT, PT, R6, 0x1, RZ ?WAIT5_END_GROUP;
@P2 IADD3 R8, PT, PT, R11, RZ, RZ ?trans2;
@P3 IADD3 R9, PT, PT, R6, RZ, RZ ?trans1;
FSETP.NEU.AND P2, PT, R15.reuse, RZ, PT &req={5} ?trans1;
FSETP.GEU.AND P3, PT, R15, RZ, PT ?trans1;
IADD3 R10, PT, PT, R8.reuse, 0x1, RZ ?trans2;
@P1 IADD3 R10, PT, PT, R8, RZ, RZ ?trans2;
IADD3 R12, PT, PT, R9, 0x1, RZ ?trans2;
IADD3 R6, PT, PT, R10, 0x1, RZ ?WAIT5_END_GROUP;
@P2 IADD3 R12, PT, PT, R9, RZ, RZ ?trans2;
@P3 IADD3 R6, PT, PT, R10, RZ, RZ ?WAIT7_END_GROUP;
@!P0 BRA 0xa80 ?trans5;
ISETP.NE.S64.AND P1, PT, R16, 0x1, PT ?trans2;
HFMA2 R9, -RZ, RZ, 0, 0 ?trans1;
LOP3.LUT R8, R7, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U64.AND P0, PT, R8, 0x1, PT ?WAIT6_END_GROUP;
@P1 LDC.64 R10, c[0x0][0x380] &wr=0x0 ?trans1;
@P1 IADD.64 R8, R2, R4 ?WAIT7_END_GROUP;
@!P0 LDC.64 R14, c[0x0][0x380] &wr=0x1 ?trans1;
@P1 LEA R10, P2, R8, R10, 0x2 &req={0} ?WAIT4_END_GROUP;
@P1 LEA.HI.X R11, R8, R11, R9, 0x2, P2 ?WAIT5_END_GROUP;
@P1 LDG.E R9, desc[UR4][R10.64] &wr=0x2 ?trans1;
@P1 IADD.64 R4, R4, 0x2 ?WAIT3_END_GROUP;
@P1 LDG.E R8, desc[UR4][R10.64+0x4] &wr=0x3 ?trans1;
@!P0 IADD.64 R2, R2, R4 ?WAIT5_END_GROUP;
@!P0 LEA R4, P2, R2, R14, 0x2 &req={1} ?WAIT4_END_GROUP;
@!P0 LEA.HI.X R5, R2, R15, R3, 0x2, P2 ?WAIT5_END_GROUP;
@!P0 LDG.E R4, desc[UR4][R4.64] &rd=0x0 &wr=0x4 ?trans1;
@P1 IADD3 R2, PT, PT, R12, 0x1, RZ ?trans2;
@P1 IADD3 R3, PT, PT, R6, 0x1, RZ ?trans1;
FSETP.NEU.AND P2, PT, R9.reuse, RZ, P1 &req={2} ?trans1;
FSETP.GEU.AND P3, PT, R9, RZ, P1 ?WAIT12_END_GROUP;
@P2 IADD3 R2, PT, PT, R12, RZ, RZ ?trans2;
@P3 IADD3 R3, PT, PT, R6, RZ, RZ ?trans1;
FSETP.NEU.AND P2, PT, R8.reuse, RZ, P1 &req={3} ?trans1;
FSETP.GEU.AND P3, PT, R8, RZ, P1 ?trans1;
@P1 IADD3 R5, PT, PT, R2, 0x1, RZ &req={0} ?trans2;
@P1 IADD3 R8, PT, PT, R3, 0x1, RZ ?WAIT9_END_GROUP;
@P2 IADD3 R5, PT, PT, R2, RZ, RZ ?trans2;
@P3 IADD3 R8, PT, PT, R3, RZ, RZ ?trans1;
FSETP.NEU.AND P2, PT, R4.reuse, RZ, !P0 &req={4} ?trans1;
FSETP.GEU.AND P3, PT, R4, RZ, !P0 ?trans1;
@P1 MOV R12, R5 ?trans2;
@P1 MOV R6, R8 ?WAIT3_END_GROUP;
@!P0 IADD3 R2, PT, PT, R12, 0x1, RZ ?trans2;
@!P0 IADD3 R3, PT, PT, R6, 0x1, RZ ?WAIT4_END_GROUP;
@P2 IADD3 R2, PT, PT, R12, RZ, RZ ?trans2;
@P3 IADD3 R3, PT, PT, R6, RZ, RZ ?WAIT3_END_GROUP;
@!P0 MOV R12, R2 ?trans2;
@!P0 MOV R6, R3 ?WAIT7_END_GROUP;
IADD3 R3, PT, PT, R12, R12, RZ ?WAIT7_END_GROUP;
ISETP.GE.U32.AND P0, PT, R3, R6, PT ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
S2R R3, SR_LANEID &wr=0x0 ?trans1;
VOTEU.ANY UR6, UPT, PT ?trans2;
FLO.U32 R6, UR6 &wr=0x0 ?trans1;
POPC R9, UR6 &wr=0x1 ?trans1;
ISETP.EQ.U32.AND P0, PT, R6, R3, PT &req={0} ?trans2;
LDC.64 R2, c[0x4][RZ] &wr=0x1 ?trans11;
@P0 ATOMG.E.ADD.STRONG.GPU PT, R3, desc[UR4][R2.64], R9 &req={1} &wr=0x2 ?trans1;
S2R R4, SR_LTMASK &wr=0x0 ?trans2;
LOP3.LUT R8, R4, UR6, RZ, 0xc0, !PT &req={0} ?WAIT6_END_GROUP;
POPC R8, R8 &wr=0x0 ?trans1;
SHFL.IDX PT, R5, R3, R6, 0x1f &req={2} &wr=0x0 ?trans2;
IADD3 R5, PT, PT, R5, R8, RZ &req={0} ?WAIT4_END_GROUP;
IADD3 R4, PT, PT, R5, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R4, R7, PT ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
ISETP.NE.AND P0, PT, R0, RZ, PT ?trans1;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT4_END_GROUP;
SEL R5, R0, 0xfffffffe, P0 ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R5 ?trans1;
EXIT ?trans5;
BRA 0xc00;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: get_negative_columns(float*, int*, int)
_Z20get_negative_columnsPfPii:
s_clause 0x2
s_load_b32 s5, s[0:1], 0x24
s_load_b32 s4, s[0:1], 0x10
s_load_b128 s[0:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s5, s5, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[1:2], null, s15, s5, v[0:1]
v_mov_b32_e32 v2, 0
v_mov_b32_e32 v0, 0
s_ashr_i32 s5, s4, 31
s_cmp_eq_u64 s[4:5], 0
s_cbranch_scc1 .LBB0_10
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_mul_lo_u32 v2, v1, s4
v_mov_b32_e32 v4, 0
v_mov_b32_e32 v0, 0
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[2:3]
v_add_co_u32 v2, vcc_lo, s0, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
s_mov_b64 s[0:1], s[4:5]
.LBB0_2:
global_load_b32 v5, v[2:3], off
s_mov_b32 s5, exec_lo
s_waitcnt vmcnt(0)
v_cmpx_neq_f32_e32 0, v5
s_xor_b32 s5, exec_lo, s5
s_cbranch_execz .LBB0_6
s_mov_b32 s6, exec_lo
v_cmpx_gt_f32_e32 0, v5
v_add_nc_u32_e32 v0, 1, v0
s_or_b32 exec_lo, exec_lo, s6
.LBB0_6:
s_and_not1_saveexec_b32 s5, s5
v_add_nc_u32_e32 v4, 1, v4
s_or_b32 exec_lo, exec_lo, s5
v_add_co_u32 v2, vcc_lo, v2, 4
s_add_u32 s0, s0, -1
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
s_addc_u32 s1, s1, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u64 s[0:1], 0
s_cbranch_scc0 .LBB0_2
v_lshlrev_b32_e32 v2, 1, v4
.LBB0_10:
s_mov_b32 s0, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_ge_i32_e64 v2, v0
s_cbranch_execz .LBB0_15
s_mov_b32 s1, exec_lo
s_mov_b32 s0, exec_lo
v_mbcnt_lo_u32_b32 v0, s1, 0
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB0_13
s_bcnt1_i32_b32 s1, s1
s_delay_alu instid0(SALU_CYCLE_1)
v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, s1
s_getpc_b64 s[6:7]
s_add_u32 s6, s6, d_next_idx@rel32@lo+4
s_addc_u32 s7, s7, d_next_idx@rel32@hi+12
global_atomic_add_u32 v2, v2, v3, s[6:7] glc
.LBB0_13:
s_or_b32 exec_lo, exec_lo, s0
s_waitcnt vmcnt(0)
v_readfirstlane_b32 s0, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v2, s0, v0
v_add_nc_u32_e32 v0, 1, v2
s_delay_alu instid0(VALU_DEP_1)
v_cmp_gt_i32_e32 vcc_lo, s4, v0
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_15
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[2:3]
v_add_co_u32 v2, vcc_lo, s2, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
v_cmp_ne_u32_e32 vcc_lo, 0, v1
v_cndmask_b32_e32 v0, -2, v1, vcc_lo
global_store_b32 v[2:3], v0, off
.LBB0_15:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| get_negative_columns | 5,039 | 1,498 | stackv2-00000-of-00015 |
// Demangled: _cuda_vdSqr(int, double*, double*, int)
Function : _Z11_cuda_vdSqriPdS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R7, c[0x0][0x360] &wr=0x1 ?trans8;
LDC R6, c[0x0][0x398] &wr=0x3 ?trans1;
IMAD R0, R7, UR4, R0 &req={1} ?trans1;
ISETP.GE.AND P0, PT, R6, 0x1, PT &req={3} ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R0, UR5, !P0 &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU UR4, c[0x0][0x370] &wr=0x0 ?trans1;
LOP3.LUT R20, R6.reuse, 0xf, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R21, R6.reuse, 0x7, RZ, 0xc0, !PT ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans1;
LOP3.LUT R8, R6, 0x7ffffff0, RZ, 0xc0, !PT ?trans2;
IADD3 R2, PT, PT, R20, -0x1, RZ ?trans2;
IADD3 R3, PT, PT, R21, -0x1, RZ ?trans2;
LOP3.LUT R6, R6, 0x3, RZ, 0xc0, !PT ?WAIT2_END_GROUP;
IADD3 R8, PT, PT, -R8, RZ, RZ ?trans1;
ISETP.GE.U32.AND P0, PT, R2, 0x7, PT ?trans1;
ISETP.GE.U32.AND P1, PT, R3, 0x3, PT ?trans1;
IMAD R7, R7, UR4, RZ &req={0} ?WAIT12_END_GROUP;
LDC R9, c[0x0][0x398] &req={0} &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x380] &req={2} &wr=0x2 ?trans1;
ISETP.NE.AND P2, PT, R20, RZ, PT ?WAIT6_END_GROUP;
LDC.64 R2, c[0x0][0x388] &req={3} &wr=0x3 ?trans8;
LDC.64 R4, c[0x0][0x390] &req={4,1} &wr=0x4 ?trans1;
ISETP.GE.U32.AND P4, PT, R9, 0x10, PT &req={0} ?trans1;
IMAD.WIDE R2, R0, 0x8, R2 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R0, 0x8, R4 &req={4} ?trans1;
IADD3 R0, PT, PT, R7, R0, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P3, PT, R0, UR4, PT &req={2} ?trans2;
@!P4 BRA 0x820 ?trans11;
MOV R9, R8 ?WAIT7_END_GROUP;
LDG.E.64 R10, desc[UR6][R2.64] &req={1} &wr=0x2 ?trans2;
DMUL R10, R10, R10 &req={2} &wr=0x0 ?trans2;
STG.E.64 desc[UR6][R4.64], R10 &req={0} &rd=0x0 ?trans4;
LDG.E.64 R12, desc[UR6][R2.64] &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R12, R12, R12 &req={2} &wr=0x1 ?trans2;
STG.E.64 desc[UR6][R4.64], R12 &req={1} &rd=0x1 ?trans4;
LDG.E.64 R14, desc[UR6][R2.64] &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R14, R14 &req={2} &wr=0x2 ?trans2;
STG.E.64 desc[UR6][R4.64], R14 &req={2} &rd=0x2 ?trans4;
LDG.E.64 R16, desc[UR6][R2.64] &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R16, R16, R16 &req={3} &wr=0x3 ?trans2;
STG.E.64 desc[UR6][R4.64], R16 &req={3} &rd=0x3 ?trans4;
LDG.E.64 R18, desc[UR6][R2.64] &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R18, R18, R18 &req={4} &wr=0x4 ?trans2;
STG.E.64 desc[UR6][R4.64], R18 &req={4} &rd=0x4 ?trans4;
LDG.E.64 R10, desc[UR6][R2.64] &req={0} &wr=0x5 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R10, R10 &req={5} &wr=0x0 ?trans2;
STG.E.64 desc[UR6][R4.64], R10 &req={0} &rd=0x0 ?trans4;
LDG.E.64 R12, desc[UR6][R2.64] &req={1} &wr=0x5 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R12, R12, R12 &req={5} &wr=0x1 ?trans2;
STG.E.64 desc[UR6][R4.64], R12 &req={1} &rd=0x1 ?trans4;
LDG.E.64 R14, desc[UR6][R2.64] &req={2} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R14, R14 &req={2} &wr=0x2 ?trans2;
STG.E.64 desc[UR6][R4.64], R14 &req={2} &rd=0x2 ?trans4;
LDG.E.64 R16, desc[UR6][R2.64] &req={3} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R16, R16, R16 &req={3} &wr=0x3 ?trans2;
STG.E.64 desc[UR6][R4.64], R16 &req={3} &rd=0x3 ?trans4;
LDG.E.64 R18, desc[UR6][R2.64] &req={4} &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R18, R18, R18 &req={4} &wr=0x4 ?trans2;
STG.E.64 desc[UR6][R4.64], R18 &req={4} &rd=0x4 ?trans4;
LDG.E.64 R10, desc[UR6][R2.64] &req={0} &wr=0x5 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R10, R10 &req={5} &wr=0x0 ?trans2;
STG.E.64 desc[UR6][R4.64], R10 &req={0} &rd=0x0 ?trans4;
LDG.E.64 R12, desc[UR6][R2.64] &req={1} &wr=0x5 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R12, R12, R12 &req={5} &wr=0x1 ?trans2;
STG.E.64 desc[UR6][R4.64], R12 &req={1} &rd=0x1 ?trans4;
LDG.E.64 R14, desc[UR6][R2.64] &req={2} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R14, R14 &req={2} &wr=0x2 ?trans2;
STG.E.64 desc[UR6][R4.64], R14 &req={2} &rd=0x1 ?trans4;
LDG.E.64 R16, desc[UR6][R2.64] &req={3} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R16, R16, R16 &req={2} &wr=0x2 ?trans2;
STG.E.64 desc[UR6][R4.64], R16 &req={2} &rd=0x1 ?trans4;
LDG.E.64 R18, desc[UR6][R2.64] &req={4} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R18, R18, R18 &req={2} &wr=0x2 ?trans2;
STG.E.64 desc[UR6][R4.64], R18 &req={2} &rd=0x1 ?trans4;
LDG.E.64 R10, desc[UR6][R2.64] &req={0} &wr=0x2 ?trans1;
IADD3 R9, PT, PT, R9, 0x10, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P4, PT, R9, RZ, PT ?WAIT15_END_GROUP;
NOP ?WAIT7_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R10, R10 &req={2} &wr=0x0 ?trans2;
STG.E.64 desc[UR6][R4.64], R10 &req={0} &rd=0x1 ?trans1;
@P4 BRA 0x220 ?trans5;
@!P2 BRA 0xd80 ?trans5;
ISETP.NE.AND P2, PT, R21, RZ, PT ?trans1;
@!P0 BRA 0xb20 ?WAIT12_END_GROUP;
LDG.E.64 R10, desc[UR6][R2.64] &req={1} &wr=0x2 ?trans2;
DMUL R10, R10, R10 &req={2} &wr=0x0 ?trans2;
STG.E.64 desc[UR6][R4.64], R10 &req={0} &rd=0x0 ?trans4;
LDG.E.64 R12, desc[UR6][R2.64] &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R12, R12, R12 &req={2} &wr=0x1 ?trans2;
STG.E.64 desc[UR6][R4.64], R12 &req={1} &rd=0x1 ?trans4;
LDG.E.64 R14, desc[UR6][R2.64] &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R14, R14 &req={2} &wr=0x2 ?trans2;
STG.E.64 desc[UR6][R4.64], R14 &req={2} &rd=0x2 ?trans4;
LDG.E.64 R16, desc[UR6][R2.64] &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R16, R16, R16 &req={3} &wr=0x3 ?trans2;
STG.E.64 desc[UR6][R4.64], R16 &req={3} &rd=0x3 ?trans4;
LDG.E.64 R18, desc[UR6][R2.64] &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R18, R18, R18 &req={4} &wr=0x4 ?trans2;
STG.E.64 desc[UR6][R4.64], R18 &req={4} &rd=0x3 ?trans4;
LDG.E.64 R10, desc[UR6][R2.64] &req={0} &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R10, R10 &req={4} &wr=0x0 ?trans2;
STG.E.64 desc[UR6][R4.64], R10 &req={0} &rd=0x3 ?trans4;
LDG.E.64 R12, desc[UR6][R2.64] &req={1} &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R12, R12, R12 &req={4} &wr=0x0 ?trans2;
STG.E.64 desc[UR6][R4.64], R12 &req={0} &rd=0x3 ?trans4;
LDG.E.64 R14, desc[UR6][R2.64] &req={2} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R14, R14 &req={2} &wr=0x0 ?trans2;
STG.E.64 desc[UR6][R4.64], R14 &req={0} &rd=0x3 ?trans2;
@!P2 BRA 0xd80 ?trans5;
ISETP.NE.AND P2, PT, R6, RZ, PT ?trans1;
@!P1 BRA 0xca0 ?WAIT12_END_GROUP;
LDG.E.64 R10, desc[UR6][R2.64] &req={3,1} &wr=0x2 ?trans2;
DMUL R10, R10, R10 &req={2} &wr=0x0 ?trans2;
STG.E.64 desc[UR6][R4.64], R10 &req={0} &rd=0x0 ?trans4;
LDG.E.64 R12, desc[UR6][R2.64] &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R12, R12, R12 &req={2} &wr=0x1 ?trans2;
STG.E.64 desc[UR6][R4.64], R12 &req={1} &rd=0x0 ?trans4;
LDG.E.64 R14, desc[UR6][R2.64] &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R14, R14 &req={2} &wr=0x1 ?trans2;
STG.E.64 desc[UR6][R4.64], R14 &req={1} &rd=0x0 ?trans4;
LDG.E.64 R16, desc[UR6][R2.64] &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R16, R16, R16 &req={2} &wr=0x1 ?trans2;
STG.E.64 desc[UR6][R4.64], R16 &req={1} &rd=0x0 ?trans2;
@!P2 BRA 0xd80 ?trans5;
LDG.E.64 R10, desc[UR6][R2.64] &req={3,1,0} &wr=0x2 ?trans1;
ISETP.NE.AND P2, PT, R6, 0x1, PT ?trans1;
DMUL R10, R10, R10 &req={2} &wr=0x0 ?trans2;
STG.E.64 desc[UR6][R4.64], R10 &req={0} &rd=0x2 ?trans10;
@!P2 BRA 0xd80 ?trans5;
LDG.E.64 R10, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans1;
ISETP.NE.AND P2, PT, R6, 0x2, PT ?trans1;
DMUL R10, R10, R10 &req={2} &wr=0x0 ?trans2;
STG.E.64 desc[UR6][R4.64], R10 &req={0} &rd=0x4 ?trans10;
@!P2 BRA 0xd80 ?trans5;
LDG.E.64 R2, desc[UR6][R2.64] &wr=0x2 ?trans2;
DMUL R10, R2, R2 &req={4,2} &wr=0x0 ?trans2;
STG.E.64 desc[UR6][R4.64], R10 &req={0} &rd=0x0 ?trans2;
@!P3 BRA 0x160 ?trans5;
EXIT &req={1} ?trans5;
BRA 0xda0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _cuda_vdSqr(int, double*, double*, int)
_Z11_cuda_vdSqriPdS_i:
s_clause 0x1
s_load_b32 s5, s[0:1], 0x2c
s_load_b32 s4, s[0:1], 0x0
s_add_u32 s2, s0, 32
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s7, s5, 0xffff
s_mov_b32 s5, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s7, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s4, v1
s_cbranch_execz .LBB0_6
s_load_b32 s5, s[0:1], 0x18
s_load_b32 s8, s[2:3], 0x0
s_load_b128 s[0:3], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_cmp_gt_i32 s5, 0
s_mul_i32 s7, s8, s7
s_cselect_b32 s6, -1, 0
s_mov_b32 s8, 0
.LBB0_2:
s_and_not1_b32 vcc_lo, exec_lo, s6
s_cbranch_vccnz .LBB0_5
v_ashrrev_i32_e32 v2, 31, v1
s_mov_b32 s9, s5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[4:5], 3, v[1:2]
v_add_co_u32 v2, vcc_lo, s0, v4
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v5, vcc_lo
v_add_co_u32 v4, vcc_lo, s2, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
.LBB0_4:
global_load_b64 v[6:7], v[2:3], off
s_add_i32 s9, s9, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s9, 0
s_waitcnt vmcnt(0)
v_mul_f64 v[6:7], v[6:7], v[6:7]
global_store_b64 v[4:5], v[6:7], off
s_cbranch_scc0 .LBB0_4
.LBB0_5:
v_add_nc_u32_e32 v1, s7, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_le_i32_e32 vcc_lo, s4, v1
s_or_b32 s8, vcc_lo, s8
s_and_not1_b32 exec_lo, exec_lo, s8
s_cbranch_execnz .LBB0_2
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _cuda_vdSqr | 4,961 | 835 | stackv2-00000-of-00015 |
// Demangled: bounceback_kernel_v4_shared(int, float const*, float*, int const*)
Function : _Z27bounceback_kernel_v4_sharediPKfPfPKi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
LDCU UR8, c[0x0][0x380] &wr=0x3 ?trans6;
LDC R5, c[0x0][0x360] &wr=0x1 ?trans8;
LDC.64 R2, c[0x0][0x388] &wr=0x4 ?trans1;
IMAD R5, R5, UR4, R0 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R5, 0x4, R2 &req={4} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
ISETP.GE.AND P0, PT, R5, UR8, PT &req={3} ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?WAIT6_END_GROUP;
LEA R7, R0, UR4, 0x2 ?WAIT5_END_GROUP;
STS [R7], R2 &req={2} &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 EXIT &req={0} ?trans5;
LDCU.64 UR4, c[0x0][0x398] &wr=0x0 ?trans1;
SHF.R.S32.HI R0, RZ, 0x1f, R5 ?trans1;
IMAD.SHL.U32 R2, R5, 0x4, RZ &req={1} ?WAIT3_END_GROUP;
SHF.L.U64.HI R3, R5, 0x2, R0 ?WAIT5_END_GROUP;
IADD.64 R4, R2, UR4 &req={0} ?WAIT7_END_GROUP;
LDG.E R4, desc[UR6][R4.64] &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R4, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
LDS R7, [R7] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x390] &wr=0x1 ?trans2;
IADD.64 R2, R2, UR4 &req={1} ?WAIT6_END_GROUP;
STG.E desc[UR6][R2.64], R7 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x1f0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: bounceback_kernel_v4_shared(int, float const*, float*, int const*)
_Z27bounceback_kernel_v4_sharediPKfPfPKi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b128 s[4:7], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[3:4], null, s15, s2, v[0:1]
s_load_b32 s2, s[0:1], 0x0
v_lshl_add_u32 v0, v0, 2, 0
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[3:4]
v_add_co_u32 v4, vcc_lo, s4, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v2, vcc_lo
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, s2, v3
global_load_b32 v4, v[4:5], off
s_waitcnt vmcnt(0)
ds_store_b32 v0, v4
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_saveexec_b32 s2, vcc_lo
s_cbranch_execz .LBB0_3
s_load_b64 s[0:1], s[0:1], 0x18
s_waitcnt lgkmcnt(0)
v_add_co_u32 v3, vcc_lo, s0, v1
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v2, vcc_lo
global_load_b32 v3, v[3:4], off
s_waitcnt vmcnt(0)
v_cmp_ne_u32_e32 vcc_lo, 0, v3
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_3
ds_load_b32 v3, v0
v_add_co_u32 v0, vcc_lo, s6, v1
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v2, vcc_lo
s_waitcnt lgkmcnt(0)
global_store_b32 v[0:1], v3, off
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| bounceback_kernel_v4_shared | 807 | 703 | stackv2-00000-of-00015 |
// Demangled: double_elements(int*, int)
Function : _Z15double_elementsPii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x388] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x370] &wr=0x3 ?trans1;
IMAD R5, R0, UR4, R5 &req={1} ?WAIT2_END_GROUP;
IMAD R0, R0, UR5, RZ &req={3} ?WAIT3_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR6, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
I2F.U32.RP R8, R0 &wr=0x0 ?trans1;
IADD3 R4, PT, PT, R0.reuse, R5, RZ ?trans2;
IADD3 R9, PT, PT, RZ, -R0, RZ ?trans1;
ISETP.NE.U32.AND P2, PT, R0, RZ, PT ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
BSSY.RECONVERGENT B0, 0x340 ?trans1;
ISETP.GE.AND P0, PT, R4.reuse, UR6, PT ?trans1;
VIMNMX.S32 R7, R4, UR6, !PT ?WAIT4_END_GROUP;
SEL R6, RZ, 0x1, P0 ?trans1;
MUFU.RCP R8, R8 &req={0} &wr=0x0 ?trans4;
IADD3 R7, PT, PT, R7, -R4, -R6 ?trans2;
IADD3 R2, PT, PT, R8, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R3, R2 &rd=0x0 &wr=0x2 ?trans2;
HFMA2 R2, -RZ, RZ, 0, 0 &req={0} ?trans2;
IMAD R9, R9, R3, RZ &req={2} ?WAIT4_END_GROUP;
IMAD.HI.U32 R8, R3, R9, R2 ?WAIT6_END_GROUP;
IMAD.HI.U32 R9, R8, R7, RZ ?WAIT5_END_GROUP;
IADD3 R2, PT, PT, -R9, RZ, RZ ?WAIT5_END_GROUP;
IMAD R7, R0, R2, R7 ?trans2;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans3;
ISETP.GE.U32.AND P0, PT, R7, R0, PT ?WAIT13_END_GROUP;
@P0 IADD3 R7, PT, PT, -R0, R7, RZ ?trans2;
@P0 IADD3 R9, PT, PT, R9, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R7, R0, PT ?WAIT13_END_GROUP;
@P1 IADD3 R9, PT, PT, R9, 0x1, RZ ?trans2;
@!P2 LOP3.LUT R9, RZ, R0, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R6, PT, PT, R6, R9, RZ ?WAIT4_END_GROUP;
IADD3 R4, PT, PT, R6.reuse, 0x1, RZ ?trans1;
ISETP.GE.U32.AND P1, PT, R6, 0x3, PT ?WAIT3_END_GROUP;
LOP3.LUT P0, R4, R4, 0x3, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x330 &req={1,0} ?trans5;
LDC.64 R8, c[0x0][0x380] &wr=0x0 ?trans1;
IADD3 R4, PT, PT, -R4, RZ, RZ ?WAIT7_END_GROUP;
IMAD.WIDE R6, R5, 0x4, R8 &req={1,0} ?WAIT5_END_GROUP;
LDG.E R10, desc[UR4][R6.64] &wr=0x2 ?trans1;
IADD3 R4, PT, PT, R4, 0x1, RZ ?trans2;
IADD3 R5, PT, PT, R0, R5, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R4, RZ, PT ?trans1;
IADD3 R11, PT, PT, R10, R10, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R11 &rd=0x1 ?trans7;
@P0 BRA 0x2b0 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
@!P1 EXIT ?trans5;
IMAD.WIDE R12, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R4, desc[UR4][R12.64] &wr=0x2 ?trans1;
IMAD.WIDE R6, R0, 0x4, R12 &req={1} ?trans1;
IADD3 R15, PT, PT, R4, R4, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R12.64], R15 &rd=0x0 ?trans4;
LDG.E R4, desc[UR4][R6.64] &wr=0x2 ?trans1;
IMAD.WIDE R8, R0, 0x4, R6 ?trans1;
IADD3 R17, PT, PT, R4, R4, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R17 &rd=0x0 ?trans4;
LDG.E R4, desc[UR4][R8.64] &wr=0x2 ?trans1;
IMAD.WIDE R10, R0, 0x4, R8 ?trans1;
IADD3 R19, PT, PT, R4, R4, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R8.64], R19 &rd=0x0 ?trans4;
LDG.E R4, desc[UR4][R10.64] &wr=0x2 ?trans1;
IADD3 R5, PT, PT, R0, R5, R0 ?WAIT4_END_GROUP;
IADD3 R5, PT, PT, R0, R5, R0 ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR6, PT ?trans1;
IADD3 R21, PT, PT, R4, R4, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R10.64], R21 &rd=0x0 ?trans7;
@!P0 BRA 0x350 ?trans5;
EXIT ?trans5;
BRA 0x4a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: double_elements(int*, int)
_Z15double_elementsPii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x1c
s_load_b32 s6, s[0:1], 0x8
s_add_u32 s2, s0, 16
s_addc_u32 s3, s1, 0
s_mov_b32 s5, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
v_cmpx_gt_i32_e64 s6, v1
s_cbranch_execz .LBB0_3
s_load_b32 s2, s[2:3], 0x0
s_load_b64 s[0:1], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
s_waitcnt lgkmcnt(0)
s_mul_i32 s2, s2, s4
v_add_co_u32 v2, vcc_lo, s0, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
s_ashr_i32 s3, s2, 31
s_mov_b32 s1, 0
s_lshl_b64 s[4:5], s[2:3], 2
.LBB0_2:
global_load_b32 v0, v[2:3], off
v_add_nc_u32_e32 v1, s2, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmp_le_i32_e32 vcc_lo, s6, v1
s_or_b32 s1, vcc_lo, s1
s_waitcnt vmcnt(0)
v_lshlrev_b32_e32 v0, 1, v0
global_store_b32 v[2:3], v0, off
v_add_co_u32 v2, s0, v2, s4
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v3, s0, s5, v3, s0
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execnz .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| double_elements | 1,925 | 716 | stackv2-00000-of-00015 |
// Demangled: Transpose_ker(float*, float*, int)
Function : _Z13Transpose_kerPfS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.Y &wr=0x1 ?trans7;
LDC R0, c[0x0][0x364] &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x390] &wr=0x2 ?trans1;
S2R R2, SR_TID.X &wr=0x3 ?trans6;
S2UR UR4, SR_CTAID.Y &wr=0x1 ?trans8;
S2UR UR5, SR_CTAID.X &wr=0x3 ?trans8;
LDC R7, c[0x0][0x360] &wr=0x3 ?trans1;
IMAD R0, R0, UR4, R3 &req={1} ?WAIT2_END_GROUP;
IMAD R7, R7, UR5, R2 &req={3} ?WAIT5_END_GROUP;
VIMNMX.S32 R2, R0, R7, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R2, UR6, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD R5, R7, UR6, R0 ?WAIT4_END_GROUP;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?trans2;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans4;
LDG.E R3, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
IMAD R7, R0, UR6, R7 ?WAIT4_END_GROUP;
IMAD.WIDE R4, R7, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R3 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x170;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: Transpose_ker(float*, float*, int)
_Z13Transpose_kerPfS_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x24
s_load_b32 s2, s[0:1], 0x10
v_bfe_u32 v2, v0, 10, 10
v_and_b32_e32 v3, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s4, s3, 16
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[0:1], null, s15, s4, v[2:3]
v_mad_u64_u32 v[1:2], null, s14, s3, v[3:4]
s_mov_b32 s3, exec_lo
v_max_i32_e32 v2, v0, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s2, v2
s_cbranch_execz .LBB0_2
s_load_b128 s[4:7], s[0:1], 0x0
v_mad_u64_u32 v[2:3], null, v1, s2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
global_load_b32 v4, v[2:3], off
v_mad_u64_u32 v[2:3], null, v0, s2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[0:1], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
s_waitcnt vmcnt(0)
global_store_b32 v[0:1], v4, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| Transpose_ker | 613 | 778 | stackv2-00000-of-00015 |
// Demangled: fill_float3(int, float3, float3*)
Function : _Z11fill_float3i6float3PS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x370] &wr=0x3 ?trans1;
IMAD R3, R0, UR4, R3 &req={1} ?WAIT2_END_GROUP;
IMAD R0, R0, UR5, RZ &req={3} ?WAIT3_END_GROUP;
ISETP.GE.AND P0, PT, R3, UR6, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
I2F.U32.RP R8, R0 &wr=0x0 ?trans1;
IADD3 R2, PT, PT, R0.reuse, R3, RZ ?trans2;
IADD3 R9, PT, PT, RZ, -R0, RZ ?trans1;
ISETP.NE.U32.AND P2, PT, R0, RZ, PT ?trans1;
LDC R17, c[0x0][0x384] &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans1;
ISETP.GE.AND P0, PT, R2.reuse, UR6, PT ?trans1;
VIMNMX.S32 R7, R2, UR6, !PT ?trans1;
BSSY.RECONVERGENT B0, 0x390 ?trans3;
SEL R6, RZ, 0x1, P0 ?trans1;
MUFU.RCP R8, R8 &req={0} &wr=0x0 ?trans4;
IADD3 R7, PT, PT, R7, -R2, -R6 ?WAIT2_END_GROUP;
IADD3 R4, PT, PT, R8, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R5, R4 &rd=0x0 &wr=0x3 ?trans2;
HFMA2 R4, -RZ, RZ, 0, 0 &req={0} ?trans2;
IMAD R9, R9, R5, RZ &req={3} ?WAIT4_END_GROUP;
IMAD.HI.U32 R8, R5, R9, R4 ?trans2;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans4;
IMAD.HI.U32 R9, R8, R7, RZ ?WAIT5_END_GROUP;
IADD3 R2, PT, PT, -R9, RZ, RZ ?WAIT5_END_GROUP;
IMAD R7, R0, R2, R7 ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R7, R0, PT ?WAIT13_END_GROUP;
@P0 IADD3 R7, PT, PT, -R0, R7, RZ ?trans2;
@P0 IADD3 R9, PT, PT, R9, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R7, R0, PT ?WAIT13_END_GROUP;
@P1 IADD3 R9, PT, PT, R9, 0x1, RZ ?trans2;
@!P2 LOP3.LUT R9, RZ, R0, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R9, PT, PT, R6, R9, RZ ?trans2;
LDC.64 R6, c[0x0][0x388] &wr=0x3 ?trans2;
IADD3 R2, PT, PT, R9.reuse, 0x1, RZ ?trans1;
ISETP.GE.U32.AND P1, PT, R9, 0x3, PT ?WAIT3_END_GROUP;
LOP3.LUT P0, R2, R2, 0x3, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x380 &req={2,1,0} ?trans5;
LDC.64 R8, c[0x0][0x390] &wr=0x0 ?trans1;
IADD3 R2, PT, PT, -R2, RZ, RZ ?WAIT7_END_GROUP;
LDC R13, c[0x0][0x384] &wr=0x1 ?trans8;
LDC.64 R14, c[0x0][0x388] &wr=0x2 ?trans1;
IADD.64 R8, R8, 0x4 &req={0} ?WAIT8_END_GROUP;
IMAD.WIDE R10, R3, 0xc, R8 &req={0} ?trans1;
IADD3 R2, PT, PT, R2, 0x1, RZ ?trans2;
IADD3 R3, PT, PT, R0, R3, RZ ?trans2;
STG.E desc[UR4][R10.64+-0x4], R13 &req={1} &rd=0x0 ?trans1;
ISETP.NE.AND P0, PT, R2, RZ, PT ?WAIT3_END_GROUP;
STG.E desc[UR4][R10.64], R14 &req={2} &rd=0x0 ?trans4;
STG.E desc[UR4][R10.64+0x4], R15 &rd=0x0 ?trans6;
@P0 BRA 0x300 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
@!P1 EXIT ?trans5;
IMAD.WIDE R8, R3, 0xc, R4 &req={1} ?trans1;
IADD3 R3, PT, PT, R0, R3, R0 ?WAIT4_END_GROUP;
STG.E desc[UR4][R8.64], R17 &rd=0x1 ?trans1;
IMAD.WIDE R10, R0.reuse, 0xc, R8 &req={0} ?trans1;
IADD3 R3, PT, PT, R0.reuse, R3, R0 ?trans2;
STG.E desc[UR4][R8.64+0x4], R6 &req={3} &rd=0x1 ?trans1;
IMAD.WIDE R12, R0, 0xc, R10 ?WAIT3_END_GROUP;
STG.E desc[UR4][R8.64+0x8], R7 &rd=0x1 ?trans1;
ISETP.GE.AND P0, PT, R3, UR6, PT ?WAIT3_END_GROUP;
STG.E desc[UR4][R10.64], R17 &rd=0x1 ?trans1;
IMAD.WIDE R14, R0, 0xc, R12 ?WAIT3_END_GROUP;
STG.E desc[UR4][R10.64+0x4], R6 &rd=0x1 ?trans4;
STG.E desc[UR4][R10.64+0x8], R7 &rd=0x1 ?trans4;
STG.E desc[UR4][R12.64], R17 &rd=0x1 ?trans4;
STG.E desc[UR4][R12.64+0x4], R6 &rd=0x1 ?trans4;
STG.E desc[UR4][R12.64+0x8], R7 &rd=0x1 ?trans4;
STG.E desc[UR4][R14.64], R17 &rd=0x1 ?trans4;
STG.E desc[UR4][R14.64+0x4], R6 &rd=0x1 ?trans4;
STG.E desc[UR4][R14.64+0x8], R7 &rd=0x1 ?trans1;
@!P0 BRA 0x3a0 ?trans5;
EXIT ?trans5;
BRA 0x4f0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: fill_float3(int, HIP_vector_type<float, 3u>, HIP_vector_type<float, 3u>*)
_Z11fill_float3i15HIP_vector_typeIfLj3EEPS0_:
s_clause 0x1
s_load_b32 s8, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_mov_b32 s9, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s8, s8, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[3:4], null, s15, s8, v[0:1]
v_cmpx_gt_i32_e64 s4, v3
s_cbranch_execz .LBB2_3
s_load_b64 s[0:1], s[0:1], 0x10
s_load_b32 s2, s[2:3], 0x0
v_dual_mov_b32 v0, s5 :: v_dual_mov_b32 v1, s6
v_mov_b32_e32 v2, s7
s_mov_b32 s5, 0
s_waitcnt lgkmcnt(0)
v_mad_i64_i32 v[4:5], null, v3, 12, s[0:1]
s_mul_i32 s1, s2, s8
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
s_mul_hi_i32 s2, s1, 12
s_mul_i32 s3, s1, 12
v_add_co_u32 v4, vcc_lo, v4, 4
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
.LBB2_2:
v_add_nc_u32_e32 v3, s1, v3
global_store_b96 v[4:5], v[0:2], off offset:-4
v_add_co_u32 v4, s0, v4, s3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_add_co_ci_u32_e64 v5, s0, s2, v5, s0
v_cmp_le_i32_e32 vcc_lo, s4, v3
s_or_b32 s5, vcc_lo, s5
s_and_not1_b32 exec_lo, exec_lo, s5
s_cbranch_execnz .LBB2_2
.LBB2_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| fill_float3 | 2,099 | 714 | stackv2-00000-of-00015 |
// Demangled: p_vec_dist(int, float3, float3*, float*)
Function : _Z10p_vec_disti6float3PS_Pf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x370] &wr=0x3 ?trans1;
IMAD R3, R0, UR4, R3 &req={1} ?WAIT2_END_GROUP;
IMAD R0, R0, UR5, RZ &req={3} ?WAIT3_END_GROUP;
ISETP.GE.AND P0, PT, R3, UR6, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
I2F.U32.RP R6, R0 &wr=0x0 ?trans1;
IADD3 R2, PT, PT, R0.reuse, R3, RZ ?trans2;
IADD3 R9, PT, PT, RZ, -R0, RZ ?trans1;
ISETP.NE.U32.AND P2, PT, R0, RZ, PT ?trans1;
LDCU UR10, c[0x0][0x384] &wr=0x1 ?trans1;
BSSY.RECONVERGENT B0, 0x450 ?trans1;
ISETP.GE.AND P0, PT, R2.reuse, UR6, PT ?trans1;
VIMNMX.S32 R7, R2, UR6, !PT ?trans1;
LDCU.64 UR12, c[0x0][0x388] &wr=0x2 ?trans3;
SEL R8, RZ, 0x1, P0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x3 ?trans1;
MUFU.RCP R6, R6 &req={0} &wr=0x0 ?trans3;
IADD3 R7, PT, PT, R7, -R2, -R8 ?trans1;
LDCU UR7, c[0x0][0x384] &wr=0x4 ?trans1;
LDCU.64 UR8, c[0x0][0x388] &wr=0x1 ?trans1;
IADD3 R4, PT, PT, R6, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R5, R4 &rd=0x0 &wr=0x5 ?trans2;
HFMA2 R4, -RZ, RZ, 0, 0 &req={0} ?trans2;
IMAD R9, R9, R5, RZ &req={5} ?WAIT4_END_GROUP;
IMAD.HI.U32 R6, R5, R9, R4 ?trans2;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans4;
IMAD.HI.U32 R9, R6, R7, RZ ?WAIT5_END_GROUP;
IADD3 R2, PT, PT, -R9, RZ, RZ ?WAIT5_END_GROUP;
IMAD R7, R0, R2, R7 ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R7, R0, PT ?WAIT13_END_GROUP;
@P0 IADD3 R7, PT, PT, -R0, R7, RZ ?trans2;
@P0 IADD3 R9, PT, PT, R9, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R7, R0, PT ?trans2;
LDC.64 R6, c[0x0][0x398] &wr=0x0 ?trans11;
@P1 IADD3 R9, PT, PT, R9, 0x1, RZ ?WAIT2_END_GROUP;
@!P2 LOP3.LUT R9, RZ, R0, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R8, PT, PT, R8, R9, RZ ?WAIT4_END_GROUP;
IADD3 R2, PT, PT, R8.reuse, 0x1, RZ ?trans1;
ISETP.GE.U32.AND P1, PT, R8, 0x3, PT ?WAIT3_END_GROUP;
LOP3.LUT P0, R2, R2, 0x3, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x440 &req={4,3,2,1} ?trans5;
LDC.64 R10, c[0x0][0x390] &wr=0x1 ?trans1;
IADD3 R2, PT, PT, -R2, RZ, RZ ?WAIT7_END_GROUP;
LDC.64 R8, c[0x0][0x398] &wr=0x2 ?trans1;
IADD.64 R10, R10, 0x4 &req={1} ?WAIT8_END_GROUP;
IMAD.WIDE R14, R3, 0xc, R10 ?WAIT5_END_GROUP;
LDG.E R12, desc[UR4][R14.64+-0x4] &req={1} &wr=0x3 ?trans2;
FADD R16, -R12, UR7 &req={3} ?trans1;
IMAD.WIDE R12, R3, 0x4, R8 &req={2} ?WAIT4_END_GROUP;
FMUL R17, R16, R16 ?WAIT5_END_GROUP;
STG.E desc[UR4][R12.64], R17 &rd=0x1 ?trans4;
LDG.E R16, desc[UR4][R14.64] &wr=0x2 ?trans2;
FADD R16, -R16, UR8 &req={2} ?WAIT4_END_GROUP;
FFMA R19, R16, R16, R17 ?WAIT5_END_GROUP;
STG.E desc[UR4][R12.64], R19 &rd=0x1 ?trans4;
LDG.E R16, desc[UR4][R14.64+0x4] &wr=0x2 ?trans1;
IADD3 R2, PT, PT, R2, 0x1, RZ ?trans2;
IADD3 R3, PT, PT, R0, R3, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R2, RZ, PT ?trans1;
FADD R16, -R16, UR9 &req={2} ?WAIT4_END_GROUP;
FFMA R21, R16, R16, R19 ?WAIT5_END_GROUP;
STG.E desc[UR4][R12.64], R21 &rd=0x1 ?trans3;
@P0 BRA 0x320 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
@!P1 EXIT ?trans5;
IMAD.WIDE R8, R3, 0xc, R4 &req={2,0} ?WAIT5_END_GROUP;
LDG.E R2, desc[UR4][R8.64] &wr=0x2 ?trans1;
IMAD.WIDE R14, R3, 0x4, R6 ?WAIT4_END_GROUP;
FADD R2, -R2, UR10 &req={2} ?WAIT4_END_GROUP;
FMUL R13, R2, R2 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R14.64], R13 &rd=0x0 ?trans4;
LDG.E R2, desc[UR4][R8.64+0x4] &wr=0x2 ?trans2;
FADD R2, -R2, UR12 &req={2} ?WAIT4_END_GROUP;
FFMA R17, R2, R2, R13 ?WAIT5_END_GROUP;
STG.E desc[UR4][R14.64], R17 &rd=0x1 ?trans4;
LDG.E R2, desc[UR4][R8.64+0x8] &wr=0x2 ?trans1;
IMAD.WIDE R10, R0, 0xc, R8 ?WAIT4_END_GROUP;
FADD R2, -R2, UR13 &req={2} ?WAIT4_END_GROUP;
FFMA R19, R2, R2, R17 ?WAIT5_END_GROUP;
STG.E desc[UR4][R14.64], R19 &rd=0x2 ?trans4;
LDG.E R2, desc[UR4][R10.64] &wr=0x3 ?trans1;
IMAD.WIDE R12, R0, 0x4, R14 &req={0} ?WAIT4_END_GROUP;
FADD R2, -R2, UR10 &req={3} ?WAIT4_END_GROUP;
FMUL R21, R2, R2 ?WAIT5_END_GROUP;
STG.E desc[UR4][R12.64], R21 &rd=0x0 ?trans4;
LDG.E R2, desc[UR4][R10.64+0x4] &wr=0x3 ?trans2;
FADD R2, -R2, UR12 &req={3} ?WAIT4_END_GROUP;
FFMA R17, R2, R2, R21 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R12.64], R17 &rd=0x1 ?trans4;
LDG.E R2, desc[UR4][R10.64+0x8] &wr=0x3 ?trans1;
IMAD.WIDE R8, R0, 0xc, R10 ?WAIT4_END_GROUP;
FADD R2, -R2, UR13 &req={3} ?WAIT4_END_GROUP;
FFMA R19, R2, R2, R17 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R12.64], R19 &rd=0x2 ?trans4;
LDG.E R2, desc[UR4][R8.64] &wr=0x3 ?trans1;
IMAD.WIDE R14, R0, 0x4, R12 ?WAIT4_END_GROUP;
FADD R2, -R2, UR10 &req={3} ?WAIT4_END_GROUP;
FMUL R21, R2, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R14.64], R21 &rd=0x0 ?trans4;
LDG.E R2, desc[UR4][R8.64+0x4] &wr=0x3 ?trans2;
FADD R2, -R2, UR12 &req={3} ?WAIT4_END_GROUP;
FFMA R17, R2, R2, R21 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R14.64], R17 ?trans4;
LDG.E R2, desc[UR4][R8.64+0x8] &wr=0x3 ?trans1;
IMAD.WIDE R10, R0, 0xc, R8 ?WAIT4_END_GROUP;
FADD R2, -R2, UR13 &req={3} ?WAIT4_END_GROUP;
FFMA R19, R2, R2, R17 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R14.64], R19 &rd=0x1 ?trans4;
LDG.E R2, desc[UR4][R10.64] &wr=0x2 ?trans1;
IMAD.WIDE R12, R0, 0x4, R14 ?WAIT4_END_GROUP;
FADD R2, -R2, UR10 &req={2} ?WAIT4_END_GROUP;
FMUL R21, R2, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R12.64], R21 &rd=0x2 ?trans4;
LDG.E R2, desc[UR4][R10.64+0x4] &wr=0x3 ?trans2;
FADD R2, -R2, UR12 &req={3} ?WAIT4_END_GROUP;
FFMA R9, R2, R2, R21 ?WAIT5_END_GROUP;
STG.E desc[UR4][R12.64], R9 &rd=0x2 ?trans4;
LDG.E R2, desc[UR4][R10.64+0x8] &wr=0x3 ?trans1;
IADD3 R3, PT, PT, R0, R3, R0 ?WAIT4_END_GROUP;
IADD3 R3, PT, PT, R0, R3, R0 ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R3, UR6, PT ?trans1;
FADD R2, -R2, UR13 &req={3} ?WAIT4_END_GROUP;
FFMA R15, R2, R2, R9 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R12.64], R15 &rd=0x2 ?trans3;
@!P0 BRA 0x460 ?trans5;
EXIT ?trans5;
BRA 0x830;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: p_vec_dist(int, HIP_vector_type<float, 3u>, HIP_vector_type<float, 3u>*, float*)
_Z10p_vec_disti15HIP_vector_typeIfLj3EEPS0_Pf:
s_clause 0x1
s_load_b32 s8, s[0:1], 0x2c
s_load_b128 s[4:7], s[0:1], 0x0
s_add_u32 s2, s0, 32
s_addc_u32 s3, s1, 0
s_mov_b32 s9, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s8, s8, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
v_cmpx_gt_i32_e64 s4, v1
s_cbranch_execz .LBB0_3
s_load_b128 s[12:15], s[0:1], 0x10
s_load_b32 s0, s[2:3], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
v_lshlrev_b64 v[5:6], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_mad_i64_i32 v[3:4], null, v1, 12, s[12:13]
s_mul_i32 s2, s0, s8
s_ashr_i32 s3, s2, 31
s_mul_hi_i32 s1, s2, 12
s_mul_i32 s10, s2, 12
s_lshl_b64 s[8:9], s[2:3], 2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, v3, 4
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v4, vcc_lo
v_add_co_u32 v4, vcc_lo, s14, v5
v_add_co_ci_u32_e32 v5, vcc_lo, s15, v6, vcc_lo
s_mov_b32 s3, 0
.LBB0_2:
global_load_b32 v0, v[2:3], off offset:-4
v_add_nc_u32_e32 v1, s2, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_cmp_le_i32_e32 vcc_lo, s4, v1
s_or_b32 s3, vcc_lo, s3
s_waitcnt vmcnt(0)
v_sub_f32_e32 v0, s5, v0
v_mul_f32_e32 v0, v0, v0
global_store_b32 v[4:5], v0, off
global_load_b32 v6, v[2:3], off
s_waitcnt vmcnt(0)
v_sub_f32_e32 v6, s6, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v0, v6, v6
global_store_b32 v[4:5], v0, off
global_load_b32 v6, v[2:3], off offset:4
v_add_co_u32 v2, s0, v2, s10
v_add_co_ci_u32_e64 v3, s0, s1, v3, s0
s_waitcnt vmcnt(0)
v_sub_f32_e32 v6, s7, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v0, v6, v6
global_store_b32 v[4:5], v0, off
v_add_co_u32 v4, s0, v4, s8
v_add_co_ci_u32_e64 v5, s0, s9, v5, s0
s_and_not1_b32 exec_lo, exec_lo, s3
s_cbranch_execnz .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| p_vec_dist | 3,399 | 1,156 | stackv2-00000-of-00015 |
// Demangled: vec_vec_dist(int, float3*, float3*, float*)
Function : _Z12vec_vec_distiP6float3S0_Pf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R9, c[0x0][0x360] &wr=0x1 ?trans8;
LDC R3, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD R0, R9, UR4, R0 &req={1} ?trans1;
ISETP.GE.AND P0, PT, R3, 0x1, PT &req={2} ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R0, R3, !P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU UR6, c[0x0][0x370] &wr=0x0 ?trans1;
LOP3.LUT R10, R3.reuse, 0x7ffffffc, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R8, R3, 0x3, RZ, 0xc0, !PT ?trans1;
LDCU.64 UR4, c[0x0][0x390] &wr=0x1 ?trans1;
IADD3 R10, PT, PT, -R10, RZ, RZ ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x2 ?trans1;
IMAD R9, R9, UR6, RZ &req={0} ?trans1;
UIADD3.64 UR4, UPT, UPT, UR4, 0x18, URZ &req={1} ?WAIT12_END_GROUP;
LDC R13, c[0x0][0x380] &req={3,1,0} &wr=0x0 ?trans1;
HFMA2 R11, -RZ, RZ, 0, 0 ?trans1;
ISETP.NE.AND P0, PT, R8, RZ, PT ?WAIT6_END_GROUP;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans8;
LDC.64 R4, c[0x0][0x398] &wr=0x3 ?trans1;
ISETP.GE.U32.AND P2, PT, R13, 0x4, PT &req={0} ?trans1;
IMAD.WIDE R2, R0, 0xc, R2 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R0, 0x4, R4 &req={3} ?trans1;
IADD3 R0, PT, PT, R9, R0, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R0, R13, PT ?trans2;
@!P2 BRA 0x600 ?trans11;
MOV R11, RZ ?trans1;
MOV R12, R10 ?trans1;
MOV.64 R6, UR4 ?WAIT8_END_GROUP;
LDG.E R14, desc[UR8][R2.64] &req={2} &wr=0x2 ?trans4;
LDG.E R15, desc[UR8][R6.64+-0x18] &req={0} &wr=0x2 ?trans2;
FADD R14, R14, -R15 &req={2} ?WAIT4_END_GROUP;
FMUL R15, R14, R14 ?WAIT5_END_GROUP;
STG.E desc[UR8][R4.64], R15 &rd=0x0 ?trans4;
LDG.E R14, desc[UR8][R2.64+0x4] &wr=0x2 ?trans4;
LDG.E R17, desc[UR8][R6.64+-0x14] &wr=0x2 ?trans2;
FADD R14, R14, -R17 &req={2} ?WAIT4_END_GROUP;
FFMA R17, R14, R14, R15 ?WAIT5_END_GROUP;
STG.E desc[UR8][R4.64], R17 &rd=0x1 ?trans4;
LDG.E R14, desc[UR8][R2.64+0x8] &wr=0x2 ?trans4;
LDG.E R19, desc[UR8][R6.64+-0x10] &wr=0x2 ?trans2;
FADD R14, R14, -R19 &req={2} ?WAIT4_END_GROUP;
FFMA R19, R14, R14, R17 ?WAIT5_END_GROUP;
STG.E desc[UR8][R4.64], R19 &rd=0x2 ?trans4;
LDG.E R14, desc[UR8][R2.64] &wr=0x3 ?trans4;
LDG.E R15, desc[UR8][R6.64+-0xc] &req={0} &wr=0x3 ?trans2;
FADD R14, R14, -R15 &req={3} ?WAIT4_END_GROUP;
FMUL R15, R14, R14 ?WAIT5_END_GROUP;
STG.E desc[UR8][R4.64], R15 &rd=0x0 ?trans4;
LDG.E R14, desc[UR8][R2.64+0x4] &wr=0x3 ?trans4;
LDG.E R17, desc[UR8][R6.64+-0x8] &req={1} &wr=0x3 ?trans2;
FADD R14, R14, -R17 &req={3} ?WAIT4_END_GROUP;
FFMA R17, R14, R14, R15 ?WAIT5_END_GROUP;
STG.E desc[UR8][R4.64], R17 &rd=0x1 ?trans4;
LDG.E R14, desc[UR8][R2.64+0x8] &wr=0x3 ?trans4;
LDG.E R19, desc[UR8][R6.64+-0x4] &req={2} &wr=0x3 ?trans2;
FADD R14, R14, -R19 &req={3} ?WAIT4_END_GROUP;
FFMA R19, R14, R14, R17 ?WAIT5_END_GROUP;
STG.E desc[UR8][R4.64], R19 &rd=0x2 ?trans4;
LDG.E R14, desc[UR8][R2.64] &wr=0x3 ?trans4;
LDG.E R15, desc[UR8][R6.64] &req={0} &wr=0x3 ?trans2;
FADD R14, R14, -R15 &req={3} ?WAIT4_END_GROUP;
FMUL R15, R14, R14 ?WAIT5_END_GROUP;
STG.E desc[UR8][R4.64], R15 &rd=0x0 ?trans4;
LDG.E R14, desc[UR8][R2.64+0x4] &wr=0x3 ?trans4;
LDG.E R17, desc[UR8][R6.64+0x4] &req={1} &wr=0x3 ?trans2;
FADD R14, R14, -R17 &req={3} ?WAIT4_END_GROUP;
FFMA R17, R14, R14, R15 ?WAIT5_END_GROUP;
STG.E desc[UR8][R4.64], R17 &rd=0x1 ?trans4;
LDG.E R14, desc[UR8][R2.64+0x8] &wr=0x3 ?trans4;
LDG.E R19, desc[UR8][R6.64+0x8] &req={2} &wr=0x3 ?trans2;
FADD R14, R14, -R19 &req={3} ?WAIT4_END_GROUP;
FFMA R19, R14, R14, R17 ?WAIT5_END_GROUP;
STG.E desc[UR8][R4.64], R19 &rd=0x2 ?trans4;
LDG.E R14, desc[UR8][R2.64] &wr=0x3 ?trans4;
LDG.E R15, desc[UR8][R6.64+0xc] &req={0} &wr=0x3 ?trans2;
FADD R14, R14, -R15 &req={3} ?WAIT4_END_GROUP;
FMUL R15, R14, R14 ?WAIT5_END_GROUP;
STG.E desc[UR8][R4.64], R15 &rd=0x0 ?trans4;
LDG.E R14, desc[UR8][R2.64+0x4] &wr=0x3 ?trans4;
LDG.E R17, desc[UR8][R6.64+0x10] &req={1} &wr=0x3 ?trans2;
FADD R14, R14, -R17 &req={3} ?WAIT4_END_GROUP;
FFMA R17, R14, R14, R15 ?WAIT5_END_GROUP;
STG.E desc[UR8][R4.64], R17 &rd=0x0 ?trans4;
LDG.E R14, desc[UR8][R2.64+0x8] &wr=0x3 ?trans4;
LDG.E R19, desc[UR8][R6.64+0x14] &req={2} &rd=0x1 &wr=0x3 ?trans1;
IADD3 R12, PT, PT, R12, 0x4, RZ ?trans2;
IADD3 R11, PT, PT, R11, 0x4, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P2, PT, R12, RZ, PT ?trans1;
IADD.64 R6, R6, 0x30 &req={1} ?trans2;
FADD R14, R14, -R19 &req={3} ?WAIT4_END_GROUP;
FFMA R19, R14, R14, R17 ?WAIT5_END_GROUP;
STG.E desc[UR8][R4.64], R19 &rd=0x0 ?trans1;
@P2 BRA 0x1f0 ?trans5;
@!P0 BRA 0x970 ?trans5;
ISETP.NE.AND P0, PT, R8, 0x1, PT ?trans1;
LOP3.LUT P2, RZ, R13, 0x1, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x850 ?trans5;
LDC.64 R6, c[0x0][0x390] &wr=0x1 ?trans1;
LDG.E R12, desc[UR8][R2.64] &req={2} &wr=0x2 ?trans1;
IMAD.WIDE.U32 R6, R11, 0xc, R6 &req={1} ?WAIT5_END_GROUP;
LDG.E R13, desc[UR8][R6.64] &wr=0x2 ?trans2;
FADD R12, R12, -R13 &req={2} ?WAIT4_END_GROUP;
FMUL R13, R12, R12 ?WAIT5_END_GROUP;
STG.E desc[UR8][R4.64], R13 &rd=0x1 ?trans4;
LDG.E R12, desc[UR8][R2.64+0x4] &wr=0x2 ?trans4;
LDG.E R15, desc[UR8][R6.64+0x4] &req={0} &wr=0x2 ?trans2;
FADD R12, R12, -R15 &req={2} ?WAIT4_END_GROUP;
FFMA R15, R12, R12, R13 ?WAIT5_END_GROUP;
STG.E desc[UR8][R4.64], R15 &rd=0x0 ?trans4;
LDG.E R12, desc[UR8][R2.64+0x8] &wr=0x2 ?trans4;
LDG.E R17, desc[UR8][R6.64+0x8] &wr=0x2 ?trans2;
FADD R12, R12, -R17 &req={2} ?WAIT4_END_GROUP;
FFMA R17, R12, R12, R15 ?WAIT5_END_GROUP;
STG.E desc[UR8][R4.64], R17 &rd=0x2 ?trans4;
LDG.E R12, desc[UR8][R2.64] &wr=0x3 ?trans4;
LDG.E R13, desc[UR8][R6.64+0xc] &req={1} &wr=0x3 ?trans2;
FADD R12, R12, -R13 &req={3} ?WAIT4_END_GROUP;
FMUL R13, R12, R12 ?WAIT5_END_GROUP;
STG.E desc[UR8][R4.64], R13 &rd=0x1 ?trans4;
LDG.E R12, desc[UR8][R2.64+0x4] &wr=0x3 ?trans4;
LDG.E R15, desc[UR8][R6.64+0x10] &req={0} &wr=0x3 ?trans2;
FADD R12, R12, -R15 &req={3} ?WAIT4_END_GROUP;
FFMA R15, R12, R12, R13 ?WAIT5_END_GROUP;
STG.E desc[UR8][R4.64], R15 &rd=0x1 ?trans4;
LDG.E R17, desc[UR8][R6.64+0x14] &req={2} &wr=0x2 ?trans4;
LDG.E R12, desc[UR8][R2.64+0x8] &wr=0x2 ?trans1;
IADD3 R11, PT, PT, R11, 0x2, RZ ?trans1;
FADD R12, R12, -R17 &req={2} ?WAIT4_END_GROUP;
FFMA R17, R12, R12, R15 ?WAIT5_END_GROUP;
STG.E desc[UR8][R4.64], R17 &rd=0x1 ?trans2;
@!P2 BRA 0x970 ?trans5;
LDC.64 R6, c[0x0][0x390] &wr=0x3 ?trans2;
IMAD.WIDE.U32 R6, R11, 0xc, R6 &req={3} ?trans2;
LDG.E R11, desc[UR8][R2.64] &req={2} &wr=0x2 ?trans4;
LDG.E R12, desc[UR8][R6.64] &wr=0x2 ?trans2;
FADD R11, R11, -R12 &req={2} ?WAIT4_END_GROUP;
FMUL R11, R11, R11 ?WAIT5_END_GROUP;
STG.E desc[UR8][R4.64], R11 &rd=0x3 ?trans4;
LDG.E R12, desc[UR8][R2.64+0x4] &wr=0x2 ?trans4;
LDG.E R13, desc[UR8][R6.64+0x4] &req={1} &wr=0x2 ?trans2;
FADD R12, R12, -R13 &req={2} ?WAIT4_END_GROUP;
FFMA R13, R12, R12, R11 ?WAIT5_END_GROUP;
STG.E desc[UR8][R4.64], R13 &rd=0x3 ?trans4;
LDG.E R12, desc[UR8][R2.64+0x8] &wr=0x2 ?trans4;
LDG.E R15, desc[UR8][R6.64+0x8] &req={0} &wr=0x2 ?trans2;
FADD R12, R12, -R15 &req={2} ?WAIT4_END_GROUP;
FFMA R15, R12, R12, R13 ?WAIT5_END_GROUP;
STG.E desc[UR8][R4.64], R15 &rd=0x3 ?trans2;
@!P1 BRA 0x110 ?trans5;
EXIT &req={2} ?trans5;
BRA 0x990;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: vec_vec_dist(int, HIP_vector_type<float, 3u>*, HIP_vector_type<float, 3u>*, float*)
_Z12vec_vec_distiP15HIP_vector_typeIfLj3EES1_Pf:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x2c
s_load_b32 s8, s[0:1], 0x0
s_add_u32 s2, s0, 32
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s11, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s11, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB1_6
s_load_b32 s2, s[2:3], 0x0
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x8
s_load_b64 s[0:1], s[0:1], 0x18
s_cmp_gt_i32 s8, 0
v_mov_b32_e32 v0, 0
s_cselect_b32 s10, -1, 0
s_mov_b32 s9, 0
s_waitcnt lgkmcnt(0)
s_mul_i32 s11, s2, s11
s_add_u32 s2, s6, 4
s_addc_u32 s3, s7, 0
.LBB1_2:
s_and_not1_b32 vcc_lo, exec_lo, s10
s_cbranch_vccnz .LBB1_5
v_ashrrev_i32_e32 v2, 31, v1
s_mov_b64 s[6:7], s[2:3]
s_mov_b32 s12, s8
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[4:5], 2, v[1:2]
v_mad_i64_i32 v[2:3], null, v1, 12, s[4:5]
v_add_co_u32 v4, vcc_lo, s0, v4
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
.LBB1_4:
global_load_b32 v6, v[2:3], off
global_load_b32 v7, v0, s[6:7] offset:-4
s_add_i32 s12, s12, -1
s_waitcnt vmcnt(0)
v_sub_f32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1)
v_mul_f32_e32 v6, v6, v6
global_store_b32 v[4:5], v6, off
global_load_b32 v7, v[2:3], off offset:4
global_load_b32 v8, v0, s[6:7]
s_waitcnt vmcnt(0)
v_sub_f32_e32 v7, v7, v8
s_delay_alu instid0(VALU_DEP_1)
v_fmac_f32_e32 v6, v7, v7
global_store_b32 v[4:5], v6, off
global_load_b32 v7, v[2:3], off offset:8
global_load_b32 v8, v0, s[6:7] offset:4
s_add_u32 s6, s6, 12
s_addc_u32 s7, s7, 0
s_cmp_eq_u32 s12, 0
s_waitcnt vmcnt(0)
v_sub_f32_e32 v7, v7, v8
s_delay_alu instid0(VALU_DEP_1)
v_fmac_f32_e32 v6, v7, v7
global_store_b32 v[4:5], v6, off
s_cbranch_scc0 .LBB1_4
.LBB1_5:
v_add_nc_u32_e32 v1, s11, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_le_i32_e32 vcc_lo, s8, v1
s_or_b32 s9, vcc_lo, s9
s_and_not1_b32 exec_lo, exec_lo, s9
s_cbranch_execnz .LBB1_2
.LBB1_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| vec_vec_dist | 4,213 | 1,193 | stackv2-00000-of-00015 |
// Demangled: convolution_1d_y(float*, int, int, int, float*)
Function : _Z16convolution_1d_yPfiiiS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
LDCU UR8, c[0x0][0x390] &wr=0x1 ?trans1;
S2R R16, SR_CTAID.X &wr=0x2 ?trans6;
S2UR UR5, SR_CTAID.Y &wr=0x3 ?trans1;
LDCU UR7, c[0x0][0x360] &wr=0x4 ?trans1;
S2R R3, SR_TID.X &wr=0x2 ?trans1;
LDCU UR6, c[0x0][0x388] &wr=0x3 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x4 ?trans1;
I2FP.F32.S32 R0, UR8 &req={1} ?WAIT4_END_GROUP;
IADD3 R2, PT, PT, R0, 0x1800000, RZ ?trans1;
UIMAD UR5, UR5, UR6, URZ &req={3} ?WAIT3_END_GROUP;
LOP3.LUT R2, R2, 0x7f800000, RZ, 0xc0, !PT ?trans1;
UIMAD UR4, UR7, UR4, URZ &req={4} ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P0, PT, R2, 0x1ffffff, PT ?trans1;
IMAD R16, R16, UR7, R3 &req={2} ?WAIT12_END_GROUP;
@P0 BRA 0x130 &req={0} ?trans5;
MOV R8, 0x120 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x950 ?trans5;
BRA 0x170 ?trans5;
MUFU.RCP R3, R0 &wr=0x0 ?trans2;
FFMA R2, R0, R3, -1 &req={0} ?WAIT4_END_GROUP;
FADD.FTZ R2, -R2, -RZ ?WAIT4_END_GROUP;
FFMA R0, R3, R2, R3 ?WAIT7_END_GROUP;
LDCU UR6, c[0x0][0x390] &wr=0x0 ?trans1;
LDC.64 R20, c[0x0][0x388] &wr=0x1 ?trans1;
ULEA.HI UR6, UR6, UR6, URZ, 0x1 &req={0} ?WAIT4_END_GROUP;
USHF.R.S32.HI UR6, URZ, 0x1, UR6 ?WAIT6_END_GROUP;
IADD3 R20, PT, PT, R20, -UR6, RZ &req={1} ?trans1;
IMAD R19, R21, UR6, RZ ?WAIT4_END_GROUP;
IMAD R17, R20, R21, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R16, R17, PT ?WAIT5_END_GROUP;
ISETP.LT.OR P0, PT, R16, R19, P0 ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
IADD3 R18, PT, PT, -R19.reuse, RZ, RZ ?trans1;
LDC.64 R4, c[0x0][0x398] &wr=0x0 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x1 ?trans3;
ISETP.GE.AND P0, PT, R19, R18, PT ?WAIT13_END_GROUP;
@P0 BRA 0x300 ?trans5;
IMAD R3, R21, UR5, R16 &req={2} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R3, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
LDG.E R7, desc[UR8][R2.64] &req={1} &wr=0x2 ?trans1;
IADD3 R16, PT, PT, R16, UR4, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R16.reuse, R17, PT ?trans1;
ISETP.GE.AND P1, PT, R16, R19, PT ?trans1;
FMUL R7, R7, R0 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR8][R2.64], R7 &rd=0x2 ?trans7;
@!P0 BRA P1, 0x260 ?trans5;
EXIT ?trans5;
VIMNMX.U32 R7, R21, 0x1, !PT ?trans1;
UIADD3 UR6, UPT, UPT, -UR6, 0x1, URZ ?trans1;
IADD3 R3, PT, PT, R19.reuse, 0x1, RZ ?trans2;
IADD3 R22, PT, PT, -R19, R21, RZ ?trans1;
I2F.U32.RP R4, R7 &req={0} &wr=0x0 ?trans1;
IADD3 R9, PT, PT, RZ, -R7, RZ ?trans1;
ISETP.NE.U32.AND P3, PT, R7, RZ, PT ?trans1;
IMAD R2, R21, UR6, RZ ?WAIT5_END_GROUP;
VIMNMX.S32 R5, R2, R3, !PT ?WAIT5_END_GROUP;
IADD3 R5, PT, PT, -R2, R5, RZ ?trans1;
HFMA2 R2, -RZ, RZ, 0, 0 ?trans1;
MUFU.RCP R4, R4 &req={0} &wr=0x0 ?trans3;
ISETP.NE.AND P0, PT, R5, RZ, PT ?WAIT5_END_GROUP;
SEL R20, RZ, 0x1, !P0 ?trans1;
IADD3 R6, PT, PT, R4, 0xffffffe, RZ &req={0} ?trans2;
IADD3 R4, PT, PT, R5, -0x1, RZ ?WAIT5_END_GROUP;
@!P0 IADD3 R4, PT, PT, R5, RZ, RZ ?trans1;
F2I.FTZ.U32.TRUNC.NTZ R3, R6 &wr=0x0 ?trans2;
IMAD R9, R9, R3, RZ &req={0} ?WAIT4_END_GROUP;
IMAD.HI.U32 R3, R3, R9, R2 ?WAIT6_END_GROUP;
IMAD.HI.U32 R9, R3, R4, RZ ?trans1;
SHF.R.S32.HI R3, RZ, 0x1f, R21 ?WAIT4_END_GROUP;
IADD3 R2, PT, PT, -R9, RZ, RZ ?WAIT5_END_GROUP;
IMAD R4, R7, R2, R4 ?trans1;
MOV R2, R21.reuse ?trans1;
IADD3 R21, PT, PT, R22, R21, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R4, R7, PT ?WAIT13_END_GROUP;
@P1 IADD3 R4, PT, PT, -R7, R4, RZ ?trans2;
@P1 IADD3 R9, PT, PT, R9, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P2, PT, R4, R7, PT ?trans1;
IADD.64 R4, R2, R2 ?WAIT12_END_GROUP;
@P2 IADD3 R9, PT, PT, R9, 0x1, RZ ?trans2;
@!P3 LOP3.LUT R9, RZ, R7, RZ, 0x33, !PT ?trans1;
IADD.64 R6, R2, R4 ?trans2;
IMAD.SHL.U32 R2, R4.reuse, 0x4, RZ ?trans1;
SHF.L.U64.HI R3, R4, 0x2, R5 ?trans2;
IADD3 R20, PT, PT, R20, R9, RZ ?trans2;
SHF.L.U64.HI R5, R6.reuse, 0x2, R7 ?trans1;
IMAD.SHL.U32 R4, R6, 0x4, RZ ?trans1;
IADD3 R23, PT, PT, R20, 0x1, RZ ?WAIT4_END_GROUP;
LOP3.LUT R23, R23, 0x3, RZ, 0xc0, !PT ?WAIT7_END_GROUP;
LDC R25, c[0x0][0x38c] &wr=0x0 ?trans8;
LDC.64 R6, c[0x0][0x398] &wr=0x2 ?trans1;
IMAD R24, R25, UR5, R16 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R6, R24, 0x4, R6 &req={2} ?WAIT5_END_GROUP;
LDG.E R27, desc[UR8][R6.64] &req={1} &rd=0x0 &wr=0x5 ?trans1;
ISETP.NE.AND P0, PT, R23, RZ, PT ?trans1;
MOV R26, R18 ?WAIT12_END_GROUP;
@!P0 BRA 0x760 &req={0} ?trans5;
LDC.64 R8, c[0x0][0x380] &wr=0x0 ?trans1;
IADD3 R11, PT, PT, -R19, R24, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R8, R11, 0x4, R8 &req={0} ?WAIT5_END_GROUP;
LDG.E R10, desc[UR8][R8.64] &wr=0x2 ?trans1;
ISETP.NE.AND P0, PT, R23, 0x1, PT ?trans1;
MOV R26, R22 ?trans1;
FADD R27, R27, R10 &req={5,2} ?WAIT5_END_GROUP;
STG.E desc[UR8][R6.64], R27 &rd=0x0 ?trans6;
@!P0 BRA 0x760 ?trans5;
IMAD.WIDE R10, R25, 0x4, R8 ?WAIT6_END_GROUP;
LDG.E R10, desc[UR8][R10.64] &wr=0x2 ?trans1;
ISETP.NE.AND P0, PT, R23, 0x2, PT ?trans1;
MOV R26, R21 ?trans1;
FADD R27, R27, R10 &req={2,0} ?WAIT5_END_GROUP;
STG.E desc[UR8][R6.64], R27 &rd=0x1 ?trans6;
@!P0 BRA 0x760 ?trans5;
IADD.64 R8, R2, R8 ?WAIT7_END_GROUP;
LDG.E R8, desc[UR8][R8.64] &wr=0x2 ?trans1;
IADD3 R26, PT, PT, R21, R25, RZ ?trans1;
FADD R27, R27, R8 &req={2,1} ?WAIT5_END_GROUP;
STG.E desc[UR8][R6.64], R27 &rd=0x2 ?trans2;
ISETP.GE.U32.AND P0, PT, R20, 0x3, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x8e0 ?trans5;
LDC.64 R8, c[0x0][0x380] &wr=0x3 ?trans1;
IADD3 R31, PT, PT, R25, R25, RZ ?WAIT7_END_GROUP;
IADD3 R11, PT, PT, R24, R26, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R10, R11, 0x4, R8 &req={3} ?WAIT5_END_GROUP;
LDG.E R12, desc[UR8][R10.64] &wr=0x3 ?trans2;
FADD R33, R12, R27 &req={5,4,3} ?trans1;
IMAD.WIDE R12, R25, 0x4, R10 ?WAIT4_END_GROUP;
STG.E desc[UR8][R6.64], R33 &rd=0x4 ?trans4;
LDG.E R12, desc[UR8][R12.64] &wr=0x3 ?trans1;
IADD.64 R14, R2, R10 ?trans2;
FADD R35, R33, R12 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR8][R6.64], R35 &rd=0x4 ?trans4;
LDG.E R14, desc[UR8][R14.64] &wr=0x3 ?trans1;
IADD.64 R28, R10, R4 ?trans2;
FADD R37, R35, R14 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR8][R6.64], R37 &rd=0x4 ?trans4;
LDG.E R28, desc[UR8][R28.64] &wr=0x3 ?trans1;
IADD3 R26, PT, PT, R31, R26, R31 ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R26, R19, PT ?trans1;
FADD R27, R37, R28 &req={3,2,1,0} ?WAIT5_END_GROUP;
STG.E desc[UR8][R6.64], R27 &rd=0x4 ?trans7;
@!P0 BRA 0x7a0 ?trans5;
FMUL R27, R27, R0 &req={5,4,2,1,0} ?trans1;
IADD3 R16, PT, PT, R16, UR4, RZ ?WAIT4_END_GROUP;
STG.E desc[UR8][R6.64], R27 &rd=0x0 ?trans1;
ISETP.GE.AND P0, PT, R16.reuse, R17, PT ?trans1;
ISETP.GE.AND P1, PT, R16, R19, PT ?WAIT13_END_GROUP;
@!P0 BRA P1, 0x590 &req={0} ?trans5;
EXIT ?trans5;
IMAD.SHL.U32 R2, R0, 0x2, RZ ?WAIT5_END_GROUP;
SHF.R.U32.HI R2, RZ, 0x18, R2 ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P0, PT, R2, RZ, PT ?WAIT13_END_GROUP;
@P0 BRA 0xa40 ?trans5;
IMAD.SHL.U32 R2, R0, 0x2, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R2, RZ, PT ?WAIT13_END_GROUP;
@!P0 MUFU.RCP R2, R0 &rd=0x2 &wr=0x3 ?trans1;
@!P0 BRA 0xc60 ?trans5;
FFMA R3, R0, 1.84467440737095516160e+19, RZ ?WAIT4_END_GROUP;
MUFU.RCP R0, R3 &req={2} &wr=0x0 ?trans2;
FFMA R2, R3, R0, -1 &req={3,0} ?WAIT4_END_GROUP;
FADD.FTZ R5, -R2, -RZ ?WAIT4_END_GROUP;
FFMA R0, R0, R5, R0 ?WAIT4_END_GROUP;
FFMA R2, R0, 1.84467440737095516160e+19, RZ ?trans1;
BRA 0xc60 ?trans6;
IADD3 R3, PT, PT, R2, -0xfd, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R3, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0xc50 ?trans5;
LOP3.LUT R4, R0, 0x7fffff, RZ, 0xc0, !PT ?trans1;
HFMA2 R10, -RZ, RZ, 0, 1.78813934326171875e-07 ?WAIT3_END_GROUP;
LOP3.LUT R4, R4, 0x3f800000, RZ, 0xfc, !PT ?trans2;
SHF.L.U32 R9, R10, R3, RZ ?trans2;
MUFU.RCP R5, R4 &wr=0x0 ?trans2;
FFMA R6, R4, R5, -1 &req={0} ?WAIT4_END_GROUP;
FADD.FTZ R6, -R6, -RZ ?WAIT4_END_GROUP;
FFMA.RM R7, R5.reuse, R6.reuse, R5.reuse ?trans1;
FFMA.RP R6, R5, R6, R5 ?WAIT5_END_GROUP;
FSETP.NEU.FTZ.AND P0, PT, R7.reuse, R6, PT ?trans1;
LOP3.LUT R7, R7, 0x7fffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R6, R7, 0x800000, RZ, 0xfc, !PT ?trans1;
SEL R5, RZ, 0xffffffff, !P0 ?WAIT3_END_GROUP;
LOP3.LUT R4, R9, R6, RZ, 0xc0, !PT ?trans2;
IADD3 R5, PT, PT, -R5, RZ, RZ ?trans2;
SHF.R.U32.HI R4, RZ, R3.reuse, R4 ?trans2;
LOP3.LUT P1, RZ, R5, R3, R6, 0xf8, !PT ?trans2;
LOP3.LUT P0, RZ, R4.reuse, 0x1, RZ, 0xc0, !PT ?trans2;
LOP3.LUT P2, RZ, R4, 0x2, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, P2, 0xe0, 0x0 ?trans2;
LOP3.LUT P1, RZ, R0, 0x7fffff, RZ, 0xc0, !PT ?WAIT3_END_GROUP;
SEL R3, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
IADD3 R3, PT, PT, -R3, RZ, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R3, RZ, PT ?trans1;
IADD3 R3, PT, PT, R2, -0xfc, RZ ?WAIT4_END_GROUP;
SHF.R.U32.HI R3, RZ, R3, R6 ?WAIT8_END_GROUP;
@!P0 IADD3 R3, PT, PT, R3, 0x1, RZ ?WAIT5_END_GROUP;
@!P1 IMAD.SHL.U32 R3, R3, 0x2, RZ ?WAIT5_END_GROUP;
LOP3.LUT R2, R3, 0x80000000, R0, 0xf8, !PT ?trans1;
BRA 0xc60 ?trans6;
MUFU.RCP R2, R0 &rd=0x0 &wr=0x1 ?trans2;
MOV R0, R2 &req={3,2,1,0} ?trans1;
MOV R2, R8 ?trans1;
MOV R3, 0x0 ?WAIT4_END_GROUP;
RET.REL.NODEC R2 0x0 ?trans5;
BRA 0xca0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: convolution_1d_y(float*, int, int, int, float*)
_Z16convolution_1d_yPfiiiS_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b128 s[4:7], s[0:1], 0x8
s_add_u32 s8, s0, 32
s_addc_u32 s9, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s13, s2, 0xffff
s_lshr_b32 s2, s6, 31
s_mul_i32 s14, s14, s13
s_add_i32 s2, s6, s2
v_add_nc_u32_e32 v8, s14, v0
s_ashr_i32 s16, s2, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
s_sub_i32 s11, s4, s16
s_mul_i32 s10, s16, s5
s_mul_i32 s11, s11, s5
v_cmp_le_i32_e32 vcc_lo, s10, v8
v_cmp_gt_i32_e64 s2, s11, v8
s_and_b32 s2, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB0_6
v_cvt_f32_i32_e32 v1, s6
s_load_b32 s8, s[8:9], 0x0
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x0
s_load_b64 s[6:7], s[0:1], 0x18
s_sub_i32 s1, 0, s10
s_mul_i32 s0, s15, s4
v_div_scale_f32 v2, null, v1, v1, 1.0
v_div_scale_f32 v5, vcc_lo, 1.0, v1, 1.0
s_cmp_ge_i32 s10, s1
s_delay_alu instid0(VALU_DEP_2)
v_rcp_f32_e32 v3, v2
s_mul_i32 s4, s0, s5
s_cselect_b32 s12, -1, 0
s_sub_i32 s0, s0, s16
s_ashr_i32 s9, s5, 31
s_mul_i32 s0, s5, s0
s_delay_alu instid0(SALU_CYCLE_1)
v_add3_u32 v0, s14, s0, v0
s_mov_b32 s14, 0
s_waitcnt_depctr 0xfff
v_fma_f32 v4, -v2, v3, 1.0
s_waitcnt lgkmcnt(0)
s_mul_i32 s13, s8, s13
s_mov_b32 s8, s5
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
s_lshl_b64 s[8:9], s[8:9], 2
v_fmac_f32_e32 v3, v4, v3
v_mul_f32_e32 v4, v5, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v6, -v2, v4, v5
v_fmac_f32_e32 v4, v6, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v2, -v2, v4, v5
v_div_fmas_f32 v2, v2, v3, v4
s_delay_alu instid0(VALU_DEP_1)
v_div_fixup_f32 v9, v2, v1, 1.0
.LBB0_2:
v_add_nc_u32_e32 v1, s4, v8
s_and_not1_b32 vcc_lo, exec_lo, s12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[2:3], 2, v[1:2]
s_cbranch_vccnz .LBB0_5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v4, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
v_ashrrev_i32_e32 v1, 31, v0
s_mov_b32 s0, s1
global_load_b32 v10, v[4:5], off
v_lshlrev_b64 v[6:7], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v6, vcc_lo, s2, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s3, v7, vcc_lo
.LBB0_4:
global_load_b32 v1, v[6:7], off
v_add_co_u32 v6, vcc_lo, v6, s8
v_add_co_ci_u32_e32 v7, vcc_lo, s9, v7, vcc_lo
s_add_i32 s0, s0, s5
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_gt_i32 s0, s10
s_waitcnt vmcnt(0)
v_add_f32_e32 v10, v1, v10
global_store_b32 v[4:5], v10, off
s_cbranch_scc0 .LBB0_4
.LBB0_5:
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v2, vcc_lo, s7, v3, vcc_lo
v_add_nc_u32_e32 v0, s13, v0
global_load_b32 v3, v[1:2], off
s_waitcnt vmcnt(0)
v_dual_mul_f32 v3, v9, v3 :: v_dual_add_nc_u32 v8, s13, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
v_cmp_gt_i32_e32 vcc_lo, s10, v8
v_cmp_le_i32_e64 s0, s11, v8
global_store_b32 v[1:2], v3, off
s_or_b32 s0, vcc_lo, s0
s_and_b32 s0, exec_lo, s0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_or_b32 s14, s0, s14
s_and_not1_b32 exec_lo, exec_lo, s14
s_cbranch_execnz .LBB0_2
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| convolution_1d_y | 5,111 | 1,960 | stackv2-00000-of-00015 |
// Demangled: Eps(float*, float*, float*, unsigned long long)
Function : _Z3EpsPfS_S_y
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R0, SR_TID.X &wr=0x0 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC R9, c[0x0][0x360] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans8;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD R9, R9, UR6, R0 &req={0} ?WAIT7_END_GROUP;
LDC.64 R6, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD.WIDE.U32 R2, R9, 0x4, R2 &req={2} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
IMAD.WIDE.U32 R4, R9, 0x4, R4 &req={3} ?WAIT5_END_GROUP;
LDG.E R11, desc[UR4][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R6, R9, 0x4, R6 &req={0} ?WAIT4_END_GROUP;
FADD R0, R0, -R11 &req={2} ?WAIT4_END_GROUP;
FADD R11, |R0|, -RZ ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R11 ?trans4;
LDG.E R9, desc[UR4][R4.64] &wr=0x2 ?trans4;
STG.E desc[UR4][R2.64], R9 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x140;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: Eps(float*, float*, float*, unsigned long long)
_Z3EpsPfS_S_y:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x2c
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_mov_b32_e32 v2, 0
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v6, v[2:3], off
global_load_b32 v7, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_sub_f32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1)
v_and_b32_e32 v6, 0x7fffffff, v6
global_store_b32 v[0:1], v6, off
global_load_b32 v0, v[4:5], off
s_waitcnt vmcnt(0)
global_store_b32 v[2:3], v0, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| Eps | 575 | 552 | stackv2-00000-of-00015 |
// Demangled: Solve(float*, float*, float*, float*, unsigned long long)
Function : _Z5SolvePfS_S_S_y
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x3a0] &wr=0x1 ?trans1;
S2R R3, SR_TID.X &wr=0x2 ?trans1;
LDCU.64 UR12, c[0x0][0x358] &wr=0x3 ?trans1;
HFMA2 R22, -RZ, RZ, 0, 0 ?WAIT5_END_GROUP;
S2UR UR4, SR_CTAID.X &wr=0x2 ?trans8;
LDC R2, c[0x0][0x360] &wr=0x2 ?trans1;
ISETP.NE.S64.AND P0, PT, R4, RZ, PT &req={1} ?trans2;
IMAD R2, R2, UR4, R3 &req={2} ?WAIT12_END_GROUP;
@!P0 BRA 0xb10 &req={3,0} ?trans5;
LDCU.64 UR8, c[0x0][0x3a0] &wr=0x0 ?trans1;
ISETP.GE.U64.AND P1, PT, R4, 0x10, PT ?trans2;
MOV R25, RZ ?trans1;
MOV R22, RZ ?trans1;
ULOP3.LUT UR4, UR8, 0xf, URZ, 0xc0, !UPT &req={0} ?trans2;
IMAD.WIDE.U32 R6, R2, UR8, RZ ?WAIT4_END_GROUP;
IMAD R9, R2, UR9, R7 ?trans1;
MOV R24, UR4 ?trans1;
UMOV.64 UR4, URZ ?WAIT4_END_GROUP;
ISETP.NE.S64.AND P0, PT, R24, RZ, PT ?trans2;
@!P1 BRA 0x560 ?WAIT12_END_GROUP;
LDCU.64 UR6, c[0x0][0x380] &wr=0x0 ?trans1;
MOV R22, RZ ?trans1;
LDCU.64 UR4, c[0x0][0x390] &wr=0x1 ?trans1;
LEA R4, P1, R6, UR6, 0x2 &req={0} ?trans1;
ULOP3.LUT UR6, UR8, 0xfffffff0, URZ, 0xc0, !UPT ?WAIT3_END_GROUP;
LEA.HI.X R5, R6, UR7, R9, 0x2, P1 ?trans1;
UIADD3.64 UR4, UPT, UPT, UR4, 0x20, URZ &req={1} ?WAIT4_END_GROUP;
IADD.64 R4, R4, 0x20 ?trans2;
MOV.64 R10, UR4 ?trans2;
UMOV.64 UR4, URZ ?WAIT6_END_GROUP;
LDG.E R27, desc[UR12][R4.64+-0x20] &wr=0x2 ?trans4;
LDG.E R26, desc[UR12][R10.64+-0x20] &wr=0x2 ?trans4;
LDG.E R32, desc[UR12][R4.64+-0x1c] &wr=0x3 ?trans4;
LDG.E R34, desc[UR12][R10.64+-0x1c] &wr=0x3 ?trans4;
LDG.E R28, desc[UR12][R4.64+-0x18] &wr=0x4 ?trans4;
LDG.E R31, desc[UR12][R10.64+-0x18] &wr=0x4 ?trans4;
LDG.E R33, desc[UR12][R4.64+-0x14] &wr=0x5 ?trans4;
LDG.E R30, desc[UR12][R10.64+-0x14] &wr=0x5 ?trans4;
LDG.E R15, desc[UR12][R4.64+-0x10] &wr=0x5 ?trans4;
LDG.E R12, desc[UR12][R10.64+-0x10] &wr=0x5 ?trans4;
LDG.E R13, desc[UR12][R4.64+-0xc] &wr=0x5 ?trans4;
LDG.E R0, desc[UR12][R10.64+-0xc] &wr=0x5 ?trans4;
LDG.E R20, desc[UR12][R4.64+-0x8] &wr=0x5 ?trans4;
LDG.E R23, desc[UR12][R10.64+-0x8] &wr=0x5 ?trans4;
LDG.E R18, desc[UR12][R4.64+-0x4] &wr=0x5 ?trans4;
LDG.E R21, desc[UR12][R10.64+-0x4] &wr=0x5 ?trans4;
LDG.E R16, desc[UR12][R4.64] &wr=0x5 ?trans4;
LDG.E R19, desc[UR12][R10.64] &wr=0x5 ?trans4;
LDG.E R14, desc[UR12][R4.64+0x4] &wr=0x5 ?trans4;
LDG.E R17, desc[UR12][R10.64+0x4] &wr=0x5 ?trans4;
LDG.E R29, desc[UR12][R10.64+0x8] &wr=0x5 ?trans1;
FFMA R27, R27, R26, R22 &req={2} ?WAIT3_END_GROUP;
LDG.E R26, desc[UR12][R4.64+0x8] &wr=0x2 ?trans4;
LDG.E R22, desc[UR12][R4.64+0xc] &wr=0x2 ?trans1;
FFMA R35, R32, R34, R27 &req={3} ?WAIT3_END_GROUP;
LDG.E R27, desc[UR12][R10.64+0xc] &wr=0x3 ?trans1;
FFMA R32, R28, R31, R35 &req={4} ?WAIT3_END_GROUP;
LDG.E R28, desc[UR12][R4.64+0x10] &wr=0x4 ?trans4;
LDG.E R31, desc[UR12][R10.64+0x10] &wr=0x4 ?trans1;
FFMA R34, R33, R30, R32 &req={5} ?WAIT3_END_GROUP;
LDG.E R32, desc[UR12][R4.64+0x14] &wr=0x5 ?trans4;
LDG.E R35, desc[UR12][R10.64+0x14] &wr=0x5 ?trans4;
LDG.E R30, desc[UR12][R4.64+0x18] &wr=0x5 ?trans1;
FFMA R34, R15, R12, R34 ?WAIT3_END_GROUP;
LDG.E R33, desc[UR12][R10.64+0x18] &wr=0x5 ?trans4;
LDG.E R12, desc[UR12][R4.64+0x1c] &rd=0x0 &wr=0x5 ?trans4;
LDG.E R15, desc[UR12][R10.64+0x1c] &rd=0x1 &wr=0x5 ?trans1;
FFMA R13, R13, R0, R34 ?WAIT4_END_GROUP;
FFMA R13, R20, R23, R13 ?WAIT4_END_GROUP;
FFMA R13, R18, R21, R13 ?trans1;
UIADD3.64 UR4, UPT, UPT, UR4, 0x10, URZ ?trans1;
UMOV UR7, UR9 ?trans2;
FFMA R13, R16, R19, R13 ?trans1;
UIADD3.64 UR10, UPT, UPT, UR4, -UR6, URZ ?WAIT3_END_GROUP;
FFMA R13, R14, R17, R13 ?WAIT3_END_GROUP;
ISETP.NE.S64.AND P1, PT, RZ, UR10, PT ?trans2;
IADD.64 R4, R4, 0x40 &req={0} ?trans2;
IADD.64 R10, R10, 0x40 &req={1} ?trans2;
FFMA R13, R26, R29, R13 &req={2} ?WAIT4_END_GROUP;
FFMA R13, R22, R27, R13 &req={3} ?WAIT4_END_GROUP;
FFMA R13, R28, R31, R13 &req={4} ?WAIT4_END_GROUP;
FFMA R13, R32, R35, R13 &req={5} ?WAIT4_END_GROUP;
FFMA R13, R30, R33, R13 ?WAIT4_END_GROUP;
FFMA R22, R12, R15, R13 ?trans1;
@P1 BRA 0x1f0 ?trans6;
@!P0 BRA 0xb10 ?trans5;
ISETP.GE.U64.AND P0, PT, R24, 0x8, PT ?trans2;
ULOP3.LUT UR6, UR8, 0x7, URZ, 0xc0, !UPT ?trans1;
HFMA2 R21, -RZ, RZ, 0, 0 ?WAIT5_END_GROUP;
MOV R20, UR6 ?WAIT5_END_GROUP;
ISETP.NE.S64.AND P1, PT, R20, RZ, PT ?trans2;
@!P0 BRA 0x800 ?WAIT12_END_GROUP;
LDCU.64 UR6, c[0x0][0x390] &wr=0x0 ?trans1;
MOV R8, R6 ?trans1;
LDCU.64 UR10, c[0x0][0x380] &wr=0x1 ?trans4;
IADD.64 R12, R8, UR4 ?trans2;
ULEA UR6, UP0, UR4, UR6, 0x2 &req={0} ?WAIT4_END_GROUP;
ULEA.HI.X UR7, UR4, UR7, UR5, 0x2, UP0 ?trans1;
LEA R10, P0, R12, UR10, 0x2 &req={1} ?trans1;
MOV R4, UR6 ?WAIT3_END_GROUP;
LEA.HI.X R11, R12, UR11, R13, 0x2, P0 ?trans1;
MOV R5, UR7 ?WAIT4_END_GROUP;
LDG.E R13, desc[UR12][R10.64] &wr=0x2 ?trans4;
LDG.E R0, desc[UR12][R4.64] &wr=0x2 ?trans4;
LDG.E R15, desc[UR12][R10.64+0x4] &wr=0x3 ?trans4;
LDG.E R12, desc[UR12][R4.64+0x4] &wr=0x3 ?trans4;
LDG.E R17, desc[UR12][R10.64+0x8] &wr=0x4 ?trans4;
LDG.E R14, desc[UR12][R4.64+0x8] &wr=0x4 ?trans4;
LDG.E R19, desc[UR12][R10.64+0xc] &wr=0x5 ?trans4;
LDG.E R16, desc[UR12][R4.64+0xc] &wr=0x5 ?trans4;
LDG.E R23, desc[UR12][R10.64+0x10] &wr=0x5 ?trans4;
LDG.E R18, desc[UR12][R4.64+0x10] &wr=0x5 ?trans4;
LDG.E R25, desc[UR12][R10.64+0x14] &wr=0x5 ?trans4;
LDG.E R24, desc[UR12][R4.64+0x14] &wr=0x5 ?trans4;
LDG.E R27, desc[UR12][R10.64+0x18] &wr=0x5 ?trans4;
LDG.E R26, desc[UR12][R4.64+0x18] &wr=0x5 ?trans4;
LDG.E R29, desc[UR12][R10.64+0x1c] &wr=0x5 ?trans4;
LDG.E R28, desc[UR12][R4.64+0x1c] &wr=0x5 ?trans1;
UIADD3.64 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
FFMA R0, R13, R0, R22 &req={2} ?WAIT4_END_GROUP;
FFMA R0, R15, R12, R0 &req={3} ?WAIT4_END_GROUP;
FFMA R0, R17, R14, R0 &req={4} ?WAIT4_END_GROUP;
FFMA R0, R19, R16, R0 &req={5} ?WAIT4_END_GROUP;
FFMA R0, R23, R18, R0 ?WAIT4_END_GROUP;
FFMA R0, R25, R24, R0 ?WAIT4_END_GROUP;
FFMA R0, R27, R26, R0 ?WAIT4_END_GROUP;
FFMA R22, R29, R28, R0 ?WAIT7_END_GROUP;
@!P1 BRA 0xb10 ?trans5;
ISETP.GE.U64.AND P0, PT, R20, 0x4, PT ?trans2;
ULOP3.LUT UR6, UR8, 0x3, URZ, 0xc0, !UPT ?trans1;
UMOV UR7, URZ ?WAIT5_END_GROUP;
ISETP.NE.S64.AND P1, PT, RZ, UR6, PT ?WAIT6_END_GROUP;
@!P0 BRA 0x9e0 ?trans8;
LDCU.64 UR8, c[0x0][0x390] &wr=0x0 ?trans1;
MOV R4, R6 ?trans1;
MOV R5, R9 ?trans1;
LDCU.64 UR10, c[0x0][0x380] &wr=0x1 ?trans4;
IADD.64 R4, R4, UR4 ?trans2;
ULEA UR8, UP0, UR4, UR8, 0x2 &req={0} ?WAIT4_END_GROUP;
ULEA.HI.X UR9, UR4, UR9, UR5, 0x2, UP0 ?trans1;
LEA R10, P0, R4, UR10, 0x2 &req={1} ?trans1;
MOV R12, UR8 ?WAIT3_END_GROUP;
LEA.HI.X R11, R4, UR11, R5, 0x2, P0 ?trans1;
MOV R13, UR9 ?WAIT4_END_GROUP;
LDG.E R5, desc[UR12][R10.64] &wr=0x2 ?trans4;
LDG.E R0, desc[UR12][R12.64] &wr=0x2 ?trans4;
LDG.E R15, desc[UR12][R10.64+0x4] &wr=0x3 ?trans4;
LDG.E R4, desc[UR12][R12.64+0x4] &wr=0x3 ?trans4;
LDG.E R17, desc[UR12][R10.64+0x8] &wr=0x4 ?trans4;
LDG.E R14, desc[UR12][R12.64+0x8] &wr=0x4 ?trans4;
LDG.E R19, desc[UR12][R10.64+0xc] &wr=0x5 ?trans4;
LDG.E R16, desc[UR12][R12.64+0xc] &wr=0x5 ?trans1;
UIADD3.64 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
FFMA R0, R5, R0, R22 &req={2} ?WAIT4_END_GROUP;
FFMA R0, R15, R4, R0 &req={3} ?WAIT4_END_GROUP;
FFMA R0, R17, R14, R0 &req={4} ?WAIT4_END_GROUP;
FFMA R22, R19, R16, R0 &req={5} ?WAIT7_END_GROUP;
@!P1 BRA 0xb10 ?trans5;
LDCU.64 UR8, c[0x0][0x390] &wr=0x0 ?trans1;
MOV R4, R6 ?trans1;
MOV R5, R9 ?trans1;
LDCU.64 UR10, c[0x0][0x380] &wr=0x1 ?trans4;
IADD.64 R4, R4, UR4 ?trans2;
ULEA UR8, UP0, UR4, UR8, 0x2 &req={0} ?WAIT4_END_GROUP;
ULEA.HI.X UR9, UR4, UR9, UR5, 0x2, UP0 ?trans1;
LEA R6, P0, R4, UR10, 0x2 &req={1} ?WAIT4_END_GROUP;
LEA.HI.X R7, R4, UR11, R5, 0x2, P0 ?trans1;
MOV.64 R4, UR8 ?WAIT8_END_GROUP;
LDG.E R9, desc[UR12][R6.64] &rd=0x0 &wr=0x2 ?trans4;
LDG.E R0, desc[UR12][R4.64] &rd=0x1 &wr=0x2 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR6, -0x1, URZ ?trans1;
IADD.64 R6, R6, 0x4 &req={0} ?WAIT5_END_GROUP;
ISETP.NE.S64.AND P0, PT, RZ, UR6, PT ?trans2;
IADD.64 R4, R4, 0x4 &req={1} ?trans2;
FFMA R22, R9, R0, R22 &req={2} ?WAIT10_END_GROUP;
@P0 BRA 0xa90 ?trans5;
LDCU.64 UR4, c[0x0][0x3a0] &wr=0x0 ?trans1;
MOV R3, RZ ?trans1;
LDCU.64 UR6, c[0x0][0x380] &wr=0x1 ?trans2;
IMAD.WIDE.U32 R4, R2, UR4, R2 &req={0} ?WAIT4_END_GROUP;
IMAD R3, R2, UR5, R5 ?trans1;
LDCU.64 UR4, c[0x0][0x388] &wr=0x0 ?trans1;
LEA R8, P0, R4, UR6, 0x2 &req={1} ?WAIT4_END_GROUP;
LEA.HI.X R9, R4, UR7, R3, 0x2, P0 ?trans1;
IMAD.SHL.U32 R4, R2, 0x4, RZ ?trans1;
SHF.R.U32.HI R5, RZ, 0x1e, R2 ?WAIT4_END_GROUP;
LDG.E R9, desc[UR12][R8.64] &wr=0x2 ?trans1;
IADD.64 R6, R4.reuse, UR4 &req={0} ?trans2;
LDCU.64 UR4, c[0x0][0x390] &wr=0x0 ?trans5;
LDG.E R7, desc[UR12][R6.64] &wr=0x3 ?trans1;
IADD.64 R2, R4, UR4 &req={0} ?WAIT7_END_GROUP;
LDG.E R2, desc[UR12][R2.64] &rd=0x0 &wr=0x5 ?trans1;
BSSY.RECONVERGENT B0, 0xcf0 ?trans1;
MUFU.RCP R10, R9 &req={2} &wr=0x1 ?trans1;
FADD R0, R7, -R22 &req={3} ?WAIT4_END_GROUP;
FCHK P0, R0, R9 &wr=0x2 ?trans1;
FFMA R11, -R9, R10, 1 &req={1} ?WAIT4_END_GROUP;
FFMA R11, R10, R11, R10 ?WAIT4_END_GROUP;
FFMA R8, R0, R11, RZ ?WAIT4_END_GROUP;
FFMA R10, -R9, R8, R0 ?WAIT4_END_GROUP;
FFMA R11, R11, R10, R8 ?trans1;
@!P0 BRA 0xce0 &req={2,0} ?trans6;
MOV R6, 0xcd0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xd40 &req={5} ?trans5;
MOV R11, R8 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU.64 UR4, c[0x0][0x398] &wr=0x0 ?trans1;
FADD R11, R2, R11 &req={5} ?trans1;
IADD.64 R4, R4, UR4 &req={0} ?WAIT6_END_GROUP;
STG.E desc[UR12][R4.64], R11 ?trans1;
EXIT ?trans5;
SHF.R.U32.HI R7, RZ, 0x17, R9 ?trans1;
BSSY.RECONVERGENT B1, 0x13a0 ?trans1;
SHF.R.U32.HI R3, RZ, 0x17, R0 ?trans2;
LOP3.LUT R7, R7, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R12, R3, 0xff, RZ, 0xc0, !PT ?trans1;
MOV R8, R0 ?trans1;
IADD3 R11, PT, PT, R7, -0x1, RZ ?trans2;
IADD3 R13, PT, PT, R12, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R11, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R13, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R10, RZ ?trans1;
@!P0 BRA 0xf80 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R9|, +INF , PT ?trans1;
MOV R3, R9 ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0x1380 ?trans5;
LOP3.LUT P0, RZ, R9, 0x7fffffff, R8, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1360 ?trans5;
FSETP.NEU.FTZ.AND P2, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P1 BRA !P2, 0x1360 ?trans5;
LOP3.LUT P2, RZ, R8, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P1, P2, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0x1340 ?trans5;
LOP3.LUT P1, RZ, R9, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x1310 ?trans5;
ISETP.GE.AND P0, PT, R13, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R11, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R10, RZ ?trans1;
@!P0 MOV R10, 0xffffffc0 ?trans1;
@!P0 FFMA R8, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R9, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R10, PT, PT, R10, 0x40, RZ ?WAIT7_END_GROUP;
LEA R0, R7, 0xc0800000, 0x17 ?trans1;
BSSY.RECONVERGENT B2, 0x1300 ?trans1;
IADD3 R3, PT, PT, R12, -0x7f, RZ ?trans2;
IADD3 R9, PT, PT, -R0, R9, RZ ?WAIT3_END_GROUP;
IMAD R0, R3.reuse, -0x800000, R8 ?trans1;
IADD3 R3, PT, PT, R3, 0x7f, -R7 ?trans1;
MUFU.RCP R11, R9 &wr=0x0 ?trans1;
FADD.FTZ R13, -R9, -RZ ?trans2;
IADD3 R3, PT, PT, R3, R10, RZ ?trans2;
FFMA R12, R11, R13, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R15, R11, R12, R11 ?WAIT4_END_GROUP;
FFMA R8, R0, R15, RZ ?WAIT4_END_GROUP;
FFMA R11, R13, R8, R0 ?WAIT4_END_GROUP;
FFMA R12, R15, R11, R8 ?WAIT4_END_GROUP;
FFMA R13, R13, R12, R0 ?WAIT4_END_GROUP;
FFMA R8, R15, R13, R12 ?WAIT5_END_GROUP;
SHF.R.U32.HI R0, RZ, 0x17, R8 ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R9, PT, PT, R0, R3, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R9, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x12e0 ?trans5;
ISETP.GT.AND P0, PT, R9, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x12b0 ?trans5;
ISETP.GE.AND P0, PT, R9, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x12f0 ?trans5;
ISETP.GE.AND P0, PT, R9, -0x18, PT ?trans1;
LOP3.LUT R8, R8, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x12f0 ?trans5;
FFMA.RZ R0, R15, R13.reuse, R12.reuse ?trans1;
IADD3 R10, PT, PT, R9, 0x20, RZ ?trans1;
FFMA.RM R3, R15, R13.reuse, R12.reuse ?trans1;
ISETP.NE.AND P1, PT, R9.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R9.reuse, RZ, PT ?trans1;
LOP3.LUT R0, R0, 0x7fffff, RZ, 0xc0, !PT ?trans2;
IADD3 R9, PT, PT, -R9, RZ, RZ ?trans2;
LOP3.LUT R7, R0, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R0, R15, R13, R12 ?WAIT3_END_GROUP;
SHF.L.U32 R10, R7, R10, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R0, R3, PT ?trans1;
SEL R0, R9, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R10, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R0, RZ, R0, R7 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R10, RZ, 0x1, R0 ?WAIT3_END_GROUP;
SEL R3, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R3, R3, 0x1, R10, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, R0, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R3, PT, PT, R10, R3, RZ ?WAIT4_END_GROUP;
LOP3.LUT R8, R3, R8, RZ, 0xfc, !PT ?trans1;
BRA 0x12f0 ?trans6;
LOP3.LUT R8, R8, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R8, R8, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x12f0 ?trans6;
IMAD R8, R3, 0x800000, R8 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
BRA 0x1390 ?trans5;
LOP3.LUT R8, R9, 0x80000000, R8, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R8, R8, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x1390 ?trans6;
LOP3.LUT R8, R9, 0x80000000, R8, 0x48, !PT ?trans1;
BRA 0x1390 ?trans6;
MUFU.RSQ R8, -QNAN &wr=0x0 ?trans1;
BRA 0x1390 ?trans5;
FADD.FTZ R8, R0, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
HFMA2 R7, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R6 0x0 &req={0} ?trans5;
BRA 0x13c0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: Solve(float*, float*, float*, float*, unsigned long long)
_Z5SolvePfS_S_S_y:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x34
s_load_b256 s[4:11], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x20
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_mov_b32_e32 v2, 0
s_cmp_eq_u64 s[0:1], 0
v_mov_b32_e32 v0, v2
s_cbranch_scc1 .LBB0_3
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[3:4], null, v1, s0, 0
s_mov_b32 s2, s8
s_mov_b32 s3, s9
s_mov_b64 s[12:13], s[0:1]
v_mov_b32_e32 v0, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[4:5], null, v1, s1, v[0:1]
v_mov_b32_e32 v0, 0
v_lshlrev_b64 v[3:4], 2, v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v3, vcc_lo, s4, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
.LBB0_2:
global_load_b32 v5, v[3:4], off
s_load_b32 s14, s[2:3], 0x0
v_add_co_u32 v3, vcc_lo, v3, 4
s_add_u32 s12, s12, -1
v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
s_addc_u32 s13, s13, -1
s_add_u32 s2, s2, 4
s_addc_u32 s3, s3, 0
s_cmp_eq_u64 s[12:13], 0
s_waitcnt vmcnt(0) lgkmcnt(0)
v_fmac_f32_e32 v0, s14, v5
s_cbranch_scc0 .LBB0_2
.LBB0_3:
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[3:4], null, v1, s0, v[1:2]
v_mad_u64_u32 v[5:6], null, v1, s1, v[4:5]
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mov_b32_e32 v4, v5
v_add_co_u32 v5, vcc_lo, s6, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo
v_lshlrev_b64 v[3:4], 2, v[3:4]
global_load_b32 v5, v[5:6], off
v_add_co_u32 v3, vcc_lo, s4, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
global_load_b32 v6, v[3:4], off
v_add_co_u32 v3, vcc_lo, s8, v1
v_add_co_ci_u32_e32 v4, vcc_lo, s9, v2, vcc_lo
global_load_b32 v3, v[3:4], off
s_waitcnt vmcnt(2)
v_sub_f32_e32 v0, v5, v0
s_waitcnt vmcnt(1)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_div_scale_f32 v4, null, v6, v6, v0
v_div_scale_f32 v8, vcc_lo, v0, v6, v0
v_rcp_f32_e32 v5, v4
s_waitcnt_depctr 0xfff
v_fma_f32 v7, -v4, v5, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v5, v7, v5
v_mul_f32_e32 v7, v8, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v9, -v4, v7, v8
v_fmac_f32_e32 v7, v9, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v4, -v4, v7, v8
v_div_fmas_f32 v4, v4, v5, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_div_fixup_f32 v0, v4, v6, v0
s_waitcnt vmcnt(0)
v_add_f32_e32 v3, v3, v0
v_add_co_u32 v0, vcc_lo, s10, v1
v_add_co_ci_u32_e32 v1, vcc_lo, s11, v2, vcc_lo
global_store_b32 v[0:1], v3, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| Solve | 8,207 | 1,682 | stackv2-00000-of-00015 |
// Demangled: saxpy(int, float, float*, float*)
Function : _Z5saxpyifPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R7, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R7, R7, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x384] &wr=0x2 ?trans6;
LDC.64 R4, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD.WIDE R2, R7, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
IMAD.WIDE R4, R7, 0x4, R4 &req={3} ?WAIT5_END_GROUP;
LDG.E R7, desc[UR4][R4.64] &wr=0x2 ?trans2;
FFMA R7, R2, UR6, R7 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R7 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
EXIT ?trans5;
BRA 0x140;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: saxpy(int, float, float*, float*)
_Z5saxpyifPfS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b64 s[2:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
v_cmp_gt_i32_e32 vcc_lo, s2, v1
s_and_saveexec_b32 s2, vcc_lo
s_cbranch_execz .LBB0_2
s_load_b128 s[4:7], s[0:1], 0x8
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[0:1], off
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v3, s3, v2
global_store_b32 v[0:1], v3, off
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
.LBB0_2:
s_endpgm
| saxpy | 555 | 517 | stackv2-00000-of-00015 |
// Demangled: add(unsigned long, float*, float*)
Function : _Z3addmPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R4, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R2, R4, UR4, R3 &req={1} ?WAIT5_END_GROUP;
SHF.R.S32.HI R3, RZ, 0x1f, R2 ?WAIT5_END_GROUP;
ISETP.GE.U64.AND P0, PT, R2, UR8, PT &req={2} ?WAIT14_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU UR4, c[0x0][0x370] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans1;
LDCU.64 UR10, c[0x0][0x388] &wr=0x2 ?trans1;
LDCU.64 UR12, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R4, R4, UR4, RZ &req={0} ?WAIT5_END_GROUP;
SHF.R.S32.HI R5, RZ, 0x1f, R4 &req={3,2,1} ?WAIT7_END_GROUP;
SHF.L.U64.HI R7, R2.reuse, 0x2, R3 &req={0} ?trans1;
IMAD.SHL.U32 R6, R2, 0x4, RZ ?WAIT5_END_GROUP;
IADD.64 R8, R6.reuse, UR10 ?trans2;
IADD.64 R6, R6, UR12 ?WAIT5_END_GROUP;
LDG.E R8, desc[UR6][R8.64] &wr=0x2 ?trans4;
LDG.E R11, desc[UR6][R6.64] &wr=0x2 ?trans1;
IADD.64 R2, R4, R2 ?WAIT6_END_GROUP;
ISETP.GE.U64.AND P0, PT, R2, UR8, PT ?trans2;
FADD R11, R8, R11 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R6.64], R11 &rd=0x0 ?trans7;
@!P0 BRA 0xf0 ?trans5;
EXIT ?trans5;
BRA 0x1b0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: add(unsigned long, float*, float*)
_Z3addmPfS_:
s_clause 0x1
s_load_b32 s8, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_mov_b32 s9, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s8, s8, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_u64_e64 s[4:5], v[1:2]
s_cbranch_execz .LBB0_3
s_load_b32 s9, s[2:3], 0x0
s_load_b64 s[2:3], s[0:1], 0x10
v_lshlrev_b64 v[3:4], 2, v[1:2]
s_mov_b32 s1, 0
s_waitcnt lgkmcnt(0)
s_mul_i32 s8, s9, s8
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_ashr_i32 s9, s8, 31
s_lshl_b64 s[10:11], s[8:9], 2
.LBB0_2:
v_add_co_u32 v5, vcc_lo, s6, v3
v_add_co_ci_u32_e32 v6, vcc_lo, s7, v4, vcc_lo
v_add_co_u32 v7, vcc_lo, s2, v3
v_add_co_ci_u32_e32 v8, vcc_lo, s3, v4, vcc_lo
v_add_co_u32 v1, vcc_lo, v1, s8
global_load_b32 v0, v[5:6], off
global_load_b32 v5, v[7:8], off
v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo
v_add_co_u32 v3, s0, v3, s10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v4, s0, s11, v4, s0
v_cmp_le_u64_e32 vcc_lo, s[4:5], v[1:2]
s_or_b32 s1, vcc_lo, s1
s_waitcnt vmcnt(0)
v_add_f32_e32 v0, v0, v5
global_store_b32 v[7:8], v0, off
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execnz .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| add | 740 | 823 | stackv2-00000-of-00015 |
// Demangled: bitonic_sort_step(int*, int, int)
Function : _Z17bitonic_sort_stepPiii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R7, SR_TID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD R7, R0, UR4, R7 &req={1} ?WAIT5_END_GROUP;
LOP3.LUT R9, R7, UR5, RZ, 0x3c, !PT &req={2} ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R9, R7, PT ?WAIT13_END_GROUP;
@!P0 EXIT &req={0} ?trans5;
LDCU UR4, c[0x0][0x38c] &wr=0x0 ?trans2;
LOP3.LUT P0, RZ, R7, UR4, RZ, 0xc0, !PT &req={0} ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?WAIT12_END_GROUP;
@P0 BRA 0x170 ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x1 ?trans2;
IMAD.WIDE.U32 R2, R7, 0x4, R4 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R9, 0x4, R4 ?trans1;
LDG.E R7, desc[UR4][R2.64] &req={0} &wr=0x2 ?trans4;
LDG.E R0, desc[UR4][R4.64] &wr=0x2 ?trans2;
ISETP.GT.AND P0, PT, R7, R0, PT &req={2} ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
STG.E desc[UR4][R2.64], R0 ?trans4;
STG.E desc[UR4][R4.64], R7 ?trans1;
EXIT ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans2;
IMAD.WIDE.U32 R4, R7, 0x4, R2 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R9, 0x4, R2 ?trans1;
LDG.E R7, desc[UR4][R4.64] &req={0} &wr=0x2 ?trans4;
LDG.E R0, desc[UR4][R2.64] &wr=0x2 ?trans2;
ISETP.GE.AND P0, PT, R7, R0, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
STG.E desc[UR4][R4.64], R0 ?trans4;
STG.E desc[UR4][R2.64], R7 ?trans1;
EXIT ?trans5;
BRA 0x210;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: bitonic_sort_step(int*, int, int)
_Z17bitonic_sort_stepPiii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x1c
s_load_b64 s[2:3], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[4:5], null, s15, s4, v[0:1]
v_xor_b32_e32 v0, s2, v4
s_mov_b32 s2, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_u32_e64 v0, v4
s_cbranch_execz .LBB0_7
s_load_b64 s[0:1], s[0:1], 0x0
v_mov_b32_e32 v5, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[4:5]
v_dual_mov_b32 v1, v5 :: v_dual_and_b32 v4, s3, v4
v_lshlrev_b64 v[5:6], 2, v[0:1]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v0, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v2, vcc_lo, s0, v5
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v6, vcc_lo
s_mov_b32 s0, 0
s_clause 0x1
global_load_b32 v5, v[0:1], off
global_load_b32 v6, v[2:3], off
s_mov_b32 s1, exec_lo
v_cmpx_ne_u32_e32 0, v4
s_xor_b32 s1, exec_lo, s1
s_cbranch_execz .LBB0_3
s_waitcnt vmcnt(0)
v_cmp_lt_i32_e32 vcc_lo, v5, v6
s_and_b32 s0, vcc_lo, exec_lo
.LBB0_3:
s_and_not1_saveexec_b32 s1, s1
s_cbranch_execz .LBB0_5
s_waitcnt vmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, v5, v6
s_and_not1_b32 s0, s0, exec_lo
s_and_b32 s2, vcc_lo, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s0, s0, s2
.LBB0_5:
s_or_b32 exec_lo, exec_lo, s1
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 exec_lo, exec_lo, s0
s_cbranch_execz .LBB0_7
s_waitcnt vmcnt(0)
s_clause 0x1
global_store_b32 v[0:1], v6, off
global_store_b32 v[2:3], v5, off
.LBB0_7:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| bitonic_sort_step | 866 | 932 | stackv2-00000-of-00015 |
// Demangled: foo(int*)
Function : _Z3fooPi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans2;
STG.E desc[UR4][R2.64], RZ &req={0} ?trans1;
EXIT ?trans5;
BRA 0x50;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: foo(int*)
_Z3fooPi:
s_load_b64 s[0:1], s[0:1], 0x0
v_mov_b32_e32 v0, 0
s_waitcnt lgkmcnt(0)
global_store_b32 v0, v0, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| foo | 171 | 92 | stackv2-00000-of-00015 |
// Demangled: quickfix(int*, int)
Function : _Z8quickfixPii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans8;
LDC R5, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans2;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64+-0x4], RZ &req={1} ?trans1;
EXIT ?trans5;
BRA 0x70;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: quickfix(int*, int)
_Z8quickfixPii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x8
s_load_b64 s[0:1], s[0:1], 0x0
v_mov_b32_e32 v0, 0
s_waitcnt lgkmcnt(0)
s_ashr_i32 s3, s2, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[2:3], s[2:3], 2
s_add_u32 s0, s0, s2
s_addc_u32 s1, s1, s3
global_store_b32 v0, v0, s[0:1] offset:-4
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| quickfix | 228 | 223 | stackv2-00000-of-00015 |
// Demangled: diff_gpu_3d(double*, double const*, double, double, double, int, int, int, int, int, int, int, int)
Function : _Z11diff_gpu_3dPdPKddddiiiiiiii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_TID.Y &wr=0x1 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x2 ?trans1;
LDCU.128 UR8, c[0x0][0x3b0] &wr=0x3 ?trans1;
S2R R3, SR_TID.X &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x3a8] &wr=0x4 ?trans1;
S2R R4, SR_CTAID.Z &wr=0x5 ?trans4;
S2UR UR5, SR_CTAID.Y &wr=0x1 ?trans8;
LDC R2, c[0x0][0x364] &wr=0x1 ?trans8;
S2UR UR4, SR_CTAID.X &wr=0x2 ?trans1;
IMAD R2, R2, UR5, R5 &req={1} ?WAIT5_END_GROUP;
IADD3 R2, PT, PT, R2, UR8, RZ &req={3} ?trans1;
IMAD R0, R0, UR4, R3 &req={2} ?WAIT4_END_GROUP;
ISETP.GE.AND P0, PT, R2, UR9, PT ?trans1;
IADD3 R3, PT, PT, R0, UR6, RZ &req={4} ?trans2;
IADD3 R0, PT, PT, R4, UR10, RZ &req={5} ?WAIT3_END_GROUP;
ISETP.GE.OR P0, PT, R3, UR7, P0 ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R0, UR11, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R4, c[0x0][0x3c0] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R6, c[0x0][0x388] &wr=0x2 ?trans1;
UMOV.64 UR6, 0x3f5c71c71c71c71c ?trans1;
LDCU.128 UR8, c[0x0][0x390] &wr=0x3 ?trans6;
LDC.64 R34, c[0x0][0x380] &wr=0x4 ?trans1;
IMAD R2, R2, R4, R3 &req={0} ?trans1;
SHF.R.S32.HI R3, RZ, 0x1f, R4 ?WAIT3_END_GROUP;
IMAD R0, R0, R5, R2 ?trans1;
MOV R2, R4 ?WAIT3_END_GROUP;
IMAD R15, R4, -0x3, R0 ?trans2;
IADD.64 R8, R2, R2 ?trans2;
IMAD.WIDE R26, R0, 0x8, R6 &req={2} ?trans2;
IADD.64 R10, R2, R8 ?trans2;
IMAD.SHL.U32 R12, R8.reuse, 0x8, RZ ?trans1;
SHF.L.U64.HI R13, R8, 0x3, R9 ?trans1;
IMAD.WIDE R2, R15, 0x8, R6 ?trans1;
LEA R16, P0, R10, R26, 0x3 ?trans1;
LDG.E.64.CONSTANT R24, desc[UR4][R26.64+-0x10] &req={1} &wr=0x2 ?trans2;
IADD.64 R14, R26, R12 ?WAIT2_END_GROUP;
LDG.E.64.CONSTANT R8, desc[UR4][R2.64] &wr=0x5 ?trans1;
LEA.HI.X R17, R10, R27, R11, 0x3, P0 ?trans1;
IMAD.WIDE R10, R4, 0x8, R2 ?trans2;
LDG.E.64.CONSTANT R22, desc[UR4][R26.64+-0x18] &wr=0x2 ?trans4;
LDG.E.64.CONSTANT R10, desc[UR4][R10.64] &wr=0x2 ?trans4;
LDG.E.64.CONSTANT R14, desc[UR4][R14.64] &wr=0x2 ?trans4;
LDG.E.64.CONSTANT R16, desc[UR4][R16.64] &wr=0x5 ?trans1;
IADD.64 R32, R2, R12 ?WAIT2_END_GROUP;
IMAD.WIDE R30, R4, 0x8, R26 ?trans1;
LDG.E.64.CONSTANT R20, desc[UR4][R26.64+0x18] &wr=0x3 ?trans4;
LDG.E.64.CONSTANT R32, desc[UR4][R32.64] &wr=0x3 ?trans4;
LDG.E.64.CONSTANT R30, desc[UR4][R30.64] &wr=0x3 ?trans4;
LDG.E.64.CONSTANT R18, desc[UR4][R26.64+-0x8] &wr=0x3 ?trans1;
IMAD.WIDE R34, R0, 0x8, R34 &req={4} ?WAIT5_END_GROUP;
LDG.E.64 R36, desc[UR4][R34.64] &wr=0x4 ?trans1;
DADD R12, R10, R14 &req={2} &rd=0x0 &wr=0x1 ?trans2;
IMAD R11, R5, -0x3, R0 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R10, R11, 0x8, R6 ?WAIT4_END_GROUP;
IMAD.WIDE R14, R5, 0x8, R10 ?WAIT6_END_GROUP;
LDG.E.64.CONSTANT R14, desc[UR4][R14.64] &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, R8, R16 &req={5} &rd=0x0 ?trans2;
LDG.E.64.CONSTANT R16, desc[UR4][R26.64+0x8] &req={0} &wr=0x5 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R12, R12, 0.09375 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R8, UR6, -R12 &req={0} &rd=0x0 ?trans2;
SHF.R.S32.HI R9, RZ, 0x1f, R5 &req={0} ?trans1;
MOV R8, R5 ?WAIT5_END_GROUP;
IADD.64 R12, R8, R8 ?WAIT4_END_GROUP;
IADD.64 R8, R8, R12 ?WAIT3_END_GROUP;
SHF.L.U64.HI R13, R12.reuse, 0x3, R13 ?trans1;
IMAD.SHL.U32 R12, R12, 0x8, RZ ?trans1;
LEA R28, P0, R8, R26, 0x3 ?WAIT4_END_GROUP;
IADD.64 R6, R26, R12.reuse ?trans2;
IADD.64 R12, R10, R12 ?trans2;
LDG.E.64.CONSTANT R10, desc[UR4][R10.64] &wr=0x2 ?trans1;
LEA.HI.X R29, R8, R27, R9, 0x3, P0 ?trans1;
IMAD.WIDE R8, R5, 0x8, R26 ?trans2;
LDG.E.64.CONSTANT R4, desc[UR4][R26.64+0x10] &wr=0x2 ?trans4;
LDG.E.64.CONSTANT R6, desc[UR4][R6.64] &wr=0x4 ?trans4;
LDG.E.64.CONSTANT R28, desc[UR4][R28.64] &wr=0x4 ?trans4;
LDG.E.64.CONSTANT R8, desc[UR4][R8.64] &wr=0x4 ?trans4;
LDG.E.64.CONSTANT R12, desc[UR4][R12.64] &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
DADD R30, R32, R30 &req={3} &rd=0x0 &wr=0x1 ?trans2;
LDG.E.64.CONSTANT R32, desc[UR4][R26.64] &req={0} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R22, R20 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R18, R16 &req={5} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R30, 1.359375, R2 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R4, R24, R4 &req={2} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R6, R14, R6 &req={4} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R4, R4, 0.09375 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, R10, R28 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R6, R6, 0.09375 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R20, UR6, -R4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R10, UR6, -R6 &req={1} ?trans1;
UMOV.64 UR6, 0x4004471c71c71c72 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, R12, R8 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R16, 1.359375, R4 &req={0} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R8, 1.359375, R6 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R32, -UR6, R4 &req={3} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R32, -UR6, R2 &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R32, -UR6, R6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3fb999999999999a ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R4, R4, UR6 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R2, R2, UR6 &req={2} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R6, R6, UR6 &req={0} ?trans1;
LDCU.64 UR6, c[0x0][0x3a0] &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R2, R2, UR10 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R4, UR8, R2 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R6, UR6, R2 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R2, R2, R36 &req={0} &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R34.64], R2 &req={0} ?trans1;
EXIT ?trans5;
BRA 0xd60;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: diff_gpu_3d(double*, double const*, double, double, double, int, int, int, int, int, int, int, int)
_Z11diff_gpu_3dPdPKddddiiiiiiii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x54
s_load_b256 s[4:11], s[0:1], 0x28
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v2, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s2, 0xffff
s_lshr_b32 s2, s2, 16
s_mul_i32 s13, s13, s3
s_mul_i32 s14, s14, s2
v_add3_u32 v0, s13, s4, v1
v_add3_u32 v1, s14, s6, v2
s_add_i32 s3, s15, s8
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_gt_i32_e32 vcc_lo, s5, v0
v_cmp_gt_i32_e64 s2, s7, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
s_and_b32 s2, vcc_lo, s2
s_cmp_lt_i32 s3, s9
s_cselect_b32 s4, -1, 0
s_and_b32 s2, s4, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s4, s2
s_cbranch_execz .LBB0_2
v_mul_lo_u32 v1, v1, s10
s_mul_i32 s3, s3, s11
s_load_b256 s[12:19], s[0:1], 0x0
s_lshl_b32 s2, s10, 1
s_mov_b32 s4, 0x71c71c72
s_mov_b32 s5, 0xc004471c
s_load_b64 s[0:1], s[0:1], 0x20
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add3_u32 v12, v0, s3, v1
s_ashr_i32 s3, s10, 31
v_subrev_nc_u32_e32 v0, s2, v12
v_add3_u32 v2, s10, s10, v12
s_mul_i32 s2, s10, 3
v_ashrrev_i32_e32 v13, 31, v12
v_add3_u32 v26, s11, s11, v12
v_ashrrev_i32_e32 v1, 31, v0
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[18:19], 3, v[12:13]
v_ashrrev_i32_e32 v27, 31, v26
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[0:1], 3, v[0:1]
v_lshlrev_b64 v[3:4], 3, v[2:3]
v_add_nc_u32_e32 v2, s10, v2
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[30:31], 3, v[26:27]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s14, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s15, v1, vcc_lo
v_add_co_u32 v3, vcc_lo, s14, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s15, v4, vcc_lo
s_clause 0x1
global_load_b64 v[14:15], v[0:1], off
global_load_b64 v[16:17], v[3:4], off
v_subrev_nc_u32_e32 v0, s2, v12
v_ashrrev_i32_e32 v3, 31, v2
s_lshl_b32 s2, s11, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_subrev_nc_u32_e32 v10, s2, v12
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[2:3], 3, v[2:3]
s_mov_b32 s2, s10
v_ashrrev_i32_e32 v11, 31, v10
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[0:1], 3, v[0:1]
s_lshl_b64 s[2:3], s[2:3], 3
v_lshlrev_b64 v[10:11], 3, v[10:11]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v0, vcc_lo, s14, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s15, v1, vcc_lo
v_add_co_u32 v20, vcc_lo, s14, v18
v_add_co_ci_u32_e32 v21, vcc_lo, s15, v19, vcc_lo
v_add_co_u32 v8, vcc_lo, s14, v2
v_add_co_ci_u32_e32 v9, vcc_lo, s15, v3, vcc_lo
s_clause 0x3
global_load_b64 v[22:23], v[0:1], off
global_load_b128 v[0:3], v[20:21], off offset:8
global_load_b128 v[4:7], v[20:21], off offset:-24
global_load_b64 v[24:25], v[8:9], off
v_subrev_nc_u32_e32 v8, s10, v12
global_load_b64 v[28:29], v[20:21], off offset:24
v_ashrrev_i32_e32 v9, 31, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[8:9], 3, v[8:9]
v_add_co_u32 v8, vcc_lo, s14, v8
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v9, vcc_lo, s15, v9, vcc_lo
v_add_co_u32 v32, vcc_lo, v20, s2
v_add_co_ci_u32_e32 v33, vcc_lo, s3, v21, vcc_lo
v_add_co_u32 v30, vcc_lo, s14, v30
v_add_co_ci_u32_e32 v31, vcc_lo, s15, v31, vcc_lo
v_add_co_u32 v10, vcc_lo, s14, v10
v_add_co_ci_u32_e32 v11, vcc_lo, s15, v11, vcc_lo
s_clause 0x3
global_load_b64 v[34:35], v[8:9], off
global_load_b64 v[32:33], v[32:33], off
global_load_b64 v[30:31], v[30:31], off
global_load_b64 v[36:37], v[10:11], off
s_mul_i32 s2, s11, 3
v_add_nc_u32_e32 v10, s11, v26
v_subrev_nc_u32_e32 v8, s2, v12
v_subrev_nc_u32_e32 v12, s11, v12
s_ashr_i32 s3, s11, 31
s_mov_b32 s2, s11
v_ashrrev_i32_e32 v11, 31, v10
v_ashrrev_i32_e32 v9, 31, v8
v_ashrrev_i32_e32 v13, 31, v12
s_lshl_b64 s[2:3], s[2:3], 3
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[10:11], 3, v[10:11]
v_lshlrev_b64 v[8:9], 3, v[8:9]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[12:13], 3, v[12:13]
v_add_co_u32 v26, vcc_lo, s14, v8
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v27, vcc_lo, s15, v9, vcc_lo
v_add_co_u32 v38, vcc_lo, s14, v10
v_add_co_ci_u32_e32 v39, vcc_lo, s15, v11, vcc_lo
s_clause 0x2
global_load_b128 v[8:11], v[20:21], off offset:-8
global_load_b64 v[26:27], v[26:27], off
global_load_b64 v[38:39], v[38:39], off
v_add_co_u32 v12, vcc_lo, s14, v12
v_add_co_ci_u32_e32 v13, vcc_lo, s15, v13, vcc_lo
v_add_co_u32 v20, vcc_lo, v20, s2
v_add_co_ci_u32_e32 v21, vcc_lo, s3, v21, vcc_lo
s_clause 0x1
global_load_b64 v[12:13], v[12:13], off
global_load_b64 v[20:21], v[20:21], off
s_mov_b32 s2, 0x1c71c71c
s_mov_b32 s3, 0x3f5c71c7
s_waitcnt vmcnt(14)
v_add_f64 v[14:15], v[14:15], v[16:17]
v_add_co_u32 v16, vcc_lo, s12, v18
v_add_co_ci_u32_e32 v17, vcc_lo, s13, v19, vcc_lo
global_load_b64 v[18:19], v[16:17], off
s_waitcnt vmcnt(12)
v_add_f64 v[2:3], v[6:7], v[2:3]
s_waitcnt vmcnt(11)
v_add_f64 v[6:7], v[22:23], v[24:25]
s_waitcnt vmcnt(10)
v_add_f64 v[4:5], v[4:5], v[28:29]
v_mul_f64 v[14:15], 0x3fb80000, v[14:15]
s_waitcnt vmcnt(8)
v_add_f64 v[22:23], v[34:35], v[32:33]
v_mul_f64 v[2:3], 0x3fb80000, v[2:3]
s_delay_alu instid0(VALU_DEP_3)
v_fma_f64 v[6:7], v[6:7], s[2:3], -v[14:15]
s_waitcnt vmcnt(6)
v_add_f64 v[14:15], v[36:37], v[30:31]
s_waitcnt vmcnt(5)
v_add_f64 v[0:1], v[8:9], v[0:1]
s_waitcnt vmcnt(3)
v_add_f64 v[8:9], v[26:27], v[38:39]
s_waitcnt vmcnt(1)
v_add_f64 v[12:13], v[12:13], v[20:21]
v_fma_f64 v[2:3], v[4:5], s[2:3], -v[2:3]
v_fma_f64 v[4:5], 0x3ff5c000, v[22:23], v[6:7]
v_mul_f64 v[6:7], 0x3fb80000, v[14:15]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[0:1], 0x3ff5c000, v[0:1], v[2:3]
v_fma_f64 v[2:3], v[10:11], s[4:5], v[4:5]
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_fma_f64 v[4:5], v[8:9], s[2:3], -v[6:7]
s_mov_b32 s2, 0x9999999a
s_mov_b32 s3, 0x3fb99999
v_fma_f64 v[0:1], v[10:11], s[4:5], v[0:1]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mul_f64 v[2:3], v[2:3], s[2:3]
v_fma_f64 v[4:5], 0x3ff5c000, v[12:13], v[4:5]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mul_f64 v[0:1], v[0:1], s[2:3]
v_mul_f64 v[2:3], v[2:3], s[18:19]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[4:5], v[10:11], s[4:5], v[4:5]
v_fma_f64 v[0:1], v[0:1], s[16:17], v[2:3]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[2:3], v[4:5], s[2:3]
v_fma_f64 v[0:1], v[2:3], s[0:1], v[0:1]
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_add_f64 v[0:1], v[18:19], v[0:1]
global_store_b64 v[16:17], v[0:1], off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| diff_gpu_3d | 3,964 | 4,256 | stackv2-00000-of-00015 |
// Demangled: diff_gpu_3d_s2d(double*, double const*, double, double, double, int, int, int, int, int, int, int, int, int)
Function : _Z15diff_gpu_3d_s2dPdPKddddiiiiiiiii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R26, SR_TID.Y &wr=0x1 ?trans7;
LDC R27, c[0x0][0x360] &wr=0x2 ?trans1;
LDCU.128 UR8, c[0x0][0x3b0] &wr=0x3 ?trans1;
S2R R28, SR_TID.X &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x3a8] &wr=0x4 ?trans1;
S2R R3, SR_CTAID.Z &wr=0x5 ?trans4;
S2UR UR5, SR_CTAID.Y &wr=0x1 ?trans8;
LDC R6, c[0x0][0x364] &wr=0x1 ?trans8;
S2UR UR4, SR_CTAID.X &wr=0x2 ?trans1;
IMAD R2, R6, UR5, R26 &req={1} ?WAIT5_END_GROUP;
IADD3 R8, PT, PT, R2, UR8, RZ &req={3} ?trans1;
IMAD R0, R27, UR4, R28 &req={2} ?WAIT4_END_GROUP;
ISETP.GE.AND P0, PT, R8, UR9, PT ?trans1;
IADD3 R7, PT, PT, R0, UR6, RZ &req={4} ?trans2;
IADD3 R0, PT, PT, R3, UR10, RZ &req={5} ?WAIT3_END_GROUP;
ISETP.GE.OR P0, PT, R7, UR7, P0 ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R0, UR11, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R4, c[0x0][0x3c0] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x388] &wr=0x2 ?trans8;
LDC R29, c[0x0][0x3c8] &wr=0x3 ?trans8;
S2UR UR5, SR_CgaCtaId &wr=0x4 ?trans1;
IMAD R7, R8, R4, R7 &req={0} ?trans1;
SHF.R.S32.HI R9, RZ, 0x1f, R5 ?trans1;
UMOV.64 UR8, 0x3f5c71c71c71c71c ?trans1;
MOV R8, R5.reuse ?trans1;
IMAD R0, R0, R5, R7 ?trans1;
UMOV UR4, 0x400 ?trans1;
LDCU.64 UR10, c[0x0][0x380] &wr=0x0 ?trans2;
IADD.64 R10, R8, R8 ?WAIT2_END_GROUP;
IMAD.WIDE R24, R0, 0x8, R2 &req={2} ?trans2;
IADD.64 R8, R8, R10 ?trans2;
IMAD R13, R5, -0x3, R0 ?trans1;
SHF.L.U64.HI R21, R10.reuse, 0x3, R11 ?trans1;
IMAD.SHL.U32 R20, R10, 0x8, RZ ?trans1;
LEA R22, P0, R8, R24, 0x3 ?trans1;
IMAD.WIDE R12, R13, 0x8, R2 ?WAIT3_END_GROUP;
LEA.HI.X R23, R8, R25, R9, 0x3, P0 ?trans1;
IADD.64 R18, R24, R20 ?trans2;
IMAD.WIDE R14, R5, 0x8, R24 ?trans1;
ISETP.GE.AND P0, PT, R26, R29, PT &req={3} ?trans1;
IADD.64 R20, R12, R20 ?trans2;
IMAD.WIDE R16, R5, 0x8, R12 ?trans1;
IADD3 R5, PT, PT, R6, -R29.reuse, RZ ?trans1;
LDG.E.64.CONSTANT R18, desc[UR6][R18.64] &req={1} &wr=0x2 ?trans1;
IADD3 R7, PT, PT, R27, -R29, RZ ?WAIT3_END_GROUP;
LDG.E.64.CONSTANT R16, desc[UR6][R16.64] &wr=0x2 ?trans1;
ISETP.GE.U32.AND P1, PT, R26, R5, PT ?trans1;
IMAD R5, R4, 0x3, RZ ?trans2;
LDG.E.64.CONSTANT R12, desc[UR6][R12.64] &wr=0x3 ?trans4;
LDG.E.64.CONSTANT R22, desc[UR6][R22.64] &wr=0x3 ?trans4;
LDG.E.64.CONSTANT R14, desc[UR6][R14.64] &wr=0x5 ?trans4;
LDG.E.64.CONSTANT R20, desc[UR6][R20.64] &wr=0x5 ?trans1;
ISETP.GE.U32.AND P3, PT, R28.reuse, R7, PT ?trans1;
ISETP.GE.AND P2, PT, R28, R29, PT ?trans1;
@!P0 IADD3 R9, PT, PT, R0, -R5, RZ ?trans1;
@P1 IMAD.WIDE R4, R5, 0x8, R24 ?trans1;
LDG.E.64.CONSTANT R6, desc[UR6][R24.64] &wr=0x3 ?trans3;
@!P0 IMAD.WIDE R8, R9, 0x8, R2 ?WAIT2_END_GROUP;
@P1 LDG.E.64.CONSTANT R4, desc[UR6][R4.64] &wr=0x3 ?trans4;
@!P0 LDG.E.64.CONSTANT R8, desc[UR6][R8.64] &wr=0x3 ?trans4;
@!P2 LDG.E.64.CONSTANT R2, desc[UR6][R24.64+-0x18] &wr=0x3 ?trans4;
@P3 LDG.E.64.CONSTANT R10, desc[UR6][R24.64+0x18] &rd=0x1 &wr=0x3 ?trans1;
IADD3 R26, PT, PT, R26, R29, RZ ?WAIT2_END_GROUP;
IADD3 R27, PT, PT, R27, R29.reuse, R29 ?trans2;
IADD3 R28, PT, PT, R28, R29, RZ ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={4} ?trans1;
DADD R16, R16, R18 &req={2} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, R12, R22 &req={3} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R16, R16, 0.09375 &req={2} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R14, R20, R14 &req={5} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R12, UR8, -R16 &req={2} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R14, 1.359375, R12 &req={2} &rd=0x2 ?trans2;
IMAD R14, R27, R26, R28 &req={2} ?WAIT4_END_GROUP;
IMAD R16, R27, -0x3, R14 ?trans1;
LEA R15, R14, UR4, 0x3 ?WAIT4_END_GROUP;
LEA R23, R16, UR4, 0x3 ?trans1;
IMAD R25, R27, 0x18, R15 &req={1} ?trans1;
STS.64 [R15], R6 ?trans4;
@!P0 STS.64 [R23], R8 ?trans4;
@P1 STS.64 [R25], R4 ?trans4;
@!P2 STS.64 [R15+-0x18], R2 &rd=0x1 ?trans4;
@P3 STS.64 [R15+0x18], R10 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS.64 R6, [R15+-0x10] ?trans4;
LDS.64 R4, [R15+0x10] &wr=0x2 ?trans1;
SHF.R.S32.HI R3, RZ, 0x1f, R0 &req={1} ?WAIT2_END_GROUP;
LEA R2, P0, R0.reuse, UR10, 0x3 &req={0} ?trans1;
LDS.64 R16, [R23] ?trans3;
LEA.HI.X R3, R0, UR11, R3, 0x3, P0 ?trans1;
LDS.64 R18, [R25] &wr=0x0 ?trans4;
LDS.64 R20, [R15+0x18] ?trans4;
LDS.64 R8, [R15+0x8] ?trans8;
DADD R4, R6, R4 &req={2} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R6, R4, 0.09375 &req={1} &rd=0x1 ?trans2;
LDG.E.64 R4, desc[UR6][R2.64] &req={1} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R16, R18 &req={0} &rd=0x0 ?trans2;
LDS.64 R18, [R15+-0x18] &req={0} &wr=0x0 ?trans1;
IADD3 R0, PT, PT, -R27, R14, RZ ?WAIT4_END_GROUP;
LEA R0, R0, UR4, 0x3 ?WAIT15_END_GROUP;
NOP ?WAIT12_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R20 &req={0} &rd=0x0 &wr=0x1 ?trans2;
IMAD R20, R27, 0x8, R15 &req={0} ?WAIT5_END_GROUP;
LDS.64 R10, [R20] ?WAIT15_END_GROUP;
NOP ?WAIT12_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R18, UR8, -R6 &req={1} &rd=0x0 ?trans2;
LDS.64 R6, [R15+-0x8] &req={0} &wr=0x0 ?trans1;
IADD3 R14, PT, PT, R14, -R27, -R27 ?WAIT4_END_GROUP;
LEA R14, R14, UR4, 0x3 ?WAIT15_END_GROUP;
NOP ?WAIT12_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R6, R6, R8 &req={0} &rd=0x0 &wr=0x1 ?trans2;
LDS.64 R8, [R0] &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R6, 1.359375, R18 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R8, R10 &req={0} &rd=0x0 ?trans2;
IMAD R10, R27, 0x8, R20 &req={0} ?trans1;
LDS.64 R8, [R14] ?trans5;
LDS.64 R10, [R10] &wr=0x0 ?trans1;
UMOV.64 UR4, 0x4004471c71c71c72 ?WAIT15_END_GROUP;
NOP ?WAIT10_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, R8, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R8, 0.09375 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R16, UR8, -R8 &req={0} &wr=0x0 ?trans1;
LDCU.128 UR8, c[0x0][0x390] &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R18, 1.359375, R8 &req={0} &rd=0x0 &wr=0x3 ?trans2;
LDS.64 R8, [R15] &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R8, -UR4, R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R8, -UR4, R6 &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R8, -UR4, R18 &req={3} &wr=0x3 ?trans1;
UMOV.64 UR4, 0x3fb999999999999a ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R12, R12, UR4 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R6, R6, UR4 &req={4} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R18, R18, UR4 &req={3} &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x3a0] &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R18, R18, UR10 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R6, UR8, R18 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R12, UR4, R6 &req={0} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R4, R6, R4 &req={2} &wr=0x0 ?trans2;
STG.E.64 desc[UR6][R2.64], R4 &req={0} ?trans1;
EXIT ?trans5;
BRA 0xed0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: diff_gpu_3d_s2d(double*, double const*, double, double, double, int, int, int, int, int, int, int, int, int)
_Z15diff_gpu_3d_s2dPdPKddddiiiiiiiii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x5c
s_load_b256 s[4:11], s[0:1], 0x28
v_and_b32_e32 v9, 0x3ff, v0
v_bfe_u32 v8, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_and_b32 s12, s2, 0xffff
s_lshr_b32 s16, s2, 16
s_mul_i32 s13, s13, s12
s_mul_i32 s14, s14, s16
v_add3_u32 v0, s13, s4, v9
v_add3_u32 v1, s14, s6, v8
s_add_i32 s4, s15, s8
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_gt_i32_e32 vcc_lo, s5, v0
v_cmp_gt_i32_e64 s2, s7, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
s_and_b32 s2, vcc_lo, s2
s_cmp_lt_i32 s4, s9
s_cselect_b32 s3, -1, 0
s_and_b32 s2, s3, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB1_10
v_mul_lo_u32 v1, v1, s10
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x8
s_load_b32 s7, s[0:1], 0x48
s_mul_i32 s4, s4, s11
s_mov_b32 s5, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add3_u32 v2, v0, s4, v1
s_mul_i32 s4, s10, 3
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[0:1], 3, v[2:3]
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v5, s7, v8
s_lshl_b32 s6, s7, 1
v_add_co_u32 v3, vcc_lo, s2, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_add_co_ci_u32_e32 v4, vcc_lo, s3, v1, vcc_lo
s_add_i32 s6, s6, s12
v_mul_lo_u32 v5, s6, v5
global_load_b64 v[10:11], v[3:4], off
s_mul_i32 s8, s6, 3
v_add3_u32 v6, v9, s7, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v7, s8, v6
v_lshl_add_u32 v5, v6, 3, 0
v_lshl_add_u32 v7, v7, 3, 0
s_waitcnt vmcnt(0)
ds_store_b64 v5, v[10:11]
v_cmpx_gt_i32_e64 s7, v8
s_cbranch_execz .LBB1_3
v_subrev_nc_u32_e32 v10, s4, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v11, 31, v10
v_lshlrev_b64 v[10:11], 3, v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v10, vcc_lo, s2, v10
v_add_co_ci_u32_e32 v11, vcc_lo, s3, v11, vcc_lo
global_load_b64 v[10:11], v[10:11], off
s_waitcnt vmcnt(0)
ds_store_b64 v7, v[10:11]
.LBB1_3:
s_or_b32 exec_lo, exec_lo, s5
s_sub_i32 s5, s16, s7
s_mov_b32 s9, exec_lo
v_cmpx_le_u32_e64 s5, v8
s_cbranch_execz .LBB1_5
s_ashr_i32 s5, s4, 31
v_lshl_add_u32 v8, s8, 3, v5
s_lshl_b64 s[4:5], s[4:5], 3
s_delay_alu instid0(SALU_CYCLE_1)
v_add_co_u32 v10, vcc_lo, v3, s4
v_add_co_ci_u32_e32 v11, vcc_lo, s5, v4, vcc_lo
global_load_b64 v[10:11], v[10:11], off
s_waitcnt vmcnt(0)
ds_store_b64 v8, v[10:11]
.LBB1_5:
s_or_b32 exec_lo, exec_lo, s9
s_load_b64 s[4:5], s[0:1], 0x0
v_subrev_nc_u32_e32 v8, 24, v5
s_mov_b32 s8, exec_lo
v_cmpx_gt_i32_e64 s7, v9
s_cbranch_execz .LBB1_7
global_load_b64 v[10:11], v[3:4], off offset:-24
s_waitcnt vmcnt(0)
ds_store_b64 v8, v[10:11]
.LBB1_7:
s_or_b32 exec_lo, exec_lo, s8
s_sub_i32 s7, s12, s7
s_delay_alu instid0(SALU_CYCLE_1)
v_cmp_le_u32_e32 vcc_lo, s7, v9
s_and_saveexec_b32 s7, vcc_lo
s_cbranch_execz .LBB1_9
global_load_b64 v[9:10], v[3:4], off offset:24
s_waitcnt vmcnt(0)
ds_store_b64 v5, v[9:10] offset:24
.LBB1_9:
s_or_b32 exec_lo, exec_lo, s7
v_add3_u32 v9, s11, s11, v2
s_lshl_b32 s7, s11, 1
s_waitcnt lgkmcnt(0)
v_subrev_nc_u32_e32 v11, s7, v2
s_barrier
v_ashrrev_i32_e32 v10, 31, v9
buffer_gl0_inv
s_mul_i32 s7, s11, 3
v_ashrrev_i32_e32 v12, 31, v11
s_ashr_i32 s9, s11, 31
v_lshlrev_b64 v[13:14], 3, v[9:10]
s_mov_b32 s8, s11
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[10:11], 3, v[11:12]
s_lshl_b64 s[8:9], s[8:9], 3
v_add_co_u32 v12, vcc_lo, s2, v13
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v13, vcc_lo, s3, v14, vcc_lo
v_add_co_u32 v10, vcc_lo, s2, v10
s_delay_alu instid0(VALU_DEP_4)
v_add_co_ci_u32_e32 v11, vcc_lo, s3, v11, vcc_lo
s_clause 0x1
global_load_b64 v[17:18], v[12:13], off
global_load_b64 v[19:20], v[10:11], off
v_subrev_nc_u32_e32 v10, s7, v2
v_add_nc_u32_e32 v12, s11, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v11, 31, v10
v_ashrrev_i32_e32 v13, 31, v12
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[9:10], 3, v[10:11]
v_lshlrev_b64 v[11:12], 3, v[12:13]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v9, vcc_lo, s2, v9
v_add_co_ci_u32_e32 v10, vcc_lo, s3, v10, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v11, vcc_lo, s2, v11
v_add_co_ci_u32_e32 v12, vcc_lo, s3, v12, vcc_lo
s_clause 0x1
global_load_b64 v[21:22], v[9:10], off
global_load_b64 v[23:24], v[11:12], off
v_subrev_nc_u32_e32 v9, s11, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v10, 31, v9
v_lshlrev_b64 v[9:10], 3, v[9:10]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v9, vcc_lo, s2, v9
v_add_co_ci_u32_e32 v10, vcc_lo, s3, v10, vcc_lo
v_add_co_u32 v2, vcc_lo, v3, s8
v_add_co_ci_u32_e32 v3, vcc_lo, s9, v4, vcc_lo
s_clause 0x1
global_load_b64 v[25:26], v[9:10], off
global_load_b64 v[27:28], v[2:3], off
s_lshl_b32 s2, s6, 1
s_lshl_b32 s3, s6, 3
v_subrev_nc_u32_e32 v2, s2, v6
v_add_nc_u32_e32 v4, s3, v5
v_add_co_u32 v31, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v32, vcc_lo, s5, v1, vcc_lo
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_lshl_add_u32 v2, v2, 3, 0
v_add_nc_u32_e32 v11, s3, v4
ds_load_b64 v[2:3], v2
ds_load_b64 v[9:10], v11
v_add_nc_u32_e32 v11, s3, v11
v_subrev_nc_u32_e32 v6, s6, v6
s_mov_b32 s2, 0x1c71c71c
s_mov_b32 s3, 0x3f5c71c7
s_mov_b32 s8, 0x71c71c72
ds_load_b64 v[29:30], v11
v_lshl_add_u32 v6, v6, 3, 0
s_mov_b32 s9, 0xc004471c
s_waitcnt lgkmcnt(1)
v_add_f64 v[2:3], v[2:3], v[9:10]
ds_load_2addr_b64 v[9:12], v5 offset0:1 offset1:2
ds_load_2addr_b64 v[13:16], v8 offset1:1
ds_load_b64 v[7:8], v7
global_load_b64 v[33:34], v[31:32], off
ds_load_b64 v[0:1], v5 offset:24
s_waitcnt lgkmcnt(2)
v_add_f64 v[11:12], v[15:16], v[11:12]
s_waitcnt lgkmcnt(1)
v_add_f64 v[7:8], v[7:8], v[29:30]
ds_load_b64 v[15:16], v6
ds_load_b64 v[29:30], v4
s_waitcnt lgkmcnt(2)
v_add_f64 v[13:14], v[13:14], v[0:1]
v_add_nc_u32_e32 v0, -8, v5
v_mul_f64 v[2:3], 0x3fb80000, v[2:3]
s_waitcnt lgkmcnt(0)
v_add_f64 v[15:16], v[15:16], v[29:30]
v_mul_f64 v[11:12], 0x3fb80000, v[11:12]
s_delay_alu instid0(VALU_DEP_3)
v_fma_f64 v[6:7], v[7:8], s[2:3], -v[2:3]
ds_load_2addr_b64 v[0:3], v0 offset1:1
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x10
s_load_b64 s[0:1], s[0:1], 0x20
v_fma_f64 v[4:5], v[13:14], s[2:3], -v[11:12]
s_waitcnt lgkmcnt(0)
v_add_f64 v[0:1], v[0:1], v[9:10]
v_fma_f64 v[6:7], 0x3ff5c000, v[15:16], v[6:7]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[0:1], 0x3ff5c000, v[0:1], v[4:5]
v_fma_f64 v[4:5], v[2:3], s[8:9], v[6:7]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_fma_f64 v[0:1], v[2:3], s[8:9], v[0:1]
s_waitcnt vmcnt(5)
v_add_f64 v[17:18], v[19:20], v[17:18]
s_waitcnt vmcnt(3)
v_add_f64 v[8:9], v[21:22], v[23:24]
v_mul_f64 v[10:11], 0x3fb80000, v[17:18]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
v_fma_f64 v[6:7], v[8:9], s[2:3], -v[10:11]
s_waitcnt vmcnt(1)
v_add_f64 v[8:9], v[25:26], v[27:28]
s_mov_b32 s2, 0x9999999a
s_mov_b32 s3, 0x3fb99999
v_mul_f64 v[4:5], v[4:5], s[2:3]
v_mul_f64 v[0:1], v[0:1], s[2:3]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[6:7], 0x3ff5c000, v[8:9], v[6:7]
v_mul_f64 v[4:5], v[4:5], s[6:7]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[2:3], v[2:3], s[8:9], v[6:7]
v_fma_f64 v[0:1], v[0:1], s[4:5], v[4:5]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[2:3], v[2:3], s[2:3]
v_fma_f64 v[0:1], v[2:3], s[0:1], v[0:1]
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_add_f64 v[0:1], v[33:34], v[0:1]
global_store_b64 v[31:32], v[0:1], off
.LBB1_10:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| diff_gpu_3d_s2d | 4,578 | 4,822 | stackv2-00000-of-00015 |
// Demangled: diff_gpu_3d_s3d(double*, double const*, double, double, double, int, int, int, int, int, int, int, int, int)
Function : _Z15diff_gpu_3d_s3dPdPKddddiiiiiiiii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R7, SR_TID.Y &wr=0x1 ?trans7;
S2UR UR5, SR_CTAID.Y &wr=0x2 ?trans1;
LDCU UR7, c[0x0][0x360] &wr=0x3 ?trans1;
S2R R3, SR_TID.X &wr=0x4 ?trans1;
LDCU UR10, c[0x0][0x364] &wr=0x2 ?trans5;
S2UR UR4, SR_CTAID.X &wr=0x3 ?trans1;
LDCU UR6, c[0x0][0x3b8] &wr=0x0 ?trans7;
LDC.64 R10, c[0x0][0x3b0] &wr=0x1 ?trans8;
LDC.64 R8, c[0x0][0x3a8] &wr=0x4 ?trans1;
UIMAD UR5, UR5, UR10, URZ &req={2} ?trans1;
UIMAD UR4, UR4, UR7, URZ &req={3} ?WAIT5_END_GROUP;
IADD3 R5, PT, PT, R10, UR5, R7 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, R11, PT ?trans1;
IADD3 R0, PT, PT, R8, UR4, R3 &req={4} ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R0, R9, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R42, c[0x0][0x3b8] &wr=0x0 ?trans2;
ISETP.GE.AND P0, PT, R42, R43, PT &req={0} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDC.64 R8, c[0x0][0x3c0] &wr=0x0 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R30, c[0x0][0x388] &wr=0x2 ?trans8;
LDC R32, c[0x0][0x3c8] &wr=0x3 ?trans8;
S2UR UR5, SR_CgaCtaId &wr=0x4 ?trans1;
IMAD R2, R5, R8, R0 &req={0} ?trans1;
SHF.R.S32.HI R11, RZ, 0x1f, R9 ?trans1;
UMOV UR4, 0x400 ?trans1;
MOV R10, R9.reuse ?trans1;
IMAD R2, R42, R9, R2 ?trans1;
LDCU UR20, c[0x0][0x3c8] &wr=0x0 ?trans3;
IADD.64 R12, R10, R10 ?WAIT2_END_GROUP;
IMAD R17, R9, -0x3, R2 ?trans1;
LDCU.64 UR16, c[0x0][0x3a0] &wr=0x0 ?trans1;
IADD.64 R14, R10, R12 ?trans2;
IMAD.WIDE R30, R17, 0x8, R30 &req={2} ?trans1;
LDCU UR21, c[0x0][0x3c4] &wr=0x2 ?trans1;
IADD.64 R16, R10, R14 ?WAIT3_END_GROUP;
LEA R28, P1, R12, R30, 0x3 ?trans1;
IADD.64 R18, R10, R16 ?trans2;
LDCU.128 UR12, c[0x0][0x390] &wr=0x0 ?trans1;
LEA.HI.X R29, R12, R31, R13, 0x3, P1 ?trans1;
IADD.64 R10, R10, R18 ?trans2;
IMAD.WIDE R12, R9, 0x8, R30 ?trans1;
LEA R26, P0, R14, R30.reuse, 0x3 ?trans1;
LDCU.64 UR18, c[0x0][0x380] &wr=0x0 ?trans1;
LEA R20, P1, R18, R30, 0x3 ?WAIT2_END_GROUP;
LEA R24, P2, R16, R30.reuse, 0x3 ?trans1;
LDG.E.64.CONSTANT R12, desc[UR8][R12.64] &req={1} &wr=0x5 ?trans1;
LEA.HI.X R27, R14, R31.reuse, R15, 0x3, P0 ?trans2;
LEA.HI.X R21, R18, R31.reuse, R19, 0x3, P1 ?trans2;
LEA R22, P0, R10, R30, 0x3 ?trans1;
LDG.E.64.CONSTANT R14, desc[UR8][R26.64] &wr=0x5 ?trans1;
LEA.HI.X R25, R16, R31.reuse, R17, 0x3, P2 ?trans2;
LEA.HI.X R23, R10, R31, R11, 0x3, P0 ?trans1;
LDG.E.64.CONSTANT R16, desc[UR8][R28.64] &wr=0x5 ?trans4;
LDG.E.64.CONSTANT R30, desc[UR8][R30.64] &wr=0x5 ?trans4;
LDG.E.64.CONSTANT R18, desc[UR8][R24.64] &wr=0x5 ?trans4;
LDG.E.64.CONSTANT R20, desc[UR8][R20.64] &wr=0x5 ?trans1;
IMAD R33, R42, R9, R0 ?trans1;
IADD3 R2, PT, PT, R5, -0x3, RZ ?WAIT2_END_GROUP;
IADD3 R0, PT, PT, R5, 0x3, RZ ?trans1;
LDG.E.64.CONSTANT R10, desc[UR8][R22.64] &rd=0x1 &wr=0x5 ?trans1;
IADD3 R4, PT, PT, R32, UR7, R32 &req={3} ?trans2;
IADD3 R6, PT, PT, R7, R32, RZ ?trans1;
IMAD R2, R2, R8.reuse, R33.reuse ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={4} ?trans1;
IMAD R5, R5, R8, R33.reuse ?trans1;
IADD3 R23, PT, PT, R3, R32, RZ &req={1} ?trans1;
IMAD R0, R0, R8, R33 ?trans1;
IADD3 R8, PT, PT, -R32, UR10, RZ ?WAIT3_END_GROUP;
IMAD R23, R4, R6, R23 ?trans1;
IADD3 R22, PT, PT, -R32, UR7, RZ ?trans1;
ISETP.GE.AND P0, PT, R7.reuse, R32, PT ?trans1;
ISETP.GE.U32.AND P1, PT, R7, R8, PT ?trans2;
LEA R7, R23, UR4, 0x3 ?trans1;
ISETP.GE.U32.AND P2, PT, R3, R22, PT ?trans1;
IMAD R22, R4.reuse, -0x3, R23 ?trans1;
IADD3 R40, PT, PT, -R4.reuse, R23, RZ ?trans2;
IADD3 R39, PT, PT, R23, -R4, -R4 ?trans1;
IMAD R38, R4, 0x8, R7.reuse ?trans1;
IADD3 R42, PT, PT, R42, -R43, RZ ?trans1;
IMAD.SHL.U32 R8, R9, 0x4, RZ ?trans1;
IADD3 R6, PT, PT, R43, -0x1, RZ ?trans1;
IMAD R41, R4, 0x18, R7 ?trans1;
LEA R9, R22, UR4, 0x3 ?trans1;
IMAD R4, R4, 0x8, R38 ?trans1;
LEA R39, R39, UR4, 0x3 ?WAIT2_END_GROUP;
LEA R40, R40, UR4, 0x3 &req={2,0} ?WAIT7_END_GROUP;
LDC.64 R36, c[0x0][0x388] &req={0} &wr=0x0 ?trans1;
ISETP.GE.AND P3, PT, R3, UR20, PT ?trans1;
@!P0 IMAD.WIDE R34, R2, 0x8, R36 &req={0} ?WAIT4_END_GROUP;
@P1 IMAD.WIDE R32, R0, 0x8, R36.reuse ?trans2;
@!P0 LDG.E.64.CONSTANT R34, desc[UR8][R34.64] &wr=0x2 ?trans2;
IMAD.WIDE R36, R5, 0x8, R36 ?trans2;
@P1 LDG.E.64.CONSTANT R32, desc[UR8][R32.64] &wr=0x3 ?trans4;
@!P3 LDG.E.64.CONSTANT R28, desc[UR8][R36.64+-0x18] &wr=0x4 ?trans4;
@P2 LDG.E.64.CONSTANT R26, desc[UR8][R36.64+0x18] &wr=0x4 ?trans1;
MOV.64 R24, R14 &req={5} ?WAIT2_END_GROUP;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
MOV.64 R22, R12 ?trans2;
MOV.64 R12, R16 ?trans2;
MOV.64 R16, R14 ?trans2;
MOV.64 R14, R18 ?trans2;
STS.64 [R7], R24 ?trans1;
MOV.64 R18, R20 ?WAIT2_END_GROUP;
MOV.64 R20, R10 ?trans2;
UMOV.64 UR4, 0x3f5c71c71c71c71c ?WAIT5_END_GROUP;
DADD R10, R20, R30 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R30, R18, R22 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R30, R30, 0.09375 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R30, R10, UR4, -R30 &req={0} &rd=0x0 ?trans1;
@!P0 STS.64 [R9], R34 &req={2} ?trans4;
@P1 STS.64 [R41], R32 &req={3} ?trans4;
@!P3 STS.64 [R7+-0x18], R28 &req={4} ?trans4;
@P2 STS.64 [R7+0x18], R26 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS.64 R10, [R7+-0x18] &req={0} ?trans4;
LDS.64 R44, [R7+0x18] &wr=0x0 ?trans4;
LDS.64 R24, [R7+-0x10] ?trans4;
LDS.64 R34, [R7+-0x8] ?trans4;
LDS.64 R26, [R39] ?trans4;
LDS.64 R32, [R38] ?WAIT15_END_GROUP;
NOP ?WAIT9_END_GROUP;
DADD R44, R10, R44 &req={0} &rd=0x0 ?trans2;
LDS.64 R10, [R7+0x10] &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, R24, R10 &req={0} &rd=0x0 ?trans2;
LDS.64 R24, [R7+0x8] &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R28, R34, R24 &req={0} &rd=0x0 ?trans2;
LDS.64 R24, [R9] &req={0} ?trans4;
LDS.64 R34, [R41] &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R34, R24, R34 &req={0} &rd=0x0 ?trans2;
LDS.64 R24, [R4] &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R24, R26, R24 &req={0} &rd=0x0 &wr=0x1 ?trans2;
SHF.R.S32.HI R26, RZ, 0x1f, R5 &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R24, R24, 0.09375 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R34, R34, UR4, -R24 &req={0} &rd=0x0 ?trans2;
LEA R24, P3, R5, UR18, 0x3 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R25, R5, UR19, R26, 0x3, P3 ?WAIT5_END_GROUP;
LDG.E.64 R26, desc[UR8][R24.64] &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT8_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R10, 0.09375 &wr=0x0 ?trans1;
ISETP.LE.AND P3, PT, R6, UR6, PT ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R44, UR4, -R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R28, R28, 1.359375, R10 &req={0} &rd=0x0 ?trans2;
LDS.64 R10, [R40] &req={0} &wr=0x0 ?trans1;
@!P3 IMAD.WIDE R36, R8, 0x8, R36 ?trans1;
IADD3 R42, PT, PT, R42, 0x1, RZ ?trans1;
UMOV.64 UR4, 0x4004471c71c71c72 ?trans1;
UMOV.64 UR10, 0x3fb999999999999a ?trans1;
UIADD3 UR6, UPT, UPT, UR6, 0x1, URZ ?trans1;
IADD3 R5, PT, PT, R5, UR21, RZ ?trans2;
IADD3 R2, PT, PT, R2, UR21, RZ ?WAIT15_END_GROUP;
NOP ?WAIT9_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R32, R10, R32 &req={0} &rd=0x0 &wr=0x1 ?trans2;
MOV.64 R10, R20 &req={0} ?WAIT7_END_GROUP;
@!P3 LDG.E.64.CONSTANT R10, desc[UR8][R36.64] &rd=0x0 &wr=0x5 ?trans1;
ISETP.NE.AND P3, PT, R42, RZ, PT ?WAIT15_END_GROUP;
NOP ?WAIT9_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R32, R32, 1.359375, R34 &req={1} &rd=0x1 &wr=0x3 ?trans2;
LDS.64 R34, [R7] &req={1} &wr=0x1 ?trans1;
IADD3 R0, PT, PT, R0, UR21, RZ ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R28, R34, -UR4, R28 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R34, R34, -UR4, R32 &req={3} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R32, R14, R12 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R30, R32, 1.359375, R30 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R32, R34, UR10 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R28, R28, UR10 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R32, R32, UR14 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R30, R16, -UR4, R30 &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R28, R28, UR12, R32 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R30, R30, UR10 &req={3} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R28, R30, UR16, R28 &req={1} &rd=0x1 &wr=0x2 ?trans2;
MOV.64 R30, R22 &req={1} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R26, R28, R26 &req={2} &wr=0x1 ?trans2;
STG.E.64 desc[UR8][R24.64], R26 &req={1} &rd=0x0 ?trans1;
@P3 BRA 0x590 ?trans5;
EXIT ?trans5;
BRA 0x1130;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: diff_gpu_3d_s3d(double*, double const*, double, double, double, int, int, int, int, int, int, int, int, int)
_Z15diff_gpu_3d_s3dPdPKddddiiiiiiiii:
s_clause 0x1
s_load_b256 s[4:11], s[0:1], 0x28
s_load_b32 s2, s[0:1], 0x5c
v_and_b32_e32 v13, 0x3ff, v0
v_bfe_u32 v14, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2)
v_add_nc_u32_e32 v15, s4, v13
s_and_b32 s3, s2, 0xffff
s_lshr_b32 s20, s2, 16
s_mul_i32 s24, s14, s3
s_mul_i32 s15, s15, s20
v_add_nc_u32_e32 v0, s24, v15
v_add3_u32 v12, s15, s6, v14
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_gt_i32_e32 vcc_lo, s5, v0
v_cmp_gt_i32_e64 s2, s7, v12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, vcc_lo, s2
s_and_saveexec_b32 s4, s2
s_cbranch_execz .LBB2_14
s_load_b32 s2, s[0:1], 0x48
s_cmp_ge_i32 s8, s9
s_cbranch_scc1 .LBB2_14
v_mul_lo_u32 v29, v12, s10
s_mul_i32 s6, s11, s8
s_load_b256 s[12:19], s[0:1], 0x0
s_mul_i32 s4, s11, 3
s_lshl_b32 s5, s11, 1
v_add_nc_u32_e32 v28, s6, v15
s_add_i32 s25, s9, -1
v_add_nc_u32_e32 v30, 3, v12
v_add3_u32 v0, v29, v0, s6
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v27, v28, v29
v_add_nc_u32_e32 v2, s4, v0
v_add_nc_u32_e32 v4, s11, v0
v_ashrrev_i32_e32 v1, 31, v0
v_subrev_nc_u32_e32 v6, s11, v0
v_subrev_nc_u32_e32 v8, s5, v0
v_ashrrev_i32_e32 v3, 31, v2
v_subrev_nc_u32_e32 v16, s11, v2
v_ashrrev_i32_e32 v5, 31, v4
v_subrev_nc_u32_e32 v10, s4, v0
v_lshlrev_b64 v[0:1], 3, v[0:1]
v_lshlrev_b64 v[2:3], 3, v[2:3]
v_ashrrev_i32_e32 v17, 31, v16
v_lshlrev_b64 v[4:5], 3, v[4:5]
v_ashrrev_i32_e32 v7, 31, v6
v_ashrrev_i32_e32 v9, 31, v8
v_ashrrev_i32_e32 v11, 31, v10
v_lshlrev_b64 v[16:17], 3, v[16:17]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s14, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s15, v3, vcc_lo
v_add_co_u32 v4, vcc_lo, s14, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s15, v5, vcc_lo
v_add_co_u32 v18, vcc_lo, s14, v16
v_lshlrev_b64 v[6:7], 3, v[6:7]
v_add_co_ci_u32_e32 v19, vcc_lo, s15, v17, vcc_lo
v_add_co_u32 v20, vcc_lo, s14, v0
v_add_co_ci_u32_e32 v21, vcc_lo, s15, v1, vcc_lo
v_lshlrev_b64 v[0:1], 3, v[8:9]
v_add_co_u32 v6, vcc_lo, s14, v6
v_lshlrev_b64 v[8:9], 3, v[10:11]
v_add_co_ci_u32_e32 v7, vcc_lo, s15, v7, vcc_lo
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_add_co_u32 v10, vcc_lo, s14, v0
v_add_co_ci_u32_e32 v11, vcc_lo, s15, v1, vcc_lo
v_add_co_u32 v22, vcc_lo, s14, v8
v_add_co_ci_u32_e32 v23, vcc_lo, s15, v9, vcc_lo
s_clause 0x6
global_load_b64 v[16:17], v[2:3], off
global_load_b64 v[0:1], v[18:19], off
global_load_b64 v[2:3], v[4:5], off
global_load_b64 v[4:5], v[20:21], off
global_load_b64 v[8:9], v[6:7], off
global_load_b64 v[6:7], v[10:11], off
global_load_b64 v[10:11], v[22:23], off
v_add_nc_u32_e32 v18, s2, v14
s_lshl_b32 s4, s2, 1
v_cmp_gt_i32_e32 vcc_lo, s2, v14
s_add_i32 s7, s4, s3
s_load_b64 s[4:5], s[0:1], 0x20
v_mul_lo_u32 v18, s7, v18
s_lshl_b32 s22, s7, 1
s_sub_i32 s0, s20, s2
s_mul_i32 s21, s7, 3
v_cmp_le_u32_e64 s0, s0, v14
v_cmp_gt_i32_e64 s1, s2, v13
s_delay_alu instid0(VALU_DEP_3)
v_add3_u32 v22, v13, s2, v18
s_sub_i32 s2, s3, s2
s_lshl_b32 s3, s7, 3
s_add_u32 s26, s14, 0xffffffe8
s_addc_u32 s27, s15, -1
v_lshl_add_u32 v18, v22, 3, 0
v_subrev_nc_u32_e32 v14, s22, v22
v_subrev_nc_u32_e32 v19, s21, v22
v_subrev_nc_u32_e32 v25, s7, v22
s_add_u32 s28, s14, 24
v_add_nc_u32_e32 v22, s3, v18
v_lshl_add_u32 v24, v14, 3, 0
v_add_nc_u32_e32 v14, -3, v12
v_cmp_le_u32_e64 s2, s2, v13
s_addc_u32 s29, s15, 0
v_add_nc_u32_e32 v26, s3, v22
s_add_i32 s3, s8, 4
v_mad_u64_u32 v[12:13], null, s10, v14, v[28:29]
v_mad_u64_u32 v[13:14], null, s10, v30, v[28:29]
s_mul_i32 s3, s11, s3
v_lshl_add_u32 v19, v19, 3, 0
v_lshl_add_u32 v20, s21, 3, v18
v_subrev_nc_u32_e32 v21, 24, v18
v_add_nc_u32_e32 v23, -8, v18
v_lshl_add_u32 v25, v25, 3, 0
v_add3_u32 v28, v15, v29, s3
s_mov_b32 s6, 0x1c71c71c
s_mov_b32 s20, 0x71c71c72
s_mov_b32 s22, 0x9999999a
s_mov_b32 s7, 0x3f5c71c7
s_mov_b32 s21, 0xc004471c
s_mov_b32 s23, 0x3fb99999
.LBB2_3:
s_waitcnt vmcnt(3)
v_dual_mov_b32 v15, v5 :: v_dual_mov_b32 v14, v4
v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
s_waitcnt vmcnt(0)
v_dual_mov_b32 v0, v16 :: v_dual_mov_b32 v1, v17
s_waitcnt vmcnt(0) lgkmcnt(0)
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
ds_store_b64 v18, v[14:15]
s_and_saveexec_b32 s10, vcc_lo
s_cbranch_execz .LBB2_5
v_add_nc_u32_e32 v16, s24, v12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v17, 31, v16
v_lshlrev_b64 v[16:17], 3, v[16:17]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v16, s3, s14, v16
v_add_co_ci_u32_e64 v17, s3, s15, v17, s3
global_load_b64 v[16:17], v[16:17], off
s_waitcnt vmcnt(0)
ds_store_b64 v19, v[16:17]
.LBB2_5:
s_or_b32 exec_lo, exec_lo, s10
s_and_saveexec_b32 s10, s0
s_cbranch_execz .LBB2_7
v_add_nc_u32_e32 v16, s24, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v17, 31, v16
v_lshlrev_b64 v[16:17], 3, v[16:17]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v16, s3, s14, v16
v_add_co_ci_u32_e64 v17, s3, s15, v17, s3
global_load_b64 v[16:17], v[16:17], off
s_waitcnt vmcnt(0)
ds_store_b64 v20, v[16:17]
.LBB2_7:
s_or_b32 exec_lo, exec_lo, s10
v_add_nc_u32_e32 v16, s24, v27
s_delay_alu instid0(VALU_DEP_1)
v_ashrrev_i32_e32 v17, 31, v16
s_and_saveexec_b32 s10, s1
s_cbranch_execz .LBB2_9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[29:30], 3, v[16:17]
v_add_co_u32 v29, s3, s26, v29
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v30, s3, s27, v30, s3
global_load_b64 v[29:30], v[29:30], off
s_waitcnt vmcnt(0)
ds_store_b64 v21, v[29:30]
.LBB2_9:
s_or_b32 exec_lo, exec_lo, s10
s_delay_alu instid0(VALU_DEP_1)
v_lshlrev_b64 v[16:17], 3, v[16:17]
s_and_saveexec_b32 s10, s2
s_cbranch_execz .LBB2_11
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v29, s3, s28, v16
v_add_co_ci_u32_e64 v30, s3, s29, v17, s3
global_load_b64 v[29:30], v[29:30], off
s_waitcnt vmcnt(0)
ds_store_b64 v18, v[29:30] offset:24
.LBB2_11:
s_or_b32 exec_lo, exec_lo, s10
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
ds_load_b64 v[29:30], v26
ds_load_b64 v[31:32], v24
ds_load_b64 v[41:42], v25
ds_load_b64 v[43:44], v22
v_add_co_u32 v51, s3, s12, v16
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v52, s3, s13, v17, s3
v_add_f64 v[10:11], v[0:1], v[10:11]
s_cmp_ge_i32 s8, s25
s_waitcnt lgkmcnt(2)
v_add_f64 v[45:46], v[31:32], v[29:30]
ds_load_2addr_b64 v[29:32], v21 offset1:1
ds_load_2addr_b64 v[33:36], v18 offset0:1 offset1:2
ds_load_b64 v[47:48], v19
ds_load_b64 v[49:50], v20
global_load_b64 v[16:17], v[51:52], off
ds_load_2addr_b64 v[37:40], v23 offset1:1
ds_load_b64 v[53:54], v18 offset:24
s_waitcnt lgkmcnt(6)
v_add_f64 v[41:42], v[41:42], v[43:44]
v_add_f64 v[43:44], v[2:3], v[6:7]
s_waitcnt lgkmcnt(4)
v_add_f64 v[31:32], v[31:32], v[35:36]
s_waitcnt lgkmcnt(2)
v_add_f64 v[35:36], v[47:48], v[49:50]
s_waitcnt lgkmcnt(1)
v_add_f64 v[33:34], v[37:38], v[33:34]
s_waitcnt lgkmcnt(0)
v_add_f64 v[29:30], v[29:30], v[53:54]
v_add_f64 v[37:38], v[8:9], v[4:5]
v_mul_f64 v[45:46], 0x3fb80000, v[45:46]
v_mul_f64 v[31:32], 0x3fb80000, v[31:32]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[35:36], v[35:36], s[6:7], -v[45:46]
v_fma_f64 v[29:30], v[29:30], s[6:7], -v[31:32]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_fma_f64 v[31:32], 0x3ff5c000, v[41:42], v[35:36]
v_mul_f64 v[35:36], 0x3fb80000, v[43:44]
v_fma_f64 v[29:30], 0x3ff5c000, v[33:34], v[29:30]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[31:32], v[39:40], s[20:21], v[31:32]
v_fma_f64 v[10:11], v[10:11], s[6:7], -v[35:36]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[29:30], v[39:40], s[20:21], v[29:30]
v_mul_f64 v[31:32], v[31:32], s[22:23]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[10:11], 0x3ff5c000, v[37:38], v[10:11]
v_mul_f64 v[29:30], v[29:30], s[22:23]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mul_f64 v[31:32], v[31:32], s[18:19]
v_fma_f64 v[10:11], v[14:15], s[20:21], v[10:11]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[29:30], v[29:30], s[16:17], v[31:32]
v_mul_f64 v[10:11], v[10:11], s[22:23]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[10:11], s[4:5], v[29:30]
s_waitcnt vmcnt(0)
v_add_f64 v[10:11], v[16:17], v[10:11]
v_dual_mov_b32 v17, v1 :: v_dual_mov_b32 v16, v0
global_store_b64 v[51:52], v[10:11], off
s_cbranch_scc1 .LBB2_13
v_add_nc_u32_e32 v10, s24, v28
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v11, 31, v10
v_lshlrev_b64 v[10:11], 3, v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v10, s3, s14, v10
v_add_co_ci_u32_e64 v11, s3, s15, v11, s3
global_load_b64 v[16:17], v[10:11], off
.LBB2_13:
v_dual_mov_b32 v11, v7 :: v_dual_add_nc_u32 v12, s11, v12
v_dual_mov_b32 v10, v6 :: v_dual_add_nc_u32 v27, s11, v27
v_dual_mov_b32 v6, v8 :: v_dual_add_nc_u32 v13, s11, v13
v_dual_mov_b32 v7, v9 :: v_dual_add_nc_u32 v28, s11, v28
v_dual_mov_b32 v8, v14 :: v_dual_mov_b32 v9, v15
s_add_i32 s8, s8, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lt_i32 s8, s9
s_cbranch_scc1 .LBB2_3
.LBB2_14:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| diff_gpu_3d_s3d | 5,508 | 5,852 | stackv2-00000-of-00015 |
// Demangled: add(float*, float*, float*, long)
Function : _Z3addPfS_S_l
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x398] &wr=0x2 ?trans7;
LDC R3, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R2, R3, UR4, R2 &req={1} ?WAIT5_END_GROUP;
SHF.R.S32.HI R3, RZ, 0x1f, R2 ?WAIT5_END_GROUP;
ISETP.GE.S64.AND P0, PT, R2, UR6, PT &req={2} ?WAIT14_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU.128 UR8, c[0x0][0x380] &wr=0x0 ?trans1;
SHF.L.U64.HI R3, R2.reuse, 0x2, R3 ?trans1;
IMAD.SHL.U32 R2, R2, 0x4, RZ ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x390] &wr=0x2 ?trans3;
IADD.64 R4, R2.reuse, UR8 &req={0} ?trans2;
IADD.64 R6, R2, UR10 ?WAIT5_END_GROUP;
LDG.E R4, desc[UR4][R4.64] &req={1} &wr=0x3 ?trans4;
LDG.E R7, desc[UR4][R6.64] &wr=0x3 ?trans1;
IADD.64 R2, R2, UR6 &req={2} ?trans2;
FADD R9, R4, R7 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x160;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: add(float*, float*, float*, long)
_Z3addPfS_S_l:
s_clause 0x1
s_load_b32 s8, s[0:1], 0x2c
s_load_b256 s[0:7], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s8, s8, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmp_gt_i64_e32 vcc_lo, s[6:7], v[1:2]
s_and_saveexec_b32 s6, vcc_lo
s_cbranch_execz .LBB0_2
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s3, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s4, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| add | 602 | 530 | stackv2-00000-of-00015 |
// Demangled: count(int*, int*, int)
Function : _Z5countPiS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR7, c[0x0][0x370] &wr=0x2 ?trans1;
MOV R7, 0x80 ?trans1;
S2R R2, SR_TID.X &wr=0x3 ?trans1;
LDCU UR8, c[0x0][0x360] &wr=0x4 ?trans2;
ULOP3.LUT UR6, UR8, 0xffff, URZ, 0xc0, !UPT &req={4,2} ?WAIT12_END_GROUP;
CALL.REL.NOINC 0x1400 &req={3,1,0} ?trans5;
LOP3.LUT R5, R6, 0xffff, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B0, 0x380 ?trans4;
IMAD R0, R5, R2, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R0, 0x2003, PT ?WAIT13_END_GROUP;
@P0 BRA 0x370 ?trans5;
IADD3 R11, PT, PT, R5, R0.reuse, RZ ?trans2;
IADD3 R4, PT, PT, R0.reuse, 0x1, RZ ?trans2;
LOP3.LUT R7, RZ, R0, RZ, 0x33, !PT ?trans1;
BSSY.RECONVERGENT B1, 0x260 ?trans1;
IADD3 R9, PT, PT, -R0, 0x2003, RZ ?trans1;
VIMNMX.U32 R4, R11, R4, !PT ?WAIT5_END_GROUP;
IADD3 R4, PT, PT, R4, R7, RZ ?WAIT5_END_GROUP;
VIMNMX.U32 R9, R4, R9, PT ?WAIT5_END_GROUP;
IADD3 R4, PT, PT, R9.reuse, 0x1, RZ ?trans1;
ISETP.GE.U32.AND P1, PT, R9, 0x3, PT ?WAIT3_END_GROUP;
LOP3.LUT P0, R7, R4, 0x3, RZ, 0xc0, !PT ?trans1;
MOV R4, R0 ?WAIT12_END_GROUP;
@!P0 BRA 0x250 ?trans5;
S2UR UR5, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR4, 0x400 ?trans1;
IADD3 R4, PT, PT, R0, R7, RZ ?trans2;
IADD3 R7, PT, PT, -R7, RZ, RZ ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={0} ?WAIT6_END_GROUP;
LEA R6, R0, UR4, 0x2 ?WAIT7_END_GROUP;
IADD3 R7, PT, PT, R7, 0x1, RZ ?trans1;
STS [R6], RZ &rd=0x0 ?trans4;
ISETP.NE.AND P0, PT, R7, RZ, PT ?trans1;
IADD3 R6, PT, PT, R6, 0x4, RZ &req={0} ?WAIT12_END_GROUP;
@P0 BRA 0x200 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
@!P1 BRA 0x370 ?trans5;
S2UR UR5, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR4, 0x400 ?trans2;
ULEA UR4, UR5, UR4, 0x18 &req={0} ?WAIT6_END_GROUP;
LEA R6, R4.reuse, UR4, 0x2 ?trans2;
IADD3 R4, PT, PT, R4, 0x4, RZ ?trans2;
IADD3 R6, PT, PT, R6, 0x8, RZ ?WAIT7_END_GROUP;
IADD3 R7, PT, PT, R4.reuse, -0x4, RZ ?trans1;
ISETP.LT.U32.AND P1, PT, R4.reuse, R11, PT ?trans1;
STS [R6+-0x8], RZ ?trans1;
IADD3 R4, PT, PT, R4, 0x4, RZ ?trans2;
ISETP.GE.U32.AND P0, PT, R7, 0x2000, PT ?trans1;
STS [R6+-0x4], RZ ?trans4;
STS [R6], RZ ?trans4;
STS [R6+0x4], RZ &rd=0x0 ?trans2;
IADD3 R6, PT, PT, R6, 0x10, RZ &req={0} ?WAIT2_END_GROUP;
@!P0 BRA P1, 0x2d0 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDC R9, c[0x0][0x390] &wr=0x0 ?trans1;
HFMA2 R4, -RZ, RZ, 0, 5.9604644775390625e-08 ?WAIT7_END_GROUP;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.LT.AND P0, PT, R9, UR7, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x4f0 ?trans5;
UI2F.U32.RP UR4, UR7 ?trans1;
MOV R6, RZ ?trans1;
ISETP.NE.U32.AND P2, PT, RZ, UR7, PT ?WAIT7_END_GROUP;
MUFU.RCP R4, UR4 &wr=0x0 ?trans2;
IADD3 R4, PT, PT, R4, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R7, R4 &wr=0x0 ?trans2;
IADD3 R11, PT, PT, RZ, -R7, RZ &req={0} ?WAIT5_END_GROUP;
IMAD R11, R11, UR7, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R6, R7, R11, R6 ?WAIT6_END_GROUP;
IMAD.HI.U32 R4, R6, R9, RZ ?WAIT5_END_GROUP;
IADD3 R6, PT, PT, -R4, RZ, RZ ?WAIT5_END_GROUP;
IMAD R6, R6, UR7, R9 ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R6, UR7, PT ?WAIT13_END_GROUP;
@P0 IADD3 R6, PT, PT, R6, -UR7, RZ ?trans2;
@P0 IADD3 R4, PT, PT, R4, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R6, UR7, PT ?WAIT13_END_GROUP;
@P1 IADD3 R4, PT, PT, R4, 0x1, RZ ?trans2;
@!P2 LOP3.LUT R4, RZ, UR7, RZ, 0x33, !PT ?WAIT7_END_GROUP;
ISETP.LT.AND P0, PT, R4, UR8, PT ?trans1;
IMAD R10, R3, R4, RZ ?trans1;
MOV R7, 0x1 ?WAIT11_END_GROUP;
@P0 BRA 0x650 ?trans5;
UI2F.U32.RP UR4, UR8 ?trans2;
ISETP.NE.U32.AND P2, PT, RZ, UR8, PT ?WAIT7_END_GROUP;
MUFU.RCP R6, UR4 &wr=0x0 ?trans2;
IADD3 R6, PT, PT, R6, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R7, R6 &rd=0x0 &wr=0x1 ?trans2;
MOV R6, RZ &req={0} ?trans1;
IADD3 R11, PT, PT, RZ, -R7, RZ &req={1} ?WAIT5_END_GROUP;
IMAD R11, R11, UR8, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R7, R7, R11, R6 ?WAIT6_END_GROUP;
IMAD.HI.U32 R7, R7, R4, RZ ?WAIT5_END_GROUP;
IADD3 R11, PT, PT, -R7, RZ, RZ ?WAIT5_END_GROUP;
IMAD R8, R11, UR8, R4 ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R8, UR8, PT ?WAIT13_END_GROUP;
@P0 IADD3 R8, PT, PT, R8, -UR8, RZ ?trans2;
@P0 IADD3 R7, PT, PT, R7, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R8, UR8, PT ?WAIT13_END_GROUP;
@P1 IADD3 R7, PT, PT, R7, 0x1, RZ ?trans2;
@!P2 LOP3.LUT R7, RZ, UR8, RZ, 0x33, !PT ?WAIT7_END_GROUP;
IMAD R11, R2, R7, RZ ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0x1050 ?trans3;
IADD3 R2, PT, PT, R10, R11, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R2, R9, PT ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R11, R4, P0 ?WAIT5_END_GROUP;
ISETP.LT.OR P0, PT, R7, 0x1, P0 ?WAIT13_END_GROUP;
@P0 BRA 0x1040 &req={0} ?trans5;
IADD3 R4, PT, PT, R10, R4, RZ ?trans2;
IADD3 R7, PT, PT, R2, R7, RZ ?trans1;
BSSY.RECONVERGENT B1, 0xb80 ?trans4;
VIMNMX.S32 R4, R4, R7, PT ?trans1;
IADD3 R7, PT, PT, R2, 0x1, RZ ?WAIT4_END_GROUP;
VIMNMX.S32 R4, R4, R9, PT ?WAIT5_END_GROUP;
VIMNMX.S32 R7, R4, R7, !PT ?WAIT5_END_GROUP;
IADD3 R4, PT, PT, -R2, R7, RZ ?trans2;
IADD3 R7, PT, PT, R10, R11, -R7 ?trans2;
LOP3.LUT R10, R4, 0xf, RZ, 0xc0, !PT ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R7, -0x10, PT ?trans2;
ISETP.NE.AND P1, PT, R10, RZ, PT ?WAIT11_END_GROUP;
@P0 BRA 0xb70 ?trans5;
S2R R11, SR_CgaCtaId &wr=0x0 ?trans1;
LDC.64 R6, c[0x0][0x380] &wr=0x1 ?trans1;
MOV R8, 0x400 ?trans1;
LOP3.LUT R9, R4, 0xfffffff0, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R9, PT, PT, -R9, RZ, RZ ?trans1;
IMAD.WIDE.U32 R6, R2, 0x4, R6 &req={1} ?WAIT5_END_GROUP;
IADD.64 R6, R6, 0x20 ?WAIT3_END_GROUP;
LEA R8, R11, R8, 0x18 &req={0} ?WAIT7_END_GROUP;
LDG.E R19, desc[UR6][R6.64+-0x20] &req={0} &wr=0x2 ?trans4;
LDG.E R21, desc[UR6][R6.64+-0x1c] &wr=0x3 ?trans4;
LDG.E R23, desc[UR6][R6.64+-0x18] &wr=0x4 ?trans4;
LDG.E R25, desc[UR6][R6.64+-0x14] &wr=0x5 ?trans4;
LDG.E R27, desc[UR6][R6.64+-0x10] &wr=0x5 ?trans4;
LDG.E R29, desc[UR6][R6.64+-0xc] &wr=0x5 ?trans4;
LDG.E R31, desc[UR6][R6.64+-0x8] &wr=0x5 ?trans4;
LDG.E R33, desc[UR6][R6.64+-0x4] &wr=0x5 ?trans4;
LDG.E R35, desc[UR6][R6.64] &wr=0x5 ?trans4;
LDG.E R37, desc[UR6][R6.64+0x4] &wr=0x5 ?trans4;
LDG.E R12, desc[UR6][R6.64+0x8] &wr=0x5 ?trans4;
LDG.E R14, desc[UR6][R6.64+0xc] &wr=0x5 ?trans4;
LDG.E R17, desc[UR6][R6.64+0x10] &wr=0x5 ?trans4;
LDG.E R15, desc[UR6][R6.64+0x14] &wr=0x5 ?trans4;
LDG.E R13, desc[UR6][R6.64+0x18] &wr=0x5 ?trans4;
LDG.E R11, desc[UR6][R6.64+0x1c] &rd=0x0 &wr=0x5 ?trans1;
IADD3 R9, PT, PT, R9, 0x10, RZ ?WAIT2_END_GROUP;
IADD3 R2, PT, PT, R2, 0x10, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R9, RZ, PT ?trans1;
IADD.64 R6, R6, 0x40 &req={0} ?trans2;
IMAD R19, R19, 0x4, R8.reuse &req={2} ?trans2;
IMAD R21, R21, 0x4, R8 &req={3} ?WAIT3_END_GROUP;
ATOMS.POPC.INC.32 RZ, [R19+URZ] &rd=0x0 ?trans1;
IMAD R23, R23, 0x4, R8 &req={4} ?WAIT3_END_GROUP;
ATOMS.POPC.INC.32 RZ, [R21+URZ] &rd=0x0 ?trans1;
IMAD R25, R25, 0x4, R8 &req={5} ?WAIT3_END_GROUP;
ATOMS.POPC.INC.32 RZ, [R23+URZ] &rd=0x0 ?trans1;
IMAD R27, R27, 0x4, R8 ?WAIT3_END_GROUP;
ATOMS.POPC.INC.32 RZ, [R25+URZ] &rd=0x0 ?trans1;
IMAD R29, R29, 0x4, R8 ?WAIT3_END_GROUP;
ATOMS.POPC.INC.32 RZ, [R27+URZ] &rd=0x0 ?trans1;
IMAD R31, R31, 0x4, R8 ?WAIT3_END_GROUP;
ATOMS.POPC.INC.32 RZ, [R29+URZ] &rd=0x0 ?trans1;
IMAD R33, R33, 0x4, R8 ?WAIT3_END_GROUP;
ATOMS.POPC.INC.32 RZ, [R31+URZ] &rd=0x0 ?trans1;
IMAD R35, R35, 0x4, R8 ?WAIT3_END_GROUP;
ATOMS.POPC.INC.32 RZ, [R33+URZ] &rd=0x0 ?trans1;
IMAD R37, R37, 0x4, R8 ?WAIT3_END_GROUP;
ATOMS.POPC.INC.32 RZ, [R35+URZ] &rd=0x0 ?trans1;
IMAD R12, R12, 0x4, R8 ?WAIT3_END_GROUP;
ATOMS.POPC.INC.32 RZ, [R37+URZ] &rd=0x0 ?trans1;
IMAD R14, R14, 0x4, R8 ?WAIT3_END_GROUP;
ATOMS.POPC.INC.32 RZ, [R12+URZ] &rd=0x0 ?trans1;
IMAD R17, R17, 0x4, R8 ?WAIT3_END_GROUP;
ATOMS.POPC.INC.32 RZ, [R14+URZ] &rd=0x0 ?trans1;
IMAD R15, R15, 0x4, R8 ?WAIT3_END_GROUP;
ATOMS.POPC.INC.32 RZ, [R17+URZ] &rd=0x0 ?trans1;
IMAD R13, R13, 0x4, R8 ?WAIT3_END_GROUP;
ATOMS.POPC.INC.32 RZ, [R15+URZ] &rd=0x0 ?trans1;
IMAD R11, R11, 0x4, R8 ?WAIT3_END_GROUP;
ATOMS.POPC.INC.32 RZ, [R13+URZ] &rd=0x0 ?trans4;
ATOMS.POPC.INC.32 RZ, [R11+URZ] &rd=0x0 ?trans1;
@P0 BRA 0x820 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
@!P1 BRA 0x1040 ?trans5;
ISETP.GE.U32.AND P0, PT, R10, 0x8, PT ?trans1;
LOP3.LUT R16, R4, 0x7, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B1, 0xdd0 ?trans4;
ISETP.NE.AND P1, PT, R16, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0xdc0 ?trans6;
LDC.64 R6, c[0x0][0x380] &wr=0x1 ?trans2;
IMAD.WIDE.U32 R6, R2, 0x4, R6 &req={1} ?WAIT5_END_GROUP;
LDG.E R8, desc[UR6][R6.64] &wr=0x2 ?trans4;
LDG.E R9, desc[UR6][R6.64+0x4] &wr=0x3 ?trans4;
LDG.E R10, desc[UR6][R6.64+0x8] &wr=0x4 ?trans4;
LDG.E R11, desc[UR6][R6.64+0xc] &req={0} &wr=0x5 ?trans4;
LDG.E R12, desc[UR6][R6.64+0x10] &wr=0x5 ?trans4;
LDG.E R13, desc[UR6][R6.64+0x14] &wr=0x5 ?trans4;
LDG.E R14, desc[UR6][R6.64+0x18] &wr=0x5 ?trans4;
LDG.E R15, desc[UR6][R6.64+0x1c] &wr=0x5 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR4, 0x400 ?trans1;
IADD3 R2, PT, PT, R2, 0x8, RZ ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={0} ?WAIT6_END_GROUP;
LEA R8, R8, UR4, 0x2 &req={2} ?trans2;
LEA R9, R9, UR4, 0x2 &req={3} ?WAIT3_END_GROUP;
ATOMS.POPC.INC.32 RZ, [R8+URZ] &rd=0x1 ?trans1;
LEA R10, R10, UR4, 0x2 &req={4} ?WAIT3_END_GROUP;
ATOMS.POPC.INC.32 RZ, [R9+URZ] &rd=0x1 ?trans1;
LEA R11, R11, UR4, 0x2 &req={5} ?WAIT3_END_GROUP;
ATOMS.POPC.INC.32 RZ, [R10+URZ] &rd=0x1 ?trans1;
LEA R12, R12, UR4, 0x2 ?WAIT3_END_GROUP;
ATOMS.POPC.INC.32 RZ, [R11+URZ] &rd=0x1 ?trans1;
LEA R13, R13, UR4, 0x2 ?WAIT3_END_GROUP;
ATOMS.POPC.INC.32 RZ, [R12+URZ] &rd=0x1 ?trans1;
LEA R14, R14, UR4, 0x2 ?WAIT3_END_GROUP;
ATOMS.POPC.INC.32 RZ, [R13+URZ] &rd=0x1 ?trans1;
LEA R15, R15, UR4, 0x2 ?WAIT3_END_GROUP;
ATOMS.POPC.INC.32 RZ, [R14+URZ] &rd=0x1 ?trans4;
ATOMS.POPC.INC.32 RZ, [R15+URZ] &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B1 ?trans5;
@!P1 BRA 0x1040 ?trans5;
ISETP.GE.U32.AND P0, PT, R16, 0x4, PT ?trans1;
LOP3.LUT R4, R4, 0x3, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B1, 0xf60 ?trans4;
ISETP.NE.AND P1, PT, R4, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0xf50 ?trans6;
LDC.64 R6, c[0x0][0x380] &wr=0x2 ?trans2;
IMAD.WIDE.U32 R6, R2, 0x4, R6 &req={2} ?WAIT5_END_GROUP;
LDG.E R8, desc[UR6][R6.64] &req={1} &wr=0x2 ?trans4;
LDG.E R9, desc[UR6][R6.64+0x4] &wr=0x3 ?trans4;
LDG.E R10, desc[UR6][R6.64+0x8] &wr=0x4 ?trans4;
LDG.E R11, desc[UR6][R6.64+0xc] &req={0} &wr=0x5 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR4, 0x400 ?trans1;
IADD3 R2, PT, PT, R2, 0x4, RZ ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={0} ?WAIT6_END_GROUP;
LEA R8, R8, UR4, 0x2 &req={2} ?trans2;
LEA R9, R9, UR4, 0x2 &req={3} ?WAIT3_END_GROUP;
ATOMS.POPC.INC.32 RZ, [R8+URZ] &rd=0x2 ?trans1;
LEA R10, R10, UR4, 0x2 &req={4} ?WAIT3_END_GROUP;
ATOMS.POPC.INC.32 RZ, [R9+URZ] &rd=0x2 ?trans1;
LEA R11, R11, UR4, 0x2 &req={5} ?WAIT3_END_GROUP;
ATOMS.POPC.INC.32 RZ, [R10+URZ] &rd=0x2 ?trans4;
ATOMS.POPC.INC.32 RZ, [R11+URZ] &rd=0x2 ?trans2;
BSYNC.RECONVERGENT B1 ?trans5;
@!P1 BRA 0x1040 ?trans5;
S2R R9, SR_CgaCtaId &req={2,1} &wr=0x1 ?trans1;
LDC.64 R6, c[0x0][0x380] &wr=0x2 ?trans1;
MOV R8, 0x400 ?trans1;
IADD3 R4, PT, PT, -R4, RZ, RZ ?trans1;
IMAD.WIDE.U32 R6, R2, 0x4, R6 &req={2} ?WAIT3_END_GROUP;
LEA R9, R9, R8, 0x18 &req={1} ?WAIT7_END_GROUP;
LDG.E R2, desc[UR6][R6.64] &req={3} &rd=0x1 &wr=0x2 ?trans1;
IADD3 R4, PT, PT, R4, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R4, RZ, PT ?trans1;
IADD.64 R6, R6, 0x4 &req={1} ?trans2;
IMAD R2, R2, 0x4, R9 &req={2} ?WAIT5_END_GROUP;
ATOMS.POPC.INC.32 RZ, [R2+URZ] &rd=0x3 ?trans5;
@P0 BRA 0xfd0 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
HFMA2 R2, -RZ, RZ, 0, 0.007843017578125 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
IMAD R10, R3, 0x2004, R0 &req={2,1} ?WAIT3_END_GROUP;
IMAD R3, R3, R2, 0x2004 ?trans2;
IADD3 R2, PT, PT, R5, R10, RZ ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R2, R3, PT ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
IMAD.SHL.U32 R2, R5, 0x4, RZ ?trans1;
MOV R3, RZ ?trans1;
UMOV UR4, 0x400 ?WAIT4_END_GROUP;
ISETP.GT.U64.AND P0, PT, R2, RZ, PT ?trans2;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?WAIT6_END_GROUP;
LEA R0, R0, UR4, 0x2 ?trans1;
IMAD.WIDE.U32 R10, R10, 0x4, R4 &req={2,0} ?trans1;
MOV.64 R4, RZ ?WAIT3_END_GROUP;
@!P0 LDS.U8 R13, [R0] &rd=0x0 &wr=0x1 ?trans1;
@!P0 IADD.64 R8, R10, R4 ?trans2;
@!P0 MOV.64 R4, 0x1 ?WAIT4_END_GROUP;
IADD.64 R6, R2.reuse, -R4.reuse ?trans2;
ISETP.GT.U64.AND P1, PT, R2, R4, PT ?WAIT3_END_GROUP;
@!P0 IADD3 R0, PT, PT, R0, 0x1, RZ &req={0} ?WAIT3_END_GROUP;
ISETP.LE.U64.OR P1, PT, R6, 0x3, !P1 ?trans2;
@!P0 STG.E.U8 desc[UR6][R8.64], R13 &req={1} &rd=0x0 ?WAIT12_END_GROUP;
@P1 BRA 0x12e0 ?trans5;
IADD.64 R8, R2, -0x3 &req={0} ?WAIT3_END_GROUP;
PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x80 ?WAIT13_END_GROUP;
LDS.U8 R13, [R0] &req={3} &wr=0x0 ?trans1;
IADD.64 R6, R10, R4 ?trans2;
IADD.64 R4, R4, 0x4 ?trans2;
LDS.U8 R15, [R0+0x1] &wr=0x1 ?trans4;
LDS.U8 R17, [R0+0x2] &wr=0x2 ?trans1;
ISETP.GE.U64.AND P1, PT, R4, R8, PT ?WAIT3_END_GROUP;
LDS.U8 R19, [R0+0x3] &rd=0x3 &wr=0x4 ?trans2;
IADD3 R0, PT, PT, R0, 0x4, RZ &req={3} ?trans2;
STG.E.U8 desc[UR6][R6.64], R13 &req={0} &rd=0x3 ?trans4;
STG.E.U8 desc[UR6][R6.64+0x1], R15 &req={1} &rd=0x3 ?trans4;
STG.E.U8 desc[UR6][R6.64+0x2], R17 &req={2} &rd=0x3 ?trans4;
STG.E.U8 desc[UR6][R6.64+0x3], R19 &req={4} &rd=0x3 ?trans1;
@!P1 BRA 0x1210 ?trans5;
ISETP.GT.U64.AND P1, PT, R2.reuse, R4.reuse, PT ?trans2;
IADD.64 R6, R2, -R4 &req={3} ?WAIT6_END_GROUP;
ISETP.LE.U64.OR P1, PT, R6, 0x1, !P1 ?WAIT14_END_GROUP;
@P1 BRA 0x13a0 ?trans5;
LDS.U8 R9, [R0] &req={0} &wr=0x0 ?trans1;
IADD.64 R6, R10, R4 ?trans2;
IADD.64 R4, R4, 0x2 ?trans2;
LDS.U8 R13, [R0+0x1] &rd=0x1 &wr=0x2 ?trans1;
PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x80 ?trans2;
IADD3 R0, PT, PT, R0, 0x2, RZ &req={1} ?trans1;
STG.E.U8 desc[UR6][R6.64], R9 &req={0} &rd=0x1 ?trans4;
STG.E.U8 desc[UR6][R6.64+0x1], R13 &req={2} &rd=0x1 ?trans6;
ISETP.LT.U64.OR P0, PT, R4, R2, P0 ?WAIT14_END_GROUP;
@!P0 EXIT ?trans5;
LDS.U8 R3, [R0] &wr=0x2 ?trans1;
IADD.64 R4, R10, R4 ?WAIT6_END_GROUP;
STG.E.U8 desc[UR6][R4.64], R3 &req={2} ?trans1;
EXIT ?trans5;
UI2F.U16 UR4, UR6 ?trans1;
UMOV UR5, 0x4b800000 ?trans1;
ISETP.NE.U32.AND P0, PT, RZ, UR6, PT ?trans2;
UFSETP.GEU.AND UP1, UPT, |UR4|, 1.175494350822287508e-38, UPT ?trans1;
UFSETP.GT.AND UP0, UPT, |UR4|, 8.50705917302346158658e+37, UPT ?WAIT3_END_GROUP;
UFSEL UR5, UR5, 1, !UP1 ?WAIT4_END_GROUP;
UFSEL UR5, UR5, 0.25, !UP0 ?WAIT4_END_GROUP;
UFMUL UR4, UR4, UR5 ?WAIT9_END_GROUP;
MUFU.RCP R0, UR4 &wr=0x0 ?trans2;
FMUL R4, R0, UR5 &req={0} ?trans1;
I2FP.F32.U32.RZ R0, 0x2004 ?WAIT4_END_GROUP;
IADD3 R5, PT, PT, R4, 0x2, RZ ?trans1;
MOV R4, R7 ?WAIT4_END_GROUP;
FMUL.RZ R0, R0, R5 ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?WAIT5_END_GROUP;
F2I.U32.TRUNC.NTZ R0, R0 &wr=0x0 ?trans2;
LOP3.LUT R6, R0, 0xffff, RZ, 0xc0, !PT &req={0} ?trans1;
@!P0 MOV R6, 0xffffffff ?trans1;
RET.REL.NODEC R4 0x0 ?trans6;
BRA 0x1530;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: count(int*, int*, int)
_Z5countPiS_i:
s_load_b32 s2, s[0:1], 0x24
v_mov_b32_e32 v1, 1
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_cvt_f32_u32_e32 v3, s2
s_cmpk_lt_u32 s2, 0x2005
s_cselect_b32 s4, -1, 0
s_cmpk_gt_u32 s2, 0x2004
v_rcp_iflag_f32_e32 v4, v3
s_cbranch_scc1 .LBB0_2
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v1, 0x46001000, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_trunc_f32_e32 v1, v1
v_fma_f32 v2, -v1, v3, 0x46001000
v_cvt_u32_f32_e32 v1, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_ge_f32_e64 vcc_lo, |v2|, v3
v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
s_delay_alu instid0(VALU_DEP_1)
v_and_b32_e32 v1, 0xffff, v1
.LBB0_2:
s_load_b32 s3, s[0:1], 0x18
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_mad_u32_u24 v2, v1, v0, v1
v_mul_u32_u24_e32 v1, v1, v0
s_mov_b32 s5, exec_lo
v_min_u32_e32 v2, 0x2004, v2
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_lt_u32_e64 v1, v2
s_cbranch_execz .LBB0_5
v_dual_mov_b32 v6, 0 :: v_dual_lshlrev_b32 v5, 2, v1
s_mov_b32 s6, 0
.LBB0_4:
v_add_nc_u32_e32 v1, 1, v1
ds_store_b32 v5, v6
v_add_nc_u32_e32 v5, 4, v5
v_cmp_ge_u32_e32 vcc_lo, v1, v2
s_or_b32 s6, vcc_lo, s6
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s6
s_cbranch_execnz .LBB0_4
.LBB0_5:
s_or_b32 exec_lo, exec_lo, s5
s_load_b32 s5, s[0:1], 0x10
s_mov_b32 s6, 1
s_mov_b32 s7, 1
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cmp_le_i32 s3, s5
s_cbranch_scc0 .LBB0_7
s_ashr_i32 s7, s3, 31
s_ashr_i32 s10, s5, 31
s_add_i32 s3, s3, s7
s_add_i32 s11, s5, s10
s_xor_b32 s3, s3, s7
s_xor_b32 s11, s11, s10
v_cvt_f32_u32_e32 v1, s3
s_sub_i32 s9, 0, s3
s_xor_b32 s7, s10, s7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v1, v1
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v1, 0x4f7ffffe, v1
v_cvt_u32_f32_e32 v1, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_readfirstlane_b32 s8, v1
s_mul_i32 s9, s9, s8
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_mul_hi_u32 s9, s8, s9
s_add_i32 s8, s8, s9
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_mul_hi_u32 s8, s11, s8
s_mul_i32 s9, s8, s3
s_add_i32 s10, s8, 1
s_sub_i32 s9, s11, s9
s_delay_alu instid0(SALU_CYCLE_1)
s_sub_i32 s11, s9, s3
s_cmp_ge_u32 s9, s3
s_cselect_b32 s8, s10, s8
s_cselect_b32 s9, s11, s9
s_add_i32 s10, s8, 1
s_cmp_ge_u32 s9, s3
s_cselect_b32 s3, s10, s8
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_xor_b32 s3, s3, s7
s_sub_i32 s7, s3, s7
.LBB0_7:
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lt_i32 s7, s2
s_cbranch_scc1 .LBB0_9
v_mul_f32_e32 v1, 0x4f7ffffe, v4
s_sub_i32 s6, 0, s2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_u32_f32_e32 v1, v1
v_readfirstlane_b32 s3, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_mul_i32 s6, s6, s3
s_mul_hi_u32 s6, s3, s6
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s3, s3, s6
s_mul_hi_u32 s3, s7, s3
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
s_mul_i32 s6, s3, s2
s_add_i32 s8, s3, 1
s_sub_i32 s6, s7, s6
s_sub_i32 s9, s6, s2
s_cmp_ge_u32 s6, s2
s_cselect_b32 s3, s8, s3
s_cselect_b32 s6, s9, s6
s_add_i32 s8, s3, 1
s_cmp_ge_u32 s6, s2
s_cselect_b32 s6, s8, s3
.LBB0_9:
s_delay_alu instid0(SALU_CYCLE_1)
v_mul_lo_u32 v1, s6, v0
s_load_b128 s[0:3], s[0:1], 0x0
s_mul_i32 s8, s7, s15
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_add_nc_u32_e32 v5, s8, v1
s_delay_alu instid0(VALU_DEP_1)
v_add_nc_u32_e32 v2, s6, v5
s_add_i32 s6, s8, s7
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_min3_i32 v6, s5, v2, s6
s_mov_b32 s5, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_lt_i32_e64 v5, v6
s_cbranch_execz .LBB0_12
v_ashrrev_i32_e32 v2, 31, v1
s_ashr_i32 s6, s8, 31
v_add_co_u32 v1, vcc_lo, s8, v1
v_mov_b32_e32 v7, 1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v2, vcc_lo, s6, v2, vcc_lo
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s0, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
s_mov_b32 s1, 0
.LBB0_11:
global_load_b32 v8, v[1:2], off
v_add_nc_u32_e32 v5, 1, v5
v_add_co_u32 v1, s0, v1, 4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v2, s0, 0, v2, s0
v_cmp_ge_i32_e32 vcc_lo, v5, v6
s_or_b32 s1, vcc_lo, s1
s_waitcnt vmcnt(0)
v_lshlrev_b32_e32 v8, 2, v8
ds_add_u32 v8, v7
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execnz .LBB0_11
.LBB0_12:
s_or_b32 exec_lo, exec_lo, s5
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 vcc_lo, exec_lo, s4
s_waitcnt lgkmcnt(0)
s_mov_b32 s0, 1
s_barrier
buffer_gl0_inv
s_cbranch_vccz .LBB0_14
v_mul_f32_e32 v1, 0x46001000, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_trunc_f32_e32 v1, v1
v_fma_f32 v2, -v1, v3, 0x46001000
v_cvt_u32_f32_e32 v1, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_ge_f32_e64 s0, |v2|, v3
v_readfirstlane_b32 s1, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
s_cmp_lg_u32 s0, 0
s_addc_u32 s0, s1, 0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 s0, s0, 0xffff
.LBB0_14:
s_mul_i32 s1, s15, 0x2004
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u32_u24 v1, s0, v0, s1
s_addk_i32 s1, 0x2004
v_add_nc_u32_e32 v2, s0, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmp_ge_i32_e32 vcc_lo, s1, v2
s_and_saveexec_b32 s1, vcc_lo
s_cbranch_execz .LBB0_17
v_ashrrev_i32_e32 v2, 31, v1
v_mul_u32_u24_e32 v3, s0, v0
s_lshl_b32 s0, s0, 2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
s_sub_u32 s0, 0, s0
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b32_e32 v2, 2, v3
s_subb_u32 s1, 0, 0
v_add_co_u32 v0, vcc_lo, s2, v0
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
.LBB0_16:
ds_load_u8 v3, v2 offset:1
ds_load_u8 v4, v2 offset:3
ds_load_u8 v5, v2
ds_load_u8 v6, v2 offset:2
v_add_nc_u32_e32 v2, 4, v2
s_add_u32 s0, s0, 4
s_addc_u32 s1, s1, 0
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lg_u64 s[0:1], 0
s_waitcnt lgkmcnt(3)
v_lshlrev_b16 v3, 8, v3
s_waitcnt lgkmcnt(2)
v_lshlrev_b16 v4, 8, v4
s_waitcnt lgkmcnt(1)
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_or_b32_e32 v3, v5, v3
s_waitcnt lgkmcnt(0)
v_or_b32_e32 v4, v6, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_and_b32_e32 v3, 0xffff, v3
v_lshlrev_b32_e32 v4, 16, v4
s_delay_alu instid0(VALU_DEP_1)
v_or_b32_e32 v3, v3, v4
global_store_b32 v[0:1], v3, off
v_add_co_u32 v0, vcc_lo, v0, 4
v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
s_cbranch_scc1 .LBB0_16
.LBB0_17:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| count | 8,652 | 3,998 | stackv2-00000-of-00015 |
// Demangled: merge(int*)
Function : _Z5mergePi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R4, c[0x0][0x370] &wr=0x1 ?trans2;
ISETP.NE.AND P0, PT, R4, 0x1, PT &req={1} ?WAIT13_END_GROUP;
@!P0 EXIT &req={0} ?trans5;
S2R R3, SR_TID.X &wr=0x0 ?trans1;
S2UR UR8, SR_CTAID.X &wr=0x1 ?trans1;
HFMA2 R2, -RZ, RZ, 0, 1.1920928955078125e-07 ?trans1;
MOV R0, R4 ?trans1;
LDCU UR5, c[0x0][0x360] &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans5;
I2F.U32.RP R5, R4 &wr=0x4 ?trans1;
ISETP.NE.U32.AND P2, PT, R4, RZ, PT ?trans1;
I2F.U32.RP R10, R2 &req={1} &wr=0x5 ?trans1;
MUFU.RCP R5, R5 &req={4} &wr=0x4 ?trans1;
MUFU.RCP R10, R10 &req={5} &wr=0x5 ?trans1;
IADD3 R6, PT, PT, R5, 0xffffffe, RZ &req={4} ?trans1;
IMAD R5, R0, 0x2004, RZ ?WAIT3_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R7, R6 &rd=0x4 &wr=0x3 ?trans1;
IADD3 R9, PT, PT, R10, 0xffffffe, RZ &req={5} ?trans1;
MOV R6, RZ &req={4} ?WAIT5_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R9, R9 &wr=0x4 ?trans1;
IADD3 R11, PT, PT, RZ, -R7, RZ &req={3} ?WAIT5_END_GROUP;
IMAD R11, R11, R4, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R8, R7, R11, R6 ?trans1;
IADD3 R11, PT, PT, RZ, -R9, RZ &req={4} ?WAIT5_END_GROUP;
IMAD.HI.U32 R7, R8, R5, RZ ?trans1;
MOV R8, RZ ?WAIT3_END_GROUP;
IMAD R11, R11, R2, RZ ?trans1;
IADD3 R6, PT, PT, -R7, RZ, RZ ?WAIT3_END_GROUP;
IMAD.HI.U32 R8, R9, R11, R8 ?WAIT4_END_GROUP;
IMAD R5, R4, R6, R5 ?trans2;
IMAD.HI.U32 R9, R8, UR8, RZ &req={1} ?trans1;
MOV R8, 0x1 ?trans2;
ISETP.GE.U32.AND P0, PT, R5, R4, PT ?trans2;
IADD3 R11, PT, PT, -R9, RZ, RZ ?WAIT11_END_GROUP;
@P0 IADD3 R5, PT, PT, R5, -R4, RZ ?trans2;
@P0 IADD3 R7, PT, PT, R7, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R5, R4, PT ?trans1;
IMAD R5, R2, R11, UR8 ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R5, R2, PT ?WAIT7_END_GROUP;
@P1 IADD3 R7, PT, PT, R7, 0x1, RZ ?trans2;
@!P2 LOP3.LUT R7, RZ, R4, RZ, 0x33, !PT ?trans1;
ISETP.NE.U32.AND P1, PT, R2, RZ, PT ?WAIT3_END_GROUP;
SHF.R.U32.HI R13, RZ, 0x1, R7 ?trans2;
@P0 IADD3 R5, PT, PT, R5, -R2, RZ ?WAIT3_END_GROUP;
ISETP.LT.U32.AND P3, PT, R13, UR5, PT &req={2} ?trans2;
ISETP.GE.U32.AND P2, PT, R5, R2, PT ?WAIT11_END_GROUP;
@P3 BRA 0x420 ?trans5;
UI2F.U32.RP UR4, UR5 ?trans1;
HFMA2 R6, -RZ, RZ, 0, 0 ?trans1;
ISETP.NE.U32.AND P5, PT, RZ, UR5, PT ?WAIT7_END_GROUP;
MUFU.RCP R5, UR4 &wr=0x1 ?trans2;
IADD3 R5, PT, PT, R5, 0xffffffe, RZ &req={1} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R7, R5 &wr=0x1 ?trans2;
IADD3 R11, PT, PT, RZ, -R7, RZ &req={1} ?WAIT5_END_GROUP;
IMAD R11, R11, UR5, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R6, R7, R11, R6 ?WAIT6_END_GROUP;
IMAD.HI.U32 R8, R6, R13, RZ ?WAIT5_END_GROUP;
IADD3 R6, PT, PT, -R8, RZ, RZ ?WAIT5_END_GROUP;
IMAD R6, R6, UR5, R13 ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P3, PT, R6, UR5, PT ?WAIT13_END_GROUP;
@P3 IADD3 R6, PT, PT, R6, -UR5, RZ ?trans2;
@P3 IADD3 R8, PT, PT, R8, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P4, PT, R6, UR5, PT ?WAIT13_END_GROUP;
@P4 IADD3 R8, PT, PT, R8, 0x1, RZ ?trans2;
@!P5 LOP3.LUT R8, RZ, UR5, RZ, 0x33, !PT ?WAIT7_END_GROUP;
IMAD R10, R3, R8, RZ &req={0} ?trans1;
@P0 IADD3 R9, PT, PT, R9, 0x1, RZ ?trans2;
IADD3 R5, PT, PT, R2.reuse, -0x1, RZ ?trans1;
IMAD R6, R2, 0x2004, RZ ?trans1;
BSSY.RECONVERGENT B0, 0x610 ?trans1;
ISETP.GE.AND P0, PT, R10, R13, PT ?trans1;
@P2 IADD3 R9, PT, PT, R9, 0x1, RZ ?trans2;
LOP3.LUT R5, R5, UR8, RZ, 0xc0, !PT ?trans2;
@!P1 LOP3.LUT R9, RZ, R2, RZ, 0x33, !PT ?trans1;
ISETP.EQ.OR P0, PT, R8, RZ, P0 ?WAIT2_END_GROUP;
IMAD R5, R13, R5, RZ ?WAIT4_END_GROUP;
IMAD R9, R6, R9, R5 ?WAIT7_END_GROUP;
@P0 BRA 0x600 ?trans5;
LDC.64 R6, c[0x0][0x380] &wr=0x0 ?trans1;
IADD3 R5, PT, PT, R9, R10, RZ ?trans2;
IADD3 R9, PT, PT, R13, R9, RZ ?trans2;
SHF.R.U32.HI R10, RZ, 0x1, R2 ?trans2;
IADD3 R8, PT, PT, R5, R8, RZ ?WAIT3_END_GROUP;
IMAD R13, R10, 0x2004, R5 ?trans2;
VIMNMX.S32 R12, R9, R8, PT ?WAIT7_END_GROUP;
IMAD.WIDE.U32 R8, R13, 0x4, R6 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R10, R5.reuse, 0x4, R6 &req={1} ?trans2;
LDG.E R8, desc[UR6][R8.64] &wr=0x2 ?trans4;
LDG.E R15, desc[UR6][R10.64] &wr=0x2 ?trans1;
IADD3 R5, PT, PT, R5, 0x1, RZ ?trans2;
IADD3 R13, PT, PT, R13, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.AND P0, PT, R5, R12, PT ?trans1;
IADD3 R15, PT, PT, R8, R15, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R10.64], R15 &rd=0x1 ?trans7;
@!P0 BRA 0x560 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
SHF.R.U32.HI R0, RZ, 0x1, R0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
IADD3 R2, PT, PT, R2, R2, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R0, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0xa0 ?trans5;
EXIT ?trans5;
BRA 0x670;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: merge(int*)
_Z5mergePi:
s_load_b32 s4, s[0:1], 0x8
s_add_u32 s2, s0, 8
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_cmp_eq_u32 s4, 1
s_cbranch_scc1 .LBB1_8
s_load_b32 s2, s[2:3], 0xc
s_ashr_i32 s5, s4, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s3, s4, s5
s_xor_b32 s6, s3, s5
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f32_u32_e32 v1, s6
v_rcp_iflag_f32_e32 v1, v1
s_waitcnt lgkmcnt(0)
s_and_b32 s7, s2, 0xffff
s_load_b64 s[2:3], s[0:1], 0x0
v_cvt_f32_u32_e32 v2, s7
s_ashr_i32 s1, s15, 31
s_sub_i32 s11, 0, s7
s_add_i32 s0, s15, s1
s_delay_alu instid0(SALU_CYCLE_1)
s_xor_b32 s8, s0, s1
v_rcp_iflag_f32_e32 v2, v2
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v1, 0x4f7ffffe, v1
s_sub_i32 s0, 0, s6
v_mul_f32_e32 v2, 0x4f7ffffe, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_u32_f32_e32 v1, v1
v_cvt_u32_f32_e32 v2, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_readfirstlane_b32 s9, v1
v_readfirstlane_b32 s10, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_mul_i32 s0, s0, s9
s_mul_hi_u32 s0, s9, s0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
s_mul_i32 s11, s11, s10
s_add_i32 s9, s9, s0
s_mul_hi_u32 s11, s10, s11
s_add_i32 s10, s10, s11
s_mov_b32 s11, 2
.LBB1_2:
s_mul_i32 s0, s4, 0x2004
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_ashr_i32 s12, s0, 31
s_add_i32 s0, s0, s12
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
s_xor_b32 s0, s0, s12
s_xor_b32 s12, s12, s5
s_mul_hi_u32 s13, s0, s9
s_mul_i32 s14, s13, s6
s_delay_alu instid0(SALU_CYCLE_1)
s_sub_i32 s0, s0, s14
s_add_i32 s14, s13, 1
s_sub_i32 s16, s0, s6
s_cmp_ge_u32 s0, s6
s_cselect_b32 s13, s14, s13
s_cselect_b32 s0, s16, s0
s_add_i32 s14, s13, 1
s_cmp_ge_u32 s0, s6
s_cselect_b32 s0, s14, s13
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_xor_b32 s0, s0, s12
s_sub_i32 s0, s0, s12
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshr_b32 s12, s0, 31
s_add_i32 s0, s0, s12
s_mov_b32 s12, 1
s_ashr_i32 s0, s0, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lt_i32 s0, s7
s_cbranch_scc1 .LBB1_4
s_mul_hi_u32 s12, s0, s10
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
s_mul_i32 s13, s12, s7
s_add_i32 s14, s12, 1
s_sub_i32 s13, s0, s13
s_sub_i32 s16, s13, s7
s_cmp_ge_u32 s13, s7
s_cselect_b32 s12, s14, s12
s_cselect_b32 s13, s16, s13
s_add_i32 s14, s12, 1
s_cmp_ge_u32 s13, s7
s_cselect_b32 s12, s14, s12
.LBB1_4:
s_ashr_i32 s13, s11, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s14, s11, s13
s_xor_b32 s14, s14, s13
s_xor_b32 s13, s1, s13
v_cvt_f32_u32_e32 v1, s14
s_sub_i32 s17, 0, s14
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v1, v1
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v1, 0x4f7ffffe, v1
v_cvt_u32_f32_e32 v1, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_readfirstlane_b32 s16, v1
s_mul_i32 s17, s17, s16
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_mul_hi_u32 s17, s16, s17
s_add_i32 s16, s16, s17
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_mul_hi_u32 s16, s8, s16
s_mul_i32 s17, s16, s14
s_add_i32 s18, s16, 1
s_sub_i32 s17, s8, s17
s_delay_alu instid0(SALU_CYCLE_1)
s_sub_i32 s19, s17, s14
s_cmp_ge_u32 s17, s14
s_cselect_b32 s16, s18, s16
s_cselect_b32 s17, s19, s17
s_add_i32 s18, s16, 1
s_cmp_ge_u32 s17, s14
s_cselect_b32 s14, s18, s16
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_xor_b32 s14, s14, s13
s_sub_i32 s13, s14, s13
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_mul_i32 s13, s11, s13
s_sub_i32 s14, s15, s13
s_mulk_i32 s13, 0x2004
s_mul_i32 s14, s14, s0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s14, s14, s13
v_mad_u64_u32 v[1:2], null, s12, v0, s[14:15]
s_add_i32 s0, s14, s0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v2, s12, v1
s_mov_b32 s12, exec_lo
v_min_i32_e32 v6, s0, v2
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_lt_i32_e64 v1, v6
s_cbranch_execz .LBB1_7
s_lshr_b32 s0, s11, 1
s_mov_b32 s13, 0
v_mad_u64_u32 v[3:4], null, 0x2004, s0, v[1:2]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[7:8], 2, v[1:2]
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 2, v[3:4]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s2, v3
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v4, vcc_lo
v_add_co_u32 v4, vcc_lo, s2, v7
v_add_co_ci_u32_e32 v5, vcc_lo, s3, v8, vcc_lo
.LBB1_6:
global_load_b32 v7, v[2:3], off
global_load_b32 v8, v[4:5], off
v_add_nc_u32_e32 v1, 1, v1
v_add_co_u32 v2, vcc_lo, v2, 4
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_cmp_ge_i32_e32 vcc_lo, v1, v6
s_or_b32 s13, vcc_lo, s13
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v7, v8, v7
global_store_b32 v[4:5], v7, off
v_add_co_u32 v4, s0, v4, 4
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v5, s0, 0, v5, s0
s_and_not1_b32 exec_lo, exec_lo, s13
s_cbranch_execnz .LBB1_6
.LBB1_7:
s_or_b32 exec_lo, exec_lo, s12
s_lshr_b32 s0, s4, 31
s_lshl_b32 s11, s11, 1
s_add_i32 s0, s4, s0
s_and_b32 s4, s4, -2
s_ashr_i32 s0, s0, 1
s_cmp_eq_u32 s4, 2
s_mov_b32 s4, s0
s_waitcnt lgkmcnt(0)
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB1_2
.LBB1_8:
s_endpgm
| merge | 2,592 | 3,299 | stackv2-00000-of-00015 |
// Demangled: compute_each_step(Vector2f*, double)
Function : _Z17compute_each_stepP8Vector2fd
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R15, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R15, R0, UR4, R15 &req={1} ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R15, 0x3e7, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R26, c[0x0][0x358] &wr=0x0 ?trans2;
LDCU.64 UR4, c[0x0][0x388] &wr=0x1 ?trans1;
I2F.F64 R2, R15 &req={2} &wr=0x1 ?trans1;
MOV.64 R4, 0x3e7ad7f29abcaf48 ?trans2;
HFMA2 R14, -RZ, RZ, 0, 0 ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R2, R4, UR4 &req={1} &rd=0x1 &wr=0x2 ?trans2;
LDC.64 R4, c[0x0][0x380] &req={1} &wr=0x1 ?trans1;
MOV.64 R8, R2.reuse &req={2} ?trans2;
MOV.64 R16, R2 ?WAIT15_END_GROUP;
NOP ?WAIT14_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R6, R2, R2 &req={4,1} &rd=0x2 &wr=0x3 ?trans2;
DMUL R10, R16, R16 &req={4} ?trans1;
R2UR UR4, R26 &req={0} ?trans2;
R2UR UR5, R27.reuse ?trans1;
ISETP.GE.U32.AND P0, PT, R14, 0x64, PT ?trans1;
R2UR UR6, R26.reuse ?trans2;
R2UR UR7, R27.reuse ?trans2;
R2UR UR8, R26 ?trans2;
R2UR UR9, R27 ?WAIT2_END_GROUP;
R2UR UR10, R26 ?trans2;
R2UR UR11, R27 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R12, R8, R8 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, RZ, R12, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, RZ, R10, -R12 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R18, R16, R8 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, RZ, R6, R20 &req={3,0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, -R6, R10 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, RZ, R18, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, -R18, R10 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, -R2, R16, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, -R2, R16, R10 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R2, R8, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, -R2, R8, R10 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R20, -R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, RZ, R16, R10 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, RZ, R8, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, R10, -R8 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R30, RZ, R2, R20 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R24, RZ, R2, R10 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R36, R24 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R30, R30 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R34, R36 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R24, R24 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, RZ, R10, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, RZ, R8, -R10 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R12, R30, R24 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, RZ, R6, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, -R6, R8 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, RZ, R12, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, -R12, R8 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, -R2, R30, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, -R2, R30, R8 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R2, R24, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, -R2, R24, R8 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, -R30, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, RZ, R30, R8 &req={1} &rd=0x1 &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R30, R30 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, RZ, R24, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R32, R30 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, -R24, R8 &req={3} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, RZ, R2, R16 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, RZ, R2, R8 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R37, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R22, R22 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R24, R37 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R12, R20, R20 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, RZ, R12, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, RZ, R10, -R12 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R22, R20 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, RZ, R6, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, -R6, R10 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, RZ, R8, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, -R8, R10 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, -R2, R22, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, -R2, R22, R10 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R2, R20, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, -R2, R20, R10 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, -R22, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, RZ, R22, R10 &req={1} &rd=0x1 &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R23, R22 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, RZ, R20, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, -R20, R10 &req={3} &rd=0x1 &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R20, R23 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, RZ, R2, R12 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, RZ, R2, R8 &req={3} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R36, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R12, R12 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R28, R8, R8 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, RZ, R28, R10 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R16, R12, R8 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, RZ, R10, -R28 &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, RZ, R6, R18 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, -R6, R10 &req={3} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, RZ, R16, R18 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, -R16, R10 &req={3} &rd=0x3 &wr=0x4 ?trans2;
MOV.64 R10, 0x4069000000000000 &req={3} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R28, -R2, R12, R18 &req={1} &rd=0x1 &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R19, R12 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, -R2, R12, R16 &req={4} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R30, R2, R8, R28 &req={3} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R28, -R2, R8, R16 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, -R12, R30 &req={3} &rd=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R30, R36 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R34, R34, R10, 450 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R22, R34 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, RZ, R8, R16 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R32, R32, R10, 800 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R18, R32 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, RZ, R2, R16 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R34, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R28, RZ, R12, R28 &rd=0x0 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R12, R34 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, -R8, R28 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R32, R30, R10, 450 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R23, R32 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, RZ, R2, R8 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R36, R8 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R28, R12, R10, 800 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R30, R19 &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R24, R24, R10, 450 &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R32, R36 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R20, R10, 800 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R12, R28 &req={0} &rd=0x0 ?trans2;
IMAD R29, R15, 0x320, R14 &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R30, R30, R10, 800 &req={3} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R18, R18 &wr=0x3 ?trans2;
FSEL R36, R18, -3.68934881474191032320e+19, P0 &req={3} ?trans1;
FSEL R37, R19, 122879.9921875, P0 ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R32, R32, R10, 450 &rd=0x3 &wr=0x5 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R10, R22 &req={3} &wr=0x3 ?trans2;
FSEL R34, R10, -3.68934881474191032320e+19, P0 &req={3} ?trans1;
FSEL R35, R11, 122879.9921875, P0 ?trans1;
IMAD.WIDE R10, R29, 0x10, R4 ?trans1;
ISETP.GE.U32.AND P0, PT, R14, 0x63, PT ?WAIT4_END_GROUP;
STG.E.64 desc[UR4][R10.64+0x8], R34 &rd=0x3 ?trans4;
STG.E.64 desc[UR4][R10.64], R36 ?WAIT15_END_GROUP;
NOP ?WAIT6_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R24, R24 &req={4} &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R20, R20 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R24, R24 &req={4} &wr=0x3 ?trans2;
FSEL R34, R24, -3.68934881474191032320e+19, P0 &req={3} ?trans1;
FSEL R35, R25, 122879.9921875, P0 ?WAIT5_END_GROUP;
STG.E.64 desc[UR6][R10.64+0x18], R34 ?WAIT15_END_GROUP;
NOP ?WAIT11_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R28, R20 &wr=0x1 ?trans2;
FSEL R24, R28, -3.68934881474191032320e+19, P0 &req={1} ?trans1;
FSEL R25, R29, 122879.9921875, P0 ?trans1;
ISETP.GE.U32.AND P0, PT, R14, 0x62, PT ?WAIT4_END_GROUP;
STG.E.64 desc[UR4][R10.64+0x10], R24 &rd=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT11_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R21, R30 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R18, R23 &wr=0x0 ?trans2;
FSEL R20, R18, -3.68934881474191032320e+19, P0 &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R30, R21 &rd=0x0 &wr=0x3 ?trans2;
FSEL R21, R19, 122879.9921875, P0 &req={0} ?trans1;
FSEL R18, R30, -3.68934881474191032320e+19, P0 &req={3} ?trans1;
FSEL R19, R31, 122879.9921875, P0 ?trans1;
ISETP.GE.U32.AND P0, PT, R14.reuse, 0x61, PT ?trans1;
IADD3 R14, PT, PT, R14, 0x4, RZ ?trans1;
STG.E.64 desc[UR8][R10.64+0x28], R20 &rd=0x4 ?trans4;
STG.E.64 desc[UR4][R10.64+0x20], R18 &rd=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT8_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R13, R32 &req={5} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R32, R12 &wr=0x0 ?trans2;
FSEL R22, R32, -3.68934881474191032320e+19, P0 &req={0} ?trans1;
FSEL R23, R33, 122879.9921875, P0 ?WAIT5_END_GROUP;
STG.E.64 desc[UR6][R10.64+0x30], R22 &rd=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT11_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R12, R13 &wr=0x1 ?trans2;
FSEL R24, R12, -3.68934881474191032320e+19, P0 &req={1} ?trans1;
FSEL R25, R13, 122879.9921875, P0 ?trans1;
ISETP.NE.AND P0, PT, R14, 0x320, PT ?WAIT4_END_GROUP;
STG.E.64 desc[UR10][R10.64+0x38], R24 &rd=0x4 ?trans9;
@P0 BRA 0x180 ?trans5;
LDCU UR4, c[0x0][0x370] &wr=0x0 ?trans2;
IMAD R15, R0, UR4, R15 &req={0} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R15, 0x3e8, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x80 ?trans5;
EXIT ?trans5;
BRA 0x2810;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: compute_each_step(Vector2f*, double)
_Z17compute_each_stepP8Vector2fd:
s_load_b32 s4, s[0:1], 0x1c
s_add_u32 s2, s0, 16
s_addc_u32 s3, s1, 0
s_mov_b32 s5, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s10, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_mul_i32 s4, s15, s10
v_add_nc_u32_e32 v12, s4, v0
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e32 0x3e8, v12
s_cbranch_execz .LBB0_5
s_load_b32 s11, s[2:3], 0x0
s_load_b128 s[0:3], s[0:1], 0x0
s_mul_i32 s12, s4, 0x320
s_mov_b32 s4, 0x9abcaf48
v_mad_u32_u24 v13, 0x320, v0, s12
s_mov_b32 s6, 0
s_mov_b32 s8, 0
s_mov_b32 s5, 0x3e7ad7f2
s_mov_b32 s7, 0x40690000
s_mov_b32 s9, 0x407c2000
s_mov_b32 s12, 0
s_waitcnt lgkmcnt(0)
s_mul_i32 s10, s11, s10
s_delay_alu instid0(SALU_CYCLE_1)
s_mul_i32 s11, s10, 0x320
.LBB0_2:
v_cvt_f64_i32_e32 v[0:1], v12
s_mov_b32 s13, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[0:1], v[0:1], s[4:5], s[2:3]
v_mul_f64 v[2:3], v[0:1], v[0:1]
v_mul_f64 v[6:7], v[0:1], 0
v_dual_mov_b32 v11, v1 :: v_dual_mov_b32 v10, v0
v_dual_mov_b32 v9, v1 :: v_dual_mov_b32 v8, v0
s_delay_alu instid0(VALU_DEP_4)
v_mul_f64 v[4:5], v[2:3], 0
.LBB0_3:
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mul_f64 v[14:15], v[10:11], v[10:11]
v_mul_f64 v[16:17], v[8:9], v[8:9]
s_cmpk_lt_u32 s13, 0x64
s_cselect_b32 s14, -1, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_fma_f64 v[18:19], v[14:15], 0, -v[16:17]
v_fma_f64 v[14:15], v[16:17], 0, v[14:15]
v_mul_f64 v[16:17], v[8:9], v[10:11]
v_add_f64 v[18:19], v[18:19], -v[2:3]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[14:15], v[4:5], v[14:15]
v_fma_f64 v[18:19], -v[8:9], v[10:11], v[18:19]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[14:15], v[16:17], 0, v[14:15]
v_fma_f64 v[16:17], v[0:1], -v[10:11], v[18:19]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[14:15], -v[0:1], v[10:11], v[14:15]
v_fma_f64 v[16:17], -v[0:1], v[8:9], v[16:17]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[14:15], v[0:1], v[8:9], v[14:15]
v_fma_f64 v[16:17], v[10:11], 0, v[16:17]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[10:11], v[14:15], -v[10:11]
v_add_f64 v[14:15], v[16:17], -v[8:9]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[10:11], v[8:9], 0, v[10:11]
v_add_f64 v[8:9], v[6:7], v[14:15]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[10:11], v[6:7], v[10:11]
v_cvt_f32_f64_e32 v14, v[8:9]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_f32_f64_e32 v16, v[10:11]
v_cvt_f64_f32_e32 v[14:15], v14
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_f64_f32_e32 v[16:17], v16
v_fma_f64 v[14:15], 0x40690000, v[14:15], s[8:9]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[16:17], v[16:17], s[6:7], 0x40890000
v_cvt_f32_f64_e32 v14, v[14:15]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_f32_f64_e32 v16, v[16:17]
v_cvt_f64_f32_e32 v[14:15], v14
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_cvt_f64_f32_e32 v[18:19], v16
v_add_nc_u32_e32 v16, s13, v13
s_add_i32 s13, s13, 1
s_cmpk_eq_i32 s13, 0x320
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v17, 31, v16
v_lshlrev_b64 v[16:17], 4, v[16:17]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v20, vcc_lo, s0, v16
v_add_co_ci_u32_e32 v21, vcc_lo, s1, v17, vcc_lo
v_cndmask_b32_e64 v17, v15, 0x47efffff, s14
v_cndmask_b32_e64 v16, v14, 0xe0000000, s14
v_cndmask_b32_e64 v15, v19, 0x47efffff, s14
v_cndmask_b32_e64 v14, v18, 0xe0000000, s14
global_store_b128 v[20:21], v[14:17], off
s_cbranch_scc0 .LBB0_3
v_add_nc_u32_e32 v12, s10, v12
v_add_nc_u32_e32 v13, s11, v13
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_lt_i32_e32 vcc_lo, 0x3e7, v12
s_or_b32 s12, vcc_lo, s12
s_and_not1_b32 exec_lo, exec_lo, s12
s_cbranch_execnz .LBB0_2
.LBB0_5:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| compute_each_step | 9,091 | 2,631 | stackv2-00000-of-00015 |
// Demangled: calculateFinal(int, double*, double*, int, int*, int*, double*, double*, int*, double*, double*, int)
Function : _Z14calculateFinaliPdS_iPiS0_S_S_S0_S_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_TID.Y &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x398] &wr=0x1 ?trans2;
ISETP.GE.AND P0, PT, R5, UR6, PT &req={1} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDCU UR7, c[0x0][0x3d8] &wr=0x1 ?trans1;
S2R R4, SR_TID.X &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x3b0] &wr=0x3 ?trans1;
LDCU UR9, c[0x0][0x360] &wr=0x4 ?trans1;
LDCU.64 UR12, c[0x0][0x358] &wr=0x0 ?trans1;
LDCU UR14, c[0x0][0x398] &wr=0x0 ?trans1;
UIMAD UR7, UR6, UR7, URZ &req={1} ?trans1;
UIMAD UR6, UR6, 0x1c2, URZ ?WAIT3_END_GROUP;
UIMAD UR8, UR7, 0x1c2, URZ ?trans1;
USHF.R.S32.HI UR11, URZ, 0x1f, UR7 ?trans1;
USHF.L.U32 UR10, UR7, 0x3, URZ ?trans2;
UIMAD.WIDE UR4, UR8, 0x8, UR4 &req={3} ?trans1;
USHF.L.U64.HI UR11, UR7, 0x3, UR11 &req={4,0} ?WAIT12_END_GROUP;
LDCU UR7, c[0x0][0x3d8] &req={0} &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0x490 ?trans1;
ISETP.GE.AND P0, PT, R4, UR7, PT &req={2,0} ?WAIT13_END_GROUP;
@P0 BRA 0x480 &req={1} ?trans5;
LDC.64 R2, c[0x0][0x3c0] &wr=0x0 ?trans1;
MOV R0, R4 ?trans1;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT7_END_GROUP;
LDC R7, c[0x0][0x3d8] &req={0} &wr=0x0 ?trans1;
ISETP.GE.AND P0, PT, R5.reuse, UR6, PT ?trans1;
BSSY.RECONVERGENT B1, 0x2b0 ?trans4;
ISETP.NE.OR P0, PT, R0, RZ, P0 ?trans1;
IMAD R17, R5, R7, R0 &req={1,0} ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R17, UR8, PT ?WAIT7_END_GROUP;
@P0 BRA 0x2a0 &req={2} ?trans6;
LDG.E R13, desc[UR12][R2.64] &rd=0x0 &wr=0x5 ?trans1;
LDC.64 R10, c[0x0][0x3a8] &wr=0x1 ?trans1;
MOV R15, R5 ?WAIT7_END_GROUP;
IMAD.WIDE R8, R15, 0x4, R10 &req={1} ?WAIT6_END_GROUP;
LDG.E R8, desc[UR12][R8.64] &req={2} &wr=0x2 ?trans1;
IADD3 R15, PT, PT, R15, UR14, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R15, UR6, PT ?trans1;
IADD3 R13, PT, PT, R8, R13, RZ &req={5,2} ?WAIT5_END_GROUP;
STG.E desc[UR12][R2.64], R13 &rd=0x2 ?trans7;
@!P0 BRA 0x230 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
BSSY.RECONVERGENT B1, 0x450 ?trans4;
@P1 BRA 0x440 ?trans5;
LDC.64 R10, c[0x0][0x3d0] &wr=0x1 ?trans8;
LDC.64 R12, c[0x0][0x3b8] &req={2} &wr=0x2 ?trans8;
LDC.64 R8, c[0x0][0x3c8] &wr=0x3 ?trans8;
LDC.64 R14, c[0x0][0x3b0] &wr=0x4 ?trans1;
IMAD.WIDE R20, R17, 0x8, R10 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R10, R17, 0x8, R12 &req={2} ?WAIT4_END_GROUP;
IMAD.WIDE R8, R17, 0x8, R8 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE R12, R17, 0x8, R14 &req={4} ?WAIT7_END_GROUP;
LDG.E.64 R14, desc[UR12][R12.64] &req={1} &wr=0x2 ?trans4;
LDG.E.64 R16, desc[UR12][R8.64] &wr=0x2 ?trans2;
DADD R14, R14, R16 &req={2} &wr=0x1 ?trans2;
STG.E.64 desc[UR12][R8.64], R14 &req={1} &rd=0x1 ?trans4;
LDG.E.64 R16, desc[UR12][R10.64] &rd=0x2 &wr=0x3 ?trans4;
LDG.E.64 R18, desc[UR12][R20.64] &wr=0x3 ?trans1;
IADD.64 R12, R12, UR10 ?WAIT2_END_GROUP;
IADD.64 R10, R10, UR10 &req={2} ?WAIT4_END_GROUP;
ISETP.GE.U64.AND P0, PT, R12, UR4, PT ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R16, R18 &req={3} &wr=0x2 ?trans2;
STG.E.64 desc[UR12][R20.64], R16 &req={2} &rd=0x1 ?trans1;
@!P0 BRA 0x350 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
IADD3 R0, PT, PT, R0, UR9, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, R7, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x190 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU UR7, c[0x0][0x364] &wr=0x3 ?trans1;
LDCU UR15, c[0x0][0x398] &wr=0x4 ?trans1;
IADD3 R5, PT, PT, R5, UR7, RZ &req={3} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR15, PT &req={4} ?WAIT13_END_GROUP;
@!P0 BRA 0x120 ?trans5;
EXIT ?trans5;
BRA 0x4f0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: calculateFinal(int, double*, double*, int, int*, int*, double*, double*, int*, double*, double*, int)
_Z14calculateFinaliPdS_iPiS0_S_S_S0_S_S_i:
s_load_b32 s2, s[0:1], 0x18
v_bfe_u32 v1, v0, 10, 10
s_mov_b32 s3, exec_lo
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s2, v1
s_cbranch_execz .LBB2_12
s_clause 0x3
s_load_b32 s26, s[0:1], 0x58
s_load_b256 s[4:11], s[0:1], 0x28
s_load_b32 s3, s[0:1], 0x6c
s_load_b128 s[12:15], s[0:1], 0x48
v_and_b32_e32 v0, 0x3ff, v0
s_mul_i32 s27, s2, 0x1c2
s_mov_b32 s28, 0
s_waitcnt lgkmcnt(0)
s_mul_i32 s22, s26, s2
v_mad_u64_u32 v[3:4], null, v1, s26, v[0:1]
s_mul_i32 s16, s22, 0x1c2
v_cmp_gt_i32_e32 vcc_lo, s26, v0
s_ashr_i32 s17, s16, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[18:19], s[16:17], 3
s_add_u32 s18, s6, s18
s_addc_u32 s19, s7, s19
s_ashr_i32 s23, s22, 31
s_add_u32 s20, s0, 0x60
s_addc_u32 s21, s1, 0
s_lshr_b32 s17, s3, 16
s_ashr_i32 s3, s2, 31
s_lshl_b64 s[22:23], s[22:23], 3
s_lshl_b64 s[24:25], s[2:3], 2
s_mul_i32 s3, s26, s17
.LBB2_2:
s_and_saveexec_b32 s29, vcc_lo
s_cbranch_execz .LBB2_11
s_load_b32 s31, s[20:21], 0xc
v_ashrrev_i32_e32 v2, 31, v1
v_cmp_le_i32_e64 s0, s27, v1
v_mov_b32_e32 v4, v3
v_mov_b32_e32 v16, v0
s_mov_b32 s30, 0
v_lshlrev_b64 v[8:9], 2, v[1:2]
v_mul_lo_u32 v2, v1, s26
s_xor_b32 s33, s0, -1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v6, s1, s4, v8
v_add_co_ci_u32_e64 v7, s1, s5, v9, s1
v_add_co_u32 v8, s1, s10, v8
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v9, s1, s11, v9, s1
s_waitcnt lgkmcnt(0)
s_and_b32 s31, s31, 0xffff
.LBB2_4:
v_cmp_eq_u32_e64 s0, 0, v16
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, s0, s33
s_and_saveexec_b32 s34, s0
s_cbranch_execz .LBB2_7
global_load_b32 v5, v[8:9], off
v_dual_mov_b32 v11, v7 :: v_dual_mov_b32 v10, v6
v_mov_b32_e32 v12, v1
s_mov_b32 s35, 0
.LBB2_6:
global_load_b32 v13, v[10:11], off
v_add_nc_u32_e32 v12, s2, v12
v_add_co_u32 v10, s0, v10, s24
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v11, s0, s25, v11, s0
v_cmp_le_i32_e64 s1, s27, v12
s_delay_alu instid0(VALU_DEP_1)
s_or_b32 s35, s1, s35
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v5, v5, v13
global_store_b32 v[8:9], v5, off
s_and_not1_b32 exec_lo, exec_lo, s35
s_cbranch_execnz .LBB2_6
.LBB2_7:
s_or_b32 exec_lo, exec_lo, s34
v_add_nc_u32_e32 v10, v16, v2
s_mov_b32 s1, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s16, v10
s_cbranch_execz .LBB2_10
v_ashrrev_i32_e32 v11, 31, v10
v_ashrrev_i32_e32 v5, 31, v4
s_mov_b32 s34, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[14:15], 3, v[10:11]
v_lshlrev_b64 v[10:11], 3, v[4:5]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v12, s0, s12, v14
v_add_co_ci_u32_e64 v13, s0, s13, v15, s0
v_add_co_u32 v14, s0, s14, v14
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v15, s0, s15, v15, s0
.LBB2_9:
v_add_co_u32 v17, s0, s6, v10
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v18, s0, s7, v11, s0
global_load_b64 v[19:20], v[12:13], off
global_load_b64 v[17:18], v[17:18], off
s_waitcnt vmcnt(0)
v_add_f64 v[17:18], v[17:18], v[19:20]
v_add_co_u32 v19, s0, s8, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e64 v20, s0, s9, v11, s0
v_add_co_u32 v10, s0, v10, s22
v_add_co_ci_u32_e64 v11, s0, s23, v11, s0
global_store_b64 v[12:13], v[17:18], off
global_load_b64 v[17:18], v[19:20], off
global_load_b64 v[19:20], v[14:15], off
s_waitcnt vmcnt(0)
v_add_f64 v[17:18], v[17:18], v[19:20]
v_add_co_u32 v19, s0, s6, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e64 v20, s0, s7, v11, s0
v_cmp_le_u64_e64 s0, s[18:19], v[19:20]
s_delay_alu instid0(VALU_DEP_1)
s_or_b32 s34, s0, s34
global_store_b64 v[14:15], v[17:18], off
s_and_not1_b32 exec_lo, exec_lo, s34
s_cbranch_execnz .LBB2_9
.LBB2_10:
s_or_b32 exec_lo, exec_lo, s1
v_add_nc_u32_e32 v16, s31, v16
v_add_nc_u32_e32 v4, s31, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_le_i32_e64 s0, s26, v16
s_or_b32 s30, s0, s30
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s30
s_cbranch_execnz .LBB2_4
.LBB2_11:
s_or_b32 exec_lo, exec_lo, s29
v_add_nc_u32_e32 v1, s17, v1
v_add_nc_u32_e32 v3, s3, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_le_i32_e64 s0, s2, v1
s_or_b32 s28, s0, s28
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s28
s_cbranch_execnz .LBB2_2
.LBB2_12:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| calculateFinal | 2,058 | 2,749 | stackv2-00000-of-00015 |
// Demangled: getClusterCentroids(int, double*, double*, int, int*, int*, int)
Function : _Z19getClusterCentroidsiPdS_iPiS0_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R0, UR4, R3 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R6, c[0x0][0x398] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans1;
HFMA2 R2, -RZ, RZ, 0, 0 ?trans1;
ISETP.GE.AND P0, PT, R6, 0x1, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0x15c0 &req={1} ?trans5;
LDC R7, c[0x0][0x3b0] &wr=0x0 ?trans2;
ISETP.GE.AND P0, PT, R7, 0x1, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0x1040 ?trans5;
LOP3.LUT R6, R7.reuse, 0x7ffffff8, RZ, 0xc0, !PT ?trans1;
HFMA2 R2, -RZ, RZ, 0, 0 ?trans1;
MOV.64 R8, 0x7fefffffffffffff ?trans2;
IMAD R3, R0, R7, RZ ?trans1;
LOP3.LUT R4, R7.reuse, 0x7, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R5, R7, 0x3, RZ, 0xc0, !PT ?trans1;
MOV R7, RZ ?trans1;
IADD3 R6, PT, PT, -R6, RZ, RZ ?WAIT7_END_GROUP;
LDC R30, c[0x0][0x3b0] &wr=0x0 ?trans1;
UMOV UR4, URZ ?trans1;
MOV.64 R26, RZ ?trans2;
ISETP.NE.AND P1, PT, R4, RZ, PT ?trans1;
ISETP.GE.U32.AND P0, PT, R30, 0x8, PT &req={0} ?trans1;
IMAD R34, R7, R30, RZ ?WAIT12_END_GROUP;
@!P0 BRA 0x880 &req={4,2} ?trans5;
LDC.64 R10, c[0x0][0x390] &wr=0x0 ?trans1;
MOV.64 R26, RZ ?trans2;
MOV R35, R3 ?trans1;
MOV R31, R6 ?trans1;
UMOV UR4, URZ ?trans1;
IMAD.WIDE.U32 R10, R34, 0x8, R10 &req={0} ?WAIT5_END_GROUP;
IADD.64 R10, R10, 0x20 ?WAIT8_END_GROUP;
LDC.64 R32, c[0x0][0x388] &wr=0x0 ?trans1;
LDG.E.64 R24, desc[UR6][R10.64+-0x20] &wr=0x2 ?trans4;
LDG.E.64 R20, desc[UR6][R10.64+-0x18] &wr=0x3 ?trans4;
LDG.E.64 R12, desc[UR6][R10.64+-0x10] &wr=0x4 ?trans4;
LDG.E.64 R28, desc[UR6][R10.64+0x18] &wr=0x5 ?trans1;
IMAD.WIDE R32, R35, 0x8, R32 &req={0} ?WAIT5_END_GROUP;
LDG.E.64 R14, desc[UR6][R32.64] &wr=0x2 ?trans4;
LDG.E.64 R22, desc[UR6][R32.64+0x8] &wr=0x3 ?trans4;
LDG.E.64 R16, desc[UR6][R32.64+0x10] &wr=0x4 ?trans4;
LDG.E.64 R18, desc[UR6][R32.64+0x18] &wr=0x3 ?trans1;
DADD R24, R14, -R24 &req={2} &rd=0x0 &wr=0x1 ?trans3;
LDG.E.64 R14, desc[UR6][R10.64+-0x8] &req={0} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R24, R24, R24, R26 &req={1} &rd=0x0 ?trans2;
LDG.E.64 R26, desc[UR6][R32.64+0x38] &req={0} &wr=0x5 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R22, -R20 &req={3} &rd=0x0 &wr=0x1 ?trans2;
LDG.E.64 R22, desc[UR6][R32.64+0x28] &req={0} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, R16, -R12 &req={4} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R24, R20, R20, R24 &req={1} &rd=0x0 &wr=0x1 ?trans2;
LDG.E.64 R20, desc[UR6][R32.64+0x20] &req={0} &wr=0x4 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R12, R12, R24 &req={1} &rd=0x0 ?trans2;
LDG.E.64 R12, desc[UR6][R10.64] &req={0} &wr=0x4 ?trans4;
LDG.E.64 R24, desc[UR6][R32.64+0x30] &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, -R14 &req={2} &rd=0x0 &wr=0x1 ?trans2;
LDG.E.64 R14, desc[UR6][R10.64+0x8] &req={0} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R18, R18, R16 &req={1} &rd=0x0 ?trans2;
LDG.E.64 R18, desc[UR6][R10.64+0x10] &req={0} &rd=0x0 &wr=0x2 ?trans1;
IADD3 R31, PT, PT, R31, 0x8, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R31, RZ, PT ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
IADD3 R35, PT, PT, R35, 0x8, RZ ?trans1;
IADD.64 R10, R10, 0x40 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT8_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R26, R26, -R28 &req={5} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, R20, -R12 &req={4} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R12, R12, R16 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R14, R22, -R14 &req={3} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R24, -R18 &req={2} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R14, R14, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R18, R18, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R26, R26, R26, R16 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0x260 &req={1,0} ?trans5;
@!P1 BRA 0xfa0 ?trans5;
IADD3 R10, PT, PT, R4, -0x1, RZ ?trans1;
ISETP.NE.AND P1, PT, R5, RZ, PT ?WAIT4_END_GROUP;
ISETP.GE.U32.AND P0, PT, R10, 0x3, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xc60 ?trans5;
LDC.64 R28, c[0x0][0x390] &wr=0x0 ?trans1;
HFMA2 R35, -RZ, RZ, 0, 0 ?trans1;
UMOV UR5, URZ ?trans1;
IADD3 R15, PT, PT, R34.reuse, UR4, RZ ?trans2;
IADD3 R13, PT, PT, R3, UR4, RZ ?trans1;
IADD.64 R10, R34, UR4 ?trans2;
LDC.64 R16, c[0x0][0x390] &wr=0x1 ?trans8;
LDC.64 R32, c[0x0][0x388] &wr=0x2 ?trans1;
LEA R28, P0, R10, R28, 0x3 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R29, R10, R29, R11, 0x3, P0 ?trans1;
IMAD.WIDE.U32 R16, R15, 0x8, R16 &req={1} ?WAIT4_END_GROUP;
LDG.E.64 R18, desc[UR6][R28.64+0x8] &wr=0x3 ?trans4;
LDG.E.64 R20, desc[UR6][R28.64+0x10] &wr=0x4 ?trans1;
IMAD.WIDE R32, R13, 0x8, R32 &req={2} ?WAIT3_END_GROUP;
LDG.E.64 R16, desc[UR6][R16.64] &wr=0x2 ?trans4;
LDG.E.64 R24, desc[UR6][R32.64] &wr=0x2 ?trans4;
LDG.E.64 R10, desc[UR6][R32.64+0x8] &wr=0x3 ?trans4;
LDG.E.64 R12, desc[UR6][R32.64+0x10] &wr=0x4 ?trans4;
LDG.E.64 R14, desc[UR6][R32.64+0x18] &wr=0x5 ?trans4;
LDG.E.64 R22, desc[UR6][R28.64+0x18] &wr=0x5 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
DADD R24, R24, -R16 &req={2} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R26, R24, R24, R26 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, R10, -R18 &req={3} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, R12, -R20 &req={4} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R26, R10, R10, R26 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R14, R14, -R22 &req={5} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R26, R12, R12, R26 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R26, R14, R14, R26 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@!P1 BRA 0xfa0 ?trans5;
ISETP.NE.AND P0, PT, R5, 0x1, PT ?trans1;
LOP3.LUT P1, RZ, R30, 0x1, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0xeb0 ?trans5;
LDC.64 R10, c[0x0][0x390] &wr=0x2 ?trans1;
HFMA2 R35, -RZ, RZ, 0, 0 ?trans1;
UMOV UR5, URZ ?trans1;
IADD3 R19, PT, PT, R3, UR4, RZ ?trans2;
IADD3 R21, PT, PT, R34.reuse, UR4, RZ ?trans1;
IADD.64 R14, R34, UR4 &req={0} ?trans2;
LDC.64 R16, c[0x0][0x388] &wr=0x0 ?trans8;
LDC.64 R12, c[0x0][0x390] &wr=0x3 ?trans1;
LEA R10, P0, R14, R10, 0x3 &req={2} ?WAIT4_END_GROUP;
LEA.HI.X R11, R14, R11, R15, 0x3, P0 ?trans1;
IMAD.WIDE R16, R19, 0x8, R16 &req={0} ?WAIT5_END_GROUP;
LDG.E.64 R10, desc[UR6][R10.64+0x8] &wr=0x2 ?trans4;
LDG.E.64 R14, desc[UR6][R16.64+0x8] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R18, R21, 0x8, R12 &req={3} ?WAIT3_END_GROUP;
LDG.E.64 R12, desc[UR6][R16.64] &wr=0x3 ?trans4;
LDG.E.64 R18, desc[UR6][R18.64] &wr=0x3 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x2, URZ ?trans1;
DADD R14, R14, -R10 &req={2} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, R12, -R18 &req={3} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R26, R12, R12, R26 &req={1,0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R26, R14, R14, R26 &req={0} &rd=0x2 &wr=0x3 ?trans2;
@!P1 BRA 0xfa0 ?trans5;
LDC.64 R10, c[0x0][0x388] &wr=0x4 ?trans1;
IADD3 R15, PT, PT, R3, UR4, RZ &req={2,0} ?trans2;
IADD3 R17, PT, PT, R34, UR4, RZ ?WAIT5_END_GROUP;
LDC.64 R12, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD.WIDE R10, R15, 0x8, R10 &req={4} ?WAIT6_END_GROUP;
LDG.E.64 R10, desc[UR6][R10.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R12, R17, 0x8, R12 &req={0} ?WAIT6_END_GROUP;
LDG.E.64 R12, desc[UR6][R12.64] &wr=0x2 ?trans2;
DADD R14, R10, -R12 &req={2} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R26, R14, R14, R26 &req={3,1,0} &rd=0x4 &wr=0x0 ?trans2;
LDCU UR4, c[0x0][0x398] &wr=0x5 ?trans1;
IADD3 R10, PT, PT, R7, 0x1, RZ ?trans1;
DSETP.GEU.AND P0, PT, R26, R8, PT &req={3,1,0} &wr=0x0 ?trans2;
FSEL R8, R26, R8, !P0 &req={0} ?trans1;
FSEL R9, R27, R9, !P0 ?trans1;
SEL R2, R7, R2, !P0 ?trans1;
ISETP.NE.AND P1, PT, R10, UR4, PT &req={5} ?WAIT13_END_GROUP;
@!P1 BRA 0x15c0 ?trans5;
MOV R7, R10 ?trans1;
BRA 0x180 ?trans6;
ISETP.GE.U32.AND P0, PT, R6.reuse, 0x4, PT ?trans1;
MOV.64 R4, 0x7fefffffffffffff ?trans2;
HFMA2 R2, -RZ, RZ, 0, 0 ?trans1;
LOP3.LUT R9, R6, 0x3, RZ, 0xc0, !PT ?trans1;
MOV R7, RZ ?WAIT8_END_GROUP;
@!P0 BRA 0x1510 ?trans5;
LOP3.LUT R6, R6, 0x7ffffffc, RZ, 0xc0, !PT ?trans1;
UMOV UR4, URZ ?trans1;
MOV.64 R4, 0x7fefffffffffffff ?trans2;
MOV R7, RZ ?trans1;
ISETP.GT.AND P0, PT, R6, RZ, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1490 ?trans5;
IADD3 R3, PT, PT, R6, -UR4, RZ ?trans2;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?WAIT3_END_GROUP;
ISETP.GT.AND P1, PT, R3, 0xc, PT ?WAIT13_END_GROUP;
@!P1 BRA 0x1360 ?trans5;
PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x80 ?trans2;
IADD3 R10, PT, PT, R6, -0xc, RZ ?WAIT11_END_GROUP;
DSETP.GT.AND P1, PT, R4, RZ, PT &wr=0x0 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x10, URZ ?trans1;
FSEL R5, R5, RZ, !P1 &req={0} ?trans1;
FSEL R4, R4, RZ, !P1 ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GT.AND P2, PT, R4, RZ, PT &wr=0x0 ?trans2;
FSEL R12, R4, RZ, !P2 &req={0} ?trans1;
FSEL R13, R5, RZ, !P2 ?trans1;
SEL R4, R7.reuse, R2, P1 ?trans1;
@P2 IADD3 R4, PT, PT, R7, 0x4, RZ ?trans1;
ISETP.LE.AND P2, PT, R10, UR4, PT ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GT.AND P3, PT, R12, RZ, PT &wr=0x0 ?trans2;
FSEL R2, R12, RZ, !P3 &req={0} ?trans1;
FSEL R3, R13, RZ, !P3 ?trans1;
@P3 IADD3 R4, PT, PT, R7, 0x8, RZ ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GT.AND P1, PT, R2, RZ, PT &wr=0x0 ?trans2;
@P1 IADD3 R4, PT, PT, R7, 0xc, RZ &req={0} ?trans1;
FSEL R8, R2, RZ, !P1 ?trans1;
FSEL R5, R3, RZ, !P1 ?trans1;
IADD3 R7, PT, PT, R7, 0x10, RZ ?trans2;
MOV R2, R4 ?trans1;
MOV R4, R8 ?trans1;
@!P2 BRA 0x1160 ?trans6;
IADD3 R3, PT, PT, R6, -UR4, RZ ?WAIT5_END_GROUP;
ISETP.GT.AND P1, PT, R3, 0x4, PT ?WAIT13_END_GROUP;
@!P1 BRA 0x1470 ?trans5;
DSETP.GT.AND P1, PT, R4, RZ, PT &wr=0x0 ?trans1;
PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x80 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
FSEL R5, R5, RZ, !P1 &req={0} ?trans1;
FSEL R4, R4, RZ, !P1 ?trans1;
SEL R2, R7, R2, P1 ?WAIT15_END_GROUP;
NOP ?WAIT14_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GT.AND P1, PT, R4, RZ, PT &wr=0x0 ?trans2;
@P1 IADD3 R2, PT, PT, R7, 0x4, RZ &req={0} ?trans1;
FSEL R4, R4, RZ, !P1 ?trans1;
FSEL R5, R5, RZ, !P1 ?trans1;
IADD3 R7, PT, PT, R7, 0x8, RZ ?WAIT7_END_GROUP;
ISETP.NE.OR P0, PT, R6, UR4, P0 ?WAIT13_END_GROUP;
@!P0 BRA 0x1510 ?trans5;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
DSETP.GT.AND P1, PT, R4, RZ, PT &wr=0x0 ?trans2;
SEL R2, R7, R2, P1 &req={0} ?trans1;
FSEL R5, R5, RZ, !P1 ?trans1;
FSEL R4, R4, RZ, !P1 ?trans1;
ISETP.NE.AND P0, PT, R6, UR4, PT ?trans1;
IADD3 R7, PT, PT, R7, 0x4, RZ ?WAIT12_END_GROUP;
@P0 BRA 0x1490 ?trans5;
ISETP.NE.AND P0, PT, R9, RZ, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x15c0 ?trans5;
UMOV UR4, URZ ?WAIT5_END_GROUP;
UIADD3 UR4, UPT, UPT, UR4, 0x1, URZ ?trans1;
DSETP.GT.AND P1, PT, R4, RZ, PT &wr=0x0 ?trans2;
SEL R2, R7, R2, P1 &req={0} ?trans1;
FSEL R5, R5, RZ, !P1 ?trans1;
FSEL R4, R4, RZ, !P1 ?trans1;
ISETP.NE.AND P0, PT, R9, UR4, PT ?trans1;
IADD3 R7, PT, PT, R7, 0x1, RZ ?WAIT12_END_GROUP;
@P0 BRA 0x1540 ?trans5;
LDC.64 R4, c[0x0][0x3a8] &wr=0x0 ?trans2;
IMAD.WIDE R4, R0, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R2 ?trans1;
EXIT ?trans5;
BRA 0x1600;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: getClusterCentroids(int, double*, double*, int, int*, int*, int)
_Z19getClusterCentroidsiPdS_iPiS0_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x44
s_load_b32 s3, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_10
s_load_b32 s8, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s8, 1
s_cbranch_scc1 .LBB0_8
s_clause 0x1
s_load_b32 s9, s[0:1], 0x30
s_load_b128 s[4:7], s[0:1], 0x8
s_mov_b32 s10, -1
s_mov_b32 s11, 0x7fefffff
v_mov_b32_e32 v0, 0
s_mov_b32 s3, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
s_mov_b32 s2, s3
s_waitcnt lgkmcnt(0)
v_mul_lo_u32 v2, v1, s9
s_cmp_gt_i32 s9, 0
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[4:5], 3, v[2:3]
v_dual_mov_b32 v2, s10 :: v_dual_mov_b32 v3, s11
s_cselect_b32 s10, -1, 0
s_mov_b32 s11, s3
v_add_co_u32 v4, vcc_lo, s4, v4
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
.LBB0_3:
s_and_not1_b32 vcc_lo, exec_lo, s10
s_cbranch_vccnz .LBB0_6
s_delay_alu instid0(VALU_DEP_1)
v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v9, v5
s_lshl_b64 s[4:5], s[2:3], 3
v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v8, v4
s_add_u32 s4, s6, s4
s_addc_u32 s5, s7, s5
s_mov_b32 s12, s9
.LBB0_5:
global_load_b64 v[10:11], v[8:9], off
s_load_b64 s[14:15], s[4:5], 0x0
v_add_co_u32 v8, vcc_lo, v8, 8
s_add_i32 s12, s12, -1
v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
s_add_u32 s4, s4, 8
s_addc_u32 s5, s5, 0
s_cmp_eq_u32 s12, 0
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_f64 v[10:11], v[10:11], -s[14:15]
s_delay_alu instid0(VALU_DEP_1)
v_fma_f64 v[6:7], v[10:11], v[10:11], v[6:7]
s_cbranch_scc0 .LBB0_5
s_branch .LBB0_7
.LBB0_6:
v_mov_b32_e32 v6, 0
v_mov_b32_e32 v7, 0
.LBB0_7:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
v_cmp_lt_f64_e32 vcc_lo, v[6:7], v[2:3]
s_add_i32 s2, s2, s9
v_dual_cndmask_b32 v3, v3, v7 :: v_dual_cndmask_b32 v2, v2, v6
v_cndmask_b32_e64 v0, v0, s11, vcc_lo
s_add_i32 s11, s11, 1
s_cmp_eq_u32 s11, s8
s_cbranch_scc0 .LBB0_3
s_branch .LBB0_9
.LBB0_8:
v_mov_b32_e32 v0, 0
.LBB0_9:
s_load_b64 s[0:1], s[0:1], 0x28
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v1, vcc_lo, s0, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
global_store_b32 v[1:2], v0, off
.LBB0_10:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| getClusterCentroids | 7,239 | 1,534 | stackv2-00000-of-00015 |
// Demangled: sum_kernel(int, float const*, float*)
Function : _Z10sum_kerneliPKfPf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R6, SR_TID.X &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x388] &wr=0x2 ?trans1;
HFMA2 R0, -RZ, RZ, 0, 0 ?trans1;
MOV R7, RZ ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans1;
LDCU UR8, c[0x0][0x380] &wr=0x4 ?trans5;
LEA R23, R6, R7, 0x8 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P2, PT, R23.reuse, UR8, PT &req={4} ?trans1;
IADD3 R4, PT, PT, R23, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P3, PT, R4, UR8, PT ?trans1;
IMAD.WIDE.U32 R4, R23, 0x4, R2 &req={2} ?WAIT6_END_GROUP;
@!P2 LDG.E R9, desc[UR6][R4.64] &req={3} &wr=0x2 ?trans6;
@!P3 LDG.E R11, desc[UR6][R4.64+0x4] &wr=0x3 ?trans1;
IADD3 R8, PT, PT, R23.reuse, 0x2, RZ ?trans2;
IADD3 R10, PT, PT, R23, 0x3, RZ ?WAIT3_END_GROUP;
ISETP.GE.AND P4, PT, R8, UR8, PT ?trans1;
IADD3 R8, PT, PT, R23.reuse, 0x4, RZ ?trans1;
ISETP.GE.AND P5, PT, R10, UR8, PT ?trans1;
IADD3 R10, PT, PT, R23, 0x5, RZ ?WAIT3_END_GROUP;
ISETP.GE.AND P6, PT, R8, UR8, PT ?trans1;
IADD3 R8, PT, PT, R23, 0x6, RZ ?trans1;
ISETP.GE.AND P0, PT, R10, UR8, PT ?WAIT5_END_GROUP;
@!P4 LDG.E R13, desc[UR6][R4.64+0x8] &wr=0x4 ?trans1;
IADD3 R10, PT, PT, R23.reuse, 0x7, RZ ?trans1;
ISETP.GE.AND P1, PT, R8, UR8, PT ?trans2;
@!P5 LDG.E R15, desc[UR6][R4.64+0xc] &wr=0x5 ?trans1;
IADD3 R8, PT, PT, R23, 0x8, RZ ?WAIT10_END_GROUP;
@!P1 LDG.E R17, desc[UR6][R4.64+0x18] &wr=0x5 ?trans1;
@!P2 FADD R0, R0, R9 &req={2} ?trans1;
ISETP.GE.AND P2, PT, R10, UR8, PT ?trans2;
@!P6 LDG.E R9, desc[UR6][R4.64+0x10] &wr=0x2 ?trans1;
@!P3 FADD R0, R0, R11 &req={3} ?trans1;
ISETP.GE.AND P3, PT, R8, UR8, PT ?trans2;
@!P0 LDG.E R11, desc[UR6][R4.64+0x14] &wr=0x3 ?trans7;
@!P2 LDG.E R19, desc[UR6][R4.64+0x1c] &wr=0x3 ?trans4;
@!P3 LDG.E R21, desc[UR6][R4.64+0x20] &wr=0x3 ?trans1;
IADD3 R8, PT, PT, R23, 0x9, RZ ?WAIT2_END_GROUP;
IADD3 R10, PT, PT, R23.reuse, 0xa, RZ ?trans1;
@!P4 FADD R0, R0, R13 &req={4} ?trans2;
ISETP.GE.AND P4, PT, R8, UR8, PT ?trans1;
IADD3 R8, PT, PT, R23.reuse, 0xb, RZ ?trans1;
@!P5 FADD R0, R0, R15 &req={5} ?trans1;
ISETP.GE.AND P5, PT, R10, UR8, PT ?trans1;
IADD3 R10, PT, PT, R23.reuse, 0xd, RZ ?trans2;
@!P6 FADD R0, R0, R9 &req={2} ?trans1;
IADD3 R9, PT, PT, R23, 0xc, RZ ?trans1;
ISETP.GE.AND P6, PT, R8, UR8, PT ?WAIT2_END_GROUP;
@!P0 FADD R0, R0, R11 &req={3} ?trans2;
ISETP.GE.AND P0, PT, R9, UR8, PT ?WAIT4_END_GROUP;
@!P5 LDG.E R11, desc[UR6][R4.64+0x28] &wr=0x2 ?trans4;
@!P4 LDG.E R9, desc[UR6][R4.64+0x24] &wr=0x3 ?trans1;
@!P1 FADD R0, R0, R17 ?trans1;
IADD3 R8, PT, PT, R23.reuse, 0xe, RZ ?trans1;
ISETP.GE.AND P1, PT, R10, UR8, PT ?trans1;
@!P6 LDG.E R13, desc[UR6][R4.64+0x2c] &wr=0x4 ?trans1;
@!P2 FADD R0, R0, R19 ?trans1;
IADD3 R10, PT, PT, R23, 0xf, RZ ?trans1;
ISETP.GE.AND P2, PT, R8, UR8, PT ?trans1;
@!P0 LDG.E R15, desc[UR6][R4.64+0x30] &wr=0x5 ?trans1;
@!P3 FADD R0, R0, R21 ?WAIT2_END_GROUP;
ISETP.GE.AND P3, PT, R10, UR8, PT ?WAIT5_END_GROUP;
@!P1 LDG.E R17, desc[UR6][R4.64+0x34] &wr=0x5 ?trans4;
@!P2 LDG.E R19, desc[UR6][R4.64+0x38] &wr=0x5 ?trans4;
@!P3 LDG.E R21, desc[UR6][R4.64+0x3c] &wr=0x5 ?trans1;
IADD3 R7, PT, PT, R7, 0x10, RZ ?trans1;
@!P4 FADD R0, R0, R9 &req={3} ?WAIT4_END_GROUP;
@!P5 FADD R0, R0, R11 &req={2} ?WAIT4_END_GROUP;
@!P6 FADD R0, R0, R13 &req={4} ?WAIT4_END_GROUP;
@!P0 FADD R0, R0, R15 &req={5} ?trans1;
ISETP.NE.AND P0, PT, R7, 0x100, PT ?WAIT3_END_GROUP;
@!P1 FADD R0, R0, R17 ?WAIT4_END_GROUP;
@!P2 FADD R0, R0, R19 ?WAIT4_END_GROUP;
@!P3 FADD R0, R0, R21 ?trans2;
@P0 BRA 0x70 ?trans5;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
ISETP.NE.AND P0, PT, R6, RZ, PT ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?WAIT6_END_GROUP;
LEA R3, R6, UR4, 0x2 ?WAIT5_END_GROUP;
STS [R3], R0 &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 EXIT ?trans5;
LDS.128 R16, [UR4] &wr=0x2 ?trans1;
LDC.64 R2, c[0x0][0x390] &req={1} &wr=0x1 ?trans3;
LDS.128 R12, [UR4+0x10] &wr=0x3 ?trans4;
LDS.128 R4, [UR4+0x20] &wr=0x4 ?trans4;
LDS.128 R8, [UR4+0x30] &wr=0x5 ?trans4;
LDS.128 R20, [UR4+0x350] ?trans4;
LDS.128 R24, [UR4+0x360] ?trans4;
LDS.128 R28, [UR4+0x370] ?trans1;
FADD R16, RZ, R16 &req={2} ?WAIT4_END_GROUP;
FADD R17, R17, R16 ?WAIT4_END_GROUP;
FADD R18, R18, R17 ?WAIT4_END_GROUP;
FADD R19, R19, R18 ?WAIT4_END_GROUP;
FADD R12, R19, R12 &req={3} ?trans2;
LDS.128 R16, [UR4+0x40] &wr=0x2 ?trans2;
FADD R13, R13, R12 ?WAIT4_END_GROUP;
FADD R14, R14, R13 ?WAIT4_END_GROUP;
FADD R15, R15, R14 ?WAIT4_END_GROUP;
FADD R4, R15, R4 &req={4} ?trans2;
LDS.128 R12, [UR4+0x50] &wr=0x3 ?trans2;
FADD R5, R5, R4 ?WAIT4_END_GROUP;
FADD R6, R6, R5 ?WAIT4_END_GROUP;
FADD R7, R7, R6 ?WAIT4_END_GROUP;
FADD R8, R7, R8 &req={5} ?trans2;
LDS.128 R4, [UR4+0x60] &wr=0x4 ?trans2;
FADD R9, R9, R8 ?WAIT4_END_GROUP;
FADD R10, R10, R9 ?WAIT4_END_GROUP;
FADD R11, R11, R10 ?WAIT4_END_GROUP;
FADD R16, R11, R16 &req={2} ?trans2;
LDS.128 R8, [UR4+0x70] &wr=0x2 ?trans2;
FADD R17, R17, R16 ?WAIT4_END_GROUP;
FADD R18, R18, R17 ?WAIT4_END_GROUP;
FADD R19, R19, R18 ?WAIT4_END_GROUP;
FADD R12, R19, R12 &req={3} ?trans2;
LDS.128 R16, [UR4+0x80] &wr=0x3 ?trans2;
FADD R13, R13, R12 ?WAIT4_END_GROUP;
FADD R14, R14, R13 ?WAIT4_END_GROUP;
FADD R15, R15, R14 ?WAIT4_END_GROUP;
FADD R4, R15, R4 &req={4} ?trans2;
LDS.128 R12, [UR4+0x90] &wr=0x4 ?trans2;
FADD R5, R5, R4 ?WAIT4_END_GROUP;
FADD R6, R6, R5 ?WAIT4_END_GROUP;
FADD R7, R7, R6 ?WAIT4_END_GROUP;
FADD R8, R7, R8 &req={2} ?trans2;
LDS.128 R4, [UR4+0xa0] &wr=0x2 ?trans2;
FADD R9, R9, R8 ?WAIT4_END_GROUP;
FADD R10, R10, R9 ?WAIT4_END_GROUP;
FADD R11, R11, R10 ?WAIT4_END_GROUP;
FADD R16, R11, R16 &req={3} ?trans2;
LDS.128 R8, [UR4+0xb0] &wr=0x3 ?trans2;
FADD R17, R17, R16 ?WAIT4_END_GROUP;
FADD R18, R18, R17 ?WAIT4_END_GROUP;
FADD R19, R19, R18 ?WAIT4_END_GROUP;
FADD R12, R19, R12 &req={4} ?trans2;
LDS.128 R16, [UR4+0xc0] &wr=0x4 ?trans2;
FADD R13, R13, R12 ?WAIT4_END_GROUP;
FADD R14, R14, R13 ?WAIT4_END_GROUP;
FADD R15, R15, R14 ?WAIT4_END_GROUP;
FADD R4, R15, R4 &req={2} ?trans2;
LDS.128 R12, [UR4+0xd0] &wr=0x2 ?trans2;
FADD R5, R5, R4 ?WAIT4_END_GROUP;
FADD R6, R6, R5 ?WAIT4_END_GROUP;
FADD R7, R7, R6 ?WAIT4_END_GROUP;
FADD R8, R7, R8 &req={3} ?trans2;
LDS.128 R4, [UR4+0xe0] &wr=0x3 ?trans2;
FADD R9, R9, R8 ?WAIT4_END_GROUP;
FADD R10, R10, R9 ?WAIT4_END_GROUP;
FADD R11, R11, R10 ?WAIT4_END_GROUP;
FADD R16, R11, R16 &req={4} ?trans2;
LDS.128 R8, [UR4+0xf0] &wr=0x4 ?trans2;
FADD R17, R17, R16 ?WAIT4_END_GROUP;
FADD R18, R18, R17 ?WAIT4_END_GROUP;
FADD R19, R19, R18 ?WAIT4_END_GROUP;
FADD R12, R19, R12 &req={2} ?trans2;
LDS.128 R16, [UR4+0x100] &wr=0x2 ?trans2;
FADD R13, R13, R12 ?WAIT4_END_GROUP;
FADD R14, R14, R13 ?WAIT4_END_GROUP;
FADD R15, R15, R14 ?WAIT4_END_GROUP;
FADD R4, R15, R4 &req={3} ?trans2;
LDS.128 R12, [UR4+0x110] &wr=0x3 ?trans2;
FADD R5, R5, R4 ?WAIT4_END_GROUP;
FADD R6, R6, R5 ?WAIT4_END_GROUP;
FADD R7, R7, R6 ?WAIT4_END_GROUP;
FADD R8, R7, R8 &req={4} ?trans2;
LDS.128 R4, [UR4+0x120] &wr=0x4 ?trans2;
FADD R9, R9, R8 ?WAIT4_END_GROUP;
FADD R10, R10, R9 ?WAIT4_END_GROUP;
FADD R11, R11, R10 ?WAIT4_END_GROUP;
FADD R16, R11, R16 &req={2} ?trans2;
LDS.128 R8, [UR4+0x130] &wr=0x2 ?trans2;
FADD R17, R17, R16 ?WAIT4_END_GROUP;
FADD R18, R18, R17 ?WAIT4_END_GROUP;
FADD R19, R19, R18 ?WAIT4_END_GROUP;
FADD R12, R19, R12 &req={3} ?trans2;
LDS.128 R16, [UR4+0x140] &wr=0x3 ?trans2;
FADD R13, R13, R12 ?WAIT4_END_GROUP;
FADD R14, R14, R13 ?WAIT4_END_GROUP;
FADD R15, R15, R14 ?WAIT4_END_GROUP;
FADD R4, R15, R4 &req={4} ?trans2;
LDS.128 R12, [UR4+0x150] &wr=0x4 ?trans2;
FADD R5, R5, R4 ?WAIT4_END_GROUP;
FADD R6, R6, R5 ?WAIT4_END_GROUP;
FADD R7, R7, R6 ?WAIT4_END_GROUP;
FADD R8, R7, R8 &req={2} ?trans2;
LDS.128 R4, [UR4+0x160] &wr=0x2 ?trans2;
FADD R9, R9, R8 ?WAIT4_END_GROUP;
FADD R10, R10, R9 ?WAIT4_END_GROUP;
FADD R11, R11, R10 ?WAIT4_END_GROUP;
FADD R16, R11, R16 &req={3} ?trans2;
LDS.128 R8, [UR4+0x170] &wr=0x3 ?trans2;
FADD R17, R17, R16 ?WAIT4_END_GROUP;
FADD R18, R18, R17 ?WAIT4_END_GROUP;
FADD R19, R19, R18 ?WAIT4_END_GROUP;
FADD R12, R19, R12 &req={4} ?trans2;
LDS.128 R16, [UR4+0x180] &wr=0x4 ?trans2;
FADD R13, R13, R12 ?WAIT4_END_GROUP;
FADD R14, R14, R13 ?WAIT4_END_GROUP;
FADD R15, R15, R14 ?WAIT4_END_GROUP;
FADD R4, R15, R4 &req={2} ?trans2;
LDS.128 R12, [UR4+0x190] &wr=0x2 ?trans2;
FADD R5, R5, R4 ?WAIT4_END_GROUP;
FADD R6, R6, R5 ?WAIT4_END_GROUP;
FADD R7, R7, R6 ?WAIT4_END_GROUP;
FADD R8, R7, R8 &req={3} ?trans2;
LDS.128 R4, [UR4+0x1a0] &wr=0x3 ?trans2;
FADD R9, R9, R8 ?WAIT4_END_GROUP;
FADD R10, R10, R9 ?WAIT4_END_GROUP;
FADD R11, R11, R10 ?WAIT4_END_GROUP;
FADD R16, R11, R16 &req={4} ?trans2;
LDS.128 R8, [UR4+0x1b0] &wr=0x4 ?trans2;
FADD R17, R17, R16 ?WAIT4_END_GROUP;
FADD R18, R18, R17 ?WAIT4_END_GROUP;
FADD R19, R19, R18 ?WAIT4_END_GROUP;
FADD R12, R19, R12 &req={2} ?trans2;
LDS.128 R16, [UR4+0x1c0] &wr=0x2 ?trans2;
FADD R13, R13, R12 ?WAIT4_END_GROUP;
FADD R14, R14, R13 ?WAIT4_END_GROUP;
FADD R15, R15, R14 ?WAIT4_END_GROUP;
FADD R4, R15, R4 &req={3} ?trans2;
LDS.128 R12, [UR4+0x1d0] &wr=0x3 ?trans2;
FADD R5, R5, R4 ?WAIT4_END_GROUP;
FADD R6, R6, R5 ?WAIT4_END_GROUP;
FADD R7, R7, R6 ?WAIT4_END_GROUP;
FADD R8, R7, R8 &req={4} ?trans2;
LDS.128 R4, [UR4+0x1e0] &wr=0x4 ?trans2;
FADD R9, R9, R8 ?WAIT4_END_GROUP;
FADD R10, R10, R9 ?WAIT4_END_GROUP;
FADD R11, R11, R10 ?WAIT4_END_GROUP;
FADD R16, R11, R16 &req={2} ?trans2;
LDS.128 R8, [UR4+0x1f0] &wr=0x2 ?trans2;
FADD R17, R17, R16 ?WAIT4_END_GROUP;
FADD R18, R18, R17 ?WAIT4_END_GROUP;
FADD R19, R19, R18 ?WAIT4_END_GROUP;
FADD R12, R19, R12 &req={3} ?trans2;
LDS.128 R16, [UR4+0x200] &wr=0x3 ?trans2;
FADD R13, R13, R12 ?WAIT4_END_GROUP;
FADD R14, R14, R13 ?WAIT4_END_GROUP;
FADD R15, R15, R14 ?WAIT4_END_GROUP;
FADD R4, R15, R4 &req={4} ?trans2;
LDS.128 R12, [UR4+0x210] &wr=0x4 ?trans2;
FADD R5, R5, R4 ?WAIT4_END_GROUP;
FADD R6, R6, R5 ?WAIT4_END_GROUP;
FADD R7, R7, R6 ?WAIT4_END_GROUP;
FADD R8, R7, R8 &req={2} ?trans2;
LDS.128 R4, [UR4+0x220] &wr=0x2 ?trans2;
FADD R9, R9, R8 ?WAIT4_END_GROUP;
FADD R10, R10, R9 ?WAIT4_END_GROUP;
FADD R11, R11, R10 ?WAIT4_END_GROUP;
FADD R16, R11, R16 &req={3} ?trans2;
LDS.128 R8, [UR4+0x230] &wr=0x3 ?trans2;
FADD R17, R17, R16 ?WAIT4_END_GROUP;
FADD R18, R18, R17 ?WAIT4_END_GROUP;
FADD R19, R19, R18 ?WAIT4_END_GROUP;
FADD R12, R19, R12 &req={4} ?trans2;
LDS.128 R16, [UR4+0x240] &wr=0x4 ?trans2;
FADD R13, R13, R12 ?WAIT4_END_GROUP;
FADD R14, R14, R13 ?WAIT4_END_GROUP;
FADD R15, R15, R14 ?WAIT4_END_GROUP;
FADD R4, R15, R4 &req={2} ?trans2;
LDS.128 R12, [UR4+0x250] &wr=0x2 ?trans2;
FADD R5, R5, R4 ?WAIT4_END_GROUP;
FADD R6, R6, R5 ?WAIT4_END_GROUP;
FADD R7, R7, R6 ?WAIT4_END_GROUP;
FADD R8, R7, R8 &req={3} ?trans2;
LDS.128 R4, [UR4+0x260] &wr=0x3 ?trans2;
FADD R9, R9, R8 ?WAIT4_END_GROUP;
FADD R10, R10, R9 ?WAIT4_END_GROUP;
FADD R11, R11, R10 ?WAIT4_END_GROUP;
FADD R16, R11, R16 &req={4} ?trans2;
LDS.128 R8, [UR4+0x270] &wr=0x4 ?trans2;
FADD R17, R17, R16 ?WAIT4_END_GROUP;
FADD R18, R18, R17 ?WAIT4_END_GROUP;
FADD R19, R19, R18 ?WAIT4_END_GROUP;
FADD R12, R19, R12 &req={2} ?trans2;
LDS.128 R16, [UR4+0x280] &wr=0x2 ?trans2;
FADD R13, R13, R12 ?WAIT4_END_GROUP;
FADD R14, R14, R13 ?WAIT4_END_GROUP;
FADD R15, R15, R14 ?WAIT4_END_GROUP;
FADD R4, R15, R4 &req={3} ?trans2;
LDS.128 R12, [UR4+0x290] &wr=0x3 ?trans2;
FADD R5, R5, R4 ?WAIT4_END_GROUP;
FADD R6, R6, R5 ?WAIT4_END_GROUP;
FADD R7, R7, R6 ?WAIT4_END_GROUP;
FADD R8, R7, R8 &req={4} ?trans2;
LDS.128 R4, [UR4+0x2a0] &wr=0x4 ?trans2;
FADD R9, R9, R8 ?WAIT4_END_GROUP;
FADD R10, R10, R9 ?WAIT4_END_GROUP;
FADD R11, R11, R10 ?WAIT4_END_GROUP;
FADD R16, R11, R16 &req={2} ?trans2;
LDS.128 R8, [UR4+0x2b0] &wr=0x2 ?trans2;
FADD R17, R17, R16 ?WAIT4_END_GROUP;
FADD R18, R18, R17 ?WAIT4_END_GROUP;
FADD R19, R19, R18 ?WAIT4_END_GROUP;
FADD R12, R19, R12 &req={3} ?trans2;
LDS.128 R16, [UR4+0x2c0] &wr=0x3 ?trans2;
FADD R13, R13, R12 ?WAIT4_END_GROUP;
FADD R14, R14, R13 ?WAIT4_END_GROUP;
FADD R15, R15, R14 ?WAIT4_END_GROUP;
FADD R4, R15, R4 &req={4} ?trans2;
LDS.128 R12, [UR4+0x2d0] &wr=0x4 ?trans2;
FADD R5, R5, R4 ?WAIT4_END_GROUP;
FADD R6, R6, R5 ?WAIT4_END_GROUP;
FADD R7, R7, R6 ?WAIT4_END_GROUP;
FADD R8, R7, R8 &req={2} ?trans2;
LDS.128 R4, [UR4+0x2e0] &wr=0x2 ?trans2;
FADD R9, R9, R8 ?WAIT4_END_GROUP;
FADD R10, R10, R9 ?WAIT4_END_GROUP;
FADD R11, R11, R10 ?WAIT4_END_GROUP;
FADD R16, R11, R16 &req={3} ?trans2;
LDS.128 R8, [UR4+0x2f0] &wr=0x3 ?trans2;
FADD R17, R17, R16 ?WAIT4_END_GROUP;
FADD R18, R18, R17 ?WAIT4_END_GROUP;
FADD R19, R19, R18 ?WAIT4_END_GROUP;
FADD R12, R19, R12 &req={4} ?trans2;
LDS.128 R16, [UR4+0x300] &wr=0x4 ?trans2;
FADD R13, R13, R12 ?WAIT4_END_GROUP;
FADD R14, R14, R13 ?WAIT4_END_GROUP;
FADD R15, R15, R14 ?WAIT4_END_GROUP;
FADD R4, R15, R4 &req={2} ?trans2;
LDS.128 R12, [UR4+0x310] &wr=0x2 ?trans2;
FADD R5, R5, R4 ?WAIT4_END_GROUP;
FADD R6, R6, R5 ?WAIT4_END_GROUP;
FADD R7, R7, R6 ?WAIT4_END_GROUP;
FADD R8, R7, R8 &req={3} ?trans2;
LDS.128 R4, [UR4+0x320] &wr=0x3 ?trans2;
FADD R9, R9, R8 ?WAIT4_END_GROUP;
FADD R10, R10, R9 ?WAIT4_END_GROUP;
FADD R11, R11, R10 ?WAIT4_END_GROUP;
FADD R16, R11, R16 &req={4} ?trans2;
LDS.128 R8, [UR4+0x330] &wr=0x4 ?trans2;
FADD R17, R17, R16 ?WAIT4_END_GROUP;
FADD R18, R18, R17 ?WAIT4_END_GROUP;
FADD R19, R19, R18 ?WAIT4_END_GROUP;
FADD R12, R19, R12 &req={2} ?trans2;
LDS.128 R16, [UR4+0x340] &wr=0x2 ?trans2;
FADD R13, R13, R12 ?WAIT4_END_GROUP;
FADD R14, R14, R13 ?WAIT4_END_GROUP;
FADD R15, R15, R14 ?WAIT4_END_GROUP;
FADD R4, R15, R4 &req={3} ?trans2;
LDS.128 R12, [UR4+0x380] &wr=0x3 ?trans2;
FADD R5, R5, R4 ?WAIT4_END_GROUP;
FADD R6, R6, R5 ?WAIT4_END_GROUP;
FADD R7, R7, R6 ?WAIT4_END_GROUP;
FADD R8, R7, R8 &req={4} ?trans2;
LDS.128 R4, [UR4+0x390] &wr=0x4 ?trans2;
FADD R9, R9, R8 ?WAIT4_END_GROUP;
FADD R10, R10, R9 ?WAIT4_END_GROUP;
FADD R11, R11, R10 ?WAIT4_END_GROUP;
FADD R16, R11, R16 &req={2} ?trans2;
LDS.128 R8, [UR4+0x3a0] &wr=0x2 ?trans2;
FADD R17, R17, R16 ?WAIT4_END_GROUP;
FADD R18, R18, R17 ?WAIT4_END_GROUP;
FADD R19, R19, R18 ?WAIT4_END_GROUP;
FADD R20, R19, R20 ?trans2;
LDS.128 R16, [UR4+0x3b0] &wr=0x5 ?trans2;
FADD R21, R21, R20 ?WAIT4_END_GROUP;
FADD R22, R22, R21 ?WAIT4_END_GROUP;
FADD R23, R23, R22 ?WAIT4_END_GROUP;
FADD R24, R23, R24 ?WAIT4_END_GROUP;
FADD R25, R25, R24 ?WAIT4_END_GROUP;
FADD R26, R26, R25 ?WAIT4_END_GROUP;
FADD R27, R27, R26 ?WAIT4_END_GROUP;
FADD R28, R27, R28 ?WAIT4_END_GROUP;
FADD R29, R29, R28 ?WAIT4_END_GROUP;
FADD R30, R30, R29 ?WAIT4_END_GROUP;
FADD R31, R31, R30 ?WAIT4_END_GROUP;
FADD R12, R12, R31 &req={3} ?WAIT4_END_GROUP;
FADD R13, R13, R12 ?WAIT4_END_GROUP;
FADD R14, R14, R13 ?WAIT4_END_GROUP;
FADD R15, R15, R14 ?WAIT4_END_GROUP;
FADD R4, R15, R4 &req={4} ?trans2;
LDS.128 R12, [UR4+0x3c0] &wr=0x3 ?trans2;
FADD R5, R5, R4 ?WAIT4_END_GROUP;
FADD R6, R6, R5 ?WAIT4_END_GROUP;
FADD R7, R7, R6 ?WAIT4_END_GROUP;
FADD R8, R7, R8 &req={2} ?trans2;
LDS.128 R4, [UR4+0x3d0] &wr=0x2 ?trans2;
FADD R9, R9, R8 ?WAIT4_END_GROUP;
FADD R10, R10, R9 ?WAIT4_END_GROUP;
FADD R11, R11, R10 ?WAIT4_END_GROUP;
FADD R16, R11, R16 &req={5} ?trans2;
LDS.128 R8, [UR4+0x3e0] &wr=0x4 ?trans2;
FADD R17, R17, R16 ?WAIT4_END_GROUP;
FADD R18, R18, R17 ?WAIT4_END_GROUP;
FADD R19, R19, R18 ?WAIT4_END_GROUP;
FADD R12, R19, R12 &req={3} ?trans2;
LDS.128 R16, [UR4+0x3f0] &wr=0x3 ?trans2;
FADD R13, R13, R12 ?WAIT4_END_GROUP;
FADD R14, R14, R13 ?WAIT4_END_GROUP;
FADD R15, R15, R14 ?WAIT4_END_GROUP;
FADD R4, R15, R4 &req={2} ?WAIT4_END_GROUP;
FADD R5, R5, R4 ?WAIT4_END_GROUP;
FADD R6, R6, R5 ?WAIT4_END_GROUP;
FADD R7, R7, R6 ?WAIT4_END_GROUP;
FADD R8, R7, R8 &req={4} ?WAIT4_END_GROUP;
FADD R9, R9, R8 ?WAIT4_END_GROUP;
FADD R10, R10, R9 ?WAIT4_END_GROUP;
FADD R11, R11, R10 ?WAIT4_END_GROUP;
FADD R16, R11, R16 &req={3} ?WAIT4_END_GROUP;
FADD R17, R17, R16 ?WAIT4_END_GROUP;
FADD R18, R18, R17 ?WAIT4_END_GROUP;
FADD R19, R19, R18 ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R19 &req={1} ?trans1;
EXIT ?trans5;
BRA 0x1960;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: sum_kernel(int, float const*, float*)
_Z10sum_kerneliPKfPf:
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x8
s_load_b32 s0, s[0:1], 0x0
v_lshlrev_b32_e32 v1, 10, v0
v_dual_mov_b32 v3, 0 :: v_dual_lshlrev_b32 v4, 8, v0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v1, s1, s4, v1
v_add_co_ci_u32_e64 v2, null, s5, 0, s1
s_mov_b32 s1, 0
.LBB0_1:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v5, s1, v4
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s0, v5
s_cbranch_execz .LBB0_3
global_load_b32 v5, v[1:2], off
s_waitcnt vmcnt(0)
v_add_f32_e32 v3, v3, v5
.LBB0_3:
s_or_b32 exec_lo, exec_lo, s2
v_add_co_u32 v1, vcc_lo, v1, 4
v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
s_add_i32 s1, s1, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmpk_eq_i32 s1, 0x100
s_cbranch_scc0 .LBB0_1
v_lshl_add_u32 v1, v0, 2, 0
s_mov_b32 s0, 0
s_mov_b32 s1, exec_lo
ds_store_b32 v1, v3
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB0_8
v_mov_b32_e32 v0, 0
.LBB0_6:
s_add_i32 s1, s0, 0
s_add_i32 s0, s0, 4
v_mov_b32_e32 v1, s1
s_cmpk_eq_i32 s0, 0x400
ds_load_b32 v1, v1
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v0, v0, v1
s_cbranch_scc0 .LBB0_6
v_mov_b32_e32 v1, 0
global_store_b32 v1, v0, s[6:7]
.LBB0_8:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| sum_kernel | 8,922 | 762 | stackv2-00000-of-00015 |
// Demangled: allocmem()
Function : _Z8allocmemv
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R16, SR_TID.X &wr=0x1 ?trans1;
LDCU.64 UR36, c[0x0][0x358] &wr=0x2 ?trans1;
ISETP.NE.AND P0, PT, R16, RZ, PT &req={1} ?WAIT13_END_GROUP;
@P0 BRA 0x100 &req={2} ?trans5;
MOV R2, 0x20 ?trans1;
HFMA2 R4, -RZ, RZ, 0, 2.384185791015625e-07 ?trans2;
HFMA2 R5, -RZ, RZ, 0, 0 ?WAIT3_END_GROUP;
LDC.64 R2, c[0x4][R2] &wr=0x1 ?trans4;
LEPC R20, 0xb0 ?WAIT7_END_GROUP;
CALL.ABS.NOINC R2 &req={1,0} ?trans5;
LDC.64 R2, c[0x4][0x10] &wr=0x0 ?trans2;
LDG.E.64 R2, desc[UR36][R2.64] &req={0} &wr=0x2 ?trans1;
S2R R7, SR_CTAID.X &wr=0x2 ?trans2;
IMAD.WIDE.U32 R6, R7, 0x8, R2 &req={2} ?WAIT5_END_GROUP;
ST.E.64 desc[UR36][R6.64], R4 &rd=0x1 ?trans2;
WARPSYNC.ALL ?trans5;
NOP ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans8;
LDC.64 R4, c[0x4][0x10] &req={1} &wr=0x1 ?trans2;
LDG.E.64 R2, desc[UR36][R4.64] &req={1} &wr=0x2 ?trans1;
S2R R7, SR_CTAID.X &wr=0x2 ?trans2;
IMAD.WIDE.U32 R2, R7, 0x8, R2 &req={2} ?WAIT6_END_GROUP;
LD.E.64 R2, desc[UR36][R2.64] &wr=0x2 ?trans2;
ISETP.NE.S64.AND P0, PT, R2, RZ, PT &req={2} ?WAIT14_END_GROUP;
@!P0 EXIT ?trans5;
IMAD.WIDE.U32 R2, R16, 0x4, R2 ?WAIT5_END_GROUP;
ST.E desc[UR36][R2.64], RZ ?trans1;
EXIT ?trans5;
BRA 0x1d0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: allocmem()
_Z8allocmemv:
v_mov_b32_e32 v41, v0
s_mov_b32 s46, s15
s_mov_b32 s47, 0
s_mov_b32 s32, 0
s_mov_b32 s2, exec_lo
v_cmpx_ne_u32_e32 0, v41
s_xor_b32 s2, exec_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_or_saveexec_b32 s33, s2
v_dual_mov_b32 v2, s46 :: v_dual_mov_b32 v3, s47
s_xor_b32 exec_lo, exec_lo, s33
s_cbranch_execnz .LBB2_4
.LBB2_1:
s_or_b32 exec_lo, exec_lo, s33
v_mov_b32_e32 v4, 0
s_getpc_b64 s[0:1]
s_add_u32 s0, s0, dataptr@rel32@lo+4
s_addc_u32 s1, s1, dataptr@rel32@hi+12
s_waitcnt lgkmcnt(0)
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
global_load_b64 v[0:1], v4, s[0:1]
v_lshlrev_b64 v[2:3], 3, v[2:3]
s_mov_b32 s0, exec_lo
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, v0, v2
v_add_co_ci_u32_e32 v1, vcc_lo, v1, v3, vcc_lo
flat_load_b64 v[0:1], v[0:1]
s_waitcnt vmcnt(0) lgkmcnt(0)
v_cmpx_ne_u64_e32 0, v[0:1]
s_cbranch_execz .LBB2_3
v_lshlrev_b32_e32 v2, 2, v41
s_delay_alu instid0(VALU_DEP_1)
v_add_co_u32 v0, vcc_lo, v0, v2
v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
flat_store_b32 v[0:1], v4
.LBB2_3:
s_endpgm
| allocmem | 751 | 619 | stackv2-00000-of-00015 |
// Demangled: dynamic_allocmem()
Function : _Z16dynamic_allocmemv
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans2;
LOP3.LUT P0, RZ, R0, UR4, RZ, 0xfc, !PT &req={1} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
MOV R2, 0x20 ?trans1;
HFMA2 R4, -RZ, RZ, 0, 9.5367431640625e-06 ?trans1;
LDCU.64 UR36, c[0x0][0x358] &wr=0x1 ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?WAIT3_END_GROUP;
LDC.64 R2, c[0x4][R2] &wr=0x2 ?trans4;
LEPC R20, 0xc0 ?WAIT7_END_GROUP;
CALL.ABS.NOINC R2 &req={2,1,0} ?trans5;
LDC.64 R2, c[0x4][0x10] &wr=0x0 ?trans2;
STG.E.64 desc[UR36][R2.64], R4 &req={0} ?trans1;
EXIT ?trans5;
BRA 0xf0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: dynamic_allocmem()
_Z16dynamic_allocmemv:
v_or_b32_e32 v0, s15, v0
s_mov_b32 s32, 0
s_mov_b32 s2, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execnz .LBB1_2
s_endpgm
.LBB1_2:
v_dual_mov_b32 v41, 0 :: v_dual_mov_b32 v0, 0xa0
v_mov_b32_e32 v1, 0
s_mov_b64 s[8:9], s[0:1]
s_getpc_b64 s[2:3]
s_add_u32 s2, s2, __ockl_dm_alloc@rel32@lo+4
s_addc_u32 s3, s3, __ockl_dm_alloc@rel32@hi+12
s_delay_alu instid0(SALU_CYCLE_1)
s_swappc_b64 s[30:31], s[2:3]
s_getpc_b64 s[0:1]
s_add_u32 s0, s0, dataptr@rel32@lo+4
s_addc_u32 s1, s1, dataptr@rel32@hi+12
global_store_b64 v41, v[0:1], s[0:1]
s_endpgm
| dynamic_allocmem | 406 | 345 | stackv2-00000-of-00015 |
// Demangled: usemem()
Function : _Z6usememv
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R2, c[0x4][0x10] &wr=0x1 ?trans2;
LDG.E.64 R2, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
S2R R5, SR_CTAID.X &wr=0x2 ?trans2;
IMAD.WIDE.U32 R4, R5, 0x8, R2 &req={2} ?WAIT6_END_GROUP;
LDG.E.64 R4, desc[UR4][R4.64] &wr=0x2 ?trans2;
ISETP.NE.S64.AND P0, PT, R4, RZ, PT &req={2} ?WAIT14_END_GROUP;
@!P0 EXIT &req={0} ?trans5;
S2R R3, SR_TID.X &wr=0x0 ?trans2;
IMAD.WIDE.U32 R4, R3, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R4.64] &wr=0x2 ?trans2;
IADD3 R3, PT, PT, R0, R3, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R3 ?trans1;
EXIT ?trans5;
BRA 0xf0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: usemem()
_Z6usememv:
s_getpc_b64 s[2:3]
s_add_u32 s2, s2, dataptr@rel32@lo+4
s_addc_u32 s3, s3, dataptr@rel32@hi+12
s_mov_b32 s0, s15
s_load_b64 s[2:3], s[2:3], 0x0
s_mov_b32 s1, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[0:1], s[0:1], 3
s_waitcnt lgkmcnt(0)
s_add_u32 s0, s2, s0
s_addc_u32 s1, s3, s1
v_dual_mov_b32 v2, s1 :: v_dual_mov_b32 v1, s0
s_mov_b32 s0, exec_lo
flat_load_b64 v[1:2], v[1:2]
s_waitcnt vmcnt(0) lgkmcnt(0)
v_cmpx_ne_u64_e32 0, v[1:2]
s_cbranch_execz .LBB3_2
v_lshlrev_b32_e32 v3, 2, v0
s_delay_alu instid0(VALU_DEP_1)
v_add_co_u32 v1, vcc_lo, v1, v3
v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
flat_load_b32 v3, v[1:2]
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_nc_u32_e32 v0, v3, v0
flat_store_b32 v[1:2], v0
.LBB3_2:
s_endpgm
| usemem | 438 | 458 | stackv2-00000-of-00015 |
// Demangled: pi_kern(double*)
Function : _Z7pi_kernPd
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_TID.X &wr=0x1 ?trans1;
UMOV UR5, 0x3a83126f ?trans1;
UMOV UR4, 0x447a0000 ?trans1;
BSSY.RECONVERGENT B1, 0x120 ?trans1;
S2R R3, SR_CTAID.X &wr=0x1 ?trans1;
UFFMA UR4, UR5, -UR4, 1 ?WAIT4_END_GROUP;
UFFMA UR4, UR4, UR5, 0.0010000000474974513054 ?trans1;
IMAD R2, R3, 0xfa, R2 &req={1} ?WAIT5_END_GROUP;
I2FP.F32.S32 R0, R2 ?WAIT4_END_GROUP;
FCHK P0, R0, 1000 &wr=0x1 ?trans1;
FFMA R3, R0, UR4, RZ ?WAIT4_END_GROUP;
FFMA R4, R3, -1000, R0 ?WAIT4_END_GROUP;
FFMA R3, R4, UR4, R3 ?trans1;
@!P0 BRA 0x110 &req={1,0} ?trans6;
MOV R4, 0x110 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x540 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
FFMA R5, -R3, R3, 1 ?trans1;
BSSY.RECONVERGENT B0, 0x240 ?trans3;
MUFU.RSQ R0, R5 &rd=0x0 &wr=0x1 ?trans1;
IADD3 R4, PT, PT, R5, -0xd000000, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R4, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1f0 &req={1,0} ?trans5;
BSSY.RECONVERGENT B1, 0x1d0 ?trans1;
MOV R0, R5 ?trans1;
MOV R10, 0x1c0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x3d0 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R6, R0 ?trans1;
BRA 0x230 ?trans6;
FMUL.FTZ R6, R5, R0 ?trans1;
FMUL.FTZ R0, R0, 0.5 ?WAIT3_END_GROUP;
FFMA R5, -R6, R6, R5 ?WAIT4_END_GROUP;
FFMA R6, R5, R0, R6 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
FADD R3, R3, 9.9999999747524270788e-07 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0x350 ?trans2;
FFMA R0, -R3, R3, 1 ?WAIT4_END_GROUP;
MUFU.RSQ R5, R0 &rd=0x1 &wr=0x2 ?trans1;
IADD3 R3, PT, PT, R0, -0xd000000, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R3, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x300 &req={2,1,0} ?trans5;
MOV R10, 0x2e0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x3d0 ?trans5;
MOV R3, R0 ?trans1;
BRA 0x340 ?trans6;
FMUL.FTZ R3, R0, R5 ?trans1;
FMUL.FTZ R4, R5, 0.5 ?WAIT3_END_GROUP;
FFMA R0, -R3, R3, R0 ?WAIT4_END_GROUP;
FFMA R3, R0, R4, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans1;
FADD R0, R3, R6 ?WAIT4_END_GROUP;
FMUL R0, R0, 9.9999999747524270788e-07 ?WAIT4_END_GROUP;
FFMA R0, R0, 0.5, RZ ?trans1;
IMAD.WIDE R4, R2, 0x8, R4 &req={0} ?WAIT3_END_GROUP;
F2F.F64.F32 R2, R0 &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R4.64], R2 &req={0} ?trans1;
EXIT ?trans5;
LOP3.LUT P0, RZ, R0, 0x7fffffff, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 MOV R4, R0 ?trans1;
@!P0 BRA 0x500 ?trans6;
FSETP.GEU.FTZ.AND P0, PT, R0, RZ, PT ?WAIT13_END_GROUP;
@!P0 MOV R4, 0x7fffffff ?trans1;
@!P0 BRA 0x500 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P0 FADD.FTZ R4, R0, 1 ?trans1;
@P0 BRA 0x500 ?trans6;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P0 FFMA R5, R0, 1.84467440737095516160e+19, RZ ?WAIT4_END_GROUP;
@P0 MUFU.RSQ R4, R5 &wr=0x0 ?trans2;
@P0 FMUL.FTZ R8, R5, R4 &req={0} ?trans1;
@P0 FMUL.FTZ R9, R4, 0.5 ?trans1;
@!P0 MOV R4, R0 ?trans2;
@P0 FADD.FTZ R7, -R8, -RZ ?WAIT4_END_GROUP;
@P0 FFMA R7, R8, R7, R5 ?WAIT4_END_GROUP;
@P0 FFMA R7, R7, R9, R8 ?WAIT4_END_GROUP;
@P0 FMUL.FTZ R4, R7, 2.3283064365386962891e-10 ?WAIT7_END_GROUP;
MOV R0, R4 ?trans1;
MOV R4, R10 ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R4 0x0 ?trans5;
SHF.R.U32.HI R3, RZ, 0x17, R0 ?trans1;
BSSY.RECONVERGENT B0, 0xb20 ?trans4;
BSSY.RELIABLE B2, 0x710 ?trans1;
MOV R5, R0 ?trans1;
LOP3.LUT R3, R3, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R7, PT, PT, R3, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R7, 0xfd, !PT ?WAIT13_END_GROUP;
@!P0 MOV R6, RZ ?trans1;
@!P0 BRA 0x700 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P0 BREAK.RELIABLE B2 ?trans5;
@P0 BRA 0xb00 ?trans5;
HFMA2 R6, -RZ, RZ, 4.4765625, 0 ?WAIT5_END_GROUP;
LOP3.LUT P0, RZ, R6, 0x7fffffff, R5, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BREAK.RELIABLE B2 ?trans5;
@!P0 BRA 0xae0 ?trans5;
LOP3.LUT P0, RZ, R5, 0x7fffffff, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 BREAK.RELIABLE B2 ?trans5;
@!P0 BRA 0xac0 ?trans5;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?trans1;
LOP3.LUT P1, RZ, R6, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BREAK.RELIABLE B2 ?trans5;
@P0 BRA 0xa90 ?trans5;
ISETP.GE.AND P0, PT, R7, RZ, PT ?WAIT13_END_GROUP;
@P0 MOV R6, RZ ?trans1;
@!P0 FFMA R5, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P0 MOV R6, 0xffffffc0 ?WAIT7_END_GROUP;
BSYNC.RELIABLE B2 ?trans5;
UMOV UR4, 0x447a0000 ?trans1;
IADD3 R3, PT, PT, R3, -0x7f, RZ ?trans1;
UIADD3 UR4, UPT, UPT, UR4, -0x4800000, URZ ?trans1;
BSSY.RECONVERGENT B2, 0xa80 ?trans3;
IMAD R0, R3, -0x800000, R5 ?trans1;
IADD3 R6, PT, PT, R6, -0x9, R3 ?trans1;
FADD.FTZ R9, -RZ, -UR4 ?WAIT3_END_GROUP;
MUFU.RCP R7, UR4 &wr=0x0 ?trans2;
FFMA R8, R7, R9, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R7, R7, R8, R7 ?WAIT4_END_GROUP;
FFMA R8, R0, R7, RZ ?WAIT4_END_GROUP;
FFMA R5, R9, R8, R0 ?WAIT4_END_GROUP;
FFMA R8, R7, R5, R8 ?WAIT4_END_GROUP;
FFMA R9, R9, R8, R0 ?WAIT4_END_GROUP;
FFMA R5, R7, R9, R8 ?WAIT5_END_GROUP;
SHF.R.U32.HI R0, RZ, 0x17, R5 ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R10, PT, PT, R0, R6, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R10, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xa60 ?trans5;
ISETP.GT.AND P0, PT, R10, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0xa30 ?trans5;
ISETP.GE.AND P0, PT, R10, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0xa70 ?trans5;
ISETP.GE.AND P0, PT, R10, -0x18, PT ?trans1;
LOP3.LUT R5, R5, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0xa70 ?trans5;
FFMA.RZ R0, R7, R9, R8 ?trans1;
IADD3 R6, PT, PT, R10.reuse, 0x20, RZ ?trans1;
ISETP.NE.AND P1, PT, R10.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R10, RZ, PT ?trans2;
LOP3.LUT R0, R0, 0x7fffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R0, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R0, R7.reuse, R9.reuse, R8.reuse ?trans1;
FFMA.RM R7, R7, R9, R8 ?trans1;
IADD3 R8, PT, PT, -R10, RZ, RZ ?trans2;
SHF.L.U32 R6, R3, R6, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R0, R7, PT ?trans1;
SEL R0, R8, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R6, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R0, RZ, R0, R3 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R6, RZ, 0x1, R0 ?WAIT3_END_GROUP;
SEL R3, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R3, R3, 0x1, R6, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, R0, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R6, PT, PT, R6, R3, RZ ?WAIT4_END_GROUP;
LOP3.LUT R5, R6, R5, RZ, 0xfc, !PT ?trans1;
BRA 0xa70 ?trans6;
LOP3.LUT R5, R5, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R5, R5, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0xa70 ?trans6;
IMAD R5, R6, 0x800000, R5 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
BRA 0xb10 ?trans5;
LOP3.LUT R5, R6, 0x80000000, R5, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R5, R5, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0xb10 ?trans6;
LOP3.LUT R5, R6, 0x80000000, R5, 0x48, !PT ?trans1;
BRA 0xb10 ?trans6;
MUFU.RSQ R5, -QNAN &wr=0x0 ?trans1;
BRA 0xb10 ?trans5;
FADD.FTZ R5, R0, 1000 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
MOV R3, R5 &req={0} ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R4 0x0 ?trans5;
BRA 0xb50;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: pi_kern(double*)
_Z7pi_kernPd:
v_mad_u64_u32 v[1:2], null, 0xfa, s15, v[0:1]
s_load_b64 s[0:1], s[0:1], 0x0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f32_i32_e32 v0, v1
v_div_scale_f32 v2, null, 0x447a0000, 0x447a0000, v0
v_div_scale_f32 v5, vcc_lo, v0, 0x447a0000, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f32_e32 v3, v2
s_waitcnt_depctr 0xfff
v_fma_f32 v4, -v2, v3, 1.0
v_fmac_f32_e32 v3, v4, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v4, v5, v3
v_fma_f32 v6, -v2, v4, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v4, v6, v3
v_fma_f32 v2, -v2, v4, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fmas_f32 v2, v2, v3, v4
v_div_fixup_f32 v0, v2, 0x447a0000, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_f32_e32 v2, 0x358637bd, v0
v_fma_f32 v0, -v0, v0, 1.0
v_fma_f32 v2, -v2, v2, 1.0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_mul_f32_e32 v3, 0x4f800000, v0
v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v0
v_cmp_gt_f32_e64 s2, 0xf800000, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v0, v0, v3, vcc_lo
v_sqrt_f32_e32 v3, v0
s_waitcnt_depctr 0xfff
v_dual_mul_f32 v4, 0x4f800000, v2 :: v_dual_add_nc_u32 v5, -1, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e64 v2, v2, v4, s2
v_add_nc_u32_e32 v7, 1, v3
v_sqrt_f32_e32 v4, v2
s_waitcnt_depctr 0xfff
v_add_nc_u32_e32 v6, -1, v4
v_add_nc_u32_e32 v9, 1, v4
v_fma_f32 v8, -v5, v3, v0
v_fma_f32 v11, -v7, v3, v0
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f32 v10, -v6, v4, v2
v_cmp_ge_f32_e64 s3, 0, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cndmask_b32_e64 v3, v3, v5, s3
v_cmp_ge_f32_e64 s3, 0, v10
v_fma_f32 v5, -v9, v4, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v4, v4, v6, s3
v_cmp_lt_f32_e64 s3, 0, v11
v_cndmask_b32_e64 v3, v3, v7, s3
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_lt_f32_e64 s3, 0, v5
v_mul_f32_e32 v5, 0x37800000, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v4, v4, v9, s3
v_dual_cndmask_b32 v3, v3, v5 :: v_dual_mul_f32 v6, 0x37800000, v4
v_cmp_class_f32_e64 vcc_lo, v0, 0x260
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cndmask_b32_e64 v4, v4, v6, s2
v_cndmask_b32_e32 v0, v3, v0, vcc_lo
v_cmp_class_f32_e64 vcc_lo, v2, 0x260
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v2, v4, v2, vcc_lo
v_add_f32_e32 v0, v0, v2
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v0, 0x358637bd, v0
v_fma_f32 v0, v0, 0.5, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
v_cvt_f64_f32_e32 v[3:4], v0
v_lshlrev_b64 v[0:1], 3, v[1:2]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b64 v[0:1], v[3:4], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| pi_kern | 4,079 | 1,944 | stackv2-00000-of-00015 |
// Demangled: matrixSort(int*, int*)
Function : _Z10matrixSortPiS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
LDC R5, c[0x0][0x360] &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans7;
LDC R6, c[0x0][0x370] &wr=0x3 ?trans8;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x4 ?trans1;
ISETP.GE.U32.AND P0, PT, R6.reuse, 0x8, PT &req={3} ?trans1;
LOP3.LUT R10, R6, 0x7, RZ, 0xc0, !PT ?trans1;
IMAD R5, R5, UR6, R0 &req={1} ?WAIT2_END_GROUP;
HFMA2 R4, -RZ, RZ, 0, 0 ?trans2;
IMAD.WIDE R8, R5, 0x4, R2 &req={4} ?trans1;
ISETP.NE.AND P2, PT, R10, RZ, PT ?trans1;
MOV R7, RZ ?WAIT3_END_GROUP;
LDG.E R0, desc[UR4][R8.64] &req={2} &rd=0x1 &wr=0x5 ?trans2;
@!P0 BRA 0x570 &req={0} ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LOP3.LUT R4, R6, 0x7ffffff8, RZ, 0xc0, !PT ?trans1;
MOV R11, RZ ?trans1;
MOV R7, RZ ?WAIT7_END_GROUP;
IMAD.WIDE.U32 R8, R11, 0x4, R2 &req={1,0} ?WAIT5_END_GROUP;
LDG.E R13, desc[UR4][R8.64] &wr=0x2 ?trans4;
LDG.E R15, desc[UR4][R8.64+0x4] &wr=0x3 ?trans4;
LDG.E R17, desc[UR4][R8.64+0x8] &wr=0x4 ?trans4;
LDG.E R19, desc[UR4][R8.64+0xc] &wr=0x4 ?trans4;
LDG.E R21, desc[UR4][R8.64+0x10] &wr=0x4 ?trans4;
LDG.E R23, desc[UR4][R8.64+0x14] &wr=0x4 ?trans4;
LDG.E R25, desc[UR4][R8.64+0x18] &wr=0x4 ?trans4;
LDG.E R27, desc[UR4][R8.64+0x1c] &rd=0x0 &wr=0x4 ?trans1;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?WAIT2_END_GROUP;
IADD3 R12, PT, PT, R7, 0x1, RZ ?trans1;
ISETP.GT.AND P1, PT, R0.reuse, R13, PT &req={5,2} ?trans1;
ISETP.GT.AND P3, PT, R0, R15, PT &req={3} ?WAIT12_END_GROUP;
@!P1 ISETP.NE.AND P4, PT, R13, R0.reuse, PT ?trans1;
@!P3 ISETP.NE.AND P5, PT, R15, R0, PT ?WAIT4_END_GROUP;
@!P1 ISETP.LT.AND P0, PT, R11.reuse, R5, !P4 ?trans1;
ISETP.GT.AND P4, PT, R0, R17, PT &req={4} ?trans1;
@!P3 IADD3 R14, PT, PT, R11, 0x1, RZ ?trans2;
PLOP3.LUT P1, PT, PT, PT, PT, 0x80, 0x8 ?WAIT3_END_GROUP;
@!P3 ISETP.LT.AND P1, PT, R14, R5, !P5 ?trans1;
ISETP.GT.AND P3, PT, R0, R19, PT ?WAIT5_END_GROUP;
@!P0 IADD3 R12, PT, PT, R7, RZ, RZ ?trans1;
@!P4 ISETP.NE.AND P5, PT, R17, R0.reuse, PT ?trans1;
@!P4 IADD3 R8, PT, PT, R11, 0x2, RZ &req={0} ?trans2;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?trans2;
IADD3 R7, PT, PT, R12, 0x1, RZ ?trans1;
@!P4 ISETP.LT.AND P0, PT, R8, R5, !P5 ?trans1;
ISETP.GT.AND P4, PT, R0, R21, PT ?trans1;
@!P3 ISETP.NE.AND P5, PT, R19, R0, PT ?trans1;
@!P3 IADD3 R8, PT, PT, R11, 0x3, RZ ?WAIT2_END_GROUP;
@!P1 IADD3 R7, PT, PT, R12, RZ, RZ ?trans2;
PLOP3.LUT P1, PT, PT, PT, PT, 0x80, 0x8 ?trans1;
@!P3 ISETP.LT.AND P1, PT, R8, R5, !P5 ?trans1;
ISETP.GT.AND P3, PT, R0, R23, PT ?trans1;
IADD3 R9, PT, PT, R7, 0x1, RZ ?WAIT3_END_GROUP;
@!P0 IADD3 R9, PT, PT, R7, RZ, RZ ?trans1;
@!P4 ISETP.NE.AND P5, PT, R21, R0.reuse, PT ?trans1;
@!P4 IADD3 R8, PT, PT, R11, 0x4, RZ ?trans2;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?trans2;
IADD3 R7, PT, PT, R9, 0x1, RZ ?trans1;
@!P4 ISETP.LT.AND P0, PT, R8, R5, !P5 ?trans1;
ISETP.GT.AND P4, PT, R0, R25, PT ?trans1;
@!P3 ISETP.NE.AND P5, PT, R23, R0, PT ?trans1;
@!P3 IADD3 R8, PT, PT, R11, 0x5, RZ ?WAIT2_END_GROUP;
@!P1 IADD3 R7, PT, PT, R9, RZ, RZ ?trans2;
PLOP3.LUT P1, PT, PT, PT, PT, 0x80, 0x8 ?trans1;
@!P3 ISETP.LT.AND P1, PT, R8, R5, !P5 ?trans1;
ISETP.GT.AND P3, PT, R0, R27, PT ?trans1;
IADD3 R9, PT, PT, R7, 0x1, RZ ?WAIT3_END_GROUP;
@!P0 IADD3 R9, PT, PT, R7, RZ, RZ ?trans1;
@!P4 ISETP.NE.AND P5, PT, R25, R0, PT ?trans1;
@!P4 IADD3 R8, PT, PT, R11, 0x6, RZ ?trans2;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?trans2;
IADD3 R7, PT, PT, R9.reuse, 0x1, RZ ?trans1;
@!P4 ISETP.LT.AND P0, PT, R8, R5, !P5 ?trans1;
@!P1 IADD3 R7, PT, PT, R9, RZ, RZ ?trans2;
@!P3 IADD3 R8, PT, PT, R11, 0x7, RZ ?WAIT2_END_GROUP;
IADD3 R11, PT, PT, R11, 0x8, RZ ?trans1;
@!P3 ISETP.NE.AND P4, PT, R27, R0, PT ?trans1;
PLOP3.LUT P1, PT, PT, PT, PT, 0x80, 0x8 ?trans2;
IADD3 R9, PT, PT, R7.reuse, 0x1, RZ ?trans2;
@!P3 ISETP.LT.AND P1, PT, R8, R5, !P4 ?trans2;
@!P0 IADD3 R9, PT, PT, R7, RZ, RZ ?trans1;
ISETP.NE.AND P0, PT, R11, R4, PT ?WAIT3_END_GROUP;
IADD3 R7, PT, PT, R9, 0x1, RZ ?WAIT7_END_GROUP;
@!P1 IADD3 R7, PT, PT, R9, RZ, RZ ?WAIT3_END_GROUP;
@P0 BRA 0x140 ?trans5;
@!P2 BRA 0x9b0 ?trans5;
ISETP.GE.U32.AND P0, PT, R10, 0x4, PT ?trans1;
LOP3.LUT R14, R6, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P3, PT, R14, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x790 ?trans6;
IMAD.WIDE.U32 R8, R4, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
LDG.E R11, desc[UR4][R8.64] &wr=0x2 ?trans4;
LDG.E R13, desc[UR4][R8.64+0x4] &wr=0x3 ?trans4;
LDG.E R15, desc[UR4][R8.64+0x8] &wr=0x4 ?trans4;
LDG.E R17, desc[UR4][R8.64+0xc] &rd=0x0 &wr=0x4 ?trans1;
IADD3 R10, PT, PT, R4, 0x1, RZ ?WAIT2_END_GROUP;
IADD3 R12, PT, PT, R4.reuse, 0x2, RZ ?trans2;
IADD3 R8, PT, PT, R4, 0x3, RZ &req={0} ?trans1;
ISETP.NE.AND P0, PT, R11, R0.reuse, PT &req={5,2} ?trans1;
ISETP.NE.AND P1, PT, R13, R0, PT &req={3} ?WAIT4_END_GROUP;
ISETP.LT.AND P0, PT, R4.reuse, R5.reuse, !P0 ?trans1;
IADD3 R4, PT, PT, R4, 0x4, RZ ?trans1;
ISETP.NE.AND P2, PT, R15, R0, PT &req={4} ?trans1;
ISETP.LT.AND P1, PT, R10, R5, !P1 ?trans2;
ISETP.GT.OR P0, PT, R0, R11, P0 ?trans1;
IADD3 R10, PT, PT, R7, 0x1, RZ ?trans1;
ISETP.LT.AND P2, PT, R12, R5, !P2 ?trans1;
ISETP.GT.OR P1, PT, R0, R13, P1 ?WAIT4_END_GROUP;
ISETP.GT.OR P2, PT, R0, R15, P2 ?WAIT6_END_GROUP;
@!P0 IADD3 R10, PT, PT, R7, RZ, RZ ?trans1;
ISETP.NE.AND P0, PT, R17, R0, PT ?WAIT3_END_GROUP;
IADD3 R7, PT, PT, R10, 0x1, RZ ?trans2;
ISETP.LT.AND P0, PT, R8, R5, !P0 ?trans1;
@!P1 IADD3 R7, PT, PT, R10, RZ, RZ ?WAIT4_END_GROUP;
ISETP.GT.OR P0, PT, R0, R17, P0 ?trans1;
IADD3 R8, PT, PT, R7.reuse, 0x1, RZ ?trans2;
@!P2 IADD3 R8, PT, PT, R7, RZ, RZ ?WAIT4_END_GROUP;
IADD3 R7, PT, PT, R8, 0x1, RZ ?WAIT6_END_GROUP;
@!P0 IADD3 R7, PT, PT, R8, RZ, RZ ?WAIT7_END_GROUP;
@!P3 BRA 0x9b0 ?trans5;
ISETP.NE.AND P3, PT, R14, 0x1, PT ?WAIT13_END_GROUP;
@P3 IMAD.WIDE.U32 R8, R4, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
@P3 LDG.E R11, desc[UR4][R8.64] &wr=0x2 ?trans1;
LOP3.LUT R6, R6, 0x1, RZ, 0xc0, !PT ?WAIT3_END_GROUP;
@P3 LDG.E R13, desc[UR4][R8.64+0x4] &wr=0x3 ?trans2;
ISETP.NE.U32.AND P2, PT, R6, 0x1, PT ?trans1;
@P3 IADD3 R6, PT, PT, R4, 0x1, RZ ?trans1;
@P3 ISETP.NE.AND P0, PT, R11, R0, PT &req={5,2} ?WAIT5_END_GROUP;
@P3 ISETP.LT.AND P0, PT, R4.reuse, R5, !P0 ?trans1;
@P3 IADD3 R4, PT, PT, R4, 0x2, RZ ?WAIT5_END_GROUP;
@!P2 IMAD.WIDE.U32 R2, R4, 0x4, R2 ?WAIT6_END_GROUP;
@!P2 LDG.E R3, desc[UR4][R2.64] &rd=0x0 &wr=0x2 ?trans1;
@P3 ISETP.GT.OR P0, PT, R0, R11, P0 ?trans1;
PLOP3.LUT P1, PT, PT, PT, PT, 0x80, 0x8 ?trans1;
@P3 ISETP.NE.AND P4, PT, R13, R0, PT &req={3} ?WAIT3_END_GROUP;
@P3 PLOP3.LUT P1, PT, P0, PT, PT, 0x80, 0x8 ?trans2;
@P3 ISETP.LT.AND P4, PT, R6, R5, !P4 ?trans1;
@P3 IADD3 R6, PT, PT, R7, 0x1, RZ ?WAIT4_END_GROUP;
@P3 ISETP.GT.OR P4, PT, R0, R13, P4 ?trans1;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?WAIT5_END_GROUP;
@!P1 IADD3 R6, PT, PT, R7, RZ, RZ ?trans2;
@P3 PLOP3.LUT P0, PT, P4, PT, PT, 0x80, 0x8 ?trans2;
@P3 IADD3 R2, PT, PT, R6, 0x1, RZ &req={0} ?WAIT11_END_GROUP;
@!P0 IADD3 R2, PT, PT, R6, RZ, RZ ?trans2;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?WAIT3_END_GROUP;
@P3 MOV R7, R2 ?WAIT5_END_GROUP;
@!P2 IADD3 R2, PT, PT, R7, 0x1, RZ ?trans1;
@!P2 ISETP.NE.AND P1, PT, R3, R0, PT &req={2} ?WAIT5_END_GROUP;
@!P2 ISETP.LT.AND P1, PT, R4, R5, !P1 ?WAIT5_END_GROUP;
@!P2 ISETP.GT.OR P1, PT, R0, R3, P1 ?WAIT5_END_GROUP;
@!P2 PLOP3.LUT P0, PT, P1, PT, PT, 0x80, 0x8 ?WAIT13_END_GROUP;
@!P0 IADD3 R2, PT, PT, R7, RZ, RZ ?WAIT5_END_GROUP;
@!P2 MOV R7, R2 ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans2;
IMAD.WIDE.U32 R2, R7, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R0 &req={5} ?trans1;
EXIT ?trans5;
BRA 0x9f0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: matrixSort(int*, int*)
_Z10matrixSortPiS_:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x1c
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b32 s1, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_cmp_lt_i32 s1, 1
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[2:3], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
global_load_b32 v2, v[2:3], off
s_cbranch_scc1 .LBB0_8
v_mov_b32_e32 v0, 0
s_mov_b32 s2, 0
.LBB0_2:
s_load_b32 s0, s[4:5], 0x0
s_mov_b32 s8, exec_lo
s_waitcnt vmcnt(0) lgkmcnt(0)
v_cmp_lt_i32_e64 s3, s0, v2
v_cmpx_ge_i32_e64 s0, v2
v_cmp_eq_u32_e32 vcc_lo, s0, v2
v_cmp_lt_i32_e64 s0, s2, v1
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
s_and_not1_b32 s3, s3, exec_lo
s_and_b32 s0, s0, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, s0, exec_lo
s_or_b32 s3, s3, s0
s_or_b32 exec_lo, exec_lo, s8
s_and_saveexec_b32 s0, s3
v_add_nc_u32_e32 v0, 1, v0
s_or_b32 exec_lo, exec_lo, s0
s_add_i32 s2, s2, 1
s_add_u32 s4, s4, 4
s_addc_u32 s5, s5, 0
s_cmp_eq_u32 s1, s2
s_cbranch_scc0 .LBB0_2
v_ashrrev_i32_e32 v1, 31, v0
s_branch .LBB0_9
.LBB0_8:
v_mov_b32_e32 v0, 0
v_mov_b32_e32 v1, 0
.LBB0_9:
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_add_co_u32 v0, vcc_lo, s6, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
s_waitcnt vmcnt(0)
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| matrixSort | 4,487 | 964 | stackv2-00000-of-00015 |
// Demangled: bubble_sort(int*, int)
Function : _Z11bubble_sortPii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
HFMA2 R0, -RZ, RZ, 0, 0 ?trans1;
UMOV UR4, 0x400 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x2 ?trans2;
ULEA UR6, UR5, UR4, 0x18 &req={2,1} ?WAIT12_END_GROUP;
LEA R2, R0.reuse, UR6, 0x2 &req={1} ?trans2;
IADD3 R0, PT, PT, R0, 0x40, RZ ?WAIT3_END_GROUP;
STS.128 [R2], RZ &rd=0x1 ?trans2;
ISETP.NE.AND P0, PT, R0, 0x400, PT ?trans2;
STS.128 [R2+0x10], RZ &rd=0x1 ?trans4;
STS.128 [R2+0x20], RZ &rd=0x1 ?trans4;
STS.128 [R2+0x30], RZ &rd=0x1 ?trans4;
STS.128 [R2+0x40], RZ &rd=0x1 ?trans4;
STS.128 [R2+0x50], RZ &rd=0x1 ?trans4;
STS.128 [R2+0x60], RZ &rd=0x1 ?trans4;
STS.128 [R2+0x70], RZ &rd=0x1 ?trans4;
STS.128 [R2+0x80], RZ &rd=0x1 ?trans4;
STS.128 [R2+0x90], RZ &rd=0x1 ?trans4;
STS.128 [R2+0xa0], RZ &rd=0x1 ?trans4;
STS.128 [R2+0xb0], RZ &rd=0x1 ?trans4;
STS.128 [R2+0xc0], RZ &rd=0x1 ?trans4;
STS.128 [R2+0xd0], RZ &rd=0x1 ?trans4;
STS.128 [R2+0xe0], RZ &rd=0x1 ?trans4;
STS.128 [R2+0xf0], RZ &rd=0x1 ?trans1;
@P0 BRA 0x60 ?trans5;
LDC R0, c[0x0][0x388] &wr=0x2 ?trans1;
MOV R4, 0x1 ?trans1;
HFMA2 R5, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
MOV R6, 0x1 ?trans1;
HFMA2 R7, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x1000, URZ ?WAIT4_END_GROUP;
STS.128 [UR6+0x1000], R4 &rd=0x3 ?trans1;
ULEA UR4, UR5, UR4, 0x18 ?WAIT3_END_GROUP;
STS.128 [UR6+0x1010], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x1020], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x1030], R4 &rd=0x3 ?trans1;
ISETP.GE.AND P0, PT, R0, 0x1, PT &req={2} ?WAIT3_END_GROUP;
STS.128 [UR6+0x1040], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x1050], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x1060], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x1070], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x1080], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x1090], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x10a0], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x10b0], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x10c0], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x10d0], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x10e0], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x10f0], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x1100], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x1110], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x1120], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x1130], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x1140], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x1150], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x1160], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x1170], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x1180], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x1190], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x11a0], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x11b0], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x11c0], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x11d0], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x11e0], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x11f0], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x1200], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x1210], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x1220], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x1230], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x1240], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x1250], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x1260], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x1270], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x1280], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x1290], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x12a0], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x12b0], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x12c0], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x12d0], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x12e0], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x12f0], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x1300], R4 &rd=0x3 ?trans4;
STS.128 [UR6+0x1310], R4 &rd=0x3 ?trans1;
@!P0 BRA 0xbb0 ?trans5;
IADD3 R7, PT, PT, -R0, RZ, RZ &req={3} ?WAIT7_END_GROUP;
LDCU UR5, c[0x0][0x388] &req={2} &wr=0x2 ?trans1;
HFMA2 R0, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
MOV R6, R7 ?trans1;
LDCU.64 UR10, c[0x0][0x380] &wr=0x3 ?trans1;
UIADD3 UR5, UPT, UPT, -UR5, URZ, URZ &req={2} ?trans1;
MOV.64 R2, UR10 &req={3,1} ?WAIT5_END_GROUP;
ISETP.LE.AND P0, PT, RZ, UR5, PT ?trans1;
UMOV UR5, UR4 ?WAIT12_END_GROUP;
@P0 BRA 0xab0 ?trans5;
IADD3 R4, PT, PT, -R6, RZ, RZ ?trans2;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?WAIT3_END_GROUP;
ISETP.GT.AND P1, PT, R4, 0x3, PT ?WAIT13_END_GROUP;
@!P1 BRA 0x8d0 ?trans5;
PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x80 ?WAIT13_END_GROUP;
LDG.E R5, desc[UR8][R2.64+-0x4] &wr=0x2 ?trans4;
LDG.E R4, desc[UR8][R2.64] &wr=0x2 ?trans4;
LDG.E R8, desc[UR8][R2.64+0x4] &wr=0x3 ?trans4;
LDG.E R10, desc[UR8][R2.64+0x8] &wr=0x4 ?trans4;
LDG.E R12, desc[UR8][R2.64+0xc] &wr=0x5 ?trans1;
ISETP.GT.AND P3, PT, R5, R4, PT &req={2} ?WAIT13_END_GROUP;
@P3 STG.E desc[UR8][R2.64], R5 &rd=0x1 ?trans4;
LDG.E R9, desc[UR8][R2.64] &wr=0x3 ?trans2;
ISETP.GT.AND P4, PT, R9, R8, PT &req={3} ?WAIT13_END_GROUP;
@P4 STG.E desc[UR8][R2.64+0x4], R9 &rd=0x2 ?trans4;
LDG.E R11, desc[UR8][R2.64+0x4] &wr=0x4 ?trans2;
ISETP.GT.AND P2, PT, R11, R10, PT &req={4} ?WAIT13_END_GROUP;
@P2 STG.E desc[UR8][R2.64+0x8], R11 &rd=0x3 ?trans4;
LDG.E R13, desc[UR8][R2.64+0x8] &wr=0x5 ?trans1;
@P3 MOV R5, 0x1 &req={1} ?trans1;
IADD3 R6, PT, PT, R6, 0x4, RZ ?trans1;
@P3 MOV R0, RZ ?trans1;
@P3 STG.E desc[UR8][R2.64+-0x4], R4 ?trans4;
@P3 STS [UR5], R5 ?trans4;
@P3 STS [UR5+-0x4], R5 ?trans1;
ISETP.GE.AND P3, PT, R6, -0x3, PT ?trans1;
@P4 MOV R14, 0x1 ?trans1;
@P2 MOV R9, 0x1 &req={2} ?trans1;
@P4 STG.E desc[UR8][R2.64], R8 ?trans1;
@P4 MOV R0, RZ ?WAIT3_END_GROUP;
@P4 STS [UR5+0x4], R14 ?trans4;
@P2 STS [UR5+0x8], R9 ?trans1;
@P2 MOV R0, RZ ?WAIT3_END_GROUP;
@P4 STS [UR5], R14 ?trans4;
@P2 STS [UR5+0x4], R9 ?trans4;
@P2 STG.E desc[UR8][R2.64+0x4], R10 ?trans1;
ISETP.GT.AND P1, PT, R13, R12, PT &req={5} ?WAIT13_END_GROUP;
@P1 MOV R11, 0x1 &req={3} ?trans1;
@P1 STG.E desc[UR8][R2.64+0x8], R12 ?trans4;
@P1 STS [UR5+0xc], R11 ?trans4;
@P1 STS [UR5+0x8], R11 ?trans1;
UIADD3 UR5, UPT, UPT, UR5, 0x10, URZ ?WAIT3_END_GROUP;
@P1 STG.E desc[UR8][R2.64+0xc], R13 &rd=0x1 ?trans1;
@P1 MOV R0, RZ ?trans1;
IADD.64 R2, R2, 0x10 &req={1} ?trans2;
@!P3 BRA 0x640 ?trans6;
IADD3 R4, PT, PT, -R6, RZ, RZ ?WAIT5_END_GROUP;
ISETP.GT.AND P1, PT, R4, 0x1, PT ?WAIT13_END_GROUP;
@!P1 BRA 0xa90 ?trans5;
LDG.E R5, desc[UR8][R2.64+-0x4] &wr=0x2 ?trans4;
LDG.E R4, desc[UR8][R2.64] &wr=0x2 ?trans4;
LDG.E R8, desc[UR8][R2.64+0x4] &wr=0x3 ?trans1;
ISETP.GT.AND P1, PT, R5, R4, PT &req={2} ?WAIT13_END_GROUP;
@P1 STG.E desc[UR8][R2.64], R5 ?trans4;
LDG.E R9, desc[UR8][R2.64] &wr=0x3 ?trans1;
@P1 MOV R10, 0x1 ?trans1;
IADD3 R6, PT, PT, R6, 0x1, RZ ?trans2;
@P1 STG.E desc[UR8][R2.64+-0x4], R4 &rd=0x1 ?trans1;
@P1 MOV R0, RZ ?WAIT3_END_GROUP;
@P1 STS [UR5], R10 ?trans1;
PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x80 ?WAIT3_END_GROUP;
@P1 STS [UR5+-0x4], R10 ?trans1;
IADD.64 R4, R2, 0x4 &req={1} ?WAIT3_END_GROUP;
IADD3 R6, PT, PT, R6, 0x1, RZ ?trans1;
ISETP.GT.AND P2, PT, R9, R8, PT &req={3} ?WAIT13_END_GROUP;
@P2 MOV R11, 0x1 ?trans1;
@P2 STG.E desc[UR8][R2.64], R8 ?trans1;
@P2 MOV R0, RZ ?WAIT3_END_GROUP;
@P2 STG.E desc[UR8][R2.64+0x4], R9 &rd=0x1 ?trans4;
@P2 STS [UR5+0x4], R11 &rd=0x2 ?trans4;
@P2 STS [UR5], R11 &rd=0x2 ?trans1;
UIADD3 UR5, UPT, UPT, UR5, 0x4, URZ ?trans1;
IADD.64 R2, R4, 0x4 &req={1} ?WAIT3_END_GROUP;
UIADD3 UR5, UPT, UPT, UR5, 0x4, URZ ?WAIT12_END_GROUP;
ISETP.NE.OR P0, PT, R6, RZ, P0 ?WAIT13_END_GROUP;
@!P0 BRA 0xb90 ?trans5;
LDG.E R5, desc[UR8][R2.64+-0x4] &wr=0x3 ?trans4;
LDG.E R4, desc[UR8][R2.64] &wr=0x3 ?trans1;
IADD3 R6, PT, PT, R6, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R6, RZ, PT ?trans1;
ISETP.GT.AND P0, PT, R5, R4, PT &req={3} ?WAIT13_END_GROUP;
@P0 MOV R8, 0x1 ?trans1;
@P0 STG.E desc[UR8][R2.64+-0x4], R4 ?trans1;
@P0 MOV R0, RZ ?WAIT3_END_GROUP;
@P0 STS [UR5], R8 ?trans4;
@P0 STS [UR5+-0x4], R8 ?trans1;
UIADD3 UR5, UPT, UPT, UR5, 0x4, URZ ?WAIT3_END_GROUP;
@P0 STG.E desc[UR8][R2.64], R5 &rd=0x1 ?trans2;
IADD.64 R2, R2, 0x4 &req={1} ?trans2;
@P1 BRA 0xab0 ?trans6;
ISETP.EQ.AND P0, PT, R0, RZ, PT ?WAIT13_END_GROUP;
@P0 BRA 0x560 ?trans5;
S2R R0, SR_TID.X &wr=0x4 ?trans1;
MOV R3, 0x1 ?trans1;
LEA R0, R0, UR6, 0x2 &req={4} ?WAIT5_END_GROUP;
STS [R0], R3 ?trans1;
EXIT ?trans5;
BRA 0xc00;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: bubble_sort(int*, int)
_Z11bubble_sortPii:
s_clause 0x1
s_load_b32 s6, s[0:1], 0x8
s_load_b64 s[2:3], s[0:1], 0x0
v_mov_b32_e32 v2, 0
s_waitcnt lgkmcnt(0)
s_cmp_gt_i32 s6, 0
s_cselect_b32 s0, -1, 0
s_add_u32 s2, s2, -4
v_cndmask_b32_e64 v0, 0, 1, s0
s_addc_u32 s3, s3, -1
s_delay_alu instid0(VALU_DEP_1)
v_cmp_ne_u32_e64 s0, 1, v0
.LBB0_1:
s_delay_alu instid0(VALU_DEP_1)
s_and_b32 vcc_lo, exec_lo, s0
s_mov_b32 s1, 1
s_cbranch_vccnz .LBB0_6
s_mov_b64 s[4:5], s[2:3]
s_mov_b32 s7, s6
.LBB0_3:
global_load_b64 v[0:1], v2, s[4:5]
s_waitcnt vmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, v0, v1
s_cbranch_vccz .LBB0_5
v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v4, v0
s_mov_b32 s1, 0
global_store_b64 v2, v[3:4], s[4:5]
.LBB0_5:
s_add_u32 s4, s4, 4
s_addc_u32 s5, s5, 0
s_add_i32 s7, s7, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s7, 0
s_cbranch_scc0 .LBB0_3
.LBB0_6:
s_cmp_eq_u32 s1, 1
s_cbranch_scc0 .LBB0_1
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| bubble_sort | 4,889 | 547 | stackv2-00000-of-00015 |
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