id stringlengths 22 129 | text stringlengths 60 19.5k | arch stringclasses 9
values | syntax stringclasses 5
values | kind stringclasses 4
values | repo stringclasses 32
values | path stringlengths 7 108 | license stringclasses 10
values | commit stringlengths 40 40 | source_host stringclasses 1
value | category stringclasses 15
values | source_url stringlengths 85 192 | line_start int64 1 5.48k | line_end int64 4 5.5k |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
zephyrproject-rtos/zephyr:arch/arm/core/cortex_m/swap_helper.S:20 | str r3, [r0, r1]
mov r2, ip
dsb
/* set mode to privileged, r2 still contains value from CONTROL */
movs r3, #1
bics r2, r3
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
ldr r1, [r0, #_thread_offset_to_mode]
bic r1, #1
/* Store (privileged) mode in thread's mode state variable */
str... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/cortex_m/swap_helper.S | Apache-2.0 | 8558b935b147f33958153822478e2bf9ab9806cf | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/8558b935b147f33958153822478e2bf9ab9806cf/arch/arm/core/cortex_m/swap_helper.S | 761 | 794 |
zephyrproject-rtos/zephyr:arch/arm/core/cortex_m/swap_helper.S:12 | cmp r1, #2
beq .L_oops
#if defined(CONFIG_IRQ_OFFLOAD)
push {r0, lr}
bl z_irq_do_offload /* call C routine which executes the offload */
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
pop {r0, r3}
mov lr, r3
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
pop {r0, lr}
#endif
/* exception ret... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/cortex_m/swap_helper.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/arm/core/cortex_m/swap_helper.S | 441 | 500 |
zephyrproject-rtos/zephyr:arch/arm/core/cortex_m/swap_helper.S:15 | * | | | | z_arm_do_syscall should |sp[4]. Note that this is |
* | | | | return to after handling|the return address copied |
* | | | | svc |from user exception sf[24]|
* | | ... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/cortex_m/swap_helper.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/arm/core/cortex_m/swap_helper.S | 561 | 620 |
zephyrproject-rtos/zephyr:arch/arm/core/cortex_m/swap_helper.S:16 | /*
* At this point:
* r0 has PSP i.e. top of user stack
* ip has top of privilege stack
* r8 has hardware-saved stack frame size (only in case of mainline)
*/
push {r4-r7}
push {r2}
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
mov r2, r0 /* safe to use r2 since it is saved on MSP *... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/cortex_m/swap_helper.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/arm/core/cortex_m/swap_helper.S | 601 | 660 |
zephyrproject-rtos/zephyr:arch/arm/core/cortex_m/swap_helper.S:17 | stmia r2!, {r4-r5}
/* Store the svc return address at the offset expected by z_arm_do_syscall,
* as detailed in the table above.
*/
str r5, [r3, #(_EXC_HW_SAVED_BASIC_SF_SIZE+4)]
ldr r1, =z_arm_do_syscall
str r1, [r3, #_EXC_HW_SAVED_BASIC_SF_RETADDR_OFFSET] /* Execution return to z_arm_do_sy... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/cortex_m/swap_helper.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/arm/core/cortex_m/swap_helper.S | 641 | 700 |
zephyrproject-rtos/zephyr:arch/arm/core/cortex_m/swap_helper.S:18 | ldmia r1!, {r4-r5}
stmia r2!, {r4-r5}
/* Store the svc return address at the offset expected by z_arm_do_syscall,
* as detailed in the table above.
*/
add r8, #4
str r5, [ip, r8]
ldr r1, =z_arm_do_syscall
str r1, [ip, #_EXC_HW_SAVED_BASIC_SF_RETADDR_OFFSET] /* Execution return to z_a... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/cortex_m/swap_helper.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/arm/core/cortex_m/swap_helper.S | 681 | 740 |
zephyrproject-rtos/zephyr:arch/arm/core/cortex_m/swap_helper.S:19 | */
msr PSP, ip
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
ldr r3, =K_SYSCALL_LIMIT
cmp r6, r3
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
/* validate syscall limit */
ldr ip, =K_SYSCALL_LIMIT
cmp r6, ip
#endif
/* The supplied syscall_id must be lower than the limit
* (Requires uns... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/cortex_m/swap_helper.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/arm/core/cortex_m/swap_helper.S | 721 | 780 |
zephyrproject-rtos/zephyr:arch/arm/core/cortex_m/swap_helper.S:20 | bic r1, #1
/* Store (privileged) mode in thread's mode state variable */
str r1, [r0, #_thread_offset_to_mode]
dsb
/* set mode to privileged, r2 still contains value from CONTROL */
bic r2, #1
#endif
msr CONTROL, r2
/* ISB is not strictly necessary here (stack pointer is not being
* to... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/cortex_m/swap_helper.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/arm/core/cortex_m/swap_helper.S | 761 | 786 |
zephyrproject-rtos/zephyr:arch/arm/core/cortex_m/vector_table.S:1 | /*
* Copyright (c) 2013-2015 Wind River Systems, Inc.
* Copyright (c) 2020 Nordic Semiconductor ASA.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Populated vector table in ROM
*
* Vector table at the beginning of the image for starting system. The reset
* vector is the system entry point, ... | arm | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/cortex_m/vector_table.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm/core/cortex_m/vector_table.S | 1 | 60 |
zephyrproject-rtos/zephyr:arch/arm/core/cortex_m/vector_table.S:2 | .word z_arm_reset
.word z_arm_nmi
.word z_arm_hard_fault
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word z_arm_svc
.word 0
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
.word z_arm_mpu_fault
.word z_arm_bus_... | arm | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/cortex_m/vector_table.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm/core/cortex_m/vector_table.S | 41 | 91 |
zephyrproject-rtos/zephyr:arch/arm/core/cortex_m/vector_table.S:3 | #endif
#if defined(CONFIG_CPU_CORTEX_M_HAS_SYSTICK)
#if defined(CONFIG_SYS_CLOCK_EXISTS) && \
defined(CONFIG_CORTEX_M_SYSTICK_INSTALL_ISR)
.word sys_clock_isr
#else
.word z_arm_exc_spurious
#endif /* CONFIG_SYS_CLOCK_EXISTS && CONFIG_CORTEX_M_SYSTICK_INSTALL_ISR */
#else
.word 0
#endif /* CONFIG_CPU_COR... | arm | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/cortex_m/vector_table.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm/core/cortex_m/vector_table.S | 81 | 91 |
zephyrproject-rtos/zephyr:arch/arm/core/cortex_m/vector_table.S:2 | .word z_arm_reset
.word z_arm_nmi
.word z_arm_hard_fault
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word z_arm_svc
.word 0
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
.word z_arm_mpu_fault
.word z_arm_bus_... | arm | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/cortex_m/vector_table.S | Apache-2.0 | e2e5542d14adb0f97a425243ee9b009bb71757d8 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/e2e5542d14adb0f97a425243ee9b009bb71757d8/arch/arm/core/cortex_m/vector_table.S | 41 | 91 |
zephyrproject-rtos/zephyr:arch/arm/core/cortex_m/vector_table.S:2 | .word z_arm_reset
.word z_arm_nmi
.word z_arm_hard_fault
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word z_arm_svc
.word 0
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
.word z_arm_mpu_fault
.word z_arm_bus_... | arm | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/cortex_m/vector_table.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/arm/core/cortex_m/vector_table.S | 41 | 91 |
zephyrproject-rtos/zephyr:arch/arm/core/header.S:1 | /*
* Copyright (C) 2023, Advanced Micro Devices, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/linker/sections.h>
_ASM_FILE_PROLOGUE
SECTION_SUBSEC_FUNC(image_header,_image_header_section,_image_header)
#ifdef CONFIG_CPU_CORTEX_M
/*
* setting the _very_ early boot on the main stack allows t... | arm | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/header.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm/core/header.S | 1 | 33 |
zephyrproject-rtos/zephyr:arch/arm/core/nmi_on_reset.S:1 | /*
* Copyright (c) 2013-2014 Wind River Systems, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Default basic NMI handler before the kernel is up
*
* Provide a default handler for NMI before the system is up. The default action
* is to hard hang, sleeping.
*
* This might be preferable ... | arm | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/nmi_on_reset.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm/core/nmi_on_reset.S | 1 | 27 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:2 | #else
# define LOCK(unused) cpsid i
# define UNLOCK(unused) cpsie i
#endif
#else
# define LOCK(unused)
# define UNLOCK(unused)
#endif
/**
*
* User space entry function
*
* This function is the entry point to user mode from privileged execution.
* The conversion is one way, and threads which transition to user m... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm/core/userspace.S | 41 | 100 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:3 | /* move p1 to ip */
mov ip, r1
ldr r1, =_thread_offset_to_priv_stack_end
ldr r0, [r0, r1]
/* Restore p1 from ip */
mov r1, ip
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE) \
|| defined(CONFIG_CPU_AARCH32_CORTEX_R)
ldr r0, [r0, #_thread_offset_to_priv_stack_end] /* privileged stack ptr */... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm/core/userspace.S | 81 | 140 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:4 | sub r0, r0, r1 /* Calculate start of privileged stack */
/* set stack pointer limit to the start of the privileged stack */
msr PSPLIM, r0
#endif
/* Re-program dynamic memory map.
*
* Important note:
* z_arm_configure_dynamic_mpu_regions() may re-program the MPU Stack Guard
* to guard ... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm/core/userspace.S | 121 | 180 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:5 | #if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
adds r0, r4, r5
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE) \
|| defined(CONFIG_CPU_AARCH32_CORTEX_R)
add r0, r4, r5
#endif
/* pop remaining arguments from stack before switching stacks */
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
/* Use r4 to pop ... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm/core/userspace.S | 161 | 220 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:6 | * left un-guarded; this is safe, as long as the privileged stack is
* large enough to accommodate a maximum exception stack frame.
*/
#ifndef CONFIG_USE_SWITCH
/* Temporarily store current IRQ locking status in ip */
mrs ip, BASEPRI
#endif
push {r0, ip}
#ifndef CONFIG_USE_SWITCH
/* Lock Pend... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm/core/userspace.S | 201 | 260 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:7 | #else
/* change processor mode to unprivileged */
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
push {r0, r1, r2, r3}
ldr r0, =_kernel
ldr r0, [r0, #_kernel_offset_to_current]
ldr r1, =_thread_offset_to_mode
ldr r1, [r0, r1]
movs r2, #1
orrs r1, r1, r2
mrs r3, CONTROL
orrs r3, r3,... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm/core/userspace.S | 241 | 300 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:8 | #endif
dsb
msr CONTROL, ip
#endif /* CONFIG_CPU_AARCH32_CORTEX_R */
/* ISB is not strictly necessary here (stack pointer is not being
* touched), but it's recommended to avoid executing pre-fetched
* instructions with the previous privilege.
*/
isb
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASE... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm/core/userspace.S | 281 | 340 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:9 | /* Note [when using MPU-based stack guarding]:
* The function is executing in privileged mode. This implies that we
* shall not be allowed to use the thread's default unprivileged stack,
* (i.e push to or pop from it), to avoid a possible stack corruption.
*
* Rationale: since we execute in PRI... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm/core/userspace.S | 321 | 380 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:10 | #if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
/* save r0, r1 to ip, lr */
mov ip, r0
mov lr, r1
ldr r0, =K_SYSCALL_BAD
cmp r6, r0
bne valid_syscall
/* BAD SYSCALL path */
/* fixup stack frame on the privileged stack, adding ssf */
mov r1, sp
/* ssf is present in r1 (sp) */
p... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm/core/userspace.S | 361 | 420 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:11 | * r0 holds the return value and needs to be preserved
*/
mov ip, r0
mov r0, sp
ldr r0, [r0,#16]
mov lr, r0
/* Restore r0 */
mov r0, ip
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE) \
|| defined(CONFIG_CPU_AARCH32_CORTEX_R)
ldr ip, =K_SYSCALL_BAD
cmp r6, ip
bne valid_syscal... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm/core/userspace.S | 401 | 460 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:12 | #if defined(CONFIG_BUILTIN_STACK_GUARD)
/*
* Guard the default (user) stack until thread drops privileges.
*
* Notes:
* PSPLIM is configured *before* PSP switches to the default (user) stack.
* This is safe, since the user stack is located, by design, in a lower
* memory area compared ... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm/core/userspace.S | 441 | 500 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:13 | ldr r0, [r0,#12]
msr PSP, r0
/* Restore r0 */
mov r0, ip
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
/* set stack back to unprivileged stack */
ldr ip, [sp,#12]
msr PSP, ip
#endif
#if !defined(CONFIG_USE_SWITCH) && defined(CONFIG_BUILTIN_STACK_GUARD)
/* Restore interrupt lock status */
... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm/core/userspace.S | 481 | 540 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:14 | orrs r1, r1, #1
/* Store (unprivileged) mode in thread's mode state variable */
str r1, [r0, #_thread_offset_to_mode]
dsb
#if defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
/* drop privileges by setting bit 0 in CONTROL */
mrs ip, CONTROL
orrs ip, ip, #1
/* drop lock immediately before setting C... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm/core/userspace.S | 521 | 580 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:15 | /* Save return value temporarily to ip */
mov ip, r0
mov r0, r8
movs r1, #1
orrs r0, r0, r1
/* swap ip, r0 */
mov r1, ip
mov ip, r0
mov r0, r1
movs r1, #0
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
/* Zero out volatile (caller-saved) registers so as to not leak state from
... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm/core/userspace.S | 561 | 620 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:16 | /*
* return back to original function that called SVC
*/
mov ip, r8
cps #MODE_USR
#endif
bx ip
/*
* size_t arch_user_string_nlen(const char *s, size_t maxsize, int *err_arg)
*/
SECTION_FUNC(TEXT, arch_user_string_nlen)
push {r0, r1, r2, r4, r5, lr}
/* sp+4 is error value, init to -1 ... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm/core/userspace.S | 601 | 660 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:17 | beq strlen_done
adds r3, #1
b strlen_loop
#else
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
cmp r5, #0
beq strlen_done
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
cbz r5, strlen_done
#endif
cmp r3, r1
beq.n strlen_done
adds r3, #1
b.n strlen_loop
#endif
strlen_done:
/* Mov... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm/core/userspace.S | 641 | 673 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:1 | /*
* Userspace and service handler hooks
*
* Copyright (c) 2017 Linaro Limited
* Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
*
* SPDX-License-Identifier: Apache-2.0
*
*/
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
#include <offsets_short.h>
#include <zeph... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 70e87c5d1dceb2fab50dcf073db44cf3729bbe39 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/70e87c5d1dceb2fab50dcf073db44cf3729bbe39/arch/arm/core/userspace.S | 1 | 60 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:2 | # define LOCK(unused) cpsid i
# define UNLOCK(unused) cpsie i
#endif
/**
*
* User space entry function
*
* This function is the entry point to user mode from privileged execution.
* The conversion is one way, and threads which transition to user mode do
* not transition back later, unless they are doing system... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 70e87c5d1dceb2fab50dcf073db44cf3729bbe39 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/70e87c5d1dceb2fab50dcf073db44cf3729bbe39/arch/arm/core/userspace.S | 41 | 100 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:3 | mov r1, ip
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE) \
|| defined(CONFIG_CPU_AARCH32_CORTEX_R)
ldr r0, [r0, #_thread_offset_to_priv_stack_end] /* privileged stack ptr */
#endif
/* check if current stack is privileged and switch to it if not */
cmp r6, #1
beq 1f
#if defined(CONFIG_CPU_AARCH... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 70e87c5d1dceb2fab50dcf073db44cf3729bbe39 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/70e87c5d1dceb2fab50dcf073db44cf3729bbe39/arch/arm/core/userspace.S | 81 | 140 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:4 | /* Re-program dynamic memory map.
*
* Important note:
* z_arm_configure_dynamic_mpu_regions() may re-program the MPU Stack Guard
* to guard the privileged stack for overflows (if building with option
* CONFIG_MPU_STACK_GUARD). There is a risk of actually overflowing the
* stack while doing... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 70e87c5d1dceb2fab50dcf073db44cf3729bbe39 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/70e87c5d1dceb2fab50dcf073db44cf3729bbe39/arch/arm/core/userspace.S | 121 | 180 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:5 | #endif
/* pop remaining arguments from stack before switching stacks */
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
/* Use r4 to pop lr, then restore r4 */
mov ip, r4
pop {r1,r2,r3,r4}
mov lr, r4
mov r4, ip
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE) \
|| defined(CONFIG_CPU_AARCH32_CORT... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 70e87c5d1dceb2fab50dcf073db44cf3729bbe39 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/70e87c5d1dceb2fab50dcf073db44cf3729bbe39/arch/arm/core/userspace.S | 161 | 220 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:6 | /* Set PSPLIM to guard the thread's user stack. */
msr PSPLIM, r4
pop {r0, ip}
#endif
/* set stack to user stack */
msr PSP, r0
#endif
UNLOCK(r0)
/* restore r0 */
mov r0, lr
#if defined(CONFIG_CPU_AARCH32_CORTEX_R)
/* change processor mode to unprivileged, with all interrupts enable... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 70e87c5d1dceb2fab50dcf073db44cf3729bbe39 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/70e87c5d1dceb2fab50dcf073db44cf3729bbe39/arch/arm/core/userspace.S | 201 | 260 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:7 | orrs r1, r1, #1
mrs ip, CONTROL
orrs ip, ip, #1
/* Store (unprivileged) mode in thread's mode state variable */
str r1, [r0, #_thread_offset_to_mode]
#ifdef CONFIG_ARM_PAC_PER_THREAD
/* Read thread's dedicated PAC key and since we are in unprivileged mode write them in the
* unprivileged PAC k... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 70e87c5d1dceb2fab50dcf073db44cf3729bbe39 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/70e87c5d1dceb2fab50dcf073db44cf3729bbe39/arch/arm/core/userspace.S | 241 | 300 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:9 | ldr ip, [ip, #_thread_offset_to_sp_usr]
push {ip, lr}
#endif
/* Note (applies when using stack limit checking):
* We do not need to lock IRQs after switching PSP to the privileged stack;
* PSPLIM is guarding the default (user) stack, which, by design, is
* located at *lower* memory area. Since w... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 70e87c5d1dceb2fab50dcf073db44cf3729bbe39 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/70e87c5d1dceb2fab50dcf073db44cf3729bbe39/arch/arm/core/userspace.S | 321 | 380 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:10 | push {r1}
/* push args to complete stack frame */
push {r4,r5}
dispatch_syscall:
/* original r0 is saved in ip */
ldr r0, =_k_syscall_table
lsls r6, #2
add r0, r6
ldr r0, [r0] /* load table address */
/* swap ip and r0, restore r1 from lr */
mov r1, ip
mov ip, r0
mov r0, r1
... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 70e87c5d1dceb2fab50dcf073db44cf3729bbe39 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/70e87c5d1dceb2fab50dcf073db44cf3729bbe39/arch/arm/core/userspace.S | 361 | 420 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:11 | valid_syscall:
/* push args to complete stack frame */
mov ip, sp
push {r4,r5,ip}
dispatch_syscall:
ldr ip, =_k_syscall_table
lsl r6, #2
add ip, r6
ldr ip, [ip] /* load table address */
/* execute function from dispatch table */
blx ip
/* restore LR */
ldr lr, [sp,#16]
#en... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 70e87c5d1dceb2fab50dcf073db44cf3729bbe39 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/70e87c5d1dceb2fab50dcf073db44cf3729bbe39/arch/arm/core/userspace.S | 401 | 460 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:12 | ldr r3, [r3, #_kernel_offset_to_current]
ldr r3, [r3, #_thread_offset_to_stack_info_start] /* stack_info.start */
msr PSPLIM, r3
#endif
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
/* set stack back to unprivileged stack */
mov ip, r0
mov r0, sp
ldr r0, [r0,#12]
msr PSP, r0
/* Restor... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 70e87c5d1dceb2fab50dcf073db44cf3729bbe39 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/70e87c5d1dceb2fab50dcf073db44cf3729bbe39/arch/arm/core/userspace.S | 441 | 500 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:13 | ldr r0, =_kernel
ldr r0, [r0, #_kernel_offset_to_current]
ldr r1, [r0, #_thread_offset_to_mode]
orrs r1, r1, #1
/* Store (unprivileged) mode in thread's mode state variable */
str r1, [r0, #_thread_offset_to_mode]
dsb
#if defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
/* drop privileges by settin... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 70e87c5d1dceb2fab50dcf073db44cf3729bbe39 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/70e87c5d1dceb2fab50dcf073db44cf3729bbe39/arch/arm/core/userspace.S | 481 | 540 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:14 | * mode
*/
/* Save return value temporarily to ip */
mov ip, r0
mov r0, r8
movs r1, #1
orrs r0, r0, r1
/* swap ip, r0 */
mov r1, ip
mov ip, r0
mov r0, r1
movs r1, #0
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
/* Zero out volatile (caller-saved) registers so as to n... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 70e87c5d1dceb2fab50dcf073db44cf3729bbe39 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/70e87c5d1dceb2fab50dcf073db44cf3729bbe39/arch/arm/core/userspace.S | 521 | 580 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:15 | mov r1, #0
mov r2, #0
mov r3, #0
/*
* return back to original function that called SVC
*/
mov ip, r8
cps #MODE_USR
#endif
bx ip
/*
* size_t arch_user_string_nlen(const char *s, size_t maxsize, int *err_arg)
*/
SECTION_FUNC(TEXT, arch_user_string_nlen)
push {r0, r1, r2, r4, r5... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 70e87c5d1dceb2fab50dcf073db44cf3729bbe39 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/70e87c5d1dceb2fab50dcf073db44cf3729bbe39/arch/arm/core/userspace.S | 561 | 620 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:16 | beq strlen_done
cmp r3, r1
beq strlen_done
adds r3, #1
b strlen_loop
#else
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
cmp r5, #0
beq strlen_done
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
cbz r5, strlen_done
#endif
cmp r3, r1
beq.n strlen_done
adds r3, #1
b.n strlen_... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 70e87c5d1dceb2fab50dcf073db44cf3729bbe39 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/70e87c5d1dceb2fab50dcf073db44cf3729bbe39/arch/arm/core/userspace.S | 601 | 636 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:1 | /*
* Userspace and service handler hooks
*
* Copyright (c) 2017 Linaro Limited
* Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
*
* SPDX-License-Identifier: Apache-2.0
*
*/
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
#include <offsets_short.h>
#include <zeph... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/arm/core/userspace.S | 1 | 60 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:2 | * not transition back later, unless they are doing system calls.
*
* The function is invoked as:
* z_arm_userspace_enter(user_entry, p1, p2, p3,
* stack_info.start, stack_info.size,
* sp_is_priv);
*/
SECTION_FUNC(TEXT,z_arm_userspace_enter)
/* move user_entry to l... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/arm/core/userspace.S | 41 | 100 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:3 | #else
/* set stack to privileged stack
*
* Note [applies only when CONFIG_BUILTIN_STACK_GUARD is enabled]:
* modifying PSP via MSR instruction is not subject to stack limit
* checking, so we do not need to clear PSPLIM before setting PSP.
* The operation is safe since, by design, the privil... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/arm/core/userspace.S | 81 | 140 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:4 | * stack, since we do not control how much stack is actually left, when
* user invokes z_arm_userspace_enter().
*/
ldr r0, =_kernel
ldr r0, [r0, #_kernel_offset_to_current]
bl z_arm_configure_dynamic_mpu_regions
/* clear the user stack area to clean out privileged data */
/* from right pas... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/arm/core/userspace.S | 121 | 180 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:5 | #endif
#if defined(CONFIG_CPU_AARCH32_CORTEX_R) || defined(CONFIG_CPU_AARCH32_CORTEX_A)
/*
* set stack to user stack. We are in SYSTEM state, so r13 and r14 are
* shared with USER state
*/
mov sp, r0
#else
#if defined(CONFIG_BUILTIN_STACK_GUARD)
/*
* Guard the default (user) stack unti... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/arm/core/userspace.S | 161 | 220 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:6 | #endif
/* set stack to user stack */
msr PSP, r0
#endif
#if defined(CONFIG_BUILTIN_STACK_GUARD)
/* Restore interrupt lock status */
msr BASEPRI, ip
isb
#endif
/* restore r0 */
mov r0, lr
#if defined(CONFIG_CPU_AARCH32_CORTEX_R)
/* change processor mode to unprivileged, with all inter... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/arm/core/userspace.S | 201 | 260 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:7 | mrs ip, CONTROL
orrs ip, ip, #1
/* Store (unprivileged) mode in thread's mode state variable */
str r1, [r0, #_thread_offset_to_mode]
#ifdef CONFIG_ARM_PAC_PER_THREAD
/* Read thread's dedicated PAC key and since we are in unprivileged mode write them in the
* unprivileged PAC key registers.
*... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/arm/core/userspace.S | 241 | 300 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:9 | push {ip, lr}
#endif
/* Note (applies when using stack limit checking):
* We do not need to lock IRQs after switching PSP to the privileged stack;
* PSPLIM is guarding the default (user) stack, which, by design, is
* located at *lower* memory area. Since we switch to the top of the
* privileged... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/arm/core/userspace.S | 321 | 380 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:10 | dispatch_syscall:
/* original r0 is saved in ip */
ldr r0, =_k_syscall_table
lsls r6, #2
add r0, r6
ldr r0, [r0] /* load table address */
/* swap ip and r0, restore r1 from lr */
mov r1, ip
mov ip, r0
mov r0, r1
mov r1, lr
/* execute function from dispatch table */
blx ip... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/arm/core/userspace.S | 361 | 420 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:11 | push {r4,r5,ip}
dispatch_syscall:
ldr ip, =_k_syscall_table
lsl r6, #2
add ip, r6
ldr ip, [ip] /* load table address */
/* execute function from dispatch table */
blx ip
/* restore LR */
ldr lr, [sp,#16]
#endif
#if defined(CONFIG_BUILTIN_STACK_GUARD)
/*
* Guard the default ... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/arm/core/userspace.S | 401 | 460 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:12 | isb
/* Set PSPLIM to guard the thread's user stack. */
ldr r3, =_kernel
ldr r3, [r3, #_kernel_offset_to_current]
ldr r3, [r3, #_thread_offset_to_stack_info_start] /* stack_info.start */
msr PSPLIM, r3
#endif
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
/* set stack back to unprivileged stac... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/arm/core/userspace.S | 441 | 500 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:13 | str r1, [r0, r2]
dsb
/* drop privileges by setting bit 0 in CONTROL */
mrs r2, CONTROL
orrs r2, r2, r3
msr CONTROL, r2
pop {r2, r3}
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE) \
|| defined(CONFIG_CPU_AARCH32_CORTEX_R)
ldr r0, =_kernel
ldr r0, [r0, #_kernel_offset_to_current]
l... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/arm/core/userspace.S | 481 | 540 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:14 | * return back to original function that called SVC, add 1 to force thumb
* mode
*/
/* Save return value temporarily to ip */
mov ip, r0
mov r0, r8
movs r1, #1
orrs r0, r0, r1
/* swap ip, r0 */
mov r1, ip
mov ip, r0
mov r0, r1
movs r1, #0
#elif defined(CONFIG_ARMV7_M_AR... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/arm/core/userspace.S | 521 | 580 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:15 | */
mov r1, #0
mov r2, #0
mov r3, #0
/*
* return back to original function that called SVC
*/
mov ip, r8
cps #MODE_USR
#endif
bx ip
/*
* size_t arch_user_string_nlen(const char *s, size_t maxsize, int *err_arg)
*/
SECTION_FUNC(TEXT, arch_user_string_nlen)
push {r0, r1, r2,... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/arm/core/userspace.S | 561 | 620 |
zephyrproject-rtos/zephyr:arch/arm/core/userspace.S:16 | cmp r5, #0
beq strlen_done
cmp r3, r1
beq strlen_done
adds r3, #1
b strlen_loop
#else
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
cmp r5, #0
beq strlen_done
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
cbz r5, strlen_done
#endif
cmp r3, r1
beq.n strlen_done
adds r3, #1
... | arm | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm/core/userspace.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/arm/core/userspace.S | 601 | 637 |
zephyrproject-rtos/zephyr:arch/arm64/core/cpu_idle.S:1 | /*
* Copyright (c) 2019 Carlo Caione <ccaione@baylibre.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* ARM64 Cortex-A power management
*/
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
#include <zephyr/arch/cpu.h>
_ASM_FILE_PROLOGUE
#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_IDLE
GTEXT(arch_cpu... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/cpu_idle.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/arm64/core/cpu_idle.S | 1 | 57 |
zephyrproject-rtos/zephyr:arch/arm64/core/early_mem_funcs.S:1 | /*
* Copyright (c) BayLibre SAS
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
_ASM_FILE_PROLOGUE
/*
* These simple memset and memcpy alternatives are necessary as the optimized
* ones depend on the MMU to be active (see commit c5b898743a20).
*
* ... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/early_mem_funcs.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm64/core/early_mem_funcs.S | 1 | 60 |
zephyrproject-rtos/zephyr:arch/arm64/core/early_mem_funcs.S:2 | str x8, [x0], #8
b.hi 1b
2: /* at least one byte to set? */
cbz x2, 4f
3: /* one byte at a time */
subs x2, x2, #1
strb w8, [x0], #1
b.ne 3b
4: ret
/* void arch_early_memcpy(void *dst, const void *src, size_t n) */
GTEXT(arch_early_memcpy)
SECTION_FUNC(TEXT, arch_early_memcpy)
/* are dst and src pointers 8-b... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/early_mem_funcs.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm64/core/early_mem_funcs.S | 41 | 83 |
zephyrproject-rtos/zephyr:arch/arm64/core/fpu.S:1 | /*
* Copyright (c) 2021 BayLibre SAS
* Written by: Nicolas Pitre
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
#include <zephyr/offsets.h>
_ASM_FILE_PROLOGUE
GTEXT(z_arm64_fpu_save)
SECTION_FUNC(TEXT, z_arm64_fpu_save)
mrs x1, fpsr
mrs x2, fpcr
... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/fpu.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm64/core/fpu.S | 1 | 60 |
zephyrproject-rtos/zephyr:arch/arm64/core/fpu.S:2 | ret
GTEXT(z_arm64_fpu_restore)
SECTION_FUNC(TEXT, z_arm64_fpu_restore)
ldr w1, [x0, #__z_arm64_fp_context_fpsr_OFFSET]
ldr w2, [x0, #__z_arm64_fp_context_fpcr_OFFSET]
msr fpsr, x1
msr fpcr, x2
/* Restore NEON registers */
add x0, x0, #__z_arm64_fp_context_neon_OFFSET
ldp q0, q1, [x0, #(16 * 0)]
ldp q2, q... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/fpu.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm64/core/fpu.S | 41 | 100 |
zephyrproject-rtos/zephyr:arch/arm64/core/fpu.S:3 | str w3, [x0, #__z_arm64_fp_context_fpcr_OFFSET]
/* Get Z registers base address */
add x2, x0, #__z_arm64_fp_context_sve_z_regs_OFFSET
/* Save Z registers */
str z0, [x2, #0, MUL VL]
str z1, [x2, #1, MUL VL]
str z2, [x2, #2, MUL VL]
str z3, [x2, #3, MUL VL]
str z4, [x2, #4, MUL VL]
str z5, [x2, #5, MUL VL]
... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/fpu.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm64/core/fpu.S | 81 | 140 |
zephyrproject-rtos/zephyr:arch/arm64/core/fpu.S:4 | mov x3, #__z_arm64_fp_context_sve_p_regs_OFFSET
add x3, x0, x3
/* Save P registers */
str p0, [x3, #0, MUL VL]
str p1, [x3, #1, MUL VL]
str p2, [x3, #2, MUL VL]
str p3, [x3, #3, MUL VL]
str p4, [x3, #4, MUL VL]
str p5, [x3, #5, MUL VL]
str p6, [x3, #6, MUL VL]
str p7, [x3, #7, MUL VL]
str p8, [x3, #8, MUL V... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/fpu.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm64/core/fpu.S | 121 | 180 |
zephyrproject-rtos/zephyr:arch/arm64/core/fpu.S:5 | ldr z2, [x2, #2, MUL VL]
ldr z3, [x2, #3, MUL VL]
ldr z4, [x2, #4, MUL VL]
ldr z5, [x2, #5, MUL VL]
ldr z6, [x2, #6, MUL VL]
ldr z7, [x2, #7, MUL VL]
ldr z8, [x2, #8, MUL VL]
ldr z9, [x2, #9, MUL VL]
ldr z10, [x2, #10, MUL VL]
ldr z11, [x2, #11, MUL VL]
ldr z12, [x2, #12, MUL VL]
ldr z13, [x2, #13, MUL VL]
... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/fpu.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm64/core/fpu.S | 161 | 220 |
zephyrproject-rtos/zephyr:arch/arm64/core/fpu.S:6 | mov x3, #__z_arm64_fp_context_sve_p_regs_OFFSET
add x3, x0, x3
/* Restore P registers intervals */
ldr p0, [x3, #0, MUL VL]
ldr p1, [x3, #1, MUL VL]
ldr p2, [x3, #2, MUL VL]
ldr p3, [x3, #3, MUL VL]
ldr p4, [x3, #4, MUL VL]
ldr p5, [x3, #5, MUL VL]
ldr p6, [x3, #6, MUL VL]
ldr p7, [x3, #7, MUL VL]
ldr p8, [... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/fpu.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm64/core/fpu.S | 201 | 230 |
zephyrproject-rtos/zephyr:arch/arm64/core/header.S:1 | /*
* Copyright (c) 2020 EPAM Systems
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/linker/sections.h>
#include <zephyr/arch/cpu.h>
#if CONFIG_MMU_PAGE_SIZE == 4096 || defined(CONFIG_ARM_MPU)
#define HEADER_PGSIZE 1
#elif CONFIG_MMU_PAGE_SIZE == 16384
#define HEADER_PGSIZE 2
#elif CONFIG_MMU_PAGE_SIZ... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/header.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm64/core/header.S | 1 | 41 |
zephyrproject-rtos/zephyr:arch/arm64/core/header.S:1 | /*
* Copyright (c) 2020 EPAM Systems
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/linker/sections.h>
#include <zephyr/arch/cpu.h>
#include "mmu.h"
#if CONFIG_MMU_PAGE_SIZE == 4096 || defined(CONFIG_ARM_MPU)
#define HEADER_PGSIZE 1
#elif CONFIG_MMU_PAGE_SIZE == 16384
#define HEADER_PGSIZE 2
#elif CO... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/header.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/arm64/core/header.S | 1 | 42 |
zephyrproject-rtos/zephyr:arch/arm64/core/isr_wrapper.S:1 | /*
* Copyright (c) 2019 Carlo Caione <ccaione@baylibre.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* ARM64 Cortex-A ISRs wrapper
*/
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
#include <offsets_short.h>
#include <zephyr/arch/cpu.h>
#include <zephyr/sw_isr_table.h>
#include <zephyr/d... | arm64 | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/isr_wrapper.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm64/core/isr_wrapper.S | 1 | 60 |
zephyrproject-rtos/zephyr:arch/arm64/core/isr_wrapper.S:2 | /* If not nested: switch to IRQ stack and save current sp on it. */
cbnz w1, 1f
ldr x1, [x0, #___cpu_t_irq_stack_OFFSET]
mov x2, sp
mov sp, x1
str x2, [sp, #-16]!
#if defined(CONFIG_ARM64_SAFE_EXCEPTION_STACK)
sub x1, x1, #CONFIG_ISR_STACK_SIZE
str x1, [x0, #_cpu_offset_to_current_stack_limit]
#endif
1:
#ifdef C... | arm64 | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/isr_wrapper.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm64/core/isr_wrapper.S | 41 | 100 |
zephyrproject-rtos/zephyr:arch/arm64/core/isr_wrapper.S:3 | b.le oob
cmp x0, 1023
b.gt oob
b spurious_continue
oob:
#endif
/* IRQ out of bounds */
mov x1, #(CONFIG_NUM_IRQS - 1)
cmp x0, x1
b.hi spurious_continue
/* Retrieve the interrupt service routine */
ldr x1, =_sw_isr_table
add x1, x1, x0, lsl #4 /* table is 16-byte wide */
ldp x0, x3, [x1] /* arg in x0, ISR i... | arm64 | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/isr_wrapper.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm64/core/isr_wrapper.S | 81 | 140 |
zephyrproject-rtos/zephyr:arch/arm64/core/isr_wrapper.S:4 | GTEXT(z_arm64_irq_done)
z_arm64_irq_done:
/* if (--_current_cpu->nested != 0) exit */
get_cpu x0
ldr w1, [x0, #___cpu_t_nested_OFFSET]
subs w1, w1, #1
str w1, [x0, #___cpu_t_nested_OFFSET]
bne exit
/* No more nested: retrieve the task's stack. */
ldr x1, [sp]
mov sp, x1
/* retrieve pointer to the current th... | arm64 | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/isr_wrapper.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm64/core/isr_wrapper.S | 121 | 166 |
zephyrproject-rtos/zephyr:arch/arm64/core/macro_priv.inc:1 | /*
* Copyright (c) 2019 Carlo Caione <ccaione@baylibre.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _MACRO_PRIV_INC_
#define _MACRO_PRIV_INC_
#include <zephyr/arch/arm64/tpidrro_el0.h>
#ifdef _ASMLANGUAGE
/*
* Get CPU id
*/
.macro get_cpu_id xreg0
mrs \xreg0, mpidr_el1
/* FIMXME: aff3 not taken ... | arm64 | gas-like | macro-heavy | zephyrproject-rtos/zephyr | arch/arm64/core/macro_priv.inc | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm64/core/macro_priv.inc | 1 | 57 |
zephyrproject-rtos/zephyr:arch/arm64/core/mmu.S:1 | /*
* Copyright (c) 2021 Carlo Caione <ccaione@baylibre.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
#include <zephyr/arch/cpu.h>
_ASM_FILE_PROLOGUE
/*
* Switch TTBR0
*/
GTEXT(z_arm64_set_ttbr0)
SECTION_FUNC(TEXT, z_arm64_set_ttbr0)
/* Swit... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/mmu.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm64/core/mmu.S | 1 | 24 |
zephyrproject-rtos/zephyr:arch/arm64/core/reset.S:1 | /*
* Copyright (c) 2019 Carlo Caione <ccaione@baylibre.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
#include <zephyr/arch/cpu.h>
#include <zephyr/offsets.h>
#include <zephyr/devicetree.h>
#include "boot.h"
#include "macro_priv.inc"
_ASM_FILE_PRO... | arm64 | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/reset.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm64/core/reset.S | 1 | 60 |
zephyrproject-rtos/zephyr:arch/arm64/core/reset.S:2 | SECTION_SUBSEC_FUNC(TEXT,_reset_section,__reset_prep_c)
/* return address: x23 */
mov x23, lr
switch_el x0, 3f, 2f, 1f
3:
#if !defined(CONFIG_ARMV8_R)
/* Reinitialize SCTLR from scratch in EL3 */
ldr w0, =(SCTLR_EL3_RES1 | SCTLR_I_BIT | SCTLR_SA_BIT)
msr sctlr_el3, x0
isb
/* Custom plat prep_c init */
bl z_a... | arm64 | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/reset.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm64/core/reset.S | 41 | 100 |
zephyrproject-rtos/zephyr:arch/arm64/core/reset.S:3 | /* Custom plat prep_c init */
bl z_arm64_el1_plat_prep_c
/* Set SP_EL1. We cannot use sp_el1 at EL1 */
msr SPSel, #1
mov sp, x24
out:
isb
/* Select SP_EL0 */
msr SPSel, #0
/* Initialize stack */
mov sp, x24
/* fp = NULL */
mov fp, xzr
ret x23
/*
* Reset vector
*
* Ran when the system comes ... | arm64 | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/reset.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm64/core/reset.S | 81 | 140 |
zephyrproject-rtos/zephyr:arch/arm64/core/reset.S:4 | /* Mask all exceptions */
msr DAIFSet, #0xf
#if CONFIG_MP_MAX_NUM_CPUS > 1
/*
* Deal with multi core booting simultaneously to race for being the primary core.
* Use voting lock[1] with reasonable but minimal requirements on the memory system
* to make sure only one core wins at last.
*
* [1] kernel.org/d... | arm64 | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/reset.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm64/core/reset.S | 121 | 180 |
zephyrproject-rtos/zephyr:arch/arm64/core/reset.S:5 | mov x5, #0
2: ldrb w3, [x4, x5]
tst w3, #255
/* wait */
bne 2b
add x5, x5, #1
cmp x5, #DT_CHILD_NUM_STATUS_OKAY(DT_PATH(cpus))
bne 2b
/* check if current core won */
dmb ish
ldr x3, [x0, #BOOT_PARAM_MPID_OFFSET]
cmp x3, x1
beq primary_core
/* fallthrough secondary */
/* loop until our turn comes */
seco... | arm64 | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/reset.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm64/core/reset.S | 161 | 220 |
zephyrproject-rtos/zephyr:arch/arm64/core/reset.S:6 | * can be measured. This needs to be done before using the stack
* so that we don't clobber any data.
*/
#ifdef CONFIG_INIT_STACKS
mov_imm x0, CONFIG_ISR_STACK_SIZE
sub x0, sp, x0
sub x9, sp, #8
mov x10, 0xaaaaaaaaaaaaaaaa
stack_init_loop:
cmp x0, x9
beq stack_init_done
str x10, [x0], #8
... | arm64 | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/reset.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm64/core/reset.S | 201 | 257 |
zephyrproject-rtos/zephyr:arch/arm64/core/reset.S:7 | adr x0, 1f
msr elr_el2, x0
eret
1:
/* EL1 init */
bl z_arm64_el1_init
/* We want to use SP_ELx from now on */
msr SPSel, #1
/* Enable SError interrupts */
msr DAIFClr, #(DAIFCLR_ABT_BIT)
isb
ret x25 /* either z_prep_c or z_arm64_secondary_prep_c */ | arm64 | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/reset.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm64/core/reset.S | 241 | 257 |
zephyrproject-rtos/zephyr:arch/arm64/core/smccc-call.S:1 | /*
* Copyright (c) 2019 Carlo Caione <ccaione@baylibre.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* This file implements the common calling mechanism to be used with the Secure
* Monitor Call (SMC) and Hypervisor Call (HVC).
*
* See https://developer.arm.com/docs/den0028/latest
*/
#include <zephyr/to... | arm64 | gas-like | macro-heavy | zephyrproject-rtos/zephyr | arch/arm64/core/smccc-call.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm64/core/smccc-call.S | 1 | 43 |
zephyrproject-rtos/zephyr:arch/arm64/core/switch.S:1 | /*
* Copyright (c) 2019 Carlo Caione <ccaione@baylibre.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* Thread context switching for ARM64 Cortex-A (AArch64)
*
* This module implements the routines necessary for thread context switching
* on ARM64 Cortex-A (AArch64)
*/
#include <zephyr/toolchain.h>
#incl... | arm64 | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/switch.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm64/core/switch.S | 1 | 60 |
zephyrproject-rtos/zephyr:arch/arm64/core/switch.S:2 | stp x21, x22, [x1, #_thread_offset_to_callee_saved_x21_x22]
stp x23, x24, [x1, #_thread_offset_to_callee_saved_x23_x24]
stp x25, x26, [x1, #_thread_offset_to_callee_saved_x25_x26]
stp x27, x28, [x1, #_thread_offset_to_callee_saved_x27_x28]
#ifndef CONFIG_ARM64_SAFE_EXCEPTION_STACK
stp x29, x4, [x1, #_thread_offset... | arm64 | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/switch.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm64/core/switch.S | 41 | 100 |
zephyrproject-rtos/zephyr:arch/arm64/core/switch.S:3 | * Now safe to call C function since PAC key management functions are compiled
* without PAC protection (branch-protection=none).
*/
stp x0, x1, [sp, #-16]!
bl z_arm64_pac_thread_context_switch
ldp x0, x1, [sp], #16
#endif
#ifdef CONFIG_SMP
/* Write barrier: ensure all preceding writes are executed
* before wr... | arm64 | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/switch.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm64/core/switch.S | 81 | 140 |
zephyrproject-rtos/zephyr:arch/arm64/core/switch.S:4 | msr sp_el0, x4
#else
ldr x29, [x0, #_thread_offset_to_callee_saved_x29_sp_el0]
#endif
/* Restore SP_EL1 and return address */
ldp x4, lr, [x0, #_thread_offset_to_callee_saved_sp_elx_lr]
mov sp, x4
#if defined(CONFIG_ARM64_SAFE_EXCEPTION_STACK)
/* arch_curr_cpu()->arch.current_stack_limit = thread->arch.stac... | arm64 | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/switch.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm64/core/switch.S | 121 | 180 |
zephyrproject-rtos/zephyr:arch/arm64/core/switch.S:5 | SECTION_FUNC(TEXT, z_arm64_sync_exc)
/*
* CFI: exception entered with SP pointing at struct arch_esf built by
* z_arm64_enter_exc. Describe the interrupted context so GDB can unwind.
*/
.cfi_sections .debug_frame
.cfi_startproc
.cfi_def_cfa sp, ___esf_t_SIZEOF
/* Return address (ELR_EL1) is saved at esf.sps... | arm64 | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/switch.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm64/core/switch.S | 161 | 220 |
zephyrproject-rtos/zephyr:arch/arm64/core/switch.S:6 | cmp x1, #_SVC_CALL_RUNTIME_EXCEPT
beq oops
#ifdef CONFIG_USERSPACE
cmp x1, #_SVC_CALL_SYSTEM_CALL
beq z_arm64_do_syscall
#endif
#ifdef CONFIG_IRQ_OFFLOAD
cmp x1, #_SVC_CALL_IRQ_OFFLOAD
beq offload
b inv
offload:
/*
* Retrieve provided routine and argument from the stack.
* Routine pointer is in saved x0, a... | arm64 | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/switch.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm64/core/switch.S | 201 | 258 |
zephyrproject-rtos/zephyr:arch/arm64/core/switch.S:7 | /* Exit through regular IRQ exit path */
b z_arm64_irq_done
#endif
b inv
oops:
mov x0, sp
b z_arm64_do_kernel_oops
inv:
mov x0, #0 /* K_ERR_CPU_EXCEPTION */
mov x1, sp
bl z_arm64_fatal_error
/* Return here only in case of recoverable error */
.cfi_endproc
b z_arm64_exit_exc | arm64 | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/switch.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/arm64/core/switch.S | 241 | 258 |
zephyrproject-rtos/zephyr:arch/arm64/core/switch.S:4 | msr sp_el0, x4
#else
ldr x29, [x0, #_thread_offset_to_callee_saved_x29_sp_el0]
#endif
/* Restore SP_EL1 and return address */
ldp x4, lr, [x0, #_thread_offset_to_callee_saved_sp_elx_lr]
mov sp, x4
#if defined(CONFIG_ARM64_SAFE_EXCEPTION_STACK)
/* arch_curr_cpu()->arch.current_stack_limit = thread->arch.stac... | arm64 | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/switch.S | Apache-2.0 | d1d439ca090301b7d634e83db8c35a7abc423538 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/d1d439ca090301b7d634e83db8c35a7abc423538/arch/arm64/core/switch.S | 121 | 180 |
zephyrproject-rtos/zephyr:arch/arm64/core/switch.S:5 | SECTION_FUNC(TEXT, z_arm64_sync_exc)
mrs x0, esr_el1
lsr x1, x0, #26
#ifdef CONFIG_FPU_SHARING
cmp x1, #0x07 /*Access to SIMD or floating-point */
beq fpu_sve_trap
#ifdef CONFIG_ARM64_SVE
cmp x1, #0x19 /*Trapped access to SVE functionality */
beq fpu_sve_trap
#endif
b 1f
fpu_sve_trap:
mov x0, sp /* ESF point... | arm64 | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/switch.S | Apache-2.0 | d1d439ca090301b7d634e83db8c35a7abc423538 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/d1d439ca090301b7d634e83db8c35a7abc423538/arch/arm64/core/switch.S | 161 | 220 |
zephyrproject-rtos/zephyr:arch/arm64/core/switch.S:6 | /*
* Retrieve provided routine and argument from the stack.
* Routine pointer is in saved x0, argument in saved x1
* so we load them with x1/x0 (reversed).
*/
ldp x1, x0, [sp, ___esf_t_x0_x1_OFFSET]
/* ++_current_cpu->nested to be checked by arch_is_in_isr() */
get_cpu x2
ldr w3, [x2, #___cpu_t_nested_OFFS... | arm64 | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/switch.S | Apache-2.0 | d1d439ca090301b7d634e83db8c35a7abc423538 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/d1d439ca090301b7d634e83db8c35a7abc423538/arch/arm64/core/switch.S | 201 | 244 |
zephyrproject-rtos/zephyr:arch/arm64/core/switch.S:2 | stp x21, x22, [x1, #_thread_offset_to_callee_saved_x21_x22]
stp x23, x24, [x1, #_thread_offset_to_callee_saved_x23_x24]
stp x25, x26, [x1, #_thread_offset_to_callee_saved_x25_x26]
stp x27, x28, [x1, #_thread_offset_to_callee_saved_x27_x28]
#ifndef CONFIG_ARM64_SAFE_EXCEPTION_STACK
stp x29, x4, [x1, #_thread_offset... | arm64 | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/switch.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/arm64/core/switch.S | 41 | 100 |
zephyrproject-rtos/zephyr:arch/arm64/core/switch.S:3 | dmb sy
#endif
/* save old thread into switch handle which is required by
* z_sched_switch_spin()
*/
str x1, [x1, #___thread_t_switch_handle_OFFSET]
#ifdef CONFIG_THREAD_LOCAL_STORAGE
/* Grab the TLS pointer */
ldr x2, [x0, #_thread_offset_to_tls]
/* Store in the "Thread ID" register.
* This register is u... | arm64 | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/switch.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/arm64/core/switch.S | 81 | 140 |
zephyrproject-rtos/zephyr:arch/arm64/core/switch.S:4 | ldr x2, [x0, #_thread_offset_to_stack_limit]
str x2, [x4, #_cpu_offset_to_current_stack_limit]
#endif
#if defined(CONFIG_USERSPACE) || defined(CONFIG_ARM64_STACK_PROTECTION)
str lr, [sp, #-16]!
bl z_arm64_swap_mem_domains
ldr lr, [sp], #16
#endif
#ifdef CONFIG_INSTRUMENT_THREAD_SWITCHING
str lr, [sp... | arm64 | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/switch.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/arm64/core/switch.S | 121 | 180 |
zephyrproject-rtos/zephyr:arch/arm64/core/switch.S:5 | b 1f
fpu_sve_trap:
mov x0, sp /* ESF pointer */
/* x1 already contains exception class (EC) - pass as second argument */
bl z_arm64_fpu_trap
b z_arm64_exit_exc_fpu_done
1:
#endif
cmp x1, #0x15 /* 0x15 = SVC */
bne inv
/* Demux the SVC call */
and x1, x0, #0xff
cmp x1, #_SVC_CALL_RUNTIME_EXCEPT
beq oops
#... | arm64 | intel-like | handwritten | zephyrproject-rtos/zephyr | arch/arm64/core/switch.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/arm64/core/switch.S | 161 | 220 |
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