Unnamed: 0 int64 0 350k | level_0 int64 0 351k | ApplicationNumber int64 9.75M 96.1M | ArtUnit int64 1.6k 3.99k | Abstract stringlengths 1 8.37k | Claims stringlengths 3 292k | abstract-claims stringlengths 68 293k | TechCenter int64 1.6k 3.9k |
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11,300 | 11,300 | 15,150,961 | 2,812 | Compositions of matter, compounds, articles of manufacture and processes to reduce or substantially eliminate EM and/or stress migration, and/or TDDB in copper interconnects in microelectronic devices and circuits, especially a metal liner around copper interconnects comprise an ultra thin layer or layers of Mn alloys containing at least one of W and/or Co on the metal liner. This novel alloy provides EM and/or stress migration resistance, and/or TDDB resistance in these copper interconnects, comparable to thicker layers of other alloys found in substantially larger circuits and allows the miniaturization of the circuit without having to use thicker EM and/or TDDB resistant alloys previously used thereby enhancing the miniaturization, i.e., these novel alloy layers can be miniaturized along with the circuit and provide substantially the same EM and/or TDDB resistance as thicker layers of different alloy materials previously used that lose some of their EM and/or TDDB resistance when used as thinner layers. | 1. A process comprising: (a) forming wire embedded in a dielectric layer on a semiconductor substrate, said wire comprising a copper core comprising sidewalls and a bottom of said copper core, a top surface of said wire coplanar with a top surface of said dielectric layer; (b) forming an electrically conductive alloy liner on said sidewalls based on Mn, with at least one of Co and/or W to minimize or eliminate EM and/or TDDB; (c) without exposing said substrate to oxygen, forming a dielectric liner over said alloy liner, any exposed portions of said alloy liner, and said dielectric layer. 2. The process of claim 1, wherein: (b) and (c) are performed in a same chamber of a first deposition tool without removing said substrate from said chamber; or (b) and (c) are performed in a different chamber or chambers of a second deposition tool without removing said substrate from said tool. 3. The process of claim 1, wherein said liner is formed by either selective chemical vapor deposition or selective atomic layer deposition. 4. The process of claim 1, wherein said liner comprise a Co/Mn, Co/Mn/W, W/Mn, or W/Mn/Co layer and intercalated combinations of Co/Mn/W layers as an alloy of Mn of from about 0.1 to about 20_parts by weight, Co of from about 0 to about 100_parts by weight and W of from about from about 0 to about 100 parts by weight. 5. The process of claim 4, wherein said liner comprises an ultra thin metal alloy liner from about 0.3 nm to about 1 nm thick. 6. The process of claim 1, wherein: (b), (c) and (d) are performed in a same chamber of a first deposition tool without removing said substrate from said chamber; or (b) and (d) are performed in a first chamber and (c) is performed in a third chamber of a second deposition tool; or (b), (d) and (c) are performed in different chambers of a third deposition tool. 7. The process of claim 1, further including: between (a) and (b), recessing a top surface of said copper core below said top surface of said dielectric layer. 8. The process of claim 1, further comprising conducting the process in an integrated in-situ apparatus having from about 3 to about 5 chambers including a lower chamber and conducting said deposition by means of said apparatus to deposit at least one of multilayer metals, or metal alloys or dielectrics and optionally performing a cure treatment in said lower chamber. 9-14. (canceled) 15. The process of claim 1 further comprising further downstream treatments selected from at least one of UV and Low rf stream plasma or thermal cure treatments in at least one of a reducing environment or inert gas ambient to enhance the reaction/intermixing between each layer and between the Cu-Metal alloy interface formed in the process. 16-20. (canceled) | Compositions of matter, compounds, articles of manufacture and processes to reduce or substantially eliminate EM and/or stress migration, and/or TDDB in copper interconnects in microelectronic devices and circuits, especially a metal liner around copper interconnects comprise an ultra thin layer or layers of Mn alloys containing at least one of W and/or Co on the metal liner. This novel alloy provides EM and/or stress migration resistance, and/or TDDB resistance in these copper interconnects, comparable to thicker layers of other alloys found in substantially larger circuits and allows the miniaturization of the circuit without having to use thicker EM and/or TDDB resistant alloys previously used thereby enhancing the miniaturization, i.e., these novel alloy layers can be miniaturized along with the circuit and provide substantially the same EM and/or TDDB resistance as thicker layers of different alloy materials previously used that lose some of their EM and/or TDDB resistance when used as thinner layers.1. A process comprising: (a) forming wire embedded in a dielectric layer on a semiconductor substrate, said wire comprising a copper core comprising sidewalls and a bottom of said copper core, a top surface of said wire coplanar with a top surface of said dielectric layer; (b) forming an electrically conductive alloy liner on said sidewalls based on Mn, with at least one of Co and/or W to minimize or eliminate EM and/or TDDB; (c) without exposing said substrate to oxygen, forming a dielectric liner over said alloy liner, any exposed portions of said alloy liner, and said dielectric layer. 2. The process of claim 1, wherein: (b) and (c) are performed in a same chamber of a first deposition tool without removing said substrate from said chamber; or (b) and (c) are performed in a different chamber or chambers of a second deposition tool without removing said substrate from said tool. 3. The process of claim 1, wherein said liner is formed by either selective chemical vapor deposition or selective atomic layer deposition. 4. The process of claim 1, wherein said liner comprise a Co/Mn, Co/Mn/W, W/Mn, or W/Mn/Co layer and intercalated combinations of Co/Mn/W layers as an alloy of Mn of from about 0.1 to about 20_parts by weight, Co of from about 0 to about 100_parts by weight and W of from about from about 0 to about 100 parts by weight. 5. The process of claim 4, wherein said liner comprises an ultra thin metal alloy liner from about 0.3 nm to about 1 nm thick. 6. The process of claim 1, wherein: (b), (c) and (d) are performed in a same chamber of a first deposition tool without removing said substrate from said chamber; or (b) and (d) are performed in a first chamber and (c) is performed in a third chamber of a second deposition tool; or (b), (d) and (c) are performed in different chambers of a third deposition tool. 7. The process of claim 1, further including: between (a) and (b), recessing a top surface of said copper core below said top surface of said dielectric layer. 8. The process of claim 1, further comprising conducting the process in an integrated in-situ apparatus having from about 3 to about 5 chambers including a lower chamber and conducting said deposition by means of said apparatus to deposit at least one of multilayer metals, or metal alloys or dielectrics and optionally performing a cure treatment in said lower chamber. 9-14. (canceled) 15. The process of claim 1 further comprising further downstream treatments selected from at least one of UV and Low rf stream plasma or thermal cure treatments in at least one of a reducing environment or inert gas ambient to enhance the reaction/intermixing between each layer and between the Cu-Metal alloy interface formed in the process. 16-20. (canceled) | 2,800 |
11,301 | 11,301 | 14,913,025 | 2,832 | The present invention relates to a generator control system that includes a generator, a variable displacement pump, a generator speed sensor, and a generator speed controller. The generator speed sensor generates a measurement output signal that corresponds to the speed of the generator. The generator speed controller generates a control signal that controls the displacement of the displacement pump to limit generator speed surging. The generator speed controller applying default commanded event control gain values to the control signal when a commanded change in the load or speed of the engine or generator occurs, applying uncommantled event control gain values to the control signal in the absence of a commanded change in load or speed of the engine or gen erator, and reducing the uncommanded event control gain values as needed until the magnitude of generator speed surging is less than a threshold value or until a minimum uncommanded event control gain value threshold is reached. | 1. A generator control system comprising:
a generator a variable displacement pump that drives a motor; a motor that drives the generator; a generator speed sensor that monitors the speed of the generator and generates a measurement output signal that corresponds to the speed of the generator; a generator speed controller that receives the measurement output signal from the generator speed sensor and generates a control signal that controls the displacement of the variable displacement pump, wherein:
the generator speed controller applies default commanded event control gain values to the control signal when a commanded change in the load or speed of the engine or generator occurs;
the generator speed controller applies uncommanded event control gain values to the control signal in the absence of a commanded change in load or speed of the engine or generator; and
the generator speed controller compares a magnitude of generator speed surging that results from applying the uncommanded event control gain values to a threshold value and reduces the uncommanded event control gain values as needed until the magnitude of generator speed surging is less than the threshold value or until a minimum uncommanded event control gain value threshold is reached. 2. The control system according to claim 1, wherein each reduction to the uncommanded event control gain values involves reducing the previous iteration control gain value by 10% until the magnitude of generator speed surging is less than the threshold value or until a minimum uncommanded event control gain value threshold is reached. 3. The control system according to claim 1, wherein the magnitude of generator speed surging is calculated as the average value of the absolute value of the difference between measured generator speed and a target generator speed over a time period. 4. The control system according to claim 1, wherein the magnitude of generator speed surging is calculated as the average value of the absolute value of the difference between measured generator speed and a target generator speed over a time period substantially equal to two periods of a waveform representing generator speed fluctuation. 5. The control system according to claim 1, wherein the threshold value is greater than or equal to about 6 RPMs and less than or equal to about 9 RPMs. 6. A method for controlling speed surging in a generator driven by a variable displacement pump, comprising the steps of:
using a generator speed sensor to monitor the speed of the generator and generate a measurement output signal that corresponds to the speed of the generator; using a generator speed controller to receive the measurement output signal from the generator speed sensor and generate a control signal that controls the displacement of the variable displacement pump; using the generator speed controller to apply default commanded event control gain values to the control signal when a commanded change in the load or speed of the engine or generator occurs; using the generator speed controller to apply uncommanded event control gain values to the control signal in the absence of a commanded change in load or speed of the engine or generator; and using the generator speed controller to compare a magnitude of generator speed surging that results from applying the uncommanded event control gain values to the control signal to a threshold value and to reduce the uncommanded event control gain values as needed until a magnitude of generator speed surging is less than the threshold value or until a minimum uncommanded event control gain value threshold is reached. 7. The method for controlling speed surging in a generator according to claim 6, wherein each reduction to the uncommanded event control gain values involves reducing the previous uncommanded event control gain values by 10% until the magnitude of generator speed surging is less than the threshold value or until a minimum uncommanded event control gain value threshold is reached. 8. The method for controlling speed surging in a generator according to claim 6, wherein the magnitude of generator speed surging is calculated as the average value of the absolute value of the difference between measured generator speed and a target generator speed over a time period. 9. The method for controlling speed surging in a generator according to claim 6, wherein the magnitude of generator speed surging is calculated as the average value of the absolute value of the difference between measured generator speed and a target generator speed over a time period substantially equal to two periods of a waveform representing generator speed fluctuation. 10. The method for controlling speed surging in a generator according to claim 6, wherein the threshold value is greater than or equal to about 6 RPMs and less than or equal to about 9 RPMs. | The present invention relates to a generator control system that includes a generator, a variable displacement pump, a generator speed sensor, and a generator speed controller. The generator speed sensor generates a measurement output signal that corresponds to the speed of the generator. The generator speed controller generates a control signal that controls the displacement of the displacement pump to limit generator speed surging. The generator speed controller applying default commanded event control gain values to the control signal when a commanded change in the load or speed of the engine or generator occurs, applying uncommantled event control gain values to the control signal in the absence of a commanded change in load or speed of the engine or gen erator, and reducing the uncommanded event control gain values as needed until the magnitude of generator speed surging is less than a threshold value or until a minimum uncommanded event control gain value threshold is reached.1. A generator control system comprising:
a generator a variable displacement pump that drives a motor; a motor that drives the generator; a generator speed sensor that monitors the speed of the generator and generates a measurement output signal that corresponds to the speed of the generator; a generator speed controller that receives the measurement output signal from the generator speed sensor and generates a control signal that controls the displacement of the variable displacement pump, wherein:
the generator speed controller applies default commanded event control gain values to the control signal when a commanded change in the load or speed of the engine or generator occurs;
the generator speed controller applies uncommanded event control gain values to the control signal in the absence of a commanded change in load or speed of the engine or generator; and
the generator speed controller compares a magnitude of generator speed surging that results from applying the uncommanded event control gain values to a threshold value and reduces the uncommanded event control gain values as needed until the magnitude of generator speed surging is less than the threshold value or until a minimum uncommanded event control gain value threshold is reached. 2. The control system according to claim 1, wherein each reduction to the uncommanded event control gain values involves reducing the previous iteration control gain value by 10% until the magnitude of generator speed surging is less than the threshold value or until a minimum uncommanded event control gain value threshold is reached. 3. The control system according to claim 1, wherein the magnitude of generator speed surging is calculated as the average value of the absolute value of the difference between measured generator speed and a target generator speed over a time period. 4. The control system according to claim 1, wherein the magnitude of generator speed surging is calculated as the average value of the absolute value of the difference between measured generator speed and a target generator speed over a time period substantially equal to two periods of a waveform representing generator speed fluctuation. 5. The control system according to claim 1, wherein the threshold value is greater than or equal to about 6 RPMs and less than or equal to about 9 RPMs. 6. A method for controlling speed surging in a generator driven by a variable displacement pump, comprising the steps of:
using a generator speed sensor to monitor the speed of the generator and generate a measurement output signal that corresponds to the speed of the generator; using a generator speed controller to receive the measurement output signal from the generator speed sensor and generate a control signal that controls the displacement of the variable displacement pump; using the generator speed controller to apply default commanded event control gain values to the control signal when a commanded change in the load or speed of the engine or generator occurs; using the generator speed controller to apply uncommanded event control gain values to the control signal in the absence of a commanded change in load or speed of the engine or generator; and using the generator speed controller to compare a magnitude of generator speed surging that results from applying the uncommanded event control gain values to the control signal to a threshold value and to reduce the uncommanded event control gain values as needed until a magnitude of generator speed surging is less than the threshold value or until a minimum uncommanded event control gain value threshold is reached. 7. The method for controlling speed surging in a generator according to claim 6, wherein each reduction to the uncommanded event control gain values involves reducing the previous uncommanded event control gain values by 10% until the magnitude of generator speed surging is less than the threshold value or until a minimum uncommanded event control gain value threshold is reached. 8. The method for controlling speed surging in a generator according to claim 6, wherein the magnitude of generator speed surging is calculated as the average value of the absolute value of the difference between measured generator speed and a target generator speed over a time period. 9. The method for controlling speed surging in a generator according to claim 6, wherein the magnitude of generator speed surging is calculated as the average value of the absolute value of the difference between measured generator speed and a target generator speed over a time period substantially equal to two periods of a waveform representing generator speed fluctuation. 10. The method for controlling speed surging in a generator according to claim 6, wherein the threshold value is greater than or equal to about 6 RPMs and less than or equal to about 9 RPMs. | 2,800 |
11,302 | 11,302 | 13,956,054 | 2,814 | A solid-state imaging device is provided. The solid-state imaging device includes an imaging region having a plurality of pixels arranged in a two-dimensional array, in which the imaging region includes an effective pixel and a black reference pixel; and a shape of a floating diffusion portion in the effective pixel is different from that of a floating diffusion portion in the black reference pixel. | 1.-6. (canceled) 7. A solid-state imaging device comprising:
an imaging region including a plurality of pixels arranged in a two-dimensional array, wherein the imaging region includes a plurality of effective pixels and a plurality of black reference pixels; each of the effective pixels and the black reference pixels having a photoelectric conversion portion and a floating diffusion portion; and the floating diffusion portion for the effective pixel is different in size or shape from the floating diffusion portion of the black reference pixel. 8. A solid-state imaging device according to claim 7, wherein the floating diffusion portion of the black reference pixel is smaller than that in the effective pixel. 9. A solid-state imaging device according to claim 7, wherein a shape of the photoelectric conversion portion of the effective pixel is the same as a shape of the photoelectric converting portion of the black reference pixel. 10. A solid-state imaging device according to claim 7, wherein a size of the photoelectric conversion portion of the effective pixel is the same as a size of the photoelectric converting portion of the black reference pixel. 11. A solid-state imaging device according to claim 7, wherein a surface area of the floating diffusion portion of the effective pixel area is different from that in the black reference pixel such that a sum of dark current components of the photoelectric converting portion and the floating diffusion portion in the effective pixel equals a sum of dark current components of the photoelectric converting portion and the floating diffusion portion in the black reference pixel. 12. A solid-state imaging device according to claim 7, wherein a charge in the photoelectric converting portion is prevented from being transferred to the floating diffusion portion in the black reference pixel. | A solid-state imaging device is provided. The solid-state imaging device includes an imaging region having a plurality of pixels arranged in a two-dimensional array, in which the imaging region includes an effective pixel and a black reference pixel; and a shape of a floating diffusion portion in the effective pixel is different from that of a floating diffusion portion in the black reference pixel.1.-6. (canceled) 7. A solid-state imaging device comprising:
an imaging region including a plurality of pixels arranged in a two-dimensional array, wherein the imaging region includes a plurality of effective pixels and a plurality of black reference pixels; each of the effective pixels and the black reference pixels having a photoelectric conversion portion and a floating diffusion portion; and the floating diffusion portion for the effective pixel is different in size or shape from the floating diffusion portion of the black reference pixel. 8. A solid-state imaging device according to claim 7, wherein the floating diffusion portion of the black reference pixel is smaller than that in the effective pixel. 9. A solid-state imaging device according to claim 7, wherein a shape of the photoelectric conversion portion of the effective pixel is the same as a shape of the photoelectric converting portion of the black reference pixel. 10. A solid-state imaging device according to claim 7, wherein a size of the photoelectric conversion portion of the effective pixel is the same as a size of the photoelectric converting portion of the black reference pixel. 11. A solid-state imaging device according to claim 7, wherein a surface area of the floating diffusion portion of the effective pixel area is different from that in the black reference pixel such that a sum of dark current components of the photoelectric converting portion and the floating diffusion portion in the effective pixel equals a sum of dark current components of the photoelectric converting portion and the floating diffusion portion in the black reference pixel. 12. A solid-state imaging device according to claim 7, wherein a charge in the photoelectric converting portion is prevented from being transferred to the floating diffusion portion in the black reference pixel. | 2,800 |
11,303 | 11,303 | 15,138,298 | 2,814 | A method for forming a multilevel leadframe for an integrated circuit is provided. A conductive sheet is etched from one side to form a thinner region within a frame region for leads lines and bond pads. The conductive sheet is etched to form a plurality of bond pads in a first level of the thinner region arranged in at least a first row and a second row. Each bond pad has a pad width and is separated from an adjacent bond pad by a bond pad clearance distance. The conductive sheet is etched from an opposite side to form a plurality of lead lines in a second level of the thinner region having a line width and is separated from an adjacent lead line by at least a lead line clearance distance. Each bond pad of the second plurality of bond pads is connected to one of the plurality of lead lines on the second level that is routed between adjacent bond pads in the first row, so that the lead lines are routed on a different level from the bond pads. | 1-20. (canceled) 21. A method for forming a multilevel leadframe for an integrated circuit, the method comprising:
etching a conductive sheet from one side to form a thinner region within a frame region for leads lines and bond pads; etching the conductive sheet to form a plurality of bond pads in a first level of the thinner region arranged in at least a first row and a second row, each bond pad having a pad width and being separated from an adjacent bond pad by a bond pad clearance distance; and etching the conductive sheet from an opposite side to form a plurality of lead lines in a second level of the thinner region having a line width and being separated from an adjacent lead line by at least a lead line clearance distance, wherein each bond pad of the second plurality of bond pads is connected to one of the plurality of lead lines on the second level that is routed between adjacent bond pads in the first row, so that the lead lines are routed on a different level from the bond pads. 22. The method of claim 21, wherein the bond pad clearance distance is less than twice the lead line clearance distance. 23. The method of claim 21, wherein the bond pad clearance distance approximately equal to the lead line clearance distance. 24. The method of claim 21, wherein the thinner region has a leadframe thickness, and wherein the bond pad clearance distance is approximately equal to the leadframe thickness. 25. The method of claim 21, wherein etching a conductive sheet from one side to form a thinner region also forms a die cavity within the multilevel leadframe. 26.-30. (canceled) 31. The method of claim 21, further comprising bonding the first plurality of bond pads and the second plurality of bond pads on the multilevel leadframe to a respective plurality of input/output terminals of an integrated circuit die. | A method for forming a multilevel leadframe for an integrated circuit is provided. A conductive sheet is etched from one side to form a thinner region within a frame region for leads lines and bond pads. The conductive sheet is etched to form a plurality of bond pads in a first level of the thinner region arranged in at least a first row and a second row. Each bond pad has a pad width and is separated from an adjacent bond pad by a bond pad clearance distance. The conductive sheet is etched from an opposite side to form a plurality of lead lines in a second level of the thinner region having a line width and is separated from an adjacent lead line by at least a lead line clearance distance. Each bond pad of the second plurality of bond pads is connected to one of the plurality of lead lines on the second level that is routed between adjacent bond pads in the first row, so that the lead lines are routed on a different level from the bond pads.1-20. (canceled) 21. A method for forming a multilevel leadframe for an integrated circuit, the method comprising:
etching a conductive sheet from one side to form a thinner region within a frame region for leads lines and bond pads; etching the conductive sheet to form a plurality of bond pads in a first level of the thinner region arranged in at least a first row and a second row, each bond pad having a pad width and being separated from an adjacent bond pad by a bond pad clearance distance; and etching the conductive sheet from an opposite side to form a plurality of lead lines in a second level of the thinner region having a line width and being separated from an adjacent lead line by at least a lead line clearance distance, wherein each bond pad of the second plurality of bond pads is connected to one of the plurality of lead lines on the second level that is routed between adjacent bond pads in the first row, so that the lead lines are routed on a different level from the bond pads. 22. The method of claim 21, wherein the bond pad clearance distance is less than twice the lead line clearance distance. 23. The method of claim 21, wherein the bond pad clearance distance approximately equal to the lead line clearance distance. 24. The method of claim 21, wherein the thinner region has a leadframe thickness, and wherein the bond pad clearance distance is approximately equal to the leadframe thickness. 25. The method of claim 21, wherein etching a conductive sheet from one side to form a thinner region also forms a die cavity within the multilevel leadframe. 26.-30. (canceled) 31. The method of claim 21, further comprising bonding the first plurality of bond pads and the second plurality of bond pads on the multilevel leadframe to a respective plurality of input/output terminals of an integrated circuit die. | 2,800 |
11,304 | 11,304 | 13,895,179 | 2,857 | Computational methods and systems for monitoring a petroleum reservoir are disclosed. A baseline survey is used to generate baseline data for a petroleum reservoir. Subsequent monitor surveys generate monitor data at different stages of production on the reservoir. The baseline data is reconstructed as if it was acquired at the locations of the sources and receivers of the monitor surveys, and the monitor data is reconstructed as if it was acquired at the same locations of the sources and receivers of the baseline survey. For each monitor survey, two four-dimensional (“4D”) difference data sets are generated from the baseline and monitor data and from the reconstructed data. The 4D difference data sets are combined to reduce background and produce 4D signal data that provides reliable and accurate interpretation of production activity on the reservoir. | 1. A method for monitoring a petroleum reservoir using one or more programmable computers programmed to perform the method comprising:
receiving a first monitor data set generated by a first survey of a subterranean formation that contains the petroleum reservoir; receiving a second monitor data set generated by a second survey of the subterranean formation, the second survey conducted at a different stage of production from the first survey; generating a reconstructed first monitor data set at locations of the second monitor data set; generating a reconstructed second monitor data set at locations of the first monitor data set; computing a first four-dimensional (“4D”) difference data set from the first monitor data set and the reconstructed second monitor data set; computing a second 4D difference data set from the reconstructed first monitor data set and the second monitor data set; and extracting 4D signal data common to the first and second 4D difference data sets. 2. The method of claim 1, wherein generating the reconstructed first monitor data set at locations of the second monitor data set further comprises applying interpolation and anti-leakage Fourier transforms to the first monitor data set. 3. The method of claim 1, wherein generating the reconstructed second monitor data set at locations of the first monitor data set further comprises applying interpolation and anti-leakage Fourier transforms to the second monitor data set. 4. The method of claim 1, wherein computing the first 4D difference data set further comprises computing a difference between the reconstructed first monitor data set and the second monitor data set. 5. The method of claim 1, wherein computing the second 4D difference data set further comprises computing the difference between the first monitor data set and the reconstructed second monitor data set. 6. The method of claim 1, wherein extracting the 4D signal data common to the first and second 4D difference data sets further comprises applying multi-azimuth stacking to the first and second 4D difference data sets. 7. The method of claim 1 further comprising storing the 4D signal data in one or more computer readable media. 8. The method of claim 1, wherein the first monitor data is a baseline data set generated from a baseline survey of the subterranean formation. 9. A computer system for generating four-dimensional (“4D”) signal data used to monitor production of a petroleum reservoir, the computer system comprising:
one or more processors;
one or more computer-readable media; and
a routine stored in one or more of the one or more data-storage devices and executed by the one or more processors, the routine directed to:
retrieving a first monitor data set from the one or more computer-readable media, the first monitor data set generated by a survey of a subterranean formation that contains the petroleum reservoir;
retrieving a second monitor data set from the one or more computer-readable media, the second monitor data set generated by a survey of the subterranean formation at a later stage of production on the petroleum reservoir;
generating a reconstructed first monitor data set at locations of the second monitor data set;
generating a reconstructed second monitor data set at locations of the first monitor data set;
computing two different 4D difference data sets from the first monitor data set, the reconstructed first monitor data set, the second monitor data set and the reconstructed second monitor data set; and
extracting 4D signal data common to the 4D difference data sets. 10. The system of claim 9, wherein generating the reconstructed first monitor data set at locations of the second monitor data set further comprises applying interpolation and anti-leakage Fourier transforms to the first monitor data set. 11. The system of claim 9, wherein generating the reconstructed second monitor data set at locations of the first monitor data set further comprises applying interpolation and anti-leakage Fourier transforms to the second monitor data set. 12. The system of claim 9, wherein computing two different 4D difference data sets further comprises:
computing a first 4D difference data set from the first monitor data set and the reconstructed second monitor data set; and computing a second 4D difference data set from the reconstructed first monitor data set and the second monitor data set. 13. The system of claim 12, wherein computing two different 4D difference data sets further comprises:
computing the first 4D difference data set further comprises computing the difference between the reconstructed first monitor data set and the second monitor data set; and computing the difference between the first monitor data set and the reconstructed second monitor data set. 14. The system of claim 9, wherein extracting the 4D signal data further comprises applying multi-azimuth stacking to the 4D difference data sets. 15. The system of claim 9 further comprising storing the 4D signal data in the one or more computer readable media. 16. The system of claim 9 wherein the first monitor data set is a baseline data set generated by a baseline survey of the subterranean formation. 17. A non-transitory computer-readable medium having machine-readable instructions encoded thereon for enabling one or more processors of a computer system to perform the operations of
retrieving a first monitor data set from one or more computer-readable media, the first monitor data set generated by a survey of a subterranean formation that contains the petroleum reservoir; retrieving a second monitor data set from the one or more computer-readable media, the monitor data set generated by a survey of the subterranean formation at a later stage of production on the petroleum reservoir; generating a reconstructed first monitor data set at locations of the second monitor data set; generating a reconstructed second monitor data set at locations of the first monitor data set; computing two different four-dimensional (“4D”) difference data sets from the first monitor data set, the reconstructed first monitor data set, the second monitor data set, and the reconstructed second monitor data set; and extracting 4D signal data common to the 4D difference data sets. 18. The medium of claim 17, wherein generating the reconstructed first monitor data set at locations of the second monitor data set further comprises applying interpolation and anti-leakage Fourier transforms to the first monitor data set. 19. The medium of claim 17, wherein generating the reconstructed second monitor data set at locations of the first monitor data set further comprises applying interpolation and anti-leakage Fourier transforms to the monitor data set. 20. The medium of claim 17, wherein generating two different four-dimensional (“4D”) difference data sets further comprises:
computing a first four-dimensional (“4D”) difference data set from the first monitor data set and the reconstructed second monitor data set; and
computing a second 4D difference data set from the reconstructed first monitor data set and the second monitor data set. 21. The medium of claim 20, wherein computing the first 4D difference data set further comprises computing the difference between the reconstructed first monitor data set and the second monitor data set. 22. The medium of claim 20, wherein computing the second 4D difference data set further comprises computing the difference between the first monitor data set and the reconstructed second monitor data set. 23. The medium of claim 17, wherein extracting the 4D signal data common further comprises applying multi-azimuth stacking to the 4D difference data sets. 24. The medium of claim 17 wherein the first monitor data set is a baseline data set generated by a baseline survey of the subterranean formation. 25. A method for generating a geophysical data product, the method comprising:
processing monitor data sets using a programmable computer that is programmed to generate the geophysical data product, wherein the processing includes
retrieving a first monitor data set from one or more computer-readable media;
retrieving a second monitor data set from the one or more computer-readable media;
generating a reconstructed first monitor data set at locations of a second monitor data set;
generating a reconstructed second monitor data set at locations of the first monitor data set;
computing two different four-dimensional (“4D”) difference data sets from the first monitor data set, the reconstructed first monitor data set, the second monitor data set and the reconstructed second monitor data set; and
extracting 4D signal data common to the 4D difference data sets. 26. The method of claim 25, wherein the first monitor data set is generated by a baseline survey of a subterranean formation that contains a petroleum reservoir. 27. The method of claim 25, wherein reconstructing the first monitor data set at locations of the second monitor data set further comprises applying interpolation and anti-leakage Fourier transforms to the first monitor data set. 28. The method of claim 25, wherein reconstructing the second monitor data set at locations of the first monitor data set further comprises applying interpolation and anti-leakage Fourier transforms to the second monitor data set. 29. The method of claim 25, wherein generating two different 4D difference data sets further comprises:
computing a first 4D difference data set from the first monitor data set and the reconstructed second monitor data set; and computing a second 4D difference data set from the reconstructed first monitor data set and the second monitor data set. 30. The method of claim 29, wherein
computing the first 4D difference data set further comprises computing the difference between the reconstructed first monitor data set and the second monitor data set, and computing the second 4D difference data set further comprises computing the difference between the first monitor data set and the reconstructed second monitor data set. 31. The method of claim 25, wherein extracting the 4D signal data common further comprises applying multi-azimuth stacking to the 4D difference data sets. | Computational methods and systems for monitoring a petroleum reservoir are disclosed. A baseline survey is used to generate baseline data for a petroleum reservoir. Subsequent monitor surveys generate monitor data at different stages of production on the reservoir. The baseline data is reconstructed as if it was acquired at the locations of the sources and receivers of the monitor surveys, and the monitor data is reconstructed as if it was acquired at the same locations of the sources and receivers of the baseline survey. For each monitor survey, two four-dimensional (“4D”) difference data sets are generated from the baseline and monitor data and from the reconstructed data. The 4D difference data sets are combined to reduce background and produce 4D signal data that provides reliable and accurate interpretation of production activity on the reservoir.1. A method for monitoring a petroleum reservoir using one or more programmable computers programmed to perform the method comprising:
receiving a first monitor data set generated by a first survey of a subterranean formation that contains the petroleum reservoir; receiving a second monitor data set generated by a second survey of the subterranean formation, the second survey conducted at a different stage of production from the first survey; generating a reconstructed first monitor data set at locations of the second monitor data set; generating a reconstructed second monitor data set at locations of the first monitor data set; computing a first four-dimensional (“4D”) difference data set from the first monitor data set and the reconstructed second monitor data set; computing a second 4D difference data set from the reconstructed first monitor data set and the second monitor data set; and extracting 4D signal data common to the first and second 4D difference data sets. 2. The method of claim 1, wherein generating the reconstructed first monitor data set at locations of the second monitor data set further comprises applying interpolation and anti-leakage Fourier transforms to the first monitor data set. 3. The method of claim 1, wherein generating the reconstructed second monitor data set at locations of the first monitor data set further comprises applying interpolation and anti-leakage Fourier transforms to the second monitor data set. 4. The method of claim 1, wherein computing the first 4D difference data set further comprises computing a difference between the reconstructed first monitor data set and the second monitor data set. 5. The method of claim 1, wherein computing the second 4D difference data set further comprises computing the difference between the first monitor data set and the reconstructed second monitor data set. 6. The method of claim 1, wherein extracting the 4D signal data common to the first and second 4D difference data sets further comprises applying multi-azimuth stacking to the first and second 4D difference data sets. 7. The method of claim 1 further comprising storing the 4D signal data in one or more computer readable media. 8. The method of claim 1, wherein the first monitor data is a baseline data set generated from a baseline survey of the subterranean formation. 9. A computer system for generating four-dimensional (“4D”) signal data used to monitor production of a petroleum reservoir, the computer system comprising:
one or more processors;
one or more computer-readable media; and
a routine stored in one or more of the one or more data-storage devices and executed by the one or more processors, the routine directed to:
retrieving a first monitor data set from the one or more computer-readable media, the first monitor data set generated by a survey of a subterranean formation that contains the petroleum reservoir;
retrieving a second monitor data set from the one or more computer-readable media, the second monitor data set generated by a survey of the subterranean formation at a later stage of production on the petroleum reservoir;
generating a reconstructed first monitor data set at locations of the second monitor data set;
generating a reconstructed second monitor data set at locations of the first monitor data set;
computing two different 4D difference data sets from the first monitor data set, the reconstructed first monitor data set, the second monitor data set and the reconstructed second monitor data set; and
extracting 4D signal data common to the 4D difference data sets. 10. The system of claim 9, wherein generating the reconstructed first monitor data set at locations of the second monitor data set further comprises applying interpolation and anti-leakage Fourier transforms to the first monitor data set. 11. The system of claim 9, wherein generating the reconstructed second monitor data set at locations of the first monitor data set further comprises applying interpolation and anti-leakage Fourier transforms to the second monitor data set. 12. The system of claim 9, wherein computing two different 4D difference data sets further comprises:
computing a first 4D difference data set from the first monitor data set and the reconstructed second monitor data set; and computing a second 4D difference data set from the reconstructed first monitor data set and the second monitor data set. 13. The system of claim 12, wherein computing two different 4D difference data sets further comprises:
computing the first 4D difference data set further comprises computing the difference between the reconstructed first monitor data set and the second monitor data set; and computing the difference between the first monitor data set and the reconstructed second monitor data set. 14. The system of claim 9, wherein extracting the 4D signal data further comprises applying multi-azimuth stacking to the 4D difference data sets. 15. The system of claim 9 further comprising storing the 4D signal data in the one or more computer readable media. 16. The system of claim 9 wherein the first monitor data set is a baseline data set generated by a baseline survey of the subterranean formation. 17. A non-transitory computer-readable medium having machine-readable instructions encoded thereon for enabling one or more processors of a computer system to perform the operations of
retrieving a first monitor data set from one or more computer-readable media, the first monitor data set generated by a survey of a subterranean formation that contains the petroleum reservoir; retrieving a second monitor data set from the one or more computer-readable media, the monitor data set generated by a survey of the subterranean formation at a later stage of production on the petroleum reservoir; generating a reconstructed first monitor data set at locations of the second monitor data set; generating a reconstructed second monitor data set at locations of the first monitor data set; computing two different four-dimensional (“4D”) difference data sets from the first monitor data set, the reconstructed first monitor data set, the second monitor data set, and the reconstructed second monitor data set; and extracting 4D signal data common to the 4D difference data sets. 18. The medium of claim 17, wherein generating the reconstructed first monitor data set at locations of the second monitor data set further comprises applying interpolation and anti-leakage Fourier transforms to the first monitor data set. 19. The medium of claim 17, wherein generating the reconstructed second monitor data set at locations of the first monitor data set further comprises applying interpolation and anti-leakage Fourier transforms to the monitor data set. 20. The medium of claim 17, wherein generating two different four-dimensional (“4D”) difference data sets further comprises:
computing a first four-dimensional (“4D”) difference data set from the first monitor data set and the reconstructed second monitor data set; and
computing a second 4D difference data set from the reconstructed first monitor data set and the second monitor data set. 21. The medium of claim 20, wherein computing the first 4D difference data set further comprises computing the difference between the reconstructed first monitor data set and the second monitor data set. 22. The medium of claim 20, wherein computing the second 4D difference data set further comprises computing the difference between the first monitor data set and the reconstructed second monitor data set. 23. The medium of claim 17, wherein extracting the 4D signal data common further comprises applying multi-azimuth stacking to the 4D difference data sets. 24. The medium of claim 17 wherein the first monitor data set is a baseline data set generated by a baseline survey of the subterranean formation. 25. A method for generating a geophysical data product, the method comprising:
processing monitor data sets using a programmable computer that is programmed to generate the geophysical data product, wherein the processing includes
retrieving a first monitor data set from one or more computer-readable media;
retrieving a second monitor data set from the one or more computer-readable media;
generating a reconstructed first monitor data set at locations of a second monitor data set;
generating a reconstructed second monitor data set at locations of the first monitor data set;
computing two different four-dimensional (“4D”) difference data sets from the first monitor data set, the reconstructed first monitor data set, the second monitor data set and the reconstructed second monitor data set; and
extracting 4D signal data common to the 4D difference data sets. 26. The method of claim 25, wherein the first monitor data set is generated by a baseline survey of a subterranean formation that contains a petroleum reservoir. 27. The method of claim 25, wherein reconstructing the first monitor data set at locations of the second monitor data set further comprises applying interpolation and anti-leakage Fourier transforms to the first monitor data set. 28. The method of claim 25, wherein reconstructing the second monitor data set at locations of the first monitor data set further comprises applying interpolation and anti-leakage Fourier transforms to the second monitor data set. 29. The method of claim 25, wherein generating two different 4D difference data sets further comprises:
computing a first 4D difference data set from the first monitor data set and the reconstructed second monitor data set; and computing a second 4D difference data set from the reconstructed first monitor data set and the second monitor data set. 30. The method of claim 29, wherein
computing the first 4D difference data set further comprises computing the difference between the reconstructed first monitor data set and the second monitor data set, and computing the second 4D difference data set further comprises computing the difference between the first monitor data set and the reconstructed second monitor data set. 31. The method of claim 25, wherein extracting the 4D signal data common further comprises applying multi-azimuth stacking to the 4D difference data sets. | 2,800 |
11,305 | 11,305 | 15,669,109 | 2,887 | Systems and processes may provide for commerce at a fuel dispenser. In one general aspect, a system and process at a fuel dispenser may have the ability to present a user interface including data regarding at least one merchant remote from the fuel dispenser's fueling facility and to determine if ordering data corresponding to the remote merchant has been received. If ordering data corresponding to the remote merchant has been received, the system and process may have the ability to present a user interface regarding payment data. The system and process may also have the ability to determine if payment data has been received and, if payment data has been received, generate a message regarding the ordering data for a remote merchant computer. | 1. A fuel dispenser comprising:
a dispenser manager configured for internal mounting within the fuel dispenser and operable, during a fueling session, to create fueling session data, the dispenser manager comprising a communications interface; a user interface device capable of detecting user instructions, the user interface device being operable to exchange information regarding the detected user instructions with the dispenser manager during a fueling session; a point-of-sale module resident on the dispenser manager, the point-of-sale module being operable full time in a stand-alone mode to generate commands to authorize payment for a fuel-dispensing request in response to the detected user instructions; a display operatively coupled to the dispenser manager through the communications interface, wherein the dispenser manager is operable to output at least a portion of the fueling session data to create a visual representation on the display; and a fuel controller operatively coupled to the dispenser manager through the communications interface and operable to manage one or more fuel transfer components, the dispenser manager being operable to exchange fueling commands and status data with the fuel controller during the fueling session. 2. The fuel dispenser according to claim 1, wherein the point-of-sale module is operable to process credit card transactions. 3. The fuel dispenser according to claim 1, wherein the point-of-sale module is operable to access a database resident in the fuel dispenser that comprises at least one or more of fuel prices, payment authorization information, and pump operational rules. 4. The fuel dispenser according to claim 1, wherein the point-of-sale module is operable to access a database resident in the fuel dispenser that comprises at least one or more of customer instructional prompts for display, fueling session data for display, advertisement information for display, and uniform resource locator links. 5. The fuel dispenser according to claim 1, wherein the point-of-sale module is operable to access a database resident in the fuel dispenser that comprises at least one or more of completed transaction logs and error logs. 6. The fuel dispenser according to claim 5, wherein the point-of-sale module is operable to perform at least one of transaction logging and credit card processing. 7. The fuel dispenser according to claim 1, wherein the point-of-sale module is operable to access a first database resident in the fuel dispenser that comprises at least one or more of completed transactions logs and error logs, a second database resident in the fuel dispenser that comprises at least one or more of fuel prices, payment authorization information, and pump operational rules, and a third database resident in the fuel dispenser that comprises at least one or more of customer instructional prompts for display, fueling session data for display, advertisement information for display, and uniform resource locator links. 8. The fuel dispenser according to claim 1, wherein the dispenser manager is operable to communicate, through the communications interface, with remote dispenser processing equipment that is not co-located within the fuel dispenser. 9. The fuel dispenser according to claim 1, wherein the fuel transfer components comprise one or more of fuel pumps and fuel valves. 10. The fuel dispenser according to claim 1, wherein the point-of-sale module operates independent of any communication link to a point-of-sale device that is external to the fuel dispenser such that the point-of-sale module is configured to authorize payments for all fuel-dispensing requests. 11. The fuel dispenser according to claim 1, wherein, in response to the point-of-sale module authorizing the payment, the dispenser manager is configured to allow the fuel controller to cause fuel to be dispensed through operation of the one or more fuel transfer components. 12. A fuel dispenser comprising:
a dispenser manager configured for internal mounting within the fuel dispenser and operable, during a fueling session, to create fueling session data, the dispenser manager comprising a communications interface; a user interface device capable of detecting user instructions for fuel-dispensing, the user interface device being operable to exchange information regarding the detected user instructions with the dispenser manager during the fueling session; and a point-of-sale module resident on the dispenser manager, the point-of-sale module being operable to generate commands to control the dispenser manager for each detected user instruction for fuel dispensing; a display operatively coupled to the dispenser manager through the communications interface, wherein the dispenser manager is operable to output at least a portion of the fueling session data to create a visual representation on the display; and a fuel controller operatively coupled to the dispenser manager through the communications interface and operable to manage one or more fuel transfer components, the dispenser manager being operable to exchange fueling commands and status data with the fuel controller during the fueling session 13. The fuel dispenser according to claim 12, wherein the point-of-sale module is operable to process credit card transactions. 14. The fuel dispenser according to claim 12, wherein the point-of-sale module is operable to access a database resident in the fuel dispenser that comprises at least one or more of fuel prices, payment authorization information, and pump operational rules. 15. The fuel dispenser according to claim 12, wherein the point-of-sale module is operable to access a database resident in the fuel dispenser that comprises at least one or more of customer instructional prompts for display, fueling session data for display, advertisement information for display, and uniform resource locator links. 16. The fuel dispenser according to claim 12, wherein the point-of-sale module is operable to access a database resident in the fuel dispenser that comprises at least one or more of completed transaction logs and error logs. 17. The fuel dispenser according to claim 16, wherein the point-of-sale module is operable to perform at least one of transaction logging and credit card processing. 18. The fuel dispenser according to claim 12, wherein the point-of-sale module is operable to access a first database resident in the fuel dispenser that comprises at least one or more of completed transactions logs and error logs, a second database resident in the fuel dispenser that comprises at least one or more of fuel prices, payment authorization information, and pump operational rules, and a third database resident in the fuel dispenser that comprises at least one or more of customer instructional prompts for display, fueling session data for display, advertisement information for display, and uniform resource locator links. 19. The fuel dispenser according to claim 12, wherein the dispenser manager is operable to communicate, through the communications interface, diagnostic information to remote dispenser processing equipment that is not co-located with the fuel dispenser. 20. The fuel dispenser according to claim 12, wherein the fuel transfer components comprise one or more of fuel pumps and fuel valves. 21. The fuel dispenser according to claim 12, wherein the point-of-sale module is operable to operate independent of any communication link to a point-of-sale device that is external to the fuel dispenser such that the point-of-sale module is configured to authorize payments for each detected user instruction for fuel dispensing. | Systems and processes may provide for commerce at a fuel dispenser. In one general aspect, a system and process at a fuel dispenser may have the ability to present a user interface including data regarding at least one merchant remote from the fuel dispenser's fueling facility and to determine if ordering data corresponding to the remote merchant has been received. If ordering data corresponding to the remote merchant has been received, the system and process may have the ability to present a user interface regarding payment data. The system and process may also have the ability to determine if payment data has been received and, if payment data has been received, generate a message regarding the ordering data for a remote merchant computer.1. A fuel dispenser comprising:
a dispenser manager configured for internal mounting within the fuel dispenser and operable, during a fueling session, to create fueling session data, the dispenser manager comprising a communications interface; a user interface device capable of detecting user instructions, the user interface device being operable to exchange information regarding the detected user instructions with the dispenser manager during a fueling session; a point-of-sale module resident on the dispenser manager, the point-of-sale module being operable full time in a stand-alone mode to generate commands to authorize payment for a fuel-dispensing request in response to the detected user instructions; a display operatively coupled to the dispenser manager through the communications interface, wherein the dispenser manager is operable to output at least a portion of the fueling session data to create a visual representation on the display; and a fuel controller operatively coupled to the dispenser manager through the communications interface and operable to manage one or more fuel transfer components, the dispenser manager being operable to exchange fueling commands and status data with the fuel controller during the fueling session. 2. The fuel dispenser according to claim 1, wherein the point-of-sale module is operable to process credit card transactions. 3. The fuel dispenser according to claim 1, wherein the point-of-sale module is operable to access a database resident in the fuel dispenser that comprises at least one or more of fuel prices, payment authorization information, and pump operational rules. 4. The fuel dispenser according to claim 1, wherein the point-of-sale module is operable to access a database resident in the fuel dispenser that comprises at least one or more of customer instructional prompts for display, fueling session data for display, advertisement information for display, and uniform resource locator links. 5. The fuel dispenser according to claim 1, wherein the point-of-sale module is operable to access a database resident in the fuel dispenser that comprises at least one or more of completed transaction logs and error logs. 6. The fuel dispenser according to claim 5, wherein the point-of-sale module is operable to perform at least one of transaction logging and credit card processing. 7. The fuel dispenser according to claim 1, wherein the point-of-sale module is operable to access a first database resident in the fuel dispenser that comprises at least one or more of completed transactions logs and error logs, a second database resident in the fuel dispenser that comprises at least one or more of fuel prices, payment authorization information, and pump operational rules, and a third database resident in the fuel dispenser that comprises at least one or more of customer instructional prompts for display, fueling session data for display, advertisement information for display, and uniform resource locator links. 8. The fuel dispenser according to claim 1, wherein the dispenser manager is operable to communicate, through the communications interface, with remote dispenser processing equipment that is not co-located within the fuel dispenser. 9. The fuel dispenser according to claim 1, wherein the fuel transfer components comprise one or more of fuel pumps and fuel valves. 10. The fuel dispenser according to claim 1, wherein the point-of-sale module operates independent of any communication link to a point-of-sale device that is external to the fuel dispenser such that the point-of-sale module is configured to authorize payments for all fuel-dispensing requests. 11. The fuel dispenser according to claim 1, wherein, in response to the point-of-sale module authorizing the payment, the dispenser manager is configured to allow the fuel controller to cause fuel to be dispensed through operation of the one or more fuel transfer components. 12. A fuel dispenser comprising:
a dispenser manager configured for internal mounting within the fuel dispenser and operable, during a fueling session, to create fueling session data, the dispenser manager comprising a communications interface; a user interface device capable of detecting user instructions for fuel-dispensing, the user interface device being operable to exchange information regarding the detected user instructions with the dispenser manager during the fueling session; and a point-of-sale module resident on the dispenser manager, the point-of-sale module being operable to generate commands to control the dispenser manager for each detected user instruction for fuel dispensing; a display operatively coupled to the dispenser manager through the communications interface, wherein the dispenser manager is operable to output at least a portion of the fueling session data to create a visual representation on the display; and a fuel controller operatively coupled to the dispenser manager through the communications interface and operable to manage one or more fuel transfer components, the dispenser manager being operable to exchange fueling commands and status data with the fuel controller during the fueling session 13. The fuel dispenser according to claim 12, wherein the point-of-sale module is operable to process credit card transactions. 14. The fuel dispenser according to claim 12, wherein the point-of-sale module is operable to access a database resident in the fuel dispenser that comprises at least one or more of fuel prices, payment authorization information, and pump operational rules. 15. The fuel dispenser according to claim 12, wherein the point-of-sale module is operable to access a database resident in the fuel dispenser that comprises at least one or more of customer instructional prompts for display, fueling session data for display, advertisement information for display, and uniform resource locator links. 16. The fuel dispenser according to claim 12, wherein the point-of-sale module is operable to access a database resident in the fuel dispenser that comprises at least one or more of completed transaction logs and error logs. 17. The fuel dispenser according to claim 16, wherein the point-of-sale module is operable to perform at least one of transaction logging and credit card processing. 18. The fuel dispenser according to claim 12, wherein the point-of-sale module is operable to access a first database resident in the fuel dispenser that comprises at least one or more of completed transactions logs and error logs, a second database resident in the fuel dispenser that comprises at least one or more of fuel prices, payment authorization information, and pump operational rules, and a third database resident in the fuel dispenser that comprises at least one or more of customer instructional prompts for display, fueling session data for display, advertisement information for display, and uniform resource locator links. 19. The fuel dispenser according to claim 12, wherein the dispenser manager is operable to communicate, through the communications interface, diagnostic information to remote dispenser processing equipment that is not co-located with the fuel dispenser. 20. The fuel dispenser according to claim 12, wherein the fuel transfer components comprise one or more of fuel pumps and fuel valves. 21. The fuel dispenser according to claim 12, wherein the point-of-sale module is operable to operate independent of any communication link to a point-of-sale device that is external to the fuel dispenser such that the point-of-sale module is configured to authorize payments for each detected user instruction for fuel dispensing. | 2,800 |
11,306 | 11,306 | 14,535,756 | 2,812 | Systems, methods, and other embodiments associated with synchronizing consumption data are described. In one embodiment, a method includes determining when a first consumption data of a first type and a second consumption data of a second type, derived from a same consumption meter, are unsynchronized with each other. The example method also includes synchronizing the first consumption data with the second consumption data when the two types of data are determined to be unsynchronized with each other. | 1. A computer-implemented method comprising:
reading, by a meter data management tool, at least one data structure comprising first consumption data and second consumption data derived from a consumption meter; determining, by the meter data management tool, when the first consumption data and the second consumption data are unsynchronized with each other; synchronizing, by the meter data management tool, the first consumption data with the second consumption data when the determining indicates that the first consumption data and the second consumption data are unsynchronized with each other; and outputting, by the meter data management tool, synchronized first consumption data and synchronized second consumption data to at least one data structure. 2. The computer-implemented method of claim 1, wherein the first consumption data and the second consumption data are unsynchronized with each other when a difference between a total consumption value of the first consumption data and a total consumption value of the second consumption data, over a same determined period of time, is greater than a determined threshold value. 3. The computer-implemented method of claim 1, wherein the synchronizing comprises adjusting at least one of the first consumption data and the second consumption data to match a total consumption value of the first consumption data with a total consumption value of the second consumption data over a determined period of time. 4. The computer-implemented method of claim 1, wherein the first consumption data comprises register consumption data, and the second consumption data comprises interval consumption data distributed over a plurality of consumption time intervals. 5. The computer-implemented method of claim 1, further comprising identifying and filling in gaps in the second consumption data, by the meter data management tool, based at least in part on interpolating the second consumption data. 6. The computer-implemented method of claim 1, further comprising identifying and filling in gaps in the second consumption data, by the meter data management tool, by applying a set of predetermined rules to the second consumption data based, at least in part, on the first consumption data. 7. The computer-implemented method of claim 1, wherein the second consumption data comprises interval consumption data distributed over a plurality of consumption time intervals, and wherein the synchronizing comprises adjusting the interval consumption data for each consumption time interval of the plurality of consumption time intervals to make a total consumption value of the second consumption data match a total consumption value of the first consumption data over a determined period of time. 8. The computer-implemented method of claim 1, further comprising evenly extrapolating, by the meter data management tool, the first consumption data across a plurality of consumption time periods associated with the second consumption data. 9. The computer-implemented method of claim 1, further comprising unevenly extrapolating, by the meter data management tool, the first consumption data across a plurality of consumption time periods associated with the second consumption data based on at least a determined profile. 10. The computer-implemented method of claim 1, further comprising billing a customer associated with the consumption meter based, at least in part, on a total consumption value of at least one of the synchronized first consumption data and the synchronized second consumption data. 11. A computing system, comprising:
data loading and validation logic configured to:
(i) read at least one data structure comprising primary consumption data and secondary consumption data derived from a same consumption meter,
(ii) pre-process at least one of the primary consumption data and the secondary consumption data to put in a form that is compatible with a data synchronization process, and
(iii) determine when the primary consumption data and the secondary consumption data are unsynchronized with each other;
data synchronization logic configured to synchronize the primary consumption data with the secondary consumption data by performing the data synchronization process; and data output logic configured to output the synchronized primary consumption data and secondary consumption data to at least one data structure of a database device. 12. The computing system of claim 11, further comprising rule configuration logic configured to facilitate user generation of rules to be applied by at least the data synchronization logic and the data loading and validation logic. 13. The computing system of claim 11, wherein the synchronization logic is configured to adjust at least one of the primary consumption data and the secondary consumption data to match a total consumption value of the primary consumption data with a total consumption value of the secondary consumption data over a determined period of time. 14. The computing system of claim 11, wherein the synchronization logic is configured to synchronize the primary consumption data with the secondary consumption data by:
(i) extrapolating the primary consumption data across a plurality of consumption time periods associated with the secondary consumption data, and (ii) adjusting the secondary consumption data, for at least one consumption time period of the plurality of consumption time periods, based on, at least in part, the extrapolated primary consumption data such that a total consumption value of the adjusted secondary consumption data matches a total consumption value of the extrapolated primary consumption data over a determined period of time. 15. The computing system of claim 11, wherein the primary consumption data comprises register consumption data, and the secondary consumption data comprises interval consumption data distributed over a plurality of consumption time intervals. 16. A non-transitory computer-readable medium storing computer-executable instructions that are part of an algorithm that, when executed by a computer, cause the computer to perform a method, wherein the instructions comprise instructions configured for:
reading at least one data structure comprising register data and interval data derived from a consumption meter; determining when the register data and the interval data are unsynchronized with each other; and synchronizing the register data with the interval data, when the register data and the interval data are determined to be unsynchronized with each other, by performing a data synchronization process that matches a total consumption value of the interval data with a total consumption value of the register data. 17. The non-transitory computer-readable medium of claim 16, wherein the instructions further comprise instructions configured for outputting the synchronized register data and interval data to at least one data structure of a database device. 18. The non-transitory computer-readable medium of claim 16, wherein the instructions for determining comprise instructions configured for calculating a difference between the total consumption value of the register data and the total consumption value of the interval data, over a same determined time period, that is greater than a determined threshold value. 19. The non-transitory computer-readable medium of claim 16, wherein the instructions for synchronizing comprise instructions configured for adjusting the interval data until a difference between the total consumption value of the register data and the total consumption value of the interval data, over a same determined time period, is less than a determined threshold value. 20. The non-transitory computer-readable medium of claim 16, wherein the instructions further comprise instructions configured for pre-processing at least one of the register data and the interval data, before determining when the register data and the interval data are unsynchronized, to put at least one of the register data and the interval data in a form that is compatible with the data synchronization process. | Systems, methods, and other embodiments associated with synchronizing consumption data are described. In one embodiment, a method includes determining when a first consumption data of a first type and a second consumption data of a second type, derived from a same consumption meter, are unsynchronized with each other. The example method also includes synchronizing the first consumption data with the second consumption data when the two types of data are determined to be unsynchronized with each other.1. A computer-implemented method comprising:
reading, by a meter data management tool, at least one data structure comprising first consumption data and second consumption data derived from a consumption meter; determining, by the meter data management tool, when the first consumption data and the second consumption data are unsynchronized with each other; synchronizing, by the meter data management tool, the first consumption data with the second consumption data when the determining indicates that the first consumption data and the second consumption data are unsynchronized with each other; and outputting, by the meter data management tool, synchronized first consumption data and synchronized second consumption data to at least one data structure. 2. The computer-implemented method of claim 1, wherein the first consumption data and the second consumption data are unsynchronized with each other when a difference between a total consumption value of the first consumption data and a total consumption value of the second consumption data, over a same determined period of time, is greater than a determined threshold value. 3. The computer-implemented method of claim 1, wherein the synchronizing comprises adjusting at least one of the first consumption data and the second consumption data to match a total consumption value of the first consumption data with a total consumption value of the second consumption data over a determined period of time. 4. The computer-implemented method of claim 1, wherein the first consumption data comprises register consumption data, and the second consumption data comprises interval consumption data distributed over a plurality of consumption time intervals. 5. The computer-implemented method of claim 1, further comprising identifying and filling in gaps in the second consumption data, by the meter data management tool, based at least in part on interpolating the second consumption data. 6. The computer-implemented method of claim 1, further comprising identifying and filling in gaps in the second consumption data, by the meter data management tool, by applying a set of predetermined rules to the second consumption data based, at least in part, on the first consumption data. 7. The computer-implemented method of claim 1, wherein the second consumption data comprises interval consumption data distributed over a plurality of consumption time intervals, and wherein the synchronizing comprises adjusting the interval consumption data for each consumption time interval of the plurality of consumption time intervals to make a total consumption value of the second consumption data match a total consumption value of the first consumption data over a determined period of time. 8. The computer-implemented method of claim 1, further comprising evenly extrapolating, by the meter data management tool, the first consumption data across a plurality of consumption time periods associated with the second consumption data. 9. The computer-implemented method of claim 1, further comprising unevenly extrapolating, by the meter data management tool, the first consumption data across a plurality of consumption time periods associated with the second consumption data based on at least a determined profile. 10. The computer-implemented method of claim 1, further comprising billing a customer associated with the consumption meter based, at least in part, on a total consumption value of at least one of the synchronized first consumption data and the synchronized second consumption data. 11. A computing system, comprising:
data loading and validation logic configured to:
(i) read at least one data structure comprising primary consumption data and secondary consumption data derived from a same consumption meter,
(ii) pre-process at least one of the primary consumption data and the secondary consumption data to put in a form that is compatible with a data synchronization process, and
(iii) determine when the primary consumption data and the secondary consumption data are unsynchronized with each other;
data synchronization logic configured to synchronize the primary consumption data with the secondary consumption data by performing the data synchronization process; and data output logic configured to output the synchronized primary consumption data and secondary consumption data to at least one data structure of a database device. 12. The computing system of claim 11, further comprising rule configuration logic configured to facilitate user generation of rules to be applied by at least the data synchronization logic and the data loading and validation logic. 13. The computing system of claim 11, wherein the synchronization logic is configured to adjust at least one of the primary consumption data and the secondary consumption data to match a total consumption value of the primary consumption data with a total consumption value of the secondary consumption data over a determined period of time. 14. The computing system of claim 11, wherein the synchronization logic is configured to synchronize the primary consumption data with the secondary consumption data by:
(i) extrapolating the primary consumption data across a plurality of consumption time periods associated with the secondary consumption data, and (ii) adjusting the secondary consumption data, for at least one consumption time period of the plurality of consumption time periods, based on, at least in part, the extrapolated primary consumption data such that a total consumption value of the adjusted secondary consumption data matches a total consumption value of the extrapolated primary consumption data over a determined period of time. 15. The computing system of claim 11, wherein the primary consumption data comprises register consumption data, and the secondary consumption data comprises interval consumption data distributed over a plurality of consumption time intervals. 16. A non-transitory computer-readable medium storing computer-executable instructions that are part of an algorithm that, when executed by a computer, cause the computer to perform a method, wherein the instructions comprise instructions configured for:
reading at least one data structure comprising register data and interval data derived from a consumption meter; determining when the register data and the interval data are unsynchronized with each other; and synchronizing the register data with the interval data, when the register data and the interval data are determined to be unsynchronized with each other, by performing a data synchronization process that matches a total consumption value of the interval data with a total consumption value of the register data. 17. The non-transitory computer-readable medium of claim 16, wherein the instructions further comprise instructions configured for outputting the synchronized register data and interval data to at least one data structure of a database device. 18. The non-transitory computer-readable medium of claim 16, wherein the instructions for determining comprise instructions configured for calculating a difference between the total consumption value of the register data and the total consumption value of the interval data, over a same determined time period, that is greater than a determined threshold value. 19. The non-transitory computer-readable medium of claim 16, wherein the instructions for synchronizing comprise instructions configured for adjusting the interval data until a difference between the total consumption value of the register data and the total consumption value of the interval data, over a same determined time period, is less than a determined threshold value. 20. The non-transitory computer-readable medium of claim 16, wherein the instructions further comprise instructions configured for pre-processing at least one of the register data and the interval data, before determining when the register data and the interval data are unsynchronized, to put at least one of the register data and the interval data in a form that is compatible with the data synchronization process. | 2,800 |
11,307 | 11,307 | 14,578,302 | 2,853 | An apparatus and method for providing rewritable printing by utilizing nanoparticles at the printing plate to reduce power requirements for imaging modules in a variable data lithography system is provided. The disclosed embodiments propose a printing plate surface that is made up of an elastomer and incorporates engineered nanoparticles that have high optical absorption properties to improve ablation performance. The exact material, composition and geometry of the engineered nanoparticles are optimized for the specified imaging module without altering plate properties. The apparatus and method use electromagnetic radiation coupled with a nano-filler to locally apply heat to a dampening solution on the printing plate to form a latent image. The nanoparticles do not undergo a physical or chemical change beyond heating up. | 1. An imaging member for disposition within a variable data lithography system, comprising:
a plate layer having on one face thereof a matrix layer with plasmonic nanoparticles embedded at or below the surface of the matrix layer, wherein said plasmonic nanoparticles generate heat when exposed to an incident wavelength of electromagnetic radiation; an arbitrarily reimageable surface layer formed by a dampening solution disposed over said plate layer; wherein the plasmonic nanoparticles at said plate layer are in thermal contact with said arbitrarily reimageable surface layer; wherein the electromagnetic radiation and the heat from the plasmonic nanoparticles selectively remove portions of the dampening solution so as to produce a latent image on the plate layer; wherein the plasmonic nanoparticles have a controlled shape to efficiently absorb light at the same frequency as the electromagnetic radiation in the variable data lithography system; wherein the controlled shape has a physical size that is smaller than the wavelength of the electromagnetic radiation; wherein the plasmonic nanoparticles are encapsulated to provide an insulating barrier and to prevent direct contact between particles. 2. (canceled) 3. The imaging member of claim 1, wherein the controlled shape is at least one nanotriangle, nanotube, nanorectangle, or nanodisc. 4. (canceled) 5. (canceled) 6. The imaging member of claim 1, wherein a silica coating encapsulates the plasmonic nanoparticles. 7. The imaging member of claim 3, wherein the plasmonic nanoparticles are formed from silver, gold, silica, copper, aluminum, or any combination thereof. 8. The imaging member of claim 7, wherein the portions of the dampening solution is removed through evaporation. 9. The imaging member of claim 7, wherein the plasmonic nanoparticles are embedded to about two (2) microns in the matrix layer as measured from the surface. 10. The imaging member of claim 7, wherein the plasmonic nanoparticles are dispersed in the matrix layer at various depths ranging from zero (0) to two (2) microns as measured from the surface. 11. A variable data lithography system, comprising:
an imaging member comprising an arbitrarily reimageable surface having on one face thereof a matrix layer with plasmonic nanoparticles embedded at or below the surface of the matrix layer, wherein said plasmonic nanoparticles generate heat when exposed to an incident wavelength of electromagnetic radiation; a dampening solution subsystem for applying a layer of dampening solution to an arbitrarily reimageable surface layer; wherein the plasmonic nanoparticles at said imaging member are in thermal contact with said layer of dampening solution; a patterning subsystem for selectively removing portions of the dampening solution layer, by electromagnetic radiation and the heat from the plasmonic nanoparticles, so as to produce a latent image in the dampening solution; an inking subsystem for applying ink over the arbitrarily reimageable surface layer such that said ink selectively occupies regions of the reimageable surface layer where dampening solution was removed by the patterning subsystem to thereby produce an inked latent image; wherein the plasmonic nanoparticles have a controlled shape to efficiently absorb light at the same frequency as the electromagnetic radiation; wherein the controlled shape has a physical size that is smaller than the wavelength of the electromagnetic radiation; wherein the plasmonic nanoparticles are encapsulated to provide an insulating barrier and to prevent direct contact between particles; and an image transfer subsystem for transferring the inked latent image to a substrate. 12. (canceled) 13. The variable data lithography system of claim 11, wherein the controlled shape is at least one nanotriangle, nanotube, nanorectangle, or nanodisc. 14. (canceled) 15. (canceled) 16. The variable data lithography system of claim 13, wherein a silica coating encapsulates the plasmonic nanoparticles. 17. The variable data lithography system of claim 13, wherein the plasmonic nanoparticles are formed from silver, gold, silica, copper, aluminum, or any combination thereof. 18. The variable data lithography system of claim 17, wherein the portions of the dampening solution is removed through evaporation. 19. The variable data lithography system of claim 17, wherein the plasmonic nanoparticles are embedded to about two (2) microns in the matrix layer as measured from the surface. 20. The variable data lithography system of claim 17, wherein the plasmonic nanoparticles are dispersed in the matrix layer at various depths ranging from zero (0) to two (2) microns as measured from the surface. 21. A method comprising:
using a plate having on one face thereof a matrix layer with plasmonic nanoparticles embedded at or below the surface of the matrix layer; irradiating said plasmonic nanoparticles with electromagnetic radiation to generate heat; wherein the electromagnetic radiation and the heat from the plasmonic nanoparticles selectively remove portions of a dampening solution so as to produce a latent image on the arbitrarily reimageable surface layer; wherein the plasmonic nanoparticles have a controlled shape to efficiently absorb light at the same frequency as the electromagnetic radiation; wherein the controlled shape has a physical size that is smaller than the wavelength of the electromagnetic radiation; wherein the plasmonic nanoparticles are encapsulated to provide an insulating barrier and to prevent direct contact between particles. 22. (canceled) 23. The method of claim 21, wherein the controlled shape is at least one nanotriangle, nanotube, nanorectangle, or nanodisc. 24. (canceled) 25. (canceled) 26. The method of claim 23, wherein a silica coating encapsulates the plasmonic nanoparticles. 27. The method of claim 26, wherein the plasmonic nanoparticles are formed from silver, gold, silica, copper, aluminum, or any combination thereof. 28. The method of claim 27, wherein the portions of the dampening solution is removed through evaporation. 29. The method of claim 27, wherein the plasmonic nanoparticles are embedded to about two (2) microns in the matrix layer as measured from the one face of the structural mounting layer. 30. The method of claim 27, wherein the plasmonic nanoparticles are dispersed in the matrix layer at various depths ranging from zero (0) to two (2) microns as measured from the one face of the structural mounting layer. 31. The method of claim 21, further comprising:
applying ink in a layer such that said ink layer readily separates in regions over imaging surface covered by dampening solution and into regions over said imaging surface at which dampening solution has been removed by the electromagnetic radiation and the heat from the plasmonic nanoparticles; and transferring said ink to a substrate at an image transfer subsystem. | An apparatus and method for providing rewritable printing by utilizing nanoparticles at the printing plate to reduce power requirements for imaging modules in a variable data lithography system is provided. The disclosed embodiments propose a printing plate surface that is made up of an elastomer and incorporates engineered nanoparticles that have high optical absorption properties to improve ablation performance. The exact material, composition and geometry of the engineered nanoparticles are optimized for the specified imaging module without altering plate properties. The apparatus and method use electromagnetic radiation coupled with a nano-filler to locally apply heat to a dampening solution on the printing plate to form a latent image. The nanoparticles do not undergo a physical or chemical change beyond heating up.1. An imaging member for disposition within a variable data lithography system, comprising:
a plate layer having on one face thereof a matrix layer with plasmonic nanoparticles embedded at or below the surface of the matrix layer, wherein said plasmonic nanoparticles generate heat when exposed to an incident wavelength of electromagnetic radiation; an arbitrarily reimageable surface layer formed by a dampening solution disposed over said plate layer; wherein the plasmonic nanoparticles at said plate layer are in thermal contact with said arbitrarily reimageable surface layer; wherein the electromagnetic radiation and the heat from the plasmonic nanoparticles selectively remove portions of the dampening solution so as to produce a latent image on the plate layer; wherein the plasmonic nanoparticles have a controlled shape to efficiently absorb light at the same frequency as the electromagnetic radiation in the variable data lithography system; wherein the controlled shape has a physical size that is smaller than the wavelength of the electromagnetic radiation; wherein the plasmonic nanoparticles are encapsulated to provide an insulating barrier and to prevent direct contact between particles. 2. (canceled) 3. The imaging member of claim 1, wherein the controlled shape is at least one nanotriangle, nanotube, nanorectangle, or nanodisc. 4. (canceled) 5. (canceled) 6. The imaging member of claim 1, wherein a silica coating encapsulates the plasmonic nanoparticles. 7. The imaging member of claim 3, wherein the plasmonic nanoparticles are formed from silver, gold, silica, copper, aluminum, or any combination thereof. 8. The imaging member of claim 7, wherein the portions of the dampening solution is removed through evaporation. 9. The imaging member of claim 7, wherein the plasmonic nanoparticles are embedded to about two (2) microns in the matrix layer as measured from the surface. 10. The imaging member of claim 7, wherein the plasmonic nanoparticles are dispersed in the matrix layer at various depths ranging from zero (0) to two (2) microns as measured from the surface. 11. A variable data lithography system, comprising:
an imaging member comprising an arbitrarily reimageable surface having on one face thereof a matrix layer with plasmonic nanoparticles embedded at or below the surface of the matrix layer, wherein said plasmonic nanoparticles generate heat when exposed to an incident wavelength of electromagnetic radiation; a dampening solution subsystem for applying a layer of dampening solution to an arbitrarily reimageable surface layer; wherein the plasmonic nanoparticles at said imaging member are in thermal contact with said layer of dampening solution; a patterning subsystem for selectively removing portions of the dampening solution layer, by electromagnetic radiation and the heat from the plasmonic nanoparticles, so as to produce a latent image in the dampening solution; an inking subsystem for applying ink over the arbitrarily reimageable surface layer such that said ink selectively occupies regions of the reimageable surface layer where dampening solution was removed by the patterning subsystem to thereby produce an inked latent image; wherein the plasmonic nanoparticles have a controlled shape to efficiently absorb light at the same frequency as the electromagnetic radiation; wherein the controlled shape has a physical size that is smaller than the wavelength of the electromagnetic radiation; wherein the plasmonic nanoparticles are encapsulated to provide an insulating barrier and to prevent direct contact between particles; and an image transfer subsystem for transferring the inked latent image to a substrate. 12. (canceled) 13. The variable data lithography system of claim 11, wherein the controlled shape is at least one nanotriangle, nanotube, nanorectangle, or nanodisc. 14. (canceled) 15. (canceled) 16. The variable data lithography system of claim 13, wherein a silica coating encapsulates the plasmonic nanoparticles. 17. The variable data lithography system of claim 13, wherein the plasmonic nanoparticles are formed from silver, gold, silica, copper, aluminum, or any combination thereof. 18. The variable data lithography system of claim 17, wherein the portions of the dampening solution is removed through evaporation. 19. The variable data lithography system of claim 17, wherein the plasmonic nanoparticles are embedded to about two (2) microns in the matrix layer as measured from the surface. 20. The variable data lithography system of claim 17, wherein the plasmonic nanoparticles are dispersed in the matrix layer at various depths ranging from zero (0) to two (2) microns as measured from the surface. 21. A method comprising:
using a plate having on one face thereof a matrix layer with plasmonic nanoparticles embedded at or below the surface of the matrix layer; irradiating said plasmonic nanoparticles with electromagnetic radiation to generate heat; wherein the electromagnetic radiation and the heat from the plasmonic nanoparticles selectively remove portions of a dampening solution so as to produce a latent image on the arbitrarily reimageable surface layer; wherein the plasmonic nanoparticles have a controlled shape to efficiently absorb light at the same frequency as the electromagnetic radiation; wherein the controlled shape has a physical size that is smaller than the wavelength of the electromagnetic radiation; wherein the plasmonic nanoparticles are encapsulated to provide an insulating barrier and to prevent direct contact between particles. 22. (canceled) 23. The method of claim 21, wherein the controlled shape is at least one nanotriangle, nanotube, nanorectangle, or nanodisc. 24. (canceled) 25. (canceled) 26. The method of claim 23, wherein a silica coating encapsulates the plasmonic nanoparticles. 27. The method of claim 26, wherein the plasmonic nanoparticles are formed from silver, gold, silica, copper, aluminum, or any combination thereof. 28. The method of claim 27, wherein the portions of the dampening solution is removed through evaporation. 29. The method of claim 27, wherein the plasmonic nanoparticles are embedded to about two (2) microns in the matrix layer as measured from the one face of the structural mounting layer. 30. The method of claim 27, wherein the plasmonic nanoparticles are dispersed in the matrix layer at various depths ranging from zero (0) to two (2) microns as measured from the one face of the structural mounting layer. 31. The method of claim 21, further comprising:
applying ink in a layer such that said ink layer readily separates in regions over imaging surface covered by dampening solution and into regions over said imaging surface at which dampening solution has been removed by the electromagnetic radiation and the heat from the plasmonic nanoparticles; and transferring said ink to a substrate at an image transfer subsystem. | 2,800 |
11,308 | 11,308 | 14,985,947 | 2,894 | An integrated circuit (IC) chip can include a die with an interconnect conductively coupled to a leadframe, wherein the leadframe forms a portion of a given surface of the IC chip. The IC chip can also include an encapsulating material molded over the die and the leadframe. The encapsulating material can form another surface of the IC chip. The other surface of the IC chip opposes the given surface of the IC chip. The IC chip can further include a vertical wire extending through the encapsulating material in a direction that is substantially perpendicular to the given surface of the IC chip and the vertical wire protruding through the other surface of the IC chip to form a vertical connector for the IC chip. The vertical connector can be coupled to the interconnect on the die. | 1. An integrated circuit (IC) chip comprising:
a die with an interconnect conductively coupled to a leadframe, wherein the leadframe forms a portion of a given surface of the IC chip; an encapsulating material molded over the die and the leadframe, the encapsulating material forming another surface of the IC chip, wherein the other surface of the IC chip opposes the given surface of the IC chip; and a vertical wire extending through the encapsulating material in a direction that is substantially perpendicular to the given surface of the IC chip and the vertical wire protruding through the other surface of the IC chip to form a vertical connector for the IC chip, wherein the vertical connector is coupled to the interconnect on the die. 2. The IC chip of claim 1, wherein an active side of the die faces away from the given side of the IC chip. 3. The IC chip of claim 2, wherein the IC chip is a flat no-leads IC chip. 4. The IC chip of claim 2, wherein the vertical wire extends from a lead of the leadframe. 5. The IC chip of claim 4, wherein a wire bond couples the interconnect of the die to the lead of the leadframe. 6. The IC chip of claim 2, wherein the die is thermally coupled to an exposed die pad that extends along the given surface of the IC chip. 7. The IC chip of claim 1, wherein the vertical wire extends from the interconnect of the die. 8. The IC chip of claim 1, wherein an external component is coupled to the vertical connector. 9. The IC chip of claim 8, wherein the vertical connector is coupled to a crossbar and a receding portion to form a high power connector. 10. The IC chip of claim 9, wherein the high power connector is U-shaped. 11. The IC chip of claim 9, wherein the high power connector is formed from ribbon bonding. 12. The IC chip of claim 1, wherein the vertical wire is a given vertical wire and the vertical connector is a given vertical connector, the IC chip further comprising:
another vertical wire extending through the encapsulating material in a direction that is substantially perpendicular to the given surface of the IC chip and the other vertical wire protruding through the other surface of the IC chip to form another vertical connector for the IC chip, wherein the other vertical connector is coupled to the interconnect on the die. 13. The IC chip of claim 12, wherein a circuit component external to the IC chip is coupled to the given and the other vertical wires. 14. The IC chip of claim 13, wherein the external component is a passive inductor. 15. The IC chip of claim 1, wherein an active side of the die faces the given side of the IC chip. 16. The IC chip of claim 15, wherein a lead of the leadframe is coupled to the interconnect of the die and to the vertical wire. 17. An electrical circuit comprising:
an integrated circuit (IC) chip comprising:
a die with an interconnect conductively coupled to a leadframe, wherein the leadframe forms a portion of a given surface of the IC chip;
a given vertical wire and another vertical wire, each extending through encapsulating material of the IC chip in a direction that is substantially perpendicular to the given surface of the IC chip and the given and the other vertical wires protruding through the encapsulating material at another surface of the IC chip to form respective given and another vertical connectors for the IC chip, wherein the given and the other vertical connectors are coupled to different points of the interconnect on the die;
a surface mount technology (SMT) component adhered to the IC chip and conductively coupled to the given and the other vertical connectors to form a current path between the different points on the interconnect of the die. 18. The electrical circuit of claim 17, wherein the SMT component is an inductor. 19. The electrical circuit of claim 17, wherein the SMT component is a digital circuit component. 20. An integrated circuit (IC) chip comprising:
a die with an interconnect conductively coupled to a leadframe, wherein the leadframe forms a portion of a given surface of the IC chip, and the die comprises an active surface that faces the leadframe; an encapsulating material molded over the die and the leadframe, the encapsulating material forming another surface of the IC chip, wherein the other surface of the IC chip opposes the given surface of the IC chip; and a vertical wire extending from a particular lead on the leadframe in a direction substantially perpendicular to the given surface of the IC chip, the vertical wire extending through the encapsulating material to form a vertical connector, wherein the particular lead of the leadframe is also coupled to an interconnect of the IC chip. 21. The IC chip of claim 20, wherein the die is a flip-chip die. 22. An integrated circuit (IC) chip comprising:
a given die with a given interconnect conductively coupled to a leadframe, wherein the leadframe forms a portion of a given surface of the IC chip; another die with another interconnect conductively coupled to the leadframe; an encapsulating material molded over the die and the leadframe, the encapsulating material forming another surface of the IC chip, wherein the other surface of the IC chip opposes the given surface of the IC chip; and a given and another vertical wire extending through the encapsulating material in a direction that is substantially perpendicular to the given surface of the IC chip and the given and the other vertical wires protruding through the other surface of the IC chip to form a respective given vertical connector and another vertical connector for the IC chip, wherein the given vertical connector is coupled to the given interconnect on the given die and the other vertical connector is coupled to the other interconnect on the other die. 23. The IC chip of claim 22, further comprising an intervening die positioned between the given die and the other die. | An integrated circuit (IC) chip can include a die with an interconnect conductively coupled to a leadframe, wherein the leadframe forms a portion of a given surface of the IC chip. The IC chip can also include an encapsulating material molded over the die and the leadframe. The encapsulating material can form another surface of the IC chip. The other surface of the IC chip opposes the given surface of the IC chip. The IC chip can further include a vertical wire extending through the encapsulating material in a direction that is substantially perpendicular to the given surface of the IC chip and the vertical wire protruding through the other surface of the IC chip to form a vertical connector for the IC chip. The vertical connector can be coupled to the interconnect on the die.1. An integrated circuit (IC) chip comprising:
a die with an interconnect conductively coupled to a leadframe, wherein the leadframe forms a portion of a given surface of the IC chip; an encapsulating material molded over the die and the leadframe, the encapsulating material forming another surface of the IC chip, wherein the other surface of the IC chip opposes the given surface of the IC chip; and a vertical wire extending through the encapsulating material in a direction that is substantially perpendicular to the given surface of the IC chip and the vertical wire protruding through the other surface of the IC chip to form a vertical connector for the IC chip, wherein the vertical connector is coupled to the interconnect on the die. 2. The IC chip of claim 1, wherein an active side of the die faces away from the given side of the IC chip. 3. The IC chip of claim 2, wherein the IC chip is a flat no-leads IC chip. 4. The IC chip of claim 2, wherein the vertical wire extends from a lead of the leadframe. 5. The IC chip of claim 4, wherein a wire bond couples the interconnect of the die to the lead of the leadframe. 6. The IC chip of claim 2, wherein the die is thermally coupled to an exposed die pad that extends along the given surface of the IC chip. 7. The IC chip of claim 1, wherein the vertical wire extends from the interconnect of the die. 8. The IC chip of claim 1, wherein an external component is coupled to the vertical connector. 9. The IC chip of claim 8, wherein the vertical connector is coupled to a crossbar and a receding portion to form a high power connector. 10. The IC chip of claim 9, wherein the high power connector is U-shaped. 11. The IC chip of claim 9, wherein the high power connector is formed from ribbon bonding. 12. The IC chip of claim 1, wherein the vertical wire is a given vertical wire and the vertical connector is a given vertical connector, the IC chip further comprising:
another vertical wire extending through the encapsulating material in a direction that is substantially perpendicular to the given surface of the IC chip and the other vertical wire protruding through the other surface of the IC chip to form another vertical connector for the IC chip, wherein the other vertical connector is coupled to the interconnect on the die. 13. The IC chip of claim 12, wherein a circuit component external to the IC chip is coupled to the given and the other vertical wires. 14. The IC chip of claim 13, wherein the external component is a passive inductor. 15. The IC chip of claim 1, wherein an active side of the die faces the given side of the IC chip. 16. The IC chip of claim 15, wherein a lead of the leadframe is coupled to the interconnect of the die and to the vertical wire. 17. An electrical circuit comprising:
an integrated circuit (IC) chip comprising:
a die with an interconnect conductively coupled to a leadframe, wherein the leadframe forms a portion of a given surface of the IC chip;
a given vertical wire and another vertical wire, each extending through encapsulating material of the IC chip in a direction that is substantially perpendicular to the given surface of the IC chip and the given and the other vertical wires protruding through the encapsulating material at another surface of the IC chip to form respective given and another vertical connectors for the IC chip, wherein the given and the other vertical connectors are coupled to different points of the interconnect on the die;
a surface mount technology (SMT) component adhered to the IC chip and conductively coupled to the given and the other vertical connectors to form a current path between the different points on the interconnect of the die. 18. The electrical circuit of claim 17, wherein the SMT component is an inductor. 19. The electrical circuit of claim 17, wherein the SMT component is a digital circuit component. 20. An integrated circuit (IC) chip comprising:
a die with an interconnect conductively coupled to a leadframe, wherein the leadframe forms a portion of a given surface of the IC chip, and the die comprises an active surface that faces the leadframe; an encapsulating material molded over the die and the leadframe, the encapsulating material forming another surface of the IC chip, wherein the other surface of the IC chip opposes the given surface of the IC chip; and a vertical wire extending from a particular lead on the leadframe in a direction substantially perpendicular to the given surface of the IC chip, the vertical wire extending through the encapsulating material to form a vertical connector, wherein the particular lead of the leadframe is also coupled to an interconnect of the IC chip. 21. The IC chip of claim 20, wherein the die is a flip-chip die. 22. An integrated circuit (IC) chip comprising:
a given die with a given interconnect conductively coupled to a leadframe, wherein the leadframe forms a portion of a given surface of the IC chip; another die with another interconnect conductively coupled to the leadframe; an encapsulating material molded over the die and the leadframe, the encapsulating material forming another surface of the IC chip, wherein the other surface of the IC chip opposes the given surface of the IC chip; and a given and another vertical wire extending through the encapsulating material in a direction that is substantially perpendicular to the given surface of the IC chip and the given and the other vertical wires protruding through the other surface of the IC chip to form a respective given vertical connector and another vertical connector for the IC chip, wherein the given vertical connector is coupled to the given interconnect on the given die and the other vertical connector is coupled to the other interconnect on the other die. 23. The IC chip of claim 22, further comprising an intervening die positioned between the given die and the other die. | 2,800 |
11,309 | 11,309 | 14,740,429 | 2,855 | A sensor arrangement includes at least one sensor element with electrical connections and arranged in a solid plastic-material body, and at least a first electrically insulating layer which embeds the sensor element arranged between the sensor element and the plastic-material body, wherein the first electrically insulating layer includes a liquid polymer, and the plastic-material body is closed in an end region at least to such extent that the liquid polymer is sealed inside the plastic-material body in an airtight manner. | 1. A sensor arrangement comprising:
at least one sensor element with electrical connections and arranged in a solid plastic-material body, and at least a first electrically insulating layer which embeds the sensor element arranged between the sensor element and the plastic-material body, wherein the first electrically insulating layer comprises a liquid polymer, and the plastic-material body is closed in an end region at least to such extent that the liquid polymer is sealed inside the plastic-material body in an airtight manner. 2. The sensor arrangement according to claim 1, wherein a further insulating layer is arranged between the first insulating layer and the plastic-material body. 3. The sensor arrangement according to claim 1, wherein the further insulating layer comprises a polymer. 4. The sensor arrangement according to claim 1, wherein the electrical connections are rigid supply leads. 5. The sensor arrangement according to claim 1, wherein the at least one sensor element functions as a temperature sensor. 6. The sensor arrangement according to claim 1, wherein the at least one sensor element functions as an optical sensor. 7. The sensor arrangement according to claim 6, further comprising at least one optoelectronic component. 8. The sensor arrangement according to claim 1, having an AC voltage endurance of at least 3000 V. 9. The sensor arrangement according to claim 1, wherein the plastic-material body has a material thickness of at least 1 mm. 10. A method of producing a sensor arrangement comprising:
providing a plastic-material body having hollow space in which at least one sensor element is positioned, and arranging at least a first electrically insulating layer in the hollow space between the sensor element and the plastic-material body such that the first electrically insulating layer embeds the sensor element, wherein the first electrically insulating layer comprises a liquid polymer, and the plastic-material body is closed in an end region at least to such extent that the liquid polymer is sealed inside the plastic-material body in an airtight manner. | A sensor arrangement includes at least one sensor element with electrical connections and arranged in a solid plastic-material body, and at least a first electrically insulating layer which embeds the sensor element arranged between the sensor element and the plastic-material body, wherein the first electrically insulating layer includes a liquid polymer, and the plastic-material body is closed in an end region at least to such extent that the liquid polymer is sealed inside the plastic-material body in an airtight manner.1. A sensor arrangement comprising:
at least one sensor element with electrical connections and arranged in a solid plastic-material body, and at least a first electrically insulating layer which embeds the sensor element arranged between the sensor element and the plastic-material body, wherein the first electrically insulating layer comprises a liquid polymer, and the plastic-material body is closed in an end region at least to such extent that the liquid polymer is sealed inside the plastic-material body in an airtight manner. 2. The sensor arrangement according to claim 1, wherein a further insulating layer is arranged between the first insulating layer and the plastic-material body. 3. The sensor arrangement according to claim 1, wherein the further insulating layer comprises a polymer. 4. The sensor arrangement according to claim 1, wherein the electrical connections are rigid supply leads. 5. The sensor arrangement according to claim 1, wherein the at least one sensor element functions as a temperature sensor. 6. The sensor arrangement according to claim 1, wherein the at least one sensor element functions as an optical sensor. 7. The sensor arrangement according to claim 6, further comprising at least one optoelectronic component. 8. The sensor arrangement according to claim 1, having an AC voltage endurance of at least 3000 V. 9. The sensor arrangement according to claim 1, wherein the plastic-material body has a material thickness of at least 1 mm. 10. A method of producing a sensor arrangement comprising:
providing a plastic-material body having hollow space in which at least one sensor element is positioned, and arranging at least a first electrically insulating layer in the hollow space between the sensor element and the plastic-material body such that the first electrically insulating layer embeds the sensor element, wherein the first electrically insulating layer comprises a liquid polymer, and the plastic-material body is closed in an end region at least to such extent that the liquid polymer is sealed inside the plastic-material body in an airtight manner. | 2,800 |
11,310 | 11,310 | 14,847,169 | 2,893 | A light-emitting device comprises a transparent substrate and a light-emitting stack formed on a surface of the transparent substrate, wherein the transparent substrate has a substrate thickness satisfying a light-extraction efficiency of the light-emitting device decreased by no more than 0.1% if the substrate thickness is decreased by 30 μm. | 1-7. (canceled) 8. A light-emitting die, comprising:
a transparent substrate; and a light-emitting stack formed on a surface of the transparent substrate, wherein the transparent substrate has a substrate surface area A (mil2) and a substrate thickness Tsub (μm) that satisfy the following relationship:
T sub≧0.1048×A+115.82,
wherein Tsub represents a numerical part of the substrate thickness by taking “μm” as unit of substrate thickness, and A represents a numerical part of the substrate surface area by taking “mil2” as unit of substrate surface area. 9. The light-emitting die of claim 8, wherein the substrate surface area is greater than 2025 mil2 and the substrate thickness is greater than 328.04 μm. 10. The light-emitting die of claim 8, wherein the transparent substrate has a rough surface where the light-emitting stack is formed. 11. The light-emitting die of claim 8, wherein the transparent substrate comprises single crystal sapphire. 12. The light-emitting die of claim 8, wherein the light-emitting stack comprises a buffer layer having single crystals or poly-crystals directly grown on the transparent substrate through epitaxial process. 13. The light-emitting die of claim 8, wherein the light-emitting stack is bonded to the transparent substrate through a bonding layer. 14-20. (canceled) | A light-emitting device comprises a transparent substrate and a light-emitting stack formed on a surface of the transparent substrate, wherein the transparent substrate has a substrate thickness satisfying a light-extraction efficiency of the light-emitting device decreased by no more than 0.1% if the substrate thickness is decreased by 30 μm.1-7. (canceled) 8. A light-emitting die, comprising:
a transparent substrate; and a light-emitting stack formed on a surface of the transparent substrate, wherein the transparent substrate has a substrate surface area A (mil2) and a substrate thickness Tsub (μm) that satisfy the following relationship:
T sub≧0.1048×A+115.82,
wherein Tsub represents a numerical part of the substrate thickness by taking “μm” as unit of substrate thickness, and A represents a numerical part of the substrate surface area by taking “mil2” as unit of substrate surface area. 9. The light-emitting die of claim 8, wherein the substrate surface area is greater than 2025 mil2 and the substrate thickness is greater than 328.04 μm. 10. The light-emitting die of claim 8, wherein the transparent substrate has a rough surface where the light-emitting stack is formed. 11. The light-emitting die of claim 8, wherein the transparent substrate comprises single crystal sapphire. 12. The light-emitting die of claim 8, wherein the light-emitting stack comprises a buffer layer having single crystals or poly-crystals directly grown on the transparent substrate through epitaxial process. 13. The light-emitting die of claim 8, wherein the light-emitting stack is bonded to the transparent substrate through a bonding layer. 14-20. (canceled) | 2,800 |
11,311 | 11,311 | 14,652,874 | 2,832 | The invention relates to a method for controlling the electrical moment of a wind turbine by closed-loop control in the event of a grid fault. A fall in voltage that is outside the limits of normal operation is discovered. A moment closed-loop controller which determines a target value for the electrical moment of the wind turbine, is operated. A moment ramp is initialized. The target value of the moment closed-loop controller is compared with the moment ramp and the lesser value is selected as a moment setpoint value. The electrical moment of the wind turbine is set on the basis of the moment setpoint value. The invention additionally relates to a wind turbine suitable for implementing the method. The invention makes it possible, on the one hand, to achieve a rapid restoration of the power after the end of the grid fault, while, on the other hand, the loads for the wind turbine are kept within limits. | 1. A method for controlling the electrical moment of a wind turbine by closed-loop control in the event of a grid fault, comprising the following steps:
a. discovering a fall in voltage that is outside the limits of normal operation; b. initializing a moment ramp (31); c. comparing a target value (52) of a moment closed-loop controller (26, 27) with the moment ramp (31); d. selecting the lesser value from step c. as a moment setpoint value (35); and e. setting the electrical moment of the wind turbine on the basis of the moment setpoint value (35). 2. The method of claim 1, wherein the moment ramp (31) rises from an initial value to an end value, and the initial value is set in dependence on the minimum value (32) of the electrical moment during the grid fault and/or in dependence on the duration of the grid fault. 3. The method of claim 1, wherein the moment closed-loop controller (26, 27, 56) comprises a P component and/or an I component. 4. The method of claim 3, wherein the target value of the P component is compared with a first moment ramp, and the target value of the I component is compared with a second moment ramp. 5. The method of claim 1 wherein the moment closed-loop controller (26, 27, 56) is activated before the start of the grid fault, between the start and the end of the grid fault, or after the end of the grid fault. 6. The method of claim 1 wherein the moment setpoint value (35) is combined with the output variable of an additional closed-loop controller (29), and the additional closed-loop controller (29) comprises a P component whose input variable is the difference between a setpoint rotational speed (23) and an actual rotational speed (20) of the wind turbine. 7. The method of claim 6, wherein a correction value, which depends on the difference between the electrical moment (40) before the occurrence of the grid fault and the minimum value (32) of the electrical moment during the grid fault, is applied to the additional closed-loop controller (29). 8. The method of claim 1 wherein the same moment closed-loop controller (26, 27, 56) and/or additional closed-loop controller (29) are/is used as before the occurrence of the grid fault. 9. The method of claim 1 wherein the moment closed-loop controller (26, 27, 56) is activated only when the grid fault has ended and a predefined period of time has passed since the occurrence of the grid fault. 10. The method of claim 9, wherein the time period of the rise time corresponds to a vibration of the drive train (14, 15, 16) of the wind turbine. 11. The method of claim 1 wherein a damper module (42, 43, 45) is provided, which emits a control signal in opposition to the drive train vibration, and the control signal is provided with an increased gain factor in comparison with normal operation, and is combined with the moment setpoint value (35). 12. The method of claim 1 wherein a limiter (49) is applied to the moment setpoint value (35), wherein the lower limiting value is set in dependence on the minimum value (32) of the electrical moment during the grid fault, and the upper limiting value is set in dependence on the electrical moment before the occurrence of the grid fault. 13. The method of claim 12, wherein a first period of time (51) after the end of the grid fault is provided, after which the lower limiting value is deactivated, and a second period of time (50) after the end of the grid fault is provided, after which the upper limiting value is deactivated, wherein the first period of time (51) is shorter than the second period of time (50). 14. A wind turbine, having a grid fault detector (30), having an open-loop control system (19), which is designed to initialize a moment ramp (31) after the occurrence of a grid fault, and having a moment closed-loop controller (26, 27, 56), which determines a target value (52) for the electrical moment of the wind turbine, having a minimum element (34), which effects a comparison between the target value (52) and the moment ramp (31), and which outputs the lesser value as a moment setpoint value (35), and having a converter (17), which is designed to set the electrical moment of the wind turbine on the basis of the moment setpoint value (35). | The invention relates to a method for controlling the electrical moment of a wind turbine by closed-loop control in the event of a grid fault. A fall in voltage that is outside the limits of normal operation is discovered. A moment closed-loop controller which determines a target value for the electrical moment of the wind turbine, is operated. A moment ramp is initialized. The target value of the moment closed-loop controller is compared with the moment ramp and the lesser value is selected as a moment setpoint value. The electrical moment of the wind turbine is set on the basis of the moment setpoint value. The invention additionally relates to a wind turbine suitable for implementing the method. The invention makes it possible, on the one hand, to achieve a rapid restoration of the power after the end of the grid fault, while, on the other hand, the loads for the wind turbine are kept within limits.1. A method for controlling the electrical moment of a wind turbine by closed-loop control in the event of a grid fault, comprising the following steps:
a. discovering a fall in voltage that is outside the limits of normal operation; b. initializing a moment ramp (31); c. comparing a target value (52) of a moment closed-loop controller (26, 27) with the moment ramp (31); d. selecting the lesser value from step c. as a moment setpoint value (35); and e. setting the electrical moment of the wind turbine on the basis of the moment setpoint value (35). 2. The method of claim 1, wherein the moment ramp (31) rises from an initial value to an end value, and the initial value is set in dependence on the minimum value (32) of the electrical moment during the grid fault and/or in dependence on the duration of the grid fault. 3. The method of claim 1, wherein the moment closed-loop controller (26, 27, 56) comprises a P component and/or an I component. 4. The method of claim 3, wherein the target value of the P component is compared with a first moment ramp, and the target value of the I component is compared with a second moment ramp. 5. The method of claim 1 wherein the moment closed-loop controller (26, 27, 56) is activated before the start of the grid fault, between the start and the end of the grid fault, or after the end of the grid fault. 6. The method of claim 1 wherein the moment setpoint value (35) is combined with the output variable of an additional closed-loop controller (29), and the additional closed-loop controller (29) comprises a P component whose input variable is the difference between a setpoint rotational speed (23) and an actual rotational speed (20) of the wind turbine. 7. The method of claim 6, wherein a correction value, which depends on the difference between the electrical moment (40) before the occurrence of the grid fault and the minimum value (32) of the electrical moment during the grid fault, is applied to the additional closed-loop controller (29). 8. The method of claim 1 wherein the same moment closed-loop controller (26, 27, 56) and/or additional closed-loop controller (29) are/is used as before the occurrence of the grid fault. 9. The method of claim 1 wherein the moment closed-loop controller (26, 27, 56) is activated only when the grid fault has ended and a predefined period of time has passed since the occurrence of the grid fault. 10. The method of claim 9, wherein the time period of the rise time corresponds to a vibration of the drive train (14, 15, 16) of the wind turbine. 11. The method of claim 1 wherein a damper module (42, 43, 45) is provided, which emits a control signal in opposition to the drive train vibration, and the control signal is provided with an increased gain factor in comparison with normal operation, and is combined with the moment setpoint value (35). 12. The method of claim 1 wherein a limiter (49) is applied to the moment setpoint value (35), wherein the lower limiting value is set in dependence on the minimum value (32) of the electrical moment during the grid fault, and the upper limiting value is set in dependence on the electrical moment before the occurrence of the grid fault. 13. The method of claim 12, wherein a first period of time (51) after the end of the grid fault is provided, after which the lower limiting value is deactivated, and a second period of time (50) after the end of the grid fault is provided, after which the upper limiting value is deactivated, wherein the first period of time (51) is shorter than the second period of time (50). 14. A wind turbine, having a grid fault detector (30), having an open-loop control system (19), which is designed to initialize a moment ramp (31) after the occurrence of a grid fault, and having a moment closed-loop controller (26, 27, 56), which determines a target value (52) for the electrical moment of the wind turbine, having a minimum element (34), which effects a comparison between the target value (52) and the moment ramp (31), and which outputs the lesser value as a moment setpoint value (35), and having a converter (17), which is designed to set the electrical moment of the wind turbine on the basis of the moment setpoint value (35). | 2,800 |
11,312 | 11,312 | 14,510,288 | 2,864 | A fluid level measurement system includes a first pressure sensor disposed inside a fluid tank at a first elevation relative to a height axis of the fluid tank, and a second pressure sensor disposed inside the fluid tank at a second elevation relative to the height axis of the fluid tank, the second elevation different from the first elevation. The first pressure sensor and the second pressure sensor are configured to provide a signal indicative of a sensed pressure, and fluid height is calculated from the difference in sensed pressure between the first and second pressure sensors relative to the sensed pressure of either the first or the second pressure sensor. | 1. A fluid level measurement system, comprising:
a first pressure sensor disposed inside a fluid tank at a first elevation relative to a height axis of the fluid tank; a second pressure sensor disposed inside the fluid tank at a second elevation relative to the height axis of the fluid tank, the second elevation different from the first elevation, wherein the first pressure sensor and the second pressure sensor are configured to provide a signal indicative of a sensed pressure, and fluid height is calculated from the difference in sensed pressure between the first and second pressure sensors. 2. The fluid level measurement system according to claim 1, wherein fluid height is calculated from the difference in sensed pressure between the first and second pressure sensors relative to the sensed pressure of either the first or the second pressure sensor. 3. The fluid level measurement system according to claim 1, further comprising a controller communicatively coupled to the first pressure sensor and the second pressure sensor to receive the signal indicative of the sensed pressure from each sensor, the controller configured to calculate the fluid level in the fluid tank based on the difference in sensed pressures of the first and second pressure sensors. 4. The fluid level measurement system according to claim 1, further comprising the fluid tank. 5. The fluid level measurement system according to claim 1, wherein the first pressure sensor is spaced a first known distance apart from the second pressure sensor along an axis parallel to the height axis. 6. The fluid level measurement system according to claim 5, further comprising a third pressure sensor disposed inside the fluid tank and at a third elevation relative to a height axis of the fluid tank, the third pressure sensor spaced a second known distance apart from the first pressure sensor and a third known distance from the second pressure sensor,
wherein the controller is configured to calculate a location of a fluid surface plane in the fluid tank based on the sensed pressure of the first, second and third pressure sensors and the first known distance, the second known distance, and the third known distance. 7. The fluid level measurement system according to claim 6, wherein the controller is configured to calculate at least one of a pitch angle of a fluid surface or a roll angle of the fluid surface relative to a reference surface of the fluid tank based on the first known distance, the second known distance, and the third known distance. 8. The fluid level measurement system according to claim 1, wherein the first pressure sensor and the second pressure sensor are arranged on a common support member of an integrated pressure assembly. 9. The fluid level measurement system according to claim 1, wherein at least one of the first pressure sensor or the second pressure sensor comprises an optical pressure sensor. 10. The fluid level measurement system of claim 9, wherein the controller is optically coupled to at least one of the first pressure sensor or the second pressure sensor. 11. The fluid level measurement system according to claim 1, wherein at least one of the first pressure sensor or the second pressure sensor comprises a passive optical pressure sensor. 12. The fluid level measurement system according to claim 1, wherein at least one of the first pressure sensor or the second pressure sensor comprises at least one of a passive Fabry-Perot optical pressure sensor or a passive Fiber Bragg Grating optical pressure sensor. 13. The fluid level measurement system according to claim 1, wherein at least one of the first pressure sensor or the second pressure sensor comprises a differential pressure sensor having a first port fluidically connected to an ullage portion of the fluid tank. 14. The fluid level measurement system of claim 13, further comprising a gas-filled equalizer arranged within the fluid tank and fluidically connected to an ullage portion of the fluid tank, wherein the first port of each differential pressure sensor is fluidically connected to the gas-filled equalizer. 15. The fluid level measurement system of claim 14, wherein the gas-filled equalizer comprises an outer surface and a portion of the outer surface includes a flexible membrane, further comprising a fourth pressure sensor disposed inside the tank, wherein the fourth pressure sensor is a differential pressure sensor having a first port fluidically connected to the ullage portion of the fluid tank and a second port fluidically connected to the gas-filled equalizer. 16. An aircraft comprising the fluid level measurement system according to claim 1. 17. A method of measuring a fluid level in a fluid tank, the fluid tank including a first pressure sensor disposed inside the fluid tank at a first elevation relative to a height axis of the fluid tank and a second pressure sensor disposed inside the fluid tank at a second elevation relative to the height axis of the fluid tank, the second elevation different from the first elevation, the method comprising:
using the first pressure sensor to measure a first pressure value; using the second pressure sensor to measure a second pressure value; and calculating the fluid level of the fluid in the tank based on a difference in pressure between the first measured pressure value and the second measured pressure value. 18. The method according to claim 17, wherein calculating the fluid leveled comprises calculating the fluid level from the difference in sensed pressure between the first and second pressure sensors relative to the sensed pressure of either the first or the second pressure sensor. 19. The method according to claim 17, wherein calculating the fluid level includes using the equation
Z
n
=
Δ
Z
P
2
-
P
1
×
P
n
,
where Zn is the fluid level, P2 is the second measured pressure value, P1 is the first measured pressure value, ΔZ is the difference between second elevation and the first elevation, and Pn is the pressure reading of an nth pressure sensor. 20. The method according to claim 17, wherein using the first and second pressure sensors includes using first and second differential pressure sensors, respectively, to measure the first and second pressure values. 21. The method according to claim 20, further comprising coupling the first and second pressure sensors to a pressure equalizer, the pressure equalizer fluidically coupled to an ullage of the fluid tank. 22. A method of measuring a fluid level in a fluid tank, the fluid tank including a first pressure sensor disposed inside the fluid tank, a second pressure sensor disposed inside the fluid tank and horizontally spaced apart from the first pressure sensor by a first known distance, and a third pressure sensor disposed inside the fluid tank and horizontally spaced apart from the first pressure sensor by a second known distance and horizontally spaced apart from the second pressure sensor by a third known distance, the method comprising:
determining a first fluid level height based on a first pressure value obtained from the first pressure sensor; determining a second fluid level height based on a second pressure value obtained from the second pressure sensor; determining a third fluid level height based on a third pressure value obtained from the third; and calculating a location of a fluid surface plane in the fluid tank based on the first, second and third fluid levels. 23. The method according to claim 22, further comprising calculating a pitch angle of the fluid surface relative to a reference surface of the fluid tank based on the first known distance, second known distance, and third known distance. 24. The method according to claim 23, further comprising calculating a roll angle of the fluid surface relative to a reference surface of the fluid tank based on the first known distance, second known distance, and third known distance. 25. The method according to claim 24, further comprising calculating a volume of fluid in the fluid tank based on a known geometry of the fluid tank, the fluid surface plane, the pitch angle, and the roll angle. | A fluid level measurement system includes a first pressure sensor disposed inside a fluid tank at a first elevation relative to a height axis of the fluid tank, and a second pressure sensor disposed inside the fluid tank at a second elevation relative to the height axis of the fluid tank, the second elevation different from the first elevation. The first pressure sensor and the second pressure sensor are configured to provide a signal indicative of a sensed pressure, and fluid height is calculated from the difference in sensed pressure between the first and second pressure sensors relative to the sensed pressure of either the first or the second pressure sensor.1. A fluid level measurement system, comprising:
a first pressure sensor disposed inside a fluid tank at a first elevation relative to a height axis of the fluid tank; a second pressure sensor disposed inside the fluid tank at a second elevation relative to the height axis of the fluid tank, the second elevation different from the first elevation, wherein the first pressure sensor and the second pressure sensor are configured to provide a signal indicative of a sensed pressure, and fluid height is calculated from the difference in sensed pressure between the first and second pressure sensors. 2. The fluid level measurement system according to claim 1, wherein fluid height is calculated from the difference in sensed pressure between the first and second pressure sensors relative to the sensed pressure of either the first or the second pressure sensor. 3. The fluid level measurement system according to claim 1, further comprising a controller communicatively coupled to the first pressure sensor and the second pressure sensor to receive the signal indicative of the sensed pressure from each sensor, the controller configured to calculate the fluid level in the fluid tank based on the difference in sensed pressures of the first and second pressure sensors. 4. The fluid level measurement system according to claim 1, further comprising the fluid tank. 5. The fluid level measurement system according to claim 1, wherein the first pressure sensor is spaced a first known distance apart from the second pressure sensor along an axis parallel to the height axis. 6. The fluid level measurement system according to claim 5, further comprising a third pressure sensor disposed inside the fluid tank and at a third elevation relative to a height axis of the fluid tank, the third pressure sensor spaced a second known distance apart from the first pressure sensor and a third known distance from the second pressure sensor,
wherein the controller is configured to calculate a location of a fluid surface plane in the fluid tank based on the sensed pressure of the first, second and third pressure sensors and the first known distance, the second known distance, and the third known distance. 7. The fluid level measurement system according to claim 6, wherein the controller is configured to calculate at least one of a pitch angle of a fluid surface or a roll angle of the fluid surface relative to a reference surface of the fluid tank based on the first known distance, the second known distance, and the third known distance. 8. The fluid level measurement system according to claim 1, wherein the first pressure sensor and the second pressure sensor are arranged on a common support member of an integrated pressure assembly. 9. The fluid level measurement system according to claim 1, wherein at least one of the first pressure sensor or the second pressure sensor comprises an optical pressure sensor. 10. The fluid level measurement system of claim 9, wherein the controller is optically coupled to at least one of the first pressure sensor or the second pressure sensor. 11. The fluid level measurement system according to claim 1, wherein at least one of the first pressure sensor or the second pressure sensor comprises a passive optical pressure sensor. 12. The fluid level measurement system according to claim 1, wherein at least one of the first pressure sensor or the second pressure sensor comprises at least one of a passive Fabry-Perot optical pressure sensor or a passive Fiber Bragg Grating optical pressure sensor. 13. The fluid level measurement system according to claim 1, wherein at least one of the first pressure sensor or the second pressure sensor comprises a differential pressure sensor having a first port fluidically connected to an ullage portion of the fluid tank. 14. The fluid level measurement system of claim 13, further comprising a gas-filled equalizer arranged within the fluid tank and fluidically connected to an ullage portion of the fluid tank, wherein the first port of each differential pressure sensor is fluidically connected to the gas-filled equalizer. 15. The fluid level measurement system of claim 14, wherein the gas-filled equalizer comprises an outer surface and a portion of the outer surface includes a flexible membrane, further comprising a fourth pressure sensor disposed inside the tank, wherein the fourth pressure sensor is a differential pressure sensor having a first port fluidically connected to the ullage portion of the fluid tank and a second port fluidically connected to the gas-filled equalizer. 16. An aircraft comprising the fluid level measurement system according to claim 1. 17. A method of measuring a fluid level in a fluid tank, the fluid tank including a first pressure sensor disposed inside the fluid tank at a first elevation relative to a height axis of the fluid tank and a second pressure sensor disposed inside the fluid tank at a second elevation relative to the height axis of the fluid tank, the second elevation different from the first elevation, the method comprising:
using the first pressure sensor to measure a first pressure value; using the second pressure sensor to measure a second pressure value; and calculating the fluid level of the fluid in the tank based on a difference in pressure between the first measured pressure value and the second measured pressure value. 18. The method according to claim 17, wherein calculating the fluid leveled comprises calculating the fluid level from the difference in sensed pressure between the first and second pressure sensors relative to the sensed pressure of either the first or the second pressure sensor. 19. The method according to claim 17, wherein calculating the fluid level includes using the equation
Z
n
=
Δ
Z
P
2
-
P
1
×
P
n
,
where Zn is the fluid level, P2 is the second measured pressure value, P1 is the first measured pressure value, ΔZ is the difference between second elevation and the first elevation, and Pn is the pressure reading of an nth pressure sensor. 20. The method according to claim 17, wherein using the first and second pressure sensors includes using first and second differential pressure sensors, respectively, to measure the first and second pressure values. 21. The method according to claim 20, further comprising coupling the first and second pressure sensors to a pressure equalizer, the pressure equalizer fluidically coupled to an ullage of the fluid tank. 22. A method of measuring a fluid level in a fluid tank, the fluid tank including a first pressure sensor disposed inside the fluid tank, a second pressure sensor disposed inside the fluid tank and horizontally spaced apart from the first pressure sensor by a first known distance, and a third pressure sensor disposed inside the fluid tank and horizontally spaced apart from the first pressure sensor by a second known distance and horizontally spaced apart from the second pressure sensor by a third known distance, the method comprising:
determining a first fluid level height based on a first pressure value obtained from the first pressure sensor; determining a second fluid level height based on a second pressure value obtained from the second pressure sensor; determining a third fluid level height based on a third pressure value obtained from the third; and calculating a location of a fluid surface plane in the fluid tank based on the first, second and third fluid levels. 23. The method according to claim 22, further comprising calculating a pitch angle of the fluid surface relative to a reference surface of the fluid tank based on the first known distance, second known distance, and third known distance. 24. The method according to claim 23, further comprising calculating a roll angle of the fluid surface relative to a reference surface of the fluid tank based on the first known distance, second known distance, and third known distance. 25. The method according to claim 24, further comprising calculating a volume of fluid in the fluid tank based on a known geometry of the fluid tank, the fluid surface plane, the pitch angle, and the roll angle. | 2,800 |
11,313 | 11,313 | 15,254,596 | 2,847 | A coaxial cable includes: an inner conductor; a dielectric layer surrounding the inner conductor; and an outer conductor having a plurality of corrugations. Each of the corrugations has a root and a crest connected by a transition section. The root has a first radius of curvature, the crest has a second radius of curvature, and the ratio of the first radius of curvature to the second radius of curvature is equal to or greater than 1. | 1. A coaxial cable, comprising:
an inner conductor; a dielectric layer surrounding the inner conductor; and an outer conductor having a plurality of corrugations; wherein each of the corrugations has a root and a crest connected by a transition section, and wherein the root has a first radius of curvature, the crest has a second radius of curvature, and the ratio of the first radius of curvature to the second radius of curvature is equal to or greater than 1. 2. The coaxial cable defined in claim 1, wherein the ratio of the first radius of curvature to the second radius of curvature is greater than 1. 3. The coaxial cable defined in claim 1, wherein the transition section is substantially straight. 4. The coaxial cable defined in claim 1, wherein the transition section is concave. 5. The coaxial cable defined in claim 1, wherein the root is generally flattened. 6. The coaxial cable defined in claim 1, wherein the first radius is between about 0.030 and 0.038 inches, and the second radius is between about 0.022 and 0.026 inches. 7. A coaxial cable, comprising:
an inner conductor; a dielectric layer surrounding the inner conductor; and an outer conductor having a plurality of corrugations; wherein each of the corrugations has a root and a crest connected by a transition section, and wherein the transition section is concave. 8. The coaxial cable defined in claim 7, wherein the root has a first radius of curvature, the crest has a second radius of curvature, and the ratio of the first radius of curvature to the second radius of curvature is greater than 1. 9. The coaxial cable defined in claim 7, wherein root of the corrugation is generally flattened. 10. The coaxial cable defined in claim 8, wherein the first radius is between about 0.030 and 0.038 inches, and the second radius is between about 0.022 and 0.026 inches. 11. A coaxial cable, comprising:
an inner conductor; a dielectric layer surrounding the inner conductor; and an outer conductor having a plurality of corrugations; wherein each of the corrugations has a root and a crest connected by a transition section, and wherein the transition section is substantially straight. 12. The coaxial cable defined in claim 11, wherein the root has a first radius of curvature, the crest has a second radius of curvature, and the ratio of the first radius of curvature to the second radius of curvature is greater than 1. 13. The coaxial cable defined in claim 11, wherein root of the corrugation is generally flattened. 14. The coaxial cable defined in claim 12, wherein the first radius is between about 0.030 and 0.038 inches, and the second radius is between about 0.022 and 0.026 inches. | A coaxial cable includes: an inner conductor; a dielectric layer surrounding the inner conductor; and an outer conductor having a plurality of corrugations. Each of the corrugations has a root and a crest connected by a transition section. The root has a first radius of curvature, the crest has a second radius of curvature, and the ratio of the first radius of curvature to the second radius of curvature is equal to or greater than 1.1. A coaxial cable, comprising:
an inner conductor; a dielectric layer surrounding the inner conductor; and an outer conductor having a plurality of corrugations; wherein each of the corrugations has a root and a crest connected by a transition section, and wherein the root has a first radius of curvature, the crest has a second radius of curvature, and the ratio of the first radius of curvature to the second radius of curvature is equal to or greater than 1. 2. The coaxial cable defined in claim 1, wherein the ratio of the first radius of curvature to the second radius of curvature is greater than 1. 3. The coaxial cable defined in claim 1, wherein the transition section is substantially straight. 4. The coaxial cable defined in claim 1, wherein the transition section is concave. 5. The coaxial cable defined in claim 1, wherein the root is generally flattened. 6. The coaxial cable defined in claim 1, wherein the first radius is between about 0.030 and 0.038 inches, and the second radius is between about 0.022 and 0.026 inches. 7. A coaxial cable, comprising:
an inner conductor; a dielectric layer surrounding the inner conductor; and an outer conductor having a plurality of corrugations; wherein each of the corrugations has a root and a crest connected by a transition section, and wherein the transition section is concave. 8. The coaxial cable defined in claim 7, wherein the root has a first radius of curvature, the crest has a second radius of curvature, and the ratio of the first radius of curvature to the second radius of curvature is greater than 1. 9. The coaxial cable defined in claim 7, wherein root of the corrugation is generally flattened. 10. The coaxial cable defined in claim 8, wherein the first radius is between about 0.030 and 0.038 inches, and the second radius is between about 0.022 and 0.026 inches. 11. A coaxial cable, comprising:
an inner conductor; a dielectric layer surrounding the inner conductor; and an outer conductor having a plurality of corrugations; wherein each of the corrugations has a root and a crest connected by a transition section, and wherein the transition section is substantially straight. 12. The coaxial cable defined in claim 11, wherein the root has a first radius of curvature, the crest has a second radius of curvature, and the ratio of the first radius of curvature to the second radius of curvature is greater than 1. 13. The coaxial cable defined in claim 11, wherein root of the corrugation is generally flattened. 14. The coaxial cable defined in claim 12, wherein the first radius is between about 0.030 and 0.038 inches, and the second radius is between about 0.022 and 0.026 inches. | 2,800 |
11,314 | 11,314 | 14,185,429 | 2,896 | A coated overhead conductor having an assembly including one or more conductive wires, such that the assembly includes an outer surface coated with an electrochemical deposition coating forming an outer layer, wherein the electrochemical deposition coating includes a first metal oxide, such that the first metal oxide is not aluminum oxide. Methods for making the overhead conductor are also provided. | 1. A coated overhead conductor comprising an assembly including one or more conductive wires, wherein the assembly comprises an outer surface coated with an electrochemical deposition coating forming an outer layer, wherein the electrochemical deposition coating comprises a first metal oxide, wherein the first metal oxide is not aluminum oxide. 2. The coated overhead conductor of claim 1, wherein the first metal oxide comprises titanium oxide, zirconium oxide, zinc oxide, niobium oxide, vanadium oxide, molybdenum oxide, copper oxide, nickel oxide, magnesium oxide, beryllium oxide, cerium oxide, boron oxide, gallium oxide, hafnium oxide, tin oxide, iron oxide, yttrium oxide or combinations thereof. 3. The coated overhead conductor of claim 1, wherein the one or more conductive wires are formed of aluminum or aluminum alloy. 4. The coated overhead conductor of claim 3, wherein the outer layer is further formed of a second metal oxide, wherein the second metal oxide is aluminum oxide. 5. The coated overhead conductor of claim 1, wherein the one or more conductive wires are formed of copper or copper alloy. 6. The coated overhead conductor of claim 2, wherein the first metal oxide comprises titanium oxide, zirconium oxide or combinations thereof. 7. The coated overhead conductor of claim 1 having a lower operating temperature compared to the operating temperature of an uncoated overhead conductor at similar operating conditions. 8. The coated overhead conductor of claim 1, wherein the electrochemical deposition coating is non-white. 9. The coated overhead conductor of claim 1, wherein the outer layer has a thickness of about 1 micron or more. 10. The coated overhead conductor of claim 1, wherein the outer layer has a thickness of about 5 microns to about 25 microns. 11. The coated overhead conductor of claim 1, wherein the outer layer has a thickness variation of about 3 microns or less. 12. The coated overhead conductor of claim 1 having an operating temperature reduced by at least 5° C. when compared to the operating temperature of an uncoated overhead conductor at similar operating conditions. 13. The coated overhead conductor of claim 1 having an operating temperature reduced by at least 10° C. when compared to the operating temperature of an uncoated overhead conductor, when the operating temperatures measured are above 100° C. and at similar operating conditions. 14. The coated overhead conductor of claim 1 having reduced power transmission loss when compared to an uncoated overhead conductor at similar operating conditions. 15. The coated overhead conductor of claim 1 having increased current carrying capacity when compared to an uncoated overhead conductor at similar operating conditions. 16. The coated overhead conductor of claim 3, wherein the one or more conductive wires are formed from an aluminum alloy selected from the group consisting of 1350 alloy aluminum, 6000-series alloy aluminum, aluminum-zirconium alloy, and combinations thereof. 17. The coated overhead conductor of claim 1, wherein at least some of the one or more conductive wires have trapezoidal cross-sections. 18. The coated overhead conductor of claim 1, wherein the one or more conductive wires surround a core comprised of steel, carbon fiber composite, glass fiber composite, carbon nanotube composite, or aluminum alloy. 19. The coated overhead conductor of claim 1, wherein each of the conductive wires is individually coated with the electrochemical deposition coating. 20. The coated overhead conductor of claim 1, wherein a portion of each of the conductive wires is coated with the electrochemical deposition coating. 21. The coated overhead conductor of claim 1, wherein the electrochemical deposition coating is electrically non-conductive. 22. A method for making a coated overhead conductor, the method comprising:
a. providing a bare conductor; and b. performing electrochemical deposition of a first metal oxide on an outer surface of the bare conductor to form an outer layer on the bare conductor, the outer layer comprising an electrochemical deposition coating, wherein the first metal oxide is not aluminum oxide. 23. The method of claim 22, wherein the electrochemical deposition coating is non-white. 24. The method of claim 22, wherein the first metal oxide is titanium oxide, zirconium oxide, zinc oxide, niobium oxide, vanadium oxide, molybdenum oxide, copper oxide, brass oxide, nickel oxide, magnesium oxide, beryllium oxide, cerium oxide, boron oxide, gallium oxide, hafnium oxide, tin oxide, iron oxide, yttrium oxide, or combinations thereof. 25. The method of claim 22, wherein the outer layer has a thickness of about 1 micron to about 25 microns. 26. The method of claim 22, wherein the outer layer has a thickness variation of about 3 microns or less. 27. The method of claim 22, wherein the coated overhead conductor has an operating temperature reduced by at least 5° C. compared to the operating temperature of an uncoated overhead conductor at similar operating conditions. 28. The method of claim 22, wherein the coated overhead conductor has an operating temperature reduced by at least 10° C. compared to the operating temperature of an uncoated overhead conductor, when the operating temperatures is above 100° C. at similar operating conditions. 29. The method of claim 22, wherein the coated overhead conductor has reduced power transmission loss when compared to an uncoated overhead conductor at similar operating conditions. 30. The method of claim 22, wherein the coated overhead conductor has increased current carrying capacity when compared to an uncoated overhead conductor at similar operating conditions. 31. The method of claim 22, wherein the bare conductor comprises a plurality of conductor wires made from one or more of copper, copper alloy, aluminum, or aluminum alloy. 32. The method of claim 31, wherein the plurality of conductive wires are formed from an aluminum alloy comprising 1350 alloy aluminum, 6000-series alloy aluminum, or aluminum-zirconium alloy. 33. The method of claim 22, wherein the bare conductor comprises a plurality of conductive wires, wherein at least some of the plurality of conductive wires have a trapezoidal cross-section. 34. The method of claim 22, wherein the bare conductor comprises a plurality of conductive wires stranded around a core, and wherein the core is comprises steel, carbon fiber composite, glass fiber composite, carbon nanotube composite, or aluminum alloy. 35. The method of claim 22, wherein the bare conductor is formed of a plurality of conductive wires, and wherein the electrochemical deposition coats only an outer surface of the bare conductor. 36. The method of claim 22, wherein the bare conductor comprises a plurality of conductive wires, and wherein the electrochemical deposition coats each of the conductive wires. 37. The method of claim 22, wherein the electrochemical deposition coats only a portion of the bare conductor. 38. The method of claim 22, wherein the electrochemical deposition coating is electrically non-conductive. 39. The method of claim 22 being continuous, semi-continuous, or batch. 40. The method of claim 22, wherein the performance of the electrochemical deposition comprises:
i. providing an aqueous solution containing at least one of water-soluble complex metal fluorides, water-dispersible complex metal fluorides, water-soluble complex metal oxyfluorides, and water-dispersible metal oxyfluorides; ii. providing a cathode in contact with said aqueous solution; iii. placing the bare conductor in the aqueous solution as an anode; iv. passing a current between the anode and the cathode through the aqueous solution to form the electrochemical deposition coating on the outer surface of the bare conductor; and v. removing the coated overhead conductor from the aqueous solution. 41. The method of claim 40, wherein the current is pulsed. 42. The method of claim 40, wherein the current is from about 10 amps/square foot to about 400 amps/square foot. 43. The method of claim 40, wherein the metal is titanium or zirconium. 44. The method of claim 22, wherein the metal oxide is titanium oxide or zirconium oxide. 45. A coated overhead conductor comprising an assembly including one or more conductive wires, wherein the one or more conductive wires are formed of aluminum or aluminum alloy, wherein the assembly comprises an outer surface coated with an electrochemical deposition coating forming an outer layer, the electrochemical deposition coating comprises titanium oxide, zirconium oxide or combinations thereof, and the outer layer has a thickness from about 5 microns to about 25 microns. | A coated overhead conductor having an assembly including one or more conductive wires, such that the assembly includes an outer surface coated with an electrochemical deposition coating forming an outer layer, wherein the electrochemical deposition coating includes a first metal oxide, such that the first metal oxide is not aluminum oxide. Methods for making the overhead conductor are also provided.1. A coated overhead conductor comprising an assembly including one or more conductive wires, wherein the assembly comprises an outer surface coated with an electrochemical deposition coating forming an outer layer, wherein the electrochemical deposition coating comprises a first metal oxide, wherein the first metal oxide is not aluminum oxide. 2. The coated overhead conductor of claim 1, wherein the first metal oxide comprises titanium oxide, zirconium oxide, zinc oxide, niobium oxide, vanadium oxide, molybdenum oxide, copper oxide, nickel oxide, magnesium oxide, beryllium oxide, cerium oxide, boron oxide, gallium oxide, hafnium oxide, tin oxide, iron oxide, yttrium oxide or combinations thereof. 3. The coated overhead conductor of claim 1, wherein the one or more conductive wires are formed of aluminum or aluminum alloy. 4. The coated overhead conductor of claim 3, wherein the outer layer is further formed of a second metal oxide, wherein the second metal oxide is aluminum oxide. 5. The coated overhead conductor of claim 1, wherein the one or more conductive wires are formed of copper or copper alloy. 6. The coated overhead conductor of claim 2, wherein the first metal oxide comprises titanium oxide, zirconium oxide or combinations thereof. 7. The coated overhead conductor of claim 1 having a lower operating temperature compared to the operating temperature of an uncoated overhead conductor at similar operating conditions. 8. The coated overhead conductor of claim 1, wherein the electrochemical deposition coating is non-white. 9. The coated overhead conductor of claim 1, wherein the outer layer has a thickness of about 1 micron or more. 10. The coated overhead conductor of claim 1, wherein the outer layer has a thickness of about 5 microns to about 25 microns. 11. The coated overhead conductor of claim 1, wherein the outer layer has a thickness variation of about 3 microns or less. 12. The coated overhead conductor of claim 1 having an operating temperature reduced by at least 5° C. when compared to the operating temperature of an uncoated overhead conductor at similar operating conditions. 13. The coated overhead conductor of claim 1 having an operating temperature reduced by at least 10° C. when compared to the operating temperature of an uncoated overhead conductor, when the operating temperatures measured are above 100° C. and at similar operating conditions. 14. The coated overhead conductor of claim 1 having reduced power transmission loss when compared to an uncoated overhead conductor at similar operating conditions. 15. The coated overhead conductor of claim 1 having increased current carrying capacity when compared to an uncoated overhead conductor at similar operating conditions. 16. The coated overhead conductor of claim 3, wherein the one or more conductive wires are formed from an aluminum alloy selected from the group consisting of 1350 alloy aluminum, 6000-series alloy aluminum, aluminum-zirconium alloy, and combinations thereof. 17. The coated overhead conductor of claim 1, wherein at least some of the one or more conductive wires have trapezoidal cross-sections. 18. The coated overhead conductor of claim 1, wherein the one or more conductive wires surround a core comprised of steel, carbon fiber composite, glass fiber composite, carbon nanotube composite, or aluminum alloy. 19. The coated overhead conductor of claim 1, wherein each of the conductive wires is individually coated with the electrochemical deposition coating. 20. The coated overhead conductor of claim 1, wherein a portion of each of the conductive wires is coated with the electrochemical deposition coating. 21. The coated overhead conductor of claim 1, wherein the electrochemical deposition coating is electrically non-conductive. 22. A method for making a coated overhead conductor, the method comprising:
a. providing a bare conductor; and b. performing electrochemical deposition of a first metal oxide on an outer surface of the bare conductor to form an outer layer on the bare conductor, the outer layer comprising an electrochemical deposition coating, wherein the first metal oxide is not aluminum oxide. 23. The method of claim 22, wherein the electrochemical deposition coating is non-white. 24. The method of claim 22, wherein the first metal oxide is titanium oxide, zirconium oxide, zinc oxide, niobium oxide, vanadium oxide, molybdenum oxide, copper oxide, brass oxide, nickel oxide, magnesium oxide, beryllium oxide, cerium oxide, boron oxide, gallium oxide, hafnium oxide, tin oxide, iron oxide, yttrium oxide, or combinations thereof. 25. The method of claim 22, wherein the outer layer has a thickness of about 1 micron to about 25 microns. 26. The method of claim 22, wherein the outer layer has a thickness variation of about 3 microns or less. 27. The method of claim 22, wherein the coated overhead conductor has an operating temperature reduced by at least 5° C. compared to the operating temperature of an uncoated overhead conductor at similar operating conditions. 28. The method of claim 22, wherein the coated overhead conductor has an operating temperature reduced by at least 10° C. compared to the operating temperature of an uncoated overhead conductor, when the operating temperatures is above 100° C. at similar operating conditions. 29. The method of claim 22, wherein the coated overhead conductor has reduced power transmission loss when compared to an uncoated overhead conductor at similar operating conditions. 30. The method of claim 22, wherein the coated overhead conductor has increased current carrying capacity when compared to an uncoated overhead conductor at similar operating conditions. 31. The method of claim 22, wherein the bare conductor comprises a plurality of conductor wires made from one or more of copper, copper alloy, aluminum, or aluminum alloy. 32. The method of claim 31, wherein the plurality of conductive wires are formed from an aluminum alloy comprising 1350 alloy aluminum, 6000-series alloy aluminum, or aluminum-zirconium alloy. 33. The method of claim 22, wherein the bare conductor comprises a plurality of conductive wires, wherein at least some of the plurality of conductive wires have a trapezoidal cross-section. 34. The method of claim 22, wherein the bare conductor comprises a plurality of conductive wires stranded around a core, and wherein the core is comprises steel, carbon fiber composite, glass fiber composite, carbon nanotube composite, or aluminum alloy. 35. The method of claim 22, wherein the bare conductor is formed of a plurality of conductive wires, and wherein the electrochemical deposition coats only an outer surface of the bare conductor. 36. The method of claim 22, wherein the bare conductor comprises a plurality of conductive wires, and wherein the electrochemical deposition coats each of the conductive wires. 37. The method of claim 22, wherein the electrochemical deposition coats only a portion of the bare conductor. 38. The method of claim 22, wherein the electrochemical deposition coating is electrically non-conductive. 39. The method of claim 22 being continuous, semi-continuous, or batch. 40. The method of claim 22, wherein the performance of the electrochemical deposition comprises:
i. providing an aqueous solution containing at least one of water-soluble complex metal fluorides, water-dispersible complex metal fluorides, water-soluble complex metal oxyfluorides, and water-dispersible metal oxyfluorides; ii. providing a cathode in contact with said aqueous solution; iii. placing the bare conductor in the aqueous solution as an anode; iv. passing a current between the anode and the cathode through the aqueous solution to form the electrochemical deposition coating on the outer surface of the bare conductor; and v. removing the coated overhead conductor from the aqueous solution. 41. The method of claim 40, wherein the current is pulsed. 42. The method of claim 40, wherein the current is from about 10 amps/square foot to about 400 amps/square foot. 43. The method of claim 40, wherein the metal is titanium or zirconium. 44. The method of claim 22, wherein the metal oxide is titanium oxide or zirconium oxide. 45. A coated overhead conductor comprising an assembly including one or more conductive wires, wherein the one or more conductive wires are formed of aluminum or aluminum alloy, wherein the assembly comprises an outer surface coated with an electrochemical deposition coating forming an outer layer, the electrochemical deposition coating comprises titanium oxide, zirconium oxide or combinations thereof, and the outer layer has a thickness from about 5 microns to about 25 microns. | 2,800 |
11,315 | 11,315 | 14,623,345 | 2,863 | A method, system, and/or computer program product determines conditions of intermodal shipping containers on a cargo ship. A processor establishes a baseline composite vibration pattern from readings generated by multiple vibration sensors that are affixed to multiple intermodal shipping containers on a cargo ship. Subsequent readings are taken from the multiple vibration sensors to generate a new composite vibration pattern. The processor also receives humidity readings from humidity sensors that are affixed to interiors of the multiple intermodal shipping containers, and then combines the humidity readings with the new composite vibration pattern to create a vibration/humidity pattern. In response to the new composite vibration pattern being different from the baseline composite vibration pattern, the processor matches the vibration/humidity pattern with a known vibration/humidity pattern in order to identify a cause of the new vibration/humidity pattern and a condition of the intermodal shipping containers. | 1. A method of determining conditions of intermodal shipping containers on a cargo ship, the method comprising:
a processor establishing a baseline composite vibration pattern from readings generated by multiple vibration sensors, wherein each vibration sensor, of the multiple vibration sensors, is a uniquely-identified vibration sensor that has been affixed to one of multiple intermodal shipping containers, wherein each vibration sensor comprises a vibration sensor for detecting mechanical vibration, wherein the multiple intermodal shipping containers have been loaded onto a cargo ship, and wherein the baseline composite vibration pattern is generated by combining two or more frequency plus amplitude vibration patterns generated by two or more of the multiple vibration sensors that are affixed to the multiple intermodal shipping containers; the processor taking subsequent readings from the multiple vibration sensors to generate a new composite vibration pattern, wherein the new composite vibration pattern is generated by combining two or more new frequency plus amplitude vibration patterns generated by two or more of the multiple vibration sensors that are affixed to the multiple intermodal shipping containers; the processor receiving humidity readings from humidity sensors affixed to interiors of each of the multiple intermodal shipping containers; the processor combining the humidity readings with the new composite vibration pattern to create a new vibration/humidity pattern; and the processor, in response to the new composite vibration pattern being different, beyond a predefined range, from the baseline composite vibration pattern, matching the new vibration/humidity pattern with a known vibration/humidity pattern in order to identify a cause of the new vibration/humidity pattern and a condition of the intermodal shipping containers. 2. The computer-implemented method of claim 1, further comprising:
the processor identifying a physical shifting of the multiple intermodal shipping containers by matching the new composite vibration pattern with a known vibration pattern. 3. The computer-implemented method of claim 1, further comprising:
the processor identifying damage to a non-mechanical physical structure of the cargo ship by matching the new composite vibration pattern with the known vibration pattern. 4. The computer-implemented method of claim 1, further comprising:
the processor identifying damage to a drive train of the cargo ship by matching the matching the new composite vibration pattern with a known vibration pattern. 5. The computer-implemented method of claim 1, wherein said each vibration sensor further comprises an acoustic sensor, and wherein the method further comprises:
the processor incorporating acoustic readings from acoustic sensors in the multiple vibration sensors to modify the baseline composite vibration pattern to create a baseline vibration/acoustic composite pattern; the processor incorporating subsequent acoustic readings from the acoustic sensors to generate a new composite vibration/acoustic pattern; and the processor, in response to the new composite vibration/acoustic pattern being different from the baseline composite vibration/acoustic pattern, matching the new composite vibration/acoustic pattern with a known composite vibration/acoustic pattern in order to identify a cause of the new composite vibration/acoustic pattern. 6. The computer-implemented method of claim 1, wherein said each vibration sensor further comprises a chemical sensor, and wherein the method further comprises:
the processor incorporating chemical readings from chemical sensors in the multiple vibration sensors to modify the baseline composite vibration pattern to create a baseline composite vibration/chemical pattern; the processor incorporating subsequent chemical readings from the chemical sensors to generate a new composite vibration/chemical pattern; and the processor, in response to the new composite vibration/chemical pattern being different from the baseline composite vibration/chemical pattern, matching the new composite vibration/chemical pattern with a known composite vibration/chemical pattern in order to identify a cause of the new composite vibration/chemical pattern. 7. The computer-implemented method of claim 1, further comprising:
in response to a pre-determined level of change in weather conditions currently being experienced by the cargo ship, the processor re-establishing the baseline composite vibration pattern by taking new readings from the multiple vibration sensors. 8. The computer-implemented method of claim 1, wherein each of the vibration sensors comprises a uniquely-identified radio frequency identifier (RFID) device, and wherein the computer implemented method further comprises:
the processor mapping a location of each of the multiple intermodal shipping containers by interrogating RFID devices in the multiple vibration sensors; and the processor adjusting the baseline composite vibration pattern and the new composite vibration pattern according to the location of each of the multiple intermodal shipping containers. 9. A non-transitory computer readable storage medium containing computer executable instructions to perform a method for determining conditions of intermodal shipping containers on a cargo ship, the method comprising:
establishing a baseline composite vibration pattern from readings generated by multiple vibration sensors, wherein each vibration sensor, of the multiple vibration sensors, is a uniquely-identified vibration sensor that has been affixed to one of multiple intermodal shipping containers, wherein each vibration sensor comprises a vibration sensor for detecting mechanical vibration, wherein the multiple intermodal shipping containers have been loaded onto a cargo ship, and wherein the baseline composite vibration pattern is generated by combining two or more frequency plus amplitude vibration patterns generated by two or more of the multiple vibration sensors that are affixed to the multiple intermodal shipping containers; taking subsequent readings from the multiple vibration sensors to generate a new composite vibration pattern, wherein the new composite vibration pattern is generated by combining two or more new frequency plus amplitude vibration patterns generated by two or more of the multiple vibration sensors that are affixed to the multiple intermodal shipping containers; receiving humidity readings from humidity sensors affixed to interiors of each of the multiple intermodal shipping containers; combining the humidity readings with the new composite vibration pattern to create a vibration/humidity pattern; and in response to the new composite vibration pattern being different, beyond a predefined range, from the baseline composite vibration pattern, matching the vibration/humidity pattern with a known vibration/humidity pattern in order to identify a cause of the new vibration/humidity pattern and a condition of the intermodal shipping containers. 10. The non-transitory computer readable storage medium of claim 9, wherein the method further comprises:
identifying a physical shifting of the multiple intermodal shipping containers by matching the new composite vibration pattern with a known vibration pattern. 11. The non-transitory computer readable storage medium of claim 9, wherein the method further comprises:
identifying damage to a non-mechanical physical structure of the cargo ship by matching the new composite vibration pattern with a known vibration pattern. 12. The non-transitory computer readable storage medium of claim 9, wherein the method further comprises:
identifying damage to a drive train of the cargo ship by matching the new composite vibration pattern with a known vibration pattern. 13. The non-transitory computer readable storage medium of claim 9, wherein said each vibration sensor further comprises an acoustic sensor, and wherein the method further comprises:
incorporating acoustic readings from acoustic sensors in the multiple vibration sensors to modify the baseline composite vibration pattern to create a baseline vibration/acoustic composite pattern; incorporating subsequent acoustic readings from the acoustic sensors to generate a new composite vibration/acoustic pattern; and in response to the new composite vibration/acoustic pattern being different from the baseline composite vibration/acoustic pattern, matching the new composite vibration/acoustic pattern with a known composite vibration/acoustic pattern in order to identify a cause of the new composite vibration/acoustic pattern. 14. The non-transitory computer readable storage medium of claim 9, wherein said each vibration sensor further comprises a chemical sensor, and wherein the method further comprises:
incorporating chemical readings from chemical sensors in the multiple vibration sensors to modify the baseline composite vibration pattern to create a baseline composite vibration/chemical pattern; incorporating subsequent chemical readings from the chemical sensors to generate a new composite vibration/chemical pattern; and in response to the new composite vibration/chemical pattern being different from the baseline composite vibration/chemical pattern, matching the new composite vibration/chemical pattern with a known composite vibration/chemical pattern in order to identify a cause of the new composite vibration/chemical pattern. 15. The non-transitory computer readable storage medium of claim 9, wherein the method further comprises:
in response to a pre-determined level of change in weather conditions currently being experienced by the cargo ship, the processor re-establishing the baseline composite vibration pattern by taking new readings from the multiple vibration sensors. 16. The non-transitory computer readable storage medium of claim 9, wherein each of the vibration sensors comprises a uniquely-identified radio frequency identifier (RFID) device, and wherein the method further comprises:
mapping a location of each of the multiple intermodal shipping containers by interrogating RFID devices in the multiple vibration sensors; and adjusting the baseline composite vibration pattern and the new composite vibration pattern according to the location of each of the multiple intermodal shipping containers. 17. A system comprising:
a processor, a computer readable memory, and a computer readable storage media; first program instructions to establish a baseline composite vibration pattern from readings generated by multiple vibration sensors, wherein each vibration sensor, of the multiple vibration sensors, is a uniquely-identified vibration sensor that has been affixed to one of multiple intermodal shipping containers, wherein each vibration sensor comprises a vibration sensor for detecting mechanical vibration, wherein the multiple intermodal shipping containers have been loaded onto a cargo ship, and wherein the baseline composite vibration pattern is generated by combining two or more frequency plus amplitude vibration patterns generated by two or more of the multiple vibration sensors that are affixed to the multiple intermodal shipping containers; second program instructions to take subsequent readings from the multiple vibration sensors to generate a new composite vibration pattern, wherein the new composite vibration pattern is generated by combining two or more new frequency plus amplitude vibration patterns generated by two or more of the multiple vibration sensors that are affixed to the multiple intermodal shipping containers; third program instructions to receive humidity readings from humidity sensors affixed to interiors of each of the multiple intermodal shipping containers; fourth program instructions to combine the humidity readings with the new composite vibration pattern to create a vibration/humidity pattern; and fifth program instructions to in response to the new composite vibration pattern being different, beyond a predefined range, from the baseline composite vibration pattern, match the vibration/humidity pattern with a known vibration/humidity pattern in order to identify a cause of the new vibration/humidity pattern and a condition of the intermodal shipping containers; and wherein
the first, second, third, fourth, and fifth program instructions are stored on the computer readable storage media for execution by the processor via the computer readable memory. 18. The system of claim 17, further comprising:
sixth program instructions to identify a physical shifting of the multiple intermodal shipping containers by matching the new composite vibration pattern with a known vibration pattern; and wherein
the sixth program instructions are stored on the computer readable storage media for execution by the processor via the computer readable memory. 19. The system of claim 17, further comprising:
sixth program instructions to, in response to a pre-determined level of change in weather conditions currently being experienced by the cargo ship, re-establish the baseline composite vibration pattern by taking new readings from the multiple vibration sensors; and wherein the sixth program instructions are stored on the computer readable storage media for execution by the processor via the computer readable memory. 20. The system of claim 17, wherein each of the vibration sensors comprises a uniquely-identified radio frequency identifier (RFID) device, and wherein the system further comprises:
sixth program instructions to map a location of each of the multiple intermodal shipping containers by interrogating RFID devices in the multiple vibration sensors; and seventh program instructions to adjust the baseline composite vibration pattern and the new composite vibration pattern according to the location of each of the multiple intermodal shipping containers; and wherein
the sixth and seventh program instructions are stored on the computer readable storage media for execution by the processor via the computer readable memory. | A method, system, and/or computer program product determines conditions of intermodal shipping containers on a cargo ship. A processor establishes a baseline composite vibration pattern from readings generated by multiple vibration sensors that are affixed to multiple intermodal shipping containers on a cargo ship. Subsequent readings are taken from the multiple vibration sensors to generate a new composite vibration pattern. The processor also receives humidity readings from humidity sensors that are affixed to interiors of the multiple intermodal shipping containers, and then combines the humidity readings with the new composite vibration pattern to create a vibration/humidity pattern. In response to the new composite vibration pattern being different from the baseline composite vibration pattern, the processor matches the vibration/humidity pattern with a known vibration/humidity pattern in order to identify a cause of the new vibration/humidity pattern and a condition of the intermodal shipping containers.1. A method of determining conditions of intermodal shipping containers on a cargo ship, the method comprising:
a processor establishing a baseline composite vibration pattern from readings generated by multiple vibration sensors, wherein each vibration sensor, of the multiple vibration sensors, is a uniquely-identified vibration sensor that has been affixed to one of multiple intermodal shipping containers, wherein each vibration sensor comprises a vibration sensor for detecting mechanical vibration, wherein the multiple intermodal shipping containers have been loaded onto a cargo ship, and wherein the baseline composite vibration pattern is generated by combining two or more frequency plus amplitude vibration patterns generated by two or more of the multiple vibration sensors that are affixed to the multiple intermodal shipping containers; the processor taking subsequent readings from the multiple vibration sensors to generate a new composite vibration pattern, wherein the new composite vibration pattern is generated by combining two or more new frequency plus amplitude vibration patterns generated by two or more of the multiple vibration sensors that are affixed to the multiple intermodal shipping containers; the processor receiving humidity readings from humidity sensors affixed to interiors of each of the multiple intermodal shipping containers; the processor combining the humidity readings with the new composite vibration pattern to create a new vibration/humidity pattern; and the processor, in response to the new composite vibration pattern being different, beyond a predefined range, from the baseline composite vibration pattern, matching the new vibration/humidity pattern with a known vibration/humidity pattern in order to identify a cause of the new vibration/humidity pattern and a condition of the intermodal shipping containers. 2. The computer-implemented method of claim 1, further comprising:
the processor identifying a physical shifting of the multiple intermodal shipping containers by matching the new composite vibration pattern with a known vibration pattern. 3. The computer-implemented method of claim 1, further comprising:
the processor identifying damage to a non-mechanical physical structure of the cargo ship by matching the new composite vibration pattern with the known vibration pattern. 4. The computer-implemented method of claim 1, further comprising:
the processor identifying damage to a drive train of the cargo ship by matching the matching the new composite vibration pattern with a known vibration pattern. 5. The computer-implemented method of claim 1, wherein said each vibration sensor further comprises an acoustic sensor, and wherein the method further comprises:
the processor incorporating acoustic readings from acoustic sensors in the multiple vibration sensors to modify the baseline composite vibration pattern to create a baseline vibration/acoustic composite pattern; the processor incorporating subsequent acoustic readings from the acoustic sensors to generate a new composite vibration/acoustic pattern; and the processor, in response to the new composite vibration/acoustic pattern being different from the baseline composite vibration/acoustic pattern, matching the new composite vibration/acoustic pattern with a known composite vibration/acoustic pattern in order to identify a cause of the new composite vibration/acoustic pattern. 6. The computer-implemented method of claim 1, wherein said each vibration sensor further comprises a chemical sensor, and wherein the method further comprises:
the processor incorporating chemical readings from chemical sensors in the multiple vibration sensors to modify the baseline composite vibration pattern to create a baseline composite vibration/chemical pattern; the processor incorporating subsequent chemical readings from the chemical sensors to generate a new composite vibration/chemical pattern; and the processor, in response to the new composite vibration/chemical pattern being different from the baseline composite vibration/chemical pattern, matching the new composite vibration/chemical pattern with a known composite vibration/chemical pattern in order to identify a cause of the new composite vibration/chemical pattern. 7. The computer-implemented method of claim 1, further comprising:
in response to a pre-determined level of change in weather conditions currently being experienced by the cargo ship, the processor re-establishing the baseline composite vibration pattern by taking new readings from the multiple vibration sensors. 8. The computer-implemented method of claim 1, wherein each of the vibration sensors comprises a uniquely-identified radio frequency identifier (RFID) device, and wherein the computer implemented method further comprises:
the processor mapping a location of each of the multiple intermodal shipping containers by interrogating RFID devices in the multiple vibration sensors; and the processor adjusting the baseline composite vibration pattern and the new composite vibration pattern according to the location of each of the multiple intermodal shipping containers. 9. A non-transitory computer readable storage medium containing computer executable instructions to perform a method for determining conditions of intermodal shipping containers on a cargo ship, the method comprising:
establishing a baseline composite vibration pattern from readings generated by multiple vibration sensors, wherein each vibration sensor, of the multiple vibration sensors, is a uniquely-identified vibration sensor that has been affixed to one of multiple intermodal shipping containers, wherein each vibration sensor comprises a vibration sensor for detecting mechanical vibration, wherein the multiple intermodal shipping containers have been loaded onto a cargo ship, and wherein the baseline composite vibration pattern is generated by combining two or more frequency plus amplitude vibration patterns generated by two or more of the multiple vibration sensors that are affixed to the multiple intermodal shipping containers; taking subsequent readings from the multiple vibration sensors to generate a new composite vibration pattern, wherein the new composite vibration pattern is generated by combining two or more new frequency plus amplitude vibration patterns generated by two or more of the multiple vibration sensors that are affixed to the multiple intermodal shipping containers; receiving humidity readings from humidity sensors affixed to interiors of each of the multiple intermodal shipping containers; combining the humidity readings with the new composite vibration pattern to create a vibration/humidity pattern; and in response to the new composite vibration pattern being different, beyond a predefined range, from the baseline composite vibration pattern, matching the vibration/humidity pattern with a known vibration/humidity pattern in order to identify a cause of the new vibration/humidity pattern and a condition of the intermodal shipping containers. 10. The non-transitory computer readable storage medium of claim 9, wherein the method further comprises:
identifying a physical shifting of the multiple intermodal shipping containers by matching the new composite vibration pattern with a known vibration pattern. 11. The non-transitory computer readable storage medium of claim 9, wherein the method further comprises:
identifying damage to a non-mechanical physical structure of the cargo ship by matching the new composite vibration pattern with a known vibration pattern. 12. The non-transitory computer readable storage medium of claim 9, wherein the method further comprises:
identifying damage to a drive train of the cargo ship by matching the new composite vibration pattern with a known vibration pattern. 13. The non-transitory computer readable storage medium of claim 9, wherein said each vibration sensor further comprises an acoustic sensor, and wherein the method further comprises:
incorporating acoustic readings from acoustic sensors in the multiple vibration sensors to modify the baseline composite vibration pattern to create a baseline vibration/acoustic composite pattern; incorporating subsequent acoustic readings from the acoustic sensors to generate a new composite vibration/acoustic pattern; and in response to the new composite vibration/acoustic pattern being different from the baseline composite vibration/acoustic pattern, matching the new composite vibration/acoustic pattern with a known composite vibration/acoustic pattern in order to identify a cause of the new composite vibration/acoustic pattern. 14. The non-transitory computer readable storage medium of claim 9, wherein said each vibration sensor further comprises a chemical sensor, and wherein the method further comprises:
incorporating chemical readings from chemical sensors in the multiple vibration sensors to modify the baseline composite vibration pattern to create a baseline composite vibration/chemical pattern; incorporating subsequent chemical readings from the chemical sensors to generate a new composite vibration/chemical pattern; and in response to the new composite vibration/chemical pattern being different from the baseline composite vibration/chemical pattern, matching the new composite vibration/chemical pattern with a known composite vibration/chemical pattern in order to identify a cause of the new composite vibration/chemical pattern. 15. The non-transitory computer readable storage medium of claim 9, wherein the method further comprises:
in response to a pre-determined level of change in weather conditions currently being experienced by the cargo ship, the processor re-establishing the baseline composite vibration pattern by taking new readings from the multiple vibration sensors. 16. The non-transitory computer readable storage medium of claim 9, wherein each of the vibration sensors comprises a uniquely-identified radio frequency identifier (RFID) device, and wherein the method further comprises:
mapping a location of each of the multiple intermodal shipping containers by interrogating RFID devices in the multiple vibration sensors; and adjusting the baseline composite vibration pattern and the new composite vibration pattern according to the location of each of the multiple intermodal shipping containers. 17. A system comprising:
a processor, a computer readable memory, and a computer readable storage media; first program instructions to establish a baseline composite vibration pattern from readings generated by multiple vibration sensors, wherein each vibration sensor, of the multiple vibration sensors, is a uniquely-identified vibration sensor that has been affixed to one of multiple intermodal shipping containers, wherein each vibration sensor comprises a vibration sensor for detecting mechanical vibration, wherein the multiple intermodal shipping containers have been loaded onto a cargo ship, and wherein the baseline composite vibration pattern is generated by combining two or more frequency plus amplitude vibration patterns generated by two or more of the multiple vibration sensors that are affixed to the multiple intermodal shipping containers; second program instructions to take subsequent readings from the multiple vibration sensors to generate a new composite vibration pattern, wherein the new composite vibration pattern is generated by combining two or more new frequency plus amplitude vibration patterns generated by two or more of the multiple vibration sensors that are affixed to the multiple intermodal shipping containers; third program instructions to receive humidity readings from humidity sensors affixed to interiors of each of the multiple intermodal shipping containers; fourth program instructions to combine the humidity readings with the new composite vibration pattern to create a vibration/humidity pattern; and fifth program instructions to in response to the new composite vibration pattern being different, beyond a predefined range, from the baseline composite vibration pattern, match the vibration/humidity pattern with a known vibration/humidity pattern in order to identify a cause of the new vibration/humidity pattern and a condition of the intermodal shipping containers; and wherein
the first, second, third, fourth, and fifth program instructions are stored on the computer readable storage media for execution by the processor via the computer readable memory. 18. The system of claim 17, further comprising:
sixth program instructions to identify a physical shifting of the multiple intermodal shipping containers by matching the new composite vibration pattern with a known vibration pattern; and wherein
the sixth program instructions are stored on the computer readable storage media for execution by the processor via the computer readable memory. 19. The system of claim 17, further comprising:
sixth program instructions to, in response to a pre-determined level of change in weather conditions currently being experienced by the cargo ship, re-establish the baseline composite vibration pattern by taking new readings from the multiple vibration sensors; and wherein the sixth program instructions are stored on the computer readable storage media for execution by the processor via the computer readable memory. 20. The system of claim 17, wherein each of the vibration sensors comprises a uniquely-identified radio frequency identifier (RFID) device, and wherein the system further comprises:
sixth program instructions to map a location of each of the multiple intermodal shipping containers by interrogating RFID devices in the multiple vibration sensors; and seventh program instructions to adjust the baseline composite vibration pattern and the new composite vibration pattern according to the location of each of the multiple intermodal shipping containers; and wherein
the sixth and seventh program instructions are stored on the computer readable storage media for execution by the processor via the computer readable memory. | 2,800 |
11,316 | 11,316 | 15,101,186 | 2,868 | The present invention is directed towards a mobile apparatus mounted to a motor vehicle for detecting energized objects. In some embodiments, the mobile apparatus comprising two or more photonic sensors, mounted to the motor vehicle, and coupled to a photo-receiver, wherein the photo-receiver generates a signal corresponding to an electric field detected by the two or more photonic sensors, for narrowing down the location of a hazardously energized object, a processor, coupled to the two or more photonic sensors, that digitizes the signal to form electric field data, produces field strengths of each of the at least one sensor probes, analyzes the field strengths to identify a general location of the hazardously energized object in the electric field, wherein the electric field data is analyzed based on an expected frequency pertaining to hazardous energy to locate an energized object proximate a street; and an indicator, coupled to the processor, that alerts a user to a presence of the energized object in the electric field proximate the street. | 1. A mobile apparatus mounted to a motor vehicle for detecting energized objects, comprising:
at least one sensor probe, mounted to the motor vehicle, that generates a first signal corresponding to an electric field detected by the at least one sensor probe, and wherein the at least one sensor probe comprises at least one electrode; at least one photonic sensor, mounted to the motor vehicle, that generates a second signal corresponding to an electric field detected by the at least one photonic sensor, for narrowing down the location of a stray voltage anomaly; a processor, coupled to the at least one sensor probe, that digitizes the first signal to form electric field data, produces field strengths of each of the at least one sensor probes, analyzes the field strengths to identify a general location of a voltage anomaly in the electric field, digitizes the second signal to form electric field data, produces field strengths for the at least one photonic sensor, and analyzes the field strengths to identify a specific location of a voltage anomaly in the electric field, wherein the electric field data is analyzed based on an expected frequency pertaining to the voltage anomaly to locate an energized object proximate a street; and an indicator, coupled to the processor, that alerts a user to a presence of the voltage anomaly in the electric field proximate the street. 2. The apparatus of claim 1, further comprising:
a broadband laser optically coupled to an input of the photonic sensor; and a photo receiver coupled to the photonic sensor to receive a digital signal from the photonic sensor, wherein the photo receiver outputs a signal corresponding to the electric field to the processor. 3. The apparatus of claim 2, wherein the photo receiver is coupled to the photonic sensor via a fiber-optic cable. 4. The apparatus of claim 2, wherein the laser is approximately a 1550 nm laser. 5. The apparatus of claim 1, wherein the sensor probe initially locates a general area within which stray anomalous voltages are measured. 6. The apparatus of claim 1, wherein the one or more photonic sensors further narrow the location of the stray anomalous voltage. 7. The apparatus of claim 1, wherein the one or more photonic sensors are composed of non-conducting material minimally perturbing to the electric field. 8. The apparatus of claim 1, further comprising:
a computer, coupled to the processor, that enables the one or more sensor probes initially to analyze field strength to determine if a potentially energized object is nearby, and subsequently enables the one or more photonic sensors once it is determined that the potentially energized object is nearby. 9. The apparatus of claim 1, wherein the one or more photonic sensors are mounted on the motor vehicle and the one or more photonic sensors are positioned in symmetrical rotational offsets from each other to broaden the temporal range of detection of energized objects. 10. The apparatus of claim 1, wherein the one or more photonic sensors are mounted on the motor vehicle and the one or more photonic sensors are positioned in a cross pattern with respect to each other. 11. A mobile apparatus mounted to a motor vehicle for detecting energized objects, comprising:
two or more photonic sensors, mounted to the motor vehicle, and coupled to a photo-receiver, wherein the photo-receiver generates a signal corresponding to an electric field detected by the two or more photonic sensors, for narrowing down the location of a hazardously energized object; a processor, coupled to the two or more photonic sensors, that digitizes the signal to form electric field data, produces field strengths of each of the at least one sensor probes, analyzes the field strengths to identify a general location of the hazardously energized object in the electric field, wherein the electric field data is analyzed based on an expected frequency pertaining to hazardous energy to locate an energized object proximate a street; and an indicator, coupled to the processor that alerts a user to a presence of the energized object in the electric field proximate the street. 12. The apparatus of claim 11, wherein the two or more photonic sensors are mounted on the motor vehicle transverse to each other and parallel to the base of the motor vehicle to expand temporal sensitivity. 13. The apparatus of claim 12, wherein a second two or more photonic sensors, transverse to each other, are mounted perpendicular to the base of the motor vehicle to expand angular sensitivity. 14. The apparatus of claim 11, further comprising a broadband laser optically coupled to an input of the two or more photonic sensors. 15. The apparatus of claim 14, wherein the photo receiver coupled to the two or more photonic sensors receives a digital signal from the photonic sensor and the photo receiver outputs a signal corresponding to the electric field to the processor. | The present invention is directed towards a mobile apparatus mounted to a motor vehicle for detecting energized objects. In some embodiments, the mobile apparatus comprising two or more photonic sensors, mounted to the motor vehicle, and coupled to a photo-receiver, wherein the photo-receiver generates a signal corresponding to an electric field detected by the two or more photonic sensors, for narrowing down the location of a hazardously energized object, a processor, coupled to the two or more photonic sensors, that digitizes the signal to form electric field data, produces field strengths of each of the at least one sensor probes, analyzes the field strengths to identify a general location of the hazardously energized object in the electric field, wherein the electric field data is analyzed based on an expected frequency pertaining to hazardous energy to locate an energized object proximate a street; and an indicator, coupled to the processor, that alerts a user to a presence of the energized object in the electric field proximate the street.1. A mobile apparatus mounted to a motor vehicle for detecting energized objects, comprising:
at least one sensor probe, mounted to the motor vehicle, that generates a first signal corresponding to an electric field detected by the at least one sensor probe, and wherein the at least one sensor probe comprises at least one electrode; at least one photonic sensor, mounted to the motor vehicle, that generates a second signal corresponding to an electric field detected by the at least one photonic sensor, for narrowing down the location of a stray voltage anomaly; a processor, coupled to the at least one sensor probe, that digitizes the first signal to form electric field data, produces field strengths of each of the at least one sensor probes, analyzes the field strengths to identify a general location of a voltage anomaly in the electric field, digitizes the second signal to form electric field data, produces field strengths for the at least one photonic sensor, and analyzes the field strengths to identify a specific location of a voltage anomaly in the electric field, wherein the electric field data is analyzed based on an expected frequency pertaining to the voltage anomaly to locate an energized object proximate a street; and an indicator, coupled to the processor, that alerts a user to a presence of the voltage anomaly in the electric field proximate the street. 2. The apparatus of claim 1, further comprising:
a broadband laser optically coupled to an input of the photonic sensor; and a photo receiver coupled to the photonic sensor to receive a digital signal from the photonic sensor, wherein the photo receiver outputs a signal corresponding to the electric field to the processor. 3. The apparatus of claim 2, wherein the photo receiver is coupled to the photonic sensor via a fiber-optic cable. 4. The apparatus of claim 2, wherein the laser is approximately a 1550 nm laser. 5. The apparatus of claim 1, wherein the sensor probe initially locates a general area within which stray anomalous voltages are measured. 6. The apparatus of claim 1, wherein the one or more photonic sensors further narrow the location of the stray anomalous voltage. 7. The apparatus of claim 1, wherein the one or more photonic sensors are composed of non-conducting material minimally perturbing to the electric field. 8. The apparatus of claim 1, further comprising:
a computer, coupled to the processor, that enables the one or more sensor probes initially to analyze field strength to determine if a potentially energized object is nearby, and subsequently enables the one or more photonic sensors once it is determined that the potentially energized object is nearby. 9. The apparatus of claim 1, wherein the one or more photonic sensors are mounted on the motor vehicle and the one or more photonic sensors are positioned in symmetrical rotational offsets from each other to broaden the temporal range of detection of energized objects. 10. The apparatus of claim 1, wherein the one or more photonic sensors are mounted on the motor vehicle and the one or more photonic sensors are positioned in a cross pattern with respect to each other. 11. A mobile apparatus mounted to a motor vehicle for detecting energized objects, comprising:
two or more photonic sensors, mounted to the motor vehicle, and coupled to a photo-receiver, wherein the photo-receiver generates a signal corresponding to an electric field detected by the two or more photonic sensors, for narrowing down the location of a hazardously energized object; a processor, coupled to the two or more photonic sensors, that digitizes the signal to form electric field data, produces field strengths of each of the at least one sensor probes, analyzes the field strengths to identify a general location of the hazardously energized object in the electric field, wherein the electric field data is analyzed based on an expected frequency pertaining to hazardous energy to locate an energized object proximate a street; and an indicator, coupled to the processor that alerts a user to a presence of the energized object in the electric field proximate the street. 12. The apparatus of claim 11, wherein the two or more photonic sensors are mounted on the motor vehicle transverse to each other and parallel to the base of the motor vehicle to expand temporal sensitivity. 13. The apparatus of claim 12, wherein a second two or more photonic sensors, transverse to each other, are mounted perpendicular to the base of the motor vehicle to expand angular sensitivity. 14. The apparatus of claim 11, further comprising a broadband laser optically coupled to an input of the two or more photonic sensors. 15. The apparatus of claim 14, wherein the photo receiver coupled to the two or more photonic sensors receives a digital signal from the photonic sensor and the photo receiver outputs a signal corresponding to the electric field to the processor. | 2,800 |
11,317 | 11,317 | 13,281,489 | 2,847 | A theft deterrent product may be provided. First, a plurality of unique codes may be created. Then a plurality of indicia may be placed periodically and longitudinally on the product. The plurality of indicia may respectively correspond to the plurality of unique codes. The product may have an outer layer and into an portion. Placing the plurality of indicia may comprise etching through the outer layer and into the inner portion. In a database, the plurality of unique codes may be assigned to an organizational entity. The organizational entity may comprise a first enterprise. | 1. A product comprising at least one indicia placed on the product, the at least one indicia corresponding to a unique code, wherein the at least one indicia is visible from an exterior of the product and wherein the product is metal based. 2. The product of claim 1, wherein the product is longitudinally continuous. 3. The product of claim 1, wherein the at least one indicia is placed longitudinally on the product. 4. The product of claim 1, wherein the at least one indicia is placed on the product perpendicular to a longitudinal axis of the product. 5. The product of claim 1, wherein the at least one indicia is placed on the product at an angle that is not perpendicular to a longitudinal axis of the product and not parallel to the longitudinal axis of the product. 6. The product of claim 1, wherein individual characters comprising the at least one indicia are placed on the product at an angle that is not perpendicular to a longitudinal axis of the product and not parallel to the longitudinal axis of the product. 7. The product of claim 1, wherein the at least one indicia is tamper proof. 8. The product of claim 1, wherein the at least one indicia is laser etched. 9. The product of claim 1, wherein the at least one indicia is chemically etched. 10. The product of claim 1, wherein the at least one indicia is placed on the product via ink. 11. The product of claim 1, wherein the at least one indicia is placed on the product via a high speed indexing printing wheel. 12. The product of claim 1, wherein the unique code is encrypted in the at least one indicia. 13. The product of claim 1, wherein the at least one indicia includes a sequential number portion corresponding to a sequential number that is incremented by an amount equal to a predetermined distance along the product. 14. The product of claim 1, wherein the product comprises copper. 15. The product of claim 1, wherein the product comprises tubing. 16. The product of claim 1, wherein the product comprises copper tubing. 17. The product of claim 1, wherein the product comprises tubing configured to be used for refrigerant. 18. The product of claim 1, wherein the product comprises a metal wire clad with another metal. 19. A product comprising a plurality of indicia placed on the product, each of the plurality of indicia respectively corresponding to a unique code, wherein the plurality of indicia are visible from an exterior of the product. 20. The product of claim 19, wherein the plurality of indicia are placed on the product periodically. 21. The product of claim 19, wherein the plurality of indicia are placed on the product perpendicular to a longitudinal axis of the product. 22. The product of claim 19, wherein the product comprises tubing configured to be used for refrigerant. 23. A product comprising a plurality of indicia placed periodically and longitudinally on the product comprising copper tubing configured to be used for refrigerant, each of the plurality of indicia respectively corresponding to a unique code, wherein the plurality of indicia are visible from an exterior of the product. | A theft deterrent product may be provided. First, a plurality of unique codes may be created. Then a plurality of indicia may be placed periodically and longitudinally on the product. The plurality of indicia may respectively correspond to the plurality of unique codes. The product may have an outer layer and into an portion. Placing the plurality of indicia may comprise etching through the outer layer and into the inner portion. In a database, the plurality of unique codes may be assigned to an organizational entity. The organizational entity may comprise a first enterprise.1. A product comprising at least one indicia placed on the product, the at least one indicia corresponding to a unique code, wherein the at least one indicia is visible from an exterior of the product and wherein the product is metal based. 2. The product of claim 1, wherein the product is longitudinally continuous. 3. The product of claim 1, wherein the at least one indicia is placed longitudinally on the product. 4. The product of claim 1, wherein the at least one indicia is placed on the product perpendicular to a longitudinal axis of the product. 5. The product of claim 1, wherein the at least one indicia is placed on the product at an angle that is not perpendicular to a longitudinal axis of the product and not parallel to the longitudinal axis of the product. 6. The product of claim 1, wherein individual characters comprising the at least one indicia are placed on the product at an angle that is not perpendicular to a longitudinal axis of the product and not parallel to the longitudinal axis of the product. 7. The product of claim 1, wherein the at least one indicia is tamper proof. 8. The product of claim 1, wherein the at least one indicia is laser etched. 9. The product of claim 1, wherein the at least one indicia is chemically etched. 10. The product of claim 1, wherein the at least one indicia is placed on the product via ink. 11. The product of claim 1, wherein the at least one indicia is placed on the product via a high speed indexing printing wheel. 12. The product of claim 1, wherein the unique code is encrypted in the at least one indicia. 13. The product of claim 1, wherein the at least one indicia includes a sequential number portion corresponding to a sequential number that is incremented by an amount equal to a predetermined distance along the product. 14. The product of claim 1, wherein the product comprises copper. 15. The product of claim 1, wherein the product comprises tubing. 16. The product of claim 1, wherein the product comprises copper tubing. 17. The product of claim 1, wherein the product comprises tubing configured to be used for refrigerant. 18. The product of claim 1, wherein the product comprises a metal wire clad with another metal. 19. A product comprising a plurality of indicia placed on the product, each of the plurality of indicia respectively corresponding to a unique code, wherein the plurality of indicia are visible from an exterior of the product. 20. The product of claim 19, wherein the plurality of indicia are placed on the product periodically. 21. The product of claim 19, wherein the plurality of indicia are placed on the product perpendicular to a longitudinal axis of the product. 22. The product of claim 19, wherein the product comprises tubing configured to be used for refrigerant. 23. A product comprising a plurality of indicia placed periodically and longitudinally on the product comprising copper tubing configured to be used for refrigerant, each of the plurality of indicia respectively corresponding to a unique code, wherein the plurality of indicia are visible from an exterior of the product. | 2,800 |
11,318 | 11,318 | 14,308,976 | 2,822 | A substrate is provided. The substrate has a source/drain region formed therein and a dielectric layer formed thereover. A contact hole is etched in the dielectric layer to expose a portion of the source/drain region. A metal material is formed on the source/drain region exposed by the opening. A first annealing process is performed to facilitate a reaction between the metal material and the portion of the source/drain region disposed therebelow, thereby forming a metal silicide in the substrate. The first annealing process is a spike annealing process. A remaining portion of the metal material is removed after the performing of the first annealing process. Thereafter, a second annealing process is performed. Thereafter, a contact is formed in the contact hole, the contact being formed on the metal silicide. | 1. A method of fabricating a semiconductor device, comprising:
providing a substrate having a source/drain region formed therein and a dielectric layer formed thereover; forming an opening in the dielectric layer, wherein the opening exposes the source/drain region; depositing a metal on the substrate in the opening; and performing an annealing process that causes the metal to react with a portion of the substrate disposed therebelow, wherein a reaction of the metal and the portion of the substrate forms a metal silicide in the source/drain region, and wherein the annealing process has a spike profile. 2. The method of claim 1, wherein the annealing process is performed at an annealing temperature in a range from about 200 degrees Celsius to about 300 degrees Celsius. 3. The method of claim 2, wherein the annealing process has an annealing duration that is shorter than about 5 seconds 4. The method of claim 1, further comprising: before the depositing of the metal, performing an implantation process through the opening. 5. The method of claim 4, wherein the implantation process is performed in a manner so as to amorphize the portion of the substrate. 6. The method of claim 1, further comprising: after the annealing process is performed, forming a conductive contact element in the opening and on the metal silicide. 7. The method of claim 6, further comprising: after the annealing process is performed and before the forming of the conductive contact, removing portions of the metal that has not reacted with the portion of the substrate. 8. The method of claim 7, further comprising: after the removing of the portions of the metal and before the forming of the conductive contact, performing a further annealing process, wherein the further annealing process is free of a spike profile. 9. The method of claim 1, further comprising: before the forming of the opening, forming a gate structure over the substrate. 10. The method of claim 9, wherein the forming of the gate structure comprises forming a high-k gate dielectric and forming a metal gate electrode over the high-k gate dielectric. 11. A method of fabricating a semiconductor device, comprising:
providing a substrate having a source/drain region formed therein and a dielectric layer formed thereover; etching a contact hole in the dielectric layer to expose a portion of the source/drain region; forming a metal material on the source/drain region exposed by the opening; performing a first annealing process to facilitate a reaction between the metal material and the portion of the source/drain region disposed therebelow, thereby forming a metal silicide in the substrate, wherein the first annealing process is a spike annealing process; removing a remaining portion of the metal material after the performing of the first annealing process; thereafter performing a second annealing process; and thereafter forming a contact in the contact hole, the contact being formed on the metal silicide. 12. The method of claim 11, wherein the second annealing process is not a spike annealing process. 13. The method of claim 11, wherein the first annealing process is performed at an annealing temperature in a range from about 200 degrees Celsius to about 300 degrees Celsius. 14. The method of claim 13, wherein the first annealing process has an annealing duration shorter than about 5 seconds. 15. The method of claim 11, further comprising: before the forming of the metal material, performing an implantation process through the contact hole to amorphize the portion of the source/drain region. 16. The method of claim 11, further comprising: before the etching of the contact hole, forming a gate structure over the substrate. 17. The method of claim 16, wherein the forming of the gate structure comprises forming a high-k metal gate. 18. A method of fabricating a semiconductor device, comprising:
providing a silicon substrate having a source/drain region formed therein and a dielectric layer formed thereover; forming an opening in the dielectric layer to expose a portion of the source/drain region; forming a nickel material on the source/drain region exposed by the opening; performing a first annealing process to facilitate a reaction between the nickel material and the portion of the source/drain region disposed therebelow, thereby forming a nickel silicide in the substrate, wherein the first annealing process has a sharp ascension in temperature and is performed at an annealing temperature in a range from about 200 degrees Celsius to about 300 degrees Celsius; removing a remaining portion of the nickel material after the performing of the first annealing process; thereafter performing a second annealing process; and thereafter forming a conductive contact in the opening, the conductive contact being formed on the nickel silicide. 19. The method of claim 18, wherein the first annealing process has an annealing duration shorter than about 5 seconds. 20. The method of claim 18, further comprising: before the forming of the nickel material, performing an implantation process through the opening to amorphize the portion of the source/drain region. | A substrate is provided. The substrate has a source/drain region formed therein and a dielectric layer formed thereover. A contact hole is etched in the dielectric layer to expose a portion of the source/drain region. A metal material is formed on the source/drain region exposed by the opening. A first annealing process is performed to facilitate a reaction between the metal material and the portion of the source/drain region disposed therebelow, thereby forming a metal silicide in the substrate. The first annealing process is a spike annealing process. A remaining portion of the metal material is removed after the performing of the first annealing process. Thereafter, a second annealing process is performed. Thereafter, a contact is formed in the contact hole, the contact being formed on the metal silicide.1. A method of fabricating a semiconductor device, comprising:
providing a substrate having a source/drain region formed therein and a dielectric layer formed thereover; forming an opening in the dielectric layer, wherein the opening exposes the source/drain region; depositing a metal on the substrate in the opening; and performing an annealing process that causes the metal to react with a portion of the substrate disposed therebelow, wherein a reaction of the metal and the portion of the substrate forms a metal silicide in the source/drain region, and wherein the annealing process has a spike profile. 2. The method of claim 1, wherein the annealing process is performed at an annealing temperature in a range from about 200 degrees Celsius to about 300 degrees Celsius. 3. The method of claim 2, wherein the annealing process has an annealing duration that is shorter than about 5 seconds 4. The method of claim 1, further comprising: before the depositing of the metal, performing an implantation process through the opening. 5. The method of claim 4, wherein the implantation process is performed in a manner so as to amorphize the portion of the substrate. 6. The method of claim 1, further comprising: after the annealing process is performed, forming a conductive contact element in the opening and on the metal silicide. 7. The method of claim 6, further comprising: after the annealing process is performed and before the forming of the conductive contact, removing portions of the metal that has not reacted with the portion of the substrate. 8. The method of claim 7, further comprising: after the removing of the portions of the metal and before the forming of the conductive contact, performing a further annealing process, wherein the further annealing process is free of a spike profile. 9. The method of claim 1, further comprising: before the forming of the opening, forming a gate structure over the substrate. 10. The method of claim 9, wherein the forming of the gate structure comprises forming a high-k gate dielectric and forming a metal gate electrode over the high-k gate dielectric. 11. A method of fabricating a semiconductor device, comprising:
providing a substrate having a source/drain region formed therein and a dielectric layer formed thereover; etching a contact hole in the dielectric layer to expose a portion of the source/drain region; forming a metal material on the source/drain region exposed by the opening; performing a first annealing process to facilitate a reaction between the metal material and the portion of the source/drain region disposed therebelow, thereby forming a metal silicide in the substrate, wherein the first annealing process is a spike annealing process; removing a remaining portion of the metal material after the performing of the first annealing process; thereafter performing a second annealing process; and thereafter forming a contact in the contact hole, the contact being formed on the metal silicide. 12. The method of claim 11, wherein the second annealing process is not a spike annealing process. 13. The method of claim 11, wherein the first annealing process is performed at an annealing temperature in a range from about 200 degrees Celsius to about 300 degrees Celsius. 14. The method of claim 13, wherein the first annealing process has an annealing duration shorter than about 5 seconds. 15. The method of claim 11, further comprising: before the forming of the metal material, performing an implantation process through the contact hole to amorphize the portion of the source/drain region. 16. The method of claim 11, further comprising: before the etching of the contact hole, forming a gate structure over the substrate. 17. The method of claim 16, wherein the forming of the gate structure comprises forming a high-k metal gate. 18. A method of fabricating a semiconductor device, comprising:
providing a silicon substrate having a source/drain region formed therein and a dielectric layer formed thereover; forming an opening in the dielectric layer to expose a portion of the source/drain region; forming a nickel material on the source/drain region exposed by the opening; performing a first annealing process to facilitate a reaction between the nickel material and the portion of the source/drain region disposed therebelow, thereby forming a nickel silicide in the substrate, wherein the first annealing process has a sharp ascension in temperature and is performed at an annealing temperature in a range from about 200 degrees Celsius to about 300 degrees Celsius; removing a remaining portion of the nickel material after the performing of the first annealing process; thereafter performing a second annealing process; and thereafter forming a conductive contact in the opening, the conductive contact being formed on the nickel silicide. 19. The method of claim 18, wherein the first annealing process has an annealing duration shorter than about 5 seconds. 20. The method of claim 18, further comprising: before the forming of the nickel material, performing an implantation process through the opening to amorphize the portion of the source/drain region. | 2,800 |
11,319 | 11,319 | 15,192,308 | 2,844 | A lighting fixture includes a solid-state light source, communications circuitry, a memory, and processing circuitry. The memory stores common security credentials, wherein the common security credentials are pre-installed during a factory calibration process. The processing circuitry is coupled to the solid-state light source, the communications circuitry, and the memory. The processing circuitry is configured to cause the solid-state light source to provide a desired light output. Further, the processing circuitry is configured to join a common network using the common security credentials, wherein only devices with the common security credentials are permitted to join the network. | 1. A lighting fixture comprising:
a solid-state light source; communications circuitry; a memory storing common security credentials, wherein the common security credentials are pre-installed during a factory calibration process; and processing circuitry coupled to the solid-state light source, the communications circuitry, and the memory and configured to:
cause the solid-state light source to provide a desired light output; and
join a common network using the common security credentials, wherein only devices with the common security credentials are permitted to join the common network. 2. The lighting fixture of claim 1 wherein the processing circuitry is further configured to:
communicate with a device in the common network via the communications circuitry; and
receive updated security credentials from the device via the communications circuitry and store the updated security credentials in the memory. 3. The lighting fixture of claim 2 wherein the processing circuitry is further configured to use the updated security credentials to communicate over the common network. 4. The lighting fixture of claim 3 wherein the processing circuitry is further configured to forward the updated security credentials to an additional device in the common network. 5. The lighting fixture of claim 4 wherein the common network and the secure network are Thread networks. 6. The lighting fixture of claim 2 wherein the processing circuitry is further configured to forward the updated security credentials to an additional device in the common network. 7. The lighting fixture of claim 2 wherein the device authenticates the lighting fixture to allow the lighting fixture to join the common network. 8. The lighting fixture of claim 2 wherein the updated security credentials are generated by the device. 9. The lighting fixture of claim 8 wherein the updated security credentials are generated by the device based on user input to the device. 10. The lighting fixture of claim 2 wherein the lighting fixture and the device form a Thread network. 11. A lighting fixture comprising:
a solid-state light source; communications circuitry; a memory storing common security credentials, wherein the common security credentials are pre-installed during a factory calibration process; and processing circuitry coupled to the solid-state light source, the communications circuitry, and the memory and configured to:
cause the solid-state light source to provide a desired light output; and
create a common network using the common security credentials, wherein only devices with the common security credentials are permitted to join the common network. 12. The lighting fixture of claim 11 wherein creating the common network comprises authenticating devices wishing to join the common network based on the common security credentials. 13. The lighting fixture of claim 12 wherein creating the common network further comprises assigning an address to the devices wishing to join the common network that are authenticated based on the common security credentials. 14. The lighting fixture of claim 12 wherein the processing circuitry is configured to:
receive a command to create the common network from a device; and
create the common network in response to the command. 15. The lighting fixture of claim 14 wherein creating the common network comprises authenticating the devices wishing to join the common network based on the common security credentials. 16. The lighting fixture of claim 15 wherein creating the common network further comprises assigning an address to the devices wishing to join the common network that are authenticated based on the common security credentials. 17. The lighting fixture of claim 14 wherein the command is provided via the common network. 18. The lighting fixture of claim 14 wherein the command is not provided via the common network. 19. The lighting fixture of claim 18 further comprising a light sensor, wherein the command is provided via the light sensor. 20. The lighting fixture of claim 11 wherein the processing circuitry is further configured to:
communicate with a device in the common network via the communications circuitry;
receive updated security credentials from the device via the communications circuitry and store the updated security credentials in the memory; and
communicate with other devices in the common network using the updated security credentials. | A lighting fixture includes a solid-state light source, communications circuitry, a memory, and processing circuitry. The memory stores common security credentials, wherein the common security credentials are pre-installed during a factory calibration process. The processing circuitry is coupled to the solid-state light source, the communications circuitry, and the memory. The processing circuitry is configured to cause the solid-state light source to provide a desired light output. Further, the processing circuitry is configured to join a common network using the common security credentials, wherein only devices with the common security credentials are permitted to join the network.1. A lighting fixture comprising:
a solid-state light source; communications circuitry; a memory storing common security credentials, wherein the common security credentials are pre-installed during a factory calibration process; and processing circuitry coupled to the solid-state light source, the communications circuitry, and the memory and configured to:
cause the solid-state light source to provide a desired light output; and
join a common network using the common security credentials, wherein only devices with the common security credentials are permitted to join the common network. 2. The lighting fixture of claim 1 wherein the processing circuitry is further configured to:
communicate with a device in the common network via the communications circuitry; and
receive updated security credentials from the device via the communications circuitry and store the updated security credentials in the memory. 3. The lighting fixture of claim 2 wherein the processing circuitry is further configured to use the updated security credentials to communicate over the common network. 4. The lighting fixture of claim 3 wherein the processing circuitry is further configured to forward the updated security credentials to an additional device in the common network. 5. The lighting fixture of claim 4 wherein the common network and the secure network are Thread networks. 6. The lighting fixture of claim 2 wherein the processing circuitry is further configured to forward the updated security credentials to an additional device in the common network. 7. The lighting fixture of claim 2 wherein the device authenticates the lighting fixture to allow the lighting fixture to join the common network. 8. The lighting fixture of claim 2 wherein the updated security credentials are generated by the device. 9. The lighting fixture of claim 8 wherein the updated security credentials are generated by the device based on user input to the device. 10. The lighting fixture of claim 2 wherein the lighting fixture and the device form a Thread network. 11. A lighting fixture comprising:
a solid-state light source; communications circuitry; a memory storing common security credentials, wherein the common security credentials are pre-installed during a factory calibration process; and processing circuitry coupled to the solid-state light source, the communications circuitry, and the memory and configured to:
cause the solid-state light source to provide a desired light output; and
create a common network using the common security credentials, wherein only devices with the common security credentials are permitted to join the common network. 12. The lighting fixture of claim 11 wherein creating the common network comprises authenticating devices wishing to join the common network based on the common security credentials. 13. The lighting fixture of claim 12 wherein creating the common network further comprises assigning an address to the devices wishing to join the common network that are authenticated based on the common security credentials. 14. The lighting fixture of claim 12 wherein the processing circuitry is configured to:
receive a command to create the common network from a device; and
create the common network in response to the command. 15. The lighting fixture of claim 14 wherein creating the common network comprises authenticating the devices wishing to join the common network based on the common security credentials. 16. The lighting fixture of claim 15 wherein creating the common network further comprises assigning an address to the devices wishing to join the common network that are authenticated based on the common security credentials. 17. The lighting fixture of claim 14 wherein the command is provided via the common network. 18. The lighting fixture of claim 14 wherein the command is not provided via the common network. 19. The lighting fixture of claim 18 further comprising a light sensor, wherein the command is provided via the light sensor. 20. The lighting fixture of claim 11 wherein the processing circuitry is further configured to:
communicate with a device in the common network via the communications circuitry;
receive updated security credentials from the device via the communications circuitry and store the updated security credentials in the memory; and
communicate with other devices in the common network using the updated security credentials. | 2,800 |
11,320 | 11,320 | 15,136,605 | 2,813 | Implementations of a semiconductor package may include: a substrate, a case coupled to the substrate and a plurality of press-fit pins. The press-fit pins are molded into and fixedly coupled with the case. The pins are also electrically and mechanically coupled to the substrate. | 1. A semiconductor package comprising:
a substrate; a case coupled to the substrate; and a plurality of press-fit pins; wherein the press-fit pins are molded into and fixedly coupled with the case; and wherein the pins are electrically and mechanically coupled to the substrate. 2. The semiconductor package of claim 1, wherein the case comprises an opening comprising a strut that extends from a side of the opening to another side of the opening and a first set of a plurality of fingers extending from the strut on one side of the strut and a second set of a plurality of fingers extending from an opposing side of the strut. 3. The semiconductor package of claim 2, further comprising a cover coupled to the case, the cover comprising a plurality of openings therethrough, the plurality of openings configured to receive the plurality of pins. 4. The semiconductor package of claim 1, wherein the case comprises a cover with the plurality of pins molded into and fixedly coupled thereto, the cover comprising a potting opening therethrough. 5. The semiconductor package of claim 4, further comprising a casing configured to be fixedly coupled over one or more edges of the cover and over at least a portion of the substrate. 6. The semiconductor package of claim 5, wherein the casing comprises a plurality of locking projections that engage with the one or more edges of the cover and irreversibly lock the cover to the casing. 7. A method for making a semiconductor package, the method comprising:
providing a substrate; coupling one or more die to the substrate; coupling the die to the substrate using one or more connectors; providing a case; molding into the case and fixedly coupling thereto a plurality of pins; simultaneously electrically and mechanically coupling the plurality of pins and the case with the substrate; and dispensing a potting compound inside the case over at least a portion of the substrate. 8. The method of claim 7, wherein the case comprises an opening comprising a strut that extends from a side of the opening to another side of the opening and a first set of a plurality of fingers extending from the strut on one side of the strut and a second set of a plurality of fingers extending from an opposing side of the strut. 9. The method of claim 7, wherein a cover that has a plurality of openings therethrough configured to receive the plurality of pins is coupled to the case. 10. The method of claim 7, wherein the substrate comprises of at least one of copper, silicon, and any combination thereof. 11. The method of claim 7, wherein the pins are fixedly coupled to the substrate through soldering. 12. The method of claim 7, wherein the one or more connectors comprise a wire. 13. A method for making a semiconductor package, the method comprising:
providing a substrate; coupling one or more die to the substrate; coupling the die to the substrate using one or more connectors; providing a cover for a case, the cover having a potting opening therein; molding into the cover and fixedly coupling thereto a plurality of pins; simultaneously electrically and mechanically coupling the plurality of pins and the cover to the substrate; coupling a casing over the cover and to the substrate; and dispensing a potting compound into the case through the potting opening in the cover. 14. The method of claim 13, wherein a temporary fixture is used to hold the cover and the substrate together while coupling the plurality of pins and the cover to the substrate. 15. The method of claim 13, further comprising mechanically and irreversibly locking the cover with the casing through a plurality of locking projections on the casing. 16. The method of claim 13, wherein the substrate comprises of at least one of copper, silicon, and any combination thereof. 17. The method of claim 13, wherein the pins are fixedly coupled to the substrate through soldering. 18. The method of claim 13, wherein the one or more connectors are made of a wire. | Implementations of a semiconductor package may include: a substrate, a case coupled to the substrate and a plurality of press-fit pins. The press-fit pins are molded into and fixedly coupled with the case. The pins are also electrically and mechanically coupled to the substrate.1. A semiconductor package comprising:
a substrate; a case coupled to the substrate; and a plurality of press-fit pins; wherein the press-fit pins are molded into and fixedly coupled with the case; and wherein the pins are electrically and mechanically coupled to the substrate. 2. The semiconductor package of claim 1, wherein the case comprises an opening comprising a strut that extends from a side of the opening to another side of the opening and a first set of a plurality of fingers extending from the strut on one side of the strut and a second set of a plurality of fingers extending from an opposing side of the strut. 3. The semiconductor package of claim 2, further comprising a cover coupled to the case, the cover comprising a plurality of openings therethrough, the plurality of openings configured to receive the plurality of pins. 4. The semiconductor package of claim 1, wherein the case comprises a cover with the plurality of pins molded into and fixedly coupled thereto, the cover comprising a potting opening therethrough. 5. The semiconductor package of claim 4, further comprising a casing configured to be fixedly coupled over one or more edges of the cover and over at least a portion of the substrate. 6. The semiconductor package of claim 5, wherein the casing comprises a plurality of locking projections that engage with the one or more edges of the cover and irreversibly lock the cover to the casing. 7. A method for making a semiconductor package, the method comprising:
providing a substrate; coupling one or more die to the substrate; coupling the die to the substrate using one or more connectors; providing a case; molding into the case and fixedly coupling thereto a plurality of pins; simultaneously electrically and mechanically coupling the plurality of pins and the case with the substrate; and dispensing a potting compound inside the case over at least a portion of the substrate. 8. The method of claim 7, wherein the case comprises an opening comprising a strut that extends from a side of the opening to another side of the opening and a first set of a plurality of fingers extending from the strut on one side of the strut and a second set of a plurality of fingers extending from an opposing side of the strut. 9. The method of claim 7, wherein a cover that has a plurality of openings therethrough configured to receive the plurality of pins is coupled to the case. 10. The method of claim 7, wherein the substrate comprises of at least one of copper, silicon, and any combination thereof. 11. The method of claim 7, wherein the pins are fixedly coupled to the substrate through soldering. 12. The method of claim 7, wherein the one or more connectors comprise a wire. 13. A method for making a semiconductor package, the method comprising:
providing a substrate; coupling one or more die to the substrate; coupling the die to the substrate using one or more connectors; providing a cover for a case, the cover having a potting opening therein; molding into the cover and fixedly coupling thereto a plurality of pins; simultaneously electrically and mechanically coupling the plurality of pins and the cover to the substrate; coupling a casing over the cover and to the substrate; and dispensing a potting compound into the case through the potting opening in the cover. 14. The method of claim 13, wherein a temporary fixture is used to hold the cover and the substrate together while coupling the plurality of pins and the cover to the substrate. 15. The method of claim 13, further comprising mechanically and irreversibly locking the cover with the casing through a plurality of locking projections on the casing. 16. The method of claim 13, wherein the substrate comprises of at least one of copper, silicon, and any combination thereof. 17. The method of claim 13, wherein the pins are fixedly coupled to the substrate through soldering. 18. The method of claim 13, wherein the one or more connectors are made of a wire. | 2,800 |
11,321 | 11,321 | 15,583,500 | 2,816 | Microelectronic devices and methods for filling vias and forming conductive interconnects in microfeature workpieces and dies are disclosed herein. In one embodiment, a method includes providing a microfeature workpiece having a plurality of dies and at least one passage extending through the microfeature workpiece from a first side of the microfeature workpiece to an opposite second side of the microfeature workpiece. The method can further include forming a conductive plug in the passage adjacent to the first side of the microelectronic workpiece, and depositing conductive material in the passage to at least generally fill the passage from the conductive plug to the second side of the microelectronic workpiece. | 1. A packaged microelectronic device comprising:
a die having a first side and a second side opposite to the first side, the die further having an integrated circuit positioned between the first and second sides; a bond-pad positioned on the first side of the die and electrically coupled to the integrated circuit; a passage extending completely through the die and extending through the bond-pad; an insulative layer deposited in the passage; a first conductive material deposited in a first portion of the passage adjacent to the first side of the die to form a conductive plug electrically connected to the bond-pad, wherein the first conductive material directly contacts the insulative layer between the first side of the dies and the second side of the die; and a second conductive material deposited in a second portion of the passage in contact with the conductive plug to at least generally fill the passage from the conductive plug to the second side of the die, wherein the second conductive material directly contacts the insulative layer between the first side of the die and the second side of the die. 2. The packaged microelectronic device of claim 1 wherein the insulative layer is deposited in the passage between the die and the first and second conductive materials. 3. The microelectronic device set of claim 12, further comprising an insulative layer deposited in the passage between the first die and the first conductive material and between the first die and the second conductive materials, wherein the insulative layer defines the inner wall of the passage. 4. The packaged microelectronic device of claim 1 wherein the first conductive material includes an electronic ink. 5. The packaged microelectronic device of claim 1 wherein the first conductive material includes a nano-particle deposition. 6. A microfeature workpiece having a first side and a second side opposite to the first side, the microfeature workpiece comprising:
at least one die; a bond-pad formed on the first side of the microfeature workpiece; a passage extending completely through the bond-pad and the die from the first side of the microfeature workpiece to the second side of the microfeature workpiece; an insulative layer deposited in the passage, a first conductive material deposited in a first portion of the passage adjacent to the first side of the microfeature workpiece to form a conductive plug in contact with the bond-pad, wherein the first conductive material directly contacts the insulative layer between the first side of the microfeature workpiece and the second side of the microfeature workpiece; and a second conductive material deposited in a second portion of the passage in contact with the conductive plug to at least generally fill the passage from the conductive plug to the second side of the microfeature workpiece, wherein the second conductive material directly contacts the insulative layer between the first side of the microfeature workpiece and he second side of the microfeature workpiece, and wherein the first conductive material is different than the second conductive material. 7. The microfeature workpiece of claim 6 wherein the first conductive material includes an electronic ink. 8. The microfeature workpiece of claim 6 wherein the first conductive material includes a nano-particle deposition. 9. The microfeature workpiece of claim 6 wherein the insulative layer is deposited in the passage between the die and the first conductive material and between the dies and the second conductive materials. 10. The microfeature workpiece of claim 6, further comprising a metallic layer formed on the first side of the microfeature workpiece. 11. The microfeature workpiece of claim 6 wherein the bond-pad is formed on the die. 12. A microelectronic device set comprising:
a first microelectronic device having:
a first die with a first integrated circuit and a first bond-pad electrically coupled to the first integrated circuit, the first die further including a passage extending completely through the first die and the first bond-pad; and
a conductive interconnect deposited in the passage, the conductive interconnect including a first conductive material and a second conductive material, wherein the first conductive material is deposited in a first portion of the passage to form a conductive plug in direct contact with an inner wall of the passage and having a boundary in the passage, and wherein the second conductive material is deposited in a second portion of the passage in contact with the inner wall of the passage and the boundary of conductive plug to at least generally fill the passage; and
at least a second microelectronic device having a second die with a second integrated circuit and a second bond-pad electrically coupled to the second integrated circuit, wherein the second bond-pad is electrically coupled to the conductive interconnect of the first microelectronic device. 13. The microelectronic device set of claim 12 wherein the first microelectronic device is attached to the second microelectronic device in a stacked-die arrangement. 14. The microelectronic device set of claim 12, further comprising a solder ball disposed between the conductive interconnect of the first microelectronic device and the second bond-pad of the second microelectronic device to electrically couple the first bond-pad to the second bond-pad. 15. The microelectronic device set of claim 12 wherein the passage is a first passage, wherein the second microelectronic device further includes a second passage extending through the second die and the second bond-pad, and wherein the second passage is completely filled with a third conductive material. 16. The microelectronic device set of claim 12 wherein the first microelectronic device further includes a redistribution layer formed on the first die, the redistribution layer including a conductive line having a first end portion attached to the first bond-pad and a second end portion positioned outward of the first end portion, wherein the second end portion is configured to receive electrical signals and transmit the signals to at least the first integrated circuit of the first die and the second integrated circuit of the second die. 17. A microelectronic device set comprising:
a first microelectronic device having:
a first die having a first side and a second side opposite to the first side, the first die further having a first integrated circuit and a first bond-pad electrically coupled to the first integrated circuit, the first die further including a passage extending through the first bond-pad;
an insulative layer deposited in the passage between the first side of the first die and the second side of the first die, and
a conductive interconnect deposited in the passage, the conductive interconnect including a first conductive material deposited in a first portion of the passage to form a conductive plug in direct contact with the bond-pad and the insulative layer, and a second conductive material deposited in a second portion of the passage in direct contact with the conductive plug and the insulative layer to at least generally fill the passage; and
at least a second microelectronic device having a second die with a second integrated circuit and a second bond-pad electrically coupled to the second integrated circuit, wherein the second bond-pad is electrically coupled to the first bond-pad of the first microelectronic device. 18. The microelectronic device set of claim 17 wherein the insulative layer is deposited in the passage between first die and the first conductive material and between the first die and the second conductive material. 19. The microelectronic devices set of claim 17 wherein the first conductive material includes an electronic ink. 20. The microelectronic device of claim 17 wherein the first conductive material includes a nano-particle deposition. | Microelectronic devices and methods for filling vias and forming conductive interconnects in microfeature workpieces and dies are disclosed herein. In one embodiment, a method includes providing a microfeature workpiece having a plurality of dies and at least one passage extending through the microfeature workpiece from a first side of the microfeature workpiece to an opposite second side of the microfeature workpiece. The method can further include forming a conductive plug in the passage adjacent to the first side of the microelectronic workpiece, and depositing conductive material in the passage to at least generally fill the passage from the conductive plug to the second side of the microelectronic workpiece.1. A packaged microelectronic device comprising:
a die having a first side and a second side opposite to the first side, the die further having an integrated circuit positioned between the first and second sides; a bond-pad positioned on the first side of the die and electrically coupled to the integrated circuit; a passage extending completely through the die and extending through the bond-pad; an insulative layer deposited in the passage; a first conductive material deposited in a first portion of the passage adjacent to the first side of the die to form a conductive plug electrically connected to the bond-pad, wherein the first conductive material directly contacts the insulative layer between the first side of the dies and the second side of the die; and a second conductive material deposited in a second portion of the passage in contact with the conductive plug to at least generally fill the passage from the conductive plug to the second side of the die, wherein the second conductive material directly contacts the insulative layer between the first side of the die and the second side of the die. 2. The packaged microelectronic device of claim 1 wherein the insulative layer is deposited in the passage between the die and the first and second conductive materials. 3. The microelectronic device set of claim 12, further comprising an insulative layer deposited in the passage between the first die and the first conductive material and between the first die and the second conductive materials, wherein the insulative layer defines the inner wall of the passage. 4. The packaged microelectronic device of claim 1 wherein the first conductive material includes an electronic ink. 5. The packaged microelectronic device of claim 1 wherein the first conductive material includes a nano-particle deposition. 6. A microfeature workpiece having a first side and a second side opposite to the first side, the microfeature workpiece comprising:
at least one die; a bond-pad formed on the first side of the microfeature workpiece; a passage extending completely through the bond-pad and the die from the first side of the microfeature workpiece to the second side of the microfeature workpiece; an insulative layer deposited in the passage, a first conductive material deposited in a first portion of the passage adjacent to the first side of the microfeature workpiece to form a conductive plug in contact with the bond-pad, wherein the first conductive material directly contacts the insulative layer between the first side of the microfeature workpiece and the second side of the microfeature workpiece; and a second conductive material deposited in a second portion of the passage in contact with the conductive plug to at least generally fill the passage from the conductive plug to the second side of the microfeature workpiece, wherein the second conductive material directly contacts the insulative layer between the first side of the microfeature workpiece and he second side of the microfeature workpiece, and wherein the first conductive material is different than the second conductive material. 7. The microfeature workpiece of claim 6 wherein the first conductive material includes an electronic ink. 8. The microfeature workpiece of claim 6 wherein the first conductive material includes a nano-particle deposition. 9. The microfeature workpiece of claim 6 wherein the insulative layer is deposited in the passage between the die and the first conductive material and between the dies and the second conductive materials. 10. The microfeature workpiece of claim 6, further comprising a metallic layer formed on the first side of the microfeature workpiece. 11. The microfeature workpiece of claim 6 wherein the bond-pad is formed on the die. 12. A microelectronic device set comprising:
a first microelectronic device having:
a first die with a first integrated circuit and a first bond-pad electrically coupled to the first integrated circuit, the first die further including a passage extending completely through the first die and the first bond-pad; and
a conductive interconnect deposited in the passage, the conductive interconnect including a first conductive material and a second conductive material, wherein the first conductive material is deposited in a first portion of the passage to form a conductive plug in direct contact with an inner wall of the passage and having a boundary in the passage, and wherein the second conductive material is deposited in a second portion of the passage in contact with the inner wall of the passage and the boundary of conductive plug to at least generally fill the passage; and
at least a second microelectronic device having a second die with a second integrated circuit and a second bond-pad electrically coupled to the second integrated circuit, wherein the second bond-pad is electrically coupled to the conductive interconnect of the first microelectronic device. 13. The microelectronic device set of claim 12 wherein the first microelectronic device is attached to the second microelectronic device in a stacked-die arrangement. 14. The microelectronic device set of claim 12, further comprising a solder ball disposed between the conductive interconnect of the first microelectronic device and the second bond-pad of the second microelectronic device to electrically couple the first bond-pad to the second bond-pad. 15. The microelectronic device set of claim 12 wherein the passage is a first passage, wherein the second microelectronic device further includes a second passage extending through the second die and the second bond-pad, and wherein the second passage is completely filled with a third conductive material. 16. The microelectronic device set of claim 12 wherein the first microelectronic device further includes a redistribution layer formed on the first die, the redistribution layer including a conductive line having a first end portion attached to the first bond-pad and a second end portion positioned outward of the first end portion, wherein the second end portion is configured to receive electrical signals and transmit the signals to at least the first integrated circuit of the first die and the second integrated circuit of the second die. 17. A microelectronic device set comprising:
a first microelectronic device having:
a first die having a first side and a second side opposite to the first side, the first die further having a first integrated circuit and a first bond-pad electrically coupled to the first integrated circuit, the first die further including a passage extending through the first bond-pad;
an insulative layer deposited in the passage between the first side of the first die and the second side of the first die, and
a conductive interconnect deposited in the passage, the conductive interconnect including a first conductive material deposited in a first portion of the passage to form a conductive plug in direct contact with the bond-pad and the insulative layer, and a second conductive material deposited in a second portion of the passage in direct contact with the conductive plug and the insulative layer to at least generally fill the passage; and
at least a second microelectronic device having a second die with a second integrated circuit and a second bond-pad electrically coupled to the second integrated circuit, wherein the second bond-pad is electrically coupled to the first bond-pad of the first microelectronic device. 18. The microelectronic device set of claim 17 wherein the insulative layer is deposited in the passage between first die and the first conductive material and between the first die and the second conductive material. 19. The microelectronic devices set of claim 17 wherein the first conductive material includes an electronic ink. 20. The microelectronic device of claim 17 wherein the first conductive material includes a nano-particle deposition. | 2,800 |
11,322 | 11,322 | 14,785,199 | 2,886 | An optical system suitable for determining a characteristic as a function of time of at least a part of a liquid volume comprising a plurality of objects. The optical system provides a fast detection of a change in the liquid volume. The optical system comprises—an optical detection assembly comprising at least one image acquisition device configured to acquire images of an image acquisition area; —a sample device comprising at least one sample container suitable for holding a sample of said liquid volume; —a translating arrangement configured to translate said image acquisition area through at least one part of said sample container to perform a scan along a scanning path through said part of said sample container; and—an image analyzing processing system. The optical system is programmed to perform consecutive scans through said at least one part of said sample container, wherein each scan comprises acquiring images at a plurality of image acquiring positions of the image acquisition area by the optical detection assembly along at least one scanning path of the scan. The image analyzing processing system is programmed to determine a set of features in the form of a set of values for each of a plurality of objects captured on said images from each respective scan and to determine for each scan at least one derived result, the derived result is derived from a plurality of the sets of values, and to present said derived result obtained from the respective, consecutive scans as a function of time. | 1. An optical system for determining a characteristic as a function of time of at least a part of a liquid volume comprising a plurality of objects, the optical system comprises:
an optical detection assembly comprising at least one image acquisition device configured to acquire images of an image acquisition area; a sample device comprising at least one sample container suitable for holding a sample of said liquid volume; a translating arrangement configured to translate said image acquisition area through at least one part of said sample container to perform a scan along a scanning path through said part of said sample container; and an image analyzing processing system,
wherein said optical system is programmed to perform consecutive scans through said at least one part of said sample container, wherein each scan comprises acquiring images of said image acquisition area by the optical detection assembly at a plurality of positions of the image acquisition area as it is translated along at least one scanning path of the scan; and said image analyzing processing system is programmed to determine a set of features in the form of a set of values for each of a plurality of objects captured on said images from each respective scan and to determine for each scan at least one derived result, the derived result is derived from a plurality of the sets of values, and to present said derived result obtained from the respective, consecutive scans as a function of time.
characterized in that the sample container is constructed to hold a sample at a substantially standstill during a scan. 2. The optical system of claim 1 wherein the optical system is configured to acquire said images of said image acquisition area at said plurality of positions, wherein said image acquisition area is at a standstill relative to the sample container. 3. (canceled) 4. The optical system of claim 1, wherein the optical system is configured to acquire said images of said image acquisition area at said plurality of positions, wherein a sample in the sample container at a substantially standstill. 5. The optical system of claim 1 wherein the object is a particle or a cluster of particles, the particles are selected from non-biologic particles, such as particles of metal, particles of polymer, crystals, drops of fat and mixtures thereof and/or the particles are selected from biologic particles, such as particles of bacteria, archaea, yeast, fungi, pollen, viruses, leukocytes, such as granulocytes, monocytes, Erythrocytes, Thrombocytes, oocytes, sperm, zygote, stem cells, somatic cells, malignant cells and mixtures thereof. 6. The optical system of claim 5 wherein the particles comprise pathogens, such as pathogens selected from viral pathogens, bacterial pathogens, parasites, fungan pathogens, prionic pathogens and combinations thereof. 7. The optical system of claim 1 wherein the characteristic(s) comprises one or more of a geometric characteristic, such as size or shape; a light interaction characteristic, such as contrast, light scattering properties, absorption, transparency, number of particles in a cluster, distance between particles in a cluster, distance between clusters, formation or re-formation of particles or clusters of particles or homogeneity/inhomogeneity of the sample. 8. (canceled) 9. (canceled) 10. (canceled) 11. The optical system of claim 1 wherein the optical system is programmed to set the time offset between scans about to be performed depending on the derived result obtained from one or more previously performed scans, preferably such that the time offset between scans about to be performed is relatively long if the derived result from two or more previously performed scans are substantially identical and such that the time offset between scans about to be performed is relatively short if the derived result from two or more previously performed scans are different from each other. 12. The optical system of claim 1 wherein said image analyzing processing system is programmed to determine sets of values for a predetermined set of features comprising at least N features for each of said complete stacks of objects, wherein N is 1 or more, such as 2 or more, such as 3 or more, such as 4 or more, such as up to about 1 00. 13. The optical system of claim 1 wherein said optical system is arranged such that the sample in the sample container can be subjected to an external exposure during the consecutive scans, the external exposure is for example heat, cooling, irradiation, magnetic exposure, electrical exposure, pressure, centrifugal forces, vibrations or other mechanical forces such as forcing the sample through a constriction to generate a venture effect. 14. (canceled) 15. (canceled) 16. The optical system of claim 1 wherein said optical system is configured to determine one or more characteristics as a function of time of at least two samples simultaneously, the system is preferably programmed to continue performing consecutive scans until the derived result for one of the samples differs significantly from the derived result for another one of the samples. 17. (canceled) 18. An optical system of claim 1 for determining and adjusting a characteristic as a function of time of at least a part of the liquid volume comprising a plurality of objects, the optical system further comprises a feedback configuration arranged to subject the sample and/or the liquid volume to an influence in response to a determined characteristic, the influence is preferably in the form of one or more external exposures, such as heat, cooling, irradiation, magnetic exposure, electrical exposure, pressure, centrifugal forces, vibrations or other mechanical forces and/or in the form of adding one or more substances, such as nutrient, agents, diluting liquid, ph regulator or tensides and/or in the form of removing one or more substances, such as liquid via a filter. 19. An optical system of claim 11, wherein the optical system is programmed to adjust the characteristic according to a pre-selected pattern, which pre-selected pattern can be a stationary pattern or a pattern that changes as a function of time. 20. (canceled) 21. (canceled) 22. (canceled) 23. (canceled) 24. (canceled) 25. A method of determining a characteristic as a function of time of a liquid volume comprising a plurality of objects, the method comprises performing consecutive scans through at least one part of a liquid sample of said liquid volume using at least one image acquisition device configured to acquire images of an image acquisition area, wherein each scan comprises translating said image acquisition area along at least one scanning path through said at least one part of said sample and acquiring images at a plurality of image acquiring positions of the image acquisition area, and determining a set of features in the form of a set of values for each of a plurality of objects captured on said images from each respective scan and determining for each scan at least one derived result, the derived result is
derived from a plurality of the sets of values, and presenting said derived result obtained from the consecutive scans as a function of time, characterized in that the method comprises holding the sample at a substantially standstill during the scan. 26. The method of claim 25, wherein the method comprises providing that said image acquisition area is at a standstill relative to the sample container when acquiring said respective images of said image acquisition area at said plurality of positions. 27. (canceled) 28. (canceled) 29. The method of claim 25, wherein the method comprises continuously performing the consecutive scans for a predetermined time or until the characteristic has reached a selected change in the form of a selected difference between the derived result from a first scan to a last scan of the consecutive scans. 30. (canceled) 31. (canceled) 32. (canceled) 33. (canceled) 34. (canceled) 35. (canceled) | An optical system suitable for determining a characteristic as a function of time of at least a part of a liquid volume comprising a plurality of objects. The optical system provides a fast detection of a change in the liquid volume. The optical system comprises—an optical detection assembly comprising at least one image acquisition device configured to acquire images of an image acquisition area; —a sample device comprising at least one sample container suitable for holding a sample of said liquid volume; —a translating arrangement configured to translate said image acquisition area through at least one part of said sample container to perform a scan along a scanning path through said part of said sample container; and—an image analyzing processing system. The optical system is programmed to perform consecutive scans through said at least one part of said sample container, wherein each scan comprises acquiring images at a plurality of image acquiring positions of the image acquisition area by the optical detection assembly along at least one scanning path of the scan. The image analyzing processing system is programmed to determine a set of features in the form of a set of values for each of a plurality of objects captured on said images from each respective scan and to determine for each scan at least one derived result, the derived result is derived from a plurality of the sets of values, and to present said derived result obtained from the respective, consecutive scans as a function of time.1. An optical system for determining a characteristic as a function of time of at least a part of a liquid volume comprising a plurality of objects, the optical system comprises:
an optical detection assembly comprising at least one image acquisition device configured to acquire images of an image acquisition area; a sample device comprising at least one sample container suitable for holding a sample of said liquid volume; a translating arrangement configured to translate said image acquisition area through at least one part of said sample container to perform a scan along a scanning path through said part of said sample container; and an image analyzing processing system,
wherein said optical system is programmed to perform consecutive scans through said at least one part of said sample container, wherein each scan comprises acquiring images of said image acquisition area by the optical detection assembly at a plurality of positions of the image acquisition area as it is translated along at least one scanning path of the scan; and said image analyzing processing system is programmed to determine a set of features in the form of a set of values for each of a plurality of objects captured on said images from each respective scan and to determine for each scan at least one derived result, the derived result is derived from a plurality of the sets of values, and to present said derived result obtained from the respective, consecutive scans as a function of time.
characterized in that the sample container is constructed to hold a sample at a substantially standstill during a scan. 2. The optical system of claim 1 wherein the optical system is configured to acquire said images of said image acquisition area at said plurality of positions, wherein said image acquisition area is at a standstill relative to the sample container. 3. (canceled) 4. The optical system of claim 1, wherein the optical system is configured to acquire said images of said image acquisition area at said plurality of positions, wherein a sample in the sample container at a substantially standstill. 5. The optical system of claim 1 wherein the object is a particle or a cluster of particles, the particles are selected from non-biologic particles, such as particles of metal, particles of polymer, crystals, drops of fat and mixtures thereof and/or the particles are selected from biologic particles, such as particles of bacteria, archaea, yeast, fungi, pollen, viruses, leukocytes, such as granulocytes, monocytes, Erythrocytes, Thrombocytes, oocytes, sperm, zygote, stem cells, somatic cells, malignant cells and mixtures thereof. 6. The optical system of claim 5 wherein the particles comprise pathogens, such as pathogens selected from viral pathogens, bacterial pathogens, parasites, fungan pathogens, prionic pathogens and combinations thereof. 7. The optical system of claim 1 wherein the characteristic(s) comprises one or more of a geometric characteristic, such as size or shape; a light interaction characteristic, such as contrast, light scattering properties, absorption, transparency, number of particles in a cluster, distance between particles in a cluster, distance between clusters, formation or re-formation of particles or clusters of particles or homogeneity/inhomogeneity of the sample. 8. (canceled) 9. (canceled) 10. (canceled) 11. The optical system of claim 1 wherein the optical system is programmed to set the time offset between scans about to be performed depending on the derived result obtained from one or more previously performed scans, preferably such that the time offset between scans about to be performed is relatively long if the derived result from two or more previously performed scans are substantially identical and such that the time offset between scans about to be performed is relatively short if the derived result from two or more previously performed scans are different from each other. 12. The optical system of claim 1 wherein said image analyzing processing system is programmed to determine sets of values for a predetermined set of features comprising at least N features for each of said complete stacks of objects, wherein N is 1 or more, such as 2 or more, such as 3 or more, such as 4 or more, such as up to about 1 00. 13. The optical system of claim 1 wherein said optical system is arranged such that the sample in the sample container can be subjected to an external exposure during the consecutive scans, the external exposure is for example heat, cooling, irradiation, magnetic exposure, electrical exposure, pressure, centrifugal forces, vibrations or other mechanical forces such as forcing the sample through a constriction to generate a venture effect. 14. (canceled) 15. (canceled) 16. The optical system of claim 1 wherein said optical system is configured to determine one or more characteristics as a function of time of at least two samples simultaneously, the system is preferably programmed to continue performing consecutive scans until the derived result for one of the samples differs significantly from the derived result for another one of the samples. 17. (canceled) 18. An optical system of claim 1 for determining and adjusting a characteristic as a function of time of at least a part of the liquid volume comprising a plurality of objects, the optical system further comprises a feedback configuration arranged to subject the sample and/or the liquid volume to an influence in response to a determined characteristic, the influence is preferably in the form of one or more external exposures, such as heat, cooling, irradiation, magnetic exposure, electrical exposure, pressure, centrifugal forces, vibrations or other mechanical forces and/or in the form of adding one or more substances, such as nutrient, agents, diluting liquid, ph regulator or tensides and/or in the form of removing one or more substances, such as liquid via a filter. 19. An optical system of claim 11, wherein the optical system is programmed to adjust the characteristic according to a pre-selected pattern, which pre-selected pattern can be a stationary pattern or a pattern that changes as a function of time. 20. (canceled) 21. (canceled) 22. (canceled) 23. (canceled) 24. (canceled) 25. A method of determining a characteristic as a function of time of a liquid volume comprising a plurality of objects, the method comprises performing consecutive scans through at least one part of a liquid sample of said liquid volume using at least one image acquisition device configured to acquire images of an image acquisition area, wherein each scan comprises translating said image acquisition area along at least one scanning path through said at least one part of said sample and acquiring images at a plurality of image acquiring positions of the image acquisition area, and determining a set of features in the form of a set of values for each of a plurality of objects captured on said images from each respective scan and determining for each scan at least one derived result, the derived result is
derived from a plurality of the sets of values, and presenting said derived result obtained from the consecutive scans as a function of time, characterized in that the method comprises holding the sample at a substantially standstill during the scan. 26. The method of claim 25, wherein the method comprises providing that said image acquisition area is at a standstill relative to the sample container when acquiring said respective images of said image acquisition area at said plurality of positions. 27. (canceled) 28. (canceled) 29. The method of claim 25, wherein the method comprises continuously performing the consecutive scans for a predetermined time or until the characteristic has reached a selected change in the form of a selected difference between the derived result from a first scan to a last scan of the consecutive scans. 30. (canceled) 31. (canceled) 32. (canceled) 33. (canceled) 34. (canceled) 35. (canceled) | 2,800 |
11,323 | 11,323 | 14,666,622 | 2,856 | Described is an apparatus comprising: a housing with an opening; a gas sensor positioned within the housing and displaced from an edge of the opening such that the gas sensor is not directly underneath the opening, the gas sensor operable to sense gas; and a device positioned within the housing, and operable to generate an electromechanical induced air movement such that gas is exchanged between the opening and the gas sensor. A machine-readable media is provided having machine executable instructions, that when executed cause one or more processors to perform an operation comprising: determining information associated to airflow to cause a gas sensor to sense gas, wherein the gas sensor is positioned within a housing and displaced from an edge of the opening such that the gas sensor is not directly underneath the opening; and sending the determined information to an apparatus having the gas sensor. | 1. An apparatus comprising:
a housing with an opening; a gas sensor positioned within the housing and displaced from an edge of the opening such that the gas sensor is not directly underneath the opening, the gas sensor operable to sense gas; and a device positioned within the housing, and operable to generate an electromechanical induced air movement such that gas is exchanged between the opening and the gas sensor. 2. The apparatus of claim 1, wherein the device is a speaker membrane which is operable to produce audible sound. 3. The apparatus of claim 2 comprises logic to lower frequency of an AC signal for the speaker membrane such that the speaker membrane vibrates without generating human audible noise. 4. The apparatus of claim 1, wherein the housing is part of a wearable device. 5. The apparatus of claim 1, wherein the device is at least one of:
a speaker membrane; a vibrating motor; a piezoelectric haptic actuator; a fan; or an air pump. 6. The apparatus of claim 1 comprises a processor to process data gathered by the gas sensor. 7. The apparatus of claim 6 comprises an antenna to transmit the processed data to another device. 8. The apparatus of claim 6, wherein the other device is one of:
a smart phone; a tablet PC; or a wireless communication enabled device. 9. The apparatus of claim 1 comprises an output mechanism to display an output of the gas sensor. 10. The apparatus of claim 9, wherein the output mechanism is at least one of:
a display screen; a light indicator; a sound indicator; or haptic feedback. 11. The apparatus of claim 1, wherein the gas sensor is operable to sense at least one of:
Nitrogen oxide gas; Carbon dioxide; Carbon monoxide; Air Humidity; Alcohol fumes; Ozone; Ammonia; Formaldehyde; Methane; Sulfur dioxide; or Volatile organic compound gas. 12. The apparatus of claim 1 comprises logic to manage airflow by the device. 13. A wearable device comprising:
a housing with an opening; a gas sensor positioned within the housing and displaced from an edge of the opening such that the gas sensor is not directly underneath the opening, the gas sensor operable to sense gas; an electromechanical mechanism positioned within the housing and operable to manage airflow to the gas sensor through the opening; a processor to process data gathered by the gas sensor; and an antenna to transmit the processed data to another device. 14. The wearable device of claim 13, wherein the electromechanical mechanism is a speaker membrane which is operable to produce audible sound. 15. The wearable device of claim 14 comprises logic to a lower frequency of an AC signal for the speaker membrane such that the speaker membrane vibrates without generating human audible noise. 16. The wearable device of claim 13, wherein the other device is one of:
a smart phone; a tablet PC; or a wireless communication enabled device. 17. The wearable device of claim 13, wherein the electromechanical mechanism is at least one of:
a speaker membrane; a vibrating motor; a piezoelectric haptic actuator; a fan; or an air pump. 18. The wearable device of claim 13, wherein the gas sensor is operable to sense at least one of:
Nitrogen oxide gas; Carbon dioxide; Carbon monoxide; Air Humidity; Alcohol fumes; Ozone; Ammonia; Formaldehyde; Methane; Sulfur dioxide; or Volatile organic compound gas. 19. A machine readable media having machine executable instructions, that when executed cause one or more processors to perform an operation comprising:
determining information associated to airflow to cause a gas sensor to sense gas, wherein the gas sensor is positioned within a housing and displaced from an edge of the opening such that the gas sensor is not directly underneath the opening; and sending the determined information to an apparatus having the gas sensor, wherein the determined information to cause a device to generate an electromechanical induced air movement corresponding to the determined information, wherein the device is part of the apparatus and positioned within the housing away from the opening. 20. The machine readable media of claim 19 having further machine executable instructions, that when executed cause the one or more processors to perform a further operation comprising:
receiving sensor information from the apparatus, the sensor information associated with gas sensed by the gas sensor. 21. The machine readable media of claim 20 having further machine executable instructions, that when executed cause the one or more processors to perform a further operation comprising:
analyzing the received sensor information; and
generating a report of the analysis. 22. The machine readable media of claim 21 having further machine executable instructions, that when executed cause the one or more processors to perform a further operation comprising:
sending an alarm when the analysis indicates sensed gas is above a threshold. 23. The machine readable media of claim 19, wherein the device is a speaker membrane, and wherein the machine readable media includes further machine executable instructions, that when executed cause the one or more processors to perform a further operation comprising:
instructing the apparatus to adjust the airflow by lowering frequency of an AC signal for the speaker membrane such that the speaker membrane vibrates without generating human audible noise. | Described is an apparatus comprising: a housing with an opening; a gas sensor positioned within the housing and displaced from an edge of the opening such that the gas sensor is not directly underneath the opening, the gas sensor operable to sense gas; and a device positioned within the housing, and operable to generate an electromechanical induced air movement such that gas is exchanged between the opening and the gas sensor. A machine-readable media is provided having machine executable instructions, that when executed cause one or more processors to perform an operation comprising: determining information associated to airflow to cause a gas sensor to sense gas, wherein the gas sensor is positioned within a housing and displaced from an edge of the opening such that the gas sensor is not directly underneath the opening; and sending the determined information to an apparatus having the gas sensor.1. An apparatus comprising:
a housing with an opening; a gas sensor positioned within the housing and displaced from an edge of the opening such that the gas sensor is not directly underneath the opening, the gas sensor operable to sense gas; and a device positioned within the housing, and operable to generate an electromechanical induced air movement such that gas is exchanged between the opening and the gas sensor. 2. The apparatus of claim 1, wherein the device is a speaker membrane which is operable to produce audible sound. 3. The apparatus of claim 2 comprises logic to lower frequency of an AC signal for the speaker membrane such that the speaker membrane vibrates without generating human audible noise. 4. The apparatus of claim 1, wherein the housing is part of a wearable device. 5. The apparatus of claim 1, wherein the device is at least one of:
a speaker membrane; a vibrating motor; a piezoelectric haptic actuator; a fan; or an air pump. 6. The apparatus of claim 1 comprises a processor to process data gathered by the gas sensor. 7. The apparatus of claim 6 comprises an antenna to transmit the processed data to another device. 8. The apparatus of claim 6, wherein the other device is one of:
a smart phone; a tablet PC; or a wireless communication enabled device. 9. The apparatus of claim 1 comprises an output mechanism to display an output of the gas sensor. 10. The apparatus of claim 9, wherein the output mechanism is at least one of:
a display screen; a light indicator; a sound indicator; or haptic feedback. 11. The apparatus of claim 1, wherein the gas sensor is operable to sense at least one of:
Nitrogen oxide gas; Carbon dioxide; Carbon monoxide; Air Humidity; Alcohol fumes; Ozone; Ammonia; Formaldehyde; Methane; Sulfur dioxide; or Volatile organic compound gas. 12. The apparatus of claim 1 comprises logic to manage airflow by the device. 13. A wearable device comprising:
a housing with an opening; a gas sensor positioned within the housing and displaced from an edge of the opening such that the gas sensor is not directly underneath the opening, the gas sensor operable to sense gas; an electromechanical mechanism positioned within the housing and operable to manage airflow to the gas sensor through the opening; a processor to process data gathered by the gas sensor; and an antenna to transmit the processed data to another device. 14. The wearable device of claim 13, wherein the electromechanical mechanism is a speaker membrane which is operable to produce audible sound. 15. The wearable device of claim 14 comprises logic to a lower frequency of an AC signal for the speaker membrane such that the speaker membrane vibrates without generating human audible noise. 16. The wearable device of claim 13, wherein the other device is one of:
a smart phone; a tablet PC; or a wireless communication enabled device. 17. The wearable device of claim 13, wherein the electromechanical mechanism is at least one of:
a speaker membrane; a vibrating motor; a piezoelectric haptic actuator; a fan; or an air pump. 18. The wearable device of claim 13, wherein the gas sensor is operable to sense at least one of:
Nitrogen oxide gas; Carbon dioxide; Carbon monoxide; Air Humidity; Alcohol fumes; Ozone; Ammonia; Formaldehyde; Methane; Sulfur dioxide; or Volatile organic compound gas. 19. A machine readable media having machine executable instructions, that when executed cause one or more processors to perform an operation comprising:
determining information associated to airflow to cause a gas sensor to sense gas, wherein the gas sensor is positioned within a housing and displaced from an edge of the opening such that the gas sensor is not directly underneath the opening; and sending the determined information to an apparatus having the gas sensor, wherein the determined information to cause a device to generate an electromechanical induced air movement corresponding to the determined information, wherein the device is part of the apparatus and positioned within the housing away from the opening. 20. The machine readable media of claim 19 having further machine executable instructions, that when executed cause the one or more processors to perform a further operation comprising:
receiving sensor information from the apparatus, the sensor information associated with gas sensed by the gas sensor. 21. The machine readable media of claim 20 having further machine executable instructions, that when executed cause the one or more processors to perform a further operation comprising:
analyzing the received sensor information; and
generating a report of the analysis. 22. The machine readable media of claim 21 having further machine executable instructions, that when executed cause the one or more processors to perform a further operation comprising:
sending an alarm when the analysis indicates sensed gas is above a threshold. 23. The machine readable media of claim 19, wherein the device is a speaker membrane, and wherein the machine readable media includes further machine executable instructions, that when executed cause the one or more processors to perform a further operation comprising:
instructing the apparatus to adjust the airflow by lowering frequency of an AC signal for the speaker membrane such that the speaker membrane vibrates without generating human audible noise. | 2,800 |
11,324 | 11,324 | 14,579,741 | 2,853 | A method of indicating a medium jam along a medium transport path; a plurality of microphones for detecting the sound of the medium being transported as it enters medium transport path and producing a signal representing the sound; a plurality of microphones for detecting the sound of the medium being transported in the medium transport path and producing a signal representing the sound in the medium transport; a plurality of microphones for detecting the sound of the medium being existing the medium transport path and producing a signal representing the sound of the medium existing the medium transport; a processor for producing sound values from the signal and computing the maximum sound responsive to the sound values per each microphone, and indicating the medium jam responsive to the sound values. | 1. A system for checking for medium jams along a medium transport path comprising:
one or more rollers for use in conveying the medium along the medium transport path; at least one microphone for detecting the sound of the medium being transported and producing a signal representing the sound; a processor configured to produce sound values from the signal and further configured to:
compute pre-transport path maximum values responsive to the sound values from the at least one microphone from a region before the medium transport path, including ignoring or weighting at least one of the sound values;
compute transport path maximum values responsive to the sound values from the at least one microphone from a region within the medium transport path, including ignoring or weighting at least one of the sound values;
compute post transport path maximum values responsive to the sound values from the at least one microphone from a region within the post transport path, including ignoring or weighting at least one of the sound values;
compare the pre-transport path maximum values, transport path maximum values, and post-transport path maximum values to at least one threshold; and
indicate the presence of a medium jam when at least one of the pre-transport path maximum values, transport path maximum values, or post-transport path maximum values is greater than the at least one threshold. 2. The system of claim 1 wherein the at least one microphone includes a microphone responsive to the sound values at entrance of the transport path. 3. The system of claim 1 wherein the at least one microphone includes a microphone responsive to the sound values inside of the transport path. 4. The system of claim 1 wherein the at least one microphone includes a microphone responsive to the sound values near an exit of the transport path. 5. The system of claim 1 wherein the processor is configured to indicate the presence of a medium jam when at least one of the transport path maximum values is greater than a transport path threshold value. 6. The system of claim 1 wherein the processor is configured to indicate the presence of medium jam when at least one of the post-transport path maximum values is greater than a post-transport path threshold value. 7. The system of claim 1 wherein the processor is configured to indicate the presence of medium jam when at least one of the transport path maximum values is greater than a pre-transport path maximum value. 8. The system of claim 1 wherein the processor is configured to indicate the presence of medium jam when at least one of the post-transport path maximum values is greater than a transport path maximum value. 9. The system of claim 1 wherein the processor is configured to indicate the presence of medium jam when at least one of the pre-transport path maximum values is greater than a pre-transport path threshold value. 10. The system of claim 4, wherein a medium jam location is identified by the at least one microphone producing a signal with a maximum value greater than a pre-transport path threshold value. 11. The system of claim 1, wherein the at least one microphone includes a plurality of microphones. 12. The system of claim 11, wherein the processor is configured to use a combination of signals from two or more of the plurality of microphones to compute the pre-transport path maximum values, transport path maximum values, and post-transport path maximum values and indicate a jam. 13. The system of claim 12, wherein the at least one microphone includes microphones positioned across the transport path, including a left microphone, right microphone, and middle microphone. 14. The system of claim 13, wherein the processor is further configured to detect a location of a jam by comparing signals from the left microphone, right microphone, and middle microphone. 15. A method for indicating a medium jam along a medium transport path comprising:
(a) conveying the medium along the medium transport path with one or more rollers; (b) detecting, with at least one microphone, the sound of the medium being transported and producing a signal representing the sound; (c) producing, with a processor, sound values from the signal and:
computing pre-transport path maximum values responsive to the sound values from the at least one microphone from a region before the medium transport path, including ignoring or weighting at least one of the sound values;
computing transport path maximum values responsive to the sound values from the at least one microphone from a region within the medium transport path, including ignoring or weighting at least one of the sound values;
computing post transport path maximum values responsive to the sound values from the at least one microphone from a region within the post transport path, including ignoring or weighting at least one of the sound values; and
indicating the presence of a medium jam when at least one of the re-transport path maximum values transport path maximum values or post-transport path maximum values is greater than the at least one threshold. 16. The method of claim 15 wherein the at least one microphone includes a microphone responsive to the sound values at entrance of the transport path. 17. The method of claim 15 wherein the at least one microphone includes a microphone responsive to the sound values inside of the transport path. 18. The method of claim 15 wherein the at least one microphone includes a microphone responsive to the sound values near an exit of the transport path. 19. The method of claim 15 wherein indicating the presence of a medium jam comprises indicating a jam when at least one of the transport path maximum values is greater than a transport path threshold value. 20. The method of claim 15 wherein indicating the presence of a medium jam comprises indicating a jam when at least one of the post-transport path maximum values is greater than a post-transport path threshold value. 21. The method of claim 15 wherein indicating the presence of a medium jam comprises indicating a jam when at least one of the transport path maximum values is greater than a pre-transport path maximum value. 22. The method of claim 15 wherein indicating the presence of a medium jam comprises indicating a jam when at least one of the post-transport path maximum values is greater than a transport path maximum value. 23. The method of claim 15 wherein indicating the presence of a medium jam comprises indicating a jam when at least one of the pre-transport path maximum values is greater than a pre-transport path threshold value. 24. The method of claim 18, wherein a medium jam location is identified by the at least one microphone producing a signal with a maximum value greater than a pre-transport path threshold value. 25. The method of claim 15, wherein the at least one microphone includes a plurality of microphones. 26. The method of claim 25, wherein a processor combines signals from two or more of the plurality of microphones to compute the pre-transport path maximum values transport path maximum values and post-transport path maximum values and indicate a jam. 27. The method of claim 26, wherein the at least one microphone includes microphones positioned across the transport path, including a left microphone, right microphone, and middle microphone. 28. The method of claim 27, wherein the processor detects a location of a jam by comparing signals from the left microphone, right microphone, and middle microphone. | A method of indicating a medium jam along a medium transport path; a plurality of microphones for detecting the sound of the medium being transported as it enters medium transport path and producing a signal representing the sound; a plurality of microphones for detecting the sound of the medium being transported in the medium transport path and producing a signal representing the sound in the medium transport; a plurality of microphones for detecting the sound of the medium being existing the medium transport path and producing a signal representing the sound of the medium existing the medium transport; a processor for producing sound values from the signal and computing the maximum sound responsive to the sound values per each microphone, and indicating the medium jam responsive to the sound values.1. A system for checking for medium jams along a medium transport path comprising:
one or more rollers for use in conveying the medium along the medium transport path; at least one microphone for detecting the sound of the medium being transported and producing a signal representing the sound; a processor configured to produce sound values from the signal and further configured to:
compute pre-transport path maximum values responsive to the sound values from the at least one microphone from a region before the medium transport path, including ignoring or weighting at least one of the sound values;
compute transport path maximum values responsive to the sound values from the at least one microphone from a region within the medium transport path, including ignoring or weighting at least one of the sound values;
compute post transport path maximum values responsive to the sound values from the at least one microphone from a region within the post transport path, including ignoring or weighting at least one of the sound values;
compare the pre-transport path maximum values, transport path maximum values, and post-transport path maximum values to at least one threshold; and
indicate the presence of a medium jam when at least one of the pre-transport path maximum values, transport path maximum values, or post-transport path maximum values is greater than the at least one threshold. 2. The system of claim 1 wherein the at least one microphone includes a microphone responsive to the sound values at entrance of the transport path. 3. The system of claim 1 wherein the at least one microphone includes a microphone responsive to the sound values inside of the transport path. 4. The system of claim 1 wherein the at least one microphone includes a microphone responsive to the sound values near an exit of the transport path. 5. The system of claim 1 wherein the processor is configured to indicate the presence of a medium jam when at least one of the transport path maximum values is greater than a transport path threshold value. 6. The system of claim 1 wherein the processor is configured to indicate the presence of medium jam when at least one of the post-transport path maximum values is greater than a post-transport path threshold value. 7. The system of claim 1 wherein the processor is configured to indicate the presence of medium jam when at least one of the transport path maximum values is greater than a pre-transport path maximum value. 8. The system of claim 1 wherein the processor is configured to indicate the presence of medium jam when at least one of the post-transport path maximum values is greater than a transport path maximum value. 9. The system of claim 1 wherein the processor is configured to indicate the presence of medium jam when at least one of the pre-transport path maximum values is greater than a pre-transport path threshold value. 10. The system of claim 4, wherein a medium jam location is identified by the at least one microphone producing a signal with a maximum value greater than a pre-transport path threshold value. 11. The system of claim 1, wherein the at least one microphone includes a plurality of microphones. 12. The system of claim 11, wherein the processor is configured to use a combination of signals from two or more of the plurality of microphones to compute the pre-transport path maximum values, transport path maximum values, and post-transport path maximum values and indicate a jam. 13. The system of claim 12, wherein the at least one microphone includes microphones positioned across the transport path, including a left microphone, right microphone, and middle microphone. 14. The system of claim 13, wherein the processor is further configured to detect a location of a jam by comparing signals from the left microphone, right microphone, and middle microphone. 15. A method for indicating a medium jam along a medium transport path comprising:
(a) conveying the medium along the medium transport path with one or more rollers; (b) detecting, with at least one microphone, the sound of the medium being transported and producing a signal representing the sound; (c) producing, with a processor, sound values from the signal and:
computing pre-transport path maximum values responsive to the sound values from the at least one microphone from a region before the medium transport path, including ignoring or weighting at least one of the sound values;
computing transport path maximum values responsive to the sound values from the at least one microphone from a region within the medium transport path, including ignoring or weighting at least one of the sound values;
computing post transport path maximum values responsive to the sound values from the at least one microphone from a region within the post transport path, including ignoring or weighting at least one of the sound values; and
indicating the presence of a medium jam when at least one of the re-transport path maximum values transport path maximum values or post-transport path maximum values is greater than the at least one threshold. 16. The method of claim 15 wherein the at least one microphone includes a microphone responsive to the sound values at entrance of the transport path. 17. The method of claim 15 wherein the at least one microphone includes a microphone responsive to the sound values inside of the transport path. 18. The method of claim 15 wherein the at least one microphone includes a microphone responsive to the sound values near an exit of the transport path. 19. The method of claim 15 wherein indicating the presence of a medium jam comprises indicating a jam when at least one of the transport path maximum values is greater than a transport path threshold value. 20. The method of claim 15 wherein indicating the presence of a medium jam comprises indicating a jam when at least one of the post-transport path maximum values is greater than a post-transport path threshold value. 21. The method of claim 15 wherein indicating the presence of a medium jam comprises indicating a jam when at least one of the transport path maximum values is greater than a pre-transport path maximum value. 22. The method of claim 15 wherein indicating the presence of a medium jam comprises indicating a jam when at least one of the post-transport path maximum values is greater than a transport path maximum value. 23. The method of claim 15 wherein indicating the presence of a medium jam comprises indicating a jam when at least one of the pre-transport path maximum values is greater than a pre-transport path threshold value. 24. The method of claim 18, wherein a medium jam location is identified by the at least one microphone producing a signal with a maximum value greater than a pre-transport path threshold value. 25. The method of claim 15, wherein the at least one microphone includes a plurality of microphones. 26. The method of claim 25, wherein a processor combines signals from two or more of the plurality of microphones to compute the pre-transport path maximum values transport path maximum values and post-transport path maximum values and indicate a jam. 27. The method of claim 26, wherein the at least one microphone includes microphones positioned across the transport path, including a left microphone, right microphone, and middle microphone. 28. The method of claim 27, wherein the processor detects a location of a jam by comparing signals from the left microphone, right microphone, and middle microphone. | 2,800 |
11,325 | 11,325 | 13,936,971 | 2,871 | An array substrate and a display apparatus including the array substrate are provided. The array substrate includes a substrate divided into a display area and a peripheral area adjacent to the display area. A pixel array is formed on the substrate corresponding to the display area and receives a driving signal. A driving circuit includes a plurality of stages and is formed on the substrate corresponding to the peripheral area. Each of the stages includes a first transistor having a source electrode connected to an output terminal to output the driving signal, a channel layer formed between a gate insulating layer and the source electrode, the channel layer having an opening to facilitate contact between a portion of the gate insulating layer and the source electrode, and a capacitor defined by a gate electrode of the first transistor, the source electrode, and the gate insulating layer contacting the source electrode. | 1˜3. (canceled) 4. An array substrate comprising: a substrate having a display area and a peripheral area adjacent to the display area; a pixel array that receives a driving signal, the pixel array formed on the substrate corresponding to the display area; and a driving circuit having a plurality of stages, and formed on the substrate corresponding to the peripheral area, wherein each of the stages comprises: a first transistor having a gate electrode, a source electrode, a drain electrode, a gate insulating layer that electrically insulates the gate electrode from the source and drain electrode, and a channel layer disposed on the gate insulating layer, wherein a portion of the channel layer, which is disposed between the gate electrode and the source electrode, includes an opening that exposes a portion of the gate insulating layer,
wherein the source electrode comprises: a main source electrode and a plurality of sub source electrodes branched from the main source electrode, the first transistor comprises a drain electrode having a main drain electrode and a plurality of sub drain electrodes branched from the main drain electrode, wherein the sub drain electrodes are disposed between adjacent sub source electrodes. 5. The array substrate of claim 4, wherein the sub source electrodes are spaced apart from the sub drain electrodes by a first distance on the gate electrode. 6. The array substrate of claim 4, wherein the main source electrode is overlapped by the gate electrode, and the opening of the channel layer corresponds to the overlapped area between the main source electrode and the gate electrode. 7-14. (canceled) 15. A display apparatus comprising: an array substrate; and an opposite substrate facing the array substrate, the array substrate comprising: a substrate having a display area and a peripheral area adjacent to the display area; a pixel array that receives a driving signal, the pixel array formed on the substrate corresponding to the display area; and a driving circuit having a plurality of stages, and formed on the substrate corresponding to the peripheral area, wherein each of the stages comprises: a transistor having a gate electrode, a source electrode, a drain electrode, a gate insulating layer that electrically insulates the gate electrode from the source and drain electrode, and a channel layer disposed on the gate insulating layer, wherein a portion of the channel layer, which is disposed between the gate electrode and the source electrode, includes an opening that exposes a portion of the gate insulating layer. 16. The display apparatus of claim 15, wherein the transistor comprises: a drain electrode having a main drain electrode and a plurality of sub drain electrodes branched from the main drain electrode and spaced apart from each other, and the source electrode comprises an electrode body and a plurality of recesses receiving the sub drain electrodes. 17. The display apparatus of claim 16, wherein the electrode body is overlapped by the gate electrode, and the opening of the channel layer corresponds to the overlapped area between the electrode body and the gate electrode. 18. The display apparatus of claim 15, wherein the source electrode comprises: a main source electrode and a plurality of sub source electrodes branched from the main source electrode, the transistor comprises a drain electrode having a main drain electrode and a plurality of sub drain electrodes branched from the main drain electrode, wherein the sub drain electrodes are disposed between adjacent sub source electrodes. 19. The display apparatus of claim 18, wherein the main source electrode is overlapped by the gate electrode, and the opening of the channel layer corresponds to the overlapped area between the main source electrode and the gate electrode. 20. The display apparatus of claim 15, further comprising: a liquid crystal layer disposed between the array substrate and the opposite substrate; and a sealant disposed between the array substrate and the opposite substrate that seals the liquid crystal layer. 21. The display apparatus of claim 20, wherein the sealant is overlapped by the driving circuit. 22. The display apparatus of claim 15, wherein the opposite substrate comprises: a substrate; a common electrode; and a color filter layer disposed between the substrate and the common electrode, the color filter layer comprising: color pixels formed on a portion of the substrate corresponding to the display area; a first black matrix formed between adjacent color pixels; and a second black matrix formed in an area corresponding to the peripheral area. 23. The display apparatus of claim 15, wherein the plurality of stages are connected one after another to each other. 24. A display apparatus comprising: an array substrate; an opposite substrate facing the array substrate, a liquid crystal layer disposed between the array substrate and the opposite substrate; and the array substrate comprising: a substrate having a display area and a first peripheral area adjacent to the display area; a pixel array that receives a gate signal and a data signal from a data driving circuit, the pixel array formed on the substrate corresponding to the display area; and a driving circuit having a plurality of stages, and formed on the substrate corresponding to the first peripheral area to apply the gate signal to the pixel array, wherein each of the stages comprises: a transistor having a gate electrode, a source electrode, a drain electrode, a gate insulating layer that electrically insulates the gate electrode from the source and drain electrode, and a channel layer disposed on the gate insulating layer, wherein a portion of the channel layer, which is disposed between the gate electrode and the source electrode, includes an opening that exposes a portion of the gate insulating layer. 25. The display apparatus of claim 24, wherein the data driving circuit is formed in a second peripheral area adjacent to the first peripheral area. 26. The display apparatus of claim 24, wherein the plurality of stages are connected one after another to each other. 27. The display apparatus of claim 24, wherein the data driving circuit is formed on a film. | An array substrate and a display apparatus including the array substrate are provided. The array substrate includes a substrate divided into a display area and a peripheral area adjacent to the display area. A pixel array is formed on the substrate corresponding to the display area and receives a driving signal. A driving circuit includes a plurality of stages and is formed on the substrate corresponding to the peripheral area. Each of the stages includes a first transistor having a source electrode connected to an output terminal to output the driving signal, a channel layer formed between a gate insulating layer and the source electrode, the channel layer having an opening to facilitate contact between a portion of the gate insulating layer and the source electrode, and a capacitor defined by a gate electrode of the first transistor, the source electrode, and the gate insulating layer contacting the source electrode.1˜3. (canceled) 4. An array substrate comprising: a substrate having a display area and a peripheral area adjacent to the display area; a pixel array that receives a driving signal, the pixel array formed on the substrate corresponding to the display area; and a driving circuit having a plurality of stages, and formed on the substrate corresponding to the peripheral area, wherein each of the stages comprises: a first transistor having a gate electrode, a source electrode, a drain electrode, a gate insulating layer that electrically insulates the gate electrode from the source and drain electrode, and a channel layer disposed on the gate insulating layer, wherein a portion of the channel layer, which is disposed between the gate electrode and the source electrode, includes an opening that exposes a portion of the gate insulating layer,
wherein the source electrode comprises: a main source electrode and a plurality of sub source electrodes branched from the main source electrode, the first transistor comprises a drain electrode having a main drain electrode and a plurality of sub drain electrodes branched from the main drain electrode, wherein the sub drain electrodes are disposed between adjacent sub source electrodes. 5. The array substrate of claim 4, wherein the sub source electrodes are spaced apart from the sub drain electrodes by a first distance on the gate electrode. 6. The array substrate of claim 4, wherein the main source electrode is overlapped by the gate electrode, and the opening of the channel layer corresponds to the overlapped area between the main source electrode and the gate electrode. 7-14. (canceled) 15. A display apparatus comprising: an array substrate; and an opposite substrate facing the array substrate, the array substrate comprising: a substrate having a display area and a peripheral area adjacent to the display area; a pixel array that receives a driving signal, the pixel array formed on the substrate corresponding to the display area; and a driving circuit having a plurality of stages, and formed on the substrate corresponding to the peripheral area, wherein each of the stages comprises: a transistor having a gate electrode, a source electrode, a drain electrode, a gate insulating layer that electrically insulates the gate electrode from the source and drain electrode, and a channel layer disposed on the gate insulating layer, wherein a portion of the channel layer, which is disposed between the gate electrode and the source electrode, includes an opening that exposes a portion of the gate insulating layer. 16. The display apparatus of claim 15, wherein the transistor comprises: a drain electrode having a main drain electrode and a plurality of sub drain electrodes branched from the main drain electrode and spaced apart from each other, and the source electrode comprises an electrode body and a plurality of recesses receiving the sub drain electrodes. 17. The display apparatus of claim 16, wherein the electrode body is overlapped by the gate electrode, and the opening of the channel layer corresponds to the overlapped area between the electrode body and the gate electrode. 18. The display apparatus of claim 15, wherein the source electrode comprises: a main source electrode and a plurality of sub source electrodes branched from the main source electrode, the transistor comprises a drain electrode having a main drain electrode and a plurality of sub drain electrodes branched from the main drain electrode, wherein the sub drain electrodes are disposed between adjacent sub source electrodes. 19. The display apparatus of claim 18, wherein the main source electrode is overlapped by the gate electrode, and the opening of the channel layer corresponds to the overlapped area between the main source electrode and the gate electrode. 20. The display apparatus of claim 15, further comprising: a liquid crystal layer disposed between the array substrate and the opposite substrate; and a sealant disposed between the array substrate and the opposite substrate that seals the liquid crystal layer. 21. The display apparatus of claim 20, wherein the sealant is overlapped by the driving circuit. 22. The display apparatus of claim 15, wherein the opposite substrate comprises: a substrate; a common electrode; and a color filter layer disposed between the substrate and the common electrode, the color filter layer comprising: color pixels formed on a portion of the substrate corresponding to the display area; a first black matrix formed between adjacent color pixels; and a second black matrix formed in an area corresponding to the peripheral area. 23. The display apparatus of claim 15, wherein the plurality of stages are connected one after another to each other. 24. A display apparatus comprising: an array substrate; an opposite substrate facing the array substrate, a liquid crystal layer disposed between the array substrate and the opposite substrate; and the array substrate comprising: a substrate having a display area and a first peripheral area adjacent to the display area; a pixel array that receives a gate signal and a data signal from a data driving circuit, the pixel array formed on the substrate corresponding to the display area; and a driving circuit having a plurality of stages, and formed on the substrate corresponding to the first peripheral area to apply the gate signal to the pixel array, wherein each of the stages comprises: a transistor having a gate electrode, a source electrode, a drain electrode, a gate insulating layer that electrically insulates the gate electrode from the source and drain electrode, and a channel layer disposed on the gate insulating layer, wherein a portion of the channel layer, which is disposed between the gate electrode and the source electrode, includes an opening that exposes a portion of the gate insulating layer. 25. The display apparatus of claim 24, wherein the data driving circuit is formed in a second peripheral area adjacent to the first peripheral area. 26. The display apparatus of claim 24, wherein the plurality of stages are connected one after another to each other. 27. The display apparatus of claim 24, wherein the data driving circuit is formed on a film. | 2,800 |
11,326 | 11,326 | 13,771,789 | 2,836 | A monitoring system for an enclosure having an arc quenching gas includes at least one fluid characteristic sensor in fluid communication with an interior the enclosure, and an electronic controller operatively coupled to the at least one fluid characteristic sensor. The electronic controller forecasts a maintenance event based on values received from the at least one fluid characteristic sensor. | 1. A method of monitoring a circuit breaker having a first conductive element and a second conductive element moveable relative to the first conductive element, the first conductive element and the second conductive element cooperating to provide a closed state that permits an electrical current to flow between the first conductive element and the second conductive element and an open state wherein the first conductive element is spaced apart from the second conductive element, the first conductive element and the second conductive element being positioned in an interior of an enclosure including an arc quenching gas, the method comprising the steps of:
positioning at least one fluid characteristic sensor in fluid communication with the interior of the enclosure; monitoring a relative humidity of the interior of the enclosure with the at least one fluid characteristic sensor; and forecasting a maintenance event of the circuit breaker based on the relative humidity. 2. The method of claim 1, further comprising the step of comparing the relative humidity of the interior of the enclosure to a predetermined threshold value. 3. The method of claim 2, further comprising the step of controlling the state of the first and second conductive elements when the relative humidity of the interior of the enclosure is greater than the predetermined threshold value. 4. A method of monitoring conditions within an interior of an enclosure of a circuit breaker, the enclosure including a first conductive element and a second conductive element moveable relative to the first conductive element, the method comprising the steps of:
introducing a fluid containing an arc-quenching gas into the interior of the enclosure; monitoring relative humidity of the fluid within the interior of the enclosure; comparing the relative humidity of the fluid to a predetermined threshold value; and maintaining a flow of the fluid into the interior of the enclosure when the relative humidity of the fluid is less than the predetermined threshold value. 5. The method of claim 4, wherein at least one fluid characteristic sensor is configured to cooperate with an electronic controller to measure the relative humidity of the fluid during the monitoring step. 6. The method of claim 5, wherein the at least one fluid characteristic sensor is a moisture sensor. 7. The method of claim 5, wherein the at least one fluid characteristic sensor includes a temperature sensor and density sensor. 8. The method of claim 7, further comprising the step of calculating the relative humidity of the fluid from data of the temperature sensor and data from the density sensor. 9. The method of claim 4, further comprising the step of monitoring a density of the fluid within the interior of the enclosure. 10. The method of claim 9, further comprising the step of discontinuing the flow of the fluid into the interior of the enclosure when the density of the fluid is greater than a predetermined threshold value. 11. The method of claim 4, further comprising the step of monitoring an amount of moisture in the fluid when introducing the fluid into the interior of the enclosure. 12. The method of claim 11, further comprising the steps of receiving the fluid from a gas supply vendor and adjusting a consideration to the gas supply vendor when the amount of moisture in the fluid is greater than a predetermined threshold amount. 13. The method of claim 12, wherein the consideration is a payment. 14. A circuit breaker system, comprising:
an enclosure having at least a first conductive element and a second conductive element; an arc quenching gas within an interior of the enclosure and generally surrounding the first and second conductive elements; and a monitoring system comprising:
a housing configured to receive a fill gas and further configured to flow the fill gas to the enclosure;
at least one fluid characteristic sensor supported by the housing; and
an electronic controller configured to receive a signal from the at least one fluid characteristic sensor to determine at least one moisture characteristic of the arc quenching gas. 15. The circuit breaker system of claim 14, wherein the monitoring system is further configured to determine at least one of a density within the interior of the enclosure and a fault arc energy of the first and second conductive elements. 16. The circuit breaker system of claim 15, wherein the at least one fluid characteristic sensor includes a moisture sensor. 17. A monitoring system for an enclosure including an arc quenching gas, the monitoring system comprising:
a moisture sensor in fluid communication with an interior of the enclosure; and an electronic controller operatively coupled to the moisture sensor, the electronic controller forecasting a maintenance event based on values received from the moisture sensor. 18. The monitoring system of claim 17, wherein the moisture sensor is configured to measure a relative humidity of the interior of the enclosure. 19. The monitoring system of claim 18, wherein the moisture sensor is configured to measure a temperature of the interior of the enclosure. 20. The monitoring system of claim 19, wherein the measured relative humidity of the interior of the enclosure is compared to a predetermined relative humidity threshold value. 21. The monitoring system of claim 20, further comprising an alarm configured to indicate when the measured relative humidity value is greater than the predetermined relative humidity threshold value. 22. The monitoring system of claim 21, wherein the electronic controller is electronically coupled to the remote device and provides an indication of the alarm to a remote device. 23. The monitoring system of claim 21, wherein the monitoring system is provided on a circuit breaker assembly and the controller is configured to prevent the circuit breaker assembly from switching between an open state and a closed state when the measured relative humidity value is greater than the predetermined relative humidity threshold. 24. The monitoring system of claim 20, wherein the threshold value is between approximately 0.5%-2.0%. 25. The monitoring system of claim 24, wherein the predetermined relative humidity threshold value varies with the measured temperature value. 26. The monitoring system of claim 20, further comprising a memory for storing the measured relative humidity values, wherein the monitoring system is configured to generate a forecast of when the measured relative humidity values will exceed the predetermined relative humidity threshold value. 27. The monitoring system of claim 26, wherein the measured temperature values of the interior of the enclosure are used to generate the forecast. 28. A monitoring system for an enclosure including an arc quenching gas, the monitoring system comprising:
a moisture sensor in fluid communication with an interior the enclosure; a fill port for communicating arc quenching gas to an interior of the enclosure; and an electronic controller operatively coupled to the moisture sensor, the electronic controller determining an occurrence of a fill event and determining a moisture characteristic of a fill gas of the fill event. 29. The monitoring system of claim 28, further comprising a housing having a base and a lid, wherein at least the moisture sensor is supported within the housing and the fill port is supported by the base. 30. The monitoring system of claim 29, wherein the fill port is configured to flow the fill gas into the enclosure, the enclosure containing a first conductive element and a second conductive element moveable relative to the first conductive element, the first conductive element and the second conductive element cooperating to provide a closed state that permits an electrical current to flow between the first conductive element and the second conductive element and an open state wherein the first conductive element is spaced apart from the second conductive element, and the first conductive element and the second conductive element being positioned in the interior of the enclosure. 31. The monitoring system of claim 30, wherein the fill gas flows past the moisture sensor when flowing from the fill port to the enclosure. 32. The monitoring system of claim 30, wherein the electronic controller receives a signal from the moisture sensor indicative of an amount of moisture in the fill gas. 33. The monitoring system of claim 32, wherein when the amount of moisture in the fill gas is greater than a predetermined moisture threshold, the monitoring system is configured to initiate at least one of an alarm signal and a signal to prevent the fill gas at the fill port from flowing into the enclosure. 34. The monitoring system of claim 28, wherein the monitoring system is configured to detect when a fill operation occurs by determining a change in density within the interior of the enclosure. | A monitoring system for an enclosure having an arc quenching gas includes at least one fluid characteristic sensor in fluid communication with an interior the enclosure, and an electronic controller operatively coupled to the at least one fluid characteristic sensor. The electronic controller forecasts a maintenance event based on values received from the at least one fluid characteristic sensor.1. A method of monitoring a circuit breaker having a first conductive element and a second conductive element moveable relative to the first conductive element, the first conductive element and the second conductive element cooperating to provide a closed state that permits an electrical current to flow between the first conductive element and the second conductive element and an open state wherein the first conductive element is spaced apart from the second conductive element, the first conductive element and the second conductive element being positioned in an interior of an enclosure including an arc quenching gas, the method comprising the steps of:
positioning at least one fluid characteristic sensor in fluid communication with the interior of the enclosure; monitoring a relative humidity of the interior of the enclosure with the at least one fluid characteristic sensor; and forecasting a maintenance event of the circuit breaker based on the relative humidity. 2. The method of claim 1, further comprising the step of comparing the relative humidity of the interior of the enclosure to a predetermined threshold value. 3. The method of claim 2, further comprising the step of controlling the state of the first and second conductive elements when the relative humidity of the interior of the enclosure is greater than the predetermined threshold value. 4. A method of monitoring conditions within an interior of an enclosure of a circuit breaker, the enclosure including a first conductive element and a second conductive element moveable relative to the first conductive element, the method comprising the steps of:
introducing a fluid containing an arc-quenching gas into the interior of the enclosure; monitoring relative humidity of the fluid within the interior of the enclosure; comparing the relative humidity of the fluid to a predetermined threshold value; and maintaining a flow of the fluid into the interior of the enclosure when the relative humidity of the fluid is less than the predetermined threshold value. 5. The method of claim 4, wherein at least one fluid characteristic sensor is configured to cooperate with an electronic controller to measure the relative humidity of the fluid during the monitoring step. 6. The method of claim 5, wherein the at least one fluid characteristic sensor is a moisture sensor. 7. The method of claim 5, wherein the at least one fluid characteristic sensor includes a temperature sensor and density sensor. 8. The method of claim 7, further comprising the step of calculating the relative humidity of the fluid from data of the temperature sensor and data from the density sensor. 9. The method of claim 4, further comprising the step of monitoring a density of the fluid within the interior of the enclosure. 10. The method of claim 9, further comprising the step of discontinuing the flow of the fluid into the interior of the enclosure when the density of the fluid is greater than a predetermined threshold value. 11. The method of claim 4, further comprising the step of monitoring an amount of moisture in the fluid when introducing the fluid into the interior of the enclosure. 12. The method of claim 11, further comprising the steps of receiving the fluid from a gas supply vendor and adjusting a consideration to the gas supply vendor when the amount of moisture in the fluid is greater than a predetermined threshold amount. 13. The method of claim 12, wherein the consideration is a payment. 14. A circuit breaker system, comprising:
an enclosure having at least a first conductive element and a second conductive element; an arc quenching gas within an interior of the enclosure and generally surrounding the first and second conductive elements; and a monitoring system comprising:
a housing configured to receive a fill gas and further configured to flow the fill gas to the enclosure;
at least one fluid characteristic sensor supported by the housing; and
an electronic controller configured to receive a signal from the at least one fluid characteristic sensor to determine at least one moisture characteristic of the arc quenching gas. 15. The circuit breaker system of claim 14, wherein the monitoring system is further configured to determine at least one of a density within the interior of the enclosure and a fault arc energy of the first and second conductive elements. 16. The circuit breaker system of claim 15, wherein the at least one fluid characteristic sensor includes a moisture sensor. 17. A monitoring system for an enclosure including an arc quenching gas, the monitoring system comprising:
a moisture sensor in fluid communication with an interior of the enclosure; and an electronic controller operatively coupled to the moisture sensor, the electronic controller forecasting a maintenance event based on values received from the moisture sensor. 18. The monitoring system of claim 17, wherein the moisture sensor is configured to measure a relative humidity of the interior of the enclosure. 19. The monitoring system of claim 18, wherein the moisture sensor is configured to measure a temperature of the interior of the enclosure. 20. The monitoring system of claim 19, wherein the measured relative humidity of the interior of the enclosure is compared to a predetermined relative humidity threshold value. 21. The monitoring system of claim 20, further comprising an alarm configured to indicate when the measured relative humidity value is greater than the predetermined relative humidity threshold value. 22. The monitoring system of claim 21, wherein the electronic controller is electronically coupled to the remote device and provides an indication of the alarm to a remote device. 23. The monitoring system of claim 21, wherein the monitoring system is provided on a circuit breaker assembly and the controller is configured to prevent the circuit breaker assembly from switching between an open state and a closed state when the measured relative humidity value is greater than the predetermined relative humidity threshold. 24. The monitoring system of claim 20, wherein the threshold value is between approximately 0.5%-2.0%. 25. The monitoring system of claim 24, wherein the predetermined relative humidity threshold value varies with the measured temperature value. 26. The monitoring system of claim 20, further comprising a memory for storing the measured relative humidity values, wherein the monitoring system is configured to generate a forecast of when the measured relative humidity values will exceed the predetermined relative humidity threshold value. 27. The monitoring system of claim 26, wherein the measured temperature values of the interior of the enclosure are used to generate the forecast. 28. A monitoring system for an enclosure including an arc quenching gas, the monitoring system comprising:
a moisture sensor in fluid communication with an interior the enclosure; a fill port for communicating arc quenching gas to an interior of the enclosure; and an electronic controller operatively coupled to the moisture sensor, the electronic controller determining an occurrence of a fill event and determining a moisture characteristic of a fill gas of the fill event. 29. The monitoring system of claim 28, further comprising a housing having a base and a lid, wherein at least the moisture sensor is supported within the housing and the fill port is supported by the base. 30. The monitoring system of claim 29, wherein the fill port is configured to flow the fill gas into the enclosure, the enclosure containing a first conductive element and a second conductive element moveable relative to the first conductive element, the first conductive element and the second conductive element cooperating to provide a closed state that permits an electrical current to flow between the first conductive element and the second conductive element and an open state wherein the first conductive element is spaced apart from the second conductive element, and the first conductive element and the second conductive element being positioned in the interior of the enclosure. 31. The monitoring system of claim 30, wherein the fill gas flows past the moisture sensor when flowing from the fill port to the enclosure. 32. The monitoring system of claim 30, wherein the electronic controller receives a signal from the moisture sensor indicative of an amount of moisture in the fill gas. 33. The monitoring system of claim 32, wherein when the amount of moisture in the fill gas is greater than a predetermined moisture threshold, the monitoring system is configured to initiate at least one of an alarm signal and a signal to prevent the fill gas at the fill port from flowing into the enclosure. 34. The monitoring system of claim 28, wherein the monitoring system is configured to detect when a fill operation occurs by determining a change in density within the interior of the enclosure. | 2,800 |
11,327 | 11,327 | 14,803,145 | 2,852 | There is provided a current sense circuit ( 134 ). An exemplary current sense circuit ( 134 ) comprises a voltage-to-current converter circuit ( 218 ) that is adapted to receive a voltage that is proportional to a load current drawn from a battery ( 110 ) by a load ( 202 ) and to produce a current proportional to the load current, and a current-to-voltage converter circuit ( 228 ) that is adapted to receive the current proportional to the load current and to produce a voltage proportional to the load. current based on a regulated voltage source ( 230 ). | 1. A current sense circuit comprising:
a voltage-to-current converter circuit that is adapted to receive a voltage that is proportional to a load current through a load and to produce a current proportional to the load current; and a current-to-voltage converter circuit that is adapted to receive the current proportional to the load current and to produce a voltage proportional to the load current. 2. The current sense circuit recited in claim 1, comprising a current sense resistor having a voltage drop that is applied differentially to the voltage-to-current converter circuit. 3. The current sense circuit recited in claim 1, comprising an analog-to-digital converter that is adapted to produce a digital output corresponding to the voltage proportional to the load current. 4. The current sense circuit recited in claim 1, wherein the current-to-voltage converter circuit is adapted to produce an output voltage that falls as the current proportional to the load current increases. 5. The current sense circuit recited in claim 1, wherein the load comprises an active antenna. 6. The currant sense circuit recited in claim 1, wherein the current sense circuit comprises a portion of a vehicle audio subsystem. 7. The current sense circuit recited in claim 1, wherein the voltage-to-current converter circuit comprises a single Junction Field Effect Transistor (JFET) transistor that solely produces the current proportional to the load current. 8. The current sense circuit recited in claim 1, wherein the current-to-voltage converter circuit is adapted to receive the current proportional to the load current and to produce a voltage proportional to the load current based on a regulated voltage source. 9. A method of sensing current drawn by a load, the method comprising:
receiving a voltage that is proportional to a load current drawn by a load; producing a current proportional to the load current; receiving the current proportional to the load current; and producing a voltage proportional to the load current. 10. The method recited in claim 9, wherein the current proportional to the load current is produced based on a regulated voltage source. 11. The method recited in claim 9, wherein the current proportional to the load current is produced by a junction Field Effect Transistor (JFET). 12. The method recited in claim 9, comprising differentially applying a voltage drop to produce the current proportional to the load current. 13. The method recited in claim 9, comprising producing a digital output corresponding to the voltage proportional to the load current. 14. The method recited in claim 9, comprising causing the voltage proportional to the load current to fall in response to a rise in the current proportional to the load current. 15. A motorized vehicle, comprising:
a chassis; an engine that is supported by the chassis; a power train adapted to be driven by the engine; control electronics that are adapted to control the engine and the power train; and an entertainment system that includes an audio subsystem, the audio subsystem being adapted to provide audio programming to occupants of the motorized vehicle, the audio subsystem having a current sense circuit, the current sense circuit comprising:
a voltage-to-current converter circuit that is adapted to receive a voltage that is proportional to a load current drawn from a battery by a load and to produce a current proportional to the load current; and
a current-to-voltage converter circuit that is adapted to receive the current proportional to the load current and to produce a voltage proportional to the load current. 16. The motorized vehicle recited in claim 15, wherein the voltage-to-current converter circuit comprises a JFET that produces the current proportional to the load current drawn from the battery. 17. The motorized vehicle recited in claim 15, comprising a current sense resistor having a voltage drop that is applied differentially to the voltage-to-current converter circuit. 18. The motorized vehicle recited in claim 15, comprising an analog-to-digital converter that is adapted to produce a digital output corresponding to the voltage proportional to the load current. 19. The motorized vehicle recited in claim 15, wherein the current-to-voltage converter circuit is adapted to:
produce an output voltage that falls as the current proportional to the load current increases; and produce a voltage proportional to the load current based on a regulated voltage source. 20. The motorized vehicle recited in claim 15, wherein the load comprises an active antenna. | There is provided a current sense circuit ( 134 ). An exemplary current sense circuit ( 134 ) comprises a voltage-to-current converter circuit ( 218 ) that is adapted to receive a voltage that is proportional to a load current drawn from a battery ( 110 ) by a load ( 202 ) and to produce a current proportional to the load current, and a current-to-voltage converter circuit ( 228 ) that is adapted to receive the current proportional to the load current and to produce a voltage proportional to the load. current based on a regulated voltage source ( 230 ).1. A current sense circuit comprising:
a voltage-to-current converter circuit that is adapted to receive a voltage that is proportional to a load current through a load and to produce a current proportional to the load current; and a current-to-voltage converter circuit that is adapted to receive the current proportional to the load current and to produce a voltage proportional to the load current. 2. The current sense circuit recited in claim 1, comprising a current sense resistor having a voltage drop that is applied differentially to the voltage-to-current converter circuit. 3. The current sense circuit recited in claim 1, comprising an analog-to-digital converter that is adapted to produce a digital output corresponding to the voltage proportional to the load current. 4. The current sense circuit recited in claim 1, wherein the current-to-voltage converter circuit is adapted to produce an output voltage that falls as the current proportional to the load current increases. 5. The current sense circuit recited in claim 1, wherein the load comprises an active antenna. 6. The currant sense circuit recited in claim 1, wherein the current sense circuit comprises a portion of a vehicle audio subsystem. 7. The current sense circuit recited in claim 1, wherein the voltage-to-current converter circuit comprises a single Junction Field Effect Transistor (JFET) transistor that solely produces the current proportional to the load current. 8. The current sense circuit recited in claim 1, wherein the current-to-voltage converter circuit is adapted to receive the current proportional to the load current and to produce a voltage proportional to the load current based on a regulated voltage source. 9. A method of sensing current drawn by a load, the method comprising:
receiving a voltage that is proportional to a load current drawn by a load; producing a current proportional to the load current; receiving the current proportional to the load current; and producing a voltage proportional to the load current. 10. The method recited in claim 9, wherein the current proportional to the load current is produced based on a regulated voltage source. 11. The method recited in claim 9, wherein the current proportional to the load current is produced by a junction Field Effect Transistor (JFET). 12. The method recited in claim 9, comprising differentially applying a voltage drop to produce the current proportional to the load current. 13. The method recited in claim 9, comprising producing a digital output corresponding to the voltage proportional to the load current. 14. The method recited in claim 9, comprising causing the voltage proportional to the load current to fall in response to a rise in the current proportional to the load current. 15. A motorized vehicle, comprising:
a chassis; an engine that is supported by the chassis; a power train adapted to be driven by the engine; control electronics that are adapted to control the engine and the power train; and an entertainment system that includes an audio subsystem, the audio subsystem being adapted to provide audio programming to occupants of the motorized vehicle, the audio subsystem having a current sense circuit, the current sense circuit comprising:
a voltage-to-current converter circuit that is adapted to receive a voltage that is proportional to a load current drawn from a battery by a load and to produce a current proportional to the load current; and
a current-to-voltage converter circuit that is adapted to receive the current proportional to the load current and to produce a voltage proportional to the load current. 16. The motorized vehicle recited in claim 15, wherein the voltage-to-current converter circuit comprises a JFET that produces the current proportional to the load current drawn from the battery. 17. The motorized vehicle recited in claim 15, comprising a current sense resistor having a voltage drop that is applied differentially to the voltage-to-current converter circuit. 18. The motorized vehicle recited in claim 15, comprising an analog-to-digital converter that is adapted to produce a digital output corresponding to the voltage proportional to the load current. 19. The motorized vehicle recited in claim 15, wherein the current-to-voltage converter circuit is adapted to:
produce an output voltage that falls as the current proportional to the load current increases; and produce a voltage proportional to the load current based on a regulated voltage source. 20. The motorized vehicle recited in claim 15, wherein the load comprises an active antenna. | 2,800 |
11,328 | 11,328 | 13,892,715 | 2,832 | A rotating electrical machine including a stator or rotor including a plurality of serially connected switching cells. Each switching cell includes a winding subsection and a current reverser arranged to controllably alter a current direction through the winding subsection, and each current reverser includes a capacitor arranged to form a resonant circuit in cooperation with the winding subsection. | 1. A rotating electrical machine comprising:
a stator or rotor comprising a plurality of serially connected switching cells, wherein each switching cell comprises a winding subsection and a current reverser arranged to controllably alter a current direction through the winding subsection, wherein each current reverser comprises a capacitor arranged to form a resonant circuit in cooperation with the winding subsection, and wherein each current reverser further comprises switch assemblies capable of bidirectional voltage blocking for changing the polarity of the voltage across the winding subsection. 2. The rotating electrical machine according to claim 1, wherein the stator or the rotor comprises a plurality of in parallel connected branches, each branch comprising a plurality of serially connected switching cells. 3. The rotating electrical machine according to claim 1, wherein a source of the current through the winding subsection is a DC source. 4. The rotating electrical machine according to claim 1, wherein at least one of the switching cells comprise a plurality of winding subsections and the capacitor is connected in parallel with the winding subsections of the switching cells. 5. The rotating electrical machine according to claim 1, wherein the capacitor of each current reverser is connected in parallel with the respective winding subsection. 6. The rotating electrical machine according to claim 1, wherein the switching cells are provided in the stator. 7. The rotating electrical machine according to claim 1, wherein the switching cells are provided in the rotor. 8. The rotating electrical machine according to claim 1, wherein each current reverser comprises a plurality of capacitors arranged to form part of the resonant circuit. 9. The rotating electrical machine according to claim 1, wherein each current reverser comprises a first leg comprising two switches arranged serially between a positive and negative terminal of the current reverser, and a second leg comprising two switches arranged serially between the positive and negative terminal of the current reverser, wherein the resonant circuit is arranged between a first point being between the two switches of the first leg and a second point being between the two switches of the second leg. 10. The rotating electrical machine according to claim 1, wherein each current reverser is arranged to alter the current through the winding subsection when an absolute value of a back electromotive force of the respective switching cell is determined to be lower than a threshold value. 11. The rotating electrical machine according to claim 1, wherein the capacitor of each switching cell is selected such that at least one time constant of the resonant circuit is suitable for a desired switching sequence of the respective switching cell. 12. The rotating electrical machine according to claim 1, wherein each switching cell comprises a switch to allow disconnection of the capacitor from the winding subsection. 13. The rotating electrical machine according to claim 1, wherein each switching cell further comprises one switch on each side of the capacitor to allow disconnection of the capacitor from the winding subsection. 14. The rotating electrical machine according to claim 1, wherein the rotating electrical machine is a synchronous electrical machine. 15. The rotating electrical machine according to claim 1, wherein the DC source is a constant current source. 16. The rotating electrical machine according to claim 1, wherein the winding subsections of the serially connected switching cells together constitute a winding of the rotating electrical machine. | A rotating electrical machine including a stator or rotor including a plurality of serially connected switching cells. Each switching cell includes a winding subsection and a current reverser arranged to controllably alter a current direction through the winding subsection, and each current reverser includes a capacitor arranged to form a resonant circuit in cooperation with the winding subsection.1. A rotating electrical machine comprising:
a stator or rotor comprising a plurality of serially connected switching cells, wherein each switching cell comprises a winding subsection and a current reverser arranged to controllably alter a current direction through the winding subsection, wherein each current reverser comprises a capacitor arranged to form a resonant circuit in cooperation with the winding subsection, and wherein each current reverser further comprises switch assemblies capable of bidirectional voltage blocking for changing the polarity of the voltage across the winding subsection. 2. The rotating electrical machine according to claim 1, wherein the stator or the rotor comprises a plurality of in parallel connected branches, each branch comprising a plurality of serially connected switching cells. 3. The rotating electrical machine according to claim 1, wherein a source of the current through the winding subsection is a DC source. 4. The rotating electrical machine according to claim 1, wherein at least one of the switching cells comprise a plurality of winding subsections and the capacitor is connected in parallel with the winding subsections of the switching cells. 5. The rotating electrical machine according to claim 1, wherein the capacitor of each current reverser is connected in parallel with the respective winding subsection. 6. The rotating electrical machine according to claim 1, wherein the switching cells are provided in the stator. 7. The rotating electrical machine according to claim 1, wherein the switching cells are provided in the rotor. 8. The rotating electrical machine according to claim 1, wherein each current reverser comprises a plurality of capacitors arranged to form part of the resonant circuit. 9. The rotating electrical machine according to claim 1, wherein each current reverser comprises a first leg comprising two switches arranged serially between a positive and negative terminal of the current reverser, and a second leg comprising two switches arranged serially between the positive and negative terminal of the current reverser, wherein the resonant circuit is arranged between a first point being between the two switches of the first leg and a second point being between the two switches of the second leg. 10. The rotating electrical machine according to claim 1, wherein each current reverser is arranged to alter the current through the winding subsection when an absolute value of a back electromotive force of the respective switching cell is determined to be lower than a threshold value. 11. The rotating electrical machine according to claim 1, wherein the capacitor of each switching cell is selected such that at least one time constant of the resonant circuit is suitable for a desired switching sequence of the respective switching cell. 12. The rotating electrical machine according to claim 1, wherein each switching cell comprises a switch to allow disconnection of the capacitor from the winding subsection. 13. The rotating electrical machine according to claim 1, wherein each switching cell further comprises one switch on each side of the capacitor to allow disconnection of the capacitor from the winding subsection. 14. The rotating electrical machine according to claim 1, wherein the rotating electrical machine is a synchronous electrical machine. 15. The rotating electrical machine according to claim 1, wherein the DC source is a constant current source. 16. The rotating electrical machine according to claim 1, wherein the winding subsections of the serially connected switching cells together constitute a winding of the rotating electrical machine. | 2,800 |
11,329 | 11,329 | 14,760,448 | 2,856 | The present invention is configured of: a gas control step in which a carrier gas that differs in thermal conductivity from hydrogen by a given value is chosen, and the flow rate thereof is controlled; a sample introduction step in which an aqueous solution sample is prepared and introduced into the carrier gas serving as a mobile phase and which is characterized in that the preparation of an aqueous solution sample comprises injecting an aqueous solution sample into a vessel, the inside of which is kept vacuum, to thereby conduct gas-liquid separation and collecting the gas-phase portion as a sample to be introduced; a separation step in which the hydrogen is separated from the aqueous solution sample on the basis of an adsorption/distribution equilibrium between the aqueous solution sample introduced into the mobile phase and the fixed phase of the column; a detection step; and a data processing step. | 1. A method of measuring a concentration of hydrogen dissolved in an aqueous solution using gas chromatography, the method comprising:
a gas control process for selecting a carrier gas having a predetermined difference in thermal conductivity from hydrogen and controlling a flow rate of the carrier gas; a sample introduction process for preparing an aqueous solution sample and introducing the prepared aqueous solution sample into the carrier gas, which functions as a mobile phase, wherein the preparation of the aqueous solution sample comprises injecting a desired amount of the aqueous solution sample into a vessel, an inside of which is maintained in a vacuum state, to thereby perform gas and liquid separation and collecting a gas-phase portion as a sample to be introduced; a separation process for separating hydrogen from the aqueous solution sample on a basis of equilibrium in adsorption and distribution between the aqueous solution sample introduced in the mobile phase and a stationary phase of a column; a detection process for detecting the separated hydrogen using a thermal conductivity detector; and a data processing process for processing the detected data. 2. The method according to claim 1, wherein the gas control process comprises selecting nitrogen as the carrier gas. 3. A method of measuring a concentration of hydrogen dissolved in an aqueous solution for drinking, wherein a method of measuring concentration of hydrogen dissolved in an aqueous solution according to claim 1 is performed. 4. A method of measuring a concentration of hydrogen dissolved in an aqueous solution for drinking, wherein a method of measuring concentration of hydrogen dissolved in an aqueous solution according to claim 2 is performed. | The present invention is configured of: a gas control step in which a carrier gas that differs in thermal conductivity from hydrogen by a given value is chosen, and the flow rate thereof is controlled; a sample introduction step in which an aqueous solution sample is prepared and introduced into the carrier gas serving as a mobile phase and which is characterized in that the preparation of an aqueous solution sample comprises injecting an aqueous solution sample into a vessel, the inside of which is kept vacuum, to thereby conduct gas-liquid separation and collecting the gas-phase portion as a sample to be introduced; a separation step in which the hydrogen is separated from the aqueous solution sample on the basis of an adsorption/distribution equilibrium between the aqueous solution sample introduced into the mobile phase and the fixed phase of the column; a detection step; and a data processing step.1. A method of measuring a concentration of hydrogen dissolved in an aqueous solution using gas chromatography, the method comprising:
a gas control process for selecting a carrier gas having a predetermined difference in thermal conductivity from hydrogen and controlling a flow rate of the carrier gas; a sample introduction process for preparing an aqueous solution sample and introducing the prepared aqueous solution sample into the carrier gas, which functions as a mobile phase, wherein the preparation of the aqueous solution sample comprises injecting a desired amount of the aqueous solution sample into a vessel, an inside of which is maintained in a vacuum state, to thereby perform gas and liquid separation and collecting a gas-phase portion as a sample to be introduced; a separation process for separating hydrogen from the aqueous solution sample on a basis of equilibrium in adsorption and distribution between the aqueous solution sample introduced in the mobile phase and a stationary phase of a column; a detection process for detecting the separated hydrogen using a thermal conductivity detector; and a data processing process for processing the detected data. 2. The method according to claim 1, wherein the gas control process comprises selecting nitrogen as the carrier gas. 3. A method of measuring a concentration of hydrogen dissolved in an aqueous solution for drinking, wherein a method of measuring concentration of hydrogen dissolved in an aqueous solution according to claim 1 is performed. 4. A method of measuring a concentration of hydrogen dissolved in an aqueous solution for drinking, wherein a method of measuring concentration of hydrogen dissolved in an aqueous solution according to claim 2 is performed. | 2,800 |
11,330 | 11,330 | 13,869,218 | 2,829 | A high-brightness vertical light emitting diode (LED) device includes an outwardly located metal electrode having a low illumination side and a high illumination side. The LED device is formed by: forming the metal electrode on an edge of a surface of a LED epitaxy structure using a deposition method, such as physical vapor deposition (PVD), chemical vapor deposition (CVD), evaporation, electro-plating, or any combination thereof; and then performing a packaging process. The composition of the LED may be a nitride, a phosphide or an arsenide. The LED has the following advantages: improving current spreading performance, reducing light-absorption of the metal electrode, increasing brightness, increasing efficiency, and thereby improving energy efficiency. The metal electrode is located on the edge of the device and on the light emitting side. The metal electrode has two side walls, among which one side wall can receive more emission light from the device in comparison with the other one. | 1. A light emitting diode device comprising:
a conductive base having a first electrode; a reflective mirror layer on the conductive base having a width scope W, a first conductivity type semiconductor layer on the reflective mirror layer, an active layer on the first conductivity type semiconductor layer configured to produce emission light,
a second conductivity type semiconductor layer on the active layer, and
a second electrode on the second conductivity type semiconductor layer having a plurality of sides including a low illumination side located outside of the width scope of the reflective mirror layer and a high illumination side configured to absorb reflected emission light from the reflective mirror layer. 2. The device of claim 1 wherein the high illumination side is located outside the width scope W of the reflective mirror layer. 3. The device of claim 1 wherein the reflective mirror layer has a first surface area and the first conductivity type semiconductor layer has a second surface area less than the first surface area. 4. The device of claim 1 wherein the second conductivity type semiconductor layer has a rough surface configured to increase light extraction. 5. The device of claim 1 further comprising an optical transparent layer between the reflective mirror layer and the first conductivity type semiconductor layer configured to provide an omni-directional reflector. 6. The device of claim 1 wherein a total surface area of the second metal electrode occupies less than 25% of a surface area of the second conductivity type semiconductor layer. 7. The device of claim 1 wherein the reflective mirror layer and the second metal electrode each have a generally rectangular shape. 8. The device of claim 1 wherein the second conductivity type semiconductor layer has an element boundary and the low illumination side is located proximate to the element boundary. 9. A light emitting diode device comprising:
a conductive base having a first electrode; a reflective mirror layer on the conductive base having an edge, a first conductivity type semiconductor layer on the reflective mirror layer, an active layer on the first conductivity type semiconductor layer configured to produce emission light,
a second conductivity type semiconductor layer on the active layer having an element boundary, and
a second electrode on the second conductivity type semiconductor layer having a plurality of sides including a high illumination side located proximate to the edge of the reflective mirror layer configured to absorb reflected emission light from the reflective mirror layer and a low illumination side located proximate to the element boundary of the second conductivity type semiconductor layer. 10. The device of claim 9 wherein a first surface area of the reflective mirror layer is more than 75% and less than 100% of a second surface area of the first conductivity type semiconductor layer. 11. The device of claim 9 further comprising a transparent protective layer on the reflective mirror layer configured to protect the reflective mirror layer. 12. The device of claim 9 wherein the second conductivity type semiconductor layer has a rough surface configured to increase light extraction. 13. The device of claim 9 further comprising an optical transparent layer between the reflective mirror layer and the first type semiconductor layer configured to provide an omni-directional reflector. 14. The device of claim 9 wherein the second electrode comprises a plurality of wires configured in a generally rectangular shape corresponding to the element boundary of the second conductivity type semiconductor layer. 15. The device of claim 9 wherein the reflective mirror layer has a width scope W and the low illumination side is located outside of the width scope W. 16. A light emitting diode device comprising:
a conductive base having a first electrode; a reflective mirror layer on the conductive base having a width scope W, a first conductivity type semiconductor layer on the reflective mirror layer, an active layer on the first conductivity type semiconductor layer configured to produce emission light,
a second conductivity type semiconductor layer on the active layer having an element boundary, and
a second electrode on the second conductivity type semiconductor layer comprising a plurality of metal electrode wires in a generally rectangular shape with each wire having a low illumination side located outside of the width scope W of the reflective mirror layer and a high illumination side located proximate to the width scope W of the reflective mirror layer. 17. The light emitting diode of claim 16 wherein the second conductivity type semiconductor layer has a rough surface configured to increase light extraction. 18. The device of claim 16 further comprising an optical transparent layer between the reflective mirror layer and the first type semiconductor layer configured to provide an omni-directional reflector. 19. The device of claim 16 wherein the high illumination side is located outside the width scope W. 20. The device of claim 16 wherein the reflective mirror layer has a first surface area and the first conductivity type semiconductor layer has a second surface area less than the first surface area. | A high-brightness vertical light emitting diode (LED) device includes an outwardly located metal electrode having a low illumination side and a high illumination side. The LED device is formed by: forming the metal electrode on an edge of a surface of a LED epitaxy structure using a deposition method, such as physical vapor deposition (PVD), chemical vapor deposition (CVD), evaporation, electro-plating, or any combination thereof; and then performing a packaging process. The composition of the LED may be a nitride, a phosphide or an arsenide. The LED has the following advantages: improving current spreading performance, reducing light-absorption of the metal electrode, increasing brightness, increasing efficiency, and thereby improving energy efficiency. The metal electrode is located on the edge of the device and on the light emitting side. The metal electrode has two side walls, among which one side wall can receive more emission light from the device in comparison with the other one.1. A light emitting diode device comprising:
a conductive base having a first electrode; a reflective mirror layer on the conductive base having a width scope W, a first conductivity type semiconductor layer on the reflective mirror layer, an active layer on the first conductivity type semiconductor layer configured to produce emission light,
a second conductivity type semiconductor layer on the active layer, and
a second electrode on the second conductivity type semiconductor layer having a plurality of sides including a low illumination side located outside of the width scope of the reflective mirror layer and a high illumination side configured to absorb reflected emission light from the reflective mirror layer. 2. The device of claim 1 wherein the high illumination side is located outside the width scope W of the reflective mirror layer. 3. The device of claim 1 wherein the reflective mirror layer has a first surface area and the first conductivity type semiconductor layer has a second surface area less than the first surface area. 4. The device of claim 1 wherein the second conductivity type semiconductor layer has a rough surface configured to increase light extraction. 5. The device of claim 1 further comprising an optical transparent layer between the reflective mirror layer and the first conductivity type semiconductor layer configured to provide an omni-directional reflector. 6. The device of claim 1 wherein a total surface area of the second metal electrode occupies less than 25% of a surface area of the second conductivity type semiconductor layer. 7. The device of claim 1 wherein the reflective mirror layer and the second metal electrode each have a generally rectangular shape. 8. The device of claim 1 wherein the second conductivity type semiconductor layer has an element boundary and the low illumination side is located proximate to the element boundary. 9. A light emitting diode device comprising:
a conductive base having a first electrode; a reflective mirror layer on the conductive base having an edge, a first conductivity type semiconductor layer on the reflective mirror layer, an active layer on the first conductivity type semiconductor layer configured to produce emission light,
a second conductivity type semiconductor layer on the active layer having an element boundary, and
a second electrode on the second conductivity type semiconductor layer having a plurality of sides including a high illumination side located proximate to the edge of the reflective mirror layer configured to absorb reflected emission light from the reflective mirror layer and a low illumination side located proximate to the element boundary of the second conductivity type semiconductor layer. 10. The device of claim 9 wherein a first surface area of the reflective mirror layer is more than 75% and less than 100% of a second surface area of the first conductivity type semiconductor layer. 11. The device of claim 9 further comprising a transparent protective layer on the reflective mirror layer configured to protect the reflective mirror layer. 12. The device of claim 9 wherein the second conductivity type semiconductor layer has a rough surface configured to increase light extraction. 13. The device of claim 9 further comprising an optical transparent layer between the reflective mirror layer and the first type semiconductor layer configured to provide an omni-directional reflector. 14. The device of claim 9 wherein the second electrode comprises a plurality of wires configured in a generally rectangular shape corresponding to the element boundary of the second conductivity type semiconductor layer. 15. The device of claim 9 wherein the reflective mirror layer has a width scope W and the low illumination side is located outside of the width scope W. 16. A light emitting diode device comprising:
a conductive base having a first electrode; a reflective mirror layer on the conductive base having a width scope W, a first conductivity type semiconductor layer on the reflective mirror layer, an active layer on the first conductivity type semiconductor layer configured to produce emission light,
a second conductivity type semiconductor layer on the active layer having an element boundary, and
a second electrode on the second conductivity type semiconductor layer comprising a plurality of metal electrode wires in a generally rectangular shape with each wire having a low illumination side located outside of the width scope W of the reflective mirror layer and a high illumination side located proximate to the width scope W of the reflective mirror layer. 17. The light emitting diode of claim 16 wherein the second conductivity type semiconductor layer has a rough surface configured to increase light extraction. 18. The device of claim 16 further comprising an optical transparent layer between the reflective mirror layer and the first type semiconductor layer configured to provide an omni-directional reflector. 19. The device of claim 16 wherein the high illumination side is located outside the width scope W. 20. The device of claim 16 wherein the reflective mirror layer has a first surface area and the first conductivity type semiconductor layer has a second surface area less than the first surface area. | 2,800 |
11,331 | 11,331 | 14,922,137 | 2,872 | An angular selective light control sheeting and a method of making the same are disclosed. The light control sheeting includes a layer of an optically clear elastic material which has a series of parallel slits formed by means of surface slitting with a sharp object such as a razor or blade. Each slit is filled with an opaque material which prevents light transmission through the slit walls. The method includes a step of slitting of an elastic, optically transmissive plastic sheet with a blade and forming at least one array of substantially parallel linear slits in a surface of the sheet, a step of stretching the sheet in a direction perpendicular to the linear slits, and a step of introducing an opaque material into the interior of the slits. | 1. An angular selective light control sheet material, comprising:
a layer of an optically transmissive elastic material; and a plurality of deep and narrow slits formed in a surface of said layer; wherein at least one of said slits comprises a layer of an opaque material. 2. An angular selective light control sheet material as recited in claim 1, wherein said optically transmissive elastic material is configurable for its slitting using a sharp object such as a blade or a razor. 3. An angular selective light control sheet material as recited in claim 1, wherein the material of said optically transmissive layer comprises plasticized polyvinyl chloride. 4. An angular selective light control sheet material as recited in claim 1, wherein an elongation at yield of said optically transmissive elastic material is at least 10%. 5. An angular selective light control sheet material as recited in claim 1, wherein an elongation at yield of said optically transmissive elastic material is at least 30%. 6. An angular selective light control sheet material as recited in claim 1, wherein an elastic modulus of said optically transmissive elastic material is less than 70 MPa. 7. An angular selective light control sheet material as recited in claim 1, wherein said optically transmissive elastic material has a durometer hardness between 70 Shore A and 95 Shore A, as measured in accordance with ASTM D2240 type A scale. 8. An angular selective light control sheet material as recited in claim 1, wherein said optically transmissive elastic material comprises thermoplastic polyurethane. 9. An angular selective light control sheet material as recited in claim 1, wherein said optically transmissive elastic material is selected from the group of polymeric materials consisting of optically clear or translucent thermoplastic elastomers, polyurethanes, and silicones. 10. An angular selective light control sheet material as recited in claim 1, further comprising a protective optically transmissive layer attached to said surface. 11. An angular selective light control sheet material as recited in claim 1, further comprising a light diffusing layer or surface. 12. An angular selective light control sheet material as recited in claim 1, wherein said layer of an opaque material comprises an electrochromic material. 13. An angular selective light control sheet material as recited in claim 1, wherein said opaque material comprises a dark or colored pigment, dye or ink. 14. An angular selective light control sheet material as recited in claim 1, wherein said opaque material comprises high refractive index particles. 15. An angular selective light control sheet material as recited in claim 1, wherein said opaque material comprises carbon black. 16. An angular selective light control sheet material as recited in claim 1, wherein said opaque material comprises an adhesive component. 17. An angular selective light control sheet material as recited in claim 1, wherein said opaque material comprises a light absorbing pigment matrix selected from the group consisting of titanium black, acetylene black, aniline black, perylene black, strontium titanium oxide, chromium oxide, and ceria. 18. An angular selective light control sheet material as recited in claim 1, wherein the layer of optically transmissive elastic material is laminated to at least one light permeable substrate. 19. An angular selective light control sheet material as recited in claim 1, wherein said slits are regularly formed along two or more directions. 20. An angular selective light control sheet material as recited in claim 1, wherein said slits are formed an angle with respect to a normal to said surface. | An angular selective light control sheeting and a method of making the same are disclosed. The light control sheeting includes a layer of an optically clear elastic material which has a series of parallel slits formed by means of surface slitting with a sharp object such as a razor or blade. Each slit is filled with an opaque material which prevents light transmission through the slit walls. The method includes a step of slitting of an elastic, optically transmissive plastic sheet with a blade and forming at least one array of substantially parallel linear slits in a surface of the sheet, a step of stretching the sheet in a direction perpendicular to the linear slits, and a step of introducing an opaque material into the interior of the slits.1. An angular selective light control sheet material, comprising:
a layer of an optically transmissive elastic material; and a plurality of deep and narrow slits formed in a surface of said layer; wherein at least one of said slits comprises a layer of an opaque material. 2. An angular selective light control sheet material as recited in claim 1, wherein said optically transmissive elastic material is configurable for its slitting using a sharp object such as a blade or a razor. 3. An angular selective light control sheet material as recited in claim 1, wherein the material of said optically transmissive layer comprises plasticized polyvinyl chloride. 4. An angular selective light control sheet material as recited in claim 1, wherein an elongation at yield of said optically transmissive elastic material is at least 10%. 5. An angular selective light control sheet material as recited in claim 1, wherein an elongation at yield of said optically transmissive elastic material is at least 30%. 6. An angular selective light control sheet material as recited in claim 1, wherein an elastic modulus of said optically transmissive elastic material is less than 70 MPa. 7. An angular selective light control sheet material as recited in claim 1, wherein said optically transmissive elastic material has a durometer hardness between 70 Shore A and 95 Shore A, as measured in accordance with ASTM D2240 type A scale. 8. An angular selective light control sheet material as recited in claim 1, wherein said optically transmissive elastic material comprises thermoplastic polyurethane. 9. An angular selective light control sheet material as recited in claim 1, wherein said optically transmissive elastic material is selected from the group of polymeric materials consisting of optically clear or translucent thermoplastic elastomers, polyurethanes, and silicones. 10. An angular selective light control sheet material as recited in claim 1, further comprising a protective optically transmissive layer attached to said surface. 11. An angular selective light control sheet material as recited in claim 1, further comprising a light diffusing layer or surface. 12. An angular selective light control sheet material as recited in claim 1, wherein said layer of an opaque material comprises an electrochromic material. 13. An angular selective light control sheet material as recited in claim 1, wherein said opaque material comprises a dark or colored pigment, dye or ink. 14. An angular selective light control sheet material as recited in claim 1, wherein said opaque material comprises high refractive index particles. 15. An angular selective light control sheet material as recited in claim 1, wherein said opaque material comprises carbon black. 16. An angular selective light control sheet material as recited in claim 1, wherein said opaque material comprises an adhesive component. 17. An angular selective light control sheet material as recited in claim 1, wherein said opaque material comprises a light absorbing pigment matrix selected from the group consisting of titanium black, acetylene black, aniline black, perylene black, strontium titanium oxide, chromium oxide, and ceria. 18. An angular selective light control sheet material as recited in claim 1, wherein the layer of optically transmissive elastic material is laminated to at least one light permeable substrate. 19. An angular selective light control sheet material as recited in claim 1, wherein said slits are regularly formed along two or more directions. 20. An angular selective light control sheet material as recited in claim 1, wherein said slits are formed an angle with respect to a normal to said surface. | 2,800 |
11,332 | 11,332 | 14,847,643 | 2,884 | According to some embodiments, emission projection data and second source scan data are received. A prior map and a prior weight map are generated from second source scan data. A penalty function calculates voxel-wise differences between the prior map and a given image, transforms the voxel-wise differences and calculates a weighted sum of the transformed differences, using weights based on the prior weight map. Joint reconstruction of an emission image and an attenuation map proceeds iteratively and uses the penalty function. | 1. A method, comprising:
receiving emission projection data and second source scan data corresponding to a subject, said second source scan data from a mode of imaging different from emission projection imaging; reconstructing second source images based on the second source scan data; generating a prior map based on the second source images; generating a prior weight map, comprising:
generating a confidence map based on the second source images; and
generating a prior weight map that is spatially varying based on the confidence map;
constructing a penalty function that
calculates voxel-wise differences between the prior map and a given image;
transforms each voxel-wise difference by using a potential function; and
calculates a weighted sum of the transformed voxel-wise differences where weights for the weighted sum are based on the prior weight map;
reconstructing an emission image and an attenuation map, comprising:
iteratively updating the emission image based on the attenuation map and the emission projection data;
iteratively updating the attenuation map based on the emission image and the emission projection data by using the penalty function;
obtaining a final attenuation map; and generating a final emission image. 2. The method of claim 1, wherein said second source scan data is magnetic resonance scan data. 3. The method of claim 1, wherein the prior weight map is binary-valued. 4. The method of claim 1, wherein the prior weight map is continuous-valued. 5. The method of claim 1, further comprising:
estimating scattered coincidences in the emission projection data. 6. The method of claim 1, wherein said steps of iteratively updating the emission image and iteratively updating the attenuation map are performed a predetermined number of times. 7. The method of claim 1, further comprising:
detecting a degree of change in at least one of said updated emission image and said updated attenuation map due to a most recent iteration of one or both of said updating steps; and ceasing said iteratively updating steps based on a comparison of said detected degree or degrees of change with at least one threshold value. 8. The method of claim 1, wherein the steps of generating the confidence map and/or the prior weight map include at least one of:
applying thresholding to the second source images; transforming the second source images by using a monotonic function; segmenting organs or uniform regions in the second source images; using anatomical knowledge; and spatially modulating the prior weight map. 9. The method of claim 8, wherein the step of spatially modulating the prior weight map is based on at least one of:
emission sensitivities; emission images that are reconstructed without attenuation correction or based on the prior map; and body contours obtained from the second source images and/or the emission images that are reconstructed without attenuation correction or based on the prior map. 10. The method of claim 1, further comprising:
initializing an attenuation map based on the prior map. 11. The method of claim 1, wherein, for the step of iteratively updating the emission image based on the attenuation map and the emission projection data, the emission projection data are time-of-flight emission projection data; and
wherein, for the step of iteratively updating the attenuation map based on the emission image and the emission projection data, the emission projection data are non-time-of-flight emission projection data. 12. The method of claim 1, wherein, for the step of iteratively updating the emission image based on the attenuation map and the emission projection data, the emission projection data are time-of-flight emission projection data until said step of iteratively updating the emission image is performed a predetermined number of times, and the emission projection data are non-time-of-flight emission projection data after said step of iteratively updating the emission image is performed the predetermined number of times. 13. An imaging apparatus, comprising:
a first imaging device for producing emission projection data corresponding to a subject; a second imaging device for providing second source scan data corresponding to the subject, said second imaging device different from said first imaging device; and a computer coupled to the first and second imaging devices; the computer comprising a processor and a memory in communication with the processor, the memory storing program instructions, the processor operative with the program instructions to perform functions as follows:
receiving the emission projection data and the second source scan data;
reconstructing second source images based on the second source scan data;
generating a prior map based on the second source images;
generating a prior weight map, comprising at least one of:
applying thresholding to the second source images;
transforming the second source images by using a monotonic function;
segmenting organs or uniform regions in the second source images using anatomical knowledge; and
spatially modulating the prior weight map;
constructing a penalty function that
calculates voxel-wise differences between the prior map and a given image;
transforms each voxel-wise difference by using a potential function; and
calculates a weighted sum of the transformed voxel-wise differences where weights for the weighted sum are based on the prior weight map;
reconstructing an emission image and an attenuation map, comprising:
iteratively updating the emission image based on the attenuation map and the emission projection data;
iteratively updating the attenuation map based on the emission image and the emission projection data by using the penalty function;
obtaining a final attenuation map; and
generating a final emission image. 14. The apparatus of claim 13, wherein the first imaging device is a PET (positron emission tomography) scanner. 15. The apparatus of claim 13, wherein the first imaging device is a SPECT (single photon emission computed tomography) scanner. 16. The apparatus of claim 13, wherein the first imaging device is an optical luminescence scanning device. 17. The apparatus of claim 13, wherein the second imaging device is a magnetic resonance scanner. 18. The apparatus of claim 13, wherein the prior weight map is binary-valued. 19. The apparatus of claim 13, wherein the prior weight map is continuous-valued. 20. The apparatus of claim 13, wherein said functions of iteratively updating the emission image and iteratively updating the attenuation map are performed a predetermined number of times. 21. The apparatus of claim 13, wherein:
the processor is further operative with the program instructions to detect a degree of change in at least one of said updated emission image and said updated attenuation map due to a most recent iteration of one or both of said updating functions; and the processor is further operative with the program instructions to cease said iteratively updating functions based on a comparison of said detected degree or degrees of change with at least one threshold value. 22. The apparatus of claim 13, wherein the step of spatially modulating the prior weight map is based on at least one of:
emission sensitivities; emission images that are reconstructed without attenuation correction or based on the prior map; and body contours obtained from the second source images and/or the emission images that are reconstructed without attenuation correction or based on the prior map. 23. A method comprising:
obtaining emission projection data; obtaining second source images based on second source scan data, said second source scan data from a mode of imaging different from a mode employed to obtain the emission projection data; generating a first attenuation map from said second source scan data; generating a confidence map for said attenuation map; generating a prior weight map based on at least one of said emission projection data, said confidence map and said second source images; constructing a penalty function that
calculates voxel-wise differences between the attenuation map and a given image;
transforms each voxel-wise difference by using a potential function; and
calculates a weighted sum of the transformed voxel-wise differences where weights for the weighted sum are based on the prior weight map;
reconstructing updated versions of an emission image and the first attenuation map, comprising:
iteratively updating the emission image based on a current version of the attenuation map and the emission projection data;
iteratively updating the current version of the attenuation map based on the emission image and the emission projection data by using the penalty function;
determining a point at which to cease said updating steps; and
ceasing said updating steps based on a result of said determining step;
obtaining a final attenuation map based on a final iteration of said step of iteratively updating the attenuation map; forming an averaged attenuation map as a weighted average of the final attenuation map and the first attenuation map; and generating a final emission image. 24. The method of claim 23, wherein the step of forming an averaged attenuation map uses weights determined based on said confidence map. 25. The method of claim 23, wherein the prior weight map is generated from the confidence map using a monotonic function. 26. The method of claim 23, wherein the second source images are magnetic resonance images. | According to some embodiments, emission projection data and second source scan data are received. A prior map and a prior weight map are generated from second source scan data. A penalty function calculates voxel-wise differences between the prior map and a given image, transforms the voxel-wise differences and calculates a weighted sum of the transformed differences, using weights based on the prior weight map. Joint reconstruction of an emission image and an attenuation map proceeds iteratively and uses the penalty function.1. A method, comprising:
receiving emission projection data and second source scan data corresponding to a subject, said second source scan data from a mode of imaging different from emission projection imaging; reconstructing second source images based on the second source scan data; generating a prior map based on the second source images; generating a prior weight map, comprising:
generating a confidence map based on the second source images; and
generating a prior weight map that is spatially varying based on the confidence map;
constructing a penalty function that
calculates voxel-wise differences between the prior map and a given image;
transforms each voxel-wise difference by using a potential function; and
calculates a weighted sum of the transformed voxel-wise differences where weights for the weighted sum are based on the prior weight map;
reconstructing an emission image and an attenuation map, comprising:
iteratively updating the emission image based on the attenuation map and the emission projection data;
iteratively updating the attenuation map based on the emission image and the emission projection data by using the penalty function;
obtaining a final attenuation map; and generating a final emission image. 2. The method of claim 1, wherein said second source scan data is magnetic resonance scan data. 3. The method of claim 1, wherein the prior weight map is binary-valued. 4. The method of claim 1, wherein the prior weight map is continuous-valued. 5. The method of claim 1, further comprising:
estimating scattered coincidences in the emission projection data. 6. The method of claim 1, wherein said steps of iteratively updating the emission image and iteratively updating the attenuation map are performed a predetermined number of times. 7. The method of claim 1, further comprising:
detecting a degree of change in at least one of said updated emission image and said updated attenuation map due to a most recent iteration of one or both of said updating steps; and ceasing said iteratively updating steps based on a comparison of said detected degree or degrees of change with at least one threshold value. 8. The method of claim 1, wherein the steps of generating the confidence map and/or the prior weight map include at least one of:
applying thresholding to the second source images; transforming the second source images by using a monotonic function; segmenting organs or uniform regions in the second source images; using anatomical knowledge; and spatially modulating the prior weight map. 9. The method of claim 8, wherein the step of spatially modulating the prior weight map is based on at least one of:
emission sensitivities; emission images that are reconstructed without attenuation correction or based on the prior map; and body contours obtained from the second source images and/or the emission images that are reconstructed without attenuation correction or based on the prior map. 10. The method of claim 1, further comprising:
initializing an attenuation map based on the prior map. 11. The method of claim 1, wherein, for the step of iteratively updating the emission image based on the attenuation map and the emission projection data, the emission projection data are time-of-flight emission projection data; and
wherein, for the step of iteratively updating the attenuation map based on the emission image and the emission projection data, the emission projection data are non-time-of-flight emission projection data. 12. The method of claim 1, wherein, for the step of iteratively updating the emission image based on the attenuation map and the emission projection data, the emission projection data are time-of-flight emission projection data until said step of iteratively updating the emission image is performed a predetermined number of times, and the emission projection data are non-time-of-flight emission projection data after said step of iteratively updating the emission image is performed the predetermined number of times. 13. An imaging apparatus, comprising:
a first imaging device for producing emission projection data corresponding to a subject; a second imaging device for providing second source scan data corresponding to the subject, said second imaging device different from said first imaging device; and a computer coupled to the first and second imaging devices; the computer comprising a processor and a memory in communication with the processor, the memory storing program instructions, the processor operative with the program instructions to perform functions as follows:
receiving the emission projection data and the second source scan data;
reconstructing second source images based on the second source scan data;
generating a prior map based on the second source images;
generating a prior weight map, comprising at least one of:
applying thresholding to the second source images;
transforming the second source images by using a monotonic function;
segmenting organs or uniform regions in the second source images using anatomical knowledge; and
spatially modulating the prior weight map;
constructing a penalty function that
calculates voxel-wise differences between the prior map and a given image;
transforms each voxel-wise difference by using a potential function; and
calculates a weighted sum of the transformed voxel-wise differences where weights for the weighted sum are based on the prior weight map;
reconstructing an emission image and an attenuation map, comprising:
iteratively updating the emission image based on the attenuation map and the emission projection data;
iteratively updating the attenuation map based on the emission image and the emission projection data by using the penalty function;
obtaining a final attenuation map; and
generating a final emission image. 14. The apparatus of claim 13, wherein the first imaging device is a PET (positron emission tomography) scanner. 15. The apparatus of claim 13, wherein the first imaging device is a SPECT (single photon emission computed tomography) scanner. 16. The apparatus of claim 13, wherein the first imaging device is an optical luminescence scanning device. 17. The apparatus of claim 13, wherein the second imaging device is a magnetic resonance scanner. 18. The apparatus of claim 13, wherein the prior weight map is binary-valued. 19. The apparatus of claim 13, wherein the prior weight map is continuous-valued. 20. The apparatus of claim 13, wherein said functions of iteratively updating the emission image and iteratively updating the attenuation map are performed a predetermined number of times. 21. The apparatus of claim 13, wherein:
the processor is further operative with the program instructions to detect a degree of change in at least one of said updated emission image and said updated attenuation map due to a most recent iteration of one or both of said updating functions; and the processor is further operative with the program instructions to cease said iteratively updating functions based on a comparison of said detected degree or degrees of change with at least one threshold value. 22. The apparatus of claim 13, wherein the step of spatially modulating the prior weight map is based on at least one of:
emission sensitivities; emission images that are reconstructed without attenuation correction or based on the prior map; and body contours obtained from the second source images and/or the emission images that are reconstructed without attenuation correction or based on the prior map. 23. A method comprising:
obtaining emission projection data; obtaining second source images based on second source scan data, said second source scan data from a mode of imaging different from a mode employed to obtain the emission projection data; generating a first attenuation map from said second source scan data; generating a confidence map for said attenuation map; generating a prior weight map based on at least one of said emission projection data, said confidence map and said second source images; constructing a penalty function that
calculates voxel-wise differences between the attenuation map and a given image;
transforms each voxel-wise difference by using a potential function; and
calculates a weighted sum of the transformed voxel-wise differences where weights for the weighted sum are based on the prior weight map;
reconstructing updated versions of an emission image and the first attenuation map, comprising:
iteratively updating the emission image based on a current version of the attenuation map and the emission projection data;
iteratively updating the current version of the attenuation map based on the emission image and the emission projection data by using the penalty function;
determining a point at which to cease said updating steps; and
ceasing said updating steps based on a result of said determining step;
obtaining a final attenuation map based on a final iteration of said step of iteratively updating the attenuation map; forming an averaged attenuation map as a weighted average of the final attenuation map and the first attenuation map; and generating a final emission image. 24. The method of claim 23, wherein the step of forming an averaged attenuation map uses weights determined based on said confidence map. 25. The method of claim 23, wherein the prior weight map is generated from the confidence map using a monotonic function. 26. The method of claim 23, wherein the second source images are magnetic resonance images. | 2,800 |
11,333 | 11,333 | 15,278,009 | 2,883 | The invention relates to an optical sensor element for a measuring machine, comprising a coupling element on the sensor element side for mechanically and optically connecting to a coupling element on the measuring machine side. An optical fiber is arranged in the coupling element on the sensor element side, wherein said optical fiber comprises an optical interface for connecting to an optical machine contact element of the measuring machine, wherein said optical interface is formed by an optical sensor contact element having a self-centering ferrule that encloses the end of the optical fiber. The ferrule is supported in the coupling element on the sensor element side in a floating manner. | 1-15. (canceled) 16. A system comprising a coordinate measuring machine and an optical sensor element for the coordinate measuring machine, wherein
the coordinate measuring machine comprises a coupling element on the coordinate measuring machine side and an optical machine contact element, and the optical sensor element comprises
a coupling element on a sensor element side adapted to be mechanically and optically connected to the coupling element on the coordinate measuring machine side; and
an optical fiber for transmission of measuring signals in the coupling element on the sensor element side that has an optical interface adapted to be connected to the optical machine contact element of the coordinate measuring machine, which optical interface is formed by an optical sensor contact element, for transmission of optical signals, having a self-centering first ferrule surrounding an end of the optical fiber, the first ferrule being supported in a floating fashion in the coupling element on the sensor element side,
wherein the coupling element on the sensor element side is designed for connection with the optical machine contact element by a plugging-in operation. 17. The system as claimed in claim 16, wherein the first ferrule has a chamfer for self-centering during a connecting operation with the coupling element on the coordinate measuring machine side. 18. The system as claimed in claim 16, wherein the sensor contact element for transmission of measuring signals is formed with a ground bevel. 19. The system as claimed in claim 16, wherein the sensor contact element for transmission of measuring signals has a beam cross section enlarged by comparison with a core of the optical fiber for transmission of optical signals. 20. The system as claimed in claim 16, wherein the sensor contact element for transmission of measuring signals has a beam cross section enlarged by comparison with a core of the optical fiber for transmission of optical signals, the beam cross section being enlarged at least by a factor of 5, 10, 20 or 50 by comparison with the core of the optical fiber for transmission of optical signals. 21. The system as claimed in claim 16, wherein the sensor contact element is a lens, a gradient index lens, or in the form of a fiber. 22. The system as claimed in claim 16, wherein the optical fiber for transmission of optical signals is a single mode fiber. 23. The system as claimed in claim 16, wherein the first ferrule terminates flush with the sensor contact element. 24. The system as claimed in claim 16, wherein the first ferrule has on a peripheral side an orientation surface for holding the first ferrule in a defined fashion in an assigned orientation. 25. The system as claimed in claim 16, wherein a spring is applied to the first ferrule in order to produce a contact pressure at the optical interface. 26. The system as claimed in claim 16, wherein the optical machine contact element comprises a second ferrule and a guide sleeve. 27. The system as claimed in claim 26, wherein the optical machine contact element is held in the second ferrule surrounded by the guide sleeve as an integral part of the coupling element, both the second ferrule and the guide sleeve being supported in a floating fashion in the machine contact element. 28. The system as claimed in claim 26, wherein the coupling element on the coordinate measuring machine side is designed to be connected to the sensor element, wherein the optical machine contact element is designed to be connected to the optical sensor contact element of the sensor element for the purpose of transmission of measuring signals,
wherein the machine contact element has a second optical fiber with the second ferrule and a guide sleeve as an integral part of the coupling element on the coordinate machine measuring side for self-centering of the first ferrule of the sensor contact element and the second ferrule of the machine contact element. 29. The system as claimed in claim 26, wherein the second ferrule or the guide sleeve have/has a chamfer for self-centering during a connecting operation with the sensor element. 30. The system as claimed in claim 26, wherein the second optical fiber for transmission of optical signals is held at one end in the second ferrule and surrounded by the guide sleeve, the guide sleeve projecting in an axial direction beyond the second ferrule. 31. The system as claimed in claim 26, wherein the machine contact element is formed with a ground bevel and has a beam cross section that is enlarged by comparison with a core of the second optical fiber for transmission of optical signals. 32. The system as claimed in claim 26, wherein an inner surface of the guide sleeve has a roundness with a radial deviation that is smaller than a core diameter of the fiber used. 33. The system as claimed in claim 26, wherein an inner surface of the guide sleeve has a roundness with a radial deviation that is smaller than a core diameter of the fiber used and is at most 2 um. 34. The system as claimed in claim 16, wherein a spring is applied in an axial direction of the optical fiber to the first ferrule in order to produce a contact pressure at the optical interface. 35. The system as claimed in claim 16, wherein the optical machine contact element is designed for the purpose of transmission of measuring signals for interferometric measurement methods. | The invention relates to an optical sensor element for a measuring machine, comprising a coupling element on the sensor element side for mechanically and optically connecting to a coupling element on the measuring machine side. An optical fiber is arranged in the coupling element on the sensor element side, wherein said optical fiber comprises an optical interface for connecting to an optical machine contact element of the measuring machine, wherein said optical interface is formed by an optical sensor contact element having a self-centering ferrule that encloses the end of the optical fiber. The ferrule is supported in the coupling element on the sensor element side in a floating manner.1-15. (canceled) 16. A system comprising a coordinate measuring machine and an optical sensor element for the coordinate measuring machine, wherein
the coordinate measuring machine comprises a coupling element on the coordinate measuring machine side and an optical machine contact element, and the optical sensor element comprises
a coupling element on a sensor element side adapted to be mechanically and optically connected to the coupling element on the coordinate measuring machine side; and
an optical fiber for transmission of measuring signals in the coupling element on the sensor element side that has an optical interface adapted to be connected to the optical machine contact element of the coordinate measuring machine, which optical interface is formed by an optical sensor contact element, for transmission of optical signals, having a self-centering first ferrule surrounding an end of the optical fiber, the first ferrule being supported in a floating fashion in the coupling element on the sensor element side,
wherein the coupling element on the sensor element side is designed for connection with the optical machine contact element by a plugging-in operation. 17. The system as claimed in claim 16, wherein the first ferrule has a chamfer for self-centering during a connecting operation with the coupling element on the coordinate measuring machine side. 18. The system as claimed in claim 16, wherein the sensor contact element for transmission of measuring signals is formed with a ground bevel. 19. The system as claimed in claim 16, wherein the sensor contact element for transmission of measuring signals has a beam cross section enlarged by comparison with a core of the optical fiber for transmission of optical signals. 20. The system as claimed in claim 16, wherein the sensor contact element for transmission of measuring signals has a beam cross section enlarged by comparison with a core of the optical fiber for transmission of optical signals, the beam cross section being enlarged at least by a factor of 5, 10, 20 or 50 by comparison with the core of the optical fiber for transmission of optical signals. 21. The system as claimed in claim 16, wherein the sensor contact element is a lens, a gradient index lens, or in the form of a fiber. 22. The system as claimed in claim 16, wherein the optical fiber for transmission of optical signals is a single mode fiber. 23. The system as claimed in claim 16, wherein the first ferrule terminates flush with the sensor contact element. 24. The system as claimed in claim 16, wherein the first ferrule has on a peripheral side an orientation surface for holding the first ferrule in a defined fashion in an assigned orientation. 25. The system as claimed in claim 16, wherein a spring is applied to the first ferrule in order to produce a contact pressure at the optical interface. 26. The system as claimed in claim 16, wherein the optical machine contact element comprises a second ferrule and a guide sleeve. 27. The system as claimed in claim 26, wherein the optical machine contact element is held in the second ferrule surrounded by the guide sleeve as an integral part of the coupling element, both the second ferrule and the guide sleeve being supported in a floating fashion in the machine contact element. 28. The system as claimed in claim 26, wherein the coupling element on the coordinate measuring machine side is designed to be connected to the sensor element, wherein the optical machine contact element is designed to be connected to the optical sensor contact element of the sensor element for the purpose of transmission of measuring signals,
wherein the machine contact element has a second optical fiber with the second ferrule and a guide sleeve as an integral part of the coupling element on the coordinate machine measuring side for self-centering of the first ferrule of the sensor contact element and the second ferrule of the machine contact element. 29. The system as claimed in claim 26, wherein the second ferrule or the guide sleeve have/has a chamfer for self-centering during a connecting operation with the sensor element. 30. The system as claimed in claim 26, wherein the second optical fiber for transmission of optical signals is held at one end in the second ferrule and surrounded by the guide sleeve, the guide sleeve projecting in an axial direction beyond the second ferrule. 31. The system as claimed in claim 26, wherein the machine contact element is formed with a ground bevel and has a beam cross section that is enlarged by comparison with a core of the second optical fiber for transmission of optical signals. 32. The system as claimed in claim 26, wherein an inner surface of the guide sleeve has a roundness with a radial deviation that is smaller than a core diameter of the fiber used. 33. The system as claimed in claim 26, wherein an inner surface of the guide sleeve has a roundness with a radial deviation that is smaller than a core diameter of the fiber used and is at most 2 um. 34. The system as claimed in claim 16, wherein a spring is applied in an axial direction of the optical fiber to the first ferrule in order to produce a contact pressure at the optical interface. 35. The system as claimed in claim 16, wherein the optical machine contact element is designed for the purpose of transmission of measuring signals for interferometric measurement methods. | 2,800 |
11,334 | 11,334 | 14,973,928 | 2,818 | A computing device includes a wafer having multiple layers, the wafer including a top layer and sublayers disposed below it, the sublayers including one or more memory devices. The computing device also includes two or more shaped retainer elements shaped to mate with and at least partially surround at least the top of the wafer and in electrical contact with one or more chips disposed on a top of the top layer and a holding device that mates with the retainer elements to provide at least power to the retaining elements. So arranged, the wafer may be cooled. | 1. A computing device including:
a wafer having multiple layers, the wafer including a top layer and sublayers disposed below it, the sublayers including one or more memory devices; two or more shaped retainer elements shaped to mate with and at least partially surround at least the top of the wafer and in electrical contact with one or more chips disposed on a top of the top layer; a holding device that mates with the retainer elements to provide at least power to the retaining elements. 2. The device of claim 1, wherein the holding device includes two halves that are moved together to mate with the retainer elements. 3. The device of claim 2, wherein a heat sink is attached to the top of the wafer. 4. The device of claim 3, wherein a heat sink is attached to the bottom of the wafer. 5. The device of claim 1, wherein the holding device is a full socket and the wafer is inserted downwardly into the full socket. 6. The device of claim 5, wherein a heat sink is attached to the top of the wafer. 7. The device of claim 5, wherein the holding device includes spring wires that form the electrical contact with the retainer elements. 8. The device of claim 1, wherein the holding device is a partial socket having an open bottom regions and the wafer is inserted downwardly into the partial socket. 9. The device of claim 8, wherein a heat sink is attached to the top of the wafer. 10. The device of claim 8, wherein a heat sink is attached to a bottom of the wafer. 11. The device of claim 8, wherein the holding device includes spring wires that form the electrical contact with the retainer elements. 12. A computing device including:
a wafer having multiple layers, the wafer including a top layer and sublayers disposed above it, the sublayers including one or more memory devices; a holding device that mates with the wafer elements to provide at least power to the retaining elements, the holding device including wire springs that contact either the top layer or a bottom layer of the wafer. 13. The device of claim 12, wherein the holding device is a full socket and the wafer is inserted downwardly into the full socket. 14. The device of claim 13, wherein a heat sink is attached to the top of the wafer. 15. The device of claim 13, wherein the holding device includes spring wires that form the electrical contact with the wafer. 16. The device of claim 12, wherein the holding device is a partial socket having an open bottom regions and the wafer is inserted downwardly into the partial socket. 17. The device of claim 16, wherein a heat sink is attached to the top of the wafer. 18. The device of claim 16, wherein a heat sink is attached to a bottom of the wafer. 19. The device of claim 16, wherein the holding device includes spring wires that form the electrical contact with the wafer. | A computing device includes a wafer having multiple layers, the wafer including a top layer and sublayers disposed below it, the sublayers including one or more memory devices. The computing device also includes two or more shaped retainer elements shaped to mate with and at least partially surround at least the top of the wafer and in electrical contact with one or more chips disposed on a top of the top layer and a holding device that mates with the retainer elements to provide at least power to the retaining elements. So arranged, the wafer may be cooled.1. A computing device including:
a wafer having multiple layers, the wafer including a top layer and sublayers disposed below it, the sublayers including one or more memory devices; two or more shaped retainer elements shaped to mate with and at least partially surround at least the top of the wafer and in electrical contact with one or more chips disposed on a top of the top layer; a holding device that mates with the retainer elements to provide at least power to the retaining elements. 2. The device of claim 1, wherein the holding device includes two halves that are moved together to mate with the retainer elements. 3. The device of claim 2, wherein a heat sink is attached to the top of the wafer. 4. The device of claim 3, wherein a heat sink is attached to the bottom of the wafer. 5. The device of claim 1, wherein the holding device is a full socket and the wafer is inserted downwardly into the full socket. 6. The device of claim 5, wherein a heat sink is attached to the top of the wafer. 7. The device of claim 5, wherein the holding device includes spring wires that form the electrical contact with the retainer elements. 8. The device of claim 1, wherein the holding device is a partial socket having an open bottom regions and the wafer is inserted downwardly into the partial socket. 9. The device of claim 8, wherein a heat sink is attached to the top of the wafer. 10. The device of claim 8, wherein a heat sink is attached to a bottom of the wafer. 11. The device of claim 8, wherein the holding device includes spring wires that form the electrical contact with the retainer elements. 12. A computing device including:
a wafer having multiple layers, the wafer including a top layer and sublayers disposed above it, the sublayers including one or more memory devices; a holding device that mates with the wafer elements to provide at least power to the retaining elements, the holding device including wire springs that contact either the top layer or a bottom layer of the wafer. 13. The device of claim 12, wherein the holding device is a full socket and the wafer is inserted downwardly into the full socket. 14. The device of claim 13, wherein a heat sink is attached to the top of the wafer. 15. The device of claim 13, wherein the holding device includes spring wires that form the electrical contact with the wafer. 16. The device of claim 12, wherein the holding device is a partial socket having an open bottom regions and the wafer is inserted downwardly into the partial socket. 17. The device of claim 16, wherein a heat sink is attached to the top of the wafer. 18. The device of claim 16, wherein a heat sink is attached to a bottom of the wafer. 19. The device of claim 16, wherein the holding device includes spring wires that form the electrical contact with the wafer. | 2,800 |
11,335 | 11,335 | 14,743,124 | 2,814 | An assembly method that includes providing a first semiconductor device and positioning a second semiconductor device at least partially over the first semiconductor device is disclosed. Spacers space the active surface of the first semiconductor device substantially a predetermined distance apart from the back side of the second semiconductor device. Discrete conductive elements are extended between the active surface of the first semiconductor device and the substrate prior to positioning of the second semiconductor device. Intermediate portions of the discrete conductive elements pass through an aperture formed between the active surface of the first semiconductor device, the back side of the second semiconductor device, and two of the spacers positioned therebetween. Assemblies and packaged semiconductor devices that are formed in accordance with the method are also disclosed. | 1. A multi-chip module on a substrate having contact areas on a surface thereof, comprising:
a first semiconductor device having an active surface including bond pads thereon and an opposing back side affixed to the substrate; a second semiconductor device having a back side; spacers interposed between the active surface of the first semiconductor device and the back side of the second semiconductor device; discrete conductive elements, each extending over the active surface of the first semiconductor device from respective bond pads of the bond pads to respective contact areas on the substrate surface between two of the spacers; a dielectric coating on at least portions of at least one of the discrete conductive elements and the back side of the second semiconductor device, the dielectric coating configured to electrically isolate the discrete conductive elements from the back side of the second semiconductor device; and an insulative material disposed at least partially between the first semiconductor device and the second semiconductor device. 2. The multi-chip module of claim 1, wherein the spacers comprise at least one of a dielectric material, a tape having an adhesive on each side thereof, a tape coated with thermoplastic material, an adhesive paste, a flowable adhesive, a photocurable material, a thermoplastic material, or a thermocurable material. 3. The multi-chip module of claim 2, wherein at least one of the spacers comprises superimposed, contiguous, mutually adhered materials. 4. The multi-chip module of claim 1, wherein at least one of the spacers is positioned at a peripheral corner of the active surface of the first semiconductor device. 5. The multi-chip module of claim 1, further comprising:
a third semiconductor device positioned over the second semiconductor device; and additional spacers interposed between an active surface of the second semiconductor device and a back side of the third semiconductor device. 6. The multi-chip module of claim 5, further comprising:
peripheral bond pads; and discrete conductive elements electrically connecting the peripheral bond pads to corresponding contact areas of the substrate. 7. The multi-chip module of claim 1, wherein each of the discrete conductive elements extending over the active surface of the first semiconductor device from respective bond pads of the bond pads to respective contact areas on the substrate surface between one of a first opening defined between a first set of spacers of the spacers and a second opening defined between a second set of spacers of the spacers. 8. The multi-chip module of claim 7, wherein the first set of spacers is separate from the second set of spacers. 9. The multi-chip module of claim 7, further comprising second discrete conductive elements extending over the active surface of the first semiconductor device from respective bond pads of the bond pads to respective contact areas on the substrate surface between a third opening defined between a third set of spacers of the spacers. 10. The multi-chip module of claim 9, further comprising third discrete conductive elements extending over the active surface of the first semiconductor device from respective bond pads of the bond pads to respective contact areas on the substrate surface between a fourth opening defined between a fourth set of spacers of the spacers. 11. The multi-chip module of claim 10, wherein the third set of spacers is separate from the fourth set of spacers. 12. The multi-chip module of claim 1, further comprising:
peripheral bond pads positioned on the active surface of the first semiconductor device at a peripheral edge of the first semiconductor device; and discrete conductive elements electrically connecting the peripheral bond pads to corresponding contact areas of the substrate. 13. A multi-chip module, comprising:
a substrate comprising contact areas on a surface thereof; a first semiconductor device having an active surface including bond pads thereon and an opposing back side affixed to the substrate; discrete conductive elements, each extending over the active surface of the first semiconductor device from respective bond pads of the bond pads to respective contact areas on the substrate surface; spacers positioned on the active surface of the first semiconductor device, each spacer of the spacers surrounding a portion of a discrete conductive element of the discrete conductive elements; and a second semiconductor device superimposed over the first semiconductor device and supported by the spacers. 14. The multi-chip module of claim 13, wherein at least one of the spacers is positioned at a peripheral corner of the active surface of the first semiconductor device. 15. The multi-chip module of claim 13, wherein at least one of the spacers is positioned over at least one bond pad of the bond pads on the active surface of the first semiconductor device. 16. A multi-chip module comprising:
a substrate; a first semiconductor device having an active surface including a central region encompassing bond pads and a back side, the back side affixed to the substrate; a second semiconductor device having an active surface including bond pads and a back side; at least four spacers interposed between the active surface of the first semiconductor device and the back side of the second semiconductor device; first discrete conductive elements extending from the bond pads of the first semiconductor device and to a first contact area on a first side of the substrate, wherein each conductive element extending to the first contact area on the first side of the substrate extends through a first common aperture formed between the active surface of the first semiconductor device, the back side of the second semiconductor device, and two spacers of the at least four spacers; and second discrete conductive elements extending from the bond pads of the first semiconductor device and to a second contact area on a second side of the substrate, wherein each conductive element extending to the second contact area on the second side of the substrate extends through a second common aperture formed between the active surface of the first semiconductor device, the back side of the second semiconductor device, and two spacers of the at least four spacers. 17. The multi-chip module of claim 16, wherein the two spacers defining the first common aperture are separate from the two spacers defining the second common aperture. 18. The multi-chip module of claim 16, wherein every discrete conductive element extending from the bond pads of the first semiconductor device and to the substrate extends through either the first common aperture or the second common aperture. 19. The multi-chip module of claim 16, further comprising third discrete conductive elements extending from the bond pads of the first semiconductor device and to a third contact area on a third side of the substrate, wherein each conductive element extending to the third contact area on the third side of the substrate extends through a third common aperture formed between the active surface of the first semiconductor device, the back side of the second semiconductor device, and two spacers of the at least four spacers. 20. The multi-chip module of claim 19, wherein the third contact area is defined by one of the two spacers defining the first common aperture and one of the two spacers defining the second common aperture. | An assembly method that includes providing a first semiconductor device and positioning a second semiconductor device at least partially over the first semiconductor device is disclosed. Spacers space the active surface of the first semiconductor device substantially a predetermined distance apart from the back side of the second semiconductor device. Discrete conductive elements are extended between the active surface of the first semiconductor device and the substrate prior to positioning of the second semiconductor device. Intermediate portions of the discrete conductive elements pass through an aperture formed between the active surface of the first semiconductor device, the back side of the second semiconductor device, and two of the spacers positioned therebetween. Assemblies and packaged semiconductor devices that are formed in accordance with the method are also disclosed.1. A multi-chip module on a substrate having contact areas on a surface thereof, comprising:
a first semiconductor device having an active surface including bond pads thereon and an opposing back side affixed to the substrate; a second semiconductor device having a back side; spacers interposed between the active surface of the first semiconductor device and the back side of the second semiconductor device; discrete conductive elements, each extending over the active surface of the first semiconductor device from respective bond pads of the bond pads to respective contact areas on the substrate surface between two of the spacers; a dielectric coating on at least portions of at least one of the discrete conductive elements and the back side of the second semiconductor device, the dielectric coating configured to electrically isolate the discrete conductive elements from the back side of the second semiconductor device; and an insulative material disposed at least partially between the first semiconductor device and the second semiconductor device. 2. The multi-chip module of claim 1, wherein the spacers comprise at least one of a dielectric material, a tape having an adhesive on each side thereof, a tape coated with thermoplastic material, an adhesive paste, a flowable adhesive, a photocurable material, a thermoplastic material, or a thermocurable material. 3. The multi-chip module of claim 2, wherein at least one of the spacers comprises superimposed, contiguous, mutually adhered materials. 4. The multi-chip module of claim 1, wherein at least one of the spacers is positioned at a peripheral corner of the active surface of the first semiconductor device. 5. The multi-chip module of claim 1, further comprising:
a third semiconductor device positioned over the second semiconductor device; and additional spacers interposed between an active surface of the second semiconductor device and a back side of the third semiconductor device. 6. The multi-chip module of claim 5, further comprising:
peripheral bond pads; and discrete conductive elements electrically connecting the peripheral bond pads to corresponding contact areas of the substrate. 7. The multi-chip module of claim 1, wherein each of the discrete conductive elements extending over the active surface of the first semiconductor device from respective bond pads of the bond pads to respective contact areas on the substrate surface between one of a first opening defined between a first set of spacers of the spacers and a second opening defined between a second set of spacers of the spacers. 8. The multi-chip module of claim 7, wherein the first set of spacers is separate from the second set of spacers. 9. The multi-chip module of claim 7, further comprising second discrete conductive elements extending over the active surface of the first semiconductor device from respective bond pads of the bond pads to respective contact areas on the substrate surface between a third opening defined between a third set of spacers of the spacers. 10. The multi-chip module of claim 9, further comprising third discrete conductive elements extending over the active surface of the first semiconductor device from respective bond pads of the bond pads to respective contact areas on the substrate surface between a fourth opening defined between a fourth set of spacers of the spacers. 11. The multi-chip module of claim 10, wherein the third set of spacers is separate from the fourth set of spacers. 12. The multi-chip module of claim 1, further comprising:
peripheral bond pads positioned on the active surface of the first semiconductor device at a peripheral edge of the first semiconductor device; and discrete conductive elements electrically connecting the peripheral bond pads to corresponding contact areas of the substrate. 13. A multi-chip module, comprising:
a substrate comprising contact areas on a surface thereof; a first semiconductor device having an active surface including bond pads thereon and an opposing back side affixed to the substrate; discrete conductive elements, each extending over the active surface of the first semiconductor device from respective bond pads of the bond pads to respective contact areas on the substrate surface; spacers positioned on the active surface of the first semiconductor device, each spacer of the spacers surrounding a portion of a discrete conductive element of the discrete conductive elements; and a second semiconductor device superimposed over the first semiconductor device and supported by the spacers. 14. The multi-chip module of claim 13, wherein at least one of the spacers is positioned at a peripheral corner of the active surface of the first semiconductor device. 15. The multi-chip module of claim 13, wherein at least one of the spacers is positioned over at least one bond pad of the bond pads on the active surface of the first semiconductor device. 16. A multi-chip module comprising:
a substrate; a first semiconductor device having an active surface including a central region encompassing bond pads and a back side, the back side affixed to the substrate; a second semiconductor device having an active surface including bond pads and a back side; at least four spacers interposed between the active surface of the first semiconductor device and the back side of the second semiconductor device; first discrete conductive elements extending from the bond pads of the first semiconductor device and to a first contact area on a first side of the substrate, wherein each conductive element extending to the first contact area on the first side of the substrate extends through a first common aperture formed between the active surface of the first semiconductor device, the back side of the second semiconductor device, and two spacers of the at least four spacers; and second discrete conductive elements extending from the bond pads of the first semiconductor device and to a second contact area on a second side of the substrate, wherein each conductive element extending to the second contact area on the second side of the substrate extends through a second common aperture formed between the active surface of the first semiconductor device, the back side of the second semiconductor device, and two spacers of the at least four spacers. 17. The multi-chip module of claim 16, wherein the two spacers defining the first common aperture are separate from the two spacers defining the second common aperture. 18. The multi-chip module of claim 16, wherein every discrete conductive element extending from the bond pads of the first semiconductor device and to the substrate extends through either the first common aperture or the second common aperture. 19. The multi-chip module of claim 16, further comprising third discrete conductive elements extending from the bond pads of the first semiconductor device and to a third contact area on a third side of the substrate, wherein each conductive element extending to the third contact area on the third side of the substrate extends through a third common aperture formed between the active surface of the first semiconductor device, the back side of the second semiconductor device, and two spacers of the at least four spacers. 20. The multi-chip module of claim 19, wherein the third contact area is defined by one of the two spacers defining the first common aperture and one of the two spacers defining the second common aperture. | 2,800 |
11,336 | 11,336 | 14,671,727 | 2,893 | An IC assembly including an exposed pad integrated circuit (“IC”) package having a thermal pad with a top surface and a bottom surface and with at least one peripheral surface portion extending transversely of and continuous with the bottom surface. The bottom surface and the at least one peripheral surface are exposed through a layer of mold compound. Also, methods of making an exposed pad integrated circuit (“IC”) package assembly. One method includes optically inspecting a solder bond bonding a thermal pad of an exposed pad IC package to a printed circuit board. Another method includes wave soldering an exposed pad of an IC package to a printed circuit board. | 1. An IC assembly comprising:
an exposed pad integrated circuit (“IC”) package having:
a thermal pad having a top surface and a bottom surface and having at least one peripheral surface portion extending transversely of and continuous with said bottom surface; and
a layer of mold compound through which said bottom surface and said at least one peripheral surface are exposed. 2. The IC assembly of claim 1 further comprising:
an electrical connection substrate having a top surface portion; and
a layer of solder that bonds said bottom surface and said at least one peripheral surface portion of said thermal pad to said top surface portion and said at least one peripheral surface portion of said electrical connection substrate. 3. The IC assembly of claim 2 wherein said electrical connection substrate comprises a printed circuit board. 4. The IC assembly of claim 2 wherein said layer of solder is applied by wave solder. 5. The IC assembly of claim 2 wherein said layer of solder is a layer of reflowed solder. 6. The IC assembly of claim 1 wherein said at least one peripheral surface portion extending transversely of said bottom surface extends perpendicular to said bottom surface. 7. The IC assembly of claim 1 wherein said at least one peripheral surface portion comprises at least one of a front and a rear peripheral surface portion. 8. The IC assembly of claim 1 further comprising a plurality of leads extending laterally outwardly of said thermal pad; and
a die attached to said top surface of said thermal pad having electrical contact surfaces thereon electrically connected to said plurality of leads. 9. The IC assembly of claim 8 wherein said plurality of leads extending laterally outwardly of said first and second lateral side edges of said thermal pad comprise outer terminal end portions having generally flat bottom surfaces that are generally parallel to said bottom surface of said thermal pad. 10. The IC assembly of claim 9 further comprising solder bonded to said generally flat bottom surfaces of said outer terminal end portions of said plurality of leads. 11. The IC assembly of claim 1 wherein said thermal pad bottom surface is generally flat and wherein said layer of mold compound comprises a generally flat bottom surface that is generally coplanar with said generally flat bottom surface of said thermal pad. 12. The IC assembly of claim 7 wherein at least one of said front and rear peripheral surface portions of said thermal pad comprise at least one flange extending transversely of said top and bottom surfaces of said thermal pad; said at least one flange having an exposed surface. 13. The IC assembly of claim 12 further comprising solder bonded to said exposed surface of said at least one flange.
wherein said solder bonded to said at least one flange extends upwardly from a bottom portion of said at least one flange. 14. The IC assembly of claim 12 wherein said at least one flange has an exposed surface that is connected to said bottom surface of said thermal pad by an arcuate surface portion. 15. The IC assembly of claim 12 wherein said at least one flange extends the full width of said thermal pad. 16. The IC assembly of claim 12 wherein said at least one flange extends only a portion of the full width of said thermal pad. 17. A method of making an exposed pad integrated circuit (“IC”) package assembly comprising:
attaching a die to a top surface of a thermal pad; and
leaving at least a portion of at least one transversely extending portion of the thermal pad exposed during molding. 18. The method of claim 17 further comprising:
soldering the exposed portion of the at least one transversely extending portion of the thermal pad to a metal portion of a printed circuit board. 19. A method of making an electrical assembly comprising:
providing an exposed pad integrated circuit (“IC”) package and a printed circuit board; and wave soldering the exposed pad of the IC package to the printed circuit board. 20. A method of inspecting a solder bond bonding a thermal pad of an exposed pad IC package to a printed circuit board comprising:
providing an exposed pad IC package having a thermal pad bonded to a printed circuit board; and optically inspecting the solder bond. 21. The method of claim 20 wherein said optically inspecting comprises using an imaging device to image the solder bond. | An IC assembly including an exposed pad integrated circuit (“IC”) package having a thermal pad with a top surface and a bottom surface and with at least one peripheral surface portion extending transversely of and continuous with the bottom surface. The bottom surface and the at least one peripheral surface are exposed through a layer of mold compound. Also, methods of making an exposed pad integrated circuit (“IC”) package assembly. One method includes optically inspecting a solder bond bonding a thermal pad of an exposed pad IC package to a printed circuit board. Another method includes wave soldering an exposed pad of an IC package to a printed circuit board.1. An IC assembly comprising:
an exposed pad integrated circuit (“IC”) package having:
a thermal pad having a top surface and a bottom surface and having at least one peripheral surface portion extending transversely of and continuous with said bottom surface; and
a layer of mold compound through which said bottom surface and said at least one peripheral surface are exposed. 2. The IC assembly of claim 1 further comprising:
an electrical connection substrate having a top surface portion; and
a layer of solder that bonds said bottom surface and said at least one peripheral surface portion of said thermal pad to said top surface portion and said at least one peripheral surface portion of said electrical connection substrate. 3. The IC assembly of claim 2 wherein said electrical connection substrate comprises a printed circuit board. 4. The IC assembly of claim 2 wherein said layer of solder is applied by wave solder. 5. The IC assembly of claim 2 wherein said layer of solder is a layer of reflowed solder. 6. The IC assembly of claim 1 wherein said at least one peripheral surface portion extending transversely of said bottom surface extends perpendicular to said bottom surface. 7. The IC assembly of claim 1 wherein said at least one peripheral surface portion comprises at least one of a front and a rear peripheral surface portion. 8. The IC assembly of claim 1 further comprising a plurality of leads extending laterally outwardly of said thermal pad; and
a die attached to said top surface of said thermal pad having electrical contact surfaces thereon electrically connected to said plurality of leads. 9. The IC assembly of claim 8 wherein said plurality of leads extending laterally outwardly of said first and second lateral side edges of said thermal pad comprise outer terminal end portions having generally flat bottom surfaces that are generally parallel to said bottom surface of said thermal pad. 10. The IC assembly of claim 9 further comprising solder bonded to said generally flat bottom surfaces of said outer terminal end portions of said plurality of leads. 11. The IC assembly of claim 1 wherein said thermal pad bottom surface is generally flat and wherein said layer of mold compound comprises a generally flat bottom surface that is generally coplanar with said generally flat bottom surface of said thermal pad. 12. The IC assembly of claim 7 wherein at least one of said front and rear peripheral surface portions of said thermal pad comprise at least one flange extending transversely of said top and bottom surfaces of said thermal pad; said at least one flange having an exposed surface. 13. The IC assembly of claim 12 further comprising solder bonded to said exposed surface of said at least one flange.
wherein said solder bonded to said at least one flange extends upwardly from a bottom portion of said at least one flange. 14. The IC assembly of claim 12 wherein said at least one flange has an exposed surface that is connected to said bottom surface of said thermal pad by an arcuate surface portion. 15. The IC assembly of claim 12 wherein said at least one flange extends the full width of said thermal pad. 16. The IC assembly of claim 12 wherein said at least one flange extends only a portion of the full width of said thermal pad. 17. A method of making an exposed pad integrated circuit (“IC”) package assembly comprising:
attaching a die to a top surface of a thermal pad; and
leaving at least a portion of at least one transversely extending portion of the thermal pad exposed during molding. 18. The method of claim 17 further comprising:
soldering the exposed portion of the at least one transversely extending portion of the thermal pad to a metal portion of a printed circuit board. 19. A method of making an electrical assembly comprising:
providing an exposed pad integrated circuit (“IC”) package and a printed circuit board; and wave soldering the exposed pad of the IC package to the printed circuit board. 20. A method of inspecting a solder bond bonding a thermal pad of an exposed pad IC package to a printed circuit board comprising:
providing an exposed pad IC package having a thermal pad bonded to a printed circuit board; and optically inspecting the solder bond. 21. The method of claim 20 wherein said optically inspecting comprises using an imaging device to image the solder bond. | 2,800 |
11,337 | 11,337 | 13,651,994 | 2,846 | A method of starting a brushless motor that includes a rotor, a stator having at least one phase winding, and a rotor-position sensor. The method involves exciting the winding and sensing a signal output by the sensor. If an edge of the signal is sensed during a first period, the winding is commutated in response to the edge. Otherwise, the method involves commutating the winding at the end of the first period, sensing the signal, and commutating the winding in response to a second of two edges of the signal sensed during a second period. Additionally, a control system that implements the method, and a motor assembly that incorporates the brushless motor and the control system. | 1. A method of starting a brushless motor, the motor comprising a rotor, a stator having at least one phase winding, and a rotor-position sensor, the method comprising:
exciting the winding; sensing a signal output by the sensor; if an edge of the signal is sensed during a first period:
commutating the winding in response to the edge;
otherwise:
commutating the winding at the end of the first period;
sensing the signal; and
commutating the winding in response to a second of two edges of the signal sensed during a second period. 2. A method as claimed in claim 1, wherein the rotor has N poles and the first period ends at a time sufficient for the rotor to rotate from stationary through an angle of at least 360/N mechanical degrees when exciting the winding generates positive excitation torque. 3. A method as claimed in claim 1, wherein the rotor has N poles and the second period ends at a time sufficient for the rotor to rotate from stationary through an angle greater than 360/N mechanical degrees after commutating the winding at the end of the first period. 4. A method as claimed in claim 1, wherein the first period begins a fixed period of time after the start of excitation. 5. A method as claimed in claim 1, wherein the second period begins a fixed period of time after commutation. 6. A method as claimed in claim 1, wherein exciting the winding comprises sensing the signal, exciting the winding in a first direction in response to a logically high signal, and exciting the winding in a second direction in response to a logically low signal, wherein exciting the winding in the first direction when the signal is logically high and exciting the winding in the second direction when the signal is logically low generates positive excitation torque when the rotor is in an unaligned position. 7. A method as claimed in claim 1, wherein the method comprises generating a fault in the event that two edges of the signal are not sensed during the second period. 8. A method as claimed in claim 1, wherein the method comprises subsequently sensing the signal and commutating the winding in response to each edge of the signal. 9. A method as claimed in claim 1, wherein the rotor comprises a permanent-magnet and the rotor-position sensor is a Hall-effect sensor. 10. A control system for starting a brushless motor, wherein the motor comprises a rotor, a stator having at least one phase winding, and a rotor-position sensor, and the control system is configured to:
excite the winding; sense a signal output by the sensor; if an edge of the signal is sensed during a first period:
commutate the winding in response to the edge;
otherwise:
commutate the winding at the end of the first period;
sense the signal; and
commutate the winding in response to a second of two edges of the signal sensed during a second period. 11. A motor assembly comprising a brushless motor and a control system as claimed in claim 10, the brushless motor comprising a permanent-magnet rotor, a stator having a single phase winding, and a Hall-effect sensor. | A method of starting a brushless motor that includes a rotor, a stator having at least one phase winding, and a rotor-position sensor. The method involves exciting the winding and sensing a signal output by the sensor. If an edge of the signal is sensed during a first period, the winding is commutated in response to the edge. Otherwise, the method involves commutating the winding at the end of the first period, sensing the signal, and commutating the winding in response to a second of two edges of the signal sensed during a second period. Additionally, a control system that implements the method, and a motor assembly that incorporates the brushless motor and the control system.1. A method of starting a brushless motor, the motor comprising a rotor, a stator having at least one phase winding, and a rotor-position sensor, the method comprising:
exciting the winding; sensing a signal output by the sensor; if an edge of the signal is sensed during a first period:
commutating the winding in response to the edge;
otherwise:
commutating the winding at the end of the first period;
sensing the signal; and
commutating the winding in response to a second of two edges of the signal sensed during a second period. 2. A method as claimed in claim 1, wherein the rotor has N poles and the first period ends at a time sufficient for the rotor to rotate from stationary through an angle of at least 360/N mechanical degrees when exciting the winding generates positive excitation torque. 3. A method as claimed in claim 1, wherein the rotor has N poles and the second period ends at a time sufficient for the rotor to rotate from stationary through an angle greater than 360/N mechanical degrees after commutating the winding at the end of the first period. 4. A method as claimed in claim 1, wherein the first period begins a fixed period of time after the start of excitation. 5. A method as claimed in claim 1, wherein the second period begins a fixed period of time after commutation. 6. A method as claimed in claim 1, wherein exciting the winding comprises sensing the signal, exciting the winding in a first direction in response to a logically high signal, and exciting the winding in a second direction in response to a logically low signal, wherein exciting the winding in the first direction when the signal is logically high and exciting the winding in the second direction when the signal is logically low generates positive excitation torque when the rotor is in an unaligned position. 7. A method as claimed in claim 1, wherein the method comprises generating a fault in the event that two edges of the signal are not sensed during the second period. 8. A method as claimed in claim 1, wherein the method comprises subsequently sensing the signal and commutating the winding in response to each edge of the signal. 9. A method as claimed in claim 1, wherein the rotor comprises a permanent-magnet and the rotor-position sensor is a Hall-effect sensor. 10. A control system for starting a brushless motor, wherein the motor comprises a rotor, a stator having at least one phase winding, and a rotor-position sensor, and the control system is configured to:
excite the winding; sense a signal output by the sensor; if an edge of the signal is sensed during a first period:
commutate the winding in response to the edge;
otherwise:
commutate the winding at the end of the first period;
sense the signal; and
commutate the winding in response to a second of two edges of the signal sensed during a second period. 11. A motor assembly comprising a brushless motor and a control system as claimed in claim 10, the brushless motor comprising a permanent-magnet rotor, a stator having a single phase winding, and a Hall-effect sensor. | 2,800 |
11,338 | 11,338 | 14,584,230 | 2,883 | A sealing enclosure is configured to connect to a mating enclosure. The sealing enclosure loosely receives a connector within a connector volume so that the connector, which may be of a standard type used in electronic or optic data transmission, may be displaced within a plug face at the forward end of the connector volume. The connector may compensate variations in the position of a mating connector with respect to the mating enclosure. The sealing enclosure allows to seal off the connector volume and engage the sealing enclosure with a mating enclosure in a single motion. This is affected by having a cable seal interposed between an inner body and an outer body. If the outer body is moved forward to engage the mating connector, the cable seal is squeezed between the cable and the inner body sealing off the connector volume at the rearward end of the inner body. | 1. A sealing enclosure comprising:
a fiber optic connector adapted to be mounted on an end of a cable; an inner body having a connector volume, the fiber optic connector being received within the connector volume, the inner body including a plug section having a forward facing plug face that is open in a forward direction, the plug section including at least one positive locking element; an outer body surrounding the inner body and being movable relative thereto, the outer body having a bayonet-type locking element at a forward end of the outer body, the bayonet-type locking element being provided on an interior side of the outer body facing the plug section; and a mating section provided with at least one locking element that matches the bayonet-type locking element of the outer body to enable a bayonet-type locking with the outer body, the mating section also including a positive locking element that engages with the at least one positive locking element of the plug section to prevent relative rotation between the inner body and the mating section, the mating section including an annular collar having an annular seal on an outer circumference thereof for providing a seal between the mating section and the outer body; wherein the inner body includes a rearwardly facing shoulder, and wherein the outer body includes an abutment surface that faces the rearwardly facing shoulder in an axial direction; wherein a spring element is positioned between the rearwardly facing shoulder and the abutment surface; and wherein an annular seal positioned rearward of the spring element is provided for sealing between the inner body and the outer body. 2. The sealing enclosure of claim 1, wherein the spring element has an outer diameter that is larger than an outer diameter of the annular seal. 3. The sealing enclosure of claim 1, wherein the spring element is positioned radially between the outer body and the inner body, and wherein the outer body defines an inner diameter at the spring element that is larger than an outer diameter of the rearwardly facing shoulder of the inner body. 4. The sealing enclosure of claim 3, wherein the plug section defines an inner diameter at the fiber optic connector that is larger than an outer diameter of the inner body at the spring element. 5. The sealing enclosure of claim 1, wherein the spring element is positioned radially between the outer body and the inner body, and wherein the plug section defines an inner diameter at the fiber optic connector that is larger than an outer diameter of the inner body at the spring element. 6. A sealing enclosure comprising:
a fiber optic connector adapted to be mounted on an end of a cable; an inner body having a connector volume, the fiber optic connector being received within the connector volume, the inner body including a plug section having a forward facing plug face that is open in a forward direction, the plug section including at least one positive locking element; an outer body surrounding the inner body and being movable relative thereto, the outer body having a bayonet-type locking element at a forward end of the outer body, the bayonet-type locking element being provided on an interior side of the outer body facing the plug section; and a mating section provided with at least one locking element that matches the bayonet-type locking element of the outer body to enable a bayonet-type locking with the outer body, the mating section also including a positive locking element that engages with the at least one positive locking element of the plug section to prevent relative rotation between the inner body and the mating section, the mating section including an annular collar having an annular seal on an outer circumference thereof for providing a seal between the mating section and the outer body; the inner body including a rear support section that extends rearwardly from the plug section; and the outer body including a front section that surrounds the plug section of the inner body and a rear section that surrounds the rear support section of the inner body, the front section of the outer body extending from a front end of the outer body to an interior radial in-step of the outer body, the rear section of the outer body extending from the interior radial in-step of the outer body to a rear end of the outer body, and the rear section of the outer body being longer than the front section of the outer body a forward-rearward direction. 7. The sealing enclosure of claim 6, wherein the fiber optic connector includes a connector body having a front end at which a ferrule is supported, and wherein the inner body extends over at least almost the complete axial length of the fiber optic connector in the forward-rearward direction. 8. The sealing enclosure of claim 6, wherein the connector volume has a cylindrical shape within the plug section. 9. The sealing enclosure of claim 6, wherein the fiber optic connector includes a connector body having a front end at which a ferrule is positioned, wherein the connector volume has a stepped cylindrical shape with a forward section having an enlarged diameter and a rearward section with a reduced diameter, the forward section of the connector volume having a length that is more than half as long as the connector body in the forward-rearward direction. 10. The sealing enclosure of claim 6, wherein the fiber optic connector includes a connector body having a front end at which a ferrule is positioned, and wherein the plug section has a front end defining an inner diameter that is larger than a largest radial dimension defined by the fiber optic connector. 11. A sealing enclosure comprising:
a fiber optic connector adapted to be mounted on an end of a cable; an inner body having a connector volume, the fiber optic connector being received within the connector volume, the inner body including a forward facing plug end that is open in a forward direction, the inner body including at least one anti-rotation element; an outer body surrounding the inner body and being movable relative thereto, a forward section of the outer body having a locking element of the bayonet type, the locking element provided on an interior side of the outer body; a mating section provided with at least one locking element that matches the at least one locking element of the outer body to enable a bayonet-type locking with the outer body, the mating section also including an anti-rotation element that mates with the anti-rotation element of the inner body to prevent relative rotation between the inner body and the mating section, the mating section including an annular collar having an annular seal on its outer circumference for providing a seal between the mating section and the outer body; a spring that is compressed axially between the outer and inner bodies during the bayonet type locking between the outer body and the mating section; and the outer body including an inner shoulder that faces in a forward direction, the inner shoulder opposing a rearwardly facing surface of the inner body, the forward section of the outer body having a forward end positioned a first axial distance in front of the inner shoulder, a rearward section of the outer body defining a rear end positioned a second axial distance behind the inner shoulder, and the second axial distance having a greater magnitude than the first axial distance. 12. The sealing enclosure of claim 11, wherein the fiber optic connector includes a connector body having a front end at which a ferrule is supported, and wherein the inner body extends over at least almost the complete axial length of the fiber optic connector in a forward-rearward direction. 13. The sealing enclosure of claim 11, wherein connector volume has a cylindrical shape adjacent the forward facing plug end of the inner body. 14. The sealing enclosure of claim 11, wherein the fiber optic connector includes a connector body having a front end at which a ferrule is positioned, wherein the connector volume has a stepped cylindrical shape with a forward section of the connector volume having an enlarged diameter and a rearward section of the connector volume having a reduced diameter, the forward section of the connector volume having a length that is more than half as long as the connector body in a forward-rearward direction. 15. The sealing enclosure of claim 11, wherein the fiber optic connector includes a connector body having a front end at which a ferrule is positioned, and wherein the inner body defines an inner diameter at a forward region of the control volume that is larger than a largest radial dimension defined by the fiber optic connector such that a radial spacing exists between an interior surface of the inner body and the fiber optic connector. 16. The sealing enclosure of claim 11, wherein an annular seal positioned rearward of the spring element is provided for sealing between the inner body and the outer body, and wherein the spring element has an outer diameter that is larger than an outer diameter of the annular seal. 17. The sealing enclosure of claim 11, wherein the spring element is positioned radially between the outer body and the inner body, and wherein the inner body defines an inner diameter adjacent the forward facing plug end that is larger than an outer diameter of the inner body at the spring element. 18. The sealing enclosure of claim 11, wherein the rearward section of the outer body defines an inner cylindrical guide surface having at least a portion positioned at least a third axial distance behind the inner shoulder, the third axial distance being greater than the first axial distance and less than the second axial distance. 19. The sealing enclosure of claim 11, wherein the rearward section of the outer body includes a cylindrical outer gipping surface having a gripping structure, at least a portion of the cylindrical outer gripping surface being positioned at least a third axial distance behind the inner shoulder, the third axial distance being greater than the first axial distance and less than the second axial distance. 20. The sealing enclosure of claim 19, wherein the front section includes a cylindrical outer surface defining an outer diameter that is enlarged as compared to an outer diameter of the cylindrical outer gripping surface of the rear section. 21. The sealing enclosure of claim 20, wherein the outer body defines a tapered diameter transition at a region between the cylindrical outer surface of the front section and the cylindrical outer gripping surface of the rear section. 22. The sealing enclosure of claim 18, wherein the inner body includes a forward section in which the connector volume is cylindrical and has a first diameter, wherein the inner body includes a rearward section having an outer cylindrical guide surface that opposes the inner cylindrical guide surface of rearward section of the outer body, and wherein the outer cylindrical guide surface defines a second diameter that is smaller than the first diameter. 23. A sealing enclosure comprising:
a connector adapted to be mounted on an end of a cable; an inner body having a connector volume, the connector being received within the connector volume, the inner body including a plug section having a forward facing plug face that is open in a forward direction, the plug section including at least one positive locking element which has two opposing stop surfaces pointing in opposite circumferential directions about the cable and the plug face; an outer body surrounding the inner body and being movable relative thereto; and a mating section including at least one positive locking element that engages with the at least one positive locking element of the plug section to prevent relative rotation between the inner body and the mating section, the mating section including an annular collar forming support for a gasket on its outer circumference, the outer body including a sealing surface that engages the gasket to provide a barrier against dirt and moisture entering the connector volume, the inner body including a rearwardly facing stop surface that limits a depth of insertion of the inner body into the outer body, the outer body including an inner abutment surface disposed between a forward end and a rearward end of the outer body, the inner abutment surface facing the stop surface of the inner body in an axial direction; the outer body has a locking element of the bayonet type at a forward end of the outer body, the locking element is provided on an interior side of the outer body facing the plug section; that the mating section is provided with at least one locking element that matches the locking element of the outer body to enable a bayonet type locking with the outer body; that the sealing enclosure includes a spring that is compressed axially between the outer and inner bodies during the bayonet type locking between the outer body and the mating section; and that the rearward end of the outer body is positioned a greater axial distance from the abutment surface than the forward end of the outer body. 24. The sealing enclosure of claim 23, wherein the outer body includes an enlarged forward section that accommodates the plug section, wherein the outer body includes a rear cylindrical section having a reduced outer diameter as compared to the enlarged forward section of the outer body, the rear cylindrical section of the outer body including an outer gripping structure having at least a portion positioned a greater axial distance from the abutment surface than the forward end of the outer body. 25. The sealing enclosure of claim 23, further comprising a seal positioned rearward of the spring for sealing a space between the inner body and the outer body. 26. The sealing enclosure of claim 23, wherein the inner body is received in the outer body by sliding the latter over the former, wherein the outer body includes an enlarged forward section that accommodates the plug section, wherein the outer body includes a cylindrical inner guiding surface having a reduced inner diameter as compared to the enlarged forward section of the outer body, the cylindrical inner guiding surface having at least a portion positioned a greater axial distance from the abutment surface than the forward end of the outer body. 27. The sealing enclosure of claim 26, wherein the inner body includes a support section that extends in the forward-rearward direction, and wherein the inner guiding surface slides along the support section when the inner body is received in the outer body. 28. The sealing enclosure of claim 23, wherein the connector volume has an inner width at the forward facing plug face that is larger than a largest radial dimension of the connector perpendicular to the forward direction. 29. The sealing enclosure of any one of claims 23, further comprising a radially compressed seal adjacent the rearward end of the outer body. | A sealing enclosure is configured to connect to a mating enclosure. The sealing enclosure loosely receives a connector within a connector volume so that the connector, which may be of a standard type used in electronic or optic data transmission, may be displaced within a plug face at the forward end of the connector volume. The connector may compensate variations in the position of a mating connector with respect to the mating enclosure. The sealing enclosure allows to seal off the connector volume and engage the sealing enclosure with a mating enclosure in a single motion. This is affected by having a cable seal interposed between an inner body and an outer body. If the outer body is moved forward to engage the mating connector, the cable seal is squeezed between the cable and the inner body sealing off the connector volume at the rearward end of the inner body.1. A sealing enclosure comprising:
a fiber optic connector adapted to be mounted on an end of a cable; an inner body having a connector volume, the fiber optic connector being received within the connector volume, the inner body including a plug section having a forward facing plug face that is open in a forward direction, the plug section including at least one positive locking element; an outer body surrounding the inner body and being movable relative thereto, the outer body having a bayonet-type locking element at a forward end of the outer body, the bayonet-type locking element being provided on an interior side of the outer body facing the plug section; and a mating section provided with at least one locking element that matches the bayonet-type locking element of the outer body to enable a bayonet-type locking with the outer body, the mating section also including a positive locking element that engages with the at least one positive locking element of the plug section to prevent relative rotation between the inner body and the mating section, the mating section including an annular collar having an annular seal on an outer circumference thereof for providing a seal between the mating section and the outer body; wherein the inner body includes a rearwardly facing shoulder, and wherein the outer body includes an abutment surface that faces the rearwardly facing shoulder in an axial direction; wherein a spring element is positioned between the rearwardly facing shoulder and the abutment surface; and wherein an annular seal positioned rearward of the spring element is provided for sealing between the inner body and the outer body. 2. The sealing enclosure of claim 1, wherein the spring element has an outer diameter that is larger than an outer diameter of the annular seal. 3. The sealing enclosure of claim 1, wherein the spring element is positioned radially between the outer body and the inner body, and wherein the outer body defines an inner diameter at the spring element that is larger than an outer diameter of the rearwardly facing shoulder of the inner body. 4. The sealing enclosure of claim 3, wherein the plug section defines an inner diameter at the fiber optic connector that is larger than an outer diameter of the inner body at the spring element. 5. The sealing enclosure of claim 1, wherein the spring element is positioned radially between the outer body and the inner body, and wherein the plug section defines an inner diameter at the fiber optic connector that is larger than an outer diameter of the inner body at the spring element. 6. A sealing enclosure comprising:
a fiber optic connector adapted to be mounted on an end of a cable; an inner body having a connector volume, the fiber optic connector being received within the connector volume, the inner body including a plug section having a forward facing plug face that is open in a forward direction, the plug section including at least one positive locking element; an outer body surrounding the inner body and being movable relative thereto, the outer body having a bayonet-type locking element at a forward end of the outer body, the bayonet-type locking element being provided on an interior side of the outer body facing the plug section; and a mating section provided with at least one locking element that matches the bayonet-type locking element of the outer body to enable a bayonet-type locking with the outer body, the mating section also including a positive locking element that engages with the at least one positive locking element of the plug section to prevent relative rotation between the inner body and the mating section, the mating section including an annular collar having an annular seal on an outer circumference thereof for providing a seal between the mating section and the outer body; the inner body including a rear support section that extends rearwardly from the plug section; and the outer body including a front section that surrounds the plug section of the inner body and a rear section that surrounds the rear support section of the inner body, the front section of the outer body extending from a front end of the outer body to an interior radial in-step of the outer body, the rear section of the outer body extending from the interior radial in-step of the outer body to a rear end of the outer body, and the rear section of the outer body being longer than the front section of the outer body a forward-rearward direction. 7. The sealing enclosure of claim 6, wherein the fiber optic connector includes a connector body having a front end at which a ferrule is supported, and wherein the inner body extends over at least almost the complete axial length of the fiber optic connector in the forward-rearward direction. 8. The sealing enclosure of claim 6, wherein the connector volume has a cylindrical shape within the plug section. 9. The sealing enclosure of claim 6, wherein the fiber optic connector includes a connector body having a front end at which a ferrule is positioned, wherein the connector volume has a stepped cylindrical shape with a forward section having an enlarged diameter and a rearward section with a reduced diameter, the forward section of the connector volume having a length that is more than half as long as the connector body in the forward-rearward direction. 10. The sealing enclosure of claim 6, wherein the fiber optic connector includes a connector body having a front end at which a ferrule is positioned, and wherein the plug section has a front end defining an inner diameter that is larger than a largest radial dimension defined by the fiber optic connector. 11. A sealing enclosure comprising:
a fiber optic connector adapted to be mounted on an end of a cable; an inner body having a connector volume, the fiber optic connector being received within the connector volume, the inner body including a forward facing plug end that is open in a forward direction, the inner body including at least one anti-rotation element; an outer body surrounding the inner body and being movable relative thereto, a forward section of the outer body having a locking element of the bayonet type, the locking element provided on an interior side of the outer body; a mating section provided with at least one locking element that matches the at least one locking element of the outer body to enable a bayonet-type locking with the outer body, the mating section also including an anti-rotation element that mates with the anti-rotation element of the inner body to prevent relative rotation between the inner body and the mating section, the mating section including an annular collar having an annular seal on its outer circumference for providing a seal between the mating section and the outer body; a spring that is compressed axially between the outer and inner bodies during the bayonet type locking between the outer body and the mating section; and the outer body including an inner shoulder that faces in a forward direction, the inner shoulder opposing a rearwardly facing surface of the inner body, the forward section of the outer body having a forward end positioned a first axial distance in front of the inner shoulder, a rearward section of the outer body defining a rear end positioned a second axial distance behind the inner shoulder, and the second axial distance having a greater magnitude than the first axial distance. 12. The sealing enclosure of claim 11, wherein the fiber optic connector includes a connector body having a front end at which a ferrule is supported, and wherein the inner body extends over at least almost the complete axial length of the fiber optic connector in a forward-rearward direction. 13. The sealing enclosure of claim 11, wherein connector volume has a cylindrical shape adjacent the forward facing plug end of the inner body. 14. The sealing enclosure of claim 11, wherein the fiber optic connector includes a connector body having a front end at which a ferrule is positioned, wherein the connector volume has a stepped cylindrical shape with a forward section of the connector volume having an enlarged diameter and a rearward section of the connector volume having a reduced diameter, the forward section of the connector volume having a length that is more than half as long as the connector body in a forward-rearward direction. 15. The sealing enclosure of claim 11, wherein the fiber optic connector includes a connector body having a front end at which a ferrule is positioned, and wherein the inner body defines an inner diameter at a forward region of the control volume that is larger than a largest radial dimension defined by the fiber optic connector such that a radial spacing exists between an interior surface of the inner body and the fiber optic connector. 16. The sealing enclosure of claim 11, wherein an annular seal positioned rearward of the spring element is provided for sealing between the inner body and the outer body, and wherein the spring element has an outer diameter that is larger than an outer diameter of the annular seal. 17. The sealing enclosure of claim 11, wherein the spring element is positioned radially between the outer body and the inner body, and wherein the inner body defines an inner diameter adjacent the forward facing plug end that is larger than an outer diameter of the inner body at the spring element. 18. The sealing enclosure of claim 11, wherein the rearward section of the outer body defines an inner cylindrical guide surface having at least a portion positioned at least a third axial distance behind the inner shoulder, the third axial distance being greater than the first axial distance and less than the second axial distance. 19. The sealing enclosure of claim 11, wherein the rearward section of the outer body includes a cylindrical outer gipping surface having a gripping structure, at least a portion of the cylindrical outer gripping surface being positioned at least a third axial distance behind the inner shoulder, the third axial distance being greater than the first axial distance and less than the second axial distance. 20. The sealing enclosure of claim 19, wherein the front section includes a cylindrical outer surface defining an outer diameter that is enlarged as compared to an outer diameter of the cylindrical outer gripping surface of the rear section. 21. The sealing enclosure of claim 20, wherein the outer body defines a tapered diameter transition at a region between the cylindrical outer surface of the front section and the cylindrical outer gripping surface of the rear section. 22. The sealing enclosure of claim 18, wherein the inner body includes a forward section in which the connector volume is cylindrical and has a first diameter, wherein the inner body includes a rearward section having an outer cylindrical guide surface that opposes the inner cylindrical guide surface of rearward section of the outer body, and wherein the outer cylindrical guide surface defines a second diameter that is smaller than the first diameter. 23. A sealing enclosure comprising:
a connector adapted to be mounted on an end of a cable; an inner body having a connector volume, the connector being received within the connector volume, the inner body including a plug section having a forward facing plug face that is open in a forward direction, the plug section including at least one positive locking element which has two opposing stop surfaces pointing in opposite circumferential directions about the cable and the plug face; an outer body surrounding the inner body and being movable relative thereto; and a mating section including at least one positive locking element that engages with the at least one positive locking element of the plug section to prevent relative rotation between the inner body and the mating section, the mating section including an annular collar forming support for a gasket on its outer circumference, the outer body including a sealing surface that engages the gasket to provide a barrier against dirt and moisture entering the connector volume, the inner body including a rearwardly facing stop surface that limits a depth of insertion of the inner body into the outer body, the outer body including an inner abutment surface disposed between a forward end and a rearward end of the outer body, the inner abutment surface facing the stop surface of the inner body in an axial direction; the outer body has a locking element of the bayonet type at a forward end of the outer body, the locking element is provided on an interior side of the outer body facing the plug section; that the mating section is provided with at least one locking element that matches the locking element of the outer body to enable a bayonet type locking with the outer body; that the sealing enclosure includes a spring that is compressed axially between the outer and inner bodies during the bayonet type locking between the outer body and the mating section; and that the rearward end of the outer body is positioned a greater axial distance from the abutment surface than the forward end of the outer body. 24. The sealing enclosure of claim 23, wherein the outer body includes an enlarged forward section that accommodates the plug section, wherein the outer body includes a rear cylindrical section having a reduced outer diameter as compared to the enlarged forward section of the outer body, the rear cylindrical section of the outer body including an outer gripping structure having at least a portion positioned a greater axial distance from the abutment surface than the forward end of the outer body. 25. The sealing enclosure of claim 23, further comprising a seal positioned rearward of the spring for sealing a space between the inner body and the outer body. 26. The sealing enclosure of claim 23, wherein the inner body is received in the outer body by sliding the latter over the former, wherein the outer body includes an enlarged forward section that accommodates the plug section, wherein the outer body includes a cylindrical inner guiding surface having a reduced inner diameter as compared to the enlarged forward section of the outer body, the cylindrical inner guiding surface having at least a portion positioned a greater axial distance from the abutment surface than the forward end of the outer body. 27. The sealing enclosure of claim 26, wherein the inner body includes a support section that extends in the forward-rearward direction, and wherein the inner guiding surface slides along the support section when the inner body is received in the outer body. 28. The sealing enclosure of claim 23, wherein the connector volume has an inner width at the forward facing plug face that is larger than a largest radial dimension of the connector perpendicular to the forward direction. 29. The sealing enclosure of any one of claims 23, further comprising a radially compressed seal adjacent the rearward end of the outer body. | 2,800 |
11,339 | 11,339 | 14,600,107 | 2,865 | A remote monitoring mobile application may be installed and executed on a remote interface device. By streaming a log of the treatment data, attending HCPs may have continual access to the dialysis machine and patient data at the treatment center. In various embodiments, the data may be streamed to a server accessible by the remote interface device and/or directly to the remote interface device. The operator is able to log into the application on the remote interface device to access dialysis machine data and/or patient data during treatment. The HCP, through the application, is able to monitor the data at the treatment center and may set “soft” limits to warn the HCP of problems during the treatment before alarms or other treatment-disruptive actions occur at the dialysis machine. The remote monitoring mobile application may be software downloaded from a network and/or otherwise installed on the remote interface device. | 1. A method for remotely monitoring a medical treatment, comprising:
executing a remote monitoring application on a remote interface device; receiving data, using the remote monitoring application, concerning the medical treatment being performed with a medical device; setting a first limit using the remote monitoring application, wherein the first limit is a limit for a treatment parameter measuring during the medical treatment that is reached before a second limit set at the medical device for the treatment parameter is reached; indicating with an indicator on the remote interface device when the first limit is reached; and in response to the indicator on the remote interface device, initiating a remedial action in connection with the treatment parameter before the second limit is reached at the medical device. 2. The method according to claim 1, wherein the medical treatment is a dialysis treatment, and wherein the medical device is a dialysis machine. 3. The method according to claim 1, wherein the second limit, when reached, causes an alarm or a suspension of the medical treatment at the medical device. 4. The method according to claim 1, wherein the remote interface device is portable or wearable by a user. 5. The method according to claim 4, wherein the remote interface device is a smart phone or a tablet device. 6. The method according to claim 4, wherein the remote interface device is worn by the user. 7. The method according to claim 1, wherein the first limit is set on the remote monitoring application by a user according to a preference of the user. 8. The method according to claim 1, wherein the data concerning the medical treatment is streamed from the medical device directly to the remote interface device. 9. The method according to claim 1, wherein the data concerning the medical treatment is first stored on a server, and wherein the remote interface device accesses the data via the server. 10. The method according to claim 1, wherein the data concerning the medical treatment is streamed from the medical device or stored on a server, and wherein the data is encrypted. 11. The method according to claim 1, wherein executing the remote monitoring application on the remote interface device includes requiring authorized access credentials from a user to log into the remote monitoring application. 12. A non-transitory computer-readable medium storing software for remotely monitoring a medical treatment, the software comprising:
executable code for a remote monitoring application installed on a remote interface device; executable code that receives data, using the remote monitoring application, concerning the medical treatment being performed with a medical device; executable code that enables setting a first limit using the remote monitoring application, wherein the first limit is a limit for a treatment parameter measuring during the medical treatment that is reached before a second limit set at the medical device for the treatment parameter is reached; executable code that indicates with an indicator on the remote interface device when the first limit is reached; and executable code that, in response to the indicator on the remote interface device, enables initiating of a remedial action in connection with the treatment parameter before the second limit is reached at the medical device. 13. The non-transitory computer-readable medium according to claim 12, wherein the medical treatment is a dialysis treatment, and wherein the medical device is a dialysis machine. 14. The non-transitory computer-readable medium according to claim 12, wherein the second limit, when reached, causes an alarm or a suspension of the medical treatment at the medical device. 15. The non-transitory computer-readable medium according to claim 12, wherein the remote interface device is portable or wearable by a user. 16. The non-transitory computer-readable medium according to claim 15, wherein the remote interface device is a smart phone or a tablet device. 17. The non-transitory computer-readable medium according to claim 15, wherein the remote interface device is worn by the user. 18. The non-transitory computer-readable medium according to claim 12, wherein the first limit is set on the remote monitoring application by a user according to a preference of the user. 19. The non-transitory computer-readable medium according to claim 12, wherein the data concerning the medical treatment is streamed from the medical device directly to the remote interface device. 20. The non-transitory computer-readable medium according to claim 12, wherein the data concerning the medical treatment is first stored on a server, and wherein the remote interface device accesses the data via the server. 21. The non-transitory computer-readable medium according to claim 12, wherein the data concerning the medical treatment is streamed from the medical device or stored on a server, and wherein the data is encrypted. 22. The non-transitory computer-readable medium according to claim 12, wherein the executable code for the remote monitoring application on the remote interface device includes executable code that requires authorized access credentials from a user to log into the remote monitoring application. 23. A system for remote monitoring of a medical treatment, comprising:
a medical device; a remote interface device; a non-transitory computer-readable medium storing software for remotely monitoring the medical treatment, the software being executed by at least one processor of the remote interface device and including:
executable code for a remote monitoring application installed on the remote interface device;
executable code that receives data, using the remote monitoring application, concerning the medical treatment being performed with the medical device;
executable code that enables setting a first limit using the remote monitoring application, wherein the first limit is a limit for a treatment parameter measuring during the medical treatment that is reached before a second limit set at the medical device for the treatment parameter is reached;
executable code that indicates with an indicator on the remote interface device when the first limit is reached; and
executable code that, in response to the indicator on the remote interface device, enables initiating of a remedial action in connection with the treatment parameter before the second limit is reached at the medical device. 24. The system according to claim 23, wherein the medical treatment is a dialysis treatment, wherein the medical device is a dialysis machine. 25. The system according to claim 23, wherein the second limit, when reached, causes an alarm or a suspension of the dialysis treatment at the dialysis machine, and wherein the first limit is set on the remote monitoring application by a user according to a preference of the user. | A remote monitoring mobile application may be installed and executed on a remote interface device. By streaming a log of the treatment data, attending HCPs may have continual access to the dialysis machine and patient data at the treatment center. In various embodiments, the data may be streamed to a server accessible by the remote interface device and/or directly to the remote interface device. The operator is able to log into the application on the remote interface device to access dialysis machine data and/or patient data during treatment. The HCP, through the application, is able to monitor the data at the treatment center and may set “soft” limits to warn the HCP of problems during the treatment before alarms or other treatment-disruptive actions occur at the dialysis machine. The remote monitoring mobile application may be software downloaded from a network and/or otherwise installed on the remote interface device.1. A method for remotely monitoring a medical treatment, comprising:
executing a remote monitoring application on a remote interface device; receiving data, using the remote monitoring application, concerning the medical treatment being performed with a medical device; setting a first limit using the remote monitoring application, wherein the first limit is a limit for a treatment parameter measuring during the medical treatment that is reached before a second limit set at the medical device for the treatment parameter is reached; indicating with an indicator on the remote interface device when the first limit is reached; and in response to the indicator on the remote interface device, initiating a remedial action in connection with the treatment parameter before the second limit is reached at the medical device. 2. The method according to claim 1, wherein the medical treatment is a dialysis treatment, and wherein the medical device is a dialysis machine. 3. The method according to claim 1, wherein the second limit, when reached, causes an alarm or a suspension of the medical treatment at the medical device. 4. The method according to claim 1, wherein the remote interface device is portable or wearable by a user. 5. The method according to claim 4, wherein the remote interface device is a smart phone or a tablet device. 6. The method according to claim 4, wherein the remote interface device is worn by the user. 7. The method according to claim 1, wherein the first limit is set on the remote monitoring application by a user according to a preference of the user. 8. The method according to claim 1, wherein the data concerning the medical treatment is streamed from the medical device directly to the remote interface device. 9. The method according to claim 1, wherein the data concerning the medical treatment is first stored on a server, and wherein the remote interface device accesses the data via the server. 10. The method according to claim 1, wherein the data concerning the medical treatment is streamed from the medical device or stored on a server, and wherein the data is encrypted. 11. The method according to claim 1, wherein executing the remote monitoring application on the remote interface device includes requiring authorized access credentials from a user to log into the remote monitoring application. 12. A non-transitory computer-readable medium storing software for remotely monitoring a medical treatment, the software comprising:
executable code for a remote monitoring application installed on a remote interface device; executable code that receives data, using the remote monitoring application, concerning the medical treatment being performed with a medical device; executable code that enables setting a first limit using the remote monitoring application, wherein the first limit is a limit for a treatment parameter measuring during the medical treatment that is reached before a second limit set at the medical device for the treatment parameter is reached; executable code that indicates with an indicator on the remote interface device when the first limit is reached; and executable code that, in response to the indicator on the remote interface device, enables initiating of a remedial action in connection with the treatment parameter before the second limit is reached at the medical device. 13. The non-transitory computer-readable medium according to claim 12, wherein the medical treatment is a dialysis treatment, and wherein the medical device is a dialysis machine. 14. The non-transitory computer-readable medium according to claim 12, wherein the second limit, when reached, causes an alarm or a suspension of the medical treatment at the medical device. 15. The non-transitory computer-readable medium according to claim 12, wherein the remote interface device is portable or wearable by a user. 16. The non-transitory computer-readable medium according to claim 15, wherein the remote interface device is a smart phone or a tablet device. 17. The non-transitory computer-readable medium according to claim 15, wherein the remote interface device is worn by the user. 18. The non-transitory computer-readable medium according to claim 12, wherein the first limit is set on the remote monitoring application by a user according to a preference of the user. 19. The non-transitory computer-readable medium according to claim 12, wherein the data concerning the medical treatment is streamed from the medical device directly to the remote interface device. 20. The non-transitory computer-readable medium according to claim 12, wherein the data concerning the medical treatment is first stored on a server, and wherein the remote interface device accesses the data via the server. 21. The non-transitory computer-readable medium according to claim 12, wherein the data concerning the medical treatment is streamed from the medical device or stored on a server, and wherein the data is encrypted. 22. The non-transitory computer-readable medium according to claim 12, wherein the executable code for the remote monitoring application on the remote interface device includes executable code that requires authorized access credentials from a user to log into the remote monitoring application. 23. A system for remote monitoring of a medical treatment, comprising:
a medical device; a remote interface device; a non-transitory computer-readable medium storing software for remotely monitoring the medical treatment, the software being executed by at least one processor of the remote interface device and including:
executable code for a remote monitoring application installed on the remote interface device;
executable code that receives data, using the remote monitoring application, concerning the medical treatment being performed with the medical device;
executable code that enables setting a first limit using the remote monitoring application, wherein the first limit is a limit for a treatment parameter measuring during the medical treatment that is reached before a second limit set at the medical device for the treatment parameter is reached;
executable code that indicates with an indicator on the remote interface device when the first limit is reached; and
executable code that, in response to the indicator on the remote interface device, enables initiating of a remedial action in connection with the treatment parameter before the second limit is reached at the medical device. 24. The system according to claim 23, wherein the medical treatment is a dialysis treatment, wherein the medical device is a dialysis machine. 25. The system according to claim 23, wherein the second limit, when reached, causes an alarm or a suspension of the dialysis treatment at the dialysis machine, and wherein the first limit is set on the remote monitoring application by a user according to a preference of the user. | 2,800 |
11,340 | 11,340 | 15,122,854 | 2,846 | A commutation circuit includes a coil connected to an H bridge, the H bridge including four main switches for reversing polarity and a resulting coil current in the coil. The commutation circuit further includes a voltage source configured to generate a bypass current, and at least one auxiliary switch for controlling the bypass current to thereby decrease a switch current through at least one of the main switches. By generating an appropriate bypass current with help of a voltage source, a switch current through a desired main switch in a leading state can be decreased and eventually brought to zero. Zero current in its turn enables the use of thyristors as main switches as it results in the thyristors to be turned off automatically. Furthermore, decreased switch current at the switching moment reduces switching losses even in different types of switches such as GTOs and IGBTs. | 1. A commutation circuit comprising:
a coil connected to an H bridge, the H bridge comprising four main switches for reversing polarity and a resulting coil current in the coil, a voltage source configured to generate a bypass current, and at least one auxiliary switch for controlling the bypass current to thereby decrease a switch current through at least one of the main switches, wherein the commutation circuit is configured to decrease the switch current through at least one of the main switches without turning on any of the remaining main switches. 2. The commutation circuit according to claim 1, wherein the voltage source is configured to generate a bypass current to thereby bring the switch current to zero. 3. The commutation circuit according to claim 1, wherein the voltage source comprises a capacitor. 4. The commutation circuit according to claim 3, wherein the coil current at least partially results from a cell current generated by a current source, and the cell current is furthermore used to pre-charge the capacitor. 5. The commutation circuit according to claim 1, wherein at least one of the main switches comprises a thyristor. 6. The commutation circuit according to claim 1, wherein all the main switches are thyristors. 7. The commutation circuit according to claim 1, wherein all the auxiliary switches are thyristors. 8. The commutation circuit according to claim 1, wherein the voltage source is connected in parallel with at least one of the main switches. 9. The commutation circuit according to claim 1, wherein the voltage source is connected in series with the coil. 10. An electrical machine comprising a commutation circuit including:
a coil connected to an H bridge, the H bridge comprising four main switches for reversing polarity and a resulting coil current in the coil, a voltage source configured to generate a bypass current, and at least one auxiliary switch for controlling the bypass current to thereby decrease a switch current through at least one of the main switches, wherein the commutation circuit is configured to decrease the switch current through at least one of the main switches without turning on any of the remaining main switches. 11. A method for reversing a current direction in a coil, the method comprising the steps of:
providing a coil connected to an H bridge, the H bridge comprising four main switches; and generating a bypass current and controlling it to thereby decrease a switch current through at least one of the main switches without turning on any of the remaining main switches. 12. The method according to claim 11, wherein the bypass current is configured to bring the switch current to zero. 13. The method according to claim 11, wherein the bypass current is generated by means of a capacitor. 14. The method according to claim 13, wherein the method further comprises the steps of:
providing a current source for feeding the coil with a cell current; and pre-charging the capacitor with the cell current. 15. The method according to claim 12, wherein the bypass current is generated by means of a capacitor. 16. The commutation circuit according to claim 2, wherein the voltage source comprises a capacitor. 17. The commutation circuit according to claim 2, wherein at least one of the main switches comprises a thyristor. 18. The commutation circuit according to claim 3, wherein at least one of the main switches comprises a thyristor. 19. The commutation circuit according to claim 4, wherein at least one of the main switches comprises a thyristor. | A commutation circuit includes a coil connected to an H bridge, the H bridge including four main switches for reversing polarity and a resulting coil current in the coil. The commutation circuit further includes a voltage source configured to generate a bypass current, and at least one auxiliary switch for controlling the bypass current to thereby decrease a switch current through at least one of the main switches. By generating an appropriate bypass current with help of a voltage source, a switch current through a desired main switch in a leading state can be decreased and eventually brought to zero. Zero current in its turn enables the use of thyristors as main switches as it results in the thyristors to be turned off automatically. Furthermore, decreased switch current at the switching moment reduces switching losses even in different types of switches such as GTOs and IGBTs.1. A commutation circuit comprising:
a coil connected to an H bridge, the H bridge comprising four main switches for reversing polarity and a resulting coil current in the coil, a voltage source configured to generate a bypass current, and at least one auxiliary switch for controlling the bypass current to thereby decrease a switch current through at least one of the main switches, wherein the commutation circuit is configured to decrease the switch current through at least one of the main switches without turning on any of the remaining main switches. 2. The commutation circuit according to claim 1, wherein the voltage source is configured to generate a bypass current to thereby bring the switch current to zero. 3. The commutation circuit according to claim 1, wherein the voltage source comprises a capacitor. 4. The commutation circuit according to claim 3, wherein the coil current at least partially results from a cell current generated by a current source, and the cell current is furthermore used to pre-charge the capacitor. 5. The commutation circuit according to claim 1, wherein at least one of the main switches comprises a thyristor. 6. The commutation circuit according to claim 1, wherein all the main switches are thyristors. 7. The commutation circuit according to claim 1, wherein all the auxiliary switches are thyristors. 8. The commutation circuit according to claim 1, wherein the voltage source is connected in parallel with at least one of the main switches. 9. The commutation circuit according to claim 1, wherein the voltage source is connected in series with the coil. 10. An electrical machine comprising a commutation circuit including:
a coil connected to an H bridge, the H bridge comprising four main switches for reversing polarity and a resulting coil current in the coil, a voltage source configured to generate a bypass current, and at least one auxiliary switch for controlling the bypass current to thereby decrease a switch current through at least one of the main switches, wherein the commutation circuit is configured to decrease the switch current through at least one of the main switches without turning on any of the remaining main switches. 11. A method for reversing a current direction in a coil, the method comprising the steps of:
providing a coil connected to an H bridge, the H bridge comprising four main switches; and generating a bypass current and controlling it to thereby decrease a switch current through at least one of the main switches without turning on any of the remaining main switches. 12. The method according to claim 11, wherein the bypass current is configured to bring the switch current to zero. 13. The method according to claim 11, wherein the bypass current is generated by means of a capacitor. 14. The method according to claim 13, wherein the method further comprises the steps of:
providing a current source for feeding the coil with a cell current; and pre-charging the capacitor with the cell current. 15. The method according to claim 12, wherein the bypass current is generated by means of a capacitor. 16. The commutation circuit according to claim 2, wherein the voltage source comprises a capacitor. 17. The commutation circuit according to claim 2, wherein at least one of the main switches comprises a thyristor. 18. The commutation circuit according to claim 3, wherein at least one of the main switches comprises a thyristor. 19. The commutation circuit according to claim 4, wherein at least one of the main switches comprises a thyristor. | 2,800 |
11,341 | 11,341 | 14,984,827 | 2,875 | A luminaire having a housing, a control assembly positioned in the housing, a cover connected to the housing, and a light emitter. Different covers, control components, and light emitters can be used with the luminaire to create a desired appearance and light output. | 1. A luminaire comprising:
a base; a light support extending from the base having a mounting section; a first set of fins in thermal communication with the mounting section; and a second set of fins intersecting the first set of fins and in thermal communication with the mounting section. 2. The luminaire of claim 2, wherein the first and second set of fins are in contact with the mounting section and dissipate heat from the LED board. 3. The luminaire of claim 1, wherein the second set of fins is substantially orthogonal to the first set of fins. 4. The luminaire of claim 1, wherein the first set of fins includes a first section, a second section, and a third section, and an upper edge of the second section is spaced below an upper edge of the first and third sections. 5. The luminaire of claim 1, wherein at least one of the first set of fins extends beyond the mounting section. 6. The luminaire of claim 7, wherein at least one of the second set of fins extends beyond the mounting section. 7. The luminaire of claim 1, wherein a plurality of gaps are positioned between the base and the light support. 8. The luminaire of claim 1, wherein a control assembly is positioned in the base. 9. The luminaire of claim 1, wherein a cover is connected to the base. 10. A luminaire comprising:
a housing; a control assembly positioned in the housing; a cover connected to the housing having a mounting section and a chamber including a heat fin in thermal communication with the mounting section; and a light assembly connected to the mounting section and operatively connected to the control assembly. 11. The luminaire of claim 10, wherein the housing includes a conductor opening. 12. The luminaire of claim 11, wherein a recessed is formed around the conductor opening and a conductor gasket is positioned in recess. 13. The luminaire of claim 10, wherein the control assembly includes a photo sensor and an occupancy sensor. 14. The luminaire of claim 10, wherein the control assembly includes a driver. 15. The luminaire of claim 10, wherein the control assembly includes a first driver and a second driver. 16. The luminaire of claim 10, wherein the cover includes a mounting flange. 17. A luminaire comprising:
a housing; a control assembly positioned in the housing; a cover connected to the housing; a light assembly operatively connected to the control assembly; and a mounting assembly including a mounting plate connectable to a surface and a mounting bracket connected to the housing. 18. The luminaire of claim 17, wherein the mounting plate includes an angled wall and the mounting bracket includes an angled tab for engaging the angled wall. 19. The luminaire of claim 17, wherein a gasket is positioned between the mounting plate and the surface. 20. The luminaire of claim 17, wherein the housing includes a conductor opening and the conductor opening is aligned with an opening in the mounting plate. | A luminaire having a housing, a control assembly positioned in the housing, a cover connected to the housing, and a light emitter. Different covers, control components, and light emitters can be used with the luminaire to create a desired appearance and light output.1. A luminaire comprising:
a base; a light support extending from the base having a mounting section; a first set of fins in thermal communication with the mounting section; and a second set of fins intersecting the first set of fins and in thermal communication with the mounting section. 2. The luminaire of claim 2, wherein the first and second set of fins are in contact with the mounting section and dissipate heat from the LED board. 3. The luminaire of claim 1, wherein the second set of fins is substantially orthogonal to the first set of fins. 4. The luminaire of claim 1, wherein the first set of fins includes a first section, a second section, and a third section, and an upper edge of the second section is spaced below an upper edge of the first and third sections. 5. The luminaire of claim 1, wherein at least one of the first set of fins extends beyond the mounting section. 6. The luminaire of claim 7, wherein at least one of the second set of fins extends beyond the mounting section. 7. The luminaire of claim 1, wherein a plurality of gaps are positioned between the base and the light support. 8. The luminaire of claim 1, wherein a control assembly is positioned in the base. 9. The luminaire of claim 1, wherein a cover is connected to the base. 10. A luminaire comprising:
a housing; a control assembly positioned in the housing; a cover connected to the housing having a mounting section and a chamber including a heat fin in thermal communication with the mounting section; and a light assembly connected to the mounting section and operatively connected to the control assembly. 11. The luminaire of claim 10, wherein the housing includes a conductor opening. 12. The luminaire of claim 11, wherein a recessed is formed around the conductor opening and a conductor gasket is positioned in recess. 13. The luminaire of claim 10, wherein the control assembly includes a photo sensor and an occupancy sensor. 14. The luminaire of claim 10, wherein the control assembly includes a driver. 15. The luminaire of claim 10, wherein the control assembly includes a first driver and a second driver. 16. The luminaire of claim 10, wherein the cover includes a mounting flange. 17. A luminaire comprising:
a housing; a control assembly positioned in the housing; a cover connected to the housing; a light assembly operatively connected to the control assembly; and a mounting assembly including a mounting plate connectable to a surface and a mounting bracket connected to the housing. 18. The luminaire of claim 17, wherein the mounting plate includes an angled wall and the mounting bracket includes an angled tab for engaging the angled wall. 19. The luminaire of claim 17, wherein a gasket is positioned between the mounting plate and the surface. 20. The luminaire of claim 17, wherein the housing includes a conductor opening and the conductor opening is aligned with an opening in the mounting plate. | 2,800 |
11,342 | 11,342 | 15,447,651 | 2,853 | where Po is 3.14(Co)(Do2)/4,000,000. | 1. A lithographic printing plate precursor comprising:
a substrate having a planar surface, and a radiation-sensitive imageable layer disposed over the planar surface of the substrate, wherein the substrate comprises: an aluminum-containing plate having a grained and etched planar surface; an inner aluminum oxide layer disposed on the grained and etched planar surface, the inner aluminum oxide layer: having an average dry thickness (Ti) of at least 650 run and up to and including 3,000 nm; and comprising a multiplicity of inner micropores having an average inner micropore diameter (Di) of less than or equal to 15 nm; an outer aluminum oxide layer disposed on the inner aluminum oxide layer, the outer aluminum oxide layer: comprising a multiplicity of outer micropores having an average outer micropore diameter (Do) of at least 15 nm and up to and including 30 nm; having an average dry thickness (To) of at least 130 nm and up to and including 650 nm; and having a micropore density (Co) of at least 500 micropores/μm2 and up to and including 3,000 micropores/μm2, wherein the ratio of the average outer micropore diameter (Do) to the average inner micropore diameter (Di) is greater than 1.1:1, and the average outer micropore diameter (Do) in nanometers and the micropore density (Co) in micropores/μm2, are further constrained by the porosity (Po) of the outer aluminum oxide layer according to the following equation:
0.3≤P o≤0.8
wherein Po is defined as 3.14(Co)(Do 2)/4,000,000; and
optionally a hydrophilic layer comprising one or more hydrophilic polymers, which hydrophilic layer is disposed on the outer aluminum oxide layer at a dry coverage of at least 0.0002 g/m2 and up to and including 0.1 g/m2. 2. The lithographic printing plate precursor of claim 1, wherein the outer aluminum oxide layer has an average dry thickness (To) of at least 150 nm and up to and including 400 nm. 3. The lithographic printing plate precursor of claim 1, wherein the inner aluminum oxide layer has an average dry thickness (Ti) of at least 700 nm and up to and including 1500 nm. 4. The lithographic printing plate precursor of claim 1, wherein the following equation holds:
0.3≤P o≤0.6. 5. The lithographic printing plate precursor of claim 1, wherein the ratio of the average outer micropore diameter (Do) to the average inner micropore diameter (Di) is at least 1.5:1. 6. The lithographic printing plate precursor of claim 1, further comprising the hydrophilic layer that comprises one or more water-soluble polymers, at least one of which water-soluble polymers comprises recurring units derived from either acrylic acid or methacrylic acid, or both acrylic acid and methacrylic acid. 7. The lithographic printing plate precursor of claim 1, wherein the radiation-sensitive imageable layer is sensitive to infrared radiation and comprises one or more infrared radiation absorbers. 8. The lithographic printing plate precursor of claim 1, wherein the radiation-sensitive imageable layer is positive-working and comprises one or more alkali-soluble polymers that are removable from the substrate upon exposure to radiation. 9. The lithographic printing plate precursor of claim 1, wherein the radiation-sensitive imageable layer is negative-working and comprises:
(a) one or more free radically polymerizable components; (b) an initiator composition that provides free radicals upon exposure of the radiation-sensitive imageable layer to radiation; (c) one or more radiation absorbers; and optionally, (d) a polymeric binder that is different from all of (a), (b), and (c). 10. The lithographic printing plate precursor of claim 9, wherein the radiation-sensitive imageable layer is infrared radiation-sensitive and the one or more radiation absorbers comprise one or more infrared radiation absorbers. 11. The lithographic printing plate precursor of claim 9, wherein the radiation-sensitive layer is negative-working and is on-press developable. 12. (canceled) 13. The lithographic printing plate precursor of claim 1 that is negative-working and further comprises a hydrophilic overcoat disposed over the radiation-sensitive imageable layer. 14. The lithographic printing plate precursor of claim 1, wherein:
the grained and etched planar surface of the aluminum-containing plate has been electrochemically grained and etched; the hydrophilic layer is present and disposed on the outer aluminum oxide layer at a dry coverage of at least 0.005 g/m2 and up to and including 0.08 g/m2, which hydrophilic layer comprises one or more hydrophilic polymers comprising recurring units derived at least in part from acrylic acid or methacrylic acid, or both; the radiation-sensitive imageable layer is a negative-working and on-press developable infrared radiation-sensitive imageable layer that is disposed on the hydrophilic layer, and comprises:
(a) one or more free radically polymerizable components;
(b) an initiator composition that provides free radicals upon exposure of the radiation-sensitive imageable layer to infrared radiation;
(c) one or more infrared radiation absorbers; and
(d) a particulate polymeric binder that is different from all of (a), (b), and (c);
the inner aluminum oxide layer has an average dry thickness (Ti) of at least 700 nm and up to and including 1,500 nm; the outer aluminum oxide layer has an average dry thickness (To) of at least 150 nm and up to and including 400 nm; and the ratio of the average outer micropore diameter (Do) to the average inner micropore diameter (Di) is at least 1.5:1 and he following equations holds:
0.3≤P o≤0.6. 15. A method for providing a lithographic printing plate, comprising:
imagewise exposing the lithographic printing plate precursor of claim 1 to imaging radiation to form an imagewise exposed imageable layer having exposed regions and non-exposed regions, and removing either the exposed regions or the non-exposed regions, but not both exposed regions and non-exposed regions, from the imagewise exposed imageable layer, to form a lithographic printing plate. 16. (canceled) 17. The method of claim 15, wherein the non-exposed regions in the imagewise exposed imageable layer are removed on-press using a lithographic printing ink, a fountain solution, or both the lithographic printing ink and the fountain solution. 18. The method of claim 15, wherein the imagewise exposing is carried out using infrared radiation. 19. A method for preparing a lithographic printing plate precursor, comprising, in order:
providing an aluminum-containing plate having an electrochemically or mechanically grained and etched planar surface;
subjecting the aluminum-containing plate to a first anodizing process to form an outer aluminum oxide layer on the electrochemically or mechanically grained and etched planar surface, the outer aluminum oxide layer: comprising a multiplicity of outer micropores having an average outer micropore diameter (Do) of at least 15 nm and up to and including 30 nm; having an average dry thickness (To) of at least 130 nm and up to and including 650 nm; and having a micropore density of at least 500 pores/μm2 and up to and including 3,000 micropores/μm2; wherein the average outer micropore diameter (Do) in nanometers and the micropore density (Co) in micropores/μm2, are further constrained by the porosity (Po) of the outer aluminum oxide layer according to the following equation:
0.3≤P o≤0.8
wherein Po is defined as 3.14(Co)(Do 2)/4,000,000;
rinsing the outer aluminum oxide layer;
subjecting the aluminum-containing plate to a second anodizing process to form an inner aluminum oxide layer underneath the outer aluminum oxide layer, the inner aluminum oxide layer having: an average dry thickness (Ti) of at least 650 nm and up to and including 3,000 nm; and comprising a multiplicity of inner micropores having an average inner micropore diameter (Di) of less than or equal to 15 nm, wherein the ratio of the average outer micropore diameter (Do) to the average inner micropore diameter (Di) is greater than 1.1:1;
rinsing the outer aluminum oxide layer and the inner aluminum oxide layer;
providing a hydrophilic layer comprising one or more hydrophilic polymers directly on the outer aluminum oxide layer at a dry coverage of at least 0.0002 g/m2 and up to and including 0.1 g/m2; and
forming a radiation-sensitive imageable layer directly on the hydrophilic layer. 20. The method of claim 19, wherein the first anodizing process is carried out using phosphoric acid, and the second anodizing process is carried out using sulfuric acid. 21. A lithographic printing plate precursor obtained from the method of claim 20. | where Po is 3.14(Co)(Do2)/4,000,000.1. A lithographic printing plate precursor comprising:
a substrate having a planar surface, and a radiation-sensitive imageable layer disposed over the planar surface of the substrate, wherein the substrate comprises: an aluminum-containing plate having a grained and etched planar surface; an inner aluminum oxide layer disposed on the grained and etched planar surface, the inner aluminum oxide layer: having an average dry thickness (Ti) of at least 650 run and up to and including 3,000 nm; and comprising a multiplicity of inner micropores having an average inner micropore diameter (Di) of less than or equal to 15 nm; an outer aluminum oxide layer disposed on the inner aluminum oxide layer, the outer aluminum oxide layer: comprising a multiplicity of outer micropores having an average outer micropore diameter (Do) of at least 15 nm and up to and including 30 nm; having an average dry thickness (To) of at least 130 nm and up to and including 650 nm; and having a micropore density (Co) of at least 500 micropores/μm2 and up to and including 3,000 micropores/μm2, wherein the ratio of the average outer micropore diameter (Do) to the average inner micropore diameter (Di) is greater than 1.1:1, and the average outer micropore diameter (Do) in nanometers and the micropore density (Co) in micropores/μm2, are further constrained by the porosity (Po) of the outer aluminum oxide layer according to the following equation:
0.3≤P o≤0.8
wherein Po is defined as 3.14(Co)(Do 2)/4,000,000; and
optionally a hydrophilic layer comprising one or more hydrophilic polymers, which hydrophilic layer is disposed on the outer aluminum oxide layer at a dry coverage of at least 0.0002 g/m2 and up to and including 0.1 g/m2. 2. The lithographic printing plate precursor of claim 1, wherein the outer aluminum oxide layer has an average dry thickness (To) of at least 150 nm and up to and including 400 nm. 3. The lithographic printing plate precursor of claim 1, wherein the inner aluminum oxide layer has an average dry thickness (Ti) of at least 700 nm and up to and including 1500 nm. 4. The lithographic printing plate precursor of claim 1, wherein the following equation holds:
0.3≤P o≤0.6. 5. The lithographic printing plate precursor of claim 1, wherein the ratio of the average outer micropore diameter (Do) to the average inner micropore diameter (Di) is at least 1.5:1. 6. The lithographic printing plate precursor of claim 1, further comprising the hydrophilic layer that comprises one or more water-soluble polymers, at least one of which water-soluble polymers comprises recurring units derived from either acrylic acid or methacrylic acid, or both acrylic acid and methacrylic acid. 7. The lithographic printing plate precursor of claim 1, wherein the radiation-sensitive imageable layer is sensitive to infrared radiation and comprises one or more infrared radiation absorbers. 8. The lithographic printing plate precursor of claim 1, wherein the radiation-sensitive imageable layer is positive-working and comprises one or more alkali-soluble polymers that are removable from the substrate upon exposure to radiation. 9. The lithographic printing plate precursor of claim 1, wherein the radiation-sensitive imageable layer is negative-working and comprises:
(a) one or more free radically polymerizable components; (b) an initiator composition that provides free radicals upon exposure of the radiation-sensitive imageable layer to radiation; (c) one or more radiation absorbers; and optionally, (d) a polymeric binder that is different from all of (a), (b), and (c). 10. The lithographic printing plate precursor of claim 9, wherein the radiation-sensitive imageable layer is infrared radiation-sensitive and the one or more radiation absorbers comprise one or more infrared radiation absorbers. 11. The lithographic printing plate precursor of claim 9, wherein the radiation-sensitive layer is negative-working and is on-press developable. 12. (canceled) 13. The lithographic printing plate precursor of claim 1 that is negative-working and further comprises a hydrophilic overcoat disposed over the radiation-sensitive imageable layer. 14. The lithographic printing plate precursor of claim 1, wherein:
the grained and etched planar surface of the aluminum-containing plate has been electrochemically grained and etched; the hydrophilic layer is present and disposed on the outer aluminum oxide layer at a dry coverage of at least 0.005 g/m2 and up to and including 0.08 g/m2, which hydrophilic layer comprises one or more hydrophilic polymers comprising recurring units derived at least in part from acrylic acid or methacrylic acid, or both; the radiation-sensitive imageable layer is a negative-working and on-press developable infrared radiation-sensitive imageable layer that is disposed on the hydrophilic layer, and comprises:
(a) one or more free radically polymerizable components;
(b) an initiator composition that provides free radicals upon exposure of the radiation-sensitive imageable layer to infrared radiation;
(c) one or more infrared radiation absorbers; and
(d) a particulate polymeric binder that is different from all of (a), (b), and (c);
the inner aluminum oxide layer has an average dry thickness (Ti) of at least 700 nm and up to and including 1,500 nm; the outer aluminum oxide layer has an average dry thickness (To) of at least 150 nm and up to and including 400 nm; and the ratio of the average outer micropore diameter (Do) to the average inner micropore diameter (Di) is at least 1.5:1 and he following equations holds:
0.3≤P o≤0.6. 15. A method for providing a lithographic printing plate, comprising:
imagewise exposing the lithographic printing plate precursor of claim 1 to imaging radiation to form an imagewise exposed imageable layer having exposed regions and non-exposed regions, and removing either the exposed regions or the non-exposed regions, but not both exposed regions and non-exposed regions, from the imagewise exposed imageable layer, to form a lithographic printing plate. 16. (canceled) 17. The method of claim 15, wherein the non-exposed regions in the imagewise exposed imageable layer are removed on-press using a lithographic printing ink, a fountain solution, or both the lithographic printing ink and the fountain solution. 18. The method of claim 15, wherein the imagewise exposing is carried out using infrared radiation. 19. A method for preparing a lithographic printing plate precursor, comprising, in order:
providing an aluminum-containing plate having an electrochemically or mechanically grained and etched planar surface;
subjecting the aluminum-containing plate to a first anodizing process to form an outer aluminum oxide layer on the electrochemically or mechanically grained and etched planar surface, the outer aluminum oxide layer: comprising a multiplicity of outer micropores having an average outer micropore diameter (Do) of at least 15 nm and up to and including 30 nm; having an average dry thickness (To) of at least 130 nm and up to and including 650 nm; and having a micropore density of at least 500 pores/μm2 and up to and including 3,000 micropores/μm2; wherein the average outer micropore diameter (Do) in nanometers and the micropore density (Co) in micropores/μm2, are further constrained by the porosity (Po) of the outer aluminum oxide layer according to the following equation:
0.3≤P o≤0.8
wherein Po is defined as 3.14(Co)(Do 2)/4,000,000;
rinsing the outer aluminum oxide layer;
subjecting the aluminum-containing plate to a second anodizing process to form an inner aluminum oxide layer underneath the outer aluminum oxide layer, the inner aluminum oxide layer having: an average dry thickness (Ti) of at least 650 nm and up to and including 3,000 nm; and comprising a multiplicity of inner micropores having an average inner micropore diameter (Di) of less than or equal to 15 nm, wherein the ratio of the average outer micropore diameter (Do) to the average inner micropore diameter (Di) is greater than 1.1:1;
rinsing the outer aluminum oxide layer and the inner aluminum oxide layer;
providing a hydrophilic layer comprising one or more hydrophilic polymers directly on the outer aluminum oxide layer at a dry coverage of at least 0.0002 g/m2 and up to and including 0.1 g/m2; and
forming a radiation-sensitive imageable layer directly on the hydrophilic layer. 20. The method of claim 19, wherein the first anodizing process is carried out using phosphoric acid, and the second anodizing process is carried out using sulfuric acid. 21. A lithographic printing plate precursor obtained from the method of claim 20. | 2,800 |
11,343 | 11,343 | 15,076,600 | 2,853 | An embossing apparatus includes an embossing die that includes a printed relief pattern made up of multiple layers of a deposited material. A resilient surface presses media against the embossing die such that embossed features corresponding to the embossing die are formed in the media. A method for embossing media includes forming an embossing die by depositing multiple layers of ink on a impression layer to form a relief pattern and pressing media against the embossing die to transfer the relief image to the media. | 1. An embossing apparatus comprising:
an embossing die to receive a printed relief pattern made up of multiple layers of a deposited material; a resilient surface to deposit an ink image onto a media, the resilient surface for pressing the media against the embossing die such that embossed features corresponding to the printed relief pattern on the embossing die are formed in the media; and an alignment component in a printer for receiving a printed alignment image, the embossing die to be aligned with the alignment image on the alignment component of the printer. 2. The apparatus of claim 1, wherein the printer comprises an inline printer for depositing the multiple layers of deposited material. 3. The apparatus of claim 1, in which the printer comprises one of: an LEP printer and a xerographic printer. 4. The apparatus of claim 1, further comprising the printed relief pattern of multiple layers of deposited material. 5. The apparatus of claim 1, wherein the deposited material comprises multiple layers of ink. 6. The apparatus of claim 5, in which the multiple layers of ink comprise different types of ink. 7. The apparatus of claim 1, further comprising a first cylinder, the embossing die being disposed on an impression layer wrapped around the first cylinder. 8. The apparatus of claim 7, in which the resilient surface for pressing media against the embossing die comprises a resilient layer wrapped around a second cylinder, the resilient layer being positioned to press the media against the embossing die. 9. A printing system for simultaneous printing and embossing media comprising:
a first cylinder; an embossing die on the first cylinder, the embossing die to receive a printed relief pattern; an alignment device to align a printed alignment image on the first cylinder with the embossing die; a second cylinder forming a nip with the first cylinder such that media passing through the nip is pressed against the embossing die; and a printhead to deposit an ink image on the second cylinder, the second cylinder being configured to transfer the ink image to the media as the media passes through the nip. 10. The system of claim 9, in which the printhead to also deposit multiple layers of material to form the printed relief pattern on the embossing die. 11. The system of claim 9, further comprising the printed relief pattern, the printed relief pattern comprising multiple layers of ink. 12. The system of claim 11, in which the multiple layers of ink comprise different types of ink. 13. The system of claim 9, further comprising the printed relief pattern, wherein the printed relief pattern is placed on an impression layer of the embossing die by transfer of ink images from the second cylinder. 14. The system of claim 9, wherein the printhead is part of a printing device that comprises one of: a Liquid Electro Photographic (LEP) printer and a xerographic printer. 15. The system of claim 9, wherein the embossing die is disposed on an impression layer that is wrapped around the first cylinder. 16. The system of claim 9, further comprising a resilient surface on the second cylinder for pressing media against the embossing die. 17. The system of claim 16, wherein the resilient surface comprises a resilient layer wrapped around the second cylinder. 18. An embossing apparatus comprising:
an embossing die to receive a printed relief pattern made up of multiple stacked layers of a deposited material; a resilient surface to press a print medium against the embossing die such that embossed features corresponding to the printed relief pattern on the embossing die are formed in the print medium; and an alignment device to align a printed alignment image with the embossing die. 19. The apparatus of claim 18, further comprising a printhead to deposit the multiple layers of deposited material of the printed relief pattern and to print the alignment image. 20. The apparatus of claim 18, further comprising a first cylinder, the embossing die being disposed on an impression layer wrapped around the first cylinder. | An embossing apparatus includes an embossing die that includes a printed relief pattern made up of multiple layers of a deposited material. A resilient surface presses media against the embossing die such that embossed features corresponding to the embossing die are formed in the media. A method for embossing media includes forming an embossing die by depositing multiple layers of ink on a impression layer to form a relief pattern and pressing media against the embossing die to transfer the relief image to the media.1. An embossing apparatus comprising:
an embossing die to receive a printed relief pattern made up of multiple layers of a deposited material; a resilient surface to deposit an ink image onto a media, the resilient surface for pressing the media against the embossing die such that embossed features corresponding to the printed relief pattern on the embossing die are formed in the media; and an alignment component in a printer for receiving a printed alignment image, the embossing die to be aligned with the alignment image on the alignment component of the printer. 2. The apparatus of claim 1, wherein the printer comprises an inline printer for depositing the multiple layers of deposited material. 3. The apparatus of claim 1, in which the printer comprises one of: an LEP printer and a xerographic printer. 4. The apparatus of claim 1, further comprising the printed relief pattern of multiple layers of deposited material. 5. The apparatus of claim 1, wherein the deposited material comprises multiple layers of ink. 6. The apparatus of claim 5, in which the multiple layers of ink comprise different types of ink. 7. The apparatus of claim 1, further comprising a first cylinder, the embossing die being disposed on an impression layer wrapped around the first cylinder. 8. The apparatus of claim 7, in which the resilient surface for pressing media against the embossing die comprises a resilient layer wrapped around a second cylinder, the resilient layer being positioned to press the media against the embossing die. 9. A printing system for simultaneous printing and embossing media comprising:
a first cylinder; an embossing die on the first cylinder, the embossing die to receive a printed relief pattern; an alignment device to align a printed alignment image on the first cylinder with the embossing die; a second cylinder forming a nip with the first cylinder such that media passing through the nip is pressed against the embossing die; and a printhead to deposit an ink image on the second cylinder, the second cylinder being configured to transfer the ink image to the media as the media passes through the nip. 10. The system of claim 9, in which the printhead to also deposit multiple layers of material to form the printed relief pattern on the embossing die. 11. The system of claim 9, further comprising the printed relief pattern, the printed relief pattern comprising multiple layers of ink. 12. The system of claim 11, in which the multiple layers of ink comprise different types of ink. 13. The system of claim 9, further comprising the printed relief pattern, wherein the printed relief pattern is placed on an impression layer of the embossing die by transfer of ink images from the second cylinder. 14. The system of claim 9, wherein the printhead is part of a printing device that comprises one of: a Liquid Electro Photographic (LEP) printer and a xerographic printer. 15. The system of claim 9, wherein the embossing die is disposed on an impression layer that is wrapped around the first cylinder. 16. The system of claim 9, further comprising a resilient surface on the second cylinder for pressing media against the embossing die. 17. The system of claim 16, wherein the resilient surface comprises a resilient layer wrapped around the second cylinder. 18. An embossing apparatus comprising:
an embossing die to receive a printed relief pattern made up of multiple stacked layers of a deposited material; a resilient surface to press a print medium against the embossing die such that embossed features corresponding to the printed relief pattern on the embossing die are formed in the print medium; and an alignment device to align a printed alignment image with the embossing die. 19. The apparatus of claim 18, further comprising a printhead to deposit the multiple layers of deposited material of the printed relief pattern and to print the alignment image. 20. The apparatus of claim 18, further comprising a first cylinder, the embossing die being disposed on an impression layer wrapped around the first cylinder. | 2,800 |
11,344 | 11,344 | 14,181,085 | 2,846 | A multi-level converter includes a first multi-phase inverter and a second multi-phase inverter. The first multi-phase inverter includes a first direct current (DC) positive line, a first DC negative line, and a first plurality of alternating current (AC) lines. Each AC line of the first plurality of AC lines is configured to be connected to a single phase winding of an electric machine. Each single phase winding is connected to a common neutral connector in a Y-winding configuration or between a pair of single phase windings in a Δ-winding configuration. The second multi-phase inverter includes a second DC positive line, a second DC negative line, and a second plurality of AC lines and is connected in a similar manner to the first multi-phase inverter. The first DC negative line is electrically coupled to the second DC positive line to connect the first multi-phase inverter and the second multi-phase inverter in series. | 1. A converter comprising:
a first multi-phase inverter comprising
a first direct current (DC) positive line;
a first DC negative line; and
a first plurality of alternating current (AC) lines, wherein each AC line of the first plurality of AC lines is configured to be connected to a single phase winding of an electric machine, wherein each single phase winding is connected to a common neutral connector; and
a second multi-phase inverter comprising
a second DC positive line;
a second DC negative line; and
a second plurality of AC lines, wherein each AC line of the second plurality of AC lines is configured to be connected to a second single phase winding of the electric machine, wherein each second single phase winding is connected to a second common neutral connector, wherein the common neutral connector is different from the second common neutral connector;
wherein the first DC negative line is electrically coupled to the second DC positive line to connect the first multi-phase inverter and the second multi-phase inverter in series. 2. The converter of claim 1, wherein a number of the first plurality of AC lines is three, wherein a first AC line of the plurality of AC lines is configured to be connected to a first phase winding of the electric machine, wherein a second AC line of the plurality of AC lines is configured to be connected to a second phase winding of the electric machine, and wherein a third AC line of the plurality of AC lines is configured to be connected to a third phase winding of the electric machine. 3. The converter of claim 1, further comprising a first capacitor connected in parallel with the first multi-phase inverter on a DC side of the first multi-phase inverter, and a second capacitor connected in parallel with the second multi-phase inverter on a DC side of the second multi-phase inverter. 4. The converter of claim 1, wherein a phase of a current input to the second multi-phase inverter is shifted relative to a current input to the first multi-phase inverter. 5. The converter of claim 4, wherein the phase is determined based on a number of multi-phase inverters forming the converter. 6. The converter of claim 1, wherein the first multi-phase inverter is a first multilevel inverter, and the second multi-phase inverter is a second multilevel inverter. 7. The converter of claim 6, wherein the first multilevel inverter is a neutral point clamped inverter, and the second multilevel inverter is a neutral point clamped inverter. 8. The converter of claim 6, wherein the first multilevel inverter is a flying capacitor inverter, and the second multilevel inverter is a flying capacitor inverter. 9. The converter of claim 1, wherein the input voltage is connected between the first positive line and the second DC negative line. 10. The converter of claim 1 further comprising:
a third multi-phase inverter comprising
a third DC positive line;
a third DC negative line; and
a third plurality of AC lines, wherein each AC line of the third plurality of AC lines is configured to be connected to a third single phase winding of the electric machine, wherein each third single phase winding is connected to a third common neutral connector, wherein the third common neutral connector is different from the common neutral connector and the second common neutral connector;
wherein the second DC negative line is electrically coupled to the third DC positive line to connect the second multi-phase inverter and the third multi-phase inverter in series. 11. The converter of claim 10, wherein the input voltage is connected between the first positive line and the third DC negative line. 12. A converter comprising:
a first multi-phase inverter comprising
a first direct current (DC) positive line;
a first DC negative line; and
a first plurality of alternating current (AC) lines, wherein each AC line of the first plurality of AC lines is configured to be connected between a different pair of single phase windings of an electric machine; and
a second multi-phase inverter comprising
a second DC positive line;
a second DC negative line; and
a second plurality of AC lines, wherein each AC line of the second plurality of AC lines is configured to be connected between a different pair of second single phase windings of the electric machine;
wherein the first DC negative line is electrically coupled to the second DC positive line to connect the first multi-phase inverter and the second multi-phase inverter in series. 13. The converter of claim 12, wherein a number of the first plurality of AC lines is three, wherein a first AC line of the plurality of AC lines is configured to be connected between a first phase winding of the electric machine and a second phase winding of the electric machine, wherein a second AC line of the plurality of AC lines is configured to be connected between the first phase winding of the electric machine and a third phase winding of the electric machine, and wherein a third AC line of the plurality of AC lines is configured to be connected between the third phase winding of the electric machine and the second phase winding of the electric machine. 14. The converter of claim 12, further comprising a first capacitor connected in parallel with the first multi-phase inverter on a DC side of the first multi-phase inverter, and a second capacitor connected in parallel with the second multi-phase inverter on a DC side of the second multi-phase inverter. 15. The converter of claim 12, wherein a phase of a current input to the second multi-phase inverter is shifted relative to a current input to the first multi-phase inverter. 16. The converter of claim 12, wherein the first multi-phase inverter is a first multilevel inverter, and the second multi-phase inverter is a second multilevel inverter. 17. The converter of claim 16, wherein the first multilevel inverter is a neutral point clamped inverter, and the second multilevel inverter is a neutral point clamped inverter. 18. The converter of claim 16, wherein the first multilevel inverter is a flying capacitor inverter, and the second multilevel inverter is a flying capacitor inverter. 19. The converter of claim 12, wherein the input voltage is connected between the first positive line and the second DC negative line. 20. An electric machine system comprising:
a stator; a rotor configured to rotate; at least four windings, wherein a first winding is connected between a first-phase line and a first neutral connector, a second winding is connected between a second-phase line and the first neutral connector, a third winding is connected between a second first-phase line and a second neutral connector, a fourth winding is connected between a second second-phase line and the second neutral connector, wherein the first neutral connector is different from the second neutral connector; a first multi-phase inverter comprising
a first direct current (DC) positive line;
a first DC negative line; and
at least the first-phase line and the second-phase line; and
a second multi-phase inverter comprising
a second DC positive line;
a second DC negative line; and
at least the second first-phase line and the second second-phase line;
wherein the first DC negative line is electrically coupled to the second DC positive line such that the first multi-phase inverter and the second multi-phase inverter are connected in series. | A multi-level converter includes a first multi-phase inverter and a second multi-phase inverter. The first multi-phase inverter includes a first direct current (DC) positive line, a first DC negative line, and a first plurality of alternating current (AC) lines. Each AC line of the first plurality of AC lines is configured to be connected to a single phase winding of an electric machine. Each single phase winding is connected to a common neutral connector in a Y-winding configuration or between a pair of single phase windings in a Δ-winding configuration. The second multi-phase inverter includes a second DC positive line, a second DC negative line, and a second plurality of AC lines and is connected in a similar manner to the first multi-phase inverter. The first DC negative line is electrically coupled to the second DC positive line to connect the first multi-phase inverter and the second multi-phase inverter in series.1. A converter comprising:
a first multi-phase inverter comprising
a first direct current (DC) positive line;
a first DC negative line; and
a first plurality of alternating current (AC) lines, wherein each AC line of the first plurality of AC lines is configured to be connected to a single phase winding of an electric machine, wherein each single phase winding is connected to a common neutral connector; and
a second multi-phase inverter comprising
a second DC positive line;
a second DC negative line; and
a second plurality of AC lines, wherein each AC line of the second plurality of AC lines is configured to be connected to a second single phase winding of the electric machine, wherein each second single phase winding is connected to a second common neutral connector, wherein the common neutral connector is different from the second common neutral connector;
wherein the first DC negative line is electrically coupled to the second DC positive line to connect the first multi-phase inverter and the second multi-phase inverter in series. 2. The converter of claim 1, wherein a number of the first plurality of AC lines is three, wherein a first AC line of the plurality of AC lines is configured to be connected to a first phase winding of the electric machine, wherein a second AC line of the plurality of AC lines is configured to be connected to a second phase winding of the electric machine, and wherein a third AC line of the plurality of AC lines is configured to be connected to a third phase winding of the electric machine. 3. The converter of claim 1, further comprising a first capacitor connected in parallel with the first multi-phase inverter on a DC side of the first multi-phase inverter, and a second capacitor connected in parallel with the second multi-phase inverter on a DC side of the second multi-phase inverter. 4. The converter of claim 1, wherein a phase of a current input to the second multi-phase inverter is shifted relative to a current input to the first multi-phase inverter. 5. The converter of claim 4, wherein the phase is determined based on a number of multi-phase inverters forming the converter. 6. The converter of claim 1, wherein the first multi-phase inverter is a first multilevel inverter, and the second multi-phase inverter is a second multilevel inverter. 7. The converter of claim 6, wherein the first multilevel inverter is a neutral point clamped inverter, and the second multilevel inverter is a neutral point clamped inverter. 8. The converter of claim 6, wherein the first multilevel inverter is a flying capacitor inverter, and the second multilevel inverter is a flying capacitor inverter. 9. The converter of claim 1, wherein the input voltage is connected between the first positive line and the second DC negative line. 10. The converter of claim 1 further comprising:
a third multi-phase inverter comprising
a third DC positive line;
a third DC negative line; and
a third plurality of AC lines, wherein each AC line of the third plurality of AC lines is configured to be connected to a third single phase winding of the electric machine, wherein each third single phase winding is connected to a third common neutral connector, wherein the third common neutral connector is different from the common neutral connector and the second common neutral connector;
wherein the second DC negative line is electrically coupled to the third DC positive line to connect the second multi-phase inverter and the third multi-phase inverter in series. 11. The converter of claim 10, wherein the input voltage is connected between the first positive line and the third DC negative line. 12. A converter comprising:
a first multi-phase inverter comprising
a first direct current (DC) positive line;
a first DC negative line; and
a first plurality of alternating current (AC) lines, wherein each AC line of the first plurality of AC lines is configured to be connected between a different pair of single phase windings of an electric machine; and
a second multi-phase inverter comprising
a second DC positive line;
a second DC negative line; and
a second plurality of AC lines, wherein each AC line of the second plurality of AC lines is configured to be connected between a different pair of second single phase windings of the electric machine;
wherein the first DC negative line is electrically coupled to the second DC positive line to connect the first multi-phase inverter and the second multi-phase inverter in series. 13. The converter of claim 12, wherein a number of the first plurality of AC lines is three, wherein a first AC line of the plurality of AC lines is configured to be connected between a first phase winding of the electric machine and a second phase winding of the electric machine, wherein a second AC line of the plurality of AC lines is configured to be connected between the first phase winding of the electric machine and a third phase winding of the electric machine, and wherein a third AC line of the plurality of AC lines is configured to be connected between the third phase winding of the electric machine and the second phase winding of the electric machine. 14. The converter of claim 12, further comprising a first capacitor connected in parallel with the first multi-phase inverter on a DC side of the first multi-phase inverter, and a second capacitor connected in parallel with the second multi-phase inverter on a DC side of the second multi-phase inverter. 15. The converter of claim 12, wherein a phase of a current input to the second multi-phase inverter is shifted relative to a current input to the first multi-phase inverter. 16. The converter of claim 12, wherein the first multi-phase inverter is a first multilevel inverter, and the second multi-phase inverter is a second multilevel inverter. 17. The converter of claim 16, wherein the first multilevel inverter is a neutral point clamped inverter, and the second multilevel inverter is a neutral point clamped inverter. 18. The converter of claim 16, wherein the first multilevel inverter is a flying capacitor inverter, and the second multilevel inverter is a flying capacitor inverter. 19. The converter of claim 12, wherein the input voltage is connected between the first positive line and the second DC negative line. 20. An electric machine system comprising:
a stator; a rotor configured to rotate; at least four windings, wherein a first winding is connected between a first-phase line and a first neutral connector, a second winding is connected between a second-phase line and the first neutral connector, a third winding is connected between a second first-phase line and a second neutral connector, a fourth winding is connected between a second second-phase line and the second neutral connector, wherein the first neutral connector is different from the second neutral connector; a first multi-phase inverter comprising
a first direct current (DC) positive line;
a first DC negative line; and
at least the first-phase line and the second-phase line; and
a second multi-phase inverter comprising
a second DC positive line;
a second DC negative line; and
at least the second first-phase line and the second second-phase line;
wherein the first DC negative line is electrically coupled to the second DC positive line such that the first multi-phase inverter and the second multi-phase inverter are connected in series. | 2,800 |
11,345 | 11,345 | 14,994,295 | 2,894 | A method for use in improving marine seismic data quality includes: designing a filter for suppressing the effect of a ghost reflection in a set of stacked, marine seismic data representative of a subterranean formation, the filter compensating for amplitude due to the presence of the ghost reflection separately from the phase due to the presence of the ghost reflection; and applying the filter to the seismic data to suppress the effect of ghost reflection. The designing includes: iteratively defining at least one parameter of the filter and applying the defined filter to the seismic data; evaluating each iteration of the filter's application to at least a subset of the seismic data; and selecting a defined filter from one of the evaluated iterations. | 1. A method, comprising:
designing a filter for suppressing the effect of a ghost reflection in a set of stacked, marine seismic data representative of a subterranean formation, the filter compensating for amplitude due to the presence of the ghost reflection separately from the phase due to the presence of the ghost reflection, the designing including:
iteratively defining at least one parameter of the filter and applying the defined filter to the seismic data;
evaluating each iteration of the filter's application to at least a subset of the seismic data; and
selecting a defined filter from one of the evaluated iterations; and
applying the filter to the seismic data to suppress the effect of ghost reflection. 2. The method of claim 1, wherein the stacked, marine seismic data are stacked, minimum phase, marine seismic data. 3. The method of claim 1, wherein the stacked, marine seismic data are stacked, zero phase, marine seismic data. 4. The method of claim 3, wherein the method further comprises removing the zero phase operator from the stacked, zero phase, marine seismic data to obtain stacked, minimum phase, marine seismic data prior to designing the filter. 5. The method of claim 1, wherein the parameter is at least one of the amplitude ghost reflection coefficient, the phase ghost reflection coefficient and the ghost notch frequency, wherein iteratively defining the parameter further includes defining at least a second one of the amplitude ghost reflection coefficient, the phase ghost reflection coefficient and the ghost notch frequency. 6. The method of claim 1, wherein iteratively defining the parameter further includes defining at least a second one of the amplitude ghost reflection coefficient, the phase ghost reflection coefficient and the ghost notch frequency. 7. The method of claim 1, wherein the parameter is the amplitude ghost reflection coefficient or the phase ghost reflection coefficient; and its value is between 0 and −1, inclusive. 8. The method of claim 1, wherein the water surface reflection coefficient is defined differently to compensate for the ghost reflection amplitude than it is to compensate for the ghost reflection phase. 9. The method of claim 1, where the ghost reflection is one of: a receiver side ghost or a source side ghost, 10. The method of claim 1, wherein the filter is defined as:
D SGS(ω)=|D(ω, r=r amp)|e iarg{D(ω, r=r ph )}
where
ramp≡amplitude ghost reflection coefficient
rph≡phase ghost reflection coefficient respectively;
fn≡notch frequency; and
ω≡angular frequency of the seismic signal. 11. The method of claim 10, wherein the filter accounts for notch diversity and is defined as:
D
SGS
′
(
ω
)
=
N
N
+
∑
a
r
amp
-
ω
f
a
arg
{
N
N
+
∑
a
r
ph
-
ω
f
a
}
where
ramp≡amplitude ghost reflection coefficient
rph≡phase ghost reflection coefficient respectively;
ω≡angular frequency of the seismic signal;
N≡the number of stacked traces; and
fa≡individual notch frequencies of the stacked traces. 12. The method of claim 1, wherein the filter accommodates notch diversity. 13. A computer-implemented process, comprising:
accessing a set of stacked, marine seismic data; receiving at least one input parameter to a one-dimensional model of a ghost reflection, the model separating the amplitude and the phase of the ghost reflection; applying the model using the input parameter to the seismic data to suppress the ghost reflection; iterating the receipt of the input parameter and the application of the model; receiving a selection for one of the input parameters from the iterative application of the model; and applying the model using the selected input parameter to the seismic data to suppress the ghost reflection; wherein the accessing, the applying, and the iterating, are performed by a processor. 14. The computer-implemented process of claim 13, wherein the stacked, marine seismic data are stacked, minimum phase, marine seismic data. 15. The computer-implemented process of claim 13, wherein:
the stacked, marine seismic data are stacked, zero phase, marine seismic data; and the computer-implemented process further comprises removing the zero phase operator from the stacked, zero phase, marine seismic data to obtain stacked, minimum phase, marine seismic data prior to designing the model. | A method for use in improving marine seismic data quality includes: designing a filter for suppressing the effect of a ghost reflection in a set of stacked, marine seismic data representative of a subterranean formation, the filter compensating for amplitude due to the presence of the ghost reflection separately from the phase due to the presence of the ghost reflection; and applying the filter to the seismic data to suppress the effect of ghost reflection. The designing includes: iteratively defining at least one parameter of the filter and applying the defined filter to the seismic data; evaluating each iteration of the filter's application to at least a subset of the seismic data; and selecting a defined filter from one of the evaluated iterations.1. A method, comprising:
designing a filter for suppressing the effect of a ghost reflection in a set of stacked, marine seismic data representative of a subterranean formation, the filter compensating for amplitude due to the presence of the ghost reflection separately from the phase due to the presence of the ghost reflection, the designing including:
iteratively defining at least one parameter of the filter and applying the defined filter to the seismic data;
evaluating each iteration of the filter's application to at least a subset of the seismic data; and
selecting a defined filter from one of the evaluated iterations; and
applying the filter to the seismic data to suppress the effect of ghost reflection. 2. The method of claim 1, wherein the stacked, marine seismic data are stacked, minimum phase, marine seismic data. 3. The method of claim 1, wherein the stacked, marine seismic data are stacked, zero phase, marine seismic data. 4. The method of claim 3, wherein the method further comprises removing the zero phase operator from the stacked, zero phase, marine seismic data to obtain stacked, minimum phase, marine seismic data prior to designing the filter. 5. The method of claim 1, wherein the parameter is at least one of the amplitude ghost reflection coefficient, the phase ghost reflection coefficient and the ghost notch frequency, wherein iteratively defining the parameter further includes defining at least a second one of the amplitude ghost reflection coefficient, the phase ghost reflection coefficient and the ghost notch frequency. 6. The method of claim 1, wherein iteratively defining the parameter further includes defining at least a second one of the amplitude ghost reflection coefficient, the phase ghost reflection coefficient and the ghost notch frequency. 7. The method of claim 1, wherein the parameter is the amplitude ghost reflection coefficient or the phase ghost reflection coefficient; and its value is between 0 and −1, inclusive. 8. The method of claim 1, wherein the water surface reflection coefficient is defined differently to compensate for the ghost reflection amplitude than it is to compensate for the ghost reflection phase. 9. The method of claim 1, where the ghost reflection is one of: a receiver side ghost or a source side ghost, 10. The method of claim 1, wherein the filter is defined as:
D SGS(ω)=|D(ω, r=r amp)|e iarg{D(ω, r=r ph )}
where
ramp≡amplitude ghost reflection coefficient
rph≡phase ghost reflection coefficient respectively;
fn≡notch frequency; and
ω≡angular frequency of the seismic signal. 11. The method of claim 10, wherein the filter accounts for notch diversity and is defined as:
D
SGS
′
(
ω
)
=
N
N
+
∑
a
r
amp
-
ω
f
a
arg
{
N
N
+
∑
a
r
ph
-
ω
f
a
}
where
ramp≡amplitude ghost reflection coefficient
rph≡phase ghost reflection coefficient respectively;
ω≡angular frequency of the seismic signal;
N≡the number of stacked traces; and
fa≡individual notch frequencies of the stacked traces. 12. The method of claim 1, wherein the filter accommodates notch diversity. 13. A computer-implemented process, comprising:
accessing a set of stacked, marine seismic data; receiving at least one input parameter to a one-dimensional model of a ghost reflection, the model separating the amplitude and the phase of the ghost reflection; applying the model using the input parameter to the seismic data to suppress the ghost reflection; iterating the receipt of the input parameter and the application of the model; receiving a selection for one of the input parameters from the iterative application of the model; and applying the model using the selected input parameter to the seismic data to suppress the ghost reflection; wherein the accessing, the applying, and the iterating, are performed by a processor. 14. The computer-implemented process of claim 13, wherein the stacked, marine seismic data are stacked, minimum phase, marine seismic data. 15. The computer-implemented process of claim 13, wherein:
the stacked, marine seismic data are stacked, zero phase, marine seismic data; and the computer-implemented process further comprises removing the zero phase operator from the stacked, zero phase, marine seismic data to obtain stacked, minimum phase, marine seismic data prior to designing the model. | 2,800 |
11,346 | 11,346 | 14,250,553 | 2,872 | Optical filter elements each include a parallelogram-shaped substrate with parallel light entrance and light exit surfaces and parallel slanted sidewalls slanted at an angle, and an interference filter disposed on one or both of the light entrance surface and the light exit surface. The optical filter elements are bonded together at the slanted sidewalls to form the optical filter array. Light is filtered by illuminating the optical filter array at an angle θ equal to or corresponding to the angle of the slanted sidewalls. In some embodiments the angle of the slanted sidewalls corresponds to the angle-of-incidence θ by Snell's law. | 1. An apparatus comprising:
an optical filter array comprising optical filter elements each including:
a parallelogram-shaped substrate with parallel light entrance and light exit surfaces and parallel slanted sidewalls slanted at an angle, and
an interference filter disposed on one or both of the light entrance surface and the light exit surface,
the optical filter elements being bonded together at the slanted sidewalls to form the optical filter array. 2. The apparatus of claim 1 further comprising:
an entrance aperture having openings aligned with the light entrance surfaces of the optical filter elements; and
an exit aperture having openings aligned with the light exit surfaces of the optical filter elements;
wherein the exit aperture openings are laterally shifted relative to the entrance aperture openings to accommodate the slanted sidewalls of the optical filter elements. 3. The apparatus of claim 2 wherein the slanted sidewalls are slanted at an angle of at least 5°. 4. The apparatus of claim 2 wherein the slanted sidewalls are slanted at an angle of at least 9°. 5. The apparatus of claim 2 wherein the openings of the exit aperture are smaller than the openings of the entrance aperture. 6. The apparatus of claim 2 wherein the openings of the exit aperture are the same size as the openings of the entrance aperture. 7. The apparatus of claim 1 wherein the slanted sidewalls are slanted at an angle of at least 5°. 8. The apparatus of claim 1 wherein the slanted sidewalls are slanted at an angle of at least 9°. 9. The apparatus of claim 1 wherein the optical filter elements comprise:
a plurality of optical filter elements of different optical filter types defined by different interference filters. 10. The apparatus of claim 1, wherein the interference filters of the optical filter elements comprise pass-band filters or notch filters operating in the visible spectrum. 11. The apparatus of claim 1, wherein the interference filters of the optical filter elements comprise pass-band filters or notch filters operating in the ultraviolet spectrum. 12. The apparatus of claim 1, wherein the interference filters of the optical filter elements comprise pass-band filters or notch filters operating in the infrared spectrum. 13. A method comprising:
providing an optical filter array as set forth in claim 1; and illuminating the optical filter array with light at an angle-of-incidence θ equal to the angle of the slanted sidewalls. 14. A method comprising:
providing an optical filter array as set forth in claim 1; and illuminating the optical filter array with light at an angle-of-incidence θ=nsubθsub where nsub is the refractive index of the parallelogram-shaped substrates and θsub is the angle of the slanted sidewalls. 15. A method comprising:
fabricating a plurality of optical filter plates of different optical filter types; dicing the optical filter plates to form optical filter elements with sidewalls that are slanted; and bonding the optical filter elements together at the slanted sidewalls to form an optical filter array. 16. The method of claim 15 wherein the dicing comprises dicing the optical filter plates using a saw or laser cutting beam tilted at the angle of the angled sidewalls. 17. The method of claim 15 wherein the dicing comprises dicing each optical filter plate with the optical filter plate mounted on a wedge sub-mount having a wedge angle equal to the angle of the slanted sidewalls. 18. The method of claim 15 further comprising:
filtering light by illuminating the optical filter array with the light illuminating the optical filter array at an angle equal to or corresponding to the angle of the slanted sidewalls. 19. An apparatus comprising:
an optical filter array including:
a plurality of optical filter elements of different optical filter types, each optical filter element having a light entrance surface and a light exit surface connected by slanted sidewalls,
wherein the optical filter elements are bonded together at the slanted sidewalls to form the optical filter array with the light entrance surfaces of the optical filter elements forming a light entrance side of the optical filter array and the light exit surfaces of the optical filter elements forming a light exit side of the optical filter array. 20. The apparatus of claim 19 wherein the optical filter array further includes:
outermost optical filter elements, each outermost optical filter element having a light entrance surface and a light exit surface connected by a slanted sidewall and by a straight sidewall;
wherein the outermost optical filter elements are bonded via the slanted sidewalls of the outermost optical filter elements to ends of the optical filter array with the straight sidewalls of the outermost optical filter elements defining straight outermost sidewalls of the optical filter array. 21. The apparatus of claim 19 further comprising:
an entrance aperture having openings aligned with the light entrance surfaces of the optical filter elements; and
an exit aperture having openings aligned with the light exit surfaces of the optical filter elements;
wherein the exit aperture openings are laterally shifted relative to the entrance aperture openings to accommodate the slanted sidewalls of the optical filter elements. 22. The apparatus of claim 19 wherein the slanted sidewalls are slanted at an angle of at least 5°. 23. The apparatus of claim 19 wherein the slanted sidewalls are slanted at an angle of at least 9°. 24. The apparatus of claim 19, wherein the optical filter elements comprise pass-band filters or notch filters. | Optical filter elements each include a parallelogram-shaped substrate with parallel light entrance and light exit surfaces and parallel slanted sidewalls slanted at an angle, and an interference filter disposed on one or both of the light entrance surface and the light exit surface. The optical filter elements are bonded together at the slanted sidewalls to form the optical filter array. Light is filtered by illuminating the optical filter array at an angle θ equal to or corresponding to the angle of the slanted sidewalls. In some embodiments the angle of the slanted sidewalls corresponds to the angle-of-incidence θ by Snell's law.1. An apparatus comprising:
an optical filter array comprising optical filter elements each including:
a parallelogram-shaped substrate with parallel light entrance and light exit surfaces and parallel slanted sidewalls slanted at an angle, and
an interference filter disposed on one or both of the light entrance surface and the light exit surface,
the optical filter elements being bonded together at the slanted sidewalls to form the optical filter array. 2. The apparatus of claim 1 further comprising:
an entrance aperture having openings aligned with the light entrance surfaces of the optical filter elements; and
an exit aperture having openings aligned with the light exit surfaces of the optical filter elements;
wherein the exit aperture openings are laterally shifted relative to the entrance aperture openings to accommodate the slanted sidewalls of the optical filter elements. 3. The apparatus of claim 2 wherein the slanted sidewalls are slanted at an angle of at least 5°. 4. The apparatus of claim 2 wherein the slanted sidewalls are slanted at an angle of at least 9°. 5. The apparatus of claim 2 wherein the openings of the exit aperture are smaller than the openings of the entrance aperture. 6. The apparatus of claim 2 wherein the openings of the exit aperture are the same size as the openings of the entrance aperture. 7. The apparatus of claim 1 wherein the slanted sidewalls are slanted at an angle of at least 5°. 8. The apparatus of claim 1 wherein the slanted sidewalls are slanted at an angle of at least 9°. 9. The apparatus of claim 1 wherein the optical filter elements comprise:
a plurality of optical filter elements of different optical filter types defined by different interference filters. 10. The apparatus of claim 1, wherein the interference filters of the optical filter elements comprise pass-band filters or notch filters operating in the visible spectrum. 11. The apparatus of claim 1, wherein the interference filters of the optical filter elements comprise pass-band filters or notch filters operating in the ultraviolet spectrum. 12. The apparatus of claim 1, wherein the interference filters of the optical filter elements comprise pass-band filters or notch filters operating in the infrared spectrum. 13. A method comprising:
providing an optical filter array as set forth in claim 1; and illuminating the optical filter array with light at an angle-of-incidence θ equal to the angle of the slanted sidewalls. 14. A method comprising:
providing an optical filter array as set forth in claim 1; and illuminating the optical filter array with light at an angle-of-incidence θ=nsubθsub where nsub is the refractive index of the parallelogram-shaped substrates and θsub is the angle of the slanted sidewalls. 15. A method comprising:
fabricating a plurality of optical filter plates of different optical filter types; dicing the optical filter plates to form optical filter elements with sidewalls that are slanted; and bonding the optical filter elements together at the slanted sidewalls to form an optical filter array. 16. The method of claim 15 wherein the dicing comprises dicing the optical filter plates using a saw or laser cutting beam tilted at the angle of the angled sidewalls. 17. The method of claim 15 wherein the dicing comprises dicing each optical filter plate with the optical filter plate mounted on a wedge sub-mount having a wedge angle equal to the angle of the slanted sidewalls. 18. The method of claim 15 further comprising:
filtering light by illuminating the optical filter array with the light illuminating the optical filter array at an angle equal to or corresponding to the angle of the slanted sidewalls. 19. An apparatus comprising:
an optical filter array including:
a plurality of optical filter elements of different optical filter types, each optical filter element having a light entrance surface and a light exit surface connected by slanted sidewalls,
wherein the optical filter elements are bonded together at the slanted sidewalls to form the optical filter array with the light entrance surfaces of the optical filter elements forming a light entrance side of the optical filter array and the light exit surfaces of the optical filter elements forming a light exit side of the optical filter array. 20. The apparatus of claim 19 wherein the optical filter array further includes:
outermost optical filter elements, each outermost optical filter element having a light entrance surface and a light exit surface connected by a slanted sidewall and by a straight sidewall;
wherein the outermost optical filter elements are bonded via the slanted sidewalls of the outermost optical filter elements to ends of the optical filter array with the straight sidewalls of the outermost optical filter elements defining straight outermost sidewalls of the optical filter array. 21. The apparatus of claim 19 further comprising:
an entrance aperture having openings aligned with the light entrance surfaces of the optical filter elements; and
an exit aperture having openings aligned with the light exit surfaces of the optical filter elements;
wherein the exit aperture openings are laterally shifted relative to the entrance aperture openings to accommodate the slanted sidewalls of the optical filter elements. 22. The apparatus of claim 19 wherein the slanted sidewalls are slanted at an angle of at least 5°. 23. The apparatus of claim 19 wherein the slanted sidewalls are slanted at an angle of at least 9°. 24. The apparatus of claim 19, wherein the optical filter elements comprise pass-band filters or notch filters. | 2,800 |
11,347 | 11,347 | 15,409,089 | 2,893 | An arrangement for subsea cooling of a semiconductor module. The arrangement includes a tank. The tank is filled with a dielectric fluid. The arrangement includes at least one semiconductor module. The at least one semiconductor module is placed in the tank. Each at least one semiconductor module includes semiconductor submodules and is attached to a heat sink. The semiconductor submodules generate heat, thereby causing the dielectric fluid to circulate by natural convection. The heat sink includes a first part having a first thermal resistance from the semiconductor module to the dielectric fluid. The heat sink includes a second part having a second thermal resistance from the semiconductor module to the dielectric fluid. The second thermal resistance is higher than the first thermal resistance. The heat sink is oriented such that, when the arrangement is installed, the first part is configured to lie vertically higher than the second part. | 1. An arrangement for subsea cooling of a semiconductor module, the arrangement comprising:
a tank, the tank being filled with a dielectric fluid; and at least one semiconductor module placed in the tank, each at least one semiconductor module comprising semiconductor submodules and being attached to a heat sink, wherein the semiconductor submodules generate heat, thereby causing the dielectric fluid to circulate by natural convection, wherein the heat sink comprises a first part having a first thermal resistance from the semiconductor module to the dielectric fluid, and a second part having a second thermal resistance from the semiconductor module to the dielectric fluid, wherein the second thermal resistance is higher than the first thermal resistance, and wherein the first part is configured to lie vertically higher than the second part. 2. The arrangement according to claim 1, wherein the second part comprises a tapered portion. 3. The arrangement according to claim 1, wherein the second part comprises a recess. 4. The arrangement according to claim 1, wherein the second part has lower thermal conductivity than the first part. 5. The arrangement according to claim 1, wherein the heat sink comprises fins, and wherein the fins of the second part are shorter than the fins of the first part. 6. The arrangement according to claim 5, wherein the fins are gradually shorter along a direction from the first part to the second part. 7. The arrangement according to claim 5, wherein the fins are stepwise shorter along a direction from the first part to the second part. 8. The arrangement according to claim 5, wherein the second part has lower number of fins per area unit than the first part. 9. The arrangement according to claim 1, wherein the arrangement comprises a plurality of semiconductor modules, all of which are attached to said heat sink. 10. The arrangement according to claim 1, wherein the semiconductor submodules comprise semiconductor elements, and wherein each semiconductor element comprises diodes and insulated-gate bipolar transistors, IGBTs. 11. The arrangement according to claim 10, wherein the diodes are configured to positioned vertically higher than the IGBTs in the semiconductor submodules. 12. A method for providing an arrangement for subsea cooling of a semiconductor module, wherein the arrangement is provided by:
providing (S102) a tank, and filling the tank with a dielectric fluid; and placing (S104) at least one semiconductor module in the tank, each at least one semiconductor module comprising semiconductor submodules and being attached to a heat sink, wherein the semiconductor submodules generate heat, thereby causing the dielectric fluid to circulate by natural convection, wherein the heat sink comprises a first part having a first thermal resistance from the semiconductor module to the dielectric fluid, and a second part having a second thermal resistance from the semiconductor module to the dielectric fluid, wherein the second thermal resistance is higher than the first thermal resistance, and wherein the first part is configured to lie vertically higher than the second part. 13. The method according to claim 12, further comprising:
removing (S104 a) material from the second part so as to give the second part higher thermal resistance than the first part. 14. The method according to claim 12, further comprising:
installing (S106) the tank of the arrangement at a seabed. | An arrangement for subsea cooling of a semiconductor module. The arrangement includes a tank. The tank is filled with a dielectric fluid. The arrangement includes at least one semiconductor module. The at least one semiconductor module is placed in the tank. Each at least one semiconductor module includes semiconductor submodules and is attached to a heat sink. The semiconductor submodules generate heat, thereby causing the dielectric fluid to circulate by natural convection. The heat sink includes a first part having a first thermal resistance from the semiconductor module to the dielectric fluid. The heat sink includes a second part having a second thermal resistance from the semiconductor module to the dielectric fluid. The second thermal resistance is higher than the first thermal resistance. The heat sink is oriented such that, when the arrangement is installed, the first part is configured to lie vertically higher than the second part.1. An arrangement for subsea cooling of a semiconductor module, the arrangement comprising:
a tank, the tank being filled with a dielectric fluid; and at least one semiconductor module placed in the tank, each at least one semiconductor module comprising semiconductor submodules and being attached to a heat sink, wherein the semiconductor submodules generate heat, thereby causing the dielectric fluid to circulate by natural convection, wherein the heat sink comprises a first part having a first thermal resistance from the semiconductor module to the dielectric fluid, and a second part having a second thermal resistance from the semiconductor module to the dielectric fluid, wherein the second thermal resistance is higher than the first thermal resistance, and wherein the first part is configured to lie vertically higher than the second part. 2. The arrangement according to claim 1, wherein the second part comprises a tapered portion. 3. The arrangement according to claim 1, wherein the second part comprises a recess. 4. The arrangement according to claim 1, wherein the second part has lower thermal conductivity than the first part. 5. The arrangement according to claim 1, wherein the heat sink comprises fins, and wherein the fins of the second part are shorter than the fins of the first part. 6. The arrangement according to claim 5, wherein the fins are gradually shorter along a direction from the first part to the second part. 7. The arrangement according to claim 5, wherein the fins are stepwise shorter along a direction from the first part to the second part. 8. The arrangement according to claim 5, wherein the second part has lower number of fins per area unit than the first part. 9. The arrangement according to claim 1, wherein the arrangement comprises a plurality of semiconductor modules, all of which are attached to said heat sink. 10. The arrangement according to claim 1, wherein the semiconductor submodules comprise semiconductor elements, and wherein each semiconductor element comprises diodes and insulated-gate bipolar transistors, IGBTs. 11. The arrangement according to claim 10, wherein the diodes are configured to positioned vertically higher than the IGBTs in the semiconductor submodules. 12. A method for providing an arrangement for subsea cooling of a semiconductor module, wherein the arrangement is provided by:
providing (S102) a tank, and filling the tank with a dielectric fluid; and placing (S104) at least one semiconductor module in the tank, each at least one semiconductor module comprising semiconductor submodules and being attached to a heat sink, wherein the semiconductor submodules generate heat, thereby causing the dielectric fluid to circulate by natural convection, wherein the heat sink comprises a first part having a first thermal resistance from the semiconductor module to the dielectric fluid, and a second part having a second thermal resistance from the semiconductor module to the dielectric fluid, wherein the second thermal resistance is higher than the first thermal resistance, and wherein the first part is configured to lie vertically higher than the second part. 13. The method according to claim 12, further comprising:
removing (S104 a) material from the second part so as to give the second part higher thermal resistance than the first part. 14. The method according to claim 12, further comprising:
installing (S106) the tank of the arrangement at a seabed. | 2,800 |
11,348 | 11,348 | 14,681,675 | 2,828 | A wavelength error for each pulse in a first subset of pulses emitted from an optical source is determined, the wavelength error being the difference between a wavelength for a particular pulse and a target wavelength; a pulse-by-pulse correction signal is determined based on the determined wavelength error, the pulse-by-pulse correction signal including a correction signal associated with each pulse in the first subset of pulses; and a correction based on the determined pulse-by-pulse correction signal is applied to each pulse in a second subset of pulses emitted from the optical source, where applying a correction to a pulse in the second subset of pulses reduces the wavelength error of the pulse in the second subset of pulses. | 1. A method comprising:
receiving a pulsed light beam emitted from an optical source, the pulsed light beam comprising at least a first burst of pulses of light and a second burst of pulses of light, the first burst of pulses comprising a first subset of pulses and the second burst of pulses comprising a second subset of pulses; determining a wavelength error for each pulse in the first subset of pulses, the wavelength error being the difference between a wavelength for a particular pulse and a target wavelength; determining a pulse-by-pulse correction signal based on the determined wavelength error, the pulse-by-pulse correction signal comprising a correction signal associated with each pulse in the first subset of pulses; and applying a correction based on the determined pulse-by-pulse correction signal to each pulse in the second subset of pulses, wherein applying a correction a pulse in the second subset of pulses reduces the wavelength error of the pulse in the second subset of pulses. 2. The method of claim 1, wherein
determining a pulse-by-pulse correction signal based on the determined wavelength error comprises determining a voltage signal for each pulse in the first burst of pulses, and applying a correction to each pulse in the second subset of pulses comprises applying the voltage signal to an actuator coupled to an optical element that interacts with the pulses in the second subset of the pulses. 3. The method of claim 2, wherein, the optical element moves in response to applying the voltage signal to the actuator, thereby changing the wavelength of a pulse that interacts with the optical element. 4. The method of claim 1, wherein the first subset of pulses comprises fewer than all of the pulses of light of the first burst of pulses of light, and the second subset of pulses comprises fewer than all of the pulses of light of the second burst of pulses of light. 5. The method of claim 4, wherein the first subset of pulses comprises the initial N pulses in the first burst of pulses, and the second subset of pulses comprises the initial N pulses in the second burst of pulses. 6. The method of claim 1, further comprising filtering the determined pulse-by-pulse correction signal. 7. The method of claim 6, wherein filtering the determined pulse-by-pulse correction signal comprises applying a low-pass filter to the determined pulse-by-pulse correction signal, the low-pass filter comprising a filter that reduces portions of the pulse-by-pulse correction signal that are associated with a frequency greater than a frequency threshold. 8. The method of claim 6, wherein filtering the determined pulse-by-pulse correction signal comprises applying a low-pass filter to a determined wavelength error signal, the determined wavelength error signal comprising the wavelength error for each pulse in the first burst of pulses. 9. The method of claim 1, wherein the first burst of pulses of light and the second burst of pulses of light are separated by a temporal period, and the pulse-by-pulse correction signal is determined during the temporal period. 10. The method of claim 9, wherein second burst of pulses of light occurs after the first burst of light, and the pulse-by-pulse correction signal is determined only after the first burst of light occurs. 11. The method of claim 9, further comprising determining a filtered determined pulse-by-pulse correction signal during the temporal period. 12. The method of claim 1, wherein one or more bursts occur between the first burst and the second burst such that the first burst and the second burst are non-consecutive in time. 13. The method of claim 12, wherein the first burst of pulses of light is the burst that immediately precedes the second burst of pulses of light in time. 14. The method of claim 1, wherein the pulsed light beam comprises a third burst of pulses of light, the third burst of pulses comprising a third subset of pulses, and further comprising:
determining the wavelength error for each pulse in the second subset of pulses after applying the correction; comparing the wavelength error for each pulse to an upper threshold and a lower threshold; and if the wavelength error of a threshold number of pulses is greater than the upper threshold or less than the lower threshold, determining a pulse-by-pulse correction signal for the second subset of pulses based on the determining the wavelength error for each pulse in the second subset of pulses, and applying a correction based on the pulse-by-pulse correction signal for the second subset of pulses to each pulse in the third subset of pulses. 15. The method of claim 2, further comprising:
determining a wavelength error of a plurality of pulses in the second burst of pulses of light; accessing a model representing a secondary disturbance in the optical source; accessing a model representing dynamics of the actuator; and determining a second correction signal based on the determined wavelength error of the plurality of pulses in the second burst of pulses of light and one or more of the model of the secondary disturbance and the model representing dynamics of the actuator, wherein applying a correction based on the determined pulse-by-pulse correction signal to each pulse in the second subset of pulses further comprises applying the second correction signal to at least some of the pulses in the second subset of pulses. 16. The method of claim 15, wherein the correction based on the determined pulse-by-pulse correction signal and the second correction signal are added prior to application to the pulses in the second subset of pulses. 17. The method of claim 1, further comprising determining the wavelength for each pulse in the first subset of pulses. 18. A method comprising:
receiving a pulsed light beam emitted from an optical source, the pulsed light beam comprising at least a first burst of pulses of light and a second burst of pulses of light, the first burst of pulses and the second burst of pulses being separated in time, and each of the first burst of pulses and the second burst of pulses comprising a transient wavelength error that varies with operating conditions; determining a wavelength error for two or more pulses in the first burst of pulses, the wavelength error for a particular pulse being the difference between the wavelength of the particular pulse and a target wavelength; determining the transient wavelength error in the first burst of pulses of light based on the determined wavelength error; determining a correction signal based on the determined transient wavelength error; and applying a correction based on the correction signal to at least some of the pulses of the second burst of pulses of light, wherein applying the correction reduces the transient wavelength error in the second burst of pulses compared to the transient wavelength error in the first burst of pulses. 19. The method of claim 18, wherein the transient wavelength error that varies with operating conditions is substantially invariant among bursts of pulses produced under a given set of operating conditions. 20. The method of claim 18, wherein the transient wavelength error arises from an acoustic event within a chamber of the optical source that emits the pulsed light beam. 21. The method of claim 18, wherein the transient wavelength error is characterized by an impulse response of a second or third order system. 22. The method of claim 18, wherein the first subset of pulses comprises fewer than all of the pulses in the first burst of pulses of light, and the second subset of pulses comprises fewer than all of the pulses in the second burst of pulses of light. 23. A controller for an optical source that emits a pulsed light beam, the controller configured to couple to the optical source, and the controller comprising:
one or more electronic processors; and a non-transitory, computer-readable storage medium coupled to one or more of the one or more electronic processors, the computer-readable storage medium having stored thereon instructions, which, when executed by the one or more electronic processors, causes the one or more processors to perform operations comprising:
access information of a pulsed light beam emitted from the optical source, the pulsed light beam comprising at least a first burst of pulses of light and a second burst of pulses of light, the first burst of pulses comprising a first subset of pulses and the second burst of pulses comprising a second subset of pulses;
determine a wavelength error for each pulse in the first subset of pulses, the wavelength error being the difference between a wavelength for a particular pulse and a target wavelength;
determine a pulse-by-pulse correction signal based on the determined wavelength error, the pulse-by-pulse correction signal comprising a correction signal associated with each pulse in the first subset of pulses; and
apply a correction based on the determined pulse-by-pulse correction signal to each pulse in the second subset of pulses, wherein applying a correction to a pulse in the second subset of pulses reduces the wavelength error of the pulse. 24. A light system comprising:
an optical source configured to emit a beam of light, the beam of light comprising bursts separated by temporal periods, each burst comprising pulses of light that occur at a temporal repetition rate; a line center analysis module configured to measure a wavelength of the pulses of light in the bursts of light; and a controller configured to receive the measurement of the wavelength at the temporal repetition rate, the controller comprising:
a feedback module configured to determine a feedback correction signal to compensate for wavelength error of a particular pulse in a first burst of pulses, the feedback correction signal being based on a wavelength error of an earlier-occurring pulse in the first burst;
a feed-forward stabilization module configured to determine a feed-forward correction signal to compensate for wavelength error of the particular pulse in the first burst of pulses based on a corresponding pulse in an earlier-occurring burst;
one or more electronic processors coupled to a non-transitory computer readable medium comprising instructions that, when executed, cause the one or more electronic processors to:
combine the feed-forward correction signal for the particular burst and the feedback signal for the particular burst to form a combined correction signal for the particular burst, and
provide the combined correction signal to the optical source to reduce the wavelength error of the particular pulse in the first burst. | A wavelength error for each pulse in a first subset of pulses emitted from an optical source is determined, the wavelength error being the difference between a wavelength for a particular pulse and a target wavelength; a pulse-by-pulse correction signal is determined based on the determined wavelength error, the pulse-by-pulse correction signal including a correction signal associated with each pulse in the first subset of pulses; and a correction based on the determined pulse-by-pulse correction signal is applied to each pulse in a second subset of pulses emitted from the optical source, where applying a correction to a pulse in the second subset of pulses reduces the wavelength error of the pulse in the second subset of pulses.1. A method comprising:
receiving a pulsed light beam emitted from an optical source, the pulsed light beam comprising at least a first burst of pulses of light and a second burst of pulses of light, the first burst of pulses comprising a first subset of pulses and the second burst of pulses comprising a second subset of pulses; determining a wavelength error for each pulse in the first subset of pulses, the wavelength error being the difference between a wavelength for a particular pulse and a target wavelength; determining a pulse-by-pulse correction signal based on the determined wavelength error, the pulse-by-pulse correction signal comprising a correction signal associated with each pulse in the first subset of pulses; and applying a correction based on the determined pulse-by-pulse correction signal to each pulse in the second subset of pulses, wherein applying a correction a pulse in the second subset of pulses reduces the wavelength error of the pulse in the second subset of pulses. 2. The method of claim 1, wherein
determining a pulse-by-pulse correction signal based on the determined wavelength error comprises determining a voltage signal for each pulse in the first burst of pulses, and applying a correction to each pulse in the second subset of pulses comprises applying the voltage signal to an actuator coupled to an optical element that interacts with the pulses in the second subset of the pulses. 3. The method of claim 2, wherein, the optical element moves in response to applying the voltage signal to the actuator, thereby changing the wavelength of a pulse that interacts with the optical element. 4. The method of claim 1, wherein the first subset of pulses comprises fewer than all of the pulses of light of the first burst of pulses of light, and the second subset of pulses comprises fewer than all of the pulses of light of the second burst of pulses of light. 5. The method of claim 4, wherein the first subset of pulses comprises the initial N pulses in the first burst of pulses, and the second subset of pulses comprises the initial N pulses in the second burst of pulses. 6. The method of claim 1, further comprising filtering the determined pulse-by-pulse correction signal. 7. The method of claim 6, wherein filtering the determined pulse-by-pulse correction signal comprises applying a low-pass filter to the determined pulse-by-pulse correction signal, the low-pass filter comprising a filter that reduces portions of the pulse-by-pulse correction signal that are associated with a frequency greater than a frequency threshold. 8. The method of claim 6, wherein filtering the determined pulse-by-pulse correction signal comprises applying a low-pass filter to a determined wavelength error signal, the determined wavelength error signal comprising the wavelength error for each pulse in the first burst of pulses. 9. The method of claim 1, wherein the first burst of pulses of light and the second burst of pulses of light are separated by a temporal period, and the pulse-by-pulse correction signal is determined during the temporal period. 10. The method of claim 9, wherein second burst of pulses of light occurs after the first burst of light, and the pulse-by-pulse correction signal is determined only after the first burst of light occurs. 11. The method of claim 9, further comprising determining a filtered determined pulse-by-pulse correction signal during the temporal period. 12. The method of claim 1, wherein one or more bursts occur between the first burst and the second burst such that the first burst and the second burst are non-consecutive in time. 13. The method of claim 12, wherein the first burst of pulses of light is the burst that immediately precedes the second burst of pulses of light in time. 14. The method of claim 1, wherein the pulsed light beam comprises a third burst of pulses of light, the third burst of pulses comprising a third subset of pulses, and further comprising:
determining the wavelength error for each pulse in the second subset of pulses after applying the correction; comparing the wavelength error for each pulse to an upper threshold and a lower threshold; and if the wavelength error of a threshold number of pulses is greater than the upper threshold or less than the lower threshold, determining a pulse-by-pulse correction signal for the second subset of pulses based on the determining the wavelength error for each pulse in the second subset of pulses, and applying a correction based on the pulse-by-pulse correction signal for the second subset of pulses to each pulse in the third subset of pulses. 15. The method of claim 2, further comprising:
determining a wavelength error of a plurality of pulses in the second burst of pulses of light; accessing a model representing a secondary disturbance in the optical source; accessing a model representing dynamics of the actuator; and determining a second correction signal based on the determined wavelength error of the plurality of pulses in the second burst of pulses of light and one or more of the model of the secondary disturbance and the model representing dynamics of the actuator, wherein applying a correction based on the determined pulse-by-pulse correction signal to each pulse in the second subset of pulses further comprises applying the second correction signal to at least some of the pulses in the second subset of pulses. 16. The method of claim 15, wherein the correction based on the determined pulse-by-pulse correction signal and the second correction signal are added prior to application to the pulses in the second subset of pulses. 17. The method of claim 1, further comprising determining the wavelength for each pulse in the first subset of pulses. 18. A method comprising:
receiving a pulsed light beam emitted from an optical source, the pulsed light beam comprising at least a first burst of pulses of light and a second burst of pulses of light, the first burst of pulses and the second burst of pulses being separated in time, and each of the first burst of pulses and the second burst of pulses comprising a transient wavelength error that varies with operating conditions; determining a wavelength error for two or more pulses in the first burst of pulses, the wavelength error for a particular pulse being the difference between the wavelength of the particular pulse and a target wavelength; determining the transient wavelength error in the first burst of pulses of light based on the determined wavelength error; determining a correction signal based on the determined transient wavelength error; and applying a correction based on the correction signal to at least some of the pulses of the second burst of pulses of light, wherein applying the correction reduces the transient wavelength error in the second burst of pulses compared to the transient wavelength error in the first burst of pulses. 19. The method of claim 18, wherein the transient wavelength error that varies with operating conditions is substantially invariant among bursts of pulses produced under a given set of operating conditions. 20. The method of claim 18, wherein the transient wavelength error arises from an acoustic event within a chamber of the optical source that emits the pulsed light beam. 21. The method of claim 18, wherein the transient wavelength error is characterized by an impulse response of a second or third order system. 22. The method of claim 18, wherein the first subset of pulses comprises fewer than all of the pulses in the first burst of pulses of light, and the second subset of pulses comprises fewer than all of the pulses in the second burst of pulses of light. 23. A controller for an optical source that emits a pulsed light beam, the controller configured to couple to the optical source, and the controller comprising:
one or more electronic processors; and a non-transitory, computer-readable storage medium coupled to one or more of the one or more electronic processors, the computer-readable storage medium having stored thereon instructions, which, when executed by the one or more electronic processors, causes the one or more processors to perform operations comprising:
access information of a pulsed light beam emitted from the optical source, the pulsed light beam comprising at least a first burst of pulses of light and a second burst of pulses of light, the first burst of pulses comprising a first subset of pulses and the second burst of pulses comprising a second subset of pulses;
determine a wavelength error for each pulse in the first subset of pulses, the wavelength error being the difference between a wavelength for a particular pulse and a target wavelength;
determine a pulse-by-pulse correction signal based on the determined wavelength error, the pulse-by-pulse correction signal comprising a correction signal associated with each pulse in the first subset of pulses; and
apply a correction based on the determined pulse-by-pulse correction signal to each pulse in the second subset of pulses, wherein applying a correction to a pulse in the second subset of pulses reduces the wavelength error of the pulse. 24. A light system comprising:
an optical source configured to emit a beam of light, the beam of light comprising bursts separated by temporal periods, each burst comprising pulses of light that occur at a temporal repetition rate; a line center analysis module configured to measure a wavelength of the pulses of light in the bursts of light; and a controller configured to receive the measurement of the wavelength at the temporal repetition rate, the controller comprising:
a feedback module configured to determine a feedback correction signal to compensate for wavelength error of a particular pulse in a first burst of pulses, the feedback correction signal being based on a wavelength error of an earlier-occurring pulse in the first burst;
a feed-forward stabilization module configured to determine a feed-forward correction signal to compensate for wavelength error of the particular pulse in the first burst of pulses based on a corresponding pulse in an earlier-occurring burst;
one or more electronic processors coupled to a non-transitory computer readable medium comprising instructions that, when executed, cause the one or more electronic processors to:
combine the feed-forward correction signal for the particular burst and the feedback signal for the particular burst to form a combined correction signal for the particular burst, and
provide the combined correction signal to the optical source to reduce the wavelength error of the particular pulse in the first burst. | 2,800 |
11,349 | 11,349 | 11,880,210 | 2,816 | An optoelectronic device and a method of fabricating a photosensitive optoelectronic device includes depositing a first organic semiconductor material on a first electrode to form a continuous first layer; depositing a layer of a second organic semiconductor material on the first layer to form a discontinuous second layer, portions of the first layer remaining exposed; and depositing the first organic semiconductor material on the second layer to form a discontinuous third layer, portions of at least the second layer remaining exposed. The depositing of the first and second organic semiconductor materials are alternated a number of times until a final layer of the second organic material is added to form a continuous layer. A second electrode is deposited over this final layer. One of the first electrode and the second electrode is transparent, and the first organic semiconductor material is one or more donor-type materials or one or more acceptor-type materials relative to second organic semiconductor material, which is one or more materials of the other material type. | 1. A method of fabricating a photosensitive optoelectronic device, comprising:
depositing a first organic semiconductor material over a first electrode to form a continuous first layer; depositing a second organic semiconductor material over the first layer to form a discontinuous second layer, portions of the first layer remaining exposed; depositing the first organic semiconductor material directly on the second layer to form a discontinuous third layer, portions of at least the second layer remaining exposed; alternating deposition of the first and second organic semiconductor materials; depositing the second organic semiconductor material to form a continuous fourth layer; and depositing a second electrode over the fourth layer, wherein at least one of the first electrode and the second electrode is transparent, and the first organic semiconductor material is one or more donor-type materials or one or more acceptor-type materials relative to the second organic semiconductor material, said second organic semiconductor material being one or more materials of the other material type. 2. The method of claim 1, wherein at least one of the first and second organic semiconductor materials are formed of nanocrystals. 3. The method of claim 2, wherein said first material is copper phthalocyanine and said second material is C60. 4. The method of claim 3 wherein each of said first and second organic semiconductor materials are deposited via organic vapor phase deposition. 5. The method of claim 4 further comprising:
depositing an exciton blocking layer between said third layer and said second electrode. 6. The method of claim 2 wherein said first, second, third and fourth layers are part of a first organic photoactive region, the method further comprising:
forming a second photoactive region between said first photoactive region and said second electrode. 7. The method of claim 1 further comprising:
depositing additional first organic semiconductor material onto said first layer prior to depositing said second organic semiconductor material onto said first layer. 8. A photosensitive optoelectronic device, comprising:
a first electrode and a second electrode, at least one of the first electrode and the second electrode being transparent; and a first organic photoactive layer disposed between the first electrode and the second electrode, the organic photoactive layer comprising:
a first layer comprising a first organic semiconductor material, the first layer being continuous;
a second layer comprising a second organic semiconductor material, the second layer being discontinuous and in direct contact with the first layer, portions of the first layer coinciding with gaps in the second layer;
alternating first and second layers to form a third layer; and
a fourth layer comprising the second organic semiconductor material, the fourth layer being continuous, and
the first organic semiconductor material is one or more donor-type materials or one or more acceptor-type materials relative to the second organic semiconductor material, said second organic semiconductor material being one or more materials of the other material type. 9. The device of claim 8, wherein at least one of the first and second organic semiconductor materials are formed of nanocrystals. 10. The device of claim 9, wherein said first material is copper phthalocyanine and said second material is C60. 11. The device of claim 10, wherein each of said first and second organic semiconductor materials are deposited via organic vapor phase deposition. 12. The device of claim 11 further comprising:
an exciton blocking layer deposited between said fourth layer and said second electrode. 13. The device of claim 9 further comprising:
a second organic photoactive layer between said first organic photoactive layer and said second electrode. 14. The device of claim 8 wherein said first layer further includes additional first organic semiconductor material deposited onto said continuous layer prior to depositing said second organic semiconductor material onto said first layer. | An optoelectronic device and a method of fabricating a photosensitive optoelectronic device includes depositing a first organic semiconductor material on a first electrode to form a continuous first layer; depositing a layer of a second organic semiconductor material on the first layer to form a discontinuous second layer, portions of the first layer remaining exposed; and depositing the first organic semiconductor material on the second layer to form a discontinuous third layer, portions of at least the second layer remaining exposed. The depositing of the first and second organic semiconductor materials are alternated a number of times until a final layer of the second organic material is added to form a continuous layer. A second electrode is deposited over this final layer. One of the first electrode and the second electrode is transparent, and the first organic semiconductor material is one or more donor-type materials or one or more acceptor-type materials relative to second organic semiconductor material, which is one or more materials of the other material type.1. A method of fabricating a photosensitive optoelectronic device, comprising:
depositing a first organic semiconductor material over a first electrode to form a continuous first layer; depositing a second organic semiconductor material over the first layer to form a discontinuous second layer, portions of the first layer remaining exposed; depositing the first organic semiconductor material directly on the second layer to form a discontinuous third layer, portions of at least the second layer remaining exposed; alternating deposition of the first and second organic semiconductor materials; depositing the second organic semiconductor material to form a continuous fourth layer; and depositing a second electrode over the fourth layer, wherein at least one of the first electrode and the second electrode is transparent, and the first organic semiconductor material is one or more donor-type materials or one or more acceptor-type materials relative to the second organic semiconductor material, said second organic semiconductor material being one or more materials of the other material type. 2. The method of claim 1, wherein at least one of the first and second organic semiconductor materials are formed of nanocrystals. 3. The method of claim 2, wherein said first material is copper phthalocyanine and said second material is C60. 4. The method of claim 3 wherein each of said first and second organic semiconductor materials are deposited via organic vapor phase deposition. 5. The method of claim 4 further comprising:
depositing an exciton blocking layer between said third layer and said second electrode. 6. The method of claim 2 wherein said first, second, third and fourth layers are part of a first organic photoactive region, the method further comprising:
forming a second photoactive region between said first photoactive region and said second electrode. 7. The method of claim 1 further comprising:
depositing additional first organic semiconductor material onto said first layer prior to depositing said second organic semiconductor material onto said first layer. 8. A photosensitive optoelectronic device, comprising:
a first electrode and a second electrode, at least one of the first electrode and the second electrode being transparent; and a first organic photoactive layer disposed between the first electrode and the second electrode, the organic photoactive layer comprising:
a first layer comprising a first organic semiconductor material, the first layer being continuous;
a second layer comprising a second organic semiconductor material, the second layer being discontinuous and in direct contact with the first layer, portions of the first layer coinciding with gaps in the second layer;
alternating first and second layers to form a third layer; and
a fourth layer comprising the second organic semiconductor material, the fourth layer being continuous, and
the first organic semiconductor material is one or more donor-type materials or one or more acceptor-type materials relative to the second organic semiconductor material, said second organic semiconductor material being one or more materials of the other material type. 9. The device of claim 8, wherein at least one of the first and second organic semiconductor materials are formed of nanocrystals. 10. The device of claim 9, wherein said first material is copper phthalocyanine and said second material is C60. 11. The device of claim 10, wherein each of said first and second organic semiconductor materials are deposited via organic vapor phase deposition. 12. The device of claim 11 further comprising:
an exciton blocking layer deposited between said fourth layer and said second electrode. 13. The device of claim 9 further comprising:
a second organic photoactive layer between said first organic photoactive layer and said second electrode. 14. The device of claim 8 wherein said first layer further includes additional first organic semiconductor material deposited onto said continuous layer prior to depositing said second organic semiconductor material onto said first layer. | 2,800 |
11,350 | 11,350 | 14,620,772 | 2,829 | A semiconductor diode with integrated resistor has a semiconductor body with a front surface, a back surface and a diode structure with an anode electrode and a cathode electrode. A resistance layer arranged on the back surface of the semiconductor body provides the integrated resistor | 1. A semiconductor boot-strap diode with an integrated charge current resistor, comprising:
a semiconductor body having a front surface and a back surface; at least one cathode zone of a first conduction type; at least one anode zone of a second conduction type; at least one p-n junction between the cathode zone and the anode zone; and a resistance layer arranged on the back surface of the semiconductor body providing the integrated charge current resistor. 2. The semiconductor boot-strap diode of claim 1, wherein the resistance layer of the integrated charge current resistor at least partially covers the back surface of the semiconductor body, contacts the semiconductor material of the semiconductor body and is coated with an electrode material. 3. The semiconductor boot-strap diode of claim 1, wherein the semiconductor body includes a substrate which is doped more highly than the cathode zone and contributes to the thermal capacity and the resistance of the integrated charge current resistor, and wherein the thickness of the resistance layer is reduced correspondingly. 4. The semiconductor boot-strap diode of claim 1, wherein the resistance layer includes carbon. 5. The semiconductor boot-strap diode of claim 1, wherein the resistance layer includes monocrystalline silicon, polycrystalline silicon or amorphous silicon. 6. The semiconductor boot-strap diode of claim 1, wherein the resistance layer includes isolation zones and resistance zones, the isolation zones and resistance zones covering the semiconductor material of the semiconductor body on the back surface. 7. The semiconductor boot-strap diode of claim 1, wherein the semiconductor boot-strap diode includes a plurality of spaced cathode zones and a common anode zone with a transition to a resistance layer arranged on the back surface. 8. The semiconductor boot-strap diode of claim 7, wherein a field stop zone is arranged between a common drift zone and the common anode zone. 9. A bridge circuit, comprising:
a low side driver for at least one low side power transistor, the low side driver including a power controller; a high side driver for at least one high side power transistor, the high side driver including a capacitor providing a power supply for the high side driver; and a semiconductor boot-strap diode including:
a semiconductor body having a front surface and a back surface;
a cathode zone of a first conduction type coupled to a cathode electrode;
an anode zone of a second conduction type coupled to an anode electrode;
at least one p-n junction between the cathode zone and the anode zone; and
a resistance layer arranged on the back surface of the semiconductor body providing an integrated charge current resistor;
wherein the cathode electrode is electrically coupled to the capacitor and wherein the anode electrode is electrically coupled to the power controller via the integrated charge current resistor of the semiconductor boot-strap diode. 10. The circuit of claim 9, wherein the resistance layer of the integrated charge current resistor at least partially covers the back surface of the semiconductor body, contacts the semiconductor material of the semiconductor body and is coated with an electrode material. 11. The circuit of claim 9, wherein the semiconductor body includes a substrate which is doped more highly than the cathode zone and contributes to the thermal capacity and the resistance of the integrated charge current resistor, and wherein the thickness of the resistance layer is reduced correspondingly. 12. The circuit of claim 9, wherein the resistance layer includes carbon. 13. The circuit of claim 9, wherein the resistance layer includes monocrystalline silicon, polycrystalline silicon or amorphous silicon. 14. The circuit of claim 9, wherein the resistance layer includes isolation zones and resistance zones, the isolation zones and resistance zones covering the semiconductor material of the semiconductor body on the back surface. 15. The circuit of claim 9, wherein the semiconductor boot-strap diode includes a plurality of spaced cathode zones and a common anode zone with a transition to a resistance layer arranged on the back surface. 16. The circuit of claim 15, wherein a field stop zone is arranged between a common drift zone and the common anode zone. 17. A three-phase full-bridge circuit, comprising:
a low side driver for three low side power transistors; three high side drivers for three corresponding high side power transistors, each of the high side drivers including a corresponding capacitor providing a power supply for the respective high side driver; and a semiconductor boot-strap diode including:
a semiconductor body having a front surface and a back surface;
three spaced cathode zones of a first conduction type coupled to three corresponding cathode electrodes;
a common anode zone of a second conduction type coupled to an anode electrode;
at least one p-n junction between the cathode zones and the anode zone; and
a resistance layer arranged on the back surface of the semiconductor body providing an integrated charge current resistor;
wherein the common anode is electrically coupled to a power controller of the low side driver via the integrated charge current resistor of the semiconductor boot-strap diode, and wherein each of the three cathodes of the semiconductor boot-strap diode is electrically coupled to a corresponding one of the capacitors of the three high side drivers. 18. The circuit of claim 17, wherein the resistance layer of the integrated charge current resistor at least partially covers the back surface of the semiconductor body, contacts the semiconductor material of the semiconductor body and is coated with an electrode material. 19. The circuit of claim 17, wherein the semiconductor body includes a substrate which is doped more highly than the cathode zone and contributes to the thermal capacity and the resistance of the integrated charge current resistor, and wherein the thickness of the resistance layer is reduced correspondingly. 20. The circuit of claim 17, wherein the resistance layer includes carbon. 21. The circuit of claim 17, wherein the resistance layer includes mono crystalline silicon, polycrystalline silicon or amorphous silicon. 22. The circuit of claim 17, wherein the resistance layer includes isolation zones and resistance zones, the isolation zones and resistance zones covering the semiconductor material of the semiconductor body on the back surface. 23. The circuit of claim 17, wherein the semiconductor boot-strap diode includes a plurality of spaced cathode zones and a common anode zone with a transition to a resistance layer arranged on the back surface. 24. The circuit of claim 23, wherein a field stop zone is arranged between a common drift zone and the common anode zone. | A semiconductor diode with integrated resistor has a semiconductor body with a front surface, a back surface and a diode structure with an anode electrode and a cathode electrode. A resistance layer arranged on the back surface of the semiconductor body provides the integrated resistor1. A semiconductor boot-strap diode with an integrated charge current resistor, comprising:
a semiconductor body having a front surface and a back surface; at least one cathode zone of a first conduction type; at least one anode zone of a second conduction type; at least one p-n junction between the cathode zone and the anode zone; and a resistance layer arranged on the back surface of the semiconductor body providing the integrated charge current resistor. 2. The semiconductor boot-strap diode of claim 1, wherein the resistance layer of the integrated charge current resistor at least partially covers the back surface of the semiconductor body, contacts the semiconductor material of the semiconductor body and is coated with an electrode material. 3. The semiconductor boot-strap diode of claim 1, wherein the semiconductor body includes a substrate which is doped more highly than the cathode zone and contributes to the thermal capacity and the resistance of the integrated charge current resistor, and wherein the thickness of the resistance layer is reduced correspondingly. 4. The semiconductor boot-strap diode of claim 1, wherein the resistance layer includes carbon. 5. The semiconductor boot-strap diode of claim 1, wherein the resistance layer includes monocrystalline silicon, polycrystalline silicon or amorphous silicon. 6. The semiconductor boot-strap diode of claim 1, wherein the resistance layer includes isolation zones and resistance zones, the isolation zones and resistance zones covering the semiconductor material of the semiconductor body on the back surface. 7. The semiconductor boot-strap diode of claim 1, wherein the semiconductor boot-strap diode includes a plurality of spaced cathode zones and a common anode zone with a transition to a resistance layer arranged on the back surface. 8. The semiconductor boot-strap diode of claim 7, wherein a field stop zone is arranged between a common drift zone and the common anode zone. 9. A bridge circuit, comprising:
a low side driver for at least one low side power transistor, the low side driver including a power controller; a high side driver for at least one high side power transistor, the high side driver including a capacitor providing a power supply for the high side driver; and a semiconductor boot-strap diode including:
a semiconductor body having a front surface and a back surface;
a cathode zone of a first conduction type coupled to a cathode electrode;
an anode zone of a second conduction type coupled to an anode electrode;
at least one p-n junction between the cathode zone and the anode zone; and
a resistance layer arranged on the back surface of the semiconductor body providing an integrated charge current resistor;
wherein the cathode electrode is electrically coupled to the capacitor and wherein the anode electrode is electrically coupled to the power controller via the integrated charge current resistor of the semiconductor boot-strap diode. 10. The circuit of claim 9, wherein the resistance layer of the integrated charge current resistor at least partially covers the back surface of the semiconductor body, contacts the semiconductor material of the semiconductor body and is coated with an electrode material. 11. The circuit of claim 9, wherein the semiconductor body includes a substrate which is doped more highly than the cathode zone and contributes to the thermal capacity and the resistance of the integrated charge current resistor, and wherein the thickness of the resistance layer is reduced correspondingly. 12. The circuit of claim 9, wherein the resistance layer includes carbon. 13. The circuit of claim 9, wherein the resistance layer includes monocrystalline silicon, polycrystalline silicon or amorphous silicon. 14. The circuit of claim 9, wherein the resistance layer includes isolation zones and resistance zones, the isolation zones and resistance zones covering the semiconductor material of the semiconductor body on the back surface. 15. The circuit of claim 9, wherein the semiconductor boot-strap diode includes a plurality of spaced cathode zones and a common anode zone with a transition to a resistance layer arranged on the back surface. 16. The circuit of claim 15, wherein a field stop zone is arranged between a common drift zone and the common anode zone. 17. A three-phase full-bridge circuit, comprising:
a low side driver for three low side power transistors; three high side drivers for three corresponding high side power transistors, each of the high side drivers including a corresponding capacitor providing a power supply for the respective high side driver; and a semiconductor boot-strap diode including:
a semiconductor body having a front surface and a back surface;
three spaced cathode zones of a first conduction type coupled to three corresponding cathode electrodes;
a common anode zone of a second conduction type coupled to an anode electrode;
at least one p-n junction between the cathode zones and the anode zone; and
a resistance layer arranged on the back surface of the semiconductor body providing an integrated charge current resistor;
wherein the common anode is electrically coupled to a power controller of the low side driver via the integrated charge current resistor of the semiconductor boot-strap diode, and wherein each of the three cathodes of the semiconductor boot-strap diode is electrically coupled to a corresponding one of the capacitors of the three high side drivers. 18. The circuit of claim 17, wherein the resistance layer of the integrated charge current resistor at least partially covers the back surface of the semiconductor body, contacts the semiconductor material of the semiconductor body and is coated with an electrode material. 19. The circuit of claim 17, wherein the semiconductor body includes a substrate which is doped more highly than the cathode zone and contributes to the thermal capacity and the resistance of the integrated charge current resistor, and wherein the thickness of the resistance layer is reduced correspondingly. 20. The circuit of claim 17, wherein the resistance layer includes carbon. 21. The circuit of claim 17, wherein the resistance layer includes mono crystalline silicon, polycrystalline silicon or amorphous silicon. 22. The circuit of claim 17, wherein the resistance layer includes isolation zones and resistance zones, the isolation zones and resistance zones covering the semiconductor material of the semiconductor body on the back surface. 23. The circuit of claim 17, wherein the semiconductor boot-strap diode includes a plurality of spaced cathode zones and a common anode zone with a transition to a resistance layer arranged on the back surface. 24. The circuit of claim 23, wherein a field stop zone is arranged between a common drift zone and the common anode zone. | 2,800 |
11,351 | 11,351 | 14,930,754 | 2,853 | A volatile content analysis instrument is disclosed that includes a cavity and a microwave source positioned to produce and direct microwaves into the cavity at frequencies other than infrared frequencies. A balance is included with at least the balance pan (or platform) in the cavity. An infrared source is positioned to produce and direct infrared radiation into the cavity at frequencies other than the microwave frequencies produced by the microwave source. A lens is positioned between the infrared source and the balance pan for more efficiently directing infrared radiation to a sample on the balance pan. The lens has dimensions that preclude microwaves of the frequencies produced by the source and directed into the cavity from leaving the cavity. | 1. A volatile content analysis instrument comprising:
a cavity; a balance with at least the balance pan in said cavity; an infrared source that is positioned to direct infrared radiation into said cavity; a lens between said infrared source and said balance pan for more efficiently directing infrared radiation to a sample on said balance pan. 2. An instrument according to claim 1 wherein said lens comprises a reflective collimator positioned between said infrared source and said balance pan. 3. An instrument according to claim 2 wherein:
said instrument includes a microwave source that produces and directs microwave radiation into said cavity at frequencies other than the infrared frequencies produced by said infrared source; and
said collimator is a metal opening having dimensions that preclude the microwave frequencies produced by said microwave source from leaving said cavity through said collimator opening. 4. An instrument according to claim 3 further comprising an infrared temperature detector positioned to target a sample on said balance pan. 5. An instrument according to claim 4 further comprising a processor in communication with said infrared source, said microwave source, and said temperature detector, for moderating the application of radiation to a sample in response to the detected temperature. 6. A volatile content analysis instrument comprising:
a cavity; a microwave source positioned to produce and direct microwaves into said cavity at frequencies other than infrared frequencies; a balance with at least the balance pan in the cavity; an infrared source that is positioned to produce and direct infrared radiation into said cavity at frequencies other than the microwave frequencies produced by said microwave source; a lens between said infrared source and said balance pan for more efficiently directing infrared radiation to a sample on said balance pan; and said lens having dimensions that preclude microwaves of the frequencies produced by said source and directed into said cavity from leaving said cavity. 7. An instrument according to claim 6 further comprising an infrared temperature detector positioned to target a sample on said balance pan. 8. An instrument according to claim 7 further comprising a processor in communication with said infrared source, said microwave source, and said temperature detector, for moderating the application of radiation to a sample in response to the detected temperature. 9. An instrument according to claim 6 wherein said lens is a metal opening having dimensions that preclude microwaves produced by said microwave source from leaving said cavity through said lens. 10. An instrument according to claim 6 wherein said lens comprises a plurality of adjoining cells, open at both ends and oriented in a wall of said cavity with the open ends of each said cell generally aligned along a light path defined from said infrared source to said balance pan; and
with the interior walls of said cells having a surface that is sufficiently specular to reflect electromagnetic radiation in the infrared frequencies produced by said infrared source. 11. An instrument according to claim 10 wherein said plurality of adjoining cells are formed of metal. 12. An instrument according to claim 10 wherein said cells have a length-to-opening ratio sufficient to attenuate the microwave frequencies generated by said source and propagated into said cavity. 13. An instrument according to claim 6 further comprising an infrared reflector positioned to direct infrared radiation from said source to said lens. 14. A method of loss-on-drying content measurement comprising:
collimating infrared radiation towards a volatile-containing sample; and concurrently propagating microwave frequencies to the same sample. 15. A method according to claim 14 further comprising attenuating the microwave frequencies at a collimator that collimates the infrared radiation. 16. A method according to claim 14 further comprising collimating the infrared radiation through a microwave attenuator that is sized proportionately to attenuate the concurrently propagated microwave frequencies. 17. A method according to claim 14 further comprising measuring the infrared radiation produced by a heated sample. 18. A method according to claim 17 further comprising adjusting a factor selected from the group consisting of the collimated infrared radiation, the propagated microwaves, and combinations thereof, in response to the measured infrared radiation from the heated sample. 19. A method according to claim 14 further comprising:
weighing the sample before the collimating and microwave propagation steps; and
weighing the sample during the collimating and microwave propagation steps. 20. A method according to claim 14 further comprising:
weighing the sample before the collimating and microwave propagation steps; and
weighing the sample when the sample is dry. 21. A combined infrared collimator and microwave attenuator comprising:
a plurality of adjoining cells, open at both ends and oriented with the open ends of each said cell generally aligned substantially parallel to one another; wherein the interior walls of said cells have surfaces that are sufficiently specular to reflect electromagnetic radiation in the infrared frequencies; and wherein said cells have a length-to-opening ratio sufficient to attenuate electromagnetic radiation within the microwave frequencies. 22. A combined infrared collimator and microwave attenuator according to claim 21 wherein:
said interior wall surfaces will reflect infrared radiation having wavelengths between about 3 microns and 1 millimeter; and;
said cells will attenuate microwave radiation having wavelengths between about 1 millimeter and 1 meter. 23. A combined infrared collimator and microwave attenuator according to claim 22 wherein said cells are formed of metal. | A volatile content analysis instrument is disclosed that includes a cavity and a microwave source positioned to produce and direct microwaves into the cavity at frequencies other than infrared frequencies. A balance is included with at least the balance pan (or platform) in the cavity. An infrared source is positioned to produce and direct infrared radiation into the cavity at frequencies other than the microwave frequencies produced by the microwave source. A lens is positioned between the infrared source and the balance pan for more efficiently directing infrared radiation to a sample on the balance pan. The lens has dimensions that preclude microwaves of the frequencies produced by the source and directed into the cavity from leaving the cavity.1. A volatile content analysis instrument comprising:
a cavity; a balance with at least the balance pan in said cavity; an infrared source that is positioned to direct infrared radiation into said cavity; a lens between said infrared source and said balance pan for more efficiently directing infrared radiation to a sample on said balance pan. 2. An instrument according to claim 1 wherein said lens comprises a reflective collimator positioned between said infrared source and said balance pan. 3. An instrument according to claim 2 wherein:
said instrument includes a microwave source that produces and directs microwave radiation into said cavity at frequencies other than the infrared frequencies produced by said infrared source; and
said collimator is a metal opening having dimensions that preclude the microwave frequencies produced by said microwave source from leaving said cavity through said collimator opening. 4. An instrument according to claim 3 further comprising an infrared temperature detector positioned to target a sample on said balance pan. 5. An instrument according to claim 4 further comprising a processor in communication with said infrared source, said microwave source, and said temperature detector, for moderating the application of radiation to a sample in response to the detected temperature. 6. A volatile content analysis instrument comprising:
a cavity; a microwave source positioned to produce and direct microwaves into said cavity at frequencies other than infrared frequencies; a balance with at least the balance pan in the cavity; an infrared source that is positioned to produce and direct infrared radiation into said cavity at frequencies other than the microwave frequencies produced by said microwave source; a lens between said infrared source and said balance pan for more efficiently directing infrared radiation to a sample on said balance pan; and said lens having dimensions that preclude microwaves of the frequencies produced by said source and directed into said cavity from leaving said cavity. 7. An instrument according to claim 6 further comprising an infrared temperature detector positioned to target a sample on said balance pan. 8. An instrument according to claim 7 further comprising a processor in communication with said infrared source, said microwave source, and said temperature detector, for moderating the application of radiation to a sample in response to the detected temperature. 9. An instrument according to claim 6 wherein said lens is a metal opening having dimensions that preclude microwaves produced by said microwave source from leaving said cavity through said lens. 10. An instrument according to claim 6 wherein said lens comprises a plurality of adjoining cells, open at both ends and oriented in a wall of said cavity with the open ends of each said cell generally aligned along a light path defined from said infrared source to said balance pan; and
with the interior walls of said cells having a surface that is sufficiently specular to reflect electromagnetic radiation in the infrared frequencies produced by said infrared source. 11. An instrument according to claim 10 wherein said plurality of adjoining cells are formed of metal. 12. An instrument according to claim 10 wherein said cells have a length-to-opening ratio sufficient to attenuate the microwave frequencies generated by said source and propagated into said cavity. 13. An instrument according to claim 6 further comprising an infrared reflector positioned to direct infrared radiation from said source to said lens. 14. A method of loss-on-drying content measurement comprising:
collimating infrared radiation towards a volatile-containing sample; and concurrently propagating microwave frequencies to the same sample. 15. A method according to claim 14 further comprising attenuating the microwave frequencies at a collimator that collimates the infrared radiation. 16. A method according to claim 14 further comprising collimating the infrared radiation through a microwave attenuator that is sized proportionately to attenuate the concurrently propagated microwave frequencies. 17. A method according to claim 14 further comprising measuring the infrared radiation produced by a heated sample. 18. A method according to claim 17 further comprising adjusting a factor selected from the group consisting of the collimated infrared radiation, the propagated microwaves, and combinations thereof, in response to the measured infrared radiation from the heated sample. 19. A method according to claim 14 further comprising:
weighing the sample before the collimating and microwave propagation steps; and
weighing the sample during the collimating and microwave propagation steps. 20. A method according to claim 14 further comprising:
weighing the sample before the collimating and microwave propagation steps; and
weighing the sample when the sample is dry. 21. A combined infrared collimator and microwave attenuator comprising:
a plurality of adjoining cells, open at both ends and oriented with the open ends of each said cell generally aligned substantially parallel to one another; wherein the interior walls of said cells have surfaces that are sufficiently specular to reflect electromagnetic radiation in the infrared frequencies; and wherein said cells have a length-to-opening ratio sufficient to attenuate electromagnetic radiation within the microwave frequencies. 22. A combined infrared collimator and microwave attenuator according to claim 21 wherein:
said interior wall surfaces will reflect infrared radiation having wavelengths between about 3 microns and 1 millimeter; and;
said cells will attenuate microwave radiation having wavelengths between about 1 millimeter and 1 meter. 23. A combined infrared collimator and microwave attenuator according to claim 22 wherein said cells are formed of metal. | 2,800 |
11,352 | 11,352 | 14,429,904 | 2,842 | DC Power distribution system The invention relates to a DC power distribution system ( 1 ), especially a track lighting system, comprising several power supply units ( 3 ) and an electrical consumer ( 4 ) like a luminaire electrically connected to an electrical conductor ( 2 )being preferentially a power bar. A power consumption information providing system provides power consumption information and a power supply control system controls the power supply units depending on the provided power consumption information. This allows adapting the DC power distribution to the actually required power, i.e. several power supply units can be electrically connected to the electrical conductor, without providing DC power in an inefficient operation condition. Moreover, the installation of the DC power distribution system can be relatively simple, because the installer just needs to attach a number of power supply units to the electrical conductor, which surely prevents an overload condition, wherein the DC power can still be supplied with high efficiency. | 1. A DC power distribution system comprising:
an electrical conductor for guiding DC power from several power supply units to an electrical consumer, the several power supply units for providing DC power to the electrical consumer, wherein the power supply units are electrically connected to the electrical conductor, the electrical consumer being electrically connected to the electrical conductor for receiving the DC power from the several power supply units, a power consumption information providing system for providing power consumption information being indicative of the power consumed by the electrical consumer, the power consumption information providing system comprising several power consumption information providing sub units assigned to the power supply units, wherein a Power consumption information providing sub unit assigned to a power supply unit is configured to determine the power consumption information, and a power supply control system for controlling the power supply units depending on the provided power consumption information, the power supply control system comprising several power supply control sub units assigned to the power supply units, wherein a power supply control sub unit assigned to a power supply unit is configured to control the respective power supply unit depending on the power consumption information determined by the respective power consumption information providing sub unit. 2. The DC power distribution system as defined in claim 1, wherein the DC power distribution system further comprises an electrical consumer control unit for sending commands to the electrical consumer for controlling the electrical consumer and for sending the commands also to the power supply units, and
wherein the power consumption information providing sub unit assigned to a power supply unit is configured to determine the power consumption information based on the sent commands. 3. The DC power distribution system as defined in claim 2, wherein at least one power supply unit is operable in a high power mode, in which higher power is supplied, and in a low power mode, in which lower power is supplied, wherein the respective power supply control sub unit assigned to the power supply unit is adapted to control the power supply unit such that it is in the low power mode, if the power consumption information determined by the respective power consumption information providing sub unit indicates that the electrical consumer requires the lower power or less. 4. The DC power distribution system as defined in claim 2, wherein at least one power supply unit is operable in a high power mode, in which higher power is supplied, and in a low power mode, in which lower power is supplied, wherein the respective power supply control sub unit assigned to the power supply unit is adapted to control the power supply unit such that it is in the high power mode, if the power consumption information determined by the respective power consumption information providing sub unit indicates that the electrical consumer requires more than the lower power. 5. The DC power distribution system as defined in claim 1, wherein the power consumption information providing system comprises, for providing the power consumption information, several output power determination units assigned to the power supply units for determining the output power of the respective power supply unit, wherein the respective power supply unit is adapted to communicate the respective determined output power to the power supply control system for providing the power consumption information to the power supply control system. 6. (canceled) 7. (canceled) 8. (canceled) 9. The DC power distribution system as defined in claim 1, wherein the power supply units are operable in a high power mode, in which higher power is supplied, and in a low power mode, in which lower power is supplied, wherein the power consumption information providing system is adapted to provide the output power supplied by the respective power supply unit as the power consumption information, wherein the power supply control system is adapted to sequentially switch the power supply units to the high power mode depending on the power consumption information, wherein, if for power supply units that have already been switched to the high power mode an output power is provided being larger than a threshold output power, a next power supply unit is switched to the high power mode. 10. The DC power distribution system as defined in claim 1, wherein the power supply units are operable in a high power mode, in which higher power is supplied, and in a low power mode, in which lower power is supplied, wherein the power supply control system is adapted to control the power supply units such that the total times, in which the respective power supply unit is operated in the high power mode, differ by less than a predefined threshold. 11. The DC power distribution system as defined in claim 1, wherein
the power supply units are adapted to send commands being indicative of the power provided by the respective power supply unit and being indicative of additional power providable by the respective power supply unit and to receive the commands, the power consumption information providing sub unit assigned to a power supply unit is adapted to determine the power consumption information based on the commands received by the respective power supply unit, the power supply control sub unit assigned to a power supply unit is adapted to determine the additional power providable by the other power supply units based on the received commands and to control the respective power supply unit depending on the power consumption information determined by the respective power consumption information providing sub unit and on the additional power providable by the other power supply units. 12. The DC power distribution system as defined in claim 1, wherein
a power consumption information providing sub unit assigned to a power supply unit is adapted to determine the power consumption information based on the power provided by the respective power supply unit, a power supply control sub unit assigned to a power supply unit is adapted to control the respective power supply unit depending on the power consumption information determined by the respective power consumption information providing sub unit. 13. A power supply control system for being used in a DC power distribution system as defined in claim 1, wherein the power supply control system is configured to control the power supply units of the DC power distribution system depending on the provided power consumption information. 14. A DC power distribution method comprising:
providing DC power to an electrical consumer by several power supply units via an electrical conductor to which the power supply units and the electrical consumer are electrically connected, receiving the DC power from the several power supply units via the electrical conductor by the electrical consumer, providing power consumption information being indicative of the power consumed by the electrical consumer by a power consumption information providing system, the power consumption information providing system comprising several power consumption information providing sub units assigned to the power supply units, wherein a power consumption information providing sub unit assigned to a power supply unit determines the power consumption information, and controlling the power supply units depending on the provided power consumption information by a power supply control system, the power supply control system comprising several power supply control sub units assigned to the power supply units, wherein a power supply control sub unit assigned to a power supply unit controls the respective power supply unit depending on the power consumption information determined by the respective power consumption information providing sub unit. 15. A DC power distribution computer program, the DC power distribution computer program comprising program code means for causing a DC power distribution system as defined in claim 1 to carry out the steps of the DC power distribution method, when the DC power distribution computer program is run on a computer controlling the DC power distribution system. | DC Power distribution system The invention relates to a DC power distribution system ( 1 ), especially a track lighting system, comprising several power supply units ( 3 ) and an electrical consumer ( 4 ) like a luminaire electrically connected to an electrical conductor ( 2 )being preferentially a power bar. A power consumption information providing system provides power consumption information and a power supply control system controls the power supply units depending on the provided power consumption information. This allows adapting the DC power distribution to the actually required power, i.e. several power supply units can be electrically connected to the electrical conductor, without providing DC power in an inefficient operation condition. Moreover, the installation of the DC power distribution system can be relatively simple, because the installer just needs to attach a number of power supply units to the electrical conductor, which surely prevents an overload condition, wherein the DC power can still be supplied with high efficiency.1. A DC power distribution system comprising:
an electrical conductor for guiding DC power from several power supply units to an electrical consumer, the several power supply units for providing DC power to the electrical consumer, wherein the power supply units are electrically connected to the electrical conductor, the electrical consumer being electrically connected to the electrical conductor for receiving the DC power from the several power supply units, a power consumption information providing system for providing power consumption information being indicative of the power consumed by the electrical consumer, the power consumption information providing system comprising several power consumption information providing sub units assigned to the power supply units, wherein a Power consumption information providing sub unit assigned to a power supply unit is configured to determine the power consumption information, and a power supply control system for controlling the power supply units depending on the provided power consumption information, the power supply control system comprising several power supply control sub units assigned to the power supply units, wherein a power supply control sub unit assigned to a power supply unit is configured to control the respective power supply unit depending on the power consumption information determined by the respective power consumption information providing sub unit. 2. The DC power distribution system as defined in claim 1, wherein the DC power distribution system further comprises an electrical consumer control unit for sending commands to the electrical consumer for controlling the electrical consumer and for sending the commands also to the power supply units, and
wherein the power consumption information providing sub unit assigned to a power supply unit is configured to determine the power consumption information based on the sent commands. 3. The DC power distribution system as defined in claim 2, wherein at least one power supply unit is operable in a high power mode, in which higher power is supplied, and in a low power mode, in which lower power is supplied, wherein the respective power supply control sub unit assigned to the power supply unit is adapted to control the power supply unit such that it is in the low power mode, if the power consumption information determined by the respective power consumption information providing sub unit indicates that the electrical consumer requires the lower power or less. 4. The DC power distribution system as defined in claim 2, wherein at least one power supply unit is operable in a high power mode, in which higher power is supplied, and in a low power mode, in which lower power is supplied, wherein the respective power supply control sub unit assigned to the power supply unit is adapted to control the power supply unit such that it is in the high power mode, if the power consumption information determined by the respective power consumption information providing sub unit indicates that the electrical consumer requires more than the lower power. 5. The DC power distribution system as defined in claim 1, wherein the power consumption information providing system comprises, for providing the power consumption information, several output power determination units assigned to the power supply units for determining the output power of the respective power supply unit, wherein the respective power supply unit is adapted to communicate the respective determined output power to the power supply control system for providing the power consumption information to the power supply control system. 6. (canceled) 7. (canceled) 8. (canceled) 9. The DC power distribution system as defined in claim 1, wherein the power supply units are operable in a high power mode, in which higher power is supplied, and in a low power mode, in which lower power is supplied, wherein the power consumption information providing system is adapted to provide the output power supplied by the respective power supply unit as the power consumption information, wherein the power supply control system is adapted to sequentially switch the power supply units to the high power mode depending on the power consumption information, wherein, if for power supply units that have already been switched to the high power mode an output power is provided being larger than a threshold output power, a next power supply unit is switched to the high power mode. 10. The DC power distribution system as defined in claim 1, wherein the power supply units are operable in a high power mode, in which higher power is supplied, and in a low power mode, in which lower power is supplied, wherein the power supply control system is adapted to control the power supply units such that the total times, in which the respective power supply unit is operated in the high power mode, differ by less than a predefined threshold. 11. The DC power distribution system as defined in claim 1, wherein
the power supply units are adapted to send commands being indicative of the power provided by the respective power supply unit and being indicative of additional power providable by the respective power supply unit and to receive the commands, the power consumption information providing sub unit assigned to a power supply unit is adapted to determine the power consumption information based on the commands received by the respective power supply unit, the power supply control sub unit assigned to a power supply unit is adapted to determine the additional power providable by the other power supply units based on the received commands and to control the respective power supply unit depending on the power consumption information determined by the respective power consumption information providing sub unit and on the additional power providable by the other power supply units. 12. The DC power distribution system as defined in claim 1, wherein
a power consumption information providing sub unit assigned to a power supply unit is adapted to determine the power consumption information based on the power provided by the respective power supply unit, a power supply control sub unit assigned to a power supply unit is adapted to control the respective power supply unit depending on the power consumption information determined by the respective power consumption information providing sub unit. 13. A power supply control system for being used in a DC power distribution system as defined in claim 1, wherein the power supply control system is configured to control the power supply units of the DC power distribution system depending on the provided power consumption information. 14. A DC power distribution method comprising:
providing DC power to an electrical consumer by several power supply units via an electrical conductor to which the power supply units and the electrical consumer are electrically connected, receiving the DC power from the several power supply units via the electrical conductor by the electrical consumer, providing power consumption information being indicative of the power consumed by the electrical consumer by a power consumption information providing system, the power consumption information providing system comprising several power consumption information providing sub units assigned to the power supply units, wherein a power consumption information providing sub unit assigned to a power supply unit determines the power consumption information, and controlling the power supply units depending on the provided power consumption information by a power supply control system, the power supply control system comprising several power supply control sub units assigned to the power supply units, wherein a power supply control sub unit assigned to a power supply unit controls the respective power supply unit depending on the power consumption information determined by the respective power consumption information providing sub unit. 15. A DC power distribution computer program, the DC power distribution computer program comprising program code means for causing a DC power distribution system as defined in claim 1 to carry out the steps of the DC power distribution method, when the DC power distribution computer program is run on a computer controlling the DC power distribution system. | 2,800 |
11,353 | 11,353 | 14,938,444 | 2,847 | A microcircuit deposition system incorporates a first printing engine for depositing a dielectric on a substrate. A microwire spooling machine houses a microwire spool and incorporates a tension guide to position a microwire trace onto the dielectric layer. A second printing engine trails the microwire spooling machine to deposit a covering dielectric layer over the microwire trace. | 1. A microwire circuit comprising:
a first dielectric layer printed on a substrate with a direct write system; a drawn microwire trace positioned on the dielectric layer and adhered thereto; and, a second dielectric layer printed with a second direct write system over the drawn microwire trace. 2. The microwire circuit as defined in claim 1 wherein the second dielectric layer contains interconnection gaps introduced by the second direct write system. 3. The microwire circuit as defined in claim 2 wherein the first dielectric layer contains interconnection gaps introduced by the direct write system. 4. The microwire circuit as defined in claim 2 further comprising conducting ink direct printed for circuit interconnection through the gaps in the second dielectric layer. 5. The microwire circuit as defined in claim 1 wherein the substrate comprises a composite skin. 6. The microwire circuit as defined in claim 5 wherein the composite skin is an unmanned aerial vehicle (UAV) skin. 7. The microwire circuit as defined in claim 1 wherein the dielectric layer remains tacky from printing to provide an adhesive effect and the microwire trace is constrained in the tacky dielectric layer. 8. The microwire circuit as defined in claim 1 wherein the printed dielectric layer and second dielectric layer are ultraviolet (UV) cured. 9. A drawn microwire circuit deposition system comprising:
a first printing engine interruptibly depositing a dielectric with a UV sensitive polymer base on a substrate; a microwire spooling machine connected to track the first printing engine and housing a spool containing microwire and incorporating a tension guide to position a microwire trace onto the dielectric layer, said microwire drawn from the spool and fed through a set of feed rollers and wherein the microwire trace is deposited onto the dielectric layer while still tacky from printing to provide an adhesive effect in constraining the microwire trace, said spooling machine further incorporating a guide bale to orient and guide the microwire from the feed rollers for placement onto the dielectric, a tensioning guide to provide the desired linearity of the trace and a cutter to sever the microwire trace at a desired length; a UV source connected to track the spooling machine for curing of the dielectric layer with adhered microwire trace; a second printing engine connected to track the microwire spooling machine to interruptibly deposit a covering dielectric layer with a UV sensitive polymer base over the microwire trace; a second UV source connected to track the spooling machine for curing of the covering dielectric layer. 10. The microwire circuit as defined in claim 3 wherein the substrate is a conductive material. 11. The microwire circuit as defined in claim 1 wherein the drawn microwire trace is oriented by a guide bale. 12. The microwire circuit as defined in claim 11 wherein the drawn microwire trace is drawn through feed rollers from a dispensing spool. 13. The microwire circuit as defined in claim 11 wherein the drawn microwire trace is severed at a termination by a transverse cutter. 14. The microwire circuit as defined in claim 13 wherein a tail of the drawn microwire trace is engaged by a positioning foot to urge contact with the first dielectric layer. 15. The drawn microwire circuit deposition system as defined in claim 9 further comprising a positioning foot adapted to engage a tail of the microwire trace to urge the tail into contact with the first dielectric layer. 16. The drawn microwire circuit deposition system as defined in claim 15 wherein the positioning foot is movable vertically in a telescoping fitting. 17. The drawn microwire circuit deposition system as defined in claim 16 wherein the telescoping fitting is roller mounted in a track allowing lateral motion of the foot. 18. The drawn microwire circuit deposition system as defined in claim 17 wherein the positioning foot may be withdrawn and the tensioning guide maintains tension in the microwire trace. 19. The drawn microwire circuit deposition system as defined in claim 9 wherein the second printing engine is interruptible to produce gaps in the second dielectric layer whereby cross connection with subsequently printed traces is achieved. 20. The drawn microwire circuit deposition system as defined in claim 9 wherein the substrate incorporates conductive materials and the first printing engine interuptibly deposits the dielectric whereby the microwire trace deposited on the dielectric circuit has interconnection with the conductive materials on the substrate. | A microcircuit deposition system incorporates a first printing engine for depositing a dielectric on a substrate. A microwire spooling machine houses a microwire spool and incorporates a tension guide to position a microwire trace onto the dielectric layer. A second printing engine trails the microwire spooling machine to deposit a covering dielectric layer over the microwire trace.1. A microwire circuit comprising:
a first dielectric layer printed on a substrate with a direct write system; a drawn microwire trace positioned on the dielectric layer and adhered thereto; and, a second dielectric layer printed with a second direct write system over the drawn microwire trace. 2. The microwire circuit as defined in claim 1 wherein the second dielectric layer contains interconnection gaps introduced by the second direct write system. 3. The microwire circuit as defined in claim 2 wherein the first dielectric layer contains interconnection gaps introduced by the direct write system. 4. The microwire circuit as defined in claim 2 further comprising conducting ink direct printed for circuit interconnection through the gaps in the second dielectric layer. 5. The microwire circuit as defined in claim 1 wherein the substrate comprises a composite skin. 6. The microwire circuit as defined in claim 5 wherein the composite skin is an unmanned aerial vehicle (UAV) skin. 7. The microwire circuit as defined in claim 1 wherein the dielectric layer remains tacky from printing to provide an adhesive effect and the microwire trace is constrained in the tacky dielectric layer. 8. The microwire circuit as defined in claim 1 wherein the printed dielectric layer and second dielectric layer are ultraviolet (UV) cured. 9. A drawn microwire circuit deposition system comprising:
a first printing engine interruptibly depositing a dielectric with a UV sensitive polymer base on a substrate; a microwire spooling machine connected to track the first printing engine and housing a spool containing microwire and incorporating a tension guide to position a microwire trace onto the dielectric layer, said microwire drawn from the spool and fed through a set of feed rollers and wherein the microwire trace is deposited onto the dielectric layer while still tacky from printing to provide an adhesive effect in constraining the microwire trace, said spooling machine further incorporating a guide bale to orient and guide the microwire from the feed rollers for placement onto the dielectric, a tensioning guide to provide the desired linearity of the trace and a cutter to sever the microwire trace at a desired length; a UV source connected to track the spooling machine for curing of the dielectric layer with adhered microwire trace; a second printing engine connected to track the microwire spooling machine to interruptibly deposit a covering dielectric layer with a UV sensitive polymer base over the microwire trace; a second UV source connected to track the spooling machine for curing of the covering dielectric layer. 10. The microwire circuit as defined in claim 3 wherein the substrate is a conductive material. 11. The microwire circuit as defined in claim 1 wherein the drawn microwire trace is oriented by a guide bale. 12. The microwire circuit as defined in claim 11 wherein the drawn microwire trace is drawn through feed rollers from a dispensing spool. 13. The microwire circuit as defined in claim 11 wherein the drawn microwire trace is severed at a termination by a transverse cutter. 14. The microwire circuit as defined in claim 13 wherein a tail of the drawn microwire trace is engaged by a positioning foot to urge contact with the first dielectric layer. 15. The drawn microwire circuit deposition system as defined in claim 9 further comprising a positioning foot adapted to engage a tail of the microwire trace to urge the tail into contact with the first dielectric layer. 16. The drawn microwire circuit deposition system as defined in claim 15 wherein the positioning foot is movable vertically in a telescoping fitting. 17. The drawn microwire circuit deposition system as defined in claim 16 wherein the telescoping fitting is roller mounted in a track allowing lateral motion of the foot. 18. The drawn microwire circuit deposition system as defined in claim 17 wherein the positioning foot may be withdrawn and the tensioning guide maintains tension in the microwire trace. 19. The drawn microwire circuit deposition system as defined in claim 9 wherein the second printing engine is interruptible to produce gaps in the second dielectric layer whereby cross connection with subsequently printed traces is achieved. 20. The drawn microwire circuit deposition system as defined in claim 9 wherein the substrate incorporates conductive materials and the first printing engine interuptibly deposits the dielectric whereby the microwire trace deposited on the dielectric circuit has interconnection with the conductive materials on the substrate. | 2,800 |
11,354 | 11,354 | 14,812,907 | 2,858 | An embodiment of a magnetic-field sensor includes a magnetic-field sensor arrangement and a magnetic body which has, for example, a non-convex cross-sectional area with regard to a cross-sectional plane running through the magnetic body, the magnetic body having an inhomogeneous magnetization. | 1. A magnetic-field sensor comprising:
a magnetic-field sensor arrangement; and a back-bias magnet, the back-bias magnet comprising an inhomogeneous magnetization. 2. The magnetic-field sensor as claimed in claim 1, wherein the back-bias magnet is moldable as unitary member and of cuboidal shape, circular shape, elliptical, or frustum shape. 3. The magnetic-field sensor as claimed in claim 2, wherein the back-bias magnet comprises materials selected from the group consisting of ferrites, aluminum-nickel-cobalt (AlNiCo), samarium-cobalt (SmCo) and neodymium-iron-boron (NdFeB). 4. The magnetic-field sensor as claimed in claim 1, wherein the inhomogeneous magnetization of the back-bias magnet is symmetrical to a first symmetry line within at least one cross-section of the back-bias magnet. 5. The magnetic-field sensor as claimed in claim 4, wherein the first symmetry line is a symmetry line of a substantially mirror-symmetrical inhomogeneous magnetization within the at least one cross-section of the back-bias magnet. 6. The magnetic-field sensor as claimed in claim 4, wherein the first symmetry line within the at least one cross-section of the back-bias magnet is a symmetry line of higher order, rotational symmetry, or ellipsoidal symmetry. 7. The magnetic-field sensor as claimed in claim 4, wherein the inhomogeneous magnetization is further symmetrical to the symmetry line within a further cross-section of the back-bias magnet, the further cross-section intersecting the cross-section at the symmetry line. 8. The magnetic-field sensor as claimed in claim 1, wherein the inhomogeneous magnetization of the back-bias magnet causes a magnetic flux density outside the back-bias magnet. 9. The magnetic-field sensor as claimed in claim 3, wherein magnetic flux caused by the magnetization is substantially not confined to an inside of the back-bias magnet. 10. The magnetic-field sensor as claimed in claim 1, wherein the back-bias magnet comprises the inhomogeneous magnetization in at least 50% of a volume of the back-bias magnet. 11. The magnetic-field sensor as claimed in claim 4, wherein the at least one cross-section is spanned by a first direction and a second direction, the first and second direction not being parallel, and
wherein when walking along the second direction for a given coordinate value for the first direction, an angle between the second direction and a local direction of magnetization varies at least over a portion of a walking path, the walking path being different from the first symmetry line. 12. The magnetic-field sensor as claimed in claim 11, wherein the angle varies monotonously when walking along the walking path. 13. The magnetic-field sensor as claimed in claim 11, wherein the angle varies non-monotonously when walking along the walking path, if the walking path runs perpendicular to the symmetry line. 14. The magnetic-field sensor as claimed in claim 1, wherein the magnetic-field sensor arrangement comprises a first magnetic-field sensor element and a second magnetic-field sensor element, the first magnetic-field sensor element being arranged, with respect to the back-bias magnet, such that the first magnetic-field sensor element is exposed, with regard to a predetermined spatial direction, to a magnetic flux density caused by the back-bias magnet and being within a first flux density range, and the second magnetic-field sensor element being arranged, with respect to the back-bias magnet, such that the second magnetic-field sensor element is exposed, with regard to the predetermined spatial direction, to a magnetic flux density caused by the back-bias magnet and being within a second flux density range. 15. The magnetic-field sensor as claimed in claim 14, wherein the first flux density range and the second flux density range enable operation of the first and second magnetic-field sensor elements outside a saturation range. 16. The magnetic-field sensor as claimed in claim 14, wherein the first and second flux density ranges only comprise values smaller than or equal to 20 mT in magnitude. 17. The magnetic-field sensor as claimed in claim 14, wherein the first flux density range comprises flux densities of opposite sign to the second flux density range. 18. The magnetic-field sensor as claimed in claim 15, wherein the first and second magnetic-field sensor elements are magneto-resistive sensor elements. 19. The magnetic-field sensor as claimed in claim 15, wherein the first and second magnetic-field sensor elements are arranged on a substrate, and wherein the predetermined spatial direction is substantially parallel to a main surface of the substrate. 20. The magnetic-field sensor as claimed in claim 1, wherein the back-bias magnet is annular or comprises an annular section. | An embodiment of a magnetic-field sensor includes a magnetic-field sensor arrangement and a magnetic body which has, for example, a non-convex cross-sectional area with regard to a cross-sectional plane running through the magnetic body, the magnetic body having an inhomogeneous magnetization.1. A magnetic-field sensor comprising:
a magnetic-field sensor arrangement; and a back-bias magnet, the back-bias magnet comprising an inhomogeneous magnetization. 2. The magnetic-field sensor as claimed in claim 1, wherein the back-bias magnet is moldable as unitary member and of cuboidal shape, circular shape, elliptical, or frustum shape. 3. The magnetic-field sensor as claimed in claim 2, wherein the back-bias magnet comprises materials selected from the group consisting of ferrites, aluminum-nickel-cobalt (AlNiCo), samarium-cobalt (SmCo) and neodymium-iron-boron (NdFeB). 4. The magnetic-field sensor as claimed in claim 1, wherein the inhomogeneous magnetization of the back-bias magnet is symmetrical to a first symmetry line within at least one cross-section of the back-bias magnet. 5. The magnetic-field sensor as claimed in claim 4, wherein the first symmetry line is a symmetry line of a substantially mirror-symmetrical inhomogeneous magnetization within the at least one cross-section of the back-bias magnet. 6. The magnetic-field sensor as claimed in claim 4, wherein the first symmetry line within the at least one cross-section of the back-bias magnet is a symmetry line of higher order, rotational symmetry, or ellipsoidal symmetry. 7. The magnetic-field sensor as claimed in claim 4, wherein the inhomogeneous magnetization is further symmetrical to the symmetry line within a further cross-section of the back-bias magnet, the further cross-section intersecting the cross-section at the symmetry line. 8. The magnetic-field sensor as claimed in claim 1, wherein the inhomogeneous magnetization of the back-bias magnet causes a magnetic flux density outside the back-bias magnet. 9. The magnetic-field sensor as claimed in claim 3, wherein magnetic flux caused by the magnetization is substantially not confined to an inside of the back-bias magnet. 10. The magnetic-field sensor as claimed in claim 1, wherein the back-bias magnet comprises the inhomogeneous magnetization in at least 50% of a volume of the back-bias magnet. 11. The magnetic-field sensor as claimed in claim 4, wherein the at least one cross-section is spanned by a first direction and a second direction, the first and second direction not being parallel, and
wherein when walking along the second direction for a given coordinate value for the first direction, an angle between the second direction and a local direction of magnetization varies at least over a portion of a walking path, the walking path being different from the first symmetry line. 12. The magnetic-field sensor as claimed in claim 11, wherein the angle varies monotonously when walking along the walking path. 13. The magnetic-field sensor as claimed in claim 11, wherein the angle varies non-monotonously when walking along the walking path, if the walking path runs perpendicular to the symmetry line. 14. The magnetic-field sensor as claimed in claim 1, wherein the magnetic-field sensor arrangement comprises a first magnetic-field sensor element and a second magnetic-field sensor element, the first magnetic-field sensor element being arranged, with respect to the back-bias magnet, such that the first magnetic-field sensor element is exposed, with regard to a predetermined spatial direction, to a magnetic flux density caused by the back-bias magnet and being within a first flux density range, and the second magnetic-field sensor element being arranged, with respect to the back-bias magnet, such that the second magnetic-field sensor element is exposed, with regard to the predetermined spatial direction, to a magnetic flux density caused by the back-bias magnet and being within a second flux density range. 15. The magnetic-field sensor as claimed in claim 14, wherein the first flux density range and the second flux density range enable operation of the first and second magnetic-field sensor elements outside a saturation range. 16. The magnetic-field sensor as claimed in claim 14, wherein the first and second flux density ranges only comprise values smaller than or equal to 20 mT in magnitude. 17. The magnetic-field sensor as claimed in claim 14, wherein the first flux density range comprises flux densities of opposite sign to the second flux density range. 18. The magnetic-field sensor as claimed in claim 15, wherein the first and second magnetic-field sensor elements are magneto-resistive sensor elements. 19. The magnetic-field sensor as claimed in claim 15, wherein the first and second magnetic-field sensor elements are arranged on a substrate, and wherein the predetermined spatial direction is substantially parallel to a main surface of the substrate. 20. The magnetic-field sensor as claimed in claim 1, wherein the back-bias magnet is annular or comprises an annular section. | 2,800 |
11,355 | 11,355 | 15,198,640 | 2,829 | An organic light emitting device having a structure that a plurality of light emitting units are deposited, is disclosed, of which white color shift caused by variation of a viewing angle is reduced through a combination between dopant materials of the respective light emitting units. The organic light emitting device includes dopant materials emitting light of different wavelengths from the plurality of light emitting units. Therefore, in the organic light emitting device, variation of color and luminance, which is perceived by a user as a viewing angle is varied, may be reduced. | 1. An organic light emitting device, comprising:
an anode and a cathode, which are spaced apart from each other to face each other; and a first light emitting unit including a first organic light emitting layer, a charge generating layer, and a second light unit including a second organic light emitting layer, which are between the anode and the cathode, wherein a main dopant material is doped on any one of the first organic light emitting layer and the second organic light emitting layer, and an auxiliary dopant material emitting the same colored light as that of the main dopant material is doped on the other one among the first organic light emitting layer or the second organic light emitting layer having the main dopant material doped thereon, and a photoluminescence (PL) peak of the main dopant material is in the range of 0 nm to 15 nm from a PL peak of the auxiliary dopant material. 2. The organic light emitting device of claim 1, wherein the PL peak of the main dopant material is located in a relatively long wavelength zone within the range of 0 nm to 15 nm as compared with the PL peak of the auxiliary dopant material. 3. The organic light emitting device of claim 1, wherein a peak of an out-coupling emittance spectrum curve at a viewing angle of 0° of the organic light emitting device is closer to the PL peak of the main dopant material than the PL peak of the auxiliary dopant material. 4. The organic light emitting device of claim 1, wherein a peak of an out-coupling emittance spectrum curve at a viewing angle of 60° of the organic light emitting device is closer to the PL peak of the auxiliary dopant material than the PL peak of the main dopant material. 5. The organic light emitting device of claim 3, wherein the first light emitting unit is located closer to the anode than the second light emitting unit, and the main dopant material is doped on a first host material of the first organic light emitting layer while the auxiliary dopant material is doped on a second host material of the second organic light emitting layer. 6. The organic light emitting device of claim 1, wherein a color of light emitted from the first light emitting unit is the same as that of light emitted from the second light emitting unit. 7. The organic light emitting device of claim 6, wherein the main dopant material is different from that of the auxiliary dopant material. 8. The organic light emitting device of claim 1, wherein a color of light emitted from the first light emitting unit and the second light emitting unit is blue, and a wavelength difference between the PL peak of the main dopant material and the PL peak of the auxiliary dopant material is between 0 nm and 4 nm. 9. The organic light emitting device of claim 8, wherein the main dopant material is included in the first organic light emitting layer, and the second light emitting unit is located closer to the cathode than the first light emitting unit. 10. The organic light emitting device of claim 1, wherein a color of light emitted from the first light emitting unit and the second light emitting unit is green, and a wavelength difference between the PL peak of the main dopant material and the PL peak of the auxiliary dopant material is between 0 nm and 6 nm. 11. The organic light emitting device of claim 10, wherein the main dopant material is included in the first organic light emitting layer, and the second light emitting unit is located closer to the cathode than the first light emitting unit. 12. The organic light emitting device of claim 1, wherein a color of light emitted from the first light emitting unit and the second light emitting unit is red, and a wavelength difference between the PL peak of the main dopant material and the PL peak of the auxiliary dopant material is between 0 nm and 12 nm. 13. The organic light emitting device of claim 12, wherein the main dopant material is included in the first organic light emitting layer, and the second light emitting unit is located closer to the cathode than the first light emitting unit. 14. The organic light emitting device of claim 1, wherein the organic light emitting device is a top emission organic light emitting device. 15. An organic light emitting device, comprising:
a red sub organic light emitting device, which includes a first red light emitting unit, a charge generating layer and a second red light emitting unit; a green sub organic light emitting device, which includes a first green light emitting unit, a charge generating layer and a second green light emitting unit; and a blue sub organic light emitting device, which includes a first blue light emitting unit, a charge generating layer and a second blue light emitting unit, wherein the first red light emitting unit includes a first red organic light emitting layer doped with a red main dopant material, the second red light emitting unit includes a second red organic light emitting layer doped with a red auxiliary dopant material, the first green light emitting unit includes a first green organic light emitting layer doped with a green main dopant material, the second green light emitting unit includes a second green organic light emitting layer doped with a green auxiliary dopant material, the first blue light emitting unit includes a first blue organic light emitting layer doped with a blue main dopant material, the second blue light emitting unit includes a second blue organic light emitting layer doped with a blue auxiliary dopant material, and at least one among XR, XG, and XB is greater than 0 (zero) when an absolute value of a difference between a PL peak wavelength of the red main dopant material and a photoluminescence (PL) peak wavelength of the red auxiliary dopant material is XR, an absolute value of a difference between a PL peak wavelength of the green main dopant material and a PL peak wavelength of the green auxiliary dopant material is XG, and an absolute value of a difference between a PL peak wavelength of the blue main dopant material and a PL peak wavelength of the blue auxiliary dopant material is XB. 16. The organic light emitting device of claim 15, wherein XR, XG, and XB satisfy XR>XG>XB. 17. The organic light emitting device of claim 16, wherein XB satisfies XB>0 (zero). 18. The organic light emitting device of claim 15, wherein the red sub organic light emitting device further includes an anode and a cathode, the first red light emitting unit, the charge generating layer and the second red light emitting unit of the red sub organic light emitting device are sequentially between the anode and the cathode, and the PL peak wavelength of the red auxiliary dopant material is located in a shorter wavelength zone than that of the PL peak wavelength of the red main dopant material. 19. The organic light emitting device of claim 15, wherein the green sub organic light emitting device further includes an anode and a cathode, wherein the first green light emitting unit, the charge generating layer and the second green light emitting unit of the green sub organic light emitting device are sequentially between the anode and the cathode, and the PL peak wavelength of the green auxiliary dopant material is located in a shorter wavelength zone than that of the PL peak wavelength of the green main dopant material. 20. The organic light emitting device of claim 15, wherein the blue sub organic light emitting device further includes an anode and a cathode, wherein the first blue light emitting unit, the charge generating layer and the second blue light emitting unit of the blue sub organic light emitting device are sequentially between the anode and the cathode, and the PL peak wavelength of the blue auxiliary dopant material is located in a shorter wavelength zone than that of the PL peak wavelength of the blue main dopant material. | An organic light emitting device having a structure that a plurality of light emitting units are deposited, is disclosed, of which white color shift caused by variation of a viewing angle is reduced through a combination between dopant materials of the respective light emitting units. The organic light emitting device includes dopant materials emitting light of different wavelengths from the plurality of light emitting units. Therefore, in the organic light emitting device, variation of color and luminance, which is perceived by a user as a viewing angle is varied, may be reduced.1. An organic light emitting device, comprising:
an anode and a cathode, which are spaced apart from each other to face each other; and a first light emitting unit including a first organic light emitting layer, a charge generating layer, and a second light unit including a second organic light emitting layer, which are between the anode and the cathode, wherein a main dopant material is doped on any one of the first organic light emitting layer and the second organic light emitting layer, and an auxiliary dopant material emitting the same colored light as that of the main dopant material is doped on the other one among the first organic light emitting layer or the second organic light emitting layer having the main dopant material doped thereon, and a photoluminescence (PL) peak of the main dopant material is in the range of 0 nm to 15 nm from a PL peak of the auxiliary dopant material. 2. The organic light emitting device of claim 1, wherein the PL peak of the main dopant material is located in a relatively long wavelength zone within the range of 0 nm to 15 nm as compared with the PL peak of the auxiliary dopant material. 3. The organic light emitting device of claim 1, wherein a peak of an out-coupling emittance spectrum curve at a viewing angle of 0° of the organic light emitting device is closer to the PL peak of the main dopant material than the PL peak of the auxiliary dopant material. 4. The organic light emitting device of claim 1, wherein a peak of an out-coupling emittance spectrum curve at a viewing angle of 60° of the organic light emitting device is closer to the PL peak of the auxiliary dopant material than the PL peak of the main dopant material. 5. The organic light emitting device of claim 3, wherein the first light emitting unit is located closer to the anode than the second light emitting unit, and the main dopant material is doped on a first host material of the first organic light emitting layer while the auxiliary dopant material is doped on a second host material of the second organic light emitting layer. 6. The organic light emitting device of claim 1, wherein a color of light emitted from the first light emitting unit is the same as that of light emitted from the second light emitting unit. 7. The organic light emitting device of claim 6, wherein the main dopant material is different from that of the auxiliary dopant material. 8. The organic light emitting device of claim 1, wherein a color of light emitted from the first light emitting unit and the second light emitting unit is blue, and a wavelength difference between the PL peak of the main dopant material and the PL peak of the auxiliary dopant material is between 0 nm and 4 nm. 9. The organic light emitting device of claim 8, wherein the main dopant material is included in the first organic light emitting layer, and the second light emitting unit is located closer to the cathode than the first light emitting unit. 10. The organic light emitting device of claim 1, wherein a color of light emitted from the first light emitting unit and the second light emitting unit is green, and a wavelength difference between the PL peak of the main dopant material and the PL peak of the auxiliary dopant material is between 0 nm and 6 nm. 11. The organic light emitting device of claim 10, wherein the main dopant material is included in the first organic light emitting layer, and the second light emitting unit is located closer to the cathode than the first light emitting unit. 12. The organic light emitting device of claim 1, wherein a color of light emitted from the first light emitting unit and the second light emitting unit is red, and a wavelength difference between the PL peak of the main dopant material and the PL peak of the auxiliary dopant material is between 0 nm and 12 nm. 13. The organic light emitting device of claim 12, wherein the main dopant material is included in the first organic light emitting layer, and the second light emitting unit is located closer to the cathode than the first light emitting unit. 14. The organic light emitting device of claim 1, wherein the organic light emitting device is a top emission organic light emitting device. 15. An organic light emitting device, comprising:
a red sub organic light emitting device, which includes a first red light emitting unit, a charge generating layer and a second red light emitting unit; a green sub organic light emitting device, which includes a first green light emitting unit, a charge generating layer and a second green light emitting unit; and a blue sub organic light emitting device, which includes a first blue light emitting unit, a charge generating layer and a second blue light emitting unit, wherein the first red light emitting unit includes a first red organic light emitting layer doped with a red main dopant material, the second red light emitting unit includes a second red organic light emitting layer doped with a red auxiliary dopant material, the first green light emitting unit includes a first green organic light emitting layer doped with a green main dopant material, the second green light emitting unit includes a second green organic light emitting layer doped with a green auxiliary dopant material, the first blue light emitting unit includes a first blue organic light emitting layer doped with a blue main dopant material, the second blue light emitting unit includes a second blue organic light emitting layer doped with a blue auxiliary dopant material, and at least one among XR, XG, and XB is greater than 0 (zero) when an absolute value of a difference between a PL peak wavelength of the red main dopant material and a photoluminescence (PL) peak wavelength of the red auxiliary dopant material is XR, an absolute value of a difference between a PL peak wavelength of the green main dopant material and a PL peak wavelength of the green auxiliary dopant material is XG, and an absolute value of a difference between a PL peak wavelength of the blue main dopant material and a PL peak wavelength of the blue auxiliary dopant material is XB. 16. The organic light emitting device of claim 15, wherein XR, XG, and XB satisfy XR>XG>XB. 17. The organic light emitting device of claim 16, wherein XB satisfies XB>0 (zero). 18. The organic light emitting device of claim 15, wherein the red sub organic light emitting device further includes an anode and a cathode, the first red light emitting unit, the charge generating layer and the second red light emitting unit of the red sub organic light emitting device are sequentially between the anode and the cathode, and the PL peak wavelength of the red auxiliary dopant material is located in a shorter wavelength zone than that of the PL peak wavelength of the red main dopant material. 19. The organic light emitting device of claim 15, wherein the green sub organic light emitting device further includes an anode and a cathode, wherein the first green light emitting unit, the charge generating layer and the second green light emitting unit of the green sub organic light emitting device are sequentially between the anode and the cathode, and the PL peak wavelength of the green auxiliary dopant material is located in a shorter wavelength zone than that of the PL peak wavelength of the green main dopant material. 20. The organic light emitting device of claim 15, wherein the blue sub organic light emitting device further includes an anode and a cathode, wherein the first blue light emitting unit, the charge generating layer and the second blue light emitting unit of the blue sub organic light emitting device are sequentially between the anode and the cathode, and the PL peak wavelength of the blue auxiliary dopant material is located in a shorter wavelength zone than that of the PL peak wavelength of the blue main dopant material. | 2,800 |
11,356 | 11,356 | 15,259,746 | 2,883 | A fiber optic cable includes a core and a jacket surrounding the core. The jacket includes a base layer, a surface layer defining an exterior surface of the fiber optic cable, and an interface between the surface and base layers. The base layer is formed from a first composition that includes polyethylene. The surface layer has a thickness of at least 300 micrometers and is formed from a second composition that differs from the first composition. The second composition includes polyethylene as well as one or more additives, including paracrystalline carbon. The interface cohesively bonds the surface and base layers to one another at least in part due to molecular chain entanglement of the polyethylene of the first and second compositions. | 1. A fiber optic cable, comprising:
a core comprising:
at least one optical fiber; and
one or more of the following: a strength element, a tubular element, a binding element, a water-blocking element, a flame-retardant element, armor, and another optical fiber;
a jacket surrounding the core, the jacket comprising:
a base layer formed from a first composition, wherein the first composition comprises polyethylene; and
a surface layer defining an exterior surface of the fiber optic cable, wherein the surface layer has a thickness of at least about 300 micrometers, wherein the surface layer is formed from a second composition that differs from the first composition, wherein the second composition comprises polyethylene, wherein the second composition comprises one or more additives comprising paracrystalline carbon, and wherein the paracrystalline carbon is concentrated in the surface layer such that the second composition has a percentage by volume of the paracrystalline carbon that is at least ten times greater than the percentage by volume thereof in the first composition; and
an interface between the surface and base layers, the interface cohesively bonding the surface and base layers to one another at least in part due to molecular chain entanglement of the polyethylene of the first and second compositions. 2. The cable of claim 1, wherein the polyethylene of the second composition has a higher density than the polyethylene of the first composition. 3. The cable of claim 2, wherein the density of the polyethylene of the second composition is in the range of about 0.93 to 0.97 g/cm3 and the density of the polyethylene of the first composition is in the range of about 0.91 to 0.94 g/cm3. 4. The cable of claim 1, wherein the cohesive bond between the base and surface layers at the interface is at least half as great as the internal tear strength of either the first or second composition. 5. The cable of claim 1, wherein the paracrystalline carbon comprises carbon black having a particle size of between 20 and 350 nanometers and a tensile strength of between 9 and 26 MPa, whereby the paracrystalline carbon provides ultra-violet light protection for the fiber optic cable. 6. The cable of claim 5, wherein the concentration of the carbon black is at least 2% by volume in the surface layer, and the base layer has a concentration of carbon black that is less than 0.2%. 7. The cable of claim 1, wherein the first composition is heavily filled, having at least 20% by volume thereof inorganic mineral filler, thereby enhancing the base layer. 8. The cable of claim 7, wherein the inorganic mineral filler comprises at least one of talc and clay, and wherein the second composition of the surface layer has less than 10% by volume thereof talc or clay. 9. The cable of claim 7, wherein the inorganic mineral filler provides tensile strength to the base layer such that the first composition is at least 10% greater in ultimate tensile strength than the first composition minus the inorganic mineral filler. 10. The cable of claim 1, wherein the surface layer is thinner than the base layer. 11. The cable of claim 1, wherein the polyethylene of the base layer is uncolored or natural polyethylene colored. 12. The cable of claim 11, wherein the polyethylene of the surface layer is colored with colorant. 13. The cable of claim 1, wherein the base layer defines an interior surface of the fiber optic cable, and wherein the exterior surface has at least 0.1 less static coefficient of friction than the interior surface. 14. The cable of claim 13, wherein the interior surface has greater surface roughness than the exterior surface. 15. The cable of claim 1, wherein the additives of the second composition of the surface layer further comprise a secondary stabilizer for extended lifetime, which is not present in the first composition of the base layer of the jacket. 16. The cable of claim 1, wherein the additives of the second composition of the surface layer further comprise a lubricant for blowing/cable jetting installation, which is not present in the first composition of the base layer of the jacket. 17. The cable of claim 1, wherein the additives of the second composition of the surface layer further comprise fiberglass for termite or rodent resistance, which is not present in the first composition of the base layer of the jacket. 18. The cable of claim 1, wherein the additives of the second composition of the surface layer further comprise a wetting agent to increase printability, which is not present in the first composition of the base layer of the jacket. 19. The cable of claim 1, wherein the core comprises the strength element, wherein the strength element comprises a central strength member, wherein the central strength member is dielectric, wherein the central strength member is a rod, wherein the rod comprises glass-reinforced plastic; the core of the fiber optic cable further comprising buffer tubes wound around the central strength member in a pattern of reverse-oscillatory stranding; wherein the at least one optical fiber comprises a plurality of optical fibers, and wherein the plurality of optical fibers extend through the buffer tubes. 20. The cable of claim 19, wherein the core further comprises a layer of armor between the buffer tubes and the jacket. | A fiber optic cable includes a core and a jacket surrounding the core. The jacket includes a base layer, a surface layer defining an exterior surface of the fiber optic cable, and an interface between the surface and base layers. The base layer is formed from a first composition that includes polyethylene. The surface layer has a thickness of at least 300 micrometers and is formed from a second composition that differs from the first composition. The second composition includes polyethylene as well as one or more additives, including paracrystalline carbon. The interface cohesively bonds the surface and base layers to one another at least in part due to molecular chain entanglement of the polyethylene of the first and second compositions.1. A fiber optic cable, comprising:
a core comprising:
at least one optical fiber; and
one or more of the following: a strength element, a tubular element, a binding element, a water-blocking element, a flame-retardant element, armor, and another optical fiber;
a jacket surrounding the core, the jacket comprising:
a base layer formed from a first composition, wherein the first composition comprises polyethylene; and
a surface layer defining an exterior surface of the fiber optic cable, wherein the surface layer has a thickness of at least about 300 micrometers, wherein the surface layer is formed from a second composition that differs from the first composition, wherein the second composition comprises polyethylene, wherein the second composition comprises one or more additives comprising paracrystalline carbon, and wherein the paracrystalline carbon is concentrated in the surface layer such that the second composition has a percentage by volume of the paracrystalline carbon that is at least ten times greater than the percentage by volume thereof in the first composition; and
an interface between the surface and base layers, the interface cohesively bonding the surface and base layers to one another at least in part due to molecular chain entanglement of the polyethylene of the first and second compositions. 2. The cable of claim 1, wherein the polyethylene of the second composition has a higher density than the polyethylene of the first composition. 3. The cable of claim 2, wherein the density of the polyethylene of the second composition is in the range of about 0.93 to 0.97 g/cm3 and the density of the polyethylene of the first composition is in the range of about 0.91 to 0.94 g/cm3. 4. The cable of claim 1, wherein the cohesive bond between the base and surface layers at the interface is at least half as great as the internal tear strength of either the first or second composition. 5. The cable of claim 1, wherein the paracrystalline carbon comprises carbon black having a particle size of between 20 and 350 nanometers and a tensile strength of between 9 and 26 MPa, whereby the paracrystalline carbon provides ultra-violet light protection for the fiber optic cable. 6. The cable of claim 5, wherein the concentration of the carbon black is at least 2% by volume in the surface layer, and the base layer has a concentration of carbon black that is less than 0.2%. 7. The cable of claim 1, wherein the first composition is heavily filled, having at least 20% by volume thereof inorganic mineral filler, thereby enhancing the base layer. 8. The cable of claim 7, wherein the inorganic mineral filler comprises at least one of talc and clay, and wherein the second composition of the surface layer has less than 10% by volume thereof talc or clay. 9. The cable of claim 7, wherein the inorganic mineral filler provides tensile strength to the base layer such that the first composition is at least 10% greater in ultimate tensile strength than the first composition minus the inorganic mineral filler. 10. The cable of claim 1, wherein the surface layer is thinner than the base layer. 11. The cable of claim 1, wherein the polyethylene of the base layer is uncolored or natural polyethylene colored. 12. The cable of claim 11, wherein the polyethylene of the surface layer is colored with colorant. 13. The cable of claim 1, wherein the base layer defines an interior surface of the fiber optic cable, and wherein the exterior surface has at least 0.1 less static coefficient of friction than the interior surface. 14. The cable of claim 13, wherein the interior surface has greater surface roughness than the exterior surface. 15. The cable of claim 1, wherein the additives of the second composition of the surface layer further comprise a secondary stabilizer for extended lifetime, which is not present in the first composition of the base layer of the jacket. 16. The cable of claim 1, wherein the additives of the second composition of the surface layer further comprise a lubricant for blowing/cable jetting installation, which is not present in the first composition of the base layer of the jacket. 17. The cable of claim 1, wherein the additives of the second composition of the surface layer further comprise fiberglass for termite or rodent resistance, which is not present in the first composition of the base layer of the jacket. 18. The cable of claim 1, wherein the additives of the second composition of the surface layer further comprise a wetting agent to increase printability, which is not present in the first composition of the base layer of the jacket. 19. The cable of claim 1, wherein the core comprises the strength element, wherein the strength element comprises a central strength member, wherein the central strength member is dielectric, wherein the central strength member is a rod, wherein the rod comprises glass-reinforced plastic; the core of the fiber optic cable further comprising buffer tubes wound around the central strength member in a pattern of reverse-oscillatory stranding; wherein the at least one optical fiber comprises a plurality of optical fibers, and wherein the plurality of optical fibers extend through the buffer tubes. 20. The cable of claim 19, wherein the core further comprises a layer of armor between the buffer tubes and the jacket. | 2,800 |
11,357 | 11,357 | 14,837,024 | 2,822 | Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structures are disclosed. The method includes forming a Micro-Electro-Mechanical System (MEMS) beam structure by venting both tungsten material and silicon material above and below the MEMS beam to form an upper cavity above the MEMS beam and a lower cavity structure below the MEMS beam. | 1. A structure, comprising a cavity and a cantilevered beam formed within the cavity, the cantilevered beam including a recess, wherein the cavity and the recess are formed by removal of tungsten material and silicon material through a venting process. 2. The structure of claim 1, wherein the cantilevered beam comprises a first cantilevered Micro-Electro-Mechanical System (MEMS) beam structure formed within the cavity, wherein the first cantilevered MEMS beam structure separates the cavity into an upper cavity portion and a lower cavity portion. 3. The structure of claim 2, wherein the recess is formed in an upper surface of the first cantilevered MEMS beam structure facing toward the upper cavity portion. 4. The structure of claim 3, wherein the upper cavity portion is formed over an entire upper surface of the first cantilevered MEMS beam structure and over the recess. 5. The structure of claim 4, further comprising a lid formed over the upper cavity portion. 6. The structure of claim 5, wherein the lid includes a vent hole configured to permit the venting process. 7. The structure of claim 6, further comprising a plug formed in the vent hole. 8. The structure of claim 7, wherein the plug is comprised of a dielectric material or a metal material. 9. The structure of claim 6, wherein the vent hole has a diameter of about 1 μm. 10. The structure of claim 9, wherein the lid has a thickness of about 3 μm. 11. The structure of claim 10, further comprising a second vent hole separated from the vent hole by at least 6 μm. | Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structures are disclosed. The method includes forming a Micro-Electro-Mechanical System (MEMS) beam structure by venting both tungsten material and silicon material above and below the MEMS beam to form an upper cavity above the MEMS beam and a lower cavity structure below the MEMS beam.1. A structure, comprising a cavity and a cantilevered beam formed within the cavity, the cantilevered beam including a recess, wherein the cavity and the recess are formed by removal of tungsten material and silicon material through a venting process. 2. The structure of claim 1, wherein the cantilevered beam comprises a first cantilevered Micro-Electro-Mechanical System (MEMS) beam structure formed within the cavity, wherein the first cantilevered MEMS beam structure separates the cavity into an upper cavity portion and a lower cavity portion. 3. The structure of claim 2, wherein the recess is formed in an upper surface of the first cantilevered MEMS beam structure facing toward the upper cavity portion. 4. The structure of claim 3, wherein the upper cavity portion is formed over an entire upper surface of the first cantilevered MEMS beam structure and over the recess. 5. The structure of claim 4, further comprising a lid formed over the upper cavity portion. 6. The structure of claim 5, wherein the lid includes a vent hole configured to permit the venting process. 7. The structure of claim 6, further comprising a plug formed in the vent hole. 8. The structure of claim 7, wherein the plug is comprised of a dielectric material or a metal material. 9. The structure of claim 6, wherein the vent hole has a diameter of about 1 μm. 10. The structure of claim 9, wherein the lid has a thickness of about 3 μm. 11. The structure of claim 10, further comprising a second vent hole separated from the vent hole by at least 6 μm. | 2,800 |
11,358 | 11,358 | 14,947,122 | 2,842 | Apparatuses for receiving an input signal in a semiconductor device are described. An example apparatus includes an input node; a reference node supplied with a reference voltage; first, second, third and fourth nodes; a first transistor coupled between the first node and the second node, the first transistor having a gate coupled to the input node; a second transistor coupled between the first node and the third node, the second transistor having a gate coupled to the reference node; a third transistor coupled between the second node and the fourth node, the third transistor having a gate coupled to the third node; a fourth transistor coupled between the third node and the fourth node, the fourth transistor having a gate coupled to the third node; and a capacitor coupled between the input node and the third node. | 1. An apparatus comprising:
an input node; a reference node supplied with a reference voltage; first, second, third and fourth nodes; a first transistor coupled between the first node and the second node, the first transistor having a gate coupled to the input node; a second transistor coupled between the first node and the third node, the second transistor having a gate coupled to the reference node; a third transistor coupled between the second node and the fourth node, the third transistor having a gate coupled to the third node; a fourth transistor coupled between the third node and the fourth node, the fourth transistor having a gate coupled to the third node; and a capacitor coupled between the input node and the third node. 2. The apparatus of claim 1, further comprising:
fifth, sixth and seventh nodes; a fifth transistor coupled between the fifth node and the sixth node, the fifth transistor having a gate coupled to the input node; a sixth transistor coupled between the fifth node and the third node, the sixth transistor having a gate coupled to the reference node; a seventh transistor coupled between the sixth node and the seventh node, the seventh transistor having a gate coupled to the third node; and an eighth transistor coupled between the third node and the seventh node, the eighth transistor having a gate coupled to the third node. 3. The apparatus of claim 2, wherein each of the first transistor, the second transistor, the seventh transistor and the eighth transistor is of a first conductivity type and each of the third transistor, fourth transistor, fifth transistor and sixth transistor is of a second conductivity type. 4. The apparatus of claim 2, further comprising a ninth transistor coupled between the first node and the seventh node and a tenth transistor coupled between the fourth node and the fifth node. 5. The apparatus of claim 1, further comprising:
fifth, sixth, seventh and eighth nodes; a fifth transistor coupled between the fifth node and the sixth node, the fifth transistor having a gate coupled to the input node; a sixth transistor coupled between the fifth node and the eighth node, the sixth transistor having a gate coupled to the reference node; a seventh transistor coupled between the sixth node and the seventh node, the seventh transistor having a gate coupled to the eighth node; an eighth transistor coupled between the eighth node and the seventh node, the eighth transistor having a gate coupled to the eighth node; and an additional capacitor coupled between the input node and the eighth node. 6. The apparatus of claim 5, wherein each of the first transistor, the second transistor, the seventh transistor and the eighth transistor is of a first conductivity type and each of the third transistor, fourth transistor, fifth transistor and sixth transistor is of a second conductivity type. 7. The apparatus of claim 5, further comprising a ninth transistor coupled between the first node and the seventh node and a tenth transistor coupled between the fourth node and the fifth node. 8. The apparatus of claim 7, wherein the ninth transistor has a gate coupled to the third node and the tenth transistor has a gate coupled to the eighth node. 9. The apparatus of claim 7, wherein the ninth transistor has a gate coupled to a first bias node and the tenth transistor has a gate coupled to a second bias node, and
wherein the first bias signal is supplied externally from the first bias node and the second bias signal is supplied externally from the second bias node. 10. The apparatus of claim 7, wherein the ninth transistor has a gate configured to receive a first activation signal and the tenth transistor has a gate configured to receive a second activation signal which is a complementary signal of the first activation signal. 11. An apparatus, comprising:
an input node supplied with an input signal; a reference node supplied with a reference voltage; a first amplifier that comprises:
first, second, third and fourth nodes;
a first transistor coupled between the first node and the second node, the first transistor having a gate coupled to the input node;
a second transistor coupled between the first node and the third node, the second transistor having a gate coupled to the reference node;
a third transistor coupled between the second node and the fourth node, the third transistor having a gate coupled to the third node; and
a fourth transistor coupled between the third node and the fourth node, the fourth transistor having a gate coupled to the third node,
a second amplifier that comprises:
fifth, sixth and seventh nodes;
a fifth transistor coupled between the fifth node and the sixth node, the fifth transistor having a gate coupled to the input node;
a sixth transistor coupled between the fifth node and the third node, the sixth transistor having a gate coupled to the reference node;
a seventh transistor coupled between the sixth node and the seventh node, the seventh transistor; and
an eighth transistor coupled between the third node and the seventh node,
an output node; an inverter configured to receive a signal from the sixth node and further configured to provide an output signal to the output node; a feedback resistor coupled between the sixth node and the output node; and a first capacitor coupled between the input node and the third node. 12. The apparatus of claim 11, wherein the first transistor, the second transistor, the seventh transistor and the eighth transistor are P channel field effect transistors and the third transistor, the fourth transistor, the fifth transistor and the sixth transistor are N channel field effect transistors. 13. The apparatus of claim 11, wherein a gate of the seventh transistor and a gate of the eighth transistor are coupled to the third node. 14. The apparatus of claim 11, further comprising a second capacitor coupled between the input node and the eighth node,
wherein a gate of the seventh transistor and a gate of the eight transistor are coupled to the eighth node. 15. The apparatus of claim 11, further comprising a ninth transistor coupled between the first node and the seventh node and a tenth transistor coupled between the fourth node and the fifth node 16. The apparatus of claim 15, wherein the ninth transistor has a gate configured to receive a first activation signal and the tenth transistor has a gate configured to receive a second activation signal which is a complementary signal of the first activation signal. 17. The apparatus of claim 15, wherein the ninth transistor has a gate configured to receive a first bias signal and the tenth transistor has a gate configured to receive a second bias signal, and
wherein the first bias signal and the second bias signal are generated externally and supplied to the gate of ninth transistor and the gate of tenth transistor, respectively. 18. The apparatus of claim 15, wherein the ninth transistor has a gate coupled to the third node and the tenth transistor has a gate coupled to the eighth node. 19. The apparatus of claim 11, wherein the first capacitor comprises two wirings on a same layer and an insulator disposed between the two wirings. 20. The apparatus of claim 19, wherein the two wirings are made of poly-silicon or metal. | Apparatuses for receiving an input signal in a semiconductor device are described. An example apparatus includes an input node; a reference node supplied with a reference voltage; first, second, third and fourth nodes; a first transistor coupled between the first node and the second node, the first transistor having a gate coupled to the input node; a second transistor coupled between the first node and the third node, the second transistor having a gate coupled to the reference node; a third transistor coupled between the second node and the fourth node, the third transistor having a gate coupled to the third node; a fourth transistor coupled between the third node and the fourth node, the fourth transistor having a gate coupled to the third node; and a capacitor coupled between the input node and the third node.1. An apparatus comprising:
an input node; a reference node supplied with a reference voltage; first, second, third and fourth nodes; a first transistor coupled between the first node and the second node, the first transistor having a gate coupled to the input node; a second transistor coupled between the first node and the third node, the second transistor having a gate coupled to the reference node; a third transistor coupled between the second node and the fourth node, the third transistor having a gate coupled to the third node; a fourth transistor coupled between the third node and the fourth node, the fourth transistor having a gate coupled to the third node; and a capacitor coupled between the input node and the third node. 2. The apparatus of claim 1, further comprising:
fifth, sixth and seventh nodes; a fifth transistor coupled between the fifth node and the sixth node, the fifth transistor having a gate coupled to the input node; a sixth transistor coupled between the fifth node and the third node, the sixth transistor having a gate coupled to the reference node; a seventh transistor coupled between the sixth node and the seventh node, the seventh transistor having a gate coupled to the third node; and an eighth transistor coupled between the third node and the seventh node, the eighth transistor having a gate coupled to the third node. 3. The apparatus of claim 2, wherein each of the first transistor, the second transistor, the seventh transistor and the eighth transistor is of a first conductivity type and each of the third transistor, fourth transistor, fifth transistor and sixth transistor is of a second conductivity type. 4. The apparatus of claim 2, further comprising a ninth transistor coupled between the first node and the seventh node and a tenth transistor coupled between the fourth node and the fifth node. 5. The apparatus of claim 1, further comprising:
fifth, sixth, seventh and eighth nodes; a fifth transistor coupled between the fifth node and the sixth node, the fifth transistor having a gate coupled to the input node; a sixth transistor coupled between the fifth node and the eighth node, the sixth transistor having a gate coupled to the reference node; a seventh transistor coupled between the sixth node and the seventh node, the seventh transistor having a gate coupled to the eighth node; an eighth transistor coupled between the eighth node and the seventh node, the eighth transistor having a gate coupled to the eighth node; and an additional capacitor coupled between the input node and the eighth node. 6. The apparatus of claim 5, wherein each of the first transistor, the second transistor, the seventh transistor and the eighth transistor is of a first conductivity type and each of the third transistor, fourth transistor, fifth transistor and sixth transistor is of a second conductivity type. 7. The apparatus of claim 5, further comprising a ninth transistor coupled between the first node and the seventh node and a tenth transistor coupled between the fourth node and the fifth node. 8. The apparatus of claim 7, wherein the ninth transistor has a gate coupled to the third node and the tenth transistor has a gate coupled to the eighth node. 9. The apparatus of claim 7, wherein the ninth transistor has a gate coupled to a first bias node and the tenth transistor has a gate coupled to a second bias node, and
wherein the first bias signal is supplied externally from the first bias node and the second bias signal is supplied externally from the second bias node. 10. The apparatus of claim 7, wherein the ninth transistor has a gate configured to receive a first activation signal and the tenth transistor has a gate configured to receive a second activation signal which is a complementary signal of the first activation signal. 11. An apparatus, comprising:
an input node supplied with an input signal; a reference node supplied with a reference voltage; a first amplifier that comprises:
first, second, third and fourth nodes;
a first transistor coupled between the first node and the second node, the first transistor having a gate coupled to the input node;
a second transistor coupled between the first node and the third node, the second transistor having a gate coupled to the reference node;
a third transistor coupled between the second node and the fourth node, the third transistor having a gate coupled to the third node; and
a fourth transistor coupled between the third node and the fourth node, the fourth transistor having a gate coupled to the third node,
a second amplifier that comprises:
fifth, sixth and seventh nodes;
a fifth transistor coupled between the fifth node and the sixth node, the fifth transistor having a gate coupled to the input node;
a sixth transistor coupled between the fifth node and the third node, the sixth transistor having a gate coupled to the reference node;
a seventh transistor coupled between the sixth node and the seventh node, the seventh transistor; and
an eighth transistor coupled between the third node and the seventh node,
an output node; an inverter configured to receive a signal from the sixth node and further configured to provide an output signal to the output node; a feedback resistor coupled between the sixth node and the output node; and a first capacitor coupled between the input node and the third node. 12. The apparatus of claim 11, wherein the first transistor, the second transistor, the seventh transistor and the eighth transistor are P channel field effect transistors and the third transistor, the fourth transistor, the fifth transistor and the sixth transistor are N channel field effect transistors. 13. The apparatus of claim 11, wherein a gate of the seventh transistor and a gate of the eighth transistor are coupled to the third node. 14. The apparatus of claim 11, further comprising a second capacitor coupled between the input node and the eighth node,
wherein a gate of the seventh transistor and a gate of the eight transistor are coupled to the eighth node. 15. The apparatus of claim 11, further comprising a ninth transistor coupled between the first node and the seventh node and a tenth transistor coupled between the fourth node and the fifth node 16. The apparatus of claim 15, wherein the ninth transistor has a gate configured to receive a first activation signal and the tenth transistor has a gate configured to receive a second activation signal which is a complementary signal of the first activation signal. 17. The apparatus of claim 15, wherein the ninth transistor has a gate configured to receive a first bias signal and the tenth transistor has a gate configured to receive a second bias signal, and
wherein the first bias signal and the second bias signal are generated externally and supplied to the gate of ninth transistor and the gate of tenth transistor, respectively. 18. The apparatus of claim 15, wherein the ninth transistor has a gate coupled to the third node and the tenth transistor has a gate coupled to the eighth node. 19. The apparatus of claim 11, wherein the first capacitor comprises two wirings on a same layer and an insulator disposed between the two wirings. 20. The apparatus of claim 19, wherein the two wirings are made of poly-silicon or metal. | 2,800 |
11,359 | 11,359 | 15,115,428 | 2,883 | (Problem) To provide an optical ferrule that can easily accommodate multicore optical fibers, without an accompanying increase in the number of components. (Resolution Means) The optical ferrule 1 includes a guide opening 14 formed by an upper wall 10, a bottom wall 11, and a pair of side walls 12 and 13; a guide part 15 that extends forward from the upper wall 10 and the guide opening 14; and an optical coupler 20 provided on the upper surface of the upper wall 10. The optical coupler 20 has a waveguide aligning part 21 that aligns and holds an optical waveguide 2, and a light direction converter 22 that changes the direction of light from the optical waveguide 2 and emits the light toward an opposing optical ferrule 1. | 1. An optical ferrule, comprising:
an upper wall; a bottom wall on the opposite side as the upper wall; a pair of side walls that face each other and connect the upper wall and the bottom wall, such that a guide opening is formed on an inside thereof together with the upper wall and the bottom wall; a guide part that extends forward from the upper wall and the guide opening; and an optical coupler provided on an upper surface of the upper wall; the optical coupler having a waveguide aligning part that aligns and holds an optical waveguide, and a light direction converter; the light direction converter comprising: an entrance surface that receives incoming light from the optical waveguide that is aligned and arranged by the waveguide aligning part; a light direction converting surface that receives light from the entrance surface propagated along an incoming axis, and reflects the received light, wherein the reflected light is propagated by the light direction converting surface along a direction converted axis that is different from the incoming axis; and an exit surface that receives light from the light direction converting surface and propagates the received light along an outgoing axis, and transmits the light as outgoing light emitted from the optical ferrule; the optical ferrule having an integrated structure. 2. A first optical ferrule and a second optical ferrule according to claim 1 that are mated together,
wherein the respective guide parts of the first optical ferrule and the second optical ferrule are inserted inside of the guide openings of the first optical ferrule and the second optical ferrule on the opposing side. 3. A connector with a housing,
the housing comprising: a first attaching region that holds and retains an optical waveguide, and moves inside the housing; and an optical coupler disposed inside the housing and that moves inside the housing; the optical coupler comprising: a second attaching region that holds and retains an optical waveguide that is held and retained in the first attaching region; and a light direction converting surface that receives light from the optical waveguide and converts the direction, when an optical waveguide is held and retained in the first attaching region and the second attaching region; wherein when the connector is mated to an opposing connector, the first attaching region moves and causes the optical coupler to move. 4. The connector according to claim 3,
wherein the optical waveguide is held and retained in the first attaching region and the second attaching region, and when the connector is mated to the opposing connector, the first attaching region moves and causes the optical coupler to move while causing the optical waveguide to move. 5. The connector according to claim 3,
wherein the optical waveguide is held and retained in the first attaching region and the second attaching region, and when the connector is made to the opposing connector, the first attaching region at least partially moves along a direction that orthogonal to a mating direction of the connector. 6. The connector according to claim 3,
wherein the optical coupler is stably supported inside the housing, due at least to the optical waveguide being held and retained in the first attaching region and the second attaching region, or due only to the optical waveguide being held and retained in the first attaching region and the second attaching region. 7. A connector with a housing,
the housing comprising: a first attaching region that holds and retains the optical waveguide, and is retained inside the housing; an optical coupler disposed inside the housing and that moves inside the housing; the optical coupler comprising: a second attaching region that holds and retains an optical waveguide that is held and retained in the first attaching region; and a light direction converting surface that receives light from the optical waveguide and converts the direction, when an optical waveguide is held and retained in the first attaching region and the second attaching region; wherein when the connector is mated to the opposing connector, the second attaching region moves inside the housing along a mating direction of the connector, and increases a bend of the optical waveguide. 8. A connector with a housing,
the housing comprising: a first attaching region that holds and retains an optical waveguide, and moves inside the housing; and an optical coupler disposed inside the housing and that moves inside the housing; the optical coupler comprising: a second attaching region that holds and retains an optical waveguide that is held and retained in the first attaching region; and a light direction converting surface that receives light from the optical waveguide and converts the direction, when an optical waveguide is held and retained in the first attaching region and the second attaching region; when the connector is mated to the opposing connector, the first attaching region and the second attaching region move, and cause an increase in a bend of the optical waveguide. 9. The connector according to claim 8,
wherein the optical waveguide is not bent before the connector is mated to the opposing connector. 10. The connector according to claim 3,
wherein when the connector is mated to the opposing connector, the first attaching region moves in a direction essentially perpendicular to a mating direction of the connector, and the second attaching region moves in a direction essentially parallel to the mating direction of the connector. 11. The optical ferrule according to claim 1,
wherein the ferrule is a male-female unit. 12. The optical ferrule according to claim 1, wherein:
a first protruding part that protrudes from an upper surface and a bottom surface of the guide part and extends along a length direction of the optical ferrule; and a second protruding part that protrudes from a bottom surface of the upper wall and an upper surface of the bottom wall, and extends along the length direction of the ferrule toward the guide opening. 13. A first optical ferrule and a second optical ferrule according to claim 12,
wherein when the first optical ferrule and the second optical ferrule are mated together, the respective first protruding parts of the first optical ferrule and the second optical ferrule slide and contact the second protruding parts of the opposing first optical ferrule and the second optical ferrule. 14. The optical ferrule according to claim 1, which is configured so as to mate with another optical ferrule according to claim 1 along a mating direction that is essentially parallel to the length direction of the optical ferrule. 15. The connector according to claim 3,
wherein the optical waveguide is held and retained in the first attaching region and the second attaching region, and when the connector is mated to the opposing connector, the first attaching region primarily moves laterally and causes the optical coupler to primarily move rotationally. 16. The connector according to claim 7,
wherein the optical waveguide is not bent before the connector is mated to the opposing connector. | (Problem) To provide an optical ferrule that can easily accommodate multicore optical fibers, without an accompanying increase in the number of components. (Resolution Means) The optical ferrule 1 includes a guide opening 14 formed by an upper wall 10, a bottom wall 11, and a pair of side walls 12 and 13; a guide part 15 that extends forward from the upper wall 10 and the guide opening 14; and an optical coupler 20 provided on the upper surface of the upper wall 10. The optical coupler 20 has a waveguide aligning part 21 that aligns and holds an optical waveguide 2, and a light direction converter 22 that changes the direction of light from the optical waveguide 2 and emits the light toward an opposing optical ferrule 1.1. An optical ferrule, comprising:
an upper wall; a bottom wall on the opposite side as the upper wall; a pair of side walls that face each other and connect the upper wall and the bottom wall, such that a guide opening is formed on an inside thereof together with the upper wall and the bottom wall; a guide part that extends forward from the upper wall and the guide opening; and an optical coupler provided on an upper surface of the upper wall; the optical coupler having a waveguide aligning part that aligns and holds an optical waveguide, and a light direction converter; the light direction converter comprising: an entrance surface that receives incoming light from the optical waveguide that is aligned and arranged by the waveguide aligning part; a light direction converting surface that receives light from the entrance surface propagated along an incoming axis, and reflects the received light, wherein the reflected light is propagated by the light direction converting surface along a direction converted axis that is different from the incoming axis; and an exit surface that receives light from the light direction converting surface and propagates the received light along an outgoing axis, and transmits the light as outgoing light emitted from the optical ferrule; the optical ferrule having an integrated structure. 2. A first optical ferrule and a second optical ferrule according to claim 1 that are mated together,
wherein the respective guide parts of the first optical ferrule and the second optical ferrule are inserted inside of the guide openings of the first optical ferrule and the second optical ferrule on the opposing side. 3. A connector with a housing,
the housing comprising: a first attaching region that holds and retains an optical waveguide, and moves inside the housing; and an optical coupler disposed inside the housing and that moves inside the housing; the optical coupler comprising: a second attaching region that holds and retains an optical waveguide that is held and retained in the first attaching region; and a light direction converting surface that receives light from the optical waveguide and converts the direction, when an optical waveguide is held and retained in the first attaching region and the second attaching region; wherein when the connector is mated to an opposing connector, the first attaching region moves and causes the optical coupler to move. 4. The connector according to claim 3,
wherein the optical waveguide is held and retained in the first attaching region and the second attaching region, and when the connector is mated to the opposing connector, the first attaching region moves and causes the optical coupler to move while causing the optical waveguide to move. 5. The connector according to claim 3,
wherein the optical waveguide is held and retained in the first attaching region and the second attaching region, and when the connector is made to the opposing connector, the first attaching region at least partially moves along a direction that orthogonal to a mating direction of the connector. 6. The connector according to claim 3,
wherein the optical coupler is stably supported inside the housing, due at least to the optical waveguide being held and retained in the first attaching region and the second attaching region, or due only to the optical waveguide being held and retained in the first attaching region and the second attaching region. 7. A connector with a housing,
the housing comprising: a first attaching region that holds and retains the optical waveguide, and is retained inside the housing; an optical coupler disposed inside the housing and that moves inside the housing; the optical coupler comprising: a second attaching region that holds and retains an optical waveguide that is held and retained in the first attaching region; and a light direction converting surface that receives light from the optical waveguide and converts the direction, when an optical waveguide is held and retained in the first attaching region and the second attaching region; wherein when the connector is mated to the opposing connector, the second attaching region moves inside the housing along a mating direction of the connector, and increases a bend of the optical waveguide. 8. A connector with a housing,
the housing comprising: a first attaching region that holds and retains an optical waveguide, and moves inside the housing; and an optical coupler disposed inside the housing and that moves inside the housing; the optical coupler comprising: a second attaching region that holds and retains an optical waveguide that is held and retained in the first attaching region; and a light direction converting surface that receives light from the optical waveguide and converts the direction, when an optical waveguide is held and retained in the first attaching region and the second attaching region; when the connector is mated to the opposing connector, the first attaching region and the second attaching region move, and cause an increase in a bend of the optical waveguide. 9. The connector according to claim 8,
wherein the optical waveguide is not bent before the connector is mated to the opposing connector. 10. The connector according to claim 3,
wherein when the connector is mated to the opposing connector, the first attaching region moves in a direction essentially perpendicular to a mating direction of the connector, and the second attaching region moves in a direction essentially parallel to the mating direction of the connector. 11. The optical ferrule according to claim 1,
wherein the ferrule is a male-female unit. 12. The optical ferrule according to claim 1, wherein:
a first protruding part that protrudes from an upper surface and a bottom surface of the guide part and extends along a length direction of the optical ferrule; and a second protruding part that protrudes from a bottom surface of the upper wall and an upper surface of the bottom wall, and extends along the length direction of the ferrule toward the guide opening. 13. A first optical ferrule and a second optical ferrule according to claim 12,
wherein when the first optical ferrule and the second optical ferrule are mated together, the respective first protruding parts of the first optical ferrule and the second optical ferrule slide and contact the second protruding parts of the opposing first optical ferrule and the second optical ferrule. 14. The optical ferrule according to claim 1, which is configured so as to mate with another optical ferrule according to claim 1 along a mating direction that is essentially parallel to the length direction of the optical ferrule. 15. The connector according to claim 3,
wherein the optical waveguide is held and retained in the first attaching region and the second attaching region, and when the connector is mated to the opposing connector, the first attaching region primarily moves laterally and causes the optical coupler to primarily move rotationally. 16. The connector according to claim 7,
wherein the optical waveguide is not bent before the connector is mated to the opposing connector. | 2,800 |
11,360 | 11,360 | 15,015,114 | 2,841 | An apparatus can include a processor; memory accessible by the processor; a display operatively coupled to the processor; a hinge assembly that includes an axle and leaves where at least one of the leaves includes a leaf magnet that includes north poles and south poles; and a first housing and a second housing that include leaf receptacles that, in a coupled state, receive the leaves of the hinge assembly to pivotably couple the first housing and the second housing. | 1. An apparatus comprising:
a processor; memory accessible by the processor; a display operatively coupled to the processor; a hinge assembly that comprises an axle and leaves wherein at least one of the leaves comprises a leaf magnet that comprises north poles and south poles; and a first housing and a second housing that comprise leaf receptacles that, in a coupled state, receive the leaves of the hinge assembly to pivotably couple the first housing and the second housing. 2. The apparatus of claim 1 wherein the hinge assembly comprises two leaves. 3. The apparatus of claim 2 wherein the first housing comprises one leaf receptacle and wherein the second housing comprises one leaf receptacle. 4. The apparatus of claim 1 wherein at least one of the receptacles comprises a chamber that comprises an open leaf reception side. 5. The apparatus of claim 1 wherein at least one of the leaf receptacles moves responsive to magnetic force of the leaf magnet. 6. The apparatus of claim 1 comprising a receptacle cover that moves responsive to magnetic force of the leaf magnet. 7. The apparatus of claim 1 comprising a state transition mechanism that comprises spring magnets. 8. The apparatus of claim 1 comprising a state transition mechanism that comprises at least one spring. 9. The apparatus of claim 1 comprising a state transition mechanism that comprises a current coil. 10. The apparatus of claim 1 wherein at least one of the leaf receptacles comprises a ferromagnetic material. 11. The apparatus of claim 1 wherein the north poles and the south poles of the leaf magnet are arranged to from boundary poles and interior poles. 12. The apparatus of claim 1 wherein at least a portion of the north poles and at least a portion of the south poles of the leaf magnet form an array. 13. The apparatus of claim 1 wherein at least a portion of the north poles and at least a portion of the south poles of the leaf magnet define an alignment pattern. 14. The apparatus of claim 13 wherein at least one of the leaf receptacles comprises a leaf receptacle magnet that comprises north poles and south poles that correspond to the alignment pattern of the leaf magnet. 15. The apparatus of claim 1 wherein at least one of the leaf receptacles comprises a leaf receptacle magnet. 16. The apparatus of claim 15 wherein the north poles and the south poles of the leaf magnet attract and repel the leaf receptacle magnet to form an inter-magnet gap. 17. The apparatus of claim 1 wherein, in the coupled state, the first housing is operatively coupled to the hinge assembly via magnetic force or the second housing is operatively coupled to the hinge assembly via magnetic force. 18. The apparatus of claim 1 wherein, in the coupled state, the first housing and the second housing are operatively coupled to the hinge assembly via magnetic force. 19. The apparatus of claim 1 wherein the first housing comprises a front side and a back side, wherein the second housing comprises a front side and a back side and wherein the hinge assembly pivotably couples the first housing and the second housing in a selectable one of two orientations of the first housing with respect to the second housing. 20. The apparatus of claim 1 wherein the hinge assembly comprises at least two axles and at least one set of gears. 21. The apparatus of claim 1 wherein each of two of the leaves comprises a respective leaf magnet that comprises north poles and south poles wherein, in the coupled state, magnetic coupling forces are at least two times the gravity force of a heavier of the first housing and the second housing. 22. The apparatus of claim 21 wherein the magnetic coupling forces are at least three times the gravity force of the heavier of the first housing and the second housing. 23. The apparatus of claim 1 comprising a moveable electrical connector that, in the coupled state, forms an electrical connection via the hinge assembly. 24. The apparatus of claim 1 comprising a moveable optical connector that, in the coupled state, forms an optical connection via the hinge assembly. 25. A method comprising:
applying magnetic force to pivotably couple a first housing to a second housing via a hinge assembly wherein the hinge assembly comprises an axle and leaves wherein at least one of the leaves comprises a leaf magnet that comprises north poles and south poles and wherein the first housing and the second housing comprise leaf receptacles that receive the leaves of the hinge assembly. 26. An apparatus comprising:
a processor; memory accessible by the processor; and a housing that comprises a movable receptacle component that transitions from a first positional state to a second positional state responsive to a magnetic field. 27. The apparatus of claim 26 wherein the movable receptacle component, in the first positional state, comprises a surface positioned approximately evenly with an exterior surface of the housing. 28. The apparatus of claim 27 wherein, in the second positional state, the surface is recessed from the exterior surface of the housing. 29. The apparatus of claim 26 wherein, in the second positional state, the surface is positioned exteriorly a distance from the exterior surface of the housing. 30. The apparatus of claim 26 wherein the movable receptacle component comprises at least one magnet. 31. The apparatus of claim 26 comprising a connector wherein the connector is inaccessible for connection in the first positional state of the receptacle component and accessible for connection in the second positional state of the receptacle component. 32. The apparatus of claim 31 comprising a magnet that comprises a magnetic pattern of a plurality of north poles and a plurality of south poles that align an external connector with the connector wherein the external connector comprises a corresponding magnetic pattern. | An apparatus can include a processor; memory accessible by the processor; a display operatively coupled to the processor; a hinge assembly that includes an axle and leaves where at least one of the leaves includes a leaf magnet that includes north poles and south poles; and a first housing and a second housing that include leaf receptacles that, in a coupled state, receive the leaves of the hinge assembly to pivotably couple the first housing and the second housing.1. An apparatus comprising:
a processor; memory accessible by the processor; a display operatively coupled to the processor; a hinge assembly that comprises an axle and leaves wherein at least one of the leaves comprises a leaf magnet that comprises north poles and south poles; and a first housing and a second housing that comprise leaf receptacles that, in a coupled state, receive the leaves of the hinge assembly to pivotably couple the first housing and the second housing. 2. The apparatus of claim 1 wherein the hinge assembly comprises two leaves. 3. The apparatus of claim 2 wherein the first housing comprises one leaf receptacle and wherein the second housing comprises one leaf receptacle. 4. The apparatus of claim 1 wherein at least one of the receptacles comprises a chamber that comprises an open leaf reception side. 5. The apparatus of claim 1 wherein at least one of the leaf receptacles moves responsive to magnetic force of the leaf magnet. 6. The apparatus of claim 1 comprising a receptacle cover that moves responsive to magnetic force of the leaf magnet. 7. The apparatus of claim 1 comprising a state transition mechanism that comprises spring magnets. 8. The apparatus of claim 1 comprising a state transition mechanism that comprises at least one spring. 9. The apparatus of claim 1 comprising a state transition mechanism that comprises a current coil. 10. The apparatus of claim 1 wherein at least one of the leaf receptacles comprises a ferromagnetic material. 11. The apparatus of claim 1 wherein the north poles and the south poles of the leaf magnet are arranged to from boundary poles and interior poles. 12. The apparatus of claim 1 wherein at least a portion of the north poles and at least a portion of the south poles of the leaf magnet form an array. 13. The apparatus of claim 1 wherein at least a portion of the north poles and at least a portion of the south poles of the leaf magnet define an alignment pattern. 14. The apparatus of claim 13 wherein at least one of the leaf receptacles comprises a leaf receptacle magnet that comprises north poles and south poles that correspond to the alignment pattern of the leaf magnet. 15. The apparatus of claim 1 wherein at least one of the leaf receptacles comprises a leaf receptacle magnet. 16. The apparatus of claim 15 wherein the north poles and the south poles of the leaf magnet attract and repel the leaf receptacle magnet to form an inter-magnet gap. 17. The apparatus of claim 1 wherein, in the coupled state, the first housing is operatively coupled to the hinge assembly via magnetic force or the second housing is operatively coupled to the hinge assembly via magnetic force. 18. The apparatus of claim 1 wherein, in the coupled state, the first housing and the second housing are operatively coupled to the hinge assembly via magnetic force. 19. The apparatus of claim 1 wherein the first housing comprises a front side and a back side, wherein the second housing comprises a front side and a back side and wherein the hinge assembly pivotably couples the first housing and the second housing in a selectable one of two orientations of the first housing with respect to the second housing. 20. The apparatus of claim 1 wherein the hinge assembly comprises at least two axles and at least one set of gears. 21. The apparatus of claim 1 wherein each of two of the leaves comprises a respective leaf magnet that comprises north poles and south poles wherein, in the coupled state, magnetic coupling forces are at least two times the gravity force of a heavier of the first housing and the second housing. 22. The apparatus of claim 21 wherein the magnetic coupling forces are at least three times the gravity force of the heavier of the first housing and the second housing. 23. The apparatus of claim 1 comprising a moveable electrical connector that, in the coupled state, forms an electrical connection via the hinge assembly. 24. The apparatus of claim 1 comprising a moveable optical connector that, in the coupled state, forms an optical connection via the hinge assembly. 25. A method comprising:
applying magnetic force to pivotably couple a first housing to a second housing via a hinge assembly wherein the hinge assembly comprises an axle and leaves wherein at least one of the leaves comprises a leaf magnet that comprises north poles and south poles and wherein the first housing and the second housing comprise leaf receptacles that receive the leaves of the hinge assembly. 26. An apparatus comprising:
a processor; memory accessible by the processor; and a housing that comprises a movable receptacle component that transitions from a first positional state to a second positional state responsive to a magnetic field. 27. The apparatus of claim 26 wherein the movable receptacle component, in the first positional state, comprises a surface positioned approximately evenly with an exterior surface of the housing. 28. The apparatus of claim 27 wherein, in the second positional state, the surface is recessed from the exterior surface of the housing. 29. The apparatus of claim 26 wherein, in the second positional state, the surface is positioned exteriorly a distance from the exterior surface of the housing. 30. The apparatus of claim 26 wherein the movable receptacle component comprises at least one magnet. 31. The apparatus of claim 26 comprising a connector wherein the connector is inaccessible for connection in the first positional state of the receptacle component and accessible for connection in the second positional state of the receptacle component. 32. The apparatus of claim 31 comprising a magnet that comprises a magnetic pattern of a plurality of north poles and a plurality of south poles that align an external connector with the connector wherein the external connector comprises a corresponding magnetic pattern. | 2,800 |
11,361 | 11,361 | 14,825,503 | 2,847 | A cable intended for use in a nuclear environment includes one or more conductors, a longitudinally applied corrugated shield surrounding the one or more conductors, and a cross-linked polyolefin jacket layer surrounding the longitudinally applied corrugated shield. The cable conducts about 5,000 volts to about 68,000 volts in use and is radiation resistant and heat resistant. The cable comprises a life span of about 40 years or more when measured in accordance with IEEE 323. Methods for making a cable and a nuclear reactor utilizing such a cable are also provided. | 1. A cable for nuclear environments comprising:
one or more conductors; a longitudinally applied corrugated shield surrounding the one or more conductors; and a cross-linked polyolefin jacket layer surrounding the longitudinally applied corrugated shield; and wherein the cable conducts about 5,000 volts to about 68,000 volts in use, is radiation resistant and heat resistant, and comprises a life span of about 40 years or more when measured in accordance with IEEE 323. 2. The cable of claim 1 conducts about 15,000 volts in use. 3. The cable of claim 1, wherein the conductor substantially continuously operates at a temperature of about 90° C. or more over the about 40 years or more. 4. The cable of claim 1 passes the requirements of IEEE 383 after a Design Basis Event simulating a loss of coolant accident. 5. The cable of claim 4, wherein the Design Basis Event comprises submersion in a boric acid solution for about 1 year, wherein the boric acid is maintained at about 50® C. to about 205° C. 6. The cable of claim 4 is exposed to about 100 MRad or more of radiation to simulate a reactor life of about 40 years or more prior to the Design Basis Event. 7. The cable of claim 6, wherein the about 100 MRad or more of radiation comprises one or more of gamma radiation and beta radiation. 8. The cable of claim 1, wherein the cross-linked polyolefin jacket comprises one or more ethylene-containing polymers comprising polyethylene and ethylene vinyl acetate. 9. The cable of claim 1 passes the IEEE 1202 vertical tray flame test. 10. The cable of claim 1, wherein the longitudinally applied corrugated shield is formed from a metal material comprising copper or copper alloy. 11. The cable of claim 1, wherein the longitudinally applied corrugated shield comprises an overlap of about 0.25 inches or more. 12. The cable of claim 1, wherein the longitudinally applied corrugated shield further comprises an outer layer comprising tin. 13. The cable of claim 1 further comprises an insulation layer surrounding the one or more conductors, and wherein the insulation layer comprises ethylene propylene rubber. 14. The cable of claim 13 further comprises a conductor shield surrounding the one or more conductors and an insulation shield surrounding the insulation layer. 15. The cable of claim 1, wherein the longitudinally applied corrugated shield is substantially free of cracks after artificial aging at about 180° C. for about 24 hours. 16. The cable of claim 1, wherein the life span is about 60 years of more. 17. The cable of claim 1, wherein the jacket layer is radiation cured. 18. A nuclear reactor comprising one or more cables of claim 1. 19. A cable for nuclear environments, the cable comprising:
one or more conductors; an insulation layer surrounding the one or more conductors; a longitudinally applied corrugated shield surrounding the insulation layer; and a cross-linked polyolefin jacket layer surrounding the longitudinally applied corrugated shield; and wherein the cable conducts about 5,000 volts to about 68,000 volts in use and is substantially free of cracks after artificially aging the cable with heat and about 100 MRads of radiation to an age of about 40 years or more. 20. A cable for nuclear environments, the cable comprising:
one or more conductors; a longitudinally applied corrugated shield surrounding the one or more conductors; and a cross-linked polyolefin jacket layer surrounding the longitudinally applied corrugated shield; and wherein the cable conducts about 5,000 volts to about 68,000 volts in use, and maintains structural and functional integrity after artificially aging the cable at about 180° C. for about 24 hours and about 100 MRad of radiation to an age of about 40 years or more. | A cable intended for use in a nuclear environment includes one or more conductors, a longitudinally applied corrugated shield surrounding the one or more conductors, and a cross-linked polyolefin jacket layer surrounding the longitudinally applied corrugated shield. The cable conducts about 5,000 volts to about 68,000 volts in use and is radiation resistant and heat resistant. The cable comprises a life span of about 40 years or more when measured in accordance with IEEE 323. Methods for making a cable and a nuclear reactor utilizing such a cable are also provided.1. A cable for nuclear environments comprising:
one or more conductors; a longitudinally applied corrugated shield surrounding the one or more conductors; and a cross-linked polyolefin jacket layer surrounding the longitudinally applied corrugated shield; and wherein the cable conducts about 5,000 volts to about 68,000 volts in use, is radiation resistant and heat resistant, and comprises a life span of about 40 years or more when measured in accordance with IEEE 323. 2. The cable of claim 1 conducts about 15,000 volts in use. 3. The cable of claim 1, wherein the conductor substantially continuously operates at a temperature of about 90° C. or more over the about 40 years or more. 4. The cable of claim 1 passes the requirements of IEEE 383 after a Design Basis Event simulating a loss of coolant accident. 5. The cable of claim 4, wherein the Design Basis Event comprises submersion in a boric acid solution for about 1 year, wherein the boric acid is maintained at about 50® C. to about 205° C. 6. The cable of claim 4 is exposed to about 100 MRad or more of radiation to simulate a reactor life of about 40 years or more prior to the Design Basis Event. 7. The cable of claim 6, wherein the about 100 MRad or more of radiation comprises one or more of gamma radiation and beta radiation. 8. The cable of claim 1, wherein the cross-linked polyolefin jacket comprises one or more ethylene-containing polymers comprising polyethylene and ethylene vinyl acetate. 9. The cable of claim 1 passes the IEEE 1202 vertical tray flame test. 10. The cable of claim 1, wherein the longitudinally applied corrugated shield is formed from a metal material comprising copper or copper alloy. 11. The cable of claim 1, wherein the longitudinally applied corrugated shield comprises an overlap of about 0.25 inches or more. 12. The cable of claim 1, wherein the longitudinally applied corrugated shield further comprises an outer layer comprising tin. 13. The cable of claim 1 further comprises an insulation layer surrounding the one or more conductors, and wherein the insulation layer comprises ethylene propylene rubber. 14. The cable of claim 13 further comprises a conductor shield surrounding the one or more conductors and an insulation shield surrounding the insulation layer. 15. The cable of claim 1, wherein the longitudinally applied corrugated shield is substantially free of cracks after artificial aging at about 180° C. for about 24 hours. 16. The cable of claim 1, wherein the life span is about 60 years of more. 17. The cable of claim 1, wherein the jacket layer is radiation cured. 18. A nuclear reactor comprising one or more cables of claim 1. 19. A cable for nuclear environments, the cable comprising:
one or more conductors; an insulation layer surrounding the one or more conductors; a longitudinally applied corrugated shield surrounding the insulation layer; and a cross-linked polyolefin jacket layer surrounding the longitudinally applied corrugated shield; and wherein the cable conducts about 5,000 volts to about 68,000 volts in use and is substantially free of cracks after artificially aging the cable with heat and about 100 MRads of radiation to an age of about 40 years or more. 20. A cable for nuclear environments, the cable comprising:
one or more conductors; a longitudinally applied corrugated shield surrounding the one or more conductors; and a cross-linked polyolefin jacket layer surrounding the longitudinally applied corrugated shield; and wherein the cable conducts about 5,000 volts to about 68,000 volts in use, and maintains structural and functional integrity after artificially aging the cable at about 180° C. for about 24 hours and about 100 MRad of radiation to an age of about 40 years or more. | 2,800 |
11,362 | 11,362 | 14,717,631 | 2,858 | A device and method of eddy current based nondestructive testing of tubular structures made of electrically conductive materials is disclosed. The probe includes means for producing an electromagnetic field for inducing an eddy current in a device under test, means for sensing eddy current signals in the device under test, and an analog to digital converter, wherein the analog to digital converter is conditioned to receive the sensed eddy current signals and to transmit a digital signal related to the eddy current signals. | 1. An eddy current probe for nondestructive testing of tubular structures made of electrically conductive materials comprising:
a plurality of eddy current drive coils; a plurality of eddy current sensors; a first multiplexer configured to receive signals from said plurality of eddy current sensors; an analog to digital converter configured to receive multiplexed signals from said first multiplexer and to convert said multiplexed signals to a multiplexed digital signal. 2. The eddy current probe of claim 1, further comprising a digital to analog converter configured to receive digital drive signals and convert said digital drive signals an analog signal for driving said drive coils. 3. The eddy current probe of claim 2, further comprising a drive current amplifier, a filter and a multiplexer, said drive current amplifier configured to amplify said analog signal for driving said drive coils, said filter configured to filter said amplified analog signal and said multiplexer configured to direct said analog signal to one of said plurality of eddy current drive coils. 4. The eddy current probe of claim 1, wherein said eddy current sensors are a circumferential array of sensors. | A device and method of eddy current based nondestructive testing of tubular structures made of electrically conductive materials is disclosed. The probe includes means for producing an electromagnetic field for inducing an eddy current in a device under test, means for sensing eddy current signals in the device under test, and an analog to digital converter, wherein the analog to digital converter is conditioned to receive the sensed eddy current signals and to transmit a digital signal related to the eddy current signals.1. An eddy current probe for nondestructive testing of tubular structures made of electrically conductive materials comprising:
a plurality of eddy current drive coils; a plurality of eddy current sensors; a first multiplexer configured to receive signals from said plurality of eddy current sensors; an analog to digital converter configured to receive multiplexed signals from said first multiplexer and to convert said multiplexed signals to a multiplexed digital signal. 2. The eddy current probe of claim 1, further comprising a digital to analog converter configured to receive digital drive signals and convert said digital drive signals an analog signal for driving said drive coils. 3. The eddy current probe of claim 2, further comprising a drive current amplifier, a filter and a multiplexer, said drive current amplifier configured to amplify said analog signal for driving said drive coils, said filter configured to filter said amplified analog signal and said multiplexer configured to direct said analog signal to one of said plurality of eddy current drive coils. 4. The eddy current probe of claim 1, wherein said eddy current sensors are a circumferential array of sensors. | 2,800 |
11,363 | 11,363 | 14,499,438 | 2,859 | A charging configuration for the inductive wireless energy transfer to a receiver coil of an electrically operated vehicle. A first circularly wound electrically conductive coil extends in a plane and has a first central opening in the center of the first coil. A second circularly wound electrically conductive coil extends in a plane, coplanar with the first coil, and has a second central opening formed in its center. A ferrite core is supported on a shielding sheet with a rectangular base plate together with the coplanar coils. The coils are arranged in a coil holder on the shielding sheet such that a distance of between 15 and 25 mm remains between the shielding sheet and the bottom edge of the coils. | 1. A charging configuration for inductive wireless transfer of energy to a receiving coil of an electrically operated vehicle, the charging configuration comprising:
a first circularly wound electrically conductive coil extending in a given plane and having a first central opening formed in a center of said first coil; a second circularly wound electrically conductive coil extending in a given plane and having a second central opening formed in a center of said second coil; said first and second coil having a bottom edge and being disposed in a coplanar relationship; a ferrite core; a shielding sheet with a rectangular base plate supporting said ferrite core and said coplanar coils thereon; and a coil holder configured to hold said first and second coils on said shielding sheet to maintain a distance of between 15 and 25 mm between said shielding sheet and said bottom edge of said coils. 2. The charging configuration according to claim 1, wherein the distance is between 18 mm and 22 mm. 3. The charging configuration according to claim 1, wherein said ferrite core is U-shaped and configured as a planar plate running underneath said coils, said plate has a thickness of between 10 and 20 mm, and a first and second leg portion are connected to said plate. 4. The charging configuration according to claim 3, comprising a base plate arranged beneath said plate of said ferrite core, said base plate having a thickness of between 5 mm and 15 mm. 5. The charging configuration according to claim 4, wherein the thickness of said base plate lies between 6 mm and 10 mm. 6. The charging configuration according to claim 1, which comprises a controllable power supply connected to said first and second coils so as to cause a direction of a current in said second coil to be opposite a direction of a current in said first coil. 7. The charging configuration according to claim 1, wherein said first and second coils are equal in size. 8. The charging configuration according to claim 1, wherein said first and second coils are substantially rectangular. 9. A charging system, comprising:
a charging configuration according to claim 1; and a receiver coil of an electrically operated vehicle, said receiver coil having a secondary ferrite core with a length dimension and a width dimension amounting to between 30% and 70% of a length dimension and a width dimension respectively of said plate of said ferrite core. | A charging configuration for the inductive wireless energy transfer to a receiver coil of an electrically operated vehicle. A first circularly wound electrically conductive coil extends in a plane and has a first central opening in the center of the first coil. A second circularly wound electrically conductive coil extends in a plane, coplanar with the first coil, and has a second central opening formed in its center. A ferrite core is supported on a shielding sheet with a rectangular base plate together with the coplanar coils. The coils are arranged in a coil holder on the shielding sheet such that a distance of between 15 and 25 mm remains between the shielding sheet and the bottom edge of the coils.1. A charging configuration for inductive wireless transfer of energy to a receiving coil of an electrically operated vehicle, the charging configuration comprising:
a first circularly wound electrically conductive coil extending in a given plane and having a first central opening formed in a center of said first coil; a second circularly wound electrically conductive coil extending in a given plane and having a second central opening formed in a center of said second coil; said first and second coil having a bottom edge and being disposed in a coplanar relationship; a ferrite core; a shielding sheet with a rectangular base plate supporting said ferrite core and said coplanar coils thereon; and a coil holder configured to hold said first and second coils on said shielding sheet to maintain a distance of between 15 and 25 mm between said shielding sheet and said bottom edge of said coils. 2. The charging configuration according to claim 1, wherein the distance is between 18 mm and 22 mm. 3. The charging configuration according to claim 1, wherein said ferrite core is U-shaped and configured as a planar plate running underneath said coils, said plate has a thickness of between 10 and 20 mm, and a first and second leg portion are connected to said plate. 4. The charging configuration according to claim 3, comprising a base plate arranged beneath said plate of said ferrite core, said base plate having a thickness of between 5 mm and 15 mm. 5. The charging configuration according to claim 4, wherein the thickness of said base plate lies between 6 mm and 10 mm. 6. The charging configuration according to claim 1, which comprises a controllable power supply connected to said first and second coils so as to cause a direction of a current in said second coil to be opposite a direction of a current in said first coil. 7. The charging configuration according to claim 1, wherein said first and second coils are equal in size. 8. The charging configuration according to claim 1, wherein said first and second coils are substantially rectangular. 9. A charging system, comprising:
a charging configuration according to claim 1; and a receiver coil of an electrically operated vehicle, said receiver coil having a secondary ferrite core with a length dimension and a width dimension amounting to between 30% and 70% of a length dimension and a width dimension respectively of said plate of said ferrite core. | 2,800 |
11,364 | 11,364 | 15,787,944 | 2,875 | A flashlight for use with a pistol, the pistol having a trigger guard and a mounting rail. The flashlight includes an elongated housing having a spring arm clamping mechanism for mounting to the mounting rail, a light source at one end thereof, and paddle switches at an opposing end. | 1. A flashlight comprising:
a housing having a light source disposed at a first forward end thereof and further having a switching mechanism disposed at a second rearward end thereof, said housing having a longitudinal axis extending between said first and second ends thereof; a fixed clamp arm extending longitudinally along a first side of the housing; a movable clamp arm extending longitudinally along a second side of the housing, said fixed and movable clamps cooperating to engage a dovetail mounting rail; a spring band secured adjacent said fixed clamp arm and extending laterally across said housing, said spring band extending through an opening in said movable clamp; a laterally extending actuator lever seated within an external cavity in said movable clamp arm, said actuator lever including a longitudinal retaining pin wherein a second end of said spring band is received around the retaining pin, said actuator lever further including an offset camming pin adjacent said retaining pin, said cavity defining a cam follower surface wherein pivoting movement of the actuator lever causes camming action of the camming pin against the cam follower surface to move the movable clamp arm between an open position, a neutral position and a closed position. 2. The flashlight of claim 1, wherein said spring band includes an offset portion. | A flashlight for use with a pistol, the pistol having a trigger guard and a mounting rail. The flashlight includes an elongated housing having a spring arm clamping mechanism for mounting to the mounting rail, a light source at one end thereof, and paddle switches at an opposing end.1. A flashlight comprising:
a housing having a light source disposed at a first forward end thereof and further having a switching mechanism disposed at a second rearward end thereof, said housing having a longitudinal axis extending between said first and second ends thereof; a fixed clamp arm extending longitudinally along a first side of the housing; a movable clamp arm extending longitudinally along a second side of the housing, said fixed and movable clamps cooperating to engage a dovetail mounting rail; a spring band secured adjacent said fixed clamp arm and extending laterally across said housing, said spring band extending through an opening in said movable clamp; a laterally extending actuator lever seated within an external cavity in said movable clamp arm, said actuator lever including a longitudinal retaining pin wherein a second end of said spring band is received around the retaining pin, said actuator lever further including an offset camming pin adjacent said retaining pin, said cavity defining a cam follower surface wherein pivoting movement of the actuator lever causes camming action of the camming pin against the cam follower surface to move the movable clamp arm between an open position, a neutral position and a closed position. 2. The flashlight of claim 1, wherein said spring band includes an offset portion. | 2,800 |
11,365 | 11,365 | 15,254,615 | 2,837 | A ropeless elevator system includes an elevator car constructed and arranged to move along a hoistway and into a transfer station that is in communication with the hoistway. An electronic controller of the ropeless elevator system is configured to control the speed of the elevator car when at least when the elevator car is in the transfer station. A first detector of the ropeless elevator system is supported by the elevator car and is configured to send a first signal to the electronic controller at least in-part indicative of a presence in the elevator car. If a presence is detected the electronic controller outputs a speed control signal indicative of the presence. | 1. A ropeless elevator system comprising:
an elevator car constructed and arranged to move along a hoistway and into a transfer station in communication with the hoistway; an electronic controller configured to control speed of the elevator car when at least in the transfer station; and a first detector supported by the elevator car and configured to send a first signal to the electronic controller at least in-part indicative of a presence in the elevator car, and wherein the electronic controller outputs a speed control signal indicative of the presence. 2. The ropeless elevator system set forth in claim 1, wherein the first detector is a load detector. 3. The ropeless elevator system set forth in claim 1, wherein the first detector is a video detector. 4. The ropeless elevator system set forth in claim 1, wherein the first detector is an infrared detector configured to measure at least temperature. 5. The ropeless elevator system set forth in claim 1 further comprising:
an infrared detector supported by the elevator car and configured to send a temperature signal to the electronic controller indicative of the presence being human, and wherein the first detector is a load detector indicative of the existence of the presence in the elevator car. 6. The ropeless elevator system set forth in claim 1 further comprising:
a visual detector supported by the elevator car and configured to send an imaging signal to the electronic controller for detecting the presence, and wherein the first detector is a load detector. 7. The ropeless elevator system set forth in claim 1 further comprising:
a system user interface configured to receive an information signal outputted by the electronic controller and based on the presence, and configured to send a command signal to the electronic controller initiated by a human user. 8. The ropeless elevator system set forth in claim 1 further comprising:
a drive device constructed and arranged to move the elevator car in the transfer station, and wherein the speed control signal is received by the drive device and is indicative of a safe mode transfer speed that is slower than a normal mode transfer speed applied when the elevator car is empty. 9. The ropeless elevator system set forth in claim 8, wherein the electronic controller is configured to output an indeterminate signal to the drive device when the presence is indeterminate and the drive device is constructed and arranged to stop the elevator car upon receipt of the indeterminate signal. 10. The ropeless elevator system set forth in claim 9 further comprising:
a system user interface configured to receive an information signal outputted by the electronic controller and based on the indeterminate signal, and configured to send a command signal to the electronic controller initiated by a human user commensurate of selectively running the elevator car at the safe mode transfer speed or the normal mode transfer speed. 11. The ropeless elevator system set forth in claim 10 further comprising:
an occupant interface supported by the elevator car and configured to receive a notice signal outputted by the electronic controller and providing notice information to the elevator car occupants. 12. The ropeless elevator system set forth in claim 11, wherein the notice information is instruction to leave the elevator car. 13. A method of transferring an elevator car from a hoistway and into a transfer station comprising:
monitoring an elevator car for a presence by an electronic controller; automatically moving the elevator car from the hoistway and into the transfer station at a slow speed if the presence is detected; and automatically moving the elevator car from the hoistway and into the transfer station at a normal speed greater than the slow speed if the presence is not detected. 14. The method set forth in claim 13, wherein the monitoring is conducted by detector configured to send a signal to the electronic controller indicative of a presence. 15. The method set forth in claim 14, wherein the detector is constructed and arranged to detect the presence as a human presence. 16. The method set forth in claim 13, wherein a speed control signal is outputted by the controller for automatically moving the elevator car from the hoistway and into the transfer station at the slow speed. 17. The method set forth in claim 13 further comprising:
automatically stopping the elevator car by the controller and prior to moving the elevator car into the transfer station if the existence of the presence in the elevator car is indeterminate. 18. The method set forth in claim 17 further comprising:
displaying a visual image of the elevator car upon a system user interface at least when the existence of the presence is indeterminate. 19. The method set forth in claim 18 further comprising:
re-initiating movement of the elevator car by a supervising human through the system user interface and based on the visual image. | A ropeless elevator system includes an elevator car constructed and arranged to move along a hoistway and into a transfer station that is in communication with the hoistway. An electronic controller of the ropeless elevator system is configured to control the speed of the elevator car when at least when the elevator car is in the transfer station. A first detector of the ropeless elevator system is supported by the elevator car and is configured to send a first signal to the electronic controller at least in-part indicative of a presence in the elevator car. If a presence is detected the electronic controller outputs a speed control signal indicative of the presence.1. A ropeless elevator system comprising:
an elevator car constructed and arranged to move along a hoistway and into a transfer station in communication with the hoistway; an electronic controller configured to control speed of the elevator car when at least in the transfer station; and a first detector supported by the elevator car and configured to send a first signal to the electronic controller at least in-part indicative of a presence in the elevator car, and wherein the electronic controller outputs a speed control signal indicative of the presence. 2. The ropeless elevator system set forth in claim 1, wherein the first detector is a load detector. 3. The ropeless elevator system set forth in claim 1, wherein the first detector is a video detector. 4. The ropeless elevator system set forth in claim 1, wherein the first detector is an infrared detector configured to measure at least temperature. 5. The ropeless elevator system set forth in claim 1 further comprising:
an infrared detector supported by the elevator car and configured to send a temperature signal to the electronic controller indicative of the presence being human, and wherein the first detector is a load detector indicative of the existence of the presence in the elevator car. 6. The ropeless elevator system set forth in claim 1 further comprising:
a visual detector supported by the elevator car and configured to send an imaging signal to the electronic controller for detecting the presence, and wherein the first detector is a load detector. 7. The ropeless elevator system set forth in claim 1 further comprising:
a system user interface configured to receive an information signal outputted by the electronic controller and based on the presence, and configured to send a command signal to the electronic controller initiated by a human user. 8. The ropeless elevator system set forth in claim 1 further comprising:
a drive device constructed and arranged to move the elevator car in the transfer station, and wherein the speed control signal is received by the drive device and is indicative of a safe mode transfer speed that is slower than a normal mode transfer speed applied when the elevator car is empty. 9. The ropeless elevator system set forth in claim 8, wherein the electronic controller is configured to output an indeterminate signal to the drive device when the presence is indeterminate and the drive device is constructed and arranged to stop the elevator car upon receipt of the indeterminate signal. 10. The ropeless elevator system set forth in claim 9 further comprising:
a system user interface configured to receive an information signal outputted by the electronic controller and based on the indeterminate signal, and configured to send a command signal to the electronic controller initiated by a human user commensurate of selectively running the elevator car at the safe mode transfer speed or the normal mode transfer speed. 11. The ropeless elevator system set forth in claim 10 further comprising:
an occupant interface supported by the elevator car and configured to receive a notice signal outputted by the electronic controller and providing notice information to the elevator car occupants. 12. The ropeless elevator system set forth in claim 11, wherein the notice information is instruction to leave the elevator car. 13. A method of transferring an elevator car from a hoistway and into a transfer station comprising:
monitoring an elevator car for a presence by an electronic controller; automatically moving the elevator car from the hoistway and into the transfer station at a slow speed if the presence is detected; and automatically moving the elevator car from the hoistway and into the transfer station at a normal speed greater than the slow speed if the presence is not detected. 14. The method set forth in claim 13, wherein the monitoring is conducted by detector configured to send a signal to the electronic controller indicative of a presence. 15. The method set forth in claim 14, wherein the detector is constructed and arranged to detect the presence as a human presence. 16. The method set forth in claim 13, wherein a speed control signal is outputted by the controller for automatically moving the elevator car from the hoistway and into the transfer station at the slow speed. 17. The method set forth in claim 13 further comprising:
automatically stopping the elevator car by the controller and prior to moving the elevator car into the transfer station if the existence of the presence in the elevator car is indeterminate. 18. The method set forth in claim 17 further comprising:
displaying a visual image of the elevator car upon a system user interface at least when the existence of the presence is indeterminate. 19. The method set forth in claim 18 further comprising:
re-initiating movement of the elevator car by a supervising human through the system user interface and based on the visual image. | 2,800 |
11,366 | 11,366 | 14,996,917 | 2,872 | A process is provided for conducting an eye examination using a mobile device, the process comprising capturing a first image of an object using a camera of a mobile device set to a fixed focusing distance; determining, with reference to the first image, an absolute size of the object; capturing a second image of the object using the camera of the mobile device; determining, with reference to the second image, a distance from the mobile device to the object; providing an indication via the mobile device to move the mobile device relative to the object; and receiving input from the mobile device in response to the eye examination program. | 1. A process for conducting an eye examination using a mobile device, the process comprising:
capturing a first image of an object using a camera of a mobile device set to a fixed focusing distance; determining, with reference to the first image, an absolute size of the object; capturing a second image of the object using the camera of the mobile device; determining, with reference to the second image, a distance from the mobile device to the object; providing an indication via the mobile device to move the mobile device relative to the object; and receiving input from the mobile device in response to an eye examination program. 2. The method of claim 1, wherein the object is an optotype displayed in connection with the eye examination program. 3. The method of claim 1, wherein the object is a test pattern. 4. The method of claim 1, wherein determining, with reference to the first image, the absolute size of the object further comprises determining a first image size of the object in the first image. 5. The method of claim 4, wherein determining, with reference to the first image, the absolute size of the object is performed with reference to the first image size of the object in the first image, a focal length of the camera of the mobile device, a second distance between a lens and a focal plane of the camera, and a third distance from the lens at which the object is in optimal focus. 6. The method of claim 1, wherein determining, with reference to the second image, the distance from the mobile device to the object further comprises determining a second image size of the object in the second image. 7. The method of claim 6, wherein determining, with reference to the second image, the distance from the mobile device to the object is performed with reference to the second image size of the object in the second image, the absolute size of the object, and the focal length of the camera of the mobile device. 8. The method of claim 1, wherein providing the indication via the mobile device to move the mobile device relative to the object comprises providing an indication via the mobile device to move the mobile device in a direction relative to the object. 9. The method of claim 1, wherein providing the indication via the mobile device to move the mobile device relative to the object comprises providing an indication via the mobile device to move the mobile device to a second distance from the object. 10. The method of claim 9, wherein the second distance corresponds to an optimal distance for conducting the eye examination program. 11. A mobile device comprising:
a camera; a user interface comprising an visual display; and a processor coupled to the camera, the processor configured to:
capture a first image of an object using the camera;
determine, with reference to the first image, an absolute size of the object;
capture a second image of the object using the camera;
determine, with reference to the second image, a distance from the mobile device to the object;
provide, via the user interface, an indication via the display to move the mobile device relative to the object; and
receive, via the user interface, input in response to an eye examination program. 12. The mobile device of claim 11, wherein determining, with reference to the first image, the absolute size of the object further comprises determining a first image size of the object in the first image. 13. The mobile device of claim 12, the camera comprising a lens having a focal length and a focal plane, wherein determining, with reference to the first image, the absolute size of the object is performed with reference to the first image size of the object in the first image, the focal length, a second distance between the lens and the focal plane, and a third distance from the lens at which the object is in optimal focus. 14. The mobile device of claim 11, wherein determining, with reference to the second image, the distance from the mobile device to the object further comprises determining a second image size of the object in the second image. 15. The mobile device of claim 14, the camera comprising a lens having a focal length, wherein determining, with reference to the second image, the distance from the mobile device to the object is performed with reference to the second image size of the object in the second image, the absolute size of the object, and the focal length. 16. The mobile device of claim 11, wherein providing the indication via the display to move the mobile device relative to the object comprises providing an indication via the display to move the mobile device in a direction relative to the object. 17. The mobile device of claim 11, wherein providing the indication via the display to move the mobile device relative to the object comprises providing an indication via the display to move the mobile device to a second distance from the object. 18. The method of claim 17, wherein the second distance corresponds to an optimal distance for conducting the eye examination program. | A process is provided for conducting an eye examination using a mobile device, the process comprising capturing a first image of an object using a camera of a mobile device set to a fixed focusing distance; determining, with reference to the first image, an absolute size of the object; capturing a second image of the object using the camera of the mobile device; determining, with reference to the second image, a distance from the mobile device to the object; providing an indication via the mobile device to move the mobile device relative to the object; and receiving input from the mobile device in response to the eye examination program.1. A process for conducting an eye examination using a mobile device, the process comprising:
capturing a first image of an object using a camera of a mobile device set to a fixed focusing distance; determining, with reference to the first image, an absolute size of the object; capturing a second image of the object using the camera of the mobile device; determining, with reference to the second image, a distance from the mobile device to the object; providing an indication via the mobile device to move the mobile device relative to the object; and receiving input from the mobile device in response to an eye examination program. 2. The method of claim 1, wherein the object is an optotype displayed in connection with the eye examination program. 3. The method of claim 1, wherein the object is a test pattern. 4. The method of claim 1, wherein determining, with reference to the first image, the absolute size of the object further comprises determining a first image size of the object in the first image. 5. The method of claim 4, wherein determining, with reference to the first image, the absolute size of the object is performed with reference to the first image size of the object in the first image, a focal length of the camera of the mobile device, a second distance between a lens and a focal plane of the camera, and a third distance from the lens at which the object is in optimal focus. 6. The method of claim 1, wherein determining, with reference to the second image, the distance from the mobile device to the object further comprises determining a second image size of the object in the second image. 7. The method of claim 6, wherein determining, with reference to the second image, the distance from the mobile device to the object is performed with reference to the second image size of the object in the second image, the absolute size of the object, and the focal length of the camera of the mobile device. 8. The method of claim 1, wherein providing the indication via the mobile device to move the mobile device relative to the object comprises providing an indication via the mobile device to move the mobile device in a direction relative to the object. 9. The method of claim 1, wherein providing the indication via the mobile device to move the mobile device relative to the object comprises providing an indication via the mobile device to move the mobile device to a second distance from the object. 10. The method of claim 9, wherein the second distance corresponds to an optimal distance for conducting the eye examination program. 11. A mobile device comprising:
a camera; a user interface comprising an visual display; and a processor coupled to the camera, the processor configured to:
capture a first image of an object using the camera;
determine, with reference to the first image, an absolute size of the object;
capture a second image of the object using the camera;
determine, with reference to the second image, a distance from the mobile device to the object;
provide, via the user interface, an indication via the display to move the mobile device relative to the object; and
receive, via the user interface, input in response to an eye examination program. 12. The mobile device of claim 11, wherein determining, with reference to the first image, the absolute size of the object further comprises determining a first image size of the object in the first image. 13. The mobile device of claim 12, the camera comprising a lens having a focal length and a focal plane, wherein determining, with reference to the first image, the absolute size of the object is performed with reference to the first image size of the object in the first image, the focal length, a second distance between the lens and the focal plane, and a third distance from the lens at which the object is in optimal focus. 14. The mobile device of claim 11, wherein determining, with reference to the second image, the distance from the mobile device to the object further comprises determining a second image size of the object in the second image. 15. The mobile device of claim 14, the camera comprising a lens having a focal length, wherein determining, with reference to the second image, the distance from the mobile device to the object is performed with reference to the second image size of the object in the second image, the absolute size of the object, and the focal length. 16. The mobile device of claim 11, wherein providing the indication via the display to move the mobile device relative to the object comprises providing an indication via the display to move the mobile device in a direction relative to the object. 17. The mobile device of claim 11, wherein providing the indication via the display to move the mobile device relative to the object comprises providing an indication via the display to move the mobile device to a second distance from the object. 18. The method of claim 17, wherein the second distance corresponds to an optimal distance for conducting the eye examination program. | 2,800 |
11,367 | 11,367 | 15,062,260 | 2,852 | Wideband capacitive sensing (single-ended or differential) is based on a modulated sense (capacitance) signal. A carrier/drive signal path modulates a reference signal with a carrier signal (such as fixed frequency or spread spectrum) to generate a carrier/drive signal, driven (with optional pre-scaling) out through an output node (to sense capacitor(s)). A sense signal path receives at an input/summing node up-modulated sense capacitance signal(s), corresponding to measured capacitance up-modulated to the carrier frequency, and, after filtering (optional) and amplification, demodulates the up-modulated sense capacitance signal with the carrier signal, to generate a demodulated sense capacitance signal corresponding to measured capacitance, which can be converted to sensor data. Sense signal path amplification can use charge amplification (capacitor feedback), or transimpedance amplification (resistor feedback). For differential capacitive sensing, differential carrier/drive signals are driven to differential sense capacitors, and the resulting up-modulated sense capacitance signals are summed at the input/summing node. | 1. A circuit suitable for capacitive sensing, comprising:
carrier generation circuitry to generate a carrier signal at a carrier frequency; reference circuitry to generate a reference signal; carrier/drive signal path circuitry to drive a carrier/drive signal out through an output node, the carrier/drive signal useable for capacitive sensing, including:
modulation circuitry to modulate the reference signal with the carrier signal to generate the carrier/drive signal at the carrier frequency, and
drive circuitry to drive the carrier/drive signal out through the output node; and
sense signal path circuitry to receive at an input node an up-modulated sense capacitance signal corresponding to measured capacitance from capacitive sensing, wherein the sense capacitance signal is up-modulated to the carrier frequency based on the carrier/drive signal, including:
amplifier circuitry to generate an amplified up-modulated sense capacitance signal, and
demodulation circuitry to demodulate the amplified up-modulated sense capacitance signal based on the carrier signal, generating a demodulated sense capacitance signal. 2. The circuit of claim 1, further comprising:
data conversion circuitry to convert the demodulated sense capacitance signal to digital data, including
output filter circuitry to filter the demodulated sense capacitance signal, including Nyquist filtering and carrier image rejection; and
analog-to-digital converter (ADC) circuitry to digitize the demodulated sense capacitance signal, the ADC referenced by reference signal. 3. The circuit of claim 2, wherein the data conversion circuitry comprises a sigma delta converter that includes input filtering for Nyquist noise and carrier image rejection. 4. The circuit of claim 1, the carrier/drive signal path circuitry further comprising pre-scale circuitry to pre-scale the carrier/drive signal. 5. The circuit of claim 1, the sense signal path circuitry further comprising:
EMI filter circuitry to EMI filter the up-modulated sense capacitance signal; and/or input bandpass filter circuitry to bandpass filter the up-modulated sense capacitance signal, and provide a bandpass-filtered sense capacitance signal to the amplifier circuitry. 6. The circuit of claim 1, wherein the amplifier circuitry is one of
a charge amplifier including a feedback capacitor coupled to the amplifier inverting input, which is coupled to receive the up-modulated sense capacitance signal; and a transimpedance amplifier including a feedback resistor coupled to the amplifier inverting input, which is coupled to receive the up-modulated sense capacitance signal, with the carrier/drive signal path circuitry further including an integrator to integrate the carrier/drive signal. 7. The circuit of claim 1, wherein the carrier signal used to modulate the reference signal, and to demodulate the amplified up-modulated sense capacitance signal is one of a fixed frequency signal, and a spread spectrum signal. 8. The circuit of claim 1, adapted for differential capacitive sensing with first and second sense capacitors, and wherein:
the carrier/drive signal path circuitry generates first and second carrier/drive signals, that are integrated and driven out through first and second output nodes respectively to the first and second sense capacitors; in response to the first and second carrier drive signals, the first and second sense capacitors provide respective first and second up-modulated sense capacitance signals, corresponding to measured capacitance and up-modulated to the carrier frequency; and the sense signal path circuitry receives at the input node the first and second up-modulated sense capacitance signals, which are summed into an up-modulated differential sense capacitance signal. 9. A system for capacitive sensing, comprising:
at least one sense capacitor; a wideband capacitance to digital converter (WCDC) including at least one output node coupled to a bottom terminal of the at least one sense capacitor, and an input node coupled to a top terminal of the sense capacitor, including
carrier generation circuitry to generate a carrier signal at a carrier frequency;
reference circuitry to generate a reference signal;
carrier/drive signal path circuitry to generate a carrier/drive signal for output from the at least one output node to the at least one sense capacitor, including:
modulation circuitry to modulate the reference signal with the carrier signal at a carrier frequency to generate the carrier/drive signal at the carrier frequency, and
drive circuitry to drive the carrier/drive signal out through the at least one output node,
wherein, in response to the carrier/drive signal, the at least one sense capacitor provides an up-modulated sense capacitance signal, corresponding to measured capacitance and up-modulated to the carrier frequency;
sense signal path circuitry to receive at the input node the up-modulated sense capacitance signal, including:
amplifier circuitry to generate an amplified up-modulated sense capacitance signal, and
demodulation circuitry to demodulate the amplified up-modulated sense capacitance signal using the carrier signal, generating a demodulated sense capacitance signal; and
data conversion circuitry to convert the demodulated sense capacitance signal to sensor data corresponding to measured capacitance, the data converter referenced by the reference signal. 10. The system of claim 9, wherein the data converter circuitry is one of:
an input filter coupled to an analog-to-digital converter (ADC), the input filter providing Nyquist filtering and carrier image rejection for the demodulated sense capacitance signal; and a sigma delta converter that includes input Nyquist filtering and carrier image rejection. 11. The system of claim 9,
the carrier/drive signal path circuitry further comprising pre-scale circuitry to pre-scale the carrier/drive signal; and/or the sense signal path circuitry further comprising:
EMI filter circuitry to EMI filter the up-modulated sense capacitance signal, and/or
input bandpass filter circuitry to bandpass filter the up-modulated sense capacitance signal, and provide a bandpass-filtered sense capacitance signal to the amplifier circuitry. 12. The system of claim 9, wherein the amplifier circuitry is one of
a charge amplifier including a feedback capacitor coupled to the amplifier inverting input, which is coupled to receive the up-modulated sense capacitance signal; and a transimpedance amplifier including a feedback resistor coupled to the amplifier inverting input, which is coupled to receive the up-modulated sense capacitance signal, with the carrier/drive signal path circuitry further including an integrator to integrate the carrier/drive signal. 13. The system of claim 9, wherein the carrier signal used to modulate the reference signal, and to demodulate the amplified up-modulated sense capacitance signal is one of a fixed frequency signal, and a spread spectrum signal. 14. The system of claim 9,
further comprising first and second differential sense capacitors; wherein the WCDC includes first and second output nodes, and an input summing node; wherein the carrier/drive signal path circuitry generates first and second carrier/drive signals, that are integrated and driven out through the first and second output nodes respectively to the first and second sense capacitors; wherein, in response to the first and second carrier drive signals, the first and second sense capacitors provide respective first and second up-modulated sense capacitance signals, corresponding to measured capacitance and up-modulated to the carrier frequency; and wherein the sense signal path circuitry receives at the input summing node the first and second up-modulated sense capacitance signals, summed into an up-modulated differential sense capacitance signal. 15. A method for capacitive sensing adaptable to a capacitive sensing system that includes at least one sense capacitor, comprising
generating a carrier signal at a carrier frequency; generating a reference signal; in a carrier/drive signal path, generating a carrier/drive signal for output to the at least one sense capacitor, including:
modulating the reference signal with the carrier signal to generate the carrier/drive signal at the carrier frequency, and
driving the carrier/drive signal out to the at least one sense capacitor to generate at least one up-modulated sense capacitance signal, corresponding to measured capacitance and up-modulated to the carrier frequency; and
in a sense signal path, receiving the sense capacitance signal corresponding to measured capacitance from the at least one sense capacitor, the sense capacitance signal up-modulated to the carrier frequency by the carrier/drive signal, and:
amplifying the up-modulated sense capacitance signal, and
demodulating the amplified up-modulated sense capacitance signal using the carrier signal, generating a demodulated sense capacitance signal; and
converting the demodulated sense capacitance signal to sensor data corresponding to the sense capacitance signal from the at least one sense capacitor. 16. The method of claim 15, wherein converting the demodulated sense capacitance signal to sensor data is accomplished by a sigma delta converter that includes input Nyquist filtering and carrier image rejection, the sigma delta converter referenced by the reference signal. 17. The method of claim 15, further comprising:
in the carrier/drive signal path, pre-scaling the carrier/drive signal; and/or in the sense signal path: EMI filtering the up-modulated sense capacitance signal prior to amplification, and/or bandpass filtering the up-modulated sense capacitance signal prior to amplification. 18. The method of claim 15, wherein amplification is accomplished by one of
a charge amplifier including a feedback capacitor coupled to the amplifier inverting input, which is coupled to receive the up-modulated sense capacitance signal; and a transimpedance amplifier including a feedback resistor coupled to the amplifier inverting input, which is coupled to receive the up-modulated sense capacitance signal, with the carrier/drive signal path further comprising integrating the carrier/drive signal. 19. The method of claim 15, wherein the carrier signal used to modulate the reference signal, and to demodulate the amplified up-modulated sense capacitance signal is one of a fixed frequency signal, and a spread spectrum signal. 20. The method of claim 15, adapted for use in a differential sensing system that includes first and second differential sense capacitors, further comprising
in the carrier/drive signal path, generating first and second carrier/drive signals, driven out respectively to the first and second sense capacitors; wherein, in response to the first and second carrier drive signals, the first and second sense capacitors provide respective first and second up-modulated sense capacitance signals, corresponding to measured capacitance and up-modulated to the carrier frequency; and in the sense signal path, summing the first and second up-modulated sense capacitance signals as an up-modulated differential sense capacitance signal. | Wideband capacitive sensing (single-ended or differential) is based on a modulated sense (capacitance) signal. A carrier/drive signal path modulates a reference signal with a carrier signal (such as fixed frequency or spread spectrum) to generate a carrier/drive signal, driven (with optional pre-scaling) out through an output node (to sense capacitor(s)). A sense signal path receives at an input/summing node up-modulated sense capacitance signal(s), corresponding to measured capacitance up-modulated to the carrier frequency, and, after filtering (optional) and amplification, demodulates the up-modulated sense capacitance signal with the carrier signal, to generate a demodulated sense capacitance signal corresponding to measured capacitance, which can be converted to sensor data. Sense signal path amplification can use charge amplification (capacitor feedback), or transimpedance amplification (resistor feedback). For differential capacitive sensing, differential carrier/drive signals are driven to differential sense capacitors, and the resulting up-modulated sense capacitance signals are summed at the input/summing node.1. A circuit suitable for capacitive sensing, comprising:
carrier generation circuitry to generate a carrier signal at a carrier frequency; reference circuitry to generate a reference signal; carrier/drive signal path circuitry to drive a carrier/drive signal out through an output node, the carrier/drive signal useable for capacitive sensing, including:
modulation circuitry to modulate the reference signal with the carrier signal to generate the carrier/drive signal at the carrier frequency, and
drive circuitry to drive the carrier/drive signal out through the output node; and
sense signal path circuitry to receive at an input node an up-modulated sense capacitance signal corresponding to measured capacitance from capacitive sensing, wherein the sense capacitance signal is up-modulated to the carrier frequency based on the carrier/drive signal, including:
amplifier circuitry to generate an amplified up-modulated sense capacitance signal, and
demodulation circuitry to demodulate the amplified up-modulated sense capacitance signal based on the carrier signal, generating a demodulated sense capacitance signal. 2. The circuit of claim 1, further comprising:
data conversion circuitry to convert the demodulated sense capacitance signal to digital data, including
output filter circuitry to filter the demodulated sense capacitance signal, including Nyquist filtering and carrier image rejection; and
analog-to-digital converter (ADC) circuitry to digitize the demodulated sense capacitance signal, the ADC referenced by reference signal. 3. The circuit of claim 2, wherein the data conversion circuitry comprises a sigma delta converter that includes input filtering for Nyquist noise and carrier image rejection. 4. The circuit of claim 1, the carrier/drive signal path circuitry further comprising pre-scale circuitry to pre-scale the carrier/drive signal. 5. The circuit of claim 1, the sense signal path circuitry further comprising:
EMI filter circuitry to EMI filter the up-modulated sense capacitance signal; and/or input bandpass filter circuitry to bandpass filter the up-modulated sense capacitance signal, and provide a bandpass-filtered sense capacitance signal to the amplifier circuitry. 6. The circuit of claim 1, wherein the amplifier circuitry is one of
a charge amplifier including a feedback capacitor coupled to the amplifier inverting input, which is coupled to receive the up-modulated sense capacitance signal; and a transimpedance amplifier including a feedback resistor coupled to the amplifier inverting input, which is coupled to receive the up-modulated sense capacitance signal, with the carrier/drive signal path circuitry further including an integrator to integrate the carrier/drive signal. 7. The circuit of claim 1, wherein the carrier signal used to modulate the reference signal, and to demodulate the amplified up-modulated sense capacitance signal is one of a fixed frequency signal, and a spread spectrum signal. 8. The circuit of claim 1, adapted for differential capacitive sensing with first and second sense capacitors, and wherein:
the carrier/drive signal path circuitry generates first and second carrier/drive signals, that are integrated and driven out through first and second output nodes respectively to the first and second sense capacitors; in response to the first and second carrier drive signals, the first and second sense capacitors provide respective first and second up-modulated sense capacitance signals, corresponding to measured capacitance and up-modulated to the carrier frequency; and the sense signal path circuitry receives at the input node the first and second up-modulated sense capacitance signals, which are summed into an up-modulated differential sense capacitance signal. 9. A system for capacitive sensing, comprising:
at least one sense capacitor; a wideband capacitance to digital converter (WCDC) including at least one output node coupled to a bottom terminal of the at least one sense capacitor, and an input node coupled to a top terminal of the sense capacitor, including
carrier generation circuitry to generate a carrier signal at a carrier frequency;
reference circuitry to generate a reference signal;
carrier/drive signal path circuitry to generate a carrier/drive signal for output from the at least one output node to the at least one sense capacitor, including:
modulation circuitry to modulate the reference signal with the carrier signal at a carrier frequency to generate the carrier/drive signal at the carrier frequency, and
drive circuitry to drive the carrier/drive signal out through the at least one output node,
wherein, in response to the carrier/drive signal, the at least one sense capacitor provides an up-modulated sense capacitance signal, corresponding to measured capacitance and up-modulated to the carrier frequency;
sense signal path circuitry to receive at the input node the up-modulated sense capacitance signal, including:
amplifier circuitry to generate an amplified up-modulated sense capacitance signal, and
demodulation circuitry to demodulate the amplified up-modulated sense capacitance signal using the carrier signal, generating a demodulated sense capacitance signal; and
data conversion circuitry to convert the demodulated sense capacitance signal to sensor data corresponding to measured capacitance, the data converter referenced by the reference signal. 10. The system of claim 9, wherein the data converter circuitry is one of:
an input filter coupled to an analog-to-digital converter (ADC), the input filter providing Nyquist filtering and carrier image rejection for the demodulated sense capacitance signal; and a sigma delta converter that includes input Nyquist filtering and carrier image rejection. 11. The system of claim 9,
the carrier/drive signal path circuitry further comprising pre-scale circuitry to pre-scale the carrier/drive signal; and/or the sense signal path circuitry further comprising:
EMI filter circuitry to EMI filter the up-modulated sense capacitance signal, and/or
input bandpass filter circuitry to bandpass filter the up-modulated sense capacitance signal, and provide a bandpass-filtered sense capacitance signal to the amplifier circuitry. 12. The system of claim 9, wherein the amplifier circuitry is one of
a charge amplifier including a feedback capacitor coupled to the amplifier inverting input, which is coupled to receive the up-modulated sense capacitance signal; and a transimpedance amplifier including a feedback resistor coupled to the amplifier inverting input, which is coupled to receive the up-modulated sense capacitance signal, with the carrier/drive signal path circuitry further including an integrator to integrate the carrier/drive signal. 13. The system of claim 9, wherein the carrier signal used to modulate the reference signal, and to demodulate the amplified up-modulated sense capacitance signal is one of a fixed frequency signal, and a spread spectrum signal. 14. The system of claim 9,
further comprising first and second differential sense capacitors; wherein the WCDC includes first and second output nodes, and an input summing node; wherein the carrier/drive signal path circuitry generates first and second carrier/drive signals, that are integrated and driven out through the first and second output nodes respectively to the first and second sense capacitors; wherein, in response to the first and second carrier drive signals, the first and second sense capacitors provide respective first and second up-modulated sense capacitance signals, corresponding to measured capacitance and up-modulated to the carrier frequency; and wherein the sense signal path circuitry receives at the input summing node the first and second up-modulated sense capacitance signals, summed into an up-modulated differential sense capacitance signal. 15. A method for capacitive sensing adaptable to a capacitive sensing system that includes at least one sense capacitor, comprising
generating a carrier signal at a carrier frequency; generating a reference signal; in a carrier/drive signal path, generating a carrier/drive signal for output to the at least one sense capacitor, including:
modulating the reference signal with the carrier signal to generate the carrier/drive signal at the carrier frequency, and
driving the carrier/drive signal out to the at least one sense capacitor to generate at least one up-modulated sense capacitance signal, corresponding to measured capacitance and up-modulated to the carrier frequency; and
in a sense signal path, receiving the sense capacitance signal corresponding to measured capacitance from the at least one sense capacitor, the sense capacitance signal up-modulated to the carrier frequency by the carrier/drive signal, and:
amplifying the up-modulated sense capacitance signal, and
demodulating the amplified up-modulated sense capacitance signal using the carrier signal, generating a demodulated sense capacitance signal; and
converting the demodulated sense capacitance signal to sensor data corresponding to the sense capacitance signal from the at least one sense capacitor. 16. The method of claim 15, wherein converting the demodulated sense capacitance signal to sensor data is accomplished by a sigma delta converter that includes input Nyquist filtering and carrier image rejection, the sigma delta converter referenced by the reference signal. 17. The method of claim 15, further comprising:
in the carrier/drive signal path, pre-scaling the carrier/drive signal; and/or in the sense signal path: EMI filtering the up-modulated sense capacitance signal prior to amplification, and/or bandpass filtering the up-modulated sense capacitance signal prior to amplification. 18. The method of claim 15, wherein amplification is accomplished by one of
a charge amplifier including a feedback capacitor coupled to the amplifier inverting input, which is coupled to receive the up-modulated sense capacitance signal; and a transimpedance amplifier including a feedback resistor coupled to the amplifier inverting input, which is coupled to receive the up-modulated sense capacitance signal, with the carrier/drive signal path further comprising integrating the carrier/drive signal. 19. The method of claim 15, wherein the carrier signal used to modulate the reference signal, and to demodulate the amplified up-modulated sense capacitance signal is one of a fixed frequency signal, and a spread spectrum signal. 20. The method of claim 15, adapted for use in a differential sensing system that includes first and second differential sense capacitors, further comprising
in the carrier/drive signal path, generating first and second carrier/drive signals, driven out respectively to the first and second sense capacitors; wherein, in response to the first and second carrier drive signals, the first and second sense capacitors provide respective first and second up-modulated sense capacitance signals, corresponding to measured capacitance and up-modulated to the carrier frequency; and in the sense signal path, summing the first and second up-modulated sense capacitance signals as an up-modulated differential sense capacitance signal. | 2,800 |
11,368 | 11,368 | 14,226,137 | 2,876 | A symbol information reader may include an imaging device configured to image the medium; an image memory configured to store image data of the medium; and a position detection processor configured to retrieve the image data and detect the position of symbol information recorded on the medium. The position detection processor may include a temporary area judging unit; a correlation map creating unit; a labeling unit configured, and a position determining unit configured to detect the position of the symbol information recorded on the medium. When searching the correlation map for a predetermined basic pattern and labeling, the labeling unit judges whether the basic pattern is present or not according to the ratio of high correlation area to the area subject to judgment or the position of high correlation area in the basic pattern. | 1. A symbol information reader for use with a medium on which symbol information is recorded, the symbol information reader comprising:
an imaging device configured to image the medium; an image memory configured to store image data of said medium acquired by said imaging device; and a position detection processor configured to retrieve said image data and detect the position of said symbol information recorded on said medium; wherein said position detection processor comprises: a temporary area judging unit configured to calculate brightness changes along the scanning direction of scanning lines for said symbol information in a predetermined area of said image data and identify a temporary area that has a possibility of corresponding to said symbol information, a correlation map creating unit configured to calculate a correlation of said temporary area with the areas neighboring in a direction perpendicular to the scanning direction of said scanning lines and create a map that indicates the area of high correlation value, a labeling unit configured to search said correlation map for the presence of a basic barcode and label an area judged as having said basic barcode, and a position determining unit configured to detect the position of said symbol information recorded on said medium, based on said labeled area, and when searching said correlation map acquired at said correlation map creating unit for a predetermined basic pattern and labeling, said labeling unit judges whether said basic pattern is present or not according to the ratio of high correlation area to the area subject to judgment or the position of high correlation area in said basic pattern. 2. The symbol information reader as set forth in claim 1, wherein said labeling unit is configured to regard that said searched pattern is the basic pattern if the ratio of the number of element values indicating high correlation to the number of elements composing said basic pattern is equal to or larger than a predetermined ratio. 3. The symbol information reader according to claim 1, wherein said labeling unit is configured to regard that said searched pattern is the basic barcode even if the sum of element values of all elements in said basic pattern is smaller than the sum of element values when all are of high correlation, as long as it is equal to or larger than a predetermined value. 4. The symbol information reader according to claim 1, wherein said labeling unit is configured to regard that said searched pattern is the basic barcode if an element value that indicates high correlation appears in a predetermined form at predetermined positions in the basic pattern consisting of multiple elements. 5. The symbol information reader according to claim 1, wherein said labeling unit, in basic pattern search, is configured to:
form basic pattern areas by shifting elements one by one on said correlation map, judge each of said basic pattern areas to find whether a basic pattern is present or not, according to the ratio of high correlation area to an area subject to judgment or the position of high correlation area in the basic pattern, wherein when it is judged as not to be said basic barcode, said basic pattern is regarded as uncertain, and when the following basic pattern after the shift by one element is regarded as a basic barcode, said uncertain basic pattern is regarded as a basic barcode. 6. A method for reading symbol information comprising:
imaging a medium on which symbol information is recorded; storing image data of said medium in a storage unit; retrieving said image data and detecting the position of said symbol information recorded on said medium; wherein said detecting the position of said symbol information comprises: calculating brightness changes d along the scanning direction of scanning lines of symbol information in a predetermined area of said image data and identifying temporary area having a possibility of corresponding to said symbol information, calculating correlations of said temporary area with areas neighboring in a direction perpendicular to said scanning direction of said scanning lines and creating a map indicating areas of high correlation, searching the presence of a basic barcode in said correlation map and labeling the area judged as having said basic, and detecting the position of said symbol information recorded on said medium, based on said labeled area, and in said labeling step, when a predetermined basic pattern is searched in said correlation map and an area judged as having said basic barcode is labeled, it is judged whether a basic pattern is present or not, according to the ratio of high correlation area to an area subject to judgment or the position of high correlation area in said basic pattern. 7. The method for reading symbol information according to claim 6, wherein said basic pattern is regarded as a basic barcode if the ratio of the number of the element values that indicate high correlation to the number of the elements in said basic pattern is equal to or larger than a predetermined value. 8. The method for reading symbol information according to claim 6, wherein said basic pattern is regarded as the basic barcode even if the sum of the element values of all the elements in said basic pattern is smaller than the sum of the element values obtained when all are of high correlation as long as it is equal to or larger than a predetermined value. 9. The method for reading symbol information according to claim 6, wherein said pattern is regarded as the basic barcode if an element value of high correlation is set in a predetermined form at predetermined positions in said basic pattern composed of multiple elements. 10. The method for reading symbol information according to claim 6, wherein in the basic pattern search processing,
basic pattern areas are formed by shifting elements one by one in said correlation map, every basic pattern area is judged whether a basic pattern is present or not, according to the ratio of high correlation area to an area subject to judgment or the position of high correlation area in the basic pattern; when it is not judged that the basic pattern is said basic barcode, said basic pattern is regarded uncertain; when it is judged that the following basic pattern after the shift by one element is the basic barcode, said basic pattern regarded uncertain is now judged as the basic barcode. 11. A computer readable medium including computer-readable instructions that, when executed by a computer, cause the computer to perform:
executing a symbol information reading operation that includes retrieval of tan image data of a medium, on which symbol information is recorded; executing position detection processing of said symbol information recorded on said medium; wherein said position detecting processing comprises: a temporary area judging processing for calculating brightness changes along the scanning direction of scanning lines for said symbol information in a predetermined area of said image data and identifying a temporary area having a possibility of corresponding to said symbol information; a correlation map creating processing for acquiring correlations of said temporary area with neighboring areas adjacent in a direction perpendicular to said scanning direction of said scanning lines and creating a map that shows areas of high correlation; a labeling processing for searching said correlation map for the presence of a basic barcode and labeling the area judged as having said basic barcode; and a position determining processing for detecting the position of said symbol information recorded on said medium, based on said labeled area; and in said labeling processing, when a predetermined basic pattern is searched in said correlation map acquired in said correlation map creating processing and labeled, it is judged whether a basic pattern is present or not according to the ratio of high correlation area to an area subject to judgment or the position of high correlation area in said basic pattern. | A symbol information reader may include an imaging device configured to image the medium; an image memory configured to store image data of the medium; and a position detection processor configured to retrieve the image data and detect the position of symbol information recorded on the medium. The position detection processor may include a temporary area judging unit; a correlation map creating unit; a labeling unit configured, and a position determining unit configured to detect the position of the symbol information recorded on the medium. When searching the correlation map for a predetermined basic pattern and labeling, the labeling unit judges whether the basic pattern is present or not according to the ratio of high correlation area to the area subject to judgment or the position of high correlation area in the basic pattern.1. A symbol information reader for use with a medium on which symbol information is recorded, the symbol information reader comprising:
an imaging device configured to image the medium; an image memory configured to store image data of said medium acquired by said imaging device; and a position detection processor configured to retrieve said image data and detect the position of said symbol information recorded on said medium; wherein said position detection processor comprises: a temporary area judging unit configured to calculate brightness changes along the scanning direction of scanning lines for said symbol information in a predetermined area of said image data and identify a temporary area that has a possibility of corresponding to said symbol information, a correlation map creating unit configured to calculate a correlation of said temporary area with the areas neighboring in a direction perpendicular to the scanning direction of said scanning lines and create a map that indicates the area of high correlation value, a labeling unit configured to search said correlation map for the presence of a basic barcode and label an area judged as having said basic barcode, and a position determining unit configured to detect the position of said symbol information recorded on said medium, based on said labeled area, and when searching said correlation map acquired at said correlation map creating unit for a predetermined basic pattern and labeling, said labeling unit judges whether said basic pattern is present or not according to the ratio of high correlation area to the area subject to judgment or the position of high correlation area in said basic pattern. 2. The symbol information reader as set forth in claim 1, wherein said labeling unit is configured to regard that said searched pattern is the basic pattern if the ratio of the number of element values indicating high correlation to the number of elements composing said basic pattern is equal to or larger than a predetermined ratio. 3. The symbol information reader according to claim 1, wherein said labeling unit is configured to regard that said searched pattern is the basic barcode even if the sum of element values of all elements in said basic pattern is smaller than the sum of element values when all are of high correlation, as long as it is equal to or larger than a predetermined value. 4. The symbol information reader according to claim 1, wherein said labeling unit is configured to regard that said searched pattern is the basic barcode if an element value that indicates high correlation appears in a predetermined form at predetermined positions in the basic pattern consisting of multiple elements. 5. The symbol information reader according to claim 1, wherein said labeling unit, in basic pattern search, is configured to:
form basic pattern areas by shifting elements one by one on said correlation map, judge each of said basic pattern areas to find whether a basic pattern is present or not, according to the ratio of high correlation area to an area subject to judgment or the position of high correlation area in the basic pattern, wherein when it is judged as not to be said basic barcode, said basic pattern is regarded as uncertain, and when the following basic pattern after the shift by one element is regarded as a basic barcode, said uncertain basic pattern is regarded as a basic barcode. 6. A method for reading symbol information comprising:
imaging a medium on which symbol information is recorded; storing image data of said medium in a storage unit; retrieving said image data and detecting the position of said symbol information recorded on said medium; wherein said detecting the position of said symbol information comprises: calculating brightness changes d along the scanning direction of scanning lines of symbol information in a predetermined area of said image data and identifying temporary area having a possibility of corresponding to said symbol information, calculating correlations of said temporary area with areas neighboring in a direction perpendicular to said scanning direction of said scanning lines and creating a map indicating areas of high correlation, searching the presence of a basic barcode in said correlation map and labeling the area judged as having said basic, and detecting the position of said symbol information recorded on said medium, based on said labeled area, and in said labeling step, when a predetermined basic pattern is searched in said correlation map and an area judged as having said basic barcode is labeled, it is judged whether a basic pattern is present or not, according to the ratio of high correlation area to an area subject to judgment or the position of high correlation area in said basic pattern. 7. The method for reading symbol information according to claim 6, wherein said basic pattern is regarded as a basic barcode if the ratio of the number of the element values that indicate high correlation to the number of the elements in said basic pattern is equal to or larger than a predetermined value. 8. The method for reading symbol information according to claim 6, wherein said basic pattern is regarded as the basic barcode even if the sum of the element values of all the elements in said basic pattern is smaller than the sum of the element values obtained when all are of high correlation as long as it is equal to or larger than a predetermined value. 9. The method for reading symbol information according to claim 6, wherein said pattern is regarded as the basic barcode if an element value of high correlation is set in a predetermined form at predetermined positions in said basic pattern composed of multiple elements. 10. The method for reading symbol information according to claim 6, wherein in the basic pattern search processing,
basic pattern areas are formed by shifting elements one by one in said correlation map, every basic pattern area is judged whether a basic pattern is present or not, according to the ratio of high correlation area to an area subject to judgment or the position of high correlation area in the basic pattern; when it is not judged that the basic pattern is said basic barcode, said basic pattern is regarded uncertain; when it is judged that the following basic pattern after the shift by one element is the basic barcode, said basic pattern regarded uncertain is now judged as the basic barcode. 11. A computer readable medium including computer-readable instructions that, when executed by a computer, cause the computer to perform:
executing a symbol information reading operation that includes retrieval of tan image data of a medium, on which symbol information is recorded; executing position detection processing of said symbol information recorded on said medium; wherein said position detecting processing comprises: a temporary area judging processing for calculating brightness changes along the scanning direction of scanning lines for said symbol information in a predetermined area of said image data and identifying a temporary area having a possibility of corresponding to said symbol information; a correlation map creating processing for acquiring correlations of said temporary area with neighboring areas adjacent in a direction perpendicular to said scanning direction of said scanning lines and creating a map that shows areas of high correlation; a labeling processing for searching said correlation map for the presence of a basic barcode and labeling the area judged as having said basic barcode; and a position determining processing for detecting the position of said symbol information recorded on said medium, based on said labeled area; and in said labeling processing, when a predetermined basic pattern is searched in said correlation map acquired in said correlation map creating processing and labeled, it is judged whether a basic pattern is present or not according to the ratio of high correlation area to an area subject to judgment or the position of high correlation area in said basic pattern. | 2,800 |
11,369 | 11,369 | 14,327,875 | 2,863 | Disclosed are a system and method to automatically spot-check for small out-of-control conditions of a clinical diagnostic process. The expected number of unreliable results evaluated since the last good quality control event is estimated by estimating the magnitude of the out-of-control condition, constructing concentration based bias, imprecision, and TE a profiles, and using those parameters to estimate the probability of a specimen result being unreliable. Patient specimens are automatically selected for reevaluation based on their probability of crossing a medical decision limit or having a probability of being unreliable. The system and method determine which reevaluated patient specimens need to be corrected when the results for those specimens have already been reported. Various exemplary embodiments and implementations of the system and method are included. | 1. A computer-implemented method for spot-checking small out-of-control conditions in a clinical diagnostic process, comprising:
receiving notification of an out-of-control condition from a laboratory instrument; analyzing specimen test data from said laboratory instrument to determine a scope of potential error caused by said out-of-control condition; generating a report identifying specimens to be re-evaluated based on said analyzing step; and re-evaluating said identified specimens. 2. The method of claim 1, wherein said analyzing said specimen test data comprises:
estimating a magnitude of said out of control condition, estimating a probability of a specimen evaluation being incorrect, computing a predicted number of incorrect test results, and combinations thereof. 3. The method of claim 2, wherein said estimating a magnitude of said out of control condition comprises evaluating quality control specimens and determining an allowable total error based on bias and historic imprecision data. 4. The method of claim 2, wherein said estimating a probability of a specimen evaluation being incorrect comprises calculating a normal cumulative distribution. 5. The method of claim 2, wherein said computing a predicted number of incorrect test results comprises calculating a sum of probabilities of a specimen evaluation being incorrect. 6. The method of claim 1, further comprising the step of:
replacing at least a portion of said specimen test data with re-evaluated specimen data. 7. The method of claim 1, further comprising the step of:
generating a report identifying re-evaluated specimen data. 8. The method of claim 1, further comprising the step of:
waiting for said out-of-control condition to be resolved. 9. The method of claim 1, wherein said test data comprises patient data. 10. A system for spot-checking small out-of control conditions in a clinical diagnostic process, comprising:
one more laboratory instruments operable to acquire test data; a computer system operable to communicate with and receive test data from said laboratory instruments, said computer system having a processor operable to: receive notification of an out-of-control condition from a laboratory instrument; analyze specimen test data from said laboratory instrument to determine a scope of potential error caused by said out-of-control condition; generate a report identifying specimens to be re-evaluated based on said analyzing step; and re-evaluate said identified specimens after said out-of-control condition is resolved. 11. The system of claim 10, wherein said analyzing said specimen test data comprises:
estimating a magnitude of said out of control condition, estimating a probability of a specimen evaluation being incorrect, computing a predicted number of incorrect test results, and combinations thereof. 12. The system of claim 11, wherein said estimating a magnitude of said out of control condition comprises evaluating quality control specimens and determining an allowable total error based on bias and historic imprecision data. 13. The system of claim 11, wherein said estimating a probability of a specimen evaluation being incorrect comprises calculating a normal cumulative distribution. 14. The system of claim 11, wherein said computing a predicted number of incorrect test results comprises calculating a sum of probabilities of a specimen evaluation being incorrect. 15. The system of claim 10, wherein said processor is further operable to:
replace at least a portion of said specimen test data with re-evaluated specimen data. 16. The system of claim 10, wherein said processor is further operable to:
generate a report identifying re-evaluated specimen data. 17. The system of claim 10, wherein said test data comprises patient data. 18. A non-transitory computer-readable medium having computer-executable instructions for performing a method for spot-checking small out-of-control conditions in a clinical diagnostic process, the method comprising:
receiving notification of an out-of-control condition from a laboratory instrument; analyzing specimen test data from said laboratory instrument to determine a scope of potential error caused by said out-of-control condition; generating a report identifying specimens to be re-evaluated based on said analyzing step; and re-evaluating said identified specimens after said out-of-control condition is resolved. 19. The non-transitory computer readable medium of claim 18, wherein said analyzing said specimen test data comprises:
estimating a magnitude of said out of control condition, estimating a probability of a specimen evaluation being incorrect, computing a predicted number of incorrect test results, and combinations thereof. 20. The non-transitory computer-readable medium of claim 19, wherein said estimating a magnitude of said out of control condition comprises evaluating quality control specimens and determining an allowable total error based on bias and historic imprecision data. 21. The non-transitory computer-readable medium of claim 19, wherein said estimating a probability of a specimen evaluation being incorrect comprises calculating a normal cumulative distribution. 22. The non-transitory computer-readable medium of claim 19, wherein said computing a predicted number of incorrect test results comprises calculating a sum of probabilities of a specimen evaluation being incorrect. 23. The non-transitory computer-readable medium of claim 18, wherein said method further comprises the step of:
replacing at least a portion of said specimen test data with re-evaluated specimen data. 24. The non-transitory computer-readable medium of claim 18, wherein said method further comprises the step of:
generating a report identifying re-evaluated specimen data. 25. The non-transitory computer-readable medium of method of claim 18, wherein said test data comprises patient data. 26. A computer-implemented method for spot-checking small out-of-control conditions in a clinical diagnostic process, comprising:
receiving notification of an out-of-control condition from a laboratory instrument; analyzing specimen test data from said laboratory instrument to determine a magnitude of said out-of-control condition; generating a report identifying specimens to be re-evaluated based on said analyzing step; waiting for said out-of-control condition to be resolved; and re-evaluating said identified specimens. 27. The method of claim 26, further comprising the steps of:
estimating a probability of a specimen evaluation being incorrect; and computing a predicted number of incorrect test results. 28. The method of claim 26, wherein said estimating a magnitude of said out of control condition comprises:
evaluating quality control specimens and determining an allowable total error based on bias data, historic imprecision data, and combinations thereof. 29. The method of claim 26, further comprising the steps of:
replacing at least a portion of said specimen test data with re-evaluated specimen data, generating a report identifying re-evaluated specimen data, and combinations thereof. | Disclosed are a system and method to automatically spot-check for small out-of-control conditions of a clinical diagnostic process. The expected number of unreliable results evaluated since the last good quality control event is estimated by estimating the magnitude of the out-of-control condition, constructing concentration based bias, imprecision, and TE a profiles, and using those parameters to estimate the probability of a specimen result being unreliable. Patient specimens are automatically selected for reevaluation based on their probability of crossing a medical decision limit or having a probability of being unreliable. The system and method determine which reevaluated patient specimens need to be corrected when the results for those specimens have already been reported. Various exemplary embodiments and implementations of the system and method are included.1. A computer-implemented method for spot-checking small out-of-control conditions in a clinical diagnostic process, comprising:
receiving notification of an out-of-control condition from a laboratory instrument; analyzing specimen test data from said laboratory instrument to determine a scope of potential error caused by said out-of-control condition; generating a report identifying specimens to be re-evaluated based on said analyzing step; and re-evaluating said identified specimens. 2. The method of claim 1, wherein said analyzing said specimen test data comprises:
estimating a magnitude of said out of control condition, estimating a probability of a specimen evaluation being incorrect, computing a predicted number of incorrect test results, and combinations thereof. 3. The method of claim 2, wherein said estimating a magnitude of said out of control condition comprises evaluating quality control specimens and determining an allowable total error based on bias and historic imprecision data. 4. The method of claim 2, wherein said estimating a probability of a specimen evaluation being incorrect comprises calculating a normal cumulative distribution. 5. The method of claim 2, wherein said computing a predicted number of incorrect test results comprises calculating a sum of probabilities of a specimen evaluation being incorrect. 6. The method of claim 1, further comprising the step of:
replacing at least a portion of said specimen test data with re-evaluated specimen data. 7. The method of claim 1, further comprising the step of:
generating a report identifying re-evaluated specimen data. 8. The method of claim 1, further comprising the step of:
waiting for said out-of-control condition to be resolved. 9. The method of claim 1, wherein said test data comprises patient data. 10. A system for spot-checking small out-of control conditions in a clinical diagnostic process, comprising:
one more laboratory instruments operable to acquire test data; a computer system operable to communicate with and receive test data from said laboratory instruments, said computer system having a processor operable to: receive notification of an out-of-control condition from a laboratory instrument; analyze specimen test data from said laboratory instrument to determine a scope of potential error caused by said out-of-control condition; generate a report identifying specimens to be re-evaluated based on said analyzing step; and re-evaluate said identified specimens after said out-of-control condition is resolved. 11. The system of claim 10, wherein said analyzing said specimen test data comprises:
estimating a magnitude of said out of control condition, estimating a probability of a specimen evaluation being incorrect, computing a predicted number of incorrect test results, and combinations thereof. 12. The system of claim 11, wherein said estimating a magnitude of said out of control condition comprises evaluating quality control specimens and determining an allowable total error based on bias and historic imprecision data. 13. The system of claim 11, wherein said estimating a probability of a specimen evaluation being incorrect comprises calculating a normal cumulative distribution. 14. The system of claim 11, wherein said computing a predicted number of incorrect test results comprises calculating a sum of probabilities of a specimen evaluation being incorrect. 15. The system of claim 10, wherein said processor is further operable to:
replace at least a portion of said specimen test data with re-evaluated specimen data. 16. The system of claim 10, wherein said processor is further operable to:
generate a report identifying re-evaluated specimen data. 17. The system of claim 10, wherein said test data comprises patient data. 18. A non-transitory computer-readable medium having computer-executable instructions for performing a method for spot-checking small out-of-control conditions in a clinical diagnostic process, the method comprising:
receiving notification of an out-of-control condition from a laboratory instrument; analyzing specimen test data from said laboratory instrument to determine a scope of potential error caused by said out-of-control condition; generating a report identifying specimens to be re-evaluated based on said analyzing step; and re-evaluating said identified specimens after said out-of-control condition is resolved. 19. The non-transitory computer readable medium of claim 18, wherein said analyzing said specimen test data comprises:
estimating a magnitude of said out of control condition, estimating a probability of a specimen evaluation being incorrect, computing a predicted number of incorrect test results, and combinations thereof. 20. The non-transitory computer-readable medium of claim 19, wherein said estimating a magnitude of said out of control condition comprises evaluating quality control specimens and determining an allowable total error based on bias and historic imprecision data. 21. The non-transitory computer-readable medium of claim 19, wherein said estimating a probability of a specimen evaluation being incorrect comprises calculating a normal cumulative distribution. 22. The non-transitory computer-readable medium of claim 19, wherein said computing a predicted number of incorrect test results comprises calculating a sum of probabilities of a specimen evaluation being incorrect. 23. The non-transitory computer-readable medium of claim 18, wherein said method further comprises the step of:
replacing at least a portion of said specimen test data with re-evaluated specimen data. 24. The non-transitory computer-readable medium of claim 18, wherein said method further comprises the step of:
generating a report identifying re-evaluated specimen data. 25. The non-transitory computer-readable medium of method of claim 18, wherein said test data comprises patient data. 26. A computer-implemented method for spot-checking small out-of-control conditions in a clinical diagnostic process, comprising:
receiving notification of an out-of-control condition from a laboratory instrument; analyzing specimen test data from said laboratory instrument to determine a magnitude of said out-of-control condition; generating a report identifying specimens to be re-evaluated based on said analyzing step; waiting for said out-of-control condition to be resolved; and re-evaluating said identified specimens. 27. The method of claim 26, further comprising the steps of:
estimating a probability of a specimen evaluation being incorrect; and computing a predicted number of incorrect test results. 28. The method of claim 26, wherein said estimating a magnitude of said out of control condition comprises:
evaluating quality control specimens and determining an allowable total error based on bias data, historic imprecision data, and combinations thereof. 29. The method of claim 26, further comprising the steps of:
replacing at least a portion of said specimen test data with re-evaluated specimen data, generating a report identifying re-evaluated specimen data, and combinations thereof. | 2,800 |
11,370 | 11,370 | 15,620,770 | 2,845 | Methods and apparatus for determining non-linearity in analog-to-digital converters are disclosed. An example apparatus includes a signal interface to receive an output of an analog-to-digital converter (ADC), the output corresponding to a periodic signal transmitted to the ADC; a signal transformer to determine at least one of a harmonic phase or a harmonic amplitude corresponding to the output; and an integral non-linearity (INL) term calculator to determine the INL of the ADC based on a characteristic of the periodic signal and the at least one of the harmonic phase or the harmonic amplitude. | 1. An apparatus comprising:
a signal interface to receive an output of an analog-to-digital converter (ADC), the output corresponding to a periodic signal transmitted to the ADC; a signal transformer to determine at least harmonic amplitude and phase attributes corresponding to the output; and an integral non-linearity (INL) term calculator to determine INL of the ADC based on a characteristic of the periodic signal and the harmonic attributes. 2. The apparatus of claim 1, wherein the INL corresponds to an undesired characteristic in the output of the ADC. 3. The apparatus of claim 1, wherein the signal transformer is to determine the harmonic attribute corresponding to the output by transforming the output of the ADC to a frequency domain using a Fourier transform to identify a frequency spectrum of the output, the harmonic attribute corresponding to the frequency spectrum. 4. The apparatus of claim 3, wherein the INL term calculator determines the INL based on a harmonic phase to correct for Fourier transform phase distortion. 5. An apparatus comprising:
a signal interface to receive an output of an analog-to-digital converter (ADC), the output corresponding to a periodic signal transmitted to the ADC; a signal transformer to determine a harmonic attribute corresponding to the output; and an integral non-linearity (INL) term calculator to determine INL of the ADC based on a characteristic of the periodic signal and the harmonic attribute, wherein the INL term calculator determines the INL using Chebyshev polynomials. 6. The apparatus of claim 1, further including a signal generator to:
enable the periodic signal from being input into the ADC; and after the INL is determined, disable the periodic signal from being input into the ADC. 7. The apparatus of claim 1, further including storage to store the INL. 8. The apparatus of claim 7, wherein the INL term calculator is to store the INL in the storage in association with first characteristics corresponding to a first time when the INL was determined, the first characteristics corresponding to at least one of a frequency of the periodic signal, an amplitude of the periodic signal, a temperature at the first time, or an amount of noise at the first time. 9. The apparatus of claim 8, further including an INL correction applicator to, at a second time after the first time, reduce the INL in the output of the ADC by removing a value corresponding to the stored INL from the output of the ADC based on match between the first characteristics and second characteristics corresponding to the second time. 10. The apparatus of claim 1, wherein the signal interface is to output a report including the INL. 11. A method comprising:
receiving an output of an analog-to-digital converter (ADC), the output corresponding to a periodic signal transmitted to the ADC; determining at least harmonic amplitude and phase attributes corresponding to the output; and determining INL of the ADC based on a characteristic of the periodic signal and the harmonic attributes. 12. The method of claim 11, wherein the INL corresponds to an undesired characteristic in the output of the ADC. 13. The method of claim 11, wherein the determining of the harmonic attribute corresponding to the output includes transforming the output of the ADC to a frequency domain using a Fourier transform to identify a frequency spectrum of the output, the harmonic attribute corresponding to the frequency spectrum. 14. The method of claim 13, further including determine the INL based on a harmonic phase to correct for Fourier transform phase distortion. 15. A method comprising:
receiving an output of an analog-to-digital converter (ADC), the output corresponding to a periodic signal transmitted to the ADC; determining a harmonic attribute corresponding to the output; and determining, using Chebyshev polynomials, the INL of the ADC based on a characteristic of the periodic signal and the harmonic attribute. 16. The method of claim 11, further including:
enabling the periodic signal from being input into the ADC; and after the INL is determined, disabling the periodic signal from being input into the ADC. 17. The method of claim 11, further including storing the INL in storage. 18. The method of claim 17, further including storing the INL in the storage in association with first characteristics corresponding to a first time when the INL was determined, the first characteristics corresponding to at least one of a frequency of the periodic signal, an amplitude of the periodic signal, a temperature at the first time, or an amount of noise at the first time. 19. The method of claim 18, further including reducing at a second time after the first time, the INL in the output of the ADC by removing a value corresponding to the stored INL from the output of the ADC based on match between the first characteristics and second characteristics corresponding to the second time. 20. A tangible computer readable storage medium comprising instructions which, when executed, cause a processor to at least:
receive an output of an analog-to-digital converter (ADC), the output corresponding to a periodic signal transmitted to the ADC; determine at least harmonic amplitude and phase attributes corresponding to the output; and determine INL of the ADC based on a characteristic of the periodic signal and the harmonic attributes. | Methods and apparatus for determining non-linearity in analog-to-digital converters are disclosed. An example apparatus includes a signal interface to receive an output of an analog-to-digital converter (ADC), the output corresponding to a periodic signal transmitted to the ADC; a signal transformer to determine at least one of a harmonic phase or a harmonic amplitude corresponding to the output; and an integral non-linearity (INL) term calculator to determine the INL of the ADC based on a characteristic of the periodic signal and the at least one of the harmonic phase or the harmonic amplitude.1. An apparatus comprising:
a signal interface to receive an output of an analog-to-digital converter (ADC), the output corresponding to a periodic signal transmitted to the ADC; a signal transformer to determine at least harmonic amplitude and phase attributes corresponding to the output; and an integral non-linearity (INL) term calculator to determine INL of the ADC based on a characteristic of the periodic signal and the harmonic attributes. 2. The apparatus of claim 1, wherein the INL corresponds to an undesired characteristic in the output of the ADC. 3. The apparatus of claim 1, wherein the signal transformer is to determine the harmonic attribute corresponding to the output by transforming the output of the ADC to a frequency domain using a Fourier transform to identify a frequency spectrum of the output, the harmonic attribute corresponding to the frequency spectrum. 4. The apparatus of claim 3, wherein the INL term calculator determines the INL based on a harmonic phase to correct for Fourier transform phase distortion. 5. An apparatus comprising:
a signal interface to receive an output of an analog-to-digital converter (ADC), the output corresponding to a periodic signal transmitted to the ADC; a signal transformer to determine a harmonic attribute corresponding to the output; and an integral non-linearity (INL) term calculator to determine INL of the ADC based on a characteristic of the periodic signal and the harmonic attribute, wherein the INL term calculator determines the INL using Chebyshev polynomials. 6. The apparatus of claim 1, further including a signal generator to:
enable the periodic signal from being input into the ADC; and after the INL is determined, disable the periodic signal from being input into the ADC. 7. The apparatus of claim 1, further including storage to store the INL. 8. The apparatus of claim 7, wherein the INL term calculator is to store the INL in the storage in association with first characteristics corresponding to a first time when the INL was determined, the first characteristics corresponding to at least one of a frequency of the periodic signal, an amplitude of the periodic signal, a temperature at the first time, or an amount of noise at the first time. 9. The apparatus of claim 8, further including an INL correction applicator to, at a second time after the first time, reduce the INL in the output of the ADC by removing a value corresponding to the stored INL from the output of the ADC based on match between the first characteristics and second characteristics corresponding to the second time. 10. The apparatus of claim 1, wherein the signal interface is to output a report including the INL. 11. A method comprising:
receiving an output of an analog-to-digital converter (ADC), the output corresponding to a periodic signal transmitted to the ADC; determining at least harmonic amplitude and phase attributes corresponding to the output; and determining INL of the ADC based on a characteristic of the periodic signal and the harmonic attributes. 12. The method of claim 11, wherein the INL corresponds to an undesired characteristic in the output of the ADC. 13. The method of claim 11, wherein the determining of the harmonic attribute corresponding to the output includes transforming the output of the ADC to a frequency domain using a Fourier transform to identify a frequency spectrum of the output, the harmonic attribute corresponding to the frequency spectrum. 14. The method of claim 13, further including determine the INL based on a harmonic phase to correct for Fourier transform phase distortion. 15. A method comprising:
receiving an output of an analog-to-digital converter (ADC), the output corresponding to a periodic signal transmitted to the ADC; determining a harmonic attribute corresponding to the output; and determining, using Chebyshev polynomials, the INL of the ADC based on a characteristic of the periodic signal and the harmonic attribute. 16. The method of claim 11, further including:
enabling the periodic signal from being input into the ADC; and after the INL is determined, disabling the periodic signal from being input into the ADC. 17. The method of claim 11, further including storing the INL in storage. 18. The method of claim 17, further including storing the INL in the storage in association with first characteristics corresponding to a first time when the INL was determined, the first characteristics corresponding to at least one of a frequency of the periodic signal, an amplitude of the periodic signal, a temperature at the first time, or an amount of noise at the first time. 19. The method of claim 18, further including reducing at a second time after the first time, the INL in the output of the ADC by removing a value corresponding to the stored INL from the output of the ADC based on match between the first characteristics and second characteristics corresponding to the second time. 20. A tangible computer readable storage medium comprising instructions which, when executed, cause a processor to at least:
receive an output of an analog-to-digital converter (ADC), the output corresponding to a periodic signal transmitted to the ADC; determine at least harmonic amplitude and phase attributes corresponding to the output; and determine INL of the ADC based on a characteristic of the periodic signal and the harmonic attributes. | 2,800 |
11,371 | 11,371 | 14,886,173 | 2,835 | An interruption apparatus includes a first portion having a trip unit and a second portion having a detection system. The first and second portions are individually selectable based upon the particular application and are then movable from a detached configuration to a connected configuration. The first and second portions are selected from a plurality of first portions and second portions having different specifications. A desired first portion having a first interruption rating and a desired second portion having detection capabilities that are suited to the particular application can be assembled together to provide a field-configurable interruption apparatus. | 1. An interruption apparatus structured to be electrically connected with a line conductor and a load conductor of an electrical circuit and to switch at least a portion of the circuit between an ON condition and an OFF condition, the interruption apparatus comprising:
a first portion comprising:
a first housing,
a first electrical apparatus situated on the first housing and comprising a set of separable electrical contacts and a first conductor, the first conductor being electrically connected with the set of separable electrical contacts and comprising a first connection element that is structured to be electrically connected with one of the line conductor and the load conductor, and
a trip unit situated on the first housing, the trip unit being operatively connected with the set of separable electrical contacts and structured to switch the set of separable electrical contacts between an OPEN state and a CLOSED state;
a second portion comprising:
a second housing, and
a second electrical apparatus situated on the second housing and comprising a second conductor having a second connection element that is structured to be electrically connected with the other of the line conductor and the load conductor; and
the first portion and the second portion being movable from a detached configuration to a connected configuration, the first and second portions being physically and electrically disconnected from one another in the detached configuration, the first and second housings being affixed together and the first and second electrical apparatuses being electrically connected together in the connected configuration. 2. The interruption apparatus of claim 1 wherein one of the first housing and the second housing has a number of connection lugs that have a number of engagement surfaces, and wherein the other of the first housing and the second housing has a number of retainers that have a number of retention surfaces, at least some of the number of engagement surfaces and at least some of the number of retention surfaces being engaged together in the connected configuration. 3. The interruption apparatus of claim 1 wherein the first portion and the second portion are immovable from the connected configuration to the detached configuration. 4. The interruption apparatus of claim 1 wherein the trip unit includes at least one of a thermal trip and a magnetic trip. 5. The interruption apparatus of claim 4 wherein the second electrical apparatus further comprises a detection system that is structured to detect at least a first type of fault in the electrical circuit and to responsively generate an output that is communicated to the first portion, the trip unit being structured to switch the set of separable electrical contacts from the CLOSED state to the OPEN state responsive to the output. 6. The interruption apparatus of claim 5 wherein the detection system comprises an actuator which is movable between a retracted position and an extended position and which, responsive to the output, is structured to move from the retracted' position to the extended position, the actuator in the extended position being engageable with the trip unit and being structured to initiate switching of the set of separable electrical contacts from the CLOSED state to the OPEN state. 7. The interruption apparatus of claim 6 wherein the first housing has a first interior region within which the trip unit is situated, and wherein the actuator in the extended position is at least partially received in the first interior region. 8. The interruption apparatus of claim 7 wherein the second housing has a second interior region within which the second electrical apparatus is situated, and wherein the actuator in the retracted position is at least partially received in the second interior region. 9. The interruption apparatus of claim 8 wherein a first portion of the actuator is received in the first interior region in the retracted position, and wherein a second portion of the actuator greater than the first portion is received in the first interior region in the extended position. 10. The interruption apparatus of claim 5 wherein the second portion is selected from a plurality of second portions, one second portion of the plurality of second portions having a detection system that is structured to detect a number of types of faults, another second portion of the plurality of second portions having another detection system that is structured to detect another number of types of faults, at least one of the number of types of faults and the another number of types of faults including a type of fault that is absent from the other of the number of types of faults and the another number of types of faults. 11. The interruption apparatus of claim 10 wherein the first portion is selected from a plurality of first portions each having a current interruption rating different than one another and which are all operable with the second portion. 12. The interruption apparatus of claim 5 wherein the first portion is selected from a plurality of first portions each having a current interruption rating different than one another and which are all operable with the second portion. 13. The interruption apparatus of claim 5 wherein the second portion comprises a TEST input device which, when actuated, is structured to provide an input to the detection system, and wherein the detection system is structured to generate the output responsive to the input from the TEST input device. 14. The interruption apparatus of claim 5 wherein the second portion comprises a processor apparatus having one or more routines that are stored and executable thereon and that are structured to detect the at least first type of fault. 15. The interruption apparatus of claim 1 wherein the first portion is selected from a plurality of first portions each having a current interruption rating different than one another and which are all operable with the second portion. | An interruption apparatus includes a first portion having a trip unit and a second portion having a detection system. The first and second portions are individually selectable based upon the particular application and are then movable from a detached configuration to a connected configuration. The first and second portions are selected from a plurality of first portions and second portions having different specifications. A desired first portion having a first interruption rating and a desired second portion having detection capabilities that are suited to the particular application can be assembled together to provide a field-configurable interruption apparatus.1. An interruption apparatus structured to be electrically connected with a line conductor and a load conductor of an electrical circuit and to switch at least a portion of the circuit between an ON condition and an OFF condition, the interruption apparatus comprising:
a first portion comprising:
a first housing,
a first electrical apparatus situated on the first housing and comprising a set of separable electrical contacts and a first conductor, the first conductor being electrically connected with the set of separable electrical contacts and comprising a first connection element that is structured to be electrically connected with one of the line conductor and the load conductor, and
a trip unit situated on the first housing, the trip unit being operatively connected with the set of separable electrical contacts and structured to switch the set of separable electrical contacts between an OPEN state and a CLOSED state;
a second portion comprising:
a second housing, and
a second electrical apparatus situated on the second housing and comprising a second conductor having a second connection element that is structured to be electrically connected with the other of the line conductor and the load conductor; and
the first portion and the second portion being movable from a detached configuration to a connected configuration, the first and second portions being physically and electrically disconnected from one another in the detached configuration, the first and second housings being affixed together and the first and second electrical apparatuses being electrically connected together in the connected configuration. 2. The interruption apparatus of claim 1 wherein one of the first housing and the second housing has a number of connection lugs that have a number of engagement surfaces, and wherein the other of the first housing and the second housing has a number of retainers that have a number of retention surfaces, at least some of the number of engagement surfaces and at least some of the number of retention surfaces being engaged together in the connected configuration. 3. The interruption apparatus of claim 1 wherein the first portion and the second portion are immovable from the connected configuration to the detached configuration. 4. The interruption apparatus of claim 1 wherein the trip unit includes at least one of a thermal trip and a magnetic trip. 5. The interruption apparatus of claim 4 wherein the second electrical apparatus further comprises a detection system that is structured to detect at least a first type of fault in the electrical circuit and to responsively generate an output that is communicated to the first portion, the trip unit being structured to switch the set of separable electrical contacts from the CLOSED state to the OPEN state responsive to the output. 6. The interruption apparatus of claim 5 wherein the detection system comprises an actuator which is movable between a retracted position and an extended position and which, responsive to the output, is structured to move from the retracted' position to the extended position, the actuator in the extended position being engageable with the trip unit and being structured to initiate switching of the set of separable electrical contacts from the CLOSED state to the OPEN state. 7. The interruption apparatus of claim 6 wherein the first housing has a first interior region within which the trip unit is situated, and wherein the actuator in the extended position is at least partially received in the first interior region. 8. The interruption apparatus of claim 7 wherein the second housing has a second interior region within which the second electrical apparatus is situated, and wherein the actuator in the retracted position is at least partially received in the second interior region. 9. The interruption apparatus of claim 8 wherein a first portion of the actuator is received in the first interior region in the retracted position, and wherein a second portion of the actuator greater than the first portion is received in the first interior region in the extended position. 10. The interruption apparatus of claim 5 wherein the second portion is selected from a plurality of second portions, one second portion of the plurality of second portions having a detection system that is structured to detect a number of types of faults, another second portion of the plurality of second portions having another detection system that is structured to detect another number of types of faults, at least one of the number of types of faults and the another number of types of faults including a type of fault that is absent from the other of the number of types of faults and the another number of types of faults. 11. The interruption apparatus of claim 10 wherein the first portion is selected from a plurality of first portions each having a current interruption rating different than one another and which are all operable with the second portion. 12. The interruption apparatus of claim 5 wherein the first portion is selected from a plurality of first portions each having a current interruption rating different than one another and which are all operable with the second portion. 13. The interruption apparatus of claim 5 wherein the second portion comprises a TEST input device which, when actuated, is structured to provide an input to the detection system, and wherein the detection system is structured to generate the output responsive to the input from the TEST input device. 14. The interruption apparatus of claim 5 wherein the second portion comprises a processor apparatus having one or more routines that are stored and executable thereon and that are structured to detect the at least first type of fault. 15. The interruption apparatus of claim 1 wherein the first portion is selected from a plurality of first portions each having a current interruption rating different than one another and which are all operable with the second portion. | 2,800 |
11,372 | 11,372 | 13,772,694 | 2,828 | Multi-surface emitting mid-IR multiwavelength distributed-feedback quantum cascade ring lasers laid out in a concentric circle are disclosed. The lasers utilize quantum cascade core designs to produce optical gain in the mid-infrared region and may generate several wavelengths simultaneously or sequentially. Methods of making along with methods of using such devices are also disclosed. | 1. A laser comprising:
i) a gain material comprising at least two, compositionally non-identical, layers forming a superlattice, wherein the gain material generates photons by intersubband transitions; and ii) at least two circular lasing sections with non-equivalent lengths placed in a concentric circle with a common center, wherein:
a. each lasing section comprises
i. a grating have a non-equivalent period or Bragg wavelengths; and
ii. an active region; and
b. the lasing sections are separated by a electrical isolation region. 2. The laser of claim 1, wherein the lasing sections are separated by an electric isolation region comprising a p-type or semi-insulating layer in an n-cladding layer or by removal of the high doping part of the n-cladding layer. 3. The laser of claim 1, wherein the emission wavelength from at least one of the laser sections is from about 2.5 μm to about 15 μm. 4. The laser of claim 1, wherein at least one layer of the superlattice comprises GaxIn1-xAs, where x is from 0 to 1. 5. The laser of claim 1, wherein at least one layer of the superlattice comprises AlyIn1-yAs, where y is from 0 to 1. 6. The laser according of claim 1, wherein the active region comprises at least three stacks and wherein the laser sections are arranged such that the section emitting at the shortest wavelength is closest to the common center, and the section emitting at the longest wavelength is farthest from the common center. 7. The laser of claim 1, wherein the laser sections lase in pulsed mode. 8. The laser of claim 7, wherein the laser pulse width is from about 10 ns to about 1 ms. 9. The laser of claim 1, wherein the laser sections lase in continuous mode. 10. The laser of claim 1, wherein all laser sections may fire simultaneously. 11. The laser of claim 1, wherein the laser sections are fired sequentially. 12. A method of detecting the signal output from a sample comprising:
a. applying at least one laser event from the laser of claim 1 to the sample; and b. collecting at least some of the light after it has interacted with the sample. 13. The method of claim 12, wherein the laser wavelength is in the infrared region. 14. The method of claim 13, wherein the collecting of the light provides information on infrared absorbance of the sample. 15. The method of claim 12, wherein the sample is in the gas phase. 16. The method of claim 12, wherein the sample is in the liquid phase. 17. The method of claim 12, wherein the sample is in the solid phase. 18. The method of claim 12, wherein the collecting of the light provides information on infrared reflectance of the sample. 19. A device comprising multiple lasers of claim 1, wherein the lasers are designed to emit light toward the same spatial spot. | Multi-surface emitting mid-IR multiwavelength distributed-feedback quantum cascade ring lasers laid out in a concentric circle are disclosed. The lasers utilize quantum cascade core designs to produce optical gain in the mid-infrared region and may generate several wavelengths simultaneously or sequentially. Methods of making along with methods of using such devices are also disclosed.1. A laser comprising:
i) a gain material comprising at least two, compositionally non-identical, layers forming a superlattice, wherein the gain material generates photons by intersubband transitions; and ii) at least two circular lasing sections with non-equivalent lengths placed in a concentric circle with a common center, wherein:
a. each lasing section comprises
i. a grating have a non-equivalent period or Bragg wavelengths; and
ii. an active region; and
b. the lasing sections are separated by a electrical isolation region. 2. The laser of claim 1, wherein the lasing sections are separated by an electric isolation region comprising a p-type or semi-insulating layer in an n-cladding layer or by removal of the high doping part of the n-cladding layer. 3. The laser of claim 1, wherein the emission wavelength from at least one of the laser sections is from about 2.5 μm to about 15 μm. 4. The laser of claim 1, wherein at least one layer of the superlattice comprises GaxIn1-xAs, where x is from 0 to 1. 5. The laser of claim 1, wherein at least one layer of the superlattice comprises AlyIn1-yAs, where y is from 0 to 1. 6. The laser according of claim 1, wherein the active region comprises at least three stacks and wherein the laser sections are arranged such that the section emitting at the shortest wavelength is closest to the common center, and the section emitting at the longest wavelength is farthest from the common center. 7. The laser of claim 1, wherein the laser sections lase in pulsed mode. 8. The laser of claim 7, wherein the laser pulse width is from about 10 ns to about 1 ms. 9. The laser of claim 1, wherein the laser sections lase in continuous mode. 10. The laser of claim 1, wherein all laser sections may fire simultaneously. 11. The laser of claim 1, wherein the laser sections are fired sequentially. 12. A method of detecting the signal output from a sample comprising:
a. applying at least one laser event from the laser of claim 1 to the sample; and b. collecting at least some of the light after it has interacted with the sample. 13. The method of claim 12, wherein the laser wavelength is in the infrared region. 14. The method of claim 13, wherein the collecting of the light provides information on infrared absorbance of the sample. 15. The method of claim 12, wherein the sample is in the gas phase. 16. The method of claim 12, wherein the sample is in the liquid phase. 17. The method of claim 12, wherein the sample is in the solid phase. 18. The method of claim 12, wherein the collecting of the light provides information on infrared reflectance of the sample. 19. A device comprising multiple lasers of claim 1, wherein the lasers are designed to emit light toward the same spatial spot. | 2,800 |
11,373 | 11,373 | 15,678,719 | 2,883 | A high backscattering fiber comprising a perturbed segment in which the perturbed segment reflects a relative power that is more than three (3) decibels (dB) above Rayleigh scattering. The high backscattering fiber also exhibits a coupling loss of less than 0.5 dB. | 1. An optical fiber having a modified index caused by applying a spatial pattern that creates a refractive index perturbation, the optical fiber comprising:
a perturbed segment having an index perturbation that causes backscattering that is more than three (3) decibels (dB) above Rayleigh scattering; and a mode effective area that is no smaller than that of a standard single-mode fiber, the standard single-mode fiber being a G.652-compliant optical fiber. 2. An optical fiber having a modified index caused by applying a spatial pattern that creates a refractive index perturbation, the optical fiber comprising:
a perturbed segment having an index perturbation that causes backscattering that is more than ten (10) decibels (dB) above Rayleigh scattering; a mode effective area that is no smaller than that of a standard single-mode fiber, the standard single-mode fiber being a G.652-compliant optical fiber. 3. An optical fiber having a modified index caused by applying a spatial pattern that creates a refractive index perturbation, the optical fiber comprising:
a perturbed segment having an index perturbation that causes backscattering that is greater than Rayleigh scattering; and a mode effective area that is no smaller than that of a standard single-mode fiber. 4. The fiber of claim 3, wherein the standard single-mode fiber is a G.652-compliant optical fiber. 5. The fiber of claim 3, further comprising a nonlinearity that is no greater than that of the standard single-mode fiber. 6. The fiber of claim 3, wherein the backscattering caused by the index perturbation is more than three (3) decibels (dB) above Rayleigh scattering. 7. The fiber of claim 3, wherein the backscattering caused by the index perturbation is more than ten (10) decibels (dB) above Rayleigh scattering. | A high backscattering fiber comprising a perturbed segment in which the perturbed segment reflects a relative power that is more than three (3) decibels (dB) above Rayleigh scattering. The high backscattering fiber also exhibits a coupling loss of less than 0.5 dB.1. An optical fiber having a modified index caused by applying a spatial pattern that creates a refractive index perturbation, the optical fiber comprising:
a perturbed segment having an index perturbation that causes backscattering that is more than three (3) decibels (dB) above Rayleigh scattering; and a mode effective area that is no smaller than that of a standard single-mode fiber, the standard single-mode fiber being a G.652-compliant optical fiber. 2. An optical fiber having a modified index caused by applying a spatial pattern that creates a refractive index perturbation, the optical fiber comprising:
a perturbed segment having an index perturbation that causes backscattering that is more than ten (10) decibels (dB) above Rayleigh scattering; a mode effective area that is no smaller than that of a standard single-mode fiber, the standard single-mode fiber being a G.652-compliant optical fiber. 3. An optical fiber having a modified index caused by applying a spatial pattern that creates a refractive index perturbation, the optical fiber comprising:
a perturbed segment having an index perturbation that causes backscattering that is greater than Rayleigh scattering; and a mode effective area that is no smaller than that of a standard single-mode fiber. 4. The fiber of claim 3, wherein the standard single-mode fiber is a G.652-compliant optical fiber. 5. The fiber of claim 3, further comprising a nonlinearity that is no greater than that of the standard single-mode fiber. 6. The fiber of claim 3, wherein the backscattering caused by the index perturbation is more than three (3) decibels (dB) above Rayleigh scattering. 7. The fiber of claim 3, wherein the backscattering caused by the index perturbation is more than ten (10) decibels (dB) above Rayleigh scattering. | 2,800 |
11,374 | 11,374 | 15,016,338 | 2,852 | A motor controller circuit includes an electrical powertrain having a three phase input, a DC link and a three phase output, a controller including a processor and a memory, a first current sensor configured to sense a current at the three phase input, a second current sensor configured to sense a current at the three phase output, and a third sensor configured to sense a current at the DC link, and wherein the memory stores instructions configured to cause the processor to compare an operational model of the powertrain against a mathematical model of the powertrain and to detect a high impedance fault when a deviation between the operational model and the mathematical model exceeds a threshold. | 1. A method for detecting a high impedance fault in an electrical circuit comprising:
comparing an operational model of an electrical circuit against an expected operations model of the electrical circuit; and determining that a high impedance fault exists within the electrical circuit in response to a deviation between the operational model and the expected operations model by at least a predetermined amount. 2. The method of claim 1, further comprising activating fault protection circuit in response to determining that a high impedance fault exists. 3. The method of claim 2, wherein activating a fault protection device comprises simulating a low impedance fault, thereby tripping the fault protection device. 4. The method of claim 3, wherein simulating a low impedance fault comprises placing a DC/AC converter within the electrical circuit in a crowbar mode. 5. The method of claim 1, further comprising determining the operational model of the electrical circuit based at least in part on a measured input common mode current, a measured input differential mode current, a measured output common mode, a measured output differential mode current, a measured common mode current in a DC link, and a measured differential mode current in the DC link. 6. The method of claim 5, wherein the operational model of the electrical circuit is further determined at least in part by at least one sensed voltage within the electrical circuit. 7. The method of claim 1, wherein the expected operations model is a model of expected operations of the electrical circuit, and wherein the model is purely theoretical. 8. The method of claim 1, wherein the expected operations model is a model of expected operations of the electrical circuit, and wherein the model is at least partial based on empirical operation sampling. 9. The method of claim 1, wherein the expected operations model is a model of expected operations of the electrical circuit based on commanded parameters of the electrical circuit. 10. The method of claim 9, wherein the commanded parameters include at least one of a commanded motor speed, a commanded torque, and a voltage applied to the electrical circuit. 11. The method of claim 1, wherein the electrical circuit is a motor controller. 12. The method of claim 1, wherein the expected operations model is a mathematical model of expected electrical powertrain operations and the operational model is a mathematical model of actual electrical powertrain operations. 13. The method of claim 1, wherein the deviation between the operational model and the expected operations model is at least one of:
a deviation between a common mode current of the three phase supply of the operational model and a common mode current of the three phase supply of the expected operations model; a deviation between a DC link common mode current of the operational model and a DC link common mode of the expected operations model; and a deviation between a value dependent on at least one of the common mode current of the three phase power supply and the DC link common mode current of each of the operational model and the expected operations model, 14. A motor controller circuit comprising:
an electrical powertrain including a three phase input, a DC link and a three phase output; a controller including a processor and a memory; a first current sensor configured to sense a current at the three phase input, a second current sensor configured to sense a current at the three phase output, and a third sensor configured to sense a current at the DC link; and wherein the memory stores instructions configured to cause the processor to compare an operational model of the powertrain against an expected operations model of the powertrain and to detect a high impedance fault when a deviation between the operational model and the expected operations model exceeds a threshold. 15. The motor controller of claim 14, further comprising a fault protection circuit connected to said three phase input. 16. The motor controller of claim 15, wherein the faulty protection circuit is a fuse type circuit. 17. The motor controller of claim 14, wherein the memory further includes instructions configured to cause the processor to activate a fault protection circuit in response to the threshold being exceeded. 18. The motor controller of claim 17, wherein activating the fault protection circuit comprises simulating a low impedance fault. 19. The motor controller of claim 18, wherein simulating a low impedance fault comprises placing a DC/AC converter within said powertrain in a crowbar mode. | A motor controller circuit includes an electrical powertrain having a three phase input, a DC link and a three phase output, a controller including a processor and a memory, a first current sensor configured to sense a current at the three phase input, a second current sensor configured to sense a current at the three phase output, and a third sensor configured to sense a current at the DC link, and wherein the memory stores instructions configured to cause the processor to compare an operational model of the powertrain against a mathematical model of the powertrain and to detect a high impedance fault when a deviation between the operational model and the mathematical model exceeds a threshold.1. A method for detecting a high impedance fault in an electrical circuit comprising:
comparing an operational model of an electrical circuit against an expected operations model of the electrical circuit; and determining that a high impedance fault exists within the electrical circuit in response to a deviation between the operational model and the expected operations model by at least a predetermined amount. 2. The method of claim 1, further comprising activating fault protection circuit in response to determining that a high impedance fault exists. 3. The method of claim 2, wherein activating a fault protection device comprises simulating a low impedance fault, thereby tripping the fault protection device. 4. The method of claim 3, wherein simulating a low impedance fault comprises placing a DC/AC converter within the electrical circuit in a crowbar mode. 5. The method of claim 1, further comprising determining the operational model of the electrical circuit based at least in part on a measured input common mode current, a measured input differential mode current, a measured output common mode, a measured output differential mode current, a measured common mode current in a DC link, and a measured differential mode current in the DC link. 6. The method of claim 5, wherein the operational model of the electrical circuit is further determined at least in part by at least one sensed voltage within the electrical circuit. 7. The method of claim 1, wherein the expected operations model is a model of expected operations of the electrical circuit, and wherein the model is purely theoretical. 8. The method of claim 1, wherein the expected operations model is a model of expected operations of the electrical circuit, and wherein the model is at least partial based on empirical operation sampling. 9. The method of claim 1, wherein the expected operations model is a model of expected operations of the electrical circuit based on commanded parameters of the electrical circuit. 10. The method of claim 9, wherein the commanded parameters include at least one of a commanded motor speed, a commanded torque, and a voltage applied to the electrical circuit. 11. The method of claim 1, wherein the electrical circuit is a motor controller. 12. The method of claim 1, wherein the expected operations model is a mathematical model of expected electrical powertrain operations and the operational model is a mathematical model of actual electrical powertrain operations. 13. The method of claim 1, wherein the deviation between the operational model and the expected operations model is at least one of:
a deviation between a common mode current of the three phase supply of the operational model and a common mode current of the three phase supply of the expected operations model; a deviation between a DC link common mode current of the operational model and a DC link common mode of the expected operations model; and a deviation between a value dependent on at least one of the common mode current of the three phase power supply and the DC link common mode current of each of the operational model and the expected operations model, 14. A motor controller circuit comprising:
an electrical powertrain including a three phase input, a DC link and a three phase output; a controller including a processor and a memory; a first current sensor configured to sense a current at the three phase input, a second current sensor configured to sense a current at the three phase output, and a third sensor configured to sense a current at the DC link; and wherein the memory stores instructions configured to cause the processor to compare an operational model of the powertrain against an expected operations model of the powertrain and to detect a high impedance fault when a deviation between the operational model and the expected operations model exceeds a threshold. 15. The motor controller of claim 14, further comprising a fault protection circuit connected to said three phase input. 16. The motor controller of claim 15, wherein the faulty protection circuit is a fuse type circuit. 17. The motor controller of claim 14, wherein the memory further includes instructions configured to cause the processor to activate a fault protection circuit in response to the threshold being exceeded. 18. The motor controller of claim 17, wherein activating the fault protection circuit comprises simulating a low impedance fault. 19. The motor controller of claim 18, wherein simulating a low impedance fault comprises placing a DC/AC converter within said powertrain in a crowbar mode. | 2,800 |
11,375 | 11,375 | 14,228,247 | 2,819 | A three dimensional stacked circuit device includes multiple decks of circuit elements, each deck including multiple tiers of circuit elements. Each deck includes a highly doped hollow channel extending through the deck. Below the first deck is a source conductor to drive activity of the circuit elements. Between each deck is a conductive stop layer that interconnects the hollow channel from one deck to the hollow channel of the deck adjacent to it. Thus, all hollow channels of all decks are electrically coupled to the source conductor. | 1. A circuit device comprising:
a source conductor layer on a semiconductor substrate; multiple decks of memory cells, the decks being stacked on each other, each deck including
multiple tiers of memory cells stacked on each other, each tier including a memory cell; and
at least one hollow channel extending through the deck, the hollow channel including a channel insulator, and a heavily doped polycrystalline material surrounding the channel insulator and positioned adjacent to the multiple tiers of memory cells; and
a conductive stop layer between each pair of adjacent decks, wherein the stop layer interconnects a hollow channel of one deck to the hollow channel of the other deck; wherein the hollow channel of a first deck extends from the source conductor to the stop layer between the first deck and an adjacent deck, and the hollow channel of each other deck extends from the stop layer through the deck. 2. The circuit device of claim 1, wherein the multiple decks comprises more than two decks of memory cells. 3. The circuit device of claim 1, wherein each deck includes more than 30 tiers of memory cells. 4. The circuit device of claim 1, wherein the heavily doped polycrystalline material comprises heavily doped polysilicon. 5. The circuit device of claim 1, wherein the heavily doped polycrystalline material comprises a thin channel of polycrystalline material having a thickness of approximately one fifth or less than a width of the hollow channel. 6. The circuit device of claim 1, wherein the conductive stop layer comprises a highly conductive material. 7. The circuit device of claim 6, wherein the highly conductive material comprises a metal alloy. 8. The circuit device of claim 1, further comprising a select gate in the first deck, wherein the select gate is the select gate for all memory cells of the multiple decks. 9. An electronic device comprising:
a three-dimensional stacked memory device to store data, the memory device including:
a source conductor layer on a semiconductor substrate;
multiple decks of memory cells, the decks being stacked on each other, each deck including
multiple tiers of memory cells stacked on each other, each tier including a memory cell; and
at least one hollow channel extending through the deck, the hollow channel including a channel insulator, and a heavily doped polycrystalline material surrounding the channel insulator and positioned adjacent to the multiple tiers of memory cells; and
a conductive stop layer between each pair of adjacent decks, wherein the stop layer interconnects a hollow channel of one deck to the hollow channel of the other deck;
wherein the hollow channel of a first deck extends from the source conductor to the stop layer between the first deck and an adjacent deck, and the hollow channel of each other deck extends from the stop layer through the deck; and
a touchscreen display coupled to generate a display based on data accessed from the memory device. 10. The electronic device of claim 9, wherein the multiple decks comprises more than two decks of memory cells. 11. The electronic device of claim 9, wherein the heavily doped polycrystalline material comprises heavily doped polysilicon. 12. The electronic device of claim 9, wherein the heavily doped polycrystalline material comprises a thin channel of polycrystalline material having a thickness of approximately one fifth or less than a width of the hollow channel. 13. The electronic device of claim 9, wherein the conductive stop layer comprises a highly conductive material. 14. The electronic device of claim 13, wherein the highly conductive material comprises a metal alloy. 15. The electronic device of claim 9, further comprising a select gate in the first deck, wherein the select gate is the select gate for all memory cells of the multiple decks. 16. A method comprising:
generating a first deck of circuit elements, the first deck having multiple tiers of circuit elements stacked above a source conductor; creating a first highly doped hollow channel in the first deck to electrically couple to the source conductor; creating a conductive stop layer in the first hollow channel of the first deck, the stop layer to electrically couple to the source conductor via the first hollow channel; generating a second deck of circuit elements, the second deck having multiple tiers of circuit elements stacked above the source conductor; and creating a second highly doped hollow channel in the second deck to electrically couple to the stop layer. 17. The method of claim 16, wherein creating the first hollow channel further comprises:
creating a hollow pillar through the first deck to the source conductor; depositing a highly doped polycrystalline material along sides of the hollow pillar, a thickness of the polycrystalline materials being much less than a width of the hollow pillar; and filling the hollow pillar with an insulator. 18. The method of claim 17, wherein creating the hollow pillar further comprises:
etching the hollow pillar with a non-selective etch material to create an initial depth of the hollow pillar; and etching the hollow pillar with a selective etch material to create a clean stop of the hollow pillar at the source conductor. 19. The method of claim 16, wherein creating the conductive stop layer further comprises:
annealing the stop layer to the first hollow channel. 20. The method of claim 16, wherein the conductive stop layer comprises a first conductive stop layer, and further comprising:
creating a second conductive stop layer in the second hollow channel of the second deck, the second stop layer to electrically couple to the first stop layer via the second hollow channel; generating a third deck of circuit elements, the third deck having multiple tiers of circuit elements stacked above the source conductor; and creating a third highly doped hollow channel in the third deck to electrically couple to the second stop layer. | A three dimensional stacked circuit device includes multiple decks of circuit elements, each deck including multiple tiers of circuit elements. Each deck includes a highly doped hollow channel extending through the deck. Below the first deck is a source conductor to drive activity of the circuit elements. Between each deck is a conductive stop layer that interconnects the hollow channel from one deck to the hollow channel of the deck adjacent to it. Thus, all hollow channels of all decks are electrically coupled to the source conductor.1. A circuit device comprising:
a source conductor layer on a semiconductor substrate; multiple decks of memory cells, the decks being stacked on each other, each deck including
multiple tiers of memory cells stacked on each other, each tier including a memory cell; and
at least one hollow channel extending through the deck, the hollow channel including a channel insulator, and a heavily doped polycrystalline material surrounding the channel insulator and positioned adjacent to the multiple tiers of memory cells; and
a conductive stop layer between each pair of adjacent decks, wherein the stop layer interconnects a hollow channel of one deck to the hollow channel of the other deck; wherein the hollow channel of a first deck extends from the source conductor to the stop layer between the first deck and an adjacent deck, and the hollow channel of each other deck extends from the stop layer through the deck. 2. The circuit device of claim 1, wherein the multiple decks comprises more than two decks of memory cells. 3. The circuit device of claim 1, wherein each deck includes more than 30 tiers of memory cells. 4. The circuit device of claim 1, wherein the heavily doped polycrystalline material comprises heavily doped polysilicon. 5. The circuit device of claim 1, wherein the heavily doped polycrystalline material comprises a thin channel of polycrystalline material having a thickness of approximately one fifth or less than a width of the hollow channel. 6. The circuit device of claim 1, wherein the conductive stop layer comprises a highly conductive material. 7. The circuit device of claim 6, wherein the highly conductive material comprises a metal alloy. 8. The circuit device of claim 1, further comprising a select gate in the first deck, wherein the select gate is the select gate for all memory cells of the multiple decks. 9. An electronic device comprising:
a three-dimensional stacked memory device to store data, the memory device including:
a source conductor layer on a semiconductor substrate;
multiple decks of memory cells, the decks being stacked on each other, each deck including
multiple tiers of memory cells stacked on each other, each tier including a memory cell; and
at least one hollow channel extending through the deck, the hollow channel including a channel insulator, and a heavily doped polycrystalline material surrounding the channel insulator and positioned adjacent to the multiple tiers of memory cells; and
a conductive stop layer between each pair of adjacent decks, wherein the stop layer interconnects a hollow channel of one deck to the hollow channel of the other deck;
wherein the hollow channel of a first deck extends from the source conductor to the stop layer between the first deck and an adjacent deck, and the hollow channel of each other deck extends from the stop layer through the deck; and
a touchscreen display coupled to generate a display based on data accessed from the memory device. 10. The electronic device of claim 9, wherein the multiple decks comprises more than two decks of memory cells. 11. The electronic device of claim 9, wherein the heavily doped polycrystalline material comprises heavily doped polysilicon. 12. The electronic device of claim 9, wherein the heavily doped polycrystalline material comprises a thin channel of polycrystalline material having a thickness of approximately one fifth or less than a width of the hollow channel. 13. The electronic device of claim 9, wherein the conductive stop layer comprises a highly conductive material. 14. The electronic device of claim 13, wherein the highly conductive material comprises a metal alloy. 15. The electronic device of claim 9, further comprising a select gate in the first deck, wherein the select gate is the select gate for all memory cells of the multiple decks. 16. A method comprising:
generating a first deck of circuit elements, the first deck having multiple tiers of circuit elements stacked above a source conductor; creating a first highly doped hollow channel in the first deck to electrically couple to the source conductor; creating a conductive stop layer in the first hollow channel of the first deck, the stop layer to electrically couple to the source conductor via the first hollow channel; generating a second deck of circuit elements, the second deck having multiple tiers of circuit elements stacked above the source conductor; and creating a second highly doped hollow channel in the second deck to electrically couple to the stop layer. 17. The method of claim 16, wherein creating the first hollow channel further comprises:
creating a hollow pillar through the first deck to the source conductor; depositing a highly doped polycrystalline material along sides of the hollow pillar, a thickness of the polycrystalline materials being much less than a width of the hollow pillar; and filling the hollow pillar with an insulator. 18. The method of claim 17, wherein creating the hollow pillar further comprises:
etching the hollow pillar with a non-selective etch material to create an initial depth of the hollow pillar; and etching the hollow pillar with a selective etch material to create a clean stop of the hollow pillar at the source conductor. 19. The method of claim 16, wherein creating the conductive stop layer further comprises:
annealing the stop layer to the first hollow channel. 20. The method of claim 16, wherein the conductive stop layer comprises a first conductive stop layer, and further comprising:
creating a second conductive stop layer in the second hollow channel of the second deck, the second stop layer to electrically couple to the first stop layer via the second hollow channel; generating a third deck of circuit elements, the third deck having multiple tiers of circuit elements stacked above the source conductor; and creating a third highly doped hollow channel in the third deck to electrically couple to the second stop layer. | 2,800 |
11,376 | 11,376 | 14,335,335 | 2,846 | A motor controller coupled to a motor is provided. The motor controller includes a processor, a memory coupled to the processor, a first input coupled to the processor, wherein the first input is associated with a first mode of operation, and a second input coupled to the processor, wherein the second input is associated with a calibration mode. The motor controller is configured to receive, through the first input, a first activation signal, operate the motor in the first mode of operation in response to receiving the first activation signal, while operating the motor in the first mode of operation, receive, through the second input, a second activation signal, in response to receiving the first activation signal and the second activation signal, adjust a value of a parameter associated with the first mode of operation, and store the value of the parameter in the memory. | 1. A motor controller coupled to a motor, said motor controller comprising a processor, a memory coupled to said processor, a first input coupled to said processor, said first input associated with a first mode of operation, a second input coupled to said processor, said second input associated with a calibration mode, said motor controller configured to:
receive, through said first input, a first activation signal; operate the motor in the first mode of operation in response to receiving the first activation signal; while operating the motor in the first mode of operation, receive, through said second input, a second activation signal; in response to receiving the first activation signal and the second activation signal, adjust a value of a parameter associated with the first mode of operation; and store the value of the parameter in the memory. 2. The motor controller of claim 1, further configured to incrementally increase or decrease the value of the parameter while receiving the first activation signal and the second activation signal. 3. The motor controller of claim 2, further configured to:
determine that the value of the parameter is equal to a predefined upper or lower threshold value; and in response to determining that the value of the parameter is equal to the predefined upper or lower threshold value, stop incrementally increasing or decreasing the value of the parameter. 4. The motor controller of claim 3, further configured to:
determine that the second activation signal has not been received for a predefined time period; receive the second activation signal after the predefined time period has elapsed; and incrementally decrease or increase the value of the parameter while receiving the first activation signal and the second activation signal. 5. The motor controller of claim 2, further configured to increment or decrement the value of the parameter at a rate that is calibrated to a system response time associated with the motor. 6. The motor controller of claim 1, wherein the motor controller is coupled to a visual indicator, said motor controller further configured to transmit a feedback signal to the visual indicator that causes the visual indicator to represent the value of the parameter. 7. The motor controller of claim 1, further configured such that the first activation signal and the second activation signal are 24 volts. 8. The motor controller of claim 1, wherein the value is a first value and the parameter is a first parameter, and said motor controller is further configured to:
determine an amount of adjustment made to the first value; and adjust at least a second value of a second parameter associated with a second mode of operation in proportion to the amount of adjustment made to the first value. 9. The motor controller of claim 1, further configured such that the parameter is at least one of a speed, a torque, a pressure, an audible noise, and a fluid flow. 10. The motor controller of claim 1, further configured such that operating the motor in the first mode of operation, while receiving, through said second input, a second activation signal further comprises receiving the first activation signal while receiving the second activation signal. 11. A method for adjusting a value of a parameter associated with operation of a motor, said method is implemented by a motor controller including a processor coupled to a memory, a first input, and a second input, said method comprising:
receiving, by the motor controller through the first input, a first activation signal; operating the motor in the first mode of operation in response to receiving the first activation signal; while operating the motor in the first mode of operation, receiving, through the second input, a second activation signal; in response to receiving the first activation signal and the second activation signal, adjusting a value of a parameter associated with the first mode of operation; and storing the value of the parameter in the memory. 12. The method of claim 11, further comprising incrementally increasing or decreasing the value of the parameter while receiving the first activation signal and the second activation signal. 13. The method of claim 12, further comprising:
determining that the value of the parameter is equal to a predefined upper or lower threshold value; and in response to determining that the value of the parameter is equal to the predefined upper or lower threshold value, stopping incrementally increasing or decreasing the value of the parameter. 14. A motor controller coupled to a motor, said motor controller comprising a processor, a memory coupled to said processor, a first input coupled to said processor, a second input coupled to said processor, and a third input coupled to said processor, said motor controller configured to:
receive, through said first input, a first activation signal; operate the motor in a first mode of operation in response to receiving the first activation signal; determine that the first activation signal is no longer being received through said first input; receive through said third input, a second activation signal; in response to receiving the second activation signal, reconfigure said processor such that when said first input is activated, said motor controller increases a value of a parameter associated with the first mode of operation and when said second input is activated, said motor controller decreases the value of the parameter associated with the first mode of operation. 15. The motor controller of claim 14, wherein the value is a first value and the parameter is a first parameter, and said motor controller is further configured to:
operate the motor in a second mode of operation; and reconfigure said processor such that when said first input is activated, said motor controller increases a second value of a second parameter associated with the second mode of operation and when said second input is activated, said motor controller decreases the value of the parameter associated with the second mode of operation. 16. A motor controller coupled to a motor, said motor controller comprising a processor, a memory coupled to said processor, and a plurality of inputs coupled to said processor, said motor controller configured to:
receive, through at least one of said plurality of inputs, a first activation signal having a first type; operate the motor in a first mode of operation in response to receiving the first activation signal; receive, through at least one of said plurality of inputs, a second activation signal having a second type that is different from the first type; and in response to receiving the second activation signal of the second type, reconfigure said processor such that said motor controller selectively increases or decreases a value of a parameter associated with the first mode of operation. 17. The motor controller of claim 16, wherein said motor controller is further configured such that:
receiving the first activation signal having the first type includes receiving the first activation signal having a first waveform; and receiving the second activation signal having the second type includes receiving the second activation signal having a second waveform that is different from the first waveform. 18. The motor controller of claim 16, wherein said motor controller is further configured such that:
receiving the first activation signal having the first type includes receiving the first activation signal having a first voltage; and receiving the second activation signal having the second type includes receiving the second activation signal having a second voltage that is different from the first voltage. 19. The motor controller of claim 16, wherein said motor controller is further configured such that receiving the second activation signal further comprises receiving the second activation signal in combination with receiving the first activation signal. 20. The motor controller of claim 16, wherein said motor controller is further configured such that receiving the first activation signal further comprises detecting that the at least one input has a voltage lower than a switching threshold of the input. | A motor controller coupled to a motor is provided. The motor controller includes a processor, a memory coupled to the processor, a first input coupled to the processor, wherein the first input is associated with a first mode of operation, and a second input coupled to the processor, wherein the second input is associated with a calibration mode. The motor controller is configured to receive, through the first input, a first activation signal, operate the motor in the first mode of operation in response to receiving the first activation signal, while operating the motor in the first mode of operation, receive, through the second input, a second activation signal, in response to receiving the first activation signal and the second activation signal, adjust a value of a parameter associated with the first mode of operation, and store the value of the parameter in the memory.1. A motor controller coupled to a motor, said motor controller comprising a processor, a memory coupled to said processor, a first input coupled to said processor, said first input associated with a first mode of operation, a second input coupled to said processor, said second input associated with a calibration mode, said motor controller configured to:
receive, through said first input, a first activation signal; operate the motor in the first mode of operation in response to receiving the first activation signal; while operating the motor in the first mode of operation, receive, through said second input, a second activation signal; in response to receiving the first activation signal and the second activation signal, adjust a value of a parameter associated with the first mode of operation; and store the value of the parameter in the memory. 2. The motor controller of claim 1, further configured to incrementally increase or decrease the value of the parameter while receiving the first activation signal and the second activation signal. 3. The motor controller of claim 2, further configured to:
determine that the value of the parameter is equal to a predefined upper or lower threshold value; and in response to determining that the value of the parameter is equal to the predefined upper or lower threshold value, stop incrementally increasing or decreasing the value of the parameter. 4. The motor controller of claim 3, further configured to:
determine that the second activation signal has not been received for a predefined time period; receive the second activation signal after the predefined time period has elapsed; and incrementally decrease or increase the value of the parameter while receiving the first activation signal and the second activation signal. 5. The motor controller of claim 2, further configured to increment or decrement the value of the parameter at a rate that is calibrated to a system response time associated with the motor. 6. The motor controller of claim 1, wherein the motor controller is coupled to a visual indicator, said motor controller further configured to transmit a feedback signal to the visual indicator that causes the visual indicator to represent the value of the parameter. 7. The motor controller of claim 1, further configured such that the first activation signal and the second activation signal are 24 volts. 8. The motor controller of claim 1, wherein the value is a first value and the parameter is a first parameter, and said motor controller is further configured to:
determine an amount of adjustment made to the first value; and adjust at least a second value of a second parameter associated with a second mode of operation in proportion to the amount of adjustment made to the first value. 9. The motor controller of claim 1, further configured such that the parameter is at least one of a speed, a torque, a pressure, an audible noise, and a fluid flow. 10. The motor controller of claim 1, further configured such that operating the motor in the first mode of operation, while receiving, through said second input, a second activation signal further comprises receiving the first activation signal while receiving the second activation signal. 11. A method for adjusting a value of a parameter associated with operation of a motor, said method is implemented by a motor controller including a processor coupled to a memory, a first input, and a second input, said method comprising:
receiving, by the motor controller through the first input, a first activation signal; operating the motor in the first mode of operation in response to receiving the first activation signal; while operating the motor in the first mode of operation, receiving, through the second input, a second activation signal; in response to receiving the first activation signal and the second activation signal, adjusting a value of a parameter associated with the first mode of operation; and storing the value of the parameter in the memory. 12. The method of claim 11, further comprising incrementally increasing or decreasing the value of the parameter while receiving the first activation signal and the second activation signal. 13. The method of claim 12, further comprising:
determining that the value of the parameter is equal to a predefined upper or lower threshold value; and in response to determining that the value of the parameter is equal to the predefined upper or lower threshold value, stopping incrementally increasing or decreasing the value of the parameter. 14. A motor controller coupled to a motor, said motor controller comprising a processor, a memory coupled to said processor, a first input coupled to said processor, a second input coupled to said processor, and a third input coupled to said processor, said motor controller configured to:
receive, through said first input, a first activation signal; operate the motor in a first mode of operation in response to receiving the first activation signal; determine that the first activation signal is no longer being received through said first input; receive through said third input, a second activation signal; in response to receiving the second activation signal, reconfigure said processor such that when said first input is activated, said motor controller increases a value of a parameter associated with the first mode of operation and when said second input is activated, said motor controller decreases the value of the parameter associated with the first mode of operation. 15. The motor controller of claim 14, wherein the value is a first value and the parameter is a first parameter, and said motor controller is further configured to:
operate the motor in a second mode of operation; and reconfigure said processor such that when said first input is activated, said motor controller increases a second value of a second parameter associated with the second mode of operation and when said second input is activated, said motor controller decreases the value of the parameter associated with the second mode of operation. 16. A motor controller coupled to a motor, said motor controller comprising a processor, a memory coupled to said processor, and a plurality of inputs coupled to said processor, said motor controller configured to:
receive, through at least one of said plurality of inputs, a first activation signal having a first type; operate the motor in a first mode of operation in response to receiving the first activation signal; receive, through at least one of said plurality of inputs, a second activation signal having a second type that is different from the first type; and in response to receiving the second activation signal of the second type, reconfigure said processor such that said motor controller selectively increases or decreases a value of a parameter associated with the first mode of operation. 17. The motor controller of claim 16, wherein said motor controller is further configured such that:
receiving the first activation signal having the first type includes receiving the first activation signal having a first waveform; and receiving the second activation signal having the second type includes receiving the second activation signal having a second waveform that is different from the first waveform. 18. The motor controller of claim 16, wherein said motor controller is further configured such that:
receiving the first activation signal having the first type includes receiving the first activation signal having a first voltage; and receiving the second activation signal having the second type includes receiving the second activation signal having a second voltage that is different from the first voltage. 19. The motor controller of claim 16, wherein said motor controller is further configured such that receiving the second activation signal further comprises receiving the second activation signal in combination with receiving the first activation signal. 20. The motor controller of claim 16, wherein said motor controller is further configured such that receiving the first activation signal further comprises detecting that the at least one input has a voltage lower than a switching threshold of the input. | 2,800 |
11,377 | 11,377 | 13,542,470 | 2,868 | A method can be used for monitoring a processing circuit. The processing circuit generates a response to a request and the response is compared with an expected response. A pass pulse is generated when the response matches the expected response. The causing, comparing and generating steps are repeated a number of times A frequency at which pass pulses occur is evaluated. | 1. A method of monitoring a processing circuit, the method comprising:
causing the processing circuit to generate a response to a request; comparing the response with an expected response; generating a pass pulse when the response matches the expected response; repeating the causing, comparing and generating steps a plurality of times; and evaluating a frequency at which pass pulses occur. 2. The method of claim 1, further comprising indicating a failure when the frequency does not meet predefined frequency criterion. 3. The method of claim 2, further comprising providing a status signal, wherein indicating the failure comprises generating a failure level of the status signal. 4. The method of claim 2, wherein evaluating the frequency comprises:
determining a mean frequency in a predefined time period; and comparing the mean frequency with a frequency threshold. 5. The method of claim 4, further comprising indicating a failure when the mean frequency is below the frequency threshold. 6. The method of claim 2, wherein evaluating the frequency comprises:
counting the number of pass pulses in a predefined time frame; and comparing the number with a threshold. 7. The method of claim 6, further comprising indicating a failure when the number of pass pulses is below the threshold or equal to the threshold. 8. The method of claim 7, wherein the threshold is zero. 9. The method of claim 2, wherein evaluating the frequency comprises:
providing a counter and a clock signal; setting the counter to a start value; incrementing the counter using the pass pulses and decrementing the counter using the clock signal or decrementing the counter using the pass pulses and incrementing the counter using the clock signal; and evaluating a counter reading. 10. The method of claim 9, further comprising indicating a failure when the counter reading reaches a threshold. 11. The method of claim 1, further comprising:
generating at least one window sequence with a closed window period and an open window period; and evaluating a timing of the response in view of the window sequence. 12. The method of claim 11, wherein evaluating a timing of the response comprises detecting if the response is received in the open window period. 13. The method of claim 11, further comprising:
causing the processor to generate a response to each of a plurality of subsequent requests; and evaluating a timing of at least one response, but of less than the plurality of responses received in response to the plurality of requests. 14. A monitoring arrangement for monitoring a processing circuit, the monitoring arrangement comprising a first monitoring circuit, the first monitoring circuit configured:
to cause the processing circuit to generate a response to a request; to compare the response with an expected response; to generate a pass pulse when the response matches the expected response; to repeat the cause, compare and generate a plurality of times; and to evaluate a frequency at which pass pulses occur. 15. The monitoring arrangement of claim 14, wherein the first monitoring circuit is further configured to indicate a failure when the frequency does not meet predefined frequency criterion. 16. The monitoring arrangement of claim 15, wherein the first monitoring circuit is further configured
to provide a status signal; and to indicate the failure by generating a failure level of the status signal. 17. The monitoring arrangement of claim 15, wherein the first monitoring circuit, in order to evaluate the frequency, is configured
to determine a mean frequency in a predefined time period; and to compare the mean frequency with a frequency threshold. 18. The monitoring arrangement of claim 15, wherein the first monitoring circuit, in order to evaluate the frequency, is configured
to count the number of pass pulses in a predefined time frame; and to compare the number with a threshold. 19. The monitoring arrangement of claim 15, wherein the first monitoring circuit, in order to evaluate the frequency, is configured
to provide a counter and a clock signal; to set the counter to a start value; to either increment the counter using the pass pulses and decrement the counter using the clock signal or to decrement the counter using the pass pulses and increment the counter using the clock signal; and to evaluate a counter reading. 20. The monitoring arrangement of claim 19, wherein the first monitoring is further configured to indicate a failure when the counter reading reaches a threshold. 21. The monitoring arrangement of claim 14, further comprising a second monitoring circuit, the second monitoring circuit configured
to generate at least one window sequence with a closed window period and an open window period; and to evaluate a timing of the response in view of the window sequence. 22. The monitoring arrangement of claim 21, wherein the second monitoring circuit is further configured to detect if the response is received in the open window period. 23. The monitoring arrangement of claim 22,
wherein the first monitoring circuit is further configured to cause the processor to generate a response to each of a plurality of subsequent requests; and wherein the second monitoring circuit is further configured to evaluate a timing of at least one response, but of less than of the plurality of responses received in response to the plurality of requests. 24. A circuit arrangement, comprising:
a processing circuit; and a monitoring arrangement with a first monitoring circuit, the first monitoring circuit configured:
to cause the processing circuit generate a response to a request;
to compare the response with an expected response;
to generate a pass pulse when the response matches the expected response;
to repeat the cause, compare and generate a plurality of times; and
to evaluate a frequency at which pass pulses occur. | A method can be used for monitoring a processing circuit. The processing circuit generates a response to a request and the response is compared with an expected response. A pass pulse is generated when the response matches the expected response. The causing, comparing and generating steps are repeated a number of times A frequency at which pass pulses occur is evaluated.1. A method of monitoring a processing circuit, the method comprising:
causing the processing circuit to generate a response to a request; comparing the response with an expected response; generating a pass pulse when the response matches the expected response; repeating the causing, comparing and generating steps a plurality of times; and evaluating a frequency at which pass pulses occur. 2. The method of claim 1, further comprising indicating a failure when the frequency does not meet predefined frequency criterion. 3. The method of claim 2, further comprising providing a status signal, wherein indicating the failure comprises generating a failure level of the status signal. 4. The method of claim 2, wherein evaluating the frequency comprises:
determining a mean frequency in a predefined time period; and comparing the mean frequency with a frequency threshold. 5. The method of claim 4, further comprising indicating a failure when the mean frequency is below the frequency threshold. 6. The method of claim 2, wherein evaluating the frequency comprises:
counting the number of pass pulses in a predefined time frame; and comparing the number with a threshold. 7. The method of claim 6, further comprising indicating a failure when the number of pass pulses is below the threshold or equal to the threshold. 8. The method of claim 7, wherein the threshold is zero. 9. The method of claim 2, wherein evaluating the frequency comprises:
providing a counter and a clock signal; setting the counter to a start value; incrementing the counter using the pass pulses and decrementing the counter using the clock signal or decrementing the counter using the pass pulses and incrementing the counter using the clock signal; and evaluating a counter reading. 10. The method of claim 9, further comprising indicating a failure when the counter reading reaches a threshold. 11. The method of claim 1, further comprising:
generating at least one window sequence with a closed window period and an open window period; and evaluating a timing of the response in view of the window sequence. 12. The method of claim 11, wherein evaluating a timing of the response comprises detecting if the response is received in the open window period. 13. The method of claim 11, further comprising:
causing the processor to generate a response to each of a plurality of subsequent requests; and evaluating a timing of at least one response, but of less than the plurality of responses received in response to the plurality of requests. 14. A monitoring arrangement for monitoring a processing circuit, the monitoring arrangement comprising a first monitoring circuit, the first monitoring circuit configured:
to cause the processing circuit to generate a response to a request; to compare the response with an expected response; to generate a pass pulse when the response matches the expected response; to repeat the cause, compare and generate a plurality of times; and to evaluate a frequency at which pass pulses occur. 15. The monitoring arrangement of claim 14, wherein the first monitoring circuit is further configured to indicate a failure when the frequency does not meet predefined frequency criterion. 16. The monitoring arrangement of claim 15, wherein the first monitoring circuit is further configured
to provide a status signal; and to indicate the failure by generating a failure level of the status signal. 17. The monitoring arrangement of claim 15, wherein the first monitoring circuit, in order to evaluate the frequency, is configured
to determine a mean frequency in a predefined time period; and to compare the mean frequency with a frequency threshold. 18. The monitoring arrangement of claim 15, wherein the first monitoring circuit, in order to evaluate the frequency, is configured
to count the number of pass pulses in a predefined time frame; and to compare the number with a threshold. 19. The monitoring arrangement of claim 15, wherein the first monitoring circuit, in order to evaluate the frequency, is configured
to provide a counter and a clock signal; to set the counter to a start value; to either increment the counter using the pass pulses and decrement the counter using the clock signal or to decrement the counter using the pass pulses and increment the counter using the clock signal; and to evaluate a counter reading. 20. The monitoring arrangement of claim 19, wherein the first monitoring is further configured to indicate a failure when the counter reading reaches a threshold. 21. The monitoring arrangement of claim 14, further comprising a second monitoring circuit, the second monitoring circuit configured
to generate at least one window sequence with a closed window period and an open window period; and to evaluate a timing of the response in view of the window sequence. 22. The monitoring arrangement of claim 21, wherein the second monitoring circuit is further configured to detect if the response is received in the open window period. 23. The monitoring arrangement of claim 22,
wherein the first monitoring circuit is further configured to cause the processor to generate a response to each of a plurality of subsequent requests; and wherein the second monitoring circuit is further configured to evaluate a timing of at least one response, but of less than of the plurality of responses received in response to the plurality of requests. 24. A circuit arrangement, comprising:
a processing circuit; and a monitoring arrangement with a first monitoring circuit, the first monitoring circuit configured:
to cause the processing circuit generate a response to a request;
to compare the response with an expected response;
to generate a pass pulse when the response matches the expected response;
to repeat the cause, compare and generate a plurality of times; and
to evaluate a frequency at which pass pulses occur. | 2,800 |
11,378 | 11,378 | 15,152,462 | 2,849 | In some embodiments, provided are AFC circuits and methods for calibrating a second setting of an oscillator while a first setting is controlled by a temperature compensated control. | 1. (canceled) 2. An apparatus comprising:
a phase frequency detector (PFD); a charge pump coupled to the PFD; a low pass filter (LPF) coupled to the charge pump; an oscillator; a first switch operable to couple an input of the oscillator with the LPF during a first operation mode; a circuit to provide an output which is a temperature compensated calibrated voltage; and a second switch operable to couple the input of the oscillator with the output of the circuit during a second operation mode. 3. The apparatus of claim 2, wherein the first operation mode is a normal mode, wherein the second operation mode is a calibration mode, and wherein the second operation mode is to be performed before the first operation mode. 4. The apparatus of claim 2, wherein the circuit comprises:
a temperature sensor; and a digital-to-analog converter coupled to the temperature sensor, wherein the DAC is to provide the output of the circuit. 5. The apparatus of claim 4, wherein the digital to analog converter is generate one or more signals indicating a high limit and a low limit for the temperature calibrated voltage. 6. The apparatus of claim 5 comprises:
a first comparator to compare an operational control voltage with the high limit; and
a second comparator to compare the operational control voltage with the low limit. 7. The apparatus of claim 6, wherein a number of enabled capacitors in the oscillator are reduced if an output of the first comparator indicates that the operational control voltage is higher than the high limit. 8. The apparatus of claim 6, wherein a number of enabled capacitors in the oscillator are increased if an output of the second comparator indicates that the operational control voltage is lower than the low limit. 9. The apparatus of claim 2 comprises a calibration logic to provide a code to the oscillator, wherein the calibration logic is coupled to the oscillator. 10. The apparatus of claim 9 comprises a frequency detector coupled to the calibration logic, wherein the frequency detector is to compare a frequency of the oscillator with a reference clock. 11. The apparatus of claim 2, wherein the oscillator is part of an on-chip transmitter clock generator. 12. The apparatus of claim 2, wherein the oscillator is an Inductor Capacitor Voltage Controlled Oscillator (LCVCO). 13. An apparatus comprising:
a digitally controlled oscillator (LDO); a first control to adjust capacitor settings of the DCO by a coarse amount; a second control to adjust the capacitor settings of the DCO by a fine amount; and an automatic frequency control (AFC) logic which is to provide the first and second controls such that the second control is to have an associated code which is near a middle of a range of the associated code when a temperature is to be at a mid-range value. 14. The apparatus of claim 13, wherein the AFC comprises a calibration logic, coupled to the DCO, to generate the first control to lock a phase locked loop (PLL) prior to adjusting of the capacitor settings of the DCO by a fine amount by the second control, wherein the PLL includes the DCO. 15. The apparatus of claim 14, wherein the AFC comprises:
a multiplexer coupled to the DCO; and a scaling logic coupled to a first input of the multiplexer, wherein the scaling logic is to generate the second control during a calibration mode. 16. The apparatus of claim 15, wherein the multiplexer has a second input to receive an output of a digital low pass filter (DLPF). 17. The apparatus of claim 13, wherein the calibration logic is to receive a reference clock (RefClk) and an output of the DCO. 18. A computer platform, comprising:
a chip having a transmitter to communicate with an off-chip receiver, the transmitter to apply a clock generated from a Phase Locked Loop (PLL) which comprises:
a digitally controlled oscillator (LDO);
a first control to adjust capacitor settings of the DCO by a coarse amount;
a second control to adjust the capacitor settings of the DCO by a fine amount; and
an automatic frequency control (AFC) logic which is to provide the first and second controls such that the second control is to have an associated code which is near a middle of a range of the associated code when a temperature is to be at a mid-range value. 19. The computer platform of claim 18, wherein the transmitter is part of a serial IO port. 20. The computer platform of claim 19, wherein the serial IO port is a PCIe port. 21. The computer platform of claim 18, wherein the AFC comprises a calibration logic, coupled to the DCO, to generate the first control to lock a phase locked loop (PLL) prior to adjusting of the capacitor settings of the DCO by a fine amount by the second control, wherein the PLL includes the DCO. 22. The computer platform of claim 21, wherein the AFC comprises:
a multiplexer coupled to the DCO; and a scaling logic coupled to a first input of the multiplexer, wherein the scaling logic is to generate the second control during a calibration mode. | In some embodiments, provided are AFC circuits and methods for calibrating a second setting of an oscillator while a first setting is controlled by a temperature compensated control.1. (canceled) 2. An apparatus comprising:
a phase frequency detector (PFD); a charge pump coupled to the PFD; a low pass filter (LPF) coupled to the charge pump; an oscillator; a first switch operable to couple an input of the oscillator with the LPF during a first operation mode; a circuit to provide an output which is a temperature compensated calibrated voltage; and a second switch operable to couple the input of the oscillator with the output of the circuit during a second operation mode. 3. The apparatus of claim 2, wherein the first operation mode is a normal mode, wherein the second operation mode is a calibration mode, and wherein the second operation mode is to be performed before the first operation mode. 4. The apparatus of claim 2, wherein the circuit comprises:
a temperature sensor; and a digital-to-analog converter coupled to the temperature sensor, wherein the DAC is to provide the output of the circuit. 5. The apparatus of claim 4, wherein the digital to analog converter is generate one or more signals indicating a high limit and a low limit for the temperature calibrated voltage. 6. The apparatus of claim 5 comprises:
a first comparator to compare an operational control voltage with the high limit; and
a second comparator to compare the operational control voltage with the low limit. 7. The apparatus of claim 6, wherein a number of enabled capacitors in the oscillator are reduced if an output of the first comparator indicates that the operational control voltage is higher than the high limit. 8. The apparatus of claim 6, wherein a number of enabled capacitors in the oscillator are increased if an output of the second comparator indicates that the operational control voltage is lower than the low limit. 9. The apparatus of claim 2 comprises a calibration logic to provide a code to the oscillator, wherein the calibration logic is coupled to the oscillator. 10. The apparatus of claim 9 comprises a frequency detector coupled to the calibration logic, wherein the frequency detector is to compare a frequency of the oscillator with a reference clock. 11. The apparatus of claim 2, wherein the oscillator is part of an on-chip transmitter clock generator. 12. The apparatus of claim 2, wherein the oscillator is an Inductor Capacitor Voltage Controlled Oscillator (LCVCO). 13. An apparatus comprising:
a digitally controlled oscillator (LDO); a first control to adjust capacitor settings of the DCO by a coarse amount; a second control to adjust the capacitor settings of the DCO by a fine amount; and an automatic frequency control (AFC) logic which is to provide the first and second controls such that the second control is to have an associated code which is near a middle of a range of the associated code when a temperature is to be at a mid-range value. 14. The apparatus of claim 13, wherein the AFC comprises a calibration logic, coupled to the DCO, to generate the first control to lock a phase locked loop (PLL) prior to adjusting of the capacitor settings of the DCO by a fine amount by the second control, wherein the PLL includes the DCO. 15. The apparatus of claim 14, wherein the AFC comprises:
a multiplexer coupled to the DCO; and a scaling logic coupled to a first input of the multiplexer, wherein the scaling logic is to generate the second control during a calibration mode. 16. The apparatus of claim 15, wherein the multiplexer has a second input to receive an output of a digital low pass filter (DLPF). 17. The apparatus of claim 13, wherein the calibration logic is to receive a reference clock (RefClk) and an output of the DCO. 18. A computer platform, comprising:
a chip having a transmitter to communicate with an off-chip receiver, the transmitter to apply a clock generated from a Phase Locked Loop (PLL) which comprises:
a digitally controlled oscillator (LDO);
a first control to adjust capacitor settings of the DCO by a coarse amount;
a second control to adjust the capacitor settings of the DCO by a fine amount; and
an automatic frequency control (AFC) logic which is to provide the first and second controls such that the second control is to have an associated code which is near a middle of a range of the associated code when a temperature is to be at a mid-range value. 19. The computer platform of claim 18, wherein the transmitter is part of a serial IO port. 20. The computer platform of claim 19, wherein the serial IO port is a PCIe port. 21. The computer platform of claim 18, wherein the AFC comprises a calibration logic, coupled to the DCO, to generate the first control to lock a phase locked loop (PLL) prior to adjusting of the capacitor settings of the DCO by a fine amount by the second control, wherein the PLL includes the DCO. 22. The computer platform of claim 21, wherein the AFC comprises:
a multiplexer coupled to the DCO; and a scaling logic coupled to a first input of the multiplexer, wherein the scaling logic is to generate the second control during a calibration mode. | 2,800 |
11,379 | 11,379 | 13,803,795 | 2,865 | The invention concerns a method, device and computer program product for monitoring or planning a dive of a diver. The method includes providing data on the composition of gases breathed by the diver during the dive, providing data on the depth or ambient pressure of the diver, and using a model to provide a safe ascent profile for the diver based on the data on the composition of gases and on the depth or ambient pressure. According to the invention, the method further comprising detecting, based on the data on the composition of gases, a gas composition change which may lead to a deep tissue isobaric counter diffusion situation, and the model comprising means for immediately temporally retarding the ascent profile if such gas composition change is detected. The invention can be used to mitigate the harmful effects of dangerous breathing gas changes during diving. | 1. A method of monitoring or planning a dive of a diver, comprising:
providing data on the composition of gases breathed by the diver during the dive; providing data on the depth or ambient pressure of the diver; using a model to provide a safe ascent profile for the diver based on the data on the composition of gases and on the depth or ambient pressure; the method further comprising detecting, based on the data on the composition of gases, a gas composition change which may lead to a deep tissue isobaric counter diffusion situation, and the model configured to immediately temporally retard the ascent profile if such gas composition change is detected. 2. The method according to claim 1, wherein the temporally retarded ascent profile comprises a first period of no ascending. 3. The method according to claim 2, wherein the first period has a duration of at least one minute. 4. The method according to claim 2, wherein the first period has a duration within the range of 1 to 5 minutes. 5. The method according to claim 1, wherein the temporally retarded ascent profile comprises a second period of slowed down ascent, and wherein the second period is compared with the ascending speed given by the model without the detection of the gas composition change. 6. The method according to claim 1, wherein the detection of the gas composition change which may lead to a deep tissue isobaric counter diffusion situation is carried out by detecting an abrupt rise in nitrogen partial pressure when the breathing gas initially contains helium. 7. The method according to claim 1, wherein the model includes determining different gas diffusion parameters for a plurality of different tissue groups, and taking into account gas breathing and depth or ambient pressure history and gas diffusion parameters to estimate the current concentration of gases in the different tissues. 8. The method according to claim 1, wherein the temporal retarding of the ascent profile depends on the depth or ambient pressure at the time of the gas composition change. 9. The method according to claim 8, wherein the ascent profile is retarded more at high depths or ambient pressures than at lower depths or ambient pressures. 10. The method according to claim 1, wherein the temporal retarding of the ascent profile is carried out such that gas pressures in the tissues are not decreased during a certain period after the gas composition change. 11. The method according to claim 1, wherein the method is carried out during diving in a diving computer for monitoring the dive. 12. The method according to claim 1, wherein the method is carried out in a desktop, laptop or handheld computer for planning the dive. 13. A diving computer for monitoring a dive of a diver, comprising a pressure sensing unit;
a gas composition observation unit; a processor operably coupled to the pressure sensing unit and to the gas composition observation unit, the processor configured to provide data on the composition of gases breathed by the diver during the dive, the processor configured to provide data on the depth or ambient pressure of the diver; an algorithm including a programmed model adapted to provide a safe ascent profile for the diver based on the data on the composition of gases and the depth or ambient pressure; and a display configured to provide information on the safe ascent profile to the diver, wherein the processor is adapted to detect, based on the data on the composition of gases, a gas composition change which may lead to a deep tissue isobaric counter diffusion situation. 14. The diving computer according to claim 13, wherein the processor is configured to immediately form a temporally retarded ascent profile, if a gas composition change is detected. 15. The diving computer according to claim 13, wherein the temporally retarded ascent profile comprises a first period of no ascending, and wherein the first period has a duration of at least one minute. 16. The diving computer according to claim 13, wherein the temporally retarded ascent profile comprises a first period of no ascending, and wherein the first period is within the range of 1 to 5 minutes. 17. The diving computer according to claim 13, wherein the temporally retarded ascent profile comprises a second period of slowed down ascending compared with the ascending speed given by the model without the detection of the gas composition change. 18. The diving computer according to any of claim 13, being adapted to retard the ascent profile depending on the depth or ambient pressure at the time of detection of the gas composition change. 19. The diving computer according to any of claim 13, wherein the detection of the gas composition change which may lead to a deep tissue isobaric counter diffusion situation is carried out by detecting an abrupt rise in nitrogen partial pressure when the breathing gas initially contains helium. 20. A computer program product for planning or monitoring a dive of a diver, comprising;
software means for storing data on the composition of gases breathed by the diver at each moment during the dive; software means for providing data on the depth or ambient pressure of the diver at each moment of time during the dive; software model adapted to provide a safe temporal ascent profile for the diver based on the data on the composition of gases breathed and the depth or ambient pressure; and software means for storing and/or displaying the safe ascent profile to the diver; wherein the software model includes,
a detection algorithm adapted to detect, based on the data on the composition of gases, a gas composition change which may lead to a deep tissue isobaric counter diffusion situation, and
a correction algorithm adapted to immediately form a temporally retarded ascent profile if such gas composition change is detected. | The invention concerns a method, device and computer program product for monitoring or planning a dive of a diver. The method includes providing data on the composition of gases breathed by the diver during the dive, providing data on the depth or ambient pressure of the diver, and using a model to provide a safe ascent profile for the diver based on the data on the composition of gases and on the depth or ambient pressure. According to the invention, the method further comprising detecting, based on the data on the composition of gases, a gas composition change which may lead to a deep tissue isobaric counter diffusion situation, and the model comprising means for immediately temporally retarding the ascent profile if such gas composition change is detected. The invention can be used to mitigate the harmful effects of dangerous breathing gas changes during diving.1. A method of monitoring or planning a dive of a diver, comprising:
providing data on the composition of gases breathed by the diver during the dive; providing data on the depth or ambient pressure of the diver; using a model to provide a safe ascent profile for the diver based on the data on the composition of gases and on the depth or ambient pressure; the method further comprising detecting, based on the data on the composition of gases, a gas composition change which may lead to a deep tissue isobaric counter diffusion situation, and the model configured to immediately temporally retard the ascent profile if such gas composition change is detected. 2. The method according to claim 1, wherein the temporally retarded ascent profile comprises a first period of no ascending. 3. The method according to claim 2, wherein the first period has a duration of at least one minute. 4. The method according to claim 2, wherein the first period has a duration within the range of 1 to 5 minutes. 5. The method according to claim 1, wherein the temporally retarded ascent profile comprises a second period of slowed down ascent, and wherein the second period is compared with the ascending speed given by the model without the detection of the gas composition change. 6. The method according to claim 1, wherein the detection of the gas composition change which may lead to a deep tissue isobaric counter diffusion situation is carried out by detecting an abrupt rise in nitrogen partial pressure when the breathing gas initially contains helium. 7. The method according to claim 1, wherein the model includes determining different gas diffusion parameters for a plurality of different tissue groups, and taking into account gas breathing and depth or ambient pressure history and gas diffusion parameters to estimate the current concentration of gases in the different tissues. 8. The method according to claim 1, wherein the temporal retarding of the ascent profile depends on the depth or ambient pressure at the time of the gas composition change. 9. The method according to claim 8, wherein the ascent profile is retarded more at high depths or ambient pressures than at lower depths or ambient pressures. 10. The method according to claim 1, wherein the temporal retarding of the ascent profile is carried out such that gas pressures in the tissues are not decreased during a certain period after the gas composition change. 11. The method according to claim 1, wherein the method is carried out during diving in a diving computer for monitoring the dive. 12. The method according to claim 1, wherein the method is carried out in a desktop, laptop or handheld computer for planning the dive. 13. A diving computer for monitoring a dive of a diver, comprising a pressure sensing unit;
a gas composition observation unit; a processor operably coupled to the pressure sensing unit and to the gas composition observation unit, the processor configured to provide data on the composition of gases breathed by the diver during the dive, the processor configured to provide data on the depth or ambient pressure of the diver; an algorithm including a programmed model adapted to provide a safe ascent profile for the diver based on the data on the composition of gases and the depth or ambient pressure; and a display configured to provide information on the safe ascent profile to the diver, wherein the processor is adapted to detect, based on the data on the composition of gases, a gas composition change which may lead to a deep tissue isobaric counter diffusion situation. 14. The diving computer according to claim 13, wherein the processor is configured to immediately form a temporally retarded ascent profile, if a gas composition change is detected. 15. The diving computer according to claim 13, wherein the temporally retarded ascent profile comprises a first period of no ascending, and wherein the first period has a duration of at least one minute. 16. The diving computer according to claim 13, wherein the temporally retarded ascent profile comprises a first period of no ascending, and wherein the first period is within the range of 1 to 5 minutes. 17. The diving computer according to claim 13, wherein the temporally retarded ascent profile comprises a second period of slowed down ascending compared with the ascending speed given by the model without the detection of the gas composition change. 18. The diving computer according to any of claim 13, being adapted to retard the ascent profile depending on the depth or ambient pressure at the time of detection of the gas composition change. 19. The diving computer according to any of claim 13, wherein the detection of the gas composition change which may lead to a deep tissue isobaric counter diffusion situation is carried out by detecting an abrupt rise in nitrogen partial pressure when the breathing gas initially contains helium. 20. A computer program product for planning or monitoring a dive of a diver, comprising;
software means for storing data on the composition of gases breathed by the diver at each moment during the dive; software means for providing data on the depth or ambient pressure of the diver at each moment of time during the dive; software model adapted to provide a safe temporal ascent profile for the diver based on the data on the composition of gases breathed and the depth or ambient pressure; and software means for storing and/or displaying the safe ascent profile to the diver; wherein the software model includes,
a detection algorithm adapted to detect, based on the data on the composition of gases, a gas composition change which may lead to a deep tissue isobaric counter diffusion situation, and
a correction algorithm adapted to immediately form a temporally retarded ascent profile if such gas composition change is detected. | 2,800 |
11,380 | 11,380 | 14,726,009 | 2,813 | A DC-DC converter includes a substrate having opposing first and second sides, a first discrete power stage transistor die attached to the first side of the substrate and including a high-side power transistor, and a second discrete power stage transistor die attached to the first side of the substrate and including a low-side power transistor electrically connected to the high-side power transistor to form an output phase of the DC-DC converter. The DC-DC converter further includes an inductor attached to the first side of the substrate so as to electrically connect the output phase to a metal output trace on the substrate. The inductor at least partly covers at least one of the first and the second discrete power stage transistor dies. | 1. A DC-DC converter, comprising:
a substrate having opposing first and second sides; a first discrete power stage transistor die attached to the first side of the substrate and comprising a high-side power transistor; a second discrete power stage transistor die attached to the first side of the substrate and comprising a low-side power transistor electrically connected to the high-side power transistor to form an output phase of the DC-DC converter; and an inductor attached to the first side of the substrate so as to electrically connect the output phase to a metal output trace on the substrate, the inductor at least partly covering at least one of the first and the second discrete power stage transistor dies. 2. The DC-DC converter of claim 1, wherein the inductor at least partly covers the first and the second discrete power stage transistor dies. 3. The DC-DC converter of claim 1, wherein the inductor completely covers at least one of the first and the second discrete power stage transistor dies. 4. The DC-DC converter of claim 3, wherein the inductor completely covers the first and the second discrete power stage transistor dies. 5. The DC-DC converter of claim 1, wherein one of the first and the second discrete power stage transistor dies is completely uncovered by the inductor and the other one of the first and the second discrete power stage transistor dies is completely covered by the inductor. 6. The DC-DC converter of claim 1, wherein one of the first and the second discrete power stage transistor dies is partly covered by the inductor and the other one of the first and the second discrete power stage transistor dies is at least partly covered by the inductor. 7. The DC-DC converter of claim 6, wherein a plurality of pins of each discrete power stage transistor die partly covered by the inductor are uncovered by the inductor. 8. The DC-DC converter of claim 1, wherein the inductor is a single inductor comprising a single winding wound on a core, and wherein the single winding electrically connects the output phase to the metal output trace. 9. The DC-DC converter of claim 1, wherein the inductor is a coupled inductor comprising separate windings wound on the same core, and wherein each of the separate windings electrically connects one output phase to the metal output trace. 10. The DC-DC converter of claim 1, wherein the inductor comprises a first terminal electrically connected to the output phase, a second terminal attached to the metal output trace and a winding connected between the first and the second terminals and which forms part of a main body of the inductor, wherein the main body is spaced apart from the substrate by a gap, and wherein at least one the first and the second discrete power stage transistor dies is disposed in the gap. 11. The DC-DC converter of claim 10, wherein both the first and the second discrete power stage transistor dies are disposed in the gap. 12. The DC-DC converter of claim 10, wherein the first and the second terminals of the inductor are individually longer than a combined length of the first and the second discrete power stage transistor dies. 13. The DC-DC converter of claim 10, wherein at least one the first and the second discrete power stage transistor dies is disposed between the first and the second terminals of the inductor. 14. The DC-DC converter of claim 10, wherein the first and the second discrete power stage transistor dies are disposed in the gap and adjacent to the first terminal of the inductor. 15. The DC-DC converter of claim 10, wherein the first discrete power stage transistor die is connected between a metal input voltage trace on the substrate and a metal output phase trace on the substrate, the metal output phase trace being electrically connected to the output phase, wherein the second discrete power stage transistor die is connected between a metal ground trace on the substrate and the metal output phase trace, wherein the first terminal of the inductor is attached to the metal output phase trace, and wherein the metal output phase trace extends under the inductor. 16. The DC-DC converter of claim 15, wherein the metal ground trace extends under the inductor, and wherein the second discrete power stage transistor die is attached to both the metal ground trace and the metal output phase trace in a first region of the substrate disposed under the inductor. 17. The DC-DC converter of claim 16, wherein the metal input voltage trace extends under the inductor, and wherein the first discrete power stage transistor die is attached to both the metal input voltage trace and the metal output phase trace in a second region of the substrate disposed under the inductor. 18. The DC-DC converter of claim 17, wherein the metal ground trace, the metal input voltage trace and the metal output phase trace are each completely covered by the inductor. 19. The DC-DC converter of claim 10, wherein the main body of the inductor comprises a plastic riser which provides clearance under the inductor for accommodating at least one of the first and the second discrete power stage transistor dies. 20. The DC-DC converter of claim 1, wherein the inductor comprises separate uncoupled windings wound on the same core, and wherein each of the separate uncoupled windings electrically connects one output phase to the metal output trace. 21. The DC-DC converter of claim 1, wherein the first and the second discrete power stage transistor dies are bare, unpackaged dies each having a thickness of 0.6 mm or less. 22. The DC-DC converter of claim 1, wherein the first and the second discrete power stage transistor dies are packaged dies each having a thickness of 1.1 mm or less. 23. The DC-DC converter of claim 1, wherein a plurality of pins of each discrete power stage transistor die at least partly covered by the inductor are uncovered by the inductor. 24. The DC-DC converter of claim 1, wherein the DC-DC converter is a multi-phase converter comprising a plurality of output phases, and wherein at least one discrete power stage transistor die of each output phase is at least partly covered by an inductor electrically connected to that output phase. 25. The DC-DC converter of claim 24, wherein the plurality of output phases have an identical layout on the substrate. 26. A method of assembling a DC-DC converter, the method comprising:
attaching a first discrete power stage transistor die to a first side of a substrate, the first discrete power stage transistor die comprising a high-side power transistor; attaching a second discrete power stage transistor die to the first side of the substrate, the second discrete power stage transistor die comprising a low-side power transistor electrically connected to the high-side power transistor to form an output phase of the DC-DC converter; attaching an inductor to the first side of the substrate so as to electrically connect the output phase to a metal output trace on the substrate, the inductor partly covering at least one of the first and the second discrete power stage transistor dies so that a plurality of pins of each discrete power stage transistor die partly covered by the inductor are uncovered by the inductor; and visually inspecting the plurality of pins uncovered by the inductor. | A DC-DC converter includes a substrate having opposing first and second sides, a first discrete power stage transistor die attached to the first side of the substrate and including a high-side power transistor, and a second discrete power stage transistor die attached to the first side of the substrate and including a low-side power transistor electrically connected to the high-side power transistor to form an output phase of the DC-DC converter. The DC-DC converter further includes an inductor attached to the first side of the substrate so as to electrically connect the output phase to a metal output trace on the substrate. The inductor at least partly covers at least one of the first and the second discrete power stage transistor dies.1. A DC-DC converter, comprising:
a substrate having opposing first and second sides; a first discrete power stage transistor die attached to the first side of the substrate and comprising a high-side power transistor; a second discrete power stage transistor die attached to the first side of the substrate and comprising a low-side power transistor electrically connected to the high-side power transistor to form an output phase of the DC-DC converter; and an inductor attached to the first side of the substrate so as to electrically connect the output phase to a metal output trace on the substrate, the inductor at least partly covering at least one of the first and the second discrete power stage transistor dies. 2. The DC-DC converter of claim 1, wherein the inductor at least partly covers the first and the second discrete power stage transistor dies. 3. The DC-DC converter of claim 1, wherein the inductor completely covers at least one of the first and the second discrete power stage transistor dies. 4. The DC-DC converter of claim 3, wherein the inductor completely covers the first and the second discrete power stage transistor dies. 5. The DC-DC converter of claim 1, wherein one of the first and the second discrete power stage transistor dies is completely uncovered by the inductor and the other one of the first and the second discrete power stage transistor dies is completely covered by the inductor. 6. The DC-DC converter of claim 1, wherein one of the first and the second discrete power stage transistor dies is partly covered by the inductor and the other one of the first and the second discrete power stage transistor dies is at least partly covered by the inductor. 7. The DC-DC converter of claim 6, wherein a plurality of pins of each discrete power stage transistor die partly covered by the inductor are uncovered by the inductor. 8. The DC-DC converter of claim 1, wherein the inductor is a single inductor comprising a single winding wound on a core, and wherein the single winding electrically connects the output phase to the metal output trace. 9. The DC-DC converter of claim 1, wherein the inductor is a coupled inductor comprising separate windings wound on the same core, and wherein each of the separate windings electrically connects one output phase to the metal output trace. 10. The DC-DC converter of claim 1, wherein the inductor comprises a first terminal electrically connected to the output phase, a second terminal attached to the metal output trace and a winding connected between the first and the second terminals and which forms part of a main body of the inductor, wherein the main body is spaced apart from the substrate by a gap, and wherein at least one the first and the second discrete power stage transistor dies is disposed in the gap. 11. The DC-DC converter of claim 10, wherein both the first and the second discrete power stage transistor dies are disposed in the gap. 12. The DC-DC converter of claim 10, wherein the first and the second terminals of the inductor are individually longer than a combined length of the first and the second discrete power stage transistor dies. 13. The DC-DC converter of claim 10, wherein at least one the first and the second discrete power stage transistor dies is disposed between the first and the second terminals of the inductor. 14. The DC-DC converter of claim 10, wherein the first and the second discrete power stage transistor dies are disposed in the gap and adjacent to the first terminal of the inductor. 15. The DC-DC converter of claim 10, wherein the first discrete power stage transistor die is connected between a metal input voltage trace on the substrate and a metal output phase trace on the substrate, the metal output phase trace being electrically connected to the output phase, wherein the second discrete power stage transistor die is connected between a metal ground trace on the substrate and the metal output phase trace, wherein the first terminal of the inductor is attached to the metal output phase trace, and wherein the metal output phase trace extends under the inductor. 16. The DC-DC converter of claim 15, wherein the metal ground trace extends under the inductor, and wherein the second discrete power stage transistor die is attached to both the metal ground trace and the metal output phase trace in a first region of the substrate disposed under the inductor. 17. The DC-DC converter of claim 16, wherein the metal input voltage trace extends under the inductor, and wherein the first discrete power stage transistor die is attached to both the metal input voltage trace and the metal output phase trace in a second region of the substrate disposed under the inductor. 18. The DC-DC converter of claim 17, wherein the metal ground trace, the metal input voltage trace and the metal output phase trace are each completely covered by the inductor. 19. The DC-DC converter of claim 10, wherein the main body of the inductor comprises a plastic riser which provides clearance under the inductor for accommodating at least one of the first and the second discrete power stage transistor dies. 20. The DC-DC converter of claim 1, wherein the inductor comprises separate uncoupled windings wound on the same core, and wherein each of the separate uncoupled windings electrically connects one output phase to the metal output trace. 21. The DC-DC converter of claim 1, wherein the first and the second discrete power stage transistor dies are bare, unpackaged dies each having a thickness of 0.6 mm or less. 22. The DC-DC converter of claim 1, wherein the first and the second discrete power stage transistor dies are packaged dies each having a thickness of 1.1 mm or less. 23. The DC-DC converter of claim 1, wherein a plurality of pins of each discrete power stage transistor die at least partly covered by the inductor are uncovered by the inductor. 24. The DC-DC converter of claim 1, wherein the DC-DC converter is a multi-phase converter comprising a plurality of output phases, and wherein at least one discrete power stage transistor die of each output phase is at least partly covered by an inductor electrically connected to that output phase. 25. The DC-DC converter of claim 24, wherein the plurality of output phases have an identical layout on the substrate. 26. A method of assembling a DC-DC converter, the method comprising:
attaching a first discrete power stage transistor die to a first side of a substrate, the first discrete power stage transistor die comprising a high-side power transistor; attaching a second discrete power stage transistor die to the first side of the substrate, the second discrete power stage transistor die comprising a low-side power transistor electrically connected to the high-side power transistor to form an output phase of the DC-DC converter; attaching an inductor to the first side of the substrate so as to electrically connect the output phase to a metal output trace on the substrate, the inductor partly covering at least one of the first and the second discrete power stage transistor dies so that a plurality of pins of each discrete power stage transistor die partly covered by the inductor are uncovered by the inductor; and visually inspecting the plurality of pins uncovered by the inductor. | 2,800 |
11,381 | 11,381 | 14,028,364 | 2,822 | A VTMOS transistor in semiconductor material of a first type of conductivity includes a body region of a second type of conductivity and a source region of the first type of conductivity. A gate region extends into the main surface through the body region and is insulated from the semiconductor material. A region of the gate region extends onto the main surface is insulated from the rest of the gate region. An anode region of the first type of conductivity is formed into said insulated region, and a cathode region of the second type of conductivity is formed into said insulated region in contact with the anode region; the anode region and the cathode region define a thermal diode electrically insulated from the chip. | 1. A method, comprising:
forming an electronic device having a vertical trench MOS transistor in a semiconductor material of a first type of conductivity, the forming of the electronic device includes:
forming a body region of a second type of conductivity extending into the semiconductor material from a main surface of the semiconductor material;
forming a source region of the first type of conductivity extending into the body region from the main surface;
forming a gate region of conductive material extending into the semiconductor material from the main surface through the body region, the gate region being insulated from the semiconductor material, the forming of the gate region including:
forming a gate structure extending into the semiconductor material from the main surface through the body region and onto the main surface;
insulating a region of the gate structure extending on the main surface from a remainder of the gate structure; and
forming the gate region from the remainder of the gate structure;
forming an anode region of the first type of conductivity into said insulated region; and
forming a cathode region of the second type of conductivity into said insulated region in contact with the anode region, the anode region and the cathode region defining a thermal diode electrically insulated from the semiconductor material. 2. The method according to claim 1 wherein forming the gate structure comprises:
forming a trench extending into the semiconductor material from the main surface through the body region;
forming an insulating layer onto the main surface and onto a boundary surface of the trench;
forming a first conductive layer onto the insulating layer;
forming a second conductive layer onto the first conductive layer to fill the trench; and
removing the second conductive layer outside the trench to expose the first conductive layer on the main surface. 3. The method according to claim 2 wherein the first conductive layer includes un-doped polysilicon, and the second conductive layer includes doped polysilicon. 4. The method according to claim 2 wherein the removing the second conductive layer outside the trench includes:
performing a chemical-mechanical polishing. 5. The method according to claim 2 wherein the insulating a region of the gate structure includes:
removing a portion of the first conductive layer. 6. The method according to claim 2 wherein the forming an anode region includes:
performing a first ion implantation of dopants of the first type of conductivity into a first part of the first conductive layer defining said insulated region;
and wherein the forming a cathode region includes:
performing a second ion implantation of dopants of the second type of conductivity into a second part of the first conductive layer defining said insulated region. 7. The method according to claim 6 wherein the forming a gate region includes:
performing said first ion implantation of dopants of the first type of conductivity further into at least part of the remainder of the gate structure;
and wherein the forming a body region includes:
performing said second ion implantation of dopants of the second type of conductivity further into the semiconductor material. 8. An electronic device, comprising:
a semiconductor substrate of a first type of conductivity; a vertical trench MOS transistor integrated in the semiconductor substrate; a body region of a second type of conductivity extending in the semiconductor substrate from a main surface of the semiconductor substrate; a source region of the first type of conductivity extending in the body region from the main surface; a gate region of conductive material extending in the semiconductor substrate from the main surface through the body region, the gate region being insulated from the semiconductor substrate; a region insulated from the gate region and from the semiconductor substrate on the main surface; a thermal diode electrically insulated from the semiconductor substrate, the thermal diode including:
an anode region of the first type of conductivity in said insulated region;
and
a cathode region of the second type of conductivity in said insulated region in contact with the anode region, the anode region and the cathode region. 9. The device of claim 8 wherein the gate structure includes:
a trench extending into the semiconductor substrate from the main surface through the body region;
an insulating layer onto the main surface and onto a boundary surface of the trench;
a first conductive layer onto the insulating layer; and
a second conductive layer onto the first conductive layer to fill the trench. 10. A system, comprising:
an electronic device that includes:
a semiconductor substrate of a first type of conductivity;
a vertical trench MOS transistor integrated on the semiconductor substrate;
a body region of a second type of conductivity extending in the semiconductor substrate from a main surface of the semiconductor substrate;
a source region of the first type of conductivity extending in the body region from the main surface;
a gate region of conductive material extending in the semiconductor substrate from the main surface through the body region, the gate region being insulated from the semiconductor substrate;
a region insulated from the gate region and from the semiconductor substrate on the main surface;
a thermal diode electrically insulated from the semiconductor substrate, the thermal diode including:
an anode region of the first type of conductivity in said insulated region; and
a cathode region of the second type of conductivity in said insulated region in contact with the anode region, the anode region and the cathode region; and
a first module configured to bias the thermal diode; a second module configured to measure an electrical quantity of the thermal diode; and a third module configured to determine an operating temperature of each vertical trench MOS transistor in response to the measured electrical quantity. 11. The system of claim 10 wherein the gate structure includes:
a trench extending into the semiconductor substrate from the main surface through the body region;
an insulating layer onto the main surface and onto a boundary surface of the trench;
a first conductive layer onto the insulating layer; and
a second conductive layer onto the first conductive layer to fill the trench. 12. A device, comprising:
a substrate having a first surface and a second surface; a transistor formed in the substrate, the transistor including:
a first terminal formed on the second surface of the substrate;
a second terminal formed on the first surface of the substrate;
a gate formed on and in the substrate;
an insulating layer configured to separate the gate from the substrate;
a thermal diode formed on the substrate and being thermally isolated from the substrate by the insulating layer, the thermal diode including:
an anode spaced from the gate by a distance; and
a cathode separated from the gate by the anode. 13. The device of claim 12 wherein the substrate includes a layer of a first conductivity type adjacent to the first terminal and a body region of a second conductivity type. 14. The device of claim 12, further comprising a trench, the gate being formed in the trench. 15. The device of claim 14 wherein the insulating layer is on the second surface of the substrate and on an interior surface of the trench. 16. The device of claim 15 wherein the gate includes a first portion in the trench and second portions that are above the first surface of the substrate and extend further than the interior surface of the trench. | A VTMOS transistor in semiconductor material of a first type of conductivity includes a body region of a second type of conductivity and a source region of the first type of conductivity. A gate region extends into the main surface through the body region and is insulated from the semiconductor material. A region of the gate region extends onto the main surface is insulated from the rest of the gate region. An anode region of the first type of conductivity is formed into said insulated region, and a cathode region of the second type of conductivity is formed into said insulated region in contact with the anode region; the anode region and the cathode region define a thermal diode electrically insulated from the chip.1. A method, comprising:
forming an electronic device having a vertical trench MOS transistor in a semiconductor material of a first type of conductivity, the forming of the electronic device includes:
forming a body region of a second type of conductivity extending into the semiconductor material from a main surface of the semiconductor material;
forming a source region of the first type of conductivity extending into the body region from the main surface;
forming a gate region of conductive material extending into the semiconductor material from the main surface through the body region, the gate region being insulated from the semiconductor material, the forming of the gate region including:
forming a gate structure extending into the semiconductor material from the main surface through the body region and onto the main surface;
insulating a region of the gate structure extending on the main surface from a remainder of the gate structure; and
forming the gate region from the remainder of the gate structure;
forming an anode region of the first type of conductivity into said insulated region; and
forming a cathode region of the second type of conductivity into said insulated region in contact with the anode region, the anode region and the cathode region defining a thermal diode electrically insulated from the semiconductor material. 2. The method according to claim 1 wherein forming the gate structure comprises:
forming a trench extending into the semiconductor material from the main surface through the body region;
forming an insulating layer onto the main surface and onto a boundary surface of the trench;
forming a first conductive layer onto the insulating layer;
forming a second conductive layer onto the first conductive layer to fill the trench; and
removing the second conductive layer outside the trench to expose the first conductive layer on the main surface. 3. The method according to claim 2 wherein the first conductive layer includes un-doped polysilicon, and the second conductive layer includes doped polysilicon. 4. The method according to claim 2 wherein the removing the second conductive layer outside the trench includes:
performing a chemical-mechanical polishing. 5. The method according to claim 2 wherein the insulating a region of the gate structure includes:
removing a portion of the first conductive layer. 6. The method according to claim 2 wherein the forming an anode region includes:
performing a first ion implantation of dopants of the first type of conductivity into a first part of the first conductive layer defining said insulated region;
and wherein the forming a cathode region includes:
performing a second ion implantation of dopants of the second type of conductivity into a second part of the first conductive layer defining said insulated region. 7. The method according to claim 6 wherein the forming a gate region includes:
performing said first ion implantation of dopants of the first type of conductivity further into at least part of the remainder of the gate structure;
and wherein the forming a body region includes:
performing said second ion implantation of dopants of the second type of conductivity further into the semiconductor material. 8. An electronic device, comprising:
a semiconductor substrate of a first type of conductivity; a vertical trench MOS transistor integrated in the semiconductor substrate; a body region of a second type of conductivity extending in the semiconductor substrate from a main surface of the semiconductor substrate; a source region of the first type of conductivity extending in the body region from the main surface; a gate region of conductive material extending in the semiconductor substrate from the main surface through the body region, the gate region being insulated from the semiconductor substrate; a region insulated from the gate region and from the semiconductor substrate on the main surface; a thermal diode electrically insulated from the semiconductor substrate, the thermal diode including:
an anode region of the first type of conductivity in said insulated region;
and
a cathode region of the second type of conductivity in said insulated region in contact with the anode region, the anode region and the cathode region. 9. The device of claim 8 wherein the gate structure includes:
a trench extending into the semiconductor substrate from the main surface through the body region;
an insulating layer onto the main surface and onto a boundary surface of the trench;
a first conductive layer onto the insulating layer; and
a second conductive layer onto the first conductive layer to fill the trench. 10. A system, comprising:
an electronic device that includes:
a semiconductor substrate of a first type of conductivity;
a vertical trench MOS transistor integrated on the semiconductor substrate;
a body region of a second type of conductivity extending in the semiconductor substrate from a main surface of the semiconductor substrate;
a source region of the first type of conductivity extending in the body region from the main surface;
a gate region of conductive material extending in the semiconductor substrate from the main surface through the body region, the gate region being insulated from the semiconductor substrate;
a region insulated from the gate region and from the semiconductor substrate on the main surface;
a thermal diode electrically insulated from the semiconductor substrate, the thermal diode including:
an anode region of the first type of conductivity in said insulated region; and
a cathode region of the second type of conductivity in said insulated region in contact with the anode region, the anode region and the cathode region; and
a first module configured to bias the thermal diode; a second module configured to measure an electrical quantity of the thermal diode; and a third module configured to determine an operating temperature of each vertical trench MOS transistor in response to the measured electrical quantity. 11. The system of claim 10 wherein the gate structure includes:
a trench extending into the semiconductor substrate from the main surface through the body region;
an insulating layer onto the main surface and onto a boundary surface of the trench;
a first conductive layer onto the insulating layer; and
a second conductive layer onto the first conductive layer to fill the trench. 12. A device, comprising:
a substrate having a first surface and a second surface; a transistor formed in the substrate, the transistor including:
a first terminal formed on the second surface of the substrate;
a second terminal formed on the first surface of the substrate;
a gate formed on and in the substrate;
an insulating layer configured to separate the gate from the substrate;
a thermal diode formed on the substrate and being thermally isolated from the substrate by the insulating layer, the thermal diode including:
an anode spaced from the gate by a distance; and
a cathode separated from the gate by the anode. 13. The device of claim 12 wherein the substrate includes a layer of a first conductivity type adjacent to the first terminal and a body region of a second conductivity type. 14. The device of claim 12, further comprising a trench, the gate being formed in the trench. 15. The device of claim 14 wherein the insulating layer is on the second surface of the substrate and on an interior surface of the trench. 16. The device of claim 15 wherein the gate includes a first portion in the trench and second portions that are above the first surface of the substrate and extend further than the interior surface of the trench. | 2,800 |
11,382 | 11,382 | 14,621,123 | 2,876 | A method includes maintaining a digital wallet in a computer, and receiving a request for a transaction. The computer may receive and verify user authentication data, and then allow the user to access any payment card account in the digital wallet without requiring additional user authentication, regardless of the account selected for the transaction by the user. In some embodiments, cryptogram generation may be performed with an EMV server in association with the digital wallet, to enhance the level of security assurance for merchants, issuers and users. | 1. A method comprising:
maintaining a digital wallet in a computer, the digital wallet storing a plurality of payment account entries associated with a user of the digital wallet, each of said payment account entries corresponding to a respective payment account that belongs to said user; receiving a request for a transaction; receiving and verifying, by the computer, user authentication data regarding the user and the requested transaction; and in response to verifying the user authentication data, allowing the user to access any one of said payment accounts without requiring further user authentication. 2. The method of claim 1, further comprising:
verifying, by the computer, authentication of a device used by the user to initiate the transaction. 3. The method of claim 2, further comprising:
setting a user authentication status flag to a “valid” state in the computer to indicate that the computer has verified the received user authentication data; wherein the computer does not receive a user authentication status flag value from said device used by the user. 4. The method of claim 2, wherein the device used by the user is a personal computer, a laptop computer, a tablet computer or a smartphone. 5. The method of claim 1, wherein the user is not required to perform more than one authentication task for the transaction. 6. The method of claim 1, wherein the user authentication data includes or is derived from a PIN (personal identification number) entered by the user. 7. The method of claim 1, wherein the user authentication data includes or is derived from biometric data generated by interaction with the user. 8. The method of claim 1, wherein the computer is operated by or on behalf of a wallet service provider. 9. A method comprising:
maintaining a digital wallet in a computer, the computer operated by or on behalf of a wallet service provider; receiving a request for a transaction using a payment account represented in the digital wallet; receiving and verifying, by the computer, authentication data for the requested transaction; in response to verifying the authentication data by the computer, triggering by the computer generation of a cryptogram for the transaction. 10. The method of claim 9, wherein the cryptogram is generated in the computer. 11. The method of claim 9, wherein the computer is a wallet services computer, and the cryptogram is generated in a server computer that is in communication with the wallet services computer. 12. The method of claim 9, wherein the cryptogram is generated in accordance with an EMV standard. 13. The method of claim 9, wherein the transaction is an e-commerce transaction. 14. The method of claim 13, wherein:
the verified authentication data includes user authentication data; and the user is not required to perform more than one authentication task for the transaction. 15. An apparatus comprising:
a processor; and a memory in communication with said processor and storing program instructions, said processor operative with the program instructions to perform functions as follows:
maintaining a digital wallet, the digital wallet storing a plurality of payment account entries associated with a user of the digital wallet, each of said payment account entries corresponding to a respective payment account that belongs to said user, the digital wallet stored in one of a plurality of partitions maintained in a server computer;
receiving a request for a transaction;
receiving and verifying user authentication data regarding the user and the requested transaction; and
in response to verifying the user authentication data, allowing the user to access any one of said payment accounts without requiring further user authentication. 16. The apparatus of claim 15, wherein the processor is further operative with the program instructions to:
verify authentication of a device used by the user to initiate the transaction. 17. The apparatus of claim 16, wherein the processor is further operative with the program instructions to:
set a consumer authentication status flag to a “valid” state to indicate that the processor has verified the received user authentication data; wherein the processor does not receive a consumer authentication status flag value from said device used by the user. 18. The apparatus of claim 16, wherein the device used by the user is a personal computer, a laptop computer, a tablet computer or a smartphone. 19. The apparatus of claim 15, wherein the user is not required to perform more than one authentication task for the transaction. 20. The apparatus of claim 15, wherein the user authentication data includes or is derived from a PIN (personal identification number) entered by the user. | A method includes maintaining a digital wallet in a computer, and receiving a request for a transaction. The computer may receive and verify user authentication data, and then allow the user to access any payment card account in the digital wallet without requiring additional user authentication, regardless of the account selected for the transaction by the user. In some embodiments, cryptogram generation may be performed with an EMV server in association with the digital wallet, to enhance the level of security assurance for merchants, issuers and users.1. A method comprising:
maintaining a digital wallet in a computer, the digital wallet storing a plurality of payment account entries associated with a user of the digital wallet, each of said payment account entries corresponding to a respective payment account that belongs to said user; receiving a request for a transaction; receiving and verifying, by the computer, user authentication data regarding the user and the requested transaction; and in response to verifying the user authentication data, allowing the user to access any one of said payment accounts without requiring further user authentication. 2. The method of claim 1, further comprising:
verifying, by the computer, authentication of a device used by the user to initiate the transaction. 3. The method of claim 2, further comprising:
setting a user authentication status flag to a “valid” state in the computer to indicate that the computer has verified the received user authentication data; wherein the computer does not receive a user authentication status flag value from said device used by the user. 4. The method of claim 2, wherein the device used by the user is a personal computer, a laptop computer, a tablet computer or a smartphone. 5. The method of claim 1, wherein the user is not required to perform more than one authentication task for the transaction. 6. The method of claim 1, wherein the user authentication data includes or is derived from a PIN (personal identification number) entered by the user. 7. The method of claim 1, wherein the user authentication data includes or is derived from biometric data generated by interaction with the user. 8. The method of claim 1, wherein the computer is operated by or on behalf of a wallet service provider. 9. A method comprising:
maintaining a digital wallet in a computer, the computer operated by or on behalf of a wallet service provider; receiving a request for a transaction using a payment account represented in the digital wallet; receiving and verifying, by the computer, authentication data for the requested transaction; in response to verifying the authentication data by the computer, triggering by the computer generation of a cryptogram for the transaction. 10. The method of claim 9, wherein the cryptogram is generated in the computer. 11. The method of claim 9, wherein the computer is a wallet services computer, and the cryptogram is generated in a server computer that is in communication with the wallet services computer. 12. The method of claim 9, wherein the cryptogram is generated in accordance with an EMV standard. 13. The method of claim 9, wherein the transaction is an e-commerce transaction. 14. The method of claim 13, wherein:
the verified authentication data includes user authentication data; and the user is not required to perform more than one authentication task for the transaction. 15. An apparatus comprising:
a processor; and a memory in communication with said processor and storing program instructions, said processor operative with the program instructions to perform functions as follows:
maintaining a digital wallet, the digital wallet storing a plurality of payment account entries associated with a user of the digital wallet, each of said payment account entries corresponding to a respective payment account that belongs to said user, the digital wallet stored in one of a plurality of partitions maintained in a server computer;
receiving a request for a transaction;
receiving and verifying user authentication data regarding the user and the requested transaction; and
in response to verifying the user authentication data, allowing the user to access any one of said payment accounts without requiring further user authentication. 16. The apparatus of claim 15, wherein the processor is further operative with the program instructions to:
verify authentication of a device used by the user to initiate the transaction. 17. The apparatus of claim 16, wherein the processor is further operative with the program instructions to:
set a consumer authentication status flag to a “valid” state to indicate that the processor has verified the received user authentication data; wherein the processor does not receive a consumer authentication status flag value from said device used by the user. 18. The apparatus of claim 16, wherein the device used by the user is a personal computer, a laptop computer, a tablet computer or a smartphone. 19. The apparatus of claim 15, wherein the user is not required to perform more than one authentication task for the transaction. 20. The apparatus of claim 15, wherein the user authentication data includes or is derived from a PIN (personal identification number) entered by the user. | 2,800 |
11,383 | 11,383 | 14,607,933 | 2,872 | A hybrid omnidirectional structural color pigment. The pigment exhibits a visible color to the human eye and has a very small or non-noticeable color shift when exposed to broadband electromagnetic radiation (e.g. white light) and viewed from angles between 0 and 45° relative to the normal of an outer surface of the pigment. The pigment is in the form or a multilayer stack that has a reflective core layer and at least two high index of refraction (n h ) layers. One of the n h layers can be a dry deposited n h dielectric layer that extends across the reflective core layer and one of the layers can be a wet deposited n h outer protective coating layer. An absorber layer that extends between the dry deposited n h dielectric layer and the wet deposited n h outer protective layer can also be included. | 1. A hybrid omnidirectional structural color pigment comprising:
a multilayer stack having:
a reflective core layer;
a dry deposited high index of refraction (nh) dielectric layer extending across said reflective core layer;
a dry deposited absorber layer extending across said nh dielectric layer; and
a wet deposited nh outer oxide layer extending across said absorber layer;
said multilayer stack having a reflection band with a predetermined full width at half maximum (FWHM) of less than 300 nm and a predetermined color hue shift of less than 30° when said multilayer stack is exposed to broadband electromagnetic radiation and viewed from angles between 0 and 45° relative to normal of an outside surface of said multilayer stack. 2. The hybrid omnidirectional structural color pigment of claim 1, wherein said reflective core layer is a metallic core reflector layer having a thickness between 30-200 nm and is a metallic material selected from at least one of the group consisting of Al, Ag, Pt, Cr, Cu, Zn, Au, Sn and alloys thereof. 3. The hybrid omnidirectional structural color pigment of claim 2, wherein said dry deposited nh dielectric layer is a dielectric material selected from at least one of the group consisting of CeO2, Nb2O5, SiN, SnO2, SnS, TiO2, ZnO, ZnS and ZrO2. 4. The hybrid omnidirectional structural color pigment of claim 3, wherein said dry deposited nh dielectric layer has a thickness between 0.1 QW-4.0 QW for a desired control wavelength. 5. The hybrid omnidirectional structural color pigment of claim 4, wherein said dry deposited absorber layer is an absorber material selected from at least one of the group consisting of Cr, Cu, Au, Sn, alloys thereof, amorphous Si and Fe2O3. 6. The hybrid omnidirectional structural color pigment of claim 5, wherein said dry deposited absorber layer has a thickness between 2-30 nm. 7. The hybrid omnidirectional structural color pigment of claim 6, wherein said wet deposited nh outer oxide layer is an oxide selected from at least one of the group consisting of CeO2, Nb2O5, SnO2, TiO2, ZnO and ZrO2. 8. The hybrid omnidirectional structural color pigment of claim 7, wherein said wet deposited nh outer oxide layer has a thickness between 5-200 nm. 9. The hybrid omnidirectional structural color pigment of claim 8, wherein said dry deposited nh dielectric layer is a pair of nh dielectric layers with said reflective core layer extending therebetween, said dry deposited absorber layer is a pair of dry deposited absorber layers with said pair of nh dielectric layers extending therebetween and said wet deposited nh outer oxide layer extends across outer surfaces of said pair of dry deposited absorber layers. 10. The hybrid omnidirectional structural color pigment of claim 9, wherein said multilayer stack has a thickness of less than 2.0 μm. 11. The hybrid omnidirectional structural color pigment of claim 9, wherein said multilayer stack has a thickness of less than 1.5 μm. 12. The hybrid omnidirectional structural color pigment of claim 11, wherein said multilayer stack has less than 10 layers. 13. The hybrid omnidirectional structural color pigment of claim 12, wherein said multilayer stack has less than 8 layers. 14. A process for making an onidirectional structural color pigment, the process comprising:
manufacturing a multilayer stack by: providing a reflective core layer; dry depositing a high index of refraction (nh) dielectric layer that extends across the reflective core layer; dry depositing an absorber layer that extends across the nh dielectric layer; and wet depositing an outer nh oxide layer that extends across the absorber layer; the multilayer stack having a reflection band with a predetermined full width at half maximum (FWHM) of less than 300 nm and a predetermined color hue shift of less than 30° when the multilayer stack is exposed to broadband electromagnetic radiation and viewed from angles between 0 and 45° relative to normal of an outside surface of the multilayer stack. 15. The process of claim 14, wherein the reflective core layer is a metallic core reflector layer having a thickness between 30-200 nm made from a metallic material selected from at least one of the group consisting of Al, Ag, Pt, Cr, Cu, Zn, Au, Sn and alloys thereof; and
the dry deposited nh dielectric layer has a thickness between 0.1 QW-4.0 QW for a desired control wavelength and is made from a dielectric material selected from at least one of the group consisting of CeO2, Nb2O5, SiN, SnO2, SnS, TiO2, ZnO, ZnS and ZrO2. 16. The process of claim 15, wherein the dry deposited absorber layer has a thickness between 2-30 nm and is made from an absorber material selected from at least one of the group consisting of Cr, Cu, Au, Sn, alloys thereof, amorphous Si and Fe2O3. 17. The process of claim 16, wherein the wet deposited nh outer oxide layer has a thickness between 5-200 nm and is an oxide selected from at least one of the group consisting of CeO2, Nb2O5, SnO2, TiO2, ZnO and ZrO2. 18. The process of claim 17, wherein the multilayer stack has less than 10 layers. 19. The process of claim 17, wherein the multilayer stack has less than 8 layers. 20. The process of claim 17, wherein the multilayer stack has an overall thickness of less than 2.0 μm. | A hybrid omnidirectional structural color pigment. The pigment exhibits a visible color to the human eye and has a very small or non-noticeable color shift when exposed to broadband electromagnetic radiation (e.g. white light) and viewed from angles between 0 and 45° relative to the normal of an outer surface of the pigment. The pigment is in the form or a multilayer stack that has a reflective core layer and at least two high index of refraction (n h ) layers. One of the n h layers can be a dry deposited n h dielectric layer that extends across the reflective core layer and one of the layers can be a wet deposited n h outer protective coating layer. An absorber layer that extends between the dry deposited n h dielectric layer and the wet deposited n h outer protective layer can also be included.1. A hybrid omnidirectional structural color pigment comprising:
a multilayer stack having:
a reflective core layer;
a dry deposited high index of refraction (nh) dielectric layer extending across said reflective core layer;
a dry deposited absorber layer extending across said nh dielectric layer; and
a wet deposited nh outer oxide layer extending across said absorber layer;
said multilayer stack having a reflection band with a predetermined full width at half maximum (FWHM) of less than 300 nm and a predetermined color hue shift of less than 30° when said multilayer stack is exposed to broadband electromagnetic radiation and viewed from angles between 0 and 45° relative to normal of an outside surface of said multilayer stack. 2. The hybrid omnidirectional structural color pigment of claim 1, wherein said reflective core layer is a metallic core reflector layer having a thickness between 30-200 nm and is a metallic material selected from at least one of the group consisting of Al, Ag, Pt, Cr, Cu, Zn, Au, Sn and alloys thereof. 3. The hybrid omnidirectional structural color pigment of claim 2, wherein said dry deposited nh dielectric layer is a dielectric material selected from at least one of the group consisting of CeO2, Nb2O5, SiN, SnO2, SnS, TiO2, ZnO, ZnS and ZrO2. 4. The hybrid omnidirectional structural color pigment of claim 3, wherein said dry deposited nh dielectric layer has a thickness between 0.1 QW-4.0 QW for a desired control wavelength. 5. The hybrid omnidirectional structural color pigment of claim 4, wherein said dry deposited absorber layer is an absorber material selected from at least one of the group consisting of Cr, Cu, Au, Sn, alloys thereof, amorphous Si and Fe2O3. 6. The hybrid omnidirectional structural color pigment of claim 5, wherein said dry deposited absorber layer has a thickness between 2-30 nm. 7. The hybrid omnidirectional structural color pigment of claim 6, wherein said wet deposited nh outer oxide layer is an oxide selected from at least one of the group consisting of CeO2, Nb2O5, SnO2, TiO2, ZnO and ZrO2. 8. The hybrid omnidirectional structural color pigment of claim 7, wherein said wet deposited nh outer oxide layer has a thickness between 5-200 nm. 9. The hybrid omnidirectional structural color pigment of claim 8, wherein said dry deposited nh dielectric layer is a pair of nh dielectric layers with said reflective core layer extending therebetween, said dry deposited absorber layer is a pair of dry deposited absorber layers with said pair of nh dielectric layers extending therebetween and said wet deposited nh outer oxide layer extends across outer surfaces of said pair of dry deposited absorber layers. 10. The hybrid omnidirectional structural color pigment of claim 9, wherein said multilayer stack has a thickness of less than 2.0 μm. 11. The hybrid omnidirectional structural color pigment of claim 9, wherein said multilayer stack has a thickness of less than 1.5 μm. 12. The hybrid omnidirectional structural color pigment of claim 11, wherein said multilayer stack has less than 10 layers. 13. The hybrid omnidirectional structural color pigment of claim 12, wherein said multilayer stack has less than 8 layers. 14. A process for making an onidirectional structural color pigment, the process comprising:
manufacturing a multilayer stack by: providing a reflective core layer; dry depositing a high index of refraction (nh) dielectric layer that extends across the reflective core layer; dry depositing an absorber layer that extends across the nh dielectric layer; and wet depositing an outer nh oxide layer that extends across the absorber layer; the multilayer stack having a reflection band with a predetermined full width at half maximum (FWHM) of less than 300 nm and a predetermined color hue shift of less than 30° when the multilayer stack is exposed to broadband electromagnetic radiation and viewed from angles between 0 and 45° relative to normal of an outside surface of the multilayer stack. 15. The process of claim 14, wherein the reflective core layer is a metallic core reflector layer having a thickness between 30-200 nm made from a metallic material selected from at least one of the group consisting of Al, Ag, Pt, Cr, Cu, Zn, Au, Sn and alloys thereof; and
the dry deposited nh dielectric layer has a thickness between 0.1 QW-4.0 QW for a desired control wavelength and is made from a dielectric material selected from at least one of the group consisting of CeO2, Nb2O5, SiN, SnO2, SnS, TiO2, ZnO, ZnS and ZrO2. 16. The process of claim 15, wherein the dry deposited absorber layer has a thickness between 2-30 nm and is made from an absorber material selected from at least one of the group consisting of Cr, Cu, Au, Sn, alloys thereof, amorphous Si and Fe2O3. 17. The process of claim 16, wherein the wet deposited nh outer oxide layer has a thickness between 5-200 nm and is an oxide selected from at least one of the group consisting of CeO2, Nb2O5, SnO2, TiO2, ZnO and ZrO2. 18. The process of claim 17, wherein the multilayer stack has less than 10 layers. 19. The process of claim 17, wherein the multilayer stack has less than 8 layers. 20. The process of claim 17, wherein the multilayer stack has an overall thickness of less than 2.0 μm. | 2,800 |
11,384 | 11,384 | 15,592,410 | 2,863 | Embodiments of the invention relate to a wall scanner that includes a housing, a plurality of sensors, a display, and a control section. The housing includes a handle portion and a body portion. The handle portion is adapted to receive a removable and rechargeable battery pack such as a high-voltage lithium-ion (“Li-Ion”) battery pack. The body portion of the housing encloses the plurality of sensing devices, such as, for example, capacitive plate sensors for sensing the presence of a stud behind a surface, a D-coil sensor for identifying the presence of metal behind the surface, and a non-contact voltage sensor for detecting the presence of live wires carrying AC currents. The display is configured to display, among other things, the location of an object behind the surface in real-time, the depth of an object behind the surface, and whether an object behind the surface is ferrous or non-ferrous. The control section includes a plurality of actuation devices for controlling the functions and operations of the wall scanner, such as the scanning mode. | 1. A wall scanner for sensing objects behind a surface, the wall scanner comprising:
a housing including a handle portion defining a first axis and defining a first recess and a body portion defining a second axis approximately parallel to the first axis; a power terminal within the first recess; wherein a second recess is formed between the body portion and the handle portion; and wherein the first recess is operable to receive a removable battery, the battery being electrically connectable to the power terminal; wherein the handle portion has an outer surface generally defining a cylinder along the first axis, the battery being within the cylinder; a sensor for sensing an object behind the surface; a non-contact voltage sensor operable to detect a medium carrying an alternating current behind the surface; and a display configured to display a plurality of indications to a user. 2. The wall scanner of claim 1, further comprising a control section including a plurality of actuation devices configured to be actuated by a gripping hand of the user, wherein the handle portion is gripped by the gripping hand of the user. 3. The wall scanner of claim 1, further comprising a battery pack including the battery, wherein, when inserted into the first recess, the battery pack substantially covers the first recess. 4. The wall scanner of claim 1, wherein the object is of a first object type and the sensor is of a first sensor type, and wherein the wall scanner further comprises a second sensor of a second sensor type for sensing a second object of a second object type behind the surface, the first sensor type being different than the second sensor type, and the first object type being different than the second object type. 5. The wall scanner of claim 4, wherein the plurality of indications includes at least an indication of a depth of the second object behind the surface and a graphical representation of a location of the second object behind the surface. 6. The wall scanner of claim 1, further comprising an outer housing covering the first recess. 7. The wall scanner of claim 6, further comprising a latch connecting the outer housing to the handle portion. 8. The wall scanner of claim 6, further comprising a battery pack including the battery and the outer housing, wherein, when inserted into the first recess, the outer housing of the battery pack substantially covers the first recess. 9. A method of operating a wall scanner, the wall scanner including a handle portion defining a first axis and a receiving chamber, the handle having an outer surface generally defining a cylinder along the first axis, a power terminal positioned in the receiving chamber, a body portion defining a second axis approximately parallel to the first axis, and a sensor, the method comprising:
inserting a removable battery into the receiving chamber and within the cylinder of the handle portion, the battery including a battery terminal, when inserted, the battery terminal connecting to the power terminal; powering the wall scanner with the removable battery; sensing, using the sensor, an object behind a surface; detecting, using a non-contact voltage sensor, a medium carrying an alternating current behind the surface; and displaying, on a display, a plurality of indications to a user. 10. The method of claim 9, further comprising controlling the wall scanner using one or more actuation devices configured to be actuated by a gripping hand of the user, the handle portion being gripped by the gripping hand of the user. 11. The method of claim 9, wherein the battery is included in a battery pack, the battery pack having a battery pack housing supporting a plurality of battery cells, and wherein inserting includes inserting the battery pack along the axis at least partially into the receiving chamber. 12. The method of claim 9, further comprising covering the receiving chamber. 13. The method of claim 12, wherein the battery is included in a battery pack, the battery pack including an outer housing, wherein inserting includes inserting the battery pack at least partially into the receiving chamber, and wherein covering includes covering the receiving chamber with at least a portion of the outer housing. 14. The method of claim 9, wherein the object is of a first object type, the sensor is of a first sensor type, wherein the wall scanner includes a second sensor of a second sensor type, and wherein the method further comprises sensing, using the second sensor, a second object of a second object type behind the surface; the first sensor type being different than the second sensor type, and the first object type being different than the second object type. 15. The method of claim 14, wherein the plurality of indications include at least an indication of a depth of the second object behind the surface and a graphical representation of a location of the object behind the surface. 16. A wall scanner for sensing objects behind a surface, the wall scanner comprising:
a housing including
a handle portion defining a first axis and a recess, the handle portion having an outer surface generally defining a cylinder along the first axis, and
a body portion defining a second axis approximately parallel to and offset from the first axis;
a power terminal within the first recess; wherein the recess is operable to receive a battery having a lithium-based chemistry, the battery being receivable within the cylinder, the battery being electrically connectable to the power terminal; an outer housing covering the first recess; a sensor for sensing an object behind the surface; and a non-contact voltage sensor operable to detect a medium carrying an alternating current behind the surface. 17. The wall scanner of claim 16, wherein the object is of a first object type and the sensor is of a first sensor type, and wherein the wall scanner further comprises a second sensor of a second sensor type for sensing a second object of a second object type behind the surface, the first sensor type being different than the second sensor type, and the first object type being different than the second object type. 18. The wall scanner of claim 17, further comprising a display configured to display a plurality of indications to a user, the indications including at least an indication of a depth of the second object behind the surface and a graphical representation of a location of the second object behind the surface. 19. The wall scanner of claim 17, wherein the sensor includes a capacitive plate sensor and the second sensor includes a D-coil sensor. 20. The wall scanner of claim 16, further comprising a battery pack including the battery and the outer housing, wherein, when inserted into the first recess, the outer housing of the battery pack substantially covers the first recess. | Embodiments of the invention relate to a wall scanner that includes a housing, a plurality of sensors, a display, and a control section. The housing includes a handle portion and a body portion. The handle portion is adapted to receive a removable and rechargeable battery pack such as a high-voltage lithium-ion (“Li-Ion”) battery pack. The body portion of the housing encloses the plurality of sensing devices, such as, for example, capacitive plate sensors for sensing the presence of a stud behind a surface, a D-coil sensor for identifying the presence of metal behind the surface, and a non-contact voltage sensor for detecting the presence of live wires carrying AC currents. The display is configured to display, among other things, the location of an object behind the surface in real-time, the depth of an object behind the surface, and whether an object behind the surface is ferrous or non-ferrous. The control section includes a plurality of actuation devices for controlling the functions and operations of the wall scanner, such as the scanning mode.1. A wall scanner for sensing objects behind a surface, the wall scanner comprising:
a housing including a handle portion defining a first axis and defining a first recess and a body portion defining a second axis approximately parallel to the first axis; a power terminal within the first recess; wherein a second recess is formed between the body portion and the handle portion; and wherein the first recess is operable to receive a removable battery, the battery being electrically connectable to the power terminal; wherein the handle portion has an outer surface generally defining a cylinder along the first axis, the battery being within the cylinder; a sensor for sensing an object behind the surface; a non-contact voltage sensor operable to detect a medium carrying an alternating current behind the surface; and a display configured to display a plurality of indications to a user. 2. The wall scanner of claim 1, further comprising a control section including a plurality of actuation devices configured to be actuated by a gripping hand of the user, wherein the handle portion is gripped by the gripping hand of the user. 3. The wall scanner of claim 1, further comprising a battery pack including the battery, wherein, when inserted into the first recess, the battery pack substantially covers the first recess. 4. The wall scanner of claim 1, wherein the object is of a first object type and the sensor is of a first sensor type, and wherein the wall scanner further comprises a second sensor of a second sensor type for sensing a second object of a second object type behind the surface, the first sensor type being different than the second sensor type, and the first object type being different than the second object type. 5. The wall scanner of claim 4, wherein the plurality of indications includes at least an indication of a depth of the second object behind the surface and a graphical representation of a location of the second object behind the surface. 6. The wall scanner of claim 1, further comprising an outer housing covering the first recess. 7. The wall scanner of claim 6, further comprising a latch connecting the outer housing to the handle portion. 8. The wall scanner of claim 6, further comprising a battery pack including the battery and the outer housing, wherein, when inserted into the first recess, the outer housing of the battery pack substantially covers the first recess. 9. A method of operating a wall scanner, the wall scanner including a handle portion defining a first axis and a receiving chamber, the handle having an outer surface generally defining a cylinder along the first axis, a power terminal positioned in the receiving chamber, a body portion defining a second axis approximately parallel to the first axis, and a sensor, the method comprising:
inserting a removable battery into the receiving chamber and within the cylinder of the handle portion, the battery including a battery terminal, when inserted, the battery terminal connecting to the power terminal; powering the wall scanner with the removable battery; sensing, using the sensor, an object behind a surface; detecting, using a non-contact voltage sensor, a medium carrying an alternating current behind the surface; and displaying, on a display, a plurality of indications to a user. 10. The method of claim 9, further comprising controlling the wall scanner using one or more actuation devices configured to be actuated by a gripping hand of the user, the handle portion being gripped by the gripping hand of the user. 11. The method of claim 9, wherein the battery is included in a battery pack, the battery pack having a battery pack housing supporting a plurality of battery cells, and wherein inserting includes inserting the battery pack along the axis at least partially into the receiving chamber. 12. The method of claim 9, further comprising covering the receiving chamber. 13. The method of claim 12, wherein the battery is included in a battery pack, the battery pack including an outer housing, wherein inserting includes inserting the battery pack at least partially into the receiving chamber, and wherein covering includes covering the receiving chamber with at least a portion of the outer housing. 14. The method of claim 9, wherein the object is of a first object type, the sensor is of a first sensor type, wherein the wall scanner includes a second sensor of a second sensor type, and wherein the method further comprises sensing, using the second sensor, a second object of a second object type behind the surface; the first sensor type being different than the second sensor type, and the first object type being different than the second object type. 15. The method of claim 14, wherein the plurality of indications include at least an indication of a depth of the second object behind the surface and a graphical representation of a location of the object behind the surface. 16. A wall scanner for sensing objects behind a surface, the wall scanner comprising:
a housing including
a handle portion defining a first axis and a recess, the handle portion having an outer surface generally defining a cylinder along the first axis, and
a body portion defining a second axis approximately parallel to and offset from the first axis;
a power terminal within the first recess; wherein the recess is operable to receive a battery having a lithium-based chemistry, the battery being receivable within the cylinder, the battery being electrically connectable to the power terminal; an outer housing covering the first recess; a sensor for sensing an object behind the surface; and a non-contact voltage sensor operable to detect a medium carrying an alternating current behind the surface. 17. The wall scanner of claim 16, wherein the object is of a first object type and the sensor is of a first sensor type, and wherein the wall scanner further comprises a second sensor of a second sensor type for sensing a second object of a second object type behind the surface, the first sensor type being different than the second sensor type, and the first object type being different than the second object type. 18. The wall scanner of claim 17, further comprising a display configured to display a plurality of indications to a user, the indications including at least an indication of a depth of the second object behind the surface and a graphical representation of a location of the second object behind the surface. 19. The wall scanner of claim 17, wherein the sensor includes a capacitive plate sensor and the second sensor includes a D-coil sensor. 20. The wall scanner of claim 16, further comprising a battery pack including the battery and the outer housing, wherein, when inserted into the first recess, the outer housing of the battery pack substantially covers the first recess. | 2,800 |
11,385 | 11,385 | 15,196,120 | 2,882 | A fluid handling structure for a lithographic apparatus is disclosed. The fluid handling structure has a plurality of openings arranged in plan, in a line. The fluid handling structure is configured such that the openings are directed, in use, towards a facing surface, the facing surface being a substrate and/or a substrate table. The substrate table is configured to support the substrate. Outward of the line of openings is a damper. The damper may have a width that varies along the line of openings. The damper width is defined between the line of openings and an opposing damper edge. | 1. A fluid handling structure for a lithographic apparatus, the fluid handling structure having a plurality of openings arranged in plan, in a line, the fluid handling structure configured such that the openings are directed, in use, towards a facing surface, the facing surface being a substrate and/or a substrate table configured to support the substrate, wherein outward of the line of openings is a damper, the damper having a width that varies along the line of openings, the width being defined between the line of openings and an opposing damper edge. 2. The fluid handling structure of claim 1, wherein the line has radius of curvature different from the damper edge. 3. The fluid handling structure of claim 1, wherein the line forms a cornered shape and the damper has a corner part associated with each corner and a side part between each corner part. 4. The fluid handling structure of claim 3, wherein at a corner of the cornered shape, one of the openings is a curved corner opening, preferably at the apex of the corner. 5. The fluid handling structure of claim 4, wherein the corner opening has a radius of curvature different from the radius of curvature of the opposing damper edge. 6. The fluid handling structure of claim 5, wherein the radius of curvature of the corner opening is at least the same as or greater than the radius of curvature of the opposing damper edge. 7. The fluid handling structure of claim 3, wherein the damper width is larger at a corner part than at a side part. 8. The fluid handling structure of claim 3, wherein the dimensions of each corner part is substantially the same, the dimension of each side part is substantially the same, or both. 9. The fluid handling structure claim 1, wherein the openings are inlets for the passage of gas and/or liquid into the fluid handling structure. 10. The fluid handling structure of claim 1, wherein the openings surround a space to which the fluid handling structure is arranged to supply fluid. 11. The fluid handling structure of claim 10, wherein the openings are formed in plan around the periphery of the space. 12. The fluid handling structure claim 1, wherein the line defined by the openings is continuous and has a continuously changing direction. 13. The fluid handling structure of claim 1, wherein the damper is radially outward of the line of openings. 14. The fluid handling structure of claim 1, wherein the fluid handling structure is configured to supply liquid to a localized portion of the facing surface and to confine the liquid to the localized portion. 15. The fluid handling structure of claim 1, wherein the fluid handling structure is a dryer configured to remove liquid from the facing surface. 16. A lithographic apparatus comprising the fluid handling structure of claim 1. 17. A fluid handling structure for a lithographic apparatus, the fluid handling structure having a plurality of openings arranged in plan, in a line, the fluid handling structure configured such that the openings are formed in an undersurface of the fluid handling structure and are directed, in use, towards a facing surface, the facing surface being the surface of a substrate and/or a substrate table configured to support the substrate, wherein outward of the line is a damper, the damper having a surface that is angled relative to the undersurface. 18. A device manufacturing method, comprising:
providing a fluid to a surface of a substrate and/or substrate table, the substrate table supporting the substrate; and retrieving liquid from between the surface of the substrate and/or the substrate table by applying an under pressure to a plurality of openings in a fluid handling structure, the openings being arranged, in plan, in a line and being directed towards a substrate and/or a substrate table, wherein in retrieving the liquid a contact line of the liquid is supported by a damper, the damper being positioned radially outward of the line of openings and having a width that varies along the line of openings, the width being defined between the line of openings and an opposing damper edge. 19. The device manufacturing method of claim 18, wherein in providing the fluid the providing is between a projection system and the surface and in retrieving the liquid, the retrieving is from between the projection system and the surface. | A fluid handling structure for a lithographic apparatus is disclosed. The fluid handling structure has a plurality of openings arranged in plan, in a line. The fluid handling structure is configured such that the openings are directed, in use, towards a facing surface, the facing surface being a substrate and/or a substrate table. The substrate table is configured to support the substrate. Outward of the line of openings is a damper. The damper may have a width that varies along the line of openings. The damper width is defined between the line of openings and an opposing damper edge.1. A fluid handling structure for a lithographic apparatus, the fluid handling structure having a plurality of openings arranged in plan, in a line, the fluid handling structure configured such that the openings are directed, in use, towards a facing surface, the facing surface being a substrate and/or a substrate table configured to support the substrate, wherein outward of the line of openings is a damper, the damper having a width that varies along the line of openings, the width being defined between the line of openings and an opposing damper edge. 2. The fluid handling structure of claim 1, wherein the line has radius of curvature different from the damper edge. 3. The fluid handling structure of claim 1, wherein the line forms a cornered shape and the damper has a corner part associated with each corner and a side part between each corner part. 4. The fluid handling structure of claim 3, wherein at a corner of the cornered shape, one of the openings is a curved corner opening, preferably at the apex of the corner. 5. The fluid handling structure of claim 4, wherein the corner opening has a radius of curvature different from the radius of curvature of the opposing damper edge. 6. The fluid handling structure of claim 5, wherein the radius of curvature of the corner opening is at least the same as or greater than the radius of curvature of the opposing damper edge. 7. The fluid handling structure of claim 3, wherein the damper width is larger at a corner part than at a side part. 8. The fluid handling structure of claim 3, wherein the dimensions of each corner part is substantially the same, the dimension of each side part is substantially the same, or both. 9. The fluid handling structure claim 1, wherein the openings are inlets for the passage of gas and/or liquid into the fluid handling structure. 10. The fluid handling structure of claim 1, wherein the openings surround a space to which the fluid handling structure is arranged to supply fluid. 11. The fluid handling structure of claim 10, wherein the openings are formed in plan around the periphery of the space. 12. The fluid handling structure claim 1, wherein the line defined by the openings is continuous and has a continuously changing direction. 13. The fluid handling structure of claim 1, wherein the damper is radially outward of the line of openings. 14. The fluid handling structure of claim 1, wherein the fluid handling structure is configured to supply liquid to a localized portion of the facing surface and to confine the liquid to the localized portion. 15. The fluid handling structure of claim 1, wherein the fluid handling structure is a dryer configured to remove liquid from the facing surface. 16. A lithographic apparatus comprising the fluid handling structure of claim 1. 17. A fluid handling structure for a lithographic apparatus, the fluid handling structure having a plurality of openings arranged in plan, in a line, the fluid handling structure configured such that the openings are formed in an undersurface of the fluid handling structure and are directed, in use, towards a facing surface, the facing surface being the surface of a substrate and/or a substrate table configured to support the substrate, wherein outward of the line is a damper, the damper having a surface that is angled relative to the undersurface. 18. A device manufacturing method, comprising:
providing a fluid to a surface of a substrate and/or substrate table, the substrate table supporting the substrate; and retrieving liquid from between the surface of the substrate and/or the substrate table by applying an under pressure to a plurality of openings in a fluid handling structure, the openings being arranged, in plan, in a line and being directed towards a substrate and/or a substrate table, wherein in retrieving the liquid a contact line of the liquid is supported by a damper, the damper being positioned radially outward of the line of openings and having a width that varies along the line of openings, the width being defined between the line of openings and an opposing damper edge. 19. The device manufacturing method of claim 18, wherein in providing the fluid the providing is between a projection system and the surface and in retrieving the liquid, the retrieving is from between the projection system and the surface. | 2,800 |
11,386 | 11,386 | 15,160,615 | 2,861 | Systems, methods, and devices are provided for testing a drug eluting prosthesis. A drug eluting prosthesis is placed within a conduit that is coupled at one end to a first conduit frame and at a second end to a second conduit frame. The first conduit frame is coupled to the second conduit frame using a movable shaft, such that the first conduit frame and the second conduit frame can move relative to each other. When the first conduit frame and the second conduit frame are moved relative to each other, they expose the conduit and the drug eluting prosthesis to compressive or tensile forces. While the drug eluting prosthesis is being exposed to compressive or tensile forces, a fluid flow is provided through the conduit to test the particle shed rate of the drug eluting prosthesis. | 1. An apparatus for testing a prosthesis, comprising:
a first conduit frame disposed to be coupled to a first end of a conduit, wherein the conduit is disposed to receive a prosthesis; a second conduit frame disposed to be coupled to a second end of the conduit opposite the first end; a movable shaft disposed to cause relative motion between the first conduit frame and the second conduit frame, the prosthesis thereby being exposed to a tensile or a compressive force as a result of the relative motion; and a pump for providing a flow of fluid through the conduit and the prosthesis at least while the movable shaft is in motion. 2. The apparatus of claim 1, wherein the prosthesis is a drug eluting prosthesis. 3. The apparatus of claim 1, further comprising a particle counter located downstream of the conduit and disposed to receive the flow of fluid. 4. The apparatus of claim 1, further comprising a filter located downstream of the conduit and disposed to receive the flow of fluid. 5. The apparatus of claim 1, wherein the conduit is coupled to the first conduit frame using a first conduit mount including at least one tensioning element that allows the conduit to be exposed to a pre-set amount of tension or compression prior to receiving the prosthesis. 6. The apparatus of claim 1, further comprising a plurality of conduits, wherein each conduit is coupled to the first conduit frame at a first end and the second conduit frame at a second end, and wherein each conduit is disposed to receive a prosthesis. 7. The apparatus of claim 6, further comprising a plurality of flow lines, each flow line disposed to direct a separate fluid flow from each of the plurality of conduits to one of a particle counter or a filter. 8. The apparatus of claim 1, wherein the first conduit frame is a stationary conduit frame and the second conduit frame is a movable conduit frame. 9. A method for testing a drug eluting prosthesis, the method comprising:
disposing a drug eluting prosthesis within a conduit positioned between a first conduit frame and a second conduit frame; directing a flow of fluid through the conduit; moving the second conduit frame relative to the first conduit frame in order to expose the drug eluting prosthesis within the conduit to one or more of tensile and compressive forces; and testing a particle shed rate associated with the drug eluting prosthesis. 10. The method of claim 9, wherein testing the particle shed rate includes determining the particle shed rate using a particle counter located downstream of the conduit. 11. The method of claim 9, wherein testing the particle shed rate includes determining the particle shed rate using a filter located downstream of the conduit. 12. The method of claim 9, further comprising testing the particle shed rate prior to moving the second conduit frame relative to the first conduit frame to determine an initial particle shed rate. 13. The method of claim 12, further comprising comparing the initial particle shed rate to a particle shed rate computed while the drug eluting prosthesis is exposed to one or more of tensile and compressive forces. 14. The method of claim 9, further comprising coupling the conduit to the first conduit frame using a first conduit mount including at least one tensioning element such that the conduit is exposed to a pre-set amount of tension or compression prior to receiving the drug eluting prosthesis. 15. The method of claim 9, further comprising:
coupling a plurality of conduits between the first conduit frame and the second conduit frame; and disposing a drug eluting prosthesis within each of the plurality of conduits. 16. The method of claim 15, further comprising directing a separate fluid flow through each of the plurality of conduits to one of a particle counter or a filter. | Systems, methods, and devices are provided for testing a drug eluting prosthesis. A drug eluting prosthesis is placed within a conduit that is coupled at one end to a first conduit frame and at a second end to a second conduit frame. The first conduit frame is coupled to the second conduit frame using a movable shaft, such that the first conduit frame and the second conduit frame can move relative to each other. When the first conduit frame and the second conduit frame are moved relative to each other, they expose the conduit and the drug eluting prosthesis to compressive or tensile forces. While the drug eluting prosthesis is being exposed to compressive or tensile forces, a fluid flow is provided through the conduit to test the particle shed rate of the drug eluting prosthesis.1. An apparatus for testing a prosthesis, comprising:
a first conduit frame disposed to be coupled to a first end of a conduit, wherein the conduit is disposed to receive a prosthesis; a second conduit frame disposed to be coupled to a second end of the conduit opposite the first end; a movable shaft disposed to cause relative motion between the first conduit frame and the second conduit frame, the prosthesis thereby being exposed to a tensile or a compressive force as a result of the relative motion; and a pump for providing a flow of fluid through the conduit and the prosthesis at least while the movable shaft is in motion. 2. The apparatus of claim 1, wherein the prosthesis is a drug eluting prosthesis. 3. The apparatus of claim 1, further comprising a particle counter located downstream of the conduit and disposed to receive the flow of fluid. 4. The apparatus of claim 1, further comprising a filter located downstream of the conduit and disposed to receive the flow of fluid. 5. The apparatus of claim 1, wherein the conduit is coupled to the first conduit frame using a first conduit mount including at least one tensioning element that allows the conduit to be exposed to a pre-set amount of tension or compression prior to receiving the prosthesis. 6. The apparatus of claim 1, further comprising a plurality of conduits, wherein each conduit is coupled to the first conduit frame at a first end and the second conduit frame at a second end, and wherein each conduit is disposed to receive a prosthesis. 7. The apparatus of claim 6, further comprising a plurality of flow lines, each flow line disposed to direct a separate fluid flow from each of the plurality of conduits to one of a particle counter or a filter. 8. The apparatus of claim 1, wherein the first conduit frame is a stationary conduit frame and the second conduit frame is a movable conduit frame. 9. A method for testing a drug eluting prosthesis, the method comprising:
disposing a drug eluting prosthesis within a conduit positioned between a first conduit frame and a second conduit frame; directing a flow of fluid through the conduit; moving the second conduit frame relative to the first conduit frame in order to expose the drug eluting prosthesis within the conduit to one or more of tensile and compressive forces; and testing a particle shed rate associated with the drug eluting prosthesis. 10. The method of claim 9, wherein testing the particle shed rate includes determining the particle shed rate using a particle counter located downstream of the conduit. 11. The method of claim 9, wherein testing the particle shed rate includes determining the particle shed rate using a filter located downstream of the conduit. 12. The method of claim 9, further comprising testing the particle shed rate prior to moving the second conduit frame relative to the first conduit frame to determine an initial particle shed rate. 13. The method of claim 12, further comprising comparing the initial particle shed rate to a particle shed rate computed while the drug eluting prosthesis is exposed to one or more of tensile and compressive forces. 14. The method of claim 9, further comprising coupling the conduit to the first conduit frame using a first conduit mount including at least one tensioning element such that the conduit is exposed to a pre-set amount of tension or compression prior to receiving the drug eluting prosthesis. 15. The method of claim 9, further comprising:
coupling a plurality of conduits between the first conduit frame and the second conduit frame; and disposing a drug eluting prosthesis within each of the plurality of conduits. 16. The method of claim 15, further comprising directing a separate fluid flow through each of the plurality of conduits to one of a particle counter or a filter. | 2,800 |
11,387 | 11,387 | 15,112,451 | 2,859 | The present invention relates to a device for controlling a plurality of cells of a battery, the device comprising: a battery control module, comprising a plurality of cell control units, each assigned to one of the cells, wherein each cell control unit is configured to change a charge balance of the assigned cell and to measure at least one cell parameter of the assigned cell; and a main control module, which is configured to define a preferred range of the state-of-charge of the battery cells for a charging-discharging-cycle, wherein the preferred range is reduced compared to a full range, the main control module further configured to provide a first group of selected cells, on which a charging-discharging-cycle is performed including a fully charged state within the full range, and a second group of non-selected cells, on which the charging-discharging-cycle is performed within the preferred range. | 1. A device for controlling a plurality of cells of a battery, the device comprising:
a battery control module, comprising a plurality of cell control units, wherein each cell control unit is assigned to one of the cells and is configured to change a charge balance of the assigned cell and to measure at least one cell parameter of the assigned cell; and a main control module, which is configured to define a preferred range of the state-of-charge of the battery cells for a charging-discharging-cycle, wherein the preferred range is reduced compared to a full range, the main control module further configured to provide a first group of selected cells, on which the charging-discharging-cycle is performed including a fully charged state within the full range, and a second group of non-selected cells, on which the charging-discharging-cycle is performed within the preferred range. 2. The device according to claim 1,
wherein that the main control module is configured to charge the first group of selected cells by means of the cell control units to a fully charged state-of-charge level and/or to discharge the first group of selected cells by means of cell control units to a state-of-charge level corresponding to the state-of-charge level of the second group of non-selected cells. 3. The device according to claim 1,
wherein that the main control module is configured to permute the first group of selected cells over all cells of the battery. 4. The device according to claim 1,
wherein that the main control module is configured to permute the second group of non-selected cells over all cells of the battery. 5. The device according to claim 1,
wherein that cell control is configured to measure as the at least one cell parameter of the assigned cell a voltage, a temperature, or a current or a bypass current of the assigned cell. 6. The device according to claim 5,
wherein that the cell control unit is configured to control a state-of-charge level, a current or a bypass current of the assigned cell. 7. The device according to claim 6,
wherein that the main control module is configured to define as the preferred range of the state-of-charge of the battery cells a range between a minimum value, being higher than the lower limit of the full range of charge, and a maximum value being less than 1.0, of a fully charged state-of-charge level. 8. The device according to claim 6,
wherein that the main control module is configured to define as the preferred range of the state-of-charge of the battery cells a range between a minimum value, being higher than the lower limit of the full range of charge, but at least 0.5, and a maximum value being less than 0.7, of a fully charged state-of-charge level. 9. The device according to claim 8,
wherein that the main control module is configured to determine a fully charged state-of-charge of one cell by comparing the cell voltage to a cell voltage threshold value. 10. The device according to claim 1,
wherein that the main control module is configured to determine, while the charging-discharging-cycle is performed within the full range of the first group of selected cells, a state-of-charge profile of each cell of the first group of selected cells and/or the full-charge capacity of each cell of the first group of selected cells. 11. A battery comprising a plurality of cells and a device according to claim 10. 12. An X-ray source comprising a high voltage generator comprising a battery according to claim 11. 13. A method for controlling a plurality of cells of a battery, the method comprising the steps of:
Defining a preferred range of the state-of-charge of the battery cells for a charging-discharging-cycle, wherein the preferred range is reduced compared to a full range; and Providing a first group of selected cells, on which a charging-discharging-cycle is performed including a fully charged state within the full range, and providing a second group of non-selected cells, on which the charging-discharging-cycle is performed within the preferred range. 14. The method according to claim 13,
wherein the step of performing a charging-discharging-cycle on the first group of selected cells over the full range further comprises charging the first group of selected cells by means of the cell control units to a fully charged state-of-charge level. 15. The method according to claim 13,
wherein the step of performing a charging-discharging-cycle on the first group of selected cells over the full range further comprises discharging the first group of selected cells by means of the cell control units to a state-of-charge level corresponding to the state-of-charge level of the second group of non-selected cells. | The present invention relates to a device for controlling a plurality of cells of a battery, the device comprising: a battery control module, comprising a plurality of cell control units, each assigned to one of the cells, wherein each cell control unit is configured to change a charge balance of the assigned cell and to measure at least one cell parameter of the assigned cell; and a main control module, which is configured to define a preferred range of the state-of-charge of the battery cells for a charging-discharging-cycle, wherein the preferred range is reduced compared to a full range, the main control module further configured to provide a first group of selected cells, on which a charging-discharging-cycle is performed including a fully charged state within the full range, and a second group of non-selected cells, on which the charging-discharging-cycle is performed within the preferred range.1. A device for controlling a plurality of cells of a battery, the device comprising:
a battery control module, comprising a plurality of cell control units, wherein each cell control unit is assigned to one of the cells and is configured to change a charge balance of the assigned cell and to measure at least one cell parameter of the assigned cell; and a main control module, which is configured to define a preferred range of the state-of-charge of the battery cells for a charging-discharging-cycle, wherein the preferred range is reduced compared to a full range, the main control module further configured to provide a first group of selected cells, on which the charging-discharging-cycle is performed including a fully charged state within the full range, and a second group of non-selected cells, on which the charging-discharging-cycle is performed within the preferred range. 2. The device according to claim 1,
wherein that the main control module is configured to charge the first group of selected cells by means of the cell control units to a fully charged state-of-charge level and/or to discharge the first group of selected cells by means of cell control units to a state-of-charge level corresponding to the state-of-charge level of the second group of non-selected cells. 3. The device according to claim 1,
wherein that the main control module is configured to permute the first group of selected cells over all cells of the battery. 4. The device according to claim 1,
wherein that the main control module is configured to permute the second group of non-selected cells over all cells of the battery. 5. The device according to claim 1,
wherein that cell control is configured to measure as the at least one cell parameter of the assigned cell a voltage, a temperature, or a current or a bypass current of the assigned cell. 6. The device according to claim 5,
wherein that the cell control unit is configured to control a state-of-charge level, a current or a bypass current of the assigned cell. 7. The device according to claim 6,
wherein that the main control module is configured to define as the preferred range of the state-of-charge of the battery cells a range between a minimum value, being higher than the lower limit of the full range of charge, and a maximum value being less than 1.0, of a fully charged state-of-charge level. 8. The device according to claim 6,
wherein that the main control module is configured to define as the preferred range of the state-of-charge of the battery cells a range between a minimum value, being higher than the lower limit of the full range of charge, but at least 0.5, and a maximum value being less than 0.7, of a fully charged state-of-charge level. 9. The device according to claim 8,
wherein that the main control module is configured to determine a fully charged state-of-charge of one cell by comparing the cell voltage to a cell voltage threshold value. 10. The device according to claim 1,
wherein that the main control module is configured to determine, while the charging-discharging-cycle is performed within the full range of the first group of selected cells, a state-of-charge profile of each cell of the first group of selected cells and/or the full-charge capacity of each cell of the first group of selected cells. 11. A battery comprising a plurality of cells and a device according to claim 10. 12. An X-ray source comprising a high voltage generator comprising a battery according to claim 11. 13. A method for controlling a plurality of cells of a battery, the method comprising the steps of:
Defining a preferred range of the state-of-charge of the battery cells for a charging-discharging-cycle, wherein the preferred range is reduced compared to a full range; and Providing a first group of selected cells, on which a charging-discharging-cycle is performed including a fully charged state within the full range, and providing a second group of non-selected cells, on which the charging-discharging-cycle is performed within the preferred range. 14. The method according to claim 13,
wherein the step of performing a charging-discharging-cycle on the first group of selected cells over the full range further comprises charging the first group of selected cells by means of the cell control units to a fully charged state-of-charge level. 15. The method according to claim 13,
wherein the step of performing a charging-discharging-cycle on the first group of selected cells over the full range further comprises discharging the first group of selected cells by means of the cell control units to a state-of-charge level corresponding to the state-of-charge level of the second group of non-selected cells. | 2,800 |
11,388 | 11,388 | 15,170,532 | 2,895 | The present disclosure relates to a method for mechanically separating layers, in particular in a double layer transfer process. The present disclosure relates more in particular to a method for mechanically separating layers, comprising the steps of providing a semiconductor compound comprising a layer of a handle substrate and an active layer with a front main side and a back main side opposite the front main side, wherein the layer of the handle substrate is attached to the front main side of the active layer, then providing a layer of a carrier substrate onto the back main side of the active layer, and then initiating mechanical separation of the layer of the handle substrate, wherein the layer of the handle substrate and the layer of the carrier substrate are provided with a substantially symmetrical mechanical structure. | 1. A method for mechanically separating layers, comprising the steps of:
providing a first semiconductor compound comprising a layer of a handle substrate and an active layer with a front main side and a back main side opposite the front main side, wherein the layer of the handle substrate is attached to the front main side of the active layer; then providing a layer of a carrier substrate onto the back main side of the active layer; and then initiating mechanical separation of the layer of the handle substrate so as to obtain a second semiconductor compound comprising the layer of the carrier substrate at the back main side of the active layer; wherein the layer of the handle substrate and the layer of the carrier substrate are provided with a substantially symmetrical mechanical structure. 2. The method of claim 1, wherein the layer of the carrier substrate and/or the layer of the handle substrate are chosen such that their Et3 products are similar. 3. The method of claim 2, wherein the layer of the carrier substrate and/or the layer of the handle substrate are chosen such that their Et3 products are within about 20% or less. 4. The method of claim 2, wherein the layer of the carrier substrate is provided with a chamfered edge region. 5. The method of claim 4, wherein the carrier substrate is provided as a layer of a homogeneous high resistivity material. 6. The method of claim 5, wherein the homogeneous high resistivity material has a resistivity of at least 10 kΩ·cm. 7. The method of claim 4, wherein the layer of the carrier substrate is provided as a composite layer stack comprising:
a mechanical support layer; and at least one layer of a high resistivity material deposited on the mechanical support layer; and wherein an uppermost layer of the at least one layer of the high resistivity material is provided on the back main side of the active layer. 8. The method of claim 7, wherein the uppermost layer of high resistivity material is attached onto the back main side of the active layer 9. The method of claim 7, further comprising, before the step of initiating mechanical separation, a step of replicating the at least one layer of a high resistivity material onto the handle substrate. 10. The method of claim 9, wherein the step of replicating the at least one layer of the high resistivity material onto the handle substrate comprises replicating the at least one layer of the high resistivity material on a free side of the handle substrate opposite the active layer. 11. The method of claim 7, wherein the mechanical support layer is a single-crystal or poly-crystal Si wafer. 12. The method of claim 7, wherein a thickness of the high resistivity material deposited on the mechanical support layer is in the range of from 30 μm to 200 μm. 13. The method of claim 7, wherein the high resistivity material is a ceramic glue, a polymer or a material with a resistivity of at least 10 kΩ·cm. 14. The method of claim 1, further comprising, before the step of initiating mechanical separation, a step of thinning the layer of the handle substrate. 15. The method of claim 1, wherein the carrier substrate is provided with a chamfered edge region. 16. The method of claim 1, wherein the carrier substrate is provided as a layer of a homogeneous high resistivity material. 17. The method of claim 16, wherein the homogeneous high resistivity material has a resistivity of at least 10 kΩ·cm. 18. The method of claim 1, wherein the layer of the carrier substrate is provided as a composite layer stack comprising:
a mechanical support layer; and at least one layer of a high resistivity material deposited on the mechanical support layer; and wherein an uppermost layer of the at least one layer of the high resistivity material is provided on the back main side of the active layer. | The present disclosure relates to a method for mechanically separating layers, in particular in a double layer transfer process. The present disclosure relates more in particular to a method for mechanically separating layers, comprising the steps of providing a semiconductor compound comprising a layer of a handle substrate and an active layer with a front main side and a back main side opposite the front main side, wherein the layer of the handle substrate is attached to the front main side of the active layer, then providing a layer of a carrier substrate onto the back main side of the active layer, and then initiating mechanical separation of the layer of the handle substrate, wherein the layer of the handle substrate and the layer of the carrier substrate are provided with a substantially symmetrical mechanical structure.1. A method for mechanically separating layers, comprising the steps of:
providing a first semiconductor compound comprising a layer of a handle substrate and an active layer with a front main side and a back main side opposite the front main side, wherein the layer of the handle substrate is attached to the front main side of the active layer; then providing a layer of a carrier substrate onto the back main side of the active layer; and then initiating mechanical separation of the layer of the handle substrate so as to obtain a second semiconductor compound comprising the layer of the carrier substrate at the back main side of the active layer; wherein the layer of the handle substrate and the layer of the carrier substrate are provided with a substantially symmetrical mechanical structure. 2. The method of claim 1, wherein the layer of the carrier substrate and/or the layer of the handle substrate are chosen such that their Et3 products are similar. 3. The method of claim 2, wherein the layer of the carrier substrate and/or the layer of the handle substrate are chosen such that their Et3 products are within about 20% or less. 4. The method of claim 2, wherein the layer of the carrier substrate is provided with a chamfered edge region. 5. The method of claim 4, wherein the carrier substrate is provided as a layer of a homogeneous high resistivity material. 6. The method of claim 5, wherein the homogeneous high resistivity material has a resistivity of at least 10 kΩ·cm. 7. The method of claim 4, wherein the layer of the carrier substrate is provided as a composite layer stack comprising:
a mechanical support layer; and at least one layer of a high resistivity material deposited on the mechanical support layer; and wherein an uppermost layer of the at least one layer of the high resistivity material is provided on the back main side of the active layer. 8. The method of claim 7, wherein the uppermost layer of high resistivity material is attached onto the back main side of the active layer 9. The method of claim 7, further comprising, before the step of initiating mechanical separation, a step of replicating the at least one layer of a high resistivity material onto the handle substrate. 10. The method of claim 9, wherein the step of replicating the at least one layer of the high resistivity material onto the handle substrate comprises replicating the at least one layer of the high resistivity material on a free side of the handle substrate opposite the active layer. 11. The method of claim 7, wherein the mechanical support layer is a single-crystal or poly-crystal Si wafer. 12. The method of claim 7, wherein a thickness of the high resistivity material deposited on the mechanical support layer is in the range of from 30 μm to 200 μm. 13. The method of claim 7, wherein the high resistivity material is a ceramic glue, a polymer or a material with a resistivity of at least 10 kΩ·cm. 14. The method of claim 1, further comprising, before the step of initiating mechanical separation, a step of thinning the layer of the handle substrate. 15. The method of claim 1, wherein the carrier substrate is provided with a chamfered edge region. 16. The method of claim 1, wherein the carrier substrate is provided as a layer of a homogeneous high resistivity material. 17. The method of claim 16, wherein the homogeneous high resistivity material has a resistivity of at least 10 kΩ·cm. 18. The method of claim 1, wherein the layer of the carrier substrate is provided as a composite layer stack comprising:
a mechanical support layer; and at least one layer of a high resistivity material deposited on the mechanical support layer; and wherein an uppermost layer of the at least one layer of the high resistivity material is provided on the back main side of the active layer. | 2,800 |
11,389 | 11,389 | 14,727,714 | 2,851 | A finFET block architecture includes a first set of semiconductor fins having a first conductivity type, and a second set of semiconductor fins having a second conductivity type. An inter-block insulator is placed between outer fins of the first and second sets. A patterned gate conductor layer includes a first plurality of gate traces extending across the set of fins in the first block without crossing the inter-block insulator, and a second plurality of gate traces extending across the set of fins in the second block without crossing the inter-block insulator. Patterned conductor layers over the gate conductor layer are arranged in orthogonal layout patterns, and include an inter-block connector arranged to connect gate traces in the first and second blocks. | 1. A system for circuit design and implementation using a finFET block based cell from a cell library, comprising:
a cell placement and interconnect routing EDA tool configured to transform a logical circuit representation of a D-flip flop into a physical circuit representation by placing finFET cells from the finFET block based cell library and routing electrical interconnects directly connected to the finFET cells. 2. The system of claim 1, wherein the finFET cells include sets of semiconductor fins of finFET transistors. 3. The system of claim 2, wherein the sets of semiconductor fins of finFET transistors include:
a first set of parallel fins sharing a first conductivity type; and a second set of parallel fins sharing a second conductivity type opposite to the first conductivity type, and the system further comprises an inter-block insulator between the first set of parallel fins and the second set of parallel fins. 4. The system of claim 3, wherein the electrical interconnects include a first set of conductive traces positioned at a first interconnect level and a second set of conductive traces positioned at a second interconnect level, a first set of conductive traces and the second set of conductive traces orthogonal to each other, the first interconnect level and the second interconnect level positioned at different distances above the fins of the finFET transistors. 5. The system of claim 4, wherein the first set of conductive interconnects is positioned over and electrically coupled to (i) conductive gate traces over gate parts of the fins and (ii) source/drain parts of the fins in between the gate parts of the fins, and
wherein the second set of conductive interconnects is positioned over and electrically coupled to the first set of conductive interconnects. 6. The system of claim 1, wherein the D-flip flop includes five stages, an output of a preceding stage electrically coupled to an input of a following stage, including:
a first stage including a first plurality of series coupled transistors; a second stage including a first latch; a third stage including a second plurality of series coupled transistors; a fourth stage including a second latch; and a fifth stage including a first D-flip flop output and a second D-flip flop output that are logical complements of each other. 8. The system of claim 4, wherein the D-flip flop includes five stages, an output of a preceding stage electrically coupled to an input of a following stage, including:
a first stage including a first plurality of series coupled transistors; a second stage including a first latch; a third stage including a second plurality of series coupled transistors; a fourth stage including a second latch; and a fifth stage including a first D-flip flop output and a second D-flip flop output that are logical complements of each other, wherein the first set of conductive traces includes, for each of the first stage and the third stage: a first conductive trace coupling a first source/drain part of the first set of parallel fins to a first power bus; a second conductive trace coupling a first source/drain part of the second set of parallel fins to a second power bus; and a third conductive trace coupling a first gate part of the first set of parallel fins and a first gate part of the second set of parallel fins to each other, and wherein the first set of conductive traces includes, for each of the second stage and the fourth stage: a first conductive trace coupling a first gate part of the first set of parallel fins and a first gate part of the second set of parallel fins to each other; a second conductive trace coupling a second gate part of the first set of parallel fins and a second gate part of the second set of parallel fins to each other; a third conductive trace coupling a first source/drain part of the first set of parallel fins to a first power bus; a fourth conductive trace coupling a first source/drain part of the second set of parallel fins to a second power bus; a fifth conductive trace coupling a second source/drain part of the first set of parallel fins to a second source/drain part of the second set of parallel fins; and a sixth conductive trace coupling a third source/drain part of the first set of parallel fins to a third source/drain part of the second set of parallel fins. 9. The system of claim 5, wherein at least two of the first set of conductive interconnects is positioned over and electrically coupled to a same one of the source/drain parts of the fins in between the gate parts of the fins, and the at least two being electrically insulated from each other. 10. The system of claim 5, wherein every one of the first set of conductive interconnects is positioned over and electrically coupled to a different one of the source/drain parts of the fins in between the gate parts of the fins. 11. A data processing system for circuit design and implementation using a finFET block based cell from a cell library, comprising:
a data processor and memory coupled to the data processor, the memory storing instructions executable by the data processor, including instructions for a cell placement and interconnect routing EDA tool configured to transform a logical circuit representation of a D-flip flop into a physical circuit representation by placing finFET cells from the finFET block based cell library and routing electrical interconnects directly connected to the finFET cells. 12. An article of manufacture, comprising:
a memory for circuit design and implementation using a finFET block based cell from a cell library, the memory storing instructions executable by the data processor, including instructions for a cell placement and interconnect routing EDA tool configured to transform a logical circuit representation of a D-flip flop into a physical circuit representation by placing finFET cells from the finFET block based cell library and routing electrical interconnects directly connected to the finFET cells. | A finFET block architecture includes a first set of semiconductor fins having a first conductivity type, and a second set of semiconductor fins having a second conductivity type. An inter-block insulator is placed between outer fins of the first and second sets. A patterned gate conductor layer includes a first plurality of gate traces extending across the set of fins in the first block without crossing the inter-block insulator, and a second plurality of gate traces extending across the set of fins in the second block without crossing the inter-block insulator. Patterned conductor layers over the gate conductor layer are arranged in orthogonal layout patterns, and include an inter-block connector arranged to connect gate traces in the first and second blocks.1. A system for circuit design and implementation using a finFET block based cell from a cell library, comprising:
a cell placement and interconnect routing EDA tool configured to transform a logical circuit representation of a D-flip flop into a physical circuit representation by placing finFET cells from the finFET block based cell library and routing electrical interconnects directly connected to the finFET cells. 2. The system of claim 1, wherein the finFET cells include sets of semiconductor fins of finFET transistors. 3. The system of claim 2, wherein the sets of semiconductor fins of finFET transistors include:
a first set of parallel fins sharing a first conductivity type; and a second set of parallel fins sharing a second conductivity type opposite to the first conductivity type, and the system further comprises an inter-block insulator between the first set of parallel fins and the second set of parallel fins. 4. The system of claim 3, wherein the electrical interconnects include a first set of conductive traces positioned at a first interconnect level and a second set of conductive traces positioned at a second interconnect level, a first set of conductive traces and the second set of conductive traces orthogonal to each other, the first interconnect level and the second interconnect level positioned at different distances above the fins of the finFET transistors. 5. The system of claim 4, wherein the first set of conductive interconnects is positioned over and electrically coupled to (i) conductive gate traces over gate parts of the fins and (ii) source/drain parts of the fins in between the gate parts of the fins, and
wherein the second set of conductive interconnects is positioned over and electrically coupled to the first set of conductive interconnects. 6. The system of claim 1, wherein the D-flip flop includes five stages, an output of a preceding stage electrically coupled to an input of a following stage, including:
a first stage including a first plurality of series coupled transistors; a second stage including a first latch; a third stage including a second plurality of series coupled transistors; a fourth stage including a second latch; and a fifth stage including a first D-flip flop output and a second D-flip flop output that are logical complements of each other. 8. The system of claim 4, wherein the D-flip flop includes five stages, an output of a preceding stage electrically coupled to an input of a following stage, including:
a first stage including a first plurality of series coupled transistors; a second stage including a first latch; a third stage including a second plurality of series coupled transistors; a fourth stage including a second latch; and a fifth stage including a first D-flip flop output and a second D-flip flop output that are logical complements of each other, wherein the first set of conductive traces includes, for each of the first stage and the third stage: a first conductive trace coupling a first source/drain part of the first set of parallel fins to a first power bus; a second conductive trace coupling a first source/drain part of the second set of parallel fins to a second power bus; and a third conductive trace coupling a first gate part of the first set of parallel fins and a first gate part of the second set of parallel fins to each other, and wherein the first set of conductive traces includes, for each of the second stage and the fourth stage: a first conductive trace coupling a first gate part of the first set of parallel fins and a first gate part of the second set of parallel fins to each other; a second conductive trace coupling a second gate part of the first set of parallel fins and a second gate part of the second set of parallel fins to each other; a third conductive trace coupling a first source/drain part of the first set of parallel fins to a first power bus; a fourth conductive trace coupling a first source/drain part of the second set of parallel fins to a second power bus; a fifth conductive trace coupling a second source/drain part of the first set of parallel fins to a second source/drain part of the second set of parallel fins; and a sixth conductive trace coupling a third source/drain part of the first set of parallel fins to a third source/drain part of the second set of parallel fins. 9. The system of claim 5, wherein at least two of the first set of conductive interconnects is positioned over and electrically coupled to a same one of the source/drain parts of the fins in between the gate parts of the fins, and the at least two being electrically insulated from each other. 10. The system of claim 5, wherein every one of the first set of conductive interconnects is positioned over and electrically coupled to a different one of the source/drain parts of the fins in between the gate parts of the fins. 11. A data processing system for circuit design and implementation using a finFET block based cell from a cell library, comprising:
a data processor and memory coupled to the data processor, the memory storing instructions executable by the data processor, including instructions for a cell placement and interconnect routing EDA tool configured to transform a logical circuit representation of a D-flip flop into a physical circuit representation by placing finFET cells from the finFET block based cell library and routing electrical interconnects directly connected to the finFET cells. 12. An article of manufacture, comprising:
a memory for circuit design and implementation using a finFET block based cell from a cell library, the memory storing instructions executable by the data processor, including instructions for a cell placement and interconnect routing EDA tool configured to transform a logical circuit representation of a D-flip flop into a physical circuit representation by placing finFET cells from the finFET block based cell library and routing electrical interconnects directly connected to the finFET cells. | 2,800 |
11,390 | 11,390 | 15,628,117 | 2,844 | Linear control of RGB LED for generating ambient lighting with variable color is accomplished by using multiple linear regulators to vary LED intensity via analog dimming. Each regulator controls current through a given color LED which in turn varies the LED intensity. Given the wavelength shift of LEDs at various drive currents and perceived intensity difference to the human eye, for different colors, the current regulator response may be non-linear and unique depending upon the desired color. Further, the linear drive current regulation can be accomplished using voltage mode or current mode control. The device, system and methodology, each using RGB LEDs, can reproduce any color on the Cartesian Color Coordinate system. | 1. A linear control device for color rendering of an RGB LED comprising:
an RGB LED that emits light; and multiple linear regulators to vary intensity of the light emitted by the RGB LED via analog dimming; wherein each linear regulator controls current through the RGB LED to enable varying the light intensity of the RGB LED such that the color of light emitted is controlled. 2. The linear control device of claim 1 wherein the linear drive current regulation is accomplished using a voltage mode control. 3. The linear control device of claim 1 wherein the linear drive current regulation is accomplished using a current mode control. 4. The linear control device of claim 1 further comprising a microprocessor that generates a control signal wherein the signal is pre-programmed to fit a unique non-linear curve required for the color intensity needed to reproduce a desired CIELUV coordinate location for the RGB LED. 5. A linear control system for color rendering of a plurality of RGB LEDs comprising:
a plurality of RGB LEDs, each RGB LED being functionally adapted to emit light; and multiple linear regulators to vary intensity of the light emitted by the plurality of RGB LEDs via analog dimming; wherein each linear regulator controls current through the plurality of RGB LEDs to enable varying the light intensity of the RGB LEDs such that the color of light emitted is controlled. 6. The linear control system of claim 5 wherein the linear drive current regulation is accomplished using a voltage mode control. 7. The linear control system of claim 5 wherein the linear drive current regulation is accomplished using a current mode control. 8. The linear control system of claim 5 further comprising a microprocessor that generates a control signal wherein the signal is pre-programmed to fit a unique non-linear curve required for the color intensity needed to reproduce a desired CIELUV coordinate location for the plurality of RGB LEDs. 9. A method for color rendering of a plurality of RGB LEDs via linear control comprising the steps of:
providing a plurality of RGB LEDs, each RGB LED being functionally adapted to emit light; and providing multiple linear regulators to vary intensity of the light emitted by the plurality of RGB LEDs via analog dimming; wherein each linear regulator controls current through the plurality of RGB LEDs to enable varying the light intensity of the RGB LEDs such that the color of light emitted is controlled. 10. The linear control method of claim 9 wherein the linear drive current regulation step is accomplished using a voltage mode control. 11. The linear control method of claim 9 wherein the linear drive current regulation step is accomplished using a current mode control. 12. The linear control method of claim 9 further comprising the step of providing a microprocessor that generates a control signal wherein the signal is pre-programmed to fit a unique non-linear curve required for the color intensity needed to reproduce a desired CIELUV coordinate location for the plurality of RGB LEDs. | Linear control of RGB LED for generating ambient lighting with variable color is accomplished by using multiple linear regulators to vary LED intensity via analog dimming. Each regulator controls current through a given color LED which in turn varies the LED intensity. Given the wavelength shift of LEDs at various drive currents and perceived intensity difference to the human eye, for different colors, the current regulator response may be non-linear and unique depending upon the desired color. Further, the linear drive current regulation can be accomplished using voltage mode or current mode control. The device, system and methodology, each using RGB LEDs, can reproduce any color on the Cartesian Color Coordinate system.1. A linear control device for color rendering of an RGB LED comprising:
an RGB LED that emits light; and multiple linear regulators to vary intensity of the light emitted by the RGB LED via analog dimming; wherein each linear regulator controls current through the RGB LED to enable varying the light intensity of the RGB LED such that the color of light emitted is controlled. 2. The linear control device of claim 1 wherein the linear drive current regulation is accomplished using a voltage mode control. 3. The linear control device of claim 1 wherein the linear drive current regulation is accomplished using a current mode control. 4. The linear control device of claim 1 further comprising a microprocessor that generates a control signal wherein the signal is pre-programmed to fit a unique non-linear curve required for the color intensity needed to reproduce a desired CIELUV coordinate location for the RGB LED. 5. A linear control system for color rendering of a plurality of RGB LEDs comprising:
a plurality of RGB LEDs, each RGB LED being functionally adapted to emit light; and multiple linear regulators to vary intensity of the light emitted by the plurality of RGB LEDs via analog dimming; wherein each linear regulator controls current through the plurality of RGB LEDs to enable varying the light intensity of the RGB LEDs such that the color of light emitted is controlled. 6. The linear control system of claim 5 wherein the linear drive current regulation is accomplished using a voltage mode control. 7. The linear control system of claim 5 wherein the linear drive current regulation is accomplished using a current mode control. 8. The linear control system of claim 5 further comprising a microprocessor that generates a control signal wherein the signal is pre-programmed to fit a unique non-linear curve required for the color intensity needed to reproduce a desired CIELUV coordinate location for the plurality of RGB LEDs. 9. A method for color rendering of a plurality of RGB LEDs via linear control comprising the steps of:
providing a plurality of RGB LEDs, each RGB LED being functionally adapted to emit light; and providing multiple linear regulators to vary intensity of the light emitted by the plurality of RGB LEDs via analog dimming; wherein each linear regulator controls current through the plurality of RGB LEDs to enable varying the light intensity of the RGB LEDs such that the color of light emitted is controlled. 10. The linear control method of claim 9 wherein the linear drive current regulation step is accomplished using a voltage mode control. 11. The linear control method of claim 9 wherein the linear drive current regulation step is accomplished using a current mode control. 12. The linear control method of claim 9 further comprising the step of providing a microprocessor that generates a control signal wherein the signal is pre-programmed to fit a unique non-linear curve required for the color intensity needed to reproduce a desired CIELUV coordinate location for the plurality of RGB LEDs. | 2,800 |
11,391 | 11,391 | 15,554,251 | 2,847 | A flexible multilayer substrate for attaching a light emitting semiconductor device includes a first dielectric layer, a circuit layer on the first dielectric layer; a first thermally conductive layer on the circuit layer; a discontinuous metal support layer having a plurality of openings therethrough disposed on the first thermally conductive layer, and a second thermally conductive layer on the support layer. The flexible multilayer substrate further includes a plurality of conductive vias extending through the first dielectric layer such that the circuit layer is in communication with the plurality of conductive vias. The first and second thermally conductive layers are in contact within said openings. | 1. A flexible multilayer substrate for attaching a light emitting semiconductor device comprising:
a first dielectric layer having a first side and a second side; a plurality of conductive vias extending from the first side to the second side of the first dielectric layer; a circuit layer disposed on the second side of the first dielectric layer in communication with the plurality of conductive vias; a first thermally conductive layer disposed on the circuit layer opposite the first dielectric layer; a discontinuous metal support layer disposed on the first thermally conductive layer opposite the circuit layer, wherein the discontinuous metal support layer is electrically continuous and includes an array of openings extending through the discontinuous metal support layer; and a second thermally conductive layer disposed on the support layer opposite the first thermally conductive layer, wherein the second thermally conductive layer is in contact with the first thermally conductive layer in the openings through the discontinuous metal support layer. 2. The flexible multilayer substrate of claim 1, wherein the vias are filled with plated copper to form a via plug wherein the via plug has a domed surface that extends above the first surface of the first dielectric layer. 3. The flexible multilayer substrate of claim 1, wherein the first thermally conductive layer comprises a thermally conductive filler disposed in a binder. 4. The flexible multilayer substrate of claim 1, wherein the first thermally conductive layer is a thermal bonding, thermally conductive adhesive. 5. The flexible multilayer substrate of claim 1, wherein the first thermally conductive layer and the second thermally conductive layer have the same composition. 6. The flexible multilayer substrate of claim 2, wherein the light emitting semiconductor device is attached flexible multilayer substrate adjacent to the first side of the first dielectric layer. 7. The flexible multilayer substrate of claim 2, wherein the light emitting semiconductor device includes a plurality of contacts on a bottom side of the light emitting semiconductor device wherein each of the plurality of contacts is directly bonded to a domed surface of a conductive via plug disposed in the via through the first dielectric layer. 8. The flexible multilayer substrate of claim 1, wherein the discontinuous metal support layer is selected from one of a perforated metal foil and a metal mesh that serves as an intermediate heat spreader. 9. The flexible multilayer substrate of claim 1, wherein the first thermally conductive layer and the thermally conductive layer are the same material and there is no thermal interface between the first thermally conductive layer and the thermally conductive layer within openings in the support layer. 10. A flexible multilayer substrate for attaching a light emitting semiconductor device comprising:
a flexible circuit structure having a first dielectric layer having a first side and a second side, a plurality of conductive vias extending from the first side to the second side of the first dielectric layer, and a circuit layer disposed on the second side of the first dielectric layer; and an isolation structure configured to protect the circuit layer and attach the flexible circuit structure to an auxiliary substrate, wherein the isolation structure comprises a first thermally conductive layer, a discontinuous metal support layer disposed on the first thermally conductive layer opposite the circuit layer, wherein the discontinuous metal support layer is electrically continuous and includes an array of openings extending through the discontinuous metal support layer; and a second thermally conductive layer disposed on the support layer opposite the first thermally conductive layer, wherein the second thermally conductive layer is in contact with the first thermally conductive layer in the openings through the discontinuous metal support layer. | A flexible multilayer substrate for attaching a light emitting semiconductor device includes a first dielectric layer, a circuit layer on the first dielectric layer; a first thermally conductive layer on the circuit layer; a discontinuous metal support layer having a plurality of openings therethrough disposed on the first thermally conductive layer, and a second thermally conductive layer on the support layer. The flexible multilayer substrate further includes a plurality of conductive vias extending through the first dielectric layer such that the circuit layer is in communication with the plurality of conductive vias. The first and second thermally conductive layers are in contact within said openings.1. A flexible multilayer substrate for attaching a light emitting semiconductor device comprising:
a first dielectric layer having a first side and a second side; a plurality of conductive vias extending from the first side to the second side of the first dielectric layer; a circuit layer disposed on the second side of the first dielectric layer in communication with the plurality of conductive vias; a first thermally conductive layer disposed on the circuit layer opposite the first dielectric layer; a discontinuous metal support layer disposed on the first thermally conductive layer opposite the circuit layer, wherein the discontinuous metal support layer is electrically continuous and includes an array of openings extending through the discontinuous metal support layer; and a second thermally conductive layer disposed on the support layer opposite the first thermally conductive layer, wherein the second thermally conductive layer is in contact with the first thermally conductive layer in the openings through the discontinuous metal support layer. 2. The flexible multilayer substrate of claim 1, wherein the vias are filled with plated copper to form a via plug wherein the via plug has a domed surface that extends above the first surface of the first dielectric layer. 3. The flexible multilayer substrate of claim 1, wherein the first thermally conductive layer comprises a thermally conductive filler disposed in a binder. 4. The flexible multilayer substrate of claim 1, wherein the first thermally conductive layer is a thermal bonding, thermally conductive adhesive. 5. The flexible multilayer substrate of claim 1, wherein the first thermally conductive layer and the second thermally conductive layer have the same composition. 6. The flexible multilayer substrate of claim 2, wherein the light emitting semiconductor device is attached flexible multilayer substrate adjacent to the first side of the first dielectric layer. 7. The flexible multilayer substrate of claim 2, wherein the light emitting semiconductor device includes a plurality of contacts on a bottom side of the light emitting semiconductor device wherein each of the plurality of contacts is directly bonded to a domed surface of a conductive via plug disposed in the via through the first dielectric layer. 8. The flexible multilayer substrate of claim 1, wherein the discontinuous metal support layer is selected from one of a perforated metal foil and a metal mesh that serves as an intermediate heat spreader. 9. The flexible multilayer substrate of claim 1, wherein the first thermally conductive layer and the thermally conductive layer are the same material and there is no thermal interface between the first thermally conductive layer and the thermally conductive layer within openings in the support layer. 10. A flexible multilayer substrate for attaching a light emitting semiconductor device comprising:
a flexible circuit structure having a first dielectric layer having a first side and a second side, a plurality of conductive vias extending from the first side to the second side of the first dielectric layer, and a circuit layer disposed on the second side of the first dielectric layer; and an isolation structure configured to protect the circuit layer and attach the flexible circuit structure to an auxiliary substrate, wherein the isolation structure comprises a first thermally conductive layer, a discontinuous metal support layer disposed on the first thermally conductive layer opposite the circuit layer, wherein the discontinuous metal support layer is electrically continuous and includes an array of openings extending through the discontinuous metal support layer; and a second thermally conductive layer disposed on the support layer opposite the first thermally conductive layer, wherein the second thermally conductive layer is in contact with the first thermally conductive layer in the openings through the discontinuous metal support layer. | 2,800 |
11,392 | 11,392 | 14,146,969 | 2,836 | An inductive power supply including multiple tank circuits and a controller for selecting at least one of the tank circuits in order to wirelessly transfer power based on received power demand information. In addition, a magnet may be used to align multiple remote devices with the inductive power supply. In one embodiment, different communication systems are employed depending on which coil is being used to transfer wireless power. | 1. An inductive power supply for supplying wireless power to a remote device including power demand information, said inductive power supply comprising:
a plurality of tank circuits, wherein each tank circuit includes a primary and a capacitor electrically connected in series, wherein each of said plurality of tank circuits are capable of being energized to transfer power wirelessly to the remote device; a receiver for receiving power demand information from the remote device; and a controller in electrical communication with said receiver and said plurality of tank circuits, said controller programmed to select at least one of said plurality of tank circuits to transfer power wirelessly to the remote device, wherein said selection is determined as a function of said power demand information received from the remote device. 2. The inductive power supply of claim 1 wherein said plurality of tank circuits includes a tank circuit with a low power primary coil, a tank circuit with a medium power primary coil, and a tank circuit with a high power primary coil. 3. The inductive power supply of claim 1 wherein said primary of each of said plurality of tank circuits is a different gauge. 4. The inductive power supply of claim 1 wherein said receiver includes at least one of a wireless communication system, at least one of said tank circuits, or any combination thereof. 5. The inductive power supply of claim 1 including a coil selector circuit for selectively energizing one or more of said plurality of tank circuits. 6. The inductive power supply of claim 1 wherein said power demand information includes a remote device ID, wherein said inductive power supply includes a memory, wherein said memory includes a look-up table, said look-up table maps remote device IDs to at least one of said plurality of primaries. 7. An inductive power supply for supplying wireless power to a remote device including power demand information, said inductive power supply comprising:
a first tank circuit including a plurality of primaries, wherein each of said plurality of primaries is capable of being energized to transfer power wirelessly to the remote device; a receiver for receiving power demand information from the remote device, wherein said power demand information includes a power adjustment; and a controller in electrical communication with said receiver and said tank circuit, said controller programmed to select at least one of said plurality of primaries of said tank circuit to transfer power wirelessly to the remote device, wherein said selection is determined as a function of said power adjustment received from the remote device. 8. The inductive power supply of claim 7 including a second tank circuit and a third tank circuit, each including a plurality of primaries, wherein each of said plurality of primaries of said first and second tank circuits are capable of being energized to transfer power wirelessly to the remote device, wherein said first tank circuit includes a low power primary coil, said second tank circuit includes a medium power primary coil, and said third tank circuit includes a high power primary coil. 9. The inductive power supply of claim 8 wherein said first, second, and third tank circuits are driven with a half bridge driver. 10. The inductive power supply of claim 7 wherein said receiver includes at least one of a wireless communication system, at least one of said primaries, or any combination thereof. 11. The inductive power supply of claim 7 wherein said tank circuit includes a coil selector circuit for selectively energizing one or more of the plurality of primaries. 12. The inductive power supply of claim 7 wherein said controller is programmed to determine an amount of power to be transmitted as a function of said power adjustment received from said remote device. 13. The inductive power supply of claim 12 including a memory, wherein said memory includes a threshold, said controller is programmed to select one of said plurality of primaries in response to said amount of power to be transmitted being below said threshold, and said controller is programmed to select a different one of said plurality of primaries in response to said amount of power to be transmitted being above said threshold. 14. The inductive power supply of claim 13 wherein said power demand information includes at least one of a minimum power level threshold, a maximum power level threshold, or a combination thereof. 15. The inductive power supply of claim 14 wherein said controller adjusts said threshold as a function of said at least one of said minimum power level threshold, said maximum power level threshold, or said combination thereof. 16. The inductive power supply of claim 7 wherein said remote device includes a standby mode where it demands a lower amount of power, said power demand information includes an indication that said remote device is in standby mode, and said controller selection is based at least in part on whether said remote device is in said standby mode. 17. An inductive power supply for supplying wireless power to a first remote device or a second remote device, said inductive power supply comprising:
a tank circuit including a first primary coil and a second primary coil, wherein said first primary coil and said second primary coil are arranged concentrically, wherein each of said first primary coil and said second primary coil are capable of being energizing to transfer power wirelessly; a magnet arranged coaxially with said first primary coil and said second primary coil, wherein said magnet provides a magnetic force to assist in alignment, wherein said magnetic force of said magnet assists in aligning the first remote device with said first primary coil and wherein said magnetic force of said magnet assists in aligning the second remote device with said second primary coil. 18. The inductive power supply of claim 17 for supplying wireless power to at least one of a first remote device, a second remote device, and a third remote device:
wherein said tank circuit includes a third primary coil, wherein said third primary coil is arranged concentrically with said first and said second primary coils, wherein said third primary coil is capable of being energized to transfer power wirelessly; and
wherein said magnet is arranged coaxially with said first primary coil, said second primary coil, and said third primary coil, wherein said magnetic force of said magnet assists in aligning the third remote device with the third primary coil. | An inductive power supply including multiple tank circuits and a controller for selecting at least one of the tank circuits in order to wirelessly transfer power based on received power demand information. In addition, a magnet may be used to align multiple remote devices with the inductive power supply. In one embodiment, different communication systems are employed depending on which coil is being used to transfer wireless power.1. An inductive power supply for supplying wireless power to a remote device including power demand information, said inductive power supply comprising:
a plurality of tank circuits, wherein each tank circuit includes a primary and a capacitor electrically connected in series, wherein each of said plurality of tank circuits are capable of being energized to transfer power wirelessly to the remote device; a receiver for receiving power demand information from the remote device; and a controller in electrical communication with said receiver and said plurality of tank circuits, said controller programmed to select at least one of said plurality of tank circuits to transfer power wirelessly to the remote device, wherein said selection is determined as a function of said power demand information received from the remote device. 2. The inductive power supply of claim 1 wherein said plurality of tank circuits includes a tank circuit with a low power primary coil, a tank circuit with a medium power primary coil, and a tank circuit with a high power primary coil. 3. The inductive power supply of claim 1 wherein said primary of each of said plurality of tank circuits is a different gauge. 4. The inductive power supply of claim 1 wherein said receiver includes at least one of a wireless communication system, at least one of said tank circuits, or any combination thereof. 5. The inductive power supply of claim 1 including a coil selector circuit for selectively energizing one or more of said plurality of tank circuits. 6. The inductive power supply of claim 1 wherein said power demand information includes a remote device ID, wherein said inductive power supply includes a memory, wherein said memory includes a look-up table, said look-up table maps remote device IDs to at least one of said plurality of primaries. 7. An inductive power supply for supplying wireless power to a remote device including power demand information, said inductive power supply comprising:
a first tank circuit including a plurality of primaries, wherein each of said plurality of primaries is capable of being energized to transfer power wirelessly to the remote device; a receiver for receiving power demand information from the remote device, wherein said power demand information includes a power adjustment; and a controller in electrical communication with said receiver and said tank circuit, said controller programmed to select at least one of said plurality of primaries of said tank circuit to transfer power wirelessly to the remote device, wherein said selection is determined as a function of said power adjustment received from the remote device. 8. The inductive power supply of claim 7 including a second tank circuit and a third tank circuit, each including a plurality of primaries, wherein each of said plurality of primaries of said first and second tank circuits are capable of being energized to transfer power wirelessly to the remote device, wherein said first tank circuit includes a low power primary coil, said second tank circuit includes a medium power primary coil, and said third tank circuit includes a high power primary coil. 9. The inductive power supply of claim 8 wherein said first, second, and third tank circuits are driven with a half bridge driver. 10. The inductive power supply of claim 7 wherein said receiver includes at least one of a wireless communication system, at least one of said primaries, or any combination thereof. 11. The inductive power supply of claim 7 wherein said tank circuit includes a coil selector circuit for selectively energizing one or more of the plurality of primaries. 12. The inductive power supply of claim 7 wherein said controller is programmed to determine an amount of power to be transmitted as a function of said power adjustment received from said remote device. 13. The inductive power supply of claim 12 including a memory, wherein said memory includes a threshold, said controller is programmed to select one of said plurality of primaries in response to said amount of power to be transmitted being below said threshold, and said controller is programmed to select a different one of said plurality of primaries in response to said amount of power to be transmitted being above said threshold. 14. The inductive power supply of claim 13 wherein said power demand information includes at least one of a minimum power level threshold, a maximum power level threshold, or a combination thereof. 15. The inductive power supply of claim 14 wherein said controller adjusts said threshold as a function of said at least one of said minimum power level threshold, said maximum power level threshold, or said combination thereof. 16. The inductive power supply of claim 7 wherein said remote device includes a standby mode where it demands a lower amount of power, said power demand information includes an indication that said remote device is in standby mode, and said controller selection is based at least in part on whether said remote device is in said standby mode. 17. An inductive power supply for supplying wireless power to a first remote device or a second remote device, said inductive power supply comprising:
a tank circuit including a first primary coil and a second primary coil, wherein said first primary coil and said second primary coil are arranged concentrically, wherein each of said first primary coil and said second primary coil are capable of being energizing to transfer power wirelessly; a magnet arranged coaxially with said first primary coil and said second primary coil, wherein said magnet provides a magnetic force to assist in alignment, wherein said magnetic force of said magnet assists in aligning the first remote device with said first primary coil and wherein said magnetic force of said magnet assists in aligning the second remote device with said second primary coil. 18. The inductive power supply of claim 17 for supplying wireless power to at least one of a first remote device, a second remote device, and a third remote device:
wherein said tank circuit includes a third primary coil, wherein said third primary coil is arranged concentrically with said first and said second primary coils, wherein said third primary coil is capable of being energized to transfer power wirelessly; and
wherein said magnet is arranged coaxially with said first primary coil, said second primary coil, and said third primary coil, wherein said magnetic force of said magnet assists in aligning the third remote device with the third primary coil. | 2,800 |
11,393 | 11,393 | 14,811,127 | 2,883 | An optical fiber includes an integrated detector in the form of phosphors that emit light of a characteristic frequency or wavelength in response to leakage, through the fiber cladding, of light having an interrogation wavelength λ 1. Stimulation of phosphor emission by the interrogation light is indicative of aging or wear on the layers surrounding the cladding, and therefore can be used to assess the risk of imminent breakage of the fiber. | 1. An optical fiber having a core, at least one cladding layer, and at least one buffer layer, comprising:
a built-in damage or wear detector in the form of phosphors that emit light of a characteristic emission wavelength λ2 in response to leakage of light having an interrogation wavelength λ1 and/or a characteristic pattern or signature from the core through the at least one cladding layer, wherein stimulation of phosphor emission by the light of interrogation wavelength λ1 and/or a characteristic pattern or signature is indicative of aging or wear on layers surrounding the at least one cladding layer, and therefore of the risk of imminent breakage of the fiber. 2. An optical fiber as claimed in claim 1, wherein characteristic emission wavelength λ2 is a visible wavelength, enabling detection of the presence of excess leakage radiation by an operator without the need for detection electronics. 3. An optical fiber as claimed in claim 1, wherein characteristic emission wavelength λ2 is detectable by a sensor and detection electronics. 4. An optical fiber as claimed in claim 1, wherein said phosphor includes multiple different phosphors having different characteristic emission wavelengths. 5. An optical fiber as claimed in claim 1, wherein the phosphors are provided as part of a separate coating surrounding the at least one cladding layer. 6. An optical fiber as claimed in claim 1, wherein the phosphors are incorporated into a material of said at least one buffer layer. 7. A method of making an optical fiber having an integrated wear or damage detector, comprising the steps of (a) applying a phosphor coating to a cladding or buffer layer of the optical fiber, and/or (b) incorporating phosphors into the buffer layer or layers surrounding the cladding layer, the applied or incorporated phosphors emitting light of a characteristic wavelength λ2 in response to leakage, through the fiber cladding, of light having an interrogation wavelength λ1 and/or a characteristic pattern or signature. 8. A method of assessing or detecting damage to layers or coatings of an optical fiber, and therefore of predicting a risk of imminent breakage, comprising the steps of:
introducing into the optical fiber light having an interrogation wavelength λ1; and detecting damage to the fiber by detecting emissions of wavelength λ2 that result from stimulation of phosphors applied to or incorporated into a cladding and/or buffer layer of the optical fiber when excess leakage of the interrogation beam occurs. 9. An optical fiber layer or coating damage-assessment or detection method as claimed in claim 8, wherein the step of detecting emissions of wavelength λ2 includes the step of visually observing the emissions without using a sensor or detection electronics. 10. An optical fiber layer or coating damage-assessment or detection method as claimed in claim 8, wherein the step of detecting emission of wavelength λ2 includes the step of detecting the emissions using a sensor and detection electronics. | An optical fiber includes an integrated detector in the form of phosphors that emit light of a characteristic frequency or wavelength in response to leakage, through the fiber cladding, of light having an interrogation wavelength λ 1. Stimulation of phosphor emission by the interrogation light is indicative of aging or wear on the layers surrounding the cladding, and therefore can be used to assess the risk of imminent breakage of the fiber.1. An optical fiber having a core, at least one cladding layer, and at least one buffer layer, comprising:
a built-in damage or wear detector in the form of phosphors that emit light of a characteristic emission wavelength λ2 in response to leakage of light having an interrogation wavelength λ1 and/or a characteristic pattern or signature from the core through the at least one cladding layer, wherein stimulation of phosphor emission by the light of interrogation wavelength λ1 and/or a characteristic pattern or signature is indicative of aging or wear on layers surrounding the at least one cladding layer, and therefore of the risk of imminent breakage of the fiber. 2. An optical fiber as claimed in claim 1, wherein characteristic emission wavelength λ2 is a visible wavelength, enabling detection of the presence of excess leakage radiation by an operator without the need for detection electronics. 3. An optical fiber as claimed in claim 1, wherein characteristic emission wavelength λ2 is detectable by a sensor and detection electronics. 4. An optical fiber as claimed in claim 1, wherein said phosphor includes multiple different phosphors having different characteristic emission wavelengths. 5. An optical fiber as claimed in claim 1, wherein the phosphors are provided as part of a separate coating surrounding the at least one cladding layer. 6. An optical fiber as claimed in claim 1, wherein the phosphors are incorporated into a material of said at least one buffer layer. 7. A method of making an optical fiber having an integrated wear or damage detector, comprising the steps of (a) applying a phosphor coating to a cladding or buffer layer of the optical fiber, and/or (b) incorporating phosphors into the buffer layer or layers surrounding the cladding layer, the applied or incorporated phosphors emitting light of a characteristic wavelength λ2 in response to leakage, through the fiber cladding, of light having an interrogation wavelength λ1 and/or a characteristic pattern or signature. 8. A method of assessing or detecting damage to layers or coatings of an optical fiber, and therefore of predicting a risk of imminent breakage, comprising the steps of:
introducing into the optical fiber light having an interrogation wavelength λ1; and detecting damage to the fiber by detecting emissions of wavelength λ2 that result from stimulation of phosphors applied to or incorporated into a cladding and/or buffer layer of the optical fiber when excess leakage of the interrogation beam occurs. 9. An optical fiber layer or coating damage-assessment or detection method as claimed in claim 8, wherein the step of detecting emissions of wavelength λ2 includes the step of visually observing the emissions without using a sensor or detection electronics. 10. An optical fiber layer or coating damage-assessment or detection method as claimed in claim 8, wherein the step of detecting emission of wavelength λ2 includes the step of detecting the emissions using a sensor and detection electronics. | 2,800 |
11,394 | 11,394 | 15,176,871 | 2,862 | Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, are described for: allocating a plurality of nodes; implementing a first pool of workers on the plurality of nodes, each node including one or more of the workers from the first pool; providing a set of instructions to the first pool of workers for performing a first task configured to interact with the computer system; employing the first pool of workers to perform the first task; and monitoring at least one performance metric associated with the computer system while the workers from the first pool are performing the first task. | 1. A method of testing a computer system, the method comprising:
performing by one or more computers:
implementing a first pool of workers on a plurality of nodes, each node comprising one or more of the workers from the first pool;
providing a set of instructions to the first pool of workers for performing a first task configured to interact with the computer system;
employing the first pool of workers to perform the first task; and
monitoring at least one performance metric associated with the computer system while the workers from the first pool are performing the first task. 2. The method of claim 1, wherein each node in the plurality of nodes comprises at least one of a virtual machine and a physical machine. 3. The method of claim 1, wherein the plurality of nodes reside on a plurality of data centers. 4. The method of claim 1, wherein each worker from the first pool resides on a separate node. 5. The method of claim 1, wherein at least two workers from the first pool reside on a single node. 6. The method of claim 1, wherein the plurality of nodes comprise at least one director node and at least one worker node. 7. The method of claim 1, wherein the first task comprises sending a request to the computer system. 8. The method of claim 7, wherein the request is selected from the group consisting of a hypertext transfer protocol (HTTP) request and message queue (MQ) request. 9. The method of claim 1, wherein, when performing the first task, each worker from the first pool sends a series of requests to the computer system at a specified rate. 10. The method of claim 1, wherein, when performing the first task, each worker from the first pool is configured to send a request to the computer system without waiting to receive a response from the computer system to a previous request. 11. The method of claim 1, wherein the at least one performance characteristic is selected from the group consisting of speed, latency, and combinations thereof. 12. The method of claim 1, further comprising providing the at least one performance metric to a client device of a user. 13. The method of claim 1, further comprising providing a worker module configured to act as an interface between the first pool of workers and the computer system. 14. The method of claim 1, further comprising:
implementing a second pool of workers on the plurality of nodes, each node comprising one or more workers from the second pool; providing a set of instructions to the second pool of workers for performing a second task configured to interact with the computer system; and employing the second pool of workers to perform the second task. 15. The method of claim 14, wherein the first task and the second task are performed in parallel. 16. A system comprising:
one or more computers programmed to perform operations comprising:
implementing a first pool of workers on a plurality of nodes, each node comprising one or more of the workers from the first pool;
providing a set of instructions to the first pool of workers for performing a first task configured to interact with the computer system;
employing the first pool of workers to perform the first task; and
monitoring at least one performance metric associated with the computer system while the workers from the first pool are performing the first task. 17. The system of claim 16, wherein each node in the plurality of nodes comprises at least one of a virtual machine and a physical machine. 18. The system of claim 16, wherein the plurality of nodes reside on a plurality of data centers. 19. The system of claim 16, wherein each worker from the first pool resides on a separate node. 20. The system of claim 16, wherein at least two workers from the first pool reside on a single node. 21. The system of claim 16, wherein the plurality of nodes comprise at least one director node and at least one worker node. 22. The system of claim 16, wherein the first task comprises sending a request to the computer system. 23. The system of claim 22, wherein the request is selected from the group consisting of a hypertext transfer protocol (HTTP) request and message queue (MQ) request. 24. The system of claim 16, wherein, when performing the first task, each worker from the first pool sends a series of requests to the computer system at a specified rate. 25. The system of claim 16, wherein, when performing the first task, each worker from the first pool is configured to send a request to the computer system without waiting to receive a response from the computer system to a previous request. 26. The system of claim 16, wherein the at least one performance characteristic is selected from the group consisting of speed, latency, and combinations thereof. 27. The system of claim 16, further comprising providing the at least one performance metric to a client device of a user. 28. The system of claim 16, further comprising providing a worker module configured to act as an interface between the first pool of workers and the computer system. 29. The system of claim 16, further comprising:
implementing a second pool of workers on the plurality of nodes, each node comprising one or more workers from the second pool; providing a set of instructions to the second pool of workers for performing a second task configured to interact with the computer system; and employing the second pool of workers to perform the second task. 30. A storage device having instructions stored thereon that when executed by one or more computers perform operations comprising:
implementing a first pool of workers on a plurality of nodes, each node comprising one or more of the workers from the first pool; providing a set of instructions to the first pool of workers for performing a first task configured to interact with the computer system; employing the first pool of workers to perform the first task; and monitoring at least one performance metric associated with the computer system while the workers from the first pool are performing the first task. | Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, are described for: allocating a plurality of nodes; implementing a first pool of workers on the plurality of nodes, each node including one or more of the workers from the first pool; providing a set of instructions to the first pool of workers for performing a first task configured to interact with the computer system; employing the first pool of workers to perform the first task; and monitoring at least one performance metric associated with the computer system while the workers from the first pool are performing the first task.1. A method of testing a computer system, the method comprising:
performing by one or more computers:
implementing a first pool of workers on a plurality of nodes, each node comprising one or more of the workers from the first pool;
providing a set of instructions to the first pool of workers for performing a first task configured to interact with the computer system;
employing the first pool of workers to perform the first task; and
monitoring at least one performance metric associated with the computer system while the workers from the first pool are performing the first task. 2. The method of claim 1, wherein each node in the plurality of nodes comprises at least one of a virtual machine and a physical machine. 3. The method of claim 1, wherein the plurality of nodes reside on a plurality of data centers. 4. The method of claim 1, wherein each worker from the first pool resides on a separate node. 5. The method of claim 1, wherein at least two workers from the first pool reside on a single node. 6. The method of claim 1, wherein the plurality of nodes comprise at least one director node and at least one worker node. 7. The method of claim 1, wherein the first task comprises sending a request to the computer system. 8. The method of claim 7, wherein the request is selected from the group consisting of a hypertext transfer protocol (HTTP) request and message queue (MQ) request. 9. The method of claim 1, wherein, when performing the first task, each worker from the first pool sends a series of requests to the computer system at a specified rate. 10. The method of claim 1, wherein, when performing the first task, each worker from the first pool is configured to send a request to the computer system without waiting to receive a response from the computer system to a previous request. 11. The method of claim 1, wherein the at least one performance characteristic is selected from the group consisting of speed, latency, and combinations thereof. 12. The method of claim 1, further comprising providing the at least one performance metric to a client device of a user. 13. The method of claim 1, further comprising providing a worker module configured to act as an interface between the first pool of workers and the computer system. 14. The method of claim 1, further comprising:
implementing a second pool of workers on the plurality of nodes, each node comprising one or more workers from the second pool; providing a set of instructions to the second pool of workers for performing a second task configured to interact with the computer system; and employing the second pool of workers to perform the second task. 15. The method of claim 14, wherein the first task and the second task are performed in parallel. 16. A system comprising:
one or more computers programmed to perform operations comprising:
implementing a first pool of workers on a plurality of nodes, each node comprising one or more of the workers from the first pool;
providing a set of instructions to the first pool of workers for performing a first task configured to interact with the computer system;
employing the first pool of workers to perform the first task; and
monitoring at least one performance metric associated with the computer system while the workers from the first pool are performing the first task. 17. The system of claim 16, wherein each node in the plurality of nodes comprises at least one of a virtual machine and a physical machine. 18. The system of claim 16, wherein the plurality of nodes reside on a plurality of data centers. 19. The system of claim 16, wherein each worker from the first pool resides on a separate node. 20. The system of claim 16, wherein at least two workers from the first pool reside on a single node. 21. The system of claim 16, wherein the plurality of nodes comprise at least one director node and at least one worker node. 22. The system of claim 16, wherein the first task comprises sending a request to the computer system. 23. The system of claim 22, wherein the request is selected from the group consisting of a hypertext transfer protocol (HTTP) request and message queue (MQ) request. 24. The system of claim 16, wherein, when performing the first task, each worker from the first pool sends a series of requests to the computer system at a specified rate. 25. The system of claim 16, wherein, when performing the first task, each worker from the first pool is configured to send a request to the computer system without waiting to receive a response from the computer system to a previous request. 26. The system of claim 16, wherein the at least one performance characteristic is selected from the group consisting of speed, latency, and combinations thereof. 27. The system of claim 16, further comprising providing the at least one performance metric to a client device of a user. 28. The system of claim 16, further comprising providing a worker module configured to act as an interface between the first pool of workers and the computer system. 29. The system of claim 16, further comprising:
implementing a second pool of workers on the plurality of nodes, each node comprising one or more workers from the second pool; providing a set of instructions to the second pool of workers for performing a second task configured to interact with the computer system; and employing the second pool of workers to perform the second task. 30. A storage device having instructions stored thereon that when executed by one or more computers perform operations comprising:
implementing a first pool of workers on a plurality of nodes, each node comprising one or more of the workers from the first pool; providing a set of instructions to the first pool of workers for performing a first task configured to interact with the computer system; employing the first pool of workers to perform the first task; and monitoring at least one performance metric associated with the computer system while the workers from the first pool are performing the first task. | 2,800 |
11,395 | 11,395 | 13,589,341 | 2,836 | A power distribution system includes: a master cell; a plurality of power cells, each power cell including a plurality of nodes capable of delivering power to a load; a maintenance cell configured to present at least one of (i) information to be forwarded to the plurality of power cells or (ii) information received from the plurality of power cells; and a communication bus for distribution of data between at least one of the master cell and one of the power cells or the power cells themselves. | 1. A power distribution system comprising:
a master cell; a plurality of power cells, each power cell including a plurality of nodes capable of delivering power to a load; a maintenance cell configured to present at least one of (i) information to be forwarded to the plurality of power cells or (ii) information received from the plurality of power cells; and a communication bus for distribution of data between at least one of the master cell and the power cells or the power cells themselves. 2. The power distribution system of claim 1, wherein at least one of the power cells monitors at least one environmental variable that can affect at least one of function or reliability of at least one of the master cell or the power cells. 3. The power distribution system of claim 2, wherein the at least one environmental variable is selected from the group consisting of: (i) primary system voltage, (ii) charge pump voltage, and (iii) temperature. 4. The power distribution system of claim 1, wherein the maintenance cell is attachable to the master cell. 5. The power distribution system of claim 1, wherein the maintenance cell provides at least one of a display and operator control buttons. 6. The power distribution system of claim 1, which includes a radio frequency (“RF”) transmitter and receiver enabling control of a plurality of nodes across the plurality of power cells. 7. The power distribution system of claim 1, wherein the RF receiver is attachable to the master cell. 7. (canceled) 8. A power distribution system comprising:
a master cell; a power cell including a plurality of nodes capable of delivering power to a load, the master cell controlling the power cell such that at a first time one of the power cell nodes is powering a first load and at a second time the power cell node is powering a second load; and a communication bus for distribution of information between the master cell and the power cell. 9. The power distribution system of claim 8, wherein the first load is an analog load and the second load is a digital load. 10. The power distribution system of claim 8, wherein the first load is a constant load and the second load is a modulated load. 11. The power distribution system of claim 8, wherein the power cell node is a first one of the plurality of nodes, and which includes a second one of the power cell nodes, the second power cell node powering a third load at the first time. 12. The power distribution system of claim 11, wherein the first load is an analog load and the third load is a digital load. 13. The power distribution system of claim 11, wherein the first load is a constant load and the third load is a modulated load. 14. A power distribution system comprising:
a programmable interface; and a power cell including a plurality of nodes capable of delivering power to a load, the programmable interface programming each of the nodes of the power cell, each of the nodes of the power cell including a MOSFET, such that the load for each cell can be analog, digital, constant or modulated. 15. The power distribution system of claim 11, wherein the programmable interface interfaces with the power cell via a master cell. 16. The power distribution system of claim 15, wherein the master cell enables the programmable interface to interface with a plurality of power cells. 17. The power distribution system of claim 15, wherein the programmable interface is configured to receive a manual input. 18. The power distribution system of claim 15, wherein the programmable interface is configured to receive a wireless input. 19. The power distribution system of claim 15, wherein the programmable interface is configured to receive a remote input. 20. The power distribution system of claim 15, wherein the programmable interface is removably coupled to the system. 21. The power distribution system of claim 1, wherein the power cell nodes are MOSFET nodes. | A power distribution system includes: a master cell; a plurality of power cells, each power cell including a plurality of nodes capable of delivering power to a load; a maintenance cell configured to present at least one of (i) information to be forwarded to the plurality of power cells or (ii) information received from the plurality of power cells; and a communication bus for distribution of data between at least one of the master cell and one of the power cells or the power cells themselves.1. A power distribution system comprising:
a master cell; a plurality of power cells, each power cell including a plurality of nodes capable of delivering power to a load; a maintenance cell configured to present at least one of (i) information to be forwarded to the plurality of power cells or (ii) information received from the plurality of power cells; and a communication bus for distribution of data between at least one of the master cell and the power cells or the power cells themselves. 2. The power distribution system of claim 1, wherein at least one of the power cells monitors at least one environmental variable that can affect at least one of function or reliability of at least one of the master cell or the power cells. 3. The power distribution system of claim 2, wherein the at least one environmental variable is selected from the group consisting of: (i) primary system voltage, (ii) charge pump voltage, and (iii) temperature. 4. The power distribution system of claim 1, wherein the maintenance cell is attachable to the master cell. 5. The power distribution system of claim 1, wherein the maintenance cell provides at least one of a display and operator control buttons. 6. The power distribution system of claim 1, which includes a radio frequency (“RF”) transmitter and receiver enabling control of a plurality of nodes across the plurality of power cells. 7. The power distribution system of claim 1, wherein the RF receiver is attachable to the master cell. 7. (canceled) 8. A power distribution system comprising:
a master cell; a power cell including a plurality of nodes capable of delivering power to a load, the master cell controlling the power cell such that at a first time one of the power cell nodes is powering a first load and at a second time the power cell node is powering a second load; and a communication bus for distribution of information between the master cell and the power cell. 9. The power distribution system of claim 8, wherein the first load is an analog load and the second load is a digital load. 10. The power distribution system of claim 8, wherein the first load is a constant load and the second load is a modulated load. 11. The power distribution system of claim 8, wherein the power cell node is a first one of the plurality of nodes, and which includes a second one of the power cell nodes, the second power cell node powering a third load at the first time. 12. The power distribution system of claim 11, wherein the first load is an analog load and the third load is a digital load. 13. The power distribution system of claim 11, wherein the first load is a constant load and the third load is a modulated load. 14. A power distribution system comprising:
a programmable interface; and a power cell including a plurality of nodes capable of delivering power to a load, the programmable interface programming each of the nodes of the power cell, each of the nodes of the power cell including a MOSFET, such that the load for each cell can be analog, digital, constant or modulated. 15. The power distribution system of claim 11, wherein the programmable interface interfaces with the power cell via a master cell. 16. The power distribution system of claim 15, wherein the master cell enables the programmable interface to interface with a plurality of power cells. 17. The power distribution system of claim 15, wherein the programmable interface is configured to receive a manual input. 18. The power distribution system of claim 15, wherein the programmable interface is configured to receive a wireless input. 19. The power distribution system of claim 15, wherein the programmable interface is configured to receive a remote input. 20. The power distribution system of claim 15, wherein the programmable interface is removably coupled to the system. 21. The power distribution system of claim 1, wherein the power cell nodes are MOSFET nodes. | 2,800 |
11,396 | 11,396 | 15,034,160 | 2,877 | The disclosure relates to logging sensor or tool including an electromagnetic radiation source operable to emit at least one wavelength of electromagnetic radiation, a detector operable to detect the wavelength of electromagnetic radiation, a polycrystalline transparent ceramic component transparent to the wavelength of radiation, and a flowline between the electromagnetic radiation source and the detector having at least a portion of a wall formed from the polycrystalline transparent ceramic component, the flow line operable to permit the flow of a drilling fluid. Such a sensor may be used in a logging while drilling or measuring while drilling apparatus. The also disclosure relates to a wireline measurement apparatus including a sensor comprising a polycrystalline transparent ceramic component. The disclosure further relates to a cast logging sensor or tool component comprising a polycrystalline transparent ceramic component, wherein the sensor component has a shape not obtainable from a single crystal using machining techniques. | 1. A logging sensor or tool comprising:
an electromagnetic radiation source operable to emit at least one wavelength of electromagnetic radiation; a detector operable to detect the at least one wavelength of electromagnetic radiation; a polycrystalline transparent ceramic component transparent to the at least one wavelength of radiation; and a flowline between the electromagnetic radiation source and the detector having at least a portion of a wall formed from the polycrystalline transparent ceramic component, the flow line operable to permit the flow of a drilling fluid. 2. The sensor of claim 1, wherein the polycrystalline transparent ceramic component comprises polycrystalline aluminum oxynitride (ALON). 3. The sensor of claim 1, wherein the polycrystalline transparent ceramic component comprises magnesium aluminate spinel. 4. The sensor of claim 1, wherein the at least one wavelength of radiation has a wavelength of between 10 nm and 7000 nm. 6. The sensor of claim 1, wherein the detector produces data operable to be used to analyze a property of the drilling fluid. 7. The sensor of claim 1, wherein the detector comprises or is in communication with a processor and data storage device as well as an output device. 8. The sensor of claim 1, wherein the electromagnetic radiation source is operable to emit at least two wavelengths of electromagnetic radiation, the detector is operable to detect the at least two wavelengths of electromagnetic radiation, and the polycrystalline transparent ceramic is transparent to the at least two wavelengths of radiation. 9. The sensor of claim 6, wherein the property is determined using an integrated computational element (ICE). 10. The sensor of claim 1, wherein the polycrystalline ceramic component comprises a layer located over a sapphire component and a brazing material. 11. A wireline system comprising:
a cable; and a logging sensor or tool communicatively coupled to the cable, the logging sensor or tool comprising a sensor comprising a polycrystalline transparent ceramic component. 12. The system of claim 11, wherein the polycrystalline transparent ceramic component comprises polycrystalline aluminum oxynitride (ALON). 13. The system of claim 11, wherein the polycrystalline transparent ceramic component comprises magnesium aluminate spinel. 14. A logging-while-drilling (LWD) system comprising:
a bit; a drill string; and a logging sensor or tool integrated along the drill string, the logging sensor or tool comprising:
an electromagnetic radiation source operable to emit at least one wavelength of electromagnetic radiation;
a detector operable to detect the at least one wavelength of electromagnetic radiation;
a polycrystalline transparent ceramic component transparent to the at least one wavelength of radiation; and
a flowline between the electromagnetic radiation source and the detector having at least a portion of a wall formed from the polycrystalline transparent ceramic component, the flow line operable to permit the flow of a drilling fluid. 15. The system of claim 14, wherein the polycrystalline transparent ceramic component comprises polycrystalline aluminum oxynitride (ALON). 16. The system of claim 14, wherein the polycrystalline transparent ceramic component comprises magnesium aluminate spinel. 17. A cast logging sensor or tool component comprising a polycrystalline transparent ceramic component, wherein the sensor component has a shape not obtainable from a single crystal using machining techniques. 18. The component of claim 17, wherein the polycrystalline transparent ceramic component comprises polycrystalline aluminum oxynitride (ALON). 19. The component of claim 17, wherein the polycrystalline transparent ceramic component comprises magnesium aluminate spinel. 20. The component of claim 17, wherein the polycrystalline transparent ceramic component comprises an intensification region and a homogenization region. | The disclosure relates to logging sensor or tool including an electromagnetic radiation source operable to emit at least one wavelength of electromagnetic radiation, a detector operable to detect the wavelength of electromagnetic radiation, a polycrystalline transparent ceramic component transparent to the wavelength of radiation, and a flowline between the electromagnetic radiation source and the detector having at least a portion of a wall formed from the polycrystalline transparent ceramic component, the flow line operable to permit the flow of a drilling fluid. Such a sensor may be used in a logging while drilling or measuring while drilling apparatus. The also disclosure relates to a wireline measurement apparatus including a sensor comprising a polycrystalline transparent ceramic component. The disclosure further relates to a cast logging sensor or tool component comprising a polycrystalline transparent ceramic component, wherein the sensor component has a shape not obtainable from a single crystal using machining techniques.1. A logging sensor or tool comprising:
an electromagnetic radiation source operable to emit at least one wavelength of electromagnetic radiation; a detector operable to detect the at least one wavelength of electromagnetic radiation; a polycrystalline transparent ceramic component transparent to the at least one wavelength of radiation; and a flowline between the electromagnetic radiation source and the detector having at least a portion of a wall formed from the polycrystalline transparent ceramic component, the flow line operable to permit the flow of a drilling fluid. 2. The sensor of claim 1, wherein the polycrystalline transparent ceramic component comprises polycrystalline aluminum oxynitride (ALON). 3. The sensor of claim 1, wherein the polycrystalline transparent ceramic component comprises magnesium aluminate spinel. 4. The sensor of claim 1, wherein the at least one wavelength of radiation has a wavelength of between 10 nm and 7000 nm. 6. The sensor of claim 1, wherein the detector produces data operable to be used to analyze a property of the drilling fluid. 7. The sensor of claim 1, wherein the detector comprises or is in communication with a processor and data storage device as well as an output device. 8. The sensor of claim 1, wherein the electromagnetic radiation source is operable to emit at least two wavelengths of electromagnetic radiation, the detector is operable to detect the at least two wavelengths of electromagnetic radiation, and the polycrystalline transparent ceramic is transparent to the at least two wavelengths of radiation. 9. The sensor of claim 6, wherein the property is determined using an integrated computational element (ICE). 10. The sensor of claim 1, wherein the polycrystalline ceramic component comprises a layer located over a sapphire component and a brazing material. 11. A wireline system comprising:
a cable; and a logging sensor or tool communicatively coupled to the cable, the logging sensor or tool comprising a sensor comprising a polycrystalline transparent ceramic component. 12. The system of claim 11, wherein the polycrystalline transparent ceramic component comprises polycrystalline aluminum oxynitride (ALON). 13. The system of claim 11, wherein the polycrystalline transparent ceramic component comprises magnesium aluminate spinel. 14. A logging-while-drilling (LWD) system comprising:
a bit; a drill string; and a logging sensor or tool integrated along the drill string, the logging sensor or tool comprising:
an electromagnetic radiation source operable to emit at least one wavelength of electromagnetic radiation;
a detector operable to detect the at least one wavelength of electromagnetic radiation;
a polycrystalline transparent ceramic component transparent to the at least one wavelength of radiation; and
a flowline between the electromagnetic radiation source and the detector having at least a portion of a wall formed from the polycrystalline transparent ceramic component, the flow line operable to permit the flow of a drilling fluid. 15. The system of claim 14, wherein the polycrystalline transparent ceramic component comprises polycrystalline aluminum oxynitride (ALON). 16. The system of claim 14, wherein the polycrystalline transparent ceramic component comprises magnesium aluminate spinel. 17. A cast logging sensor or tool component comprising a polycrystalline transparent ceramic component, wherein the sensor component has a shape not obtainable from a single crystal using machining techniques. 18. The component of claim 17, wherein the polycrystalline transparent ceramic component comprises polycrystalline aluminum oxynitride (ALON). 19. The component of claim 17, wherein the polycrystalline transparent ceramic component comprises magnesium aluminate spinel. 20. The component of claim 17, wherein the polycrystalline transparent ceramic component comprises an intensification region and a homogenization region. | 2,800 |
11,397 | 11,397 | 14,176,464 | 2,853 | A bias value associated with a sensor, e.g., a time-varying, non-zero value which is output from a sensor when it is motionless, is estimated using a ZRO-tracking filter which is a combination of a moving-average filter and a Kalman filter having at least one constraint enforced against at least one operating parameter of the Kalman filter. It achieves faster convergence on an estimated bias value and produces less estimate error after convergence. A resultant bias estimate may then be used to compensate the biased output of the sensor in, e.g., a 3D pointing device. | 1. A device comprising:
at least one sensor configured to sense rotation of said device about a first axis and to generate at least one first output associated therewith; and a zero-rate output (ZRO) tracking filter configured to receive said at least one first output and to compensate said at least one first output for a bias associated with said at least one sensor, wherein said ZRO filter is implemented as a Kalman filter having at least one constraint enforced on at least one parameter associated therewith. 2. The device of claim 1, wherein said sensed rotation of said device involves at least one of: an angular velocity, an angular rate, and an angular position of said device. 3. The device of claim 1, wherein said bias is associated with a non-zero value output from said at least one sensor when said device is stationary. 4. The device of claim 1, wherein said at least one constraint is a lower bound enforced on an error variance (P) of an estimate of said bias. 5. The device of claim 1, wherein said wherein said at least one constraint is an upper bound enforced on an error variance (P) of an estimate of said bias. 6. The device of claim 1, wherein said at least one constraint is a lower bound enforced on a gain of said Kalman filter. 7. The device of claim 6, wherein said lower bound is enforced using at least one moving average. 8. The device of claim 7, wherein said at least one moving average is a cumulative moving average during a first number of samples of said at least one first output, and is an exponential moving average after said first number of samples. 9. The device of claim 1, wherein said at least one constraint is an upper bound enforced on a gain of said Kalman filter. 10. The device of claim 1, wherein said at least one constraint includes both an upper bound and a lower bound on an error variance (P) of an estimate of said bias and an upper bound and a lower bound on a gain of said Kalman filter. 11. The device of claim 1, wherein said at least one constraint is selected based on whether said ZRO filter has converged on an estimate of said bias, such that a first constraint is applied before said ZRO filter has converged on said estimate of said bias and that a second constraint, different from said first constraint, is applied after said ZRO filter has converged on said estimate of said bias. 12. The device of claim 11, wherein said convergence on said estimate of said bias is determined based on a convergence confidence factor of said ZRO filter. 13. A device comprising:
at least one sensor configured to sense rotation of said device about a first axis and to generate at least one first output associated therewith; and a zero rate offset (ZRO) filter configured to receive said at least one first output and to compensate said at least one first output for a bias associated with said at least one sensor, wherein said ZRO filter is implemented as a combination of a Kalman filter and a moving-average filter. 14. The device of claim 13 wherein said Kalman filter has at least one constraint enforced on at least one parameter associated therewith. 15. The device of claim 14, wherein said moving average filter is a cumulative moving average filter during a first number of samples of said at least one first output, and is an exponential moving average filter after said first number of samples. 16. The device of claim 13, wherein said ZRO filter switches its computation method for a coefficient from a first technique prior to convergence on a bias estimate to a second technique after convergence on said bias estimate. 17. The device of claim 13, wherein said ZRO filter evaluates whether a current estimate of said bias has converged to a true value of said bias. 18. The device of claim 13, wherein said ZRO filter computes measurement variance for a phase “before convergence” of an estimate of said bias using a technique which does not directly count a DC portion of said at least one first output. 19. The device of claim 13, further comprising:
a plurality of instances of said ZRO filters running together with at least one of different conditions and initializations to generate both a quick convergence to said bias and less likelihood of false convergence to said bias. 20. The device of claim 13, wherein said ZRO filter enforces different bounds on prediction variation before convergence to a bias estimate and after convergence to a bias estimate to reduce backlash pickup. 21. A method for filtering an output of a sensor to compensate for bias error, the method comprising:
filtering said output using a shared recursive computation architecture of a standard Kalman filter, a cumulative moving-average filter, and an exponential moving-average filter, wherein a filter gain is adaptively modified as a function of Kalman gain, a cumulative moving-average coefficient, and an exponential moving-average coefficient. 22. The method of claim 21, further comprising:
enforcing constraints on a predicted estimate covariance used in a Kalman gain computation 23. The method of claim 21, wherein said function is a first function before convergence of a bias estimate and a second function, different from said first function, after convergence of said bias estimate. 24. The method of claim 22, wherein said constraints include a first set of constraints used before convergence to a bias estimate and a second set of constraints, different than said first set of constraints, after convergence to said bias estimate. | A bias value associated with a sensor, e.g., a time-varying, non-zero value which is output from a sensor when it is motionless, is estimated using a ZRO-tracking filter which is a combination of a moving-average filter and a Kalman filter having at least one constraint enforced against at least one operating parameter of the Kalman filter. It achieves faster convergence on an estimated bias value and produces less estimate error after convergence. A resultant bias estimate may then be used to compensate the biased output of the sensor in, e.g., a 3D pointing device.1. A device comprising:
at least one sensor configured to sense rotation of said device about a first axis and to generate at least one first output associated therewith; and a zero-rate output (ZRO) tracking filter configured to receive said at least one first output and to compensate said at least one first output for a bias associated with said at least one sensor, wherein said ZRO filter is implemented as a Kalman filter having at least one constraint enforced on at least one parameter associated therewith. 2. The device of claim 1, wherein said sensed rotation of said device involves at least one of: an angular velocity, an angular rate, and an angular position of said device. 3. The device of claim 1, wherein said bias is associated with a non-zero value output from said at least one sensor when said device is stationary. 4. The device of claim 1, wherein said at least one constraint is a lower bound enforced on an error variance (P) of an estimate of said bias. 5. The device of claim 1, wherein said wherein said at least one constraint is an upper bound enforced on an error variance (P) of an estimate of said bias. 6. The device of claim 1, wherein said at least one constraint is a lower bound enforced on a gain of said Kalman filter. 7. The device of claim 6, wherein said lower bound is enforced using at least one moving average. 8. The device of claim 7, wherein said at least one moving average is a cumulative moving average during a first number of samples of said at least one first output, and is an exponential moving average after said first number of samples. 9. The device of claim 1, wherein said at least one constraint is an upper bound enforced on a gain of said Kalman filter. 10. The device of claim 1, wherein said at least one constraint includes both an upper bound and a lower bound on an error variance (P) of an estimate of said bias and an upper bound and a lower bound on a gain of said Kalman filter. 11. The device of claim 1, wherein said at least one constraint is selected based on whether said ZRO filter has converged on an estimate of said bias, such that a first constraint is applied before said ZRO filter has converged on said estimate of said bias and that a second constraint, different from said first constraint, is applied after said ZRO filter has converged on said estimate of said bias. 12. The device of claim 11, wherein said convergence on said estimate of said bias is determined based on a convergence confidence factor of said ZRO filter. 13. A device comprising:
at least one sensor configured to sense rotation of said device about a first axis and to generate at least one first output associated therewith; and a zero rate offset (ZRO) filter configured to receive said at least one first output and to compensate said at least one first output for a bias associated with said at least one sensor, wherein said ZRO filter is implemented as a combination of a Kalman filter and a moving-average filter. 14. The device of claim 13 wherein said Kalman filter has at least one constraint enforced on at least one parameter associated therewith. 15. The device of claim 14, wherein said moving average filter is a cumulative moving average filter during a first number of samples of said at least one first output, and is an exponential moving average filter after said first number of samples. 16. The device of claim 13, wherein said ZRO filter switches its computation method for a coefficient from a first technique prior to convergence on a bias estimate to a second technique after convergence on said bias estimate. 17. The device of claim 13, wherein said ZRO filter evaluates whether a current estimate of said bias has converged to a true value of said bias. 18. The device of claim 13, wherein said ZRO filter computes measurement variance for a phase “before convergence” of an estimate of said bias using a technique which does not directly count a DC portion of said at least one first output. 19. The device of claim 13, further comprising:
a plurality of instances of said ZRO filters running together with at least one of different conditions and initializations to generate both a quick convergence to said bias and less likelihood of false convergence to said bias. 20. The device of claim 13, wherein said ZRO filter enforces different bounds on prediction variation before convergence to a bias estimate and after convergence to a bias estimate to reduce backlash pickup. 21. A method for filtering an output of a sensor to compensate for bias error, the method comprising:
filtering said output using a shared recursive computation architecture of a standard Kalman filter, a cumulative moving-average filter, and an exponential moving-average filter, wherein a filter gain is adaptively modified as a function of Kalman gain, a cumulative moving-average coefficient, and an exponential moving-average coefficient. 22. The method of claim 21, further comprising:
enforcing constraints on a predicted estimate covariance used in a Kalman gain computation 23. The method of claim 21, wherein said function is a first function before convergence of a bias estimate and a second function, different from said first function, after convergence of said bias estimate. 24. The method of claim 22, wherein said constraints include a first set of constraints used before convergence to a bias estimate and a second set of constraints, different than said first set of constraints, after convergence to said bias estimate. | 2,800 |
11,398 | 11,398 | 15,169,095 | 2,828 | A semiconductor device has a semiconductor die. A first insulating layer is disposed over the semiconductor die. A first via is formed in the first insulating layer over a contact pad of the semiconductor die. A first conductive layer is disposed over the first insulating layer and in the first via. A second insulating layer is disposed over a portion of the first insulating layer and first conductive layer. An island of the second insulating layer is formed over the first conductive layer and within the first via. The first conductive layer adjacent to the island is devoid of the second insulating layer. A second conductive layer is disposed over the first conductive layer, second insulating layer, and island. The second conductive layer has a corrugated structure. A width of the island is greater than a width of the first via. | 1. A method of making a semiconductor device, comprising:
providing a semiconductor die; disposing a first insulating layer over the semiconductor die; forming a first via in the first insulating layer over a contact pad of the semiconductor die; disposing a first conductive layer over the first insulating layer and in the first via; disposing a second insulating layer over the first insulating layer and first conductive layer; and removing a portion of the second insulating layer to form an island of the second insulating layer over the first conductive layer and within the first via. 2. The method of claim 1, further including disposing a second conductive layer over the first conductive layer, second insulating layer, and island. 3. The method of claim 2, wherein the second conductive layer has a corrugated structure. 4. The method of claim 2, further including disposing a bump over the second conductive layer and the island. 5. The method of claim 1, wherein a width of the island is greater than a width of the first via. 6. The method of claim 1, wherein the island reduces von Mises stress on a portion of the first conductive layer disposed in the first via. 7. The method of claim 1, wherein the second insulating layer is a compliant dielectric material. 8. A method of making a semiconductor device, comprising:
providing a semiconductor die; disposing a first insulating layer over the semiconductor die; forming a first via in the first insulating layer over a contact pad of the semiconductor die; disposing a first conductive layer over the first insulating layer and in the first via; disposing a second insulating layer over the first insulating layer and first conductive layer; forming a second via in the second insulating layer over the first conductive layer and the first via; disposing a second conductive layer over the first conductive layer and second conductive layer; and forming a third via in the second conductive layer and aligned with the first via. 9. The method of claim 8, wherein the second conductive layer has a ring or donut shape. 10. The method of claim 8, wherein the third via is off-center with respect to the second conductive layer. 11. The method of claim 8, further including disposing a bump over the second conductive layer and the first conductive layer. 12. The method of claim 11, wherein the bump contacts the first conductive layer. 13. The method of claim 8, wherein a width of the third via is greater than a width of the first via. 14. A semiconductor device, comprising:
a semiconductor die; a first insulating layer disposed over the semiconductor die; a first via formed in the first insulating layer over a contact pad of the semiconductor die; a first conductive layer disposed over the first insulating layer and in the first via; a second insulating layer disposed over a portion of the first insulating layer and first conductive layer; and an island of the second insulating layer formed over the first conductive layer and within the first via wherein the first conductive layer adjacent to the island is devoid of the second insulating layer. 15. The semiconductor device of claim 14, further including a second conductive layer disposed over the first conductive layer, second insulating layer, and island. 16. The semiconductor device of claim 15, wherein the second conductive layer has a corrugated structure. 17. The semiconductor device of claim 15, further including a bump disposed over the second conductive layer and the island. 18. The semiconductor device of claim 14, wherein a width of the island is greater than a width of the first via. 19. The semiconductor device of claim 14, wherein the island reduces von Mises stress on a portion of the first conductive layer disposed in the first via. 20. A semiconductor device, comprising:
a semiconductor die; a first insulating layer disposed over the semiconductor die; a first via formed in the first insulating layer over a contact pad of the semiconductor die; a first conductive layer disposed over the first insulating layer and in the first via; a second insulating layer disposed over the first insulating layer and first conductive layer; a second via formed in the second insulating layer over the first conductive layer and the first via; a second conductive layer disposed over the first conductive layer and second conductive layer; and a third via formed in the second conductive layer and aligned with the first via. 21. The semiconductor device of claim 20, wherein the second conductive layer has a ring or donut shape. 22. The semiconductor device of claim 20, wherein the third via is off-center with respect to the second conductive layer. 23. The semiconductor device of claim 20, further including a bump disposed over the second conductive layer and the first conductive layer. 24. The semiconductor device of claim 23, wherein the bump contacts the first conductive layer. 25. The semiconductor device of claim 20, wherein a width of the third via is greater than a width of the first via. | A semiconductor device has a semiconductor die. A first insulating layer is disposed over the semiconductor die. A first via is formed in the first insulating layer over a contact pad of the semiconductor die. A first conductive layer is disposed over the first insulating layer and in the first via. A second insulating layer is disposed over a portion of the first insulating layer and first conductive layer. An island of the second insulating layer is formed over the first conductive layer and within the first via. The first conductive layer adjacent to the island is devoid of the second insulating layer. A second conductive layer is disposed over the first conductive layer, second insulating layer, and island. The second conductive layer has a corrugated structure. A width of the island is greater than a width of the first via.1. A method of making a semiconductor device, comprising:
providing a semiconductor die; disposing a first insulating layer over the semiconductor die; forming a first via in the first insulating layer over a contact pad of the semiconductor die; disposing a first conductive layer over the first insulating layer and in the first via; disposing a second insulating layer over the first insulating layer and first conductive layer; and removing a portion of the second insulating layer to form an island of the second insulating layer over the first conductive layer and within the first via. 2. The method of claim 1, further including disposing a second conductive layer over the first conductive layer, second insulating layer, and island. 3. The method of claim 2, wherein the second conductive layer has a corrugated structure. 4. The method of claim 2, further including disposing a bump over the second conductive layer and the island. 5. The method of claim 1, wherein a width of the island is greater than a width of the first via. 6. The method of claim 1, wherein the island reduces von Mises stress on a portion of the first conductive layer disposed in the first via. 7. The method of claim 1, wherein the second insulating layer is a compliant dielectric material. 8. A method of making a semiconductor device, comprising:
providing a semiconductor die; disposing a first insulating layer over the semiconductor die; forming a first via in the first insulating layer over a contact pad of the semiconductor die; disposing a first conductive layer over the first insulating layer and in the first via; disposing a second insulating layer over the first insulating layer and first conductive layer; forming a second via in the second insulating layer over the first conductive layer and the first via; disposing a second conductive layer over the first conductive layer and second conductive layer; and forming a third via in the second conductive layer and aligned with the first via. 9. The method of claim 8, wherein the second conductive layer has a ring or donut shape. 10. The method of claim 8, wherein the third via is off-center with respect to the second conductive layer. 11. The method of claim 8, further including disposing a bump over the second conductive layer and the first conductive layer. 12. The method of claim 11, wherein the bump contacts the first conductive layer. 13. The method of claim 8, wherein a width of the third via is greater than a width of the first via. 14. A semiconductor device, comprising:
a semiconductor die; a first insulating layer disposed over the semiconductor die; a first via formed in the first insulating layer over a contact pad of the semiconductor die; a first conductive layer disposed over the first insulating layer and in the first via; a second insulating layer disposed over a portion of the first insulating layer and first conductive layer; and an island of the second insulating layer formed over the first conductive layer and within the first via wherein the first conductive layer adjacent to the island is devoid of the second insulating layer. 15. The semiconductor device of claim 14, further including a second conductive layer disposed over the first conductive layer, second insulating layer, and island. 16. The semiconductor device of claim 15, wherein the second conductive layer has a corrugated structure. 17. The semiconductor device of claim 15, further including a bump disposed over the second conductive layer and the island. 18. The semiconductor device of claim 14, wherein a width of the island is greater than a width of the first via. 19. The semiconductor device of claim 14, wherein the island reduces von Mises stress on a portion of the first conductive layer disposed in the first via. 20. A semiconductor device, comprising:
a semiconductor die; a first insulating layer disposed over the semiconductor die; a first via formed in the first insulating layer over a contact pad of the semiconductor die; a first conductive layer disposed over the first insulating layer and in the first via; a second insulating layer disposed over the first insulating layer and first conductive layer; a second via formed in the second insulating layer over the first conductive layer and the first via; a second conductive layer disposed over the first conductive layer and second conductive layer; and a third via formed in the second conductive layer and aligned with the first via. 21. The semiconductor device of claim 20, wherein the second conductive layer has a ring or donut shape. 22. The semiconductor device of claim 20, wherein the third via is off-center with respect to the second conductive layer. 23. The semiconductor device of claim 20, further including a bump disposed over the second conductive layer and the first conductive layer. 24. The semiconductor device of claim 23, wherein the bump contacts the first conductive layer. 25. The semiconductor device of claim 20, wherein a width of the third via is greater than a width of the first via. | 2,800 |
11,399 | 11,399 | 15,089,509 | 2,848 | Electrical interconnect bridge technology is disclosed. An electrical interconnect bridge can include a bridge substrate formed of a mold compound material. The electrical interconnect bridge can also include a plurality of routing layers within the bridge substrate, each routing layer having a plurality of fine line and space (FLS) traces. In addition, the electrical interconnect bridge can include a via extending through the substrate and electrically coupling at least one of the FLS traces in one of the routing layers to at least one of the FLS traces in another of the routing layers. | 1. An electrical interconnect bridge to be embedded in a package substrate, comprising:
a molded bridge substrate comprising a mold compound material; a plurality of routing layers within the bridge substrate, each routing layer having a plurality of fine line and spaced (FLS) traces; and a via extending through the bridge substrate and electrically coupling at least one of the FLS traces in one of the routing layers to at least one of the FLS traces in another of the routing layers to route electrical signals between a first electronic component and a second electronic component supported by the package substrate. 2. The electrical interconnect bridge of claim 1, wherein a first routing layer of the plurality of routing layers includes a first mold compound material and a second routing layer of the plurality of routing layers includes a second mold compound material. 3. The electrical interconnect bridge of claim 1, wherein the plurality of routing layers each includes the same mold compound material. 4. The electrical interconnect bridge of claim 1, wherein the mold compound material comprises epoxy phenol, epoxy anhydride, epoxy amine, or a combination thereof. 5. The electrical interconnect bridge of claim 1, wherein the first and second plurality of FLS traces have a maximum width of about 10 μm. 6. The electrical interconnect bridge of claim 1, wherein the first plurality of FLS traces are spaced from one another by no more than about 10 μm. 7. The electrical interconnect bridge of claim 6, wherein the second plurality of FLS traces are spaced from one another by no more than about 10 μm. 8. The electrical interconnect bridge of claim 1, wherein the via has a non-circular cross-section. 9. The electrical interconnect bridge of claim 1, wherein the bridge substrate further comprises an encapsulant material disposed at least partially about each of the plurality of routing layers. 10. The electrical interconnect bridge of claim 1, wherein a CTE of the mold compound material is from about 7 to about 25 ppm per degree Celsius. 11. An electronic device package substrate assembly, comprising:
a package substrate; and an electrical interconnect bridge embedded in the package substrate configured to route electrical signals between a first electronic component and a second electronic component coupled to the package substrate, the electrical interconnect bridge having
a molded bridge substrate comprising a mold compound material,
a first routing layer within the bridge substrate having a first plurality of fine line and spaced (FLS) traces,
a second routing layer disposed proximate the first routing layer within the bridge substrate having a second plurality of FLS traces, and
a via extending through the bridge substrate and electrically coupling at least one of the first plurality of FLS traces to at least one of the second plurality of FLS traces. 12. The electronic device package substrate assembly of claim 11, wherein the first routing layer includes a first mold compound material and the second routing layer includes a second mold compound material. 13. The electronic device package substrate assembly of claim 11, wherein the first and second routing layers include the same mold compound material. 14. The electronic device package substrate assembly of claim 11, wherein the mold compound material comprises epoxy phenol, epoxy anhydride, epoxy amine, or a combination thereof. 15. The electronic device package substrate assembly of claim 11, wherein the first and second plurality of FLS traces have a maximum width of about 10 μm. 16. The electronic device package substrate assembly of claim 11, wherein the first plurality of FLS traces are spaced from one another by no more than about 10 μm. 17. The electronic device package substrate assembly of claim 16, wherein the second plurality of FLS traces are spaced from one another by no more than about 10 μm. 18. The electronic device package substrate assembly of claim 11, wherein the via has a non-circular cross-section. 19. The electronic device package substrate assembly of claim 11, wherein the bridge substrate further comprises an encapsulant material disposed at least partially about the first and second routing layers, such that the encapsulant material is proximate a portion of the package substrate. 20. The electronic device package substrate assembly of claim 11, wherein a CTE of the mold compound material is from about 7 to about 25 ppm per degree Celsius. 21. A method for making a via for electrically coupling conductive elements, comprising:
forming a spacer on a conductive element; molding a mold material at least partially about lateral sides of the spacer; removing the spacer to form an opening in the mold material in communication with the conductive element; and disposing a conductive material in the opening to form a via. 22. The method of claim 21, wherein forming a spacer comprises disposing a sacrificial material on the conductive element. 23. The method of claim 21, further comprising defining a shape of the spacer. 24. The method of claim 21, wherein molding a mold material about the spacer comprises compression molding such that the spacer is flush with the mold material. 25. The method of claim 21, wherein the spacer is formed of a sacrificial material, and wherein removing the spacer comprises heating the spacer sufficient to decompose the sacrificial material. 26. The method of claim 21, wherein disposing a conductive material in the opening comprises forming a seed layer of the conductive material, plating the conductive material, or a combination thereof. 27. The method of claim 21, wherein the conductive element comprises at least one of a trace and a via pad. 28. The method of claim 21, further comprising disposing conductive material on the via to form a second conductive element. | Electrical interconnect bridge technology is disclosed. An electrical interconnect bridge can include a bridge substrate formed of a mold compound material. The electrical interconnect bridge can also include a plurality of routing layers within the bridge substrate, each routing layer having a plurality of fine line and space (FLS) traces. In addition, the electrical interconnect bridge can include a via extending through the substrate and electrically coupling at least one of the FLS traces in one of the routing layers to at least one of the FLS traces in another of the routing layers.1. An electrical interconnect bridge to be embedded in a package substrate, comprising:
a molded bridge substrate comprising a mold compound material; a plurality of routing layers within the bridge substrate, each routing layer having a plurality of fine line and spaced (FLS) traces; and a via extending through the bridge substrate and electrically coupling at least one of the FLS traces in one of the routing layers to at least one of the FLS traces in another of the routing layers to route electrical signals between a first electronic component and a second electronic component supported by the package substrate. 2. The electrical interconnect bridge of claim 1, wherein a first routing layer of the plurality of routing layers includes a first mold compound material and a second routing layer of the plurality of routing layers includes a second mold compound material. 3. The electrical interconnect bridge of claim 1, wherein the plurality of routing layers each includes the same mold compound material. 4. The electrical interconnect bridge of claim 1, wherein the mold compound material comprises epoxy phenol, epoxy anhydride, epoxy amine, or a combination thereof. 5. The electrical interconnect bridge of claim 1, wherein the first and second plurality of FLS traces have a maximum width of about 10 μm. 6. The electrical interconnect bridge of claim 1, wherein the first plurality of FLS traces are spaced from one another by no more than about 10 μm. 7. The electrical interconnect bridge of claim 6, wherein the second plurality of FLS traces are spaced from one another by no more than about 10 μm. 8. The electrical interconnect bridge of claim 1, wherein the via has a non-circular cross-section. 9. The electrical interconnect bridge of claim 1, wherein the bridge substrate further comprises an encapsulant material disposed at least partially about each of the plurality of routing layers. 10. The electrical interconnect bridge of claim 1, wherein a CTE of the mold compound material is from about 7 to about 25 ppm per degree Celsius. 11. An electronic device package substrate assembly, comprising:
a package substrate; and an electrical interconnect bridge embedded in the package substrate configured to route electrical signals between a first electronic component and a second electronic component coupled to the package substrate, the electrical interconnect bridge having
a molded bridge substrate comprising a mold compound material,
a first routing layer within the bridge substrate having a first plurality of fine line and spaced (FLS) traces,
a second routing layer disposed proximate the first routing layer within the bridge substrate having a second plurality of FLS traces, and
a via extending through the bridge substrate and electrically coupling at least one of the first plurality of FLS traces to at least one of the second plurality of FLS traces. 12. The electronic device package substrate assembly of claim 11, wherein the first routing layer includes a first mold compound material and the second routing layer includes a second mold compound material. 13. The electronic device package substrate assembly of claim 11, wherein the first and second routing layers include the same mold compound material. 14. The electronic device package substrate assembly of claim 11, wherein the mold compound material comprises epoxy phenol, epoxy anhydride, epoxy amine, or a combination thereof. 15. The electronic device package substrate assembly of claim 11, wherein the first and second plurality of FLS traces have a maximum width of about 10 μm. 16. The electronic device package substrate assembly of claim 11, wherein the first plurality of FLS traces are spaced from one another by no more than about 10 μm. 17. The electronic device package substrate assembly of claim 16, wherein the second plurality of FLS traces are spaced from one another by no more than about 10 μm. 18. The electronic device package substrate assembly of claim 11, wherein the via has a non-circular cross-section. 19. The electronic device package substrate assembly of claim 11, wherein the bridge substrate further comprises an encapsulant material disposed at least partially about the first and second routing layers, such that the encapsulant material is proximate a portion of the package substrate. 20. The electronic device package substrate assembly of claim 11, wherein a CTE of the mold compound material is from about 7 to about 25 ppm per degree Celsius. 21. A method for making a via for electrically coupling conductive elements, comprising:
forming a spacer on a conductive element; molding a mold material at least partially about lateral sides of the spacer; removing the spacer to form an opening in the mold material in communication with the conductive element; and disposing a conductive material in the opening to form a via. 22. The method of claim 21, wherein forming a spacer comprises disposing a sacrificial material on the conductive element. 23. The method of claim 21, further comprising defining a shape of the spacer. 24. The method of claim 21, wherein molding a mold material about the spacer comprises compression molding such that the spacer is flush with the mold material. 25. The method of claim 21, wherein the spacer is formed of a sacrificial material, and wherein removing the spacer comprises heating the spacer sufficient to decompose the sacrificial material. 26. The method of claim 21, wherein disposing a conductive material in the opening comprises forming a seed layer of the conductive material, plating the conductive material, or a combination thereof. 27. The method of claim 21, wherein the conductive element comprises at least one of a trace and a via pad. 28. The method of claim 21, further comprising disposing conductive material on the via to form a second conductive element. | 2,800 |
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